# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
# ChangeSet 1.1547.1.48 -> 1.1604
# drivers/net/8139too.c 1.59 -> 1.61
# drivers/pci/hotplug/cpqphp_core.c 1.20 -> 1.21
# arch/sparc/Kconfig 1.18 -> 1.19
# arch/mips64/kernel/i8259.c 1.1 -> (deleted)
# include/asm-mips64/thread_info.h 1.1 -> (deleted)
# include/asm-mips64/traps.h 1.1 -> (deleted)
# arch/mips/mm/cex-sb1.S 1.1 -> 1.2
# include/asm-mips/dma.h 1.2 -> 1.3
# include/asm-mips/thread_info.h 1.1 -> 1.2
# arch/i386/kernel/process.c 1.52 -> 1.53
# drivers/video/fbmem.c 1.77 -> 1.78
# fs/xfs/linux/xfs_lrw.c 1.23 -> 1.28
# scripts/pnmtologo.c 1.2 -> 1.3
# drivers/net/sk98lin/Makefile 1.7 -> 1.8
# arch/sparc64/kernel/pci.c 1.37 -> 1.38
# fs/binfmt_flat.c 1.5 -> 1.6
# include/asm-mips64/kmap_types.h 1.1 -> (deleted)
# include/asm-mips/asm.h 1.3 -> 1.4
# net/ipv4/netfilter/ip_conntrack_core.c 1.34 -> 1.35
# fs/jfs/inode.c 1.30 -> 1.34
# net/rose/sysctl_net_rose.c 1.4 -> 1.5
# include/asm-mips64/sibyte/trace_prof.h 1.1 -> (deleted)
# include/asm-mips/string.h 1.3 -> 1.4
# sound/pci/ice1712/ak4xxx.c 1.3 -> 1.4
# drivers/net/defxx.c 1.18 -> 1.19
# drivers/char/ipmi/ipmi_kcs_intf.c 1.8 -> 1.9
# sound/pci/trident/trident.c 1.9 -> 1.11
# drivers/net/sk98lin/ski2c.c 1.5 -> 1.6
# drivers/media/video/hexium_orion.c 1.1 -> 1.2
# include/asm-mips64/sn/intr.h 1.2 -> 1.3 include/asm-mips/sn/intr.h (moved)
# arch/mips64/kernel/r4k_fpu.S 1.3 -> (deleted)
# arch/mips64/mm/Makefile 1.7 -> (deleted)
# drivers/net/3c59x.c 1.37 -> 1.40
# sound/pci/emu10k1/emu10k1.c 1.10 -> 1.13
# include/asm-mips/it8172/it8172_cir.h 1.2 -> 1.3
# usr/initramfs_data.S 1.1 -> 1.2 initramfs_data.S.tmp (moved)
# arch/i386/kernel/cpu/cpufreq/speedstep-ich.c 1.21 -> 1.24
# include/asm-mips64/sibyte/sb1250_mc.h 1.1 -> (deleted)
# arch/mips64/lib/ide-no.c 1.4 -> (deleted)
# include/asm-mips64/xtalk/xtalk.h 1.3 -> 1.4 include/asm-mips/xtalk/xtalk.h (moved)
# include/asm-x86_64/smp.h 1.9 -> 1.10
# fs/xfs/xfs_mount.h 1.16 -> 1.18
# arch/h8300/platform/h8300h/h8max/Makefile 1.1 -> 1.2
# arch/arm/def-configs/graphicsmaster 1.7 -> 1.8
# arch/mips/jazz/int-handler.S 1.1 -> 1.2
# include/asm-mips64/xor.h 1.1 -> (deleted)
# drivers/ide/pci/via82cxxx.c 1.13 -> 1.15
# include/asm-mips64/dec/kn02ca.h 1.1 -> (deleted)
# include/asm-mips/atomic.h 1.5 -> 1.6
# arch/parisc/kernel/pci.c 1.10 -> 1.11
# include/asm-mips64/sibyte/sb1250_syncser.h 1.1 -> (deleted)
# include/asm-mips64/asm.h 1.3 -> (deleted)
# include/asm-mips64/pgtable-bits.h 1.1 -> (deleted)
# include/asm-mips64/topology.h 1.4 -> (deleted)
# drivers/net/tc35815.c 1.11 -> 1.13
# drivers/net/sk98lin/skgesirq.c 1.4 -> 1.5
# drivers/usb/media/konicawc.c 1.22 -> 1.23
# arch/h8300/kernel/process.c 1.1 -> 1.2
# arch/mips64/kernel/setup.c 1.8 -> (deleted)
# drivers/scsi/ips.c 1.61 -> 1.62
# sound/oss/cs46xx.c 1.32 -> 1.33
# include/asm-mips/sibyte/sb1250_int.h 1.1 -> 1.2
# include/asm-mips64/page.h 1.5 -> (deleted)
# include/asm-mips64/semaphore-helper.h 1.3 -> (deleted)
# drivers/usb/storage/shuttle_usbat.c 1.18 -> 1.19
# arch/arm/def-configs/pfs168_satft 1.6 -> 1.7
# arch/arm/def-configs/edb7211 1.3 -> 1.4
# drivers/media/dvb/ttusb-dec/ttusb_dec.h 1.1 -> 1.2
# drivers/media/dvb/frontends/Makefile 1.7 -> 1.8
# arch/mips/pci/Makefile 1.1 -> 1.2
# arch/mips64/mm/sc-ip22.c 1.1 -> (deleted)
# include/asm-mips64/fcntl.h 1.3 -> (deleted)
# include/asm-mips64/ide.h 1.10 -> (deleted)
# drivers/net/irda/toshoboe.c 1.19 -> 1.20
# sound/i2c/cs8427.c 1.7 -> 1.8
# arch/h8300/platform/h8300h/generic/crt0_rom.S 1.1 -> 1.2
# sound/core/seq/seq_midi_event.c 1.8 -> 1.9
# arch/mips/gt64120/momenco_ocelot/irq.c 1.2 -> 1.3
# drivers/parisc/eisa.c 1.7 -> 1.8
# arch/mips/lasat/setup.c 1.1 -> 1.2
# arch/mips/defconfig-jmr3927 1.1 -> 1.2
# include/asm-mips/addrspace.h 1.3 -> 1.4
# include/asm-mips/stackframe.h 1.3 -> 1.4
# drivers/media/video/cpia_usb.c 1.21 -> 1.22
# arch/arm/def-configs/clps7500 1.3 -> 1.4
# Documentation/networking/cs89x0.txt 1.3 -> 1.4
# include/asm-mips64/arc/types.h 1.1 -> (deleted)
# include/asm-mips64/cacheflush.h 1.1 -> (deleted)
# drivers/media/video/saa7134/saa7134-ts.c 1.7 -> 1.8
# net/ipv4/netfilter/ip_nat_proto_tcp.c 1.4 -> 1.5
# arch/arm/def-configs/trizeps 1.1 -> 1.2
# arch/arm/def-configs/cerfcube 1.7 -> 1.8
# arch/mips/Makefile 1.15 -> 1.16
# kernel/ksyms.c 1.210 -> 1.212
# net/ipv4/ipvs/ip_vs_est.c 1.1 -> 1.2
# drivers/char/n_tty.c 1.15 -> 1.16
# arch/mips/kernel/irix5sys.h 1.2 -> 1.3
# arch/mips/kernel/module.c 1.1 -> (deleted)
# sound/pci/korg1212/korg1212.c 1.24 -> 1.25
# include/asm-i386/msr.h 1.14 -> 1.18
# drivers/net/sk98lin/h/skdrv1st.h 1.6 -> 1.7
# arch/arm/mach-footbridge/netwinder-pci.c 1.6 -> 1.7
# arch/arm/def-configs/pfs168_mqvga 1.6 -> 1.7
# include/asm-mips64/elf.h 1.7 -> (deleted)
# fs/xfs/linux/xfs_vfs.h 1.14 -> 1.15
# sound/pci/ac97/ac97_patch.h 1.7 -> 1.8
# drivers/usb/core/config.c 1.5 -> 1.6
# Documentation/arm/SA1100/Assabet 1.4 -> 1.5
# arch/mips/gt64120/momenco_ocelot/prom.c 1.1 -> 1.2
# arch/mips/jazz/irq.c 1.1 -> 1.2
# arch/i386/kernel/cpu/cpufreq/powernow-k7.c 1.19 -> 1.23
# arch/mips/Kconfig-shared 1.3 -> (deleted)
# include/asm-mips/sibyte/sb1250_smbus.h 1.1 -> 1.2
# include/asm-mips64/sibyte/io.h 1.1 -> (deleted)
# arch/mips64/kernel/r4k_switch.S 1.4 -> (deleted)
# include/asm-mips/unistd.h 1.7 -> 1.8
# sound/ppc/tumbler.c 1.12 -> 1.13
# drivers/net/wan/z85230.c 1.7 -> 1.8
# Documentation/arm/SA1100/HUW_WEBPANEL 1.1 -> 1.2
# include/asm-mips64/addrspace.h 1.3 -> (deleted)
# include/asm-mips64/io.h 1.4 -> (deleted)
# drivers/net/pci-skeleton.c 1.22 -> 1.24
# drivers/isdn/hardware/avm/b1pci.c 1.31 -> 1.32
# include/asm-mips64/termbits.h 1.2 -> (deleted)
# net/xfrm/xfrm_input.c 1.12 -> 1.13
# include/asm-mips/sibyte/sb1250_dma.h 1.1 -> 1.2
# drivers/input/serio/serio.c 1.16 -> 1.17
# arch/arm/def-configs/ebsa110 1.6 -> 1.7
# drivers/net/irda/vlsi_ir.c 1.18 -> 1.19
# arch/mips/pci/pci-mips.c 1.1 -> 1.2
# arch/mips64/mm/cache.c 1.1 -> (deleted)
# include/asm-mips/processor.h 1.11 -> 1.12
# include/asm-mips/uaccess.h 1.3 -> 1.4
# drivers/usb/class/usb-midi.c 1.19 -> 1.20
# drivers/char/Kconfig 1.14 -> 1.15
# arch/h8300/kernel/asm-offsets.c 1.1 -> 1.2
# drivers/net/sk98lin/skcsum.c 1.3 -> 1.4
# Documentation/sound/oss/README.OSS 1.5 -> 1.6
# Documentation/networking/arcnet.txt 1.1 -> 1.2
# arch/x86_64/ia32/ia32_binfmt.c 1.15 -> 1.16
# arch/m68k/defconfig 1.4 -> 1.5
# arch/ia64/Makefile 1.55.1.1 -> 1.57
# fs/xfs/pagebuf/page_buf.c 1.55 -> 1.59
# fs/cramfs/inode.c 1.30 -> 1.31
# drivers/atm/Makefile 1.20 -> 1.21
# fs/xfs/quota/xfs_qm.c 1.13 -> 1.14
# drivers/mtd/devices/blkmtd.c 1.31 -> 1.33
# include/asm-mips64/segment.h 1.1 -> (deleted)
# drivers/telephony/ixj.c 1.25 -> 1.26
# fs/jfs/jfs_incore.h 1.18 -> 1.19
# arch/i386/kernel/cpu/common.c 1.23 -> 1.24
# include/linux/mm.h 1.124 -> 1.126
# arch/sh/mm/cache-sh3.c 1.8 -> 1.9
# arch/mips/defconfig-cobalt 1.1 -> 1.2
# include/asm-mips64/sn/sn0/addrs.h 1.3 -> 1.4 include/asm-mips/sn/sn0/addrs.h (moved)
# fs/file_table.c 1.25 -> 1.26
# drivers/scsi/aha152x.c 1.34 -> 1.35
# arch/mips/kernel/syscalls.h 1.4 -> (deleted)
# arch/mips/math-emu/kernel_linkage.c 1.2 -> 1.3
# sound/pci/ice1712/ice1712.h 1.9 -> 1.10
# include/asm-h8300/h8max/ne.h 1.1 -> 1.2
# Documentation/arm/SA1100/CERF 1.2 -> 1.3
# drivers/input/gameport/cs461x.c 1.8 -> 1.10
# net/bridge/br_notify.c 1.5 -> 1.6
# fs/open.c 1.45 -> 1.46
# drivers/usb/input/wacom.c 1.29 -> 1.30
# drivers/net/natsemi.c 1.51 -> 1.53
# arch/i386/kernel/cpu/cpufreq/longhaul.c 1.18 -> 1.25
# arch/arm/def-configs/freebird_new 1.6 -> 1.7
# include/asm-ia64/io.h 1.14 -> 1.15
# fs/fat/dir.c 1.19 -> 1.20
# arch/ppc/Makefile 1.39.1.1 -> 1.41
# include/asm-mips64/mmzone.h 1.8 -> 1.9 include/asm-mips/mmzone.h (moved)
# arch/mips64/defconfig-sb1250-swarm 1.1 -> (deleted)
# arch/mips/sgi-ip22/ip22-setup.c 1.1 -> 1.2
# fs/ext3/balloc.c 1.16 -> 1.17
# arch/arm26/lib/kbd.c 1.1 -> 1.2
# net/Kconfig 1.14 -> 1.15
# arch/h8300/kernel/traps.c 1.1 -> 1.2
# net/ipv6/ip6_output.c 1.38 -> 1.39
# fs/jfs/acl.c 1.2 -> 1.3
# include/asm-mips64/fpu_emulator.h 1.1 -> (deleted)
# include/asm-mips64/shmbuf.h 1.2 -> (deleted)
# drivers/ide/pci/serverworks.c 1.18 -> 1.19
# arch/arm/def-configs/pfs168_sastn 1.6 -> 1.7
# include/asm-mips64/sockios.h 1.2 -> (deleted)
# include/asm-mips64/mips-boards/maltaint.h 1.1 -> (deleted)
# arch/sparc64/lib/Makefile 1.12 -> 1.13
# drivers/net/ioc3-eth.c 1.20 -> 1.22
# include/asm-mips64/mips-boards/bonito64.h 1.1 -> (deleted)
# include/asm-mips/r4kcache.h 1.2 -> 1.3
# include/asm-mips/types.h 1.3 -> 1.4
# drivers/net/sk98lin/skproc.c 1.7 -> 1.8
# drivers/ide/pci/piix.c 1.15 -> 1.16
# fs/xfs/linux/xfs_lrw.h 1.13 -> 1.14
# drivers/scsi/mac53c94.c 1.6 -> 1.7
# include/asm-mips64/sibyte/sb1250_mac.h 1.1 -> (deleted)
# include/asm-mips64/mmu.h 1.2 -> (deleted)
# arch/ppc/8xx_io/cs4218_tdm.c 1.6 -> 1.7
# arch/mips/lib/rtc-no.c 1.3 -> 1.4
# mm/readahead.c 1.35 -> 1.36
# drivers/char/watchdog/pcwd.c 1.24 -> 1.25
# drivers/usb/gadget/net2280.c 1.12 -> 1.13
# drivers/i2c/busses/Makefile 1.9 -> 1.10
# include/asm-mips64/sibyte/sb1250_regs.h 1.1 -> (deleted)
# include/asm-mips64/sn/sn0/hubni.h 1.3 -> 1.4 include/asm-mips/sn/sn0/hubni.h (moved)
# include/asm-mips64/dma.h 1.2 -> (deleted)
# arch/alpha/kernel/pci.c 1.33 -> 1.34
# drivers/isdn/hysdn/hycapi.c 1.19 -> 1.20
# fs/ext2/inode.c 1.64 -> 1.67
# Documentation/sound/oss/Wavefront 1.3 -> 1.4
# Documentation/usb/usb-serial.txt 1.13 -> 1.14
# Documentation/README.DAC960 1.2 -> 1.3
# include/asm-mips64/xtalk/xwidget.h 1.3 -> 1.4 include/asm-mips/xtalk/xwidget.h (moved)
# sound/pci/cs46xx/cs46xx_lib.c 1.34 -> 1.35
# drivers/char/random.c 1.33 -> 1.34
# arch/arm/def-configs/shannon 1.6 -> 1.7
# include/asm-mips/usioctl.h 1.1 -> (deleted)
# drivers/media/dvb/frontends/mt312.c 1.2 -> 1.3
# Documentation/cpu-freq/user-guide.txt 1.8 -> 1.9
# include/asm-mips64/sn/sn0/ip27.h 1.3 -> 1.4 include/asm-mips/sn/sn0/ip27.h (moved)
# arch/mips64/lib/memcpy.S 1.4 -> (deleted)
# arch/mips/lib/Makefile 1.8 -> 1.9
# include/asm-mips/bitops.h 1.6 -> 1.7
# include/asm-mips/checksum.h 1.6 -> 1.7
# drivers/ide/pci/cs5520.c 1.5 -> 1.6
# arch/arm/def-configs/integrator 1.6 -> 1.7
# drivers/usb/host/ohci-hcd.c 1.44 -> 1.45
# include/asm-mips64/mmu_context.h 1.5 -> (deleted)
# include/asm-mips64/pci.h 1.10 -> (deleted)
# drivers/input/serio/i8042.c 1.27 -> 1.28
# Documentation/networking/sis900.txt 1.2 -> 1.3
# Documentation/sound/alsa/ALSA-Configuration.txt 1.9 -> 1.12
# arch/mips/lib/r3k_dump_tlb.c 1.3 -> 1.4 arch/mips/lib-32/r3k_dump_tlb.c (moved)
# sound/isa/gus/gus_main.c 1.8 -> 1.9
# arch/mips/gt64120/momenco_ocelot/Makefile 1.5 -> 1.6
# include/linux/sched.h 1.157 -> 1.158
# arch/h8300/platform/h8300h/generic/rom.ld 1.2 -> 1.3
# arch/i386/kernel/cpu/cpufreq/acpi.c 1.7 -> 1.8
# arch/h8300/platform/h8300h/h8max/timer.c 1.1 -> 1.2
# drivers/net/sk98lin/sktimer.c 1.2 -> 1.3
# drivers/net/sk98lin/h/skgepnmi.h 1.2 -> 1.3
# drivers/block/ll_rw_blk.c 1.198 -> 1.200
# kernel/sysctl.c 1.50 -> 1.51
# include/asm-mips64/a.out.h 1.3 -> (deleted)
# drivers/input/Kconfig 1.4 -> 1.5
# include/asm-mips/termbits.h 1.2 -> 1.3
# drivers/net/wireless/airo.c 1.54 -> 1.60
# include/asm-mips64/sn/sn0/hubio.h 1.4 -> 1.5 include/asm-mips/sn/sn0/hubio.h (moved)
# include/asm-mips64/sn/sn0/sn0_fru.h 1.3 -> 1.4 include/asm-mips/sn/sn0/sn0_fru.h (moved)
# drivers/i2c/chips/via686a.c 1.7 -> 1.9
# drivers/cpufreq/userspace.c 1.4 -> 1.6
# include/asm-mips/fpregdef.h 1.1 -> 1.2
# drivers/net/wan/hdlc_generic.c 1.11 -> 1.12
# arch/mips64/mm/extable.c 1.4 -> (deleted)
# sound/isa/sscape.c 1.2 -> 1.4
# fs/xfs/xfs_log_priv.h 1.10 -> 1.13
# fs/binfmt_script.c 1.6 -> 1.7
# include/asm-mips64/linkage.h 1.1 -> (deleted)
# include/asm-mips64/init.h 1.2 -> (deleted)
# arch/mips64/kernel/scall_64.S 1.7 -> (deleted)
# include/asm-mips64/atomic.h 1.4 -> (deleted)
# include/asm-mips/irq.h 1.5 -> 1.6
# net/ipv4/xfrm4_input.c 1.6 -> 1.8
# arch/h8300/kernel/setup.c 1.2 -> 1.3
# include/asm-x86_64/nmi.h 1.2 -> 1.3
# sound/core/seq/seq_clientmgr.c 1.18 -> 1.19
# arch/mips/ite-boards/generic/lpc.c 1.2 -> 1.3
# include/asm-mips64/sgidefs.h 1.2 -> (deleted)
# sound/oss/esssolo1.c 1.30 -> 1.31
# drivers/net/tlan.c 1.24 -> 1.25
# drivers/atm/firestream.c 1.18 -> 1.20
# drivers/block/paride/paride.c 1.12 -> 1.13
# arch/ia64/kernel/setup.c 1.54 -> 1.55
# drivers/isdn/hardware/eicon/divasmain.c 1.10 -> 1.11
# mm/vmscan.c 1.161 -> 1.165
# sound/oss/ac97_codec.c 1.16 -> 1.17
# include/asm-mips64/sgi/ioc.h 1.1 -> (deleted)
# include/asm-mips64/cpu.h 1.3 -> (deleted)
# include/asm-mips64/gfx.h 1.4 -> (deleted)
# net/ipv4/af_inet.c 1.55 -> 1.56
# arch/i386/kernel/cpu/cpufreq/powernow-k6.c 1.15 -> 1.17
# sound/pci/rme9652/hammerfall_mem.c 1.15 -> (deleted)
# drivers/isdn/hardware/avm/t1pci.c 1.28 -> 1.29
# net/atm/Makefile 1.10 -> 1.11
# Documentation/isdn/README.HiSax 1.7 -> 1.8
# arch/ppc64/Makefile 1.26.1.1 -> 1.28
# drivers/net/arcnet/com20020-isa.c 1.6 -> 1.9
# sound/isa/cmi8330.c 1.16 -> 1.17
# drivers/media/dvb/ttpci/budget-patch.c 1.5 -> 1.6
# include/asm-mips64/sn/sn0/hubpi.h 1.3 -> 1.4 include/asm-mips/sn/sn0/hubpi.h (moved)
# arch/mips/defconfig 1.7 -> 1.8
# arch/mips64/kernel/entry.S 1.5 -> (deleted)
# include/asm-mips64/bootinfo.h 1.4 -> (deleted)
# arch/mips/kernel/irq.c 1.11 -> 1.12
# drivers/isdn/eicon/eicon_isa.c 1.5 -> 1.6
# arch/sparc64/kernel/pci_iommu.c 1.8 -> 1.9
# sound/core/ioctl32/ioctl32.c 1.16 -> 1.17
# include/asm-mips/ioctl.h 1.2 -> 1.3
# include/asm-mips/regdef.h 1.1 -> 1.2
# arch/sparc/Makefile 1.23.1.2 -> 1.26
# drivers/scsi/dc395x.c 1.10 -> 1.13
# include/asm-mips64/dec/kn02xa.h 1.1 -> (deleted)
# arch/mips64/defconfig-malta 1.1 -> (deleted)
# include/asm-mips64/current.h 1.3 -> (deleted)
# arch/mips/gt64120/momenco_ocelot/reset.c 1.1 -> 1.2
# arch/ia64/hp/common/sba_iommu.c 1.27 -> 1.28
# include/asm-h8300/processor.h 1.2 -> 1.3
# drivers/net/sk98lin/skge.c 1.21 -> 1.23
# arch/x86_64/kernel/apic.c 1.20 -> 1.21
# drivers/net/wireless/orinoco_tmd.c 1.1 -> 1.3
# drivers/net/tulip/xircom_tulip_cb.c 1.21 -> 1.23
# sound/oss/dmasound/dmasound_core.c 1.14 -> 1.15
# arch/h8300/Makefile 1.1.1.1 -> 1.4
# arch/i386/Kconfig 1.62.1.4 -> 1.66
# drivers/cpufreq/proc_intf.c 1.4 -> 1.6
# net/ipv4/netfilter/ip_nat_core.c 1.28 -> 1.29
# include/asm-mips64/dec/io.h 1.1 -> (deleted)
# arch/mips64/kernel/pci-dma.c 1.1 -> (deleted)
# sound/core/rawmidi.c 1.25 -> 1.27
# drivers/char/drm/r128_cce.c 1.13 -> 1.14
# arch/h8300/platform/h8300h/aki3068net/timer.c 1.1 -> 1.2
# arch/h8300/platform/h8300h/h8max/crt0_ram.S 1.1 -> 1.2
# fs/reiserfs/do_balan.c 1.18 -> 1.19
# drivers/char/drm/r128_state.c 1.12 -> 1.13
# drivers/pci/hotplug/ibmphp_ebda.c 1.11 -> 1.12
# include/asm-mips/i8259.h 1.1 -> 1.2
# include/asm-mips/smp.h 1.3 -> 1.4
# sound/core/control.c 1.23 -> 1.24
# drivers/net/arcnet/com20020-pci.c 1.14 -> 1.15
# drivers/atm/he.c 1.16 -> 1.17
# arch/mips/kernel/ipc.c 1.2 -> (deleted)
# arch/h8300/platform/h8300h/generic/Makefile 1.1 -> 1.2
# arch/arm/def-configs/freebird 1.6 -> 1.7
# arch/mips/gt64120/momenco_ocelot/int-handler.S 1.1 -> 1.2
# drivers/eisa/pci_eisa.c 1.2 -> 1.3
# arch/mips/defconfig-pb1100 1.1 -> 1.2
# drivers/media/video/saa7134/saa7134-video.c 1.8 -> 1.9
# fs/devfs/base.c 1.97 -> 1.98
# arch/mips/kernel/smp.c 1.12 -> 1.13
# drivers/net/hamradio/6pack.c 1.13 -> 1.14
# arch/h8300/defconfig 1.1 -> 1.2
# arch/h8300/platform/h8300h/generic/ram.ld 1.1 -> 1.2
# drivers/ide/pci/cy82c693.c 1.13 -> 1.14
# arch/arm/def-configs/cerfpda 1.7 -> 1.8
# include/asm-mips64/hdreg.h 1.2 -> (deleted)
# Documentation/arm/SA1100/Brutus 1.2 -> 1.3
# Documentation/networking/ifenslave.c 1.6 -> 1.7
# include/asm-mips64/floppy.h 1.3 -> (deleted)
# include/asm-mips64/poll.h 1.3 -> (deleted)
# include/linux/i2c.h 1.31 -> 1.32
# net/ipv4/netfilter/ip_nat_proto_udp.c 1.3 -> 1.4
# drivers/net/sk98lin/h/sktimer.h 1.2 -> 1.3
# drivers/usb/class/usblp.c 1.52 -> 1.56
# fs/stat.c 1.20 -> 1.21
# include/asm-mips64/hw_irq.h 1.2 -> (deleted)
# include/asm-mips64/irq_cpu.h 1.1 -> (deleted)
# arch/mips/kernel/entry.S 1.5 -> 1.6
# arch/mips/kernel/setup.c 1.11 -> 1.12
# sound/pcmcia/vx/vxpocket.c 1.2 -> 1.3
# include/asm-h8300/irq.h 1.2 -> 1.3
# drivers/char/watchdog/machzwd.c 1.19 -> 1.20
# arch/mips/sgi-ip32/crime.c 1.2 -> 1.3
# include/asm-mips64/dec/tcinfo.h 1.1 -> (deleted)
# arch/mips/sibyte/sb1250/setup.c 1.1 -> 1.2
# arch/mips/pci/ops-ev64120.c 1.1 -> 1.2
# scripts/modpost.c 1.12 -> 1.13
# drivers/net/tg3.h 1.24 -> 1.25
# arch/s390/Makefile 1.25.1.2 -> 1.28
# drivers/media/dvb/dvb-core/dvb_net.c 1.7 -> 1.8
# include/asm-mips64/sgi/gio.h 1.1 -> (deleted)
# fs/xfs/xfs_vfsops.c 1.37 -> 1.38
# include/net/pkt_sched.h 1.5 -> 1.6
# include/asm-mips64/dec/kn02ba.h 1.1 -> (deleted)
# arch/mips/sgi-ip22/ip22-time.c 1.1 -> 1.2
# arch/mips64/mm/cerr-sb1.c 1.1 -> (deleted)
# include/asm-mips64/break.h 1.1 -> (deleted)
# drivers/net/ixgb/ixgb_main.c 1.6 -> 1.7
# arch/mips/ite-boards/generic/Makefile 1.7 -> 1.8
# sound/oss/ite8172.c 1.17 -> 1.18
# drivers/char/agp/nvidia-agp.c 1.11 -> 1.12
# include/asm-mips64/dec/ecc.h 1.1 -> (deleted)
# include/asm-mips64/sgi/ip22.h 1.1 -> (deleted)
# arch/mips64/mm/tlb-andes.c 1.1 -> 1.2 arch/mips/mm/tlb-andes.c (moved)
# include/asm-mips64/tlbflush.h 1.1 -> (deleted)
# include/asm-mips/cacheops.h 1.2 -> 1.3
# drivers/net/tulip/winbond-840.c 1.34 -> 1.36
# drivers/usb/core/usb.h 1.1 -> 1.3
# mm/swapfile.c 1.81 -> 1.82
# arch/i386/pci/numa.c 1.14 -> 1.15
# kernel/Makefile 1.28 -> 1.29
# sound/drivers/opl3/opl3_lib.c 1.9 -> 1.10
# Documentation/kbuild/00-INDEX 1.3 -> 1.4
# drivers/char/synclinkmp.c 1.19 -> 1.21
# arch/mips/sibyte/swarm/rtc_m41t81.c 1.1 -> 1.2
# include/asm-mips64/stackframe.h 1.2 -> (deleted)
# arch/mips/kernel/mips_ksyms.c 1.9 -> 1.10
# Documentation/networking/vortex.txt 1.5 -> 1.6
# drivers/net/ne2k-pci.c 1.12 -> 1.14
# kernel/cpufreq.c 1.40 -> 1.52
# net/netrom/sysctl_net_netrom.c 1.4 -> 1.5
# drivers/i2c/Kconfig 1.11 -> 1.13
# net/atm/atm_misc.c 1.7 -> 1.8
# arch/mips/defconfig-ev64120 1.1 -> 1.2
# arch/mips/kernel/gdb-low.S 1.3 -> 1.4
# drivers/char/cyclades.c 1.27 -> 1.28
# drivers/video/cyber2000fb.c 1.30 -> 1.31
# sound/isa/cs423x/cs4231_lib.c 1.16 -> 1.17
# include/linux/xfrm.h 1.17 -> 1.18
# drivers/atm/eni.c 1.17 -> 1.18
# include/asm-mips64/ip32/io.h 1.1 -> (deleted)
# include/asm-mips64/dec/kn01.h 1.1 -> (deleted)
# include/asm-mips64/fpu.h 1.1 -> (deleted)
# include/asm-mips/time.h 1.3 -> 1.4
# drivers/scsi/NCR53C9x.c 1.27 -> 1.28
# include/linux/blkdev.h 1.120 -> 1.121
# net/ipv6/xfrm6_policy.c 1.10 -> 1.11
# arch/mips64/mm/c-r4k.c 1.1 -> (deleted)
# drivers/char/watchdog/wdt285.c 1.11 -> 1.12
# include/asm-mips/it8172/it8172_dbg.h 1.2 -> 1.3
# drivers/media/dvb/dvb-core/dvb_frontend.c 1.7 -> 1.8
# drivers/usb/net/ax8817x.c 1.3 -> 1.7
# include/asm-mips64/sn/arch.h 1.3 -> 1.4 include/asm-mips/sn/arch.h (moved)
# drivers/atm/zatm.c 1.12 -> 1.14
# drivers/net/sk98lin/skqueue.c 1.4 -> 1.5
# drivers/ide/pci/trm290.c 1.11 -> 1.12
# arch/mips/sni/Makefile 1.7 -> 1.8
# drivers/net/wan/sdladrv.c 1.9 -> 1.10
# sound/oss/btaudio.c 1.17 -> 1.18
# drivers/scsi/ips.h 1.30 -> 1.31
# include/asm-mips64/sibyte/carmel.h 1.1 -> (deleted)
# arch/mips/lib/watch.S 1.2 -> 1.3 arch/mips/lib-32/watch.S (moved)
# scripts/kconfig/mconf.c 1.7 -> 1.8
# arch/x86_64/kernel/ioport.c 1.6 -> 1.7
# sound/pci/ice1712/ews.c 1.9 -> 1.10
# drivers/video/console/Kconfig 1.17 -> 1.18
# drivers/usb/core/message.c 1.29 -> 1.33
# net/ipv4/netfilter/ip_tables.c 1.17 -> 1.18
# arch/mips/defconfig-eagle 1.1 -> 1.2
# drivers/media/video/bw-qcam.c 1.12 -> 1.13
# drivers/net/rrunner.c 1.17 -> 1.18
# drivers/media/video/w9966.c 1.10 -> 1.11
# arch/arm/def-configs/jornada720 1.8 -> 1.9
# arch/mips/sibyte/cfe/setup.c 1.2 -> 1.3
# arch/mips/defconfig-ddb5477 1.4 -> 1.5
# arch/mips/sibyte/swarm/rtc_xicor1241.c 1.1 -> 1.2
# include/asm-mips/sibyte/sb1250_regs.h 1.1 -> 1.2
# arch/mips64/lib/strncpy_user.S 1.3 -> 1.4 arch/mips/lib-64/strncpy_user.S (moved)
# arch/arm/def-configs/iq80321 1.2 -> 1.3
# drivers/net/skfp/h/cmtdef.h 1.2 -> 1.3
# net/key/af_key.c 1.47 -> 1.48
# include/linux/ethtool.h 1.17 -> 1.18
# arch/mips64/defconfig-atlas 1.1 -> (deleted)
# drivers/net/wan/dscc4.c 1.36 -> 1.38
# lib/zlib_deflate/deftree.c 1.6 -> 1.7
# arch/i386/pci/i386.c 1.15 -> 1.16
# drivers/char/drm/gamma_lists.h 1.1 -> 1.2
# drivers/net/starfire.c 1.27 -> 1.29
# include/asm-mips64/mips-boards/piix4.h 1.1 -> (deleted)
# kernel/suspend.c 1.43 -> 1.44
# arch/mips64/kernel/signal.c 1.9 -> (deleted)
# arch/mips64/mm/tlbex-r4k.S 1.1 -> 1.2 arch/mips/mm-64/tlbex-r4k.S (moved)
# arch/v850/kernel/rte_mb_a_pci.c 1.7 -> 1.8
# drivers/mtd/maps/amd76xrom.c 1.2 -> 1.3
# arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c 1.2 -> (deleted)
# include/asm-mips/termios.h 1.5 -> 1.6
# drivers/media/video/hexium_gemini.c 1.1 -> 1.2
# drivers/pcmcia/cs.c 1.54 -> 1.56
# include/linux/fs.h 1.256 -> 1.259
# fs/intermezzo/dir.c 1.16 -> 1.17
# include/asm-mips64/dec/machtype.h 1.1 -> (deleted)
# arch/mips64/Makefile 1.16 -> (deleted)
# include/asm-mips64/posix_types.h 1.4 -> (deleted)
# arch/mips/mm/tlb-r4k.c 1.1 -> 1.2
# arch/sh/boards/overdrive/galileo.c 1.1 -> 1.2
# drivers/net/tokenring/abyss.c 1.9 -> 1.10
# drivers/atm/lanai.c 1.10 -> 1.11
# mm/madvise.c 1.6 -> 1.7
# arch/arm/def-configs/h3600 1.7 -> 1.8
# drivers/char/watchdog/mixcomwd.c 1.16 -> 1.17
# include/sound/emu10k1.h 1.15 -> 1.17
# arch/mips64/lib/watch.S 1.2 -> 1.3 arch/mips/lib-64/watch.S (moved)
# arch/cris/arch-v10/defconfig 1.1 -> 1.2
# arch/mips/sibyte/swarm/time.c 1.1 -> 1.2
# include/asm-mips64/sgi/hpc3.h 1.1 -> (deleted)
# arch/mips64/kernel/unaligned.c 1.4 -> (deleted)
# include/asm-mips64/exception.h 1.1 -> (deleted)
# arch/mips/kernel/sysmips.c 1.6 -> (deleted)
# drivers/usb/media/ibmcam.c 1.19 -> 1.20
# drivers/video/tdfxfb.c 1.42 -> 1.44
# Documentation/networking/bonding.txt 1.9 -> 1.10
# include/linux/delay.h 1.2 -> 1.3
# Documentation/arm/SA1100/Itsy 1.2 -> 1.3
# arch/mips/mm/fault.c 1.7 -> 1.8
# drivers/usb/image/scanner.c 1.65 -> 1.66
# net/ipv4/ipvs/Kconfig 1.3 -> 1.4
# include/asm-mips64/dec/kn02.h 1.1 -> (deleted)
# arch/mips/sgi-ip27/ip27-memory.c 1.6 -> 1.7
# arch/mips64/kernel/process.c 1.7 -> (deleted)
# fs/xfs/linux/xfs_super.h 1.19 -> 1.21
# arch/mips/defconfig-malta 1.4 -> 1.5
# include/asm-mips64/sgialib.h 1.4 -> (deleted)
# include/asm-mips/hardirq.h 1.4 -> 1.5
# drivers/net/pcnet32.c 1.37 -> 1.39
# arch/ia64/sn/io/machvec/pci.c 1.8 -> 1.9
# include/asm-mips64/sfp-machine.h 1.1 -> (deleted)
# include/asm-mips64/asmmacro.h 1.3 -> (deleted)
# include/asm-mips64/checksum.h 1.6 -> (deleted)
# drivers/video/console/sticore.c 1.13 -> 1.14
# arch/h8300/platform/h8300h/ints.c 1.1 -> 1.2
# sound/core/oss/pcm_plugin.c 1.5 -> 1.6
# arch/arm/defconfig 1.4 -> 1.5
# arch/mips/sni/io.c 1.1 -> 1.2
# arch/cris/defconfig 1.10 -> 1.11
# arch/x86_64/kernel/setup64.c 1.14 -> 1.15
# include/asm-mips/pgtable.h 1.12 -> 1.13
# fs/reiserfs/procfs.c 1.17 -> 1.18
# arch/mips/sni/int-handler.S 1.2 -> 1.3
# sound/oss/via82cxxx_audio.c 1.29 -> 1.30
# arch/ppc/configs/common_defconfig 1.21 -> 1.23
# arch/mips/defconfig-sead 1.1 -> 1.2
# arch/mips64/Kconfig 1.16 -> (deleted)
# net/ipv4/netfilter/ipt_physdev.c 1.5 -> 1.6
# arch/h8300/kernel/syscalls.S 1.1 -> 1.2
# drivers/scsi/ncr53c8xx.c 1.32 -> 1.33
# drivers/net/sk98lin/h/ski2c.h 1.2 -> 1.3
# drivers/char/watchdog/shwdt.c 1.15 -> 1.16
# fs/reiserfs/fix_node.c 1.29 -> 1.30
# include/asm-mips/shmiq.h 1.3 -> (deleted)
# Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl 1.10 -> 1.11
# drivers/i2c/busses/i2c-piix4.c 1.10 -> 1.12
# fs/jbd/transaction.c 1.73 -> 1.74
# include/asm-mips64/bugs.h 1.3 -> (deleted)
# include/asm-mips64/smp.h 1.4 -> (deleted)
# arch/ppc/configs/TQM860L_defconfig 1.15 -> 1.16
# sound/usb/usbmixer.c 1.15 -> 1.17
# drivers/i2c/busses/i2c-sis96x.c 1.1 -> 1.3
# arch/h8300/kernel/ptrace.c 1.1 -> 1.2
# drivers/usb/media/pwc-uncompress.h 1.5 -> 1.6
# arch/arm/def-configs/a5k 1.4 -> 1.5
# sound/core/oss/plugin_ops.h 1.1 -> 1.2
# mm/bootmem.c 1.19 -> 1.20
# drivers/usb/serial/visor.c 1.64 -> 1.66
# include/asm-mips/dec/prom.h 1.1 -> 1.2
# arch/sh/kernel/pcibios.c 1.5 -> 1.6
# include/asm-mips/sysmips.h 1.1 -> 1.2
# arch/mips64/kernel/head.S 1.3 -> (deleted)
# arch/mips/ite-boards/ivr/README 1.1 -> 1.2
# include/asm-mips64/mips-boards/malta.h 1.2 -> (deleted)
# include/asm-mips64/pci/bridge.h 1.4 -> 1.5 include/asm-mips/pci/bridge.h (moved)
# arch/mips64/kernel/branch.c 1.3 -> (deleted)
# include/asm-mips64/scatterlist.h 1.4 -> (deleted)
# drivers/net/wan/lmc/lmc_main.c 1.17 -> 1.18
# drivers/usb/misc/emi26.c 1.8 -> 1.10
# drivers/usb/media/ov511.c 1.45 -> 1.46
# arch/x86_64/kernel/mpparse.c 1.9 -> 1.10
# net/ipv4/netfilter/ip_nat_proto_icmp.c 1.3 -> 1.4
# include/sound/ad1848.h 1.5 -> 1.6
# drivers/usb/host/ehci-sched.c 1.26 -> 1.27
# sound/ppc/burgundy.c 1.6 -> 1.7
# drivers/net/sk98lin/h/skvpd.h 1.2 -> 1.3
# drivers/video/i810/i810_main.c 1.11 -> 1.12
# include/asm-h8300/uaccess.h 1.2 -> 1.3
# net/ipv4/netfilter/ip_conntrack_tftp.c 1.3 -> 1.4
# arch/h8300/kernel/time.c 1.1 -> 1.2
# arch/mips/sni/irq.c 1.1 -> 1.2
# drivers/net/wan/hdlc_cisco.c 1.7 -> 1.8
# include/asm-mips64/mips-boards/msc01_pci.h 1.1 -> (deleted)
# include/asm-mips/signal.h 1.4 -> 1.5
# arch/ppc/boot/openfirmware/Makefile 1.17 -> 1.18
# drivers/media/video/saa7134/saa7134-core.c 1.5 -> 1.6
# include/asm-mips/jazz.h 1.1 -> 1.2
# arch/cris/arch-v10/drivers/pcf8563.c 1.1 -> 1.2
# fs/xfs/linux/xfs_iops.c 1.29 -> 1.31
# drivers/usb/core/hcd.h 1.29 -> 1.32
# include/asm-mips64/sn/io.h 1.2 -> 1.3 include/asm-mips/sn/io.h (moved)
# arch/mips64/kernel/init_task.c 1.4 -> (deleted)
# arch/mips64/lib/strlen_user.S 1.3 -> 1.4 arch/mips/lib-64/strlen_user.S (moved)
# arch/mips/kernel/cpu-probe.c 1.1 -> 1.2
# net/8021q/vlanproc.c 1.11 -> 1.13
# include/asm-h8300/regs306x.h 1.1 -> 1.2
# drivers/ide/pci/sl82c105.c 1.11 -> 1.12
# include/sound/seq_midi_event.h 1.2 -> 1.3
# include/asm-mips64/mips-boards/saa9730_uart.h 1.1 -> (deleted)
# net/decnet/dn_dev.c 1.16 -> 1.17
# arch/sparc64/defconfig 1.93 -> 1.97
# drivers/net/sunhme.c 1.37 -> 1.38
# arch/mips/defconfig-tb0229 1.1 -> 1.2
# include/asm-mips64/smplock.h 1.1 -> (deleted)
# include/asm-mips64/uaccess.h 1.3 -> (deleted)
# sound/pci/ice1712/ice1712.c 1.16 -> 1.17
# sound/core/pcm_native.c 1.36 -> 1.37
# sound/pci/rme9652/hdsp.c 1.18 -> 1.20
# fs/xfs/linux/xfs_vnode.c 1.15 -> 1.16
# arch/arm/def-configs/assabet 1.9 -> 1.10
# mm/filemap.c 1.199 -> 1.201
# drivers/i2c/i2c-prosavage.c 1.1 -> 1.2
# arch/mips/vmlinux.lds.S 1.10 -> 1.11
# arch/mips/mm/pg-r4k.S 1.1 -> 1.2 arch/mips/mm-32/pg-r4k.S (moved)
# sound/pci/ice1712/aureon.c 1.1 -> 1.2
# include/asm-h8300/thread_info.h 1.2 -> 1.3
# arch/arm/def-configs/footbridge 1.7 -> 1.9
# Documentation/arm/README 1.3 -> 1.4
# sound/oss/ad1889.c 1.4 -> 1.5
# arch/mips64/kernel/binfmt_elfo32.c 1.1 -> 1.2 arch/mips/kernel/binfmt_elfo32.c (moved)
# arch/mips64/lib/strnlen_user.S 1.3 -> 1.4 arch/mips/lib-64/strnlen_user.S (moved)
# include/asm-mips64/irq.h 1.4 -> (deleted)
# drivers/isdn/hisax/hisax_hfcpci.c 1.9 -> 1.11
# sound/isa/sb/emu8000.c 1.10 -> 1.12
# Documentation/scsi/BusLogic.txt 1.3 -> 1.4
# drivers/char/drm/r128.h 1.9 -> 1.10
# drivers/char/pcmcia/synclink_cs.c 1.23 -> 1.24
# include/asm-mips64/dec/ioasic_ints.h 1.1 -> (deleted)
# arch/mips/defconfig-pb1000 1.4 -> 1.5
# arch/mips/au1000/common/time.c 1.4 -> 1.5
# arch/mips64/mm/pgtable.c 1.1 -> (deleted)
# fs/xfs/xfs_mount.c 1.31 -> 1.33
# arch/h8300/lib/Makefile 1.2 -> 1.3
# drivers/ide/pci/cs5530.c 1.12 -> 1.13
# drivers/char/agp/generic.c 1.52 -> 1.55
# fs/intermezzo/fileset.c 1.3 -> 1.4
# arch/i386/Makefile 1.52.1.1 -> 1.54
# drivers/ieee1394/pcilynx.c 1.32 -> 1.33
# sound/oss/forte.c 1.1 -> 1.2
# kernel/user.c 1.7 -> 1.8
# include/asm-mips64/dec/prom.h 1.1 -> (deleted)
# include/asm-mips64/sn/intr_public.h 1.2 -> 1.3 include/asm-mips/sn/intr_public.h (moved)
# include/asm-mips64/sections.h 1.1 -> (deleted)
# include/asm-mips64/user.h 1.3 -> (deleted)
# drivers/isdn/i4l/isdn_x25iface.c 1.5 -> 1.6
# drivers/ide/pci/rz1000.c 1.9 -> 1.10
# include/asm-mips64/usioctl.h 1.2 -> (deleted)
# drivers/char/synclink.c 1.41 -> 1.43
# arch/mips/defconfig-atlas 1.4 -> 1.5
# include/asm-mips64/sn/gda.h 1.3 -> 1.4 include/asm-mips/sn/gda.h (moved)
# sound/pci/rme96.c 1.17 -> 1.19
# drivers/ide/pci/alim15x3.c 1.11 -> 1.12
# arch/arm/def-configs/omnimeter 1.5 -> 1.6
# include/asm-mips/a.out.h 1.1 -> 1.2
# include/asm-mips64/param.h 1.2 -> (deleted)
# include/asm-mips/page.h 1.5 -> 1.6
# fs/binfmt_misc.c 1.21 -> 1.22
# include/asm-h8300/atomic.h 1.1 -> 1.2
# drivers/ide/pci/siimage.c 1.11 -> 1.12
# drivers/atm/uPD98402.c 1.4 -> 1.5
# arch/mips64/kernel/semaphore.c 1.2 -> (deleted)
# arch/mips/jazz/floppy-jazz.c 1.1 -> 1.2
# drivers/net/e1000/e1000_main.c 1.78 -> 1.79
# arch/mips/sgi-ip27/ip27-timer.c 1.6 -> 1.7
# include/sound/version.h 1.60 -> 1.62
# sound/oss/rme96xx.c 1.14 -> 1.15
# sound/pci/ac97/ac97_codec.c 1.40 -> 1.41
# drivers/char/agp/sworks-agp.c 1.33 -> 1.34
# arch/h8300/platform/h8300h/entry.S 1.1 -> 1.2
# arch/mips/defconfig-it8172 1.9 -> 1.10
# fs/jfs/xattr.c 1.14 -> 1.15
# include/asm-x86_64/pda.h 1.9 -> 1.10
# drivers/media/video/bttvp.h 1.11 -> 1.12
# include/asm-h8300/bitops.h 1.1 -> 1.2
# arch/mips64/lib/rtc-no.c 1.3 -> (deleted)
# drivers/scsi/nsp32.c 1.17 -> 1.19
# fs/exec.c 1.92 -> 1.93
# arch/mips64/kernel/Makefile 1.10 -> (deleted)
# include/asm-mips/fpu.h 1.1 -> 1.2
# include/asm-mips/traps.h 1.1 -> 1.2
# init/do_mounts.c 1.49 -> 1.50
# drivers/net/yellowfin.c 1.22 -> 1.24
# include/sound/ymfpci.h 1.5 -> 1.6
# drivers/ide/pci/hpt34x.c 1.13 -> 1.14
# drivers/net/sk98lin/h/skgehwt.h 1.2 -> 1.3
# include/asm-mips64/sgiarcs.h 1.4 -> (deleted)
# include/asm-mips64/hardirq.h 1.3 -> (deleted)
# include/asm-mips/io.h 1.4 -> 1.5
# include/asm-mips/paccess.h 1.2 -> 1.3
# drivers/mtd/maps/pci.c 1.3 -> 1.5
# drivers/ide/pci/opti621.c 1.11 -> 1.12
# arch/arm/def-configs/system3 1.6 -> 1.7
# include/asm-mips/it8712.h 1.1 -> 1.2
# fs/nfsd/vfs.c 1.66 -> 1.67
# arch/mips/sgi-ip27/ip27-klnuma.c 1.3 -> 1.4
# arch/mips64/kernel/mips64_ksyms.c 1.9 -> (deleted)
# arch/h8300/platform/h8300h/generic/timer.c 1.1 -> 1.2
# drivers/usb/media/pwc-misc.c 1.5 -> 1.6
# arch/s390/Kconfig 1.12.1.2 -> 1.15
# arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c 1.2 -> 1.3
# arch/mips/mm/cache.c 1.1 -> 1.2
# arch/arm/kernel/bios32.c 1.23 -> 1.24
# mm/fadvise.c 1.4 -> 1.5
# net/irda/irsysctl.c 1.9 -> 1.10
# include/asm-mips64/ioctl.h 1.3 -> (deleted)
# include/asm-mips64/dec/tc.h 1.1 -> (deleted)
# include/asm-mips/sgi/ioc.h 1.1 -> 1.2
# include/asm-mips64/reg.h 1.2 -> (deleted)
# Documentation/telephony/ixj.txt 1.1 -> 1.2
# arch/sh/mm/cache-sh2.c 1.1 -> 1.2
# arch/mips64/defconfig-decstation 1.1 -> (deleted)
# include/asm-mips/sgi/hpc3.h 1.1 -> 1.2
# drivers/usb/misc/auerswald.c 1.33 -> 1.34
# arch/arm/def-configs/lart 1.8 -> 1.9
# arch/mips/ite-boards/generic/it8172_setup.c 1.3 -> 1.4
# include/asm-mips/mips-boards/prom.h 1.1 -> 1.2
# drivers/ide/setup-pci.c 1.17 -> 1.18
# net/netsyms.c 1.88 -> 1.90
# include/asm-mips64/ip32/mace.h 1.1 -> 1.2 include/asm-mips/ip32/mace.h (moved)
# arch/mips/sibyte/sb1250/bcm1250_tbprof.c 1.1 -> 1.2
# include/asm-mips64/i8259.h 1.1 -> (deleted)
# include/asm-mips/user.h 1.2 -> 1.3
# include/asm-h8300/pgtable.h 1.1 -> 1.2
# include/linux/pci_ids.h 1.110 -> 1.111
# drivers/usb/serial/usb-serial.c 1.84 -> 1.86
# arch/mips/kernel/process.c 1.10 -> 1.11
# drivers/net/dl2k.c 1.27 -> 1.28
# sound/core/pcm_lib.c 1.21 -> 1.23
# sound/pci/ymfpci/ymfpci.c 1.12 -> 1.14
# arch/mips/ite-boards/generic/time.c 1.4 -> 1.5
# arch/mips/defconfig-lasat200 1.1 -> 1.3
# include/asm-mips64/dec/rtc-dec.h 1.1 -> (deleted)
# include/asm-mips64/mips-boards/gt64120.h 1.2 -> (deleted)
# Documentation/filesystems/devfs/README 1.14 -> 1.15
# include/asm-mips64/shmparam.h 1.2 -> (deleted)
# sound/isa/es18xx.c 1.19 -> 1.20
# arch/mips/defconfig-capcella 1.1 -> 1.2
# include/asm-mips64/dec/kn05.h 1.1 -> (deleted)
# arch/mips/sibyte/swarm/dbg_io.c 1.1 -> 1.2
# include/asm-mips64/system.h 1.5 -> (deleted)
# arch/mips/kernel/Makefile 1.12 -> 1.13
# include/asm-mips/irq_cpu.h 1.1 -> 1.2
# sound/usb/usbquirks.h 1.14 -> 1.15
# drivers/net/b44.c 1.8 -> 1.10
# drivers/char/watchdog/softdog.c 1.18 -> 1.19
# mm/shmem.c 1.130 -> 1.131
# arch/i386/mm/pageattr.c 1.5 -> 1.6
# arch/mips/mips-boards/sead/sead_time.c 1.1 -> 1.2
# include/asm-mips/sibyte/64bit.h 1.1 -> (deleted)
# include/asm-mips64/sibyte/sb1250_int.h 1.1 -> (deleted)
# include/asm-mips64/sn/kldir.h 1.2 -> 1.3 include/asm-mips/sn/kldir.h (moved)
# include/asm-mips64/tlbdebug.h 1.1 -> (deleted)
# arch/mips/kernel/traps.c 1.8 -> 1.9
# arch/sparc64/kernel/process.c 1.43 -> 1.44
# include/asm-mips/elf.h 1.6 -> 1.7
# include/asm-mips/system.h 1.6 -> 1.7
# Documentation/s390/3270.txt 1.3 -> 1.4
# include/linux/usb.h 1.82 -> 1.84
# arch/mips/kernel/time.c 1.10 -> 1.11
# arch/x86_64/kernel/pci-gart.c 1.14 -> 1.15
# drivers/net/sis900.c 1.38 -> 1.40
# include/linux/usb_gadget.h 1.3 -> 1.4
# arch/h8300/platform/h8300h/aki3068net/Makefile 1.1 -> 1.2
# include/asm-h8300/gpio.h 1.1 -> 1.2
# include/asm-mips64/sgi/io.h 1.2 -> (deleted)
# arch/x86_64/ia32/ipc32.c 1.8 -> 1.9
# arch/mips64/mm/pg-sb1.c 1.1 -> (deleted)
# arch/mips64/mm/sc-rm7k.c 1.1 -> (deleted)
# mm/swap_state.c 1.61 -> 1.62
# drivers/net/irda/donauboe.c 1.10 -> 1.11
# drivers/isdn/capi/capidrv.c 1.23 -> 1.24
# arch/mips/jazz/Makefile 1.7 -> 1.8
# include/asm-mips/gt64120/gt64120.h 1.1 -> 1.2
# sound/oss/nm256_audio.c 1.13 -> 1.14
# include/asm-mips64/suspend.h 1.1 -> (deleted)
# drivers/isdn/hardware/avm/b1isa.c 1.22 -> 1.23
# arch/h8300/kernel/gpio.c 1.1 -> 1.2
# include/asm-h8300/system.h 1.1 -> 1.2
# arch/mips/ite-boards/ivr/init.c 1.1 -> 1.2
# arch/mips/sni/setup.c 1.2 -> 1.3
# fs/fat/inode.c 1.75 -> 1.76
# arch/ia64/pci/pci.c 1.36 -> 1.37
# sound/oss/sonicvibes.c 1.24 -> 1.26
# drivers/atm/Kconfig 1.5 -> 1.6
# sound/pci/rme9652/rme9652.c 1.19 -> 1.21
# arch/mips/defconfig-ocelot 1.3 -> 1.4
# include/asm-mips64/regdef.h 1.2 -> (deleted)
# include/asm-mips64/sn/mapped_kernel.h 1.3 -> 1.4 include/asm-mips/sn/mapped_kernel.h (moved)
# arch/mips64/kernel/irq.c 1.1 -> (deleted)
# drivers/acpi/pci_irq.c 1.18 -> 1.20
# drivers/media/video/c-qcam.c 1.9 -> 1.10
# include/asm-mips64/cachectl.h 1.2 -> (deleted)
# mm/memory.c 1.126 -> 1.128
# sound/pci/ice1712/ice1724.c 1.6 -> 1.8
# include/asm-x86_64/mpspec.h 1.5 -> 1.6
# drivers/ide/pci/ns87415.c 1.10 -> 1.11
# arch/mips/ite-boards/generic/it8172_rtc.c 1.2 -> (deleted)
# include/asm-mips64/arc/hinv.h 1.2 -> 1.3 include/asm-mips/arc/hinv.h (moved)
# Documentation/moxa-smartio 1.1 -> 1.2
# arch/v850/Kconfig 1.16 -> 1.17
# fs/jfs/super.c 1.39 -> 1.41
# net/sched/sch_atm.c 1.12 -> 1.13
# arch/x86_64/kernel/nmi.c 1.14 -> 1.15
# arch/mips64/vmlinux.lds.S 1.9 -> (deleted)
# arch/mips/mm/pg-r3k.c 1.1 -> 1.2
# fs/xfs/xfs_trans.c 1.9 -> 1.11
# drivers/usb/serial/pl2303.c 1.42 -> 1.43
# drivers/video/chipsfb.c 1.19 -> 1.20
# drivers/usb/media/pwc-ioctl.h 1.7 -> 1.8
# drivers/net/e1000/e1000_ethtool.c 1.29 -> 1.30
# fs/xfs/pagebuf/page_buf_internal.h 1.8 -> 1.9
# include/asm-mips/mmu_context.h 1.5 -> 1.6
# fs/openpromfs/inode.c 1.24 -> 1.25
# include/asm-mips64/mips-boards/atlas.h 1.2 -> (deleted)
# arch/mips/sibyte/sb1250/bus_watcher.c 1.1 -> 1.2
# drivers/net/epic100.c 1.31 -> 1.33
# arch/mips/gt64120/common/Makefile 1.4 -> 1.5
# net/core/netfilter.c 1.22 -> 1.23
# drivers/ide/Kconfig 1.17 -> 1.25
# drivers/usb/net/catc.c 1.28 -> 1.29
# arch/sh/configs/defconfig-adx 1.1 -> 1.2
# drivers/net/acenic.c 1.34 -> 1.36
# include/asm-mips64/dec/tcmodule.h 1.1 -> (deleted)
# arch/mips/sibyte/sb1250/irq_handler.S 1.1 -> 1.2
# include/asm-mips64/sibyte/sb1250_scd.h 1.1 -> (deleted)
# arch/mips64/mm/sc-r5k.c 1.1 -> (deleted)
# include/asm-mips64/mman.h 1.3 -> (deleted)
# drivers/net/arcnet/rfc1201.c 1.7 -> 1.8
# drivers/usb/core/hub.c 1.71 -> 1.75
# arch/ppc/kernel/pci.c 1.30 -> 1.31
# drivers/net/8139cp.c 1.39 -> 1.41
# drivers/net/pcmcia/com20020_cs.c 1.8 -> 1.9
# drivers/block/genhd.c 1.91 -> 1.92
# drivers/net/e100/e100_main.c 1.80 -> 1.82
# arch/mips/defconfig-e55 1.1 -> 1.2
# arch/mips/jazz/kbd-jazz.c 1.1 -> 1.2
# drivers/char/watchdog/sc520_wdt.c 1.10 -> 1.11
# Documentation/DocBook/Makefile 1.41 -> 1.42
# include/asm-h8300/semaphore.h 1.1 -> 1.2
# drivers/char/watchdog/sa1100_wdt.c 1.2 -> 1.3
# drivers/usb/core/hcd-pci.c 1.17 -> 1.18
# include/asm-mips64/div64.h 1.4 -> (deleted)
# drivers/atm/idt77252.c 1.17 -> 1.18
# include/asm-mips64/sn/sn0/arch.h 1.3 -> 1.4 include/asm-mips/sn/sn0/arch.h (moved)
# arch/mips/Kconfig 1.14 -> 1.15
# arch/mips/mm/c-sb1.c 1.1 -> 1.2
# drivers/video/aty/aty128fb.c 1.38 -> 1.39
# drivers/media/video/bttv-cards.c 1.17 -> 1.18
# drivers/scsi/AM53C974.c 1.16 -> 1.17
# net/ipv4/ipmr.c 1.27 -> 1.28
# arch/mips/defconfig-pb1500 1.1 -> 1.2
# arch/mips/sibyte/sb1250/smp.c 1.1 -> 1.2
# include/asm-mips64/sn/klkernvars.h 1.2 -> 1.3 include/asm-mips/sn/klkernvars.h (moved)
# include/asm-mips/shmbuf.h 1.3 -> 1.4
# arch/mips/sibyte/swarm/setup.c 1.2 -> 1.3
# include/asm-mips/sibyte/sb1250_l2c.h 1.1 -> 1.2
# arch/mips/sgi-ip22/ip22-int.c 1.1 -> 1.2
# include/asm-mips64/inst.h 1.3 -> (deleted)
# arch/mips/mm/ioremap.c 1.3 -> 1.4
# include/asm-mips/namei.h 1.2 -> 1.3
# drivers/mtd/maps/elan-104nc.c 1.7 -> 1.8
# arch/um/Kconfig 1.11 -> 1.12
# drivers/char/agp/intel-agp.c 1.44 -> 1.46
# sound/drivers/opl4/opl4_local.h 1.1 -> 1.2
# drivers/video/imsttfb.c 1.27 -> 1.28
# drivers/net/sk98lin/h/skerror.h 1.1 -> 1.2
# arch/mips/pci/pci-ocelot-g.c 1.1 -> 1.2
# arch/mips/sgi-ip22/ip22-berr.c 1.1 -> 1.2
# sound/drivers/opl4/opl4_synth.c 1.1 -> 1.2
# arch/mips/gt64120/common/pci.c 1.6 -> (deleted)
# arch/mips/ite-boards/generic/reset.c 1.2 -> 1.3
# sound/oss/soundcard.c 1.19 -> 1.21
# arch/mips/galileo-boards/ev96100/time.c 1.1 -> 1.2
# arch/mips64/defconfig-ip27 1.8 -> (deleted)
# arch/mips64/kernel/ioctl32.c 1.12 -> 1.13 arch/mips/kernel/ioctl32.c (moved)
# arch/mips64/mm/cex-sb1.S 1.1 -> (deleted)
# drivers/ide/pci/sis5513.c 1.16 -> 1.17
# drivers/i2c/busses/i2c-i801.c 1.10 -> 1.12
# drivers/media/video/zr36120.c 1.19 -> 1.20
# include/asm-h8300/unistd.h 1.1 -> 1.2
# drivers/media/video/bttv-risc.c 1.5 -> 1.6
# sound/core/oss/rate.c 1.3 -> 1.4
# fs/sysfs/bin.c 1.9 -> 1.10
# include/asm-mips64/processor.h 1.9 -> (deleted)
# arch/mips/kernel/branch.c 1.4 -> 1.5
# include/asm-mips/mipsregs.h 1.6 -> 1.7
# drivers/usb/core/devio.c 1.50 -> 1.52
# arch/arm/def-configs/pfs168_mqtft 1.6 -> 1.7
# arch/sparc64/lib/dec_and_lock.S 1.3 -> 1.4
# include/asm-mips64/cacheops.h 1.1 -> (deleted)
# drivers/usb/input/xpad.c 1.16 -> 1.17
# arch/alpha/defconfig 1.20 -> 1.22
# net/ipv6/ipcomp6.c 1.5 -> 1.6
# include/asm-mips64/semaphore.h 1.4 -> (deleted)
# drivers/video/tridentfb.c 1.8 -> 1.9
# arch/h8300/kernel/signal.c 1.1 -> 1.2
# net/xfrm/xfrm_policy.c 1.40 -> 1.41
# net/core/dev.c 1.90 -> 1.91
# arch/x86_64/kernel/io_apic.c 1.10 -> 1.11
# arch/mips/sgi-ip32/ip32-irq.c 1.2 -> 1.3
# include/asm-mips/gdb-stub.h 1.2 -> 1.3
# net/ipv6/Kconfig 1.6 -> 1.7
# include/linux/igmp.h 1.6 -> 1.7
# arch/mips/gt64120/momenco_ocelot/setup.c 1.3 -> 1.4
# arch/arm/def-configs/adi_evb 1.6 -> 1.7
# drivers/usb/core/usb.c 1.128 -> 1.132
# fs/jfs/jfs_logmgr.c 1.49 -> 1.50
# arch/mips64/kernel/signal32.c 1.10 -> 1.11 arch/mips/kernel/signal32.c (moved)
# drivers/usb/misc/brlvger.c 1.19 -> 1.20
# drivers/i2c/busses/i2c-ali15x3.c 1.9 -> 1.12
# include/asm-mips64/sn/nmi.h 1.3 -> 1.4 include/asm-mips/sn/nmi.h (moved)
# drivers/net/r8169.c 1.11 -> 1.13
# net/ipv4/netfilter/ipt_esp.c 1.6 -> 1.7
# arch/arm/def-configs/pangolin 1.9 -> 1.10
# include/asm-mips64/namei.h 1.2 -> (deleted)
# drivers/net/sk98lin/h/skdebug.h 1.1 -> 1.2
# arch/mips/lib/tinycon.c 1.2 -> (deleted)
# sound/ppc/awacs.c 1.12 -> 1.13
# drivers/scsi/aha1542.c 1.30 -> 1.31
# fs/xfs/linux/xfs_iomap.c 1.10 -> 1.12
# drivers/ide/pci/generic.c 1.8 -> 1.9
# arch/mips/kernel/r4k_fpu.S 1.3 -> 1.4
# drivers/pci/pci.ids 1.48 -> 1.49
# arch/x86_64/ia32/ia32_ioctl.c 1.29 -> 1.30
# include/asm-mips/jmr3927/jmr3927.h 1.1 -> 1.2
# arch/mips/defconfig-sb1250-swarm 1.1 -> 1.2
# arch/mips/lib/dump_tlb.c 1.3 -> 1.4 arch/mips/lib-32/dump_tlb.c (moved)
# sound/pci/emu10k1/emufx.c 1.22 -> 1.24
# arch/mips/ite-boards/generic/pmon_prom.c 1.2 -> 1.3
# include/asm-mips64/gcc/sgidefs.h 1.1 -> (deleted)
# include/asm-mips/siginfo.h 1.5 -> 1.6
# sound/pci/vx222/vx222.c 1.1 -> 1.2
# fs/xfs/linux/xfs_file.c 1.14 -> 1.16
# include/linux/binfmts.h 1.8 -> 1.9
# include/asm-mips64/ucontext.h 1.2 -> (deleted)
# drivers/net/sk98lin/h/skaddr.h 1.2 -> 1.3
# include/asm-mips/pgalloc.h 1.6 -> 1.7
# Documentation/DMA-mapping.txt 1.15 -> 1.16
# drivers/net/sk98lin/skgeinit.c 1.6 -> 1.7
# Documentation/cdrom/cm206 1.1 -> 1.2
# include/asm-mips/sfp-machine.h 1.1 -> (deleted)
# sound/oss/cmpci.c 1.25 -> 1.26
# include/asm-mips64/mips-boards/generic.h 1.2 -> (deleted)
# include/asm-mips64/sn/addrs.h 1.2 -> 1.3 include/asm-mips/sn/addrs.h (moved)
# arch/mips64/mm/loadmmu.c 1.4 -> (deleted)
# include/asm-mips64/sigcontext.h 1.3 -> (deleted)
# net/irda/irlan/irlan_common.c 1.12 -> 1.13
# include/sound/ac97_codec.h 1.19 -> 1.20
# arch/h8300/lib/memset.S 1.1 -> 1.2
# arch/arm/Kconfig 1.24.1.2 -> 1.28
# arch/sh/defconfig 1.6 -> 1.7
# include/asm-mips64/sibyte/sb1250_ldt.h 1.1 -> (deleted)
# include/asm-mips64/reboot.h 1.1 -> (deleted)
# include/asm-h8300/target_time.h 1.1 -> 1.2
# drivers/usb/media/pwc-uncompress.c 1.6 -> 1.7
# arch/mips64/kernel/r4k_cache.S 1.2 -> (deleted)
# drivers/usb/net/usbnet.c 1.59 -> 1.64
# sound/oss/swarm_cs4297a.c 1.1 -> 1.2
# include/asm-mips64/sibyte/sb1250_dma.h 1.1 -> (deleted)
# include/asm-mips64/sn/klconfig.h 1.4 -> 1.5 include/asm-mips/sn/klconfig.h (moved)
# fs/xfs/xfs_log_recover.c 1.26 -> 1.28
# drivers/input/serio/Kconfig 1.8 -> 1.9
# arch/i386/kernel/nmi.c 1.22 -> 1.23
# arch/mips/ite-boards/generic/irq.c 1.7 -> 1.8
# include/asm-mips64/dma-mapping.h 1.1 -> (deleted)
# drivers/atm/zatm.h 1.1 -> 1.3
# arch/ppc64/Kconfig 1.22.1.1 -> 1.25
# arch/mips/defconfig-workpad 1.1 -> 1.2
# drivers/mtd/maps/scb2_flash.c 1.1 -> 1.3
# fs/xfs/support/spin.h 1.3 -> 1.4
# sound/isa/ad1848/ad1848.c 1.5 -> 1.6
# arch/mips64/lib/ide-std.c 1.4 -> (deleted)
# include/asm-mips64/ipcbuf.h 1.2 -> (deleted)
# drivers/isdn/hardware/avm/c4.c 1.35 -> 1.36
# drivers/net/tg3.c 1.75 -> 1.79
# usr/Makefile 1.6.1.4 -> 1.9
# include/asm-mips64/percpu.h 1.1 -> (deleted)
# include/asm-mips64/shmiq.h 1.4 -> (deleted)
# include/linux/mmzone.h 1.40 -> 1.41
# arch/mips/sibyte/sb1250/time.c 1.1 -> 1.2
# arch/mips64/mm/tlb-dbg-r4k.c 1.1 -> 1.2 arch/mips/mm-64/tlb-dbg-r4k.c (moved)
# Documentation/DocBook/sis900.tmpl 1.3 -> 1.4
# Documentation/cpu-freq/governors.txt 1.2 -> 1.3
# arch/mips64/kernel/time.c 1.2 -> (deleted)
# net/ipv6/af_inet6.c 1.52 -> 1.54
# arch/mips/pci/common.c 1.1 -> 1.3
# arch/sh/configs/defconfig-dreamcast 1.1 -> 1.2
# include/asm-mips/sibyte/sb1250_syncser.h 1.1 -> 1.2
# include/asm-mips64/wbflush.h 1.1 -> (deleted)
# arch/mips/gt64120/momenco_ocelot/pci.c 1.1 -> (deleted)
# net/xfrm/xfrm_user.c 1.32 -> 1.35
# arch/mips/lasat/prom.c 1.1 -> 1.2
# arch/mips64/mm/c-sb1.c 1.1 -> (deleted)
# arch/mips64/mm/fault.c 1.9 -> (deleted)
# include/asm-mips64/msgbuf.h 1.2 -> (deleted)
# drivers/net/amd8111e.c 1.6 -> 1.8
# drivers/ide/pci/hpt366.c 1.19 -> 1.20
# drivers/input/gameport/fm801-gp.c 1.4 -> 1.6
# arch/mips64/lib/csum_partial.S 1.2 -> 1.3 arch/mips/lib-64/csum_partial.S (moved)
# drivers/net/sk98lin/h/skversion.h 1.1 -> 1.2
# arch/ppc/platforms/pmac_cpufreq.c 1.5 -> 1.6
# fs/buffer.c 1.207 -> 1.210
# fs/direct-io.c 1.31 -> 1.33
# fs/Makefile 1.57 -> 1.58
# net/ipv4/esp4.c 1.32 -> 1.33
# drivers/usb/core/hcd.c 1.68 -> 1.70
# arch/arm26/Kconfig 1.2.1.3 -> 1.6
# arch/ppc/syslib/open_pic.c 1.26 -> 1.27
# arch/mips64/kernel/irq_cpu.c 1.1 -> (deleted)
# drivers/media/video/meye.c 1.17 -> 1.18
# drivers/char/epca.c 1.29 -> 1.30
# drivers/net/wan/cycx_drv.c 1.7 -> 1.8
# arch/ppc64/kernel/open_pic.c 1.13 -> 1.14
# drivers/net/sk98lin/skvpd.c 1.7 -> 1.8
# include/asm-h8300/io.h 1.1 -> 1.2
# include/linux/ext3_fs.h 1.29 -> 1.30
# arch/mips64/defconfig-ip22 1.8 -> (deleted)
# arch/mips64/kernel/binfmt_elfn32.c 1.1 -> 1.2 arch/mips/kernel/binfmt_elfn32.c (moved)
# include/asm-mips/ptrace.h 1.4 -> 1.5
# include/linux/skbuff.h 1.27 -> 1.28
# sound/pci/azt3328.c 1.1 -> 1.2
# fs/xfs/pagebuf/page_buf.h 1.28 -> 1.31
# arch/m68k/Kconfig 1.16.1.2 -> 1.20
# drivers/char/agp/i460-agp.c 1.26 -> 1.27
# arch/sh/kernel/cpu/sh4/pci-st40.c 1.1 -> 1.2
# drivers/net/tulip/tulip_core.c 1.44 -> 1.46
# arch/mips/jmr3927/common/prom.c 1.1 -> 1.2
# arch/mips64/lib/floppy-std.c 1.2 -> (deleted)
# include/asm-mips/byteorder.h 1.2 -> 1.3
# drivers/char/tty_io.c 1.111 -> 1.113
# drivers/isdn/hardware/avm/t1isa.c 1.28 -> 1.29
# drivers/input/gameport/emu10k1-gp.c 1.9 -> 1.11
# include/asm-mips/sni.h 1.2 -> 1.3
# net/ipv6/ndisc.c 1.53 -> 1.54
# drivers/char/pcxx.c 1.17 -> 1.18
# fs/jfs/jfs_txnmgr.c 1.45 -> 1.46
# include/asm-mips64/dec/kn230.h 1.1 -> (deleted)
# arch/mips/lib/memcpy.S 1.3 -> 1.4
# drivers/usb/core/urb.c 1.18 -> 1.19
# include/sound/asequencer.h 1.4 -> 1.6
# sound/pci/maestro3.c 1.22 -> 1.25
# arch/h8300/vmlinux.lds.S 1.1 -> 1.2
# drivers/net/sk98lin/skaddr.c 1.3 -> 1.4
# MAINTAINERS 1.156.1.3 -> 1.160
# arch/parisc/Kconfig 1.16.1.3 -> 1.20
# fs/reiserfs/journal.c 1.70 -> 1.71
# drivers/net/sundance.c 1.46 -> 1.48
# sound/pci/intel8x0.c 1.35 -> 1.38
# drivers/pcmcia/yenta_socket.c 1.33.1.1 -> 1.35
# drivers/pcmcia/rsrc_mgr.c 1.23 -> 1.24
# drivers/ide/pci/sc1200.c 1.7 -> 1.8
# usr/gen_init_cpio.c 1.4 -> 1.5
# include/linux/cpufreq.h 1.28 -> 1.32
# drivers/pci/hotplug/cpcihp_zt5550.c 1.2 -> 1.3
# drivers/usb/media/pwc.h 1.16 -> 1.17
# Documentation/kbuild/commands.txt 1.1 -> (deleted)
# sound/oss/msnd_pinnacle.c 1.13 -> 1.14
# include/asm-mips64/rtc.h 1.1 -> (deleted)
# drivers/video/neofb.c 1.29 -> 1.30
# sound/pci/rme9652/Makefile 1.6 -> 1.7
# drivers/isdn/hardware/eicon/message.c 1.1 -> 1.2
# sound/oss/ymfpci.c 1.33 -> 1.34
# arch/mips/lasat/interrupt.c 1.1 -> 1.2
# arch/mips64/kernel/linux32.c 1.14 -> 1.15 arch/mips/kernel/linux32.c (moved)
# arch/mips64/kernel/r4k_genex.S 1.3 -> (deleted)
# arch/mips/mm/Makefile 1.8 -> 1.9
# drivers/video/i810/i810_main.h 1.6 -> 1.9
# sound/usb/usbaudio.h 1.15 -> 1.16
# drivers/telephony/phonedev.c 1.6 -> 1.7
# sound/pci/ac97/Makefile 1.12 -> 1.13
# arch/um/Makefile 1.25 -> 1.26
# arch/alpha/Makefile 1.24.1.1 -> 1.26
# drivers/char/watchdog/acquirewdt.c 1.22 -> 1.23
# drivers/scsi/gdth.c 1.31 -> 1.33
# fs/xfs/linux/xfs_globals.c 1.16 -> 1.17
# include/asm-mips64/dec/kn03.h 1.1 -> (deleted)
# arch/mips/mm/sc-ip22.c 1.1 -> 1.2
# sound/core/timer.c 1.18 -> 1.20
# include/sound/cs8427.h 1.2 -> 1.3
# include/asm-h8300/types.h 1.1 -> 1.2
# include/asm-mips/dma-mapping.h 1.1 -> 1.2
# fs/lockd/svc.c 1.23 -> 1.24
# include/linux/time.h 1.18 -> 1.19
# net/sched/sch_htb.c 1.13 -> 1.14
# include/asm-mips/posix_types.h 1.3 -> 1.4
# drivers/video/sstfb.c 1.26 -> 1.27
# Documentation/kbuild/random.txt 1.1 -> (deleted)
# drivers/net/sk98lin/skrlmt.c 1.2 -> 1.3
# net/ipv6/esp6.c 1.19 -> 1.21
# drivers/char/watchdog/wdt_pci.c 1.23 -> 1.26
# arch/sparc64/kernel/sys_sparc32.c 1.77 -> 1.78
# drivers/net/typhoon.c 1.4 -> 1.6
# drivers/net/tokenring/ibmtr.c 1.15 -> 1.16
# net/ipv4/netfilter/ipt_ah.c 1.6 -> 1.7
# fs/xfs/support/mrlock.h 1.3 -> 1.4
# drivers/char/drm/r128_drm.h 1.8 -> 1.9
# drivers/usb/class/cdc-acm.c 1.47 -> 1.48
# arch/mips/kernel/pci-dma.c 1.3 -> 1.4
# include/asm-mips/bugs.h 1.3 -> 1.4
# sound/pci/trident/trident_main.c 1.20 -> 1.21
# include/asm-mips/it8172/it8172_int.h 1.2 -> 1.3
# fs/vfat/namei.c 1.38 -> 1.41
# drivers/scsi/st.c 1.67 -> 1.68
# drivers/usb/host/hc_sl811_rh.c 1.5 -> 1.6
# drivers/net/sk98lin/h/skgedrv.h 1.1 -> 1.2
# net/sunrpc/svcauth_des.c 1.1 -> 1.2
# arch/sh/Makefile 1.16.1.1 -> 1.18
# drivers/media/common/saa7146_video.c 1.6 -> 1.7
# include/asm-mips64/sibyte/sb1250_smbus.h 1.1 -> (deleted)
# arch/mips64/kernel/traps.c 1.7 -> (deleted)
# include/asm-mips/statfs.h 1.2 -> 1.3
# sound/ppc/pmac.h 1.5 -> 1.6
# include/asm-mips64/byteorder.h 1.2 -> (deleted)
# drivers/atm/atmtcp.c 1.12 -> 1.13
# drivers/net/eepro100.c 1.63 -> 1.65
# arch/mips/sgi-ip32/ip32-berr.c 1.2 -> 1.3
# include/asm-mips64/vga.h 1.1 -> (deleted)
# drivers/isdn/i4l/isdn_ppp.c 1.75 -> 1.76
# drivers/char/agp/ali-agp.c 1.25 -> 1.26
# Documentation/networking/sk98lin.txt 1.4 -> 1.5
# drivers/media/dvb/ttpci/ttpci-eeprom.c 1.1 -> 1.2
# include/asm-mips64/compat.h 1.2 -> 1.3 include/asm-mips/compat.h (moved)
# drivers/usb/host/ehci-hcd.c 1.53 -> 1.57
# include/sound/asound.h 1.15 -> 1.16
# arch/ppc64/kernel/eeh.c 1.10 -> 1.11
# arch/um/defconfig 1.7 -> 1.8
# include/linux/videodev2.h 1.2 -> 1.3
# include/asm-mips/it8172/it8172.h 1.2 -> 1.3
# include/asm-mips64/branch.h 1.3 -> (deleted)
# include/asm-mips64/mc146818rtc.h 1.3 -> (deleted)
# arch/mips/kernel/head.S 1.4 -> 1.5
# kernel/resource.c 1.12 -> 1.13
# arch/x86_64/kernel/head.S 1.12 -> 1.13
# include/asm-h8300/checksum.h 1.1 -> 1.2
# drivers/net/sk98lin/h/skgepnm2.h 1.3 -> 1.4
# drivers/char/watchdog/Kconfig 1.8 -> 1.11
# drivers/char/watchdog/scx200_wdt.c 1.5 -> 1.6
# include/asm-mips64/mips-boards/io.h 1.1 -> (deleted)
# Documentation/networking/DLINK.txt 1.1 -> 1.2
# Makefile 1.411.2.7 -> 1.419
# arch/mips64/kernel/module.c 1.1 -> 1.2 arch/mips/kernel/module-elf64.c (moved)
# drivers/parisc/superio.c 1.4 -> 1.6
# arch/ppc/configs/IVMS8_defconfig 1.15 -> 1.16
# sound/pci/cmipci.c 1.24 -> 1.26
# fs/ext3/inode.c 1.78 -> 1.81
# arch/mips/baget/irq.c 1.9 -> 1.10
# include/asm-mips64/unaligned.h 1.3 -> (deleted)
# include/asm-mips64/war.h 1.1 -> (deleted)
# arch/mips/lib/strncpy_user.S 1.2 -> 1.3 arch/mips/lib-32/strncpy_user.S (moved)
# include/asm-mips/reg.h 1.2 -> (deleted)
# include/asm-mips64/ds1286.h 1.3 -> (deleted)
# drivers/char/agp/amd-k8-agp.c 1.51 -> 1.52
# net/ipv4/netfilter/ip_nat_ftp.c 1.10 -> 1.11
# arch/mips/defconfig-ev96100 1.1 -> 1.2
# drivers/char/drm/sis_mm.c 1.5 -> 1.6
# include/asm-mips64/sgi/sgi.h 1.2 -> (deleted)
# arch/sparc64/kernel/pci_schizo.c 1.28 -> 1.30
# arch/mips64/mm/init.c 1.10 -> (deleted)
# arch/i386/defconfig 1.96 -> 1.99
# Documentation/cdrom/sbpcd 1.2 -> 1.3
# arch/mips/jazz/setup.c 1.2 -> 1.3
# net/sunrpc/xprt.c 1.63 -> 1.65
# include/asm-x86_64/unistd.h 1.15 -> 1.16
# sound/core/sound.c 1.30 -> 1.31
# drivers/net/wireless/orinoco_pci.c 1.6 -> 1.8
# arch/arm/common/sa1111-pcipool.c 1.6 -> 1.7
# arch/arm/def-configs/huw_webpanel 1.4 -> 1.5
# net/ipv6/ah6.c 1.20 -> 1.21
# arch/x86_64/defconfig 1.22 -> 1.24
# arch/mips/vr41xx/common/vrc4173.c 1.1 -> 1.2
# drivers/char/mxser.c 1.27 -> 1.28
# drivers/i2c/i2c-keywest.c 1.2 -> 1.3
# sound/core/pcm_memory.c 1.10 -> 1.11
# scripts/genksyms/lex.l 1.2 -> 1.3
# Documentation/arm/SA1100/Pangolin 1.3 -> 1.4
# arch/sh/configs/defconfig-cqreek 1.1 -> 1.2
# include/asm-mips/wbflush.h 1.3 -> 1.4
# drivers/video/matrox/matroxfb_base.c 1.37 -> 1.39
# sound/pci/es1938.c 1.19 -> 1.21
# sound/core/seq/seq_ports.h 1.2 -> 1.3
# arch/arm/def-configs/adsbitsy 1.8 -> 1.9
# include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h 1.1 -> 1.2
# drivers/char/watchdog/sbc60xxwdt.c 1.25 -> 1.26
# include/asm-mips/scatterlist.h 1.4 -> 1.5
# fs/ntfs/super.c 1.132 -> 1.134
# arch/i386/pci/fixup.c 1.14 -> 1.15
# drivers/char/rocket.c 1.30 -> 1.31
# security/Kconfig 1.6 -> 1.7
# arch/m68knommu/Kconfig 1.19 -> 1.20
# arch/mips/pci/pci-ocelot-c.c 1.1 -> 1.2
# include/asm-h8300/errno.h 1.1 -> 1.2
# include/asm-x86_64/topology.h 1.2 -> 1.3
# include/asm-x86_64/percpu.h 1.7 -> 1.8
# include/linux/atm_zatm.h 1.1 -> 1.2
# arch/m68knommu/Makefile 1.7.1.1 -> 1.9
# include/asm-mips64/dec/ioasic.h 1.1 -> (deleted)
# include/asm-mips64/statfs.h 1.3 -> (deleted)
# include/asm-mips/pci.h 1.11 -> 1.12
# drivers/net/wan/farsync.c 1.15 -> 1.16
# include/asm-mips64/socket.h 1.5 -> (deleted)
# fs/reiserfs/stree.c 1.36 -> 1.37
# include/asm-mips/sgialib.h 1.3 -> 1.4
# arch/mips64/kernel/syscall.c 1.8 -> (deleted)
# include/asm-mips/div64.h 1.4 -> 1.5
# include/linux/ipv6.h 1.9 -> 1.10
# sound/core/seq/seq_ports.c 1.10 -> 1.11
# drivers/media/video/cpia.c 1.26 -> 1.27
# drivers/net/fealnx.c 1.26 -> 1.28
# sound/pci/es1968.c 1.23 -> 1.25
# drivers/parisc/lba_pci.c 1.6 -> 1.7
# include/sound/pcm_oss.h 1.2 -> 1.3
# include/asm-mips/cachectl.h 1.2 -> 1.3
# CREDITS 1.85.2.1 -> 1.91
# fs/jfs/jfs_dtree.c 1.23 -> 1.24
# arch/mips64/lib/memset.S 1.3 -> 1.4 arch/mips/lib-64/memset.S (moved)
# arch/mips/lib/floppy-std.c 1.2 -> 1.3
# drivers/video/riva/fbdev.c 1.47 -> 1.48
# drivers/isdn/tpam/tpam_main.c 1.10 -> 1.11
# sound/pci/sonicvibes.c 1.17 -> 1.19
# include/asm-mips64/sn/sn0/hub.h 1.2 -> 1.3 include/asm-mips/sn/sn0/hub.h (moved)
# fs/nfsd/nfs4state.c 1.10 -> 1.11
# arch/mips/ite-boards/generic/it8172_pci.c 1.6 -> (deleted)
# security/Makefile 1.5 -> 1.6
# arch/mips/ite-boards/qed-4n-s01b/Makefile 1.6 -> 1.7
# arch/mips64/kernel/smp.c 1.9 -> (deleted)
# arch/i386/kernel/cpu/cpufreq/longrun.c 1.14 -> 1.16
# drivers/ide/pci/triflex.h 1.2 -> 1.3
# arch/h8300/platform/h8300h/aki3068net/ram.ld 1.1 -> 1.2
# drivers/usb/host/ohci-pci.c 1.12 -> 1.13
# drivers/net/sk98lin/skgepnmi.c 1.5 -> 1.6
# arch/mips64/lib/rtc-std.c 1.3 -> (deleted)
# net/xfrm/xfrm_state.c 1.34 -> 1.35
# sound/pci/emu10k1/irq.c 1.7 -> 1.8
# arch/arm/def-configs/pleb 1.6 -> 1.7
# include/linux/quota.h 1.23 -> 1.24
# include/asm-mips/sibyte/sb1250_scd.h 1.1 -> 1.2
# arch/mips/pci/pci-lasat.c 1.1 -> 1.2
# fs/xfs/xfs_inode.h 1.17 -> 1.18
# sound/usb/usbaudio.c 1.39 -> 1.43
# drivers/i2c/busses/i2c-viapro.c 1.3 -> 1.5
# include/asm-mips64/sn/sn_private.h 1.1 -> 1.2 include/asm-mips/sn/sn_private.h (moved)
# fs/quota_v1.c 1.9 -> 1.10
# include/asm-mips64/r4kcache.h 1.3 -> (deleted)
# drivers/media/video/saa7134/saa7134.h 1.5 -> 1.6
# drivers/video/logo/Makefile 1.2 -> 1.3
# sound/synth/emux/soundfont.c 1.4 -> 1.5
# drivers/net/ppp_async.c 1.12 -> 1.13
# drivers/ide/pci/pdc202xx_new.c 1.16 -> 1.17
# drivers/net/eepro.c 1.18 -> 1.19
# arch/mips64/lib/floppy-no.c 1.2 -> (deleted)
# net/ipv4/netfilter/ipt_helper.c 1.5 -> 1.6
# drivers/media/dvb/b2c2/skystar2.c 1.2 -> 1.3
# arch/mips64/kernel/scall_o32.S 1.9 -> (deleted)
# include/asm-mips64/signal.h 1.5 -> (deleted)
# fs/xfs/xfs_trans.h 1.6 -> 1.7
# init/do_mounts_devfs.c 1.1 -> 1.2
# sound/oss/nec_vrc5477.c 1.15 -> 1.16
# include/asm-mips/sibyte/sb1250_defs.h 1.1 -> 1.2
# arch/mips64/lib/promlib.c 1.1 -> (deleted)
# include/asm-i386/pgtable.h 1.36 -> 1.37
# Documentation/kbuild/makefiles.txt 1.9 -> 1.10
# include/asm-h8300/tlb.h 1.1 -> 1.2
# drivers/char/watchdog/alim7101_wdt.c 1.5 -> 1.6
# drivers/net/sk98lin/h/skgeinit.h 1.2 -> 1.3
# drivers/net/sk98lin/h/skgei2c.h 1.1 -> 1.2
# drivers/char/stallion.c 1.32 -> 1.33
# drivers/usb/class/bluetty.c 1.47 -> 1.48
# sound/oss/es1371.c 1.29 -> 1.30
# arch/mips64/defconfig 1.10 -> (deleted)
# drivers/media/video/saa5249.c 1.16 -> 1.17
# drivers/isdn/hisax/hisax_fcpcipnp.c 1.18 -> 1.20
# include/sound/info.h 1.9 -> 1.10
# arch/mips64/kernel/reset.c 1.1 -> (deleted)
# include/asm-mips64/ioctls.h 1.6 -> (deleted)
# net/ipv4/xfrm4_policy.c 1.5 -> 1.6
# arch/arm/def-configs/brutus 1.5 -> 1.6
# arch/mips/ite-boards/generic/int-handler.S 1.1 -> 1.2
# arch/i386/mm/init.c 1.52 -> 1.53
# arch/mips/sibyte/cfe/console.c 1.1 -> 1.2
# drivers/usb/input/aiptek.c 1.17 -> 1.18
# drivers/char/drm/i830_irq.c 1.2 -> 1.3
# fs/partitions/osf.c 1.4 -> 1.5
# arch/mips/sibyte/sb1250/prom.c 1.2 -> 1.3
# sound/oss/trident.c 1.43 -> 1.44
# sound/oss/i810_audio.c 1.41 -> 1.42
# drivers/serial/8250_pci.c 1.23 -> 1.25
# arch/mips64/kernel/cpu-probe.c 1.1 -> 1.2 arch/mips/kernel/cpu-bugs64.c (moved)
# drivers/media/video/bttv-driver.c 1.28 -> 1.30
# drivers/ide/pci/slc90e66.c 1.11 -> 1.12
# Documentation/cpu-freq/core.txt 1.4 -> 1.5
# include/asm-mips64/termios.h 1.5 -> (deleted)
# drivers/block/DAC960.c 1.61 -> 1.62
# arch/alpha/Kconfig 1.19.1.3 -> 1.23
# net/ipv4/Kconfig 1.9 -> 1.10
# fs/jfs/namei.c 1.28 -> 1.29
# include/asm-mips64/ip32/crime.h 1.1 -> 1.2 include/asm-mips/ip32/crime.h (moved)
# arch/mips64/lib/dump_tlb.c 1.4 -> 1.5 arch/mips/lib-64/dump_tlb.c (moved)
# arch/mips/kernel/scall_o32.S 1.5 -> (deleted)
# arch/mips/kernel/signal.c 1.12 -> 1.13
# drivers/usb/media/pwc-if.c 1.36 -> 1.38
# fs/xfs/linux/xfs_ioctl.c 1.15 -> 1.16
# drivers/ide/pci/pdcadma.c 1.11 -> 1.12
# net/ipv4/netfilter/ip_conntrack_irc.c 1.13 -> 1.14
# net/atm/signaling.c 1.18 -> 1.19
# sound/oss/hal2.c 1.1 -> 1.2
# drivers/usb/storage/unusual_devs.h 1.49 -> 1.50
# drivers/i2c/i2c-dev.c 1.31 -> 1.32
# drivers/net/tokenring/olympic.c 1.22 -> 1.23
# sound/core/oss/pcm_plugin.h 1.2 -> 1.3
# include/asm-mips64/sn/agent.h 1.1 -> 1.2 include/asm-mips/sn/agent.h (moved)
# sound/oss/harmony.c 1.2 -> 1.3
# mm/slab.c 1.95 -> 1.96
# net/ipv4/netfilter/arp_tables.c 1.9 -> 1.10
# net/ipv4/netfilter/ip_conntrack_ftp.c 1.15 -> 1.16
# arch/h8300/Kconfig 1.5 -> 1.6
# drivers/net/tulip/xircom_cb.c 1.14 -> 1.15
# arch/h8300/platform/h8300h/Rules.make 1.1 -> (deleted)
# Documentation/networking/00-INDEX 1.4 -> 1.5
# arch/arm/def-configs/badge4 1.8 -> 1.9
# include/asm-mips/socket.h 1.5 -> 1.6
# arch/mips/gt64120/common/gt_irq.c 1.1 -> 1.2
# drivers/media/dvb/ttpci/budget-av.c 1.5 -> 1.6
# drivers/usb/serial/ftdi_sio.c 1.45 -> 1.47
# arch/sh/kernel/cpu/sh4/pci-sh7751.c 1.2 -> 1.3
# include/asm-mips/sibyte/sb1250.h 1.1 -> 1.2
# arch/mips64/kernel/ptrace.c 1.8 -> (deleted)
# arch/mips/kernel/offset.c 1.1 -> 1.2
# arch/mips/kernel/syscall.c 1.5 -> 1.6
# arch/mips/mm/cerr-sb1.c 1.1 -> 1.2
# include/asm-mips/cacheflush.h 1.1 -> 1.2
# fs/xfs/xfsidbg.c 1.28 -> 1.29
# drivers/ide/pci/it8172.c 1.9 -> 1.10
# scripts/genksyms/lex.c_shipped 1.3 -> 1.4
# drivers/net/skfp/smt.c 1.2 -> 1.3
# drivers/input/gameport/vortex.c 1.4 -> 1.6
# include/linux/msdos_fs.h 1.31 -> 1.32
# arch/x86_64/Kconfig 1.24.1.2 -> 1.28
# include/asm-mips64/sibyte/board.h 1.1 -> (deleted)
# include/asm-mips64/sibyte/sb1250_l2c.h 1.1 -> (deleted)
# sound/pci/fm801.c 1.18 -> 1.19
# arch/mips/ite-boards/generic/dbg_io.c 1.2 -> 1.3
# sound/oss/ali5455.c 1.1 -> 1.2
# include/asm-mips/sibyte/sb1250_mc.h 1.1 -> 1.2
# include/asm-mips64/keyboard.h 1.1 -> (deleted)
# include/asm-mips64/sembuf.h 1.2 -> (deleted)
# drivers/net/rcpci45.c 1.23 -> 1.24
# arch/sh/kernel/pci.c 1.1 -> 1.2
# arch/mips64/lib/csum_partial_copy.c 1.5 -> (deleted)
# include/asm-mips/fcntl.h 1.3 -> 1.4
# sound/isa/sb/sb16.c 1.17 -> 1.19
# crypto/tcrypt.c 1.23 -> 1.24
# arch/h8300/platform/h8300h/aki3068net/crt0_ram.S 1.1 -> 1.2
# include/asm-mips64/parport.h 1.2 -> (deleted)
# include/asm-mips64/resource.h 1.2 -> (deleted)
# include/asm-mips64/fpregdef.h 1.1 -> (deleted)
# drivers/char/watchdog/wdt977.c 1.17 -> 1.18
# arch/cris/arch-v10/lib/old_checksum.c 1.6 -> 1.7
# drivers/usb/host/ehci-dbg.c 1.21 -> 1.22
# drivers/net/tulip/de2104x.c 1.20 -> 1.22
# arch/mips64/kernel/offset.c 1.1 -> (deleted)
# drivers/usb/host/ehci-q.c 1.50 -> 1.51
# include/asm-mips64/ip32/machine.h 1.1 -> 1.2 include/asm-mips/ip32/machine.h (moved)
# include/asm-mips/asmmacro.h 1.3 -> 1.4
# include/asm-i386/pgtable-3level.h 1.13 -> 1.14
# drivers/ide/pci/aec62xx.c 1.12 -> 1.13
# arch/mips/gt64120/momenco_ocelot/ocelot_pld.h 1.1 -> 1.2
# Documentation/smp.txt 1.1 -> 1.2
# arch/ppc/defconfig 1.21 -> 1.22
# net/ipv4/netfilter/ip_nat_snmp_basic.c 1.9 -> 1.10
# arch/mips/dec/time.c 1.6 -> 1.7
# include/asm-mips/sibyte/sb1250_mac.h 1.1 -> 1.2
# include/asm-mips64/rmap.h 1.2 -> (deleted)
# include/asm-mips64/unistd.h 1.6 -> (deleted)
# arch/mips/ite-boards/ivr/pci_fixup.c 1.1 -> (deleted)
# net/atm/mpc.c 1.22 -> 1.23
# arch/mips/sgi-ip32/ip32-timer.c 1.2 -> 1.3
# arch/mips/sibyte/cfe/smp.c 1.1 -> 1.2
# sound/pci/ens1370.c 1.32 -> 1.34
# sound/core/rtctimer.c 1.14 -> 1.15
# drivers/net/wan/hdlc_fr.c 1.7 -> 1.8
# drivers/mtd/ftl.c 1.48 -> 1.49
# drivers/i2c/busses/i2c-amd8111.c 1.8 -> 1.10
# arch/h8300/kernel/sys_h8300.c 1.1 -> 1.2
# fs/fat/cache.c 1.23 -> 1.24
# net/ipv4/netfilter/ipt_REJECT.c 1.18 -> 1.19
# drivers/media/video/pms.c 1.12 -> 1.13
# include/asm-mips64/tlb.h 1.2 -> (deleted)
# include/linux/kdev_t.h 1.9 -> 1.10
# Documentation/arm/XScale/IOP3XX/IQ80321 1.1 -> 1.2
# Documentation/cdrom/gscd 1.1 -> 1.2
# fs/umsdos/mangle.c 1.1 -> 1.2
# include/net/xfrm.h 1.48 -> 1.50
# include/asm-mips64/mipsregs.h 1.6 -> (deleted)
# sound/pci/via82xx.c 1.33 -> 1.35
# include/asm-mips64/ng1.h 1.2 -> (deleted)
# include/asm-mips/sockios.h 1.1 -> 1.2
# include/asm-mips64/pgalloc.h 1.7 -> (deleted)
# include/linux/pfkeyv2.h 1.7 -> 1.8
# include/asm-mips64/siginfo.h 1.7 -> (deleted)
# arch/mips/kernel/r2300_switch.S 1.7 -> 1.8
# arch/mips/lib/strnlen_user.S 1.2 -> 1.3 arch/mips/lib-32/strnlen_user.S (moved)
# Documentation/computone.txt 1.4 -> 1.5
# drivers/net/sk98lin/h/xmac_ii.h 1.5 -> 1.6
# arch/sh/boards/mpc1211/pci.c 1.1 -> 1.2
# arch/mips64/lib/Makefile 1.7 -> (deleted)
# arch/mips/kernel/irixsig.c 1.8 -> 1.9
# fs/jffs/jffs_proc.c 1.3 -> 1.4
# arch/mips/sni/reset.c 1.1 -> 1.2
# fs/fat/misc.c 1.22 -> 1.24
# drivers/ieee1394/ohci1394.c 1.42 -> 1.43
# fs/jfs/jfs_acl.h 1.3 -> 1.4
# drivers/i2c/busses/i2c-ali1535.c 1.1 -> 1.3
# arch/mips/pci/ops-ocelot.c 1.1 -> 1.2
# drivers/i2c/busses/i2c-amd756.c 1.7 -> 1.9
# include/asm-mips/resource.h 1.2 -> 1.3
# drivers/net/Kconfig 1.37 -> 1.38
# drivers/usb/serial/ftdi_sio.h 1.7 -> 1.8
# arch/ppc64/kernel/pci.c 1.34 -> 1.35
# drivers/i2c/busses/Kconfig 1.12 -> 1.13
# sound/pci/emu10k1/emumixer.c 1.8 -> 1.9
# net/ipv4/ipcomp.c 1.12 -> 1.13
# arch/mips/sgi-ip32/ip32-reset.c 1.1 -> 1.2
# include/asm-mips64/sibyte/64bit.h 1.1 -> (deleted)
# include/asm-mips64/bitops.h 1.5 -> (deleted)
# sound/core/oss/pcm_oss.c 1.24 -> 1.26
# sound/pci/nm256/nm256.c 1.19 -> 1.21
# lib/string.c 1.8 -> 1.10
# drivers/char/drm/Kconfig 1.6 -> 1.8
# drivers/net/sk98lin/sklm80.c 1.1 -> 1.2
# arch/mips/mm/init.c 1.10 -> 1.11 arch/mips/mm-32/init.c (moved)
# drivers/net/tokenring/tmspci.c 1.12 -> 1.13
# drivers/usb/serial/kobil_sct.c 1.10 -> 1.11
# sound/pci/ymfpci/ymfpci_main.c 1.20 -> 1.21
# include/asm-mips64/sysmips.h 1.2 -> (deleted)
# arch/sparc64/Kconfig 1.24.1.5 -> 1.30
# include/asm-mips64/ip32/ip32_ints.h 1.1 -> 1.2 include/asm-mips/ip32/ip32_ints.h (moved)
# include/asm-mips64/timex.h 1.3 -> (deleted)
# net/ipv4/netfilter/ipt_LOG.c 1.7 -> 1.8
# include/asm-mips64/mips-boards/prom.h 1.1 -> (deleted)
# net/ipv4/ah4.c 1.25 -> 1.26
# sound/oss/maestro.c 1.32 -> 1.34
# arch/cris/mm/fault.c 1.11 -> 1.12
# arch/mips/sgi-ip32/ip32-setup.c 1.2 -> 1.3
# arch/mips/defconfig-mpc30x 1.1 -> 1.2
# arch/mips64/defconfig-sead 1.1 -> (deleted)
# arch/x86_64/Makefile 1.27.1.1 -> 1.29
# fs/jbd/commit.c 1.39 -> 1.40
# include/asm-x86_64/apic.h 1.8 -> 1.9
# include/asm-mips64/dec/interrupts.h 1.1 -> (deleted)
# include/asm-mips/sibyte/sb1250_ldt.h 1.1 -> 1.2
# drivers/net/sk98lin/h/lm80.h 1.4 -> 1.5
# drivers/ide/pci/cmd64x.c 1.10 -> 1.11
# arch/mips/jazz/reset.c 1.2 -> 1.3
# drivers/usb/host/uhci-hcd.c 1.37 -> 1.39
# drivers/net/ixgb/ixgb_ethtool.c 1.5 -> 1.6
# net/ipv6/netfilter/ip6_tables.c 1.20 -> 1.21
# include/asm-mips64/mips-boards/seadint.h 1.1 -> (deleted)
# include/asm-mips64/sibyte/sentosa.h 1.1 -> (deleted)
# include/asm-mips64/serial.h 1.3 -> (deleted)
# include/asm-mips64/softirq.h 1.1 -> (deleted)
# include/sound/hdsp.h 1.1 -> 1.2
# arch/arm/def-configs/stork 1.6 -> 1.7
# net/bridge/br_stp_if.c 1.9 -> 1.10
# sound/oss/maestro3.c 1.28 -> 1.29
# arch/x86_64/kernel/bluesmoke.c 1.13 -> 1.14
# drivers/net/tulip/dmfe.c 1.31 -> 1.33
# sound/usb/usbmidi.c 1.22 -> 1.23
# include/net/inet_ecn.h 1.3 -> 1.4
# include/asm-mips64/mv64340.h 1.1 -> (deleted)
# Documentation/arm/XScale/IOP3XX/IQ80310 1.3 -> 1.4
# drivers/net/sk98lin/skgehwt.c 1.3 -> 1.4
# fs/ext3/super.c 1.72 -> 1.73
# arch/mips64/mm/tlb-glue-r4k.S 1.1 -> 1.2 arch/mips/mm-64/tlb-glue-r4k.S (moved)
# arch/mips64/mm/tlb-r4k.c 1.1 -> (deleted)
# include/asm-mips64/mv64340_dep.h 1.1 -> (deleted)
# sound/drivers/vx/vx_core.c 1.2 -> 1.3
# fs/xfs/linux/xfs_aops.c 1.34 -> 1.43
# drivers/parport/parport_serial.c 1.10 -> 1.11
# arch/parisc/Makefile 1.20.1.1 -> 1.22
# sound/oss/kahlua.c 1.2 -> 1.3
# drivers/media/dvb/ttusb-dec/ttusb_dec.c 1.1 -> 1.2
# net/ipv4/ipvs/ip_vs_ctl.c 1.2 -> 1.3
# drivers/net/dl2k.h 1.12 -> 1.13
# sound/drivers/dummy.c 1.17 -> 1.18
# arch/ppc/configs/pmac_defconfig 1.13 -> 1.15
# include/asm-mips64/sibyte/sb1250.h 1.1 -> (deleted)
# arch/mips64/boot/Makefile 1.8 -> (deleted)
# include/asm-mips64/ipc.h 1.2 -> (deleted)
# arch/mips/math-emu/cp1emu.c 1.5 -> 1.6
# include/asm-mips/hw_irq.h 1.3 -> 1.4
# include/asm-mips/timex.h 1.2 -> 1.3
# include/asm-mips/unaligned.h 1.3 -> 1.4
# net/8021q/vlan_dev.c 1.10 -> 1.11
# sound/Kconfig 1.3 -> 1.4
# include/asm-h8300/ptrace.h 1.1 -> 1.2
# scripts/lxdialog/textbox.c 1.1 -> 1.2
# drivers/char/watchdog/ib700wdt.c 1.15 -> 1.16
# arch/cris/Kconfig 1.13 -> 1.14
# net/ax25/sysctl_net_ax25.c 1.7 -> 1.8
# arch/m68k/Makefile 1.11.1.1 -> 1.13
# drivers/serial/Kconfig 1.13 -> 1.14
# fs/xfs/linux/xfs_super.c 1.51 -> 1.56
# arch/mips/kernel/sysirix.c 1.12 -> 1.13
# include/asm-mips64/ptrace.h 1.3 -> (deleted)
# include/asm-mips64/stat.h 1.4 -> (deleted)
# net/ax25/af_ax25.c 1.25 -> 1.26
# scripts/makelst 1.4 -> 1.5
# Documentation/Changes 1.37 -> 1.39
# arch/mips/sibyte/sb1250/irq.c 1.1 -> 1.2
# include/asm-mips/sibyte/sb1250_uart.h 1.1 -> 1.2
# arch/mips/pci/pci-cobalt.c 1.1 -> 1.2
# arch/mips/mm/tlbex-r4k.S 1.1 -> 1.2 arch/mips/mm-32/tlbex-r4k.S (moved)
# sound/pci/ac97/ac97_patch.c 1.14 -> 1.16
# sound/core/oss/route.c 1.3 -> 1.4
# drivers/net/sk98lin/h/skgesirq.h 1.2 -> 1.3
# drivers/media/video/Kconfig 1.8 -> 1.10
# include/asm-mips64/delay.h 1.4 -> (deleted)
# sound/drivers/opl4/opl4_lib.c 1.1 -> 1.2
# fs/xfs/xfs_bmap.c 1.11 -> 1.13
# arch/x86_64/mm/extable.c 1.4 -> 1.5
# arch/mips/defconfig-rm200 1.5 -> 1.6
# include/asm-h8300/generic/timer_rate.h 1.1 -> 1.2
# drivers/usb/input/usbmouse.c 1.27 -> 1.28
# sound/pci/ali5451/ali5451.c 1.28 -> 1.30
# sound/pci/als4000.c 1.12 -> 1.13
# arch/h8300/lib/abs.S 1.1 -> 1.2
# drivers/char/watchdog/indydog.c 1.7 -> 1.8
# include/asm-mips64/sn/sn0/hubmd.h 1.3 -> 1.4 include/asm-mips/sn/sn0/hubmd.h (moved)
# arch/mips/lib/csum_partial.S 1.2 -> 1.3 arch/mips/lib-32/csum_partial.S (moved)
# sound/i2c/other/ak4xxx-adda.c 1.2 -> 1.3
# drivers/char/watchdog/wafer5823wdt.c 1.6 -> 1.7
# drivers/media/radio/radio-maxiradio.c 1.9 -> 1.10
# drivers/scsi/script_asm.pl 1.3 -> 1.4
# scripts/kconfig/gconf.c 1.5 -> 1.6
# arch/ppc/kernel/setup.c 1.41 -> 1.42
# include/linux/netdevice.h 1.46 -> 1.47
# include/asm-mips64/sn/launch.h 1.4 -> 1.5 include/asm-mips/sn/launch.h (moved)
# drivers/usb/Makefile 1.45 -> 1.47
# drivers/scsi/BusLogic.c 1.22 -> 1.23
# arch/ia64/Kconfig 1.32.1.5 -> 1.37
# include/asm-mips/sibyte/sb1250_genbus.h 1.1 -> 1.2
# arch/mips/kernel/r4k_switch.S 1.6 -> 1.7
# arch/mips/lib/strlen_user.S 1.2 -> 1.3 arch/mips/lib-32/strlen_user.S (moved)
# arch/mips/mm/c-r4k.c 1.1 -> 1.2
# drivers/net/wan/pc300_drv.c 1.10 -> 1.12
# drivers/char/n_r3964.c 1.12 -> 1.13
# drivers/char/rio/riotable.c 1.9 -> 1.10
# fs/xfs/linux/xfs_version.h 1.4 -> 1.5
# arch/mips/lasat/lasat_board.c 1.1 -> 1.2
# include/asm-mips64/sibyte/sb1250_uart.h 1.1 -> (deleted)
# include/asm-mips64/riscos-syscall.h 1.2 -> (deleted)
# include/asm-mips/delay.h 1.3 -> 1.4
# sound/pci/cs4281.c 1.26 -> 1.28
# arch/arm/def-configs/flexanet 1.8 -> 1.9
# arch/mips/jazz/jazzdma.c 1.2 -> 1.3
# drivers/usb/misc/usbtest.c 1.17 -> 1.19
# arch/mips/sgi-ip27/ip27-init.c 1.7 -> 1.8
# arch/mips64/kernel/proc.c 1.4 -> (deleted)
# include/asm-mips64/gdb-stub.h 1.1 -> (deleted)
# include/asm-mips64/gt64120.h 1.1 -> (deleted)
# drivers/atm/iphase.c 1.22 -> 1.23
# sound/core/sound_oss.c 1.6 -> 1.7
# sound/usb/usbmixer_maps.c 1.3 -> 1.4
# drivers/char/drm/Makefile 1.16 -> 1.17
# drivers/input/keyboard/Kconfig 1.5 -> 1.6
# include/asm-mips/hdreg.h 1.2 -> 1.3
# drivers/usb/input/usbkbd.c 1.31 -> 1.32
# sound/core/info.c 1.28 -> 1.29
# include/asm-h8300/aki3068net/ne.h 1.1 -> 1.2
# arch/i386/kernel/cpu/cpufreq/powernow-k7.h 1.1 -> 1.2
# Documentation/arm/XScale/ADIFCC/80200EVB 1.1 -> 1.2
# drivers/net/sungem.c 1.39 -> 1.41
# arch/mips64/defconfig-ip32 1.4 -> (deleted)
# drivers/usb/media/pwc-ctrl.c 1.14 -> 1.15
# drivers/net/sk98lin/h/skgehw.h 1.5 -> 1.6
# arch/mips/defconfig-tb0226 1.1 -> 1.2
# include/asm-mips64/mips-boards/atlasint.h 1.2 -> (deleted)
# net/bridge/br_netfilter.c 1.13 -> 1.14
# include/asm-mips64/dec/ioasic_addrs.h 1.1 -> (deleted)
# arch/mips64/kernel/scall_n32.S 1.1 -> (deleted)
# drivers/video/radeonfb.c 1.29 -> 1.30
# drivers/net/ns83820.c 1.26 -> 1.28
# drivers/net/wireless/orinoco_plx.c 1.11 -> 1.13
# fs/xfs/xfs_buf.h 1.12 -> 1.13
# drivers/parport/parport_pc.c 1.40 -> 1.41
# fs/xfs/xfs_inode.c 1.28 -> 1.30
# arch/mips/defconfig-ddb5476 1.10 -> 1.11
# include/asm-mips64/sgi/mc.h 1.1 -> (deleted)
# include/asm-mips64/spinlock.h 1.3 -> (deleted)
# drivers/usb/serial/io_ti.c 1.18 -> 1.19
# sound/isa/ad1848/ad1848_lib.c 1.15 -> 1.16
# drivers/scsi/dc395x.h 1.1 -> 1.2
# drivers/usb/core/usb-debug.c 1.9 -> 1.10
# drivers/net/sk98lin/skxmac2.c 1.5 -> 1.6
# include/asm-x86_64/hw_irq.h 1.5 -> 1.6
# arch/um/config.release 1.1 -> 1.2
# include/asm-mips64/bcache.h 1.3 -> (deleted)
# drivers/usb/core/devices.c 1.21 -> 1.22
# sound/pci/emu10k1/emu10k1_main.c 1.13 -> 1.14
# drivers/net/via-rhine.c 1.44 -> 1.46
# include/asm-mips64/bug.h 1.3 -> (deleted)
# include/asm-mips/ipc.h 1.2 -> 1.3
# drivers/net/tokenring/lanstreamer.c 1.19 -> 1.20
# include/asm-x86_64/processor.h 1.18 -> 1.19
# include/asm-mips64/sibyte/sb1250_genbus.h 1.1 -> (deleted)
# arch/mips64/mm/tlb-glue-sb1.S 1.1 -> 1.2 arch/mips/mm-64/tlb-glue-sb1.S (moved)
# include/asm-mips64/paccess.h 1.3 -> (deleted)
# drivers/usb/class/audio.c 1.38 -> 1.40
# sound/core/memalloc.c 1.8 -> 1.10
# sound/isa/opl3sa2.c 1.19 -> 1.20
# drivers/ide/pci/pdc202xx_old.c 1.15 -> 1.16
# include/asm-h8300/traps.h 1.1 -> 1.2
# net/8021q/Makefile 1.3 -> 1.4
# scripts/kconfig/confdata.c 1.9.1.2 -> 1.11
# include/asm-mips64/cache.h 1.4 -> (deleted)
# include/asm-mips64/time.h 1.1 -> (deleted)
# drivers/scsi/esp.c 1.31 -> 1.32
# arch/ppc/Kconfig 1.26.1.5 -> 1.30
# drivers/net/tokenring/3c359.c 1.10 -> 1.12
# include/asm-mips64/pgtable.h 1.14 -> (deleted)
# include/asm-mips/topology.h 1.2 -> 1.3
# sound/pci/cs46xx/cs46xx.c 1.14 -> 1.16
# arch/arm/def-configs/cerfpod 1.7 -> 1.8
# arch/sparc64/Makefile 1.26.1.1 -> 1.28
# include/asm-mips/lasat/serial.h 1.1 -> 1.2
# arch/mips/pci/pci-ip27.c 1.1 -> 1.2
# include/asm-mips64/types.h 1.4 -> (deleted)
# arch/mips/kernel/gdb-stub.c 1.6 -> 1.7
# net/8021q/vlanproc.h 1.1 -> 1.3
# fs/inode.c 1.99 -> 1.101
# arch/sh/Kconfig 1.16 -> 1.17
# include/asm-mips64/errno.h 1.5 -> (deleted)
# include/asm-mips/stat.h 1.4 -> 1.5
# net/decnet/Kconfig 1.2 -> 1.3
# arch/mips/gt64120/momenco_ocelot/dbg_io.c 1.1 -> 1.2
# Documentation/video4linux/CQcam.txt 1.1 -> 1.2
# arch/mips/defconfig-ip22 1.6 -> 1.7
# sound/oss/cs4281/cs4281m.c 1.24 -> 1.25
# drivers/net/sk98lin/h/skdrv2nd.h 1.4 -> 1.5
# sound/pci/rme32.c 1.17 -> 1.18
# drivers/scsi/aic7xxx/aic7770.c 1.10 -> 1.11
# arch/mips/ite-boards/qed-4n-s01b/init.c 1.2 -> 1.3
# drivers/net/sk98lin/h/skqueue.h 1.2 -> 1.3
# include/asm-mips64/sn/ioc3.h 1.1 -> 1.2 include/asm-mips/sn/ioc3.h (moved)
# sound/oss/es1370.c 1.27 -> 1.28
# include/asm-mips64/module.h 1.3 -> (deleted)
# drivers/block/umem.c 1.40 -> 1.41
# include/sound/core.h 1.25 -> 1.26
# arch/mips/ite-boards/ivr/Makefile 1.5 -> 1.6
# Documentation/scsi/cpqfc.txt 1.10 -> 1.11
# include/sound/soundfont.h 1.2 -> 1.3
# arch/i386/pci/irq.c 1.27 -> 1.28
# drivers/media/common/Kconfig 1.1 -> 1.2
# drivers/net/wan/hdlc_x25.c 1.7 -> 1.8
# include/asm-mips64/mips-boards/sead.h 1.1 -> (deleted)
# include/asm-mips/watch.h 1.3 -> 1.4
# drivers/net/hamachi.c 1.26 -> 1.28
# drivers/ide/pci/amd74xx.c 1.17 -> 1.19
# arch/h8300/platform/h8300h/h8max/ram.ld 1.1 -> 1.2
# include/linux/hdlc.h 1.9 -> 1.10
# net/ipv4/netfilter/ip_nat_irc.c 1.6 -> 1.7
# include/asm-mips64/watch.h 1.3 -> (deleted)
# arch/mips/mm/tlb-sb1.c 1.1 -> 1.2
# drivers/usb/core/file.c 1.10 -> 1.11
# include/linux/netfilter_ipv4/ip_conntrack_core.h 1.6 -> 1.7
# fs/smbfs/request.c 1.3 -> 1.4
# arch/arm/def-configs/fortunet 1.5 -> 1.6
# drivers/net/sk98lin/h/sktypes.h 1.1 -> 1.2
# drivers/mtd/maps/ich2rom.c 1.1 -> 1.2
# fs/xfs/linux/xfs_vnode.h 1.17 -> 1.18
# include/asm-mips64/string.h 1.1 -> (deleted)
# net/ipv6/xfrm6_input.c 1.12 -> 1.14
# include/asm-mips/sgi/ip22.h 1.1 -> 1.2
# arch/mips/kernel/ptrace.c 1.10 -> 1.11
# fs/xfs/xfs_log.c 1.19 -> 1.22
# Documentation/cpu-freq/cpu-drivers.txt 1.4 -> 1.5
# arch/arm/def-configs/graphicsclient 1.9 -> 1.10
# arch/mips/sni/pcimt_scache.c 1.1 -> 1.2
# drivers/char/drm/r128_drv.h 1.15 -> 1.16
# drivers/pcmcia/i82092.c 1.26 -> 1.27
# include/asm-mips64/sn/types.h 1.3 -> 1.4 include/asm-mips/sn/types.h (moved)
# include/asm-mips64/m48t35.h 1.3 -> 1.4 include/asm-mips/m48t35.h (moved)
# arch/mips/lib/csum_partial_copy.c 1.4 -> 1.5
# arch/mips/mm/c-tx39.c 1.1 -> 1.2
# include/asm-mips/sections.h 1.1 -> 1.2
# include/asm-mips/serial.h 1.3 -> 1.4
# sound/ppc/pmac.c 1.15 -> 1.16
# fs/xfs/support/sema.h 1.2 -> 1.3
# arch/v850/Makefile 1.6.1.1 -> 1.8
# arch/mips64/mm/pg-r4k.c 1.1 -> 1.2 arch/mips/mm-64/pg-r4k.c (moved)
# arch/mips64/mm/tlb-sb1.c 1.1 -> (deleted)
# fs/xfs/xfs_vnodeops.c 1.30 -> 1.33
# drivers/char/agp/amd-k7-agp.c 1.31 -> 1.32
# fs/block_dev.c 1.135 -> 1.137
# arch/mips/defconfig-decstation 1.6 -> 1.7
# include/asm-mips64/sibyte/sb1250_defs.h 1.1 -> (deleted)
# arch/mips/lib/memset.S 1.3 -> 1.4 arch/mips/lib-32/memset.S (moved)
# include/asm-mips/sigcontext.h 1.2 -> 1.3
# include/asm-mips/tlbflush.h 1.1 -> 1.2
# Documentation/sound/oss/Introduction 1.4 -> 1.5
# drivers/scsi/53c7xx.c 1.19 -> 1.20
# arch/i386/mm/pgtable.c 1.13 -> 1.14
# arch/ppc64/kernel/pSeries_pci.c 1.25 -> 1.26
# include/asm-x86_64/desc.h 1.9 -> 1.10
# scripts/mkcompile_h 1.15 -> 1.16
# drivers/net/sk98lin/h/skrlmt.h 1.2 -> 1.3
# include/asm-sparc64/pbm.h 1.7 -> 1.8
# drivers/scsi/tmscsim.c 1.22 -> 1.24
# include/asm-mips64/sibyte/swarm.h 1.1 -> (deleted)
# arch/mips/mm/pg-sb1.c 1.1 -> 1.2
# arch/mips/sni/pci.c 1.8 -> (deleted)
# fs/xfs/support/kmem.h 1.3 -> 1.4
# (new) -> 1.1 arch/mips/kernel/scall64-o32.S
# (new) -> 1.1 security/selinux/Makefile
# (new) -> 1.1 arch/mips/mm-64/Makefile
# (new) -> 1.1 include/asm-h8300/local.h
# (new) -> 1.1 drivers/net/sk98lin/skgemib.c
# (new) -> 1.1 security/selinux/ss/sidtab.h
# (new) -> 1.1 arch/mips/vr4181/osprey/dbg_io.c
# (new) -> 1.1 arch/h8300/platform/h8300h/generic/crt0_ram.S
# (new) -> 1.1 arch/h8300/platform/h8s/edosk2674/ram.ld
# (new) -> 1.1 security/selinux/ss/Makefile
# (new) -> 1.1 include/asm-mips/asmmacro-32.h
# (new) -> 1.1 arch/h8300/platform/h8s/generic/crt0_ram.S
# (new) -> 1.1 arch/mips/vr4181/common/int_handler.S
# (new) -> 1.1 arch/mips/vr4181/common/serial.c
# (new) -> 1.1 security/selinux/include/security.h
# (new) -> 1.1 arch/h8300/platform/h8s/generic/ram.ld
# (new) -> 1.1 security/selinux/ss/symtab.h
# (new) -> 1.1 include/asm-v850/sections.h
# (new) -> 1.1 include/asm-mips/pgtable-64.h
# (new) -> 1.1 security/selinux/Kconfig
# (new) -> 1.1 arch/mips/kernel/module-elf32.c
# (new) -> 1.1 arch/mips/kernel/scall32-o32.S
# (new) -> 1.1 include/asm-mips/vr4181/irq.h
# (new) -> 1.1 arch/mips/mm/pgtable-64.c
# (new) -> 1.1 arch/mips/mm-64/init.c
# (new) -> 1.1 security/selinux/include/class_to_string.h
# (new) -> 1.1 arch/mips/mm/pgtable-32.c
# (new) -> 1.3 drivers/i2c/busses/i2c-nforce2.c
# (new) -> 1.1 security/selinux/include/avc.h
# (new) -> 1.1 security/selinux/ss/services.h
# (new) -> 1.1 include/asm-mips/page-64.h
# (new) -> 1.1 security/selinux/ss/mls.h
# (new) -> 1.1 arch/mips/mm-32/Makefile
# (new) -> 1.1 security/selinux/include/av_permissions.h
# (new) -> 1.1 drivers/net/sk98lin/skdim.c
# (new) -> 1.1 arch/mips/lib-32/Makefile
# (new) -> 1.1 scripts/mkconfigs
# (new) -> 1.1 arch/mips/kernel/genex.S
# (new) -> 1.2 arch/i386/kernel/cpu/cpufreq/longhaul.h
# (new) -> 1.1 include/asm-v850/local.h
# (new) -> 1.1 Documentation/DocBook/man/Makefile
# (new) -> 1.1 sound/pci/ac97/ac97_local.h
# (new) -> 1.1 kernel/configs.c
# (new) -> 1.1 security/selinux/include/common_perm_to_string.h
# (new) -> 1.1 security/selinux/ss/avtab.h
# (new) -> 1.1 include/asm-mips/asmmacro-64.h
# (new) -> 1.1 security/selinux/ss/mls.c
# (new) -> 1.1 arch/mips/hp-lj/Makefile
# (new) -> 1.1 arch/h8300/platform/h8s/ints.c
# (new) -> 1.1 include/asm-mips/local.h
# (new) -> 1.1 security/selinux/ss/policydb.c
# (new) -> 1.1 security/selinux/include/objsec.h
# (new) -> 1.1 arch/mips/jazz/jazz-ksyms.c
# (new) -> 1.1 security/selinux/ss/ebitmap.h
# (new) -> 1.1 arch/mips/lib-64/Makefile
# (new) -> 1.1 arch/mips/kernel/ptrace32.c
# (new) -> 1.1 arch/mips/defconfig-ip32
# (new) -> 1.1 scripts/makeman
# (new) -> 1.1 include/asm-h8300/edosk2674/timer_rate.h
# (new) -> 1.1 arch/h8300/platform/h8s/edosk2674/rom.ld
# (new) -> 1.1 arch/h8300/platform/h8s/generic/timer.c
# (new) -> 1.1 arch/mips/vr4181/osprey/reset.c
# (new) -> 1.1 include/asm-ia64/sections.h
# (new) -> 1.1 security/selinux/ss/mls_types.h
# (new) -> 1.1 arch/h8300/platform/h8s/edosk2674/timer.c
# (new) -> 1.1 arch/h8300/platform/h8s/generic/Makefile
# (new) -> 1.1 include/asm-mips/pgtable-32.h
# (new) -> 1.1 arch/h8300/platform/h8s/edosk2674/crt0_rom.S
# (new) -> 1.1 arch/mips/vr4181/common/time.c
# (new) -> 1.1 security/selinux/ss/constraint.h
# (new) -> 1.1 arch/mips/hp-lj/setup.c
# (new) -> 1.1 arch/h8300/platform/h8s/edosk2674/crt0_ram.S
# (new) -> 1.1 arch/mips/hp-lj/int-handler.S
# (new) -> 1.1 scripts/binoffset.c
# (new) -> 1.1 include/asm-sparc/sections.h
# (new) -> 1.1 arch/mips/hp-lj/init.c
# (new) -> 1.1 arch/mips/kernel/signal_n32.c
# (new) -> 1.1 security/selinux/include/av_inherit.h
# (new) -> 1.1 scripts/extract-ikconfig
# (new) -> 1.1 security/selinux/ss/hashtab.h
# (new) -> 1.1 security/selinux/ss/sidtab.c
# (new) -> 1.1 arch/h8300/platform/h8s/edosk2674/Makefile
# (new) -> 1.1 security/selinux/include/flask.h
# (new) -> 1.1 security/selinux/ss/ebitmap.c
# (new) -> 1.1 arch/mips/kernel/scall64-64.S
# (new) -> 1.1 arch/mips/hp-lj/utils.h
# (new) -> 1.1 include/asm-h8300/aki3068net/timer_rate.h
# (new) -> 1.1 include/asm-mips/sim.h
# (new) -> 1.1 arch/mips/hp-lj/gdb_hook.c
# (new) -> 1.1 security/selinux/ss/avtab.c
# (new) -> 1.1 include/asm-sparc/local.h
# (new) -> 1.1 security/selinux/ss/policydb.h
# (new) -> 1.1 scripts/split-man
# (new) -> 1.1 security/selinux/avc.c
# (new) -> 1.1 arch/mips/vr4181/osprey/prom.c
# (new) -> 1.1 arch/mips/vr4181/osprey/Makefile
# (new) -> 1.1 arch/mips/kernel/reg.c
# (new) -> 1.1 arch/mips/defconfig-ip27
# (new) -> 1.1 arch/h8300/platform/h8s/entry.S
# (new) -> 1.1 security/selinux/include/av_perm_to_string.h
# (new) -> 1.1 security/selinux/include/initial_sid_to_string.h
# (new) -> 1.1 arch/h8300/platform/h8s/Makefile
# (new) -> 1.1 arch/mips/defconfig-hp-lj
# (new) -> 1.1 arch/mips/vr4181/common/Makefile
# (new) -> 1.1 security/selinux/ss/context.h
# (new) -> 1.1 include/asm-mips/page-32.h
# (new) -> 1.1 arch/mips/kernel/scall64-n32.S
# (new) -> 1.1 scripts/MAKEDEV.snd
# (new) -> 1.1 security/selinux/ss/services.c
# (new) -> 1.1 security/selinux/ss/global.h
# (new) -> 1.1 security/selinux/ss/hashtab.c
# (new) -> 1.1 security/selinux/hooks.c
# (new) -> 1.1 arch/h8300/platform/h8s/generic/crt0_rom.S
# (new) -> 1.1 include/asm-mips/hp-lj/asic.h
# (new) -> 1.1 usr/initramfs_data.S
# (new) -> 1.1 arch/mips/vr4181/common/irq.c
# (new) -> 1.1 include/asm-x86_64/local.h
# (new) -> 1.1 include/asm-h8300/h8max/timer_rate.h
# (new) -> 1.1 arch/mips/defconfig-ivr
# (new) -> 1.1 security/selinux/include/avc_ss.h
# (new) -> 1.1 Documentation/x86_64/boot-options.txt
# (new) -> 1.1 include/asm-mips/vr4181/vr4181.h
# (new) -> 1.1 security/selinux/ss/symtab.c
# (new) -> 1.1 sound/pci/ac97/ac97_proc.c
# (new) -> 1.1 arch/mips/hp-lj/utils.c
# (new) -> 1.1 arch/h8300/platform/h8s/generic/rom.ld
# (new) -> 1.1 arch/mips/hp-lj/asic.c
# (new) -> 1.1 security/selinux/selinuxfs.c
# (new) -> 1.1 arch/mips/defconfig-osprey
# (new) -> 1.1 arch/mips/hp-lj/irq.c
# (new) -> 1.1 arch/mips/vr4181/osprey/setup.c
# (new) -> 1.1 arch/mips/mm/cex-gen.S
# (new) -> 1.1 include/asm-h8300/sections.h
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/07/27 kai@germaschewski.name 1.1547.1.49
# Merge germaschewski.name:/home/kai/kernel/v2.5/linux-2.5
# into germaschewski.name:/home/kai/kernel/v2.5/linux-2.5.make
# --------------------------------------------
# 03/07/27 alan@lxorguk.ukuu.org.uk 1.1547.2.1
# [NET]: illegal --> invalid
# --------------------------------------------
# 03/07/27 herbert@gondor.apana.org.au 1.1547.2.2
# [IPSEC]: Use per-SA flag to control ECN propagation.
# --------------------------------------------
# 03/07/27 davem@nuts.ninka.net 1.1547.3.1
# [SPARC64]: Mark more things __init in kernel/pci.c
# --------------------------------------------
# 03/07/27 lord@kernel.bkbits.net 1.1548.1.2
# Merge kernel.bkbits.net:/home/repos/linux-2.5
# into kernel.bkbits.net:/home/lord/xfs-2.5
# --------------------------------------------
# 03/07/27 lord@laptop.americas.sgi.com 1.1553
# Merge ssh://lord@kernel.bkbits.net/xfs-2.5
# into laptop.americas.sgi.com:/home/lord/src/xfs-2.5
# --------------------------------------------
# 03/07/27 herbert@gondor.apana.org.au 1.1547.2.3
# [IPSEC]: Fix SKB secpath refcounting.
#
# When a secpath is COWed, we lose reference to the states.
# --------------------------------------------
# 03/07/27 davem@nuts.ninka.net 1.1547.3.2
# [SPARC64]: Make sure to reject all PCI DAC dma masks.
# --------------------------------------------
# 03/07/28 davem@nuts.ninka.net 1.1547.3.3
# [SPARC64]: In schizo driver, if virtual-dma property exists, respect it.
# --------------------------------------------
# 03/07/28 perex@suse.cz 1.1547.4.1
# Merge suse.cz:/home/perex/bk/linux-sound/linux-2.5
# into suse.cz:/home/perex/bk/linux-sound/linux-sound
# --------------------------------------------
# 03/07/28 perex@suse.cz 1.1547.4.2
# ALSA 0.9.6 update
# - added __setup() to all midlevel modules
# - sequencer protocol 1.0.1
# - added timestamping flags for ports
# - OSS PCM emulation
# - fixed write() behaviour
# - added two new options no-silence & whole-frag
# - a try to fix OOPSes caused in the rate plugin
# - emu10k1 driver
# - more support for Audigy/Audigy2 EX
# - fixed soundfont locking
# - sb16 driver
# - fixed fm_res handling (and proc OOPS)
# - via82xx driver
# - fixed revision check for 8233A
# - usbaudio driver
# - added a workaround for M-Audio Audiophile USB
# --------------------------------------------
# 03/07/28 perex@suse.cz 1.1547.4.3
# ALSA update
# - removed empty hammerfall_mem.c file
# - added MAKEDEV.snd script
# --------------------------------------------
# 03/07/28 shaggy@shaggy.austin.ibm.com 1.1547.5.1
# Merge jfs@jfs.bkbits.net:linux-2.5
# into shaggy.austin.ibm.com:/shaggy/bk/jfs-2.5
# --------------------------------------------
# 03/07/28 lord@jen.americas.sgi.com 1.1550.1.1
# Merge ssh://lord@kernel.bkbits.net/xfs-2.5
# into jen.americas.sgi.com:/src/lord/bitkeeper/xfs-2.5
# --------------------------------------------
# 03/07/28 davem@nuts.ninka.net 1.1547.2.4
# [ATM]: Remove -g option from driver directory CFLAGS.
# --------------------------------------------
# 03/07/28 chas@cmf.nrl.navy.mil 1.1547.2.5
# [ATM]: Update LANAI driver to modern PCI and DMA APIs (from mitch@sfgoth.com)
# --------------------------------------------
# 03/07/28 solca@guug.org 1.1547.3.4
# [SPARC]: Add local.h and sections.h headers.
# --------------------------------------------
# 03/07/28 lord@laptop.americas.sgi.com 1.1554
# Merge ssh://lord@jen.americas.sgi.com//src/lord/bitkeeper/xfs-2.5
# into laptop.americas.sgi.com:/home/lord/src/xfs-2.5
# --------------------------------------------
# 03/07/28 jones@ingate.com 1.1547.2.6
# [IGMP]: linux/igmp.h needs asm/byteorder.h
# --------------------------------------------
# 03/07/28 wim@iguana.be 1.1547.6.1
# [WATCHDOG] I810_TCO info in Kconfig
#
# Change Kconfig info about I810_TCO so that it is clear that this watchdog works for the i8xx series of chipsets and not only the i810 and i815 chipsets.
# --------------------------------------------
# 03/07/28 wim@iguana.be 1.1547.6.2
# [WATCHDOG] Cleanup of Kconfig file for the watchdog drivers.
#
# Cleanup of Kconfig file for the watchdog drivers.
# This clean-up exists of:
# * change the general comment so that it mentions watchdog device and not character device
# * correct some module-names
# * remove double-entry for W83877F_WDT
# * change Documentation/modules.txt to <file:Documentation/modules.txt> for consistency
# --------------------------------------------
# 03/07/28 lord@laptop.americas.sgi.com 1.1555
# Use i_size_read and i_size_write instead of direct access to the i_size
# field.
# --------------------------------------------
# 03/07/28 wim@iguana.be 1.1547.6.3
# [WATCHDOG] make wdt_pci.c independant of wdt.c
# --------------------------------------------
# 03/07/28 shemminger@osdl.org 1.1547.2.7
# [BRIDGE]: Mailing list is at osdl.org now.
# --------------------------------------------
# 03/07/28 shemminger@osdl.org 1.1547.2.8
# [VLAN]: Allow it to compile with VLAN_DEBUG enabled.
# --------------------------------------------
# 03/07/28 shemminger@osdl.org 1.1547.2.9
# [VLAN]: Convert VLAN procfs stubs to no-ops.
# --------------------------------------------
# 03/07/28 shemminger@osdl.org 1.1547.2.10
# [VLAN]: Convert over to seq_file.
# --------------------------------------------
# 03/07/28 devik@cdi.cz 1.1547.2.11
# [NET]: Fix bugs in sch_htb packet scheduler.
# - get rid of annoying messages in non-debug mode
# - handle case where childs queue is empty suddenly
# --------------------------------------------
# 03/07/28 olof@austin.ibm.com 1.1547.2.12
# [RANDOM]: Fix SMP deadlock in __check_and_rekey().
# --------------------------------------------
# 03/07/28 davidm@tiger.hpl.hp.com 1.1547.7.1
# Merge tiger.hpl.hp.com:/data1/bk/vanilla/linux-2.5
# into tiger.hpl.hp.com:/data1/bk/lia64/to-linus-2.5
# --------------------------------------------
# 03/07/29 davidm@tiger.hpl.hp.com 1.1547.7.2
# ia64: Add forgotton <asm-ia64/sections.h>.
# --------------------------------------------
# 03/07/29 lord@jen.americas.sgi.com 1.1556
# Fix a couple of pagebuf end cases, in particular, deal with block
# device which is not correctly initialized and do not submit a bio
# to it - that trips a BUG.
# --------------------------------------------
# 03/07/29 nathans@sgi.com 1.1557
# [XFS] Change any references to legal/illegal into valid/invalid - apparently this was bad, mkaay?
#
# SGI Modid: 2.5.x-xfs:slinx:154430a
# --------------------------------------------
# 03/07/29 sandeen@sgi.com 1.1558
# [XFS] Catch read-only filesystems in xfs_setattr, and return EROFS
#
# SGI Modid: 2.5.x-xfs:slinx:152528a
# --------------------------------------------
# 03/07/29 achirica@telefonica.net 1.1547.8.1
# [wireless airo] fix Tx race
# --------------------------------------------
# 03/07/29 achirica@telefonica.net 1.1547.8.2
# [wireless airo] safer shutdown sequence
#
# changes the card shutdown sequence to a safer one
# --------------------------------------------
# 03/07/29 achirica@telefonica.net 1.1547.8.3
# [wireless airo] eliminate infinite loop
#
# makes sure a possible (never happened, but just in case) infinite
# loop in the transmission code terminates.
# --------------------------------------------
# 03/07/29 achirica@telefonica.net 1.1547.8.4
# [wireless airo] makes the card passive when entering monitor mode
# --------------------------------------------
# 03/07/29 achirica@telefonica.net 1.1547.8.5
# [wireless airo] adds support for noise level reporting (if available)
# --------------------------------------------
# 03/07/29 greg@kroah.com 1.1547.9.1
# [PATCH] USB: fix stupid kobject coding error with regards to struct usb_interface
#
# Added a release callback, as is required, otherwise we can easily oops
# if a user grabs a sysfs file and the device is removed from the system.
# --------------------------------------------
# 03/07/29 greg@kroah.com 1.1547.9.2
# [PATCH] USB: core cleanups for struct usb_interface changes
#
# Also set usb_device.dev.release right after initialization to catch any
# early devices being destroyed. I still think there's a few error paths
# to correct, but this catches a lot of previous errors.
# --------------------------------------------
# 03/07/29 greg@kroah.com 1.1547.9.3
# [PATCH] USB: changes due to struct usb_interface changing from a pointer to an array of pointers.
# --------------------------------------------
# 03/07/29 bellucda@tiscali.it 1.1547.10.1
# [PATCH] USB: Audit usb_register in drivers/usb/class/audio.c
# --------------------------------------------
# 03/07/29 bellucda@tiscali.it 1.1547.10.2
# [PATCH] USB: Audit usb_register() in drivers/usb/misc/emi26.c
# --------------------------------------------
# 03/07/29 bellucda@tiscali.it 1.1547.10.3
# [PATCH] USB: Audit usb_register() in drivers/usb/input/wacom.c
# --------------------------------------------
# 03/07/29 bellucda@tiscali.it 1.1547.10.4
# [PATCH] USB: Audit usb_register in drivers/usb/input/xpad.c
# --------------------------------------------
# 03/07/29 bellucda@tiscali.it 1.1547.10.5
# [PATCH] USB: Audit usb_register() in drivers/usb/input/usbkbd.c
# --------------------------------------------
# 03/07/29 anton@samba.org 1.1547.2.13
# [NET]: Add missing memory barriors for __LINK_STATE_RX_SCHED handling.
# --------------------------------------------
# 03/07/29 bellucda@tiscali.it 1.1547.10.6
# [PATCH] USB: Audit usb_register() in drivers/usb/input/aiptek.c
# --------------------------------------------
# 03/07/29 wensong@linux-vs.org 1.1547.2.14
# [IPV4] IPVS missing stats locking in estimation_timer()
# --------------------------------------------
# 03/07/29 wensong@linux-vs.org 1.1547.2.15
# [IPV4] IPVS: sanity check of threshold setting and code tidy up
# --------------------------------------------
# 03/07/29 chas@cmf.nrl.navy.mil 1.1547.2.16
# [ATM]: remove EXACT_TS remove from zatm (untested)
# --------------------------------------------
# 03/07/29 chas@cmf.nrl.navy.mil 1.1547.2.17
# [ATM]: use set_current_state(x) (from bellucda@tiscali.it)
# --------------------------------------------
# 03/07/29 samuel.thibault@fnac.net 1.1547.2.18
# [PPP]: Fix ppp_async xon/xoff handling.
# --------------------------------------------
# 03/07/29 davem@nuts.ninka.net 1.1547.2.19
# [NET]: Need to export secpath_dup to modules.
# --------------------------------------------
# 03/07/30 lord@jen.americas.sgi.com 1.1559
# Move from fsid_t to __kernel_fsid_t, fixes ia64 build
# --------------------------------------------
# 03/07/30 stern@rowland.harvard.edu 1.1547.10.7
# [PATCH] USB: Proper I/O buffering for the shuttle_usbat subdriver
#
# This patch makes the shuttle_usbat subdriver use proper DMA I/O buffering.
# Although I try to be careful with these changes, I can't test them. So I
# urge you to read through it carefully to verify that nothing seems to be
# wrong.
# --------------------------------------------
# 03/07/30 david-b@pacbell.net 1.1547.10.8
# [PATCH] USB: usb audio, remove garbage warning
#
# There are two places where the audio driver checks for
# endpoint-less interfaces, but the second one doesn't
# filter out a garbage warning (without this patch).
#
# Likely it'd be better to remove these warnings from
# the driver, and maybe just place them in usbcore if
# they'd ever be useful. But this at least gets rid
# of one class of "is this device broken" questions.
# --------------------------------------------
# 03/07/30 stern@rowland.harvard.edu 1.1547.10.9
# [PATCH] USB: Fix irq problem in hcd_endpoint_disable()
#
# The recent change made to the irq handling in hcd_endpoint_disable()
# caused a problem. The statement
#
# local_irq_save (flags);
#
# needs to be outside the rescan loop. Otherwise, on loop iterations after
# the first, flags is always set to indicate that interrupts are disabled.
#
# In fact, since the routine ends with might_sleep() anyway, I don't see any
# reason to save the interrupt state at all. My patch just disables
# interrupts at the start and enables them at the end. I'm not sure that's
# how you intended it to work, so you may want to change it a little.
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.10.10
# [PATCH] USB: remove improper use of devinitdata markings for device ids.
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.10.11
# [PATCH] USB: Compile AX8817x driver
#
# From mru@users.sourceforge.net
#
# This trivial Makefile patch causes the AX8817x driver to actually be
# built.
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.10.12
# [PATCH] USB: AX8817x (USB ethernet) problem in 2.6.0-test1
#
# From mru@users.sourceforge.net
#
# My Netgear FA120 USB2 ethernet adaptor isn't working properly with
# Linux 2.6.0-test1. First off, I had to modify it slightly (patch
# below) to make it work at all with USB2. Now I can send data at the
# full expected speed (~11 MB/s).
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.4
# Merge gregkh@kernel.bkbits.net:linux/linus-2.6
# into kroah.com:/home/greg/linux/BK/gregkh-2.6
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.5
# USB: fix bug if open() fails in usb-serial device.
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.6
# [PATCH] USB: remove funny characters from visor driver after much prodding.
# --------------------------------------------
# 03/07/30 david-b@pacbell.net 1.1547.9.7
# [PATCH] USB: ehci needs a readb() on IDP425 PCI (ARM)
#
# This is a one-line "obviously correct" patch that Lutz reports
# is needed on one ARM platform.
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.8
# [PATCH] USB: bluetty: remove write_urb_pool logic, fixing locking issues.
#
# Now we just throw urbs at the device as fast as we can.
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.11.1
# Merge gregkh@kernel.bkbits.net:linux/i2c-2.5
# into kroah.com:/home/greg/linux/BK/i2c-2.6
# --------------------------------------------
# 03/07/30 oliver@neukum.org 1.1547.9.9
# [PATCH] USB: error return codes in usblp
#
# an unknown ioctl shall return ENOTTY, not EINVAL.
# --------------------------------------------
# 03/07/30 bellucda@tiscali.it 1.1547.9.10
# [PATCH] USB: Audit usb_register in usbmouse_init()
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.11
# [PATCH] USB: Support sharp zaurus C-750
#
# From pavel@ucw.cz
#
# This adds support for another handheld from sharp to 2.6.0-test1
# --------------------------------------------
# 03/07/30 bellucda@tiscali.it 1.1547.9.12
# [PATCH] USB: Audit usb_register() in drivers/usb/net/catc.c
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.13
# Cset exclude: greg@kroah.com|ChangeSet|20030730200104|44589
# --------------------------------------------
# 03/07/30 david-b@pacbell.net 1.1547.9.14
# [PATCH] USB: usbnet: zaurus c-750, motorola
#
# This patch:
#
# - Makes the cdc code handle a Motorola cable modem that stores
# CDC descriptors in the wrong place. The workaround might be
# helpful for other hardware too. (This was a 2.4 regression.)
#
# - Recognizes another Zaurus (PXA 255 based clamshell, not yet
# sold by Sharp in the US).
#
# - Cleaned the Zaurus stuff up a bit. Rather than expecting
# a new driver_info struct (or re-using the right one) for
# each new pxa based product, they all use the same one. So
# patches for new products only need new usb_device_id entries.
# (Also notes the issue that every Zaurus model will need to be
# blacklisted for CDC if the Z code isn't enabled.)
# --------------------------------------------
# 03/07/30 greg@kroah.com 1.1547.9.15
# [PATCH] USB: fix memory leak in auerswald driver.
#
# Thanks to Joilnen Leite <knl_joi@yahoo.com.br> for pointing this out.
# --------------------------------------------
# 03/07/30 oliver@neukum.org 1.1547.9.16
# [PATCH] USB: cleanup of usblp (release and poll)
#
# this cleans up locking and freeing in usblp_release and
# poll.
# --------------------------------------------
# 03/07/30 oliver@neukum.org 1.1547.9.17
# [PATCH] USB: fix race condition in usblp_write
#
# - fix timeout handling
# --------------------------------------------
# 03/07/30 david-b@pacbell.net 1.1547.9.18
# [PATCH] USB: ehci-hcd, TT fixup
#
# I noticed that some cases where USB produced lots of TT messages
# were clearly wrong, since the transactions completed cleanly
# (with a stall) and the TT buffer cleanup is only supposed to
# be needed when a CSPLIT transaction fails (for control or bulk).
#
# This patch makes the TT buffer cleanup happen only in the rarer
# cases where there was an error that might really need it.
# --------------------------------------------
# 03/07/30 judd@jpilot.org 1.1547.9.19
# [PATCH] USB: visor.h[c] USB device IDs documentation
# --------------------------------------------
# 03/07/30 dhollis@davehollis.com 1.1547.9.20
# [PATCH] USB: AX8817x mii/ethtool fixes among others
#
# This patch:
# Adds the Intellinet device IDs
# Adds msg_level support (to be utilized in the future)
# Fixes ethtool/mii support so link checking actually works
# Changed timeout on usb_fill_int_urb to support High Speed (mru@users.sf.net)
# Added devdbg/err/info defines borrowed from usbnet
# Changed strlcpy to strncpy
#
# Key issue not currently resolved (as brought up by mru@users.sf.net) is
# that the receive performance is terrible on OHCI. I ran a set of tests
# with ttcp and transmit performance achieved 6146.16 KB/sec but receive
# only yielded 466.26 KB/sec which really sucks (sorry for the technical
# jargon). In porting the driver to 2.5 I had to pull the transmit
# queueing that Tivo had originally used for the driver to even function.
# My initial attempts at pulling the receive queueing met with many
# Ooopses thus I backed off. Looks like I will need to dig in again on
# that one.
# --------------------------------------------
# 03/07/30 dhollis@davehollis.com 1.1547.9.21
# [PATCH] USB: ax8817x.c - Fix flags to greatly increase rx performance
#
# The attached patch fixes the flags used on the receive URBs and greatly
# increases throughput (especially on EHCI). On EHCI before the patch,
# receives came in around 460KB/s and after I am in the 10-11MB/s range
# which is about the same speed I am able to achieve using my Intel nics.
# Now transmit is actually the bottleneck on EHCI (only getting around 6MB/s).
# --------------------------------------------
# 03/07/30 nemosoft@smcc.demon.nl 1.1547.9.22
# [PATCH] USB: PWC 8.11
#
# Attached are two patches, one for 2.4.21 and 2.5.75 for the PWC driver. I
# assume the 2.5.75 patch will go into 2.6.0-test* without problems (I hope
# this driver can make it into the kernel before the 'real' 2.6.0).
#
# From the ChangeLog:
#
# * 20 dev_hints (per request)
# * Hot unplugging should be better, no more dangling pointers or memory leaks
# * Added reserved Logitech webcam IDs
# * Device now remembers size & fps between close()/open()
# * Removed palette stuff altogether
#
# I have two open issues, though: Oliver Neukem pointed out that I should
# resubmit URBs in the 2.5. kernel even in case of USB errors, which I did.
# However, I never got a patch so I'm not 100% if this is the solution that
# he had in mind.
#
# Second... I've been thinking long and hard about the problem of properly
# deregistering the video device when the cam gets unplugged while it is in
# use. Various schemes failed; immediately deregistering while in the
# disconnect routine causes crashes because the videodev layer sets some
# pointer to null but still uses it later. A deregister in close() causes
# hangs because of locked mutexes...
#
# My current implemententation is to set an errorflag in the disconnect
# routine, then wait there (using schedule()) until close() is being called
# (I assume the application will immediately close the device when it gets a
# serious error). So far it doesn't crash :-)
# --------------------------------------------
# 03/07/30 stern@rowland.harvard.edu 1.1547.9.23
# [PATCH] USB: Rename usb_connect() to usb_choose_address()
#
# This revised patch includes the change that David Brownell asked for. It
# renames usb_connect() to usb_choose_address(), no longer exports the
# function, and adds equivalent functionality to usb_register_root_hub().
# It also removes the unnecessary (and incorrect) assignment to
# bMaxPacketSize0.
# --------------------------------------------
# 03/07/30 benh@kernel.crashing.org 1.1547.2.20
# [NET]: Do not call request_irq with spinlock held in sungem.c
# --------------------------------------------
# 03/07/30 chas@cmf.nrl.navy.mil 1.1547.2.21
# [ATM]: fix a typo in net/atm/Makefile (from eguaj@free.fr)
# --------------------------------------------
# 03/07/30 shemminger@osdl.org 1.1547.2.22
# [NET]: Fix rtnetlink symbol exports when INET is disabled.
# --------------------------------------------
# 03/07/30 shemminger@osdl.org 1.1547.2.23
# [NET]: Add likely/unlikely to pskb_may_pull.
# --------------------------------------------
# 03/07/30 szepe@pinerecords.com 1.1547.2.24
# [NETFILTER]: Put netfilter Kconfig options into dedicated submenu.
# --------------------------------------------
# 03/07/30 bdschuym@pandora.be 1.1547.2.25
# [NETFILTER]: Fix use after free of skb in nf_reinject().
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.5
# [SPARC64]: Use i2c/media Kconfigs instead of hardcoding.
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.6
# [I2C]: ELV and VELLEMAN depend upon ISA.
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.7
# [DVB]: 64-bit fixes for skystar2.c
# - Need to include linux/init.h and asm/io.h
# - Use unsigned long for io_mem and io_port
# - Print pointers using %p format specifier
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.8
# [DVB]: Fix pointer-->int cast in dvb_net.c
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.9
# [DVB]: Fix pointer-->int cast in budget-patch.c
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.10
# [DVB]: saa7134.h needs asm/io.h
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.11
# [MEDIA]: Fix pointer-->int cast in saa5249.c
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.12
# [MEDIA]: Make read operations return correct ssize_t in {c-qcam,bw-qcam,w9966}.c
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.13
# [MEDIA]: Make VIDEO_PMS depend upon ISA.
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.14
# [MEDIA]: Make read method return ssize_t in cpia.c
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.15
# [MEDIA]: bttvp.h needs asm/io.h
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.16
# [MEDIA]: Fix u64 printing in bttv driver.
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.17
# [MEDIA]: bttv-cards.c needs linux/vmalloc.h
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.18
# [SPARC64]: Update defconfig.
# --------------------------------------------
# 03/07/30 davem@nuts.ninka.net 1.1547.3.19
# [SPARC64]: Use Makefile to control dec_and_lock.o building not in-file ifdefs.
# --------------------------------------------
# 03/07/31 davej@tetrachloride.(none) 1.1547.12.1
# Merge tetrachloride.(none):/mnt/raid/src/kernel/2.5/trees/bk-linus
# into tetrachloride.(none):/mnt/raid/src/kernel/2.5/trees/cpufreq
# --------------------------------------------
# 03/07/31 davej@codemonkey.org.uk 1.1547.12.2
# [CPUFREQ] Remove deprecated email address.
# --------------------------------------------
# 03/07/31 davej@tetrachloride.(none) 1.1547.13.1
# Merge tetrachloride.(none):/mnt/raid/src/kernel/2.5/trees/bk-linus
# into tetrachloride.(none):/mnt/raid/src/kernel/2.5/trees/agpgart
# --------------------------------------------
# 03/07/31 shaggy@shaggy.austin.ibm.com 1.1547.5.2
# JFS: write_super_lockfs should mark superblock clean
#
# LVM and EVMS snapshots of JFS filesystems were not mountable because
# write_super_lockfs was not marking the volume as clean. The volume was
# otherwise in a consistent state.
# --------------------------------------------
# 03/07/31 jgarzik@redhat.com 1.1547.8.6
# [netdrvr bonding] update docs
# --------------------------------------------
# 03/07/31 jgarzik@redhat.com 1.1547.8.7
# [netdrvr bonding] fix ifenslave build on ia64
#
# Forward port from 2.4.
# --------------------------------------------
# 03/07/31 jgarzik@redhat.com 1.1547.8.8
# [arcnet com20020-isa] fix build broken by lack of ->owner
# --------------------------------------------
# 03/07/31 jgarzik@redhat.com 1.1547.8.9
# [tokenring ibmtr_cs] fix build, due to missing ibmtr.c build
#
# Note: Better fix is needed.
#
# Contributed by Mike Phillips.
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.9.24
# [PATCH] USB: added support for TIOCM_RI and TIOCM_CD to pl2303 driver and fix stupid bug.
#
# Thanks to Paulo Marques <pmarques@grupopie.com> for finding this.
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.14.1
# [PATCH] PCI: pci_device_id can not be marked __devinitdata. Fixes up sound/*
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.14.2
# [PATCH] PCI: pci_device_id can not be marked __devinitdata.
#
# Fixes up drivers/atm/* drivers/block/* drivers/char/* and drivers/video/*
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.14.3
# [PATCH] PCI: pci_device_id can not be marked __devinitdata.
#
# Fixes up drivers/net/*
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.14.4
# [PATCH] PCI: pci_device_id can not be marked __devinitdata.
#
# Last straggler in arch/mips/*
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.14.5
# [PATCH] PCI: pci_device_id can not be marked __devinitdata.
#
# fixes up drivers/i2c/* drivers/ide/* and drivers/ieee1394/*
# --------------------------------------------
# 03/07/31 greg@kroah.com 1.1547.14.6
# [PATCH] PCI: pci_device_id can not be marked __devinitdata.
#
# Fixes up drivers/input/* drivers/isdn/* drivers/media/*
# drivers/mtd/* drivers/parisc/* drivers/pci/* drivers/parport/*
# drivers/scsi/* and drivers/serial/*
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.15.1
# Merge bk://kernel.bkbits.net/davem/net-2.5
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.1
# [PATCH] remove a dead EXPORT_NO_SYMBOLS
#
# (R Krishnakumar)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.2
# [PATCH] more typo fixes
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.3
# [PATCH] dont assume newer cpus have the same magic registers
#
# (Venkatesh Pallipadi@intel)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.4
# [PATCH] more arch typo/illegal->invalid fixes
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.5
# [PATCH] docs for updated sk98 from vendor
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.6
# [PATCH] kill an old __NO_VERSION__
#
# (Adrian Bunk(
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.7
# [PATCH] re-enable SiS direct render
#
# ((Gaël Le Mignot)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.8
# [PATCH] console on by default if not embedded (save mucho pain)
#
# (Andi Kleen)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.9
# [PATCH] more typo/invalid bits
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.10
# [PATCH] more typo fixes and dead old code removal
#
# (Adrian Bunk, Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.11
# [PATCH] mouse and keyboard by default if not embedded
#
# (Andi Kleen)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.12
# [PATCH] second block illegal/invalid fixups for isdn
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.13
# [PATCH] keyboard controller by default if not embedded
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.14
# [PATCH] some isdn invalid/illegal fixups
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.15
# [PATCH] fix return on pms change
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.16
# [PATCH] more typo fixes
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.17
# [PATCH] sk98 vendor driver update
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.18
# [PATCH] more net illegal/invalid typo fixes
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.19
# [PATCH] further z85230 fixes
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.20
# [PATCH] idents for all the new skge cards
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.21
# [PATCH] fix pcmcia_cs without ISA
#
# (Taral)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.22
# [PATCH] fix invalid/illegal and printk formatting for scsi drivers
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.23
# [PATCH] phonedev handles this
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.24
# [PATCH] phonedev has an owner so this is ok too I think
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.25
# [PATCH] fix build of asix usb ethernet
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.26
# [PATCH] vga text console if x86 and not embedded
#
# (Andi Kleen)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.27
# [PATCH] fix invalid/illegal oddments in USB
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.28
# [PATCH] switch escaped 8859-1 symbols inthe kernel to ascii
#
# (Otherwise this plays hell with logging on non old US systems)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.29
# [PATCH] tdfx framebuffer updates
#
# ((Richard Drummond)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.30
# [PATCH] fix binfmt_flat typos
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.31
# [PATCH] kill __NO_VERSION__ in intermezzo
#
# (Adrian Bunk)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.32
# [PATCH] use invalid not illegal in reiserfs
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.33
# [PATCH] fix 2 byte data leak due to padding
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.34
# [PATCH] typo fix for time.h
#
# (Steven Cole)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.35
# [PATCH] fix strncpy on generic user platforms
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.36
# [PATCH] maintainer for sk98
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.37
# [PATCH] the rest of the slab.c fix...
#
# (Junkio)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.38
# [PATCH] sunrpc doesnt need uaccess.h
#
# (Frank Cusack)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.39
# [PATCH] fix posix compliance for mkcompile_h script
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.40
# [PATCH] allow 2.6 to build on old old setups
#
# (Mikael Pettersson)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.41
# [PATCH] fix section conflict and typo in ALSA isa
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.42
# [PATCH] further OSS audio updates
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.43
# [PATCH] further sound updates
#
# Switching back to strlcpy/memset to avoid padding problems
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.44
# [PATCH] update Changes for NFS changes
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.45
# [PATCH] work around tosh keyboards
#
# These produce double ups sometimes
# (Chris Heath)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.46
# [PATCH] update for DC395 driver (big)
#
# This is a fairly major update to get stuff going again
#
# (From the maintainers)
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.47
# [PATCH] remaining illegal/invalid/separate stuff for scsi
# --------------------------------------------
# 03/07/31 alan@lxorguk.ukuu.org.uk 1.1547.16.48
# [PATCH] ikconfig
#
# (Randy Dunlap)
#
# Build the kernel config data into the kernel - either unloaded or accessible
# via /proc
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.15.2
# Merge home.osdl.org:/home/torvalds/v2.5/ac
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.15.3
# Merge initializer conflict manually
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.15.4
# Merge http://lia64.bkbits.net/to-linus-2.5
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.15.5
# Merge http://linux-watchdog.bkbits.net/linux-2.5-watchdog
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.15.6
# Merge http://jfs.bkbits.net/linux-2.5
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/07/31 torvalds@home.osdl.org 1.1547.1.50
# Merge http://linux-isdn.bkbits.net/linux-2.5.make
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/07/31 romieu@fr.zoreil.com 1.1547.1.51
# [PATCH] fix typo in drivers/net/arcnet/com20020-isa.c
#
# Fix a typo during last module refcounting fix.
# --------------------------------------------
# 03/07/31 axboe@suse.de 1.1547.1.52
# [PATCH] fix broken blk_start_queue behavior
#
# From Lou Langholtz <ldl@aros.net>
#
# This fixes the behavior of blk_start_queue() so that request queues
# really do start up again after blk_start_queue() is called (on queues
# that were previously stopped via blk_stop_queue).
# --------------------------------------------
# 03/07/31 axboe@suse.de 1.1547.1.53
# [PATCH] get rid of unused request_queue field queue_wait
#
# From Lou Langholtz <ldl@aros.net>
#
# The queue_wait field of struct request_queue is not used anymore, and
# this gets rid of it.
# --------------------------------------------
# 03/07/31 miles@lsi.nec.co.jp 1.1547.1.54
# [PATCH] Add new include files for v850
# --------------------------------------------
# 03/07/31 ysato@users.sourceforge.jp 1.1547.1.55
# [PATCH] h8300: config updates
#
# config script fix
# defconfig update
# Makefile update
# add H8S archtecture support
# --------------------------------------------
# 03/07/31 ysato@users.sourceforge.jp 1.1547.1.56
# [PATCH] h8300: interrupt management update
#
# interrupt management update
# target-support file update
# gcc-3.3 support
# blkdev location cleanup
# --------------------------------------------
# 03/07/31 ysato@users.sourceforge.jp 1.1547.1.57
# [PATCH] h8300: H8S architecture support
# --------------------------------------------
# 03/07/31 ysato@users.sourceforge.jp 1.1547.1.58
# [PATCH] h8300: header file updates
#
# used common header files
# build error and warning fix
# add include/asm-h8300/local.h and include/asm-h8300/sections.h
# --------------------------------------------
# 03/07/31 ysato@users.sourceforge.jp 1.1547.1.59
# [PATCH] h8300: arch update
#
# H8S architecture support
# signal handling problem fix
# gcc-3.3 support
# vfork/clone return value fix
# added show_stack
# build error and warning fix
# blkdev location cleanup
# --------------------------------------------
# 03/07/31 ysato@users.sourceforge.jp 1.1547.1.60
# [PATCH] h8300: build error fixes
#
# build error and warning fix
# blkdev location cleanup
# typo fix
# --------------------------------------------
# 03/07/31 Andries.Brouwer@cwi.nl 1.1547.1.61
# [PATCH] osf partition numbering
#
# OSF partitions are mostly found on alpha machines. It's been reported
# that the partition numbering changed between 2.4 and 2.6.
#
# This makes 2.6 use the 2.4 numbering scheme.
# --------------------------------------------
# 03/07/31 hunold@convergence.de 1.1547.1.62
# [PATCH] Kconfig and Makefile updates
#
# [V4L] - make sure saa7146 module gets build for Hexium drivers
# [V4L] - make Hexium drivers depend on the i2c layer
# [DVB] - fix typo which prevented the mt312 driver from being build (obi <=> obj)
# --------------------------------------------
# 03/07/31 hunold@convergence.de 1.1547.1.63
# [PATCH] DVB core update
#
# [DVB] - if there are multiple adapters, bend the tuning frequency only if the adapters differ
# --------------------------------------------
# 03/07/31 hunold@convergence.de 1.1547.1.64
# [PATCH] mt312 DVB frontend update
#
# [DVB] - show i2c read errors only for registered frontends
# --------------------------------------------
# 03/07/31 hunold@convergence.de 1.1547.1.65
# [PATCH] Update MAC handling for various DVB PCI cards
#
# [DVB] - correctly read MAC from eeprom on Technotrend and KNC1 cards
# --------------------------------------------
# 03/07/31 hunold@convergence.de 1.1547.1.66
# [PATCH] TTUSB-DEC driver update
#
# [DVB] - Hand off all processing of urb data to a tasklet
# --------------------------------------------
# 03/07/31 hunold@convergence.de 1.1547.1.67
# [PATCH] Hexium saa7146 driver update
#
# [V4L] - set debug verbosity to 0 for both Hexium drivers
# [V4L] - declare all local functions and variables static
# --------------------------------------------
# 03/07/31 benh@kernel.crashing.org 1.1547.1.68
# [PATCH] PPC32: Properly register CPUs
#
# This adds proper registration of CPUs on ppc32, without this, accesses
# to cpufreq will oops.
# --------------------------------------------
# 03/07/31 benh@kernel.crashing.org 1.1547.1.69
# [PATCH] PPC32: Update pmac_cpufreq driver back to working
#
# This patch updates the PowerMac cpufreq driver so that
# it builds & works in current 2.6
# --------------------------------------------
# 03/07/31 riel@redhat.com 1.1547.1.70
# [PATCH] CREDITS update
#
# Time to update my CREDITS entry...
# --------------------------------------------
# 03/07/31 felipewd@terra.com.br 1.1547.1.71
# [PATCH] drivers/char/stallion.c: devfs_mk_cdev fix
#
# devfs_mk_cdev now only takes 3 parameters (dev_t, umode_t, fmt..), so
# update this driver to the new API.
# --------------------------------------------
# 03/07/31 ak@muc.de 1.1547.1.72
# [PATCH] x86-64 merge
#
# Only bug fixes and making it compile again and a few minor features.
# Also one security fix that got lost earlier
#
# - Document boot options
# - Better cpu local data
# - Emulate FIOQSIZE
# - Fix return value of 32bit ipccall
# - Various minor style fixes
# - Save some memory in apic tables
# - Merge with 2.6.0test2/i386
# - Readd ioport fix
# - Sort exception tables at boot time
# - Add local.h
# - Fix for_each_cpu on UP
# - Add utimes and tgkill system calls for 64bit
# - Update defconfig
# --------------------------------------------
# 03/07/31 ralf@linux-mips.org 1.1547.1.73
# [PATCH] MIPS update
#
# Here's another MIPS update. The patch is huge because it completly
# folds mips64 into mips, thereby eleminating 41010 lines of code.
# --------------------------------------------
# 03/07/31 chip@pobox.com 1.1547.1.74
# [PATCH] Require nfs-utils 1.0.5; document where to get it
#
# This patch notes that users should get nfs-utils 1.0.5 (1.0.4 had a
# memory usage bug), and tells them where to get it.
# --------------------------------------------
# 03/07/31 ian.abbott@mev.co.uk 1.1547.9.25
# [PATCH] USB: ftdi_sio - additional pids
#
# Wayne Wylupski sent some more PIDs (in a patch, but I've modified
# it) for the ftdi_sio driver to the ftdi-usb-sio-devel list. These
# PIDs were for additional CrystalFontz LCD displays.
#
# An earlier patch from David Glance for the DSS-20 SyncStation was
# applied to the 2.6 tree. This did not have a changelog entry in
# the file header comment of ftdi_sio.c, so I have retroactively
# added one in the attached patch.
# --------------------------------------------
# 03/07/31 david-b@pacbell.net 1.1547.9.26
# [PATCH] USB: usb_gadget.h doc fix
#
# The "automagic control completion" has been gone for some
# time now, except for the documentation fixed in this patch.
# It mentions the "deferred response" mode that's used when
# some context (like a gadgetfs thread) other than the IRQ
# handler is responding to control requests.
# --------------------------------------------
# 03/07/31 stern@rowland.harvard.edu 1.1547.9.27
# [PATCH] USB: Small fixes for usbtest
#
# It fixes a few minor problems in the usbtest driver:
#
# Unlinks are done in the expected order, preventing some
# inappropriate error messages.
#
# The driver would wait for an URB to complete, even if the URB
# got an error on submission.
#
# There was a surprising memory leak: the driver didn't kfree()
# its private data structure.
# --------------------------------------------
# 03/07/31 stern@rowland.harvard.edu 1.1547.9.28
# [PATCH] USB: More unusual_devs.h stuff
#
# Here are updates to unusual_devs.h sent in by users. They apply to both
# 2.4.22 and 2.6.0.
# --------------------------------------------
# 03/07/31 stern@rowland.harvard.edu 1.1547.9.29
# [PATCH] USB: Rename probe and unbind functions
#
# The is the first part of what used to be as66c. It simply renames
# usb_device_probe() and usb_device_remove() to usb_probe_interface() and
# usb_unbind_interface(). And since they're not needed outside of usbcore,
# it stops exporting them.
# --------------------------------------------
# 03/07/31 stern@rowland.harvard.edu 1.1547.9.30
# [PATCH] USB: Add functions to enable/disable endpoints, interfaces
#
# This is the second part of what used to be as66c. It fixes the
# initialization of the debugging macros in core/message.c and adds routines
# to enable/disable endpoints, interfaces, and entire devices. The code
# that _uses_ these routines will come in the next patch.
#
# # Initialize the debugging macros properly in message.c.
# #
# # Add usb_disable_endpoint(), usb_disable_interface(), usb_disable_device(),
# # usb_enable_endpoint(), and usb_enable_interface().
# --------------------------------------------
# 03/07/31 stern@rowland.harvard.edu 1.1547.9.31
# [PATCH] USB: Use the new enable/disable routines
#
# This is the third part of what used to be as66c. The patch makes several
# changes in the routines that handle unbinding and selecting altsettings
# and configurations.
#
# Upon unbinding a driver, don't nuke all the URBs for the device
# -- only kill the ones on the driver's interface. Afterwards,
# reinitialize the interface by selecting altsetting 0 (the
# default).
#
# When changing an altsetting, if the interface has only one
# altsetting it is allowed to STALL the request. Attempt to carry
# out the equivalent initialization by clearing the HALT feature
# on each of the interface's endpoints.
#
# When changing configurations, mark each interface as being in
# altsetting 0.
#
# In general, use the new disable/enable routines instead of doing
# everything by hand.
# --------------------------------------------
# 03/07/31 david-b@pacbell.net 1.1547.9.32
# [PATCH] USB: usb_unlink_urb() kerneldoc
#
# This been sitting in my queue for ages now ... it just
# clarifies three points about unlink semantics. Basically,
#
# - You can only unlink once per submission.
#
# - For synchronous unlink: urb completes, then unlink returns.
#
# - For async unlink: the order is unspecified; although usually
# the completion happens after unlink returns.
# --------------------------------------------
# 03/07/31 david-b@pacbell.net 1.1547.9.33
# [PATCH] USB: ehci-hcd, show microframe schedules
#
# This updates the ehci periodic schedule dumping code to be
# more useful when displaying the interrupt transfer tree:
#
# - includes start/complete split frame mask in QH
# - gets rid of some needless output (more terse)
# - shows whether IN or OUT tds are queued, and how many
#
# The microframe info isn't yet very interesting, but it's
# helpful when a microframe scheduler is in use. (Which will
# be a patch some other time!)
# --------------------------------------------
# 03/07/31 david-b@pacbell.net 1.1547.9.34
# [PATCH] USB: ehci-hcd and period=1frame hs interrupts
#
# This resolves the slowdown Bernd Porr noticed, where rather a lot
# of useless work got done. It should apply to 2.4 too.
# --------------------------------------------
# 03/07/31 david-b@pacbell.net 1.1547.9.35
# [PATCH] USB: usb root hubs need longer timeout
#
# Root hubs should use 50 msec timeouts, not 10 msec. This will
# if nothing else eliminate some messages when using EHCI, which
# insists on the whole timeout!
# --------------------------------------------
# 03/08/01 jgarzik@redhat.com 1.1547.8.10
# Cset exclude: jgarzik@redhat.com|ChangeSet|20030731201437|53548
#
# My fix was wrong, and, mainline now has a better fix.
# --------------------------------------------
# 03/08/01 nathans@sgi.com 1.1560
# [XFS] Minor cleanups for unwritten extent fix, using one less variable on the stack
#
# SGI Modid: 2.5.x-xfs:slinx:154771a
# --------------------------------------------
# 03/08/01 nathans@sgi.com 1.1561
# [XFS] Forward port 2.4 pagebuf locking to 2.5, based on Steve's analysis - to fix the infamous pagebuf IO completion buglet.
#
# SGI Modid: 2.5.x-xfs:slinx:154781a
# --------------------------------------------
# 03/08/01 lord@jen.americas.sgi.com 1.1562
# Do not include linux/version.h - no need for it
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1547.1.75
# merge
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.1
# [PATCH] misc fixes
#
# - remove unneeded loglevel manipulation in journal_dirty_metadata()
#
# - remove crud which was acidentally added to blkmtd.c
#
# - remove unused vars in mxser.c (Vinay K Nallamothu <vinay-rc@naturesoft.net>)
#
# - PF_LESS_THROTTLE was using the wrong bit (Joe Korty <joe.korty@ccur.com>)
#
# - unused var in cyclades.c ("Krishnakumar. R" <krishnakumar@naturesoft.net>)
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.2
# [PATCH] selinux merge
#
# From Stephen Smalley <sds@epoch.ncsc.mil>
#
# This has been in -mm for a few weeks and James Morris has been
# regression testing each release.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.3
# [PATCH] re-slabify i386 pgd's and pmd's
#
# From: William Lee Irwin III <wli@holomorphy.com>
#
# The original pgd/pmd slabification patches had a critical bug on
# non-PAE where both modifications of pgd entries to remove pagetables
# attached for non-PSE mappings back to a PSE state and modifications of
# pgd entries to attach pagetables to bring PSE mappings into a non-PSE
# state were not propagated to cached pgd's. PAE was immune to it owing
# to the shared kernel pmd.
#
# The following patch vs. 2.5.69 restores the slabification done to cache
# preconstructed pagetables with the proper propagation of conversions
# to and from PSE mappings to cached pgd's for the non-PAE case.
#
# This is an optimization to reduce the bitblitting overhead for spawning
# small tasks (for larger ones, bottom-level pagetable copies dominate)
# primarily on non-PAE; the PAE code change is largely to remove #ifdefs
# and to treat the two cases uniformly, though some positive but small
# performance improvement has been observed for PAE in one of mbligh's
# posts. The non-PAE performance improvement has been observed on a box
# running a script-heavy end-user workload as a large long-term profile
# hit count reduction for pgd_alloc() and relatives thereof.
#
# I would very much appreciate outside testers. Even though I've been
# able to verify this boots and runs properly and survives several cycles
# of restarting X on my non-PAE Thinkpad T21, that environment has never
# been able to reproduce the bug. Those with the proper graphics hardware
# to prod the affected codepaths into action are the ones best suited to
# verify proper functionality. There is also some locking introduced; if
# some performance verification on non-PAE SMP i386 targets (my SMP
# targets unfortunately all require PAE due to arch code dependencies)
# that also have the proper hardware could be done, that would help
# determine whether alternative locking schemes that competed against
# the one shown here are preferable (in particular, the ticket-based
# scheme mentioned in the comments).
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.4
# [PATCH] buffer.c debugging
#
# We get a bug report about once per month wherein find_get_block_slow() spits
# an error message. For some reason we have buffers against a blockdev page
# which have the incorrect b_size.
#
# Probably, an earlier set_blcoksize() failed to invalidate all the apges for
# some reason. I just don't know.
#
# The patch adds a bit of extra debug info to aid in diagnosing this.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.5
# [PATCH] update to speedstep-centrino.c
#
# From: Jeremy Fitzhardinge <jeremy@goop.org>
#
# The 900MHz Pentium M has two spaces before the frequency:
# "Intel(R) Pentium(R) M processor 900MHz"
#
# This patch adds a 2nd CPU macro (_CPU) which also takes the
# stringified speed so that extra spacing can be added.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.6
# [PATCH] 3c59x suspend/resume fix
#
# Currently, all of the 3c59x power management code is disabled unless the
# `enable_wol' module parameter is provided. This was done because the PM
# support was added quite late in the 2.4 cycle.
#
# It was always intended that this conditionality be removed in 2.5.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.7
# [PATCH] dev_t printing
#
# From: Greg KH <greg@kroah.com>
#
# Different architectures use different types for dev_t, so it is hard to
# print dev_t variables out correctly. Quite a lot of code is wrong now, and
# will continue to be wrong when 64-bit dev_t is merged.
#
# Greg's patch introduces a little wrapper function which can be used to
# safely form a dev_t for printing. I added the format_dev_t function as
# well, which is needed for direct insertion in a printk statement.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.8
# [PATCH] non-MII 3c59x fix
#
# From: Marc Zyngier <mzyngier@freesurf.fr>
#
# The following patch tries to fix a small bug that crept in at some
# point during 2.5.
#
# None of my 3c592 or 3c597 would work if I didn't force media
# type. Instead, it would try to probe MII, looking for a suitable
# transceiver, and finaly give up, because these cards really do not
# have any sort of MII... :
#
# EISA: Probing bus 0 at Intel Corp. 82375EB
# EISA: Mainboard DEC5000 detected.
# EISA: slot 2 : ADP0001 detected.
# EISA: slot 3 : ADP7771 detected.
# EISA: slot 4 : DPTA401 detected.
# EISA: slot 5 : TCM5920 detected.
# 3c59x: Donald Becker and others. www.scyld.com/network/vortex.html
# 00:05: 3Com EISA 3c592 EISA 10Mbps Demon/Vortex at 0x5000. Vers LK1.1.19
# ***WARNING*** No MII transceivers found!
# EISA: Detected 4 cards.
#
# With the enclosed patch, it just works, at least on my setup (3c592 on
# Alpha, and 3c597 on x86). I haven't been able to test it didn't break
# cards with MII, because I do not have such cards in my test boxes...
#
# The patch also removes two useless EISA-only #define I introduced some
# time ago.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.9
# [PATCH] kwsapd can free too much memory
#
# We need to subtract the number of freed slab pages from the number of pages
# to free, not add it.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.10
# [PATCH] unlock_buffer() needs a barrier
#
# From: Chris Mason <mason@suse.com>
#
# unlock_buffer() needs a barrier before the waitqueue_active() optimisation.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.11
# [PATCH] Interface to invalidate regions of mmaps
#
# From: "Paul E. McKenney" <paulmck@us.ibm.com>
#
# The patch reworks and generalises vmtruncate_list() a bit to create an API
# which invalidates a specified portion of an address_space, permitting
# distributed filesystems to maintain POSIX semantics when a file mmap()ed on
# one client is modified on another client.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.12
# [PATCH] Fix vmtruncate race and distributed filesystem race
#
# From: Dave McCracken <dmccr@us.ibm.com>
#
# This patch solves the race between truncate and page in which can cause stray
# anon pages to appear in the truncated region.
#
# The race occurs when a process is sleeping in pagein IO during the truncate:
# there's a window after checking i_size in which the paging-in process decides
# that the page was an OK one.
#
# This leaves an anon page in the pagetables, and if the file is subsequently
# extended we have an anon page floating about inside a file-backed mmap - user
# modifications will not be written out.
#
# Apparently this is also needed for the implementation of POSIX semantics for
# distributed filesystems.
#
# We use a generation counter in the address_space so the paging-in process can
# determine whether there was a truncate which might have shot the new page
# down.
#
# It's a bit grubby to be playing with files and inodes in do_no_page(), but we
# do need the page_table_lock coverage for this, and rearranging thngs to
# provide that coverage to filemap_nopage wasn't very nice either.
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1547.18.1
# merge
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.13
# [PATCH] fix bogus IO error messages
#
# Since Jens added the pagecache readahead support in the block layer we've
# been getting bogus IO error messages from buffer.c due to __make_request
# calling end_io against a non-uptodate buffer.
#
# We can just use PF_READAHEAD to shut that up. But really, we shouldn't even
# have allocated all those pages and submittted the readahead IO if the queue
# was congested. We have the infrastructure to do that now.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.14
# [PATCH] rework readahead for congested queues
#
# Since Jens changed the block layer to fail readahead if the queue has no
# requests free, a few changes suggest themselves.
#
# - It's a bit silly to go and alocate a bunch of pages, build BIOs for them,
# submit the IO only to have it fail, forcing us to free the pages again.
#
# So the patch changes do_page_cache_readahead() to peek at the queue's
# read_congested state. If the queue is read-congested we abandon the entire
# readahead up-front without doing all that work.
#
# - If the queue is not read-congested, we go ahead and do the readahead,
# after having set PF_READAHEAD.
#
# The backing_dev_info's read-congested threshold cuts in when 7/8ths of
# the queue's requests are in flight, so it is probable that the readahead
# abandonment code in __make_request will now almost never trigger.
#
# - The above changes make do_page_cache_readahead() "unreliable", in that it
# may do nothing at all.
#
# However there are some system calls:
#
# - fadvise(POSIX_FADV_WILLNEED)
# - madvise(MADV_WILLNEED)
# - sys_readahead()
#
# In which the user has an expectation that the kernel will actually
# perform the IO.
#
# So the patch creates a new "force_page_cache_readahead()" which will
# perform the IO regardless of the queue's congestion state.
#
# Arguably, this is the wrong thing to do: even though the application
# requested readahead it could be that the kernel _should_ abandon the user's
# request because the disk is so busy.
#
# I don't know. But for now, let's keep the above syscalls behaviour
# unchanged. It is trivial to switch back to do_page_cache_readahead()
# later.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.15
# [PATCH] ext3: avoid reading empty inode blocks
#
# From: Alex Tomas <bzzz@tmi.comex.ru>
#
# ext3_get_inode_loc() read inode's block only if:
#
# 1) this inode has no copy in memory
# 2) inode's block has another valid inode(s)
#
# this optimization allows to avoid needless I/O in two cases:
#
# 1) just allocated inode is first valid in the inode's block
#
# 2) kernel wants to write inode, but buffer in which inode
# belongs to gets freed by VM
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.16
# [PATCH] Fix race in ext3_getblk
#
# From: Alex Tomas <bzzz@tmi.comex.ru>
#
# ext3_getblk() memsets a newly allocated buffer, but forgets to check
# whether a different thread brought it uptodate while we waited for the
# buffer lock.
#
# It's OK normally because we're serialised by the page lock. But lustre
# apparently is doing something different with getblk and hits this race.
#
# Plus I suspect it's racy with competing O_DIRECT writes.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.17
# [PATCH] ext3: don't start a commit in write_super()
#
# From: bzzz@tmi.comex.ru
#
# Now we have sync_fs(), the kludge of using write_super() to detect when the
# VFS is trying to sync the fs is unneeded.
#
# With this change we don't accidentally run commits in response to kupdate
# and bdflush activity and it speedup up some heavy workloads significantly.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.18
# [PATCH] fix alloc_bootmem_low_pages
#
# From: jbarnes@sgi.com (Jesse Barnes)
#
# This patch is needed for some discontig boxes since the memory maps may
# be built out-of-order.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.19
# [PATCH] soundcard.c devfs fix
#
# It is using "snd". It should be using "sound".
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.20
# [PATCH] 6PACK asumes HZ=100
#
# From: Hans-Joachim Hetscher <me@privacy.net>
#
# the Hamradio 6pack driver wasn't modified to work with the 1000 HZ
# internal kernel timebase.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.21
# [PATCH] devfs_lookup stack corruption fix rework
#
# From: Andrey Borzenkov <arvidjaar@mail.ru>
#
# A while back Andrey fixed a devfs bug in which we were running
# remove_wait_queue() against a wait_queue_head which was on another process's
# stack, and which had gone out of scope.
#
# The patch reverts that fix and does it the same way as 2.4: just leave the
# waitqueue struct dangling on the waitqueue_head: there is no need to touch it
# at all.
#
# It adds a big comment explaining why we are doing this nasty thing.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.22
# [PATCH] use mark_page_accessed() in the write() path
#
# We're currently just setting the referenced bit when modifying pagecache in
# write().
#
# Consequently overwritten (and redirtied) pages are remaining on the inactive
# list. The net result is that a lot of dirty pages are reaching the tail of
# the LRU in page reclaim and are getting written via the writepage() in there.
#
# But a core design objective is to minimise the amount of IO via that path,
# and to maximise the amount of IO via balance_dirty_pages(). Because the
# latter has better IO patterns.
#
# This may explain the bad IO patterns which Gerrit talked about at KS.
# --------------------------------------------
# 03/08/01 david-b@pacbell.net 1.1547.1.76
# [PATCH] USB: hcd initialization fix
#
# This cleans up HCD initialization by adding an explicit
# reset step, putting the device into a known state before
# resources are allocated. This step is implemented for
# EHCI, since some BIOS firmware seems to act quirky there,
# but nothing else yet. (OHCI would be just easy too.)
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.23
# [PATCH] fix kswapd throttling
#
# kswapd currently takes a throttling nap even if it freed all the pages it
# was asked to free.
#
# Change it so we only throttle if reclaim is not being sufficiently
# successful.
# --------------------------------------------
# 03/08/01 stern@rowland.harvard.edu 1.1547.1.77
# [PATCH] USB: Remove usb_set_maxpacket()
#
# This is the final part of as66c. It removes the usb_set_maxpacket()
# routine, since the same functionality now exists elsewhere. The one place
# it was used was in the device reset pathway for a device that has changed
# somehow since the previous reset. That code needs to be fixed up anyway;
# for now it's enough just to have it call usb_set_configuration().
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.24
# [PATCH] vmscan: decaying average of zone pressure
#
# From: Nikita Danilov <Nikita@Namesys.COM>
#
# The vmscan logic at present will scan the inactive list with increasing
# priority until a threshold is triggered. At that threshold we start
# unmapping pages from pagetables.
#
# The problem is that each time someone calls into this code, the priority is
# initially low, so some mapped pages will be refiled event hough we really
# should be unmapping them now.
#
# Nikita's patch adds the `pressure' field to struct zone. it is a decaying
# average of the zone's memory pressure and allows us to start unmapping pages
# immediately on entry to page reclaim, based on measurements which were made
# in earlier reclaim attempts.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.25
# [PATCH] vmscan: use zone_pressure for page unmapping
#
# From: Nikita Danilov <Nikita@Namesys.COM>
#
# Use zone->pressure (rathar than scanning priority) to determine when to
# start reclaiming mapped pages in refill_inactive_zone(). When using
# priority every call to try_to_free_pages() starts with scanning parts of
# active list and skipping mapped pages (because reclaim_mapped evaluates to
# 0 on low priorities) no matter how high memory pressure is.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.26
# [PATCH] direct-io support for XFS unwritten extents
#
# From: Nathan Scott <nathans@sgi.com>
#
# This patch adds a mechanism by which a filesystem can register an interest in
# the completion of direct I/O. The completion routine will be given the
# inode, an offset and a length, and an optional filesystem-private field.
#
# We have extended the use of the buffer_head-based interface (i.e.
# get_block_t) for direct I/O such that the b_private field is now utilised.
# It is defined to be initially zero at the start of I/O, and will be passed
# into the filesystem unmodified by the VFS with each map request, while
# setting up the direct I/O. Once I/O has completed the final value of this
# pointer will be passed into a filesystems I/O completion handler. This
# mechanism can be used to keep track of all of the mapping requests which
# encompass an individual direct I/O request.
#
# This has been implemented specifically for XFS, but is done so as to be as
# generic as possible. XFS uses this mechanism to provide support for
# unwritten extents - these are file extents which have been pre-allocated
# on-disk, but not yet written to (once written, these become regular file
# extents, but only once I/O is complete).
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.27
# [PATCH] Fix ipt_helper compilation
#
# From: florin@iucha.net (Florin Iucha)
#
# Fix compilation of net/ipv4/netfilter/ipt_helper.c by including the
# proper header files.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.28
# [PATCH] fix select() with an xoffed tty
#
# From: Manfred Spraul <manfred@colorfullife.com>
#
# Eli Barzilay noticed that select() for tty devices is broken: For
# stopped tty devices, select says POLLOUT and write fails with -EAGAIN.
#
# http://marc.theaimsgroup.com/?l=linux-kernel&m=105902461110282&w=2
#
# I've tracked this back to normal_poll in drivers/char/n_tty.c:
#
# > if (tty->driver->chars_in_buffer(tty) < WAKEUP_CHARS)
# > mask |= POLLOUT | POLLWRNORM;
#
# It assumes that a following write will succeed if less than 256 bytes
# are in the write buffer right now. This assumption is wrong for
# con_write_room: if the console is stopped, it returns 0 bytes buffer
# size (con_write_room()). Ditto for pty_write_room.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.29
# [PATCH] fix ip_conntrack_core.h compile error
#
# From: Felipe Alfaro Solana <felipe_alfaro@linuxmail.org>
#
# Fix compile error in 2.6.0-test2 when Netfilter IP connection tracking
# is enabled.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.30
# [PATCH] ext3: fix commit assertion failure
#
# We're getting asserion failures in commit in data=journal mode.
#
# journal_unmap_buffer() has unexpectedly donated this buffer to the committing
# transaction, and the commit-time assertion doesn't expect that to happen. It
# doesn't happen in 2.4 because both paths are under lock_journal().
#
# Simply remove the assertion: the commit code will uncheckpoint the buffer and
# then recheckpoint it if needed.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.31
# [PATCH] fix read_dir()
#
# This function tries to allocate increasingly large buffers, but it gets the
# bounds wrong by a factor of PAGE_SIZE. It causes boot-time devfs mounting
# to fail.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.32
# [PATCH] Move the special_file() definition
#
# From: <ffrederick@prov-liege.be>
#
# The special_file() macro is being duplicated in JFS. Move it to fs.h.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.33
# [PATCH] uidhash init-time locking
#
# From: <ffrederick@prov-liege.be>
#
# Add the necessary locking around uid_hash_insert() in uid_cache_init().
#
# (It's an initcall, and the chances of another CPU racing with us here are
# basically zero. But it's good for documentary purposes and the code gets
# dropped later anyway...)
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.34
# [PATCH] com20020_cs.c doesn't compile
#
# From: Adrian Bunk <bunk@fs.tum.de>
#
# drivers/net/pcmcia/com20020_cs.c wasn't updated to the module owner
# field changes
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.35
# [PATCH] pc300_drv build fix
#
# From: Adrian Bunk <bunk@fs.tum.de>
#
# Fix compile error introduced by the HDLC update.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.36
# [PATCH] binfmt_script argv[0] fix
#
# From: Arun Sharma <arun.sharma@intel.com>
#
# A script such as
#
# #!/bin/foo.bar
# ...
#
# where /bin/foo.bar is handled by binfmt_misc, is not handled correctly i.e.
# the interpreter of foo.bar doesn't receive the correct arguments.
#
# The binfmt_misc handler requires that bprm->filename is appropriately
# filled so that the argv[1] could be correctly passed to the interpreter.
#
# However, binfmt_script, as it exists today doesn't populate bprm->filename
# correctly.
#
# Another motivation for this patch is the output of ps. Emulators which use
# binfmt_misc may want to keep the output of ps consistent with native
# execution. This requires preserving bprm->filename. The attached patch
# guarantees this even if we have to go through several binfmt handlers
# (think of finite loops involving binfmt_script and binfmt_misc).
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.37
# [PATCH] Fix dac960 for devfs
#
# From: Dave Olien <dmo@osdl.org>
#
# It wasn't initializing the devfs_name member of the gendisk structures to
# contain the root name of the logical disk.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.38
# [PATCH] quota typo fix
#
# From: Herbert Potzl <herbert@13thfloor.at>
#
# quota.h typo fix
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.39
# [PATCH] i810fb oops fix
#
# The module device table is not NULL-terminated, so we run off the end during
# probing and oops.
#
# Also, move all those static decls out of .h and into .c
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.40
# [PATCH] export agp_memory_reserved
#
# nvidia-agp needs it.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.41
# [PATCH] IPMI build fix
#
# From: Adrian Bunk <bunk@fs.tum.de>
#
# Fix ACPI compile error if doing processor probing only: acpi_find_bmc is
# only available #ifdef CONFIG_ACPI_INTERPRETER.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.42
# [PATCH] generic HDLC updates
#
# From: Krzysztof Halasa <khc@pm.waw.pl>
#
# The following patch upgrades generic HDLC to support "new" protocol
# handlers.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.43
# [PATCH] dscc4 compile fix for hdlc
#
# From: Francois Romieu <romieu@fr.zoreil.com>
#
# The wan driver I maintain was hit by hdlc changes too. Please
# apply patch below. It is diffed against plain -test2 but it
# applies equally as well against -test2-mm2.
#
# More important changes will come in a near future for this
# driver but I'd rather keep the changes separated.
#
# Description:
# - after the hdlc changes, dscc4 module doesn't need to set
# hdlc->proto(.id) itself anymore;
# - MOD_{INC/DEC}_USE_COUNT removal;
# - SET_NETDEV_DEV() use;
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.44
# [PATCH] serial drivers are not experimental
#
# From: Andries.Brouwer@cwi.nl
#
# A few days ago I needed a serial line and couldnt find the option in
# menuconfig. Turned out that SERIAL_8250 depends on EXPERIMENTAL. I
# suppose that dependence should be removed.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.45
# [PATCH] ftl.c warning fix
#
# From: Adrian Bunk <bunk@fs.tum.de>
#
# A 16bit number can _never_ be > 65536. So don't bother to check for it.
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.46
# [PATCH] Watchdog: use module_param
#
# From: Wim Van Sebroeck <wim@iguana.be>
#
# The first patch convert these watchdog modules to the new module_param syntax.
#
# The second patch fixes machzwd.c (you need to declare the variable before
# using the module_param subroutine).
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.47
# [PATCH] export install_page() to modules
#
# install_page() is a library function which we expect will be used by all
# drivers which implement vm_operations.populate(). Therefore it should be
# exported to kernel modules.
#
# Petr Vandrovec has a project which involves sparse mappings of device memory
# which can use remap_file_pages(). It needs install_page().
# --------------------------------------------
# 03/08/01 akpm@osdl.org 1.1547.17.48
# [PATCH] cpu_idle() startup race fix
#
# Diagnosis from Christian Vogel <vogel@skunk.physik.uni-erlangen.de>
#
# cpu_idle() tests pm_idle() just once then falls into the
#
# while (!need_resched())
# idle();
#
# loop.
#
# Problem is, that loop never terminates (need_resched() always returns false
# on preemptive kernels).
#
# The other problem is that ACPI updates pm_idle _after_ cpu_idle() has taken a
# local copy. So we always call default_idle(), even when pm_idle is pointing
# at a new idle handler.
#
# So fix it to pick up changed values of pm_idle() each time around the inner
# loop.
# --------------------------------------------
# 03/08/01 mitch@sfgoth.com 1.1547.18.2
# [PATCH] PCI: Trivial DMA-mapping.txt fix
#
# As far as I can tell "pci_set_consistent()" doesn't exist - the docs probably
# meant to say "pci_set_consistent_dma_mask()".
# --------------------------------------------
# 03/08/01 mitch@sfgoth.com 1.1547.18.3
# [PATCH] PCI: add 2 entries to pci_ids.h
#
# These have been in the pci.ids file for awhile but not in <linux/pci_ids.h>
# They're used by my drivers/atm/lanai.c driver that has been in tree for
# some time now (it provides its own copy of these #define's protected by
# an #ifndef - I'll remove that once this patch goes into the mainline)
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1547.11.2
# I2C: remove devinitdata marking from i2c-nforce2.c as it's wrong.
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1547.1.78
# USB: fix up ALSA merge due to struct usb_interface changes.
# --------------------------------------------
# 03/08/01 torvalds@home.osdl.org 1.1563
# Merge XFS updates.
# --------------------------------------------
# 03/08/01 torvalds@home.osdl.org 1.1564
# Merge bk://kernel.bkbits.net/gregkh/linux/linus-2.6
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1565
# merge
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1566
# PCI: merge fixups.
# --------------------------------------------
# 03/08/01 jgarzik@redhat.com 1.1564.1.1
# Merge kernel.bkbits.net:net-drivers-2.6
# into redhat.com:/garz/repo/net-drivers-2.6
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1564.2.1
# Merge kroah.com:/home/greg/linux/BK/bleed-2.5
# into kroah.com:/home/greg/linux/BK/i2c-2.6
# --------------------------------------------
# 03/08/01 davem@nuts.ninka.net 1.1564.3.1
# Merge nuts.ninka.net:/home/davem/src/BK/network-2.5
# into nuts.ninka.net:/home/davem/src/BK/net-2.5
# --------------------------------------------
# 03/08/01 davem@nuts.ninka.net 1.1564.4.1
# Merge nuts.ninka.net:/home/davem/src/BK/sparcwork-2.5
# into nuts.ninka.net:/home/davem/src/BK/sparc-2.5
# --------------------------------------------
# 03/08/01 jack@ucw.cz 1.1567
# [PATCH] Fix old quota format locking
#
# This fixes a bug in locking (we take one lock twice) for old quota
# format. Without this patch the old format simply don't work (I really
# don't know how that could happen).
#
# Thanks go to Herbert Potzl who spotted it.
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1568
# [PATCH] janitor: don't init static data (arm26)
#
# By Leann Ogasawara <ogasawara@osdl.org>
#
# Uninitialize static variables initialized to 0 so they are pushed to the
# .bss instead of .data.
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1569
# [PATCH] janitor: add MODULE_LICENSE() in 2 drivers
#
# From: dan carpenter <error27@email.com>
#
# Neither one of these drivers has a clear maintainer. The patches are
# straight forward and tested. Both drivers are released under the GPL.
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1570
# [PATCH] janitor: make serio init/exit static
#
# From: Daniele Bellucci <bellucda@tiscali.it>
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1571
# [PATCH] janitor: use char arrays for strings
#
# From: maximilian attems <janitor@sternwelten.at>
#
# Use char arrays instead of char* for strings:
# a. uses a single variable instead of two.
# b. shorter code.
# c. __initdata will be completely dropped.
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1572
# [PATCH] jantior: return -EFAULT on copy_user error
#
# From: Daniele Bellucci <bellucda@tiscali.it>
#
# Return proper error code from copy_to_user failure in fs/sysfs/bin.c
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1573
# [PATCH] janitor: don't init statics to 0
#
# From: Leann Ogasawara <ogasawara@osdl.org>
#
# Uninitialize static variables initialized to 0 so they are pushed to the
# .bss instead of .data.
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1574
# [PATCH] don't init statics to 0 (fs/)
#
# From: Leann Ogasawara <ogasawara@osdl.org>
#
# Uninitialize static variables initialized to 0 so they are pushed to the
# .bss instead of .data.
# --------------------------------------------
# 03/08/01 rddunlap@osdl.org 1.1575
# [PATCH] janitor: convert to pci_name()
#
# [ GregKH has already done this is USB and PCI core. ]
#
# From: "Warren A. Layton" <zeevon@debian.org>
#
# Based on a request from Matthew Wilcox, convert instances of
# pci_dev->slot_name to use pci_name() instead:
#
# "In order to support PCI Domains, we have to stop using slot_name.
# It's related to driver model transition too since pci_dev->slot_name
# was redundant with pci_dev->dev.bus_id. So I introduced the inline
# function pci_name(). Now there's about 300-400 places in the tree
# that're using slot_name which need to be converted to use pci_name().
# once that's done, we can remove the slot_name pointer in pci_dev and
# save a (void *) per pci_dev."
# --------------------------------------------
# 03/08/01 davem@nuts.ninka.net 1.1564.4.2
# [SCSI]: Make dc395x.c build again.
# --------------------------------------------
# 03/08/01 torvalds@home.osdl.org 1.1576
# Merge bk://gkernel.bkbits.net/net-drivers-2.5
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/08/01 davem@nuts.ninka.net 1.1564.4.3
# [SPARC64]: Add some more symbol debugging in register dumps.
# --------------------------------------------
# 03/08/01 davem@nuts.ninka.net 1.1564.4.4
# [STRING]: Fix bug in generic strncpy() change.
# --------------------------------------------
# 03/08/01 davem@nuts.ninka.net 1.1564.4.5
# [SPARC64]: Propagate bprm->interp changes to sparc 32-bit compat layer.
# --------------------------------------------
# 03/08/01 davem@kernel.bkbits.net 1.1577
# Merge davem@nuts.ninka.net:/home/davem/src/BK/sparc-2.5
# into kernel.bkbits.net:/home/davem/sparc-2.5
# --------------------------------------------
# 03/08/01 torvalds@home.osdl.org 1.1578
# Mark the SiS DRM driver as depending on the SiS FBCON support. It
# won't even compile without it.
# --------------------------------------------
# 03/08/01 torvalds@home.osdl.org 1.1579
# Merge i830 IRQ handler cleanups from DRI CVS tree
# --------------------------------------------
# 03/08/01 torvalds@home.osdl.org 1.1580
# Update r128 drm driver from DRI CVS tree.
#
# This updates the driver from version 2.4.0->2.5.0, adding
# the CCM_FLIP command.
# --------------------------------------------
# 03/08/01 bellucda@tiscali.it 1.1564.2.2
# [PATCH] I2C: fixed a little memory leak in i2c-ali15x3.c
#
# there is a little memory leak in i2c-ali15x3.c .
# You can reproduce the BUG as follows:
# In a PC with no such device unloading i2c-ali15x3 cause an oops in release_region.
# I've fixed by moving release_region() from i2c_ali15x3_exit() to ali15x3_remove().
# --------------------------------------------
# 03/08/01 greg@kroah.com 1.1581
# Merge kroah.com:/home/greg/linux/BK/bleed-2.5
# into kroah.com:/home/greg/linux/BK/i2c-2.5
# --------------------------------------------
# 03/08/02 torvalds@home.osdl.org 1.1582
# Merge bk://linux-dj.bkbits.net/cpufreq
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/08/02 torvalds@home.osdl.org 1.1583
# Merge bk://linux-dj.bkbits.net/agpgart
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/08/02 torvalds@home.osdl.org 1.1584
# Fix up AGP merge: agp_memory_reserved got exported twice.
# --------------------------------------------
# 03/08/02 agrover@groveronline.com 1.1585
# [PATCH] ia64 fix for ACPI
#
# Make ACPI aware of the iosapic irq controller on ia64 machines.
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1586
# [PATCH] ide: kill no longer used CONFIG_BLK_DEV_IDE_MODES
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1587
# [PATCH] ide: kill no longer used CONFIG_BLK_DEV_NFORCE
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1588
# [PATCH] ide: kill no longer used CONFIG_BLK_DEV_PDC202XX
#
# and move help comment to CONFIG_BLK_DEV_PDC202XX_OLD
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1589
# [PATCH] ide: kill surplus menu in Kconfig
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1590
# [PATCH] ide: fix ordering in Kconfig
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1591
# [PATCH] ide: clean BLK_DEV_IDE dependencies in Kconfig
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1592
# [PATCH] ide: clean IDE_CHIPSETS dependencies in Kconfig
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1593
# [PATCH] ide: clean BLK_DEV_IDEDMA_PCI dependencies in Kconfig
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1594
# [PATCH] ide: use def_bool in Kconfig
# --------------------------------------------
# 03/08/02 B.Zolnierkiewicz@elka.pw.edu.pl 1.1595
# [PATCH] move "config SOUND" to sound/Kconfig
#
# Allows all architectures to simply include the sound/Kconfig file.
# Now somebody can finally update the comment for CONFIG_SOUND ;-).
# --------------------------------------------
# 03/08/02 hirofumi@mail.parknet.co.jp 1.1596
# [PATCH] Fix the vfat dentry handling fix
#
# This adds the forgotten test whether it's negative dentry. That test
# should be needed only in negative dentry case.
#
# Removes unneeded dcache_lock.
#
# (NOTE: vfat still has the filename case problem on mkdir(), rename() etc.)
# --------------------------------------------
# 03/08/02 hirofumi@mail.parknet.co.jp 1.1597
# [PATCH] uses ->i_pos instead of ->i_ino on fat_fs_panic()
#
# This uses ->i_pos instead of ->i_ino on fat_fs_panic() because ->i_ino
# is not useful.
#
# loff_t is _signed_ long long, so format string should use "%lld".
#
#
# fs/fat/cache.c | 14 +++++++-------
# fs/fat/inode.c | 2 +-
# fs/fat/misc.c | 2 +-
# 3 files changed, 9 insertions(+), 9 deletions(-)
# --------------------------------------------
# 03/08/02 hirofumi@mail.parknet.co.jp 1.1598
# [PATCH] Consolidate dot-stripping code
#
# From Ren <l.s.r@web.de>
#
# there are several places inside fs/vfat/namei.c where the length of a
# struct qstr without any trailing dots is calculated. The patch below
# adds a function vfat_striptail_len() which does that and makes use of it.
# --------------------------------------------
# 03/08/02 hirofumi@mail.parknet.co.jp 1.1599
# [PATCH] Inline vfat_strnicmp()
#
# From Ren <l.s.r@web.de>
#
# the function vfat_strnicmp() has just one callsite. Inlining it
# actually shrinks vfat.o slightly.
# --------------------------------------------
# 03/08/02 hirofumi@mail.parknet.co.jp 1.1600
# [PATCH] more use fat_get_short_entry()
#
# This uses fat_get_short_entry() in fat_dir_empty(). Moves fat_scan() and
# fat_subdirs() to dir.c.
# --------------------------------------------
# 03/08/02 davem@nuts.ninka.net 1.1584.1.1
# [SPARC64]: More tomatillo PCI controller fixes.
# - Use ino-bitmap property to figure out which PCI bus
# module each interrupt gets routed through.
# - Fix timeout setting in PCI control register
# - Do not enable DTO interrupts.
# - Use the correct IGN in INOs on Tomatillo.
# --------------------------------------------
# 03/08/02 davem@nuts.ninka.net 1.1584.1.2
# [TG3]: More Sun onboard 5704 fixes.
# - Add TG3_FLG2_SUN_5704, set it at probe time.
# - Do not try to use NVRAM on Sun 5704 chips.
# - Handle lack of firmware on Sun 5704 chips.
# --------------------------------------------
# 03/08/02 davem@nuts.ninka.net 1.1584.2.1
# Merge nuts.ninka.net:/home/davem/src/BK/network-2.5
# into nuts.ninka.net:/home/davem/src/BK/net-2.5
# --------------------------------------------
# 03/08/02 rddunlap@osdl.org 1.1584.2.2
# [NET]: janitor: don't init statics to 0.
# --------------------------------------------
# 03/08/02 chas@cmf.nrl.navy.mil 1.1584.2.3
# [ATM]: Convert cli() to spinlock in ZATM driver.
# --------------------------------------------
# 03/08/02 shemminger@osdl.org 1.1584.2.4
# [BRIDGE]: Fix bridge notification processing.
# --------------------------------------------
# 03/08/02 buffer@antifork.org 1.1584.2.5
# [NET]: Convert tc35815.c to spinlocks.
# --------------------------------------------
# 03/08/02 herbert@gondor.apana.org.au 1.1584.2.6
# [XFRM]: Fix OOPS in xfrm_state_update.
# --------------------------------------------
# 03/08/02 herbert@gondor.apana.org.au 1.1584.2.7
# [XFRM_USER]: Pass correct args to xfrm_find_acq().
# --------------------------------------------
# 03/08/02 herbert@gondor.apana.org.au 1.1584.2.8
# [XFRM_USER]: Fix spurious NLMSG_ERROR messages.
# --------------------------------------------
# 03/08/02 kaber@trash.net 1.1584.2.9
# [NETFILTER]: Fix logging of AH spis
# --------------------------------------------
# 03/08/02 laforge@netfilter.org 1.1584.2.10
# [NETFILTER]: Use in-kernel IPSEC structures in iptables ah (by Patrick McHardy).
# --------------------------------------------
# 03/08/02 laforge@netfilter.org 1.1584.2.11
# [NETFILTER]: Use in-kernel IPSEC structures in iptables esp (by Patrick McHardy).
# --------------------------------------------
# 03/08/02 daniel.ritz@gmx.ch 1.1584.2.12
# [IPV6]: Fix memory leak in esp6_input.
# --------------------------------------------
# 03/08/02 vnuorval@tcs.hut.fi 1.1584.2.13
# [IPV6]: Use correct hop-limit in ip6_push_pending_frames().
# --------------------------------------------
# 03/08/02 kuznet@ms2.inr.ac.ru 1.1584.2.14
# [IPV4]: IP options were not updated while forwarding multicasts.
# --------------------------------------------
# 03/08/02 kuznet@ms2.inr.ac.ru 1.1584.2.15
# [PKT_SCHED]: More reasonable PSCHED_JSCALE for various values of HZ.
# --------------------------------------------
# 03/08/02 davem@kernel.bkbits.net 1.1601
# Merge davem@nuts.ninka.net:/home/davem/src/BK/net-2.5
# into kernel.bkbits.net:/home/davem/net-2.5
# --------------------------------------------
# 03/08/02 davem@nuts.ninka.net 1.1584.1.3
# [SPARC64]: Update defconfig.
# --------------------------------------------
# 03/08/02 davem@kernel.bkbits.net 1.1600.1.1
# Merge davem@nuts.ninka.net:/home/davem/src/BK/sparc-2.5
# into kernel.bkbits.net:/home/davem/sparc-2.5
# --------------------------------------------
# 03/08/03 rmk@flint.arm.linux.org.uk 1.1600.2.1
# Merge flint.arm.linux.org.uk:/usr/src/linux-bk-2.5/linux-2.5
# into flint.arm.linux.org.uk:/usr/src/linux-bk-2.5/linux-2.5-pcmcia
# --------------------------------------------
# 03/08/03 benh@kernel.crashing.org 1.1600.1.2
# [PATCH] Fix mdelay's use of 'msec' name
#
# The mdelay() macro does the wrong thing if you try to use it with an
# argument expression that contains the (perfectly natural) variable name
# 'msec'.
#
# Fix it to use an internal variable that doesn't clash with normal
# naming.
# --------------------------------------------
# 03/08/03 torvalds@home.osdl.org 1.1602
# Merge bk://kernel.bkbits.net/davem/net-2.5
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
# 03/08/03 dth@dth.net 1.1603
# [PATCH] CREDITS change
#
# Trivial CREDITS update
# --------------------------------------------
# 03/08/03 rmk@flint.arm.linux.org.uk 1.1600.2.2
# [PCMCIA] Convert cs.c and rsrc_mgr.c to use named initialisers.
# --------------------------------------------
# 03/08/03 torvalds@home.osdl.org 1.1604
# Merge bk://bk.arm.linux.org.uk/linux-2.5-pcmcia
# into home.osdl.org:/home/torvalds/v2.5/linux
# --------------------------------------------
#
diff -Nru a/CREDITS b/CREDITS
--- a/CREDITS Sun Aug 3 13:14:50 2003
+++ b/CREDITS Sun Aug 3 13:14:50 2003
@@ -1185,8 +1185,8 @@
N: Danny ter Haar
E: dth@cistron.nl
-D: /proc/procinfo, reboot on panic , kernel pre-patch tester ;)
-S: Cistron Internet Services
+D: /proc/cpuinfo, reboot on panic , kernel pre-patch tester ;)
+S: Cistron
S: PO-Box 297
S: 2400 AG, Alphen aan den Rijn
S: The Netherlands
@@ -1522,17 +1522,12 @@
N: Dave Jones
E: davej@codemonkey.org.uk
-E: davej@suse.de
W: http://www.codemonkey.org.uk
D: x86 errata/setup maintenance.
D: AGPGART driver.
+D: CPUFREQ maintenance.
D: Backport/Forwardport merge monkey.
D: Various Janitor work.
-S: c/o SuSE Linux UK Ltd
-S: Appleton House
-S: 139 King Street
-S: Hammersmith
-S: W6 9JG
S: United Kingdom
N: Ani Joshi
@@ -2626,15 +2621,15 @@
S: France
N: Rik van Riel
-E: riel@conectiva.com.br
+E: riel@redhat.com
W: http://www.surriel.com/
D: Linux-MM site, Documentation/sysctl/*, swap/mm readaround
-D: clustering contributor, kswapd fixes, random kernel hacker,
+D: kswapd fixes, random kernel hacker, rmap VM,
D: nl.linux.org administrator, minor scheduler additions
-S: Conectiva S.A.
-S: R. Tocantins, 89 - Cristo Rei
-S: 80050-430 - Curitiba - Paraná
-S: Brazil
+S: Red Hat Boston
+S: 3 Lan Drive
+S: Westford, MA 01886
+S: USA
N: Pekka Riikonen
E: priikone@poseidon.pspt.fi
@@ -2980,6 +2975,14 @@
S: #102, 686 W. Maude Ave
S: Sunyvale, CA 94086
S: USA
+
+N: Michael Still
+E: mikal@stillhq.com
+W: http://www.stillhq.com
+D: Various janitorial patches
+D: mandocs and mandocs_install build targets
+S: (Email me and ask)
+S: Australia
N: Henrik Storner
E: storner@image.dk
diff -Nru a/Documentation/Changes b/Documentation/Changes
--- a/Documentation/Changes Sun Aug 3 13:14:52 2003
+++ b/Documentation/Changes Sun Aug 3 13:14:52 2003
@@ -61,9 +61,9 @@
o quota-tools 3.09 # quota -V
o PPP 2.4.0 # pppd --version
o isdn4k-utils 3.1pre1 # isdnctrl 2>&1|grep version
+o nfs-utils 1.0.5 # showmount --version
o procps 2.0.9 # ps --version
o oprofile 0.5.3 # oprofiled --version
-o nfs-utils 1.0.3 # showmount --version
Kernel compilation
==================
@@ -280,6 +280,34 @@
Due to changes in the length of the phone number field, isdn4k-utils
needs to be recompiled or (preferably) upgraded.
+NFS-utils
+---------
+
+In 2.4 and earlier kernels, the nfs server needed to know about any
+client that expected to be able to access files via NFS. This
+information would be given to the kernel by "mountd" when the client
+mounted the filesystem, or by "exportfs" at system startup. exportfs
+would take information about active clients from /var/lib/nfs/rmtab.
+
+This approach is quite fragile as it depends on rmtab being correct
+which is not always easy, particularly when trying to implement
+fail-over. Even when the system is working well, rmtab suffers from
+getting lots of old entries that never get removed.
+
+With 2.6 we have the option of having the kernel tell mountd when it
+gets a request from an unknown host, and mountd can give appropriate
+export information to the kernel. This removes the dependency on
+rmtab and means that the kernel only needs to know about currently
+active clients.
+
+To enable this new functionality, you need to:
+
+ mount -t nfsd nfsd /proc/fs/nfs
+
+before running exportfs or mountd. It is recommended that all NFS
+services be protected from the internet-at-large by a firewall where
+that is possible.
+
Getting updated software
========================
@@ -368,6 +396,10 @@
------------
o <ftp://ftp.isdn4linux.de/pub/isdn4linux/utils/isdn4k-utils.v3.1pre1.tar.gz>
+NFS-utils
+---------
+o <http://sourceforge.net/project/showfiles.php?group_id=14>
+
Netfilter
---------
o <http://netfilter.filewatcher.org/iptables-1.2.tar.bz2>
@@ -381,7 +413,12 @@
OProfile
--------
o <http://oprofile.sf.net/download/>
-
+
+NFS-Utils
+---------
+o <http://nfs.sourceforge.net/>
+
+
Suggestions and corrections
===========================
diff -Nru a/Documentation/DMA-mapping.txt b/Documentation/DMA-mapping.txt
--- a/Documentation/DMA-mapping.txt Sun Aug 3 13:14:48 2003
+++ b/Documentation/DMA-mapping.txt Sun Aug 3 13:14:48 2003
@@ -183,7 +183,7 @@
pci_set_consistent_dma_mask() will always be able to set the same or a
smaller mask as pci_set_dma_mask(). However for the rare case that a
device driver only uses consistent allocations, one would have to
-check the return value from pci_set_consistent().
+check the return value from pci_set_consistent_dma_mask().
If your 64-bit device is going to be an enormous consumer of DMA
mappings, this can be problematic since the DMA mappings are a
diff -Nru a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile
--- a/Documentation/DocBook/Makefile Sun Aug 3 13:14:48 2003
+++ b/Documentation/DocBook/Makefile Sun Aug 3 13:14:48 2003
@@ -20,10 +20,11 @@
# file.tmpl --> file.sgml +--> file.ps (psdocs)
# +--> file.pdf (pdfdocs)
# +--> DIR=file (htmldocs)
+# +--> man/ (mandocs)
###
# The targets that may be used.
-.PHONY: sgmldocs psdocs pdfdocs htmldocs clean mrproper
+.PHONY: sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs
BOOKS := $(addprefix $(obj)/,$(DOCBOOKS))
sgmldocs: $(BOOKS)
@@ -37,10 +38,18 @@
HTML := $(patsubst %.sgml, %.html, $(BOOKS))
htmldocs: $(HTML)
+MAN := $(patsubst %.sgml, %.9, $(BOOKS))
+mandocs: $(MAN)
+
+installmandocs: mandocs
+ $(MAKEMAN) install Documentation/DocBook/man
+
###
#External programs used
KERNELDOC = scripts/kernel-doc
DOCPROC = scripts/docproc
+SPLITMAN = $(PERL) $(srctree)/scripts/split-man
+MAKEMAN = $(PERL) $(srctree)/scripts/makeman
###
# DOCPROC is used for two purposes:
@@ -128,6 +137,13 @@
cp $(PNG-$(basename $(notdir $@))) $(patsubst %.html,%,$@); fi
###
+# Rule to generate man files - output is placed in the man subdirectory
+
+%.9: %.sgml
+ $(SPLITMAN) $< $(objtree)/Documentation/DocBook/man "$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)"
+ $(MAKEMAN) convert $(objtree)/Documentation/DocBook/man $<
+
+###
# Rules to generate postscripts and PNG imgages from .fig format files
quiet_cmd_fig2eps = FIG2EPS $@
cmd_fig2eps = fig2dev -Leps $< $@
@@ -157,10 +173,10 @@
# Help targets as used by the top-level makefile
dochelp:
@echo ' Linux kernel internal documentation in different formats:'
- @echo ' sgmldocs (SGML), psdocs (Postscript), pdfdocs (PDF), htmldocs (HTML)'
+ @echo ' sgmldocs (SGML), psdocs (Postscript), pdfdocs (PDF)'
+ @echo ' htmldocs (HTML), mandocs (man pages, use installmandocs to install)'
###
-# clean and mrproper as used by the top-level makefile
# Temporary files left by various tools
clean-files := $(DOCBOOKS) \
$(patsubst %.sgml, %.dvi, $(DOCBOOKS)) \
@@ -171,10 +187,14 @@
$(patsubst %.sgml, %.ps, $(DOCBOOKS)) \
$(patsubst %.sgml, %.pdf, $(DOCBOOKS)) \
$(patsubst %.sgml, %.html, $(DOCBOOKS)) \
- $(patsubst %.fig,%.eps, $(IMG-parportbook)) \
- $(patsubst %.fig,%.png, $(IMG-parportbook)) \
+ $(patsubst %.sgml, %.9, $(DOCBOOKS)) \
+ $(patsubst %.fig,%.eps, $(IMG-parportbook)) \
+ $(patsubst %.fig,%.png, $(IMG-parportbook)) \
$(C-procfs-example)
ifneq ($(wildcard $(patsubst %.html,%,$(HTML))),)
clean-rule := rm -rf $(wildcard $(patsubst %.html,%,$(HTML)))
endif
+
+#man put files in man subdir - traverse down
+subdir- := man/
diff -Nru a/Documentation/DocBook/man/Makefile b/Documentation/DocBook/man/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/Documentation/DocBook/man/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,3 @@
+# Rules are put in Documentation/DocBook
+
+clean-files := *.9.gz *.sgml manpage.links manpage.refs
diff -Nru a/Documentation/DocBook/sis900.tmpl b/Documentation/DocBook/sis900.tmpl
--- a/Documentation/DocBook/sis900.tmpl Sun Aug 3 13:14:49 2003
+++ b/Documentation/DocBook/sis900.tmpl Sun Aug 3 13:14:49 2003
@@ -471,8 +471,6 @@
</Para>
<Para><screen>
-make dep
-
make clean
make bzlilo
diff -Nru a/Documentation/README.DAC960 b/Documentation/README.DAC960
--- a/Documentation/README.DAC960 Sun Aug 3 13:14:45 2003
+++ b/Documentation/README.DAC960 Sun Aug 3 13:14:45 2003
@@ -212,7 +212,6 @@
patch -p0 < DAC960.patch (if DAC960.patch is included)
cd linux
make config
- make depend
make bzImage (or zImage)
Then install "arch/i386/boot/bzImage" or "arch/i386/boot/zImage" as your
diff -Nru a/Documentation/arm/README b/Documentation/arm/README
--- a/Documentation/arm/README Sun Aug 3 13:14:47 2003
+++ b/Documentation/arm/README Sun Aug 3 13:14:47 2003
@@ -30,9 +30,9 @@
eg.
CROSS_COMPILE=arm-linux-
- Do a 'make config', followed by 'make dep', and finally 'make Image' to
- build the kernel (arch/arm/boot/Image). A compressed image can be built
- by doing a 'make zImage' instead of 'make Image'.
+ Do a 'make config', followed by 'make Image' to build the kernel
+ (arch/arm/boot/Image). A compressed image can be built by doing a
+ 'make zImage' instead of 'make Image'.
Bug reports etc
diff -Nru a/Documentation/arm/SA1100/Assabet b/Documentation/arm/SA1100/Assabet
--- a/Documentation/arm/SA1100/Assabet Sun Aug 3 13:14:44 2003
+++ b/Documentation/arm/SA1100/Assabet Sun Aug 3 13:14:44 2003
@@ -16,7 +16,6 @@
make assabet_config
make oldconfig
- make dep
make zImage
The resulting kernel image should be available in linux/arch/arm/boot/zImage.
diff -Nru a/Documentation/arm/SA1100/Brutus b/Documentation/arm/SA1100/Brutus
--- a/Documentation/arm/SA1100/Brutus Sun Aug 3 13:14:46 2003
+++ b/Documentation/arm/SA1100/Brutus Sun Aug 3 13:14:46 2003
@@ -8,7 +8,6 @@
make brutus_config
make config
[accept all the defaults]
- make dep
make zImage
The resulting kernel will end up in linux/arch/arm/boot/zImage. This file
diff -Nru a/Documentation/arm/SA1100/CERF b/Documentation/arm/SA1100/CERF
--- a/Documentation/arm/SA1100/CERF Sun Aug 3 13:14:44 2003
+++ b/Documentation/arm/SA1100/CERF Sun Aug 3 13:14:44 2003
@@ -26,7 +26,6 @@
make cerf_config
make xconfig
- make dep
make zImage
cp arch/arm/boot/zImage <TFTP directory>
diff -Nru a/Documentation/arm/SA1100/HUW_WEBPANEL b/Documentation/arm/SA1100/HUW_WEBPANEL
--- a/Documentation/arm/SA1100/HUW_WEBPANEL Sun Aug 3 13:14:44 2003
+++ b/Documentation/arm/SA1100/HUW_WEBPANEL Sun Aug 3 13:14:44 2003
@@ -7,7 +7,6 @@
make huw_webpanel_config
make oldconfig
[accept all defaults]
- make dep
make zImage
Mostly of the work is done by:
diff -Nru a/Documentation/arm/SA1100/Itsy b/Documentation/arm/SA1100/Itsy
--- a/Documentation/arm/SA1100/Itsy Sun Aug 3 13:14:46 2003
+++ b/Documentation/arm/SA1100/Itsy Sun Aug 3 13:14:46 2003
@@ -13,7 +13,7 @@
enabled.
To build, do a "make menuconfig" (or xmenuconfig) and select Itsy support.
-Disable Flash and LCD support. and then do a make dep and a make zImage.
+Disable Flash and LCD support. and then do a make zImage.
Finally, you will need to cd to arch/arm/boot/tools and execute a make there
to build the params-itsy program used to boot the kernel.
diff -Nru a/Documentation/arm/SA1100/Pangolin b/Documentation/arm/SA1100/Pangolin
--- a/Documentation/arm/SA1100/Pangolin Sun Aug 3 13:14:50 2003
+++ b/Documentation/arm/SA1100/Pangolin Sun Aug 3 13:14:50 2003
@@ -8,7 +8,6 @@
make pangolin_config
make oldconfig
- make dep
make zImage
Supported peripherals:
diff -Nru a/Documentation/arm/XScale/ADIFCC/80200EVB b/Documentation/arm/XScale/ADIFCC/80200EVB
--- a/Documentation/arm/XScale/ADIFCC/80200EVB Sun Aug 3 13:14:52 2003
+++ b/Documentation/arm/XScale/ADIFCC/80200EVB Sun Aug 3 13:14:52 2003
@@ -35,7 +35,6 @@
change Linux makefile
make adi_evb_config
make oldconfig
-make dep
make zImage
Loading Linux
diff -Nru a/Documentation/arm/XScale/IOP3XX/IQ80310 b/Documentation/arm/XScale/IOP3XX/IQ80310
--- a/Documentation/arm/XScale/IOP3XX/IQ80310 Sun Aug 3 13:14:52 2003
+++ b/Documentation/arm/XScale/IOP3XX/IQ80310 Sun Aug 3 13:14:52 2003
@@ -39,7 +39,6 @@
-----------------------------
make iq80310_config
make oldconfig
-make dep
make zImage
This will build an image setup for BOOTP/NFS root support. To change this,
diff -Nru a/Documentation/arm/XScale/IOP3XX/IQ80321 b/Documentation/arm/XScale/IOP3XX/IQ80321
--- a/Documentation/arm/XScale/IOP3XX/IQ80321 Sun Aug 3 13:14:51 2003
+++ b/Documentation/arm/XScale/IOP3XX/IQ80321 Sun Aug 3 13:14:51 2003
@@ -37,7 +37,6 @@
-----------------------------
make iq80321_config
make oldconfig
-make dep
make zImage
This will build an image setup for BOOTP/NFS root support. To change this,
diff -Nru a/Documentation/cdrom/cm206 b/Documentation/cdrom/cm206
--- a/Documentation/cdrom/cm206 Sun Aug 3 13:14:48 2003
+++ b/Documentation/cdrom/cm206 Sun Aug 3 13:14:48 2003
@@ -56,7 +56,7 @@
2) then do a
- make dep; make clean; make zImage; make modules
+ make clean; make zImage; make modules
3) do the usual things to install a new image (backup the old one, run
`rdev -R zImage 1', copy the new image in place, run lilo). Might
diff -Nru a/Documentation/cdrom/gscd b/Documentation/cdrom/gscd
--- a/Documentation/cdrom/gscd Sun Aug 3 13:14:51 2003
+++ b/Documentation/cdrom/gscd Sun Aug 3 13:14:51 2003
@@ -37,7 +37,7 @@
like a module, don't select 'GoldStar CDROM support'. By the way, you
have to include the iso9660 filesystem.
-Now start compiling the kernel with 'make dep ; make zImage'.
+Now start compiling the kernel with 'make zImage'.
If you want to use the driver as a module, you have to do 'make modules'
and 'make modules_install', additionally.
Install your new kernel as usual - maybe you do it with 'make zlilo'.
diff -Nru a/Documentation/cdrom/sbpcd b/Documentation/cdrom/sbpcd
--- a/Documentation/cdrom/sbpcd Sun Aug 3 13:14:50 2003
+++ b/Documentation/cdrom/sbpcd Sun Aug 3 13:14:50 2003
@@ -229,7 +229,7 @@
second, third, or fourth controller installed, do not say "y" to the
secondary Matsushita CD-ROM questions.
-3. Then do a "make dep", then make the kernel image ("make zlilo" or similar).
+3. Then make the kernel image ("make zlilo" or similar).
4. Make the device file(s). This step usually already has been done by the
MAKEDEV script.
diff -Nru a/Documentation/computone.txt b/Documentation/computone.txt
--- a/Documentation/computone.txt Sun Aug 3 13:14:51 2003
+++ b/Documentation/computone.txt Sun Aug 3 13:14:51 2003
@@ -60,12 +60,11 @@
or
edit /etc/modules.conf if needed (module).
or both to match this setting.
-d) Run "make dep"
-e) Run "make modules"
-f) Run "make modules_install"
-g) Run "/sbin/depmod -a"
-h) install driver using `modprobe ip2 <options>` (options listed below)
-i) run ip2mkdev (either the script below or the binary version)
+d) Run "make modules"
+e) Run "make modules_install"
+f) Run "/sbin/depmod -a"
+g) install driver using `modprobe ip2 <options>` (options listed below)
+h) run ip2mkdev (either the script below or the binary version)
Kernel installation:
@@ -77,13 +76,12 @@
c) Set address on ISA cards then:
edit /usr/src/linux/drivers/char/ip2.c
(Optional - may be specified on kernel command line now)
-d) Run "make dep"
-e) Run "make zImage" or whatever target you prefer.
-f) mv /usr/src/linux/arch/i386/boot/zImage to /boot.
-g) Add new config for this kernel into /etc/lilo.conf, run "lilo"
+d) Run "make zImage" or whatever target you prefer.
+e) mv /usr/src/linux/arch/i386/boot/zImage to /boot.
+f) Add new config for this kernel into /etc/lilo.conf, run "lilo"
or copy to a floppy disk and boot from that floppy disk.
-h) Reboot using this kernel
-i) run ip2mkdev (either the script below or the binary version)
+g) Reboot using this kernel
+h) run ip2mkdev (either the script below or the binary version)
Kernel command line options:
@@ -176,7 +174,6 @@
If you select the driver as part of the kernel run :
- make depend
make zlilo (or whatever you do to create a bootable kernel)
If you selected a module run :
diff -Nru a/Documentation/cpu-freq/core.txt b/Documentation/cpu-freq/core.txt
--- a/Documentation/cpu-freq/core.txt Sun Aug 3 13:14:51 2003
+++ b/Documentation/cpu-freq/core.txt Sun Aug 3 13:14:51 2003
@@ -73,9 +73,9 @@
The third argument, a void *pointer, points to a struct cpufreq_policy
consisting of five values: cpu, min, max, policy and max_cpu_freq. min
and max are the lower and upper frequencies (in kHz) of the new
-policy, policy the new policy, cpu the number of the affected CPU or
-CPUFREQ_ALL_CPUS for all CPUs; and max_cpu_freq the maximum supported
-CPU frequency. This value is given for informational purposes only.
+policy, policy the new policy, cpu the number of the affected CPU; and
+max_cpu_freq the maximum supported CPU frequency. This value is given
+for informational purposes only.
2.2 CPUFreq transition notifiers
@@ -89,6 +89,6 @@
The third argument is a struct cpufreq_freqs with the following
values:
-cpu - number of the affected CPU or CPUFREQ_ALL_CPUS
+cpu - number of the affected CPU
old - old frequency
new - new frequency
diff -Nru a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt
--- a/Documentation/cpu-freq/cpu-drivers.txt Sun Aug 3 13:14:53 2003
+++ b/Documentation/cpu-freq/cpu-drivers.txt Sun Aug 3 13:14:53 2003
@@ -41,16 +41,17 @@
1.1 Initialization
------------------
-First of all, in an __initcall level 7 or later (preferrably
-module_init() so that your driver is modularized) function check
-whether this kernel runs on the right CPU and the right chipset. If
-so, register a struct cpufreq_driver with the CPUfreq core using
-cpufreq_register_driver()
+First of all, in an __initcall level 7 (module_init()) or later
+function check whether this kernel runs on the right CPU and the right
+chipset. If so, register a struct cpufreq_driver with the CPUfreq core
+using cpufreq_register_driver()
What shall this struct cpufreq_driver contain?
cpufreq_driver.name - The name of this driver.
+cpufreq_driver.owner - THIS_MODULE;
+
cpufreq_driver.init - A pointer to the per-CPU initialization
function.
@@ -76,8 +77,7 @@
cpufreq_driver.init is called. It takes a struct cpufreq_policy
*policy as argument. What to do now?
-If necessary, activate the CPUfreq support on your CPU (unlock that
-register etc.).
+If necessary, activate the CPUfreq support on your CPU.
Then, the driver must fill in the following values:
diff -Nru a/Documentation/cpu-freq/governors.txt b/Documentation/cpu-freq/governors.txt
--- a/Documentation/cpu-freq/governors.txt Sun Aug 3 13:14:49 2003
+++ b/Documentation/cpu-freq/governors.txt Sun Aug 3 13:14:49 2003
@@ -135,21 +135,21 @@
The CPUfreq governor may call the CPU processor driver using one of
these two functions:
-inline int cpufreq_driver_target(struct cpufreq_policy *policy,
+int cpufreq_driver_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation);
-inline int cpufreq_driver_target_l(struct cpufreq_policy *policy,
+int __cpufreq_driver_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation);
target_freq must be within policy->min and policy->max, of course.
What's the difference between these two functions? When your governor
still is in a direct code path of a call to governor->governor, the
-cpufreq_driver_sem lock is still held in the cpufreq core, and there's
+per-CPU cpufreq lock is still held in the cpufreq core, and there's
no need to lock it again (in fact, this would cause a deadlock). So
-use cpufreq_driver_target only in these cases. In all other cases (for
-example, when there's a "daemonized" function that wakes up every
-second), use cpufreq_driver_target_l to lock the cpufreq_driver_sem
-before the command is passed to the cpufreq processor driver.
+use __cpufreq_driver_target only in these cases. In all other cases
+(for example, when there's a "daemonized" function that wakes up
+every second), use cpufreq_driver_target to lock the cpufreq per-CPU
+lock before the command is passed to the cpufreq processor driver.
diff -Nru a/Documentation/cpu-freq/user-guide.txt b/Documentation/cpu-freq/user-guide.txt
--- a/Documentation/cpu-freq/user-guide.txt Sun Aug 3 13:14:45 2003
+++ b/Documentation/cpu-freq/user-guide.txt Sun Aug 3 13:14:45 2003
@@ -132,7 +132,7 @@
The preferred interface is located in the sysfs filesystem. If you
mounted it at /sys, the cpufreq interface is located in a subdirectory
"cpufreq" within the cpu-device directory
-(e.g. /sys/class/cpu/cpu0/cpufreq/ for the first CPU).
+(e.g. /sys/devices/system/cpu/cpu0/cpufreq/ for the first CPU).
cpuinfo_min_freq : this file shows the minimum operating
frequency the processor can run at(in kHz)
diff -Nru a/Documentation/filesystems/devfs/README b/Documentation/filesystems/devfs/README
--- a/Documentation/filesystems/devfs/README Sun Aug 3 13:14:47 2003
+++ b/Documentation/filesystems/devfs/README Sun Aug 3 13:14:47 2003
@@ -710,9 +710,8 @@
Finally, you need to make sure devfs is compiled into your kernel. Set
CONFIG_EXPERIMENTAL=y, CONFIG_DEVFS_FS=y and CONFIG_DEVFS_MOUNT=y by
using favourite configuration tool (i.e. make config or
-make xconfig) and then make dep; make clean and then
-recompile your kernel and modules. At boot, devfs will be mounted onto
-/dev.
+make xconfig) and then make clean and then recompile your kernel and
+modules. At boot, devfs will be mounted onto /dev.
If you encounter problems booting (for example if you forgot a
configuration step), you can pass devfs=nomount at the kernel
diff -Nru a/Documentation/isdn/README.HiSax b/Documentation/isdn/README.HiSax
--- a/Documentation/isdn/README.HiSax Sun Aug 3 13:14:45 2003
+++ b/Documentation/isdn/README.HiSax Sun Aug 3 13:14:45 2003
@@ -504,7 +504,7 @@
cd /usr/src/linux
make menuconfig
<ISDN subsystem - ISDN support -- HiSax>
- make clean; make dep; make zImage; make modules; make modules_install
+ make clean; make zImage; make modules; make modules_install
2. Install the new kernel
cp /usr/src/linux/arch/i386/boot/zImage /etc/kernel/linux.isdn
vi /etc/lilo.conf
diff -Nru a/Documentation/kbuild/00-INDEX b/Documentation/kbuild/00-INDEX
--- a/Documentation/kbuild/00-INDEX Sun Aug 3 13:14:46 2003
+++ b/Documentation/kbuild/00-INDEX Sun Aug 3 13:14:46 2003
@@ -1,10 +1,6 @@
00-INDEX
- this file: info on the kernel build process
-commands.txt
- - overview of kbuild commands
kconfig-language.txt
- specification of Config Language, the language in Kconfig files
-random.txt
- - description of generic config targets
makefiles.txt
- developer information for linux kernel makefiles
diff -Nru a/Documentation/kbuild/commands.txt b/Documentation/kbuild/commands.txt
--- a/Documentation/kbuild/commands.txt Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,113 +0,0 @@
-Overview of Kbuild Commands
-24 January 1999
-Michael Elizabeth Chastain, <mailto:mec@shout.net>
-
-
-
-=== Introduction
-
-Someday we'll get our arms around all this stuff and clean it up
-a little! Meanwhile, this file describes the system as it is today.
-
-
-
-=== Quick Start
-
-If you are building a kernel for the first time, here are the commands
-you need:
-
- make config
- make dep
- make bzImage
-
-Instead of 'make config', you can run 'make menuconfig' for a full-screen
-text interface, or 'make xconfig' for an X interface using TCL/TK.
-
-'make bzImage' will leave your new kernel image in arch/i386/boot/bzImage.
-You can also use 'make bzdisk' or 'make bzlilo'.
-
-See the lilo documentation for more information on how to use lilo.
-You can also use the 'loadlin' program to boot Linux from MS-DOS.
-
-Some computers won't work with 'make bzImage', either due to hardware
-problems or very old versions of lilo or loadlin. If your kernel image
-is small, you may use 'make zImage', 'make zdisk', or 'make zlilo'
-on theses systems.
-
-If you find a file name 'vmlinux' in the top directory of the source tree,
-just ignore it. This is an intermediate file and you can't boot from it.
-
-Other architectures: the information above is oriented towards the
-i386. On other architectures, there are no 'bzImage' files; simply
-use 'zImage' or 'vmlinux' as appropriate for your architecture.
-
-Note: the difference between 'zImage' files and 'bzImage' files is that
-'bzImage' uses a different layout and a different loading algorithm,
-and thus has a larger capacity. Both files use gzip compression.
-The 'bz' in 'bzImage' stands for 'big zImage', not for 'bzip'!
-
-
-
-=== Top Level Makefile targets
-
-Here are the targets available at the top level:
-
- make config, make oldconfig, make menuconfig, make xconfig
-
- Configure the Linux kernel. You must do this before almost
- anything else.
-
- config line-oriented interface
- oldconfig line-oriented interface, re-uses old values
- menuconfig curses-based full-screen interface
- xconfig X window system interface
-
- make checkconfig
-
- This runs a little perl script that checks the source tree for
- missing instances of #include <linux/config.h>. Someone needs to
- do this occasionally, because the C preprocessor will silently give
- bad results if these symbols haven't been included (it treats
- undefined symbols in preprocessor directives as defined to 0).
- Superfluous uses of #include <linux/config.h> are also reported,
- but you can ignore these, because smart CONFIG_* dependencies
- make them harmless.
-
- You can run 'make checkconfig' without configuring the kernel.
- Also, 'make checkconfig' does not modify any files.
-
- make checkhelp
-
- This runs another little perl script that checks the source tree
- for options that are in Config.in files but are not documented
- in scripts/Configure.help. Again, someone needs to do this
- occasionally. If you are adding configuration options, it's
- nice if you do it before you publish your patch!
-
- You can run 'make checkhelp' without configuring the kernel.
- Also, 'make checkhelp' does not modify any files.
-
- make dep, make depend
-
- 'make dep' is a synonym for the long form, 'make depend'.
-
- This command does two things. First, it computes dependency
- information about which .o files depend on which .h files.
- It records this information in a top-level file named .hdepend
- and in one file per source directory named .depend.
-
- Second, if you have CONFIG_MODVERSIONS enabled, 'make dep'
- computes symbol version information for all of the files that
- export symbols (note that both resident and modular files may
- export symbols).
-
- If you do not enable CONFIG_MODVERSIONS, you only have to run
- 'make dep' once, right after the first time you configure
- the kernel. The .hdepend files and the .depend file are
- independent of your configuration.
-
- If you do enable CONFIG_MODVERSIONS, you must run 'make dep'
- every time you change your configuration, because the module
- symbol version information depends on the configuration.
-
-[to be continued ...]
diff -Nru a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
--- a/Documentation/kbuild/makefiles.txt Sun Aug 3 13:14:50 2003
+++ b/Documentation/kbuild/makefiles.txt Sun Aug 3 13:14:50 2003
@@ -216,8 +216,8 @@
--- 3.5 Library file goals - lib-y
- Objects listed with obj-* is used for modules or
- are combined in a built-in.o for that specific directory.
+ Objects listed with obj-* are used for modules or
+ combined in a built-in.o for that specific directory.
There is also the possibility to list objects that will
be included in a library, lib.a.
All objects listed with lib-y are combined in a single
diff -Nru a/Documentation/kbuild/random.txt b/Documentation/kbuild/random.txt
--- a/Documentation/kbuild/random.txt Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-Code by Ghozlane Toumi <gtoumi@messel.emse.fr>, documentation by
-Keith Owens <kaos@ocs.com.au>
-
-In addition to the normal config targets you can make
-
- randconfig random configuration.
-
- allyes reply 'y' to all options, maximal kernel.
-
- allno reply 'n' to all options, minimal kernel.
-
- allmod build everything as modules where possible.
-
-
-All random configurations will satisfy the config rules, that is, all
-configurations should be valid. Any build errors indicate bugs in the
-config dependency rules or in the Makefiles.
-
-You can constrain the random configuration, e.g. you may want to force
-the use of modules or the absence of /proc or cramfs must be a module.
-If file .force_default exists then it is read to preset selected
-values, all other values will be randomly selected, subject to the
-config rules. The syntax of .force_default is:
-
-CONFIG_foo=value
- Force this value, for example CONFIG_MODULES=y, CONFIG_PROC_FS=n,
- CONFIG_RAMFS=m.
-
-# CONFIG_foo is not set
- Equivalent to CONFIG_foo=n, supported because this is the format used
- in .config. NOTE: The leading '#' is required.
-
-# list CONFIG_foo val1,val2,val3
- Pick a value for CONFIG_foo from the list. CONFIG_foo must be an int
- or hex option. NOTE: The leading '#' is required.
-
-# range CONFIG_foo min max
- Pick a value for CONFIG_foo in the range min <=> max. CONFIG_foo
- must be an int option. NOTE: The leading '#' is required.
-
-If you have repeated settings of the same option in .force_default then
-values take precedence over lists which take precedence over range.
-Within each group the last setting for an option is used.
-
-Answers "randomised" are bool(), tristate(), dep_tristate() and
-choice(). Unless specified in .force_default, int, hex, and string
-options use the default values from config.in.
diff -Nru a/Documentation/moxa-smartio b/Documentation/moxa-smartio
--- a/Documentation/moxa-smartio Sun Aug 3 13:14:48 2003
+++ b/Documentation/moxa-smartio Sun Aug 3 13:14:48 2003
@@ -254,19 +254,18 @@
a. cd /usr/src/linux
b. make clean /* take a few minutes */
- c. make dep /* take a few minutes */
- d. make bzImage /* take probably 10-20 minutes */
- e. Backup original boot kernel. /* optional step */
- f. cp /usr/src/linux/arch/i386/boot/bzImage /boot/vmlinuz
- g. Please make sure the boot kernel (vmlinuz) is in the
+ c. make bzImage /* take probably 10-20 minutes */
+ d. Backup original boot kernel. /* optional step */
+ e. cp /usr/src/linux/arch/i386/boot/bzImage /boot/vmlinuz
+ f. Please make sure the boot kernel (vmlinuz) is in the
correct position. If you use 'lilo' utility, you should
check /etc/lilo.conf 'image' item specified the path
which is the 'vmlinuz' path, or you will load wrong
(or old) boot kernel image (vmlinuz).
- h. chmod 400 /vmlinuz
- i. lilo
- j. rdev -R /vmlinuz 1
- k. sync
+ g. chmod 400 /vmlinuz
+ h. lilo
+ i. rdev -R /vmlinuz 1
+ j. sync
Note that if the result of "make zImage" is ERROR, then you have to
go back to Linux configuration Setup. Type "make config" in directory
diff -Nru a/Documentation/networking/00-INDEX b/Documentation/networking/00-INDEX
--- a/Documentation/networking/00-INDEX Sun Aug 3 13:14:51 2003
+++ b/Documentation/networking/00-INDEX Sun Aug 3 13:14:51 2003
@@ -97,7 +97,8 @@
sis900.txt
- SiS 900/7016 Fast Ethernet device driver info.
sk98lin.txt
- - SysKonnect SK-NET (SK-98xx) Gigabit Ethernet driver info.
+ - Marvell Yukon Chipset / SysKonnect SK-98xx compliant Gigabit
+ Ethernet Adapter family driver info
skfp.txt
- SysKonnect FDDI (SK-5xxx, Compaq Netelligent) driver info.
smc9.txt
diff -Nru a/Documentation/networking/DLINK.txt b/Documentation/networking/DLINK.txt
--- a/Documentation/networking/DLINK.txt Sun Aug 3 13:14:50 2003
+++ b/Documentation/networking/DLINK.txt Sun Aug 3 13:14:50 2003
@@ -93,7 +93,6 @@
(else included in the kernel:)
# make config (answer yes on CONFIG _NET, _INET and _DE600 or _DE620)
# make clean
- # make depend
# make zImage (or whatever magic you usually do)
o I use lilo to boot multiple kernels, so that I at least
diff -Nru a/Documentation/networking/arcnet.txt b/Documentation/networking/arcnet.txt
--- a/Documentation/networking/arcnet.txt Sun Aug 3 13:14:44 2003
+++ b/Documentation/networking/arcnet.txt Sun Aug 3 13:14:44 2003
@@ -108,7 +108,6 @@
make config
(be sure to choose ARCnet in the network devices
and at least one chipset driver.)
- make dep
make clean
make zImage
diff -Nru a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt
--- a/Documentation/networking/bonding.txt Sun Aug 3 13:14:46 2003
+++ b/Documentation/networking/bonding.txt Sun Aug 3 13:14:46 2003
@@ -43,10 +43,10 @@
For the latest version of the bonding driver, use kernel 2.4.12 or above
(otherwise you will need to apply a patch).
-Configure kernel with `make menuconfig/xconfig/config', and select
-"Bonding driver support" in the "Network device support" section. It is
-recommended to configure the driver as module since it is currently the only way
-to pass parameters to the driver and configure more than one bonding device.
+Configure kernel with `make menuconfig/xconfig/config', and select "Bonding
+driver support" in the "Network device support" section. It is recommended
+to configure the driver as module since it is currently the only way to
+pass parameters to the driver and configure more than one bonding device.
Build and install the new kernel and modules.
@@ -108,17 +108,17 @@
SLAVE=yes
BOOTPROTO=none
-Use DEVICE=eth1 in the ifcfg-eth1 config file. If you configure a second bonding
-interface (bond1), use MASTER=bond1 in the config file to make the network
-interface be a slave of bond1.
+Use DEVICE=eth1 in the ifcfg-eth1 config file. If you configure a second
+bonding interface (bond1), use MASTER=bond1 in the config file to make the
+network interface be a slave of bond1.
Restart the networking subsystem or just bring up the bonding device if your
administration tools allow it. Otherwise, reboot. On Red Hat distros you can
issue `ifup bond0' or `/etc/rc.d/init.d/network restart'.
-If the administration tools of your distribution do not support master/slave
-notation in configuring network interfaces, you will need to manually configure
-the bonding device with the following commands:
+If the administration tools of your distribution do not support
+master/slave notation in configuring network interfaces, you will need to
+manually configure the bonding device with the following commands:
# /sbin/ifconfig bond0 192.168.1.1 netmask 255.255.255.0 \
broadcast 192.168.1.255 up
@@ -166,8 +166,9 @@
ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.127.0.0.1 = 1
This problem is avoided by loading the bonding driver before any network
-drivers participating in a bond. Below is an example of loading the bonding
-driver first, the IP address 192.168.1.1 is correctly associated with ifDescr.2.
+drivers participating in a bond. Below is an example of loading the bonding
+driver first, the IP address 192.168.1.1 is correctly associated with
+ifDescr.2.
interfaces.ifTable.ifEntry.ifDescr.1 = lo
interfaces.ifTable.ifEntry.ifDescr.2 = bond0
@@ -200,6 +201,44 @@
parameters be specified, otherwise serious network degradation will occur
during link failures.
+arp_interval
+
+ Specifies the ARP monitoring frequency in milli-seconds.
+ If ARP monitoring is used in a load-balancing mode (mode 0 or 2), the
+ switch should be configured in a mode that evenly distributes packets
+ across all links - such as round-robin. If the switch is configured to
+ distribute the packets in an XOR fashion, all replies from the ARP
+ targets will be received on the same link which could cause the other
+ team members to fail. ARP monitoring should not be used in conjunction
+ with miimon. A value of 0 disables ARP monitoring. The default value
+ is 0.
+
+arp_ip_target
+
+ Specifies the ip addresses to use when arp_interval is > 0. These
+ are the targets of the ARP request sent to determine the health of
+ the link to the targets. Specify these values in ddd.ddd.ddd.ddd
+ format. Multiple ip adresses must be seperated by a comma. At least
+ one ip address needs to be given for ARP monitoring to work. The
+ maximum number of targets that can be specified is set at 16.
+
+downdelay
+
+ Specifies the delay time in milli-seconds to disable a link after a
+ link failure has been detected. This should be a multiple of miimon
+ value, otherwise the value will be rounded. The default value is 0.
+
+lacp_rate
+
+ Option specifying the rate in which we'll ask our link partner to
+ transmit LACPDU packets in 802.3ad mode. Possible values are:
+
+ slow or 0
+ Request partner to transmit LACPDUs every 30 seconds (default)
+
+ fast or 1
+ Request partner to transmit LACPDUs every 1 second
+
max_bonds
Specifies the number of bonding devices to create for this
@@ -207,18 +246,27 @@
the bonding driver is not already loaded, then bond0, bond1
and bond2 will be created. The default value is 1.
+miimon
+
+ Specifies the frequency in milli-seconds that MII link monitoring
+ will occur. A value of zero disables MII link monitoring. A value
+ of 100 is a good starting point. See High Availability section for
+ additional information. The default value is 0.
+
mode
- Specifies one of four bonding policies. The default is
-round-robin (balance-rr). Possible values are (you can use either the
-text or numeric option):
+ Specifies one of the bonding policies. The default is
+ round-robin (balance-rr). Possible values are (you can use
+ either the text or numeric option):
balance-rr or 0
+
Round-robin policy: Transmit in a sequential order
from the first available slave through the last. This
mode provides load balancing and fault tolerance.
active-backup or 1
+
Active-backup policy: Only one slave in the bond is
active. A different slave becomes active if, and only
if, the active slave fails. The bond's MAC address is
@@ -226,7 +274,8 @@
to avoid confusing the switch. This mode provides
fault tolerance.
- balance-xor or 2
+ balance-xor or 2
+
XOR policy: Transmit based on [(source MAC address
XOR'd with destination MAC address) modula slave
count]. This selects the same slave for each
@@ -234,16 +283,125 @@
balancing and fault tolerance.
broadcast or 3
+
Broadcast policy: transmits everything on all slave
interfaces. This mode provides fault tolerance.
-miimon
-
- Specifies the frequency in milli-seconds that MII link monitoring will
- occur. A value of zero disables MII link monitoring. A value of
- 100 is a good starting point. See High Availability section for
- additional information. The default value is 0.
+ 802.3ad or 4
+
+ IEEE 802.3ad Dynamic link aggregation. Creates aggregation
+ groups that share the same speed and duplex settings.
+ Transmits and receives on all slaves in the active
+ aggregator.
+
+ Pre-requisites:
+
+ 1. Ethtool support in the base drivers for retrieving the
+ speed and duplex of each slave.
+
+ 2. A switch that supports IEEE 802.3ad Dynamic link
+ aggregation.
+
+ balance-tlb or 5
+
+ Adaptive transmit load balancing: channel bonding that does
+ not require any special switch support. The outgoing
+ traffic is distributed according to the current load
+ (computed relative to the speed) on each slave. Incoming
+ traffic is received by the current slave. If the receiving
+ slave fails, another slave takes over the MAC address of
+ the failed receiving slave.
+
+ Prerequisite:
+
+ Ethtool support in the base drivers for retrieving the
+ speed of each slave.
+
+ balance-alb or 6
+
+ Adaptive load balancing: includes balance-tlb + receive
+ load balancing (rlb) for IPV4 traffic and does not require
+ any special switch support. The receive load balancing is
+ achieved by ARP negotiation. The bonding driver intercepts
+ the ARP Replies sent by the server on their way out and
+ overwrites the src hw address with the unique hw address of
+ one of the slaves in the bond such that different clients
+ use different hw addresses for the server.
+
+ Receive traffic from connections created by the server is
+ also balanced. When the server sends an ARP Request the
+ bonding driver copies and saves the client's IP information
+ from the ARP. When the ARP Reply arrives from the client,
+ its hw address is retrieved and the bonding driver
+ initiates an ARP reply to this client assigning it to one
+ of the slaves in the bond. A problematic outcome of using
+ ARP negotiation for balancing is that each time that an ARP
+ request is broadcasted it uses the hw address of the
+ bond. Hence, clients learn the hw address of the bond and
+ the balancing of receive traffic collapses to the current
+ salve. This is handled by sending updates (ARP Replies) to
+ all the clients with their assigned hw address such that
+ the traffic is redistributed. Receive traffic is also
+ redistributed when a new slave is added to the bond and
+ when an inactive slave is re-activated. The receive load is
+ distributed sequentially (round robin) among the group of
+ highest speed slaves in the bond.
+
+ When a link is reconnected or a new slave joins the bond
+ the receive traffic is redistributed among all active
+ slaves in the bond by intiating ARP Replies with the
+ selected mac address to each of the clients. The updelay
+ modeprobe parameter must be set to a value equal or greater
+ than the switch's forwarding delay so that the ARP Replies
+ sent to the clients will not be blocked by the switch.
+
+ Prerequisites:
+
+ 1. Ethtool support in the base drivers for retrieving the
+ speed of each slave.
+
+ 2. Base driver support for setting the hw address of a
+ device also when it is open. This is required so that there
+ will always be one slave in the team using the bond hw
+ address (the current_slave) while having a unique hw
+ address for each slave in the bond. If the current_slave
+ fails it's hw address is swapped with the new current_slave
+ that was chosen.
+
+multicast
+
+ Option specifying the mode of operation for multicast support.
+ Possible values are:
+
+ disabled or 0
+ Disabled (no multicast support)
+
+ active or 1
+ Enabled on active slave only, useful in active-backup mode
+
+ all or 2
+ Enabled on all slaves, this is the default
+
+primary
+
+ A string (eth0, eth2, etc) to equate to a primary device. If this
+ value is entered, and the device is on-line, it will be used first
+ as the output media. Only when this device is off-line, will
+ alternate devices be used. Otherwise, once a failover is detected
+ and a new default output is chosen, it will remain the output media
+ until it too fails. This is useful when one slave was preferred
+ over another, i.e. when one slave is 1000Mbps and another is
+ 100Mbps. If the 1000Mbps slave fails and is later restored, it may
+ be preferred the faster slave gracefully become the active slave -
+ without deliberately failing the 100Mbps slave. Specifying a
+ primary is only valid in active-backup mode.
+updelay
+
+ Specifies the delay time in milli-seconds to enable a link after a
+ link up status has been detected. This should be a multiple of miimon
+ value, otherwise the value will be rounded. The default value is 0.
+
use_carrier
Specifies whether or not miimon should use MII or ETHTOOL
@@ -265,80 +423,27 @@
0 will use the deprecated MII / ETHTOOL ioctls. The default
value is 1.
-downdelay
-
- Specifies the delay time in milli-seconds to disable a link after a
- link failure has been detected. This should be a multiple of miimon
- value, otherwise the value will be rounded. The default value is 0.
-
-updelay
-
- Specifies the delay time in milli-seconds to enable a link after a
- link up status has been detected. This should be a multiple of miimon
- value, otherwise the value will be rounded. The default value is 0.
-
-arp_interval
-
- Specifies the ARP monitoring frequency in milli-seconds.
- If ARP monitoring is used in a load-balancing mode (mode 0 or 2), the
- switch should be configured in a mode that evenly distributes packets
- across all links - such as round-robin. If the switch is configured to
- distribute the packets in an XOR fashion, all replies from the ARP
- targets will be received on the same link which could cause the other
- team members to fail. ARP monitoring should not be used in conjunction
- with miimon. A value of 0 disables ARP monitoring. The default value
- is 0.
-
-arp_ip_target
-
- Specifies the ip addresses to use when arp_interval is > 0. These are
- the targets of the ARP request sent to determine the health of the link
- to the targets. Specify these values in ddd.ddd.ddd.ddd format.
- Multiple ip addresses must be separated by a comma. At least one ip
- address needs to be given for ARP monitoring to work. The maximum number
- of targets that can be specified is set at 16.
-
-primary
-
- A string (eth0, eth2, etc) to equate to a primary device. If this
- value is entered, and the device is on-line, it will be used first as
- the output media. Only when this device is off-line, will alternate
- devices be used. Otherwise, once a failover is detected and a new
- default output is chosen, it will remain the output media until it too
- fails. This is useful when one slave was preferred over another, i.e.
- when one slave is 1000Mbps and another is 100Mbps. If the 1000Mbps
- slave fails and is later restored, it may be preferred the faster slave
- gracefully become the active slave - without deliberately failing the
- 100Mbps slave. Specifying a primary is only valid in active-backup mode.
-
-multicast
-
- Option specifying the mode of operation for multicast support.
- Possible values are:
-
- disabled or 0
- Disabled (no multicast support)
-
- active or 1
- Enabled on active slave only, useful in active-backup mode
-
- all or 2
- Enabled on all slaves, this is the default
-
Configuring Multiple Bonds
==========================
-If several bonding interfaces are required, the driver must be loaded
-multiple times. For example, to configure two bonding interfaces with link
-monitoring performed every 100 milli-seconds, the /etc/conf.modules should
+If several bonding interfaces are required, either specify the max_bonds
+parameter (described above), or load the driver multiple times. Using
+the max_bonds parameter is less complicated, but has the limitation that
+all bonding instances created will have the same options. Loading the
+driver multiple times allows each instance of the driver to have differing
+options.
+
+For example, to configure two bonding interfaces, one with mii link
+monitoring performed every 100 milliseconds, and one with ARP link
+monitoring performed every 200 milliseconds, the /etc/conf.modules should
resemble the following:
alias bond0 bonding
alias bond1 bonding
options bond0 miimon=100
-options bond1 -o bonding1 miimon=100
+options bond1 -o bonding1 arp_interval=200 arp_ip_target=10.0.0.1
Configuring Multiple ARP Targets
================================
@@ -347,8 +452,9 @@
in a High Availability setup to have several targets to monitor. In the
case of just one target, the target itself may go down or have a problem
making it unresponsive to ARP requests. Having an additional target (or
-several) would increase the reliability of the ARP monitoring.
-Multiple ARP targets must be separated by commas as follows:
+several) increases the reliability of the ARP monitoring.
+
+Multiple ARP targets must be seperated by commas as follows:
# example options for ARP monitoring with three targets
alias bond0 bonding
@@ -410,9 +516,10 @@
Switch Configuration
====================
-While the switch does not need to be configured when the active-backup
-policy is used (mode=1), it does need to be configured for the round-robin,
-XOR, and broadcast policies (mode=0, mode=2, and mode=3).
+While the switch does not need to be configured when the active-backup,
+balance-tlb or balance-alb policies (mode=1,5,6) are used, it does need to
+be configured for the round-robin, XOR, broadcast, or 802.3ad policies
+(mode=0,2,3,4).
Verifying Bond Configuration
@@ -420,7 +527,7 @@
1) Bonding information files
----------------------------
-The bonding driver information files reside in the /proc/net/bond* directories.
+The bonding driver information files reside in the /proc/net/bond* directories.
Sample contents of /proc/net/bond0/info after the driver is loaded with
parameters of mode=0 and miimon=1000 is shown below.
@@ -445,7 +552,8 @@
The network configuration can be verified using the ifconfig command. In
the example below, the bond0 interface is the master (MASTER) while eth0 and
eth1 are slaves (SLAVE). Notice all slaves of bond0 have the same MAC address
-(HWaddr) as bond0.
+(HWaddr) as bond0 for all modes except TLB and ALB that require a unique MAC
+address for each slave.
[root]# /sbin/ifconfig
bond0 Link encap:Ethernet HWaddr 00:C0:F0:1F:37:B4
@@ -488,8 +596,7 @@
3. How many bonding devices can I have?
- One for each module you load. See section on Module Parameters for how
- to accomplish this.
+ There is no limit.
4. How many slaves can a bonding device have?
@@ -508,10 +615,11 @@
For ethernet cards not supporting MII status, the arp_interval and
arp_ip_target parameters must be specified for bonding to work
correctly. If packets have not been sent or received during the
- specified arp_interval durration, an ARP request is sent to the targets
- to generate send and receive traffic. If after this interval, either
- the successful send and/or receive count has not incremented, the next
- slave in the sequence will become the active slave.
+ specified arp_interval durration, an ARP request is sent to the
+ targets to generate send and receive traffic. If after this
+ interval, either the successful send and/or receive count has not
+ incremented, the next slave in the sequence will become the active
+ slave.
If neither mii_monitor and arp_interval is configured, the bonding
driver will not handle this situation very well. The driver will
@@ -522,15 +630,16 @@
6. Can bonding be used for High Availability?
- Yes, if you use MII monitoring and ALL your cards support MII link
- status reporting. See section on High Availability for more information.
+ Yes, if you use MII monitoring and ALL your cards support MII link
+ status reporting. See section on High Availability for more
+ information.
7. Which switches/systems does it work with?
In round-robin and XOR mode, it works with systems that support
trunking:
- * Cisco 5500 series (look for EtherChannel support).
+ * Many Cisco switches and routers (look for EtherChannel support).
* SunTrunking software.
* Alteon AceDirector switches / WebOS (use Trunks).
* BayStack Switches (trunks must be explicitly configured). Stackable
@@ -538,7 +647,17 @@
units.
* Linux bonding, of course !
- In active-backup mode, it should work with any Layer-II switche.
+ In 802.3ad mode, it works with with systems that support IEEE 802.3ad
+ Dynamic Link Aggregation:
+
+ * Extreme networks Summit 7i (look for link-aggregation).
+ * Many Cisco switches and routers (look for LACP support; this may
+ require an upgrade to your IOS software; LACP support was added
+ by Cisco in late 2002).
+ * Foundry Big Iron 4000
+
+ In active-backup, balance-tlb and balance-alb modes, it should work
+ with any Layer-II switch.
8. Where does a bonding device get its MAC address from?
@@ -591,6 +710,20 @@
Broadcast policy transmits everything on all slave interfaces.
+ 802.3ad, based on XOR but distributes traffic among all interfaces
+ in the active aggregator.
+
+ Transmit load balancing (balance-tlb) balances the traffic
+ according to the current load on each slave. The balancing is
+ clients based and the least loaded slave is selected for each new
+ client. The load of each slave is calculated relative to its speed
+ and enables load balancing in mixed speed teams.
+
+ Adaptive load balancing (balance-alb) uses the Transmit load
+ balancing for the transmit load. The receive load is balanced only
+ among the group of highest speed active slaves in the bond. The
+ load is distributed with round-robin i.e. next available slave in
+ the high speed group of active slaves.
High Availability
=================
@@ -826,10 +959,6 @@
Use the arp_interval/arp_ip_target parameters to count incoming/outgoing
frames.
- - A Transmit Load Balancing policy is not currently available. This mode
- allows every slave in the bond to transmit while only one receives. If
- the "receiving" slave fails, another slave takes over the MAC address of
- the failed receiving slave.
Resources and Links
diff -Nru a/Documentation/networking/cs89x0.txt b/Documentation/networking/cs89x0.txt
--- a/Documentation/networking/cs89x0.txt Sun Aug 3 13:14:44 2003
+++ b/Documentation/networking/cs89x0.txt Sun Aug 3 13:14:44 2003
@@ -437,8 +437,8 @@
into the /usr/src/linux/drivers/net directory.
-3.) Go to /usr/src/linux directory and run 'make config' followed by 'make dep'
-and finally 'make' (or make bzImage) to rebuild the kernel.
+3.) Go to /usr/src/linux directory and run 'make config' followed by 'make'
+(or make bzImage) to rebuild the kernel.
4.) Use the DOS 'setup' utility to disable plug and play on the NIC.
diff -Nru a/Documentation/networking/ifenslave.c b/Documentation/networking/ifenslave.c
--- a/Documentation/networking/ifenslave.c Sun Aug 3 13:14:46 2003
+++ b/Documentation/networking/ifenslave.c Sun Aug 3 13:14:46 2003
@@ -140,8 +140,7 @@
#include <sys/types.h>
#include <sys/socket.h>
#include <sys/ioctl.h>
-#include <linux/if.h>
-#include <linux/if_arp.h>
+#include <net/if_arp.h>
#include <linux/if_ether.h>
#include <linux/if_bonding.h>
#include <linux/sockios.h>
diff -Nru a/Documentation/networking/sis900.txt b/Documentation/networking/sis900.txt
--- a/Documentation/networking/sis900.txt Sun Aug 3 13:14:45 2003
+++ b/Documentation/networking/sis900.txt Sun Aug 3 13:14:45 2003
@@ -215,8 +215,6 @@
on "SiS 900/7016 PCI Fast Ethernet Adapter support" when configuring
the kernel. Build the kernel image in the usual way
-make dep
-
make clean
make bzlilo
diff -Nru a/Documentation/networking/sk98lin.txt b/Documentation/networking/sk98lin.txt
--- a/Documentation/networking/sk98lin.txt Sun Aug 3 13:14:50 2003
+++ b/Documentation/networking/sk98lin.txt Sun Aug 3 13:14:50 2003
@@ -1,120 +1,161 @@
-(C)Copyright 1999-2001 SysKonnect GmbH.
+(C)Copyright 1999-2003 Marvell(R).
All rights reserved
===========================================================================
-sk98lin.txt created 28-May-2001
+sk98lin.txt created 18-Jul-2003
-Readme File for sk98lin v4.06
-SK-NET Gigabit Ethernet PCI driver for LINUX
+Readme File for sk98lin v6.14
+Marvell Yukon/SysKonnect SK-98xx Gigabit Ethernet Adapter family driver for LINUX
This file contains
-(1) OVERVIEW
-(2) REQUIRED FILES
-(3) INSTALLATION
-(4) INCLUSION OF ADAPTER AT SYSTEM START
-(5) DRIVER PARAMETERS
-(6) LARGE FRAME SUPPORT
-(7) TROUBLESHOOTING
-(8) HISTORY
+ 1 Overview
+ 2 Required Files
+ 3 Installation
+ 3.1 Driver Installation
+ 3.2 Inclusion of adapter at system start
+ 4 Driver Parameters
+ 4.1 Per-Port Parameters
+ 4.2 Adapter Parameters
+ 5 Large Frame Support
+ 6 VLAN and Link Aggregation Support (IEEE 802.1, 802.1q, 802.3ad)
+ 7 Troubleshooting
+ 8 History
===========================================================================
-(1) OVERVIEW
-============
+1 Overview
+===========
-The sk98lin driver supports the SysKonnect SK-NET Gigabit Ethernet
-Adapter SK-98xx family on Linux 2.2.x and above.
-It has been tested with Linux on Intel/x86 machines.
-From v3.02 on, the driver is integrated in the linux kernel source.
+The sk98lin driver supports the Marvell Yukon and SysKonnect
+SK-98xx/SK-95xx compliant Gigabit Ethernet Adapter on Linux. It has
+been tested with Linux on Intel/x86 machines.
***
-(2) REQUIRED FILES
-==================
+2 Required Files
+=================
The linux kernel source.
No additional files required.
***
-(3) INSTALLATION
-================
+3 Installation
+===============
+
+It is recommended to download the latest version of the driver from the
+SysKonnect web site www.syskonnect.com. If you have downloaded the latest
+driver, the Linux kernel has to be patched before the driver can be
+installed. For details on how to patch a Linux kernel, refer to the
+patch.txt file.
+
+3.1 Driver Installation
+------------------------
The following steps describe the actions that are required to install
the driver and to start it manually. These steps should be carried
out for the initial driver setup. Once confirmed to be ok, they can
-be included in the system start which is described in the next
-chapter.
+be included in the system start.
-NOTE 1: You must have 'root' access to the system to perform
- the following tasks.
-NOTE 2: IMPORTANT: In case of problems, please read the section
- "Troubleshooting" below.
-
-1) The driver can either be integrated into the kernel or it can
- be compiled as a module.
- Select the appropriate option during the kernel configuration.
- For use as a module, your kernel must have
- 'loadable module support' enabled.
- For automatic driver start, you also need 'Kernel module loader'
- enabled.
- Configure those options, build and install the new kernel. If you
- choose to use the driver as a module, do "make modules" and
- "make modules_install".
- Reboot your system.
-
-2) Load the module manually by entering:
- modprobe sk98lin
- If the SysKonnect SK-98xx adapter is installed in your
- computer and you have a /proc filesystem, running the command
- 'more /proc/net/dev' should produce an output containing a
- line with the following format:
- eth0: 0 0 ...
- which means that your adapter has been found and initialized.
+NOTE 1: To perform the following tasks you need 'root' access.
+
+NOTE 2: In case of problems, please read the section "Troubleshooting"
+ below.
+
+The driver can either be integrated into the kernel or it can be compiled
+as a module. Select the appropriate option during the kernel
+configuration.
+
+Compile/use the driver as a module
+----------------------------------
+To compile the driver, go to the directory /usr/src/linux and
+execute the command "make menuconfig" or "make xconfig" and proceed as
+follows:
+
+To integrate the driver permanently into the kernel, proceed as follows:
+
+1. Select the menu "Network device support" and then "Ethernet(1000Mbit)"
+2. Mark "Marvell Yukon/SysKonnect SK-98xx/SK-95xx Gigabit Ethernet Adapter
+ support" with (*)
+3. Build a new kernel when the configuration of the above options is
+ finished.
+4. Install the new kernel.
+5. Reboot your system.
+
+To use the driver as a module, proceed as follows:
+
+1. Enable 'loadable module support' in the kernel.
+2. For automatic driver start, enable the 'Kernel module loader'.
+3. Select the menu "Network device support" and then "Ethernet(1000Mbit)"
+4. Mark "Marvell Yukon/SysKonnect SK-98xx/SK-95xx Gigabit Ethernet Adapter
+ support" with (M)
+5. Execute the command "make modules".
+6. Execute the command "make modules_install".
+ The appropiate modules will be installed.
+7. Reboot your system.
+
+
+Load the module manually
+------------------------
+To load the module manually, proceed as follows:
+
+1. Enter "modprobe sk98lin".
+2. If a Marvell Yukon or SysKonnect SK-98xx adapter is installed in
+ your computer and you have a /proc file system, execute the command:
+ "ls /proc/net/sk98lin/"
+ This should produce an output containing a line with the following
+ format:
+ eth0 eth1 ...
+ which indicates that your adapter has been found and initialized.
- NOTE 1: If you have more than one SysKonnect SK-98xx adapter, the
- adapters will be listed as 'eth0', 'eth1', 'eth2', etc.
- For each adapter, repeat the steps 3) and 4).
- NOTE 2: If you have other Ethernet adapters installed,
- your SysKonnect SK-98xx adapter can be mapped to 'eth1' or
- 'eth2' ...
- The module installation message (in system logfile or
- on console, depending on /etc/syslog.conf) prints a line
- for each adapter that is found, containing the
- corresponding 'ethX'.
+ NOTE 1: If you have more than one Marvell Yukon or SysKonnect SK-98xx
+ adapter installed, the adapters will be listed as 'eth0',
+ 'eth1', 'eth2', etc.
+ For each adapter, repeat steps 3 and 4 below.
+
+ NOTE 2: If you have other Ethernet adapters installed, your Marvell
+ Yukon or SysKonnect SK-98xx adapter will be mapped to the
+ next available number, e.g. 'eth1'. The mapping is executed
+ automatically.
+ The module installation message (displayed either in a system
+ log file or on the console) prints a line for each adapter
+ found containing the corresponding 'ethX'.
-3) Select an IP address and assign it to the respective adapter by
+3. Select an IP address and assign it to the respective adapter by
entering:
- ifconfig eth0 <ip-address>
- This causes the adapter to connect to the ethernet. The solitary
- yellow LED at the adapter is now active, the link status LED of
- the primary port is on and the link status LED of the secondary
- port (on dual port adapters) is blinking (only if the laters are
- connected to a switch or hub).
- You will also get a status message on the console saying
- "ethX: network connection up using port Y" and indicating
- the selected connection parameters.
+ ifconfig eth0 <ip-address>
+ With this command, the adapter is connected to the Ethernet.
+ SK-98xx Gigabit Ethernet Server Adapters: The yellow LED on the adapter
+ is now active, the link status LED of the primary port is active and
+ the link status LED of the secondary port (on dual port adapters) is
+ blinking (if the ports are connected to a switch or hub).
+ SK-98xx V2.0 Gigabit Ethernet Adapters: The link status LED is active.
+ In addition, you will receive a status message on the console stating
+ "ethX: network connection up using port Y" and showing the selected
+ connection parameters (x stands for the ethernet device number
+ (0,1,2, etc), y stands for the port name (A or B)).
+
NOTE: If you are in doubt about IP addresses, ask your network
administrator for assistance.
+
+4. Your adapter should now be fully operational.
+ Use 'ping <otherstation>' to verify the connection to other computers
+ on your network.
+5. To check the adapter configuration view /proc/net/sk98lin/[devicename].
+ For example by executing:
+ "cat /proc/net/sk98lin/eth0"
+
+Unload the module
+-----------------
+To stop and unload the driver modules, proceed as follows:
-4) Your adapter should now be fully operational.
- Use 'ping <otherstation>' to verify the connection to other
- computers on your network.
- By viewing /proc/net/sk98lin/[devicename], you can check some
- information regarding to the adapter configuration.
-
-
-5) The driver module can be stopped and unloaded using the following
- commands:
- ifconfig eth0 down
- rmmod sk98lin
-***
-
+1. Execute the command "ifconfig eth0 down".
+2. Execute the command "rmmod sk98lin".
-(4) INCLUSION OF ADAPTER AT SYSTEM START
-========================================
+3.2 Inclusion of adapter at system start
+-----------------------------------------
Since a large number of different Linux distributions are
available, we are unable to describe a general installation procedure
@@ -122,41 +163,45 @@
Because the driver is now integrated in the kernel, installation should
be easy, using the standard mechanism of your distribution.
Refer to the distribution's manual for installation of ethernet adapters.
+
***
+4 Driver Parameters
+====================
-(5) DRIVER PARAMETERS
-=====================
+Parameters can be set at the command line after the module has been
+loaded with the command 'modprobe'.
+In some distributions, the configuration tools are able to pass parameters
+to the driver module.
-Parameters can be set at the command line while loading the
-module with 'modprobe'. The configuration tools of some distributions
-can also give parameters to the driver module.
If you use the kernel module loader, you can set driver parameters
in the file /etc/modules.conf (or old name: /etc/conf.modules).
-Insert a line of the form:
-
-options sk98lin ...
+To set the driver parameters in this file, proceed as follows:
-For "...", use the same syntax as described below for the command
-line parameters of modprobe.
-You either have to reboot your computer or unload and reload
-the driver to activate the new parameters.
-The syntax of the driver parameters is:
-
-modprobe sk98lin parameter=value1[,value2[,value3...]]
-
-value1 is for the first adapter, value2 for the second one etc.
-All Parameters are case sensitive, so write them exactly as
-shown below.
-
-Sample: Suppose you have two adapters. You want to set AutoNegotiation
- on Port A of the first adapter to ON and on Port A of the
- second adapter to OFF.
- You also want to set DuplexCapabilities on Port A of the first
- adapter to FULL and on Port A of the second adapter to HALF.
- You must enter:
+1. Insert a line of the form :
+ options sk98lin ...
+ For "...", the same syntax is required as described for the command
+ line paramaters of modprobe below.
+2. To activate the new parameters, either reboot your computer
+ or
+ unload and reload the driver.
+ The syntax of the driver parameters is:
+
+ modprobe sk98lin parameter=value1[,value2[,value3...]]
+
+ where value1 refers to the first adapter, value2 to the second etc.
+
+NOTE: All parameters are case sensitive. Write them exactly as shown
+ below.
+
+Example:
+Suppose you have two adapters. You want to set auto-negotiation
+on the first adapter to ON and on the second adapter to OFF.
+You also want to set DuplexCapabilities on the first adapter
+to FULL, and on the second adapter to HALF.
+Then, you must enter:
- modprobe sk98lin AutoNeg_A=On,Off DupCap_A=Full,Half
+ modprobe sk98lin AutoNeg=On,Off DupCap=Full,Half
NOTE: The number of adapters that can be configured this way is
limited in the driver (file skge.c, constant SK_MAX_CARD_PARAM).
@@ -164,357 +209,571 @@
more adapters, adjust this and recompile.
-5.1 Per-Port Parameters
------------------------
-Those setting are available for each port on the adapter.
+4.1 Per-Port Parameters
+------------------------
+
+These settings are available for each port on the adapter.
In the following description, '?' stands for the port for
which you set the parameter (A or B).
-- Auto Negotiation
- Parameter: AutoNeg_?
- Values: On, Off, Sense
- Default: Sense
+Speed
+-----
+Parameter: Speed_?
+Values: 10, 100, 1000, Auto
+Default: Auto
+
+This parameter is used to set the speed capabilities. It is only valid
+for the SK-98xx V2.0 copper adapters.
+Usually, the speed is negotiated between the two ports during link
+establishment. If this fails, a port can be forced to a specific setting
+with this parameter.
+
+Auto-Negotiation
+----------------
+Parameter: AutoNeg_?
+Values: On, Off, Sense
+Default: On
- The "Sense"-mode finds out automatically whether the link
- partner supports autonegotiation or not.
+The "Sense"-mode automatically detects whether the link partner supports
+auto-negotiation or not.
-- Duplex Capabilities
- Parameter: DupCap_?
- Values: Half, Full, Both
- Default: Both
-
- This parameters is relevant only if autonegotiation for
- this port is not "Sense". If autonegotiation is "On", all
- three values are possible. If it is "Off", only "Full" and
- "Half" are allowed.
- It is useful if your link partner does not support all
- possible combinations.
-
-- Flow Control
- Parameter: FlowCtrl_?
- Values: Sym, SymOrRem, LocSend, None
- Default: SymOrRem
-
- This parameter can be used to set the flow control capabilities
- that the port reports during autonegotiation.
- The meaning of the different modes is:
--- Sym = Symetric: both link partners are allowed to send PAUSE frames
--- SymOrRem = SymetricOrRemote: both or only remote partner are allowed
- to send PAUSE frames
--- LocSend = LocalSend: only local link partner is allowed to send
- PAUSE frames
--- None: no link partner is allowed to send PAUSE frames
+Duplex Capabilities
+-------------------
+Parameter: DupCap_?
+Values: Half, Full, Both
+Default: Both
+
+This parameters is only relevant if auto-negotiation for this port is
+not set to "Sense". If auto-negotiation is set to "On", all three values
+are possible. If it is set to "Off", only "Full" and "Half" are allowed.
+This parameter is usefull if your link partner does not support all
+possible combinations.
+
+Flow Control
+------------
+Parameter: FlowCtrl_?
+Values: Sym, SymOrRem, LocSend, None
+Default: SymOrRem
+
+This parameter can be used to set the flow control capabilities the
+port reports during auto-negotiation. It can be set for each port
+individually.
+Possible modes:
+ -- Sym = Symetric: both link partners are allowed to send
+ PAUSE frames
+ -- SymOrRem = SymetricOrRemote: both or only remote partner
+ are allowed to send PAUSE frames
+ -- LocSend = LocalSend: only local link partner is allowed
+ to send PAUSE frames
+ -- None = no link partner is allowed to send PAUSE frames
- NOTE: This parameter is ignored if autonegotiation is set to "Off".
+NOTE: This parameter is ignored if auto-negotiation is set to "Off".
-- Role in Master-Slave-Negotiation (1000Base-T only).
- Parameter: Role_?
- Values: Auto, Master, Slave
- Default: Auto
-
- This parameter is only valid for the SK-9821 and SK-9822 adapters.
- For two 1000Base-T ports to communicate, one must take the role as
- master (providing timing information), while the other must be slave.
- Normally, this is negotiated between the two ports during link
- establishment. If this should ever fail, you can force a port to a
- specific setting with this parameter.
-
+Role in Master-Slave-Negotiation (1000Base-T only)
+--------------------------------------------------
+Parameter: Role_?
+Values: Auto, Master, Slave
+Default: Auto
+
+This parameter is only valid for the SK-9821 and SK-9822 adapters.
+For two 1000Base-T ports to communicate, one must take the role of the
+master (providing timing information), while the other must be the
+slave. Usually, this is negotiated between the two ports during link
+establishment. If this fails, a port can be forced to a specific setting
+with this parameter.
-5.2 Per-Adapter Parameters
---------------------------
-- Preferred Port
- Parameter: PrefPort
- Values: A, B
- Default: A
-
- This is used to force the preferred port to A or B (on two-port NICs).
- The preferred port is the one that is used if both are detected as
- fully functional.
-
-- RLMT (Redundant Link Management Technology) Mode
- Parameter: RlmtMode
- Values: CheckLinkState,CheckLocalPort, CheckSeg, DualNet
- Default: CheckLinkState
-
- RLMT (the driver part that decides which port to use) knows three
- ways of checking if a port is available for use:
-
--- CheckLinkState = Check link state only: RLMT uses the link state
- reported by the adapter hardware for each individual port to determine
- whether a port can be used for all network traffic or not.
-
--- CheckLocalPort - Check other port on adapter: RLMT sends test frames
- from each port to each other port and checks if they are received by
- the other port, respectively. Thus, the ports must be connected to the
- network such that LLC test frames can be exchanged between them
- (i.e. there must be no routers between the ports).
-
--- CheckSeg - Check other port and segmentation: RLMT checks the other port
- and in addition requests information from the Gigabit Ethernet
- switch next to each port to see if the network is segmented between
- the ports. Thus, this mode is only to be used if you have Gigabit
- Ethernet switches installed in your network that have been configured
- to use the Spanning Tree protocol.
-
--- DualNet - Both ports A and B are used as separate devices at the same
- time. So if you have a dual port adapter, port A will show up as eth0
- and port B as eth1. Both ports can be used independend with distinct
- IP addresses.
- The preferred port setting is not used. Rlmt is turned off.
-
+4.2 Adapter Parameters
+-----------------------
- NOTE: The modes CheckLocalPort and CheckSeg are meant to operate in
- configurations where a network path between the ports on one
- adapter exists. Especially, they are not designed to work where
- adapters are connected back-to-back.
+Connection Type
+---------------
+Parameter: ConType
+Values: Auto, 100FD, 100HD, 10FD, 10HD
+Default: Auto
+
+The parameter 'ConType' is a combination of all five per-port parameters
+within one single parameter. This simplifies the configuration of both ports
+of an adapter card! The different values of this variable reflect the most
+meaningful combinations of port parameters.
+
+The following table shows the values of 'ConType' and the corresponding
+combinations of the per-port parameters:
+
+ ConType | DupCap AutoNeg FlowCtrl Role Speed
+ ----------+------------------------------------------------------
+ Auto | Both On SymOrRem Auto Auto
+ 100FD | Full Off None Auto (ignored) 100
+ 100HD | Half Off None Auto (ignored) 100
+ 10FD | Full Off None Auto (ignored) 10
+ 10HD | Half Off None Auto (ignored) 10
+
+Stating any other port parameter together with this 'ConType' variable
+will result in a merged configuration of those settings. This due to
+the fact, that the per-port parameters (e.g. Speed_? ) have a higher
+priority than the combined variable 'ConType'.
+
+NOTE: This parameter is always used on both ports of the adapter card.
+
+Interrupt Moderation
+--------------------
+Parameter: Moderation
+Values: None, Static, Dynamic
+Default: None
+
+Interrupt moderation is employed to limit the maxmimum number of interrupts
+the driver has to serve. That is, one or more interrupts (which indicate any
+transmit or receive packet to be processed) are queued until the driver
+processes them. When queued interrupts are to be served, is determined by the
+'IntsPerSec' parameter, which is explained later below.
+
+Possible modes:
+
+ -- None - No interrupt moderation is applied on the adapter card.
+ Therefore, each transmit or receive interrupt is served immediately
+ as soon as it appears on the interrupt line of the adapter card.
+
+ -- Static - Interrupt moderation is applied on the adapter card.
+ All transmit and receive interrupts are queued until a complete
+ moderation interval ends. If such a moderation interval ends, all
+ queued interrupts are processed in one big bunch without any delay.
+ The term 'static' reflects the fact, that interrupt moderation is
+ always enabled, regardless how much network load is currently
+ passing via a particular interface. In addition, the duration of
+ the moderation interval has a fixed length that never changes while
+ the driver is operational.
+
+ -- Dynamic - Interrupt moderation might be applied on the adapter card,
+ depending on the load of the system. If the driver detects that the
+ system load is too high, the driver tries to shield the system against
+ too much network load by enabling interrupt moderation. If - at a later
+ time - the CPU utilizaton decreases again (or if the network load is
+ negligible) the interrupt moderation will automatically be disabled.
+
+Interrupt moderation should be used when the driver has to handle one or more
+interfaces with a high network load, which - as a consequence - leads also to a
+high CPU utilization. When moderation is applied in such high network load
+situations, CPU load might be reduced by 20-30%.
+
+NOTE: The drawback of using interrupt moderation is an increase of the round-
+trip-time (RTT), due to the queueing and serving of interrupts at dedicated
+moderation times.
+
+Interrupts per second
+---------------------
+Parameter: IntsPerSec
+Values: 30...40000 (interrupts per second)
+Default: 2000
+
+This parameter is only used, if either static or dynamic interrupt moderation
+is used on a network adapter card. Using this paramter if no moderation is
+applied, will lead to no action performed.
+
+This parameter determines the length of any interrupt moderation interval.
+Assuming that static interrupt moderation is to be used, an 'IntsPerSec'
+parameter value of 2000 will lead to an interrupt moderation interval of
+500 microseconds.
+
+NOTE: The duration of the moderation interval is to be chosen with care.
+At first glance, selecting a very long duration (e.g. only 100 interrupts per
+second) seems to be meaningful, but the increase of packet-processing delay
+is tremendous. On the other hand, selecting a very short moderation time might
+compensate the use of any moderation being applied.
+
+
+Preferred Port
+--------------
+Parameter: PrefPort
+Values: A, B
+Default: A
+
+This is used to force the preferred port to A or B (on dual-port network
+adapters). The preferred port is the one that is used if both are detected
+as fully functional.
+
+RLMT Mode (Redundant Link Management Technology)
+------------------------------------------------
+Parameter: RlmtMode
+Values: CheckLinkState,CheckLocalPort, CheckSeg, DualNet
+Default: CheckLinkState
+
+RLMT monitors the status of the port. If the link of the active port
+fails, RLMT switches immediately to the standby link. The virtual link is
+maintained as long as at least one 'physical' link is up.
+
+Possible modes:
+
+ -- CheckLinkState - Check link state only: RLMT uses the link state
+ reported by the adapter hardware for each individual port to
+ determine whether a port can be used for all network traffic or
+ not.
+
+ -- CheckLocalPort - In this mode, RLMT monitors the network path
+ between the two ports of an adapter by regularly exchanging packets
+ between them. This mode requires a network configuration in which
+ the two ports are able to "see" each other (i.e. there must not be
+ any router between the ports).
+
+ -- CheckSeg - Check local port and segmentation: This mode supports the
+ same functions as the CheckLocalPort mode and additionally checks
+ network segmentation between the ports. Therefore, this mode is only
+ to be used if Gigabit Ethernet switches are installed on the network
+ that have been configured to use the Spanning Tree protocol.
+
+ -- DualNet - In this mode, ports A and B are used as separate devices.
+ If you have a dual port adapter, port A will be configured as eth0
+ and port B as eth1. Both ports can be used independently with
+ distinct IP addresses. The preferred port setting is not used.
+ RLMT is turned off.
+
+NOTE: RLMT modes CLP and CLPSS are designed to operate in configurations
+ where a network path between the ports on one adapter exists.
+ Moreover, they are not designed to work where adapters are connected
+ back-to-back.
***
-(6) LARGE FRAME SUPPORT
-=======================
+5 Large Frame Support
+======================
-Large frames (also called jumbo frames) are now supported by the
-driver. This can result in a greatly improved throughput if
-transferring large amounts of data.
-To enable large frames, set the MTU (maximum transfer unit)
-of the interface to the value you wish (up to 9000). The command
-for this is:
- ifconfig eth0 mtu 9000
+The driver supports large frames (also called jumbo frames). Using large
+frames can result in an improved throughput if transferring large amounts
+of data.
+To enable large frames, set the MTU (maximum transfer unit) of the
+interface to the desired value (up to 9000), execute the following
+command:
+ ifconfig eth0 mtu 9000
This will only work if you have two adapters connected back-to-back
-or if you use a switch that supports large frames. When using a
-switch, it should be configured to allow large frames, without
-autonegotiating for them.
-The setting must be done on all adapters that can be reached by
-the large frames. If one adapter is not set to receive large frames,
-it will simply drop them.
-
-You can switch back to the standard ethernet frame size with:
- ifconfig eth0 mtu 1500
+or if you use a switch that supports large frames. When using a switch,
+it should be configured to allow large frames and auto-negotiation should
+be set to OFF. The setting must be configured on all adapters that can be
+reached by the large frames. If one adapter is not set to receive large
+frames, it will simply drop them.
+
+You can switch back to the standard ethernet frame size by executing the
+following command:
+ ifconfig eth0 mtu 1500
-To make this setting persitent, add a script with the 'ifconfig'
-line to the system startup sequence (named something like "S99sk98lin"
+To permanently configure this setting, add a script with the 'ifconfig'
+line to the system startup sequence (named something like "S99sk98lin"
in /etc/rc.d/rc2.d).
***
-(7) TROUBLESHOOTING
-===================
+6 VLAN and Link Aggregation Support (IEEE 802.1, 802.1q, 802.3ad)
+==================================================================
+
+The Marvell Yukon/SysKonnect Linux drivers are able to support VLAN and
+Link Aggregation according to IEEE standards 802.1, 802.1q, and 802.3ad.
+These features are only available after installation of open source
+modules available on the Internet:
+For VLAN go to: http://scry.wanfear.com/~greear/vlan.html
+For Link Aggregation go to: http://www.st.rim.or.jp/~yumo
+
+NOTE: SysKonnect GmbH does not offer any support for these open source
+ modules and does not take the responsibility for any kind of
+ failures or problems arising in connection with these modules.
+
+NOTE: Configuring Link Aggregation on a SysKonnect dual link adapter may
+ cause problems when unloading the driver.
+
+
+7 Troubleshooting
+==================
+
+If any problems occur during the installation process, check the
+following list:
-If you run into problems during installation, check those items:
Problem: The SK-98xx adapter can not be found by the driver.
-Reason: Look in /proc/pci for the following entry:
+Solution: In /proc/pci search for the following entry:
'Ethernet controller: SysKonnect SK-98xx ...'
- If this entry exists, then the SK-98xx adapter has been
- found by the system and should be able to be used.
- If this entry does not exist or if the file '/proc/pci'
- is not there, then you may have a hardware problem or PCI
- support may not be enabled in your kernel.
- The adapter can be checked using the diagnostic program
- which is available from the SysKonnect web site:
- www.syskonnect.de
- Some COMPAQ machines have a problem with PCI under
- Linux. This is described in the 'PCI howto' document
- (included in some distributions or available from the
- www, e.g. at 'www.linux.org'). This might be fixed in the
- 2.2.x kernel series (I've not tested it).
-
-Problem: Programs such as 'ifconfig' or 'route' can not be found or
- you get an error message 'Operation not permitted'.
-Reason: You are not logged in as user 'root'. Logout and
- login as root or change to root via 'su'.
-
-Problem: Using the command 'ping <address>', you get a message
- "ping: sendto: Network is unreachable".
-Reason: Your route is not set up correct.
- If you are using RedHat, you probably forgot
- to set up the route in 'network configuration'.
- Check the existing routes with the 'route' command
- and check if there is an entry for 'eth0' and if
- it is correct.
-
-Problem: The driver can be started, the adapter is connected
- to the network, but you can not receive or transmit
- any packet; e.g. 'ping' does not work.
-Reason: You have an incorrect route in your routing table.
- Check the routing table with the command 'route' and
- read the manual pages about route ('man route').
-NOTE: Although the 2.2.x kernel versions generate the routing
- entry automatically, you may have problems of this kind
- here, too. We found a case where the driver started correct
- at system boot, but after removing and reloading the driver,
- the route of the adapter's network pointed to the 'dummy0'
- device and had to be corrected manually.
-
-Problem: You want to use your computer as a router between
- multiple IP subnetworks (using multiple adapters), but
- you can not reach computers in other subnetworks.
-Reason: Either the router's kernel is not configured for IP
- forwarding or there is a problem with the routing table
- and gateway configuration in at least one of the
- computers.
-
-Problem: At the start of the driver, you get an error message:
- "eth0: -- ERROR --
- Class: internal Software error
- Nr: 0xcc
- Msg: SkGeInitPort() cannot init running ports"
-Reason: You are using a driver compiled for single processor
- machines on an multiprocessor machine with SMP (Symetric
- MultiProcessor) kernel.
- Configure your kernel appropriate and recompile the kernel or
- the modules.
+ If this entry exists, the SK-98xx or SK-98xx V2.0 adapter has
+ been found by the system and should be operational.
+ If this entry does not exist or if the file '/proc/pci' is not
+ found, there may be a hardware problem or the PCI support may
+ not be enabled in your kernel.
+ The adapter can be checked using the diagnostics program which
+ is available on the SysKonnect web site:
+ www.syskonnect.com
+
+ Some COMPAQ machines have problems dealing with PCI under Linux.
+ Linux. This problem is described in the 'PCI howto' document
+ (included in some distributions or available from the
+ web, e.g. at 'www.linux.org').
+
+
+Problem: Programs such as 'ifconfig' or 'route' can not be found or the
+ error message 'Operation not permitted' is displayed.
+Reason: You are not logged in as user 'root'.
+Solution: Logout and login as 'root' or change to 'root' via 'su'.
+
+
+Problem: Upon use of the command 'ping <address>' the message
+ "ping: sendto: Network is unreachable" is displayed.
+Reason: Your route is not set correctly.
+Solution: If you are using RedHat, you probably forgot to set up the
+ route in the 'network configuration'.
+ Check the existing routes with the 'route' command and check
+ if an entry for 'eth0' exists, and if so, if it is set correctly.
+
+
+Problem: The driver can be started, the adapter is connected to the
+ network, but you cannot receive or transmit any packets;
+ e.g. 'ping' does not work.
+Reason: There is an incorrect route in your routing table.
+Solution: Check the routing table with the command 'route' and read the
+ manual help pages dealing with routes (enter 'man route').
+
+NOTE: Although the 2.2.x kernel versions generate the routing entry
+ automatically, problems of this kind may occur here as well. We've
+ come across a situation in which the driver started correctly at
+ system start, but after the driver has been removed and reloaded,
+ the route of the adapter's network pointed to the 'dummy0'device
+ and had to be corrected manually.
+
+
+Problem: Your computer should act as a router between multiple
+ IP subnetworks (using multiple adapters), but computers in
+ other subnetworks cannot be reached.
+Reason: Either the router's kernel is not configured for IP forwarding
+ or the routing table and gateway configuration of at least one
+ computer is not working.
+
+Problem: Upon driver start, the following error message is displayed:
+ "eth0: -- ERROR --
+ Class: internal Software error
+ Nr: 0xcc
+ Msg: SkGeInitPort() cannot init running ports"
+Reason: You are using a driver compiled for single processor machines
+ on a multiprocessor machine with SMP (Symetric MultiProcessor)
+ kernel.
+Solution: Configure your kernel appropriately and recompile the kernel or
+ the modules.
+
+
If your problem is not listed here, please contact SysKonnect's technical
support for help (linux@syskonnect.de).
-When contacting our technical support, please ensure that the
-following information is available:
-- System Manufacturer and Model
-- Boards in your system
+When contacting our technical support, please ensure that the following
+information is available:
+- System Manufacturer and HW Informations (CPU, Memory... )
+- PCI-Boards in your system
- Distribution
- Kernel version
+- Driver version
***
+8 History
+==========
-(8) HISTORY
-===========
+VERSION 6.14
+New Features:
+- None
+Problems fixed:
+- Fix: memory leak when sending short padded frames
+- Fix: helptext for menuconfig in kernel 2.6 updated
+- Fix: PNMI_READ defines retrieve correct amount of bytes
+Known limitations:
+- None
-VERSION 4.02 (In-Kernel version)
+VERSION 6.13
New Features:
-- Add Kernel 2.4 changes
+- New parameter ConType combining different per-port parameters
+Problems fixed:
+- Fix: change of MTU-size without warning (bugreport #10721)
+- Fix: HW checksumming when Kernel 2.5/2.6 corrected
+- Fix: Padding of small packets (<60 bytes) not 0xaa, but 0x00 instead
+- Fix: Minor edits corrected
+- Fix: Obsolete function SetQueueSize() removed
+- Fix: Removed proprietary defines - used defines from skgehw.h instead
Known limitations:
- None
-VERSION 4.01 (In-Kernel version)
+VERSION 6.12
+New Features:
+- enabling/disabling checksum
Problems fixed:
-- Full statistics support for DualNet mode
+- Fix: KLM load/unload using new refcount interface for Kernel 2.5/2.6
Known limitations:
- None
-VERSION 4.00 (In-Kernel version)
+VERSION 6.11 (In-Kernel version)
+New Features:
+- Support for Kernel 2.5/2.6
+- Support for new IO-control MIB data structure
+- New SkOsGetTime function
Problems fixed:
-- Memory leak found
+- Fix: Race condition with broken LM80 chip
+- Fix: Common modules update (#10803, #10768, #10767)
+- Fix: Dim, ProcFS, Isr, Module Support changes for Kernel 2.5/2.6
+Known limitations:
+- None
+
+VERSION 6.10
New Features:
-- Proc filesystem integration
-- DualNet functionality integrated
-- Rlmt networks added
+- none
+Problems fixed:
+- Fix: Race condition with padded frames
Known limitations:
-- statistics partially incorrect in DualNet mode
+- None
-VERSION 3.04 (In-Kernel version)
+VERSION 6.09
+New Features:
+- none
Problems fixed:
-- Driver start failed on UltraSPARC
-- Rx checksum calculation for big endian machines did not work
-- Jumbo frames were counted as input-errors in netstat
+- Fix: Disabled HW Error IRQ on 32-bit Yukon if sensor IRQ occurs
+- Fix: Delay race condition with some server machines
+Known limitations:
+- None
-VERSION 3.03 (Standalone version)
+VERSION 6.08
+New Features:
+- Add: Dynamic Interrupt moderation
+- Add: Blink mode verification
+- Fix: CSUM changes
Problems fixed:
-- Compilation did not find script "printver.sh" if "." not in PATH
+- Fix: CSUM changes
Known limitations:
- None
-VERSION 3.02 (In-Kernel version)
+VERSION 6.04 - 6.07
+New Features:
+- Common modules update
Problems fixed:
+- none
+Known limitations:
- None
+
+VERSION 6.03
New Features:
-- Integration in Linux kernel source (2.2.14 and 2.3.29)
+- Common modules update
+Problems fixed:
+- Remove useless init_module/cleanup_module forward declarations
Known limitations:
- None
-VERSION 3.01
+VERSION 6.02 (In-Kernel version)
+New Features:
+- Common modules update
Problems fixed:
+- Boot message cleanup
+Known limitations:
- None
+
+VERSION 6.00 (In-Kernel version)
New Features:
-- Full source release
+- Support for SK-98xx V2.0 adapters
+- Support for gmac
+- Support for kernel 2.4.x and kernel 2.2.x
+- Zerocopy support for kernel 2.4.x with sendfile()
+- Support for scatter-gather functionality with sendfile()
+- Speed support for SK-98xx V2.0 adapters
+- New ProcFs entries
+- New module parameters
+Problems fixed:
+- ProcFS initialization
+- csum packet error
+- Ierror/crc counter error (#10767)
+- rx_too_long counter error (#10751)
Known limitations:
- None
-VERSION 3.00
+VERSION 4.11
+New Features:
+- none
Problems fixed:
+- Error statistic counter fix (#10620)
+- RLMT-Fixes (#10659, #10639, #10650)
+- LM80 sensor initialization fix (#10623)
+- SK-CSUM memory fixes (#10610).
+Known limitations:
- None
+
+VERSION 4.10
New Features:
-- Support for 1000Base-T adapters (SK-9821 and SK-9822)
+- New ProcFs entries
+Problems fixed:
+- Corrected some printk's
Known limitations:
- None
-VERSION 1.07
+VERSION 4.09
+New Features:
+- IFF_RUNNING support (link status)
+- New ProcFs entries
Problems fixed:
-- RlmtMode parameter value strings were wrong (#10437)
-- Driver sent too many RLMT frames (#10439)
-- Driver did not recognize network segmentation (#10440)
-- RLMT switched too often on segmented network (#10441)
+- too long counters
+- too short counters
+- Kernel error compilation
Known limitations:
- None
-
-VERSION 1.06
+
+VERSION 4.06 (In-Kernel version)
+Problems fixed:
+- MTU init problems
+
+VERSION 4.04
Problems fixed:
-- System panic'ed after some time when running with
- RlmtMode=CheckOtherLink or RlmtMode=CheckSeg (#10421)
- Panic message: "Kernel panic: skput: over ... dev: eth0"
-- Driver did not switch back to default port when connected
- back-to-back (#10422).
-Changes:
-- RlmtMode parameter names have changed
-New features:
-- There is now a version for ALPHA processors
+- removed VLAN error messages
+
+VERSION 4.02 (In-Kernel version)
+New Features:
+- Add Kernel 2.4 changes
Known limitations:
- None
-VERSION 1.05
+VERSION 4.01 (In-Kernel version)
Problems fixed:
-- Driver failed to load on kernels with version information
- for module symbols enabled
+- Full statistics support for DualNet mode
Known limitations:
- None
-VERSION 1.04
+VERSION 4.00 (In-Kernel version)
Problems fixed:
-- Large frame support does work now (no autonegotiation
- support for large frames, just manually selectable)
+- Memory leak found
New Features:
-- Receive checksumming in hardware
-- Performance optimizations
- Some numbers (on two PII-400 machines, back-to-back):
- netpipe: 300 MBit/sec, with large frames: 470 MBit/sec
- ttcp: 38 MByte/sec, with large frames: 60 MByte/sec
- ttcp (UDP send): 66 MByte/sec, with large frames: 106 MByte/sec
+- Proc filesystem integration
+- DualNet functionality integrated
+- Rlmt networks added
+Known limitations:
+- statistics partially incorrect in DualNet mode
+
+VERSION 3.04 (In-Kernel version)
+Problems fixed:
+- Driver start failed on UltraSPARC
+- Rx checksum calculation for big endian machines did not work
+- Jumbo frames were counted as input-errors in netstat
+
+VERSION 3.03 (Standalone version)
+Problems fixed:
+- Compilation did not find script "printver.sh" if "." not in PATH
Known limitations:
- None
-VERSION 1.03
+VERSION 3.02 (In-Kernel version)
Problems fixed:
-- Unloading with "rmmod" caused segmentation fault (#10415)
-- The link LED flickered from time to time, if no link was
- established (#10402)
-- Installation problems with RedHat 6.0 (#10409)
+- None
New Features:
-- Connection state output at "network connection up"
+- Integration in Linux kernel source (2.2.14 and 2.3.29)
Known limitations:
- None
-VERSION 1.02
+VERSION 3.01
Problems fixed:
-- Failed with multiple adapters
-- Failed with Single Port adapters
-- Startup string was only displayed if adapter found
-- No link could be established on certain switches when the switches were
- rebooted. (#10377)
+- None
+New Features:
+- Full source release
Known limitations:
-- Segmentation fault at "rmmod" with kernel 2.2.3 on some machines
+- None
-VERSION 1.01
+VERSION 3.00
Problems fixed:
-- Sensor status was not set back to 'ok' after 'warning/error'. (#10386)
-Changes:
-- improved parallelism in driver
-
-VERSION 1.00
+- None
+New Features:
+- Support for 1000Base-T adapters (SK-9821 and SK-9822)
Known limitations:
-- not tested with all kernel versions (I don't have that much time :-)
-- only x86 version available (if you need others, ask for it)
-- source code not completely available
-
-***End of Readme File***
+- None
+***End of Readme File***
diff -Nru a/Documentation/networking/vortex.txt b/Documentation/networking/vortex.txt
--- a/Documentation/networking/vortex.txt Sun Aug 3 13:14:46 2003
+++ b/Documentation/networking/vortex.txt Sun Aug 3 13:14:46 2003
@@ -216,19 +216,6 @@
to increase this value on LANs which have very high collision rates.
The default value is 5000 (5.0 seconds).
-enable_wol=N1,N2,N3,...
-
- Enable Wake-on-LAN support for the relevant interface. Donald
- Becker's `ether-wake' application may be used to wake suspended
- machines.
-
- Also enables the NIC's power management support.
-
-global_enable_wol=N
-
- Sets enable_wol mode for all 3c59x NICs in the machine. Entries in
- the `enable_wol' array above will override any setting of this.
-
Media selection
---------------
diff -Nru a/Documentation/s390/3270.txt b/Documentation/s390/3270.txt
--- a/Documentation/s390/3270.txt Sun Aug 3 13:14:47 2003
+++ b/Documentation/s390/3270.txt Sun Aug 3 13:14:47 2003
@@ -79,7 +79,6 @@
(If you wish to disable 3215 console support, edit
.config; change CONFIG_TN3215's value to "n";
and rerun "make oldconfig".)
- make dep
make image
make modules
make modules_install
diff -Nru a/Documentation/scsi/BusLogic.txt b/Documentation/scsi/BusLogic.txt
--- a/Documentation/scsi/BusLogic.txt Sun Aug 3 13:14:47 2003
+++ b/Documentation/scsi/BusLogic.txt Sun Aug 3 13:14:47 2003
@@ -597,7 +597,6 @@
patch -p0 < BusLogic.patch (only for 2.0.33 and below)
cd linux
make config
- make depend
make zImage
Then install "arch/i386/boot/zImage" as your standard kernel, run lilo if
diff -Nru a/Documentation/scsi/cpqfc.txt b/Documentation/scsi/cpqfc.txt
--- a/Documentation/scsi/cpqfc.txt Sun Aug 3 13:14:53 2003
+++ b/Documentation/scsi/cpqfc.txt Sun Aug 3 13:14:53 2003
@@ -102,7 +102,6 @@
Installation:
make menuconfig
(select SCSI low-level, Compaq FC HBA)
-make dep
make modules
make modules_install
diff -Nru a/Documentation/smp.txt b/Documentation/smp.txt
--- a/Documentation/smp.txt Sun Aug 3 13:14:51 2003
+++ b/Documentation/smp.txt Sun Aug 3 13:14:51 2003
@@ -15,7 +15,7 @@
Of course you should time how long each build takes :-)
Example:
make config
- time -v sh -c 'make dep ; make clean install modules modules_install'
+ time -v sh -c 'make clean install modules modules_install'
If you are using some Compaq MP compliant machines you will need to set
the operating system in the BIOS settings to "Unixware" - don't ask me
diff -Nru a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt
--- a/Documentation/sound/alsa/ALSA-Configuration.txt Sun Aug 3 13:14:45 2003
+++ b/Documentation/sound/alsa/ALSA-Configuration.txt Sun Aug 3 13:14:45 2003
@@ -27,6 +27,13 @@
isapnptools.
+Creating ALSA devices
+=====================
+
+Use the MAKEDEV.snd script located in the directory named scripts
+in the linux kernel tree.
+
+
Module parameters
=================
@@ -92,7 +99,7 @@
amidi_map - MIDI device number maps assigned to the 2st OSS device.
(default: 1)
- Global parameters for top soundcard modules
+ Common parameters for top soundcard modules
-------------------------------------------
Each of top-level soundcard module takes some general options,
@@ -518,6 +525,15 @@
Module supports up to 8 cards.
+ Note: you need to load the firmware via hdsploader utility included
+ in alsa-tools package.
+
+ Note: snd-page-alloc module does the job which snd-hammerfall-mem
+ module did formerly. It will allocate the buffers in advance
+ when any HDSP cards are found. To make the buffer
+ allocation sure, load snd-page-alloc module in the early
+ stage of boot sequence.
+
Module snd-ice1712
------------------
@@ -549,6 +565,7 @@
Module for Envy24HT (VT/ICE1724) based PCI soundcards.
* MidiMan M Audio Revolution 7.1
* AMP Ltd AUDIO2000
+ * TerraTec Aureon Sky-5.1, Space-7.1
Module supports up to 8 cards and autoprobe.
@@ -790,6 +807,12 @@
Module supports up to 8 cards.
+ Note: snd-page-alloc module does the job which snd-hammerfall-mem
+ module did formerly. It will allocate the buffers in advance
+ when any RME9652 cards are found. To make the buffer
+ allocation sure, load snd-page-alloc module in the early
+ stage of boot sequence.
+
Module snd-sa11xx-uda1341 (on arm only)
---------------------------------------
@@ -983,12 +1006,15 @@
Note: VIA8233/5 (not VIA8233A) can support DXS (direct sound)
channels as the first PCM. With this device, up to 4
- streams can be played at the same time. If the playback on
- this PCM is noisy, try to specify dxs_channels option to 2
- or 3.
+ streams can be played at the same time. On some motherboards,
+ these channels don't work properly due to the bug of BIOS.
+ If you experience that the playback on this PCM is noisy,
+ try to specify dxs_support option to 2 or 3. In most cases
+ dxs_support=3 would suffice, so you can keep the multi-play
+ capability.
Note: for the MPU401 on VIA823x, use snd-mpu401 driver
- additonally.
+ additonally. The mpu_port option is for VIA686 chips only.
Module snd-virmidi
------------------
@@ -1284,6 +1310,9 @@
- direct don't use plugins
- block force block mode (rvplayer)
- non-block force non-block mode
+ - whole-frag write only whole fragments (optimization affecting
+ playback only)
+ - no-silence do not fill silence ahead to avoid clicks
Example: echo "x11amp 128 16384" > /proc/asound/card0/pcm0p/oss
echo "squake 0 0 disable" > /proc/asound/card0/pcm0c/oss
diff -Nru a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
--- a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl Sun Aug 3 13:14:46 2003
+++ b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl Sun Aug 3 13:14:47 2003
@@ -239,8 +239,10 @@
<section id="file-tree-drivers-directory">
<title>drivers directory</title>
<para>
- This directory contains the non-architecture-specific
- codes. For example, the dummy pcm driver and the serial MIDI
+ This directory contains the codes shared among different drivers
+ on the different architectures. They are hence supposed not to be
+ architecture-specific.
+ For example, the dummy pcm driver and the serial MIDI
driver are found in this directory. In the sub-directories,
there are the codes for components which are independent from
bus and cpu architectures.
@@ -254,9 +256,9 @@
</section>
<section id="file-tree-drivers-directory-opl3">
- <title>drivers/opl3</title>
+ <title>drivers/opl3 and opl4</title>
<para>
- The OPL3 FM-synth stuff is found here.
+ The OPL3 and OPL4 FM-synth stuff is found here.
</para>
</section>
</section>
@@ -268,9 +270,9 @@
</para>
<para>
- Although there is a standard i2c layer on Linux, ALSA uses its
+ Although there is a standard i2c layer on Linux, ALSA has its
own i2c codes for some cards, because the soundcard needs only a
- simple operation and the standard API is too complicated for
+ simple operation and the standard i2c API is too complicated for
such a purpose.
</para>
@@ -298,7 +300,7 @@
<title>pci directory</title>
<para>
This and its sub-directories hold the top-level card modules
- for PCI soundcards.
+ for PCI soundcards and the codes specific to the PCI BUS.
</para>
<para>
@@ -320,7 +322,7 @@
<title>arm, ppc, and sparc directories</title>
<para>
These are for the top-level card modules which are
- architecture specific.
+ specific to each given architecture.
</para>
</section>
@@ -3283,13 +3285,6 @@
<function>udelay()</function> or <function>mdelay()</function>.
</para>
- <para>
- This atomicity problem appears also in the initialization of the
- hardware when the power-management is supported. The functions
- for suspending and resuming the chip must be atomic, i.e. no
- mutex nor sleep can be used in them.
- </para>
-
</section>
<section id="pcm-interface-constraints">
<title>Constraints</title>
@@ -4079,8 +4074,7 @@
</para>
<para>
- These callbacks are non-atomic like the callbacks of control API
- unless they are called during suspend/resume phase.
+ These callbacks are non-atomic like the callbacks of control API.
</para>
<para>
@@ -4094,8 +4088,6 @@
The <structfield>reset</structfield> callback is used to reset
the codec. If the chip requires a special way of reset, you can
define this callback.
- This callback must be atomic when it's called in the suspend
- mode.
</para>
<para>
@@ -5212,6 +5204,13 @@
</para>
<para>
+ For keeping the readability of 2.5 source code, it's recommended to
+ separate the above ifdef condition as the patch file in alsa-driver
+ directory.
+ See <filename>alsa-driver/pci/ali5451.c</filename> for example.
+ </para>
+
+ <para>
The scheme of the real suspend job is as following.
<orderedlist>
@@ -5383,15 +5382,6 @@
</informalexample>
</para>
- <para>
- Last but not least: Please keep in mind that you cannot call
- <function>schedule()</function> during the suspend and the resume
- callbacks. If any delay is necessary, you have to use
- <function>mdelay()</function> or <function>udelay()</function>
- instead of <function>schedule_timeout()</function>!
- Of course, semaphores cannot be used, too, which will invoke sleep
- inside.
- </para>
</chapter>
diff -Nru a/Documentation/sound/oss/Introduction b/Documentation/sound/oss/Introduction
--- a/Documentation/sound/oss/Introduction Sun Aug 3 13:14:53 2003
+++ b/Documentation/sound/oss/Introduction Sun Aug 3 13:14:53 2003
@@ -114,8 +114,7 @@
Blaster, etc., select M (module) for OSS sound modules.
[thanks to Marvin Stodolsky <stodolsk@erols.com>]A
-5. Make the kernel (e.g., make dep ; make bzImage), and install
- the kernel.
+5. Make the kernel (e.g., make bzImage), and install the kernel.
6. Make the modules and install them (make modules; make modules_install).
diff -Nru a/Documentation/sound/oss/README.OSS b/Documentation/sound/oss/README.OSS
--- a/Documentation/sound/oss/README.OSS Sun Aug 3 13:14:44 2003
+++ b/Documentation/sound/oss/README.OSS Sun Aug 3 13:14:44 2003
@@ -722,8 +722,8 @@
(after the questions about mouse, CD-ROM, ftape, etc. support). Questions
about options for sound will then be asked.
-After configuring the kernel and sound driver, run "make dep" and compile
-the kernel following instructions in the kernel README.
+After configuring the kernel and sound driver and compile the kernel
+following instructions in the kernel README.
The sound driver configuration dialog
-------------------------------------
diff -Nru a/Documentation/sound/oss/Wavefront b/Documentation/sound/oss/Wavefront
--- a/Documentation/sound/oss/Wavefront Sun Aug 3 13:14:45 2003
+++ b/Documentation/sound/oss/Wavefront Sun Aug 3 13:14:45 2003
@@ -139,7 +139,6 @@
soundcards you want support for)
- make dep
make boot
.
.
diff -Nru a/Documentation/telephony/ixj.txt b/Documentation/telephony/ixj.txt
--- a/Documentation/telephony/ixj.txt Sun Aug 3 13:14:47 2003
+++ b/Documentation/telephony/ixj.txt Sun Aug 3 13:14:47 2003
@@ -363,7 +363,7 @@
1. cp .config /tmp
2. make mrproper
3. cp /tmp/.config .
- 4. make dep;make clean;make bzImage;make modules;make modules_install
+ 4. make clean;make bzImage;make modules;make modules_install
This rebuilds both the kernel and all the modules and makes sure they all
have the same linkages. This generally solves the problem once the new
diff -Nru a/Documentation/usb/usb-serial.txt b/Documentation/usb/usb-serial.txt
--- a/Documentation/usb/usb-serial.txt Sun Aug 3 13:14:45 2003
+++ b/Documentation/usb/usb-serial.txt Sun Aug 3 13:14:45 2003
@@ -84,6 +84,9 @@
necessary. Some devices need this before they can talk to the USB port
properly.
+ Devices that are not compiled into the kernel can be specified with module
+ parameters. e.g. modprobe visor vendor=0x54c product=0x66
+
There is a webpage and mailing lists for this portion of the driver at:
http://usbvisor.sourceforge.net/
diff -Nru a/Documentation/video4linux/CQcam.txt b/Documentation/video4linux/CQcam.txt
--- a/Documentation/video4linux/CQcam.txt Sun Aug 3 13:14:53 2003
+++ b/Documentation/video4linux/CQcam.txt Sun Aug 3 13:14:53 2003
@@ -50,8 +50,7 @@
With these flags, the kernel should compile and install the modules.
To record and monitor the compilation, I use:
- (make dep; \
- make zlilo ; \
+ (make zlilo ; \
make modules; \
make modules_install ;
depmod -a ) &>log &
diff -Nru a/Documentation/x86_64/boot-options.txt b/Documentation/x86_64/boot-options.txt
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/Documentation/x86_64/boot-options.txt Sun Aug 3 13:14:53 2003
@@ -0,0 +1,152 @@
+AMD64 specific boot options
+
+There are many others (usually documented in driver documentation), but
+only the AMD64 specific ones are listed here.
+
+Machine check
+
+(see the Opteron BIOS&Kernel manual for more details on the banks etc.)
+
+ mce=off disable machine check
+ mce=nok8 disable k8 specific features
+ mce=disable<NUMBER> disable bank NUMBER
+ mce=enable<NUMBER> enable bank number
+ mce=device Enable more machine check options in Northbridge.
+ Can be useful for device driver debugging.
+ mce=NUMBER mcheck timer interval number seconds.
+ Can be also comma separated in a single mce=
+
+ nomce (for compatibility with i386): same as mce=off
+
+APICs
+
+ nolocalapic Don't use a local or IO-APIC. This should only
+ be needed if you have a buggy BIOS. The newer
+ kernels already turn it off by default if the
+ BIOS didn't enable the local APIC, so it will
+ be hopefully not needed.
+ Note this code path is not very well tested, you are on
+ your own.
+
+ apic Use IO-APIC. Default
+
+ noapic Don't use the IO-APIC.
+ Also only lightly tested.
+
+ pirq=... See Documentation/i386/IO-APIC.txt
+
+Early Console
+
+ syntax: earlyprintk=vga
+ earlyprintk=serial[,ttySn[,baudrate]]
+
+ The early console is useful when the kernel crashes before the
+ normal console is initialized. It is not enabled by
+ default because it has some cosmetic problems.
+ Append ,keep to not disable it when the real console takes over.
+ Only vga or serial at a time, not both.
+ Currently only ttyS0 and ttyS1 are supported.
+ Interaction with the standard serial driver is not very good.
+ The VGA output is eventually overwritten by the real console.
+
+Timing
+
+ notsc
+ Don't use the CPU time stamp counter to read the wall time.
+ This can be used to work around timing problems on multiprocessor systems
+ with not properly synchronized CPUs. Only useful with a SMP kernel
+
+ report_lost_ticks
+ Report when timer interrupts are lost because some code turned off
+ interrupts for too long.
+
+ nmi_watchdog=NUMBER
+ NUMBER can be:
+ 0 don't use an NMI watchdog
+ 1 use the IO-APIC timer for the NMI watchdog
+ 2 use the local APIC for the NMI watchdog using a performance counter. Note
+ This will use one performance counter and the local APIC's performance
+ vector.
+
+Idle loop
+
+ idle=poll
+ Don't do power saving in the idle loop using HLT, but poll for rescheduling
+ event. This will make the CPUs eat a lot more power, but may be useful
+ to get slightly better performance in multiprocessor benchmarks. It also
+ makes some profiling using performance counters more accurate.
+
+Rebooting
+
+ reboot=b[ios] | t[riple] | k[bd] [, [w]arm | [c]old]
+ bios Use the CPU reboto vector for warm reset
+ warm Don't set the cold reboot flag
+ cold Set the cold reboto flag
+ triple Force a triple fault (init)
+ kbd Use the keyboard controller. cold reset (default)
+
+ Using warm reset will be much faster especially on big memory
+ systems because the BIOS will not go through the memory check.
+ Disadvantage is that not all hardware will be completely reinitialized
+ on reboot so there may be boot problems on some systems.
+
+Non Executable Mappings
+
+ noexec=on|off
+
+ on Enable
+ off Disable
+ noforce (default) Don't enable by default for heap/stack/data,
+ but allow PROT_EXEC to be effective
+
+ noexec32=opt{,opt}
+
+ Control the no exec default for 32bit processes.
+ Requires noexec=on or noexec=noforce to be effective.
+
+ Valid options:
+ all,on Heap,stack,data is non executable.
+ off (default) Heap,stack,data is executable
+ stack Stack is non executable, heap/data is.
+ force Don't imply PROT_EXEC for PROT_READ
+ compat (default) Imply PROT_EXEC for PROT_READ
+
+SMP
+
+ nosmp Only use a single CPU
+
+ maxcpus=NUMBER only use upto NUMBER CPUs
+
+ cpumask=MASK only use cpus with bits set in mask
+
+NUMA
+
+ numa=off Only set up a single NUMA node spanning all memory.
+
+
+ACPI
+
+ acpi=off Don't enable ACPI
+
+PCI
+
+ pci=off Don't use PCI
+ pci=conf1 Use conf1 access.
+ pci=conf2 Use conf2 access.
+ pci=rom Assign ROMs.
+ pci=assign-busses Assign busses
+ pci=irqmask=MASK Set PCI interrupt mask to MASK
+ pci=lastbus=NUMBER Scan upto NUMBER busses, no matter what the mptable says.
+
+IOMMU
+
+ iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]]
+ size set size of iommu (in bytes)
+ noagp don't initialize the AGP driver and use full aperture.
+ off don't use the IOMMU
+ leak turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on)
+ memaper[=order] allocate an own aperture over RAM with size 32MB^order.
+ noforce don't force IOMMU usage. Default.
+ force Force IOMMU
+
+
diff -Nru a/MAINTAINERS b/MAINTAINERS
--- a/MAINTAINERS Sun Aug 3 13:14:49 2003
+++ b/MAINTAINERS Sun Aug 3 13:14:49 2003
@@ -431,9 +431,11 @@
S: Maintained
CPU FREQUENCY DRIVERS
-L: cpufreq@www.linux.org.uk
-W: http://www.brodo.de/cpufreq/
-S: Maintained
+P: Dave Jones
+M: davej@codemonkey.org.uk
+L: cpufreq@www.linux.org.uk
+W: http://www.codemonkey.org.uk/cpufreq/
+S: Maintained
CPUID/MSR DRIVER
P: H. Peter Anvin
@@ -666,7 +668,7 @@
ETHERNET BRIDGE
P: Stephen Hemminger
M: shemminger@osdl.org
-L: bridge@math.leidenuniv.nl
+L: bridge@osdl.org
W: http://bridge.sourceforge.net/
S: Maintained
@@ -840,7 +842,7 @@
i386 SETUP CODE / CPU ERRATA WORKAROUNDS
P: Dave Jones
-M: davej@suse.de
+M: davej@codemonkey.org.uk
P: H. Peter Anvin
M: hpa@zytor.com
S: Maintained
@@ -1173,6 +1175,14 @@
M: philb@gnu.org
W: http://www.tazenda.demon.co.uk/phil/linux-hp
S: Maintained
+
+MARVELL YUKON / SYSKONNECT DRIVER
+P: Mirko Lindner
+M: mlindner@syskonnect.de
+P: Ralph Roesler
+M: rroesler@syskonnect.de
+W: http://www.syskonnect.com
+S: Supported
MAESTRO PCI SOUND DRIVERS
P: Zach Brown
diff -Nru a/Makefile b/Makefile
--- a/Makefile Sun Aug 3 13:14:50 2003
+++ b/Makefile Sun Aug 3 13:14:50 2003
@@ -5,7 +5,7 @@
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"
-# More info can be located in ./Documentation/kbuild
+# More info can be located in ./README
# Comments in this file are targeted only to the developer, do not
# expect to learn how to build the kernel reading this file.
@@ -112,22 +112,8 @@
export KBUILD_MODULES KBUILD_BUILTIN KBUILD_VERBOSE KBUILD_CHECKSRC
-# Beautify output
-# ---------------------------------------------------------------------------
-#
-# Normally, we echo the whole command before executing it. By making
-# that echo $($(quiet)$(cmd)), we now have the possibility to set
-# $(quiet) to choose other forms of output instead, e.g.
-#
-# quiet_cmd_cc_o_c = Compiling $(RELDIR)/$@
-# cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
-#
-# If $(quiet) is empty, the whole command will be printed.
-# If it is set to "quiet_", only the short version will be printed.
-# If it is set to "silent_", nothing wil be printed at all, since
-# the variable $(silent_cmd_cc_o_c) doesn't exist.
-
# To put more focus on warnings, less verbose as default
+# Use 'make V=1' to see the full commands
ifdef V
ifeq ("$(origin V)", "command line")
@@ -138,6 +124,9 @@
KBUILD_VERBOSE = 0
endif
+# Call sparse as part of compilation of C files
+# Use 'make C=1' to enable sparse checking
+
ifdef C
ifeq ("$(origin C)", "command line")
KBUILD_CHECKSRC = $(C)
@@ -147,6 +136,7 @@
KBUILD_CHECKSRC = 0
endif
+# Do not print 'Entering directory ...'
MAKEFLAGS += --no-print-directory
@@ -155,8 +145,28 @@
#MAKEFLAGS += -rR
-# If the user wants quiet mode, echo short versions of the commands
-# only
+# Beautify output
+# ---------------------------------------------------------------------------
+#
+# Normally, we echo the whole command before executing it. By making
+# that echo $($(quiet)$(cmd)), we now have the possibility to set
+# $(quiet) to choose other forms of output instead, e.g.
+#
+# quiet_cmd_cc_o_c = Compiling $(RELDIR)/$@
+# cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
+#
+# If $(quiet) is empty, the whole command will be printed.
+# If it is set to "quiet_", only the short version will be printed.
+# If it is set to "silent_", nothing wil be printed at all, since
+# the variable $(silent_cmd_cc_o_c) doesn't exist.
+#
+# A simple variant is to prefix commands with $(Q) - that's usefull
+# for commands that shall be hidden in non-verbose mode.
+#
+# $(Q)ln $@ :<
+#
+# If KBUILD_VERBOSE equals 0 then the above command will be hidden.
+# If KBUILD_VERBOSE equals 1 then the above command is displayed.
ifeq ($(KBUILD_VERBOSE),1)
quiet =
@@ -166,8 +176,8 @@
Q = @
endif
-# If the user is running make -s (silent mode), suppress echoing of
-# commands
+# If the user is running make -s (silent mode), suppress echoing of
+# commands
ifneq ($(findstring s,$(MAKEFLAGS)),)
quiet=silent_
@@ -175,7 +185,7 @@
export quiet Q KBUILD_VERBOSE
-# Paths to obj / src tree
+# Paths to obj / src tree
src := .
obj := .
@@ -184,7 +194,7 @@
export srctree objtree
-# Make variables (CC, etc...)
+# Make variables (CC, etc...)
AS = $(CROSS_COMPILE)as
LD = $(CROSS_COMPILE)ld
@@ -213,9 +223,9 @@
NOSTDINC_FLAGS = -nostdinc -iwithprefix include
CPPFLAGS := -D__KERNEL__ -Iinclude
-CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \
+CFLAGS := -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \
-fno-strict-aliasing -fno-common
-AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS)
+AFLAGS := -D__ASSEMBLY__
export VERSION PATCHLEVEL SUBLEVEL EXTRAVERSION KERNELRELEASE ARCH \
CONFIG_SHELL TOPDIR HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC \
@@ -236,7 +246,7 @@
noconfig_targets := xconfig gconfig menuconfig config oldconfig randconfig \
defconfig allyesconfig allnoconfig allmodconfig \
clean mrproper distclean rpm \
- help tags TAGS cscope sgmldocs psdocs pdfdocs htmldocs \
+ help tags TAGS cscope %docs \
checkconfig checkhelp checkincludes
RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS \) -prune -o
@@ -271,6 +281,10 @@
include arch/$(ARCH)/Makefile
+# Let architecture Makefiles change CPPFLAGS if needed
+CFLAGS += $(CPPFLAGS) $(CFLAGS)
+AFLAGS += $(CPPFLAGS) $(AFLAGS)
+
core-y += kernel/ mm/ fs/ ipc/ security/ crypto/
SUBDIRS += $(patsubst %/,%,$(filter %/, $(init-y) $(init-m) \
@@ -308,6 +322,10 @@
CFLAGS += -fomit-frame-pointer
endif
+ifdef CONFIG_DEBUG_INFO
+CFLAGS += -g
+endif
+
#
# INSTALL_PATH specifies where to place the updated kernel and system map
# images. Uncomment if you want to place them anywhere other than root.
@@ -352,7 +370,7 @@
# set -e makes the rule exit immediately on error
define rule_vmlinux__
- set -e; \
+ +set -e; \
$(if $(filter .tmp_kallsyms%,$^),, \
echo ' GEN .version'; \
. $(srctree)/scripts/mkversion > .tmp_version; \
@@ -825,12 +843,12 @@
@echo ' make C=1 [targets] Check all c source with checker tool'
@echo ''
@echo 'Execute "make" or "make all" to build all targets marked with [*] '
- @echo 'For further info browse Documentation/kbuild/*'
+ @echo 'For further info see the ./README file'
# Documentation targets
# ---------------------------------------------------------------------------
-sgmldocs psdocs pdfdocs htmldocs: scripts/docproc FORCE
+%docs: scripts/docproc FORCE
$(Q)$(MAKE) $(build)=Documentation/DocBook $@
# Scripts to check various things for consistency
diff -Nru a/arch/alpha/Kconfig b/arch/alpha/Kconfig
--- a/arch/alpha/Kconfig Sun Aug 3 13:14:51 2003
+++ b/arch/alpha/Kconfig Sun Aug 3 13:14:51 2003
@@ -681,42 +681,8 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
source "net/bluetooth/Kconfig"
@@ -801,6 +767,15 @@
If you say Y here then semaphore processing will issue lots of
verbose debugging messages. If you suspect a semaphore problem or a
kernel hacker asks for this option then say Y. Otherwise say N.
+
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
endmenu
diff -Nru a/arch/alpha/defconfig b/arch/alpha/defconfig
--- a/arch/alpha/defconfig Sun Aug 3 13:14:48 2003
+++ b/arch/alpha/defconfig Sun Aug 3 13:14:48 2003
@@ -167,7 +167,6 @@
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_PIIX is not set
-# CONFIG_BLK_DEV_NFORCE is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
@@ -180,7 +179,6 @@
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
--- a/arch/alpha/kernel/pci.c Sun Aug 3 13:14:45 2003
+++ b/arch/alpha/kernel/pci.c Sun Aug 3 13:14:45 2003
@@ -335,7 +335,7 @@
if (cmd != oldcmd) {
printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
- dev->slot_name, cmd);
+ pci_name(dev), cmd);
/* Enable the appropriate bits in the PCI command register. */
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
@@ -354,7 +354,7 @@
pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
if (lat >= 16) return;
printk("PCI: Setting latency timer of device %s to 64\n",
- dev->slot_name);
+ pci_name(dev));
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
}
diff -Nru a/arch/arm/Kconfig b/arch/arm/Kconfig
--- a/arch/arm/Kconfig Sun Aug 3 13:14:49 2003
+++ b/arch/arm/Kconfig Sun Aug 3 13:14:49 2003
@@ -924,42 +924,11 @@
source "drivers/video/Kconfig"
-menu "Sound"
- depends on ARCH_ACORN || ARCH_CLPS7500 || ARCH_TBOX || ARCH_SHARK || ARCH_SA1100 || PCI
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
+if ARCH_ACORN || ARCH_CLPS7500 || ARCH_TBOX || ARCH_SHARK || ARCH_SA1100 || PCI
source "sound/Kconfig"
-endmenu
+endif
source "drivers/misc/Kconfig"
@@ -1060,6 +1029,15 @@
but mostly meaningless to other people. It's safe to say Y unless
you are concerned with the code size or don't want to see these
messages.
+
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
# These options are only for real kernel hackers who want to get their hands dirty.
config DEBUG_LL
diff -Nru a/arch/arm/common/sa1111-pcipool.c b/arch/arm/common/sa1111-pcipool.c
--- a/arch/arm/common/sa1111-pcipool.c Sun Aug 3 13:14:50 2003
+++ b/arch/arm/common/sa1111-pcipool.c Sun Aug 3 13:14:50 2003
@@ -59,7 +59,7 @@
else if (pcidev_is_sa1111(pdev))
return "[SA-1111]";
else
- return pdev->slot_name;
+ return pci_name(pdev);
}
@@ -333,7 +333,7 @@
if ((page = pool_find_page (pool, dma)) == 0) {
printk (KERN_ERR "pci_pool_free %s/%s, %p/%lx (bad dma)\n",
- pool->dev ? pool->dev->slot_name : NULL,
+ pool->dev ? pci_name(pool->dev) : NULL,
pool->name, vaddr, (unsigned long) dma);
return;
}
@@ -346,13 +346,13 @@
#ifdef CONFIG_DEBUG_SLAB
if (((dma - page->dma) + (void *)page->vaddr) != vaddr) {
printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%lx\n",
- pool->dev ? pool->dev->slot_name : NULL,
+ pool->dev ? pci_name(pool->dev) : NULL,
pool->name, vaddr, (unsigned long) dma);
return;
}
if (page->bitmap [map] & (1UL << block)) {
printk (KERN_ERR "pci_pool_free %s/%s, dma %x already free\n",
- pool->dev ? pool->dev->slot_name : NULL,
+ pool->dev ? pci_name(pool->dev) : NULL,
pool->name, dma);
return;
}
diff -Nru a/arch/arm/def-configs/a5k b/arch/arm/def-configs/a5k
--- a/arch/arm/def-configs/a5k Sun Aug 3 13:14:47 2003
+++ b/arch/arm/def-configs/a5k Sun Aug 3 13:14:47 2003
@@ -277,7 +277,6 @@
# CONFIG_BLK_DEV_IDE_RAPIDE is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/adi_evb b/arch/arm/def-configs/adi_evb
--- a/arch/arm/def-configs/adi_evb Sun Aug 3 13:14:48 2003
+++ b/arch/arm/def-configs/adi_evb Sun Aug 3 13:14:48 2003
@@ -375,7 +375,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/adsbitsy b/arch/arm/def-configs/adsbitsy
--- a/arch/arm/def-configs/adsbitsy Sun Aug 3 13:14:50 2003
+++ b/arch/arm/def-configs/adsbitsy Sun Aug 3 13:14:50 2003
@@ -339,7 +339,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/assabet b/arch/arm/def-configs/assabet
--- a/arch/arm/def-configs/assabet Sun Aug 3 13:14:47 2003
+++ b/arch/arm/def-configs/assabet Sun Aug 3 13:14:47 2003
@@ -483,7 +483,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/badge4 b/arch/arm/def-configs/badge4
--- a/arch/arm/def-configs/badge4 Sun Aug 3 13:14:51 2003
+++ b/arch/arm/def-configs/badge4 Sun Aug 3 13:14:51 2003
@@ -536,7 +536,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/brutus b/arch/arm/def-configs/brutus
--- a/arch/arm/def-configs/brutus Sun Aug 3 13:14:51 2003
+++ b/arch/arm/def-configs/brutus Sun Aug 3 13:14:51 2003
@@ -123,7 +123,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/cerfcube b/arch/arm/def-configs/cerfcube
--- a/arch/arm/def-configs/cerfcube Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/cerfcube Sun Aug 3 13:14:44 2003
@@ -460,7 +460,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/cerfpda b/arch/arm/def-configs/cerfpda
--- a/arch/arm/def-configs/cerfpda Sun Aug 3 13:14:46 2003
+++ b/arch/arm/def-configs/cerfpda Sun Aug 3 13:14:46 2003
@@ -490,7 +490,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/cerfpod b/arch/arm/def-configs/cerfpod
--- a/arch/arm/def-configs/cerfpod Sun Aug 3 13:14:53 2003
+++ b/arch/arm/def-configs/cerfpod Sun Aug 3 13:14:53 2003
@@ -461,7 +461,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/clps7500 b/arch/arm/def-configs/clps7500
--- a/arch/arm/def-configs/clps7500 Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/clps7500 Sun Aug 3 13:14:44 2003
@@ -298,7 +298,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/ebsa110 b/arch/arm/def-configs/ebsa110
--- a/arch/arm/def-configs/ebsa110 Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/ebsa110 Sun Aug 3 13:14:44 2003
@@ -387,7 +387,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/edb7211 b/arch/arm/def-configs/edb7211
--- a/arch/arm/def-configs/edb7211 Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/edb7211 Sun Aug 3 13:14:44 2003
@@ -225,7 +225,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/flexanet b/arch/arm/def-configs/flexanet
--- a/arch/arm/def-configs/flexanet Sun Aug 3 13:14:52 2003
+++ b/arch/arm/def-configs/flexanet Sun Aug 3 13:14:52 2003
@@ -469,7 +469,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/footbridge b/arch/arm/def-configs/footbridge
--- a/arch/arm/def-configs/footbridge Sun Aug 3 13:14:47 2003
+++ b/arch/arm/def-configs/footbridge Sun Aug 3 13:14:47 2003
@@ -414,7 +414,6 @@
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
-CONFIG_BLK_DEV_PDC202XX=y
# CONFIG_PDC202XX_BURST is not set
# CONFIG_BLK_DEV_OSB4 is not set
# CONFIG_BLK_DEV_SIS5513 is not set
@@ -424,7 +423,6 @@
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/arm/def-configs/fortunet b/arch/arm/def-configs/fortunet
--- a/arch/arm/def-configs/fortunet Sun Aug 3 13:14:53 2003
+++ b/arch/arm/def-configs/fortunet Sun Aug 3 13:14:53 2003
@@ -295,7 +295,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/freebird b/arch/arm/def-configs/freebird
--- a/arch/arm/def-configs/freebird Sun Aug 3 13:14:46 2003
+++ b/arch/arm/def-configs/freebird Sun Aug 3 13:14:46 2003
@@ -374,7 +374,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/freebird_new b/arch/arm/def-configs/freebird_new
--- a/arch/arm/def-configs/freebird_new Sun Aug 3 13:14:45 2003
+++ b/arch/arm/def-configs/freebird_new Sun Aug 3 13:14:45 2003
@@ -388,7 +388,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/graphicsclient b/arch/arm/def-configs/graphicsclient
--- a/arch/arm/def-configs/graphicsclient Sun Aug 3 13:14:53 2003
+++ b/arch/arm/def-configs/graphicsclient Sun Aug 3 13:14:53 2003
@@ -445,7 +445,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/graphicsmaster b/arch/arm/def-configs/graphicsmaster
--- a/arch/arm/def-configs/graphicsmaster Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/graphicsmaster Sun Aug 3 13:14:44 2003
@@ -418,7 +418,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/h3600 b/arch/arm/def-configs/h3600
--- a/arch/arm/def-configs/h3600 Sun Aug 3 13:14:46 2003
+++ b/arch/arm/def-configs/h3600 Sun Aug 3 13:14:46 2003
@@ -472,7 +472,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/huw_webpanel b/arch/arm/def-configs/huw_webpanel
--- a/arch/arm/def-configs/huw_webpanel Sun Aug 3 13:14:50 2003
+++ b/arch/arm/def-configs/huw_webpanel Sun Aug 3 13:14:50 2003
@@ -227,7 +227,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/integrator b/arch/arm/def-configs/integrator
--- a/arch/arm/def-configs/integrator Sun Aug 3 13:14:45 2003
+++ b/arch/arm/def-configs/integrator Sun Aug 3 13:14:45 2003
@@ -410,7 +410,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/iq80321 b/arch/arm/def-configs/iq80321
--- a/arch/arm/def-configs/iq80321 Sun Aug 3 13:14:46 2003
+++ b/arch/arm/def-configs/iq80321 Sun Aug 3 13:14:46 2003
@@ -406,7 +406,6 @@
# CONFIG_BLK_DEV_SL82C105 is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/arm/def-configs/jornada720 b/arch/arm/def-configs/jornada720
--- a/arch/arm/def-configs/jornada720 Sun Aug 3 13:14:46 2003
+++ b/arch/arm/def-configs/jornada720 Sun Aug 3 13:14:46 2003
@@ -472,7 +472,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/lart b/arch/arm/def-configs/lart
--- a/arch/arm/def-configs/lart Sun Aug 3 13:14:47 2003
+++ b/arch/arm/def-configs/lart Sun Aug 3 13:14:47 2003
@@ -474,7 +474,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/omnimeter b/arch/arm/def-configs/omnimeter
--- a/arch/arm/def-configs/omnimeter Sun Aug 3 13:14:47 2003
+++ b/arch/arm/def-configs/omnimeter Sun Aug 3 13:14:47 2003
@@ -304,7 +304,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/pangolin b/arch/arm/def-configs/pangolin
--- a/arch/arm/def-configs/pangolin Sun Aug 3 13:14:48 2003
+++ b/arch/arm/def-configs/pangolin Sun Aug 3 13:14:48 2003
@@ -424,7 +424,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/pfs168_mqtft b/arch/arm/def-configs/pfs168_mqtft
--- a/arch/arm/def-configs/pfs168_mqtft Sun Aug 3 13:14:48 2003
+++ b/arch/arm/def-configs/pfs168_mqtft Sun Aug 3 13:14:48 2003
@@ -447,7 +447,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/pfs168_mqvga b/arch/arm/def-configs/pfs168_mqvga
--- a/arch/arm/def-configs/pfs168_mqvga Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/pfs168_mqvga Sun Aug 3 13:14:44 2003
@@ -447,7 +447,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/pfs168_sastn b/arch/arm/def-configs/pfs168_sastn
--- a/arch/arm/def-configs/pfs168_sastn Sun Aug 3 13:14:45 2003
+++ b/arch/arm/def-configs/pfs168_sastn Sun Aug 3 13:14:45 2003
@@ -448,7 +448,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/pfs168_satft b/arch/arm/def-configs/pfs168_satft
--- a/arch/arm/def-configs/pfs168_satft Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/pfs168_satft Sun Aug 3 13:14:44 2003
@@ -447,7 +447,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/arm/def-configs/pleb b/arch/arm/def-configs/pleb
--- a/arch/arm/def-configs/pleb Sun Aug 3 13:14:50 2003
+++ b/arch/arm/def-configs/pleb Sun Aug 3 13:14:50 2003
@@ -331,7 +331,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/def-configs/shannon b/arch/arm/def-configs/shannon
--- a/arch/arm/def-configs/shannon Sun Aug 3 13:14:45 2003
+++ b/arch/arm/def-configs/shannon Sun Aug 3 13:14:45 2003
@@ -384,7 +384,6 @@
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
#
diff -Nru a/arch/arm/def-configs/stork b/arch/arm/def-configs/stork
--- a/arch/arm/def-configs/stork Sun Aug 3 13:14:52 2003
+++ b/arch/arm/def-configs/stork Sun Aug 3 13:14:52 2003
@@ -469,7 +469,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/system3 b/arch/arm/def-configs/system3
--- a/arch/arm/def-configs/system3 Sun Aug 3 13:14:47 2003
+++ b/arch/arm/def-configs/system3 Sun Aug 3 13:14:47 2003
@@ -486,7 +486,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/arm/def-configs/trizeps b/arch/arm/def-configs/trizeps
--- a/arch/arm/def-configs/trizeps Sun Aug 3 13:14:44 2003
+++ b/arch/arm/def-configs/trizeps Sun Aug 3 13:14:44 2003
@@ -495,7 +495,6 @@
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/arm/defconfig b/arch/arm/defconfig
--- a/arch/arm/defconfig Sun Aug 3 13:14:46 2003
+++ b/arch/arm/defconfig Sun Aug 3 13:14:46 2003
@@ -303,7 +303,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
--- a/arch/arm/kernel/bios32.c Sun Aug 3 13:14:47 2003
+++ b/arch/arm/kernel/bios32.c Sun Aug 3 13:14:47 2003
@@ -460,7 +460,7 @@
if (debug_pci)
printk("PCI: %s swizzling pin %d => pin %d slot %d\n",
- dev->slot_name, oldpin, *pin, slot);
+ pci_name(dev), oldpin, *pin, slot);
return slot;
}
@@ -478,7 +478,7 @@
if (debug_pci)
printk("PCI: %s mapping slot %d pin %d => irq %d\n",
- dev->slot_name, slot, pin, irq);
+ pci_name(dev), slot, pin, irq);
return irq;
}
@@ -611,7 +611,7 @@
r = dev->resource + idx;
if (!r->start && r->end) {
printk(KERN_ERR "PCI: Device %s not available because"
- " of resource collisions\n", dev->slot_name);
+ " of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -628,7 +628,7 @@
if (cmd != old_cmd) {
printk("PCI: enabling device %s (%04x -> %04x)\n",
- dev->slot_name, old_cmd, cmd);
+ pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
diff -Nru a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c
--- a/arch/arm/mach-footbridge/netwinder-pci.c Sun Aug 3 13:14:44 2003
+++ b/arch/arm/mach-footbridge/netwinder-pci.c Sun Aug 3 13:14:44 2003
@@ -37,7 +37,7 @@
default:
printk(KERN_ERR "PCI: unknown device in slot %s: %s\n",
- dev->slot_name, dev->dev.name);
+ pci_name(dev), dev->dev.name);
return 0;
}
}
diff -Nru a/arch/arm26/Kconfig b/arch/arm26/Kconfig
--- a/arch/arm26/Kconfig Sun Aug 3 13:14:49 2003
+++ b/arch/arm26/Kconfig Sun Aug 3 13:14:49 2003
@@ -254,42 +254,11 @@
source "drivers/video/Kconfig"
-menu "Sound"
- depends on ARCH_ACORN
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.linuxdoc.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
+if ARCH_ACORN
source "sound/Kconfig"
-endmenu
+endif
source "drivers/misc/Kconfig"
@@ -390,6 +359,15 @@
but mostly meaningless to other people. It's safe to say Y unless
you are concerned with the code size or don't want to see these
messages.
+
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
# These options are only for real kernel hackers who want to get their hands dirty.
config DEBUG_LL
diff -Nru a/arch/arm26/lib/kbd.c b/arch/arm26/lib/kbd.c
--- a/arch/arm26/lib/kbd.c Sun Aug 3 13:14:45 2003
+++ b/arch/arm26/lib/kbd.c Sun Aug 3 13:14:45 2003
@@ -146,7 +146,7 @@
static int
gen_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
{
- static int prev_scancode = 0;
+ static int prev_scancode;
/* special prefix scancodes.. */
if (scancode == 0xe0 || scancode == 0xe1) {
diff -Nru a/arch/cris/Kconfig b/arch/cris/Kconfig
--- a/arch/cris/Kconfig Sun Aug 3 13:14:52 2003
+++ b/arch/cris/Kconfig Sun Aug 3 13:14:52 2003
@@ -200,42 +200,7 @@
source "fs/Kconfig"
-
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-
-endmenu
source "drivers/usb/Kconfig"
diff -Nru a/arch/cris/arch-v10/defconfig b/arch/cris/arch-v10/defconfig
--- a/arch/cris/arch-v10/defconfig Sun Aug 3 13:14:46 2003
+++ b/arch/cris/arch-v10/defconfig Sun Aug 3 13:14:46 2003
@@ -267,7 +267,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
--- a/arch/cris/arch-v10/drivers/pcf8563.c Sun Aug 3 13:14:47 2003
+++ b/arch/cris/arch-v10/drivers/pcf8563.c Sun Aug 3 13:14:47 2003
@@ -282,6 +282,5 @@
return 0;
}
-EXPORT_NO_SYMBOLS;
module_init(pcf8563_init);
module_exit(pcf8563_exit);
diff -Nru a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c
--- a/arch/cris/arch-v10/lib/old_checksum.c Sun Aug 3 13:14:51 2003
+++ b/arch/cris/arch-v10/lib/old_checksum.c Sun Aug 3 13:14:51 2003
@@ -75,7 +75,7 @@
sum += *((unsigned short *)buff)++;
}
if(endMarker - buff > 0) {
- sum += *buff; /* add extra byte seperately */
+ sum += *buff; /* add extra byte separately */
}
BITOFF;
return(sum);
diff -Nru a/arch/cris/defconfig b/arch/cris/defconfig
--- a/arch/cris/defconfig Sun Aug 3 13:14:46 2003
+++ b/arch/cris/defconfig Sun Aug 3 13:14:46 2003
@@ -187,7 +187,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
--- a/arch/cris/mm/fault.c Sun Aug 3 13:14:52 2003
+++ b/arch/cris/mm/fault.c Sun Aug 3 13:14:52 2003
@@ -8,7 +8,7 @@
* $Log: fault.c,v $
* Revision 1.8 2003/07/04 13:02:48 tobiasa
* Moved code snippet from arch/cris/mm/fault.c that searches for fixup code
- * to seperate function in arch-specific files.
+ * to separate function in arch-specific files.
*
* Revision 1.7 2003/01/22 06:48:38 starvik
* Fixed warnings issued by GCC 3.2.1
diff -Nru a/arch/h8300/Kconfig b/arch/h8300/Kconfig
--- a/arch/h8300/Kconfig Sun Aug 3 13:14:51 2003
+++ b/arch/h8300/Kconfig Sun Aug 3 13:14:51 2003
@@ -29,6 +29,9 @@
bool
default n
+config ISA
+ bool
+ default y
source "init/Kconfig"
@@ -67,6 +70,21 @@
More Information.
arch/h8300/Doc/simulator.txt
+config H8S_EDOSK2674
+ bool "EDOSK-2674"
+ help
+ Renesas EDOSK-2674R Evalution Board Support
+ More Information.
+ <http://www.azpower.com/H8-uClinux/index.html>
+ <http://www.eu.renesas.com/tools/edk/support/edosk2674.html>
+
+config H8S_SIM
+ bool "H8S Simulator"
+ help
+ GDB Simulator Support
+ More Information.
+ arch/h8300/Doc/simulator.txt
+
endchoice
choice
@@ -88,6 +106,10 @@
bool "H8/3065,3066,3067,3068,3069"
depends on (H8300H_GENERIC || H8300H_AKI3068NET || H8300H_H8MAX)
+config H8S2678
+ bool "H8S/2670,2673,2674R,2675,2676"
+ depends on (H8S_GENERIC || H8S_EDOSK2674 || H8S_SIM)
+
endchoice
config CPU_H8300H
@@ -95,12 +117,20 @@
depends on (H8300H_GENERIC || H8300H_AKI3068NET || H8300H_H8MAX || H8300H_SIM)
default y
+config CPU_H8S
+ bool
+ depends on (H8S_GENERIC || H8S_EDOSK2674 || H8S_SIM)
+ default y
+
config CPU_CLOCK
int "CPU Clock Frequency (/1KHz)"
default "20000" if H8300H_AKI3068NET
default "25000" if H8300H_H8MAX
default "16000" if H8300H_SIM
default "16000" if H8300H_GENERIC
+ default "33000" if H8S_GENERIC
+ default "33000" if H8S_SIM
+ default "33000" if H8S_EDOSK2674
help
CPU Clock Frequency divide to 1000
choice
@@ -121,15 +151,28 @@
endchoice
config DEFAULT_CMDLINE
- bool
+ bool "Use buildin commandline"
+ default n
help
buildin kernel commandline enabled.
config KERNEL_COMMAND
- string
+ string "Buildin commmand string"
+ depends on DEFAULT_CMDLINE
help
buildin kernel commandline strings.
+config BLKDEV_RESERVE
+ bool "BLKDEV Reserved Memory"
+ default n
+ help
+ Reserved BLKDEV area.
+
+config CONFIG_BLKDEV_RESERVE_ADDRESS
+ hex 'start address'
+ depends on BLKDEV_RESERVE
+ help
+ BLKDEV start address.
endmenu
menu "Executable file formats"
@@ -153,43 +196,6 @@
source "net/Kconfig"
-
-menu "Network device support"
- depends on NET
-
-config NETDEVICES
- bool "Network device support"
- ---help---
- You can say N here if you don't intend to connect your Linux box to
- any other computer at all or if all your connections will be over a
- telephone line with a modem either via UUCP (UUCP is a protocol to
- forward mail and news between unix hosts over telephone lines; read
- the UUCP-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>) or dialing up a shell
- account or a BBS, even using term (term is a program which gives you
- almost full Internet connectivity if you have a regular dial up
- shell account on some Internet connected Unix computer. Read
- <http://www.bart.nl/~patrickr/term-howto/Term-HOWTO.html>).
-
- You'll have to say Y if your computer contains a network card that
- you want to use under Linux (make sure you know its name because you
- will be asked for it and read the Ethernet-HOWTO (especially if you
- plan to use more than one network card under Linux)) or if you want
- to use SLIP (Serial Line Internet Protocol is the protocol used to
- send Internet traffic over telephone lines or null modem cables) or
- CSLIP (compressed SLIP) or PPP (Point to Point Protocol, a better
- and newer replacement for SLIP) or PLIP (Parallel Line Internet
- Protocol is mainly used to create a mini network by connecting the
- parallel ports of two local machines) or AX.25/KISS (protocol for
- sending Internet traffic over amateur radio links).
-
- Make sure to read the NET-3-HOWTO. Eventually, you will have to read
- Olaf Kirch's excellent and free book "Network Administrator's
- Guide", to be found in <http://www.tldp.org/docs.html#guide>. If
- unsure, say Y.
-
-endmenu
-
source "net/ax25/Kconfig"
source "net/irda/Kconfig"
@@ -379,7 +385,7 @@
config GDB_MAGICPRINT
bool "Message Output for GDB MagicPrint service"
- depends on H8300H_SIM
+ depends on (H8300H_SIM || H8S_SIM)
help
kernel messages output useing MagicPrint service from GDB
@@ -390,13 +396,13 @@
config GDB_DEBUG
bool "Use gdb stub"
- depends on !H8300H_SIM
+ depends on (!H8300H_SIM && H8S_SIM)
help
gdb stub exception support
config CONFIG_SH_STANDARD_BIOS
bool "Use gdb protocol serial console"
- depends on !H8300H_SIM
+ depends on (!H8300H_SIM && H8S_SIM)
help
serial console output using GDB protocol.
Require eCos/RedBoot
diff -Nru a/arch/h8300/Makefile b/arch/h8300/Makefile
--- a/arch/h8300/Makefile Sun Aug 3 13:14:45 2003
+++ b/arch/h8300/Makefile Sun Aug 3 13:14:45 2003
@@ -12,33 +12,40 @@
endif
platform-$(CONFIG_CPU_H8300H) := h8300h
+platform-$(CONFIG_CPU_H8S) := h8s
PLATFORM := $(platform-y)
board-$(CONFIG_H8300H_GENERIC) := generic
-board-$(CONFIG_H8300H_AKI3068NET) := ucsimm
-board-$(CONFIG_H8300H_H8MAX) := ucdimm
+board-$(CONFIG_H8300H_AKI3068NET) := aki3068net
+board-$(CONFIG_H8300H_H8MAX) := h8max
board-$(CONFIG_H8300H_SIM) := generic
+board-$(CONFIG_H8S_GENERIC) := generic
+board-$(CONFIG_H8S_EDOSK2674) := edosk2674
+board-$(CONFIG_H8S_SIM) := generic
BOARD := $(board-y)
model-$(CONFIG_RAMKERNEL) := ram
model-$(CONFIG_ROMKERNEL) := rom
MODEL := $(model-y)
-cflags-$(CONFIG_CPU_H8300H) := -mh
+cflags-$(CONFIG_CPU_H8300H) := -mh
ldflags-$(CONFIG_CPU_H8300H) := -mh8300helf
+cflags-$(CONFIG_CPU_H8S) := -ms
+ldflags-$(CONFIG_CPU_H8S) := -mh8300self
CFLAGS += $(cflags-y)
-CFLAGS += -mint32 -fno-builtin
-CFLAGS += -O2 -g
+CFLAGS += -mint32 -fno-builtin -Os
+CFLAGS += -g
CFLAGS += -D__linux__
CFLAGS += -DUTS_SYSNAME=\"uClinux\" -DTARGET=$(BOARD)
AFLAGS += -DPLATFORM=$(PLATFORM) -DTARGET=$(BOARD) -DMODEL=$(MODEL) $(cflags-y)
LDFLAGS += $(ldflags-y)
CROSS_COMPILE = h8300-elf-
-#HEAD := arch/$(ARCH)/platform/$(platform-y)/$(board-y)/crt0_$(model-y).o
LIBGCC := $(shell $(CROSS-COMPILE)$(CC) $(CFLAGS) -print-libgcc-file-name)
+head-y := arch/$(ARCH)/platform/$(platform-y)/$(board-y)/crt0_$(model-y).o
+
core-y += arch/$(ARCH)/kernel/ \
arch/$(ARCH)/mm/ \
arch/$(ARCH)/platform/$(PLATFORM)/ \
@@ -58,3 +65,16 @@
include/asm-$(ARCH)/asm-offsets.h: arch/$(ARCH)/kernel/asm-offsets.s \
include/asm include/linux/version.h
$(call filechk,gen-asm-offsets)
+
+vmlinux.bin: vmlinux
+ $(OBJCOPY) -Obinary $< $@
+
+vmlinux.srec: vmlinux
+ $(OBJCOPY) -Osrec $< $@
+
+define archhelp
+ echo 'vmlinux.bin - Create raw binary'
+ echo 'vmlinux.srec - Create srec binary'
+endef
+
+CLEAN_FILES += arch/$(ARCH)/vmlinux.bin arch/$(ARCH)/vmlinux.srec
diff -Nru a/arch/h8300/defconfig b/arch/h8300/defconfig
--- a/arch/h8300/defconfig Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/defconfig Sun Aug 3 13:14:46 2003
@@ -7,6 +7,7 @@
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_ISA=y
#
# Code maturity level options
@@ -20,7 +21,9 @@
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
#
# Loadable module support
@@ -42,19 +45,76 @@
CONFIG_CPU_CLOCK=16000
# CONFIG_RAMKERNEL is not set
CONFIG_ROMKERNEL=y
+# CONFIG_DEFAULT_CMDLINE is not set
#
# Executable file formats
#
CONFIG_KCORE_AOUT=y
CONFIG_BINFMT_FLAT=y
+# CONFIG_BINFMT_ZFLAT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_UCLINUX=y
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/IDE/MFM/RLL support
@@ -156,6 +216,8 @@
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
@@ -180,8 +242,8 @@
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_HIGHPROFILE is not set
CONFIG_NO_KERNEL_MSG=y
-# CONFIG_GDB_MAGICPRINT is not set
-# CONFIG_SYSCALL_PRINT is not set
+CONFIG_GDB_MAGICPRINT=y
+CONFIG_SYSCALL_PRINT=y
#
# Security options
diff -Nru a/arch/h8300/kernel/asm-offsets.c b/arch/h8300/kernel/asm-offsets.c
--- a/arch/h8300/kernel/asm-offsets.c Sun Aug 3 13:14:44 2003
+++ b/arch/h8300/kernel/asm-offsets.c Sun Aug 3 13:14:44 2003
@@ -40,7 +40,6 @@
DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
DEFINE(THREAD_CCR, offsetof(struct thread_struct, ccr));
- DEFINE(THREAD_VFORK, offsetof(struct thread_struct, vfork_ret));
DEFINE(PT_PTRACED, PT_PTRACED);
DEFINE(PT_DTRACE, PT_DTRACE);
diff -Nru a/arch/h8300/kernel/gpio.c b/arch/h8300/kernel/gpio.c
--- a/arch/h8300/kernel/gpio.c Sun Aug 3 13:14:48 2003
+++ b/arch/h8300/kernel/gpio.c Sun Aug 3 13:14:48 2003
@@ -6,7 +6,7 @@
*/
/*
- * H8/300H Internal I/O Port Management
+ * Internal I/O Port Management
*/
#include <linux/config.h>
@@ -15,50 +15,56 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/fs.h>
+#include <linux/init.h>
+#define _(addr) (volatile unsigned char *)(addr)
#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
-#define P1DDR (unsigned char *)0xfee000
-#define P2DDR (unsigned char *)0xfee001
-#define P3DDR (unsigned char *)0xfee002
-#define P4DDR (unsigned char *)0xfee003
-#define P5DDR (unsigned char *)0xfee004
-#define P6DDR (unsigned char *)0xfee005
-#define P8DDR (unsigned char *)0xfee007
-#define P9DDR (unsigned char *)0xfee008
-#define PADDR (unsigned char *)0xfee009
-#define PBDDR (unsigned char *)0xfee00A
-#endif
-#if defined(CONFIG_H83002) || defined(CONFIG_H8048)
-#define P1DDR (unsigned char *)0xffffc0
-#define P2DDR (unsigned char *)0xffffc1
-#define P3DDR (unsigned char *)0xffffc4
-#define P4DDR (unsigned char *)0xffffc5
-#define P5DDR (unsigned char *)0xffffc8
-#define P6DDR (unsigned char *)0xffffc9
-#define P8DDR (unsigned char *)0xffffcd
-#define P9DDR (unsigned char *)0xffffd0
-#define PADDR (unsigned char *)0xffffd1
-#define PBDDR (unsigned char *)0xffffd4
+#include <asm/regs306x.h>
+static volatile unsigned char *ddrs[] = {
+ _(P1DDR),_(P2DDR),_(P3DDR),_(P4DDR),_(P5DDR),_(P6DDR),
+ NULL, _(P8DDR),_(P9DDR),_(PADDR),_(PBDDR),
+};
+#define MAX_PORT 11
#endif
-#if defined(P1DDR)
-
+ #if defined(CONFIG_H83002) || defined(CONFIG_H8048)
+/* Fix me!! */
+#include <asm/regs306x.h>
+static volatile unsigned char *ddrs[] = {
+ _(P1DDR),_(P2DDR),_(P3DDR),_(P4DDR),_(P5DDR),_(P6DDR),
+ NULL, _(P8DDR),_(P9DDR),_(PADDR),_(PBDDR),
+};
#define MAX_PORT 11
+#endif
+
+#if defined(CONFIG_H8S2678)
+#include <asm/regs267x.h>
+static volatile unsigned char *ddrs[] = {
+ _(P1DDR),_(P2DDR),_(P3DDR),NULL ,_(P5DDR),_(P6DDR),
+ _(P7DDR),_(P8DDR),NULL, _(PADDR),_(PBDDR),_(PCDDR),
+ _(PDDDR),_(PEDDR),_(PFDDR),_(PGDDR),_(PHDDR),
+ _(PADDR),_(PBDDR),_(PCDDR),_(PDDDR),_(PEDDR),_(PFDDR),
+ _(PGDDR),_(PHDDR)
+};
+#define MAX_PORT 17
+#endif
+#undef _
+
+#if !defined(P1DDR)
+#error Unsuppoted CPU Selection
+#endif
static struct {
unsigned char used;
unsigned char ddr;
} gpio_regs[MAX_PORT];
-static volatile unsigned char *ddrs[] = {
- P1DDR,P2DDR,P3DDR,P4DDR,P5DDR,P6DDR,NULL,P8DDR,P9DDR,PADDR,PBDDR,
-};
-
extern char *_platform_gpio_table(int length);
int h8300_reserved_gpio(int port, unsigned int bits)
{
unsigned char *used;
+
if (port < 0 || port >= MAX_PORT)
return -1;
used = &(gpio_regs[port].used);
@@ -71,6 +77,7 @@
int h8300_free_gpio(int port, unsigned int bits)
{
unsigned char *used;
+
if (port < 0 || port >= MAX_PORT)
return -1;
used = &(gpio_regs[port].used);
@@ -82,16 +89,16 @@
int h8300_set_gpio_dir(int port_bit,int dir)
{
- const unsigned char mask[]={0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80};
int port = (port_bit >> 8) & 0xff;
- int bit = port_bit & 0x07;
+ int bit = port_bit & 0xff;
+
if (ddrs[port] == NULL)
return 0;
- if (gpio_regs[port].used & mask[bit]) {
+ if (gpio_regs[port].used & bit) {
if (dir)
- gpio_regs[port].ddr |= mask[bit];
+ gpio_regs[port].ddr |= bit;
else
- gpio_regs[port].ddr &= ~mask[bit];
+ gpio_regs[port].ddr &= ~bit;
*ddrs[port] = gpio_regs[port].ddr;
return 1;
} else
@@ -100,13 +107,13 @@
int h8300_get_gpio_dir(int port_bit)
{
- const unsigned char mask[]={0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80};
int port = (port_bit >> 8) & 0xff;
- int bit = port_bit & 0x07;
+ int bit = port_bit & 0xff;
+
if (ddrs[port] == NULL)
return 0;
- if (gpio_regs[port].used & mask[bit]) {
- return (gpio_regs[port].ddr & mask[bit]) != 0;
+ if (gpio_regs[port].used & bit) {
+ return (gpio_regs[port].ddr & bit) != 0;
} else
return -1;
}
@@ -132,10 +139,11 @@
return result;
}
-static int gpio_proc_read(char *buf, char **start, off_t offset, int len, int unused)
+static int gpio_proc_read(char *buf, char **start, off_t offset,
+ int len, int *unused_i, void *unused_v)
{
int c,outlen;
- const static char port_name[]="123456789AB";
+ const static char port_name[]="123456789ABCDEFGH";
outlen = 0;
for (c = 0; c < MAX_PORT; c++) {
if (ddrs[c] == NULL)
@@ -147,20 +155,20 @@
return outlen;
}
-static const struct proc_dir_entry proc_gpio = {
- 0, 4,"gpio",S_IFREG | S_IRUGO, 1, 0, 0, 0, NULL, gpio_proc_read,
-};
+static __init int register_proc(void)
+{
+ struct proc_dir_entry *proc_gpio;
+
+ proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
+ if (proc_gpio)
+ proc_gpio->read_proc = gpio_proc_read;
+ return proc_gpio != NULL;
+}
+
+__initcall(register_proc);
#endif
-int h8300_gpio_init(void)
+void __init h8300_gpio_init(void)
{
memcpy(gpio_regs,_platform_gpio_table(sizeof(gpio_regs)),sizeof(gpio_regs));
-#if 0 && defined(CONFIG_PROC_FS)
- proc_register(&proc_root,&proc_gpio);
-#endif
- return 0;
}
-
-#else
-#error Unsuppoted CPU Selection
-#endif
diff -Nru a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
--- a/arch/h8300/kernel/process.c Sun Aug 3 13:14:44 2003
+++ b/arch/h8300/kernel/process.c Sun Aug 3 13:14:44 2003
@@ -44,12 +44,12 @@
#include <asm/setup.h>
#include <asm/pgtable.h>
-asmlinkage void ret_from_exception(void);
+asmlinkage void ret_from_fork(void);
/*
* The idle loop on an H8/300..
*/
-#if !defined(CONFIG_H8300H_SIM)
+#if !defined(CONFIG_H8300H_SIM) && !defined(CONFIG_H8S_SIM)
void default_idle(void)
{
while(1) {
@@ -85,20 +85,20 @@
void machine_restart(char * __unused)
{
- cli();
+ local_irq_disable();
__asm__("jmp @@0");
}
void machine_halt(void)
{
- cli();
+ local_irq_disable();
__asm__("sleep");
for (;;);
}
void machine_power_off(void)
{
- cli();
+ local_irq_disable();
__asm__("sleep");
for (;;);
}
@@ -110,10 +110,13 @@
regs->pc, regs->ccr);
printk("ORIG_ER0: %08lx ER0: %08lx ER1: %08lx\n",
regs->orig_er0, regs->er0, regs->er1);
- printk("ER2: %08lx ER3: %08lx\n",
- regs->er2, regs->er3);
- if (!(regs->ccr & 0x10))
+ printk("ER2: %08lx ER3: %08lx ER4: %08lx ER5: %08lx\n",
+ regs->er2, regs->er3, regs->er4, regs->er5);
+ printk("ER6' %08lx ",regs->er6);
+ if (user_mode(regs))
printk("USP: %08lx\n", rdusp());
+ else
+ printk("\n");
}
/*
@@ -122,34 +125,29 @@
int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
{
long retval;
- register long clone_arg asm("er1");
+ long clone_arg;
mm_segment_t fs;
fs = get_fs();
set_fs (KERNEL_DS);
clone_arg = flags | CLONE_VM;
-
- __asm__ __volatile__ (
- "mov.l sp, er2\n\t"
- "mov.l %1,er0\n\t"
- "mov.l %5,er1\n\t"
- "trapa #0\n\t"
- "cmp.l sp, er2\n\t"
- "beq 1f\n\t"
- "mov.l %3, er0\n\t"
- "jsr @%4\n\t"
- "mov.l %2, er0\n\t"
- "trapa #0\n"
- "1:\n\t"
- "mov.l er0,%0"
- : "=r" (retval)
- : "i" (__NR_clone),
- "i" (__NR_exit),
- "r" (arg),
- "r" (fn),
- "r" (clone_arg)
- : "cc", "er0", "er1", "er2", "er3");
-
+ __asm__("mov.l sp,er3\n\t"
+ "sub.l er2,er2\n\t"
+ "mov.l %2,er1\n\t"
+ "mov.l %1,er0\n\t"
+ "trapa #0\n\t"
+ "cmp.l sp,er3\n\t"
+ "beq 1f\n\t"
+ "mov.l %4,er0\n\t"
+ "mov.l %3,er1\n\t"
+ "jsr @er1\n\t"
+ "mov.l %5,er0\n\t"
+ "trapa #0\n"
+ "1:\n\t"
+ "mov.l er0,%0"
+ :"=r"(retval)
+ :"i"(__NR_clone),"g"(clone_arg),"g"(fn),"g"(arg),"i"(__NR_exit)
+ :"er0","er1","er2","er3");
set_fs (fs);
return retval;
}
@@ -172,24 +170,20 @@
asmlinkage int h8300_vfork(struct pt_regs *regs)
{
- struct task_struct *p;
- p = do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL);
- return IS_ERR(p) ? PTR_ERR(p) : p->pid;
+ return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL);
}
asmlinkage int h8300_clone(struct pt_regs *regs)
{
unsigned long clone_flags;
unsigned long newsp;
- struct task_struct *p;
/* syscall2 puts clone_flags in er1 and usp in er2 */
clone_flags = regs->er1;
newsp = regs->er2;
if (!newsp)
newsp = rdusp();
- p = do_fork(clone_flags & ~CLONE_IDLETASK, newsp, regs, 0, NULL, NULL);
- return IS_ERR(p) ? PTR_ERR(p) : p->pid;
+ return do_fork(clone_flags & ~CLONE_IDLETASK, newsp, regs, 0, NULL, NULL);
}
@@ -198,25 +192,15 @@
struct task_struct * p, struct pt_regs * regs)
{
struct pt_regs * childregs;
- struct switch_stack * childstack, *stack;
- unsigned long stack_offset, *retp;
- stack_offset = KTHREAD_SIZE - sizeof(struct pt_regs);
childregs = ((struct pt_regs *) (THREAD_SIZE + (unsigned long) p->thread_info)) - 1;
*childregs = *regs;
-
- retp = (unsigned long *) regs-2;
- stack = ((struct switch_stack *) retp) - 1;
-
- childstack = ((struct switch_stack *) childregs) - 1;
- *childstack = *stack;
+ childregs->retpc = (unsigned long) ret_from_fork;
childregs->er0 = 0;
- childstack->retpc = (unsigned long) ret_from_exception;
p->thread.usp = usp;
- p->thread.ksp = (unsigned long)childstack;
- p->thread.vfork_ret = 0;
+ p->thread.ksp = (unsigned long)childregs;
return 0;
}
@@ -226,8 +210,6 @@
*/
void dump_thread(struct pt_regs * regs, struct user * dump)
{
- struct switch_stack *sw;
-
/* changed the size calculations - should hopefully work better. lbt */
dump->magic = CMAGIC;
dump->start_code = 0;
@@ -239,14 +221,13 @@
dump->u_ssize = 0;
dump->u_ar0 = (struct user_regs_struct *)(((int)(&dump->regs)) -((int)(dump)));
- sw = ((struct switch_stack *)regs) - 1;
dump->regs.er0 = regs->er0;
dump->regs.er1 = regs->er1;
dump->regs.er2 = regs->er2;
dump->regs.er3 = regs->er3;
- dump->regs.er4 = sw->er4;
- dump->regs.er5 = sw->er5;
- dump->regs.er6 = sw->er6;
+ dump->regs.er4 = regs->er4;
+ dump->regs.er5 = regs->er5;
+ dump->regs.er6 = regs->er6;
dump->regs.orig_er0 = regs->orig_er0;
dump->regs.ccr = regs->ccr;
dump->regs.pc = regs->pc;
@@ -259,7 +240,7 @@
{
int error;
char * filename;
- struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy+4);
+ struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy-4);
lock_kernel();
filename = getname(name);
@@ -283,14 +264,7 @@
unsigned long thread_saved_pc(struct task_struct *tsk)
{
- struct switch_stack *sw = (struct switch_stack *)(tsk->thread.ksp);
-
- /* Check whether the thread is blocked in resume() */
- if (sw->retpc > (unsigned long)scheduling_functions_start_here &&
- sw->retpc < (unsigned long)scheduling_functions_end_here)
- return ((unsigned long *)sw->er6)[1];
- else
- return sw->retpc;
+ return ((struct pt_regs *)tsk->thread.esp0)->pc;
}
unsigned long get_wchan(struct task_struct *p)
@@ -302,7 +276,7 @@
return 0;
stack_page = (unsigned long)p;
- fp = ((struct switch_stack *)p->thread.ksp)->er6;
+ fp = ((struct pt_regs *)p->thread.ksp)->er6;
do {
if (fp < stack_page+sizeof(struct task_struct) ||
fp >= 8184+stack_page)
diff -Nru a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
--- a/arch/h8300/kernel/ptrace.c Sun Aug 3 13:14:47 2003
+++ b/arch/h8300/kernel/ptrace.c Sun Aug 3 13:14:47 2003
@@ -46,14 +46,12 @@
/* Find the stack offset for a register, relative to thread.esp0. */
#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
-#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
- - sizeof(struct switch_stack))
/* Mapping from PT_xxx to the stack offset at which the register is
saved. Notice that usp has no stack-slot and needs to be treated
specially (see get_reg/put_reg below). */
static const int regoff[] = {
- PT_REG(er1), PT_REG(er2), PT_REG(er3), SW_REG(er4),
- SW_REG(er5), SW_REG(er6), PT_REG(er0), PT_REG(orig_er0),
+ PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
+ PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
PT_REG(ccr), PT_REG(pc)
};
diff -Nru a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
--- a/arch/h8300/kernel/setup.c Sun Aug 3 13:14:45 2003
+++ b/arch/h8300/kernel/setup.c Sun Aug 3 13:14:45 2003
@@ -1,5 +1,5 @@
/*
- * linux/arch/h8300h/kernel/setup.c
+ * linux/arch/h8300/kernel/setup.c
*
* Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
* Copyright (C) 1999,2000 Greg Ungerer (gerg@snapgear.com)
@@ -9,7 +9,7 @@
* Copyright (C) 2000 Lineo Inc. (www.lineo.com)
* Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
*
- * H8/300H porting Yoshinori Sato <ysato@users.sourceforge.jp>
+ * H8/300 porting Yoshinori Sato <ysato@users.sourceforge.jp>
*/
/*
@@ -38,10 +38,22 @@
#include <asm/pgtable.h>
#endif
-#if defined(CONFIG_CPU_H8300H)
+#if defined(__H8300H__)
#define CPU "H8/300H"
#endif
+#if defined(__H8300S__)
+#define CPU "H8S"
+#endif
+
+#if defined(CONFIG_INTELFLASH)
+#define BLKOFFSET 512
+#else
+#define BLKOFFSET 0
+#endif
+
+#define STUBSIZE 0xc000;
+
unsigned long rom_length;
unsigned long memory_start;
unsigned long memory_end;
@@ -54,10 +66,12 @@
extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
extern int _ramstart, _ramend;
extern char _target_name[];
+extern void h8300_gpio_init(void);
-#if defined(CONFIG_H8300H_SIM) && defined(CONFIG_GDB_MAGICPRINT)
+#if (defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)) \
+ && defined(CONFIG_GDB_MAGICPRINT)
/* printk with gdb service */
-static void gdb_console_output(struct console *c, char *msg, unsigned len)
+static void gdb_console_output(struct console *c, const char *msg, unsigned len)
{
for (; len > 0; len--) {
asm("mov.w %0,r2\n\t"
@@ -77,7 +91,7 @@
}
static const struct console gdb_console = {
- name: "gdb",
+ name: "gdb_con",
write: gdb_console_output,
device: NULL,
setup: gdb_console_setup,
@@ -86,26 +100,48 @@
};
#endif
-void setup_arch(char **cmdline_p)
+void __init setup_arch(char **cmdline_p)
{
int bootmap_size;
- memory_start = PAGE_ALIGN((unsigned long)(&_ramstart));
- memory_end = &_ramend; /* by now the stack is part of the init task */
+ memory_start = (unsigned long) &_ramstart;
+
+ /* allow for ROMFS on the end of the kernel */
+ if (memcmp((void *)(memory_start + BLKOFFSET), "-rom1fs-", 8) == 0) {
+#if defined(CONFIG_BLK_DEV_INITRD)
+ initrd_start = memory_start += BLKOFFSET;
+ initrd_end = memory_start += be32_to_cpu(((unsigned long *) (memory_start))[2]);
+#else
+ memory_start += BLKOFFSET;
+ memory_start += be32_to_cpu(((unsigned long *) memory_start)[2]);
+#endif
+ }
+ memory_start = PAGE_ALIGN(memory_start);
+#if !defined(CONFIG_BLKDEV_RESERVE)
+ memory_end = (unsigned long) &_ramend; /* by now the stack is part of the init task */
+#if defined(CONFIG_GDB_DEBUG)
+ memory_end -= STUBSIZE;
+#endif
+#else
+ if ((memory_end < CONFIG_BLKDEV_RESERVE_ADDRESS) &&
+ (memory_end > CONFIG_BLKDEV_RESERVE_ADDRESS)
+ /* overlap userarea */
+ memory_end = CONFIG_BLKDEV_RESERVE_ADDRESS;
+#endif
init_mm.start_code = (unsigned long) &_stext;
init_mm.end_code = (unsigned long) &_etext;
init_mm.end_data = (unsigned long) &_edata;
init_mm.brk = (unsigned long) 0;
-#if defined(CONFIG_H8300H_SIM) && defined(CONFIG_GDB_MAGICPRINT)
+#if (defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)) && defined(CONFIG_GDB_MAGICPRINT)
register_console(&gdb_console);
#endif
- printk("\x0F\r\n\nuClinux " CPU "\n");
+ printk("\r\n\nuClinux " CPU "\n");
printk("Target Hardware: %s\n",_target_name);
printk("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
- printk("H8/300H support by Yoshinori Sato <ysato@users.sourceforge.jp>\n");
+ printk("H8/300 series support by Yoshinori Sato <ysato@users.sourceforge.jp>\n");
#ifdef DEBUG
printk("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
@@ -157,6 +193,7 @@
* get kmalloc into gear
*/
paging_init();
+ h8300_gpio_init();
#ifdef DEBUG
printk("Done setup_arch\n");
#endif
diff -Nru a/arch/h8300/kernel/signal.c b/arch/h8300/kernel/signal.c
--- a/arch/h8300/kernel/signal.c Sun Aug 3 13:14:48 2003
+++ b/arch/h8300/kernel/signal.c Sun Aug 3 13:14:48 2003
@@ -9,7 +9,8 @@
*/
/*
- * uClinux H8/300 support by Yoshinori Sato
+ * uClinux H8/300 support by Yoshinori Sato <ysato@users.sourceforge.jp>
+ * and David McCullough <davidm@snapgear.com>
*
* Based on
* Linux/m68k by Hamish Macdonald
@@ -151,26 +152,29 @@
struct sigframe
{
+ long dummy_er0;
+ long dummy_vector;
+#if defined(CONFIG_CPU_H8S)
+ short dummy_exr;
+#endif
char *pretcode;
- int sig;
- int code;
- struct sigcontext *psc;
- char retcode[6];
+ unsigned char retcode[8];
unsigned long extramask[_NSIG_WORDS-1];
struct sigcontext sc;
-};
+} __attribute__((aligned(2),packed));
struct rt_sigframe
{
+ long dummy_er0;
+ long dummy_vector;
+#if defined(CONFIG_CPU_H8S)
+ short dummy_exr;
+#endif
char *pretcode;
- int sig;
- struct siginfo *pinfo;
- void *puc;
- char retcode[6];
+ unsigned char retcode[8];
struct siginfo info;
struct ucontext uc;
-};
-
+} __attribute__((aligned(2),packed));
static inline int
restore_sigcontext(struct pt_regs *regs, struct sigcontext *usc, void *fp,
@@ -200,8 +204,7 @@
}
static inline int
-rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
- struct ucontext *uc, int *pd0)
+rt_restore_ucontext(struct pt_regs *regs, struct ucontext *uc, int *pd0)
{
int temp;
greg_t *gregs = uc->uc_mcontext.gregs;
@@ -216,9 +219,9 @@
err |= __get_user(regs->er1, &gregs[1]);
err |= __get_user(regs->er2, &gregs[2]);
err |= __get_user(regs->er3, &gregs[3]);
- err |= __get_user(sw->er4, &gregs[4]);
- err |= __get_user(sw->er5, &gregs[5]);
- err |= __get_user(sw->er6, &gregs[6]);
+ err |= __get_user(regs->er4, &gregs[4]);
+ err |= __get_user(regs->er5, &gregs[5]);
+ err |= __get_user(regs->er6, &gregs[6]);
err |= __get_user(usp, &gregs[7]);
wrusp(usp);
err |= __get_user(regs->pc, &gregs[8]);
@@ -238,8 +241,7 @@
asmlinkage int do_sigreturn(unsigned long __unused,...)
{
- struct switch_stack *sw = (struct switch_stack *) &__unused;
- struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+ struct pt_regs *regs = (struct pt_regs *) &__unused;
unsigned long usp = rdusp();
struct sigframe *frame = (struct sigframe *)(usp - 4);
sigset_t set;
@@ -270,8 +272,7 @@
asmlinkage int do_rt_sigreturn(unsigned long __unused,...)
{
- struct switch_stack *sw = (struct switch_stack *) &__unused;
- struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+ struct pt_regs *regs = (struct pt_regs *) &__unused;
unsigned long usp = rdusp();
struct rt_sigframe *frame = (struct rt_sigframe *)(usp - 4);
sigset_t set;
@@ -288,7 +289,7 @@
recalc_sigpending();
spin_lock_irq(¤t->sighand->siglock);
- if (rt_restore_ucontext(regs, sw, &frame->uc, &er0))
+ if (rt_restore_ucontext(regs, &frame->uc, &er0))
goto badframe;
return er0;
@@ -312,7 +313,6 @@
static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs)
{
- struct switch_stack *sw = (struct switch_stack *)regs - 1;
greg_t *gregs = uc->uc_mcontext.gregs;
int err = 0;
@@ -321,9 +321,9 @@
err |= __put_user(regs->er1, &gregs[1]);
err |= __put_user(regs->er2, &gregs[2]);
err |= __put_user(regs->er3, &gregs[3]);
- err |= __put_user(sw->er4, &gregs[4]);
- err |= __put_user(sw->er5, &gregs[5]);
- err |= __put_user(sw->er6, &gregs[6]);
+ err |= __put_user(regs->er4, &gregs[4]);
+ err |= __put_user(regs->er5, &gregs[5]);
+ err |= __put_user(regs->er6, &gregs[6]);
err |= __put_user(rdusp(), &gregs[7]);
err |= __put_user(regs->pc, &gregs[8]);
err |= __put_user(regs->ccr, &gregs[9]);
@@ -355,15 +355,6 @@
frame = get_sigframe(ka, regs, sizeof(*frame));
- err |= __put_user((current_thread_info()->exec_domain
- && current_thread_info()->exec_domain->signal_invmap
- && sig < 32
- ? current_thread_info()->exec_domain->signal_invmap[sig]
- : sig),
- &frame->sig);
-
- err |= __put_user(&frame->sc, &frame->psc);
-
if (_NSIG_WORDS > 1)
err |= copy_to_user(frame->extramask, &set->sig[1],
sizeof(frame->extramask));
@@ -376,8 +367,8 @@
/* sub.l er0,er0; mov.b #__NR_sigreturn,r0l; trapa #0 */
err != __put_user(0x1a80f800 + (__NR_sigreturn & 0xff),
- (long *)(frame->retcode + 0));
- err |= __put_user(0x5700, (short *)(frame->retcode + 4));
+ (unsigned long *)(frame->retcode + 0));
+ err |= __put_user(0x5700, (unsigned short *)(frame->retcode + 4));
if (err)
@@ -386,6 +377,12 @@
/* Set up registers for signal handler */
wrusp ((unsigned long) frame);
regs->pc = (unsigned long) ka->sa.sa_handler;
+ regs->er0 = (current_thread_info()->exec_domain
+ && current_thread_info()->exec_domain->signal_invmap
+ && sig < 32
+ ? current_thread_info()->exec_domain->signal_invmap[sig]
+ : sig);
+ regs->er1 = (unsigned long)&(frame->sc);
return;
@@ -403,14 +400,6 @@
frame = get_sigframe(ka, regs, sizeof(*frame));
- err |= __put_user((current_thread_info()->exec_domain
- && current_thread_info()->exec_domain->signal_invmap
- && sig < 32
- ? current_thread_info()->exec_domain->signal_invmap[sig]
- : sig),
- &frame->sig);
- err |= __put_user(&frame->info, &frame->pinfo);
- err |= __put_user(&frame->uc, &frame->puc);
err |= copy_siginfo_to_user(&frame->info, info);
/* Create the ucontext. */
@@ -438,7 +427,14 @@
/* Set up registers for signal handler */
wrusp ((unsigned long) frame);
- regs->pc = (unsigned long) ka->sa.sa_handler;
+ regs->pc = (unsigned long) ka->sa.sa_handler;
+ regs->er0 = (current_thread_info()->exec_domain
+ && current_thread_info()->exec_domain->signal_invmap
+ && sig < 32
+ ? current_thread_info()->exec_domain->signal_invmap[sig]
+ : sig);
+ regs->er1 = (unsigned long)&(frame->info);
+ regs->er2 = (unsigned long)&frame->uc;
return;
diff -Nru a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
--- a/arch/h8300/kernel/sys_h8300.c Sun Aug 3 13:14:51 2003
+++ b/arch/h8300/kernel/sys_h8300.c Sun Aug 3 13:14:51 2003
@@ -281,9 +281,8 @@
#if defined(CONFIG_SYSCALL_PRINT)
asmlinkage void syscall_print(void *dummy,...)
{
- struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy);
- unsigned long *usp=rdusp()+8;
- printk("call %06x:%d 1:%08x,2:%08x,3:%08x,ret:%08x\n",
- ((*usp) & 0xffffff)-2,regs->orig_er0,regs->er1,regs->er2,regs->er3,regs->er0);
+ struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy-4);
+ printk("call %06lx:%ld 1:%08lx,2:%08lx,3:%08lx,ret:%08lx\n",
+ ((regs->pc)&0xffffff)-2,regs->orig_er0,regs->er1,regs->er2,regs->er3,regs->er0);
}
#endif
diff -Nru a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S
--- a/arch/h8300/kernel/syscalls.S Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/kernel/syscalls.S Sun Aug 3 13:14:46 2003
@@ -312,3 +312,7 @@
mov.l #SYMBOL_NAME(h8300_fork),er0
jmp @SYMBOL_NAME(syscall_trampoline)
+SYMBOL_NAME_LABEL(sys_vfork)
+ mov.l #SYMBOL_NAME(h8300_vfork),er0
+ jmp @SYMBOL_NAME(syscall_trampoline)
+
diff -Nru a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c
--- a/arch/h8300/kernel/time.c Sun Aug 3 13:14:47 2003
+++ b/arch/h8300/kernel/time.c Sun Aug 3 13:14:47 2003
@@ -110,8 +110,11 @@
tv->tv_usec = usec;
}
-void do_settimeofday(struct timeval *tv)
+int do_settimeofday(struct timespec *tv)
{
+ if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
+ return -EINVAL;
+
write_lock_irq(&xtime_lock);
/* This is revolting. We need to set the xtime.tv_usec
* correctly. However, the value in this location is
@@ -119,16 +122,17 @@
* Discover what correction gettimeofday
* would have done, and then undo it!
*/
- while (tv->tv_usec < 0) {
- tv->tv_usec += 1000000;
+ while (tv->tv_nsec < 0) {
+ tv->tv_nsec += NSEC_PER_SEC;
tv->tv_sec--;
}
xtime.tv_sec = tv->tv_sec;
- xtime.tv_nsec = (tv->tv_usec * 1000);
+ xtime.tv_nsec = tv->tv_nsec;
time_adjust = 0; /* stop active adjtime() */
time_status |= STA_UNSYNC;
time_maxerror = NTP_PHASE_LIMIT;
time_esterror = NTP_PHASE_LIMIT;
- write_unlock_irq(&xtime_lock);
+ write_sequnlock_irq(&xtime_lock);
+ return 0;
}
diff -Nru a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c
--- a/arch/h8300/kernel/traps.c Sun Aug 3 13:14:45 2003
+++ b/arch/h8300/kernel/traps.c Sun Aug 3 13:14:45 2003
@@ -72,15 +72,17 @@
(int) current->mm->end_data,
(int) current->mm->end_data,
(int) current->mm->brk);
- printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n",
+ printk("USER-STACK=%08x KERNEL-STACK=%08lx\n\n",
(int) current->mm->start_stack,
(int) PAGE_SIZE+(unsigned long)current);
}
printk("PC: %08lx\n", (long)fp->pc);
- printk("CCR: %08lx SP: %08lx\n", fp->ccr, (long) fp);
+ printk("CCR: %02x SP: %08lx\n", fp->ccr, (long) fp);
printk("ER0: %08lx ER1: %08lx ER2: %08lx ER3: %08lx\n",
fp->er0, fp->er1, fp->er2, fp->er3);
+ printk("ER4: %08lx ER5: %08lx ER6: %08lx\n",
+ fp->er4, fp->er5, fp->er6);
printk("\nCODE:");
tp = ((unsigned char *) fp->pc) - 0x20;
for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) {
@@ -122,3 +124,53 @@
do_exit(SIGSEGV);
}
+
+extern char _start, _etext;
+#define check_kernel_text(addr) \
+ ((addr >= (unsigned long)(&_start)) && \
+ (addr < (unsigned long)(&_etext)))
+
+static int kstack_depth_to_print = 24;
+
+void show_stack(struct task_struct *task, unsigned long *esp)
+{
+ unsigned long *stack, addr;
+ int i;
+
+ if (esp == NULL)
+ esp = (unsigned long *) &esp;
+
+ stack = esp;
+
+ printk("Stack from %08lx:", (unsigned long)stack);
+ for (i = 0; i < kstack_depth_to_print; i++) {
+ if (((unsigned long)stack & (THREAD_SIZE - 1)) == 0)
+ break;
+ if (i % 8 == 0)
+ printk("\n ");
+ printk(" %08lx", *stack++);
+ }
+
+ printk("\nCall Trace:");
+ i = 0;
+ stack = esp;
+ while (((unsigned long)stack & (THREAD_SIZE - 1)) == 0) {
+ addr = *stack++;
+ /*
+ * If the address is either in the text segment of the
+ * kernel, or in the region which contains vmalloc'ed
+ * memory, it *may* be the address of a calling
+ * routine; if so, print it so that someone tracing
+ * down the cause of the crash will be able to figure
+ * out the call path that was taken.
+ */
+ if (check_kernel_text(addr)) {
+ if (i % 4 == 0)
+ printk("\n ");
+ printk(" [<%08lx>]", addr);
+ i++;
+ }
+ }
+ printk("\n");
+}
+
diff -Nru a/arch/h8300/lib/Makefile b/arch/h8300/lib/Makefile
--- a/arch/h8300/lib/Makefile Sun Aug 3 13:14:47 2003
+++ b/arch/h8300/lib/Makefile Sun Aug 3 13:14:47 2003
@@ -5,4 +5,4 @@
.S.o:
$(CC) $(AFLAGS) -D__ASSEMBLY__ -c $< -o $@
-lib-y = ashrdi3.o checksum.o memcpy.o memset.o abs.o
+lib-y = ashrdi3.o checksum.o memcpy.o memset.o abs.o romfs.o
diff -Nru a/arch/h8300/lib/abs.S b/arch/h8300/lib/abs.S
--- a/arch/h8300/lib/abs.S Sun Aug 3 13:14:52 2003
+++ b/arch/h8300/lib/abs.S Sun Aug 3 13:14:52 2003
@@ -1,4 +1,4 @@
-;;; memcpy.S
+;;; abs.S
#include <asm/linkage.h>
diff -Nru a/arch/h8300/lib/memset.S b/arch/h8300/lib/memset.S
--- a/arch/h8300/lib/memset.S Sun Aug 3 13:14:49 2003
+++ b/arch/h8300/lib/memset.S Sun Aug 3 13:14:49 2003
@@ -17,9 +17,6 @@
;; c = er1(r1l)
;; count = er2
SYMBOL_NAME_LABEL(memset)
- mov.l er2,er2
- beq 7f
- mov.l er0,@-sp
btst #0,r0l
beq 2f
@@ -36,8 +33,13 @@
cmp.l #4,er2
blo 4f
;; count>=4 -> count/4
+#if defined(__H8300H__)
shlr.l er2
shlr.l er2
+#endif
+#if defined(__H8300S__)
+ shlr.l #2,er2
+#endif
;; byte -> long
mov.b r1l,r1h
mov.w r1,e1
@@ -56,6 +58,4 @@
dec.b r3l
bne 5b
6:
- mov.l @sp+,er0
-7:
- rts
\ No newline at end of file
+ rts
diff -Nru a/arch/h8300/platform/h8300h/Rules.make b/arch/h8300/platform/h8300h/Rules.make
--- a/arch/h8300/platform/h8300h/Rules.make Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,51 +0,0 @@
-#
-# h8300h/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# platform-specific flags and dependencies.
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (c) 2001 Lineo, Inc, <www.lineo.com>
-# Copyright (c) 2000,2001 D. Jeff Dionne <jeff@lineo.ca>
-# Copyright (c) 1998,1999 D. Jeff Dionne <jeff@uclinux.org>
-# Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
-# Copyright (C) 1994 Hamish Macdonald
-#
-# 68VZ328 Fixes By Evan Stawnyczy <e@lineo.ca>
-# H8/300H Modify By Yoshinori Sato <ysato@users.sourceforge.jp>
-
-CROSS_COMPILE = h8300-elf-
-
-GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./')
-
-INCGCC = $(GCC_DIR)/include
-LIBGCC = $(GCC_DIR)/h8300h/int32/libgcc.a
-
-CFLAGS := -fno-builtin -DNO_CACHE $(CFLAGS) -pipe -DNO_MM -DNO_FPU -DNO_CACHE -mh -mint32 -malign-300 -D__ELF__ -DNO_FORGET -DUTS_SYSNAME=\"uClinux\" -D__linux__ -DTARGET=$(BOARD)
-AFLAGS := $(AFLAGS) -pipe -DNO_MM -DNO_FPU -DNO_CACHE -mh -D__ELF__ -DUTS_SYSNAME=\"uClinux\"
-
-LINKFLAGS = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld
-LDFLAGS := $(LDFLAGS) -mh8300helf
-
-HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o
-
-SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \
- arch/$(ARCH)/platform/$(PLATFORM) \
- arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD) \
- $(SUBDIRS)
-
-CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \
- arch/$(ARCH)/platform/$(PLATFORM)/platform.o \
- arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(BOARD).o \
- $(CORE_FILES)
-
-LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC)
-
-linux.bin: linux
- $(OBJCOPY) -O binary linux linux.bin
-
-archclean:
- rm -f linux
diff -Nru a/arch/h8300/platform/h8300h/aki3068net/Makefile b/arch/h8300/platform/h8300h/aki3068net/Makefile
--- a/arch/h8300/platform/h8300h/aki3068net/Makefile Sun Aug 3 13:14:47 2003
+++ b/arch/h8300/platform/h8300h/aki3068net/Makefile Sun Aug 3 13:14:47 2003
@@ -6,8 +6,7 @@
# unless it's something special (ie not a .c file).
#
-all: $(BOARD).o
-O_TARGET := $(BOARD).o
+extra-y := crt0_ram.o
obj-y := timer.o
timer.o: timer.c
diff -Nru a/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S b/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
--- a/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S Sun Aug 3 13:14:51 2003
+++ b/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S Sun Aug 3 13:14:51 2003
@@ -3,7 +3,7 @@
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
- * Platform depend startup for uClinux-2.4.x
+ * Platform depend startup
* Target Archtecture: AE-3068 (aka. aki3068net)
* Memory Layout : RAM
*/
@@ -13,6 +13,16 @@
#include <linux/config.h>
#include <asm/linkage.h>
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(command_line)
.global SYMBOL_NAME(_platform_gpio_table)
@@ -25,23 +35,28 @@
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
- mov.l #__ramend,sp
+ mov.l #RAMEND,sp
ldc #0x80,ccr
/* Peripheral Setup */
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+ /* move romfs image */
+ jsr @__move_romfs
+#endif
+
/* .bss clear */
mov.l #__sbss,er5
- mov.l er5,er6
- inc.l #1,er6
mov.l #__ebss,er4
sub.l er5,er4
- sub.w r0,r0
- mov.b r0l,@er5
+ shlr er4
+ shlr er4
+ sub.l er0,er0
1:
- eepmov.w
- dec.w #1,e4
- bpl 1b
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
@@ -49,22 +64,9 @@
mov.w #512,r4
eepmov.w
- /* RAM Interrupt Vector Table Setup */
-#if defined(CONFIG_GDB_DEBUG)
- mov.l @SYMBOL_NAME(interrupt_redirect_table)+11*4,er0
-#endif
- mov.l #SYMBOL_NAME(_vector_lma),er5
- mov.l #SYMBOL_NAME(interrupt_redirect_table),er6
- mov.w #0x100,r4
- eepmov.w
-#if defined(CONFIG_GDB_DEBUG)
- mov.l er0,@SYMBOL_NAME(interrupt_redirect_table)+11*4
-#endif
-
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
- mov.l #SYMBOL_NAME(init_task_union),sp
- mov.l sp,@SYMBOL_NAME(_current_task)
+ mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
diff -Nru a/arch/h8300/platform/h8300h/aki3068net/ram.ld b/arch/h8300/platform/h8300h/aki3068net/ram.ld
--- a/arch/h8300/platform/h8300h/aki3068net/ram.ld Sun Aug 3 13:14:50 2003
+++ b/arch/h8300/platform/h8300h/aki3068net/ram.ld Sun Aug 3 13:14:50 2003
@@ -5,86 +5,7 @@
MEMORY
{
- ram : ORIGIN = 0x400000, LENGTH = 0x600000-0x400000-0x80000
- disk : ORIGIN = 0x600000-0x80000, LENGTH = 0x60000
+ ram : ORIGIN = 0x400000, LENGTH = 0x600000-0x400000
eram : ORIGIN = 0x600000, LENGTH = 0
iram : ORIGIN = 0xffbf20, LENGTH = 0x4000
}
-
-SECTIONS
-{
- .bootvec :
- {
- *(.bootvec)
- } > ram
- .text :
- {
- __stext = . ;
- *(.text)
- . = ALIGN(0x4) ;
- *(.text.*)
- . = ALIGN(0x4) ;
- *(.kstrtab)
- . = ALIGN(0x4) ;
- *(.rodata*)
- . = ALIGN(16); /* Exception table */
- ___start___ex_table = .;
- *(__ex_table)
- ___stop___ex_table = .;
-
- ___start___ksymtab = .; /* Kernel symbol table */
- *(__ksymtab)
- ___stop___ksymtab = .;
-
- . = ALIGN(0x4) ;
- __etext = . ;
- } > ram
- .data :
- {
- __sdata = . ;
- ___data_start = . ;
- *(.data)
- *(.data.*)
- *(.exitcall.exit)
-
- . = ALIGN(0x2000) ;
- *(.data.init_task)
- . = ALIGN(0x2000) ;
- ___init_begin = .;
- *(.text.init)
- *(.data.init)
- . = ALIGN(16);
- ___setup_start = .;
- *(.setup.init)
- ___setup_end = .;
- ___initcall_start = .;
- *(.initcall.init)
- . = ALIGN(4) ;
- ___initcall_end = .;
- ___init_end = .;
- __edata = . ;
- . = ALIGN(0x4) ;
- __sbss = . ;
- *(.bss)
- . = ALIGN(0x4) ;
- *(COMMON)
- . = ALIGN(0x4) ;
- __ebss = . ;
- __end = . ;
- __ramstart = .;
- } > ram
- .blkimg :
- {
- __ramend = . ;
- __blkimg = . ;
- } > disk
- .ram_vec : AT(ADDR(.data) + SIZEOF(.data))
- {
- *(.int_redirect)
- } > iram
- __vector_lma = LOADADDR(.ram_vec);
- .dummy2 :
- {
- COMMAND_START = . - 0x200 ;
- } > eram
-}
diff -Nru a/arch/h8300/platform/h8300h/aki3068net/timer.c b/arch/h8300/platform/h8300h/aki3068net/timer.c
--- a/arch/h8300/platform/h8300h/aki3068net/timer.c Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/platform/h8300h/aki3068net/timer.c Sun Aug 3 13:14:46 2003
@@ -14,29 +14,32 @@
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/regs306x.h>
-#include <linux/timex.h>
-
-#define TMR8CMA2 0x00ffff94
-#define TMR8TCSR2 0x00ffff92
-#define TMR8TCNT2 0x00ffff90
#define CMFA 6
-int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *))
+extern int request_irq_boot(unsigned int,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long, const char *, void *);
+
+void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
- outb(CONFIG_CLK_FREQ*10/8192,TMR8CMA2);
- outb(0x00,TMR8TCSR2);
- request_irq(40,timer_int,0,"timer",0);
- outb(0x40|0x08|0x03,TMR8TCNT2);
+ outb(H8300_TIMER_COUNT_DATA,TCORA2);
+ outb(0x00,_8TCSR2);
+ request_irq_boot(40,timer_int,0,"timer",0);
+ outb(0x40|0x08|0x03,_8TCR2);
}
void platform_timer_eoi(void)
{
- *(unsigned char *)TMR8TCSR2 &= ~(1 << CMFA);
+ *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
}
void platform_gettod(int *year, int *mon, int *day, int *hour,
diff -Nru a/arch/h8300/platform/h8300h/entry.S b/arch/h8300/platform/h8300h/entry.S
--- a/arch/h8300/platform/h8300h/entry.S Sun Aug 3 13:14:47 2003
+++ b/arch/h8300/platform/h8300h/entry.S Sun Aug 3 13:14:47 2003
@@ -3,6 +3,7 @@
* linux/arch/h8300/platform/h8300h/entry.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
+ * David McCullough <davidm@snapgear.com>
*
*/
@@ -29,14 +30,17 @@
/* the following macro is used when enabling interrupts */
-LER3 = 0
-LER2 = 4
-LER1 = 8
-LORIG = 12
-LCCR = 16
-LER0 = 18
-LVEC = 22
-LRET = 24
+LER4 = 0
+LER5 = 4
+LER6 = 8
+LER3 = 12
+LER2 = 16
+LER1 = 20
+LORIG = 24
+LCCR = 28
+LER0 = 30
+LVEC = 34
+LRET = 38
.h8300h
@@ -44,100 +48,123 @@
.macro SAVE_ALL
mov.l er0,@-sp
- stc ccr,r0l
+
+ stc ccr,r0l /* check kernel mode */
orc #0x10,ccr
btst #4,r0l
- bne 1f
- mov.l sp,@SYMBOL_NAME(sw_usp)
+ bne 5f
+
+ mov.l sp,@SYMBOL_NAME(sw_usp) /* user mode */
mov.l @sp,er0
mov.l @SYMBOL_NAME(sw_ksp),sp
+ sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
mov.l er0,@-sp
- stc ccr,r0l
- and #0xef,r0l
- mov.w r0,@-sp
- mov.l @(2:16,sp),er0
- bra 2f
-1:
- mov.l @sp,er0
- stc ccr,@-sp
-2:
+ mov.l er1,@-sp
+ mov.l @SYMBOL_NAME(sw_usp),er0
+ mov.l @(8:16,er0),er1 /* copy the RET addr */
+ mov.l er1,@(LRET-LER1:16,sp)
+
+ mov.w e1,r1 /* e1 highbyte = ccr */
+ and #0xef,r1h /* mask mode? flag */
+ sub.w r0,r0
+ mov.b r1h,r0l
+ mov.w r0,@(LCCR-LER1:16,sp) /* copy ccr */
+ mov.l @(LORIG-LER1:16,sp),er0
+ mov.l er0,@(LER0-LER1:16,sp) /* copy ER0 */
+ bra 6f
+5:
+ mov.l @sp,er0 /* kernel mode */
+ subs #2,sp /* dummy ccr */
mov.l er0,@-sp
mov.l er1,@-sp
+ mov.w @(LRET-LER1:16,sp),r1 /* copy old ccr */
+ mov.b r1h,r1l
+ mov.b #0,r1h
+ mov.w r1,@(LCCR-LER1:16,sp) /* set ccr */
+6:
mov.l er2,@-sp
mov.l er3,@-sp
+ mov.l er6,@-sp /* syscall arg #6 */
+ mov.l er5,@-sp /* syscall arg #5 */
+ mov.l er4,@-sp /* syscall arg #4 */
.endm
- .macro RESTORE_REGS
- mov.w @(LCCR:16,sp),r0
+ .macro RESTORE_ALL
+ mov.l @sp+,er4
+ mov.l @sp+,er5
+ mov.l @sp+,er6
+ mov.l @sp+,er3
+ mov.l @sp+,er2
+ mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
btst #4,r0l
- bne 1f
+ bne 7f
+
+ orc #0x80,ccr
mov.l @SYMBOL_NAME(sw_usp),er0
- mov.l @(LER0:16,sp),er1
+ mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
mov.l er1,@er0
- mov.l @sp+,er3
- mov.l @sp+,er2
+ mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
+ mov.b r1l,r1h
+ mov.b @(LRET+1-LER1:16,sp),r1l
+ mov.w r1,e1
+ mov.w @(LRET+2-LER1:16,sp),r1
+ mov.l er1,@(8:16,er0)
+
mov.l @sp+,er1
- add.l #10,sp
+ add.l #(LRET-LORIG),sp /* remove LORIG - LRET */
mov.l sp,@SYMBOL_NAME(sw_ksp)
mov.l er0,sp
- bra 2f
-1:
- mov.l @sp+,er3
- mov.l @sp+,er2
+ bra 8f
+7:
mov.l @sp+,er1
adds #4,sp
adds #2,sp
-2:
+8:
mov.l @sp+,er0
- adds #4,sp
- .endm
-
- .macro RESTORE_ALL
- RESTORE_REGS
+ adds #4,sp /* remove the sw created LVEC */
rte
.endm
-
-#define SWITCH_STACK_SIZE (3*4+12) /* includes return address */
-
- .macro SAVE_SWITCH_STACK
- mov.l er4,@-sp
- mov.l er5,@-sp
- mov.l er6,@-sp
- .endm
-
- .macro RESTORE_SWITCH_STACK
- mov.l @sp+,er6
- mov.l @sp+,er5
- mov.l @sp+,er4
- .endm
-
+
.globl SYMBOL_NAME(system_call)
.globl SYMBOL_NAME(ret_from_exception)
+.globl SYMBOL_NAME(ret_from_fork)
.globl SYMBOL_NAME(ret_from_signal)
-.globl SYMBOL_NAME(ret_from_interrupt), SYMBOL_NAME(bad_interrupt)
+.globl SYMBOL_NAME(ret_from_interrupt)
.globl SYMBOL_NAME(interrupt_redirect_table)
.globl SYMBOL_NAME(sw_ksp),SYMBOL_NAME(sw_usp)
.globl SYMBOL_NAME(resume)
-.globl SYMBOL_NAME(sys_vfork)
.globl SYMBOL_NAME(syscall_trampoline)
-
+.globl SYMBOL_NAME(interrupt_redirect_table)
+.globl SYMBOL_NAME(interrupt_entry)
+.globl SYMBOL_NAME(system_call)
+.globl SYMBOL_NAME(trace_break)
+
+#if defined(CONFIG_ROMKERNEL)
+INTERRUPTS = 64
.section .int_redirect,"ax"
SYMBOL_NAME_LABEL(interrupt_redirect_table)
.rept 7
.long 0
.endr
- jsr @interrupt_entry /* NMI */
+ jsr @SYMBOL_NAME(interrupt_entry) /* NMI */
jmp @SYMBOL_NAME(system_call) /* TRAPA #0 (System call) */
.long 0
.long 0
jmp @SYMBOL_NAME(trace_break) /* TRAPA #3 (breakpoint) */
- .rept 64-12
- jsr @interrupt_entry
+ .rept INTERRUPTS-12
+ jsr @SYMBOL_NAME(interrupt_entry)
.endr
+#endif
+#if defined(CONFIG_RAMKERNEL)
+.globl SYMBOL_NAME(interrupt_redirect_table)
+ .section .bss
+SYMBOL_NAME_LABEL(interrupt_redirect_table)
+ .space 4
+#endif
.section .text
.align 2
-interrupt_entry:
+SYMBOL_NAME_LABEL(interrupt_entry)
SAVE_ALL
mov.w @(LCCR,sp),r0
btst #4,r0l
@@ -148,114 +175,91 @@
1:
mov.l @(LVEC,sp),er0
2:
+#if defined(CONFIG_ROMKERNEL)
sub.l #SYMBOL_NAME(interrupt_redirect_table),er0
+#endif
+#if defined(CONFIG_RAMKERNEL)
+ mov.l @SYMBOL_NAME(interrupt_redirect_table),er1
+ sub.l er1,er0
+#endif
shlr.l er0
shlr.l er0
dec.l #1,er0
mov.l sp,er1
+ subs #4,er1 /* adjust ret_pc */
jsr @SYMBOL_NAME(process_int)
mov.l @SYMBOL_NAME(irq_stat)+SOFTIRQ_PENDING,er0
beq 1f
jsr @SYMBOL_NAME(do_softirq)
1:
jmp @SYMBOL_NAME(ret_from_exception)
-
+
SYMBOL_NAME_LABEL(system_call)
- subs #4,sp
+ subs #4,sp /* dummy LVEC */
SAVE_ALL
- mov.l er0,er3
+ mov.w @(LCCR:16,sp),r1
+ bset #4,r1l
+ ldc r1l,ccr
+ mov.l er0,er4
mov.l #-ENOSYS,er0
mov.l er0,@(LER0:16,sp)
/* save top of frame */
mov.l sp,er0
- mov.l er3,@-sp
jsr @SYMBOL_NAME(set_esp0)
- mov.l @sp+,er3
- cmp.l #NR_syscalls,er3
+ cmp.l #NR_syscalls,er4
bcc SYMBOL_NAME(ret_from_exception):16
- shll.l er3
- shll.l er3
+ shll.l er4
+ shll.l er4
mov.l #SYMBOL_NAME(sys_call_table),er0
- add.l er3,er0
- mov.l @er0,er0
- mov.l er0,er3
+ add.l er4,er0
+ mov.l @er0,er4
beq SYMBOL_NAME(ret_from_exception):16
- mov.l @SYMBOL_NAME(_current_task),er2
+ mov.l sp,er2
+ and.w #0xe000,r2
mov.b @((TASK_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
btst #(TIF_SYSCALL_TRACE & 7),r2l
bne 1f
mov.l @(LER1:16,sp),er0
mov.l @(LER2:16,sp),er1
mov.l @(LER3:16,sp),er2
- mov.l er5,@-sp
- mov.l er4,@-sp
- jsr @er3
- adds #4,sp
- adds #4,sp
- mov.l er0,@(LER0,sp) /* save the return value */
+ jsr @er4
+ mov.l er0,@(LER0,sp) /* save the return value */
#if defined(CONFIG_SYSCALL_PRINT)
jsr @SYMBOL_NAME(syscall_print)
#endif
jmp @SYMBOL_NAME(ret_from_exception)
1:
- SAVE_SWITCH_STACK
- mov.l er3,er5 /* save syscall entry */
jsr SYMBOL_NAME(syscall_trace)
- mov.l er5,er3
- RESTORE_SWITCH_STACK
mov.l @(LER1:16,sp),er0
mov.l @(LER2:16,sp),er1
mov.l @(LER3:16,sp),er2
- mov.l er5,@-sp
- mov.l er4,@-sp
- jsr @er3
- adds #4,sp
- adds #4,sp
+ jsr @er4
mov.l er0,@(LER0:16,sp) /* save the return value */
- SAVE_SWITCH_STACK
jsr SYMBOL_NAME(syscall_trace)
SYMBOL_NAME_LABEL(ret_from_signal)
- RESTORE_SWITCH_STACK
SYMBOL_NAME_LABEL(ret_from_exception)
mov.b @(LCCR+1:16,sp),r0l
btst #4,r0l /* check if returning to kernel */
bne 3f /* if so, skip resched, signals */
andc #0x7f,ccr
- mov.l @SYMBOL_NAME(_current_task),er0
+ mov.l sp,er2
+ and.w #0xe000,r2
mov.l @(TI_FLAGS:16,er2),er1
and.l #_TIF_WORK_MASK,er1
- bne 1f
- mov.l @((TASK_THREAD+THREAD_VFORK):16,er0),er1
- bne Lvfork_return
-3:
- RESTORE_ALL /* Does RTE */
+ beq 3f
1:
mov.l @(TI_FLAGS:16,er2),er1
btst #TIF_NEED_RESCHED,r1l
bne @SYMBOL_NAME(reschedule):16
-
-Lsignal_return:
- SAVE_SWITCH_STACK
mov.l sp,er1
- add #12,er1
mov.l er2,er0
jsr @SYMBOL_NAME(do_signal)
- RESTORE_SWITCH_STACK
- mov.l @SYMBOL_NAME(_current_task),er0
- mov.l @((TASK_THREAD+THREAD_VFORK):16,er0),er1
- bne Lvfork_return
- RESTORE_ALL
-
-Lvfork_return:
- sub.l er2,er2
- mov.l er2,@((TASK_THREAD+THREAD_VFORK):16,er0)
- mov.l @SYMBOL_NAME(sw_usp),er0
- mov.l er1,@(8:16,er0)
- RESTORE_ALL
-
+3:
+ RESTORE_ALL /* Does RTE */
+
SYMBOL_NAME_LABEL(reschedule)
/* save top of frame */
mov.l sp,er0
@@ -265,6 +269,11 @@
mov.l er0,@-sp
jmp @SYMBOL_NAME(schedule)
+SYMBOL_NAME_LABEL(ret_from_fork)
+ mov.l er2,er0
+ jsr @SYMBOL_NAME(schedule_tail)
+ jmp @SYMBOL_NAME_LABEL(ret_from_exception)
+
SYMBOL_NAME_LABEL(resume)
/*
* Beware - when entering resume, offset of tss is in d1,
@@ -277,17 +286,13 @@
/* save sr */
sub.w r3,r3
stc ccr,r3l
- mov.w r3,@(THREAD_CCR:16,er0)
- SAVE_SWITCH_STACK
+ mov.w r3,@(THREAD_CCR+2:16,er0)
/* disable interrupts */
orc #0x80,ccr
mov.l @SYMBOL_NAME(sw_usp),er3
mov.l er3,@(THREAD_USP:16,er0)
mov.l sp,@(THREAD_KSP:16,er0)
-
- /* get pointer to tss struct (a1 contains new task) */
- mov.l er1,@SYMBOL_NAME(_current_task)
/* Skip address space switching if they are the same. */
/* FIXME: what did we hack out of here, this does nothing! */
@@ -295,23 +300,13 @@
mov.l @(THREAD_USP:16,er1),er0
mov.l er0,@SYMBOL_NAME(sw_usp)
mov.l @(THREAD_KSP:16,er1),sp
- RESTORE_SWITCH_STACK
/* restore status register */
- mov.w @(THREAD_CCR:16,er1),r3
+ mov.w @(THREAD_CCR+2:16,er1),r3
ldc r3l,ccr
-
rts
-/* Handler for uninitialized and spurious interrupts */
-
-SYMBOL_NAME_LABEL(bad_interrupt)
- mov.l @SYMBOL_NAME(num_spurious),er0
- inc.l #1,er0
- mov.l er0,@SYMBOL_NAME(num_spurious)
- rts
-
SYMBOL_NAME_LABEL(trace_break)
subs #4,sp
SAVE_ALL
@@ -329,26 +324,10 @@
jsr @SYMBOL_NAME(trace_trap)
jmp @SYMBOL_NAME(ret_from_exception)
-SYMBOL_NAME_LABEL(sys_vfork)
- SAVE_SWITCH_STACK
- mov.l @SYMBOL_NAME(sw_usp),er6
- mov.l @(8:16,er6),er6
- mov.l sp,er0
- add.l #SWITCH_STACK_SIZE,er0
- jsr @SYMBOL_NAME(h8300_vfork)
- mov.l @SYMBOL_NAME(_current_task),er5
- mov.l er6,@((TASK_THREAD+THREAD_VFORK):16,er5)
- RESTORE_SWITCH_STACK
- rts
-
SYMBOL_NAME_LABEL(syscall_trampoline)
- SAVE_SWITCH_STACK
mov.l er0,er6
mov.l sp,er0
- add.l #SWITCH_STACK_SIZE,er0
- jsr @er6
- RESTORE_SWITCH_STACK
- rts
+ jmp @er6
.section .bss
SYMBOL_NAME_LABEL(sw_ksp)
diff -Nru a/arch/h8300/platform/h8300h/generic/Makefile b/arch/h8300/platform/h8300h/generic/Makefile
--- a/arch/h8300/platform/h8300h/generic/Makefile Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/platform/h8300h/generic/Makefile Sun Aug 3 13:14:46 2003
@@ -6,7 +6,8 @@
# unless it's something special (ie not a .c file).
#
-obj-y := timer.o crt0_$(MODEL).o
+obj-y := timer.o
+extra-y = crt0_$(MODEL).o
clean:
rm -f *.[oa]
diff -Nru a/arch/h8300/platform/h8300h/generic/crt0_ram.S b/arch/h8300/platform/h8300h/generic/crt0_ram.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8300h/generic/crt0_ram.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,108 @@
+/*
+ * linux/arch/h8300/platform/h8300h/generic/crt0_ram.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: AE-3068 (aka. aki3068net)
+ * Memory Layout : RAM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300h
+
+ .section .text
+ .file "crt0_ram.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #RAMEND,sp
+ ldc #0x80,ccr
+
+ /* Peripheral Setup */
+
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+ /* move romfs image */
+ jsr @__move_romfs
+#endif
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ shlr er4
+ shlr er4
+ sub.l er0,er0
+1:
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
+
+ /* copy kernel commandline */
+ mov.l #COMMAND_START,er5
+ mov.l #SYMBOL_NAME(command_line),er6
+ mov.w #512,r4
+ eepmov.w
+
+ /* uClinux kernel start */
+ ldc #0x90,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+gpio_table:
+ ;; P1DDR
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x00,0x00
+ ;; P4DDR
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; P9DDR
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0x00,0x00
+ ;; PBDDR
+ .byte 0x00,0x00
+
+__target_name:
+ .asciz "generic"
diff -Nru a/arch/h8300/platform/h8300h/generic/crt0_rom.S b/arch/h8300/platform/h8300h/generic/crt0_rom.S
--- a/arch/h8300/platform/h8300h/generic/crt0_rom.S Sun Aug 3 13:14:44 2003
+++ b/arch/h8300/platform/h8300h/generic/crt0_rom.S Sun Aug 3 13:14:44 2003
@@ -3,7 +3,7 @@
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
- * Platform depend startup for uClinux-2.4.x
+ * Platform depend startup
* Target Archtecture: generic
* Memory Layout : ROM
*/
@@ -31,16 +31,16 @@
/* .bss clear */
mov.l #__sbss,er5
- mov.l er5,er6
- inc.l #1,er6
mov.l #__ebss,er4
sub.l er5,er4
- sub.w r0,r0
- mov.b r0l,@er5
+ shlr er4
+ shlr er4
+ sub.l er0,er0
1:
- eepmov.w
- dec.w #1,e4
- bpl 1b
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
/* copy .data */
#if !defined(CONFIG_H8300H_SIM)
@@ -60,10 +60,9 @@
mov.w #512,r4
eepmov.w
- /* uClinux kernel start */
+ /* linux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
- mov.l sp,@SYMBOL_NAME(_current_task)
add.l #0x2000,sp
jsr @_start_kernel
_exit:
diff -Nru a/arch/h8300/platform/h8300h/generic/ram.ld b/arch/h8300/platform/h8300h/generic/ram.ld
--- a/arch/h8300/platform/h8300h/generic/ram.ld Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/platform/h8300h/generic/ram.ld Sun Aug 3 13:14:46 2003
@@ -1,76 +1,11 @@
-/* AKI3068NET RAM */
+/* Generic RAM */
OUTPUT_ARCH(h8300h)
ENTRY("__start")
MEMORY
{
- ram : ORIGIN = 0x400000, LENGTH = 0xA0000
-/* rdisk : ORIGIN = 0x4A0000, LENGTH = 0x70000 */
-/* uram : ORIGIN = 0x510000, LENGTH = 0xF0000 */
- uram : ORIGIN = 0x4A0000, LENGTH = 0x160000
+ ram : ORIGIN = 0x400000, LENGTH = 0x200000
eram : ORIGIN = 0x600000, LENGTH = 0
iram : ORIGIN = 0xffbf20, LENGTH = 0x4000
}
-
-SECTIONS
-{
- .bootvec :
- {
- *(.bootvec)
- } > ram
- .text :
- {
- __stext = . ;
- *(.text)
- __etext = . ;
- } > ram
- .rodata :
- {
- ___data_rom_start = ALIGN ( 4 ) ;
- } > ram
- .erom :
- {
- __erom = . ;
- } > ram
- .data :
- {
- __ramstart = . ;
- __sdata = . ;
- ___data_start = . ;
- *(.data)
- __edata = . ;
- edata = ALIGN( 0x10 ) ;
- ___data_end = ALIGN( 0x10 ) ;
- } > ram
- .bss :
- {
- __sbss = . ;
- ___bss_start = . ;
- *(.bss)
- *(COMMON)
- __ebss = . ;
- ___bss_end = . ;
- } > ram
-/*
- .rootimg :
- {
- __rootimage = . ;
- } > rdisk
-*/
- .dummy1 :
- {
- end = ALIGN( 0x10 ) ;
- __end = ALIGN( 0x10 ) ;
- } > uram
- .ram_vec : AT(___bss_end)
- {
- __ram_vector = . ;
- } > iram
- __ram_vector_image = LOADADDR(.ram_vec) ;
- .dummy2 :
- {
- _COMMAND_START = . - 0x200 ;
- __ramend = . ;
- } > eram
-}
diff -Nru a/arch/h8300/platform/h8300h/generic/rom.ld b/arch/h8300/platform/h8300h/generic/rom.ld
--- a/arch/h8300/platform/h8300h/generic/rom.ld Sun Aug 3 13:14:45 2003
+++ b/arch/h8300/platform/h8300h/generic/rom.ld Sun Aug 3 13:14:45 2003
@@ -1,123 +1,12 @@
OUTPUT_ARCH(h8300h)
ENTRY("__start")
-/*INPUT(rootimage.o)*/
-
-_jiffies = _jiffies_64 + 4;
-
MEMORY
{
vector : ORIGIN = 0x000000, LENGTH = 0x000100
rom : ORIGIN = 0x000100, LENGTH = 0x200000-0x000100
- erom : ORIGIN = 0x200000, LENGTH = 1
- ram : ORIGIN = 0x200000, LENGTH = 0x100000
- eram : ORIGIN = 0x2fa000, LENGTH = 1
+ erom : ORIGIN = 0x200000, LENGTH = 0
+ ram : ORIGIN = 0x200000, LENGTH = 0x400000
+ eram : ORIGIN = 0x600000, LENGTH = 0
}
-SECTIONS
-{
- .vectors :
- {
- __vector = . ;
- *(.vectors*)
- } > vector
- .text :
- {
- *(.int_redirect)
- __stext = . ;
- *(.text)
- . = ALIGN(0x4) ;
- *(.exit.text)
- *(.text.*)
- . = ALIGN(0x4) ;
- *(.exitcall.exit)
- . = ALIGN(0x4) ;
- *(.kstrtab)
- . = ALIGN(0x4) ;
- *(.rodata*)
- . = ALIGN(16); /* Exception table */
- ___start___ex_table = .;
- *(__ex_table)
- ___stop___ex_table = .;
-
- ___start___ksymtab = .; /* Kernel symbol table */
- *(__ksymtab)
- ___stop___ksymtab = .;
-
- . = ALIGN(0x4) ;
- __etext = . ;
- } > rom
- .data : AT( ADDR(.text)+SIZEOF(.text))
- {
- __sdata = . ;
- ___data_start = . ;
-
- . = ALIGN(0x2000) ;
- *(.data.init_task)
- . = ALIGN(0x4) ;
- *(.data)
- . = ALIGN(0x4) ;
- *(.data.*)
-
- . = ALIGN(0x4) ;
- ___init_begin = .;
- *(.init.text)
- *(.init.data)
- . = ALIGN(0x4) ;
- ___setup_start = .;
- *(.init.setup)
- . = ALIGN(0x4) ;
- ___setup_end = .;
- ___start___param = .;
- *(__param)
- ___stop___param = .;
- ___initcall_start = .;
- *(.initcall1.init)
- *(.initcall2.init)
- *(.initcall3.init)
- *(.initcall4.init)
- *(.initcall5.init)
- *(.initcall6.init)
- *(.initcall7.init)
- ___initcall_end = .;
- ___con_initcall_start = .;
- *(.con_initcall.init)
- ___con_initcall_end = .;
- SECURITY_INIT
- . = ALIGN(4);
- ___initramfs_start = .;
- *(.init.ramfs)
- ___initramfs_end = .;
- . = ALIGN(0x4) ;
- ___init_end = .;
-
- __edata = . ;
- } > ram
- __begin_data = LOADADDR(.data) ;
- .blkimg : AT( LOADADDR(.data) + SIZEOF(.data))
- {
- __blkimg = . ;
- *(.rootimg*)
- } > rom
- .erom :
- {
- __erom = . ;
- } > erom
- .bss :
- {
- . = ALIGN(0x4) ;
- __sbss = . ;
- *(.bss)
- . = ALIGN(0x4) ;
- *(COMMON)
- . = ALIGN(0x4) ;
- __ebss = . ;
- __end = . ;
- __ramstart = .;
- } > ram
- .dummy :
- {
- COMMAND_START = . - 0x200 ;
- __ramend = . ;
- } > eram
-}
diff -Nru a/arch/h8300/platform/h8300h/generic/timer.c b/arch/h8300/platform/h8300h/generic/timer.c
--- a/arch/h8300/platform/h8300h/generic/timer.c Sun Aug 3 13:14:47 2003
+++ b/arch/h8300/platform/h8300h/generic/timer.c Sun Aug 3 13:14:47 2003
@@ -1,7 +1,7 @@
/*
* linux/arch/h8300/platform/h8300h/generic/timer.c
*
- * Yoshinori Sato <qzb04471@nifty.ne.jp>
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend Timer Handler
*
@@ -22,27 +22,31 @@
#include <linux/timex.h>
+extern int request_irq_boot(unsigned int,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long, const char *, void *);
+
+
#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
-#define TMR8CMA2 0x00ffff94
-#define TMR8TCSR2 0x00ffff92
-#define TMR8TCNT2 0x00ffff90
+#include <asm/regs306x.h>
int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *))
{
outb(H8300_TIMER_COUNT_DATA,TMR8CMA2);
outb(0x00,TMR8TCSR2);
- request_irq(40,timer_int,0,"timer",0);
+ request_irq_boot(40,timer_int,0,"timer",0);
outb(0x40|0x08|0x03,TMR8TCNT2);
return 0;
}
void platform_timer_eoi(void)
{
- __asm__("bclr #6,@0xffff92:8");
+ *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
}
#endif
#if defined(H8_3002) || defined(CONFIG_H83048)
+/* FIXME! */
#define TSTR 0x00ffff60
#define TSNC 0x00ffff61
#define TMDR 0x00ffff62
@@ -63,7 +67,7 @@
*(unsigned short *)TCNT=0;
outb(0x23,TCR);
outb(0x00,TIOR);
- request_irq(26,timer_int,0,"timer",0);
+ request_timer_irq(26,timer_int,0,"timer",0);
outb(inb(TIER) | 0x01,TIER);
outb(inb(TSNC) & ~0x01,TSNC);
outb(inb(TMDR) & ~0x01,TMDR);
diff -Nru a/arch/h8300/platform/h8300h/h8max/Makefile b/arch/h8300/platform/h8300h/h8max/Makefile
--- a/arch/h8300/platform/h8300h/h8max/Makefile Sun Aug 3 13:14:44 2003
+++ b/arch/h8300/platform/h8300h/h8max/Makefile Sun Aug 3 13:14:44 2003
@@ -6,8 +6,7 @@
# unless it's something special (ie not a .c file).
#
-all: $(BOARD).o
-O_TARGET := $(BOARD).o
+extra-y := crt0_ram.o
obj-y := timer.o
timer.o: timer.c
diff -Nru a/arch/h8300/platform/h8300h/h8max/crt0_ram.S b/arch/h8300/platform/h8300h/h8max/crt0_ram.S
--- a/arch/h8300/platform/h8300h/h8max/crt0_ram.S Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/platform/h8300h/h8max/crt0_ram.S Sun Aug 3 13:14:46 2003
@@ -3,7 +3,7 @@
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
- * Platform depend startup for uClinux-2.4.x
+ * Platform depend startup
* Target Archtecture: H8MAX
* Memory Layout : RAM
*/
@@ -13,6 +13,16 @@
#include <linux/config.h>
#include <asm/linkage.h>
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(command_line)
.global SYMBOL_NAME(_platform_gpio_table)
@@ -25,23 +35,28 @@
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
- mov.l #__ramend,sp
+ mov.l #RAMEND,sp
ldc #0x80,ccr
/* Peripheral Setup */
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+ /* move romfs image */
+ jsr @__move_romfs
+#endif
+
/* .bss clear */
mov.l #__sbss,er5
- mov.l er5,er6
- inc.l #1,er6
mov.l #__ebss,er4
sub.l er5,er4
- sub.w r0,r0
- mov.b r0l,@er5
+ shlr er4
+ shlr er4
+ sub.l er0,er0
1:
- eepmov.w
- dec.w #1,e4
- bpl 1b
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
@@ -49,22 +64,9 @@
mov.w #512,r4
eepmov.w
- /* RAM Interrupt Vector Table Setup */
-#if defined(CONFIG_GDB_DEBUG)
- mov.l @SYMBOL_NAME(interrupt_redirect_table)+11*4,er0
-#endif
- mov.l #SYMBOL_NAME(_vector_lma),er5
- mov.l #SYMBOL_NAME(interrupt_redirect_table),er6
- mov.w #0x100,r4
- eepmov.w
-#if defined(CONFIG_GDB_DEBUG)
- mov.l er0,@SYMBOL_NAME(interrupt_redirect_table)+11*4
-#endif
-
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
- mov.l #SYMBOL_NAME(init_task_union),sp
- mov.l sp,@SYMBOL_NAME(_current_task)
+ mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
diff -Nru a/arch/h8300/platform/h8300h/h8max/ram.ld b/arch/h8300/platform/h8300h/h8max/ram.ld
--- a/arch/h8300/platform/h8300h/h8max/ram.ld Sun Aug 3 13:14:53 2003
+++ b/arch/h8300/platform/h8300h/h8max/ram.ld Sun Aug 3 13:14:53 2003
@@ -5,86 +5,7 @@
MEMORY
{
- ram : ORIGIN = 0x400000, LENGTH = 0x600000-0x400000-0xc000
- disk : ORIGIN = 0x600000-0xc000, LENGTH = 0xc000
+ ram : ORIGIN = 0x400000, LENGTH = 0x600000-0x400000
eram : ORIGIN = 0x600000, LENGTH = 0
iram : ORIGIN = 0xfffd20, LENGTH = 0x100
}
-
-SECTIONS
-{
- .bootvec :
- {
- *(.bootvec)
- } > ram
- .text :
- {
- __stext = . ;
- *(.text)
- . = ALIGN(0x4) ;
- *(.text.*)
- . = ALIGN(0x4) ;
- *(.kstrtab)
- . = ALIGN(0x4) ;
- *(.rodata*)
- . = ALIGN(16); /* Exception table */
- ___start___ex_table = .;
- *(__ex_table)
- ___stop___ex_table = .;
-
- ___start___ksymtab = .; /* Kernel symbol table */
- *(__ksymtab)
- ___stop___ksymtab = .;
-
- . = ALIGN(0x4) ;
- __etext = . ;
- } > ram
- .data :
- {
- __sdata = . ;
- ___data_start = . ;
- *(.data)
- *(.data.*)
- *(.exitcall.exit)
-
- . = ALIGN(0x2000) ;
- *(.data.init_task)
- . = ALIGN(0x2000) ;
- ___init_begin = .;
- *(.text.init)
- *(.data.init)
- . = ALIGN(16);
- ___setup_start = .;
- *(.setup.init)
- ___setup_end = .;
- ___initcall_start = .;
- *(.initcall.init)
- . = ALIGN(4) ;
- ___initcall_end = .;
- ___init_end = .;
- __edata = . ;
- . = ALIGN(0x4) ;
- __sbss = . ;
- *(.bss)
- . = ALIGN(0x4) ;
- *(COMMON)
- . = ALIGN(0x4) ;
- __ebss = . ;
- __end = . ;
- __ramstart = .;
- } > ram
- .blkimg :
- {
- __ramend = . ;
- __blkimg = . ;
- } > disk
- .ram_vec : AT(ADDR(.data) + SIZEOF(.data))
- {
- *(.int_redirect)
- } > iram
- __vector_lma = LOADADDR(.ram_vec);
- .dummy2 :
- {
- COMMAND_START = . - 0x200 ;
- } > eram
-}
diff -Nru a/arch/h8300/platform/h8300h/h8max/timer.c b/arch/h8300/platform/h8300h/h8max/timer.c
--- a/arch/h8300/platform/h8300h/h8max/timer.c Sun Aug 3 13:14:45 2003
+++ b/arch/h8300/platform/h8300h/h8max/timer.c Sun Aug 3 13:14:45 2003
@@ -14,29 +14,32 @@
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/regs306x.h>
-#include <linux/timex.h>
-
-#define TMR8CMA2 0x00ffff94
-#define TMR8TCSR2 0x00ffff92
-#define TMR8TCNT2 0x00ffff90
#define CMFA 6
-int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *))
+extern int request_irq_boot(unsigned int,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long, const char *, void *);
+
+void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
- outb(CONFIG_CLK_FREQ*10/8192,TMR8CMA2);
- outb(0x00,TMR8TCSR2);
- request_irq(40,timer_int,0,"timer",0);
- outb(0x40|0x08|0x03,TMR8TCNT2);
+ outb(H8300_TIMER_COUNT_DATA,TCORA2);
+ outb(0x00,_8TCSR2);
+ request_irq_boot(40,timer_int,0,"timer",0);
+ outb(0x40|0x08|0x03,_8TCR2);
}
void platform_timer_eoi(void)
{
- *(unsigned char *)TMR8TCSR2 &= ~(1 << CMFA);
+ *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
}
void platform_gettod(int *year, int *mon, int *day, int *hour,
@@ -44,3 +47,4 @@
{
*year = *mon = *day = *hour = *min = *sec = 0;
}
+
diff -Nru a/arch/h8300/platform/h8300h/ints.c b/arch/h8300/platform/h8300h/ints.c
--- a/arch/h8300/platform/h8300h/ints.c Sun Aug 3 13:14:46 2003
+++ b/arch/h8300/platform/h8300h/ints.c Sun Aug 3 13:14:46 2003
@@ -18,6 +18,9 @@
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/random.h>
+#include <linux/bootmem.h>
#include <asm/system.h>
#include <asm/irq.h>
@@ -27,8 +30,7 @@
#include <asm/gpio.h>
#include <asm/hardirq.h>
#include <asm/regs306x.h>
-
-#define INTERNAL_IRQS (64)
+#include <asm/errno.h>
#define EXT_IRQ0 12
#define EXT_IRQ1 13
@@ -39,75 +41,144 @@
#define EXT_IRQ6 18
#define EXT_IRQ7 19
-#define WDT_IRQ 20
-
-/* table for system interrupt handlers */
-static irq_handler_t irq_list[SYS_IRQS];
-
-/* The number of spurious interrupts */
-volatile unsigned int num_spurious;
-
-/* assembler routines */
-asmlinkage void system_call(void);
-asmlinkage void bad_interrupt(void);
+/*
+ * This structure has only 4 elements for speed reasons
+ */
+typedef struct irq_handler {
+ irqreturn_t (*handler)(int, void *, struct pt_regs *);
+ int flags;
+ int count;
+ void *dev_id;
+ const char *devname;
+} irq_handler_t;
+
+irq_handler_t *irq_list[NR_IRQS];
+
+extern unsigned long *interrupt_redirect_table;
+
+static inline unsigned long *get_vector_address(void)
+{
+ unsigned long *rom_vector = (unsigned long *)0x000000;
+ unsigned long base,tmp;
+ int vec_no;
+
+ base = rom_vector[EXT_IRQ0];
+
+ /* check romvector format */
+ for (vec_no = EXT_IRQ1; vec_no <= EXT_IRQ5; vec_no++) {
+ if ((base+(vec_no - EXT_IRQ0)*4) != rom_vector[vec_no])
+ return NULL;
+ }
-/* irq node variables for the 32 (potential) on chip sources */
-/*static irq_node_t *int_irq_list[INTERNAL_IRQS];*/
-static int int_irq_count[INTERNAL_IRQS];
+ /* ramvector base address */
+ base -= EXT_IRQ0*4;
-#if 0
-static void int_badint(int irq, void *dev_id, struct pt_regs *fp)
-{
- num_spurious += 1;
+ /* writerble check */
+ tmp = ~(*(volatile unsigned long *)base);
+ (*(volatile unsigned long *)base) = tmp;
+ if ((*(volatile unsigned long *)base) != tmp)
+ return NULL;
+ return (unsigned long *)base;
}
-#endif
-void init_IRQ(void)
+void __init init_IRQ(void)
{
+#if defined(CONFIG_RAMKERNEL)
int i;
+ unsigned long *ramvec,*ramvec_p;
+ unsigned long break_vec;
- for (i = 0; i < SYS_IRQS; i++) {
- irq_list[i].handler = NULL;
- irq_list[i].flags = 0;
- irq_list[i].devname = NULL;
- irq_list[i].dev_id = NULL;
+#if defined(CONFIG_GDB_DEBUG)
+ break_vec = ramvec[TRAP3_VEC];
+#else
+ break_vec = VECTOR(trace_break);
+#endif
+
+ ramvec = get_vector_address();
+ if (ramvec == NULL)
+ panic("interrupt vector serup failed.");
+ else
+ printk("virtual vector at 0x%08lx\n",(unsigned long)ramvec);
+
+ for (ramvec_p = ramvec, i = 0; i < NR_IRQS; i++)
+ *ramvec_p++ = REDIRECT(interrupt_entry);
+
+ ramvec[TRAP0_VEC] = VECTOR(system_call);
+ ramvec[TRAP3_VEC] = break_vec;
+ interrupt_redirect_table = ramvec;
+#ifdef DUMP_VECTOR
+ ramvec_p = interrupt_redirect_table;
+ for (i = 0; i < NR_IRQS; i++) {
+ if ((i % 8) == 0)
+ printk("\n%p: ",ramvec_p);
+ printk("%p ",*ramvec_p);
+ ramvec_p++;
}
+ printk("\n");
+#endif
+#endif
+}
+void __init request_irq_boot(unsigned int irq,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long flags, const char *devname, void *dev_id)
+{
+ irq_handler_t *irq_handle;
+ irq_handle = alloc_bootmem(sizeof(irq_handler_t));
+ irq_handle->handler = handler;
+ irq_handle->flags = flags;
+ irq_handle->count = 0;
+ irq_handle->dev_id = dev_id;
+ irq_handle->devname = devname;
+ irq_list[irq] = irq_handle;
}
-int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
+int request_irq(unsigned int irq,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
unsigned long flags, const char *devname, void *dev_id)
{
+ irq_handler_t *irq_handle;
+ if (irq < 0 || irq >= NR_IRQS) {
+ printk("Incorrect IRQ %d from %s\n", irq, devname);
+ return -EINVAL;
+ }
+ if (irq_list[irq])
+ return -EBUSY;
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ3) {
if (H8300_GPIO_RESERVE(H8300_GPIO_P8, 1 << (irq - EXT_IRQ0)) == 0)
- return 1;
+ return -EBUSY;
H8300_GPIO_DDR(H8300_GPIO_P8, (irq - EXT_IRQ0), 0);
}
if (irq >= EXT_IRQ4 && irq <= EXT_IRQ5) {
if (H8300_GPIO_RESERVE(H8300_GPIO_P9, 1 << (irq - EXT_IRQ0)) == 0)
- return 1;
+ return -EBUSY;
H8300_GPIO_DDR(H8300_GPIO_P9, (irq - EXT_IRQ0), 0);
}
- irq_list[irq].handler = handler;
- irq_list[irq].flags = flags;
- irq_list[irq].devname = devname;
- irq_list[irq].dev_id = dev_id;
- if (irq >= EXT_IRQ0 && irq <= EXT_IRQ5)
- *(volatile unsigned char *)IER |= 1 << (irq - EXT_IRQ0);
+ irq_handle = (irq_handler_t *)kmalloc(sizeof(irq_handler_t), GFP_ATOMIC);
+ if (irq_handle == NULL)
+ return -ENOMEM;
+
+ irq_handle->handler = handler;
+ irq_handle->flags = flags;
+ irq_handle->count = 0;
+ irq_handle->dev_id = dev_id;
+ irq_handle->devname = devname;
+ irq_list[irq] = irq_handle;
return 0;
}
void free_irq(unsigned int irq, void *dev_id)
{
- if (irq_list[irq].dev_id != dev_id)
- printk("%s: Removing probably wrong IRQ %d from %s\n",
- __FUNCTION__, irq, irq_list[irq].devname);
+ if (irq >= NR_IRQS) {
+ return;
+ }
+ if (!irq_list[irq] || irq_list[irq]->dev_id != dev_id)
+ printk("Removing probably wrong IRQ %d from %s\n",
+ irq, irq_list[irq]->devname);
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ5)
*(volatile unsigned char *)IER &= ~(1 << (irq - EXT_IRQ0));
- irq_list[irq].handler = NULL;
- irq_list[irq].flags = 0;
- irq_list[irq].dev_id = NULL;
- irq_list[irq].devname = NULL;
+ kfree(irq_list[irq]);
+ irq_list[irq] = NULL;
}
/*
@@ -123,115 +194,36 @@
return 0;
}
-struct int_regs {
- unsigned long ier;
- unsigned long isr;
- unsigned char mask;
-};
-
-#define REGS_DEF(ier,isr,mask) {ier,isr,mask}
-
-const struct int_regs interrupt_registers[]= {
- REGS_DEF(IER,ISR,0x01),
- REGS_DEF(IER,ISR,0x02),
- REGS_DEF(IER,ISR,0x04),
- REGS_DEF(IER,ISR,0x08),
- REGS_DEF(IER,ISR,0x10),
- REGS_DEF(IER,ISR,0x20),
- REGS_DEF(IER,ISR,0x40),
- REGS_DEF(IER,ISR,0x80),
- REGS_DEF(TCSR,TCSR,0x20),
- REGS_DEF(RTMCSR,RTMCSR,0x40),
- REGS_DEF(0,0,0),
- REGS_DEF(ADCSR,ADCSR,0x40),
- REGS_DEF(TISRA,TISRA,0x10),
- REGS_DEF(TISRB,TISRB,0x10),
- REGS_DEF(TISRC,TISRC,0x10),
- REGS_DEF(0,0,0),
- REGS_DEF(TISRA,TISRA,0x20),
- REGS_DEF(TISRB,TISRB,0x20),
- REGS_DEF(TISRC,TISRC,0x20),
- REGS_DEF(0,0,0),
- REGS_DEF(TISRA,TISRA,0x40),
- REGS_DEF(TISRB,TISRB,0x40),
- REGS_DEF(TISRC,TISRC,0x40),
- REGS_DEF(0,0,0),
- REGS_DEF(_8TCR0,_8TCSR0,0x40),
- REGS_DEF(_8TCR0,_8TCSR0,0x80),
- REGS_DEF(_8TCR1,_8TCSR1,0xC0),
- REGS_DEF(_8TCR0,_8TCSR0,0x20),
- REGS_DEF(_8TCR2,_8TCSR2,0x40),
- REGS_DEF(_8TCR2,_8TCSR2,0x80),
- REGS_DEF(_8TCR3,_8TCSR3,0xC0),
- REGS_DEF(_8TCR2,_8TCSR2,0x20),
- REGS_DEF(DTCR0A,DTCR0A,0x0),
- REGS_DEF(DTCR0B,DTCR0B,0x0),
- REGS_DEF(DTCR1A,DTCR1A,0x0),
- REGS_DEF(DTCR1B,DTCR1B,0x0),
- REGS_DEF(0,0,0),
- REGS_DEF(0,0,0),
- REGS_DEF(0,0,0),
- REGS_DEF(0,0,0),
- REGS_DEF(SCR0,SSR0,0x40),
- REGS_DEF(SCR0,SSR0,0x40),
- REGS_DEF(SCR0,SSR0,0x80),
- REGS_DEF(SCR0,SSR0,0x04),
- REGS_DEF(SCR1,SSR1,0x40),
- REGS_DEF(SCR1,SSR1,0x40),
- REGS_DEF(SCR1,SSR1,0x80),
- REGS_DEF(SCR1,SSR1,0x04),
- REGS_DEF(SCR2,SSR2,0x40),
- REGS_DEF(SCR2,SSR2,0x40),
- REGS_DEF(SCR2,SSR2,0x80),
- REGS_DEF(SCR2,SSR2,0x04)
-};
-
void enable_irq(unsigned int irq)
{
- unsigned char ier;
- const struct int_regs *regs=&interrupt_registers[irq - 12];
- if (irq == WDT_IRQ) {
- ier = ctrl_inb(TCSR);
- ier |= 0x20;
- ctrl_outb((0xa500 | ier),TCSR);
- } else {
- if ((irq > 12) && regs->ier) {
- ier = ctrl_inb(regs->ier);
- ier |= regs->mask;
- ctrl_outb(ier, regs->ier);
- } else
- panic("Unknown interrupt vector");
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ5) {
+ *(volatile unsigned char *)IER |= (1 << (irq - EXT_IRQ0));
+ *(volatile unsigned char *)ISR &= ~(1 << (irq - EXT_IRQ0));
}
}
void disable_irq(unsigned int irq)
{
- unsigned char ier;
- const struct int_regs *regs=&interrupt_registers[irq - 12];
- if (irq == WDT_IRQ) {
- ier = ctrl_inb(TCSR);
- ier &= ~0x20;
- ctrl_outb((0xa500 | ier),TCSR);
- } else {
- if ((irq > 12) && regs->ier) {
- ier = ctrl_inb(regs->ier);
- ier &= ~(regs->mask);
- ctrl_outb(ier, regs->ier);
- } else
- panic("Unknown interrupt vector");
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ5) {
+ *(volatile unsigned char *)IER &= ~(1 << (irq - EXT_IRQ0));
}
}
-asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
+asmlinkage void process_int(int vec, struct pt_regs *fp)
{
irq_enter();
- if (irq_list[vec].handler) {
- irq_list[vec].handler(vec, irq_list[vec].dev_id, fp);
- int_irq_count[vec]++;
- } else
- panic("No interrupt handler for %ld\n", vec);
if (vec >= EXT_IRQ0 && vec <= EXT_IRQ5)
*(volatile unsigned char *)ISR &= ~(1 << (vec - EXT_IRQ0));
+ if (vec < NR_IRQS) {
+ if (irq_list[vec]) {
+ irq_list[vec]->handler(vec, irq_list[vec]->dev_id, fp);
+ irq_list[vec]->count++;
+ if (irq_list[vec]->flags & SA_SAMPLE_RANDOM)
+ add_interrupt_randomness(vec);
+ }
+ } else {
+ BUG();
+ }
irq_exit();
}
@@ -240,8 +232,10 @@
int i;
for (i = 0; i < NR_IRQS; i++) {
- seq_printf(p, "%3d: %10u ",i,int_irq_count[i]);
- seq_printf(p, "%s\n", irq_list[i].devname);
+ if (irq_list[i]) {
+ seq_printf(p, "%3d: %10u ",i,irq_list[i]->count);
+ seq_printf(p, "%s\n", irq_list[i]->devname);
+ }
}
return 0;
diff -Nru a/arch/h8300/platform/h8s/Makefile b/arch/h8300/platform/h8s/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,22 @@
+#
+# Makefile for the linux kernel.
+#
+# Reuse any files we can from the H8S
+#
+
+#VPATH := $(VPATH):$(BOARD)
+
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+.S.o:
+ $(CC) -D__ASSEMBLY__ $(AFLAGS) -I. -c $< -o $*.o
+
+obj-y := entry.o ints.o
+
+$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S
+
+entry.o: entry.S
+
+ints.o: ints.c
diff -Nru a/arch/h8300/platform/h8s/edosk2674/Makefile b/arch/h8300/platform/h8s/edosk2674/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/edosk2674/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,15 @@
+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+extra-y := crt0_ram.o
+obj-y := timer.o
+
+timer.o: timer.c
+
+clean:
+ rm -f *.[oa]
diff -Nru a/arch/h8300/platform/h8s/edosk2674/crt0_ram.S b/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/edosk2674/crt0_ram.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,130 @@
+/*
+ * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: EDOSK-2674
+ * Memory Layout : RAM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(_command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300s
+
+ .section .text
+ .file "crt0_ram.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #RAMEND,sp
+ ldc #0x07,exr
+
+ /* Peripheral Setup */
+ bclr #4,@INTCR:8 /* interrupt mode 2 */
+ bset #5,@INTCR:8
+ bclr #0,@IER+1:16
+ bset #1,@ISCRL+1:16 /* IRQ0 Positive Edge */
+ bclr #0,@ISCRL+1:16
+
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+ /* move romfs image */
+ jsr @__move_romfs
+#endif
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l er5,er6
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ shlr #2,er4
+ sub.l er0,er0
+1:
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
+
+ /* copy kernel commandline */
+ mov.l #COMMAND_START,er5
+ mov.l #SYMBOL_NAME(command_line),er6
+ mov.w #512,r4
+ eepmov.w
+
+ /* uClinux kernel start */
+ ldc #0x10,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+gpio_table:
+ ;; P1DDR
+ ;; used,ddr
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x3f,0x3a
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; P7DDR
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0xff,0xff
+ ;; PBDDR
+ .byte 0xff,0x00
+ ;; PCDDR
+ .byte 0xff,0x00
+ ;; PDDDR
+ .byte 0xff,0x00
+ ;; PEDDR
+ .byte 0xff,0x00
+ ;; PFDDR
+ .byte 0xff,0xff
+ ;; PGDDR
+ .byte 0x0f,0x0f
+ ;; PHDDR
+ .byte 0x0f,0x0f
+
+__target_name:
+ .asciz "EDOSK-2674"
+
+ .section .bootvec,"ax"
+ jmp @SYMBOL_NAME(_start)
diff -Nru a/arch/h8300/platform/h8s/edosk2674/crt0_rom.S b/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/edosk2674/crt0_rom.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,186 @@
+/*
+ * linux/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: EDOSK-2674
+ * Memory Layout : ROM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(_command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300s
+ .section .text
+ .file "crt0_rom.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #__ramend,sp
+ ldc #0x80,ccr
+ ldc #0,exr
+
+ /* Peripheral Setup */
+;BSC/GPIO setup
+ mov.l #init_regs,er0
+ mov.w #0xffff,e2
+1:
+ mov.w @er0+,r2
+ beq 2f
+ mov.w @er0+,r1
+ mov.b r1l,@er2
+ bra 1b
+
+2:
+;SDRAM setup
+#define SDRAM_SMR 0x400040
+
+ mov.b #0,r0l
+ mov.b r0l,@DRACCR:16
+ mov.w #0x188,r0
+ mov.w r0,@REFCR:16
+ mov.w #0x85b4,r0
+ mov.w r0,@DRAMCR:16
+ mov.b #0,r1l
+ mov.b r1l,@SDRAM_SMR
+ mov.w #0x84b4,r0
+ mov.w r0,@DRAMCR:16
+;special thanks to Arizona Cooperative Power
+
+ /* copy .data */
+ mov.l #__begin_data,er5
+ mov.l #__sdata,er6
+ mov.l #__edata,er4
+ sub.l er6,er4
+ shlr.l #2,er4
+1:
+ mov.l @er5+,er0
+ mov.l er0,@er6
+ adds #4,er6
+ dec.l #1,er4
+ bne 1b
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ shlr.l #2,er4
+ sub.l er0,er0
+1:
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
+
+ /* copy kernel commandline */
+ mov.l #COMMAND_START,er5
+ mov.l #SYMBOL_NAME(_command_line),er6
+ mov.w #512,r4
+ eepmov.w
+
+ /* linux kernel start */
+ ldc #0x90,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+#define INIT_REGS_DATA(REGS,DATA) \
+ .word ((REGS) & 0xffff),DATA
+
+init_regs:
+INIT_REGS_DATA(ASTCR,0xff)
+INIT_REGS_DATA(RDNCR,0x00)
+INIT_REGS_DATA(ABWCR,0x80)
+INIT_REGS_DATA(WTCRAH,0x27)
+INIT_REGS_DATA(WTCRAL,0x77)
+INIT_REGS_DATA(WTCRBH,0x71)
+INIT_REGS_DATA(WTCRBL,0x22)
+INIT_REGS_DATA(CSACRH,0x80)
+INIT_REGS_DATA(CSACRL,0x80)
+INIT_REGS_DATA(BROMCRH,0xa0)
+INIT_REGS_DATA(BROMCRL,0xa0)
+INIT_REGS_DATA(P3DDR,0x3a)
+INIT_REGS_DATA(P3ODR,0x06)
+INIT_REGS_DATA(PADDR,0xff)
+INIT_REGS_DATA(PFDDR,0xfe)
+INIT_REGS_DATA(PGDDR,0x0f)
+INIT_REGS_DATA(PHDDR,0x0f)
+INIT_REGS_DATA(PFCR0,0xff)
+INIT_REGS_DATA(PFCR2,0x0d)
+INIT_REGS_DATA(ITSR, 0x00)
+INIT_REGS_DATA(ITSR+1,0x3f)
+INIT_REGS_DATA(INTCR,0x20)
+
+ .word 0
+
+gpio_table:
+ ;; P1DDR
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; P7DDR
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0x00,0x00
+ ;; PBDDR
+ .byte 0x00,0x00
+ ;; PCDDR
+ .byte 0x00,0x00
+ ;; PDDDR
+ .byte 0x00,0x00
+ ;; PEDDR
+ .byte 0x00,0x00
+ ;; PFDDR
+ .byte 0x00,0x00
+ ;; PGDDR
+ .byte 0x00,0x00
+ ;; PHDDR
+ .byte 0x00,0x00
+
+__target_name:
+ .asciz "EDOSK-2674"
+
+ .section .bss
+__command_line:
+ .space 512
+
+ /* interrupt vector */
+ .section .vectors,"ax"
+ .long __start
+ .long __start
+vector = 2
+ .rept 126-1
+ .long _interrupt_redirect_table+vector*4
+vector = vector + 1
+ .endr
diff -Nru a/arch/h8300/platform/h8s/edosk2674/ram.ld b/arch/h8300/platform/h8s/edosk2674/ram.ld
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/edosk2674/ram.ld Sun Aug 3 13:14:53 2003
@@ -0,0 +1,10 @@
+/* EDOSK-2674R RAM */
+
+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY
+ {
+ ram : ORIGIN = 0x400000, LENGTH = 0xc00000-0x400000
+ eram : ORIGIN = 0xc00000, LENGTH = 0
+ }
diff -Nru a/arch/h8300/platform/h8s/edosk2674/rom.ld b/arch/h8300/platform/h8s/edosk2674/rom.ld
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/edosk2674/rom.ld Sun Aug 3 13:14:53 2003
@@ -0,0 +1,11 @@
+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY
+ {
+ vector : ORIGIN = 0x000000, LENGTH = 0x000200
+ rom : ORIGIN = 0x000200, LENGTH = 0x100000-0x000200
+ erom : ORIGIN = 0x100000, LENGTH = 0
+ ram : ORIGIN = 0x400000, LENGTH = 0xc00000-0x400000
+ eram : ORIGIN = 0xc00000, LENGTH = 0
+ }
diff -Nru a/arch/h8300/platform/h8s/edosk2674/timer.c b/arch/h8300/platform/h8s/edosk2674/timer.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/edosk2674/timer.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,56 @@
+/*
+ * linux/arch/h8300/platform/h8s/generic/timer.c
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend Timer Handler
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/regs267x.h>
+
+#define REGS(regs) __REGS(regs)
+#define __REGS(regs) #regs
+
+extern int request_irq_boot(unsigned int,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long, const char *, void *);
+
+int __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
+{
+ unsigned char mstpcrl;
+ mstpcrl = inb(MSTPCRL); /* Enable timer */
+ mstpcrl &= ~0x01;
+ outb(mstpcrl,MSTPCRL);
+ outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
+ outb(0x00,_8TCSR1);
+ request_irq_boot(76,timer_int,0,"timer",0);
+ outb(0x40|0x08|0x03,_8TCR1);
+ return 0;
+}
+
+void platform_timer_eoi(void)
+{
+ __asm__("bclr #6,@" REGS(_8TCSR1) ":8");
+}
+
+void platform_gettod(int *year, int *mon, int *day, int *hour,
+ int *min, int *sec)
+{
+/* FIXME! not RTC support */
+ *year = *mon = *day = *hour = *min = *sec = 0;
+}
diff -Nru a/arch/h8300/platform/h8s/entry.S b/arch/h8300/platform/h8s/entry.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/entry.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,335 @@
+/* -*- mode: asm -*-
+ *
+ * linux/arch/h8300/platform/h8s/entry.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * fairly heavy changes to fix syscall args and signal processing
+ * by David McCullough <davidm@snapgear.com>
+ */
+
+/*
+ * entry.S
+ * include exception/interrupt gateway
+ * system call entry
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <asm/unistd.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+
+ENOSYS = 38
+
+LSIGTRAP = 5
+
+SOFTIRQ_PENDING = 0
+
+/* the following macro is used when enabling interrupts */
+
+LER4 = 0
+LER5 = 4
+LER6 = 8
+LER3 = 12
+LER2 = 16
+LER1 = 20
+LORIG = 24
+LCCR = 28
+LER0 = 30
+LVEC = 34
+LEXR = 38
+LRET = 40
+
+ .h8300s
+
+/* CPU context save/restore macros. */
+
+ .macro SAVE_ALL
+ mov.l er0,@-sp
+
+ stc ccr,r0l /* check kernel mode */
+ orc #0x10,ccr
+ btst #4,r0l
+ bne 5f
+
+ mov.l sp,@SYMBOL_NAME(sw_usp) /* user mode */
+ mov.l @sp,er0
+ mov.l @SYMBOL_NAME(sw_ksp),sp
+ sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
+ stm.l er0-er3,@-sp
+ mov.l @SYMBOL_NAME(sw_usp),er0
+ mov.l @(10:16,er0),er1 /* copy the RET addr */
+ mov.l er1,@(LRET-LER3:16,sp)
+ mov.w @(8:16,er0),r1
+ mov.w r1,@(LEXR-LER3:16,sp) /* copy EXR */
+
+ mov.w e1,r1 /* e1 highbyte = ccr */
+ and #0xef,r1h /* mask mode? flag */
+ sub.w r0,r0
+ mov.b r1h,r0l
+ mov.w r0,@(LCCR-LER3:16,sp) /* copy ccr */
+ mov.l @(LORIG-LER3:16,sp),er0
+ mov.l er0,@(LER0-LER3:16,sp) /* copy ER0 */
+ bra 6f
+5:
+ mov.l @sp,er0 /* kernel mode */
+ subs #2,sp /* dummy ccr */
+ stm.l er0-er3,@-sp
+ mov.w @(LRET-LER3:16,sp),r1 /* copy old ccr */
+ mov.b r1h,r1l
+ mov.b #0,r1h
+ mov.w r1,@(LCCR-LER3:16,sp)
+6:
+ mov.l er6,@-sp /* syscall arg #6 */
+ mov.l er5,@-sp /* syscall arg #5 */
+ mov.l er4,@-sp /* syscall arg #4 */
+ .endm
+
+ .macro RESTORE_ALL
+ mov.l @sp+,er4
+ mov.l @sp+,er5
+ mov.l @sp+,er6
+ ldm.l @sp+,er2-er3
+ mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
+ btst #4,r0l
+ bne 7f
+
+ orc #0x80,ccr
+ mov.l @SYMBOL_NAME(sw_usp),er0
+ mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
+ mov.l er1,@er0
+ mov.w @(LEXR-LER1:16,sp),r1 /* restore EXR */
+ mov.w r1,@(8:16,er0)
+ mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
+ mov.b r1l,r1h
+ mov.b @(LRET+1-LER1:16,sp),r1l
+ mov.w r1,e1
+ mov.w @(LRET+2-LER1:16,sp),r1
+ mov.l er1,@(10:16,er0)
+
+ mov.l @sp+,er1
+ add.l #(LRET-LORIG),sp /* remove LORIG - LRET */
+ mov.l sp,@SYMBOL_NAME(sw_ksp)
+ mov.l er0,sp
+ bra 8f
+7:
+ mov.l @sp+,er1
+ adds #4,sp
+ adds #2,sp
+8:
+ mov.l @sp+,er0
+ adds #4,sp /* remove the sw created LVEC */
+ rte
+ .endm
+
+.globl SYMBOL_NAME(system_call)
+.globl SYMBOL_NAME(ret_from_exception)
+.globl SYMBOL_NAME(ret_from_fork)
+.globl SYMBOL_NAME(ret_from_signal)
+.globl SYMBOL_NAME(ret_from_interrupt)
+.globl SYMBOL_NAME(interrupt_redirect_table)
+.globl SYMBOL_NAME(sw_ksp),SYMBOL_NAME(sw_usp)
+.globl SYMBOL_NAME(resume)
+.globl SYMBOL_NAME(syscall_trampoline)
+.globl SYMBOL_NAME(trace_break)
+.globl SYMBOL_NAME(interrupt_entry)
+
+INTERRUPTS = 128
+#if defined(CONFIG_ROMKERNEL)
+ .section .int_redirect,"ax"
+SYMBOL_NAME_LABEL(interrupt_redirect_table)
+ .rept 7
+ .long 0
+ .endr
+ jsr @SYMBOL_NAME(interrupt_entry) /* NMI */
+ jmp @SYMBOL_NAME(system_call) /* TRAPA #0 (System call) */
+ .long 0
+ .long 0
+ jmp @SYMBOL_NAME(trace_break) /* TRAPA #3 (breakpoint) */
+ .rept INTERRUPTS-12
+ jsr @SYMBOL_NAME(interrupt_entry)
+ .endr
+#endif
+#if defined(CONFIG_RAMKERNEL)
+.globl SYMBOL_NAME(interrupt_redirect_table)
+ .section .bss
+SYMBOL_NAME_LABEL(interrupt_redirect_table)
+ .space 4
+#endif
+
+ .section .text
+ .align 2
+SYMBOL_NAME_LABEL(interrupt_entry)
+ SAVE_ALL
+ mov.w @(LCCR,sp),r0
+ btst #4,r0l
+ bne 1f
+ mov.l @SYMBOL_NAME(sw_usp),er0
+ mov.l @(4:16,er0),er0
+ bra 2f
+1:
+ mov.l @(LVEC:16,sp),er0
+2:
+#if defined(CONFIG_ROMKERNEL)
+ sub.l #SYMBOL_NAME(interrupt_redirect_table),er0
+#endif
+#if defined(CONFIG_RAMKERNEL)
+ mov.l @SYMBOL_NAME(interrupt_redirect_table),er1
+ sub.l er1,er0
+#endif
+ shlr.l #2,er0
+ dec.l #1,er0
+ mov.l sp,er1
+ subs #4,er1 /* adjust ret_pc */
+ jsr @SYMBOL_NAME(process_int)
+ mov.l @SYMBOL_NAME(irq_stat)+SOFTIRQ_PENDING,er0
+ beq 1f
+ jsr @SYMBOL_NAME(do_softirq)
+1:
+ jmp @SYMBOL_NAME(ret_from_exception)
+
+SYMBOL_NAME_LABEL(system_call)
+ subs #4,sp /* dummy LVEC */
+ SAVE_ALL
+ mov.w @(LCCR:16,sp),r1
+ bset #4,r1l
+ ldc r1l,ccr /* restore ccr */
+ mov.l er0,er4
+ mov.l #-ENOSYS,er0
+ mov.l er0,@(LER0:16,sp)
+
+ /* save top of frame */
+ mov.l sp,er0
+ jsr @SYMBOL_NAME(set_esp0)
+ cmp.l #NR_syscalls,er4
+ bcc SYMBOL_NAME(ret_from_exception):16
+ shll.l #2,er4
+ mov.l #SYMBOL_NAME(sys_call_table),er0
+ add.l er4,er0
+ mov.l @er0,er0
+ mov.l er0,er4
+ beq SYMBOL_NAME(ret_from_exception):16
+ mov.l sp,er2
+ and.w #0xe000,r2
+ mov.b @((TASK_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
+ btst #(TIF_SYSCALL_TRACE & 7),r2l
+ mov.l @(LER1:16,sp),er0
+ mov.l @(LER2:16,sp),er1
+ mov.l @(LER3:16,sp),er2
+ jsr @er4
+ mov.l er0,@(LER0,sp) /* save the return value */
+#if defined(CONFIG_SYSCALL_PRINT)
+ jsr @SYMBOL_NAME(syscall_print)
+#endif
+ jmp @SYMBOL_NAME(ret_from_exception)
+1:
+ jsr SYMBOL_NAME(syscall_trace)
+ mov.l @(LER1:16,sp),er0
+ mov.l @(LER2:16,sp),er1
+ mov.l @(LER3:16,sp),er2
+ jsr @er4
+ mov.l er0,@(LER0:16,sp) /* save the return value */
+ jsr SYMBOL_NAME(syscall_trace)
+
+SYMBOL_NAME_LABEL(ret_from_signal)
+
+SYMBOL_NAME_LABEL(ret_from_exception)
+ mov.b @(LCCR+1:16,sp),r0l
+ btst #4,r0l /* check if returning to kernel */
+ bne 3f /* if so, skip resched, signals */
+ andc #0x7f,ccr
+ mov.l sp,er2
+ and.w #0xe000,r2
+ mov.l @(TI_FLAGS:16,er2),er1
+ and.l #_TIF_WORK_MASK,er1
+ beq 3f
+1:
+ mov.l @(TI_FLAGS:16,er2),er1
+ btst #TIF_NEED_RESCHED,r1l
+ bne @SYMBOL_NAME(reschedule):16
+ mov.l sp,er1
+ mov.l er2,er0
+ jsr @SYMBOL_NAME(do_signal)
+3:
+ RESTORE_ALL /* Does RTE */
+
+SYMBOL_NAME_LABEL(reschedule)
+ /* save top of frame */
+ mov.l sp,er0
+ jsr @SYMBOL_NAME(set_esp0)
+
+ mov.l #SYMBOL_NAME(ret_from_exception),er0
+ mov.l er0,@-sp
+ jmp @SYMBOL_NAME(schedule)
+
+SYMBOL_NAME_LABEL(ret_from_fork)
+ mov.l er2,er0
+ jsr @SYMBOL_NAME(schedule_tail)
+ jmp @SYMBOL_NAME_LABEL(ret_from_exception)
+
+
+SYMBOL_NAME_LABEL(resume)
+ /*
+ * er0 = prev
+ * er1 = next
+ * return last in er2
+ */
+
+ /* save sr */
+ sub.w r3,r3
+ stc ccr,r3l
+ stc exr,r3h
+ mov.w r3,@(THREAD_CCR+2:16,er0)
+
+ /* disable interrupts */
+ orc #0x80,ccr
+ mov.l @SYMBOL_NAME(sw_usp),er3
+ mov.l er3,@(THREAD_USP:16,er0)
+ mov.l sp,@(THREAD_KSP:16,er0)
+
+ /* Skip address space switching if they are the same. */
+ /* FIXME: what did we hack out of here, this does nothing! */
+
+ mov.l @(THREAD_USP:16,er1),er0
+ mov.l er0,@SYMBOL_NAME(sw_usp)
+ mov.l @(THREAD_KSP:16,er1),sp
+
+ /* restore status register */
+ mov.w @(THREAD_CCR+2:16,er1),r3
+
+ ldc r3l,ccr
+ ldc r3h,exr
+
+ rts
+
+SYMBOL_NAME_LABEL(trace_break)
+ subs #4,sp /* dummy LVEC */
+ SAVE_ALL
+ sub.l er1,er1
+ dec.l #1,er1
+ mov.l er1,@(LORIG,sp)
+ mov.l sp,er0
+ jsr @SYMBOL_NAME(set_esp0)
+ mov.l @SYMBOL_NAME(sw_usp),er0
+ mov.l @er0,er1
+ subs #2,er1
+ mov.l er1,@er0
+ and.w #0xff,e1
+ mov.l er1,er0
+ jsr @SYMBOL_NAME(trace_trap)
+ jmp @SYMBOL_NAME(ret_from_exception)
+
+SYMBOL_NAME_LABEL(syscall_trampoline)
+ mov.l er0,er6
+ mov.l sp,er0
+ jmp @er6
+
+ .section .bss
+SYMBOL_NAME_LABEL(sw_ksp)
+ .space 4
+SYMBOL_NAME_LABEL(sw_usp)
+ .space 4
diff -Nru a/arch/h8300/platform/h8s/generic/Makefile b/arch/h8300/platform/h8s/generic/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/generic/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,15 @@
+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+extra-y = crt0_$(MODEL).o
+obj-y := timer.o
+
+timer.o: timer.c
+
+clean:
+ rm -f *.[oa]
diff -Nru a/arch/h8300/platform/h8s/generic/crt0_ram.S b/arch/h8300/platform/h8s/generic/crt0_ram.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/generic/crt0_ram.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,127 @@
+/*
+ * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: generic
+ * Memory Layout : RAM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(_command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300s
+
+ .section .text
+ .file "crt0_ram.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #RAMEND,sp
+ ldc #0x07,exr
+
+ /* Peripheral Setup */
+ bclr #4,@INTCR:8 /* interrupt mode 2 */
+ bset #5,@INTCR:8
+
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+ /* move romfs image */
+ jsr @__move_romfs
+#endif
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l er5,er6
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ shlr #2,er4
+ sub.l er0,er0
+1:
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
+
+ /* copy kernel commandline */
+ mov.l #COMMAND_START,er5
+ mov.l #SYMBOL_NAME(command_line),er6
+ mov.w #512,r4
+ eepmov.w
+
+ /* uClinux kernel start */
+ ldc #0x10,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+gpio_table:
+ ;; P1DDR
+ ;; used,ddr
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; P7DDR
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0x00,0x00
+ ;; PBDDR
+ .byte 0x00,0x00
+ ;; PCDDR
+ .byte 0x00,0x00
+ ;; PDDDR
+ .byte 0x00,0x00
+ ;; PEDDR
+ .byte 0x00,0x00
+ ;; PFDDR
+ .byte 0x00,0x00
+ ;; PGDDR
+ .byte 0x00,0x00
+ ;; PHDDR
+ .byte 0x00,0x00
+
+__target_name:
+ .asciz "generic"
+
+ .section .bootvec,"ax"
+ jmp @SYMBOL_NAME(_start)
diff -Nru a/arch/h8300/platform/h8s/generic/crt0_rom.S b/arch/h8300/platform/h8s/generic/crt0_rom.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/generic/crt0_rom.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,132 @@
+/*
+ * linux/arch/h8300/platform/h8s/generic/crt0_rom.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: generic
+ * Memory Layout : ROM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(_command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300s
+ .section .text
+ .file "crt0_rom.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #__ramend,sp
+ ldc #0x80,ccr
+ ldc #0,exr
+ bclr #4,@INTCR:8
+ bset #5,@INTCR:8 /* Interrupt mode 2 */
+
+ /* Peripheral Setup */
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l er5,er6
+ inc.l #1,er6
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ sub.w r0,r0
+ mov.b r0l,@er5
+1:
+ eepmov.w
+ dec.w #1,e4
+ bpl 1b
+
+ /* copy .data */
+#if !defined(CONFIG_H8S_SIM)
+ mov.l #__begin_data,er5
+ mov.l #__sdata,er6
+ mov.l #__edata,er4
+ sub.l er6,er4
+1:
+ eepmov.w
+ dec.w #1,e4
+ bpl 1b
+#endif
+
+ /* copy kernel commandline */
+ mov.l #COMMAND_START,er5
+ mov.l #SYMBOL_NAME(_command_line),er6
+ mov.w #512,r4
+ eepmov.w
+
+ /* linux kernel start */
+ ldc #0x90,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+gpio_table:
+ ;; P1DDR
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x00,0x00
+ ;; P4DDR
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0x00,0x00
+ ;; PBDDR
+ .byte 0x00,0x00
+ ;; PCDDR
+ .byte 0x00,0x00
+ ;; PDDDR
+ .byte 0x00,0x00
+ ;; PEDDR
+ .byte 0x00,0x00
+ ;; PFDDR
+ .byte 0x00,0x00
+ ;; PGDDR
+ .byte 0x00,0x00
+ ;; PHDDR
+ .byte 0x00,0x00
+
+__target_name:
+ .asciz "generic"
+
+ .section .bss
+__command_line:
+ .space 512
+
+ /* interrupt vector */
+ .section .vectors,"ax"
+ .long __start
+ .long __start
+vector = 2
+ .rept 126-1
+ .long _interrupt_redirect_table+vector*4
+vector = vector + 1
+ .endr
diff -Nru a/arch/h8300/platform/h8s/generic/ram.ld b/arch/h8300/platform/h8s/generic/ram.ld
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/generic/ram.ld Sun Aug 3 13:14:53 2003
@@ -0,0 +1,8 @@
+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY
+ {
+ ram : ORIGIN = 0x400000, LENGTH = 0x200000
+ eram : ORIGIN = 0x600000, LENGTH = 0
+ }
diff -Nru a/arch/h8300/platform/h8s/generic/rom.ld b/arch/h8300/platform/h8s/generic/rom.ld
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/generic/rom.ld Sun Aug 3 13:14:53 2003
@@ -0,0 +1,11 @@
+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY
+ {
+ vector : ORIGIN = 0x000000, LENGTH = 0x000200
+ rom : ORIGIN = 0x000200, LENGTH = 0x200000-0x000200
+ erom : ORIGIN = 0x200000, LENGTH = 0
+ ram : ORIGIN = 0x200000, LENGTH = 0x200000
+ eram : ORIGIN = 0x400000, LENGTH = 0
+ }
diff -Nru a/arch/h8300/platform/h8s/generic/timer.c b/arch/h8300/platform/h8s/generic/timer.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/generic/timer.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,48 @@
+/*
+ * linux/arch/h8300/platform/h8s/generic/timer.c
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend Timer Handler
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/regs267x.h>
+
+extern int request_irq_boot(unsigned int,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long, const char *, void *);
+
+int platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
+{
+ outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
+ outb(0x00,_8TCSR1);
+ request_irq_boot(76,timer_int,0,"timer",0);
+ outb(0x40|0x08|0x03,_8TCR1);
+ return 0;
+}
+
+void platform_timer_eoi(void)
+{
+ __asm__("bclr #6,@0xffffb3:8");
+}
+
+void platform_gettod(int *year, int *mon, int *day, int *hour,
+ int *min, int *sec)
+{
+ *year = *mon = *day = *hour = *min = *sec = 0;
+}
diff -Nru a/arch/h8300/platform/h8s/ints.c b/arch/h8300/platform/h8s/ints.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/h8300/platform/h8s/ints.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,308 @@
+/*
+ * linux/arch/h8300/platform/h8sh/ints.c
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Based on linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright 1996 Roman Zippel
+ * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/bootmem.h>
+#include <linux/random.h>
+
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/traps.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/gpio.h>
+#include <asm/hardirq.h>
+#include <asm/regs267x.h>
+#include <asm/errno.h>
+
+#define EXT_IRQ0 16
+#define EXT_IRQ1 17
+#define EXT_IRQ2 18
+#define EXT_IRQ3 19
+#define EXT_IRQ4 20
+#define EXT_IRQ5 21
+#define EXT_IRQ6 22
+#define EXT_IRQ7 23
+#define EXT_IRQ8 24
+#define EXT_IRQ9 25
+#define EXT_IRQ10 26
+#define EXT_IRQ11 27
+#define EXT_IRQ12 28
+#define EXT_IRQ13 29
+#define EXT_IRQ14 30
+#define EXT_IRQ15 31
+
+/*
+ * This structure has only 4 elements for speed reasons
+ */
+typedef struct irq_handler {
+ irqreturn_t (*handler)(int, void *, struct pt_regs *);
+ int flags;
+ int count;
+ void *dev_id;
+ const char *devname;
+} irq_handler_t;
+
+static irq_handler_t *irq_list[NR_IRQS];
+
+/* IRQ pin assignment */
+struct irq_pins {
+ unsigned char port_no;
+ unsigned char bit_no;
+};
+/* ISTR = 0 */
+const static struct irq_pins irq_assign_table0[16]={
+ {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
+ {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
+ {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
+ {H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
+ {H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
+ {H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
+ {H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
+ {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
+};
+/* ISTR = 1 */
+const static struct irq_pins irq_assign_table1[16]={
+ {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
+ {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
+ {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
+ {H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
+ {H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
+ {H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
+ {H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
+ {H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
+};
+
+extern unsigned long *interrupt_redirect_table;
+
+static inline unsigned long *get_vector_address(void)
+{
+ volatile unsigned long *rom_vector = (unsigned long *)0x000000;
+ unsigned long base,tmp;
+ int vec_no;
+
+ base = rom_vector[EXT_IRQ0];
+
+ /* check romvector format */
+ for (vec_no = EXT_IRQ1; vec_no <= EXT_IRQ15; vec_no++) {
+ if ((base+(vec_no - EXT_IRQ0)*4) != rom_vector[vec_no])
+ return NULL;
+ }
+
+ /* ramvector base address */
+ base -= EXT_IRQ0*4;
+
+ /* writerble check */
+ tmp = ~(*(unsigned long *)base);
+ (*(unsigned long *)base) = tmp;
+ if ((*(unsigned long *)base) != tmp)
+ return NULL;
+ return (unsigned long *)base;
+}
+
+void __init init_IRQ(void)
+{
+#if defined(CONFIG_RAMKERNEL)
+ int i;
+ unsigned long *ramvec,*ramvec_p;
+ unsigned long break_vec;
+
+ ramvec = get_vector_address();
+ if (ramvec == NULL)
+ panic("interrupt vector serup failed.");
+ else
+ printk("virtual vector at 0x%08lx\n",(unsigned long)ramvec);
+
+#if defined(CONFIG_GDB_DEBUG)
+ /* save orignal break vector */
+ break_vec = ramvec[TRAP3_VEC];
+#else
+ break_vec = VECTOR(trace_break);
+#endif
+
+ /* create redirect table */
+ for (ramvec_p = ramvec, i = 0; i < NR_IRQS; i++)
+ *ramvec_p++ = REDIRECT(interrupt_entry);
+
+ /* set special vector */
+ ramvec[TRAP0_VEC] = VECTOR(system_call);
+ ramvec[TRAP3_VEC] = break_vec;
+ interrupt_redirect_table = ramvec;
+#ifdef DUMP_VECTOR
+ ramvec_p = ramvec;
+ for (i = 0; i < NR_IRQS; i++) {
+ if ((i % 8) == 0)
+ printk("\n%p: ",ramvec_p);
+ printk("%p ",*ramvec_p);
+ ramvec_p++;
+ }
+ printk("\n");
+#endif
+#endif
+}
+
+/* special request_irq */
+/* used bootmem allocater */
+void __init request_irq_boot(unsigned int irq,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long flags, const char *devname, void *dev_id)
+{
+ irq_handler_t *irq_handle;
+ irq_handle = alloc_bootmem(sizeof(irq_handler_t));
+ irq_handle->handler = handler;
+ irq_handle->flags = flags;
+ irq_handle->count = 0;
+ irq_handle->dev_id = dev_id;
+ irq_handle->devname = devname;
+ irq_list[irq] = irq_handle;
+}
+
+int request_irq(unsigned int irq,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long flags, const char *devname, void *dev_id)
+{
+ unsigned short ptn = 1 << (irq - EXT_IRQ0);
+ irq_handler_t *irq_handle;
+ if (irq < 0 || irq >= NR_IRQS) {
+ printk("Incorrect IRQ %d from %s\n", irq, devname);
+ return -EINVAL;
+ }
+ if (irq_list[irq])
+ return -EBUSY; /* already used */
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
+ /* initialize IRQ pin */
+ unsigned int port_no,bit_no;
+ if (*(volatile unsigned short *)ITSR & ptn) {
+ port_no = irq_assign_table1[irq - EXT_IRQ0].port_no;
+ bit_no = irq_assign_table1[irq - EXT_IRQ0].bit_no;
+ } else {
+ port_no = irq_assign_table0[irq - EXT_IRQ0].port_no;
+ bit_no = irq_assign_table0[irq - EXT_IRQ0].bit_no;
+ }
+ if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
+ return -EBUSY; /* pin already use */
+ H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
+ *(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
+ }
+ irq_handle = (irq_handler_t *)kmalloc(sizeof(irq_handler_t), GFP_ATOMIC);
+ if (irq_handle == NULL)
+ return -ENOMEM;
+
+ irq_handle->handler = handler;
+ irq_handle->flags = flags;
+ irq_handle->count = 0;
+ irq_handle->dev_id = dev_id;
+ irq_handle->devname = devname;
+ irq_list[irq] = irq_handle;
+ if (irq_handle->flags & SA_SAMPLE_RANDOM)
+ rand_initialize_irq(irq);
+
+ /* enable interrupt */
+ /* compatible i386 */
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
+ *(volatile unsigned short *)IER |= ptn;
+ return 0;
+}
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+ if (irq >= NR_IRQS)
+ return;
+ if (irq_list[irq]->dev_id != dev_id)
+ printk("%s: Removing probably wrong IRQ %d from %s\n",
+ __FUNCTION__, irq, irq_list[irq]->devname);
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
+ /* disable interrupt & release IRQ pin */
+ unsigned short port_no,bit_no;
+ *(volatile unsigned short *)ISR &= ~(1 << (irq - EXT_IRQ0));
+ *(volatile unsigned short *)IER |= 1 << (irq - EXT_IRQ0);
+ if (*(volatile unsigned short *)ITSR & (1 << (irq - EXT_IRQ0))) {
+ port_no = irq_assign_table1[irq - EXT_IRQ0].port_no;
+ bit_no = irq_assign_table1[irq - EXT_IRQ0].bit_no;
+ } else {
+ port_no = irq_assign_table0[irq - EXT_IRQ0].port_no;
+ bit_no = irq_assign_table0[irq - EXT_IRQ0].bit_no;
+ }
+ H8300_GPIO_FREE(port_no, bit_no);
+ }
+ kfree(irq_list[irq]);
+ irq_list[irq] = NULL;
+}
+
+unsigned long probe_irq_on (void)
+{
+ return 0;
+}
+
+int probe_irq_off (unsigned long irqs)
+{
+ return 0;
+}
+
+void enable_irq(unsigned int irq)
+{
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
+ *(volatile unsigned short *)IER |= 1 << (irq - EXT_IRQ0);
+}
+
+void disable_irq(unsigned int irq)
+{
+ if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
+ *(volatile unsigned short *)IER &= ~(1 << (irq - EXT_IRQ0));
+}
+
+asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
+{
+ irq_enter();
+ /* ISR clear */
+ /* compatible i386 */
+ if (vec >= EXT_IRQ0 && vec <= EXT_IRQ15)
+ *(volatile unsigned short *)ISR &= ~(1 << (vec - EXT_IRQ0));
+ if (vec < NR_IRQS) {
+ if (irq_list[vec]) {
+ irq_list[vec]->handler(vec, irq_list[vec]->dev_id, fp);
+ irq_list[vec]->count++;
+ if (irq_list[vec]->flags & SA_SAMPLE_RANDOM)
+ add_interrupt_randomness(vec);
+ }
+ } else {
+ BUG();
+ }
+ irq_exit();
+}
+
+int show_interrupts(struct seq_file *p, void *v)
+{
+ int i;
+
+ for (i = 0; i < NR_IRQS; i++) {
+ if (irq_list[i]) {
+ seq_printf(p, "%3d: %10u ",i,irq_list[i]->count);
+ seq_printf(p, "%s\n", irq_list[i]->devname);
+ }
+ }
+
+ return 0;
+}
+
+void init_irq_proc(void)
+{
+}
diff -Nru a/arch/h8300/vmlinux.lds.S b/arch/h8300/vmlinux.lds.S
--- a/arch/h8300/vmlinux.lds.S Sun Aug 3 13:14:49 2003
+++ b/arch/h8300/vmlinux.lds.S Sun Aug 3 13:14:49 2003
@@ -36,3 +36,143 @@
#endif
#endif
+#ifdef CONFIG_H8S_SIM
+#ifdef CONFIG_ROMKERNEL
+#include "platform/h8s/generic/rom.ld"
+#endif
+#ifdef CONFIG_RAMKERNEL
+#include "platform/h8s/generic/ram.ld"
+#endif
+#endif
+
+#ifdef CONFIG_H8S_EDOSK2674
+#ifdef CONFIG_ROMKERNEL
+#include "platform/h8s/edosk2674/rom.ld"
+#endif
+#ifdef CONFIG_RAMKERNEL
+#include "platform/h8s/edosk2674/ram.ld"
+#endif
+#endif
+
+_jiffies = _jiffies_64 + 4;
+
+SECTIONS
+{
+#if defined(CONFIG_ROMKERNEL)
+ .vectors :
+ {
+ __vector = . ;
+ *(.vectors*)
+ } > vector
+#endif
+#if defined(CONFIG_RAMKERNEL)
+ .bootvec :
+ {
+ *(.bootvec)
+ } > ram
+#endif
+ .text :
+ {
+#if defined(CONFIG_ROMKERNEL)
+ *(.int_redirect)
+#endif
+ __stext = . ;
+ *(.text)
+ . = ALIGN(0x4) ;
+ *(.exit.text)
+ *(.text.*)
+ . = ALIGN(0x4) ;
+ *(.exitcall.exit)
+ . = ALIGN(0x4) ;
+ *(.kstrtab)
+ . = ALIGN(0x4) ;
+ *(.rodata*)
+ . = ALIGN(16); /* Exception table */
+ ___start___ex_table = .;
+ *(__ex_table)
+ ___stop___ex_table = .;
+
+ ___start___ksymtab = .; /* Kernel symbol table */
+ *(__ksymtab)
+ ___stop___ksymtab = .;
+
+ . = ALIGN(0x4) ;
+ __etext = . ;
+#if defined(CONFIG_ROMKERNEL)
+ } > rom
+#endif
+#if defined(CONFIG_RAMKERNEL)
+ } > ram
+#endif
+ .data : AT( ADDR(.text)+SIZEOF(.text))
+ {
+ __sdata = . ;
+ ___data_start = . ;
+
+ . = ALIGN(0x2000) ;
+ *(.data.init_task)
+ . = ALIGN(0x4) ;
+ *(.data)
+ . = ALIGN(0x4) ;
+ *(.data.*)
+
+ . = ALIGN(0x4) ;
+ ___init_begin = .;
+ __sinittext = .;
+ *(.init.text)
+ __einittext = .;
+ *(.init.data)
+ . = ALIGN(0x4) ;
+ ___setup_start = .;
+ *(.init.setup)
+ . = ALIGN(0x4) ;
+ ___setup_end = .;
+ ___start___param = .;
+ *(__param)
+ ___stop___param = .;
+ ___initcall_start = .;
+ *(.initcall1.init)
+ *(.initcall2.init)
+ *(.initcall3.init)
+ *(.initcall4.init)
+ *(.initcall5.init)
+ *(.initcall6.init)
+ *(.initcall7.init)
+ ___initcall_end = .;
+ ___con_initcall_start = .;
+ *(.con_initcall.init)
+ ___con_initcall_end = .;
+ . = ALIGN(4);
+ ___initramfs_start = .;
+ *(.init.ramfs)
+ ___initramfs_end = .;
+ . = ALIGN(0x4) ;
+ ___init_end = .;
+ __edata = . ;
+ } > ram
+ __begin_data = LOADADDR(.data) ;
+#if defined(CONFIG_ROMKERNEL)
+ .erom :
+ {
+ __erom = . ;
+ } > erom
+#endif
+ .bss :
+ {
+ . = ALIGN(0x4) ;
+ __sbss = . ;
+ *(.bss*)
+ . = ALIGN(0x4) ;
+ *(COMMON)
+ . = ALIGN(0x4) ;
+ __ebss = . ;
+ __end = . ;
+ __ramstart = .;
+ } > ram
+ .dummy :
+ {
+ COMMAND_START = . - 0x200 ;
+ __ramend = . ;
+ } > eram
+}
+
diff -Nru a/arch/i386/Kconfig b/arch/i386/Kconfig
--- a/arch/i386/Kconfig Sun Aug 3 13:14:45 2003
+++ b/arch/i386/Kconfig Sun Aug 3 13:14:45 2003
@@ -1242,42 +1242,8 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
source "net/bluetooth/Kconfig"
@@ -1354,6 +1320,15 @@
This options enables addition error checking for high memory systems.
Disable for production systems.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
config DEBUG_SPINLOCK_SLEEP
bool "Sleep-inside-spinlock checking"
help
diff -Nru a/arch/i386/defconfig b/arch/i386/defconfig
--- a/arch/i386/defconfig Sun Aug 3 13:14:50 2003
+++ b/arch/i386/defconfig Sun Aug 3 13:14:50 2003
@@ -19,6 +19,8 @@
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
+CONFIG_IKCONFIG=n
+CONFIG_IKCONFIG_PROC=n
#
# Loadable module support
@@ -253,7 +255,6 @@
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_SC1200 is not set
CONFIG_BLK_DEV_PIIX=y
-# CONFIG_BLK_DEV_NFORCE is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
@@ -268,7 +269,6 @@
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI device support
diff -Nru a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
--- a/arch/i386/kernel/cpu/common.c Sun Aug 3 13:14:44 2003
+++ b/arch/i386/kernel/cpu/common.c Sun Aug 3 13:14:44 2003
@@ -288,10 +288,23 @@
c->x86 = 3;
}
- if (this_cpu->c_identify)
+ generic_identify(c);
+
+ printk(KERN_DEBUG "CPU: After generic identify, caps: %08lx %08lx %08lx %08lx\n",
+ c->x86_capability[0],
+ c->x86_capability[1],
+ c->x86_capability[2],
+ c->x86_capability[3]);
+
+ if (this_cpu->c_identify) {
this_cpu->c_identify(c);
- else
- generic_identify(c);
+
+ printk(KERN_DEBUG "CPU: After vendor identify, caps: %08lx %08lx %08lx %08lx\n",
+ c->x86_capability[0],
+ c->x86_capability[1],
+ c->x86_capability[2],
+ c->x86_capability[3]);
+}
/*
* Vendor-specific initialization. In this section we
@@ -341,7 +354,7 @@
/* Now the feature flags better reflect actual CPU features! */
- printk(KERN_DEBUG "CPU: After generic, caps: %08lx %08lx %08lx %08lx\n",
+ printk(KERN_DEBUG "CPU: After all inits, caps: %08lx %08lx %08lx %08lx\n",
c->x86_capability[0],
c->x86_capability[1],
c->x86_capability[2],
diff -Nru a/arch/i386/kernel/cpu/cpufreq/acpi.c b/arch/i386/kernel/cpu/cpufreq/acpi.c
--- a/arch/i386/kernel/cpu/cpufreq/acpi.c Sun Aug 3 13:14:45 2003
+++ b/arch/i386/kernel/cpu/cpufreq/acpi.c Sun Aug 3 13:14:45 2003
@@ -380,7 +380,7 @@
static int
acpi_processor_write_performance (
struct file *file,
- const char *buffer,
+ const char __user *buffer,
size_t count,
loff_t *data)
{
diff -Nru a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c Sun Aug 3 13:14:45 2003
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c Sun Aug 3 13:14:45 2003
@@ -1,7 +1,5 @@
/*
- * $Id: longhaul.c,v 1.87 2003/02/22 10:23:46 db Exp $
- *
- * (C) 2001 Dave Jones. <davej@suse.de>
+ * (C) 2001-2003 Dave Jones. <davej@codemonkey.org.uk>
* (C) 2002 Padraig Brady. <padraig@antefacto.com>
*
* Licensed under the terms of the GNU GPL License version 2.
@@ -32,6 +30,8 @@
#include <asm/timex.h>
#include <asm/io.h>
+#include "longhaul.h"
+
#define DEBUG
#ifdef DEBUG
@@ -40,6 +40,8 @@
#define dprintk(msg...) do { } while(0)
#endif
+#define PFX "longhaul: "
+
static unsigned int numscales=16, numvscales;
static int minvid, maxvid;
static int can_scale_voltage;
@@ -248,7 +250,7 @@
static int eblcr_table[32];
static int voltage_table[32];
static unsigned int highest_speed, lowest_speed; /* kHz */
-static int longhaul; /* version. */
+static int longhaul_version;
static struct cpufreq_frequency_table *longhaul_table;
@@ -273,7 +275,7 @@
rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22;
- if (longhaul==3) {
+ if (longhaul_version==3) {
if (lo & (1<<27))
invalue+=16;
}
@@ -283,19 +285,18 @@
/**
* longhaul_set_cpu_frequency()
- * @clock_ratio_index : index of clock_ratio[] for new frequency
+ * @clock_ratio_index : bitpattern of the new multiplier.
*
* Sets a new clock ratio, and -if applicable- a new Front Side Bus
*/
static void longhaul_setstate (unsigned int clock_ratio_index)
{
- unsigned long lo, hi;
- unsigned int bits;
- int revkey;
int vidindex, i;
struct cpufreq_freqs freqs;
-
+ union msr_longhaul longhaul;
+ union msr_bcr2 bcr2;
+
if (clock_ratio[clock_ratio_index] == -1)
return;
@@ -309,39 +310,33 @@
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
- dprintk (KERN_INFO "longhaul: FSB:%d Mult(x10):%d\n",
+ dprintk (KERN_INFO PFX "FSB:%d Mult(x10):%d\n",
fsb * 100, clock_ratio[clock_ratio_index]);
- bits = clock_ratio_index;
- /* "bits" contains the bitpattern of the new multiplier.
- we now need to transform it to the desired format. */
-
- switch (longhaul) {
+ switch (longhaul_version) {
case 1:
- rdmsr (MSR_VIA_BCR2, lo, hi);
- revkey = (lo & 0xf)<<4; /* Rev key. */
- lo &= ~(1<<23|1<<24|1<<25|1<<26);
- lo |= (1<<19); /* Enable software clock multiplier */
- lo |= (bits<<23); /* desired multiplier */
- lo |= revkey;
- wrmsr (MSR_VIA_BCR2, lo, hi);
+ rdmsrl (MSR_VIA_BCR2, bcr2.val);
+ /* Enable software clock multiplier */
+ bcr2.bits.ESOFTBF = 1;
+ bcr2.bits.CLOCKMUL = clock_ratio_index;
+ wrmsrl (MSR_VIA_BCR2, bcr2.val);
__hlt();
/* Disable software clock multiplier */
- rdmsr (MSR_VIA_BCR2, lo, hi);
- lo &= ~(1<<19);
- lo |= revkey;
- wrmsr (MSR_VIA_BCR2, lo, hi);
+ rdmsrl (MSR_VIA_BCR2, bcr2.val);
+ bcr2.bits.ESOFTBF = 0;
+ wrmsrl (MSR_VIA_BCR2, bcr2.val);
break;
case 2:
- rdmsr (MSR_VIA_LONGHAUL, lo, hi);
- revkey = (lo & 0xf)<<4; /* Rev key. */
- lo &= 0xfff0bf0f; /* reset [19:16,14](bus ratio) and [7:4](rev key) to 0 */
- lo |= (bits<<16);
- lo |= (1<<8); /* EnableSoftBusRatio */
- lo |= revkey;
+ rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
+ longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf;
+ longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
+ longhaul.bits.EnableSoftBusRatio = 1;
+ /* We must program the revision key only with values we
+ * know about, not blindly copy it from 0:3 */
+ longhaul.bits.RevisionKey = 1;
if (can_scale_voltage) {
/* PB: TODO fix this up */
@@ -356,41 +351,41 @@
if (i==32)
goto bad_voltage;
- dprintk (KERN_INFO "longhaul: Desired vid index=%d\n", i);
+ dprintk (KERN_INFO PFX "Desired vid index=%d\n", i);
#if 0
- lo &= 0xfe0fffff;/* reset [24:20](voltage) to 0 */
- lo |= (i<<20); /* set voltage */
- lo |= (1<<9); /* EnableSoftVID */
+ longhaul.bits.SoftVID = i;
+ longhaul.bits.EnableSoftVID = 1;
#endif
}
-
+/* FIXME: Do voltage and freq seperatly like we do in powernow-k7 */
bad_voltage:
- wrmsr (MSR_VIA_LONGHAUL, lo, hi);
+ wrmsrl (MSR_VIA_LONGHAUL, longhaul.val);
__hlt();
- rdmsr (MSR_VIA_LONGHAUL, lo, hi);
- lo &= ~(1<<8);
+ rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
+ longhaul.bits.EnableSoftBusRatio = 0;
if (can_scale_voltage)
- lo &= ~(1<<9);
- lo |= revkey;
- wrmsr (MSR_VIA_LONGHAUL, lo, hi);
+ longhaul.bits.EnableSoftVID = 0;
+ longhaul.bits.RevisionKey = 1;
+ wrmsrl (MSR_VIA_LONGHAUL, longhaul.val);
break;
case 3:
- rdmsr (MSR_VIA_LONGHAUL, lo, hi);
- revkey = (lo & 0xf)<<4; /* Rev key. */
- lo &= 0xfff0bf0f; /* reset longhaul[19:16,14] to 0 */
- lo |= (bits<<16);
- lo |= (1<<8); /* EnableSoftBusRatio */
- lo |= revkey;
+ rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
+ longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf;
+ longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
+ longhaul.bits.EnableSoftBusRatio = 1;
+ /* We must program the revision key only with values we
+ * know about, not blindly copy it from 0:3 */
+ longhaul.bits.RevisionKey = 3; /* SoftVID & SoftBSEL */
- wrmsr (MSR_VIA_LONGHAUL, lo, hi);
+ wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
__hlt();
- rdmsr (MSR_VIA_LONGHAUL, lo, hi);
- lo &= ~(1<<8);
- lo |= revkey;
- wrmsr (MSR_VIA_LONGHAUL, lo, hi);
+ rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
+ longhaul.bits.EnableSoftBusRatio = 0;
+ longhaul.bits.RevisionKey = 3;
+ wrmsrl (MSR_VIA_LONGHAUL, longhaul.val);
break;
}
@@ -400,14 +395,15 @@
static int __init longhaul_get_ranges (void)
{
- unsigned long lo, hi, invalue;
+ unsigned long invalue;
unsigned int minmult=0, maxmult=0;
unsigned int multipliers[32]= {
50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65,
-1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 };
unsigned int j, k = 0;
+ union msr_longhaul longhaul;
- switch (longhaul) {
+ switch (longhaul_version) {
case 1:
/* Ugh, Longhaul v1 didn't have the min/max MSRs.
Assume min=3.0x & max = whatever we booted at. */
@@ -416,17 +412,17 @@
break;
case 2 ... 3:
- rdmsr (MSR_VIA_LONGHAUL, lo, hi);
+ rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
- invalue = (hi & (1<<0|1<<1|1<<2|1<<3));
- if (hi & (1<<11))
+ invalue = longhaul.bits.MaxMHzBR;
+ if (longhaul.bits.MaxMHzBR4)
invalue += 16;
maxmult=multipliers[invalue];
-#if 0 /* This is MaxMhz @ Min Voltage. Ignore for now */
- invalue = (hi & (1<<16|1<<17|1<<18|1<<19)) >> 16;
- if (hi & (1<<27))
- invalue += 16;
+#if 0
+ invalue = longhaul.bits.MinMHzBR;
+ if (longhaul.bits.MinMHzBR4);
+ invalue += 16;
minmult = multipliers[invalue];
#else
minmult = 30; /* as per spec */
@@ -436,9 +432,9 @@
highest_speed = maxmult * fsb * 100;
lowest_speed = minmult * fsb * 100;
- dprintk (KERN_INFO "longhaul: MinMult(x10)=%d MaxMult(x10)=%d\n",
+ dprintk (KERN_INFO PFX "MinMult(x10)=%d MaxMult(x10)=%d\n",
minmult, maxmult);
- dprintk (KERN_INFO "longhaul: Lowestspeed=%d Highestspeed=%d\n",
+ dprintk (KERN_INFO PFX "Lowestspeed=%d Highestspeed=%d\n",
lowest_speed, highest_speed);
longhaul_table = kmalloc((numscales + 1) * sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
@@ -460,43 +456,62 @@
kfree (longhaul_table);
return -EINVAL;
}
-
+
return 0;
}
-static void __init longhaul_setup_voltagescaling (unsigned long lo, unsigned long hi)
+static void __init longhaul_setup_voltagescaling(void)
{
- int revkey;
+ union msr_longhaul longhaul;
- can_scale_voltage = 1;
+ rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
- minvid = (hi & (1<<20|1<<21|1<<22|1<<23|1<<24)) >> 20; /* 56:52 */
- maxvid = (hi & (1<<4|1<<5|1<<6|1<<7|1<<8)) >> 4; /* 40:36 */
- vrmrev = (lo & (1<<15))>>15;
+ if (!(longhaul.bits.RevisionID & 1))
+ return;
+
+ minvid = longhaul.bits.MinimumVID;
+ maxvid = longhaul.bits.MaximumVID;
+ vrmrev = longhaul.bits.VRMRev;
+
+ if (minvid == 0 || maxvid == 0) {
+ printk (KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
+ "Voltage scaling disabled.\n",
+ minvid/1000, minvid%1000, maxvid/1000, maxvid%1000);
+ return;
+ }
+
+ if (minvid == maxvid) {
+ printk (KERN_INFO PFX "Claims to support voltage scaling but min & max are "
+ "both %d.%03d. Voltage scaling disabled\n",
+ maxvid/1000, maxvid%1000);
+ return;
+ }
if (vrmrev==0) {
- dprintk (KERN_INFO "longhaul: VRM 8.5 : ");
+ dprintk (KERN_INFO PFX "VRM 8.5 : ");
memcpy (voltage_table, vrm85scales, sizeof(voltage_table));
numvscales = (voltage_table[maxvid]-voltage_table[minvid])/25;
} else {
- dprintk (KERN_INFO "longhaul: Mobile VRM : ");
+ dprintk (KERN_INFO PFX "Mobile VRM : ");
memcpy (voltage_table, mobilevrmscales, sizeof(voltage_table));
numvscales = (voltage_table[maxvid]-voltage_table[minvid])/5;
}
/* Current voltage isn't readable at first, so we need to
set it to a known value. The spec says to use maxvid */
- revkey = (lo & 0xf)<<4; /* Rev key. */
- lo &= 0xfe0fff0f; /* Mask unneeded bits */
- lo |= (1<<9); /* EnableSoftVID */
- lo |= revkey; /* Reinsert key */
- lo |= maxvid << 20;
- wrmsr (MSR_VIA_LONGHAUL, lo, hi);
+ longhaul.bits.RevisionKey = longhaul.bits.RevisionID; /* FIXME: This is bad. */
+ longhaul.bits.EnableSoftVID = 1;
+ longhaul.bits.SoftVID = maxvid;
+ wrmsrl (MSR_VIA_LONGHAUL, longhaul.val);
+
minvid = voltage_table[minvid];
maxvid = voltage_table[maxvid];
+
dprintk ("Min VID=%d.%03d Max VID=%d.%03d, %d possible voltage scales\n",
maxvid/1000, maxvid%1000, minvid/1000, minvid%1000, numvscales);
+
+ can_scale_voltage = 1;
}
@@ -510,8 +525,8 @@
unsigned int target_freq,
unsigned int relation)
{
- unsigned int table_index = 0;
- unsigned int new_clock_ratio = 0;
+ unsigned int table_index = 0;
+ unsigned int new_clock_ratio = 0;
if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index))
return -EINVAL;
@@ -530,7 +545,7 @@
switch (c->x86_model) {
case 6: /* VIA C3 Samuel C5A */
- longhaul=1;
+ longhaul_version=1;
memcpy (clock_ratio, longhaul1_clock_ratio, sizeof(longhaul1_clock_ratio));
memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr));
break;
@@ -538,12 +553,12 @@
case 7: /* C5B / C5C */
switch (c->x86_mask) {
case 0:
- longhaul=1;
+ longhaul_version=1;
memcpy (clock_ratio, longhaul1_clock_ratio, sizeof(longhaul1_clock_ratio));
memcpy (eblcr_table, samuel2_eblcr, sizeof(samuel2_eblcr));
break;
case 1 ... 15:
- longhaul=2;
+ longhaul_version=2;
memcpy (clock_ratio, longhaul2_clock_ratio, sizeof(longhaul2_clock_ratio));
memcpy (eblcr_table, ezra_eblcr, sizeof(ezra_eblcr));
break;
@@ -552,21 +567,18 @@
case 8: /* C5M/C5N */
return -ENODEV; // Waiting on updated docs from VIA before this is usable
- longhaul=3;
+ longhaul_version=3;
numscales=32;
memcpy (clock_ratio, longhaul3_clock_ratio, sizeof(longhaul3_clock_ratio));
memcpy (eblcr_table, c5m_eblcr, sizeof(c5m_eblcr));
break;
}
- printk (KERN_INFO "longhaul: VIA CPU detected. Longhaul version %d supported\n", longhaul);
+ printk (KERN_INFO PFX "VIA CPU detected. Longhaul version %d supported\n",
+ longhaul_version);
- if (longhaul==2 || longhaul==3) {
- unsigned long lo, hi;
- rdmsr (MSR_VIA_LONGHAUL, lo, hi);
- if ((lo & (1<<0)) && (dont_scale_voltage==0))
- longhaul_setup_voltagescaling (lo, hi);
- }
+ if ((longhaul_version==2 || longhaul_version==3) && (dont_scale_voltage==0))
+ longhaul_setup_voltagescaling();
ret = longhaul_get_ranges();
if (ret != 0)
@@ -601,7 +613,7 @@
case 8:
return -ENODEV;
default:
- printk (KERN_INFO "longhaul: Unknown VIA CPU. Contact davej@suse.de\n");
+ printk (KERN_INFO PFX "Unknown VIA CPU. Contact davej@codemonkey.org.uk\n");
}
return -ENODEV;
@@ -615,7 +627,7 @@
MODULE_PARM (dont_scale_voltage, "i");
-MODULE_AUTHOR ("Dave Jones <davej@suse.de>");
+MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>");
MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors.");
MODULE_LICENSE ("GPL");
diff -Nru a/arch/i386/kernel/cpu/cpufreq/longhaul.h b/arch/i386/kernel/cpu/cpufreq/longhaul.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,49 @@
+/*
+ * longhaul.h
+ * (C) 2003 Dave Jones.
+ *
+ * Licensed under the terms of the GNU GPL License version 2.
+ *
+ * VIA-specific information
+ */
+
+union msr_bcr2 {
+ struct {
+ unsigned Reseved:19, // 18:0
+ ESOFTBF:1, // 19
+ Reserved2:3, // 22:20
+ CLOCKMUL:4, // 26:23
+ Reserved3:5; // 31:27
+ } bits;
+ unsigned long val;
+};
+
+union msr_longhaul {
+ struct {
+ unsigned RevisionID:4, // 3:0
+ RevisionKey:4, // 7:4
+ EnableSoftBusRatio:1, // 8
+ EnableSoftVID:1, // 9
+ EnableSoftBSEL:1, // 10
+ Reserved:3, // 11:13
+ SoftBusRatio4:1, // 14
+ VRMRev:1, // 15
+ SoftBusRatio:4, // 19:16
+ SoftVID:5, // 24:20
+ Reserved2:3, // 27:25
+ SoftBSEL:2, // 29:28
+ Reserved3:2, // 31:30
+ MaxMHzBR:4, // 35:32
+ MaximumVID:5, // 40:36
+ MaxMHzFSB:2, // 42:41
+ MaxMHzBR4:1, // 43
+ Reserved4:4, // 47:44
+ MinMHzBR:4, // 51:48
+ MinimumVID:5, // 56:52
+ MinMHzFSB:2, // 58:57
+ MinMHzBR4:1, // 59
+ Reserved5:4; // 63:60
+ } bits;
+ unsigned long long val;
+};
+
diff -Nru a/arch/i386/kernel/cpu/cpufreq/longrun.c b/arch/i386/kernel/cpu/cpufreq/longrun.c
--- a/arch/i386/kernel/cpu/cpufreq/longrun.c Sun Aug 3 13:14:50 2003
+++ b/arch/i386/kernel/cpu/cpufreq/longrun.c Sun Aug 3 13:14:50 2003
@@ -1,6 +1,4 @@
/*
- * $Id: longrun.c,v 1.25 2003/02/28 16:03:50 db Exp $
- *
* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
*
* Licensed under the terms of the GNU GPL License version 2.
@@ -123,7 +121,7 @@
policy->cpuinfo.max_freq);
if (policy->policy == CPUFREQ_POLICY_GOVERNOR)
- policy->policy = longrun_driver.policy[0].policy;
+ return -EINVAL;
return 0;
}
diff -Nru a/arch/i386/kernel/cpu/cpufreq/powernow-k6.c b/arch/i386/kernel/cpu/cpufreq/powernow-k6.c
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k6.c Sun Aug 3 13:14:45 2003
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k6.c Sun Aug 3 13:14:45 2003
@@ -1,8 +1,5 @@
/*
- * $Id: powernow-k6.c,v 1.48 2003/02/22 10:23:46 db Exp $
- * This file was part of Powertweak Linux (http://powertweak.sf.net)
- * and is shared with the Linux Kernel module.
- *
+ * This file was based upon code in Powertweak Linux (http://powertweak.sf.net)
* (C) 2000-2003 Dave Jones, Arjan van de Ven, Janne Pänkälä, Dominik Brodowski.
*
* Licensed under the terms of the GNU GPL License version 2.
@@ -230,7 +227,7 @@
}
-MODULE_AUTHOR ("Arjan van de Ven <arjanv@redhat.com>, Dave Jones <davej@suse.de>, Dominik Brodowski <linux@brodo.de>");
+MODULE_AUTHOR ("Arjan van de Ven <arjanv@redhat.com>, Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
MODULE_DESCRIPTION ("PowerNow! driver for AMD K6-2+ / K6-3+ processors.");
MODULE_LICENSE ("GPL");
diff -Nru a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c Sun Aug 3 13:14:44 2003
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c Sun Aug 3 13:14:44 2003
@@ -1,7 +1,6 @@
/*
- * $Id: powernow-k7.c,v 1.34 2003/02/22 10:23:46 db Exp $
- *
- * (C) 2003 Dave Jones <davej@suse.de>
+ * AMD K7 Powernow driver.
+ * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs.
*
* Licensed under the terms of the GNU GPL License version 2.
* Based upon datasheets & sample CPUs kindly provided by AMD.
@@ -85,27 +84,6 @@
static char have_a0;
-#ifndef rdmsrl
-#define rdmsrl(msr,val) do {unsigned long l__,h__; \
- rdmsr (msr, l__, h__); \
- val = l__; \
- val |= ((u64)h__<<32); \
-} while(0)
-#endif
-
-#ifndef wrmsrl
-static void wrmsrl (u32 msr, u64 val)
-{
- u32 lo, hi;
-
- lo = (u32) val;
- hi = val >> 32;
- wrmsr (msr, lo, hi);
-}
-#endif
-
-
-
static int check_powernow(void)
{
struct cpuinfo_x86 *c = cpu_data;
@@ -240,6 +218,7 @@
u8 fid, vid;
struct cpufreq_freqs freqs;
union msr_fidvidstatus fidvidstatus;
+ int cfid;
/* fid are the lower 8 bits of the index we stored into
* the cpufreq frequency table in powernow_decode_bios,
@@ -251,8 +230,9 @@
freqs.cpu = 0;
+ cfid = fidvidstatus.bits.CFID;
rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
- freqs.old = fsb * fid_codes[fidvidstatus.bits.CFID] * 100;
+ freqs.old = fsb * fid_codes[cfid] * 100;
freqs.new = powernow_table[index].frequency;
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
@@ -426,7 +406,7 @@
kfree(powernow_table);
}
-MODULE_AUTHOR ("Dave Jones <davej@suse.de>");
+MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>");
MODULE_DESCRIPTION ("Powernow driver for AMD K7 processors.");
MODULE_LICENSE ("GPL");
diff -Nru a/arch/i386/kernel/cpu/cpufreq/powernow-k7.h b/arch/i386/kernel/cpu/cpufreq/powernow-k7.h
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.h Sun Aug 3 13:14:52 2003
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k7.h Sun Aug 3 13:14:52 2003
@@ -8,14 +8,6 @@
*
*/
-#ifndef MSR_K7_FID_VID_CTL
-#define MSR_K7_FID_VID_CTL 0xc0010041
-#endif
-#ifndef MSR_K7_FID_VID_STATUS
-#define MSR_K7_FID_VID_STATUS 0xc0010042
-#endif
-
-
union msr_fidvidctl {
struct {
unsigned FID:5, // 4:0
diff -Nru a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c Sun Aug 3 13:14:47 2003
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c Sun Aug 3 13:14:47 2003
@@ -156,14 +156,15 @@
};
#undef OP
-#define CPU(max) \
- { "Intel(R) Pentium(R) M processor " #max "MHz", (max)*1000, op_##max }
+#define _CPU(max, name) \
+ { "Intel(R) Pentium(R) M processor " name "MHz", (max)*1000, op_##max }
+#define CPU(max) _CPU(max, #max)
/* CPU models, their operating frequency range, and freq/voltage
operating points */
static const struct cpu_model models[] =
{
- CPU( 900),
+ _CPU( 900, " 900"),
CPU(1100),
CPU(1200),
CPU(1300),
diff -Nru a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c b/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c Sun Aug 3 13:14:44 2003
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c Sun Aug 3 13:14:44 2003
@@ -82,7 +82,7 @@
return;
freqs.old = speedstep_get_processor_frequency(speedstep_processor);
- freqs.new = speedstep_freqs[SPEEDSTEP_LOW].frequency;
+ freqs.new = speedstep_freqs[state].frequency;
freqs.cpu = 0; /* speedstep.c is UP only driver */
if (notify)
@@ -137,7 +137,7 @@
dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
if (state == (value & 0x1)) {
- dprintk (KERN_INFO "cpufreq: change to %u MHz succeeded\n", (freqs.new / 1000));
+ dprintk (KERN_INFO "cpufreq: change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
} else {
printk (KERN_ERR "cpufreq: change failed - I/O error\n");
}
@@ -295,7 +295,7 @@
return -EIO;
dprintk(KERN_INFO "cpufreq: currently at %s speed setting - %i MHz\n",
- (speed == speedstep_low_freq) ? "low" : "high",
+ (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
(speed / 1000));
/* cpuinfo and default policy values */
@@ -356,7 +356,7 @@
}
-MODULE_AUTHOR ("Dave Jones <davej@suse.de>, Dominik Brodowski <linux@brodo.de>");
+MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
MODULE_LICENSE ("GPL");
diff -Nru a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
--- a/arch/i386/kernel/nmi.c Sun Aug 3 13:14:49 2003
+++ b/arch/i386/kernel/nmi.c Sun Aug 3 13:14:49 2003
@@ -162,9 +162,15 @@
case X86_VENDOR_INTEL:
switch (boot_cpu_data.x86) {
case 6:
+ if (boot_cpu_data.x86_model > 0xd)
+ break;
+
wrmsr(MSR_P6_EVNTSEL0, 0, 0);
break;
case 15:
+ if (boot_cpu_data.x86_model > 0x3)
+ break;
+
wrmsr(MSR_P4_IQ_CCCR0, 0, 0);
wrmsr(MSR_P4_CRU_ESCR0, 0, 0);
break;
@@ -348,9 +354,15 @@
case X86_VENDOR_INTEL:
switch (boot_cpu_data.x86) {
case 6:
+ if (boot_cpu_data.x86_model > 0xd)
+ return;
+
setup_p6_watchdog();
break;
case 15:
+ if (boot_cpu_data.x86_model > 0x3)
+ return;
+
if (!setup_p4_watchdog())
return;
break;
diff -Nru a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
--- a/arch/i386/kernel/process.c Sun Aug 3 13:14:44 2003
+++ b/arch/i386/kernel/process.c Sun Aug 3 13:14:44 2003
@@ -138,12 +138,15 @@
{
/* endless idle loop with no priority at all */
while (1) {
- void (*idle)(void) = pm_idle;
- if (!idle)
- idle = default_idle;
- irq_stat[smp_processor_id()].idle_timestamp = jiffies;
- while (!need_resched())
+ while (!need_resched()) {
+ void (*idle)(void) = pm_idle;
+
+ if (!idle)
+ idle = default_idle;
+
+ irq_stat[smp_processor_id()].idle_timestamp = jiffies;
idle();
+ }
schedule();
}
}
diff -Nru a/arch/i386/mm/init.c b/arch/i386/mm/init.c
--- a/arch/i386/mm/init.c Sun Aug 3 13:14:51 2003
+++ b/arch/i386/mm/init.c Sun Aug 3 13:14:51 2003
@@ -509,20 +509,30 @@
#endif
}
-#ifdef CONFIG_X86_PAE
-struct kmem_cache_s *pae_pgd_cachep;
+kmem_cache_t *pgd_cache;
+kmem_cache_t *pmd_cache;
void __init pgtable_cache_init(void)
{
- /*
- * PAE pgds must be 16-byte aligned:
- */
- pae_pgd_cachep = kmem_cache_create("pae_pgd", 32, 0,
- SLAB_HWCACHE_ALIGN | SLAB_MUST_HWCACHE_ALIGN, NULL, NULL);
- if (!pae_pgd_cachep)
- panic("init_pae(): Cannot alloc pae_pgd SLAB cache");
+ if (PTRS_PER_PMD > 1) {
+ pmd_cache = kmem_cache_create("pmd",
+ PTRS_PER_PMD*sizeof(pmd_t),
+ 0,
+ SLAB_HWCACHE_ALIGN | SLAB_MUST_HWCACHE_ALIGN,
+ pmd_ctor,
+ NULL);
+ if (!pmd_cache)
+ panic("pgtable_cache_init(): cannot create pmd cache");
+ }
+ pgd_cache = kmem_cache_create("pgd",
+ PTRS_PER_PGD*sizeof(pgd_t),
+ 0,
+ SLAB_HWCACHE_ALIGN | SLAB_MUST_HWCACHE_ALIGN,
+ pgd_ctor,
+ PTRS_PER_PMD == 1 ? pgd_dtor : NULL);
+ if (!pgd_cache)
+ panic("pgtable_cache_init(): Cannot create pgd cache");
}
-#endif
/*
* This function cannot be __init, since exceptions don't work in that
diff -Nru a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c
--- a/arch/i386/mm/pageattr.c Sun Aug 3 13:14:47 2003
+++ b/arch/i386/mm/pageattr.c Sun Aug 3 13:14:47 2003
@@ -67,19 +67,22 @@
static void set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
{
+ struct page *page;
+ unsigned long flags;
+
set_pte_atomic(kpte, pte); /* change init_mm */
-#ifndef CONFIG_X86_PAE
- {
- struct list_head *l;
- spin_lock(&mmlist_lock);
- list_for_each(l, &init_mm.mmlist) {
- struct mm_struct *mm = list_entry(l, struct mm_struct, mmlist);
- pmd_t *pmd = pmd_offset(pgd_offset(mm, address), address);
- set_pte_atomic((pte_t *)pmd, pte);
- }
- spin_unlock(&mmlist_lock);
+ if (PTRS_PER_PMD > 1)
+ return;
+
+ spin_lock_irqsave(&pgd_lock, flags);
+ list_for_each_entry(page, &pgd_list, lru) {
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pgd = (pgd_t *)page_address(page) + pgd_index(address);
+ pmd = pmd_offset(pgd, address);
+ set_pte_atomic((pte_t *)pmd, pte);
}
-#endif
+ spin_unlock_irqrestore(&pgd_lock, flags);
}
/*
diff -Nru a/arch/i386/mm/pgtable.c b/arch/i386/mm/pgtable.c
--- a/arch/i386/mm/pgtable.c Sun Aug 3 13:14:53 2003
+++ b/arch/i386/mm/pgtable.c Sun Aug 3 13:14:53 2003
@@ -12,6 +12,7 @@
#include <linux/highmem.h>
#include <linux/slab.h>
#include <linux/pagemap.h>
+#include <linux/spinlock.h>
#include <asm/system.h>
#include <asm/pgtable.h>
@@ -151,61 +152,88 @@
return pte;
}
-#ifdef CONFIG_X86_PAE
+void pmd_ctor(void *pmd, kmem_cache_t *cache, unsigned long flags)
+{
+ memset(pmd, 0, PTRS_PER_PMD*sizeof(pmd_t));
+}
-pgd_t *pgd_alloc(struct mm_struct *mm)
+/*
+ * List of all pgd's needed for non-PAE so it can invalidate entries
+ * in both cached and uncached pgd's; not needed for PAE since the
+ * kernel pmd is shared. If PAE were not to share the pmd a similar
+ * tactic would be needed. This is essentially codepath-based locking
+ * against pageattr.c; it is the unique case in which a valid change
+ * of kernel pagetables can't be lazily synchronized by vmalloc faults.
+ * vmalloc faults work because attached pagetables are never freed.
+ * If the locking proves to be non-performant, a ticketing scheme with
+ * checks at dup_mmap(), exec(), and other mmlist addition points
+ * could be used. The locking scheme was chosen on the basis of
+ * manfred's recommendations and having no core impact whatsoever.
+ * -- wli
+ */
+spinlock_t pgd_lock = SPIN_LOCK_UNLOCKED;
+LIST_HEAD(pgd_list);
+
+void pgd_ctor(void *pgd, kmem_cache_t *cache, unsigned long unused)
{
- int i;
- pgd_t *pgd = kmem_cache_alloc(pae_pgd_cachep, GFP_KERNEL);
+ unsigned long flags;
- if (pgd) {
- for (i = 0; i < USER_PTRS_PER_PGD; i++) {
- unsigned long pmd = __get_free_page(GFP_KERNEL);
- if (!pmd)
- goto out_oom;
- clear_page(pmd);
- set_pgd(pgd + i, __pgd(1 + __pa(pmd)));
- }
- memcpy(pgd + USER_PTRS_PER_PGD,
+ if (PTRS_PER_PMD == 1)
+ spin_lock_irqsave(&pgd_lock, flags);
+
+ memcpy((pgd_t *)pgd + USER_PTRS_PER_PGD,
swapper_pg_dir + USER_PTRS_PER_PGD,
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
- }
- return pgd;
-out_oom:
- for (i--; i >= 0; i--)
- free_page((unsigned long)__va(pgd_val(pgd[i])-1));
- kmem_cache_free(pae_pgd_cachep, pgd);
- return NULL;
+
+ if (PTRS_PER_PMD > 1)
+ return;
+
+ list_add(&virt_to_page(pgd)->lru, &pgd_list);
+ spin_unlock_irqrestore(&pgd_lock, flags);
+ memset(pgd, 0, USER_PTRS_PER_PGD*sizeof(pgd_t));
}
-void pgd_free(pgd_t *pgd)
+/* never called when PTRS_PER_PMD > 1 */
+void pgd_dtor(void *pgd, kmem_cache_t *cache, unsigned long unused)
{
- int i;
+ unsigned long flags; /* can be called from interrupt context */
- for (i = 0; i < USER_PTRS_PER_PGD; i++)
- free_page((unsigned long)__va(pgd_val(pgd[i])-1));
- kmem_cache_free(pae_pgd_cachep, pgd);
+ spin_lock_irqsave(&pgd_lock, flags);
+ list_del(&virt_to_page(pgd)->lru);
+ spin_unlock_irqrestore(&pgd_lock, flags);
}
-#else
-
pgd_t *pgd_alloc(struct mm_struct *mm)
{
- pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL);
+ int i;
+ pgd_t *pgd = kmem_cache_alloc(pgd_cache, GFP_KERNEL);
- if (pgd) {
- memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
- memcpy(pgd + USER_PTRS_PER_PGD,
- swapper_pg_dir + USER_PTRS_PER_PGD,
- (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
+ if (PTRS_PER_PMD == 1 || !pgd)
+ return pgd;
+
+ for (i = 0; i < USER_PTRS_PER_PGD; ++i) {
+ pmd_t *pmd = kmem_cache_alloc(pmd_cache, GFP_KERNEL);
+ if (!pmd)
+ goto out_oom;
+ set_pgd(&pgd[i], __pgd(1 + __pa((u64)((u32)pmd))));
}
return pgd;
+
+out_oom:
+ for (i--; i >= 0; i--)
+ kmem_cache_free(pmd_cache, (void *)__va(pgd_val(pgd[i])-1));
+ kmem_cache_free(pgd_cache, pgd);
+ return NULL;
}
void pgd_free(pgd_t *pgd)
{
- free_page((unsigned long)pgd);
-}
-
-#endif /* CONFIG_X86_PAE */
+ int i;
+ /* in the PAE case user pgd entries are overwritten before usage */
+ if (PTRS_PER_PMD > 1)
+ for (i = 0; i < USER_PTRS_PER_PGD; ++i)
+ kmem_cache_free(pmd_cache, (void *)__va(pgd_val(pgd[i])-1));
+ /* in the non-PAE case, clear_page_tables() clears user pgd entries */
+ kmem_cache_free(pgd_cache, pgd);
+}
diff -Nru a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
--- a/arch/i386/pci/fixup.c Sun Aug 3 13:14:50 2003
+++ b/arch/i386/pci/fixup.c Sun Aug 3 13:14:50 2003
@@ -15,7 +15,7 @@
int pxb, reg;
u8 busno, suba, subb;
- printk(KERN_WARNING "PCI: Searching for i450NX host bridges on %s\n", d->slot_name);
+ printk(KERN_WARNING "PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
reg = 0xd0;
for(pxb=0; pxb<2; pxb++) {
pci_read_config_byte(d, reg++, &busno);
@@ -38,7 +38,7 @@
*/
u8 busno;
pci_read_config_byte(d, 0x4a, &busno);
- printk(KERN_INFO "PCI: i440KX/GX host bridge %s: secondary bus %02x\n", d->slot_name, busno);
+ printk(KERN_INFO "PCI: i440KX/GX host bridge %s: secondary bus %02x\n", pci_name(d), busno);
pci_scan_bus(busno, &pci_root_ops, NULL);
pcibios_last_bus = -1;
}
@@ -51,7 +51,7 @@
*/
int i;
- printk(KERN_WARNING "PCI: Fixing base address flags for device %s\n", d->slot_name);
+ printk(KERN_WARNING "PCI: Fixing base address flags for device %s\n", pci_name(d));
for(i=0; i<4; i++)
d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
}
@@ -63,7 +63,7 @@
* Fix class to be PCI_CLASS_STORAGE_SCSI
*/
if (!d->class) {
- printk(KERN_WARNING "PCI: fixing NCR 53C810 class code for %s\n", d->slot_name);
+ printk(KERN_WARNING "PCI: fixing NCR 53C810 class code for %s\n", pci_name(d));
d->class = PCI_CLASS_STORAGE_SCSI << 8;
}
}
@@ -77,7 +77,7 @@
*/
if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
return;
- DBG("PCI: IDE base address fixup for %s\n", d->slot_name);
+ DBG("PCI: IDE base address fixup for %s\n", pci_name(d));
for(i=0; i<4; i++) {
struct resource *r = &d->resource[i];
if ((r->start & ~0x80) == 0x374) {
@@ -95,7 +95,7 @@
* There exist PCI IDE controllers which have utter garbage
* in first four base registers. Ignore that.
*/
- DBG("PCI: IDE base address trash cleared for %s\n", d->slot_name);
+ DBG("PCI: IDE base address trash cleared for %s\n", pci_name(d));
for(i=0; i<4; i++)
d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0;
}
diff -Nru a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c
--- a/arch/i386/pci/i386.c Sun Aug 3 13:14:46 2003
+++ b/arch/i386/pci/i386.c Sun Aug 3 13:14:46 2003
@@ -112,7 +112,7 @@
continue;
pr = pci_find_parent_resource(dev, r);
if (!pr || request_resource(pr, r) < 0)
- printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, dev->slot_name);
+ printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev));
}
}
pcibios_allocate_bus_resources(&bus->children);
@@ -143,7 +143,7 @@
r->start, r->end, r->flags, disabled, pass);
pr = pci_find_parent_resource(dev, r);
if (!pr || request_resource(pr, r) < 0) {
- printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, dev->slot_name);
+ printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev));
/* We'll assign a new address later */
r->end -= r->start;
r->start = 0;
@@ -155,7 +155,7 @@
if (r->flags & PCI_ROM_ADDRESS_ENABLE) {
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
u32 reg;
- DBG("PCI: Switching off ROM of %s\n", dev->slot_name);
+ DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, ®);
pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
@@ -230,7 +230,7 @@
r = &dev->resource[idx];
if (!r->start && r->end) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -241,7 +241,7 @@
if (dev->resource[PCI_ROM_RESOURCE].start)
cmd |= PCI_COMMAND_MEMORY;
if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd);
+ printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
@@ -263,7 +263,7 @@
lat = pcibios_max_latency;
else
return;
- printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", dev->slot_name, lat);
+ printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
}
diff -Nru a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
--- a/arch/i386/pci/irq.c Sun Aug 3 13:14:53 2003
+++ b/arch/i386/pci/irq.c Sun Aug 3 13:14:53 2003
@@ -545,7 +545,7 @@
pirq_router->name,
pirq_router_dev->vendor,
pirq_router_dev->device,
- pirq_router_dev->slot_name);
+ pci_name(pirq_router_dev));
}
static struct irq_info *pirq_get_info(struct pci_dev *dev)
@@ -589,7 +589,7 @@
if (!pirq_table)
return 0;
- DBG("IRQ for %s:%d", dev->slot_name, pin);
+ DBG("IRQ for %s:%d", pci_name(dev), pin);
info = pirq_get_info(dev);
if (!info) {
DBG(" -> not found in routing table\n");
@@ -620,7 +620,7 @@
newirq = dev->irq;
if (!((1 << newirq) & mask)) {
if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
- else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, dev->slot_name);
+ else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));
}
if (!newirq && assign) {
for (i = 0; i < 16; i++) {
@@ -662,7 +662,7 @@
} else
return 0;
}
- printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, dev->slot_name);
+ printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
/* Update IRQ for all devices with the same pirq value */
while ((dev2 = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
@@ -679,13 +679,13 @@
(!(pci_probe & PCI_USE_PIRQ_MASK) || \
((1 << dev2->irq) & mask)) ) {
printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
- dev2->slot_name, dev2->irq, irq);
+ pci_name(dev2), dev2->irq, irq);
continue;
}
dev2->irq = irq;
pirq_penalty[irq]++;
if (dev != dev2)
- printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, dev2->slot_name);
+ printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
}
}
return 1;
@@ -703,7 +703,7 @@
* Also keep track of which IRQ's are already in use.
*/
if (dev->irq >= 16) {
- DBG("%s: ignoring bogus IRQ %d\n", dev->slot_name, dev->irq);
+ DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
dev->irq = 0;
}
/* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
@@ -822,7 +822,7 @@
return 0;
printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
- 'A' + pin - 1, dev->slot_name, msg);
+ 'A' + pin - 1, pci_name(dev), msg);
}
/* VIA bridges use interrupt line for apic/pci steering across
the V-Link */
diff -Nru a/arch/i386/pci/numa.c b/arch/i386/pci/numa.c
--- a/arch/i386/pci/numa.c Sun Aug 3 13:14:46 2003
+++ b/arch/i386/pci/numa.c Sun Aug 3 13:14:46 2003
@@ -86,7 +86,7 @@
u8 busno, suba, subb;
int quad = BUS2QUAD(d->bus->number);
- printk("PCI: Searching for i450NX host bridges on %s\n", d->slot_name);
+ printk("PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
reg = 0xd0;
for(pxb=0; pxb<2; pxb++) {
pci_read_config_byte(d, reg++, &busno);
diff -Nru a/arch/ia64/Kconfig b/arch/ia64/Kconfig
--- a/arch/ia64/Kconfig Sun Aug 3 13:14:52 2003
+++ b/arch/ia64/Kconfig Sun Aug 3 13:14:52 2003
@@ -609,27 +609,8 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
@@ -740,6 +721,15 @@
and restore instructions. It's useful for tracking down spinlock
problems, but slow! If you're unsure, select N.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
endmenu
source "security/Kconfig"
diff -Nru a/arch/ia64/Makefile b/arch/ia64/Makefile
--- a/arch/ia64/Makefile Sun Aug 3 13:14:44 2003
+++ b/arch/ia64/Makefile Sun Aug 3 13:14:44 2003
@@ -27,9 +27,7 @@
GAS_STATUS=$(shell arch/ia64/scripts/check-gas $(CC) $(OBJDUMP))
-arch-cppflags := $(shell arch/ia64/scripts/toolchain-flags $(CC) $(OBJDUMP))
-cflags-y += $(arch-cppflags)
-AFLAGS += $(arch-cppflags)
+CPPFLAGS += $(shell arch/ia64/scripts/toolchain-flags $(CC) $(OBJDUMP))
ifeq ($(GAS_STATUS),buggy)
$(error Sorry, you need a newer version of the assember, one that is built from \
diff -Nru a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
--- a/arch/ia64/hp/common/sba_iommu.c Sun Aug 3 13:14:45 2003
+++ b/arch/ia64/hp/common/sba_iommu.c Sun Aug 3 13:14:45 2003
@@ -1125,7 +1125,7 @@
* in the DMA stream. Allocates PDIR entries but does not fill them.
* Returns the number of DMA chunks.
*
- * Doing the fill seperate from the coalescing/allocation keeps the
+ * Doing the fill separate from the coalescing/allocation keeps the
* code simpler. Future enhancement could make one pass through
* the sglist do both.
*/
diff -Nru a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
--- a/arch/ia64/kernel/setup.c Sun Aug 3 13:14:45 2003
+++ b/arch/ia64/kernel/setup.c Sun Aug 3 13:14:45 2003
@@ -372,6 +372,7 @@
strlcpy(saved_command_line, *cmdline_p, sizeof(saved_command_line));
efi_init();
+ find_memory();
#ifdef CONFIG_ACPI_BOOT
/* Initialize the ACPI boot-time table parser */
@@ -384,8 +385,6 @@
smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
# endif
#endif /* CONFIG_APCI_BOOT */
-
- find_memory();
/* process SAL system table: */
ia64_sal_init(efi.sal_systab);
diff -Nru a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
--- a/arch/ia64/pci/pci.c Sun Aug 3 13:14:48 2003
+++ b/arch/ia64/pci/pci.c Sun Aug 3 13:14:48 2003
@@ -362,7 +362,7 @@
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because of resource collisions\n",
- dev->slot_name);
+ pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -373,7 +373,7 @@
if (dev->resource[PCI_ROM_RESOURCE].start)
cmd |= PCI_COMMAND_MEMORY;
if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd);
+ printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
@@ -388,7 +388,7 @@
if (ret < 0)
return ret;
- printk(KERN_INFO "PCI: Found IRQ %d for device %s\n", dev->irq, dev->slot_name);
+ printk(KERN_INFO "PCI: Found IRQ %d for device %s\n", dev->irq, pci_name(dev));
return acpi_pci_irq_enable(dev);
}
@@ -503,7 +503,7 @@
current_linesize = 4 * pci_linesize;
if (desired_linesize != current_linesize) {
printk(KERN_WARNING "PCI: slot %s has incorrect PCI cache line size of %lu bytes,",
- dev->slot_name, current_linesize);
+ pci_name(dev), current_linesize);
if (current_linesize > desired_linesize) {
printk(" expected %lu bytes instead\n", desired_linesize);
rc = -EINVAL;
diff -Nru a/arch/ia64/sn/io/machvec/pci.c b/arch/ia64/sn/io/machvec/pci.c
--- a/arch/ia64/sn/io/machvec/pci.c Sun Aug 3 13:14:46 2003
+++ b/arch/ia64/sn/io/machvec/pci.c Sun Aug 3 13:14:46 2003
@@ -104,7 +104,7 @@
* currently we hack this with special code in
* sgi_pci_intr_support()
*/
- DBG("pci_fixup_ioc3: Fixing base addresses for ioc3 device %s\n", d->slot_name);
+ DBG("pci_fixup_ioc3: Fixing base addresses for ioc3 device %s\n", pci_name(d));
/* I happen to know from the spec that the ioc3 needs only 0xfffff
* The standard pci trick of writing ~0 to the baddr and seeing
diff -Nru a/arch/m68k/Kconfig b/arch/m68k/Kconfig
--- a/arch/m68k/Kconfig Sun Aug 3 13:14:49 2003
+++ b/arch/m68k/Kconfig Sun Aug 3 13:14:49 2003
@@ -1199,15 +1199,7 @@
endmenu
-
-menu "Sound support"
-
-config SOUND
- tristate "Sound card support"
-
-source "sound/oss/dmasound/Kconfig"
-
-endmenu
+source "sound/Kconfig"
source "fs/Kconfig"
@@ -1240,6 +1232,15 @@
bool "Verbose BUG() reporting"
depends on DEBUG_KERNEL
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
endmenu
source "security/Kconfig"
diff -Nru a/arch/m68k/defconfig b/arch/m68k/defconfig
--- a/arch/m68k/defconfig Sun Aug 3 13:14:44 2003
+++ b/arch/m68k/defconfig Sun Aug 3 13:14:44 2003
@@ -124,7 +124,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
--- a/arch/m68knommu/Kconfig Sun Aug 3 13:14:50 2003
+++ b/arch/m68knommu/Kconfig Sun Aug 3 13:14:50 2003
@@ -560,41 +560,7 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-
-endmenu
source "drivers/usb/Kconfig"
diff -Nru a/arch/mips/Kconfig b/arch/mips/Kconfig
--- a/arch/mips/Kconfig Sun Aug 3 13:14:48 2003
+++ b/arch/mips/Kconfig Sun Aug 3 13:14:48 2003
@@ -1,17 +1,1391 @@
-#
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.txt.
-#
config MIPS
bool
default y
+config MIPS64
+ bool "64-bit kernel"
+ help
+ Select this option if you want to build a 64-bit kernel. You should
+ only select this option if you have hardware that actually has a
+ 32-bit processor and if your application will actually benefit from
+ 64-bit processing, otherwise say N. You must say Y for kernels for
+ SGI IP27 (Origin 200 and 2000). If in doubt say N.
+
config MIPS32
bool
+ depends on MIPS64 = 'n'
default y
-config MIPS64
+mainmenu "Linux/MIPS Kernel Configuration"
+
+source "init/Kconfig"
+
+menu "Machine selection"
+
+config ACER_PICA_61
+ bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ This is a machine with a R4400 133/150 MHz CPU. To compile a Linux
+ kernel that runs on these, say Y here. For details about Linux on
+ the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
+ <http://oss.sgi.com/mips/>.
+
+config BAGET_MIPS
+ bool "Support for BAGET MIPS series (EXPERIMENTAL)"
+ depends on MIPS32 && EXPERIMENTAL
+ help
+ This enables support for the Baget, a Russian embedded system. For
+ more details about the Baget see the Linux/MIPS FAQ on
+ <http://oss.sgi.com/mips/>.
+
+config CASIO_E55
+ bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
+
+config MIPS_COBALT
+ bool "Support for Cobalt Server (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+
+config DECSTATION
+ bool "Support for DECstations"
+ depends on MIPS32 || EXPERIMENTAL
+ ---help---
+ This enables support for DEC's MIPS based workstations. For details
+ see the Linux/MIPS FAQ on <http://oss.sgi.com/mips/> and the
+ DECstation porting pages on <http://decstation.unix-ag.org/>.
+
+ If you have one of the following DECstation Models you definitely
+ want to choose R4xx0 for the CPU Type:
+
+ DECstation 5000/50
+ DECstation 5000/150
+ DECstation 5000/260
+ DECsystem 5900/260
+
+ otherwise choose R3000.
+
+config MIPS_EV64120
+ bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ This is an evaluation board based on the Galileo GT-64120
+ single-chip system controller that contains a MIPS R5000 compatible
+ core running at 75/100MHz. Their website is located at
+ <http://www.galileot.com/>. Say Y here if you wish to build a
+ kernel for this platform.
+
+config EVB_PCI1
+ bool "Enable Second PCI (PCI1)"
+ depends on MIPS_EV64120
+
+if MOMENCO_OCELOT_G || MOMENCO_OCELOT
+
+config SYSCLK_100
+ bool
+ default y
+
+endif
+if MIPS_EV64120
+
+choice
+ prompt "Galileo Chip Clock"
+ default SYSCLK_83
+
+config SYSCLK_75
+ bool "75"
+
+config SYSCLK_83
+ bool "83.3"
+
+config SYSCLK_100
+ bool "100" if MIPS_EV64120
+
+endchoice
+
+endif
+
+config MIPS_EV96100
+ bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ This is an evaluation board based on the Galielo GT-96100 LAN/WAN
+ communications controllers containing a MIPS R5000 compatible core
+ running at 83MHz. Their website is <http://www.galileot.com/>. Say Y
+ here if you wish to build a kernel for this platform.
+
+config MIPS_IVR
+ bool "Support for Globespan IVR board"
+ help
+ This is an evaluation board built by Globespan to showcase thir
+ iVR (Internet Video Recorder) design. It utilizes a QED RM5231
+ R5000 MIPS core. More information can be found out their website
+ located at <http://www.globespan.net/products/product4.html>P. Say Y
+ here if you wish to build a kernel for this platform.
+
+config LASAT
+ bool "Support for LASAT Networks platforms"
+
+config PICVUE
+ tristate "PICVUE LCD display driver"
+ depends on LASAT
+
+config PICVUE_PROC
+ tristate "PICVUE LCD display driver /proc interface"
+ depends on PICVUE
+
+config DS1603
+ bool "DS1603 RTC driver"
+ depends on LASAT
+
+config LASAT_SYSCTL
+ bool "LASAT sysctl interface"
+ depends on LASAT
+
+config HP_LASERJET
+ bool "Support for Hewlett Packard LaserJet board"
+
+config IBM_WORKPAD
+ bool "Support for IBM WorkPad z50"
+
+config MIPS_ITE8172
+ bool "Support for ITE 8172G board"
+ help
+ Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
+ with ATX form factor that utilizes a MIPS R5000 to work with its
+ ITE8172G companion internet appliance chip. The MIPS core can be
+ either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
+ a kernel for this platform.
+
+config IT8172_REVC
+ bool "Support for older IT8172 (Rev C)"
+ depends on MIPS_ITE8172
+ help
+ Say Y here to support the older, Revision C version of the Integrated
+ Technology Express, Inc. ITE8172 SBC. Vendor page at
+ <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+ board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+
+config MIPS_ATLAS
+ bool "Support for MIPS Atlas board"
+ help
+ This enables support for the QED R5231-based MIPS Atlas evaluation
+ board.
+
+config MIPS_MAGNUM_4000
+ bool "Support for MIPS Magnum 4000"
+ help
+ This is a machine with a R4000 100 MHz CPU. To compile a Linux
+ kernel that runs on these, say Y here. For details about Linux on
+ the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
+ <http://oss.sgi.com/mips/>.
+
+config MIPS_MALTA
+ bool "Support for MIPS Malta board"
+ help
+ This enables support for the VR5000-based MIPS Malta evaluation
+ board.
+
+config MIPS_SEAD
+ bool "Support for MIPS SEAD board (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+
+config MOMENCO_OCELOT
+ bool "Support for Momentum Ocelot board"
+ help
+ The Ocelot is a MIPS-based Single Board Computer (SBC) made by
+ Momentum Computer <http://www.momenco.com/>.
+
+config MOMENCO_OCELOT_G
+ bool "Support for Momentum Ocelot-G board"
+ help
+ The Ocelot is a MIPS-based Single Board Computer (SBC) made by
+ Momentum Computer <http://www.momenco.com/>.
+
+config MOMENCO_OCELOT_C
+ bool "Support for Momentum Ocelot-C board"
+ help
+ The Ocelot is a MIPS-based Single Board Computer (SBC) made by
+ Momentum Computer <http://www.momenco.com/>.
+
+config DDB5074
+ bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ This enables support for the VR5000-based NEC DDB Vrc-5074
+ evaluation board.
+
+config DDB5476
+ bool "Support for NEC DDB Vrc-5476"
+ help
+ This enables support for the R5432-based NEC DDB Vrc-5476
+ evaluation board.
+
+ Features : kernel debugging, serial terminal, NFS root fs, on-board
+ ether port USB, AC97, PCI, PCI VGA card & framebuffer console,
+ IDE controller, PS2 keyboard, PS2 mouse, etc.
+
+config DDB5477
+ bool "Support for NEC DDB Vrc-5477"
+ help
+ This enables support for the R5432-based NEC DDB Vrc-5477,
+ or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
+
+ Features : kernel debugging, serial terminal, NFS root fs, on-board
+ ether port USB, AC97, PCI, etc.
+
+config DDB5477_BUS_FREQUENCY
+ int "bus frequency (in kHZ, 0 for auto-detect)"
+ depends on DDB5477
+ default 0
+
+config NEC_OSPREY
+ bool "Support for NEC Osprey board"
+
+config NEC_EAGLE
+ bool "Support for NEC Eagle/Hawk board"
+
+config OLIVETTI_M700
+ bool "Support for Olivetti M700-10"
+ help
+ This is a machine with a R4000 100 MHz CPU. To compile a Linux
+ kernel that runs on these, say Y here. For details about Linux on
+ the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
+ <http://oss.sgi.com/mips/>.
+
+config SGI_IP22
+ bool "Support for SGI IP22 (Indy/Indigo2)"
+ help
+ This are the SGI Indy, Challenge S and Indigo2, as well as certain
+ OEM variants like the Tandem CMN B006S. To compile a Linux kernel
+ that runs on these, say Y here.
+
+config SGI_IP27
+ bool "Support for SGI IP27 (Origin200/2000)"
+ depends on MIPS64
+ help
+ This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
+ workstations. To compile a Linux kernel that runs on these, say Y
+ here.
+
+#config SGI_SN0_XXL
+# bool "IP27 XXL"
+# depends on SGI_IP27
+# This options adds support for userspace processes upto 16TB size.
+# Normally the limit is just .5TB.
+
+config SGI_SN0_N_MODE
+ bool "IP27 N-Mode"
+ depends on SGI_IP27
+ help
+ The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
+ configured in either N-Modes which allows for more nodes or M-Mode
+ which allows for more memory. Your system is most probably
+ running in M-Mode, so you should say N here.
+
+config DISCONTIGMEM
+ bool "Discontiguous Memory Support"
+ depends on SGI_IP27
+ help
+ Say Y to upport efficient handling of discontiguous physical memory,
+ for architectures which are either NUMA (Non-Uniform Memory Access)
+ or have huge holes in the physical address space for other reasons.
+ See <file:Documentation/vm/numa> for more.
+
+config NUMA
+ bool "NUMA Support"
+ depends on SGI_IP27
+ help
+ Say Y to compile the kernel to support NUMA (Non-Uniform Memory
+ Access). This option is for configuring high-end multiprocessor
+ server machines. If in doubt, say N.
+
+config MAPPED_KERNEL
+ bool "Mapped kernel support"
+ depends on SGI_IP27
+ help
+ Change the way a Linux kernel is loaded unto memory on a MIPS64
+ machine. This is required in order to support text replication and
+ NUMA. If you need to undersatand it, read the source code.
+
+config REPLICATE_KTEXT
+ bool "Kernel text replication support"
+ depends on SGI_IP27
+ help
+ Say Y here to enable replicating the kernel text across multiple
+ nodes in a NUMA cluster. This trades memory for speed.
+
+config REPLICATE_EXHANDLERS
+ bool "Exception handler replication support"
+ depends on SGI_IP27
+ help
+ Say Y here to enable replicating the kernel exception handlers
+ across multiple nodes in a NUMA cluster. This trades memory for
+ speed.
+
+config SGI_IP32
+ bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ If you want this kernel to run on SGI O2 workstation, say Y here.
+
+config SOC_AU1X00
+ depends on MIPS32
+ bool "Support for AMD/Alchemy Au1X00 SOCs"
+
+choice
+ prompt "Au1X00 SOC Type"
+ depends on SOC_AU1X00
+ help
+ Say Y here to enable support for one of three AMD/Alchemy
+ SOCs. For additional documentation see www.amd.com.
+
+config SOC_AU1000
+ bool "SOC_AU1000"
+config SOC_AU1100
+ bool "SOC_AU1100"
+config SOC_AU1500
+ bool "SOC_AU1500"
+
+endchoice
+
+choice
+ prompt "AMD/Alchemy Pb1x and Db1x board support"
+ depends on SOC_AU1X00
+ help
+ These are evaluation boards built by AMD/Alchemy to
+ showcase their Au1X00 Internet Edge Processors. The SOC design
+ is based on the MIPS32 architecture running at 266/400/500MHz
+ with many integrated peripherals. Further information can be
+ found at their website, <http://www.amd.com/>. Say Y here if you
+ wish to build a kernel for this platform.
+
+config MIPS_PB1000
+ bool "PB1000 board"
+ depends on SOC_AU1000
+
+config MIPS_PB1100
+ bool "PB1100 board"
+ depends on SOC_AU1100
+
+config MIPS_PB1500
+ bool "PB1500 board"
+ depends on SOC_AU1500
+
+config MIPS_DB1000
+ bool "DB1000 board"
+ depends on SOC_AU1000
+
+config MIPS_DB1100
+ bool "DB1100 board"
+ depends on SOC_AU1100
+
+config MIPS_DB1500
+ bool "DB1500 board"
+ depends on SOC_AU1500
+
+endchoice
+
+config SIBYTE_SB1xxx_SOC
+ bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+
+choice
+ prompt "BCM1xxx SOC Type"
+ depends on SIBYTE_SB1xxx_SOC
+ default SIBYTE_SB1250
+
+config SIBYTE_SB1250
+ bool "BCM1250"
+
+endchoice
+
+config SIMULATION
+ bool "Running under simulation"
+ depends on SIBYTE_SB1xxx_SOC
+
+config SIBYTE_CFE
+ bool "Booting from CFE"
+ depends on SIBYTE_SB1xxx_SOC
+
+config SIBYTE_CFE_CONSOLE
+ bool "Use firmware console"
+ depends on SIBYTE_CFE
+
+config SIBYTE_STANDALONE
bool
+ depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
+ default y
+
+config SIBYTE_STANDALONE_RAM_SIZE
+ int "Memory size (in megabytes)"
+ depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
+ default "32"
+
+config SIBYTE_BUS_WATCHER
+ bool "Support for Bus Watcher statistics"
+ depends on SIBYTE_SB1xxx_SOC
+
+config SIBYTE_SB1250_PROF
+ bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
+ depends on SIBYTE_SB1xxx_SOC
+
+config SIBYTE_TBPROF
+ bool "Support for ZBbus profiling"
+ depends on SIBYTE_SB1xxx_SOC
+
+config SIBYTE_SWARM
+ bool "Support for SWARM board"
+ depends on SIBYTE_SB1250
+
+config SIBYTE_BOARD
+ bool
+ depends on SIBYTE_SWARM
+ default y
+
+config SNI_RM200_PCI
+ bool "Support for SNI RM200 PCI"
+ help
+ The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
+ Nixdorf Informationssysteme (SNI), parent company of Pyramid
+ Technology and now in turn merged with Fujitsu. Say Y here to
+ support this machine type.
+
+config TANBAC_TB0226
+ bool "Support for TANBAC TB0226 (Mbase)"
+ help
+ The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC.
+ Please refer to <http://www.tanbac.co.jp/> about Mbase.
+
+config TANBAC_TB0229
+ bool "Support for TANBAC TB0229 (VR4131DIMM)"
+ help
+ The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC.
+ Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
+
+config TOSHIBA_JMR3927
+ bool "Support for Toshiba JMR-TX3927 board"
+ depends on MIPS32
+
+config TOSHIBA_RBTX4927
+ bool "Support for Toshiba TBTX49[23]7 board"
+ depends on MIPS32
+
+config VICTOR_MPC30X
+ bool "Support for Victor MP-C303/304"
+
+config ZAO_CAPCELLA
+ bool "Support for ZAO Networks Capcella"
+
+config RWSEM_GENERIC_SPINLOCK
+ bool
+ default y
+
+config RWSEM_XCHGADD_ALGORITHM
+ bool
+
+#
+# Select some configuration options automatically based on user selections.
+#
+config ARC
+ bool
+ depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
+ default y
+
+config GENERIC_ISA_DMA
+ bool
+ depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
+ default y
+
+config CONFIG_GT64120
+ bool
+ depends on MIPS_EV64120 || MOMENCO_OCELOT
+ default y
+
+config I8259
+ bool
+ depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_COBALT || ACER_PICA_61
+ default y
+
+config MIPS_JAZZ
+ bool
+ depends on MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
+ default y
+
+config NONCOHERENT_IO
+ bool
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
+ default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
+ default n if (SIBYTE_SB1250 || SGI_IP27)
+
+config CPU_LITTLE_ENDIAN
+ bool "Generate little endian code"
+ default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_OSPREY || NEC_EAGLE || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
+ default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
+ help
+ Some MIPS machines can be configured for either little or big endian
+ byte order. These modes require different kernels. Say Y if your
+ machine is little endian, N if it's a big endian machine.
+
+config IRQ_CPU
+ bool
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || IBM_WORKPAD || HP_LASERJET || DECSTATION || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ default y
+
+config VR41XX_TIME_C
+ bool
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || NEC_EAGLE || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ default y
+
+config DUMMY_KEYB
+ bool
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1250 || NEC_EAGLE || NEC_OSPREY || DDB5477 || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ default y
+
+config VR41XX_COMMON
+ bool
+ depends on NEC_EAGLE || ZAO_CAPCELLA || VICTOR_MPC30X || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ default y
+
+config VRC4173
+ tristate "NEC VRC4173 Support"
+ depends on NEC_EAGLE || VICTOR_MPC30X
+
+config DDB5XXX_COMMON
+ bool
+ depends on DDB5074 || DDB5476 || DDB5477
+ default y
+
+config MIPS_BOARDS_GEN
+ bool
+ depends on MIPS_ATLAS || MIPS_MALTA || MIPS_SEAD
+ default y
+
+config ITE_BOARD_GEN
+ bool
+ depends on MIPS_IVR || MIPS_ITE8172
+ default y
+
+config NEW_PCI
+ bool
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || TANBAC_TB0226 || TANBAC_TB0229
+ default y
+
+config SWAP_IO_SPACE
+ bool "Support for paging of anonymous memory"
+ depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1250 || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
+ default y
+ help
+ This option allows you to choose whether you want to have support
+ for socalled swap devices or swap files in your kernel that are
+ used to provide more virtual memory than the actual RAM present
+ in your computer. If unusre say Y.
+
+config SIBYTE_HAS_LDT
+ bool
+ depends on SIBYTE_SB1xxx_SOC && PCI
+ default y
+
+config AU1000_USB_DEVICE
+ bool
+ depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
default n
-source "arch/mips/Kconfig-shared"
+config COBALT_LCD
+ bool
+ depends on MIPS_COBALT
+ default y
+
+config MIPS_GT64120
+ bool
+ depends on MIPS_EV64120
+ default y
+
+config MIPS_GT96100
+ bool
+ depends on MIPS_EV96100
+ default y
+ help
+ Say Y here to support the Galileo Technology GT96100 communications
+ controller card. There is a web page at <http://www.galileot.com/>.
+
+config IT8172_CIR
+ bool
+ depends on MIPS_ITE8172 || MIPS_IVR
+ default y
+
+config IT8712
+ bool
+ depends on MIPS_ITE8172
+ default y
+
+config BOOT_ELF32
+ bool
+ depends on DECSTATION || MIPS_ATLAS || MIPS_MALTA || SIBYTE_SB1250 || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
+ default y
+
+config L1_CACHE_SHIFT
+ int
+ default "4" if DECSTATION
+ default "5" if SGI_IP32 || SGI_IP22 || MIPS_SEAD || MIPS_MALTA || MIPS_ATLAS
+ default "7" if SGI_IP27
+
+config ARC32
+ bool
+ depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700
+ default y
+
+config FB
+ bool
+ depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
+ default y
+ ---help---
+ The frame buffer device provides an abstraction for the graphics
+ hardware. It represents the frame buffer of some video hardware and
+ allows application software to access the graphics hardware through
+ a well-defined interface, so the software doesn't need to know
+ anything about the low-level (hardware register) stuff.
+
+ Frame buffer devices work identically across the different
+ architectures supported by Linux and make the implementation of
+ application programs easier and more portable; at this point, an X
+ server exists which uses the frame buffer device exclusively.
+ On several non-X86 architectures, the frame buffer device is the
+ only way to use the graphics hardware.
+
+ The device is accessed through special device nodes, usually located
+ in the /dev directory, i.e. /dev/fb*.
+
+ You need an utility program called fbset to make full use of frame
+ buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
+ and the Framebuffer-HOWTO at
+ <http://www.tahallah.demon.co.uk/programming/prog.html> for more
+ information.
+
+ Say Y here and to the driver for your graphics board below if you
+ are compiling a kernel for a non-x86 architecture.
+
+ If you are compiling for the x86 architecture, you can say Y if you
+ want to play with it, but it is not essential. Please note that
+ running graphical applications that directly touch the hardware
+ (e.g. an accelerated X server) and that are not frame buffer
+ device-aware may cause unexpected results. If unsure, say N.
+
+config FB_G364
+ bool
+ depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
+ default y
+
+config HAVE_STD_PC_SERIAL_PORT
+ bool
+ depends on DDB5476 || DDB5074 || MIPS_MALTA
+ default y
+
+config VR4181
+ bool
+ depends on NEC_OSPREY
+ default y
+
+config ARC_CONSOLE
+ bool "ARC console support"
+ depends on SGI_IP22 || SNI_RM200_PCI
+
+config ARC_MEMORY
+ bool
+ depends on SNI_RM200_PCI || SGI_IP32
+ default y
+
+config ARC_PROMLIB
+ bool
+ depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22
+ default y
+
+config BOARD_SCACHE
+ bool
+ depends on MIPS_EV96100 || MOMENCO_OCELOT || SGI_IP22
+ default y
+
+config ARC64
+ bool
+ depends on SGI_IP27
+ default y
+
+config BOOT_ELF64
+ bool
+ depends on SGI_IP27
+ default y
+
+#config MAPPED_PCI_IO y
+# bool
+# depends on SGI_IP27
+# default y
+
+config QL_ISP_A64
+ bool
+ depends on SGI_IP27
+ default y
+
+config TOSHIBA_BOARDS
+ bool
+ depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
+ default y
+
+config TANBAC_TB0219
+ bool "Added TANBAC TB0219 Base board support"
+ depends on TANBAC_TB0229
+
+endmenu
+
+
+menu "CPU selection"
+
+choice
+ prompt "CPU type"
+ default CPU_R4X00
+
+config CPU_MIPS32
+ bool "MIPS32"
+
+config CPU_MIPS64
+ bool "MIPS64"
+
+config CPU_R3000
+ bool "R3000"
+ depends on MIPS32
+ help
+ Please make sure to pick the right CPU type. Linux/MIPS is not
+ designed to be generic, i.e. Kernels compiled for R3000 CPUs will
+ *not* work on R4000 machines and vice versa. However, since most
+ of the supported machines have an R4000 (or similar) CPU, R4x00
+ might be a safe bet. If the resulting kernel does not work,
+ try to recompile with R3000.
+
+config CPU_TX39XX
+ bool "R39XX"
+ depends on MIPS32
+
+config CPU_VR41XX
+ bool "R41xx"
+ help
+ The options selects support for the NEC VR41xx series of processors.
+ Only choose this option if you have one of these processors as a
+ kernel built with this option will not run on any other type of
+ processor or vice versa.
+
+config CPU_R4300
+ bool "R4300"
+ help
+ MIPS Technologies R4300-series processors.
+
+config CPU_R4X00
+ bool "R4x00"
+ help
+ MIPS Technologies R4000-series processors other than 4300, including
+ the R4000, R4400, R4600, and 4700.
+
+config CPU_TX49XX
+ bool "R49XX"
+
+config CPU_R5000
+ bool "R5000"
+ help
+ MIPS Technologies R5000-series processors other than the Nevada.
+
+config CPU_R5432
+ bool "R5432"
+
+config CPU_R6000
+ bool "R6000"
+ depends on MIPS32 && EXPERIMENTAL
+ help
+ MIPS Technologies R6000 and R6000A series processors. Note these
+ processors are extremly rare and the support for them is incomplete.
+
+config CPU_NEVADA
+ bool "R52xx"
+ help
+ MIPS Technologies R52x0-series ("Nevada") processors.
+
+config CPU_R8000
+ bool "R8000"
+ depends on MIPS64 && EXPERIMENTAL
+ help
+ MIPS Technologies R8000 processors. Note these processors are
+ uncommon and the support for them is incomplete.
+
+config CPU_R10000
+ bool "R10000"
+ help
+ MIPS Technologies R10000-series processors.
+
+config CPU_RM7000
+ bool "RM7000"
+
+config CPU_SB1
+ bool "SB1"
+
+endchoice
+
+config R5000_CPU_SCACHE
+ bool
+ depends on CPU_NEVADA || CPU_R5000
+ default y if SGI_IP22 || SGI_IP32 || LASAT
+
+config BOARD_SCACHE
+ bool
+ depends on CPU_NEVADA || CPU_R4X00 || CPU_R5000
+ default y if SGI_IP22 || (SGI_IP32 && CPU_R5000) || R5000_CPU_SCACHE
+
+config SIBYTE_DMA_PAGEOPS
+ bool "Use DMA to clear/copy pages"
+ depends on CPU_SB1
+ help
+ Instead of using the CPU to zero and copy pages, use a Data Mover
+ channel. These DMA channels are otherwise unused by the standard
+ SiByte Linux port. Seems to give a small performance benefit.
+
+config CPU_HAS_PREFETCH
+ bool "Enable prefetches" if CPU_SB1 && !CPU_SB1_PASS_2
+ default y if CPU_RM7000 || CPU_MIPS64 || CPU_MIPS32
+
+config VTAG_ICACHE
+ bool "Support for Virtual Tagged I-cache" if CPU_MIPS64 || CPU_MIPS32
+ default y if CPU_SB1
+
+choice
+ prompt "SB1 Pass"
+ depends on CPU_SB1
+ default CPU_SB1_PASS_1
+
+config CPU_SB1_PASS_1
+ bool "Pass1"
+
+config CPU_SB1_PASS_2
+ bool "Pass2"
+
+config CPU_SB1_PASS_2_2
+ bool "Pass2.2"
+
+endchoice
+
+config SB1_PASS_1_WORKAROUNDS
+ bool
+ depends on CPU_SB1_PASS_1
+ default y
+
+config SB1_PASS_2_WORKAROUNDS
+ bool
+ depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
+ default y
+
+# Avoid prefetches on Pass 2 (before 2.2)
+# XXXKW for now, let 2.2 use same WORKAROUNDS flag as pre-2.2
+config SB1_CACHE_ERROR
+ bool "Support for SB1 Cache Error handler"
+ depends on CPU_SB1
+
+config SB1_CERR_IGNORE_RECOVERABLE
+ bool "Ignore recoverable cache errors"
+ depends on SB1_CACHE_ERROR
+
+config SB1_CERR_SPIN
+ bool "Spin instead of running handler"
+ depends on SB1_CACHE_ERROR
+
+config 64BIT_PHYS_ADDR
+ bool "Support for 64-bit physical address space"
+ depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32
+
+config CPU_ADVANCED
+ bool "Override CPU Options"
+ depends on MIPS32
+ help
+ Saying yes here allows you to select support for various features
+ your CPU may or may not have. Most people should say N here.
+
+config CPU_HAS_LLSC
+ bool "ll/sc Instructions available" if CPU_ADVANCED
+ default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX
+ help
+ MIPS R4000 series and later provide the Load Linked (ll)
+ and Store Conditional (sc) instructions. More information is
+ available at <http://www.go-ecs.com/mips/miptek1.htm>.
+
+ Say Y here if your CPU has the ll and sc instructions. Say Y here
+ for better performance, N if you don't know. You must say Y here
+ for multiprocessor machines.
+
+config CPU_HAS_LLDSCD
+ bool "lld/scd Instructions available" if CPU_ADVANCED
+ default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32
+ help
+ Say Y here if your CPU has the lld and scd instructions, the 64-bit
+ equivalents of ll and sc. Say Y here for better performance, N if
+ you don't know. You must say Y here for multiprocessor machines.
+
+config CPU_HAS_WB
+ bool "Writeback Buffer available" if CPU_ADVANCED
+ default y if !CPU_ADVANCED && (CPU_R3000 || CPU_VR41XX || CPU_TX39XX) && DECSTATION
+ help
+ Say N here for slightly better performance. You must say Y here for
+ machines which require flushing of write buffers in software. Saying
+ Y is the safe option; N may result in kernel malfunction and crashes.
+
+config CPU_HAS_SYNC
+ bool
+ depends on !CPU_R3000
+ default y
+
+#
+# - Highmem only makes sense for the 32-bit kernel.
+# - The current highmem code will only work properly on physically indexed
+# caches such as R3000, SB1, R7000 or those that look like they're virtually
+# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
+# moment we protect the user and offer the highmem option only on machines
+# where it's known to be safe. This will not offer highmem on a few systems
+# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
+# indexed CPUs but we're playing safe.
+# - We should not offer highmem for system of which we already know that they
+# don't have memory configurations that could gain from highmem support in
+# the kernel because they don't support configurations with RAM at physical
+# addresses > 0x20000000.
+#
+config HIGHMEM
+ bool "High Memory Support"
+ depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_R10000) && !(BAGET_MIPS || DECSTATION)
+
+config SMP
+ bool "Multi-Processing support"
+ depends on SIBYTE_SB1xxx_SOC && SIBYTE_SB1250 && !SIBYTE_STANDALONE || SGI_IP27
+ ---help---
+ This enables support for systems with more than one CPU. If you have
+ a system with only one CPU, like most personal computers, say N. If
+ you have a system with more than one CPU, say Y.
+
+ If you say N here, the kernel will run on single and multiprocessor
+ machines, but will use only one CPU of a multiprocessor machine. If
+ you say Y here, the kernel will run on many, but not all,
+ singleprocessor machines. On a singleprocessor machine, the kernel
+ will run faster if you say N here.
+
+ People using multiprocessor machines who say Y here should also say
+ Y to "Enhanced Real Time Clock Support", below.
+
+ See also the <file:Documentation/smp.tex>,
+ <file:Documentation/smp.txt> and the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
+
+ If you don't know what to do here, say N.
+
+config NR_CPUS
+ int "Maximum number of CPUs (2-32)"
+ depends on SMP
+ default "32"
+ help
+ This allows you to specify the maximum number of CPUs which this
+ kernel will support. The maximum supported value is 32 and the
+ minimum value which makes sense is 2.
+
+ This is purely to save memory - each supported CPU adds
+ approximately eight kilobytes to the kernel image.
+
+config PREEMPT
+ bool "Preemptible Kernel"
+ help
+ This option reduces the latency of the kernel when reacting to
+ real-time or interactive events by allowing a low priority process to
+ be preempted even if it is in kernel mode executing a system call.
+ This allows applications to run more reliably even when the system is
+ under load.
+
+config DEBUG_SPINLOCK_SLEEP
+ bool "Sleep-inside-spinlock checking"
+ help
+ If you say Y here, various routines which may sleep will become very
+ noisy if they are called with a spinlock held.
+
+config RTC_DS1742
+ bool "DS1742 BRAM/RTC support"
+ depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
+
+config MIPS_INSANE_LARGE
+ bool "Support for large 64-bit configurations"
+ depends on CPU_R10000 && MIPS64
+ help
+ MIPS R10000 does support a 44 bit / 16TB address space as opposed to
+ previous 64-bit processors which only supported 40 bit / 1TB. If you
+ need processes of more than 1TB virtual address space, say Y here.
+ This will result in additional memory usage, so it is not
+ recommended for normal users.
+
+config RWSEM_GENERIC_SPINLOCK
+ bool
+ default y
+
+endmenu
+
+menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
+
+config PCI
+ bool "Support for PCI controller"
+ depends on MIPS_DB1000 || DDB5074 || DDB5476 || DDB5477 || HP_LASERJET || LASAT || MIPS_IVR || MIPS_ATLAS || MIPS_COBALT || MIPS_EV64120 || MIPS_EV96100 || MIPS_ITE8172 || MIPS_MALTA || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_EAGLE || SGI_IP27 || SGI_IP32 || SIBYTE_SB1250 || SNI_RM200_PCI || TANBAC_TB0226 || TANBAC_TB0229 || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || VICTOR_MPC30X || ZAO_CAPCELLA
+ help
+ Find out whether you have a PCI motherboard. PCI is the name of a
+ bus system, i.e. the way the CPU talks to the other stuff inside
+ your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
+ say Y, otherwise N.
+
+ The PCI-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>, contains valuable
+ information about which PCI hardware does work under Linux and which
+ doesn't.
+
+source "drivers/pci/Kconfig"
+
+config ISA
+ bool "ISA bus support"
+ depends on ACER_PICA_61 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI
+ default y if TOSHIBA_RBTX4927 || DDB5476 || DDB5074 || IBM_WORKPAD || CASIO_E55
+ help
+ Find out whether you have ISA slots on your motherboard. ISA is the
+ name of a bus system, i.e. the way the CPU talks to the other stuff
+ inside your box. Other bus systems are PCI, EISA, or VESA. ISA is
+ an older system, now being displaced by PCI; newer boards don't
+ support it. If you have ISA, say Y, otherwise N.
+
+#
+# The SCSI bits are needed to get the SCSI code to link ...
+#
+config GENERIC_ISA_DMA
+ bool
+ default y if ACER_PICA_61 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI || SCSI
+
+config EISA
+ bool "EISA support"
+ depends on ISA && (SGI_IP22 || SNI_RM200_PCI)
+ ---help---
+ The Extended Industry Standard Architecture (EISA) bus was
+ developed as an open alternative to the IBM MicroChannel bus.
+
+ The EISA bus provided some of the features of the IBM MicroChannel
+ bus while maintaining backward compatibility with cards made for
+ the older ISA bus. The EISA bus saw limited use between 1988 and
+ 1995 when it was made obsolete by the PCI bus.
+
+ Say Y here if you are building a kernel for an EISA-based machine.
+
+ Otherwise, say N.
+
+source "drivers/eisa/Kconfig"
+
+config TC
+ bool "TURBOchannel support"
+ depends on DECSTATION
+ help
+ TurboChannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
+ processors. Documentation on writing device drivers for TurboChannel
+ is available at:
+ <http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/AA-PS3HD-TET1_html/TITLE.html>.
+
+#config ACCESSBUS
+# bool "Access.Bus support"
+# depends on TC
+
+config MMU
+ bool
+ default y
+
+config MCA
+ bool
+
+config SBUS
+ bool
+
+config HOTPLUG
+ bool "Support for hot-pluggable devices"
+ ---help---
+ Say Y here if you want to plug devices into your computer while
+ the system is running, and be able to use them quickly. In many
+ cases, the devices can likewise be unplugged at any time too.
+
+ One well known example of this is PCMCIA- or PC-cards, credit-card
+ size devices such as network cards, modems or hard drives which are
+ plugged into slots found on all modern laptop computers. Another
+ example, used on modern desktops as well as laptops, is USB.
+
+ Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
+ software (at <http://linux-hotplug.sourceforge.net/>) and install it.
+ Then your kernel will automatically call out to a user mode "policy
+ agent" (/sbin/hotplug) to load modules and set up software needed
+ to use devices as you hotplug them.
+
+source "drivers/pcmcia/Kconfig"
+
+source "drivers/pci/hotplug/Kconfig"
+
+endmenu
+
+menu "Executable file formats"
+
+config KCORE_ELF
+ bool
+ default y
+ ---help---
+ If you enabled support for /proc file system then the file
+ /proc/kcore will contain the kernel core image. This can be used
+ in gdb:
+
+ $ cd /usr/src/linux ; gdb vmlinux /proc/kcore
+
+ You have two choices here: ELF and A.OUT. Selecting ELF will make
+ /proc/kcore appear in ELF core format as defined by the Executable
+ and Linking Format specification. Selecting A.OUT will choose the
+ old "a.out" format which may be necessary for some old versions
+ of binutils or on some architectures.
+
+ This is especially useful if you have compiled the kernel with the
+ "-g" option to preserve debugging information. It is mainly used
+ for examining kernel data structures on the live kernel so if you
+ don't understand what this means or are not a kernel hacker, just
+ leave it at its default value ELF.
+
+config KCORE_AOUT
+ bool
+
+source "fs/Kconfig.binfmt"
+
+config TRAD_SIGNALS
+ bool
+ default y if MIPS32
+
+config BINFMT_IRIX
+ bool "Include IRIX binary compatibility"
+ depends on !CPU_LITTLE_ENDIAN && MIPS32
+
+config MIPS32_COMPAT
+ bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
+ depends on MIPS64
+ help
+ Select this option if you want Linux/MIPS 32-bit binary
+ compatibility. Since all software available for Linux/MIPS is
+ currently 32-bit you should say Y here.
+
+config COMPAT
+ bool
+ depends on MIPS32_COMPAT
+ default y
+
+config MIPS32_O32
+ bool "Kernel support for o32 binaries"
+ depends on MIPS32_COMPAT
+ help
+ Select this option if you want to run o32 binaries. These are pure
+ 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
+ existing binaries are in this format.
+
+ If unsure, say Y.
+
+config MIPS32_N32
+ bool "Kernel support for n32 binaries"
+ depends on MIPS32_COMPAT
+ help
+ Select this option if you want to run n32 binaries. These are
+ 64-bit binaries using 32-bit quantities for addressing and certain
+ data that would normally be 64-bit. They are used in special
+ cases.
+
+ If unsure, say N.
+
+config BINFMT_ELF32
+ bool
+ default y if MIPS32_O32 || MIPS32_N32
+
+config PM
+ bool "Power Management support (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && SOC_AU1X00
+
+endmenu
+
+source "drivers/mtd/Kconfig"
+
+source "drivers/parport/Kconfig"
+
+source "drivers/pnp/Kconfig"
+
+source "drivers/base/Kconfig"
+
+source "drivers/block/Kconfig"
+
+
+menu "MIPS initrd options"
+ depends on BLK_DEV_INITRD
+
+config EMBEDDED_RAMDISK
+ bool "Embed root filesystem ramdisk into the kernel"
+
+config EMBEDDED_RAMDISK_IMAGE
+ string "Filename of gziped ramdisk image"
+ depends on EMBEDDED_RAMDISK
+ default "ramdisk.gz"
+ help
+ This is the filename of the ramdisk image to be built into the
+ kernel. Relative pathnames are relative to arch/mips/ramdisk/.
+ The ramdisk image is not part of the kernel distribution; you must
+ provide one yourself.
+
+endmenu
+
+source "drivers/ide/Kconfig"
+
+source "drivers/scsi/Kconfig"
+
+source "drivers/cdrom/Kconfig"
+
+source "drivers/md/Kconfig"
+
+source "drivers/message/fusion/Kconfig"
+
+source "drivers/ieee1394/Kconfig"
+
+source "drivers/message/i2o/Kconfig"
+
+source "net/Kconfig"
+
+source "net/ax25/Kconfig"
+
+source "net/irda/Kconfig"
+
+source "drivers/isdn/Kconfig"
+
+source "drivers/telephony/Kconfig"
+
+#
+# input before char - char/joystick depends on it. As does USB.
+#
+source "drivers/input/Kconfig"
+
+source "drivers/char/Kconfig"
+
+#source drivers/misc/Config.in
+
+source "drivers/media/Kconfig"
+
+source "fs/Kconfig"
+
+source "drivers/video/Kconfig"
+
+
+menu "Sound"
+
+config SOUND
+ tristate "Sound card support"
+ ---help---
+ If you have a sound card in your computer, i.e. if it can say more
+ than an occasional beep, say Y. Be sure to have all the information
+ about your sound card and its configuration down (I/O port,
+ interrupt and DMA channel), because you will be asked for it.
+
+ You want to read the Sound-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>. General information about
+ the modular sound system is contained in the files
+ <file:Documentation/sound/Introduction>. The file
+ <file:Documentation/sound/README.OSS> contains some slightly
+ outdated but still useful information as well.
+
+ If you have a PnP sound card and you want to configure it at boot
+ time using the ISA PnP tools (read
+ <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
+ compile the sound card support as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want)
+ and load that module after the PnP configuration is finished. To do
+ this, say M here and read <file:Documentation/modules.txt> as well
+ as <file:Documentation/sound/README.modules>; the module will be
+ called soundcore.
+
+ I'm told that even without a sound card, you can make your computer
+ say more than an occasional beep, by programming the PC speaker.
+ Kernel patches and supporting utilities to do that are in the pcsp
+ package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
+
+source "sound/Kconfig"
+
+endmenu
+
+source "drivers/usb/Kconfig"
+
+source "net/bluetooth/Kconfig"
+
+
+menu "Kernel hacking"
+
+config CROSSCOMPILE
+ bool "Are you using a crosscompiler"
+ help
+ Say Y here if you are compiling the kernel on a different
+ architecture than the one it is intended to run on.
+
+config DEBUG_KERNEL
+ bool "Kernel debugging"
+
+config KGDB
+ bool "Remote GDB kernel debugging"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here, it will be possible to remotely debug the MIPS
+ kernel using gdb. This enlarges your kernel image disk size by
+ several megabytes and requires a machine with more than 16 MB,
+ better 32 MB RAM to avoid excessive linking time. This is only
+ useful for kernel hackers. If unsure, say N.
+
+config GDB_CONSOLE
+ bool "Console output to GDB"
+ depends on KGDB
+ help
+ If you are using GDB for remote debugging over a serial port and
+ would like kernel messages to be formatted into GDB $O packets so
+ that GDB prints them as program output, say 'Y'.
+
+config RUNTIME_DEBUG
+ bool "Enable run-time debugging"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here, some debugging macros will do run-time checking.
+ If you say N here, those macros will mostly turn to no-ops. See
+ include/asm-mips/debug.h for debuging macros.
+ If unsure, say N.
+
+
+config MAGIC_SYSRQ
+ bool "Magic SysRq key"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here, you will have some control over the system even
+ if the system crashes for example during kernel debugging (e.g., you
+ will be able to flush the buffer cache to disk, reboot the system
+ immediately or dump some status information). This is accomplished
+ by pressing various keys while holding SysRq (Alt+PrintScreen). It
+ also works on a serial console (on PC hardware at least), if you
+ send a BREAK and then within 5 seconds a command keypress. The
+ keys are documented in <file:Documentation/sysrq.txt>. Don't say Y
+ unless you really know what this hack does.
+
+config MIPS_UNCACHED
+ bool "Run uncached"
+ depends on DEBUG_KERNEL && !SMP && !SGI_IP27
+ help
+ If you say Y here there kernel will disable all CPU caches. This will
+ reduce the system's performance dramatically but can help finding
+ otherwise hard to track bugs. It can also useful if you're doing
+ hardware debugging with a logic analyzer and need to see all traffic
+ on the bus.
+
+config DEBUG_HIGHMEM
+ bool "Highmem debugging"
+ depends on DEBUG_KERNEL && HIGHMEM
+
+endmenu
+
+source "security/Kconfig"
+
+source "crypto/Kconfig"
+
+source "lib/Kconfig"
diff -Nru a/arch/mips/Kconfig-shared b/arch/mips/Kconfig-shared
--- a/arch/mips/Kconfig-shared Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1371 +0,0 @@
-mainmenu "Linux/MIPS Kernel Configuration"
-
-source "init/Kconfig"
-
-menu "Machine selection"
-
-config ACER_PICA_61
- bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- This is a machine with a R4400 133/150 MHz CPU. To compile a Linux
- kernel that runs on these, say Y here. For details about Linux on
- the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
- <http://oss.sgi.com/mips/>.
-
-config BAGET_MIPS
- bool "Support for BAGET MIPS series (EXPERIMENTAL)"
- depends on MIPS32 && EXPERIMENTAL
- help
- This enables support for the Baget, a Russian embedded system. For
- more details about the Baget see the Linux/MIPS FAQ on
- <http://oss.sgi.com/mips/>.
-
-config CASIO_E55
- bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
-
-config MIPS_COBALT
- bool "Support for Cobalt Server (EXPERIMENTAL)"
- depends on EXPERIMENTAL
-
-config DECSTATION
- bool "Support for DECstations"
- depends on MIPS32 || EXPERIMENTAL
- ---help---
- This enables support for DEC's MIPS based workstations. For details
- see the Linux/MIPS FAQ on <http://oss.sgi.com/mips/> and the
- DECstation porting pages on <http://decstation.unix-ag.org/>.
-
- If you have one of the following DECstation Models you definitely
- want to choose R4xx0 for the CPU Type:
-
- DECstation 5000/50
- DECstation 5000/150
- DECstation 5000/260
- DECsystem 5900/260
-
- otherwise choose R3000.
-
-config MIPS_EV64120
- bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- This is an evaluation board based on the Galileo GT-64120
- single-chip system controller that contains a MIPS R5000 compatible
- core running at 75/100MHz. Their website is located at
- <http://www.galileot.com/>. Say Y here if you wish to build a
- kernel for this platform.
-
-config EVB_PCI1
- bool "Enable Second PCI (PCI1)"
- depends on MIPS_EV64120
-
-if MOMENCO_OCELOT_G || MOMENCO_OCELOT
-
-config SYSCLK_100
- bool
- default y
-
-endif
-if MIPS_EV64120
-
-choice
- prompt "Galileo Chip Clock"
- default SYSCLK_83
-
-config SYSCLK_75
- bool "75"
-
-config SYSCLK_83
- bool "83.3"
-
-config SYSCLK_100
- bool "100" if MIPS_EV64120
-
-endchoice
-
-endif
-
-config MIPS_EV96100
- bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- This is an evaluation board based on the Galielo GT-96100 LAN/WAN
- communications controllers containing a MIPS R5000 compatible core
- running at 83MHz. Their website is <http://www.galileot.com/>. Say Y
- here if you wish to build a kernel for this platform.
-
-config MIPS_IVR
- bool "Support for Globespan IVR board"
- help
- This is an evaluation board built by Globespan to showcase thir
- iVR (Internet Video Recorder) design. It utilizes a QED RM5231
- R5000 MIPS core. More information can be found out their website
- located at <http://www.globespan.net/products/product4.html>P. Say Y
- here if you wish to build a kernel for this platform.
-
-config LASAT
- bool "Support for LASAT Networks platforms"
-
-config LASAT_100
- bool "Support for LASAT Networks 100 series"
- depends on LASAT
-
-config LASAT_200
- bool "Support for LASAT Networks 200 series"
- depends on LASAT
-
-config PICVUE
- tristate "PICVUE LCD display driver"
- depends on LASAT
-
-config PICVUE_PROC
- tristate "PICVUE LCD display driver /proc interface"
- depends on PICVUE
-
-config DS1603
- bool "DS1603 RTC driver"
- depends on LASAT
-
-config LASAT_SYSCTL
- bool "LASAT sysctl interface"
- depends on LASAT
-
-config HP_LASERJET
- bool "Support for Hewlett Packard LaserJet board"
-
-config IBM_WORKPAD
- bool "Support for IBM WorkPad z50"
-
-config MIPS_ITE8172
- bool "Support for ITE 8172G board"
- help
- Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
- with ATX form factor that utilizes a MIPS R5000 to work with its
- ITE8172G companion internet appliance chip. The MIPS core can be
- either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
- a kernel for this platform.
-
-config IT8172_REVC
- bool "Support for older IT8172 (Rev C)"
- depends on MIPS_ITE8172
- help
- Say Y here to support the older, Revision C version of the Integrated
- Technology Express, Inc. ITE8172 SBC. Vendor page at
- <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
- board at <http://www.mvista.com/allies/semiconductor/ite.html>.
-
-config MIPS_ATLAS
- bool "Support for MIPS Atlas board"
- help
- This enables support for the QED R5231-based MIPS Atlas evaluation
- board.
-
-config MIPS_MAGNUM_4000
- bool "Support for MIPS Magnum 4000"
- help
- This is a machine with a R4000 100 MHz CPU. To compile a Linux
- kernel that runs on these, say Y here. For details about Linux on
- the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
- <http://oss.sgi.com/mips/>.
-
-config MIPS_MALTA
- bool "Support for MIPS Malta board"
- help
- This enables support for the VR5000-based MIPS Malta evaluation
- board.
-
-config MIPS_SEAD
- bool "Support for MIPS SEAD board (EXPERIMENTAL)"
- depends on EXPERIMENTAL
-
-config MOMENCO_OCELOT
- bool "Support for Momentum Ocelot board"
- help
- The Ocelot is a MIPS-based Single Board Computer (SBC) made by
- Momentum Computer <http://www.momenco.com/>.
-
-config MOMENCO_OCELOT_G
- bool "Support for Momentum Ocelot-G board"
- help
- The Ocelot is a MIPS-based Single Board Computer (SBC) made by
- Momentum Computer <http://www.momenco.com/>.
-
-config MOMENCO_OCELOT_C
- bool "Support for Momentum Ocelot-C board"
- help
- The Ocelot is a MIPS-based Single Board Computer (SBC) made by
- Momentum Computer <http://www.momenco.com/>.
-
-config DDB5074
- bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- This enables support for the VR5000-based NEC DDB Vrc-5074
- evaluation board.
-
-config DDB5476
- bool "Support for NEC DDB Vrc-5476"
- help
- This enables support for the R5432-based NEC DDB Vrc-5476
- evaluation board.
-
- Features : kernel debugging, serial terminal, NFS root fs, on-board
- ether port USB, AC97, PCI, PCI VGA card & framebuffer console,
- IDE controller, PS2 keyboard, PS2 mouse, etc.
-
-config DDB5477
- bool "Support for NEC DDB Vrc-5477"
- help
- This enables support for the R5432-based NEC DDB Vrc-5477,
- or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
-
- Features : kernel debugging, serial terminal, NFS root fs, on-board
- ether port USB, AC97, PCI, etc.
-
-config DDB5477_BUS_FREQUENCY
- int "bus frequency (in kHZ, 0 for auto-detect)"
- depends on DDB5477
- default 0
-
-config NEC_OSPREY
- bool "Support for NEC Osprey board"
-
-config NEC_EAGLE
- bool "Support for NEC Eagle/Hawk board"
-
-config OLIVETTI_M700
- bool "Support for Olivetti M700-10"
- help
- This is a machine with a R4000 100 MHz CPU. To compile a Linux
- kernel that runs on these, say Y here. For details about Linux on
- the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
- <http://oss.sgi.com/mips/>.
-
-config SGI_IP22
- bool "Support for SGI IP22 (Indy/Indigo2)"
- help
- This are the SGI Indy, Challenge S and Indigo2, as well as certain
- OEM variants like the Tandem CMN B006S. To compile a Linux kernel
- that runs on these, say Y here.
-
-config SGI_IP27
- bool "Support for SGI IP27 (Origin200/2000)"
- depends on MIPS64
- help
- This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
- workstations. To compile a Linux kernel that runs on these, say Y
- here.
-
-#config SGI_SN0_XXL
-# bool "IP27 XXL"
-# depends on SGI_IP27
-# This options adds support for userspace processes upto 16TB size.
-# Normally the limit is just .5TB.
-
-config SGI_SN0_N_MODE
- bool "IP27 N-Mode"
- depends on SGI_IP27
- help
- The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
- configured in either N-Modes which allows for more nodes or M-Mode
- which allows for more memory. Your system is most probably
- running in M-Mode, so you should say N here.
-
-config DISCONTIGMEM
- bool "Discontiguous Memory Support"
- depends on SGI_IP27
- help
- Say Y to upport efficient handling of discontiguous physical memory,
- for architectures which are either NUMA (Non-Uniform Memory Access)
- or have huge holes in the physical address space for other reasons.
- See <file:Documentation/vm/numa> for more.
-
-config NUMA
- bool "NUMA Support"
- depends on SGI_IP27
- help
- Say Y to compile the kernel to support NUMA (Non-Uniform Memory
- Access). This option is for configuring high-end multiprocessor
- server machines. If in doubt, say N.
-
-config MAPPED_KERNEL
- bool "Mapped kernel support"
- depends on SGI_IP27
- help
- Change the way a Linux kernel is loaded unto memory on a MIPS64
- machine. This is required in order to support text replication and
- NUMA. If you need to undersatand it, read the source code.
-
-config REPLICATE_KTEXT
- bool "Kernel text replication support"
- depends on SGI_IP27
- help
- Say Y here to enable replicating the kernel text across multiple
- nodes in a NUMA cluster. This trades memory for speed.
-
-config REPLICATE_EXHANDLERS
- bool "Exception handler replication support"
- depends on SGI_IP27
- help
- Say Y here to enable replicating the kernel exception handlers
- across multiple nodes in a NUMA cluster. This trades memory for
- speed.
-
-config SGI_IP32
- bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- If you want this kernel to run on SGI O2 workstation, say Y here.
-
-config SOC_AU1X00
- depends on MIPS32
- bool "Support for AMD/Alchemy Au1X00 SOCs"
-
-choice
- prompt "Au1X00 SOC Type"
- depends on SOC_AU1X00
- help
- Say Y here to enable support for one of three AMD/Alchemy
- SOCs. For additional documentation see www.amd.com.
-
-config SOC_AU1000
- bool "SOC_AU1000"
-config SOC_AU1100
- bool "SOC_AU1100"
-config SOC_AU1500
- bool "SOC_AU1500"
-
-endchoice
-
-choice
- prompt "AMD/Alchemy Pb1x and Db1x board support"
- depends on SOC_AU1X00
- help
- These are evaluation boards built by AMD/Alchemy to
- showcase their Au1X00 Internet Edge Processors. The SOC design
- is based on the MIPS32 architecture running at 266/400/500MHz
- with many integrated peripherals. Further information can be
- found at their website, <http://www.amd.com/>. Say Y here if you
- wish to build a kernel for this platform.
-
-config MIPS_PB1000
- bool "PB1000 board"
- depends on SOC_AU1000
-
-config MIPS_PB1100
- bool "PB1100 board"
- depends on SOC_AU1100
-
-config MIPS_PB1500
- bool "PB1500 board"
- depends on SOC_AU1500
-
-config MIPS_DB1000
- bool "DB1000 board"
- depends on SOC_AU1000
-
-config MIPS_DB1100
- bool "DB1100 board"
- depends on SOC_AU1100
-
-config MIPS_DB1500
- bool "DB1500 board"
- depends on SOC_AU1500
-
-endchoice
-
-config SIBYTE_SB1xxx_SOC
- bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
- depends on EXPERIMENTAL
-
-choice
- prompt "BCM1xxx SOC Type"
- depends on SIBYTE_SB1xxx_SOC
- default SIBYTE_SB1250
-
-config SIBYTE_SB1250
- bool "BCM1250"
-
-endchoice
-
-config SIMULATION
- bool "Running under simulation"
- depends on SIBYTE_SB1xxx_SOC
-
-config SIBYTE_CFE
- bool "Booting from CFE"
- depends on SIBYTE_SB1xxx_SOC
-
-config SIBYTE_CFE_CONSOLE
- bool "Use firmware console"
- depends on SIBYTE_CFE
-
-config SIBYTE_STANDALONE
- bool
- depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
- default y
-
-config SIBYTE_STANDALONE_RAM_SIZE
- int "Memory size (in megabytes)"
- depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
- default "32"
-
-config SIBYTE_BUS_WATCHER
- bool "Support for Bus Watcher statistics"
- depends on SIBYTE_SB1xxx_SOC
-
-config SIBYTE_SB1250_PROF
- bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
- depends on SIBYTE_SB1xxx_SOC
-
-config SIBYTE_TBPROF
- bool "Support for ZBbus profiling"
- depends on SIBYTE_SB1xxx_SOC
-
-config SIBYTE_SWARM
- bool "Support for SWARM board"
- depends on SIBYTE_SB1250
-
-config SIBYTE_BOARD
- bool
- depends on SIBYTE_SWARM
- default y
-
-config SNI_RM200_PCI
- bool "Support for SNI RM200 PCI"
- help
- The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
- Nixdorf Informationssysteme (SNI), parent company of Pyramid
- Technology and now in turn merged with Fujitsu. Say Y here to
- support this machine type.
-
-config TANBAC_TB0226
- bool "Support for TANBAC TB0226 (Mbase)"
- help
- The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC.
- Please refer to <http://www.tanbac.co.jp/> about Mbase.
-
-config TANBAC_TB0229
- bool "Support for TANBAC TB0229 (VR4131DIMM)"
- help
- The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC.
- Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
-
-config TOSHIBA_JMR3927
- bool "Support for Toshiba JMR-TX3927 board"
- depends on MIPS32
-
-config TOSHIBA_RBTX4927
- bool "Support for Toshiba TBTX49[23]7 board"
- depends on MIPS32
-
-config VICTOR_MPC30X
- bool "Support for Victor MP-C303/304"
-
-config ZAO_CAPCELLA
- bool "Support for ZAO Networks Capcella"
-
-config RWSEM_GENERIC_SPINLOCK
- bool
- default y
-
-config RWSEM_XCHGADD_ALGORITHM
- bool
-
-#
-# Select some configuration options automatically based on user selections.
-#
-config ARC
- bool
- depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
- default y
-
-config GENERIC_ISA_DMA
- bool
- depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
- default y
-
-config CONFIG_GT64120
- bool
- depends on MIPS_EV64120 || MOMENCO_OCELOT
- default y
-
-config I8259
- bool
- depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_COBALT || ACER_PICA_61
- default y
-
-config MIPS_JAZZ
- bool
- depends on MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
- default y
-
-config NONCOHERENT_IO
- bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
- default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
- default n if (SIBYTE_SB1250 || SGI_IP27)
-
-config CPU_LITTLE_ENDIAN
- bool "Generate little endian code"
- default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_OSPREY || NEC_EAGLE || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
- default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
- help
- Some MIPS machines can be configured for either little or big endian
- byte order. These modes require different kernels. Say Y if your
- machine is little endian, N if it's a big endian machine.
-
-config IRQ_CPU
- bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || IBM_WORKPAD || HP_LASERJET || DECSTATION || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
- default y
-
-config VR41XX_TIME_C
- bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || NEC_EAGLE || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
- default y
-
-config DUMMY_KEYB
- bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1250 || NEC_EAGLE || NEC_OSPREY || DDB5477 || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
- default y
-
-config VR41XX_COMMON
- bool
- depends on NEC_EAGLE || ZAO_CAPCELLA || VICTOR_MPC30X || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
- default y
-
-config VRC4173
- tristate "NEC VRC4173 Support"
- depends on NEC_EAGLE || VICTOR_MPC30X
-
-config DDB5XXX_COMMON
- bool
- depends on DDB5074 || DDB5476 || DDB5477
- default y
-
-config MIPS_BOARDS_GEN
- bool
- depends on MIPS_ATLAS || MIPS_MALTA || MIPS_SEAD
- default y
-
-config ITE_BOARD_GEN
- bool
- depends on MIPS_IVR || MIPS_ITE8172
- default y
-
-config NEW_PCI
- bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || TANBAC_TB0226 || TANBAC_TB0229
- default y
-
-config SWAP_IO_SPACE
- bool "Support for paging of anonymous memory"
- depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1250 || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
- default y
- help
- This option allows you to choose whether you want to have support
- for socalled swap devices or swap files in your kernel that are
- used to provide more virtual memory than the actual RAM present
- in your computer. If unusre say Y.
-
-config AU1000_USB_DEVICE
- bool
- depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
- default n
-
-config COBALT_LCD
- bool
- depends on MIPS_COBALT
- default y
-
-config MIPS_GT64120
- bool
- depends on MIPS_EV64120
- default y
-
-config MIPS_GT96100
- bool
- depends on MIPS_EV96100
- default y
- help
- Say Y here to support the Galileo Technology GT96100 communications
- controller card. There is a web page at <http://www.galileot.com/>.
-
-config IT8172_CIR
- bool
- depends on MIPS_ITE8172 || MIPS_IVR
- default y
-
-config IT8712
- bool
- depends on MIPS_ITE8172
- default y
-
-config BOOT_ELF32
- bool
- depends on DECSTATION || MIPS_ATLAS || MIPS_MALTA || SIBYTE_SB1250 || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
- default y
-
-config L1_CACHE_SHIFT
- int
- default "4" if DECSTATION
- default "5" if SGI_IP32 || SGI_IP22 || MIPS_SEAD || MIPS_MALTA || MIPS_ATLAS
- default "7" if SGI_IP27
-
-config ARC32
- bool
- depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700
- default y
-
-config FB
- bool
- depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
- default y
- ---help---
- The frame buffer device provides an abstraction for the graphics
- hardware. It represents the frame buffer of some video hardware and
- allows application software to access the graphics hardware through
- a well-defined interface, so the software doesn't need to know
- anything about the low-level (hardware register) stuff.
-
- Frame buffer devices work identically across the different
- architectures supported by Linux and make the implementation of
- application programs easier and more portable; at this point, an X
- server exists which uses the frame buffer device exclusively.
- On several non-X86 architectures, the frame buffer device is the
- only way to use the graphics hardware.
-
- The device is accessed through special device nodes, usually located
- in the /dev directory, i.e. /dev/fb*.
-
- You need an utility program called fbset to make full use of frame
- buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
- and the Framebuffer-HOWTO at
- <http://www.tahallah.demon.co.uk/programming/prog.html> for more
- information.
-
- Say Y here and to the driver for your graphics board below if you
- are compiling a kernel for a non-x86 architecture.
-
- If you are compiling for the x86 architecture, you can say Y if you
- want to play with it, but it is not essential. Please note that
- running graphical applications that directly touch the hardware
- (e.g. an accelerated X server) and that are not frame buffer
- device-aware may cause unexpected results. If unsure, say N.
-
-config FB_G364
- bool
- depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
- default y
-
-config HAVE_STD_PC_SERIAL_PORT
- bool
- depends on DDB5476 || DDB5074 || MIPS_MALTA
- default y
-
-config VR4181
- bool
- depends on NEC_OSPREY
- default y
-
-config ARC_CONSOLE
- bool "ARC console support"
- depends on SGI_IP22 || SNI_RM200_PCI
-
-config ARC_MEMORY
- bool
- depends on SNI_RM200_PCI || SGI_IP32
- default y
-
-config ARC_PROMLIB
- bool
- depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22
- default y
-
-config BOARD_SCACHE
- bool
- depends on MIPS_EV96100 || MOMENCO_OCELOT || SGI_IP22
- default y
-
-config ARC64
- bool
- depends on SGI_IP27
- default y
-
-config BOOT_ELF64
- bool
- depends on SGI_IP27
- default y
-
-#config MAPPED_PCI_IO y
-# bool
-# depends on SGI_IP27
-# default y
-
-config QL_ISP_A64
- bool
- depends on SGI_IP27
- default y
-
-config TOSHIBA_BOARDS
- bool
- depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
- default y
-
-config TANBAC_TB0219
- bool "Added TANBAC TB0219 Base board support"
- depends on TANBAC_TB0229
-
-endmenu
-
-
-menu "CPU selection"
-
-choice
- prompt "CPU type"
- default CPU_R4X00
-
-config CPU_MIPS32
- bool "MIPS32"
-
-config CPU_MIPS64
- bool "MIPS64"
-
-config CPU_R3000
- bool "R3000"
- depends on MIPS32
- help
- Please make sure to pick the right CPU type. Linux/MIPS is not
- designed to be generic, i.e. Kernels compiled for R3000 CPUs will
- *not* work on R4000 machines and vice versa. However, since most
- of the supported machines have an R4000 (or similar) CPU, R4x00
- might be a safe bet. If the resulting kernel does not work,
- try to recompile with R3000.
-
-config CPU_TX39XX
- bool "R39XX"
- depends on MIPS32
-
-config CPU_VR41XX
- bool "R41xx"
- help
- The options selects support for the NEC VR41xx series of processors.
- Only choose this option if you have one of these processors as a
- kernel built with this option will not run on any other type of
- processor or vice versa.
-
-config CPU_R4300
- bool "R4300"
- help
- MIPS Technologies R4300-series processors.
-
-config CPU_R4X00
- bool "R4x00"
- help
- MIPS Technologies R4000-series processors other than 4300, including
- the R4000, R4400, R4600, and 4700.
-
-config CPU_TX49XX
- bool "R49XX"
-
-config CPU_R5000
- bool "R5000"
- help
- MIPS Technologies R5000-series processors other than the Nevada.
-
-config CPU_R5432
- bool "R5432"
-
-config CPU_R6000
- bool "R6000"
- depends on MIPS32 && EXPERIMENTAL
- help
- MIPS Technologies R6000 and R6000A series processors. Note these
- processors are extremly rare and the support for them is incomplete.
-
-config CPU_NEVADA
- bool "R52xx"
- help
- MIPS Technologies R52x0-series ("Nevada") processors.
-
-config CPU_R8000
- bool "R8000"
- depends on MIPS64 && EXPERIMENTAL
- help
- MIPS Technologies R8000 processors. Note these processors are
- uncommon and the support for them is incomplete.
-
-config CPU_R10000
- bool "R10000"
- help
- MIPS Technologies R10000-series processors.
-
-config CPU_RM7000
- bool "RM7000"
-
-config CPU_SB1
- bool "SB1"
-
-endchoice
-
-config R5000_CPU_SCACHE
- bool
- depends on CPU_NEVADA || CPU_R5000
- default y if SGI_IP32 || LASAT
-
-config BOARD_SCACHE
- bool
- depends on CPU_NEVADA || CPU_R4X00 || CPU_R5000
- default y if SGI_IP22 || (SGI_IP32 && CPU_R5000) || R5000_CPU_SCACHE
-
-config CPU_HAS_PREFETCH
- bool "Enable prefetches" if CPU_SB1 && !CPU_SB1_PASS_2
- default y if CPU_RM7000 || CPU_MIPS64 || CPU_MIPS32
-
-config VTAG_ICACHE
- bool "Support for Virtual Tagged I-cache" if CPU_MIPS64 || CPU_MIPS32
- default y if CPU_SB1
-
-choice
- prompt "SB1 Pass"
- depends on CPU_SB1
- default CPU_SB1_PASS_1
-
-config CPU_SB1_PASS_1
- bool "Pass1"
-
-config CPU_SB1_PASS_2
- bool "Pass2"
-
-config CPU_SB1_PASS_2_2
- bool "Pass2.2"
-
-endchoice
-
-config SB1_PASS_1_WORKAROUNDS
- bool
- depends on CPU_SB1_PASS_1
- default y
-
-config SB1_PASS_2_WORKAROUNDS
- bool
- depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
- default y
-
-# Avoid prefetches on Pass 2 (before 2.2)
-# XXXKW for now, let 2.2 use same WORKAROUNDS flag as pre-2.2
-config SB1_CACHE_ERROR
- bool "Support for SB1 Cache Error handler"
- depends on CPU_SB1
-
-config SB1_CERR_IGNORE_RECOVERABLE
- bool "Ignore recoverable cache errors"
- depends on SB1_CACHE_ERROR
-
-config SB1_CERR_SPIN
- bool "Spin instead of running handler"
- depends on SB1_CACHE_ERROR
-
-config 64BIT_PHYS_ADDR
- bool "Support for 64-bit physical address space"
- depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32
-
-config CPU_ADVANCED
- bool "Override CPU Options"
- depends on MIPS32
- help
- Saying yes here allows you to select support for various features
- your CPU may or may not have. Most people should say N here.
-
-config CPU_HAS_LLSC
- bool "ll/sc Instructions available" if CPU_ADVANCED
- default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX
- help
- MIPS R4000 series and later provide the Load Linked (ll)
- and Store Conditional (sc) instructions. More information is
- available at <http://www.go-ecs.com/mips/miptek1.htm>.
-
- Say Y here if your CPU has the ll and sc instructions. Say Y here
- for better performance, N if you don't know. You must say Y here
- for multiprocessor machines.
-
-config CPU_HAS_LLDSCD
- bool "lld/scd Instructions available" if CPU_ADVANCED
- default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32
- help
- Say Y here if your CPU has the lld and scd instructions, the 64-bit
- equivalents of ll and sc. Say Y here for better performance, N if
- you don't know. You must say Y here for multiprocessor machines.
-
-config CPU_HAS_WB
- bool "Writeback Buffer available" if CPU_ADVANCED
- default y if !CPU_ADVANCED && (CPU_R3000 || CPU_VR41XX || CPU_TX39XX) && DECSTATION
- help
- Say N here for slightly better performance. You must say Y here for
- machines which require flushing of write buffers in software. Saying
- Y is the safe option; N may result in kernel malfunction and crashes.
-
-config CPU_HAS_SYNC
- bool
- depends on !CPU_R3000
- default y
-
-#
-# - Highmem only makes sense for the 32-bit kernel.
-# - The current highmem code will only work properly on physically indexed
-# caches such as R3000, SB1, R7000 or those that look like they're virtually
-# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
-# moment we protect the user and offer the highmem option only on machines
-# where it's known to be safe. This will not offer highmem on a few systems
-# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
-# indexed CPUs but we're playing safe.
-# - We should not offer highmem for system of which we already know that they
-# don't have memory configurations that could gain from highmem support in
-# the kernel because they don't support configurations with RAM at physical
-# addresses > 0x20000000.
-#
-config HIGHMEM
- bool "High Memory Support"
- depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_R10000) && !(BAGET_MIPS || DECSTATION)
-
-config SMP
- bool "Multi-Processing support"
- depends on SIBYTE_SB1xxx_SOC && SIBYTE_SB1250 && !SIBYTE_STANDALONE || SGI_IP27
- ---help---
- This enables support for systems with more than one CPU. If you have
- a system with only one CPU, like most personal computers, say N. If
- you have a system with more than one CPU, say Y.
-
- If you say N here, the kernel will run on single and multiprocessor
- machines, but will use only one CPU of a multiprocessor machine. If
- you say Y here, the kernel will run on many, but not all,
- singleprocessor machines. On a singleprocessor machine, the kernel
- will run faster if you say N here.
-
- People using multiprocessor machines who say Y here should also say
- Y to "Enhanced Real Time Clock Support", below.
-
- See also the <file:Documentation/smp.tex>,
- <file:Documentation/smp.txt> and the SMP-HOWTO available at
- <http://www.tldp.org/docs.html#howto>.
-
- If you don't know what to do here, say N.
-
-config NR_CPUS
- int "Maximum number of CPUs (2-32)"
- depends on SMP
- default "32"
- help
- This allows you to specify the maximum number of CPUs which this
- kernel will support. The maximum supported value is 32 and the
- minimum value which makes sense is 2.
-
- This is purely to save memory - each supported CPU adds
- approximately eight kilobytes to the kernel image.
-
-config PREEMPT
- bool "Preemptible Kernel"
- help
- This option reduces the latency of the kernel when reacting to
- real-time or interactive events by allowing a low priority process to
- be preempted even if it is in kernel mode executing a system call.
- This allows applications to run more reliably even when the system is
- under load.
-
-config KALLSYMS
- bool "Load all symbols for debugging/kksymoops"
- help
- Say Y here to let the kernel print out symbolic crash information and
- symbolic stack backtraces. This increases the size of the kernel
- somewhat, as all symbols have to be loaded into the kernel image.
-
-config DEBUG_SPINLOCK_SLEEP
- bool "Sleep-inside-spinlock checking"
- help
- If you say Y here, various routines which may sleep will become very
- noisy if they are called with a spinlock held.
-
-config RTC_DS1742
- bool "DS1742 BRAM/RTC support"
- depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
-
-config MIPS_INSANE_LARGE
- bool "Support for large 64-bit configurations"
- depends on CPU_R10000 && MIPS64
- help
- MIPS R10000 does support a 44 bit / 16TB address space as opposed to
- previous 64-bit processors which only supported 40 bit / 1TB. If you
- need processes of more than 1TB virtual address space, say Y here.
- This will result in additional memory usage, so it is not
- recommended for normal users.
-
-config RWSEM_GENERIC_SPINLOCK
- bool
- default y
-
-endmenu
-
-menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
-
-config PCI
- bool "Support for PCI controller"
- depends on MIPS_DB1000 || DDB5074 || DDB5476 || DDB5477 || HP_LASERJET || LASAT || MIPS_IVR || MIPS_ATLAS || MIPS_COBALT || MIPS_EV64120 || MIPS_EV96100 || MIPS_ITE8172 || MIPS_MALTA || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_EAGLE || SGI_IP27 || SGI_IP32 || SIBYTE_SB1250 || SNI_RM200_PCI || TANBAC_TB0226 || TANBAC_TB0229 || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || VICTOR_MPC30X || ZAO_CAPCELLA
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
- say Y, otherwise N.
-
- The PCI-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>, contains valuable
- information about which PCI hardware does work under Linux and which
- doesn't.
-
-source "drivers/pci/Kconfig"
-
-config ISA
- bool "ISA bus support"
- depends on ACER_PICA_61 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI
- default y if TOSHIBA_RBTX4927 || DDB5476 || DDB5074 || IBM_WORKPAD || CASIO_E55
- help
- Find out whether you have ISA slots on your motherboard. ISA is the
- name of a bus system, i.e. the way the CPU talks to the other stuff
- inside your box. Other bus systems are PCI, EISA, or VESA. ISA is
- an older system, now being displaced by PCI; newer boards don't
- support it. If you have ISA, say Y, otherwise N.
-
-#
-# The SCSI bits are needed to get the SCSI code to link ...
-#
-config GENERIC_ISA_DMA
- bool
- default y if ACER_PICA_61 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI || SCSI
-
-config EISA
- bool "EISA support"
- depends on ISA && (SGI_IP22 || SNI_RM200_PCI)
- ---help---
- The Extended Industry Standard Architecture (EISA) bus was
- developed as an open alternative to the IBM MicroChannel bus.
-
- The EISA bus provided some of the features of the IBM MicroChannel
- bus while maintaining backward compatibility with cards made for
- the older ISA bus. The EISA bus saw limited use between 1988 and
- 1995 when it was made obsolete by the PCI bus.
-
- Say Y here if you are building a kernel for an EISA-based machine.
-
- Otherwise, say N.
-
-source "drivers/eisa/Kconfig"
-
-config TC
- bool "TURBOchannel support"
- depends on DECSTATION
- help
- TurboChannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
- processors. Documentation on writing device drivers for TurboChannel
- is available at:
- <http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/AA-PS3HD-TET1_html/TITLE.html>.
-
-#config ACCESSBUS
-# bool "Access.Bus support"
-# depends on TC
-
-config MMU
- bool
- default y
-
-config MCA
- bool
-
-config SBUS
- bool
-
-config HOTPLUG
- bool "Support for hot-pluggable devices"
- ---help---
- Say Y here if you want to plug devices into your computer while
- the system is running, and be able to use them quickly. In many
- cases, the devices can likewise be unplugged at any time too.
-
- One well known example of this is PCMCIA- or PC-cards, credit-card
- size devices such as network cards, modems or hard drives which are
- plugged into slots found on all modern laptop computers. Another
- example, used on modern desktops as well as laptops, is USB.
-
- Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
- software (at <http://linux-hotplug.sourceforge.net/>) and install it.
- Then your kernel will automatically call out to a user mode "policy
- agent" (/sbin/hotplug) to load modules and set up software needed
- to use devices as you hotplug them.
-
-source "drivers/pcmcia/Kconfig"
-
-source "drivers/pci/hotplug/Kconfig"
-
-endmenu
-
-menu "Executable file formats"
-
-config KCORE_ELF
- bool
- default y
- ---help---
- If you enabled support for /proc file system then the file
- /proc/kcore will contain the kernel core image. This can be used
- in gdb:
-
- $ cd /usr/src/linux ; gdb vmlinux /proc/kcore
-
- You have two choices here: ELF and A.OUT. Selecting ELF will make
- /proc/kcore appear in ELF core format as defined by the Executable
- and Linking Format specification. Selecting A.OUT will choose the
- old "a.out" format which may be necessary for some old versions
- of binutils or on some architectures.
-
- This is especially useful if you have compiled the kernel with the
- "-g" option to preserve debugging information. It is mainly used
- for examining kernel data structures on the live kernel so if you
- don't understand what this means or are not a kernel hacker, just
- leave it at its default value ELF.
-
-config KCORE_AOUT
- bool
-
-source "fs/Kconfig.binfmt"
-
-config BINFMT_IRIX
- bool "Include IRIX binary compatibility"
- depends on !CPU_LITTLE_ENDIAN && MIPS32
-
-config MIPS32_COMPAT
- bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
- depends on MIPS64
- help
- Select this option if you want Linux/MIPS 32-bit binary
- compatibility. Since all software available for Linux/MIPS is
- currently 32-bit you should say Y here.
-
-config COMPAT
- bool
- depends on MIPS32_COMPAT
- default y
-
-config MIPS32_O32
- bool "Kernel support for o32 binaries"
- depends on MIPS32_COMPAT
- help
- Select this option if you want to run o32 binaries. These are pure
- 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
- existing binaries are in this format.
-
- If unsure, say Y.
-
-config MIPS32_N32
- bool "Kernel support for n32 binaries"
- depends on MIPS32_COMPAT
- help
- Select this option if you want to run n32 binaries. These are
- 64-bit binaries using 32-bit quantities for addressing and certain
- data that would normally be 64-bit. They are used in special
- cases.
-
- If unsure, say N.
-
-config BINFMT_ELF32
- bool
- default y if MIPS32_O32 || MIPS32_N32
-
-config PM
- bool "Power Management support (EXPERIMENTAL)"
- depends on EXPERIMENTAL && SOC_AU1X00
-
-endmenu
-
-source "drivers/mtd/Kconfig"
-
-source "drivers/parport/Kconfig"
-
-source "drivers/pnp/Kconfig"
-
-source "drivers/base/Kconfig"
-
-source "drivers/block/Kconfig"
-
-
-menu "MIPS initrd options"
- depends on BLK_DEV_INITRD
-
-config EMBEDDED_RAMDISK
- bool "Embed root filesystem ramdisk into the kernel"
-
-config EMBEDDED_RAMDISK_IMAGE
- string "Filename of gziped ramdisk image"
- depends on EMBEDDED_RAMDISK
- default "ramdisk.gz"
- help
- This is the filename of the ramdisk image to be built into the
- kernel. Relative pathnames are relative to arch/mips/ramdisk/.
- The ramdisk image is not part of the kernel distribution; you must
- provide one yourself.
-
-endmenu
-
-source "drivers/ide/Kconfig"
-
-source "drivers/scsi/Kconfig"
-
-source "drivers/cdrom/Kconfig"
-
-source "drivers/md/Kconfig"
-
-source "drivers/message/fusion/Kconfig"
-
-source "drivers/ieee1394/Kconfig"
-
-source "drivers/message/i2o/Kconfig"
-
-source "net/Kconfig"
-
-source "net/ax25/Kconfig"
-
-source "net/irda/Kconfig"
-
-source "drivers/isdn/Kconfig"
-
-source "drivers/telephony/Kconfig"
-
-#
-# input before char - char/joystick depends on it. As does USB.
-#
-source "drivers/input/Kconfig"
-
-source "drivers/char/Kconfig"
-
-#source drivers/misc/Config.in
-
-source "drivers/media/Kconfig"
-
-source "fs/Kconfig"
-
-source "drivers/video/Kconfig"
-
-
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
-source "sound/Kconfig"
-
-endmenu
-
-source "drivers/usb/Kconfig"
-
-source "net/bluetooth/Kconfig"
-
-
-menu "Kernel hacking"
-
-config CROSSCOMPILE
- bool "Are you using a crosscompiler"
- help
- Say Y here if you are compiling the kernel on a different
- architecture than the one it is intended to run on.
-
-config DEBUG_KERNEL
- bool "Kernel debugging"
-
-config KGDB
- bool "Remote GDB kernel debugging"
- depends on DEBUG_KERNEL
- help
- If you say Y here, it will be possible to remotely debug the MIPS
- kernel using gdb. This enlarges your kernel image disk size by
- several megabytes and requires a machine with more than 16 MB,
- better 32 MB RAM to avoid excessive linking time. This is only
- useful for kernel hackers. If unsure, say N.
-
-config GDB_CONSOLE
- bool "Console output to GDB"
- depends on KGDB
- help
- If you are using GDB for remote debugging over a serial port and
- would like kernel messages to be formatted into GDB $O packets so
- that GDB prints them as program output, say 'Y'.
-
-config RUNTIME_DEBUG
- bool "Enable run-time debugging"
- depends on DEBUG_KERNEL
- help
- If you say Y here, some debugging macros will do run-time checking.
- If you say N here, those macros will mostly turn to no-ops. See
- include/asm-mips/debug.h for debuging macros.
- If unsure, say N.
-
-
-config MAGIC_SYSRQ
- bool "Magic SysRq key"
- depends on DEBUG_KERNEL
- help
- If you say Y here, you will have some control over the system even
- if the system crashes for example during kernel debugging (e.g., you
- will be able to flush the buffer cache to disk, reboot the system
- immediately or dump some status information). This is accomplished
- by pressing various keys while holding SysRq (Alt+PrintScreen). It
- also works on a serial console (on PC hardware at least), if you
- send a BREAK and then within 5 seconds a command keypress. The
- keys are documented in <file:Documentation/sysrq.txt>. Don't say Y
- unless you really know what this hack does.
-
-config MIPS_UNCACHED
- bool "Run uncached"
- depends on DEBUG_KERNEL && !SMP && !SGI_IP27
- help
- If you say Y here there kernel will disable all CPU caches. This will
- reduce the system's performance dramatically but can help finding
- otherwise hard to track bugs. It can also useful if you're doing
- hardware debugging with a logic analyzer and need to see all traffic
- on the bus.
-
-config DEBUG_HIGHMEM
- bool "Highmem debugging"
- depends on DEBUG_KERNEL && HIGHMEM
-
-endmenu
-
-source "security/Kconfig"
-
-source "crypto/Kconfig"
-
-source "lib/Kconfig"
diff -Nru a/arch/mips/Makefile b/arch/mips/Makefile
--- a/arch/mips/Makefile Sun Aug 3 13:14:44 2003
+++ b/arch/mips/Makefile Sun Aug 3 13:14:44 2003
@@ -3,7 +3,7 @@
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
-# Copyright (C) 1994, 1995, 1996 by Ralf Baechle
+# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
# DECStation modifications by Paul M. Antoine, 1996
# Copyright (C) 2002 Maciej W. Rozycki
#
@@ -16,15 +16,26 @@
# Select the object file format to substitute into the linker script.
#
ifdef CONFIG_CPU_LITTLE_ENDIAN
-tool-prefix = mipsel-linux-
-JIFFIES32 = jiffies_64
+32bit-tool-prefix = mips64el-linux-
+64bit-tool-prefix = mips64el-linux-
+32bit-bfd = elf32-tradlittlemips
+64bit-bfd = elf64-tradlittlemips
else
-tool-prefix = mips-linux-
-JIFFIES32 = jiffies_64 + 4
+32bit-tool-prefix = mips64-linux-
+64bit-tool-prefix = mips64-linux-
+32bit-bfd = elf32-tradbigmips
+64bit-bfd = elf64-tradbigmips
+endif
+
+ifdef CONFIG_MIPS32
+tool-prefix = $(32bit-tool-prefix)
+endif
+ifdef CONFIG_MIPS64
+tool-prefix = $(64bit-tool-prefix)
endif
ifdef CONFIG_CROSSCOMPILE
-CROSS_COMPILE := $(tool-prefix)
+CROSS_COMPILE := $(tool-prefix)
endif
#
@@ -39,45 +50,84 @@
#
cflags-y := -I $(TOPDIR)/include/asm/gcc
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
-LDFLAGS_vmalinux += -G 0 -static # -N
+cflags-$(CONFIG_MIPS32) += $(call check_gcc, -mabi=32,)
+cflags-$(CONFIG_MIPS64) += -mabi=64
+LDFLAGS_vmlinux += -G 0 -static # -N
MODFLAGS += -mlong-calls
cflags-$(CONFIG_KGDB) += -g
cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi)
+check_warning = $(shell if $(CC) $(1) -c -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi)
#
# CPU-dependent compiler/assembler options for optimization.
+# This is done in several steps:
#
-cflags-$(CONFIG_CPU_R3000) += -mcpu=r3000 -mips1
-cflags-$(CONFIG_CPU_TX39XX) += -mcpu=r3000 -mips1
-cflags-$(CONFIG_CPU_R6000) += -mcpu=r6000 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_R4300) += -mcpu=r4300 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_VR41XX) += -mcpu=r4600 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_R4X00) += -mcpu=r4600 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_TX49XX) += -mcpu=r4600 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_MIPS32) += -mcpu=r4600 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_MIPS64) += -mcpu=r4600 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_R5000) += -mcpu=r5000 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_R5432) += -mcpu=r5000 -mips2 -Wa,--trap
-# Cannot use -mmad with currently recommended tools
-cflags-$(CONFIG_CPU_NEVADA) += -mcpu=r5000 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_RM7000) += -mcpu=r5000 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_RM7000) += $(call check_gcc, -mcpu=r7000, -mcpu=r5000) \
- -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_SB1) += $(call check_gcc, -mcpu=sb1, -mcpu=r8000) \
- -mips2 -Wa,--trap
+# - cflags-y contains the options which select for which processor to
+# optimize the code for. The options should not contain any
+# options that change the ISA level but only compiler flags to
+# tune performance of the generated code.
+# - 32bit-isa-y contains the options which select the ISA for 32-bit kernels.
+# A kernel built those options will only work on hardware which
+# actually supports this ISA.
+# - 64bit-isa-y contains the options which select the ISA for 64-bit kernels.
+# A kernel built those options will only work on hardware which
+# actually supports this ISA.
+#
+cflags-$(CONFIG_CPU_R3000) += -mcpu=r3000
+32bit-isa-$(CONFIG_CPU_R3000) += -mips1
+64bit-isa-$(CONFIG_CPU_R3000) += -mboom
+cflags-$(CONFIG_CPU_TX39XX) += -mcpu=r3000
+32bit-isa-$(CONFIG_CPU_TX39XX) += -mips1
+64bit-isa-$(CONFIG_CPU_TX39XX) += -mboom
+cflags-$(CONFIG_CPU_R6000) += -mcpu=r6000
+32bit-isa-$(CONFIG_CPU_R6000) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R6000) += -mboom -Wa,--trap
+cflags-$(CONFIG_CPU_R4300) += -mcpu=r4300
+32bit-isa-$(CONFIG_CPU_R4300) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R4300) += -mips3 -Wa,--trap
+cflags-$(CONFIG_CPU_VR41XX) += -mcpu=r4600
+32bit-isa-$(CONFIG_CPU_VR41XX) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_VR41XX) += -mips3 -Wa,--trap
+cflags-$(CONFIG_CPU_R4X00) += -mcpu=r4600
+32bit-isa-$(CONFIG_CPU_R4X00) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R4X00) += -mips3 -Wa,--trap
+cflags-$(CONFIG_CPU_MIPS32) += $(call check_gcc, -mtune=mips32, -mcpu=r4600)
+32bit-isa-$(CONFIG_CPU_MIPS32) += $(call check_gcc, -mips32 -mabi=32, -mips2) -Wa,--trap
+64bit-isa-$(CONFIG_CPU_MIPS32) += -mboom
+cflags-$(CONFIG_CPU_MIPS64) +=
+32bit-isa-$(CONFIG_CPU_MIPS64) += $(call check_gcc, -mips32, -mips2) -Wa,--trap
+64bit-isa-$(CONFIG_CPU_MIPS64) += $(call check_gcc, -mips64, -mips4) -Wa,--trap
+cflags-$(CONFIG_CPU_R5000) += -mcpu=r8000
+32bit-isa-$(CONFIG_CPU_R5000) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R5000) += -mips4 -Wa,--trap
+cflags-$(CONFIG_CPU_R5432) += -mcpu=r5000
+32bit-isa-$(CONFIG_CPU_R5432) += -mips1 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R5432) += -mips3 -Wa,--trap
+cflags-$(CONFIG_CPU_NEVADA) += -mcpu=r8000 -mmad
+32bit-isa-$(CONFIG_CPU_NEVADA) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_NEVADA) += -mips3 -Wa,--trap
+cflags-$(CONFIG_CPU_RM7000) += $(call check_gcc, -mcpu=r7000, -mcpu=r5000)
+32bit-isa-$(CONFIG_CPU_RM7000) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_RM7000) += -mips4 -Wa,--trap
+cflags-$(CONFIG_CPU_SB1) += $(call check_gcc, -mcpu=sb1, -mcpu=r8000)
+32bit-isa-$(CONFIG_CPU_SB1) += $(call check_gcc, -mips32, -mips2) -Wa,--trap
+64bit-isa-$(CONFIG_CPU_SB1) += $(call check_gcc, -mips64, -mips4) -Wa,--trap
+cflags-$(CONFIG_CPU_R8000) += -mcpu=r8000
+32bit-isa-$(CONFIG_CPU_R8000) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R8000) += -mips4 -Wa,--trap
+cflags-$(CONFIG_CPU_R10000) += -mcpu=r8000
+32bit-isa-$(CONFIG_CPU_R10000) += -mips2 -Wa,--trap
+64bit-isa-$(CONFIG_CPU_R10000) += -mips4 -Wa,--trap
+
ifdef CONFIG_CPU_SB1
ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
MODFLAGS += -msb1-pass1-workarounds
endif
endif
-AFLAGS += $(cflags-y)
-CFLAGS += $(cflags-y)
-
-
#
# ramdisk/initrd support
# You need a compressed ramdisk image, named ramdisk.gz in
@@ -175,7 +225,7 @@
# MIPS Malta board
#
core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
-load-$(CONFIG_MIPS_MALTA) := 0x80100000
+load-$(CONFIG_MIPS_MALTA) += 0x80100000
#
# MIPS SEAD board
@@ -286,11 +336,50 @@
# SGI IP22 (Indy/Indigo2)
#
# Set the load address to >= 0x88069000 if you want to leave space for symmon,
-# 0x88002000 for production kernels. Note that the value must be 8kb aligned
-# or the handling of the current variable will break.
+# 0x80002000 for production kernels. Note that the value must be aligned to
+# a multiple of the kernel stack size or the handling of the current variable
+# will break so for 64-bit kernels we have to raise the start address by 8kb.
#
core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
+ifdef CONFIG_MIPS32
load-$(CONFIG_SGI_IP22) += 0x88002000
+endif
+ifdef CONFIG_MIPS64
+load-$(CONFIG_SGI_IP22) += 0x88004000
+endif
+
+#
+# SGI-IP27 (Origin200/2000)
+#
+# Set the load address to >= 0xc000000000300000 if you want to leave space for
+# symmon, 0xc00000000001c000 for production kernels. Note that the value
+# must be 16kb aligned or the handling of the current variable will break.
+#
+ifdef CONFIG_SGI_IP27
+core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
+#load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
+ifdef CONFIG_MAPPED_KERNEL
+load-$(CONFIG_SGI_IP27) += 0xc001c000
+else
+load-$(CONFIG_SGI_IP27) += 0x8001c000
+endif
+endif
+
+#
+# SGI-IP32 (O2)
+#
+# Set the load address to >= 0x????????? if you want to leave space for symmon,
+# 0x80002000 for production kernels. Note that the value must be aligned to
+# a multiple of the kernel stack size or the handling of the current variable
+# will break so for 64-bit kernels we have to raise the start address by 8kb.
+#
+core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
+ifdef CONFIG_MIPS32
+load-$(CONFIG_SGI_IP32) += 0x88002000
+endif
+ifdef CONFIG_MIPS64
+load-$(CONFIG_SGI_IP32) += 0x88004000
+endif
#
# Sibyte SB1250 SOC
@@ -339,12 +428,52 @@
# Toshiba RBTX4927 board or
# Toshiba RBTX4937 board
#
-core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
+core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
-load-$(CONFIG_TOSHIBA_RBTX4927) := 0x80020000
+load-$(CONFIG_TOSHIBA_RBTX4927) += 0x80020000
drivers-$(CONFIG_PCI) += arch/mips/pci/
+ifdef CONFIG_MIPS32
+build-bfd = $(32bit-bfd)
+cflags-y += $(32bit-isa-y)
+endif
+ifdef CONFIG_MIPS64
+build-bfd = $(64bit-bfd)
+cflags-y += $(64bit-isa-y)
+endif
+
+ifdef CONFIG_MIPS32
+ifdef CONFIG_CPU_LITTLE_ENDIAN
+JIFFIES = jiffies_64
+else
+JIFFIES = jiffies_64 + 4
+endif
+else
+JIFFIES = jiffies_64
+endif
+
+#
+# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
+# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
+# convert to ECOFF using elf2ecoff.
+#
+# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
+# ELF files from 32-bit files by conversion.
+#
+#AS += -64
+#LDFLAGS += -m elf64bmip
+
+ifdef CONFIG_MIPS64
+#
+# We use an unusual code model for building 64-bit kernels. 64-bit ELF,
+# squeezed into 32-bit ELF files. Later version of gas throw silly warnings
+# which requires the use of -mgp64 which not all gas versions have ...
+#
+GRRR=-Wa,-mgp64
+cflags-$(CONFIG_BOOT_ELF32) += -Wa,-32 $(call check_warning, $(GRRR),)
+cflags-$(CONFIG_BOOT_ELF64) += -Wa,-32 $(call check_warning, $(GRRR),)
+endif
#
# Choosing incompatible machines durings configuration will result in
@@ -352,12 +481,25 @@
# none has been choosen above.
#
-AFLAGS_vmlinux.lds.o := -D"LOADADDR=$(load-y)" -D"JIFFIES32=$(JIFFIES32)"
+AFLAGS_vmlinux.lds.o := \
+ -D"LOADADDR=$(load-y)" \
+ -D"JIFFIES=$(JIFFIES)" \
+ -imacros $(srctree)/include/asm-$(ARCH)/sn/mapped_kernel.h
+
+AFLAGS += $(cflags-y)
+CFLAGS += $(cflags-y)
+
+LDFLAGS += --oformat $(32bit-bfd)
head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
-libs-y += arch/mips/lib/
-core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
+libs-y += arch/mips/lib/
+libs-$(CONFIG_MIPS32) += arch/mips/lib-32/
+libs-$(CONFIG_MIPS64) += arch/mips/lib-64/
+
+core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
+core-$(CONFIG_MIPS32) += arch/mips/mm-32/
+core-$(CONFIG_MIPS64) += arch/mips/mm-64/
ifdef CONFIG_BAGET_MIPS
@@ -373,6 +515,14 @@
$(call descend,arch/mips/lasat/image,$@)
endif
+ifdef CONFIG_MAPPED_KERNEL
+vmlinux.64: vmlinux
+ $(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xbfffffff40000000 $< $@
+else
+vmlinux.64: vmlinux
+ $(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xa7ffffff80000000 $< $@
+endif
+
makeboot =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/mips/boot $(1)
#
@@ -394,8 +544,6 @@
@$(MAKE) -f scripts/Makefile.clean obj=arch/mips/baget
@$(MAKE) -f scripts/Makefile.clean obj=arch/mips/lasat
-archmrproper:
-
# Generate <asm/offset.h
#
# The default rule is suffering from funny problems on MIPS so we using our
@@ -405,8 +553,23 @@
define filechk_gen-asm-offset.h
(set -e; \
- echo "#ifndef __ASM_OFFSET_H"; \
- echo "#define __ASM_OFFSET_H"; \
+ echo "#ifndef _ASM_OFFSET_H"; \
+ echo "#define _ASM_OFFSET_H"; \
+ echo "/*"; \
+ echo " * DO NOT MODIFY."; \
+ echo " *"; \
+ echo " * This file was generated by arch/$(ARCH)/Makefile"; \
+ echo " *"; \
+ echo " */"; \
+ echo ""; \
+ sed -ne "/^@@@/s///p"; \
+ echo "#endif /* _ASM_OFFSET_H */" )
+endef
+
+define filechk_gen-asm-reg.h
+ (set -e; \
+ echo "#ifndef _ASM_REG_H"; \
+ echo "#define _ASM_REG_H"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
@@ -415,16 +578,21 @@
echo " */"; \
echo ""; \
sed -ne "/^@@@/s///p"; \
- echo "#endif /* __ASM_OFFSET_H */" )
+ echo "#endif /* _ASM_REG_H */" )
endef
-prepare: include/asm-$(ARCH)/offset.h
+prepare: include/asm-$(ARCH)/offset.h \
+ include/asm-$(ARCH)/reg.h
arch/$(ARCH)/kernel/offset.s: include/asm include/linux/version.h \
include/config/MARKER
include/asm-$(ARCH)/offset.h: arch/$(ARCH)/kernel/offset.s
$(call filechk,gen-asm-offset.h)
+include/asm-$(ARCH)/reg.h: arch/$(ARCH)/kernel/reg.s
+ $(call filechk,gen-asm-reg.h)
CLEAN_FILES += include/asm-$(ARCH)/offset.h.tmp \
- include/asm-$(ARCH)/offset.h
+ include/asm-$(ARCH)/offset.h \
+ include/asm-$(ARCH)/reg.h.tmp \
+ include/asm-$(ARCH)/reg.h
diff -Nru a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
--- a/arch/mips/au1000/common/time.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/au1000/common/time.c Sun Aug 3 13:14:47 2003
@@ -39,7 +39,6 @@
#include <linux/timex.h>
extern void startup_match20_interrupt(void);
-extern void do_softirq(void);
extern volatile unsigned long wall_jiffies;
unsigned long missed_heart_beats = 0;
@@ -76,7 +75,7 @@
int cpu = smp_processor_id();
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
#ifdef CONFIG_PM
printk(KERN_ERR "Unexpected CP0 interrupt\n");
@@ -92,7 +91,7 @@
timerhi += (count < timerlo); /* Wrap around */
timerlo = count;
- kstat_cpu(0).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
do_timer(regs);
r4k_cur += r4k_offset;
ack_r4ktimer(r4k_cur);
@@ -102,8 +101,6 @@
irq_exit();
- if (softirq_pending(cpu))
- do_softirq();
return;
null:
@@ -117,7 +114,7 @@
int time_elapsed;
static int jiffie_drift = 0;
- kstat_cpu(0).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
/* should never happen! */
printk(KERN_WARNING "counter 0 w status eror\n");
diff -Nru a/arch/mips/baget/irq.c b/arch/mips/baget/irq.c
--- a/arch/mips/baget/irq.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/baget/irq.c Sun Aug 3 13:14:50 2003
@@ -153,7 +153,7 @@
if (!action)
gotos skip;
len += sprintf(buf+len, "%2d: %8d %c %s",
- i, kstat_cpu(0).irqs[i],
+ i, kstat_this_cpu.irqs[i],
(action->flags & SA_INTERRUPT) ? '+' : ' ',
action->name);
for (action=action->next; action; action = action->next) {
@@ -183,7 +183,7 @@
cpu = smp_processor_id();
irq_enter();
- kstat_cpus(cpu)[irq]++;
+ kstat_cpus(cpu).irqs[irq]++;
mask_irq(irq);
action = *(irq + irq_action);
diff -Nru a/arch/mips/dec/time.c b/arch/mips/dec/time.c
--- a/arch/mips/dec/time.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/dec/time.c Sun Aug 3 13:14:51 2003
@@ -26,6 +26,7 @@
#include <asm/mipsregs.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/sections.h>
#include <asm/dec/machtype.h>
#include <asm/dec/ioasic.h>
#include <asm/dec/ioasic_addrs.h>
@@ -342,10 +343,9 @@
if (!user_mode(regs)) {
if (prof_buffer && current->pid) {
- extern int _stext;
unsigned long pc = regs->cp0_epc;
- pc -= (unsigned long) &_stext;
+ pc -= (unsigned long) _stext;
pc >>= prof_shift;
/*
* Dont ignore out-of-bounds pc values silently,
diff -Nru a/arch/mips/defconfig b/arch/mips/defconfig
--- a/arch/mips/defconfig Sun Aug 3 13:14:45 2003
+++ b/arch/mips/defconfig Sun Aug 3 13:14:45 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -105,13 +108,13 @@
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
+CONFIG_R5000_CPU_SCACHE=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -127,6 +130,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
CONFIG_BINFMT_IRIX=y
#
@@ -157,6 +161,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-atlas b/arch/mips/defconfig-atlas
--- a/arch/mips/defconfig-atlas Sun Aug 3 13:14:47 2003
+++ b/arch/mips/defconfig-atlas Sun Aug 3 13:14:47 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -102,7 +105,6 @@
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -120,6 +122,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
# CONFIG_BINFMT_IRIX is not set
#
@@ -151,10 +154,12 @@
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -205,7 +210,6 @@
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_NCR53C8XX is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
diff -Nru a/arch/mips/defconfig-capcella b/arch/mips/defconfig-capcella
--- a/arch/mips/defconfig-capcella Sun Aug 3 13:14:47 2003
+++ b/arch/mips/defconfig-capcella Sun Aug 3 13:14:47 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -103,7 +106,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -121,6 +123,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -154,6 +157,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-cobalt b/arch/mips/defconfig-cobalt
--- a/arch/mips/defconfig-cobalt Sun Aug 3 13:14:44 2003
+++ b/arch/mips/defconfig-cobalt Sun Aug 3 13:14:44 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -97,7 +100,6 @@
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -115,6 +117,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -145,9 +148,11 @@
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-ddb5476 b/arch/mips/defconfig-ddb5476
--- a/arch/mips/defconfig-ddb5476 Sun Aug 3 13:14:52 2003
+++ b/arch/mips/defconfig-ddb5476 Sun Aug 3 13:14:52 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -100,7 +103,6 @@
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -118,6 +120,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -151,6 +154,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-ddb5477 b/arch/mips/defconfig-ddb5477
--- a/arch/mips/defconfig-ddb5477 Sun Aug 3 13:14:46 2003
+++ b/arch/mips/defconfig-ddb5477 Sun Aug 3 13:14:46 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -101,7 +104,6 @@
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -119,6 +121,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -152,6 +155,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -556,6 +560,9 @@
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_ALI5455 is not set
+# CONFIG_SOUND_FORTE is not set
+# CONFIG_SOUND_AD1980 is not set
#
# USB support
diff -Nru a/arch/mips/defconfig-decstation b/arch/mips/defconfig-decstation
--- a/arch/mips/defconfig-decstation Sun Aug 3 13:14:53 2003
+++ b/arch/mips/defconfig-decstation Sun Aug 3 13:14:53 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -102,7 +105,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_WB=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -118,6 +120,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -147,6 +150,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-e55 b/arch/mips/defconfig-e55
--- a/arch/mips/defconfig-e55 Sun Aug 3 13:14:48 2003
+++ b/arch/mips/defconfig-e55 Sun Aug 3 13:14:48 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -102,7 +105,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -117,6 +119,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -146,6 +149,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-eagle b/arch/mips/defconfig-eagle
--- a/arch/mips/defconfig-eagle Sun Aug 3 13:14:46 2003
+++ b/arch/mips/defconfig-eagle Sun Aug 3 13:14:46 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -104,7 +107,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -136,6 +138,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -229,6 +232,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-ev64120 b/arch/mips/defconfig-ev64120
--- a/arch/mips/defconfig-ev64120 Sun Aug 3 13:14:46 2003
+++ b/arch/mips/defconfig-ev64120 Sun Aug 3 13:14:46 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -107,7 +110,6 @@
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -125,6 +127,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
# CONFIG_BINFMT_IRIX is not set
#
@@ -159,6 +162,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-ev96100 b/arch/mips/defconfig-ev96100
--- a/arch/mips/defconfig-ev96100 Sun Aug 3 13:14:50 2003
+++ b/arch/mips/defconfig-ev96100 Sun Aug 3 13:14:50 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -106,7 +109,6 @@
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -122,6 +124,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
# CONFIG_BINFMT_IRIX is not set
#
@@ -152,6 +155,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-hp-lj b/arch/mips/defconfig-hp-lj
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/defconfig-hp-lj Sun Aug 3 13:14:53 2003
@@ -0,0 +1,613 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+CONFIG_HP_LASERJET=y
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_NONCOHERENT_IO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_NEW_PCI=y
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_DEBUG_VERBOSE=3
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x10040000
+CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
+CONFIG_MTD_PHYSMAP_BUSWIDTH=4
+# CONFIG_MTD_CSTM_MIPS_IXX is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_IDS=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# I2O device support
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+# CONFIG_NETFILTER is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+
+#
+# Token Ring devices (depends on LLC=y)
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# I2C Hardware Sensors Mainboard support
+#
+
+#
+# I2C Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=3
+# CONFIG_JFFS2_FS_NAND is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -Nru a/arch/mips/defconfig-ip22 b/arch/mips/defconfig-ip22
--- a/arch/mips/defconfig-ip22 Sun Aug 3 13:14:53 2003
+++ b/arch/mips/defconfig-ip22 Sun Aug 3 13:14:53 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -105,13 +108,13 @@
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
+CONFIG_R5000_CPU_SCACHE=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -127,6 +130,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
CONFIG_BINFMT_IRIX=y
#
@@ -157,6 +161,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-ip27 b/arch/mips/defconfig-ip27
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/defconfig-ip27 Sun Aug 3 13:14:53 2003
@@ -0,0 +1,652 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+CONFIG_MIPS64=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=15
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+CONFIG_SGI_IP27=y
+# CONFIG_SGI_SN0_N_MODE is not set
+# CONFIG_DISCONTIGMEM is not set
+# CONFIG_NUMA is not set
+# CONFIG_MAPPED_KERNEL is not set
+# CONFIG_REPLICATE_KTEXT is not set
+# CONFIG_REPLICATE_EXHANDLERS is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARC=y
+CONFIG_GENERIC_ISA_DMA=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_L1_CACHE_SHIFT=7
+# CONFIG_FB is not set
+CONFIG_ARC64=y
+CONFIG_BOOT_ELF64=y
+CONFIG_QL_ISP_A64=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+CONFIG_CPU_R10000=y
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=4
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_MIPS_INSANE_LARGE is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_MIPS32_COMPAT=y
+CONFIG_COMPAT=y
+CONFIG_MIPS32_O32=y
+# CONFIG_MIPS32_N32 is not set
+CONFIG_BINFMT_ELF32=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+# CONFIG_NETFILTER is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_SGI_IOC3_ETH=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices (depends on LLC=y)
+#
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# I2C Hardware Sensors Mainboard support
+#
+
+#
+# I2C Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+CONFIG_SGI_IP27_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+CONFIG_JBD_DEBUG=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-ip32 b/arch/mips/defconfig-ip32
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/defconfig-ip32 Sun Aug 3 13:14:53 2003
@@ -0,0 +1,638 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+CONFIG_MIPS64=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+CONFIG_SGI_IP32=y
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARC=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_NONCOHERENT_IO=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_BOOT_ELF32=y
+CONFIG_L1_CACHE_SHIFT=5
+CONFIG_ARC32=y
+# CONFIG_FB is not set
+CONFIG_ARC_MEMORY=y
+CONFIG_ARC_PROMLIB=y
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_R5000_CPU_SCACHE=y
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_MIPS32_COMPAT=y
+CONFIG_COMPAT=y
+CONFIG_MIPS32_O32=y
+# CONFIG_MIPS32_N32 is not set
+CONFIG_BINFMT_ELF32=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_CHR_DEV_OSST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+CONFIG_SCSI_AIC7XXX=y
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_PROBE_EISA_VL is not set
+# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+# CONFIG_NETFILTER is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_SGI_O2MACE_ETH=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices (depends on LLC=y)
+#
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# I2C Hardware Sensors Mainboard support
+#
+
+#
+# I2C Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-it8172 b/arch/mips/defconfig-it8172
--- a/arch/mips/defconfig-it8172 Sun Aug 3 13:14:47 2003
+++ b/arch/mips/defconfig-it8172 Sun Aug 3 13:14:47 2003
@@ -2,7 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-# CONFIG_SMP is not set
+# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -10,90 +11,119 @@
CONFIG_EXPERIMENTAL=y
#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
-# CONFIG_ALGOR_P4032 is not set
# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+CONFIG_MIPS_ITE8172=y
+# CONFIG_IT8172_REVC is not set
# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_NINO is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
-CONFIG_MIPS_ITE8172=y
-# CONFIG_IT8172_REVC is not set
-CONFIG_QTRONIX_KEYBOARD=y
-CONFIG_IT8172_CIR=y
-# CONFIG_IT8172_SCR0 is not set
-# CONFIG_IT8172_SCR1 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_MIPS_PB1000 is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_MCA is not set
-# CONFIG_SBUS is not set
-CONFIG_PCI=y
-CONFIG_IT8712=y
-CONFIG_PC_KEYB=y
+CONFIG_NONCOHERENT_IO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_ITE_BOARD_GEN=y
CONFIG_NEW_PCI=y
-CONFIG_PCI_AUTO=y
-# CONFIG_ISA is not set
-# CONFIG_EISA is not set
-# CONFIG_I8259 is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
+CONFIG_IT8172_CIR=y
+CONFIG_IT8712=y
+# CONFIG_FB is not set
#
# CPU selection
#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_R6000 is not set
CONFIG_CPU_NEVADA=y
+# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y
-# CONFIG_CPU_HAS_WB is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
-# General setup
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
#
-CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_KCORE_ELF=y
-CONFIG_ELF_KERNEL=y
-# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
-CONFIG_NET=y
-CONFIG_PCI_NAMES=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSCTL=y
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -101,8 +131,7 @@
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_BOOTLDR_PARTS is not set
+# CONFIG_MTD_CONCAT is not set
#
# User Modules And Translation Layers
@@ -112,54 +141,45 @@
# CONFIG_MTD_BLOCK_RO is not set
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_VIRTUAL_ER is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
+# CONFIG_MTD_CFI_STAA is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_JEDEC is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=8000000
-CONFIG_MTD_PHYSMAP_LEN=2000000
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x2000000
CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SBC_GXX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-# CONFIG_MTD_DBOX2 is not set
-# CONFIG_MTD_CSTM_MIPS_IXX is not set
-# CONFIG_MTD_CFI_FLAGADM is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_OCELOT is not set
#
# Self-contained MTD device drivers
#
-# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
#
# Disk-On-Chip Device Drivers
#
-# CONFIG_MTD_DOC1000 is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
+# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
@@ -172,38 +192,84 @@
# CONFIG_PARPORT is not set
#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# I2O device support
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
#
# Networking options
#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-# CONFIG_UNIX is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -213,22 +279,27 @@
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
+# CONFIG_XFRM_USER is not set
#
-#
+# SCTP Configuration (EXPERIMENTAL)
#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
@@ -241,171 +312,29 @@
# CONFIG_NET_SCHED is not set
#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-# CONFIG_PHONE_IXJ is not set
-# CONFIG_PHONE_IXJ_PCMCIA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECS is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_BLK_DEV_RZ1000 is not set
-CONFIG_IDEPCI_SHARE_IRQ=y
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_OFFBOARD is not set
-CONFIG_IDEDMA_PCI_AUTO=y
-CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_AEC62XX_TUNING is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_WDC_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-# CONFIG_AMD74XX_OVERRIDE is not set
-# CONFIG_BLK_DEV_CMD64X is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_HPT34X_AUTODMA is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-CONFIG_BLK_DEV_IT8172=y
-CONFIG_IT8172_TUNING=y
-CONFIG_BLK_DEV_IT8172=y
-CONFIG_IT8172_TUNING=y
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_OPTI621 is not set
-# CONFIG_BLK_DEV_PDC202XX is not set
-# CONFIG_PDC202XX_BURST is not set
-# CONFIG_PDC202XX_FORCE is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-# CONFIG_BLK_DEV_SIS5513 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-CONFIG_IDE_CHIPSETS=y
-
-#
-# Note: most of these also require special kernel boot parameters
-#
-# CONFIG_BLK_DEV_4DRIVES is not set
-# CONFIG_BLK_DEV_ALI14XX is not set
-# CONFIG_BLK_DEV_DTC2278 is not set
-# CONFIG_BLK_DEV_HT6560B is not set
-# CONFIG_BLK_DEV_PDC4030 is not set
-# CONFIG_BLK_DEV_QD65XX is not set
-# CONFIG_BLK_DEV_UMC8672 is not set
-CONFIG_IDEDMA_AUTO=y
-# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
-# CONFIG_BLK_DEV_ATARAID is not set
-# CONFIG_BLK_DEV_ATARAID_PDC is not set
-# CONFIG_BLK_DEV_ATARAID_HPT is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Network device support
+# Network testing
#
+# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
-# CONFIG_SUNLANCE is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_APRICOT is not set
-# CONFIG_CS89x0 is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_DGRS is not set
-# CONFIG_DM9102 is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_LNE390 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_NE3210 is not set
-# CONFIG_ES3210 is not set
-CONFIG_8139TOO=y
-# CONFIG_8139TOO_PIO is not set
-# CONFIG_8139TOO_TUNE_TWISTER is not set
-# CONFIG_8139TOO_8129 is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_LAN_SAA9730 is not set
-# CONFIG_NET_POCKET is not set
+# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
+
+#
+# Ethernet (10000 Mbit)
+#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
@@ -415,11 +344,8 @@
# CONFIG_NET_RADIO is not set
#
-# Token Ring devices
+# Token Ring devices (depends on LLC=y)
#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
@@ -440,25 +366,68 @@
#
# ISDN subsystem
#
-# CONFIG_ISDN is not set
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
#
-# Old CD-ROM drivers (not SCSI, not IDE)
+# Input Device Drivers
#
-# CONFIG_CD_NO_IDESCSI is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
#
# Character devices
#
# CONFIG_VT is not set
-CONFIG_SERIAL=y
-CONFIG_SERIAL_CONSOLE=y
-# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_QTRONIX_KEYBOARD=y
-CONFIG_IT8172_CIR=y
+# CONFIG_QTRONIX_KEYBOARD is not set
# CONFIG_IT8172_SCR0 is not set
# CONFIG_IT8172_SCR1 is not set
+# CONFIG_ITE_GPIO is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
@@ -468,36 +437,35 @@
# CONFIG_I2C is not set
#
-# Mice
+# I2C Hardware Sensors Mainboard support
#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
#
-# Joysticks
+# I2C Hardware Sensors Chip support
#
-# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_I2C_SENSOR is not set
#
-# Input core support is needed for gameports
+# Mice
#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
#
-# Input core support is needed for joysticks
+# IPMI
#
-# CONFIG_QIC02_TAPE is not set
+# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_SONYPI is not set
#
# Ftape, the floppy tape device driver
@@ -505,7 +473,8 @@
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
-# CONFIG_ITE_GPIO is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
@@ -513,206 +482,150 @@
# CONFIG_VIDEO_DEV is not set
#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
# File systems
#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
-# CONFIG_CMS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_FREEVXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
+# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
#
# Network File Systems
#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
+# CONFIG_NFS_V4 is not set
# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
+CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
#
-# USB Device Class drivers
+# Graphics support
#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
#
-# USB Human Interface Devices (HID)
-#
-
-#
-# Input core support is needed for USB HID
-#
-
-#
-# USB Imaging devices
+# Sound
#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
+CONFIG_SOUND=y
#
-# USB Multimedia devices
+# Advanced Linux Sound Architecture
#
+# CONFIG_SND is not set
#
-# Video4Linux support is needed for USB Multimedia device support
+# Open Sound System
#
-# CONFIG_USB_DABUSB is not set
+CONFIG_SOUND_PRIME=y
+# CONFIG_SOUND_BT878 is not set
+# CONFIG_SOUND_FUSION is not set
+# CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ESSSOLO1 is not set
+# CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_SONICVIBES is not set
+CONFIG_SOUND_IT8172=y
+# CONFIG_SOUND_TRIDENT is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_AD1980 is not set
#
-# USB Network adaptors
+# USB support
#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-# CONFIG_USB_USBNET is not set
+# CONFIG_USB_GADGET is not set
#
-# USB port drivers
+# Bluetooth support
#
-# CONFIG_USB_USS720 is not set
+# CONFIG_BT is not set
#
-# USB Serial Converter support
+# Kernel hacking
#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
#
-# Miscellaneous USB drivers
+# Security options
#
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_ID75 is not set
+# CONFIG_SECURITY is not set
#
-# Input core support
+# Cryptographic options
#
-# CONFIG_INPUT is not set
-# CONFIG_INPUT_KEYBDEV is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+# CONFIG_CRYPTO is not set
#
-# Kernel hacking
+# Library routines
#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_REMOTE_DEBUG is not set
-# CONFIG_GDB_CONSOLE is not set
-# CONFIG_LL_DEBUG is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_MIPS_UNCACHED is not set
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-ivr b/arch/mips/defconfig-ivr
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/defconfig-ivr Sun Aug 3 13:14:53 2003
@@ -0,0 +1,600 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+CONFIG_MIPS_IVR=y
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_NONCOHERENT_IO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_ITE_BOARD_GEN=y
+CONFIG_NEW_PCI=y
+CONFIG_IT8172_CIR=y
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+CONFIG_CPU_NEVADA=y
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_IDEPCI is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+# CONFIG_NETFILTER is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices (depends on LLC=y)
+#
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_QTRONIX_KEYBOARD=y
+# CONFIG_IT8172_SCR0 is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# I2C Hardware Sensors Mainboard support
+#
+
+#
+# I2C Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-jmr3927 b/arch/mips/defconfig-jmr3927
--- a/arch/mips/defconfig-jmr3927 Sun Aug 3 13:14:44 2003
+++ b/arch/mips/defconfig-jmr3927 Sun Aug 3 13:14:44 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -96,7 +99,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
CONFIG_RTC_DS1742=y
@@ -115,6 +117,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
# CONFIG_BINFMT_IRIX is not set
#
@@ -149,6 +152,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-lasat200 b/arch/mips/defconfig-lasat200
--- a/arch/mips/defconfig-lasat200 Sun Aug 3 13:14:47 2003
+++ b/arch/mips/defconfig-lasat200 Sun Aug 3 13:14:47 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -44,8 +47,6 @@
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
CONFIG_LASAT=y
-# CONFIG_LASAT_100 is not set
-CONFIG_LASAT_200=y
CONFIG_PICVUE=y
CONFIG_PICVUE_PROC=y
CONFIG_DS1603=y
@@ -109,7 +110,6 @@
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -127,6 +127,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -168,7 +169,6 @@
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_LASAT=y
-# CONFIG_MTD_UCLINUX is not set
#
# Self-contained MTD device drivers
@@ -217,6 +217,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -277,7 +278,6 @@
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI device support
diff -Nru a/arch/mips/defconfig-malta b/arch/mips/defconfig-malta
--- a/arch/mips/defconfig-malta Sun Aug 3 13:14:46 2003
+++ b/arch/mips/defconfig-malta Sun Aug 3 13:14:46 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -109,13 +112,14 @@
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
-# CONFIG_PCI is not set
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
@@ -125,6 +129,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -150,11 +155,16 @@
# Block devices
#
CONFIG_BLK_DEV_FD=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -186,10 +196,34 @@
#
# SCSI low-level drivers
#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
#
@@ -203,8 +237,14 @@
# CONFIG_FUSION is not set
#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
# I2O device support
#
+# CONFIG_I2O is not set
#
# Networking support
@@ -265,6 +305,11 @@
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
@@ -276,14 +321,36 @@
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
@@ -295,6 +362,8 @@
#
# Token Ring devices (depends on LLC=y)
#
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
@@ -345,6 +414,7 @@
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
#
# Input Device Drivers
@@ -526,6 +596,7 @@
#
# USB support
#
+# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
diff -Nru a/arch/mips/defconfig-mpc30x b/arch/mips/defconfig-mpc30x
--- a/arch/mips/defconfig-mpc30x Sun Aug 3 13:14:52 2003
+++ b/arch/mips/defconfig-mpc30x Sun Aug 3 13:14:52 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -104,7 +107,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -120,6 +122,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -149,6 +152,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-ocelot b/arch/mips/defconfig-ocelot
--- a/arch/mips/defconfig-ocelot Sun Aug 3 13:14:48 2003
+++ b/arch/mips/defconfig-ocelot Sun Aug 3 13:14:48 2003
@@ -2,7 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-# CONFIG_SMP is not set
+# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -10,85 +11,116 @@
CONFIG_EXPERIMENTAL=y
#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
-# CONFIG_ALGOR_P4032 is not set
# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_EV64120 is not set
+CONFIG_SYSCLK_100=y
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_NINO is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
CONFIG_MOMENCO_OCELOT=y
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_MIPS_PB1000 is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_MCA is not set
-# CONFIG_SBUS is not set
-CONFIG_PCI=y
-CONFIG_SYSCLK_100=y
+CONFIG_CONFIG_GT64120=y
+CONFIG_NONCOHERENT_IO=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SWAP_IO_SPACE=y
-CONFIG_NEW_IRQ=y
-CONFIG_OLD_TIME_C=y
-# CONFIG_ISA is not set
-# CONFIG_EISA is not set
-# CONFIG_I8259 is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
#
# CPU selection
#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
-CONFIG_CPU_RM7000=y
+# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
+CONFIG_CPU_RM7000=y
# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y
-# CONFIG_CPU_HAS_WB is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
-# General setup
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
#
-# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_KCORE_ELF=y
-CONFIG_ELF_KERNEL=y
-# CONFIG_BINFMT_IRIX is not set
-# CONFIG_FORWARD_KEYBOARD is not set
-# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
-CONFIG_NET=y
-CONFIG_PCI_NAMES=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
#
# Memory Technology Devices (MTD)
@@ -101,38 +133,61 @@
# CONFIG_PARPORT is not set
#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# I2O device support
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
#
# Networking options
#
# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
+CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
CONFIG_UNIX=y
+CONFIG_NET_KEY=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -142,22 +197,27 @@
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
+# CONFIG_XFRM_USER is not set
#
-#
+# SCTP Configuration (EXPERIMENTAL)
#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
@@ -170,96 +230,29 @@
# CONFIG_NET_SCHED is not set
#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-# CONFIG_PHONE_IXJ is not set
-# CONFIG_PHONE_IXJ_PCMCIA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Network device support
+# Network testing
#
+# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
-# CONFIG_SUNLANCE is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_APRICOT is not set
-# CONFIG_CS89x0 is not set
-# CONFIG_TULIP is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_DGRS is not set
-# CONFIG_DM9102 is not set
-CONFIG_EEPRO100=y
-# CONFIG_LNE390 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_NE3210 is not set
-# CONFIG_ES3210 is not set
-# CONFIG_8139TOO is not set
-# CONFIG_8139TOO_PIO is not set
-# CONFIG_8139TOO_TUNE_TWISTER is not set
-# CONFIG_8139TOO_8129 is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_LAN_SAA9730 is not set
-# CONFIG_NET_POCKET is not set
+# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
+
+#
+# Ethernet (10000 Mbit)
+#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
@@ -269,11 +262,8 @@
# CONFIG_NET_RADIO is not set
#
-# Token Ring devices
+# Token Ring devices (depends on LLC=y)
#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
@@ -294,21 +284,64 @@
#
# ISDN subsystem
#
-# CONFIG_ISDN is not set
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
#
-# Old CD-ROM drivers (not SCSI, not IDE)
+# Userland interfaces
#
-# CONFIG_CD_NO_IDESCSI is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
#
# Character devices
#
# CONFIG_VT is not set
-CONFIG_SERIAL=y
-CONFIG_SERIAL_CONSOLE=y
-# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
@@ -318,36 +351,35 @@
# CONFIG_I2C is not set
#
-# Mice
+# I2C Hardware Sensors Mainboard support
#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
#
-# Joysticks
+# I2C Hardware Sensors Chip support
#
-# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_I2C_SENSOR is not set
#
-# Input core support is needed for gameports
+# Mice
#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
#
-# Input core support is needed for joysticks
+# IPMI
#
-# CONFIG_QIC02_TAPE is not set
+# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_SONYPI is not set
#
# Ftape, the floppy tape device driver
@@ -355,6 +387,8 @@
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
@@ -362,206 +396,128 @@
# CONFIG_VIDEO_DEV is not set
#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
# File systems
#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
-# CONFIG_CMS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_FREEVXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
+# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
#
# Network File Systems
#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
+# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
#
-# Sound
+# Graphics support
#
-# CONFIG_SOUND is not set
#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-
-#
-# Input core support is needed for USB HID
-#
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-
-#
-# Video4Linux support is needed for USB Multimedia device support
+# Sound
#
-# CONFIG_USB_DABUSB is not set
+# CONFIG_SOUND is not set
#
-# USB Network adaptors
+# USB support
#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-# CONFIG_USB_USBNET is not set
+# CONFIG_USB_GADGET is not set
#
-# USB port drivers
+# Bluetooth support
#
-# CONFIG_USB_USS720 is not set
+# CONFIG_BT is not set
#
-# USB Serial Converter support
+# Kernel hacking
#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
#
-# Miscellaneous USB drivers
+# Security options
#
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_ID75 is not set
+# CONFIG_SECURITY is not set
#
-# Input core support
+# Cryptographic options
#
-# CONFIG_INPUT is not set
-# CONFIG_INPUT_KEYBDEV is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+# CONFIG_CRYPTO is not set
#
-# Kernel hacking
+# Library routines
#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_REMOTE_DEBUG is not set
-# CONFIG_GDB_CONSOLE is not set
-# CONFIG_LL_DEBUG is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_MIPS_UNCACHED is not set
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-osprey b/arch/mips/defconfig-osprey
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/defconfig-osprey Sun Aug 3 13:14:53 2003
@@ -0,0 +1,531 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+CONFIG_NEC_OSPREY=y
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_NONCOHERENT_IO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+# CONFIG_FB is not set
+CONFIG_VR4181=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# I2O device support
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+# CONFIG_NETFILTER is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices (depends on LLC=y)
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# I2C Hardware Sensors Mainboard support
+#
+
+#
+# I2C Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-pb1000 b/arch/mips/defconfig-pb1000
--- a/arch/mips/defconfig-pb1000 Sun Aug 3 13:14:47 2003
+++ b/arch/mips/defconfig-pb1000 Sun Aug 3 13:14:47 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -103,7 +106,6 @@
CONFIG_CPU_HAS_WB=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -128,6 +130,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -168,7 +171,6 @@
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_UCLINUX is not set
#
# Self-contained MTD device drivers
@@ -212,6 +214,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -404,7 +407,6 @@
#
# Dongle support
#
-# CONFIG_DONGLE is not set
#
# Old SIR device drivers
@@ -415,18 +417,12 @@
#
# Old Serial dongle support
#
-# CONFIG_DONGLE_OLD is not set
#
# FIR device drivers
#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
# CONFIG_TOSHIBA_OLD is not set
# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_OLD is not set
-# CONFIG_SMC_IRCC_FIR is not set
-# CONFIG_ALI_FIR is not set
# CONFIG_VLSI_FIR is not set
#
diff -Nru a/arch/mips/defconfig-pb1100 b/arch/mips/defconfig-pb1100
--- a/arch/mips/defconfig-pb1100 Sun Aug 3 13:14:46 2003
+++ b/arch/mips/defconfig-pb1100 Sun Aug 3 13:14:46 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -103,7 +106,6 @@
CONFIG_CPU_HAS_WB=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -128,6 +130,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -168,7 +171,6 @@
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_UCLINUX is not set
#
# Self-contained MTD device drivers
@@ -209,9 +211,11 @@
#
# CONFIG_BLK_DEV_FD is not set
CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -299,6 +303,11 @@
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
@@ -424,7 +433,6 @@
#
# Dongle support
#
-# CONFIG_DONGLE is not set
#
# Old SIR device drivers
@@ -435,18 +443,12 @@
#
# Old Serial dongle support
#
-# CONFIG_DONGLE_OLD is not set
#
# FIR device drivers
#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
# CONFIG_TOSHIBA_OLD is not set
# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_OLD is not set
-# CONFIG_SMC_IRCC_FIR is not set
-# CONFIG_ALI_FIR is not set
# CONFIG_VLSI_FIR is not set
#
diff -Nru a/arch/mips/defconfig-pb1500 b/arch/mips/defconfig-pb1500
--- a/arch/mips/defconfig-pb1500 Sun Aug 3 13:14:48 2003
+++ b/arch/mips/defconfig-pb1500 Sun Aug 3 13:14:48 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -113,7 +116,6 @@
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -139,6 +141,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
# CONFIG_PM is not set
#
@@ -166,9 +169,11 @@
#
# CONFIG_BLK_DEV_FD is not set
CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -234,6 +239,11 @@
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
diff -Nru a/arch/mips/defconfig-rm200 b/arch/mips/defconfig-rm200
--- a/arch/mips/defconfig-rm200 Sun Aug 3 13:14:52 2003
+++ b/arch/mips/defconfig-rm200 Sun Aug 3 13:14:52 2003
@@ -2,7 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-# CONFIG_SMP is not set
+# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -10,93 +11,127 @@
CONFIG_EXPERIMENTAL=y
#
+# General setup
+#
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
-# CONFIG_ALGOR_P4032 is not set
# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_NINO is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
CONFIG_SNI_RM200_PCI=y
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_MIPS_PB1000 is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_MCA is not set
-# CONFIG_SBUS is not set
-CONFIG_ARC32=y
+CONFIG_ARC=y
+CONFIG_GENERIC_ISA_DMA=y
CONFIG_I8259=y
-CONFIG_ISA=y
-CONFIG_PC_KEYB=y
-CONFIG_PCI=y
-CONFIG_ROTTEN_IRQ=y
-CONFIG_OLD_TIME_C=y
-CONFIG_EISA=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
+CONFIG_NONCOHERENT_IO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_BOOT_ELF32=y
+CONFIG_ARC32=y
+# CONFIG_FB is not set
+CONFIG_ARC_CONSOLE=y
+CONFIG_ARC_MEMORY=y
+CONFIG_ARC_PROMLIB=y
#
# CPU selection
#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-CONFIG_CPU_R5000=y
+CONFIG_CPU_R4X00=y
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y
-# CONFIG_CPU_HAS_WB is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
-# General setup
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_KCORE_ELF=y
-CONFIG_ELF_KERNEL=y
-# CONFIG_ARC_CONSOLE is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_NET=y
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
# CONFIG_PCI_NAMES is not set
+CONFIG_ISA=y
+# CONFIG_EISA is not set
+CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
#
-# Plug and Play configuration
+# Executable file formats
#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-# CONFIG_PNPBIOS is not set
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -109,61 +144,175 @@
# CONFIG_PARPORT is not set
#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
# Block devices
#
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
+CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
CONFIG_UNIX=y
+CONFIG_NET_KEY=y
CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_INET_ECN=y
# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
+# CONFIG_XFRM_USER is not set
#
-#
+# SCTP Configuration (EXPERIMENTAL)
#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
@@ -176,28 +325,103 @@
# CONFIG_NET_SCHED is not set
#
-# Telephony Support
+# Network testing
#
-# CONFIG_PHONE is not set
-# CONFIG_PHONE_IXJ is not set
-# CONFIG_PHONE_IXJ_PCMCIA is not set
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
#
-# ATA/IDE/MFM/RLL support
+# ARCnet devices
#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
-# CONFIG_BLK_DEV_HD is not set
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=y
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_AC3200 is not set
+# CONFIG_APRICOT is not set
+# CONFIG_B44 is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
#
-# SCSI support
+# Token Ring devices (depends on LLC=y)
#
-# CONFIG_SCSI is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
#
-# Network device support
+# Wan interfaces
#
-# CONFIG_NETDEVICES is not set
+# CONFIG_WAN is not set
#
# Amateur Radio support
@@ -212,21 +436,70 @@
#
# ISDN subsystem
#
-# CONFIG_ISDN is not set
+# CONFIG_ISDN_BOOL is not set
#
-# Old CD-ROM drivers (not SCSI, not IDE)
+# Telephony Support
#
-# CONFIG_CD_NO_IDESCSI is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
+CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
@@ -236,36 +509,34 @@
# CONFIG_I2C is not set
#
-# Mice
+# I2C Hardware Sensors Mainboard support
#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
#
-# Joysticks
+# I2C Hardware Sensors Chip support
#
-# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_I2C_SENSOR is not set
#
-# Input core support is needed for gameports
+# Mice
#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
#
-# Input core support is needed for joysticks
+# IPMI
#
-# CONFIG_QIC02_TAPE is not set
+# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_SONYPI is not set
#
# Ftape, the floppy tape device driver
@@ -273,6 +544,8 @@
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
@@ -280,78 +553,82 @@
# CONFIG_VIDEO_DEV is not set
#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
# File systems
#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
-# CONFIG_CMS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_FREEVXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
+# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
#
# Network File Systems
#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
# CONFIG_NFS_FS is not set
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
+# CONFIG_EXPORTFS is not set
# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
#
# Partition Types
@@ -368,22 +645,22 @@
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
+# CONFIG_EFI_PARTITION is not set
#
-# Console drivers
+# Graphics support
#
-CONFIG_VGA_CONSOLE=y
-# CONFIG_MDA_CONSOLE is not set
#
-# Frame-buffer support
+# Console display driver support
#
-# CONFIG_FB is not set
+CONFIG_VGA_CONSOLE=y
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
#
# Sound
@@ -394,113 +671,30 @@
# USB support
#
# CONFIG_USB is not set
+# CONFIG_USB_GADGET is not set
#
-# USB Controllers
+# Bluetooth support
#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
+# CONFIG_BT is not set
#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-
-#
-# Input core support is needed for USB HID
-#
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-# CONFIG_USB_DABUSB is not set
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
+# Kernel hacking
#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
#
-# Miscellaneous USB drivers
+# Security options
#
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_ID75 is not set
+# CONFIG_SECURITY is not set
#
-# Input core support
+# Cryptographic options
#
-# CONFIG_INPUT is not set
-# CONFIG_INPUT_KEYBDEV is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+# CONFIG_CRYPTO is not set
#
-# Kernel hacking
+# Library routines
#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_MIPS_UNCACHED is not set
+# CONFIG_CRC32 is not set
diff -Nru a/arch/mips/defconfig-sb1250-swarm b/arch/mips/defconfig-sb1250-swarm
--- a/arch/mips/defconfig-sb1250-swarm Sun Aug 3 13:14:48 2003
+++ b/arch/mips/defconfig-sb1250-swarm Sun Aug 3 13:14:48 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=15
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -84,6 +87,7 @@
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_DUMMY_KEYB=y
CONFIG_SWAP_IO_SPACE=y
+CONFIG_SIBYTE_HAS_LDT=y
CONFIG_BOOT_ELF32=y
# CONFIG_FB is not set
@@ -106,6 +110,7 @@
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
CONFIG_CPU_SB1=y
+# CONFIG_SIBYTE_DMA_PAGEOPS is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_VTAG_ICACHE=y
CONFIG_CPU_SB1_PASS_1=y
@@ -124,7 +129,6 @@
CONFIG_SMP=y
CONFIG_NR_CPUS=2
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -142,6 +146,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
# CONFIG_BINFMT_IRIX is not set
#
@@ -177,6 +182,7 @@
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=9220
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-sead b/arch/mips/defconfig-sead
--- a/arch/mips/defconfig-sead Sun Aug 3 13:14:46 2003
+++ b/arch/mips/defconfig-sead Sun Aug 3 13:14:46 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -99,7 +102,6 @@
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -114,6 +116,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -140,9 +143,11 @@
#
# CONFIG_BLK_DEV_FD is not set
CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=18432
CONFIG_BLK_DEV_INITRD=y
+# CONFIG_LBD is not set
#
# MIPS initrd options
diff -Nru a/arch/mips/defconfig-tb0226 b/arch/mips/defconfig-tb0226
--- a/arch/mips/defconfig-tb0226 Sun Aug 3 13:14:52 2003
+++ b/arch/mips/defconfig-tb0226 Sun Aug 3 13:14:52 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -104,7 +107,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -120,6 +122,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -146,10 +149,12 @@
#
CONFIG_BLK_DEV_FD=y
CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-tb0229 b/arch/mips/defconfig-tb0229
--- a/arch/mips/defconfig-tb0229 Sun Aug 3 13:14:47 2003
+++ b/arch/mips/defconfig-tb0229 Sun Aug 3 13:14:47 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -104,7 +107,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -122,6 +124,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -152,10 +155,12 @@
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/defconfig-workpad b/arch/mips/defconfig-workpad
--- a/arch/mips/defconfig-workpad Sun Aug 3 13:14:49 2003
+++ b/arch/mips/defconfig-workpad Sun Aug 3 13:14:49 2003
@@ -2,8 +2,8 @@
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
-CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
+CONFIG_MIPS32=y
#
# Code maturity level options
@@ -19,8 +19,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -102,7 +105,6 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
@@ -117,6 +119,7 @@
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
#
# Memory Technology Devices (MTD)
@@ -146,6 +149,7 @@
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
diff -Nru a/arch/mips/galileo-boards/ev96100/time.c b/arch/mips/galileo-boards/ev96100/time.c
--- a/arch/mips/galileo-boards/ev96100/time.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/galileo-boards/ev96100/time.c Sun Aug 3 13:14:48 2003
@@ -262,7 +262,7 @@
}
do {
- kstat_cpu(0).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
do_timer(regs);
r4k_cur += r4k_offset;
ack_r4ktimer(r4k_cur);
diff -Nru a/arch/mips/gt64120/common/Makefile b/arch/mips/gt64120/common/Makefile
--- a/arch/mips/gt64120/common/Makefile Sun Aug 3 13:14:48 2003
+++ b/arch/mips/gt64120/common/Makefile Sun Aug 3 13:14:48 2003
@@ -2,4 +2,4 @@
# Makefile for common code of gt64120-based boards.
#
-obj-y := gt_irq.o pci.o
+obj-y += gt_irq.o
diff -Nru a/arch/mips/gt64120/common/gt_irq.c b/arch/mips/gt64120/common/gt_irq.c
--- a/arch/mips/gt64120/common/gt_irq.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/gt64120/common/gt_irq.c Sun Aug 3 13:14:51 2003
@@ -37,8 +37,8 @@
* the interrupt service routine is called.
*
* Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
+ * int_cause - The interrupt cause number. In EVB64120 two parameters
+ * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
* bit_num - Indicates which bit number in the cause register
* isr_ptr - Pointer to the interrupt service routine
*/
@@ -52,7 +52,7 @@
* Enables the IRQ on Galileo Chip
*
* Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
+ * int_cause - The interrupt cause number. In EVB64120 two parameters
* are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
* bit_num - Indicates which bit number in the cause register
*
@@ -76,7 +76,7 @@
* Disables the IRQ on Galileo Chip
*
* Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
+ * int_cause - The interrupt cause number. In EVB64120 two parameters
* are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
* bit_num - Indicates which bit number in the cause register
*
diff -Nru a/arch/mips/gt64120/common/pci.c b/arch/mips/gt64120/common/pci.c
--- a/arch/mips/gt64120/common/pci.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1038 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Galileo Evaluation Boards PCI support.
- *
- * The general-purpose functions to read/write and configure the GT64120A's
- * PCI registers (function names start with pci0 or pci1) are either direct
- * copies of functions written by Galileo Technology, or are modifications
- * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
- * are Copyright - Galileo Technology.
- *
- * Other functions are derived from other MIPS PCI implementations, or were
- * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/version.h>
-#include <linux/cache.h>
-#include <asm/pci.h>
-#include <asm/io.h>
-#include <asm/gt64120/gt64120.h>
-
-#include <linux/init.h>
-
-#ifdef CONFIG_PCI
-
-#define SELF 0
-
-/*
- * These functions and structures provide the BIOS scan and mapping of the PCI
- * devices.
- */
-
-#define MAX_PCI_DEVS 10
-
-struct pci_device {
- u32 slot;
- u32 BARtype[6];
- u32 BARsize[6];
-};
-
-static void __init scan_and_initialize_pci(void);
-static u32 __init scan_pci_bus(struct pci_device *pci_devices);
-static void __init allocate_pci_space(struct pci_device *pci_devices);
-
-/*
- * The functions that actually read and write to the controller.
- *
- * Copied from or modified from Galileo Technology code.
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device);
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data);
-static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device);
-static void pci1WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data);
-
-static void pci0MapIOspace(unsigned int pci0IoBase,
- unsigned int pci0IoLength);
-static void pci1MapIOspace(unsigned int pci1IoBase,
- unsigned int pci1IoLength);
-static void pci0MapMemory0space(unsigned int pci0Mem0Base,
- unsigned int pci0Mem0Length);
-static void pci1MapMemory0space(unsigned int pci1Mem0Base,
- unsigned int pci1Mem0Length);
-static void pci0MapMemory1space(unsigned int pci0Mem1Base,
- unsigned int pci0Mem1Length);
-static void pci1MapMemory1space(unsigned int pci1Mem1Base,
- unsigned int pci1Mem1Length);
-static unsigned int pci0GetIOspaceBase(void);
-static unsigned int pci0GetIOspaceSize(void);
-static unsigned int pci0GetMemory0Base(void);
-static unsigned int pci0GetMemory0Size(void);
-static unsigned int pci0GetMemory1Base(void);
-static unsigned int pci0GetMemory1Size(void);
-static unsigned int pci1GetIOspaceBase(void);
-static unsigned int pci1GetIOspaceSize(void);
-static unsigned int pci1GetMemory0Base(void);
-static unsigned int pci1GetMemory0Size(void);
-static unsigned int pci1GetMemory1Base(void);
-static unsigned int pci1GetMemory1Size(void);
-
-
-/* Functions to implement "pci ops" */
-static int galileo_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 * val);
-static int galileo_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 val);
-static void galileo_pcibios_set_master(struct pci_dev *dev);
-
-/*
- * General-purpose PCI functions.
- */
-
-/*
- * pci0MapIOspace - Maps PCI0 IO space for the master.
- * Inputs: base and length of pci0Io
- */
-
-static void pci0MapIOspace(unsigned int pci0IoBase,
- unsigned int pci0IoLength)
-{
- unsigned int pci0IoTop =
- (unsigned int) (pci0IoBase + pci0IoLength);
-
- if (pci0IoLength == 0)
- pci0IoTop++;
-
- pci0IoBase = (unsigned int) (pci0IoBase >> 21);
- pci0IoTop = (unsigned int) (((pci0IoTop - 1) & 0x0fffffff) >> 21);
- GT_WRITE(GT_PCI0IOLD_OFS, pci0IoBase);
- GT_WRITE(GT_PCI0IOHD_OFS, pci0IoTop);
-}
-
-/*
- * pci1MapIOspace - Maps PCI1 IO space for the master.
- * Inputs: base and length of pci1Io
- */
-
-static void pci1MapIOspace(unsigned int pci1IoBase,
- unsigned int pci1IoLength)
-{
- unsigned int pci1IoTop =
- (unsigned int) (pci1IoBase + pci1IoLength);
-
- if (pci1IoLength == 0)
- pci1IoTop++;
-
- pci1IoBase = (unsigned int) (pci1IoBase >> 21);
- pci1IoTop = (unsigned int) (((pci1IoTop - 1) & 0x0fffffff) >> 21);
- GT_WRITE(GT_PCI1IOLD_OFS, pci1IoBase);
- GT_WRITE(GT_PCI1IOHD_OFS, pci1IoTop);
-}
-
-/*
- * pci0MapMemory0space - Maps PCI0 memory0 space for the master.
- * Inputs: base and length of pci0Mem0
- */
-
-static void pci0MapMemory0space(unsigned int pci0Mem0Base,
- unsigned int pci0Mem0Length)
-{
- unsigned int pci0Mem0Top = pci0Mem0Base + pci0Mem0Length;
-
- if (pci0Mem0Length == 0)
- pci0Mem0Top++;
-
- pci0Mem0Base = pci0Mem0Base >> 21;
- pci0Mem0Top = ((pci0Mem0Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI0M0LD_OFS, pci0Mem0Base);
- GT_WRITE(GT_PCI0M0HD_OFS, pci0Mem0Top);
-}
-
-/*
- * pci1MapMemory0space - Maps PCI1 memory0 space for the master.
- * Inputs: base and length of pci1Mem0
- */
-
-static void pci1MapMemory0space(unsigned int pci1Mem0Base,
- unsigned int pci1Mem0Length)
-{
- unsigned int pci1Mem0Top = pci1Mem0Base + pci1Mem0Length;
-
- if (pci1Mem0Length == 0)
- pci1Mem0Top++;
-
- pci1Mem0Base = pci1Mem0Base >> 21;
- pci1Mem0Top = ((pci1Mem0Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI1M0LD_OFS, pci1Mem0Base);
- GT_WRITE(GT_PCI1M0HD_OFS, pci1Mem0Top);
-}
-
-/*
- * pci0MapMemory1space - Maps PCI0 memory1 space for the master.
- * Inputs: base and length of pci0Mem1
- */
-
-static void pci0MapMemory1space(unsigned int pci0Mem1Base,
- unsigned int pci0Mem1Length)
-{
- unsigned int pci0Mem1Top = pci0Mem1Base + pci0Mem1Length;
-
- if (pci0Mem1Length == 0)
- pci0Mem1Top++;
-
- pci0Mem1Base = pci0Mem1Base >> 21;
- pci0Mem1Top = ((pci0Mem1Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI0M1LD_OFS, pci0Mem1Base);
- GT_WRITE(GT_PCI0M1HD_OFS, pci0Mem1Top);
-
-}
-
-/*
- * pci1MapMemory1space - Maps PCI1 memory1 space for the master.
- * Inputs: base and length of pci1Mem1
- */
-
-static void pci1MapMemory1space(unsigned int pci1Mem1Base,
- unsigned int pci1Mem1Length)
-{
- unsigned int pci1Mem1Top = pci1Mem1Base + pci1Mem1Length;
-
- if (pci1Mem1Length == 0)
- pci1Mem1Top++;
-
- pci1Mem1Base = pci1Mem1Base >> 21;
- pci1Mem1Top = ((pci1Mem1Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI1M1LD_OFS, pci1Mem1Base);
- GT_WRITE(GT_PCI1M1HD_OFS, pci1Mem1Top);
-}
-
-/*
- * pci0GetIOspaceBase - Return PCI0 IO Base Address.
- * Inputs: N/A
- * Returns: PCI0 IO Base Address.
- */
-
-static unsigned int pci0GetIOspaceBase(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0IOLD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetIOspaceSize - Return PCI0 IO Bar Size.
- * Inputs: N/A
- * Returns: PCI0 IO Bar Size.
- */
-
-static unsigned int pci0GetIOspaceSize(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0IOLD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0IOHD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci0GetMemory0Base - Return PCI0 Memory 0 Base Address.
- * Inputs: N/A
- * Returns: PCI0 Memory 0 Base Address.
- */
-
-static unsigned int pci0GetMemory0Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0M0LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetMemory0Size - Return PCI0 Memory 0 Bar Size.
- * Inputs: N/A
- * Returns: PCI0 Memory 0 Bar Size.
- */
-
-static unsigned int pci0GetMemory0Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0M0LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0M0HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci0GetMemory1Base - Return PCI0 Memory 1 Base Address.
- * Inputs: N/A
- * Returns: PCI0 Memory 1 Base Address.
- */
-
-static unsigned int pci0GetMemory1Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0M1LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetMemory1Size - Return PCI0 Memory 1 Bar Size.
- * Inputs: N/A
- * Returns: PCI0 Memory 1 Bar Size.
- */
-
-static unsigned int pci0GetMemory1Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetIOspaceBase - Return PCI1 IO Base Address.
- * Inputs: N/A
- * Returns: PCI1 IO Base Address.
- */
-
-static unsigned int pci1GetIOspaceBase(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1IOLD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetIOspaceSize - Return PCI1 IO Bar Size.
- * Inputs: N/A
- * Returns: PCI1 IO Bar Size.
- */
-
-static unsigned int pci1GetIOspaceSize(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1IOLD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1IOHD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetMemory0Base - Return PCI1 Memory 0 Base Address.
- * Inputs: N/A
- * Returns: PCI1 Memory 0 Base Address.
- */
-
-static unsigned int pci1GetMemory0Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1M0LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetMemory0Size - Return PCI1 Memory 0 Bar Size.
- * Inputs: N/A
- * Returns: PCI1 Memory 0 Bar Size.
- */
-
-static unsigned int pci1GetMemory0Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetMemory1Base - Return PCI1 Memory 1 Base Address.
- * Inputs: N/A
- * Returns: PCI1 Memory 1 Base Address.
- */
-
-static unsigned int pci1GetMemory1Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetMemory1Size - Return PCI1 Memory 1 Bar Size.
- * Inputs: N/A
- * Returns: PCI1 Memory 1 Bar Size.
- */
-
-static unsigned int pci1GetMemory1Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-
-
-/*
- * pci_range_ck -
- *
- * Check if the pci device that are trying to access does really exists
- * on the evaluation board.
- *
- * Inputs :
- * bus - bus number (0 for PCI 0 ; 1 for PCI 1)
- * dev - number of device on the specific pci bus
- *
- * Outpus :
- * 0 - if OK , 1 - if failure
- */
-static __inline__ int pci_range_ck(unsigned char bus, unsigned char dev)
-{
- /*
- * We don't even pretend to handle other busses than bus 0 correctly.
- * Accessing device 31 crashes the CP7000 for some reason.
- */
- if ((bus == 0) && (dev != 31))
- return 0;
- return -1;
-}
-
-/*
- * pciXReadConfigReg - Read from a PCI configuration register
- * - Make sure the GT is configured as a master before
- * reading from another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
- * spec)
- * pciDevNum: The device number needs to be addressed.
- * RETURNS: data , if the data == 0xffffffff check the master abort bit in the
- * cause register to make sure the data is valid
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
-
- /*
- * The casual observer might wonder why the READ is duplicated here,
- * rather than immediately following the WRITE, and just have the swap
- * in the "if". That's because there is a latency problem with trying
- * to read immediately after setting up the address register. The "if"
- * check gives enough time for the address to stabilize, so the READ
- * can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return data;
- } else { /* The PCI is working in LE Mode so swap the Data. */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return cpu_to_le32(data);
- }
-}
-
-static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- /*
- * The casual observer might wonder why the READ is duplicated here,
- * rather than immediately following the WRITE, and just have the
- * swap in the "if". That's because there is a latency problem
- * with trying to read immediately after setting up the address
- * register. The "if" check gives enough time for the address
- * to stabilize, so the READ can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- /* when configurating our own PCI 1 L-unit the access is through
- the PCI 0 interface with reg number = reg number + 0x80 */
- DataForRegCf8 |= 0x80;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- } else { /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
- }
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return data;
- } else {
- GT_READ(GT_PCI1_CFGDATA_OFS, &data);
- return cpu_to_le32(data);
- }
-}
-
-
-
-/*
- * pciXWriteConfigReg - Write to a PCI configuration register
- * - Make sure the GT is configured as a master before
- * writingto another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * Inputs: unsigned int regOffset: The register offset as it apears in the
- * GT spec
- * (or any other PCI device spec)
- * pciDevNum: The device number needs to be addressed.
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- } else { /* configuration Transaction over the pci. */
- /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, le32_to_cpu(data));
- }
-}
-
-static void pci1WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- /*
- * There is a latency problem
- * with trying to read immediately after setting up the address
- * register. The "if" check gives enough time for the address
- * to stabilize, so the WRITE can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- /*
- * when configurating our own PCI 1 L-unit the access is through
- * the PCI 0 interface with reg number = reg number + 0x80
- */
- DataForRegCf8 |= 0x80;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- } else { /* configuration Transaction over the pci. */
- /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
- }
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- } else { /* configuration Transaction over the pci. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, le32_to_cpu(data));
- }
-}
-
-
-/*
- * galileo_pcibios_(read/write) -
- *
- * reads/write a dword/word/byte register from the configuration space
- * of a device.
- *
- * Inputs :
- * bus - bus number
- * devfn - device function index
- * offset - register offset in the configuration space
- * size - size of value (1=byte,2=word,4-dword)
- * val - value to be written / read
- *
- * Outputs :
- * PCIBIOS_SUCCESSFUL when operation was succesfull
- * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
- * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
- */
-
-static int galileo_pcibios_read (struct pci_bus *bus, unsigned int devfn, int offset, int size, u32 * val)
-{
- int dev, busnum;
-
- busnum = bus->number;
- dev = PCI_SLOT(devfn);
-
- if (pci_range_ck(busnum, dev)) {
- if(size == 1)
- *val = (u8)0xff;
- else if (size == 2)
- *val = (u16)0xffff;
- else if (size == 4)
- *val = 0xffffffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- if ((size == 2) && (offset & 0x1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (offset & 0x3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (busnum == 0) {
- if(size == 1) {
- *val = (u8)(pci0ReadConfigReg(offset, bus->dev) >>
- ((offset & ~0x3) * 8));
- }else if (size == 2) {
- *val = (u16)(pci0ReadConfigReg(offset, bus->dev) >>
- ((offset & ~0x3) * 8));
- }else if (size == 4) {
- *val = pci0ReadConfigReg(offset, bus->dev);
- }
- }
-
- /*
- * This is so that the upper PCI layer will get the correct return
- * value if we're not attached to anything.
- */
- switch (size) {
- case 1:
- if ((offset == 0xe) && (*val == (u8)0xff)) {
- u32 MasterAbort;
- GT_READ(GT_INTRCAUSE_OFS, &MasterAbort);
- if (MasterAbort & 0x40000) {
- GT_WRITE(GT_INTRCAUSE_OFS,
- (MasterAbort & 0xfffbffff));
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- }
- break;
- case 4:
- if ((offset == 0) && (*val == 0xffffffff)) {
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- break
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int galileo_pcibios_write(struct pci_bus *bus, unsigned int devfn, int offset, int size, u32 val)
-{
- int dev, busnum;
- unsigned long tmp;
-
- busnum = bus->number;
- dev = PCI_SLOT(devfn);
-
- if (pci_range_ck(busnum, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
- if (size == 4) {
- if (offset & 0x3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if(busnum == 0)
- pci0WriteConfigReg(offset, bus->dev, val);
- //if (busnum == 1) pci1WriteConfigReg (offset,bus->dev,val);
- return PCIBIOS_SUCCESSFUL;
- }
- if ((size == 2) && (offset & 0x1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (busnum == 0){
- tmp = pci0ReadConfigReg(offset, bus->dev);
- //if (busnum == 1) tmp = pci1ReadConfigReg (offset,bus->dev);
- if (size == 1) {
- if ((offset % 4) == 0)
- tmp = (tmp & 0xffffff00) | (val & (u8)0xff);
- if ((offset % 4) == 1)
- tmp = (tmp & 0xffff00ff) | ((val & (u8)0xff) << 8);
- if ((offset % 4) == 2)
- tmp = (tmp & 0xff00ffff) | ((val & (u8)0xff) << 16);
- if ((offset % 4) == 3)
- tmp = (tmp & 0x00ffffff) | ((val & (u8)0xff) << 24);
- } else if (size == 2) {
- if ((offset % 4) == 0)
- tmp = (tmp & 0xffff0000) | (val & (u16)0xffff);
- if ((offset % 4) == 2)
- tmp = (tmp & 0x0000ffff) | ((val & (u16)0xffff) << 16);
- }
- if (busnum == 0)
- pci0WriteConfigReg(offset, bus->dev, tmp);
- //if (busnum == 1) pci1WriteConfigReg (offset,bus->dev,tmp);
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void galileo_pcibios_set_master(struct pci_dev *dev)
-{
- u16 cmd;
-
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- galileo_pcibios_write(dev->bus, dev->devfn, PCI_COMMAND, 2, cmd);
-}
-
-/* Externally-expected functions. Do not change function names */
-
-int pcibios_enable_resources(struct pci_dev *dev)
-{
- u16 cmd, old_cmd;
- u8 tmp1;
- int idx;
- struct resource *r;
-
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
- old_cmd = cmd;
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of "
- "resource collisions\n", dev->slot_name);
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- galileo_pcibios_write(dev->bus, dev->devfn, PCI_COMMAND, 2, cmd);
- }
-
- /*
- * Let's fix up the latency timer and cache line size here. Cache
- * line size = 32 bytes / sizeof dword (4) = 8.
- * Latency timer must be > 8. 32 is random but appears to work.
- */
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_CACHE_LINE_SIZE, 1, &tmp1);
- if (tmp1 != 8) {
- printk(KERN_WARNING "PCI setting cache line size to 8 from "
- "%d\n", tmp1);
- galileo_pcibios_write(dev->bus, dev->devfn, PCI_CACHE_LINE_SIZE, 1, 8);
- }
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_LATENCY_TIMER, 1, &tmp1);
- if (tmp1 < 32) {
- printk(KERN_WARNING "PCI setting latency timer to 32 from %d\n",
- tmp1);
- galileo_pcibios_write(dev->bus, dev->devfn, PCI_LATENCY_TIMER, 1, 32);
- }
-
- return 0;
-}
-
-int pcibios_enable_device(struct pci_dev *dev)
-{
- return pcibios_enable_resources(dev);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
- struct pci_dev *dev = data;
-
- if (res->flags & IORESOURCE_IO) {
- unsigned long start = res->start;
-
- /* We need to avoid collisions with `mirrored' VGA ports
- and other strange ISA hardware, so we always want the
- addresses kilobyte aligned. */
- if (size > 0x100) {
- printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", dev->slot_name,
- dev->resource - res, size);
- }
-
- start = (start + 1024 - 1) & ~(1024 - 1);
- res->start = start;
- }
-}
-
-struct pci_ops galileo_pci_ops = {
- .read = galileo_pcibios_read,
- .write = galileo_pcibios_write,
-};
-
-struct pci_fixup pcibios_fixups[] = {
- {0}
-};
-
-void __init pcibios_fixup_bus(struct pci_bus *c)
-{
- gt64120_board_pcibios_fixup_bus(c);
-}
-
-/*
- * This code was derived from Galileo Technology's example
- * and significantly reworked.
- *
- * This is very simple. It does not scan multiple function devices. It does
- * not scan behind bridges. Those would be simple to implement, but we don't
- * currently need this.
- */
-
-static void __init scan_and_initialize_pci(void)
-{
- struct pci_device pci_devices[MAX_PCI_DEVS];
-
- if (scan_pci_bus(pci_devices)) {
- allocate_pci_space(pci_devices);
- }
-}
-
-/*
- * This is your basic PCI scan. It goes through each slot and checks to
- * see if there's something that responds. If so, then get the size and
- * type of each of the responding BARs. Save them for later.
- */
-
-static u32 __init scan_pci_bus(struct pci_device *pci_devices)
-{
- u32 arrayCounter = 0;
- u32 memType;
- u32 memSize;
- u32 pci_slot, bar;
- u32 id;
- u32 c18RegValue;
- struct pci_dev device;
-
- /*
- * According to PCI REV 2.1 MAX agents on the bus are 21.
- * We don't bother scanning ourselves (slot 0).
- */
- for (pci_slot = 1; pci_slot < 22; pci_slot++) {
-
- device.devfn = PCI_DEVFN(pci_slot, 0);
- id = pci0ReadConfigReg(PCI_VENDOR_ID, &device);
-
- /*
- * Check for a PCI Master Abort (nothing responds in the
- * slot)
- */
- GT_READ(GT_INTRCAUSE_OFS, &c18RegValue);
- /*
- * Clearing bit 18 of in the Cause Register 0xc18 by
- * writting 0.
- */
- GT_WRITE(GT_INTRCAUSE_OFS, (c18RegValue & 0xfffbffff));
- if ((id != 0xffffffff) && !(c18RegValue & 0x40000)) {
- pci_devices[arrayCounter].slot = pci_slot;
- for (bar = 0; bar < 6; bar++) {
- memType =
- pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device);
- pci_devices[arrayCounter].BARtype[bar] =
- memType & 1;
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device,
- 0xffffffff);
- memSize =
- pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device);
- if (memType & 1) { /* IO space */
- pci_devices[arrayCounter].
- BARsize[bar] =
- ~(memSize & 0xfffffffc) + 1;
- } else { /* memory space */
- pci_devices[arrayCounter].
- BARsize[bar] =
- ~(memSize & 0xfffffff0) + 1;
- }
- } /* BAR counter */
-
- arrayCounter++;
- }
- /* found a device */
- } /* slot counter */
-
- if (arrayCounter < MAX_PCI_DEVS)
- pci_devices[arrayCounter].slot = -1;
-
- return arrayCounter;
-}
-
-/*
- * This function goes through the list of devices and allocates the BARs in
- * either IO or MEM space. It does it in order of size, which will limit the
- * amount of fragmentation we have in the IO and MEM spaces.
- */
-
-static void __init allocate_pci_space(struct pci_device *pci_devices)
-{
- u32 count, maxcount, bar;
- u32 maxSize, maxDevice, maxBAR;
- u32 alignto;
- u32 base;
- u32 pci0_mem_base = pci0GetMemory0Base();
- u32 pci0_io_base = pci0GetIOspaceBase();
- struct pci_dev device;
-
- /* How many PCI devices do we have? */
- maxcount = MAX_PCI_DEVS;
- for (count = 0; count < MAX_PCI_DEVS; count++) {
- if (pci_devices[count].slot == -1) {
- maxcount = count;
- break;
- }
- }
-
- do {
- /* Find the largest size BAR we need to allocate */
- maxSize = 0;
- for (count = 0; count < maxcount; count++) {
- for (bar = 0; bar < 6; bar++) {
- if (pci_devices[count].BARsize[bar] >
- maxSize) {
- maxSize =
- pci_devices[count].
- BARsize[bar];
- maxDevice = count;
- maxBAR = bar;
- }
- }
- }
-
- /*
- * We've found the largest BAR. Allocate it into IO or
- * mem space. We don't idiot check the bases to make
- * sure they haven't overflowed the current size for that
- * aperture.
- * Don't bother to enable the device's IO or MEM space here.
- * That will be done in pci_enable_resources if the device is
- * activated by a driver.
- */
- if (maxSize) {
- device.devfn =
- PCI_DEVFN(pci_devices[maxDevice].slot, 0);
- if (pci_devices[maxDevice].BARtype[maxBAR] == 1) {
- alignto = max(0x1000U, maxSize);
- base = ALIGN(pci0_io_base, alignto);
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (maxBAR * 4), &device,
- base | 0x1);
- pci0_io_base = base + alignto;
- } else {
- alignto = max(0x1000U, maxSize);
- base = ALIGN(pci0_mem_base, alignto);
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (maxBAR * 4), &device,
- base);
- pci0_mem_base = base + alignto;
- }
- /*
- * This entry is finished. Remove it from the list
- * we'll scan.
- */
- pci_devices[maxDevice].BARsize[maxBAR] = 0;
- }
- } while (maxSize);
-}
-
-void __init pcibios_init(void)
-{
- u32 tmp;
- struct pci_dev controller;
-
- controller.devfn = SELF;
-
- GT_READ(GT_PCI0_CMD_OFS, &tmp);
- GT_READ(GT_PCI0_BARE_OFS, &tmp);
-
- /*
- * You have to enable bus mastering to configure any other
- * card on the bus.
- */
- tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
- tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
- pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
-
- /* This scans the PCI bus and sets up initial values. */
- scan_and_initialize_pci();
-
- /*
- * Reset PCI I/O and PCI MEM values to ones supported by EVM.
- */
- ioport_resource.start = GT_PCI_IO_BASE;
- ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
- iomem_resource.start = GT_PCI_MEM_BASE;
- iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1;
-
- pci_scan_bus(0, &galileo_pci_ops, NULL);
-}
-
-/*
- * for parsing "pci=" kernel boot arguments.
- */
-char *pcibios_setup(char *str)
-{
- printk(KERN_INFO "rr: pcibios_setup\n");
- /* Nothing to do for now. */
-
- return str;
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-#endif /* CONFIG_PCI */
diff -Nru a/arch/mips/gt64120/momenco_ocelot/Makefile b/arch/mips/gt64120/momenco_ocelot/Makefile
--- a/arch/mips/gt64120/momenco_ocelot/Makefile Sun Aug 3 13:14:45 2003
+++ b/arch/mips/gt64120/momenco_ocelot/Makefile Sun Aug 3 13:14:45 2003
@@ -2,8 +2,8 @@
# Makefile for Momentum's Ocelot board.
#
-EXTRA_AFLAGS := $(CFLAGS)
+obj-y += int-handler.o irq.o prom.o reset.o setup.o
-obj-y += int-handler.o irq.o pci.o prom.o reset.o setup.o
+obj-$(CONFIG_KGDB) += dbg_io.o
-obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
--- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c Sun Aug 3 13:14:53 2003
@@ -1,6 +1,8 @@
#include <linux/config.h>
-#if defined(CONFIG_REMOTE_DEBUG)
+#if defined(CONFIG_KGDB)
+
+#include <asm/serial.h> /* For the serial port location and base baud */
/* --- CONFIG --- */
@@ -36,8 +38,8 @@
/* === CONFIG === */
/* [jsun] we use the second serial port for kdb */
-#define BASE 0xbd000020
-#define MAX_BAUD 115200
+#define BASE OCELOT_SERIAL1_BASE
+#define MAX_BAUD OCELOT_BASE_BAUD
/* === END OF CONFIG === */
@@ -111,7 +113,7 @@
{
if (!remoteDebugInitialized) {
remoteDebugInitialized = 1;
- debugInit(UART16550_BAUD_9600,
+ debugInit(UART16550_BAUD_38400,
UART16550_DATA_8BIT,
UART16550_PARITY_NONE, UART16550_STOP_1BIT);
}
diff -Nru a/arch/mips/gt64120/momenco_ocelot/int-handler.S b/arch/mips/gt64120/momenco_ocelot/int-handler.S
--- a/arch/mips/gt64120/momenco_ocelot/int-handler.S Sun Aug 3 13:14:46 2003
+++ b/arch/mips/gt64120/momenco_ocelot/int-handler.S Sun Aug 3 13:14:46 2003
@@ -9,7 +9,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
@@ -26,11 +25,11 @@
SAVE_ALL
CLI
.set at
- mfc0 t0, CP0_CAUSE
+ mfc0 t0, CP0_CAUSE
mfc0 t2, CP0_STATUS
and t0, t2
-
+
andi t1, t0, STATUSF_IP2 /* int0 hardware line */
bnez t1, ll_pri_enet_irq
andi t1, t0, STATUSF_IP3 /* int1 hardware line */
@@ -45,7 +44,7 @@
bnez t1, ll_cputimer_irq
/* now look at the extended interrupts */
- mfc0 t0, CP0_CAUSE
+ mfc0 t0, CP0_CAUSE
cfc0 t1, CP0_S1_INTCONTROL
/* shift the mask 8 bits left to line up the bits */
@@ -88,7 +87,7 @@
move a1, sp
jal do_IRQ
j ret_from_irq
-
+
ll_cpci_irq:
li a0, 5
move a1, sp
@@ -106,7 +105,7 @@
move a1, sp
jal do_IRQ
j ret_from_irq
-
+
ll_pmc1_irq:
li a0, 8
move a1, sp
diff -Nru a/arch/mips/gt64120/momenco_ocelot/irq.c b/arch/mips/gt64120/momenco_ocelot/irq.c
--- a/arch/mips/gt64120/momenco_ocelot/irq.c Sun Aug 3 13:14:44 2003
+++ b/arch/mips/gt64120/momenco_ocelot/irq.c Sun Aug 3 13:14:44 2003
@@ -28,6 +28,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
@@ -40,7 +41,6 @@
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
-#include <linux/irq.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
@@ -61,18 +61,18 @@
/* do the low 8 bits first */
clr_mask = 0xff & clr_mask_in;
set_mask = 0xff & set_mask_in;
- status = read_32bit_cp0_register(CP0_STATUS);
+ status = read_c0_status();
status &= ~((clr_mask & 0xFF) << 8);
status |= (set_mask & 0xFF) << 8;
- write_32bit_cp0_register(CP0_STATUS, status);
+ write_c0_status(status);
/* do the high 8 bits */
clr_mask = 0xff & (clr_mask_in >> 8);
set_mask = 0xff & (set_mask_in >> 8);
- status = read_32bit_cp0_set1_register(CP0_S1_INTCONTROL);
+ status = read_c0_intcontrol();
status &= ~((clr_mask & 0xFF) << 8);
status |= (set_mask & 0xFF) << 8;
- write_32bit_cp0_set1_register(CP0_S1_INTCONTROL, status);
+ write_c0_intcontrol(status);
}
static inline void mask_irq(unsigned int irq)
@@ -146,7 +146,7 @@
* Clear all of the interrupts while we change the able around a bit.
* int-handler is not on bootstrap
*/
- clear_cp0_status(ST0_IM | ST0_BEV);
+ clear_c0_status(ST0_IM);
local_irq_disable();
/* Sets the first-level interrupt dispatcher. */
@@ -162,7 +162,7 @@
gt64120_irq_init();
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
printk("start kgdb ...\n");
set_debug_traps();
breakpoint(); /* you may move this line to whereever you want :-) */
diff -Nru a/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h b/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h
--- a/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h Sun Aug 3 13:14:51 2003
+++ b/arch/mips/gt64120/momenco_ocelot/ocelot_pld.h Sun Aug 3 13:14:51 2003
@@ -1,14 +1,10 @@
/*
- * $Id$
- *
* Ocelot Board Register Definitions
*
* (C) 2001 Red Hat, Inc.
*
* GPL'd
- *
*/
-
#ifndef __MOMENCO_OCELOT_PLD_H__
#define __MOMENCO_OCELOT_PLD_H__
diff -Nru a/arch/mips/gt64120/momenco_ocelot/pci.c b/arch/mips/gt64120/momenco_ocelot/pci.c
--- a/arch/mips/gt64120/momenco_ocelot/pci.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,75 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/gt64120/momenco_ocelot/pci.c
- * Board-specific PCI routines for gt64120 controller.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/version.h>
-#include <linux/init.h>
-#include <asm/pci.h>
-
-
-void __init gt64120_board_pcibios_fixup_bus(struct pci_bus *bus)
-{
- struct pci_bus *current_bus = bus;
- struct pci_dev *devices;
- struct list_head *devices_link;
- u16 cmd;
-
- list_for_each(devices_link, &(current_bus->devices)) {
-
- devices = pci_dev_b(devices_link);
- if (devices == NULL)
- continue;
-
- if (PCI_SLOT(devices->devfn) == 1) {
- /*
- * Slot 1 is primary ether port, i82559
- * we double-check against that assumption
- */
- if ((devices->vendor != 0x8086) ||
- (devices->device != 0x1209) ) {
- panic("gt64120_board_pcibios_fixup_bus: found "
- "unexpected PCI device in slot 1.");
- }
- devices->irq = 2; /* irq_nr is 2 for INT0 */
- } else if (PCI_SLOT(devices->devfn) == 2) {
- /*
- * Slot 2 is secondary ether port, i21143
- * we double-check against that assumption
- */
- if ((devices->vendor != 0x1011) ||
- (devices->device != 0x19) ) {
- panic("galileo_pcibios_fixup_bus: "
- "found unexpected PCI device in slot 2.");
- }
- devices->irq = 3; /* irq_nr is 3 for INT1 */
- } else if (PCI_SLOT(devices->devfn) == 4) {
- /* PMC Slot 1 */
- devices->irq = 8; /* irq_nr is 8 for INT6 */
- } else if (PCI_SLOT(devices->devfn) == 5) {
- /* PMC Slot 1 */
- devices->irq = 9; /* irq_nr is 9 for INT7 */
- } else {
- /* We don't have assign interrupts for other devices. */
- devices->irq = 0xff;
- }
-
- /* Assign an interrupt number for the device */
- bus->ops->write_byte(devices, PCI_INTERRUPT_LINE, devices->irq);
-
- /* enable master */
- bus->ops->read_word(devices, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- bus->ops->write_word(devices, PCI_COMMAND, cmd);
- }
-}
diff -Nru a/arch/mips/gt64120/momenco_ocelot/prom.c b/arch/mips/gt64120/momenco_ocelot/prom.c
--- a/arch/mips/gt64120/momenco_ocelot/prom.c Sun Aug 3 13:14:44 2003
+++ b/arch/mips/gt64120/momenco_ocelot/prom.c Sun Aug 3 13:14:44 2003
@@ -15,29 +15,35 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#define PLD_BASE 0xbc000000
+struct callvectors {
+ int (*open) (char*, int, int);
+ int (*close) (int);
+ int (*read) (int, void*, int);
+ int (*write) (int, void*, int);
+ off_t (*lseek) (int, off_t, int);
+ int (*printf) (const char*, ...);
+ void (*cacheflush) (void);
+ char* (*gets) (char*);
+};
-#define REV 0x0 /* Board Assembly Revision */
-#define PLD1ID 0x1 /* PLD 1 ID */
-#define PLD2ID 0x2 /* PLD 2 ID */
-#define RESET_STAT 0x3 /* Reset Status Register */
-#define BOARD_STAT 0x4 /* Board Status Register */
-#define CPCI_ID 0x5 /* Compact PCI ID Register */
-#define CONTROL 0x8 /* Control Register */
-#define CPU_EEPROM 0x9 /* CPU Configuration EEPROM Register */
-#define INTMASK 0xA /* Interrupt Mask Register */
-#define INTSTAT 0xB /* Interrupt Status Register */
-#define INTSET 0xC /* Interrupt Set Register */
-#define INTCLR 0xD /* Interrupt Clear Register */
+struct callvectors* debug_vectors;
+char arcs_cmdline[CL_SIZE];
-#define PLD_REG(x) ((uint8_t*)(PLD_BASE+(x)))
+extern unsigned long gt64120_base;
-char arcs_cmdline[COMMAND_LINE_SIZE];
+const char *get_system_type(void)
+{
+ return "Momentum Ocelot";
+}
/* [jsun@junsun.net] PMON passes arguments in C main() style */
-void __init prom_init(int argc, const char **arg)
+void __init prom_init(int argc, char **arg, char** env, struct callvectors *cv)
{
int i;
+ uint32_t tmp;
+
+ /* save the PROM vectors for debugging use */
+ debug_vectors = cv;
/* arg[0] is "g", the rest is boot parameters */
arcs_cmdline[0] = '\0';
@@ -52,9 +58,16 @@
mips_machgroup = MACH_GROUP_MOMENCO;
mips_machtype = MACH_MOMENCO_OCELOT;
- /* turn off the Bit Error LED, which comes on automatically
- * at power-up reset */
- *PLD_REG(INTCLR) = 0x80;
+ while (*env) {
+ if (strncmp("gtbase", *env, 6) == 0) {
+ gt64120_base = simple_strtol(*env + strlen("gtbase="),
+ NULL, 16);
+ break;
+ }
+ *env++;
+ }
+
+ debug_vectors->printf("Booting Linux kernel...\n");
/* All the boards have at least 64MiB. If there's more, we
detect and register it later */
diff -Nru a/arch/mips/gt64120/momenco_ocelot/reset.c b/arch/mips/gt64120/momenco_ocelot/reset.c
--- a/arch/mips/gt64120/momenco_ocelot/reset.c Sun Aug 3 13:14:45 2003
+++ b/arch/mips/gt64120/momenco_ocelot/reset.c Sun Aug 3 13:14:45 2003
@@ -15,22 +15,21 @@
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
+#include <linux/delay.h>
void momenco_ocelot_restart(char *command)
{
- *(volatile char *) 0xbc000000 = 0x0f;
+ void *nvram = ioremap_nocache(0x2c807000, 0x1000);
- /*
- * Ouch, we're still alive ... This time we take the silver bullet ...
- * ... and find that we leave the hardware in a state in which the
- * kernel in the flush locks up somewhen during of after the PCI
- * detection stuff.
- */
- clear_cp0_status(ST0_BEV | ST0_ERL);
- change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
- flush_cache_all();
- write_32bit_cp0_register(CP0_WIRED, 0);
- __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+ if (!nvram) {
+ printk(KERN_NOTICE "ioremap of reset register failed\n");
+ return;
+ }
+ writeb(0x84, nvram + 0xff7); /* Ask the NVRAM/RTC/watchdog chip to
+ assert reset in 1/16 second */
+ mdelay(10+(1000/16));
+ iounmap(nvram);
+ printk(KERN_NOTICE "Watchdog reset failed\n");
}
void momenco_ocelot_halt(void)
diff -Nru a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
--- a/arch/mips/gt64120/momenco_ocelot/setup.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c Sun Aug 3 13:14:48 2003
@@ -2,11 +2,12 @@
* setup.c
*
* BRIEF MODULE DESCRIPTION
- * Galileo Evaluation Boards - board dependent boot routines
+ * Momentum Computer Ocelot (CP7000) - board dependent boot routines
*
* Copyright (C) 1996, 1997, 2001 Ralf Baechle
* Copyright (C) 2000 RidgeRun, Inc.
* Copyright (C) 2001 Red Hat, Inc.
+ * Copyright (C) 2002 Momentum Computer
*
* Author: RidgeRun, Inc.
* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
@@ -58,6 +59,7 @@
#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/mc146818rtc.h>
+#include <asm/traps.h>
#include <linux/version.h>
#include <linux/bootmem.h>
#include <linux/initrd.h>
@@ -82,25 +84,9 @@
static void __init setup_l3cache(unsigned long size);
-void __init momenco_ocelot_setup(void)
+/* setup code for a handoff from a version 1 PMON 2000 PROM */
+void PMON_v1_setup()
{
- void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
- unsigned int tmpword;
-
- board_time_init = gt64120_time_init;
-
- _machine_restart = momenco_ocelot_restart;
- _machine_halt = momenco_ocelot_halt;
- _machine_power_off = momenco_ocelot_power_off;
-
- /*
- * initrd_start = (ulong)ocelot_initrd_start;
- * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
- * initrd_below_start_ok = 1;
- */
- rtc_ops = &no_rtc_ops;
-
-
/* A wired TLB entry for the GT64120A and the serial port. The
GT64120A is going to be hit on every IRQ anyway - there's
absolutely no point in letting it be a random TLB entry, as
@@ -116,18 +102,16 @@
/* Also a temporary entry to let us talk to the Ocelot PLD and NVRAM
in the CS[012] region. We can't use ioremap() yet. The NVRAM
- appears to be one of the variants of ST M48T35 - see
- http://www.st.com/stonline/bin/sftab.exe?table=172&filter0=M48T35
+ is a ST M48T37Y, which includes NVRAM, RTC, and Watchdog functions.
Ocelot PLD (CS0) 0x2c000000 0xe0020000
NVRAM 0x2c800000 0xe0030000
*/
-
- add_temporary_entry(ENTRYLO(0x2C000000), ENTRYLO(0x2d000000), 0xe0020000, PM_64K);
+ add_temporary_entry(ENTRYLO(0x2C000000), ENTRYLO(0x2d000000), 0xe0020000, PM_64K);
/* Relocate the CS3/BootCS region */
- GT_WRITE( GT_CS3BOOTLD_OFS, 0x2f000000 >> 21);
+ GT_WRITE(GT_CS3BOOTLD_OFS, 0x2f000000 >> 21);
/* Relocate CS[012] */
GT_WRITE(GT_CS20LD_OFS, 0x2c000000 >> 21);
@@ -142,19 +126,76 @@
GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x24000000);
GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000024);
GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x24000001);
+}
- /* Relocate PCI0 I/O and Mem0 */
- GT_WRITE(GT_PCI0IOLD_OFS, 0x20000000 >> 21);
- GT_WRITE(GT_PCI0M0LD_OFS, 0x22000000 >> 21);
+/* setup code for a handoff from a version 2 PMON 2000 PROM */
+void PMON_v2_setup()
+{
+ /* A wired TLB entry for the GT64120A and the serial port. The
+ GT64120A is going to be hit on every IRQ anyway - there's
+ absolutely no point in letting it be a random TLB entry, as
+ it'll just cause needless churning of the TLB. And we use
+ the other half for the serial port, which is just a PITA
+ otherwise :)
- /* Relocate PCI0 Mem1 */
- GT_WRITE(GT_PCI0M1LD_OFS, 0x36000000 >> 21);
+ Device Physical Virtual
+ GT64120 Internal Regs 0xf4000000 0xe0000000
+ UARTs (CS2) 0xfd000000 0xe0001000
+ */
+ add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xfD000000), 0xe0000000, PM_4K);
+
+ /* Also a temporary entry to let us talk to the Ocelot PLD and NVRAM
+ in the CS[012] region. We can't use ioremap() yet. The NVRAM
+ is a ST M48T37Y, which includes NVRAM, RTC, and Watchdog functions.
+
+ Ocelot PLD (CS0) 0xfc000000 0xe0020000
+ NVRAM 0xfc800000 0xe0030000
+ */
+ add_temporary_entry(ENTRYLO(0xfC000000), ENTRYLO(0xfd000000), 0xe0020000, PM_64K);
+
+ gt64120_base = 0xe0000000;
+}
+
+void __init momenco_ocelot_setup(void)
+{
+ void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
+ unsigned int tmpword;
+
+ board_time_init = gt64120_time_init;
+
+ _machine_restart = momenco_ocelot_restart;
+ _machine_halt = momenco_ocelot_halt;
+ _machine_power_off = momenco_ocelot_power_off;
+
+ /*
+ * initrd_start = (ulong)ocelot_initrd_start;
+ * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
+ * initrd_below_start_ok = 1;
+ */
+ rtc_ops = &no_rtc_ops;
+
+ /* do handoff reconfiguration */
+ if (gt64120_base == KSEG1ADDR(GT_DEF_BASE))
+ PMON_v1_setup();
+ else
+ PMON_v2_setup();
+
+ /* Turn off the Bit-Error LED */
+ OCELOT_PLD_WRITE(0x80, INTCLR);
/* Relocate all the PCI1 stuff, not that we use it */
GT_WRITE(GT_PCI1IOLD_OFS, 0x30000000 >> 21);
GT_WRITE(GT_PCI1M0LD_OFS, 0x32000000 >> 21);
GT_WRITE(GT_PCI1M1LD_OFS, 0x34000000 >> 21);
+ /* Relocate PCI0 I/O and Mem0 */
+ GT_WRITE(GT_PCI0IOLD_OFS, 0x20000000 >> 21);
+ GT_WRITE(GT_PCI0M0LD_OFS, 0x22000000 >> 21);
+
+ /* Relocate PCI0 Mem1 */
+ GT_WRITE(GT_PCI0M1LD_OFS, 0x36000000 >> 21);
+
+ /* For the initial programming, we assume 512MB configuration */
/* Relocate the CPU's view of the RAM... */
GT_WRITE(GT_SCS10LD_OFS, 0);
GT_WRITE(GT_SCS10HD_OFS, 0x0fe00000 >> 21);
@@ -207,17 +248,66 @@
switch(tmpword &3) {
case 3:
/* 512MiB */
- add_memory_region(256<<20, 256<<20, BOOT_MEM_RAM);
+ /* Decoders are allready set -- just add the
+ * appropriate region */
+ add_memory_region( 0x40<<20, 0xC0<<20, BOOT_MEM_RAM);
+ add_memory_region(0x100<<20, 0x100<<20, BOOT_MEM_RAM);
+ break;
case 2:
- /* 256MiB */
- /* FIXME: Is it actually here, or at 0x10000000? */
- add_memory_region(128<<20, 128<<20, BOOT_MEM_RAM);
+ /* 256MiB -- two banks of 128MiB */
+ GT_WRITE(GT_SCS10HD_OFS, 0x07e00000 >> 21);
+ GT_WRITE(GT_SCS32LD_OFS, 0x08000000 >> 21);
+ GT_WRITE(GT_SCS32HD_OFS, 0x0fe00000 >> 21);
+
+ GT_WRITE(GT_SCS0HD_OFS, 0x7f);
+ GT_WRITE(GT_SCS2LD_OFS, 0x80);
+ GT_WRITE(GT_SCS2HD_OFS, 0xff);
+
+ /* reconfigure the PCI0 interface view of memory */
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000014);
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x08000000);
+ GT_WRITE(GT_PCI0_BS_SCS10_OFS, 0x0ffff000);
+ GT_WRITE(GT_PCI0_BS_SCS32_OFS, 0x0ffff000);
+
+ add_memory_region(0x40<<20, 0x40<<20, BOOT_MEM_RAM);
+ add_memory_region(0x80<<20, 0x80<<20, BOOT_MEM_RAM);
+ break;
case 1:
- /* 128MiB */
- add_memory_region(64<<20, 64<<20, BOOT_MEM_RAM);
+ /* 128MiB -- 64MiB per bank */
+ GT_WRITE(GT_SCS10HD_OFS, 0x03e00000 >> 21);
+ GT_WRITE(GT_SCS32LD_OFS, 0x04000000 >> 21);
+ GT_WRITE(GT_SCS32HD_OFS, 0x07e00000 >> 21);
+
+ GT_WRITE(GT_SCS0HD_OFS, 0x3f);
+ GT_WRITE(GT_SCS2LD_OFS, 0x40);
+ GT_WRITE(GT_SCS2HD_OFS, 0x7f);
+
+ /* reconfigure the PCI0 interface view of memory */
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000014);
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x04000000);
+ GT_WRITE(GT_PCI0_BS_SCS10_OFS, 0x03fff000);
+ GT_WRITE(GT_PCI0_BS_SCS32_OFS, 0x03fff000);
+
+ /* add the appropriate region */
+ add_memory_region(0x40<<20, 0x40<<20, BOOT_MEM_RAM);
+ break;
case 0:
/* 64MiB */
- ;
+ GT_WRITE(GT_SCS10HD_OFS, 0x01e00000 >> 21);
+ GT_WRITE(GT_SCS32LD_OFS, 0x02000000 >> 21);
+ GT_WRITE(GT_SCS32HD_OFS, 0x03e00000 >> 21);
+
+ GT_WRITE(GT_SCS0HD_OFS, 0x1f);
+ GT_WRITE(GT_SCS2LD_OFS, 0x20);
+ GT_WRITE(GT_SCS2HD_OFS, 0x3f);
+
+ /* reconfigure the PCI0 interface view of memory */
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000014);
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x04000000);
+ GT_WRITE(GT_PCI0_BS_SCS10_OFS, 0x01fff000);
+ GT_WRITE(GT_PCI0_BS_SCS32_OFS, 0x01fff000);
+
+ break;
}
/* Fix up the DiskOnChip mapping */
@@ -233,7 +323,7 @@
{
int register i;
unsigned long tmp;
-
+
printk("Enabling L3 cache...");
/* Enable the L3 cache in the GT64120A's CPU Configuration register */
@@ -241,11 +331,11 @@
GT_WRITE(0, tmp | (1<<14));
/* Enable the L3 cache in the CPU */
- set_cp0_config(1<<12 /* CONF_TE */);
+ set_c0_config(1<<12 /* CONF_TE */);
/* Clear the cache */
- set_taglo(0);
- set_taghi(0);
+ write_c0_taglo(0);
+ write_c0_taghi(0);
for (i=0; i < size; i+= 4096) {
__asm__ __volatile__ (
@@ -272,11 +362,13 @@
static int io_base_ioremap(void)
{
void *io_remap_range = ioremap(GT_PCI_IO_BASE, GT_PCI_IO_SIZE);
+
if (!io_remap_range) {
- panic("Could not ioremap I/O port range\n");
+ panic("Could not ioremap I/O port range");
}
- mips_io_port_base = io_remap_range - GT_PCI_IO_BASE;
+ set_io_port_base(io_remap_range - GT_PCI_IO_BASE);
+
return 0;
}
-module_init(io_base_ioremap);
+module_init(io_base_ioremap);
diff -Nru a/arch/mips/hp-lj/Makefile b/arch/mips/hp-lj/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,26 @@
+#
+# Makefile for the HP specific kernel interface routines
+# under Linux.
+#
+
+obj-y := init.o setup.o irq.o int-handler.o utils.o asic.o
+
+obj-$(CONFIG_KGDB) += gdb_hook.o
+obj-$(CONFIG_DIRECT_PRINTK) += gdb_hook.o
+
+obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o
+
+forceit:
+
+# package filesystem from rootfs directory into binary package
+romfs.bin: forceit ./rootfs
+ @genromfs -d ./rootfs -f $@
+
+# transform rootfs.bin into object file format for linking
+initrd.o: romfs.bin
+ @echo "" | $(CROSS_COMPILE)as -o $@
+ @$(CROSS_COMPILE)objcopy --add-section .initrd=$< $@
+
+EXTRA_AFLAGS := $(CFLAGS)
+
+.PHONY: forceit
diff -Nru a/arch/mips/hp-lj/asic.c b/arch/mips/hp-lj/asic.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/asic.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,28 @@
+
+
+#include "asm/hp-lj/asic.h"
+
+AsicId GetAsicId(void)
+{
+ static int asic = IllegalAsic;
+
+ if (asic == IllegalAsic) {
+ if (*(unsigned int *)0xbff70000 == 0x1114103c)
+ asic = HarmonyAsic;
+ else if (*(unsigned int *)0xbff80000 == 0x110d103c)
+ asic = AndrosAsic;
+ else
+ asic = UnknownAsic;
+ }
+ return asic;
+}
+
+
+const char* const GetAsicName(void)
+{
+ static const char* const Names[] =
+ { "Illegal", "Unknown", "Andros", "Harmony" };
+
+ return Names[(int)GetAsicId()];
+}
+
diff -Nru a/arch/mips/hp-lj/gdb_hook.c b/arch/mips/hp-lj/gdb_hook.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/gdb_hook.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,99 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * This is the interface to the remote debugger stub.
+ */
+#include <linux/serialP.h>
+#include <linux/serial_reg.h>
+
+#include <asm/serial.h>
+#include <asm/io.h>
+#include <asm/hp-lj/asic.h>
+
+
+int putDebugChar(char c);
+char getDebugChar(void);
+
+
+/////////////////////// andros values ///////////////////////////////////////////////////////
+#define SERIAL_REG(offset) (*((volatile unsigned int*)(HPSR_BASE_ADDR|offset)))
+
+// Register set base address
+#define HPSR_BASE_ADDR 0xbfe00000UL
+
+// Transmit / Receive Data
+#define HPSR_DATA_OFFSET 0x00020010UL
+// Transmit control / status
+#define HPSR_TX_STAT_OFFSET 0x0002000CUL
+// Receive status
+#define HPSR_RX_STAT_OFFSET 0x00020008UL
+
+#define HPSR_TX_STAT_READY 0x8UL
+#define HPSR_RX_DATA_AVAIL 0x4UL
+
+
+/////////////////////// harmony values ///////////////////////////////////////////////////////
+// Transmit / Receive Data
+#define H_HPSR_DATA_TX *((volatile unsigned int*)0xbff65014)
+// Transmit / Receive Data
+#define H_HPSR_DATA_RX *((volatile unsigned int*)0xbff65018)
+// Status
+#define H_HPSR_STAT *((volatile unsigned int*)0xbff65004)
+
+// harmony serial status bits
+#define H_SER_STAT_TX_EMPTY 0x04
+#define H_SER_STAT_RX_EMPTY 0x10
+
+
+
+
+int putDebugChar(char c)
+{
+ if (GetAsicId() == HarmonyAsic) {
+ while (!( ( (H_HPSR_STAT) & H_SER_STAT_TX_EMPTY) != 0));
+
+ H_HPSR_DATA_TX = (unsigned int) c;
+
+ } else if (GetAsicId() == AndrosAsic) {
+ while (((SERIAL_REG(HPSR_TX_STAT_OFFSET) & HPSR_TX_STAT_READY) == 0))
+ ;
+ SERIAL_REG(HPSR_DATA_OFFSET) = (unsigned int) c;
+ }
+ return 1;
+}
+
+char getDebugChar(void)
+{
+ if (GetAsicId() == HarmonyAsic) {
+ while (!(((H_HPSR_STAT) & H_SER_STAT_RX_EMPTY) == 0));
+
+ return H_HPSR_DATA_RX;
+
+ } else if (GetAsicId() == AndrosAsic) {
+ while ((SERIAL_REG(HPSR_RX_STAT_OFFSET) & HPSR_RX_DATA_AVAIL) == 0)
+ ;
+
+ return (SERIAL_REG(HPSR_DATA_OFFSET));
+
+ }
+}
+
+
diff -Nru a/arch/mips/hp-lj/init.c b/arch/mips/hp-lj/init.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/init.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,53 @@
+/*
+ * init.c: PROM library initialisation code.
+ *
+ * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
+ */
+
+#include <linux/mm.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/hp-lj/asic.h>
+#include <linux/bootmem.h>
+
+#include "utils.h"
+
+
+#define Delimiter "CMDLINE="
+const char CommandLine[] = Delimiter
+ "root=/dev/hda3 ";
+
+char arcs_cmdline[CL_SIZE];
+
+int __init prom_init(int argc, char ** argv, char **envp)
+{
+ ulong mem_size = get_mem_avail();
+ int reserve_size = 0;
+
+ printk("Total Memory: %ld bytes\n", mem_size);
+
+ reserve_buffer(CommandLine, mem_size);
+
+ reserve_size = get_reserved_buffer_size();
+ mem_size -= reserve_size;
+
+ add_memory_region(0x0,mem_size, BOOT_MEM_RAM);
+ add_memory_region(mem_size,reserve_size, BOOT_MEM_RESERVED);
+
+ printk("Main Memory: %ld bytes\n", mem_size);
+ printk("Reserved Memory: %ld bytes at 0x%08x\n",
+ get_reserved_buffer_size(), (ulong)get_reserved_buffer());
+
+ printk("Detected %s ASIC\n", GetAsicName());
+ mips_machgroup = MACH_GROUP_HP_LJ;
+ mips_machtype = MACH_UNKNOWN;
+
+ strcpy(arcs_cmdline, CommandLine+strlen(Delimiter));
+
+ return 0;
+}
+
+
+void prom_free_prom_memory (void)
+{
+}
diff -Nru a/arch/mips/hp-lj/int-handler.S b/arch/mips/hp-lj/int-handler.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/int-handler.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,70 @@
+#include <asm/asm.h>
+
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+ .text
+ .set mips1
+ .set reorder
+ .set macro
+ .set noat
+ .align 5
+
+# MIPS has 16 exception vectors numbered 0 to 15
+# vector number 0 is for interrupts and the others are for various exceptions
+# The following code is installed as the handler for exception 0
+# There are 8 possible interrupts that can cause this exception.
+# The cause register indicates which are pending
+# The status register indicates which are enabled
+# This code segment basically will decipher which interrup occurred (7 downto 0)
+# and pass an integer indicating which was the highest priority pending interrupt
+# to the do_IRQ routine.
+
+NESTED(hpIRQ, PT_SIZE, sp)
+ SAVE_ALL
+ CLI # Important: mark KERNEL mode !
+ /*
+ * Get pending interrupts
+ */
+
+ mfc0 t0,CP0_CAUSE # get pending interrupts
+ mfc0 t1,CP0_STATUS # get enabled interrupts
+ and t0,t1 # isolate allowed ones
+ andi t0,0xff00 # isolate pending bits
+ sll t0,16 # shift the pending bits down
+ beqz t0,3f # no pending intrs, then spurious
+ nop # delay slot
+
+ /*
+ * Find irq with highest priority
+ * FIXME: This is slow - use binary search
+ */
+
+ la a0,7
+1: bltz t0,2f # found pending irq
+ subu a0,1
+ sll t0,1
+ b 1b
+ nop # delay slot
+
+
+call_do_IRQ:
+2: move a1,sp
+ jal do_IRQ
+ nop # delay slot
+ j ret_from_irq
+ nop
+
+/*
+ mfc0 t0,CP0_STATUS # disable interrupts
+ ori t0,1
+ xori t0,1
+ mtc0 t0,CP0_STATUS
+
+ la a1, ret_from_irq
+ jr a1
+*/
+3: j spurious_interrupt
+END(hpIRQ)
+
diff -Nru a/arch/mips/hp-lj/irq.c b/arch/mips/hp-lj/irq.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/irq.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,37 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Code to handle x86 style IRQs plus some generic interrupt stuff.
+ *
+ * Copyright (C) 1992 Linus Torvalds
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/gdb-stub.h>
+
+void __init init_IRQ(void)
+{
+ extern void hpIRQ(void);
+ extern void mips_cpu_irq_init(u32 base);
+ mips_cpu_irq_init(0);
+ set_except_vector(0, hpIRQ);
+
+#ifdef CONFIG_KGDB
+ {
+ extern void breakpoint(void);
+ extern int remote_debug;
+
+ if (remote_debug) {
+ set_debug_traps();
+ breakpoint();
+ }
+ }
+#endif
+
+}
diff -Nru a/arch/mips/hp-lj/setup.c b/arch/mips/hp-lj/setup.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/setup.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,154 @@
+/*
+ * Setup pointers to hardware-dependent routines.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
+ */
+#include <linux/config.h>
+#include <linux/hdreg.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/ide.h>
+#include <linux/bootmem.h>
+#include <asm/mc146818rtc.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/hp-lj/asic.h>
+#include "utils.h"
+
+#ifdef CONFIG_KGDB
+int remote_debug = 0;
+#endif
+
+const char *get_system_type(void)
+{
+ return "HP LaserJet"; /* But which exactly? */
+}
+
+static void (*timer_interrupt_service)(int irq, void *dev_id, struct pt_regs * regs) = NULL;
+
+
+static void andros_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+{
+ if (!(*((volatile unsigned int*)0xbfea0010) & 0x20)) // mask = pend & en
+ return;
+
+ /* clear timer interrupt */
+ {
+ unsigned int tmr = *((volatile unsigned int*)0xbfe90040); // ctl bits
+ *((volatile unsigned int*)0xbfe90040) = tmr; // write to ack
+ *((volatile unsigned int*)0xbfea000c) = 0x20; // sys int ack
+ }
+
+ /* service interrupt */
+ timer_interrupt_service(irq, dev_id, regs);
+}
+
+static void harmony_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+{
+ if (!(*((volatile unsigned int*)0xbff63000) & 0x01))
+ return; // big sys int reg, 01-timer did it
+ if (!(*((volatile unsigned int*)0xbff610a4) & 0x01))
+ return; // local small int reg, 01-timer0 did it
+
+ *((volatile unsigned int*)0xbff610a4) = 1; // ack local timer0 bit
+ *((volatile unsigned int*)0xbff63000) = 1; // ack global timer bit
+
+ /* service interrupt */
+ timer_interrupt_service(irq, dev_id, regs);
+}
+
+
+#define ASIC_IRQ_NUMBER 2
+
+
+static void __init hp_time_init(struct irqaction *irq)
+{
+ timer_interrupt_service = irq->handler;
+
+ if (GetAsicId() == AndrosAsic) {
+ //*((volatile unsigned int*)0xbfe90000) = 0x2f; // set by bootloader to 0x20 // prescaler
+ *((volatile unsigned int*)0xbfe90040) = 0x21; // 20-res of 1kHz,1-int ack // control
+ *((volatile unsigned int*)0xbfe90048) = 0x09; // 09-reload val // reload
+ *((volatile unsigned int*)0xbfe90044) = 0x09; // 09-count val // count
+ *((volatile unsigned int*)0xbfe90040) = 0x2f; // 8-int enable,4-reload en,2-count down en,1-int-ack
+
+ irq->handler = andros_timer_interrupt;
+ irq->flags |= SA_INTERRUPT | SA_SHIRQ;
+ printk("setting up timer in hp_time_init\n");
+ setup_irq(ASIC_IRQ_NUMBER, irq);
+
+ // enable timer interrupt
+ *((volatile unsigned int*)0xbfea0000) = 0x20;
+
+ } else if (GetAsicId() == HarmonyAsic) {
+
+ *((volatile unsigned int*)0xbff61000) = 99; // prescaler, 100Mz sys clk
+ *((volatile unsigned int*)0xbff61028) = 0x09; // reload reg
+ *((volatile unsigned int*)0xbff61024) = 0x09; // count reg
+ *((volatile unsigned int*)0xbff61020) = 0x0b; // 80-1khz res on timer, 2 reload en, 1 - count down en
+
+ irq->handler = harmony_timer_interrupt;
+ irq->flags |= SA_INTERRUPT | SA_SHIRQ;
+ setup_irq(ASIC_IRQ_NUMBER, irq);
+
+ *((volatile unsigned int*)0xbff610a0) |= 1; // turn on timer0
+
+ } else if (GetAsicId() == UnknownAsic)
+ printk("Unknown asic in hp_time_init()\n");
+ else
+ printk("Unsupported asic in hp_time_init()\n");
+}
+
+
+static void hplj_restart(void)
+{
+ if (GetAsicId() == AndrosAsic)
+ *((volatile unsigned int *) 0xbfe900c0) = 0;
+
+
+ if (GetAsicId() == HarmonyAsic)
+ *((volatile unsigned int *) 0xbff62030) = 0;
+
+ printk("Restart Failed ... halting instead\n");
+ while(1);
+}
+
+static void hplj_halt(void)
+{
+ while(1);
+}
+
+void __init hp_setup(void)
+{
+#ifdef CONFIG_PCI
+ extern void pci_setup(void);
+ pci_setup();
+#endif
+
+#ifdef CONFIG_IDE
+ {
+ extern struct ide_ops std_ide_ops;
+ ide_ops = &std_ide_ops;
+ }
+#endif
+
+ _machine_restart =(void (*)(char *)) hplj_restart;
+ _machine_halt = hplj_halt;
+ _machine_power_off = hplj_halt;
+
+ board_timer_setup = hp_time_init;
+
+#ifdef CONFIG_KGDB
+ {
+ extern char CommandLine[];
+ remote_debug = (strstr(CommandLine, "kgdb") != NULL);
+ }
+#endif
+
+ printk("HP SETUP\n");
+}
diff -Nru a/arch/mips/hp-lj/utils.c b/arch/mips/hp-lj/utils.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/utils.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,69 @@
+/*
+ *
+ *
+ *
+ *
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include "utils.h"
+
+
+#define miu_chan_cfg(x) ((volatile unsigned long *)(0xbff40000+x*4)) /* for andros */
+
+int mbsize[8] = {1,2,4,8,16,32,64,128};
+
+unsigned long get_mem_avail(void) {
+
+ unsigned long cfg[10],i,total_mem=0;
+
+ for(i=0;i<10;i++)
+ cfg[i] = *miu_chan_cfg(i);
+
+ for(i=0;i<10;i++){
+ if(cfg[i]==0x1fc160c2) continue; // skip empties
+ if( ( (cfg[i]>>12) & 0xf ) <= 0xb ) continue; // skip roms
+ total_mem += mbsize[(cfg[i]>>16)&0x7] *1024*1024;
+ }
+ return total_mem;
+}
+
+
+
+
+static ulong* buffer_ptr = NULL;
+static ulong buffer_size = 0;
+
+ulong* get_reserved_buffer(void) {return KSEG0ADDR(buffer_ptr);}
+ulong* get_reserved_buffer_virtual(void) {return (ulong*)ReservedMemVirtualAddr;}
+ulong get_reserved_buffer_size(void) {return buffer_size;}
+
+#define MIN_GEN_MEM (4 << 20)
+
+
+void reserve_buffer(const char* cl, ulong base_mem)
+{
+ char* pos = strstr(cl, "reserved_buffer=");
+ if (pos) {
+ buffer_size = simple_strtol(pos+strlen("reserved_buffer="),
+ 0, 10);
+ buffer_size <<= 20;
+ if (buffer_size + MIN_GEN_MEM > base_mem)
+ buffer_size = base_mem - MIN_GEN_MEM;
+ if (buffer_size > 0)
+ buffer_ptr = (ulong*)(base_mem - buffer_size);
+ else
+ buffer_size = 0;
+ }
+}
+
+
+
+EXPORT_SYMBOL(get_reserved_buffer);
+EXPORT_SYMBOL(get_reserved_buffer_virtual);
+EXPORT_SYMBOL(get_reserved_buffer_size);
+
+
diff -Nru a/arch/mips/hp-lj/utils.h b/arch/mips/hp-lj/utils.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/hp-lj/utils.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,19 @@
+/*
+ *
+ *
+ *
+ */
+
+#include <linux/types.h>
+
+#define ReservedMemVirtualAddr 0x50000000
+
+unsigned long get_mem_avail(void);
+
+ulong* get_reserved_buffer(void);
+ulong* get_reserved_buffer_virtual(void);
+ulong get_reserved_buffer_size(void);
+
+void reserve_buffer(const char* cl, ulong base_mem);
+
+
diff -Nru a/arch/mips/ite-boards/generic/Makefile b/arch/mips/ite-boards/generic/Makefile
--- a/arch/mips/ite-boards/generic/Makefile Sun Aug 3 13:14:46 2003
+++ b/arch/mips/ite-boards/generic/Makefile Sun Aug 3 13:14:46 2003
@@ -6,18 +6,10 @@
# Makefile for the ITE 8172 (qed-4n-s01b) board, generic files.
#
-obj-y := it8172_rtc.o it8172_setup.o irq.o int-handler.o pmon_prom.o time.o lpc.o puts.o reset.o
+obj-y += it8172_setup.o irq.o int-handler.o pmon_prom.o \
+ time.o lpc.o puts.o reset.o
-ifdef CONFIG_PCI
-obj-y += it8172_pci.o
-endif
-
-ifdef CONFIG_IT8172_CIR
-obj-y += it8172_cir.o
-endif
-
-ifdef CONFIG_REMOTE_DEBUG
- obj-y += dbg_io.o
-endif
+obj-$(CONFIG_IT8172_CIR)+= it8172_cir.o
+obj-$(CONFIG_KGDB) += dbg_io.o
EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c
--- a/arch/mips/ite-boards/generic/dbg_io.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/ite-boards/generic/dbg_io.c Sun Aug 3 13:14:51 2003
@@ -1,7 +1,7 @@
#include <linux/config.h>
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
/* --- CONFIG --- */
diff -Nru a/arch/mips/ite-boards/generic/int-handler.S b/arch/mips/ite-boards/generic/int-handler.S
--- a/arch/mips/ite-boards/generic/int-handler.S Sun Aug 3 13:14:51 2003
+++ b/arch/mips/ite-boards/generic/int-handler.S Sun Aug 3 13:14:51 2003
@@ -26,15 +26,17 @@
andi a0, t0, CAUSEF_IP7
beq a0, zero, 1f
- move a0, sp
- jal mips_timer_interrupt
+
+ li a0, 127 # MIPS_CPU_TIMER_IRQ = (NR_IRQS-1)
+ move a1, sp
+ jal ll_timer_interrupt
j ret_from_irq
nop
-
+
1:
andi a0, t0, CAUSEF_IP2 # the only int we expect at this time
- beq a0, zero, 3f
- move a0,sp
+ beq a0, zero, 3f
+ move a0,sp
jal it8172_hw0_irqdispatch
mfc0 t0,CP0_STATUS # disable interrupts
@@ -44,12 +46,12 @@
nop
nop
nop
-
+
la a1, ret_from_irq
jr a1
nop
-
-3:
+
+3:
move a0, sp
jal mips_spurious_interrupt
nop
diff -Nru a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
--- a/arch/mips/ite-boards/generic/irq.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/ite-boards/generic/irq.c Sun Aug 3 13:14:49 2003
@@ -1,5 +1,4 @@
/*
- *
* BRIEF MODULE DESCRIPTION
* ITE 8172G interrupt/setup routines.
*
@@ -7,7 +6,7 @@
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
- * Part of this file was derived from Carsten Langgaard's
+ * Part of this file was derived from Carsten Langgaard's
* arch/mips/mips-boards/atlas/atlas_int.c.
*
* Carsten Langgaard, carstenl@mips.com
@@ -33,8 +32,10 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
@@ -46,7 +47,6 @@
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/serial_reg.h>
-#include <linux/seq_file.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
@@ -65,7 +65,7 @@
#define DPRINTK(fmt, args...)
#endif
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
extern void breakpoint(void);
#endif
@@ -73,27 +73,27 @@
#define EXT_IRQ0_TO_IP 2 /* IP 2 */
#define EXT_IRQ5_TO_IP 7 /* IP 7 */
-extern void set_debug_traps(void);
-extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
-extern asmlinkage void it8172_IRQ(void);
+#define ALLINTS_NOTIMER (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
+
unsigned int local_bh_count[NR_CPUS];
unsigned int local_irq_count[NR_CPUS];
-unsigned long spurious_count = 0;
-irq_desc_t irq_desc[NR_IRQS];
-irq_desc_t *irq_desc_base=&irq_desc[0];
void disable_it8172_irq(unsigned int irq_nr);
void enable_it8172_irq(unsigned int irq_nr);
+extern void set_debug_traps(void);
+extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
+extern asmlinkage void it8172_IRQ(void);
+
struct it8172_intc_regs volatile *it8172_hw0_icregs
= (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
/* Function for careful CP0 interrupt mask access */
static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
{
- unsigned long status = read_32bit_cp0_register(CP0_STATUS);
+ unsigned long status = read_c0_status();
status &= ~((clr_mask & 0xFF) << 8);
status |= (set_mask & 0xFF) << 8;
- write_32bit_cp0_register(CP0_STATUS, status);
+ write_c0_status(status);
}
static inline void mask_irq(unsigned int irq_nr)
@@ -106,22 +106,22 @@
modify_cp0_intmask(0, irq_nr);
}
-void disable_irq(unsigned int irq_nr)
+void local_disable_irq(unsigned int irq_nr)
{
unsigned long flags;
- save_and_cli(flags);
+ local_irq_save(flags);
disable_it8172_irq(irq_nr);
- restore_flags(flags);
+ local_irq_restore(flags);
}
-void enable_irq(unsigned int irq_nr)
+void local_enable_irq(unsigned int irq_nr)
{
unsigned long flags;
- save_and_cli(flags);
+ local_irq_save(flags);
enable_it8172_irq(irq_nr);
- restore_flags(flags);
+ local_irq_restore(flags);
}
@@ -131,70 +131,77 @@
if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
/* LPC interrupt */
- DPRINTK("disable, before lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
- it8172_hw0_icregs->lpc_mask |= (1 << (irq_nr - IT8172_LPC_IRQ_BASE));
- DPRINTK("disable, after lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
+ DPRINTK("DB lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
+ it8172_hw0_icregs->lpc_mask |=
+ (1 << (irq_nr - IT8172_LPC_IRQ_BASE));
+ DPRINTK("DA lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
}
else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
/* Local Bus interrupt */
- DPRINTK("before lb_mask %x\n", it8172_hw0_icregs->lb_mask);
- it8172_hw0_icregs->lb_mask |= (1 << (irq_nr - IT8172_LB_IRQ_BASE));
- DPRINTK("after lb_mask %x\n", it8172_hw0_icregs->lb_mask);
+ DPRINTK("DB lb_mask %x\n", it8172_hw0_icregs->lb_mask);
+ it8172_hw0_icregs->lb_mask |=
+ (1 << (irq_nr - IT8172_LB_IRQ_BASE));
+ DPRINTK("DA lb_mask %x\n", it8172_hw0_icregs->lb_mask);
}
else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
/* PCI and other interrupts */
- DPRINTK("before pci_mask %x\n", it8172_hw0_icregs->pci_mask);
- it8172_hw0_icregs->pci_mask |= (1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
- DPRINTK("after pci_mask %x\n", it8172_hw0_icregs->pci_mask);
+ DPRINTK("DB pci_mask %x\n", it8172_hw0_icregs->pci_mask);
+ it8172_hw0_icregs->pci_mask |=
+ (1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
+ DPRINTK("DA pci_mask %x\n", it8172_hw0_icregs->pci_mask);
}
else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
/* NMI interrupts */
- DPRINTK("before nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
- it8172_hw0_icregs->nmi_mask |= (1 << (irq_nr - IT8172_NMI_IRQ_BASE));
- DPRINTK("after nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
+ DPRINTK("DB nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
+ it8172_hw0_icregs->nmi_mask |=
+ (1 << (irq_nr - IT8172_NMI_IRQ_BASE));
+ DPRINTK("DA nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
}
else {
- panic("disable_it8172_irq: bad irq %d\n", irq_nr);
+ panic("disable_it8172_irq: bad irq %d", irq_nr);
}
}
-
void enable_it8172_irq(unsigned int irq_nr)
{
DPRINTK("enable_it8172_irq %d\n", irq_nr);
if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
/* LPC interrupt */
- DPRINTK("enable, before lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
- it8172_hw0_icregs->lpc_mask &= ~(1 << (irq_nr - IT8172_LPC_IRQ_BASE));
- DPRINTK("enable, after lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
+ DPRINTK("EB before lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
+ it8172_hw0_icregs->lpc_mask &=
+ ~(1 << (irq_nr - IT8172_LPC_IRQ_BASE));
+ DPRINTK("EA after lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
}
else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
/* Local Bus interrupt */
- DPRINTK("before lb_mask %x\n", it8172_hw0_icregs->lb_mask);
- it8172_hw0_icregs->lb_mask &= ~(1 << (irq_nr - IT8172_LB_IRQ_BASE));
- DPRINTK("after lb_mask %x\n", it8172_hw0_icregs->lb_mask);
+ DPRINTK("EB lb_mask %x\n", it8172_hw0_icregs->lb_mask);
+ it8172_hw0_icregs->lb_mask &=
+ ~(1 << (irq_nr - IT8172_LB_IRQ_BASE));
+ DPRINTK("EA lb_mask %x\n", it8172_hw0_icregs->lb_mask);
}
else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
/* PCI and other interrupts */
- DPRINTK("before pci_mask %x\n", it8172_hw0_icregs->pci_mask);
- it8172_hw0_icregs->pci_mask &= ~(1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
- DPRINTK("after pci_mask %x\n", it8172_hw0_icregs->pci_mask);
+ DPRINTK("EB pci_mask %x\n", it8172_hw0_icregs->pci_mask);
+ it8172_hw0_icregs->pci_mask &=
+ ~(1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
+ DPRINTK("EA pci_mask %x\n", it8172_hw0_icregs->pci_mask);
}
else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
/* NMI interrupts */
- DPRINTK("before nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
- it8172_hw0_icregs->nmi_mask &= ~(1 << (irq_nr - IT8172_NMI_IRQ_BASE));
- DPRINTK("after nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
+ DPRINTK("EB nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
+ it8172_hw0_icregs->nmi_mask &=
+ ~(1 << (irq_nr - IT8172_NMI_IRQ_BASE));
+ DPRINTK("EA nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
}
else {
- panic("enable_it8172_irq: bad irq %d\n", irq_nr);
+ panic("enable_it8172_irq: bad irq %d", irq_nr);
}
}
static unsigned int startup_ite_irq(unsigned int irq)
{
enable_it8172_irq(irq);
- return 0;
+ return 0;
}
#define shutdown_ite_irq disable_it8172_irq
@@ -218,184 +225,33 @@
};
-int show_interrupts(struct seq_file *p, void *v)
-{
- int i, j;
- struct irqaction * action;
- unsigned long flags;
-
- seq_printf(p, " ");
- for (j=0; j<smp_num_cpus; j++)
- seq_printf(p, "CPU%d ",j);
- seq_putc(p, '\n');
-
- for (i = 0 ; i < NR_IRQS ; i++) {
- spin_lock_irqsave(&irq_desc[i].lock, flags);
- action = irq_desc[i].action;
-
- if ( !action || !action->handler )
- goto skip;
- seq_printf(p, "%3d: ", i);
- seq_printf(p, "%10u ", kstat_irqs(i));
- if ( irq_desc[i].handler )
- seq_printf(p, " %s ", irq_desc[i].handler->typename );
- else
- seq_puts(p, " None ");
-
- seq_printf(p, " %s",action->name);
- for (action=action->next; action; action = action->next) {
- seq_printf(p, ", %s", action->name);
- }
- seq_putc(p, '\n');
-skip:
- spin_unlock_irqrestore(&irq_desc[i].lock, flags);
- }
- seq_printf(p, "BAD: %10lu\n", spurious_count);
- return 0;
-}
-
-asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
-{
- struct irqaction *action;
- int cpu;
-
- cpu = smp_processor_id();
- irq_enter(cpu, irq);
-
- kstat_cpu(cpu).irqs[irq]++;
-#if 0
- if (irq_desc[irq].handler && irq_desc[irq].handler->ack) {
- // printk("invoking ack handler\n");
- irq_desc[irq].handler->ack(irq);
- }
-#endif
-
- action = irq_desc[irq].action;
-
- if (action && action->handler)
- {
- //mask_irq(1<<irq);
- //printk("action->handler %x\n", action->handler);
- disable_it8172_irq(irq);
- //if (!(action->flags & SA_INTERRUPT)) local_irq_enable(); /* reenable ints */
- do {
- action->handler(irq, action->dev_id, regs);
- action = action->next;
- } while ( action );
- //local_irq_disable(); /* disable ints */
- if (irq_desc[irq].handler)
- {
- }
- //unmask_irq(1<<irq);
- enable_it8172_irq(irq);
- }
- else
- {
- spurious_count++;
- printk("Unhandled interrupt %d, cause %x, disabled\n",
- (unsigned)irq, (unsigned)regs->cp0_cause);
- disable_it8172_irq(irq);
- }
- irq_exit(cpu, irq);
-}
-
-int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags, const char * devname, void *dev_id)
-{
- struct irqaction *old, **p, *action;
- unsigned long flags;
+static void enable_none(unsigned int irq) { }
+static unsigned int startup_none(unsigned int irq) { return 0; }
+static void disable_none(unsigned int irq) { }
+static void ack_none(unsigned int irq) { }
+
+/* startup is the same as "enable", shutdown is same as "disable" */
+#define shutdown_none disable_none
+#define end_none enable_none
+
+static struct hw_interrupt_type cp0_irq_type = {
+ "CP0 Count",
+ startup_none,
+ shutdown_none,
+ enable_none,
+ disable_none,
+ ack_none,
+ end_none
+};
- /*
- * IP0 and IP1 are software interrupts. IP7 is typically the timer interrupt.
- *
- * The ITE QED-4N-S01B board has one single interrupt line going from
- * the system controller to the CPU. It's connected to the CPU external
- * irq pin 1, which is IP2. The interrupt numbers are listed in it8172_int.h;
- * the ISA interrupts are numbered from 0 to 15, and the rest go from
- * there.
- */
-
- //printk("request_irq: %d handler %x\n", irq, handler);
- if (irq >= NR_IRQS)
- return -EINVAL;
-
- if (!handler)
- {
- /* Free */
- for (p = &irq_desc[irq].action; (action = *p) != NULL; p = &action->next)
- {
- /* Found it - now free it */
- save_flags(flags);
- cli();
- *p = action->next;
- disable_it8172_irq(irq);
- restore_flags(flags);
- kfree(action);
- return 0;
- }
- return -ENOENT;
- }
-
- action = (struct irqaction *)
- kmalloc(sizeof(struct irqaction), GFP_KERNEL);
- if (!action)
- return -ENOMEM;
- memset(action, 0, sizeof(struct irqaction));
-
- save_flags(flags);
- cli();
-
- action->handler = handler;
- action->flags = irqflags;
- action->mask = 0;
- action->name = devname;
- action->dev_id = dev_id;
- action->next = NULL;
-
- p = &irq_desc[irq].action;
-
- if ((old = *p) != NULL) {
- /* Can't share interrupts unless both agree to */
- if (!(old->flags & action->flags & SA_SHIRQ))
- return -EBUSY;
- /* add new interrupt at end of irq queue */
- do {
- p = &old->next;
- old = *p;
- } while (old);
- }
- *p = action;
- enable_it8172_irq(irq);
- restore_flags(flags);
-#if 0
- printk("request_irq: status %x cause %x\n",
- read_32bit_cp0_register(CP0_STATUS), read_32bit_cp0_register(CP0_CAUSE));
-#endif
- return 0;
-}
-
-void free_irq(unsigned int irq, void *dev_id)
-{
- request_irq(irq, NULL, 0, NULL, dev_id);
-}
void enable_cpu_timer(void)
{
unsigned long flags;
- save_and_cli(flags);
+ local_irq_save(flags);
unmask_irq(1<<EXT_IRQ5_TO_IP); /* timer interrupt */
- restore_flags(flags);
-}
-
-unsigned long probe_irq_on (void)
-{
- return 0;
-}
-
-int probe_irq_off (unsigned long irqs)
-{
- return 0;
+ local_irq_restore(flags);
}
@@ -404,10 +260,11 @@
int i;
unsigned long flags;
-
memset(irq_desc, 0, sizeof(irq_desc));
set_except_vector(0, it8172_IRQ);
+ init_generic_irq();
+
/* mask all interrupts */
it8172_hw0_icregs->lb_mask = 0xffff;
it8172_hw0_icregs->lpc_mask = 0xffff;
@@ -426,39 +283,30 @@
it8172_hw0_icregs->lb_level |= 0x20;
/* keyboard and mouse are edge triggered */
- it8172_hw0_icregs->lpc_trigger |= (0x2 | 0x1000);
+ it8172_hw0_icregs->lpc_trigger |= (0x2 | 0x1000);
#if 0
// Enable this piece of code to make internal USB interrupt
// edge triggered.
- it8172_hw0_icregs->pci_trigger |=
+ it8172_hw0_icregs->pci_trigger |=
(1 << (IT8172_USB_IRQ - IT8172_PCI_DEV_IRQ_BASE));
- it8172_hw0_icregs->pci_level &=
+ it8172_hw0_icregs->pci_level &=
~(1 << (IT8172_USB_IRQ - IT8172_PCI_DEV_IRQ_BASE));
#endif
- for (i = 0; i <= IT8172_INT_END; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &it8172_irq_type;
+ for (i = 0; i <= IT8172_LAST_IRQ; i++) {
+ irq_desc[i].handler = &it8172_irq_type;
spin_lock_init(&irq_desc[i].lock);
}
+ irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
+ set_c0_status(ALLINTS_NOTIMER);
- /*
- * Enable external int line 2
- * All ITE interrupts are masked for now.
- */
- save_and_cli(flags);
- unmask_irq(1<<EXT_IRQ0_TO_IP);
- restore_flags(flags);
-
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
/* If local serial I/O used for debug port, enter kgdb at once */
puts("Waiting for kgdb to connect...");
set_debug_traps();
- breakpoint();
+ breakpoint();
#endif
}
@@ -470,8 +318,8 @@
unsigned long status, cause;
printk("got spurious interrupt\n");
- status = read_32bit_cp0_register(CP0_STATUS);
- cause = read_32bit_cp0_register(CP0_CAUSE);
+ status = read_c0_status();
+ cause = read_c0_cause();
printk("status %x cause %x\n", status, cause);
printk("epc %x badvaddr %x \n", regs->cp0_epc, regs->cp0_badvaddr);
// while(1);
@@ -481,16 +329,16 @@
void it8172_hw0_irqdispatch(struct pt_regs *regs)
{
int irq;
- unsigned short intstatus, status;
+ unsigned short intstatus = 0, status = 0;
intstatus = it8172_hw0_icregs->intstatus;
if (intstatus & 0x8) {
- panic("Got NMI interrupt\n");
+ panic("Got NMI interrupt");
}
else if (intstatus & 0x4) {
/* PCI interrupt */
irq = 0;
- status = it8172_hw0_icregs->pci_req;
+ status |= it8172_hw0_icregs->pci_req;
while (!(status & 0x1)) {
irq++;
status >>= 1;
@@ -501,7 +349,7 @@
else if (intstatus & 0x1) {
/* Local Bus interrupt */
irq = 0;
- status = it8172_hw0_icregs->lb_req;
+ status |= it8172_hw0_icregs->lb_req;
while (!(status & 0x1)) {
irq++;
status >>= 1;
@@ -515,7 +363,7 @@
* we could lose an interrupt this way because
* we acknowledge all ints at onces. Revisit.
*/
- status = it8172_hw0_icregs->lpc_req;
+ status |= it8172_hw0_icregs->lpc_req;
it8172_hw0_icregs->lpc_req = 0; /* acknowledge ints */
irq = 0;
while (!(status & 0x1)) {
diff -Nru a/arch/mips/ite-boards/generic/it8172_pci.c b/arch/mips/ite-boards/generic/it8172_pci.c
--- a/arch/mips/ite-boards/generic/it8172_pci.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,211 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * IT8172 system controller specific pci support.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-
-#ifdef CONFIG_PCI
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/it8172/it8172.h>
-#include <asm/it8172/it8172_pci.h>
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-#undef DEBUG
-#undef DEBUG_CONFIG_CYCLES
-
-static int
-it8172_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned char where, u32 *data)
-{
- /*
- * config cycles are on 4 byte boundary only
- */
- unsigned char bus = bus->number;
- unsigned char dev_fn = (char)devfn;
-
-#ifdef DEBUG_CONFIG_CYCLES
- printk("it config: type %d bus %d dev_fn %x data %x\n",
- access_type, bus, dev_fn, *data);
-
-#endif
-
- /* Setup address */
- IT_WRITE(IT_CONFADDR, (bus << IT_BUSNUM_SHF) |
- (dev_fn << IT_FUNCNUM_SHF) | (where & ~0x3));
-
-
- if (access_type == PCI_ACCESS_WRITE) {
- IT_WRITE(IT_CONFDATA, *data);
- }
- else {
- IT_READ(IT_CONFDATA, *data);
- }
-
- /*
- * Revisit: check for master or target abort.
- */
- return 0;
-
-
-}
-
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int
-it8172_pcibios_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
-{
- u32 data = 0;
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (it8172_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
- return -1;
- if (size == 1)
- *val = (u8)(data >> ((where & 3) << 3)) & 0xff;
- else if (size == 2)
- *val = (u16)(data >> ((where & 3) << 3)) & 0xffff;
- else if (size == 4)
- *val = data;
-
-#ifdef DEBUG
- printk("cfg read: bus %d devfn %x where %x size %x: val %x\n",
- bus->number, devfn, where, size, *val);
-#endif
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-it8172_pcibios_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
-{
- u32 data = 0;
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if (size == 4) {
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (it8172_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
- return -1;
- return PCIBIOS_SUCCESSFUL;
- }
-
- if (it8172_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
- return -1;
-
- if(size == 1) {
- data = (u8)(data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- } else if (size == 2) {
- data = (u16)(data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops it8172_pci_ops = {
- .read = it8172_pcibios_read,
- .write = it8172_pcibios_write,
-};
-
-void __init pcibios_init(void)
-{
-
- printk("PCI: Probing PCI hardware on host bus 0.\n");
- pci_scan_bus(0, &it8172_pci_ops, NULL);
-}
-
-int __init
-pcibios_enable_device(struct pci_dev *dev)
-{
- u16 cmd, old_cmd;
- int idx;
- struct resource *r;
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for(idx=0; idx<6; idx++) {
- r = &dev->resource[idx];
- if (!r->start && r->end) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (dev->resource[PCI_ROM_RESOURCE].start)
- cmd |= PCI_COMMAND_MEMORY;
- if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd);
- pci_write_config_word(dev, PCI_COMMAND, cmd);
- }
- return 0;
-}
-
-
-void __init
-pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
- printk("pcibios_align_resource\n");
-}
-
-char * __init
-pcibios_setup(char *str)
-{
- /* Nothing to do for now. */
-
- return str;
-}
-
-#warning pcibios_update_resource() is now a generic implementation - please check
-
-void __init pcibios_fixup_bus(struct pci_bus *b)
-{
- //printk("pcibios_fixup_bus\n");
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-#endif /* CONFIG_PCI */
diff -Nru a/arch/mips/ite-boards/generic/it8172_rtc.c b/arch/mips/ite-boards/generic/it8172_rtc.c
--- a/arch/mips/ite-boards/generic/it8172_rtc.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,62 +0,0 @@
-/*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * RTC routines for ITE8172 MC146818-compatible rtc chip.
- *
- */
-#include <linux/mc146818rtc.h>
-#include <asm/it8172/it8172.h>
-
-#define IT8172_RTC_ADR_REG (IT8172_PCI_IO_BASE + IT_RTC_BASE)
-#define IT8172_RTC_DAT_REG (IT8172_RTC_ADR_REG + 1)
-
-static volatile char *rtc_adr_reg = KSEG1ADDR((volatile char *)IT8172_RTC_ADR_REG);
-static volatile char *rtc_dat_reg = KSEG1ADDR((volatile char *)IT8172_RTC_DAT_REG);
-
-unsigned char it8172_rtc_read_data(unsigned long addr)
-{
- unsigned char retval;
-
- *rtc_adr_reg = addr;
- retval = *rtc_dat_reg;
- return retval;
-}
-
-void it8172_rtc_write_data(unsigned char data, unsigned long addr)
-{
- *rtc_adr_reg = addr;
- *rtc_dat_reg = data;
-}
-
-static int it8172_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops it8172_rtc_ops = {
- &it8172_rtc_read_data,
- &it8172_rtc_write_data,
- &it8172_rtc_bcd_mode
-};
diff -Nru a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
--- a/arch/mips/ite-boards/generic/it8172_setup.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/ite-boards/generic/it8172_setup.c Sun Aug 3 13:14:47 2003
@@ -1,5 +1,4 @@
/*
- *
* BRIEF MODULE DESCRIPTION
* IT8172/QED5231 board setup.
*
@@ -32,35 +31,33 @@
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/console.h>
-#include <linux/mc146818rtc.h>
#include <linux/serial_reg.h>
+#include <linux/major.h>
+#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/cpu.h>
+#include <asm/time.h>
+#include <asm/io.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/mipsregs.h>
#include <asm/reboot.h>
+#include <asm/traps.h>
#include <asm/it8172/it8172.h>
#include <asm/it8712.h>
-#ifdef CONFIG_PC_KEYB
-#include <asm/keyboard.h>
-#endif
#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
extern void console_setup(char *, int *);
char serial_console[20];
#endif
-extern struct rtc_ops it8172_rtc_ops;
extern struct resource ioport_resource;
-extern unsigned long mips_io_port_base;
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops std_ide_ops;
extern struct ide_ops *ide_ops;
#endif
#ifdef CONFIG_PC_KEYB
-extern struct kbd_ops std_kbd_ops;
int init_8712_keyboard(void);
#endif
@@ -71,6 +68,11 @@
extern void it8172_halt(void);
extern void it8172_power_off(void);
+extern void (*board_time_init)(void);
+extern void (*board_timer_setup)(struct irqaction *irq);
+extern void it8172_time_init(void);
+extern void it8172_timer_setup(struct irqaction *irq);
+
#ifdef CONFIG_IT8172_REVC
struct {
struct resource ram;
@@ -124,21 +126,23 @@
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS0,115200");
}
-#endif
+#endif
+
+ clear_c0_status(ST0_FR);
- clear_cp0_status(ST0_FR);
- rtc_ops = &it8172_rtc_ops;
+ board_time_init = it8172_time_init;
+ board_timer_setup = it8172_timer_setup;
_machine_restart = it8172_restart;
_machine_halt = it8172_halt;
_machine_power_off = it8172_power_off;
/*
- * IO/MEM resources.
+ * IO/MEM resources.
*
* revisit this area.
*/
- mips_io_port_base = KSEG1;
+ set_io_port_base(KSEG1);
ioport_resource.start = it8172_resources.pci_io.start;
ioport_resource.end = it8172_resources.pci_io.end;
#ifdef CONFIG_IT8172_REVC
@@ -161,7 +165,7 @@
dsr &= ~IT_PM_DSR_ACSB;
#else
dsr |= IT_PM_DSR_ACSB;
-#endif
+#endif
#ifdef CONFIG_BLK_DEV_IT8172
dsr &= ~IT_PM_DSR_IDESB;
ide_ops = &std_ide_ops;
@@ -197,8 +201,8 @@
LPCSetConfig(0x4, 0x30, 0x1);
LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
- if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
- (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
+ if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
+ (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
printk("Error: keyboard or mouse not enabled\n");
kbd_ops = &std_kbd_ops;
@@ -222,7 +226,7 @@
#endif
#ifdef CONFIG_IT8172_SCR0
{
- unsigned i;
+ unsigned i;
/* Enable Smart Card Reader 0 */
/* First power it up */
IT_IO_READ16(IT_PM_DSR, i);
@@ -241,7 +245,7 @@
#endif /* CONFIG_IT8172_SCR0 */
#ifdef CONFIG_IT8172_SCR1
{
- unsigned i;
+ unsigned i;
/* Enable Smart Card Reader 1 */
/* First power it up */
IT_IO_READ16(IT_PM_DSR, i);
@@ -263,7 +267,7 @@
#ifdef CONFIG_PC_KEYB
/*
- * According to the ITE Special BIOS Note for waking up the
+ * According to the ITE Special BIOS Note for waking up the
* keyboard controller...
*/
int init_8712_keyboard()
diff -Nru a/arch/mips/ite-boards/generic/lpc.c b/arch/mips/ite-boards/generic/lpc.c
--- a/arch/mips/ite-boards/generic/lpc.c Sun Aug 3 13:14:45 2003
+++ b/arch/mips/ite-boards/generic/lpc.c Sun Aug 3 13:14:45 2003
@@ -62,7 +62,7 @@
LPCEnterMBPnP(); // Enter IT8712 MB PnP mode
outb(0x07, LPC_KEY_ADDR);
outb(LdnNumber, LPC_DATA_ADDR);
- outb(Index, LPC_KEY_ADDR);
+ outb(Index, LPC_KEY_ADDR);
outb(data, LPC_DATA_ADDR);
LPCExitMBPnP();
}
@@ -74,7 +74,7 @@
LPCEnterMBPnP(); // Enter IT8712 MB PnP mode
outb(0x07, LPC_KEY_ADDR);
outb(LdnNumber, LPC_DATA_ADDR);
- outb(Index, LPC_KEY_ADDR);
+ outb(Index, LPC_KEY_ADDR);
rtn = inb(LPC_DATA_ADDR);
LPCExitMBPnP();
return rtn;
@@ -92,7 +92,7 @@
Id2 = inb(LPC_DATA_ADDR);
Id = (Id1 << 8) | Id2;
LPCExitMBPnP();
- if (Id == 0x8712)
+ if (Id == 0x8712)
return TRUE;
else
return FALSE;
@@ -104,30 +104,30 @@
unsigned long data;
bus = 0;
- dev_fn = 1<<3 | 4;
+ dev_fn = 1<<3 | 4;
/* pci cmd, SERR# Enable */
- IT_WRITE(IT_CONFADDR,
+ IT_WRITE(IT_CONFADDR,
(bus << IT_BUSNUM_SHF) |
(dev_fn << IT_FUNCNUM_SHF) |
((0x4 / 4) << IT_REGNUM_SHF));
IT_READ(IT_CONFDATA, data);
data |= 0x0100;
- IT_WRITE(IT_CONFADDR,
+ IT_WRITE(IT_CONFADDR,
(bus << IT_BUSNUM_SHF) |
(dev_fn << IT_FUNCNUM_SHF) |
((0x4 / 4) << IT_REGNUM_SHF));
IT_WRITE(IT_CONFDATA, data);
/* setup serial irq control register */
- IT_WRITE(IT_CONFADDR,
+ IT_WRITE(IT_CONFADDR,
(bus << IT_BUSNUM_SHF) |
(dev_fn << IT_FUNCNUM_SHF) |
((0x48 / 4) << IT_REGNUM_SHF));
IT_READ(IT_CONFDATA, data);
data = (data & 0xffff00ff) | 0xc400;
- IT_WRITE(IT_CONFADDR,
+ IT_WRITE(IT_CONFADDR,
(bus << IT_BUSNUM_SHF) |
(dev_fn << IT_FUNCNUM_SHF) |
((0x48 / 4) << IT_REGNUM_SHF));
@@ -136,7 +136,7 @@
/* Enable I/O Space Subtractive Decode */
/* default 0x4C is 0x3f220000 */
- IT_WRITE(IT_CONFADDR,
+ IT_WRITE(IT_CONFADDR,
(bus << IT_BUSNUM_SHF) |
(dev_fn << IT_FUNCNUM_SHF) |
((0x4C / 4) << IT_REGNUM_SHF));
diff -Nru a/arch/mips/ite-boards/generic/pmon_prom.c b/arch/mips/ite-boards/generic/pmon_prom.c
--- a/arch/mips/ite-boards/generic/pmon_prom.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/ite-boards/generic/pmon_prom.c Sun Aug 3 13:14:48 2003
@@ -8,7 +8,7 @@
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
- * This file was derived from Carsten Langgaard's
+ * This file was derived from Carsten Langgaard's
* arch/mips/mips-boards/xx files.
*
* Carsten Langgaard, carstenl@mips.com
@@ -44,7 +44,7 @@
/* #define DEBUG_CMDLINE */
-char arcs_cmdline[COMMAND_LINE_SIZE];
+char arcs_cmdline[CL_SIZE];
extern int prom_argc;
extern char **prom_argv, **prom_envp;
@@ -111,11 +111,6 @@
return 0; /* foo */
}
-int __init page_is_ram(unsigned long pagenr)
-{
- return 1;
-}
-
void prom_free_prom_memory (void)
{
}
@@ -128,11 +123,11 @@
memsize_str = prom_getenv("memsize");
if (!memsize_str) {
#ifdef CONFIG_MIPS_ITE8172
- memsize = 32;
+ memsize = 32;
#elif defined(CONFIG_MIPS_IVR)
- memsize = 64;
+ memsize = 64;
#else
- memsize = 8;
+ memsize = 8;
#endif
printk("memsize unknown: setting to %dMB\n", memsize);
} else {
diff -Nru a/arch/mips/ite-boards/generic/reset.c b/arch/mips/ite-boards/generic/reset.c
--- a/arch/mips/ite-boards/generic/reset.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/ite-boards/generic/reset.c Sun Aug 3 13:14:48 2003
@@ -30,18 +30,18 @@
#include <linux/sched.h>
#include <linux/mm.h>
+#include <asm/cacheflush.h>
#include <asm/io.h>
-#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
void it8172_restart()
{
- set_cp0_status(ST0_BEV | ST0_ERL);
- change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+ set_c0_status(ST0_BEV | ST0_ERL);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
- write_32bit_cp0_register(CP0_WIRED, 0);
+ write_c0_wired(0);
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
}
diff -Nru a/arch/mips/ite-boards/generic/time.c b/arch/mips/ite-boards/generic/time.c
--- a/arch/mips/ite-boards/generic/time.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/ite-boards/generic/time.c Sun Aug 3 13:14:47 2003
@@ -2,6 +2,9 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
+ * Copyright (C) 2003 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it
@@ -20,158 +23,106 @@
* ########################################################################
*
* Setting up the clock on the MIPS boards.
- *
*/
-
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/spinlock.h>
+#include <linux/mc146818rtc.h>
+#include <asm/time.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
+#include <asm/it8172/it8172.h>
#include <asm/it8172/it8172_int.h>
+#include <asm/debug.h>
-#include <linux/mc146818rtc.h>
-#include <linux/timex.h>
-
-extern void enable_cpu_timer(void);
-extern volatile unsigned long wall_jiffies;
-
-unsigned long missed_heart_beats = 0;
-static long last_rtc_update = 0;
-static unsigned long r4k_offset; /* Amount to increment compare reg each time */
-static unsigned long r4k_cur; /* What counter should be at next timer irq */
-static unsigned int timer_tick_count=0;
-
-static inline void ack_r4ktimer(unsigned long newval)
-{
- write_32bit_cp0_register(CP0_COMPARE, newval);
-}
+#define IT8172_RTC_ADR_REG (IT8172_PCI_IO_BASE + IT_RTC_BASE)
+#define IT8172_RTC_DAT_REG (IT8172_RTC_ADR_REG + 1)
+#define IT8172_RTC_CENTURY_REG (IT8172_PCI_IO_BASE + IT_RTC_CENTURY)
+static volatile char *rtc_adr_reg = (char*)KSEG1ADDR(IT8172_RTC_ADR_REG);
+static volatile char *rtc_dat_reg = (char*)KSEG1ADDR(IT8172_RTC_DAT_REG);
+static volatile char *rtc_century_reg = (char*)KSEG1ADDR(IT8172_RTC_CENTURY_REG);
-/*
- * In order to set the CMOS clock precisely, set_rtc_mmss has to be
- * called 500 ms after the second nowtime has started, because when
- * nowtime is written into the registers of the CMOS clock, it will
- * jump to the next second precisely 500 ms later. Check the Motorola
- * MC146818A or Dallas DS12887 data sheet for details.
- *
- * BUG: This routine does not handle hour overflow properly; it just
- * sets the minutes. Usually you won't notice until after reboot!
- */
-static int set_rtc_mmss(unsigned long nowtime)
+unsigned char it8172_rtc_read_data(unsigned long addr)
{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- unsigned char save_control, save_freq_select;
-
- save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
- CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
- CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
- cmos_minutes = CMOS_READ(RTC_MINUTES);
-
- /*
- * since we're only adjusting minutes and seconds,
- * don't interfere with hour overflow. This avoids
- * messing with unknown time zones but requires your
- * RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- CMOS_WRITE(real_seconds,RTC_SECONDS);
- CMOS_WRITE(real_minutes,RTC_MINUTES);
- } else {
- printk(KERN_WARNING
- "set_rtc_mmss: can't update from %d to %d\n",
- cmos_minutes, real_minutes);
- retval = -1;
- }
-
- /* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
- * sheets anyway ... -- Markus Kuhn
- */
- CMOS_WRITE(save_control, RTC_CONTROL);
- CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
+ unsigned char retval;
+ *rtc_adr_reg = addr;
+ retval = *rtc_dat_reg;
return retval;
}
-
-/*
- * There are a lot of conceptually broken versions of the MIPS timer interrupt
- * handler floating around. This one is rather different, but the algorithm
- * is provably more robust.
- */
-void mips_timer_interrupt(struct pt_regs *regs)
+void it8172_rtc_write_data(unsigned char data, unsigned long addr)
{
- unsigned long seq;
+ *rtc_adr_reg = addr;
+ *rtc_dat_reg = data;
+}
- if (r4k_offset == 0)
- goto null;
+#undef CMOS_READ
+#undef CMOS_WRITE
+#define CMOS_READ(addr) it8172_rtc_read_data(addr)
+#define CMOS_WRITE(data, addr) it8172_rtc_write_data(data, addr)
- do {
- kstat.irqs[0][MIPS_CPU_TIMER_IRQ]++;
- do_timer(regs);
-
- /* Historical comment/code:
- * RTC time of day s updated approx. every 11
- * minutes. Because of how the numbers work out
- * we need to make absolutely sure we do this update
- * within 500ms before the * next second starts,
- * thus the following code.
- */
- do {
- seq = read_seqbegin(&xtime_lock);
-
-
- if ((time_status & STA_UNSYNC) == 0
- && xtime.tv_sec > last_rtc_update + 660
- && xtime.tv_usec >= 500000 - (tick >> 1)
- && xtime.tv_usec <= 500000 + (tick >> 1))
- if (set_rtc_mmss(xtime.tv_sec) == 0)
- last_rtc_update = xtime.tv_sec;
- else {
- /* do it again in 60 s */
- last_rtc_update = xtime.tv_sec - 600;
- }
-
- } while (read_seqretry(&xtime_lock, seq));
-
- r4k_cur += r4k_offset;
- ack_r4ktimer(r4k_cur);
+static unsigned char saved_control; /* remember rtc control reg */
+static inline int rtc_24h(void) { return saved_control & RTC_24H; }
+static inline int rtc_dm_binary(void) { return saved_control & RTC_DM_BINARY; }
- } while (((unsigned long)read_32bit_cp0_register(CP0_COUNT)
- - r4k_cur) < 0x7fffffff);
+static inline unsigned char
+bin_to_hw(unsigned char c)
+{
+ if (rtc_dm_binary())
+ return c;
+ else
+ return ((c/10) << 4) + (c%10);
+}
+
+static inline unsigned char
+hw_to_bin(unsigned char c)
+{
+ if (rtc_dm_binary())
+ return c;
+ else
+ return (c>>4)*10 + (c &0xf);
+}
- return;
+/* 0x80 bit indicates pm in 12-hour format */
+static inline unsigned char
+hour_bin_to_hw(unsigned char c)
+{
+ if (rtc_24h())
+ return bin_to_hw(c);
+ if (c >= 12)
+ return 0x80 | bin_to_hw((c==12)?12:c-12); /* 12 is 12pm */
+ else
+ return bin_to_hw((c==0)?12:c); /* 0 is 12 AM, not 0 am */
+}
-null:
- ack_r4ktimer(0);
+static inline unsigned char
+hour_hw_to_bin(unsigned char c)
+{
+ unsigned char tmp = hw_to_bin(c&0x3f);
+ if (rtc_24h())
+ return tmp;
+ if (c & 0x80)
+ return (tmp==12)?12:tmp+12; /* 12pm is 12, not 24 */
+ else
+ return (tmp==12)?0:tmp; /* 12am is 0 */
}
-/*
+static unsigned long r4k_offset; /* Amount to increment compare reg each time */
+static unsigned long r4k_cur; /* What counter should be at next timer irq */
+extern unsigned int mips_counter_frequency;
+
+/*
* Figure out the r4k offset, the amount to increment the compare
- * register for each time tick.
+ * register for each time tick.
* Use the RTC to calculate offset.
*/
static unsigned long __init cal_r4koff(void)
{
- unsigned long count;
unsigned int flags;
local_irq_save(flags);
@@ -181,209 +132,117 @@
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
/* Start r4k counter. */
- write_32bit_cp0_register(CP0_COUNT, 0);
+ write_c0_count(0);
/* Read counter exactly on falling edge of update flag */
while (CMOS_READ(RTC_REG_A) & RTC_UIP);
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
- count = read_32bit_cp0_register(CP0_COUNT);
+ mips_counter_frequency = read_c0_count();
/* restore interrupts */
local_irq_restore(flags);
-
- return (count / HZ);
+
+ return (mips_counter_frequency / HZ);
}
-static unsigned long __init get_mips_time(void)
+static unsigned long
+it8172_rtc_get_time(void)
{
unsigned int year, mon, day, hour, min, sec;
- unsigned char save_control;
-
- save_control = CMOS_READ(RTC_CONTROL);
-
- /* Freeze it. */
- CMOS_WRITE(save_control | RTC_SET, RTC_CONTROL);
+ unsigned int flags;
- /* Read regs. */
- sec = CMOS_READ(RTC_SECONDS);
- min = CMOS_READ(RTC_MINUTES);
- hour = CMOS_READ(RTC_HOURS);
-
- if (!(save_control & RTC_24H))
- {
- if ((hour & 0xf) == 0xc)
- hour &= 0x80;
- if (hour & 0x80)
- hour = (hour & 0xf) + 12;
+ /* avoid update-in-progress. */
+ for (;;) {
+ local_irq_save(flags);
+ if (! (CMOS_READ(RTC_REG_A) & RTC_UIP))
+ break;
+ /* don't hold intr closed all the time */
+ local_irq_restore(flags);
}
- day = CMOS_READ(RTC_DAY_OF_MONTH);
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
-
- /* Unfreeze clock. */
- CMOS_WRITE(save_control, RTC_CONTROL);
- if ((year += 1900) < 1970)
- year += 100;
+ /* Read regs. */
+ sec = hw_to_bin(CMOS_READ(RTC_SECONDS));
+ min = hw_to_bin(CMOS_READ(RTC_MINUTES));
+ hour = hour_hw_to_bin(CMOS_READ(RTC_HOURS));
+ day = hw_to_bin(CMOS_READ(RTC_DAY_OF_MONTH));
+ mon = hw_to_bin(CMOS_READ(RTC_MONTH));
+ year = hw_to_bin(CMOS_READ(RTC_YEAR)) +
+ hw_to_bin(*rtc_century_reg) * 100;
+ /* restore interrupts */
+ local_irq_restore(flags);
+
return mktime(year, mon, day, hour, min, sec);
}
-void __init time_init(void)
+static int
+it8172_rtc_set_time(unsigned long t)
{
- unsigned int est_freq, flags;
-
- /* Set Data mode - binary. */
- CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
+ struct rtc_time tm;
+ unsigned int flags;
- printk("calculating r4koff... ");
- r4k_offset = cal_r4koff();
- printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
+ /* convert */
+ to_tm(t, &tm);
- est_freq = 2*r4k_offset*HZ;
- est_freq += 5000; /* round */
- est_freq -= est_freq%10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
- r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
+ /* avoid update-in-progress. */
+ for (;;) {
+ local_irq_save(flags);
+ if (! (CMOS_READ(RTC_REG_A) & RTC_UIP))
+ break;
+ /* don't hold intr closed all the time */
+ local_irq_restore(flags);
+ }
- write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
+ *rtc_century_reg = bin_to_hw(tm.tm_year/100);
+ CMOS_WRITE(bin_to_hw(tm.tm_sec), RTC_SECONDS);
+ CMOS_WRITE(bin_to_hw(tm.tm_min), RTC_MINUTES);
+ CMOS_WRITE(hour_bin_to_hw(tm.tm_hour), RTC_HOURS);
+ CMOS_WRITE(bin_to_hw(tm.tm_mday), RTC_DAY_OF_MONTH);
+ CMOS_WRITE(bin_to_hw(tm.tm_mon+1), RTC_MONTH); /* tm_mon starts from 0 */
+ CMOS_WRITE(bin_to_hw(tm.tm_year%100), RTC_YEAR);
- enable_cpu_timer();
+ /* restore interrupts */
+ local_irq_restore(flags);
- /* Read time from the RTC chipset. */
- write_seqlock_irqsave (&xtime_lock, flags);
- xtime.tv_sec = get_mips_time();
- xtime.tv_usec = 0;
- write_sequnlock_irqrestore(&xtime_lock, flags);
+ return 0;
}
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-
-/* Cycle counter value at the previous timer interrupt.. */
-
-static unsigned int timerhi = 0, timerlo = 0;
-
-/*
- * FIXME: Does playing with the RP bit in c0_status interfere with this code?
- */
-static unsigned long do_fast_gettimeoffset(void)
+void __init it8172_time_init(void)
{
- u32 count;
- unsigned long res, tmp;
-
- /* Last jiffy when do_fast_gettimeoffset() was called. */
- static unsigned long last_jiffies=0;
- unsigned long quotient;
-
- /*
- * Cached "1/(clocks per usec)*2^32" value.
- * It has to be recalculated once each jiffy.
- */
- static unsigned long cached_quotient=0;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (tmp && last_jiffies != tmp) {
- last_jiffies = tmp;
- __asm__(".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips3\n\t"
- "lwu\t%0,%2\n\t"
- "dsll32\t$1,%1,0\n\t"
- "or\t$1,$1,%0\n\t"
- "ddivu\t$0,$1,%3\n\t"
- "mflo\t$1\n\t"
- "dsll32\t%0,%4,0\n\t"
- "nop\n\t"
- "ddivu\t$0,%0,$1\n\t"
- "mflo\t%0\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=&r" (quotient)
- :"r" (timerhi),
- "m" (timerlo),
- "r" (tmp),
- "r" (USECS_PER_JIFFY)
- :"$1");
- cached_quotient = quotient;
- }
-
- /* Get last timer tick in absolute kernel time */
- count = read_32bit_cp0_register(CP0_COUNT);
+ unsigned int est_freq, flags;
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
+ local_irq_save(flags);
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
+ saved_control = CMOS_READ(RTC_CONTROL);
- return res;
-}
+ printk("calculating r4koff... ");
+ r4k_offset = cal_r4koff();
+ printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long flags;
- unsigned int seq;
+ est_freq = 2*r4k_offset*HZ;
+ est_freq += 5000; /* round */
+ est_freq -= est_freq%10000;
+ printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
+ (est_freq%1000000)*100/1000000);
- do {
- seq = read_seqbegin_irqsave(&xtime_lock, flags);
+ local_irq_restore(flags);
- *tv = xtime;
- tv->tv_usec += do_fast_gettimeoffset();
-
- /*
- * xtime is atomically updated in timer_bh.
- * jiffies - wall_jiffies
- * is nonzero if the timer bottom half hasnt executed yet.
- */
- if (jiffies - wall_jiffies)
- tv->tv_usec += USECS_PER_JIFFY;
-
- } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
- if (tv->tv_usec >= 1000000) {
- tv->tv_usec -= 1000000;
- tv->tv_sec++;
- }
+ rtc_get_time = it8172_rtc_get_time;
+ rtc_set_time = it8172_rtc_set_time;
}
-void do_settimeofday(struct timeval *tv)
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+void __init it8172_timer_setup(struct irqaction *irq)
{
- write_seqlock_irq (&xtime_lock);
-
- /* This is revolting. We need to set the xtime.tv_usec correctly.
- * However, the value in this location is is value at the last tick.
- * Discover what correction gettimeofday would have done, and then
- * undo it!
- */
- tv->tv_usec -= do_fast_gettimeoffset();
-
- if (tv->tv_usec < 0) {
- tv->tv_usec += 1000000;
- tv->tv_sec--;
- }
-
- xtime = *tv;
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
-
- write_sequnlock_irq (&xtime_lock);
+ puts("timer_setup\n");
+ put32(NR_IRQS);
+ puts("");
+ /* we are using the cpu counter for timer interrupts */
+ setup_irq(MIPS_CPU_TIMER_IRQ, irq);
+
+ /* to generate the first timer interrupt */
+ r4k_cur = (read_c0_count() + r4k_offset);
+ write_c0_compare(r4k_cur);
+ set_c0_status(ALLINTS);
}
diff -Nru a/arch/mips/ite-boards/ivr/Makefile b/arch/mips/ite-boards/ivr/Makefile
--- a/arch/mips/ite-boards/ivr/Makefile Sun Aug 3 13:14:53 2003
+++ b/arch/mips/ite-boards/ivr/Makefile Sun Aug 3 13:14:53 2003
@@ -7,7 +7,4 @@
# board-specific files.
#
-obj-y := init.o
-
-obj-$(CONFIG_PCI) += pci_fixup.o
-obj-$(CONFIG_BLK_DEV_INITRD) += le_ramdisk.o
+obj-y += init.o
diff -Nru a/arch/mips/ite-boards/ivr/README b/arch/mips/ite-boards/ivr/README
--- a/arch/mips/ite-boards/ivr/README Sun Aug 3 13:14:47 2003
+++ b/arch/mips/ite-boards/ivr/README Sun Aug 3 13:14:47 2003
@@ -1,3 +1,3 @@
-This is not really a board made by ITE Semi, but it's very
+This is not really a board made by ITE Semi, but it's very
similar to the ITE QED-4N-S01B board. The IVR board is made
by Globespan and it's a reference board for the PVR chip.
diff -Nru a/arch/mips/ite-boards/ivr/init.c b/arch/mips/ite-boards/ivr/init.c
--- a/arch/mips/ite-boards/ivr/init.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/ite-boards/ivr/init.c Sun Aug 3 13:14:48 2003
@@ -27,14 +27,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -52,6 +50,10 @@
#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+const char *get_system_type(void)
+{
+ return "Globespan IVR";
+}
int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
{
@@ -77,7 +79,7 @@
* make the entire physical memory visible to pci bus masters
*/
IT_READ(IT_MC_PCICR, pcicr);
- pcicr &= ~0x1f;
+ pcicr &= ~0x1f;
pcicr |= (mem_size - 1) >> 22;
IT_WRITE(IT_MC_PCICR, pcicr);
diff -Nru a/arch/mips/ite-boards/ivr/pci_fixup.c b/arch/mips/ite-boards/ivr/pci_fixup.c
--- a/arch/mips/ite-boards/ivr/pci_fixup.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,139 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Globespan IVR board-specific pci fixups.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-
-#ifdef CONFIG_PCI
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/it8172/it8172.h>
-#include <asm/it8172/it8172_pci.h>
-#include <asm/it8172/it8172_int.h>
-
-void __init board_int_line_fixup(struct pci_dev *dev)
-{
- unsigned int slot, func;
- unsigned char pin;
- const int internal_func_irqs[7] = {
- IT8172_AC97_IRQ,
- IT8172_DMA_IRQ,
- IT8172_CDMA_IRQ,
- IT8172_USB_IRQ,
- IT8172_BRIDGE_MASTER_IRQ,
- IT8172_IDE_IRQ,
- IT8172_MC68K_IRQ
- };
-
-#ifdef DEBUG
- printk("board_int_line_fixup bus %d\n", dev->bus->number);
-#endif
- if (dev->bus->number != 0)
- return;
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
-
-#ifdef DEBUG
- pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
-#endif
-
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
-
- switch (slot) {
- case 0x01:
- /*
- * Internal device 1 is actually 7 different internal
- * devices on the IT8172G (a multi-function device).
- */
- if (func < 7)
- dev->irq = internal_func_irqs[func];
- break;
- case 0x11:
- switch (pin) {
- case 0: /* pin A, hardware bug */
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x13:
- switch (pin) {
- case 0: /* pin A, hardware bug */
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- default:
- return;
- }
-
-#ifdef DEBUG
- printk("irq fixup: slot %d, vendor %x, int line %d, int number %d\n",
- slot, vendor, pin, dev->irq);
-#endif
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
-
-}
-
-struct pci_fixup pcibios_fixups[] = {
- { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, board_int_line_fixup },
- { 0 }
-};
-#endif
diff -Nru a/arch/mips/ite-boards/qed-4n-s01b/Makefile b/arch/mips/ite-boards/qed-4n-s01b/Makefile
--- a/arch/mips/ite-boards/qed-4n-s01b/Makefile Sun Aug 3 13:14:50 2003
+++ b/arch/mips/ite-boards/qed-4n-s01b/Makefile Sun Aug 3 13:14:50 2003
@@ -7,6 +7,6 @@
# specific files.
#
-obj-y := init.o
+obj-y := init.o
+
obj-$(CONFIG_PCI) += pci_fixup.o
-obj-$(CONFIG_BLK_DEV_INITRD) += le_ramdisk.o
diff -Nru a/arch/mips/ite-boards/qed-4n-s01b/init.c b/arch/mips/ite-boards/qed-4n-s01b/init.c
--- a/arch/mips/ite-boards/qed-4n-s01b/init.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/ite-boards/qed-4n-s01b/init.c Sun Aug 3 13:14:53 2003
@@ -1,5 +1,4 @@
/*
- *
* BRIEF MODULE DESCRIPTION
* IT8172/QED5231 board setup.
*
@@ -27,14 +26,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -52,6 +49,10 @@
#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+const char *get_system_type(void)
+{
+ return "ITE QED-4N-S01B";
+}
int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
{
@@ -78,7 +79,7 @@
* make the entire physical memory visible to pci bus masters
*/
IT_READ(IT_MC_PCICR, pcicr);
- pcicr &= ~0x1f;
+ pcicr &= ~0x1f;
pcicr |= (mem_size - 1) >> 22;
IT_WRITE(IT_MC_PCICR, pcicr);
diff -Nru a/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c b/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c
--- a/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,197 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Board specific pci fixups.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-
-#ifdef CONFIG_PCI
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/it8172/it8172.h>
-#include <asm/it8172/it8172_pci.h>
-#include <asm/it8172/it8172_int.h>
-
-void __init board_int_line_fixup(struct pci_dev *dev)
-{
- unsigned int slot, func;
- unsigned char pin;
- const int internal_func_irqs[7] = {
- IT8172_AC97_IRQ,
- IT8172_DMA_IRQ,
- IT8172_CDMA_IRQ,
- IT8172_USB_IRQ,
- IT8172_BRIDGE_MASTER_IRQ,
- IT8172_IDE_IRQ,
- IT8172_MC68K_IRQ
- };
-
-#ifdef DEBUG
- printk("board_int_line_fixup bus %d\n", dev->bus->number);
-#endif
- if (dev->bus->number != 0)
- return;
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
-
-#ifdef DEBUG
- pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
-#endif
-
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
-
- switch (slot) {
- case 0x01:
- /*
- * Internal device 1 is actually 7 different internal
- * devices on the IT8172G (a multi-function device).
- */
- if (func < 7)
- dev->irq = internal_func_irqs[func];
- break;
- case 0x10:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x11:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x12:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x13:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x14:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- default:
- return;
- }
-
-#ifdef DEBUG
- printk("irq fixup: slot %d, vendor %x, int line %d, int number %d\n",
- slot, vendor, pin, dev->irq);
-#endif
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
-
-}
-
-struct pci_fixup pcibios_fixups[] = {
- { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, board_int_line_fixup },
- { 0 }
-};
-#endif
diff -Nru a/arch/mips/jazz/Makefile b/arch/mips/jazz/Makefile
--- a/arch/mips/jazz/Makefile Sun Aug 3 13:14:48 2003
+++ b/arch/mips/jazz/Makefile Sun Aug 3 13:14:48 2003
@@ -2,7 +2,8 @@
# Makefile for the Jazz family specific parts of the kernel
#
-obj-y := int-handler.o irq.o jazzdma.o reset.o rtc-jazz.o setup.o \
- floppy-jazz.o kbd-jazz.o
+export-syms := jazz-ksyms.o
+obj-y := int-handler.o irq.o jazzdma.o jazz-ksyms.o reset.o \
+ rtc-jazz.o setup.o floppy-jazz.o kbd-jazz.o
EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/jazz/floppy-jazz.c b/arch/mips/jazz/floppy-jazz.c
--- a/arch/mips/jazz/floppy-jazz.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/jazz/floppy-jazz.c Sun Aug 3 13:14:47 2003
@@ -1,5 +1,4 @@
-/* $Id: floppy-jazz.c,v 1.2 1998/10/18 13:18:25 tsbogend Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
@@ -16,7 +15,6 @@
#include <asm/addrspace.h>
#include <asm/jazz.h>
#include <asm/jazzdma.h>
-#include <asm/keyboard.h>
#include <asm/pgtable.h>
#include <asm/floppy.h>
@@ -108,9 +106,9 @@
static void jazz_fd_dma_mem_free(unsigned long addr,
unsigned long size)
-{
+{
vdma_free(vdma_phys2log(PHYSADDR(addr)));
- free_pages(addr, get_order(size));
+ free_pages(addr, get_order(size));
}
static unsigned long jazz_fd_drive_type(unsigned long n)
diff -Nru a/arch/mips/jazz/int-handler.S b/arch/mips/jazz/int-handler.S
--- a/arch/mips/jazz/int-handler.S Sun Aug 3 13:14:44 2003
+++ b/arch/mips/jazz/int-handler.S Sun Aug 3 13:14:44 2003
@@ -1,5 +1,4 @@
-/* $Id: int-handler.S,v 1.14 1999/05/01 22:40:34 ralf Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
@@ -251,14 +250,14 @@
nor s1,zero,s1
jal do_IRQ
-
+
/*
* Reenable interrupt
*/
lhu t2,JAZZ_IO_IRQ_ENABLE
or t2,s1
sh t2,JAZZ_IO_IRQ_ENABLE
-
+
j ret_from_irq
/*
diff -Nru a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
--- a/arch/mips/jazz/irq.c Sun Aug 3 13:14:44 2003
+++ b/arch/mips/jazz/irq.c Sun Aug 3 13:14:44 2003
@@ -8,11 +8,11 @@
*/
#include <linux/delay.h>
#include <linux/init.h>
-#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
+#include <asm/i8259.h>
#include <asm/io.h>
#include <asm/jazz.h>
@@ -20,7 +20,7 @@
/*
* On systems with i8259-style interrupt controllers we assume for
- * driver compatibility reasons interrupts 0 - 15 to be the i8295
+ * driver compatibility reasons interrupts 0 - 15 to be the i8259
* interrupts even if the hardware uses a different interrupt numbering.
*/
void __init init_IRQ (void)
diff -Nru a/arch/mips/jazz/jazz-ksyms.c b/arch/mips/jazz/jazz-ksyms.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/jazz/jazz-ksyms.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 1997, 1998, 2000, 2001, 2003 by Ralf Baechle
+ */
+#include <linux/module.h>
+
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/jazzdma.h>
+
+EXPORT_SYMBOL(vdma_alloc);
+EXPORT_SYMBOL(vdma_free);
+EXPORT_SYMBOL(vdma_log2phys);
diff -Nru a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
--- a/arch/mips/jazz/jazzdma.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/jazz/jazzdma.c Sun Aug 3 13:14:52 2003
@@ -12,6 +12,7 @@
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
+#include <linux/spinlock.h>
#include <asm/mipsregs.h>
#include <asm/jazz.h>
#include <asm/io.h>
@@ -27,6 +28,8 @@
static unsigned long vdma_pagetable_start;
+static spinlock_t vdma_lock = SPIN_LOCK_UNLOCKED;
+
/*
* Debug stuff
*/
@@ -42,10 +45,9 @@
*/
static inline void vdma_pgtbl_init(void)
{
- int i;
+ VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
unsigned long paddr = 0;
- VDMA_PGTBL_ENTRY *pgtbl =
- (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+ int i;
for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
pgtbl[i].frame = paddr;
@@ -88,15 +90,9 @@
*/
unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
{
- VDMA_PGTBL_ENTRY *entry =
- (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
- int first;
- int last;
- int pages;
- unsigned int frame;
- unsigned long laddr;
- int i;
- unsigned long flags;
+ VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+ int first, last, pages, frame, i;
+ unsigned long laddr, flags;
/* check arguments */
@@ -112,7 +108,7 @@
return VDMA_ERROR; /* invalid physical address */
}
- save_and_cli(flags);
+ spin_lock_irqsave(&vdma_lock, flags);
/*
* Find free chunk
*/
@@ -122,7 +118,7 @@
while (entry[first].owner != VDMA_PAGE_EMPTY &&
first < VDMA_PGTBL_ENTRIES) first++;
if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
- restore_flags(flags);
+ spin_unlock_irqrestore(&vdma_lock, flags);
return VDMA_ERROR;
}
@@ -153,8 +149,7 @@
r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
if (vdma_debug > 1)
- printk
- ("vdma_alloc: Allocated %d pages starting from %08lx\n",
+ printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
pages, laddr);
if (vdma_debug > 2) {
@@ -170,7 +165,8 @@
printk("\n");
}
- restore_flags(flags);
+ spin_unlock_irqrestore(&vdma_lock, flags);
+
return laddr;
}
@@ -181,8 +177,7 @@
*/
int vdma_free(unsigned long laddr)
{
- VDMA_PGTBL_ENTRY *pgtbl =
- (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+ VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
int i;
i = laddr >> 12;
@@ -210,8 +205,7 @@
* Map certain page(s) to another physical address.
* Caller must have allocated the page(s) before.
*/
-int vdma_remap(unsigned long laddr, unsigned long paddr,
- unsigned long size)
+int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
{
VDMA_PGTBL_ENTRY *pgtbl =
(VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
@@ -526,8 +520,7 @@
{
int residual;
- residual =
- r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
+ residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
if (vdma_debug)
printk("vdma_get_residual: channel %d: residual=%d\n",
diff -Nru a/arch/mips/jazz/kbd-jazz.c b/arch/mips/jazz/kbd-jazz.c
--- a/arch/mips/jazz/kbd-jazz.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/jazz/kbd-jazz.c Sun Aug 3 13:14:48 2003
@@ -1,5 +1,4 @@
-/* $Id: kbd-jazz.c,v 1.1 1998/10/28 12:38:10 ralf Exp $
- *
+/*
* Low-level hardware access stuff for Jazz family machines.
*
* This file is subject to the terms and conditions of the GNU General Public
@@ -9,8 +8,6 @@
* Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
*/
#include <linux/sched.h>
-#include <linux/pc_keyb.h>
-#include <asm/keyboard.h>
#include <asm/jazz.h>
#define jazz_kh ((keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS)
@@ -39,20 +36,20 @@
static int jazz_aux_request_irq(void (*handler)(int, void *, struct pt_regs *))
{
int ret;
-
+
ret = request_irq(JAZZ_MOUSE_IRQ, handler, 0, "PS/2 Mouse", NULL);
if (ret != 0)
return ret;
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
- r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) |
+ r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
+ r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) |
JAZZ_IE_MOUSE);
return 0;
}
static void jazz_aux_free_irq(void)
{
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
+ r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
r4030_read_reg16(JAZZ_IO_IRQ_ENABLE)
| JAZZ_IE_MOUSE);
free_irq(JAZZ_MOUSE_IRQ, NULL);
diff -Nru a/arch/mips/jazz/reset.c b/arch/mips/jazz/reset.c
--- a/arch/mips/jazz/reset.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/jazz/reset.c Sun Aug 3 13:14:52 2003
@@ -1,33 +1,28 @@
/*
- * linux/arch/mips/jazz/process.c
- *
- * Reset a Jazz machine.
- *
- * $Id:$
+ * Reset a Jazz machine.
*/
-
#include <linux/jiffies.h>
#include <asm/jazz.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/reboot.h>
#include <asm/delay.h>
-#include <asm/keyboard.h>
static inline void kb_wait(void)
{
unsigned long start = jiffies;
+ unsigned long timeout = start + HZ/2;
do {
if (! (kbd_read_status() & 0x02))
return;
- } while (jiffies - start < 50);
+ } time_before_eq(jiffies, timeout);
}
void jazz_machine_restart(char *command)
{
while (1) {
- kb_wait ();
+ kb_wait ();
kbd_write_command (0xd1);
kb_wait ();
kbd_write_output (0x00);
diff -Nru a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
--- a/arch/mips/jazz/setup.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/jazz/setup.c Sun Aug 3 13:14:50 2003
@@ -20,7 +20,6 @@
#include <linux/mc146818rtc.h>
#include <linux/ide.h>
#include <asm/bootinfo.h>
-#include <asm/keyboard.h>
#include <asm/irq.h>
#include <asm/jazz.h>
#include <asm/jazzdma.h>
@@ -28,6 +27,7 @@
#include <asm/reboot.h>
#include <asm/io.h>
#include <asm/pgtable.h>
+#include <asm/traps.h>
/*
* Initial irq handlers.
@@ -72,7 +72,7 @@
JAZZ_IE_FLOPPY);
r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
- change_cp0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
+ change_c0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
/* set the clock to 100 Hz */
r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
request_region(0x20, 0x20, "pic1");
@@ -80,16 +80,24 @@
i8259_setup_irq(2, &irq2);
}
+
void __init jazz_setup(void)
{
+ /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
add_wired_entry (0x02000017, 0x03c00017, 0xe0000000, PM_64K);
+
+ /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
add_wired_entry (0x02400017, 0x02440017, 0xe2000000, PM_16M);
+
+ /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
add_wired_entry (0x01800017, 0x01000017, 0xe4000000, PM_4M);
irq_setup = jazz_irq_setup;
- mips_io_port_base = JAZZ_PORT_BASE;
+ set_io_port_base(JAZZ_PORT_BASE);
+#ifdef CONFIG_EISA
if (mips_machtype == MACH_MIPS_MAGNUM_4000)
EISA_bus = 1;
+#endif
isa_slot_offset = 0xe3000000;
request_region(0x00,0x20,"dma1");
request_region(0x40,0x20,"timer");
diff -Nru a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c
--- a/arch/mips/jmr3927/common/prom.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/jmr3927/common/prom.c Sun Aug 3 13:14:49 2003
@@ -78,11 +78,6 @@
*cp = '\0';
}
-int __init page_is_ram(unsigned long pagenr)
-{
- return 1;
-}
-
void prom_free_prom_memory (void)
{
}
diff -Nru a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
--- a/arch/mips/kernel/Makefile Sun Aug 3 13:14:47 2003
+++ b/arch/mips/kernel/Makefile Sun Aug 3 13:14:47 2003
@@ -4,11 +4,15 @@
extra-y := head.o init_task.o
-obj-y += branch.o cpu-probe.o process.o signal.o entry.o traps.o \
- ptrace.o irq.o reset.o semaphore.o setup.o syscall.o \
- sysmips.o ipc.o scall_o32.o time.o unaligned.o
-
-obj-$(CONFIG_MODULES) += mips_ksyms.o
+obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
+ ptrace.o reset.o semaphore.o setup.o signal.o syscall.o \
+ time.o traps.o unaligned.o
+
+ifdef CONFIG_MODULES
+obj-y += mips_ksyms.o
+obj-$(CONFIG_MIPS32) += module-elf32.o
+obj-$(CONFIG_MIPS64) += module-elf64.o
+endif
obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o
obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o
@@ -32,15 +36,23 @@
obj-$(CONFIG_I8259) += i8259.o
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
+obj-$(CONFIG_MIPS32) += scall32-o32.o
+obj-$(CONFIG_MIPS64) += scall64-64.o
obj-$(CONFIG_BINFMT_IRIX) += irixelf.o irixioctl.o irixsig.o sysirix.o \
irixinv.o
+obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o
+obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
+obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o ptrace32.o
+
obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o
obj-$(CONFIG_PROC_FS) += proc.o
-ifndef CONFIG_MAPPED_PCI_IO
+ifndef CONFIG_MAPPED_DMA_IO
obj-y += pci-dma.o
endif
-obj-$(CONFIG_MODULES) += module.o
+obj-$(CONFIG_MIPS64) += cpu-bugs64.o
+
+CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/binfmt_elfn32.c Sun Aug 3 13:14:49 2003
@@ -0,0 +1,115 @@
+/*
+ * Support for n32 Linux/MIPS ELF binaries.
+ *
+ * Copyright (C) 1999, 2001 Ralf Baechle
+ * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
+ *
+ * Heavily inspired by the 32-bit Sparc compat code which is
+ * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
+ * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
+ */
+
+#define ELF_ARCH EM_MIPS
+#define ELF_CLASS ELFCLASS32
+#ifdef __MIPSEB__
+#define ELF_DATA ELFDATA2MSB;
+#else /* __MIPSEL__ */
+#define ELF_DATA ELFDATA2LSB;
+#endif
+
+/* ELF register definitions */
+#define ELF_NGREG 45
+#define ELF_NFPREG 33
+
+typedef unsigned long elf_greg_t;
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef double elf_fpreg_t;
+typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(hdr) \
+({ \
+ int __res = 1; \
+ struct elfhdr *__h = (hdr); \
+ \
+ if (__h->e_machine != EM_MIPS) \
+ __res = 0; \
+ if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
+ __res = 0; \
+ if (((__h->e_flags & EF_MIPS_ABI2) == 0) || \
+ ((__h->e_flags & EF_MIPS_ABI) != 0)) \
+ __res = 0; \
+ \
+ __res; \
+})
+
+#define TASK32_SIZE 0x7fff8000UL
+#undef ELF_ET_DYN_BASE
+#define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2)
+
+#include <asm/processor.h>
+#include <linux/module.h>
+#include <linux/config.h>
+#include <linux/elfcore.h>
+#include <linux/compat.h>
+
+#define elf_prstatus elf_prstatus32
+struct elf_prstatus32
+{
+ struct elf_siginfo pr_info; /* Info associated with signal */
+ short pr_cursig; /* Current signal */
+ unsigned int pr_sigpend; /* Set of pending signals */
+ unsigned int pr_sighold; /* Set of held signals */
+ pid_t pr_pid;
+ pid_t pr_ppid;
+ pid_t pr_pgrp;
+ pid_t pr_sid;
+ struct compat_timeval pr_utime; /* User time */
+ struct compat_timeval pr_stime; /* System time */
+ struct compat_timeval pr_cutime;/* Cumulative user time */
+ struct compat_timeval pr_cstime;/* Cumulative system time */
+ elf_gregset_t pr_reg; /* GP registers */
+ int pr_fpvalid; /* True if math co-processor being used. */
+};
+
+#define elf_prpsinfo elf_prpsinfo32
+struct elf_prpsinfo32
+{
+ char pr_state; /* numeric process state */
+ char pr_sname; /* char for pr_state */
+ char pr_zomb; /* zombie */
+ char pr_nice; /* nice val */
+ unsigned int pr_flag; /* flags */
+ __kernel_uid_t pr_uid;
+ __kernel_gid_t pr_gid;
+ pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
+ /* Lots missing */
+ char pr_fname[16]; /* filename of executable */
+ char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
+};
+
+#define elf_addr_t u32
+#define elf_caddr_t u32
+#define init_elf_binfmt init_elfn32_binfmt
+
+#define ELF_CORE_EFLAGS EF_MIPS_ABI2
+
+#undef CONFIG_BINFMT_ELF
+#ifdef CONFIG_BINFMT_ELF32
+#define CONFIG_BINFMT_ELF CONFIG_BINFMT_ELF32
+#endif
+#undef CONFIG_BINFMT_ELF_MODULE
+#ifdef CONFIG_BINFMT_ELF32_MODULE
+#define CONFIG_BINFMT_ELF_MODULE CONFIG_BINFMT_ELF32_MODULE
+#endif
+
+MODULE_DESCRIPTION("Binary format loader for compatibility with n32 Linux/MIPS binaries");
+MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
+
+#undef MODULE_DESCRIPTION
+#undef MODULE_AUTHOR
+
+#include "../../../fs/binfmt_elf.c"
diff -Nru a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/binfmt_elfo32.c Sun Aug 3 13:14:47 2003
@@ -0,0 +1,136 @@
+/*
+ * Support for o32 Linux/MIPS ELF binaries.
+ *
+ * Copyright (C) 1999, 2001 Ralf Baechle
+ * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
+ *
+ * Heavily inspired by the 32-bit Sparc compat code which is
+ * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
+ * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
+ */
+
+#define ELF_ARCH EM_MIPS
+#define ELF_CLASS ELFCLASS32
+#ifdef __MIPSEB__
+#define ELF_DATA ELFDATA2MSB;
+#else /* __MIPSEL__ */
+#define ELF_DATA ELFDATA2LSB;
+#endif
+
+/* ELF register definitions */
+#define ELF_NGREG 45
+#define ELF_NFPREG 33
+
+typedef unsigned int elf_greg_t;
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef double elf_fpreg_t;
+typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(hdr) \
+({ \
+ int __res = 1; \
+ struct elfhdr *__h = (hdr); \
+ \
+ if (__h->e_machine != EM_MIPS) \
+ __res = 0; \
+ if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
+ __res = 0; \
+ if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
+ __res = 0; \
+ if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
+ ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
+ __res = 0; \
+ \
+ __res; \
+})
+
+#define TASK32_SIZE 0x7fff8000UL
+#undef ELF_ET_DYN_BASE
+#define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2)
+
+#include <asm/processor.h>
+#include <linux/module.h>
+#include <linux/config.h>
+#include <linux/elfcore.h>
+#include <linux/compat.h>
+
+#define elf_prstatus elf_prstatus32
+struct elf_prstatus32
+{
+ struct elf_siginfo pr_info; /* Info associated with signal */
+ short pr_cursig; /* Current signal */
+ unsigned int pr_sigpend; /* Set of pending signals */
+ unsigned int pr_sighold; /* Set of held signals */
+ pid_t pr_pid;
+ pid_t pr_ppid;
+ pid_t pr_pgrp;
+ pid_t pr_sid;
+ struct compat_timeval pr_utime; /* User time */
+ struct compat_timeval pr_stime; /* System time */
+ struct compat_timeval pr_cutime;/* Cumulative user time */
+ struct compat_timeval pr_cstime;/* Cumulative system time */
+ elf_gregset_t pr_reg; /* GP registers */
+ int pr_fpvalid; /* True if math co-processor being used. */
+};
+
+#define elf_prpsinfo elf_prpsinfo32
+struct elf_prpsinfo32
+{
+ char pr_state; /* numeric process state */
+ char pr_sname; /* char for pr_state */
+ char pr_zomb; /* zombie */
+ char pr_nice; /* nice val */
+ unsigned int pr_flag; /* flags */
+ __kernel_uid_t pr_uid;
+ __kernel_gid_t pr_gid;
+ pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
+ /* Lots missing */
+ char pr_fname[16]; /* filename of executable */
+ char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
+};
+
+#define elf_addr_t u32
+#define elf_caddr_t u32
+#define init_elf_binfmt init_elf32_binfmt
+
+
+#undef ELF_CORE_COPY_REGS
+#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
+
+void elf32_core_copy_regs(elf_gregset_t _dest, struct pt_regs *_regs)
+{
+ int i;
+
+ memset(_dest, 0, sizeof(elf_gregset_t));
+
+ /* XXXKW the 6 is from EF_REG0 in gdb/gdb/mips-linux-tdep.c, include/asm-mips/reg.h */
+ for (i=6; i<38; i++)
+ _dest[i] = (elf_greg_t) _regs->regs[i-6];
+ _dest[i++] = (elf_greg_t) _regs->lo;
+ _dest[i++] = (elf_greg_t) _regs->hi;
+ _dest[i++] = (elf_greg_t) _regs->cp0_epc;
+ _dest[i++] = (elf_greg_t) _regs->cp0_badvaddr;
+ _dest[i++] = (elf_greg_t) _regs->cp0_status;
+ _dest[i++] = (elf_greg_t) _regs->cp0_cause;
+}
+
+#undef CONFIG_BINFMT_ELF
+#ifdef CONFIG_BINFMT_ELF32
+#define CONFIG_BINFMT_ELF CONFIG_BINFMT_ELF32
+#endif
+#undef CONFIG_BINFMT_ELF_MODULE
+#ifdef CONFIG_BINFMT_ELF32_MODULE
+#define CONFIG_BINFMT_ELF_MODULE CONFIG_BINFMT_ELF32_MODULE
+#endif
+
+MODULE_DESCRIPTION("Binary format loader for compatibility with o32 Linux/MIPS binaries");
+MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
+
+#undef MODULE_DESCRIPTION
+#undef MODULE_AUTHOR
+
+#include "../../../fs/binfmt_elf.c"
diff -Nru a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
--- a/arch/mips/kernel/branch.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/kernel/branch.c Sun Aug 3 13:14:48 2003
@@ -1,6 +1,4 @@
/*
- * Branch and jump emulation.
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
@@ -16,7 +14,6 @@
#include <asm/inst.h>
#include <asm/ptrace.h>
#include <asm/uaccess.h>
-#include <asm/processor.h>
/*
* Compute the return address and do emulate branch simulation, if required.
@@ -34,7 +31,7 @@
/*
* Read the instruction
*/
- addr = (unsigned int *) (unsigned long) epc;
+ addr = (unsigned int *) epc;
if (__get_user(insn.word, addr)) {
force_sig(SIGSEGV, current);
return -EFAULT;
@@ -164,7 +161,7 @@
*/
case cop1_op:
if (!cpu_has_fpu)
- fcr31 = current->thread.fpu.soft.sr;
+ fcr31 = current->thread.fpu.soft.fcr31;
else
asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
bit = (insn.i_format.rt >> 2);
diff -Nru a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/cpu-bugs64.c Sun Aug 3 13:14:51 2003
@@ -0,0 +1,242 @@
+/*
+ * Copyright (C) 2003 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/ptrace.h>
+#include <linux/stddef.h>
+
+#include <asm/bugs.h>
+#include <asm/cpu.h>
+#include <asm/fpu.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+
+static inline void check_mult_sh(void)
+{
+ unsigned long flags;
+ int m1, m2;
+ long p, s, v;
+
+ printk("Checking for the multiply/shift bug... ");
+
+ local_irq_save(flags);
+ /*
+ * The following code leads to a wrong result of dsll32 when
+ * executed on R4000 rev. 2.2 or 3.0.
+ *
+ * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
+ * 3.0" by MIPS Technologies, Inc., errata #16 and #28 for
+ * details. I got no permission to duplicate them here,
+ * sigh... --macro
+ */
+ asm volatile(
+ ".set push\n\t"
+ ".set noat\n\t"
+ ".set noreorder\n\t"
+ ".set nomacro\n\t"
+ "mult %1, %2\n\t"
+ "dsll32 %0, %3, %4\n\t"
+ "mflo $0\n\t"
+ ".set pop"
+ : "=r" (v)
+ : "r" (5), "r" (8), "r" (5), "I" (0)
+ : "hi", "lo", "accum");
+ local_irq_restore(flags);
+
+ if (v == 5L << 32) {
+ printk("no.\n");
+ return;
+ }
+
+ printk("yes, workaround... ");
+ local_irq_save(flags);
+ /*
+ * We want the multiply and the shift to be isolated from the
+ * rest of the code to disable gcc optimizations. Hence the
+ * asm statements that execute nothing, but make gcc not know
+ * what the values of m1, m2 and s are and what v and p are
+ * used for.
+ *
+ * We have to use single integers for m1 and m2 and a double
+ * one for p to be sure the mulsidi3 gcc's RTL multiplication
+ * instruction has the workaround applied. Older versions of
+ * gcc have correct mulsi3, but other multiplication variants
+ * lack the workaround.
+ */
+ asm volatile(
+ ""
+ : "=r" (m1), "=r" (m2), "=r" (s)
+ : "0" (5), "1" (8), "2" (5));
+ p = m1 * m2;
+ v = s << 32;
+ asm volatile(
+ ""
+ : "=r" (v)
+ : "0" (v), "r" (p));
+ local_irq_restore(flags);
+
+ if (v == 5L << 32) {
+ printk("yes.\n");
+ return;
+ }
+
+ printk("no.\n");
+ panic("Reliable operation impossible!\n"
+#ifndef CONFIG_CPU_R4000
+ "Configure for R4000 to enable the workaround."
+#else
+ "Please report to <linux-mips@linux-mips.org>."
+#endif
+ );
+}
+
+static volatile int daddi_ov __initdata = 0;
+
+asmlinkage void __init do_daddi_ov(struct pt_regs *regs)
+{
+ daddi_ov = 1;
+ regs->cp0_epc += 4;
+}
+
+static inline void check_daddi(void)
+{
+ extern asmlinkage void handle_daddi_ov(void);
+ unsigned long flags;
+ void *handler;
+ long v;
+
+ printk("Checking for the daddi bug... ");
+
+ local_irq_save(flags);
+ handler = set_except_vector(12, handle_daddi_ov);
+ /*
+ * The following code fails to trigger an overflow exception
+ * when executed on R4000 rev. 2.2 or 3.0.
+ *
+ * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
+ * 3.0" by MIPS Technologies, Inc., erratum #23 for details.
+ * I got no permission to duplicate it here, sigh... --macro
+ */
+ asm volatile(
+ ".set push\n\t"
+ ".set noat\n\t"
+ ".set noreorder\n\t"
+ ".set nomacro\n\t"
+#ifdef HAVE_AS_SET_DADDI
+ ".set daddi\n\t"
+#endif
+ "daddi %0, %1, %2\n\t"
+ ".set pop"
+ : "=r" (v)
+ : "r" (0x7fffffffffffedcd), "I" (0x1234));
+ set_except_vector(12, handler);
+ local_irq_restore(flags);
+
+ if (daddi_ov) {
+ printk("no.\n");
+ return;
+ }
+
+ printk("yes, workaround... ");
+
+ local_irq_save(flags);
+ handler = set_except_vector(12, handle_daddi_ov);
+ asm volatile(
+ "daddi %0, %1, %2"
+ : "=r" (v)
+ : "r" (0x7fffffffffffedcd), "I" (0x1234));
+ set_except_vector(12, handler);
+ local_irq_restore(flags);
+
+ if (daddi_ov) {
+ printk("yes.\n");
+ return;
+ }
+
+ printk("no.\n");
+ panic("Reliable operation impossible!\n"
+#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400)
+ "Configure for R4000 or R4400 to enable the workaround."
+#else
+ "Please report to <linux-mips@linux-mips.org>."
+#endif
+ );
+}
+
+static inline void check_daddiu(void)
+{
+ long v, w;
+
+ printk("Checking for the daddiu bug... ");
+
+ /*
+ * The following code leads to a wrong result of daddiu when
+ * executed on R4400 rev. 1.0.
+ *
+ * See "MIPS R4400PC/SC Errata, Processor Revision 1.0" by
+ * MIPS Technologies, Inc., erratum #7 for details.
+ *
+ * According to "MIPS R4000PC/SC Errata, Processor Revision
+ * 2.2 and 3.0" by MIPS Technologies, Inc., erratum #41 this
+ * problem affects R4000 rev. 2.2 and 3.0, too. Testing
+ * failed to trigger it so far.
+ *
+ * I got no permission to duplicate the errata here, sigh...
+ * --macro
+ */
+ asm volatile(
+ ".set push\n\t"
+ ".set noat\n\t"
+ ".set noreorder\n\t"
+ ".set nomacro\n\t"
+#ifdef HAVE_AS_SET_DADDI
+ ".set daddi\n\t"
+#endif
+ "daddiu %0, %2, %3\n\t"
+ "addiu %1, $0, %3\n\t"
+ "daddu %1, %2\n\t"
+ ".set pop"
+ : "=&r" (v), "=&r" (w)
+ : "r" (0x7fffffffffffedcd), "I" (0x1234));
+
+ if (v == w) {
+ printk("no.\n");
+ return;
+ }
+
+ printk("yes, workaround... ");
+
+ asm volatile(
+ "daddiu %0, %2, %3\n\t"
+ "addiu %1, $0, %3\n\t"
+ "daddu %1, %2"
+ : "=&r" (v), "=&r" (w)
+ : "r" (0x7fffffffffffedcd), "I" (0x1234));
+
+ if (v == w) {
+ printk("yes.\n");
+ return;
+ }
+
+ printk("no.\n");
+ panic("Reliable operation impossible!\n"
+#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400)
+ "Configure for R4000 or R4400 to enable the workaround."
+#else
+ "Please report to <linux-mips@linux-mips.org>."
+#endif
+ );
+}
+
+void __init check_bugs64(void)
+{
+ check_mult_sh();
+ check_daddi();
+ check_daddiu();
+}
diff -Nru a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
--- a/arch/mips/kernel/cpu-probe.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/kernel/cpu-probe.c Sun Aug 3 13:14:47 2003
@@ -1,10 +1,24 @@
+/*
+ * Processor capabilities determination functions.
+ *
+ * Copyright (C) 1994 - 2003 Ralf Baechle
+ * Copyright (C) 2001 MIPS Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/ptrace.h>
#include <linux/stddef.h>
+
#include <asm/bugs.h>
#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
+#include <asm/system.h>
/*
* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
@@ -96,7 +110,7 @@
}
}
-void __init check_bugs(void)
+void __init check_bugs32(void)
{
check_wait();
}
@@ -493,7 +507,6 @@
break;
default:
c->cputype = CPU_UNKNOWN;
- c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
}
if (c->options & MIPS_CPU_FPU)
c->fpu_id = cpu_get_fpu_id();
diff -Nru a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
--- a/arch/mips/kernel/entry.S Sun Aug 3 13:14:46 2003
+++ b/arch/mips/kernel/entry.S Sun Aug 3 13:14:46 2003
@@ -3,376 +3,137 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994 - 2000, 2001 by Ralf Baechle
+ * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2001 MIPS Technologies, Inc.
*/
#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/sys.h>
-#include <asm/addrspace.h>
#include <asm/asm.h>
-#include <asm/cacheops.h>
-#include <asm/errno.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
+#include <asm/asmmacro.h>
#include <asm/regdef.h>
+#include <asm/mipsregs.h>
#include <asm/stackframe.h>
-#include <asm/processor.h>
-#include <asm/fpregdef.h>
-#include <asm/unistd.h>
#include <asm/isadep.h>
#include <asm/thread_info.h>
#ifdef CONFIG_PREEMPT
- .macro preempt_stop
- cli
- .endm
-
- .macro init_ret_intr temp
- mfc0 t0, CP0_STATUS # cli
- ori t0, t0, 1
- xori t0, t0, 1
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- lw \temp, TI_PRE_COUNT($28)
- subu \temp, \temp, 1
- sw \temp, TI_PRE_COUNT($28)
- .endm
+ .macro preempt_stop reg=t0
+ .endm
#else
- .macro preempt_stop
- .endm
-
- .macro init_ret_intr
- .endm
-
-#define resume_kernel restore_all
+ .macro preempt_stop reg=t0
+ local_irq_disable \reg
+ .endm
+#define resume_kernel restore_all
#endif
- .text
- .align 5
- .set push
- .set reorder
-FEXPORT(ret_from_irq)
+ .text
+ .align 5
FEXPORT(ret_from_exception)
- lw t0, PT_STATUS(sp) # returning to kernel mode?
- andi t0, t0, KU_USER
- beqz t0, resume_kernel
+ preempt_stop
+FEXPORT(ret_from_irq)
+ LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
+ andi t0, t0, KU_USER
+ beqz t0, resume_kernel
FEXPORT(resume_userspace)
- mfc0 t0, CP0_STATUS # make sure we dont miss an
- ori t0, t0, 1 # interrupt setting need_resched
- xori t0, t0, 1 # between sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28)
- andi a2, _TIF_WORK_MASK # current->work (ignoring
- # syscall_trace)
- bnez a2, work_pending
- j restore_all
+ local_irq_disable t0 # make sure we dont miss an
+ # interrupt setting need_resched
+ # between sampling and return
+ LONG_L a2, TI_FLAGS($28) # current->work
+ andi a2, _TIF_WORK_MASK # (ignoring syscall_trace)
+ bnez a2, work_pending
+ j restore_all
#ifdef CONFIG_PREEMPT
ENTRY(resume_kernel)
- lw t0, TI_PRE_COUNT($28)
- bnez t0, restore_all
- LONG_L t0, TI_FLAGS($28)
- andi t1, t0, _TIF_NEED_RESCHED
- beqz restore_all
-#ifdef CONFIG_SMP
- lw t0, TI_CPU($28)
- la t1, irq_stat
- sll t0, 5 # *sizeof(irq_cpustat_t)
- addu t0, t1
- lw t1, local_bh_count(t0)
- addl t0, local_irq_count(t0)
-#else
- lw t1, irq_stat+local_bh_count
- addl t0, irq_stat+local_irq_count
-#endif
- addu t0, t1
- bnez t0, restore_all
- lw t0, TI_PRE_COUNT($28)
- addiu t0, 1
- sw t0, TI_PRE_COUNT($28)
- sti
- movl t0, TI_TASK($28) # ti->task
- sw zero, TASK_STATE(t0) # current->state = TASK_RUNNING
- jal schedule
- j ret_from_intr
+ lw t0, TI_PRE_COUNT($28)
+ bnez t0, restore_all
+need_resched:
+ LONG_L t0, TI_FLAGS($28)
+ andi t1, t0, _TIF_NEED_RESCHED
+ beqz restore_all
+ if (in_exception_path)
+ goto restore_all;
+ li t0, PREEMPT_ACTIVE
+ sw t0, TI_PRE_COUNT($28)
+ local_irq_enable t0
+ jal schedule
+ local_irq_disable t0
+ b need_resched
#endif
FEXPORT(ret_from_fork)
- jal schedule_tail
+ jal schedule_tail
FEXPORT(syscall_exit)
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, syscall_exit_work
+ local_irq_disable # make sure need_resched and
+ # signals dont change between
+ # sampling and return
+ LONG_L a2, TI_FLAGS($28) # current->work
+ li t0, _TIF_ALLWORK_MASK
+ and t0, a2, t0
+ bnez t0, syscall_exit_work
FEXPORT(restore_all)
- .set noat
- RESTORE_ALL_AND_RET
- .set at
+ .set noat
+ RESTORE_ALL_AND_RET
+ .set at
FEXPORT(work_pending)
- andi t0, a2, _TIF_NEED_RESCHED
- bnez t0, work_notifysig
+ andi t0, a2, _TIF_NEED_RESCHED
+ bnez t0, work_notifysig
work_resched:
- jal schedule
+ jal schedule
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28)
- andi a2, _TIF_WORK_MASK # is there any work to be done
- # other than syscall tracing?
- beqz a2, restore_all
- andi t0, a2, _TIF_NEED_RESCHED
- bnez t0, work_resched
-
-work_notifysig: # deal with pending signals and
- # notify-resume requests
- move a0, sp
- li a1, 0
- jal do_notify_resume # a2 already loaded
- j restore_all
+ local_irq_disable t0 # make sure need_resched and
+ # signals dont change between
+ # sampling and return
+ LONG_L a2, TI_FLAGS($28)
+ andi t0, a2, _TIF_WORK_MASK # is there any work to be done
+ # other than syscall tracing?
+ beqz t0, restore_all
+ andi t0, a2, _TIF_NEED_RESCHED
+ bnez t0, work_resched
+
+work_notifysig: # deal with pending signals and
+ # notify-resume requests
+ move a0, sp
+ li a1, 0
+ jal do_notify_resume # a2 already loaded
+ j restore_all
FEXPORT(syscall_exit_work)
- LONG_L t0, TI_FLAGS($28)
- bgez t0, work_pending # trace bit is set
- mfc0 t0, CP0_STATUS # could let do_syscall_trace()
- ori t0, t0, 1 # call schedule() instead
- mtc0 t0, CP0_STATUS
- jal do_syscall_trace
- b resume_userspace
+ LONG_L t0, TI_FLAGS($28)
+ li t1, _TIF_SYSCALL_TRACE
+ and t0, t1
+ bnez t0, work_pending # trace bit is set
+ local_irq_enable # could let do_syscall_trace()
+ # call schedule() instead
+ jal do_syscall_trace
+ b resume_userspace
/*
* Common spurious interrupt handler.
*/
- .text
- .align 5
+ .text
+ .align 5
LEAF(spurious_interrupt)
- /*
- * Someone tried to fool us by sending an interrupt but we
- * couldn't find a cause for it.
- */
- lui t1,%hi(irq_err_count)
- lw t0,%lo(irq_err_count)(t1)
- addiu t0,1
- sw t0,%lo(irq_err_count)(t1)
- j ret_from_irq
- END(spurious_interrupt)
-
- __INIT
-
- .set reorder
-
- NESTED(except_vec1_generic, 0, sp)
- PANIC("Exception vector 1 called")
- END(except_vec1_generic)
-
- /*
- * General exception vector. Used for all CPUs except R4000
- * and R4400 SC and MC versions.
- */
- NESTED(except_vec3_generic, 0, sp)
-#if R5432_CP0_INTERRUPT_WAR
- mfc0 k0, CP0_INDEX
-#endif
- mfc0 k1, CP0_CAUSE
- la k0, exception_handlers
- andi k1, k1, 0x7c
- addu k0, k0, k1
- lw k0, (k0)
- jr k0
- END(except_vec3_generic)
- .set at
-
- /* General exception vector R4000 version. */
- NESTED(except_vec3_r4000, 0, sp)
- .set push
- .set mips3
- .set noat
- mfc0 k1, CP0_CAUSE
- li k0, 31<<2
- andi k1, k1, 0x7c
- .set noreorder
- beq k1, k0, handle_vced
- li k0, 14<<2
- beq k1, k0, handle_vcei
- lui k0, %hi(exception_handlers)
- addiu k0, %lo(exception_handlers)
- .set reorder
- addu k0, k0, k1
- lw k0, (k0)
- jr k0
-
- /*
- * Big shit, we now may have two dirty primary cache lines for
- * the same physical address. We can savely invalidate the
- * line pointed to by c0_badvaddr because after return from
- * this exception handler the load / store will be re-executed.
- */
-handle_vced:
- mfc0 k0, CP0_BADVADDR
- li k1, -4
- and k0, k1
- mtc0 zero, CP0_TAGLO
- cache Index_Store_Tag_D,(k0)
- cache Hit_Writeback_Inv_SD,(k0)
-#ifdef CONFIG_PROC_FS
- lui k0, %hi(vced_count)
- lw k1, %lo(vced_count)(k0)
- addiu k1, 1
- sw k1, %lo(vced_count)(k0)
-#endif
- eret
-
-handle_vcei:
- mfc0 k0, CP0_BADVADDR
- cache Hit_Writeback_Inv_SD, (k0) # also cleans pi
-#ifdef CONFIG_PROC_FS
- lui k0, %hi(vcei_count)
- lw k1, %lo(vcei_count)(k0)
- addiu k1, 1
- sw k1, %lo(vcei_count)(k0)
-#endif
- eret
- .set pop
- END(except_vec3_r4000)
-
- __FINIT
-
-/*
- * Build a default exception handler for the exceptions that don't need
- * special handlers. If you didn't know yet - I *like* playing games with
- * the C preprocessor ...
- */
-#define __BUILD_clear_none(exception)
-#define __BUILD_clear_sti(exception) \
- STI
-#define __BUILD_clear_cli(exception) \
- CLI
-#define __BUILD_clear_kmode(exception) \
- KMODE
-#define __BUILD_clear_fpe(exception) \
- cfc1 a1,fcr31; \
- li a2,~(0x3f<<12); \
- and a2,a1; \
- ctc1 a2,fcr31; \
- STI
-#define __BUILD_clear_ade(exception) \
- .set reorder; \
- MFC0 t0,CP0_BADVADDR; \
- .set noreorder; \
- REG_S t0,PT_BVADDR(sp); \
- KMODE
-#define __BUILD_silent(exception)
-
-#define fmt "Got %s at %08lx.\n"
-
-#define __BUILD_verbose(exception) \
- la a1,8f; \
- TEXT (#exception); \
- REG_L a2,PT_EPC(sp); \
- PRINT(fmt)
-#define __BUILD_count(exception) \
- .set reorder; \
- lw t0,exception_count_##exception; \
- .set noreorder; \
- addiu t0, 1; \
- sw t0,exception_count_##exception; \
- .data; \
-EXPORT(exception_count_##exception); \
- .word 0; \
- .previous;
-#define BUILD_HANDLER(exception,handler,clear,verbose) \
- .align 5; \
- NESTED(handle_##exception, PT_SIZE, sp); \
- .set noat; \
- SAVE_ALL; \
- FEXPORT(handle_##exception##_int); \
- __BUILD_clear_##clear(exception); \
- .set at; \
- __BUILD_##verbose(exception); \
- jal do_##handler; \
- move a0, sp; \
- j ret_from_exception; \
- nop; \
- END(handle_##exception)
-
- BUILD_HANDLER(adel,ade,ade,silent) /* #4 */
- BUILD_HANDLER(ades,ade,ade,silent) /* #5 */
- BUILD_HANDLER(ibe,be,cli,silent) /* #6 */
- BUILD_HANDLER(dbe,be,cli,silent) /* #7 */
- BUILD_HANDLER(bp,bp,kmode,silent) /* #9 */
- BUILD_HANDLER(ri,ri,kmode,silent) /* #10 */
- BUILD_HANDLER(cpu,cpu,kmode,silent) /* #11 */
- BUILD_HANDLER(ov,ov,kmode,silent) /* #12 */
- BUILD_HANDLER(tr,tr,kmode,silent) /* #13 */
- BUILD_HANDLER(fpe,fpe,fpe,silent) /* #15 */
- BUILD_HANDLER(mdmx,mdmx,sti,silent) /* #22 */
- BUILD_HANDLER(watch,watch,sti,silent) /* #23 */
- BUILD_HANDLER(mcheck,mcheck,cli,silent) /* #24 */
- BUILD_HANDLER(reserved,reserved,kmode,silent) /* others */
-
- .set pop
-
-/*
- * Table of syscalls
- */
- .data
- .align PTRLOG
-EXPORT(sys_call_table)
-#define SYS(call, narg) PTR call
-
- /* Reserved space for all SVR4 syscalls. */
- .space (1000)*PTRSIZE
-
-#ifdef CONFIG_BINFMT_IRIX
- /* 32bit IRIX5 system calls. */
-#include "irix5sys.h"
-#else
- .space (1000)*PTRSIZE /* No IRIX syscalls */
-#endif
-
- /* Reserved space for all the BSD43 and POSIX syscalls. */
- .space (2000)*PTRSIZE
-
- /* Linux flavoured syscalls. */
-#include "syscalls.h"
-
-/*
- * Number of arguments of each syscall
- */
-EXPORT(sys_narg_table)
-#undef SYS
-#define SYS(call, narg) .byte narg
-
- /* Reserved space for all SVR4 flavoured syscalls. */
- .space (1000)
-
-#ifdef CONFIG_BINFMT_IRIX
- /* 32bit IRIX5 system calls. */
-#include "irix5sys.h"
+ /*
+ * Someone tried to fool us by sending an interrupt but we
+ * couldn't find a cause for it.
+ */
+#ifdef CONFIG_SMP
+ lui t1, %hi(irq_err_count)
+1: ll t0, %lo(irq_err_count)(t1)
+ addiu t0, 1
+ sc t0, %lo(irq_err_count)(t1)
+ beqz t0, 1b
#else
- .space (1000) /* No IRIX syscalls */
+ lui t1, %hi(irq_err_count)
+ lw t0, %lo(irq_err_count)(t1)
+ addiu t0, 1
+ sw t0, %lo(irq_err_count)(t1)
#endif
-
- /* Reserved space for all the BSD43 and POSIX syscalls. */
- .space (2000)
-
- /* Linux flavoured syscalls. */
-#include "syscalls.h"
+ j ret_from_irq
+ END(spurious_interrupt)
diff -Nru a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
--- a/arch/mips/kernel/gdb-low.S Sun Aug 3 13:14:46 2003
+++ b/arch/mips/kernel/gdb-low.S Sun Aug 3 13:14:46 2003
@@ -13,6 +13,19 @@
#include <asm/stackframe.h>
#include <asm/gdb-stub.h>
+#ifdef CONFIG_MIPS32
+#define DMFC0 mfc0
+#define DMTC0 mtc0
+#define LDC1 lwc1
+#define SDC1 lwc1
+#endif
+#ifdef CONFIG_MIPS64
+#define DMFC0 dmfc0
+#define DMTC0 dmtc0
+#define LDC1 ldc1
+#define SDC1 ldc1
+#endif
+
/*
* [jsun] We reserves about 2x GDB_FR_SIZE in stack. The lower (addressed)
* part is used to store registers and passed to exception handler.
@@ -31,164 +44,164 @@
.set noat
.set noreorder
- mfc0 k0,CP0_STATUS
- sll k0,3 /* extract cu0 bit */
- bltz k0,1f
- move k1,sp
+ mfc0 k0, CP0_STATUS
+ sll k0, 3 /* extract cu0 bit */
+ bltz k0, 1f
+ move k1, sp
/*
* Called from user mode, go somewhere else.
*/
- lui k1,%hi(saved_vectors)
- mfc0 k0,CP0_CAUSE
- andi k0,k0,0x7c
- add k1,k1,k0
- lw k0,%lo(saved_vectors)(k1)
+ lui k1, %hi(saved_vectors)
+ mfc0 k0, CP0_CAUSE
+ andi k0, k0, 0x7c
+ add k1, k1, k0
+ lw k0, %lo(saved_vectors)(k1)
jr k0
nop
1:
- move k0,sp
- subu sp,k1,GDB_FR_SIZE*2 # see comment above
- sw k0,GDB_FR_REG29(sp)
- sw v0,GDB_FR_REG2(sp)
+ move k0, sp
+ subu sp, k1, GDB_FR_SIZE*2 # see comment above
+ LONG_S $26, GDB_FR_REG29(sp)
+ LONG_S $2, GDB_FR_REG2(sp)
/*
* First save the CP0 and special registers
*/
- mfc0 v0,CP0_STATUS
- sw v0,GDB_FR_STATUS(sp)
- mfc0 v0,CP0_CAUSE
- sw v0,GDB_FR_CAUSE(sp)
- mfc0 v0,CP0_EPC
- sw v0,GDB_FR_EPC(sp)
- mfc0 v0,CP0_BADVADDR
- sw v0,GDB_FR_BADVADDR(sp)
+ mfc0 v0, CP0_STATUS
+ LONG_S v0, GDB_FR_STATUS(sp)
+ mfc0 v0, CP0_CAUSE
+ LONG_S v0, GDB_FR_CAUSE(sp)
+ DMFC0 v0, CP0_EPC
+ LONG_S v0, GDB_FR_EPC(sp)
+ DMFC0 v0, CP0_BADVADDR
+ LONG_S v0, GDB_FR_BADVADDR(sp)
mfhi v0
- sw v0,GDB_FR_HI(sp)
+ LONG_S v0, GDB_FR_HI(sp)
mflo v0
- sw v0,GDB_FR_LO(sp)
+ LONG_S v0, GDB_FR_LO(sp)
/*
* Now the integer registers
*/
- sw zero,GDB_FR_REG0(sp) /* I know... */
- sw $1,GDB_FR_REG1(sp)
+ LONG_S zero, GDB_FR_REG0(sp) /* I know... */
+ LONG_S $1, GDB_FR_REG1(sp)
/* v0 already saved */
- sw v1,GDB_FR_REG3(sp)
- sw a0,GDB_FR_REG4(sp)
- sw a1,GDB_FR_REG5(sp)
- sw a2,GDB_FR_REG6(sp)
- sw a3,GDB_FR_REG7(sp)
- sw t0,GDB_FR_REG8(sp)
- sw t1,GDB_FR_REG9(sp)
- sw t2,GDB_FR_REG10(sp)
- sw t3,GDB_FR_REG11(sp)
- sw t4,GDB_FR_REG12(sp)
- sw t5,GDB_FR_REG13(sp)
- sw t6,GDB_FR_REG14(sp)
- sw t7,GDB_FR_REG15(sp)
- sw s0,GDB_FR_REG16(sp)
- sw s1,GDB_FR_REG17(sp)
- sw s2,GDB_FR_REG18(sp)
- sw s3,GDB_FR_REG19(sp)
- sw s4,GDB_FR_REG20(sp)
- sw s5,GDB_FR_REG21(sp)
- sw s6,GDB_FR_REG22(sp)
- sw s7,GDB_FR_REG23(sp)
- sw t8,GDB_FR_REG24(sp)
- sw t9,GDB_FR_REG25(sp)
- sw k0,GDB_FR_REG26(sp)
- sw k1,GDB_FR_REG27(sp)
- sw gp,GDB_FR_REG28(sp)
+ LONG_S $3, GDB_FR_REG3(sp)
+ LONG_S $3, GDB_FR_REG4(sp)
+ LONG_S $5, GDB_FR_REG5(sp)
+ LONG_S $6, GDB_FR_REG6(sp)
+ LONG_S $7, GDB_FR_REG7(sp)
+ LONG_S $8, GDB_FR_REG8(sp)
+ LONG_S $9, GDB_FR_REG9(sp)
+ LONG_S $10, GDB_FR_REG10(sp)
+ LONG_S $11, GDB_FR_REG11(sp)
+ LONG_S $12, GDB_FR_REG12(sp)
+ LONG_S $13, GDB_FR_REG13(sp)
+ LONG_S $14, GDB_FR_REG14(sp)
+ LONG_S $15, GDB_FR_REG15(sp)
+ LONG_S $16, GDB_FR_REG16(sp)
+ LONG_S $17, GDB_FR_REG17(sp)
+ LONG_S $18, GDB_FR_REG18(sp)
+ LONG_S $19, GDB_FR_REG19(sp)
+ LONG_S $20, GDB_FR_REG20(sp)
+ LONG_S $21, GDB_FR_REG21(sp)
+ LONG_S $22, GDB_FR_REG22(sp)
+ LONG_S $23, GDB_FR_REG23(sp)
+ LONG_S $24, GDB_FR_REG24(sp)
+ LONG_S $25, GDB_FR_REG25(sp)
+ LONG_S $26, GDB_FR_REG26(sp)
+ LONG_S $27, GDB_FR_REG27(sp)
+ LONG_S $28, GDB_FR_REG28(sp)
/* sp already saved */
- sw fp,GDB_FR_REG30(sp)
- sw ra,GDB_FR_REG31(sp)
+ LONG_S $30, GDB_FR_REG30(sp)
+ LONG_S $31, GDB_FR_REG31(sp)
CLI /* disable interrupts */
/*
* Followed by the floating point registers
*/
- mfc0 v0,CP0_STATUS /* FPU enabled? */
- srl v0,v0,16
- andi v0,v0,(ST0_CU1 >> 16)
+ mfc0 v0, CP0_STATUS /* FPU enabled? */
+ srl v0, v0, 16
+ andi v0, v0, (ST0_CU1 >> 16)
beqz v0,2f /* disabled, skip */
nop
- swc1 $0,GDB_FR_FPR0(sp)
- swc1 $1,GDB_FR_FPR1(sp)
- swc1 $2,GDB_FR_FPR2(sp)
- swc1 $3,GDB_FR_FPR3(sp)
- swc1 $4,GDB_FR_FPR4(sp)
- swc1 $5,GDB_FR_FPR5(sp)
- swc1 $6,GDB_FR_FPR6(sp)
- swc1 $7,GDB_FR_FPR7(sp)
- swc1 $8,GDB_FR_FPR8(sp)
- swc1 $9,GDB_FR_FPR9(sp)
- swc1 $10,GDB_FR_FPR10(sp)
- swc1 $11,GDB_FR_FPR11(sp)
- swc1 $12,GDB_FR_FPR12(sp)
- swc1 $13,GDB_FR_FPR13(sp)
- swc1 $14,GDB_FR_FPR14(sp)
- swc1 $15,GDB_FR_FPR15(sp)
- swc1 $16,GDB_FR_FPR16(sp)
- swc1 $17,GDB_FR_FPR17(sp)
- swc1 $18,GDB_FR_FPR18(sp)
- swc1 $19,GDB_FR_FPR19(sp)
- swc1 $20,GDB_FR_FPR20(sp)
- swc1 $21,GDB_FR_FPR21(sp)
- swc1 $22,GDB_FR_FPR22(sp)
- swc1 $23,GDB_FR_FPR23(sp)
- swc1 $24,GDB_FR_FPR24(sp)
- swc1 $25,GDB_FR_FPR25(sp)
- swc1 $26,GDB_FR_FPR26(sp)
- swc1 $27,GDB_FR_FPR27(sp)
- swc1 $28,GDB_FR_FPR28(sp)
- swc1 $29,GDB_FR_FPR29(sp)
- swc1 $30,GDB_FR_FPR30(sp)
- swc1 $31,GDB_FR_FPR31(sp)
+ SDC1 $0, GDB_FR_FPR0(sp)
+ SDC1 $1, GDB_FR_FPR1(sp)
+ SDC1 $2, GDB_FR_FPR2(sp)
+ SDC1 $3, GDB_FR_FPR3(sp)
+ SDC1 $4, GDB_FR_FPR4(sp)
+ SDC1 $5, GDB_FR_FPR5(sp)
+ SDC1 $6, GDB_FR_FPR6(sp)
+ SDC1 $7, GDB_FR_FPR7(sp)
+ SDC1 $8, GDB_FR_FPR8(sp)
+ SDC1 $9, GDB_FR_FPR9(sp)
+ SDC1 $10, GDB_FR_FPR10(sp)
+ SDC1 $11, GDB_FR_FPR11(sp)
+ SDC1 $12, GDB_FR_FPR12(sp)
+ SDC1 $13, GDB_FR_FPR13(sp)
+ SDC1 $14, GDB_FR_FPR14(sp)
+ SDC1 $15, GDB_FR_FPR15(sp)
+ SDC1 $16, GDB_FR_FPR16(sp)
+ SDC1 $17, GDB_FR_FPR17(sp)
+ SDC1 $18, GDB_FR_FPR18(sp)
+ SDC1 $19, GDB_FR_FPR19(sp)
+ SDC1 $20, GDB_FR_FPR20(sp)
+ SDC1 $21, GDB_FR_FPR21(sp)
+ SDC1 $22, GDB_FR_FPR22(sp)
+ SDC1 $23, GDB_FR_FPR23(sp)
+ SDC1 $24, GDB_FR_FPR24(sp)
+ SDC1 $25, GDB_FR_FPR25(sp)
+ SDC1 $26, GDB_FR_FPR26(sp)
+ SDC1 $27, GDB_FR_FPR27(sp)
+ SDC1 $28, GDB_FR_FPR28(sp)
+ SDC1 $29, GDB_FR_FPR29(sp)
+ SDC1 $30, GDB_FR_FPR30(sp)
+ SDC1 $31, GDB_FR_FPR31(sp)
/*
* FPU control registers
*/
- cfc1 v0,CP1_STATUS
- sw v0,GDB_FR_FSR(sp)
- cfc1 v0,CP1_REVISION
- sw v0,GDB_FR_FIR(sp)
+ cfc1 v0, CP1_STATUS
+ LONG_S v0, GDB_FR_FSR(sp)
+ cfc1 v0, CP1_REVISION
+ LONG_S v0, GDB_FR_FIR(sp)
/*
* Current stack frame ptr
*/
2:
- sw sp,GDB_FR_FRP(sp)
+ LONG_S sp, GDB_FR_FRP(sp)
/*
* CP0 registers (R4000/R4400 unused registers skipped)
*/
- mfc0 v0,CP0_INDEX
- sw v0,GDB_FR_CP0_INDEX(sp)
- mfc0 v0,CP0_RANDOM
- sw v0,GDB_FR_CP0_RANDOM(sp)
- mfc0 v0,CP0_ENTRYLO0
- sw v0,GDB_FR_CP0_ENTRYLO0(sp)
- mfc0 v0,CP0_ENTRYLO1
- sw v0,GDB_FR_CP0_ENTRYLO1(sp)
- mfc0 v0,CP0_CONTEXT
- sw v0,GDB_FR_CP0_CONTEXT(sp)
- mfc0 v0,CP0_PAGEMASK
- sw v0,GDB_FR_CP0_PAGEMASK(sp)
- mfc0 v0,CP0_WIRED
- sw v0,GDB_FR_CP0_WIRED(sp)
- mfc0 v0,CP0_ENTRYHI
- sw v0,GDB_FR_CP0_ENTRYHI(sp)
- mfc0 v0,CP0_PRID
- sw v0,GDB_FR_CP0_PRID(sp)
+ mfc0 v0, CP0_INDEX
+ LONG_S v0, GDB_FR_CP0_INDEX(sp)
+ mfc0 v0, CP0_RANDOM
+ LONG_S v0, GDB_FR_CP0_RANDOM(sp)
+ DMFC0 v0, CP0_ENTRYLO0
+ LONG_S v0, GDB_FR_CP0_ENTRYLO0(sp)
+ DMFC0 v0, CP0_ENTRYLO1
+ LONG_S v0, GDB_FR_CP0_ENTRYLO1(sp)
+ DMFC0 v0, CP0_CONTEXT
+ LONG_S v0, GDB_FR_CP0_CONTEXT(sp)
+ mfc0 v0, CP0_PAGEMASK
+ LONG_S v0, GDB_FR_CP0_PAGEMASK(sp)
+ mfc0 v0, CP0_WIRED
+ LONG_S v0, GDB_FR_CP0_WIRED(sp)
+ DMFC0 v0, CP0_ENTRYHI
+ LONG_S v0, GDB_FR_CP0_ENTRYHI(sp)
+ mfc0 v0, CP0_PRID
+ LONG_S v0, GDB_FR_CP0_PRID(sp)
.set at
@@ -207,120 +220,120 @@
.set noat
- lw v0,GDB_FR_CP0_ENTRYHI(sp)
- lw v1,GDB_FR_CP0_WIRED(sp)
- mtc0 v0,CP0_ENTRYHI
- mtc0 v1,CP0_WIRED
- lw v0,GDB_FR_CP0_PAGEMASK(sp)
- lw v1,GDB_FR_CP0_ENTRYLO1(sp)
- mtc0 v0,CP0_PAGEMASK
- mtc0 v1,CP0_ENTRYLO1
- lw v0,GDB_FR_CP0_ENTRYLO0(sp)
- lw v1,GDB_FR_CP0_INDEX(sp)
- mtc0 v0,CP0_ENTRYLO0
- lw v0,GDB_FR_CP0_CONTEXT(sp)
- mtc0 v1,CP0_INDEX
- mtc0 v0,CP0_CONTEXT
+ LONG_L v0, GDB_FR_CP0_ENTRYHI(sp)
+ LONG_L v1, GDB_FR_CP0_WIRED(sp)
+ DMTC0 v0, CP0_ENTRYHI
+ mtc0 v1, CP0_WIRED
+ LONG_L v0, GDB_FR_CP0_PAGEMASK(sp)
+ LONG_L v1, GDB_FR_CP0_ENTRYLO1(sp)
+ mtc0 v0, CP0_PAGEMASK
+ DMTC0 v1, CP0_ENTRYLO1
+ LONG_L v0, GDB_FR_CP0_ENTRYLO0(sp)
+ LONG_L v1, GDB_FR_CP0_INDEX(sp)
+ DMTC0 v0, CP0_ENTRYLO0
+ LONG_L v0, GDB_FR_CP0_CONTEXT(sp)
+ mtc0 v1, CP0_INDEX
+ DMTC0 v0, CP0_CONTEXT
/*
* Next, the floating point registers
*/
- mfc0 v0,CP0_STATUS /* check if the FPU is enabled */
- srl v0,v0,16
- andi v0,v0,(ST0_CU1 >> 16)
+ mfc0 v0, CP0_STATUS /* check if the FPU is enabled */
+ srl v0, v0, 16
+ andi v0, v0, (ST0_CU1 >> 16)
- beqz v0,3f /* disabled, skip */
+ beqz v0, 3f /* disabled, skip */
nop
- lwc1 $31,GDB_FR_FPR31(sp)
- lwc1 $30,GDB_FR_FPR30(sp)
- lwc1 $29,GDB_FR_FPR29(sp)
- lwc1 $28,GDB_FR_FPR28(sp)
- lwc1 $27,GDB_FR_FPR27(sp)
- lwc1 $26,GDB_FR_FPR26(sp)
- lwc1 $25,GDB_FR_FPR25(sp)
- lwc1 $24,GDB_FR_FPR24(sp)
- lwc1 $23,GDB_FR_FPR23(sp)
- lwc1 $22,GDB_FR_FPR22(sp)
- lwc1 $21,GDB_FR_FPR21(sp)
- lwc1 $20,GDB_FR_FPR20(sp)
- lwc1 $19,GDB_FR_FPR19(sp)
- lwc1 $18,GDB_FR_FPR18(sp)
- lwc1 $17,GDB_FR_FPR17(sp)
- lwc1 $16,GDB_FR_FPR16(sp)
- lwc1 $15,GDB_FR_FPR15(sp)
- lwc1 $14,GDB_FR_FPR14(sp)
- lwc1 $13,GDB_FR_FPR13(sp)
- lwc1 $12,GDB_FR_FPR12(sp)
- lwc1 $11,GDB_FR_FPR11(sp)
- lwc1 $10,GDB_FR_FPR10(sp)
- lwc1 $9,GDB_FR_FPR9(sp)
- lwc1 $8,GDB_FR_FPR8(sp)
- lwc1 $7,GDB_FR_FPR7(sp)
- lwc1 $6,GDB_FR_FPR6(sp)
- lwc1 $5,GDB_FR_FPR5(sp)
- lwc1 $4,GDB_FR_FPR4(sp)
- lwc1 $3,GDB_FR_FPR3(sp)
- lwc1 $2,GDB_FR_FPR2(sp)
- lwc1 $1,GDB_FR_FPR1(sp)
- lwc1 $0,GDB_FR_FPR0(sp)
+ LDC1 $31, GDB_FR_FPR31(sp)
+ LDC1 $30, GDB_FR_FPR30(sp)
+ LDC1 $29, GDB_FR_FPR29(sp)
+ LDC1 $28, GDB_FR_FPR28(sp)
+ LDC1 $27, GDB_FR_FPR27(sp)
+ LDC1 $26, GDB_FR_FPR26(sp)
+ LDC1 $25, GDB_FR_FPR25(sp)
+ LDC1 $24, GDB_FR_FPR24(sp)
+ LDC1 $23, GDB_FR_FPR23(sp)
+ LDC1 $22, GDB_FR_FPR22(sp)
+ LDC1 $21, GDB_FR_FPR21(sp)
+ LDC1 $20, GDB_FR_FPR20(sp)
+ LDC1 $19, GDB_FR_FPR19(sp)
+ LDC1 $18, GDB_FR_FPR18(sp)
+ LDC1 $17, GDB_FR_FPR17(sp)
+ LDC1 $16, GDB_FR_FPR16(sp)
+ LDC1 $15, GDB_FR_FPR15(sp)
+ LDC1 $14, GDB_FR_FPR14(sp)
+ LDC1 $13, GDB_FR_FPR13(sp)
+ LDC1 $12, GDB_FR_FPR12(sp)
+ LDC1 $11, GDB_FR_FPR11(sp)
+ LDC1 $10, GDB_FR_FPR10(sp)
+ LDC1 $9, GDB_FR_FPR9(sp)
+ LDC1 $8, GDB_FR_FPR8(sp)
+ LDC1 $7, GDB_FR_FPR7(sp)
+ LDC1 $6, GDB_FR_FPR6(sp)
+ LDC1 $5, GDB_FR_FPR5(sp)
+ LDC1 $4, GDB_FR_FPR4(sp)
+ LDC1 $3, GDB_FR_FPR3(sp)
+ LDC1 $2, GDB_FR_FPR2(sp)
+ LDC1 $1, GDB_FR_FPR1(sp)
+ LDC1 $0, GDB_FR_FPR0(sp)
/*
* Now the CP0 and integer registers
*/
3:
- mfc0 t0,CP0_STATUS
- ori t0,0x1f
- xori t0,0x1f
- mtc0 t0,CP0_STATUS
-
- lw v0,GDB_FR_STATUS(sp)
- lw v1,GDB_FR_EPC(sp)
- mtc0 v0,CP0_STATUS
- mtc0 v1,CP0_EPC
- lw v0,GDB_FR_HI(sp)
- lw v1,GDB_FR_LO(sp)
+ mfc0 t0, CP0_STATUS
+ ori t0, 0x1f
+ xori t0, 0x1f
+ mtc0 t0, CP0_STATUS
+
+ LONG_L v0, GDB_FR_STATUS(sp)
+ LONG_L v1, GDB_FR_EPC(sp)
+ mtc0 v0, CP0_STATUS
+ DMTC0 v1, CP0_EPC
+ LONG_L v0, GDB_FR_HI(sp)
+ LONG_L v1, GDB_FR_LO(sp)
mthi v0
mtlo v0
- lw ra,GDB_FR_REG31(sp)
- lw fp,GDB_FR_REG30(sp)
- lw gp,GDB_FR_REG28(sp)
- lw k1,GDB_FR_REG27(sp)
- lw k0,GDB_FR_REG26(sp)
- lw t9,GDB_FR_REG25(sp)
- lw t8,GDB_FR_REG24(sp)
- lw s7,GDB_FR_REG23(sp)
- lw s6,GDB_FR_REG22(sp)
- lw s5,GDB_FR_REG21(sp)
- lw s4,GDB_FR_REG20(sp)
- lw s3,GDB_FR_REG19(sp)
- lw s2,GDB_FR_REG18(sp)
- lw s1,GDB_FR_REG17(sp)
- lw s0,GDB_FR_REG16(sp)
- lw t7,GDB_FR_REG15(sp)
- lw t6,GDB_FR_REG14(sp)
- lw t5,GDB_FR_REG13(sp)
- lw t4,GDB_FR_REG12(sp)
- lw t3,GDB_FR_REG11(sp)
- lw t2,GDB_FR_REG10(sp)
- lw t1,GDB_FR_REG9(sp)
- lw t0,GDB_FR_REG8(sp)
- lw a3,GDB_FR_REG7(sp)
- lw a2,GDB_FR_REG6(sp)
- lw a1,GDB_FR_REG5(sp)
- lw a0,GDB_FR_REG4(sp)
- lw v1,GDB_FR_REG3(sp)
- lw v0,GDB_FR_REG2(sp)
- lw $1,GDB_FR_REG1(sp)
+ LONG_L $31, GDB_FR_REG31(sp)
+ LONG_L $30, GDB_FR_REG30(sp)
+ LONG_L $28, GDB_FR_REG28(sp)
+ LONG_L $27, GDB_FR_REG27(sp)
+ LONG_L $26, GDB_FR_REG26(sp)
+ LONG_L $25, GDB_FR_REG25(sp)
+ LONG_L $24, GDB_FR_REG24(sp)
+ LONG_L $23, GDB_FR_REG23(sp)
+ LONG_L $22, GDB_FR_REG22(sp)
+ LONG_L $21, GDB_FR_REG21(sp)
+ LONG_L $20, GDB_FR_REG20(sp)
+ LONG_L $19, GDB_FR_REG19(sp)
+ LONG_L $18, GDB_FR_REG18(sp)
+ LONG_L $17, GDB_FR_REG17(sp)
+ LONG_L $16, GDB_FR_REG16(sp)
+ LONG_L $15, GDB_FR_REG15(sp)
+ LONG_L $14, GDB_FR_REG14(sp)
+ LONG_L $13, GDB_FR_REG13(sp)
+ LONG_L $12, GDB_FR_REG12(sp)
+ LONG_L $11, GDB_FR_REG11(sp)
+ LONG_L $10, GDB_FR_REG10(sp)
+ LONG_L $9, GDB_FR_REG9(sp)
+ LONG_L $8, GDB_FR_REG8(sp)
+ LONG_L $7, GDB_FR_REG7(sp)
+ LONG_L $6, GDB_FR_REG6(sp)
+ LONG_L $5, GDB_FR_REG5(sp)
+ LONG_L $4, GDB_FR_REG4(sp)
+ LONG_L $3, GDB_FR_REG3(sp)
+ LONG_L $2, GDB_FR_REG2(sp)
+ LONG_L $1, GDB_FR_REG1(sp)
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
- lw k0, GDB_FR_EPC(sp)
- lw sp, GDB_FR_REG29(sp) /* Deallocate stack */
+ LONG_L k0, GDB_FR_EPC(sp)
+ LONG_L $29, GDB_FR_REG29(sp) /* Deallocate stack */
jr k0
rfe
#else
- lw sp, GDB_FR_REG29(sp) /* Deallocate stack */
+ LONG_L sp, GDB_FR_REG29(sp) /* Deallocate stack */
.set mips3
eret
diff -Nru a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
--- a/arch/mips/kernel/gdb-stub.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/kernel/gdb-stub.c Sun Aug 3 13:14:53 2003
@@ -11,6 +11,9 @@
* Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
*
* Copyright (C) 1995 Andreas Busse
+ *
+ * Copyright (C) 2003 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
*/
/*
@@ -125,6 +128,8 @@
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/spinlock.h>
#include <linux/slab.h>
#include <linux/reboot.h>
@@ -148,6 +153,8 @@
*/
extern void breakpoint(void);
extern void breakinst(void);
+extern void async_breakpoint(void);
+extern void async_breakinst(void);
extern void adel(void);
/*
@@ -159,10 +166,17 @@
static int computeSignal(int tt);
static int hex(unsigned char ch);
static int hexToInt(char **ptr, int *intValue);
+static int hexToLong(char **ptr, long *longValue);
static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault);
void handle_exception(struct gdb_regs *regs);
/*
+ * spin locks for smp case
+ */
+static spinlock_t kgdb_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t kgdb_cpulock[NR_CPUS] = { [0 ... NR_CPUS-1] = SPIN_LOCK_UNLOCKED};
+
+/*
* BUFMAX defines the maximum number of characters in inbound/outbound buffers
* at least NUMREGBYTES*2 are needed for register packets
*/
@@ -171,6 +185,7 @@
static char input_buffer[BUFMAX];
static char output_buffer[BUFMAX];
static int initialized; /* !0 means we've been initialized */
+static int kgdb_started;
static const char hexchars[]="0123456789abcdef";
/* Used to prevent crashes in memory access. Note that they'll crash anyway if
@@ -394,6 +409,17 @@
local_irq_restore(flags);
}
+void restore_debug_traps(void)
+{
+ struct hard_trap_info *ht;
+ unsigned long flags;
+
+ save_and_cli(flags);
+ for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
+ set_except_vector(ht->tt, saved_vectors[ht->tt]);
+ restore_flags(flags);
+}
+
/*
* Convert the MIPS hardware trap type code to a Unix signal number.
*/
@@ -433,6 +459,27 @@
return (numChars);
}
+static int hexToLong(char **ptr, long *longValue)
+{
+ int numChars = 0;
+ int hexValue;
+
+ *longValue = 0;
+
+ while (**ptr) {
+ hexValue = hex(**ptr);
+ if (hexValue < 0)
+ break;
+
+ *longValue = (*longValue << 4) | hexValue;
+ numChars ++;
+
+ (*ptr)++;
+ }
+
+ return numChars;
+}
+
#if 0
/*
@@ -473,8 +520,8 @@
* This is where we save the original instructions.
*/
static struct gdb_bp_save {
- unsigned int addr;
- unsigned int val;
+ unsigned long addr;
+ unsigned int val;
} step_bp[2];
#define BP 0x0000000d /* break opcode */
@@ -485,7 +532,7 @@
static void single_step(struct gdb_regs *regs)
{
union mips_instruction insn;
- unsigned int targ;
+ unsigned long targ;
int is_branch, is_cond, i;
targ = regs->cp0_epc;
@@ -572,12 +619,39 @@
*/
static struct gdb_bp_save async_bp;
-void set_async_breakpoint(unsigned int epc)
+/*
+ * Swap the interrupted EPC with our asynchronous breakpoint routine.
+ * This is safer than stuffing the breakpoint in-place, since no cache
+ * flushes (or resulting smp_call_functions) are required. The
+ * assumption is that only one CPU will be handling asynchronous bp's,
+ * and only one can be active at a time.
+ */
+extern spinlock_t smp_call_lock;
+void set_async_breakpoint(unsigned long *epc)
{
- async_bp.addr = epc;
- async_bp.val = *(unsigned *)epc;
- *(unsigned *)epc = BP;
- __flush_cache_all();
+ /* skip breaking into userland */
+ if ((*epc & 0x80000000) == 0)
+ return;
+
+ /* avoid deadlock if someone is make IPC */
+ if (spin_is_locked(&smp_call_lock))
+ return;
+
+ async_bp.addr = *epc;
+ *epc = (unsigned long)async_breakpoint;
+}
+
+void kgdb_wait(void *arg)
+{
+ unsigned flags;
+ int cpu = smp_processor_id();
+
+ local_irq_save(flags);
+
+ spin_lock(&kgdb_cpulock[cpu]);
+ spin_unlock(&kgdb_cpulock[cpu]);
+
+ local_irq_restore(flags);
}
@@ -590,10 +664,45 @@
{
int trap; /* Trap type */
int sigval;
- int addr;
+ long addr;
int length;
char *ptr;
unsigned long *stack;
+ int i;
+
+ kgdb_started = 1;
+
+ /*
+ * acquire the big kgdb spinlock
+ */
+ if (!spin_trylock(&kgdb_lock)) {
+ /*
+ * some other CPU has the lock, we should go back to
+ * receive the gdb_wait IPC
+ */
+ return;
+ }
+
+ /*
+ * If we're in async_breakpoint(), restore the real EPC from
+ * the breakpoint.
+ */
+ if (regs->cp0_epc == (unsigned long)async_breakinst) {
+ regs->cp0_epc = async_bp.addr;
+ async_bp.addr = 0;
+ }
+
+ /*
+ * acquire the CPU spinlocks
+ */
+ for (i=0; i< smp_num_cpus; i++)
+ if (spin_trylock(&kgdb_cpulock[i]) == 0)
+ panic("kgdb: couldn't get cpulock %d\n", i);
+
+ /*
+ * force other cpus to enter kgdb
+ */
+ smp_call_function(kgdb_wait, NULL, 0, 0);
/*
* If we're in breakpoint() increment the PC
@@ -616,16 +725,6 @@
}
}
- /*
- * If we were interrupted asynchronously by gdb, then a
- * breakpoint was set at the EPC of the interrupt so
- * that we'd wind up here with an interesting stack frame.
- */
- if (async_bp.addr) {
- *(unsigned *)async_bp.addr = async_bp.val;
- async_bp.addr = 0;
- }
-
stack = (long *)regs->reg29; /* stack ptr */
sigval = computeSignal(trap);
@@ -647,7 +746,7 @@
*ptr++ = hexchars[REG_EPC >> 4];
*ptr++ = hexchars[REG_EPC & 0xf];
*ptr++ = ':';
- ptr = mem2hex((char *)®s->cp0_epc, ptr, 4, 0);
+ ptr = mem2hex((char *)®s->cp0_epc, ptr, sizeof(long), 0);
*ptr++ = ';';
/*
@@ -656,7 +755,7 @@
*ptr++ = hexchars[REG_FP >> 4];
*ptr++ = hexchars[REG_FP & 0xf];
*ptr++ = ':';
- ptr = mem2hex((char *)®s->reg30, ptr, 4, 0);
+ ptr = mem2hex((char *)®s->reg30, ptr, sizeof(long), 0);
*ptr++ = ';';
/*
@@ -665,7 +764,7 @@
*ptr++ = hexchars[REG_SP >> 4];
*ptr++ = hexchars[REG_SP & 0xf];
*ptr++ = ':';
- ptr = mem2hex((char *)®s->reg29, ptr, 4, 0);
+ ptr = mem2hex((char *)®s->reg29, ptr, sizeof(long), 0);
*ptr++ = ';';
*ptr++ = 0;
@@ -687,10 +786,13 @@
output_buffer[3] = 0;
break;
+ /*
+ * Detach debugger; let CPU run
+ */
case 'D':
- /* detach; let CPU run */
putpacket(output_buffer);
- return;
+ goto finish_kgdb;
+ break;
case 'd':
/* toggle debug flag */
@@ -701,12 +803,12 @@
*/
case 'g':
ptr = output_buffer;
- ptr = mem2hex((char *)®s->reg0, ptr, 32*4, 0); /* r0...r31 */
- ptr = mem2hex((char *)®s->cp0_status, ptr, 6*4, 0); /* cp0 */
- ptr = mem2hex((char *)®s->fpr0, ptr, 32*4, 0); /* f0...31 */
- ptr = mem2hex((char *)®s->cp1_fsr, ptr, 2*4, 0); /* cp1 */
- ptr = mem2hex((char *)®s->frame_ptr, ptr, 2*4, 0); /* frp */
- ptr = mem2hex((char *)®s->cp0_index, ptr, 16*4, 0); /* cp0 */
+ ptr = mem2hex((char *)®s->reg0, ptr, 32*sizeof(long), 0); /* r0...r31 */
+ ptr = mem2hex((char *)®s->cp0_status, ptr, 6*sizeof(long), 0); /* cp0 */
+ ptr = mem2hex((char *)®s->fpr0, ptr, 32*sizeof(long), 0); /* f0...31 */
+ ptr = mem2hex((char *)®s->cp1_fsr, ptr, 2*sizeof(long), 0); /* cp1 */
+ ptr = mem2hex((char *)®s->frame_ptr, ptr, 2*sizeof(long), 0); /* frp */
+ ptr = mem2hex((char *)®s->cp0_index, ptr, 16*sizeof(long), 0); /* cp0 */
break;
/*
@@ -715,17 +817,17 @@
case 'G':
{
ptr = &input_buffer[1];
- hex2mem(ptr, (char *)®s->reg0, 32*4, 0);
- ptr += 32*8;
- hex2mem(ptr, (char *)®s->cp0_status, 6*4, 0);
- ptr += 6*8;
- hex2mem(ptr, (char *)®s->fpr0, 32*4, 0);
- ptr += 32*8;
- hex2mem(ptr, (char *)®s->cp1_fsr, 2*4, 0);
- ptr += 2*8;
- hex2mem(ptr, (char *)®s->frame_ptr, 2*4, 0);
- ptr += 2*8;
- hex2mem(ptr, (char *)®s->cp0_index, 16*4, 0);
+ hex2mem(ptr, (char *)®s->reg0, 32*sizeof(long), 0);
+ ptr += 32*(2*sizeof(long));
+ hex2mem(ptr, (char *)®s->cp0_status, 6*sizeof(long), 0);
+ ptr += 6*(2*sizeof(long));
+ hex2mem(ptr, (char *)®s->fpr0, 32*sizeof(long), 0);
+ ptr += 32*(2*sizeof(long));
+ hex2mem(ptr, (char *)®s->cp1_fsr, 2*sizeof(long), 0);
+ ptr += 2*(2*sizeof(long));
+ hex2mem(ptr, (char *)®s->frame_ptr, 2*sizeof(long), 0);
+ ptr += 2*(2*sizeof(long));
+ hex2mem(ptr, (char *)®s->cp0_index, 16*sizeof(long), 0);
strcpy(output_buffer,"OK");
}
break;
@@ -736,7 +838,7 @@
case 'm':
ptr = &input_buffer[1];
- if (hexToInt(&ptr, &addr)
+ if (hexToLong(&ptr, &addr)
&& *ptr++ == ','
&& hexToInt(&ptr, &length)) {
if (mem2hex((char *)addr, output_buffer, length, 1))
@@ -752,7 +854,7 @@
case 'M':
ptr = &input_buffer[1];
- if (hexToInt(&ptr, &addr)
+ if (hexToLong(&ptr, &addr)
&& *ptr++ == ','
&& hexToInt(&ptr, &length)
&& *ptr++ == ':') {
@@ -772,24 +874,12 @@
/* try to read optional parameter, pc unchanged if no parm */
ptr = &input_buffer[1];
- if (hexToInt(&ptr, &addr))
+ if (hexToLong(&ptr, &addr))
regs->cp0_epc = addr;
-
- /*
- * Need to flush the instruction cache here, as we may
- * have deposited a breakpoint, and the icache probably
- * has no way of knowing that a data ref to some location
- * may have changed something that is in the instruction
- * cache.
- * NB: We flush both caches, just to be sure...
- */
-
- __flush_cache_all();
- return;
- /* NOTREACHED */
+
+ goto exit_kgdb_exception;
break;
-
/*
* kill the program; let us try to restart the machine
* Reset the whole machine.
@@ -808,9 +898,9 @@
* use breakpoints and continue, instead.
*/
single_step(regs);
- __flush_cache_all();
- return;
+ goto exit_kgdb_exception;
/* NOTREACHED */
+ break;
/*
* Set baud rate (bBB)
@@ -865,6 +955,20 @@
putpacket(output_buffer);
} /* while */
+
+ return;
+
+finish_kgdb:
+ restore_debug_traps();
+
+exit_kgdb_exception:
+ /* release locks so other CPUs can go */
+ for (i=0; i < smp_num_cpus; i++)
+ spin_unlock(&kgdb_cpulock[i]);
+ spin_unlock(&kgdb_lock);
+
+ __flush_cache_all();
+ return;
}
/*
@@ -888,12 +992,25 @@
);
}
+/* Nothing but the break; don't pollute any registers */
+void async_breakpoint(void)
+{
+ __asm__ __volatile__(
+ ".globl async_breakinst\n\t"
+ ".set\tnoreorder\n\t"
+ "nop\n\t"
+ "async_breakinst:\tbreak\n\t"
+ "nop\n\t"
+ ".set\treorder"
+ );
+}
+
void adel(void)
{
__asm__ __volatile__(
".globl\tadel\n\t"
- "la\t$8,0x80000001\n\t"
- "lw\t$9,0($8)\n\t"
+ "lui\t$8,0x8000\n\t"
+ "lw\t$9,1($8)\n\t"
);
}
@@ -916,6 +1033,9 @@
void gdb_putsn(const char *str, int l)
{
char outbuf[18];
+
+ if (!kgdb_started)
+ return;
outbuf[0]='O';
diff -Nru a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/genex.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,288 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
+ * Copyright (C) 2002 Maciej W. Rozycki
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/asm.h>
+#include <asm/cacheops.h>
+#include <asm/regdef.h>
+#include <asm/fpregdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+
+ __INIT
+
+NESTED(except_vec0_generic, 0, sp)
+ PANIC("Exception vector 0 called")
+ END(except_vec0_generic)
+
+NESTED(except_vec1_generic, 0, sp)
+ PANIC("Exception vector 1 called")
+ END(except_vec1_generic)
+
+/*
+ * General exception vector for all other CPUs.
+ *
+ * Be careful when changing this, it has to be at most 128 bytes
+ * to fit into space reserved for the exception handler.
+ */
+NESTED(except_vec3_generic, 0, sp)
+ .set push
+ .set noat
+#if R5432_CP0_INTERRUPT_WAR
+ mfc0 k0, CP0_INDEX
+#endif
+ mfc0 k1, CP0_CAUSE
+ andi k1, k1, 0x7c
+#ifdef CONFIG_MIPS64
+ dsll k1, k1, 1
+#endif
+ PTR_L k0, exception_handlers(k1)
+ jr k0
+ .set pop
+ END(except_vec3_generic)
+
+/*
+ * General exception handler for CPUs with virtual coherency exception.
+ *
+ * Be careful when changing this, it has to be at most 256 (as a special
+ * exception) bytes to fit into space reserved for the exception handler.
+ */
+NESTED(except_vec3_r4000, 0, sp)
+ .set push
+ .set mips3
+ .set noat
+ mfc0 k1, CP0_CAUSE
+ li k0, 31<<2
+ andi k1, k1, 0x7c
+ .set push
+ .set noreorder
+ .set nomacro
+ beq k1, k0, handle_vced
+ li k0, 14<<2
+ beq k1, k0, handle_vcei
+#ifdef CONFIG_MIPS64
+ dsll k1, k1, 1
+#endif
+ .set pop
+ PTR_L k0, exception_handlers(k1)
+ jr k0
+
+ /*
+ * Big shit, we now may have two dirty primary cache lines for the same
+ * physical address. We can savely invalidate the line pointed to by
+ * c0_badvaddr because after return from this exception handler the
+ * load / store will be re-executed.
+ */
+handle_vced:
+ DMFC0 k0, CP0_BADVADDR
+ li k1, -4 # Is this ...
+ and k0, k1 # ... really needed?
+ mtc0 zero, CP0_TAGLO
+ cache Index_Store_Tag_D,(k0)
+ cache Hit_Writeback_Inv_SD,(k0)
+#ifdef CONFIG_PROC_FS
+ PTR_LA k0, vced_count
+ lw k1, (k0)
+ addiu k1, 1
+ sw k1, (k0)
+#endif
+ eret
+
+handle_vcei:
+ MFC0 k0, CP0_BADVADDR
+ cache Hit_Writeback_Inv_SD, (k0) # also cleans pi
+#ifdef CONFIG_PROC_FS
+ PTR_LA k0, vcei_count
+ lw k1, (k0)
+ addiu k1, 1
+ sw k1, (k0)
+#endif
+ eret
+ .set pop
+ END(except_vec3_r4000)
+
+/*
+ * Special interrupt vector for MIPS64 ISA & embedded MIPS processors.
+ * This is a dedicated interrupt exception vector which reduces the
+ * interrupt processing overhead. The jump instruction will be replaced
+ * at the initialization time.
+ *
+ * Be careful when changing this, it has to be at most 128 bytes
+ * to fit into space reserved for the exception handler.
+ */
+NESTED(except_vec4, 0, sp)
+1: j 1b /* Dummy, will be replaced */
+ END(except_vec4)
+
+ /*
+ * EJTAG debug exception handler.
+ * The EJTAG debug exception entry point is 0xbfc00480, which
+ * normally is in the boot PROM, so the boot PROM must do a
+ * unconditional jump to this vector.
+ */
+NESTED(except_vec_ejtag_debug, 0, sp)
+ j ejtag_debug_handler
+ nop
+ END(except_vec_ejtag_debug)
+
+ __FINIT
+
+ /*
+ * EJTAG debug exception handler.
+ */
+ NESTED(ejtag_debug_handler, PT_SIZE, sp)
+ .set noat
+ .set noreorder
+ mtc0 k0, CP0_DESAVE
+ mfc0 k0, CP0_DEBUG
+
+ sll k0, k0, 30 # Check for SDBBP.
+ bgez k0, ejtag_return
+
+ la k0, ejtag_debug_buffer
+ sw k1, 0(k0)
+ SAVE_ALL
+ jal ejtag_exception_handler
+ move a0, sp
+ RESTORE_ALL
+ la k0, ejtag_debug_buffer
+ lw k1, 0(k0)
+
+ejtag_return:
+ mfc0 k0, CP0_DESAVE
+ .set mips32
+ deret
+ .set mips0
+ nop
+ .set at
+ END(ejtag_debug_handler)
+
+ /*
+ * This buffer is reserved for the use of the EJTAG debug
+ * handler.
+ */
+ .data
+ EXPORT(ejtag_debug_buffer)
+ .fill LONGSIZE
+ .previous
+
+ __INIT
+
+ /*
+ * NMI debug exception handler for MIPS reference boards.
+ * The NMI debug exception entry point is 0xbfc00000, which
+ * normally is in the boot PROM, so the boot PROM must do a
+ * unconditional jump to this vector.
+ */
+ NESTED(except_vec_nmi, 0, sp)
+ j nmi_handler
+ nop
+ END(except_vec_nmi)
+
+ __FINIT
+
+ NESTED(nmi_handler, PT_SIZE, sp)
+ .set noat
+ .set noreorder
+ .set mips3
+ SAVE_ALL
+ jal nmi_exception_handler
+ move a0, sp
+ RESTORE_ALL
+ eret
+ .set at
+ .set mips0
+ END(nmi_handler)
+
+ .macro __build_clear_none
+ .endm
+
+ .macro __build_clear_sti
+ STI
+ .endm
+
+ .macro __build_clear_cli
+ CLI
+ .endm
+
+ .macro __build_clear_fpe
+ cfc1 a1, fcr31
+ li a2, ~(0x3f << 12)
+ and a2, a1
+ ctc1 a2, fcr31
+ STI
+ .endm
+
+ .macro __build_clear_ade
+ MFC0 t0, CP0_BADVADDR
+ PTR_S t0, PT_BVADDR(sp)
+ KMODE
+ .endm
+
+ .macro __BUILD_silent exception
+ .endm
+
+ /* Gas tries to parse the PRINT argument as a string containing
+ string escapes and emits bogus warnings if it believes to
+ recognize an unknown escape code. So make the arguments
+ start with an n and gas will believe \n is ok ... */
+ .macro __BUILD_verbose nexception
+ ld a1, PT_EPC(sp)
+ PRINT("Got \nexception at %016lx\012")
+ .endm
+
+ .macro __BUILD_count exception
+ .set reorder
+ LONG_L t0,exception_count_\exception
+ LONG_ADDIU t0, 1
+ LONG_S t0,exception_count_\exception
+ .set noreorder
+ .comm exception_count\exception, 8, 8
+ .endm
+
+ .macro BUILD_HANDLER exception handler clear verbose
+ .align 5
+ NESTED(handle_\exception, PT_SIZE, sp)
+ .set noat
+ SAVE_ALL
+ __BUILD_clear_\clear
+ .set at
+ __BUILD_\verbose \exception
+ move a0, sp
+ jal do_\handler
+ j ret_from_exception
+ nop
+ END(handle_\exception)
+ .endm
+
+ BUILD_HANDLER adel ade ade silent /* #4 */
+ BUILD_HANDLER ades ade ade silent /* #5 */
+ BUILD_HANDLER ibe be cli silent /* #6 */
+ BUILD_HANDLER dbe be cli silent /* #7 */
+ BUILD_HANDLER bp bp sti silent /* #9 */
+ BUILD_HANDLER ri ri sti silent /* #10 */
+ BUILD_HANDLER cpu cpu sti silent /* #11 */
+ BUILD_HANDLER ov ov sti silent /* #12 */
+ BUILD_HANDLER tr tr sti silent /* #13 */
+ BUILD_HANDLER fpe fpe fpe silent /* #15 */
+ BUILD_HANDLER mdmx mdmx sti silent /* #22 */
+ BUILD_HANDLER watch watch sti verbose /* #23 */
+ BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
+ BUILD_HANDLER reserved reserved sti verbose /* others */
+
+#ifdef CONFIG_MIPS64
+/* A temporary overflow handler used by check_daddi(). */
+
+ __INIT
+
+ BUILD_HANDLER daddi_ov daddi_ov none silent /* #12 */
+#endif
diff -Nru a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
--- a/arch/mips/kernel/head.S Sun Aug 3 13:14:50 2003
+++ b/arch/mips/kernel/head.S Sun Aug 3 13:14:50 2003
@@ -5,12 +5,11 @@
*
* Copyright (C) 1994, 1995 Waldorf Electronics
* Written by Ralf Baechle and Andreas Busse
- * Copyright (C) 1995 - 1999 Ralf Baechle
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 Ralf Baechle
* Copyright (C) 1996 Paul M. Antoine
* Modified for DECStation and hence R3000 support by Paul M. Antoine
* Further modifications by David S. Miller and Harald Koerfgen
* Copyright (C) 1999 Silicon Graphics, Inc.
- *
* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*/
@@ -19,204 +18,161 @@
#include <linux/threads.h>
#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/pgtable-bits.h>
-#include <asm/processor.h>
#include <asm/regdef.h>
-#include <asm/cachectl.h>
+#include <asm/page.h>
+#include <asm/processor.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
+#ifdef CONFIG_SGI_IP27
+#include <asm/sn/addrs.h>
+#include <asm/sn/sn0/hubni.h>
+#include <asm/sn/klkernvars.h>
+#endif
+
+ .macro ARC64_TWIDDLE_PC
+#if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL)
+ /* We get launched at a XKPHYS address but the kernel is linked to
+ run at a KSEG0 address, so jump there. */
+ PTR_LA t0, \@f
+ jr t0
+\@:
+#endif
+ .endm
+
+#ifdef CONFIG_SGI_IP27
+ /*
+ * outputs the local nasid into res. IP27 stuff.
+ */
+ .macro GET_NASID_ASM res
+ dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
+ ld \res, (\res)
+ and \res, NSRI_NODEID_MASK
+ dsrl \res, NSRI_NODEID_SHFT
+ .endm
+#endif /* CONFIG_SGI_IP27 */
+
+ /*
+ * inputs are the text nasid in t1, data nasid in t2.
+ */
+ .macro MAPPED_KERNEL_SETUP_TLB
+#ifdef CONFIG_MAPPED_KERNEL
+ /*
+ * This needs to read the nasid - assume 0 for now.
+ * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
+ * 0+DVG in tlblo_1.
+ */
+ dli t0, 0xffffffffc0000000
+ dmtc0 t0, CP0_ENTRYHI
+ li t0, 0x1c000 # Offset of text into node memory
+ dsll t1, NASID_SHFT # Shift text nasid into place
+ dsll t2, NASID_SHFT # Same for data nasid
+ or t1, t1, t0 # Physical load address of kernel text
+ or t2, t2, t0 # Physical load address of kernel data
+ dsrl t1, 12 # 4K pfn
+ dsrl t2, 12 # 4K pfn
+ dsll t1, 6 # Get pfn into place
+ dsll t2, 6 # Get pfn into place
+ li t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
+ or t0, t0, t1
+ mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr
+ li t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
+ or t0, t0, t2
+ mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
+ li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
+ mtc0 t0, CP0_PAGEMASK
+ li t0, 0 # KMAP_INX
+ mtc0 t0, CP0_INDEX
+ li t0, 1
+ mtc0 t0, CP0_WIRED
+ tlbwi
+#else
+ mtc0 zero, CP0_WIRED
+#endif
+ .endm
- .text
- /*
- * Reserved space for exception handlers.
- * Necessary for machines which link their kernels at KSEG0.
- */
- .fill 0x400
-
- /* The following two symbols are used for kernel profiling. */
- EXPORT(stext)
- EXPORT(_stext)
-
- __INIT
-
- /* Cache Error */
- LEAF(except_vec2_generic)
- .set noreorder
- .set noat
- .set mips0
- /*
- * This is a very bad place to be. Our cache error
- * detection has triggered. If we have write-back data
- * in the cache, we may not be able to recover. As a
- * first-order desperate measure, turn off KSEG0 cacheing.
- */
- mfc0 k0,CP0_CONFIG
- li k1,~CONF_CM_CMASK
- and k0,k0,k1
- ori k0,k0,CONF_CM_UNCACHED
- mtc0 k0,CP0_CONFIG
- /* Give it a few cycles to sink in... */
- nop
- nop
- nop
-
- j cache_parity_error
- nop
- END(except_vec2_generic)
-
- .set at
-
- /*
- * Special interrupt vector for embedded MIPS. This is a
- * dedicated interrupt vector which reduces interrupt processing
- * overhead. The jump instruction will be inserted here at
- * initialization time. This handler may only be 8 bytes in
- * size!
- */
- NESTED(except_vec4, 0, sp)
-1: j 1b /* Dummy, will be replaced */
- nop
- END(except_vec4)
-
- /*
- * EJTAG debug exception handler.
- * The EJTAG debug exception entry point is 0xbfc00480, which
- * normally is in the boot PROM, so the boot PROM must do a
- * unconditional jump to this vector.
- */
- NESTED(except_vec_ejtag_debug, 0, sp)
- j ejtag_debug_handler
- nop
- END(except_vec_ejtag_debug)
-
- __FINIT
-
- /*
- * EJTAG debug exception handler.
- */
- NESTED(ejtag_debug_handler, PT_SIZE, sp)
- .set noat
- .set noreorder
- mtc0 k0, CP0_DESAVE
- mfc0 k0, CP0_DEBUG
-
- sll k0, k0, 30 # Check for SDBBP.
- bgez k0, ejtag_return
-
- la k0, ejtag_debug_buffer
- sw k1, 0(k0)
- SAVE_ALL
- jal ejtag_exception_handler
- move a0, sp
- RESTORE_ALL
- la k0, ejtag_debug_buffer
- lw k1, 0(k0)
-
-ejtag_return:
- mfc0 k0, CP0_DESAVE
- .set mips32
- deret
- .set mips0
- nop
- .set at
- END(ejtag_debug_handler)
-
- __INIT
-
- /*
- * NMI debug exception handler for MIPS reference boards.
- * The NMI debug exception entry point is 0xbfc00000, which
- * normally is in the boot PROM, so the boot PROM must do a
- * unconditional jump to this vector.
- */
- NESTED(except_vec_nmi, 0, sp)
- j nmi_handler
- nop
- END(except_vec_nmi)
-
- __FINIT
-
- NESTED(nmi_handler, PT_SIZE, sp)
- .set noat
- .set noreorder
- .set mips3
- SAVE_ALL
- jal nmi_exception_handler
- move a0, sp
- RESTORE_ALL
- eret
- .set at
- .set mips0
- END(nmi_handler)
-
- __INIT
-
- /*
- * Kernel entry point
- */
- NESTED(kernel_entry, 16, sp)
- .set noreorder
-
- /*
- * Stack for kernel and init, current variable
- */
- la $28, init_thread_union
- addiu t0, $28, KERNEL_STACK_SIZE-32
- subu sp, t0, 4*SZREG
- sw t0, kernelsp
-
- /* The firmware/bootloader passes argc/argp/envp
- * to us as arguments. But clear bss first because
- * the romvec and other important info is stored there
- * by prom_init().
- */
- la t0, __bss_start
- sw zero, (t0)
- la t1, __bss_stop - 4
+ /*
+ * Reserved space for exception handlers.
+ * Necessary for machines which link their kernels at KSEG0.
+ */
+ .fill 0x400
+
+EXPORT(stext) # used for profiling
+EXPORT(_stext)
+
+ __INIT
+
+NESTED(kernel_entry, 16, sp) # kernel entry point
+#ifdef CONFIG_SGI_IP27
+ GET_NASID_ASM t1
+ move t2, t1 # text and data are here
+ MAPPED_KERNEL_SETUP_TLB
+#endif /* IP27 */
+
+ ARC64_TWIDDLE_PC
+
+ CLI # disable interrupts
+
+ PTR_LA $28, init_thread_union
+ PTR_ADDIU sp, $28, _THREAD_SIZE - 32
+ set_saved_sp sp, t0, t1
+ PTR_SUBU sp, 4 * SZREG # init stack pointer
+
+ /*
+ * The firmware/bootloader passes argc/argp/envp
+ * to us as arguments. But clear bss first because
+ * the romvec and other important info is stored there
+ * by prom_init().
+ */
+ PTR_LA t0, __bss_start
+ LONG_S zero, (t0)
+ PTR_LA t1, __bss_stop - LONGSIZE
1:
- addiu t0, 4
- bne t0, t1, 1b
- sw zero, (t0)
-
- jal init_arch
- nop
- END(kernel_entry)
+ PTR_ADDIU t0, LONGSIZE
+ LONG_S zero, (t0)
+ bne t0, t1, 1b
+ jal init_arch
+ END(kernel_entry)
#ifdef CONFIG_SMP
-
/*
* SMP slave cpus entry point. Board specific code for bootstrap calls this
* function after setting up the stack and gp registers.
*/
- LEAF(smp_bootstrap)
- .set push
- .set noreorder
- mtc0 zero, CP0_WIRED
- CLI
- mfc0 t0, CP0_STATUS
- li t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX)
- and t0, t1
- or t0, (ST0_CU0);
- jal start_secondary
- mtc0 t0, CP0_STATUS
- .set pop
- END(smp_bootstrap)
-#endif
-
- __FINIT
-
- /*
- * This buffer is reserved for the use of the EJTAG debug
- * handler.
- */
- .data
- EXPORT(ejtag_debug_buffer)
- .fill 4
+NESTED(smp_bootstrap, 16, sp)
+#ifdef CONFIG_SGI_IP27
+ GET_NASID_ASM t1
+ li t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
+ KLDIR_OFF_POINTER + K0BASE
+ dsll t1, NASID_SHFT
+ or t0, t0, t1
+ ld t0, 0(t0) # t0 points to kern_vars struct
+ lh t1, KV_RO_NASID_OFFSET(t0)
+ lh t2, KV_RW_NASID_OFFSET(t0)
+ MAPPED_KERNEL_SETUP_TLB
+ ARC64_TWIDDLE_PC
+#endif /* CONFIG_SGI_IP27 */
+
+ CLI
+
+#ifdef CONFIG_MIPS64
+ /*
+ * For the moment set ST0_KU so the CPU will not spit fire when
+ * executing 64-bit instructions. The full initialization of the
+ * CPU's status register is done later in per_cpu_trap_init().
+ */
+ mfc0 t0, CP0_STATUS
+ or t0, ST0_KX
+ mtc0 t0, CP0_STATUS
+#endif
+ jal start_secondary
+ END(smp_bootstrap)
+#endif /* CONFIG_SMP */
+
+ __FINIT
- .comm kernelsp, NR_CPUS * 8, 8
- .comm pgd_current, NR_CPUS * 8, 8
+ .comm kernelsp, NR_CPUS * 8, 8
+ .comm pgd_current, NR_CPUS * 8, 8
.macro page name, order=0
.globl \name
@@ -228,7 +184,27 @@
.data
.align PAGE_SHIFT
+#ifdef CONFIG_MIPS32
+ /*
+ * Here we only have a two-level pagetable structure ...
+ */
page swapper_pg_dir, _PGD_ORDER
- page empty_bad_page, 0
- page empty_bad_page_table, 0
- page invalid_pte_table, 0
+ page invalid_pte_table, _PTE_ORDER
+#endif
+#ifdef CONFIG_MIPS64
+ /*
+ * ... but on 64-bit we've got three-level pagetables with a
+ * slightly different layout ...
+ */
+ page swapper_pg_dir, _PGD_ORDER
+ page invalid_pmd_table, _PMD_ORDER
+ page invalid_pte_table, _PTE_ORDER
+
+ /*
+ * 64-bit kernel mappings are really screwed up ...
+ */
+ page kptbl, _PGD_ORDER
+ .globl ekptbl
+ page kpmdtbl, 0
+ekptbl:
+#endif
diff -Nru a/arch/mips/kernel/ioctl32.c b/arch/mips/kernel/ioctl32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/ioctl32.c Sun Aug 3 13:14:48 2003
@@ -0,0 +1,1210 @@
+/*
+ * ioctl32.c: Conversion between 32bit and 64bit native ioctls.
+ *
+ * Copyright (C) 2000 Silicon Graphics, Inc.
+ * Written by Ulf Carlsson (ulfc@engr.sgi.com)
+ * Copyright (C) 2000 Ralf Baechle
+ * Copyright (C) 2002 Maciej W. Rozycki
+ *
+ * Mostly stolen from the sparc64 ioctl32 implementation.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/compat.h>
+#include <linux/ioctl32.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/if.h>
+#include <linux/mm.h>
+#include <linux/mtio.h>
+#include <linux/auto_fs.h>
+#include <linux/auto_fs4.h>
+#include <linux/devfs_fs.h>
+#include <linux/tty.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/fd.h>
+#include <linux/ppp_defs.h>
+#include <linux/if_ppp.h>
+#include <linux/if_pppox.h>
+#include <linux/if_tun.h>
+#include <linux/cdrom.h>
+#include <linux/blkdev.h>
+#include <linux/loop.h>
+#include <linux/fb.h>
+#include <linux/vt.h>
+#include <linux/kd.h>
+#include <linux/ext2_fs.h>
+#include <linux/videodev.h>
+#include <linux/netdevice.h>
+#include <linux/raw.h>
+#include <linux/smb_fs.h>
+#include <linux/ncp_fs.h>
+#include <linux/route.h>
+#include <linux/hdreg.h>
+#include <linux/raid/md.h>
+#include <linux/blkpg.h>
+#include <linux/blkdev.h>
+#include <linux/elevator.h>
+#include <linux/rtc.h>
+#include <linux/pci.h>
+#include <linux/dm-ioctl.h>
+
+#include <scsi/scsi.h>
+#undef __KERNEL__ /* This file was born to be ugly ... */
+#include <scsi/scsi_ioctl.h>
+#define __KERNEL__
+#include <scsi/sg.h>
+
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include <linux/if_bonding.h>
+#include <linux/watchdog.h>
+
+#include <asm/ioctls.h>
+#include <asm/module.h>
+#include <linux/soundcard.h>
+#include <linux/lp.h>
+
+#include <linux/atm.h>
+#include <linux/atmarp.h>
+#include <linux/atmclip.h>
+#include <linux/atmdev.h>
+#include <linux/atmioc.h>
+#include <linux/atmlec.h>
+#include <linux/atmmpc.h>
+#include <linux/atmsvc.h>
+#include <linux/atm_tcp.h>
+#include <linux/sonet.h>
+#include <linux/atm_suni.h>
+#include <linux/mtd/mtd.h>
+
+#include <net/bluetooth/bluetooth.h>
+#include <net/bluetooth/hci.h>
+#include <net/bluetooth/rfcomm.h>
+
+#include <linux/usb.h>
+#include <linux/usbdevice_fs.h>
+#include <linux/nbd.h>
+#include <linux/random.h>
+#include <linux/filter.h>
+
+#ifdef CONFIG_SIBYTE_TBPROF
+#include <asm/sibyte/trace_prof.h>
+#endif
+
+long sys_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg);
+
+static int w_long(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ int err;
+ unsigned long val;
+
+ set_fs (KERNEL_DS);
+ err = sys_ioctl(fd, cmd, (unsigned long)&val);
+ set_fs (old_fs);
+ if (!err && put_user((unsigned int) val, (u32 *)arg))
+ return -EFAULT;
+ return err;
+}
+
+static int rw_long(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ int err;
+ unsigned long val;
+
+ if (get_user(val, (u32 *)arg))
+ return -EFAULT;
+ set_fs(KERNEL_DS);
+ err = sys_ioctl(fd, cmd, (unsigned long)&val);
+ set_fs (old_fs);
+ if (!err && put_user(val, (u32 *)arg))
+ return -EFAULT;
+ return err;
+}
+
+#define A(__x) ((unsigned long)(__x))
+
+
+#ifdef CONFIG_FB
+
+struct fb_fix_screeninfo32 {
+ char id[16]; /* identification string eg "TT Builtin" */
+ __u32 smem_start; /* Start of frame buffer mem */
+ /* (physical address) */
+ __u32 smem_len; /* Length of frame buffer mem */
+ __u32 type; /* see FB_TYPE_* */
+ __u32 type_aux; /* Interleave for interleaved Planes */
+ __u32 visual; /* see FB_VISUAL_* */
+ __u16 xpanstep; /* zero if no hardware panning */
+ __u16 ypanstep; /* zero if no hardware panning */
+ __u16 ywrapstep; /* zero if no hardware ywrap */
+ __u32 line_length; /* length of a line in bytes */
+ __u32 mmio_start; /* Start of Memory Mapped I/O */
+ /* (physical address) */
+ __u32 mmio_len; /* Length of Memory Mapped I/O */
+ __u32 accel; /* Type of acceleration available */
+ __u16 reserved[3]; /* Reserved for future compatibility */
+};
+
+static int do_fbioget_fscreeninfo_ioctl(unsigned int fd, unsigned int cmd,
+ unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ struct fb_fix_screeninfo fix;
+ struct fb_fix_screeninfo32 *fix32 = (struct fb_fix_screeninfo32 *)arg;
+ int err;
+
+ set_fs(KERNEL_DS);
+ err = sys_ioctl(fd, cmd, (unsigned long)&fix);
+ set_fs(old_fs);
+
+ if (err == 0) {
+ err = __copy_to_user((char *)fix32->id, (char *)fix.id,
+ sizeof(fix.id));
+ err |= __put_user((__u32)(unsigned long)fix.smem_start,
+ &fix32->smem_start);
+ err |= __put_user(fix.smem_len, &fix32->smem_len);
+ err |= __put_user(fix.type, &fix32->type);
+ err |= __put_user(fix.type_aux, &fix32->type_aux);
+ err |= __put_user(fix.visual, &fix32->visual);
+ err |= __put_user(fix.xpanstep, &fix32->xpanstep);
+ err |= __put_user(fix.ypanstep, &fix32->ypanstep);
+ err |= __put_user(fix.ywrapstep, &fix32->ywrapstep);
+ err |= __put_user(fix.line_length, &fix32->line_length);
+ err |= __put_user((__u32)(unsigned long)fix.mmio_start,
+ &fix32->mmio_start);
+ err |= __put_user(fix.mmio_len, &fix32->mmio_len);
+ err |= __put_user(fix.accel, &fix32->accel);
+ err |= __copy_to_user((char *)fix32->reserved,
+ (char *)fix.reserved,
+ sizeof(fix.reserved));
+ if (err)
+ err = -EFAULT;
+ }
+
+ return err;
+}
+
+struct fb_cmap32 {
+ __u32 start; /* First entry */
+ __u32 len; /* Number of entries */
+ __u32 red; /* Red values */
+ __u32 green;
+ __u32 blue;
+ __u32 transp; /* transparency, can be NULL */
+};
+
+static int do_fbiocmap_ioctl(unsigned int fd, unsigned int cmd,
+ unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ u32 red = 0, green = 0, blue = 0, transp = 0;
+ struct fb_cmap cmap;
+ struct fb_cmap32 *cmap32 = (struct fb_cmap32 *)arg;
+ int err;
+
+ memset(&cmap, 0, sizeof(cmap));
+
+ err = __get_user(cmap.start, &cmap32->start);
+ err |= __get_user(cmap.len, &cmap32->len);
+ err |= __get_user(red, &cmap32->red);
+ err |= __get_user(green, &cmap32->green);
+ err |= __get_user(blue, &cmap32->blue);
+ err |= __get_user(transp, &cmap32->transp);
+ if (err)
+ return -EFAULT;
+
+ err = -ENOMEM;
+ cmap.red = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
+ if (!cmap.red)
+ goto out;
+ cmap.green = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
+ if (!cmap.green)
+ goto out;
+ cmap.blue = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
+ if (!cmap.blue)
+ goto out;
+ if (transp) {
+ cmap.transp = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
+ if (!cmap.transp)
+ goto out;
+ }
+
+ if (cmd == FBIOPUTCMAP) {
+ err = __copy_from_user(cmap.red, (char *)A(red),
+ cmap.len * sizeof(__u16));
+ err |= __copy_from_user(cmap.green, (char *)A(green),
+ cmap.len * sizeof(__u16));
+ err |= __copy_from_user(cmap.blue, (char *)A(blue),
+ cmap.len * sizeof(__u16));
+ if (cmap.transp)
+ err |= __copy_from_user(cmap.transp, (char *)A(transp),
+ cmap.len * sizeof(__u16));
+ if (err) {
+ err = -EFAULT;
+ goto out;
+ }
+ }
+
+ set_fs(KERNEL_DS);
+ err = sys_ioctl(fd, cmd, (unsigned long)&cmap);
+ set_fs(old_fs);
+ if (err)
+ goto out;
+
+ if (cmd == FBIOGETCMAP) {
+ err = __copy_to_user((char *)A(red), cmap.red,
+ cmap.len * sizeof(__u16));
+ err |= __copy_to_user((char *)A(green), cmap.blue,
+ cmap.len * sizeof(__u16));
+ err |= __copy_to_user((char *)A(blue), cmap.blue,
+ cmap.len * sizeof(__u16));
+ if (cmap.transp)
+ err |= __copy_to_user((char *)A(transp), cmap.transp,
+ cmap.len * sizeof(__u16));
+ if (err) {
+ err = -EFAULT;
+ goto out;
+ }
+ }
+
+out:
+ if (cmap.red)
+ kfree(cmap.red);
+ if (cmap.green)
+ kfree(cmap.green);
+ if (cmap.blue)
+ kfree(cmap.blue);
+ if (cmap.transp)
+ kfree(cmap.transp);
+
+ return err;
+}
+
+#endif /* CONFIG_FB */
+
+
+static int do_siocgstamp(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ struct compat_timeval *up = (struct compat_timeval *)arg;
+ struct timeval ktv;
+ mm_segment_t old_fs = get_fs();
+ int err;
+
+ set_fs(KERNEL_DS);
+ err = sys_ioctl(fd, cmd, (unsigned long)&ktv);
+ set_fs(old_fs);
+ if (!err) {
+ err = put_user(ktv.tv_sec, &up->tv_sec);
+ err |= __put_user(ktv.tv_usec, &up->tv_usec);
+ }
+
+ return err;
+}
+
+#define EXT2_IOC32_GETFLAGS _IOR('f', 1, int)
+#define EXT2_IOC32_SETFLAGS _IOW('f', 2, int)
+#define EXT2_IOC32_GETVERSION _IOR('v', 1, int)
+#define EXT2_IOC32_SETVERSION _IOW('v', 2, int)
+
+struct ifmap32 {
+ unsigned int mem_start;
+ unsigned int mem_end;
+ unsigned short base_addr;
+ unsigned char irq;
+ unsigned char dma;
+ unsigned char port;
+};
+
+struct ifreq32 {
+#define IFHWADDRLEN 6
+#define IFNAMSIZ 16
+ union {
+ char ifrn_name[IFNAMSIZ]; /* if name, e.g. "en0" */
+ } ifr_ifrn;
+ union {
+ struct sockaddr ifru_addr;
+ struct sockaddr ifru_dstaddr;
+ struct sockaddr ifru_broadaddr;
+ struct sockaddr ifru_netmask;
+ struct sockaddr ifru_hwaddr;
+ short ifru_flags;
+ int ifru_ivalue;
+ int ifru_mtu;
+ struct ifmap32 ifru_map;
+ char ifru_slave[IFNAMSIZ]; /* Just fits the size */
+ char ifru_newname[IFNAMSIZ];
+ compat_caddr_t ifru_data;
+ } ifr_ifru;
+};
+
+struct ifconf32 {
+ int ifc_len; /* size of buffer */
+ compat_caddr_t ifcbuf;
+};
+
+#ifdef CONFIG_NET
+
+static int dev_ifname32(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ struct ireq32 *uir32 = (struct ireq32 *)arg;
+ struct net_device *dev;
+ struct ifreq32 ifr32;
+
+ if (copy_from_user(&ifr32, uir32, sizeof(struct ifreq32)))
+ return -EFAULT;
+
+ read_lock(&dev_base_lock);
+ dev = __dev_get_by_index(ifr32.ifr_ifindex);
+ if (!dev) {
+ read_unlock(&dev_base_lock);
+ return -ENODEV;
+ }
+
+ strcpy(ifr32.ifr_name, dev->name);
+ read_unlock(&dev_base_lock);
+
+ if (copy_to_user(uir32, &ifr32, sizeof(struct ifreq32)))
+ return -EFAULT;
+
+ return 0;
+}
+
+static inline int dev_ifconf(unsigned int fd, unsigned int cmd,
+ unsigned long arg)
+{
+ struct ioconf32 *uifc32 = (struct ioconf32 *)arg;
+ struct ifconf32 ifc32;
+ struct ifconf ifc;
+ struct ifreq32 *ifr32;
+ struct ifreq *ifr;
+ mm_segment_t old_fs;
+ int len;
+ int err;
+
+ if (copy_from_user(&ifc32, uifc32, sizeof(struct ifconf32)))
+ return -EFAULT;
+
+ if(ifc32.ifcbuf == 0) {
+ ifc32.ifc_len = 0;
+ ifc.ifc_len = 0;
+ ifc.ifc_buf = NULL;
+ } else {
+ ifc.ifc_len = ((ifc32.ifc_len / sizeof (struct ifreq32))) *
+ sizeof (struct ifreq);
+ ifc.ifc_buf = kmalloc (ifc.ifc_len, GFP_KERNEL);
+ if (!ifc.ifc_buf)
+ return -ENOMEM;
+ }
+ ifr = ifc.ifc_req;
+ ifr32 = (struct ifreq32 *)A(ifc32.ifcbuf);
+ len = ifc32.ifc_len / sizeof (struct ifreq32);
+ while (len--) {
+ if (copy_from_user(ifr++, ifr32++, sizeof (struct ifreq32))) {
+ err = -EFAULT;
+ goto out;
+ }
+ }
+
+ old_fs = get_fs();
+ set_fs (KERNEL_DS);
+ err = sys_ioctl (fd, SIOCGIFCONF, (unsigned long)&ifc);
+ set_fs (old_fs);
+ if (err)
+ goto out;
+
+ ifr = ifc.ifc_req;
+ ifr32 = (struct ifreq32 *)A(ifc32.ifcbuf);
+ len = ifc.ifc_len / sizeof (struct ifreq);
+ ifc32.ifc_len = len * sizeof (struct ifreq32);
+
+ while (len--) {
+ if (copy_to_user(ifr32++, ifr++, sizeof (struct ifreq32))) {
+ err = -EFAULT;
+ goto out;
+ }
+ }
+
+ if (copy_to_user(uifc32, &ifc32, sizeof(struct ifconf32))) {
+ err = -EFAULT;
+ goto out;
+ }
+out:
+ if(ifc.ifc_buf != NULL)
+ kfree (ifc.ifc_buf);
+ return err;
+}
+
+int siocdevprivate_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ struct ifreq *u_ifreq64;
+ struct ifreq32 *u_ifreq32 = (struct ifreq32 *) arg;
+ char tmp_buf[IFNAMSIZ];
+ void *data64;
+ u32 data32;
+
+ if (copy_from_user(&tmp_buf[0], &(u_ifreq32->ifr_ifrn.ifrn_name[0]),
+ IFNAMSIZ))
+ return -EFAULT;
+ if (__get_user(data32, &u_ifreq32->ifr_ifru.ifru_data))
+ return -EFAULT;
+ data64 = (void *) A(data32);
+
+ u_ifreq64 = compat_alloc_user_space(sizeof(*u_ifreq64));
+
+ /* Don't check these user accesses, just let that get trapped
+ * in the ioctl handler instead.
+ */
+ copy_to_user(&u_ifreq64->ifr_ifrn.ifrn_name[0], &tmp_buf[0], IFNAMSIZ);
+ __put_user(data64, &u_ifreq64->ifr_ifru.ifru_data);
+
+ return sys_ioctl(fd, cmd, (unsigned long) u_ifreq64);
+}
+
+static int dev_ifsioc(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ struct ifreq ifr;
+ mm_segment_t old_fs;
+ int err;
+
+ switch (cmd) {
+ case SIOCSIFMAP:
+ err = copy_from_user(&ifr, (struct ifreq32 *)arg, sizeof(ifr.ifr_name));
+ err |= __get_user(ifr.ifr_map.mem_start, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_start));
+ err |= __get_user(ifr.ifr_map.mem_end, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_end));
+ err |= __get_user(ifr.ifr_map.base_addr, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.base_addr));
+ err |= __get_user(ifr.ifr_map.irq, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.irq));
+ err |= __get_user(ifr.ifr_map.dma, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.dma));
+ err |= __get_user(ifr.ifr_map.port, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.port));
+ if (err)
+ return -EFAULT;
+ break;
+ default:
+ if (copy_from_user(&ifr, (struct ifreq32 *)arg, sizeof(struct ifreq32)))
+ return -EFAULT;
+ break;
+ }
+ old_fs = get_fs();
+ set_fs (KERNEL_DS);
+ err = sys_ioctl (fd, cmd, (unsigned long)&ifr);
+ set_fs (old_fs);
+ if (!err) {
+ switch (cmd) {
+ case SIOCGIFFLAGS:
+ case SIOCGIFMETRIC:
+ case SIOCGIFMTU:
+ case SIOCGIFMEM:
+ case SIOCGIFHWADDR:
+ case SIOCGIFINDEX:
+ case SIOCGIFADDR:
+ case SIOCGIFBRDADDR:
+ case SIOCGIFDSTADDR:
+ case SIOCGIFNETMASK:
+ case SIOCGIFTXQLEN:
+ if (copy_to_user((struct ifreq32 *)arg, &ifr, sizeof(struct ifreq32)))
+ return -EFAULT;
+ break;
+ case SIOCGIFMAP:
+ err = copy_to_user((struct ifreq32 *)arg, &ifr, sizeof(ifr.ifr_name));
+ err |= __put_user(ifr.ifr_map.mem_start, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_start));
+ err |= __put_user(ifr.ifr_map.mem_end, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_end));
+ err |= __put_user(ifr.ifr_map.base_addr, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.base_addr));
+ err |= __put_user(ifr.ifr_map.irq, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.irq));
+ err |= __put_user(ifr.ifr_map.dma, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.dma));
+ err |= __put_user(ifr.ifr_map.port, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.port));
+ if (err)
+ err = -EFAULT;
+ break;
+ }
+ }
+ return err;
+}
+
+struct rtentry32
+{
+ unsigned int rt_pad1;
+ struct sockaddr rt_dst; /* target address */
+ struct sockaddr rt_gateway; /* gateway addr (RTF_GATEWAY) */
+ struct sockaddr rt_genmask; /* target network mask (IP) */
+ unsigned short rt_flags;
+ short rt_pad2;
+ unsigned int rt_pad3;
+ unsigned int rt_pad4;
+ short rt_metric; /* +1 for binary compatibility! */
+ unsigned int rt_dev; /* forcing the device at add */
+ unsigned int rt_mtu; /* per route MTU/Window */
+#ifndef __KERNEL__
+#define rt_mss rt_mtu /* Compatibility :-( */
+#endif
+ unsigned int rt_window; /* Window clamping */
+ unsigned short rt_irtt; /* Initial RTT */
+};
+
+static inline int routing_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ struct rtentry32 *ur = (struct rtentry32 *)arg;
+ struct rtentry r;
+ char devname[16];
+ u32 rtdev;
+ int ret;
+ mm_segment_t old_fs = get_fs();
+
+ ret = copy_from_user (&r.rt_dst, &(ur->rt_dst), 3 * sizeof(struct sockaddr));
+ ret |= __get_user (r.rt_flags, &(ur->rt_flags));
+ ret |= __get_user (r.rt_metric, &(ur->rt_metric));
+ ret |= __get_user (r.rt_mtu, &(ur->rt_mtu));
+ ret |= __get_user (r.rt_window, &(ur->rt_window));
+ ret |= __get_user (r.rt_irtt, &(ur->rt_irtt));
+ ret |= __get_user (rtdev, &(ur->rt_dev));
+ if (rtdev) {
+ ret |= copy_from_user (devname, (char *)A(rtdev), 15);
+ r.rt_dev = devname; devname[15] = 0;
+ } else
+ r.rt_dev = 0;
+ if (ret)
+ return -EFAULT;
+ set_fs (KERNEL_DS);
+ ret = sys_ioctl (fd, cmd, (long)&r);
+ set_fs (old_fs);
+ return ret;
+}
+
+#endif /* CONFIG_NET */
+
+static int do_ext2_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ /* These are just misnamed, they actually get/put from/to user an int */
+ switch (cmd) {
+ case EXT2_IOC32_GETFLAGS: cmd = EXT2_IOC_GETFLAGS; break;
+ case EXT2_IOC32_SETFLAGS: cmd = EXT2_IOC_SETFLAGS; break;
+ case EXT2_IOC32_GETVERSION: cmd = EXT2_IOC_GETVERSION; break;
+ case EXT2_IOC32_SETVERSION: cmd = EXT2_IOC_SETVERSION; break;
+ }
+ return sys_ioctl(fd, cmd, arg);
+}
+
+struct hd_geometry32 {
+ unsigned char heads;
+ unsigned char sectors;
+ unsigned short cylinders;
+ u32 start;
+};
+
+static int hdio_getgeo(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ struct hd_geometry geo;
+ int err;
+
+ set_fs (KERNEL_DS);
+ err = sys_ioctl(fd, HDIO_GETGEO, (unsigned long)&geo);
+ set_fs (old_fs);
+ if (!err) {
+ err = copy_to_user ((struct hd_geometry32 *)arg, &geo, 4);
+ err |= __put_user (geo.start, &(((struct hd_geometry32 *)arg)->start));
+ }
+
+ return err ? -EFAULT : 0;
+}
+
+static int hdio_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ unsigned long kval;
+ unsigned int *uvp;
+ int error;
+
+ set_fs(KERNEL_DS);
+ error = sys_ioctl(fd, cmd, (long)&kval);
+ set_fs(old_fs);
+
+ if (error == 0) {
+ uvp = (unsigned int *)arg;
+ if (put_user(kval, uvp))
+ error = -EFAULT;
+ }
+
+ return error;
+}
+
+static int ret_einval(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ return -EINVAL;
+}
+
+struct blkpg_ioctl_arg32 {
+ int op;
+ int flags;
+ int datalen;
+ u32 data;
+};
+
+static int blkpg_ioctl_trans(unsigned int fd, unsigned int cmd,
+ struct blkpg_ioctl_arg32 *arg)
+{
+ struct blkpg_ioctl_arg a;
+ struct blkpg_partition p;
+ int err;
+ mm_segment_t old_fs = get_fs();
+
+ err = get_user(a.op, &arg->op);
+ err |= __get_user(a.flags, &arg->flags);
+ err |= __get_user(a.datalen, &arg->datalen);
+ err |= __get_user((long)a.data, &arg->data);
+ if (err) return err;
+ switch (a.op) {
+ case BLKPG_ADD_PARTITION:
+ case BLKPG_DEL_PARTITION:
+ if (a.datalen < sizeof(struct blkpg_partition))
+ return -EINVAL;
+ if (copy_from_user(&p, a.data, sizeof(struct blkpg_partition)))
+ return -EFAULT;
+ a.data = &p;
+ set_fs (KERNEL_DS);
+ err = sys_ioctl(fd, cmd, (unsigned long)&a);
+ set_fs (old_fs);
+ default:
+ return -EINVAL;
+ }
+ return err;
+}
+
+struct mtget32 {
+ __u32 mt_type;
+ __u32 mt_resid;
+ __u32 mt_dsreg;
+ __u32 mt_gstat;
+ __u32 mt_erreg;
+ compat_daddr_t mt_fileno;
+ compat_daddr_t mt_blkno;
+};
+#define MTIOCGET32 _IOR('m', 2, struct mtget32)
+
+struct mtpos32 {
+ __u32 mt_blkno;
+};
+#define MTIOCPOS32 _IOR('m', 3, struct mtpos32)
+
+struct mtconfiginfo32 {
+ __u32 mt_type;
+ __u32 ifc_type;
+ __u16 irqnr;
+ __u16 dmanr;
+ __u16 port;
+ __u32 debug;
+ __u32 have_dens:1;
+ __u32 have_bsf:1;
+ __u32 have_fsr:1;
+ __u32 have_bsr:1;
+ __u32 have_eod:1;
+ __u32 have_seek:1;
+ __u32 have_tell:1;
+ __u32 have_ras1:1;
+ __u32 have_ras2:1;
+ __u32 have_ras3:1;
+ __u32 have_qfa:1;
+ __u32 pad1:5;
+ char reserved[10];
+};
+#define MTIOCGETCONFIG32 _IOR('m', 4, struct mtconfiginfo32)
+#define MTIOCSETCONFIG32 _IOW('m', 5, struct mtconfiginfo32)
+
+static int mt_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ mm_segment_t old_fs = get_fs();
+ struct mtconfiginfo info;
+ struct mtget get;
+ struct mtpos pos;
+ unsigned long kcmd;
+ void *karg;
+ int err = 0;
+
+ switch(cmd) {
+ case MTIOCPOS32:
+ kcmd = MTIOCPOS;
+ karg = &pos;
+ break;
+ case MTIOCGET32:
+ kcmd = MTIOCGET;
+ karg = &get;
+ break;
+ case MTIOCGETCONFIG32:
+ kcmd = MTIOCGETCONFIG;
+ karg = &info;
+ break;
+ case MTIOCSETCONFIG32:
+ kcmd = MTIOCSETCONFIG;
+ karg = &info;
+ err = __get_user(info.mt_type, &((struct mtconfiginfo32 *)arg)->mt_type);
+ err |= __get_user(info.ifc_type, &((struct mtconfiginfo32 *)arg)->ifc_type);
+ err |= __get_user(info.irqnr, &((struct mtconfiginfo32 *)arg)->irqnr);
+ err |= __get_user(info.dmanr, &((struct mtconfiginfo32 *)arg)->dmanr);
+ err |= __get_user(info.port, &((struct mtconfiginfo32 *)arg)->port);
+ err |= __get_user(info.debug, &((struct mtconfiginfo32 *)arg)->debug);
+ err |= __copy_from_user((char *)&info.debug + sizeof(info.debug),
+ (char *)&((struct mtconfiginfo32 *)arg)->debug
+ + sizeof(((struct mtconfiginfo32 *)arg)->debug), sizeof(__u32));
+ if (err)
+ return -EFAULT;
+ break;
+ default:
+ do {
+ static int count = 0;
+ if (++count <= 20)
+ printk("mt_ioctl: Unknown cmd fd(%d) "
+ "cmd(%08x) arg(%08x)\n",
+ (int)fd, (unsigned int)cmd, (unsigned int)arg);
+ } while(0);
+ return -EINVAL;
+ }
+ set_fs (KERNEL_DS);
+ err = sys_ioctl (fd, kcmd, (unsigned long)karg);
+ set_fs (old_fs);
+ if (err)
+ return err;
+ switch (cmd) {
+ case MTIOCPOS32:
+ err = __put_user(pos.mt_blkno, &((struct mtpos32 *)arg)->mt_blkno);
+ break;
+ case MTIOCGET32:
+ err = __put_user(get.mt_type, &((struct mtget32 *)arg)->mt_type);
+ err |= __put_user(get.mt_resid, &((struct mtget32 *)arg)->mt_resid);
+ err |= __put_user(get.mt_dsreg, &((struct mtget32 *)arg)->mt_dsreg);
+ err |= __put_user(get.mt_gstat, &((struct mtget32 *)arg)->mt_gstat);
+ err |= __put_user(get.mt_erreg, &((struct mtget32 *)arg)->mt_erreg);
+ err |= __put_user(get.mt_fileno, &((struct mtget32 *)arg)->mt_fileno);
+ err |= __put_user(get.mt_blkno, &((struct mtget32 *)arg)->mt_blkno);
+ break;
+ case MTIOCGETCONFIG32:
+ err = __put_user(info.mt_type, &((struct mtconfiginfo32 *)arg)->mt_type);
+ err |= __put_user(info.ifc_type, &((struct mtconfiginfo32 *)arg)->ifc_type);
+ err |= __put_user(info.irqnr, &((struct mtconfiginfo32 *)arg)->irqnr);
+ err |= __put_user(info.dmanr, &((struct mtconfiginfo32 *)arg)->dmanr);
+ err |= __put_user(info.port, &((struct mtconfiginfo32 *)arg)->port);
+ err |= __put_user(info.debug, &((struct mtconfiginfo32 *)arg)->debug);
+ err |= __copy_to_user((char *)&((struct mtconfiginfo32 *)arg)->debug
+ + sizeof(((struct mtconfiginfo32 *)arg)->debug),
+ (char *)&info.debug + sizeof(info.debug), sizeof(__u32));
+ break;
+ case MTIOCSETCONFIG32:
+ break;
+ }
+ return err ? -EFAULT: 0;
+}
+
+#define AUTOFS_IOC_SETTIMEOUT32 _IOWR(0x93,0x64,unsigned int)
+
+static int ioc_settimeout(unsigned int fd, unsigned int cmd, unsigned long arg)
+{
+ return rw_long(fd, AUTOFS_IOC_SETTIMEOUT, arg);
+}
+
+typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
+
+#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl)
+#define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl32_handler_t)(handler), NULL },
+#define IOCTL_TABLE_START \
+ struct ioctl_trans ioctl_start[] = {
+#define IOCTL_TABLE_END \
+ }; struct ioctl_trans ioctl_end[0];
+
+
+IOCTL_TABLE_START
+#include <linux/compat_ioctl.h>
+COMPATIBLE_IOCTL(TCGETA)
+COMPATIBLE_IOCTL(TCSETA)
+COMPATIBLE_IOCTL(TCSETAW)
+COMPATIBLE_IOCTL(TCSETAF)
+COMPATIBLE_IOCTL(TCSBRK)
+COMPATIBLE_IOCTL(TCXONC)
+COMPATIBLE_IOCTL(TCFLSH)
+COMPATIBLE_IOCTL(TCGETS)
+COMPATIBLE_IOCTL(TCSETS)
+COMPATIBLE_IOCTL(TCSETSW)
+COMPATIBLE_IOCTL(TCSETSF)
+COMPATIBLE_IOCTL(TIOCLINUX)
+
+COMPATIBLE_IOCTL(TIOCGETD)
+COMPATIBLE_IOCTL(TIOCSETD)
+COMPATIBLE_IOCTL(TIOCEXCL)
+COMPATIBLE_IOCTL(TIOCNXCL)
+COMPATIBLE_IOCTL(TIOCCONS)
+COMPATIBLE_IOCTL(TIOCGSOFTCAR)
+COMPATIBLE_IOCTL(TIOCSSOFTCAR)
+COMPATIBLE_IOCTL(TIOCSWINSZ)
+COMPATIBLE_IOCTL(TIOCGWINSZ)
+COMPATIBLE_IOCTL(TIOCMGET)
+COMPATIBLE_IOCTL(TIOCMBIC)
+COMPATIBLE_IOCTL(TIOCMBIS)
+COMPATIBLE_IOCTL(TIOCMSET)
+COMPATIBLE_IOCTL(TIOCPKT)
+COMPATIBLE_IOCTL(TIOCNOTTY)
+COMPATIBLE_IOCTL(TIOCSTI)
+COMPATIBLE_IOCTL(TIOCOUTQ)
+COMPATIBLE_IOCTL(TIOCSPGRP)
+COMPATIBLE_IOCTL(TIOCGPGRP)
+COMPATIBLE_IOCTL(TIOCSCTTY)
+COMPATIBLE_IOCTL(TIOCGPTN)
+COMPATIBLE_IOCTL(TIOCSPTLCK)
+COMPATIBLE_IOCTL(TIOCGSERIAL)
+COMPATIBLE_IOCTL(TIOCSSERIAL)
+COMPATIBLE_IOCTL(TIOCSERGETLSR)
+
+COMPATIBLE_IOCTL(FIOCLEX)
+COMPATIBLE_IOCTL(FIONCLEX)
+COMPATIBLE_IOCTL(FIOASYNC)
+COMPATIBLE_IOCTL(FIONBIO)
+COMPATIBLE_IOCTL(FIONREAD)
+
+#ifdef CONFIG_FB
+/* Big F */
+COMPATIBLE_IOCTL(FBIOGET_VSCREENINFO)
+COMPATIBLE_IOCTL(FBIOPUT_VSCREENINFO)
+HANDLE_IOCTL(FBIOGET_FSCREENINFO, do_fbioget_fscreeninfo_ioctl)
+HANDLE_IOCTL(FBIOGETCMAP, do_fbiocmap_ioctl)
+HANDLE_IOCTL(FBIOPUTCMAP, do_fbiocmap_ioctl)
+COMPATIBLE_IOCTL(FBIOPAN_DISPLAY)
+#endif /* CONFIG_FB */
+
+/* Big K */
+COMPATIBLE_IOCTL(PIO_FONT)
+COMPATIBLE_IOCTL(GIO_FONT)
+COMPATIBLE_IOCTL(KDSIGACCEPT)
+COMPATIBLE_IOCTL(KDGETKEYCODE)
+COMPATIBLE_IOCTL(KDSETKEYCODE)
+COMPATIBLE_IOCTL(KIOCSOUND)
+COMPATIBLE_IOCTL(KDMKTONE)
+COMPATIBLE_IOCTL(KDGKBTYPE)
+COMPATIBLE_IOCTL(KDSETMODE)
+COMPATIBLE_IOCTL(KDGETMODE)
+COMPATIBLE_IOCTL(KDSKBMODE)
+COMPATIBLE_IOCTL(KDGKBMODE)
+COMPATIBLE_IOCTL(KDSKBMETA)
+COMPATIBLE_IOCTL(KDGKBMETA)
+COMPATIBLE_IOCTL(KDGKBENT)
+COMPATIBLE_IOCTL(KDSKBENT)
+COMPATIBLE_IOCTL(KDGKBSENT)
+COMPATIBLE_IOCTL(KDSKBSENT)
+COMPATIBLE_IOCTL(KDGKBDIACR)
+COMPATIBLE_IOCTL(KDSKBDIACR)
+COMPATIBLE_IOCTL(KDKBDREP)
+COMPATIBLE_IOCTL(KDGKBLED)
+COMPATIBLE_IOCTL(KDSKBLED)
+COMPATIBLE_IOCTL(KDGETLED)
+COMPATIBLE_IOCTL(KDSETLED)
+COMPATIBLE_IOCTL(GIO_SCRNMAP)
+COMPATIBLE_IOCTL(PIO_SCRNMAP)
+COMPATIBLE_IOCTL(GIO_UNISCRNMAP)
+COMPATIBLE_IOCTL(PIO_UNISCRNMAP)
+COMPATIBLE_IOCTL(PIO_FONTRESET)
+COMPATIBLE_IOCTL(PIO_UNIMAPCLR)
+
+/* Big S */
+COMPATIBLE_IOCTL(SCSI_IOCTL_GET_IDLUN)
+COMPATIBLE_IOCTL(SCSI_IOCTL_DOORLOCK)
+COMPATIBLE_IOCTL(SCSI_IOCTL_DOORUNLOCK)
+COMPATIBLE_IOCTL(SCSI_IOCTL_TEST_UNIT_READY)
+COMPATIBLE_IOCTL(SCSI_IOCTL_TAGGED_ENABLE)
+COMPATIBLE_IOCTL(SCSI_IOCTL_TAGGED_DISABLE)
+COMPATIBLE_IOCTL(SCSI_IOCTL_GET_BUS_NUMBER)
+COMPATIBLE_IOCTL(SCSI_IOCTL_SEND_COMMAND)
+
+/* Big V */
+COMPATIBLE_IOCTL(VT_SETMODE)
+COMPATIBLE_IOCTL(VT_GETMODE)
+COMPATIBLE_IOCTL(VT_GETSTATE)
+COMPATIBLE_IOCTL(VT_OPENQRY)
+COMPATIBLE_IOCTL(VT_ACTIVATE)
+COMPATIBLE_IOCTL(VT_WAITACTIVE)
+COMPATIBLE_IOCTL(VT_RELDISP)
+COMPATIBLE_IOCTL(VT_DISALLOCATE)
+COMPATIBLE_IOCTL(VT_RESIZE)
+COMPATIBLE_IOCTL(VT_RESIZEX)
+COMPATIBLE_IOCTL(VT_LOCKSWITCH)
+COMPATIBLE_IOCTL(VT_UNLOCKSWITCH)
+
+#ifdef CONFIG_NET
+/* Socket level stuff */
+COMPATIBLE_IOCTL(FIOSETOWN)
+COMPATIBLE_IOCTL(SIOCSPGRP)
+COMPATIBLE_IOCTL(FIOGETOWN)
+COMPATIBLE_IOCTL(SIOCGPGRP)
+COMPATIBLE_IOCTL(SIOCATMARK)
+COMPATIBLE_IOCTL(SIOCSIFLINK)
+COMPATIBLE_IOCTL(SIOCSIFENCAP)
+COMPATIBLE_IOCTL(SIOCGIFENCAP)
+COMPATIBLE_IOCTL(SIOCSIFBR)
+COMPATIBLE_IOCTL(SIOCGIFBR)
+COMPATIBLE_IOCTL(SIOCSARP)
+COMPATIBLE_IOCTL(SIOCGARP)
+COMPATIBLE_IOCTL(SIOCDARP)
+COMPATIBLE_IOCTL(SIOCSRARP)
+COMPATIBLE_IOCTL(SIOCGRARP)
+COMPATIBLE_IOCTL(SIOCDRARP)
+COMPATIBLE_IOCTL(SIOCADDDLCI)
+COMPATIBLE_IOCTL(SIOCDELDLCI)
+/* SG stuff */
+COMPATIBLE_IOCTL(SG_SET_TIMEOUT)
+COMPATIBLE_IOCTL(SG_GET_TIMEOUT)
+COMPATIBLE_IOCTL(SG_EMULATED_HOST)
+COMPATIBLE_IOCTL(SG_SET_TRANSFORM)
+COMPATIBLE_IOCTL(SG_GET_TRANSFORM)
+COMPATIBLE_IOCTL(SG_SET_RESERVED_SIZE)
+COMPATIBLE_IOCTL(SG_GET_RESERVED_SIZE)
+COMPATIBLE_IOCTL(SG_GET_SCSI_ID)
+COMPATIBLE_IOCTL(SG_SET_FORCE_LOW_DMA)
+COMPATIBLE_IOCTL(SG_GET_LOW_DMA)
+COMPATIBLE_IOCTL(SG_SET_FORCE_PACK_ID)
+COMPATIBLE_IOCTL(SG_GET_PACK_ID)
+COMPATIBLE_IOCTL(SG_GET_NUM_WAITING)
+COMPATIBLE_IOCTL(SG_SET_DEBUG)
+COMPATIBLE_IOCTL(SG_GET_SG_TABLESIZE)
+COMPATIBLE_IOCTL(SG_GET_COMMAND_Q)
+COMPATIBLE_IOCTL(SG_SET_COMMAND_Q)
+COMPATIBLE_IOCTL(SG_GET_VERSION_NUM)
+COMPATIBLE_IOCTL(SG_NEXT_CMD_LEN)
+COMPATIBLE_IOCTL(SG_SCSI_RESET)
+COMPATIBLE_IOCTL(SG_IO)
+COMPATIBLE_IOCTL(SG_GET_REQUEST_TABLE)
+COMPATIBLE_IOCTL(SG_SET_KEEP_ORPHAN)
+COMPATIBLE_IOCTL(SG_GET_KEEP_ORPHAN)
+/* PPP stuff */
+COMPATIBLE_IOCTL(PPPIOCGFLAGS)
+COMPATIBLE_IOCTL(PPPIOCSFLAGS)
+COMPATIBLE_IOCTL(PPPIOCGASYNCMAP)
+COMPATIBLE_IOCTL(PPPIOCSASYNCMAP)
+COMPATIBLE_IOCTL(PPPIOCGUNIT)
+COMPATIBLE_IOCTL(PPPIOCGRASYNCMAP)
+COMPATIBLE_IOCTL(PPPIOCSRASYNCMAP)
+COMPATIBLE_IOCTL(PPPIOCGMRU)
+COMPATIBLE_IOCTL(PPPIOCSMRU)
+COMPATIBLE_IOCTL(PPPIOCSMAXCID)
+COMPATIBLE_IOCTL(PPPIOCGXASYNCMAP)
+COMPATIBLE_IOCTL(PPPIOCSXASYNCMAP)
+COMPATIBLE_IOCTL(PPPIOCXFERUNIT)
+COMPATIBLE_IOCTL(PPPIOCGNPMODE)
+COMPATIBLE_IOCTL(PPPIOCSNPMODE)
+COMPATIBLE_IOCTL(PPPIOCGDEBUG)
+COMPATIBLE_IOCTL(PPPIOCSDEBUG)
+COMPATIBLE_IOCTL(PPPIOCNEWUNIT)
+COMPATIBLE_IOCTL(PPPIOCATTACH)
+COMPATIBLE_IOCTL(PPPIOCGCHAN)
+/* PPPOX */
+COMPATIBLE_IOCTL(PPPOEIOCSFWD)
+COMPATIBLE_IOCTL(PPPOEIOCDFWD)
+/* CDROM stuff */
+COMPATIBLE_IOCTL(CDROMPAUSE)
+COMPATIBLE_IOCTL(CDROMRESUME)
+COMPATIBLE_IOCTL(CDROMPLAYMSF)
+COMPATIBLE_IOCTL(CDROMPLAYTRKIND)
+COMPATIBLE_IOCTL(CDROMREADTOCHDR)
+COMPATIBLE_IOCTL(CDROMREADTOCENTRY)
+COMPATIBLE_IOCTL(CDROMSTOP)
+COMPATIBLE_IOCTL(CDROMSTART)
+COMPATIBLE_IOCTL(CDROMEJECT)
+COMPATIBLE_IOCTL(CDROMVOLCTRL)
+COMPATIBLE_IOCTL(CDROMSUBCHNL)
+COMPATIBLE_IOCTL(CDROMEJECT_SW)
+COMPATIBLE_IOCTL(CDROMMULTISESSION)
+COMPATIBLE_IOCTL(CDROM_GET_MCN)
+COMPATIBLE_IOCTL(CDROMRESET)
+COMPATIBLE_IOCTL(CDROMVOLREAD)
+COMPATIBLE_IOCTL(CDROMSEEK)
+COMPATIBLE_IOCTL(CDROMPLAYBLK)
+COMPATIBLE_IOCTL(CDROMCLOSETRAY)
+COMPATIBLE_IOCTL(CDROM_SET_OPTIONS)
+COMPATIBLE_IOCTL(CDROM_CLEAR_OPTIONS)
+COMPATIBLE_IOCTL(CDROM_SELECT_SPEED)
+COMPATIBLE_IOCTL(CDROM_SELECT_DISC)
+COMPATIBLE_IOCTL(CDROM_MEDIA_CHANGED)
+COMPATIBLE_IOCTL(CDROM_DRIVE_STATUS)
+COMPATIBLE_IOCTL(CDROM_DISC_STATUS)
+COMPATIBLE_IOCTL(CDROM_CHANGER_NSLOTS)
+COMPATIBLE_IOCTL(CDROM_LOCKDOOR)
+COMPATIBLE_IOCTL(CDROM_DEBUG)
+COMPATIBLE_IOCTL(CDROM_GET_CAPABILITY)
+/* DVD ioctls */
+COMPATIBLE_IOCTL(DVD_READ_STRUCT)
+COMPATIBLE_IOCTL(DVD_WRITE_STRUCT)
+COMPATIBLE_IOCTL(DVD_AUTH)
+/* Big L */
+COMPATIBLE_IOCTL(LOOP_SET_FD)
+COMPATIBLE_IOCTL(LOOP_CLR_FD)
+
+/* And these ioctls need translation */
+HANDLE_IOCTL(SIOCGIFNAME, dev_ifname32)
+HANDLE_IOCTL(SIOCGIFCONF, dev_ifconf)
+HANDLE_IOCTL(SIOCGIFFLAGS, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFFLAGS, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFMETRIC, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFMETRIC, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFMTU, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFMTU, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFMEM, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFMEM, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFHWADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFHWADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCADDMULTI, dev_ifsioc)
+HANDLE_IOCTL(SIOCDELMULTI, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFINDEX, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFMAP, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFMAP, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFBRDADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFBRDADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFDSTADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFDSTADDR, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFNETMASK, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFNETMASK, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFPFLAGS, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFPFLAGS, dev_ifsioc)
+HANDLE_IOCTL(SIOCGPPPSTATS, dev_ifsioc)
+HANDLE_IOCTL(SIOCGPPPCSTATS, dev_ifsioc)
+HANDLE_IOCTL(SIOCGPPPVER, dev_ifsioc)
+HANDLE_IOCTL(SIOCGIFTXQLEN, dev_ifsioc)
+HANDLE_IOCTL(SIOCSIFTXQLEN, dev_ifsioc)
+HANDLE_IOCTL(SIOCADDRT, routing_ioctl)
+HANDLE_IOCTL(SIOCDELRT, routing_ioctl)
+/*
+ * Note SIOCRTMSG is no longer, so this is safe and * the user would
+ * have seen just an -EINVAL anyways.
+ */
+HANDLE_IOCTL(SIOCRTMSG, ret_einval)
+HANDLE_IOCTL(SIOCGSTAMP, do_siocgstamp)
+
+#endif /* CONFIG_NET */
+
+HANDLE_IOCTL(EXT2_IOC32_GETFLAGS, do_ext2_ioctl)
+HANDLE_IOCTL(EXT2_IOC32_SETFLAGS, do_ext2_ioctl)
+HANDLE_IOCTL(EXT2_IOC32_GETVERSION, do_ext2_ioctl)
+HANDLE_IOCTL(EXT2_IOC32_SETVERSION, do_ext2_ioctl)
+
+HANDLE_IOCTL(HDIO_GETGEO, hdio_getgeo) /* hdreg.h ioctls */
+HANDLE_IOCTL(HDIO_GET_UNMASKINTR, hdio_ioctl_trans)
+HANDLE_IOCTL(HDIO_GET_MULTCOUNT, hdio_ioctl_trans)
+// HDIO_OBSOLETE_IDENTITY
+//HANDLE_IOCTL(HDIO_GET_KEEPSETTINGS, hdio_ioctl_trans)
+HANDLE_IOCTL(HDIO_GET_32BIT, hdio_ioctl_trans)
+HANDLE_IOCTL(HDIO_GET_NOWERR, hdio_ioctl_trans)
+HANDLE_IOCTL(HDIO_GET_DMA, hdio_ioctl_trans)
+HANDLE_IOCTL(HDIO_GET_NICE, hdio_ioctl_trans)
+COMPATIBLE_IOCTL(HDIO_GET_IDENTITY)
+// HDIO_TRISTATE_HWIF /* not implemented */
+// HDIO_DRIVE_TASK /* To do, need specs */
+COMPATIBLE_IOCTL(HDIO_DRIVE_CMD)
+COMPATIBLE_IOCTL(HDIO_SET_MULTCOUNT)
+COMPATIBLE_IOCTL(HDIO_SET_UNMASKINTR)
+//COMPATIBLE_IOCTL(HDIO_SET_KEEPSETTINGS)
+COMPATIBLE_IOCTL(HDIO_SET_32BIT)
+COMPATIBLE_IOCTL(HDIO_SET_NOWERR)
+COMPATIBLE_IOCTL(HDIO_SET_DMA)
+COMPATIBLE_IOCTL(HDIO_SET_PIO_MODE)
+COMPATIBLE_IOCTL(HDIO_SET_NICE)
+
+COMPATIBLE_IOCTL(BLKROSET) /* fs.h ioctls */
+COMPATIBLE_IOCTL(BLKROGET)
+COMPATIBLE_IOCTL(BLKRRPART)
+HANDLE_IOCTL(BLKGETSIZE, w_long)
+
+COMPATIBLE_IOCTL(BLKFLSBUF)
+COMPATIBLE_IOCTL(BLKSECTSET)
+HANDLE_IOCTL(BLKSECTGET, w_long)
+COMPATIBLE_IOCTL(BLKSSZGET)
+HANDLE_IOCTL(BLKPG, blkpg_ioctl_trans)
+COMPATIBLE_IOCTL(BLKBSZGET)
+COMPATIBLE_IOCTL(BLKBSZSET)
+
+#ifdef CONFIG_MD
+/* status */
+COMPATIBLE_IOCTL(RAID_VERSION)
+COMPATIBLE_IOCTL(GET_ARRAY_INFO)
+COMPATIBLE_IOCTL(GET_DISK_INFO)
+COMPATIBLE_IOCTL(PRINT_RAID_DEBUG)
+COMPATIBLE_IOCTL(RAID_AUTORUN)
+
+/* configuration */
+COMPATIBLE_IOCTL(CLEAR_ARRAY)
+COMPATIBLE_IOCTL(ADD_NEW_DISK)
+COMPATIBLE_IOCTL(HOT_REMOVE_DISK)
+COMPATIBLE_IOCTL(SET_ARRAY_INFO)
+COMPATIBLE_IOCTL(SET_DISK_INFO)
+COMPATIBLE_IOCTL(WRITE_RAID_INFO)
+COMPATIBLE_IOCTL(UNPROTECT_ARRAY)
+COMPATIBLE_IOCTL(PROTECT_ARRAY)
+COMPATIBLE_IOCTL(HOT_ADD_DISK)
+COMPATIBLE_IOCTL(SET_DISK_FAULTY)
+
+/* usage */
+COMPATIBLE_IOCTL(RUN_ARRAY)
+COMPATIBLE_IOCTL(START_ARRAY)
+COMPATIBLE_IOCTL(STOP_ARRAY)
+COMPATIBLE_IOCTL(STOP_ARRAY_RO)
+COMPATIBLE_IOCTL(RESTART_ARRAY_RW)
+#endif /* CONFIG_MD */
+
+#ifdef CONFIG_SIBYTE_TBPROF
+COMPATIBLE_IOCTL(SBPROF_ZBSTART),
+COMPATIBLE_IOCTL(SBPROF_ZBSTOP),
+COMPATIBLE_IOCTL(SBPROF_ZBWAITFULL),
+#endif /* CONFIG_SIBYTE_TBPROF */
+
+#if defined(CONFIG_BLK_DEV_DM) || defined(CONFIG_BLK_DEV_DM_MODULE)
+ IOCTL32_DEFAULT(DM_VERSION),
+ IOCTL32_DEFAULT(DM_REMOVE_ALL),
+ IOCTL32_DEFAULT(DM_DEV_CREATE),
+ IOCTL32_DEFAULT(DM_DEV_REMOVE),
+ IOCTL32_DEFAULT(DM_DEV_RELOAD),
+ IOCTL32_DEFAULT(DM_DEV_SUSPEND),
+ IOCTL32_DEFAULT(DM_DEV_RENAME),
+ IOCTL32_DEFAULT(DM_DEV_DEPS),
+ IOCTL32_DEFAULT(DM_DEV_STATUS),
+ IOCTL32_DEFAULT(DM_TARGET_STATUS),
+ IOCTL32_DEFAULT(DM_TARGET_WAIT),
+#endif /* CONFIG_BLK_DEV_DM */
+
+COMPATIBLE_IOCTL(MTIOCTOP) /* mtio.h ioctls */
+HANDLE_IOCTL(MTIOCGET32, mt_ioctl_trans)
+HANDLE_IOCTL(MTIOCPOS32, mt_ioctl_trans)
+HANDLE_IOCTL(MTIOCGETCONFIG32, mt_ioctl_trans)
+HANDLE_IOCTL(MTIOCSETCONFIG32, mt_ioctl_trans)
+// MTIOCRDFTSEG
+// MTIOCWRFTSEG
+// MTIOCVOLINFO
+// MTIOCGETSIZE
+// MTIOCFTFORMAT
+// MTIOCFTCMD
+
+COMPATIBLE_IOCTL(AUTOFS_IOC_READY) /* auto_fs.h ioctls */
+COMPATIBLE_IOCTL(AUTOFS_IOC_FAIL)
+COMPATIBLE_IOCTL(AUTOFS_IOC_CATATONIC)
+COMPATIBLE_IOCTL(AUTOFS_IOC_PROTOVER)
+HANDLE_IOCTL(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout)
+COMPATIBLE_IOCTL(AUTOFS_IOC_EXPIRE)
+COMPATIBLE_IOCTL(AUTOFS_IOC_EXPIRE_MULTI)
+
+/* Little p (/dev/rtc, /dev/envctrl, etc.) */
+COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */
+COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */
+COMPATIBLE_IOCTL(RTC_AIE_ON)
+COMPATIBLE_IOCTL(RTC_AIE_OFF)
+COMPATIBLE_IOCTL(RTC_UIE_ON)
+COMPATIBLE_IOCTL(RTC_UIE_OFF)
+COMPATIBLE_IOCTL(RTC_PIE_ON)
+COMPATIBLE_IOCTL(RTC_PIE_OFF)
+COMPATIBLE_IOCTL(RTC_WIE_ON)
+COMPATIBLE_IOCTL(RTC_WIE_OFF)
+COMPATIBLE_IOCTL(RTC_ALM_SET)
+COMPATIBLE_IOCTL(RTC_ALM_READ)
+COMPATIBLE_IOCTL(RTC_RD_TIME)
+COMPATIBLE_IOCTL(RTC_SET_TIME)
+COMPATIBLE_IOCTL(RTC_WKALM_SET)
+COMPATIBLE_IOCTL(RTC_WKALM_RD)
+IOCTL_TABLE_END
+
+#define NR_IOCTL_TRANS (sizeof(ioctl_translations) / \
+ sizeof(ioctl_translations[0]))
diff -Nru a/arch/mips/kernel/ipc.c b/arch/mips/kernel/ipc.c
--- a/arch/mips/kernel/ipc.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,98 +0,0 @@
-/*
- * linux/arch/mips/kernel/ipc.c
- *
- * This file contains various random system calls that
- * have a non-standard calling sequence on the Linux/MIPS
- * platform.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-
-#include <asm/ipc.h>
-#include <asm/uaccess.h>
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
- int third, void *ptr, long fifth)
-{
- int version, ret;
-
- version = call >> 16; /* hack for backward compatibility */
- call &= 0xffff;
-
- switch (call) {
- case SEMOP:
- return sys_semop (first, (struct sembuf *)ptr, second);
- case SEMGET:
- return sys_semget (first, second, third);
- case SEMCTL: {
- union semun fourth;
- if (!ptr)
- return -EINVAL;
- if (get_user(fourth.__pad, (void **) ptr))
- return -EFAULT;
- return sys_semctl (first, second, third, fourth);
- }
-
- case MSGSND:
- return sys_msgsnd (first, (struct msgbuf *) ptr,
- second, third);
- case MSGRCV:
- switch (version) {
- case 0: {
- struct ipc_kludge tmp;
- if (!ptr)
- return -EINVAL;
-
- if (copy_from_user(&tmp,
- (struct ipc_kludge *) ptr,
- sizeof (tmp)))
- return -EFAULT;
- return sys_msgrcv (first, tmp.msgp, second,
- tmp.msgtyp, third);
- }
- default:
- return sys_msgrcv (first,
- (struct msgbuf *) ptr,
- second, fifth, third);
- }
- case MSGGET:
- return sys_msgget ((key_t) first, second);
- case MSGCTL:
- return sys_msgctl (first, second, (struct msqid_ds *) ptr);
-
- case SHMAT:
- switch (version) {
- default: {
- ulong raddr;
- ret = sys_shmat (first, (char *) ptr, second, &raddr);
- if (ret)
- return ret;
- return put_user (raddr, (ulong *) third);
- }
- case 1: /* iBCS2 emulator entry point */
- if (!segment_eq(get_fs(), get_ds()))
- return -EINVAL;
- return sys_shmat (first, (char *) ptr, second, (ulong *) third);
- }
- case SHMDT:
- return sys_shmdt ((char *)ptr);
- case SHMGET:
- return sys_shmget (first, second, third);
- case SHMCTL:
- return sys_shmctl (first, second,
- (struct shmid_ds *) ptr);
- default:
- return -ENOSYS;
- }
-}
diff -Nru a/arch/mips/kernel/irix5sys.h b/arch/mips/kernel/irix5sys.h
--- a/arch/mips/kernel/irix5sys.h Sun Aug 3 13:14:44 2003
+++ b/arch/mips/kernel/irix5sys.h Sun Aug 3 13:14:44 2003
@@ -9,6 +9,7 @@
* accepts. Syscalls that receive a pointer to the saved registers are
* marked as having zero arguments.
*/
+#include <linux/config.h>
/* Keys:
* V == Valid and should work as expected for most cases.
@@ -18,1007 +19,1011 @@
* DC == Don't Care, a rats ass we couldn't give
*/
-SYS(sys_syscall, 0) /* 1000 sysindir() V*/
-SYS(sys_exit, 1) /* 1001 exit() V*/
-SYS(sys_fork, 0) /* 1002 fork() V*/
-SYS(sys_read, 3) /* 1003 read() V*/
-SYS(sys_write, 3) /* 1004 write() V*/
-SYS(sys_open, 3) /* 1005 open() V*/
-SYS(sys_close, 1) /* 1006 close() V*/
-SYS(irix_unimp, 0) /* 1007 (XXX IRIX 4 wait) V*/
-SYS(sys_creat, 2) /* 1008 creat() V*/
-SYS(sys_link, 2) /* 1009 link() V*/
-SYS(sys_unlink, 1) /* 1010 unlink() V*/
-SYS(irix_exec, 0) /* 1011 exec() V*/
-SYS(sys_chdir, 1) /* 1012 chdir() V*/
-SYS(irix_gtime, 0) /* 1013 time() V*/
-SYS(irix_unimp, 0) /* 1014 (XXX IRIX 4 mknod) V*/
-SYS(sys_chmod, 2) /* 1015 chmod() V*/
-SYS(sys_chown, 3) /* 1016 chown() V*/
-SYS(irix_brk, 1) /* 1017 break() V*/
-SYS(irix_unimp, 0) /* 1018 (XXX IRIX 4 stat) V*/
-SYS(sys_lseek, 3) /* 1019 lseek() XXX64bit HV*/
-SYS(irix_getpid, 0) /* 1020 getpid() V*/
-SYS(irix_mount, 6) /* 1021 mount() IV*/
-SYS(sys_umount, 1) /* 1022 umount() V*/
-SYS(sys_setuid, 1) /* 1023 setuid() V*/
-SYS(irix_getuid, 0) /* 1024 getuid() V*/
-SYS(irix_stime, 1) /* 1025 stime() V*/
-SYS(irix_unimp, 4) /* 1026 XXX ptrace() IV*/
-SYS(irix_alarm, 1) /* 1027 alarm() V*/
-SYS(irix_unimp, 0) /* 1028 (XXX IRIX 4 fstat) V*/
-SYS(irix_pause, 0) /* 1029 pause() V*/
-SYS(sys_utime, 2) /* 1030 utime() V*/
-SYS(irix_unimp, 0) /* 1031 nuthin' V*/
-SYS(irix_unimp, 0) /* 1032 nobody home man... V*/
-SYS(sys_access, 2) /* 1033 access() V*/
-SYS(sys_nice, 1) /* 1034 nice() V*/
-SYS(irix_statfs, 2) /* 1035 statfs() V*/
-SYS(sys_sync, 0) /* 1036 sync() V*/
-SYS(sys_kill, 2) /* 1037 kill() V*/
-SYS(irix_fstatfs, 2) /* 1038 fstatfs() V*/
-SYS(irix_setpgrp, 1) /* 1039 setpgrp() V*/
-SYS(irix_syssgi, 0) /* 1040 syssgi() HV*/
-SYS(sys_dup, 1) /* 1041 dup() V*/
-SYS(sys_pipe, 0) /* 1042 pipe() V*/
-SYS(irix_times, 1) /* 1043 times() V*/
-SYS(irix_unimp, 0) /* 1044 XXX profil() IV*/
-SYS(irix_unimp, 0) /* 1045 XXX lock() IV*/
-SYS(sys_setgid, 1) /* 1046 setgid() V*/
-SYS(irix_getgid, 0) /* 1047 getgid() V*/
-SYS(irix_unimp, 0) /* 1048 (XXX IRIX 4 ssig) V*/
-SYS(irix_msgsys, 6) /* 1049 sys_msgsys V*/
-SYS(sys_sysmips, 4) /* 1050 sysmips() HV*/
-SYS(irix_unimp, 0) /* 1051 XXX sysacct() IV*/
-SYS(irix_shmsys, 5) /* 1052 sys_shmsys V*/
-SYS(irix_semsys, 0) /* 1053 sys_semsys V*/
-SYS(irix_ioctl, 3) /* 1054 ioctl() HV*/
-SYS(irix_uadmin, 0) /* 1055 XXX sys_uadmin() HC*/
-SYS(irix_sysmp, 0) /* 1056 sysmp() HV*/
-SYS(irix_utssys, 4) /* 1057 sys_utssys() HV*/
-SYS(irix_unimp, 0) /* 1058 nada enchilada V*/
-SYS(irix_exece, 0) /* 1059 exece() V*/
-SYS(sys_umask, 1) /* 1060 umask() V*/
-SYS(sys_chroot, 1) /* 1061 chroot() V*/
-SYS(irix_fcntl, 3) /* 1062 fcntl() ?V*/
-SYS(irix_ulimit, 2) /* 1063 ulimit() HV*/
-SYS(irix_unimp, 0) /* 1064 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1065 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1066 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1067 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1068 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1069 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1070 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1071 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1072 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1073 XXX AFS shit DC*/
-SYS(irix_unimp, 0) /* 1074 nuttin' V*/
-SYS(irix_unimp, 0) /* 1075 XXX sys_getrlimit64()IV*/
-SYS(irix_unimp, 0) /* 1076 XXX sys_setrlimit64()IV*/
-SYS(sys_nanosleep, 2) /* 1077 nanosleep() V*/
-SYS(irix_lseek64, 5) /* 1078 lseek64() ?V*/
-SYS(sys_rmdir, 1) /* 1079 rmdir() V*/
-SYS(sys_mkdir, 2) /* 1080 mkdir() V*/
-SYS(sys_getdents, 3) /* 1081 getdents() V*/
-SYS(irix_sginap, 1) /* 1082 sys_sginap() V*/
-SYS(irix_sgikopt, 3) /* 1083 sys_sgikopt() DC*/
-SYS(sys_sysfs, 3) /* 1084 sysfs() ?V*/
-SYS(irix_unimp, 0) /* 1085 XXX sys_getmsg() DC*/
-SYS(irix_unimp, 0) /* 1086 XXX sys_putmsg() DC*/
-SYS(sys_poll, 3) /* 1087 poll() V*/
-SYS(irix_sigreturn, 0) /* 1088 sigreturn() ?V*/
-SYS(sys_accept, 3) /* 1089 accept() V*/
-SYS(sys_bind, 3) /* 1090 bind() V*/
-SYS(sys_connect, 3) /* 1091 connect() V*/
-SYS(irix_gethostid, 0) /* 1092 sys_gethostid() ?V*/
-SYS(sys_getpeername, 3) /* 1093 getpeername() V*/
-SYS(sys_getsockname, 3) /* 1094 getsockname() V*/
-SYS(sys_getsockopt, 5) /* 1095 getsockopt() V*/
-SYS(sys_listen, 2) /* 1096 listen() V*/
-SYS(sys_recv, 4) /* 1097 recv() V*/
-SYS(sys_recvfrom, 6) /* 1098 recvfrom() V*/
-SYS(sys_recvmsg, 3) /* 1099 recvmsg() V*/
-SYS(sys_select, 5) /* 1100 select() V*/
-SYS(sys_send, 4) /* 1101 send() V*/
-SYS(sys_sendmsg, 3) /* 1102 sendmsg() V*/
-SYS(sys_sendto, 6) /* 1103 sendto() V*/
-SYS(irix_sethostid, 1) /* 1104 sys_sethostid() ?V*/
-SYS(sys_setsockopt, 5) /* 1105 setsockopt() V*/
-SYS(sys_shutdown, 2) /* 1106 shutdown() ?V*/
-SYS(irix_socket, 3) /* 1107 socket() V*/
-SYS(sys_gethostname, 2) /* 1108 sys_gethostname() ?V*/
-SYS(sys_sethostname, 2) /* 1109 sethostname() ?V*/
-SYS(irix_getdomainname, 2) /* 1110 sys_getdomainname() ?V*/
-SYS(sys_setdomainname, 2) /* 1111 setdomainname() ?V*/
-SYS(sys_truncate, 2) /* 1112 truncate() V*/
-SYS(sys_ftruncate, 2) /* 1113 ftruncate() V*/
-SYS(sys_rename, 2) /* 1114 rename() V*/
-SYS(sys_symlink, 2) /* 1115 symlink() V*/
-SYS(sys_readlink, 3) /* 1116 readlink() V*/
-SYS(irix_unimp, 0) /* 1117 XXX IRIX 4 lstat() DC*/
-SYS(irix_unimp, 0) /* 1118 nothin' V*/
-SYS(irix_unimp, 0) /* 1119 XXX nfs_svc() DC*/
-SYS(irix_unimp, 0) /* 1120 XXX nfs_getfh() DC*/
-SYS(irix_unimp, 0) /* 1121 XXX async_daemon() DC*/
-SYS(irix_unimp, 0) /* 1122 XXX exportfs() DC*/
-SYS(sys_setregid, 2) /* 1123 setregid() V*/
-SYS(sys_setreuid, 2) /* 1124 setreuid() V*/
-SYS(sys_getitimer, 2) /* 1125 getitimer() V*/
-SYS(sys_setitimer, 3) /* 1126 setitimer() V*/
-SYS(irix_unimp, 1) /* 1127 XXX adjtime() IV*/
-SYS(irix_gettimeofday, 1) /* 1128 gettimeofday() V*/
-SYS(irix_unimp, 0) /* 1129 XXX sproc() IV*/
-SYS(irix_prctl, 0) /* 1130 prctl() HV*/
-SYS(irix_unimp, 0) /* 1131 XXX procblk() IV*/
-SYS(irix_unimp, 0) /* 1132 XXX sprocsp() IV*/
-SYS(irix_unimp, 0) /* 1133 XXX sgigsc() IV*/
-SYS(irix_mmap32, 6) /* 1134 mmap() XXXflags? ?V*/
-SYS(sys_munmap, 2) /* 1135 munmap() V*/
-SYS(sys_mprotect, 3) /* 1136 mprotect() V*/
-SYS(sys_msync, 4) /* 1137 msync() V*/
-SYS(irix_madvise, 3) /* 1138 madvise() DC*/
-SYS(irix_pagelock, 3) /* 1139 pagelock() IV*/
-SYS(irix_getpagesize, 0) /* 1140 getpagesize() V*/
-SYS(irix_quotactl, 0) /* 1141 quotactl() V*/
-SYS(irix_unimp, 0) /* 1142 nobody home man V*/
-SYS(sys_getpgid, 1) /* 1143 BSD getpgrp() V*/
-SYS(irix_BSDsetpgrp, 2) /* 1143 BSD setpgrp() V*/
-SYS(sys_vhangup, 0) /* 1144 vhangup() V*/
-SYS(sys_fsync, 1) /* 1145 fsync() V*/
-SYS(sys_fchdir, 1) /* 1146 fchdir() V*/
-SYS(sys_getrlimit, 2) /* 1147 getrlimit() ?V*/
-SYS(sys_setrlimit, 2) /* 1148 setrlimit() ?V*/
-SYS(sys_cacheflush, 3) /* 1150 cacheflush() HV*/
-SYS(sys_cachectl, 3) /* 1151 cachectl() HV*/
-SYS(sys_fchown, 3) /* 1152 fchown() ?V*/
-SYS(sys_fchmod, 2) /* 1153 fchmod() ?V*/
-SYS(irix_unimp, 0) /* 1154 XXX IRIX 4 wait3() V*/
-SYS(sys_socketpair, 4) /* 1155 socketpair() V*/
-SYS(irix_systeminfo, 3) /* 1156 systeminfo() IV*/
-SYS(irix_uname, 1) /* 1157 uname() IV*/
-SYS(irix_xstat, 3) /* 1158 xstat() V*/
-SYS(irix_lxstat, 3) /* 1159 lxstat() V*/
-SYS(irix_fxstat, 3) /* 1160 fxstat() V*/
-SYS(irix_xmknod, 0) /* 1161 xmknod() ?V*/
-SYS(irix_sigaction, 4) /* 1162 sigaction() ?V*/
-SYS(irix_sigpending, 1) /* 1163 sigpending() ?V*/
-SYS(irix_sigprocmask, 3) /* 1164 sigprocmask() ?V*/
-SYS(irix_sigsuspend, 0) /* 1165 sigsuspend() ?V*/
-SYS(irix_sigpoll_sys, 3) /* 1166 sigpoll_sys() IV*/
-SYS(irix_swapctl, 2) /* 1167 swapctl() IV*/
-SYS(irix_getcontext, 0) /* 1168 getcontext() HV*/
-SYS(irix_setcontext, 0) /* 1169 setcontext() HV*/
-SYS(irix_waitsys, 5) /* 1170 waitsys() IV*/
-SYS(irix_sigstack, 2) /* 1171 sigstack() HV*/
-SYS(irix_sigaltstack, 2) /* 1172 sigaltstack() HV*/
-SYS(irix_sigsendset, 2) /* 1173 sigsendset() IV*/
-SYS(irix_statvfs, 2) /* 1174 statvfs() V*/
-SYS(irix_fstatvfs, 2) /* 1175 fstatvfs() V*/
-SYS(irix_unimp, 0) /* 1176 XXX getpmsg() DC*/
-SYS(irix_unimp, 0) /* 1177 XXX putpmsg() DC*/
-SYS(sys_lchown, 3) /* 1178 lchown() V*/
-SYS(irix_priocntl, 0) /* 1179 priocntl() DC*/
-SYS(irix_sigqueue, 4) /* 1180 sigqueue() IV*/
-SYS(sys_readv, 3) /* 1181 readv() V*/
-SYS(sys_writev, 3) /* 1182 writev() V*/
-SYS(irix_truncate64, 4) /* 1183 truncate64() XX32bit HV*/
-SYS(irix_ftruncate64, 4) /* 1184 ftruncate64()XX32bit HV*/
-SYS(irix_mmap64, 0) /* 1185 mmap64() XX32bit HV*/
-SYS(irix_dmi, 0) /* 1186 dmi() DC*/
-SYS(irix_pread, 6) /* 1187 pread() IV*/
-SYS(irix_pwrite, 6) /* 1188 pwrite() IV*/
-SYS(sys_fsync, 1) /* 1189 fdatasync() XXPOSIX HV*/
-SYS(irix_sgifastpath, 7) /* 1190 sgifastpath() WHEEE IV*/
-SYS(irix_unimp, 0) /* 1191 XXX attr_get() DC*/
-SYS(irix_unimp, 0) /* 1192 XXX attr_getf() DC*/
-SYS(irix_unimp, 0) /* 1193 XXX attr_set() DC*/
-SYS(irix_unimp, 0) /* 1194 XXX attr_setf() DC*/
-SYS(irix_unimp, 0) /* 1195 XXX attr_remove() DC*/
-SYS(irix_unimp, 0) /* 1196 XXX attr_removef() DC*/
-SYS(irix_unimp, 0) /* 1197 XXX attr_list() DC*/
-SYS(irix_unimp, 0) /* 1198 XXX attr_listf() DC*/
-SYS(irix_unimp, 0) /* 1199 XXX attr_multi() DC*/
-SYS(irix_unimp, 0) /* 1200 XXX attr_multif() DC*/
-SYS(irix_statvfs64, 2) /* 1201 statvfs64() V*/
-SYS(irix_fstatvfs64, 2) /* 1202 fstatvfs64() V*/
-SYS(irix_getmountid, 2) /* 1203 getmountid()XXXfsids HV*/
-SYS(irix_nsproc, 5) /* 1204 nsproc() IV*/
-SYS(irix_getdents64, 3) /* 1205 getdents64() HV*/
-SYS(irix_unimp, 0) /* 1206 XXX DFS garbage DC*/
-SYS(irix_ngetdents, 4) /* 1207 ngetdents() XXXeop HV*/
-SYS(irix_ngetdents64, 4) /* 1208 ngetdents64() XXXeop HV*/
-SYS(irix_unimp, 0) /* 1209 nothin' V*/
-SYS(irix_unimp, 0) /* 1210 XXX pidsprocsp() */
-SYS(irix_unimp, 0) /* 1211 XXX rexec() */
-SYS(irix_unimp, 0) /* 1212 XXX timer_create() */
-SYS(irix_unimp, 0) /* 1213 XXX timer_delete() */
-SYS(irix_unimp, 0) /* 1214 XXX timer_settime() */
-SYS(irix_unimp, 0) /* 1215 XXX timer_gettime() */
-SYS(irix_unimp, 0) /* 1216 XXX timer_setoverrun() */
-SYS(sys_sched_rr_get_interval, 2) /* 1217 sched_rr_get_interval()V*/
-SYS(sys_sched_yield, 0) /* 1218 sched_yield() V*/
-SYS(sys_sched_getscheduler, 1) /* 1219 sched_getscheduler() V*/
-SYS(sys_sched_setscheduler, 3) /* 1220 sched_setscheduler() V*/
-SYS(sys_sched_getparam, 2) /* 1221 sched_getparam() V*/
-SYS(sys_sched_setparam, 2) /* 1222 sched_setparam() V*/
-SYS(irix_unimp, 0) /* 1223 XXX usync_cntl() */
-SYS(irix_unimp, 0) /* 1224 XXX psema_cntl() */
-SYS(irix_unimp, 0) /* 1225 XXX restartreturn() */
+#ifdef CONFIG_BINFMT_IRIX
+ sys sys_syscall 0 /* 1000 sysindir() V*/
+ sys sys_exit 1 /* 1001 exit() V*/
+ sys sys_fork 0 /* 1002 fork() V*/
+ sys sys_read 3 /* 1003 read() V*/
+ sys sys_write 3 /* 1004 write() V*/
+ sys sys_open 3 /* 1005 open() V*/
+ sys sys_close 1 /* 1006 close() V*/
+ sys irix_unimp 0 /* 1007 (XXX IRIX 4 wait) V*/
+ sys sys_creat 2 /* 1008 creat() V*/
+ sys sys_link 2 /* 1009 link() V*/
+ sys sys_unlink 1 /* 1010 unlink() V*/
+ sys irix_exec 0 /* 1011 exec() V*/
+ sys sys_chdir 1 /* 1012 chdir() V*/
+ sys irix_gtime 0 /* 1013 time() V*/
+ sys irix_unimp 0 /* 1014 (XXX IRIX 4 mknod) V*/
+ sys sys_chmod 2 /* 1015 chmod() V*/
+ sys sys_chown 3 /* 1016 chown() V*/
+ sys irix_brk 1 /* 1017 break() V*/
+ sys irix_unimp 0 /* 1018 (XXX IRIX 4 stat) V*/
+ sys sys_lseek 3 /* 1019 lseek() XXX64bit HV*/
+ sys irix_getpid 0 /* 1020 getpid() V*/
+ sys irix_mount 6 /* 1021 mount() IV*/
+ sys sys_umount 1 /* 1022 umount() V*/
+ sys sys_setuid 1 /* 1023 setuid() V*/
+ sys irix_getuid 0 /* 1024 getuid() V*/
+ sys irix_stime 1 /* 1025 stime() V*/
+ sys irix_unimp 4 /* 1026 XXX ptrace() IV*/
+ sys irix_alarm 1 /* 1027 alarm() V*/
+ sys irix_unimp 0 /* 1028 (XXX IRIX 4 fstat) V*/
+ sys irix_pause 0 /* 1029 pause() V*/
+ sys sys_utime 2 /* 1030 utime() V*/
+ sys irix_unimp 0 /* 1031 nuthin' V*/
+ sys irix_unimp 0 /* 1032 nobody home man... V*/
+ sys sys_access 2 /* 1033 access() V*/
+ sys sys_nice 1 /* 1034 nice() V*/
+ sys irix_statfs 2 /* 1035 statfs() V*/
+ sys sys_sync 0 /* 1036 sync() V*/
+ sys sys_kill 2 /* 1037 kill() V*/
+ sys irix_fstatfs 2 /* 1038 fstatfs() V*/
+ sys irix_setpgrp 1 /* 1039 setpgrp() V*/
+ sys irix_syssgi 0 /* 1040 syssgi() HV*/
+ sys sys_dup 1 /* 1041 dup() V*/
+ sys sys_pipe 0 /* 1042 pipe() V*/
+ sys irix_times 1 /* 1043 times() V*/
+ sys irix_unimp 0 /* 1044 XXX profil() IV*/
+ sys irix_unimp 0 /* 1045 XXX lock() IV*/
+ sys sys_setgid 1 /* 1046 setgid() V*/
+ sys irix_getgid 0 /* 1047 getgid() V*/
+ sys irix_unimp 0 /* 1048 (XXX IRIX 4 ssig) V*/
+ sys irix_msgsys 6 /* 1049 sys_msgsys V*/
+ sys sys_sysmips 4 /* 1050 sysmips() HV*/
+ sys irix_unimp 0 /* 1051 XXX sysacct() IV*/
+ sys irix_shmsys 5 /* 1052 sys_shmsys V*/
+ sys irix_semsys 0 /* 1053 sys_semsys V*/
+ sys irix_ioctl 3 /* 1054 ioctl() HV*/
+ sys irix_uadmin 0 /* 1055 XXX sys_uadmin() HC*/
+ sys irix_sysmp 0 /* 1056 sysmp() HV*/
+ sys irix_utssys 4 /* 1057 sys_utssys() HV*/
+ sys irix_unimp 0 /* 1058 nada enchilada V*/
+ sys irix_exece 0 /* 1059 exece() V*/
+ sys sys_umask 1 /* 1060 umask() V*/
+ sys sys_chroot 1 /* 1061 chroot() V*/
+ sys irix_fcntl 3 /* 1062 fcntl() ?V*/
+ sys irix_ulimit 2 /* 1063 ulimit() HV*/
+ sys irix_unimp 0 /* 1064 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1065 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1066 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1067 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1068 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1069 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1070 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1071 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1072 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1073 XXX AFS shit DC*/
+ sys irix_unimp 0 /* 1074 nuttin' V*/
+ sys irix_unimp 0 /* 1075 XXX sys_getrlimit64()IV*/
+ sys irix_unimp 0 /* 1076 XXX sys_setrlimit64()IV*/
+ sys sys_nanosleep 2 /* 1077 nanosleep() V*/
+ sys irix_lseek64 5 /* 1078 lseek64() ?V*/
+ sys sys_rmdir 1 /* 1079 rmdir() V*/
+ sys sys_mkdir 2 /* 1080 mkdir() V*/
+ sys sys_getdents 3 /* 1081 getdents() V*/
+ sys irix_sginap 1 /* 1082 sys_sginap() V*/
+ sys irix_sgikopt 3 /* 1083 sys_sgikopt() DC*/
+ sys sys_sysfs 3 /* 1084 sysfs() ?V*/
+ sys irix_unimp 0 /* 1085 XXX sys_getmsg() DC*/
+ sys irix_unimp 0 /* 1086 XXX sys_putmsg() DC*/
+ sys sys_poll 3 /* 1087 poll() V*/
+ sys irix_sigreturn 0 /* 1088 sigreturn() ?V*/
+ sys sys_accept 3 /* 1089 accept() V*/
+ sys sys_bind 3 /* 1090 bind() V*/
+ sys sys_connect 3 /* 1091 connect() V*/
+ sys irix_gethostid 0 /* 1092 sys_gethostid() ?V*/
+ sys sys_getpeername 3 /* 1093 getpeername() V*/
+ sys sys_getsockname 3 /* 1094 getsockname() V*/
+ sys sys_getsockopt 5 /* 1095 getsockopt() V*/
+ sys sys_listen 2 /* 1096 listen() V*/
+ sys sys_recv 4 /* 1097 recv() V*/
+ sys sys_recvfrom 6 /* 1098 recvfrom() V*/
+ sys sys_recvmsg 3 /* 1099 recvmsg() V*/
+ sys sys_select 5 /* 1100 select() V*/
+ sys sys_send 4 /* 1101 send() V*/
+ sys sys_sendmsg 3 /* 1102 sendmsg() V*/
+ sys sys_sendto 6 /* 1103 sendto() V*/
+ sys irix_sethostid 1 /* 1104 sys_sethostid() ?V*/
+ sys sys_setsockopt 5 /* 1105 setsockopt() V*/
+ sys sys_shutdown 2 /* 1106 shutdown() ?V*/
+ sys irix_socket 3 /* 1107 socket() V*/
+ sys sys_gethostname 2 /* 1108 sys_gethostname() ?V*/
+ sys sys_sethostname 2 /* 1109 sethostname() ?V*/
+ sys irix_getdomainname 2 /* 1110 sys_getdomainname() ?V*/
+ sys sys_setdomainname 2 /* 1111 setdomainname() ?V*/
+ sys sys_truncate 2 /* 1112 truncate() V*/
+ sys sys_ftruncate 2 /* 1113 ftruncate() V*/
+ sys sys_rename 2 /* 1114 rename() V*/
+ sys sys_symlink 2 /* 1115 symlink() V*/
+ sys sys_readlink 3 /* 1116 readlink() V*/
+ sys irix_unimp 0 /* 1117 XXX IRIX 4 lstat() DC*/
+ sys irix_unimp 0 /* 1118 nothin' V*/
+ sys irix_unimp 0 /* 1119 XXX nfs_svc() DC*/
+ sys irix_unimp 0 /* 1120 XXX nfs_getfh() DC*/
+ sys irix_unimp 0 /* 1121 XXX async_daemon() DC*/
+ sys irix_unimp 0 /* 1122 XXX exportfs() DC*/
+ sys sys_setregid 2 /* 1123 setregid() V*/
+ sys sys_setreuid 2 /* 1124 setreuid() V*/
+ sys sys_getitimer 2 /* 1125 getitimer() V*/
+ sys sys_setitimer 3 /* 1126 setitimer() V*/
+ sys irix_unimp 1 /* 1127 XXX adjtime() IV*/
+ sys irix_gettimeofday 1 /* 1128 gettimeofday() V*/
+ sys irix_unimp 0 /* 1129 XXX sproc() IV*/
+ sys irix_prctl 0 /* 1130 prctl() HV*/
+ sys irix_unimp 0 /* 1131 XXX procblk() IV*/
+ sys irix_unimp 0 /* 1132 XXX sprocsp() IV*/
+ sys irix_unimp 0 /* 1133 XXX sgigsc() IV*/
+ sys irix_mmap32 6 /* 1134 mmap() XXXflags? ?V*/
+ sys sys_munmap 2 /* 1135 munmap() V*/
+ sys sys_mprotect 3 /* 1136 mprotect() V*/
+ sys sys_msync 4 /* 1137 msync() V*/
+ sys irix_madvise 3 /* 1138 madvise() DC*/
+ sys irix_pagelock 3 /* 1139 pagelock() IV*/
+ sys irix_getpagesize 0 /* 1140 getpagesize() V*/
+ sys irix_quotactl 0 /* 1141 quotactl() V*/
+ sys irix_unimp 0 /* 1142 nobody home man V*/
+ sys sys_getpgid 1 /* 1143 BSD getpgrp() V*/
+ sys irix_BSDsetpgrp 2 /* 1143 BSD setpgrp() V*/
+ sys sys_vhangup 0 /* 1144 vhangup() V*/
+ sys sys_fsync 1 /* 1145 fsync() V*/
+ sys sys_fchdir 1 /* 1146 fchdir() V*/
+ sys sys_getrlimit 2 /* 1147 getrlimit() ?V*/
+ sys sys_setrlimit 2 /* 1148 setrlimit() ?V*/
+ sys sys_cacheflush 3 /* 1150 cacheflush() HV*/
+ sys sys_cachectl 3 /* 1151 cachectl() HV*/
+ sys sys_fchown 3 /* 1152 fchown() ?V*/
+ sys sys_fchmod 2 /* 1153 fchmod() ?V*/
+ sys irix_unimp 0 /* 1154 XXX IRIX 4 wait3() V*/
+ sys sys_socketpair 4 /* 1155 socketpair() V*/
+ sys irix_systeminfo 3 /* 1156 systeminfo() IV*/
+ sys irix_uname 1 /* 1157 uname() IV*/
+ sys irix_xstat 3 /* 1158 xstat() V*/
+ sys irix_lxstat 3 /* 1159 lxstat() V*/
+ sys irix_fxstat 3 /* 1160 fxstat() V*/
+ sys irix_xmknod 0 /* 1161 xmknod() ?V*/
+ sys irix_sigaction 4 /* 1162 sigaction() ?V*/
+ sys irix_sigpending 1 /* 1163 sigpending() ?V*/
+ sys irix_sigprocmask 3 /* 1164 sigprocmask() ?V*/
+ sys irix_sigsuspend 0 /* 1165 sigsuspend() ?V*/
+ sys irix_sigpoll_sys 3 /* 1166 sigpoll_sys() IV*/
+ sys irix_swapctl 2 /* 1167 swapctl() IV*/
+ sys irix_getcontext 0 /* 1168 getcontext() HV*/
+ sys irix_setcontext 0 /* 1169 setcontext() HV*/
+ sys irix_waitsys 5 /* 1170 waitsys() IV*/
+ sys irix_sigstack 2 /* 1171 sigstack() HV*/
+ sys irix_sigaltstack 2 /* 1172 sigaltstack() HV*/
+ sys irix_sigsendset 2 /* 1173 sigsendset() IV*/
+ sys irix_statvfs 2 /* 1174 statvfs() V*/
+ sys irix_fstatvfs 2 /* 1175 fstatvfs() V*/
+ sys irix_unimp 0 /* 1176 XXX getpmsg() DC*/
+ sys irix_unimp 0 /* 1177 XXX putpmsg() DC*/
+ sys sys_lchown 3 /* 1178 lchown() V*/
+ sys irix_priocntl 0 /* 1179 priocntl() DC*/
+ sys irix_sigqueue 4 /* 1180 sigqueue() IV*/
+ sys sys_readv 3 /* 1181 readv() V*/
+ sys sys_writev 3 /* 1182 writev() V*/
+ sys irix_truncate64 4 /* 1183 truncate64() XX32bit HV*/
+ sys irix_ftruncate64 4 /* 1184 ftruncate64()XX32bit HV*/
+ sys irix_mmap64 0 /* 1185 mmap64() XX32bit HV*/
+ sys irix_dmi 0 /* 1186 dmi() DC*/
+ sys irix_pread 6 /* 1187 pread() IV*/
+ sys irix_pwrite 6 /* 1188 pwrite() IV*/
+ sys sys_fsync 1 /* 1189 fdatasync() XXPOSIX HV*/
+ sys irix_sgifastpath 7 /* 1190 sgifastpath() WHEEE IV*/
+ sys irix_unimp 0 /* 1191 XXX attr_get() DC*/
+ sys irix_unimp 0 /* 1192 XXX attr_getf() DC*/
+ sys irix_unimp 0 /* 1193 XXX attr_set() DC*/
+ sys irix_unimp 0 /* 1194 XXX attr_setf() DC*/
+ sys irix_unimp 0 /* 1195 XXX attr_remove() DC*/
+ sys irix_unimp 0 /* 1196 XXX attr_removef() DC*/
+ sys irix_unimp 0 /* 1197 XXX attr_list() DC*/
+ sys irix_unimp 0 /* 1198 XXX attr_listf() DC*/
+ sys irix_unimp 0 /* 1199 XXX attr_multi() DC*/
+ sys irix_unimp 0 /* 1200 XXX attr_multif() DC*/
+ sys irix_statvfs64 2 /* 1201 statvfs64() V*/
+ sys irix_fstatvfs64 2 /* 1202 fstatvfs64() V*/
+ sys irix_getmountid 2 /* 1203 getmountid()XXXfsids HV*/
+ sys irix_nsproc 5 /* 1204 nsproc() IV*/
+ sys irix_getdents64 3 /* 1205 getdents64() HV*/
+ sys irix_unimp 0 /* 1206 XXX DFS garbage DC*/
+ sys irix_ngetdents 4 /* 1207 ngetdents() XXXeop HV*/
+ sys irix_ngetdents64 4 /* 1208 ngetdents64() XXXeop HV*/
+ sys irix_unimp 0 /* 1209 nothin' V*/
+ sys irix_unimp 0 /* 1210 XXX pidsprocsp() */
+ sys irix_unimp 0 /* 1211 XXX rexec() */
+ sys irix_unimp 0 /* 1212 XXX timer_create() */
+ sys irix_unimp 0 /* 1213 XXX timer_delete() */
+ sys irix_unimp 0 /* 1214 XXX timer_settime() */
+ sys irix_unimp 0 /* 1215 XXX timer_gettime() */
+ sys irix_unimp 0 /* 1216 XXX timer_setoverrun() */
+ sys sys_sched_rr_get_interval 2 /* 1217 sched_rr_get_interval()V*/
+ sys sys_sched_yield 0 /* 1218 sched_yield() V*/
+ sys sys_sched_getscheduler 1 /* 1219 sched_getscheduler() V*/
+ sys sys_sched_setscheduler 3 /* 1220 sched_setscheduler() V*/
+ sys sys_sched_getparam 2 /* 1221 sched_getparam() V*/
+ sys sys_sched_setparam 2 /* 1222 sched_setparam() V*/
+ sys irix_unimp 0 /* 1223 XXX usync_cntl() */
+ sys irix_unimp 0 /* 1224 XXX psema_cntl() */
+ sys irix_unimp 0 /* 1225 XXX restartreturn() */
/* Just to pad things out nicely. */
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
-SYS(irix_unimp, 0)
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+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+ sys irix_unimp 0
+#else
+ mille sys_ni_syscall 0
+#endif
/* YEEEEEEEEEEEEEEEEEE!!!! */
diff -Nru a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
--- a/arch/mips/kernel/irixsig.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/kernel/irixsig.c Sun Aug 3 13:14:51 2003
@@ -242,7 +242,7 @@
fregs = (u64 *) ¤t->thread.fpu;
for(i = 0; i < 32; i++)
fregs[i] = (u64) context->fpregs[i];
- __get_user(current->thread.fpu.hard.control, &context->fpcsr);
+ __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr);
}
/* XXX do sigstack crapola here... XXX */
diff -Nru a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
--- a/arch/mips/kernel/irq.c Sun Aug 3 13:14:45 2003
+++ b/arch/mips/kernel/irq.c Sun Aug 3 13:14:45 2003
@@ -344,13 +344,12 @@
* 0 return value means that this irq is already being
* handled by some other CPU. (or is disabled)
*/
- int cpu = smp_processor_id();
irq_desc_t *desc = irq_desc + irq;
struct irqaction * action;
unsigned int status;
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
spin_lock(&desc->lock);
desc->handler->ack(irq);
/*
@@ -395,7 +394,7 @@
irqreturn_t action_ret;
spin_unlock(&desc->lock);
- action_ret = handle_IRQ_event(irq, ®s, action);
+ action_ret = handle_IRQ_event(irq, regs, action);
spin_lock(&desc->lock);
if (!noirqdebug)
note_interrupt(irq, desc, action_ret);
diff -Nru a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/linux32.c Sun Aug 3 13:14:49 2003
@@ -0,0 +1,1866 @@
+/*
+ * Conversion between 32-bit and 64-bit native system calls.
+ *
+ * Copyright (C) 2000 Silicon Graphics, Inc.
+ * Written by Ulf Carlsson (ulfc@engr.sgi.com)
+ * sys32_execve from ia64/ia32 code, Feb 2000, Kanoj Sarcar (kanoj@sgi.com)
+ */
+#include <linux/config.h>
+#include <linux/mm.h>
+#include <linux/errno.h>
+#include <linux/file.h>
+#include <linux/smp_lock.h>
+#include <linux/highuid.h>
+#include <linux/dirent.h>
+#include <linux/resource.h>
+#include <linux/highmem.h>
+#include <linux/time.h>
+#include <linux/times.h>
+#include <linux/poll.h>
+#include <linux/slab.h>
+#include <linux/skbuff.h>
+#include <linux/filter.h>
+#include <linux/shm.h>
+#include <linux/sem.h>
+#include <linux/msg.h>
+#include <linux/icmpv6.h>
+#include <linux/sysctl.h>
+#include <linux/utime.h>
+#include <linux/utsname.h>
+#include <linux/personality.h>
+#include <linux/timex.h>
+#include <linux/dnotify.h>
+#include <linux/module.h>
+#include <linux/binfmts.h>
+#include <linux/security.h>
+#include <linux/compat.h>
+#include <linux/vfs.h>
+
+#include <net/sock.h>
+#include <net/scm.h>
+
+#include <asm/ipc.h>
+#include <asm/sim.h>
+#include <asm/uaccess.h>
+#include <asm/mmu_context.h>
+#include <asm/mman.h>
+
+/* Use this to get at 32-bit user passed pointers. */
+/* A() macro should be used for places where you e.g.
+ have some internal variable u32 and just want to get
+ rid of a compiler warning. AA() has to be used in
+ places where you want to convert a function argument
+ to 32bit pointer or when you e.g. access pt_regs
+ structure and want to consider 32bit registers only.
+ */
+#define A(__x) ((unsigned long)(__x))
+#define AA(__x) ((unsigned long)((int)__x))
+
+#ifdef __MIPSEB__
+#define merge_64(r1,r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL))
+#endif
+#ifdef __MIPSEL__
+#define merge_64(r1,r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
+#endif
+
+/*
+ * Revalidate the inode. This is required for proper NFS attribute caching.
+ */
+
+int cp_compat_stat(struct kstat *stat, struct compat_stat *statbuf)
+{
+ struct compat_stat tmp;
+
+ memset(&tmp, 0, sizeof(tmp));
+ tmp.st_dev = stat->dev;
+ tmp.st_ino = stat->ino;
+ tmp.st_mode = stat->mode;
+ tmp.st_nlink = stat->nlink;
+ SET_STAT_UID(tmp, stat->uid);
+ SET_STAT_GID(tmp, stat->gid);
+ tmp.st_rdev = stat->rdev;
+ tmp.st_size = stat->size;
+ tmp.st_atime = stat->atime.tv_sec;
+ tmp.st_mtime = stat->mtime.tv_sec;
+ tmp.st_ctime = stat->ctime.tv_sec;
+#ifdef STAT_HAVE_NSEC
+ tmp.st_atime_nsec = stat->atime.tv_nsec;
+ tmp.st_mtime_nsec = stat->mtime.tv_nsec;
+ tmp.st_ctime_nsec = stat->ctime.tv_nsec;
+#endif
+ tmp.st_blocks = stat->blocks;
+ tmp.st_blksize = stat->blksize;
+ return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0;
+}
+
+asmlinkage unsigned long
+sys32_mmap2(unsigned long addr, size_t len, unsigned long prot,
+ unsigned long flags, unsigned long fd, unsigned long pgoff)
+{
+ struct file * file = NULL;
+ unsigned long error;
+
+ error = -EINVAL;
+ if (!(flags & MAP_ANONYMOUS)) {
+ error = -EBADF;
+ file = fget(fd);
+ if (!file)
+ goto out;
+ }
+ flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
+
+ down_write(¤t->mm->mmap_sem);
+ error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
+ up_write(¤t->mm->mmap_sem);
+ if (file)
+ fput(file);
+
+out:
+ return error;
+}
+
+
+asmlinkage long sys_truncate(const char * path, unsigned long length);
+
+asmlinkage int sys_truncate64(const char *path, unsigned int high,
+ unsigned int low)
+{
+ if ((int)high < 0)
+ return -EINVAL;
+ return sys_truncate(path, ((long) high << 32) | low);
+}
+
+asmlinkage long sys_ftruncate(unsigned int fd, unsigned long length);
+
+asmlinkage int sys_ftruncate64(unsigned int fd, unsigned int high,
+ unsigned int low)
+{
+ if ((int)high < 0)
+ return -EINVAL;
+ return sys_ftruncate(fd, ((long) high << 32) | low);
+}
+
+/*
+ * count32() counts the number of arguments/envelopes
+ */
+static int count32(u32 * argv, int max)
+{
+ int i = 0;
+
+ if (argv != NULL) {
+ for (;;) {
+ u32 p; int error;
+
+ error = get_user(p,argv);
+ if (error)
+ return error;
+ if (!p)
+ break;
+ argv++;
+ if (++i > max)
+ return -E2BIG;
+ }
+ }
+ return i;
+}
+
+
+/*
+ * 'copy_strings32()' copies argument/envelope strings from user
+ * memory to free pages in kernel mem. These are in a format ready
+ * to be put directly into the top of new user memory.
+ */
+int copy_strings32(int argc, u32 * argv, struct linux_binprm *bprm)
+{
+ while (argc-- > 0) {
+ u32 str;
+ int len;
+ unsigned long pos;
+
+ if (get_user(str, argv+argc) || !str ||
+ !(len = strnlen_user((char *)A(str), bprm->p)))
+ return -EFAULT;
+ if (bprm->p < len)
+ return -E2BIG;
+
+ bprm->p -= len;
+ /* XXX: add architecture specific overflow check here. */
+
+ pos = bprm->p;
+ while (len > 0) {
+ char *kaddr;
+ int i, new, err;
+ struct page *page;
+ int offset, bytes_to_copy;
+
+ offset = pos % PAGE_SIZE;
+ i = pos/PAGE_SIZE;
+ page = bprm->page[i];
+ new = 0;
+ if (!page) {
+ page = alloc_page(GFP_HIGHUSER);
+ bprm->page[i] = page;
+ if (!page)
+ return -ENOMEM;
+ new = 1;
+ }
+ kaddr = kmap(page);
+
+ if (new && offset)
+ memset(kaddr, 0, offset);
+ bytes_to_copy = PAGE_SIZE - offset;
+ if (bytes_to_copy > len) {
+ bytes_to_copy = len;
+ if (new)
+ memset(kaddr+offset+len, 0,
+ PAGE_SIZE-offset-len);
+ }
+ err = copy_from_user(kaddr + offset, (char *)A(str),
+ bytes_to_copy);
+ flush_dcache_page(page);
+ kunmap(page);
+
+ if (err)
+ return -EFAULT;
+
+ pos += bytes_to_copy;
+ str += bytes_to_copy;
+ len -= bytes_to_copy;
+ }
+ }
+ return 0;
+}
+
+/*
+ * sys32_execve() executes a new program.
+ */
+static inline int
+do_execve32(char * filename, u32 * argv, u32 * envp, struct pt_regs * regs)
+{
+ struct linux_binprm bprm;
+ struct file * file;
+ int retval;
+ int i;
+
+ file = open_exec(filename);
+
+ retval = PTR_ERR(file);
+ if (IS_ERR(file))
+ return retval;
+
+ bprm.p = PAGE_SIZE*MAX_ARG_PAGES-sizeof(void *);
+ memset(bprm.page, 0, MAX_ARG_PAGES * sizeof(bprm.page[0]));
+
+ bprm.file = file;
+ bprm.filename = filename;
+ bprm.sh_bang = 0;
+ bprm.loader = 0;
+ bprm.exec = 0;
+ bprm.security = NULL;
+ bprm.mm = mm_alloc();
+ retval = -ENOMEM;
+ if (!bprm.mm)
+ goto out_file;
+
+ retval = init_new_context(current, bprm.mm);
+ if (retval < 0)
+ goto out_mm;
+
+ bprm.argc = count32(argv, bprm.p / sizeof(u32));
+ if ((retval = bprm.argc) < 0)
+ goto out_mm;
+
+ bprm.envc = count32(envp, bprm.p / sizeof(u32));
+ if ((retval = bprm.envc) < 0)
+ goto out_mm;
+
+ if ((retval = security_bprm_alloc(&bprm)))
+ goto out;
+
+ retval = prepare_binprm(&bprm);
+ if (retval < 0)
+ goto out;
+
+ retval = copy_strings_kernel(1, &bprm.filename, &bprm);
+ if (retval < 0)
+ goto out;
+
+ bprm.exec = bprm.p;
+ retval = copy_strings32(bprm.envc, envp, &bprm);
+ if (retval < 0)
+ goto out;
+
+ retval = copy_strings32(bprm.argc, argv, &bprm);
+ if (retval < 0)
+ goto out;
+
+ retval = search_binary_handler(&bprm, regs);
+ if (retval >= 0) {
+ /* execve success */
+ security_bprm_free(&bprm);
+ return retval;
+ }
+
+out:
+ /* Something went wrong, return the inode and free the argument pages*/
+ for (i = 0 ; i < MAX_ARG_PAGES ; i++) {
+ struct page * page = bprm.page[i];
+ if (page)
+ __free_page(page);
+ }
+
+ if (bprm.security)
+ security_bprm_free(&bprm);
+
+out_mm:
+ mmdrop(bprm.mm);
+
+out_file:
+ if (bprm.file) {
+ allow_write_access(bprm.file);
+ fput(bprm.file);
+ }
+ return retval;
+}
+
+/*
+ * sys_execve() executes a new program.
+ */
+asmlinkage int sys32_execve(nabi_no_regargs struct pt_regs regs)
+{
+ int error;
+ char * filename;
+
+ filename = getname((char *) (long)regs.regs[4]);
+ printk("Executing: %s\n", filename);
+ error = PTR_ERR(filename);
+ if (IS_ERR(filename))
+ goto out;
+ error = do_execve32(filename, (u32 *) (long)regs.regs[5],
+ (u32 *) (long)regs.regs[6], ®s);
+ putname(filename);
+
+out:
+ return error;
+}
+
+struct dirent32 {
+ unsigned int d_ino;
+ unsigned int d_off;
+ unsigned short d_reclen;
+ char d_name[NAME_MAX + 1];
+};
+
+static void
+xlate_dirent(void *dirent64, void *dirent32, long n)
+{
+ long off;
+ struct dirent *dirp;
+ struct dirent32 *dirp32;
+
+ off = 0;
+ while (off < n) {
+ dirp = (struct dirent *)(dirent64 + off);
+ dirp32 = (struct dirent32 *)(dirent32 + off);
+ off += dirp->d_reclen;
+ dirp32->d_ino = dirp->d_ino;
+ dirp32->d_off = (unsigned int)dirp->d_off;
+ dirp32->d_reclen = dirp->d_reclen;
+ strncpy(dirp32->d_name, dirp->d_name, dirp->d_reclen - ((3 * 4) + 2));
+ }
+ return;
+}
+
+asmlinkage long sys_getdents(unsigned int fd, void * dirent, unsigned int count);
+
+asmlinkage long
+sys32_getdents(unsigned int fd, void * dirent32, unsigned int count)
+{
+ long n;
+ void *dirent64;
+
+ dirent64 = (void *)((unsigned long)(dirent32 + (sizeof(long) - 1)) & ~(sizeof(long) - 1));
+ if ((n = sys_getdents(fd, dirent64, count - (dirent64 - dirent32))) < 0)
+ return(n);
+ xlate_dirent(dirent64, dirent32, n);
+ return(n);
+}
+
+asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count);
+
+asmlinkage int
+sys32_readdir(unsigned int fd, void * dirent32, unsigned int count)
+{
+ int n;
+ struct dirent dirent64;
+
+ if ((n = old_readdir(fd, &dirent64, count)) < 0)
+ return(n);
+ xlate_dirent(&dirent64, dirent32, dirent64.d_reclen);
+ return(n);
+}
+
+struct rusage32 {
+ struct compat_timeval ru_utime;
+ struct compat_timeval ru_stime;
+ int ru_maxrss;
+ int ru_ixrss;
+ int ru_idrss;
+ int ru_isrss;
+ int ru_minflt;
+ int ru_majflt;
+ int ru_nswap;
+ int ru_inblock;
+ int ru_oublock;
+ int ru_msgsnd;
+ int ru_msgrcv;
+ int ru_nsignals;
+ int ru_nvcsw;
+ int ru_nivcsw;
+};
+
+static int
+put_rusage (struct rusage32 *ru, struct rusage *r)
+{
+ int err;
+
+ if (verify_area(VERIFY_WRITE, ru, sizeof *ru))
+ return -EFAULT;
+
+ err = __put_user (r->ru_utime.tv_sec, &ru->ru_utime.tv_sec);
+ err |= __put_user (r->ru_utime.tv_usec, &ru->ru_utime.tv_usec);
+ err |= __put_user (r->ru_stime.tv_sec, &ru->ru_stime.tv_sec);
+ err |= __put_user (r->ru_stime.tv_usec, &ru->ru_stime.tv_usec);
+ err |= __put_user (r->ru_maxrss, &ru->ru_maxrss);
+ err |= __put_user (r->ru_ixrss, &ru->ru_ixrss);
+ err |= __put_user (r->ru_idrss, &ru->ru_idrss);
+ err |= __put_user (r->ru_isrss, &ru->ru_isrss);
+ err |= __put_user (r->ru_minflt, &ru->ru_minflt);
+ err |= __put_user (r->ru_majflt, &ru->ru_majflt);
+ err |= __put_user (r->ru_nswap, &ru->ru_nswap);
+ err |= __put_user (r->ru_inblock, &ru->ru_inblock);
+ err |= __put_user (r->ru_oublock, &ru->ru_oublock);
+ err |= __put_user (r->ru_msgsnd, &ru->ru_msgsnd);
+ err |= __put_user (r->ru_msgrcv, &ru->ru_msgrcv);
+ err |= __put_user (r->ru_nsignals, &ru->ru_nsignals);
+ err |= __put_user (r->ru_nvcsw, &ru->ru_nvcsw);
+ err |= __put_user (r->ru_nivcsw, &ru->ru_nivcsw);
+
+ return err;
+}
+
+asmlinkage int
+sys32_wait4(compat_pid_t pid, unsigned int * stat_addr, int options,
+ struct rusage32 * ru)
+{
+ if (!ru)
+ return sys_wait4(pid, stat_addr, options, NULL);
+ else {
+ struct rusage r;
+ int ret;
+ unsigned int status;
+ mm_segment_t old_fs = get_fs();
+
+ set_fs(KERNEL_DS);
+ ret = sys_wait4(pid, stat_addr ? &status : NULL, options, &r);
+ set_fs(old_fs);
+ if (put_rusage (ru, &r)) return -EFAULT;
+ if (stat_addr && put_user (status, stat_addr))
+ return -EFAULT;
+ return ret;
+ }
+}
+
+asmlinkage int
+sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options)
+{
+ return sys32_wait4(pid, stat_addr, options, NULL);
+}
+
+struct sysinfo32 {
+ s32 uptime;
+ u32 loads[3];
+ u32 totalram;
+ u32 freeram;
+ u32 sharedram;
+ u32 bufferram;
+ u32 totalswap;
+ u32 freeswap;
+ u16 procs;
+ u32 totalhigh;
+ u32 freehigh;
+ u32 mem_unit;
+ char _f[8];
+};
+
+extern asmlinkage int sys_sysinfo(struct sysinfo *info);
+
+asmlinkage int sys32_sysinfo(struct sysinfo32 *info)
+{
+ struct sysinfo s;
+ int ret, err;
+ mm_segment_t old_fs = get_fs ();
+
+ set_fs (KERNEL_DS);
+ ret = sys_sysinfo(&s);
+ set_fs (old_fs);
+ err = put_user (s.uptime, &info->uptime);
+ err |= __put_user (s.loads[0], &info->loads[0]);
+ err |= __put_user (s.loads[1], &info->loads[1]);
+ err |= __put_user (s.loads[2], &info->loads[2]);
+ err |= __put_user (s.totalram, &info->totalram);
+ err |= __put_user (s.freeram, &info->freeram);
+ err |= __put_user (s.sharedram, &info->sharedram);
+ err |= __put_user (s.bufferram, &info->bufferram);
+ err |= __put_user (s.totalswap, &info->totalswap);
+ err |= __put_user (s.freeswap, &info->freeswap);
+ err |= __put_user (s.procs, &info->procs);
+ err |= __put_user (s.totalhigh, &info->totalhigh);
+ err |= __put_user (s.freehigh, &info->freehigh);
+ err |= __put_user (s.mem_unit, &info->mem_unit);
+ if (err)
+ return -EFAULT;
+ return ret;
+}
+
+#define RLIM_INFINITY32 0x7fffffff
+#define RESOURCE32(x) ((x > RLIM_INFINITY32) ? RLIM_INFINITY32 : x)
+
+struct rlimit32 {
+ int rlim_cur;
+ int rlim_max;
+};
+
+#ifdef __MIPSEB__
+asmlinkage long sys32_truncate64(const char * path, unsigned long __dummy,
+ int length_hi, int length_lo)
+#endif
+#ifdef __MIPSEL__
+asmlinkage long sys32_truncate64(const char * path, unsigned long __dummy,
+ int length_lo, int length_hi)
+#endif
+{
+ loff_t length;
+
+ length = ((unsigned long) length_hi << 32) | (unsigned int) length_lo;
+
+ return sys_truncate(path, length);
+}
+
+#ifdef __MIPSEB__
+asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy,
+ int length_hi, int length_lo)
+#endif
+#ifdef __MIPSEL__
+asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy,
+ int length_lo, int length_hi)
+#endif
+{
+ loff_t length;
+
+ length = ((unsigned long) length_hi << 32) | (unsigned int) length_lo;
+
+ return sys_ftruncate(fd, length);
+}
+
+static inline long
+get_tv32(struct timeval *o, struct compat_timeval *i)
+{
+ return (!access_ok(VERIFY_READ, i, sizeof(*i)) ||
+ (__get_user(o->tv_sec, &i->tv_sec) |
+ __get_user(o->tv_usec, &i->tv_usec)));
+}
+
+static inline long
+put_tv32(struct compat_timeval *o, struct timeval *i)
+{
+ return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
+ (__put_user(i->tv_sec, &o->tv_sec) |
+ __put_user(i->tv_usec, &o->tv_usec)));
+}
+
+extern struct timezone sys_tz;
+
+asmlinkage int
+sys32_gettimeofday(struct compat_timeval *tv, struct timezone *tz)
+{
+ if (tv) {
+ struct timeval ktv;
+ do_gettimeofday(&ktv);
+ if (put_tv32(tv, &ktv))
+ return -EFAULT;
+ }
+ if (tz) {
+ if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static inline long get_ts32(struct timespec *o, struct compat_timeval *i)
+{
+ long usec;
+
+ if (!access_ok(VERIFY_READ, i, sizeof(*i)))
+ return -EFAULT;
+ if (__get_user(o->tv_sec, &i->tv_sec))
+ return -EFAULT;
+ if (__get_user(usec, &i->tv_usec))
+ return -EFAULT;
+ o->tv_nsec = usec * 1000;
+ return 0;
+}
+
+asmlinkage int
+sys32_settimeofday(struct compat_timeval *tv, struct timezone *tz)
+{
+ struct timespec kts;
+ struct timezone ktz;
+
+ if (tv) {
+ if (get_ts32(&kts, tv))
+ return -EFAULT;
+ }
+ if (tz) {
+ if (copy_from_user(&ktz, tz, sizeof(ktz)))
+ return -EFAULT;
+ }
+
+ return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
+}
+
+extern asmlinkage long sys_llseek(unsigned int fd, unsigned long offset_high,
+ unsigned long offset_low, loff_t * result,
+ unsigned int origin);
+
+asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high,
+ unsigned int offset_low, loff_t * result,
+ unsigned int origin)
+{
+ return sys_llseek(fd, offset_high, offset_low, result, origin);
+}
+
+typedef ssize_t (*IO_fn_t)(struct file *, char *, size_t, loff_t *);
+
+static long
+do_readv_writev32(int type, struct file *file, const struct compat_iovec *vector,
+ u32 count)
+{
+ unsigned long tot_len;
+ struct iovec iovstack[UIO_FASTIOV];
+ struct iovec *iov=iovstack, *ivp;
+ struct inode *inode;
+ long retval, i;
+ IO_fn_t fn;
+
+ /* First get the "struct iovec" from user memory and
+ * verify all the pointers
+ */
+ if (!count)
+ return 0;
+ if(verify_area(VERIFY_READ, vector, sizeof(struct compat_iovec)*count))
+ return -EFAULT;
+ if (count > UIO_MAXIOV)
+ return -EINVAL;
+ if (count > UIO_FASTIOV) {
+ iov = kmalloc(count*sizeof(struct iovec), GFP_KERNEL);
+ if (!iov)
+ return -ENOMEM;
+ }
+
+ tot_len = 0;
+ i = count;
+ ivp = iov;
+ while (i > 0) {
+ u32 len;
+ u32 buf;
+
+ __get_user(len, &vector->iov_len);
+ __get_user(buf, &vector->iov_base);
+ tot_len += len;
+ ivp->iov_base = (void *)A(buf);
+ ivp->iov_len = (__kernel_size_t) len;
+ vector++;
+ ivp++;
+ i--;
+ }
+
+ inode = file->f_dentry->d_inode;
+ /* VERIFY_WRITE actually means a read, as we write to user space */
+ retval = locks_verify_area((type == VERIFY_WRITE
+ ? FLOCK_VERIFY_READ : FLOCK_VERIFY_WRITE),
+ inode, file, file->f_pos, tot_len);
+ if (retval) {
+ if (iov != iovstack)
+ kfree(iov);
+ return retval;
+ }
+
+ /* Then do the actual IO. Note that sockets need to be handled
+ * specially as they have atomicity guarantees and can handle
+ * iovec's natively
+ */
+ if (inode->i_sock) {
+ int err;
+ err = sock_readv_writev(type, inode, file, iov, count, tot_len);
+ if (iov != iovstack)
+ kfree(iov);
+ return err;
+ }
+
+ if (!file->f_op) {
+ if (iov != iovstack)
+ kfree(iov);
+ return -EINVAL;
+ }
+ /* VERIFY_WRITE actually means a read, as we write to user space */
+ fn = file->f_op->read;
+ if (type == VERIFY_READ)
+ fn = (IO_fn_t) file->f_op->write;
+ ivp = iov;
+ while (count > 0) {
+ void * base;
+ int len, nr;
+
+ base = ivp->iov_base;
+ len = ivp->iov_len;
+ ivp++;
+ count--;
+ nr = fn(file, base, len, &file->f_pos);
+ if (nr < 0) {
+ if (retval)
+ break;
+ retval = nr;
+ break;
+ }
+ retval += nr;
+ if (nr != len)
+ break;
+ }
+ if (iov != iovstack)
+ kfree(iov);
+
+ return retval;
+}
+
+asmlinkage long
+sys32_readv(int fd, struct compat_iovec *vector, u32 count)
+{
+ struct file *file;
+ ssize_t ret;
+
+ ret = -EBADF;
+ file = fget(fd);
+ if (!file)
+ goto bad_file;
+ if (file->f_op && (file->f_mode & FMODE_READ) &&
+ (file->f_op->readv || file->f_op->read))
+ ret = do_readv_writev32(VERIFY_WRITE, file, vector, count);
+
+ fput(file);
+
+bad_file:
+ return ret;
+}
+
+asmlinkage long
+sys32_writev(int fd, struct compat_iovec *vector, u32 count)
+{
+ struct file *file;
+ ssize_t ret;
+
+ ret = -EBADF;
+ file = fget(fd);
+ if(!file)
+ goto bad_file;
+ if (file->f_op && (file->f_mode & FMODE_WRITE) &&
+ (file->f_op->writev || file->f_op->write))
+ ret = do_readv_writev32(VERIFY_READ, file, vector, count);
+ fput(file);
+
+bad_file:
+ return ret;
+}
+
+/* From the Single Unix Spec: pread & pwrite act like lseek to pos + op +
+ lseek back to original location. They fail just like lseek does on
+ non-seekable files. */
+
+asmlinkage ssize_t sys32_pread(unsigned int fd, char * buf,
+ size_t count, u32 unused, u64 a4, u64 a5)
+{
+ ssize_t ret;
+ struct file * file;
+ ssize_t (*read)(struct file *, char *, size_t, loff_t *);
+ loff_t pos;
+
+ ret = -EBADF;
+ file = fget(fd);
+ if (!file)
+ goto bad_file;
+ if (!(file->f_mode & FMODE_READ))
+ goto out;
+ pos = merge_64(a4, a5);
+ ret = locks_verify_area(FLOCK_VERIFY_READ, file->f_dentry->d_inode,
+ file, pos, count);
+ if (ret)
+ goto out;
+ ret = -EINVAL;
+ if (!file->f_op || !(read = file->f_op->read))
+ goto out;
+ if (pos < 0)
+ goto out;
+ ret = read(file, buf, count, &pos);
+ if (ret > 0)
+ dnotify_parent(file->f_dentry, DN_ACCESS);
+out:
+ fput(file);
+bad_file:
+ return ret;
+}
+
+asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char * buf,
+ size_t count, u32 unused, u64 a4, u64 a5)
+{
+ ssize_t ret;
+ struct file * file;
+ ssize_t (*write)(struct file *, const char *, size_t, loff_t *);
+ loff_t pos;
+
+ ret = -EBADF;
+ file = fget(fd);
+ if (!file)
+ goto bad_file;
+ if (!(file->f_mode & FMODE_WRITE))
+ goto out;
+ pos = merge_64(a4, a5);
+ ret = locks_verify_area(FLOCK_VERIFY_WRITE, file->f_dentry->d_inode,
+ file, pos, count);
+ if (ret)
+ goto out;
+ ret = -EINVAL;
+ if (!file->f_op || !(write = file->f_op->write))
+ goto out;
+ if (pos < 0)
+ goto out;
+
+ ret = write(file, buf, count, &pos);
+ if (ret > 0)
+ dnotify_parent(file->f_dentry, DN_MODIFY);
+out:
+ fput(file);
+bad_file:
+ return ret;
+}
+/*
+ * Ooo, nasty. We need here to frob 32-bit unsigned longs to
+ * 64-bit unsigned longs.
+ */
+
+static inline int
+get_fd_set32(unsigned long n, unsigned long *fdset, u32 *ufdset)
+{
+ if (ufdset) {
+ unsigned long odd;
+
+ if (verify_area(VERIFY_WRITE, ufdset, n*sizeof(u32)))
+ return -EFAULT;
+
+ odd = n & 1UL;
+ n &= ~1UL;
+ while (n) {
+ unsigned long h, l;
+ __get_user(l, ufdset);
+ __get_user(h, ufdset+1);
+ ufdset += 2;
+ *fdset++ = h << 32 | l;
+ n -= 2;
+ }
+ if (odd)
+ __get_user(*fdset, ufdset);
+ } else {
+ /* Tricky, must clear full unsigned long in the
+ * kernel fdset at the end, this makes sure that
+ * actually happens.
+ */
+ memset(fdset, 0, ((n + 1) & ~1)*sizeof(u32));
+ }
+ return 0;
+}
+
+static inline void
+set_fd_set32(unsigned long n, u32 *ufdset, unsigned long *fdset)
+{
+ unsigned long odd;
+
+ if (!ufdset)
+ return;
+
+ odd = n & 1UL;
+ n &= ~1UL;
+ while (n) {
+ unsigned long h, l;
+ l = *fdset++;
+ h = l >> 32;
+ __put_user(l, ufdset);
+ __put_user(h, ufdset+1);
+ ufdset += 2;
+ n -= 2;
+ }
+ if (odd)
+ __put_user(*fdset, ufdset);
+}
+
+/*
+ * We can actually return ERESTARTSYS instead of EINTR, but I'd
+ * like to be certain this leads to no problems. So I return
+ * EINTR just for safety.
+ *
+ * Update: ERESTARTSYS breaks at least the xview clock binary, so
+ * I'm trying ERESTARTNOHAND which restart only when you want to.
+ */
+#define MAX_SELECT_SECONDS \
+ ((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1)
+
+asmlinkage int sys32_select(int n, u32 *inp, u32 *outp, u32 *exp, struct compat_timeval *tvp)
+{
+ fd_set_bits fds;
+ char *bits;
+ unsigned long nn;
+ long timeout;
+ int ret, size;
+
+ timeout = MAX_SCHEDULE_TIMEOUT;
+ if (tvp) {
+ time_t sec, usec;
+
+ if ((ret = verify_area(VERIFY_READ, tvp, sizeof(*tvp)))
+ || (ret = __get_user(sec, &tvp->tv_sec))
+ || (ret = __get_user(usec, &tvp->tv_usec)))
+ goto out_nofds;
+
+ ret = -EINVAL;
+ if(sec < 0 || usec < 0)
+ goto out_nofds;
+
+ if ((unsigned long) sec < MAX_SELECT_SECONDS) {
+ timeout = (usec + 1000000/HZ - 1) / (1000000/HZ);
+ timeout += sec * (unsigned long) HZ;
+ }
+ }
+
+ ret = -EINVAL;
+ if (n < 0)
+ goto out_nofds;
+ if (n > current->files->max_fdset)
+ n = current->files->max_fdset;
+
+ /*
+ * We need 6 bitmaps (in/out/ex for both incoming and outgoing),
+ * since we used fdset we need to allocate memory in units of
+ * long-words.
+ */
+ ret = -ENOMEM;
+ size = FDS_BYTES(n);
+ bits = kmalloc(6 * size, GFP_KERNEL);
+ if (!bits)
+ goto out_nofds;
+ fds.in = (unsigned long *) bits;
+ fds.out = (unsigned long *) (bits + size);
+ fds.ex = (unsigned long *) (bits + 2*size);
+ fds.res_in = (unsigned long *) (bits + 3*size);
+ fds.res_out = (unsigned long *) (bits + 4*size);
+ fds.res_ex = (unsigned long *) (bits + 5*size);
+
+ nn = (n + 8*sizeof(u32) - 1) / (8*sizeof(u32));
+ if ((ret = get_fd_set32(nn, fds.in, inp)) ||
+ (ret = get_fd_set32(nn, fds.out, outp)) ||
+ (ret = get_fd_set32(nn, fds.ex, exp)))
+ goto out;
+ zero_fd_set(n, fds.res_in);
+ zero_fd_set(n, fds.res_out);
+ zero_fd_set(n, fds.res_ex);
+
+ ret = do_select(n, &fds, &timeout);
+
+ if (tvp && !(current->personality & STICKY_TIMEOUTS)) {
+ time_t sec = 0, usec = 0;
+ if (timeout) {
+ sec = timeout / HZ;
+ usec = timeout % HZ;
+ usec *= (1000000/HZ);
+ }
+ put_user(sec, &tvp->tv_sec);
+ put_user(usec, &tvp->tv_usec);
+ }
+
+ if (ret < 0)
+ goto out;
+ if (!ret) {
+ ret = -ERESTARTNOHAND;
+ if (signal_pending(current))
+ goto out;
+ ret = 0;
+ }
+
+ set_fd_set32(nn, inp, fds.res_in);
+ set_fd_set32(nn, outp, fds.res_out);
+ set_fd_set32(nn, exp, fds.res_ex);
+
+out:
+ kfree(bits);
+out_nofds:
+ return ret;
+}
+
+
+
+extern asmlinkage int sys_sched_rr_get_interval(pid_t pid,
+ struct timespec *interval);
+
+asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
+ struct compat_timespec *interval)
+{
+ struct timespec t;
+ int ret;
+ mm_segment_t old_fs = get_fs ();
+
+ set_fs (KERNEL_DS);
+ ret = sys_sched_rr_get_interval(pid, &t);
+ set_fs (old_fs);
+ if (put_user (t.tv_sec, &interval->tv_sec) ||
+ __put_user (t.tv_nsec, &interval->tv_nsec))
+ return -EFAULT;
+ return ret;
+}
+
+struct msgbuf32 { s32 mtype; char mtext[1]; };
+
+struct ipc_perm32
+{
+ key_t key;
+ compat_uid_t uid;
+ compat_gid_t gid;
+ compat_uid_t cuid;
+ compat_gid_t cgid;
+ compat_mode_t mode;
+ unsigned short seq;
+};
+
+struct ipc64_perm32 {
+ key_t key;
+ compat_uid_t uid;
+ compat_gid_t gid;
+ compat_uid_t cuid;
+ compat_gid_t cgid;
+ compat_mode_t mode;
+ unsigned short seq;
+ unsigned short __pad1;
+ unsigned int __unused1;
+ unsigned int __unused2;
+};
+
+struct semid_ds32 {
+ struct ipc_perm32 sem_perm; /* permissions .. see ipc.h */
+ compat_time_t sem_otime; /* last semop time */
+ compat_time_t sem_ctime; /* last change time */
+ u32 sem_base; /* ptr to first semaphore in array */
+ u32 sem_pending; /* pending operations to be processed */
+ u32 sem_pending_last; /* last pending operation */
+ u32 undo; /* undo requests on this array */
+ unsigned short sem_nsems; /* no. of semaphores in array */
+};
+
+struct semid64_ds32 {
+ struct ipc64_perm32 sem_perm;
+ compat_time_t sem_otime;
+ compat_time_t sem_ctime;
+ unsigned int sem_nsems;
+ unsigned int __unused1;
+ unsigned int __unused2;
+};
+
+struct msqid_ds32
+{
+ struct ipc_perm32 msg_perm;
+ u32 msg_first;
+ u32 msg_last;
+ compat_time_t msg_stime;
+ compat_time_t msg_rtime;
+ compat_time_t msg_ctime;
+ u32 wwait;
+ u32 rwait;
+ unsigned short msg_cbytes;
+ unsigned short msg_qnum;
+ unsigned short msg_qbytes;
+ compat_ipc_pid_t msg_lspid;
+ compat_ipc_pid_t msg_lrpid;
+};
+
+struct msqid64_ds32 {
+ struct ipc64_perm32 msg_perm;
+ compat_time_t msg_stime;
+ unsigned int __unused1;
+ compat_time_t msg_rtime;
+ unsigned int __unused2;
+ compat_time_t msg_ctime;
+ unsigned int __unused3;
+ unsigned int msg_cbytes;
+ unsigned int msg_qnum;
+ unsigned int msg_qbytes;
+ compat_pid_t msg_lspid;
+ compat_pid_t msg_lrpid;
+ unsigned int __unused4;
+ unsigned int __unused5;
+};
+
+struct shmid_ds32 {
+ struct ipc_perm32 shm_perm;
+ int shm_segsz;
+ compat_time_t shm_atime;
+ compat_time_t shm_dtime;
+ compat_time_t shm_ctime;
+ compat_ipc_pid_t shm_cpid;
+ compat_ipc_pid_t shm_lpid;
+ unsigned short shm_nattch;
+};
+
+struct shmid64_ds32 {
+ struct ipc64_perm32 shm_perm;
+ compat_size_t shm_segsz;
+ compat_time_t shm_atime;
+ compat_time_t shm_dtime;
+ compat_time_t shm_ctime;
+ compat_pid_t shm_cpid;
+ compat_pid_t shm_lpid;
+ unsigned int shm_nattch;
+ unsigned int __unused1;
+ unsigned int __unused2;
+};
+
+struct ipc_kludge32 {
+ u32 msgp;
+ s32 msgtyp;
+};
+
+static int
+do_sys32_semctl(int first, int second, int third, void *uptr)
+{
+ union semun fourth;
+ u32 pad;
+ int err, err2;
+ struct semid64_ds s;
+ mm_segment_t old_fs;
+
+ if (!uptr)
+ return -EINVAL;
+ err = -EFAULT;
+ if (get_user (pad, (u32 *)uptr))
+ return err;
+ if ((third & ~IPC_64) == SETVAL)
+ fourth.val = (int)pad;
+ else
+ fourth.__pad = (void *)A(pad);
+ switch (third & ~IPC_64) {
+ case IPC_INFO:
+ case IPC_RMID:
+ case IPC_SET:
+ case SEM_INFO:
+ case GETVAL:
+ case GETPID:
+ case GETNCNT:
+ case GETZCNT:
+ case GETALL:
+ case SETVAL:
+ case SETALL:
+ err = sys_semctl (first, second, third, fourth);
+ break;
+
+ case IPC_STAT:
+ case SEM_STAT:
+ fourth.__pad = &s;
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_semctl (first, second, third, fourth);
+ set_fs (old_fs);
+
+ if (third & IPC_64) {
+ struct semid64_ds32 *usp64 = (struct semid64_ds32 *) A(pad);
+
+ if (!access_ok(VERIFY_WRITE, usp64, sizeof(*usp64))) {
+ err = -EFAULT;
+ break;
+ }
+ err2 = __put_user(s.sem_perm.key, &usp64->sem_perm.key);
+ err2 |= __put_user(s.sem_perm.uid, &usp64->sem_perm.uid);
+ err2 |= __put_user(s.sem_perm.gid, &usp64->sem_perm.gid);
+ err2 |= __put_user(s.sem_perm.cuid, &usp64->sem_perm.cuid);
+ err2 |= __put_user(s.sem_perm.cgid, &usp64->sem_perm.cgid);
+ err2 |= __put_user(s.sem_perm.mode, &usp64->sem_perm.mode);
+ err2 |= __put_user(s.sem_perm.seq, &usp64->sem_perm.seq);
+ err2 |= __put_user(s.sem_otime, &usp64->sem_otime);
+ err2 |= __put_user(s.sem_ctime, &usp64->sem_ctime);
+ err2 |= __put_user(s.sem_nsems, &usp64->sem_nsems);
+ } else {
+ struct semid_ds32 *usp32 = (struct semid_ds32 *) A(pad);
+
+ if (!access_ok(VERIFY_WRITE, usp32, sizeof(*usp32))) {
+ err = -EFAULT;
+ break;
+ }
+ err2 = __put_user(s.sem_perm.key, &usp32->sem_perm.key);
+ err2 |= __put_user(s.sem_perm.uid, &usp32->sem_perm.uid);
+ err2 |= __put_user(s.sem_perm.gid, &usp32->sem_perm.gid);
+ err2 |= __put_user(s.sem_perm.cuid, &usp32->sem_perm.cuid);
+ err2 |= __put_user(s.sem_perm.cgid, &usp32->sem_perm.cgid);
+ err2 |= __put_user(s.sem_perm.mode, &usp32->sem_perm.mode);
+ err2 |= __put_user(s.sem_perm.seq, &usp32->sem_perm.seq);
+ err2 |= __put_user(s.sem_otime, &usp32->sem_otime);
+ err2 |= __put_user(s.sem_ctime, &usp32->sem_ctime);
+ err2 |= __put_user(s.sem_nsems, &usp32->sem_nsems);
+ }
+ if (err2)
+ err = -EFAULT;
+ break;
+
+ default:
+ err = - EINVAL;
+ break;
+ }
+
+ return err;
+}
+
+static int
+do_sys32_msgsnd (int first, int second, int third, void *uptr)
+{
+ struct msgbuf32 *up = (struct msgbuf32 *)uptr;
+ struct msgbuf *p;
+ mm_segment_t old_fs;
+ int err;
+
+ if (second < 0)
+ return -EINVAL;
+ p = kmalloc (second + sizeof (struct msgbuf)
+ + 4, GFP_USER);
+ if (!p)
+ return -ENOMEM;
+ err = get_user (p->mtype, &up->mtype);
+ if (err)
+ goto out;
+ err |= __copy_from_user (p->mtext, &up->mtext, second);
+ if (err)
+ goto out;
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_msgsnd (first, p, second, third);
+ set_fs (old_fs);
+out:
+ kfree (p);
+
+ return err;
+}
+
+static int
+do_sys32_msgrcv (int first, int second, int msgtyp, int third,
+ int version, void *uptr)
+{
+ struct msgbuf32 *up;
+ struct msgbuf *p;
+ mm_segment_t old_fs;
+ int err;
+
+ if (!version) {
+ struct ipc_kludge32 *uipck = (struct ipc_kludge32 *)uptr;
+ struct ipc_kludge32 ipck;
+
+ err = -EINVAL;
+ if (!uptr)
+ goto out;
+ err = -EFAULT;
+ if (copy_from_user (&ipck, uipck, sizeof (struct ipc_kludge32)))
+ goto out;
+ uptr = (void *)AA(ipck.msgp);
+ msgtyp = ipck.msgtyp;
+ }
+
+ if (second < 0)
+ return -EINVAL;
+ err = -ENOMEM;
+ p = kmalloc (second + sizeof (struct msgbuf) + 4, GFP_USER);
+ if (!p)
+ goto out;
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_msgrcv (first, p, second + 4, msgtyp, third);
+ set_fs (old_fs);
+ if (err < 0)
+ goto free_then_out;
+ up = (struct msgbuf32 *)uptr;
+ if (put_user (p->mtype, &up->mtype) ||
+ __copy_to_user (&up->mtext, p->mtext, err))
+ err = -EFAULT;
+free_then_out:
+ kfree (p);
+out:
+ return err;
+}
+
+static int
+do_sys32_msgctl (int first, int second, void *uptr)
+{
+ int err = -EINVAL, err2;
+ struct msqid64_ds m;
+ struct msqid_ds32 *up32 = (struct msqid_ds32 *)uptr;
+ struct msqid64_ds32 *up64 = (struct msqid64_ds32 *)uptr;
+ mm_segment_t old_fs;
+
+ switch (second & ~IPC_64) {
+ case IPC_INFO:
+ case IPC_RMID:
+ case MSG_INFO:
+ err = sys_msgctl (first, second, (struct msqid_ds *)uptr);
+ break;
+
+ case IPC_SET:
+ if (second & IPC_64) {
+ if (!access_ok(VERIFY_READ, up64, sizeof(*up64))) {
+ err = -EFAULT;
+ break;
+ }
+ err = __get_user(m.msg_perm.uid, &up64->msg_perm.uid);
+ err |= __get_user(m.msg_perm.gid, &up64->msg_perm.gid);
+ err |= __get_user(m.msg_perm.mode, &up64->msg_perm.mode);
+ err |= __get_user(m.msg_qbytes, &up64->msg_qbytes);
+ } else {
+ if (!access_ok(VERIFY_READ, up32, sizeof(*up32))) {
+ err = -EFAULT;
+ break;
+ }
+ err = __get_user(m.msg_perm.uid, &up32->msg_perm.uid);
+ err |= __get_user(m.msg_perm.gid, &up32->msg_perm.gid);
+ err |= __get_user(m.msg_perm.mode, &up32->msg_perm.mode);
+ err |= __get_user(m.msg_qbytes, &up32->msg_qbytes);
+ }
+ if (err)
+ break;
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_msgctl (first, second, (struct msqid_ds *)&m);
+ set_fs (old_fs);
+ break;
+
+ case IPC_STAT:
+ case MSG_STAT:
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_msgctl (first, second, (struct msqid_ds *)&m);
+ set_fs (old_fs);
+ if (second & IPC_64) {
+ if (!access_ok(VERIFY_WRITE, up64, sizeof(*up64))) {
+ err = -EFAULT;
+ break;
+ }
+ err2 = __put_user(m.msg_perm.key, &up64->msg_perm.key);
+ err2 |= __put_user(m.msg_perm.uid, &up64->msg_perm.uid);
+ err2 |= __put_user(m.msg_perm.gid, &up64->msg_perm.gid);
+ err2 |= __put_user(m.msg_perm.cuid, &up64->msg_perm.cuid);
+ err2 |= __put_user(m.msg_perm.cgid, &up64->msg_perm.cgid);
+ err2 |= __put_user(m.msg_perm.mode, &up64->msg_perm.mode);
+ err2 |= __put_user(m.msg_perm.seq, &up64->msg_perm.seq);
+ err2 |= __put_user(m.msg_stime, &up64->msg_stime);
+ err2 |= __put_user(m.msg_rtime, &up64->msg_rtime);
+ err2 |= __put_user(m.msg_ctime, &up64->msg_ctime);
+ err2 |= __put_user(m.msg_cbytes, &up64->msg_cbytes);
+ err2 |= __put_user(m.msg_qnum, &up64->msg_qnum);
+ err2 |= __put_user(m.msg_qbytes, &up64->msg_qbytes);
+ err2 |= __put_user(m.msg_lspid, &up64->msg_lspid);
+ err2 |= __put_user(m.msg_lrpid, &up64->msg_lrpid);
+ if (err2)
+ err = -EFAULT;
+ } else {
+ if (!access_ok(VERIFY_WRITE, up32, sizeof(*up32))) {
+ err = -EFAULT;
+ break;
+ }
+ err2 = __put_user(m.msg_perm.key, &up32->msg_perm.key);
+ err2 |= __put_user(m.msg_perm.uid, &up32->msg_perm.uid);
+ err2 |= __put_user(m.msg_perm.gid, &up32->msg_perm.gid);
+ err2 |= __put_user(m.msg_perm.cuid, &up32->msg_perm.cuid);
+ err2 |= __put_user(m.msg_perm.cgid, &up32->msg_perm.cgid);
+ err2 |= __put_user(m.msg_perm.mode, &up32->msg_perm.mode);
+ err2 |= __put_user(m.msg_perm.seq, &up32->msg_perm.seq);
+ err2 |= __put_user(m.msg_stime, &up32->msg_stime);
+ err2 |= __put_user(m.msg_rtime, &up32->msg_rtime);
+ err2 |= __put_user(m.msg_ctime, &up32->msg_ctime);
+ err2 |= __put_user(m.msg_cbytes, &up32->msg_cbytes);
+ err2 |= __put_user(m.msg_qnum, &up32->msg_qnum);
+ err2 |= __put_user(m.msg_qbytes, &up32->msg_qbytes);
+ err2 |= __put_user(m.msg_lspid, &up32->msg_lspid);
+ err2 |= __put_user(m.msg_lrpid, &up32->msg_lrpid);
+ if (err2)
+ err = -EFAULT;
+ }
+ break;
+ }
+
+ return err;
+}
+
+static int
+do_sys32_shmat (int first, int second, int third, int version, void *uptr)
+{
+ unsigned long raddr;
+ u32 *uaddr = (u32 *)A((u32)third);
+ int err = -EINVAL;
+
+ if (version == 1)
+ return err;
+ if (version == 1)
+ return err;
+ err = sys_shmat (first, uptr, second, &raddr);
+ if (err)
+ return err;
+ err = put_user (raddr, uaddr);
+ return err;
+}
+
+static int
+do_sys32_shmctl (int first, int second, void *uptr)
+{
+ int err = -EFAULT, err2;
+ struct shmid_ds s;
+ struct shmid64_ds s64;
+ struct shmid_ds32 *up32 = (struct shmid_ds32 *)uptr;
+ struct shmid64_ds32 *up64 = (struct shmid64_ds32 *)uptr;
+ mm_segment_t old_fs;
+ struct shm_info32 {
+ int used_ids;
+ u32 shm_tot, shm_rss, shm_swp;
+ u32 swap_attempts, swap_successes;
+ } *uip = (struct shm_info32 *)uptr;
+ struct shm_info si;
+
+ switch (second & ~IPC_64) {
+ case IPC_INFO:
+ second = IPC_INFO; /* So that we don't have to translate it */
+ case IPC_RMID:
+ case SHM_LOCK:
+ case SHM_UNLOCK:
+ err = sys_shmctl (first, second, (struct shmid_ds *)uptr);
+ break;
+ case IPC_SET:
+ if (second & IPC_64) {
+ err = get_user(s.shm_perm.uid, &up64->shm_perm.uid);
+ err |= get_user(s.shm_perm.gid, &up64->shm_perm.gid);
+ err |= get_user(s.shm_perm.mode, &up64->shm_perm.mode);
+ } else {
+ err = get_user(s.shm_perm.uid, &up32->shm_perm.uid);
+ err |= get_user(s.shm_perm.gid, &up32->shm_perm.gid);
+ err |= get_user(s.shm_perm.mode, &up32->shm_perm.mode);
+ }
+ if (err)
+ break;
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_shmctl (first, second, &s);
+ set_fs (old_fs);
+ break;
+
+ case IPC_STAT:
+ case SHM_STAT:
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_shmctl (first, second, (void *) &s64);
+ set_fs (old_fs);
+ if (err < 0)
+ break;
+ if (second & IPC_64) {
+ if (!access_ok(VERIFY_WRITE, up64, sizeof(*up64))) {
+ err = -EFAULT;
+ break;
+ }
+ err2 = __put_user(s64.shm_perm.key, &up64->shm_perm.key);
+ err2 |= __put_user(s64.shm_perm.uid, &up64->shm_perm.uid);
+ err2 |= __put_user(s64.shm_perm.gid, &up64->shm_perm.gid);
+ err2 |= __put_user(s64.shm_perm.cuid, &up64->shm_perm.cuid);
+ err2 |= __put_user(s64.shm_perm.cgid, &up64->shm_perm.cgid);
+ err2 |= __put_user(s64.shm_perm.mode, &up64->shm_perm.mode);
+ err2 |= __put_user(s64.shm_perm.seq, &up64->shm_perm.seq);
+ err2 |= __put_user(s64.shm_atime, &up64->shm_atime);
+ err2 |= __put_user(s64.shm_dtime, &up64->shm_dtime);
+ err2 |= __put_user(s64.shm_ctime, &up64->shm_ctime);
+ err2 |= __put_user(s64.shm_segsz, &up64->shm_segsz);
+ err2 |= __put_user(s64.shm_nattch, &up64->shm_nattch);
+ err2 |= __put_user(s64.shm_cpid, &up64->shm_cpid);
+ err2 |= __put_user(s64.shm_lpid, &up64->shm_lpid);
+ } else {
+ if (!access_ok(VERIFY_WRITE, up32, sizeof(*up32))) {
+ err = -EFAULT;
+ break;
+ }
+ err2 = __put_user(s64.shm_perm.key, &up32->shm_perm.key);
+ err2 |= __put_user(s64.shm_perm.uid, &up32->shm_perm.uid);
+ err2 |= __put_user(s64.shm_perm.gid, &up32->shm_perm.gid);
+ err2 |= __put_user(s64.shm_perm.cuid, &up32->shm_perm.cuid);
+ err2 |= __put_user(s64.shm_perm.cgid, &up32->shm_perm.cgid);
+ err2 |= __put_user(s64.shm_perm.mode, &up32->shm_perm.mode);
+ err2 |= __put_user(s64.shm_perm.seq, &up32->shm_perm.seq);
+ err2 |= __put_user(s64.shm_atime, &up32->shm_atime);
+ err2 |= __put_user(s64.shm_dtime, &up32->shm_dtime);
+ err2 |= __put_user(s64.shm_ctime, &up32->shm_ctime);
+ err2 |= __put_user(s64.shm_segsz, &up32->shm_segsz);
+ err2 |= __put_user(s64.shm_nattch, &up32->shm_nattch);
+ err2 |= __put_user(s64.shm_cpid, &up32->shm_cpid);
+ err2 |= __put_user(s64.shm_lpid, &up32->shm_lpid);
+ }
+ if (err2)
+ err = -EFAULT;
+ break;
+
+ case SHM_INFO:
+ old_fs = get_fs ();
+ set_fs (KERNEL_DS);
+ err = sys_shmctl (first, second, (void *)&si);
+ set_fs (old_fs);
+ if (err < 0)
+ break;
+ err2 = put_user (si.used_ids, &uip->used_ids);
+ err2 |= __put_user (si.shm_tot, &uip->shm_tot);
+ err2 |= __put_user (si.shm_rss, &uip->shm_rss);
+ err2 |= __put_user (si.shm_swp, &uip->shm_swp);
+ err2 |= __put_user (si.swap_attempts,
+ &uip->swap_attempts);
+ err2 |= __put_user (si.swap_successes,
+ &uip->swap_successes);
+ if (err2)
+ err = -EFAULT;
+ break;
+
+ default:
+ err = -ENOSYS;
+ break;
+ }
+
+ return err;
+}
+
+asmlinkage long
+sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
+{
+ int version, err;
+
+ version = call >> 16; /* hack for backward compatibility */
+ call &= 0xffff;
+
+ switch (call) {
+
+ case SEMOP:
+ /* struct sembuf is the same on 32 and 64bit :)) */
+ err = sys_semop (first, (struct sembuf *)AA(ptr),
+ second);
+ break;
+ case SEMGET:
+ err = sys_semget (first, second, third);
+ break;
+ case SEMCTL:
+ err = do_sys32_semctl (first, second, third,
+ (void *)AA(ptr));
+ break;
+
+ case MSGSND:
+ err = do_sys32_msgsnd (first, second, third,
+ (void *)AA(ptr));
+ break;
+ case MSGRCV:
+ err = do_sys32_msgrcv (first, second, fifth, third,
+ version, (void *)AA(ptr));
+ break;
+ case MSGGET:
+ err = sys_msgget ((key_t) first, second);
+ break;
+ case MSGCTL:
+ err = do_sys32_msgctl (first, second, (void *)AA(ptr));
+ break;
+
+ case SHMAT:
+ err = do_sys32_shmat (first, second, third,
+ version, (void *)AA(ptr));
+ break;
+ case SHMDT:
+ err = sys_shmdt ((char *)A(ptr));
+ break;
+ case SHMGET:
+ err = sys_shmget (first, second, third);
+ break;
+ case SHMCTL:
+ err = do_sys32_shmctl (first, second, (void *)AA(ptr));
+ break;
+ default:
+ err = -EINVAL;
+ break;
+ }
+
+ return err;
+}
+
+struct sysctl_args32
+{
+ compat_caddr_t name;
+ int nlen;
+ compat_caddr_t oldval;
+ compat_caddr_t oldlenp;
+ compat_caddr_t newval;
+ compat_size_t newlen;
+ unsigned int __unused[4];
+};
+
+#ifdef CONFIG_SYSCTL
+
+asmlinkage long sys32_sysctl(struct sysctl_args32 *args)
+{
+ struct sysctl_args32 tmp;
+ int error;
+ size_t oldlen, *oldlenp = NULL;
+ unsigned long addr = (((long)&args->__unused[0]) + 7) & ~7;
+
+ if (copy_from_user(&tmp, args, sizeof(tmp)))
+ return -EFAULT;
+
+ if (tmp.oldval && tmp.oldlenp) {
+ /* Duh, this is ugly and might not work if sysctl_args
+ is in read-only memory, but do_sysctl does indirectly
+ a lot of uaccess in both directions and we'd have to
+ basically copy the whole sysctl.c here, and
+ glibc's __sysctl uses rw memory for the structure
+ anyway. */
+ if (get_user(oldlen, (u32 *)A(tmp.oldlenp)) ||
+ put_user(oldlen, (size_t *)addr))
+ return -EFAULT;
+ oldlenp = (size_t *)addr;
+ }
+
+ lock_kernel();
+ error = do_sysctl((int *)A(tmp.name), tmp.nlen, (void *)A(tmp.oldval),
+ oldlenp, (void *)A(tmp.newval), tmp.newlen);
+ unlock_kernel();
+ if (oldlenp) {
+ if (!error) {
+ if (get_user(oldlen, (size_t *)addr) ||
+ put_user(oldlen, (u32 *)A(tmp.oldlenp)))
+ error = -EFAULT;
+ }
+ copy_to_user(args->__unused, tmp.__unused, sizeof(tmp.__unused));
+ }
+ return error;
+}
+
+#else /* CONFIG_SYSCTL */
+
+asmlinkage long sys32_sysctl(struct sysctl_args32 *args)
+{
+ return -ENOSYS;
+}
+
+#endif /* CONFIG_SYSCTL */
+
+extern asmlinkage int sys_sched_setaffinity(pid_t pid, unsigned int len,
+ unsigned long *user_mask_ptr);
+
+asmlinkage int sys32_sched_setaffinity(compat_pid_t pid, unsigned int len,
+ u32 *user_mask_ptr)
+{
+ unsigned long kernel_mask;
+ mm_segment_t old_fs;
+ int ret;
+
+ if (get_user(kernel_mask, user_mask_ptr))
+ return -EFAULT;
+
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ ret = sys_sched_setaffinity(pid,
+ /* XXX Nice api... */
+ sizeof(kernel_mask),
+ &kernel_mask);
+ set_fs(old_fs);
+
+ return ret;
+}
+
+extern asmlinkage int sys_sched_getaffinity(pid_t pid, unsigned int len,
+ unsigned long *user_mask_ptr);
+
+asmlinkage int sys32_sched_getaffinity(compat_pid_t pid, unsigned int len,
+ u32 *user_mask_ptr)
+{
+ unsigned long kernel_mask;
+ mm_segment_t old_fs;
+ int ret;
+
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ ret = sys_sched_getaffinity(pid,
+ /* XXX Nice api... */
+ sizeof(kernel_mask),
+ &kernel_mask);
+ set_fs(old_fs);
+
+ if (ret == 0) {
+ if (put_user(kernel_mask, user_mask_ptr))
+ ret = -EFAULT;
+ }
+
+ return ret;
+}
+
+asmlinkage long sys32_newuname(struct new_utsname * name)
+{
+ int ret = 0;
+
+ down_read(&uts_sem);
+ if (copy_to_user(name,&system_utsname,sizeof *name))
+ ret = -EFAULT;
+ up_read(&uts_sem);
+
+ if (current->personality == PER_LINUX32 && !ret)
+ if (copy_to_user(name->machine, "mips\0\0\0", 8))
+ ret = -EFAULT;
+
+ return ret;
+}
+
+extern asmlinkage long sys_personality(unsigned long);
+
+asmlinkage int sys32_personality(unsigned long personality)
+{
+ int ret;
+ if (current->personality == PER_LINUX32 && personality == PER_LINUX)
+ personality = PER_LINUX32;
+ ret = sys_personality(personality);
+ if (ret == PER_LINUX32)
+ ret = PER_LINUX;
+ return ret;
+}
+
+/* Handle adjtimex compatibility. */
+
+struct timex32 {
+ u32 modes;
+ s32 offset, freq, maxerror, esterror;
+ s32 status, constant, precision, tolerance;
+ struct compat_timeval time;
+ s32 tick;
+ s32 ppsfreq, jitter, shift, stabil;
+ s32 jitcnt, calcnt, errcnt, stbcnt;
+ s32 :32; s32 :32; s32 :32; s32 :32;
+ s32 :32; s32 :32; s32 :32; s32 :32;
+ s32 :32; s32 :32; s32 :32; s32 :32;
+};
+
+extern int do_adjtimex(struct timex *);
+
+asmlinkage int sys32_adjtimex(struct timex32 *utp)
+{
+ struct timex txc;
+ int ret;
+
+ memset(&txc, 0, sizeof(struct timex));
+
+ if (get_user(txc.modes, &utp->modes) ||
+ __get_user(txc.offset, &utp->offset) ||
+ __get_user(txc.freq, &utp->freq) ||
+ __get_user(txc.maxerror, &utp->maxerror) ||
+ __get_user(txc.esterror, &utp->esterror) ||
+ __get_user(txc.status, &utp->status) ||
+ __get_user(txc.constant, &utp->constant) ||
+ __get_user(txc.precision, &utp->precision) ||
+ __get_user(txc.tolerance, &utp->tolerance) ||
+ __get_user(txc.time.tv_sec, &utp->time.tv_sec) ||
+ __get_user(txc.time.tv_usec, &utp->time.tv_usec) ||
+ __get_user(txc.tick, &utp->tick) ||
+ __get_user(txc.ppsfreq, &utp->ppsfreq) ||
+ __get_user(txc.jitter, &utp->jitter) ||
+ __get_user(txc.shift, &utp->shift) ||
+ __get_user(txc.stabil, &utp->stabil) ||
+ __get_user(txc.jitcnt, &utp->jitcnt) ||
+ __get_user(txc.calcnt, &utp->calcnt) ||
+ __get_user(txc.errcnt, &utp->errcnt) ||
+ __get_user(txc.stbcnt, &utp->stbcnt))
+ return -EFAULT;
+
+ ret = do_adjtimex(&txc);
+
+ if (put_user(txc.modes, &utp->modes) ||
+ __put_user(txc.offset, &utp->offset) ||
+ __put_user(txc.freq, &utp->freq) ||
+ __put_user(txc.maxerror, &utp->maxerror) ||
+ __put_user(txc.esterror, &utp->esterror) ||
+ __put_user(txc.status, &utp->status) ||
+ __put_user(txc.constant, &utp->constant) ||
+ __put_user(txc.precision, &utp->precision) ||
+ __put_user(txc.tolerance, &utp->tolerance) ||
+ __put_user(txc.time.tv_sec, &utp->time.tv_sec) ||
+ __put_user(txc.time.tv_usec, &utp->time.tv_usec) ||
+ __put_user(txc.tick, &utp->tick) ||
+ __put_user(txc.ppsfreq, &utp->ppsfreq) ||
+ __put_user(txc.jitter, &utp->jitter) ||
+ __put_user(txc.shift, &utp->shift) ||
+ __put_user(txc.stabil, &utp->stabil) ||
+ __put_user(txc.jitcnt, &utp->jitcnt) ||
+ __put_user(txc.calcnt, &utp->calcnt) ||
+ __put_user(txc.errcnt, &utp->errcnt) ||
+ __put_user(txc.stbcnt, &utp->stbcnt))
+ ret = -EFAULT;
+
+ return ret;
+}
+
+extern asmlinkage ssize_t sys_sendfile(int out_fd, int in_fd, off_t *offset, size_t count);
+
+asmlinkage int sys32_sendfile(int out_fd, int in_fd, compat_off_t *offset,
+ s32 count)
+{
+ mm_segment_t old_fs = get_fs();
+ int ret;
+ off_t of;
+
+ if (offset && get_user(of, offset))
+ return -EFAULT;
+
+ set_fs(KERNEL_DS);
+ ret = sys_sendfile(out_fd, in_fd, offset ? &of : NULL, count);
+ set_fs(old_fs);
+
+ if (offset && put_user(of, offset))
+ return -EFAULT;
+
+ return ret;
+}
+
+asmlinkage ssize_t sys_readahead(int fd, loff_t offset, size_t count);
+
+asmlinkage ssize_t sys32_readahead(int fd, u32 pad0, u64 a2, u64 a3,
+ size_t count)
+{
+ return sys_readahead(fd, merge_64(a2, a3), count);
+}
+
+asmlinkage long compat_sys_utimes(char __user * filename,
+ struct compat_timeval __user * utimes)
+{
+ struct timeval times[2];
+
+ if (utimes) {
+ if (verify_area(VERIFY_READ, utimes, 2 * sizeof(*utimes)))
+ return -EFAULT;
+
+ if (__get_user(times[0].tv_sec, &utimes[0].tv_sec) |
+ __get_user(times[0].tv_usec, &utimes[0].tv_usec) |
+ __get_user(times[1].tv_sec, &utimes[1].tv_sec) |
+ __get_user(times[1].tv_usec, &utimes[1].tv_usec))
+ return -EFAULT;
+ }
+
+ return do_utimes(filename, utimes ? times : NULL);
+}
diff -Nru a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
--- a/arch/mips/kernel/mips_ksyms.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/kernel/mips_ksyms.c Sun Aug 3 13:14:46 2003
@@ -5,7 +5,8 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 1998, 2000, 2001 by Ralf Baechle
+ * Copyright (C) 1996, 97, 98, 99, 2000, 01, 03 by Ralf Baechle
+ * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc.
*/
#include <linux/config.h>
#include <linux/module.h>
@@ -41,6 +42,7 @@
extern long __strnlen_user_asm(const char *s);
EXPORT_SYMBOL(mips_machtype);
+
#ifdef CONFIG_EISA
EXPORT_SYMBOL(EISA_bus);
#endif
@@ -91,10 +93,6 @@
*/
#include <asm/branch.h>
#include <linux/sched.h>
-
-#ifdef CONFIG_VT
-EXPORT_SYMBOL(screen_info);
-#endif
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
EXPORT_SYMBOL(ide_ops);
diff -Nru a/arch/mips/kernel/module-elf32.c b/arch/mips/kernel/module-elf32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/module-elf32.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,242 @@
+/* Kernel module help for MIPS.
+ Copyright (C) 2001 Rusty Russell.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+#include <linux/moduleloader.h>
+#include <linux/elf.h>
+#include <linux/vmalloc.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+struct mips_hi16 {
+ struct mips_hi16 *next;
+ Elf32_Addr *addr;
+ Elf32_Addr value;
+};
+
+static struct mips_hi16 *mips_hi16_list;
+
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt , ...)
+#endif
+
+void *module_alloc(unsigned long size)
+{
+ if (size == 0)
+ return NULL;
+ return vmalloc(size);
+}
+
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+ vfree(module_region);
+ /* FIXME: If module_region == mod->init_region, trim exception
+ table entries. */
+}
+
+/* We don't need anything special. */
+long module_core_size(const Elf32_Ehdr *hdr,
+ const Elf32_Shdr *sechdrs,
+ const char *secstrings,
+ struct module *module)
+{
+ return module->core_size;
+}
+
+long module_init_size(const Elf32_Ehdr *hdr,
+ const Elf32_Shdr *sechdrs,
+ const char *secstrings,
+ struct module *module)
+{
+ return module->init_size;
+}
+
+int module_frob_arch_sections(Elf_Ehdr *hdr,
+ Elf_Shdr *sechdrs,
+ char *secstrings,
+ struct module *mod)
+{
+ return 0;
+}
+
+int apply_relocate(Elf32_Shdr *sechdrs,
+ const char *strtab,
+ unsigned int symindex,
+ unsigned int relsec,
+ struct module *me)
+{
+ unsigned int i;
+ Elf32_Rel *rel = (void *)sechdrs[relsec].sh_offset;
+ Elf32_Sym *sym;
+ uint32_t *location;
+ Elf32_Addr v;
+
+ DEBUGP("Applying relocate section %u to %u\n", relsec,
+ sechdrs[relsec].sh_info);
+ for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+ /* This is where to make the change */
+ location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_offset
+ + rel[i].r_offset;
+ /* This is the symbol it is referring to */
+ sym = (Elf32_Sym *)sechdrs[symindex].sh_offset
+ + ELF32_R_SYM(rel[i].r_info);
+ if (!sym->st_value) {
+ printk(KERN_WARNING "%s: Unknown symbol %s\n",
+ me->name, strtab + sym->st_name);
+ return -ENOENT;
+ }
+
+ v = sym->st_value;
+
+ switch (ELF32_R_TYPE(rel[i].r_info)) {
+ case R_MIPS_NONE:
+ break;
+
+ case R_MIPS_32:
+ *location += v;
+ break;
+
+ case R_MIPS_26:
+ if (v % 4)
+ printk(KERN_ERR
+ "module %s: dangerous relocation\n",
+ me->name);
+ return -ENOEXEC;
+ if ((v & 0xf0000000) !=
+ (((unsigned long)location + 4) & 0xf0000000))
+ printk(KERN_ERR
+ "module %s: relocation overflow\n",
+ me->name);
+ return -ENOEXEC;
+ *location = (*location & ~0x03ffffff) |
+ ((*location + (v >> 2)) & 0x03ffffff);
+ break;
+
+ case R_MIPS_HI16: {
+ struct mips_hi16 *n;
+
+ /*
+ * We cannot relocate this one now because we don't
+ * know the value of the carry we need to add. Save
+ * the information, and let LO16 do the actual
+ * relocation.
+ */
+ n = (struct mips_hi16 *) kmalloc(sizeof *n, GFP_KERNEL);
+ n->addr = location;
+ n->value = v;
+ n->next = mips_hi16_list;
+ mips_hi16_list = n;
+ break;
+ }
+
+ case R_MIPS_LO16: {
+ unsigned long insnlo = *location;
+ Elf32_Addr val, vallo;
+
+ /* Sign extend the addend we extract from the lo insn. */
+ vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
+
+ if (mips_hi16_list != NULL) {
+ struct mips_hi16 *l;
+
+ l = mips_hi16_list;
+ while (l != NULL) {
+ struct mips_hi16 *next;
+ unsigned long insn;
+
+ /*
+ * The value for the HI16 had best be
+ * the same.
+ */
+ printk(KERN_ERR "module %s: dangerous "
+ "relocation\n", me->name);
+ return -ENOEXEC;
+
+ /*
+ * Do the HI16 relocation. Note that
+ * we actually don't need to know
+ * anything about the LO16 itself,
+ * except where to find the low 16 bits
+ * of the addend needed by the LO16.
+ */
+ insn = *l->addr;
+ val = ((insn & 0xffff) << 16) + vallo;
+ val += v;
+
+ /*
+ * Account for the sign extension that
+ * will happen in the low bits.
+ */
+ val = ((val >> 16) + ((val & 0x8000) !=
+ 0)) & 0xffff;
+
+ insn = (insn & ~0xffff) | val;
+ *l->addr = insn;
+
+ next = l->next;
+ kfree(l);
+ l = next;
+ }
+
+ mips_hi16_list = NULL;
+ }
+
+ /*
+ * Ok, we're done with the HI16 relocs. Now deal with
+ * the LO16.
+ */
+ val = v + vallo;
+ insnlo = (insnlo & ~0xffff) | (val & 0xffff);
+ *location = insnlo;
+ break;
+ }
+
+ default:
+ printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+ me->name, ELF32_R_TYPE(rel[i].r_info));
+ return -ENOEXEC;
+ }
+ }
+ return 0;
+}
+
+int apply_relocate_add(Elf32_Shdr *sechdrs,
+ const char *strtab,
+ unsigned int symindex,
+ unsigned int relsec,
+ struct module *me)
+{
+ printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
+ me->name);
+ return -ENOEXEC;
+}
+
+int module_finalize(const Elf_Ehdr *hdr,
+ const Elf_Shdr *sechdrs,
+ struct module *me)
+{
+ return 0;
+}
+
+void module_arch_cleanup(struct module *mod)
+{
+}
diff -Nru a/arch/mips/kernel/module-elf64.c b/arch/mips/kernel/module-elf64.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/module-elf64.c Sun Aug 3 13:14:50 2003
@@ -0,0 +1,349 @@
+/* Kernel module help for MIPS.
+ Copyright (C) 2001 Rusty Russell.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+#include <linux/moduleloader.h>
+#include <linux/elf.h>
+#include <linux/vmalloc.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+
+struct mips_hi16 {
+ struct mips_hi16 *next;
+ Elf32_Addr *addr;
+ Elf32_Addr value;
+};
+
+static struct mips_hi16 *mips_hi16_list;
+
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt , ...)
+#endif
+
+static struct vm_struct * modvmlist = NULL;
+
+void module_unmap(void * addr)
+{
+ struct vm_struct **p, *tmp;
+ int i;
+
+ if (!addr)
+ return;
+ if ((PAGE_SIZE-1) & (unsigned long) addr) {
+ printk("Trying to unmap module with bad address (%p)\n", addr);
+ return;
+ }
+
+ for (p = &modvmlist ; (tmp = *p) ; p = &tmp->next) {
+ if (tmp->addr == addr) {
+ *p = tmp->next;
+ goto found;
+ }
+ }
+ printk("Trying to unmap nonexistent module vm area (%p)\n", addr);
+ return;
+
+found:
+ unmap_vm_area(tmp);
+
+ for (i = 0; i < tmp->nr_pages; i++) {
+ if (unlikely(!tmp->pages[i]))
+ BUG();
+ __free_page(tmp->pages[i]);
+ }
+
+ kfree(tmp->pages);
+ kfree(tmp);
+}
+
+#define MODULES_LEN (512*1024*1024) /* Random silly large number */
+#define MODULES_END (512*1024*1024) /* Random silly large number */
+#define MODULES_VADDR (512*1024*1024) /* Random silly large number */
+
+void *module_map(unsigned long size)
+{
+ struct vm_struct **p, *tmp, *area;
+ struct page **pages;
+ void * addr;
+ unsigned int nr_pages, array_size, i;
+
+ size = PAGE_ALIGN(size);
+ if (!size || size > MODULES_LEN)
+ return NULL;
+
+ addr = (void *) MODULES_VADDR;
+ for (p = &modvmlist; (tmp = *p) ; p = &tmp->next) {
+ if (size + (unsigned long) addr < (unsigned long) tmp->addr)
+ break;
+ addr = (void *) (tmp->size + (unsigned long) tmp->addr);
+ }
+ if ((unsigned long) addr + size >= MODULES_END)
+ return NULL;
+
+ area = (struct vm_struct *) kmalloc(sizeof(*area), GFP_KERNEL);
+ if (!area)
+ return NULL;
+ area->size = size + PAGE_SIZE;
+ area->addr = addr;
+ area->next = *p;
+ area->pages = NULL;
+ area->nr_pages = 0;
+ area->phys_addr = 0;
+ *p = area;
+
+ nr_pages = size >> PAGE_SHIFT;
+ array_size = (nr_pages * sizeof(struct page *));
+
+ area->nr_pages = nr_pages;
+ area->pages = pages = kmalloc(array_size, GFP_KERNEL);
+ if (!area->pages)
+ goto fail;
+
+ memset(area->pages, 0, array_size);
+
+ for (i = 0; i < area->nr_pages; i++) {
+ area->pages[i] = alloc_page(GFP_KERNEL);
+ if (unlikely(!area->pages[i]))
+ goto fail;
+ }
+
+ if (map_vm_area(area, PAGE_KERNEL, &pages)) {
+ unmap_vm_area(area);
+ goto fail;
+ }
+
+ return area->addr;
+
+fail:
+ if (area->pages) {
+ for (i = 0; i < area->nr_pages; i++) {
+ if (area->pages[i])
+ __free_page(area->pages[i]);
+ }
+ kfree(area->pages);
+ }
+ kfree(area);
+
+ return NULL;
+}
+
+void *module_alloc(unsigned long size)
+{
+ if (size == 0)
+ return NULL;
+ return vmalloc(size);
+}
+
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+ vfree(module_region);
+ /* FIXME: If module_region == mod->init_region, trim exception
+ table entries. */
+}
+
+/* We don't need anything special. */
+long module_core_size(const Elf32_Ehdr *hdr,
+ const Elf32_Shdr *sechdrs,
+ const char *secstrings,
+ struct module *module)
+{
+ return module->core_size;
+}
+
+long module_init_size(const Elf32_Ehdr *hdr,
+ const Elf32_Shdr *sechdrs,
+ const char *secstrings,
+ struct module *module)
+{
+ return module->init_size;
+}
+
+int module_frob_arch_sections(Elf_Ehdr *hdr,
+ Elf_Shdr *sechdrs,
+ char *secstrings,
+ struct module *mod)
+{
+ return 0;
+}
+
+int apply_relocate(Elf32_Shdr *sechdrs,
+ const char *strtab,
+ unsigned int symindex,
+ unsigned int relsec,
+ struct module *me)
+{
+ unsigned int i;
+ Elf32_Rel *rel = (void *)sechdrs[relsec].sh_offset;
+ Elf32_Sym *sym;
+ uint32_t *location;
+ Elf32_Addr v;
+
+ DEBUGP("Applying relocate section %u to %u\n", relsec,
+ sechdrs[relsec].sh_info);
+ for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+ /* This is where to make the change */
+ location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_offset
+ + rel[i].r_offset;
+ /* This is the symbol it is referring to */
+ sym = (Elf32_Sym *)sechdrs[symindex].sh_offset
+ + ELF32_R_SYM(rel[i].r_info);
+ if (!sym->st_value) {
+ printk(KERN_WARNING "%s: Unknown symbol %s\n",
+ me->name, strtab + sym->st_name);
+ return -ENOENT;
+ }
+
+ v = sym->st_value;
+
+ switch (ELF32_R_TYPE(rel[i].r_info)) {
+ case R_MIPS_NONE:
+ break;
+
+ case R_MIPS_32:
+ *location += v;
+ break;
+
+ case R_MIPS_26:
+ if (v % 4)
+ printk(KERN_ERR
+ "module %s: dangerous relocation\n",
+ me->name);
+ return -ENOEXEC;
+ if ((v & 0xf0000000) !=
+ (((unsigned long)location + 4) & 0xf0000000))
+ printk(KERN_ERR
+ "module %s: relocation overflow\n",
+ me->name);
+ return -ENOEXEC;
+ *location = (*location & ~0x03ffffff) |
+ ((*location + (v >> 2)) & 0x03ffffff);
+ break;
+
+ case R_MIPS_HI16: {
+ struct mips_hi16 *n;
+
+ /*
+ * We cannot relocate this one now because we don't
+ * know the value of the carry we need to add. Save
+ * the information, and let LO16 do the actual
+ * relocation.
+ */
+ n = (struct mips_hi16 *) kmalloc(sizeof *n, GFP_KERNEL);
+ n->addr = location;
+ n->value = v;
+ n->next = mips_hi16_list;
+ mips_hi16_list = n;
+ break;
+ }
+
+ case R_MIPS_LO16: {
+ unsigned long insnlo = *location;
+ Elf32_Addr val, vallo;
+
+ /* Sign extend the addend we extract from the lo insn. */
+ vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
+
+ if (mips_hi16_list != NULL) {
+ struct mips_hi16 *l;
+
+ l = mips_hi16_list;
+ while (l != NULL) {
+ struct mips_hi16 *next;
+ unsigned long insn;
+
+ /*
+ * The value for the HI16 had best be
+ * the same.
+ */
+ printk(KERN_ERR "module %s: dangerous "
+ "relocation\n", me->name);
+ return -ENOEXEC;
+
+ /*
+ * Do the HI16 relocation. Note that
+ * we actually don't need to know
+ * anything about the LO16 itself,
+ * except where to find the low 16 bits
+ * of the addend needed by the LO16.
+ */
+ insn = *l->addr;
+ val = ((insn & 0xffff) << 16) + vallo;
+ val += v;
+
+ /*
+ * Account for the sign extension that
+ * will happen in the low bits.
+ */
+ val = ((val >> 16) + ((val & 0x8000) !=
+ 0)) & 0xffff;
+
+ insn = (insn & ~0xffff) | val;
+ *l->addr = insn;
+
+ next = l->next;
+ kfree(l);
+ l = next;
+ }
+
+ mips_hi16_list = NULL;
+ }
+
+ /*
+ * Ok, we're done with the HI16 relocs. Now deal with
+ * the LO16.
+ */
+ val = v + vallo;
+ insnlo = (insnlo & ~0xffff) | (val & 0xffff);
+ *location = insnlo;
+ break;
+ }
+
+ default:
+ printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+ me->name, ELF32_R_TYPE(rel[i].r_info));
+ return -ENOEXEC;
+ }
+ }
+ return 0;
+}
+
+int apply_relocate_add(Elf32_Shdr *sechdrs,
+ const char *strtab,
+ unsigned int symindex,
+ unsigned int relsec,
+ struct module *me)
+{
+ printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
+ me->name);
+ return -ENOEXEC;
+}
+
+int module_finalize(const Elf_Ehdr *hdr,
+ const Elf_Shdr *sechdrs,
+ struct module *me)
+{
+ return 0;
+}
+
+void module_arch_cleanup(struct module *mod)
+{
+}
diff -Nru a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
--- a/arch/mips/kernel/module.c Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,242 +0,0 @@
-/* Kernel module help for MIPS.
- Copyright (C) 2001 Rusty Russell.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-#include <linux/moduleloader.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-
-struct mips_hi16 {
- struct mips_hi16 *next;
- Elf32_Addr *addr;
- Elf32_Addr value;
-};
-
-static struct mips_hi16 *mips_hi16_list;
-
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(fmt , ...)
-#endif
-
-void *module_alloc(unsigned long size)
-{
- if (size == 0)
- return NULL;
- return vmalloc(size);
-}
-
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
- vfree(module_region);
- /* FIXME: If module_region == mod->init_region, trim exception
- table entries. */
-}
-
-/* We don't need anything special. */
-long module_core_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
-{
- return module->core_size;
-}
-
-long module_init_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
-{
- return module->init_size;
-}
-
-int module_frob_arch_sections(Elf_Ehdr *hdr,
- Elf_Shdr *sechdrs,
- char *secstrings,
- struct module *mod)
-{
- return 0;
-}
-
-int apply_relocate(Elf32_Shdr *sechdrs,
- const char *strtab,
- unsigned int symindex,
- unsigned int relsec,
- struct module *me)
-{
- unsigned int i;
- Elf32_Rel *rel = (void *)sechdrs[relsec].sh_offset;
- Elf32_Sym *sym;
- uint32_t *location;
- Elf32_Addr v;
-
- DEBUGP("Applying relocate section %u to %u\n", relsec,
- sechdrs[relsec].sh_info);
- for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
- /* This is where to make the change */
- location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_offset
- + rel[i].r_offset;
- /* This is the symbol it is referring to */
- sym = (Elf32_Sym *)sechdrs[symindex].sh_offset
- + ELF32_R_SYM(rel[i].r_info);
- if (!sym->st_value) {
- printk(KERN_WARNING "%s: Unknown symbol %s\n",
- me->name, strtab + sym->st_name);
- return -ENOENT;
- }
-
- v = sym->st_value;
-
- switch (ELF32_R_TYPE(rel[i].r_info)) {
- case R_MIPS_NONE:
- break;
-
- case R_MIPS_32:
- *location += v;
- break;
-
- case R_MIPS_26:
- if (v % 4)
- printk(KERN_ERR
- "module %s: dangerous relocation\n",
- me->name);
- return -ENOEXEC;
- if ((v & 0xf0000000) !=
- (((unsigned long)location + 4) & 0xf0000000))
- printk(KERN_ERR
- "module %s: relocation overflow\n",
- me->name);
- return -ENOEXEC;
- *location = (*location & ~0x03ffffff) |
- ((*location + (v >> 2)) & 0x03ffffff);
- break;
-
- case R_MIPS_HI16: {
- struct mips_hi16 *n;
-
- /*
- * We cannot relocate this one now because we don't
- * know the value of the carry we need to add. Save
- * the information, and let LO16 do the actual
- * relocation.
- */
- n = (struct mips_hi16 *) kmalloc(sizeof *n, GFP_KERNEL);
- n->addr = location;
- n->value = v;
- n->next = mips_hi16_list;
- mips_hi16_list = n;
- break;
- }
-
- case R_MIPS_LO16: {
- unsigned long insnlo = *location;
- Elf32_Addr val, vallo;
-
- /* Sign extend the addend we extract from the lo insn. */
- vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
-
- if (mips_hi16_list != NULL) {
- struct mips_hi16 *l;
-
- l = mips_hi16_list;
- while (l != NULL) {
- struct mips_hi16 *next;
- unsigned long insn;
-
- /*
- * The value for the HI16 had best be
- * the same.
- */
- printk(KERN_ERR "module %s: dangerous "
- "relocation\n", me->name);
- return -ENOEXEC;
-
- /*
- * Do the HI16 relocation. Note that
- * we actually don't need to know
- * anything about the LO16 itself,
- * except where to find the low 16 bits
- * of the addend needed by the LO16.
- */
- insn = *l->addr;
- val = ((insn & 0xffff) << 16) + vallo;
- val += v;
-
- /*
- * Account for the sign extension that
- * will happen in the low bits.
- */
- val = ((val >> 16) + ((val & 0x8000) !=
- 0)) & 0xffff;
-
- insn = (insn & ~0xffff) | val;
- *l->addr = insn;
-
- next = l->next;
- kfree(l);
- l = next;
- }
-
- mips_hi16_list = NULL;
- }
-
- /*
- * Ok, we're done with the HI16 relocs. Now deal with
- * the LO16.
- */
- val = v + vallo;
- insnlo = (insnlo & ~0xffff) | (val & 0xffff);
- *location = insnlo;
- break;
- }
-
- default:
- printk(KERN_ERR "module %s: Unknown relocation: %u\n",
- me->name, ELF32_R_TYPE(rel[i].r_info));
- return -ENOEXEC;
- }
- }
- return 0;
-}
-
-int apply_relocate_add(Elf32_Shdr *sechdrs,
- const char *strtab,
- unsigned int symindex,
- unsigned int relsec,
- struct module *me)
-{
- printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
- me->name);
- return -ENOEXEC;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
- const Elf_Shdr *sechdrs,
- struct module *me)
-{
- return 0;
-}
-
-void module_arch_cleanup(struct module *mod)
-{
-}
diff -Nru a/arch/mips/kernel/offset.c b/arch/mips/kernel/offset.c
--- a/arch/mips/kernel/offset.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/kernel/offset.c Sun Aug 3 13:14:51 2003
@@ -2,12 +2,13 @@
* offset.c: Calculate pt_regs and task_struct offsets.
*
* Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*
* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc.
*/
+#include <linux/compat.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/mm.h>
@@ -18,7 +19,6 @@
#define text(t) __asm__("\n@@@" t)
#define _offset(type, member) (&(((type *)NULL)->member))
-
#define offset(string, ptr, member) \
__asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)))
#define constant(string, member) \
@@ -94,6 +94,9 @@
offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
+ constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
+ constant("#define _THREAD_SIZE ", THREAD_SIZE);
+ constant("#define _THREAD_MASK ", THREAD_MASK);
linefeed;
}
@@ -111,9 +114,10 @@
offset("#define THREAD_REG29 ", struct task_struct, thread.reg29);
offset("#define THREAD_REG30 ", struct task_struct, thread.reg30);
offset("#define THREAD_REG31 ", struct task_struct, thread.reg31);
- offset("#define THREAD_STATUS ", struct task_struct, \
+ offset("#define THREAD_STATUS ", struct task_struct,
thread.cp0_status);
offset("#define THREAD_FPU ", struct task_struct, thread.fpu);
+
offset("#define THREAD_BVADDR ", struct task_struct, \
thread.cp0_badvaddr);
offset("#define THREAD_BUADDR ", struct task_struct, \
@@ -129,6 +133,77 @@
linefeed;
}
+void output_thread_fpu_defines(void)
+{
+ offset("#define THREAD_FPR0 ",
+ struct task_struct, thread.fpu.hard.fpr[0]);
+ offset("#define THREAD_FPR1 ",
+ struct task_struct, thread.fpu.hard.fpr[1]);
+ offset("#define THREAD_FPR2 ",
+ struct task_struct, thread.fpu.hard.fpr[2]);
+ offset("#define THREAD_FPR3 ",
+ struct task_struct, thread.fpu.hard.fpr[3]);
+ offset("#define THREAD_FPR4 ",
+ struct task_struct, thread.fpu.hard.fpr[4]);
+ offset("#define THREAD_FPR5 ",
+ struct task_struct, thread.fpu.hard.fpr[5]);
+ offset("#define THREAD_FPR6 ",
+ struct task_struct, thread.fpu.hard.fpr[6]);
+ offset("#define THREAD_FPR7 ",
+ struct task_struct, thread.fpu.hard.fpr[7]);
+ offset("#define THREAD_FPR8 ",
+ struct task_struct, thread.fpu.hard.fpr[8]);
+ offset("#define THREAD_FPR9 ",
+ struct task_struct, thread.fpu.hard.fpr[9]);
+ offset("#define THREAD_FPR10 ",
+ struct task_struct, thread.fpu.hard.fpr[10]);
+ offset("#define THREAD_FPR11 ",
+ struct task_struct, thread.fpu.hard.fpr[11]);
+ offset("#define THREAD_FPR12 ",
+ struct task_struct, thread.fpu.hard.fpr[12]);
+ offset("#define THREAD_FPR13 ",
+ struct task_struct, thread.fpu.hard.fpr[13]);
+ offset("#define THREAD_FPR14 ",
+ struct task_struct, thread.fpu.hard.fpr[14]);
+ offset("#define THREAD_FPR15 ",
+ struct task_struct, thread.fpu.hard.fpr[15]);
+ offset("#define THREAD_FPR16 ",
+ struct task_struct, thread.fpu.hard.fpr[16]);
+ offset("#define THREAD_FPR17 ",
+ struct task_struct, thread.fpu.hard.fpr[17]);
+ offset("#define THREAD_FPR18 ",
+ struct task_struct, thread.fpu.hard.fpr[18]);
+ offset("#define THREAD_FPR19 ",
+ struct task_struct, thread.fpu.hard.fpr[19]);
+ offset("#define THREAD_FPR20 ",
+ struct task_struct, thread.fpu.hard.fpr[20]);
+ offset("#define THREAD_FPR21 ",
+ struct task_struct, thread.fpu.hard.fpr[21]);
+ offset("#define THREAD_FPR22 ",
+ struct task_struct, thread.fpu.hard.fpr[22]);
+ offset("#define THREAD_FPR23 ",
+ struct task_struct, thread.fpu.hard.fpr[23]);
+ offset("#define THREAD_FPR24 ",
+ struct task_struct, thread.fpu.hard.fpr[24]);
+ offset("#define THREAD_FPR25 ",
+ struct task_struct, thread.fpu.hard.fpr[25]);
+ offset("#define THREAD_FPR26 ",
+ struct task_struct, thread.fpu.hard.fpr[26]);
+ offset("#define THREAD_FPR27 ",
+ struct task_struct, thread.fpu.hard.fpr[27]);
+ offset("#define THREAD_FPR28 ",
+ struct task_struct, thread.fpu.hard.fpr[28]);
+ offset("#define THREAD_FPR29 ",
+ struct task_struct, thread.fpu.hard.fpr[29]);
+ offset("#define THREAD_FPR30 ",
+ struct task_struct, thread.fpu.hard.fpr[30]);
+ offset("#define THREAD_FPR31 ",
+ struct task_struct, thread.fpu.hard.fpr[31]);
+
+ offset("#define THREAD_FCR31 ",
+ struct task_struct, thread.fpu.hard.fcr31);
+}
+
void output_mm_defines(void)
{
text("/* Linux mm_struct offsets. */");
@@ -137,8 +212,17 @@
offset("#define MM_CONTEXT ", struct mm_struct, context);
linefeed;
constant("#define _PAGE_SIZE ", PAGE_SIZE);
- constant("#define _PGD_ORDER ", PGD_ORDER);
+ constant("#define _PAGE_SHIFT ", PAGE_SHIFT);
+ linefeed;
constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT);
+ constant("#define _PMD_SHIFT ", PMD_SHIFT);
+ linefeed;
+ constant("#define _PGD_ORDER ", PGD_ORDER);
+ constant("#define _PMD_ORDER ", PMD_ORDER);
+ constant("#define _PTE_ORDER ", PTE_ORDER);
+ linefeed;
+ constant("#define _PTRS_PER_PGD ", PTRS_PER_PGD);
+ constant("#define _PTRS_PER_PMD ", PTRS_PER_PMD);
linefeed;
}
@@ -158,6 +242,17 @@
linefeed;
}
+#ifdef CONFIG_MIPS32_COMPAT
+void output_sc32_defines(void)
+{
+ text("/* Linux 32-bit sigcontext offsets. */");
+ offset("#define SC32_FPREGS ", struct sigcontext32, sc_fpregs);
+ offset("#define SC32_FPC_CSR ", struct sigcontext32, sc_fpc_csr);
+ offset("#define SC32_FPC_EIR ", struct sigcontext32, sc_fpc_eir);
+ linefeed;
+}
+#endif
+
void output_signal_defined(void)
{
text("/* Linux signal numbers. */");
@@ -200,8 +295,6 @@
{
text("/* Linux irq_cpustat_t offsets. */");
offset("#define IC_SOFTIRQ_PENDING ", irq_cpustat_t, __softirq_pending);
- offset("#define IC_SYSCALL_COUNT ", irq_cpustat_t, __syscall_count);
- offset("#define IC_KSOFTIRQD_TASK ", irq_cpustat_t, __ksoftirqd_task);
size("#define IC_IRQ_CPUSTAT_T ", irq_cpustat_t);
linefeed;
}
diff -Nru a/arch/mips/kernel/pci-dma.c b/arch/mips/kernel/pci-dma.c
--- a/arch/mips/kernel/pci-dma.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/kernel/pci-dma.c Sun Aug 3 13:14:50 2003
@@ -16,24 +16,30 @@
#include <asm/io.h>
-void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
- dma_addr_t * dma_handle)
+#ifndef UNCAC_BASE /* Hack ... */
+#define UNCAC_BASE 0x9000000000000000UL
+#endif
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
{
void *ret;
- int gfp = GFP_ATOMIC;
- struct pci_bus *bus = NULL;
+ /* ignore region specifiers */
+ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
-#ifdef CONFIG_ISA
- if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
+ if (dev == NULL || (*dev->dma_mask < 0xffffffff))
gfp |= GFP_DMA;
-#endif
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret != NULL) {
memset(ret, 0, size);
+#if 0 /* Broken support for some platforms ... */
if (hwdev)
bus = hwdev->bus;
*dma_handle = bus_to_baddr(bus, __pa(ret));
+#else
+ *dma_handle = virt_to_phys(ret);
+#endif
#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv((unsigned long) ret, size);
ret = UNCAC_ADDR(ret);
@@ -43,8 +49,8 @@
return ret;
}
-void pci_free_consistent(struct pci_dev *hwdev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+void dma_free_coherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle)
{
unsigned long addr = (unsigned long) vaddr;
diff -Nru a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
--- a/arch/mips/kernel/process.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/kernel/process.c Sun Aug 3 13:14:47 2003
@@ -3,8 +3,8 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994 - 2000 by Ralf Baechle and others.
- * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#include <linux/errno.h>
#include <linux/sched.h>
@@ -12,9 +12,10 @@
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
-#include <linux/personality.h>
+#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/mman.h>
+#include <linux/personality.h>
#include <linux/sys.h>
#include <linux/user.h>
#include <linux/a.out.h>
@@ -28,7 +29,6 @@
#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/elf.h>
@@ -51,7 +51,6 @@
ATTRIB_NORET void cpu_idle(void)
{
/* endless idle loop with no priority at all */
-
while (1) {
while (!need_resched())
if (cpu_wait)
@@ -64,10 +63,18 @@
void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
{
- regs->cp0_status &= ~(ST0_CU0|ST0_KSU|ST0_CU1);
- regs->cp0_status |= KU_USER;
+ unsigned long status;
+
+ /* New thread loses kernel privileges. */
+ status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK);
+#ifdef CONFIG_MIPS64
+ status &= ~ST0_FR;
+ status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR;
+#endif
+ status |= KU_USER;
+ regs->cp0_status = status;
current->used_math = 0;
- loose_fpu();
+ lose_fpu();
regs->cp0_epc = pc;
regs->regs[29] = sp;
current_thread_info()->addr_limit = USER_DS;
@@ -82,14 +89,13 @@
}
int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
- unsigned long unused,
- struct task_struct * p, struct pt_regs * regs)
+ unsigned long unused, struct task_struct *p, struct pt_regs *regs)
{
struct thread_info *ti = p->thread_info;
- struct pt_regs * childregs;
+ struct pt_regs *childregs;
long childksp;
- childksp = (unsigned long)ti + KERNEL_STACK_SIZE - 32;
+ childksp = (unsigned long)ti + THREAD_SIZE - 32;
if (is_fpu_owner()) {
save_fp(p);
@@ -99,16 +105,21 @@
childregs = (struct pt_regs *) childksp - 1;
*childregs = *regs;
childregs->regs[7] = 0; /* Clear error flag */
- if(current->personality == PER_LINUX) {
- childregs->regs[2] = 0; /* Child gets zero as return value */
- regs->regs[2] = p->pid;
- } else {
+
+#ifdef CONFIG_BINFMT_IRIX
+ if (current->personality != PER_LINUX) {
/* Under IRIX things are a little different. */
childregs->regs[2] = 0;
childregs->regs[3] = 1;
regs->regs[2] = p->pid;
regs->regs[3] = 0;
+ } else
+#endif
+ {
+ childregs->regs[2] = 0; /* Child gets zero as return value */
+ regs->regs[2] = p->pid;
}
+
if (childregs->cp0_status & ST0_CU0) {
childregs->regs[28] = (unsigned long) ti;
childregs->regs[29] = childksp;
@@ -124,9 +135,9 @@
* New tasks lose permission to use the fpu. This accelerates context
* switching for most programs since they don't use the fpu.
*/
- p->thread.cp0_status = read_c0_status() &
- ~(ST0_CU2|ST0_CU1|KU_MASK);
+ p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
+ clear_tsk_thread_flag(p, TIF_USEDFPU);
p->set_child_tid = p->clear_child_tid = NULL;
return 0;
@@ -142,26 +153,28 @@
/*
* Create a kernel thread
*/
-int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
+long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
{
long retval;
__asm__ __volatile__(
- " .set noreorder \n"
- " move $6, $sp \n"
- " move $4, %5 \n"
- " li $2, %1 \n"
+ " move $6, $sp \n"
+ " move $4, %5 \n"
+ " li $2, %1 \n"
" syscall \n"
- " beq $6, $sp, 1f \n"
- " subu $sp, 32 \n"
- " jalr %4 \n"
- " move $4, %3 \n"
- " move $4, $2 \n"
- " li $2, %2 \n"
+ " beq $6, $sp, 1f \n"
+#ifdef CONFIG_MIPS32 /* On o32 the caller has to create the stackframe */
+ " subu $sp, 32 \n"
+#endif
+ " move $4, %3 \n"
+ " jalr %4 \n"
+ " move $4, $2 \n"
+ " li $2, %2 \n"
" syscall \n"
- "1: addiu $sp, 32 \n"
- " move %0, $2 \n"
- " .set reorder"
+#ifdef CONFIG_MIPS32 /* On o32 the caller has to deallocate the stackframe */
+ " addiu $sp, 32 \n"
+#endif
+ "1: move %0, $2"
: "=r" (retval)
: "i" (__NR_clone), "i" (__NR_exit), "r" (arg), "r" (fn),
"r" (flags | CLONE_VM | CLONE_UNTRACED)
@@ -170,7 +183,7 @@
* at, result, argument or temporary registers ...
*/
: "$2", "$3", "$4", "$5", "$6", "$7", "$8",
- "$9","$10","$11","$12","$13","$14","$15","$24","$25", "$31");
+ "$9","$10","$11","$12","$13","$14","$15","$24","$25","$31");
return retval;
}
@@ -198,16 +211,24 @@
(ip->r_format.func == jalr_op ||
ip->r_format.func == jr_op)))
break;
- if (ip->i_format.opcode == sw_op &&
- ip->i_format.rs == 29) {
- /* sw $ra, offset($sp) */
+
+ if (
+#ifdef CONFIG_MIPS32
+ ip->i_format.opcode == sw_op &&
+#endif
+#ifdef CONFIG_MIPS64
+ ip->i_format.opcode == sd_op &&
+#endif
+ ip->i_format.rs == 29)
+ {
+ /* sw / sd $ra, offset($sp) */
if (ip->i_format.rt == 31) {
if (info->pc_offset != -1)
break;
info->pc_offset =
ip->i_format.simmediate / sizeof(long);
}
- /* sw $s8, offset($sp) */
+ /* sw / sd $s8, offset($sp) */
if (ip->i_format.rt == 30) {
if (info->frame_offset != -1)
break;
@@ -235,13 +256,17 @@
!get_frame_info(&wait_for_completion_frame, wait_for_completion);
}
-unsigned long thread_saved_pc(struct thread_struct *t)
+/*
+ * Return saved PC of a blocked thread.
+ */
+unsigned long thread_saved_pc(struct task_struct *tsk)
{
extern void ret_from_fork(void);
+ struct thread_struct *t = &tsk->thread;
/* New born processes are a special case */
if (t->reg31 == (unsigned long) ret_from_fork)
- return t->reg31;
+ return t->reg31;
if (schedule_frame.pc_offset < 0)
return 0;
@@ -266,10 +291,9 @@
if (!mips_frame_info_initialized)
return 0;
- pc = thread_saved_pc(&p->thread);
- if (pc < first_sched || pc >= last_sched) {
- return pc;
- }
+ pc = thread_saved_pc(p);
+ if (pc < first_sched || pc >= last_sched)
+ goto out;
if (pc >= (unsigned long) sleep_on_timeout)
goto schedule_timeout_caller;
@@ -289,7 +313,7 @@
pc = ((unsigned long *)frame)[sleep_on_frame.pc_offset];
else
pc = ((unsigned long *)frame)[wait_for_completion_frame.pc_offset];
- return pc;
+ goto out;
schedule_timeout_caller:
/*
@@ -307,6 +331,13 @@
frame = ((unsigned long *)frame)[schedule_timeout_frame.frame_offset];
pc = ((unsigned long *)frame)[sleep_on_timeout_frame.pc_offset];
}
+
+out:
+
+#ifdef CONFIG_MIPS64
+ if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */
+ pc &= 0xffffffffUL;
+#endif
return pc;
}
diff -Nru a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
--- a/arch/mips/kernel/ptrace.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/kernel/ptrace.c Sun Aug 3 13:14:53 2003
@@ -9,6 +9,10 @@
* Copyright (C) 1996 David S. Miller
* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999 MIPS Technologies, Inc.
+ * Copyright (C) 2000 Ulf Carlsson
+ *
+ * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
+ * binaries.
*/
#include <linux/config.h>
#include <linux/compiler.h>
@@ -22,14 +26,14 @@
#include <linux/user.h>
#include <linux/security.h>
+#include <asm/cpu.h>
+#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/fpu.h>
/*
* Called by kernel/ptrace.c when detaching..
@@ -87,6 +91,7 @@
goto out_tsk;
switch (request) {
+ /* when I and D space are separate, these will need to be fixed. */
case PTRACE_PEEKTEXT: /* read word at location addr. */
case PTRACE_PEEKDATA: {
unsigned long tmp;
@@ -98,24 +103,26 @@
break;
ret = put_user(tmp,(unsigned long *) data);
break;
- }
+ }
- /* Read the word at location addr in the USER area. */
+ /* Read the word at location addr in the USER area. */
case PTRACE_PEEKUSR: {
struct pt_regs *regs;
unsigned long tmp;
regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs));
- tmp = 0; /* Default return value. */
+ THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ ret = 0; /* Default return value. */
- switch(addr) {
+ switch (addr) {
case 0 ... 31:
tmp = regs->regs[addr];
break;
case FPR_BASE ... FPR_BASE + 31:
if (child->used_math) {
- unsigned long long *fregs = get_fpu_regs(child);
+ fpureg_t *fregs = get_fpu_regs(child);
+
+#ifdef CONFIG_MIPS32
/*
* The odd registers are actually the high
* order bits of the values stored in the even
@@ -125,6 +132,10 @@
tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
else
tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
+#endif
+#ifdef CONFIG_MIPS64
+ tmp = fregs[addr - FPR_BASE];
+#endif
} else {
tmp = -1; /* FP not yet used */
}
@@ -145,10 +156,10 @@
tmp = regs->lo;
break;
case FPC_CSR:
- if (!cpu_has_fpu)
- tmp = child->thread.fpu.soft.sr;
+ if (cpu_has_fpu)
+ tmp = child->thread.fpu.hard.fcr31;
else
- tmp = child->thread.fpu.hard.control;
+ tmp = child->thread.fpu.soft.fcr31;
break;
case FPC_EIR: { /* implementation / version register */
unsigned int flags;
@@ -169,8 +180,9 @@
}
ret = put_user(tmp, (unsigned long *) data);
break;
- }
+ }
+ /* when I and D space are separate, this will have to be fixed. */
case PTRACE_POKETEXT: /* write the word at location addr. */
case PTRACE_POKEDATA:
ret = 0;
@@ -184,21 +196,22 @@
struct pt_regs *regs;
ret = 0;
regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs));
+ THREAD_SIZE - 32 - sizeof(struct pt_regs));
switch (addr) {
case 0 ... 31:
regs->regs[addr] = data;
break;
case FPR_BASE ... FPR_BASE + 31: {
- unsigned long long *fregs;
- fregs = (unsigned long long *)get_fpu_regs(child);
+ fpureg_t *fregs = get_fpu_regs(child);
+
if (!child->used_math) {
/* FP not yet used */
memset(&child->thread.fpu.hard, ~0,
sizeof(child->thread.fpu.hard));
- child->thread.fpu.hard.control = 0;
+ child->thread.fpu.hard.fcr31 = 0;
}
+#ifdef CONFIG_MIPS32
/*
* The odd registers are actually the high order bits
* of the values stored in the even registers - unless
@@ -211,6 +224,10 @@
fregs[addr - FPR_BASE] &= ~0xffffffffLL;
fregs[addr - FPR_BASE] |= data;
}
+#endif
+#ifdef CONFIG_MIPS64
+ fregs[addr - FPR_BASE] = data;
+#endif
break;
}
case PC:
@@ -223,10 +240,10 @@
regs->lo = data;
break;
case FPC_CSR:
- if (!cpu_has_fpu)
- child->thread.fpu.soft.sr = data;
+ if (cpu_has_fpu)
+ child->thread.fpu.hard.fcr31 = data;
else
- child->thread.fpu.hard.control = data;
+ child->thread.fpu.soft.fcr31 = data;
break;
default:
/* The rest are not allowed. */
@@ -251,7 +268,7 @@
wake_up_process(child);
ret = 0;
break;
- }
+ }
/*
* make the child exit. Best I can do is send it a sigkill.
@@ -274,6 +291,7 @@
ret = ptrace_request(child, request, addr, data);
break;
}
+
out_tsk:
put_task_struct(child);
out:
diff -Nru a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/ptrace32.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,286 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 Ross Biro
+ * Copyright (C) Linus Torvalds
+ * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
+ * Copyright (C) 1996 David S. Miller
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999 MIPS Technologies, Inc.
+ * Copyright (C) 2000 Ulf Carlsson
+ *
+ * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
+ * binaries.
+ */
+#include <linux/config.h>
+#include <linux/compiler.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/errno.h>
+#include <linux/ptrace.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/user.h>
+#include <linux/security.h>
+
+#include <asm/cpu.h>
+#include <asm/fpu.h>
+#include <asm/mipsregs.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <asm/bootinfo.h>
+
+/*
+ * Tracing a 32-bit process with a 64-bit strace and vice versa will not
+ * work. I don't know how to fix this.
+ */
+asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
+{
+ struct task_struct *child;
+ int ret;
+
+#if 0
+ printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n",
+ (int) request, (int) pid, (unsigned long) addr,
+ (unsigned long) data);
+#endif
+ lock_kernel();
+ ret = -EPERM;
+ if (request == PTRACE_TRACEME) {
+ /* are we already being traced? */
+ if (current->ptrace & PT_PTRACED)
+ goto out;
+ if ((ret = security_ptrace(current->parent, current)))
+ goto out;
+ /* set the ptrace bit in the process flags. */
+ current->ptrace |= PT_PTRACED;
+ ret = 0;
+ goto out;
+ }
+ ret = -ESRCH;
+ read_lock(&tasklist_lock);
+ child = find_task_by_pid(pid);
+ if (child)
+ get_task_struct(child);
+ read_unlock(&tasklist_lock);
+ if (!child)
+ goto out;
+
+ ret = -EPERM;
+ if (pid == 1) /* you may not mess with init */
+ goto out_tsk;
+
+ if (request == PTRACE_ATTACH) {
+ ret = ptrace_attach(child);
+ goto out_tsk;
+ }
+
+ ret = ptrace_check_attach(child, request == PTRACE_KILL);
+ if (ret < 0)
+ goto out_tsk;
+
+ switch (request) {
+ /* when I and D space are separate, these will need to be fixed. */
+ case PTRACE_PEEKTEXT: /* read word at location addr. */
+ case PTRACE_PEEKDATA: {
+ unsigned int tmp;
+ int copied;
+
+ copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
+ ret = -EIO;
+ if (copied != sizeof(tmp))
+ break;
+ ret = put_user(tmp, (unsigned int *) (unsigned long) data);
+ break;
+ }
+
+ /* Read the word at location addr in the USER area. */
+ case PTRACE_PEEKUSR: {
+ struct pt_regs *regs;
+ unsigned int tmp;
+
+ regs = (struct pt_regs *) ((unsigned long) child->thread_info +
+ THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ ret = 0; /* Default return value. */
+
+ switch (addr) {
+ case 0 ... 31:
+ tmp = regs->regs[addr];
+ break;
+ case FPR_BASE ... FPR_BASE + 31:
+ if (child->used_math) {
+ fpureg_t *fregs = get_fpu_regs(child);
+
+ /*
+ * The odd registers are actually the high
+ * order bits of the values stored in the even
+ * registers - unless we're using r2k_switch.S.
+ */
+ if (addr & 1)
+ tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
+ else
+ tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
+ } else {
+ tmp = -1; /* FP not yet used */
+ }
+ break;
+ case PC:
+ tmp = regs->cp0_epc;
+ break;
+ case CAUSE:
+ tmp = regs->cp0_cause;
+ break;
+ case BADVADDR:
+ tmp = regs->cp0_badvaddr;
+ break;
+ case MMHI:
+ tmp = regs->hi;
+ break;
+ case MMLO:
+ tmp = regs->lo;
+ break;
+ case FPC_CSR:
+ if (cpu_has_fpu)
+ tmp = child->thread.fpu.hard.fcr31;
+ else
+ tmp = child->thread.fpu.soft.fcr31;
+ break;
+ case FPC_EIR: { /* implementation / version register */
+ unsigned int flags;
+
+ if (!cpu_has_fpu)
+ break;
+
+ flags = read_c0_status();
+ __enable_fpu();
+ __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
+ write_c0_status(flags);
+ break;
+ }
+ default:
+ tmp = 0;
+ ret = -EIO;
+ goto out_tsk;
+ }
+ ret = put_user(tmp, (unsigned *) (unsigned long) data);
+ break;
+ }
+
+ /* when I and D space are separate, this will have to be fixed. */
+ case PTRACE_POKETEXT: /* write the word at location addr. */
+ case PTRACE_POKEDATA:
+ ret = 0;
+ if (access_process_vm(child, addr, &data, sizeof(data), 1)
+ == sizeof(data))
+ break;
+ ret = -EIO;
+ break;
+
+ case PTRACE_POKEUSR: {
+ struct pt_regs *regs;
+ ret = 0;
+ regs = (struct pt_regs *) ((unsigned long) child->thread_info +
+ THREAD_SIZE - 32 - sizeof(struct pt_regs));
+
+ switch (addr) {
+ case 0 ... 31:
+ regs->regs[addr] = data;
+ break;
+ case FPR_BASE ... FPR_BASE + 31: {
+ fpureg_t *fregs = get_fpu_regs(child);
+
+ if (!child->used_math) {
+ /* FP not yet used */
+ memset(&child->thread.fpu.hard, ~0,
+ sizeof(child->thread.fpu.hard));
+ child->thread.fpu.hard.fcr31 = 0;
+ }
+ /*
+ * The odd registers are actually the high order bits
+ * of the values stored in the even registers - unless
+ * we're using r2k_switch.S.
+ */
+ if (addr & 1) {
+ fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
+ fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
+ } else {
+ fregs[addr - FPR_BASE] &= ~0xffffffffLL;
+ /* Must cast, lest sign extension fill upper
+ bits! */
+ fregs[addr - FPR_BASE] |= (unsigned int)data;
+ }
+ break;
+ }
+ case PC:
+ regs->cp0_epc = data;
+ break;
+ case MMHI:
+ regs->hi = data;
+ break;
+ case MMLO:
+ regs->lo = data;
+ break;
+ case FPC_CSR:
+ if (cpu_has_fpu)
+ child->thread.fpu.hard.fcr31 = data;
+ else
+ child->thread.fpu.soft.fcr31 = data;
+ break;
+ default:
+ /* The rest are not allowed. */
+ ret = -EIO;
+ break;
+ }
+ break;
+ }
+
+ case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
+ case PTRACE_CONT: { /* restart after signal. */
+ ret = -EIO;
+ if ((unsigned int) data > _NSIG)
+ break;
+ if (request == PTRACE_SYSCALL) {
+ set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ }
+ else {
+ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ }
+ child->exit_code = data;
+ wake_up_process(child);
+ ret = 0;
+ break;
+ }
+
+ /*
+ * make the child exit. Best I can do is send it a sigkill.
+ * perhaps it should be put in the status that it wants to
+ * exit.
+ */
+ case PTRACE_KILL:
+ ret = 0;
+ if (child->state == TASK_ZOMBIE) /* already dead */
+ break;
+ child->exit_code = SIGKILL;
+ wake_up_process(child);
+ break;
+
+ case PTRACE_DETACH: /* detach a process that was attached. */
+ ret = ptrace_detach(child, data);
+ break;
+
+ default:
+ ret = ptrace_request(child, request, addr, data);
+ break;
+ }
+
+out_tsk:
+ put_task_struct(child);
+out:
+ unlock_kernel();
+ return ret;
+}
diff -Nru a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
--- a/arch/mips/kernel/r2300_switch.S Sun Aug 3 13:14:51 2003
+++ b/arch/mips/kernel/r2300_switch.S Sun Aug 3 13:14:51 2003
@@ -31,7 +31,7 @@
* Offset to the current process status flags, the first 32 bytes of the
* stack are not used.
*/
-#define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
+#define ST_OFF (THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
/*
* FPU context is saved iff the process has used it's FPU in the current
@@ -53,7 +53,7 @@
#endif
mfc0 t1, CP0_STATUS
sw t1, THREAD_STATUS(a0)
- CPU_SAVE_NONSCRATCH(a0)
+ cpu_save_nonscratch a0
sw ra, THREAD_REG31(a0)
/*
@@ -61,7 +61,7 @@
*/
lw t3, TASK_THREAD_INFO(a0)
lw t0, TI_FLAGS(t3)
- li t1, TIF_USEDFPU
+ li t1, _TIF_USEDFPU
and t2, t0, t1
beqz t2, 1f
nor t1, zero, t1
@@ -77,7 +77,7 @@
and t0, t0, t1
sw t0, ST_OFF(t3)
- FPU_SAVE_SINGLE(a0, t0) # clobbers t0
+ fpu_save_single a0, t0 # clobbers t0
1:
/*
@@ -85,9 +85,9 @@
* updating $28, $29 and kernelsp without disabling ints.
*/
move $28, a2
- CPU_RESTORE_NONSCRATCH(a1)
+ cpu_restore_nonscratch a1
- addiu t1, $28, KERNEL_STACK_SIZE-32
+ addiu t1, $28, THREAD_SIZE-32
sw t1, kernelsp
mfc0 t1, CP0_STATUS /* Do we really need this? */
@@ -106,7 +106,7 @@
* Save a thread's fp context.
*/
LEAF(_save_fp)
- FPU_SAVE_SINGLE(a0, t1) # clobbers t1
+ fpu_save_single a0, t1 # clobbers t1
jr ra
END(_save_fp)
@@ -114,7 +114,7 @@
* Restore a thread's fp context.
*/
LEAF(_restore_fp)
- FPU_RESTORE_SINGLE(a0, t1) # clobbers t1
+ fpu_restore_single a0, t1 # clobbers t1
jr ra
END(_restore_fp)
diff -Nru a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
--- a/arch/mips/kernel/r4k_fpu.S Sun Aug 3 13:14:48 2003
+++ b/arch/mips/kernel/r4k_fpu.S Sun Aug 3 13:14:48 2003
@@ -3,13 +3,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1998, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 98, 99, 2000, 01 Ralf Baechle
*
* Multi-arch abstraction and asm macros for easier reading:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
*/
#include <asm/asm.h>
#include <asm/errno.h>
@@ -18,85 +19,172 @@
#include <asm/offset.h>
#include <asm/regdef.h>
-#define EX(a,b) \
-9: a,b; \
- .section __ex_table,"a"; \
- PTR 9b, fault; \
+ .macro EX insn, reg, src
+ .set push
+ .set nomacro
+.ex\@: \insn \reg, \src
+ .set pop
+ .section __ex_table,"a"
+ PTR .ex\@, fault
.previous
+ .endm
.set noreorder
.set mips3
/* Save floating point context */
LEAF(_save_fp_context)
- li v0, 0 # assume success
- cfc1 t1,fcr31
+ cfc1 t1, fcr31
+
+#ifdef CONFIG_MIPS64
+ /* Store the 16 odd double precision registers */
+ EX sdc1 $f1, SC_FPREGS+8(a0)
+ EX sdc1 $f3, SC_FPREGS+24(a0)
+ EX sdc1 $f5, SC_FPREGS+40(a0)
+ EX sdc1 $f7, SC_FPREGS+56(a0)
+ EX sdc1 $f9, SC_FPREGS+72(a0)
+ EX sdc1 $f11, SC_FPREGS+88(a0)
+ EX sdc1 $f13, SC_FPREGS+104(a0)
+ EX sdc1 $f15, SC_FPREGS+120(a0)
+ EX sdc1 $f17, SC_FPREGS+136(a0)
+ EX sdc1 $f19, SC_FPREGS+152(a0)
+ EX sdc1 $f21, SC_FPREGS+168(a0)
+ EX sdc1 $f23, SC_FPREGS+184(a0)
+ EX sdc1 $f25, SC_FPREGS+200(a0)
+ EX sdc1 $f27, SC_FPREGS+216(a0)
+ EX sdc1 $f29, SC_FPREGS+232(a0)
+ EX sdc1 $f31, SC_FPREGS+248(a0)
+#endif
/* Store the 16 even double precision registers */
- EX(sdc1 $f0,(SC_FPREGS+0)(a0))
- EX(sdc1 $f2,(SC_FPREGS+16)(a0))
- EX(sdc1 $f4,(SC_FPREGS+32)(a0))
- EX(sdc1 $f6,(SC_FPREGS+48)(a0))
- EX(sdc1 $f8,(SC_FPREGS+64)(a0))
- EX(sdc1 $f10,(SC_FPREGS+80)(a0))
- EX(sdc1 $f12,(SC_FPREGS+96)(a0))
- EX(sdc1 $f14,(SC_FPREGS+112)(a0))
- EX(sdc1 $f16,(SC_FPREGS+128)(a0))
- EX(sdc1 $f18,(SC_FPREGS+144)(a0))
- EX(sdc1 $f20,(SC_FPREGS+160)(a0))
- EX(sdc1 $f22,(SC_FPREGS+176)(a0))
- EX(sdc1 $f24,(SC_FPREGS+192)(a0))
- EX(sdc1 $f26,(SC_FPREGS+208)(a0))
- EX(sdc1 $f28,(SC_FPREGS+224)(a0))
- EX(sdc1 $f30,(SC_FPREGS+240)(a0))
- EX(sw t1,SC_FPC_CSR(a0))
- cfc1 t0,$0 # implementation/version
+ EX sdc1 $f0, SC_FPREGS+0(a0)
+ EX sdc1 $f2, SC_FPREGS+16(a0)
+ EX sdc1 $f4, SC_FPREGS+32(a0)
+ EX sdc1 $f6, SC_FPREGS+48(a0)
+ EX sdc1 $f8, SC_FPREGS+64(a0)
+ EX sdc1 $f10, SC_FPREGS+80(a0)
+ EX sdc1 $f12, SC_FPREGS+96(a0)
+ EX sdc1 $f14, SC_FPREGS+112(a0)
+ EX sdc1 $f16, SC_FPREGS+128(a0)
+ EX sdc1 $f18, SC_FPREGS+144(a0)
+ EX sdc1 $f20, SC_FPREGS+160(a0)
+ EX sdc1 $f22, SC_FPREGS+176(a0)
+ EX sdc1 $f24, SC_FPREGS+192(a0)
+ EX sdc1 $f26, SC_FPREGS+208(a0)
+ EX sdc1 $f28, SC_FPREGS+224(a0)
+ EX sdc1 $f30, SC_FPREGS+240(a0)
+ EX sw t1, SC_FPC_CSR(a0)
+ cfc1 t0, $0 # implementation/version
+ EX sw t0, SC_FPC_EIR(a0)
jr ra
- .set nomacro
- EX(sw t0,SC_FPC_EIR(a0))
- .set macro
+ li v0, 0 # success
END(_save_fp_context)
+#ifdef CONFIG_MIPS64
+ /* Save 32-bit process floating point context */
+LEAF(_save_fp_context32)
+ cfc1 t1, fcr31
+
+ EX sdc1 $f0, SC32_FPREGS+0(a0)
+ EX sdc1 $f2, SC32_FPREGS+16(a0)
+ EX sdc1 $f4, SC32_FPREGS+32(a0)
+ EX sdc1 $f6, SC32_FPREGS+48(a0)
+ EX sdc1 $f8, SC32_FPREGS+64(a0)
+ EX sdc1 $f10, SC32_FPREGS+80(a0)
+ EX sdc1 $f12, SC32_FPREGS+96(a0)
+ EX sdc1 $f14, SC32_FPREGS+112(a0)
+ EX sdc1 $f16, SC32_FPREGS+128(a0)
+ EX sdc1 $f18, SC32_FPREGS+144(a0)
+ EX sdc1 $f20, SC32_FPREGS+160(a0)
+ EX sdc1 $f22, SC32_FPREGS+176(a0)
+ EX sdc1 $f24, SC32_FPREGS+192(a0)
+ EX sdc1 $f26, SC32_FPREGS+208(a0)
+ EX sdc1 $f28, SC32_FPREGS+224(a0)
+ EX sdc1 $f30, SC32_FPREGS+240(a0)
+ EX sw t1, SC32_FPC_CSR(a0)
+ cfc1 t0, $0 # implementation/version
+ EX sw t0, SC32_FPC_EIR(a0)
+
+ jr ra
+ li v0, 0 # success
+ END(_save_fp_context32)
+#endif
+
/*
* Restore FPU state:
* - fp gp registers
* - cp1 status/control register
- *
- * We base the decision which registers to restore from the signal stack
- * frame on the current content of c0_status, not on the content of the
- * stack frame which might have been changed by the user.
*/
LEAF(_restore_fp_context)
- li v0, 0 # assume success
- EX(lw t0,SC_FPC_CSR(a0))
-
- /*
- * Restore the 16 even double precision registers
- * when cp1 was enabled in the cp0 status register.
- */
- EX(ldc1 $f0,(SC_FPREGS+0)(a0))
- EX(ldc1 $f2,(SC_FPREGS+16)(a0))
- EX(ldc1 $f4,(SC_FPREGS+32)(a0))
- EX(ldc1 $f6,(SC_FPREGS+48)(a0))
- EX(ldc1 $f8,(SC_FPREGS+64)(a0))
- EX(ldc1 $f10,(SC_FPREGS+80)(a0))
- EX(ldc1 $f12,(SC_FPREGS+96)(a0))
- EX(ldc1 $f14,(SC_FPREGS+112)(a0))
- EX(ldc1 $f16,(SC_FPREGS+128)(a0))
- EX(ldc1 $f18,(SC_FPREGS+144)(a0))
- EX(ldc1 $f20,(SC_FPREGS+160)(a0))
- EX(ldc1 $f22,(SC_FPREGS+176)(a0))
- EX(ldc1 $f24,(SC_FPREGS+192)(a0))
- EX(ldc1 $f26,(SC_FPREGS+208)(a0))
- EX(ldc1 $f28,(SC_FPREGS+224)(a0))
- EX(ldc1 $f30,(SC_FPREGS+240)(a0))
+ EX lw t0, SC_FPC_CSR(a0)
+#ifdef CONFIG_MIPS64
+ EX ldc1 $f1, SC_FPREGS+8(a0)
+ EX ldc1 $f3, SC_FPREGS+24(a0)
+ EX ldc1 $f5, SC_FPREGS+40(a0)
+ EX ldc1 $f7, SC_FPREGS+56(a0)
+ EX ldc1 $f9, SC_FPREGS+72(a0)
+ EX ldc1 $f11, SC_FPREGS+88(a0)
+ EX ldc1 $f13, SC_FPREGS+104(a0)
+ EX ldc1 $f15, SC_FPREGS+120(a0)
+ EX ldc1 $f17, SC_FPREGS+136(a0)
+ EX ldc1 $f19, SC_FPREGS+152(a0)
+ EX ldc1 $f21, SC_FPREGS+168(a0)
+ EX ldc1 $f23, SC_FPREGS+184(a0)
+ EX ldc1 $f25, SC_FPREGS+200(a0)
+ EX ldc1 $f27, SC_FPREGS+216(a0)
+ EX ldc1 $f29, SC_FPREGS+232(a0)
+ EX ldc1 $f31, SC_FPREGS+248(a0)
+#endif
+ EX ldc1 $f0, SC_FPREGS+0(a0)
+ EX ldc1 $f2, SC_FPREGS+16(a0)
+ EX ldc1 $f4, SC_FPREGS+32(a0)
+ EX ldc1 $f6, SC_FPREGS+48(a0)
+ EX ldc1 $f8, SC_FPREGS+64(a0)
+ EX ldc1 $f10, SC_FPREGS+80(a0)
+ EX ldc1 $f12, SC_FPREGS+96(a0)
+ EX ldc1 $f14, SC_FPREGS+112(a0)
+ EX ldc1 $f16, SC_FPREGS+128(a0)
+ EX ldc1 $f18, SC_FPREGS+144(a0)
+ EX ldc1 $f20, SC_FPREGS+160(a0)
+ EX ldc1 $f22, SC_FPREGS+176(a0)
+ EX ldc1 $f24, SC_FPREGS+192(a0)
+ EX ldc1 $f26, SC_FPREGS+208(a0)
+ EX ldc1 $f28, SC_FPREGS+224(a0)
+ EX ldc1 $f30, SC_FPREGS+240(a0)
+ ctc1 t0, fcr31
jr ra
- ctc1 t0,fcr31
+ li v0, 0 # success
END(_restore_fp_context)
+
+#ifdef CONFIG_MIPS64
+LEAF(_restore_fp_context32)
+ /* Restore an o32 sigcontext. */
+ EX lw t0, SC32_FPC_CSR(a0)
+ EX ldc1 $f0, SC32_FPREGS+0(a0)
+ EX ldc1 $f2, SC32_FPREGS+16(a0)
+ EX ldc1 $f4, SC32_FPREGS+32(a0)
+ EX ldc1 $f6, SC32_FPREGS+48(a0)
+ EX ldc1 $f8, SC32_FPREGS+64(a0)
+ EX ldc1 $f10, SC32_FPREGS+80(a0)
+ EX ldc1 $f12, SC32_FPREGS+96(a0)
+ EX ldc1 $f14, SC32_FPREGS+112(a0)
+ EX ldc1 $f16, SC32_FPREGS+128(a0)
+ EX ldc1 $f18, SC32_FPREGS+144(a0)
+ EX ldc1 $f20, SC32_FPREGS+160(a0)
+ EX ldc1 $f22, SC32_FPREGS+176(a0)
+ EX ldc1 $f24, SC32_FPREGS+192(a0)
+ EX ldc1 $f26, SC32_FPREGS+208(a0)
+ EX ldc1 $f28, SC32_FPREGS+224(a0)
+ EX ldc1 $f30, SC32_FPREGS+240(a0)
+ ctc1 t0, fcr31
+ jr ra
+ li v0, 0 # success
+ END(_restore_fp_context32)
.set reorder
+#endif
.type fault@function
.ent fault
-fault: li v0, -EFAULT
+fault: li v0, -EFAULT # failure
jr ra
.end fault
diff -Nru a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
--- a/arch/mips/kernel/r4k_switch.S Sun Aug 3 13:14:52 2003
+++ b/arch/mips/kernel/r4k_switch.S Sun Aug 3 13:14:52 2003
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002 by Ralf Baechle
+ * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1994, 1995, 1996, by Andreas Busse
* Copyright (C) 1999 Silicon Graphics, Inc.
@@ -25,79 +25,86 @@
#include <asm/asmmacro.h>
-#define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
+ .set mips3
+
+/*
+ * Offset to the current process status flags, the first 32 bytes of the
+ * stack are not used.
+ */
+#define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
/*
* FPU context is saved iff the process has used it's FPU in the current
- * time slice as indicated by TIF_USEDFPU. In any case, the CU1 bit for user
+ * time slice as indicated by _TIF_USEDFPU. In any case, the CU1 bit for user
* space STATUS register should be 0, so that a process *always* starts its
* userland with FPU disabled after each context switch.
*
- * FPU will be enabled as soon as the process accesses FPU again, through
+ * FPU will be enabled as soon as the process accesses FPU again, through
* do_cpu() trap.
*/
/*
- * task_struct *r4xx0_resume(task_struct *prev, task_struct *next,
- * struct thread_info *next_ti)
+ * task_struct *resume(task_struct *prev, task_struct *next,
+ * struct thread_info *next_ti)
*/
.align 5
LEAF(resume)
#ifndef CONFIG_CPU_HAS_LLSC
- sw zero, ll_bit
+ sw zero, ll_bit
#endif
mfc0 t1, CP0_STATUS
- sw t1, THREAD_STATUS(a0)
- CPU_SAVE_NONSCRATCH(a0)
- sw ra, THREAD_REG31(a0)
+ LONG_S t1, THREAD_STATUS(a0)
+ cpu_save_nonscratch a0
+ LONG_S ra, THREAD_REG31(a0)
- /*
+ /*
* check if we need to save FPU registers
*/
- lw t3, TASK_THREAD_INFO(a0)
- lw t0, TI_FLAGS(t3)
+ PTR_L t3, TASK_THREAD_INFO(a0)
+ LONG_L t0, TI_FLAGS(t3)
li t1, _TIF_USEDFPU
and t2, t0, t1
beqz t2, 1f
nor t1, zero, t1
and t0, t0, t1
- sw t0, TI_FLAGS(t3)
+ LONG_S t0, TI_FLAGS(t3)
/*
* clear saved user stack CU1 bit
*/
- lw t0, ST_OFF(t3)
+ LONG_L t0, ST_OFF(t3)
li t1, ~ST0_CU1
and t0, t0, t1
- sw t0, ST_OFF(t3)
-
- FPU_SAVE_DOUBLE(a0, t0) # clobbers t0
+ LONG_S t0, ST_OFF(t3)
+#ifdef CONFIG_MIPS32
+ fpu_save_double a0 t0 # clobbers t0
+#endif
+#ifdef CONFIG_MIPS64
+ sll t2, t0, 5
+ bgez t2, 2f
+ sdc1 $f0, (THREAD_FPU + 0x00)(a0)
+ fpu_save_16odd a0
+2:
+ fpu_save_16even a0 t1 # clobbers t1
+#endif
1:
+
/*
* The order of restoring the registers takes care of the race
* updating $28, $29 and kernelsp without disabling ints.
*/
move $28, a2
- CPU_RESTORE_NONSCRATCH(a1)
+ cpu_restore_nonscratch a1
- addiu t0, $28, KERNEL_STACK_SIZE-32
-#ifdef CONFIG_SMP
- mfc0 a3, CP0_CONTEXT
- la t1, kernelsp
- srl a3, 23
- sll a3, 2
- addu t1, a3, t1
- sw t0, (t1)
-#else
- sw t0, kernelsp
-#endif
+ PTR_ADDIU t0, $28, _THREAD_SIZE - 32
+ set_saved_sp t0, t1, t2
mfc0 t1, CP0_STATUS /* Do we really need this? */
li a3, 0xff00
and t1, a3
- lw a2, THREAD_STATUS(a1)
+ LONG_L a2, THREAD_STATUS(a1)
nor a3, $0, a3
and a2, a3
or a2, t1
@@ -110,7 +117,18 @@
* Save a thread's fp context.
*/
LEAF(_save_fp)
- FPU_SAVE_DOUBLE(a0, t1) # clobbers t1
+#ifdef CONFIG_MIPS32
+ fpu_save_double a0 t1 # clobbers t1
+#endif
+#ifdef CONFIG_MIPS64
+ mfc0 t0, CP0_STATUS
+ sll t1, t0, 5
+ bgez t1, 1f # 16 register mode?
+ fpu_save_16odd a0
+1:
+ fpu_save_16even a0 t1 # clobbers t1
+ sdc1 $f0, (THREAD_FPU + 0x00)(a0)
+#endif
jr ra
END(_save_fp)
@@ -118,7 +136,19 @@
* Restore a thread's fp context.
*/
LEAF(_restore_fp)
- FPU_RESTORE_DOUBLE(a0, t1) # clobbers t1
+#ifdef CONFIG_MIPS32
+ fpu_restore_double a0, t1 # clobbers t1
+#endif
+#ifdef CONFIG_MIPS64
+ mfc0 t0, CP0_STATUS
+ sll t1, t0, 5
+ bgez t1, 1f # 16 register mode?
+
+ fpu_restore_16odd a0
+1: fpu_restore_16even a0, t0 # clobbers t0
+ ldc1 $f0, (THREAD_FPU + 0x00)(a0)
+#endif
+
jr ra
END(_restore_fp)
@@ -133,33 +163,55 @@
#define FPU_DEFAULT 0x00000000
LEAF(_init_fpu)
- .set mips3
mfc0 t0, CP0_STATUS
li t1, ST0_CU1
or t0, t1
mtc0 t0, CP0_STATUS
- FPU_ENABLE_HAZARD
+ fpu_enable_hazard
li t1, FPU_DEFAULT
ctc1 t1, fcr31
- li t0, -1
+ li t1, -1 # SNaN
+
+#ifdef CONFIG_MIPS64
+ sll t0, t0, 5
+ bgez t0, 1f # 16 / 32 register mode?
+
+ dmtc1 t1, $f1
+ dmtc1 t1, $f3
+ dmtc1 t1, $f5
+ dmtc1 t1, $f7
+ dmtc1 t1, $f9
+ dmtc1 t1, $f11
+ dmtc1 t1, $f13
+ dmtc1 t1, $f15
+ dmtc1 t1, $f17
+ dmtc1 t1, $f19
+ dmtc1 t1, $f21
+ dmtc1 t1, $f23
+ dmtc1 t1, $f25
+ dmtc1 t1, $f27
+ dmtc1 t1, $f29
+ dmtc1 t1, $f31
+1:
+#endif
- dmtc1 t0, $f0
- dmtc1 t0, $f2
- dmtc1 t0, $f4
- dmtc1 t0, $f6
- dmtc1 t0, $f8
- dmtc1 t0, $f10
- dmtc1 t0, $f12
- dmtc1 t0, $f14
- dmtc1 t0, $f16
- dmtc1 t0, $f18
- dmtc1 t0, $f20
- dmtc1 t0, $f22
- dmtc1 t0, $f24
- dmtc1 t0, $f26
- dmtc1 t0, $f28
- dmtc1 t0, $f30
+ dmtc1 t1, $f0
+ dmtc1 t1, $f2
+ dmtc1 t1, $f4
+ dmtc1 t1, $f6
+ dmtc1 t1, $f8
+ dmtc1 t1, $f10
+ dmtc1 t1, $f12
+ dmtc1 t1, $f14
+ dmtc1 t1, $f16
+ dmtc1 t1, $f18
+ dmtc1 t1, $f20
+ dmtc1 t1, $f22
+ dmtc1 t1, $f24
+ dmtc1 t1, $f26
+ dmtc1 t1, $f28
+ dmtc1 t1, $f30
jr ra
END(_init_fpu)
diff -Nru a/arch/mips/kernel/reg.c b/arch/mips/kernel/reg.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/reg.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,69 @@
+/*
+ * offset.c: Calculate pt_regs and task_struct indices.
+ *
+ * Copyright (C) 1996 David S. Miller
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle
+ */
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+
+#include <asm/ptrace.h>
+#include <asm/processor.h>
+
+#define text(t) __asm__("\n@@@" t)
+#define _offset(type, member) ((unsigned long) &(((type *)NULL)->member))
+#define index(string, ptr, member) \
+ __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)/sizeof(long)))
+#define size(string, size) \
+ __asm__("\n@@@" string "%0" : : "i" (sizeof(size)))
+#define linefeed text("")
+
+void output_ptreg_defines(void)
+{
+ text("/* MIPS pt_regs indices. */");
+ index("#define EF_R0 ", struct pt_regs, regs[0]);
+ index("#define EF_R1 ", struct pt_regs, regs[1]);
+ index("#define EF_R2 ", struct pt_regs, regs[2]);
+ index("#define EF_R3 ", struct pt_regs, regs[3]);
+ index("#define EF_R4 ", struct pt_regs, regs[4]);
+ index("#define EF_R5 ", struct pt_regs, regs[5]);
+ index("#define EF_R6 ", struct pt_regs, regs[6]);
+ index("#define EF_R7 ", struct pt_regs, regs[7]);
+ index("#define EF_R8 ", struct pt_regs, regs[8]);
+ index("#define EF_R9 ", struct pt_regs, regs[9]);
+ index("#define EF_R10 ", struct pt_regs, regs[10]);
+ index("#define EF_R11 ", struct pt_regs, regs[11]);
+ index("#define EF_R12 ", struct pt_regs, regs[12]);
+ index("#define EF_R13 ", struct pt_regs, regs[13]);
+ index("#define EF_R14 ", struct pt_regs, regs[14]);
+ index("#define EF_R15 ", struct pt_regs, regs[15]);
+ index("#define EF_R16 ", struct pt_regs, regs[16]);
+ index("#define EF_R17 ", struct pt_regs, regs[17]);
+ index("#define EF_R18 ", struct pt_regs, regs[18]);
+ index("#define EF_R19 ", struct pt_regs, regs[19]);
+ index("#define EF_R20 ", struct pt_regs, regs[20]);
+ index("#define EF_R21 ", struct pt_regs, regs[21]);
+ index("#define EF_R22 ", struct pt_regs, regs[22]);
+ index("#define EF_R23 ", struct pt_regs, regs[23]);
+ index("#define EF_R24 ", struct pt_regs, regs[24]);
+ index("#define EF_R25 ", struct pt_regs, regs[25]);
+ index("#define EF_R26 ", struct pt_regs, regs[26]);
+ index("#define EF_R27 ", struct pt_regs, regs[27]);
+ index("#define EF_R28 ", struct pt_regs, regs[28]);
+ index("#define EF_R29 ", struct pt_regs, regs[29]);
+ index("#define EF_R30 ", struct pt_regs, regs[30]);
+ index("#define EF_R31 ", struct pt_regs, regs[31]);
+ linefeed;
+ index("#define EF_LO ", struct pt_regs, lo);
+ index("#define EF_HI ", struct pt_regs, hi);
+ linefeed;
+ index("#define EF_EPC ", struct pt_regs, cp0_epc);
+ index("#define EF_BVADDR ", struct pt_regs, cp0_badvaddr);
+ index("#define EF_STATUS ", struct pt_regs, cp0_status);
+ index("#define EF_CAUSE ", struct pt_regs, cp0_cause);
+ linefeed;
+ size("#define EF_SIZE ", struct pt_regs);
+ linefeed;
+}
diff -Nru a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/scall32-o32.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,632 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle
+ * Copyright (C) 2001 MIPS Technologies, Inc.
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/asmmacro.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/isadep.h>
+#include <asm/sysmips.h>
+#include <asm/thread_info.h>
+#include <asm/unistd.h>
+#include <asm/offset.h>
+
+/* Highest syscall used of any syscall flavour */
+#define MAX_SYSCALL_NO __NR_O32_Linux + __NR_O32_Linux_syscalls
+
+ .align 5
+NESTED(handle_sys, PT_SIZE, sp)
+ .set noat
+ SAVE_SOME
+ STI
+ .set at
+
+ lw t1, PT_EPC(sp) # skip syscall on return
+
+ sltiu t0, v0, MAX_SYSCALL_NO + 1 # check syscall number
+ addiu t1, 4 # skip to next instruction
+ beqz t0, illegal_syscall
+ sw t1, PT_EPC(sp)
+
+ /* XXX Put both in one cacheline, should save a bit. */
+ sll t0, v0, 2
+ lw t2, sys_call_table(t0) # syscall routine
+ lbu t3, sys_narg_table(v0) # number of arguments
+ beqz t2, illegal_syscall;
+
+ subu t0, t3, 5 # 5 or more arguments?
+ sw a3, PT_R26(sp) # save a3 for syscall restarting
+ bgez t0, stackargs
+
+stack_done:
+ sw a3, PT_R26(sp) # save for syscall restart
+ LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
+ li t1, _TIF_SYSCALL_TRACE
+ and t0, t1, t0
+ bnez t0, syscall_trace_entry # -> yes
+
+ jalr t2 # Do The Real Thing (TM)
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sw t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sw v0, PT_R0(sp) # set flag for syscall
+ # restarting
+1: sw v0, PT_R2(sp) # result
+
+EXPORT(o32_syscall_exit)
+ local_irq_disable # make sure need_resched and
+ # signals dont change between
+ # sampling and return
+ LONG_L a2, TI_FLAGS($28) # current->work
+ li t0, _TIF_ALLWORK_MASK
+ and t0, a2, t0
+ bnez a2, o32_syscall_exit_work
+
+ RESTORE_SOME
+ RESTORE_SP_AND_RET
+
+o32_syscall_exit_work:
+ SAVE_STATIC
+ j syscall_exit_work
+
+/* ------------------------------------------------------------------------ */
+
+syscall_trace_entry:
+ SAVE_STATIC
+ sw t2, PT_R1(sp)
+ jal do_syscall_trace
+ lw t2, PT_R1(sp)
+
+ lw a0, PT_R4(sp) # Restore argument registers
+ lw a1, PT_R5(sp)
+ lw a2, PT_R6(sp)
+ lw a3, PT_R7(sp)
+ jalr t2
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sw t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sw v0, PT_R0(sp) # set flag for syscall
+ # restarting
+1: sw v0, PT_R2(sp) # result
+
+ j syscall_exit
+
+/* ------------------------------------------------------------------------ */
+
+ /*
+ * More than four arguments. Try to deal with it by copying the
+ * stack arguments from the user stack to the kernel stack.
+ * This Sucks (TM).
+ */
+stackargs:
+ lw t0, PT_R29(sp) # get old user stack pointer
+ subu t3, 4
+ sll t1, t3, 2 # stack valid?
+
+ addu t1, t0 # end address
+ or t0, t1
+ bltz t0, bad_stack # -> sp is bad
+
+ lw t0, PT_R29(sp) # get old user stack pointer
+ PTR_LA t1, 3f # copy 1 to 2 arguments
+ sll t3, t3, 4
+ subu t1, t3
+ jr t1
+
+ /* Ok, copy the args from the luser stack to the kernel stack */
+ /*
+ * I know Ralf doesn't like nops but this avoids code
+ * duplication for R3000 targets (and this is the
+ * only place where ".set reorder" doesn't help).
+ * Harald.
+ */
+ .set push
+ .set noreorder
+ .set nomacro
+1: lw t1, 20(t0) # argument #6 from usp
+ nop
+ sw t1, 20(sp)
+ nop
+2: lw t1, 16(t0) # argument #5 from usp
+ nop
+ sw t1, 16(sp)
+ nop
+3: .set pop
+
+ j stack_done # go back
+
+ .section __ex_table,"a"
+ PTR 1b,bad_stack
+ PTR 2b,bad_stack
+ .previous
+
+ /*
+ * The stackpointer for a call with more than 4 arguments is bad.
+ * We probably should handle this case a bit more drastic.
+ */
+bad_stack:
+ negu v0 # error
+ sw v0, PT_R0(sp)
+ sw v0, PT_R2(sp)
+ li t0, 1 # set error flag
+ sw t0, PT_R7(sp)
+ j o32_syscall_exit
+
+ /*
+ * The system call does not exist in this kernel
+ */
+illegal_syscall:
+ li v0, ENOSYS # error
+ sw v0, PT_R2(sp)
+ li t0, 1 # set error flag
+ sw t0, PT_R7(sp)
+ j o32_syscall_exit
+ END(handle_sys)
+
+ LEAF(mips_atomic_set)
+ andi v0, a1, 3 # must be word aligned
+ bnez v0, bad_alignment
+
+ lw v1, TI_ADDR_LIMIT($28) # in legal address range?
+ addiu a0, a1, 4
+ or a0, a0, a1
+ and a0, a0, v1
+ bltz a0, bad_address
+
+#ifdef CONFIG_CPU_HAS_LLSC
+ /* Ok, this is the ll/sc case. World is sane :-) */
+1: ll v0, (a1)
+ move a0, a2
+2: sc a0, (a1)
+ beqz a0, 1b
+
+ .section __ex_table,"a"
+ PTR 1b, bad_stack
+ PTR 2b, bad_stack
+ .previous
+#else
+ sw a1, 16(sp)
+ sw a2, 20(sp)
+
+ move a0, sp
+ move a2, a1
+ li a1, 1
+ jal do_page_fault
+
+ lw a1, 16(sp)
+ lw a2, 20(sp)
+
+ /*
+ * At this point the page should be readable and writable unless
+ * there was no more memory available.
+ */
+1: lw v0, (a1)
+2: sw a2, (a1)
+
+ .section __ex_table,"a"
+ PTR 1b, no_mem
+ PTR 2b, no_mem
+ .previous
+#endif
+
+ sw v0, PT_R2(sp) # result
+1:
+
+ /* Success, so skip usual error handling garbage. */
+ LONG_L a2, TI_FLAGS($28) # syscall tracing enabled?
+ li t0, _TIF_SYSCALL_TRACE
+ and t0, a2, t0
+ bnez t0, 1f
+
+ b o32_syscall_exit
+
+1: SAVE_STATIC
+ jal do_syscall_trace
+ j syscall_exit
+
+no_mem: li v0, -ENOMEM
+ jr ra
+
+bad_address:
+ li v0, -EFAULT
+ jr ra
+
+bad_alignment:
+ li v0, -EINVAL
+ jr ra
+ END(mips_atomic_set)
+
+ LEAF(sys_sysmips)
+ beq a0, MIPS_ATOMIC_SET, mips_atomic_set
+ j _sys_sysmips
+ END(sys_sysmips)
+
+ LEAF(sys_syscall)
+ lw t0, PT_R29(sp) # user sp
+
+ sltu v0, a0, __NR_O32_Linux + __NR_O32_Linux_syscalls + 1
+ beqz v0, enosys
+
+ sll v0, a0, 2
+ la v1, sys_syscall
+ lw t2, sys_call_table(v0) # function pointer
+ lbu t4, sys_narg_table(a0) # number of arguments
+
+ li v0, -EINVAL
+ beq t2, v1, out # do not recurse
+
+ beqz t2, enosys # null function pointer?
+
+ andi v0, t0, 0x3 # unaligned stack pointer?
+ bnez v0, sigsegv
+
+ addu v0, t0, 16 # v0 = usp + 16
+ addu t1, v0, 12 # 3 32-bit arguments
+ lw v1, TI_ADDR_LIMIT($28)
+ or v0, v0, t1
+ and v1, v1, v0
+ bltz v1, efault
+
+ move a0, a1 # shift argument registers
+ move a1, a2
+ move a2, a3
+
+1: lw a3, 16(t0)
+2: lw t3, 20(t0)
+3: lw t4, 24(t0)
+
+ .section __ex_table, "a"
+ .word 1b, efault
+ .word 2b, efault
+ .word 3b, efault
+ .previous
+
+ sw t3, 16(sp) # put into new stackframe
+ sw t4, 20(sp)
+
+ bnez t4, 1f # zero arguments?
+ addu a0, sp, 32 # then pass sp in a0
+1:
+
+ sw t3, 16(sp)
+ sw v1, 20(sp)
+ jr t2
+ /* Unreached */
+
+enosys: li v0, -ENOSYS
+ b out
+
+sigsegv:
+ li a0, _SIGSEGV
+ move a1, $28
+ jal force_sig
+ /* Fall through */
+
+efault: li v0, -EFAULT
+
+out: jr ra
+ END(sys_syscall)
+
+ .macro fifty ptr, nargs, from=1, to=50
+ sys \ptr \nargs
+ .if \to-\from
+ fifty \ptr,\nargs,"(\from+1)",\to
+ .endif
+ .endm
+
+ .macro mille ptr, nargs, from=1, to=20
+ fifty \ptr,\nargs
+ .if \to-\from
+ mille \ptr,\nargs,"(\from+1)",\to
+ .endif
+ .endm
+
+ .macro syscalltable
+ mille sys_ni_syscall 0 /* 0 - 999 SVR4 flavour */
+ #include "irix5sys.h" /* 1000 - 1999 32-bit IRIX */
+ mille sys_ni_syscall 0 /* 2000 - 2999 BSD43 flavour */
+ mille sys_ni_syscall 0 /* 3000 - 3999 POSIX flavour */
+
+ sys sys_syscall 0 /* 4000 */
+ sys sys_exit 1
+ sys sys_fork 0
+ sys sys_read 3
+ sys sys_write 3
+ sys sys_open 3 /* 4005 */
+ sys sys_close 1
+ sys sys_waitpid 3
+ sys sys_creat 2
+ sys sys_link 2
+ sys sys_unlink 1 /* 4010 */
+ sys sys_execve 0
+ sys sys_chdir 1
+ sys sys_time 1
+ sys sys_mknod 3
+ sys sys_chmod 2 /* 4015 */
+ sys sys_lchown 3
+ sys sys_ni_syscall 0
+ sys sys_ni_syscall 0 /* was sys_stat */
+ sys sys_lseek 3
+ sys sys_getpid 0 /* 4020 */
+ sys sys_mount 5
+ sys sys_oldumount 1
+ sys sys_setuid 1
+ sys sys_getuid 0
+ sys sys_stime 1 /* 4025 */
+ sys sys_ptrace 4
+ sys sys_alarm 1
+ sys sys_ni_syscall 0 /* was sys_fstat */
+ sys sys_pause 0
+ sys sys_utime 2 /* 4030 */
+ sys sys_ni_syscall 0
+ sys sys_ni_syscall 0
+ sys sys_access 2
+ sys sys_nice 1
+ sys sys_ni_syscall 0 /* 4035 */
+ sys sys_sync 0
+ sys sys_kill 2
+ sys sys_rename 2
+ sys sys_mkdir 2
+ sys sys_rmdir 1 /* 4040 */
+ sys sys_dup 1
+ sys sys_pipe 0
+ sys sys_times 1
+ sys sys_ni_syscall 0
+ sys sys_brk 1 /* 4045 */
+ sys sys_setgid 1
+ sys sys_getgid 0
+ sys sys_ni_syscall 0 /* was signal(2) */
+ sys sys_geteuid 0
+ sys sys_getegid 0 /* 4050 */
+ sys sys_acct 0
+ sys sys_umount 2
+ sys sys_ni_syscall 0
+ sys sys_ioctl 3
+ sys sys_fcntl 3 /* 4055 */
+ sys sys_ni_syscall 2
+ sys sys_setpgid 2
+ sys sys_ni_syscall 0
+ sys sys_olduname 1
+ sys sys_umask 1 /* 4060 */
+ sys sys_chroot 1
+ sys sys_ustat 2
+ sys sys_dup2 2
+ sys sys_getppid 0
+ sys sys_getpgrp 0 /* 4065 */
+ sys sys_setsid 0
+ sys sys_sigaction 3
+ sys sys_sgetmask 0
+ sys sys_ssetmask 1
+ sys sys_setreuid 2 /* 4070 */
+ sys sys_setregid 2
+ sys sys_sigsuspend 0
+ sys sys_sigpending 1
+ sys sys_sethostname 2
+ sys sys_setrlimit 2 /* 4075 */
+ sys sys_getrlimit 2
+ sys sys_getrusage 2
+ sys sys_gettimeofday 2
+ sys sys_settimeofday 2
+ sys sys_getgroups 2 /* 4080 */
+ sys sys_setgroups 2
+ sys sys_ni_syscall 0 /* old_select */
+ sys sys_symlink 2
+ sys sys_ni_syscall 0 /* was sys_lstat */
+ sys sys_readlink 3 /* 4085 */
+ sys sys_uselib 1
+ sys sys_swapon 2
+ sys sys_reboot 3
+ sys old_readdir 3
+ sys old_mmap 6 /* 4090 */
+ sys sys_munmap 2
+ sys sys_truncate 2
+ sys sys_ftruncate 2
+ sys sys_fchmod 2
+ sys sys_fchown 3 /* 4095 */
+ sys sys_getpriority 2
+ sys sys_setpriority 3
+ sys sys_ni_syscall 0
+ sys sys_statfs 2
+ sys sys_fstatfs 2 /* 4100 */
+ sys sys_ni_syscall 0 /* was ioperm(2) */
+ sys sys_socketcall 2
+ sys sys_syslog 3
+ sys sys_setitimer 3
+ sys sys_getitimer 2 /* 4105 */
+ sys sys_newstat 2
+ sys sys_newlstat 2
+ sys sys_newfstat 2
+ sys sys_uname 1
+ sys sys_ni_syscall 0 /* 4110 was iopl(2) */
+ sys sys_vhangup 0
+ sys sys_ni_syscall 0 /* was sys_idle() */
+ sys sys_ni_syscall 0 /* was sys_vm86 */
+ sys sys_wait4 4
+ sys sys_swapoff 1 /* 4115 */
+ sys sys_sysinfo 1
+ sys sys_ipc 6
+ sys sys_fsync 1
+ sys sys_sigreturn 0
+ sys sys_clone 0 /* 4120 */
+ sys sys_setdomainname 2
+ sys sys_newuname 1
+ sys sys_ni_syscall 0 /* sys_modify_ldt */
+ sys sys_adjtimex 1
+ sys sys_mprotect 3 /* 4125 */
+ sys sys_sigprocmask 3
+ sys sys_ni_syscall 0 /* was create_module */
+ sys sys_init_module 5
+ sys sys_delete_module 1
+ sys sys_ni_syscall 0 /* 4130 was get_kernel_syms */
+ sys sys_quotactl 0
+ sys sys_getpgid 1
+ sys sys_fchdir 1
+ sys sys_bdflush 2
+ sys sys_sysfs 3 /* 4135 */
+ sys sys_personality 1
+ sys sys_ni_syscall 0 /* for afs_syscall */
+ sys sys_setfsuid 1
+ sys sys_setfsgid 1
+ sys sys_llseek 5 /* 4140 */
+ sys sys_getdents 3
+ sys sys_select 5
+ sys sys_flock 2
+ sys sys_msync 3
+ sys sys_readv 3 /* 4145 */
+ sys sys_writev 3
+ sys sys_cacheflush 3
+ sys sys_cachectl 3
+ sys sys_sysmips 4
+ sys sys_ni_syscall 0 /* 4150 */
+ sys sys_getsid 1
+ sys sys_fdatasync 0
+ sys sys_sysctl 1
+ sys sys_mlock 2
+ sys sys_munlock 2 /* 4155 */
+ sys sys_mlockall 1
+ sys sys_munlockall 0
+ sys sys_sched_setparam 2
+ sys sys_sched_getparam 2
+ sys sys_sched_setscheduler 3 /* 4160 */
+ sys sys_sched_getscheduler 1
+ sys sys_sched_yield 0
+ sys sys_sched_get_priority_max 1
+ sys sys_sched_get_priority_min 1
+ sys sys_sched_rr_get_interval 2 /* 4165 */
+ sys sys_nanosleep, 2
+ sys sys_mremap, 4
+ sys sys_accept 3
+ sys sys_bind 3
+ sys sys_connect 3 /* 4170 */
+ sys sys_getpeername 3
+ sys sys_getsockname 3
+ sys sys_getsockopt 5
+ sys sys_listen 2
+ sys sys_recv 4 /* 4175 */
+ sys sys_recvfrom 6
+ sys sys_recvmsg 3
+ sys sys_send 4
+ sys sys_sendmsg 3
+ sys sys_sendto 6 /* 4180 */
+ sys sys_setsockopt 5
+ sys sys_shutdown 2
+ sys sys_socket 3
+ sys sys_socketpair 4
+ sys sys_setresuid 3 /* 4185 */
+ sys sys_getresuid 3
+ sys sys_ni_syscall 0 /* was sys_query_module */
+ sys sys_poll 3
+ sys sys_nfsservctl 3
+ sys sys_setresgid 3 /* 4190 */
+ sys sys_getresgid 3
+ sys sys_prctl 5
+ sys sys_rt_sigreturn 0
+ sys sys_rt_sigaction 4
+ sys sys_rt_sigprocmask 4 /* 4195 */
+ sys sys_rt_sigpending 2
+ sys sys_rt_sigtimedwait 4
+ sys sys_rt_sigqueueinfo 3
+ sys sys_rt_sigsuspend 0
+ sys sys_pread64 6 /* 4200 */
+ sys sys_pwrite64 6
+ sys sys_chown 3
+ sys sys_getcwd 2
+ sys sys_capget 2
+ sys sys_capset 2 /* 4205 */
+ sys sys_sigaltstack 0
+ sys sys_sendfile 4
+ sys sys_ni_syscall 0
+ sys sys_ni_syscall 0
+ sys sys_mmap2 6 /* 4210 */
+ sys sys_truncate64 4
+ sys sys_ftruncate64 4
+ sys sys_stat64 2
+ sys sys_lstat64 2
+ sys sys_fstat64 2 /* 4215 */
+ sys sys_pivot_root 2
+ sys sys_mincore 3
+ sys sys_madvise 3
+ sys sys_getdents64 3
+ sys sys_fcntl64 3 /* 4220 */
+ sys sys_ni_syscall 0
+ sys sys_gettid 0
+ sys sys_readahead 5
+ sys sys_setxattr 5
+ sys sys_lsetxattr 5 /* 4225 */
+ sys sys_fsetxattr 5
+ sys sys_getxattr 4
+ sys sys_lgetxattr 4
+ sys sys_fgetxattr 4
+ sys sys_listxattr 3 /* 4230 */
+ sys sys_llistxattr 3
+ sys sys_flistxattr 3
+ sys sys_removexattr 2
+ sys sys_lremovexattr 2
+ sys sys_fremovexattr 2 /* 4235 */
+ sys sys_tkill 2
+ sys sys_sendfile64 5
+ sys sys_futex 2
+ sys sys_sched_setaffinity 3
+ sys sys_sched_getaffinity 3 /* 4240 */
+ sys sys_io_setup 2
+ sys sys_io_destroy 1
+ sys sys_io_getevents 5
+ sys sys_io_submit 3
+ sys sys_io_cancel 3 /* 4245 */
+ sys sys_exit_group 1
+ sys sys_lookup_dcookie 3
+ sys sys_epoll_create 1
+ sys sys_epoll_ctl 4
+ sys sys_epoll_wait 3 /* 4250 */
+ sys sys_remap_file_pages 5
+ sys sys_set_tid_address 1
+ sys sys_restart_syscall 0
+ sys sys_fadvise64 6
+ sys sys_statfs64 3 /* 4255 */
+ sys sys_fstatfs64 2
+ sys sys_timer_create 3
+ sys sys_timer_settime 4
+ sys sys_timer_gettime 2
+ sys sys_timer_getoverrun 1 /* 4260 */
+ sys sys_timer_delete 1
+ sys sys_clock_settime 2
+ sys sys_clock_gettime 2
+ sys sys_clock_getres 2
+ sys sys_clock_nanosleep 4 /* 4265 */
+ sys sys_tgkill 3
+ sys sys_utimes 2
+
+ .endm
+
+ .macro sys function, nargs
+ PTR \function
+ .endm
+
+ .align 3
+sys_call_table:
+ syscalltable
+ .size sys_call_table, . - sys_call_table
+
+ .macro sys function, nargs
+ .byte \nargs
+ .endm
+
+sys_narg_table:
+ syscalltable
+ .size sys_narg_table, . - sys_narg_table
diff -Nru a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/scall64-64.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,441 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/asmmacro.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/offset.h>
+#include <asm/sysmips.h>
+#include <asm/thread_info.h>
+#include <asm/unistd.h>
+
+#ifndef CONFIG_BINFMT_ELF32
+/* Neither O32 nor N32, so define handle_sys here */
+#define handle_sys64 handle_sys
+#endif
+
+ .align 5
+NESTED(handle_sys64, PT_SIZE, sp)
+#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32)
+ /*
+ * When 32-bit compatibility is configured scall_o32.S
+ * already did this.
+ */
+ .set noat
+ SAVE_SOME
+ STI
+ .set at
+#endif
+ ld t1, PT_EPC(sp) # skip syscall on return
+
+FEXPORT(__handle_sys64)
+ subu t0, v0, __NR_64_Linux # check syscall number
+ sltiu t0, t0, __NR_64_Linux_syscalls + 1
+ daddiu t1, 4 # skip to next instruction
+ beqz t0, illegal_syscall
+ sd t1, PT_EPC(sp)
+
+ dsll t0, v0, 3 # offset into table
+ ld t2, (sys_call_table - (__NR_64_Linux * 8))(t0)
+ # syscall routine
+
+ sd a3, PT_R26(sp) # save a3 for syscall restarting
+
+ LONG_L t0, TI_FLAGS($28)
+ bltz t0, syscall_trace_entry # syscall tracing enabled?
+
+ jalr t2 # Do The Real Thing (TM)
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sd t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sd v0, PT_R0(sp) # set flag for syscall
+ # restarting
+1: sd v0, PT_R2(sp) # result
+
+syscall_exit:
+ local_irq_disable # make sure need_resched and
+ # signals dont change between
+ # sampling and return
+ LONG_L a2, TI_FLAGS($28) # current->work
+ bnez a2, n64_syscall_exit_work
+
+ j restore_all
+
+work_notifysig: # deal with pending signals and
+ # notify-resume requests
+ SAVE_STATIC
+ move a0, sp
+ li a1, 0
+ jal do_notify_resume # a2 already loaded
+ RESTORE_STATIC
+ j restore_all
+
+n64_syscall_exit_work:
+ j syscall_exit_work
+
+/* ------------------------------------------------------------------------ */
+
+syscall_trace_entry:
+ SAVE_STATIC
+ sd t2,PT_R1(sp)
+ jal do_syscall_trace
+ ld t2,PT_R1(sp)
+
+ ld a0, PT_R4(sp) # Restore argument registers
+ ld a1, PT_R5(sp)
+ ld a2, PT_R6(sp)
+ ld a3, PT_R7(sp)
+ jalr t2
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sd t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sd v0, PT_R0(sp) # set flag for syscall restarting
+1: sd v0, PT_R2(sp) # result
+
+ j syscall_exit
+
+illegal_syscall:
+ /* This also isn't a 64-bit syscall, throw an error. */
+ li v0, ENOSYS # error
+ sd v0, PT_R2(sp)
+ li t0, 1 # set error flag
+ sd t0, PT_R7(sp)
+ j syscall_exit
+ END(handle_sys64)
+
+ LEAF(mips_atomic_set)
+ andi v0, a1, 3 # must be word aligned
+ bnez v0, bad_alignment
+
+ LONG_L v1, TI_ADDR_LIMIT($28) # in legal address range?
+ LONG_ADDIU a0, a1, 4
+ or a0, a0, a1
+ and a0, a0, v1
+ bltz a0, bad_address
+
+#ifdef CONFIG_CPU_HAS_LLSC
+ /* Ok, this is the ll/sc case. World is sane :-) */
+1: ll v0, (a1)
+ move a0, a2
+2: sc a0, (a1)
+ beqz a0, 1b
+
+ .section __ex_table,"a"
+ PTR 1b, bad_stack
+ PTR 2b, bad_stack
+ .previous
+#else
+ sw a1, 16(sp)
+ sw a2, 20(sp)
+
+ move a0, sp
+ move a2, a1
+ li a1, 1
+ jal do_page_fault
+
+ lw a1, 16(sp)
+ lw a2, 20(sp)
+
+ /*
+ * At this point the page should be readable and writable unless
+ * there was no more memory available.
+ */
+1: lw v0, (a1)
+2: sw a2, (a1)
+
+ .section __ex_table,"a"
+ PTR 1b, no_mem
+ PTR 2b, no_mem
+ .previous
+#endif
+
+ sw v0, PT_R2(sp) # result
+1:
+
+ /* Success, so skip usual error handling garbage. */
+ LONG_L a2, TI_FLAGS($28) # syscall tracing enabled?
+ li t0, _TIF_SYSCALL_TRACE
+ and t0, a2, t0
+ bnez t0, 1f
+
+ b syscall_exit
+
+1: SAVE_STATIC
+ jal do_syscall_trace
+ j syscall_exit
+
+no_mem: li v0, -ENOMEM
+ jr ra
+
+bad_address:
+ li v0, -EFAULT
+ jr ra
+
+bad_alignment:
+ li v0, -EINVAL
+ jr ra
+ END(mips_atomic_set)
+
+ LEAF(sys_sysmips)
+ beq a0, MIPS_ATOMIC_SET, mips_atomic_set
+ j _sys_sysmips
+ END(sys_sysmips)
+
+ LEAF(sys_syscall) /* Quick'n'dirty ... */
+ move v0, a0
+ move a0, a1
+ move a1, a2
+ move a2, a3
+ move a3, a4
+ move a4, a5
+ move a5, a6
+ j __handle_sys64
+ END(sys_syscall)
+
+ .align 3
+sys_call_table:
+ PTR sys_read /* 5000 */
+ PTR sys_write
+ PTR sys_open
+ PTR sys_close
+ PTR sys_newstat
+ PTR sys_newfstat /* 5005 */
+ PTR sys_newlstat
+ PTR sys_poll
+ PTR sys_lseek
+ PTR sys_mmap2
+ PTR sys_mprotect /* 5010 */
+ PTR sys_munmap
+ PTR sys_brk
+ PTR sys_rt_sigaction
+ PTR sys_rt_sigprocmask
+ PTR sys_ioctl /* 5015 */
+ PTR sys_pread64
+ PTR sys_pwrite64
+ PTR sys_readv
+ PTR sys_writev
+ PTR sys_access /* 5020 */
+ PTR sys_pipe
+ PTR sys_select
+ PTR sys_sched_yield
+ PTR sys_mremap
+ PTR sys_msync /* 5025 */
+ PTR sys_mincore
+ PTR sys_madvise
+ PTR sys_shmget
+ PTR sys_shmat
+ PTR sys_shmctl /* 5030 */
+ PTR sys_dup
+ PTR sys_dup2
+ PTR sys_pause
+ PTR sys_nanosleep
+ PTR sys_getitimer /* 5035 */
+ PTR sys_setitimer
+ PTR sys_alarm
+ PTR sys_getpid
+ PTR sys_sendfile
+ PTR sys_socket /* 5040 */
+ PTR sys_connect
+ PTR sys_accept
+ PTR sys_sendto
+ PTR sys_recvfrom
+ PTR sys_sendmsg /* 5045 */
+ PTR sys_recvmsg
+ PTR sys_shutdown
+ PTR sys_bind
+ PTR sys_listen
+ PTR sys_getsockname /* 5050 */
+ PTR sys_getpeername
+ PTR sys_socketpair
+ PTR sys_setsockopt
+ PTR sys_getsockopt
+ PTR sys_clone /* 5055 */
+ PTR sys_fork
+ PTR sys_execve
+ PTR sys_exit
+ PTR sys_wait4
+ PTR sys_kill /* 5060 */
+ PTR sys_newuname
+ PTR sys_semget
+ PTR sys_semop
+ PTR sys_semctl
+ PTR sys_shmdt /* 5065 */
+ PTR sys_msgget
+ PTR sys_msgsnd
+ PTR sys_msgrcv
+ PTR sys_msgctl
+ PTR sys_fcntl /* 5070 */
+ PTR sys_flock
+ PTR sys_fsync
+ PTR sys_fdatasync
+ PTR sys_truncate
+ PTR sys_ftruncate /* 5075 */
+ PTR sys_getdents
+ PTR sys_getcwd
+ PTR sys_chdir
+ PTR sys_fchdir
+ PTR sys_rename /* 5080 */
+ PTR sys_mkdir
+ PTR sys_rmdir
+ PTR sys_creat
+ PTR sys_link
+ PTR sys_unlink /* 5085 */
+ PTR sys_symlink
+ PTR sys_readlink
+ PTR sys_chmod
+ PTR sys_fchmod
+ PTR sys_chown /* 5090 */
+ PTR sys_fchown
+ PTR sys_lchown
+ PTR sys_umask
+ PTR sys_gettimeofday
+ PTR sys_getrlimit /* 5095 */
+ PTR sys_getrusage
+ PTR sys_sysinfo
+ PTR sys_times
+ PTR sys_ptrace
+ PTR sys_getuid /* 5100 */
+ PTR sys_syslog
+ PTR sys_getgid
+ PTR sys_setuid
+ PTR sys_setgid
+ PTR sys_geteuid /* 5105 */
+ PTR sys_getegid
+ PTR sys_setpgid
+ PTR sys_getppid
+ PTR sys_getpgrp
+ PTR sys_setsid /* 5110 */
+ PTR sys_setreuid
+ PTR sys_setregid
+ PTR sys_getgroups
+ PTR sys_setgroups
+ PTR sys_setresuid /* 5115 */
+ PTR sys_getresuid
+ PTR sys_setresgid
+ PTR sys_getresgid
+ PTR sys_getpgid
+ PTR sys_setfsuid /* 5120 */
+ PTR sys_setfsgid
+ PTR sys_getsid
+ PTR sys_capget
+ PTR sys_capset
+ PTR sys_rt_sigpending /* 5125 */
+ PTR sys_rt_sigtimedwait
+ PTR sys_rt_sigqueueinfo
+ PTR sys_rt_sigsuspend
+ PTR sys_sigaltstack
+ PTR sys_utime /* 5130 */
+ PTR sys_mknod
+ PTR sys_personality
+ PTR sys_ustat
+ PTR sys_statfs
+ PTR sys_fstatfs /* 5135 */
+ PTR sys_sysfs
+ PTR sys_getpriority
+ PTR sys_setpriority
+ PTR sys_sched_setparam
+ PTR sys_sched_getparam /* 5140 */
+ PTR sys_sched_setscheduler
+ PTR sys_sched_getscheduler
+ PTR sys_sched_get_priority_max
+ PTR sys_sched_get_priority_min
+ PTR sys_sched_rr_get_interval /* 5145 */
+ PTR sys_mlock
+ PTR sys_munlock
+ PTR sys_mlockall
+ PTR sys_munlockall
+ PTR sys_vhangup /* 5150 */
+ PTR sys_pivot_root
+ PTR sys_sysctl
+ PTR sys_prctl
+ PTR sys_adjtimex
+ PTR sys_setrlimit /* 5155 */
+ PTR sys_chroot
+ PTR sys_sync
+ PTR sys_acct
+ PTR sys_settimeofday
+ PTR sys_mount /* 5160 */
+ PTR sys_umount
+ PTR sys_swapon
+ PTR sys_swapoff
+ PTR sys_reboot
+ PTR sys_sethostname /* 5165 */
+ PTR sys_setdomainname
+ PTR sys_ni_syscall /* was create_module */
+ PTR sys_init_module
+ PTR sys_delete_module
+ PTR sys_ni_syscall /* 5170, was get_kernel_syms */
+ PTR sys_ni_syscall /* was query_module */
+ PTR sys_quotactl
+ PTR sys_nfsservctl
+ PTR sys_ni_syscall /* res. for getpmsg */
+ PTR sys_ni_syscall /* 5175 for putpmsg */
+ PTR sys_ni_syscall /* res. for afs_syscall */
+ PTR sys_ni_syscall /* res. for security */
+ PTR sys_gettid
+ PTR sys_readahead
+ PTR sys_setxattr /* 5180 */
+ PTR sys_lsetxattr
+ PTR sys_fsetxattr
+ PTR sys_getxattr
+ PTR sys_lgetxattr
+ PTR sys_fgetxattr /* 5185 */
+ PTR sys_listxattr
+ PTR sys_llistxattr
+ PTR sys_flistxattr
+ PTR sys_removexattr
+ PTR sys_lremovexattr /* 5190 */
+ PTR sys_fremovexattr
+ PTR sys_tkill
+ PTR sys_time
+ PTR sys_futex
+ PTR sys_sched_setaffinity /* 5195 */
+ PTR sys_sched_getaffinity
+ PTR sys_cacheflush
+ PTR sys_cachectl
+ PTR sys_sysmips
+ PTR sys_io_setup /* 5200 */
+ PTR sys_io_destroy
+ PTR sys_io_getevents
+ PTR sys_io_submit
+ PTR sys_io_cancel
+ PTR sys_exit_group /* 5205 */
+ PTR sys_lookup_dcookie
+ PTR sys_epoll_create
+ PTR sys_epoll_ctl
+ PTR sys_epoll_wait
+ PTR sys_remap_file_pages /* 5210 */
+ PTR sys_rt_sigreturn
+ PTR sys_set_tid_address
+ PTR sys_restart_syscall
+ PTR sys_semtimedop
+ PTR sys_fadvise64 /* 5215 */
+ PTR sys_timer_create
+ PTR sys_timer_settime
+ PTR sys_timer_gettime
+ PTR sys_timer_getoverrun
+ PTR sys_timer_delete /* 5220 */
+ PTR sys_clock_settime
+ PTR sys_clock_gettime
+ PTR sys_clock_getres
+ PTR sys_clock_nanosleep
+ PTR sys_tgkill /* 5225 */
+ PTR sys_utimes
diff -Nru a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/scall64-n32.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,342 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/asmmacro.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/unistd.h>
+
+/* This duplicates the definition from <linux/sched.h> */
+#define PT_TRACESYS 0x00000002 /* tracing system calls */
+
+/* This duplicates the definition from <asm/signal.h> */
+#define SIGILL 4 /* Illegal instruction (ANSI). */
+
+#ifndef CONFIG_MIPS32_O32
+/* No O32, so define handle_sys here */
+#define handle_sysn32 handle_sys
+#endif
+
+ .align 5
+NESTED(handle_sysn32, PT_SIZE, sp)
+#ifndef CONFIG_MIPS32_O32
+ .set noat
+ SAVE_SOME
+ STI
+ .set at
+#endif
+ ld t1, PT_EPC(sp) # skip syscall on return
+
+ subu t0, v0, __NR_N32_Linux # check syscall number
+ sltiu t0, t0, __NR_N32_Linux_syscalls + 1
+ daddiu t1, 4 # skip to next instruction
+ beqz t0, not_n32_scall
+ sd t1, PT_EPC(sp)
+
+ dsll t0, v0, 3 # offset into table
+ ld t2, (sysn32_call_table - (__NR_N32_Linux * 8))(t0)
+
+ sd a3, PT_R26(sp) # save a3 for syscall restarting
+
+ LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
+ bltz t0, n32_syscall_trace_entry
+
+ jalr t2 # Do The Real Thing (TM)
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sd t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sd v0, PT_R0(sp) # set flag for syscall restarting
+1: sd v0, PT_R2(sp) # result
+
+FEXPORT(n32_syscall_exit)
+ local_irq_disable # make sure need_resched and
+ # signals dont change between
+ # sampling and return
+ LONG_L a2, TI_FLAGS($28) # current->work
+ bnez a2, n32_syscall_exit_work
+
+ RESTORE_SOME
+ RESTORE_SP_AND_RET
+
+n32_syscall_exit_work:
+ SAVE_STATIC
+ j syscall_exit_work
+
+/* ------------------------------------------------------------------------ */
+
+n32_syscall_trace_entry:
+ SAVE_STATIC
+ sd t2,PT_R1(sp)
+ jal do_syscall_trace
+ ld t2,PT_R1(sp)
+
+ ld a0, PT_R4(sp) # Restore argument registers
+ ld a1, PT_R5(sp)
+ ld a2, PT_R6(sp)
+ ld a3, PT_R7(sp)
+ jalr t2
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sd t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sd v0, PT_R0(sp) # set flag for syscall restarting
+1: sd v0, PT_R2(sp) # result
+
+ j n32_syscall_exit
+
+not_n32_scall:
+ /* This is not an n32 compatibility syscall, pass it on to
+ the n64 syscall handlers. */
+ j handle_sys64
+
+ END(handle_sysn32)
+
+EXPORT(sysn32_call_table)
+ PTR sys_read /* 6000 */
+ PTR sys_write
+ PTR sys_open
+ PTR sys_close
+ PTR sys_newstat
+ PTR sys_newfstat /* 6005 */
+ PTR sys_newlstat
+ PTR sys_poll
+ PTR sys_lseek
+ PTR sys_mmap2
+ PTR sys_mprotect /* 6010 */
+ PTR sys_munmap
+ PTR sys_brk
+ PTR sys32_rt_sigaction
+ PTR sys32_rt_sigprocmask
+ PTR compat_sys_ioctl /* 6015 */
+ PTR sys_pread64
+ PTR sys_pwrite64
+ PTR sys32_readv
+ PTR sys32_writev
+ PTR sys_access /* 6020 */
+ PTR sys_pipe
+ PTR sys32_select
+ PTR sys_sched_yield
+ PTR sys_mremap
+ PTR sys_msync /* 6025 */
+ PTR sys_mincore
+ PTR sys_madvise
+ PTR sys_shmget
+ PTR sys_shmat
+ PTR sys_shmctl /* 6030 */
+ PTR sys_dup
+ PTR sys_dup2
+ PTR sys_pause
+ PTR compat_sys_nanosleep
+ PTR compat_sys_getitimer /* 6035 */
+ PTR compat_sys_setitimer
+ PTR sys_alarm
+ PTR sys_getpid
+ PTR sys32_sendfile
+ PTR sys_socket /* 6040 */
+ PTR sys_connect
+ PTR sys_accept
+ PTR sys_sendto
+ PTR sys_recvfrom
+ PTR compat_sys_sendmsg /* 6045 */
+ PTR compat_sys_recvmsg
+ PTR sys_shutdown
+ PTR sys_bind
+ PTR sys_listen
+ PTR sys_getsockname /* 6050 */
+ PTR sys_getpeername
+ PTR sys_socketpair
+ PTR compat_sys_setsockopt
+ PTR sys_getsockopt
+ PTR sys_clone /* 6055 */
+ PTR sys_fork
+ PTR sys32_execve
+ PTR sys_exit
+ PTR sys32_wait4
+ PTR sys_kill /* 6060 */
+ PTR sys32_newuname
+ PTR sys_semget
+ PTR sys_semop
+ PTR sys_semctl
+ PTR sys_shmdt /* 6065 */
+ PTR sys_msgget
+ PTR sys_msgsnd
+ PTR sys_msgrcv
+ PTR sys_msgctl
+ PTR compat_sys_fcntl /* 6070 */
+ PTR sys_flock
+ PTR sys_fsync
+ PTR sys_fdatasync
+ PTR sys_truncate
+ PTR sys_ftruncate /* 6075 */
+ PTR sys32_getdents
+ PTR sys_getcwd
+ PTR sys_chdir
+ PTR sys_fchdir
+ PTR sys_rename /* 6080 */
+ PTR sys_mkdir
+ PTR sys_rmdir
+ PTR sys_creat
+ PTR sys_link
+ PTR sys_unlink /* 6085 */
+ PTR sys_symlink
+ PTR sys_readlink
+ PTR sys_chmod
+ PTR sys_fchmod
+ PTR sys_chown /* 6090 */
+ PTR sys_fchown
+ PTR sys_lchown
+ PTR sys_umask
+ PTR sys32_gettimeofday
+ PTR compat_sys_getrlimit /* 6095 */
+ PTR compat_sys_getrusage
+ PTR sys32_sysinfo
+ PTR compat_sys_times
+ PTR sys_ptrace
+ PTR sys_getuid /* 6100 */
+ PTR sys_syslog
+ PTR sys_getgid
+ PTR sys_setuid
+ PTR sys_setgid
+ PTR sys_geteuid /* 6105 */
+ PTR sys_getegid
+ PTR sys_setpgid
+ PTR sys_getppid
+ PTR sys_getpgrp
+ PTR sys_setsid /* 6110 */
+ PTR sys_setreuid
+ PTR sys_setregid
+ PTR sys_getgroups
+ PTR sys_setgroups
+ PTR sys_setresuid /* 6115 */
+ PTR sys_getresuid
+ PTR sys_setresgid
+ PTR sys_getresgid
+ PTR sys_getpgid
+ PTR sys_setfsuid /* 6120 */
+ PTR sys_setfsgid
+ PTR sys_getsid
+ PTR sys_capget
+ PTR sys_capset
+ PTR sys32_rt_sigpending /* 6125 */
+ PTR sys32_rt_sigtimedwait
+ PTR sys32_rt_sigqueueinfo
+ PTR sys32_rt_sigsuspend
+ PTR sys32_sigaltstack
+ PTR compat_sys_utime /* 6130 */
+ PTR sys_mknod
+ PTR sys32_personality
+ PTR sys_ustat
+ PTR compat_sys_statfs
+ PTR compat_sys_fstatfs /* 6135 */
+ PTR sys_sysfs
+ PTR sys_getpriority
+ PTR sys_setpriority
+ PTR sys_sched_setparam
+ PTR sys_sched_getparam /* 6140 */
+ PTR sys_sched_setscheduler
+ PTR sys_sched_getscheduler
+ PTR sys_sched_get_priority_max
+ PTR sys_sched_get_priority_min
+ PTR sys32_sched_rr_get_interval /* 6145 */
+ PTR sys_mlock
+ PTR sys_munlock
+ PTR sys_mlockall
+ PTR sys_munlockall
+ PTR sys_vhangup /* 6150 */
+ PTR sys_pivot_root
+ PTR sys32_sysctl
+ PTR sys_prctl
+ PTR sys32_adjtimex
+ PTR compat_sys_setrlimit /* 6155 */
+ PTR sys_chroot
+ PTR sys_sync
+ PTR sys_acct
+ PTR sys32_settimeofday
+ PTR sys_mount /* 6160 */
+ PTR sys_umount
+ PTR sys_swapon
+ PTR sys_swapoff
+ PTR sys_reboot
+ PTR sys_sethostname /* 6165 */
+ PTR sys_setdomainname
+ PTR sys_ni_syscall /* was create_module */
+ PTR sys_init_module
+ PTR sys_delete_module
+ PTR sys_ni_syscall /* 6170, was get_kernel_syms */
+ PTR sys_ni_syscall /* was query_module */
+ PTR sys_quotactl
+ PTR sys_nfsservctl
+ PTR sys_ni_syscall /* res. for getpmsg */
+ PTR sys_ni_syscall /* 6175 for putpmsg */
+ PTR sys_ni_syscall /* res. for afs_syscall */
+ PTR sys_ni_syscall /* res. for security */
+ PTR sys_gettid
+ PTR sys32_readahead
+ PTR sys_setxattr /* 6180 */
+ PTR sys_lsetxattr
+ PTR sys_fsetxattr
+ PTR sys_getxattr
+ PTR sys_lgetxattr
+ PTR sys_fgetxattr /* 6185 */
+ PTR sys_listxattr
+ PTR sys_llistxattr
+ PTR sys_flistxattr
+ PTR sys_removexattr
+ PTR sys_lremovexattr /* 6190 */
+ PTR sys_fremovexattr
+ PTR sys_tkill
+ PTR sys_time
+ PTR compat_sys_futex
+ PTR sys32_sched_setaffinity /* 6195 */
+ PTR sys32_sched_getaffinity
+ PTR sys_cacheflush
+ PTR sys_cachectl
+ PTR sys_sysmips
+ PTR sys_io_setup /* 6200 */
+ PTR sys_io_destroy
+ PTR sys_io_getevents
+ PTR sys_io_submit
+ PTR sys_io_cancel
+ PTR sys_exit_group /* 6205 */
+ PTR sys_lookup_dcookie
+ PTR sys_epoll_create
+ PTR sys_epoll_ctl
+ PTR sys_epoll_wait
+ PTR sys_remap_file_pages /* 6210 */
+ PTR sysn32_rt_sigreturn
+ PTR sys_fcntl
+ PTR sys_set_tid_address
+ PTR sys_restart_syscall
+ PTR sys_semtimedop /* 6215 */
+ PTR sys_fadvise64
+ PTR sys_statfs64
+ PTR sys_fstatfs64
+ PTR sys_sendfile64
+ PTR sys_timer_create /* 6220 */
+ PTR sys_timer_settime
+ PTR sys_timer_gettime
+ PTR sys_timer_getoverrun
+ PTR sys_timer_delete
+ PTR sys_clock_settime /* 6225 */
+ PTR sys_clock_gettime
+ PTR sys_clock_getres
+ PTR sys_clock_nanosleep
+ PTR sys_tgkill
+ PTR compat_sys_utimes /* 6230 */
diff -Nru a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/scall64-o32.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,540 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
+ *
+ * Hairy, the userspace application uses a different argument passing
+ * convention than the kernel, so we have to translate things from o32
+ * to ABI64 calling convention. 64-bit syscalls are also processed
+ * here for now.
+ */
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/asmmacro.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/unistd.h>
+#include <asm/sysmips.h>
+
+ .align 5
+NESTED(handle_sys, PT_SIZE, sp)
+ .set noat
+ SAVE_SOME
+ STI
+ .set at
+ ld t1, PT_EPC(sp) # skip syscall on return
+
+ subu t0, v0, __NR_O32_Linux # check syscall number
+ sltiu t0, t0, __NR_O32_Linux_syscalls + 1
+ daddiu t1, 4 # skip to next instruction
+ beqz t0, not_o32_scall
+ sd t1, PT_EPC(sp)
+#if 0
+ SAVE_ALL
+ move a1, v0
+ PRINT("Scall %ld\n")
+ RESTORE_ALL
+#endif
+
+ sll a0, a0, 0
+ sll a1, a1, 0
+ sll a2, a2, 0
+ sll a3, a3, 0
+
+ /* XXX Put both in one cacheline, should save a bit. */
+ dsll t0, v0, 3 # offset into table
+ ld t2, (sys_call_table - (__NR_O32_Linux * 8))(t0)
+ lbu t3, (sys_narg_table - __NR_O32_Linux)(v0)
+
+ subu t0, t3, 5 # 5 or more arguments?
+ sd a3, PT_R26(sp) # save a3 for syscall restarting
+ bgez t0, stackargs
+
+stack_done:
+ LONG_L t0, TI_FLAGS($28)
+ # syscall tracing enabled?
+ bnez t0, trace_a_syscall
+
+ jalr t2 # Do The Real Thing (TM)
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sd t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sd v0, PT_R0(sp) # flag for syscall restarting
+1: sd v0, PT_R2(sp) # result
+
+FEXPORT(o32_syscall_exit)
+ local_irq_disable # make need_resched and
+ # signals dont change between
+ # sampling and return
+ LONG_L a2, TI_FLAGS($28)
+ bnez a2, o32_syscall_exit_work
+
+ RESTORE_SOME
+ RESTORE_SP_AND_RET
+
+o32_syscall_exit_work:
+ SAVE_STATIC
+ j syscall_exit_work
+
+/* ------------------------------------------------------------------------ */
+
+trace_a_syscall:
+ SAVE_STATIC
+ sd a4, PT_R8(sp)
+ sd a5, PT_R9(sp)
+ sd a6, PT_R10(sp)
+ sd a7, PT_R11(sp)
+
+ sd t2,PT_R1(sp)
+ jal do_syscall_trace
+ ld t2,PT_R1(sp)
+
+ ld a0, PT_R4(sp) # Restore argument registers
+ ld a1, PT_R5(sp)
+ ld a2, PT_R6(sp)
+ ld a3, PT_R7(sp)
+ ld a4, PT_R8(sp)
+ ld a5, PT_R9(sp)
+
+ jalr t2
+
+ li t0, -EMAXERRNO - 1 # error?
+ sltu t0, t0, v0
+ sd t0, PT_R7(sp) # set error flag
+ beqz t0, 1f
+
+ negu v0 # error
+ sd v0, PT_R0(sp) # set flag for syscall restarting
+1: sd v0, PT_R2(sp) # result
+
+ j syscall_exit
+
+/* ------------------------------------------------------------------------ */
+
+ /*
+ * More than four arguments. Try to deal with it by copying the
+ * stack arguments from the user stack to the kernel stack.
+ * This Sucks (TM).
+ */
+stackargs:
+ ld t0, PT_R29(sp) # get old user stack pointer
+ subu t3, 4
+ sll t1, t3, 2 # stack valid?
+
+ addu t1, t0 # end address
+ or t0, t1
+ bltz t0, bad_stack # -> sp is bad
+
+ ld t0, PT_R29(sp) # get old user stack pointer
+ PTR_LA t1, 3f # copy 1 to 2 arguments
+ sll t3, t3, 2
+ subu t1, t3
+ jr t1
+
+ /* Ok, copy the args from the luser stack to the kernel stack */
+ .set push
+ .set noreorder
+ .set nomacro
+1: lw a5, 20(t0) # argument #6 from usp
+2: lw a4, 16(t0) # argument #5 from usp
+3: .set pop
+
+ j stack_done # go back
+
+ .section __ex_table,"a"
+ PTR 1b, bad_stack
+ PTR 2b, bad_stack
+ .previous
+
+ /*
+ * The stackpointer for a call with more than 4 arguments is bad.
+ */
+bad_stack:
+ negu v0 # error
+ sd v0, PT_R0(sp)
+ sd v0, PT_R2(sp)
+ li t0, 1 # set error flag
+ sd t0, PT_R7(sp)
+ j o32_syscall_exit
+
+not_o32_scall:
+ /*
+ * This is not an o32 compatibility syscall, pass it on
+ * to the 64-bit syscall handlers.
+ */
+#ifdef CONFIG_MIPS32_N32
+ j handle_sysn32
+#else
+ j handle_sys64
+#endif
+
+illegal_syscall:
+ /* This also isn't a 64-bit syscall, throw an error. */
+ li v0, ENOSYS # error
+ sd v0, PT_R2(sp)
+ li t0, 1 # set error flag
+ sd t0, PT_R7(sp)
+ j o32_syscall_exit
+ END(handle_sys)
+
+LEAF(sys32_syscall)
+ ld t0, PT_R29(sp) # user sp
+
+ sltu v0, a0, __NR_O32_Linux + __NR_O32_Linux_syscalls + 1
+ beqz v0, enosys
+
+ dsll v0, a0, 3
+ dla v1, sys32_syscall
+ ld t2, (sys_call_table - (__NR_O32_Linux * 8))(v0)
+ lbu t3, (sys_narg_table - __NR_O32_Linux)(a0)
+
+ li v0, -EINVAL
+ beq t2, v1, out # do not recurse
+
+ beqz t2, enosys # null function pointer?
+
+ andi v0, t0, 0x3 # unaligned stack pointer?
+ bnez v0, sigsegv
+
+ daddiu v0, t0, 16 # v0 = usp + 16
+ daddu t1, v0, 12 # 3 32-bit arguments
+ ld v1, TI_ADDR_LIMIT($28)
+ or v0, v0, t1
+ and v1, v1, v0
+ bnez v1, efault
+
+ move a0, a1 # shift argument registers
+ move a1, a2
+ move a2, a3
+
+1: lw a3, 16(t0)
+2: lw t3, 20(t0)
+3: lw t1, 24(t0)
+
+ .section __ex_table,"a"
+ PTR 1b, efault
+ PTR 2b, efault
+ PTR 3b, efault
+ .previous
+
+ sw t3, 16(sp) # put into new stackframe
+ sw t1, 20(sp)
+
+ bnez t1, 1f # zero arguments?
+ daddu a0, sp, 32 # then pass sp in a0
+1:
+
+ sw t3, 16(sp)
+ sw v1, 20(sp)
+ jr t2
+ /* Unreached */
+
+enosys: li v0, -ENOSYS
+ b out
+
+sigsegv:
+ li a0, _SIGSEGV
+ move a1, $28
+ jal force_sig
+ /* Fall through */
+
+efault: li v0, -EFAULT
+
+out: jr ra
+ END(sys32_syscall)
+
+ .macro syscalltable
+ sys sys32_syscall 0 /* 4000 */
+ sys sys_exit 1
+ sys sys_fork 0
+ sys sys_read 3
+ sys sys_write 3
+ sys sys_open 3 /* 4005 */
+ sys sys_close 1
+ sys sys_waitpid 3
+ sys sys_creat 2
+ sys sys_link 2
+ sys sys_unlink 1 /* 4010 */
+ sys sys32_execve 0
+ sys sys_chdir 1
+ sys sys_time 1
+ sys sys_mknod 3
+ sys sys_chmod 2 /* 4015 */
+ sys sys_lchown 3
+ sys sys_ni_syscall 0
+ sys sys_ni_syscall 0 /* was sys_stat */
+ sys sys_lseek 3
+ sys sys_getpid 0 /* 4020 */
+ sys sys_mount 5
+ sys sys_oldumount 1
+ sys sys_setuid 1
+ sys sys_getuid 0
+ sys sys_stime 1 /* 4025 */
+ sys sys32_ptrace 4
+ sys sys_alarm 1
+ sys sys_ni_syscall 0 /* was sys_fstat */
+ sys sys_pause 0
+ sys compat_sys_utime 2 /* 4030 */
+ sys sys_ni_syscall 0
+ sys sys_ni_syscall 0
+ sys sys_access 2
+ sys sys_nice 1
+ sys sys_ni_syscall 0 /* 4035 */
+ sys sys_sync 0
+ sys sys_kill 2
+ sys sys_rename 2
+ sys sys_mkdir 2
+ sys sys_rmdir 1 /* 4040 */
+ sys sys_dup 1
+ sys sys_pipe 0
+ sys compat_sys_times 1
+ sys sys_ni_syscall 0
+ sys sys_brk 1 /* 4045 */
+ sys sys_setgid 1
+ sys sys_getgid 0
+ sys sys_ni_syscall 0 /* was signal 2 */
+ sys sys_geteuid 0
+ sys sys_getegid 0 /* 4050 */
+ sys sys_acct 0
+ sys sys_umount 2
+ sys sys_ni_syscall 0
+ sys compat_sys_ioctl 3
+ sys compat_sys_fcntl 3 /* 4055 */
+ sys sys_ni_syscall 2
+ sys sys_setpgid 2
+ sys sys_ni_syscall, 0
+ sys sys_olduname 1
+ sys sys_umask 1 /* 4060 */
+ sys sys_chroot 1
+ sys sys_ustat 2
+ sys sys_dup2 2
+ sys sys_getppid 0
+ sys sys_getpgrp 0 /* 4065 */
+ sys sys_setsid 0
+ sys sys32_sigaction 3
+ sys sys_sgetmask 0
+ sys sys_ssetmask 1
+ sys sys_setreuid 2 /* 4070 */
+ sys sys_setregid 2
+ sys sys32_sigsuspend 0
+ sys compat_sys_sigpending 1
+ sys sys_sethostname 2
+ sys compat_sys_setrlimit 2 /* 4075 */
+ sys compat_sys_getrlimit 2
+ sys compat_sys_getrusage 2
+ sys sys32_gettimeofday 2
+ sys sys32_settimeofday 2
+ sys sys_getgroups 2 /* 4080 */
+ sys sys_setgroups 2
+ sys sys_ni_syscall 0 /* old_select */
+ sys sys_symlink 2
+ sys sys_ni_syscall 0 /* was sys_lstat */
+ sys sys_readlink 3 /* 4085 */
+ sys sys_uselib 1
+ sys sys_swapon 2
+ sys sys_reboot 3
+ sys sys32_readdir 3
+ sys old_mmap 6 /* 4090 */
+ sys sys_munmap 2
+ sys sys_truncate 2
+ sys sys_ftruncate 2
+ sys sys_fchmod 2
+ sys sys_fchown 3 /* 4095 */
+ sys sys_getpriority 2
+ sys sys_setpriority 3
+ sys sys_ni_syscall 0
+ sys compat_sys_statfs 2
+ sys compat_sys_fstatfs 2 /* 4100 */
+ sys sys_ni_syscall 0 /* sys_ioperm */
+ sys sys_socketcall 2
+ sys sys_syslog 3
+ sys compat_sys_setitimer 3
+ sys compat_sys_getitimer 2 /* 4105 */
+ sys compat_sys_newstat 2
+ sys compat_sys_newlstat 2
+ sys compat_sys_newfstat 2
+ sys sys_uname 1
+ sys sys_ni_syscall 0 /* sys_ioperm *//* 4110 */
+ sys sys_vhangup 0
+ sys sys_ni_syscall 0 /* was sys_idle */
+ sys sys_ni_syscall 0 /* sys_vm86 */
+ sys sys32_wait4 4
+ sys sys_swapoff 1 /* 4115 */
+ sys sys32_sysinfo 1
+ sys sys32_ipc 6
+ sys sys_fsync 1
+ sys sys32_sigreturn 0
+ sys sys_clone 0 /* 4120 */
+ sys sys_setdomainname 2
+ sys sys32_newuname 1
+ sys sys_ni_syscall 0 /* sys_modify_ldt */
+ sys sys32_adjtimex 1
+ sys sys_mprotect 3 /* 4125 */
+ sys compat_sys_sigprocmask 3
+ sys sys_ni_syscall 0 /* was creat_module */
+ sys sys_init_module 5
+ sys sys_delete_module 1
+ sys sys_ni_syscall 0 /* 4130, get_kernel_syms */
+ sys sys_quotactl 0
+ sys sys_getpgid 1
+ sys sys_fchdir 1
+ sys sys_bdflush 2
+ sys sys_sysfs 3 /* 4135 */
+ sys sys32_personality 1
+ sys sys_ni_syscall 0 /* for afs_syscall */
+ sys sys_setfsuid 1
+ sys sys_setfsgid 1
+ sys sys32_llseek 5 /* 4140 */
+ sys sys32_getdents 3
+ sys sys32_select 5
+ sys sys_flock 2
+ sys sys_msync 3
+ sys sys32_readv 3 /* 4145 */
+ sys sys32_writev 3
+ sys sys_cacheflush 3
+ sys sys_cachectl 3
+ sys sys_sysmips 4
+ sys sys_ni_syscall 0 /* 4150 */
+ sys sys_getsid 1
+ sys sys_fdatasync 0
+ sys sys32_sysctl 1
+ sys sys_mlock 2
+ sys sys_munlock 2 /* 4155 */
+ sys sys_mlockall 1
+ sys sys_munlockall 0
+ sys sys_sched_setparam 2
+ sys sys_sched_getparam 2
+ sys sys_sched_setscheduler 3 /* 4160 */
+ sys sys_sched_getscheduler 1
+ sys sys_sched_yield 0
+ sys sys_sched_get_priority_max 1
+ sys sys_sched_get_priority_min 1
+ sys sys32_sched_rr_get_interval 2 /* 4165 */
+ sys compat_sys_nanosleep 2
+ sys sys_mremap 4
+ sys sys_accept 3
+ sys sys_bind 3
+ sys sys_connect 3 /* 4170 */
+ sys sys_getpeername 3
+ sys sys_getsockname 3
+ sys sys_getsockopt 5
+ sys sys_listen 2
+ sys sys_recv 4 /* 4175 */
+ sys sys_recvfrom 6
+ sys compat_sys_recvmsg 3
+ sys sys_send 4
+ sys compat_sys_sendmsg 3
+ sys sys_sendto 6 /* 4180 */
+ sys compat_sys_setsockopt 5
+ sys sys_shutdown 2
+ sys sys_socket 3
+ sys sys_socketpair 4
+ sys sys_setresuid 3 /* 4185 */
+ sys sys_getresuid 3
+ sys sys_ni_syscall 0 /* was query_module */
+ sys sys_poll 3
+ sys sys_nfsservctl 3
+ sys sys_setresgid 3 /* 4190 */
+ sys sys_getresgid 3
+ sys sys_prctl 5
+ sys sys32_rt_sigreturn 0
+ sys sys32_rt_sigaction 4
+ sys sys32_rt_sigprocmask 4 /* 4195 */
+ sys sys32_rt_sigpending 2
+ sys sys32_rt_sigtimedwait 4
+ sys sys32_rt_sigqueueinfo 3
+ sys sys32_rt_sigsuspend 0
+ sys sys32_pread 6 /* 4200 */
+ sys sys32_pwrite 6
+ sys sys_chown 3
+ sys sys_getcwd 2
+ sys sys_capget 2
+ sys sys_capset 2 /* 4205 */
+ sys sys32_sigaltstack 0
+ sys sys32_sendfile 4
+ sys sys_ni_syscall 0
+ sys sys_ni_syscall 0
+ sys sys32_mmap2 6 /* 4210 */
+ sys sys32_truncate64 4
+ sys sys32_ftruncate64 4
+ sys sys_newstat 2
+ sys sys_newlstat 2
+ sys sys_newfstat 2 /* 4215 */
+ sys sys_pivot_root 2
+ sys sys_mincore 3
+ sys sys_madvise 3
+ sys sys_getdents64 3
+ sys compat_sys_fcntl64 3 /* 4220 */
+ sys sys_ni_syscall 0
+ sys sys_gettid 0
+ sys sys32_readahead 5
+ sys sys_setxattr 5
+ sys sys_lsetxattr 5 /* 4225 */
+ sys sys_fsetxattr 5
+ sys sys_getxattr 4
+ sys sys_lgetxattr 4
+ sys sys_fgetxattr 4
+ sys sys_listxattr 3 /* 4230 */
+ sys sys_llistxattr 3
+ sys sys_flistxattr 3
+ sys sys_removexattr 2
+ sys sys_lremovexattr 2
+ sys sys_fremovexattr 2 /* 4235 */
+ sys sys_tkill 2
+ sys sys_sendfile64 5
+ sys compat_sys_futex 5
+ sys sys32_sched_setaffinity 3
+ sys sys32_sched_getaffinity 3 /* 4240 */
+ sys sys_io_setup 2
+ sys sys_io_destroy 1
+ sys sys_io_getevents 5
+ sys sys_io_submit 3
+ sys sys_io_cancel 3 /* 4245 */
+ sys sys_exit_group 1
+ sys sys_lookup_dcookie 3
+ sys sys_epoll_create 1
+ sys sys_epoll_ctl 4
+ sys sys_epoll_wait 3 /* 4250 */
+ sys sys_remap_file_pages 5
+ sys sys_set_tid_address 1
+ sys sys_restart_syscall 0
+ sys sys_fadvise64 6
+ sys sys_statfs64 3 /* 4255 */
+ sys sys_fstatfs64 2
+ sys sys_timer_create 3
+ sys sys_timer_settime 4
+ sys sys_timer_gettime 2
+ sys sys_timer_getoverrun 1 /* 4260 */
+ sys sys_timer_delete 1
+ sys sys_clock_settime 2
+ sys sys_clock_gettime 2
+ sys sys_clock_getres 2
+ sys sys_clock_nanosleep 4 /* 4265 */
+ sys sys_tgkill 3
+ sys compat_sys_utimes 2
+
+ .endm
+
+ .macro sys function, nargs
+ PTR \function
+ .endm
+
+ .align 3
+sys_call_table:
+ syscalltable
+
+ .macro sys function, nargs
+ .byte \nargs
+ .endm
+
+sys_narg_table:
+ syscalltable
diff -Nru a/arch/mips/kernel/scall_o32.S b/arch/mips/kernel/scall_o32.S
--- a/arch/mips/kernel/scall_o32.S Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,320 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/isadep.h>
-#include <asm/sysmips.h>
-#include <asm/unistd.h>
-#include <asm/offset.h>
-
-/* Highest syscall used of any syscall flavour */
-#define MAX_SYSCALL_NO __NR_Linux + __NR_Linux_syscalls
-
- .align 5
-NESTED(handle_sys, PT_SIZE, sp)
- .set noat
- SAVE_SOME
- STI
- .set at
-
- lw t1, PT_EPC(sp) # skip syscall on return
-
- sltiu t0, v0, MAX_SYSCALL_NO + 1 # check syscall number
- addiu t1, 4 # skip to next instruction
- beqz t0, illegal_syscall
- sw t1, PT_EPC(sp)
-
- /* XXX Put both in one cacheline, should save a bit. */
- sll t0, v0, 2
- lw t2, sys_call_table(t0) # syscall routine
- lbu t3, sys_narg_table(v0) # number of arguments
- beqz t2, illegal_syscall;
-
- subu t0, t3, 5 # 5 or more arguments?
- sw a3, PT_R26(sp) # save a3 for syscall restarting
- bgez t0, stackargs
-
-stack_done:
- sw a3, PT_R26(sp) # save for syscall restart
- LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
- bltz t0, syscall_trace_entry # -> yes
-
- jalr t2 # Do The Real Thing (TM)
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sw t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sw v0, PT_R0(sp) # set flag for syscall
- # restarting
-1: sw v0, PT_R2(sp) # result
-
-EXPORT(o32_syscall_exit)
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, o32_syscall_exit_work
-
-o32_restore_all:
- RESTORE_SOME
- RESTORE_SP_AND_RET
-
-o32_syscall_exit_work:
- SAVE_STATIC
- j syscall_exit_work
-
-/* ------------------------------------------------------------------------ */
-
-syscall_trace_entry:
- SAVE_STATIC
- sw t2, PT_R1(sp)
- jal do_syscall_trace
- lw t2, PT_R1(sp)
-
- lw a0, PT_R4(sp) # Restore argument registers
- lw a1, PT_R5(sp)
- lw a2, PT_R6(sp)
- lw a3, PT_R7(sp)
- jalr t2
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sw t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sw v0, PT_R0(sp) # set flag for syscall
- # restarting
-1: sw v0, PT_R2(sp) # result
-
- j syscall_exit
-
-/* ------------------------------------------------------------------------ */
-
- /*
- * More than four arguments. Try to deal with it by copying the
- * stack arguments from the user stack to the kernel stack.
- * This Sucks (TM).
- */
-stackargs:
- lw t0, PT_R29(sp) # get old user stack pointer
- subu t3, 4
- sll t1, t3, 2 # stack valid?
-
- addu t1, t0 # end address
- or t0, t1
- bltz t0, bad_stack # -> sp is bad
-
- lw t0, PT_R29(sp) # get old user stack pointer
- PTR_LA t1, 3f # copy 1 to 2 arguments
- sll t3, t3, 4
- subu t1, t3
- jr t1
-
- /* Ok, copy the args from the luser stack to the kernel stack */
- /*
- * I know Ralf doesn't like nops but this avoids code
- * duplication for R3000 targets (and this is the
- * only place where ".set reorder" doesn't help).
- * Harald.
- */
- .set push
- .set noreorder
- .set nomacro
-1: lw t1, 20(t0) # argument #6 from usp
- nop
- sw t1, 20(sp)
- nop
-2: lw t1, 16(t0) # argument #5 from usp
- nop
- sw t1, 16(sp)
- nop
-3: .set pop
-
- j stack_done # go back
-
- .section __ex_table,"a"
- PTR 1b,bad_stack
- PTR 2b,bad_stack
- .previous
-
- /*
- * The stackpointer for a call with more than 4 arguments is bad.
- * We probably should handle this case a bit more drastic.
- */
-bad_stack:
- negu v0 # error
- sw v0, PT_R0(sp)
- sw v0, PT_R2(sp)
- li t0, 1 # set error flag
- sw t0, PT_R7(sp)
- j o32_syscall_exit
-
- /*
- * The system call does not exist in this kernel
- */
-illegal_syscall:
- li v0, ENOSYS # error
- sw v0, PT_R2(sp)
- li t0, 1 # set error flag
- sw t0, PT_R7(sp)
- j o32_syscall_exit
- END(handle_sys)
-
- LEAF(mips_atomic_set)
- andi v0, a1, 3 # must be word aligned
- bnez v0, bad_alignment
-
- lw v1, TI_ADDR_LIMIT($28) # in legal address range?
- addiu a0, a1, 4
- or a0, a0, a1
- and a0, a0, v1
- bltz a0, bad_address
-
-#ifdef CONFIG_CPU_HAS_LLSC
- /* Ok, this is the ll/sc case. World is sane :-) */
-1: ll v0, (a1)
- move a0, a2
-2: sc a0, (a1)
- beqz a0, 1b
-
- .section __ex_table,"a"
- PTR 1b, bad_stack
- PTR 2b, bad_stack
- .previous
-#else
- sw a1, 16(sp)
- sw a2, 20(sp)
-
- move a0, sp
- move a2, a1
- li a1, 1
- jal do_page_fault
-
- lw a1, 16(sp)
- lw a2, 20(sp)
-
- /*
- * At this point the page should be readable and writable unless
- * there was no more memory available.
- */
-1: lw v0, (a1)
-2: sw a2, (a1)
-
- .section __ex_table,"a"
- PTR 1b, no_mem
- PTR 2b, no_mem
- .previous
-#endif
-
- sw v0, PT_R2(sp) # result
-1:
-
- /* Success, so skip usual error handling garbage. */
- LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
- bltz t0, 1f
- b o32_syscall_exit
-
-1: SAVE_STATIC
- jal do_syscall_trace
- li a3, 0 # success
- j syscall_exit
-
-no_mem: li v0, -ENOMEM
- jr ra
-
-bad_address:
- li v0, -EFAULT
- jr ra
-
-bad_alignment:
- li v0, -EINVAL
- jr ra
- END(mips_atomic_set)
-
- LEAF(sys_sysmips)
- beq a0, MIPS_ATOMIC_SET, mips_atomic_set
- j _sys_sysmips
- END(sys_sysmips)
-
- LEAF(sys_syscall)
- lw t0, PT_R29(sp) # user sp
-
- sltu v0, a0, __NR_Linux + __NR_Linux_syscalls + 1
- beqz v0, enosys
-
- sll v0, a0, 2
- la v1, sys_syscall
- lw t2, sys_call_table(v0) # function pointer
- lbu t4, sys_narg_table(a0) # number of arguments
-
- li v0, -EINVAL
- beq t2, v1, out # do not recurse
-
- beqz t2, enosys # null function pointer?
-
- andi v0, t0, 0x3 # unaligned stack pointer?
- bnez v0, sigsegv
-
- addu v0, t0, 16 # v0 = usp + 16
- addu t1, v0, 12 # 3 32-bit arguments
- lw v1, TI_ADDR_LIMIT($28)
- or v0, v0, t1
- and v1, v1, v0
- bltz v1, efault
-
- move a0, a1 # shift argument registers
- move a1, a2
- move a2, a3
-
-1: lw a3, 16(t0)
-2: lw t3, 20(t0)
-3: lw t4, 24(t0)
-
- .section __ex_table, "a"
- .word 1b, efault
- .word 2b, efault
- .word 3b, efault
- .previous
-
- sw t3, 16(sp) # put into new stackframe
- sw t4, 20(sp)
-
- bnez t4, 1f # zero arguments?
- addu a0, sp, 32 # then pass sp in a0
-1:
-
- sw t3, 16(sp)
- sw v1, 20(sp)
- jr t2
- /* Unreached */
-
-enosys: li v0, -ENOSYS
- b out
-
-sigsegv:
- li a0, _SIGSEGV
- move a1, $28
- jal force_sig
- /* Fall through */
-
-efault: li v0, -EFAULT
-
-out: jr ra
- END(sys_syscall)
diff -Nru a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
--- a/arch/mips/kernel/setup.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/kernel/setup.c Sun Aug 3 13:14:46 2003
@@ -3,15 +3,15 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995 Linus Torvalds
- * Copyright (C) 1995 Waldorf Electronics
- * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
- * Copyright (C) 1996 Stoned Elipot
- * Copyright (C) 2000, 2001, 2002 Maciej W. Rozycki
+ * Copyright (C) 1995 Linus Torvalds
+ * Copyright (C) 1995 Waldorf Electronics
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 Ralf Baechle
+ * Copyright (C) 1996 Stoned Elipot
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki
*/
#include <linux/config.h>
#include <linux/errno.h>
-#include <linux/hdreg.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/sched.h>
@@ -28,38 +28,35 @@
#include <linux/tty.h>
#include <linux/bootmem.h>
#include <linux/initrd.h>
-#include <linux/ide.h>
-#include <linux/timex.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
-#include <asm/asm.h>
+#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
#include <asm/cpu.h>
-#include <asm/io.h>
-#include <asm/ptrace.h>
#include <asm/sections.h>
#include <asm/system.h>
struct cpuinfo_mips cpu_data[NR_CPUS];
+#ifdef CONFIG_VT
+struct screen_info screen_info;
+#endif
+
/*
- * There are several bus types available for MIPS machines. "RISC PC"
- * type machines have ISA, EISA, VLB or PCI available, DECstations
- * have Turbochannel or Q-Bus, SGI has GIO, there are lots of VME
- * boxes ...
- * This flag is set if a EISA slots are available.
+ * Set if box has EISA slots.
*/
#ifdef CONFIG_EISA
-int EISA_bus = 0;
-#endif
+int EISA_bus;
-struct screen_info screen_info;
+EXPORT_SYMBOL(EISA_bus);
+#endif
+#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
extern struct fd_ops no_fd_ops;
struct fd_ops *fd_ops;
+#endif
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
extern struct ide_ops no_ide_ops;
@@ -81,8 +78,6 @@
struct boot_mem_map boot_mem_map;
-unsigned char aux_device_present;
-
static char command_line[CL_SIZE];
char saved_command_line[CL_SIZE];
extern char arcs_cmdline[CL_SIZE];
@@ -94,7 +89,6 @@
const unsigned long mips_io_port_base = -1;
EXPORT_SYMBOL(mips_io_port_base);
-
/*
* isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
* for the processor.
@@ -104,14 +98,14 @@
extern void SetUpBootInfo(void);
extern void load_mmu(void);
-extern asmlinkage void start_kernel(void);
+extern ATTRIB_NORET asmlinkage void start_kernel(void);
extern void prom_init(int, char **, char **, int *);
static struct resource code_resource = { "Kernel code" };
static struct resource data_resource = { "Kernel data" };
-asmlinkage void __init
-init_arch(int argc, char **argv, char **envp, int *prom_vec)
+asmlinkage void __init init_arch(int argc, char **argv, char **envp,
+ int *prom_vec)
{
/* Determine which MIPS variant we are running on. */
cpu_probe();
@@ -121,15 +115,26 @@
cpu_report();
/*
- * Determine the mmu/cache attached to this machine,
- * then flush the tlb and caches. On the r4xx0
- * variants this also sets CP0_WIRED to zero.
+ * Determine the mmu/cache attached to this machine, then flush the
+ * tlb and caches. On the r4xx0 variants this also sets CP0_WIRED to
+ * zero.
*/
load_mmu();
+#ifdef CONFIG_MIPS32
/* Disable coprocessors and set FPU for 16/32 FPR register model */
clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
set_c0_status(ST0_CU0);
+#endif
+#ifdef CONFIG_MIPS64
+ /*
+ * On IP27, I am seeing the TS bit set when the kernel is loaded.
+ * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
+ * anyway ...
+ */
+ clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
+ set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
+#endif
start_kernel();
}
@@ -155,9 +160,9 @@
int i;
for (i = 0; i < boot_mem_map.nr_map; i++) {
- printk(" memory: %08Lx @ %08Lx ",
- (u64) boot_mem_map.map[i].size,
- (u64) boot_mem_map.map[i].addr);
+ printk(" memory: %0*Lx @ %0*Lx ",
+ sizeof(long) * 2, (u64) boot_mem_map.map[i].size,
+ sizeof(long) * 2, (u64) boot_mem_map.map[i].addr);
switch (boot_mem_map.map[i].type) {
case BOOT_MEM_RAM:
@@ -254,15 +259,16 @@
initrd_start = (unsigned long)&initrd_header[2];
initrd_end = initrd_start + initrd_header[1];
}
- start_pfn = PFN_UP(__pa((&_end)+(initrd_end - initrd_start) + PAGE_SIZE));
+ start_pfn = PFN_UP(CPHYSADDR((&_end)+(initrd_end - initrd_start) + PAGE_SIZE));
#else
/*
* Partially used pages are not usable - thus
* we are rounding upwards.
*/
- start_pfn = PFN_UP(__pa(&_end));
+ start_pfn = PFN_UP(CPHYSADDR(&_end));
#endif /* CONFIG_BLK_DEV_INITRD */
+#ifndef CONFIG_SGI_IP27
/* Find the highest page frame number we have available. */
max_pfn = 0;
first_usable_pfn = -1UL;
@@ -297,8 +303,8 @@
max_low_pfn = MAXMEM_PFN;
#ifndef CONFIG_HIGHMEM
/* Maximum memory usable is what is directly addressable */
- printk(KERN_WARNING "Warning only %dMB will be used.\n",
- MAXMEM>>20);
+ printk(KERN_WARNING "Warning only %ldMB will be used.\n",
+ MAXMEM >> 20);
printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
#endif
}
@@ -373,6 +379,7 @@
/* Reserve the bootmap memory. */
reserve_bootmem(PFN_PHYS(first_usable_pfn), bootmap_size);
+#endif
#ifdef CONFIG_BLK_DEV_INITRD
/* Board specific code should have set up initrd_start and initrd_end */
@@ -387,13 +394,16 @@
printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
(void *)initrd_start,
initrd_size);
- if (PHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
+/* FIXME: is this right? */
+#ifndef CONFIG_SGI_IP27
+ if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
printk("initrd extends beyond end of memory "
- "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
- PHYSADDR(initrd_end),
- PFN_PHYS(max_low_pfn));
+ "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
+ sizeof(long) * 2, CPHYSADDR(initrd_end),
+ sizeof(long) * 2, PFN_PHYS(max_low_pfn));
initrd_start = initrd_end = 0;
}
+#endif /* !CONFIG_SGI_IP27 */
}
#endif /* CONFIG_BLK_DEV_INITRD */
}
@@ -455,38 +465,39 @@
#undef MAXMEM
#undef MAXMEM_PFN
-
void __init setup_arch(char **cmdline_p)
{
- void atlas_setup(void);
- void baget_setup(void);
- void cobalt_setup(void);
- void lasat_setup(void);
- void ddb_setup(void);
- void decstation_setup(void);
- void deskstation_setup(void);
- void jazz_setup(void);
- void sni_rm200_pci_setup(void);
- void ip22_setup(void);
- void ev96100_setup(void);
- void malta_setup(void);
- void sead_setup(void);
- void ikos_setup(void);
- void momenco_ocelot_setup(void);
- void momenco_ocelot_g_setup(void);
- void momenco_ocelot_c_setup(void);
- void nec_osprey_setup(void);
- void nec_eagle_setup(void);
- void zao_capcella_setup(void);
- void victor_mpc30x_setup(void);
- void ibm_workpad_setup(void);
- void casio_e55_setup(void);
- void jmr3927_setup(void);
- void it8172_setup(void);
- void swarm_setup(void);
- void hp_setup(void);
- void au1x00_setup(void);
- void frame_info_init(void);
+ extern void atlas_setup(void);
+ extern void baget_setup(void);
+ extern void cobalt_setup(void);
+ extern void lasat_setup(void);
+ extern void ddb_setup(void);
+ extern void decstation_setup(void);
+ extern void deskstation_setup(void);
+ extern void jazz_setup(void);
+ extern void sni_rm200_pci_setup(void);
+ extern void ip22_setup(void);
+ extern void ip27_setup(void);
+ extern void ip32_setup(void);
+ extern void ev96100_setup(void);
+ extern void malta_setup(void);
+ extern void sead_setup(void);
+ extern void ikos_setup(void);
+ extern void momenco_ocelot_setup(void);
+ extern void momenco_ocelot_g_setup(void);
+ extern void momenco_ocelot_c_setup(void);
+ extern void nec_osprey_setup(void);
+ extern void nec_eagle_setup(void);
+ extern void zao_capcella_setup(void);
+ extern void victor_mpc30x_setup(void);
+ extern void ibm_workpad_setup(void);
+ extern void casio_e55_setup(void);
+ extern void jmr3927_setup(void);
+ extern void it8172_setup(void);
+ extern void swarm_setup(void);
+ extern void hp_setup(void);
+ extern void au1x00_setup(void);
+ extern void frame_info_init(void);
frame_info_init();
@@ -500,17 +511,16 @@
rtc_ops = &no_rtc_ops;
- switch(mips_machgroup)
- {
+ switch (mips_machgroup) {
#ifdef CONFIG_BAGET_MIPS
case MACH_GROUP_BAGET:
baget_setup();
break;
#endif
#ifdef CONFIG_MIPS_COBALT
- case MACH_GROUP_COBALT:
- cobalt_setup();
- break;
+ case MACH_GROUP_COBALT:
+ cobalt_setup();
+ break;
#endif
#ifdef CONFIG_DECSTATION
case MACH_GROUP_DEC:
@@ -558,6 +568,16 @@
ip22_setup();
break;
#endif
+#ifdef CONFIG_SGI_IP27
+ case MACH_GROUP_SGI:
+ ip27_setup();
+ break;
+#endif
+#ifdef CONFIG_SGI_IP32
+ case MACH_GROUP_SGI:
+ ip32_setup();
+ break;
+#endif
#ifdef CONFIG_SNI_RM200_PCI
case MACH_GROUP_SNI_RM:
sni_rm200_pci_setup();
@@ -669,8 +689,9 @@
panic("Unsupported architecture");
}
- strlcpy(command_line, arcs_cmdline, sizeof command_line);
- strlcpy(saved_command_line, command_line, sizeof saved_command_line);
+ strlcpy(command_line, arcs_cmdline, sizeof(command_line));
+ strlcpy(saved_command_line, command_line, sizeof(saved_command_line));
+
*cmdline_p = command_line;
parse_cmdline_early();
@@ -688,4 +709,5 @@
return 1;
}
+
__setup("nofpu", fpu_disable);
diff -Nru a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
--- a/arch/mips/kernel/signal.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/kernel/signal.c Sun Aug 3 13:14:51 2003
@@ -4,8 +4,8 @@
* for more details.
*
* Copyright (C) 1991, 1992 Linus Torvalds
- * Copyright (C) 1994 - 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#include <linux/config.h>
#include <linux/sched.h>
@@ -17,15 +17,14 @@
#include <linux/signal.h>
#include <linux/errno.h>
#include <linux/wait.h>
+#include <linux/ptrace.h>
#include <linux/unistd.h>
#include <asm/asm.h>
#include <asm/bitops.h>
#include <asm/cacheflush.h>
-#include <asm/cpu.h>
#include <asm/fpu.h>
-#include <asm/offset.h>
-#include <asm/ptrace.h>
+#include <asm/sim.h>
#include <asm/uaccess.h>
#include <asm/ucontext.h>
@@ -40,6 +39,8 @@
/*
* Atomically swap in the new signal mask, and wait for a signal.
*/
+
+#ifdef CONFIG_TRAD_SIGNALS
save_static_function(sys_sigsuspend);
static_unused int _sys_sigsuspend(struct pt_regs regs)
{
@@ -65,12 +66,15 @@
return -EINTR;
}
}
+#endif
save_static_function(sys_rt_sigsuspend);
-static_unused int _sys_rt_sigsuspend(struct pt_regs regs)
+static_unused int _sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
sigset_t *unewset, saveset, newset;
- size_t sigsetsize;
+ size_t sigsetsize;
+
+ save_static(®s);
/* XXX Don't preclude handling different sized sigset_t's. */
sigsetsize = regs.regs[5];
@@ -98,6 +102,7 @@
}
}
+#ifdef CONFIG_TRAD_SIGNALS
asmlinkage int sys_sigaction(int sig, const struct sigaction *act,
struct sigaction *oact)
{
@@ -127,17 +132,18 @@
err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
err |= __put_user(old_ka.sa.sa_handler, &oact->sa_handler);
err |= __put_user(old_ka.sa.sa_mask.sig[0], oact->sa_mask.sig);
- err |= __put_user(0, &oact->sa_mask.sig[1]);
- err |= __put_user(0, &oact->sa_mask.sig[2]);
- err |= __put_user(0, &oact->sa_mask.sig[3]);
- if (err)
+ err |= __put_user(0, &oact->sa_mask.sig[1]);
+ err |= __put_user(0, &oact->sa_mask.sig[2]);
+ err |= __put_user(0, &oact->sa_mask.sig[3]);
+ if (err)
return -EFAULT;
}
return ret;
}
+#endif
-asmlinkage int sys_sigaltstack(struct pt_regs regs)
+asmlinkage int sys_sigaltstack(nabi_no_regargs struct pt_regs regs)
{
const stack_t *uss = (const stack_t *) regs.regs[4];
stack_t *uoss = (stack_t *) regs.regs[5];
@@ -146,21 +152,16 @@
return do_sigaltstack(uss, uoss, usp);
}
-static int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
+asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
{
int err = 0;
- u64 reg;
err |= __get_user(regs->cp0_epc, &sc->sc_pc);
-
- err |= __get_user(reg, &sc->sc_mdhi);
- regs->hi = (int) reg;
- err |= __get_user(reg, &sc->sc_mdlo);
- regs->lo = (int) reg;
+ err |= __get_user(regs->hi, &sc->sc_mdhi);
+ err |= __get_user(regs->lo, &sc->sc_mdlo);
#define restore_gp_reg(i) do { \
- err |= __get_user(reg, &sc->sc_regs[i]); \
- regs->regs[i] = reg; \
+ err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
} while(0)
restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
@@ -183,18 +184,20 @@
err |= restore_fp_context(sc);
} else {
/* signal handler may have used FPU. Give it up. */
- loose_fpu();
+ lose_fpu();
}
return err;
}
+#ifdef CONFIG_TRAD_SIGNALS
struct sigframe {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_code[2]; /* signal trampoline */
struct sigcontext sf_sc;
sigset_t sf_mask;
};
+#endif
struct rt_sigframe {
u32 rs_ass[4]; /* argument save space for o32 */
@@ -203,6 +206,7 @@
struct ucontext rs_uc;
};
+#ifdef CONFIG_TRAD_SIGNALS
asmlinkage void sys_sigreturn(struct pt_regs regs)
{
struct sigframe *frame;
@@ -238,8 +242,9 @@
badframe:
force_sig(SIGSEGV, current);
}
+#endif
-asmlinkage void sys_rt_sigreturn(struct pt_regs regs)
+asmlinkage void sys_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
{
struct rt_sigframe *frame;
sigset_t set;
@@ -280,20 +285,17 @@
force_sig(SIGSEGV, current);
}
-static inline int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
+inline int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
{
int err = 0;
- u64 reg;
- reg = regs->cp0_epc; err |= __put_user(reg, &sc->sc_pc);
+ err |= __put_user(regs->cp0_epc, &sc->sc_pc);
err |= __put_user(regs->cp0_status, &sc->sc_status);
-#define save_gp_reg(i) { \
- reg = regs->regs[i]; \
- err |= __put_user(reg, &sc->sc_regs[i]); \
+#define save_gp_reg(i) do { \
+ err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \
} while(0)
- reg = 0; err |= __put_user(reg, &sc->sc_regs[0]);
- save_gp_reg(1); save_gp_reg(2);
+ __put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
save_gp_reg(7); save_gp_reg(8); save_gp_reg(9); save_gp_reg(10);
save_gp_reg(11); save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
@@ -304,8 +306,8 @@
save_gp_reg(31);
#undef save_gp_reg
- reg = regs->hi; err |= __put_user(reg, &sc->sc_mdhi);
- reg = regs->lo; err |= __put_user(reg, &sc->sc_mdlo);
+ err |= __put_user(regs->hi, &sc->sc_mdhi);
+ err |= __put_user(regs->lo, &sc->sc_mdlo);
err |= __put_user(regs->cp0_cause, &sc->sc_cause);
err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr);
@@ -314,7 +316,7 @@
if (!current->used_math)
goto out;
- /*
+ /*
* Save FPU state to signal context. Signal handler will "inherit"
* current FPU state.
*/
@@ -331,7 +333,7 @@
/*
* Determine which stack to use..
*/
-static inline void * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
+static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
size_t frame_size)
{
unsigned long sp;
@@ -348,11 +350,12 @@
/* This is the X/Open sanctioned signal stack switching. */
if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp))
- sp = current->sas_ss_sp + current->sas_ss_size;
+ sp = current->sas_ss_sp + current->sas_ss_size;
return (void *)((sp - frame_size) & ALMASK);
}
+#ifdef CONFIG_TRAD_SIGNALS
static void inline setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
int signr, sigset_t *set)
{
@@ -398,7 +401,7 @@
#if DEBUG_SIG
printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
current->comm, current->pid,
- frame, regs->cp0_epc, frame->sf_code);
+ frame, regs->cp0_epc, frame->regs[31]);
#endif
return;
@@ -407,6 +410,7 @@
ka->sa.sa_handler = SIG_DFL;
force_sig(SIGSEGV, current);
}
+#endif
static void inline setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
int signr, sigset_t *set, siginfo_t *info)
@@ -466,7 +470,7 @@
#if DEBUG_SIG
printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
current->comm, current->pid,
- frame, regs->cp0_epc, frame->rs_code);
+ frame, regs->cp0_epc, regs->regs[31]);
#endif
return;
@@ -476,12 +480,17 @@
force_sig(SIGSEGV, current);
}
+extern void setup_rt_frame_n32(struct k_sigaction * ka,
+ struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info);
+
static inline void handle_signal(unsigned long sig, siginfo_t *info,
- sigset_t *oldset, struct pt_regs * regs)
+ sigset_t *oldset, struct pt_regs *regs)
{
struct k_sigaction *ka = ¤t->sighand->action[sig-1];
switch(regs->regs[0]) {
+ case ERESTART_RESTARTBLOCK:
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
case ERESTARTNOHAND:
regs->regs[2] = EINTR;
break;
@@ -498,8 +507,17 @@
regs->regs[0] = 0; /* Don't deal with this again. */
+#ifdef CONFIG_TRAD_SIGNALS
if (ka->sa.sa_flags & SA_SIGINFO)
- setup_rt_frame(ka, regs, sig, oldset, info);
+#else
+ if (1)
+#endif
+#ifdef CONFIG_MIPS32_N32
+ if ((current->thread.mflags & MF_ABI_MASK) == MF_N32)
+ setup_rt_frame_n32 (ka, regs, sig, oldset, info);
+ else
+#endif
+ setup_rt_frame(ka, regs, sig, oldset, info);
else
setup_frame(ka, regs, sig, oldset);
@@ -514,17 +532,25 @@
}
}
+extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
+extern int do_irix_signal(sigset_t *oldset, struct pt_regs *regs);
+
asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs)
{
siginfo_t info;
int signr;
+#ifdef CONFIG_BINFMT_ELF32
+ if ((current->thread.mflags & MF_ABI_MASK) == MF_O32) {
+ return do_signal32(oldset, regs);
+ }
+#endif
+
if (!oldset)
oldset = ¤t->blocked;
signr = get_signal_to_deliver(&info, regs, NULL);
if (signr > 0) {
- /* Whee! Actually deliver the signal. */
handle_signal(signr, &info, oldset, regs);
return 1;
}
@@ -541,6 +567,10 @@
regs->regs[7] = regs->regs[26];
regs->cp0_epc -= 8;
}
+ if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
+ regs->regs[2] = __NR_restart_syscall;
+ regs->cp0_epc -= 4;
+ }
}
return 0;
}
@@ -556,6 +586,12 @@
{
/* deal with pending signal delivery */
if (thread_info_flags & _TIF_SIGPENDING) {
+#ifdef CONFIG_BINFMT_ELF32
+ if (likely((current->thread.mflags & MF_ABI_MASK) == MF_O32)) {
+ do_signal32(oldset, regs);
+ return;
+ }
+#endif
#ifdef CONFIG_BINFMT_IRIX
if (unlikely(current->personality != PER_LINUX)) {
do_irix_signal(oldset, regs);
diff -Nru a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/signal32.c Sun Aug 3 13:14:48 2003
@@ -0,0 +1,913 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/compat.h>
+
+#include <asm/asm.h>
+#include <asm/bitops.h>
+#include <asm/pgalloc.h>
+#include <asm/sim.h>
+#include <asm/uaccess.h>
+#include <asm/ucontext.h>
+#include <asm/system.h>
+#include <asm/fpu.h>
+
+/*
+ * Including <asm/unistd.h would give use the 64-bit syscall numbers ...
+ */
+#define __NR_O32_sigreturn 4119
+#define __NR_O32_rt_sigreturn 4193
+#define __NR_O32_restart_syscall 4253
+
+#define DEBUG_SIG 0
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+extern asmlinkage int do_signal32(sigset_t *oldset, struct pt_regs *regs);
+
+extern asmlinkage void do_syscall_trace(void);
+
+/* 32-bit compatibility types */
+
+#define _NSIG_BPW32 32
+#define _NSIG_WORDS32 (_NSIG / _NSIG_BPW32)
+
+typedef struct {
+ unsigned int sig[_NSIG_WORDS32];
+} sigset_t32;
+
+typedef unsigned int __sighandler32_t;
+typedef void (*vfptr_t)(void);
+
+struct sigaction32 {
+ unsigned int sa_flags;
+ __sighandler32_t sa_handler;
+ compat_sigset_t sa_mask;
+};
+
+/* IRIX compatible stack_t */
+typedef struct sigaltstack32 {
+ s32 ss_sp;
+ compat_size_t ss_size;
+ int ss_flags;
+} stack32_t;
+
+struct ucontext32 {
+ u32 uc_flags;
+ s32 uc_link;
+ stack32_t uc_stack;
+ struct sigcontext32 uc_mcontext;
+ sigset_t32 uc_sigmask; /* mask last for extensibility */
+};
+
+extern void __put_sigset_unknown_nsig(void);
+extern void __get_sigset_unknown_nsig(void);
+
+static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t *ubuf)
+{
+ int err = 0;
+
+ if (!access_ok(VERIFY_WRITE, ubuf, sizeof(*ubuf)))
+ return -EFAULT;
+
+ switch (_NSIG_WORDS) {
+ default:
+ __put_sigset_unknown_nsig();
+ case 2:
+ err |= __put_user (kbuf->sig[1] >> 32, &ubuf->sig[3]);
+ err |= __put_user (kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]);
+ case 1:
+ err |= __put_user (kbuf->sig[0] >> 32, &ubuf->sig[1]);
+ err |= __put_user (kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]);
+ }
+
+ return err;
+}
+
+static inline int get_sigset(sigset_t *kbuf, const compat_sigset_t *ubuf)
+{
+ int err = 0;
+ unsigned long sig[4];
+
+ if (!access_ok(VERIFY_READ, ubuf, sizeof(*ubuf)))
+ return -EFAULT;
+
+ switch (_NSIG_WORDS) {
+ default:
+ __get_sigset_unknown_nsig();
+ case 2:
+ err |= __get_user (sig[3], &ubuf->sig[3]);
+ err |= __get_user (sig[2], &ubuf->sig[2]);
+ kbuf->sig[1] = sig[2] | (sig[3] << 32);
+ case 1:
+ err |= __get_user (sig[1], &ubuf->sig[1]);
+ err |= __get_user (sig[0], &ubuf->sig[0]);
+ kbuf->sig[0] = sig[0] | (sig[1] << 32);
+ }
+
+ return err;
+}
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage inline int sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
+{
+ compat_sigset_t *uset;
+ sigset_t newset, saveset;
+
+ save_static(®s);
+ uset = (compat_sigset_t *) regs.regs[4];
+ if (get_sigset(&newset, uset))
+ return -EFAULT;
+ sigdelsetmask(&newset, ~_BLOCKABLE);
+
+ spin_lock_irq(¤t->sighand->siglock);
+ saveset = current->blocked;
+ current->blocked = newset;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ regs.regs[2] = EINTR;
+ regs.regs[7] = 1;
+ while (1) {
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ if (do_signal32(&saveset, ®s))
+ return -EINTR;
+ }
+}
+
+asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
+{
+ compat_sigset_t *uset;
+ sigset_t newset, saveset;
+ size_t sigsetsize;
+
+ save_static(®s);
+ /* XXX Don't preclude handling different sized sigset_t's. */
+ sigsetsize = regs.regs[5];
+ if (sigsetsize != sizeof(compat_sigset_t))
+ return -EINVAL;
+
+ uset = (compat_sigset_t *) regs.regs[4];
+ if (get_sigset(&newset, uset))
+ return -EFAULT;
+ sigdelsetmask(&newset, ~_BLOCKABLE);
+
+ spin_lock_irq(¤t->sighand->siglock);
+ saveset = current->blocked;
+ current->blocked = newset;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ regs.regs[2] = EINTR;
+ regs.regs[7] = 1;
+ while (1) {
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ if (do_signal32(&saveset, ®s))
+ return -EINTR;
+ }
+}
+
+asmlinkage int sys32_sigaction(int sig, const struct sigaction32 *act,
+ struct sigaction32 *oact)
+{
+ struct k_sigaction new_ka, old_ka;
+ int ret;
+ int err = 0;
+
+ if (act) {
+ old_sigset_t mask;
+
+ if (!access_ok(VERIFY_READ, act, sizeof(*act)))
+ return -EFAULT;
+ err |= __get_user((u32)(u64)new_ka.sa.sa_handler,
+ &act->sa_handler);
+ err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+ err |= __get_user(mask, &act->sa_mask.sig[0]);
+ if (err)
+ return -EFAULT;
+
+ siginitset(&new_ka.sa.sa_mask, mask);
+ }
+
+ ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+ if (!ret && oact) {
+ if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
+ return -EFAULT;
+ err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
+ err |= __put_user((u32)(u64)old_ka.sa.sa_handler,
+ &oact->sa_handler);
+ err |= __put_user(old_ka.sa.sa_mask.sig[0], oact->sa_mask.sig);
+ err |= __put_user(0, &oact->sa_mask.sig[1]);
+ err |= __put_user(0, &oact->sa_mask.sig[2]);
+ err |= __put_user(0, &oact->sa_mask.sig[3]);
+ if (err)
+ return -EFAULT;
+ }
+
+ return ret;
+}
+
+asmlinkage int sys32_sigaltstack(nabi_no_regargs struct pt_regs regs)
+{
+ const stack32_t *uss = (const stack32_t *) regs.regs[4];
+ stack32_t *uoss = (stack32_t *) regs.regs[5];
+ unsigned long usp = regs.regs[29];
+ stack_t kss, koss;
+ int ret, err = 0;
+ mm_segment_t old_fs = get_fs();
+ s32 sp;
+
+ if (uss) {
+ if (!access_ok(VERIFY_READ, uss, sizeof(*uss)))
+ return -EFAULT;
+ err |= __get_user(sp, &uss->ss_sp);
+ kss.ss_size = (long) sp;
+ err |= __get_user(kss.ss_size, &uss->ss_size);
+ err |= __get_user(kss.ss_flags, &uss->ss_flags);
+ if (err)
+ return -EFAULT;
+ }
+
+ set_fs (KERNEL_DS);
+ ret = do_sigaltstack(uss ? &kss : NULL , uoss ? &koss : NULL, usp);
+ set_fs (old_fs);
+
+ if (!ret && uoss) {
+ if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss)))
+ return -EFAULT;
+ sp = (int) (long) koss.ss_sp;
+ err |= __put_user(sp, &uoss->ss_sp);
+ err |= __put_user(koss.ss_size, &uoss->ss_size);
+ err |= __put_user(koss.ss_flags, &uoss->ss_flags);
+ if (err)
+ return -EFAULT;
+ }
+ return ret;
+}
+
+static asmlinkage int restore_sigcontext32(struct pt_regs *regs,
+ struct sigcontext32 *sc)
+{
+ int err = 0;
+
+ err |= __get_user(regs->cp0_epc, &sc->sc_pc);
+ err |= __get_user(regs->hi, &sc->sc_mdhi);
+ err |= __get_user(regs->lo, &sc->sc_mdlo);
+
+#define restore_gp_reg(i) do { \
+ err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
+} while(0)
+ restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
+ restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
+ restore_gp_reg( 7); restore_gp_reg( 8); restore_gp_reg( 9);
+ restore_gp_reg(10); restore_gp_reg(11); restore_gp_reg(12);
+ restore_gp_reg(13); restore_gp_reg(14); restore_gp_reg(15);
+ restore_gp_reg(16); restore_gp_reg(17); restore_gp_reg(18);
+ restore_gp_reg(19); restore_gp_reg(20); restore_gp_reg(21);
+ restore_gp_reg(22); restore_gp_reg(23); restore_gp_reg(24);
+ restore_gp_reg(25); restore_gp_reg(26); restore_gp_reg(27);
+ restore_gp_reg(28); restore_gp_reg(29); restore_gp_reg(30);
+ restore_gp_reg(31);
+#undef restore_gp_reg
+
+ err |= __get_user(current->used_math, &sc->sc_used_math);
+
+ if (current->used_math) {
+ /* restore fpu context if we have used it before */
+ own_fpu();
+ err |= restore_fp_context32(sc);
+ } else {
+ /* signal handler may have used FPU. Give it up. */
+ lose_fpu();
+ }
+
+ return err;
+}
+
+struct sigframe {
+ u32 sf_ass[4]; /* argument save space for o32 */
+ u32 sf_code[2]; /* signal trampoline */
+ struct sigcontext32 sf_sc;
+ sigset_t sf_mask;
+};
+
+struct rt_sigframe32 {
+ u32 rs_ass[4]; /* argument save space for o32 */
+ u32 rs_code[2]; /* signal trampoline */
+ struct siginfo32 rs_info;
+ struct ucontext32 rs_uc;
+};
+
+static int copy_siginfo_to_user32(siginfo_t32 *to, siginfo_t *from)
+{
+ int err;
+
+ if (!access_ok (VERIFY_WRITE, to, sizeof(siginfo_t32)))
+ return -EFAULT;
+
+ /* If you change siginfo_t structure, please be sure
+ this code is fixed accordingly.
+ It should never copy any pad contained in the structure
+ to avoid security leaks, but must copy the generic
+ 3 ints plus the relevant union member.
+ This routine must convert siginfo from 64bit to 32bit as well
+ at the same time. */
+ err = __put_user(from->si_signo, &to->si_signo);
+ err |= __put_user(from->si_errno, &to->si_errno);
+ err |= __put_user((short)from->si_code, &to->si_code);
+ if (from->si_code < 0)
+ err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad, SI_PAD_SIZE);
+ else {
+ switch (from->si_code >> 16) {
+ case __SI_CHLD >> 16:
+ err |= __put_user(from->si_utime, &to->si_utime);
+ err |= __put_user(from->si_stime, &to->si_stime);
+ err |= __put_user(from->si_status, &to->si_status);
+ default:
+ err |= __put_user(from->si_pid, &to->si_pid);
+ err |= __put_user(from->si_uid, &to->si_uid);
+ break;
+ case __SI_FAULT >> 16:
+ err |= __put_user((long)from->si_addr, &to->si_addr);
+ break;
+ case __SI_POLL >> 16:
+ err |= __put_user(from->si_band, &to->si_band);
+ err |= __put_user(from->si_fd, &to->si_fd);
+ break;
+ /* case __SI_RT: This is not generated by the kernel as of now. */
+ }
+ }
+ return err;
+}
+
+asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs)
+{
+ struct sigframe *frame;
+ sigset_t blocked;
+
+ frame = (struct sigframe *) regs.regs[29];
+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__copy_from_user(&blocked, &frame->sf_mask, sizeof(blocked)))
+ goto badframe;
+
+ sigdelsetmask(&blocked, ~_BLOCKABLE);
+ spin_lock_irq(¤t->sighand->siglock);
+ current->blocked = blocked;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ if (restore_sigcontext32(®s, &frame->sf_sc))
+ goto badframe;
+
+ /*
+ * Don't let your children do this ...
+ */
+ if (current_thread_info()->flags & TIF_SYSCALL_TRACE)
+ do_syscall_trace();
+ __asm__ __volatile__(
+ "move\t$29, %0\n\t"
+ "j\tsyscall_exit"
+ :/* no outputs */
+ :"r" (®s));
+ /* Unreached */
+
+badframe:
+ force_sig(SIGSEGV, current);
+}
+
+asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
+{
+ struct rt_sigframe32 *frame;
+ sigset_t set;
+ stack_t st;
+ s32 sp;
+
+ frame = (struct rt_sigframe32 *) regs.regs[29];
+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
+ goto badframe;
+
+ sigdelsetmask(&set, ~_BLOCKABLE);
+ spin_lock_irq(¤t->sighand->siglock);
+ current->blocked = set;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ if (restore_sigcontext32(®s, &frame->rs_uc.uc_mcontext))
+ goto badframe;
+
+ /* The ucontext contains a stack32_t, so we must convert! */
+ if (__get_user(sp, &frame->rs_uc.uc_stack.ss_sp))
+ goto badframe;
+ st.ss_size = (long) sp;
+ if (__get_user(st.ss_size, &frame->rs_uc.uc_stack.ss_size))
+ goto badframe;
+ if (__get_user(st.ss_flags, &frame->rs_uc.uc_stack.ss_flags))
+ goto badframe;
+
+ /* It is more difficult to avoid calling this function than to
+ call it and ignore errors. */
+ do_sigaltstack(&st, NULL, regs.regs[29]);
+
+ /*
+ * Don't let your children do this ...
+ */
+ __asm__ __volatile__(
+ "move\t$29, %0\n\t"
+ "j\tsyscall_exit"
+ :/* no outputs */
+ :"r" (®s));
+ /* Unreached */
+
+badframe:
+ force_sig(SIGSEGV, current);
+}
+
+static inline int setup_sigcontext32(struct pt_regs *regs,
+ struct sigcontext32 *sc)
+{
+ int err = 0;
+
+ err |= __put_user(regs->cp0_epc, &sc->sc_pc);
+ err |= __put_user(regs->cp0_status, &sc->sc_status);
+
+#define save_gp_reg(i) { \
+ err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \
+} while(0)
+ __put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
+ save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
+ save_gp_reg(7); save_gp_reg(8); save_gp_reg(9); save_gp_reg(10);
+ save_gp_reg(11); save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
+ save_gp_reg(15); save_gp_reg(16); save_gp_reg(17); save_gp_reg(18);
+ save_gp_reg(19); save_gp_reg(20); save_gp_reg(21); save_gp_reg(22);
+ save_gp_reg(23); save_gp_reg(24); save_gp_reg(25); save_gp_reg(26);
+ save_gp_reg(27); save_gp_reg(28); save_gp_reg(29); save_gp_reg(30);
+ save_gp_reg(31);
+#undef save_gp_reg
+
+ err |= __put_user(regs->hi, &sc->sc_mdhi);
+ err |= __put_user(regs->lo, &sc->sc_mdlo);
+ err |= __put_user(regs->cp0_cause, &sc->sc_cause);
+ err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr);
+
+ err |= __put_user(current->used_math, &sc->sc_used_math);
+
+ if (!current->used_math)
+ goto out;
+
+ /*
+ * Save FPU state to signal context. Signal handler will "inherit"
+ * current FPU state.
+ */
+ if (!is_fpu_owner()) {
+ own_fpu();
+ restore_fp(current);
+ }
+ err |= save_fp_context32(sc);
+
+out:
+ return err;
+}
+
+/*
+ * Determine which stack to use..
+ */
+static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
+ size_t frame_size)
+{
+ unsigned long sp;
+
+ /* Default to using normal stack */
+ sp = regs->regs[29];
+
+ /*
+ * FPU emulator may have it's own trampoline active just
+ * above the user stack, 16-bytes before the next lowest
+ * 16 byte boundary. Try to avoid trashing it.
+ */
+ sp -= 32;
+
+ /* This is the X/Open sanctioned signal stack switching. */
+ if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp))
+ sp = current->sas_ss_sp + current->sas_ss_size;
+
+ return (void *)((sp - frame_size) & ALMASK);
+}
+
+static inline void setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set)
+{
+ struct sigframe *frame;
+ int err = 0;
+
+ frame = get_sigframe(ka, regs, sizeof(*frame));
+ if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
+ goto give_sigsegv;
+
+ /*
+ * Set up the return code ...
+ *
+ * li v0, __NR_O32_sigreturn
+ * syscall
+ */
+ err |= __put_user(0x24020000 + __NR_O32_sigreturn, frame->sf_code + 0);
+ err |= __put_user(0x0000000c , frame->sf_code + 1);
+ flush_cache_sigtramp((unsigned long) frame->sf_code);
+
+ err |= setup_sigcontext32(regs, &frame->sf_sc);
+ err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
+ if (err)
+ goto give_sigsegv;
+
+ /*
+ * Arguments to signal handler:
+ *
+ * a0 = signal number
+ * a1 = 0 (should be cause)
+ * a2 = pointer to struct sigcontext
+ *
+ * $25 and c0_epc point to the signal handler, $29 points to the
+ * struct sigframe.
+ */
+ regs->regs[ 4] = signr;
+ regs->regs[ 5] = 0;
+ regs->regs[ 6] = (unsigned long) &frame->sf_sc;
+ regs->regs[29] = (unsigned long) frame;
+ regs->regs[31] = (unsigned long) frame->sf_code;
+ regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
+
+#if DEBUG_SIG
+ printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
+ current->comm, current->pid,
+ frame, regs->cp0_epc, frame->sf_code);
+#endif
+ return;
+
+give_sigsegv:
+ if (signr == SIGSEGV)
+ ka->sa.sa_handler = SIG_DFL;
+ force_sig(SIGSEGV, current);
+}
+
+static inline void setup_rt_frame(struct k_sigaction * ka,
+ struct pt_regs *regs, int signr,
+ sigset_t *set, siginfo_t *info)
+{
+ struct rt_sigframe32 *frame;
+ int err = 0;
+ s32 sp;
+
+ frame = get_sigframe(ka, regs, sizeof(*frame));
+ if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
+ goto give_sigsegv;
+
+ /* Set up to return from userspace. If provided, use a stub already
+ in userspace. */
+ /*
+ * Set up the return code ...
+ *
+ * li v0, __NR_O32_rt_sigreturn
+ * syscall
+ */
+ err |= __put_user(0x24020000 + __NR_O32_rt_sigreturn, frame->rs_code + 0);
+ err |= __put_user(0x0000000c , frame->rs_code + 1);
+ flush_cache_sigtramp((unsigned long) frame->rs_code);
+
+ /* Convert (siginfo_t -> siginfo_t32) and copy to user. */
+ err |= copy_siginfo_to_user32(&frame->rs_info, info);
+
+ /* Create the ucontext. */
+ err |= __put_user(0, &frame->rs_uc.uc_flags);
+ err |= __put_user(0, &frame->rs_uc.uc_link);
+ sp = (int) (long) current->sas_ss_sp;
+ err |= __put_user(sp,
+ &frame->rs_uc.uc_stack.ss_sp);
+ err |= __put_user(sas_ss_flags(regs->regs[29]),
+ &frame->rs_uc.uc_stack.ss_flags);
+ err |= __put_user(current->sas_ss_size,
+ &frame->rs_uc.uc_stack.ss_size);
+ err |= setup_sigcontext32(regs, &frame->rs_uc.uc_mcontext);
+ err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
+
+ if (err)
+ goto give_sigsegv;
+
+ /*
+ * Arguments to signal handler:
+ *
+ * a0 = signal number
+ * a1 = 0 (should be cause)
+ * a2 = pointer to ucontext
+ *
+ * $25 and c0_epc point to the signal handler, $29 points to
+ * the struct rt_sigframe32.
+ */
+ regs->regs[ 4] = signr;
+ regs->regs[ 5] = (unsigned long) &frame->rs_info;
+ regs->regs[ 6] = (unsigned long) &frame->rs_uc;
+ regs->regs[29] = (unsigned long) frame;
+ regs->regs[31] = (unsigned long) frame->rs_code;
+ regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
+
+#if DEBUG_SIG
+ printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
+ current->comm, current->pid,
+ frame, regs->cp0_epc, frame->rs_code);
+#endif
+ return;
+
+give_sigsegv:
+ if (signr == SIGSEGV)
+ ka->sa.sa_handler = SIG_DFL;
+ force_sig(SIGSEGV, current);
+}
+
+static inline void handle_signal(unsigned long sig, siginfo_t *info,
+ sigset_t *oldset, struct pt_regs * regs)
+{
+ struct k_sigaction *ka = ¤t->sighand->action[sig-1];
+
+ switch (regs->regs[0]) {
+ case ERESTART_RESTARTBLOCK:
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+ case ERESTARTNOHAND:
+ regs->regs[2] = EINTR;
+ break;
+ case ERESTARTSYS:
+ if(!(ka->sa.sa_flags & SA_RESTART)) {
+ regs->regs[2] = EINTR;
+ break;
+ }
+ /* fallthrough */
+ case ERESTARTNOINTR: /* Userland will reload $v0. */
+ regs->regs[7] = regs->regs[26];
+ regs->cp0_epc -= 8;
+ }
+
+ regs->regs[0] = 0; /* Don't deal with this again. */
+
+ if (ka->sa.sa_flags & SA_SIGINFO)
+ setup_rt_frame(ka, regs, sig, oldset, info);
+ else
+ setup_frame(ka, regs, sig, oldset);
+
+ if (ka->sa.sa_flags & SA_ONESHOT)
+ ka->sa.sa_handler = SIG_DFL;
+ if (!(ka->sa.sa_flags & SA_NODEFER)) {
+ spin_lock_irq(¤t->sighand->siglock);
+ sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
+ sigaddset(¤t->blocked,sig);
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+ }
+}
+
+asmlinkage int do_signal32(sigset_t *oldset, struct pt_regs *regs)
+{
+ siginfo_t info;
+ int signr;
+
+ if (!oldset)
+ oldset = ¤t->blocked;
+
+ signr = get_signal_to_deliver(&info, regs, NULL);
+ if (signr > 0) {
+ handle_signal(signr, &info, oldset, regs);
+ return 1;
+ }
+
+ /*
+ * Who's code doesn't conform to the restartable syscall convention
+ * dies here!!! The li instruction, a single machine instruction,
+ * must directly be followed by the syscall instruction.
+ */
+ if (regs->regs[0]) {
+ if (regs->regs[2] == ERESTARTNOHAND ||
+ regs->regs[2] == ERESTARTSYS ||
+ regs->regs[2] == ERESTARTNOINTR) {
+ regs->regs[7] = regs->regs[26];
+ regs->cp0_epc -= 8;
+ }
+ if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
+ regs->regs[2] = __NR_O32_restart_syscall;
+ regs->cp0_epc -= 4;
+ }
+ }
+ return 0;
+}
+
+asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 *act,
+ struct sigaction32 *oact,
+ unsigned int sigsetsize)
+{
+ struct k_sigaction new_sa, old_sa;
+ int ret = -EINVAL;
+
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ goto out;
+
+ if (act) {
+ int err = 0;
+
+ if (!access_ok(VERIFY_READ, act, sizeof(*act)))
+ return -EFAULT;
+ err |= __get_user((u32)(u64)new_sa.sa.sa_handler,
+ &act->sa_handler);
+ err |= __get_user(new_sa.sa.sa_flags, &act->sa_flags);
+ err |= get_sigset(&new_sa.sa.sa_mask, &act->sa_mask);
+ if (err)
+ return -EFAULT;
+ }
+
+ ret = do_sigaction(sig, act ? &new_sa : NULL, oact ? &old_sa : NULL);
+
+ if (!ret && oact) {
+ int err = 0;
+
+ if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
+ return -EFAULT;
+
+ err |= __put_user((u32)(u64)old_sa.sa.sa_handler,
+ &oact->sa_handler);
+ err |= __put_user(old_sa.sa.sa_flags, &oact->sa_flags);
+ err |= put_sigset(&old_sa.sa.sa_mask, &oact->sa_mask);
+ if (err)
+ return -EFAULT;
+ }
+out:
+ return ret;
+}
+
+asmlinkage long sys_rt_sigprocmask(int how, sigset_t *set, sigset_t *oset,
+ size_t sigsetsize);
+
+asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t *set,
+ compat_sigset_t *oset, unsigned int sigsetsize)
+{
+ sigset_t old_set, new_set;
+ int ret;
+ mm_segment_t old_fs = get_fs();
+
+ if (set && get_sigset(&new_set, set))
+ return -EFAULT;
+
+ set_fs (KERNEL_DS);
+ ret = sys_rt_sigprocmask(how, set ? &new_set : NULL,
+ oset ? &old_set : NULL, sigsetsize);
+ set_fs (old_fs);
+
+ if (!ret && oset && put_sigset(&old_set, oset))
+ return -EFAULT;
+
+ return ret;
+}
+
+asmlinkage long sys_rt_sigpending(sigset_t *set, size_t sigsetsize);
+
+asmlinkage int sys32_rt_sigpending(compat_sigset_t *uset,
+ unsigned int sigsetsize)
+{
+ int ret;
+ sigset_t set;
+ mm_segment_t old_fs = get_fs();
+
+ set_fs (KERNEL_DS);
+ ret = sys_rt_sigpending(&set, sigsetsize);
+ set_fs (old_fs);
+
+ if (!ret && put_sigset(&set, uset))
+ return -EFAULT;
+
+ return ret;
+}
+
+asmlinkage int sys32_rt_sigtimedwait(compat_sigset_t *uthese,
+ siginfo_t32 *uinfo, struct compat_timespec *uts,
+ compat_time_t sigsetsize)
+{
+ int ret, sig;
+ sigset_t these;
+ compat_sigset_t these32;
+ struct timespec ts;
+ siginfo_t info;
+ long timeout = 0;
+
+ /*
+ * As the result of a brainfarting competition a few years ago the
+ * size of sigset_t for the 32-bit kernel was choosen to be 128 bits
+ * but nothing so far is actually using that many, 64 are enough. So
+ * for now we just drop the high bits.
+ */
+ if (copy_from_user (&these32, uthese, sizeof(compat_old_sigset_t)))
+ return -EFAULT;
+
+ switch (_NSIG_WORDS) {
+#ifdef __MIPSEB__
+ case 4: these.sig[3] = these32.sig[6] | (((long)these32.sig[7]) << 32);
+ case 3: these.sig[2] = these32.sig[4] | (((long)these32.sig[5]) << 32);
+ case 2: these.sig[1] = these32.sig[2] | (((long)these32.sig[3]) << 32);
+ case 1: these.sig[0] = these32.sig[0] | (((long)these32.sig[1]) << 32);
+#endif
+#ifdef __MIPSEL__
+ case 4: these.sig[3] = these32.sig[7] | (((long)these32.sig[6]) << 32);
+ case 3: these.sig[2] = these32.sig[5] | (((long)these32.sig[4]) << 32);
+ case 2: these.sig[1] = these32.sig[3] | (((long)these32.sig[2]) << 32);
+ case 1: these.sig[0] = these32.sig[1] | (((long)these32.sig[0]) << 32);
+#endif
+ }
+
+ /*
+ * Invert the set of allowed signals to get those we
+ * want to block.
+ */
+ sigdelsetmask(&these, sigmask(SIGKILL)|sigmask(SIGSTOP));
+ signotset(&these);
+
+ if (uts) {
+ if (get_user (ts.tv_sec, &uts->tv_sec) ||
+ get_user (ts.tv_nsec, &uts->tv_nsec))
+ return -EINVAL;
+ if (ts.tv_nsec >= 1000000000L || ts.tv_nsec < 0
+ || ts.tv_sec < 0)
+ return -EINVAL;
+ }
+
+ spin_lock_irq(¤t->sighand->siglock);
+ sig = dequeue_signal(current, &these, &info);
+ if (!sig) {
+ /* None ready -- temporarily unblock those we're interested
+ in so that we'll be awakened when they arrive. */
+ sigset_t oldblocked = current->blocked;
+ sigandsets(¤t->blocked, ¤t->blocked, &these);
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ timeout = MAX_SCHEDULE_TIMEOUT;
+ if (uts)
+ timeout = (timespec_to_jiffies(&ts)
+ + (ts.tv_sec || ts.tv_nsec));
+
+ current->state = TASK_INTERRUPTIBLE;
+ timeout = schedule_timeout(timeout);
+
+ spin_lock_irq(¤t->sighand->siglock);
+ sig = dequeue_signal(current, &these, &info);
+ current->blocked = oldblocked;
+ recalc_sigpending();
+ }
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ if (sig) {
+ ret = sig;
+ if (uinfo) {
+ if (copy_siginfo_to_user32(uinfo, &info))
+ ret = -EFAULT;
+ }
+ } else {
+ ret = -EAGAIN;
+ if (timeout)
+ ret = -EINTR;
+ }
+
+ return ret;
+}
+
+extern asmlinkage int sys_rt_sigqueueinfo(int pid, int sig, siginfo_t *uinfo);
+
+asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, siginfo_t32 *uinfo)
+{
+ siginfo_t info;
+ int ret;
+ mm_segment_t old_fs = get_fs();
+
+ if (copy_from_user (&info, uinfo, 3*sizeof(int)) ||
+ copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE))
+ return -EFAULT;
+ set_fs (KERNEL_DS);
+ ret = sys_rt_sigqueueinfo(pid, sig, &info);
+ set_fs (old_fs);
+ return ret;
+}
diff -Nru a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/kernel/signal_n32.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,216 @@
+/*
+ * Copyright (C) 2003 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/compat.h>
+
+#include <asm/asm.h>
+#include <asm/bitops.h>
+#include <asm/pgalloc.h>
+#include <asm/sim.h>
+#include <asm/uaccess.h>
+#include <asm/ucontext.h>
+#include <asm/system.h>
+#include <asm/fpu.h>
+
+/*
+ * Including <asm/unistd.h would give use the 64-bit syscall numbers ...
+ */
+#define __NR_N32_rt_sigreturn 6211
+#define __NR_N32_restart_syscall 6214
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+/* IRIX compatible stack_t */
+typedef struct sigaltstack32 {
+ s32 ss_sp;
+ compat_size_t ss_size;
+ int ss_flags;
+} stack32_t;
+
+struct ucontextn32 {
+ u32 uc_flags;
+ s32 uc_link;
+ stack32_t uc_stack;
+ struct sigcontext uc_mcontext;
+ sigset_t uc_sigmask; /* mask last for extensibility */
+};
+
+struct rt_sigframe_n32 {
+ u32 rs_ass[4]; /* argument save space for o32 */
+ u32 rs_code[2]; /* signal trampoline */
+ struct siginfo rs_info;
+ struct ucontextn32 rs_uc;
+};
+
+extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
+extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
+
+asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
+{
+ struct rt_sigframe_n32 *frame;
+ sigset_t set;
+ stack_t st;
+ s32 sp;
+
+ frame = (struct rt_sigframe_n32 *) regs.regs[29];
+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
+ goto badframe;
+
+ sigdelsetmask(&set, ~_BLOCKABLE);
+ spin_lock_irq(¤t->sighand->siglock);
+ current->blocked = set;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ if (restore_sigcontext(®s, &frame->rs_uc.uc_mcontext))
+ goto badframe;
+
+ /* The ucontext contains a stack32_t, so we must convert! */
+ if (__get_user(sp, &frame->rs_uc.uc_stack.ss_sp))
+ goto badframe;
+ st.ss_size = (long) sp;
+ if (__get_user(st.ss_size, &frame->rs_uc.uc_stack.ss_size))
+ goto badframe;
+ if (__get_user(st.ss_flags, &frame->rs_uc.uc_stack.ss_flags))
+ goto badframe;
+
+ /* It is more difficult to avoid calling this function than to
+ call it and ignore errors. */
+ do_sigaltstack(&st, NULL, regs.regs[29]);
+
+ /*
+ * Don't let your children do this ...
+ */
+ __asm__ __volatile__(
+ "move\t$29, %0\n\t"
+ "j\tsyscall_exit"
+ :/* no outputs */
+ :"r" (®s));
+ /* Unreached */
+
+badframe:
+ force_sig(SIGSEGV, current);
+}
+
+/*
+ * Determine which stack to use..
+ */
+static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
+ size_t frame_size)
+{
+ unsigned long sp;
+
+ /* Default to using normal stack */
+ sp = regs->regs[29];
+
+ /*
+ * FPU emulator may have it's own trampoline active just
+ * above the user stack, 16-bytes before the next lowest
+ * 16 byte boundary. Try to avoid trashing it.
+ */
+ sp -= 32;
+
+ /* This is the X/Open sanctioned signal stack switching. */
+ if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp))
+ sp = current->sas_ss_sp + current->sas_ss_size;
+
+ return (void *)((sp - frame_size) & ALMASK);
+}
+
+void setup_rt_frame_n32(struct k_sigaction * ka,
+ struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
+{
+ struct rt_sigframe_n32 *frame;
+ int err = 0;
+ s32 sp;
+
+ frame = get_sigframe(ka, regs, sizeof(*frame));
+ if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
+ goto give_sigsegv;
+
+ /*
+ * Set up the return code ...
+ *
+ * li v0, __NR_rt_sigreturn
+ * syscall
+ */
+ err |= __put_user(0x24020000 + __NR_N32_rt_sigreturn, frame->rs_code + 0);
+ err |= __put_user(0x0000000c , frame->rs_code + 1);
+ flush_cache_sigtramp((unsigned long) frame->rs_code);
+
+ /* Create siginfo. */
+ err |= copy_siginfo_to_user(&frame->rs_info, info);
+
+ /* Create the ucontext. */
+ err |= __put_user(0, &frame->rs_uc.uc_flags);
+ err |= __put_user(0, &frame->rs_uc.uc_link);
+ sp = (int) (long) current->sas_ss_sp;
+ err |= __put_user(sp,
+ &frame->rs_uc.uc_stack.ss_sp);
+ err |= __put_user(sas_ss_flags(regs->regs[29]),
+ &frame->rs_uc.uc_stack.ss_flags);
+ err |= __put_user(current->sas_ss_size,
+ &frame->rs_uc.uc_stack.ss_size);
+ err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext);
+ err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
+
+ if (err)
+ goto give_sigsegv;
+
+ /*
+ * Arguments to signal handler:
+ *
+ * a0 = signal number
+ * a1 = 0 (should be cause)
+ * a2 = pointer to ucontext
+ *
+ * $25 and c0_epc point to the signal handler, $29 points to
+ * the struct rt_sigframe.
+ */
+ regs->regs[ 4] = signr;
+ regs->regs[ 5] = (unsigned long) &frame->rs_info;
+ regs->regs[ 6] = (unsigned long) &frame->rs_uc;
+ regs->regs[29] = (unsigned long) frame;
+ regs->regs[31] = (unsigned long) frame->rs_code;
+ regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
+
+#if DEBUG_SIG
+ printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
+ current->comm, current->pid,
+ frame, regs->cp0_epc, regs->regs[31]);
+#endif
+ return;
+
+give_sigsegv:
+ if (signr == SIGSEGV)
+ ka->sa.sa_handler = SIG_DFL;
+ force_sig(SIGSEGV, current);
+}
diff -Nru a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
--- a/arch/mips/kernel/smp.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/kernel/smp.c Sun Aug 3 13:14:46 2003
@@ -162,7 +162,7 @@
core_send_ipi(cpu, SMP_RESCHEDULE_YOURSELF);
}
-static spinlock_t call_lock = SPIN_LOCK_UNLOCKED;
+spinlock_t smp_call_lock = SPIN_LOCK_UNLOCKED;
struct call_data_struct *call_data;
@@ -197,12 +197,12 @@
if (wait)
atomic_set(&data.finished, 0);
- spin_lock(&call_lock);
+ spin_lock(&smp_call_lock);
call_data = &data;
/* Send a message to all other CPUs and wait for them to respond */
for (i = 0; i < NR_CPUS; i++)
- if (cpu_online(cpu) && cpu != smp_processor_id())
+ if (cpu_online(cpu) && i != cpu)
core_send_ipi(i, SMP_CALL_FUNCTION);
/* Wait for response */
@@ -213,7 +213,7 @@
if (wait)
while (atomic_read(&data.finished) != cpus)
barrier();
- spin_unlock(&call_lock);
+ spin_unlock(&smp_call_lock);
return 0;
}
@@ -224,7 +224,6 @@
void *info = call_data->info;
int wait = call_data->wait;
- irq_enter();
/*
* Notify initiating CPU that I've grabbed the data and am
* about to execute the function.
diff -Nru a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
--- a/arch/mips/kernel/syscall.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/kernel/syscall.c Sun Aug 3 13:14:51 2003
@@ -3,43 +3,39 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995 - 2000 by Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- *
- * TODO: Implement the compatibility syscalls.
- * Don't waste that much memory for empty entries in the syscall
- * table.
+ * Copyright (C) 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
*/
-#undef CONF_PRINT_SYSCALLS
-#undef CONF_DEBUG_IRIX
-
-#include <linux/config.h>
-#include <linux/compiler.h>
+#include <linux/errno.h>
#include <linux/linkage.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/mman.h>
+#include <linux/ptrace.h>
#include <linux/sched.h>
+#include <linux/string.h>
#include <linux/file.h>
#include <linux/slab.h>
#include <linux/utsname.h>
#include <linux/unistd.h>
+#include <linux/sem.h>
+#include <linux/msg.h>
+#include <linux/shm.h>
+
#include <asm/branch.h>
+#include <asm/cachectl.h>
+#include <asm/cacheflush.h>
+#include <asm/ipc.h>
#include <asm/offset.h>
-#include <asm/ptrace.h>
#include <asm/signal.h>
+#include <asm/sim.h>
#include <asm/shmparam.h>
+#include <asm/sysmips.h>
#include <asm/uaccess.h>
-extern asmlinkage void syscall_trace(void);
-typedef asmlinkage int (*syscall_t)(void *a0,...);
-extern asmlinkage int (*do_syscalls)(struct pt_regs *regs, syscall_t fun,
- int narg);
-extern syscall_t sys_call_table[];
-extern unsigned char sys_narg_table[];
-
-asmlinkage int sys_pipe(struct pt_regs regs)
+asmlinkage int sys_pipe(nabi_no_regargs struct pt_regs regs)
{
int fd[2];
int error, res;
@@ -158,19 +154,20 @@
}
save_static_function(sys_fork);
-static_unused int _sys_fork(struct pt_regs regs)
+static_unused int _sys_fork(nabi_no_regargs struct pt_regs regs)
{
+ save_static(®s);
return do_fork(SIGCHLD, regs.regs[29], ®s, 0, NULL, NULL);
}
-
save_static_function(sys_clone);
-static_unused int _sys_clone(struct pt_regs regs)
+static_unused int _sys_clone(nabi_no_regargs struct pt_regs regs)
{
unsigned long clone_flags;
unsigned long newsp;
int *parent_tidptr, *child_tidptr;
+ save_static(®s);
clone_flags = regs.regs[4];
newsp = regs.regs[5];
if (!newsp)
@@ -184,7 +181,7 @@
/*
* sys_execve() executes a new program.
*/
-asmlinkage int sys_execve(struct pt_regs regs)
+asmlinkage int sys_execve(nabi_no_regargs struct pt_regs regs)
{
int error;
char * filename;
@@ -238,29 +235,146 @@
return error;
}
+asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
+{
+ int tmp, len;
+ char *name;
+
+ switch(cmd) {
+ case SETNAME: {
+ char nodename[__NEW_UTS_LEN + 1];
+
+ if (!capable(CAP_SYS_ADMIN))
+ return -EPERM;
+
+ name = (char *) arg1;
+
+ len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
+ if (len < 0)
+ return -EFAULT;
+
+ down_write(&uts_sem);
+ strncpy(system_utsname.nodename, nodename, len);
+ nodename[__NEW_UTS_LEN] = '\0';
+ strlcpy(system_utsname.nodename, nodename,
+ sizeof(system_utsname.nodename));
+ up_write(&uts_sem);
+ return 0;
+ }
+
+ case MIPS_ATOMIC_SET:
+ printk(KERN_CRIT "How did I get here?\n");
+ return -EINVAL;
+
+ case MIPS_FIXADE:
+ tmp = current->thread.mflags & ~3;
+ current->thread.mflags = tmp | (arg1 & 3);
+ return 0;
+
+ case FLUSH_CACHE:
+ __flush_cache_all();
+ return 0;
+
+ case MIPS_RDNVRAM:
+ return -EIO;
+ }
+
+ return -EINVAL;
+}
+
+/*
+ * sys_ipc() is the de-multiplexer for the SysV IPC calls..
+ *
+ * This is really horribly ugly.
+ */
+asmlinkage int sys_ipc (uint call, int first, int second,
+ unsigned long third, void *ptr, long fifth)
+{
+ int version, ret;
+
+ version = call >> 16; /* hack for backward compatibility */
+ call &= 0xffff;
+
+ switch (call) {
+ case SEMOP:
+ return sys_semop (first, (struct sembuf *)ptr, second);
+ case SEMGET:
+ return sys_semget (first, second, third);
+ case SEMCTL: {
+ union semun fourth;
+ if (!ptr)
+ return -EINVAL;
+ if (get_user(fourth.__pad, (void **) ptr))
+ return -EFAULT;
+ return sys_semctl (first, second, third, fourth);
+ }
+
+ case MSGSND:
+ return sys_msgsnd (first, (struct msgbuf *) ptr,
+ second, third);
+ case MSGRCV:
+ switch (version) {
+ case 0: {
+ struct ipc_kludge tmp;
+ if (!ptr)
+ return -EINVAL;
+
+ if (copy_from_user(&tmp,
+ (struct ipc_kludge *) ptr,
+ sizeof (tmp)))
+ return -EFAULT;
+ return sys_msgrcv (first, tmp.msgp, second,
+ tmp.msgtyp, third);
+ }
+ default:
+ return sys_msgrcv (first,
+ (struct msgbuf *) ptr,
+ second, fifth, third);
+ }
+ case MSGGET:
+ return sys_msgget ((key_t) first, second);
+ case MSGCTL:
+ return sys_msgctl (first, second, (struct msqid_ds *) ptr);
+
+ case SHMAT:
+ switch (version) {
+ default: {
+ ulong raddr;
+ ret = sys_shmat (first, (char *) ptr, second, &raddr);
+ if (ret)
+ return ret;
+ return put_user (raddr, (ulong *) third);
+ }
+ case 1: /* iBCS2 emulator entry point */
+ if (!segment_eq(get_fs(), get_ds()))
+ return -EINVAL;
+ return sys_shmat (first, (char *) ptr, second, (ulong *) third);
+ }
+ case SHMDT:
+ return sys_shmdt ((char *)ptr);
+ case SHMGET:
+ return sys_shmget (first, second, third);
+ case SHMCTL:
+ return sys_shmctl (first, second,
+ (struct shmid_ds *) ptr);
+ default:
+ return -ENOSYS;
+ }
+}
+
+/*
+ * No implemented yet ...
+ */
+asmlinkage int sys_cachectl(char *addr, int nbytes, int op)
+{
+ return -ENOSYS;
+}
+
/*
* If we ever come here the user sp is bad. Zap the process right away.
* Due to the bad stack signaling wouldn't work.
- * XXX kernel locking???
*/
asmlinkage void bad_stack(void)
{
do_exit(SIGSEGV);
}
-
-/*
- * Build the string table for the builtin "poor man's strace".
- */
-#ifdef CONF_PRINT_SYSCALLS
-#define SYS(fun, narg) #fun,
-static char *sfnames[] = {
-#include "syscalls.h"
-};
-#endif
-
-#if defined(CONFIG_BINFMT_IRIX) && defined(CONF_DEBUG_IRIX)
-#define SYS(fun, narg) #fun,
-static char *irix_sys_names[] = {
-#include "irix5sys.h"
-};
-#endif
diff -Nru a/arch/mips/kernel/syscalls.h b/arch/mips/kernel/syscalls.h
--- a/arch/mips/kernel/syscalls.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,273 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 96, 97, 98, 99, 2000, 2001, 2002 by Ralf Baechle
- */
-
-/*
- * This file is being included twice - once to build a list of all
- * syscalls and once to build a table of how many arguments each syscall
- * accepts. Syscalls that receive a pointer to the saved registers are
- * marked as having zero arguments.
- *
- * The binary compatibility calls are in a separate list.
- */
-SYS(sys_syscall, 0) /* 4000 */
-SYS(sys_exit, 1)
-SYS(sys_fork, 0)
-SYS(sys_read, 3)
-SYS(sys_write, 3)
-SYS(sys_open, 3) /* 4005 */
-SYS(sys_close, 1)
-SYS(sys_waitpid, 3)
-SYS(sys_creat, 2)
-SYS(sys_link, 2)
-SYS(sys_unlink, 1) /* 4010 */
-SYS(sys_execve, 0)
-SYS(sys_chdir, 1)
-SYS(sys_time, 1)
-SYS(sys_mknod, 3)
-SYS(sys_chmod, 2) /* 4015 */
-SYS(sys_lchown, 3)
-SYS(sys_ni_syscall, 0)
-SYS(sys_ni_syscall, 0) /* was sys_stat */
-SYS(sys_lseek, 3)
-SYS(sys_getpid, 0) /* 4020 */
-SYS(sys_mount, 5)
-SYS(sys_oldumount, 1)
-SYS(sys_setuid, 1)
-SYS(sys_getuid, 0)
-SYS(sys_stime, 1) /* 4025 */
-SYS(sys_ptrace, 4)
-SYS(sys_alarm, 1)
-SYS(sys_ni_syscall, 0) /* was sys_fstat */
-SYS(sys_pause, 0)
-SYS(sys_utime, 2) /* 4030 */
-SYS(sys_ni_syscall, 0)
-SYS(sys_ni_syscall, 0)
-SYS(sys_access, 2)
-SYS(sys_nice, 1)
-SYS(sys_ni_syscall, 0) /* 4035 */
-SYS(sys_sync, 0)
-SYS(sys_kill, 2)
-SYS(sys_rename, 2)
-SYS(sys_mkdir, 2)
-SYS(sys_rmdir, 1) /* 4040 */
-SYS(sys_dup, 1)
-SYS(sys_pipe, 0)
-SYS(sys_times, 1)
-SYS(sys_ni_syscall, 0)
-SYS(sys_brk, 1) /* 4045 */
-SYS(sys_setgid, 1)
-SYS(sys_getgid, 0)
-SYS(sys_ni_syscall, 0) /* was signal(2) */
-SYS(sys_geteuid, 0)
-SYS(sys_getegid, 0) /* 4050 */
-SYS(sys_acct, 0)
-SYS(sys_umount, 2)
-SYS(sys_ni_syscall, 0)
-SYS(sys_ioctl, 3)
-SYS(sys_fcntl, 3) /* 4055 */
-SYS(sys_ni_syscall, 2)
-SYS(sys_setpgid, 2)
-SYS(sys_ni_syscall, 0)
-SYS(sys_olduname, 1)
-SYS(sys_umask, 1) /* 4060 */
-SYS(sys_chroot, 1)
-SYS(sys_ustat, 2)
-SYS(sys_dup2, 2)
-SYS(sys_getppid, 0)
-SYS(sys_getpgrp, 0) /* 4065 */
-SYS(sys_setsid, 0)
-SYS(sys_sigaction, 3)
-SYS(sys_sgetmask, 0)
-SYS(sys_ssetmask, 1)
-SYS(sys_setreuid, 2) /* 4070 */
-SYS(sys_setregid, 2)
-SYS(sys_sigsuspend, 0)
-SYS(sys_sigpending, 1)
-SYS(sys_sethostname, 2)
-SYS(sys_setrlimit, 2) /* 4075 */
-SYS(sys_getrlimit, 2)
-SYS(sys_getrusage, 2)
-SYS(sys_gettimeofday, 2)
-SYS(sys_settimeofday, 2)
-SYS(sys_getgroups, 2) /* 4080 */
-SYS(sys_setgroups, 2)
-SYS(sys_ni_syscall, 0) /* old_select */
-SYS(sys_symlink, 2)
-SYS(sys_ni_syscall, 0) /* was sys_lstat */
-SYS(sys_readlink, 3) /* 4085 */
-SYS(sys_uselib, 1)
-SYS(sys_swapon, 2)
-SYS(sys_reboot, 3)
-SYS(old_readdir, 3)
-SYS(old_mmap, 6) /* 4090 */
-SYS(sys_munmap, 2)
-SYS(sys_truncate, 2)
-SYS(sys_ftruncate, 2)
-SYS(sys_fchmod, 2)
-SYS(sys_fchown, 3) /* 4095 */
-SYS(sys_getpriority, 2)
-SYS(sys_setpriority, 3)
-SYS(sys_ni_syscall, 0)
-SYS(sys_statfs, 2)
-SYS(sys_fstatfs, 2) /* 4100 */
-SYS(sys_ni_syscall, 0) /* was ioperm(2) */
-SYS(sys_socketcall, 2)
-SYS(sys_syslog, 3)
-SYS(sys_setitimer, 3)
-SYS(sys_getitimer, 2) /* 4105 */
-SYS(sys_newstat, 2)
-SYS(sys_newlstat, 2)
-SYS(sys_newfstat, 2)
-SYS(sys_uname, 1)
-SYS(sys_ni_syscall, 0) /* 4110 was iopl(2) */
-SYS(sys_vhangup, 0)
-SYS(sys_ni_syscall, 0) /* was sys_idle() */
-SYS(sys_ni_syscall, 0) /* was sys_vm86 */
-SYS(sys_wait4, 4)
-SYS(sys_swapoff, 1) /* 4115 */
-SYS(sys_sysinfo, 1)
-SYS(sys_ipc, 6)
-SYS(sys_fsync, 1)
-SYS(sys_sigreturn, 0)
-SYS(sys_clone, 0) /* 4120 */
-SYS(sys_setdomainname, 2)
-SYS(sys_newuname, 1)
-SYS(sys_ni_syscall, 0) /* sys_modify_ldt */
-SYS(sys_adjtimex, 1)
-SYS(sys_mprotect, 3) /* 4125 */
-SYS(sys_sigprocmask, 3)
-SYS(sys_ni_syscall, 0) /* was create_module */
-SYS(sys_init_module, 5)
-SYS(sys_delete_module, 1)
-SYS(sys_ni_syscall, 0) /* 4130, was get_kernel_syms */
-SYS(sys_quotactl, 0)
-SYS(sys_getpgid, 1)
-SYS(sys_fchdir, 1)
-SYS(sys_bdflush, 2)
-SYS(sys_sysfs, 3) /* 4135 */
-SYS(sys_personality, 1)
-SYS(sys_ni_syscall, 0) /* for afs_syscall */
-SYS(sys_setfsuid, 1)
-SYS(sys_setfsgid, 1)
-SYS(sys_llseek, 5) /* 4140 */
-SYS(sys_getdents, 3)
-SYS(sys_select, 5)
-SYS(sys_flock, 2)
-SYS(sys_msync, 3)
-SYS(sys_readv, 3) /* 4145 */
-SYS(sys_writev, 3)
-SYS(sys_cacheflush, 3)
-SYS(sys_cachectl, 3)
-SYS(sys_sysmips, 4)
-SYS(sys_ni_syscall, 0) /* 4150 */
-SYS(sys_getsid, 1)
-SYS(sys_fdatasync, 0)
-SYS(sys_sysctl, 1)
-SYS(sys_mlock, 2)
-SYS(sys_munlock, 2) /* 4155 */
-SYS(sys_mlockall, 1)
-SYS(sys_munlockall, 0)
-SYS(sys_sched_setparam,2)
-SYS(sys_sched_getparam,2)
-SYS(sys_sched_setscheduler,3) /* 4160 */
-SYS(sys_sched_getscheduler,1)
-SYS(sys_sched_yield,0)
-SYS(sys_sched_get_priority_max,1)
-SYS(sys_sched_get_priority_min,1)
-SYS(sys_sched_rr_get_interval,2) /* 4165 */
-SYS(sys_nanosleep,2)
-SYS(sys_mremap,4)
-SYS(sys_accept, 3)
-SYS(sys_bind, 3)
-SYS(sys_connect, 3) /* 4170 */
-SYS(sys_getpeername, 3)
-SYS(sys_getsockname, 3)
-SYS(sys_getsockopt, 5)
-SYS(sys_listen, 2)
-SYS(sys_recv, 4) /* 4175 */
-SYS(sys_recvfrom, 6)
-SYS(sys_recvmsg, 3)
-SYS(sys_send, 4)
-SYS(sys_sendmsg, 3)
-SYS(sys_sendto, 6) /* 4180 */
-SYS(sys_setsockopt, 5)
-SYS(sys_shutdown, 2)
-SYS(sys_socket, 3)
-SYS(sys_socketpair, 4)
-SYS(sys_setresuid, 3) /* 4185 */
-SYS(sys_getresuid, 3)
-SYS(sys_ni_syscall, 0) /* sys_query_module */
-SYS(sys_poll, 3)
-SYS(sys_nfsservctl, 3)
-SYS(sys_setresgid, 3) /* 4190 */
-SYS(sys_getresgid, 3)
-SYS(sys_prctl, 5)
-SYS(sys_rt_sigreturn, 0)
-SYS(sys_rt_sigaction, 4)
-SYS(sys_rt_sigprocmask, 4) /* 4195 */
-SYS(sys_rt_sigpending, 2)
-SYS(sys_rt_sigtimedwait, 4)
-SYS(sys_rt_sigqueueinfo, 3)
-SYS(sys_rt_sigsuspend, 0)
-SYS(sys_pread64, 6) /* 4200 */
-SYS(sys_pwrite64, 6)
-SYS(sys_chown, 3)
-SYS(sys_getcwd, 2)
-SYS(sys_capget, 2)
-SYS(sys_capset, 2) /* 4205 */
-SYS(sys_sigaltstack, 0)
-SYS(sys_sendfile, 4)
-SYS(sys_ni_syscall, 0)
-SYS(sys_ni_syscall, 0)
-SYS(sys_mmap2, 6) /* 4210 */
-SYS(sys_truncate64, 4)
-SYS(sys_ftruncate64, 4)
-SYS(sys_stat64, 2)
-SYS(sys_lstat64, 2)
-SYS(sys_fstat64, 2) /* 4215 */
-SYS(sys_pivot_root, 2)
-SYS(sys_mincore, 3)
-SYS(sys_madvise, 3)
-SYS(sys_getdents64, 3)
-SYS(sys_fcntl64, 3) /* 4220 */
-SYS(sys_ni_syscall, 0)
-SYS(sys_gettid, 0)
-SYS(sys_readahead, 5)
-SYS(sys_setxattr, 5)
-SYS(sys_lsetxattr, 5) /* 4225 */
-SYS(sys_fsetxattr, 5)
-SYS(sys_getxattr, 4)
-SYS(sys_lgetxattr, 4)
-SYS(sys_fgetxattr, 4)
-SYS(sys_listxattr, 3) /* 4230 */
-SYS(sys_llistxattr, 3)
-SYS(sys_flistxattr, 3)
-SYS(sys_removexattr, 2)
-SYS(sys_lremovexattr, 2)
-SYS(sys_fremovexattr, 2) /* 4235 */
-SYS(sys_tkill, 2)
-SYS(sys_sendfile64, 5)
-SYS(sys_futex, 2)
-SYS(sys_sched_setaffinity, 3)
-SYS(sys_sched_getaffinity, 3) /* 4240 */
-SYS(sys_io_setup, 2)
-SYS(sys_io_destroy, 1)
-SYS(sys_io_getevents, 5)
-SYS(sys_io_submit, 3)
-SYS(sys_io_cancel, 3) /* 4245 */
-SYS(sys_exit_group, 1)
-SYS(sys_lookup_dcookie, 3)
-SYS(sys_epoll_create, 1)
-SYS(sys_epoll_ctl, 4)
-SYS(sys_epoll_wait, 3) /* 4250 */
-SYS(sys_remap_file_pages, 5)
-SYS(sys_set_tid_address, 1)
-SYS(sys_restart_syscall, 0) /* XXX */
-SYS(sys_fadvise64, 6)
-SYS(sys_statfs64, 3) /* 4255 */
-SYS(sys_fstatfs64, 2)
diff -Nru a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
--- a/arch/mips/kernel/sysirix.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/kernel/sysirix.c Sun Aug 3 13:14:52 2003
@@ -721,7 +721,7 @@
int len, int fs_type)
{
struct nameidata nd;
- struct statfs kbuf;
+ struct kstatfs kbuf;
int error, i;
/* We don't support this feature yet. */
@@ -761,7 +761,7 @@
asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs *buf)
{
- struct statfs kbuf;
+ struct kstatfs kbuf;
struct file *file;
int error, i;
@@ -1404,7 +1404,7 @@
asmlinkage int irix_statvfs(char *fname, struct irix_statvfs *buf)
{
struct nameidata nd;
- struct statfs kbuf;
+ struct kstatfs kbuf;
int error, i;
printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
@@ -1449,7 +1449,7 @@
asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs *buf)
{
- struct statfs kbuf;
+ struct kstatfs kbuf;
struct file *file;
int error, i;
@@ -1665,7 +1665,7 @@
asmlinkage int irix_statvfs64(char *fname, struct irix_statvfs64 *buf)
{
struct nameidata nd;
- struct statfs kbuf;
+ struct kstatfs kbuf;
int error, i;
printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
@@ -1710,7 +1710,7 @@
asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs *buf)
{
- struct statfs kbuf;
+ struct kstatfs kbuf;
struct file *file;
int error, i;
diff -Nru a/arch/mips/kernel/sysmips.c b/arch/mips/kernel/sysmips.c
--- a/arch/mips/kernel/sysmips.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,113 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/errno.h>
-#include <linux/linkage.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/utsname.h>
-#include <linux/ptrace.h>
-
-#include <asm/cachectl.h>
-#include <asm/cacheflush.h>
-#include <asm/sysmips.h>
-#include <asm/uaccess.h>
-
-extern asmlinkage void syscall_trace(void);
-
-/*
- * How long a hostname can we get from user space?
- * -EFAULT if invalid area or too long
- * 0 if ok
- * >0 EFAULT after xx bytes
- */
-static inline int
-get_max_hostname(unsigned long address)
-{
- struct vm_area_struct * vma;
-
- vma = find_vma(current->mm, address);
- if (!vma || vma->vm_start > address || !(vma->vm_flags & VM_READ))
- return -EFAULT;
- address = vma->vm_end - address;
- if (address > PAGE_SIZE)
- return 0;
- if (vma->vm_next && vma->vm_next->vm_start == vma->vm_end &&
- (vma->vm_next->vm_flags & VM_READ))
- return 0;
- return address;
-}
-
-asmlinkage int
-_sys_sysmips(int cmd, int arg1, int arg2, int arg3)
-{
- char *name;
- int tmp, len, retval;
-
- switch(cmd) {
- case SETNAME: {
- char nodename[__NEW_UTS_LEN + 1];
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- name = (char *) arg1;
-
- len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
- if (len < 0)
- return -EFAULT;
-
- down_write(&uts_sem);
- strncpy(system_utsname.nodename, nodename, len);
- nodename[__NEW_UTS_LEN] = '\0';
- strlcpy(system_utsname.nodename, nodename,
- sizeof(system_utsname.nodename));
- up_write(&uts_sem);
- return 0;
- }
-
- case MIPS_ATOMIC_SET:
- printk(KERN_CRIT "How did I get here?\n");
- retval = -EINVAL;
- goto out;
-
- case MIPS_FIXADE:
- tmp = current->thread.mflags & ~3;
- current->thread.mflags = tmp | (arg1 & 3);
- retval = 0;
- goto out;
-
- case FLUSH_CACHE:
- __flush_cache_all();
- retval = 0;
- goto out;
-
- case MIPS_RDNVRAM:
- retval = -EIO;
- goto out;
-
- default:
- retval = -EINVAL;
- goto out;
- }
-
-out:
- return retval;
-}
-
-/*
- * No implemented yet ...
- */
-asmlinkage int
-sys_cachectl(char *addr, int nbytes, int op)
-{
- return -ENOSYS;
-}
diff -Nru a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
--- a/arch/mips/kernel/time.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/kernel/time.c Sun Aug 3 13:14:47 2003
@@ -1,9 +1,10 @@
/*
* Copyright 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ * Copyright (c) 2003 Maciej W. Rozycki
*
* Common time service routines for MIPS machines. See
- * Documents/mips/README.txt.
+ * Documentation/mips/time.README.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -25,9 +26,10 @@
#include <asm/bootinfo.h>
#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/hardirq.h>
#include <asm/div64.h>
+#include <asm/hardirq.h>
+#include <asm/sections.h>
+#include <asm/time.h>
/* This is for machines which generate the exact clock. */
#define USECS_PER_JIFFY (1000000/HZ)
@@ -64,6 +66,7 @@
unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
+int (*rtc_set_mmss)(unsigned long);
/*
@@ -143,14 +146,11 @@
*/
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-
/* usecs per counter cycle, shifted to left by 32 bits */
-static unsigned int sll32_usecs_per_cycle=0;
+static unsigned int sll32_usecs_per_cycle;
/* how many counter cycles in a jiffy */
-static unsigned long cycles_per_jiffy=0;
+static unsigned long cycles_per_jiffy;
/* Cycle counter value at the previous timer interrupt.. */
static unsigned int timerhi, timerlo;
@@ -180,34 +180,33 @@
/* .. relative to previous jiffy (32 bits is enough) */
count -= timerlo;
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (sll32_usecs_per_cycle));
+ __asm__("multu %1,%2"
+ : "=h" (res)
+ : "r" (count), "r" (sll32_usecs_per_cycle)
+ : "lo", "accum");
/*
* Due to possible jiffies inconsistencies, we need to check
* the result so that we'll get a timer that is monotonic.
*/
if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
+ res = USECS_PER_JIFFY - 1;
return res;
}
/*
- * Cached "1/(clocks per usec)*2^32" value.
+ * Cached "1/(clocks per usec) * 2^32" value.
* It has to be recalculated once each jiffy.
*/
static unsigned long cached_quotient;
/* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
-static unsigned long last_jiffies = 0;
+static unsigned long last_jiffies;
/*
- * This is copied from dec/time.c:do_ioasic_gettimeoffset() by Mercij.
+ * This is copied from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
*/
unsigned long calibrate_div32_gettimeoffset(void)
{
@@ -225,7 +224,7 @@
unsigned long r0;
do_div64_32(r0, timerhi, timerlo, tmp);
do_div64_32(quotient, USECS_PER_JIFFY,
- USECS_PER_JIFFY_FRAC, r0);
+ USECS_PER_JIFFY_FRAC, r0);
cached_quotient = quotient;
}
}
@@ -236,9 +235,10 @@
/* .. relative to previous jiffy (32 bits is enough) */
count -= timerlo;
- __asm__("multu %2,%3"
- : "=l" (tmp), "=h" (res)
- : "r" (count), "r" (quotient));
+ __asm__("multu %1,%2"
+ : "=h" (res)
+ : "r" (count), "r" (quotient)
+ : "lo", "accum");
/*
* Due to possible jiffies inconsistencies, we need to check
@@ -262,27 +262,24 @@
if (tmp && last_jiffies != tmp) {
last_jiffies = tmp;
- __asm__(".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips3\n\t"
- "lwu\t%0,%2\n\t"
- "dsll32\t$1,%1,0\n\t"
- "or\t$1,$1,%0\n\t"
- "ddivu\t$0,$1,%3\n\t"
- "mflo\t$1\n\t"
- "dsll32\t%0,%4,0\n\t"
- "nop\n\t"
- "ddivu\t$0,%0,$1\n\t"
- "mflo\t%0\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=&r" (quotient)
- :"r" (timerhi),
- "m" (timerlo),
- "r" (tmp),
- "r" (USECS_PER_JIFFY));
- cached_quotient = quotient;
+ __asm__(".set push\n\t"
+ ".set noreorder\n\t"
+ ".set noat\n\t"
+ ".set mips3\n\t"
+ "lwu %0,%2\n\t"
+ "dsll32 $1,%1,0\n\t"
+ "or $1,$1,%0\n\t"
+ "ddivu $0,$1,%3\n\t"
+ "mflo $1\n\t"
+ "dsll32 %0,%4,0\n\t"
+ "nop\n\t"
+ "ddivu $0,%0,$1\n\t"
+ "mflo %0\n\t"
+ ".set pop"
+ : "=&r" (quotient)
+ : "r" (timerhi), "m" (timerlo),
+ "r" (tmp), "r" (USECS_PER_JIFFY));
+ cached_quotient = quotient;
}
/* Get last timer tick in absolute kernel time */
@@ -291,18 +288,17 @@
/* .. relative to previous jiffy (32 bits is enough) */
count -= timerlo;
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
+ __asm__("multu %1,%2"
+ : "=h" (res)
+ : "r" (count), "r" (quotient)
+ : "lo", "accum");
/*
* Due to possible jiffies inconsistencies, we need to check
* the result so that we'll get a timer that is monotonic.
*/
if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
+ res = USECS_PER_JIFFY - 1;
return res;
}
@@ -322,18 +318,17 @@
{
if (!user_mode(regs)) {
if (prof_buffer && current->pid) {
- extern int _stext;
unsigned long pc = regs->cp0_epc;
- pc -= (unsigned long) &_stext;
+ pc -= (unsigned long) _stext;
pc >>= prof_shift;
/*
* Dont ignore out-of-bounds pc values silently,
* put them into the last histogram slot, so if
* present, they will show up as a sharp peak.
*/
- if (pc > prof_len-1)
- pc = prof_len-1;
+ if (pc > prof_len - 1)
+ pc = prof_len - 1;
atomic_inc((atomic_t *)&prof_buffer[pc]);
}
}
@@ -360,7 +355,7 @@
/* check to see if we have missed any timer interrupts */
if ((count - expirelo) < 0x7fffffff) {
- /* missed_timer_count ++; */
+ /* missed_timer_count++; */
expirelo = count + cycles_per_jiffy;
write_c0_compare(expirelo);
}
@@ -385,11 +380,11 @@
xtime.tv_sec > last_rtc_update + 660 &&
(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
(xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
- if (rtc_set_time(xtime.tv_sec) == 0) {
+ if (rtc_set_mmss(xtime.tv_sec) == 0) {
last_rtc_update = xtime.tv_sec;
} else {
- last_rtc_update = xtime.tv_sec - 600;
/* do it again in 60 s */
+ last_rtc_update = xtime.tv_sec - 600;
}
}
write_sequnlock(&xtime_lock);
@@ -411,7 +406,7 @@
* In SMP mode, local_timer_interrupt() is invoked by appropriate
* low-level local timer interrupt handler.
*/
- local_timer_interrupt(0, NULL, regs);
+ local_timer_interrupt(irq, dev_id, regs);
#else /* CONFIG_SMP */
@@ -433,34 +428,24 @@
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
{
- int cpu = smp_processor_id();
-
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
/* we keep interrupt disabled all the time */
timer_interrupt(irq, NULL, regs);
irq_exit();
-
- if (softirq_pending(cpu))
- do_softirq();
}
asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
{
- int cpu = smp_processor_id();
-
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
/* we keep interrupt disabled all the time */
local_timer_interrupt(irq, NULL, regs);
irq_exit();
-
- if (softirq_pending(cpu))
- do_softirq();
}
/*
@@ -480,18 +465,15 @@
* c) enable the timer interrupt
*/
-void (*board_time_init)(void) = NULL;
-void (*board_timer_setup)(struct irqaction *irq) = NULL;
+void (*board_time_init)(void);
+void (*board_timer_setup)(struct irqaction *irq);
-unsigned int mips_counter_frequency = 0;
+unsigned int mips_counter_frequency;
static struct irqaction timer_irqaction = {
- timer_interrupt,
- SA_INTERRUPT,
- 0,
- "timer",
- NULL,
- NULL
+ .handler = timer_interrupt,
+ .flags = SA_INTERRUPT,
+ .name = "timer",
};
void __init time_init(void)
@@ -499,11 +481,14 @@
if (board_time_init)
board_time_init();
+ if (!rtc_set_mmss)
+ rtc_set_mmss = rtc_set_time;
+
xtime.tv_sec = rtc_get_time();
xtime.tv_nsec = 0;
- set_normalized_timespec(&wall_to_monotonic,
- -xtime.tv_sec, -xtime.tv_nsec);
+ set_normalized_timespec(&wall_to_monotonic,
+ -xtime.tv_sec, -xtime.tv_nsec);
/* choose appropriate gettimeoffset routine */
if (!cpu_has_counter) {
@@ -561,15 +546,15 @@
#define STARTOFTIME 1970
#define SECDAY 86400L
#define SECYR (SECDAY * 365)
-#define leapyear(year) ((year) % 4 == 0)
-#define days_in_year(a) (leapyear(a) ? 366 : 365)
-#define days_in_month(a) (month_days[(a) - 1])
+#define leapyear(y) ((!((y) % 4) && ((y) % 100)) || !((y) % 400))
+#define days_in_year(y) (leapyear(y) ? 366 : 365)
+#define days_in_month(m) (month_days[(m) - 1])
static int month_days[12] = {
31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
};
-void to_tm(unsigned long tim, struct rtc_time * tm)
+void to_tm(unsigned long tim, struct rtc_time *tm)
{
long hms, day, gday;
int i;
@@ -584,16 +569,16 @@
/* Number of years in days */
for (i = STARTOFTIME; day >= days_in_year(i); i++)
- day -= days_in_year(i);
+ day -= days_in_year(i);
tm->tm_year = i;
/* Number of months in days left */
if (leapyear(tm->tm_year))
- days_in_month(FEBRUARY) = 29;
+ days_in_month(FEBRUARY) = 29;
for (i = 1; day >= days_in_month(i); i++)
- day -= days_in_month(i);
+ day -= days_in_month(i);
days_in_month(FEBRUARY) = 28;
- tm->tm_mon = i-1; /* tm_mon starts from 0 to 11 */
+ tm->tm_mon = i - 1; /* tm_mon starts from 0 to 11 */
/* Days are what is left over (+1) from all that. */
tm->tm_mday = day + 1;
@@ -601,7 +586,10 @@
/*
* Determine the day of week
*/
- tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */
+ tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */
}
EXPORT_SYMBOL(rtc_lock);
+EXPORT_SYMBOL(to_tm);
+EXPORT_SYMBOL(rtc_set_time);
+EXPORT_SYMBOL(rtc_get_time);
diff -Nru a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
--- a/arch/mips/kernel/traps.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/kernel/traps.c Sun Aug 3 13:14:47 2003
@@ -40,6 +40,9 @@
extern asmlinkage void handle_mod(void);
extern asmlinkage void handle_tlbl(void);
extern asmlinkage void handle_tlbs(void);
+extern asmlinkage void __xtlb_mod(void);
+extern asmlinkage void __xtlb_tlbl(void);
+extern asmlinkage void __xtlb_tlbs(void);
extern asmlinkage void handle_adel(void);
extern asmlinkage void handle_ades(void);
extern asmlinkage void handle_ibe(void);
@@ -164,7 +167,7 @@
/*
* Saved main processor registers
*/
- for (i = 0; i < 32; i++) {
+ for (i = 0; i < 32; ) {
if ((i % 4) == 0)
printk("$%2d :", i);
if (i == 0)
@@ -489,7 +492,7 @@
* We can't allow the emulated instruction to leave any of
* the cause bit set in $fcr31.
*/
- current->thread.fpu.soft.sr &= ~FPU_CSR_ALL_X;
+ current->thread.fpu.soft.fcr31 &= ~FPU_CSR_ALL_X;
/* Restore the hardware register state */
restore_fp(current);
@@ -796,6 +799,9 @@
return (void *)old_handler;
}
+/*
+ * This is used by native signal handling
+ */
asmlinkage int (*save_fp_context)(struct sigcontext *sc);
asmlinkage int (*restore_fp_context)(struct sigcontext *sc);
@@ -805,12 +811,52 @@
extern asmlinkage int fpu_emulator_save_context(struct sigcontext *sc);
extern asmlinkage int fpu_emulator_restore_context(struct sigcontext *sc);
+static inline void signal_init(void)
+{
+ if (cpu_has_fpu) {
+ save_fp_context = _save_fp_context;
+ restore_fp_context = _restore_fp_context;
+ } else {
+ save_fp_context = fpu_emulator_save_context;
+ restore_fp_context = fpu_emulator_restore_context;
+ }
+}
+
+#ifdef CONFIG_MIPS32_COMPAT
+
+/*
+ * This is used by 32-bit signal stuff on the 64-bit kernel
+ */
+asmlinkage int (*save_fp_context32)(struct sigcontext32 *sc);
+asmlinkage int (*restore_fp_context32)(struct sigcontext32 *sc);
+
+extern asmlinkage int _save_fp_context32(struct sigcontext32 *sc);
+extern asmlinkage int _restore_fp_context32(struct sigcontext32 *sc);
+
+extern asmlinkage int fpu_emulator_save_context32(struct sigcontext32 *sc);
+extern asmlinkage int fpu_emulator_restore_context32(struct sigcontext32 *sc);
+
+static inline void signal32_init(void)
+{
+ if (cpu_has_fpu) {
+ save_fp_context32 = _save_fp_context32;
+ restore_fp_context32 = _restore_fp_context32;
+ } else {
+ save_fp_context32 = fpu_emulator_save_context32;
+ restore_fp_context32 = fpu_emulator_restore_context32;
+ }
+}
+#endif
+
void __init per_cpu_trap_init(void)
{
unsigned int cpu = smp_processor_id();
/* Some firmware leaves the BEV flag set, clear it. */
clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
+#ifdef CONFIG_MIPS64
+ set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
+#endif
/*
* Some MIPS CPUs have a dedicated interrupt vector which reduces the
@@ -820,11 +866,18 @@
set_c0_cause(CAUSEF_IV);
cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
+#ifdef CONFIG_MIPS32
write_c0_context(cpu << 23);
+#endif
+#ifdef CONFIG_MIPS64
+ write_c0_context(((long)(&pgd_current[cpu])) << 23);
+#endif
+ write_c0_wired(0);
}
void __init trap_init(void)
{
+ extern char except_vec0_generic;
extern char except_vec1_generic;
extern char except_vec3_generic, except_vec3_r4000;
extern char except_vec_ejtag_debug;
@@ -833,8 +886,14 @@
per_cpu_trap_init();
- /* Copy the generic exception handler code to its final destination. */
- memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
+ /*
+ * Copy the generic exception handlers to their final destination.
+ * This will be overriden later as suitable for a particular
+ * configuration.
+ */
+ memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
+ memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
+ memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
/*
* Setup default vectors
@@ -877,9 +936,16 @@
if (board_be_init)
board_be_init();
+#ifdef CONFIG_MIPS32
set_except_vector(1, handle_mod);
set_except_vector(2, handle_tlbl);
set_except_vector(3, handle_tlbs);
+#endif
+#ifdef CONFIG_MIPS64
+ set_except_vector(1, __xtlb_mod);
+ set_except_vector(2, __xtlb_tlbl);
+ set_except_vector(3, __xtlb_tlbs);
+#endif
set_except_vector(4, handle_adel);
set_except_vector(5, handle_ades);
@@ -921,13 +987,10 @@
//set_except_vector(15, handle_ndc);
}
- if (cpu_has_fpu) {
- save_fp_context = _save_fp_context;
- restore_fp_context = _restore_fp_context;
- } else {
- save_fp_context = fpu_emulator_save_context;
- restore_fp_context = fpu_emulator_restore_context;
- }
+ signal_init();
+#ifdef CONFIG_MIPS32_COMPAT
+ signal32_init();
+#endif
flush_icache_range(KSEG0, KSEG0 + 0x400);
@@ -936,7 +999,4 @@
atomic_inc(&init_mm.mm_count); /* XXX UP? */
current->active_mm = &init_mm;
-
- /* XXX Must be done for all CPUs */
- TLBMISS_HANDLER_SETUP();
}
diff -Nru a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
--- a/arch/mips/lasat/interrupt.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/lasat/interrupt.c Sun Aug 3 13:14:49 2003
@@ -149,7 +149,7 @@
}
irq_enter();
- kstat_cpu(0).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
action->handler(irq, action->dev_id, regs);
irq_exit();
diff -Nru a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
--- a/arch/mips/lasat/lasat_board.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/lasat/lasat_board.c Sun Aug 3 13:14:52 2003
@@ -71,19 +71,19 @@
ls[LASAT_MTD_NORMAL] = 0x100000;
if (mips_machtype == MACH_LASAT_100) {
- lasat_board_info.li_flash_base = KSEG1ADDR(0x1e000000);
+ lasat_board_info.li_flash_base = 0x1e000000;
- lb[LASAT_MTD_BOOTLOADER] = KSEG1ADDR(0x1e400000);
+ lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
if (lasat_board_info.li_flash_size > 0x200000) {
ls[LASAT_MTD_CONFIG] = 0x100000;
ls[LASAT_MTD_FS] = 0x500000;
}
} else {
- lasat_board_info.li_flash_base = KSEG1ADDR(0x10000000);
+ lasat_board_info.li_flash_base = 0x10000000;
if (lasat_board_info.li_flash_size < 0x1000000) {
- lb[LASAT_MTD_BOOTLOADER] = KSEG1ADDR(0x10000000);
+ lb[LASAT_MTD_BOOTLOADER] = 0x10000000;
ls[LASAT_MTD_CONFIG] = 0x100000;
if (lasat_board_info.li_flash_size >= 0x400000) {
ls[LASAT_MTD_FS] = lasat_board_info.li_flash_size - 0x300000;
diff -Nru a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c
--- a/arch/mips/lasat/prom.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/lasat/prom.c Sun Aug 3 13:14:49 2003
@@ -76,7 +76,7 @@
{
u32 version = *(u32 *)(RESET_VECTOR + 0x90);
- if (version == 306) {
+ if (version >= 307) {
prom_display = (void *)PROM_DISPLAY_ADDR;
prom_putc = (void *)PROM_PUTC_ADDR;
prom_printf = real_prom_printf;
diff -Nru a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
--- a/arch/mips/lasat/setup.c Sun Aug 3 13:14:44 2003
+++ b/arch/mips/lasat/setup.c Sun Aug 3 13:14:44 2003
@@ -36,7 +36,9 @@
#include <asm/irq.h>
#include <asm/lasat/lasat.h>
+#include <linux/tty.h>
#include <linux/serial.h>
+#include <linux/serial_core.h>
#include <asm/serial.h>
#include <asm/lasat/serial.h>
@@ -150,28 +152,28 @@
ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs);
}
-//#define DYNAMIC_SERIAL_INIT
+#define DYNAMIC_SERIAL_INIT
#ifdef DYNAMIC_SERIAL_INIT
void __init serial_init(void)
{
-#ifdef CONFIG_SERIAL
- struct serial_struct s;
+#ifdef CONFIG_SERIAL_8250
+ struct uart_port s;
memset(&s, 0, sizeof(s));
- s.flags = STD_COM_FLAGS;
- s.io_type = SERIAL_IO_MEM;
+ s.flags = STD_COM_FLAGS|UPF_RESOURCES;
+ s.iotype = SERIAL_IO_MEM;
if (mips_machtype == MACH_LASAT_100) {
- s.baud_base = LASAT_BASE_BAUD_100;
+ s.uartclk = LASAT_BASE_BAUD_100 * 16;
s.irq = LASATINT_UART_100;
- s.iomem_reg_shift = LASAT_UART_REGS_SHIFT_100;
- s.iomem_base = (u8 *)KSEG1ADDR(LASAT_UART_REGS_BASE_100);
+ s.regshift = LASAT_UART_REGS_SHIFT_100;
+ s.membase = (char *)KSEG1ADDR(LASAT_UART_REGS_BASE_100);
} else {
- s.baud_base = LASAT_BASE_BAUD_200;
+ s.uartclk = LASAT_BASE_BAUD_200 * 16;
s.irq = LASATINT_UART_200;
- s.iomem_reg_shift = LASAT_UART_REGS_SHIFT_200;
- s.iomem_base = (u8 *)KSEG1ADDR(LASAT_UART_REGS_BASE_200);
+ s.regshift = LASAT_UART_REGS_SHIFT_200;
+ s.membase = (char *)KSEG1ADDR(LASAT_UART_REGS_BASE_200);
}
if (early_serial_setup(&s) != 0)
diff -Nru a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
--- a/arch/mips/lib/Makefile Sun Aug 3 13:14:45 2003
+++ b/arch/mips/lib/Makefile Sun Aug 3 13:14:45 2003
@@ -2,17 +2,9 @@
# Makefile for MIPS-specific library files..
#
-lib-y += csum_partial.o csum_partial_copy.o memcpy.o \
- memset.o promlib.o rtc-std.o rtc-no.o strlen_user.o \
- strncpy_user.o strnlen_user.o watch.o
+lib-y += csum_partial_copy.o memcpy.o promlib.o rtc-no.o rtc-std.o
-ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y)
- lib-y += r3k_dump_tlb.o
-else
- lib-y += dump_tlb.o
-endif
-
-lib-$(CONFIG_BLK_DEV_FD) += floppy-no.o floppy-std.o
-lib-$(subst m,y,$(CONFIG_IDE)) += ide-std.o ide-no.o # needed for ide module
+lib-$(subst m,y,$(CONFIG_BLK_DEV_FD)) += floppy-no.o floppy-std.o
+lib-$(subst m,y,$(CONFIG_IDE)) += ide-no.o ide-std.o
EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
--- a/arch/mips/lib/csum_partial.S Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,240 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998 Ralf Baechle
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-
-#define ADDC(sum,reg) \
- addu sum, reg; \
- sltu v1, sum, reg; \
- addu sum, v1
-
-#define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3) \
- lw t0, (offset + 0x00)(src); \
- lw t1, (offset + 0x04)(src); \
- lw t2, (offset + 0x08)(src); \
- lw t3, (offset + 0x0c)(src); \
- ADDC(sum, t0); \
- ADDC(sum, t1); \
- ADDC(sum, t2); \
- ADDC(sum, t3); \
- lw t0, (offset + 0x10)(src); \
- lw t1, (offset + 0x14)(src); \
- lw t2, (offset + 0x18)(src); \
- lw t3, (offset + 0x1c)(src); \
- ADDC(sum, t0); \
- ADDC(sum, t1); \
- ADDC(sum, t2); \
- ADDC(sum, t3); \
-
-/*
- * a0: source address
- * a1: length of the area to checksum
- * a2: partial checksum
- */
-
-#define src a0
-#define dest a1
-#define sum v0
-
- .text
- .set noreorder
-
-/* unknown src alignment and < 8 bytes to go */
-small_csumcpy:
- move a1, t2
-
- andi t0, a1, 4
- beqz t0, 1f
- andi t0, a1, 2
-
- /* Still a full word to go */
- ulw t1, (src)
- addiu src, 4
- ADDC(sum, t1)
-
-1: move t1, zero
- beqz t0, 1f
- andi t0, a1, 1
-
- /* Still a halfword to go */
- ulhu t1, (src)
- addiu src, 2
-
-1: beqz t0, 1f
- sll t1, t1, 16
-
- lbu t2, (src)
- nop
-
-#ifdef __MIPSEB__
- sll t2, t2, 8
-#endif
- or t1, t2
-
-1: ADDC(sum, t1)
-
- /* fold checksum */
- sll v1, sum, 16
- addu sum, v1
- sltu v1, sum, v1
- srl sum, sum, 16
- addu sum, v1
-
- /* odd buffer alignment? */
- beqz t7, 1f
- nop
- sll v1, sum, 8
- srl sum, sum, 8
- or sum, v1
- andi sum, 0xffff
-1:
- .set reorder
- /* Add the passed partial csum. */
- ADDC(sum, a2)
- jr ra
- .set noreorder
-
-/* ------------------------------------------------------------------------- */
-
- .align 5
-LEAF(csum_partial)
- move sum, zero
- move t7, zero
-
- sltiu t8, a1, 0x8
- bnez t8, small_csumcpy /* < 8 bytes to copy */
- move t2, a1
-
- beqz a1, out
- andi t7, src, 0x1 /* odd buffer? */
-
-hword_align:
- beqz t7, word_align
- andi t8, src, 0x2
-
- lbu t0, (src)
- subu a1, a1, 0x1
-#ifdef __MIPSEL__
- sll t0, t0, 8
-#endif
- ADDC(sum, t0)
- addu src, src, 0x1
- andi t8, src, 0x2
-
-word_align:
- beqz t8, dword_align
- sltiu t8, a1, 56
-
- lhu t0, (src)
- subu a1, a1, 0x2
- ADDC(sum, t0)
- sltiu t8, a1, 56
- addu src, src, 0x2
-
-dword_align:
- bnez t8, do_end_words
- move t8, a1
-
- andi t8, src, 0x4
- beqz t8, qword_align
- andi t8, src, 0x8
-
- lw t0, 0x00(src)
- subu a1, a1, 0x4
- ADDC(sum, t0)
- addu src, src, 0x4
- andi t8, src, 0x8
-
-qword_align:
- beqz t8, oword_align
- andi t8, src, 0x10
-
- lw t0, 0x00(src)
- lw t1, 0x04(src)
- subu a1, a1, 0x8
- ADDC(sum, t0)
- ADDC(sum, t1)
- addu src, src, 0x8
- andi t8, src, 0x10
-
-oword_align:
- beqz t8, begin_movement
- srl t8, a1, 0x7
-
- lw t3, 0x08(src)
- lw t4, 0x0c(src)
- lw t0, 0x00(src)
- lw t1, 0x04(src)
- ADDC(sum, t3)
- ADDC(sum, t4)
- ADDC(sum, t0)
- ADDC(sum, t1)
- subu a1, a1, 0x10
- addu src, src, 0x10
- srl t8, a1, 0x7
-
-begin_movement:
- beqz t8, 1f
- andi t2, a1, 0x40
-
-move_128bytes:
- CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
- CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
- CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
- CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
- subu t8, t8, 0x01
- bnez t8, move_128bytes
- addu src, src, 0x80
-
-1:
- beqz t2, 1f
- andi t2, a1, 0x20
-
-move_64bytes:
- CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
- CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
- addu src, src, 0x40
-
-1:
- beqz t2, do_end_words
- andi t8, a1, 0x1c
-
-move_32bytes:
- CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
- andi t8, a1, 0x1c
- addu src, src, 0x20
-
-do_end_words:
- beqz t8, maybe_end_cruft
- srl t8, t8, 0x2
-
-end_words:
- lw t0, (src)
- subu t8, t8, 0x1
- ADDC(sum, t0)
- bnez t8, end_words
- addu src, src, 0x4
-
-maybe_end_cruft:
- andi t2, a1, 0x3
-
-small_memcpy:
- j small_csumcpy; move a1, t2
- beqz t2, out
- move a1, t2
-
-end_bytes:
- lb t0, (src)
- subu a1, a1, 0x1
- bnez a2, end_bytes
- addu src, src, 0x1
-
-out:
- jr ra
- move v0, sum
- END(csum_partial)
diff -Nru a/arch/mips/lib/csum_partial_copy.c b/arch/mips/lib/csum_partial_copy.c
--- a/arch/mips/lib/csum_partial_copy.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/lib/csum_partial_copy.c Sun Aug 3 13:14:53 2003
@@ -1,18 +1,10 @@
/*
- * INET An implementation of the TCP/IP protocol suite for the LINUX
- * operating system. INET is implemented using the BSD Socket
- * interface as the means of communication with the user level.
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*
- * MIPS specific IP/TCP/UDP checksumming routines
- *
- * Authors: Ralf Baechle, <ralf@waldorf-gmbh.de>
- * Lots of code moved from tcp.c and ip.c; see those files
- * for more names.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
+ * Copyright (C) 1994, 1995 Waldorf Electronics GmbH
+ * Copyright (C) 1998, 1999 Ralf Baechle
*/
#include <net/checksum.h>
#include <linux/types.h>
diff -Nru a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
--- a/arch/mips/lib/dump_tlb.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,231 +0,0 @@
-/*
- * Dump R4x00 TLB for debugging purposes.
- *
- * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
- * Copyright (C) 1999 by Silicon Graphics, Inc.
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/cachectl.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-
-static inline const char *msg2str(unsigned int mask)
-{
- switch (mask) {
- case PM_4K: return "4kb";
- case PM_16K: return "16kb";
- case PM_64K: return "64kb";
- case PM_256K: return "256kb";
-#ifndef CONFIG_CPU_VR41XX
- case PM_1M: return "1Mb";
- case PM_4M: return "4Mb";
- case PM_16M: return "16Mb";
- case PM_64M: return "64Mb";
- case PM_256M: return "256Mb";
-#endif
- }
-}
-
-void dump_tlb(int first, int last)
-{
- int i;
- unsigned int pagemask, c0, c1, asid;
- unsigned long long entrylo0, entrylo1;
- unsigned long entryhi;
-
- asid = read_c0_entryhi() & 0xff;
-
- printk("\n");
- for(i=first;i<=last;i++) {
- write_c0_index(i);
- __asm__ __volatile__(
- ".set\tmips3\n\t"
- ".set\tnoreorder\n\t"
- "nop;nop;nop;nop\n\t"
- "tlbr\n\t"
- "nop;nop;nop;nop\n\t"
- ".set\treorder\n\t"
- ".set\tmips0\n\t");
- pagemask = read_c0_pagemask();
- entryhi = read_c0_entryhi();
- entrylo0 = read_c0_entrylo0();
- entrylo1 = read_c0_entrylo1();
-
- /* Unused entries have a virtual address in KSEG0. */
- if ((entryhi & 0xf0000000) != 0x80000000
- && (entryhi & 0xff) == asid) {
- /*
- * Only print entries in use
- */
- printk("Index: %2d pgmask=%s ", i, msg2str(pagemask));
-
- c0 = (entrylo0 >> 3) & 7;
- c1 = (entrylo1 >> 3) & 7;
-
- printk("va=%08lx asid=%02lx\n",
- (entryhi & 0xffffe000), (entryhi & 0xff));
- printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
- (entrylo0 << 6) & PAGE_MASK, c0,
- (entrylo0 & 4) ? 1 : 0,
- (entrylo0 & 2) ? 1 : 0,
- (entrylo0 & 1));
- printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
- (entrylo1 << 6) & PAGE_MASK, c1,
- (entrylo1 & 4) ? 1 : 0,
- (entrylo1 & 2) ? 1 : 0,
- (entrylo1 & 1));
- printk("\n");
- }
- }
-
- write_c0_entryhi(asid);
-}
-
-void dump_tlb_all(void)
-{
- dump_tlb(0, current_cpu_data.tlbsize - 1);
-}
-
-void dump_tlb_wired(void)
-{
- int wired;
-
- wired = read_c0_wired();
- printk("Wired: %d", wired);
- dump_tlb(0, read_c0_wired());
-}
-
-#define BARRIER \
- __asm__ __volatile__( \
- ".set\tnoreorder\n\t" \
- "nop;nop;nop;nop;nop;nop;nop\n\t" \
- ".set\treorder");
-
-void
-dump_tlb_addr(unsigned long addr)
-{
- unsigned int flags, oldpid;
- int index;
-
- local_irq_save(flags);
- oldpid = read_c0_entryhi() & 0xff;
- BARRIER;
- write_c0_entryhi((addr & PAGE_MASK) | oldpid);
- BARRIER;
- tlb_probe();
- BARRIER;
- index = read_c0_index();
- write_c0_entryhi(oldpid);
- local_irq_restore(flags);
-
- if (index < 0) {
- printk("No entry for address 0x%08lx in TLB\n", addr);
- return;
- }
-
- printk("Entry %d maps address 0x%08lx\n", index, addr);
- dump_tlb(index, index);
-}
-
-void
-dump_tlb_nonwired(void)
-{
- dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
-}
-
-void
-dump_list_process(struct task_struct *t, void *address)
-{
- pgd_t *page_dir, *pgd;
- pmd_t *pmd;
- pte_t *pte, page;
- unsigned int addr;
- unsigned long val;
-
- addr = (unsigned int) address;
-
- printk("Addr == %08x\n", addr);
- printk("task == %8p\n", t);
- printk("task->mm == %8p\n", t->mm);
- //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
-
- if (addr > KSEG0)
- page_dir = pgd_offset_k(0);
- else
- page_dir = pgd_offset(t->mm, 0);
- printk("page_dir == %08x\n", (unsigned int) page_dir);
-
- if (addr > KSEG0)
- pgd = pgd_offset_k(addr);
- else
- pgd = pgd_offset(t->mm, addr);
- printk("pgd == %08x, ", (unsigned int) pgd);
-
- pmd = pmd_offset(pgd, addr);
- printk("pmd == %08x, ", (unsigned int) pmd);
-
- pte = pte_offset(pmd, addr);
- printk("pte == %08x, ", (unsigned int) pte);
-
- page = *pte;
-#ifdef CONFIG_64BIT_PHYS_ADDR
- printk("page == %08Lx\n", pte_val(page));
-#else
- printk("page == %08lx\n", pte_val(page));
-#endif
-
- val = pte_val(page);
- if (val & _PAGE_PRESENT) printk("present ");
- if (val & _PAGE_READ) printk("read ");
- if (val & _PAGE_WRITE) printk("write ");
- if (val & _PAGE_ACCESSED) printk("accessed ");
- if (val & _PAGE_MODIFIED) printk("modified ");
- if (val & _PAGE_R4KBUG) printk("r4kbug ");
- if (val & _PAGE_GLOBAL) printk("global ");
- if (val & _PAGE_VALID) printk("valid ");
- printk("\n");
-}
-
-void
-dump_list_current(void *address)
-{
- dump_list_process(current, address);
-}
-
-unsigned int
-vtop(void *address)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- unsigned int addr, paddr;
-
- addr = (unsigned long) address;
- pgd = pgd_offset(current->mm, addr);
- pmd = pmd_offset(pgd, addr);
- pte = pte_offset(pmd, addr);
- paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
- paddr |= (addr & ~PAGE_MASK);
-
- return paddr;
-}
-
-void
-dump16(unsigned long *p)
-{
- int i;
-
- for(i=0;i<8;i++)
- {
- printk("*%8p = %08lx, ", p, *p); p++;
- printk("*%8p = %08lx\n", p, *p); p++;
- }
-}
diff -Nru a/arch/mips/lib/floppy-std.c b/arch/mips/lib/floppy-std.c
--- a/arch/mips/lib/floppy-std.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/lib/floppy-std.c Sun Aug 3 13:14:50 2003
@@ -5,7 +5,7 @@
*
* Access the floppy hardware on PC style hardware
*
- * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1998, 2003 by Ralf Baechle
*/
#include <linux/delay.h>
#include <linux/init.h>
@@ -15,13 +15,13 @@
#include <linux/linkage.h>
#include <linux/types.h>
#include <linux/mm.h>
+
#include <asm/bootinfo.h>
#include <asm/cachectl.h>
#include <asm/dma.h>
#include <asm/floppy.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/mc146818rtc.h>
#include <asm/pgtable.h>
/*
@@ -104,7 +104,7 @@
{
unsigned long mem;
- mem = __get_dma_pages(GFP_KERNEL,get_order(size));
+ mem = __get_dma_pages(GFP_KERNEL, get_order(size));
return mem;
}
diff -Nru a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
--- a/arch/mips/lib/memcpy.S Sun Aug 3 13:14:49 2003
+++ b/arch/mips/lib/memcpy.S Sun Aug 3 13:14:49 2003
@@ -266,7 +266,7 @@
beq rem, len, copy_bytes
nop
1:
-EXC( LOAD t0, 0(src), l_exc)
+EXC( LOAD t0, 0(src), l_exc)
ADD src, src, NBYTES
SUB len, len, NBYTES
EXC( STORE t0, 0(dst), s_exc_p1u)
@@ -340,10 +340,10 @@
EXC( LDFIRST t3, FIRST(3)(src), l_exc_copy)
EXC( LDREST t2, REST(2)(src), l_exc_copy)
EXC( LDREST t3, REST(3)(src), l_exc_copy)
- PREF( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed)
+ PREF( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed)
ADD src, src, 4*NBYTES
#ifdef CONFIG_CPU_SB1
- nop # improves slotting
+ nop # improves slotting
#endif
EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
@@ -407,6 +407,7 @@
* Assumes src < THREAD_BUADDR($28)
*/
LOAD t0, TI_TASK($28)
+ nop
LOAD t0, THREAD_BUADDR(t0)
1:
EXC( lb t1, 0(src), l_exc)
@@ -415,8 +416,9 @@
bne src, t0, 1b
ADD dst, dst, 1
l_exc:
- LOAD t0, THREAD_BUADDR($28) # t0 is just past last good address
- LOAD t0, THREAD_BUADDR(t0)
+ LOAD t0, TI_TASK($28)
+ nop
+ LOAD t0, THREAD_BUADDR(t0) # t0 is just past last good address
nop
SUB len, AT, t0 # len number of uncopied bytes
/*
diff -Nru a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
--- a/arch/mips/lib/memset.S Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,143 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998 by Ralf Baechle
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-#define F_FILL64(dst, offset, val, fixup) \
- EX(sw, val, (offset + 0x00)(dst), fixup); \
- EX(sw, val, (offset + 0x04)(dst), fixup); \
- EX(sw, val, (offset + 0x08)(dst), fixup); \
- EX(sw, val, (offset + 0x0c)(dst), fixup); \
- EX(sw, val, (offset + 0x10)(dst), fixup); \
- EX(sw, val, (offset + 0x14)(dst), fixup); \
- EX(sw, val, (offset + 0x18)(dst), fixup); \
- EX(sw, val, (offset + 0x1c)(dst), fixup); \
- EX(sw, val, (offset + 0x20)(dst), fixup); \
- EX(sw, val, (offset + 0x24)(dst), fixup); \
- EX(sw, val, (offset + 0x28)(dst), fixup); \
- EX(sw, val, (offset + 0x2c)(dst), fixup); \
- EX(sw, val, (offset + 0x30)(dst), fixup); \
- EX(sw, val, (offset + 0x34)(dst), fixup); \
- EX(sw, val, (offset + 0x38)(dst), fixup); \
- EX(sw, val, (offset + 0x3c)(dst), fixup)
-
-/*
- * memset(void *s, int c, size_t n)
- *
- * a0: start of area to clear
- * a1: char to fill with
- * a2: size of area to clear
- */
- .set noreorder
- .align 5
-LEAF(memset)
- beqz a1, 1f
- move v0, a0 /* result */
-
- andi a1, 0xff /* spread fillword */
- sll t1, a1, 8
- or a1, t1
- sll t1, a1, 16
- or a1, t1
-1:
-
-EXPORT(__bzero)
- sltiu t0, a2, 4 /* very small region? */
- bnez t0, small_memset
- andi t0, a0, 3 /* aligned? */
-
- beqz t0, 1f
- subu t0, 4 /* alignment in bytes */
-
-#ifdef __MIPSEB__
- EX(swl, a1, (a0), first_fixup) /* make word aligned */
-#endif
-#ifdef __MIPSEL__
- EX(swr, a1, (a0), first_fixup) /* make word aligned */
-#endif
- subu a0, t0 /* word align ptr */
- addu a2, t0 /* correct size */
-
-1: ori t1, a2, 0x3f /* # of full blocks */
- xori t1, 0x3f
- beqz t1, memset_partial /* no block to fill */
- andi t0, a2, 0x3c
-
- addu t1, a0 /* end address */
- .set reorder
-1: addiu a0, 64
- F_FILL64(a0, -64, a1, fwd_fixup)
- bne t1, a0, 1b
- .set noreorder
-
-memset_partial:
- PTR_LA t1, 2f /* where to start */
- subu t1, t0
- jr t1
- addu a0, t0 /* dest ptr */
-
- .set push
- .set noreorder
- .set nomacro
- F_FILL64(a0, -64, a1, partial_fixup) /* ... but first do wrds ... */
-2: .set pop
- andi a2, 3 /* 0 <= n <= 3 to go */
-
- beqz a2, 1f
- addu a0, a2 /* What's left */
-#ifdef __MIPSEB__
- EX(swr, a1, -1(a0), last_fixup)
-#endif
-#ifdef __MIPSEL__
- EX(swl, a1, -1(a0), last_fixup)
-#endif
-1: jr ra
- move a2, zero
-
-small_memset:
- beqz a2, 2f
- addu t1, a0, a2
-
-1: addiu a0, 1 /* fill bytewise */
- bne t1, a0, 1b
- sb a1, -1(a0)
-
-2: jr ra /* done */
- move a2, zero
- END(memset)
-
-first_fixup:
- jr ra
- nop
-
-fwd_fixup:
- lw t0, TI_TASK($28)
- lw t0, THREAD_BUADDR(t0)
- andi a2, 0x3f
- addu a2, t1
- jr ra
- subu a2, t0
-
-partial_fixup:
- lw t0, TI_TASK($28)
- lw t0, THREAD_BUADDR(t0)
- andi a2, 3
- addu a2, t1
- jr ra
- subu a2, t0
-
-last_fixup:
- jr ra
- andi v1, a2, 3
diff -Nru a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c
--- a/arch/mips/lib/r3k_dump_tlb.c Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,187 +0,0 @@
-/*
- * Dump R3000 TLB for debugging purposes.
- *
- * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
- * Copyright (C) 1999 by Silicon Graphics, Inc.
- * Copyright (C) 1999 by Harald Koerfgen
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-
-extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */
-
-void
-dump_tlb(int first, int last)
-{
- int i;
- unsigned int asid;
- unsigned long entryhi, entrylo0;
-
- asid = read_c0_entryhi() & 0xfc0;
-
- for(i=first;i<=last;i++)
- {
- write_c0_index(i<<8);
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- "tlbr\n\t"
- "nop\n\t"
- ".set\treorder");
- entryhi = read_c0_entryhi();
- entrylo0 = read_c0_entrylo0();
-
- /* Unused entries have a virtual address of KSEG0. */
- if ((entryhi & 0xffffe000) != 0x80000000
- && (entryhi & 0xfc0) == asid) {
- /*
- * Only print entries in use
- */
- printk("Index: %2d ", i);
-
- printk("va=%08lx asid=%08lx"
- " [pa=%06lx n=%d d=%d v=%d g=%d]",
- (entryhi & 0xffffe000),
- entryhi & 0xfc0,
- entrylo0 & PAGE_MASK,
- (entrylo0 & (1 << 11)) ? 1 : 0,
- (entrylo0 & (1 << 10)) ? 1 : 0,
- (entrylo0 & (1 << 9)) ? 1 : 0,
- (entrylo0 & (1 << 8)) ? 1 : 0);
- }
- }
- printk("\n");
-
- write_c0_entryhi(asid);
-}
-
-void
-dump_tlb_all(void)
-{
- dump_tlb(0, current_cpu_data.tlbsize - 1);
-}
-
-void
-dump_tlb_wired(void)
-{
- int wired = r3k_have_wired_reg ? read_c0_wired() : 8;
-
- printk("Wired: %d", wired);
- dump_tlb(0, wired - 1);
-}
-
-void
-dump_tlb_addr(unsigned long addr)
-{
- unsigned int flags, oldpid;
- int index;
-
- local_irq_save(flags);
- oldpid = read_c0_entryhi() & 0xff;
- write_c0_entryhi((addr & PAGE_MASK) | oldpid);
- tlb_probe();
- index = read_c0_index();
- write_c0_entryhi(oldpid);
- local_irq_restore(flags);
-
- if (index < 0) {
- printk("No entry for address 0x%08lx in TLB\n", addr);
- return;
- }
-
- printk("Entry %d maps address 0x%08lx\n", index, addr);
- dump_tlb(index, index);
-}
-
-void
-dump_tlb_nonwired(void)
-{
- int wired = r3k_have_wired_reg ? read_c0_wired() : 8;
- dump_tlb(wired, current_cpu_data.tlbsize - 1);
-}
-
-void
-dump_list_process(struct task_struct *t, void *address)
-{
- pgd_t *page_dir, *pgd;
- pmd_t *pmd;
- pte_t *pte, page;
- unsigned int addr;
- unsigned long val;
-
- addr = (unsigned int) address;
-
- printk("Addr == %08x\n", addr);
- printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
-
- page_dir = pgd_offset(t->mm, 0);
- printk("page_dir == %08x\n", (unsigned int) page_dir);
-
- pgd = pgd_offset(t->mm, addr);
- printk("pgd == %08x, ", (unsigned int) pgd);
-
- pmd = pmd_offset(pgd, addr);
- printk("pmd == %08x, ", (unsigned int) pmd);
-
- pte = pte_offset(pmd, addr);
- printk("pte == %08x, ", (unsigned int) pte);
-
- page = *pte;
- printk("page == %08x\n", (unsigned int) pte_val(page));
-
- val = pte_val(page);
- if (val & _PAGE_PRESENT) printk("present ");
- if (val & _PAGE_READ) printk("read ");
- if (val & _PAGE_WRITE) printk("write ");
- if (val & _PAGE_ACCESSED) printk("accessed ");
- if (val & _PAGE_MODIFIED) printk("modified ");
- if (val & _PAGE_GLOBAL) printk("global ");
- if (val & _PAGE_VALID) printk("valid ");
- printk("\n");
-}
-
-void
-dump_list_current(void *address)
-{
- dump_list_process(current, address);
-}
-
-unsigned int
-vtop(void *address)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- unsigned int addr, paddr;
-
- addr = (unsigned long) address;
- pgd = pgd_offset(current->mm, addr);
- pmd = pmd_offset(pgd, addr);
- pte = pte_offset(pmd, addr);
- paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
- paddr |= (addr & ~PAGE_MASK);
-
- return paddr;
-}
-
-void
-dump16(unsigned long *p)
-{
- int i;
-
- for(i=0;i<8;i++)
- {
- printk("*%08lx == %08lx, ",
- (unsigned long)p, (unsigned long)*p++);
- printk("*%08lx == %08lx\n",
- (unsigned long)p, (unsigned long)*p++);
- }
-}
diff -Nru a/arch/mips/lib/rtc-no.c b/arch/mips/lib/rtc-no.c
--- a/arch/mips/lib/rtc-no.c Sun Aug 3 13:14:45 2003
+++ b/arch/mips/lib/rtc-no.c Sun Aug 3 13:14:45 2003
@@ -6,7 +6,7 @@
* Stub RTC routines to keep Linux from crashing on machine which don't
* have a RTC chip.
*
- * Copyright (C) 1998, 2001 by Ralf Baechle
+ * Copyright (C) 1998, 2001, 2003 by Ralf Baechle
*/
#include <linux/kernel.h>
#include <linux/mc146818rtc.h>
@@ -15,7 +15,7 @@
{
static int called;
- if (!called) {
+ if (called) {
called = 1;
printk(KERN_DEBUG "RTC functions called - shouldn't happen\n");
}
@@ -24,7 +24,7 @@
}
struct rtc_ops no_rtc_ops = {
- .rtc_read_data = (void *) &shouldnt_happen,
- .rtc_write_data = (void *) &shouldnt_happen,
- .rtc_bcd_mode = (void *) &shouldnt_happen
+ .rtc_read_data = (void *) &shouldnt_happen,
+ .rtc_write_data = (void *) &shouldnt_happen,
+ .rtc_bcd_mode = (void *) &shouldnt_happen
};
diff -Nru a/arch/mips/lib/strlen_user.S b/arch/mips/lib/strlen_user.S
--- a/arch/mips/lib/strlen_user.S Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,40 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error
- */
-LEAF(__strlen_user_asm)
- lw v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bltz v0, fault
-
-FEXPORT(__strlen_user_nocheck_asm)
- move v0, a0
-1: EX(lb, t0, (v0), fault)
- addiu v0, 1
- bnez t0, 1b
- subu v0, a0
- jr ra
- END(__strlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -Nru a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S
--- a/arch/mips/lib/strncpy_user.S Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,58 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1999 by Ralf Baechle
- */
-#include <linux/errno.h>
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Returns: -EFAULT if exception before terminator, N if the entire
- * buffer filled, else strlen.
- */
-
-/*
- * Ugly special case have to check: we might get passed a user space
- * pointer which wraps into the kernel space. We don't deal with that. If
- * it happens at most some bytes of the exceptions handlers will be copied.
- */
-
-LEAF(__strncpy_from_user_asm)
- lw v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a1
- bltz v0, fault
-
-EXPORT(__strncpy_from_user_nocheck_asm)
- move v0, zero
- move v1, a1
- .set noreorder
-1: EX(lbu, t0, (v1), fault)
- addiu v1, v1, 1
- beqz t0, 2f
- sb t0, (a0)
- addiu v0, 1
- bne v0, a2, 1b
- addiu a0, 1
- .set reorder
-2: addu t0, a1, v0
- xor t0, a1
- bltz t0, fault
- jr ra # return n
- END(__strncpy_from_user_asm)
-
-fault: li v0, -EFAULT
- jr ra
-
- .section __ex_table,"a"
- PTR 1b, fault
- .previous
diff -Nru a/arch/mips/lib/strnlen_user.S b/arch/mips/lib/strnlen_user.S
--- a/arch/mips/lib/strnlen_user.S Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,49 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error, len of string but at max a1 otherwise
- *
- * Note: for performance reasons we deliberately accept that a user may
- * make strlen_user and strnlen_user access the first few KSEG0
- * bytes. There's nothing secret there ...
- */
-LEAF(__strnlen_user_asm)
- lw v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bltz v0, fault
-
-FEXPORT(__strnlen_user_nocheck_asm)
- .type __strnlen_user_nocheck_asm,@function
- move v0, a0
- addu a1, a0 # stop pointer
- .set noreorder
-1: beq v0, a1, 1f # limit reached?
- addiu v0, 1
- .set reorder
- EX(lb, t0, -1(v0), fault)
- bnez t0, 1b
-1: subu v0, a0
- jr ra
- END(__strnlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -Nru a/arch/mips/lib/tinycon.c b/arch/mips/lib/tinycon.c
--- a/arch/mips/lib/tinycon.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,133 +0,0 @@
-/*
- * arch/mips/lib/console.c
- *
- * Copyright (C) 1994 by Waldorf Electronic,
- * written by Ralf Baechle and Andreas Busse
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- *
- * FIXME: This file is hacked to be hardwired for the Deskstation
- * Only thought as a debugging console output. It's as inefficient
- * as a piece of code can be but probably a good piece of code to
- * implement a preliminary console for a new target.
- */
-
-#include <linux/tty.h>
-#include <asm/bootinfo.h>
-
-static unsigned int size_x;
-static unsigned int size_y;
-static unsigned short cursor_x;
-static unsigned short cursor_y;
-static volatile unsigned short *vram_addr;
-static int console_needs_init = 1;
-
-extern struct screen_info screen_info;
-
-/* ----------------------------------------------------------------------
- * init_console()
- * ---------------------------------------------------------------------- */
-
-void init_console(void)
-{
- size_x = 80;
- size_y = 25;
- cursor_x = 0;
- cursor_y = 0;
-
- vram_addr = (unsigned short *)0xb00b8000;
-
- console_needs_init = 0;
-}
-
-void
-set_size_x(unsigned int x)
-{
- size_x = x;
-}
-
-void
-set_size_y(unsigned int y)
-{
- size_y = y;
-}
-
-void
-set_vram(unsigned short *vram)
-{
- vram_addr = vram;
-}
-
-void
-set_crsr(unsigned int x, unsigned int y)
-{
- cursor_x = x;
- cursor_y = y;
-}
-
-void
-print_char(unsigned int x, unsigned int y, unsigned char c)
-{
- volatile unsigned short *caddr;
-
- caddr = vram_addr + (y * size_x) + x;
- *caddr = (*caddr & 0xff00) | 0x0f00 | (unsigned short) c;
-}
-
-static void
-scroll(void)
-{
- volatile unsigned short *caddr;
- register int i;
-
- caddr = vram_addr;
- for(i=0; i<size_x * (size_y-1); i++)
- *(caddr++) = *(caddr + size_x);
-
- /* blank last line */
-
- caddr = vram_addr + (size_x * (size_y-1));
- for(i=0; i<size_x; i++)
- *(caddr++) = (*caddr & 0xff00) | (unsigned short) ' ';
-}
-
-void print_string(const unsigned char *str)
-{
- unsigned char c;
-
- if (console_needs_init)
- init_console();
-
- while((c = *str++))
- switch(c)
- {
- case '\n':
- cursor_x = 0;
- cursor_y++;
- if(cursor_y == size_y)
- {
- scroll();
- cursor_y = size_y - 1;
- }
- break;
-
- default:
- print_char(cursor_x, cursor_y, c);
- cursor_x++;
- if(cursor_x == size_x)
- {
- cursor_x = 0;
- cursor_y++;
- if(cursor_y == size_y)
- {
- scroll();
- cursor_y = size_y - 1;
- }
- }
- break;
- }
-}
-
-/* end of file */
diff -Nru a/arch/mips/lib/watch.S b/arch/mips/lib/watch.S
--- a/arch/mips/lib/watch.S Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,60 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Kernel debug stuff to use the Watch registers.
- * Useful to find stack overflows, dangling pointers etc.
- *
- * Copyright (C) 1995, 1996, 1999 by Ralf Baechle
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-
- .set noreorder
-/*
- * Parameter: a0 - logic address to watch
- * Currently only KSEG0 addresses are allowed!
- * a1 - set bit #1 to trap on load references
- * bit #0 to trap on store references
- * Results : none
- */
- LEAF(__watch_set)
- li t0,0x80000000
- subu a0,t0
- ori a0,7
- xori a0,7
- or a0,a1
- mtc0 a0,CP0_WATCHLO
- sw a0,watch_savelo
-
- jr ra
- mtc0 zero,CP0_WATCHHI
- END(__watch_set)
-
-/*
- * Parameter: none
- * Results : none
- */
- LEAF(__watch_clear)
- jr ra
- mtc0 zero,CP0_WATCHLO
- END(__watch_clear)
-
-/*
- * Parameter: none
- * Results : none
- */
- LEAF(__watch_reenable)
- lw t0,watch_savelo
- jr ra
- mtc0 t0,CP0_WATCHLO
- END(__watch_reenable)
-
-/*
- * Saved value of the c0_watchlo register for watch_reenable()
- */
- .data
-watch_savelo: .word 0
- .text
diff -Nru a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,14 @@
+#
+# Makefile for MIPS-specific library files..
+#
+
+lib-y += csum_partial.o memset.o strlen_user.o strncpy_user.o strnlen_user.o \
+ watch.o
+
+ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y)
+ lib-y += r3k_dump_tlb.o
+else
+ lib-y += dump_tlb.o
+endif
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/lib-32/csum_partial.S b/arch/mips/lib-32/csum_partial.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/csum_partial.S Sun Aug 3 13:14:52 2003
@@ -0,0 +1,240 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998 Ralf Baechle
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+
+#define ADDC(sum,reg) \
+ addu sum, reg; \
+ sltu v1, sum, reg; \
+ addu sum, v1
+
+#define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3) \
+ lw t0, (offset + 0x00)(src); \
+ lw t1, (offset + 0x04)(src); \
+ lw t2, (offset + 0x08)(src); \
+ lw t3, (offset + 0x0c)(src); \
+ ADDC(sum, t0); \
+ ADDC(sum, t1); \
+ ADDC(sum, t2); \
+ ADDC(sum, t3); \
+ lw t0, (offset + 0x10)(src); \
+ lw t1, (offset + 0x14)(src); \
+ lw t2, (offset + 0x18)(src); \
+ lw t3, (offset + 0x1c)(src); \
+ ADDC(sum, t0); \
+ ADDC(sum, t1); \
+ ADDC(sum, t2); \
+ ADDC(sum, t3); \
+
+/*
+ * a0: source address
+ * a1: length of the area to checksum
+ * a2: partial checksum
+ */
+
+#define src a0
+#define dest a1
+#define sum v0
+
+ .text
+ .set noreorder
+
+/* unknown src alignment and < 8 bytes to go */
+small_csumcpy:
+ move a1, t2
+
+ andi t0, a1, 4
+ beqz t0, 1f
+ andi t0, a1, 2
+
+ /* Still a full word to go */
+ ulw t1, (src)
+ addiu src, 4
+ ADDC(sum, t1)
+
+1: move t1, zero
+ beqz t0, 1f
+ andi t0, a1, 1
+
+ /* Still a halfword to go */
+ ulhu t1, (src)
+ addiu src, 2
+
+1: beqz t0, 1f
+ sll t1, t1, 16
+
+ lbu t2, (src)
+ nop
+
+#ifdef __MIPSEB__
+ sll t2, t2, 8
+#endif
+ or t1, t2
+
+1: ADDC(sum, t1)
+
+ /* fold checksum */
+ sll v1, sum, 16
+ addu sum, v1
+ sltu v1, sum, v1
+ srl sum, sum, 16
+ addu sum, v1
+
+ /* odd buffer alignment? */
+ beqz t7, 1f
+ nop
+ sll v1, sum, 8
+ srl sum, sum, 8
+ or sum, v1
+ andi sum, 0xffff
+1:
+ .set reorder
+ /* Add the passed partial csum. */
+ ADDC(sum, a2)
+ jr ra
+ .set noreorder
+
+/* ------------------------------------------------------------------------- */
+
+ .align 5
+LEAF(csum_partial)
+ move sum, zero
+ move t7, zero
+
+ sltiu t8, a1, 0x8
+ bnez t8, small_csumcpy /* < 8 bytes to copy */
+ move t2, a1
+
+ beqz a1, out
+ andi t7, src, 0x1 /* odd buffer? */
+
+hword_align:
+ beqz t7, word_align
+ andi t8, src, 0x2
+
+ lbu t0, (src)
+ subu a1, a1, 0x1
+#ifdef __MIPSEL__
+ sll t0, t0, 8
+#endif
+ ADDC(sum, t0)
+ addu src, src, 0x1
+ andi t8, src, 0x2
+
+word_align:
+ beqz t8, dword_align
+ sltiu t8, a1, 56
+
+ lhu t0, (src)
+ subu a1, a1, 0x2
+ ADDC(sum, t0)
+ sltiu t8, a1, 56
+ addu src, src, 0x2
+
+dword_align:
+ bnez t8, do_end_words
+ move t8, a1
+
+ andi t8, src, 0x4
+ beqz t8, qword_align
+ andi t8, src, 0x8
+
+ lw t0, 0x00(src)
+ subu a1, a1, 0x4
+ ADDC(sum, t0)
+ addu src, src, 0x4
+ andi t8, src, 0x8
+
+qword_align:
+ beqz t8, oword_align
+ andi t8, src, 0x10
+
+ lw t0, 0x00(src)
+ lw t1, 0x04(src)
+ subu a1, a1, 0x8
+ ADDC(sum, t0)
+ ADDC(sum, t1)
+ addu src, src, 0x8
+ andi t8, src, 0x10
+
+oword_align:
+ beqz t8, begin_movement
+ srl t8, a1, 0x7
+
+ lw t3, 0x08(src)
+ lw t4, 0x0c(src)
+ lw t0, 0x00(src)
+ lw t1, 0x04(src)
+ ADDC(sum, t3)
+ ADDC(sum, t4)
+ ADDC(sum, t0)
+ ADDC(sum, t1)
+ subu a1, a1, 0x10
+ addu src, src, 0x10
+ srl t8, a1, 0x7
+
+begin_movement:
+ beqz t8, 1f
+ andi t2, a1, 0x40
+
+move_128bytes:
+ CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
+ CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
+ CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
+ CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
+ subu t8, t8, 0x01
+ bnez t8, move_128bytes
+ addu src, src, 0x80
+
+1:
+ beqz t2, 1f
+ andi t2, a1, 0x20
+
+move_64bytes:
+ CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
+ CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
+ addu src, src, 0x40
+
+1:
+ beqz t2, do_end_words
+ andi t8, a1, 0x1c
+
+move_32bytes:
+ CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
+ andi t8, a1, 0x1c
+ addu src, src, 0x20
+
+do_end_words:
+ beqz t8, maybe_end_cruft
+ srl t8, t8, 0x2
+
+end_words:
+ lw t0, (src)
+ subu t8, t8, 0x1
+ ADDC(sum, t0)
+ bnez t8, end_words
+ addu src, src, 0x4
+
+maybe_end_cruft:
+ andi t2, a1, 0x3
+
+small_memcpy:
+ j small_csumcpy; move a1, t2
+ beqz t2, out
+ move a1, t2
+
+end_bytes:
+ lb t0, (src)
+ subu a1, a1, 0x1
+ bnez a2, end_bytes
+ addu src, src, 0x1
+
+out:
+ jr ra
+ move v0, sum
+ END(csum_partial)
diff -Nru a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/dump_tlb.c Sun Aug 3 13:14:48 2003
@@ -0,0 +1,220 @@
+/*
+ * Dump R4x00 TLB for debugging purposes.
+ *
+ * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
+ * Copyright (C) 1999 by Silicon Graphics, Inc.
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+static inline const char *msk2str(unsigned int mask)
+{
+ switch (mask) {
+ case PM_4K: return "4kb";
+ case PM_16K: return "16kb";
+ case PM_64K: return "64kb";
+ case PM_256K: return "256kb";
+#ifndef CONFIG_CPU_VR41XX
+ case PM_1M: return "1Mb";
+ case PM_4M: return "4Mb";
+ case PM_16M: return "16Mb";
+ case PM_64M: return "64Mb";
+ case PM_256M: return "256Mb";
+#endif
+ }
+}
+
+#define BARRIER() \
+ __asm__ __volatile__( \
+ ".set\tnoreorder\n\t" \
+ "nop;nop;nop;nop;nop;nop;nop\n\t" \
+ ".set\treorder");
+
+void dump_tlb(int first, int last)
+{
+ unsigned int pagemask, c0, c1, asid;
+ unsigned long long entrylo0, entrylo1;
+ unsigned long entryhi;
+ int i;
+
+ asid = read_c0_entryhi() & 0xff;
+
+ printk("\n");
+ for (i = first; i <= last; i++) {
+ write_c0_index(i);
+ BARRIER();
+ tlb_read();
+ BARRIER();
+ pagemask = read_c0_pagemask();
+ entryhi = read_c0_entryhi();
+ entrylo0 = read_c0_entrylo0();
+ entrylo1 = read_c0_entrylo1();
+
+ /* Unused entries have a virtual address in KSEG0. */
+ if ((entryhi & 0xf0000000) != 0x80000000
+ && (entryhi & 0xff) == asid) {
+ /*
+ * Only print entries in use
+ */
+ printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
+
+ c0 = (entrylo0 >> 3) & 7;
+ c1 = (entrylo1 >> 3) & 7;
+
+ printk("va=%08lx asid=%02lx\n",
+ (entryhi & 0xffffe000), (entryhi & 0xff));
+ printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
+ (entrylo0 << 6) & PAGE_MASK, c0,
+ (entrylo0 & 4) ? 1 : 0,
+ (entrylo0 & 2) ? 1 : 0,
+ (entrylo0 & 1));
+ printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
+ (entrylo1 << 6) & PAGE_MASK, c1,
+ (entrylo1 & 4) ? 1 : 0,
+ (entrylo1 & 2) ? 1 : 0,
+ (entrylo1 & 1));
+ printk("\n");
+ }
+ }
+
+ write_c0_entryhi(asid);
+}
+
+void dump_tlb_all(void)
+{
+ dump_tlb(0, current_cpu_data.tlbsize - 1);
+}
+
+void dump_tlb_wired(void)
+{
+ int wired;
+
+ wired = read_c0_wired();
+ printk("Wired: %d", wired);
+ dump_tlb(0, read_c0_wired());
+}
+
+void dump_tlb_addr(unsigned long addr)
+{
+ unsigned int flags, oldpid;
+ int index;
+
+ local_irq_save(flags);
+ oldpid = read_c0_entryhi() & 0xff;
+ BARRIER();
+ write_c0_entryhi((addr & PAGE_MASK) | oldpid);
+ BARRIER();
+ tlb_probe();
+ BARRIER();
+ index = read_c0_index();
+ write_c0_entryhi(oldpid);
+ local_irq_restore(flags);
+
+ if (index < 0) {
+ printk("No entry for address 0x%08lx in TLB\n", addr);
+ return;
+ }
+
+ printk("Entry %d maps address 0x%08lx\n", index, addr);
+ dump_tlb(index, index);
+}
+
+void dump_tlb_nonwired(void)
+{
+ dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
+}
+
+void dump_list_process(struct task_struct *t, void *address)
+{
+ pgd_t *page_dir, *pgd;
+ pmd_t *pmd;
+ pte_t *pte, page;
+ unsigned long addr, val;
+
+ addr = (unsigned long) address;
+
+ printk("Addr == %08x\n", addr);
+ printk("task == %8p\n", t);
+ printk("task->mm == %8p\n", t->mm);
+ //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
+
+ if (addr > KSEG0)
+ page_dir = pgd_offset_k(0);
+ else
+ page_dir = pgd_offset(t->mm, 0);
+ printk("page_dir == %08x\n", (unsigned int) page_dir);
+
+ if (addr > KSEG0)
+ pgd = pgd_offset_k(addr);
+ else
+ pgd = pgd_offset(t->mm, addr);
+ printk("pgd == %08x, ", (unsigned int) pgd);
+
+ pmd = pmd_offset(pgd, addr);
+ printk("pmd == %08x, ", (unsigned int) pmd);
+
+ pte = pte_offset(pmd, addr);
+ printk("pte == %08x, ", (unsigned int) pte);
+
+ page = *pte;
+#ifdef CONFIG_64BIT_PHYS_ADDR
+ printk("page == %08Lx\n", pte_val(page));
+#else
+ printk("page == %08lx\n", pte_val(page));
+#endif
+
+ val = pte_val(page);
+ if (val & _PAGE_PRESENT) printk("present ");
+ if (val & _PAGE_READ) printk("read ");
+ if (val & _PAGE_WRITE) printk("write ");
+ if (val & _PAGE_ACCESSED) printk("accessed ");
+ if (val & _PAGE_MODIFIED) printk("modified ");
+ if (val & _PAGE_R4KBUG) printk("r4kbug ");
+ if (val & _PAGE_GLOBAL) printk("global ");
+ if (val & _PAGE_VALID) printk("valid ");
+ printk("\n");
+}
+
+void dump_list_current(void *address)
+{
+ dump_list_process(current, address);
+}
+
+unsigned int vtop(void *address)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ unsigned int addr, paddr;
+
+ addr = (unsigned long) address;
+ pgd = pgd_offset(current->mm, addr);
+ pmd = pmd_offset(pgd, addr);
+ pte = pte_offset(pmd, addr);
+ paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+ paddr |= (addr & ~PAGE_MASK);
+
+ return paddr;
+}
+
+void dump16(unsigned long *p)
+{
+ int i;
+
+ for(i = 0; i < 8; i++) {
+ printk("*%8p = %08lx, ", p, *p);
+ p++;
+ printk("*%8p = %08lx\n", p, *p);
+ p++;
+ }
+}
diff -Nru a/arch/mips/lib-32/memset.S b/arch/mips/lib-32/memset.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/memset.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,145 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+ .macro f_fill64 dst, offset, val, fixup
+ EX(LONG_S, \val, (\offset + 0 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 1 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 2 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 3 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 4 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 8 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 9 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 10 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 11 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 12 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 13 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 14 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 15 * LONGSIZE)(\dst), \fixup)
+ .endm
+
+/*
+ * memset(void *s, int c, size_t n)
+ *
+ * a0: start of area to clear
+ * a1: char to fill with
+ * a2: size of area to clear
+ */
+ .set noreorder
+ .align 5
+LEAF(memset)
+ beqz a1, 1f
+ move v0, a0 /* result */
+
+ andi a1, 0xff /* spread fillword */
+ sll t1, a1, 8
+ or a1, t1
+ sll t1, a1, 16
+ or a1, t1
+1:
+
+FEXPORT(__bzero)
+ sltiu t0, a2, LONGSIZE /* very small region? */
+ bnez t0, small_memset
+ andi t0, a0, LONGMASK /* aligned? */
+
+ beqz t0, 1f
+ PTR_SUBU t0, LONGSIZE /* alignment in bytes */
+
+#ifdef __MIPSEB__
+ EX(swl, a1, (a0), first_fixup) /* make word aligned */
+#endif
+#ifdef __MIPSEL__
+ EX(swr, a1, (a0), first_fixup) /* make word aligned */
+#endif
+ PTR_SUBU a0, t0 /* long align ptr */
+ PTR_ADDU a2, t0 /* correct size */
+
+1: ori t1, a2, 0x3f /* # of full blocks */
+ xori t1, 0x3f
+ beqz t1, memset_partial /* no block to fill */
+ andi t0, a2, 0x3c
+
+ PTR_ADDU t1, a0 /* end address */
+ .set reorder
+1: PTR_ADDIU a0, 64
+ f_fill64 a0, -64, a1, fwd_fixup
+ bne t1, a0, 1b
+ .set noreorder
+
+memset_partial:
+ PTR_LA t1, 2f /* where to start */
+ PTR_SUBU t1, t0
+ jr t1
+ PTR_ADDU a0, t0 /* dest ptr */
+
+ .set push
+ .set noreorder
+ .set nomacro
+ f_fill64 a0, -64, a1, partial_fixup /* ... but first do longs ... */
+2: .set pop
+ andi a2, LONGMASK /* At most one long to go */
+
+ beqz a2, 1f
+ PTR_ADDU a0, a2 /* What's left */
+#ifdef __MIPSEB__
+ EX(swr, a1, -1(a0), last_fixup)
+#endif
+#ifdef __MIPSEL__
+ EX(swl, a1, -1(a0), last_fixup)
+#endif
+1: jr ra
+ move a2, zero
+
+small_memset:
+ beqz a2, 2f
+ PTR_ADDU t1, a0, a2
+
+1: PTR_ADDIU a0, 1 /* fill bytewise */
+ bne t1, a0, 1b
+ sb a1, -1(a0)
+
+2: jr ra /* done */
+ move a2, zero
+ END(memset)
+
+first_fixup:
+ jr ra
+ nop
+
+fwd_fixup:
+ PTR_L t0, TI_TASK($28)
+ LONG_L t0, THREAD_BUADDR(t0)
+ andi a2, 0x3f
+ LONG_ADDU a2, t1
+ jr ra
+ LONG_SUBU a2, t0
+
+partial_fixup:
+ PTR_L t0, TI_TASK($28)
+ LONG_L t0, THREAD_BUADDR(t0)
+ andi a2, LONGMASK
+ LONG_ADDU a2, t1
+ jr ra
+ LONG_SUBU a2, t0
+
+last_fixup:
+ jr ra
+ andi v1, a2, LONGMASK
diff -Nru a/arch/mips/lib-32/r3k_dump_tlb.c b/arch/mips/lib-32/r3k_dump_tlb.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/r3k_dump_tlb.c Sun Aug 3 13:14:45 2003
@@ -0,0 +1,187 @@
+/*
+ * Dump R3000 TLB for debugging purposes.
+ *
+ * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
+ * Copyright (C) 1999 by Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Harald Koerfgen
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */
+
+void
+dump_tlb(int first, int last)
+{
+ int i;
+ unsigned int asid;
+ unsigned long entryhi, entrylo0;
+
+ asid = read_c0_entryhi() & 0xfc0;
+
+ for(i=first;i<=last;i++)
+ {
+ write_c0_index(i<<8);
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ "tlbr\n\t"
+ "nop\n\t"
+ ".set\treorder");
+ entryhi = read_c0_entryhi();
+ entrylo0 = read_c0_entrylo0();
+
+ /* Unused entries have a virtual address of KSEG0. */
+ if ((entryhi & 0xffffe000) != 0x80000000
+ && (entryhi & 0xfc0) == asid) {
+ /*
+ * Only print entries in use
+ */
+ printk("Index: %2d ", i);
+
+ printk("va=%08lx asid=%08lx"
+ " [pa=%06lx n=%d d=%d v=%d g=%d]",
+ (entryhi & 0xffffe000),
+ entryhi & 0xfc0,
+ entrylo0 & PAGE_MASK,
+ (entrylo0 & (1 << 11)) ? 1 : 0,
+ (entrylo0 & (1 << 10)) ? 1 : 0,
+ (entrylo0 & (1 << 9)) ? 1 : 0,
+ (entrylo0 & (1 << 8)) ? 1 : 0);
+ }
+ }
+ printk("\n");
+
+ write_c0_entryhi(asid);
+}
+
+void
+dump_tlb_all(void)
+{
+ dump_tlb(0, current_cpu_data.tlbsize - 1);
+}
+
+void
+dump_tlb_wired(void)
+{
+ int wired = r3k_have_wired_reg ? read_c0_wired() : 8;
+
+ printk("Wired: %d", wired);
+ dump_tlb(0, wired - 1);
+}
+
+void
+dump_tlb_addr(unsigned long addr)
+{
+ unsigned int flags, oldpid;
+ int index;
+
+ local_irq_save(flags);
+ oldpid = read_c0_entryhi() & 0xff;
+ write_c0_entryhi((addr & PAGE_MASK) | oldpid);
+ tlb_probe();
+ index = read_c0_index();
+ write_c0_entryhi(oldpid);
+ local_irq_restore(flags);
+
+ if (index < 0) {
+ printk("No entry for address 0x%08lx in TLB\n", addr);
+ return;
+ }
+
+ printk("Entry %d maps address 0x%08lx\n", index, addr);
+ dump_tlb(index, index);
+}
+
+void
+dump_tlb_nonwired(void)
+{
+ int wired = r3k_have_wired_reg ? read_c0_wired() : 8;
+ dump_tlb(wired, current_cpu_data.tlbsize - 1);
+}
+
+void
+dump_list_process(struct task_struct *t, void *address)
+{
+ pgd_t *page_dir, *pgd;
+ pmd_t *pmd;
+ pte_t *pte, page;
+ unsigned int addr;
+ unsigned long val;
+
+ addr = (unsigned int) address;
+
+ printk("Addr == %08x\n", addr);
+ printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
+
+ page_dir = pgd_offset(t->mm, 0);
+ printk("page_dir == %08x\n", (unsigned int) page_dir);
+
+ pgd = pgd_offset(t->mm, addr);
+ printk("pgd == %08x, ", (unsigned int) pgd);
+
+ pmd = pmd_offset(pgd, addr);
+ printk("pmd == %08x, ", (unsigned int) pmd);
+
+ pte = pte_offset(pmd, addr);
+ printk("pte == %08x, ", (unsigned int) pte);
+
+ page = *pte;
+ printk("page == %08x\n", (unsigned int) pte_val(page));
+
+ val = pte_val(page);
+ if (val & _PAGE_PRESENT) printk("present ");
+ if (val & _PAGE_READ) printk("read ");
+ if (val & _PAGE_WRITE) printk("write ");
+ if (val & _PAGE_ACCESSED) printk("accessed ");
+ if (val & _PAGE_MODIFIED) printk("modified ");
+ if (val & _PAGE_GLOBAL) printk("global ");
+ if (val & _PAGE_VALID) printk("valid ");
+ printk("\n");
+}
+
+void
+dump_list_current(void *address)
+{
+ dump_list_process(current, address);
+}
+
+unsigned int
+vtop(void *address)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ unsigned int addr, paddr;
+
+ addr = (unsigned long) address;
+ pgd = pgd_offset(current->mm, addr);
+ pmd = pmd_offset(pgd, addr);
+ pte = pte_offset(pmd, addr);
+ paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+ paddr |= (addr & ~PAGE_MASK);
+
+ return paddr;
+}
+
+void
+dump16(unsigned long *p)
+{
+ int i;
+
+ for(i=0;i<8;i++)
+ {
+ printk("*%08lx == %08lx, ",
+ (unsigned long)p, (unsigned long)*p++);
+ printk("*%08lx == %08lx\n",
+ (unsigned long)p, (unsigned long)*p++);
+ }
+}
diff -Nru a/arch/mips/lib-32/strlen_user.S b/arch/mips/lib-32/strlen_user.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/strlen_user.S Sun Aug 3 13:14:52 2003
@@ -0,0 +1,40 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 for error
+ */
+LEAF(__strlen_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a0
+ bltz v0, fault
+
+FEXPORT(__strlen_user_nocheck_asm)
+ move v0, a0
+1: EX(lb, t0, (v0), fault)
+ PTR_ADDIU v0, 1
+ bnez t0, 1b
+ PTR_SUBU v0, a0
+ jr ra
+ END(__strlen_user_asm)
+
+fault: move v0, zero
+ jr ra
diff -Nru a/arch/mips/lib-32/strncpy_user.S b/arch/mips/lib-32/strncpy_user.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/strncpy_user.S Sun Aug 3 13:14:50 2003
@@ -0,0 +1,58 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1999 by Ralf Baechle
+ */
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Returns: -EFAULT if exception before terminator, N if the entire
+ * buffer filled, else strlen.
+ */
+
+/*
+ * Ugly special case have to check: we might get passed a user space
+ * pointer which wraps into the kernel space. We don't deal with that. If
+ * it happens at most some bytes of the exceptions handlers will be copied.
+ */
+
+LEAF(__strncpy_from_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a1
+ bltz v0, fault
+
+FEXPORT(__strncpy_from_user_nocheck_asm)
+ move v0, zero
+ move v1, a1
+ .set noreorder
+1: EX(lbu, t0, (v1), fault)
+ PTR_ADDIU v1, 1
+ beqz t0, 2f
+ sb t0, (a0)
+ PTR_ADDIU v0, 1
+ bne v0, a2, 1b
+ PTR_ADDIU a0, 1
+ .set reorder
+2: PTR_ADDU t0, a1, v0
+ xor t0, a1
+ bltz t0, fault
+ jr ra # return n
+ END(__strncpy_from_user_asm)
+
+fault: li v0, -EFAULT
+ jr ra
+
+ .section __ex_table,"a"
+ PTR 1b, fault
+ .previous
diff -Nru a/arch/mips/lib-32/strnlen_user.S b/arch/mips/lib-32/strnlen_user.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/strnlen_user.S Sun Aug 3 13:14:51 2003
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Return the size of a string including the ending NUL character upto a
+ * maximum of a1 or 0 in case of error.
+ *
+ * Note: for performance reasons we deliberately accept that a user may
+ * make strlen_user and strnlen_user access the first few KSEG0
+ * bytes. There's nothing secret there. On 64-bit accessing beyond
+ * the maximum is a tad hairier ...
+ */
+LEAF(__strnlen_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a0
+ bltz v0, fault
+
+FEXPORT(__strnlen_user_nocheck_asm)
+ move v0, a0
+ PTR_ADDU a1, a0 # stop pointer
+1: beq v0, a1, 1f # limit reached?
+ EX(lb, t0, (v0), fault)
+ PTR_ADDU v0, 1
+ bnez t0, 1b
+1: PTR_SUBU v0, a0
+ jr ra
+ END(__strnlen_user_asm)
+
+fault: move v0, zero
+ jr ra
diff -Nru a/arch/mips/lib-32/watch.S b/arch/mips/lib-32/watch.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-32/watch.S Sun Aug 3 13:14:46 2003
@@ -0,0 +1,60 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Kernel debug stuff to use the Watch registers.
+ * Useful to find stack overflows, dangling pointers etc.
+ *
+ * Copyright (C) 1995, 1996, 1999 by Ralf Baechle
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+ .set noreorder
+/*
+ * Parameter: a0 - logic address to watch
+ * Currently only KSEG0 addresses are allowed!
+ * a1 - set bit #1 to trap on load references
+ * bit #0 to trap on store references
+ * Results : none
+ */
+ LEAF(__watch_set)
+ li t0, 0x80000000
+ subu a0, t0
+ ori a0, 7
+ xori a0, 7
+ or a0, a1
+ mtc0 a0, CP0_WATCHLO
+ sw a0, watch_savelo
+
+ jr ra
+ mtc0 zero, CP0_WATCHHI
+ END(__watch_set)
+
+/*
+ * Parameter: none
+ * Results : none
+ */
+ LEAF(__watch_clear)
+ jr ra
+ mtc0 zero, CP0_WATCHLO
+ END(__watch_clear)
+
+/*
+ * Parameter: none
+ * Results : none
+ */
+ LEAF(__watch_reenable)
+ lw t0, watch_savelo
+ jr ra
+ mtc0 t0, CP0_WATCHLO
+ END(__watch_reenable)
+
+/*
+ * Saved value of the c0_watchlo register for watch_reenable()
+ */
+ .data
+watch_savelo: .word 0
+ .text
diff -Nru a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,14 @@
+#
+# Makefile for MIPS-specific library files..
+#
+
+lib-y += csum_partial.o memset.o strlen_user.o strncpy_user.o strnlen_user.o \
+ watch.o
+
+ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y)
+ lib-y += r3k_dump_tlb.o
+else
+ lib-y += dump_tlb.o
+endif
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/lib-64/csum_partial.S b/arch/mips/lib-64/csum_partial.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/csum_partial.S Sun Aug 3 13:14:49 2003
@@ -0,0 +1,242 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Quick'n'dirty IP checksum ...
+ *
+ * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+
+#define ADDC(sum,reg) \
+ addu sum, reg; \
+ sltu v1, sum, reg; \
+ addu sum, v1
+
+#define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3) \
+ lw t0, (offset + 0x00)(src); \
+ lw t1, (offset + 0x04)(src); \
+ lw t2, (offset + 0x08)(src); \
+ lw t3, (offset + 0x0c)(src); \
+ ADDC(sum, t0); \
+ ADDC(sum, t1); \
+ ADDC(sum, t2); \
+ ADDC(sum, t3); \
+ lw t0, (offset + 0x10)(src); \
+ lw t1, (offset + 0x14)(src); \
+ lw t2, (offset + 0x18)(src); \
+ lw t3, (offset + 0x1c)(src); \
+ ADDC(sum, t0); \
+ ADDC(sum, t1); \
+ ADDC(sum, t2); \
+ ADDC(sum, t3); \
+
+/*
+ * a0: source address
+ * a1: length of the area to checksum
+ * a2: partial checksum
+ */
+
+#define src a0
+#define sum v0
+
+ .text
+ .set noreorder
+
+/* unknown src alignment and < 8 bytes to go */
+small_csumcpy:
+ move a1, ta2
+
+ andi ta0, a1, 4
+ beqz ta0, 1f
+ andi ta0, a1, 2
+
+ /* Still a full word to go */
+ ulw ta1, (src)
+ daddiu src, 4
+ ADDC(sum, ta1)
+
+1: move ta1, zero
+ beqz ta0, 1f
+ andi ta0, a1, 1
+
+ /* Still a halfword to go */
+ ulhu ta1, (src)
+ daddiu src, 2
+
+1: beqz ta0, 1f
+ sll ta1, ta1, 16
+
+ lbu ta2, (src)
+ nop
+
+#ifdef __MIPSEB__
+ sll ta2, ta2, 8
+#endif
+ or ta1, ta2
+
+1: ADDC(sum, ta1)
+
+ /* fold checksum */
+ sll v1, sum, 16
+ addu sum, v1
+ sltu v1, sum, v1
+ srl sum, sum, 16
+ addu sum, v1
+
+ /* odd buffer alignment? */
+ beqz t3, 1f
+ nop
+ sll v1, sum, 8
+ srl sum, sum, 8
+ or sum, v1
+ andi sum, 0xffff
+1:
+ .set reorder
+ /* Add the passed partial csum. */
+ ADDC(sum, a2)
+ jr ra
+ .set noreorder
+
+/* ------------------------------------------------------------------------- */
+
+ .align 5
+LEAF(csum_partial)
+ move sum, zero
+ move t3, zero
+
+ sltiu t8, a1, 0x8
+ bnez t8, small_csumcpy /* < 8 bytes to copy */
+ move ta2, a1
+
+ beqz a1, out
+ andi t3, src, 0x1 /* odd buffer? */
+
+hword_align:
+ beqz t3, word_align
+ andi t8, src, 0x2
+
+ lbu ta0, (src)
+ dsubu a1, a1, 0x1
+#ifdef __MIPSEL__
+ sll ta0, ta0, 8
+#endif
+ ADDC(sum, ta0)
+ daddu src, src, 0x1
+ andi t8, src, 0x2
+
+word_align:
+ beqz t8, dword_align
+ sltiu t8, a1, 56
+
+ lhu ta0, (src)
+ dsubu a1, a1, 0x2
+ ADDC(sum, ta0)
+ sltiu t8, a1, 56
+ daddu src, src, 0x2
+
+dword_align:
+ bnez t8, do_end_words
+ move t8, a1
+
+ andi t8, src, 0x4
+ beqz t8, qword_align
+ andi t8, src, 0x8
+
+ lw ta0, 0x00(src)
+ dsubu a1, a1, 0x4
+ ADDC(sum, ta0)
+ daddu src, src, 0x4
+ andi t8, src, 0x8
+
+qword_align:
+ beqz t8, oword_align
+ andi t8, src, 0x10
+
+ lw ta0, 0x00(src)
+ lw ta1, 0x04(src)
+ dsubu a1, a1, 0x8
+ ADDC(sum, ta0)
+ ADDC(sum, ta1)
+ daddu src, src, 0x8
+ andi t8, src, 0x10
+
+oword_align:
+ beqz t8, begin_movement
+ dsrl t8, a1, 0x7
+
+ lw ta3, 0x08(src)
+ lw t0, 0x0c(src)
+ lw ta0, 0x00(src)
+ lw ta1, 0x04(src)
+ ADDC(sum, ta3)
+ ADDC(sum, t0)
+ ADDC(sum, ta0)
+ ADDC(sum, ta1)
+ dsubu a1, a1, 0x10
+ daddu src, src, 0x10
+ dsrl t8, a1, 0x7
+
+begin_movement:
+ beqz t8, 1f
+ andi ta2, a1, 0x40
+
+move_128bytes:
+ CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
+ CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
+ CSUM_BIGCHUNK(src, 0x40, sum, ta0, ta1, ta3, t0)
+ CSUM_BIGCHUNK(src, 0x60, sum, ta0, ta1, ta3, t0)
+ dsubu t8, t8, 0x01
+ bnez t8, move_128bytes
+ daddu src, src, 0x80
+
+1:
+ beqz ta2, 1f
+ andi ta2, a1, 0x20
+
+move_64bytes:
+ CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
+ CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
+ daddu src, src, 0x40
+
+1:
+ beqz ta2, do_end_words
+ andi t8, a1, 0x1c
+
+move_32bytes:
+ CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
+ andi t8, a1, 0x1c
+ daddu src, src, 0x20
+
+do_end_words:
+ beqz t8, maybe_end_cruft
+ dsrl t8, t8, 0x2
+
+end_words:
+ lw ta0, (src)
+ dsubu t8, t8, 0x1
+ ADDC(sum, ta0)
+ bnez t8, end_words
+ daddu src, src, 0x4
+
+maybe_end_cruft:
+ andi ta2, a1, 0x3
+
+small_memcpy:
+ j small_csumcpy; move a1, ta2 /* XXX ??? */
+ beqz t2, out
+ move a1, ta2
+
+end_bytes:
+ lb ta0, (src)
+ dsubu a1, a1, 0x1
+ bnez a2, end_bytes
+ daddu src, src, 0x1
+
+out:
+ jr ra
+ move v0, sum
+ END(csum_partial)
diff -Nru a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/dump_tlb.c Sun Aug 3 13:14:51 2003
@@ -0,0 +1,211 @@
+/*
+ * Dump R4x00 TLB for debugging purposes.
+ *
+ * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
+ * Copyright (C) 1999 by Silicon Graphics, Inc.
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+static inline const char *msk2str(unsigned int mask)
+{
+ switch (mask) {
+ case PM_4K: return "4kb";
+ case PM_16K: return "16kb";
+ case PM_64K: return "64kb";
+ case PM_256K: return "256kb";
+#ifndef CONFIG_CPU_VR41XX
+ case PM_1M: return "1Mb";
+ case PM_4M: return "4Mb";
+ case PM_16M: return "16Mb";
+ case PM_64M: return "64Mb";
+ case PM_256M: return "256Mb";
+#endif
+ }
+}
+
+#define BARRIER() \
+ __asm__ __volatile__( \
+ ".set\tnoreorder\n\t" \
+ "nop;nop;nop;nop;nop;nop;nop\n\t" \
+ ".set\treorder");
+
+void dump_tlb(int first, int last)
+{
+ unsigned long s_entryhi, entryhi, entrylo0, entrylo1, asid;
+ unsigned int s_index, pagemask, c0, c1, i;
+
+ s_entryhi = read_c0_entryhi();
+ s_index = read_c0_index();
+ asid = s_entryhi & 0xff;
+
+ for (i = first; i <= last; i++) {
+ write_c0_index(i);
+ BARRIER();
+ tlb_read();
+ BARRIER();
+ pagemask = read_c0_pagemask();
+ entryhi = read_c0_entryhi();
+ entrylo0 = read_c0_entrylo0();
+ entrylo1 = read_c0_entrylo1();
+
+ /* Unused entries have a virtual address of CKSEG0. */
+ if ((entryhi & ~0x1ffffUL) != CKSEG0
+ && (entryhi & 0xff) == asid) {
+ /*
+ * Only print entries in use
+ */
+ printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
+
+ c0 = (entrylo0 >> 3) & 7;
+ c1 = (entrylo1 >> 3) & 7;
+
+ printk("va=%011lx asid=%02lx\n",
+ (entryhi & ~0x1fffUL),
+ entryhi & 0xff);
+ printk("\t[pa=%011lx c=%d d=%d v=%d g=%ld] ",
+ (entrylo0 << 6) & PAGE_MASK, c0,
+ (entrylo0 & 4) ? 1 : 0,
+ (entrylo0 & 2) ? 1 : 0,
+ (entrylo0 & 1));
+ printk("[pa=%011lx c=%d d=%d v=%d g=%ld]\n",
+ (entrylo1 << 6) & PAGE_MASK, c1,
+ (entrylo1 & 4) ? 1 : 0,
+ (entrylo1 & 2) ? 1 : 0,
+ (entrylo1 & 1));
+ }
+ }
+ printk("\n");
+
+ write_c0_entryhi(s_entryhi);
+ write_c0_index(s_index);
+}
+
+void dump_tlb_all(void)
+{
+ dump_tlb(0, current_cpu_data.tlbsize - 1);
+}
+
+void dump_tlb_wired(void)
+{
+ int wired;
+
+ wired = read_c0_wired();
+ printk("Wired: %d", wired);
+ dump_tlb(0, read_c0_wired());
+}
+
+void dump_tlb_addr(unsigned long addr)
+{
+ unsigned int flags, oldpid;
+ int index;
+
+ local_irq_save(flags);
+ oldpid = read_c0_entryhi() & 0xff;
+ BARRIER();
+ write_c0_entryhi((addr & PAGE_MASK) | oldpid);
+ BARRIER();
+ tlb_probe();
+ BARRIER();
+ index = read_c0_index();
+ write_c0_entryhi(oldpid);
+ local_irq_restore(flags);
+
+ if (index < 0) {
+ printk("No entry for address 0x%08lx in TLB\n", addr);
+ return;
+ }
+
+ printk("Entry %d maps address 0x%08lx\n", index, addr);
+ dump_tlb(index, index);
+}
+
+void dump_tlb_nonwired(void)
+{
+ dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
+}
+
+void dump_list_process(struct task_struct *t, void *address)
+{
+ pgd_t *page_dir, *pgd;
+ pmd_t *pmd;
+ pte_t *pte, page;
+ unsigned long addr, val;
+
+ addr = (unsigned long) address;
+
+ printk("Addr == %08lx\n", addr);
+ printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
+
+ page_dir = pgd_offset(t->mm, 0);
+ printk("page_dir == %08lx\n", (unsigned long) page_dir);
+
+ pgd = pgd_offset(t->mm, addr);
+ printk("pgd == %08lx, ", (unsigned long) pgd);
+
+ pmd = pmd_offset(pgd, addr);
+ printk("pmd == %08lx, ", (unsigned long) pmd);
+
+ pte = pte_offset(pmd, addr);
+ printk("pte == %08lx, ", (unsigned long) pte);
+
+ page = *pte;
+ printk("page == %08lx\n", pte_val(page));
+
+ val = pte_val(page);
+ if (val & _PAGE_PRESENT) printk("present ");
+ if (val & _PAGE_READ) printk("read ");
+ if (val & _PAGE_WRITE) printk("write ");
+ if (val & _PAGE_ACCESSED) printk("accessed ");
+ if (val & _PAGE_MODIFIED) printk("modified ");
+ if (val & _PAGE_R4KBUG) printk("r4kbug ");
+ if (val & _PAGE_GLOBAL) printk("global ");
+ if (val & _PAGE_VALID) printk("valid ");
+ printk("\n");
+}
+
+void dump_list_current(void *address)
+{
+ dump_list_process(current, address);
+}
+
+unsigned int vtop(void *address)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ unsigned int addr, paddr;
+
+ addr = (unsigned long) address;
+ pgd = pgd_offset(current->mm, addr);
+ pmd = pmd_offset(pgd, addr);
+ pte = pte_offset(pmd, addr);
+ paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+ paddr |= (addr & ~PAGE_MASK);
+
+ return paddr;
+}
+
+void dump16(unsigned long *p)
+{
+ int i;
+
+ for(i = 0; i < 8; i++) {
+ printk("*%08lx == %08lx, ",
+ (unsigned long)p, (unsigned long)*p);
+ p++;
+ printk("*%08lx == %08lx\n",
+ (unsigned long)p, (unsigned long)*p);
+ p++;
+ }
+}
diff -Nru a/arch/mips/lib-64/memset.S b/arch/mips/lib-64/memset.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/memset.S Sun Aug 3 13:14:50 2003
@@ -0,0 +1,142 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+ .macro f_fill64 dst, offset, val, fixup
+ EX(LONG_S, \val, (\offset + 0 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 1 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 2 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 3 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 4 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup)
+ EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup)
+ .endm
+
+/*
+ * memset(void *s, int c, size_t n)
+ *
+ * a0: start of area to clear
+ * a1: char to fill with
+ * a2: size of area to clear
+ */
+ .set noreorder
+ .align 5
+LEAF(memset)
+ beqz a1, 1f
+ move v0, a0 /* result */
+
+ andi a1, 0xff /* spread fillword */
+ dsll t1, a1, 8
+ or a1, t1
+ dsll t1, a1, 16
+ or a1, t1
+ dsll t1, a1, 32
+ or a1, t1
+1:
+
+FEXPORT(__bzero)
+ sltiu t0, a2, LONGSIZE /* very small region? */
+ bnez t0, small_memset
+ andi t0, a0, LONGMASK /* aligned? */
+
+ beqz t0, 1f
+ PTR_SUBU t0, LONGSIZE /* alignment in bytes */
+
+#ifdef __MIPSEB__
+ EX(sdl, a1, (a0), first_fixup) /* make dword aligned */
+#endif
+#ifdef __MIPSEL__
+ EX(sdr, a1, (a0), first_fixup) /* make dword aligned */
+#endif
+ PTR_SUBU a0, t0 /* long align ptr */
+ PTR_ADDU a2, t0 /* correct size */
+
+1: ori t1, a2, 0x3f /* # of full blocks */
+ xori t1, 0x3f
+ beqz t1, memset_partial /* no block to fill */
+ andi t0, a2, 0x38
+
+ PTR_ADDU t1, a0 /* end address */
+ .set reorder
+1: PTR_ADDIU a0, 64
+ f_fill64 a0, -64, a1, fwd_fixup
+ bne t1, a0, 1b
+ .set noreorder
+
+memset_partial:
+ PTR_LA t1, 2f /* where to start */
+ .set noat
+ dsrl AT, t0, 1
+ PTR_SUBU t1, AT
+ .set noat
+ jr t1
+ PTR_ADDU a0, t0 /* dest ptr */
+
+ .set push
+ .set noreorder
+ .set nomacro
+ f_fill64 a0, -64, a1, partial_fixup /* ... but first do longs ... */
+2: .set pop
+ andi a2, LONGMASK /* At most one long to go */
+
+ beqz a2, 1f
+ PTR_ADDU a0, a2 /* What's left */
+#ifdef __MIPSEB__
+ EX(sdr, a1, -1(a0), last_fixup)
+#endif
+#ifdef __MIPSEL__
+ EX(sdl, a1, -1(a0), last_fixup)
+#endif
+1: jr ra
+ move a2, zero
+
+small_memset:
+ beqz a2, 2f
+ PTR_ADDU t1, a0, a2
+
+1: PTR_ADDIU a0, 1 /* fill bytewise */
+ bne t1, a0, 1b
+ sb a1, -1(a0)
+
+2: jr ra /* done */
+ move a2, zero
+ END(memset)
+
+first_fixup:
+ jr ra
+ nop
+
+fwd_fixup:
+ PTR_L t0, TI_TASK($28)
+ LONG_L t0, THREAD_BUADDR(t0)
+ andi a2, 0x3f
+ LONG_ADDU a2, t1
+ jr ra
+ LONG_SUBU a2, t0
+
+partial_fixup:
+ PTR_L t0, TI_TASK($28)
+ LONG_L t0, THREAD_BUADDR(t0)
+ andi a2, LONGMASK
+ LONG_ADDU a2, t1
+ jr ra
+ LONG_SUBU a2, t0
+
+last_fixup:
+ jr ra
+ andi v1, a2, LONGMASK
diff -Nru a/arch/mips/lib-64/strlen_user.S b/arch/mips/lib-64/strlen_user.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/strlen_user.S Sun Aug 3 13:14:47 2003
@@ -0,0 +1,40 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 for error
+ */
+LEAF(__strlen_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a0
+ bnez v0, fault
+
+FEXPORT(__strlen_user_nocheck_asm)
+ move v0, a0
+1: EX(lb, t0, (v0), fault)
+ PTR_ADDIU v0, 1
+ bnez t0, 1b
+ PTR_SUBU v0, a0
+ jr ra
+ END(__strlen_user_asm)
+
+fault: move v0, zero
+ jr ra
diff -Nru a/arch/mips/lib-64/strncpy_user.S b/arch/mips/lib-64/strncpy_user.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/strncpy_user.S Sun Aug 3 13:14:46 2003
@@ -0,0 +1,58 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1999 by Ralf Baechle
+ */
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Returns: -EFAULT if exception before terminator, N if the entire
+ * buffer filled, else strlen.
+ */
+
+/*
+ * Ugly special case have to check: we might get passed a user space
+ * pointer which wraps into the kernel space. We don't deal with that. If
+ * it happens at most some bytes of the exceptions handlers will be copied.
+ */
+
+LEAF(__strncpy_from_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a1
+ bnez v0, fault
+
+FEXPORT(__strncpy_from_user_nocheck_asm)
+ move v0, zero
+ move v1, a1
+ .set noreorder
+1: EX(lbu, t0, (v1), fault)
+ PTR_ADDIU v1, 1
+ beqz t0, 2f
+ sb t0, (a0)
+ PTR_ADDIU v0, 1
+ bne v0, a2, 1b
+ PTR_ADDIU a0, 1
+ .set reorder
+2: PTR_ADDU t0, a1, v0
+ xor t0, a1
+ bltz t0, fault
+ jr ra # return n
+ END(__strncpy_from_user_asm)
+
+fault: li v0, -EFAULT
+ jr ra
+
+ .section __ex_table,"a"
+ PTR 1b, fault
+ .previous
diff -Nru a/arch/mips/lib-64/strnlen_user.S b/arch/mips/lib-64/strnlen_user.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/strnlen_user.S Sun Aug 3 13:14:47 2003
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Return the size of a string including the ending NUL character upto a
+ * maximum of a1 or 0 in case of error.
+ *
+ * Note: for performance reasons we deliberately accept that a user may
+ * make strlen_user and strnlen_user access the first few KSEG0
+ * bytes. There's nothing secret there. On 64-bit accessing beyond
+ * the maximum is a tad hairier ...
+ */
+LEAF(__strnlen_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a0
+ bnez v0, fault
+
+FEXPORT(__strnlen_user_nocheck_asm)
+ move v0, a0
+ PTR_ADDU a1, a0 # stop pointer
+1: beq v0, a1, 1f # limit reached?
+ EX(lb, t0, (v0), fault)
+ PTR_ADDU v0, 1
+ bnez t0, 1b
+1: PTR_SUBU v0, a0
+ jr ra
+ END(__strnlen_user_asm)
+
+fault: move v0, zero
+ jr ra
diff -Nru a/arch/mips/lib-64/watch.S b/arch/mips/lib-64/watch.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/lib-64/watch.S Sun Aug 3 13:14:46 2003
@@ -0,0 +1,57 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Kernel debug stuff to use the Watch registers.
+ * Useful to find stack overflows, dangling pointers etc.
+ *
+ * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+ .set noreorder
+/*
+ * Parameter: a0 - physical address to watch
+ * a1 - set bit #1 to trap on load references
+ * bit #0 to trap on store references
+ * Results : none
+ */
+ LEAF(__watch_set)
+ ori a0, 7
+ xori a0, 7
+ or a0, a1
+ mtc0 a0, CP0_WATCHLO
+ sd a0, watch_savelo
+ dsrl32 a0, a0, 0
+
+ jr ra
+ mtc0 zero, CP0_WATCHHI
+ END(__watch_set)
+
+/*
+ * Parameter: none
+ * Results : none
+ */
+ LEAF(__watch_clear)
+ jr ra
+ mtc0 zero, CP0_WATCHLO
+ END(__watch_clear)
+
+/*
+ * Parameter: none
+ * Results : none
+ */
+ LEAF(__watch_reenable)
+ ld t0, watch_savelo
+ jr ra
+ mtc0 t0, CP0_WATCHLO
+ END(__watch_reenable)
+
+/*
+ * Saved value of the c0_watchlo register for watch_reenable()
+ */
+ .local watch_savelo
+ .comm watch_savelo, 8, 8
diff -Nru a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
--- a/arch/mips/math-emu/cp1emu.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/math-emu/cp1emu.c Sun Aug 3 13:14:52 2003
@@ -170,20 +170,16 @@
#define SIFROMREG(si,x) ((si) = \
(xcp->cp0_status & FR_BIT) || !(x & 1) ? \
- (int)ctx->regs[x] : \
- (int)(ctx->regs[x & ~1] >> 32 ))
-#define SITOREG(si,x) (ctx->regs[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
+ (int)ctx->fpr[x] : \
+ (int)(ctx->fpr[x & ~1] >> 32 ))
+#define SITOREG(si,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
(xcp->cp0_status & FR_BIT) || !(x & 1) ? \
- ctx->regs[x & ~1] >> 32 << 32 | (u32)(si) : \
- ctx->regs[x & ~1] << 32 >> 32 | (u64)(si) << 32)
+ ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
+ ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
#define DIFROMREG(di,x) ((di) = \
- ctx->regs[x & ~((xcp->cp0_status & FR_BIT) == 0)])
-#define DITOREG(di,x) (ctx->regs[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
- = (di))
-#define DIFROMREG(di,x) ((di) = \
- ctx->regs[x & ~((xcp->cp0_status & FR_BIT) == 0)])
-#define DITOREG(di,x) (ctx->regs[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
+ ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)])
+#define DITOREG(di,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
= (di))
#define SPFROMREG(sp,x) SIFROMREG((sp).bits,x)
@@ -371,7 +367,7 @@
return do_dsemulret(xcp);
}
if (MIPSInst_RD(ir) == FPCREG_CSR) {
- value = ctx->sr;
+ value = ctx->fcr31;
#ifdef CSRTRACE
printk("%p gpr[%d]<-csr=%08x\n",
REG_TO_VA(xcp->cp0_epc),
@@ -404,13 +400,13 @@
REG_TO_VA(xcp->cp0_epc),
MIPSInst_RT(ir), value);
#endif
- ctx->sr = value;
+ ctx->fcr31 = value;
/* copy new rounding mode and
flush bit to ieee library state! */
- ieee754_csr.nod = (ctx->sr & 0x1000000) != 0;
+ ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;
ieee754_csr.rm = ieee_rm[value & 0x3];
}
- if ((ctx->sr >> 5) & ctx->sr & FPU_CSR_ALL_E) {
+ if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
return SIGFPE;
}
break;
@@ -423,9 +419,9 @@
return SIGILL;
#if __mips >= 4
- cond = ctx->sr & fpucondbit[MIPSInst_RT(ir) >> 2];
+ cond = ctx->fcr31 & fpucondbit[MIPSInst_RT(ir) >> 2];
#else
- cond = ctx->sr & FPU_CSR_COND;
+ cond = ctx->fcr31 & FPU_CSR_COND;
#endif
switch (MIPSInst_RT(ir) & 3) {
case bcfl_op:
@@ -531,7 +527,7 @@
if (MIPSInst_FUNC(ir) != movc_op)
return SIGILL;
cond = fpucondbit[MIPSInst_RT(ir) >> 2];
- if (((ctx->sr & cond) != 0) != ((MIPSInst_RT(ir) & 1) != 0))
+ if (((ctx->fcr31 & cond) != 0) != ((MIPSInst_RT(ir) & 1) != 0))
return 0;
xcp->regs[MIPSInst_RD(ir)] = xcp->regs[MIPSInst_RS(ir)];
break;
@@ -701,12 +697,12 @@
if (ieee754_cxtest(IEEE754_INVALID_OPERATION))
rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
- ctx->sr = (ctx->sr & ~FPU_CSR_ALL_X) | rcsr;
+ ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
if (ieee754_csr.nod)
- ctx->sr |= 0x1000000;
- if ((ctx->sr >> 5) & ctx->sr & FPU_CSR_ALL_E) {
+ ctx->fcr31 |= 0x1000000;
+ if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
/*printk ("SIGFPE: fpu csr = %08x\n",
- ctx->sr); */
+ ctx->fcr31); */
return SIGFPE;
}
@@ -853,7 +849,7 @@
#if __mips >= 4
case fmovc_op:
cond = fpucondbit[MIPSInst_FT(ir) >> 2];
- if (((ctx->sr & cond) != 0) !=
+ if (((ctx->fcr31 & cond) != 0) !=
((MIPSInst_FT(ir) & 1) != 0))
return 0;
SPFROMREG(rv.s, MIPSInst_FS(ir));
@@ -1043,7 +1039,7 @@
#if __mips >= 4
case fmovc_op:
cond = fpucondbit[MIPSInst_FT(ir) >> 2];
- if (((ctx->sr & cond) != 0) !=
+ if (((ctx->fcr31 & cond) != 0) !=
((MIPSInst_FT(ir) & 1) != 0))
return 0;
DPFROMREG(rv.d, MIPSInst_FS(ir));
@@ -1211,12 +1207,12 @@
switch (MIPSInst_FUNC(ir)) {
case fcvts_op:
/* convert long to single precision real */
- rv.s = ieee754sp_flong(ctx->regs[MIPSInst_FS(ir)]);
+ rv.s = ieee754sp_flong(ctx->fpr[MIPSInst_FS(ir)]);
rfmt = s_fmt;
goto copcsr;
case fcvtd_op:
/* convert long to double precision real */
- rv.d = ieee754dp_flong(ctx->regs[MIPSInst_FS(ir)]);
+ rv.d = ieee754dp_flong(ctx->fpr[MIPSInst_FS(ir)]);
rfmt = d_fmt;
goto copcsr;
default:
@@ -1237,9 +1233,9 @@
* Note: cause exception bits do not accumulate, they are rewritten
* for each op; only the flag/sticky bits accumulate.
*/
- ctx->sr = (ctx->sr & ~FPU_CSR_ALL_X) | rcsr;
- if ((ctx->sr >> 5) & ctx->sr & FPU_CSR_ALL_E) {
- /*printk ("SIGFPE: fpu csr = %08x\n",ctx->sr); */
+ ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
+ if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
+ /*printk ("SIGFPE: fpu csr = %08x\n",ctx->fcr31); */
return SIGFPE;
}
@@ -1254,9 +1250,9 @@
cond = FPU_CSR_COND;
#endif
if (rv.w)
- ctx->sr |= cond;
+ ctx->fcr31 |= cond;
else
- ctx->sr &= ~cond;
+ ctx->fcr31 &= ~cond;
break;
}
#ifndef SINGLE_ONLY_FPU
@@ -1302,9 +1298,9 @@
else {
/* Update ieee754_csr. Only relevant if we have a
h/w FPU */
- ieee754_csr.nod = (ctx->sr & 0x1000000) != 0;
- ieee754_csr.rm = ieee_rm[ctx->sr & 0x3];
- ieee754_csr.cx = (ctx->sr >> 12) & 0x1f;
+ ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;
+ ieee754_csr.rm = ieee_rm[ctx->fcr31 & 0x3];
+ ieee754_csr.cx = (ctx->fcr31 >> 12) & 0x1f;
sig = cop1Emulate(xcp, ctx);
}
diff -Nru a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
--- a/arch/mips/math-emu/kernel_linkage.c Sun Aug 3 13:14:44 2003
+++ b/arch/mips/math-emu/kernel_linkage.c Sun Aug 3 13:14:44 2003
@@ -1,12 +1,7 @@
-/**************************************************************************
- *
- * arch/mips/math_emu/kernel_linkage.c
- *
+/*
* Kevin D. Kissell, kevink@mips and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -45,9 +40,9 @@
printk("Algorithmics/MIPS FPU Emulator v1.5\n");
}
- current->thread.fpu.soft.sr = 0;
+ current->thread.fpu.soft.fcr31 = 0;
for (i = 0; i < 32; i++) {
- current->thread.fpu.soft.regs[i] = SIGNALLING_NAN;
+ current->thread.fpu.soft.fpr[i] = SIGNALLING_NAN;
}
}
@@ -65,10 +60,10 @@
for (i = 0; i < 32; i++) {
err |=
- __put_user(current->thread.fpu.soft.regs[i],
+ __put_user(current->thread.fpu.soft.fpr[i],
&sc->sc_fpregs[i]);
}
- err |= __put_user(current->thread.fpu.soft.sr, &sc->sc_fpc_csr);
+ err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
return err;
@@ -81,12 +76,49 @@
for (i = 0; i < 32; i++) {
err |=
- __get_user(current->thread.fpu.soft.regs[i],
+ __get_user(current->thread.fpu.soft.fpr[i],
&sc->sc_fpregs[i]);
}
- err |= __get_user(current->thread.fpu.soft.sr, &sc->sc_fpc_csr);
+ err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
return err;
}
+#ifdef CONFIG_MIPS64
+/*
+ * This is the o32 version
+ */
+
+int fpu_emulator_save_context32(struct sigcontext32 *sc)
+{
+ int i;
+ int err = 0;
+
+ for (i = 0; i < 32; i+=2) {
+ err |=
+ __put_user(current->thread.fpu.soft.fpr[i],
+ &sc->sc_fpregs[i]);
+ }
+ err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+ err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
+
+ return err;
+}
+
+int fpu_emulator_restore_context32(struct sigcontext32 *sc)
+{
+ int i;
+ int err = 0;
+
+ for (i = 0; i < 32; i+=2) {
+ err |=
+ __get_user(current->thread.fpu.soft.fpr[i],
+ &sc->sc_fpregs[i]);
+ }
+ err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+ err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
+
+ return err;
+}
+#endif
diff -Nru a/arch/mips/mips-boards/sead/sead_time.c b/arch/mips/mips-boards/sead/sead_time.c
--- a/arch/mips/mips-boards/sead/sead_time.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/mips-boards/sead/sead_time.c Sun Aug 3 13:14:47 2003
@@ -68,7 +68,7 @@
irq_enter();
do {
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
do_timer(regs);
if ((timer_tick_count++ % HZ) == 0) {
@@ -84,8 +84,6 @@
- r4k_cur) < 0x7fffffff);
irq_exit();
- if (softirq_pending(cpu))
- do_softirq();
}
/*
diff -Nru a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
--- a/arch/mips/mm/Makefile Sun Aug 3 13:14:49 2003
+++ b/arch/mips/mm/Makefile Sun Aug 3 13:14:49 2003
@@ -2,26 +2,27 @@
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
-obj-y += cache.o extable.o init.o ioremap.o fault.o \
- pgtable.o loadmmu.o
+obj-y += cache.o extable.o fault.o loadmmu.o pgtable.o
+obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o
+obj-$(CONFIG_MIPS64) += pgtable-64.o
obj-$(CONFIG_HIGHMEM) += highmem.o
+obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o tlb-andes.o
obj-$(CONFIG_CPU_R3000) += pg-r3k.o c-r3k.o tlb-r3k.o tlbex-r3k.o
-obj-$(CONFIG_CPU_TX39XX) += pg-r3k.o c-tx39.o tlb-r3k.o tlbex-r3k.o
-obj-$(CONFIG_CPU_TX49XX) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R4300) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R4X00) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_VR41XX) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R5000) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R5432) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_RM7000) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R10000) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS32) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS64) += pg-r4k.o c-r4k.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_SB1) += c-sb1.o cex-sb1.o cerr-sb1.o pg-sb1.o \
- tlb-sb1.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \
+ tlb-sb1.o
+obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r3k.o tlb-r3k.o tlbex-r3k.o
+obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_RM7000) += sc-rm7k.o
obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
diff -Nru a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
--- a/arch/mips/mm/c-r4k.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/mm/c-r4k.c Sun Aug 3 13:14:52 2003
@@ -16,21 +16,17 @@
#include <asm/bcache.h>
#include <asm/bootinfo.h>
+#include <asm/cacheops.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/pgtable.h>
+#include <asm/r4kcache.h>
#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/war.h>
-/* Primary cache parameters. */
static unsigned long icache_size, dcache_size, scache_size;
-unsigned long icache_way_size, dcache_way_size, scache_way_size;
-static unsigned long scache_size;
-
-#include <asm/cacheops.h>
-#include <asm/r4kcache.h>
extern void andes_clear_page(void * page);
extern void r4k_clear_page32_d16(void * page);
@@ -677,7 +673,7 @@
unsigned long config1;
unsigned int lsize;
- switch (current_cpu_data.cputype) {
+ switch (c->cputype) {
case CPU_R4600: /* QED style two way caches? */
case CPU_R4700:
case CPU_R5000:
@@ -724,6 +720,7 @@
case CPU_R4400PC:
case CPU_R4400SC:
case CPU_R4400MC:
+ case CPU_R4300:
icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
c->icache.ways = 1;
@@ -846,8 +843,8 @@
panic("Improper R4000SC processor configuration detected");
/* compute a couple of other cache variables */
- icache_way_size = icache_size / c->icache.ways;
- dcache_way_size = dcache_size / c->dcache.ways;
+ c->icache.waysize = icache_size / c->icache.ways;
+ c->dcache.waysize = dcache_size / c->dcache.ways;
c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways);
c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways);
@@ -858,9 +855,8 @@
* normally they'd suffer from aliases but magic in the hardware deals
* with that for us so we don't need to take care ourselves.
*/
- if (current_cpu_data.cputype != CPU_R10000 &&
- current_cpu_data.cputype != CPU_R12000)
- if (dcache_way_size > PAGE_SIZE)
+ if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
+ if (c->dcache.waysize > PAGE_SIZE)
c->dcache.flags |= MIPS_CACHE_ALIASES;
if (config & 0x8) /* VI bit */
@@ -945,7 +941,6 @@
local_irq_restore(flags);
addr -= begin;
- c = ¤t_cpu_data;
scache_size = addr;
c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
c->scache.ways = 1;
@@ -988,17 +983,18 @@
static void __init setup_scache_funcs(void)
{
- if (current_cpu_data.dcache.linesz > current_cpu_data.scache.linesz)
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+
+ if (c->dcache.linesz > c->scache.linesz)
panic("Invalid primary cache configuration detected");
- if (current_cpu_data.cputype == CPU_R10000 ||
- current_cpu_data.cputype == CPU_R12000) {
+ if (c->cputype == CPU_R10000 || c->cputype == CPU_R12000) {
_clear_page = andes_clear_page;
_copy_page = andes_copy_page;
return;
}
- switch (current_cpu_data.scache.linesz) {
+ switch (c->scache.linesz) {
case 16:
_clear_page = r4k_clear_page_s16;
_copy_page = r4k_copy_page_s16;
@@ -1034,7 +1030,7 @@
* processors don't have a S-cache that would be relevant to the
* Linux memory managment.
*/
- switch (current_cpu_data.cputype) {
+ switch (c->cputype) {
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
@@ -1078,15 +1074,20 @@
return;
}
- if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32 ||
- current_cpu_data.isa_level == MIPS_CPU_ISA_M64) &&
- !(current_cpu_data.scache.flags & MIPS_CACHE_NOT_PRESENT))
+ if ((c->isa_level == MIPS_CPU_ISA_M32 ||
+ c->isa_level == MIPS_CPU_ISA_M64) &&
+ !(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
+ /* compute a couple of other cache variables */
+ c->scache.waysize = scache_size / c->scache.ways;
+
+ c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
+
printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n",
scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
- current_cpu_data.options |= MIPS_CPU_SUBSET_CACHES;
+ c->options |= MIPS_CPU_SUBSET_CACHES;
setup_scache_funcs();
}
@@ -1117,6 +1118,7 @@
void __init ld_mmu_r4xx0(void)
{
extern char except_vec2_generic;
+ struct cpuinfo_mips *c = ¤t_cpu_data;
/* Default cache error handler for R4000 and R5000 family */
memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
@@ -1126,18 +1128,17 @@
setup_scache();
coherency_setup();
- if (current_cpu_data.dcache.sets *
- current_cpu_data.dcache.ways > PAGE_SIZE)
- current_cpu_data.dcache.flags |= MIPS_CACHE_ALIASES;
+ if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
+ c->dcache.flags |= MIPS_CACHE_ALIASES;
/*
* Some MIPS32 and MIPS64 processors have physically indexed caches.
* This code supports virtually indexed processors and will be
* unnecessarily unefficient on physically indexed processors.
*/
- shm_align_mask = max_t(unsigned long,
- current_cpu_data.dcache.sets * current_cpu_data.dcache.linesz - 1,
- PAGE_SIZE - 1);
+ shm_align_mask = max_t( unsigned long,
+ c->dcache.sets * c->dcache.linesz - 1,
+ PAGE_SIZE - 1);
flush_cache_all = r4k_flush_cache_all;
__flush_cache_all = r4k___flush_cache_all;
diff -Nru a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
--- a/arch/mips/mm/c-sb1.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/mm/c-sb1.c Sun Aug 3 13:14:48 2003
@@ -25,8 +25,14 @@
#include <asm/cpu.h>
#include <asm/uaccess.h>
+#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
+extern void sb1_dma_init(void);
+extern void sb1_clear_page_dma(void * page);
+extern void sb1_copy_page_dma(void * to, void * from);
+#else
extern void sb1_clear_page(void * page);
extern void sb1_copy_page(void * to, void * from);
+#endif
/* These are probed at ld_mmu time */
static unsigned long icache_size;
@@ -47,23 +53,6 @@
static unsigned int icache_range_cutoff;
static unsigned int dcache_range_cutoff;
-void pgd_init(unsigned long page)
-{
- unsigned long *p = (unsigned long *) page;
- int i;
-
- for (i = 0; i < USER_PTRS_PER_PGD; i+=8) {
- p[i + 0] = (unsigned long) invalid_pte_table;
- p[i + 1] = (unsigned long) invalid_pte_table;
- p[i + 2] = (unsigned long) invalid_pte_table;
- p[i + 3] = (unsigned long) invalid_pte_table;
- p[i + 4] = (unsigned long) invalid_pte_table;
- p[i + 5] = (unsigned long) invalid_pte_table;
- p[i + 6] = (unsigned long) invalid_pte_table;
- p[i + 7] = (unsigned long) invalid_pte_table;
- }
-}
-
/*
* The dcache is fully coherent to the system, with one
* big caveat: the instruction stream. In other words,
@@ -77,28 +66,36 @@
* to flush it
*/
+#define cache_set_op(op, addr) \
+ __asm__ __volatile__( \
+ " .set noreorder \n" \
+ " .set mips64\n\t \n" \
+ " cache %0, (0<<13)(%1) \n" \
+ " cache %0, (1<<13)(%1) \n" \
+ " cache %0, (2<<13)(%1) \n" \
+ " cache %0, (3<<13)(%1) \n" \
+ " .set mips0 \n" \
+ " .set reorder" \
+ : \
+ : "i" (op), "r" (addr))
+
+#define sync() \
+ __asm__ __volatile( \
+ " .set mips64\n\t \n" \
+ " sync \n" \
+ " .set mips0")
+
/*
* Writeback and invalidate the entire dcache
*/
static inline void __sb1_writeback_inv_dcache_all(void)
{
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " move $1, $0 \n" /* Start at index 0 */
- "1: cache %2, 0($1) \n" /* Invalidate this index */
- " cache %2, (1<<13)($1)\n" /* Invalidate this index */
- " cache %2, (2<<13)($1)\n" /* Invalidate this index */
- " cache %2, (3<<13)($1)\n" /* Invalidate this index */
- " addiu %1, %1, -1 \n" /* Decrement loop count */
- " bnez %1, 1b \n" /* loop test */
- " addu $1, $1, %0 \n" /* Next address */
- ".set pop \n"
- :
- : "r" (dcache_line_size), "r" (dcache_sets),
- "i" (Index_Writeback_Inv_D));
+ unsigned long addr = 0;
+
+ while (addr < dcache_line_size * dcache_sets) {
+ cache_set_op(Index_Writeback_Inv_D, addr);
+ addr += dcache_line_size;
+ }
}
/*
@@ -110,32 +107,14 @@
static inline void __sb1_writeback_inv_dcache_range(unsigned long start,
unsigned long end)
{
- __asm__ __volatile__ (
- " .set push \n"
- " .set noreorder \n"
- " .set noat \n"
- " .set mips4 \n"
- " and $1, %0, %3 \n" /* mask non-index bits */
- "1: cache %4, (0<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-WB-inval this address */
- " xori $1, $1, 1<<12 \n" /* flip bit 12 (va/pa alias) */
- " cache %4, (0<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-WB-inval this address */
- " addu %0, %0, %2 \n" /* next line */
- " bne %0, %1, 1b \n" /* loop test */
- " and $1, %0, %3 \n" /* mask non-index bits */
- " sync \n"
- " .set pop \n"
- :
- : "r" (start & ~(dcache_line_size - 1)),
- "r" ((end + dcache_line_size - 1) & ~(dcache_line_size - 1)),
- "r" (dcache_line_size),
- "r" (dcache_index_mask),
- "i" (Index_Writeback_Inv_D));
+ start &= ~(dcache_line_size - 1);
+ end = (end + dcache_line_size - 1) & ~(dcache_line_size - 1);
+
+ while (start != end) {
+ cache_set_op(Index_Writeback_Inv_D, start);
+ cache_set_op(Index_Writeback_Inv_D, start ^ (1<<12));
+ start += dcache_line_size;
+ }
}
/*
@@ -146,27 +125,14 @@
static inline void __sb1_writeback_inv_dcache_phys_range(unsigned long start,
unsigned long end)
{
- __asm__ __volatile__ (
- " .set push \n"
- " .set noreorder \n"
- " .set noat \n"
- " .set mips4 \n"
- " and $1, %0, %3 \n" /* mask non-index bits */
- "1: cache %4, (0<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-WB-inval this address */
- " addu %0, %0, %2 \n" /* next line */
- " bne %0, %1, 1b \n" /* loop test */
- " and $1, %0, %3 \n" /* mask non-index bits */
- " sync \n"
- " .set pop \n"
- :
- : "r" (start & ~(dcache_line_size - 1)),
- "r" ((end + dcache_line_size - 1) & ~(dcache_line_size - 1)),
- "r" (dcache_line_size),
- "r" (dcache_index_mask),
- "i" (Index_Writeback_Inv_D));
+ start &= ~(dcache_line_size - 1);
+ end = (end + dcache_line_size - 1) & ~(dcache_line_size - 1);
+
+ while (start != end) {
+ cache_set_op(Index_Writeback_Inv_D, start & dcache_index_mask);
+ start += dcache_line_size;
+ }
+ sync();
}
@@ -175,26 +141,12 @@
*/
static inline void __sb1_flush_icache_all(void)
{
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " move $1, $0 \n" /* Start at index 0 */
- "1: cache %2, 0($1) \n" /* Invalidate this index */
- " cache %2, (1<<13)($1)\n" /* Invalidate this index */
- " cache %2, (2<<13)($1)\n" /* Invalidate this index */
- " cache %2, (3<<13)($1)\n" /* Invalidate this index */
- " addiu %1, %1, -1 \n" /* Decrement loop count */
- " bnez %1, 1b \n" /* loop test */
- " addu $1, $1, %0 \n" /* Next address */
- " bnezl $0, 2f \n" /* Force mispredict */
- " nop \n"
- "2: sync \n"
- ".set pop \n"
- :
- : "r" (icache_line_size), "r" (icache_sets),
- "i" (Index_Invalidate_I));
+ unsigned long addr = 0;
+
+ while (addr < icache_line_size * icache_sets) {
+ cache_set_op(Index_Invalidate_I, addr);
+ addr += icache_line_size;
+ }
}
/*
@@ -260,29 +212,19 @@
static inline void __sb1_flush_icache_range(unsigned long start,
unsigned long end)
{
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " and $1, %0, %3 \n" /* mask non-index bits */
- "1: cache %4, (0<<13)($1) \n" /* Index-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-inval this address */
- " addu %0, %0, %2 \n" /* next line */
- " bne %0, %1, 1b \n" /* loop test */
- " and $1, %0, %3 \n" /* mask non-index bits */
- " bnezl $0, 2f \n" /* Force mispredict */
- " nop \n"
- "2: sync \n"
- ".set pop \n"
- :
- : "r" (start & ~(icache_line_size - 1)),
- "r" ((end + icache_line_size - 1) & ~(icache_line_size - 1)),
- "r" (icache_line_size),
- "r" (icache_index_mask),
- "i" (Index_Invalidate_I));
+ start &= ~(icache_line_size - 1);
+ end = (end + icache_line_size - 1) & ~(icache_line_size - 1);
+
+ while (start != end) {
+ cache_set_op(Index_Invalidate_I, start & icache_index_mask);
+ start += icache_line_size;
+ }
+
+ __asm__ __volatile__(
+ " bnezl $0, 1f \n" /* Force mispredict */
+ "1: \n");
+
+ sync();
}
@@ -562,7 +504,6 @@
void ld_mmu_sb1(void)
{
extern char except_vec2_sb1;
- unsigned long temp;
/* Special cache error handler for SB1 */
memcpy((void *)(KSEG0 + 0x100), &except_vec2_sb1, 0x80);
@@ -570,8 +511,14 @@
probe_cache_sizes();
+#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
+ _clear_page = sb1_clear_page_dma;
+ _copy_page = sb1_copy_page_dma;
+ sb1_dma_init();
+#else
_clear_page = sb1_clear_page;
_copy_page = sb1_copy_page;
+#endif
/*
* None of these are needed for the SB1 - the Dcache is
@@ -595,17 +542,22 @@
__flush_cache_all = sb1___flush_cache_all;
change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
+
/*
* This is the only way to force the update of K0 to complete
* before subsequent instruction fetch.
*/
- __asm__ __volatile__ (
- " .set push \n"
- " .set mips4 \n"
- " la %0, 1f \n"
- " mtc0 %0, $14 \n"
- " eret \n"
- "1: .set pop \n"
- : "=r" (temp));
+ write_c0_epc(&&here);
+here:
+ __asm__ __volatile__(
+ " .set noreorder \n"
+ " .set mips3\n\t \n"
+ " eret \n"
+ " .set mips0\n\t \n"
+ " .set reorder"
+ :
+ :
+ : "memory");
+
flush_cache_all();
}
diff -Nru a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
--- a/arch/mips/mm/c-tx39.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/mm/c-tx39.c Sun Aug 3 13:14:53 2003
@@ -25,9 +25,6 @@
/* For R3000 cores with R4000 style caches */
static unsigned long icache_size, dcache_size; /* Size in bytes */
-static unsigned long icache_way_size, dcache_way_size; /* Size divided by ways */
-#define scache_size 0
-#define scache_way_size 0
#include <asm/r4kcache.h>
@@ -474,15 +471,15 @@
break;
}
- icache_way_size = icache_size / current_cpu_data.icache.ways;
- dcache_way_size = dcache_size / current_cpu_data.dcache.ways;
+ current_cpu_data.icache.waysize = icache_size / current_cpu_data.icache.ways;
+ current_cpu_data.dcache.waysize = dcache_size / current_cpu_data.dcache.ways;
current_cpu_data.icache.sets =
- icache_way_size / current_cpu_data.icache.linesz;
+ current_cpu_data.icache.waysize / current_cpu_data.icache.linesz;
current_cpu_data.dcache.sets =
- dcache_way_size / current_cpu_data.dcache.linesz;
+ current_cpu_data.dcache.waysize / current_cpu_data.dcache.linesz;
- if (dcache_way_size > PAGE_SIZE)
+ if (current_cpu_data.dcache.waysize > PAGE_SIZE)
current_cpu_data.dcache.flags |= MIPS_CACHE_ALIASES;
current_cpu_data.icache.waybit = 0;
diff -Nru a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
--- a/arch/mips/mm/cache.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/mm/cache.c Sun Aug 3 13:14:47 2003
@@ -6,6 +6,7 @@
* Copyright (C) 1994 - 2003 by Ralf Baechle
*/
#include <linux/kernel.h>
+#include <linux/module.h>
#include <linux/sched.h>
#include <linux/mm.h>
@@ -58,3 +59,5 @@
ClearPageDcacheDirty(page);
}
}
+
+EXPORT_SYMBOL(flush_dcache_page);
diff -Nru a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
--- a/arch/mips/mm/cerr-sb1.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/mm/cerr-sb1.c Sun Aug 3 13:14:51 2003
@@ -24,7 +24,6 @@
#include <asm/io.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
-#include <asm/sibyte/64bit.h>
#endif
/* SB1 definitions */
@@ -186,11 +185,11 @@
"=r" (dpahi), "=r" (dpalo), "=r" (eepc));
cerr_dpa = (((uint64_t)dpahi) << 32) | dpalo;
- prom_printf(" cp0_errorepc == %08x\n", eepc);
- prom_printf(" cp0_errctl == %08x", errctl);
+ prom_printf(" c0_errorepc == %08x\n", eepc);
+ prom_printf(" c0_errctl == %08x", errctl);
breakout_errctl(errctl);
if (errctl & CP0_ERRCTL_ICACHE) {
- prom_printf(" cp0_cerr_i == %08x", cerr_i);
+ prom_printf(" c0_cerr_i == %08x", cerr_i);
breakout_cerri(cerr_i);
if (CP0_CERRI_IDX_VALID(cerr_i)) {
if ((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK))
@@ -204,10 +203,10 @@
}
}
if (errctl & CP0_ERRCTL_DCACHE) {
- prom_printf(" cp0_cerr_d == %08x", cerr_d);
+ prom_printf(" c0_cerr_d == %08x", cerr_d);
breakout_cerrd(cerr_d);
if (CP0_CERRD_DPA_VALID(cerr_d)) {
- prom_printf(" cp0_cerr_dpa == %010llx\n", cerr_dpa);
+ prom_printf(" c0_cerr_dpa == %010llx\n", cerr_dpa);
if (!CP0_CERRD_IDX_VALID(cerr_d)) {
res = extract_dc(cerr_dpa & SB1_CACHE_INDEX_MASK,
(cerr_d & CP0_CERRD_DATA) != 0);
diff -Nru a/arch/mips/mm/cex-gen.S b/arch/mips/mm/cex-gen.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm/cex-gen.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,42 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995 - 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ *
+ * Cache error handler
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+
+/*
+ * Game over. Go to the button. Press gently. Swear where allowed by
+ * legislation.
+ */
+ LEAF(except_vec2_generic)
+ .set noreorder
+ .set noat
+ .set mips0
+ /*
+ * This is a very bad place to be. Our cache error
+ * detection has triggered. If we have write-back data
+ * in the cache, we may not be able to recover. As a
+ * first-order desperate measure, turn off KSEG0 cacheing.
+ */
+ mfc0 k0,CP0_CONFIG
+ li k1,~CONF_CM_CMASK
+ and k0,k0,k1
+ ori k0,k0,CONF_CM_UNCACHED
+ mtc0 k0,CP0_CONFIG
+ /* Give it a few cycles to sink in... */
+ nop
+ nop
+ nop
+
+ j cache_parity_error
+ nop
+ END(except_vec2_generic)
diff -Nru a/arch/mips/mm/cex-sb1.S b/arch/mips/mm/cex-sb1.S
--- a/arch/mips/mm/cex-sb1.S Sun Aug 3 13:14:44 2003
+++ b/arch/mips/mm/cex-sb1.S Sun Aug 3 13:14:44 2003
@@ -75,9 +75,7 @@
mfc0 k0, CP0_STATUS
sll k0, k0, 3 # check CU0 (kernel?)
bltz k0, 2f
- GET_SAVED_SP
- move sp, k0 # want Kseg SP (so uncached)
-2:
- j sb1_cache_error
+ get_saved_sp
+2: j sb1_cache_error
END(handle_vec2_sb1)
diff -Nru a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
--- a/arch/mips/mm/fault.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/mm/fault.c Sun Aug 3 13:14:46 2003
@@ -38,31 +38,6 @@
#define dpf_reg(r) (regs->regs[r])
/*
- * Unlock any spinlocks which will prevent us from getting the out
- */
-void bust_spinlocks(int yes)
-{
- int loglevel_save = console_loglevel;
-
- if (yes) {
- oops_in_progress = 1;
- return;
- }
-#ifdef CONFIG_VT
- unblank_screen();
-#endif
- oops_in_progress = 0;
- /*
- * OK, the message is on the console. Now we call printk()
- * without oops_in_progress set so that printk will give klogd
- * a poke. Hold onto your hats...
- */
- console_loglevel = 15; /* NMI oopser may have shut the console up */
- printk(" ");
- console_loglevel = loglevel_save;
-}
-
-/*
* This routine handles page faults. It determines the address,
* and the problem, and then passes it off to one of the appropriate
* routines.
@@ -74,11 +49,13 @@
struct task_struct *tsk = current;
struct mm_struct *mm = tsk->mm;
const struct exception_table_entry *fixup;
+ const int szlong = sizeof(unsigned long);
siginfo_t info;
#if 0
- printk("Cpu%d[%s:%d:%08lx:%ld:%08lx]\n", smp_processor_id(),
- current->comm, current->pid, address, write, regs->cp0_epc);
+ printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", smp_processor_id(),
+ current->comm, current->pid, szlong, address, write,
+ szlong, regs->cp0_epc);
#endif
/*
@@ -162,13 +139,13 @@
tsk->thread.cp0_badvaddr = address;
tsk->thread.error_code = write;
#if 0
- printk("do_page_fault() #2: sending SIGSEGV to %s for invalid %s\n"
- "%08lx (epc == %08lx, ra == %08lx)\n",
+ printk("do_page_fault() #2: sending SIGSEGV to %s for "
+ "invalid %s\n%0*lx (epc == %0*lx, ra == %0*lx)\n",
tsk->comm,
write ? "write access to" : "read access from",
- address,
- (unsigned long) regs->cp0_epc,
- (unsigned long) regs->regs[31]);
+ szlong, address,
+ szlong, (unsigned long) regs->cp0_epc,
+ szlong, (unsigned long) regs->regs[31]);
#endif
info.si_signo = SIGSEGV;
info.si_errno = 0;
@@ -199,9 +176,10 @@
bust_spinlocks(1);
- printk(KERN_ALERT "Unable to handle kernel paging request at virtual "
- "address %08lx, epc == %08lx, ra == %08lx\n",
- address, regs->cp0_epc, regs->regs[31]);
+ printk(KERN_ALERT "CPU %d Unable to handle kernel paging request at "
+ "virtual address %0*lx, epc == %0*lx, ra == %0*lx\n",
+ smp_processor_id(), szlong, address, szlong, regs->cp0_epc,
+ szlong, regs->regs[31]);
die("Oops", regs);
/*
diff -Nru a/arch/mips/mm/init.c b/arch/mips/mm/init.c
--- a/arch/mips/mm/init.c Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,321 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2000 by Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- *
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/pagemap.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/swap.h>
-#include <linux/blkdev.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cacheflush.h>
-#include <asm/cachectl.h>
-#include <asm/cpu.h>
-#include <asm/dma.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/sections.h>
-#include <asm/tlb.h>
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-unsigned long highstart_pfn, highend_pfn;
-static unsigned long totalram_pages;
-static unsigned long totalhigh_pages;
-
-/*
- * We have upto 8 empty zeroed pages so we can map one of the right colour
- * when needed. This is necessary only on R4000 / R4400 SC and MC versions
- * where we have to avoid VCED / VECI exceptions for good performance at
- * any price. Since page is never written to after the initialization we
- * don't have to care about aliases on other CPUs.
- */
-unsigned long empty_zero_page, zero_page_mask;
-
-static inline unsigned long setup_zero_pages(void)
-{
- unsigned long order, size;
- struct page *page;
-
- if (cpu_has_vce)
- order = 3;
- else
- order = 0;
-
- empty_zero_page = __get_free_pages(GFP_KERNEL, order);
- if (!empty_zero_page)
- panic("Oh boy, that early out of memory?");
-
- page = virt_to_page(empty_zero_page);
- while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
- set_bit(PG_reserved, &page->flags);
- set_page_count(page, 0);
- page++;
- }
-
- size = PAGE_SIZE << order;
- zero_page_mask = (size - 1) & PAGE_MASK;
- memset((void *)empty_zero_page, 0, size);
-
- return 1UL << order;
-}
-
-#ifdef CONFIG_HIGHMEM
-pte_t *kmap_pte;
-pgprot_t kmap_prot;
-
-#define kmap_get_fixmap_pte(vaddr) \
- pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr))
-
-static void __init kmap_init(void)
-{
- unsigned long kmap_vstart;
-
- /* cache the first kmap pte */
- kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
- kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
-
- kmap_prot = PAGE_KERNEL;
-}
-
-#endif /* CONFIG_HIGHMEM */
-
-#ifdef CONFIG_HIGHMEM
-static void __init fixrange_init (unsigned long start, unsigned long end,
- pgd_t *pgd_base)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- int i, j;
- unsigned long vaddr;
-
- vaddr = start;
- i = __pgd_offset(vaddr);
- j = __pmd_offset(vaddr);
- pgd = pgd_base + i;
-
- for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
- pmd = (pmd_t *)pgd;
- for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
- if (pmd_none(*pmd)) {
- pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
- set_pmd(pmd, __pmd(pte));
- if (pte != pte_offset_kernel(pmd, 0))
- BUG();
- }
- vaddr += PMD_SIZE;
- }
- j = 0;
- }
-}
-#endif
-
-void __init pagetable_init(void)
-{
-#ifdef CONFIG_HIGHMEM
- unsigned long vaddr;
- pgd_t *pgd, *pgd_base;
- pmd_t *pmd;
- pte_t *pte;
-#endif
-
- /* Initialize the entire pgd. */
- pgd_init((unsigned long)swapper_pg_dir);
- pgd_init((unsigned long)swapper_pg_dir +
- sizeof(pgd_t ) * USER_PTRS_PER_PGD);
-
-#ifdef CONFIG_HIGHMEM
- pgd_base = swapper_pg_dir;
-
- /*
- * Fixed mappings:
- */
- vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
- fixrange_init(vaddr, 0, pgd_base);
-
- /*
- * Permanent kmaps:
- */
- vaddr = PKMAP_BASE;
- fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base);
-
- pgd = swapper_pg_dir + __pgd_offset(vaddr);
- pmd = pmd_offset(pgd, vaddr);
- pte = pte_offset_kernel(pmd, vaddr);
- pkmap_page_table = pte;
-#endif
-}
-
-void __init paging_init(void)
-{
- unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
- unsigned long max_dma, high, low;
-
- pagetable_init();
-
-#ifdef CONFIG_HIGHMEM
- kmap_init();
-#endif
-
- max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
- low = max_low_pfn;
- high = highend_pfn;
-
-#ifdef CONFIG_ISA
- if (low < max_dma)
- zones_size[ZONE_DMA] = low;
- else {
- zones_size[ZONE_DMA] = max_dma;
- zones_size[ZONE_NORMAL] = low - max_dma;
- }
-#else
- zones_size[ZONE_DMA] = low;
-#endif
-#ifdef CONFIG_HIGHMEM
- zones_size[ZONE_HIGHMEM] = high - low;
-#endif
-
- free_area_init(zones_size);
-}
-
-#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
-#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
-
-static inline int page_is_ram(unsigned long pagenr)
-{
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- unsigned long addr, end;
-
- if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
- /* not usable memory */
- continue;
-
- addr = PFN_UP(boot_mem_map.map[i].addr);
- end = PFN_DOWN(boot_mem_map.map[i].addr
- + boot_mem_map.map[i].size);
-
- if (pagenr >= addr && pagenr < end)
- return 1;
- }
-
- return 0;
-}
-
-void __init mem_init(void)
-{
- unsigned long codesize, reservedpages, datasize, initsize;
- unsigned long tmp, ram;
-
-#ifdef CONFIG_HIGHMEM
- highstart_pfn = (KSEG1 - KSEG0) >> PAGE_SHIFT;
- highmem_start_page = mem_map + highstart_pfn;
-#ifdef CONFIG_DISCONTIGMEM
-#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
-#endif
- max_mapnr = num_physpages = highend_pfn;
-#else
- max_mapnr = num_physpages = max_low_pfn;
-#endif
- high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
-
- totalram_pages += free_all_bootmem();
- totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
-
- reservedpages = ram = 0;
- for (tmp = 0; tmp < max_low_pfn; tmp++)
- if (page_is_ram(tmp)) {
- ram++;
- if (PageReserved(mem_map+tmp))
- reservedpages++;
- }
-
-#ifdef CONFIG_HIGHMEM
- for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
- struct page *page = mem_map + tmp;
-
- if (!page_is_ram(tmp)) {
- SetPageReserved(page);
- continue;
- }
- ClearPageReserved(page);
- set_bit(PG_highmem, &page->flags);
- atomic_set(&page->count, 1);
- __free_page(page);
- totalhigh_pages++;
- }
- totalram_pages += totalhigh_pages;
-#endif
-
- codesize = (unsigned long) &_etext - (unsigned long) &_text;
- datasize = (unsigned long) &_edata - (unsigned long) &_etext;
- initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
-
- printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
- "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
- (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
- ram << (PAGE_SHIFT-10),
- codesize >> 10,
- reservedpages << (PAGE_SHIFT-10),
- datasize >> 10,
- initsize >> 10,
- (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
-}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
- if (start < end)
- printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
- (end - start) >> 10);
-
- for (; start < end; start += PAGE_SIZE) {
- ClearPageReserved(virt_to_page(start));
- set_page_count(virt_to_page(start), 1);
- free_page(start);
- totalram_pages++;
- }
-}
-#endif
-
-extern char __init_begin, __init_end;
-extern void prom_free_prom_memory(void) __init;
-
-void free_initmem(void)
-{
- unsigned long addr;
-
- prom_free_prom_memory ();
-
- addr = (unsigned long) &__init_begin;
- while (addr < (unsigned long) &__init_end) {
- ClearPageReserved(virt_to_page(addr));
- set_page_count(virt_to_page(addr), 1);
- free_page(addr);
- totalram_pages++;
- addr += PAGE_SIZE;
- }
- printk(KERN_INFO "Freeing unused kernel memory: %dk freed\n",
- (&__init_end - &__init_begin) >> 10);
-}
diff -Nru a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
--- a/arch/mips/mm/ioremap.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/mm/ioremap.c Sun Aug 3 13:14:48 2003
@@ -172,7 +172,7 @@
#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
-void iounmap(void *addr)
+void __iounmap(void *addr)
{
struct vm_struct *p;
@@ -190,4 +190,4 @@
}
EXPORT_SYMBOL(__ioremap);
-EXPORT_SYMBOL(iounmap);
+EXPORT_SYMBOL(__iounmap);
diff -Nru a/arch/mips/mm/pg-r3k.c b/arch/mips/mm/pg-r3k.c
--- a/arch/mips/mm/pg-r3k.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/mm/pg-r3k.c Sun Aug 3 13:14:48 2003
@@ -79,33 +79,3 @@
: "0" (to), "1" (from),
"I" (PAGE_SIZE));
}
-
-/*
- * Initialize new page directory with pointers to invalid ptes
- */
-void pgd_init(unsigned long page)
-{
- unsigned long dummy1, dummy2;
-
- /*
- * The plain and boring version for the R3000. No cache flushing
- * stuff is implemented since the R3000 has physical caches.
- */
- __asm__ __volatile__(
- ".set\tnoreorder\n"
- "1:\tsw\t%2, (%0)\n\t"
- "sw\t%2, 4(%0)\n\t"
- "sw\t%2, 8(%0)\n\t"
- "sw\t%2, 12(%0)\n\t"
- "sw\t%2, 16(%0)\n\t"
- "sw\t%2, 20(%0)\n\t"
- "sw\t%2, 24(%0)\n\t"
- "sw\t%2, 28(%0)\n\t"
- "subu\t%1, 1\n\t"
- "bnez\t%1, 1b\n\t"
- "addiu\t%0, 32\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2)
- :"r" ((unsigned long) invalid_pte_table), "0" (page),
- "1" (USER_PTRS_PER_PGD / 8));
-}
diff -Nru a/arch/mips/mm/pg-r4k.S b/arch/mips/mm/pg-r4k.S
--- a/arch/mips/mm/pg-r4k.S Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,803 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
- */
-#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/cacheops.h>
-#include <asm/mipsregs.h>
-#include <asm/offset.h>
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PGD_SIZE 0x2000
-#else
-#define PGD_SIZE 0x1000
-#endif
-
- .text
- .set noat
-
-/*
- * Zero an entire page. Basically a simple unrolled loop should do the
- * job but we want more performance by saving memory bus bandwidth. We
- * have five flavours of the routine available for:
- *
- * - 16byte cachelines and no second level cache
- * - 32byte cachelines second level cache
- * - a version which handles the buggy R4600 v1.x
- * - a version which handles the buggy R4600 v2.0
- * - Finally a last version without fancy cache games for the SC and MC
- * versions of R4000 and R4400.
- */
-
-LEAF(r4k_clear_page32_d16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sw zero, (a0)
- sw zero, 4(a0)
- sw zero, 8(a0)
- sw zero, 12(a0)
- addiu a0, 32
- cache Create_Dirty_Excl_D, -16(a0)
- sw zero, -16(a0)
- sw zero, -12(a0)
- sw zero, -8(a0)
- sw zero, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page32_d16)
-
-LEAF(r4k_clear_page32_d32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sw zero, (a0)
- sw zero, 4(a0)
- sw zero, 8(a0)
- sw zero, 12(a0)
- addiu a0, 32
- sw zero, -16(a0)
- sw zero, -12(a0)
- sw zero, -8(a0)
- sw zero, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page32_d32)
-
-LEAF(r4k_clear_page_d16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- cache Create_Dirty_Excl_D, 16(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- cache Create_Dirty_Excl_D, -16(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_d16)
-
-LEAF(r4k_clear_page_d32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_d32)
-
-/*
- * This flavour of r4k_clear_page is for the R4600 V1.x. Cite from the
- * IDT R4600 V1.7 errata:
- *
- * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
- * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
- * executed if there is no other dcache activity. If the dcache is
- * accessed for another instruction immeidately preceding when these
- * cache instructions are executing, it is possible that the dcache
- * tag match outputs used by these cache instructions will be
- * incorrect. These cache instructions should be preceded by at least
- * four instructions that are not any kind of load or store
- * instruction.
- *
- * This is not allowed: lw
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- *
- * This is allowed: lw
- * nop
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- */
-
-LEAF(r4k_clear_page_r4600_v1)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_r4600_v1)
-
-LEAF(r4k_clear_page_r4600_v2)
- .set mips3
- mfc0 a1, CP0_STATUS
- ori AT, a1, 1
- xori AT, 1
- mtc0 AT, CP0_STATUS
- nop
- nop
- nop
-
- .set volatile
- la AT, KSEG1
- lw zero, (AT)
- .set novolatile
-
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
-
- mfc0 AT, CP0_STATUS # local_irq_restore
- andi a1, 1
- ori AT, 1
- xori AT, 1
- or a1, AT
- mtc0 a1, CP0_STATUS
- nop
- nop
- nop
-
- jr ra
- END(r4k_clear_page_r4600_v2)
-
-/*
- * The next 4 versions are optimized for all possible scache configurations
- * of the SC / MC versions of R4000 and R4400 ...
- *
- * Todo: For even better performance we should have a routine optimized for
- * every legal combination of dcache / scache linesize. When I (Ralf) tried
- * this the kernel crashed shortly after mounting the root filesystem. CPU
- * bug? Weirdo cache instruction semantics?
- */
-
-LEAF(r4k_clear_page_s16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- cache Create_Dirty_Excl_SD, 16(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_SD, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- cache Create_Dirty_Excl_SD, -16(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s16)
-
-LEAF(r4k_clear_page_s32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_SD, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s32)
-
-LEAF(r4k_clear_page_s64)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s64)
-
-LEAF(r4k_clear_page_s128)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- sd zero, 32(a0)
- sd zero, 40(a0)
- sd zero, 48(a0)
- sd zero, 56(a0)
- addiu a0, 128
- sd zero, -64(a0)
- sd zero, -56(a0)
- sd zero, -48(a0)
- sd zero, -40(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s128)
-
-/*
- * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
- * with 64-bit kernels. The prefetch offsets have been experimentally tuned
- * an Origin 200.
- */
-LEAF(andes_clear_page)
- .set mips4
- LONG_ADDIU AT, a0, _PAGE_SIZE
-1: pref 7, 512(a0)
- sd zero, 0*SZREG(a0)
- sd zero, 1*SZREG(a0)
- sd zero, 2*SZREG(a0)
- sd zero, 3*SZREG(a0)
- LONG_ADDIU a0, a0, 8*SZREG
- sd zero, -4*SZREG(a0)
- sd zero, -3*SZREG(a0)
- sd zero, -2*SZREG(a0)
- sd zero, -1*SZREG(a0)
- bne AT, a0, 1b
- j ra
- END(andes_clear_page)
- .set mips0
-
-/*
- * This is still inefficient. We only can do better if we know the
- * virtual address where the copy will be accessed.
- */
-
-LEAF(r4k_copy_page_d16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- cache Create_Dirty_Excl_D, 16(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- cache Create_Dirty_Excl_D, -16(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_d16)
-
-LEAF(r4k_copy_page_d32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_d32)
-
-/*
- * Again a special version for the R4600 V1.x
- */
-
-LEAF(r4k_copy_page_r4600_v1)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_r4600_v1)
-
-LEAF(r4k_copy_page_r4600_v2)
- .set mips3
- mfc0 v1, CP0_STATUS
- ori AT, v1, 1
- xori AT, 1
-
- mtc0 AT, CP0_STATUS
- nop
- nop
- nop
-
- addiu AT, a0, _PAGE_SIZE
-1: nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, (a0)
- lw t1, (a1)
- lw t0, 4(a1)
- lw a3, 8(a1)
- lw a2, 12(a1)
- sw t1, (a0)
- sw t0, 4(a0)
- sw a3, 8(a0)
- sw a2, 12(a0)
- lw t1, 16(a1)
- lw t0, 20(a1)
- lw a3, 24(a1)
- lw a2, 28(a1)
- sw t1, 16(a0)
- sw t0, 20(a0)
- sw a3, 24(a0)
- sw a2, 28(a0)
- nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw t1, -32(a1)
- lw t0, -28(a1)
- lw a3, -24(a1)
- lw a2, -20(a1)
- sw t1, -32(a0)
- sw t0, -28(a0)
- sw a3, -24(a0)
- sw a2, -20(a0)
- lw t1, -16(a1)
- lw t0, -12(a1)
- lw a3, -8(a1)
- lw a2, -4(a1)
- sw t1, -16(a0)
- sw t0, -12(a0)
- sw a3, -8(a0)
- sw a2, -4(a0)
- bne AT, a0, 1b
-
- mfc0 AT, CP0_STATUS # local_irq_restore
- andi v1, 1
- ori AT, 1
- xori AT, 1
- or v1, AT
- mtc0 v1, CP0_STATUS
- nop
- nop
- nop
- jr ra
- END(r4k_copy_page_r4600_v2)
-
-/*
- * These are for R4000SC / R4400MC
- */
-
-LEAF(r4k_copy_page_s16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- cache Create_Dirty_Excl_SD, 16(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_SD, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- cache Create_Dirty_Excl_SD, -16(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s16)
-
-LEAF(r4k_copy_page_s32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_SD, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s32)
-
-LEAF(r4k_copy_page_s64)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s64)
-
-LEAF(r4k_copy_page_s128)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- lw a3, 32(a1)
- lw a2, 36(a1)
- lw v1, 40(a1)
- lw v0, 44(a1)
- sw a3, 32(a0)
- sw a2, 36(a0)
- sw v1, 40(a0)
- sw v0, 44(a0)
- lw a3, 48(a1)
- lw a2, 52(a1)
- lw v1, 56(a1)
- lw v0, 60(a1)
- sw a3, 48(a0)
- sw a2, 52(a0)
- sw v1, 56(a0)
- sw v0, 60(a0)
- addiu a0, 128
- addiu a1, 128
- lw a3, -64(a1)
- lw a2, -60(a1)
- lw v1, -56(a1)
- lw v0, -52(a1)
- sw a3, -64(a0)
- sw a2, -60(a0)
- sw v1, -56(a0)
- sw v0, -52(a0)
- lw a3, -48(a1)
- lw a2, -44(a1)
- lw v1, -40(a1)
- lw v0, -36(a1)
- sw a3, -48(a0)
- sw a2, -44(a0)
- sw v1, -40(a0)
- sw v0, -36(a0)
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s128)
-
-
- .text
- .set mips4
- .set noat
-
-
-/*
- * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
- * with 64-bit kernels. The prefetch offsets have been experimentally tuned
- * an Origin 200.
- */
-LEAF(andes_copy_page)
- .set mips4
- LONG_ADDIU AT, a0, _PAGE_SIZE
-1: pref 0, 2*128(a1)
- pref 1, 2*128(a0)
- LONG_L a3, 0*SZREG(a1)
- LONG_L a2, 1*SZREG(a1)
- LONG_L v1, 2*SZREG(a1)
- LONG_L v0, 3*SZREG(a1)
- LONG_S a3, 0*SZREG(a0)
- LONG_S a2, 1*SZREG(a0)
- LONG_S v1, 2*SZREG(a0)
- LONG_S v0, 3*SZREG(a0)
- LONG_ADDIU a0, a0, 8*SZREG
- LONG_ADDIU a1, a1, 8*SZREG
- LONG_L a3, -4*SZREG(a1)
- LONG_L a2, -3*SZREG(a1)
- LONG_L v1, -2*SZREG(a1)
- LONG_L v0, -1*SZREG(a1)
- LONG_S a3, -4*SZREG(a0)
- LONG_S a2, -3*SZREG(a0)
- LONG_S v1, -2*SZREG(a0)
- LONG_S v0, -1*SZREG(a0)
- bne AT, a0,1b
- j ra
- END(andes_copy_page)
- .set mips0
-
-/* This one still needs to receive cache optimizations */
-LEAF(pgd_init)
- .set mips0
- addiu AT, a0, PGD_SIZE / 2
- la v0, invalid_pte_table
-1: sw v0, (a0)
- sw v0, 4(a0)
- sw v0, 8(a0)
- sw v0, 12(a0)
- addiu a0, 32
- sw v0, -16(a0)
- sw v0, -12(a0)
- sw v0, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(pgd_init)
diff -Nru a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
--- a/arch/mips/mm/pg-sb1.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/mm/pg-sb1.c Sun Aug 3 13:14:53 2003
@@ -1,9 +1,10 @@
/*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000 Sibyte
+ * Copyright (C) 2000 SiByte, Inc.
*
- * Written by Justin Carlson (carlson@sibyte.com)
+ * Written by Justin Carlson of SiByte, Inc.
+ * and Kip Walker of Broadcom Corp.
*
*
* This program is free software; you can redistribute it and/or
@@ -21,7 +22,13 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <linux/config.h>
-#include <asm/page.h>
+#include <linux/sched.h>
+#include <linux/smp.h>
+
+#include <asm/io.h>
+#include <asm/sibyte/sb1250.h>
+#include <asm/sibyte/sb1250_regs.h>
+#include <asm/sibyte/sb1250_dma.h>
#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
#define SB1_PREF_LOAD_STREAMED_HINT "0"
@@ -34,6 +41,9 @@
/* These are the functions hooked by the memory management function pointers */
void sb1_clear_page(void *page)
{
+ unsigned char *addr = (unsigned char *) page;
+ unsigned char *end = addr + PAGE_SIZE;
+
/*
* JDCXXX - This should be bottlenecked by the write buffer, but these
* things tend to be mildly unpredictable...should check this on the
@@ -43,36 +53,35 @@
* since we know we're on an SB1, we force the assembler to take
* 64-bit operands to speed things up
*/
- __asm__ __volatile__(
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " addiu $1, %0, %2 \n" /* Calculate the end of the page to clear */
+ do {
+ __asm__ __volatile__(
+ " .set mips4 \n"
#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 4 lines */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%0) \n"
-#endif
- "1: sd $0, 0(%0) \n" /* Throw out a cacheline of 0's */
- " sd $0, 8(%0) \n"
- " sd $0, 16(%0) \n"
- " sd $0, 24(%0) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 4 lines */
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%0) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%0) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%0) \n"
+#endif
+ "1: sd $0, 0(%0) \n" /* Throw out a cacheline of 0's */
+ " sd $0, 8(%0) \n"
+ " sd $0, 16(%0) \n"
+ " sd $0, 24(%0) \n"
#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_STORE_STREAMED_HINT ",128(%0) \n" /* Prefetch 4 lines ahead */
+ " pref " SB1_PREF_STORE_STREAMED_HINT ",128(%0) \n" /* Prefetch 4 lines ahead */
#endif
- " bne $1, %0, 1b \n"
- " addiu %0, %0, 32 \n" /* Next cacheline (This instruction better be short piped!) */
- ".set pop \n"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE-32)
+ " .set mips0 \n"
+ :
+ : "r" (addr)
: "memory");
-
+ addr += 32;
+ } while (addr != end);
}
void sb1_copy_page(void *to, void *from)
{
+ unsigned char *src = from;
+ unsigned char *dst = to;
+ unsigned char *end = src + PAGE_SIZE;
/*
* This should be optimized in assembly...can't use ld/sd, though,
@@ -86,47 +95,117 @@
* performance data to back this up
*/
- __asm__ __volatile__(
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " addiu $1, %0, %4 \n" /* Calculate the end of the page to copy */
+ do {
+ __asm__ __volatile__(
+ " .set mips4 \n"
#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 3 lines */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%1) \n"
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 32(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%1) \n"
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 64(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%1) \n"
-#endif
- "1: lw $2, 0(%0) \n" /* Block copy a cacheline */
- " lw $3, 4(%0) \n"
- " lw $4, 8(%0) \n"
- " lw $5, 12(%0) \n"
- " lw $6, 16(%0) \n"
- " lw $7, 20(%0) \n"
- " lw $8, 24(%0) \n"
- " lw $9, 28(%0) \n"
+ " pref " SB1_PREF_LOAD_STREAMED_HINT ", 0(%0)\n" /* Prefetch the first 3 lines */
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%1)\n"
+ " pref " SB1_PREF_LOAD_STREAMED_HINT ", 32(%0)\n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%1)\n"
+ " pref " SB1_PREF_LOAD_STREAMED_HINT ", 64(%0)\n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%1)\n"
+#endif
+ "1: lw $2, 0(%0) \n" /* Block copy a cacheline */
+ " lw $3, 4(%0) \n"
+ " lw $4, 8(%0) \n"
+ " lw $5, 12(%0) \n"
+ " lw $6, 16(%0) \n"
+ " lw $7, 20(%0) \n"
+ " lw $8, 24(%0) \n"
+ " lw $9, 28(%0) \n"
#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 96(%0) \n" /* Prefetch ahead */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%1) \n"
+ " pref " SB1_PREF_LOAD_STREAMED_HINT ", 96(%0) \n" /* Prefetch ahead */
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%1) \n"
#endif
- " sw $2, 0(%1) \n"
- " sw $3, 4(%1) \n"
- " sw $4, 8(%1) \n"
- " sw $5, 12(%1) \n"
- " sw $6, 16(%1) \n"
- " sw $7, 20(%1) \n"
- " sw $8, 24(%1) \n"
- " sw $9, 28(%1) \n"
- " addiu %1, %1, 32 \n" /* Next cacheline */
- " nop \n" /* Force next add to short pipe */
- " nop \n" /* Force next add to short pipe */
- " bne $1, %0, 1b \n"
- " addiu %0, %0, 32 \n" /* Next cacheline */
- ".set pop \n"
- : "=r" (to), "=r" (from)
- : "0" (from), "1" (to), "I" (PAGE_SIZE-32)
+ " sw $2, 0(%1) \n"
+ " sw $3, 4(%1) \n"
+ " sw $4, 8(%1) \n"
+ " sw $5, 12(%1) \n"
+ " sw $6, 16(%1) \n"
+ " sw $7, 20(%1) \n"
+ " sw $8, 24(%1) \n"
+ " sw $9, 28(%1) \n"
+ " .set mips0 \n"
+ :
+ : "r" (src), "r" (dst)
: "$2","$3","$4","$5","$6","$7","$8","$9","memory");
+ src += 32;
+ dst += 32;
+ } while (src != end);
}
+
+
+#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
+
+/*
+ * Pad descriptors to cacheline, since each is exclusively owned by a
+ * particular CPU.
+ */
+typedef struct dmadscr_s {
+ uint64_t dscr_a;
+ uint64_t dscr_b;
+ uint64_t pad_a;
+ uint64_t pad_b;
+} dmadscr_t;
+
+static dmadscr_t page_descr[NR_CPUS] __attribute__((aligned(SMP_CACHE_BYTES)));
+
+void sb1_dma_init(void)
+{
+ int cpu = smp_processor_id();
+ uint64_t base_val = PHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1);
+
+ __raw_writeq(base_val,
+ IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ __raw_writeq(base_val | M_DM_DSCR_BASE_RESET,
+ IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL,
+ IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+}
+
+void sb1_clear_page_dma(void *page)
+{
+ int cpu = smp_processor_id();
+
+ /* if the page is above Kseg0, use old way */
+ if (KSEGX(page) != K0BASE)
+ return sb1_clear_page(page);
+
+ page_descr[cpu].dscr_a = PHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
+ page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
+ __raw_writeq(1, IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_COUNT));
+
+ /*
+ * Don't really want to do it this way, but there's no
+ * reliable way to delay completion detection.
+ */
+ while (!(__raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & M_DM_DSCR_BASE_INTERRUPT))
+ ;
+ __raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+}
+
+void sb1_copy_page_dma(void *to, void *from)
+{
+ unsigned long from_phys = PHYSADDR(from);
+ unsigned long to_phys = PHYSADDR(to);
+ int cpu = smp_processor_id();
+
+ /* if either page is above Kseg0, use old way */
+ if ((KSEGX(to) != K0BASE) || (KSEGX(from) != K0BASE))
+ return sb1_copy_page(to, from);
+
+ page_descr[cpu].dscr_a = PHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
+ page_descr[cpu].dscr_b = PHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
+ __raw_writeq(1, IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_COUNT));
+
+ /*
+ * Don't really want to do it this way, but there's no
+ * reliable way to delay completion detection.
+ */
+ while (!(__raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & M_DM_DSCR_BASE_INTERRUPT))
+ ;
+ __raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+}
+
+#endif
diff -Nru a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm/pgtable-32.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,63 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <asm/pgtable.h>
+
+void pgd_init(unsigned long page)
+{
+ unsigned long *p = (unsigned long *) page;
+ int i;
+
+ for (i = 0; i < USER_PTRS_PER_PGD; i+=8) {
+ p[i + 0] = (unsigned long) invalid_pte_table;
+ p[i + 1] = (unsigned long) invalid_pte_table;
+ p[i + 2] = (unsigned long) invalid_pte_table;
+ p[i + 3] = (unsigned long) invalid_pte_table;
+ p[i + 4] = (unsigned long) invalid_pte_table;
+ p[i + 5] = (unsigned long) invalid_pte_table;
+ p[i + 6] = (unsigned long) invalid_pte_table;
+ p[i + 7] = (unsigned long) invalid_pte_table;
+ }
+}
+
+void __init pagetable_init(void)
+{
+#ifdef CONFIG_HIGHMEM
+ unsigned long vaddr;
+ pgd_t *pgd, *pgd_base;
+ pmd_t *pmd;
+ pte_t *pte;
+#endif
+
+ /* Initialize the entire pgd. */
+ pgd_init((unsigned long)swapper_pg_dir);
+ pgd_init((unsigned long)swapper_pg_dir +
+ sizeof(pgd_t ) * USER_PTRS_PER_PGD);
+
+#ifdef CONFIG_HIGHMEM
+ pgd_base = swapper_pg_dir;
+
+ /*
+ * Fixed mappings:
+ */
+ vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
+ fixrange_init(vaddr, 0, pgd_base);
+
+ /*
+ * Permanent kmaps:
+ */
+ vaddr = PKMAP_BASE;
+ fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base);
+
+ pgd = swapper_pg_dir + __pgd_offset(vaddr);
+ pmd = pmd_offset(pgd, vaddr);
+ pte = pte_offset_kernel(pmd, vaddr);
+ pkmap_page_table = pte;
+#endif
+}
diff -Nru a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm/pgtable-64.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,81 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999, 2000 by Silicon Graphics
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <asm/pgtable.h>
+#include <asm/pgalloc.h>
+
+void pgd_init(unsigned long page)
+{
+ unsigned long *p, *end;
+
+ p = (unsigned long *) page;
+ end = p + PTRS_PER_PGD;
+
+ while (p < end) {
+ p[0] = (unsigned long) invalid_pmd_table;
+ p[1] = (unsigned long) invalid_pmd_table;
+ p[2] = (unsigned long) invalid_pmd_table;
+ p[3] = (unsigned long) invalid_pmd_table;
+ p[4] = (unsigned long) invalid_pmd_table;
+ p[5] = (unsigned long) invalid_pmd_table;
+ p[6] = (unsigned long) invalid_pmd_table;
+ p[7] = (unsigned long) invalid_pmd_table;
+ p += 8;
+ }
+}
+
+void pmd_init(unsigned long addr, unsigned long pagetable)
+{
+ unsigned long *p, *end;
+
+ p = (unsigned long *) addr;
+ end = p + PTRS_PER_PMD;
+
+ while (p < end) {
+ p[0] = (unsigned long)pagetable;
+ p[1] = (unsigned long)pagetable;
+ p[2] = (unsigned long)pagetable;
+ p[3] = (unsigned long)pagetable;
+ p[4] = (unsigned long)pagetable;
+ p[5] = (unsigned long)pagetable;
+ p[6] = (unsigned long)pagetable;
+ p[7] = (unsigned long)pagetable;
+ p += 8;
+ }
+}
+
+void __init pagetable_init(void)
+{
+ pmd_t *pmd;
+ pte_t *pte;
+ int i;
+
+ /* Initialize the entire pgd. */
+ pgd_init((unsigned long)swapper_pg_dir);
+ pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
+ memset((void *)invalid_pte_table, 0, sizeof(pte_t) * PTRS_PER_PTE);
+
+ memset((void *)kptbl, 0, PAGE_SIZE << PGD_ORDER);
+ memset((void *)kpmdtbl, 0, PAGE_SIZE);
+ set_pgd(swapper_pg_dir, __pgd(kpmdtbl));
+
+ /*
+ * The 64-bit kernel uses a flat pagetable for it's kernel mappings ...
+ */
+ pmd = kpmdtbl;
+ pte = kptbl;
+ i = 0;
+ while (i < (1 << PGD_ORDER)) {
+ pmd_val(*pmd) = (unsigned long)pte;
+ pte += PTRS_PER_PTE;
+ pmd++;
+ i++;
+ }
+}
diff -Nru a/arch/mips/mm/sc-ip22.c b/arch/mips/mm/sc-ip22.c
--- a/arch/mips/mm/sc-ip22.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/mm/sc-ip22.c Sun Aug 3 13:14:49 2003
@@ -59,7 +59,7 @@
static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
{
unsigned long first_line, last_line;
- unsigned int flags;
+ unsigned long flags;
#ifdef DEBUG_CACHE
printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size);
@@ -152,7 +152,7 @@
return 0;
size <<= PAGE_SHIFT;
- printk(KERN_INFO "R4600/R5000 SCACHE size %ldK, linesize 32 bytes.\n",
+ printk(KERN_INFO "R4600/R5000 SCACHE size %dK, linesize 32 bytes.\n",
size >> 10);
scache_size = size;
diff -Nru a/arch/mips/mm/tlb-andes.c b/arch/mips/mm/tlb-andes.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm/tlb-andes.c Sun Aug 3 13:14:46 2003
@@ -0,0 +1,257 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997, 1998, 1999 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/mmu_context.h>
+
+extern void except_vec1_r10k(void);
+
+#define NTLB_ENTRIES 64
+#define NTLB_ENTRIES_HALF 32
+
+void local_flush_tlb_all(void)
+{
+ unsigned long flags;
+ unsigned long old_ctx;
+ unsigned long entry;
+
+ local_irq_save(flags);
+ /* Save old context and create impossible VPN2 value */
+ old_ctx = read_c0_entryhi() & ASID_MASK;
+ write_c0_entryhi(CKSEG0);
+ write_c0_entrylo0(0);
+ write_c0_entrylo1(0);
+
+ entry = read_c0_wired();
+
+ /* Blast 'em all away. */
+ while (entry < NTLB_ENTRIES) {
+ write_c0_index(entry);
+ tlb_write_indexed();
+ entry++;
+ }
+ write_c0_entryhi(old_ctx);
+ local_irq_restore(flags);
+}
+
+void local_flush_tlb_mm(struct mm_struct *mm)
+{
+ int cpu = smp_processor_id();
+ if (cpu_context(cpu, mm) != 0) {
+ drop_mmu_context(mm,cpu);
+ }
+}
+
+void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+ unsigned long end)
+{
+ struct mm_struct *mm = vma->vm_mm;
+ int cpu = smp_processor_id();
+
+ if (cpu_context(cpu, mm) != 0) {
+ unsigned long flags;
+ int size;
+
+ local_irq_save(flags);
+ size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
+ size = (size + 1) >> 1;
+ if (size <= NTLB_ENTRIES_HALF) {
+ int oldpid = (read_c0_entryhi() & ASID_MASK);
+ int newpid = (cpu_context(smp_processor_id(), mm)
+ & ASID_MASK);
+
+ start &= (PAGE_MASK << 1);
+ end += ((PAGE_SIZE << 1) - 1);
+ end &= (PAGE_MASK << 1);
+ while(start < end) {
+ int idx;
+
+ write_c0_entryhi(start | newpid);
+ start += (PAGE_SIZE << 1);
+ tlb_probe();
+ idx = read_c0_index();
+ write_c0_entrylo0(0);
+ write_c0_entrylo1(0);
+ write_c0_entryhi(KSEG0);
+ if(idx < 0)
+ continue;
+ tlb_write_indexed();
+ }
+ write_c0_entryhi(oldpid);
+ } else {
+ drop_mmu_context(mm, cpu);
+ }
+ local_irq_restore(flags);
+ }
+}
+
+void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+ unsigned long flags;
+ int size;
+
+ size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
+ size = (size + 1) >> 1;
+
+ local_irq_save(flags);
+ if (size <= NTLB_ENTRIES_HALF) {
+ int pid = read_c0_entryhi();
+
+ start &= (PAGE_MASK << 1);
+ end += ((PAGE_SIZE << 1) - 1);
+ end &= (PAGE_MASK << 1);
+
+ while (start < end) {
+ int idx;
+
+ write_c0_entryhi(start);
+ start += (PAGE_SIZE << 1);
+ tlb_probe();
+ idx = read_c0_index();
+ write_c0_entrylo0(0);
+ write_c0_entrylo1(0);
+ write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
+ if (idx < 0)
+ continue;
+ tlb_write_indexed();
+ }
+ write_c0_entryhi(pid);
+ } else {
+ local_flush_tlb_all();
+ }
+ local_irq_restore(flags);
+}
+
+void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+{
+ if (cpu_context(smp_processor_id(), vma->vm_mm) != 0) {
+ unsigned long flags;
+ int oldpid, newpid, idx;
+
+ newpid = (cpu_context(smp_processor_id(), vma->vm_mm) &
+ ASID_MASK);
+ page &= (PAGE_MASK << 1);
+ local_irq_save(flags);
+ oldpid = (read_c0_entryhi() & ASID_MASK);
+ write_c0_entryhi(page | newpid);
+ tlb_probe();
+ idx = read_c0_index();
+ write_c0_entrylo0(0);
+ write_c0_entrylo1(0);
+ write_c0_entryhi(KSEG0);
+ if (idx < 0)
+ goto finish;
+ tlb_write_indexed();
+
+ finish:
+ write_c0_entryhi(oldpid);
+ local_irq_restore(flags);
+ }
+}
+
+/*
+ * This one is only used for pages with the global bit set so we don't care
+ * much about the ASID.
+ */
+void local_flush_tlb_one(unsigned long page)
+{
+ unsigned long flags;
+ int oldpid, idx;
+
+ local_irq_save(flags);
+ page &= (PAGE_MASK << 1);
+ oldpid = read_c0_entryhi() & 0xff;
+ write_c0_entryhi(page);
+ tlb_probe();
+ idx = read_c0_index();
+ write_c0_entrylo0(0);
+ write_c0_entrylo1(0);
+ if (idx >= 0) {
+ /* Make sure all entries differ. */
+ write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
+ tlb_write_indexed();
+ }
+ write_c0_entryhi(oldpid);
+
+ local_irq_restore(flags);
+}
+
+/* XXX Simplify this. On the R10000 writing a TLB entry for an virtual
+ address that already exists will overwrite the old entry and not result
+ in TLB malfunction or TLB shutdown. */
+void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
+{
+ unsigned long flags;
+ pgd_t *pgdp;
+ pmd_t *pmdp;
+ pte_t *ptep;
+ int idx, pid;
+
+ /*
+ * Handle debugger faulting in for debugee.
+ */
+ if (current->active_mm != vma->vm_mm)
+ return;
+
+ pid = read_c0_entryhi() & ASID_MASK;
+
+ if ((pid != (cpu_context(smp_processor_id(), vma->vm_mm) & ASID_MASK))
+ || (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
+ printk(KERN_WARNING
+ "%s: Wheee, bogus tlbpid mmpid=%d tlbpid=%d\n",
+ __FUNCTION__, (int) (cpu_context(smp_processor_id(),
+ vma->vm_mm) & ASID_MASK), pid);
+ }
+
+ local_irq_save(flags);
+ address &= (PAGE_MASK << 1);
+ write_c0_entryhi(address | (pid));
+ pgdp = pgd_offset(vma->vm_mm, address);
+ tlb_probe();
+ pmdp = pmd_offset(pgdp, address);
+ idx = read_c0_index();
+ ptep = pte_offset_map(pmdp, address);
+ write_c0_entrylo0(pte_val(*ptep++) >> 6);
+ write_c0_entrylo1(pte_val(*ptep) >> 6);
+ write_c0_entryhi(address | (pid));
+ if (idx < 0) {
+ tlb_write_random();
+ } else {
+ tlb_write_indexed();
+ }
+ write_c0_entryhi(pid);
+ local_irq_restore(flags);
+}
+
+void __init andes_tlb_init(void)
+{
+ /*
+ * You should never change this register:
+ * - On R4600 1.7 the tlbp never hits for pages smaller than
+ * the value in the c0_pagemask register.
+ * - The entire mm handling assumes the c0_pagemask register to
+ * be set for 4kb pages.
+ */
+ write_c0_pagemask(PM_4K);
+ write_c0_wired(0);
+ write_c0_framemask(0);
+
+ /* From this point on the ARC firmware is dead. */
+ local_flush_tlb_all();
+
+ /* Did I tell you that ARC SUCKS? */
+
+ memcpy((void *)KSEG1 + 0x080, except_vec1_r10k, 0x80);
+}
diff -Nru a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
--- a/arch/mips/mm/tlb-r4k.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/mm/tlb-r4k.c Sun Aug 3 13:14:46 2003
@@ -3,17 +3,12 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
- *
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
- *
- * To do:
- *
- * - this code is a overbloated pig
- * - many of the bug workarounds are not efficient at all, but at
- * least they are functional ...
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
@@ -24,10 +19,10 @@
#include <asm/pgtable.h>
#include <asm/system.h>
-#undef DEBUG_TLB
-#undef DEBUG_TLBUPDATE
-
-extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
+extern void except_vec0_nevada(void);
+extern void except_vec0_r4000(void);
+extern void except_vec0_r4600(void);
+extern void except_vec1_r4k(void);
/* CP0 hazard avoidance. */
#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
@@ -40,13 +35,9 @@
unsigned long old_ctx;
int entry;
-#ifdef DEBUG_TLB
- printk("[tlball]");
-#endif
-
local_irq_save(flags);
/* Save old context and create impossible VPN2 value */
- old_ctx = (read_c0_entryhi() & ASID_MASK);
+ old_ctx = read_c0_entryhi() & ASID_MASK;
write_c0_entrylo0(0);
write_c0_entrylo1(0);
BARRIER;
@@ -59,7 +50,7 @@
* Make sure all entries differ. If they're not different
* MIPS32 will take revenge ...
*/
- write_c0_entryhi(KSEG0 + entry*0x2000);
+ write_c0_entryhi(KSEG0 + entry * 0x2000);
write_c0_index(entry);
BARRIER;
tlb_write_indexed();
@@ -75,12 +66,8 @@
{
int cpu = smp_processor_id();
- if (cpu_context(cpu, mm) != 0) {
-#ifdef DEBUG_TLB
- printk("[tlbmm<%d>]", cpu_context(cpu, mm));
-#endif
+ if (cpu_context(cpu, mm) != 0)
drop_mmu_context(mm,cpu);
- }
}
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
@@ -93,16 +80,12 @@
unsigned long flags;
int size;
-#ifdef DEBUG_TLB
- printk("[tlbrange<%02x,%08lx,%08lx>]", cpu_context(cpu, mm) & ASID_MASK,
- start, end);
-#endif
local_irq_save(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
size = (size + 1) >> 1;
if (size <= current_cpu_data.tlbsize/2) {
int oldpid = read_c0_entryhi() & ASID_MASK;
- int newpid = cpu_context(cpu, mm) & ASID_MASK;
+ int newpid = cpu_asid(cpu, mm);
start &= (PAGE_MASK << 1);
end += ((PAGE_SIZE << 1) - 1);
@@ -121,7 +104,7 @@
if (idx < 0)
continue;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0 + idx*0x2000);
+ write_c0_entryhi(KSEG0 + idx * 0x2000);
BARRIER;
tlb_write_indexed();
BARRIER;
@@ -139,9 +122,6 @@
unsigned long flags;
int size;
-#ifdef DEBUG_TLB
- printk("[tlbkernelrange<%02x,%08lx,%08lx>]", start, end);
-#endif
local_irq_save(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
size = (size + 1) >> 1;
@@ -166,7 +146,7 @@
if (idx < 0)
continue;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0 + idx*0x2000);
+ write_c0_entryhi(KSEG0 + idx * 0x2000);
BARRIER;
tlb_write_indexed();
BARRIER;
@@ -182,18 +162,14 @@
{
int cpu = smp_processor_id();
- if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
+ if (cpu_context(cpu, vma->vm_mm) != 0) {
unsigned long flags;
int oldpid, newpid, idx;
-#ifdef DEBUG_TLB
- printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
- page);
-#endif
- newpid = (cpu_context(cpu, vma->vm_mm) & ASID_MASK);
+ newpid = cpu_asid(cpu, vma->vm_mm);
page &= (PAGE_MASK << 1);
local_irq_save(flags);
- oldpid = (read_c0_entryhi() & ASID_MASK);
+ oldpid = read_c0_entryhi() & ASID_MASK;
write_c0_entryhi(page | newpid);
BARRIER;
tlb_probe();
@@ -201,10 +177,10 @@
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- if(idx < 0)
+ if (idx < 0)
goto finish;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+idx*0x2000);
+ write_c0_entryhi(KSEG0 + idx * 0x2000);
BARRIER;
tlb_write_indexed();
@@ -246,7 +222,8 @@
local_irq_restore(flags);
}
-/* We will need multiple versions of update_mmu_cache(), one that just
+/*
+ * We will need multiple versions of update_mmu_cache(), one that just
* updates the TLB with the new pte(s), and another which also checks
* for the R4k "end of page" hardware bug and does the needy.
*/
@@ -266,15 +243,6 @@
pid = read_c0_entryhi() & ASID_MASK;
-#ifdef DEBUG_TLB
- if ((pid != cpu_context(cpu, vma->vm_mm) & ASID_MASK) ||
- (cpu_context(vma->vm_mm) == 0)) {
- printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
- "tlbpid=%d\n",
- (int) (cpu_context(cpu, vma->vm_mm) & ASID_MASK), pid);
- }
-#endif
-
local_irq_save(flags);
address &= (PAGE_MASK << 1);
write_c0_entryhi(address | pid);
@@ -332,7 +300,7 @@
#endif
void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask)
+ unsigned long entryhi, unsigned long pagemask)
{
unsigned long flags;
unsigned long wired;
@@ -415,24 +383,22 @@
prid = read_c0_prid() & ASID_MASK;
if (prid == PRID_IMP_RM7000 || !(config & (1 << 31)))
/*
- * Not a MIPS32 complianant CPU. Config 1 register not
+ * Not a MIPS32/MIPS64 CPU.. Config 1 register not
* supported, we assume R4k style. Cpu probing already figured
* out the number of tlb entries.
*/
return;
-#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
config1 = read_c0_config1();
if (!((config >> 7) & 3))
panic("No MMU present");
else
current_cpu_data.tlbsize = ((config1 >> 25) & 0x3f) + 1;
-#endif
}
void __init r4k_tlb_init(void)
{
- u32 config = read_c0_config();
+ unsigned int config = read_c0_config();
/*
* You should never change this register:
@@ -447,13 +413,17 @@
temp_tlb_entry = current_cpu_data.tlbsize - 1;
local_flush_tlb_all();
- if (cpu_has_4kex && cpu_has_4ktlb) {
- if (current_cpu_data.cputype == CPU_NEVADA)
- memcpy((void *)KSEG0, &except_vec0_nevada, 0x80);
- else if (current_cpu_data.cputype == CPU_R4600)
- memcpy((void *)KSEG0, &except_vec0_r4600, 0x80);
- else
- memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x80);
- }
+#ifdef CONFIG_MIPS32
+ if (current_cpu_data.cputype == CPU_NEVADA)
+ memcpy((void *)KSEG0, &except_vec0_nevada, 0x80);
+ else if (current_cpu_data.cputype == CPU_R4600)
+ memcpy((void *)KSEG0, &except_vec0_r4600, 0x80);
+ else
+ memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
+ flush_icache_range(KSEG0, KSEG0 + 0x80);
+#endif
+#ifdef CONFIG_MIPS64
+ memcpy((void *)(KSEG0 + 0x80), except_vec1_r4k, 0x80);
+ flush_icache_range(KSEG0 + 0x80, KSEG0 + 0x100);
+#endif
}
diff -Nru a/arch/mips/mm/tlb-sb1.c b/arch/mips/mm/tlb-sb1.c
--- a/arch/mips/mm/tlb-sb1.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/mm/tlb-sb1.c Sun Aug 3 13:14:53 2003
@@ -22,7 +22,8 @@
#include <asm/bootinfo.h>
#include <asm/cpu.h>
-extern char except_vec0_sb1[];
+extern void except_vec0_sb1(void);
+extern void except_vec1_sb1(void);
/* Dump the current entry* and pagemask registers */
static inline void dump_cur_tlb_regs(void)
@@ -35,6 +36,7 @@
".set noreorder \n"
".set mips64 \n"
".set noat \n"
+ " tlbr \n"
" dmfc0 $1, $10 \n"
" dsrl32 %0, $1, 0 \n"
" sll %1, $1, 0 \n"
@@ -76,7 +78,6 @@
for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
write_c0_index(entry);
printk("\n%02i ", entry);
- tlb_read();
dump_cur_tlb_regs();
}
printk("\n");
@@ -136,7 +137,7 @@
}
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
+ unsigned long end)
{
struct mm_struct *mm = vma->vm_mm;
unsigned long flags;
@@ -321,11 +322,7 @@
*/
void sb1_tlb_init(void)
{
- u32 config1;
-
write_c0_pagemask(PM_4K);
- config1 = read_c0_config1();
- current_cpu_data.tlbsize = ((config1 >> 25) & 0x3f) + 1;
/*
* We don't know what state the firmware left the TLB's in, so this is
@@ -334,6 +331,12 @@
*/
sb1_sanitize_tlb();
+#ifdef CONFIG_MIPS32
memcpy((void *)KSEG0, except_vec0_sb1, 0x80);
flush_icache_range(KSEG0, KSEG0 + 0x80);
+#endif
+#ifdef CONFIG_MIPS64
+ memcpy((void *)KSEG0 + 0x80, except_vec1_sb1, 0x80);
+ flush_icache_range(KSEG0 + 0x80, KSEG0 + 0x100);
+#endif
}
diff -Nru a/arch/mips/mm/tlbex-r4k.S b/arch/mips/mm/tlbex-r4k.S
--- a/arch/mips/mm/tlbex-r4k.S Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,532 +0,0 @@
-/*
- * TLB exception handling code for r4k.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
- *
- * Multi-cpu abstraction and reworking:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/init.h>
-#include <linux/config.h>
-
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
-#include <asm/processor.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
-#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PTE_L ld
-#define PTE_S sd
-#define PTE_SRL dsrl
-#define P_MTC0 dmtc0
-#define PTE_SIZE 8
-#define PTEP_INDX_MSK 0xff0
-#define PTE_INDX_MSK 0xff8
-#define PTE_INDX_SHIFT 9
-#else
-#define PTE_L lw
-#define PTE_S sw
-#define PTE_SRL srl
-#define P_MTC0 mtc0
-#define PTE_SIZE 4
-#define PTEP_INDX_MSK 0xff8
-#define PTE_INDX_MSK 0xffc
-#define PTE_INDX_SHIFT 10
-#endif
-
-/*
- * ABUSE of CPP macros 101.
- *
- * After this macro runs, the pte faulted on is
- * in register PTE, a ptr into the table in which
- * the pte belongs is in PTR.
- */
-
-#ifdef CONFIG_SMP
-#define GET_PGD(scratch, ptr) \
- mfc0 ptr, CP0_CONTEXT; \
- la scratch, pgd_current;\
- srl ptr, 23; \
- sll ptr, 2; \
- addu ptr, scratch, ptr; \
- lw ptr, (ptr);
-#else
-#define GET_PGD(scratch, ptr) \
- lw ptr, pgd_current;
-#endif
-
-#define LOAD_PTE(pte, ptr) \
- GET_PGD(pte, ptr) \
- mfc0 pte, CP0_BADVADDR; \
- srl pte, pte, _PGDIR_SHIFT; \
- sll pte, pte, 2; \
- addu ptr, ptr, pte; \
- mfc0 pte, CP0_BADVADDR; \
- lw ptr, (ptr); \
- srl pte, pte, PTE_INDX_SHIFT; \
- and pte, pte, PTE_INDX_MSK; \
- addu ptr, ptr, pte; \
- PTE_L pte, (ptr);
-
- /* This places the even/odd pte pair in the page
- * table at PTR into ENTRYLO0 and ENTRYLO1 using
- * TMP as a scratch register.
- */
-#define PTE_RELOAD(ptr, tmp) \
- ori ptr, ptr, PTE_SIZE; \
- xori ptr, ptr, PTE_SIZE; \
- PTE_L tmp, PTE_SIZE(ptr); \
- PTE_L ptr, 0(ptr); \
- PTE_SRL tmp, tmp, 6; \
- P_MTC0 tmp, CP0_ENTRYLO1; \
- PTE_SRL ptr, ptr, 6; \
- P_MTC0 ptr, CP0_ENTRYLO0;
-
-#define DO_FAULT(write) \
- .set noat; \
- SAVE_ALL; \
- mfc0 a2, CP0_BADVADDR; \
- KMODE; \
- .set at; \
- move a0, sp; \
- jal do_page_fault; \
- li a1, write; \
- j ret_from_exception; \
- nop; \
- .set noat;
-
- /* Check is PTE is present, if not then jump to LABEL.
- * PTR points to the page table where this PTE is located,
- * when the macro is done executing PTE will be restored
- * with it's original value.
- */
-#define PTE_PRESENT(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE valid, store result in PTR. */
-#define PTE_MAKEVALID(pte, ptr) \
- ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
- PTE_S pte, (ptr);
-
- /* Check if PTE can be written to, if not branch to LABEL.
- * Regardless restore PTE with value from PTR when done.
- */
-#define PTE_WRITABLE(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE writable, update software status bits as well,
- * then store at PTR.
- */
-#define PTE_MAKEWRITE(pte, ptr) \
- ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
- _PAGE_VALID | _PAGE_DIRTY); \
- PTE_S pte, (ptr);
-
- __INIT
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define GET_PTE_OFF(reg)
-#elif CONFIG_CPU_VR41XX
-#define GET_PTE_OFF(reg) srl reg, reg, 3
-#else
-#define GET_PTE_OFF(reg) srl reg, reg, 1
-#endif
-
-/*
- * These handlers much be written in a relocatable manner
- * because based upon the cpu type an arbitrary one of the
- * following pieces of code will be copied to the KSEG0
- * vector location.
- */
- /* TLB refill, EXL == 0, R4xx0, non-R4600 version */
- .set noreorder
- .set noat
- LEAF(except_vec0_r4000)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
-
- sll k0, k0, 2
- addu k1, k1, k0 # add in pgd offset
- mfc0 k0, CP0_CONTEXT # get context reg
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- b 1f
- tlbwr # write random tlb entry
-1:
- nop
- eret # return from trap
- END(except_vec0_r4000)
-
- /* TLB refill, EXL == 0, R4600 version */
- LEAF(except_vec0_r4600)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- P_MTC0 k1, CP0_ENTRYLO1
- nop
- tlbwr
- nop
- eret
- END(except_vec0_r4600)
-
- /* TLB refill, EXL == 0, R52x0 "Nevada" version */
- /*
- * This version has a bug workaround for the Nevada. It seems
- * as if under certain circumstances the move from cp0_context
- * might produce a bogus result when the mfc0 instruction and
- * it's consumer are in a different cacheline or a load instruction,
- * probably any memory reference, is between them. This is
- * potencially slower than the R4000 version, so we use this
- * special version.
- */
- .set noreorder
- .set noat
- LEAF(except_vec0_nevada)
- .set mips3
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
- lw k1, pgd_current # get pgd pointer
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0 # add in pgd offset
- lw k1, (k1)
- mfc0 k0, CP0_CONTEXT # get context reg
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- nop # QED specified nops
- nop
- tlbwr # write random tlb entry
- nop # traditional nop
- eret # return from trap
- END(except_vec0_nevada)
-
- /* TLB refill, EXL == 0, SB1 with M3 errata handling version */
- LEAF(except_vec0_sb1)
-#if BCM1250_M3_WAR
- mfc0 k0, CP0_BADVADDR
- mfc0 k1, CP0_ENTRYHI
- xor k0, k1
- srl k0, k0, PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
- sll k0, k0, 2
- addu k1, k1, k0 # add in pgd offset
- mfc0 k0, CP0_CONTEXT # get context reg
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- tlbwr # write random tlb entry
-1: eret # return from trap
- END(except_vec0_sb1)
-
- /* TLB refill, EXL == 0, R4[40]00/R5000 badvaddr hwbug version */
- LEAF(except_vec0_r45k_bvahwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- mfc0 k0, CP0_INDEX
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r45k_bvahwbug)
-
-#ifdef CONFIG_SMP
- /* TLB refill, EXL == 0, R4000 MP badvaddr hwbug version */
- LEAF(except_vec0_r4k_mphwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- mfc0 k0, CP0_INDEX
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_mphwbug)
-#endif
-
- /* TLB refill, EXL == 0, R4000 UP 250MHZ entrylo[01] hwbug version */
- LEAF(except_vec0_r4k_250MHZhwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- PTE_SRL k0, k0, 6
- P_MTC0 zero, CP0_ENTRYLO0
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- P_MTC0 zero, CP0_ENTRYLO1
- P_MTC0 k1, CP0_ENTRYLO1
- b 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_250MHZhwbug)
-
-#ifdef CONFIG_SMP
- /* TLB refill, EXL == 0, R4000 MP 250MHZ entrylo[01]+badvaddr bug version */
- LEAF(except_vec0_r4k_MP250MHZhwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 zero, CP0_ENTRYLO0
- P_MTC0 k0, CP0_ENTRYLO0
- mfc0 k0, CP0_INDEX
- PTE_SRL k1, k1, 6
- P_MTC0 zero, CP0_ENTRYLO1
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_MP250MHZhwbug)
-#endif
-
- __FINIT
-
- .set noreorder
-
-/*
- * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0:
- * 2. A timing hazard exists for the TLBP instruction.
- *
- * stalling_instruction
- * TLBP
- *
- * The JTLB is being read for the TLBP throughout the stall generated by the
- * previous instruction. This is not really correct as the stalling instruction
- * can modify the address used to access the JTLB. The failure symptom is that
- * the TLBP instruction will use an address created for the stalling instruction
- * and not the address held in C0_ENHI and thus report the wrong results.
- *
- * The software work-around is to not allow the instruction preceding the TLBP
- * to stall - make it an NOP or some other instruction guaranteed not to stall.
- *
- * Errata 2 will not be fixed. This errata is also on the R5000.
- *
- * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
- */
-#define R5K_HAZARD nop
-
- /*
- * Note for many R4k variants tlb probes cannot be executed out
- * of the instruction cache else you get bogus results.
- */
- .align 5
- NESTED(handle_tlbl, PT_SIZE, sp)
- .set noat
-#if BCM1250_M3_WAR
- mfc0 k0, CP0_BADVADDR
- mfc0 k1, CP0_ENTRYHI
- xor k0, k1
- srl k0, k0, PAGE_SHIFT+1
- beqz k0, 1f
- nop
- .set mips3
- eret
- .set mips0
-1:
-#endif
-invalid_tlbl:
-#ifdef TLB_OPTIMIZE
- /* Test present bit in entry. */
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp
- PTE_PRESENT(k0, k1, nopage_tlbl)
- PTE_MAKEVALID(k0, k1)
- PTE_RELOAD(k1, k0)
- nop
- b 1f
- tlbwi
-1:
- nop
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbl:
- DO_FAULT(0)
- END(handle_tlbl)
-
- .align 5
- NESTED(handle_tlbs, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- li k0,0
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp # find faulting entry
- PTE_WRITABLE(k0, k1, nopage_tlbs)
- PTE_MAKEWRITE(k0, k1)
- PTE_RELOAD(k1, k0)
- nop
- b 1f
- tlbwi
-1:
- nop
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbs:
- DO_FAULT(1)
- END(handle_tlbs)
-
- .align 5
- NESTED(handle_mod, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp # find faulting entry
- andi k0, k0, _PAGE_WRITE
- beqz k0, nowrite_mod
- PTE_L k0, (k1)
-
- /* Present and writable bits set, set accessed and dirty bits. */
- PTE_MAKEWRITE(k0, k1)
-
- /* Now reload the entry into the tlb. */
- PTE_RELOAD(k1, k0)
- nop
- b 1f
- tlbwi
-1:
- nop
- .set mips3
- eret
- .set mips0
-#endif
-
-nowrite_mod:
- DO_FAULT(1)
- END(handle_mod)
-
diff -Nru a/arch/mips/mm-32/Makefile b/arch/mips/mm-32/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-32/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,20 @@
+#
+# Makefile for the Linux/MIPS-specific parts of the memory manager.
+#
+
+obj-y += init.o
+
+obj-$(CONFIG_CPU_TX49XX) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R4300) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R4X00) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_VR41XX) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R5000) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R5432) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_RM7000) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_R10000) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_MIPS32) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_MIPS64) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_SB1) += tlbex-r4k.o
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/mm-32/init.c b/arch/mips/mm-32/init.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-32/init.c Sun Aug 3 13:14:52 2003
@@ -0,0 +1,288 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/pagemap.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/swap.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/dma.h>
+#include <asm/pgalloc.h>
+#include <asm/mmu_context.h>
+#include <asm/sections.h>
+#include <asm/tlb.h>
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+unsigned long highstart_pfn, highend_pfn;
+
+/*
+ * We have up to 8 empty zeroed pages so we can map one of the right colour
+ * when needed. This is necessary only on R4000 / R4400 SC and MC versions
+ * where we have to avoid VCED / VECI exceptions for good performance at
+ * any price. Since page is never written to after the initialization we
+ * don't have to care about aliases on other CPUs.
+ */
+unsigned long empty_zero_page, zero_page_mask;
+
+/*
+ * Not static inline because used by IP27 special magic initialization code
+ */
+unsigned long setup_zero_pages(void)
+{
+ unsigned long order, size;
+ struct page *page;
+
+ if (cpu_has_vce)
+ order = 3;
+ else
+ order = 0;
+
+ empty_zero_page = __get_free_pages(GFP_KERNEL, order);
+ if (!empty_zero_page)
+ panic("Oh boy, that early out of memory?");
+
+ page = virt_to_page(empty_zero_page);
+ while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
+ set_bit(PG_reserved, &page->flags);
+ set_page_count(page, 0);
+ page++;
+ }
+
+ size = PAGE_SIZE << order;
+ zero_page_mask = (size - 1) & PAGE_MASK;
+ memset((void *)empty_zero_page, 0, size);
+
+ return 1UL << order;
+}
+
+#ifdef CONFIG_HIGHMEM
+pte_t *kmap_pte;
+pgprot_t kmap_prot;
+
+#define kmap_get_fixmap_pte(vaddr) \
+ pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr))
+
+static void __init kmap_init(void)
+{
+ unsigned long kmap_vstart;
+
+ /* cache the first kmap pte */
+ kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
+ kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
+
+ kmap_prot = PAGE_KERNEL;
+}
+
+#endif /* CONFIG_HIGHMEM */
+
+#ifdef CONFIG_HIGHMEM
+static void __init fixrange_init (unsigned long start, unsigned long end,
+ pgd_t *pgd_base)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ int i, j;
+ unsigned long vaddr;
+
+ vaddr = start;
+ i = __pgd_offset(vaddr);
+ j = __pmd_offset(vaddr);
+ pgd = pgd_base + i;
+
+ for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
+ pmd = (pmd_t *)pgd;
+ for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
+ if (pmd_none(*pmd)) {
+ pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+ set_pmd(pmd, __pmd(pte));
+ if (pte != pte_offset_kernel(pmd, 0))
+ BUG();
+ }
+ vaddr += PMD_SIZE;
+ }
+ j = 0;
+ }
+}
+#endif
+
+#ifndef CONFIG_DISCONTIGMEM
+
+extern void pagetable_init(void);
+
+void __init paging_init(void)
+{
+ unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
+ unsigned long max_dma, high, low;
+
+ pagetable_init();
+
+#ifdef CONFIG_HIGHMEM
+ kmap_init();
+#endif
+
+ max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
+ low = max_low_pfn;
+ high = highend_pfn;
+
+#ifdef CONFIG_ISA
+ if (low < max_dma)
+ zones_size[ZONE_DMA] = low;
+ else {
+ zones_size[ZONE_DMA] = max_dma;
+ zones_size[ZONE_NORMAL] = low - max_dma;
+ }
+#else
+ zones_size[ZONE_DMA] = low;
+#endif
+#ifdef CONFIG_HIGHMEM
+ zones_size[ZONE_HIGHMEM] = high - low;
+#endif
+
+ free_area_init(zones_size);
+}
+
+#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
+
+static inline int page_is_ram(unsigned long pagenr)
+{
+ int i;
+
+ for (i = 0; i < boot_mem_map.nr_map; i++) {
+ unsigned long addr, end;
+
+ if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
+ /* not usable memory */
+ continue;
+
+ addr = PFN_UP(boot_mem_map.map[i].addr);
+ end = PFN_DOWN(boot_mem_map.map[i].addr +
+ boot_mem_map.map[i].size);
+
+ if (pagenr >= addr && pagenr < end)
+ return 1;
+ }
+
+ return 0;
+}
+
+void __init mem_init(void)
+{
+ unsigned long codesize, reservedpages, datasize, initsize;
+ unsigned long tmp, ram;
+
+#ifdef CONFIG_HIGHMEM
+ highstart_pfn = (KSEG1 - KSEG0) >> PAGE_SHIFT;
+ highmem_start_page = mem_map + highstart_pfn;
+#ifdef CONFIG_DISCONTIGMEM
+#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
+#endif
+ max_mapnr = num_physpages = highend_pfn;
+#else
+ max_mapnr = num_physpages = max_low_pfn;
+#endif
+ high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
+
+ totalram_pages += free_all_bootmem();
+ totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
+
+ reservedpages = ram = 0;
+ for (tmp = 0; tmp < max_low_pfn; tmp++)
+ if (page_is_ram(tmp)) {
+ ram++;
+ if (PageReserved(mem_map+tmp))
+ reservedpages++;
+ }
+
+#ifdef CONFIG_HIGHMEM
+ for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
+ struct page *page = mem_map + tmp;
+
+ if (!page_is_ram(tmp)) {
+ SetPageReserved(page);
+ continue;
+ }
+ ClearPageReserved(page);
+ set_bit(PG_highmem, &page->flags);
+ atomic_set(&page->count, 1);
+ __free_page(page);
+ totalhigh_pages++;
+ }
+ totalram_pages += totalhigh_pages;
+#endif
+
+ codesize = (unsigned long) &_etext - (unsigned long) &_text;
+ datasize = (unsigned long) &_edata - (unsigned long) &_etext;
+ initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
+
+ printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
+ "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
+ (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+ ram << (PAGE_SHIFT-10),
+ codesize >> 10,
+ reservedpages << (PAGE_SHIFT-10),
+ datasize >> 10,
+ initsize >> 10,
+ (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+}
+#endif /* !CONFIG_DISCONTIGMEM */
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+ if (start < end)
+ printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
+ (end - start) >> 10);
+
+ for (; start < end; start += PAGE_SIZE) {
+ ClearPageReserved(virt_to_page(start));
+ set_page_count(virt_to_page(start), 1);
+ free_page(start);
+ totalram_pages++;
+ }
+}
+#endif
+
+extern void prom_free_prom_memory(void);
+
+void free_initmem(void)
+{
+ unsigned long addr, page;
+
+ prom_free_prom_memory();
+
+ addr = (unsigned long) &__init_begin;
+ while (addr < (unsigned long) &__init_end) {
+ page = addr;
+ ClearPageReserved(virt_to_page(page));
+ set_page_count(virt_to_page(page), 1);
+ free_page(page);
+ totalram_pages++;
+ addr += PAGE_SIZE;
+ }
+ printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
+ (unsigned long) (__init_end - __init_begin) >> 10);
+}
diff -Nru a/arch/mips/mm-32/pg-r4k.S b/arch/mips/mm-32/pg-r4k.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-32/pg-r4k.S Sun Aug 3 13:14:47 2003
@@ -0,0 +1,785 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
+ *
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
+ */
+#include <linux/config.h>
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/cacheops.h>
+#include <asm/mipsregs.h>
+#include <asm/offset.h>
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define PGD_SIZE 0x2000
+#else
+#define PGD_SIZE 0x1000
+#endif
+
+ .text
+ .set noat
+
+/*
+ * Zero an entire page. Basically a simple unrolled loop should do the
+ * job but we want more performance by saving memory bus bandwidth. We
+ * have five flavours of the routine available for:
+ *
+ * - 16byte cachelines and no second level cache
+ * - 32byte cachelines second level cache
+ * - a version which handles the buggy R4600 v1.x
+ * - a version which handles the buggy R4600 v2.0
+ * - Finally a last version without fancy cache games for the SC and MC
+ * versions of R4000 and R4400.
+ */
+
+LEAF(r4k_clear_page32_d16)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ sw zero, (a0)
+ sw zero, 4(a0)
+ sw zero, 8(a0)
+ sw zero, 12(a0)
+ addiu a0, 32
+ cache Create_Dirty_Excl_D, -16(a0)
+ sw zero, -16(a0)
+ sw zero, -12(a0)
+ sw zero, -8(a0)
+ sw zero, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page32_d16)
+
+LEAF(r4k_clear_page32_d32)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ sw zero, (a0)
+ sw zero, 4(a0)
+ sw zero, 8(a0)
+ sw zero, 12(a0)
+ addiu a0, 32
+ sw zero, -16(a0)
+ sw zero, -12(a0)
+ sw zero, -8(a0)
+ sw zero, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page32_d32)
+
+LEAF(r4k_clear_page_d16)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ cache Create_Dirty_Excl_D, 16(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ cache Create_Dirty_Excl_D, -32(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ cache Create_Dirty_Excl_D, -16(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_d16)
+
+LEAF(r4k_clear_page_d32)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ cache Create_Dirty_Excl_D, -32(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_d32)
+
+/*
+ * This flavour of r4k_clear_page is for the R4600 V1.x. Cite from the
+ * IDT R4600 V1.7 errata:
+ *
+ * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
+ * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
+ * executed if there is no other dcache activity. If the dcache is
+ * accessed for another instruction immeidately preceding when these
+ * cache instructions are executing, it is possible that the dcache
+ * tag match outputs used by these cache instructions will be
+ * incorrect. These cache instructions should be preceded by at least
+ * four instructions that are not any kind of load or store
+ * instruction.
+ *
+ * This is not allowed: lw
+ * nop
+ * nop
+ * nop
+ * cache Hit_Writeback_Invalidate_D
+ *
+ * This is allowed: lw
+ * nop
+ * nop
+ * nop
+ * nop
+ * cache Hit_Writeback_Invalidate_D
+ */
+
+LEAF(r4k_clear_page_r4600_v1)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: nop
+ nop
+ nop
+ nop
+ cache Create_Dirty_Excl_D, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ nop
+ nop
+ nop
+ cache Create_Dirty_Excl_D, -32(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_r4600_v1)
+
+LEAF(r4k_clear_page_r4600_v2)
+ .set mips3
+ mfc0 a1, CP0_STATUS
+ ori AT, a1, 1
+ xori AT, 1
+ mtc0 AT, CP0_STATUS
+ nop
+ nop
+ nop
+
+ .set volatile
+ la AT, KSEG1
+ lw zero, (AT)
+ .set novolatile
+
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ cache Create_Dirty_Excl_D, -32(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+
+ mfc0 AT, CP0_STATUS # local_irq_restore
+ andi a1, 1
+ ori AT, 1
+ xori AT, 1
+ or a1, AT
+ mtc0 a1, CP0_STATUS
+ nop
+ nop
+ nop
+
+ jr ra
+ END(r4k_clear_page_r4600_v2)
+
+/*
+ * The next 4 versions are optimized for all possible scache configurations
+ * of the SC / MC versions of R4000 and R4400 ...
+ *
+ * Todo: For even better performance we should have a routine optimized for
+ * every legal combination of dcache / scache linesize. When I (Ralf) tried
+ * this the kernel crashed shortly after mounting the root filesystem. CPU
+ * bug? Weirdo cache instruction semantics?
+ */
+
+LEAF(r4k_clear_page_s16)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ cache Create_Dirty_Excl_SD, 16(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ cache Create_Dirty_Excl_SD, -32(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ cache Create_Dirty_Excl_SD, -16(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_s16)
+
+LEAF(r4k_clear_page_s32)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ cache Create_Dirty_Excl_SD, -32(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_s32)
+
+LEAF(r4k_clear_page_s64)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ addiu a0, 64
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_s64)
+
+LEAF(r4k_clear_page_s128)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ sd zero, (a0)
+ sd zero, 8(a0)
+ sd zero, 16(a0)
+ sd zero, 24(a0)
+ sd zero, 32(a0)
+ sd zero, 40(a0)
+ sd zero, 48(a0)
+ sd zero, 56(a0)
+ addiu a0, 128
+ sd zero, -64(a0)
+ sd zero, -56(a0)
+ sd zero, -48(a0)
+ sd zero, -40(a0)
+ sd zero, -32(a0)
+ sd zero, -24(a0)
+ sd zero, -16(a0)
+ sd zero, -8(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_clear_page_s128)
+
+/*
+ * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
+ * with 64-bit kernels. The prefetch offsets have been experimentally tuned
+ * an Origin 200.
+ */
+LEAF(andes_clear_page)
+ .set mips4
+ LONG_ADDIU AT, a0, _PAGE_SIZE
+1: pref 7, 512(a0)
+ sd zero, 0*SZREG(a0)
+ sd zero, 1*SZREG(a0)
+ sd zero, 2*SZREG(a0)
+ sd zero, 3*SZREG(a0)
+ LONG_ADDIU a0, a0, 8*SZREG
+ sd zero, -4*SZREG(a0)
+ sd zero, -3*SZREG(a0)
+ sd zero, -2*SZREG(a0)
+ sd zero, -1*SZREG(a0)
+ bne AT, a0, 1b
+ j ra
+ END(andes_clear_page)
+ .set mips0
+
+/*
+ * This is still inefficient. We only can do better if we know the
+ * virtual address where the copy will be accessed.
+ */
+
+LEAF(r4k_copy_page_d16)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ cache Create_Dirty_Excl_D, 16(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ cache Create_Dirty_Excl_D, 32(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ cache Create_Dirty_Excl_D, -16(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_d16)
+
+LEAF(r4k_copy_page_d32)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_D, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ cache Create_Dirty_Excl_D, 32(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_d32)
+
+/*
+ * Again a special version for the R4600 V1.x
+ */
+
+LEAF(r4k_copy_page_r4600_v1)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: nop
+ nop
+ nop
+ nop
+ cache Create_Dirty_Excl_D, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ nop
+ nop
+ nop
+ nop
+ cache Create_Dirty_Excl_D, 32(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_r4600_v1)
+
+LEAF(r4k_copy_page_r4600_v2)
+ .set mips3
+ mfc0 v1, CP0_STATUS
+ ori AT, v1, 1
+ xori AT, 1
+
+ mtc0 AT, CP0_STATUS
+ nop
+ nop
+ nop
+
+ addiu AT, a0, _PAGE_SIZE
+1: nop
+ nop
+ nop
+ nop
+ cache Create_Dirty_Excl_D, (a0)
+ lw t1, (a1)
+ lw t0, 4(a1)
+ lw a3, 8(a1)
+ lw a2, 12(a1)
+ sw t1, (a0)
+ sw t0, 4(a0)
+ sw a3, 8(a0)
+ sw a2, 12(a0)
+ lw t1, 16(a1)
+ lw t0, 20(a1)
+ lw a3, 24(a1)
+ lw a2, 28(a1)
+ sw t1, 16(a0)
+ sw t0, 20(a0)
+ sw a3, 24(a0)
+ sw a2, 28(a0)
+ nop
+ nop
+ nop
+ nop
+ cache Create_Dirty_Excl_D, 32(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw t1, -32(a1)
+ lw t0, -28(a1)
+ lw a3, -24(a1)
+ lw a2, -20(a1)
+ sw t1, -32(a0)
+ sw t0, -28(a0)
+ sw a3, -24(a0)
+ sw a2, -20(a0)
+ lw t1, -16(a1)
+ lw t0, -12(a1)
+ lw a3, -8(a1)
+ lw a2, -4(a1)
+ sw t1, -16(a0)
+ sw t0, -12(a0)
+ sw a3, -8(a0)
+ sw a2, -4(a0)
+ bne AT, a0, 1b
+
+ mfc0 AT, CP0_STATUS # local_irq_restore
+ andi v1, 1
+ ori AT, 1
+ xori AT, 1
+ or v1, AT
+ mtc0 v1, CP0_STATUS
+ nop
+ nop
+ nop
+ jr ra
+ END(r4k_copy_page_r4600_v2)
+
+/*
+ * These are for R4000SC / R4400MC
+ */
+
+LEAF(r4k_copy_page_s16)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ cache Create_Dirty_Excl_SD, 16(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ cache Create_Dirty_Excl_SD, 32(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ cache Create_Dirty_Excl_SD, -16(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_s16)
+
+LEAF(r4k_copy_page_s32)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ cache Create_Dirty_Excl_SD, 32(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_s32)
+
+LEAF(r4k_copy_page_s64)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ addiu a0, 64
+ addiu a1, 64
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_s64)
+
+LEAF(r4k_copy_page_s128)
+ .set mips3
+ addiu AT, a0, _PAGE_SIZE
+1: cache Create_Dirty_Excl_SD, (a0)
+ lw a3, (a1)
+ lw a2, 4(a1)
+ lw v1, 8(a1)
+ lw v0, 12(a1)
+ sw a3, (a0)
+ sw a2, 4(a0)
+ sw v1, 8(a0)
+ sw v0, 12(a0)
+ lw a3, 16(a1)
+ lw a2, 20(a1)
+ lw v1, 24(a1)
+ lw v0, 28(a1)
+ sw a3, 16(a0)
+ sw a2, 20(a0)
+ sw v1, 24(a0)
+ sw v0, 28(a0)
+ lw a3, 32(a1)
+ lw a2, 36(a1)
+ lw v1, 40(a1)
+ lw v0, 44(a1)
+ sw a3, 32(a0)
+ sw a2, 36(a0)
+ sw v1, 40(a0)
+ sw v0, 44(a0)
+ lw a3, 48(a1)
+ lw a2, 52(a1)
+ lw v1, 56(a1)
+ lw v0, 60(a1)
+ sw a3, 48(a0)
+ sw a2, 52(a0)
+ sw v1, 56(a0)
+ sw v0, 60(a0)
+ addiu a0, 128
+ addiu a1, 128
+ lw a3, -64(a1)
+ lw a2, -60(a1)
+ lw v1, -56(a1)
+ lw v0, -52(a1)
+ sw a3, -64(a0)
+ sw a2, -60(a0)
+ sw v1, -56(a0)
+ sw v0, -52(a0)
+ lw a3, -48(a1)
+ lw a2, -44(a1)
+ lw v1, -40(a1)
+ lw v0, -36(a1)
+ sw a3, -48(a0)
+ sw a2, -44(a0)
+ sw v1, -40(a0)
+ sw v0, -36(a0)
+ lw a3, -32(a1)
+ lw a2, -28(a1)
+ lw v1, -24(a1)
+ lw v0, -20(a1)
+ sw a3, -32(a0)
+ sw a2, -28(a0)
+ sw v1, -24(a0)
+ sw v0, -20(a0)
+ lw a3, -16(a1)
+ lw a2, -12(a1)
+ lw v1, -8(a1)
+ lw v0, -4(a1)
+ sw a3, -16(a0)
+ sw a2, -12(a0)
+ sw v1, -8(a0)
+ sw v0, -4(a0)
+ bne AT, a0, 1b
+ jr ra
+ END(r4k_copy_page_s128)
+
+
+ .text
+ .set mips4
+ .set noat
+
+
+/*
+ * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
+ * with 64-bit kernels. The prefetch offsets have been experimentally tuned
+ * an Origin 200.
+ */
+LEAF(andes_copy_page)
+ .set mips4
+ LONG_ADDIU AT, a0, _PAGE_SIZE
+1: pref 0, 2*128(a1)
+ pref 1, 2*128(a0)
+ LONG_L a3, 0*SZREG(a1)
+ LONG_L a2, 1*SZREG(a1)
+ LONG_L v1, 2*SZREG(a1)
+ LONG_L v0, 3*SZREG(a1)
+ LONG_S a3, 0*SZREG(a0)
+ LONG_S a2, 1*SZREG(a0)
+ LONG_S v1, 2*SZREG(a0)
+ LONG_S v0, 3*SZREG(a0)
+ LONG_ADDIU a0, a0, 8*SZREG
+ LONG_ADDIU a1, a1, 8*SZREG
+ LONG_L a3, -4*SZREG(a1)
+ LONG_L a2, -3*SZREG(a1)
+ LONG_L v1, -2*SZREG(a1)
+ LONG_L v0, -1*SZREG(a1)
+ LONG_S a3, -4*SZREG(a0)
+ LONG_S a2, -3*SZREG(a0)
+ LONG_S v1, -2*SZREG(a0)
+ LONG_S v0, -1*SZREG(a0)
+ bne AT, a0,1b
+ j ra
+ END(andes_copy_page)
+ .set mips0
diff -Nru a/arch/mips/mm-32/tlbex-r4k.S b/arch/mips/mm-32/tlbex-r4k.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-32/tlbex-r4k.S Sun Aug 3 13:14:52 2003
@@ -0,0 +1,532 @@
+/*
+ * TLB exception handling code for r4k.
+ *
+ * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
+ *
+ * Multi-cpu abstraction and reworking:
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/config.h>
+
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/cachectl.h>
+#include <asm/fpregdef.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable-bits.h>
+#include <asm/processor.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/war.h>
+
+#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define PTE_L ld
+#define PTE_S sd
+#define PTE_SRL dsrl
+#define P_MTC0 dmtc0
+#define PTE_SIZE 8
+#define PTEP_INDX_MSK 0xff0
+#define PTE_INDX_MSK 0xff8
+#define PTE_INDX_SHIFT 9
+#else
+#define PTE_L lw
+#define PTE_S sw
+#define PTE_SRL srl
+#define P_MTC0 mtc0
+#define PTE_SIZE 4
+#define PTEP_INDX_MSK 0xff8
+#define PTE_INDX_MSK 0xffc
+#define PTE_INDX_SHIFT 10
+#endif
+
+/*
+ * ABUSE of CPP macros 101.
+ *
+ * After this macro runs, the pte faulted on is
+ * in register PTE, a ptr into the table in which
+ * the pte belongs is in PTR.
+ */
+
+#ifdef CONFIG_SMP
+#define GET_PGD(scratch, ptr) \
+ mfc0 ptr, CP0_CONTEXT; \
+ la scratch, pgd_current;\
+ srl ptr, 23; \
+ sll ptr, 2; \
+ addu ptr, scratch, ptr; \
+ lw ptr, (ptr);
+#else
+#define GET_PGD(scratch, ptr) \
+ lw ptr, pgd_current;
+#endif
+
+#define LOAD_PTE(pte, ptr) \
+ GET_PGD(pte, ptr) \
+ mfc0 pte, CP0_BADVADDR; \
+ srl pte, pte, _PGDIR_SHIFT; \
+ sll pte, pte, 2; \
+ addu ptr, ptr, pte; \
+ mfc0 pte, CP0_BADVADDR; \
+ lw ptr, (ptr); \
+ srl pte, pte, PTE_INDX_SHIFT; \
+ and pte, pte, PTE_INDX_MSK; \
+ addu ptr, ptr, pte; \
+ PTE_L pte, (ptr);
+
+ /* This places the even/odd pte pair in the page
+ * table at PTR into ENTRYLO0 and ENTRYLO1 using
+ * TMP as a scratch register.
+ */
+#define PTE_RELOAD(ptr, tmp) \
+ ori ptr, ptr, PTE_SIZE; \
+ xori ptr, ptr, PTE_SIZE; \
+ PTE_L tmp, PTE_SIZE(ptr); \
+ PTE_L ptr, 0(ptr); \
+ PTE_SRL tmp, tmp, 6; \
+ P_MTC0 tmp, CP0_ENTRYLO1; \
+ PTE_SRL ptr, ptr, 6; \
+ P_MTC0 ptr, CP0_ENTRYLO0;
+
+#define DO_FAULT(write) \
+ .set noat; \
+ SAVE_ALL; \
+ mfc0 a2, CP0_BADVADDR; \
+ KMODE; \
+ .set at; \
+ move a0, sp; \
+ jal do_page_fault; \
+ li a1, write; \
+ j ret_from_exception; \
+ nop; \
+ .set noat;
+
+ /* Check is PTE is present, if not then jump to LABEL.
+ * PTR points to the page table where this PTE is located,
+ * when the macro is done executing PTE will be restored
+ * with it's original value.
+ */
+#define PTE_PRESENT(pte, ptr, label) \
+ andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
+ xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
+ bnez pte, label; \
+ PTE_L pte, (ptr);
+
+ /* Make PTE valid, store result in PTR. */
+#define PTE_MAKEVALID(pte, ptr) \
+ ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
+ PTE_S pte, (ptr);
+
+ /* Check if PTE can be written to, if not branch to LABEL.
+ * Regardless restore PTE with value from PTR when done.
+ */
+#define PTE_WRITABLE(pte, ptr, label) \
+ andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
+ xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
+ bnez pte, label; \
+ PTE_L pte, (ptr);
+
+ /* Make PTE writable, update software status bits as well,
+ * then store at PTR.
+ */
+#define PTE_MAKEWRITE(pte, ptr) \
+ ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
+ _PAGE_VALID | _PAGE_DIRTY); \
+ PTE_S pte, (ptr);
+
+ __INIT
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define GET_PTE_OFF(reg)
+#elif CONFIG_CPU_VR41XX
+#define GET_PTE_OFF(reg) srl reg, reg, 3
+#else
+#define GET_PTE_OFF(reg) srl reg, reg, 1
+#endif
+
+/*
+ * These handlers much be written in a relocatable manner
+ * because based upon the cpu type an arbitrary one of the
+ * following pieces of code will be copied to the KSEG0
+ * vector location.
+ */
+ /* TLB refill, EXL == 0, R4xx0, non-R4600 version */
+ .set noreorder
+ .set noat
+ LEAF(except_vec0_r4000)
+ .set mips3
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR # Get faulting address
+ srl k0, k0, _PGDIR_SHIFT # get pgd only bits
+
+ sll k0, k0, 2
+ addu k1, k1, k0 # add in pgd offset
+ mfc0 k0, CP0_CONTEXT # get context reg
+ lw k1, (k1)
+ GET_PTE_OFF(k0) # get pte offset
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0 # add in offset
+ PTE_L k0, 0(k1) # get even pte
+ PTE_L k1, PTE_SIZE(k1) # get odd pte
+ PTE_SRL k0, k0, 6 # convert to entrylo0
+ P_MTC0 k0, CP0_ENTRYLO0 # load it
+ PTE_SRL k1, k1, 6 # convert to entrylo1
+ P_MTC0 k1, CP0_ENTRYLO1 # load it
+ b 1f
+ tlbwr # write random tlb entry
+1:
+ nop
+ eret # return from trap
+ END(except_vec0_r4000)
+
+ /* TLB refill, EXL == 0, R4600 version */
+ LEAF(except_vec0_r4600)
+ .set mips3
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR
+ srl k0, k0, _PGDIR_SHIFT
+ sll k0, k0, 2 # log2(sizeof(pgd_t)
+ addu k1, k1, k0
+ mfc0 k0, CP0_CONTEXT
+ lw k1, (k1)
+ GET_PTE_OFF(k0) # get pte offset
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0
+ PTE_L k0, 0(k1)
+ PTE_L k1, PTE_SIZE(k1)
+ PTE_SRL k0, k0, 6
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
+ P_MTC0 k1, CP0_ENTRYLO1
+ nop
+ tlbwr
+ nop
+ eret
+ END(except_vec0_r4600)
+
+ /* TLB refill, EXL == 0, R52x0 "Nevada" version */
+ /*
+ * This version has a bug workaround for the Nevada. It seems
+ * as if under certain circumstances the move from cp0_context
+ * might produce a bogus result when the mfc0 instruction and
+ * it's consumer are in a different cacheline or a load instruction,
+ * probably any memory reference, is between them. This is
+ * potencially slower than the R4000 version, so we use this
+ * special version.
+ */
+ .set noreorder
+ .set noat
+ LEAF(except_vec0_nevada)
+ .set mips3
+ mfc0 k0, CP0_BADVADDR # Get faulting address
+ srl k0, k0, _PGDIR_SHIFT # get pgd only bits
+ lw k1, pgd_current # get pgd pointer
+ sll k0, k0, 2 # log2(sizeof(pgd_t)
+ addu k1, k1, k0 # add in pgd offset
+ lw k1, (k1)
+ mfc0 k0, CP0_CONTEXT # get context reg
+ GET_PTE_OFF(k0) # get pte offset
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0 # add in offset
+ PTE_L k0, 0(k1) # get even pte
+ PTE_L k1, PTE_SIZE(k1) # get odd pte
+ PTE_SRL k0, k0, 6 # convert to entrylo0
+ P_MTC0 k0, CP0_ENTRYLO0 # load it
+ PTE_SRL k1, k1, 6 # convert to entrylo1
+ P_MTC0 k1, CP0_ENTRYLO1 # load it
+ nop # QED specified nops
+ nop
+ tlbwr # write random tlb entry
+ nop # traditional nop
+ eret # return from trap
+ END(except_vec0_nevada)
+
+ /* TLB refill, EXL == 0, SB1 with M3 errata handling version */
+ LEAF(except_vec0_sb1)
+#if BCM1250_M3_WAR
+ mfc0 k0, CP0_BADVADDR
+ mfc0 k1, CP0_ENTRYHI
+ xor k0, k1
+ srl k0, k0, PAGE_SHIFT+1
+ bnez k0, 1f
+#endif
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR # Get faulting address
+ srl k0, k0, _PGDIR_SHIFT # get pgd only bits
+ sll k0, k0, 2
+ addu k1, k1, k0 # add in pgd offset
+ mfc0 k0, CP0_CONTEXT # get context reg
+ lw k1, (k1)
+ GET_PTE_OFF(k0) # get pte offset
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0 # add in offset
+ PTE_L k0, 0(k1) # get even pte
+ PTE_L k1, PTE_SIZE(k1) # get odd pte
+ PTE_SRL k0, k0, 6 # convert to entrylo0
+ P_MTC0 k0, CP0_ENTRYLO0 # load it
+ PTE_SRL k1, k1, 6 # convert to entrylo1
+ P_MTC0 k1, CP0_ENTRYLO1 # load it
+ tlbwr # write random tlb entry
+1: eret # return from trap
+ END(except_vec0_sb1)
+
+ /* TLB refill, EXL == 0, R4[40]00/R5000 badvaddr hwbug version */
+ LEAF(except_vec0_r45k_bvahwbug)
+ .set mips3
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR
+ srl k0, k0, _PGDIR_SHIFT
+ sll k0, k0, 2 # log2(sizeof(pgd_t)
+ addu k1, k1, k0
+ mfc0 k0, CP0_CONTEXT
+ lw k1, (k1)
+#ifndef CONFIG_64BIT_PHYS_ADDR
+ srl k0, k0, 1
+#endif
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0
+ PTE_L k0, 0(k1)
+ PTE_L k1, PTE_SIZE(k1)
+ nop /* XXX */
+ tlbp
+ PTE_SRL k0, k0, 6
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
+ mfc0 k0, CP0_INDEX
+ P_MTC0 k1, CP0_ENTRYLO1
+ bltzl k0, 1f
+ tlbwr
+1:
+ nop
+ eret
+ END(except_vec0_r45k_bvahwbug)
+
+#ifdef CONFIG_SMP
+ /* TLB refill, EXL == 0, R4000 MP badvaddr hwbug version */
+ LEAF(except_vec0_r4k_mphwbug)
+ .set mips3
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR
+ srl k0, k0, _PGDIR_SHIFT
+ sll k0, k0, 2 # log2(sizeof(pgd_t)
+ addu k1, k1, k0
+ mfc0 k0, CP0_CONTEXT
+ lw k1, (k1)
+#ifndef CONFIG_64BIT_PHYS_ADDR
+ srl k0, k0, 1
+#endif
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0
+ PTE_L k0, 0(k1)
+ PTE_L k1, PTE_SIZE(k1)
+ nop /* XXX */
+ tlbp
+ PTE_SRL k0, k0, 6
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
+ mfc0 k0, CP0_INDEX
+ P_MTC0 k1, CP0_ENTRYLO1
+ bltzl k0, 1f
+ tlbwr
+1:
+ nop
+ eret
+ END(except_vec0_r4k_mphwbug)
+#endif
+
+ /* TLB refill, EXL == 0, R4000 UP 250MHZ entrylo[01] hwbug version */
+ LEAF(except_vec0_r4k_250MHZhwbug)
+ .set mips3
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR
+ srl k0, k0, _PGDIR_SHIFT
+ sll k0, k0, 2 # log2(sizeof(pgd_t)
+ addu k1, k1, k0
+ mfc0 k0, CP0_CONTEXT
+ lw k1, (k1)
+#ifndef CONFIG_64BIT_PHYS_ADDR
+ srl k0, k0, 1
+#endif
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0
+ PTE_L k0, 0(k1)
+ PTE_L k1, PTE_SIZE(k1)
+ PTE_SRL k0, k0, 6
+ P_MTC0 zero, CP0_ENTRYLO0
+ P_MTC0 k0, CP0_ENTRYLO0
+ PTE_SRL k1, k1, 6
+ P_MTC0 zero, CP0_ENTRYLO1
+ P_MTC0 k1, CP0_ENTRYLO1
+ b 1f
+ tlbwr
+1:
+ nop
+ eret
+ END(except_vec0_r4k_250MHZhwbug)
+
+#ifdef CONFIG_SMP
+ /* TLB refill, EXL == 0, R4000 MP 250MHZ entrylo[01]+badvaddr bug version */
+ LEAF(except_vec0_r4k_MP250MHZhwbug)
+ .set mips3
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR
+ srl k0, k0, _PGDIR_SHIFT
+ sll k0, k0, 2 # log2(sizeof(pgd_t)
+ addu k1, k1, k0
+ mfc0 k0, CP0_CONTEXT
+ lw k1, (k1)
+#ifndef CONFIG_64BIT_PHYS_ADDR
+ srl k0, k0, 1
+#endif
+ and k0, k0, PTEP_INDX_MSK
+ addu k1, k1, k0
+ PTE_L k0, 0(k1)
+ PTE_L k1, PTE_SIZE(k1)
+ nop /* XXX */
+ tlbp
+ PTE_SRL k0, k0, 6
+ P_MTC0 zero, CP0_ENTRYLO0
+ P_MTC0 k0, CP0_ENTRYLO0
+ mfc0 k0, CP0_INDEX
+ PTE_SRL k1, k1, 6
+ P_MTC0 zero, CP0_ENTRYLO1
+ P_MTC0 k1, CP0_ENTRYLO1
+ bltzl k0, 1f
+ tlbwr
+1:
+ nop
+ eret
+ END(except_vec0_r4k_MP250MHZhwbug)
+#endif
+
+ __FINIT
+
+ .set noreorder
+
+/*
+ * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0:
+ * 2. A timing hazard exists for the TLBP instruction.
+ *
+ * stalling_instruction
+ * TLBP
+ *
+ * The JTLB is being read for the TLBP throughout the stall generated by the
+ * previous instruction. This is not really correct as the stalling instruction
+ * can modify the address used to access the JTLB. The failure symptom is that
+ * the TLBP instruction will use an address created for the stalling instruction
+ * and not the address held in C0_ENHI and thus report the wrong results.
+ *
+ * The software work-around is to not allow the instruction preceding the TLBP
+ * to stall - make it an NOP or some other instruction guaranteed not to stall.
+ *
+ * Errata 2 will not be fixed. This errata is also on the R5000.
+ *
+ * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
+ */
+#define R5K_HAZARD nop
+
+ /*
+ * Note for many R4k variants tlb probes cannot be executed out
+ * of the instruction cache else you get bogus results.
+ */
+ .align 5
+ NESTED(handle_tlbl, PT_SIZE, sp)
+ .set noat
+#if BCM1250_M3_WAR
+ mfc0 k0, CP0_BADVADDR
+ mfc0 k1, CP0_ENTRYHI
+ xor k0, k1
+ srl k0, k0, PAGE_SHIFT+1
+ beqz k0, 1f
+ nop
+ .set mips3
+ eret
+ .set mips0
+1:
+#endif
+invalid_tlbl:
+#ifdef TLB_OPTIMIZE
+ /* Test present bit in entry. */
+ LOAD_PTE(k0, k1)
+ R5K_HAZARD
+ tlbp
+ PTE_PRESENT(k0, k1, nopage_tlbl)
+ PTE_MAKEVALID(k0, k1)
+ PTE_RELOAD(k1, k0)
+ nop
+ b 1f
+ tlbwi
+1:
+ nop
+ .set mips3
+ eret
+ .set mips0
+#endif
+
+nopage_tlbl:
+ DO_FAULT(0)
+ END(handle_tlbl)
+
+ .align 5
+ NESTED(handle_tlbs, PT_SIZE, sp)
+ .set noat
+#ifdef TLB_OPTIMIZE
+ .set mips3
+ li k0,0
+ LOAD_PTE(k0, k1)
+ R5K_HAZARD
+ tlbp # find faulting entry
+ PTE_WRITABLE(k0, k1, nopage_tlbs)
+ PTE_MAKEWRITE(k0, k1)
+ PTE_RELOAD(k1, k0)
+ nop
+ b 1f
+ tlbwi
+1:
+ nop
+ .set mips3
+ eret
+ .set mips0
+#endif
+
+nopage_tlbs:
+ DO_FAULT(1)
+ END(handle_tlbs)
+
+ .align 5
+ NESTED(handle_mod, PT_SIZE, sp)
+ .set noat
+#ifdef TLB_OPTIMIZE
+ .set mips3
+ LOAD_PTE(k0, k1)
+ R5K_HAZARD
+ tlbp # find faulting entry
+ andi k0, k0, _PAGE_WRITE
+ beqz k0, nowrite_mod
+ PTE_L k0, (k1)
+
+ /* Present and writable bits set, set accessed and dirty bits. */
+ PTE_MAKEWRITE(k0, k1)
+
+ /* Now reload the entry into the tlb. */
+ PTE_RELOAD(k1, k0)
+ nop
+ b 1f
+ tlbwi
+1:
+ nop
+ .set mips3
+ eret
+ .set mips0
+#endif
+
+nowrite_mod:
+ DO_FAULT(1)
+ END(handle_mod)
+
diff -Nru a/arch/mips/mm-64/Makefile b/arch/mips/mm-64/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,24 @@
+#
+# Makefile for the Linux/MIPS-specific parts of the memory manager.
+#
+
+obj-y := init.o tlbex-r4k.o
+
+obj-$(CONFIG_CPU_R4300) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R4X00) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R5000) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R5432) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_RM7000) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R10000) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_SB1) += tlb-glue-sb1.o
+obj-$(CONFIG_CPU_MIPS64) += pg-r4k.o tlb-glue-r4k.o
+
+#
+# Debug TLB exception handler, currently unused
+#
+#obj-y += tlb-dbg-r4k.o
+
+AFLAGS_tlb-glue-r4k.o := -P
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/mm-64/init.c b/arch/mips/mm-64/init.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/init.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,292 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/pagemap.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/swap.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/dma.h>
+#include <asm/pgalloc.h>
+#include <asm/mmu_context.h>
+#include <asm/sections.h>
+#include <asm/tlb.h>
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+unsigned long highstart_pfn, highend_pfn;
+
+/*
+ * We have up to 8 empty zeroed pages so we can map one of the right colour
+ * when needed. This is necessary only on R4000 / R4400 SC and MC versions
+ * where we have to avoid VCED / VECI exceptions for good performance at
+ * any price. Since page is never written to after the initialization we
+ * don't have to care about aliases on other CPUs.
+ */
+unsigned long empty_zero_page, zero_page_mask;
+
+/*
+ * Not static inline because used by IP27 special magic initialization code
+ */
+unsigned long setup_zero_pages(void)
+{
+ unsigned long order, size;
+ struct page *page;
+
+ if (cpu_has_vce)
+ order = 3;
+ else
+ order = 0;
+
+ empty_zero_page = __get_free_pages(GFP_KERNEL, order);
+ if (!empty_zero_page)
+ panic("Oh boy, that early out of memory?");
+
+ page = virt_to_page(empty_zero_page);
+ while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
+ set_bit(PG_reserved, &page->flags);
+ set_page_count(page, 0);
+ page++;
+ }
+
+ size = PAGE_SIZE << order;
+ zero_page_mask = (size - 1) & PAGE_MASK;
+ memset((void *)empty_zero_page, 0, size);
+
+ return 1UL << order;
+}
+
+#ifdef CONFIG_HIGHMEM
+pte_t *kmap_pte;
+pgprot_t kmap_prot;
+
+#define kmap_get_fixmap_pte(vaddr) \
+ pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr))
+
+static void __init kmap_init(void)
+{
+ unsigned long kmap_vstart;
+
+ /* cache the first kmap pte */
+ kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
+ kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
+
+ kmap_prot = PAGE_KERNEL;
+}
+
+#endif /* CONFIG_HIGHMEM */
+
+#ifdef CONFIG_HIGHMEM
+static void __init fixrange_init (unsigned long start, unsigned long end,
+ pgd_t *pgd_base)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ int i, j;
+ unsigned long vaddr;
+
+ vaddr = start;
+ i = __pgd_offset(vaddr);
+ j = __pmd_offset(vaddr);
+ pgd = pgd_base + i;
+
+ for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
+ pmd = (pmd_t *)pgd;
+ for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
+ if (pmd_none(*pmd)) {
+ pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+ set_pmd(pmd, __pmd(pte));
+ if (pte != pte_offset_kernel(pmd, 0))
+ BUG();
+ }
+ vaddr += PMD_SIZE;
+ }
+ j = 0;
+ }
+}
+#endif
+
+#ifndef CONFIG_DISCONTIGMEM
+
+extern void pagetable_init(void);
+
+void __init paging_init(void)
+{
+ unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
+ unsigned long max_dma, high, low;
+
+ pagetable_init();
+
+#ifdef CONFIG_HIGHMEM
+ kmap_init();
+#endif
+
+ max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
+ low = max_low_pfn;
+ high = highend_pfn;
+
+#ifdef CONFIG_ISA
+ if (low < max_dma)
+ zones_size[ZONE_DMA] = low;
+ else {
+ zones_size[ZONE_DMA] = max_dma;
+ zones_size[ZONE_NORMAL] = low - max_dma;
+ }
+#else
+ zones_size[ZONE_DMA] = low;
+#endif
+#ifdef CONFIG_HIGHMEM
+ zones_size[ZONE_HIGHMEM] = high - low;
+#endif
+
+ free_area_init(zones_size);
+}
+
+#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
+
+static inline int page_is_ram(unsigned long pagenr)
+{
+ int i;
+
+ for (i = 0; i < boot_mem_map.nr_map; i++) {
+ unsigned long addr, end;
+
+ if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
+ /* not usable memory */
+ continue;
+
+ addr = PFN_UP(boot_mem_map.map[i].addr);
+ end = PFN_DOWN(boot_mem_map.map[i].addr +
+ boot_mem_map.map[i].size);
+
+ if (pagenr >= addr && pagenr < end)
+ return 1;
+ }
+
+ return 0;
+}
+
+void __init mem_init(void)
+{
+ unsigned long codesize, reservedpages, datasize, initsize;
+ unsigned long tmp, ram;
+
+#ifdef CONFIG_HIGHMEM
+ highstart_pfn = (KSEG1 - KSEG0) >> PAGE_SHIFT;
+ highmem_start_page = mem_map + highstart_pfn;
+#ifdef CONFIG_DISCONTIGMEM
+#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
+#endif
+ max_mapnr = num_physpages = highend_pfn;
+#else
+ max_mapnr = num_physpages = max_low_pfn;
+#endif
+ high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
+
+ totalram_pages += free_all_bootmem();
+ totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
+
+ reservedpages = ram = 0;
+ for (tmp = 0; tmp < max_low_pfn; tmp++)
+ if (page_is_ram(tmp)) {
+ ram++;
+ if (PageReserved(mem_map+tmp))
+ reservedpages++;
+ }
+
+#ifdef CONFIG_HIGHMEM
+ for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
+ struct page *page = mem_map + tmp;
+
+ if (!page_is_ram(tmp)) {
+ SetPageReserved(page);
+ continue;
+ }
+ ClearPageReserved(page);
+ set_bit(PG_highmem, &page->flags);
+ atomic_set(&page->count, 1);
+ __free_page(page);
+ totalhigh_pages++;
+ }
+ totalram_pages += totalhigh_pages;
+#endif
+
+ codesize = (unsigned long) &_etext - (unsigned long) &_text;
+ datasize = (unsigned long) &_edata - (unsigned long) &_etext;
+ initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
+
+ printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
+ "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
+ (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+ ram << (PAGE_SHIFT-10),
+ codesize >> 10,
+ reservedpages << (PAGE_SHIFT-10),
+ datasize >> 10,
+ initsize >> 10,
+ (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+}
+#endif /* !CONFIG_DISCONTIGMEM */
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+ /* Switch from KSEG0 to XKPHYS addresses */
+ start = (unsigned long)phys_to_virt(CPHYSADDR(start));
+ end = (unsigned long)phys_to_virt(CPHYSADDR(end));
+
+ if (start < end)
+ printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
+ (end - start) >> 10);
+
+ for (; start < end; start += PAGE_SIZE) {
+ ClearPageReserved(virt_to_page(start));
+ set_page_count(virt_to_page(start), 1);
+ free_page(start);
+ totalram_pages++;
+ }
+}
+#endif
+
+extern void prom_free_prom_memory(void);
+
+void free_initmem(void)
+{
+ unsigned long addr, page;
+
+ prom_free_prom_memory();
+
+ addr = (unsigned long) &__init_begin;
+ while (addr < (unsigned long) &__init_end) {
+ page = PAGE_OFFSET | CPHYSADDR(addr);
+ ClearPageReserved(virt_to_page(page));
+ set_page_count(virt_to_page(page), 1);
+ free_page(page);
+ totalram_pages++;
+ addr += PAGE_SIZE;
+ }
+ printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
+ (unsigned long) (__init_end - __init_begin) >> 10);
+}
diff -Nru a/arch/mips/mm-64/pg-r4k.c b/arch/mips/mm-64/pg-r4k.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/pg-r4k.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,708 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1997, 98, 99, 2000, 01, 02, 03 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+
+#include <asm/cacheops.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/bootinfo.h>
+#include <asm/mmu_context.h>
+#include <asm/cpu.h>
+
+/*
+ * Zero an entire page. Basically a simple unrolled loop should do the
+ * job but we want more performance by saving memory bus bandwidth. We
+ * have five flavours of the routine available for:
+ *
+ * - 16byte cachelines and no second level cache
+ * - 32byte cachelines second level cache
+ * - a version which handles the buggy R4600 v1.x
+ * - a version which handles the buggy R4600 v2.0
+ * - Finally a last version without fancy cache games for the SC and MC
+ * versions of R4000 and R4400.
+ */
+
+void r4k_clear_page_d16(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "cache\t%3,16(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "cache\t%3,-16(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+ : "memory");
+}
+
+void r4k_clear_page_d32(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+ : "memory");
+}
+
+
+/*
+ * This flavour of r4k_clear_page is for the R4600 V1.x. Cite from the
+ * IDT R4600 V1.7 errata:
+ *
+ * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
+ * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
+ * executed if there is no other dcache activity. If the dcache is
+ * accessed for another instruction immeidately preceding when these
+ * cache instructions are executing, it is possible that the dcache
+ * tag match outputs used by these cache instructions will be
+ * incorrect. These cache instructions should be preceded by at least
+ * four instructions that are not any kind of load or store
+ * instruction.
+ *
+ * This is not allowed: lw
+ * nop
+ * nop
+ * nop
+ * cache Hit_Writeback_Invalidate_D
+ *
+ * This is allowed: lw
+ * nop
+ * nop
+ * nop
+ * nop
+ * cache Hit_Writeback_Invalidate_D
+ */
+void r4k_clear_page_r4600_v1(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tnop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "cache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+ : "memory");
+}
+
+/*
+ * And this one is for the R4600 V2.0
+ */
+void r4k_clear_page_r4600_v2(void * page)
+{
+ unsigned int flags;
+
+ local_irq_save(flags);
+ *(volatile unsigned int *)KSEG1;
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+ : "memory");
+ local_irq_restore(flags);
+}
+
+/*
+ * The next 4 versions are optimized for all possible scache configurations
+ * of the SC / MC versions of R4000 and R4400 ...
+ *
+ * Todo: For even better performance we should have a routine optimized for
+ * every legal combination of dcache / scache linesize. When I (Ralf) tried
+ * this the kernel crashed shortly after mounting the root filesystem. CPU
+ * bug? Weirdo cache instruction semantics?
+ */
+void r4k_clear_page_s16(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "cache\t%3,16(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "cache\t%3,-16(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+ : "memory");
+}
+
+void r4k_clear_page_s32(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+ : "memory");
+}
+
+void r4k_clear_page_s64(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+ : "memory");
+}
+
+void r4k_clear_page_s128(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "sd\t$0,32(%0)\n\t"
+ "sd\t$0,40(%0)\n\t"
+ "sd\t$0,48(%0)\n\t"
+ "sd\t$0,56(%0)\n\t"
+ "daddiu\t%0,128\n\t"
+ "sd\t$0,-64(%0)\n\t"
+ "sd\t$0,-56(%0)\n\t"
+ "sd\t$0,-48(%0)\n\t"
+ "sd\t$0,-40(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+ : "memory");
+}
+
+/*
+ * This version has been tuned on an Origin. For other machines the arguments
+ * of the pref instructin may have to be tuned differently.
+ */
+void andes_clear_page(void * page)
+{
+ __asm__ __volatile__(
+ ".set\tpush\n\t"
+ ".set\tmips4\n\t"
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tpref 7,512(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tpop"
+ : "=r" (page)
+ : "0" (page), "I" (PAGE_SIZE)
+ : "memory");
+}
+
+
+/*
+ * This is still inefficient. We only can do better if we know the
+ * virtual address where the copy will be accessed.
+ */
+
+void r4k_copy_page_d16(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "cache\t%7,16(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "cache\t%7,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "cache\t%7,-16(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_D));
+}
+
+void r4k_copy_page_d32(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "cache\t%7,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_D));
+}
+
+/*
+ * Again a special version for the R4600 V1.x
+ */
+void r4k_copy_page_r4600_v1(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tnop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "cache\t%7,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_D));
+}
+
+void r4k_copy_page_r4600_v2(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+ unsigned int flags;
+
+ local_irq_save(flags);
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tnop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "cache\t%7,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_D));
+ local_irq_restore(flags);
+}
+
+/*
+ * These are for R4000SC / R4400MC
+ */
+void r4k_copy_page_s16(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "cache\t%7,16(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "cache\t%7,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "cache\t%7,-16(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_SD));
+}
+
+void r4k_copy_page_s32(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "cache\t%7,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_SD));
+}
+
+void r4k_copy_page_s64(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%6\n"
+ "1:\tcache\t%7,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "ld\t%2,16(%1)\n\t"
+ "ld\t%3,24(%1)\n\t"
+ "sd\t%2,16(%0)\n\t"
+ "sd\t%3,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "ld\t%2,-16(%1)\n\t"
+ "ld\t%3,-8(%1)\n\t"
+ "sd\t%2,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%3,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_SD));
+}
+
+void r4k_copy_page_s128(void * to, void * from)
+{
+ unsigned long dummy1, dummy2;
+ unsigned long reg1, reg2, reg3, reg4;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%8\n"
+ "1:\tcache\t%9,(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "ld\t%4,16(%1)\n\t"
+ "ld\t%5,24(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "sd\t%4,16(%0)\n\t"
+ "sd\t%5,24(%0)\n\t"
+ "ld\t%2,32(%1)\n\t"
+ "ld\t%3,40(%1)\n\t"
+ "ld\t%4,48(%1)\n\t"
+ "ld\t%5,56(%1)\n\t"
+ "sd\t%2,32(%0)\n\t"
+ "sd\t%3,40(%0)\n\t"
+ "sd\t%4,48(%0)\n\t"
+ "sd\t%5,56(%0)\n\t"
+ "daddiu\t%0,128\n\t"
+ "daddiu\t%1,128\n\t"
+ "ld\t%2,-64(%1)\n\t"
+ "ld\t%3,-56(%1)\n\t"
+ "ld\t%4,-48(%1)\n\t"
+ "ld\t%5,-40(%1)\n\t"
+ "sd\t%2,-64(%0)\n\t"
+ "sd\t%3,-56(%0)\n\t"
+ "sd\t%4,-48(%0)\n\t"
+ "sd\t%5,-40(%0)\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "ld\t%4,-16(%1)\n\t"
+ "ld\t%5,-8(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "sd\t%4,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%5,-8(%0)\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2),
+ "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
+ :"0" (to), "1" (from),
+ "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_SD));
+}
+
+/*
+ * This version has been tuned on an Origin. For other machines the arguments
+ * of the pref instructin may have to be tuned differently.
+ */
+void andes_copy_page(void * to, void * from)
+{
+ unsigned long dummy1, dummy2, reg1, reg2, reg3, reg4;
+
+ __asm__ __volatile__(
+ ".set\tpush\n\t"
+ ".set\tmips4\n\t"
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "daddiu\t$1,%0,%8\n"
+ "1:\tpref\t0,2*128(%1)\n\t"
+ "pref\t1,2*128(%0)\n\t"
+ "ld\t%2,(%1)\n\t"
+ "ld\t%3,8(%1)\n\t"
+ "ld\t%4,16(%1)\n\t"
+ "ld\t%5,24(%1)\n\t"
+ "sd\t%2,(%0)\n\t"
+ "sd\t%3,8(%0)\n\t"
+ "sd\t%4,16(%0)\n\t"
+ "sd\t%5,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "ld\t%2,-32(%1)\n\t"
+ "ld\t%3,-24(%1)\n\t"
+ "ld\t%4,-16(%1)\n\t"
+ "ld\t%5,-8(%1)\n\t"
+ "sd\t%2,-32(%0)\n\t"
+ "sd\t%3,-24(%0)\n\t"
+ "sd\t%4,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ " sd\t%5,-8(%0)\n\t"
+ ".set\tpop\n\t"
+ :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2),
+ "=&r" (reg3), "=&r" (reg4)
+ :"0" (to), "1" (from), "I" (PAGE_SIZE));
+}
diff -Nru a/arch/mips/mm-64/tlb-dbg-r4k.c b/arch/mips/mm-64/tlb-dbg-r4k.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/tlb-dbg-r4k.c Sun Aug 3 13:14:49 2003
@@ -0,0 +1,71 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ *
+ * TLB debugging routines. These perform horribly slow but can easily be
+ * modified for debugging purposes.
+ */
+#include <linux/linkage.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/ptrace.h>
+#include <asm/system.h>
+
+asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
+ unsigned long address);
+
+asmlinkage void tlb_refill_debug(struct pt_regs regs)
+{
+ show_regs(®s);
+ panic(__FUNCTION__ " called. This Does Not Happen (TM).");
+}
+
+asmlinkage void xtlb_refill_debug(struct pt_regs *regs)
+{
+ unsigned long addr;
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+
+ addr = regs->cp0_badvaddr & ~((PAGE_SIZE << 1) - 1);
+ pgd = pgd_offset(current->active_mm, addr);
+ pmd = pmd_offset(pgd, addr);
+ pte = pte_offset(pmd, addr);
+
+ write_c0_entrylo0(pte_val(pte[0]) >> 6);
+ write_c0_entrylo1(pte_val(pte[1]) >> 6);
+ __asm__ __volatile__("nop;nop;nop");
+
+ tlb_write_random();
+}
+
+asmlinkage void xtlb_mod_debug(struct pt_regs *regs)
+{
+ unsigned long addr;
+
+ addr = regs->cp0_badvaddr;
+ do_page_fault(regs, 1, addr);
+}
+
+asmlinkage void xtlb_tlbl_debug(struct pt_regs *regs)
+{
+ unsigned long addr;
+
+ addr = regs->cp0_badvaddr;
+ do_page_fault(regs, 0, addr);
+}
+
+asmlinkage void xtlb_tlbs_debug(struct pt_regs *regs)
+{
+ unsigned long addr;
+
+ addr = regs->cp0_badvaddr;
+ do_page_fault(regs, 1, addr);
+}
diff -Nru a/arch/mips/mm-64/tlb-glue-r4k.S b/arch/mips/mm-64/tlb-glue-r4k.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/tlb-glue-r4k.S Sun Aug 3 13:14:52 2003
@@ -0,0 +1,41 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <linux/init.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+ .macro __BUILD_cli
+ CLI
+ .endm
+
+ .macro __BUILD_sti
+ STI
+ .endm
+
+ .macro __BUILD_kmode
+ KMODE
+ .endm
+
+ .macro tlb_handler name interruptible writebit
+ NESTED(__\name, PT_SIZE, sp)
+ SAVE_ALL
+ dmfc0 a2, CP0_BADVADDR
+ __BUILD_\interruptible
+ li a1, \writebit
+ sd a2, PT_BVADDR(sp)
+ move a0, sp
+ jal do_page_fault
+ j ret_from_exception
+ END(__\name)
+ .endm
+
+ tlb_handler xtlb_mod kmode 1
+ tlb_handler xtlb_tlbl kmode 0
+ tlb_handler xtlb_tlbs kmode 1
diff -Nru a/arch/mips/mm-64/tlb-glue-sb1.S b/arch/mips/mm-64/tlb-glue-sb1.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/tlb-glue-sb1.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,66 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <linux/init.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/war.h>
+
+ .macro __BUILD_cli
+ CLI
+ .endm
+
+ .macro __BUILD_sti
+ STI
+ .endm
+
+ .macro __BUILD_kmode
+ KMODE
+ .endm
+
+ .macro tlb_handler name interruptible writebit
+ NESTED(__\name, PT_SIZE, sp)
+ SAVE_ALL
+ dmfc0 a2, CP0_BADVADDR
+ __BUILD_\interruptible
+ li a1, \writebit
+ sd a2, PT_BVADDR(sp)
+ move a0, sp
+ jal do_page_fault
+ j ret_from_exception
+ END(__\name)
+ .endm
+
+ .macro tlb_handler_m3 name interruptible writebit
+ NESTED(__\name, PT_SIZE, sp)
+ dmfc0 k0, CP0_BADVADDR
+ dmfc0 k1, CP0_ENTRYHI
+ xor k0, k1
+ dsrl k0, k0, PAGE_SHIFT + 1
+ bnez k0, 1f
+ SAVE_ALL
+ dmfc0 a2, CP0_BADVADDR
+ __BUILD_\interruptible
+ li a1, \writebit
+ sd a2, PT_BVADDR(sp)
+ move a0, sp
+ jal do_page_fault
+1:
+ j ret_from_exception
+ END(__\name)
+ .endm
+
+ tlb_handler xtlb_mod kmode 1
+#if BCM1250_M3_WAR
+ tlb_handler_m3 xtlb_tlbl kmode 0
+#else
+ tlb_handler xtlb_tlbl kmode 0
+#endif
+ tlb_handler xtlb_tlbs kmode 1
diff -Nru a/arch/mips/mm-64/tlbex-r4k.S b/arch/mips/mm-64/tlbex-r4k.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/mm-64/tlbex-r4k.S Sun Aug 3 13:14:46 2003
@@ -0,0 +1,197 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Silicon Graphics, Inc.
+ * Written by Ulf Carlsson (ulfc@engr.sgi.com)
+ * Copyright (C) 2002 Maciej W. Rozycki
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/threads.h>
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+#include <asm/war.h>
+
+#define _VMALLOC_START 0xc000000000000000
+
+ /*
+ * After this macro runs we have a pointer to the pte of the address
+ * that caused the fault in PTR.
+ */
+ .macro LOAD_PTE2, ptr, tmp, kaddr
+#ifdef CONFIG_SMP
+ dmfc0 \ptr, CP0_CONTEXT
+ dmfc0 \tmp, CP0_BADVADDR
+ dsra \ptr, 23 # get pgd_current[cpu]
+#else
+ dmfc0 \tmp, CP0_BADVADDR
+ dla \ptr, pgd_current
+#endif
+ bltz \tmp, \kaddr
+ ld \ptr, (\ptr)
+ dsrl \tmp, (_PGDIR_SHIFT-3) # get pgd offset in bytes
+ andi \tmp, ((_PTRS_PER_PGD - 1)<<3)
+ daddu \ptr, \tmp # add in pgd offset
+ dmfc0 \tmp, CP0_BADVADDR
+ ld \ptr, (\ptr) # get pmd pointer
+ dsrl \tmp, (_PMD_SHIFT-3) # get pmd offset in bytes
+ andi \tmp, ((_PTRS_PER_PMD - 1)<<3)
+ daddu \ptr, \tmp # add in pmd offset
+ dmfc0 \tmp, CP0_XCONTEXT
+ ld \ptr, (\ptr) # get pte pointer
+ andi \tmp, 0xff0 # get pte offset
+ daddu \ptr, \tmp
+ .endm
+
+
+ /*
+ * Ditto for the kernel table.
+ */
+ .macro LOAD_KPTE2, ptr, tmp, not_vmalloc
+ /*
+ * First, determine that the address is in/above vmalloc range.
+ */
+ dmfc0 \tmp, CP0_BADVADDR
+ dli \ptr, _VMALLOC_START
+
+ /*
+ * Now find offset into kptbl.
+ */
+ dsubu \tmp, \tmp, \ptr
+ dla \ptr, kptbl
+ dsrl \tmp, (_PAGE_SHIFT+1) # get vpn2
+ dsll \tmp, 4 # byte offset of pte
+ daddu \ptr, \ptr, \tmp
+
+ /*
+ * Determine that fault address is within vmalloc range.
+ */
+ dla \tmp, ekptbl
+ slt \tmp, \ptr, \tmp
+ beqz \tmp, \not_vmalloc # not vmalloc
+ nop
+ .endm
+
+
+ /*
+ * This places the even/odd pte pair in the page table at the pte
+ * entry pointed to by PTE into ENTRYLO0 and ENTRYLO1.
+ */
+ .macro PTE_RELOAD, pte0, pte1
+ dsrl \pte0, 6 # convert to entrylo0
+ dmtc0 \pte0, CP0_ENTRYLO0 # load it
+ dsrl \pte1, 6 # convert to entrylo1
+ dmtc0 \pte1, CP0_ENTRYLO1 # load it
+ .endm
+
+
+ .text
+ .set noreorder
+ .set mips3
+
+ __INIT
+
+ /*
+ * TLB refill handlers for the R4000 and SB1.
+ * Attention: We may only use 32 instructions / 128 bytes.
+ */
+ .align 5
+LEAF(except_vec1_r4k)
+ .set noat
+ dla k0, handle_vec1_r4k
+ jr k0
+ nop
+END(except_vec1_r4k)
+
+LEAF(except_vec1_sb1)
+#if BCM1250_M3_WAR
+ dmfc0 k0, CP0_BADVADDR
+ dmfc0 k1, CP0_ENTRYHI
+ xor k0, k1
+ dsrl k0, k0, _PAGE_SHIFT+1
+ bnez k0, 1f
+#endif
+ .set noat
+ dla k0, handle_vec1_r4k
+ jr k0
+ nop
+
+1: eret
+ nop
+END(except_vec1_sb1)
+
+ __FINIT
+
+ .align 5
+LEAF(handle_vec1_r4k)
+ .set noat
+ LOAD_PTE2 k1 k0 9f
+ ld k0, 0(k1) # get even pte
+ ld k1, 8(k1) # get odd pte
+ PTE_RELOAD k0 k1
+ b 1f
+ tlbwr
+1: nop
+ eret
+
+9: # handle the vmalloc range
+ LOAD_KPTE2 k1 k0 invalid_vmalloc_address
+ ld k0, 0(k1) # get even pte
+ ld k1, 8(k1) # get odd pte
+ PTE_RELOAD k0 k1
+ b 1f
+ tlbwr
+1: nop
+ eret
+END(handle_vec1_r4k)
+
+
+ __INIT
+
+ /*
+ * TLB refill handler for the R10000.
+ * Attention: We may only use 32 instructions / 128 bytes.
+ */
+ .align 5
+LEAF(except_vec1_r10k)
+ .set noat
+ dla k0, handle_vec1_r10k
+ jr k0
+ nop
+END(except_vec1_r10k)
+
+ __FINIT
+
+ .align 5
+LEAF(handle_vec1_r10k)
+ .set noat
+ LOAD_PTE2 k1 k0 9f
+ ld k0, 0(k1) # get even pte
+ ld k1, 8(k1) # get odd pte
+ PTE_RELOAD k0 k1
+ nop
+ tlbwr
+ eret
+
+9: # handle the vmalloc range
+ LOAD_KPTE2 k1 k0 invalid_vmalloc_address
+ ld k0, 0(k1) # get even pte
+ ld k1, 8(k1) # get odd pte
+ PTE_RELOAD k0 k1
+ nop
+ tlbwr
+ eret
+END(handle_vec1_r10k)
+
+
+ .align 5
+LEAF(invalid_vmalloc_address)
+ .set noat
+ PANIC("Invalid kernel address")
+1: b 1b
+ nop
+END(invalid_vmalloc_address)
diff -Nru a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
--- a/arch/mips/pci/Makefile Sun Aug 3 13:14:44 2003
+++ b/arch/mips/pci/Makefile Sun Aug 3 13:14:44 2003
@@ -12,7 +12,7 @@
obj-$(CONFIG_DDB5477) += pci-ddb5477.o ops-ddb5477.o
obj-$(CONFIG_HP_LASERJET) += pci-hplj.o
obj-$(CONFIG_ITE_BOARD_GEN) += ops-it8172.o
-obj-$(CONFIG_LASAT) += pci-lasat.o
+obj-$(CONFIG_LASAT) += pci-lasat.o common.o
obj-$(CONFIG_MIPS_BOARDS_GEN) += pci-mips.o
obj-$(CONFIG_MIPS_COBALT) += pci-cobalt.o
obj-$(CONFIG_MIPS_EV64120) += ops-ev64120.o
diff -Nru a/arch/mips/pci/common.c b/arch/mips/pci/common.c
--- a/arch/mips/pci/common.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/pci/common.c Sun Aug 3 13:14:49 2003
@@ -1,6 +1,9 @@
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+
void __init pcibios_fixup_bus(struct pci_bus *b)
{
- Dprintk("pcibios_fixup_bus()\n");
}
static int pcibios_enable_resources(struct pci_dev *dev, int mask)
@@ -20,7 +23,7 @@
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because of resource collisions\n",
- dev->slot_name);
+ pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -32,7 +35,7 @@
cmd |= PCI_COMMAND_MEMORY;
if (cmd != old_cmd) {
printk("PCI: Enabling device %s (%04x -> %04x)\n",
- dev->slot_name, old_cmd, cmd);
+ pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
diff -Nru a/arch/mips/pci/ops-ev64120.c b/arch/mips/pci/ops-ev64120.c
--- a/arch/mips/pci/ops-ev64120.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/pci/ops-ev64120.c Sun Aug 3 13:14:46 2003
@@ -804,7 +804,7 @@
galileo_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER;
galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
- DBG("PCI: Enabling device %s (%04x)\n", dev->slot_name, cmd);
+ DBG("PCI: Enabling device %s (%04x)\n", pci_name(dev), cmd);
}
/* Externally-expected functions. Do not change function names */
@@ -829,7 +829,7 @@
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because of resource collisions\n",
- dev->slot_name);
+ pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -839,7 +839,7 @@
}
if (cmd != old_cmd) {
DBG(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
- dev->slot_name, old_cmd, cmd);
+ pci_name(dev), old_cmd, cmd);
galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
}
@@ -884,7 +884,7 @@
addresses kilobyte aligned. */
if (size > 0x100) {
DBG(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", dev->slot_name,
+ " (%ld bytes)\n", pci_name(dev),
dev->resource - res, size);
}
diff -Nru a/arch/mips/pci/ops-ocelot.c b/arch/mips/pci/ops-ocelot.c
--- a/arch/mips/pci/ops-ocelot.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/pci/ops-ocelot.c Sun Aug 3 13:14:51 2003
@@ -757,7 +757,7 @@
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because of "
- "resource collisions\n", dev->slot_name);
+ "resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -814,7 +814,7 @@
addresses kilobyte aligned. */
if (size > 0x100) {
printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", dev->slot_name,
+ " (%ld bytes)\n", pci_name(dev),
dev->resource - res, size);
}
diff -Nru a/arch/mips/pci/pci-cobalt.c b/arch/mips/pci/pci-cobalt.c
--- a/arch/mips/pci/pci-cobalt.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/pci/pci-cobalt.c Sun Aug 3 13:14:52 2003
@@ -408,7 +408,7 @@
pci_read_config_word(dev, PCI_COMMAND, &cmd);
pci_read_config_word(dev, PCI_STATUS, &status);
- printk("PCI: Enabling device %s (%04x %04x)\n", dev->slot_name,
+ printk("PCI: Enabling device %s (%04x %04x)\n", pci_name(dev),
cmd, status);
/* We'll sort this out when we know it isn't enabled ;) */
diff -Nru a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
--- a/arch/mips/pci/pci-ip27.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/pci/pci-ip27.c Sun Aug 3 13:14:53 2003
@@ -267,7 +267,7 @@
unsigned long bus_id = (unsigned) d->bus->number;
printk("PCI: Fixing base addresses for IOC3 device %s\n",
- d->slot_name);
+ pci_name(d));
d->resource[0].start |= NODE_OFFSET(bus_to_nid[bus_id]);
d->resource[0].end |= NODE_OFFSET(bus_to_nid[bus_id]);
@@ -281,7 +281,7 @@
d->resource[0].start |=
((unsigned long) (bus_to_nid[d->bus->number]) << 32);
- printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", d->slot_name);
+ printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", pci_name(d));
/*
* Configure device to allow bus mastering, i/o and memory mapping.
@@ -311,7 +311,7 @@
unsigned int start;
unsigned short command;
- printk("PCI: Fixing isp2x00 in [bus:slot.fn] %s\n", d->slot_name);
+ printk("PCI: Fixing isp2x00 in [bus:slot.fn] %s\n", pci_name(d));
/* set the resource struct for this device */
start = (u32) (u64) bridge; /* yes, we want to lose the upper 32 bits here */
diff -Nru a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
--- a/arch/mips/pci/pci-lasat.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/pci/pci-lasat.c Sun Aug 3 13:14:50 2003
@@ -239,7 +239,4 @@
return 0;
}
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
+subsys_initcall(pcibios_init);
diff -Nru a/arch/mips/pci/pci-mips.c b/arch/mips/pci/pci-mips.c
--- a/arch/mips/pci/pci-mips.c Sun Aug 3 13:14:44 2003
+++ b/arch/mips/pci/pci-mips.c Sun Aug 3 13:14:44 2003
@@ -291,16 +291,20 @@
else if ((size == 4) && (where & 3))
return PCIBIOS_BAD_REGISTER_NUMBER;
- if (mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
- &data))
- return -1;
+ if (size == 4)
+ data = val;
+ else {
+ if (mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
+ where, &data))
+ return -1;
- if (size == 1)
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- else if (size == 2)
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
+ if (size == 1)
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ else if (size == 2)
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ }
if (mips_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
&data))
diff -Nru a/arch/mips/pci/pci-ocelot-c.c b/arch/mips/pci/pci-ocelot-c.c
--- a/arch/mips/pci/pci-ocelot-c.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/pci/pci-ocelot-c.c Sun Aug 3 13:14:50 2003
@@ -348,7 +348,7 @@
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because of "
- "resource collisions\n", dev->slot_name);
+ "resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -402,7 +402,7 @@
addresses kilobyte aligned. */
if (size > 0x100) {
printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", dev->slot_name,
+ " (%ld bytes)\n", pci_name(dev),
dev->resource - res, size);
}
diff -Nru a/arch/mips/pci/pci-ocelot-g.c b/arch/mips/pci/pci-ocelot-g.c
--- a/arch/mips/pci/pci-ocelot-g.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/pci/pci-ocelot-g.c Sun Aug 3 13:14:48 2003
@@ -370,7 +370,7 @@
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because of "
- "resource collisions\n", dev->slot_name);
+ "resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -424,7 +424,7 @@
addresses kilobyte aligned. */
if (size > 0x100) {
printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", dev->slot_name,
+ " (%ld bytes)\n", pci_name(dev),
dev->resource - res, size);
}
diff -Nru a/arch/mips/sgi-ip22/ip22-berr.c b/arch/mips/sgi-ip22/ip22-berr.c
--- a/arch/mips/sgi-ip22/ip22-berr.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sgi-ip22/ip22-berr.c Sun Aug 3 13:14:48 2003
@@ -1,7 +1,7 @@
/*
* ip22-berr.c: Bus error handling.
*
- * Copyright (C) 2002 Ladislav Michl
+ * Copyright (C) 2002, 2003 Ladislav Michl (ladis@linux-mips.org)
*/
#include <linux/init.h>
@@ -14,20 +14,26 @@
#include <asm/branch.h>
#include <asm/sgi/mc.h>
#include <asm/sgi/hpc3.h>
+#include <asm/sgi/ioc.h>
+#include <asm/sgi/ip22.h>
static unsigned int cpu_err_stat; /* Status reg for CPU */
static unsigned int gio_err_stat; /* Status reg for GIO */
static unsigned int cpu_err_addr; /* Error address reg for CPU */
static unsigned int gio_err_addr; /* Error address reg for GIO */
+static unsigned int extio_stat;
+static unsigned int hpc3_berr_stat; /* Bus error interrupt status */
static void save_and_clear_buserr(void)
{
- /* save memory controler's error status registers */
+ /* save status registers */
cpu_err_addr = sgimc->cerr;
cpu_err_stat = sgimc->cstat;
gio_err_addr = sgimc->gerr;
gio_err_stat = sgimc->gstat;
+ extio_stat = ip22_is_fullhouse() ? sgioc->extio : (sgint->errstat << 4);
+ hpc3_berr_stat = hpc3c0->bestat;
sgimc->cstat = sgimc->gstat = 0;
}
@@ -37,6 +43,17 @@
static void print_buserr(void)
{
+ if (extio_stat & EXTIO_MC_BUSERR)
+ printk(KERN_ALERT "MC Bus Error\n");
+ if (extio_stat & EXTIO_HPC3_BUSERR)
+ printk(KERN_ALERT "HPC3 Bus Error 0x%x:<id=0x%x,%s,lane=0x%x>\n",
+ hpc3_berr_stat,
+ (hpc3_berr_stat & HPC3_BESTAT_PIDMASK) >>
+ HPC3_BESTAT_PIDSHIFT,
+ (hpc3_berr_stat & HPC3_BESTAT_CTYPE) ? "PIO" : "DMA",
+ hpc3_berr_stat & HPC3_BESTAT_BLMASK);
+ if (extio_stat & EXTIO_EISA_BUSERR)
+ printk(KERN_ALERT "EISA Bus Error\n");
if (cpu_err_stat & CPU_ERRMASK)
printk(KERN_ALERT "CPU error 0x%x<%s%s%s%s%s%s> @ 0x%08x\n",
cpu_err_stat,
diff -Nru a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
--- a/arch/mips/sgi-ip22/ip22-int.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sgi-ip22/ip22-int.c Sun Aug 3 13:14:48 2003
@@ -264,11 +264,10 @@
void indy_buserror_irq(struct pt_regs *regs)
{
- int cpu = smp_processor_id();
int irq = SGI_BUSERR_IRQ;
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
ip22_be_interrupt(irq, regs);
irq_exit();
}
diff -Nru a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
--- a/arch/mips/sgi-ip22/ip22-setup.c Sun Aug 3 13:14:45 2003
+++ b/arch/mips/sgi-ip22/ip22-setup.c Sun Aug 3 13:14:45 2003
@@ -40,8 +40,6 @@
extern struct rtc_ops ip22_rtc_ops;
-#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
-
unsigned long sgi_gfxaddr;
/*
@@ -88,9 +86,7 @@
/* Now enable boardcaches, if any. */
indy_sc_init();
#endif
-#ifdef CONFIG_VT
- conswitchp = NULL;
-#endif
+
/* Set the IO space to some sane value */
set_io_port_base (KSEG1ADDR (0x00080000));
@@ -137,11 +133,12 @@
#endif
#ifdef CONFIG_VT
+ conswitchp = &dummy_con;
#ifdef CONFIG_SGI_NEWPORT_CONSOLE
if (ctype && *ctype == 'g'){
unsigned long *gfxinfo;
long (*__vec)(void) =
- (void *) *(long *)(long)((PROMBLOCK)->pvector + 0x20);
+ (void *) *(long *)((PROMBLOCK)->pvector + 0x20);
gfxinfo = (unsigned long *)__vec();
sgi_gfxaddr = ((gfxinfo[1] >= 0xa0000000
@@ -153,29 +150,19 @@
conswitchp = &newport_con;
screen_info = (struct screen_info) {
- 0, 0, /* orig-x, orig-y */
- 0, /* unused */
- 0, /* orig_video_page */
- 0, /* orig_video_mode */
- 160, /* orig_video_cols */
- 0, 0, 0, /* unused, ega_bx, unused */
- 64, /* orig_video_lines */
- 0, /* orig_video_isVGA */
- 16 /* orig_video_points */
+ .orig_x = 0,
+ .orig_y = 0,
+ .orig_video_page = 0,
+ .orig_video_mode = 0,
+ .orig_video_cols = 160,
+ .orig_video_ega_bx = 0,
+ .orig_video_lines = 64,
+ .orig_video_isVGA = 0,
+ .orig_video_points = 16,
};
}
}
#endif
-#ifdef CONFIG_DUMMY_CONSOLE
- /* Either if newport console wasn't used or failed to initialize. */
-#ifdef CONFIG_SGI_NEWPORT_CONSOLE
- if(conswitchp != &newport_con)
-#endif
- conswitchp = &dummy_con;
-#endif
#endif
rtc_ops = &ip22_rtc_ops;
-#ifdef CONFIG_PSMOUSE
- aux_device_present = 0xaa;
-#endif
}
diff -Nru a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
--- a/arch/mips/sgi-ip22/ip22-time.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sgi-ip22/ip22-time.c Sun Aug 3 13:14:46 2003
@@ -92,15 +92,15 @@
/* Start the counter. */
sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
SGINT_TCWORD_MRGEN);
- sgint->tcnt2 = (SGINT_TCSAMP_COUNTER & 0xff);
- sgint->tcnt2 = (SGINT_TCSAMP_COUNTER >> 8);
+ sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 0xff;
+ sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 8;
/* Get initial counter invariant */
ct0 = read_c0_count();
/* Latch and spin until top byte of counter2 is zero */
do {
- sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT);
+ sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
lsb = sgint->tcnt2;
msb = sgint->tcnt2;
ct1 = read_c0_count();
@@ -112,9 +112,10 @@
/*
* Return the difference, this is how far the r4k counter increments
* for every 1/HZ seconds. We round off the nearest 1 MHz of master
- * clock (= 1000000 / 100 / 2 = 5000 count).
+ * clock (= 1000000 / HZ / 2).
*/
- return ((ct1 - ct0) / 5000) * 5000;
+ //return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);
+ return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
}
/*
@@ -126,15 +127,13 @@
unsigned long r4k_tick;
/*
- * Figure out the r4k offset, the algorithm is very simple
- * and works in _all_ cases as long as the 8254 counter
- * register itself works ok (as an interrupt driving timer
- * it does not because of bug, this is why we are using
- * the onchip r4k counter/compare register to serve this
- * purpose, but for r4k_offset calculation it will work
- * ok for us). There are other very complicated ways
- * of performing this calculation but this one works just
- * fine so I am not going to futz around. ;-)
+ * Figure out the r4k offset, the algorithm is very simple and works in
+ * _all_ cases as long as the 8254 counter register itself works ok (as
+ * an interrupt driving timer it does not because of bug, this is why
+ * we are using the onchip r4k counter/compare register to serve this
+ * purpose, but for r4k_offset calculation it will work ok for us).
+ * There are other very complicated ways of performing this calculation
+ * but this one works just fine so I am not going to futz around. ;-)
*/
printk(KERN_INFO "Calibrating system timer... ");
dosample(); /* Prime cache. */
@@ -161,8 +160,9 @@
} else
r4k_tick = r4k_ticks[0];
- printk("%d [%d.%02d MHz CPU]\n", (int) r4k_tick,
- (int) (r4k_tick / 5000), (int) (r4k_tick % 5000) / 50);
+ printk("%d [%d.%04d MHz CPU]\n", (int) r4k_tick,
+ (int) (r4k_tick / (500000 / HZ)),
+ (int) (r4k_tick % (500000 / HZ)));
mips_counter_frequency = r4k_tick * HZ;
}
@@ -170,13 +170,12 @@
/* Generic SGI handler for (spurious) 8254 interrupts */
void indy_8254timer_irq(struct pt_regs *regs)
{
- int cpu = smp_processor_id();
int irq = SGI_8254_0_IRQ;
ULONG cnt;
char c;
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
ArcRead(0, &c, 1, &cnt);
ArcEnterInteractiveMode();
@@ -185,16 +184,12 @@
void indy_r4k_timer_interrupt(struct pt_regs *regs)
{
- int cpu = smp_processor_id();
int irq = SGI_TIMER_IRQ;
irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
+ kstat_this_cpu.irqs[irq]++;
timer_interrupt(irq, NULL, regs);
irq_exit();
-
- if (softirq_pending(cpu))
- do_softirq();
}
extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
diff -Nru a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
--- a/arch/mips/sgi-ip27/ip27-init.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/sgi-ip27/ip27-init.c Sun Aug 3 13:14:52 2003
@@ -360,7 +360,6 @@
int cpu = smp_processor_id();
cnodeid_t cnode = get_compact_nodeid();
- TLBMISS_HANDLER_SETUP();
#if 0
intr_init();
#endif
@@ -472,7 +471,7 @@
LAUNCH_SLAVE(cputonasid(num_cpus),cputoslice(num_cpus),
(launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
0, (void *)((unsigned long)idle->thread_info +
- KERNEL_STACK_SIZE - 32), (void *)idle);
+ THREAD_SIZE - 32), (void *)idle);
/*
* Now optimistically set the mapping arrays. We
diff -Nru a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c
--- a/arch/mips/sgi-ip27/ip27-klnuma.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/sgi-ip27/ip27-klnuma.c Sun Aug 3 13:14:47 2003
@@ -10,6 +10,7 @@
#include <linux/string.h>
#include <asm/page.h>
+#include <asm/sections.h>
#include <asm/smp.h>
#include <asm/sn/types.h>
#include <asm/sn/arch.h>
@@ -82,11 +83,10 @@
/* XXX - When the BTE works, we should use it instead of this. */
static __init void copy_kernel(nasid_t dest_nasid)
{
- extern char _stext, _etext;
unsigned long dest_kern_start, source_start, source_end, kern_size;
- source_start = (unsigned long)&_stext;
- source_end = (unsigned long)&_etext;
+ source_start = (unsigned long) _stext;
+ source_end = (unsigned long) _etext;
kern_size = source_end - source_start;
dest_kern_start = CHANGE_ADDR_NASID(MAPPED_KERN_RO_TO_K0(source_start),
diff -Nru a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
--- a/arch/mips/sgi-ip27/ip27-memory.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sgi-ip27/ip27-memory.c Sun Aug 3 13:14:46 2003
@@ -26,6 +26,7 @@
#include <asm/sn/klconfig.h>
#include <asm/sn/arch.h>
#include <asm/mmzone.h>
+#include <asm/sections.h>
/* ip27-klnuma.c */
extern pfn_t node_getfirstfree(cnodeid_t cnode);
@@ -211,11 +212,6 @@
printk("Total memory probed : 0x%lx pages\n", numpages);
}
-int __init page_is_ram(unsigned long pagenr)
-{
- return 1;
-}
-
void __init
prom_free_prom_memory (void)
{
@@ -259,8 +255,6 @@
void __init mem_init(void)
{
- extern char _stext, _etext, _fdata, _edata;
- extern char __init_begin, __init_end;
extern unsigned long setup_zero_pages(void);
cnodeid_t nid;
unsigned long tmp;
@@ -319,9 +313,9 @@
totalram_pages -= setup_zero_pages(); /* This comes from node 0 */
- codesize = (unsigned long) &_etext - (unsigned long) &_stext;
- datasize = (unsigned long) &_edata - (unsigned long) &_fdata;
- initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
+ codesize = (unsigned long) _etext - (unsigned long) _stext;
+ datasize = (unsigned long) _edata - (unsigned long) _fdata;
+ initsize = (unsigned long) __init_end - (unsigned long) __init_begin;
tmp = (unsigned long) nr_free_pages();
printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, "
diff -Nru a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
--- a/arch/mips/sgi-ip27/ip27-timer.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/sgi-ip27/ip27-timer.c Sun Aug 3 13:14:47 2003
@@ -107,7 +107,7 @@
if (LOCAL_HUB_L(PI_RT_COUNT) >= ct_cur[cpu])
goto again;
- kstat_cpu(cpu).irqs[irq]++; /* kstat only for bootcpu? */
+ kstat_this_cpu.irqs[irq]++; /* kstat only for bootcpu? */
if (cpu == 0)
do_timer(regs);
@@ -135,9 +135,6 @@
write_sequnlock(&xtime_lock);
irq_exit();
-
- if (softirq_pending(cpu))
- do_softirq();
}
unsigned long ip27_do_gettimeoffset(void)
diff -Nru a/arch/mips/sgi-ip32/crime.c b/arch/mips/sgi-ip32/crime.c
--- a/arch/mips/sgi-ip32/crime.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sgi-ip32/crime.c Sun Aug 3 13:14:46 2003
@@ -3,13 +3,17 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2001 Keith M Wesolowski
+ * Copyright (C) 2001, 2003 Keith M Wesolowski
*/
+#include <asm/ip32/crime.h>
+#include <asm/ptrace.h>
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/mipsregs.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
-#include <asm/ip32/crime.h>
-#include <asm/ptrace.h>
+#include <linux/interrupt.h>
void __init crime_init (void)
{
@@ -18,32 +22,75 @@
id = (id & CRIME_ID_IDBITS) >> 4;
- printk ("CRIME id %1lx rev %ld detected at %016lx\n", id, rev,
+ printk ("CRIME id %1lx rev %ld detected at 0x%016lx\n", id, rev,
(unsigned long) CRIME_BASE);
}
-/* XXX Like on Sun, these give us various useful information to printk. */
-void crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
u64 memerr = crime_read_64 (CRIME_MEM_ERROR_STAT);
u64 addr = crime_read_64 (CRIME_MEM_ERROR_ADDR);
+ int fatal = 0;
+
memerr &= CRIME_MEM_ERROR_STAT_MASK;
+ addr &= CRIME_MEM_ERROR_ADDR_MASK;
+
+ printk("CRIME memory error at 0x%08lx ST 0x%08lx<", addr, memerr);
- printk ("CRIME memory error at physaddr 0x%08lx status %08lx\n",
- addr << 2, memerr);
+ if (memerr & CRIME_MEM_ERROR_INV)
+ printk("INV,");
+ if (memerr & CRIME_MEM_ERROR_ECC) {
+ u64 ecc_syn = crime_read_64(CRIME_MEM_ERROR_ECC_SYN);
+ u64 ecc_gen = crime_read_64(CRIME_MEM_ERROR_ECC_CHK);
+
+ ecc_syn &= CRIME_MEM_ERROR_ECC_SYN_MASK;
+ ecc_gen &= CRIME_MEM_ERROR_ECC_CHK_MASK;
+
+ printk("ECC,SYN=0x%08lx,GEN=0x%08lx,", ecc_syn, ecc_gen);
+ }
+ if (memerr & CRIME_MEM_ERROR_MULTIPLE) {
+ fatal = 1;
+ printk("MULTIPLE,");
+ }
+ if (memerr & CRIME_MEM_ERROR_HARD_ERR) {
+ fatal = 1;
+ printk("HARD,");
+ }
+ if (memerr & CRIME_MEM_ERROR_SOFT_ERR)
+ printk("SOFT,");
+ if (memerr & CRIME_MEM_ERROR_CPU_ACCESS)
+ printk("CPU,");
+ if (memerr & CRIME_MEM_ERROR_VICE_ACCESS)
+ printk("VICE,");
+ if (memerr & CRIME_MEM_ERROR_GBE_ACCESS)
+ printk("GBE,");
+ if (memerr & CRIME_MEM_ERROR_RE_ACCESS)
+ printk("RE,REID=0x%02lx,", (memerr & CRIME_MEM_ERROR_RE_ID)>>8);
+ if (memerr & CRIME_MEM_ERROR_MACE_ACCESS)
+ printk("MACE,MACEID=0x%02lx,", memerr & CRIME_MEM_ERROR_MACE_ID);
crime_write_64 (CRIME_MEM_ERROR_STAT, 0);
+
+ if (fatal) {
+ printk("FATAL>\n");
+ panic("Fatal memory error detected, halting\n");
+ } else {
+ printk("NONFATAL>\n");
+ }
+
+ return IRQ_HANDLED;
}
-void crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
u64 cpuerr = crime_read_64 (CRIME_CPU_ERROR_STAT);
u64 addr = crime_read_64 (CRIME_CPU_ERROR_ADDR);
cpuerr &= CRIME_CPU_ERROR_MASK;
addr <<= 2UL;
- printk ("CRIME CPU interface error detected at %09lx status %08lx\n",
+ printk ("CRIME CPU error detected at 0x%09lx status 0x%08lx\n",
addr, cpuerr);
crime_write_64 (CRIME_CPU_ERROR_STAT, 0);
+ return IRQ_HANDLED;
}
diff -Nru a/arch/mips/sgi-ip32/ip32-berr.c b/arch/mips/sgi-ip32/ip32-berr.c
--- a/arch/mips/sgi-ip32/ip32-berr.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/sgi-ip32/ip32-berr.c Sun Aug 3 13:14:50 2003
@@ -9,6 +9,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/sched.h>
#include <asm/traps.h>
#include <asm/uaccess.h>
#include <asm/addrspace.h>
diff -Nru a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
--- a/arch/mips/sgi-ip32/ip32-irq.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sgi-ip32/ip32-irq.c Sun Aug 3 13:14:48 2003
@@ -28,6 +28,10 @@
#include <asm/ip32/mace.h>
#include <asm/signal.h>
+/* issue a PIO read to make sure no PIO writes are pending */
+#define flush_crime_bus() crime_read_64(CRIME_CONTROL);
+#define flush_mace_bus() mace_read_64(MACEISA_FLASH_NIC_REG);
+
#undef DEBUG_IRQ
#ifdef DEBUG_IRQ
#define DBG(x...) printk(x)
@@ -103,9 +107,9 @@
*/
/* Some initial interrupts to set up */
-extern void crime_memerr_intr (unsigned int irq, void *dev_id,
+extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
struct pt_regs *regs);
-extern void crime_cpuerr_intr (unsigned int irq, void *dev_id,
+extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
struct pt_regs *regs);
struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
@@ -163,13 +167,13 @@
* We get to split the register in half and do faster lookups.
*/
+static u64 crime_mask=0;
+
static void enable_crime_irq(unsigned int irq)
{
- u64 crime_mask;
unsigned long flags;
local_irq_save(flags);
- crime_mask = crime_read_64(CRIME_INT_MASK);
crime_mask |= 1 << (irq - 1);
crime_write_64(CRIME_INT_MASK, crime_mask);
local_irq_restore(flags);
@@ -177,35 +181,35 @@
static unsigned int startup_crime_irq(unsigned int irq)
{
+ crime_mask = crime_read_64(CRIME_INT_MASK);
enable_crime_irq(irq);
return 0; /* This is probably not right; we could have pending irqs */
}
static void disable_crime_irq(unsigned int irq)
{
- u64 crime_mask;
unsigned long flags;
local_irq_save(flags);
- crime_mask = crime_read_64(CRIME_INT_MASK);
crime_mask &= ~(1 << (irq - 1));
crime_write_64(CRIME_INT_MASK, crime_mask);
+ flush_crime_bus();
local_irq_restore(flags);
}
static void mask_and_ack_crime_irq (unsigned int irq)
{
- u64 crime_mask;
unsigned long flags;
/* Edge triggered interrupts must be cleared. */
if ((irq >= CRIME_GBE0_IRQ && irq <= CRIME_GBE3_IRQ)
|| (irq >= CRIME_RE_EMPTY_E_IRQ && irq <= CRIME_RE_IDLE_E_IRQ)
|| (irq >= CRIME_SOFT0_IRQ && irq <= CRIME_SOFT2_IRQ)) {
+ u64 crime_int;
local_irq_save(flags);
- crime_mask = crime_read_64(CRIME_HARD_INT);
- crime_mask &= ~(1 << (irq - 1));
- crime_write_64(CRIME_HARD_INT, crime_mask);
+ crime_int = crime_read_64(CRIME_HARD_INT);
+ crime_int &= ~(1 << (irq - 1));
+ crime_write_64(CRIME_HARD_INT, crime_int);
local_irq_restore(flags);
}
disable_crime_irq(irq);
@@ -236,42 +240,39 @@
* next chunk of the CRIME register in one piece.
*/
+static u32 macepci_mask;
+
static void enable_macepci_irq(unsigned int irq)
{
- u32 mace_mask;
- u64 crime_mask;
unsigned long flags;
local_irq_save(flags);
- mace_mask = mace_read_32(MACEPCI_CONTROL);
- mace_mask |= MACEPCI_CONTROL_INT(irq - 9);
- mace_write_32(MACEPCI_CONTROL, mace_mask);
- /*
- * In case the CRIME interrupt isn't enabled, we must enable it;
- * however, we never disable interrupts at that level.
- */
- crime_mask = crime_read_64(CRIME_INT_MASK);
- crime_mask |= 1 << (irq - 1);
- crime_write_64(CRIME_INT_MASK, crime_mask);
+ macepci_mask |= MACEPCI_CONTROL_INT(irq - 9);
+ mace_write_32(MACEPCI_CONTROL, macepci_mask);
+ crime_mask |= 1 << (irq - 1);
+ crime_write_64(CRIME_INT_MASK, crime_mask);
local_irq_restore(flags);
}
static unsigned int startup_macepci_irq(unsigned int irq)
{
- enable_macepci_irq (irq);
-
- return 0; /* XXX */
+ crime_mask = crime_read_64 (CRIME_INT_MASK);
+ macepci_mask = mace_read_32(MACEPCI_CONTROL);
+ enable_macepci_irq (irq);
+ return 0;
}
static void disable_macepci_irq(unsigned int irq)
{
- u32 mace_mask;
unsigned long flags;
local_irq_save(flags);
- mace_mask = mace_read_32(MACEPCI_CONTROL);
- mace_mask &= ~MACEPCI_CONTROL_INT(irq - 9);
- mace_write_32(MACEPCI_CONTROL, mace_mask);
+ crime_mask &= ~(1 << (irq - 1));
+ crime_write_64(CRIME_INT_MASK, crime_mask);
+ flush_crime_bus();
+ macepci_mask &= ~MACEPCI_CONTROL_INT(irq - 9);
+ mace_write_32(MACEPCI_CONTROL, macepci_mask);
+ flush_mace_bus();
local_irq_restore(flags);
}
@@ -299,10 +300,10 @@
* CRIME register.
*/
+u32 maceisa_mask = 0;
+
static void enable_maceisa_irq (unsigned int irq)
{
- u64 crime_mask;
- u32 mace_mask;
unsigned int crime_int = 0;
unsigned long flags;
@@ -321,46 +322,56 @@
}
DBG ("crime_int %016lx enabled\n", crime_int);
local_irq_save(flags);
- crime_mask = crime_read_64(CRIME_INT_MASK);
crime_mask |= crime_int;
crime_write_64(CRIME_INT_MASK, crime_mask);
- mace_mask = mace_read_32(MACEISA_INT_MASK);
- mace_mask |= 1 << (irq - 33);
- mace_write_32(MACEISA_INT_MASK, mace_mask);
+ maceisa_mask |= 1 << (irq - 33);
+ mace_write_32(MACEISA_INT_MASK, maceisa_mask);
local_irq_restore(flags);
}
static unsigned int startup_maceisa_irq (unsigned int irq)
{
+ crime_mask = crime_read_64 (CRIME_INT_MASK);
+ maceisa_mask = mace_read_32(MACEISA_INT_MASK);
enable_maceisa_irq(irq);
return 0;
}
static void disable_maceisa_irq(unsigned int irq)
{
- u32 mace_mask;
+ unsigned int crime_int = 0;
unsigned long flags;
local_irq_save(flags);
- mace_mask = mace_read_32(MACEISA_INT_MASK);
- mace_mask &= ~(1 << (irq - 33));
- mace_write_32(MACEISA_INT_MASK, mace_mask);
+ maceisa_mask &= ~(1 << (irq - 33));
+ if(!(maceisa_mask & MACEISA_AUDIO_INT))
+ crime_int |= MACE_AUDIO_INT;
+ if(!(maceisa_mask & MACEISA_MISC_INT))
+ crime_int |= MACE_MISC_INT;
+ if(!(maceisa_mask & MACEISA_SUPERIO_INT))
+ crime_int |= MACE_SUPERIO_INT;
+ crime_mask &= ~crime_int;
+ crime_write_64(CRIME_INT_MASK, crime_mask);
+ flush_crime_bus();
+ mace_write_32(MACEISA_INT_MASK, maceisa_mask);
+ flush_mace_bus();
local_irq_restore(flags);
}
static void mask_and_ack_maceisa_irq(unsigned int irq)
{
- u32 mace_mask;
+ u32 mace_int;
unsigned long flags;
switch (irq) {
case MACEISA_PARALLEL_IRQ:
case MACEISA_SERIAL1_TDMAPR_IRQ:
case MACEISA_SERIAL2_TDMAPR_IRQ:
+ /* edge triggered */
local_irq_save(flags);
- mace_mask = mace_read_32(MACEISA_INT_STAT);
- mace_mask &= ~(1 << (irq - 33));
- mace_write_32(MACEISA_INT_STAT, mace_mask);
+ mace_int = mace_read_32(MACEISA_INT_STAT);
+ mace_int &= ~(1 << (irq - 33));
+ mace_write_32(MACEISA_INT_STAT, mace_int);
local_irq_restore(flags);
break;
}
@@ -392,11 +403,9 @@
static void enable_mace_irq(unsigned int irq)
{
- u64 crime_mask;
unsigned long flags;
local_irq_save(flags);
- crime_mask = crime_read_64 (CRIME_INT_MASK);
crime_mask |= 1 << (irq - 1);
crime_write_64 (CRIME_INT_MASK, crime_mask);
local_irq_restore (flags);
@@ -404,19 +413,19 @@
static unsigned int startup_mace_irq(unsigned int irq)
{
+ crime_mask = crime_read_64 (CRIME_INT_MASK);
enable_mace_irq(irq);
return 0;
}
static void disable_mace_irq(unsigned int irq)
{
- u64 crime_mask;
unsigned long flags;
local_irq_save(flags);
- crime_mask = crime_read_64 (CRIME_INT_MASK);
crime_mask &= ~(1 << (irq - 1));
crime_write_64 (CRIME_INT_MASK, crime_mask);
+ flush_crime_bus();
local_irq_restore(flags);
}
@@ -446,9 +455,10 @@
u32 mace;
printk ("Unknown interrupt occurred!\n");
- printk ("cp0_status: %08x\tcp0_cause: %08x\n",
- read_c0_status(),
- read_c0_cause());
+ printk ("cp0_status: %08x\n",
+ read_c0_status ());
+ printk ("cp0_cause: %08x\n",
+ read_c0_cause ());
crime = crime_read_64 (CRIME_INT_MASK);
printk ("CRIME interrupt mask: %016lx\n", crime);
crime = crime_read_64 (CRIME_INT_STAT);
@@ -465,7 +475,7 @@
printk("Register dump:\n");
show_regs(regs);
- printk("Please mail this report to linux-mips@oss.sgi.com\n");
+ printk("Please mail this report to linux-mips@linux-mips.org\n");
printk("Spinning...");
while(1) ;
}
@@ -474,43 +484,18 @@
void ip32_irq0(struct pt_regs *regs)
{
u64 crime_int;
- u64 crime_mask;
int irq = 0;
- unsigned long flags;
- local_irq_save(flags);
- /* disable crime interrupts */
- crime_mask = crime_read_64(CRIME_INT_MASK);
- crime_write_64(CRIME_INT_MASK, 0);
-
- crime_int = crime_read_64(CRIME_INT_STAT);
-
- if (crime_int & CRIME_MACE_INT_MASK) {
- crime_int &= CRIME_MACE_INT_MASK;
- irq = ffs (crime_int);
- } else if (crime_int & CRIME_MACEISA_INT_MASK) {
- u32 mace_int;
- mace_int = mace_read_32 (MACEISA_INT_STAT);
- if (mace_int == 0)
- irq = 0;
- else
- irq = ffs (mace_int) + 32;
- } else if (crime_int & CRIME_MACEPCI_INT_MASK) {
- crime_int &= CRIME_MACEPCI_INT_MASK;
- crime_int >>= 8;
- irq = ffs (crime_int) + 8;
- } else if (crime_int & 0xffff0000) {
- crime_int >>= 16;
- irq = ffs (crime_int) + 16;
+ crime_int = crime_read_64(CRIME_INT_STAT) & crime_mask;
+ irq = ffs(crime_int);
+ crime_int = 1ULL << (irq - 1);
+
+ if (crime_int & CRIME_MACEISA_INT_MASK) {
+ u32 mace_int = mace_read_32 (MACEISA_INT_STAT) & maceisa_mask;
+ irq = ffs (mace_int) + 32;
}
- if (irq == 0)
- ip32_unknown_interrupt(regs);
DBG("*irq %u*\n", irq);
do_IRQ(irq, regs);
-
- /* enable crime interrupts */
- crime_write_64(CRIME_INT_MASK, crime_mask);
- local_irq_restore (flags);
}
void ip32_irq1(struct pt_regs *regs)
diff -Nru a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c
--- a/arch/mips/sgi-ip32/ip32-reset.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/sgi-ip32/ip32-reset.c Sun Aug 3 13:14:52 2003
@@ -14,6 +14,7 @@
#include <linux/notifier.h>
#include <linux/delay.h>
#include <linux/ds17287rtc.h>
+#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/reboot.h>
@@ -141,7 +142,7 @@
add_timer(&power_timer);
}
-static void ip32_rtc_int(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t ip32_rtc_int(int irq, void *dev_id, struct pt_regs *regs)
{
volatile unsigned char reg_c;
@@ -159,6 +160,7 @@
printk(KERN_DEBUG "Power button pressed\n");
ip32_power_button();
+ return IRQ_HANDLED;
}
static int panic_event(struct notifier_block *this, unsigned long event,
diff -Nru a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
--- a/arch/mips/sgi-ip32/ip32-setup.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/sgi-ip32/ip32-setup.c Sun Aug 3 13:14:52 2003
@@ -60,7 +60,10 @@
#endif
extern void ip32_time_init(void);
-extern void ip32_reboot_setup(void);
+extern void ip32_be_init(void);
+extern void __init ip32_timer_setup (struct irqaction *irq);
+extern void __init crime_init (void);
+
void __init ip32_setup(void)
{
@@ -94,12 +97,7 @@
rtc_ops = &ip32_rtc_ops;
board_be_init = ip32_be_init;
board_time_init = ip32_time_init;
+ board_timer_setup = ip32_timer_setup;
- crime_init ();
-}
-
-int __init page_is_ram (unsigned long pagenr)
-{
- /* XXX: to do? */
- return 1;
+ crime_init();
}
diff -Nru a/arch/mips/sgi-ip32/ip32-timer.c b/arch/mips/sgi-ip32/ip32-timer.c
--- a/arch/mips/sgi-ip32/ip32-timer.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/sgi-ip32/ip32-timer.c Sun Aug 3 13:14:51 2003
@@ -45,14 +45,20 @@
#define USECS_PER_JIFFY (1000000/HZ)
+static irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs);
+
void __init ip32_timer_setup (struct irqaction *irq)
{
u64 crime_time;
u32 cc_tick;
+
+ write_c0_count(0);
+ irq->handler = cc_timer_interrupt;
+
printk("Calibrating system timer... ");
- crime_time = crime_read_64 (CRIME_TIME) & CRIME_TIME_MASK;
+ crime_time = crime_read_64(CRIME_TIME) & CRIME_TIME_MASK;
cc_tick = read_c0_count();
while ((crime_read_64 (CRIME_TIME) & CRIME_TIME_MASK) - crime_time
@@ -60,7 +66,8 @@
;
cc_tick = read_c0_count() - cc_tick;
cc_interval = cc_tick / HZ * (1000 / WAIT_MS);
- /* The round-off seems unnecessary; in testing, the error of the
+ /*
+ * The round-off seems unnecessary; in testing, the error of the
* above procedure is < 100 ticks, which means it gets filtered
* out by the HZ adjustment.
*/
@@ -69,12 +76,14 @@
printk("%d MHz CPU detected\n", (int) (cc_interval / PER_MHZ));
setup_irq (CLOCK_IRQ, irq);
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+ /* Set ourselves up for future interrupts */
+ write_c0_compare(read_c0_count() + cc_interval);
+ change_c0_status(ST0_IM, ALLINTS);
+ local_irq_enable();
}
-struct irqaction irq0 = { NULL, SA_INTERRUPT, 0,
- "timer", NULL, NULL};
-
-void cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+static irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
{
u32 count;
@@ -86,13 +95,11 @@
timerhi += (count < timerlo); /* Wrap around */
timerlo = count;
- write_c0_compare(
- (u32) (count + cc_interval));
- kstat_cpu(0).irqs[irq]++;
- do_timer (regs);
+ write_c0_compare((u32) (count + cc_interval));
+ kstat_this_cpu.irqs[irq]++;
+ do_timer(regs);
- if (!jiffies)
- {
+ if (!jiffies) {
/*
* If jiffies has overflowed in this timer_interrupt we must
* update the timer[hi]/[lo] to make do_fast_gettimeoffset()
@@ -100,78 +107,7 @@
*/
timerhi = timerlo = 0;
}
-}
-
-/*
- * On MIPS only R4000 and better have a cycle counter.
- *
- * FIXME: Does playing with the RP bit in c0_status interfere with this code?
- */
-static unsigned long do_gettimeoffset(void)
-{
- u32 count;
- unsigned long res, tmp;
-
- /* Last jiffy when do_fast_gettimeoffset() was called. */
- static unsigned long last_jiffies;
- u32 quotient;
-
- /*
- * Cached "1/(clocks per usec)*2^32" value.
- * It has to be recalculated once each jiffy.
- */
- static u32 cached_quotient;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (tmp && last_jiffies != tmp) {
- last_jiffies = tmp;
- __asm__(".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips3\n\t"
- "lwu\t%0,%2\n\t"
- "dsll32\t$1,%1,0\n\t"
- "or\t$1,$1,%0\n\t"
- "ddivu\t$0,$1,%3\n\t"
- "mflo\t$1\n\t"
- "dsll32\t%0,%4,0\n\t"
- "nop\n\t"
- "ddivu\t$0,%0,$1\n\t"
- "mflo\t%0\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=&r" (quotient)
- :"r" (timerhi),
- "m" (timerlo),
- "r" (tmp),
- "r" (USECS_PER_JIFFY)
- :"$1");
- cached_quotient = quotient;
- }
-
- /* Get last timer tick in absolute kernel time */
- count = read_c0_count();
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
-
- return res;
+ return IRQ_HANDLED;
}
void __init ip32_time_init(void)
@@ -222,17 +158,4 @@
xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
xtime.tv_nsec = 0;
write_sequnlock_irq(&xtime_lock);
-
- write_c0_count(0);
- irq0.handler = cc_timer_interrupt;
-
- ip32_timer_setup (&irq0);
-
-#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
- /* Set ourselves up for future interrupts */
- write_c0_compare(
- read_c0_count()
- + cc_interval);
- change_c0_status(ST0_IM, ALLINTS);
- sti ();
}
diff -Nru a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
--- a/arch/mips/sibyte/cfe/console.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/sibyte/cfe/console.c Sun Aug 3 13:14:51 2003
@@ -11,8 +11,6 @@
extern int cfe_cons_handle;
static kdev_t cfe_consdev;
-#define SB1250_DUART_MINOR_BASE 192
-
static void cfe_console_write(struct console *cons, const char *str,
unsigned int count)
{
@@ -44,9 +42,10 @@
}
-static kdev_t cfe_console_device(struct console *c)
+static struct tty_driver *cfe_console_device(struct console *c, int *index)
{
- return cfe_consdev;
+ *index = -1;
+ return NULL;
}
static int cfe_console_setup(struct console *cons, char *str)
@@ -58,17 +57,15 @@
#ifdef CONFIG_SIBYTE_SB1250_DUART
if (!strcmp(consdev, "uart0")) {
setleds("u0cn");
- cfe_consdev = MKDEV(TTY_MAJOR, SB1250_DUART_MINOR_BASE + 0);
-#ifndef CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1
+// cfe_consdev = MKDEV(TTY_MAJOR, SB1250_DUART_MINOR_BASE + 0);
} else if (!strcmp(consdev, "uart1")) {
setleds("u1cn");
- cfe_consdev = MKDEV(TTY_MAJOR, SB1250_DUART_MINOR_BASE + 1);
-#endif
+// cfe_consdev = MKDEV(TTY_MAJOR, SB1250_DUART_MINOR_BASE + 1);
#endif
#ifdef CONFIG_VGA_CONSOLE
} else if (!strcmp(consdev, "pcconsole0")) {
setleds("pccn");
- cfe_consdev = MKDEV(TTY_MAJOR, 0);
+// cfe_consdev = MKDEV(TTY_MAJOR, 0);
#endif
} else
return -ENODEV;
@@ -85,7 +82,10 @@
index: -1,
};
-void __init sb1250_cfe_console_init(void)
+static int __init sb1250_cfe_console_init(void)
{
register_console(&sb1250_cfe_cons);
+ return 0;
}
+
+console_initcall(sb1250_cfe_console_init);
diff -Nru a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
--- a/arch/mips/sibyte/cfe/setup.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sibyte/cfe/setup.c Sun Aug 3 13:14:46 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001, 2002 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -68,6 +68,10 @@
static int reboot_smp = 0;
#endif
+#ifdef CONFIG_KGDB
+extern int kgdb_port;
+#endif
+
static void cfe_linux_exit(void)
{
#ifdef CONFIG_SMP
@@ -185,6 +189,18 @@
#ifdef CONFIG_BLK_DEV_INITRD
static int __init initrd_setup(char *str)
{
+ char rdarg[64];
+ int idx;
+
+ /* Make a copy of the initrd argument so we can smash it up here */
+ for (idx = 0; idx < sizeof(rdarg)-1; idx++) {
+ if (!str[idx] || (str[idx] == ' ')) break;
+ rdarg[idx] = str[idx];
+ }
+
+ rdarg[idx] = 0;
+ str = rdarg;
+
/*
*Initrd location comes in the form "<hex size of ramdisk in bytes>@<location in memory>"
* e.g. initrd=3abfd@80010000. This is set up by the loader.
@@ -212,10 +228,10 @@
goto fail;
}
initrd_end = initrd_start + initrd_size;
- printk("Found initrd of %lx@%lx\n", initrd_size, initrd_start);
+ prom_printf("Found initrd of %lx@%lx\n", initrd_size, initrd_start);
return 1;
fail:
- printk("Bad initrd argument. Disabling initrd\n");
+ prom_printf("Bad initrd argument. Disabling initrd\n");
initrd_start = 0;
initrd_end = 0;
return 1;
@@ -230,6 +246,9 @@
{
uint64_t cfe_ept, cfe_handle;
unsigned int cfe_eptseal;
+#ifdef CONFIG_KGDB
+ char *arg;
+#endif
_machine_restart = (void (*)(char *))cfe_linux_exit;
_machine_halt = cfe_linux_exit;
@@ -265,7 +284,9 @@
}
}
if (cfe_eptseal != CFE_EPTSEAL) {
- /* XXXKW what? way too early to panic... */
+ /* too early for panic to do any good */
+ prom_printf("CFE's entrypoint seal doesn't match. Spinning.");
+ while (1) ;
}
cfe_init(cfe_handle, cfe_ept);
/*
@@ -285,10 +306,19 @@
#endif
} else {
/* The loader should have set the command line */
- panic("LINUX_CMDLINE not defined in cfe.");
+ /* too early for panic to do any good */
+ prom_printf("LINUX_CMDLINE not defined in cfe.");
+ while (1) ;
}
}
+#ifdef CONFIG_KGDB
+ if ((arg = strstr(arcs_cmdline,"kgdb=duart")) != NULL)
+ kgdb_port = (arg[10] == '0') ? 0 : 1;
+ else
+ kgdb_port = 1;
+#endif
+
#ifdef CONFIG_BLK_DEV_INITRD
{
char *ptr;
@@ -322,19 +352,6 @@
void prom_free_prom_memory(void)
{
/* Not sure what I'm supposed to do here. Nothing, I think */
-}
-
-int page_is_ram(unsigned long pagenr)
-{
- phys_t addr = pagenr << PAGE_SHIFT;
- int i;
- for (i = 0; i < board_mem_region_count; i++) {
- if ((addr >= board_mem_region_addrs[i])
- && (addr < (board_mem_region_addrs[i] + board_mem_region_sizes[i]))) {
- return 1;
- }
- }
- return 0;
}
void prom_putchar(char c)
diff -Nru a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
--- a/arch/mips/sibyte/cfe/smp.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/sibyte/cfe/smp.c Sun Aug 3 13:14:51 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -43,13 +43,16 @@
void prom_init_secondary(void)
{
- /* Set up kseg0 to be cachable coherent */
- clear_c0_config(CONF_CM_CMASK);
- set_c0_config(0x5);
-
- /* Enable interrupts for lines 0-4 */
- clear_c0_status(0xe000);
- set_c0_status(0x1f01);
+ extern void load_mmu(void);
+ unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
+ STATUSF_IP1 | STATUSF_IP0;
+
+ /* Enable basic interrupts */
+ change_c0_status(ST0_IM, imask);
+ set_c0_status(ST0_IE);
+
+ /* cache and TLB setup */
+ load_mmu();
}
/*
diff -Nru a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
--- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c Sun Aug 3 13:14:47 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2001 Broadcom Corporation
+ * Copyright (C) 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -22,20 +22,23 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
+#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <linux/errno.h>
#include <linux/reboot.h>
-#include <linux/devfs_fs_kernel.h>
#include <asm/uaccess.h>
#include <asm/smplock.h>
+#include <asm/io.h>
+#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
#include <asm/sibyte/sb1250_int.h>
-#include <asm/sibyte/64bit.h>
#include <asm/sibyte/trace_prof.h>
+#define DEVNAME "bcm1250_tbprof"
+
static struct sbprof_tb sbp;
#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
@@ -53,38 +56,37 @@
*
************************************************************************/
-/* 100 samples per second on a 500 Mhz 1250 (default) */
-static u_int64_t tb_period = 2500000ULL;
+static u_int64_t tb_period;
static void arm_tb(void)
{
u_int64_t scdperfcnt;
u_int64_t next = (1ULL << 40) - tb_period;
+ u_int64_t tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
/* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
trigger start of trace. XXX vary sampling period */
- out64(0, KSEG1 + A_SCD_PERF_CNT_1);
- scdperfcnt = in64(KSEG1 + A_SCD_PERF_CNT_CFG);
+ __raw_writeq(0, KSEG1 + A_SCD_PERF_CNT_1);
+ scdperfcnt = __raw_readq(KSEG1 + A_SCD_PERF_CNT_CFG);
/* Unfortunately, in Pass 2 we must clear all counters to knock down
a previous interrupt request. This means that bus profiling
requires ALL of the SCD perf counters. */
- out64((scdperfcnt & ~M_SPC_CFG_SRC1) | // keep counters 0,2,3 as is
+ __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) | // keep counters 0,2,3 as is
M_SPC_CFG_ENABLE | // enable counting
M_SPC_CFG_CLEAR | // clear all counters
V_SPC_CFG_SRC1(1), // counter 1 counts cycles
KSEG1 + A_SCD_PERF_CNT_CFG);
- out64(next, KSEG1 + A_SCD_PERF_CNT_1);
+ __raw_writeq(next, KSEG1 + A_SCD_PERF_CNT_1);
/* Reset the trace buffer */
- out64(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
- out64(M_SCD_TRACE_CFG_FREEZE_FULL
+ __raw_writeq(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
- /* XXXKW may want to expose control to the data-collector */
- | M_SCD_TRACE_CFG_FORCECNT
+ /* XXXKW may want to expose control to the data-collector */
+ tb_options |= M_SCD_TRACE_CFG_FORCECNT;
#endif
- , KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(tb_options, KSEG1 + A_SCD_TRACE_CFG);
sbp.tb_armed = 1;
}
-static void sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
{
int i;
DBG(printk(DEVNAME ": tb_intr\n"));
@@ -92,22 +94,22 @@
/* XXX should use XKPHYS to make writes bypass L2 */
u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
/* Read out trace */
- out64(M_SCD_TRACE_CFG_START_READ, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_START_READ, KSEG1 + A_SCD_TRACE_CFG);
__asm__ __volatile__ ("sync" : : : "memory");
/* Loop runs backwards because bundles are read out in reverse order */
for (i = 256 * 6; i > 0; i -= 6) {
// Subscripts decrease to put bundle in the order
// t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi
- p[i-1] = in64(KSEG1 + A_SCD_TRACE_READ); // read t2 hi
- p[i-2] = in64(KSEG1 + A_SCD_TRACE_READ); // read t2 lo
- p[i-3] = in64(KSEG1 + A_SCD_TRACE_READ); // read t1 hi
- p[i-4] = in64(KSEG1 + A_SCD_TRACE_READ); // read t1 lo
- p[i-5] = in64(KSEG1 + A_SCD_TRACE_READ); // read t0 hi
- p[i-6] = in64(KSEG1 + A_SCD_TRACE_READ); // read t0 lo
+ p[i-1] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t2 hi
+ p[i-2] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t2 lo
+ p[i-3] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t1 hi
+ p[i-4] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t1 lo
+ p[i-5] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t0 hi
+ p[i-6] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t0 lo
}
if (!sbp.tb_enable) {
DBG(printk(DEVNAME ": tb_intr shutdown\n"));
- out64(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
sbp.tb_armed = 0;
wake_up(&sbp.tb_sync);
} else {
@@ -116,18 +118,20 @@
} else {
/* No more trace buffer samples */
DBG(printk(DEVNAME ": tb_intr full\n"));
- out64(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
sbp.tb_armed = 0;
if (!sbp.tb_enable) {
wake_up(&sbp.tb_sync);
}
wake_up(&sbp.tb_read);
}
+ return IRQ_HANDLED;
}
-static void sbprof_pc_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sbprof_pc_intr(int irq, void *dev_id, struct pt_regs *regs)
{
printk(DEVNAME ": unexpected pc_intr");
+ return IRQ_NONE;
}
static int sbprof_zbprof_start(struct file *filp)
@@ -148,9 +152,9 @@
return -EBUSY;
}
/* Make sure there isn't a perf-cnt interrupt waiting */
- scdperfcnt = in64(KSEG1 + A_SCD_PERF_CNT_CFG);
+ scdperfcnt = __raw_readq(KSEG1 + A_SCD_PERF_CNT_CFG);
/* Disable and clear counters, override SRC_1 */
- out64((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
+ __raw_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
M_SPC_CFG_ENABLE |
M_SPC_CFG_CLEAR |
V_SPC_CFG_SRC1(1),
@@ -168,52 +172,52 @@
/* I need the core to mask these, but the interrupt mapper to
pass them through. I am exploiting my knowledge that
cp0_status masks out IP[5]. krw */
- out64(K_INT_MAP_I3,
+ __raw_writeq(K_INT_MAP_I3,
KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + (K_INT_PERF_CNT<<3));
/* Initialize address traps */
- out64(0, KSEG1 + A_ADDR_TRAP_UP_0);
- out64(0, KSEG1 + A_ADDR_TRAP_UP_1);
- out64(0, KSEG1 + A_ADDR_TRAP_UP_2);
- out64(0, KSEG1 + A_ADDR_TRAP_UP_3);
-
- out64(0, KSEG1 + A_ADDR_TRAP_DOWN_0);
- out64(0, KSEG1 + A_ADDR_TRAP_DOWN_1);
- out64(0, KSEG1 + A_ADDR_TRAP_DOWN_2);
- out64(0, KSEG1 + A_ADDR_TRAP_DOWN_3);
-
- out64(0, KSEG1 + A_ADDR_TRAP_CFG_0);
- out64(0, KSEG1 + A_ADDR_TRAP_CFG_1);
- out64(0, KSEG1 + A_ADDR_TRAP_CFG_2);
- out64(0, KSEG1 + A_ADDR_TRAP_CFG_3);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_0);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_1);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_2);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_3);
+
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_0);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_1);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_2);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_3);
+
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_0);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_1);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_2);
+ __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_3);
/* Initialize Trace Event 0-7 */
// when interrupt
- out64(M_SCD_TREVT_INTERRUPT, KSEG1 + A_SCD_TRACE_EVENT_0);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_1);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_2);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_3);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_4);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_5);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_6);
- out64(0, KSEG1 + A_SCD_TRACE_EVENT_7);
+ __raw_writeq(M_SCD_TREVT_INTERRUPT, KSEG1 + A_SCD_TRACE_EVENT_0);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_1);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_2);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_3);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_4);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_5);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_6);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_7);
/* Initialize Trace Sequence 0-7 */
// Start on event 0 (interrupt)
- out64(V_SCD_TRSEQ_FUNC_START|0x0fff,
+ __raw_writeq(V_SCD_TRSEQ_FUNC_START|0x0fff,
KSEG1 + A_SCD_TRACE_SEQUENCE_0);
// dsamp when d used | asamp when a used
- out64(M_SCD_TRSEQ_ASAMPLE|M_SCD_TRSEQ_DSAMPLE|K_SCD_TRSEQ_TRIGGER_ALL,
+ __raw_writeq(M_SCD_TRSEQ_ASAMPLE|M_SCD_TRSEQ_DSAMPLE|K_SCD_TRSEQ_TRIGGER_ALL,
KSEG1 + A_SCD_TRACE_SEQUENCE_1);
- out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_2);
- out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_3);
- out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_4);
- out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_5);
- out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_6);
- out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_7);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_2);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_3);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_4);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_5);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_6);
+ __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_7);
/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
- out64((1ULL << K_INT_PERF_CNT), KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE));
+ __raw_writeq((1ULL << K_INT_PERF_CNT), KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE));
arm_tb();
@@ -249,7 +253,7 @@
{
int minor;
- minor = MINOR(inode->i_rdev);
+ minor = minor(inode->i_rdev);
if (minor != 0) {
return -ENODEV;
}
@@ -274,7 +278,7 @@
{
int minor;
- minor = MINOR(inode->i_rdev);
+ minor = minor(inode->i_rdev);
if (minor != 0 || !sbp.open) {
return -ENODEV;
}
@@ -306,7 +310,8 @@
cur_count = size < sample_left ? size : sample_left;
src = (char *)(((long)sbp.sbprof_tbbuf[cur_sample])+sample_off);
copy_to_user(dest, src, cur_count);
- DBG(printk(DEVNAME ": read from sample %d, %d bytes\n", cur_sample, cur_count));
+ DBG(printk(DEVNAME ": read from sample %d, %d bytes\n",
+ cur_sample, cur_count));
size -= cur_count;
sample_left -= cur_count;
if (!sample_left) {
@@ -360,72 +365,22 @@
.mmap = NULL,
};
-static devfs_handle_t devfs_handle;
-
-#define UNDEF 0
-static unsigned long long pll_div_to_mhz[32] = {
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF,
- 200,
- 250,
- 300,
- 350,
- 400,
- 450,
- 500,
- 550,
- 600,
- 650,
- 700,
- 750,
- 800,
- 850,
- 900,
- 950,
- 1000,
- 1050,
- 1100,
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF,
- UNDEF
-};
-
static int __init sbprof_tb_init(void)
{
- unsigned int pll_div;
-
- if (devfs_register_chrdev(SBPROF_TB_MAJOR, DEVNAME, &sbprof_tb_fops)) {
+ if (register_chrdev(SBPROF_TB_MAJOR, DEVNAME, &sbprof_tb_fops)) {
printk(KERN_WARNING DEVNAME ": initialization failed (dev %d)\n",
SBPROF_TB_MAJOR);
return -EIO;
}
- devfs_handle = devfs_register(NULL, DEVNAME,
- DEVFS_FL_DEFAULT, SBPROF_TB_MAJOR, 0,
- S_IFCHR | S_IRUGO | S_IWUGO,
- &sbprof_tb_fops, NULL);
sbp.open = 0;
- pll_div = pll_div_to_mhz[G_SYS_PLL_DIV(in64(KSEG1 + A_SCD_SYSTEM_CFG))];
- if (pll_div != UNDEF) {
- tb_period = (pll_div / 2) * 10000;
- } else {
- printk(KERN_INFO DEVNAME ": strange PLL divide\n");
- }
+ tb_period = zbbus_mhz * 10000LL;
printk(KERN_INFO DEVNAME ": initialized - tb_period = %lld\n", tb_period);
return 0;
}
static void __exit sbprof_tb_cleanup(void)
{
- devfs_unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
- devfs_unregister(devfs_handle);
+ unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
}
module_init(sbprof_tb_init);
diff -Nru a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
--- a/arch/mips/sibyte/sb1250/bus_watcher.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c Sun Aug 3 13:14:48 2003
@@ -27,15 +27,16 @@
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/proc_fs.h>
#include <asm/system.h>
+#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
#include <asm/sibyte/sb1250_scd.h>
-#include <asm/sibyte/64bit.h>
struct bw_stats_struct {
@@ -170,7 +171,7 @@
* notes: possible re-entry due to multiple sources
* should check/indicate saturation
*/
-static void sibyte_bw_int(int irq, void *data, struct pt_regs *regs)
+static irqreturn_t sibyte_bw_int(int irq, void *data, struct pt_regs *regs)
{
struct bw_stats_struct *stats = data;
unsigned long cntr;
@@ -199,6 +200,7 @@
bw_print_buffer(bw_buf, stats);
printk(bw_buf);
#endif
+ return IRQ_HANDLED;
}
int __init sibyte_bus_watcher(void)
diff -Nru a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
--- a/arch/mips/sibyte/sb1250/irq.c Sun Aug 3 13:14:52 2003
+++ b/arch/mips/sibyte/sb1250/irq.c Sun Aug 3 13:14:52 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -21,20 +21,22 @@
#include <linux/linkage.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
+#include <linux/smp.h>
#include <linux/mm.h>
#include <linux/slab.h>
+#include <linux/kernel_stat.h>
#include <asm/errno.h>
#include <asm/signal.h>
#include <asm/system.h>
#include <asm/ptrace.h>
+#include <asm/io.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
#include <asm/sibyte/sb1250_uart.h>
#include <asm/sibyte/sb1250_scd.h>
#include <asm/sibyte/sb1250.h>
-#include <asm/sibyte/64bit.h>
/*
* These are the routines that handle all the low level interrupt stuff.
@@ -59,16 +61,27 @@
#endif
#ifdef CONFIG_KGDB
+#include <asm/gdb-stub.h>
extern void breakpoint(void);
-extern void set_debug_traps(void);
+static int kgdb_irq;
+#ifdef CONFIG_GDB_CONSOLE
+extern void register_gdb_console(void);
+#endif
/* kgdb is on when configured. Pass "nokgdb" kernel arg to turn it off */
static int kgdb_flag = 1;
static int __init nokgdb(char *str)
{
kgdb_flag = 0;
+ return 1;
}
__setup("nokgdb", nokgdb);
+
+/* Default to UART1 */
+int kgdb_port = 1;
+#ifdef CONFIG_SIBYTE_SB1250_DUART
+extern char sb1250_duart_present[];
+#endif
#endif
static struct hw_interrupt_type sb1250_irq_type = {
@@ -97,9 +110,9 @@
u64 cur_ints;
spin_lock_irqsave(&sb1250_imr_lock, flags);
- cur_ints = __in64(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
cur_ints |= (((u64) 1) << irq);
- __out64(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
spin_unlock_irqrestore(&sb1250_imr_lock, flags);
}
@@ -109,9 +122,9 @@
u64 cur_ints;
spin_lock_irqsave(&sb1250_imr_lock, flags);
- cur_ints = __in64(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
cur_ints &= ~(((u64) 1) << irq);
- __out64(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
spin_unlock_irqrestore(&sb1250_imr_lock, flags);
}
@@ -121,7 +134,7 @@
int i = 0, old_cpu, cpu, int_on;
u64 cur_ints;
irq_desc_t *desc = irq_desc + irq;
- unsigned int flags;
+ unsigned long flags;
while (mask) {
if (mask & 1) {
@@ -146,19 +159,19 @@
/* Swizzle each CPU's IMR (but leave the IP selection alone) */
old_cpu = sb1250_irq_owner[irq];
- cur_ints = __in64(KSEG1 + A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK);
int_on = !(cur_ints & (((u64) 1) << irq));
if (int_on) {
/* If it was on, mask it */
cur_ints |= (((u64) 1) << irq);
- __out64(cur_ints, KSEG1 + A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK);
}
sb1250_irq_owner[irq] = cpu;
if (int_on) {
/* unmask for the new CPU */
- cur_ints = __in64(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
cur_ints &= ~(((u64) 1) << irq);
- __out64(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
}
spin_unlock(&sb1250_imr_lock);
spin_unlock_irqrestore(&desc->lock, flags);
@@ -201,19 +214,19 @@
* deliver the interrupts to all CPUs (which makes affinity
* changing easier for us)
*/
- pending = in64(KSEG1 + A_IMR_REGISTER(sb1250_irq_owner[irq],
- R_IMR_LDT_INTERRUPT));
+ pending = __raw_readq(KSEG1 + A_IMR_REGISTER(sb1250_irq_owner[irq],
+ R_IMR_LDT_INTERRUPT));
pending &= ((u64)1 << (irq));
if (pending) {
int i;
- for (i=0; i<smp_num_cpus; i++) {
+ for (i=0; i<NR_CPUS; i++) {
/*
* Clear for all CPUs so an affinity switch
* doesn't find an old status
*/
- out64(pending,
- KSEG1+A_IMR_REGISTER(cpu_logical_map(i),
- R_IMR_LDT_INTERRUPT_CLR));
+ __raw_writeq(pending,
+ KSEG1+A_IMR_REGISTER(cpu_logical_map(i),
+ R_IMR_LDT_INTERRUPT_CLR));
}
/*
@@ -327,13 +340,13 @@
/* Default everything to IP2 */
for (i = 0; i < SB1250_NR_IRQS; i++) { /* was I0 */
- out64(IMR_IP2_VAL,
- KSEG1 + A_IMR_REGISTER(0,
- R_IMR_INTERRUPT_MAP_BASE) +
+ __raw_writeq(IMR_IP2_VAL,
+ KSEG1 + A_IMR_REGISTER(0,
+ R_IMR_INTERRUPT_MAP_BASE) +
(i << 3));
- out64(IMR_IP2_VAL,
- KSEG1 + A_IMR_REGISTER(1,
- R_IMR_INTERRUPT_MAP_BASE) +
+ __raw_writeq(IMR_IP2_VAL,
+ KSEG1 + A_IMR_REGISTER(1,
+ R_IMR_INTERRUPT_MAP_BASE) +
(i << 3));
}
@@ -344,21 +357,21 @@
* inter-cpu messages
*/
/* Was I1 */
- out64(IMR_IP3_VAL, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
+ __raw_writeq(IMR_IP3_VAL, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
(K_INT_MBOX_0 << 3));
- out64(IMR_IP3_VAL, KSEG1 + A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) +
+ __raw_writeq(IMR_IP3_VAL, KSEG1 + A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) +
(K_INT_MBOX_0 << 3));
/* Clear the mailboxes. The firmware may leave them dirty */
- out64(0xffffffffffffffff,
- KSEG1 + A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU));
- out64(0xffffffffffffffff,
- KSEG1 + A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU));
+ __raw_writeq(0xffffffffffffffff,
+ KSEG1 + A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU));
+ __raw_writeq(0xffffffffffffffff,
+ KSEG1 + A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU));
/* Mask everything except the mailbox registers for both cpus */
tmp = ~((u64) 0) ^ (((u64) 1) << K_INT_MBOX_0);
- out64(tmp, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK));
- out64(tmp, KSEG1 + A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK));
+ __raw_writeq(tmp, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK));
+ __raw_writeq(tmp, KSEG1 + A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK));
sb1250_steal_irq(K_INT_MBOX_0);
@@ -379,15 +392,24 @@
#ifdef CONFIG_KGDB
if (kgdb_flag) {
+ kgdb_irq = K_INT_UART_0 + kgdb_port;
+
+#ifdef CONFIG_SIBYTE_SB1250_DUART
+ sb1250_duart_present[kgdb_port] = 0;
+#endif
/* Setup uart 1 settings, mapper */
- out64(M_DUART_IMR_BRK, KSEG1 + A_DUART + R_DUART_IMR_B);
+ __raw_writeq(M_DUART_IMR_BRK, IO_SPACE_BASE + A_DUART_IMRREG(kgdb_port));
- out64(IMR_IP6_VAL,
- KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + (K_INT_UART_1<<3));
- tmp = in64(KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK));
- tmp &= ~(1<<K_INT_UART_1);
- out64(tmp, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK));
+ sb1250_steal_irq(kgdb_irq);
+ __raw_writeq(IMR_IP6_VAL,
+ IO_SPACE_BASE + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
+ (kgdb_irq<<3));
+ sb1250_unmask_irq(0, kgdb_irq);
+#ifdef CONFIG_GDB_CONSOLE
+ register_gdb_console();
+#endif
+ prom_printf("Waiting for GDB on UART port %d\n", kgdb_port);
set_debug_traps();
breakpoint();
}
@@ -398,10 +420,8 @@
#include <linux/delay.h>
-extern void set_async_breakpoint(unsigned int epc);
-
-#define duart_out(reg, val) out64(val, KSEG1 + A_DUART_CHANREG(1,reg))
-#define duart_in(reg) in64(KSEG1 + A_DUART_CHANREG(1,reg))
+#define duart_out(reg, val) csr_out32(val, KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
+#define duart_in(reg) csr_in32(KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
void sb1250_kgdb_interrupt(struct pt_regs *regs)
{
@@ -410,10 +430,11 @@
* host to stop the break, since we would see another
* interrupt on the end-of-break too)
*/
+ kstat_this_cpu.irqs[K_INT_UART_1]++;
mdelay(500);
duart_out(R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT |
M_DUART_RX_EN | M_DUART_TX_EN);
- if (!user_mode(regs))
- set_async_breakpoint(regs->cp0_epc);
+ set_async_breakpoint(®s->cp0_epc);
}
+
#endif /* CONFIG_KGDB */
diff -Nru a/arch/mips/sibyte/sb1250/irq_handler.S b/arch/mips/sibyte/sb1250/irq_handler.S
--- a/arch/mips/sibyte/sb1250/irq_handler.S Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sibyte/sb1250/irq_handler.S Sun Aug 3 13:14:48 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -77,15 +77,11 @@
mfc0 a0, CP0_EPC
jal sbprof_cpu_intr
addu a0, a0, t1 /* a0 = EPC + (BD ? 4 : 0) */
- /* Re-enable interrupts here so that events due to sbprof_cpu_intr
- get charged to ret_from_irq (via a recursive interrupt)
- rather than the restart pc. */
- mfc0 t0, CP0_STATUS
- or t0, ST0_IE
j ret_from_irq
- mtc0 t0, CP0_STATUS # delay slot
+ nop
0:
#endif
+
/* Timer interrupt is routed to IP[4] */
andi t1, s0, CAUSEF_IP4
beqz t1, 1f
diff -Nru a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c
--- a/arch/mips/sibyte/sb1250/prom.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/sibyte/sb1250/prom.c Sun Aug 3 13:14:51 2003
@@ -112,12 +112,6 @@
/* Not sure what I'm supposed to do here. Nothing, I think */
}
-int page_is_ram(unsigned long pagenr)
-{
- phys_t addr = pagenr << PAGE_SHIFT;
- return (addr < (CONFIG_SIBYTE_STANDALONE_RAM_SIZE * 1024 * 1024));
-}
-
void prom_putchar(char c)
{
}
diff -Nru a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
--- a/arch/mips/sibyte/sb1250/setup.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sibyte/sb1250/setup.c Sun Aug 3 13:14:46 2003
@@ -23,15 +23,16 @@
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/io.h>
+#include <asm/system.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
-#include <asm/sibyte/64bit.h>
unsigned int sb1_pass;
unsigned int soc_pass;
unsigned int soc_type;
unsigned int periph_rev;
+unsigned int zbbus_mhz;
static char *soc_str;
static char *pass_str;
@@ -102,6 +103,10 @@
periph_rev = 3;
pass_str = "C0";
break;
+ case K_SYS_REVISION_BCM1250_C1:
+ periph_rev = 3;
+ pass_str = "C1";
+ break;
default:
if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
periph_rev = 2;
@@ -145,10 +150,11 @@
void sb1250_setup(void)
{
uint64_t sys_rev;
+ int plldiv;
int bad_config = 0;
sb1_pass = read_c0_prid() & 0xff;
- sys_rev = in64(IO_SPACE_BASE | A_SCD_SYSTEM_REVISION);
+ sys_rev = __raw_readq(IO_SPACE_BASE | A_SCD_SYSTEM_REVISION);
soc_type = SYS_SOC_TYPE(sys_rev);
soc_pass = G_SYS_REVISION(sys_rev);
@@ -157,8 +163,14 @@
machine_restart(NULL);
}
- prom_printf("SiByte %s %s (SB1 rev %d)\n",
- soc_str, pass_str, sb1_pass);
+ plldiv = G_SYS_PLL_DIV(__raw_readq(IO_SPACE_BASE | A_SCD_SYSTEM_CFG));
+ zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
+#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
+ __raw_writeq(0, KSEG1 + A_SCD_ZBBUS_CYCLE_COUNT);
+#endif
+
+ prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
+ soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
prom_printf("Board type: %s\n", get_system_type());
switch(war_pass) {
diff -Nru a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
--- a/arch/mips/sibyte/sb1250/smp.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sibyte/sb1250/smp.c Sun Aug 3 13:14:48 2003
@@ -23,7 +23,7 @@
#include <linux/kernel_stat.h>
#include <asm/mmu_context.h>
-#include <asm/sibyte/64bit.h>
+#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
@@ -59,7 +59,7 @@
*/
void core_send_ipi(int cpu, unsigned int action)
{
- out64((((u64)action)<< 48), mailbox_set_regs[cpu]);
+ __raw_writeq((((u64)action)<< 48), mailbox_set_regs[cpu]);
}
@@ -76,12 +76,12 @@
int cpu = smp_processor_id();
unsigned int action;
- kstat_cpu(cpu).irqs[K_INT_MBOX_0]++;
+ kstat_this_cpu.irqs[K_INT_MBOX_0]++;
/* Load the mailbox register to figure out what we're supposed to do */
- action = (in64(mailbox_regs[cpu]) >> 48) & 0xffff;
+ action = (__raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
/* Clear the mailbox to clear the interrupt */
- out64(((u64)action)<<48, mailbox_clear_regs[cpu]);
+ __raw_writeq(((u64)action)<<48, mailbox_clear_regs[cpu]);
/*
* Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the
@@ -141,7 +141,7 @@
/* Iterate until we find a CPU that comes up */
cur_cpu++;
retval = prom_boot_secondary(cur_cpu,
- (unsigned long)idle + KERNEL_STACK_SIZE - 32,
+ (unsigned long)idle + THREAD_SIZE - 32,
(unsigned long)idle);
} while (!retval && (cur_cpu < NR_CPUS));
if (retval) {
diff -Nru a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
--- a/arch/mips/sibyte/sb1250/time.c Sun Aug 3 13:14:49 2003
+++ b/arch/mips/sibyte/sb1250/time.c Sun Aug 3 13:14:49 2003
@@ -35,12 +35,12 @@
#include <asm/ptrace.h>
#include <asm/addrspace.h>
#include <asm/time.h>
+#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
#include <asm/sibyte/sb1250_scd.h>
-#include <asm/sibyte/64bit.h>
#define IMR_IP2_VAL K_INT_MAP_I0
@@ -67,22 +67,22 @@
sb1250_mask_irq(cpu, irq);
/* Map the timer interrupt to ip[4] of this cpu */
- out64(IMR_IP4_VAL, KSEG1 + A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE)
+ __raw_writeq(IMR_IP4_VAL, KSEG1 + A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE)
+ (irq<<3));
/* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
/* Disable the timer and set up the count */
- out64(0, KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
- out64(
-#ifndef CONFIG_SIMULATION
- 1000000/HZ
+ __raw_writeq(0, KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
+#ifdef CONFIG_SIMULATION
+ __raw_writeq(50000 / HZ, KSEG1 +
+ A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
#else
- 50000/HZ
+ __raw_writeq(1000000/HZ, KSEG1 +
+ A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
#endif
- , KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
/* Set the timer running */
- out64(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
+ __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
sb1250_unmask_irq(cpu, irq);
@@ -99,13 +99,13 @@
void sb1250_timer_interrupt(struct pt_regs *regs)
{
+ extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
int cpu = smp_processor_id();
int irq = K_INT_TIMER_0 + cpu;
- kstat_cpu(cpu).irqs[irq]++;
/* Reset the timer */
- out64(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
- KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
+ ____raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
+ KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
/*
* CPU 0 handles the global timer interrupt job
@@ -129,7 +129,7 @@
unsigned long sb1250_gettimeoffset(void)
{
unsigned long count =
- in64(KSEG1 + A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT));
+ __raw_readq(KSEG1 + A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT));
return 1000000/HZ - count;
}
diff -Nru a/arch/mips/sibyte/swarm/dbg_io.c b/arch/mips/sibyte/swarm/dbg_io.c
--- a/arch/mips/sibyte/swarm/dbg_io.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/sibyte/swarm/dbg_io.c Sun Aug 3 13:14:47 2003
@@ -1,5 +1,5 @@
/*
- * kgdb debug routines for swarm board.
+ * kgdb debug routines for SiByte boards.
*
* Copyright (C) 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
@@ -14,11 +14,11 @@
/* -------------------- BEGINNING OF CONFIG --------------------- */
#include <linux/delay.h>
+#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_uart.h>
#include <asm/sibyte/sb1250_int.h>
-#include <asm/sibyte/64bit.h>
#include <asm/addrspace.h>
/*
@@ -35,12 +35,10 @@
static int duart_initialized = 0; /* 0: need to be init'ed by kgdb */
/* -------------------- END OF CONFIG --------------------- */
+extern int kgdb_port;
-
-#define duart_out(reg, val) out64(val, KSEG1 + A_DUART_CHANREG(1,reg))
-#define duart_in(reg) in64(KSEG1 + A_DUART_CHANREG(1,reg))
-
-extern void set_async_breakpoint(unsigned int epc);
+#define duart_out(reg, val) csr_out32(val, KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
+#define duart_in(reg) csr_in32(KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
void putDebugChar(unsigned char c);
unsigned char getDebugChar(void);
diff -Nru a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c Sun Aug 3 13:14:46 2003
@@ -16,8 +16,8 @@
#include <asm/time.h>
#include <asm/addrspace.h>
+#include <asm/io.h>
-#include <asm/sibyte/64bit.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_smbus.h>
@@ -86,53 +86,53 @@
static int m41t81_read(uint8_t addr)
{
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64(addr & 0xff, SMB_CSR(R_SMB_CMD));
- out64((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE), SMB_CSR(R_SMB_START));
+ __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
+ __raw_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE), SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
+ __raw_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- out64(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
}
- return (in64(SMB_CSR(R_SMB_DATA)) & 0xff);
+ return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
}
static int m41t81_write(uint8_t addr, int b)
{
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64((addr & 0xFF), SMB_CSR(R_SMB_CMD));
- out64((b & 0xff), SMB_CSR(R_SMB_DATA));
- out64(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
+ __raw_writeq((addr & 0xFF), SMB_CSR(R_SMB_CMD));
+ __raw_writeq((b & 0xff), SMB_CSR(R_SMB_DATA));
+ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- out64(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
}
/* read the same byte again to make sure it is written */
- out64(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
+ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
return 0;
diff -Nru a/arch/mips/sibyte/swarm/rtc_xicor1241.c b/arch/mips/sibyte/swarm/rtc_xicor1241.c
--- a/arch/mips/sibyte/swarm/rtc_xicor1241.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sibyte/swarm/rtc_xicor1241.c Sun Aug 3 13:14:46 2003
@@ -15,8 +15,8 @@
#include <asm/time.h>
#include <asm/addrspace.h>
+#include <asm/io.h>
-#include <asm/sibyte/64bit.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_smbus.h>
@@ -61,46 +61,46 @@
static int xicor_read(uint8_t addr)
{
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
- out64((addr & 0xff), SMB_CSR(R_SMB_DATA));
- out64((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE), SMB_CSR(R_SMB_START));
+ __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
+ __raw_writeq((addr & 0xff), SMB_CSR(R_SMB_DATA));
+ __raw_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE), SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
+ __raw_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- out64(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
}
- return (in64(SMB_CSR(R_SMB_DATA)) & 0xff);
+ return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
}
static int xicor_write(uint8_t addr, int b)
{
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64(addr, SMB_CSR(R_SMB_CMD));
- out64((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
- out64(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
+ __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
+ __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
+ __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- out64(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
} else {
return 0;
diff -Nru a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
--- a/arch/mips/sibyte/swarm/setup.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sibyte/swarm/setup.c Sun Aug 3 13:14:48 2003
@@ -38,7 +38,6 @@
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_genbus.h>
-#include <asm/sibyte/64bit.h>
#include <asm/sibyte/board.h>
extern struct rtc_ops *rtc_ops;
diff -Nru a/arch/mips/sibyte/swarm/time.c b/arch/mips/sibyte/swarm/time.c
--- a/arch/mips/sibyte/swarm/time.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sibyte/swarm/time.c Sun Aug 3 13:14:46 2003
@@ -31,8 +31,8 @@
#include <linux/spinlock.h>
#include <asm/system.h>
#include <asm/addrspace.h>
+#include <asm/io.h>
-#include <asm/sibyte/64bit.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_smbus.h>
@@ -79,46 +79,46 @@
static int xicor_read(uint8_t addr)
{
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
- out64((addr & 0xff), SMB_CSR(R_SMB_DATA));
- out64((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE), SMB_CSR(R_SMB_START));
+ __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
+ __raw_writeq((addr & 0xff), SMB_CSR(R_SMB_DATA));
+ __raw_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE), SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
+ __raw_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- out64(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
}
- return (in64(SMB_CSR(R_SMB_DATA)) & 0xff);
+ return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
}
static int xicor_write(uint8_t addr, int b)
{
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- out64(addr, SMB_CSR(R_SMB_CMD));
- out64((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
- out64(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
+ __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
+ __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
+ __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
SMB_CSR(R_SMB_START));
- while (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (in64(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- out64(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
} else {
return 0;
@@ -226,8 +226,8 @@
/* Establish communication with the Xicor 1241 RTC */
/* XXXKW how do I share the SMBus with the I2C subsystem? */
- out64(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ));
- out64(0, SMB_CSR(R_SMB_CONTROL));
+ __raw_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ));
+ __raw_writeq(0, SMB_CSR(R_SMB_CONTROL));
if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) {
printk("x1241: couldn't detect on SWARM SMBus 1\n");
diff -Nru a/arch/mips/sni/Makefile b/arch/mips/sni/Makefile
--- a/arch/mips/sni/Makefile Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sni/Makefile Sun Aug 3 13:14:46 2003
@@ -2,6 +2,6 @@
# Makefile for the SNI specific part of the kernel
#
-obj-y := int-handler.o io.o irq.o pci.o pcimt_scache.o reset.o setup.o
+obj-y += int-handler.o io.o irq.o pcimt_scache.o reset.o setup.o
EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/sni/int-handler.S b/arch/mips/sni/int-handler.S
--- a/arch/mips/sni/int-handler.S Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sni/int-handler.S Sun Aug 3 13:14:46 2003
@@ -1,7 +1,7 @@
/*
* SNI RM200 PCI specific interrupt handler code.
*
- * Copyright (C) 1994, 95, 96, 97, 98, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1994, 95, 96, 97, 98, 1999, 2000, 01 by Ralf Baechle
*/
#include <asm/asm.h>
#include <asm/mipsregs.h>
@@ -9,12 +9,13 @@
#include <asm/sni.h>
#include <asm/stackframe.h>
-/* The PCI ASIC has the nasty property that it may delay writes if it is busy.
- As a consequence from writes that have not graduated when we exit from the
- interrupt handler we might catch a spurious interrupt. To avoid this we
- force the PCI ASIC to graduate all writes by executing a read from the
- PCI bus. */
-
+/*
+ * The PCI ASIC has the nasty property that it may delay writes if it is busy.
+ * As a consequence from writes that have not graduated when we exit from the
+ * interrupt handler we might catch a spurious interrupt. To avoid this we
+ * force the PCI ASIC to graduate all writes by executing a read from the
+ * PCI bus.
+ */
.set noreorder
.set noat
.align 5
@@ -46,7 +47,7 @@
bnez t1, _hwint0
nop
- j return # spurious interrupt
+ j restore_all # spurious interrupt
nop
##############################################################################
diff -Nru a/arch/mips/sni/io.c b/arch/mips/sni/io.c
--- a/arch/mips/sni/io.c Sun Aug 3 13:14:46 2003
+++ b/arch/mips/sni/io.c Sun Aug 3 13:14:46 2003
@@ -1,5 +1,4 @@
-/* $Id: io.c,v 1.4 1999/08/18 23:37:46 ralf Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
diff -Nru a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
--- a/arch/mips/sni/irq.c Sun Aug 3 13:14:47 2003
+++ b/arch/mips/sni/irq.c Sun Aug 3 13:14:47 2003
@@ -8,18 +8,18 @@
*/
#include <linux/delay.h>
#include <linux/init.h>
-#include <linux/irq.h>
#include <linux/interrupt.h>
+#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
+#include <asm/i8259.h>
#include <asm/io.h>
#include <asm/sni.h>
spinlock_t pciasic_lock = SPIN_LOCK_UNLOCKED;
extern asmlinkage void sni_rm200_pci_handle_int(void);
-extern void do_IRQ(int irq, struct pt_regs *regs);
static void enable_pciasic_irq(unsigned int irq);
@@ -126,7 +126,7 @@
void __init init_pciasic(void)
{
- unsigned int flags;
+ unsigned long flags;
spin_lock_irqsave(&pciasic_lock, flags);
* (volatile u8 *) PCIMT_IRQSEL =
diff -Nru a/arch/mips/sni/pci.c b/arch/mips/sni/pci.c
--- a/arch/mips/sni/pci.c Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,176 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SNI specific PCI support for RM200/RM300.
- *
- * Copyright (C) 1997 - 2000 Ralf Baechle
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/types.h>
-#include <asm/byteorder.h>
-#include <asm/sni.h>
-
-#ifdef CONFIG_PCI
-
-#define mkaddr(bus, devfn, where) \
-do { \
- if (bus->number == 0) \
- return -1; \
- *(volatile u32 *)PCIMT_CONFIG_ADDRESS = \
- ((bus->number & 0xff) << 0x10) | \
- ((devfn & 0xff) << 0x08) | \
- (where & 0xfc); \
-} while(0)
-
-#if 0
-/* To do: Bring this uptodate ... */
-static void pcimt_pcibios_fixup (void)
-{
- struct pci_dev *dev = NULL;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- /*
- * TODO: Take care of RM300 revision D boards for where the
- * network slot became an ordinary PCI slot.
- */
- if (dev->devfn == PCI_DEVFN(1, 0)) {
- /* Evil hack ... */
- set_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NO_WA);
- dev->irq = PCIMT_IRQ_SCSI;
- continue;
- }
- if (dev->devfn == PCI_DEVFN(2, 0)) {
- dev->irq = PCIMT_IRQ_ETHERNET;
- continue;
- }
-
- switch(dev->irq) {
- case 1 ... 4:
- dev->irq += PCIMT_IRQ_INTA - 1;
- break;
- case 0:
- break;
- default:
- printk("PCI device on bus %d, dev %d, function %d "
- "impossible interrupt configured.\n",
- dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_SLOT(dev->devfn));
- }
- }
-}
-#endif
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int pcimt_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
-{
- u32 res;
-
- switch (size) {
- case 1:
- mkaddr(bus, devfn, where);
- res = *(volatile u32 *)PCIMT_CONFIG_DATA;
- res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xff;
- *val = (u8)res;
- break;
- case 2:
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- res = *(volatile u32 *)PCIMT_CONFIG_DATA;
- res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xffff;
- *val = (u16)res;
- break;
- case 4:
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- res = *(volatile u32 *)PCIMT_CONFIG_DATA;
- res = le32_to_cpu(res);
- *val = res;
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
-{
- switch (size) {
- case 1:
- mkaddr(bus, devfn, where);
- *(volatile u8 *)(PCIMT_CONFIG_DATA + (where & 3)) =
- (u8)le32_to_cpu(val);
- break;
- case 2:
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- *(volatile u16 *)(PCIMT_CONFIG_DATA + (where & 3)) =
- (u16)le32_to_cpu(val);
- break;
- case 4:
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- *(volatile u32 *)PCIMT_CONFIG_DATA = le32_to_cpu(val);
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops sni_pci_ops = {
- .read = pcimt_read,
- .write = pcimt_write,
-};
-
-void __init
-pcibios_fixup_bus(struct pci_bus *b)
-{
-}
-
-void __init pcibios_init(void)
-{
- struct pci_ops *ops = &sni_pci_ops;
-
- pci_scan_bus(0, ops, NULL);
-}
-
-int __init pcibios_enable_device(struct pci_dev *dev)
-{
- /* Not needed, since we enable all devices at startup. */
- return 0;
-}
-
-void __init
-pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 0;
-}
-
-char * __init
-pcibios_setup(char *str)
-{
- /* Nothing to do for now. */
-
- return str;
-}
-
-struct pci_fixup pcibios_fixups[] = {
- { 0 }
-};
-
-#endif /* CONFIG_PCI */
diff -Nru a/arch/mips/sni/pcimt_scache.c b/arch/mips/sni/pcimt_scache.c
--- a/arch/mips/sni/pcimt_scache.c Sun Aug 3 13:14:53 2003
+++ b/arch/mips/sni/pcimt_scache.c Sun Aug 3 13:14:53 2003
@@ -1,5 +1,4 @@
-/* $Id: pcimt_scache.c,v 1.4 1999/01/04 16:03:59 ralf Exp $
- *
+/*
* arch/mips/sni/pcimt_scache.c
*
* This file is subject to the terms and conditions of the GNU General Public
diff -Nru a/arch/mips/sni/reset.c b/arch/mips/sni/reset.c
--- a/arch/mips/sni/reset.c Sun Aug 3 13:14:51 2003
+++ b/arch/mips/sni/reset.c Sun Aug 3 13:14:51 2003
@@ -30,7 +30,7 @@
/* This does a normal via the keyboard controller like a PC.
We can do that easier ... */
- sti();
+ local_irq_disable();
for (;;) {
for (i=0; i<100; i++) {
kb_wait();
diff -Nru a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
--- a/arch/mips/sni/setup.c Sun Aug 3 13:14:48 2003
+++ b/arch/mips/sni/setup.c Sun Aug 3 13:14:48 2003
@@ -5,9 +5,8 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 1998, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1998, 2000, 2003 by Ralf Baechle
*/
-#include <asm/ptrace.h>
#include <linux/config.h>
#include <linux/hdreg.h>
#include <linux/ioport.h>
@@ -19,17 +18,18 @@
#include <linux/mc146818rtc.h>
#include <linux/console.h>
#include <linux/fb.h>
-#include <linux/pc_keyb.h>
#include <linux/ide.h>
#include <asm/bcache.h>
#include <asm/bootinfo.h>
-#include <asm/keyboard.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
+#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/sni.h>
+#include <asm/time.h>
+#include <asm/traps.h>
extern void sni_machine_restart(char *command);
extern void sni_machine_halt(void);
@@ -37,11 +37,8 @@
extern struct ide_ops std_ide_ops;
extern struct rtc_ops std_rtc_ops;
-extern struct kbd_ops std_kbd_ops;
-void (*board_time_init)(struct irqaction *irq);
-
-static void __init sni_rm200_pci_time_init(struct irqaction *irq)
+static void __init sni_rm200_pci_timer_setup(struct irqaction *irq)
{
/* set the clock to 100 Hz */
outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
@@ -50,7 +47,7 @@
setup_irq(0, irq);
}
-unsigned char aux_device_present;
+
extern unsigned char sni_map_isa_cache;
/*
@@ -80,14 +77,16 @@
sni_pcimt_detect();
sni_pcimt_sc_init();
- mips_io_port_base = SNI_PORT_BASE;
+ set_io_port_base(SNI_PORT_BASE);
/*
* Setup (E)ISA I/O memory access stuff
*/
isa_slot_offset = 0xb0000000;
// sni_map_isa_cache = 0;
+#ifdef CONFIG_EISA
EISA_bus = 1;
+#endif
request_region(0x00,0x20,"dma1");
request_region(0x40,0x20,"timer");
@@ -95,14 +94,12 @@
request_region(0x70,0x10,"rtc");
request_region(0x80,0x10,"dma page reg");
request_region(0xc0,0x20,"dma2");
- board_time_init = sni_rm200_pci_time_init;
+ board_timer_setup = sni_rm200_pci_timer_setup;
_machine_restart = sni_machine_restart;
_machine_halt = sni_machine_halt;
_machine_power_off = sni_machine_power_off;
- aux_device_present = 0xaa;
-
/*
* Some cluefull person has placed the PCI config data directly in
* the I/O port space ...
@@ -127,8 +124,4 @@
};
rtc_ops = &std_rtc_ops;
- kbd_ops = &std_kbd_ops;
-#ifdef CONFIG_PSMOUSE
- aux_device_present = 0xaa;
-#endif
}
diff -Nru a/arch/mips/vmlinux.lds.S b/arch/mips/vmlinux.lds.S
--- a/arch/mips/vmlinux.lds.S Sun Aug 3 13:14:47 2003
+++ b/arch/mips/vmlinux.lds.S Sun Aug 3 13:14:47 2003
@@ -1,10 +1,27 @@
#include <asm-generic/vmlinux.lds.h>
+#undef mips /* CPP really sucks for this job */
+#define mips mips
OUTPUT_ARCH(mips)
ENTRY(kernel_entry)
-jiffies = JIFFIES32;
+jiffies = JIFFIES;
SECTIONS
{
+#ifdef CONFIG_BOOT_ELF64
+ /* Read-only sections, merged into text segment: */
+ /* . = 0xc000000000000000; */
+
+ /* This is the value for an Origin kernel, taken from an IRIX kernel. */
+ /* . = 0xc00000000001c000; */
+
+ /* Set the vaddr for the text segment to a value
+ >= 0xa800 0000 0001 9000 if no symmon is going to configured
+ >= 0xa800 0000 0030 0000 otherwise */
+
+ /* . = 0xa800000000300000; */
+ /* . = 0xa800000000300000; */
+ . = 0xffffffff80300000;
+#endif
. = LOADADDR;
/* read-only */
_text = .; /* Text and read-only data */
@@ -64,7 +81,13 @@
_edata = .; /* End of data section */
+#ifdef CONFIG_MIPS32
. = ALIGN(8192); /* init_task */
+#endif
+#ifdef CONFIG_MIPS64
+ . = ALIGN(16384); /* init_task */
+#endif
+ . = . + MAPPED_OFFSET; /* for CONFIG_MAPPED_KERNEL */
.data.init_task : { *(.data.init_task) }
/* will be freed after init */
diff -Nru a/arch/mips/vr4181/common/Makefile b/arch/mips/vr4181/common/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/common/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,7 @@
+#
+# Makefile for common code of NEC vr4181 based boards
+#
+
+obj-y := irq.o int_handler.o serial.o time.o
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips/vr4181/common/int_handler.S b/arch/mips/vr4181/common/int_handler.S
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/common/int_handler.S Sun Aug 3 13:14:53 2003
@@ -0,0 +1,206 @@
+/*
+ * arch/mips/vr4181/common/int_handler.S
+ *
+ * Adapted to the VR4181 and almost entirely rewritten:
+ * Copyright (C) 1999 Bradley D. LaRonde and Michael Klar
+ *
+ * Clean up to conform to the new IRQ
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+
+#include <asm/vr4181/vr4181.h>
+
+/*
+ * [jsun]
+ * See include/asm/vr4181/irq.h for IRQ assignment and strategy.
+ */
+
+ .text
+ .set noreorder
+
+ .align 5
+ NESTED(vr4181_handle_irq, PT_SIZE, ra)
+
+ .set noat
+ SAVE_ALL
+ CLI
+
+ .set at
+ .set noreorder
+
+ mfc0 t0, CP0_CAUSE
+ mfc0 t2, CP0_STATUS
+
+ and t0, t2
+
+ /* we check IP3 first; it happens most frequently */
+ andi t1, t0, STATUSF_IP3
+ bnez t1, ll_cpu_ip3
+ andi t1, t0, STATUSF_IP2
+ bnez t1, ll_cpu_ip2
+ andi t1, t0, STATUSF_IP7 /* cpu timer */
+ bnez t1, ll_cputimer_irq
+ andi t1, t0, STATUSF_IP4
+ bnez t1, ll_cpu_ip4
+ andi t1, t0, STATUSF_IP5
+ bnez t1, ll_cpu_ip5
+ andi t1, t0, STATUSF_IP6
+ bnez t1, ll_cpu_ip6
+ andi t1, t0, STATUSF_IP0 /* software int 0 */
+ bnez t1, ll_cpu_ip0
+ andi t1, t0, STATUSF_IP1 /* software int 1 */
+ bnez t1, ll_cpu_ip1
+ nop
+
+ .set reorder
+do_spurious:
+ j spurious_interrupt
+
+/*
+ * regular CPU irqs
+ */
+ll_cputimer_irq:
+ li a0, VR4181_IRQ_TIMER
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+
+ll_cpu_ip0:
+ li a0, VR4181_IRQ_SW1
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cpu_ip1:
+ li a0, VR4181_IRQ_SW2
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cpu_ip3:
+ li a0, VR4181_IRQ_INT1
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cpu_ip4:
+ li a0, VR4181_IRQ_INT2
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cpu_ip5:
+ li a0, VR4181_IRQ_INT3
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cpu_ip6:
+ li a0, VR4181_IRQ_INT4
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+/*
+ * One of the sys irq has happend.
+ *
+ * In the interest of speed, we first determine in the following order
+ * which 16-irq block have pending interrupts:
+ * sysint1 (16 sources, including cascading intrs from GPIO)
+ * sysint2
+ * gpio (16 intr sources)
+ *
+ * Then we do binary search to find the exact interrupt source.
+ */
+ll_cpu_ip2:
+
+ lui t3,%hi(VR4181_SYSINT1REG)
+ lhu t0,%lo(VR4181_SYSINT1REG)(t3)
+ lhu t2,%lo(VR4181_MSYSINT1REG)(t3)
+ and t0, 0xfffb /* hack - remove RTC Long 1 intr */
+ and t0, t2
+ beqz t0, check_sysint2
+
+ /* check for GPIO interrupts */
+ andi t1, t0, 0x0100
+ bnez t1, check_gpio_int
+
+ /* so we have an interrupt in sysint1 which is not gpio int */
+ li a0, VR4181_SYS_IRQ_BASE - 1
+ j check_16
+
+check_sysint2:
+
+ lhu t0,%lo(VR4181_SYSINT2REG)(t3)
+ lhu t2,%lo(VR4181_MSYSINT2REG)(t3)
+ and t0, 0xfffe /* hack - remove RTC Long 2 intr */
+ and t0, t2
+ li a0, VR4181_SYS_IRQ_BASE + 16 - 1
+ j check_16
+
+check_gpio_int:
+ lui t3,%hi(VR4181_GPINTMSK)
+ lhu t0,%lo(VR4181_GPINTMSK)(t3)
+ lhu t2,%lo(VR4181_GPINTSTAT)(t3)
+ xori t0, 0xffff /* why? reverse logic? */
+ and t0, t2
+ li a0, VR4181_GPIO_IRQ_BASE - 1
+ j check_16
+
+/*
+ * When we reach check_16, we have 16-bit status in t0 and base irq number
+ * in a0.
+ */
+check_16:
+ andi t1, t0, 0xff
+ bnez t1, check_8
+
+ srl t0, 8
+ addi a0, 8
+ j check_8
+
+/*
+ * When we reach check_8, we have 8-bit status in t0 and base irq number
+ * in a0.
+ */
+check_8:
+ andi t1, t0, 0xf
+ bnez t1, check_4
+
+ srl t0, 4
+ addi a0, 4
+ j check_4
+
+/*
+ * When we reach check_4, we have 4-bit status in t0 and base irq number
+ * in a0.
+ */
+check_4:
+ andi t0, t0, 0xf
+ beqz t0, do_spurious
+
+loop:
+ andi t2, t0, 0x1
+ srl t0, 1
+ addi a0, 1
+ beqz t2, loop
+
+found_it:
+ move a1, sp
+ jal do_IRQ
+
+ j ret_from_irq
+
+ END(vr4181_handle_irq)
diff -Nru a/arch/mips/vr4181/common/irq.c b/arch/mips/vr4181/common/irq.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/common/irq.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,249 @@
+/*
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * linux/arch/mips/vr4181/common/irq.c
+ * Completely re-written to use the new irq.c
+ *
+ * Credits to Bradley D. LaRonde and Michael Klar for writing the original
+ * irq.c file which was derived from the common irq.c file.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/gdb-stub.h>
+
+#include <asm/vr4181/vr4181.h>
+
+/*
+ * Strategy:
+ *
+ * We essentially have three irq controllers, CPU, system, and gpio.
+ *
+ * CPU irq controller is taken care by arch/mips/kernel/irq_cpu.c and
+ * CONFIG_IRQ_CPU config option.
+ *
+ * We here provide sys_irq and gpio_irq controller code.
+ */
+
+static int sys_irq_base;
+static int gpio_irq_base;
+
+/* ---------------------- sys irq ------------------------ */
+static void
+sys_irq_enable(unsigned int irq)
+{
+ irq -= sys_irq_base;
+ if (irq < 16) {
+ *VR4181_MSYSINT1REG |= (u16)(1 << irq);
+ } else {
+ irq -= 16;
+ *VR4181_MSYSINT2REG |= (u16)(1 << irq);
+ }
+}
+
+static void
+sys_irq_disable(unsigned int irq)
+{
+ irq -= sys_irq_base;
+ if (irq < 16) {
+ *VR4181_MSYSINT1REG &= ~((u16)(1 << irq));
+ } else {
+ irq -= 16;
+ *VR4181_MSYSINT2REG &= ~((u16)(1 << irq));
+ }
+
+}
+
+static unsigned int
+sys_irq_startup(unsigned int irq)
+{
+ sys_irq_enable(irq);
+ return 0;
+}
+
+#define sys_irq_shutdown sys_irq_disable
+#define sys_irq_ack sys_irq_disable
+
+static void
+sys_irq_end(unsigned int irq)
+{
+ if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ sys_irq_enable(irq);
+}
+
+static hw_irq_controller sys_irq_controller = {
+ "vr4181_sys_irq",
+ sys_irq_startup,
+ sys_irq_shutdown,
+ sys_irq_enable,
+ sys_irq_disable,
+ sys_irq_ack,
+ sys_irq_end,
+ NULL /* no affinity stuff for UP */
+};
+
+/* ---------------------- gpio irq ------------------------ */
+/* gpio irq lines use reverse logic */
+static void
+gpio_irq_enable(unsigned int irq)
+{
+ irq -= gpio_irq_base;
+ *VR4181_GPINTMSK &= ~((u16)(1 << irq));
+}
+
+static void
+gpio_irq_disable(unsigned int irq)
+{
+ irq -= gpio_irq_base;
+ *VR4181_GPINTMSK |= (u16)(1 << irq);
+}
+
+static unsigned int
+gpio_irq_startup(unsigned int irq)
+{
+ gpio_irq_enable(irq);
+
+ irq -= gpio_irq_base;
+ *VR4181_GPINTEN |= (u16)(1 << irq );
+
+ return 0;
+}
+
+static void
+gpio_irq_shutdown(unsigned int irq)
+{
+ gpio_irq_disable(irq);
+
+ irq -= gpio_irq_base;
+ *VR4181_GPINTEN &= ~((u16)(1 << irq ));
+}
+
+static void
+gpio_irq_ack(unsigned int irq)
+{
+ u16 irqtype;
+ u16 irqshift;
+
+ gpio_irq_disable(irq);
+
+ /* we clear interrupt if it is edge triggered */
+ irq -= gpio_irq_base;
+ if (irq < 8) {
+ irqtype = *VR4181_GPINTTYPL;
+ irqshift = 2 << (irq*2);
+ } else {
+ irqtype = *VR4181_GPINTTYPH;
+ irqshift = 2 << ((irq-8)*2);
+ }
+ if ( ! (irqtype & irqshift) ) {
+ *VR4181_GPINTSTAT = (u16) (1 << irq);
+ }
+}
+
+static void
+gpio_irq_end(unsigned int irq)
+{
+ if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ gpio_irq_enable(irq);
+}
+
+static hw_irq_controller gpio_irq_controller = {
+ "vr4181_gpio_irq",
+ gpio_irq_startup,
+ gpio_irq_shutdown,
+ gpio_irq_enable,
+ gpio_irq_disable,
+ gpio_irq_ack,
+ gpio_irq_end,
+ NULL /* no affinity stuff for UP */
+};
+
+/* --------------------- IRQ init stuff ---------------------- */
+
+extern asmlinkage void vr4181_handle_irq(void);
+extern void breakpoint(void);
+extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
+extern void mips_cpu_irq_init(u32 irq_base);
+
+static struct irqaction cascade =
+ { no_action, SA_INTERRUPT, 0, "cascade", NULL, NULL };
+static struct irqaction reserved =
+ { no_action, SA_INTERRUPT, 0, "cascade", NULL, NULL };
+
+void __init init_IRQ(void)
+{
+ int i;
+ extern irq_desc_t irq_desc[];
+
+ set_except_vector(0, vr4181_handle_irq);
+
+ /* init CPU irqs */
+ mips_cpu_irq_init(VR4181_CPU_IRQ_BASE);
+
+ /* init sys irqs */
+ sys_irq_base = VR4181_SYS_IRQ_BASE;
+ for (i=sys_irq_base; i < sys_irq_base + VR4181_NUM_SYS_IRQ; i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = NULL;
+ irq_desc[i].depth = 1;
+ irq_desc[i].handler = &sys_irq_controller;
+ }
+
+ /* init gpio irqs */
+ gpio_irq_base = VR4181_GPIO_IRQ_BASE;
+ for (i=gpio_irq_base; i < gpio_irq_base + VR4181_NUM_GPIO_IRQ; i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = NULL;
+ irq_desc[i].depth = 1;
+ irq_desc[i].handler = &gpio_irq_controller;
+ }
+
+ /* Default all ICU IRQs to off ... */
+ *VR4181_MSYSINT1REG = 0;
+ *VR4181_MSYSINT2REG = 0;
+
+ /* We initialize the level 2 ICU registers to all bits disabled. */
+ *VR4181_MPIUINTREG = 0;
+ *VR4181_MAIUINTREG = 0;
+ *VR4181_MKIUINTREG = 0;
+
+ /* disable all GPIO intrs */
+ *VR4181_GPINTMSK = 0xffff;
+
+ /* vector handler. What these do is register the IRQ as non-sharable */
+ setup_irq(VR4181_IRQ_INT0, &cascade);
+ setup_irq(VR4181_IRQ_GIU, &cascade);
+
+ /*
+ * RTC interrupts are interesting. They have two destinations.
+ * One is at sys irq controller, and the other is at CPU IP3 and IP4.
+ * RTC timer is used as system timer.
+ * We enable them here, but timer routine will register later
+ * with CPU IP3/IP4.
+ */
+ setup_irq(VR4181_IRQ_RTCL1, &reserved);
+ setup_irq(VR4181_IRQ_RTCL2, &reserved);
+
+#ifdef CONFIG_KGDB
+ printk("Setting debug traps - please connect the remote debugger.\n");
+
+ set_debug_traps();
+
+ // you may move this line to whereever you want
+ breakpoint();
+#endif
+}
diff -Nru a/arch/mips/vr4181/common/serial.c b/arch/mips/vr4181/common/serial.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/common/serial.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/vr4181/common/serial.c
+ * initialize serial port on vr4181.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+/*
+ * [jsun, 010925]
+ * You need to make sure rs_table has at least one element in
+ * drivers/char/serial.c file. There is no good way to do it right
+ * now. A workaround is to include CONFIG_SERIAL_MANY_PORTS in your
+ * configure file, which would gives you 64 ports and wastes 11K ram.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+
+#include <asm/vr4181/vr4181.h>
+
+void __init vr4181_init_serial(void)
+{
+ struct serial_struct s;
+
+ /* turn on UART clock */
+ *VR4181_CMUCLKMSK |= VR4181_CMUCLKMSK_MSKSIU;
+
+ /* clear memory */
+ memset(&s, 0, sizeof(s));
+
+ s.line = 0; /* we set the first one */
+ s.baud_base = 1152000;
+ s.irq = VR4181_IRQ_SIU;
+ s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; /* STD_COM_FLAGS */
+ s.iomem_base = (u8*)VR4181_SIURB;
+ s.iomem_reg_shift = 0;
+ s.io_type = SERIAL_IO_MEM;
+ if (early_serial_setup(&s) != 0) {
+ panic("vr4181_init_serial() failed!");
+ }
+}
+
diff -Nru a/arch/mips/vr4181/common/time.c b/arch/mips/vr4181/common/time.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/common/time.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,145 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * rtc and time ops for vr4181. Part of code is drived from
+ * linux-vr, originally written by Bradley D. LaRonde & Michael Klar.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+#include <linux/param.h> /* for HZ */
+#include <linux/time.h>
+#include <linux/interrupt.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+
+#include <asm/vr4181/vr4181.h>
+
+#define COUNTS_PER_JIFFY ((32768 + HZ/2) / HZ)
+
+/*
+ * RTC ops
+ */
+
+spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
+
+/* per VR41xx docs, bad data can be read if between 2 counts */
+static inline unsigned short
+read_time_reg(volatile unsigned short *reg)
+{
+ unsigned short value;
+ do {
+ value = *reg;
+ barrier();
+ } while (value != *reg);
+ return value;
+}
+
+static unsigned long
+vr4181_rtc_get_time(void)
+{
+ unsigned short regh, regm, regl;
+
+ // why this crazy order, you ask? to guarantee that neither m
+ // nor l wrap before all 3 read
+ do {
+ regm = read_time_reg(VR4181_ETIMEMREG);
+ barrier();
+ regh = read_time_reg(VR4181_ETIMEHREG);
+ barrier();
+ regl = read_time_reg(VR4181_ETIMELREG);
+ } while (regm != read_time_reg(VR4181_ETIMEMREG));
+ return ((regh << 17) | (regm << 1) | (regl >> 15));
+}
+
+static int
+vr4181_rtc_set_time(unsigned long timeval)
+{
+ unsigned short intreg;
+ unsigned long flags;
+
+ spin_lock_irqsave(&rtc_lock, flags);
+ intreg = *VR4181_RTCINTREG & 0x05;
+ barrier();
+ *VR4181_ETIMELREG = timeval << 15;
+ *VR4181_ETIMEMREG = timeval >> 1;
+ *VR4181_ETIMEHREG = timeval >> 17;
+ barrier();
+ // assume that any ints that just triggered are invalid, since the
+ // time value is written non-atomically in 3 separate regs
+ *VR4181_RTCINTREG = 0x05 ^ intreg;
+ spin_unlock_irqrestore(&rtc_lock, flags);
+
+ return 0;
+}
+
+
+/*
+ * timer interrupt routine (wrapper)
+ *
+ * we need our own interrupt routine because we need to clear
+ * RTC1 interrupt.
+ */
+static void
+vr4181_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ /* Clear the interrupt. */
+ *VR4181_RTCINTREG = 0x2;
+
+ /* call the generic one */
+ timer_interrupt(irq, dev_id, regs);
+}
+
+
+/*
+ * vr4181_time_init:
+ *
+ * We pick the following choices:
+ * . we use elapsed timer as the RTC. We set some reasonable init data since
+ * it does not persist across reset
+ * . we use RTC1 as the system timer interrupt source.
+ * . we use CPU counter for fast_gettimeoffset and we calivrate the cpu
+ * frequency. In other words, we use calibrate_div64_gettimeoffset().
+ * . we use our own timer interrupt routine which clears the interrupt
+ * and then calls the generic high-level timer interrupt routine.
+ *
+ */
+
+extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
+
+static void
+vr4181_timer_setup(struct irqaction *irq)
+{
+ /* over-write the handler to be our own one */
+ irq->handler = vr4181_timer_interrupt;
+
+ /* sets up the frequency */
+ *VR4181_RTCL1LREG = COUNTS_PER_JIFFY;
+ *VR4181_RTCL1HREG = 0;
+
+ /* and ack any pending ints */
+ *VR4181_RTCINTREG = 0x2;
+
+ /* setup irqaction */
+ setup_irq(VR4181_IRQ_INT1, irq);
+
+}
+
+void
+vr4181_init_time(void)
+{
+ /* setup hookup functions */
+ rtc_get_time = vr4181_rtc_get_time;
+ rtc_set_time = vr4181_rtc_set_time;
+
+ board_timer_setup = vr4181_timer_setup;
+}
+
diff -Nru a/arch/mips/vr4181/osprey/Makefile b/arch/mips/vr4181/osprey/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/osprey/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,7 @@
+#
+# Makefile for common code of NEC Osprey board
+#
+
+obj-y := setup.o prom.o reset.o
+
+obj-$(CONFIG_KGDB) += dbg_io.o
diff -Nru a/arch/mips/vr4181/osprey/dbg_io.c b/arch/mips/vr4181/osprey/dbg_io.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/osprey/dbg_io.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,136 @@
+/*
+ * kgdb io functions for osprey. We use the serial port on debug board.
+ *
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+/* ======================= CONFIG ======================== */
+
+/* [jsun] we use the second serial port for kdb */
+#define BASE 0xb7fffff0
+#define MAX_BAUD 115200
+
+/* distance in bytes between two serial registers */
+#define REG_OFFSET 1
+
+/*
+ * 0 - kgdb does serial init
+ * 1 - kgdb skip serial init
+ */
+static int remoteDebugInitialized = 1;
+
+/*
+ * the default baud rate *if* kgdb does serial init
+ */
+#define BAUD_DEFAULT UART16550_BAUD_38400
+
+/* ======================= END OF CONFIG ======================== */
+
+typedef unsigned char uint8;
+typedef unsigned int uint32;
+
+#define UART16550_BAUD_2400 2400
+#define UART16550_BAUD_4800 4800
+#define UART16550_BAUD_9600 9600
+#define UART16550_BAUD_19200 19200
+#define UART16550_BAUD_38400 38400
+#define UART16550_BAUD_57600 57600
+#define UART16550_BAUD_115200 115200
+
+#define UART16550_PARITY_NONE 0
+#define UART16550_PARITY_ODD 0x08
+#define UART16550_PARITY_EVEN 0x18
+#define UART16550_PARITY_MARK 0x28
+#define UART16550_PARITY_SPACE 0x38
+
+#define UART16550_DATA_5BIT 0x0
+#define UART16550_DATA_6BIT 0x1
+#define UART16550_DATA_7BIT 0x2
+#define UART16550_DATA_8BIT 0x3
+
+#define UART16550_STOP_1BIT 0x0
+#define UART16550_STOP_2BIT 0x4
+
+/* register offset */
+#define OFS_RCV_BUFFER 0
+#define OFS_TRANS_HOLD 0
+#define OFS_SEND_BUFFER 0
+#define OFS_INTR_ENABLE (1*REG_OFFSET)
+#define OFS_INTR_ID (2*REG_OFFSET)
+#define OFS_DATA_FORMAT (3*REG_OFFSET)
+#define OFS_LINE_CONTROL (3*REG_OFFSET)
+#define OFS_MODEM_CONTROL (4*REG_OFFSET)
+#define OFS_RS232_OUTPUT (4*REG_OFFSET)
+#define OFS_LINE_STATUS (5*REG_OFFSET)
+#define OFS_MODEM_STATUS (6*REG_OFFSET)
+#define OFS_RS232_INPUT (6*REG_OFFSET)
+#define OFS_SCRATCH_PAD (7*REG_OFFSET)
+
+#define OFS_DIVISOR_LSB (0*REG_OFFSET)
+#define OFS_DIVISOR_MSB (1*REG_OFFSET)
+
+
+/* memory-mapped read/write of the port */
+#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
+#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
+
+void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+{
+ /* disable interrupts */
+ UART16550_WRITE(OFS_INTR_ENABLE, 0);
+
+ /* set up buad rate */
+ {
+ uint32 divisor;
+
+ /* set DIAB bit */
+ UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+
+ /* set divisor */
+ divisor = MAX_BAUD / baud;
+ UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+ UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+
+ /* clear DIAB bit */
+ UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+ }
+
+ /* set data format */
+ UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+}
+
+
+uint8 getDebugChar(void)
+{
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(BAUD_DEFAULT,
+ UART16550_DATA_8BIT,
+ UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+ }
+
+ while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+ return UART16550_READ(OFS_RCV_BUFFER);
+}
+
+
+int putDebugChar(uint8 byte)
+{
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(BAUD_DEFAULT,
+ UART16550_DATA_8BIT,
+ UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+ }
+
+ while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+ UART16550_WRITE(OFS_SEND_BUFFER, byte);
+ return 1;
+}
diff -Nru a/arch/mips/vr4181/osprey/prom.c b/arch/mips/vr4181/osprey/prom.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/osprey/prom.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/vr4181/osprey/prom.c
+ * prom code for osprey.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+char arcs_cmdline[CL_SIZE];
+
+const char *get_system_type(void)
+{
+ return "NEC_Vr41xx Osprey";
+}
+
+/*
+ * [jsun] right now we assume it is the nec debug monitor, which does
+ * not pass any arguments.
+ */
+void __init prom_init()
+{
+ strcpy(arcs_cmdline, "ip=bootp ");
+ strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
+ // strcpy(arcs_cmdline, "ether=0,0x0300,eth0 "
+ // strcat(arcs_cmdline, "video=vr4181fb:xres:240,yres:320,bpp:8 ");
+
+ mips_machgroup = MACH_GROUP_NEC_VR41XX;
+ mips_machtype = MACH_NEC_OSPREY;
+
+ /* 16MB fixed */
+ add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+{
+}
+
diff -Nru a/arch/mips/vr4181/osprey/reset.c b/arch/mips/vr4181/osprey/reset.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/osprey/reset.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,40 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 1997, 2001 Ralf Baechle
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/cacheflush.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void nec_osprey_restart(char *command)
+{
+ set_c0_status(ST0_ERL);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+ flush_cache_all();
+ write_c0_wired(0);
+ __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+}
+
+void nec_osprey_halt(void)
+{
+ printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+void nec_osprey_power_off(void)
+{
+ nec_osprey_halt();
+}
diff -Nru a/arch/mips/vr4181/osprey/setup.c b/arch/mips/vr4181/osprey/setup.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/mips/vr4181/osprey/setup.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,71 @@
+/*
+ * linux/arch/mips/vr4181/setup.c
+ *
+ * VR41xx setup routines
+ *
+ * Copyright (C) 1999 Bradley D. LaRonde
+ * Copyright (C) 1999, 2000 Michael Klar
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <asm/reboot.h>
+#include <asm/vr4181/vr4181.h>
+#include <asm/io.h>
+
+
+extern void nec_osprey_restart(char* c);
+extern void nec_osprey_halt(void);
+extern void nec_osprey_power_off(void);
+
+extern void vr4181_init_serial(void);
+extern void vr4181_init_time(void);
+
+void __init nec_osprey_setup(void)
+{
+ set_io_port_base(VR4181_PORT_BASE);
+ isa_slot_offset = VR4181_ISAMEM_BASE;
+
+ vr4181_init_serial();
+ vr4181_init_time();
+
+#ifdef CONFIG_FB
+ conswitchp = &dummy_con;
+#endif
+
+ _machine_restart = nec_osprey_restart;
+ _machine_halt = nec_osprey_halt;
+ _machine_power_off = nec_osprey_power_off;
+
+ /* setup resource limit */
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.end = 0xffffffff;
+
+ /* [jsun] hack */
+ /*
+ printk("[jsun] hack to change external ISA control register, %x -> %x\n",
+ (*VR4181_XISACTL),
+ (*VR4181_XISACTL) | 0x2);
+ *VR4181_XISACTL |= 0x2;
+ */
+
+ // *VR4181_GPHIBSTH = 0x2000;
+ // *VR4181_GPMD0REG = 0x00c0;
+ // *VR4181_GPINTEN = 1<<6;
+
+ /* [jsun] I believe this will get the interrupt type right
+ * for the ether port.
+ */
+ *VR4181_GPINTTYPL = 0x3000;
+}
diff -Nru a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
--- a/arch/mips/vr41xx/common/vrc4173.c Sun Aug 3 13:14:50 2003
+++ b/arch/mips/vr41xx/common/vrc4173.c Sun Aug 3 13:14:50 2003
@@ -53,7 +53,7 @@
#define VRC4173_SYSINT1REG 0x060
#define VRC4173_MSYSINT1REG 0x06c
-static struct pci_device_id vrc4173_table[] __devinitdata = {
+static struct pci_device_id vrc4173_table[] = {
{PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC4173, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0, }
};
diff -Nru a/arch/mips64/Kconfig b/arch/mips64/Kconfig
--- a/arch/mips64/Kconfig Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,17 +0,0 @@
-#
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.txt.
-#
-config MIPS
- bool
- default y
-
-config MIPS32
- bool
- default n
-
-config MIPS64
- bool
- default y
-
-source "arch/mips/Kconfig-shared"
diff -Nru a/arch/mips64/Makefile b/arch/mips64/Makefile
--- a/arch/mips64/Makefile Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,333 +0,0 @@
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002 Maciej W. Rozycki
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies. Remember to do have actions
-# for "archclean" cleaning up for this architecture.
-#
-
-#
-# Select the object file format to substitute into the linker script.
-#
-ifdef CONFIG_CPU_LITTLE_ENDIAN
-tool-prefix = mips64el-linux-
-32bit-bfd = elf32-tradlittlemips
-64bit-bfd = elf64-tradlittlemips
-else
-tool-prefix = mips64-linux-
-32bit-bfd = elf32-tradbigmips
-64bit-bfd = elf64-tradbigmips
-endif
-
-ifdef CONFIG_CROSSCOMPILE
-CROSS_COMPILE := $(tool-prefix)
-endif
-
-#
-# The ELF GCC uses -G 0 -mabicalls -fpic as default. We don't need PIC
-# code in the kernel since it only slows down the whole thing. For the
-# old GCC these options are just the defaults. At some point we might
-# make use of global pointer optimizations.
-#
-# The DECStation requires an ECOFF kernel for remote booting, other MIPS
-# machines may also. Since BFD is incredibly buggy with respect to
-# crossformat linking we rely on the elf2ecoff tool for format conversion.
-#
-cflags-y := -I $(TOPDIR)/include/asm/gcc
-cflags-y += -mabi=64 -G 0 -mno-abicalls -fno-pic -Wa,--trap -pipe
-LDFLAGS_vmlinux += -G 0 -static # -N
-MODFLAGS += -mlong-calls
-
-cflags-$(CONFIG_KGDB) += -g
-cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
-
-check_gcc = $(shell if $(AS) $(1) -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi)
-check_warning = $(shell if $(CC) $(1) -c -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi)
-
-#
-# CPU-dependent compiler/assembler options for optimization.
-#
-cflags-$(CONFIG_CPU_R4300) += -mcpu=r4300 -mips3
-cflags-$(CONFIG_CPU_R4X00) += -mcpu=r4600 -mips3
-cflags-$(CONFIG_CPU_R5000) += -mcpu=r8000 -mips4
-cflags-$(CONFIG_CPU_NEVADA) += -mcpu=r8000 -mips3 -mmad
-cflags-$(CONFIG_CPU_RM7000) += $(call check_gcc, -mcpu=r7000, -mcpu=r5000) \
- -mips4
-cflags-$(CONFIG_CPU_SB1) += $(call check_gcc, -mcpu=sb1, -mcpu=r8000) \
- $(call check_gcc, -mips64, -mips4)
-cflags-$(CONFIG_CPU_R8000) += -mcpu=r8000 -mips4
-cflags-$(CONFIG_CPU_R10000) += -mcpu=r8000 -mips4
-ifdef CONFIG_CPU_SB1
-ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
-MODFLAGS += -msb1-pass1-workarounds
-endif
-endif
-# Should be used then we get a MIPS64 compiler
-#cflags-$(CONFIG_CPU_MIPS64) += -mips64
-cflags-$(CONFIG_CPU_MIPS64) += -mcpu=r8000 -mips4
-
-#
-# ramdisk/initrd support
-# You need a compressed ramdisk image, named ramdisk.gz in
-# arch/mips/ramdisk
-#
-ifdef CONFIG_EMBEDDED_RAMDISK
-CORE_FILES += arch/mips/ramdisk/ramdisk.o
-SUBDIRS += arch/mips/ramdisk
-endif
-
-#
-# Firmware support
-#
-libs-$(CONFIG_ARC) += arch/mips/arc/
-libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
-
-#
-# Board-dependent options and extra files
-#
-
-#
-# DECstation family
-#
-ifdef CONFIG_DECSTATION
-CORE_FILES += arch/mips/dec/dec.o
-SUBDIRS += arch/mips/dec arch/mips/dec/prom
-LIBS += arch/mips/dec/prom/rexlib.a
-LOADADDR := 0x80040000
-endif
-
-#
-# MIPS Atlas board
-#
-core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
-core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
-load-$(CONFIG_MIPS_ATLAS) += 0x80100000
-
-#
-# MIPS Malta board
-#
-core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
-load-$(CONFIG_MIPS_MALTA) += 0x80100000
-
-#
-# MIPS SEAD board
-#
-core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
-load-$(CONFIG_MIPS_SEAD) += 0x80100000
-
-#
-# Momentum Ocelot board
-#
-# The Ocelot setup.o must be linked early - it does the ioremap() for the
-# mips_io_port_base.
-#
-core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
- arch/mips/gt64120/momenco_ocelot/
-load-$(CONFIG_MOMENCO_OCELOT) += 0x80100000
-
-#
-# Momentum Ocelot-G board
-#
-# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
-# mips_io_port_base.
-#
-core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
-load-$(CONFIG_MOMENCO_OCELOT_G) += 0x80100000
-
-#
-# Momentum Ocelot-C and -CS boards
-#
-# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
-# mips_io_port_base.
-core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
-load-$(CONFIG_MOMENCO_OCELOT_C) += 0x80100000
-
-#
-# SGI IP22 (Indy/Indigo2)
-#
-# Set the load address to >= 0x88069000 if you want to leave space for symmon,
-# 0x88004000 for production kernels. Note that the value must be 16kb aligned
-# or the handling of the current variable will break.
-#
-core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
-load-$(CONFIG_SGI_IP22) += 0x88004000
-
-#
-# SGI-IP27 (Origin200/2000)
-#
-# Set the load address to >= 0xc000000000300000 if you want to leave space for
-# symmon, 0xc00000000001c000 for production kernels. Note that the value
-# must be 16kb aligned or the handling of the current variable will break.
-#
-ifdef CONFIG_SGI_IP27
-core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
-#load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
-ifdef CONFIG_MAPPED_KERNEL
-load-$(CONFIG_SGI_IP27) += 0xc001c000
-else
-load-$(CONFIG_SGI_IP27) += 0x8001c000
-endif
-endif
-
-#
-# SGI-IP32 (O2)
-#
-# Set the load address to >= 0x????????? if you want to leave space for symmon,
-# 0x80002000 for production kernels. Note that the value must be 16kb aligned
-# or the handling of the current variable will break.
-#
-core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
-load-$(CONFIG_SGI_IP32) += 0x80002000
-
-#
-# Sibyte SB1250 SOC
-#
-# This is a LIB so that it links at the end, and initcalls are later
-# the sequence; but it is built as an object so that modules don't get
-# removed (as happens, even if they have __initcall/module_init)
-#
-core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
-ifdef CONFIG_SIBYTE_BCM112X
-ifdef CONFIG_MIPS_UNCACHED
-load-y += 0xa0100000
-else
-load-y += 0x80100000
-endif
-endif
-ifdef CONFIG_SIBYTE_SB1250
-ifdef CONFIG_MIPS_UNCACHED
-load-y += 0xa0100000
-else
-load-y += 0x80100000
-endif
-endif
-
-#
-# Sibyte BCM91120x (Carmel) board
-# Sibyte BCM91120C (CRhine) board
-# Sibyte BCM91125C (CRhone) board
-# Sibyte BCM91125E (Rhone) board
-# Sibyte SWARM board
-#
-libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_CARMEL) := 0x80100000
-libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_CRHINE) := 0x80100000
-libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_CRHONE) := 0x80100000
-libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_RHONE) := 0x80100000
-libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_SENTOSA) := 0x80100000
-libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_SWARM) := 0x80100000
-
-#
-# SNI RM200 PCI
-#
-core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
-load-$(CONFIG_SNI_RM200_PCI) += 0x80080000
-
-drivers-$(CONFIG_PCI) += arch/mips/pci/
-
-#
-# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
-# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
-# convert to ECOFF using elf2ecoff.
-#
-# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
-# ELF files from 32-bit files by conversion.
-#
-#AS += -64
-#LDFLAGS += -m elf64bmip
-cflags-$(CONFIG_BOOT_ELF32) += -Wa,-32
-cflags-$(CONFIG_BOOT_ELF64) += -Wa,-32
-
-GRRR=-Wa,-mgp64
-cflags-$(CONFIG_BOOT_ELF32) += -Wa,-32 $(call check_warning, $(GRRR),)
-cflags-$(CONFIG_BOOT_ELF64) += -Wa,-32 $(call check_warning, $(GRRR),)
-
-AFLAGS_vmlinux.lds.o := -imacros $(srctree)/include/asm-mips64/sn/mapped_kernel.h \
- -D"LOADADDR=$(load-y)"
-
-AFLAGS += $(cflags-y)
-CFLAGS += $(cflags-y)
-
-LDFLAGS += --oformat $(32bit-bfd)
-LDFLAGS_BLOB := --format binary --oformat $(64bit-bfd)
-
-head-y := arch/mips64/kernel/head.o arch/mips64/kernel/init_task.o
-
-libs-y += arch/mips64/lib/
-core-y += arch/mips64/kernel/ arch/mips64/mm/ arch/mips/math-emu/
-
-MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot
-
-ifdef CONFIG_MAPPED_KERNEL
-vmlinux.64: vmlinux
- $(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xbfffffff40000000 $< $@
-else
-vmlinux.64: vmlinux
- $(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xa7ffffff80000000 $< $@
-endif
-
-makeboot =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/mips/boot $(1)
-
-#
-# SNI firmware is f*cked in interesting ways ...
-#
-ifdef CONFIG_SNI_RM200_PCI
-all: vmlinux.rm200
-endif
-
-vmlinux.ecoff vmlinux.rm200: vmlinux
- +@$(call makeboot,$@)
-
-CLEAN_FILES += vmlinux.ecoff \
- vmlinux.rm200.tmp \
- vmlinux.rm200
-
-archclean:
- @$(MAKE) -f scripts/Makefile.clean obj=arch/mips/boot
- @$(MAKE) -f scripts/Makefile.clean obj=arch/mips/baget
- @$(MAKE) -f scripts/Makefile.clean obj=arch/mips/lasat
-
-archmrproper:
- @$(MAKEBOOT) mrproper
-
-# Generate <asm/offset.h
-#
-# The default rule is suffering from funny problems on MIPS so we using our
-# own ...
-#
-# ---------------------------------------------------------------------------
-
-define filechk_gen-asm-offset.h
- (set -e; \
- echo "#ifndef __ASM_OFFSET_H"; \
- echo "#define __ASM_OFFSET_H"; \
- echo "/*"; \
- echo " * DO NOT MODIFY."; \
- echo " *"; \
- echo " * This file was generated by arch/$(ARCH)/Makefile"; \
- echo " *"; \
- echo " */"; \
- echo ""; \
- sed -ne "/^@@@/s///p"; \
- echo "#endif /* __ASM_OFFSET_H */" )
-endef
-
-prepare: include/asm-$(ARCH)/offset.h
-
-arch/$(ARCH)/kernel/offset.s: include/asm include/linux/version.h \
- include/config/MARKER
-
-include/asm-$(ARCH)/offset.h: arch/$(ARCH)/kernel/offset.s
- $(call filechk,gen-asm-offset.h)
-
-CLEAN_FILES += include/asm-$(ARCH)/offset.h.tmp \
- include/asm-$(ARCH)/offset.h
diff -Nru a/arch/mips64/boot/Makefile b/arch/mips64/boot/Makefile
--- a/arch/mips64/boot/Makefile Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1995, 1998, 1999 by Ralf Baechle
-#
-
-#
-# Some DECstations need all possible sections of an ECOFF executable
-#
-ifdef CONFIG_DECSTATION
- E2EFLAGS = -a
-else
- E2EFLAGS =
-endif
-
-#
-# Drop some uninteresting sections in the kernel.
-# This is only relevant for ELF kernels but doesn't hurt a.out
-#
-drop-sections = .reginfo .mdebug .comment .note
-strip-flags = $(addprefix --remove-section=,$(drop-sections))
-
-all: vmlinux.ecoff addinitrd
-
-vmlinux.rm200: vmlinux
- $(OBJCOPY) \
- --change-addresses=0xfffffffc \
- -O elf32-littlemips \
- $(strip-flags) \
- $< $@
-
-vmlinux.ecoff: elf2ecoff $(TOPDIR)/vmlinux
- ./elf2ecoff $(TOPDIR)/vmlinux vmlinux.ecoff $(E2EFLAGS)
-
-elf2ecoff: $(TOPDIR)/arch/mips/boot/elf2ecoff.c
- $(HOSTCC) -I$(TOPDIR)/arch/mips/boot -I- -o $@ $^
-
-addinitrd: $(TOPDIR)/arch/mips/boot/addinitrd.c
- $(HOSTCC) -I$(TOPDIR)/arch/mips/boot -I- -o $@ $^
-
-clean:
- rm -f vmlinux.ecoff
-
-mrproper:
- rm -f vmlinux.ecoff addinitrd elf2ecoff
diff -Nru a/arch/mips64/defconfig b/arch/mips64/defconfig
--- a/arch/mips64/defconfig Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,652 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-CONFIG_SGI_IP27=y
-# CONFIG_SGI_SN0_N_MODE is not set
-# CONFIG_DISCONTIGMEM is not set
-# CONFIG_NUMA is not set
-# CONFIG_MAPPED_KERNEL is not set
-# CONFIG_REPLICATE_KTEXT is not set
-# CONFIG_REPLICATE_EXHANDLERS is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_L1_CACHE_SHIFT=7
-# CONFIG_FB is not set
-CONFIG_ARC64=y
-CONFIG_BOOT_ELF64=y
-CONFIG_QL_ISP_A64=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-CONFIG_CPU_R10000=y
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=4
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_MIPS_INSANE_LARGE is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_NCR53C8XX is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGI_IOC3_ETH=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_SGI_IP27_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-CONFIG_JBD_DEBUG=y
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/defconfig-atlas b/arch/mips64/defconfig-atlas
--- a/arch/mips64/defconfig-atlas Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,547 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-CONFIG_MIPS_ATLAS=y
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_EFS_FS=y
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/defconfig-decstation b/arch/mips64/defconfig-decstation
--- a/arch/mips64/defconfig-decstation Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,573 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-CONFIG_DECSTATION=y
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=4
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-CONFIG_CPU_R4X00=y
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_TC=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-CONFIG_SCSI_DECNCR=y
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_DECLANCE=y
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DIGI is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_DZ=y
-CONFIG_SERIAL_DZ_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_EXPORTFS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-CONFIG_OSF_PARTITION=y
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-CONFIG_ULTRIX_PARTITION=y
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/defconfig-ip22 b/arch/mips64/defconfig-ip22
--- a/arch/mips64/defconfig-ip22 Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,644 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-CONFIG_SGI_IP22=y
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_IRQ_CPU=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-CONFIG_ARC32=y
-# CONFIG_FB is not set
-CONFIG_ARC_CONSOLE=y
-CONFIG_ARC_PROMLIB=y
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_ISA is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-CONFIG_MIPS32_N32=y
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-CONFIG_SGIWD93_SCSI=y
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGISEEQ=y
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_IP22_ZILOG=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-CONFIG_INDYDOG=y
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_SGI_DS1286=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_SGI_NEWPORT_CONSOLE=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-CONFIG_LOGO_SGI_CLUT224=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -Nru a/arch/mips64/defconfig-ip27 b/arch/mips64/defconfig-ip27
--- a/arch/mips64/defconfig-ip27 Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,652 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-CONFIG_SGI_IP27=y
-# CONFIG_SGI_SN0_N_MODE is not set
-# CONFIG_DISCONTIGMEM is not set
-# CONFIG_NUMA is not set
-# CONFIG_MAPPED_KERNEL is not set
-# CONFIG_REPLICATE_KTEXT is not set
-# CONFIG_REPLICATE_EXHANDLERS is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_L1_CACHE_SHIFT=7
-# CONFIG_FB is not set
-CONFIG_ARC64=y
-CONFIG_BOOT_ELF64=y
-CONFIG_QL_ISP_A64=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-CONFIG_CPU_R10000=y
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=4
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_MIPS_INSANE_LARGE is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_NCR53C8XX is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGI_IOC3_ETH=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_SGI_IP27_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-CONFIG_JBD_DEBUG=y
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/defconfig-ip32 b/arch/mips64/defconfig-ip32
--- a/arch/mips64/defconfig-ip32 Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,637 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-CONFIG_SGI_IP32=y
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-CONFIG_ARC32=y
-# CONFIG_FB is not set
-CONFIG_ARC_MEMORY=y
-CONFIG_ARC_PROMLIB=y
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_R5000_CPU_SCACHE=y
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_CHR_DEV_OSST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-CONFIG_SCSI_AIC7XXX=y
-CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
-CONFIG_AIC7XXX_RESET_DELAY_MS=15000
-# CONFIG_AIC7XXX_PROBE_EISA_VL is not set
-# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
-CONFIG_AIC7XXX_DEBUG_ENABLE=y
-CONFIG_AIC7XXX_DEBUG_MASK=0
-CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_NCR53C8XX is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGI_O2MACE_ETH=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/defconfig-malta b/arch/mips64/defconfig-malta
--- a/arch/mips64/defconfig-malta Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,558 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-CONFIG_MIPS_MALTA=y
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_I8259=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-CONFIG_HAVE_STD_PC_SERIAL_PORT=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-CONFIG_CPU_R4X00=y
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=y
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_EFS_FS=y
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/defconfig-sb1250-swarm b/arch/mips64/defconfig-sb1250-swarm
--- a/arch/mips64/defconfig-sb1250-swarm Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,611 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-CONFIG_SIBYTE_SB1xxx_SOC=y
-CONFIG_SIBYTE_SB1250=y
-# CONFIG_SIMULATION is not set
-CONFIG_SIBYTE_CFE=y
-# CONFIG_SIBYTE_CFE_CONSOLE is not set
-# CONFIG_SIBYTE_BUS_WATCHER is not set
-# CONFIG_SIBYTE_SB1250_PROF is not set
-# CONFIG_SIBYTE_TBPROF is not set
-CONFIG_SIBYTE_SWARM=y
-CONFIG_SIBYTE_BOARD=y
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_DUMMY_KEYB=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-CONFIG_CPU_SB1=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_VTAG_ICACHE=y
-CONFIG_CPU_SB1_PASS_1=y
-# CONFIG_CPU_SB1_PASS_2 is not set
-# CONFIG_CPU_SB1_PASS_2_2 is not set
-CONFIG_SB1_PASS_1_WORKAROUNDS=y
-CONFIG_SB1_CACHE_ERROR=y
-CONFIG_SB1_CERR_IGNORE_RECOVERABLE=y
-# CONFIG_SB1_CERR_SPIN is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=9220
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_NET_SB1250_MAC=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DIGI is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_ISI is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-CONFIG_SIBYTE_SB1250_DUART=y
-CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
-CONFIG_SERIAL_CONSOLE=y
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -Nru a/arch/mips64/defconfig-sead b/arch/mips64/defconfig-sead
--- a/arch/mips64/defconfig-sead Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,391 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS32 is not set
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-CONFIG_MIPS_SEAD=y
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-CONFIG_CPU_R4X00=y
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-CONFIG_KALLSYMS=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=18432
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# MIPS initrd options
-#
-# CONFIG_EMBEDDED_RAMDISK is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-# CONFIG_NET is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# ISDN subsystem
-#
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -Nru a/arch/mips64/kernel/Makefile b/arch/mips64/kernel/Makefile
--- a/arch/mips64/kernel/Makefile Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,30 +0,0 @@
-#
-# Makefile for the Linux/MIPS kernel.
-#
-
-extra-y := head.o init_task.o
-
-obj-y := branch.o cpu-probe.o entry.o irq.o proc.o process.o \
- ptrace.o r4k_cache.o r4k_fpu.o r4k_genex.o r4k_switch.o \
- reset.o scall_64.o semaphore.o setup.o signal.o syscall.o \
- time.o traps.o unaligned.o
-
-obj-$(CONFIG_I8259) += i8259.o
-obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
-
-obj-$(CONFIG_MODULES) += mips64_ksyms.o
-obj-$(CONFIG_MIPS32_COMPAT) += linux32.o signal32.o ioctl32.o
-obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall_n32.o
-obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall_o32.o
-obj-$(CONFIG_SMP) += smp.o
-
-ifndef CONFIG_MAPPED_PCI_IO
-obj-y += pci-dma.o
-endif
-
-obj-$(CONFIG_MODULES) += module.o
-
-CFLAGS_cpu-probe.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
-AFLAGS_r4k_genex.o = -P
-
-EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips64/kernel/binfmt_elfn32.c b/arch/mips64/kernel/binfmt_elfn32.c
--- a/arch/mips64/kernel/binfmt_elfn32.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,115 +0,0 @@
-/*
- * Support for n32 Linux/MIPS ELF binaries.
- *
- * Copyright (C) 1999, 2001 Ralf Baechle
- * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
- *
- * Heavily inspired by the 32-bit Sparc compat code which is
- * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
- * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
- */
-
-#define ELF_ARCH EM_MIPS
-#define ELF_CLASS ELFCLASS32
-#ifdef __MIPSEB__
-#define ELF_DATA ELFDATA2MSB;
-#else /* __MIPSEL__ */
-#define ELF_DATA ELFDATA2LSB;
-#endif
-
-/* ELF register definitions */
-#define ELF_NGREG 45
-#define ELF_NFPREG 33
-
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(hdr) \
-({ \
- int __res = 1; \
- struct elfhdr *__h = (hdr); \
- \
- if (__h->e_machine != EM_MIPS) \
- __res = 0; \
- if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
- __res = 0; \
- if (((__h->e_flags & EF_MIPS_ABI2) == 0) || \
- ((__h->e_flags & EF_MIPS_ABI) != 0)) \
- __res = 0; \
- \
- __res; \
-})
-
-#define TASK32_SIZE 0x7fff8000UL
-#undef ELF_ET_DYN_BASE
-#define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2)
-
-#include <asm/processor.h>
-#include <linux/module.h>
-#include <linux/config.h>
-#include <linux/elfcore.h>
-#include <linux/compat.h>
-
-#define elf_prstatus elf_prstatus32
-struct elf_prstatus32
-{
- struct elf_siginfo pr_info; /* Info associated with signal */
- short pr_cursig; /* Current signal */
- unsigned int pr_sigpend; /* Set of pending signals */
- unsigned int pr_sighold; /* Set of held signals */
- pid_t pr_pid;
- pid_t pr_ppid;
- pid_t pr_pgrp;
- pid_t pr_sid;
- struct compat_timeval pr_utime; /* User time */
- struct compat_timeval pr_stime; /* System time */
- struct compat_timeval pr_cutime;/* Cumulative user time */
- struct compat_timeval pr_cstime;/* Cumulative system time */
- elf_gregset_t pr_reg; /* GP registers */
- int pr_fpvalid; /* True if math co-processor being used. */
-};
-
-#define elf_prpsinfo elf_prpsinfo32
-struct elf_prpsinfo32
-{
- char pr_state; /* numeric process state */
- char pr_sname; /* char for pr_state */
- char pr_zomb; /* zombie */
- char pr_nice; /* nice val */
- unsigned int pr_flag; /* flags */
- __kernel_uid_t pr_uid;
- __kernel_gid_t pr_gid;
- pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
- /* Lots missing */
- char pr_fname[16]; /* filename of executable */
- char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
-};
-
-#define elf_addr_t u32
-#define elf_caddr_t u32
-#define init_elf_binfmt init_elfn32_binfmt
-
-#define ELF_CORE_EFLAGS EF_MIPS_ABI2
-
-#undef CONFIG_BINFMT_ELF
-#ifdef CONFIG_BINFMT_ELF32
-#define CONFIG_BINFMT_ELF CONFIG_BINFMT_ELF32
-#endif
-#undef CONFIG_BINFMT_ELF_MODULE
-#ifdef CONFIG_BINFMT_ELF32_MODULE
-#define CONFIG_BINFMT_ELF_MODULE CONFIG_BINFMT_ELF32_MODULE
-#endif
-
-MODULE_DESCRIPTION("Binary format loader for compatibility with n32 Linux/MIPS binaries");
-MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
-
-#undef MODULE_DESCRIPTION
-#undef MODULE_AUTHOR
-
-#include "../../../fs/binfmt_elf.c"
diff -Nru a/arch/mips64/kernel/binfmt_elfo32.c b/arch/mips64/kernel/binfmt_elfo32.c
--- a/arch/mips64/kernel/binfmt_elfo32.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,136 +0,0 @@
-/*
- * Support for o32 Linux/MIPS ELF binaries.
- *
- * Copyright (C) 1999, 2001 Ralf Baechle
- * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
- *
- * Heavily inspired by the 32-bit Sparc compat code which is
- * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
- * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
- */
-
-#define ELF_ARCH EM_MIPS
-#define ELF_CLASS ELFCLASS32
-#ifdef __MIPSEB__
-#define ELF_DATA ELFDATA2MSB;
-#else /* __MIPSEL__ */
-#define ELF_DATA ELFDATA2LSB;
-#endif
-
-/* ELF register definitions */
-#define ELF_NGREG 45
-#define ELF_NFPREG 33
-
-typedef unsigned int elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(hdr) \
-({ \
- int __res = 1; \
- struct elfhdr *__h = (hdr); \
- \
- if (__h->e_machine != EM_MIPS) \
- __res = 0; \
- if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
- __res = 0; \
- if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
- __res = 0; \
- if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
- ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
- __res = 0; \
- \
- __res; \
-})
-
-#define TASK32_SIZE 0x7fff8000UL
-#undef ELF_ET_DYN_BASE
-#define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2)
-
-#include <asm/processor.h>
-#include <linux/module.h>
-#include <linux/config.h>
-#include <linux/elfcore.h>
-#include <linux/compat.h>
-
-#define elf_prstatus elf_prstatus32
-struct elf_prstatus32
-{
- struct elf_siginfo pr_info; /* Info associated with signal */
- short pr_cursig; /* Current signal */
- unsigned int pr_sigpend; /* Set of pending signals */
- unsigned int pr_sighold; /* Set of held signals */
- pid_t pr_pid;
- pid_t pr_ppid;
- pid_t pr_pgrp;
- pid_t pr_sid;
- struct compat_timeval pr_utime; /* User time */
- struct compat_timeval pr_stime; /* System time */
- struct compat_timeval pr_cutime;/* Cumulative user time */
- struct compat_timeval pr_cstime;/* Cumulative system time */
- elf_gregset_t pr_reg; /* GP registers */
- int pr_fpvalid; /* True if math co-processor being used. */
-};
-
-#define elf_prpsinfo elf_prpsinfo32
-struct elf_prpsinfo32
-{
- char pr_state; /* numeric process state */
- char pr_sname; /* char for pr_state */
- char pr_zomb; /* zombie */
- char pr_nice; /* nice val */
- unsigned int pr_flag; /* flags */
- __kernel_uid_t pr_uid;
- __kernel_gid_t pr_gid;
- pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
- /* Lots missing */
- char pr_fname[16]; /* filename of executable */
- char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
-};
-
-#define elf_addr_t u32
-#define elf_caddr_t u32
-#define init_elf_binfmt init_elf32_binfmt
-
-
-#undef ELF_CORE_COPY_REGS
-#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
-
-void elf32_core_copy_regs(elf_gregset_t _dest, struct pt_regs *_regs)
-{
- int i;
-
- memset(_dest, 0, sizeof(elf_gregset_t));
-
- /* XXXKW the 6 is from EF_REG0 in gdb/gdb/mips-linux-tdep.c, include/asm-mips/reg.h */
- for (i=6; i<38; i++)
- _dest[i] = (elf_greg_t) _regs->regs[i-6];
- _dest[i++] = (elf_greg_t) _regs->lo;
- _dest[i++] = (elf_greg_t) _regs->hi;
- _dest[i++] = (elf_greg_t) _regs->cp0_epc;
- _dest[i++] = (elf_greg_t) _regs->cp0_badvaddr;
- _dest[i++] = (elf_greg_t) _regs->cp0_status;
- _dest[i++] = (elf_greg_t) _regs->cp0_cause;
-}
-
-#undef CONFIG_BINFMT_ELF
-#ifdef CONFIG_BINFMT_ELF32
-#define CONFIG_BINFMT_ELF CONFIG_BINFMT_ELF32
-#endif
-#undef CONFIG_BINFMT_ELF_MODULE
-#ifdef CONFIG_BINFMT_ELF32_MODULE
-#define CONFIG_BINFMT_ELF_MODULE CONFIG_BINFMT_ELF32_MODULE
-#endif
-
-MODULE_DESCRIPTION("Binary format loader for compatibility with o32 Linux/MIPS binaries");
-MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
-
-#undef MODULE_DESCRIPTION
-#undef MODULE_AUTHOR
-
-#include "../../../fs/binfmt_elf.c"
diff -Nru a/arch/mips64/kernel/branch.c b/arch/mips64/kernel/branch.c
--- a/arch/mips64/kernel/branch.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,197 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Branch and jump emulation.
- *
- * Copyright (C) 1996, 1997 by Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <asm/branch.h>
-#include <asm/cpu.h>
-#include <asm/inst.h>
-#include <asm/ptrace.h>
-#include <asm/uaccess.h>
-
-/*
- * Compute the return address and do emulate branch simulation, if required.
- */
-int __compute_return_epc(struct pt_regs *regs)
-{
- unsigned int *addr, bit, fcr31;
- long epc;
- union mips_instruction insn;
-
- epc = regs->cp0_epc;
- if (epc & 3) {
- printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
- force_sig(SIGBUS, current);
- return -EFAULT;
- }
-
- /*
- * Read the instruction
- */
- addr = (unsigned int *) epc;
- if (__get_user(insn.word, addr)) {
- force_sig(SIGSEGV, current);
- return -EFAULT;
- }
-
- regs->regs[0] = 0;
- switch (insn.i_format.opcode) {
- /*
- * jr and jalr are in r_format format.
- */
- case spec_op:
- switch (insn.r_format.func) {
- case jalr_op:
- regs->regs[insn.r_format.rd] = epc + 8;
- /* Fall through */
- case jr_op:
- regs->cp0_epc = regs->regs[insn.r_format.rs];
- break;
- }
- break;
-
- /*
- * This group contains:
- * bltz_op, bgez_op, bltzl_op, bgezl_op,
- * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
- */
- case bcond_op:
- switch (insn.i_format.rt) {
- case bltz_op:
- case bltzl_op:
- if ((long)regs->regs[insn.i_format.rs] < 0)
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case bgez_op:
- case bgezl_op:
- if ((long)regs->regs[insn.i_format.rs] >= 0)
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case bltzal_op:
- case bltzall_op:
- regs->regs[31] = epc + 8;
- if ((long)regs->regs[insn.i_format.rs] < 0)
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case bgezal_op:
- case bgezall_op:
- regs->regs[31] = epc + 8;
- if ((long)regs->regs[insn.i_format.rs] >= 0)
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
- }
- break;
-
- /*
- * These are unconditional and in j_format.
- */
- case jal_op:
- regs->regs[31] = regs->cp0_epc + 8;
- case j_op:
- epc += 4;
- epc >>= 28;
- epc <<= 28;
- epc |= (insn.j_format.target << 2);
- regs->cp0_epc = epc;
- break;
-
- /*
- * These are conditional and in i_format.
- */
- case beq_op:
- case beql_op:
- if (regs->regs[insn.i_format.rs] ==
- regs->regs[insn.i_format.rt])
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case bne_op:
- case bnel_op:
- if (regs->regs[insn.i_format.rs] !=
- regs->regs[insn.i_format.rt])
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case blez_op: /* not really i_format */
- case blezl_op:
- /* rt field assumed to be zero */
- if ((long)regs->regs[insn.i_format.rs] <= 0)
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case bgtz_op:
- case bgtzl_op:
- /* rt field assumed to be zero */
- if ((long)regs->regs[insn.i_format.rs] > 0)
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- /*
- * And now the FPA/cp1 branch instructions.
- */
- case cop1_op:
- if (!cpu_has_fpu)
- fcr31 = current->thread.fpu.soft.sr;
- else
- asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
- bit = (insn.i_format.rt >> 2);
- bit += (bit != 0);
- bit += 23;
- switch (insn.i_format.rt) {
- case 0: /* bc1f */
- case 2: /* bc1fl */
- if (~fcr31 & (1 << bit))
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
-
- case 1: /* bc1t */
- case 3: /* bc1tl */
- if (fcr31 & (1 << bit))
- epc = epc + 4 + (insn.i_format.simmediate << 2);
- else
- epc += 8;
- regs->cp0_epc = epc;
- break;
- }
- break;
- }
-
- return 0;
-}
diff -Nru a/arch/mips64/kernel/cpu-probe.c b/arch/mips64/kernel/cpu-probe.c
--- a/arch/mips64/kernel/cpu-probe.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,746 +0,0 @@
-/*
- * arch/mips64/kernel/cpu-probe.c
- *
- * Processor capabilities determination functions.
- *
- * Copyright (C) xxxx the Anonymous
- * Copyright (C) 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/ptrace.h>
-#include <linux/stddef.h>
-
-#include <asm/bugs.h>
-#include <asm/cpu.h>
-#include <asm/fpu.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-/*
- * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
- * the implementation of the "wait" feature differs between CPU families. This
- * points to the function that implements CPU specific wait.
- * The wait instruction stops the pipeline and reduces the power consumption of
- * the CPU very much.
- */
-void (*cpu_wait)(void) = NULL;
-
-static void r3081_wait(void)
-{
- unsigned long cfg = read_c0_conf();
- write_c0_conf(cfg | R30XX_CONF_HALT);
-}
-
-static void r39xx_wait(void)
-{
- unsigned long cfg = read_c0_conf();
- write_c0_conf(cfg | TX39_CONF_HALT);
-}
-
-static void r4k_wait(void)
-{
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0");
-}
-
-void au1k_wait(void)
-{
-#ifdef CONFIG_PM
- /* using the wait instruction makes CP0 counter unusable */
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- ".set\tmips0");
-#else
- __asm__("nop\n\t"
- "nop");
-#endif
-}
-
-static inline void check_wait(void)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
-
- printk("Checking for 'wait' instruction... ");
- switch (c->cputype) {
- case CPU_R3081:
- case CPU_R3081E:
- cpu_wait = r3081_wait;
- printk(" available.\n");
- break;
- case CPU_TX3927:
- cpu_wait = r39xx_wait;
- printk(" available.\n");
- break;
- case CPU_R4200:
-/* case CPU_R4300: */
- case CPU_R4600:
- case CPU_R4640:
- case CPU_R4650:
- case CPU_R4700:
- case CPU_R5000:
- case CPU_NEVADA:
- case CPU_RM7000:
- case CPU_TX49XX:
- case CPU_4KC:
- case CPU_4KEC:
- case CPU_4KSC:
- case CPU_5KC:
-/* case CPU_20KC:*/
- cpu_wait = r4k_wait;
- printk(" available.\n");
- break;
- case CPU_AU1000:
- case CPU_AU1100:
- case CPU_AU1500:
- cpu_wait = au1k_wait;
- printk(" available.\n");
- break;
- default:
- printk(" unavailable.\n");
- break;
- }
-}
-
-static inline void check_mult_sh(void)
-{
- unsigned long flags;
- int m1, m2;
- long p, s, v;
-
- printk("Checking for the multiply/shift bug... ");
-
- local_irq_save(flags);
- /*
- * The following code leads to a wrong result of dsll32 when
- * executed on R4000 rev. 2.2 or 3.0.
- *
- * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
- * 3.0" by MIPS Technologies, Inc., errata #16 and #28 for
- * details. I got no permission to duplicate them here,
- * sigh... --macro
- */
- asm volatile(
- ".set push\n\t"
- ".set noat\n\t"
- ".set noreorder\n\t"
- ".set nomacro\n\t"
- "mult %1, %2\n\t"
- "dsll32 %0, %3, %4\n\t"
- "mflo $0\n\t"
- ".set pop"
- : "=r" (v)
- : "r" (5), "r" (8), "r" (5), "I" (0)
- : "hi", "lo", "accum");
- local_irq_restore(flags);
-
- if (v == 5L << 32) {
- printk("no.\n");
- return;
- }
-
- printk("yes, workaround... ");
- local_irq_save(flags);
- /*
- * We want the multiply and the shift to be isolated from the
- * rest of the code to disable gcc optimizations. Hence the
- * asm statements that execute nothing, but make gcc not know
- * what the values of m1, m2 and s are and what v and p are
- * used for.
- *
- * We have to use single integers for m1 and m2 and a double
- * one for p to be sure the mulsidi3 gcc's RTL multiplication
- * instruction has the workaround applied. Older versions of
- * gcc have correct mulsi3, but other multiplication variants
- * lack the workaround.
- */
- asm volatile(
- ""
- : "=r" (m1), "=r" (m2), "=r" (s)
- : "0" (5), "1" (8), "2" (5));
- p = m1 * m2;
- v = s << 32;
- asm volatile(
- ""
- : "=r" (v)
- : "0" (v), "r" (p));
- local_irq_restore(flags);
-
- if (v == 5L << 32) {
- printk("yes.\n");
- return;
- }
-
- printk("no.\n");
- panic("Reliable operation impossible!\n"
-#ifndef CONFIG_CPU_R4000
- "Configure for R4000 to enable the workaround."
-#else
- "Please report to <linux-mips@linux-mips.org>."
-#endif
- );
-}
-
-static volatile int daddi_ov __initdata = 0;
-
-asmlinkage void __init do_daddi_ov(struct pt_regs *regs)
-{
- daddi_ov = 1;
- regs->cp0_epc += 4;
-}
-
-static inline void check_daddi(void)
-{
- extern asmlinkage void handle_daddi_ov(void);
- unsigned long flags;
- void *handler;
- long v;
-
- printk("Checking for the daddi bug... ");
-
- local_irq_save(flags);
- handler = set_except_vector(12, handle_daddi_ov);
- /*
- * The following code fails to trigger an overflow exception
- * when executed on R4000 rev. 2.2 or 3.0.
- *
- * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
- * 3.0" by MIPS Technologies, Inc., erratum #23 for details.
- * I got no permission to duplicate it here, sigh... --macro
- */
- asm volatile(
- ".set push\n\t"
- ".set noat\n\t"
- ".set noreorder\n\t"
- ".set nomacro\n\t"
-#ifdef HAVE_AS_SET_DADDI
- ".set daddi\n\t"
-#endif
- "daddi %0, %1, %2\n\t"
- ".set pop"
- : "=r" (v)
- : "r" (0x7fffffffffffedcd), "I" (0x1234));
- set_except_vector(12, handler);
- local_irq_restore(flags);
-
- if (daddi_ov) {
- printk("no.\n");
- return;
- }
-
- printk("yes, workaround... ");
-
- local_irq_save(flags);
- handler = set_except_vector(12, handle_daddi_ov);
- asm volatile(
- "daddi %0, %1, %2"
- : "=r" (v)
- : "r" (0x7fffffffffffedcd), "I" (0x1234));
- set_except_vector(12, handler);
- local_irq_restore(flags);
-
- if (daddi_ov) {
- printk("yes.\n");
- return;
- }
-
- printk("no.\n");
- panic("Reliable operation impossible!\n"
-#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400)
- "Configure for R4000 or R4400 to enable the workaround."
-#else
- "Please report to <linux-mips@linux-mips.org>."
-#endif
- );
-}
-
-static inline void check_daddiu(void)
-{
- long v, w;
-
- printk("Checking for the daddiu bug... ");
-
- /*
- * The following code leads to a wrong result of daddiu when
- * executed on R4400 rev. 1.0.
- *
- * See "MIPS R4400PC/SC Errata, Processor Revision 1.0" by
- * MIPS Technologies, Inc., erratum #7 for details.
- *
- * According to "MIPS R4000PC/SC Errata, Processor Revision
- * 2.2 and 3.0" by MIPS Technologies, Inc., erratum #41 this
- * problem affects R4000 rev. 2.2 and 3.0, too. Testing
- * failed to trigger it so far.
- *
- * I got no permission to duplicate the errata here, sigh...
- * --macro
- */
- asm volatile(
- ".set push\n\t"
- ".set noat\n\t"
- ".set noreorder\n\t"
- ".set nomacro\n\t"
-#ifdef HAVE_AS_SET_DADDI
- ".set daddi\n\t"
-#endif
- "daddiu %0, %2, %3\n\t"
- "addiu %1, $0, %3\n\t"
- "daddu %1, %2\n\t"
- ".set pop"
- : "=&r" (v), "=&r" (w)
- : "r" (0x7fffffffffffedcd), "I" (0x1234));
-
- if (v == w) {
- printk("no.\n");
- return;
- }
-
- printk("yes, workaround... ");
-
- asm volatile(
- "daddiu %0, %2, %3\n\t"
- "addiu %1, $0, %3\n\t"
- "daddu %1, %2"
- : "=&r" (v), "=&r" (w)
- : "r" (0x7fffffffffffedcd), "I" (0x1234));
-
- if (v == w) {
- printk("yes.\n");
- return;
- }
-
- printk("no.\n");
- panic("Reliable operation impossible!\n"
-#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400)
- "Configure for R4000 or R4400 to enable the workaround."
-#else
- "Please report to <linux-mips@linux-mips.org>."
-#endif
- );
-}
-
-void __init check_bugs(void)
-{
- check_wait();
- check_mult_sh();
- check_daddi();
- check_daddiu();
-}
-
-/*
- * Probe whether cpu has config register by trying to play with
- * alternate cache bit and see whether it matters.
- * It's used by cpu_probe to distinguish between R3000A and R3081.
- */
-static inline int cpu_has_confreg(void)
-{
-#ifdef CONFIG_CPU_R3000
- extern unsigned long r3k_cache_size(unsigned long);
- unsigned long size1, size2;
- unsigned long cfg = read_c0_conf();
-
- size1 = r3k_cache_size(ST0_ISC);
- write_c0_conf(cfg ^ R30XX_CONF_AC);
- size2 = r3k_cache_size(ST0_ISC);
- write_c0_conf(cfg);
- return size1 != size2;
-#else
- return 0;
-#endif
-}
-
-/*
- * Get the FPU Implementation/Revision.
- */
-static inline unsigned long cpu_get_fpu_id(void)
-{
- unsigned long tmp, fpu_id;
-
- tmp = read_c0_status();
- __enable_fpu();
- fpu_id = read_32bit_cp1_register(CP1_REVISION);
- write_c0_status(tmp);
- return fpu_id;
-}
-
-/*
- * Check the CPU has an FPU the official way.
- */
-static inline int __cpu_has_fpu(void)
-{
- return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE);
-}
-
-#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4KTLB \
- | MIPS_CPU_COUNTER | MIPS_CPU_CACHE_CDEX)
-
-__init void cpu_probe(void)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned long config0 = read_c0_config();
- unsigned long config1;
-
- c->processor_id = PRID_IMP_UNKNOWN;
- c->fpu_id = FPIR_IMP_NONE;
- c->cputype = CPU_UNKNOWN;
-
- if (config0 & (1 << 31)) {
- /* MIPS32 or MIPS64 compliant CPU. Read Config 1 register. */
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
- MIPS_CPU_LLSC;
- config1 = read_c0_config1();
- if (config1 & (1 << 3))
- c->options |= MIPS_CPU_WATCH;
- if (config1 & (1 << 2))
- c->options |= MIPS_CPU_MIPS16;
- if (config1 & (1 << 1))
- c->options |= MIPS_CPU_EJTAG;
- if (config1 & 1) {
- c->options |= MIPS_CPU_FPU;
- c->options |= MIPS_CPU_32FPR;
- }
- c->scache.flags = MIPS_CACHE_NOT_PRESENT;
-
- c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
- }
-
- c->processor_id = read_c0_prid();
- switch (c->processor_id & 0xff0000) {
- case PRID_COMP_LEGACY:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_R2000:
- c->cputype = CPU_R2000;
- c->isa_level = MIPS_CPU_ISA_I;
- c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX |
- MIPS_CPU_LLSC;
- if (__cpu_has_fpu())
- c->options |= MIPS_CPU_FPU;
- c->tlbsize = 64;
- break;
- case PRID_IMP_R3000:
- if ((c->processor_id & 0xff) == PRID_REV_R3000A)
- if (cpu_has_confreg())
- c->cputype = CPU_R3081E;
- else
- c->cputype = CPU_R3000A;
- else
- c->cputype = CPU_R3000;
- c->isa_level = MIPS_CPU_ISA_I;
- c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX |
- MIPS_CPU_LLSC;
- if (__cpu_has_fpu())
- c->options |= MIPS_CPU_FPU;
- c->tlbsize = 64;
- break;
- case PRID_IMP_R4000:
- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
- c->cputype = CPU_R4400SC;
- else
- c->cputype = CPU_R4000SC;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_WATCH | MIPS_CPU_VCE |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_VR41XX:
- switch (c->processor_id & 0xf0) {
-#ifndef CONFIG_VR4181
- case PRID_REV_VR4111:
- c->cputype = CPU_VR4111;
- break;
-#else
- case PRID_REV_VR4181:
- c->cputype = CPU_VR4181;
- break;
-#endif
- case PRID_REV_VR4121:
- c->cputype = CPU_VR4121;
- break;
- case PRID_REV_VR4122:
- if ((c->processor_id & 0xf) < 0x3)
- c->cputype = CPU_VR4122;
- else
- c->cputype = CPU_VR4181A;
- break;
- case PRID_REV_VR4131:
- c->cputype = CPU_VR4131;
- break;
- default:
- printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
- c->cputype = CPU_VR41XX;
- break;
- }
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS;
- c->tlbsize = 32;
- break;
- case PRID_IMP_R4300:
- c->cputype = CPU_R4300;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 32;
- break;
- case PRID_IMP_R4600:
- c->cputype = CPU_R4600;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- #if 0
- case PRID_IMP_R4650:
- /*
- * This processor doesn't have an MMU, so it's not
- * "real easy" to run Linux on it. It is left purely
- * for documentation. Commented out because it shares
- * it's c0_prid id number with the TX3900.
- */
- c->cputype = CPU_R4650;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- #endif
- case PRID_IMP_TX39:
- c->isa_level = MIPS_CPU_ISA_I;
- c->options = MIPS_CPU_TLB;
-
- if ((c->processor_id & 0xf0) ==
- (PRID_REV_TX3927 & 0xf0)) {
- c->cputype = CPU_TX3927;
- c->tlbsize = 64;
- } else {
- switch (c->processor_id & 0xff) {
- case PRID_REV_TX3912:
- c->cputype = CPU_TX3912;
- c->tlbsize = 32;
- break;
- case PRID_REV_TX3922:
- c->cputype = CPU_TX3922;
- c->tlbsize = 64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- }
- break;
- case PRID_IMP_R4700:
- c->cputype = CPU_R4700;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_TX49:
- c->cputype = CPU_TX49XX;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R5000:
- c->cputype = CPU_R5000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R5432:
- c->cputype = CPU_R5432;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R5500:
- c->cputype = CPU_R5500;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_NEVADA:
- c->cputype = CPU_NEVADA;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R6000:
- c->cputype = CPU_R6000;
- c->isa_level = MIPS_CPU_ISA_II;
- c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
- MIPS_CPU_LLSC;
- c->tlbsize = 32;
- break;
- case PRID_IMP_R6000A:
- c->cputype = CPU_R6000A;
- c->isa_level = MIPS_CPU_ISA_II;
- c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
- MIPS_CPU_LLSC;
- c->tlbsize = 32;
- break;
- case PRID_IMP_RM7000:
- c->cputype = CPU_RM7000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- /*
- * Undocumented RM7000: Bit 29 in the info register of
- * the RM7000 v2.0 indicates if the TLB has 48 or 64
- * entries.
- *
- * 29 1 => 64 entry JTLB
- * 0 => 48 entry JTLB
- */
- c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48;
- break;
- case PRID_IMP_R8000:
- c->cputype = CPU_R8000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 384; /* has weird TLB: 3-way x 128 */
- break;
- case PRID_IMP_R10000:
- c->cputype = CPU_R10000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
- MIPS_CPU_LLSC;
- c->tlbsize = 64;
- break;
- case PRID_IMP_R12000:
- c->cputype = CPU_R12000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
- MIPS_CPU_LLSC;
- c->tlbsize = 64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- break;
- case PRID_COMP_MIPS:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_4KC:
- c->cputype = CPU_4KC;
- c->isa_level = MIPS_CPU_ISA_M32;
- break;
- case PRID_IMP_4KEC:
- c->cputype = CPU_4KEC;
- c->isa_level = MIPS_CPU_ISA_M32;
- break;
- case PRID_IMP_4KSC:
- c->cputype = CPU_4KSC;
- c->isa_level = MIPS_CPU_ISA_M32;
- break;
- case PRID_IMP_5KC:
- c->cputype = CPU_5KC;
- c->isa_level = MIPS_CPU_ISA_M64;
- break;
- case PRID_IMP_20KC:
- c->cputype = CPU_20KC;
- c->isa_level = MIPS_CPU_ISA_M64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- break;
- case PRID_COMP_ALCHEMY:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_AU1_REV1:
- case PRID_IMP_AU1_REV2:
- switch ((c->processor_id >> 24) & 0xff) {
- case 0:
- c->cputype = CPU_AU1000;
- break;
- case 1:
- c->cputype = CPU_AU1500;
- break;
- case 2:
- c->cputype = CPU_AU1100;
- break;
- default:
- panic("Unknown Au Core!");
- break;
- }
- c->isa_level = MIPS_CPU_ISA_M32;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- break;
- case PRID_COMP_SIBYTE:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_SB1:
- c->cputype = CPU_SB1;
- c->isa_level = MIPS_CPU_ISA_M64;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
- MIPS_CPU_MCHECK | MIPS_CPU_EJTAG |
- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
-#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
- /* FPU in pass1 is known to have issues. */
- c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR;
-#endif
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- break;
-
- case PRID_COMP_SANDCRAFT:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_SR71000:
- c->cputype = CPU_SR71000;
- c->isa_level = MIPS_CPU_ISA_M64;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_4KTLB | MIPS_CPU_FPU |
- MIPS_CPU_COUNTER | MIPS_CPU_MCHECK;
- c->scache.ways = 8;
- c->tlbsize = 64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
- }
- if (c->options & MIPS_CPU_FPU)
- c->fpu_id = cpu_get_fpu_id();
-}
-
-__init void cpu_report(void)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
-
- printk("CPU revision is: %08x\n", c->processor_id);
- if (c->options & MIPS_CPU_FPU)
- printk("FPU revision is: %08x\n", c->fpu_id);
-}
diff -Nru a/arch/mips64/kernel/entry.S b/arch/mips64/kernel/entry.S
--- a/arch/mips64/kernel/entry.S Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,111 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Low level exception handling
- *
- * Copyright (C) 1994 - 2000, 2001 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/thread_info.h>
-
-#define KU_USER 0x10
-
- .text
- .align 5
-FEXPORT(ret_from_irq)
-FEXPORT(ret_from_exception)
- ld t0, PT_STATUS(sp) # returning to kernel mode?
- andi t0, t0, KU_USER
- beqz t0, restore_all
-
-FEXPORT(resume_userspace)
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28)
- andi a2, _TIF_WORK_MASK # current->work (ignoring
- # syscall_trace
- bnez a2, work_pending
- j restore_all
-
-FEXPORT(ret_from_fork)
- jal schedule_tail
-
-FEXPORT(syscall_exit)
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, syscall_exit_work
-
-restore_all:
- .set noat
- RESTORE_ALL
- eret
- .set at
-
-work_pending:
- bltz a2, work_notifysig # current->work.need_resched
- # test high 8 bits
-work_resched:
- jal schedule
-
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28) # This also converts into
- # a union of four chars
- andi a2, _TIF_WORK_MASK # is there any work to be done
- # other than syscall tracing?
- beqz a2, restore_all
- andi t0, a2, _TIF_NEED_RESCHED
- bnez t0, work_notifysig
-
-work_notifysig: # deal with pending signals and
- # notify-resume requests
- move a0, sp
- li a1, 0
- jal do_notify_resume # a2 already loaded
- j restore_all
-
-FEXPORT(syscall_exit_work)
- LONG_L t0, TI_FLAGS($28) # current->work.syscall_trace
- bgez t0, work_pending
- mfc0 t0, CP0_STATUS # sti
- ori t0, t0, 1
- mtc0 t0, CP0_STATUS
- jal do_syscall_trace
- b resume_userspace
-
-/*
- * Common spurious interrupt handler.
- */
- .text
- .align 5
-LEAF(spurious_interrupt)
- /*
- * Someone tried to fool us by sending an interrupt but we
- * couldn't find a cause for it.
- */
- lui t1, %hi(irq_err_count)
-1: ll t0, %lo(irq_err_count)(t1)
- addiu t0, 1
- sc t0, %lo(irq_err_count)(t1)
- beqz t0, 1b
- j ret_from_irq
- END(spurious_interrupt)
diff -Nru a/arch/mips64/kernel/head.S b/arch/mips64/kernel/head.S
--- a/arch/mips64/kernel/head.S Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,189 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Head.S contains the MIPS exception handler and startup code.
- *
- * Copyright (C) 1994, 1995 Waldorf Electronics
- * Written by Ralf Baechle and Andreas Busse
- * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/processor.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/pgtable.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/sn0/hubni.h>
-#include <asm/sn/klkernvars.h>
-
- .macro ARC64_TWIDDLE_PC
-#if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL)
- /* We get launched at a XKPHYS address but the kernel is linked to
- run at a KSEG0 address, so jump there. */
- PTR_LA t0, \@f
- jr t0
-\@:
-#endif
- .endm
-
-#ifdef CONFIG_SGI_IP27
- /*
- * outputs the local nasid into res. IP27 stuff.
- */
- .macro GET_NASID_ASM res
- dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
- ld \res, (\res)
- and \res, NSRI_NODEID_MASK
- dsrl \res, NSRI_NODEID_SHFT
- .endm
-#endif /* CONFIG_SGI_IP27 */
-
- /*
- * inputs are the text nasid in t1, data nasid in t2.
- */
- .macro MAPPED_KERNEL_SETUP_TLB
-#ifdef CONFIG_MAPPED_KERNEL
- /*
- * This needs to read the nasid - assume 0 for now.
- * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
- * 0+DVG in tlblo_1.
- */
- dli t0, 0xffffffffc0000000
- dmtc0 t0, CP0_ENTRYHI
- li t0, 0x1c000 # Offset of text into node memory
- dsll t1, NASID_SHFT # Shift text nasid into place
- dsll t2, NASID_SHFT # Same for data nasid
- or t1, t1, t0 # Physical load address of kernel text
- or t2, t2, t0 # Physical load address of kernel data
- dsrl t1, 12 # 4K pfn
- dsrl t2, 12 # 4K pfn
- dsll t1, 6 # Get pfn into place
- dsll t2, 6 # Get pfn into place
- li t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
- or t0, t0, t1
- mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr
- li t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
- or t0, t0, t2
- mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
- li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
- mtc0 t0, CP0_PAGEMASK
- li t0, 0 # KMAP_INX
- mtc0 t0, CP0_INDEX
- li t0, 1
- mtc0 t0, CP0_WIRED
- tlbwi
-#else
- mtc0 zero, CP0_WIRED
-#endif
- .endm
-
- .text
-
-EXPORT(stext) # used for profiling
-EXPORT(_stext)
-
- __INIT
-
-NESTED(kernel_entry, 16, sp) # kernel entry point
-
- ori sp, 0xf # align stack on 16 byte.
- xori sp, 0xf
-
-#ifdef CONFIG_SGI_IP27
- GET_NASID_ASM t1
- move t2, t1 # text and data are here
- MAPPED_KERNEL_SETUP_TLB
-#endif /* IP27 */
-
- ARC64_TWIDDLE_PC
-
- CLI # disable interrupts
-
- PTR_LA $28, init_thread_union # init current pointer
- daddiu sp, $28, KERNEL_STACK_SIZE-32
- set_saved_sp sp, t0, t1
-
- /*
- * The firmware/bootloader passes argc/argp/envp
- * to us as arguments. But clear bss first because
- * the romvec and other important info is stored there
- * by prom_init().
- */
- PTR_LA t0, __bss_start
- sd zero, (t0)
- PTR_LA t1, __bss_stop - 8
-1:
- daddiu t0, 8
- sd zero, (t0)
- bne t0, t1, 1b
-
- dsubu sp, 4*SZREG # init stack pointer
-
- j init_arch
- END(kernel_entry)
-
-#ifdef CONFIG_SMP
-/*
- * SMP slave cpus entry point. Board specific code for bootstrap calls this
- * function after setting up the stack and gp registers.
- */
-NESTED(smp_bootstrap, 16, sp)
-#ifdef CONFIG_SGI_IP27
- GET_NASID_ASM t1
- li t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
- KLDIR_OFF_POINTER + K0BASE
- dsll t1, NASID_SHFT
- or t0, t0, t1
- ld t0, 0(t0) # t0 points to kern_vars struct
- lh t1, KV_RO_NASID_OFFSET(t0)
- lh t2, KV_RW_NASID_OFFSET(t0)
- MAPPED_KERNEL_SETUP_TLB
- ARC64_TWIDDLE_PC
-#endif /* CONFIG_SGI_IP27 */
-
- CLI
-
- /*
- * For the moment set ST0_KU so the CPU will not spit fire when
- * executing 64-bit instructions. The full initialization of the
- * CPU's status register is done later in per_cpu_trap_init().
- */
- mfc0 t0, CP0_STATUS
- or t0, ST0_KX
- mtc0 t0, CP0_STATUS
-
- jal start_secondary
-
- END(smp_bootstrap)
-#endif /* CONFIG_SMP */
-
- __FINIT
-
- declare_saved_sp
-
-#undef PAGE_SIZE
-#define PAGE_SIZE 0x1000
-
- .macro page name, order=0
- .globl \name
-\name: .size \name, (PAGE_SIZE << \order)
- .org . + (PAGE_SIZE << \order)
- .type \name, @object
- .endm
-
- .data
- .align PAGE_SHIFT
-
- page swapper_pg_dir, 1
- page invalid_pte_table, 0
- page invalid_pmd_table, 1
- page kptbl, _PGD_ORDER
- .globl ekptbl
- page kpmdtbl, 0
-ekptbl:
diff -Nru a/arch/mips64/kernel/i8259.c b/arch/mips64/kernel/i8259.c
--- a/arch/mips64/kernel/i8259.c Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,336 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Code to handle x86 style IRQs plus some generic interrupt stuff.
- *
- * Copyright (C) 1992 Linus Torvalds
- * Copyright (C) 1994 - 2000 Ralf Baechle
- */
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-#include <linux/sysdev.h>
-
-#include <asm/i8259.h>
-#include <asm/io.h>
-
-void enable_8259A_irq(unsigned int irq);
-void disable_8259A_irq(unsigned int irq);
-
-/*
- * This is the 'legacy' 8259A Programmable Interrupt Controller,
- * present in the majority of PC/AT boxes.
- * plus some generic x86 specific things if generic specifics makes
- * any sense at all.
- * this file should become arch/i386/kernel/irq.c when the old irq.c
- * moves to arch independent land
- */
-
-static spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
-
-static void end_8259A_irq (unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
- irq_desc[irq].action)
- enable_8259A_irq(irq);
-}
-
-#define shutdown_8259A_irq disable_8259A_irq
-
-void mask_and_ack_8259A(unsigned int);
-
-static unsigned int startup_8259A_irq(unsigned int irq)
-{
- enable_8259A_irq(irq);
-
- return 0; /* never anything pending */
-}
-
-static struct hw_interrupt_type i8259A_irq_type = {
- "XT-PIC",
- startup_8259A_irq,
- shutdown_8259A_irq,
- enable_8259A_irq,
- disable_8259A_irq,
- mask_and_ack_8259A,
- end_8259A_irq,
- NULL
-};
-
-/*
- * 8259A PIC functions to handle ISA devices:
- */
-
-/*
- * This contains the irq mask for both 8259A irq controllers,
- */
-static unsigned int cached_irq_mask = 0xffff;
-
-#define cached_21 (cached_irq_mask)
-#define cached_A1 (cached_irq_mask >> 8)
-
-void disable_8259A_irq(unsigned int irq)
-{
- unsigned int mask = 1 << irq;
- unsigned long flags;
-
- spin_lock_irqsave(&i8259A_lock, flags);
- cached_irq_mask |= mask;
- if (irq & 8)
- outb(cached_A1,0xA1);
- else
- outb(cached_21,0x21);
- spin_unlock_irqrestore(&i8259A_lock, flags);
-}
-
-void enable_8259A_irq(unsigned int irq)
-{
- unsigned int mask = ~(1 << irq);
- unsigned long flags;
-
- spin_lock_irqsave(&i8259A_lock, flags);
- cached_irq_mask &= mask;
- if (irq & 8)
- outb(cached_A1,0xA1);
- else
- outb(cached_21,0x21);
- spin_unlock_irqrestore(&i8259A_lock, flags);
-}
-
-int i8259A_irq_pending(unsigned int irq)
-{
- unsigned int mask = 1 << irq;
- unsigned long flags;
- int ret;
-
- spin_lock_irqsave(&i8259A_lock, flags);
- if (irq < 8)
- ret = inb(0x20) & mask;
- else
- ret = inb(0xA0) & (mask >> 8);
- spin_unlock_irqrestore(&i8259A_lock, flags);
-
- return ret;
-}
-
-void make_8259A_irq(unsigned int irq)
-{
- disable_irq_nosync(irq);
- irq_desc[irq].handler = &i8259A_irq_type;
- enable_irq(irq);
-}
-
-/*
- * This function assumes to be called rarely. Switching between
- * 8259A registers is slow.
- * This has to be protected by the irq controller spinlock
- * before being called.
- */
-static inline int i8259A_irq_real(unsigned int irq)
-{
- int value;
- int irqmask = 1 << irq;
-
- if (irq < 8) {
- outb(0x0B,0x20); /* ISR register */
- value = inb(0x20) & irqmask;
- outb(0x0A,0x20); /* back to the IRR register */
- return value;
- }
- outb(0x0B,0xA0); /* ISR register */
- value = inb(0xA0) & (irqmask >> 8);
- outb(0x0A,0xA0); /* back to the IRR register */
- return value;
-}
-
-/*
- * Careful! The 8259A is a fragile beast, it pretty
- * much _has_ to be done exactly like this (mask it
- * first, _then_ send the EOI, and the order of EOI
- * to the two 8259s is important!
- */
-void mask_and_ack_8259A(unsigned int irq)
-{
- unsigned int irqmask = 1 << irq;
- unsigned long flags;
-
- spin_lock_irqsave(&i8259A_lock, flags);
- /*
- * Lightweight spurious IRQ detection. We do not want to overdo
- * spurious IRQ handling - it's usually a sign of hardware problems, so
- * we only do the checks we can do without slowing down good hardware
- * nnecesserily.
- *
- * Note that IRQ7 and IRQ15 (the two spurious IRQs usually resulting
- * rom the 8259A-1|2 PICs) occur even if the IRQ is masked in the 8259A.
- * Thus we can check spurious 8259A IRQs without doing the quite slow
- * i8259A_irq_real() call for every IRQ. This does not cover 100% of
- * spurious interrupts, but should be enough to warn the user that
- * there is something bad going on ...
- */
- if (cached_irq_mask & irqmask)
- goto spurious_8259A_irq;
- cached_irq_mask |= irqmask;
-
-handle_real_irq:
- if (irq & 8) {
- inb(0xA1); /* DUMMY - (do we need this?) */
- outb(cached_A1,0xA1);
- outb(0x60+(irq&7),0xA0);/* 'Specific EOI' to slave */
- outb(0x62,0x20); /* 'Specific EOI' to master-IRQ2 */
- } else {
- inb(0x21); /* DUMMY - (do we need this?) */
- outb(cached_21,0x21);
- outb(0x60+irq,0x20); /* 'Specific EOI' to master */
- }
- spin_unlock_irqrestore(&i8259A_lock, flags);
- return;
-
-spurious_8259A_irq:
- /*
- * this is the slow path - should happen rarely.
- */
- if (i8259A_irq_real(irq))
- /*
- * oops, the IRQ _is_ in service according to the
- * 8259A - not spurious, go handle it.
- */
- goto handle_real_irq;
-
- {
- static int spurious_irq_mask = 0;
- /*
- * At this point we can be sure the IRQ is spurious,
- * lets ACK and report it. [once per IRQ]
- */
- if (!(spurious_irq_mask & irqmask)) {
- printk("spurious 8259A interrupt: IRQ%d.\n", irq);
- spurious_irq_mask |= irqmask;
- }
- atomic_inc(&irq_err_count);
- /*
- * Theoretically we do not have to handle this IRQ,
- * but in Linux this does not cause problems and is
- * simpler for us.
- */
- goto handle_real_irq;
- }
-}
-
-static int i8259A_resume(struct sys_device *dev)
-{
- init_8259A(0);
- return 0;
-}
-
-static struct sysdev_class i8259_sysdev_class = {
- set_kset_name("i8259"),
- .resume = i8259A_resume,
-};
-
-static struct sys_device device_i8259A = {
- .id = 0,
- .cls = &i8259_sysdev_class,
-};
-
-static int __init i8259A_init_sysfs(void)
-{
- int error = sysdev_class_register(&i8259_sysdev_class);
- if (!error)
- error = sys_device_register(&device_i8259A);
- return error;
-}
-
-device_initcall(i8259A_init_sysfs);
-
-void __init init_8259A(int auto_eoi)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&i8259A_lock, flags);
-
- outb(0xff, 0x21); /* mask all of 8259A-1 */
- outb(0xff, 0xA1); /* mask all of 8259A-2 */
-
- /*
- * outb_p - this has to work on a wide range of PC hardware.
- */
- outb_p(0x11, 0x20); /* ICW1: select 8259A-1 init */
- outb_p(0x00, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x00-0x07 */
- outb_p(0x04, 0x21); /* 8259A-1 (the master) has a slave on IR2 */
- if (auto_eoi)
- outb_p(0x03, 0x21); /* master does Auto EOI */
- else
- outb_p(0x01, 0x21); /* master expects normal EOI */
-
- outb_p(0x11, 0xA0); /* ICW1: select 8259A-2 init */
- outb_p(0x08, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x08-0x0f */
- outb_p(0x02, 0xA1); /* 8259A-2 is a slave on master's IR2 */
- outb_p(0x01, 0xA1); /* (slave's support for AEOI in flat mode
- is to be investigated) */
-
- if (auto_eoi)
- /*
- * in AEOI mode we just have to mask the interrupt
- * when acking.
- */
- i8259A_irq_type.ack = disable_8259A_irq;
- else
- i8259A_irq_type.ack = mask_and_ack_8259A;
-
- udelay(100); /* wait for 8259A to initialize */
-
- outb(cached_21, 0x21); /* restore master IRQ mask */
- outb(cached_A1, 0xA1); /* restore slave IRQ mask */
-
- spin_unlock_irqrestore(&i8259A_lock, flags);
-}
-
-asmlinkage void i8259_do_irq(int irq, struct pt_regs regs)
-{
- panic("i8259_do_irq: I want to be implemented");
-}
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = {
- no_action, 0, 0, "cascade", NULL, NULL
-};
-
-static struct resource pic1_io_resource = {
- "pic1", 0x20, 0x3f, IORESOURCE_BUSY
-};
-
-static struct resource pic2_io_resource = {
- "pic2", 0xa0, 0xbf, IORESOURCE_BUSY
-};
-
-/*
- * On systems with i8259-style interrupt controllers we assume for
- * driver compatibility reasons interrupts 0 - 15 to be the i8295
- * interrupts even if the hardware uses a different interrupt numbering.
- */
-void __init init_i8259_irqs (void)
-{
- int i;
-
- request_resource(&ioport_resource, &pic1_io_resource);
- request_resource(&ioport_resource, &pic2_io_resource);
-
- init_8259A(0);
-
- for (i = 0; i < 16; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &i8259A_irq_type;
- }
-
- setup_irq(2, &irq2);
-}
diff -Nru a/arch/mips64/kernel/init_task.c b/arch/mips64/kernel/init_task.c
--- a/arch/mips64/kernel/init_task.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,34 +0,0 @@
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/init_task.h>
-#include <linux/fs.h>
-
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-
-static struct fs_struct init_fs = INIT_FS;
-static struct files_struct init_files = INIT_FILES;
-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
-struct mm_struct init_mm = INIT_MM(init_mm);
-
-/*
- * Initial thread structure.
- *
- * We need to make sure that this is 8192-byte aligned due to the
- * way process stacks are handled. This is done by making sure
- * the linker maps this in the .text segment right after head.S,
- * and making head.S ensure the proper alignment.
- *
- * The things we do for performance..
- */
-union thread_union init_thread_union
- __attribute__((__section__(".data.init_task"))) =
- { INIT_THREAD_INFO(init_task) };
-
-/*
- * Initial task structure.
- *
- * All other task structs will be allocated on slabs in fork.c
- */
-struct task_struct init_task = INIT_TASK(init_task);
diff -Nru a/arch/mips64/kernel/ioctl32.c b/arch/mips64/kernel/ioctl32.c
--- a/arch/mips64/kernel/ioctl32.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1210 +0,0 @@
-/*
- * ioctl32.c: Conversion between 32bit and 64bit native ioctls.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * Copyright (C) 2000 Ralf Baechle
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * Mostly stolen from the sparc64 ioctl32 implementation.
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/compat.h>
-#include <linux/ioctl32.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/if.h>
-#include <linux/mm.h>
-#include <linux/mtio.h>
-#include <linux/auto_fs.h>
-#include <linux/auto_fs4.h>
-#include <linux/devfs_fs.h>
-#include <linux/tty.h>
-#include <linux/init.h>
-#include <linux/fs.h>
-#include <linux/file.h>
-#include <linux/fd.h>
-#include <linux/ppp_defs.h>
-#include <linux/if_ppp.h>
-#include <linux/if_pppox.h>
-#include <linux/if_tun.h>
-#include <linux/cdrom.h>
-#include <linux/blkdev.h>
-#include <linux/loop.h>
-#include <linux/fb.h>
-#include <linux/vt.h>
-#include <linux/kd.h>
-#include <linux/ext2_fs.h>
-#include <linux/videodev.h>
-#include <linux/netdevice.h>
-#include <linux/raw.h>
-#include <linux/smb_fs.h>
-#include <linux/ncp_fs.h>
-#include <linux/route.h>
-#include <linux/hdreg.h>
-#include <linux/raid/md.h>
-#include <linux/blkpg.h>
-#include <linux/blkdev.h>
-#include <linux/elevator.h>
-#include <linux/rtc.h>
-#include <linux/pci.h>
-#include <linux/dm-ioctl.h>
-
-#include <scsi/scsi.h>
-#undef __KERNEL__ /* This file was born to be ugly ... */
-#include <scsi/scsi_ioctl.h>
-#define __KERNEL__
-#include <scsi/sg.h>
-
-#include <linux/ethtool.h>
-#include <linux/mii.h>
-#include <linux/if_bonding.h>
-#include <linux/watchdog.h>
-
-#include <asm/ioctls.h>
-#include <asm/module.h>
-#include <linux/soundcard.h>
-#include <linux/lp.h>
-
-#include <linux/atm.h>
-#include <linux/atmarp.h>
-#include <linux/atmclip.h>
-#include <linux/atmdev.h>
-#include <linux/atmioc.h>
-#include <linux/atmlec.h>
-#include <linux/atmmpc.h>
-#include <linux/atmsvc.h>
-#include <linux/atm_tcp.h>
-#include <linux/sonet.h>
-#include <linux/atm_suni.h>
-#include <linux/mtd/mtd.h>
-
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci.h>
-#include <net/bluetooth/rfcomm.h>
-
-#include <linux/usb.h>
-#include <linux/usbdevice_fs.h>
-#include <linux/nbd.h>
-#include <linux/random.h>
-#include <linux/filter.h>
-
-#ifdef CONFIG_SIBYTE_TBPROF
-#include <asm/sibyte/trace_prof.h>
-#endif
-
-long sys_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg);
-
-static int w_long(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- int err;
- unsigned long val;
-
- set_fs (KERNEL_DS);
- err = sys_ioctl(fd, cmd, (unsigned long)&val);
- set_fs (old_fs);
- if (!err && put_user((unsigned int) val, (u32 *)arg))
- return -EFAULT;
- return err;
-}
-
-static int rw_long(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- int err;
- unsigned long val;
-
- if (get_user(val, (u32 *)arg))
- return -EFAULT;
- set_fs(KERNEL_DS);
- err = sys_ioctl(fd, cmd, (unsigned long)&val);
- set_fs (old_fs);
- if (!err && put_user(val, (u32 *)arg))
- return -EFAULT;
- return err;
-}
-
-#define A(__x) ((unsigned long)(__x))
-
-
-#ifdef CONFIG_FB
-
-struct fb_fix_screeninfo32 {
- char id[16]; /* identification string eg "TT Builtin" */
- __u32 smem_start; /* Start of frame buffer mem */
- /* (physical address) */
- __u32 smem_len; /* Length of frame buffer mem */
- __u32 type; /* see FB_TYPE_* */
- __u32 type_aux; /* Interleave for interleaved Planes */
- __u32 visual; /* see FB_VISUAL_* */
- __u16 xpanstep; /* zero if no hardware panning */
- __u16 ypanstep; /* zero if no hardware panning */
- __u16 ywrapstep; /* zero if no hardware ywrap */
- __u32 line_length; /* length of a line in bytes */
- __u32 mmio_start; /* Start of Memory Mapped I/O */
- /* (physical address) */
- __u32 mmio_len; /* Length of Memory Mapped I/O */
- __u32 accel; /* Type of acceleration available */
- __u16 reserved[3]; /* Reserved for future compatibility */
-};
-
-static int do_fbioget_fscreeninfo_ioctl(unsigned int fd, unsigned int cmd,
- unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- struct fb_fix_screeninfo fix;
- struct fb_fix_screeninfo32 *fix32 = (struct fb_fix_screeninfo32 *)arg;
- int err;
-
- set_fs(KERNEL_DS);
- err = sys_ioctl(fd, cmd, (unsigned long)&fix);
- set_fs(old_fs);
-
- if (err == 0) {
- err = __copy_to_user((char *)fix32->id, (char *)fix.id,
- sizeof(fix.id));
- err |= __put_user((__u32)(unsigned long)fix.smem_start,
- &fix32->smem_start);
- err |= __put_user(fix.smem_len, &fix32->smem_len);
- err |= __put_user(fix.type, &fix32->type);
- err |= __put_user(fix.type_aux, &fix32->type_aux);
- err |= __put_user(fix.visual, &fix32->visual);
- err |= __put_user(fix.xpanstep, &fix32->xpanstep);
- err |= __put_user(fix.ypanstep, &fix32->ypanstep);
- err |= __put_user(fix.ywrapstep, &fix32->ywrapstep);
- err |= __put_user(fix.line_length, &fix32->line_length);
- err |= __put_user((__u32)(unsigned long)fix.mmio_start,
- &fix32->mmio_start);
- err |= __put_user(fix.mmio_len, &fix32->mmio_len);
- err |= __put_user(fix.accel, &fix32->accel);
- err |= __copy_to_user((char *)fix32->reserved,
- (char *)fix.reserved,
- sizeof(fix.reserved));
- if (err)
- err = -EFAULT;
- }
-
- return err;
-}
-
-struct fb_cmap32 {
- __u32 start; /* First entry */
- __u32 len; /* Number of entries */
- __u32 red; /* Red values */
- __u32 green;
- __u32 blue;
- __u32 transp; /* transparency, can be NULL */
-};
-
-static int do_fbiocmap_ioctl(unsigned int fd, unsigned int cmd,
- unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- u32 red = 0, green = 0, blue = 0, transp = 0;
- struct fb_cmap cmap;
- struct fb_cmap32 *cmap32 = (struct fb_cmap32 *)arg;
- int err;
-
- memset(&cmap, 0, sizeof(cmap));
-
- err = __get_user(cmap.start, &cmap32->start);
- err |= __get_user(cmap.len, &cmap32->len);
- err |= __get_user(red, &cmap32->red);
- err |= __get_user(green, &cmap32->green);
- err |= __get_user(blue, &cmap32->blue);
- err |= __get_user(transp, &cmap32->transp);
- if (err)
- return -EFAULT;
-
- err = -ENOMEM;
- cmap.red = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
- if (!cmap.red)
- goto out;
- cmap.green = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
- if (!cmap.green)
- goto out;
- cmap.blue = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
- if (!cmap.blue)
- goto out;
- if (transp) {
- cmap.transp = kmalloc(cmap.len * sizeof(__u16), GFP_KERNEL);
- if (!cmap.transp)
- goto out;
- }
-
- if (cmd == FBIOPUTCMAP) {
- err = __copy_from_user(cmap.red, (char *)A(red),
- cmap.len * sizeof(__u16));
- err |= __copy_from_user(cmap.green, (char *)A(green),
- cmap.len * sizeof(__u16));
- err |= __copy_from_user(cmap.blue, (char *)A(blue),
- cmap.len * sizeof(__u16));
- if (cmap.transp)
- err |= __copy_from_user(cmap.transp, (char *)A(transp),
- cmap.len * sizeof(__u16));
- if (err) {
- err = -EFAULT;
- goto out;
- }
- }
-
- set_fs(KERNEL_DS);
- err = sys_ioctl(fd, cmd, (unsigned long)&cmap);
- set_fs(old_fs);
- if (err)
- goto out;
-
- if (cmd == FBIOGETCMAP) {
- err = __copy_to_user((char *)A(red), cmap.red,
- cmap.len * sizeof(__u16));
- err |= __copy_to_user((char *)A(green), cmap.blue,
- cmap.len * sizeof(__u16));
- err |= __copy_to_user((char *)A(blue), cmap.blue,
- cmap.len * sizeof(__u16));
- if (cmap.transp)
- err |= __copy_to_user((char *)A(transp), cmap.transp,
- cmap.len * sizeof(__u16));
- if (err) {
- err = -EFAULT;
- goto out;
- }
- }
-
-out:
- if (cmap.red)
- kfree(cmap.red);
- if (cmap.green)
- kfree(cmap.green);
- if (cmap.blue)
- kfree(cmap.blue);
- if (cmap.transp)
- kfree(cmap.transp);
-
- return err;
-}
-
-#endif /* CONFIG_FB */
-
-
-static int do_siocgstamp(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- struct compat_timeval *up = (struct compat_timeval *)arg;
- struct timeval ktv;
- mm_segment_t old_fs = get_fs();
- int err;
-
- set_fs(KERNEL_DS);
- err = sys_ioctl(fd, cmd, (unsigned long)&ktv);
- set_fs(old_fs);
- if (!err) {
- err = put_user(ktv.tv_sec, &up->tv_sec);
- err |= __put_user(ktv.tv_usec, &up->tv_usec);
- }
-
- return err;
-}
-
-#define EXT2_IOC32_GETFLAGS _IOR('f', 1, int)
-#define EXT2_IOC32_SETFLAGS _IOW('f', 2, int)
-#define EXT2_IOC32_GETVERSION _IOR('v', 1, int)
-#define EXT2_IOC32_SETVERSION _IOW('v', 2, int)
-
-struct ifmap32 {
- unsigned int mem_start;
- unsigned int mem_end;
- unsigned short base_addr;
- unsigned char irq;
- unsigned char dma;
- unsigned char port;
-};
-
-struct ifreq32 {
-#define IFHWADDRLEN 6
-#define IFNAMSIZ 16
- union {
- char ifrn_name[IFNAMSIZ]; /* if name, e.g. "en0" */
- } ifr_ifrn;
- union {
- struct sockaddr ifru_addr;
- struct sockaddr ifru_dstaddr;
- struct sockaddr ifru_broadaddr;
- struct sockaddr ifru_netmask;
- struct sockaddr ifru_hwaddr;
- short ifru_flags;
- int ifru_ivalue;
- int ifru_mtu;
- struct ifmap32 ifru_map;
- char ifru_slave[IFNAMSIZ]; /* Just fits the size */
- char ifru_newname[IFNAMSIZ];
- __kernel_caddr_t32 ifru_data;
- } ifr_ifru;
-};
-
-struct ifconf32 {
- int ifc_len; /* size of buffer */
- __kernel_caddr_t32 ifcbuf;
-};
-
-#ifdef CONFIG_NET
-
-static int dev_ifname32(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- struct ireq32 *uir32 = (struct ireq32 *)arg;
- struct net_device *dev;
- struct ifreq32 ifr32;
-
- if (copy_from_user(&ifr32, uir32, sizeof(struct ifreq32)))
- return -EFAULT;
-
- read_lock(&dev_base_lock);
- dev = __dev_get_by_index(ifr32.ifr_ifindex);
- if (!dev) {
- read_unlock(&dev_base_lock);
- return -ENODEV;
- }
-
- strcpy(ifr32.ifr_name, dev->name);
- read_unlock(&dev_base_lock);
-
- if (copy_to_user(uir32, &ifr32, sizeof(struct ifreq32)))
- return -EFAULT;
-
- return 0;
-}
-
-static inline int dev_ifconf(unsigned int fd, unsigned int cmd,
- unsigned long arg)
-{
- struct ioconf32 *uifc32 = (struct ioconf32 *)arg;
- struct ifconf32 ifc32;
- struct ifconf ifc;
- struct ifreq32 *ifr32;
- struct ifreq *ifr;
- mm_segment_t old_fs;
- int len;
- int err;
-
- if (copy_from_user(&ifc32, uifc32, sizeof(struct ifconf32)))
- return -EFAULT;
-
- if(ifc32.ifcbuf == 0) {
- ifc32.ifc_len = 0;
- ifc.ifc_len = 0;
- ifc.ifc_buf = NULL;
- } else {
- ifc.ifc_len = ((ifc32.ifc_len / sizeof (struct ifreq32))) *
- sizeof (struct ifreq);
- ifc.ifc_buf = kmalloc (ifc.ifc_len, GFP_KERNEL);
- if (!ifc.ifc_buf)
- return -ENOMEM;
- }
- ifr = ifc.ifc_req;
- ifr32 = (struct ifreq32 *)A(ifc32.ifcbuf);
- len = ifc32.ifc_len / sizeof (struct ifreq32);
- while (len--) {
- if (copy_from_user(ifr++, ifr32++, sizeof (struct ifreq32))) {
- err = -EFAULT;
- goto out;
- }
- }
-
- old_fs = get_fs();
- set_fs (KERNEL_DS);
- err = sys_ioctl (fd, SIOCGIFCONF, (unsigned long)&ifc);
- set_fs (old_fs);
- if (err)
- goto out;
-
- ifr = ifc.ifc_req;
- ifr32 = (struct ifreq32 *)A(ifc32.ifcbuf);
- len = ifc.ifc_len / sizeof (struct ifreq);
- ifc32.ifc_len = len * sizeof (struct ifreq32);
-
- while (len--) {
- if (copy_to_user(ifr32++, ifr++, sizeof (struct ifreq32))) {
- err = -EFAULT;
- goto out;
- }
- }
-
- if (copy_to_user(uifc32, &ifc32, sizeof(struct ifconf32))) {
- err = -EFAULT;
- goto out;
- }
-out:
- if(ifc.ifc_buf != NULL)
- kfree (ifc.ifc_buf);
- return err;
-}
-
-int siocdevprivate_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- struct ifreq *u_ifreq64;
- struct ifreq32 *u_ifreq32 = (struct ifreq32 *) arg;
- char tmp_buf[IFNAMSIZ];
- void *data64;
- u32 data32;
-
- if (copy_from_user(&tmp_buf[0], &(u_ifreq32->ifr_ifrn.ifrn_name[0]),
- IFNAMSIZ))
- return -EFAULT;
- if (__get_user(data32, &u_ifreq32->ifr_ifru.ifru_data))
- return -EFAULT;
- data64 = (void *) A(data32);
-
- u_ifreq64 = compat_alloc_user_space(sizeof(*u_ifreq64));
-
- /* Don't check these user accesses, just let that get trapped
- * in the ioctl handler instead.
- */
- copy_to_user(&u_ifreq64->ifr_ifrn.ifrn_name[0], &tmp_buf[0], IFNAMSIZ);
- __put_user(data64, &u_ifreq64->ifr_ifru.ifru_data);
-
- return sys_ioctl(fd, cmd, (unsigned long) u_ifreq64);
-}
-
-static int dev_ifsioc(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- struct ifreq ifr;
- mm_segment_t old_fs;
- int err;
-
- switch (cmd) {
- case SIOCSIFMAP:
- err = copy_from_user(&ifr, (struct ifreq32 *)arg, sizeof(ifr.ifr_name));
- err |= __get_user(ifr.ifr_map.mem_start, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_start));
- err |= __get_user(ifr.ifr_map.mem_end, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_end));
- err |= __get_user(ifr.ifr_map.base_addr, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.base_addr));
- err |= __get_user(ifr.ifr_map.irq, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.irq));
- err |= __get_user(ifr.ifr_map.dma, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.dma));
- err |= __get_user(ifr.ifr_map.port, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.port));
- if (err)
- return -EFAULT;
- break;
- default:
- if (copy_from_user(&ifr, (struct ifreq32 *)arg, sizeof(struct ifreq32)))
- return -EFAULT;
- break;
- }
- old_fs = get_fs();
- set_fs (KERNEL_DS);
- err = sys_ioctl (fd, cmd, (unsigned long)&ifr);
- set_fs (old_fs);
- if (!err) {
- switch (cmd) {
- case SIOCGIFFLAGS:
- case SIOCGIFMETRIC:
- case SIOCGIFMTU:
- case SIOCGIFMEM:
- case SIOCGIFHWADDR:
- case SIOCGIFINDEX:
- case SIOCGIFADDR:
- case SIOCGIFBRDADDR:
- case SIOCGIFDSTADDR:
- case SIOCGIFNETMASK:
- case SIOCGIFTXQLEN:
- if (copy_to_user((struct ifreq32 *)arg, &ifr, sizeof(struct ifreq32)))
- return -EFAULT;
- break;
- case SIOCGIFMAP:
- err = copy_to_user((struct ifreq32 *)arg, &ifr, sizeof(ifr.ifr_name));
- err |= __put_user(ifr.ifr_map.mem_start, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_start));
- err |= __put_user(ifr.ifr_map.mem_end, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.mem_end));
- err |= __put_user(ifr.ifr_map.base_addr, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.base_addr));
- err |= __put_user(ifr.ifr_map.irq, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.irq));
- err |= __put_user(ifr.ifr_map.dma, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.dma));
- err |= __put_user(ifr.ifr_map.port, &(((struct ifreq32 *)arg)->ifr_ifru.ifru_map.port));
- if (err)
- err = -EFAULT;
- break;
- }
- }
- return err;
-}
-
-struct rtentry32
-{
- unsigned int rt_pad1;
- struct sockaddr rt_dst; /* target address */
- struct sockaddr rt_gateway; /* gateway addr (RTF_GATEWAY) */
- struct sockaddr rt_genmask; /* target network mask (IP) */
- unsigned short rt_flags;
- short rt_pad2;
- unsigned int rt_pad3;
- unsigned int rt_pad4;
- short rt_metric; /* +1 for binary compatibility! */
- unsigned int rt_dev; /* forcing the device at add */
- unsigned int rt_mtu; /* per route MTU/Window */
-#ifndef __KERNEL__
-#define rt_mss rt_mtu /* Compatibility :-( */
-#endif
- unsigned int rt_window; /* Window clamping */
- unsigned short rt_irtt; /* Initial RTT */
-};
-
-static inline int routing_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- struct rtentry32 *ur = (struct rtentry32 *)arg;
- struct rtentry r;
- char devname[16];
- u32 rtdev;
- int ret;
- mm_segment_t old_fs = get_fs();
-
- ret = copy_from_user (&r.rt_dst, &(ur->rt_dst), 3 * sizeof(struct sockaddr));
- ret |= __get_user (r.rt_flags, &(ur->rt_flags));
- ret |= __get_user (r.rt_metric, &(ur->rt_metric));
- ret |= __get_user (r.rt_mtu, &(ur->rt_mtu));
- ret |= __get_user (r.rt_window, &(ur->rt_window));
- ret |= __get_user (r.rt_irtt, &(ur->rt_irtt));
- ret |= __get_user (rtdev, &(ur->rt_dev));
- if (rtdev) {
- ret |= copy_from_user (devname, (char *)A(rtdev), 15);
- r.rt_dev = devname; devname[15] = 0;
- } else
- r.rt_dev = 0;
- if (ret)
- return -EFAULT;
- set_fs (KERNEL_DS);
- ret = sys_ioctl (fd, cmd, (long)&r);
- set_fs (old_fs);
- return ret;
-}
-
-#endif /* CONFIG_NET */
-
-static int do_ext2_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- /* These are just misnamed, they actually get/put from/to user an int */
- switch (cmd) {
- case EXT2_IOC32_GETFLAGS: cmd = EXT2_IOC_GETFLAGS; break;
- case EXT2_IOC32_SETFLAGS: cmd = EXT2_IOC_SETFLAGS; break;
- case EXT2_IOC32_GETVERSION: cmd = EXT2_IOC_GETVERSION; break;
- case EXT2_IOC32_SETVERSION: cmd = EXT2_IOC_SETVERSION; break;
- }
- return sys_ioctl(fd, cmd, arg);
-}
-
-struct hd_geometry32 {
- unsigned char heads;
- unsigned char sectors;
- unsigned short cylinders;
- u32 start;
-};
-
-static int hdio_getgeo(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- struct hd_geometry geo;
- int err;
-
- set_fs (KERNEL_DS);
- err = sys_ioctl(fd, HDIO_GETGEO, (unsigned long)&geo);
- set_fs (old_fs);
- if (!err) {
- err = copy_to_user ((struct hd_geometry32 *)arg, &geo, 4);
- err |= __put_user (geo.start, &(((struct hd_geometry32 *)arg)->start));
- }
-
- return err ? -EFAULT : 0;
-}
-
-static int hdio_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- unsigned long kval;
- unsigned int *uvp;
- int error;
-
- set_fs(KERNEL_DS);
- error = sys_ioctl(fd, cmd, (long)&kval);
- set_fs(old_fs);
-
- if (error == 0) {
- uvp = (unsigned int *)arg;
- if (put_user(kval, uvp))
- error = -EFAULT;
- }
-
- return error;
-}
-
-static int ret_einval(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- return -EINVAL;
-}
-
-struct blkpg_ioctl_arg32 {
- int op;
- int flags;
- int datalen;
- u32 data;
-};
-
-static int blkpg_ioctl_trans(unsigned int fd, unsigned int cmd,
- struct blkpg_ioctl_arg32 *arg)
-{
- struct blkpg_ioctl_arg a;
- struct blkpg_partition p;
- int err;
- mm_segment_t old_fs = get_fs();
-
- err = get_user(a.op, &arg->op);
- err |= __get_user(a.flags, &arg->flags);
- err |= __get_user(a.datalen, &arg->datalen);
- err |= __get_user((long)a.data, &arg->data);
- if (err) return err;
- switch (a.op) {
- case BLKPG_ADD_PARTITION:
- case BLKPG_DEL_PARTITION:
- if (a.datalen < sizeof(struct blkpg_partition))
- return -EINVAL;
- if (copy_from_user(&p, a.data, sizeof(struct blkpg_partition)))
- return -EFAULT;
- a.data = &p;
- set_fs (KERNEL_DS);
- err = sys_ioctl(fd, cmd, (unsigned long)&a);
- set_fs (old_fs);
- default:
- return -EINVAL;
- }
- return err;
-}
-
-struct mtget32 {
- __u32 mt_type;
- __u32 mt_resid;
- __u32 mt_dsreg;
- __u32 mt_gstat;
- __u32 mt_erreg;
- __kernel_daddr_t32 mt_fileno;
- __kernel_daddr_t32 mt_blkno;
-};
-#define MTIOCGET32 _IOR('m', 2, struct mtget32)
-
-struct mtpos32 {
- __u32 mt_blkno;
-};
-#define MTIOCPOS32 _IOR('m', 3, struct mtpos32)
-
-struct mtconfiginfo32 {
- __u32 mt_type;
- __u32 ifc_type;
- __u16 irqnr;
- __u16 dmanr;
- __u16 port;
- __u32 debug;
- __u32 have_dens:1;
- __u32 have_bsf:1;
- __u32 have_fsr:1;
- __u32 have_bsr:1;
- __u32 have_eod:1;
- __u32 have_seek:1;
- __u32 have_tell:1;
- __u32 have_ras1:1;
- __u32 have_ras2:1;
- __u32 have_ras3:1;
- __u32 have_qfa:1;
- __u32 pad1:5;
- char reserved[10];
-};
-#define MTIOCGETCONFIG32 _IOR('m', 4, struct mtconfiginfo32)
-#define MTIOCSETCONFIG32 _IOW('m', 5, struct mtconfiginfo32)
-
-static int mt_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- mm_segment_t old_fs = get_fs();
- struct mtconfiginfo info;
- struct mtget get;
- struct mtpos pos;
- unsigned long kcmd;
- void *karg;
- int err = 0;
-
- switch(cmd) {
- case MTIOCPOS32:
- kcmd = MTIOCPOS;
- karg = &pos;
- break;
- case MTIOCGET32:
- kcmd = MTIOCGET;
- karg = &get;
- break;
- case MTIOCGETCONFIG32:
- kcmd = MTIOCGETCONFIG;
- karg = &info;
- break;
- case MTIOCSETCONFIG32:
- kcmd = MTIOCSETCONFIG;
- karg = &info;
- err = __get_user(info.mt_type, &((struct mtconfiginfo32 *)arg)->mt_type);
- err |= __get_user(info.ifc_type, &((struct mtconfiginfo32 *)arg)->ifc_type);
- err |= __get_user(info.irqnr, &((struct mtconfiginfo32 *)arg)->irqnr);
- err |= __get_user(info.dmanr, &((struct mtconfiginfo32 *)arg)->dmanr);
- err |= __get_user(info.port, &((struct mtconfiginfo32 *)arg)->port);
- err |= __get_user(info.debug, &((struct mtconfiginfo32 *)arg)->debug);
- err |= __copy_from_user((char *)&info.debug + sizeof(info.debug),
- (char *)&((struct mtconfiginfo32 *)arg)->debug
- + sizeof(((struct mtconfiginfo32 *)arg)->debug), sizeof(__u32));
- if (err)
- return -EFAULT;
- break;
- default:
- do {
- static int count = 0;
- if (++count <= 20)
- printk("mt_ioctl: Unknown cmd fd(%d) "
- "cmd(%08x) arg(%08x)\n",
- (int)fd, (unsigned int)cmd, (unsigned int)arg);
- } while(0);
- return -EINVAL;
- }
- set_fs (KERNEL_DS);
- err = sys_ioctl (fd, kcmd, (unsigned long)karg);
- set_fs (old_fs);
- if (err)
- return err;
- switch (cmd) {
- case MTIOCPOS32:
- err = __put_user(pos.mt_blkno, &((struct mtpos32 *)arg)->mt_blkno);
- break;
- case MTIOCGET32:
- err = __put_user(get.mt_type, &((struct mtget32 *)arg)->mt_type);
- err |= __put_user(get.mt_resid, &((struct mtget32 *)arg)->mt_resid);
- err |= __put_user(get.mt_dsreg, &((struct mtget32 *)arg)->mt_dsreg);
- err |= __put_user(get.mt_gstat, &((struct mtget32 *)arg)->mt_gstat);
- err |= __put_user(get.mt_erreg, &((struct mtget32 *)arg)->mt_erreg);
- err |= __put_user(get.mt_fileno, &((struct mtget32 *)arg)->mt_fileno);
- err |= __put_user(get.mt_blkno, &((struct mtget32 *)arg)->mt_blkno);
- break;
- case MTIOCGETCONFIG32:
- err = __put_user(info.mt_type, &((struct mtconfiginfo32 *)arg)->mt_type);
- err |= __put_user(info.ifc_type, &((struct mtconfiginfo32 *)arg)->ifc_type);
- err |= __put_user(info.irqnr, &((struct mtconfiginfo32 *)arg)->irqnr);
- err |= __put_user(info.dmanr, &((struct mtconfiginfo32 *)arg)->dmanr);
- err |= __put_user(info.port, &((struct mtconfiginfo32 *)arg)->port);
- err |= __put_user(info.debug, &((struct mtconfiginfo32 *)arg)->debug);
- err |= __copy_to_user((char *)&((struct mtconfiginfo32 *)arg)->debug
- + sizeof(((struct mtconfiginfo32 *)arg)->debug),
- (char *)&info.debug + sizeof(info.debug), sizeof(__u32));
- break;
- case MTIOCSETCONFIG32:
- break;
- }
- return err ? -EFAULT: 0;
-}
-
-#define AUTOFS_IOC_SETTIMEOUT32 _IOWR(0x93,0x64,unsigned int)
-
-static int ioc_settimeout(unsigned int fd, unsigned int cmd, unsigned long arg)
-{
- return rw_long(fd, AUTOFS_IOC_SETTIMEOUT, arg);
-}
-
-typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
-
-#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl)
-#define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl32_handler_t)(handler), NULL },
-#define IOCTL_TABLE_START \
- struct ioctl_trans ioctl_start[] = {
-#define IOCTL_TABLE_END \
- }; struct ioctl_trans ioctl_end[0];
-
-
-IOCTL_TABLE_START
-#include <linux/compat_ioctl.h>
-COMPATIBLE_IOCTL(TCGETA)
-COMPATIBLE_IOCTL(TCSETA)
-COMPATIBLE_IOCTL(TCSETAW)
-COMPATIBLE_IOCTL(TCSETAF)
-COMPATIBLE_IOCTL(TCSBRK)
-COMPATIBLE_IOCTL(TCXONC)
-COMPATIBLE_IOCTL(TCFLSH)
-COMPATIBLE_IOCTL(TCGETS)
-COMPATIBLE_IOCTL(TCSETS)
-COMPATIBLE_IOCTL(TCSETSW)
-COMPATIBLE_IOCTL(TCSETSF)
-COMPATIBLE_IOCTL(TIOCLINUX)
-
-COMPATIBLE_IOCTL(TIOCGETD)
-COMPATIBLE_IOCTL(TIOCSETD)
-COMPATIBLE_IOCTL(TIOCEXCL)
-COMPATIBLE_IOCTL(TIOCNXCL)
-COMPATIBLE_IOCTL(TIOCCONS)
-COMPATIBLE_IOCTL(TIOCGSOFTCAR)
-COMPATIBLE_IOCTL(TIOCSSOFTCAR)
-COMPATIBLE_IOCTL(TIOCSWINSZ)
-COMPATIBLE_IOCTL(TIOCGWINSZ)
-COMPATIBLE_IOCTL(TIOCMGET)
-COMPATIBLE_IOCTL(TIOCMBIC)
-COMPATIBLE_IOCTL(TIOCMBIS)
-COMPATIBLE_IOCTL(TIOCMSET)
-COMPATIBLE_IOCTL(TIOCPKT)
-COMPATIBLE_IOCTL(TIOCNOTTY)
-COMPATIBLE_IOCTL(TIOCSTI)
-COMPATIBLE_IOCTL(TIOCOUTQ)
-COMPATIBLE_IOCTL(TIOCSPGRP)
-COMPATIBLE_IOCTL(TIOCGPGRP)
-COMPATIBLE_IOCTL(TIOCSCTTY)
-COMPATIBLE_IOCTL(TIOCGPTN)
-COMPATIBLE_IOCTL(TIOCSPTLCK)
-COMPATIBLE_IOCTL(TIOCGSERIAL)
-COMPATIBLE_IOCTL(TIOCSSERIAL)
-COMPATIBLE_IOCTL(TIOCSERGETLSR)
-
-COMPATIBLE_IOCTL(FIOCLEX)
-COMPATIBLE_IOCTL(FIONCLEX)
-COMPATIBLE_IOCTL(FIOASYNC)
-COMPATIBLE_IOCTL(FIONBIO)
-COMPATIBLE_IOCTL(FIONREAD)
-
-#ifdef CONFIG_FB
-/* Big F */
-COMPATIBLE_IOCTL(FBIOGET_VSCREENINFO)
-COMPATIBLE_IOCTL(FBIOPUT_VSCREENINFO)
-HANDLE_IOCTL(FBIOGET_FSCREENINFO, do_fbioget_fscreeninfo_ioctl)
-HANDLE_IOCTL(FBIOGETCMAP, do_fbiocmap_ioctl)
-HANDLE_IOCTL(FBIOPUTCMAP, do_fbiocmap_ioctl)
-COMPATIBLE_IOCTL(FBIOPAN_DISPLAY)
-#endif /* CONFIG_FB */
-
-/* Big K */
-COMPATIBLE_IOCTL(PIO_FONT)
-COMPATIBLE_IOCTL(GIO_FONT)
-COMPATIBLE_IOCTL(KDSIGACCEPT)
-COMPATIBLE_IOCTL(KDGETKEYCODE)
-COMPATIBLE_IOCTL(KDSETKEYCODE)
-COMPATIBLE_IOCTL(KIOCSOUND)
-COMPATIBLE_IOCTL(KDMKTONE)
-COMPATIBLE_IOCTL(KDGKBTYPE)
-COMPATIBLE_IOCTL(KDSETMODE)
-COMPATIBLE_IOCTL(KDGETMODE)
-COMPATIBLE_IOCTL(KDSKBMODE)
-COMPATIBLE_IOCTL(KDGKBMODE)
-COMPATIBLE_IOCTL(KDSKBMETA)
-COMPATIBLE_IOCTL(KDGKBMETA)
-COMPATIBLE_IOCTL(KDGKBENT)
-COMPATIBLE_IOCTL(KDSKBENT)
-COMPATIBLE_IOCTL(KDGKBSENT)
-COMPATIBLE_IOCTL(KDSKBSENT)
-COMPATIBLE_IOCTL(KDGKBDIACR)
-COMPATIBLE_IOCTL(KDSKBDIACR)
-COMPATIBLE_IOCTL(KDKBDREP)
-COMPATIBLE_IOCTL(KDGKBLED)
-COMPATIBLE_IOCTL(KDSKBLED)
-COMPATIBLE_IOCTL(KDGETLED)
-COMPATIBLE_IOCTL(KDSETLED)
-COMPATIBLE_IOCTL(GIO_SCRNMAP)
-COMPATIBLE_IOCTL(PIO_SCRNMAP)
-COMPATIBLE_IOCTL(GIO_UNISCRNMAP)
-COMPATIBLE_IOCTL(PIO_UNISCRNMAP)
-COMPATIBLE_IOCTL(PIO_FONTRESET)
-COMPATIBLE_IOCTL(PIO_UNIMAPCLR)
-
-/* Big S */
-COMPATIBLE_IOCTL(SCSI_IOCTL_GET_IDLUN)
-COMPATIBLE_IOCTL(SCSI_IOCTL_DOORLOCK)
-COMPATIBLE_IOCTL(SCSI_IOCTL_DOORUNLOCK)
-COMPATIBLE_IOCTL(SCSI_IOCTL_TEST_UNIT_READY)
-COMPATIBLE_IOCTL(SCSI_IOCTL_TAGGED_ENABLE)
-COMPATIBLE_IOCTL(SCSI_IOCTL_TAGGED_DISABLE)
-COMPATIBLE_IOCTL(SCSI_IOCTL_GET_BUS_NUMBER)
-COMPATIBLE_IOCTL(SCSI_IOCTL_SEND_COMMAND)
-
-/* Big V */
-COMPATIBLE_IOCTL(VT_SETMODE)
-COMPATIBLE_IOCTL(VT_GETMODE)
-COMPATIBLE_IOCTL(VT_GETSTATE)
-COMPATIBLE_IOCTL(VT_OPENQRY)
-COMPATIBLE_IOCTL(VT_ACTIVATE)
-COMPATIBLE_IOCTL(VT_WAITACTIVE)
-COMPATIBLE_IOCTL(VT_RELDISP)
-COMPATIBLE_IOCTL(VT_DISALLOCATE)
-COMPATIBLE_IOCTL(VT_RESIZE)
-COMPATIBLE_IOCTL(VT_RESIZEX)
-COMPATIBLE_IOCTL(VT_LOCKSWITCH)
-COMPATIBLE_IOCTL(VT_UNLOCKSWITCH)
-
-#ifdef CONFIG_NET
-/* Socket level stuff */
-COMPATIBLE_IOCTL(FIOSETOWN)
-COMPATIBLE_IOCTL(SIOCSPGRP)
-COMPATIBLE_IOCTL(FIOGETOWN)
-COMPATIBLE_IOCTL(SIOCGPGRP)
-COMPATIBLE_IOCTL(SIOCATMARK)
-COMPATIBLE_IOCTL(SIOCSIFLINK)
-COMPATIBLE_IOCTL(SIOCSIFENCAP)
-COMPATIBLE_IOCTL(SIOCGIFENCAP)
-COMPATIBLE_IOCTL(SIOCSIFBR)
-COMPATIBLE_IOCTL(SIOCGIFBR)
-COMPATIBLE_IOCTL(SIOCSARP)
-COMPATIBLE_IOCTL(SIOCGARP)
-COMPATIBLE_IOCTL(SIOCDARP)
-COMPATIBLE_IOCTL(SIOCSRARP)
-COMPATIBLE_IOCTL(SIOCGRARP)
-COMPATIBLE_IOCTL(SIOCDRARP)
-COMPATIBLE_IOCTL(SIOCADDDLCI)
-COMPATIBLE_IOCTL(SIOCDELDLCI)
-/* SG stuff */
-COMPATIBLE_IOCTL(SG_SET_TIMEOUT)
-COMPATIBLE_IOCTL(SG_GET_TIMEOUT)
-COMPATIBLE_IOCTL(SG_EMULATED_HOST)
-COMPATIBLE_IOCTL(SG_SET_TRANSFORM)
-COMPATIBLE_IOCTL(SG_GET_TRANSFORM)
-COMPATIBLE_IOCTL(SG_SET_RESERVED_SIZE)
-COMPATIBLE_IOCTL(SG_GET_RESERVED_SIZE)
-COMPATIBLE_IOCTL(SG_GET_SCSI_ID)
-COMPATIBLE_IOCTL(SG_SET_FORCE_LOW_DMA)
-COMPATIBLE_IOCTL(SG_GET_LOW_DMA)
-COMPATIBLE_IOCTL(SG_SET_FORCE_PACK_ID)
-COMPATIBLE_IOCTL(SG_GET_PACK_ID)
-COMPATIBLE_IOCTL(SG_GET_NUM_WAITING)
-COMPATIBLE_IOCTL(SG_SET_DEBUG)
-COMPATIBLE_IOCTL(SG_GET_SG_TABLESIZE)
-COMPATIBLE_IOCTL(SG_GET_COMMAND_Q)
-COMPATIBLE_IOCTL(SG_SET_COMMAND_Q)
-COMPATIBLE_IOCTL(SG_GET_VERSION_NUM)
-COMPATIBLE_IOCTL(SG_NEXT_CMD_LEN)
-COMPATIBLE_IOCTL(SG_SCSI_RESET)
-COMPATIBLE_IOCTL(SG_IO)
-COMPATIBLE_IOCTL(SG_GET_REQUEST_TABLE)
-COMPATIBLE_IOCTL(SG_SET_KEEP_ORPHAN)
-COMPATIBLE_IOCTL(SG_GET_KEEP_ORPHAN)
-/* PPP stuff */
-COMPATIBLE_IOCTL(PPPIOCGFLAGS)
-COMPATIBLE_IOCTL(PPPIOCSFLAGS)
-COMPATIBLE_IOCTL(PPPIOCGASYNCMAP)
-COMPATIBLE_IOCTL(PPPIOCSASYNCMAP)
-COMPATIBLE_IOCTL(PPPIOCGUNIT)
-COMPATIBLE_IOCTL(PPPIOCGRASYNCMAP)
-COMPATIBLE_IOCTL(PPPIOCSRASYNCMAP)
-COMPATIBLE_IOCTL(PPPIOCGMRU)
-COMPATIBLE_IOCTL(PPPIOCSMRU)
-COMPATIBLE_IOCTL(PPPIOCSMAXCID)
-COMPATIBLE_IOCTL(PPPIOCGXASYNCMAP)
-COMPATIBLE_IOCTL(PPPIOCSXASYNCMAP)
-COMPATIBLE_IOCTL(PPPIOCXFERUNIT)
-COMPATIBLE_IOCTL(PPPIOCGNPMODE)
-COMPATIBLE_IOCTL(PPPIOCSNPMODE)
-COMPATIBLE_IOCTL(PPPIOCGDEBUG)
-COMPATIBLE_IOCTL(PPPIOCSDEBUG)
-COMPATIBLE_IOCTL(PPPIOCNEWUNIT)
-COMPATIBLE_IOCTL(PPPIOCATTACH)
-COMPATIBLE_IOCTL(PPPIOCGCHAN)
-/* PPPOX */
-COMPATIBLE_IOCTL(PPPOEIOCSFWD)
-COMPATIBLE_IOCTL(PPPOEIOCDFWD)
-/* CDROM stuff */
-COMPATIBLE_IOCTL(CDROMPAUSE)
-COMPATIBLE_IOCTL(CDROMRESUME)
-COMPATIBLE_IOCTL(CDROMPLAYMSF)
-COMPATIBLE_IOCTL(CDROMPLAYTRKIND)
-COMPATIBLE_IOCTL(CDROMREADTOCHDR)
-COMPATIBLE_IOCTL(CDROMREADTOCENTRY)
-COMPATIBLE_IOCTL(CDROMSTOP)
-COMPATIBLE_IOCTL(CDROMSTART)
-COMPATIBLE_IOCTL(CDROMEJECT)
-COMPATIBLE_IOCTL(CDROMVOLCTRL)
-COMPATIBLE_IOCTL(CDROMSUBCHNL)
-COMPATIBLE_IOCTL(CDROMEJECT_SW)
-COMPATIBLE_IOCTL(CDROMMULTISESSION)
-COMPATIBLE_IOCTL(CDROM_GET_MCN)
-COMPATIBLE_IOCTL(CDROMRESET)
-COMPATIBLE_IOCTL(CDROMVOLREAD)
-COMPATIBLE_IOCTL(CDROMSEEK)
-COMPATIBLE_IOCTL(CDROMPLAYBLK)
-COMPATIBLE_IOCTL(CDROMCLOSETRAY)
-COMPATIBLE_IOCTL(CDROM_SET_OPTIONS)
-COMPATIBLE_IOCTL(CDROM_CLEAR_OPTIONS)
-COMPATIBLE_IOCTL(CDROM_SELECT_SPEED)
-COMPATIBLE_IOCTL(CDROM_SELECT_DISC)
-COMPATIBLE_IOCTL(CDROM_MEDIA_CHANGED)
-COMPATIBLE_IOCTL(CDROM_DRIVE_STATUS)
-COMPATIBLE_IOCTL(CDROM_DISC_STATUS)
-COMPATIBLE_IOCTL(CDROM_CHANGER_NSLOTS)
-COMPATIBLE_IOCTL(CDROM_LOCKDOOR)
-COMPATIBLE_IOCTL(CDROM_DEBUG)
-COMPATIBLE_IOCTL(CDROM_GET_CAPABILITY)
-/* DVD ioctls */
-COMPATIBLE_IOCTL(DVD_READ_STRUCT)
-COMPATIBLE_IOCTL(DVD_WRITE_STRUCT)
-COMPATIBLE_IOCTL(DVD_AUTH)
-/* Big L */
-COMPATIBLE_IOCTL(LOOP_SET_FD)
-COMPATIBLE_IOCTL(LOOP_CLR_FD)
-
-/* And these ioctls need translation */
-HANDLE_IOCTL(SIOCGIFNAME, dev_ifname32)
-HANDLE_IOCTL(SIOCGIFCONF, dev_ifconf)
-HANDLE_IOCTL(SIOCGIFFLAGS, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFFLAGS, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFMETRIC, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFMETRIC, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFMTU, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFMTU, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFMEM, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFMEM, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFHWADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFHWADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCADDMULTI, dev_ifsioc)
-HANDLE_IOCTL(SIOCDELMULTI, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFINDEX, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFMAP, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFMAP, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFBRDADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFBRDADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFDSTADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFDSTADDR, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFNETMASK, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFNETMASK, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFPFLAGS, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFPFLAGS, dev_ifsioc)
-HANDLE_IOCTL(SIOCGPPPSTATS, dev_ifsioc)
-HANDLE_IOCTL(SIOCGPPPCSTATS, dev_ifsioc)
-HANDLE_IOCTL(SIOCGPPPVER, dev_ifsioc)
-HANDLE_IOCTL(SIOCGIFTXQLEN, dev_ifsioc)
-HANDLE_IOCTL(SIOCSIFTXQLEN, dev_ifsioc)
-HANDLE_IOCTL(SIOCADDRT, routing_ioctl)
-HANDLE_IOCTL(SIOCDELRT, routing_ioctl)
-/*
- * Note SIOCRTMSG is no longer, so this is safe and * the user would
- * have seen just an -EINVAL anyways.
- */
-HANDLE_IOCTL(SIOCRTMSG, ret_einval)
-HANDLE_IOCTL(SIOCGSTAMP, do_siocgstamp)
-
-#endif /* CONFIG_NET */
-
-HANDLE_IOCTL(EXT2_IOC32_GETFLAGS, do_ext2_ioctl)
-HANDLE_IOCTL(EXT2_IOC32_SETFLAGS, do_ext2_ioctl)
-HANDLE_IOCTL(EXT2_IOC32_GETVERSION, do_ext2_ioctl)
-HANDLE_IOCTL(EXT2_IOC32_SETVERSION, do_ext2_ioctl)
-
-HANDLE_IOCTL(HDIO_GETGEO, hdio_getgeo) /* hdreg.h ioctls */
-HANDLE_IOCTL(HDIO_GET_UNMASKINTR, hdio_ioctl_trans)
-HANDLE_IOCTL(HDIO_GET_MULTCOUNT, hdio_ioctl_trans)
-// HDIO_OBSOLETE_IDENTITY
-//HANDLE_IOCTL(HDIO_GET_KEEPSETTINGS, hdio_ioctl_trans)
-HANDLE_IOCTL(HDIO_GET_32BIT, hdio_ioctl_trans)
-HANDLE_IOCTL(HDIO_GET_NOWERR, hdio_ioctl_trans)
-HANDLE_IOCTL(HDIO_GET_DMA, hdio_ioctl_trans)
-HANDLE_IOCTL(HDIO_GET_NICE, hdio_ioctl_trans)
-COMPATIBLE_IOCTL(HDIO_GET_IDENTITY)
-// HDIO_TRISTATE_HWIF /* not implemented */
-// HDIO_DRIVE_TASK /* To do, need specs */
-COMPATIBLE_IOCTL(HDIO_DRIVE_CMD)
-COMPATIBLE_IOCTL(HDIO_SET_MULTCOUNT)
-COMPATIBLE_IOCTL(HDIO_SET_UNMASKINTR)
-//COMPATIBLE_IOCTL(HDIO_SET_KEEPSETTINGS)
-COMPATIBLE_IOCTL(HDIO_SET_32BIT)
-COMPATIBLE_IOCTL(HDIO_SET_NOWERR)
-COMPATIBLE_IOCTL(HDIO_SET_DMA)
-COMPATIBLE_IOCTL(HDIO_SET_PIO_MODE)
-COMPATIBLE_IOCTL(HDIO_SET_NICE)
-
-COMPATIBLE_IOCTL(BLKROSET) /* fs.h ioctls */
-COMPATIBLE_IOCTL(BLKROGET)
-COMPATIBLE_IOCTL(BLKRRPART)
-HANDLE_IOCTL(BLKGETSIZE, w_long)
-
-COMPATIBLE_IOCTL(BLKFLSBUF)
-COMPATIBLE_IOCTL(BLKSECTSET)
-HANDLE_IOCTL(BLKSECTGET, w_long)
-COMPATIBLE_IOCTL(BLKSSZGET)
-HANDLE_IOCTL(BLKPG, blkpg_ioctl_trans)
-COMPATIBLE_IOCTL(BLKBSZGET)
-COMPATIBLE_IOCTL(BLKBSZSET)
-
-#ifdef CONFIG_MD
-/* status */
-COMPATIBLE_IOCTL(RAID_VERSION)
-COMPATIBLE_IOCTL(GET_ARRAY_INFO)
-COMPATIBLE_IOCTL(GET_DISK_INFO)
-COMPATIBLE_IOCTL(PRINT_RAID_DEBUG)
-COMPATIBLE_IOCTL(RAID_AUTORUN)
-
-/* configuration */
-COMPATIBLE_IOCTL(CLEAR_ARRAY)
-COMPATIBLE_IOCTL(ADD_NEW_DISK)
-COMPATIBLE_IOCTL(HOT_REMOVE_DISK)
-COMPATIBLE_IOCTL(SET_ARRAY_INFO)
-COMPATIBLE_IOCTL(SET_DISK_INFO)
-COMPATIBLE_IOCTL(WRITE_RAID_INFO)
-COMPATIBLE_IOCTL(UNPROTECT_ARRAY)
-COMPATIBLE_IOCTL(PROTECT_ARRAY)
-COMPATIBLE_IOCTL(HOT_ADD_DISK)
-COMPATIBLE_IOCTL(SET_DISK_FAULTY)
-
-/* usage */
-COMPATIBLE_IOCTL(RUN_ARRAY)
-COMPATIBLE_IOCTL(START_ARRAY)
-COMPATIBLE_IOCTL(STOP_ARRAY)
-COMPATIBLE_IOCTL(STOP_ARRAY_RO)
-COMPATIBLE_IOCTL(RESTART_ARRAY_RW)
-#endif /* CONFIG_MD */
-
-#ifdef CONFIG_SIBYTE_TBPROF
-COMPATIBLE_IOCTL(SBPROF_ZBSTART),
-COMPATIBLE_IOCTL(SBPROF_ZBSTOP),
-COMPATIBLE_IOCTL(SBPROF_ZBWAITFULL),
-#endif /* CONFIG_SIBYTE_TBPROF */
-
-#if defined(CONFIG_BLK_DEV_DM) || defined(CONFIG_BLK_DEV_DM_MODULE)
- IOCTL32_DEFAULT(DM_VERSION),
- IOCTL32_DEFAULT(DM_REMOVE_ALL),
- IOCTL32_DEFAULT(DM_DEV_CREATE),
- IOCTL32_DEFAULT(DM_DEV_REMOVE),
- IOCTL32_DEFAULT(DM_DEV_RELOAD),
- IOCTL32_DEFAULT(DM_DEV_SUSPEND),
- IOCTL32_DEFAULT(DM_DEV_RENAME),
- IOCTL32_DEFAULT(DM_DEV_DEPS),
- IOCTL32_DEFAULT(DM_DEV_STATUS),
- IOCTL32_DEFAULT(DM_TARGET_STATUS),
- IOCTL32_DEFAULT(DM_TARGET_WAIT),
-#endif /* CONFIG_BLK_DEV_DM */
-
-COMPATIBLE_IOCTL(MTIOCTOP) /* mtio.h ioctls */
-HANDLE_IOCTL(MTIOCGET32, mt_ioctl_trans)
-HANDLE_IOCTL(MTIOCPOS32, mt_ioctl_trans)
-HANDLE_IOCTL(MTIOCGETCONFIG32, mt_ioctl_trans)
-HANDLE_IOCTL(MTIOCSETCONFIG32, mt_ioctl_trans)
-// MTIOCRDFTSEG
-// MTIOCWRFTSEG
-// MTIOCVOLINFO
-// MTIOCGETSIZE
-// MTIOCFTFORMAT
-// MTIOCFTCMD
-
-COMPATIBLE_IOCTL(AUTOFS_IOC_READY) /* auto_fs.h ioctls */
-COMPATIBLE_IOCTL(AUTOFS_IOC_FAIL)
-COMPATIBLE_IOCTL(AUTOFS_IOC_CATATONIC)
-COMPATIBLE_IOCTL(AUTOFS_IOC_PROTOVER)
-HANDLE_IOCTL(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout)
-COMPATIBLE_IOCTL(AUTOFS_IOC_EXPIRE)
-COMPATIBLE_IOCTL(AUTOFS_IOC_EXPIRE_MULTI)
-
-/* Little p (/dev/rtc, /dev/envctrl, etc.) */
-COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */
-COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */
-COMPATIBLE_IOCTL(RTC_AIE_ON)
-COMPATIBLE_IOCTL(RTC_AIE_OFF)
-COMPATIBLE_IOCTL(RTC_UIE_ON)
-COMPATIBLE_IOCTL(RTC_UIE_OFF)
-COMPATIBLE_IOCTL(RTC_PIE_ON)
-COMPATIBLE_IOCTL(RTC_PIE_OFF)
-COMPATIBLE_IOCTL(RTC_WIE_ON)
-COMPATIBLE_IOCTL(RTC_WIE_OFF)
-COMPATIBLE_IOCTL(RTC_ALM_SET)
-COMPATIBLE_IOCTL(RTC_ALM_READ)
-COMPATIBLE_IOCTL(RTC_RD_TIME)
-COMPATIBLE_IOCTL(RTC_SET_TIME)
-COMPATIBLE_IOCTL(RTC_WKALM_SET)
-COMPATIBLE_IOCTL(RTC_WKALM_RD)
-IOCTL_TABLE_END
-
-#define NR_IOCTL_TRANS (sizeof(ioctl_translations) / \
- sizeof(ioctl_translations[0]))
diff -Nru a/arch/mips64/kernel/irq.c b/arch/mips64/kernel/irq.c
--- a/arch/mips64/kernel/irq.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,984 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Code to handle x86 style IRQs plus some generic interrupt stuff.
- *
- * Copyright (C) 1992 Linus Torvalds
- * Copyright (C) 1994 - 2000 Ralf Baechle
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/module.h>
-#include <linux/proc_fs.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/random.h>
-#include <linux/sched.h>
-#include <linux/seq_file.h>
-#include <linux/kallsyms.h>
-
-#include <asm/atomic.h>
-#include <asm/system.h>
-#include <asm/uaccess.h>
-
-/*
- * Controller mappings for all interrupt sources:
- */
-irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = {
- [0 ... NR_IRQS-1] = {
- .handler = &no_irq_type,
- .lock = SPIN_LOCK_UNLOCKED
- }
-};
-
-static void register_irq_proc (unsigned int irq);
-
-/*
- * Special irq handlers.
- */
-
-irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs)
-{ return IRQ_NONE; }
-
-/*
- * Generic no controller code
- */
-
-static void enable_none(unsigned int irq) { }
-static unsigned int startup_none(unsigned int irq) { return 0; }
-static void disable_none(unsigned int irq) { }
-static void ack_none(unsigned int irq)
-{
- /*
- * 'what should we do if we get a hw irq event on an illegal vector'.
- * each architecture has to answer this themselves, it doesn't deserve
- * a generic callback i think.
- */
- printk("unexpected interrupt %d\n", irq);
-}
-
-/* startup is the same as "enable", shutdown is same as "disable" */
-#define shutdown_none disable_none
-#define end_none enable_none
-
-struct hw_interrupt_type no_irq_type = {
- "none",
- startup_none,
- shutdown_none,
- enable_none,
- disable_none,
- ack_none,
- end_none
-};
-
-atomic_t irq_err_count;
-
-/*
- * Generic, controller-independent functions:
- */
-
-int show_interrupts(struct seq_file *p, void *v)
-{
- int i, j;
- struct irqaction * action;
- unsigned long flags;
-
- seq_printf(p, " ");
- for (j=0; j<NR_CPUS; j++)
- if (cpu_online(j))
- seq_printf(p, "CPU%d ",j);
- seq_putc(p, '\n');
-
- for (i = 0 ; i < NR_IRQS ; i++) {
- spin_lock_irqsave(&irq_desc[i].lock, flags);
- action = irq_desc[i].action;
- if (!action)
- goto skip;
- seq_printf(p, "%3d: ",i);
-#ifndef CONFIG_SMP
- seq_printf(p, "%10u ", kstat_irqs(i));
-#else
- for (j = 0; j < NR_CPUS; j++)
- if (cpu_online(j))
- seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
-#endif
- seq_printf(p, " %14s", irq_desc[i].handler->typename);
- seq_printf(p, " %s", action->name);
-
- for (action=action->next; action; action = action->next)
- seq_printf(p, ", %s", action->name);
-
- seq_putc(p, '\n');
-skip:
- spin_unlock_irqrestore(&irq_desc[i].lock, flags);
- }
- seq_putc(p, '\n');
- seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
-
- return 0;
-}
-
-#ifdef CONFIG_SMP
-inline void synchronize_irq(unsigned int irq)
-{
- while (irq_desc[irq].status & IRQ_INPROGRESS)
- cpu_relax();
-}
-#endif
-
-/*
- * This should really return information about whether
- * we should do bottom half handling etc. Right now we
- * end up _always_ checking the bottom half, which is a
- * waste of time and is not what some drivers would
- * prefer.
- */
-int handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqaction * action)
-{
- int status = 1; /* Force the "do bottom halves" bit */
- int retval = 0;
-
- if (!(action->flags & SA_INTERRUPT))
- local_irq_enable();
-
- do {
- status |= action->flags;
- retval |= action->handler(irq, action->dev_id, regs);
- action = action->next;
- } while (action);
- if (status & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- local_irq_disable();
-
- return retval;
-}
-
-static void __report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret)
-{
- struct irqaction *action;
-
- if (action_ret != IRQ_HANDLED && action_ret != IRQ_NONE) {
- printk(KERN_ERR "irq event %d: bogus return value %x\n",
- irq, action_ret);
- } else {
- printk(KERN_ERR "irq %d: nobody cared!\n", irq);
- }
- dump_stack();
- printk(KERN_ERR "handlers:\n");
- action = desc->action;
- do {
- printk(KERN_ERR "[<%p>]", action->handler);
- print_symbol(" (%s)",
- (unsigned long)action->handler);
- printk("\n");
- action = action->next;
- } while (action);
-}
-
-static void report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret)
-{
- static int count = 100;
-
- if (count) {
- count--;
- __report_bad_irq(irq, desc, action_ret);
- }
-}
-
-static int noirqdebug;
-
-static int __init noirqdebug_setup(char *str)
-{
- noirqdebug = 1;
- printk("IRQ lockup detection disabled\n");
- return 1;
-}
-
-__setup("noirqdebug", noirqdebug_setup);
-
-/*
- * If 99,900 of the previous 100,000 interrupts have not been handled then
- * assume that the IRQ is stuck in some manner. Drop a diagnostic and try to
- * turn the IRQ off.
- *
- * (The other 100-of-100,000 interrupts may have been a correctly-functioning
- * device sharing an IRQ with the failing one)
- *
- * Called under desc->lock
- */
-static void note_interrupt(int irq, irq_desc_t *desc, irqreturn_t action_ret)
-{
- if (action_ret != IRQ_HANDLED) {
- desc->irqs_unhandled++;
- if (action_ret != IRQ_NONE)
- report_bad_irq(irq, desc, action_ret);
- }
-
- desc->irq_count++;
- if (desc->irq_count < 100000)
- return;
-
- desc->irq_count = 0;
- if (desc->irqs_unhandled > 99900) {
- /*
- * The interrupt is stuck
- */
- __report_bad_irq(irq, desc, action_ret);
- /*
- * Now kill the IRQ
- */
- printk(KERN_EMERG "Disabling IRQ #%d\n", irq);
- desc->status |= IRQ_DISABLED;
- desc->handler->disable(irq);
- }
- desc->irqs_unhandled = 0;
-}
-
-/*
- * Generic enable/disable code: this just calls
- * down into the PIC-specific version for the actual
- * hardware disable after having gotten the irq
- * controller lock.
- */
-
-/**
- * disable_irq_nosync - disable an irq without waiting
- * @irq: Interrupt to disable
- *
- * Disable the selected interrupt line. Disables of an interrupt
- * stack. Unlike disable_irq(), this function does not ensure existing
- * instances of the IRQ handler have completed before returning.
- *
- * This function may be called from IRQ context.
- */
-
-void inline disable_irq_nosync(unsigned int irq)
-{
- irq_desc_t *desc = irq_desc + irq;
- unsigned long flags;
-
- spin_lock_irqsave(&desc->lock, flags);
- if (!desc->depth++) {
- desc->status |= IRQ_DISABLED;
- desc->handler->disable(irq);
- }
- spin_unlock_irqrestore(&desc->lock, flags);
-}
-
-/**
- * disable_irq - disable an irq and wait for completion
- * @irq: Interrupt to disable
- *
- * Disable the selected interrupt line. Disables of an interrupt
- * stack. That is for two disables you need two enables. This
- * function waits for any pending IRQ handlers for this interrupt
- * to complete before returning. If you use this function while
- * holding a resource the IRQ handler may need you will deadlock.
- *
- * This function may be called - with care - from IRQ context.
- */
-
-void disable_irq(unsigned int irq)
-{
- disable_irq_nosync(irq);
- synchronize_irq(irq);
-}
-
-/**
- * enable_irq - enable interrupt handling on an irq
- * @irq: Interrupt to enable
- *
- * Re-enables the processing of interrupts on this IRQ line
- * providing no disable_irq calls are now in effect.
- *
- * This function may be called from IRQ context.
- */
-
-void enable_irq(unsigned int irq)
-{
- irq_desc_t *desc = irq_desc + irq;
- unsigned long flags;
-
- spin_lock_irqsave(&desc->lock, flags);
- switch (desc->depth) {
- case 1: {
- unsigned int status = desc->status & ~IRQ_DISABLED;
- desc->status = status;
- if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
- desc->status = status | IRQ_REPLAY;
- hw_resend_irq(desc->handler,irq);
- }
- desc->handler->enable(irq);
- /* fall-through */
- }
- default:
- desc->depth--;
- break;
- case 0:
- printk("enable_irq(%u) unbalanced from %p\n", irq,
- __builtin_return_address(0));
- }
- spin_unlock_irqrestore(&desc->lock, flags);
-}
-
-/*
- * do_IRQ handles all normal device IRQ's (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
-{
- /*
- * We ack quickly, we don't want the irq controller
- * thinking we're snobs just because some other CPU has
- * disabled global interrupts (we have already done the
- * INT_ACK cycles, it's too late to try to pretend to the
- * controller that we aren't taking the interrupt).
- *
- * 0 return value means that this irq is already being
- * handled by some other CPU. (or is disabled)
- */
- int cpu = smp_processor_id();
- irq_desc_t *desc = irq_desc + irq;
- struct irqaction * action;
- unsigned int status;
-
- irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
- spin_lock(&desc->lock);
- desc->handler->ack(irq);
- /*
- REPLAY is when Linux resends an IRQ that was dropped earlier
- WAITING is used by probe to mark irqs that are being tested
- */
- status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
- status |= IRQ_PENDING; /* we _want_ to handle it */
-
- /*
- * If the IRQ is disabled for whatever reason, we cannot
- * use the action we have.
- */
- action = NULL;
- if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
- action = desc->action;
- status &= ~IRQ_PENDING; /* we commit to handling */
- status |= IRQ_INPROGRESS; /* we are handling it */
- }
- desc->status = status;
-
- /*
- * If there is no IRQ handler or it was disabled, exit early.
- Since we set PENDING, if another processor is handling
- a different instance of this same irq, the other processor
- will take care of it.
- */
- if (unlikely(!action))
- goto out;
-
- /*
- * Edge triggered interrupts need to remember
- * pending events.
- * This applies to any hw interrupts that allow a second
- * instance of the same irq to arrive while we are in do_IRQ
- * or in the handler. But the code here only handles the _second_
- * instance of the irq, not the third or fourth. So it is mostly
- * useful for irq hardware that does not mask cleanly in an
- * SMP environment.
- */
- for (;;) {
- irqreturn_t action_ret;
-
- spin_unlock(&desc->lock);
- action_ret = handle_IRQ_event(irq, ®s, action);
- spin_lock(&desc->lock);
- if (!noirqdebug)
- note_interrupt(irq, desc, action_ret);
- if (likely(!(desc->status & IRQ_PENDING)))
- break;
- desc->status &= ~IRQ_PENDING;
- }
- desc->status &= ~IRQ_INPROGRESS;
-
-out:
- /*
- * The ->end() handler has to deal with interrupts which got
- * disabled while the handler was running.
- */
- desc->handler->end(irq);
- spin_unlock(&desc->lock);
-
- irq_exit();
-
- return 1;
-}
-
-/**
- * request_irq - allocate an interrupt line
- * @irq: Interrupt line to allocate
- * @handler: Function to be called when the IRQ occurs
- * @irqflags: Interrupt type flags
- * @devname: An ascii name for the claiming device
- * @dev_id: A cookie passed back to the handler function
- *
- * This call allocates interrupt resources and enables the
- * interrupt line and IRQ handling. From the point this
- * call is made your handler function may be invoked. Since
- * your handler function must clear any interrupt the board
- * raises, you must take care both to initialise your hardware
- * and to set up the interrupt handler in the right order.
- *
- * Dev_id must be globally unique. Normally the address of the
- * device data structure is used as the cookie. Since the handler
- * receives this value it makes sense to use it.
- *
- * If your interrupt is shared you must pass a non NULL dev_id
- * as this is required when freeing the interrupt.
- *
- * Flags:
- *
- * SA_SHIRQ Interrupt is shared
- *
- * SA_INTERRUPT Disable local interrupts while processing
- *
- * SA_SAMPLE_RANDOM The interrupt can be used for entropy
- *
- */
-
-int request_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags,
- const char * devname,
- void *dev_id)
-{
- int retval;
- struct irqaction * action;
-
-#if 1
- /*
- * Sanity-check: shared interrupts should REALLY pass in
- * a real dev-ID, otherwise we'll have trouble later trying
- * to figure out which interrupt is which (messes up the
- * interrupt freeing logic etc).
- */
- if (irqflags & SA_SHIRQ) {
- if (!dev_id)
- printk("Bad boy: %s (at 0x%x) called us without a dev_id!\n", devname, (&irq)[-1]);
- }
-#endif
-
- if (irq >= NR_IRQS)
- return -EINVAL;
- if (!handler)
- return -EINVAL;
-
- action = (struct irqaction *)
- kmalloc(sizeof(struct irqaction), GFP_ATOMIC);
- if (!action)
- return -ENOMEM;
-
- action->handler = handler;
- action->flags = irqflags;
- action->mask = 0;
- action->name = devname;
- action->next = NULL;
- action->dev_id = dev_id;
-
- retval = setup_irq(irq, action);
- if (retval)
- kfree(action);
- return retval;
-}
-
-/**
- * free_irq - free an interrupt
- * @irq: Interrupt line to free
- * @dev_id: Device identity to free
- *
- * Remove an interrupt handler. The handler is removed and if the
- * interrupt line is no longer in use by any driver it is disabled.
- * On a shared IRQ the caller must ensure the interrupt is disabled
- * on the card it drives before calling this function. The function
- * does not return until any executing interrupts for this IRQ
- * have completed.
- *
- * This function must not be called from interrupt context.
- */
-
-void free_irq(unsigned int irq, void *dev_id)
-{
- irq_desc_t *desc;
- struct irqaction **p;
- unsigned long flags;
-
- if (irq >= NR_IRQS)
- return;
-
- desc = irq_desc + irq;
- spin_lock_irqsave(&desc->lock,flags);
- p = &desc->action;
- for (;;) {
- struct irqaction * action = *p;
- if (action) {
- struct irqaction **pp = p;
- p = &action->next;
- if (action->dev_id != dev_id)
- continue;
-
- /* Found it - now remove it from the list of entries */
- *pp = action->next;
- if (!desc->action) {
- desc->status |= IRQ_DISABLED;
- desc->handler->shutdown(irq);
- }
- spin_unlock_irqrestore(&desc->lock,flags);
-
- /* Wait to make sure it's not being used on another CPU */
- synchronize_irq(irq);
- kfree(action);
- return;
- }
- printk("Trying to free free IRQ%d\n",irq);
- spin_unlock_irqrestore(&desc->lock,flags);
- return;
- }
-}
-
-/*
- * IRQ autodetection code..
- *
- * This depends on the fact that any interrupt that
- * comes in on to an unassigned handler will get stuck
- * with "IRQ_WAITING" cleared and the interrupt
- * disabled.
- */
-
-static DECLARE_MUTEX(probe_sem);
-
-/**
- * probe_irq_on - begin an interrupt autodetect
- *
- * Commence probing for an interrupt. The interrupts are scanned
- * and a mask of potential interrupt lines is returned.
- *
- */
-
-unsigned long probe_irq_on(void)
-{
- unsigned int i;
- irq_desc_t *desc;
- unsigned long val;
- unsigned long delay;
-
- down(&probe_sem);
- /*
- * something may have generated an irq long ago and we want to
- * flush such a longstanding irq before considering it as spurious.
- */
- for (i = NR_IRQS-1; i > 0; i--) {
- desc = irq_desc + i;
-
- spin_lock_irq(&desc->lock);
- if (!irq_desc[i].action)
- irq_desc[i].handler->startup(i);
- spin_unlock_irq(&desc->lock);
- }
-
- /* Wait for longstanding interrupts to trigger. */
- for (delay = jiffies + HZ/50; time_after(delay, jiffies); )
- /* about 20ms delay */ barrier();
-
- /*
- * enable any unassigned irqs
- * (we must startup again here because if a longstanding irq
- * happened in the previous stage, it may have masked itself)
- */
- for (i = NR_IRQS-1; i > 0; i--) {
- desc = irq_desc + i;
-
- spin_lock_irq(&desc->lock);
- if (!desc->action) {
- desc->status |= IRQ_AUTODETECT | IRQ_WAITING;
- if (desc->handler->startup(i))
- desc->status |= IRQ_PENDING;
- }
- spin_unlock_irq(&desc->lock);
- }
-
- /*
- * Wait for spurious interrupts to trigger
- */
- for (delay = jiffies + HZ/10; time_after(delay, jiffies); )
- /* about 100ms delay */ barrier();
-
- /*
- * Now filter out any obviously spurious interrupts
- */
- val = 0;
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc_t *desc = irq_desc + i;
- unsigned int status;
-
- spin_lock_irq(&desc->lock);
- status = desc->status;
-
- if (status & IRQ_AUTODETECT) {
- /* It triggered already - consider it spurious. */
- if (!(status & IRQ_WAITING)) {
- desc->status = status & ~IRQ_AUTODETECT;
- desc->handler->shutdown(i);
- } else
- if (i < 32)
- val |= 1 << i;
- }
- spin_unlock_irq(&desc->lock);
- }
-
- return val;
-}
-
-/*
- * Return a mask of triggered interrupts (this
- * can handle only legacy ISA interrupts).
- */
-
-/**
- * probe_irq_mask - scan a bitmap of interrupt lines
- * @val: mask of interrupts to consider
- *
- * Scan the ISA bus interrupt lines and return a bitmap of
- * active interrupts. The interrupt probe logic state is then
- * returned to its previous value.
- *
- * Note: we need to scan all the irq's even though we will
- * only return ISA irq numbers - just so that we reset them
- * all to a known state.
- */
-unsigned int probe_irq_mask(unsigned long val)
-{
- int i;
- unsigned int mask;
-
- mask = 0;
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc_t *desc = irq_desc + i;
- unsigned int status;
-
- spin_lock_irq(&desc->lock);
- status = desc->status;
-
- if (status & IRQ_AUTODETECT) {
- if (i < 16 && !(status & IRQ_WAITING))
- mask |= 1 << i;
-
- desc->status = status & ~IRQ_AUTODETECT;
- desc->handler->shutdown(i);
- }
- spin_unlock_irq(&desc->lock);
- }
- up(&probe_sem);
-
- return mask & val;
-}
-
-/*
- * Return the one interrupt that triggered (this can
- * handle any interrupt source).
- */
-
-/**
- * probe_irq_off - end an interrupt autodetect
- * @val: mask of potential interrupts (unused)
- *
- * Scans the unused interrupt lines and returns the line which
- * appears to have triggered the interrupt. If no interrupt was
- * found then zero is returned. If more than one interrupt is
- * found then minus the first candidate is returned to indicate
- * their is doubt.
- *
- * The interrupt probe logic state is returned to its previous
- * value.
- *
- * BUGS: When used in a module (which arguably shouldnt happen)
- * nothing prevents two IRQ probe callers from overlapping. The
- * results of this are non-optimal.
- */
-
-int probe_irq_off(unsigned long val)
-{
- int i, irq_found, nr_irqs;
-
- nr_irqs = 0;
- irq_found = 0;
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc_t *desc = irq_desc + i;
- unsigned int status;
-
- spin_lock_irq(&desc->lock);
- status = desc->status;
-
- if (status & IRQ_AUTODETECT) {
- if (!(status & IRQ_WAITING)) {
- if (!nr_irqs)
- irq_found = i;
- nr_irqs++;
- }
- desc->status = status & ~IRQ_AUTODETECT;
- desc->handler->shutdown(i);
- }
- spin_unlock_irq(&desc->lock);
- }
- up(&probe_sem);
-
- if (nr_irqs > 1)
- irq_found = -irq_found;
- return irq_found;
-}
-
-/* this was setup_x86_irq but it seems pretty generic */
-int setup_irq(unsigned int irq, struct irqaction * new)
-{
- int shared = 0;
- unsigned long flags;
- struct irqaction *old, **p;
- irq_desc_t *desc = irq_desc + irq;
-
- /*
- * Some drivers like serial.c use request_irq() heavily,
- * so we have to be careful not to interfere with a
- * running system.
- */
- if (new->flags & SA_SAMPLE_RANDOM) {
- /*
- * This function might sleep, we want to call it first,
- * outside of the atomic block.
- * Yes, this might clear the entropy pool if the wrong
- * driver is attempted to be loaded, without actually
- * installing a new handler, but is this really a problem,
- * only the sysadmin is able to do this.
- */
- rand_initialize_irq(irq);
- }
-
- /*
- * The following block of code has to be executed atomically
- */
- spin_lock_irqsave(&desc->lock,flags);
- p = &desc->action;
- if ((old = *p) != NULL) {
- /* Can't share interrupts unless both agree to */
- if (!(old->flags & new->flags & SA_SHIRQ)) {
- spin_unlock_irqrestore(&desc->lock,flags);
- return -EBUSY;
- }
-
- /* add new interrupt at end of irq queue */
- do {
- p = &old->next;
- old = *p;
- } while (old);
- shared = 1;
- }
-
- *p = new;
-
- if (!shared) {
- desc->depth = 0;
- desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
- desc->handler->startup(irq);
- }
- spin_unlock_irqrestore(&desc->lock,flags);
-
- register_irq_proc(irq);
- return 0;
-}
-
-void __init init_generic_irq(void)
-{
- int i;
-
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = NULL;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &no_irq_type;
- }
-}
-
-EXPORT_SYMBOL(disable_irq_nosync);
-EXPORT_SYMBOL(disable_irq);
-EXPORT_SYMBOL(enable_irq);
-EXPORT_SYMBOL(probe_irq_mask);
-
-static struct proc_dir_entry * root_irq_dir;
-static struct proc_dir_entry * irq_dir [NR_IRQS];
-
-#define HEX_DIGITS 8
-
-static unsigned int parse_hex_value (const char *buffer,
- unsigned long count, unsigned long *ret)
-{
- unsigned char hexnum [HEX_DIGITS];
- unsigned long value;
- int i;
-
- if (!count)
- return -EINVAL;
- if (count > HEX_DIGITS)
- count = HEX_DIGITS;
- if (copy_from_user(hexnum, buffer, count))
- return -EFAULT;
-
- /*
- * Parse the first 8 characters as a hex string, any non-hex char
- * is end-of-string. '00e1', 'e1', '00E1', 'E1' are all the same.
- */
- value = 0;
-
- for (i = 0; i < count; i++) {
- unsigned int c = hexnum[i];
-
- switch (c) {
- case '0' ... '9': c -= '0'; break;
- case 'a' ... 'f': c -= 'a'-10; break;
- case 'A' ... 'F': c -= 'A'-10; break;
- default:
- goto out;
- }
- value = (value << 4) | c;
- }
-out:
- *ret = value;
- return 0;
-}
-
-#ifdef CONFIG_SMP
-
-static struct proc_dir_entry * smp_affinity_entry [NR_IRQS];
-
-static unsigned long irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
-static int irq_affinity_read_proc (char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- if (count < HEX_DIGITS+1)
- return -EINVAL;
- return sprintf (page, "%08lx\n", irq_affinity[(long)data]);
-}
-
-static int irq_affinity_write_proc (struct file *file, const char *buffer,
- unsigned long count, void *data)
-{
- int irq = (long) data, full_count = count, err;
- unsigned long new_value;
-
- if (!irq_desc[irq].handler->set_affinity)
- return -EIO;
-
- err = parse_hex_value(buffer, count, &new_value);
-
- /*
- * Do not allow disabling IRQs completely - it's a too easy
- * way to make the system unusable accidentally :-) At least
- * one online CPU still has to be targeted.
- */
- if (!(new_value & cpu_online_map))
- return -EINVAL;
-
- irq_affinity[irq] = new_value;
- irq_desc[irq].handler->set_affinity(irq, new_value);
-
- return full_count;
-}
-
-#endif
-
-static int prof_cpu_mask_read_proc (char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- unsigned long *mask = (unsigned long *) data;
- if (count < HEX_DIGITS+1)
- return -EINVAL;
- return sprintf (page, "%08lx\n", *mask);
-}
-
-static int prof_cpu_mask_write_proc (struct file *file, const char *buffer,
- unsigned long count, void *data)
-{
- unsigned long *mask = (unsigned long *) data, full_count = count, err;
- unsigned long new_value;
-
- err = parse_hex_value(buffer, count, &new_value);
- if (err)
- return err;
-
- *mask = new_value;
- return full_count;
-}
-
-#define MAX_NAMELEN 10
-
-static void register_irq_proc (unsigned int irq)
-{
- char name [MAX_NAMELEN];
-
- if (!root_irq_dir || (irq_desc[irq].handler == &no_irq_type) ||
- irq_dir[irq])
- return;
-
- memset(name, 0, MAX_NAMELEN);
- sprintf(name, "%d", irq);
-
- /* create /proc/irq/1234 */
- irq_dir[irq] = proc_mkdir(name, root_irq_dir);
-
-#ifdef CONFIG_SMP
- {
- struct proc_dir_entry *entry;
-
- /* create /proc/irq/1234/smp_affinity */
- entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]);
-
- if (entry) {
- entry->nlink = 1;
- entry->data = (void *)(long)irq;
- entry->read_proc = irq_affinity_read_proc;
- entry->write_proc = irq_affinity_write_proc;
- }
-
- smp_affinity_entry[irq] = entry;
- }
-#endif
-}
-
-unsigned long prof_cpu_mask = -1;
-
-void init_irq_proc (void)
-{
- struct proc_dir_entry *entry;
- int i;
-
- /* create /proc/irq */
- root_irq_dir = proc_mkdir("irq", 0);
-
- /* create /proc/irq/prof_cpu_mask */
- entry = create_proc_entry("prof_cpu_mask", 0600, root_irq_dir);
-
- if (!entry)
- return;
-
- entry->nlink = 1;
- entry->data = (void *)&prof_cpu_mask;
- entry->read_proc = prof_cpu_mask_read_proc;
- entry->write_proc = prof_cpu_mask_write_proc;
-
- /*
- * Create entries for all existing IRQs.
- */
- for (i = 0; i < NR_IRQS; i++)
- register_irq_proc(i);
-}
diff -Nru a/arch/mips64/kernel/irq_cpu.c b/arch/mips64/kernel/irq_cpu.c
--- a/arch/mips64/kernel/irq_cpu.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,116 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * Copyright (C) 2001 Ralf Baechle
- *
- * This file define the irq handler for MIPS CPU interrupts.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * Almost all MIPS CPUs define 8 interrupt sources. They are typically
- * level triggered (i.e., cannot be cleared from CPU; must be cleared from
- * device). The first two are software interrupts which we don't really
- * use or support. The last one is usually cpu timer interrupt if a counter
- * register is present.
- *
- * Don't even think about using this on SMP. You have been warned.
- *
- * This file exports one global function:
- * mips_cpu_irq_init(u32 irq_base);
- */
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-static int mips_cpu_irq_base;
-
-static inline void unmask_mips_irq(unsigned int irq)
-{
- clear_c0_cause(0x100 << (irq - mips_cpu_irq_base));
- set_c0_status(0x100 << (irq - mips_cpu_irq_base));
-}
-
-static inline void mask_mips_irq(unsigned int irq)
-{
- clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
-}
-
-static inline void mips_cpu_irq_enable(unsigned int irq)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- unmask_mips_irq(irq);
- local_irq_restore(flags);
-}
-
-static void mips_cpu_irq_disable(unsigned int irq)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- mask_mips_irq(irq);
- local_irq_restore(flags);
-}
-
-static unsigned int mips_cpu_irq_startup(unsigned int irq)
-{
- mips_cpu_irq_enable(irq);
-
- return 0;
-}
-
-#define mips_cpu_irq_shutdown mips_cpu_irq_disable
-
-/*
- * While we ack the interrupt interrupts are disabled and thus we don't need
- * to deal with concurrency issues. Same for mips_cpu_irq_end.
- */
-static void mips_cpu_irq_ack(unsigned int irq)
-{
- /* Only necessary for soft interrupts */
- clear_c0_cause(1 << (irq - mips_cpu_irq_base + 8));
-
- mask_mips_irq(irq);
-}
-
-static void mips_cpu_irq_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- unmask_mips_irq(irq);
-}
-
-static hw_irq_controller mips_cpu_irq_controller = {
- "CPU_irq",
- mips_cpu_irq_startup,
- mips_cpu_irq_shutdown,
- mips_cpu_irq_enable,
- mips_cpu_irq_disable,
- mips_cpu_irq_ack,
- mips_cpu_irq_end,
- NULL /* no affinity stuff for UP */
-};
-
-
-void mips_cpu_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + 8; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = NULL;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &mips_cpu_irq_controller;
- }
-
- mips_cpu_irq_base = irq_base;
-}
diff -Nru a/arch/mips64/kernel/linux32.c b/arch/mips64/kernel/linux32.c
--- a/arch/mips64/kernel/linux32.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1845 +0,0 @@
-/*
- * Conversion between 32-bit and 64-bit native system calls.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * sys32_execve from ia64/ia32 code, Feb 2000, Kanoj Sarcar (kanoj@sgi.com)
- */
-#include <linux/config.h>
-#include <linux/mm.h>
-#include <linux/errno.h>
-#include <linux/file.h>
-#include <linux/smp_lock.h>
-#include <linux/highuid.h>
-#include <linux/dirent.h>
-#include <linux/resource.h>
-#include <linux/highmem.h>
-#include <linux/time.h>
-#include <linux/times.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/skbuff.h>
-#include <linux/filter.h>
-#include <linux/shm.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/icmpv6.h>
-#include <linux/sysctl.h>
-#include <linux/utime.h>
-#include <linux/utsname.h>
-#include <linux/personality.h>
-#include <linux/timex.h>
-#include <linux/dnotify.h>
-#include <linux/module.h>
-#include <linux/binfmts.h>
-#include <linux/security.h>
-#include <linux/compat.h>
-#include <linux/vfs.h>
-
-#include <net/sock.h>
-#include <net/scm.h>
-
-#include <asm/ipc.h>
-#include <asm/uaccess.h>
-#include <asm/mmu_context.h>
-#include <asm/mman.h>
-
-/* Use this to get at 32-bit user passed pointers. */
-/* A() macro should be used for places where you e.g.
- have some internal variable u32 and just want to get
- rid of a compiler warning. AA() has to be used in
- places where you want to convert a function argument
- to 32bit pointer or when you e.g. access pt_regs
- structure and want to consider 32bit registers only.
- */
-#define A(__x) ((unsigned long)(__x))
-#define AA(__x) ((unsigned long)((int)__x))
-
-#ifdef __MIPSEB__
-#define merge_64(r1,r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL))
-#endif
-#ifdef __MIPSEL__
-#define merge_64(r1,r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
-#endif
-
-/*
- * Revalidate the inode. This is required for proper NFS attribute caching.
- */
-
-int cp_compat_stat(struct kstat *stat, struct compat_stat *statbuf)
-{
- struct compat_stat tmp;
-
- memset(&tmp, 0, sizeof(tmp));
- tmp.st_dev = stat->dev;
- tmp.st_ino = stat->ino;
- tmp.st_mode = stat->mode;
- tmp.st_nlink = stat->nlink;
- SET_STAT_UID(tmp, stat->uid);
- SET_STAT_GID(tmp, stat->gid);
- tmp.st_rdev = stat->rdev;
- tmp.st_size = stat->size;
- tmp.st_atime = stat->atime.tv_sec;
- tmp.st_mtime = stat->mtime.tv_sec;
- tmp.st_ctime = stat->ctime.tv_sec;
-#ifdef STAT_HAVE_NSEC
- tmp.st_atime_nsec = stat->atime.tv_nsec;
- tmp.st_mtime_nsec = stat->mtime.tv_nsec;
- tmp.st_ctime_nsec = stat->ctime.tv_nsec;
-#endif
- tmp.st_blocks = stat->blocks;
- tmp.st_blksize = stat->blksize;
- return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0;
-}
-
-asmlinkage unsigned long
-sys32_mmap2(unsigned long addr, size_t len, unsigned long prot,
- unsigned long flags, unsigned long fd, unsigned long pgoff)
-{
- struct file * file = NULL;
- unsigned long error;
-
- error = -EINVAL;
- if (!(flags & MAP_ANONYMOUS)) {
- error = -EBADF;
- file = fget(fd);
- if (!file)
- goto out;
- }
- flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
- down_write(¤t->mm->mmap_sem);
- error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
- up_write(¤t->mm->mmap_sem);
- if (file)
- fput(file);
-
-out:
- return error;
-}
-
-
-asmlinkage long sys_truncate(const char * path, unsigned long length);
-
-asmlinkage int sys_truncate64(const char *path, unsigned int high,
- unsigned int low)
-{
- if ((int)high < 0)
- return -EINVAL;
- return sys_truncate(path, ((long) high << 32) | low);
-}
-
-asmlinkage long sys_ftruncate(unsigned int fd, unsigned long length);
-
-asmlinkage int sys_ftruncate64(unsigned int fd, unsigned int high,
- unsigned int low)
-{
- if ((int)high < 0)
- return -EINVAL;
- return sys_ftruncate(fd, ((long) high << 32) | low);
-}
-
-/*
- * count32() counts the number of arguments/envelopes
- */
-static int count32(u32 * argv, int max)
-{
- int i = 0;
-
- if (argv != NULL) {
- for (;;) {
- u32 p; int error;
-
- error = get_user(p,argv);
- if (error)
- return error;
- if (!p)
- break;
- argv++;
- if (++i > max)
- return -E2BIG;
- }
- }
- return i;
-}
-
-
-/*
- * 'copy_strings32()' copies argument/envelope strings from user
- * memory to free pages in kernel mem. These are in a format ready
- * to be put directly into the top of new user memory.
- */
-int copy_strings32(int argc, u32 * argv, struct linux_binprm *bprm)
-{
- while (argc-- > 0) {
- u32 str;
- int len;
- unsigned long pos;
-
- if (get_user(str, argv+argc) || !str ||
- !(len = strnlen_user((char *)A(str), bprm->p)))
- return -EFAULT;
- if (bprm->p < len)
- return -E2BIG;
-
- bprm->p -= len;
- /* XXX: add architecture specific overflow check here. */
-
- pos = bprm->p;
- while (len > 0) {
- char *kaddr;
- int i, new, err;
- struct page *page;
- int offset, bytes_to_copy;
-
- offset = pos % PAGE_SIZE;
- i = pos/PAGE_SIZE;
- page = bprm->page[i];
- new = 0;
- if (!page) {
- page = alloc_page(GFP_HIGHUSER);
- bprm->page[i] = page;
- if (!page)
- return -ENOMEM;
- new = 1;
- }
- kaddr = kmap(page);
-
- if (new && offset)
- memset(kaddr, 0, offset);
- bytes_to_copy = PAGE_SIZE - offset;
- if (bytes_to_copy > len) {
- bytes_to_copy = len;
- if (new)
- memset(kaddr+offset+len, 0,
- PAGE_SIZE-offset-len);
- }
- err = copy_from_user(kaddr + offset, (char *)A(str),
- bytes_to_copy);
- flush_dcache_page(page);
- kunmap(page);
-
- if (err)
- return -EFAULT;
-
- pos += bytes_to_copy;
- str += bytes_to_copy;
- len -= bytes_to_copy;
- }
- }
- return 0;
-}
-
-/*
- * sys32_execve() executes a new program.
- */
-static inline int
-do_execve32(char * filename, u32 * argv, u32 * envp, struct pt_regs * regs)
-{
- struct linux_binprm bprm;
- struct file * file;
- int retval;
- int i;
-
- file = open_exec(filename);
-
- retval = PTR_ERR(file);
- if (IS_ERR(file))
- return retval;
-
- bprm.p = PAGE_SIZE*MAX_ARG_PAGES-sizeof(void *);
- memset(bprm.page, 0, MAX_ARG_PAGES * sizeof(bprm.page[0]));
-
- bprm.file = file;
- bprm.filename = filename;
- bprm.sh_bang = 0;
- bprm.loader = 0;
- bprm.exec = 0;
- bprm.security = NULL;
- bprm.mm = mm_alloc();
- retval = -ENOMEM;
- if (!bprm.mm)
- goto out_file;
-
- retval = init_new_context(current, bprm.mm);
- if (retval < 0)
- goto out_mm;
-
- bprm.argc = count32(argv, bprm.p / sizeof(u32));
- if ((retval = bprm.argc) < 0)
- goto out_mm;
-
- bprm.envc = count32(envp, bprm.p / sizeof(u32));
- if ((retval = bprm.envc) < 0)
- goto out_mm;
-
- if ((retval = security_bprm_alloc(&bprm)))
- goto out;
-
- retval = prepare_binprm(&bprm);
- if (retval < 0)
- goto out;
-
- retval = copy_strings_kernel(1, &bprm.filename, &bprm);
- if (retval < 0)
- goto out;
-
- bprm.exec = bprm.p;
- retval = copy_strings32(bprm.envc, envp, &bprm);
- if (retval < 0)
- goto out;
-
- retval = copy_strings32(bprm.argc, argv, &bprm);
- if (retval < 0)
- goto out;
-
- retval = search_binary_handler(&bprm, regs);
- if (retval >= 0) {
- /* execve success */
- security_bprm_free(&bprm);
- return retval;
- }
-
-out:
- /* Something went wrong, return the inode and free the argument pages*/
- for (i = 0 ; i < MAX_ARG_PAGES ; i++) {
- struct page * page = bprm.page[i];
- if (page)
- __free_page(page);
- }
-
- if (bprm.security)
- security_bprm_free(&bprm);
-
-out_mm:
- mmdrop(bprm.mm);
-
-out_file:
- if (bprm.file) {
- allow_write_access(bprm.file);
- fput(bprm.file);
- }
- return retval;
-}
-
-/*
- * sys_execve() executes a new program.
- */
-asmlinkage int sys32_execve(abi64_no_regargs, struct pt_regs regs)
-{
- int error;
- char * filename;
-
- filename = getname((char *) (long)regs.regs[4]);
- printk("Executing: %s\n", filename);
- error = PTR_ERR(filename);
- if (IS_ERR(filename))
- goto out;
- error = do_execve32(filename, (u32 *) (long)regs.regs[5],
- (u32 *) (long)regs.regs[6], ®s);
- putname(filename);
-
-out:
- return error;
-}
-
-struct dirent32 {
- unsigned int d_ino;
- unsigned int d_off;
- unsigned short d_reclen;
- char d_name[NAME_MAX + 1];
-};
-
-static void
-xlate_dirent(void *dirent64, void *dirent32, long n)
-{
- long off;
- struct dirent *dirp;
- struct dirent32 *dirp32;
-
- off = 0;
- while (off < n) {
- dirp = (struct dirent *)(dirent64 + off);
- dirp32 = (struct dirent32 *)(dirent32 + off);
- off += dirp->d_reclen;
- dirp32->d_ino = dirp->d_ino;
- dirp32->d_off = (unsigned int)dirp->d_off;
- dirp32->d_reclen = dirp->d_reclen;
- strncpy(dirp32->d_name, dirp->d_name, dirp->d_reclen - ((3 * 4) + 2));
- }
- return;
-}
-
-asmlinkage long sys_getdents(unsigned int fd, void * dirent, unsigned int count);
-
-asmlinkage long
-sys32_getdents(unsigned int fd, void * dirent32, unsigned int count)
-{
- long n;
- void *dirent64;
-
- dirent64 = (void *)((unsigned long)(dirent32 + (sizeof(long) - 1)) & ~(sizeof(long) - 1));
- if ((n = sys_getdents(fd, dirent64, count - (dirent64 - dirent32))) < 0)
- return(n);
- xlate_dirent(dirent64, dirent32, n);
- return(n);
-}
-
-asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count);
-
-asmlinkage int
-sys32_readdir(unsigned int fd, void * dirent32, unsigned int count)
-{
- int n;
- struct dirent dirent64;
-
- if ((n = old_readdir(fd, &dirent64, count)) < 0)
- return(n);
- xlate_dirent(&dirent64, dirent32, dirent64.d_reclen);
- return(n);
-}
-
-struct rusage32 {
- struct compat_timeval ru_utime;
- struct compat_timeval ru_stime;
- int ru_maxrss;
- int ru_ixrss;
- int ru_idrss;
- int ru_isrss;
- int ru_minflt;
- int ru_majflt;
- int ru_nswap;
- int ru_inblock;
- int ru_oublock;
- int ru_msgsnd;
- int ru_msgrcv;
- int ru_nsignals;
- int ru_nvcsw;
- int ru_nivcsw;
-};
-
-static int
-put_rusage (struct rusage32 *ru, struct rusage *r)
-{
- int err;
-
- if (verify_area(VERIFY_WRITE, ru, sizeof *ru))
- return -EFAULT;
-
- err = __put_user (r->ru_utime.tv_sec, &ru->ru_utime.tv_sec);
- err |= __put_user (r->ru_utime.tv_usec, &ru->ru_utime.tv_usec);
- err |= __put_user (r->ru_stime.tv_sec, &ru->ru_stime.tv_sec);
- err |= __put_user (r->ru_stime.tv_usec, &ru->ru_stime.tv_usec);
- err |= __put_user (r->ru_maxrss, &ru->ru_maxrss);
- err |= __put_user (r->ru_ixrss, &ru->ru_ixrss);
- err |= __put_user (r->ru_idrss, &ru->ru_idrss);
- err |= __put_user (r->ru_isrss, &ru->ru_isrss);
- err |= __put_user (r->ru_minflt, &ru->ru_minflt);
- err |= __put_user (r->ru_majflt, &ru->ru_majflt);
- err |= __put_user (r->ru_nswap, &ru->ru_nswap);
- err |= __put_user (r->ru_inblock, &ru->ru_inblock);
- err |= __put_user (r->ru_oublock, &ru->ru_oublock);
- err |= __put_user (r->ru_msgsnd, &ru->ru_msgsnd);
- err |= __put_user (r->ru_msgrcv, &ru->ru_msgrcv);
- err |= __put_user (r->ru_nsignals, &ru->ru_nsignals);
- err |= __put_user (r->ru_nvcsw, &ru->ru_nvcsw);
- err |= __put_user (r->ru_nivcsw, &ru->ru_nivcsw);
-
- return err;
-}
-
-asmlinkage int
-sys32_wait4(__kernel_pid_t32 pid, unsigned int * stat_addr, int options,
- struct rusage32 * ru)
-{
- if (!ru)
- return sys_wait4(pid, stat_addr, options, NULL);
- else {
- struct rusage r;
- int ret;
- unsigned int status;
- mm_segment_t old_fs = get_fs();
-
- set_fs(KERNEL_DS);
- ret = sys_wait4(pid, stat_addr ? &status : NULL, options, &r);
- set_fs(old_fs);
- if (put_rusage (ru, &r)) return -EFAULT;
- if (stat_addr && put_user (status, stat_addr))
- return -EFAULT;
- return ret;
- }
-}
-
-asmlinkage int
-sys32_waitpid(__kernel_pid_t32 pid, unsigned int *stat_addr, int options)
-{
- return sys32_wait4(pid, stat_addr, options, NULL);
-}
-
-struct sysinfo32 {
- s32 uptime;
- u32 loads[3];
- u32 totalram;
- u32 freeram;
- u32 sharedram;
- u32 bufferram;
- u32 totalswap;
- u32 freeswap;
- u16 procs;
- u32 totalhigh;
- u32 freehigh;
- u32 mem_unit;
- char _f[8];
-};
-
-extern asmlinkage int sys_sysinfo(struct sysinfo *info);
-
-asmlinkage int sys32_sysinfo(struct sysinfo32 *info)
-{
- struct sysinfo s;
- int ret, err;
- mm_segment_t old_fs = get_fs ();
-
- set_fs (KERNEL_DS);
- ret = sys_sysinfo(&s);
- set_fs (old_fs);
- err = put_user (s.uptime, &info->uptime);
- err |= __put_user (s.loads[0], &info->loads[0]);
- err |= __put_user (s.loads[1], &info->loads[1]);
- err |= __put_user (s.loads[2], &info->loads[2]);
- err |= __put_user (s.totalram, &info->totalram);
- err |= __put_user (s.freeram, &info->freeram);
- err |= __put_user (s.sharedram, &info->sharedram);
- err |= __put_user (s.bufferram, &info->bufferram);
- err |= __put_user (s.totalswap, &info->totalswap);
- err |= __put_user (s.freeswap, &info->freeswap);
- err |= __put_user (s.procs, &info->procs);
- err |= __put_user (s.totalhigh, &info->totalhigh);
- err |= __put_user (s.freehigh, &info->freehigh);
- err |= __put_user (s.mem_unit, &info->mem_unit);
- if (err)
- return -EFAULT;
- return ret;
-}
-
-#define RLIM_INFINITY32 0x7fffffff
-#define RESOURCE32(x) ((x > RLIM_INFINITY32) ? RLIM_INFINITY32 : x)
-
-struct rlimit32 {
- int rlim_cur;
- int rlim_max;
-};
-
-#ifdef __MIPSEB__
-asmlinkage long sys32_truncate64(const char * path, unsigned long __dummy,
- int length_hi, int length_lo)
-#endif
-#ifdef __MIPSEL__
-asmlinkage long sys32_truncate64(const char * path, unsigned long __dummy,
- int length_lo, int length_hi)
-#endif
-{
- loff_t length;
-
- length = ((unsigned long) length_hi << 32) | (unsigned int) length_lo;
-
- return sys_truncate(path, length);
-}
-
-#ifdef __MIPSEB__
-asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy,
- int length_hi, int length_lo)
-#endif
-#ifdef __MIPSEL__
-asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy,
- int length_lo, int length_hi)
-#endif
-{
- loff_t length;
-
- length = ((unsigned long) length_hi << 32) | (unsigned int) length_lo;
-
- return sys_ftruncate(fd, length);
-}
-
-static inline long
-get_tv32(struct timeval *o, struct compat_timeval *i)
-{
- return (!access_ok(VERIFY_READ, i, sizeof(*i)) ||
- (__get_user(o->tv_sec, &i->tv_sec) |
- __get_user(o->tv_usec, &i->tv_usec)));
-}
-
-static inline long
-put_tv32(struct compat_timeval *o, struct timeval *i)
-{
- return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
- (__put_user(i->tv_sec, &o->tv_sec) |
- __put_user(i->tv_usec, &o->tv_usec)));
-}
-
-extern struct timezone sys_tz;
-
-asmlinkage int
-sys32_gettimeofday(struct compat_timeval *tv, struct timezone *tz)
-{
- if (tv) {
- struct timeval ktv;
- do_gettimeofday(&ktv);
- if (put_tv32(tv, &ktv))
- return -EFAULT;
- }
- if (tz) {
- if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
- return -EFAULT;
- }
- return 0;
-}
-
-static inline long get_ts32(struct timespec *o, struct compat_timeval *i)
-{
- long usec;
-
- if (!access_ok(VERIFY_READ, i, sizeof(*i)))
- return -EFAULT;
- if (__get_user(o->tv_sec, &i->tv_sec))
- return -EFAULT;
- if (__get_user(usec, &i->tv_usec))
- return -EFAULT;
- o->tv_nsec = usec * 1000;
- return 0;
-}
-
-asmlinkage int
-sys32_settimeofday(struct compat_timeval *tv, struct timezone *tz)
-{
- struct timespec kts;
- struct timezone ktz;
-
- if (tv) {
- if (get_ts32(&kts, tv))
- return -EFAULT;
- }
- if (tz) {
- if (copy_from_user(&ktz, tz, sizeof(ktz)))
- return -EFAULT;
- }
-
- return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
-}
-
-extern asmlinkage long sys_llseek(unsigned int fd, unsigned long offset_high,
- unsigned long offset_low, loff_t * result,
- unsigned int origin);
-
-asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high,
- unsigned int offset_low, loff_t * result,
- unsigned int origin)
-{
- return sys_llseek(fd, offset_high, offset_low, result, origin);
-}
-
-typedef ssize_t (*IO_fn_t)(struct file *, char *, size_t, loff_t *);
-
-static long
-do_readv_writev32(int type, struct file *file, const struct compat_iovec *vector,
- u32 count)
-{
- unsigned long tot_len;
- struct iovec iovstack[UIO_FASTIOV];
- struct iovec *iov=iovstack, *ivp;
- struct inode *inode;
- long retval, i;
- IO_fn_t fn;
-
- /* First get the "struct iovec" from user memory and
- * verify all the pointers
- */
- if (!count)
- return 0;
- if(verify_area(VERIFY_READ, vector, sizeof(struct compat_iovec)*count))
- return -EFAULT;
- if (count > UIO_MAXIOV)
- return -EINVAL;
- if (count > UIO_FASTIOV) {
- iov = kmalloc(count*sizeof(struct iovec), GFP_KERNEL);
- if (!iov)
- return -ENOMEM;
- }
-
- tot_len = 0;
- i = count;
- ivp = iov;
- while (i > 0) {
- u32 len;
- u32 buf;
-
- __get_user(len, &vector->iov_len);
- __get_user(buf, &vector->iov_base);
- tot_len += len;
- ivp->iov_base = (void *)A(buf);
- ivp->iov_len = (__kernel_size_t) len;
- vector++;
- ivp++;
- i--;
- }
-
- inode = file->f_dentry->d_inode;
- /* VERIFY_WRITE actually means a read, as we write to user space */
- retval = locks_verify_area((type == VERIFY_WRITE
- ? FLOCK_VERIFY_READ : FLOCK_VERIFY_WRITE),
- inode, file, file->f_pos, tot_len);
- if (retval) {
- if (iov != iovstack)
- kfree(iov);
- return retval;
- }
-
- /* Then do the actual IO. Note that sockets need to be handled
- * specially as they have atomicity guarantees and can handle
- * iovec's natively
- */
- if (inode->i_sock) {
- int err;
- err = sock_readv_writev(type, inode, file, iov, count, tot_len);
- if (iov != iovstack)
- kfree(iov);
- return err;
- }
-
- if (!file->f_op) {
- if (iov != iovstack)
- kfree(iov);
- return -EINVAL;
- }
- /* VERIFY_WRITE actually means a read, as we write to user space */
- fn = file->f_op->read;
- if (type == VERIFY_READ)
- fn = (IO_fn_t) file->f_op->write;
- ivp = iov;
- while (count > 0) {
- void * base;
- int len, nr;
-
- base = ivp->iov_base;
- len = ivp->iov_len;
- ivp++;
- count--;
- nr = fn(file, base, len, &file->f_pos);
- if (nr < 0) {
- if (retval)
- break;
- retval = nr;
- break;
- }
- retval += nr;
- if (nr != len)
- break;
- }
- if (iov != iovstack)
- kfree(iov);
-
- return retval;
-}
-
-asmlinkage long
-sys32_readv(int fd, struct compat_iovec *vector, u32 count)
-{
- struct file *file;
- ssize_t ret;
-
- ret = -EBADF;
- file = fget(fd);
- if (!file)
- goto bad_file;
- if (file->f_op && (file->f_mode & FMODE_READ) &&
- (file->f_op->readv || file->f_op->read))
- ret = do_readv_writev32(VERIFY_WRITE, file, vector, count);
-
- fput(file);
-
-bad_file:
- return ret;
-}
-
-asmlinkage long
-sys32_writev(int fd, struct compat_iovec *vector, u32 count)
-{
- struct file *file;
- ssize_t ret;
-
- ret = -EBADF;
- file = fget(fd);
- if(!file)
- goto bad_file;
- if (file->f_op && (file->f_mode & FMODE_WRITE) &&
- (file->f_op->writev || file->f_op->write))
- ret = do_readv_writev32(VERIFY_READ, file, vector, count);
- fput(file);
-
-bad_file:
- return ret;
-}
-
-/* From the Single Unix Spec: pread & pwrite act like lseek to pos + op +
- lseek back to original location. They fail just like lseek does on
- non-seekable files. */
-
-asmlinkage ssize_t sys32_pread(unsigned int fd, char * buf,
- size_t count, u32 unused, u64 a4, u64 a5)
-{
- ssize_t ret;
- struct file * file;
- ssize_t (*read)(struct file *, char *, size_t, loff_t *);
- loff_t pos;
-
- ret = -EBADF;
- file = fget(fd);
- if (!file)
- goto bad_file;
- if (!(file->f_mode & FMODE_READ))
- goto out;
- pos = merge_64(a4, a5);
- ret = locks_verify_area(FLOCK_VERIFY_READ, file->f_dentry->d_inode,
- file, pos, count);
- if (ret)
- goto out;
- ret = -EINVAL;
- if (!file->f_op || !(read = file->f_op->read))
- goto out;
- if (pos < 0)
- goto out;
- ret = read(file, buf, count, &pos);
- if (ret > 0)
- dnotify_parent(file->f_dentry, DN_ACCESS);
-out:
- fput(file);
-bad_file:
- return ret;
-}
-
-asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char * buf,
- size_t count, u32 unused, u64 a4, u64 a5)
-{
- ssize_t ret;
- struct file * file;
- ssize_t (*write)(struct file *, const char *, size_t, loff_t *);
- loff_t pos;
-
- ret = -EBADF;
- file = fget(fd);
- if (!file)
- goto bad_file;
- if (!(file->f_mode & FMODE_WRITE))
- goto out;
- pos = merge_64(a4, a5);
- ret = locks_verify_area(FLOCK_VERIFY_WRITE, file->f_dentry->d_inode,
- file, pos, count);
- if (ret)
- goto out;
- ret = -EINVAL;
- if (!file->f_op || !(write = file->f_op->write))
- goto out;
- if (pos < 0)
- goto out;
-
- ret = write(file, buf, count, &pos);
- if (ret > 0)
- dnotify_parent(file->f_dentry, DN_MODIFY);
-out:
- fput(file);
-bad_file:
- return ret;
-}
-/*
- * Ooo, nasty. We need here to frob 32-bit unsigned longs to
- * 64-bit unsigned longs.
- */
-
-static inline int
-get_fd_set32(unsigned long n, unsigned long *fdset, u32 *ufdset)
-{
- if (ufdset) {
- unsigned long odd;
-
- if (verify_area(VERIFY_WRITE, ufdset, n*sizeof(u32)))
- return -EFAULT;
-
- odd = n & 1UL;
- n &= ~1UL;
- while (n) {
- unsigned long h, l;
- __get_user(l, ufdset);
- __get_user(h, ufdset+1);
- ufdset += 2;
- *fdset++ = h << 32 | l;
- n -= 2;
- }
- if (odd)
- __get_user(*fdset, ufdset);
- } else {
- /* Tricky, must clear full unsigned long in the
- * kernel fdset at the end, this makes sure that
- * actually happens.
- */
- memset(fdset, 0, ((n + 1) & ~1)*sizeof(u32));
- }
- return 0;
-}
-
-static inline void
-set_fd_set32(unsigned long n, u32 *ufdset, unsigned long *fdset)
-{
- unsigned long odd;
-
- if (!ufdset)
- return;
-
- odd = n & 1UL;
- n &= ~1UL;
- while (n) {
- unsigned long h, l;
- l = *fdset++;
- h = l >> 32;
- __put_user(l, ufdset);
- __put_user(h, ufdset+1);
- ufdset += 2;
- n -= 2;
- }
- if (odd)
- __put_user(*fdset, ufdset);
-}
-
-/*
- * We can actually return ERESTARTSYS instead of EINTR, but I'd
- * like to be certain this leads to no problems. So I return
- * EINTR just for safety.
- *
- * Update: ERESTARTSYS breaks at least the xview clock binary, so
- * I'm trying ERESTARTNOHAND which restart only when you want to.
- */
-#define MAX_SELECT_SECONDS \
- ((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1)
-
-asmlinkage int sys32_select(int n, u32 *inp, u32 *outp, u32 *exp, struct compat_timeval *tvp)
-{
- fd_set_bits fds;
- char *bits;
- unsigned long nn;
- long timeout;
- int ret, size;
-
- timeout = MAX_SCHEDULE_TIMEOUT;
- if (tvp) {
- time_t sec, usec;
-
- if ((ret = verify_area(VERIFY_READ, tvp, sizeof(*tvp)))
- || (ret = __get_user(sec, &tvp->tv_sec))
- || (ret = __get_user(usec, &tvp->tv_usec)))
- goto out_nofds;
-
- ret = -EINVAL;
- if(sec < 0 || usec < 0)
- goto out_nofds;
-
- if ((unsigned long) sec < MAX_SELECT_SECONDS) {
- timeout = (usec + 1000000/HZ - 1) / (1000000/HZ);
- timeout += sec * (unsigned long) HZ;
- }
- }
-
- ret = -EINVAL;
- if (n < 0)
- goto out_nofds;
- if (n > current->files->max_fdset)
- n = current->files->max_fdset;
-
- /*
- * We need 6 bitmaps (in/out/ex for both incoming and outgoing),
- * since we used fdset we need to allocate memory in units of
- * long-words.
- */
- ret = -ENOMEM;
- size = FDS_BYTES(n);
- bits = kmalloc(6 * size, GFP_KERNEL);
- if (!bits)
- goto out_nofds;
- fds.in = (unsigned long *) bits;
- fds.out = (unsigned long *) (bits + size);
- fds.ex = (unsigned long *) (bits + 2*size);
- fds.res_in = (unsigned long *) (bits + 3*size);
- fds.res_out = (unsigned long *) (bits + 4*size);
- fds.res_ex = (unsigned long *) (bits + 5*size);
-
- nn = (n + 8*sizeof(u32) - 1) / (8*sizeof(u32));
- if ((ret = get_fd_set32(nn, fds.in, inp)) ||
- (ret = get_fd_set32(nn, fds.out, outp)) ||
- (ret = get_fd_set32(nn, fds.ex, exp)))
- goto out;
- zero_fd_set(n, fds.res_in);
- zero_fd_set(n, fds.res_out);
- zero_fd_set(n, fds.res_ex);
-
- ret = do_select(n, &fds, &timeout);
-
- if (tvp && !(current->personality & STICKY_TIMEOUTS)) {
- time_t sec = 0, usec = 0;
- if (timeout) {
- sec = timeout / HZ;
- usec = timeout % HZ;
- usec *= (1000000/HZ);
- }
- put_user(sec, &tvp->tv_sec);
- put_user(usec, &tvp->tv_usec);
- }
-
- if (ret < 0)
- goto out;
- if (!ret) {
- ret = -ERESTARTNOHAND;
- if (signal_pending(current))
- goto out;
- ret = 0;
- }
-
- set_fd_set32(nn, inp, fds.res_in);
- set_fd_set32(nn, outp, fds.res_out);
- set_fd_set32(nn, exp, fds.res_ex);
-
-out:
- kfree(bits);
-out_nofds:
- return ret;
-}
-
-
-
-extern asmlinkage int sys_sched_rr_get_interval(pid_t pid,
- struct timespec *interval);
-
-asmlinkage int sys32_sched_rr_get_interval(__kernel_pid_t32 pid,
- struct compat_timespec *interval)
-{
- struct timespec t;
- int ret;
- mm_segment_t old_fs = get_fs ();
-
- set_fs (KERNEL_DS);
- ret = sys_sched_rr_get_interval(pid, &t);
- set_fs (old_fs);
- if (put_user (t.tv_sec, &interval->tv_sec) ||
- __put_user (t.tv_nsec, &interval->tv_nsec))
- return -EFAULT;
- return ret;
-}
-
-struct msgbuf32 { s32 mtype; char mtext[1]; };
-
-struct ipc_perm32
-{
- key_t key;
- __kernel_uid_t32 uid;
- __kernel_gid_t32 gid;
- __kernel_uid_t32 cuid;
- __kernel_gid_t32 cgid;
- __kernel_mode_t32 mode;
- unsigned short seq;
-};
-
-struct ipc64_perm32 {
- key_t key;
- __kernel_uid_t32 uid;
- __kernel_gid_t32 gid;
- __kernel_uid_t32 cuid;
- __kernel_gid_t32 cgid;
- __kernel_mode_t32 mode;
- unsigned short seq;
- unsigned short __pad1;
- unsigned int __unused1;
- unsigned int __unused2;
-};
-
-struct semid_ds32 {
- struct ipc_perm32 sem_perm; /* permissions .. see ipc.h */
- compat_time_t sem_otime; /* last semop time */
- compat_time_t sem_ctime; /* last change time */
- u32 sem_base; /* ptr to first semaphore in array */
- u32 sem_pending; /* pending operations to be processed */
- u32 sem_pending_last; /* last pending operation */
- u32 undo; /* undo requests on this array */
- unsigned short sem_nsems; /* no. of semaphores in array */
-};
-
-struct semid64_ds32 {
- struct ipc64_perm32 sem_perm;
- compat_time_t sem_otime;
- compat_time_t sem_ctime;
- unsigned int sem_nsems;
- unsigned int __unused1;
- unsigned int __unused2;
-};
-
-struct msqid_ds32
-{
- struct ipc_perm32 msg_perm;
- u32 msg_first;
- u32 msg_last;
- compat_time_t msg_stime;
- compat_time_t msg_rtime;
- compat_time_t msg_ctime;
- u32 wwait;
- u32 rwait;
- unsigned short msg_cbytes;
- unsigned short msg_qnum;
- unsigned short msg_qbytes;
- __kernel_ipc_pid_t32 msg_lspid;
- __kernel_ipc_pid_t32 msg_lrpid;
-};
-
-struct msqid64_ds32 {
- struct ipc64_perm32 msg_perm;
- compat_time_t msg_stime;
- unsigned int __unused1;
- compat_time_t msg_rtime;
- unsigned int __unused2;
- compat_time_t msg_ctime;
- unsigned int __unused3;
- unsigned int msg_cbytes;
- unsigned int msg_qnum;
- unsigned int msg_qbytes;
- __kernel_pid_t32 msg_lspid;
- __kernel_pid_t32 msg_lrpid;
- unsigned int __unused4;
- unsigned int __unused5;
-};
-
-struct shmid_ds32 {
- struct ipc_perm32 shm_perm;
- int shm_segsz;
- compat_time_t shm_atime;
- compat_time_t shm_dtime;
- compat_time_t shm_ctime;
- __kernel_ipc_pid_t32 shm_cpid;
- __kernel_ipc_pid_t32 shm_lpid;
- unsigned short shm_nattch;
-};
-
-struct shmid64_ds32 {
- struct ipc64_perm32 shm_perm;
- compat_size_t shm_segsz;
- compat_time_t shm_atime;
- compat_time_t shm_dtime;
- compat_time_t shm_ctime;
- __kernel_pid_t32 shm_cpid;
- __kernel_pid_t32 shm_lpid;
- unsigned int shm_nattch;
- unsigned int __unused1;
- unsigned int __unused2;
-};
-
-struct ipc_kludge32 {
- u32 msgp;
- s32 msgtyp;
-};
-
-static int
-do_sys32_semctl(int first, int second, int third, void *uptr)
-{
- union semun fourth;
- u32 pad;
- int err, err2;
- struct semid64_ds s;
- mm_segment_t old_fs;
-
- if (!uptr)
- return -EINVAL;
- err = -EFAULT;
- if (get_user (pad, (u32 *)uptr))
- return err;
- if ((third & ~IPC_64) == SETVAL)
- fourth.val = (int)pad;
- else
- fourth.__pad = (void *)A(pad);
- switch (third & ~IPC_64) {
- case IPC_INFO:
- case IPC_RMID:
- case IPC_SET:
- case SEM_INFO:
- case GETVAL:
- case GETPID:
- case GETNCNT:
- case GETZCNT:
- case GETALL:
- case SETVAL:
- case SETALL:
- err = sys_semctl (first, second, third, fourth);
- break;
-
- case IPC_STAT:
- case SEM_STAT:
- fourth.__pad = &s;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_semctl (first, second, third, fourth);
- set_fs (old_fs);
-
- if (third & IPC_64) {
- struct semid64_ds32 *usp64 = (struct semid64_ds32 *) A(pad);
-
- if (!access_ok(VERIFY_WRITE, usp64, sizeof(*usp64))) {
- err = -EFAULT;
- break;
- }
- err2 = __put_user(s.sem_perm.key, &usp64->sem_perm.key);
- err2 |= __put_user(s.sem_perm.uid, &usp64->sem_perm.uid);
- err2 |= __put_user(s.sem_perm.gid, &usp64->sem_perm.gid);
- err2 |= __put_user(s.sem_perm.cuid, &usp64->sem_perm.cuid);
- err2 |= __put_user(s.sem_perm.cgid, &usp64->sem_perm.cgid);
- err2 |= __put_user(s.sem_perm.mode, &usp64->sem_perm.mode);
- err2 |= __put_user(s.sem_perm.seq, &usp64->sem_perm.seq);
- err2 |= __put_user(s.sem_otime, &usp64->sem_otime);
- err2 |= __put_user(s.sem_ctime, &usp64->sem_ctime);
- err2 |= __put_user(s.sem_nsems, &usp64->sem_nsems);
- } else {
- struct semid_ds32 *usp32 = (struct semid_ds32 *) A(pad);
-
- if (!access_ok(VERIFY_WRITE, usp32, sizeof(*usp32))) {
- err = -EFAULT;
- break;
- }
- err2 = __put_user(s.sem_perm.key, &usp32->sem_perm.key);
- err2 |= __put_user(s.sem_perm.uid, &usp32->sem_perm.uid);
- err2 |= __put_user(s.sem_perm.gid, &usp32->sem_perm.gid);
- err2 |= __put_user(s.sem_perm.cuid, &usp32->sem_perm.cuid);
- err2 |= __put_user(s.sem_perm.cgid, &usp32->sem_perm.cgid);
- err2 |= __put_user(s.sem_perm.mode, &usp32->sem_perm.mode);
- err2 |= __put_user(s.sem_perm.seq, &usp32->sem_perm.seq);
- err2 |= __put_user(s.sem_otime, &usp32->sem_otime);
- err2 |= __put_user(s.sem_ctime, &usp32->sem_ctime);
- err2 |= __put_user(s.sem_nsems, &usp32->sem_nsems);
- }
- if (err2)
- err = -EFAULT;
- break;
-
- default:
- err = - EINVAL;
- break;
- }
-
- return err;
-}
-
-static int
-do_sys32_msgsnd (int first, int second, int third, void *uptr)
-{
- struct msgbuf32 *up = (struct msgbuf32 *)uptr;
- struct msgbuf *p;
- mm_segment_t old_fs;
- int err;
-
- if (second < 0)
- return -EINVAL;
- p = kmalloc (second + sizeof (struct msgbuf)
- + 4, GFP_USER);
- if (!p)
- return -ENOMEM;
- err = get_user (p->mtype, &up->mtype);
- if (err)
- goto out;
- err |= __copy_from_user (p->mtext, &up->mtext, second);
- if (err)
- goto out;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_msgsnd (first, p, second, third);
- set_fs (old_fs);
-out:
- kfree (p);
-
- return err;
-}
-
-static int
-do_sys32_msgrcv (int first, int second, int msgtyp, int third,
- int version, void *uptr)
-{
- struct msgbuf32 *up;
- struct msgbuf *p;
- mm_segment_t old_fs;
- int err;
-
- if (!version) {
- struct ipc_kludge32 *uipck = (struct ipc_kludge32 *)uptr;
- struct ipc_kludge32 ipck;
-
- err = -EINVAL;
- if (!uptr)
- goto out;
- err = -EFAULT;
- if (copy_from_user (&ipck, uipck, sizeof (struct ipc_kludge32)))
- goto out;
- uptr = (void *)AA(ipck.msgp);
- msgtyp = ipck.msgtyp;
- }
-
- if (second < 0)
- return -EINVAL;
- err = -ENOMEM;
- p = kmalloc (second + sizeof (struct msgbuf) + 4, GFP_USER);
- if (!p)
- goto out;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_msgrcv (first, p, second + 4, msgtyp, third);
- set_fs (old_fs);
- if (err < 0)
- goto free_then_out;
- up = (struct msgbuf32 *)uptr;
- if (put_user (p->mtype, &up->mtype) ||
- __copy_to_user (&up->mtext, p->mtext, err))
- err = -EFAULT;
-free_then_out:
- kfree (p);
-out:
- return err;
-}
-
-static int
-do_sys32_msgctl (int first, int second, void *uptr)
-{
- int err = -EINVAL, err2;
- struct msqid64_ds m;
- struct msqid_ds32 *up32 = (struct msqid_ds32 *)uptr;
- struct msqid64_ds32 *up64 = (struct msqid64_ds32 *)uptr;
- mm_segment_t old_fs;
-
- switch (second & ~IPC_64) {
- case IPC_INFO:
- case IPC_RMID:
- case MSG_INFO:
- err = sys_msgctl (first, second, (struct msqid_ds *)uptr);
- break;
-
- case IPC_SET:
- if (second & IPC_64) {
- if (!access_ok(VERIFY_READ, up64, sizeof(*up64))) {
- err = -EFAULT;
- break;
- }
- err = __get_user(m.msg_perm.uid, &up64->msg_perm.uid);
- err |= __get_user(m.msg_perm.gid, &up64->msg_perm.gid);
- err |= __get_user(m.msg_perm.mode, &up64->msg_perm.mode);
- err |= __get_user(m.msg_qbytes, &up64->msg_qbytes);
- } else {
- if (!access_ok(VERIFY_READ, up32, sizeof(*up32))) {
- err = -EFAULT;
- break;
- }
- err = __get_user(m.msg_perm.uid, &up32->msg_perm.uid);
- err |= __get_user(m.msg_perm.gid, &up32->msg_perm.gid);
- err |= __get_user(m.msg_perm.mode, &up32->msg_perm.mode);
- err |= __get_user(m.msg_qbytes, &up32->msg_qbytes);
- }
- if (err)
- break;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_msgctl (first, second, (struct msqid_ds *)&m);
- set_fs (old_fs);
- break;
-
- case IPC_STAT:
- case MSG_STAT:
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_msgctl (first, second, (struct msqid_ds *)&m);
- set_fs (old_fs);
- if (second & IPC_64) {
- if (!access_ok(VERIFY_WRITE, up64, sizeof(*up64))) {
- err = -EFAULT;
- break;
- }
- err2 = __put_user(m.msg_perm.key, &up64->msg_perm.key);
- err2 |= __put_user(m.msg_perm.uid, &up64->msg_perm.uid);
- err2 |= __put_user(m.msg_perm.gid, &up64->msg_perm.gid);
- err2 |= __put_user(m.msg_perm.cuid, &up64->msg_perm.cuid);
- err2 |= __put_user(m.msg_perm.cgid, &up64->msg_perm.cgid);
- err2 |= __put_user(m.msg_perm.mode, &up64->msg_perm.mode);
- err2 |= __put_user(m.msg_perm.seq, &up64->msg_perm.seq);
- err2 |= __put_user(m.msg_stime, &up64->msg_stime);
- err2 |= __put_user(m.msg_rtime, &up64->msg_rtime);
- err2 |= __put_user(m.msg_ctime, &up64->msg_ctime);
- err2 |= __put_user(m.msg_cbytes, &up64->msg_cbytes);
- err2 |= __put_user(m.msg_qnum, &up64->msg_qnum);
- err2 |= __put_user(m.msg_qbytes, &up64->msg_qbytes);
- err2 |= __put_user(m.msg_lspid, &up64->msg_lspid);
- err2 |= __put_user(m.msg_lrpid, &up64->msg_lrpid);
- if (err2)
- err = -EFAULT;
- } else {
- if (!access_ok(VERIFY_WRITE, up32, sizeof(*up32))) {
- err = -EFAULT;
- break;
- }
- err2 = __put_user(m.msg_perm.key, &up32->msg_perm.key);
- err2 |= __put_user(m.msg_perm.uid, &up32->msg_perm.uid);
- err2 |= __put_user(m.msg_perm.gid, &up32->msg_perm.gid);
- err2 |= __put_user(m.msg_perm.cuid, &up32->msg_perm.cuid);
- err2 |= __put_user(m.msg_perm.cgid, &up32->msg_perm.cgid);
- err2 |= __put_user(m.msg_perm.mode, &up32->msg_perm.mode);
- err2 |= __put_user(m.msg_perm.seq, &up32->msg_perm.seq);
- err2 |= __put_user(m.msg_stime, &up32->msg_stime);
- err2 |= __put_user(m.msg_rtime, &up32->msg_rtime);
- err2 |= __put_user(m.msg_ctime, &up32->msg_ctime);
- err2 |= __put_user(m.msg_cbytes, &up32->msg_cbytes);
- err2 |= __put_user(m.msg_qnum, &up32->msg_qnum);
- err2 |= __put_user(m.msg_qbytes, &up32->msg_qbytes);
- err2 |= __put_user(m.msg_lspid, &up32->msg_lspid);
- err2 |= __put_user(m.msg_lrpid, &up32->msg_lrpid);
- if (err2)
- err = -EFAULT;
- }
- break;
- }
-
- return err;
-}
-
-static int
-do_sys32_shmat (int first, int second, int third, int version, void *uptr)
-{
- unsigned long raddr;
- u32 *uaddr = (u32 *)A((u32)third);
- int err = -EINVAL;
-
- if (version == 1)
- return err;
- if (version == 1)
- return err;
- err = sys_shmat (first, uptr, second, &raddr);
- if (err)
- return err;
- err = put_user (raddr, uaddr);
- return err;
-}
-
-static int
-do_sys32_shmctl (int first, int second, void *uptr)
-{
- int err = -EFAULT, err2;
- struct shmid_ds s;
- struct shmid64_ds s64;
- struct shmid_ds32 *up32 = (struct shmid_ds32 *)uptr;
- struct shmid64_ds32 *up64 = (struct shmid64_ds32 *)uptr;
- mm_segment_t old_fs;
- struct shm_info32 {
- int used_ids;
- u32 shm_tot, shm_rss, shm_swp;
- u32 swap_attempts, swap_successes;
- } *uip = (struct shm_info32 *)uptr;
- struct shm_info si;
-
- switch (second & ~IPC_64) {
- case IPC_INFO:
- second = IPC_INFO; /* So that we don't have to translate it */
- case IPC_RMID:
- case SHM_LOCK:
- case SHM_UNLOCK:
- err = sys_shmctl (first, second, (struct shmid_ds *)uptr);
- break;
- case IPC_SET:
- if (second & IPC_64) {
- err = get_user(s.shm_perm.uid, &up64->shm_perm.uid);
- err |= get_user(s.shm_perm.gid, &up64->shm_perm.gid);
- err |= get_user(s.shm_perm.mode, &up64->shm_perm.mode);
- } else {
- err = get_user(s.shm_perm.uid, &up32->shm_perm.uid);
- err |= get_user(s.shm_perm.gid, &up32->shm_perm.gid);
- err |= get_user(s.shm_perm.mode, &up32->shm_perm.mode);
- }
- if (err)
- break;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_shmctl (first, second, &s);
- set_fs (old_fs);
- break;
-
- case IPC_STAT:
- case SHM_STAT:
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_shmctl (first, second, (void *) &s64);
- set_fs (old_fs);
- if (err < 0)
- break;
- if (second & IPC_64) {
- if (!access_ok(VERIFY_WRITE, up64, sizeof(*up64))) {
- err = -EFAULT;
- break;
- }
- err2 = __put_user(s64.shm_perm.key, &up64->shm_perm.key);
- err2 |= __put_user(s64.shm_perm.uid, &up64->shm_perm.uid);
- err2 |= __put_user(s64.shm_perm.gid, &up64->shm_perm.gid);
- err2 |= __put_user(s64.shm_perm.cuid, &up64->shm_perm.cuid);
- err2 |= __put_user(s64.shm_perm.cgid, &up64->shm_perm.cgid);
- err2 |= __put_user(s64.shm_perm.mode, &up64->shm_perm.mode);
- err2 |= __put_user(s64.shm_perm.seq, &up64->shm_perm.seq);
- err2 |= __put_user(s64.shm_atime, &up64->shm_atime);
- err2 |= __put_user(s64.shm_dtime, &up64->shm_dtime);
- err2 |= __put_user(s64.shm_ctime, &up64->shm_ctime);
- err2 |= __put_user(s64.shm_segsz, &up64->shm_segsz);
- err2 |= __put_user(s64.shm_nattch, &up64->shm_nattch);
- err2 |= __put_user(s64.shm_cpid, &up64->shm_cpid);
- err2 |= __put_user(s64.shm_lpid, &up64->shm_lpid);
- } else {
- if (!access_ok(VERIFY_WRITE, up32, sizeof(*up32))) {
- err = -EFAULT;
- break;
- }
- err2 = __put_user(s64.shm_perm.key, &up32->shm_perm.key);
- err2 |= __put_user(s64.shm_perm.uid, &up32->shm_perm.uid);
- err2 |= __put_user(s64.shm_perm.gid, &up32->shm_perm.gid);
- err2 |= __put_user(s64.shm_perm.cuid, &up32->shm_perm.cuid);
- err2 |= __put_user(s64.shm_perm.cgid, &up32->shm_perm.cgid);
- err2 |= __put_user(s64.shm_perm.mode, &up32->shm_perm.mode);
- err2 |= __put_user(s64.shm_perm.seq, &up32->shm_perm.seq);
- err2 |= __put_user(s64.shm_atime, &up32->shm_atime);
- err2 |= __put_user(s64.shm_dtime, &up32->shm_dtime);
- err2 |= __put_user(s64.shm_ctime, &up32->shm_ctime);
- err2 |= __put_user(s64.shm_segsz, &up32->shm_segsz);
- err2 |= __put_user(s64.shm_nattch, &up32->shm_nattch);
- err2 |= __put_user(s64.shm_cpid, &up32->shm_cpid);
- err2 |= __put_user(s64.shm_lpid, &up32->shm_lpid);
- }
- if (err2)
- err = -EFAULT;
- break;
-
- case SHM_INFO:
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_shmctl (first, second, (void *)&si);
- set_fs (old_fs);
- if (err < 0)
- break;
- err2 = put_user (si.used_ids, &uip->used_ids);
- err2 |= __put_user (si.shm_tot, &uip->shm_tot);
- err2 |= __put_user (si.shm_rss, &uip->shm_rss);
- err2 |= __put_user (si.shm_swp, &uip->shm_swp);
- err2 |= __put_user (si.swap_attempts,
- &uip->swap_attempts);
- err2 |= __put_user (si.swap_successes,
- &uip->swap_successes);
- if (err2)
- err = -EFAULT;
- break;
-
- default:
- err = -ENOSYS;
- break;
- }
-
- return err;
-}
-
-asmlinkage long
-sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
-{
- int version, err;
-
- version = call >> 16; /* hack for backward compatibility */
- call &= 0xffff;
-
- switch (call) {
-
- case SEMOP:
- /* struct sembuf is the same on 32 and 64bit :)) */
- err = sys_semop (first, (struct sembuf *)AA(ptr),
- second);
- break;
- case SEMGET:
- err = sys_semget (first, second, third);
- break;
- case SEMCTL:
- err = do_sys32_semctl (first, second, third,
- (void *)AA(ptr));
- break;
-
- case MSGSND:
- err = do_sys32_msgsnd (first, second, third,
- (void *)AA(ptr));
- break;
- case MSGRCV:
- err = do_sys32_msgrcv (first, second, fifth, third,
- version, (void *)AA(ptr));
- break;
- case MSGGET:
- err = sys_msgget ((key_t) first, second);
- break;
- case MSGCTL:
- err = do_sys32_msgctl (first, second, (void *)AA(ptr));
- break;
-
- case SHMAT:
- err = do_sys32_shmat (first, second, third,
- version, (void *)AA(ptr));
- break;
- case SHMDT:
- err = sys_shmdt ((char *)A(ptr));
- break;
- case SHMGET:
- err = sys_shmget (first, second, third);
- break;
- case SHMCTL:
- err = do_sys32_shmctl (first, second, (void *)AA(ptr));
- break;
- default:
- err = -EINVAL;
- break;
- }
-
- return err;
-}
-
-struct sysctl_args32
-{
- __kernel_caddr_t32 name;
- int nlen;
- __kernel_caddr_t32 oldval;
- __kernel_caddr_t32 oldlenp;
- __kernel_caddr_t32 newval;
- compat_size_t newlen;
- unsigned int __unused[4];
-};
-
-#ifdef CONFIG_SYSCTL
-
-asmlinkage long sys32_sysctl(struct sysctl_args32 *args)
-{
- struct sysctl_args32 tmp;
- int error;
- size_t oldlen, *oldlenp = NULL;
- unsigned long addr = (((long)&args->__unused[0]) + 7) & ~7;
-
- if (copy_from_user(&tmp, args, sizeof(tmp)))
- return -EFAULT;
-
- if (tmp.oldval && tmp.oldlenp) {
- /* Duh, this is ugly and might not work if sysctl_args
- is in read-only memory, but do_sysctl does indirectly
- a lot of uaccess in both directions and we'd have to
- basically copy the whole sysctl.c here, and
- glibc's __sysctl uses rw memory for the structure
- anyway. */
- if (get_user(oldlen, (u32 *)A(tmp.oldlenp)) ||
- put_user(oldlen, (size_t *)addr))
- return -EFAULT;
- oldlenp = (size_t *)addr;
- }
-
- lock_kernel();
- error = do_sysctl((int *)A(tmp.name), tmp.nlen, (void *)A(tmp.oldval),
- oldlenp, (void *)A(tmp.newval), tmp.newlen);
- unlock_kernel();
- if (oldlenp) {
- if (!error) {
- if (get_user(oldlen, (size_t *)addr) ||
- put_user(oldlen, (u32 *)A(tmp.oldlenp)))
- error = -EFAULT;
- }
- copy_to_user(args->__unused, tmp.__unused, sizeof(tmp.__unused));
- }
- return error;
-}
-
-#else /* CONFIG_SYSCTL */
-
-asmlinkage long sys32_sysctl(struct sysctl_args32 *args)
-{
- return -ENOSYS;
-}
-
-#endif /* CONFIG_SYSCTL */
-
-extern asmlinkage int sys_sched_setaffinity(pid_t pid, unsigned int len,
- unsigned long *user_mask_ptr);
-
-asmlinkage int sys32_sched_setaffinity(__kernel_pid_t32 pid, unsigned int len,
- u32 *user_mask_ptr)
-{
- unsigned long kernel_mask;
- mm_segment_t old_fs;
- int ret;
-
- if (get_user(kernel_mask, user_mask_ptr))
- return -EFAULT;
-
- old_fs = get_fs();
- set_fs(KERNEL_DS);
- ret = sys_sched_setaffinity(pid,
- /* XXX Nice api... */
- sizeof(kernel_mask),
- &kernel_mask);
- set_fs(old_fs);
-
- return ret;
-}
-
-extern asmlinkage int sys_sched_getaffinity(pid_t pid, unsigned int len,
- unsigned long *user_mask_ptr);
-
-asmlinkage int sys32_sched_getaffinity(__kernel_pid_t32 pid, unsigned int len,
- u32 *user_mask_ptr)
-{
- unsigned long kernel_mask;
- mm_segment_t old_fs;
- int ret;
-
- old_fs = get_fs();
- set_fs(KERNEL_DS);
- ret = sys_sched_getaffinity(pid,
- /* XXX Nice api... */
- sizeof(kernel_mask),
- &kernel_mask);
- set_fs(old_fs);
-
- if (ret == 0) {
- if (put_user(kernel_mask, user_mask_ptr))
- ret = -EFAULT;
- }
-
- return ret;
-}
-
-asmlinkage long sys32_newuname(struct new_utsname * name)
-{
- int ret = 0;
-
- down_read(&uts_sem);
- if (copy_to_user(name,&system_utsname,sizeof *name))
- ret = -EFAULT;
- up_read(&uts_sem);
-
- if (current->personality == PER_LINUX32 && !ret)
- if (copy_to_user(name->machine, "mips\0\0\0", 8))
- ret = -EFAULT;
-
- return ret;
-}
-
-extern asmlinkage long sys_personality(unsigned long);
-
-asmlinkage int sys32_personality(unsigned long personality)
-{
- int ret;
- if (current->personality == PER_LINUX32 && personality == PER_LINUX)
- personality = PER_LINUX32;
- ret = sys_personality(personality);
- if (ret == PER_LINUX32)
- ret = PER_LINUX;
- return ret;
-}
-
-/* Handle adjtimex compatibility. */
-
-struct timex32 {
- u32 modes;
- s32 offset, freq, maxerror, esterror;
- s32 status, constant, precision, tolerance;
- struct compat_timeval time;
- s32 tick;
- s32 ppsfreq, jitter, shift, stabil;
- s32 jitcnt, calcnt, errcnt, stbcnt;
- s32 :32; s32 :32; s32 :32; s32 :32;
- s32 :32; s32 :32; s32 :32; s32 :32;
- s32 :32; s32 :32; s32 :32; s32 :32;
-};
-
-extern int do_adjtimex(struct timex *);
-
-asmlinkage int sys32_adjtimex(struct timex32 *utp)
-{
- struct timex txc;
- int ret;
-
- memset(&txc, 0, sizeof(struct timex));
-
- if (get_user(txc.modes, &utp->modes) ||
- __get_user(txc.offset, &utp->offset) ||
- __get_user(txc.freq, &utp->freq) ||
- __get_user(txc.maxerror, &utp->maxerror) ||
- __get_user(txc.esterror, &utp->esterror) ||
- __get_user(txc.status, &utp->status) ||
- __get_user(txc.constant, &utp->constant) ||
- __get_user(txc.precision, &utp->precision) ||
- __get_user(txc.tolerance, &utp->tolerance) ||
- __get_user(txc.time.tv_sec, &utp->time.tv_sec) ||
- __get_user(txc.time.tv_usec, &utp->time.tv_usec) ||
- __get_user(txc.tick, &utp->tick) ||
- __get_user(txc.ppsfreq, &utp->ppsfreq) ||
- __get_user(txc.jitter, &utp->jitter) ||
- __get_user(txc.shift, &utp->shift) ||
- __get_user(txc.stabil, &utp->stabil) ||
- __get_user(txc.jitcnt, &utp->jitcnt) ||
- __get_user(txc.calcnt, &utp->calcnt) ||
- __get_user(txc.errcnt, &utp->errcnt) ||
- __get_user(txc.stbcnt, &utp->stbcnt))
- return -EFAULT;
-
- ret = do_adjtimex(&txc);
-
- if (put_user(txc.modes, &utp->modes) ||
- __put_user(txc.offset, &utp->offset) ||
- __put_user(txc.freq, &utp->freq) ||
- __put_user(txc.maxerror, &utp->maxerror) ||
- __put_user(txc.esterror, &utp->esterror) ||
- __put_user(txc.status, &utp->status) ||
- __put_user(txc.constant, &utp->constant) ||
- __put_user(txc.precision, &utp->precision) ||
- __put_user(txc.tolerance, &utp->tolerance) ||
- __put_user(txc.time.tv_sec, &utp->time.tv_sec) ||
- __put_user(txc.time.tv_usec, &utp->time.tv_usec) ||
- __put_user(txc.tick, &utp->tick) ||
- __put_user(txc.ppsfreq, &utp->ppsfreq) ||
- __put_user(txc.jitter, &utp->jitter) ||
- __put_user(txc.shift, &utp->shift) ||
- __put_user(txc.stabil, &utp->stabil) ||
- __put_user(txc.jitcnt, &utp->jitcnt) ||
- __put_user(txc.calcnt, &utp->calcnt) ||
- __put_user(txc.errcnt, &utp->errcnt) ||
- __put_user(txc.stbcnt, &utp->stbcnt))
- ret = -EFAULT;
-
- return ret;
-}
-
-extern asmlinkage ssize_t sys_sendfile(int out_fd, int in_fd, off_t *offset, size_t count);
-
-asmlinkage int sys32_sendfile(int out_fd, int in_fd, __kernel_off_t32 *offset, s32 count)
-{
- mm_segment_t old_fs = get_fs();
- int ret;
- off_t of;
-
- if (offset && get_user(of, offset))
- return -EFAULT;
-
- set_fs(KERNEL_DS);
- ret = sys_sendfile(out_fd, in_fd, offset ? &of : NULL, count);
- set_fs(old_fs);
-
- if (offset && put_user(of, offset))
- return -EFAULT;
-
- return ret;
-}
-
-asmlinkage ssize_t sys_readahead(int fd, loff_t offset, size_t count);
-
-asmlinkage ssize_t sys32_readahead(int fd, u32 pad0, u64 a2, u64 a3,
- size_t count)
-{
- return sys_readahead(fd, merge_64(a2, a3), count);
-}
diff -Nru a/arch/mips64/kernel/mips64_ksyms.c b/arch/mips64/kernel/mips64_ksyms.c
--- a/arch/mips64/kernel/mips64_ksyms.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,89 +0,0 @@
-/*
- * Export MIPS64-specific functions needed for loadable modules.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
- * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
- */
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/in6.h>
-#include <linux/pci.h>
-#include <linux/tty.h>
-
-#include <asm/bootinfo.h>
-#include <asm/dma.h>
-#include <asm/floppy.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/pgalloc.h>
-#include <asm/semaphore.h>
-#include <asm/uaccess.h>
-#include <asm/checksum.h>
-
-extern void *__bzero(void *__s, size_t __count);
-extern long __strncpy_from_user_nocheck_asm(char *__to,
- const char *__from, long __len);
-extern long __strncpy_from_user_asm(char *__to, const char *__from,
- long __len);
-extern long __strlen_user_nocheck_asm(const char *s);
-extern long __strlen_user_asm(const char *s);
-extern long __strnlen_user_nocheck_asm(const char *s);
-extern long __strnlen_user_asm(const char *s);
-
-EXPORT_SYMBOL(mips_machtype);
-
-#ifdef CONFIG_EISA
-EXPORT_SYMBOL(EISA_bus);
-#endif
-
-/*
- * String functions
- */
-EXPORT_SYMBOL_NOVERS(memcmp);
-EXPORT_SYMBOL_NOVERS(memset);
-EXPORT_SYMBOL_NOVERS(memcpy);
-EXPORT_SYMBOL_NOVERS(memmove);
-EXPORT_SYMBOL_NOVERS(strcat);
-EXPORT_SYMBOL_NOVERS(strchr);
-EXPORT_SYMBOL_NOVERS(strlen);
-EXPORT_SYMBOL_NOVERS(strncat);
-EXPORT_SYMBOL_NOVERS(strnlen);
-EXPORT_SYMBOL_NOVERS(strrchr);
-EXPORT_SYMBOL_NOVERS(strpbrk);
-
-EXPORT_SYMBOL(_clear_page);
-EXPORT_SYMBOL(kernel_thread);
-
-/*
- * Userspace access stuff.
- */
-EXPORT_SYMBOL_NOVERS(__copy_user);
-EXPORT_SYMBOL_NOVERS(__bzero);
-EXPORT_SYMBOL_NOVERS(__strncpy_from_user_nocheck_asm);
-EXPORT_SYMBOL_NOVERS(__strncpy_from_user_asm);
-EXPORT_SYMBOL_NOVERS(__strlen_user_nocheck_asm);
-EXPORT_SYMBOL_NOVERS(__strlen_user_asm);
-EXPORT_SYMBOL_NOVERS(__strnlen_user_nocheck_asm);
-EXPORT_SYMBOL_NOVERS(__strnlen_user_asm);
-
-
-EXPORT_SYMBOL(invalid_pte_table);
-
-/*
- * Kernel hacking ...
- */
-#include <asm/branch.h>
-#include <linux/sched.h>
-
-#ifdef CONFIG_VT
-EXPORT_SYMBOL(screen_info);
-#endif
-
-EXPORT_SYMBOL(get_wchan);
diff -Nru a/arch/mips64/kernel/module.c b/arch/mips64/kernel/module.c
--- a/arch/mips64/kernel/module.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,349 +0,0 @@
-/* Kernel module help for MIPS.
- Copyright (C) 2001 Rusty Russell.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-#include <linux/moduleloader.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-
-struct mips_hi16 {
- struct mips_hi16 *next;
- Elf32_Addr *addr;
- Elf32_Addr value;
-};
-
-static struct mips_hi16 *mips_hi16_list;
-
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(fmt , ...)
-#endif
-
-static struct vm_struct * modvmlist = NULL;
-
-void module_unmap(void * addr)
-{
- struct vm_struct **p, *tmp;
- int i;
-
- if (!addr)
- return;
- if ((PAGE_SIZE-1) & (unsigned long) addr) {
- printk("Trying to unmap module with bad address (%p)\n", addr);
- return;
- }
-
- for (p = &modvmlist ; (tmp = *p) ; p = &tmp->next) {
- if (tmp->addr == addr) {
- *p = tmp->next;
- goto found;
- }
- }
- printk("Trying to unmap nonexistent module vm area (%p)\n", addr);
- return;
-
-found:
- unmap_vm_area(tmp);
-
- for (i = 0; i < tmp->nr_pages; i++) {
- if (unlikely(!tmp->pages[i]))
- BUG();
- __free_page(tmp->pages[i]);
- }
-
- kfree(tmp->pages);
- kfree(tmp);
-}
-
-#define MODULES_LEN (512*1024*1024) /* Random silly large number */
-#define MODULES_END (512*1024*1024) /* Random silly large number */
-#define MODULES_VADDR (512*1024*1024) /* Random silly large number */
-
-void *module_map(unsigned long size)
-{
- struct vm_struct **p, *tmp, *area;
- struct page **pages;
- void * addr;
- unsigned int nr_pages, array_size, i;
-
- size = PAGE_ALIGN(size);
- if (!size || size > MODULES_LEN)
- return NULL;
-
- addr = (void *) MODULES_VADDR;
- for (p = &modvmlist; (tmp = *p) ; p = &tmp->next) {
- if (size + (unsigned long) addr < (unsigned long) tmp->addr)
- break;
- addr = (void *) (tmp->size + (unsigned long) tmp->addr);
- }
- if ((unsigned long) addr + size >= MODULES_END)
- return NULL;
-
- area = (struct vm_struct *) kmalloc(sizeof(*area), GFP_KERNEL);
- if (!area)
- return NULL;
- area->size = size + PAGE_SIZE;
- area->addr = addr;
- area->next = *p;
- area->pages = NULL;
- area->nr_pages = 0;
- area->phys_addr = 0;
- *p = area;
-
- nr_pages = size >> PAGE_SHIFT;
- array_size = (nr_pages * sizeof(struct page *));
-
- area->nr_pages = nr_pages;
- area->pages = pages = kmalloc(array_size, GFP_KERNEL);
- if (!area->pages)
- goto fail;
-
- memset(area->pages, 0, array_size);
-
- for (i = 0; i < area->nr_pages; i++) {
- area->pages[i] = alloc_page(GFP_KERNEL);
- if (unlikely(!area->pages[i]))
- goto fail;
- }
-
- if (map_vm_area(area, PAGE_KERNEL, &pages)) {
- unmap_vm_area(area);
- goto fail;
- }
-
- return area->addr;
-
-fail:
- if (area->pages) {
- for (i = 0; i < area->nr_pages; i++) {
- if (area->pages[i])
- __free_page(area->pages[i]);
- }
- kfree(area->pages);
- }
- kfree(area);
-
- return NULL;
-}
-
-void *module_alloc(unsigned long size)
-{
- if (size == 0)
- return NULL;
- return vmalloc(size);
-}
-
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
- vfree(module_region);
- /* FIXME: If module_region == mod->init_region, trim exception
- table entries. */
-}
-
-/* We don't need anything special. */
-long module_core_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
-{
- return module->core_size;
-}
-
-long module_init_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
-{
- return module->init_size;
-}
-
-int module_frob_arch_sections(Elf_Ehdr *hdr,
- Elf_Shdr *sechdrs,
- char *secstrings,
- struct module *mod)
-{
- return 0;
-}
-
-int apply_relocate(Elf32_Shdr *sechdrs,
- const char *strtab,
- unsigned int symindex,
- unsigned int relsec,
- struct module *me)
-{
- unsigned int i;
- Elf32_Rel *rel = (void *)sechdrs[relsec].sh_offset;
- Elf32_Sym *sym;
- uint32_t *location;
- Elf32_Addr v;
-
- DEBUGP("Applying relocate section %u to %u\n", relsec,
- sechdrs[relsec].sh_info);
- for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
- /* This is where to make the change */
- location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_offset
- + rel[i].r_offset;
- /* This is the symbol it is referring to */
- sym = (Elf32_Sym *)sechdrs[symindex].sh_offset
- + ELF32_R_SYM(rel[i].r_info);
- if (!sym->st_value) {
- printk(KERN_WARNING "%s: Unknown symbol %s\n",
- me->name, strtab + sym->st_name);
- return -ENOENT;
- }
-
- v = sym->st_value;
-
- switch (ELF32_R_TYPE(rel[i].r_info)) {
- case R_MIPS_NONE:
- break;
-
- case R_MIPS_32:
- *location += v;
- break;
-
- case R_MIPS_26:
- if (v % 4)
- printk(KERN_ERR
- "module %s: dangerous relocation\n",
- me->name);
- return -ENOEXEC;
- if ((v & 0xf0000000) !=
- (((unsigned long)location + 4) & 0xf0000000))
- printk(KERN_ERR
- "module %s: relocation overflow\n",
- me->name);
- return -ENOEXEC;
- *location = (*location & ~0x03ffffff) |
- ((*location + (v >> 2)) & 0x03ffffff);
- break;
-
- case R_MIPS_HI16: {
- struct mips_hi16 *n;
-
- /*
- * We cannot relocate this one now because we don't
- * know the value of the carry we need to add. Save
- * the information, and let LO16 do the actual
- * relocation.
- */
- n = (struct mips_hi16 *) kmalloc(sizeof *n, GFP_KERNEL);
- n->addr = location;
- n->value = v;
- n->next = mips_hi16_list;
- mips_hi16_list = n;
- break;
- }
-
- case R_MIPS_LO16: {
- unsigned long insnlo = *location;
- Elf32_Addr val, vallo;
-
- /* Sign extend the addend we extract from the lo insn. */
- vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
-
- if (mips_hi16_list != NULL) {
- struct mips_hi16 *l;
-
- l = mips_hi16_list;
- while (l != NULL) {
- struct mips_hi16 *next;
- unsigned long insn;
-
- /*
- * The value for the HI16 had best be
- * the same.
- */
- printk(KERN_ERR "module %s: dangerous "
- "relocation\n", me->name);
- return -ENOEXEC;
-
- /*
- * Do the HI16 relocation. Note that
- * we actually don't need to know
- * anything about the LO16 itself,
- * except where to find the low 16 bits
- * of the addend needed by the LO16.
- */
- insn = *l->addr;
- val = ((insn & 0xffff) << 16) + vallo;
- val += v;
-
- /*
- * Account for the sign extension that
- * will happen in the low bits.
- */
- val = ((val >> 16) + ((val & 0x8000) !=
- 0)) & 0xffff;
-
- insn = (insn & ~0xffff) | val;
- *l->addr = insn;
-
- next = l->next;
- kfree(l);
- l = next;
- }
-
- mips_hi16_list = NULL;
- }
-
- /*
- * Ok, we're done with the HI16 relocs. Now deal with
- * the LO16.
- */
- val = v + vallo;
- insnlo = (insnlo & ~0xffff) | (val & 0xffff);
- *location = insnlo;
- break;
- }
-
- default:
- printk(KERN_ERR "module %s: Unknown relocation: %u\n",
- me->name, ELF32_R_TYPE(rel[i].r_info));
- return -ENOEXEC;
- }
- }
- return 0;
-}
-
-int apply_relocate_add(Elf32_Shdr *sechdrs,
- const char *strtab,
- unsigned int symindex,
- unsigned int relsec,
- struct module *me)
-{
- printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
- me->name);
- return -ENOEXEC;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
- const Elf_Shdr *sechdrs,
- struct module *me)
-{
- return 0;
-}
-
-void module_arch_cleanup(struct module *mod)
-{
-}
diff -Nru a/arch/mips64/kernel/offset.c b/arch/mips64/kernel/offset.c
--- a/arch/mips64/kernel/offset.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,207 +0,0 @@
-/*
- * offset.c: Calculate pt_regs and task_struct offsets.
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- *
- * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.
- */
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-
-#define text(t) __asm__("\n@@@" t)
-#define _offset(type, member) (&(((type *)NULL)->member))
-
-#define offset(string, ptr, member) \
- __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)))
-#define constant(string, member) \
- __asm__("\n@@@" string "%x0" : : "i" (member))
-#define size(string, size) \
- __asm__("\n@@@" string "%0" : : "i" (sizeof(size)))
-#define linefeed text("")
-
-void output_ptreg_defines(void)
-{
- text("/* MIPS pt_regs offsets. */");
- offset("#define PT_R0 ", struct pt_regs, regs[0]);
- offset("#define PT_R1 ", struct pt_regs, regs[1]);
- offset("#define PT_R2 ", struct pt_regs, regs[2]);
- offset("#define PT_R3 ", struct pt_regs, regs[3]);
- offset("#define PT_R4 ", struct pt_regs, regs[4]);
- offset("#define PT_R5 ", struct pt_regs, regs[5]);
- offset("#define PT_R6 ", struct pt_regs, regs[6]);
- offset("#define PT_R7 ", struct pt_regs, regs[7]);
- offset("#define PT_R8 ", struct pt_regs, regs[8]);
- offset("#define PT_R9 ", struct pt_regs, regs[9]);
- offset("#define PT_R10 ", struct pt_regs, regs[10]);
- offset("#define PT_R11 ", struct pt_regs, regs[11]);
- offset("#define PT_R12 ", struct pt_regs, regs[12]);
- offset("#define PT_R13 ", struct pt_regs, regs[13]);
- offset("#define PT_R14 ", struct pt_regs, regs[14]);
- offset("#define PT_R15 ", struct pt_regs, regs[15]);
- offset("#define PT_R16 ", struct pt_regs, regs[16]);
- offset("#define PT_R17 ", struct pt_regs, regs[17]);
- offset("#define PT_R18 ", struct pt_regs, regs[18]);
- offset("#define PT_R19 ", struct pt_regs, regs[19]);
- offset("#define PT_R20 ", struct pt_regs, regs[20]);
- offset("#define PT_R21 ", struct pt_regs, regs[21]);
- offset("#define PT_R22 ", struct pt_regs, regs[22]);
- offset("#define PT_R23 ", struct pt_regs, regs[23]);
- offset("#define PT_R24 ", struct pt_regs, regs[24]);
- offset("#define PT_R25 ", struct pt_regs, regs[25]);
- offset("#define PT_R26 ", struct pt_regs, regs[26]);
- offset("#define PT_R27 ", struct pt_regs, regs[27]);
- offset("#define PT_R28 ", struct pt_regs, regs[28]);
- offset("#define PT_R29 ", struct pt_regs, regs[29]);
- offset("#define PT_R30 ", struct pt_regs, regs[30]);
- offset("#define PT_R31 ", struct pt_regs, regs[31]);
- offset("#define PT_LO ", struct pt_regs, lo);
- offset("#define PT_HI ", struct pt_regs, hi);
- offset("#define PT_EPC ", struct pt_regs, cp0_epc);
- offset("#define PT_BVADDR ", struct pt_regs, cp0_badvaddr);
- offset("#define PT_STATUS ", struct pt_regs, cp0_status);
- offset("#define PT_CAUSE ", struct pt_regs, cp0_cause);
- size("#define PT_SIZE ", struct pt_regs);
- linefeed;
-}
-
-void output_task_defines(void)
-{
- text("/* MIPS task_struct offsets. */");
- offset("#define TASK_STATE ", struct task_struct, state);
- offset("#define TASK_THREAD_INFO ", struct task_struct, thread_info);
- offset("#define TASK_FLAGS ", struct task_struct, flags);
- offset("#define TASK_MM ", struct task_struct, mm);
- offset("#define TASK_PID ", struct task_struct, pid);
- size( "#define TASK_STRUCT_SIZE ", struct task_struct);
- linefeed;
-}
-
-void output_thread_info_defines(void)
-{
- text("/* MIPS thread_info offsets. */");
- offset("#define TI_TASK ", struct thread_info, task);
- offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain);
- offset("#define TI_FLAGS ", struct thread_info, flags);
- offset("#define TI_CPU ", struct thread_info, cpu);
- offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
- offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
- offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
- linefeed;
-}
-
-void output_thread_defines(void)
-{
- text("/* MIPS specific thread_struct offsets. */");
- offset("#define THREAD_REG16 ", struct task_struct, thread.reg16);
- offset("#define THREAD_REG17 ", struct task_struct, thread.reg17);
- offset("#define THREAD_REG18 ", struct task_struct, thread.reg18);
- offset("#define THREAD_REG19 ", struct task_struct, thread.reg19);
- offset("#define THREAD_REG20 ", struct task_struct, thread.reg20);
- offset("#define THREAD_REG21 ", struct task_struct, thread.reg21);
- offset("#define THREAD_REG22 ", struct task_struct, thread.reg22);
- offset("#define THREAD_REG23 ", struct task_struct, thread.reg23);
- offset("#define THREAD_REG29 ", struct task_struct, thread.reg29);
- offset("#define THREAD_REG30 ", struct task_struct, thread.reg30);
- offset("#define THREAD_REG31 ", struct task_struct, thread.reg31);
- offset("#define THREAD_STATUS ", struct task_struct, \
- thread.cp0_status);
- offset("#define THREAD_FPU ", struct task_struct, thread.fpu);
- offset("#define THREAD_BVADDR ", struct task_struct, \
- thread.cp0_badvaddr);
- offset("#define THREAD_BUADDR ", struct task_struct, \
- thread.cp0_baduaddr);
- offset("#define THREAD_ECODE ", struct task_struct, \
- thread.error_code);
- offset("#define THREAD_TRAPNO ", struct task_struct, thread.trap_no);
- offset("#define THREAD_MFLAGS ", struct task_struct, thread.mflags);
- offset("#define THREAD_TRAMP ", struct task_struct, \
- thread.irix_trampoline);
- offset("#define THREAD_OLDCTX ", struct task_struct, \
- thread.irix_oldctx);
- linefeed;
-}
-
-void output_mm_defines(void)
-{
- text("/* Linux mm_struct offsets. */");
- offset("#define MM_USERS ", struct mm_struct, mm_users);
- offset("#define MM_PGD ", struct mm_struct, pgd);
- offset("#define MM_CONTEXT ", struct mm_struct, context);
- linefeed;
- constant("#define _PAGE_SIZE ", PAGE_SIZE);
- constant("#define _PGD_ORDER ", PGD_ORDER);
- constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT);
- linefeed;
-}
-
-void output_sc_defines(void)
-{
- text("/* Linux sigcontext offsets. */");
- offset("#define SC_REGS ", struct sigcontext, sc_regs);
- offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs);
- offset("#define SC_MDHI ", struct sigcontext, sc_mdhi);
- offset("#define SC_MDLO ", struct sigcontext, sc_mdlo);
- offset("#define SC_PC ", struct sigcontext, sc_pc);
- offset("#define SC_STATUS ", struct sigcontext, sc_status);
- offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
- offset("#define SC_FPC_EIR ", struct sigcontext, sc_fpc_eir);
- offset("#define SC_CAUSE ", struct sigcontext, sc_cause);
- offset("#define SC_BADVADDR ", struct sigcontext, sc_badvaddr);
- linefeed;
-}
-
-void output_signal_defined(void)
-{
- text("/* Linux signal numbers. */");
- constant("#define _SIGHUP ", SIGHUP);
- constant("#define _SIGINT ", SIGINT);
- constant("#define _SIGQUIT ", SIGQUIT);
- constant("#define _SIGILL ", SIGILL);
- constant("#define _SIGTRAP ", SIGTRAP);
- constant("#define _SIGIOT ", SIGIOT);
- constant("#define _SIGABRT ", SIGABRT);
- constant("#define _SIGEMT ", SIGEMT);
- constant("#define _SIGFPE ", SIGFPE);
- constant("#define _SIGKILL ", SIGKILL);
- constant("#define _SIGBUS ", SIGBUS);
- constant("#define _SIGSEGV ", SIGSEGV);
- constant("#define _SIGSYS ", SIGSYS);
- constant("#define _SIGPIPE ", SIGPIPE);
- constant("#define _SIGALRM ", SIGALRM);
- constant("#define _SIGTERM ", SIGTERM);
- constant("#define _SIGUSR1 ", SIGUSR1);
- constant("#define _SIGUSR2 ", SIGUSR2);
- constant("#define _SIGCHLD ", SIGCHLD);
- constant("#define _SIGPWR ", SIGPWR);
- constant("#define _SIGWINCH ", SIGWINCH);
- constant("#define _SIGURG ", SIGURG);
- constant("#define _SIGIO ", SIGIO);
- constant("#define _SIGSTOP ", SIGSTOP);
- constant("#define _SIGTSTP ", SIGTSTP);
- constant("#define _SIGCONT ", SIGCONT);
- constant("#define _SIGTTIN ", SIGTTIN);
- constant("#define _SIGTTOU ", SIGTTOU);
- constant("#define _SIGVTALRM ", SIGVTALRM);
- constant("#define _SIGPROF ", SIGPROF);
- constant("#define _SIGXCPU ", SIGXCPU);
- constant("#define _SIGXFSZ ", SIGXFSZ);
- linefeed;
-}
-
-void output_irq_cpustat_t_defines(void)
-{
- text("/* Linux irq_cpustat_t offsets. */");
- offset("#define IC_SOFTIRQ_PENDING ", irq_cpustat_t, __softirq_pending);
- offset("#define IC_SYSCALL_COUNT ", irq_cpustat_t, __syscall_count);
- offset("#define IC_KSOFTIRQD_TASK ", irq_cpustat_t, __ksoftirqd_task);
- size("#define IC_IRQ_CPUSTAT_T ", irq_cpustat_t);
- linefeed;
-}
diff -Nru a/arch/mips64/kernel/pci-dma.c b/arch/mips64/kernel/pci-dma.c
--- a/arch/mips64/kernel/pci-dma.c Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,62 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
- * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
- * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-
-#include <asm/io.h>
-
-#ifndef UNCAC_BASE /* Hack ... */
-#define UNCAC_BASE 0x9000000000000000UL
-#endif
-
-void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
- dma_addr_t * dma_handle)
-{
- void *ret;
- int gfp = GFP_ATOMIC;
- struct pci_bus *bus = NULL;
-
-#ifdef CONFIG_ISA
- if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
- gfp |= GFP_DMA;
-#endif
- ret = (void *) __get_free_pages(gfp, get_order(size));
-
- if (ret != NULL) {
- memset(ret, 0, size);
- if (hwdev)
- bus = hwdev->bus;
- *dma_handle = bus_to_baddr(bus, __pa(ret));
-#ifdef CONFIG_NONCOHERENT_IO
- dma_cache_wback_inv((unsigned long) ret, size);
- ret = UNCAC_ADDR(ret);
-#endif
- }
-
- return ret;
-}
-
-void pci_free_consistent(struct pci_dev *hwdev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
-{
- unsigned long addr = (unsigned long) vaddr;
-
-#ifdef CONFIG_NONCOHERENT_IO
- addr = CAC_ADDR(addr);
-#endif
- free_pages(addr, get_order(size));
-}
-
-EXPORT_SYMBOL(pci_alloc_consistent);
-EXPORT_SYMBOL(pci_free_consistent);
diff -Nru a/arch/mips64/kernel/proc.c b/arch/mips64/kernel/proc.c
--- a/arch/mips64/kernel/proc.c Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,143 +0,0 @@
-/*
- * linux/arch/mips/kernel/proc.c
- *
- * Copyright (C) 1995, 1996, 2001 Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/config.h>
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/seq_file.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/processor.h>
-#include <asm/watch.h>
-
-unsigned int vced_count, vcei_count;
-
-static const char *cpu_name[] = {
- [CPU_UNKNOWN] "unknown",
- [CPU_R2000] "R2000",
- [CPU_R3000] "R3000",
- [CPU_R3000A] "R3000A",
- [CPU_R3041] "R3041",
- [CPU_R3051] "R3051",
- [CPU_R3052] "R3052",
- [CPU_R3081] "R3081",
- [CPU_R3081E] "R3081E",
- [CPU_R4000PC] "R4000PC",
- [CPU_R4000SC] "R4000SC",
- [CPU_R4000MC] "R4000MC",
- [CPU_R4200] "R4200",
- [CPU_R4400PC] "R4400PC",
- [CPU_R4400SC] "R4400SC",
- [CPU_R4400MC] "R4400MC",
- [CPU_R4600] "R4600",
- [CPU_R6000] "R6000",
- [CPU_R6000A] "R6000A",
- [CPU_R8000] "R8000",
- [CPU_R10000] "R10000",
- [CPU_R4300] "R4300",
- [CPU_R4650] "R4650",
- [CPU_R4700] "R4700",
- [CPU_R5000] "R5000",
- [CPU_R5000A] "R5000A",
- [CPU_R4640] "R4640",
- [CPU_NEVADA] "Nevada",
- [CPU_RM7000] "RM7000",
- [CPU_R5432] "R5432",
- [CPU_4KC] "MIPS 4Kc",
- [CPU_5KC] "MIPS 5Kc",
- [CPU_R4310] "R4310",
- [CPU_SB1] "SiByte SB1",
- [CPU_TX3912] "TX3912",
- [CPU_TX3922] "TX3922",
- [CPU_TX3927] "TX3927",
- [CPU_AU1000] "Au1000",
- [CPU_AU1500] "Au1500",
- [CPU_4KEC] "MIPS 4KEc",
- [CPU_4KSC] "MIPS 4KSc",
- [CPU_VR41XX] "NEC Vr41xx",
- [CPU_R5500] "R5500",
- [CPU_TX49XX] "TX49xx",
- [CPU_20KC] "MIPS 20Kc",
- [CPU_VR4111] "NEC VR4111",
- [CPU_VR4121] "NEC VR4121",
- [CPU_VR4122] "NEC VR4122",
- [CPU_VR4131] "NEC VR4131",
- [CPU_VR4181] "NEC VR4181",
- [CPU_VR4181A] "NEC VR4181A",
- [CPU_SR71000] "Sandcraft SR71000"
-};
-
-
-static int show_cpuinfo(struct seq_file *m, void *v)
-{
- unsigned int version = current_cpu_data.processor_id;
- unsigned int fp_vers = current_cpu_data.fpu_id;
- unsigned long n = (unsigned long) v - 1;
- char fmt [64];
-
-#ifdef CONFIG_SMP
- if (!CPUMASK_TSTB(cpu_online_map, n))
- return 0;
-#endif
-
- /*
- * For the first processor also print the system type
- */
- if (n == 0)
- seq_printf(m, "system type\t\t: %s\n", get_system_type());
-
- seq_printf(m, "processor\t\t: %ld\n", n);
- sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
- cpu_has_fpu ? " FPU V%d.%d" : "");
- seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ?
- current_cpu_data.cputype : CPU_UNKNOWN],
- (version >> 4) & 0x0f, version & 0x0f,
- (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
- seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
- loops_per_jiffy / (500000/HZ),
- (loops_per_jiffy / (5000/HZ)) % 100);
- seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
- seq_printf(m, "microsecond timers\t: %s\n",
- cpu_has_counter ? "yes" : "no");
- seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize);
- seq_printf(m, "extra interrupt vector\t: %s\n",
- cpu_has_divec ? "yes" : "no");
- seq_printf(m, "hardware watchpoint\t: %s\n",
- cpu_has_watch ? "yes" : "no");
-
- sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
- cpu_has_vce ? "%d" : "not available");
- seq_printf(m, fmt, 'D', vced_count);
- seq_printf(m, fmt, 'I', vcei_count);
-
- return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
- unsigned long i = *pos;
-
- return i < NR_CPUS ? (void *) (i + 1) : NULL;
-}
-
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
- ++*pos;
- return c_start(m, pos);
-}
-
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-
-struct seq_operations cpuinfo_op = {
- .start = c_start,
- .next = c_next,
- .stop = c_stop,
- .show = show_cpuinfo,
-};
diff -Nru a/arch/mips64/kernel/process.c b/arch/mips64/kernel/process.c
--- a/arch/mips64/kernel/process.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,306 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/mman.h>
-#include <linux/personality.h>
-#include <linux/sys.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/init.h>
-#include <linux/completion.h>
-
-#include <asm/bootinfo.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/mipsregs.h>
-#include <asm/processor.h>
-#include <asm/stackframe.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/elf.h>
-#include <asm/cpu.h>
-#include <asm/fpu.h>
-#include <asm/inst.h>
-
-/*
- * We use this if we don't have any better idle routine..
- * (This to kill: kernel/platform.c.
- */
-void default_idle (void)
-{
-}
-
-/*
- * The idle thread. There's no useful work to be done, so just try to conserve
- * power and have a low exit latency (ie sit in a loop waiting for somebody to
- * say that they'd like to reschedule)
- */
-ATTRIB_NORET void cpu_idle(void)
-{
- /* endless idle loop with no priority at all */
- while (1) {
- while (!need_resched())
- if (cpu_wait)
- (*cpu_wait)();
- schedule();
- }
-}
-
-asmlinkage void ret_from_fork(void);
-
-void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
-{
- unsigned long status;
-
- /* New thread loses kernel privileges. */
- status = regs->cp0_status & ~(ST0_CU0|ST0_FR|ST0_KSU);
- status |= KSU_USER;
- status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR;
- regs->cp0_status = status;
- current->used_math = 0;
- loose_fpu();
- regs->cp0_epc = pc;
- regs->regs[29] = sp;
- current_thread_info()->addr_limit = USER_DS;
-}
-
-void exit_thread(void)
-{
-}
-
-void flush_thread(void)
-{
-}
-
-int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
- unsigned long unused, struct task_struct *p,
- struct pt_regs *regs)
-{
- struct thread_info *ti = p->thread_info;
- struct pt_regs *childregs;
- long childksp;
-
- childksp = (unsigned long)ti + KERNEL_STACK_SIZE - 32;
-
- if (is_fpu_owner()) {
- save_fp(p);
- }
-
- /* set up new TSS. */
- childregs = (struct pt_regs *) childksp - 1;
- *childregs = *regs;
- childregs->regs[7] = 0; /* Clear error flag */
- childregs->regs[2] = 0; /* Child gets zero as return value */
- regs->regs[2] = p->pid;
-
- if (childregs->cp0_status & ST0_CU0) {
- childregs->regs[28] = (unsigned long) ti;
- childregs->regs[29] = childksp;
- ti->addr_limit = KERNEL_DS;
- } else {
- childregs->regs[29] = usp;
- ti->addr_limit = USER_DS;
- }
- p->thread.reg29 = (unsigned long) childregs;
- p->thread.reg31 = (unsigned long) ret_from_fork;
-
- /*
- * New tasks lose permission to use the fpu. This accelerates context
- * switching for most programs since they don't use the fpu.
- */
- p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1|ST0_KSU);
- childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
- p->set_child_tid = p->clear_child_tid = NULL;
-
- return 0;
-}
-
-/* Fill in the fpu structure for a core dump.. */
-int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
-{
- memcpy(r, ¤t->thread.fpu, sizeof(current->thread.fpu));
- return 1;
-}
-
-/*
- * Create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
-{
- int retval;
-
- __asm__ __volatile__(
- " move $6, $sp \n"
- " move $4, %5 \n"
- " li $2, %1 \n"
- " syscall \n"
- " beq $6, $sp, 1f \n"
- " move $4, %3 \n"
- " jalr %4 \n"
- " move $4, $2 \n"
- " li $2, %2 \n"
- " syscall \n"
- "1: move %0, $2"
- : "=r" (retval)
- : "i" (__NR_clone), "i" (__NR_exit), "r" (arg), "r" (fn),
- "r" (flags | CLONE_VM | CLONE_UNTRACED)
- /*
- * The called subroutine might have destroyed any of the
- * at, result, argument or temporary registers ...
- */
- : "$2", "$3", "$4", "$5", "$6", "$7", "$8",
- "$9","$10","$11","$12","$13","$14","$15","$24","$25","$31");
-
- return retval;
-}
-
-struct mips_frame_info {
- int frame_offset;
- int pc_offset;
-};
-static struct mips_frame_info schedule_frame;
-static struct mips_frame_info schedule_timeout_frame;
-static struct mips_frame_info sleep_on_frame;
-static struct mips_frame_info sleep_on_timeout_frame;
-static struct mips_frame_info wait_for_completion_frame;
-static int mips_frame_info_initialized;
-static int __init get_frame_info(struct mips_frame_info *info, void *func)
-{
- int i;
- union mips_instruction *ip = (union mips_instruction *)func;
- info->pc_offset = -1;
- info->frame_offset = -1;
- for (i = 0; i < 128; i++, ip++) {
- /* if jal, jalr, jr, stop. */
- if (ip->j_format.opcode == jal_op ||
- (ip->r_format.opcode == spec_op &&
- (ip->r_format.func == jalr_op ||
- ip->r_format.func == jr_op)))
- break;
- if (ip->i_format.opcode == sd_op &&
- ip->i_format.rs == 29) {
- /* sd $ra, offset($sp) */
- if (ip->i_format.rt == 31) {
- if (info->pc_offset != -1)
- break;
- info->pc_offset =
- ip->i_format.simmediate / sizeof(long);
- }
- /* sd $s8, offset($sp) */
- if (ip->i_format.rt == 30) {
- if (info->frame_offset != -1)
- break;
- info->frame_offset =
- ip->i_format.simmediate / sizeof(long);
- }
- }
- }
- if (info->pc_offset == -1 || info->frame_offset == -1) {
- printk("Can't analyze prologue code at %p\n", func);
- info->pc_offset = -1;
- info->frame_offset = -1;
- return -1;
- }
-
- return 0;
-}
-void __init frame_info_init(void)
-{
- mips_frame_info_initialized =
- !get_frame_info(&schedule_frame, schedule) &&
- !get_frame_info(&schedule_timeout_frame, schedule_timeout) &&
- !get_frame_info(&sleep_on_frame, sleep_on) &&
- !get_frame_info(&sleep_on_timeout_frame, sleep_on_timeout) &&
- !get_frame_info(&wait_for_completion_frame, wait_for_completion);
-}
-
-/*
- * Return saved PC of a blocked thread.
- */
-unsigned long thread_saved_pc(struct thread_struct *t)
-{
- extern void ret_from_fork(void);
-
- /* New born processes are a special case */
- if (t->reg31 == (unsigned long) ret_from_fork)
- return t->reg31;
-
- if (schedule_frame.pc_offset < 0)
- return 0;
- return ((unsigned long *)t->reg29)[schedule_frame.pc_offset];
-}
-
-/*
- * These bracket the sleeping functions..
- */
-extern void scheduling_functions_start_here(void);
-extern void scheduling_functions_end_here(void);
-#define first_sched ((unsigned long) scheduling_functions_start_here)
-#define last_sched ((unsigned long) scheduling_functions_end_here)
-
-/* get_wchan - a maintenance nightmare ... */
-unsigned long get_wchan(struct task_struct *p)
-{
- unsigned long frame, pc;
-
- if (!p || p == current || p->state == TASK_RUNNING)
- return 0;
-
- if (!mips_frame_info_initialized)
- return 0;
- pc = thread_saved_pc(&p->thread);
- if (pc < first_sched || pc >= last_sched)
- goto out;
-
- if (pc >= (unsigned long) sleep_on_timeout)
- goto schedule_timeout_caller;
- if (pc >= (unsigned long) sleep_on)
- goto schedule_caller;
- if (pc >= (unsigned long) interruptible_sleep_on_timeout)
- goto schedule_timeout_caller;
- if (pc >= (unsigned long)interruptible_sleep_on)
- goto schedule_caller;
- if (pc >= (unsigned long)wait_for_completion)
- goto schedule_caller;
- goto schedule_timeout_caller;
-
-schedule_caller:
- frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset];
- if (pc >= (unsigned long) sleep_on)
- pc = ((unsigned long *)frame)[sleep_on_frame.pc_offset];
- else
- pc = ((unsigned long *)frame)[wait_for_completion_frame.pc_offset];
- goto out;
-
-schedule_timeout_caller:
- /* Must be schedule_timeout ... */
- frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset];
-
- /* The schedule_timeout frame ... */
- pc = ((unsigned long *)frame)[schedule_timeout_frame.pc_offset];
-
- if (pc >= first_sched && pc < last_sched) {
- /* schedule_timeout called by [interruptible_]sleep_on_timeout */
- frame = ((unsigned long *)frame)[schedule_timeout_frame.frame_offset];
- pc = ((unsigned long *)frame)[sleep_on_timeout_frame.pc_offset];
- }
-
-out:
- if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */
- pc &= 0xffffffff;
-
- return pc;
-}
diff -Nru a/arch/mips64/kernel/ptrace.c b/arch/mips64/kernel/ptrace.c
--- a/arch/mips64/kernel/ptrace.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,543 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 Ross Biro
- * Copyright (C) Linus Torvalds
- * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 2000 Ulf Carlsson
- *
- * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
- * binaries.
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/errno.h>
-#include <linux/ptrace.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/user.h>
-#include <linux/security.h>
-
-#include <asm/cpu.h>
-#include <asm/fpu.h>
-#include <asm/mipsregs.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/system.h>
-#include <asm/uaccess.h>
-#include <asm/bootinfo.h>
-
-/*
- * Called by kernel/ptrace.c when detaching..
- *
- * Make sure single step bits etc are not set.
- */
-void ptrace_disable(struct task_struct *child)
-{
- /* Nothing to do.. */
-}
-
-/*
- * Tracing a 32-bit process with a 64-bit strace and vice versa will not
- * work. I don't know how to fix this.
- */
-asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
-{
- struct task_struct *child;
- int ret;
-
- lock_kernel();
- ret = -EPERM;
- if (request == PTRACE_TRACEME) {
- /* are we already being traced? */
- if (current->ptrace & PT_PTRACED)
- goto out;
- if ((ret = security_ptrace(current->parent, current)))
- goto out;
- /* set the ptrace bit in the process flags. */
- current->ptrace |= PT_PTRACED;
- ret = 0;
- goto out;
- }
- ret = -ESRCH;
- read_lock(&tasklist_lock);
- child = find_task_by_pid(pid);
- if (child)
- get_task_struct(child);
- read_unlock(&tasklist_lock);
- if (!child)
- goto out;
-
- ret = -EPERM;
- if (pid == 1) /* you may not mess with init */
- goto out_tsk;
-
- if (request == PTRACE_ATTACH) {
- ret = ptrace_attach(child);
- goto out_tsk;
- }
-
- ret = ptrace_check_attach(child, request == PTRACE_KILL);
- if (ret < 0)
- goto out_tsk;
-
- switch (request) {
- /* when I and D space are separate, these will need to be fixed. */
- case PTRACE_PEEKTEXT: /* read word at location addr. */
- case PTRACE_PEEKDATA: {
- unsigned int tmp;
- int copied;
-
- copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
- ret = -EIO;
- if (copied != sizeof(tmp))
- break;
- ret = put_user(tmp, (unsigned int *) (unsigned long) data);
- break;
- }
-
- /* read the word at location addr in the USER area. */
- case PTRACE_PEEKUSR: {
- struct pt_regs *regs;
- unsigned int tmp;
-
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs));
- ret = 0;
-
- switch (addr) {
- case 0 ... 31:
- tmp = regs->regs[addr];
- break;
- case FPR_BASE ... FPR_BASE + 31:
- if (child->used_math) {
- unsigned long long *fregs;
- fregs = (unsigned long long *)get_fpu_regs(child);
- /*
- * The odd registers are actually the high
- * order bits of the values stored in the even
- * registers - unless we're using r2k_switch.S.
- */
- if (addr & 1)
- tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
- else
- tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
- } else {
- tmp = -1; /* FP not yet used */
- }
- break;
- case PC:
- tmp = regs->cp0_epc;
- break;
- case CAUSE:
- tmp = regs->cp0_cause;
- break;
- case BADVADDR:
- tmp = regs->cp0_badvaddr;
- break;
- case MMHI:
- tmp = regs->hi;
- break;
- case MMLO:
- tmp = regs->lo;
- break;
- case FPC_CSR:
- if (cpu_has_fpu)
- tmp = child->thread.fpu.hard.control;
- else
- tmp = child->thread.fpu.soft.sr;
- break;
- case FPC_EIR: { /* implementation / version register */
- unsigned int flags;
- flags = read_c0_status();
- __enable_fpu();
- __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
- write_c0_status(flags);
- break;
- }
- default:
- tmp = 0;
- ret = -EIO;
- goto out_tsk;
- }
- ret = put_user(tmp, (unsigned *) (unsigned long) data);
- break;
- }
- /* when I and D space are separate, this will have to be fixed. */
- case PTRACE_POKETEXT: /* write the word at location addr. */
- case PTRACE_POKEDATA:
- ret = 0;
- if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
- break;
- ret = -EIO;
- break;
-
- case PTRACE_POKEUSR: {
- struct pt_regs *regs;
- ret = 0;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs));
-
- switch (addr) {
- case 0 ... 31:
- regs->regs[addr] = data;
- break;
- case FPR_BASE ... FPR_BASE + 31: {
- unsigned long long *fregs;
- fregs = (unsigned long long *)get_fpu_regs(child);
- if (!child->used_math) {
- /* FP not yet used */
- memset(&child->thread.fpu.hard, ~0,
- sizeof(child->thread.fpu.hard));
- child->thread.fpu.hard.control = 0;
- }
- /*
- * The odd registers are actually the high order bits
- * of the values stored in the even registers - unless
- * we're using r2k_switch.S.
- */
- if (addr & 1) {
- fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
- fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
- } else {
- fregs[addr - FPR_BASE] &= ~0xffffffffLL;
- /* Must cast, lest sign extension fill upper
- bits! */
- fregs[addr - FPR_BASE] |= (unsigned int)data;
- }
- break;
- }
- case PC:
- regs->cp0_epc = data;
- break;
- case MMHI:
- regs->hi = data;
- break;
- case MMLO:
- regs->lo = data;
- break;
- case FPC_CSR:
- if (cpu_has_fpu)
- child->thread.fpu.hard.control = data;
- else
- child->thread.fpu.soft.sr = data;
- break;
- default:
- /* The rest are not allowed. */
- ret = -EIO;
- break;
- }
- break;
- }
- case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
- case PTRACE_CONT: { /* restart after signal. */
- ret = -EIO;
- if ((unsigned int) data > _NSIG)
- break;
- if (request == PTRACE_SYSCALL) {
- set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- }
- else {
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- }
- child->exit_code = data;
- wake_up_process(child);
- ret = 0;
- break;
- }
-
-/*
- * make the child exit. Best I can do is send it a sigkill.
- * perhaps it should be put in the status that it wants to
- * exit.
- */
- case PTRACE_KILL: {
- if (child->state == TASK_ZOMBIE) /* already dead */
- break;
- child->exit_code = SIGKILL;
- wake_up_process(child);
- break;
- }
-
- case PTRACE_DETACH: /* detach a process that was attached. */
- ret = ptrace_detach(child, data);
- break;
-
- default:
- ret = ptrace_request(child, request, addr, data);
- break;
- }
-
-out_tsk:
- put_task_struct(child);
-out:
- unlock_kernel();
- return ret;
-}
-
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
-{
- struct task_struct *child;
- int ret;
-
- lock_kernel();
-#if 0
- printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n",
- (int) request, (int) pid, (unsigned long) addr,
- (unsigned long) data);
-#endif
- ret = -EPERM;
- if (request == PTRACE_TRACEME) {
- /* are we already being traced? */
- if (current->ptrace & PT_PTRACED)
- goto out;
- if ((ret = security_ptrace(current->parent, current)))
- goto out;
- /* set the ptrace bit in the process flags. */
- current->ptrace |= PT_PTRACED;
- ret = 0;
- goto out;
- }
- ret = -ESRCH;
- read_lock(&tasklist_lock);
- child = find_task_by_pid(pid);
- if (child)
- get_task_struct(child);
- read_unlock(&tasklist_lock);
- if (!child)
- goto out;
-
- ret = -EPERM;
- if (pid == 1) /* you may not mess with init */
- goto out_tsk;
-
- if (request == PTRACE_ATTACH) {
- ret = ptrace_attach(child);
- goto out_tsk;
- }
-
- ret = ptrace_check_attach(child, request == PTRACE_KILL);
- if (ret < 0)
- goto out_tsk;
-
- switch (request) {
- /* when I and D space are separate, these will need to be fixed. */
- case PTRACE_PEEKTEXT: /* read word at location addr. */
- case PTRACE_PEEKDATA: {
- unsigned long tmp;
- int copied;
-
- copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
- ret = -EIO;
- if (copied != sizeof(tmp))
- break;
- ret = put_user(tmp,(unsigned long *) data);
- break;
- }
-
- /* read the word at location addr in the USER area. */
- case PTRACE_PEEKUSR: {
- struct pt_regs *regs;
- unsigned long tmp;
-
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs));
- ret = 0;
-
- switch (addr) {
- case 0 ... 31:
- tmp = regs->regs[addr];
- break;
- case FPR_BASE ... FPR_BASE + 31:
- if (child->used_math) {
- unsigned long *fregs = get_fpu_regs(child);
- tmp = fregs[addr - FPR_BASE];
- } else {
- tmp = -EIO;
- }
- break;
- case PC:
- tmp = regs->cp0_epc;
- break;
- case CAUSE:
- tmp = regs->cp0_cause;
- break;
- case BADVADDR:
- tmp = regs->cp0_badvaddr;
- break;
- case MMHI:
- tmp = regs->hi;
- break;
- case MMLO:
- tmp = regs->lo;
- break;
- case FPC_CSR:
- if (cpu_has_fpu)
- tmp = child->thread.fpu.hard.control;
- else
- tmp = child->thread.fpu.soft.sr;
- break;
- case FPC_EIR: { /* implementation / version register */
- unsigned int flags;
- flags = read_c0_status();
- __enable_fpu();
- __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
- write_c0_status(flags);
- break;
- }
- default:
- tmp = 0;
- ret = -EIO;
- goto out_tsk;
- }
- ret = put_user(tmp, (unsigned long *) data);
- break;
- }
- /* when I and D space are separate, this will have to be fixed. */
- case PTRACE_POKETEXT: /* write the word at location addr. */
- case PTRACE_POKEDATA:
- ret = 0;
- if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
- break;
- ret = -EIO;
- break;
-
- case PTRACE_POKEUSR: {
- struct pt_regs *regs;
- ret = 0;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs));
-
- switch (addr) {
- case 0 ... 31:
- regs->regs[addr] = data;
- break;
- case FPR_BASE ... FPR_BASE + 31: {
- unsigned long *fregs = get_fpu_regs(child);
- if (!child->used_math) {
- /* FP not yet used */
- memset(&child->thread.fpu.hard, ~0,
- sizeof(child->thread.fpu.hard));
- child->thread.fpu.hard.control = 0;
- }
- fregs[addr - FPR_BASE] = data;
- break;
- }
- case PC:
- regs->cp0_epc = data;
- break;
- case MMHI:
- regs->hi = data;
- break;
- case MMLO:
- regs->lo = data;
- break;
- case FPC_CSR:
- if (cpu_has_fpu)
- child->thread.fpu.hard.control = data;
- else
- child->thread.fpu.soft.sr = data;
- break;
- default:
- /* The rest are not allowed. */
- ret = -EIO;
- break;
- }
- break;
- }
- case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
- case PTRACE_CONT: { /* restart after signal. */
- ret = -EIO;
- if ((unsigned long) data > _NSIG)
- break;
- if (request == PTRACE_SYSCALL) {
- set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- }
- else {
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- }
- child->exit_code = data;
- wake_up_process(child);
- ret = 0;
- break;
- }
-
-/*
- * make the child exit. Best I can do is send it a sigkill.
- * perhaps it should be put in the status that it wants to
- * exit.
- */
- case PTRACE_KILL: {
- if (child->state == TASK_ZOMBIE) /* already dead */
- break;
- child->exit_code = SIGKILL;
- wake_up_process(child);
- break;
- }
-
- case PTRACE_DETACH: /* detach a process that was attached. */
- ret = ptrace_detach(child, data);
- break;
-
- default:
- ret = ptrace_request(child, request, addr, data);
- break;
- }
-
-out_tsk:
- put_task_struct(child);
-out:
- unlock_kernel();
- return ret;
-}
-
-struct task_work_bf {
-#ifdef __MIPSEB__
- signed need_resched :8;
- unsigned syscall_trace; /* count of syscall interceptors */
- unsigned sigpending;
- unsigned notify_resume; /* request for notification on
- userspace execution resumption */
-#endif
-#ifdef __MIPSEL__
- unsigned notify_resume : 8; /* request for notification on
- userspace execution
- resumption */
- unsigned sigpending : 8;
- unsigned syscall_trace : 8; /* count of syscall
- interceptors */
- signed need_resched : 8;
-#endif
-};
-
-asmlinkage void do_syscall_trace(void)
-{
- if (!test_thread_flag(TIF_SYSCALL_TRACE))
- return;
- if (!(current->ptrace & PT_PTRACED))
- return;
-
- /* The 0x80 provides a way for the tracing parent to distinguish
- between a syscall stop and SIGTRAP delivery */
- current->exit_code = SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
- ? 0x80 : 0);
- preempt_disable();
- current->state = TASK_STOPPED;
- notify_parent(current, SIGCHLD);
- schedule();
- preempt_enable();
- /*
- * this isn't the same as continuing with a signal, but it will do
- * for normal use. strace only continues with a signal if the
- * stopping signal is not SIGTRAP. -brl
- */
- if (current->exit_code) {
- send_sig(current->exit_code, current, 1);
- current->exit_code = 0;
- }
-}
diff -Nru a/arch/mips64/kernel/r4k_cache.S b/arch/mips64/kernel/r4k_cache.S
--- a/arch/mips64/kernel/r4k_cache.S Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 - 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- *
- * Cache error handler
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-
-/*
- * Game over. Go to the button. Press gently. Swear where allowed by
- * legislation.
- */
- LEAF(except_vec2_generic)
- /* Famous last words: unreached */
- mfc0 a1,CP0_ERROREPC
- PRINT("Cache error exception: c0_errorepc == %08x\n")
-1:
- j 1b
- nop
- END(except_vec2_generic)
diff -Nru a/arch/mips64/kernel/r4k_fpu.S b/arch/mips64/kernel/r4k_fpu.S
--- a/arch/mips64/kernel/r4k_fpu.S Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,148 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Save/restore floating point context for signal handlers.
- *
- * Copyright (C) 1996, 1998, 1999, 2001 by Ralf Baechle
- *
- * Multi-arch abstraction and asm macros for easier reading:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/errno.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
- .macro EX insn, reg, src
- .set push
- .set nomacro
-.ex\@: \insn \reg, \src
- .set pop
- .section __ex_table,"a"
- PTR .ex\@, fault
- .previous
- .endm
-
- .set noreorder
- /* Save floating point context */
-LEAF(_save_fp_context)
- mfc0 t1, CP0_STATUS
- sll t2, t1,5
-
- bgez t2, 1f
- cfc1 t1, fcr31
- /* Store the 16 odd double precision registers */
- EX sdc1 $f1, SC_FPREGS+8(a0)
- EX sdc1 $f3, SC_FPREGS+24(a0)
- EX sdc1 $f5, SC_FPREGS+40(a0)
- EX sdc1 $f7, SC_FPREGS+56(a0)
- EX sdc1 $f9, SC_FPREGS+72(a0)
- EX sdc1 $f11, SC_FPREGS+88(a0)
- EX sdc1 $f13, SC_FPREGS+104(a0)
- EX sdc1 $f15, SC_FPREGS+120(a0)
- EX sdc1 $f17, SC_FPREGS+136(a0)
- EX sdc1 $f19, SC_FPREGS+152(a0)
- EX sdc1 $f21, SC_FPREGS+168(a0)
- EX sdc1 $f23, SC_FPREGS+184(a0)
- EX sdc1 $f25, SC_FPREGS+200(a0)
- EX sdc1 $f27, SC_FPREGS+216(a0)
- EX sdc1 $f29, SC_FPREGS+232(a0)
- EX sdc1 $f31, SC_FPREGS+248(a0)
-
- /* Store the 16 even double precision registers */
-1:
- EX sdc1 $f0, SC_FPREGS+0(a0)
- EX sdc1 $f2, SC_FPREGS+16(a0)
- EX sdc1 $f4, SC_FPREGS+32(a0)
- EX sdc1 $f6, SC_FPREGS+48(a0)
- EX sdc1 $f8, SC_FPREGS+64(a0)
- EX sdc1 $f10, SC_FPREGS+80(a0)
- EX sdc1 $f12, SC_FPREGS+96(a0)
- EX sdc1 $f14, SC_FPREGS+112(a0)
- EX sdc1 $f16, SC_FPREGS+128(a0)
- EX sdc1 $f18, SC_FPREGS+144(a0)
- EX sdc1 $f20, SC_FPREGS+160(a0)
- EX sdc1 $f22, SC_FPREGS+176(a0)
- EX sdc1 $f24, SC_FPREGS+192(a0)
- EX sdc1 $f26, SC_FPREGS+208(a0)
- EX sdc1 $f28, SC_FPREGS+224(a0)
- EX sdc1 $f30, SC_FPREGS+240(a0)
- EX sw t1, SC_FPC_CSR(a0)
- cfc1 t0, $0 # implementation/version
- EX sw t0, SC_FPC_EIR(a0)
-
- jr ra
- li v0, 0 # success
- END(_save_fp_context)
-
-/*
- * Restore FPU state:
- * - fp gp registers
- * - cp1 status/control register
- *
- * We base the decision which registers to restore from the signal stack
- * frame on the current content of c0_status, not on the content of the
- * stack frame which might have been changed by the user.
- */
-LEAF(_restore_fp_context)
- mfc0 t1, CP0_STATUS
- sll t0, t1,5
- bgez t0, 1f
- EX lw t0, SC_FPC_CSR(a0)
-
- /* Restore the 16 odd double precision registers only
- * when enabled in the cp0 status register.
- */
- EX ldc1 $f1, SC_FPREGS+8(a0)
- EX ldc1 $f3, SC_FPREGS+24(a0)
- EX ldc1 $f5, SC_FPREGS+40(a0)
- EX ldc1 $f7, SC_FPREGS+56(a0)
- EX ldc1 $f9, SC_FPREGS+72(a0)
- EX ldc1 $f11, SC_FPREGS+88(a0)
- EX ldc1 $f13, SC_FPREGS+104(a0)
- EX ldc1 $f15, SC_FPREGS+120(a0)
- EX ldc1 $f17, SC_FPREGS+136(a0)
- EX ldc1 $f19, SC_FPREGS+152(a0)
- EX ldc1 $f21, SC_FPREGS+168(a0)
- EX ldc1 $f23, SC_FPREGS+184(a0)
- EX ldc1 $f25, SC_FPREGS+200(a0)
- EX ldc1 $f27, SC_FPREGS+216(a0)
- EX ldc1 $f29, SC_FPREGS+232(a0)
- EX ldc1 $f31, SC_FPREGS+248(a0)
-
- /*
- * Restore the 16 even double precision registers
- * when cp1 was enabled in the cp0 status register.
- */
-1: EX ldc1 $f0, SC_FPREGS+0(a0)
- EX ldc1 $f2, SC_FPREGS+16(a0)
- EX ldc1 $f4, SC_FPREGS+32(a0)
- EX ldc1 $f6, SC_FPREGS+48(a0)
- EX ldc1 $f8, SC_FPREGS+64(a0)
- EX ldc1 $f10, SC_FPREGS+80(a0)
- EX ldc1 $f12, SC_FPREGS+96(a0)
- EX ldc1 $f14, SC_FPREGS+112(a0)
- EX ldc1 $f16, SC_FPREGS+128(a0)
- EX ldc1 $f18, SC_FPREGS+144(a0)
- EX ldc1 $f20, SC_FPREGS+160(a0)
- EX ldc1 $f22, SC_FPREGS+176(a0)
- EX ldc1 $f24, SC_FPREGS+192(a0)
- EX ldc1 $f26, SC_FPREGS+208(a0)
- EX ldc1 $f28, SC_FPREGS+224(a0)
- EX ldc1 $f30, SC_FPREGS+240(a0)
- ctc1 t0, fcr31
- jr ra
- li v0, 0 # success
- END(_restore_fp_context)
-
- .type fault@function
- .ent fault
-fault: jr ra
- li v0, -EFAULT # failure
- .end fault
diff -Nru a/arch/mips64/kernel/r4k_genex.S b/arch/mips64/kernel/r4k_genex.S
--- a/arch/mips64/kernel/r4k_genex.S Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,179 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * Low level exception handling
- */
-#include <linux/init.h>
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/exception.h>
-#include <asm/cacheops.h>
-
- BUILD_HANDLER adel ade ade silent /* #4 */
- BUILD_HANDLER ades ade ade silent /* #5 */
- BUILD_HANDLER ibe be cli silent /* #6 */
- BUILD_HANDLER dbe be cli silent /* #7 */
- BUILD_HANDLER bp bp sti silent /* #9 */
- BUILD_HANDLER ri ri sti silent /* #10 */
- BUILD_HANDLER cpu cpu sti silent /* #11 */
- BUILD_HANDLER ov ov sti silent /* #12 */
- BUILD_HANDLER tr tr sti silent /* #13 */
- BUILD_HANDLER fpe fpe fpe silent /* #15 */
- BUILD_HANDLER mdmx mdmx sti silent /* #22 */
- BUILD_HANDLER watch watch sti verbose /* #23 */
- BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
- BUILD_HANDLER reserved reserved sti verbose /* others */
-
-
- __INIT
-
-/* A temporary overflow handler used by check_daddi(). */
-
- BUILD_HANDLER daddi_ov daddi_ov none silent /* #12 */
-
-
-/* General exception handler for CPUs with virtual coherency exception.
- *
- * Be careful when changing this, it has to be at most 256 (as a special
- * exception) bytes to fit into space reserved for the exception handler.
- */
- .set push
- .set noat
-NESTED(except_vec3_r4000, 0, sp)
- mfc0 k1, CP0_CAUSE
- li k0, 31<<2
- andi k1, k1, 0x7c
- .set push
- .set noreorder
- .set nomacro
- beq k1, k0, handle_vced
- li k0, 14<<2
- beq k1, k0, handle_vcei
- dsll k1, k1, 1
- .set pop
- ld k0, exception_handlers(k1)
- jr k0
-
-/*
- * Big shit, we now may have two dirty primary cache lines for the same
- * physical address. We can savely invalidate the line pointed to by
- * c0_badvaddr because after return from this exception handler the load /
- * store will be re-executed.
- */
-handle_vced:
- dmfc0 k0, CP0_BADVADDR
- li k1, -4 # Is this ...
- and k0, k1 # ... really needed?
- mtc0 zero, CP0_TAGLO
- cache Index_Store_Tag_D,(k0)
- cache Hit_Writeback_Inv_SD,(k0)
- dla k0, vced_count
- lw k1, (k0)
- addiu k1, 1
- sw k1, (k0)
- eret
-
-handle_vcei:
- dmfc0 k0, CP0_BADVADDR
- cache Hit_Writeback_Inv_SD,(k0) # also cleans pi
- dla k0, vcei_count
- lw k1, (k0)
- addiu k1, 1
- sw k1, (k0)
- eret
-END(except_vec3_r4000)
- .set pop
-
-
-/* General exception vector for all other CPUs.
- *
- * Be careful when changing this, it has to be at most 128 bytes
- * to fit into space reserved for the exception handler.
- */
- .set push
- .set noat
-NESTED(except_vec3_generic, 0, sp)
-#if R5432_CP0_INTERRUPT_WAR
- mfc0 k0, CP0_INDEX
-#endif
- mfc0 k1, CP0_CAUSE
- andi k1, k1, 0x7c
- dsll k1, k1, 1
- ld k0, exception_handlers(k1)
- jr k0
-END(except_vec3_generic)
- .set pop
-
-
-/*
- * Special interrupt vector for MIPS64 ISA & embedded MIPS processors.
- * This is a dedicated interrupt exception vector which reduces the
- * interrupt processing overhead. The jump instruction will be replaced
- * at the initialization time.
- *
- * Be careful when changing this, it has to be at most 128 bytes
- * to fit into space reserved for the exception handler.
- */
-NESTED(except_vec4, 0, sp)
-1: j 1b /* Dummy, will be replaced */
-END(except_vec4)
-
- /*
- * EJTAG debug exception handler.
- * The EJTAG debug exception entry point is 0xbfc00480, which
- * normally is in the boot PROM, so the boot PROM must do a
- * unconditional jump to this vector.
- */
-NESTED(except_vec_ejtag_debug, 0, sp)
- j ejtag_debug_handler
- nop
- END(except_vec_ejtag_debug)
-
- __FINIT
-
- /*
- * EJTAG debug exception handler.
- */
- NESTED(ejtag_debug_handler, PT_SIZE, sp)
- .set noat
- .set noreorder
- mtc0 k0, CP0_DESAVE
- mfc0 k0, CP0_DEBUG
-
- sll k0, k0, 30 # Check for SDBBP.
- bgez k0, ejtag_return
-
- la k0, ejtag_debug_buffer
- sw k1, 0(k0)
- SAVE_ALL
- jal ejtag_exception_handler
- move a0, sp
- RESTORE_ALL
- la k0, ejtag_debug_buffer
- lw k1, 0(k0)
-
-ejtag_return:
- mfc0 k0, CP0_DESAVE
- .set mips32
- deret
- .set mips0
- nop
- .set at
- END(ejtag_debug_handler)
-
- /*
- * This buffer is reserved for the use of the EJTAG debug
- * handler.
- */
- .data
- EXPORT(ejtag_debug_buffer)
- .fill 8
diff -Nru a/arch/mips64/kernel/r4k_switch.S b/arch/mips64/kernel/r4k_switch.S
--- a/arch/mips64/kernel/r4k_switch.S Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,193 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1998, 1999 by Ralf Baechle
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1994, 1995, 1996, by Andreas Busse
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/offset.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/processor.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/thread_info.h>
-
-#include <asm/asmmacro.h>
-
- .set mips3
-
-/*
- * Offset to the current process status flags, the first 32 bytes of the
- * stack are not used.
- */
-#define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
-
-/*
- * FPU context is saved iff the process has used it's FPU in the current
- * time slice as indicated by TIF_USEDFPU. In any case, the CU1 bit for user
- * space STATUS register should be 0, so that a process *always* starts its
- * userland with FPU disabled after each context switch.
- *
- * FPU will be enabled as soon as the process accesses FPU again, through
- * do_cpu() trap.
- */
-
-/*
- * task_struct *resume(task_struct *prev, task_struct *next,
- * struct thread_info *next_ti))
- */
- .align 5
- LEAF(resume)
- mfc0 t1, CP0_STATUS
- sd t1, THREAD_STATUS(a0)
- cpu_save_nonscratch a0
- sd ra, THREAD_REG31(a0)
-
- /*
- * check if we need to save FPU registers
- */
- ld t3, TASK_THREAD_INFO(a0)
- ld t0, TI_FLAGS(t3)
- li t1, TIF_USEDFPU
- and t2, t0, t1
- beqz t2, 1f
- nor t1, zero, t1
-
- and t0, t0, t1
- sd t0, TI_FLAGS(t3)
-
- /*
- * clear saved user stack CU1 bit
- */
- ld t0, ST_OFF(t3)
- li t1, ~ST0_CU1
- and t0, t0, t1
- sd t0, ST_OFF(t3)
-
-
- sll t2, t0, 5
- bgez t2, 2f
- sdc1 $f0, (THREAD_FPU + 0x00)(a0)
- fpu_save_16odd a0
-2:
- fpu_save_16even a0 t1 # clobbers t1
-1:
-
- /*
- * The order of restoring the registers takes care of the race
- * updating $28, $29 and kernelsp without disabling ints.
- */
- move $28, a2
- cpu_restore_nonscratch a1
-
- daddiu t1, $28, KERNEL_STACK_SIZE-32
- set_saved_sp t1, t0, t2
-
- mfc0 t1, CP0_STATUS /* Do we really need this? */
- li a3, 0xff00
- and t1, a3
- ld a2, THREAD_STATUS(a1)
- nor a3, $0, a3
- and a2, a3
- or a2, t1
- mtc0 a2, CP0_STATUS
- move v0, a0
- jr ra
- END(resume)
-
-/*
- * Save a thread's fp context.
- */
-LEAF(_save_fp)
- mfc0 t0, CP0_STATUS
- sll t1, t0, 5
- bgez t1, 1f # 16 register mode?
- fpu_save_16odd a0
-1:
- fpu_save_16even a0 t1 # clobbers t1
- sdc1 $f0, (THREAD_FPU + 0x00)(a0)
- jr ra
- END(_save_fp)
-
-/*
- * Restore a thread's fp context.
- */
-LEAF(_restore_fp)
- mfc0 t0, CP0_STATUS
- sll t1, t0, 5
- bgez t1, 1f # 16 register mode?
-
- fpu_restore_16odd a0
-1: fpu_restore_16even a0, t0 # clobbers t0
- ldc1 $f0, (THREAD_FPU + 0x00)(a0)
-
- jr ra
- END(_restore_fp)
-
-/*
- * Load the FPU with signalling NANS. This bit pattern we're using has
- * the property that no matter whether considered as single or as double
- * precision represents signaling NANS.
- *
- * We initialize fcr31 to rounding to nearest, no exceptions.
- */
-
-#define FPU_DEFAULT 0x00000000
-
-LEAF(_init_fpu)
- mfc0 t0, CP0_STATUS
- li t1, ST0_CU1
- or t0, t1
- mtc0 t0, CP0_STATUS
- FPU_ENABLE_HAZARD
- sll t0, t0, 5
-
- li t1, FPU_DEFAULT
- ctc1 t1, fcr31
-
- li t0, -1 # SNaN
- bgez t0, 1f # 16 / 32 register mode?
-
- dmtc1 t0, $f1
- dmtc1 t0, $f3
- dmtc1 t0, $f5
- dmtc1 t0, $f7
- dmtc1 t0, $f9
- dmtc1 t0, $f11
- dmtc1 t0, $f13
- dmtc1 t0, $f15
- dmtc1 t0, $f17
- dmtc1 t0, $f19
- dmtc1 t0, $f21
- dmtc1 t0, $f23
- dmtc1 t0, $f25
- dmtc1 t0, $f27
- dmtc1 t0, $f29
- dmtc1 t0, $f31
-
-1: dmtc1 t0, $f0
- dmtc1 t0, $f2
- dmtc1 t0, $f4
- dmtc1 t0, $f6
- dmtc1 t0, $f8
- dmtc1 t0, $f10
- dmtc1 t0, $f12
- dmtc1 t0, $f14
- dmtc1 t0, $f16
- dmtc1 t0, $f18
- dmtc1 t0, $f20
- dmtc1 t0, $f22
- dmtc1 t0, $f24
- dmtc1 t0, $f26
- dmtc1 t0, $f28
- dmtc1 t0, $f30
- jr ra
- END(_init_fpu)
diff -Nru a/arch/mips64/kernel/reset.c b/arch/mips64/kernel/reset.c
--- a/arch/mips64/kernel/reset.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,36 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 by Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/reboot.h>
-#include <asm/reboot.h>
-
-/*
- * Urgs ... Too many MIPS machines to handle this in a generic way.
- * So handle all using function pointers to machine specific
- * functions.
- */
-void (*_machine_restart)(char *command);
-void (*_machine_halt)(void);
-void (*_machine_power_off)(void);
-
-void machine_restart(char *command)
-{
- _machine_restart(command);
-}
-
-void machine_halt(void)
-{
- _machine_halt();
-}
-
-void machine_power_off(void)
-{
- _machine_power_off();
-}
diff -Nru a/arch/mips64/kernel/scall_64.S b/arch/mips64/kernel/scall_64.S
--- a/arch/mips64/kernel/scall_64.S Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,370 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/config.h>
-#include <asm/asm.h>
-#include <linux/errno.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/offset.h>
-#include <asm/unistd.h>
-#include <asm/thread_info.h>
-
-#ifndef CONFIG_BINFMT_ELF32
-/* Neither O32 nor N32, so define handle_sys here */
-#define handle_sys64 handle_sys
-#endif
-
- .align 5
-NESTED(handle_sys64, PT_SIZE, sp)
-#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32)
- /*
- * When 32-bit compatibility is configured scall_o32.S
- * already did this.
- */
- .set noat
- SAVE_SOME
- STI
- .set at
-#endif
- ld t1, PT_EPC(sp) # skip syscall on return
-
- subu t0, v0, __NR_Linux # check syscall number
- sltiu t0, t0, __NR_Linux_syscalls + 1
- daddiu t1, 4 # skip to next instruction
- beqz t0, illegal_syscall
- sd t1, PT_EPC(sp)
-
- dsll t0, v0, 3 # offset into table
- ld t2, (sys_call_table - (__NR_Linux * 8))(t0)
- # syscall routine
-
- sd a3, PT_R26(sp) # save a3 for syscall restarting
-
- LONG_L t0, TI_FLAGS($28)
- bltz t0, syscall_trace_entry # syscall tracing enabled?
-
- jalr t2 # Do The Real Thing (TM)
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sd t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sd v0, PT_R0(sp) # set flag for syscall
- # restarting
-1: sd v0, PT_R2(sp) # result
-
-syscall_exit:
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, syscall_exit_work
-
-FEXPORT(restore_all)
- RESTORE_SOME
- RESTORE_SP
- eret
-
-EXPORT(work_pending)
- andi t0, a2, _TIF_NEED_RESCHED
- bltz t0, work_notifysig
-work_resched:
- jal schedule
-
- mfc0 t0, CP0_STATUS # make sure need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28)
- andi a2, _TIF_WORK_MASK # is there any work to be done
- # other than syscall tracing
- beqz a2, restore_all
- andi t0, a2, _TIF_NEED_RESCHED
- bnez t0, work_resched
-
-work_notifysig: # deal with pending signals and
- # notify-resume requests
- SAVE_STATIC
- move a0, sp
- li a1, 0
- jal do_notify_resume # a2 already loaded
- RESTORE_STATIC
- j restore_all
-
-syscall_exit_work:
- LONG_L t0, TI_FLAGS($28) # current->work.syscall_trace
- bgez t0, work_pending
-
- mfc0 t0, CP0_STATUS # sti
- ori t0, t0, 1
- mtc0 t0, CP0_STATUS
- jal do_syscall_trace
- j resume_userspace
-
-/* ------------------------------------------------------------------------ */
-
-syscall_trace_entry:
- SAVE_STATIC
- sd t2,PT_R1(sp)
- jal do_syscall_trace
- ld t2,PT_R1(sp)
-
- ld a0, PT_R4(sp) # Restore argument registers
- ld a1, PT_R5(sp)
- ld a2, PT_R6(sp)
- ld a3, PT_R7(sp)
- jalr t2
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sd t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sd v0, PT_R0(sp) # set flag for syscall restarting
-1: sd v0, PT_R2(sp) # result
-
- j syscall_exit
-
-illegal_syscall:
- /* This also isn't a 64-bit syscall, throw an error. */
- li v0, ENOSYS # error
- sd v0, PT_R2(sp)
- li t0, 1 # set error flag
- sd t0, PT_R7(sp)
- j syscall_exit
- END(handle_sys64)
-
- .align 3
-sys_call_table:
- PTR sys_read /* 5000 */
- PTR sys_write
- PTR sys_open
- PTR sys_close
- PTR sys_newstat
- PTR sys_newfstat /* 5005 */
- PTR sys_newlstat
- PTR sys_poll
- PTR sys_lseek
- PTR sys_mmap
- PTR sys_mprotect /* 5010 */
- PTR sys_munmap
- PTR sys_brk
- PTR sys_rt_sigaction
- PTR sys_rt_sigprocmask
- PTR sys_ioctl /* 5015 */
- PTR sys_pread64
- PTR sys_pwrite64
- PTR sys_readv
- PTR sys_writev
- PTR sys_access /* 5020 */
- PTR sys_pipe
- PTR sys_select
- PTR sys_sched_yield
- PTR sys_mremap
- PTR sys_msync /* 5025 */
- PTR sys_mincore
- PTR sys_madvise
- PTR sys_shmget
- PTR sys_shmat
- PTR sys_shmctl /* 5030 */
- PTR sys_dup
- PTR sys_dup2
- PTR sys_pause
- PTR sys_nanosleep
- PTR sys_getitimer /* 5035 */
- PTR sys_setitimer
- PTR sys_alarm
- PTR sys_getpid
- PTR sys_sendfile
- PTR sys_socket /* 5040 */
- PTR sys_connect
- PTR sys_accept
- PTR sys_sendto
- PTR sys_recvfrom
- PTR sys_sendmsg /* 5045 */
- PTR sys_recvmsg
- PTR sys_shutdown
- PTR sys_bind
- PTR sys_listen
- PTR sys_getsockname /* 5050 */
- PTR sys_getpeername
- PTR sys_socketpair
- PTR sys_setsockopt
- PTR sys_getsockopt
- PTR sys_clone /* 5055 */
- PTR sys_fork
- PTR sys_execve
- PTR sys_exit
- PTR sys_wait4
- PTR sys_kill /* 5060 */
- PTR sys_newuname
- PTR sys_semget
- PTR sys_semop
- PTR sys_semctl
- PTR sys_shmdt /* 5065 */
- PTR sys_msgget
- PTR sys_msgsnd
- PTR sys_msgrcv
- PTR sys_msgctl
- PTR sys_fcntl /* 5070 */
- PTR sys_flock
- PTR sys_fsync
- PTR sys_fdatasync
- PTR sys_truncate
- PTR sys_ftruncate /* 5075 */
- PTR sys_getdents
- PTR sys_getcwd
- PTR sys_chdir
- PTR sys_fchdir
- PTR sys_rename /* 5080 */
- PTR sys_mkdir
- PTR sys_rmdir
- PTR sys_creat
- PTR sys_link
- PTR sys_unlink /* 5085 */
- PTR sys_symlink
- PTR sys_readlink
- PTR sys_chmod
- PTR sys_fchmod
- PTR sys_chown /* 5090 */
- PTR sys_fchown
- PTR sys_lchown
- PTR sys_umask
- PTR sys_gettimeofday
- PTR sys_getrlimit /* 5095 */
- PTR sys_getrusage
- PTR sys_sysinfo
- PTR sys_times
- PTR sys_ptrace
- PTR sys_getuid /* 5100 */
- PTR sys_syslog
- PTR sys_getgid
- PTR sys_setuid
- PTR sys_setgid
- PTR sys_geteuid /* 5105 */
- PTR sys_getegid
- PTR sys_setpgid
- PTR sys_getppid
- PTR sys_getpgrp
- PTR sys_setsid /* 5110 */
- PTR sys_setreuid
- PTR sys_setregid
- PTR sys_getgroups
- PTR sys_setgroups
- PTR sys_setresuid /* 5115 */
- PTR sys_getresuid
- PTR sys_setresgid
- PTR sys_getresgid
- PTR sys_getpgid
- PTR sys_setfsuid /* 5120 */
- PTR sys_setfsgid
- PTR sys_getsid
- PTR sys_capget
- PTR sys_capset
- PTR sys_rt_sigpending /* 5125 */
- PTR sys_rt_sigtimedwait
- PTR sys_rt_sigqueueinfo
- PTR sys_rt_sigsuspend
- PTR sys_sigaltstack
- PTR sys_utime /* 5130 */
- PTR sys_mknod
- PTR sys_personality
- PTR sys_ustat
- PTR sys_statfs
- PTR sys_fstatfs /* 5135 */
- PTR sys_sysfs
- PTR sys_getpriority
- PTR sys_setpriority
- PTR sys_sched_setparam
- PTR sys_sched_getparam /* 5140 */
- PTR sys_sched_setscheduler
- PTR sys_sched_getscheduler
- PTR sys_sched_get_priority_max
- PTR sys_sched_get_priority_min
- PTR sys_sched_rr_get_interval /* 5145 */
- PTR sys_mlock
- PTR sys_munlock
- PTR sys_mlockall
- PTR sys_munlockall
- PTR sys_vhangup /* 5150 */
- PTR sys_pivot_root
- PTR sys_sysctl
- PTR sys_prctl
- PTR sys_adjtimex
- PTR sys_setrlimit /* 5155 */
- PTR sys_chroot
- PTR sys_sync
- PTR sys_acct
- PTR sys_settimeofday
- PTR sys_mount /* 5160 */
- PTR sys_umount
- PTR sys_swapon
- PTR sys_swapoff
- PTR sys_reboot
- PTR sys_sethostname /* 5165 */
- PTR sys_setdomainname
- PTR sys_ni_syscall /* was create_module */
- PTR sys_init_module
- PTR sys_delete_module
- PTR sys_ni_syscall /* 5170, was get_kernel_syms */
- PTR sys_ni_syscall /* was query_module */
- PTR sys_quotactl
- PTR sys_nfsservctl
- PTR sys_ni_syscall /* res. for getpmsg */
- PTR sys_ni_syscall /* 5175 for putpmsg */
- PTR sys_ni_syscall /* res. for afs_syscall */
- PTR sys_ni_syscall /* res. for security */
- PTR sys_gettid
- PTR sys_readahead
- PTR sys_setxattr /* 5180 */
- PTR sys_lsetxattr
- PTR sys_fsetxattr
- PTR sys_getxattr
- PTR sys_lgetxattr
- PTR sys_fgetxattr /* 5185 */
- PTR sys_listxattr
- PTR sys_llistxattr
- PTR sys_flistxattr
- PTR sys_removexattr
- PTR sys_lremovexattr /* 5190 */
- PTR sys_fremovexattr
- PTR sys_tkill
- PTR sys_time
- PTR sys_futex
- PTR sys_sched_setaffinity /* 5195 */
- PTR sys_sched_getaffinity
- PTR sys_cacheflush
- PTR sys_cachectl
- PTR sys_sysmips
- PTR sys_io_setup /* 5200 */
- PTR sys_io_destroy
- PTR sys_io_getevents
- PTR sys_io_submit
- PTR sys_io_cancel
- PTR sys_exit_group /* 5205 */
- PTR sys_lookup_dcookie
- PTR sys_epoll_create
- PTR sys_epoll_ctl
- PTR sys_epoll_wait
- PTR sys_remap_file_pages /* 5210 */
- PTR sys_rt_sigreturn
- PTR sys_set_tid_address
- PTR sys_restart_syscall
- PTR sys_semtimedop
- PTR sys_fadvise64 /* 5215 */
diff -Nru a/arch/mips64/kernel/scall_n32.S b/arch/mips64/kernel/scall_n32.S
--- a/arch/mips64/kernel/scall_n32.S Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,334 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/config.h>
-#include <asm/asm.h>
-#include <linux/errno.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/unistd.h>
-
-/* This duplicates the definition from <linux/sched.h> */
-#define PT_TRACESYS 0x00000002 /* tracing system calls */
-
-/* This duplicates the definition from <asm/signal.h> */
-#define SIGILL 4 /* Illegal instruction (ANSI). */
-
-#ifndef CONFIG_MIPS32_O32
-/* No O32, so define handle_sys here */
-#define handle_sysn32 handle_sys
-#endif
-
- .align 5
-NESTED(handle_sysn32, PT_SIZE, sp)
-#ifndef CONFIG_MIPS32_O32
- .set noat
- SAVE_SOME
- STI
- .set at
-#endif
- ld t1, PT_EPC(sp) # skip syscall on return
-
- subu t0, v0, __NR_N32_Linux # check syscall number
- sltiu t0, t0, __NR_N32_Linux_syscalls + 1
- daddiu t1, 4 # skip to next instruction
- beqz t0, not_n32_scall
- sd t1, PT_EPC(sp)
-
- dsll t0, v0, 3 # offset into table
- ld t2, (sysn32_call_table - (__NR_N32_Linux * 8))(t0)
-
- sd a3, PT_R26(sp) # save a3 for syscall restarting
-
- LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
- bltz t0, n32_syscall_trace_entry
-
- jalr t2 # Do The Real Thing (TM)
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sd t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sd v0, PT_R0(sp) # set flag for syscall restarting
-1: sd v0, PT_R2(sp) # result
-
-FEXPORT(n32_syscall_exit)
- mfc0 t0, CP0_STATUS # make sure need_resched and
- xori t0, t0, 1 # signals dont change between
- ori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, n32_syscall_exit_work
-
-restore_all:
- RESTORE_SOME
- RESTORE_SP
- eret
-
-n32_syscall_exit_work:
- SAVE_STATIC
- j syscall_exit_work
-
-/* ------------------------------------------------------------------------ */
-
-n32_syscall_trace_entry:
- SAVE_STATIC
- sd t2,PT_R1(sp)
- jal do_syscall_trace
- ld t2,PT_R1(sp)
-
- ld a0, PT_R4(sp) # Restore argument registers
- ld a1, PT_R5(sp)
- ld a2, PT_R6(sp)
- ld a3, PT_R7(sp)
- jalr t2
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sd t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sd v0, PT_R0(sp) # set flag for syscall restarting
-1: sd v0, PT_R2(sp) # result
-
- j n32_syscall_exit
-
-not_n32_scall:
- /* This is not an n32 compatibility syscall, pass it on to
- the n64 syscall handlers. */
- j handle_sys64
-
- END(handle_sysn32)
-
-EXPORT(sysn32_call_table)
- PTR sys_read /* 6000 */
- PTR sys_write
- PTR sys_open
- PTR sys_close
- PTR sys_newstat
- PTR sys_newfstat /* 6005 */
- PTR sys_newlstat
- PTR sys_poll
- PTR sys_lseek
- PTR sys_mmap
- PTR sys_mprotect /* 6010 */
- PTR sys_munmap
- PTR sys_brk
- PTR sys32_rt_sigaction
- PTR sys32_rt_sigprocmask
- PTR compat_sys_ioctl /* 6015 */
- PTR sys_pread64
- PTR sys_pwrite64
- PTR sys32_readv
- PTR sys32_writev
- PTR sys_access /* 6020 */
- PTR sys_pipe
- PTR sys32_select
- PTR sys_sched_yield
- PTR sys_mremap
- PTR sys_msync /* 6025 */
- PTR sys_mincore
- PTR sys_madvise
- PTR sys_shmget
- PTR sys_shmat
- PTR sys_shmctl /* 6030 */
- PTR sys_dup
- PTR sys_dup2
- PTR sys_pause
- PTR compat_sys_nanosleep
- PTR compat_sys_getitimer /* 6035 */
- PTR compat_sys_setitimer
- PTR sys_alarm
- PTR sys_getpid
- PTR sys32_sendfile
- PTR sys_socket /* 6040 */
- PTR sys_connect
- PTR sys_accept
- PTR sys_sendto
- PTR sys_recvfrom
- PTR compat_sys_sendmsg /* 6045 */
- PTR compat_sys_recvmsg
- PTR sys_shutdown
- PTR sys_bind
- PTR sys_listen
- PTR sys_getsockname /* 6050 */
- PTR sys_getpeername
- PTR sys_socketpair
- PTR compat_sys_setsockopt
- PTR sys_getsockopt
- PTR sys_clone /* 6055 */
- PTR sys_fork
- PTR sys32_execve
- PTR sys_exit
- PTR sys32_wait4
- PTR sys_kill /* 6060 */
- PTR sys32_newuname
- PTR sys_semget
- PTR sys_semop
- PTR sys_semctl
- PTR sys_shmdt /* 6065 */
- PTR sys_msgget
- PTR sys_msgsnd
- PTR sys_msgrcv
- PTR sys_msgctl
- PTR compat_sys_fcntl /* 6070 */
- PTR sys_flock
- PTR sys_fsync
- PTR sys_fdatasync
- PTR sys_truncate
- PTR sys_ftruncate /* 6075 */
- PTR sys32_getdents
- PTR sys_getcwd
- PTR sys_chdir
- PTR sys_fchdir
- PTR sys_rename /* 6080 */
- PTR sys_mkdir
- PTR sys_rmdir
- PTR sys_creat
- PTR sys_link
- PTR sys_unlink /* 6085 */
- PTR sys_symlink
- PTR sys_readlink
- PTR sys_chmod
- PTR sys_fchmod
- PTR sys_chown /* 6090 */
- PTR sys_fchown
- PTR sys_lchown
- PTR sys_umask
- PTR sys32_gettimeofday
- PTR compat_sys_getrlimit /* 6095 */
- PTR compat_sys_getrusage
- PTR sys32_sysinfo
- PTR compat_sys_times
- PTR sys_ptrace
- PTR sys_getuid /* 6100 */
- PTR sys_syslog
- PTR sys_getgid
- PTR sys_setuid
- PTR sys_setgid
- PTR sys_geteuid /* 6105 */
- PTR sys_getegid
- PTR sys_setpgid
- PTR sys_getppid
- PTR sys_getpgrp
- PTR sys_setsid /* 6110 */
- PTR sys_setreuid
- PTR sys_setregid
- PTR sys_getgroups
- PTR sys_setgroups
- PTR sys_setresuid /* 6115 */
- PTR sys_getresuid
- PTR sys_setresgid
- PTR sys_getresgid
- PTR sys_getpgid
- PTR sys_setfsuid /* 6120 */
- PTR sys_setfsgid
- PTR sys_getsid
- PTR sys_capget
- PTR sys_capset
- PTR sys32_rt_sigpending /* 6125 */
- PTR sys32_rt_sigtimedwait
- PTR sys32_rt_sigqueueinfo
- PTR sys32_rt_sigsuspend
- PTR sys32_sigaltstack
- PTR compat_sys_utime /* 6130 */
- PTR sys_mknod
- PTR sys32_personality
- PTR sys_ustat
- PTR compat_sys_statfs
- PTR compat_sys_fstatfs /* 6135 */
- PTR sys_sysfs
- PTR sys_getpriority
- PTR sys_setpriority
- PTR sys_sched_setparam
- PTR sys_sched_getparam /* 6140 */
- PTR sys_sched_setscheduler
- PTR sys_sched_getscheduler
- PTR sys_sched_get_priority_max
- PTR sys_sched_get_priority_min
- PTR sys32_sched_rr_get_interval /* 6145 */
- PTR sys_mlock
- PTR sys_munlock
- PTR sys_mlockall
- PTR sys_munlockall
- PTR sys_vhangup /* 6150 */
- PTR sys_pivot_root
- PTR sys32_sysctl
- PTR sys_prctl
- PTR sys32_adjtimex
- PTR compat_sys_setrlimit /* 6155 */
- PTR sys_chroot
- PTR sys_sync
- PTR sys_acct
- PTR sys32_settimeofday
- PTR sys_mount /* 6160 */
- PTR sys_umount
- PTR sys_swapon
- PTR sys_swapoff
- PTR sys_reboot
- PTR sys_sethostname /* 6165 */
- PTR sys_setdomainname
- PTR sys_ni_syscall /* was create_module */
- PTR sys_init_module
- PTR sys_delete_module
- PTR sys_ni_syscall /* 6170, was get_kernel_syms */
- PTR sys_ni_syscall /* was query_module */
- PTR sys_quotactl
- PTR sys_nfsservctl
- PTR sys_ni_syscall /* res. for getpmsg */
- PTR sys_ni_syscall /* 6175 for putpmsg */
- PTR sys_ni_syscall /* res. for afs_syscall */
- PTR sys_ni_syscall /* res. for security */
- PTR sys_gettid
- PTR sys32_readahead
- PTR sys_setxattr /* 6180 */
- PTR sys_lsetxattr
- PTR sys_fsetxattr
- PTR sys_getxattr
- PTR sys_lgetxattr
- PTR sys_fgetxattr /* 6185 */
- PTR sys_listxattr
- PTR sys_llistxattr
- PTR sys_flistxattr
- PTR sys_removexattr
- PTR sys_lremovexattr /* 6190 */
- PTR sys_fremovexattr
- PTR sys_tkill
- PTR sys_time
- PTR compat_sys_futex
- PTR sys32_sched_setaffinity /* 6195 */
- PTR sys32_sched_getaffinity
- PTR sys_cacheflush
- PTR sys_cachectl
- PTR sys_sysmips
- PTR sys_io_setup /* 6200 */
- PTR sys_io_destroy
- PTR sys_io_getevents
- PTR sys_io_submit
- PTR sys_io_cancel
- PTR sys_exit_group /* 6205 */
- PTR sys_lookup_dcookie
- PTR sys_epoll_create
- PTR sys_epoll_ctl
- PTR sys_epoll_wait
- PTR sys_remap_file_pages /* 6210 */
- PTR sys_ni_syscall
- PTR sys_fcntl
- PTR sys_set_tid_address
- PTR sys_restart_syscall
- PTR sys_semtimedop /* 6215 */
- PTR sys_fadvise64
- PTR sys_statfs64
- PTR sys_fstatfs64
diff -Nru a/arch/mips64/kernel/scall_o32.S b/arch/mips64/kernel/scall_o32.S
--- a/arch/mips64/kernel/scall_o32.S Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,578 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- *
- * Hairy, the userspace application uses a different argument passing
- * convention than the kernel, so we have to translate things from o32
- * to ABI64 calling convention. 64-bit syscalls are also processed
- * here for now.
- */
-#include <asm/asm.h>
-#include <linux/errno.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/unistd.h>
-#include <asm/sysmips.h>
-
- .align 5
-NESTED(handle_sys, PT_SIZE, sp)
- .set noat
- SAVE_SOME
- STI
- .set at
- ld t1, PT_EPC(sp) # skip syscall on return
-
- subu t0, v0, __NR_O32_Linux # check syscall number
- sltiu t0, t0, __NR_O32_Linux_syscalls + 1
- daddiu t1, 4 # skip to next instruction
- beqz t0, not_o32_scall
- sd t1, PT_EPC(sp)
-#if 0
- SAVE_ALL
- move a1, v0
- PRINT("Scall %ld\n")
- RESTORE_ALL
-#endif
-
- sll a0, a0, 0
- sll a1, a1, 0
- sll a2, a2, 0
- sll a3, a3, 0
-
- /* XXX Put both in one cacheline, should save a bit. */
- dsll t0, v0, 3 # offset into table
- ld t2, (sys_call_table - (__NR_O32_Linux * 8))(t0)
- lbu t3, (sys_narg_table - __NR_O32_Linux)(v0)
-
- subu t0, t3, 5 # 5 or more arguments?
- sd a3, PT_R26(sp) # save a3 for syscall restarting
- bgez t0, stackargs
-
-stack_done:
- LONG_L t0, TI_FLAGS($28)
- # syscall tracing enabled?
- bnez t0, trace_a_syscall
-
- jalr t2 # Do The Real Thing (TM)
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sd t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sd v0, PT_R0(sp) # flag for syscall restarting
-1: sd v0, PT_R2(sp) # result
-
-FEXPORT(o32_syscall_exit)
- mfc0 t0, CP0_STATUS # make need_resched and
- ori t0, t0, 1 # signals dont change between
- xori t0, t0, 1 # sampling and return
- mtc0 t0, CP0_STATUS
- SSNOP; SSNOP; SSNOP
-
- LONG_L a2, TI_FLAGS($28)
- bnez a2, o32_syscall_exit_work
-
-restore_all: RESTORE_SOME
- RESTORE_SP
- eret
-
-o32_syscall_exit_work:
- SAVE_STATIC
- j syscall_exit_work
-
-/* ------------------------------------------------------------------------ */
-
-trace_a_syscall:
- SAVE_STATIC
- sd a4, PT_R8(sp)
- sd a5, PT_R9(sp)
- sd a6, PT_R10(sp)
- sd a7, PT_R11(sp)
-
- sd t2,PT_R1(sp)
- jal do_syscall_trace
- ld t2,PT_R1(sp)
-
- ld a0, PT_R4(sp) # Restore argument registers
- ld a1, PT_R5(sp)
- ld a2, PT_R6(sp)
- ld a3, PT_R7(sp)
- ld a4, PT_R8(sp)
- ld a5, PT_R9(sp)
-
- jalr t2
-
- li t0, -EMAXERRNO - 1 # error?
- sltu t0, t0, v0
- sd t0, PT_R7(sp) # set error flag
- beqz t0, 1f
-
- negu v0 # error
- sd v0, PT_R0(sp) # set flag for syscall restarting
-1: sd v0, PT_R2(sp) # result
-
- j syscall_exit
-
-/* ------------------------------------------------------------------------ */
-
- /*
- * More than four arguments. Try to deal with it by copying the
- * stack arguments from the user stack to the kernel stack.
- * This Sucks (TM).
- */
-stackargs:
- ld t0, PT_R29(sp) # get old user stack pointer
- subu t3, 4
- sll t1, t3, 2 # stack valid?
-
- addu t1, t0 # end address
- or t0, t1
- bltz t0, bad_stack # -> sp is bad
-
- ld t0, PT_R29(sp) # get old user stack pointer
- PTR_LA t1, 3f # copy 1 to 2 arguments
- sll t3, t3, 2
- subu t1, t3
- jr t1
-
- /* Ok, copy the args from the luser stack to the kernel stack */
- .set push
- .set noreorder
- .set nomacro
-1: lw a5, 20(t0) # argument #6 from usp
-2: lw a4, 16(t0) # argument #5 from usp
-3: .set pop
-
- j stack_done # go back
-
- .section __ex_table,"a"
- PTR 1b, bad_stack
- PTR 2b, bad_stack
- .previous
-
- /*
- * The stackpointer for a call with more than 4 arguments is bad.
- */
-bad_stack:
- negu v0 # error
- sd v0, PT_R0(sp)
- sd v0, PT_R2(sp)
- li t0, 1 # set error flag
- sd t0, PT_R7(sp)
- j o32_syscall_exit
-
-not_o32_scall:
- /*
- * This is not an o32 compatibility syscall, pass it on
- * to the 64-bit syscall handlers.
- */
-#ifdef CONFIG_MIPS32_N32
- j handle_sysn32
-#else
- j handle_sys64
-#endif
-
-illegal_syscall:
- /* This also isn't a 64-bit syscall, throw an error. */
- li v0, ENOSYS # error
- sd v0, PT_R2(sp)
- li t0, 1 # set error flag
- sd t0, PT_R7(sp)
- j o32_syscall_exit
- END(handle_sys)
-
-LEAF(mips_atomic_set)
- andi v0, a1, 3 # must be word aligned
- bnez v0, bad_alignment
-
- ld v1, TI_ADDR_LIMIT($28) # in legal address range?
- daddiu a0, a1, 4
- or a0, a0, a1
- and a0, a0, v1
- bnez a0, bad_address
-
- /* Ok, this is the ll/sc case. World is sane :-) */
-1: ll v0, (a1)
- move a0, a2
-2: sc a0, (a1)
- beqz a0, 1b
-
- .section __ex_table,"a"
- PTR 1b, bad_stack
- PTR 2b, bad_stack
- .previous
-
-1: sd v0, PT_R2(sp) # result
-
- /* Success, so skip usual error handling garbage. */
- LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
- bltz t0, 1f
- b o32_syscall_exit
-
-1: SAVE_STATIC
- jal do_syscall_trace
- li a3, 0 # success
- j syscall_exit
-
-bad_address:
- li v0, -EFAULT
- jr ra
-
-bad_alignment:
- li v0, -EINVAL
- jr ra
- END(mips_atomic_set)
-
-LEAF(sys32_sysmips)
- beq a0, MIPS_ATOMIC_SET, mips_atomic_set
- j sys_sysmips
- END(sys32_sysmips)
-
-LEAF(sys32_syscall)
- ld t0, PT_R29(sp) # user sp
-
- sltu v0, a0, __NR_O32_Linux + __NR_O32_Linux_syscalls + 1
- beqz v0, enosys
-
- dsll v0, a0, 3
- dla v1, sys32_syscall
- ld t2, (sys_call_table - (__NR_O32_Linux * 8))(v0)
- lbu t3, (sys_narg_table - __NR_O32_Linux)(a0)
-
- li v0, -EINVAL
- beq t2, v1, out # do not recurse
-
- beqz t2, enosys # null function pointer?
-
- andi v0, t0, 0x3 # unaligned stack pointer?
- bnez v0, sigsegv
-
- daddiu v0, t0, 16 # v0 = usp + 16
- daddu t1, v0, 12 # 3 32-bit arguments
- ld v1, TI_ADDR_LIMIT($28)
- or v0, v0, t1
- and v1, v1, v0
- bnez v1, efault
-
- move a0, a1 # shift argument registers
- move a1, a2
- move a2, a3
-
-1: lw a3, 16(t0)
-2: lw t3, 20(t0)
-3: lw t1, 24(t0)
-
- .section __ex_table,"a"
- PTR 1b, efault
- PTR 2b, efault
- PTR 3b, efault
- .previous
-
- sw t3, 16(sp) # put into new stackframe
- sw t1, 20(sp)
-
- bnez t1, 1f # zero arguments?
- daddu a0, sp, 32 # then pass sp in a0
-1:
-
- sw t3, 16(sp)
- sw v1, 20(sp)
- jr t2
- /* Unreached */
-
-enosys: li v0, -ENOSYS
- b out
-
-sigsegv:
- li a0, _SIGSEGV
- move a1, $28
- jal force_sig
- /* Fall through */
-
-efault: li v0, -EFAULT
-
-out: jr ra
- END(sys32_syscall)
-
- .macro syscalltable
- sys sys32_syscall 0 /* 4000 */
- sys sys_exit 1
- sys sys_fork 0
- sys sys_read 3
- sys sys_write 3
- sys sys_open 3 /* 4005 */
- sys sys_close 1
- sys sys_waitpid 3
- sys sys_creat 2
- sys sys_link 2
- sys sys_unlink 1 /* 4010 */
- sys sys32_execve 0
- sys sys_chdir 1
- sys sys_time 1
- sys sys_mknod 3
- sys sys_chmod 2 /* 4015 */
- sys sys_lchown 3
- sys sys_ni_syscall 0
- sys sys_ni_syscall 0 /* was sys_stat */
- sys sys_lseek 3
- sys sys_getpid 0 /* 4020 */
- sys sys_mount 5
- sys sys_oldumount 1
- sys sys_setuid 1
- sys sys_getuid 0
- sys sys_stime 1 /* 4025 */
- sys sys32_ptrace 4
- sys sys_alarm 1
- sys sys_ni_syscall 0 /* was sys_fstat */
- sys sys_pause 0
- sys compat_sys_utime 2 /* 4030 */
- sys sys_ni_syscall 0
- sys sys_ni_syscall 0
- sys sys_access 2
- sys sys_nice 1
- sys sys_ni_syscall 0 /* 4035 */
- sys sys_sync 0
- sys sys_kill 2
- sys sys_rename 2
- sys sys_mkdir 2
- sys sys_rmdir 1 /* 4040 */
- sys sys_dup 1
- sys sys_pipe 0
- sys compat_sys_times 1
- sys sys_ni_syscall 0
- sys sys_brk 1 /* 4045 */
- sys sys_setgid 1
- sys sys_getgid 0
- sys sys_ni_syscall 0 /* was signal 2 */
- sys sys_geteuid 0
- sys sys_getegid 0 /* 4050 */
- sys sys_acct 0
- sys sys_umount 2
- sys sys_ni_syscall 0
- sys compat_sys_ioctl 3
- sys compat_sys_fcntl 3 /* 4055 */
- sys sys_ni_syscall 2
- sys sys_setpgid 2
- sys sys_ni_syscall, 0
- sys sys_ni_syscall 0 /* was sys_olduname */
- sys sys_umask 1 /* 4060 */
- sys sys_chroot 1
- sys sys_ustat 2
- sys sys_dup2 2
- sys sys_getppid 0
- sys sys_getpgrp 0 /* 4065 */
- sys sys_setsid 0
- sys sys32_sigaction 3
- sys sys_sgetmask 0
- sys sys_ssetmask 1
- sys sys_setreuid 2 /* 4070 */
- sys sys_setregid 2
- sys sys32_sigsuspend 0
- sys compat_sys_sigpending 1
- sys sys_sethostname 2
- sys compat_sys_setrlimit 2 /* 4075 */
- sys compat_sys_getrlimit 2
- sys compat_sys_getrusage 2
- sys sys32_gettimeofday 2
- sys sys32_settimeofday 2
- sys sys_getgroups 2 /* 4080 */
- sys sys_setgroups 2
- sys sys_ni_syscall 0 /* old_select */
- sys sys_symlink 2
- sys sys_ni_syscall 0 /* was sys_lstat */
- sys sys_readlink 3 /* 4085 */
- sys sys_uselib 1
- sys sys_swapon 2
- sys sys_reboot 3
- sys sys32_readdir 3
- sys sys_mmap 6 /* 4090 */
- sys sys_munmap 2
- sys sys_truncate 2
- sys sys_ftruncate 2
- sys sys_fchmod 2
- sys sys_fchown 3 /* 4095 */
- sys sys_getpriority 2
- sys sys_setpriority 3
- sys sys_ni_syscall 0
- sys compat_sys_statfs 2
- sys compat_sys_fstatfs 2 /* 4100 */
- sys sys_ni_syscall 0 /* sys_ioperm */
- sys sys_socketcall 2
- sys sys_syslog 3
- sys compat_sys_setitimer 3
- sys compat_sys_getitimer 2 /* 4105 */
- sys compat_sys_newstat 2
- sys compat_sys_newlstat 2
- sys compat_sys_newfstat 2
- sys sys_ni_syscall 0 /* was sys_uname */
- sys sys_ni_syscall 0 /* sys_ioperm *//* 4110 */
- sys sys_vhangup 0
- sys sys_ni_syscall 0 /* was sys_idle */
- sys sys_ni_syscall 0 /* sys_vm86 */
- sys sys32_wait4 4
- sys sys_swapoff 1 /* 4115 */
- sys sys32_sysinfo 1
- sys sys32_ipc 6
- sys sys_fsync 1
- sys sys32_sigreturn 0
- sys sys_clone 0 /* 4120 */
- sys sys_setdomainname 2
- sys sys32_newuname 1
- sys sys_ni_syscall 0 /* sys_modify_ldt */
- sys sys32_adjtimex 1
- sys sys_mprotect 3 /* 4125 */
- sys compat_sys_sigprocmask 3
- sys sys_ni_syscall 0 /* was creat_module */
- sys sys_init_module 5
- sys sys_delete_module 1
- sys sys_ni_syscall 0 /* 4130, get_kernel_syms */
- sys sys_quotactl 0
- sys sys_getpgid 1
- sys sys_fchdir 1
- sys sys_bdflush 2
- sys sys_sysfs 3 /* 4135 */
- sys sys32_personality 1
- sys sys_ni_syscall 0 /* for afs_syscall */
- sys sys_setfsuid 1
- sys sys_setfsgid 1
- sys sys32_llseek 5 /* 4140 */
- sys sys32_getdents 3
- sys sys32_select 5
- sys sys_flock 2
- sys sys_msync 3
- sys sys32_readv 3 /* 4145 */
- sys sys32_writev 3
- sys sys_cacheflush 3
- sys sys_cachectl 3
- sys sys32_sysmips 4
- sys sys_ni_syscall 0 /* 4150 */
- sys sys_getsid 1
- sys sys_fdatasync 0
- sys sys32_sysctl 1
- sys sys_mlock 2
- sys sys_munlock 2 /* 4155 */
- sys sys_mlockall 1
- sys sys_munlockall 0
- sys sys_sched_setparam 2
- sys sys_sched_getparam 2
- sys sys_sched_setscheduler 3 /* 4160 */
- sys sys_sched_getscheduler 1
- sys sys_sched_yield 0
- sys sys_sched_get_priority_max 1
- sys sys_sched_get_priority_min 1
- sys sys32_sched_rr_get_interval 2 /* 4165 */
- sys compat_sys_nanosleep 2
- sys sys_mremap 4
- sys sys_accept 3
- sys sys_bind 3
- sys sys_connect 3 /* 4170 */
- sys sys_getpeername 3
- sys sys_getsockname 3
- sys sys_getsockopt 5
- sys sys_listen 2
- sys sys_recv 4 /* 4175 */
- sys sys_recvfrom 6
- sys compat_sys_recvmsg 3
- sys sys_send 4
- sys compat_sys_sendmsg 3
- sys sys_sendto 6 /* 4180 */
- sys compat_sys_setsockopt 5
- sys sys_shutdown 2
- sys sys_socket 3
- sys sys_socketpair 4
- sys sys_setresuid 3 /* 4185 */
- sys sys_getresuid 3
- sys sys_ni_syscall 0 /* was query_module */
- sys sys_poll 3
- sys sys_nfsservctl 3
- sys sys_setresgid 3 /* 4190 */
- sys sys_getresgid 3
- sys sys_prctl 5
- sys sys32_rt_sigreturn 0
- sys sys32_rt_sigaction 4
- sys sys32_rt_sigprocmask 4 /* 4195 */
- sys sys32_rt_sigpending 2
- sys sys32_rt_sigtimedwait 4
- sys sys32_rt_sigqueueinfo 3
- sys sys32_rt_sigsuspend 0
- sys sys32_pread 6 /* 4200 */
- sys sys32_pwrite 6
- sys sys_chown 3
- sys sys_getcwd 2
- sys sys_capget 2
- sys sys_capset 2 /* 4205 */
- sys sys32_sigaltstack 0
- sys sys32_sendfile 4
- sys sys_ni_syscall 0
- sys sys_ni_syscall 0
- sys sys32_mmap2 6 /* 4210 */
- sys sys32_truncate64 4
- sys sys32_ftruncate64 4
- sys sys_newstat 2
- sys sys_newlstat 2
- sys sys_newfstat 2 /* 4215 */
- sys sys_pivot_root 2
- sys sys_mincore 3
- sys sys_madvise 3
- sys sys_getdents64 3
- sys compat_sys_fcntl64 3 /* 4220 */
- sys sys_ni_syscall 0
- sys sys_gettid 0
- sys sys32_readahead 5
- sys sys_setxattr 5
- sys sys_lsetxattr 5 /* 4225 */
- sys sys_fsetxattr 5
- sys sys_getxattr 4
- sys sys_lgetxattr 4
- sys sys_fgetxattr 4
- sys sys_listxattr 3 /* 4230 */
- sys sys_llistxattr 3
- sys sys_flistxattr 3
- sys sys_removexattr 2
- sys sys_lremovexattr 2
- sys sys_fremovexattr 2 /* 4235 */
- sys sys_tkill 2
- sys sys_sendfile64 5
- sys compat_sys_futex 5
- sys sys32_sched_setaffinity 3
- sys sys32_sched_getaffinity 3 /* 4240 */
- sys sys_io_setup 2
- sys sys_io_destroy 1
- sys sys_io_getevents 5
- sys sys_io_submit 3
- sys sys_io_cancel 3 /* 4245 */
- sys sys_exit_group 1
- sys sys_lookup_dcookie 3
- sys sys_epoll_create 1
- sys sys_epoll_ctl 4
- sys sys_epoll_wait 3 /* 4250 */
- sys sys_remap_file_pages 5
- sys sys_set_tid_address 1
- sys sys_restart_syscall 0
- sys sys_fadvise64 6
- sys sys_statfs64 3 /* 4255 */
- sys sys_fstatfs64 2
- .endm
-
- .macro sys function, nargs
- PTR \function
- .endm
-
- .align 3
-sys_call_table:
- syscalltable
-
- .macro sys function, nargs
- .byte \nargs
- .endm
-
-sys_narg_table:
- syscalltable
diff -Nru a/arch/mips64/kernel/semaphore.c b/arch/mips64/kernel/semaphore.c
--- a/arch/mips64/kernel/semaphore.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,129 +0,0 @@
-/*
- * Generic semaphore code. Buyer beware. Do your own
- * specific changes in <asm/semaphore-helper.h>
- */
-
-#include <linux/sched.h>
-#include <asm/semaphore-helper.h>
-
-/*
- * Semaphores are implemented using a two-way counter:
- * The "count" variable is decremented for each process
- * that tries to sleep, while the "waking" variable is
- * incremented when the "up()" code goes to wake up waiting
- * processes.
- *
- * Notably, the inline "up()" and "down()" functions can
- * efficiently test if they need to do any extra work (up
- * needs to do something only if count was negative before
- * the increment operation.
- *
- * waking_non_zero() (from asm/semaphore.h) must execute
- * atomically.
- *
- * When __up() is called, the count was negative before
- * incrementing it, and we need to wake up somebody.
- *
- * This routine adds one to the count of processes that need to
- * wake up and exit. ALL waiting processes actually wake up but
- * only the one that gets to the "waking" field first will gate
- * through and acquire the semaphore. The others will go back
- * to sleep.
- *
- * Note that these functions are only called when there is
- * contention on the lock, and as such all this is the
- * "non-critical" part of the whole semaphore business. The
- * critical part is the inline stuff in <asm/semaphore.h>
- * where we want to avoid any extra jumps and calls.
- */
-void __up(struct semaphore *sem)
-{
- wake_one_more(sem);
- wake_up(&sem->wait);
-}
-
-/*
- * Perform the "down" function. Return zero for semaphore acquired,
- * return negative for signalled out of the function.
- *
- * If called from __down, the return is ignored and the wait loop is
- * not interruptible. This means that a task waiting on a semaphore
- * using "down()" cannot be killed until someone does an "up()" on
- * the semaphore.
- *
- * If called from __down_interruptible, the return value gets checked
- * upon return. If the return value is negative then the task continues
- * with the negative value in the return register (it can be tested by
- * the caller).
- *
- * Either form may be used in conjunction with "up()".
- *
- */
-
-#define DOWN_VAR \
- struct task_struct *tsk = current; \
- wait_queue_t wait; \
- init_waitqueue_entry(&wait, tsk);
-
-#define DOWN_HEAD(task_state) \
- \
- \
- tsk->state = (task_state); \
- add_wait_queue(&sem->wait, &wait); \
- \
- /* \
- * Ok, we're set up. sem->count is known to be less than zero \
- * so we must wait. \
- * \
- * We can let go the lock for purposes of waiting. \
- * We re-acquire it after awaking so as to protect \
- * all semaphore operations. \
- * \
- * If "up()" is called before we call waking_non_zero() then \
- * we will catch it right away. If it is called later then \
- * we will have to go through a wakeup cycle to catch it. \
- * \
- * Multiple waiters contend for the semaphore lock to see \
- * who gets to gate through and who has to wait some more. \
- */ \
- for (;;) {
-
-#define DOWN_TAIL(task_state) \
- tsk->state = (task_state); \
- } \
- tsk->state = TASK_RUNNING; \
- remove_wait_queue(&sem->wait, &wait);
-
-void __down(struct semaphore * sem)
-{
- DOWN_VAR
- DOWN_HEAD(TASK_UNINTERRUPTIBLE)
- if (waking_non_zero(sem))
- break;
- schedule();
- DOWN_TAIL(TASK_UNINTERRUPTIBLE)
-}
-
-int __down_interruptible(struct semaphore * sem)
-{
- int ret = 0;
- DOWN_VAR
- DOWN_HEAD(TASK_INTERRUPTIBLE)
-
- ret = waking_non_zero_interruptible(sem, tsk);
- if (ret)
- {
- if (ret == 1)
- /* ret != 0 only if we get interrupted -arca */
- ret = 0;
- break;
- }
- schedule();
- DOWN_TAIL(TASK_INTERRUPTIBLE)
- return ret;
-}
-
-int __down_trylock(struct semaphore * sem)
-{
- return waking_non_zero_trylock(sem);
-}
diff -Nru a/arch/mips64/kernel/setup.c b/arch/mips64/kernel/setup.c
--- a/arch/mips64/kernel/setup.c Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,479 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 Linus Torvalds
- * Copyright (C) 1995 Waldorf Electronics
- * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
- * Copyright (C) 1996 Stoned Elipot
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/stddef.h>
-#include <linux/string.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/utsname.h>
-#include <linux/a.out.h>
-#include <linux/tty.h>
-#include <linux/bootmem.h>
-#include <linux/major.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/system.h>
-#include <asm/sections.h>
-#include <asm/pgalloc.h>
-
-struct cpuinfo_mips cpu_data[NR_CPUS];
-
-#ifdef CONFIG_VT
-struct screen_info screen_info;
-#endif
-
-/*
- * Set if box has EISA slots.
- */
-#ifdef CONFIG_EISA
-int EISA_bus = 0;
-#endif
-
-#ifdef CONFIG_BLK_DEV_FD
-extern struct fd_ops no_fd_ops;
-struct fd_ops *fd_ops;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops no_ide_ops;
-struct ide_ops *ide_ops;
-#endif
-
-extern void * __rd_start, * __rd_end;
-
-extern struct rtc_ops no_rtc_ops;
-struct rtc_ops *rtc_ops;
-
-extern struct kbd_ops no_kbd_ops;
-struct kbd_ops *kbd_ops;
-
-/*
- * Setup information
- *
- * These are initialized so they are in the .data section
- */
-unsigned long mips_machtype = MACH_UNKNOWN;
-unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
-
-struct boot_mem_map boot_mem_map;
-
-unsigned char aux_device_present;
-
-static char command_line[CL_SIZE] = { 0, };
- char saved_command_line[CL_SIZE];
-extern char arcs_cmdline[CL_SIZE];
-
-/*
- * mips_io_port_base is the begin of the address space to which x86 style
- * I/O ports are mapped.
- */
-const unsigned long mips_io_port_base = -1;
-EXPORT_SYMBOL(mips_io_port_base);
-
-/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor.
- */
-unsigned long isa_slot_offset;
-EXPORT_SYMBOL(isa_slot_offset);
-
-extern void SetUpBootInfo(void);
-extern void load_mmu(void);
-extern ATTRIB_NORET asmlinkage void start_kernel(void);
-extern void prom_init(int, char **, char **, int *);
-
-static struct resource code_resource = { "Kernel code" };
-static struct resource data_resource = { "Kernel data" };
-
-asmlinkage void __init init_arch(int argc, char **argv, char **envp,
- int *prom_vec)
-{
- /* Determine which MIPS variant we are running on. */
- cpu_probe();
-
- prom_init(argc, argv, envp, prom_vec);
-
- cpu_report();
-
- /*
- * Determine the mmu/cache attached to this machine, then flush the
- * tlb and caches. On the r4xx0 variants this also sets CP0_WIRED to
- * zero.
- */
- load_mmu();
-
- /*
- * On IP27, I am seeing the TS bit set when the kernel is loaded.
- * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
- * anyway ...
- */
- clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
- set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
-
- start_kernel();
-}
-
-void __init add_memory_region(phys_t start, phys_t size,
- long type)
-{
- int x = boot_mem_map.nr_map;
-
- if (x == BOOT_MEM_MAP_MAX) {
- printk("Ooops! Too many entries in the memory map!\n");
- return;
- }
-
- boot_mem_map.map[x].addr = start;
- boot_mem_map.map[x].size = size;
- boot_mem_map.map[x].type = type;
- boot_mem_map.nr_map++;
-}
-
-static void __init print_memory_map(void)
-{
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- printk(" memory: %016Lx @ %016Lx ",
- (unsigned long long) boot_mem_map.map[i].size,
- (unsigned long long) boot_mem_map.map[i].addr);
- switch (boot_mem_map.map[i].type) {
- case BOOT_MEM_RAM:
- printk("(usable)\n");
- break;
- case BOOT_MEM_ROM_DATA:
- printk("(ROM data)\n");
- break;
- case BOOT_MEM_RESERVED:
- printk("(reserved)\n");
- break;
- default:
- printk("type %lu\n", boot_mem_map.map[i].type);
- break;
- }
- }
-}
-
-static inline void parse_cmdline_early(void)
-{
- char c = ' ', *to = command_line, *from = saved_command_line;
- unsigned long start_at, mem_size;
- int len = 0;
- int usermem = 0;
-
- printk("Determined physical RAM map:\n");
- print_memory_map();
-
- for (;;) {
- /*
- * "mem=XXX[kKmM]" defines a memory region from
- * 0 to <XXX>, overriding the determined size.
- * "mem=XXX[KkmM]@YYY[KkmM]" defines a memory region from
- * <YYY> to <YYY>+<XXX>, overriding the determined size.
- */
- if (c == ' ' && !memcmp(from, "mem=", 4)) {
- if (to != command_line)
- to--;
- /*
- * If a user specifies memory size, we
- * blow away any automatically generated
- * size.
- */
- if (usermem == 0) {
- boot_mem_map.nr_map = 0;
- usermem = 1;
- }
- mem_size = memparse(from + 4, &from);
- if (*from == '@')
- start_at = memparse(from + 1, &from);
- else
- start_at = 0;
- add_memory_region(start_at, mem_size, BOOT_MEM_RAM);
- }
- c = *(from++);
- if (!c)
- break;
- if (CL_SIZE <= ++len)
- break;
- *(to++) = c;
- }
- *to = '\0';
-
- if (usermem) {
- printk("User-defined physical RAM map:\n");
- print_memory_map();
- }
-}
-
-
-#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
-#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
-#define PFN_PHYS(x) ((x) << PAGE_SHIFT)
-
-static inline void bootmem_init(void)
-{
-#ifdef CONFIG_BLK_DEV_INITRD
- unsigned long tmp;
- unsigned long *initrd_header;
-#endif
- unsigned long bootmap_size;
- unsigned long start_pfn, max_pfn;
- int i;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
- if (tmp < (unsigned long)&_end)
- tmp += PAGE_SIZE;
- initrd_header = (unsigned long *)tmp;
- if (initrd_header[0] == 0x494E5244) {
- initrd_start = (unsigned long)&initrd_header[2];
- initrd_end = initrd_start + initrd_header[1];
- }
- start_pfn = PFN_UP(CPHYSADDR((&_end)+(initrd_end - initrd_start) + PAGE_SIZE));
-#else
- /*
- * Partially used pages are not usable - thus
- * we are rounding upwards.
- */
- start_pfn = PFN_UP(CPHYSADDR(&_end));
-#endif /* CONFIG_BLK_DEV_INITRD */
-
-#ifndef CONFIG_SGI_IP27
- /* Find the highest page frame number we have available. */
- max_pfn = 0;
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- unsigned long start, end;
-
- if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
- continue;
-
- start = PFN_UP(boot_mem_map.map[i].addr);
- end = PFN_DOWN(boot_mem_map.map[i].addr
- + boot_mem_map.map[i].size);
-
- if (start >= end)
- continue;
- if (end > max_pfn)
- max_pfn = end;
- }
-
- /* Initialize the boot-time allocator. */
- bootmap_size = init_bootmem(start_pfn, max_pfn);
-
- /*
- * Register fully available low RAM pages with the bootmem allocator.
- */
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- unsigned long curr_pfn, last_pfn, size;
-
- /*
- * Reserve usable memory.
- */
- if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
- continue;
-
- /*
- * We are rounding up the start address of usable memory:
- */
- curr_pfn = PFN_UP(boot_mem_map.map[i].addr);
- if (curr_pfn >= max_pfn)
- continue;
- if (curr_pfn < start_pfn)
- curr_pfn = start_pfn;
-
- /*
- * ... and at the end of the usable range downwards:
- */
- last_pfn = PFN_DOWN(boot_mem_map.map[i].addr
- + boot_mem_map.map[i].size);
-
- if (last_pfn > max_pfn)
- last_pfn = max_pfn;
-
- /*
- * ... finally, did all the rounding and playing
- * around just make the area go away?
- */
- if (last_pfn <= curr_pfn)
- continue;
-
- size = last_pfn - curr_pfn;
- free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
- }
-
- /* Reserve the bootmap memory. */
- reserve_bootmem(PFN_PHYS(start_pfn), bootmap_size);
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* Board specific code should have set up initrd_start and initrd_end */
- ROOT_DEV = Root_RAM0;
- if (&__rd_start != &__rd_end) {
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
- }
- initrd_below_start_ok = 1;
- if (initrd_start) {
- unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start);
- printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
- (void *)initrd_start,
- initrd_size);
-/* FIXME: is this right? */
-#ifndef CONFIG_SGI_IP27
- if (CPHYSADDR(initrd_end) > PFN_PHYS(max_pfn)) {
- printk("initrd extends beyond end of memory "
- "(0x%p > 0x%p)\ndisabling initrd\n",
- (void *)CPHYSADDR(initrd_end),
- (void *)PFN_PHYS(max_pfn));
- initrd_start = 0;
- }
-#endif /* !CONFIG_SGI_IP27 */
- }
-#endif
-}
-
-static inline void resource_init(void)
-{
- int i;
-
- code_resource.start = virt_to_bus(&_text);
- code_resource.end = virt_to_bus(&_etext) - 1;
- data_resource.start = virt_to_bus(&_etext);
- data_resource.end = virt_to_bus(&_edata) - 1;
-
- /*
- * Request address space for all standard RAM.
- */
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- struct resource *res;
-
- res = alloc_bootmem(sizeof(struct resource));
- switch (boot_mem_map.map[i].type) {
- case BOOT_MEM_RAM:
- case BOOT_MEM_ROM_DATA:
- res->name = "System RAM";
- break;
- case BOOT_MEM_RESERVED:
- default:
- res->name = "reserved";
- }
-
- res->start = boot_mem_map.map[i].addr;
- res->end = boot_mem_map.map[i].addr +
- boot_mem_map.map[i].size - 1;
-
- res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
- request_resource(&iomem_resource, res);
-
- /*
- * We don't know which RAM region contains kernel data,
- * so we try it repeatedly and let the resource manager
- * test it.
- */
- request_resource(res, &code_resource);
- request_resource(res, &data_resource);
- }
-}
-
-#undef PFN_UP
-#undef PFN_DOWN
-#undef PFN_PHYS
-
-
-void __init setup_arch(char **cmdline_p)
-{
- extern void decstation_setup(void);
- extern void ip22_setup(void);
- extern void ip27_setup(void);
- extern void ip32_setup(void);
- extern void swarm_setup(void);
- extern void malta_setup(void);
- extern void momenco_ocelot_setup(void);
- extern void momenco_ocelot_g_setup(void);
- extern void momenco_ocelot_c_setup(void);
- extern void swarm_setup(void);
- void frame_info_init(void);
-
- frame_info_init();
-#ifdef CONFIG_DECSTATION
- decstation_setup();
-#endif
-#ifdef CONFIG_SGI_IP22
- ip22_setup();
-#endif
-#ifdef CONFIG_SGI_IP27
- ip27_setup();
-#endif
-#ifdef CONFIG_SGI_IP32
- ip32_setup();
-#endif
-#ifdef CONFIG_SIBYTE_BOARD
- swarm_setup();
-#endif
-#ifdef CONFIG_MIPS_MALTA
- malta_setup();
-#endif
-#ifdef CONFIG_MOMENCO_OCELOT
- case MACH_GROUP_MOMENCO:
- momenco_ocelot_setup();
- break;
-#endif
-#ifdef CONFIG_MOMENCO_OCELOT_G
- case MACH_GROUP_MOMENCO:
- momenco_ocelot_g_setup();
- break;
-#endif
-#ifdef CONFIG_MOMENCO_OCELOT_C
- case MACH_GROUP_MOMENCO:
- momenco_ocelot_c_setup();
- break;
-#endif
-
-
- strlcpy(command_line, arcs_cmdline, sizeof(command_line));
- strlcpy(saved_command_line, command_line, sizeof(saved_command_line));
-
- *cmdline_p = command_line;
-
- parse_cmdline_early();
-
- bootmem_init();
-
- paging_init();
-
- resource_init();
-}
-
-int __init fpu_disable(char *s)
-{
- cpu_data[0].options &= ~MIPS_CPU_FPU;
-
- return 1;
-}
-
-__setup("nofpu", fpu_disable);
diff -Nru a/arch/mips64/kernel/signal.c b/arch/mips64/kernel/signal.c
--- a/arch/mips64/kernel/signal.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,408 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- * Copyright (C) 1994 - 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#include <linux/config.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/personality.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-
-#include <asm/asm.h>
-#include <asm/bitops.h>
-#include <asm/cacheflush.h>
-#include <asm/stackframe.h>
-#include <asm/uaccess.h>
-#include <asm/ucontext.h>
-#include <asm/system.h>
-#include <asm/fpu.h>
-
-#define DEBUG_SIG 0
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-extern asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs);
-
-extern asmlinkage void do_syscall_trace(void);
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage int sys_rt_sigsuspend(abi64_no_regargs, struct pt_regs regs)
-{
- sigset_t *unewset, saveset, newset;
- size_t sigsetsize;
-
- save_static(®s);
-
- /* XXX Don't preclude handling different sized sigset_t's. */
- sigsetsize = regs.regs[5];
- if (sigsetsize != sizeof(sigset_t))
- return -EINVAL;
-
- unewset = (sigset_t *) regs.regs[4];
- if (copy_from_user(&newset, unewset, sizeof(newset)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs.regs[2] = EINTR;
- regs.regs[7] = 1;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(&saveset, ®s))
- return -EINTR;
- }
-}
-
-asmlinkage int sys_sigaltstack(abi64_no_regargs, struct pt_regs regs)
-{
- const stack_t *uss = (const stack_t *) regs.regs[4];
- stack_t *uoss = (stack_t *) regs.regs[5];
- unsigned long usp = regs.regs[29];
-
- return do_sigaltstack(uss, uoss, usp);
-}
-
-asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
-{
- int err = 0;
-
- err |= __get_user(regs->cp0_epc, &sc->sc_pc);
- err |= __get_user(regs->hi, &sc->sc_mdhi);
- err |= __get_user(regs->lo, &sc->sc_mdlo);
-
-#define restore_gp_reg(i) do { \
- err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
-} while(0)
- restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
- restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
- restore_gp_reg( 7); restore_gp_reg( 8); restore_gp_reg( 9);
- restore_gp_reg(10); restore_gp_reg(11); restore_gp_reg(12);
- restore_gp_reg(13); restore_gp_reg(14); restore_gp_reg(15);
- restore_gp_reg(16); restore_gp_reg(17); restore_gp_reg(18);
- restore_gp_reg(19); restore_gp_reg(20); restore_gp_reg(21);
- restore_gp_reg(22); restore_gp_reg(23); restore_gp_reg(24);
- restore_gp_reg(25); restore_gp_reg(26); restore_gp_reg(27);
- restore_gp_reg(28); restore_gp_reg(29); restore_gp_reg(30);
- restore_gp_reg(31);
-#undef restore_gp_reg
-
- err |= __get_user(current->used_math, &sc->sc_used_math);
-
- if (current->used_math) {
- /* restore fpu context if we have used it before */
- own_fpu();
- err |= restore_fp_context(sc);
- } else {
- /* signal handler may have used FPU. Give it up. */
- loose_fpu();
- }
-
- return err;
-}
-
-struct rt_sigframe {
- u32 rs_ass[4]; /* argument save space for o32 */
- u32 rs_code[2]; /* signal trampoline */
- struct siginfo rs_info;
- struct ucontext rs_uc;
-};
-
-asmlinkage void sys_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
-{
- struct rt_sigframe *frame;
- sigset_t set;
- stack_t st;
-
- frame = (struct rt_sigframe *) regs.regs[29];
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
- goto badframe;
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- if (restore_sigcontext(®s, &frame->rs_uc.uc_mcontext))
- goto badframe;
-
- if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st)))
- goto badframe;
- /* It is more difficult to avoid calling this function than to
- call it and ignore errors. */
- do_sigaltstack(&st, NULL, regs.regs[29]);
-
- /*
- * Don't let your children do this ...
- */
- __asm__ __volatile__(
- "move\t$29, %0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-badframe:
- force_sig(SIGSEGV, current);
-}
-
-static inline int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
-{
- int err = 0;
-
- err |= __put_user(regs->cp0_epc, &sc->sc_pc);
- err |= __put_user(regs->cp0_status, &sc->sc_status);
-
-#define save_gp_reg(i) do { \
- err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \
-} while(0)
- __put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
- save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
- save_gp_reg(7); save_gp_reg(8); save_gp_reg(9); save_gp_reg(10);
- save_gp_reg(11); save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
- save_gp_reg(15); save_gp_reg(16); save_gp_reg(17); save_gp_reg(18);
- save_gp_reg(19); save_gp_reg(20); save_gp_reg(21); save_gp_reg(22);
- save_gp_reg(23); save_gp_reg(24); save_gp_reg(25); save_gp_reg(26);
- save_gp_reg(27); save_gp_reg(28); save_gp_reg(29); save_gp_reg(30);
- save_gp_reg(31);
-#undef save_gp_reg
-
- err |= __put_user(regs->hi, &sc->sc_mdhi);
- err |= __put_user(regs->lo, &sc->sc_mdlo);
- err |= __put_user(regs->cp0_cause, &sc->sc_cause);
- err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr);
-
- err |= __put_user(current->used_math, &sc->sc_used_math);
-
- if (!current->used_math)
- goto out;
-
- /*
- * Save FPU state to signal context. Signal handler will "inherit"
- * current FPU state.
- */
- if (!is_fpu_owner()) {
- own_fpu();
- restore_fp(current);
- }
- err |= save_fp_context(sc);
-
-out:
- return err;
-}
-
-/*
- * Determine which stack to use..
- */
-static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
- size_t frame_size)
-{
- unsigned long sp;
-
- /* Default to using normal stack */
- sp = regs->regs[29];
-
- /*
- * FPU emulator may have it's own trampoline active just
- * above the user stack, 16-bytes before the next lowest
- * 16 byte boundary. Try to avoid trashing it.
- */
- sp -= 32;
-
- /* This is the X/Open sanctioned signal stack switching. */
- if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp))
- sp = current->sas_ss_sp + current->sas_ss_size;
-
- return (void *)((sp - frame_size) & ALMASK);
-}
-
-static void inline setup_rt_frame(struct k_sigaction * ka,
- struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
-{
- struct rt_sigframe *frame;
- int err = 0;
-
- frame = get_sigframe(ka, regs, sizeof(*frame));
- if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
- goto give_sigsegv;
-
- /*
- * Set up the return code ...
- *
- * li v0, __NR_rt_sigreturn
- * syscall
- */
- err |= __put_user(0x24020000 + __NR_rt_sigreturn, frame->rs_code + 0);
- err |= __put_user(0x0000000c , frame->rs_code + 1);
- flush_cache_sigtramp((unsigned long) frame->rs_code);
-
- /* Create siginfo. */
- err |= copy_siginfo_to_user(&frame->rs_info, info);
-
- /* Create the ucontext. */
- err |= __put_user(0, &frame->rs_uc.uc_flags);
- err |= __put_user(0, &frame->rs_uc.uc_link);
- err |= __put_user((void *)current->sas_ss_sp,
- &frame->rs_uc.uc_stack.ss_sp);
- err |= __put_user(sas_ss_flags(regs->regs[29]),
- &frame->rs_uc.uc_stack.ss_flags);
- err |= __put_user(current->sas_ss_size,
- &frame->rs_uc.uc_stack.ss_size);
- err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext);
- err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
-
- if (err)
- goto give_sigsegv;
-
- /*
- * Arguments to signal handler:
- *
- * a0 = signal number
- * a1 = 0 (should be cause)
- * a2 = pointer to ucontext
- *
- * $25 and c0_epc point to the signal handler, $29 points to
- * the struct rt_sigframe.
- */
- regs->regs[ 4] = signr;
- regs->regs[ 5] = (unsigned long) &frame->rs_info;
- regs->regs[ 6] = (unsigned long) &frame->rs_uc;
- regs->regs[29] = (unsigned long) frame;
- regs->regs[31] = (unsigned long) frame->rs_code;
- regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
-
-#if DEBUG_SIG
- printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
- current->comm, current->pid,
- frame, regs->cp0_epc, regs->regs[31]);
-#endif
- return;
-
-give_sigsegv:
- if (signr == SIGSEGV)
- ka->sa.sa_handler = SIG_DFL;
- force_sig(SIGSEGV, current);
-}
-
-static inline void handle_signal(unsigned long sig, siginfo_t *info,
- sigset_t *oldset, struct pt_regs *regs)
-{
- struct k_sigaction *ka = ¤t->sighand->action[sig-1];
-
- switch(regs->regs[0]) {
- case ERESTARTNOHAND:
- regs->regs[2] = EINTR;
- break;
- case ERESTARTSYS:
- if(!(ka->sa.sa_flags & SA_RESTART)) {
- regs->regs[2] = EINTR;
- break;
- }
- /* fallthrough */
- case ERESTARTNOINTR: /* Userland will reload $v0. */
- regs->regs[7] = regs->regs[26];
- regs->cp0_epc -= 8;
- }
-
- regs->regs[0] = 0; /* Don't deal with this again. */
-
- setup_rt_frame(ka, regs, sig, oldset, info);
-
- if (ka->sa.sa_flags & SA_ONESHOT)
- ka->sa.sa_handler = SIG_DFL;
- if (!(ka->sa.sa_flags & SA_NODEFER)) {
- spin_lock_irq(¤t->sighand->siglock);
- sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
- sigaddset(¤t->blocked,sig);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
- }
-}
-
-
-extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
-extern int do_irix_signal(sigset_t *oldset, struct pt_regs *regs);
-
-asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs)
-{
- siginfo_t info;
- int signr;
-
-#ifdef CONFIG_BINFMT_ELF32
- if (current->thread.mflags & MF_32BIT_REGS) {
- return do_signal32(oldset, regs);
- }
-#endif
-
- if (!oldset)
- oldset = ¤t->blocked;
-
- signr = get_signal_to_deliver(&info, regs, NULL);
- if (signr > 0) {
- handle_signal(signr, &info, oldset, regs);
- return 1;
- }
-
- /*
- * Who's code doesn't conform to the restartable syscall convention
- * dies here!!! The li instruction, a single machine instruction,
- * must directly be followed by the syscall instruction.
- */
- if (regs->regs[0]) {
- if (regs->regs[2] == ERESTARTNOHAND ||
- regs->regs[2] == ERESTARTSYS ||
- regs->regs[2] == ERESTARTNOINTR) {
- regs->regs[7] = regs->regs[26];
- regs->cp0_epc -= 8;
- }
- }
- return 0;
-}
-
-
-/*
- * notification of userspace execution resumption
- * - triggered by current->work.notify_resume
- */
-asmlinkage void do_notify_resume(struct pt_regs *regs, sigset_t *oldset,
- __u32 thread_info_flags)
-{
- /* deal with pending signal delivery */
- if (thread_info_flags & _TIF_SIGPENDING) {
-#ifdef CONFIG_BINFMT_ELF32
- if (likely((current->thread.mflags & MF_32BIT_REGS))) {
- do_signal32(oldset, regs);
- return;
- }
-#endif
-#ifdef CONFIG_BINFMT_IRIX
- if (unlikely(current->personality != PER_LINUX)) {
- do_irix_signal(oldset, regs);
- return;
- }
-#endif
- do_signal(oldset, regs);
- }
-}
diff -Nru a/arch/mips64/kernel/signal32.c b/arch/mips64/kernel/signal32.c
--- a/arch/mips64/kernel/signal32.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,879 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- * Copyright (C) 1994 - 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-#include <linux/compat.h>
-
-#include <asm/asm.h>
-#include <asm/bitops.h>
-#include <asm/pgalloc.h>
-#include <asm/stackframe.h>
-#include <asm/uaccess.h>
-#include <asm/ucontext.h>
-#include <asm/system.h>
-#include <asm/fpu.h>
-
-#define DEBUG_SIG 0
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-extern asmlinkage int do_signal32(sigset_t *oldset, struct pt_regs *regs);
-
-extern asmlinkage void do_syscall_trace(void);
-
-/* 32-bit compatibility types */
-
-#define _NSIG_BPW32 32
-#define _NSIG_WORDS32 (_NSIG / _NSIG_BPW32)
-
-typedef unsigned int __sighandler32_t;
-typedef void (*vfptr_t)(void);
-
-struct sigaction32 {
- unsigned int sa_flags;
- __sighandler32_t sa_handler;
- compat_sigset_t sa_mask;
-};
-
-/* IRIX compatible stack_t */
-typedef struct sigaltstack32 {
- s32 ss_sp;
- compat_size_t ss_size;
- int ss_flags;
-} stack32_t;
-
-extern void __put_sigset_unknown_nsig(void);
-extern void __get_sigset_unknown_nsig(void);
-
-static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t *ubuf)
-{
- int err = 0;
-
- if (!access_ok(VERIFY_WRITE, ubuf, sizeof(*ubuf)))
- return -EFAULT;
-
- switch (_NSIG_WORDS) {
- default:
- __put_sigset_unknown_nsig();
- case 2:
- err |= __put_user (kbuf->sig[1] >> 32, &ubuf->sig[3]);
- err |= __put_user (kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]);
- case 1:
- err |= __put_user (kbuf->sig[0] >> 32, &ubuf->sig[1]);
- err |= __put_user (kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]);
- }
-
- return err;
-}
-
-static inline int get_sigset(sigset_t *kbuf, const compat_sigset_t *ubuf)
-{
- int err = 0;
- unsigned long sig[4];
-
- if (!access_ok(VERIFY_READ, ubuf, sizeof(*ubuf)))
- return -EFAULT;
-
- switch (_NSIG_WORDS) {
- default:
- __get_sigset_unknown_nsig();
- case 2:
- err |= __get_user (sig[3], &ubuf->sig[3]);
- err |= __get_user (sig[2], &ubuf->sig[2]);
- kbuf->sig[1] = sig[2] | (sig[3] << 32);
- case 1:
- err |= __get_user (sig[1], &ubuf->sig[1]);
- err |= __get_user (sig[0], &ubuf->sig[0]);
- kbuf->sig[0] = sig[0] | (sig[1] << 32);
- }
-
- return err;
-}
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage inline int sys32_sigsuspend(abi64_no_regargs, struct pt_regs regs)
-{
- compat_sigset_t *uset;
- sigset_t newset, saveset;
-
- save_static(®s);
- uset = (compat_sigset_t *) regs.regs[4];
- if (get_sigset(&newset, uset))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs.regs[2] = EINTR;
- regs.regs[7] = 1;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal32(&saveset, ®s))
- return -EINTR;
- }
-}
-
-asmlinkage int sys32_rt_sigsuspend(abi64_no_regargs, struct pt_regs regs)
-{
- compat_sigset_t *uset;
- sigset_t newset, saveset;
- size_t sigsetsize;
-
- save_static(®s);
- /* XXX Don't preclude handling different sized sigset_t's. */
- sigsetsize = regs.regs[5];
- if (sigsetsize != sizeof(compat_sigset_t))
- return -EINVAL;
-
- uset = (compat_sigset_t *) regs.regs[4];
- if (get_sigset(&newset, uset))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs.regs[2] = EINTR;
- regs.regs[7] = 1;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal32(&saveset, ®s))
- return -EINTR;
- }
-}
-
-asmlinkage int sys32_sigaction(int sig, const struct sigaction32 *act,
- struct sigaction32 *oact)
-{
- struct k_sigaction new_ka, old_ka;
- int ret;
- int err = 0;
-
- if (act) {
- old_sigset_t mask;
-
- if (!access_ok(VERIFY_READ, act, sizeof(*act)))
- return -EFAULT;
- err |= __get_user((u32)(u64)new_ka.sa.sa_handler,
- &act->sa_handler);
- err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
- err |= __get_user(mask, &act->sa_mask.sig[0]);
- if (err)
- return -EFAULT;
-
- siginitset(&new_ka.sa.sa_mask, mask);
- }
-
- ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
- if (!ret && oact) {
- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
- return -EFAULT;
- err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
- err |= __put_user((u32)(u64)old_ka.sa.sa_handler,
- &oact->sa_handler);
- err |= __put_user(old_ka.sa.sa_mask.sig[0], oact->sa_mask.sig);
- err |= __put_user(0, &oact->sa_mask.sig[1]);
- err |= __put_user(0, &oact->sa_mask.sig[2]);
- err |= __put_user(0, &oact->sa_mask.sig[3]);
- if (err)
- return -EFAULT;
- }
-
- return ret;
-}
-
-asmlinkage int sys32_sigaltstack(abi64_no_regargs, struct pt_regs regs)
-{
- const stack32_t *uss = (const stack32_t *) regs.regs[4];
- stack32_t *uoss = (stack32_t *) regs.regs[5];
- unsigned long usp = regs.regs[29];
- stack_t kss, koss;
- int ret, err = 0;
- mm_segment_t old_fs = get_fs();
- s32 sp;
-
- if (uss) {
- if (!access_ok(VERIFY_READ, uss, sizeof(*uss)))
- return -EFAULT;
- err |= __get_user(sp, &uss->ss_sp);
- kss.ss_size = (long) sp;
- err |= __get_user(kss.ss_size, &uss->ss_size);
- err |= __get_user(kss.ss_flags, &uss->ss_flags);
- if (err)
- return -EFAULT;
- }
-
- set_fs (KERNEL_DS);
- ret = do_sigaltstack(uss ? &kss : NULL , uoss ? &koss : NULL, usp);
- set_fs (old_fs);
-
- if (!ret && uoss) {
- if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss)))
- return -EFAULT;
- sp = (int) (long) koss.ss_sp;
- err |= __put_user(sp, &uoss->ss_sp);
- err |= __put_user(koss.ss_size, &uoss->ss_size);
- err |= __put_user(koss.ss_flags, &uoss->ss_flags);
- if (err)
- return -EFAULT;
- }
- return ret;
-}
-
-static asmlinkage int restore_sigcontext(struct pt_regs *regs,
- struct sigcontext *sc)
-{
- int err = 0;
-
- err |= __get_user(regs->cp0_epc, &sc->sc_pc);
- err |= __get_user(regs->hi, &sc->sc_mdhi);
- err |= __get_user(regs->lo, &sc->sc_mdlo);
-
-#define restore_gp_reg(i) do { \
- err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
-} while(0)
- restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
- restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
- restore_gp_reg( 7); restore_gp_reg( 8); restore_gp_reg( 9);
- restore_gp_reg(10); restore_gp_reg(11); restore_gp_reg(12);
- restore_gp_reg(13); restore_gp_reg(14); restore_gp_reg(15);
- restore_gp_reg(16); restore_gp_reg(17); restore_gp_reg(18);
- restore_gp_reg(19); restore_gp_reg(20); restore_gp_reg(21);
- restore_gp_reg(22); restore_gp_reg(23); restore_gp_reg(24);
- restore_gp_reg(25); restore_gp_reg(26); restore_gp_reg(27);
- restore_gp_reg(28); restore_gp_reg(29); restore_gp_reg(30);
- restore_gp_reg(31);
-#undef restore_gp_reg
-
- err |= __get_user(current->used_math, &sc->sc_used_math);
-
- if (current->used_math) {
- /* restore fpu context if we have used it before */
- own_fpu();
- err |= restore_fp_context(sc);
- } else {
- /* signal handler may have used FPU. Give it up. */
- loose_fpu();
- }
-
- return err;
-}
-
-struct sigframe {
- u32 sf_ass[4]; /* argument save space for o32 */
- u32 sf_code[2]; /* signal trampoline */
- struct sigcontext sf_sc;
- sigset_t sf_mask;
-};
-
-struct rt_sigframe32 {
- u32 rs_ass[4]; /* argument save space for o32 */
- u32 rs_code[2]; /* signal trampoline */
- struct siginfo32 rs_info;
- struct ucontext rs_uc;
-};
-
-static int copy_siginfo_to_user32(siginfo_t32 *to, siginfo_t *from)
-{
- int err;
-
- if (!access_ok (VERIFY_WRITE, to, sizeof(siginfo_t32)))
- return -EFAULT;
-
- /* If you change siginfo_t structure, please be sure
- this code is fixed accordingly.
- It should never copy any pad contained in the structure
- to avoid security leaks, but must copy the generic
- 3 ints plus the relevant union member.
- This routine must convert siginfo from 64bit to 32bit as well
- at the same time. */
- err = __put_user(from->si_signo, &to->si_signo);
- err |= __put_user(from->si_errno, &to->si_errno);
- err |= __put_user((short)from->si_code, &to->si_code);
- if (from->si_code < 0)
- err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad, SI_PAD_SIZE);
- else {
- switch (from->si_code >> 16) {
- case __SI_CHLD >> 16:
- err |= __put_user(from->si_utime, &to->si_utime);
- err |= __put_user(from->si_stime, &to->si_stime);
- err |= __put_user(from->si_status, &to->si_status);
- default:
- err |= __put_user(from->si_pid, &to->si_pid);
- err |= __put_user(from->si_uid, &to->si_uid);
- break;
- case __SI_FAULT >> 16:
- err |= __put_user((long)from->si_addr, &to->si_addr);
- break;
- case __SI_POLL >> 16:
- err |= __put_user(from->si_band, &to->si_band);
- err |= __put_user(from->si_fd, &to->si_fd);
- break;
- /* case __SI_RT: This is not generated by the kernel as of now. */
- }
- }
- return err;
-}
-
-asmlinkage void sys32_sigreturn(abi64_no_regargs, struct pt_regs regs)
-{
- struct sigframe *frame;
- sigset_t blocked;
-
- frame = (struct sigframe *) regs.regs[29];
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&blocked, &frame->sf_mask, sizeof(blocked)))
- goto badframe;
-
- sigdelsetmask(&blocked, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- current->blocked = blocked;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- if (restore_sigcontext(®s, &frame->sf_sc))
- goto badframe;
-
- /*
- * Don't let your children do this ...
- */
- if (current_thread_info()->flags & TIF_SYSCALL_TRACE)
- do_syscall_trace();
- __asm__ __volatile__(
- "move\t$29, %0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-badframe:
- force_sig(SIGSEGV, current);
-}
-
-asmlinkage void sys32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
-{
- struct rt_sigframe32 *frame;
- sigset_t set;
- stack_t st;
-
- frame = (struct rt_sigframe32 *) regs.regs[29];
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
- goto badframe;
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- if (restore_sigcontext(®s, &frame->rs_uc.uc_mcontext))
- goto badframe;
-
- if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st)))
- goto badframe;
- /* It is more difficult to avoid calling this function than to
- call it and ignore errors. */
- do_sigaltstack(&st, NULL, regs.regs[29]);
-
- /*
- * Don't let your children do this ...
- */
- __asm__ __volatile__(
- "move\t$29, %0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-badframe:
- force_sig(SIGSEGV, current);
-}
-
-static inline int setup_sigcontext(struct pt_regs *regs,
- struct sigcontext *sc)
-{
- int err = 0;
-
- err |= __put_user(regs->cp0_epc, &sc->sc_pc);
- err |= __put_user(regs->cp0_status, &sc->sc_status);
-
-#define save_gp_reg(i) { \
- err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \
-} while(0)
- __put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
- save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
- save_gp_reg(7); save_gp_reg(8); save_gp_reg(9); save_gp_reg(10);
- save_gp_reg(11); save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
- save_gp_reg(15); save_gp_reg(16); save_gp_reg(17); save_gp_reg(18);
- save_gp_reg(19); save_gp_reg(20); save_gp_reg(21); save_gp_reg(22);
- save_gp_reg(23); save_gp_reg(24); save_gp_reg(25); save_gp_reg(26);
- save_gp_reg(27); save_gp_reg(28); save_gp_reg(29); save_gp_reg(30);
- save_gp_reg(31);
-#undef save_gp_reg
-
- err |= __put_user(regs->hi, &sc->sc_mdhi);
- err |= __put_user(regs->lo, &sc->sc_mdlo);
- err |= __put_user(regs->cp0_cause, &sc->sc_cause);
- err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr);
-
- err |= __put_user(current->used_math, &sc->sc_used_math);
-
- if (!current->used_math)
- goto out;
-
- /*
- * Save FPU state to signal context. Signal handler will "inherit"
- * current FPU state.
- */
- if (!is_fpu_owner()) {
- own_fpu();
- restore_fp(current);
- }
- err |= save_fp_context(sc);
-
-out:
- return err;
-}
-
-/*
- * Determine which stack to use..
- */
-static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
- size_t frame_size)
-{
- unsigned long sp;
-
- /* Default to using normal stack */
- sp = regs->regs[29];
-
- /*
- * FPU emulator may have it's own trampoline active just
- * above the user stack, 16-bytes before the next lowest
- * 16 byte boundary. Try to avoid trashing it.
- */
- sp -= 32;
-
- /* This is the X/Open sanctioned signal stack switching. */
- if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp))
- sp = current->sas_ss_sp + current->sas_ss_size;
-
- return (void *)((sp - frame_size) & ALMASK);
-}
-
-static inline void setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
- int signr, sigset_t *set)
-{
- struct sigframe *frame;
- int err = 0;
-
- frame = get_sigframe(ka, regs, sizeof(*frame));
- if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
- goto give_sigsegv;
-
- /*
- * Set up the return code ...
- *
- * li v0, __NR_O32_sigreturn
- * syscall
- */
- err |= __put_user(0x24020000 + __NR_O32_sigreturn, frame->sf_code + 0);
- err |= __put_user(0x0000000c , frame->sf_code + 1);
- flush_cache_sigtramp((unsigned long) frame->sf_code);
-
- err |= setup_sigcontext(regs, &frame->sf_sc);
- err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
- if (err)
- goto give_sigsegv;
-
- /*
- * Arguments to signal handler:
- *
- * a0 = signal number
- * a1 = 0 (should be cause)
- * a2 = pointer to struct sigcontext
- *
- * $25 and c0_epc point to the signal handler, $29 points to the
- * struct sigframe.
- */
- regs->regs[ 4] = signr;
- regs->regs[ 5] = 0;
- regs->regs[ 6] = (unsigned long) &frame->sf_sc;
- regs->regs[29] = (unsigned long) frame;
- regs->regs[31] = (unsigned long) frame->sf_code;
- regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
-
-#if DEBUG_SIG
- printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
- current->comm, current->pid,
- frame, regs->cp0_epc, frame->sf_code);
-#endif
- return;
-
-give_sigsegv:
- if (signr == SIGSEGV)
- ka->sa.sa_handler = SIG_DFL;
- force_sig(SIGSEGV, current);
-}
-
-static inline void setup_rt_frame(struct k_sigaction * ka,
- struct pt_regs *regs, int signr,
- sigset_t *set, siginfo_t *info)
-{
- struct rt_sigframe32 *frame;
- int err = 0;
-
- frame = get_sigframe(ka, regs, sizeof(*frame));
- if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
- goto give_sigsegv;
-
- /* Set up to return from userspace. If provided, use a stub already
- in userspace. */
- /*
- * Set up the return code ...
- *
- * li v0, __NR_O32_rt_sigreturn
- * syscall
- */
- err |= __put_user(0x24020000 + __NR_O32_rt_sigreturn, frame->rs_code + 0);
- err |= __put_user(0x0000000c , frame->rs_code + 1);
- flush_cache_sigtramp((unsigned long) frame->rs_code);
-
- /* Convert (siginfo_t -> siginfo_t32) and copy to user. */
- err |= copy_siginfo_to_user32(&frame->rs_info, info);
-
- /* Create the ucontext. */
- err |= __put_user(0, &frame->rs_uc.uc_flags);
- err |= __put_user(0, &frame->rs_uc.uc_link);
- err |= __put_user((void *)current->sas_ss_sp,
- &frame->rs_uc.uc_stack.ss_sp);
- err |= __put_user(sas_ss_flags(regs->regs[29]),
- &frame->rs_uc.uc_stack.ss_flags);
- err |= __put_user(current->sas_ss_size,
- &frame->rs_uc.uc_stack.ss_size);
- err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext);
- err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
-
- if (err)
- goto give_sigsegv;
-
- /*
- * Arguments to signal handler:
- *
- * a0 = signal number
- * a1 = 0 (should be cause)
- * a2 = pointer to ucontext
- *
- * $25 and c0_epc point to the signal handler, $29 points to
- * the struct rt_sigframe32.
- */
- regs->regs[ 4] = signr;
- regs->regs[ 5] = (unsigned long) &frame->rs_info;
- regs->regs[ 6] = (unsigned long) &frame->rs_uc;
- regs->regs[29] = (unsigned long) frame;
- regs->regs[31] = (unsigned long) frame->rs_code;
- regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
-
-#if DEBUG_SIG
- printk("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%p\n",
- current->comm, current->pid,
- frame, regs->cp0_epc, frame->rs_code);
-#endif
- return;
-
-give_sigsegv:
- if (signr == SIGSEGV)
- ka->sa.sa_handler = SIG_DFL;
- force_sig(SIGSEGV, current);
-}
-
-static inline void handle_signal(unsigned long sig, siginfo_t *info,
- sigset_t *oldset, struct pt_regs * regs)
-{
- struct k_sigaction *ka = ¤t->sighand->action[sig-1];
-
- switch (regs->regs[0]) {
- case ERESTARTNOHAND:
- regs->regs[2] = EINTR;
- break;
- case ERESTARTSYS:
- if(!(ka->sa.sa_flags & SA_RESTART)) {
- regs->regs[2] = EINTR;
- break;
- }
- /* fallthrough */
- case ERESTARTNOINTR: /* Userland will reload $v0. */
- regs->regs[7] = regs->regs[26];
- regs->cp0_epc -= 8;
- }
-
- regs->regs[0] = 0; /* Don't deal with this again. */
-
- if (ka->sa.sa_flags & SA_SIGINFO)
- setup_rt_frame(ka, regs, sig, oldset, info);
- else
- setup_frame(ka, regs, sig, oldset);
-
- if (ka->sa.sa_flags & SA_ONESHOT)
- ka->sa.sa_handler = SIG_DFL;
- if (!(ka->sa.sa_flags & SA_NODEFER)) {
- spin_lock_irq(¤t->sighand->siglock);
- sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
- sigaddset(¤t->blocked,sig);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
- }
-}
-
-asmlinkage int do_signal32(sigset_t *oldset, struct pt_regs *regs)
-{
- siginfo_t info;
- int signr;
-
- if (!oldset)
- oldset = ¤t->blocked;
-
- signr = get_signal_to_deliver(&info, regs, NULL);
- if (signr > 0) {
- handle_signal(signr, &info, oldset, regs);
- return 1;
- }
-
- /*
- * Who's code doesn't conform to the restartable syscall convention
- * dies here!!! The li instruction, a single machine instruction,
- * must directly be followed by the syscall instruction.
- */
- if (regs->regs[0]) {
- if (regs->regs[2] == ERESTARTNOHAND ||
- regs->regs[2] == ERESTARTSYS ||
- regs->regs[2] == ERESTARTNOINTR) {
- regs->regs[7] = regs->regs[26];
- regs->cp0_epc -= 8;
- }
- }
- return 0;
-}
-
-asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 *act,
- struct sigaction32 *oact,
- unsigned int sigsetsize)
-{
- struct k_sigaction new_sa, old_sa;
- int ret = -EINVAL;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t))
- goto out;
-
- if (act) {
- int err = 0;
-
- if (!access_ok(VERIFY_READ, act, sizeof(*act)))
- return -EFAULT;
- err |= __get_user((u32)(u64)new_sa.sa.sa_handler,
- &act->sa_handler);
- err |= __get_user(new_sa.sa.sa_flags, &act->sa_flags);
- err |= get_sigset(&new_sa.sa.sa_mask, &act->sa_mask);
- if (err)
- return -EFAULT;
- }
-
- ret = do_sigaction(sig, act ? &new_sa : NULL, oact ? &old_sa : NULL);
-
- if (!ret && oact) {
- int err = 0;
-
- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
- return -EFAULT;
-
- err |= __put_user((u32)(u64)old_sa.sa.sa_handler,
- &oact->sa_handler);
- err |= __put_user(old_sa.sa.sa_flags, &oact->sa_flags);
- err |= put_sigset(&old_sa.sa.sa_mask, &oact->sa_mask);
- if (err)
- return -EFAULT;
- }
-out:
- return ret;
-}
-
-asmlinkage long sys_rt_sigprocmask(int how, sigset_t *set, sigset_t *oset,
- size_t sigsetsize);
-
-asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t *set,
- compat_sigset_t *oset, unsigned int sigsetsize)
-{
- sigset_t old_set, new_set;
- int ret;
- mm_segment_t old_fs = get_fs();
-
- if (set && get_sigset(&new_set, set))
- return -EFAULT;
-
- set_fs (KERNEL_DS);
- ret = sys_rt_sigprocmask(how, set ? &new_set : NULL,
- oset ? &old_set : NULL, sigsetsize);
- set_fs (old_fs);
-
- if (!ret && oset && put_sigset(&old_set, oset))
- return -EFAULT;
-
- return ret;
-}
-
-asmlinkage long sys_rt_sigpending(sigset_t *set, size_t sigsetsize);
-
-asmlinkage int sys32_rt_sigpending(compat_sigset_t *uset,
- unsigned int sigsetsize)
-{
- int ret;
- sigset_t set;
- mm_segment_t old_fs = get_fs();
-
- set_fs (KERNEL_DS);
- ret = sys_rt_sigpending(&set, sigsetsize);
- set_fs (old_fs);
-
- if (!ret && put_sigset(&set, uset))
- return -EFAULT;
-
- return ret;
-}
-
-asmlinkage int sys32_rt_sigtimedwait(compat_sigset_t *uthese,
- siginfo_t32 *uinfo, struct compat_timespec *uts,
- compat_time_t sigsetsize)
-{
- int ret, sig;
- sigset_t these;
- compat_sigset_t these32;
- struct timespec ts;
- siginfo_t info;
- long timeout = 0;
-
- /*
- * As the result of a brainfarting competition a few years ago the
- * size of sigset_t for the 32-bit kernel was choosen to be 128 bits
- * but nothing so far is actually using that many, 64 are enough. So
- * for now we just drop the high bits.
- */
- if (copy_from_user (&these32, uthese, sizeof(compat_old_sigset_t)))
- return -EFAULT;
-
- switch (_NSIG_WORDS) {
-#ifdef __MIPSEB__
- case 4: these.sig[3] = these32.sig[6] | (((long)these32.sig[7]) << 32);
- case 3: these.sig[2] = these32.sig[4] | (((long)these32.sig[5]) << 32);
- case 2: these.sig[1] = these32.sig[2] | (((long)these32.sig[3]) << 32);
- case 1: these.sig[0] = these32.sig[0] | (((long)these32.sig[1]) << 32);
-#endif
-#ifdef __MIPSEL__
- case 4: these.sig[3] = these32.sig[7] | (((long)these32.sig[6]) << 32);
- case 3: these.sig[2] = these32.sig[5] | (((long)these32.sig[4]) << 32);
- case 2: these.sig[1] = these32.sig[3] | (((long)these32.sig[2]) << 32);
- case 1: these.sig[0] = these32.sig[1] | (((long)these32.sig[0]) << 32);
-#endif
- }
-
- /*
- * Invert the set of allowed signals to get those we
- * want to block.
- */
- sigdelsetmask(&these, sigmask(SIGKILL)|sigmask(SIGSTOP));
- signotset(&these);
-
- if (uts) {
- if (get_user (ts.tv_sec, &uts->tv_sec) ||
- get_user (ts.tv_nsec, &uts->tv_nsec))
- return -EINVAL;
- if (ts.tv_nsec >= 1000000000L || ts.tv_nsec < 0
- || ts.tv_sec < 0)
- return -EINVAL;
- }
-
- spin_lock_irq(¤t->sighand->siglock);
- sig = dequeue_signal(current, &these, &info);
- if (!sig) {
- /* None ready -- temporarily unblock those we're interested
- in so that we'll be awakened when they arrive. */
- sigset_t oldblocked = current->blocked;
- sigandsets(¤t->blocked, ¤t->blocked, &these);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- timeout = MAX_SCHEDULE_TIMEOUT;
- if (uts)
- timeout = (timespec_to_jiffies(&ts)
- + (ts.tv_sec || ts.tv_nsec));
-
- current->state = TASK_INTERRUPTIBLE;
- timeout = schedule_timeout(timeout);
-
- spin_lock_irq(¤t->sighand->siglock);
- sig = dequeue_signal(current, &these, &info);
- current->blocked = oldblocked;
- recalc_sigpending();
- }
- spin_unlock_irq(¤t->sighand->siglock);
-
- if (sig) {
- ret = sig;
- if (uinfo) {
- if (copy_siginfo_to_user32(uinfo, &info))
- ret = -EFAULT;
- }
- } else {
- ret = -EAGAIN;
- if (timeout)
- ret = -EINTR;
- }
-
- return ret;
-}
-
-extern asmlinkage int sys_rt_sigqueueinfo(int pid, int sig, siginfo_t *uinfo);
-
-asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, siginfo_t32 *uinfo)
-{
- siginfo_t info;
- int ret;
- mm_segment_t old_fs = get_fs();
-
- if (copy_from_user (&info, uinfo, 3*sizeof(int)) ||
- copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE))
- return -EFAULT;
- set_fs (KERNEL_DS);
- ret = sys_rt_sigqueueinfo(pid, sig, &info);
- set_fs (old_fs);
- return ret;
-}
diff -Nru a/arch/mips64/kernel/smp.c b/arch/mips64/kernel/smp.c
--- a/arch/mips64/kernel/smp.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,408 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- * Copyright (C) 2000, 2001 Kanoj Sarcar
- * Copyright (C) 2000, 2001 Ralf Baechle
- * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
- * Copyright (C) 2000, 2001 Broadcom Corporation
- */
-#include <linux/config.h>
-#include <linux/cache.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-#include <linux/threads.h>
-#include <linux/module.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/sched.h>
-
-#include <asm/atomic.h>
-#include <asm/cpu.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/hardirq.h>
-#include <asm/mmu_context.h>
-#include <asm/smp.h>
-
-int smp_threads_ready; /* Not used */
-
-// static atomic_t cpus_booted = ATOMIC_INIT(0);
-atomic_t cpus_booted = ATOMIC_INIT(0);
-
-cpumask_t phys_cpu_present_map; /* Bitmask of physically CPUs */
-cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
-int __cpu_number_map[NR_CPUS];
-int __cpu_logical_map[NR_CPUS];
-
-/* These are defined by the board-specific code. */
-
-/*
- * Cause the function described by call_data to be executed on the passed
- * cpu. When the function has finished, increment the finished field of
- * call_data.
- */
-void core_send_ipi(int cpu, unsigned int action);
-
-/*
- * Clear all undefined state in the cpu, set up sp and gp to the passed
- * values, and kick the cpu into smp_bootstrap();
- */
-void prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp);
-
-/*
- * After we've done initial boot, this function is called to allow the
- * board code to clean up state, if needed
- */
-void prom_init_secondary(void);
-
-void prom_smp_finish(void);
-
-cycles_t cacheflush_time;
-unsigned long cache_decay_ticks;
-
-void smp_tune_scheduling (void)
-{
- struct cache_desc *cd = ¤t_cpu_data.scache;
- unsigned long cachesize; /* kB */
- unsigned long bandwidth = 350; /* MB/s */
- unsigned long cpu_khz;
-
- /*
- * Crude estimate until we actually meassure ...
- */
- cpu_khz = loops_per_jiffy * 2 * HZ / 1000;
-
- /*
- * Rough estimation for SMP scheduling, this is the number of
- * cycles it takes for a fully memory-limited process to flush
- * the SMP-local cache.
- *
- * (For a P5 this pretty much means we will choose another idle
- * CPU almost always at wakeup time (this is due to the small
- * L1 cache), on PIIs it's around 50-100 usecs, depending on
- * the cache size)
- */
- if (!cpu_khz) {
- /*
- * This basically disables processor-affinity scheduling on SMP
- * without a cycle counter. Currently all SMP capable MIPS
- * processors have a cycle counter.
- */
- cacheflush_time = 0;
- return;
- }
-
- cachesize = cd->linesz * cd->sets * cd->ways;
- cacheflush_time = (cpu_khz>>10) * (cachesize<<10) / bandwidth;
- cache_decay_ticks = (long)cacheflush_time/cpu_khz * HZ / 1000;
-
- printk("per-CPU timeslice cutoff: %ld.%02ld usecs.\n",
- (long)cacheflush_time/(cpu_khz/1000),
- ((long)cacheflush_time*100/(cpu_khz/1000)) % 100);
- printk("task migration cache decay timeout: %ld msecs.\n",
- (cache_decay_ticks + 1) * 1000 / HZ);
-}
-
-void __init smp_callin(void)
-{
-#if 0
- calibrate_delay();
- smp_store_cpu_info(cpuid);
-#endif
-}
-
-#ifndef CONFIG_SGI_IP27
-/*
- * Hook for doing final board-specific setup after the generic smp setup
- * is done
- */
-asmlinkage void start_secondary(void)
-{
- unsigned int cpu = smp_processor_id();
-
- cpu_probe();
- prom_init_secondary();
- per_cpu_trap_init();
-
- /*
- * XXX parity protection should be folded in here when it's converted
- * to an option instead of something based on .cputype
- */
- pgd_current[cpu] = init_mm.pgd;
- cpu_data[cpu].udelay_val = loops_per_jiffy;
- prom_smp_finish();
- printk("Slave cpu booted successfully\n");
- CPUMASK_SETB(cpu_online_map, cpu);
- atomic_inc(&cpus_booted);
- cpu_idle();
-}
-#endif /* CONFIG_SGI_IP27 */
-
-/*
- * this function sends a 'reschedule' IPI to another CPU.
- * it goes straight through and wastes no time serializing
- * anything. Worst case is that we lose a reschedule ...
- */
-void smp_send_reschedule(int cpu)
-{
- core_send_ipi(cpu, SMP_RESCHEDULE_YOURSELF);
-}
-
-static spinlock_t call_lock = SPIN_LOCK_UNLOCKED;
-
-struct call_data_struct *call_data;
-
-/*
- * Run a function on all other CPUs.
- * <func> The function to run. This must be fast and non-blocking.
- * <info> An arbitrary pointer to pass to the function.
- * <retry> If true, keep retrying until ready.
- * <wait> If true, wait until function has completed on other CPUs.
- * [RETURNS] 0 on success, else a negative status code.
- *
- * Does not return until remote CPUs are nearly ready to execute <func>
- * or are or have executed.
- *
- * You must not call this function with disabled interrupts or from a
- * hardware interrupt handler or from a bottom half handler.
- */
-int smp_call_function (void (*func) (void *info), void *info, int retry,
- int wait)
-{
- struct call_data_struct data;
- int i, cpus = num_online_cpus() - 1;
- int cpu = smp_processor_id();
-
- if (!cpus)
- return 0;
-
- data.func = func;
- data.info = info;
- atomic_set(&data.started, 0);
- data.wait = wait;
- if (wait)
- atomic_set(&data.finished, 0);
-
- spin_lock(&call_lock);
- call_data = &data;
-
- /* Send a message to all other CPUs and wait for them to respond */
- for (i = 0; i < NR_CPUS; i++)
- if (cpu_online(cpu) && cpu != smp_processor_id())
- core_send_ipi(i, SMP_CALL_FUNCTION);
-
- /* Wait for response */
- /* FIXME: lock-up detection, backtrace on lock-up */
- while (atomic_read(&data.started) != cpus)
- barrier();
-
- if (wait)
- while (atomic_read(&data.finished) != cpus)
- barrier();
- spin_unlock(&call_lock);
-
- return 0;
-}
-
-void smp_call_function_interrupt(void)
-{
- void (*func) (void *info) = call_data->func;
- void *info = call_data->info;
- int wait = call_data->wait;
-
- irq_enter();
- /*
- * Notify initiating CPU that I've grabbed the data and am
- * about to execute the function.
- */
- mb();
- atomic_inc(&call_data->started);
-
- /*
- * At this point the info structure may be out of scope unless wait==1.
- */
- irq_enter();
- (*func)(info);
- irq_exit();
-
- if (wait) {
- mb();
- atomic_inc(&call_data->finished);
- }
-}
-
-static void stop_this_cpu(void *dummy)
-{
- /*
- * Remove this CPU:
- */
- clear_bit(smp_processor_id(), &cpu_online_map);
- local_irq_enable(); /* May need to service _machine_restart IPI */
- for (;;); /* Wait if available. */
-}
-
-void smp_send_stop(void)
-{
- smp_call_function(stop_this_cpu, NULL, 1, 0);
-}
-
-/* Not really SMP stuff ... */
-int setup_profiling_timer(unsigned int multiplier)
-{
- return 0;
-}
-
-static void flush_tlb_all_ipi(void *info)
-{
- local_flush_tlb_all();
-}
-
-void flush_tlb_all(void)
-{
- on_each_cpu(flush_tlb_all_ipi, 0, 1, 1);
-}
-
-static void flush_tlb_mm_ipi(void *mm)
-{
- local_flush_tlb_mm((struct mm_struct *)mm);
-}
-
-/*
- * The following tlb flush calls are invoked when old translations are
- * being torn down, or pte attributes are changing. For single threaded
- * address spaces, a new context is obtained on the current cpu, and tlb
- * context on other cpus are invalidated to force a new context allocation
- * at switch_mm time, should the mm ever be used on other cpus. For
- * multithreaded address spaces, intercpu interrupts have to be sent.
- * Another case where intercpu interrupts are required is when the target
- * mm might be active on another cpu (eg debuggers doing the flushes on
- * behalf of debugees, kswapd stealing pages from another process etc).
- * Kanoj 07/00.
- */
-
-void flush_tlb_mm(struct mm_struct *mm)
-{
- preempt_disable();
-
- if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
- smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
- } else {
- int i;
- for (i = 0; i < num_online_cpus(); i++)
- if (smp_processor_id() != i)
- cpu_context(i, mm) = 0;
- }
- local_flush_tlb_mm(mm);
-
- preempt_enable();
-}
-
-struct flush_tlb_data {
- struct vm_area_struct *vma;
- unsigned long addr1;
- unsigned long addr2;
-};
-
-static void flush_tlb_range_ipi(void *info)
-{
- struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
-
- local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
-}
-
-void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
-{
- struct mm_struct *mm = vma->vm_mm;
-
- preempt_disable();
- if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
- struct flush_tlb_data fd;
-
- fd.vma = vma;
- fd.addr1 = start;
- fd.addr2 = end;
- smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
- } else {
- int i;
- for (i = 0; i < num_online_cpus(); i++)
- if (smp_processor_id() != i)
- cpu_context(i, mm) = 0;
- }
- local_flush_tlb_range(vma, start, end);
- preempt_enable();
-}
-
-static void flush_tlb_kernel_range_ipi(void *info)
-{
- struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
-
- local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
-}
-
-void flush_tlb_kernel_range(unsigned long start, unsigned long end)
-{
- struct flush_tlb_data fd;
-
- fd.addr1 = start;
- fd.addr2 = end;
- smp_call_function(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
- local_flush_tlb_kernel_range(start, end);
-}
-
-static void flush_tlb_page_ipi(void *info)
-{
- struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
-
- local_flush_tlb_page(fd->vma, fd->addr1);
-}
-
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
- preempt_disable();
- if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
- struct flush_tlb_data fd;
-
- fd.vma = vma;
- fd.addr1 = page;
- smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
- } else {
- int i;
- for (i = 0; i < num_online_cpus(); i++)
- if (smp_processor_id() != i)
- cpu_context(i, vma->vm_mm) = 0;
- }
- local_flush_tlb_page(vma, page);
- preempt_enable();
-}
-
-static void flush_tlb_one_ipi(void *info)
-{
- unsigned long vaddr = (unsigned long) info;
-
- local_flush_tlb_one(vaddr);
-}
-
-void flush_tlb_one(unsigned long vaddr)
-{
- smp_call_function(flush_tlb_one_ipi, (void *) vaddr, 1, 1);
- local_flush_tlb_one(vaddr);
-}
-
-EXPORT_SYMBOL(flush_tlb_page);
-EXPORT_SYMBOL(flush_tlb_one);
-EXPORT_SYMBOL(cpu_data);
-EXPORT_SYMBOL(synchronize_irq);
diff -Nru a/arch/mips64/kernel/syscall.c b/arch/mips64/kernel/syscall.c
--- a/arch/mips64/kernel/syscall.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,332 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#include <linux/errno.h>
-#include <linux/linkage.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/mman.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/file.h>
-#include <linux/utsname.h>
-#include <linux/unistd.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/slab.h>
-#include <asm/ipc.h>
-#include <asm/cachectl.h>
-#include <asm/offset.h>
-#include <asm/pgalloc.h>
-#include <asm/ptrace.h>
-#include <asm/signal.h>
-#include <asm/stackframe.h>
-#include <asm/sysmips.h>
-#include <asm/uaccess.h>
-
-extern asmlinkage void syscall_trace(void);
-
-asmlinkage int sys_pipe(abi64_no_regargs, struct pt_regs regs)
-{
- int fd[2];
- int error, res;
-
- error = do_pipe(fd);
- if (error) {
- res = error;
- goto out;
- }
- regs.regs[3] = fd[1];
- res = fd[0];
-out:
- return res;
-}
-
-unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
-
-#define COLOUR_ALIGN(addr,pgoff) \
- ((((addr) + shm_align_mask) & ~shm_align_mask) + \
- (((pgoff) << PAGE_SHIFT) & shm_align_mask))
-
-unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
- unsigned long len, unsigned long pgoff, unsigned long flags)
-{
- struct vm_area_struct * vmm;
- int do_color_align;
-
- if (flags & MAP_FIXED) {
- /*
- * We do not accept a shared mapping if it would violate
- * cache aliasing constraints.
- */
- if ((flags & MAP_SHARED) && (addr & shm_align_mask))
- return -EINVAL;
- return addr;
- }
-
- if (len > TASK_SIZE)
- return -ENOMEM;
- do_color_align = 0;
- if (filp || (flags & MAP_SHARED))
- do_color_align = 1;
- if (addr) {
- if (do_color_align)
- addr = COLOUR_ALIGN(addr, pgoff);
- else
- addr = PAGE_ALIGN(addr);
- vmm = find_vma(current->mm, addr);
- if (TASK_SIZE - len >= addr &&
- (!vmm || addr + len <= vmm->vm_start))
- return addr;
- }
- addr = TASK_UNMAPPED_BASE;
- if (do_color_align)
- addr = COLOUR_ALIGN(addr, pgoff);
- else
- addr = PAGE_ALIGN(addr);
-
- for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) {
- /* At this point: (!vmm || addr < vmm->vm_end). */
- if (TASK_SIZE - len < addr)
- return -ENOMEM;
- if (!vmm || addr + len <= vmm->vm_start)
- return addr;
- addr = vmm->vm_end;
- if (do_color_align)
- addr = COLOUR_ALIGN(addr, pgoff);
- }
-}
-
-asmlinkage unsigned long
-sys_mmap(unsigned long addr, size_t len, unsigned long prot,
- unsigned long flags, unsigned long fd, off_t offset)
-{
- struct file * file = NULL;
- unsigned long error;
-
- error = -EINVAL;
- if (offset & ~PAGE_MASK)
- goto out;
-
- if (!(flags & MAP_ANONYMOUS)) {
- error = -EBADF;
- file = fget(fd);
- if (!file)
- goto out;
- }
- flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
- down_write(¤t->mm->mmap_sem);
- error = do_mmap(file, addr, len, prot, flags, offset);
- up_write(¤t->mm->mmap_sem);
- if (file)
- fput(file);
-
-out:
- return error;
-}
-
-asmlinkage int sys_fork(abi64_no_regargs, struct pt_regs regs)
-{
- save_static(®s);
- return do_fork(SIGCHLD, regs.regs[29], ®s, 0, NULL, NULL);
-}
-
-asmlinkage int sys_clone(abi64_no_regargs, struct pt_regs regs)
-{
- unsigned long clone_flags;
- unsigned long newsp;
- int *parent_tidptr, *child_tidptr;
-
- save_static(®s);
- clone_flags = regs.regs[4];
- newsp = regs.regs[5];
- if (!newsp)
- newsp = regs.regs[29];
- parent_tidptr = (int *) regs.regs[6];
- child_tidptr = (int *) regs.regs[7];
- return do_fork(clone_flags & ~CLONE_IDLETASK, newsp, ®s, 0,
- parent_tidptr, child_tidptr);
-}
-
-/*
- * sys_execve() executes a new program.
- */
-asmlinkage int sys_execve(abi64_no_regargs, struct pt_regs regs)
-{
- int error;
- char * filename;
-
- filename = getname((char *) (long)regs.regs[4]);
- error = PTR_ERR(filename);
- if (IS_ERR(filename))
- goto out;
- error = do_execve(filename, (char **) (long)regs.regs[5],
- (char **) (long)regs.regs[6], ®s);
- putname(filename);
-
-out:
- return error;
-}
-
-/*
- * Do the indirect syscall syscall.
- *
- * XXX This is borken.
- */
-asmlinkage int sys_syscall(abi64_no_regargs, struct pt_regs regs)
-{
- return -ENOSYS;
-}
-
-asmlinkage int sys_sysmips(int cmd, long arg1, int arg2, int arg3)
-{
- int tmp, len;
- char *name;
-
- switch(cmd) {
- case SETNAME: {
- char nodename[__NEW_UTS_LEN + 1];
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- name = (char *) arg1;
-
- len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
- if (len < 0)
- return -EFAULT;
-
- down_write(&uts_sem);
- strncpy(system_utsname.nodename, nodename, len);
- nodename[__NEW_UTS_LEN] = '\0';
- strlcpy(system_utsname.nodename, nodename,
- sizeof(system_utsname.nodename));
- up_write(&uts_sem);
- return 0;
- }
-
- case MIPS_ATOMIC_SET:
- printk(KERN_CRIT "How did I get here?\n");
- return -EINVAL;
-
- case MIPS_FIXADE:
- tmp = current->thread.mflags & ~3;
- current->thread.mflags = tmp | (arg1 & 3);
- return 0;
-
- case FLUSH_CACHE:
- __flush_cache_all();
- return 0;
-
- case MIPS_RDNVRAM:
- return -EIO;
- }
-
- return -EINVAL;
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
- unsigned long third, void *ptr, long fifth)
-{
- int version, ret;
-
- version = call >> 16; /* hack for backward compatibility */
- call &= 0xffff;
-
- switch (call) {
- case SEMOP:
- return sys_semop (first, (struct sembuf *)ptr, second);
- case SEMGET:
- return sys_semget (first, second, third);
- case SEMCTL: {
- union semun fourth;
- if (!ptr)
- return -EINVAL;
- if (get_user(fourth.__pad, (void **) ptr))
- return -EFAULT;
- return sys_semctl (first, second, third, fourth);
- }
-
- case MSGSND:
- return sys_msgsnd (first, (struct msgbuf *) ptr,
- second, third);
- case MSGRCV:
- switch (version) {
- case 0: {
- struct ipc_kludge tmp;
- if (!ptr)
- return -EINVAL;
-
- if (copy_from_user(&tmp,
- (struct ipc_kludge *) ptr,
- sizeof (tmp)))
- return -EFAULT;
- return sys_msgrcv (first, tmp.msgp, second,
- tmp.msgtyp, third);
- }
- default:
- return sys_msgrcv (first,
- (struct msgbuf *) ptr,
- second, fifth, third);
- }
- case MSGGET:
- return sys_msgget ((key_t) first, second);
- case MSGCTL:
- return sys_msgctl (first, second, (struct msqid_ds *) ptr);
-
- case SHMAT:
- switch (version) {
- default: {
- ulong raddr;
- ret = sys_shmat (first, (char *) ptr, second, &raddr);
- if (ret)
- return ret;
- return put_user (raddr, (ulong *) third);
- }
- case 1: /* iBCS2 emulator entry point */
- if (!segment_eq(get_fs(), get_ds()))
- return -EINVAL;
- return sys_shmat (first, (char *) ptr, second, (ulong *) third);
- }
- case SHMDT:
- return sys_shmdt ((char *)ptr);
- case SHMGET:
- return sys_shmget (first, second, third);
- case SHMCTL:
- return sys_shmctl (first, second,
- (struct shmid_ds *) ptr);
- default:
- return -ENOSYS;
- }
-}
-
-/*
- * No implemented yet ...
- */
-asmlinkage int sys_cachectl(char *addr, int nbytes, int op)
-{
- return -ENOSYS;
-}
-
-/*
- * If we ever come here the user sp is bad. Zap the process right away.
- * Due to the bad stack signaling wouldn't work.
- */
-asmlinkage void bad_stack(void)
-{
- do_exit(SIGSEGV);
-}
diff -Nru a/arch/mips64/kernel/time.c b/arch/mips64/kernel/time.c
--- a/arch/mips64/kernel/time.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,606 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * Common time service routines for MIPS machines. See
- * Documents/mips/README.txt.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/param.h>
-#include <linux/time.h>
-#include <linux/smp.h>
-#include <linux/kernel_stat.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/hardirq.h>
-#include <asm/div64.h>
-
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-#define USECS_PER_JIFFY_FRAC ((u32)((1000000ULL << 32) / HZ))
-
-#define TICK_SIZE (tick_nsec / 1000)
-
-u64 jiffies_64;
-
-/*
- * forward reference
- */
-extern volatile unsigned long wall_jiffies;
-
-spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
-
-/*
- * whether we emulate local_timer_interrupts for SMP machines.
- */
-int emulate_local_timer_interrupt;
-
-/*
- * By default we provide the null RTC ops
- */
-static unsigned long null_rtc_get_time(void)
-{
- return mktime(2000, 1, 1, 0, 0, 0);
-}
-
-static int null_rtc_set_time(unsigned long sec)
-{
- return 0;
-}
-
-unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
-int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
-
-
-/*
- * This version of gettimeofday has microsecond resolution and better than
- * microsecond precision on fast machines with cycle counter.
- */
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long seq;
- unsigned long usec, sec;
-
- do {
- seq = read_seqbegin(&xtime_lock);
- usec = do_gettimeoffset();
- {
- unsigned long lost = jiffies - wall_jiffies;
- if (lost)
- usec += lost * (1000000 / HZ);
- }
- sec = xtime.tv_sec;
- usec += (xtime.tv_nsec / 1000);
- } while (read_seqretry(&xtime_lock, seq));
-
- while (usec >= 1000000) {
- usec -= 1000000;
- sec++;
- }
-
- tv->tv_sec = sec;
- tv->tv_usec = usec;
-}
-
-int do_settimeofday(struct timespec *tv)
-{
- time_t wtm_sec, sec = tv->tv_sec;
- long wtm_nsec, nsec = tv->tv_nsec;
-
- if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
- return -EINVAL;
-
- write_seqlock_irq(&xtime_lock);
- /*
- * This is revolting. We need to set "xtime" correctly. However, the
- * value in this location is the value at the most recent update of
- * wall time. Discover what correction gettimeofday() would have
- * made, and then undo it!
- */
- nsec -= do_gettimeoffset() * NSEC_PER_USEC;
- nsec -= (jiffies - wall_jiffies) * TICK_NSEC;
-
- wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - tsec);
- wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
- set_normalized_timespec(&xtime, sec, nsec);
- set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
- write_sequnlock_irq(&xtime_lock);
-
- return 0;
-}
-
-
-/*
- * Gettimeoffset routines. These routines returns the time duration
- * since last timer interrupt in usecs.
- *
- * If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset.
- * Otherwise use calibrate_gettimeoffset()
- *
- * If the CPU does not have counter register all, you can either supply
- * your own gettimeoffset() routine, or use null_gettimeoffset() routines,
- * which gives the same resolution as HZ.
- */
-
-
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-
-/* usecs per counter cycle, shifted to left by 32 bits */
-static unsigned int sll32_usecs_per_cycle=0;
-
-/* how many counter cycles in a jiffy */
-static unsigned long cycles_per_jiffy=0;
-
-/* Cycle counter value at the previous timer interrupt.. */
-static unsigned int timerhi, timerlo;
-
-/* expirelo is the count value for next CPU timer interrupt */
-static unsigned int expirelo;
-
-/* last time when xtime and rtc are sync'ed up */
-static long last_rtc_update;
-
-/* the function pointer to one of the gettimeoffset funcs*/
-unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset;
-
-unsigned long null_gettimeoffset(void)
-{
- return 0;
-}
-
-unsigned long fixed_rate_gettimeoffset(void)
-{
- u32 count;
- unsigned long res;
-
- /* Get last timer tick in absolute kernel time */
- count = read_c0_count();
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (sll32_usecs_per_cycle));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
-
- return res;
-}
-
-/*
- * Cached "1/(clocks per usec)*2^32" value.
- * It has to be recalculated once each jiffy.
- */
-static unsigned long cached_quotient;
-
-/* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
-static unsigned long last_jiffies = 0;
-
-
-/*
- * This is copied from dec/time.c:do_ioasic_gettimeoffset() by Mercij.
- */
-unsigned long calibrate_div32_gettimeoffset(void)
-{
- u32 count;
- unsigned long res, tmp;
- unsigned long quotient;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (last_jiffies != tmp) {
- last_jiffies = tmp;
- if (last_jiffies != 0) {
- unsigned long r0;
- do_div64_32(r0, timerhi, timerlo, tmp);
- do_div64_32(quotient, USECS_PER_JIFFY,
- USECS_PER_JIFFY_FRAC, r0);
- cached_quotient = quotient;
- }
- }
-
- /* Get last timer tick in absolute kernel time */
- count = read_c0_count();
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-
- __asm__("multu %2,%3"
- : "=l" (tmp), "=h" (res)
- : "r" (count), "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY - 1;
-
- return res;
-}
-
-unsigned long calibrate_div64_gettimeoffset(void)
-{
- u32 count;
- unsigned long res, tmp;
- unsigned long quotient;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (tmp && last_jiffies != tmp) {
- last_jiffies = tmp;
- __asm__(".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips3\n\t"
- "lwu\t%0,%2\n\t"
- "dsll32\t$1,%1,0\n\t"
- "or\t$1,$1,%0\n\t"
- "ddivu\t$0,$1,%3\n\t"
- "mflo\t$1\n\t"
- "dsll32\t%0,%4,0\n\t"
- "nop\n\t"
- "ddivu\t$0,%0,$1\n\t"
- "mflo\t%0\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=&r" (quotient)
- :"r" (timerhi),
- "m" (timerlo),
- "r" (tmp),
- "r" (USECS_PER_JIFFY));
- cached_quotient = quotient;
- }
-
- /* Get last timer tick in absolute kernel time */
- count = read_c0_count();
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
-
- return res;
-}
-
-
-/*
- * local_timer_interrupt() does profiling and process accounting
- * on a per-CPU basis.
- *
- * In UP mode, it is invoked from the (global) timer_interrupt.
- *
- * In SMP mode, it might invoked by per-CPU timer interrupt, or
- * a broadcasted inter-processor interrupt which itself is triggered
- * by the global timer interrupt.
- */
-void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- if (!user_mode(regs)) {
- if (prof_buffer && current->pid) {
- extern int _stext;
- unsigned long pc = regs->cp0_epc;
-
- pc -= (unsigned long) &_stext;
- pc >>= prof_shift;
- /*
- * Dont ignore out-of-bounds pc values silently,
- * put them into the last histogram slot, so if
- * present, they will show up as a sharp peak.
- */
- if (pc > prof_len-1)
- pc = prof_len-1;
- atomic_inc((atomic_t *)&prof_buffer[pc]);
- }
- }
-
-#ifdef CONFIG_SMP
- /* in UP mode, update_process_times() is invoked by do_timer() */
- update_process_times(user_mode(regs));
-#endif
-}
-
-/*
- * high-level timer interrupt service routines. This function
- * is set as irqaction->handler and is invoked through do_IRQ.
- */
-irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- if (cpu_has_counter) {
- unsigned int count;
-
- /* ack timer interrupt, and try to set next interrupt */
- expirelo += cycles_per_jiffy;
- write_c0_compare(expirelo);
- count = read_c0_count();
-
- /* check to see if we have missed any timer interrupts */
- if ((count - expirelo) < 0x7fffffff) {
- /* missed_timer_count ++; */
- expirelo = count + cycles_per_jiffy;
- write_c0_compare(expirelo);
- }
-
- /* Update timerhi/timerlo for intra-jiffy calibration. */
- timerhi += count < timerlo; /* Wrap around */
- timerlo = count;
- }
-
- /*
- * call the generic timer interrupt handling
- */
- do_timer(regs);
-
- /*
- * If we have an externally synchronized Linux clock, then update
- * CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be
- * called as close as possible to 500 ms before the new second starts.
- */
- write_seqlock(&xtime_lock);
- if ((time_status & STA_UNSYNC) == 0 &&
- xtime.tv_sec > last_rtc_update + 660 &&
- (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
- (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
- if (rtc_set_time(xtime.tv_sec) == 0) {
- last_rtc_update = xtime.tv_sec;
- } else {
- last_rtc_update = xtime.tv_sec - 600;
- /* do it again in 60 s */
- }
- }
- write_sequnlock(&xtime_lock);
-
- /*
- * If jiffies has overflowed in this timer_interrupt we must
- * update the timer[hi]/[lo] to make fast gettimeoffset funcs
- * quotient calc still valid. -arca
- */
- if (!jiffies) {
- timerhi = timerlo = 0;
- }
-
-#if !defined(CONFIG_SMP)
- /*
- * In UP mode, we call local_timer_interrupt() to do profiling
- * and process accouting.
- *
- * In SMP mode, local_timer_interrupt() is invoked by appropriate
- * low-level local timer interrupt handler.
- */
- local_timer_interrupt(0, NULL, regs);
-
-#else /* CONFIG_SMP */
-
- if (emulate_local_timer_interrupt) {
- /*
- * this is the place where we send out inter-process
- * interrupts and let each CPU do its own profiling
- * and process accouting.
- *
- * Obviously we need to call local_timer_interrupt() for
- * the current CPU too.
- */
- panic("Not implemented yet!!!");
- }
-#endif /* CONFIG_SMP */
-
- return IRQ_HANDLED;
-}
-
-asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
-{
- int cpu = smp_processor_id();
-
- irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
-
- /* we keep interrupt disabled all the time */
- timer_interrupt(irq, NULL, regs);
-
- irq_exit();
-
- if (softirq_pending(cpu))
- do_softirq();
-}
-
-asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
-{
- int cpu = smp_processor_id();
-
- irq_enter();
- kstat_cpu(cpu).irqs[irq]++;
-
- /* we keep interrupt disabled all the time */
- local_timer_interrupt(irq, NULL, regs);
-
- irq_exit();
-
- if (softirq_pending(cpu))
- do_softirq();
-}
-
-/*
- * time_init() - it does the following things.
- *
- * 1) board_time_init() -
- * a) (optional) set up RTC routines,
- * b) (optional) calibrate and set the mips_counter_frequency
- * (only needed if you intended to use fixed_rate_gettimeoffset
- * or use cpu counter as timer interrupt source)
- * 2) setup xtime based on rtc_get_time().
- * 3) choose a appropriate gettimeoffset routine.
- * 4) calculate a couple of cached variables for later usage
- * 5) board_timer_setup() -
- * a) (optional) over-write any choices made above by time_init().
- * b) machine specific code should setup the timer irqaction.
- * c) enable the timer interrupt
- */
-
-void (*board_time_init)(void) = NULL;
-void (*board_timer_setup)(struct irqaction *irq) = NULL;
-
-unsigned int mips_counter_frequency = 0;
-
-static struct irqaction timer_irqaction = {
- timer_interrupt,
- SA_INTERRUPT,
- 0,
- "timer",
- NULL,
- NULL
-};
-
-void __init time_init(void)
-{
- if (board_time_init)
- board_time_init();
-
- xtime.tv_sec = rtc_get_time();
- xtime.tv_nsec = 0;
- set_normalized_timespec(&wall_to_monotonic,
- -xtime.tv_sec, -xtime.tv_nsec);
-
- /* choose appropriate gettimeoffset routine */
- if (!cpu_has_counter) {
- /* no cpu counter - sorry */
- do_gettimeoffset = null_gettimeoffset;
- } else if (mips_counter_frequency != 0) {
- /* we have cpu counter and know counter frequency! */
- do_gettimeoffset = fixed_rate_gettimeoffset;
- } else if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) ||
- (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
- (current_cpu_data.isa_level == MIPS_CPU_ISA_II) ) {
- /* we need to calibrate the counter but we don't have
- * 64-bit division. */
- do_gettimeoffset = calibrate_div32_gettimeoffset;
- } else {
- /* we need to calibrate the counter but we *do* have
- * 64-bit division. */
- do_gettimeoffset = calibrate_div64_gettimeoffset;
- }
-
- /* caclulate cache parameters */
- if (mips_counter_frequency) {
- cycles_per_jiffy = mips_counter_frequency / HZ;
-
- /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
- /* any better way to do this? */
- sll32_usecs_per_cycle = mips_counter_frequency / 100000;
- sll32_usecs_per_cycle = 0xffffffff / sll32_usecs_per_cycle;
- sll32_usecs_per_cycle *= 10;
-
- /*
- * For those using cpu counter as timer, this sets up the
- * first interrupt
- */
- write_c0_compare(cycles_per_jiffy);
- write_c0_count(0);
- expirelo = cycles_per_jiffy;
- }
-
- /*
- * Call board specific timer interrupt setup.
- *
- * this pointer must be setup in machine setup routine.
- *
- * Even if the machine choose to use low-level timer interrupt,
- * it still needs to setup the timer_irqaction.
- * In that case, it might be better to set timer_irqaction.handler
- * to be NULL function so that we are sure the high-level code
- * is not invoked accidentally.
- */
- board_timer_setup(&timer_irqaction);
-}
-
-#define FEBRUARY 2
-#define STARTOFTIME 1970
-#define SECDAY 86400L
-#define SECYR (SECDAY * 365)
-#define leapyear(year) ((year) % 4 == 0)
-#define days_in_year(a) (leapyear(a) ? 366 : 365)
-#define days_in_month(a) (month_days[(a) - 1])
-
-static int month_days[12] = {
- 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
-};
-
-void to_tm(unsigned long tim, struct rtc_time * tm)
-{
- long hms, day, gday;
- int i;
-
- gday = day = tim / SECDAY;
- hms = tim % SECDAY;
-
- /* Hours, minutes, seconds are easy */
- tm->tm_hour = hms / 3600;
- tm->tm_min = (hms % 3600) / 60;
- tm->tm_sec = (hms % 3600) % 60;
-
- /* Number of years in days */
- for (i = STARTOFTIME; day >= days_in_year(i); i++)
- day -= days_in_year(i);
- tm->tm_year = i;
-
- /* Number of months in days left */
- if (leapyear(tm->tm_year))
- days_in_month(FEBRUARY) = 29;
- for (i = 1; day >= days_in_month(i); i++)
- day -= days_in_month(i);
- days_in_month(FEBRUARY) = 28;
- tm->tm_mon = i-1; /* tm_mon starts from 0 to 11 */
-
- /* Days are what is left over (+1) from all that. */
- tm->tm_mday = day + 1;
-
- /*
- * Determine the day of week
- */
- tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */
-}
-
-EXPORT_SYMBOL(rtc_lock);
diff -Nru a/arch/mips64/kernel/traps.c b/arch/mips64/kernel/traps.c
--- a/arch/mips64/kernel/traps.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,942 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000, 01 Ralf Baechle
- * Copyright (C) 1995, 1996 Paul M. Antoine
- * Copyright (C) 1998 Ulf Carlsson
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000, 01 MIPS Technologies, Inc.
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/spinlock.h>
-#include <linux/kallsyms.h>
-
-#include <asm/bootinfo.h>
-#include <asm/branch.h>
-#include <asm/cpu.h>
-#include <asm/fpu.h>
-#include <asm/module.h>
-#include <asm/pgtable.h>
-#include <asm/ptrace.h>
-#include <asm/sections.h>
-#include <asm/system.h>
-#include <asm/tlbdebug.h>
-#include <asm/traps.h>
-#include <asm/uaccess.h>
-#include <asm/mmu_context.h>
-#include <asm/watch.h>
-#include <asm/types.h>
-
-extern asmlinkage void __xtlb_mod(void);
-extern asmlinkage void __xtlb_tlbl(void);
-extern asmlinkage void __xtlb_tlbs(void);
-extern asmlinkage void handle_adel(void);
-extern asmlinkage void handle_ades(void);
-extern asmlinkage void handle_ibe(void);
-extern asmlinkage void handle_dbe(void);
-extern asmlinkage void handle_sys(void);
-extern asmlinkage void handle_bp(void);
-extern asmlinkage void handle_ri(void);
-extern asmlinkage void handle_cpu(void);
-extern asmlinkage void handle_ov(void);
-extern asmlinkage void handle_tr(void);
-extern asmlinkage void handle_fpe(void);
-extern asmlinkage void handle_mdmx(void);
-extern asmlinkage void handle_watch(void);
-extern asmlinkage void handle_mcheck(void);
-extern asmlinkage void handle_reserved(void);
-
-extern int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,
- struct mips_fpu_soft_struct *ctx);
-
-void (*board_be_init)(void);
-int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
-
-/*
- * These constant is for searching for possible module text segments.
- * MODULE_RANGE is a guess of how much space is likely to be vmalloced.
- */
-#define MODULE_RANGE (8*1024*1024)
-
-/*
- * This routine abuses get_user()/put_user() to reference pointers
- * with at least a bit of error checking ...
- */
-void show_stack(struct task_struct *task, unsigned long *sp)
-{
- const int field = 2 * sizeof(unsigned long);
- long stackdata;
- int i;
-
- sp = sp ? sp : (unsigned long *) &sp;
-
- printk("Stack: ");
- i = 1;
- while ((unsigned long) sp & (PAGE_SIZE - 1)) {
- if (i && ((i % (64 / sizeof(unsigned long))) == 0))
- printk("\n ");
- if (i > 40) {
- printk(" ...");
- break;
- }
-
- if (__get_user(stackdata, sp++)) {
- printk(" (Bad stack address)");
- break;
- }
-
- printk(" %0*lx", field, stackdata);
- i++;
- }
- printk("\n");
-}
-
-void show_trace(struct task_struct *task, unsigned long *stack)
-{
- const int field = 2 * sizeof(unsigned long);
- unsigned long addr;
-
- if (!stack)
- stack = (unsigned long*)&stack;
-
- printk("Call Trace:");
-#ifdef CONFIG_KALLSYMS
- printk("\n");
-#endif
- while (((long) stack & (THREAD_SIZE-1)) != 0) {
- addr = *stack++;
- if (kernel_text_address(addr)) {
- printk(" [<%0*lx>] ", field, addr);
- print_symbol("%s\n", addr);
- }
- }
- printk("\n");
-}
-
-void show_trace_task(struct task_struct *tsk)
-{
- show_trace(tsk, (long *)tsk->thread.reg29);
-}
-
-/*
- * The architecture-independent dump_stack generator
- */
-void dump_stack(void)
-{
- unsigned long stack;
-
- show_trace(current, &stack);
-}
-
-void show_code(unsigned int *pc)
-{
- long i;
-
- printk("\nCode:");
-
- for(i = -3 ; i < 6 ; i++) {
- unsigned int insn;
- if (__get_user(insn, pc + i)) {
- printk(" (Bad address in epc)\n");
- break;
- }
- printk("%c%08x%c", (i?' ':'<'), insn, (i?' ':'>'));
- }
-}
-
-void show_regs(struct pt_regs *regs)
-{
- const int field = 2 * sizeof(unsigned long);
- int i;
-
- printk("Cpu %d\n", smp_processor_id());
-
- /*
- * Saved main processor registers
- */
- for (i = 0; i < 32; i++) {
- if ((i % 4) == 0)
- printk("$%2d :", i);
- if (i == 0)
- printk(" %0*lx", field, 0UL);
- else if (i == 26 || i == 27)
- printk(" %*s", field, "");
- else
- printk(" %0*lx", field, regs->regs[i]);
-
- i++;
- if ((i % 4) == 0)
- printk("\n");
- }
-
- printk("Hi : %0*lx\n", field, regs->hi);
- printk("Lo : %0*lx\n", field, regs->lo);
-
- /*
- * Saved cp0 registers
- */
- printk("epc : %0*lx %s\n", field, regs->cp0_epc, print_tainted());
- printk("Status: %0*lx\n", field, regs->cp0_status);
- printk("Cause : %0*lx\n", field, regs->cp0_cause);
-
- if (regs->cp0_status & ST0_KX)
- printk("KX ");
- if (regs->cp0_status & ST0_SX)
- printk("SX ");
- if (regs->cp0_status & ST0_UX)
- printk("UX ");
- switch (regs->cp0_status & ST0_KSU) {
- case KSU_USER:
- printk("USER ");
- break;
- case KSU_SUPERVISOR:
- printk("SUPERVISOR ");
- break;
- case KSU_KERNEL:
- printk("KERNEL ");
- break;
- default:
- printk("BAD_MODE ");
- break;
- }
- if (regs->cp0_status & ST0_ERL)
- printk("ERL ");
- if (regs->cp0_status & ST0_EXL)
- printk("EXL ");
- if (regs->cp0_status & ST0_IE)
- printk("IE ");
-}
-
-void show_registers(struct pt_regs *regs)
-{
- const int field = 2 * sizeof(unsigned long);
-
- show_regs(regs);
- printk("Process %s (pid: %d, stackpage=%0*lx)\n",
- current->comm, current->pid, field, (unsigned long) current);
- show_stack(current, (long *) regs->regs[29]);
- show_trace(current, (long *) regs->regs[29]);
- show_code((unsigned int *) regs->cp0_epc);
- printk("\n");
-}
-
-static spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
-
-void __die(const char * str, struct pt_regs * regs, const char * file,
- const char * func, unsigned long line)
-{
- static int die_counter;
-
- console_verbose();
- spin_lock_irq(&die_lock);
- printk("%s", str);
- if (file && func)
- printk(" in %s:%s, line %ld", file, func, line);
- printk("[#%d]:\n", ++die_counter);
- show_registers(regs);
- spin_unlock_irq(&die_lock);
- do_exit(SIGSEGV);
-}
-
-void __die_if_kernel(const char * str, struct pt_regs * regs,
- const char * file, const char * func, unsigned long line)
-{
- if (!user_mode(regs))
- __die(str, regs, file, func, line);
-}
-
-extern const struct exception_table_entry __start___dbe_table[];
-extern const struct exception_table_entry __stop___dbe_table[];
-
-void __declare_dbe_table(void)
-{
- __asm__ __volatile__(
- ".section\t__dbe_table,\"a\"\n\t"
- ".previous"
- );
-}
-
-asmlinkage void do_be(struct pt_regs *regs)
-{
- const int field = 2 * sizeof(unsigned long);
- const struct exception_table_entry *fixup = NULL;
- int data = regs->cp0_cause & 4;
- int action = MIPS_BE_FATAL;
-
- /* XXX For now. Fixme, this searches the wrong table ... */
- if (data && !user_mode(regs))
- fixup = search_exception_tables(regs->cp0_epc);
-
- if (fixup)
- action = MIPS_BE_FIXUP;
-
- if (board_be_handler)
- action = board_be_handler(regs, fixup != 0);
-
- switch (action) {
- case MIPS_BE_DISCARD:
- return;
- case MIPS_BE_FIXUP:
- if (fixup) {
- regs->cp0_epc = fixup->nextinsn;
- return;
- }
- break;
- default:
- break;
- }
-
- /*
- * Assume it would be too dangerous to continue ...
- */
- printk(KERN_ALERT "%s bus error, epc == %0*lx, ra == %0*lx\n",
- data ? "Data" : "Instruction",
- field, regs->cp0_epc, field, regs->regs[31]);
- die_if_kernel("Oops", regs);
- force_sig(SIGBUS, current);
-}
-
-static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode)
-{
- unsigned int *epc;
-
- epc = (unsigned int *) regs->cp0_epc +
- ((regs->cp0_cause & CAUSEF_BD) != 0);
- if (!get_user(*opcode, epc))
- return 0;
-
- force_sig(SIGSEGV, current);
- return 1;
-}
-
-/*
- * ll/sc emulation
- */
-
-#define OPCODE 0xfc000000
-#define BASE 0x03e00000
-#define RT 0x001f0000
-#define OFFSET 0x0000ffff
-#define LL 0xc0000000
-#define SC 0xe0000000
-
-/*
- * The ll_bit is cleared by r*_switch.S
- */
-
-unsigned long ll_bit;
-
-static struct task_struct *ll_task = NULL;
-
-static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode)
-{
- unsigned long value, *vaddr;
- long offset;
- int signal = 0;
-
- /*
- * analyse the ll instruction that just caused a ri exception
- * and put the referenced address to addr.
- */
-
- /* sign extend offset */
- offset = opcode & OFFSET;
- offset <<= 16;
- offset >>= 16;
-
- vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset);
-
- if ((unsigned long)vaddr & 3) {
- signal = SIGBUS;
- goto sig;
- }
- if (get_user(value, vaddr)) {
- signal = SIGSEGV;
- goto sig;
- }
-
- if (ll_task == NULL || ll_task == current) {
- ll_bit = 1;
- } else {
- ll_bit = 0;
- }
- ll_task = current;
-
- regs->regs[(opcode & RT) >> 16] = value;
-
- compute_return_epc(regs);
- return;
-
-sig:
- force_sig(signal, current);
-}
-
-static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode)
-{
- unsigned long *vaddr, reg;
- long offset;
- int signal = 0;
-
- /*
- * analyse the sc instruction that just caused a ri exception
- * and put the referenced address to addr.
- */
-
- /* sign extend offset */
- offset = opcode & OFFSET;
- offset <<= 16;
- offset >>= 16;
-
- vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset);
- reg = (opcode & RT) >> 16;
-
- if ((unsigned long)vaddr & 3) {
- signal = SIGBUS;
- goto sig;
- }
- if (ll_bit == 0 || ll_task != current) {
- regs->regs[reg] = 0;
- compute_return_epc(regs);
- return;
- }
-
- if (put_user(regs->regs[reg], vaddr)) {
- signal = SIGSEGV;
- goto sig;
- }
-
- regs->regs[reg] = 1;
-
- compute_return_epc(regs);
- return;
-
-sig:
- force_sig(signal, current);
-}
-
-/*
- * ll uses the opcode of lwc0 and sc uses the opcode of swc0. That is both
- * opcodes are supposed to result in coprocessor unusable exceptions if
- * executed on ll/sc-less processors. That's the theory. In practice a
- * few processors such as NEC's VR4100 throw reserved instruction exceptions
- * instead, so we're doing the emulation thing in both exception handlers.
- */
-static inline int simulate_llsc(struct pt_regs *regs)
-{
- unsigned int opcode;
-
- if (unlikely(get_insn_opcode(regs, &opcode)))
- return -EFAULT;
-
- if ((opcode & OPCODE) == LL) {
- simulate_ll(regs, opcode);
- return 0;
- }
- if ((opcode & OPCODE) == SC) {
- simulate_sc(regs, opcode);
- return 0;
- }
-
- return -EFAULT; /* Strange things going on ... */
-}
-
-asmlinkage void do_ov(struct pt_regs *regs)
-{
- siginfo_t info;
-
- info.si_code = FPE_INTOVF;
- info.si_signo = SIGFPE;
- info.si_errno = 0;
- info.si_addr = (void *)regs->cp0_epc;
- force_sig_info(SIGFPE, &info, current);
-}
-
-/*
- * XXX Delayed fp exceptions when doing a lazy ctx switch XXX
- */
-asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
-{
- if (fcr31 & FPU_CSR_UNI_X) {
- int sig;
-
- /*
- * Unimplemented operation exception. If we've got the full
- * software emulator on-board, let's use it...
- *
- * Force FPU to dump state into task/thread context. We're
- * moving a lot of data here for what is probably a single
- * instruction, but the alternative is to pre-decode the FP
- * register operands before invoking the emulator, which seems
- * a bit extreme for what should be an infrequent event.
- */
- save_fp(current);
-
- /* Run the emulator */
- sig = fpu_emulator_cop1Handler (0, regs,
- ¤t->thread.fpu.soft);
-
- /*
- * We can't allow the emulated instruction to leave any of
- * the cause bit set in $fcr31.
- */
- current->thread.fpu.soft.sr &= ~FPU_CSR_ALL_X;
-
- /* Restore the hardware register state */
- restore_fp(current);
-
- /* If something went wrong, signal */
- if (sig)
- force_sig(sig, current);
-
- return;
- }
-
- force_sig(SIGFPE, current);
-}
-
-asmlinkage void do_bp(struct pt_regs *regs)
-{
- unsigned int opcode, bcode;
- siginfo_t info;
-
- die_if_kernel("Break instruction in kernel code", regs);
-
- if (get_insn_opcode(regs, &opcode))
- return;
-
- /*
- * There is the ancient bug in the MIPS assemblers that the break
- * code starts left to bit 16 instead to bit 6 in the opcode.
- * Gas is bug-compatible ...
- */
- bcode = ((opcode >> 16) & ((1 << 20) - 1));
-
- /*
- * (A short test says that IRIX 5.3 sends SIGTRAP for all break
- * insns, even for break codes that indicate arithmetic failures.
- * Weird ...)
- * But should we continue the brokenness??? --macro
- */
- switch (bcode) {
- case 6:
- case 7:
- if (bcode == 7)
- info.si_code = FPE_INTDIV;
- else
- info.si_code = FPE_INTOVF;
- info.si_signo = SIGFPE;
- info.si_errno = 0;
- info.si_addr = (void *)regs->cp0_epc;
- force_sig_info(SIGFPE, &info, current);
- break;
- default:
- force_sig(SIGTRAP, current);
- }
-}
-
-asmlinkage void do_tr(struct pt_regs *regs)
-{
- unsigned int opcode, tcode = 0;
- siginfo_t info;
-
- die_if_kernel("Trap instruction in kernel code", regs);
-
- if (get_insn_opcode(regs, &opcode))
- return;
-
- /* Immediate versions don't provide a code. */
- if (!(opcode & OPCODE))
- tcode = ((opcode >> 6) & ((1 << 20) - 1));
-
- /*
- * (A short test says that IRIX 5.3 sends SIGTRAP for all trap
- * insns, even for trap codes that indicate arithmetic failures.
- * Weird ...)
- * But should we continue the brokenness??? --macro
- */
- switch (tcode) {
- case 6:
- case 7:
- if (tcode == 7)
- info.si_code = FPE_INTDIV;
- else
- info.si_code = FPE_INTOVF;
- info.si_signo = SIGFPE;
- info.si_errno = 0;
- info.si_addr = (void *)regs->cp0_epc;
- force_sig_info(SIGFPE, &info, current);
- break;
- default:
- force_sig(SIGTRAP, current);
- }
-}
-
-asmlinkage void do_ri(struct pt_regs *regs)
-{
- die_if_kernel("Reserved instruction in kernel code", regs);
-
- if (!cpu_has_llsc)
- if (!simulate_llsc(regs))
- return;
-
- force_sig(SIGILL, current);
-}
-
-asmlinkage void do_cpu(struct pt_regs *regs)
-{
- unsigned int cpid;
-
- die_if_kernel("do_cpu invoked from kernel context!", regs);
-
- cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
-
- switch (cpid) {
- case 0:
- if (cpu_has_llsc)
- break;
-
- if (!simulate_llsc(regs))
- return;
- break;
-
- case 1:
- own_fpu();
- if (current->used_math) { /* Using the FPU again. */
- restore_fp(current);
- } else { /* First time FPU user. */
- init_fpu();
- current->used_math = 1;
- }
-
- if (!cpu_has_fpu) {
- int sig = fpu_emulator_cop1Handler(0, regs,
- ¤t->thread.fpu.soft);
- if (sig)
- force_sig(sig, current);
- }
-
- return;
-
- case 2:
- case 3:
- break;
- }
-
- force_sig(SIGILL, current);
-}
-
-asmlinkage void do_mdmx(struct pt_regs *regs)
-{
- force_sig(SIGILL, current);
-}
-
-asmlinkage void do_watch(struct pt_regs *regs)
-{
- /*
- * We use the watch exception where available to detect stack
- * overflows.
- */
- dump_tlb_all();
- show_regs(regs);
- panic("Caught WATCH exception - probably caused by stack overflow.");
-}
-
-asmlinkage void do_mcheck(struct pt_regs *regs)
-{
- show_regs(regs);
- dump_tlb_all();
- /*
- * Some chips may have other causes of machine check (e.g. SB1
- * graduation timer)
- */
- panic("Caught Machine Check exception - %scaused by multiple "
- "matching entries in the TLB.",
- (regs->cp0_status & ST0_TS) ? "" : "not ");
-}
-
-asmlinkage void do_reserved(struct pt_regs *regs)
-{
- /*
- * Game over - no way to handle this if it ever occurs. Most probably
- * caused by a new unknown cpu type or after another deadly
- * hard/software error.
- */
- show_regs(regs);
- panic("Caught reserved exception %ld - should not happen.",
- (regs->cp0_cause & 0x7f) >> 2);
-}
-
-/*
- * Some MIPS CPUs can enable/disable for cache parity detection, but do
- * it different ways.
- */
-static inline void parity_protection_init(void)
-{
- switch (current_cpu_data.cputype) {
- case CPU_5KC:
- /* Set the PE bit (bit 31) in the c0_ecc register. */
- printk(KERN_INFO "Enable the cache parity protection for "
- "MIPS 5KC CPUs.\n");
- write_c0_ecc(read_c0_ecc() | 0x80000000);
- break;
- default:
- break;
- }
-}
-
-asmlinkage void cache_parity_error(void)
-{
- const int field = 2 * sizeof(unsigned long);
- unsigned int reg_val;
-
- /* For the moment, report the problem and hang. */
- printk("Cache error exception:\n");
- printk("cp0_errorepc == %0*lx\n", field, read_c0_errorepc());
- reg_val = read_c0_cacheerr();
- printk("c0_cacheerr == %08x\n", reg_val);
-
- printk("Decoded c0_cacheerr: %s cache fault in %s reference.\n",
- reg_val & (1<<30) ? "secondary" : "primary",
- reg_val & (1<<31) ? "data" : "insn");
- printk("Error bits: %s%s%s%s%s%s%s\n",
- reg_val & (1<<29) ? "ED " : "",
- reg_val & (1<<28) ? "ET " : "",
- reg_val & (1<<26) ? "EE " : "",
- reg_val & (1<<25) ? "EB " : "",
- reg_val & (1<<24) ? "EI " : "",
- reg_val & (1<<23) ? "E1 " : "",
- reg_val & (1<<22) ? "E0 " : "");
- printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1));
-
-#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
- if (reg_val & (1<<22))
- printk("DErrAddr0: 0x%08x\n", read_c0_derraddr0());
-
- if (reg_val & (1<<23))
- printk("DErrAddr1: 0x%08x\n", read_c0_derraddr1());
-#endif
-
- panic("Can't handle the cache error!");
-}
-
-/*
- * SDBBP EJTAG debug exception handler.
- * We skip the instruction and return to the next instruction.
- */
-void ejtag_exception_handler(struct pt_regs *regs)
-{
- const int field = 2 * sizeof(unsigned long);
- unsigned long depc, old_epc;
- unsigned int debug;
-
- printk("SDBBP EJTAG debug exception - not handled yet, just ignored!\n");
- depc = read_c0_depc();
- debug = read_c0_debug();
- printk("c0_depc = %0*lx, DEBUG = %08x\n", field, depc, debug);
- if (debug & 0x80000000) {
- /*
- * In branch delay slot.
- * We cheat a little bit here and use EPC to calculate the
- * debug return address (DEPC). EPC is restored after the
- * calculation.
- */
- old_epc = regs->cp0_epc;
- regs->cp0_epc = depc;
- __compute_return_epc(regs);
- depc = regs->cp0_epc;
- regs->cp0_epc = old_epc;
- } else
- depc += 4;
- write_c0_depc(depc);
-
-#if 0
- printk("\n\n----- Enable EJTAG single stepping ----\n\n");
- write_c0_debug(debug | 0x100);
-#endif
-}
-
-/*
- * NMI exception handler.
- */
-void nmi_exception_handler(struct pt_regs *regs)
-{
- printk("NMI taken!!!!\n");
- die("NMI", regs);
- while(1) ;
-}
-
-unsigned long exception_handlers[32];
-
-/*
- * As a side effect of the way this is implemented we're limited
- * to interrupt handlers in the address range from
- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ...
- */
-void *set_except_vector(int n, void *addr)
-{
- unsigned long handler = (unsigned long) addr;
- unsigned long old_handler = exception_handlers[n];
-
- exception_handlers[n] = handler;
- if (n == 0 && cpu_has_divec) {
- *(volatile u32 *)(KSEG0+0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(KSEG0+0x200, KSEG0 + 0x204);
- }
- return (void *)old_handler;
-}
-
-asmlinkage int (*save_fp_context)(struct sigcontext *sc);
-asmlinkage int (*restore_fp_context)(struct sigcontext *sc);
-
-extern asmlinkage int _save_fp_context(struct sigcontext *sc);
-extern asmlinkage int _restore_fp_context(struct sigcontext *sc);
-
-extern asmlinkage int fpu_emulator_save_context(struct sigcontext *sc);
-extern asmlinkage int fpu_emulator_restore_context(struct sigcontext *sc);
-
-void __init per_cpu_trap_init(void)
-{
- unsigned int cpu = smp_processor_id();
-
- /* Some firmware leaves the BEV flag set, clear it. */
- clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
- set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
-
- /*
- * Some MIPS CPUs have a dedicated interrupt vector which reduces the
- * interrupt processing overhead. Use it where available.
- */
- if (cpu_has_divec)
- set_c0_cause(CAUSEF_IV);
-
- cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
- write_c0_context(((long)(&pgd_current[cpu])) << 23);
- write_c0_wired(0);
-}
-
-void __init trap_init(void)
-{
- extern char except_vec0_generic;
- extern char except_vec3_generic, except_vec3_r4000;
- extern char except_vec_ejtag_debug;
- extern char except_vec4;
- unsigned long i;
-
- per_cpu_trap_init();
-
- /* Copy the generic exception handlers to their final destination. */
- memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
-
- /*
- * Setup default vectors
- */
- for (i = 0; i <= 31; i++)
- set_except_vector(i, handle_reserved);
-
- /*
- * Copy the EJTAG debug exception vector handler code to it's final
- * destination.
- */
- if (cpu_has_ejtag)
- memcpy((void *)(KSEG0 + 0x300), &except_vec_ejtag_debug, 0x80);
-
- /*
- * Only some CPUs have the watch exceptions or a dedicated
- * interrupt vector.
- */
- if (cpu_has_watch)
- set_except_vector(23, handle_watch);
-
- /*
- * Some MIPS CPUs have a dedicated interrupt vector which reduces the
- * interrupt processing overhead. Use it where available.
- */
- if (cpu_has_divec)
- memcpy((void *)(KSEG0 + 0x200), &except_vec4, 0x8);
-
- /*
- * Some CPUs can enable/disable for cache parity detection, but does
- * it different ways.
- */
- parity_protection_init();
-
- /*
- * The Data Bus Errors / Instruction Bus Errors are signaled
- * by external hardware. Therefore these two exceptions
- * may have board specific handlers.
- */
- if (board_be_init)
- board_be_init();
-
- set_except_vector(1, __xtlb_mod);
- set_except_vector(2, __xtlb_tlbl);
- set_except_vector(3, __xtlb_tlbs);
- set_except_vector(4, handle_adel);
- set_except_vector(5, handle_ades);
-
- set_except_vector(6, handle_ibe);
- set_except_vector(7, handle_dbe);
-
- set_except_vector(8, handle_sys);
- set_except_vector(9, handle_bp);
- set_except_vector(10, handle_ri);
- set_except_vector(11, handle_cpu);
- set_except_vector(12, handle_ov);
- set_except_vector(13, handle_tr);
- set_except_vector(22, handle_mdmx);
-
- if (cpu_has_fpu && !cpu_has_nofpuex)
- set_except_vector(15, handle_fpe);
-
- if (cpu_has_mcheck)
- set_except_vector(24, handle_mcheck);
-
- if (cpu_has_vce)
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_r4000, 0x100);
- else if (cpu_has_4kex)
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
- else
- memcpy((void *)(KSEG0 + 0x080), &except_vec3_generic, 0x80);
-
- if (current_cpu_data.cputype == CPU_R6000 ||
- current_cpu_data.cputype == CPU_R6000A) {
- /*
- * The R6000 is the only R-series CPU that features a machine
- * check exception (similar to the R4000 cache error) and
- * unaligned ldc1/sdc1 exception. The handlers have not been
- * written yet. Well, anyway there is no R6000 machine on the
- * current list of targets for Linux/MIPS.
- * (Duh, crap, there is someone with a tripple R6k machine)
- */
- //set_except_vector(14, handle_mc);
- //set_except_vector(15, handle_ndc);
- }
-
- if (cpu_has_fpu) {
- save_fp_context = _save_fp_context;
- restore_fp_context = _restore_fp_context;
- } else {
- save_fp_context = fpu_emulator_save_context;
- restore_fp_context = fpu_emulator_restore_context;
- }
-
- flush_icache_range(KSEG0, KSEG0 + 0x400);
-
- if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
- set_c0_status(ST0_XX);
-
- atomic_inc(&init_mm.mm_count); /* XXX UP? */
- current->active_mm = &init_mm;
-}
diff -Nru a/arch/mips64/kernel/unaligned.c b/arch/mips64/kernel/unaligned.c
--- a/arch/mips64/kernel/unaligned.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,557 +0,0 @@
-/*
- * Handle unaligned accesses by emulation.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1998, 1999, 2002 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- *
- * This file contains exception handler for address error exception with the
- * special capability to execute faulting instructions in software. The
- * handler does not try to handle the case when the program counter points
- * to an address not aligned to a word boundary.
- *
- * Putting data to unaligned addresses is a bad practice even on Intel where
- * only the performance is affected. Much worse is that such code is non-
- * portable. Due to several programs that die on MIPS due to alignment
- * problems I decided to implement this handler anyway though I originally
- * didn't intend to do this at all for user code.
- *
- * For now I enable fixing of address errors by default to make life easier.
- * I however intend to disable this somewhen in the future when the alignment
- * problems with user programs have been fixed. For programmers this is the
- * right way to go.
- *
- * Fixing address errors is a per process option. The option is inherited
- * across fork(2) and execve(2) calls. If you really want to use the
- * option in your user programs - I discourage the use of the software
- * emulation strongly - use the following code in your userland stuff:
- *
- * #include <sys/sysmips.h>
- *
- * ...
- * sysmips(MIPS_FIXADE, x);
- * ...
- *
- * The argument x is 0 for disabling software emulation, enabled otherwise.
- *
- * Below a little program to play around with this feature.
- *
- * #include <stdio.h>
- * #include <asm/sysmips.h>
- *
- * struct foo {
- * unsigned char bar[8];
- * };
- *
- * main(int argc, char *argv[])
- * {
- * struct foo x = {0, 1, 2, 3, 4, 5, 6, 7};
- * unsigned int *p = (unsigned int *) (x.bar + 3);
- * int i;
- *
- * if (argc > 1)
- * sysmips(MIPS_FIXADE, atoi(argv[1]));
- *
- * printf("*p = %08lx\n", *p);
- *
- * *p = 0xdeadface;
- *
- * for(i = 0; i <= 7; i++)
- * printf("%02x ", x.bar[i]);
- * printf("\n");
- * }
- *
- * Coprocessor loads are not supported; I think this case is unimportant
- * in the practice.
- *
- * TODO: Handle ndc (attempted store to doubleword in uncached memory)
- * exception for the R6000.
- * A store crossing a page boundary might be executed only partially.
- * Undo the partial store in this case.
- */
-#include <linux/config.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-
-#include <asm/asm.h>
-#include <asm/branch.h>
-#include <asm/byteorder.h>
-#include <asm/inst.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#define STR(x) __STR(x)
-#define __STR(x) #x
-
-#ifdef CONFIG_PROC_FS
-unsigned long unaligned_instructions;
-#endif
-
-static inline int emulate_load_store_insn(struct pt_regs *regs,
- void *addr, unsigned long pc,
- unsigned long **regptr, unsigned long *newvalue)
-{
- union mips_instruction insn;
- unsigned long value;
- const struct exception_table_entry *fixup;
- unsigned int res;
-
- regs->regs[0] = 0;
- *regptr=NULL;
-
- /*
- * This load never faults.
- */
- __get_user(insn.word, (unsigned int *)pc);
-
- switch (insn.i_format.opcode) {
- /*
- * These are instructions that a compiler doesn't generate. We
- * can assume therefore that the code is MIPS-aware and
- * really buggy. Emulating these instructions would break the
- * semantics anyway.
- */
- case ll_op:
- case lld_op:
- case sc_op:
- case scd_op:
-
- /*
- * For these instructions the only way to create an address
- * error is an attempted access to kernel/supervisor address
- * space.
- */
- case ldl_op:
- case ldr_op:
- case lwl_op:
- case lwr_op:
- case sdl_op:
- case sdr_op:
- case swl_op:
- case swr_op:
- case lb_op:
- case lbu_op:
- case sb_op:
- goto sigbus;
-
- /*
- * The remaining opcodes are the ones that are really of interest.
- */
- case lh_op:
- if (verify_area(VERIFY_READ, addr, 2))
- goto sigbus;
-
- __asm__ __volatile__ (".set\tnoat\n"
-#ifdef __BIG_ENDIAN
- "1:\tlb\t%0, 0(%2)\n"
- "2:\tlbu\t$1, 1(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tlb\t%0, 1(%2)\n"
- "2:\tlbu\t$1, 0(%2)\n\t"
-#endif
- "sll\t%0, 0x8\n\t"
- "or\t%0, $1\n\t"
- "li\t%1, 0\n"
- "3:\t.set\tat\n\t"
- ".section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%1, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=&r" (value), "=r" (res)
- : "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- *newvalue = value;
- *regptr = ®s->regs[insn.i_format.rt];
- break;
-
- case lw_op:
- if (verify_area(VERIFY_READ, addr, 4))
- goto sigbus;
-
- __asm__ __volatile__ (
-#ifdef __BIG_ENDIAN
- "1:\tlwl\t%0, (%2)\n"
- "2:\tlwr\t%0, 3(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tlwl\t%0, 3(%2)\n"
- "2:\tlwr\t%0, (%2)\n\t"
-#endif
- "li\t%1, 0\n"
- "3:\t.section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%1, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=&r" (value), "=r" (res)
- : "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- *newvalue = value;
- *regptr = ®s->regs[insn.i_format.rt];
- break;
-
- case lhu_op:
- if (verify_area(VERIFY_READ, addr, 2))
- goto sigbus;
-
- __asm__ __volatile__ (
- ".set\tnoat\n"
-#ifdef __BIG_ENDIAN
- "1:\tlbu\t%0, 0(%2)\n"
- "2:\tlbu\t$1, 1(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tlbu\t%0, 1(%2)\n"
- "2:\tlbu\t$1, 0(%2)\n\t"
-#endif
- "sll\t%0, 0x8\n\t"
- "or\t%0, $1\n\t"
- "li\t%1, 0\n"
- "3:\t.set\tat\n\t"
- ".section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%1, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=&r" (value), "=r" (res)
- : "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- *newvalue = value;
- *regptr = ®s->regs[insn.i_format.rt];
- break;
-
- case lwu_op:
-#ifdef CONFIG_MIPS64
- /*
- * A 32-bit kernel might be running on a 64-bit processor. But
- * if we're on a 32-bit processor and an i-cache incoherency
- * or race makes us see a 64-bit instruction here the sdl/sdr
- * would blow up, so for now we don't handle unaligned 64-bit
- * instructions on 32-bit kernels.
- */
- if (verify_area(VERIFY_READ, addr, 4))
- goto sigbus;
-
- __asm__ __volatile__ (
-#ifdef __BIG_ENDIAN
- "1:\tlwl\t%0, (%2)\n"
- "2:\tlwr\t%0, 3(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tlwl\t%0, 3(%2)\n"
- "2:\tlwr\t%0, (%2)\n\t"
-#endif
- "dsll\t%0, %0, 32\n\t"
- "dsrl\t%0, %0, 32\n\t"
- "li\t%1, 0\n"
- "3:\t.section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%1, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=&r" (value), "=r" (res)
- : "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- *newvalue = value;
- *regptr = ®s->regs[insn.i_format.rt];
- break;
-#endif /* CONFIG_MIPS64 */
-
- /* Cannot handle 64-bit instructions in 32-bit kernel */
- goto sigill;
-
- case ld_op:
-#ifdef CONFIG_MIPS64
- /*
- * A 32-bit kernel might be running on a 64-bit processor. But
- * if we're on a 32-bit processor and an i-cache incoherency
- * or race makes us see a 64-bit instruction here the sdl/sdr
- * would blow up, so for now we don't handle unaligned 64-bit
- * instructions on 32-bit kernels.
- */
- if (verify_area(VERIFY_READ, addr, 8))
- goto sigbus;
-
- __asm__ __volatile__ (
-#ifdef __BIG_ENDIAN
- "1:\tldl\t%0, (%2)\n"
- "2:\tldr\t%0, 7(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tldl\t%0, 7(%2)\n"
- "2:\tldr\t%0, (%2)\n\t"
-#endif
- "li\t%1, 0\n"
- "3:\t.section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%1, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=&r" (value), "=r" (res)
- : "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- *newvalue = value;
- *regptr = ®s->regs[insn.i_format.rt];
- break;
-#endif /* CONFIG_MIPS64 */
-
- /* Cannot handle 64-bit instructions in 32-bit kernel */
- goto sigill;
-
- case sh_op:
- if (verify_area(VERIFY_WRITE, addr, 2))
- goto sigbus;
-
- value = regs->regs[insn.i_format.rt];
- __asm__ __volatile__ (
-#ifdef __BIG_ENDIAN
- ".set\tnoat\n"
- "1:\tsb\t%1, 1(%2)\n\t"
- "srl\t$1, %1, 0x8\n"
- "2:\tsb\t$1, 0(%2)\n\t"
- ".set\tat\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- ".set\tnoat\n"
- "1:\tsb\t%1, 0(%2)\n\t"
- "srl\t$1,%1, 0x8\n"
- "2:\tsb\t$1, 1(%2)\n\t"
- ".set\tat\n\t"
-#endif
- "li\t%0, 0\n"
- "3:\n\t"
- ".section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%0, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=r" (res)
- : "r" (value), "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- break;
-
- case sw_op:
- if (verify_area(VERIFY_WRITE, addr, 4))
- goto sigbus;
-
- value = regs->regs[insn.i_format.rt];
- __asm__ __volatile__ (
-#ifdef __BIG_ENDIAN
- "1:\tswl\t%1,(%2)\n"
- "2:\tswr\t%1, 3(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tswl\t%1, 3(%2)\n"
- "2:\tswr\t%1, (%2)\n\t"
-#endif
- "li\t%0, 0\n"
- "3:\n\t"
- ".section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%0, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=r" (res)
- : "r" (value), "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- break;
-
- case sd_op:
-#ifdef CONFIG_MIPS64
- /*
- * A 32-bit kernel might be running on a 64-bit processor. But
- * if we're on a 32-bit processor and an i-cache incoherency
- * or race makes us see a 64-bit instruction here the sdl/sdr
- * would blow up, so for now we don't handle unaligned 64-bit
- * instructions on 32-bit kernels.
- */
- if (verify_area(VERIFY_WRITE, addr, 8))
- goto sigbus;
-
- value = regs->regs[insn.i_format.rt];
- __asm__ __volatile__ (
-#ifdef __BIG_ENDIAN
- "1:\tsdl\t%1,(%2)\n"
- "2:\tsdr\t%1, 7(%2)\n\t"
-#endif
-#ifdef __LITTLE_ENDIAN
- "1:\tsdl\t%1, 7(%2)\n"
- "2:\tsdr\t%1, (%2)\n\t"
-#endif
- "li\t%0, 0\n"
- "3:\n\t"
- ".section\t.fixup,\"ax\"\n\t"
- "4:\tli\t%0, %3\n\t"
- "j\t3b\n\t"
- ".previous\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b, 4b\n\t"
- STR(PTR)"\t2b, 4b\n\t"
- ".previous"
- : "=r" (res)
- : "r" (value), "r" (addr), "i" (-EFAULT));
- if (res)
- goto fault;
- break;
-#endif /* CONFIG_MIPS64 */
-
- /* Cannot handle 64-bit instructions in 32-bit kernel */
- goto sigill;
-
- case lwc1_op:
- case ldc1_op:
- case swc1_op:
- case sdc1_op:
- /*
- * I herewith declare: this does not happen. So send SIGBUS.
- */
- goto sigbus;
-
- case lwc2_op:
- case ldc2_op:
- case swc2_op:
- case sdc2_op:
- /*
- * These are the coprocessor 2 load/stores. The current
- * implementations don't use cp2 and cp2 should always be
- * disabled in c0_status. So send SIGILL.
- * (No longer true: The Sony Praystation uses cp2 for
- * 3D matrix operations. Dunno if that thingy has a MMU ...)
- */
- default:
- /*
- * Pheeee... We encountered an yet unknown instruction or
- * cache coherence problem. Die sucker, die ...
- */
- goto sigill;
- }
-
-#ifdef CONFIG_PROC_FS
- unaligned_instructions++;
-#endif
-
- return 0;
-
-fault:
- /* Did we have an exception handler installed? */
- fixup = search_exception_tables(exception_epc(regs));
- if (fixup) {
- unsigned long new_epc = fixup->nextinsn;
- printk(KERN_DEBUG "%s: Forwarding exception at [<%lx>] (%lx)\n",
- current->comm, regs->cp0_epc, new_epc);
- regs->cp0_epc = new_epc;
- return 1;
- }
-
- die_if_kernel ("Unhandled kernel unaligned access", regs);
- send_sig(SIGSEGV, current, 1);
-
- return 0;
-
-sigbus:
- die_if_kernel("Unhandled kernel unaligned access", regs);
- send_sig(SIGBUS, current, 1);
-
- return 0;
-
-sigill:
- die_if_kernel("Unhandled kernel unaligned access or invalid instruction", regs);
- send_sig(SIGILL, current, 1);
-
- return 0;
-}
-
-asmlinkage void do_ade(struct pt_regs *regs)
-{
- unsigned long *regptr, newval;
- extern int do_dsemulret(struct pt_regs *);
- mm_segment_t seg;
- unsigned long pc;
-
- /*
- * Address errors may be deliberately induced by the FPU emulator to
- * retake control of the CPU after executing the instruction in the
- * delay slot of an emulated branch.
- */
- /* Terminate if exception was recognized as a delay slot return */
- if (do_dsemulret(regs))
- return;
-
- /* Otherwise handle as normal */
-
- /*
- * Did we catch a fault trying to load an instruction?
- * Or are we running in MIPS16 mode?
- */
- if ((regs->cp0_badvaddr == regs->cp0_epc) || (regs->cp0_epc & 0x1))
- goto sigbus;
-
- pc = exception_epc(regs);
- if ((current->thread.mflags & MF_FIXADE) == 0)
- goto sigbus;
-
- /*
- * Do branch emulation only if we didn't forward the exception.
- * This is all so but ugly ...
- */
- seg = get_fs();
- if (!user_mode(regs))
- set_fs(KERNEL_DS);
- if (!emulate_load_store_insn(regs, (void *)regs->cp0_badvaddr, pc,
- ®ptr, &newval)) {
- compute_return_epc(regs);
- /*
- * Now that branch is evaluated, update the dest
- * register if necessary
- */
- if (regptr)
- *regptr = newval;
- }
- set_fs(seg);
-
- return;
-
-sigbus:
- die_if_kernel("Kernel unaligned instruction access", regs);
- force_sig(SIGBUS, current);
-
- /*
- * XXX On return from the signal handler we should advance the epc
- */
-}
diff -Nru a/arch/mips64/lib/Makefile b/arch/mips64/lib/Makefile
--- a/arch/mips64/lib/Makefile Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,18 +0,0 @@
-#
-# Makefile for MIPS-specific library files..
-#
-
-lib-y += csum_partial.o csum_partial_copy.o memcpy.o \
- memset.o promlib.o rtc-std.o rtc-no.o strlen_user.o \
- strncpy_user.o strnlen_user.o watch.o
-
-ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y)
- lib-y += r3k_dump_tlb.o
-else
- lib-y += dump_tlb.o
-endif
-
-lib-$(CONFIG_BLK_DEV_FD) += floppy-no.o floppy-std.o
-lib-$(subst m,y,$(CONFIG_IDE)) += ide-std.o ide-no.o # needed for ide module
-
-EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips64/lib/csum_partial.S b/arch/mips64/lib/csum_partial.S
--- a/arch/mips64/lib/csum_partial.S Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,242 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Quick'n'dirty IP checksum ...
- *
- * Copyright (C) 1998, 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-
-#define ADDC(sum,reg) \
- addu sum, reg; \
- sltu v1, sum, reg; \
- addu sum, v1
-
-#define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3) \
- lw t0, (offset + 0x00)(src); \
- lw t1, (offset + 0x04)(src); \
- lw t2, (offset + 0x08)(src); \
- lw t3, (offset + 0x0c)(src); \
- ADDC(sum, t0); \
- ADDC(sum, t1); \
- ADDC(sum, t2); \
- ADDC(sum, t3); \
- lw t0, (offset + 0x10)(src); \
- lw t1, (offset + 0x14)(src); \
- lw t2, (offset + 0x18)(src); \
- lw t3, (offset + 0x1c)(src); \
- ADDC(sum, t0); \
- ADDC(sum, t1); \
- ADDC(sum, t2); \
- ADDC(sum, t3); \
-
-/*
- * a0: source address
- * a1: length of the area to checksum
- * a2: partial checksum
- */
-
-#define src a0
-#define sum v0
-
- .text
- .set noreorder
-
-/* unknown src alignment and < 8 bytes to go */
-small_csumcpy:
- move a1, ta2
-
- andi ta0, a1, 4
- beqz ta0, 1f
- andi ta0, a1, 2
-
- /* Still a full word to go */
- ulw ta1, (src)
- daddiu src, 4
- ADDC(sum, ta1)
-
-1: move ta1, zero
- beqz ta0, 1f
- andi ta0, a1, 1
-
- /* Still a halfword to go */
- ulhu ta1, (src)
- daddiu src, 2
-
-1: beqz ta0, 1f
- sll ta1, ta1, 16
-
- lbu ta2, (src)
- nop
-
-#ifdef __MIPSEB__
- sll ta2, ta2, 8
-#endif
- or ta1, ta2
-
-1: ADDC(sum, ta1)
-
- /* fold checksum */
- sll v1, sum, 16
- addu sum, v1
- sltu v1, sum, v1
- srl sum, sum, 16
- addu sum, v1
-
- /* odd buffer alignment? */
- beqz t3, 1f
- nop
- sll v1, sum, 8
- srl sum, sum, 8
- or sum, v1
- andi sum, 0xffff
-1:
- .set reorder
- /* Add the passed partial csum. */
- ADDC(sum, a2)
- jr ra
- .set noreorder
-
-/* ------------------------------------------------------------------------- */
-
- .align 5
-LEAF(csum_partial)
- move sum, zero
- move t3, zero
-
- sltiu t8, a1, 0x8
- bnez t8, small_csumcpy /* < 8 bytes to copy */
- move ta2, a1
-
- beqz a1, out
- andi t3, src, 0x1 /* odd buffer? */
-
-hword_align:
- beqz t3, word_align
- andi t8, src, 0x2
-
- lbu ta0, (src)
- dsubu a1, a1, 0x1
-#ifdef __MIPSEL__
- sll ta0, ta0, 8
-#endif
- ADDC(sum, ta0)
- daddu src, src, 0x1
- andi t8, src, 0x2
-
-word_align:
- beqz t8, dword_align
- sltiu t8, a1, 56
-
- lhu ta0, (src)
- dsubu a1, a1, 0x2
- ADDC(sum, ta0)
- sltiu t8, a1, 56
- daddu src, src, 0x2
-
-dword_align:
- bnez t8, do_end_words
- move t8, a1
-
- andi t8, src, 0x4
- beqz t8, qword_align
- andi t8, src, 0x8
-
- lw ta0, 0x00(src)
- dsubu a1, a1, 0x4
- ADDC(sum, ta0)
- daddu src, src, 0x4
- andi t8, src, 0x8
-
-qword_align:
- beqz t8, oword_align
- andi t8, src, 0x10
-
- lw ta0, 0x00(src)
- lw ta1, 0x04(src)
- dsubu a1, a1, 0x8
- ADDC(sum, ta0)
- ADDC(sum, ta1)
- daddu src, src, 0x8
- andi t8, src, 0x10
-
-oword_align:
- beqz t8, begin_movement
- dsrl t8, a1, 0x7
-
- lw ta3, 0x08(src)
- lw t0, 0x0c(src)
- lw ta0, 0x00(src)
- lw ta1, 0x04(src)
- ADDC(sum, ta3)
- ADDC(sum, t0)
- ADDC(sum, ta0)
- ADDC(sum, ta1)
- dsubu a1, a1, 0x10
- daddu src, src, 0x10
- dsrl t8, a1, 0x7
-
-begin_movement:
- beqz t8, 1f
- andi ta2, a1, 0x40
-
-move_128bytes:
- CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
- CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
- CSUM_BIGCHUNK(src, 0x40, sum, ta0, ta1, ta3, t0)
- CSUM_BIGCHUNK(src, 0x60, sum, ta0, ta1, ta3, t0)
- dsubu t8, t8, 0x01
- bnez t8, move_128bytes
- daddu src, src, 0x80
-
-1:
- beqz ta2, 1f
- andi ta2, a1, 0x20
-
-move_64bytes:
- CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
- CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
- daddu src, src, 0x40
-
-1:
- beqz ta2, do_end_words
- andi t8, a1, 0x1c
-
-move_32bytes:
- CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
- andi t8, a1, 0x1c
- daddu src, src, 0x20
-
-do_end_words:
- beqz t8, maybe_end_cruft
- dsrl t8, t8, 0x2
-
-end_words:
- lw ta0, (src)
- dsubu t8, t8, 0x1
- ADDC(sum, ta0)
- bnez t8, end_words
- daddu src, src, 0x4
-
-maybe_end_cruft:
- andi ta2, a1, 0x3
-
-small_memcpy:
- j small_csumcpy; move a1, ta2 /* XXX ??? */
- beqz t2, out
- move a1, ta2
-
-end_bytes:
- lb ta0, (src)
- dsubu a1, a1, 0x1
- bnez a2, end_bytes
- daddu src, src, 0x1
-
-out:
- jr ra
- move v0, sum
- END(csum_partial)
diff -Nru a/arch/mips64/lib/csum_partial_copy.c b/arch/mips64/lib/csum_partial_copy.c
--- a/arch/mips64/lib/csum_partial_copy.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,49 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * MIPS64 specific IP/TCP/UDP checksumming routines
- *
- * Copyright (C) 1998, 1999 Ralf Baechle
- */
-#include <net/checksum.h>
-#include <linux/types.h>
-#include <asm/byteorder.h>
-#include <asm/string.h>
-#include <asm/uaccess.h>
-
-/*
- * copy while checksumming, otherwise like csum_partial
- */
-unsigned int csum_partial_copy_nocheck(const char *src, char *dst,
- int len, unsigned int sum)
-{
- /*
- * It's 2:30 am and I don't feel like doing it real ...
- * This is lots slower than the real thing (tm)
- */
- sum = csum_partial(src, len, sum);
- memcpy(dst, src, len);
-
- return sum;
-}
-
-/*
- * Copy from userspace and compute checksum. If we catch an exception
- * then zero the rest of the buffer.
- */
-unsigned int csum_partial_copy_from_user (const char *src, char *dst,
- int len, unsigned int sum,
- int *err_ptr)
-{
- int missing;
-
- missing = copy_from_user(dst, src, len);
- if (missing) {
- memset(dst + len - missing, 0, missing);
- *err_ptr = -EFAULT;
- }
-
- return csum_partial(dst, len, sum);
-}
diff -Nru a/arch/mips64/lib/dump_tlb.c b/arch/mips64/lib/dump_tlb.c
--- a/arch/mips64/lib/dump_tlb.c Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,212 +0,0 @@
-/*
- * Dump R4x00 TLB for debugging purposes.
- *
- * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
- * Copyright (C) 1999 by Silicon Graphics, Inc.
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-
-static inline const char *msk2str(unsigned int mask)
-{
- switch (mask) {
- case PM_4K: return "4kb";
- case PM_16K: return "16kb";
- case PM_64K: return "64kb";
- case PM_256K: return "256kb";
- case PM_1M: return "1Mb";
- case PM_4M: return "4Mb";
- case PM_16M: return "16Mb";
- case PM_64M: return "64Mb";
- case PM_256M: return "256Mb";
- }
-}
-
-void dump_tlb(int first, int last)
-{
- unsigned long s_entryhi, entryhi, entrylo0, entrylo1, asid;
- unsigned int s_index, pagemask, c0, c1, i;
-
- s_entryhi = read_c0_entryhi();
- s_index = read_c0_index();
- asid = s_entryhi & 0xff;
-
- for (i = first; i <= last; i++) {
- write_c0_index(i);
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- "nop;nop;nop;nop\n\t"
- "tlbr\n\t"
- "nop;nop;nop;nop\n\t"
- ".set\treorder");
- pagemask = read_c0_pagemask();
- entryhi = read_c0_entryhi();
- entrylo0 = read_c0_entrylo0();
- entrylo1 = read_c0_entrylo1();
-
- /* Unused entries have a virtual address of CKSEG0. */
- if ((entryhi & ~0x1ffffUL) != CKSEG0
- && (entryhi & 0xff) == asid) {
- /*
- * Only print entries in use
- */
- printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
-
- c0 = (entrylo0 >> 3) & 7;
- c1 = (entrylo1 >> 3) & 7;
-
- printk("va=%011lx asid=%02lx\n",
- (entryhi & ~0x1fffUL),
- entryhi & 0xff);
- printk("\t[pa=%011lx c=%d d=%d v=%d g=%ld] ",
- (entrylo0 << 6) & PAGE_MASK, c0,
- (entrylo0 & 4) ? 1 : 0,
- (entrylo0 & 2) ? 1 : 0,
- (entrylo0 & 1));
- printk("[pa=%011lx c=%d d=%d v=%d g=%ld]\n",
- (entrylo1 << 6) & PAGE_MASK, c1,
- (entrylo1 & 4) ? 1 : 0,
- (entrylo1 & 2) ? 1 : 0,
- (entrylo1 & 1));
- }
- }
- printk("\n");
-
- write_c0_entryhi(s_entryhi);
- write_c0_index(s_index);
-}
-
-void dump_tlb_all(void)
-{
- dump_tlb(0, current_cpu_data.tlbsize - 1);
-}
-
-void dump_tlb_wired(void)
-{
- int wired;
-
- wired = read_c0_wired();
- printk("Wired: %d", wired);
- dump_tlb(0, read_c0_wired());
-}
-
-#define BARRIER \
- __asm__ __volatile__( \
- ".set\tnoreorder\n\t" \
- "nop;nop;nop;nop;nop;nop;nop\n\t" \
- ".set\treorder");
-
-void dump_tlb_addr(unsigned long addr)
-{
- unsigned int flags, oldpid;
- int index;
-
- local_irq_save(flags);
- oldpid = read_c0_entryhi() & 0xff;
- BARRIER;
- write_c0_entryhi((addr & PAGE_MASK) | oldpid);
- BARRIER;
- tlb_probe();
- BARRIER;
- index = read_c0_index();
- write_c0_entryhi(oldpid);
- local_irq_restore(flags);
-
- if (index < 0) {
- printk("No entry for address 0x%08lx in TLB\n", addr);
- return;
- }
-
- printk("Entry %d maps address 0x%08lx\n", index, addr);
- dump_tlb(index, index);
-}
-
-void dump_tlb_nonwired(void)
-{
- dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
-}
-
-void dump_list_process(struct task_struct *t, void *address)
-{
- pgd_t *page_dir, *pgd;
- pmd_t *pmd;
- pte_t *pte, page;
- unsigned long addr;
- unsigned long val;
-
- addr = (unsigned long) address;
-
- printk("Addr == %08lx\n", addr);
- printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
-
- page_dir = pgd_offset(t->mm, 0);
- printk("page_dir == %08lx\n", (unsigned long) page_dir);
-
- pgd = pgd_offset(t->mm, addr);
- printk("pgd == %08lx, ", (unsigned long) pgd);
-
- pmd = pmd_offset(pgd, addr);
- printk("pmd == %08lx, ", (unsigned long) pmd);
-
- pte = pte_offset(pmd, addr);
- printk("pte == %08lx, ", (unsigned long) pte);
-
- page = *pte;
- printk("page == %08lx\n", pte_val(page));
-
- val = pte_val(page);
- if (val & _PAGE_PRESENT) printk("present ");
- if (val & _PAGE_READ) printk("read ");
- if (val & _PAGE_WRITE) printk("write ");
- if (val & _PAGE_ACCESSED) printk("accessed ");
- if (val & _PAGE_MODIFIED) printk("modified ");
- if (val & _PAGE_R4KBUG) printk("r4kbug ");
- if (val & _PAGE_GLOBAL) printk("global ");
- if (val & _PAGE_VALID) printk("valid ");
- printk("\n");
-}
-
-void dump_list_current(void *address)
-{
- dump_list_process(current, address);
-}
-
-unsigned int vtop(void *address)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- unsigned int addr, paddr;
-
- addr = (unsigned long) address;
- pgd = pgd_offset(current->mm, addr);
- pmd = pmd_offset(pgd, addr);
- pte = pte_offset(pmd, addr);
- paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
- paddr |= (addr & ~PAGE_MASK);
-
- return paddr;
-}
-
-void dump16(unsigned long *p)
-{
- int i;
-
- for(i = 0; i < 8; i++) {
- printk("*%08lx == %08lx, ",
- (unsigned long)p, (unsigned long)*p);
- p++;
- printk("*%08lx == %08lx\n",
- (unsigned long)p, (unsigned long)*p);
- p++;
- }
-}
diff -Nru a/arch/mips64/lib/floppy-no.c b/arch/mips64/lib/floppy-no.c
--- a/arch/mips64/lib/floppy-no.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,57 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Dummy file for machines without standard floppy drives.
- *
- * Copyright (C) 1998 by Ralf Baechle
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <asm/floppy.h>
-
-/*
- * How to access the FDC's registers.
- */
-static void no_fd_dummy(void)
-{
- panic("no_fd_dummy called - shouldn't happen");
-}
-
-static unsigned long no_fd_getfdaddr1(void)
-{
- return (unsigned long)-1; /* No FDC nowhere ... */
-}
-
-static unsigned long no_fd_drive_type(unsigned long n)
-{
- return 0;
-}
-
-struct fd_ops no_fd_ops = {
- /*
- * How to access the floppy controller's ports
- */
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- /*
- * How to access the floppy DMA functions.
- */
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- no_fd_getfdaddr1,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- no_fd_drive_type
-};
diff -Nru a/arch/mips64/lib/floppy-std.c b/arch/mips64/lib/floppy-std.c
--- a/arch/mips64/lib/floppy-std.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,150 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Access the floppy hardware on PC style hardware
- *
- * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
- */
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/linkage.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/dma.h>
-#include <asm/floppy.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pgtable.h>
-
-/*
- * How to access the FDC's registers.
- */
-static unsigned char std_fd_inb(unsigned int port)
-{
- return inb_p(port);
-}
-
-static void std_fd_outb(unsigned char value, unsigned int port)
-{
- outb_p(value, port);
-}
-
-/*
- * How to access the floppy DMA functions.
- */
-static void std_fd_enable_dma(int channel)
-{
- enable_dma(channel);
-}
-
-static void std_fd_disable_dma(int channel)
-{
- disable_dma(channel);
-}
-
-static int std_fd_request_dma(int channel)
-{
- return request_dma(channel, "floppy");
-}
-
-static void std_fd_free_dma(int channel)
-{
- free_dma(channel);
-}
-
-static void std_fd_clear_dma_ff(int channel)
-{
- clear_dma_ff(channel);
-}
-
-static void std_fd_set_dma_mode(int channel, char mode)
-{
- set_dma_mode(channel, mode);
-}
-
-static void std_fd_set_dma_addr(int channel, unsigned int addr)
-{
- set_dma_addr(channel, addr);
-}
-
-static void std_fd_set_dma_count(int channel, unsigned int count)
-{
- set_dma_count(channel, count);
-}
-
-static int std_fd_get_dma_residue(int channel)
-{
- return get_dma_residue(channel);
-}
-
-static void std_fd_enable_irq(int irq)
-{
- enable_irq(irq);
-}
-
-static void std_fd_disable_irq(int irq)
-{
- disable_irq(irq);
-}
-
-static unsigned long std_fd_getfdaddr1(void)
-{
- return 0x3f0;
-}
-
-static unsigned long std_fd_dma_mem_alloc(unsigned long size)
-{
- int order = get_order(size);
- unsigned long mem;
-
- mem = __get_dma_pages(GFP_KERNEL,order);
-
- return mem;
-}
-
-static void std_fd_dma_mem_free(unsigned long addr, unsigned long size)
-{
- free_pages(addr, get_order(size));
-}
-
-static unsigned long std_fd_drive_type(unsigned long n)
-{
- if (n == 0)
- return 4; /* 3,5", 1.44mb */
-
- return 0;
-}
-
-struct fd_ops std_fd_ops = {
- /*
- * How to access the floppy controller's ports
- */
- std_fd_inb,
- std_fd_outb,
- /*
- * How to access the floppy DMA functions.
- */
- std_fd_enable_dma,
- std_fd_disable_dma,
- std_fd_request_dma,
- std_fd_free_dma,
- std_fd_clear_dma_ff,
- std_fd_set_dma_mode,
- std_fd_set_dma_addr,
- std_fd_set_dma_count,
- std_fd_get_dma_residue,
- std_fd_enable_irq,
- std_fd_disable_irq,
- std_fd_getfdaddr1,
- std_fd_dma_mem_alloc,
- std_fd_dma_mem_free,
- std_fd_drive_type
-};
diff -Nru a/arch/mips64/lib/ide-no.c b/arch/mips64/lib/ide-no.c
--- a/arch/mips64/lib/ide-no.c Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,35 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Stub IDE routines to keep Linux from crashing on machine which don't
- * have IDE like the Indy.
- *
- * Copyright (C) 1998, 1999 by Ralf Baechle
- */
-#include <linux/hdreg.h>
-#include <linux/kernel.h>
-#include <linux/ide.h>
-#include <asm/hdreg.h>
-
-static int no_ide_default_irq(ide_ioreg_t base)
-{
- return 0;
-}
-
-static ide_ioreg_t no_ide_default_io_base(int index)
-{
- return 0;
-}
-
-static void no_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
-}
-
-struct ide_ops no_ide_ops = {
- &no_ide_default_irq,
- &no_ide_default_io_base,
- &no_ide_init_hwif_ports
-};
diff -Nru a/arch/mips64/lib/ide-std.c b/arch/mips64/lib/ide-std.c
--- a/arch/mips64/lib/ide-std.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,63 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/hdreg.h>
-
-static int std_ide_default_irq(ide_ioreg_t base)
-{
- switch (base) {
- case 0x1f0: return 14;
- case 0x170: return 15;
- case 0x1e8: return 11;
- case 0x168: return 10;
- case 0x1e0: return 8;
- case 0x160: return 12;
- default:
- return 0;
- }
-}
-
-static ide_ioreg_t std_ide_default_io_base(int index)
-{
- static unsigned long ata_io_base[MAX_HWIFS] = {
- 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160
- };
-
- return ata_io_base[index];
-}
-
-static void std_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-struct ide_ops std_ide_ops = {
- &std_ide_default_irq,
- &std_ide_default_io_base,
- &std_ide_init_hwif_ports
-};
diff -Nru a/arch/mips64/lib/memcpy.S b/arch/mips64/lib/memcpy.S
--- a/arch/mips64/lib/memcpy.S Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,506 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Unified implementation of memcpy, memmove and the __copy_user backend.
- *
- * Copyright (C) 1998, 99, 2000, 01, 2002 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc.
- * Copyright (C) 2002 Broadcom, Inc.
- * memcpy/copy_user author: Mark Vandevoorde
- *
- * Mnemonic names for arguments to memcpy/__copy_user
- */
-#include <linux/config.h>
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
-#define dst a0
-#define src a1
-#define len a2
-
-/*
- * Spec
- *
- * memcpy copies len bytes from src to dst and sets v0 to dst.
- * It assumes that
- * - src and dst don't overlap
- * - src is readable
- * - dst is writable
- * memcpy uses the standard calling convention
- *
- * __copy_user copies up to len bytes from src to dst and sets a2 (len) to
- * the number of uncopied bytes due to an exception caused by a read or write.
- * __copy_user assumes that src and dst don't overlap, and that the call is
- * implementing one of the following:
- * copy_to_user
- * - src is readable (no exceptions when reading src)
- * copy_from_user
- * - dst is writable (no exceptions when writing dst)
- * __copy_user uses a non-standard calling convention; see
- * include/asm-mips/uaccess.h
- *
- * When an exception happens on a load, the handler must
- # ensure that all of the destination buffer is overwritten to prevent
- * leaking information to user mode programs.
- */
-
-/*
- * Implementation
- */
-
-/*
- * The exception handler for loads requires that:
- * 1- AT contain the address of the byte just past the end of the source
- * of the copy,
- * 2- src_entry <= src < AT, and
- * 3- (dst - src) == (dst_entry - src_entry),
- * The _entry suffix denotes values when __copy_user was called.
- *
- * (1) is set up up by uaccess.h and maintained by not writing AT in copy_user
- * (2) is met by incrementing src by the number of bytes copied
- * (3) is met by not doing loads between a pair of increments of dst and src
- *
- * The exception handlers for stores adjust len (if necessary) and return.
- * These handlers do not need to overwrite any data.
- *
- * For __rmemcpy and memmove an exception is always a kernel bug, therefore
- * they're not protected.
- */
-
-#define EXC(inst_reg,addr,handler) \
-9: inst_reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Only on the 64-bit kernel we can made use of 64-bit registers.
- */
-#ifdef CONFIG_MIPS64
-#define USE_DOUBLE
-#endif
-
-#ifdef USE_DOUBLE
-
-#define LOAD ld
-#define LOADL ldl
-#define LOADR ldr
-#define STOREL sdl
-#define STORER sdr
-#define STORE sd
-#define ADD daddu
-#define SUB dsubu
-#define SRL dsrl
-#define SRA dsra
-#define SLL dsll
-#define SLLV dsllv
-#define SRLV dsrlv
-#define NBYTES 8
-#define LOG_NBYTES 3
-
-/*
- * As we are sharing code base with the mips32 tree (which use the o32 ABI
- * register definitions). We need to redefine the register definitions from
- * the n64 ABI register naming to the o32 ABI register naming.
- */
-#undef t0
-#undef t1
-#undef t2
-#undef t3
-#define t0 $8
-#define t1 $9
-#define t2 $10
-#define t3 $11
-#define t4 $12
-#define t5 $13
-#define t6 $14
-#define t7 $15
-
-#else
-
-#define LOAD lw
-#define LOADL lwl
-#define LOADR lwr
-#define STOREL swl
-#define STORER swr
-#define STORE sw
-#define ADD addu
-#define SUB subu
-#define SRL srl
-#define SLL sll
-#define SRA sra
-#define SLLV sllv
-#define SRLV srlv
-#define NBYTES 4
-#define LOG_NBYTES 2
-
-#endif /* USE_DOUBLE */
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-#define LDFIRST LOADR
-#define LDREST LOADL
-#define STFIRST STORER
-#define STREST STOREL
-#define SHIFT_DISCARD SLLV
-#else
-#define LDFIRST LOADL
-#define LDREST LOADR
-#define STFIRST STOREL
-#define STREST STORER
-#define SHIFT_DISCARD SRLV
-#endif
-
-#define FIRST(unit) ((unit)*NBYTES)
-#define REST(unit) (FIRST(unit)+NBYTES-1)
-#define UNIT(unit) FIRST(unit)
-
-#define ADDRMASK (NBYTES-1)
-
- .text
- .set noreorder
- .set noat
-
-/*
- * A combined memcpy/__copy_user
- * __copy_user sets len to 0 for success; else to an upper bound of
- * the number of uncopied bytes.
- * memcpy sets v0 to dst.
- */
- .align 5
-LEAF(memcpy) /* a0=dst a1=src a2=len */
- move v0, dst /* return value */
-__memcpy:
-FEXPORT(__copy_user)
- /*
- * Note: dst & src may be unaligned, len may be 0
- * Temps
- */
-#define rem t8
-
- /*
- * The "issue break"s below are very approximate.
- * Issue delays for dcache fills will perturb the schedule, as will
- * load queue full replay traps, etc.
- *
- * If len < NBYTES use byte operations.
- */
- PREF( 0, 0(src) )
- PREF( 1, 0(dst) )
- sltu t2, len, NBYTES
- and t1, dst, ADDRMASK
- PREF( 0, 1*32(src) )
- PREF( 1, 1*32(dst) )
- bnez t2, copy_bytes_checklen
- and t0, src, ADDRMASK
- PREF( 0, 2*32(src) )
- PREF( 1, 2*32(dst) )
- bnez t1, dst_unaligned
- nop
- bnez t0, src_unaligned_dst_aligned
- /*
- * use delay slot for fall-through
- * src and dst are aligned; need to compute rem
- */
-both_aligned:
- SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter
- beqz t0, cleanup_both_aligned # len < 8*NBYTES
- and rem, len, (8*NBYTES-1) # rem = len % (8*NBYTES)
- PREF( 0, 3*32(src) )
- PREF( 1, 3*32(dst) )
- .align 4
-1:
-EXC( LOAD t0, UNIT(0)(src), l_exc)
-EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
-EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
-EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
- SUB len, len, 8*NBYTES
-EXC( LOAD t4, UNIT(4)(src), l_exc_copy)
-EXC( LOAD t7, UNIT(5)(src), l_exc_copy)
-EXC( STORE t0, UNIT(0)(dst), s_exc_p8u)
-EXC( STORE t1, UNIT(1)(dst), s_exc_p7u)
-EXC( LOAD t0, UNIT(6)(src), l_exc_copy)
-EXC( LOAD t1, UNIT(7)(src), l_exc_copy)
- ADD src, src, 8*NBYTES
- ADD dst, dst, 8*NBYTES
-EXC( STORE t2, UNIT(-6)(dst), s_exc_p6u)
-EXC( STORE t3, UNIT(-5)(dst), s_exc_p5u)
-EXC( STORE t4, UNIT(-4)(dst), s_exc_p4u)
-EXC( STORE t7, UNIT(-3)(dst), s_exc_p3u)
-EXC( STORE t0, UNIT(-2)(dst), s_exc_p2u)
-EXC( STORE t1, UNIT(-1)(dst), s_exc_p1u)
- PREF( 0, 8*32(src) )
- PREF( 1, 8*32(dst) )
- bne len, rem, 1b
- nop
-
- /*
- * len == rem == the number of bytes left to copy < 8*NBYTES
- */
-cleanup_both_aligned:
- beqz len, done
- sltu t0, len, 4*NBYTES
- bnez t0, less_than_4units
- and rem, len, (NBYTES-1) # rem = len % NBYTES
- /*
- * len >= 4*NBYTES
- */
-EXC( LOAD t0, UNIT(0)(src), l_exc)
-EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
-EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
-EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
- SUB len, len, 4*NBYTES
- ADD src, src, 4*NBYTES
-EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
-EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
-EXC( STORE t2, UNIT(2)(dst), s_exc_p2u)
-EXC( STORE t3, UNIT(3)(dst), s_exc_p1u)
- beqz len, done
- ADD dst, dst, 4*NBYTES
-less_than_4units:
- /*
- * rem = len % NBYTES
- */
- beq rem, len, copy_bytes
- nop
-1:
-EXC( LOAD t0, 0(src), l_exc)
- ADD src, src, NBYTES
- SUB len, len, NBYTES
-EXC( STORE t0, 0(dst), s_exc_p1u)
- bne rem, len, 1b
- ADD dst, dst, NBYTES
-
- /*
- * src and dst are aligned, need to copy rem bytes (rem < NBYTES)
- * A loop would do only a byte at a time with possible branch
- * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE
- * because can't assume read-access to dst. Instead, use
- * STREST dst, which doesn't require read access to dst.
- *
- * This code should perform better than a simple loop on modern,
- * wide-issue mips processors because the code has fewer branches and
- * more instruction-level parallelism.
- */
-#define bits t2
- beqz len, done
- ADD t1, dst, len # t1 is just past last byte of dst
- li bits, 8*NBYTES
- SLL rem, len, 3 # rem = number of bits to keep
-EXC( LOAD t0, 0(src), l_exc)
- SUB bits, bits, rem # bits = number of bits to discard
- SHIFT_DISCARD t0, t0, bits
-EXC( STREST t0, -1(t1), s_exc)
- jr ra
- move len, zero
-dst_unaligned:
- /*
- * dst is unaligned
- * t0 = src & ADDRMASK
- * t1 = dst & ADDRMASK; T1 > 0
- * len >= NBYTES
- *
- * Copy enough bytes to align dst
- * Set match = (src and dst have same alignment)
- */
-#define match rem
-EXC( LDFIRST t3, FIRST(0)(src), l_exc)
- ADD t2, zero, NBYTES
-EXC( LDREST t3, REST(0)(src), l_exc_copy)
- SUB t2, t2, t1 # t2 = number of bytes copied
- xor match, t0, t1
-EXC( STFIRST t3, FIRST(0)(dst), s_exc)
- beq len, t2, done
- SUB len, len, t2
- ADD dst, dst, t2
- beqz match, both_aligned
- ADD src, src, t2
-
-src_unaligned_dst_aligned:
- SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter
- PREF( 0, 3*32(src) )
- beqz t0, cleanup_src_unaligned
- and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES
- PREF( 1, 3*32(dst) )
-1:
-/*
- * Avoid consecutive LD*'s to the same register since some mips
- * implementations can't issue them in the same cycle.
- * It's OK to load FIRST(N+1) before REST(N) because the two addresses
- * are to the same unit (unless src is aligned, but it's not).
- */
-EXC( LDFIRST t0, FIRST(0)(src), l_exc)
-EXC( LDFIRST t1, FIRST(1)(src), l_exc_copy)
- SUB len, len, 4*NBYTES
-EXC( LDREST t0, REST(0)(src), l_exc_copy)
-EXC( LDREST t1, REST(1)(src), l_exc_copy)
-EXC( LDFIRST t2, FIRST(2)(src), l_exc_copy)
-EXC( LDFIRST t3, FIRST(3)(src), l_exc_copy)
-EXC( LDREST t2, REST(2)(src), l_exc_copy)
-EXC( LDREST t3, REST(3)(src), l_exc_copy)
- PREF( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed)
- ADD src, src, 4*NBYTES
-#ifdef CONFIG_CPU_SB1
- nop # improves slotting
-#endif
-EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
-EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
-EXC( STORE t2, UNIT(2)(dst), s_exc_p2u)
-EXC( STORE t3, UNIT(3)(dst), s_exc_p1u)
- PREF( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed)
- bne len, rem, 1b
- ADD dst, dst, 4*NBYTES
-
-cleanup_src_unaligned:
- beqz len, done
- and rem, len, NBYTES-1 # rem = len % NBYTES
- beq rem, len, copy_bytes
- nop
-1:
-EXC( LDFIRST t0, FIRST(0)(src), l_exc)
-EXC( LDREST t0, REST(0)(src), l_exc_copy)
- ADD src, src, NBYTES
- SUB len, len, NBYTES
-EXC( STORE t0, 0(dst), s_exc_p1u)
- bne len, rem, 1b
- ADD dst, dst, NBYTES
-
-copy_bytes_checklen:
- beqz len, done
- nop
-copy_bytes:
- /* 0 < len < NBYTES */
-#define COPY_BYTE(N) \
-EXC( lb t0, N(src), l_exc); \
- SUB len, len, 1; \
- beqz len, done; \
-EXC( sb t0, N(dst), s_exc_p1)
-
- COPY_BYTE(0)
- COPY_BYTE(1)
-#ifdef USE_DOUBLE
- COPY_BYTE(2)
- COPY_BYTE(3)
- COPY_BYTE(4)
- COPY_BYTE(5)
-#endif
-EXC( lb t0, NBYTES-2(src), l_exc)
- SUB len, len, 1
- jr ra
-EXC( sb t0, NBYTES-2(dst), s_exc_p1)
-done:
- jr ra
- nop
- END(memcpy)
-
-l_exc_copy:
- /*
- * Copy bytes from src until faulting load address (or until a
- * lb faults)
- *
- * When reached by a faulting LDFIRST/LDREST, THREAD_BUADDR($28)
- * may be more than a byte beyond the last address.
- * Hence, the lb below may get an exception.
- *
- * Assumes src < THREAD_BUADDR($28)
- */
- LOAD t0, TI_TASK($28)
- LOAD t0, THREAD_BUADDR(t0)
-1:
-EXC( lb t1, 0(src), l_exc)
- ADD src, src, 1
- sb t1, 0(dst) # can't fault -- we're copy_from_user
- bne src, t0, 1b
- ADD dst, dst, 1
-l_exc:
- LOAD t0, THREAD_BUADDR($28) # t0 is just past last good address
- LOAD t0, THREAD_BUADDR(t0)
- nop
- SUB len, AT, t0 # len number of uncopied bytes
- /*
- * Here's where we rely on src and dst being incremented in tandem,
- * See (3) above.
- * dst += (fault addr - src) to put dst at first byte to clear
- */
- ADD dst, t0 # compute start address in a1
- SUB dst, src
- /*
- * Clear len bytes starting at dst. Can't call __bzero because it
- * might modify len. An inefficient loop for these rare times...
- */
- beqz len, done
- SUB src, len, 1
-1: sb zero, 0(dst)
- ADD dst, dst, 1
- bnez src, 1b
- SUB src, src, 1
- jr ra
- nop
-
-
-#define SEXC(n) \
-s_exc_p ## n ## u: \
- jr ra; \
- ADD len, len, n*NBYTES
-
-SEXC(8)
-SEXC(7)
-SEXC(6)
-SEXC(5)
-SEXC(4)
-SEXC(3)
-SEXC(2)
-SEXC(1)
-
-s_exc_p1:
- jr ra
- ADD len, len, 1
-s_exc:
- jr ra
- nop
-
- .align 5
-LEAF(memmove)
- ADD t0, a0, a2
- ADD t1, a1, a2
- sltu t0, a1, t0 # dst + len <= src -> memcpy
- sltu t1, a0, t1 # dst >= src + len -> memcpy
- and t0, t1
- beqz t0, __memcpy
- move v0, a0 /* return value */
- beqz a2, r_out
- END(memmove)
-
- /* fall through to __rmemcpy */
-LEAF(__rmemcpy) /* a0=dst a1=src a2=len */
- sltu t0, a1, a0
- beqz t0, r_end_bytes_up # src >= dst
- nop
- ADD a0, a2 # dst = dst + len
- ADD a1, a2 # src = src + len
-
-r_end_bytes:
- lb t0, -1(a1)
- SUB a2, a2, 0x1
- sb t0, -1(a0)
- SUB a1, a1, 0x1
- bnez a2, r_end_bytes
- SUB a0, a0, 0x1
-
-r_out:
- jr ra
- move a2, zero
-
-r_end_bytes_up:
- lb t0, (a1)
- SUB a2, a2, 0x1
- sb t0, (a0)
- ADD a1, a1, 0x1
- bnez a2, r_end_bytes_up
- ADD a0, a0, 0x1
-
- jr ra
- move a2, zero
- END(__rmemcpy)
diff -Nru a/arch/mips64/lib/memset.S b/arch/mips64/lib/memset.S
--- a/arch/mips64/lib/memset.S Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,144 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-#define F_FILL64(dst, offset, val, fixup) \
- EX(sd, val, (offset + 0x00)(dst), fixup); \
- EX(sd, val, (offset + 0x08)(dst), fixup); \
- EX(sd, val, (offset + 0x10)(dst), fixup); \
- EX(sd, val, (offset + 0x18)(dst), fixup); \
- EX(sd, val, (offset + 0x20)(dst), fixup); \
- EX(sd, val, (offset + 0x28)(dst), fixup); \
- EX(sd, val, (offset + 0x30)(dst), fixup); \
- EX(sd, val, (offset + 0x38)(dst), fixup)
-
-/*
- * memset(void *s, int c, size_t n)
- *
- * a0: start of area to clear
- * a1: char to fill with
- * a2: size of area to clear
- */
- .set noreorder
- .align 5
-LEAF(memset)
- beqz a1, 1f
- move v0, a0 /* result */
-
- andi a1, 0xff /* spread fillword */
- dsll t1, a1, 8
- or a1, t1
- dsll t1, a1, 16
- or a1, t1
- dsll t1, a1, 32
- or a1, t1
-
-1:
-
-FEXPORT(__bzero)
- sltiu t0, a2, 8 /* very small region? */
- bnez t0, small_memset
- andi t0, a0, 7 /* aligned? */
-
- beqz t0, 1f
- dsubu t0, 8 /* alignment in bytes */
-
-#ifdef __MIPSEB__
- EX(sdl, a1, (a0), first_fixup) /* make dword aligned */
-#endif
-#ifdef __MIPSEL__
- EX(sdr, a1, (a0), first_fixup) /* make dword aligned */
-#endif
- dsubu a0, t0 /* dword align ptr */
- daddu a2, t0 /* correct size */
-
-1: ori t1, a2, 0x3f /* # of full blocks */
- xori t1, 0x3f
- beqz t1, memset_partial /* no block to fill */
- andi t0, a2, 0x38
-
- daddu t1, a0 /* end address */
- .set reorder
-1: daddiu a0, 64
- F_FILL64(a0, -64, a1, fwd_fixup)
- bne t1, a0, 1b
- .set noreorder
-
-memset_partial:
- PTR_LA t1, 2f /* where to start */
- .set noat
- dsrl AT, t0, 1
- dsubu t1, AT
- .set noat
- jr t1
- daddu a0, t0 /* dest ptr */
-
- .set push
- .set noreorder
- .set nomacro
- F_FILL64(a0, -64, a1, partial_fixup) /* ... but first do dwds ... */
-2: .set pop
- andi a2, 7 /* 0 <= n <= 7 to go */
-
- beqz a2, 1f
- daddu a0, a2 /* What's left */
-#ifdef __MIPSEB__
- EX(sdr, a1, -1(a0), last_fixup)
-#endif
-#ifdef __MIPSEL__
- EX(sdl, a1, -1(a0), last_fixup)
-#endif
-1: jr ra
- move a2, zero
-
-small_memset:
- beqz a2, 2f
- daddu t1, a0, a2
-
-1: daddiu a0, 1 /* fill bytewise */
- bne t1, a0, 1b
- sb a1, -1(a0)
-
-2: jr ra /* done */
- move a2, zero
- END(memset)
-
-first_fixup:
- jr ra
- nop
-
-fwd_fixup:
- ld t2, TI_TASK($28)
- ld t0, THREAD_BUADDR(t2)
- andi a2, 0x3f
- daddu a2, t1
- jr ra
- dsubu a2, t0
-
-partial_fixup:
- ld t2, TI_TASK($28)
- ld t0, THREAD_BUADDR(t2)
- andi a2, 7
- daddu a2, t1
- jr ra
- dsubu a2, t0
-
-last_fixup:
- jr ra
- andi v1, a2, 7
diff -Nru a/arch/mips64/lib/promlib.c b/arch/mips64/lib/promlib.c
--- a/arch/mips64/lib/promlib.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,24 +0,0 @@
-#include <stdarg.h>
-#include <linux/kernel.h>
-
-extern void prom_putchar(char);
-
-void prom_printf(char *fmt, ...)
-{
- va_list args;
- char ppbuf[1024];
- char *bptr;
-
- va_start(args, fmt);
- vsprintf(ppbuf, fmt, args);
-
- bptr = ppbuf;
-
- while (*bptr != 0) {
- if (*bptr == '\n')
- prom_putchar('\r');
-
- prom_putchar(*bptr++);
- }
- va_end(args);
-}
diff -Nru a/arch/mips64/lib/rtc-no.c b/arch/mips64/lib/rtc-no.c
--- a/arch/mips64/lib/rtc-no.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,33 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Stub RTC routines to keep Linux from crashing on machine which don't
- * have a RTC chip.
- *
- * Copyright (C) 1998, 2001 by Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/mc146818rtc.h>
-
-static unsigned char no_rtc_read_data(unsigned long addr)
-{
- panic("no_rtc_read_data called - shouldn't happen.");
-}
-
-static void no_rtc_write_data(unsigned char data, unsigned long addr)
-{
- panic("no_rtc_write_data called - shouldn't happen.");
-}
-
-static int no_rtc_bcd_mode(void)
-{
- panic("no_rtc_bcd_mode called - shouldn't happen.");
-}
-
-struct rtc_ops no_rtc_ops = {
- &no_rtc_read_data,
- &no_rtc_write_data,
- &no_rtc_bcd_mode
-};
diff -Nru a/arch/mips64/lib/rtc-std.c b/arch/mips64/lib/rtc-std.c
--- a/arch/mips64/lib/rtc-std.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,34 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * RTC routines for PC style attached Dallas chip.
- *
- * Copyright (C) 1998 by Ralf Baechle
- */
-#include <linux/mc146818rtc.h>
-#include <asm/io.h>
-
-static unsigned char std_rtc_read_data(unsigned long addr)
-{
- outb_p(addr, RTC_PORT(0));
- return inb_p(RTC_PORT(1));
-}
-
-static void std_rtc_write_data(unsigned char data, unsigned long addr)
-{
- outb_p(addr, RTC_PORT(0));
- outb_p(data, RTC_PORT(1));
-}
-
-static int std_rtc_bcd_mode(void)
-{
- return 1;
-}
-
-struct rtc_ops std_rtc_ops = {
- &std_rtc_read_data,
- &std_rtc_write_data,
- &std_rtc_bcd_mode
-};
diff -Nru a/arch/mips64/lib/strlen_user.S b/arch/mips64/lib/strlen_user.S
--- a/arch/mips64/lib/strlen_user.S Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,40 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error
- */
-LEAF(__strlen_user_asm)
- ld v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bnez v0, fault
-
-FEXPORT(__strlen_user_nocheck_asm)
- move v0, a0
-1: EX(lb, ta0, (v0), fault)
- daddiu v0, 1
- bnez ta0, 1b
- dsubu v0, a0
- jr ra
- END(__strlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -Nru a/arch/mips64/lib/strncpy_user.S b/arch/mips64/lib/strncpy_user.S
--- a/arch/mips64/lib/strncpy_user.S Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,58 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1999 by Ralf Baechle
- */
-#include <linux/errno.h>
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Returns: -EFAULT if exception before terminator, N if the entire
- * buffer filled, else strlen.
- */
-
-/*
- * Ugly special case have to check: we might get passed a user space
- * pointer which wraps into the kernel space. We don't deal with that. If
- * it happens at most some bytes of the exceptions handlers will be copied.
- */
-
-LEAF(__strncpy_from_user_asm)
- ld v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a1
- bnez v0, fault
-
-FEXPORT(__strncpy_from_user_nocheck_asm)
- move v0, zero
- move v1, a1
- .set noreorder
-1: EX(lbu, ta0, (v1), fault)
- daddiu v1, 1
- beqz ta0, 2f
- sb ta0, (a0)
- daddiu v0, 1
- bne v0, a2, 1b
- daddiu a0, 1
- .set reorder
-2: daddu ta0, a1, v0
- xor ta0, a1
- bltz ta0, fault
- jr ra # return n
- END(__strncpy_from_user_asm)
-
-fault: li v0, -EFAULT
- jr ra
-
- .section __ex_table,"a"
- PTR 1b, fault
- .previous
diff -Nru a/arch/mips64/lib/strnlen_user.S b/arch/mips64/lib/strnlen_user.S
--- a/arch/mips64/lib/strnlen_user.S Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,42 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error, len on string but at max a1 otherwise
- */
-LEAF(__strnlen_user_asm)
- ld v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bnez v0, fault
-
-FEXPORT(__strnlen_user_nocheck_asm)
- move v0, a0
- daddu a1, a0 # stop pointer
-1: beq v0, a1, 1f # limit reached?
- EX(lb, ta0, (v0), fault)
- daddiu v0, 1
- bnez ta0, 1b
-1: dsubu v0, a0
- jr ra
- END(__strnlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -Nru a/arch/mips64/lib/watch.S b/arch/mips64/lib/watch.S
--- a/arch/mips64/lib/watch.S Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,57 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Kernel debug stuff to use the Watch registers.
- * Useful to find stack overflows, dangling pointers etc.
- *
- * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-
- .set noreorder
-/*
- * Parameter: a0 - physical address to watch
- * a1 - set bit #1 to trap on load references
- * bit #0 to trap on store references
- * Results : none
- */
- LEAF(__watch_set)
- ori a0, 7
- xori a0, 7
- or a0, a1
- mtc0 a0, CP0_WATCHLO
- sd a0, watch_savelo
- dsrl32 a0, a0, 0
-
- jr ra
- mtc0 zero, CP0_WATCHHI
- END(__watch_set)
-
-/*
- * Parameter: none
- * Results : none
- */
- LEAF(__watch_clear)
- jr ra
- mtc0 zero, CP0_WATCHLO
- END(__watch_clear)
-
-/*
- * Parameter: none
- * Results : none
- */
- LEAF(__watch_reenable)
- ld t0, watch_savelo
- jr ra
- mtc0 t0, CP0_WATCHLO
- END(__watch_reenable)
-
-/*
- * Saved value of the c0_watchlo register for watch_reenable()
- */
- .local watch_savelo
- .comm watch_savelo, 8, 8
diff -Nru a/arch/mips64/mm/Makefile b/arch/mips64/mm/Makefile
--- a/arch/mips64/mm/Makefile Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,32 +0,0 @@
-#
-# Makefile for the Linux/MIPS-specific parts of the memory manager.
-#
-
-obj-y := cache.o extable.o init.o fault.o loadmmu.o \
- pgtable.o tlbex-r4k.o
-
-obj-$(CONFIG_CPU_R4300) += c-r4k.o pg-r4k.o tlb-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R4X00) += c-r4k.o pg-r4k.o tlb-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R5000) += c-r4k.o pg-r4k.o tlb-r4k.o sc-r5k.o \
- tlb-glue-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += c-r4k.o pg-r4k.o tlb-r4k.o sc-r5k.o \
- tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R5432) += c-r4k.o pg-r4k.o tlb-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_RM7000) += c-r4k.o pg-r4k.o tlb-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R10000) += c-r4k.o pg-r4k.o tlb-andes.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_SB1) += c-sb1.o pg-sb1.o tlb-sb1.o tlb-glue-sb1.o \
- cex-sb1.o cerr-sb1.o
-obj-$(CONFIG_CPU_MIPS64) += c-r4k.o pg-r4k.o tlb-r4k.o tlb-glue-r4k.o
-
-#
-# Debug TLB exception handler, currently unused
-#
-#obj-y += tlb-dbg-r4k.o
-
-obj-$(CONFIG_CPU_RM7000) += sc-rm7k.o
-obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
-obj-$(CONFIG_SGI_IP22) += sc-ip22.o
-
-AFLAGS_tlb-glue-r4k.o := -P
-
-EXTRA_AFLAGS := $(CFLAGS)
diff -Nru a/arch/mips64/mm/c-r4k.c b/arch/mips64/mm/c-r4k.c
--- a/arch/mips64/mm/c-r4k.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1161 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/bitops.h>
-
-#include <asm/bcache.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/mmu_context.h>
-#include <asm/war.h>
-
-/* Primary cache parameters. */
-static unsigned long icache_size, dcache_size, scache_size;
-unsigned long icache_way_size, dcache_way_size, scache_way_size;
-static unsigned long scache_size;
-
-#include <asm/cacheops.h>
-#include <asm/r4kcache.h>
-
-extern void andes_clear_page(void * page);
-extern void r4k_clear_page32_d16(void * page);
-extern void r4k_clear_page32_d32(void * page);
-extern void r4k_clear_page_d16(void * page);
-extern void r4k_clear_page_d32(void * page);
-extern void r4k_clear_page_r4600_v1(void * page);
-extern void r4k_clear_page_r4600_v2(void * page);
-extern void r4k_clear_page_s16(void * page);
-extern void r4k_clear_page_s32(void * page);
-extern void r4k_clear_page_s64(void * page);
-extern void r4k_clear_page_s128(void * page);
-extern void andes_copy_page(void * to, void * from);
-extern void r4k_copy_page_d16(void * to, void * from);
-extern void r4k_copy_page_d32(void * to, void * from);
-extern void r4k_copy_page_r4600_v1(void * to, void * from);
-extern void r4k_copy_page_r4600_v2(void * to, void * from);
-extern void r4k_copy_page_s16(void * to, void * from);
-extern void r4k_copy_page_s32(void * to, void * from);
-extern void r4k_copy_page_s64(void * to, void * from);
-extern void r4k_copy_page_s128(void * to, void * from);
-
-/*
- * Dummy cache handling routines for machines without boardcaches
- */
-static void no_sc_noop(void) {}
-
-static struct bcache_ops no_sc_ops = {
- .bc_enable = (void *)no_sc_noop,
- .bc_disable = (void *)no_sc_noop,
- .bc_wback_inv = (void *)no_sc_noop,
- .bc_inv = (void *)no_sc_noop
-};
-
-struct bcache_ops *bcops = &no_sc_ops;
-
-#define R4600_HIT_CACHEOP_WAR_IMPL \
-do { \
- if (R4600_V2_HIT_CACHEOP_WAR && \
- (read_c0_prid() & 0xfff0) == 0x2020) { /* R4600 V2.0 */\
- *(volatile unsigned long *)KSEG1; \
- } \
- if (R4600_V1_HIT_CACHEOP_WAR) \
- __asm__ __volatile__("nop;nop;nop;nop"); \
-} while (0)
-
-static void r4k_blast_dcache_page(unsigned long addr)
-{
- static void *l = &&init;
- unsigned long dc_lsize;
-
- goto *l;
-
-dc_16:
- blast_dcache16_page(addr);
- return;
-
-dc_32:
- R4600_HIT_CACHEOP_WAR_IMPL;
- blast_dcache32_page(addr);
- return;
-
-init:
- dc_lsize = current_cpu_data.dcache.linesz;
-
- if (dc_lsize == 16)
- l = &&dc_16;
- else if (dc_lsize == 32)
- l = &&dc_32;
- goto *l;
-}
-
-static void r4k_blast_dcache_page_indexed(unsigned long addr)
-{
- static void *l = &&init;
- unsigned long dc_lsize;
-
- goto *l;
-
-dc_16:
- blast_dcache16_page_indexed(addr);
- return;
-
-dc_32:
- blast_dcache32_page_indexed(addr);
- return;
-
-init:
- dc_lsize = current_cpu_data.dcache.linesz;
-
- if (dc_lsize == 16)
- l = &&dc_16;
- else if (dc_lsize == 32)
- l = &&dc_32;
- goto *l;
-}
-
-static void r4k_blast_dcache(void)
-{
- static void *l = &&init;
- unsigned long dc_lsize;
-
- goto *l;
-
-dc_16:
- blast_dcache16();
- return;
-
-dc_32:
- blast_dcache32();
- return;
-
-init:
- dc_lsize = current_cpu_data.dcache.linesz;
-
- if (dc_lsize == 16)
- l = &&dc_16;
- else if (dc_lsize == 32)
- l = &&dc_32;
- goto *l;
-}
-
-static void r4k_blast_icache_page(unsigned long addr)
-{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- static void *l = &&init;
-
- goto *l;
-
-ic_16:
- blast_icache16_page(addr);
- return;
-
-ic_32:
- blast_icache32_page(addr);
- return;
-
-ic_64:
- blast_icache64_page(addr);
- return;
-
-init:
- if (ic_lsize == 16)
- l = &&ic_16;
- else if (ic_lsize == 32)
- l = &&ic_32;
- else if (ic_lsize == 64)
- l = &&ic_64;
- goto *l;
-}
-
-static void r4k_blast_icache_page_indexed(unsigned long addr)
-{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- static void *l = &&init;
-
- goto *l;
-
-ic_16:
- blast_icache16_page_indexed(addr);
- return;
-
-ic_32:
- blast_icache32_page_indexed(addr);
- return;
-
-ic_64:
- blast_icache64_page_indexed(addr);
- return;
-
-init:
- if (ic_lsize == 16)
- l = &&ic_16;
- else if (ic_lsize == 32)
- l = &&ic_32;
- else if (ic_lsize == 64)
- l = &&ic_64;
- goto *l;
-}
-
-static void r4k_blast_icache(void)
-{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- static void *l = &&init;
-
- goto *l;
-
-ic_16:
- blast_icache16();
- return;
-
-ic_32:
- blast_icache32();
- return;
-
-ic_64:
- blast_icache64();
- return;
-
-init:
- if (ic_lsize == 16)
- l = &&ic_16;
- else if (ic_lsize == 32)
- l = &&ic_32;
- else if (ic_lsize == 64)
- l = &&ic_64;
- goto *l;
-}
-
-static void r4k_blast_scache_page(unsigned long addr)
-{
- unsigned long sc_lsize = current_cpu_data.scache.linesz;
- static void *l = &&init;
-
- goto *l;
-
-sc_16:
- blast_scache16_page(addr);
- return;
-
-sc_32:
- blast_scache32_page(addr);
- return;
-
-sc_64:
- blast_scache64_page(addr);
- return;
-
-sc_128:
- blast_scache128_page(addr);
- return;
-
-init:
- if (sc_lsize == 16)
- l = &&sc_16;
- else if (sc_lsize == 32)
- l = &&sc_32;
- else if (sc_lsize == 64)
- l = &&sc_64;
- else if (sc_lsize == 128)
- l = &&sc_128;
- goto *l;
-}
-
-static void r4k_blast_scache(void)
-{
- unsigned long sc_lsize = current_cpu_data.scache.linesz;
- static void *l = &&init;
-
- goto *l;
-
-sc_16:
- blast_scache16();
- return;
-
-sc_32:
- blast_scache32();
- return;
-
-sc_64:
- blast_scache64();
- return;
-
-sc_128:
- blast_scache128();
- return;
-
-init:
- if (sc_lsize == 16)
- l = &&sc_16;
- else if (sc_lsize == 32)
- l = &&sc_32;
- else if (sc_lsize == 64)
- l = &&sc_64;
- else if (sc_lsize == 128)
- l = &&sc_128;
- goto *l;
-}
-
-static void r4k_flush_cache_all(void)
-{
- if (!cpu_has_dc_aliases)
- return;
-
- r4k_blast_dcache();
- r4k_blast_icache();
-}
-
-static void r4k___flush_cache_all(void)
-{
- r4k_blast_dcache();
- r4k_blast_icache();
-
- switch (current_cpu_data.cputype) {
- case CPU_R4000SC:
- case CPU_R4000MC:
- case CPU_R4400SC:
- case CPU_R4400MC:
- case CPU_R10000:
- case CPU_R12000:
- r4k_blast_scache();
- }
-}
-
-static void r4k_flush_cache_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end)
-{
- if (cpu_context(smp_processor_id(), vma->vm_mm) != 0) {
- r4k_blast_dcache();
- if (vma->vm_flags & VM_EXEC)
- r4k_blast_icache();
- }
-}
-
-static void r4k_flush_cache_mm(struct mm_struct *mm)
-{
- if (!cpu_has_dc_aliases)
- return;
-
- if (!cpu_context(smp_processor_id(), mm))
- return;
-
- r4k_blast_dcache();
- r4k_blast_icache();
-
- /*
- * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we
- * only flush the primary caches but R10000 and R12000 behave sane ...
- */
- if (current_cpu_data.cputype == CPU_R4000SC ||
- current_cpu_data.cputype == CPU_R4000MC ||
- current_cpu_data.cputype == CPU_R4400SC ||
- current_cpu_data.cputype == CPU_R4400MC)
- r4k_blast_scache();
-}
-
-static void r4k_flush_cache_page(struct vm_area_struct *vma,
- unsigned long page)
-{
- int exec = vma->vm_flags & VM_EXEC;
- struct mm_struct *mm = vma->vm_mm;
- pgd_t *pgdp;
- pmd_t *pmdp;
- pte_t *ptep;
-
- /*
- * If ownes no valid ASID yet, cannot possibly have gotten
- * this page into the cache.
- */
- if (cpu_context(smp_processor_id(), mm) == 0)
- return;
-
- page &= PAGE_MASK;
- pgdp = pgd_offset(mm, page);
- pmdp = pmd_offset(pgdp, page);
- ptep = pte_offset(pmdp, page);
-
- /*
- * If the page isn't marked valid, the page cannot possibly be
- * in the cache.
- */
- if (!(pte_val(*ptep) & _PAGE_PRESENT))
- return;
-
- /*
- * Doing flushes for another ASID than the current one is
- * too difficult since stupid R4k caches do a TLB translation
- * for every cache flush operation. So we do indexed flushes
- * in that case, which doesn't overly flush the cache too much.
- */
- if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) {
- if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc))
- r4k_blast_dcache_page(page);
- if (exec)
- r4k_blast_icache_page(page);
-
- return;
- }
-
- /*
- * Do indexed flush, too much work to get the (possible) TLB refills
- * to work correctly.
- */
- page = (KSEG0 + (page & (dcache_size - 1)));
- if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc))
- r4k_blast_dcache_page_indexed(page);
- if (exec) {
- if (cpu_has_vtag_icache) {
- int cpu = smp_processor_id();
-
- if (cpu_context(cpu, vma->vm_mm) != 0)
- drop_mmu_context(vma->vm_mm, cpu);
- } else
- r4k_blast_icache_page_indexed(page);
- }
-}
-
-static void r4k_flush_data_cache_page(unsigned long addr)
-{
- r4k_blast_dcache_page(addr);
-}
-
-static void r4k_flush_icache_range(unsigned long start, unsigned long end)
-{
- unsigned long dc_lsize = current_cpu_data.dcache.linesz;
- unsigned long addr, aend;
-
- if (!cpu_has_ic_fills_f_dc) {
- if (end - start > dcache_size)
- r4k_blast_dcache();
- else {
- addr = start & ~(dc_lsize - 1);
- aend = (end - 1) & ~(dc_lsize - 1);
-
- while (1) {
- /* Hit_Writeback_Inv_D */
- protected_writeback_dcache_line(addr);
- if (addr == aend)
- break;
- addr += dc_lsize;
- }
- }
- }
-
- if (end - start > icache_size)
- r4k_blast_icache();
- else {
- addr = start & ~(dc_lsize - 1);
- aend = (end - 1) & ~(dc_lsize - 1);
- while (1) {
- /* Hit_Invalidate_I */
- protected_flush_icache_line(addr);
- if (addr == aend)
- break;
- addr += dc_lsize;
- }
- }
-}
-
-/*
- * Ok, this seriously sucks. We use them to flush a user page but don't
- * know the virtual address, so we have to blast away the whole icache
- * which is significantly more expensive than the real thing. Otoh we at
- * least know the kernel address of the page so we can flush it
- * selectivly.
- */
-static void r4k_flush_icache_page(struct vm_area_struct *vma,
- struct page *page)
-{
- /*
- * If there's no context yet, or the page isn't executable, no icache
- * flush is needed.
- */
- if (!(vma->vm_flags & VM_EXEC))
- return;
-
- /*
- * Tricky ... Because we don't know the virtual address we've got the
- * choice of either invalidating the entire primary and secondary
- * caches or invalidating the secondary caches also. With the subset
- * enforcment on R4000SC, R4400SC, R10000 and R12000 invalidating the
- * secondary cache will result in any entries in the primary caches
- * also getting invalidated which hopefully is a bit more economical.
- */
- if (cpu_has_subset_pcaches) {
- unsigned long addr = (unsigned long) page_address(page);
- r4k_blast_scache_page(addr);
-
- return;
- }
-
- if (!cpu_has_ic_fills_f_dc) {
- unsigned long addr = (unsigned long) page_address(page);
- r4k_blast_dcache_page(addr);
- }
-
- /*
- * We're not sure of the virtual address(es) involved here, so
- * we have to flush the entire I-cache.
- */
- if (cpu_has_vtag_icache) {
- int cpu = smp_processor_id();
-
- if (cpu_context(cpu, vma->vm_mm) != 0)
- drop_mmu_context(vma->vm_mm, cpu);
- } else
- r4k_blast_icache();
-}
-
-#ifdef CONFIG_NONCOHERENT_IO
-
-static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
-{
- unsigned long end, a;
-
- if (cpu_has_subset_pcaches) {
- unsigned long sc_lsize = current_cpu_data.scache.linesz;
-
- if (size >= scache_size) {
- r4k_blast_scache();
- return;
- }
-
- a = addr & ~(sc_lsize - 1);
- end = (addr + size - 1) & ~(sc_lsize - 1);
- while (1) {
- flush_scache_line(a); /* Hit_Writeback_Inv_SD */
- if (a == end)
- break;
- a += sc_lsize;
- }
- return;
- }
-
- /*
- * Either no secondary cache or the available caches don't have the
- * subset property so we have to flush the primary caches
- * explicitly
- */
- if (size >= dcache_size) {
- r4k_blast_dcache();
- } else {
- unsigned long dc_lsize = current_cpu_data.dcache.linesz;
-
- R4600_HIT_CACHEOP_WAR_IMPL;
- a = addr & ~(dc_lsize - 1);
- end = (addr + size - 1) & ~(dc_lsize - 1);
- while (1) {
- flush_dcache_line(a); /* Hit_Writeback_Inv_D */
- if (a == end)
- break;
- a += dc_lsize;
- }
- }
-
- bc_wback_inv(addr, size);
-}
-
-static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
-{
- unsigned long end, a;
-
- if (cpu_has_subset_pcaches) {
- unsigned long sc_lsize = current_cpu_data.scache.linesz;
-
- if (size >= scache_size) {
- r4k_blast_scache();
- return;
- }
-
- a = addr & ~(sc_lsize - 1);
- end = (addr + size - 1) & ~(sc_lsize - 1);
- while (1) {
- flush_scache_line(a); /* Hit_Writeback_Inv_SD */
- if (a == end)
- break;
- a += sc_lsize;
- }
- return;
- }
-
- if (size >= dcache_size) {
- r4k_blast_dcache();
- } else {
- unsigned long dc_lsize = current_cpu_data.dcache.linesz;
-
- R4600_HIT_CACHEOP_WAR_IMPL;
- a = addr & ~(dc_lsize - 1);
- end = (addr + size - 1) & ~(dc_lsize - 1);
- while (1) {
- flush_dcache_line(a); /* Hit_Writeback_Inv_D */
- if (a == end)
- break;
- a += dc_lsize;
- }
- }
-
- bc_inv(addr, size);
-}
-#endif /* CONFIG_NONCOHERENT_IO */
-
-/*
- * While we're protected against bad userland addresses we don't care
- * very much about what happens in that case. Usually a segmentation
- * fault will dump the process later on anyway ...
- */
-static void r4k_flush_cache_sigtramp(unsigned long addr)
-{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- unsigned long dc_lsize = current_cpu_data.dcache.linesz;
-
- R4600_HIT_CACHEOP_WAR_IMPL;
- protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
- protected_flush_icache_line(addr & ~(ic_lsize - 1));
-}
-
-static void r4k_flush_icache_all(void)
-{
- if (cpu_has_vtag_icache)
- r4k_blast_icache();
-}
-
-static inline void rm7k_erratum31(void)
-{
- const unsigned long ic_lsize = 32;
- unsigned long addr;
-
- /* RM7000 erratum #31. The icache is screwed at startup. */
- write_c0_taglo(0);
- write_c0_taghi(0);
-
- for (addr = KSEG0; addr <= KSEG0 + 4096; addr += ic_lsize) {
- __asm__ __volatile__ (
- ".set noreorder\n\t"
- ".set mips3\n\t"
- "cache\t%1, 0(%0)\n\t"
- "cache\t%1, 0x1000(%0)\n\t"
- "cache\t%1, 0x2000(%0)\n\t"
- "cache\t%1, 0x3000(%0)\n\t"
- "cache\t%2, 0(%0)\n\t"
- "cache\t%2, 0x1000(%0)\n\t"
- "cache\t%2, 0x2000(%0)\n\t"
- "cache\t%2, 0x3000(%0)\n\t"
- "cache\t%1, 0(%0)\n\t"
- "cache\t%1, 0x1000(%0)\n\t"
- "cache\t%1, 0x2000(%0)\n\t"
- "cache\t%1, 0x3000(%0)\n\t"
- ".set\tmips0\n\t"
- ".set\treorder\n\t"
- :
- : "r" (addr), "i" (Index_Store_Tag_I), "i" (Fill));
- }
-}
-
-static char *way_string[] = { NULL, "direct mapped", "2-way", "3-way", "4-way",
- "5-way", "6-way", "7-way", "8-way"
-};
-
-static void __init probe_pcache(void)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned int config = read_c0_config();
- unsigned int prid = read_c0_prid();
- unsigned long config1;
- unsigned int lsize;
-
- switch (current_cpu_data.cputype) {
- case CPU_R4600: /* QED style two way caches? */
- case CPU_R4700:
- case CPU_R5000:
- case CPU_NEVADA:
- icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 2;
- c->icache.waybit = ffs(icache_size/2) - 1;
-
- dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 2;
- c->dcache.waybit= ffs(dcache_size/2) - 1;
- break;
-
- case CPU_R5432:
- case CPU_R5500:
- icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 2;
- c->icache.waybit= 0;
-
- dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 2;
- c->dcache.waybit = 0;
- break;
-
- case CPU_TX49XX:
- icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 4;
- c->icache.waybit= 0;
-
- dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 4;
- c->dcache.waybit = 0;
- break;
-
- case CPU_R4000PC:
- case CPU_R4000SC:
- case CPU_R4000MC:
- case CPU_R4400PC:
- case CPU_R4400SC:
- case CPU_R4400MC:
- icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 1;
- c->icache.waybit = 0; /* doesn't matter */
-
- dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 1;
- c->dcache.waybit = 0; /* does not matter */
- break;
-
- case CPU_R10000:
- case CPU_R12000:
- icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
- c->icache.linesz = 64;
- c->icache.ways = 2;
- c->icache.waybit = 0;
-
- dcache_size = 1 << (12 + ((config & R10K_CONF_DC) >> 26));
- c->dcache.linesz = 32;
- c->dcache.ways = 2;
- c->dcache.waybit = 0;
- break;
-
- case CPU_VR4131:
- icache_size = 1 << (10 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 2;
- c->icache.waybit = ffs(icache_size/2) - 1;
-
- dcache_size = 1 << (10 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 2;
- c->dcache.waybit = ffs(dcache_size/2) - 1;
- break;
-
- case CPU_VR41XX:
- case CPU_VR4111:
- case CPU_VR4121:
- case CPU_VR4122:
- case CPU_VR4181:
- case CPU_VR4181A:
- icache_size = 1 << (10 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 1;
- c->icache.waybit = 0; /* doesn't matter */
-
- dcache_size = 1 << (10 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 1;
- c->dcache.waybit = 0; /* does not matter */
- break;
-
- case CPU_RM7000:
- rm7k_erratum31();
-
- icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 4;
- c->icache.waybit = ffs(icache_size / c->icache.ways) - 1;
-
- dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 4;
- c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1;
- break;
-
- default:
- if (!(config & MIPS_CONF_M))
- panic("Don't know how to probe P-caches on this cpu.");
-
- /*
- * So we seem to be a MIPS32 or MIPS64 CPU
- * So let's probe the I-cache ...
- */
- config1 = read_c0_config1();
-
- if ((lsize = ((config1 >> 19) & 7)))
- c->icache.linesz = 2 << lsize;
- else
- c->icache.linesz = lsize;
- c->icache.sets = 64 << ((config1 >> 22) & 7);
- c->icache.ways = 1 + ((config1 >> 16) & 7);
-
- icache_size = c->icache.sets *
- c->icache.ways *
- c->icache.linesz;
- c->icache.waybit = ffs(icache_size/c->icache.ways) - 1;
-
- /*
- * Now probe the MIPS32 / MIPS64 data cache.
- */
- c->dcache.flags = 0;
-
- if ((lsize = ((config1 >> 10) & 7)))
- c->dcache.linesz = 2 << lsize;
- else
- c->dcache.linesz= lsize;
- c->dcache.sets = 64 << ((config1 >> 13) & 7);
- c->dcache.ways = 1 + ((config1 >> 7) & 7);
-
- dcache_size = c->dcache.sets *
- c->dcache.ways *
- c->dcache.linesz;
- c->dcache.waybit = ffs(dcache_size/c->dcache.ways) - 1;
- break;
- }
-
- /*
- * Processor configuration sanity check for the R4000SC erratum
- * #5. With page sizes larger than 32kB there is no possibility
- * to get a VCE exception anymore so we don't care about this
- * misconfiguration. The case is rather theoretical anyway;
- * presumably no vendor is shipping his hardware in the "bad"
- * configuration.
- */
- if ((prid & 0xff00) == PRID_IMP_R4000 && (prid & 0xff) < 0x40 &&
- !(config & CONF_SC) && c->icache.linesz != 16 &&
- PAGE_SIZE <= 0x8000)
- panic("Improper R4000SC processor configuration detected");
-
- /* compute a couple of other cache variables */
- icache_way_size = icache_size / c->icache.ways;
- dcache_way_size = dcache_size / c->dcache.ways;
-
- c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways);
- c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways);
-
- /*
- * R10000 and R12000 P-caches are odd in a positive way. They're 32kB
- * 2-way virtually indexed so normally would suffer from aliases. So
- * normally they'd suffer from aliases but magic in the hardware deals
- * with that for us so we don't need to take care ourselves.
- */
- if (current_cpu_data.cputype != CPU_R10000 &&
- current_cpu_data.cputype != CPU_R12000)
- if (dcache_way_size > PAGE_SIZE)
- c->dcache.flags |= MIPS_CACHE_ALIASES;
-
- if (config & 0x8) /* VI bit */
- c->icache.flags |= MIPS_CACHE_VTAG;
-
- switch (c->cputype) {
- case CPU_20KC:
- /*
- * Some older 20Kc chips doesn't have the 'VI' bit in
- * the config register.
- */
- c->icache.flags |= MIPS_CACHE_VTAG;
- break;
-
- case CPU_AU1500:
- c->icache.flags |= MIPS_CACHE_IC_F_DC;
- break;
- }
-
- printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n",
- icache_size >> 10,
- cpu_has_vtag_icache ? "virtually tagged" : "physically tagged",
- way_string[c->icache.ways], c->icache.linesz);
-
- printk("Primary data cache %ldkB %s, linesize %d bytes.\n",
- dcache_size >> 10, way_string[c->dcache.ways], c->dcache.linesz);
-}
-
-/*
- * If you even _breathe_ on this function, look at the gcc output and make sure
- * it does not pop things on and off the stack for the cache sizing loop that
- * executes in KSEG1 space or else you will crash and burn badly. You have
- * been warned.
- */
-static int __init probe_scache(void)
-{
- extern unsigned long stext;
- unsigned long flags, addr, begin, end, pow2;
- unsigned int config = read_c0_config();
- struct cpuinfo_mips *c = ¤t_cpu_data;
- int tmp;
-
- if (config & CONF_SC)
- return 0;
-
- begin = (unsigned long) &stext;
- begin &= ~((4 * 1024 * 1024) - 1);
- end = begin + (4 * 1024 * 1024);
-
- /*
- * This is such a bitch, you'd think they would make it easy to do
- * this. Away you daemons of stupidity!
- */
- local_irq_save(flags);
-
- /* Fill each size-multiple cache line with a valid tag. */
- pow2 = (64 * 1024);
- for (addr = begin; addr < end; addr = (begin + pow2)) {
- unsigned long *p = (unsigned long *) addr;
- __asm__ __volatile__("nop" : : "r" (*p)); /* whee... */
- pow2 <<= 1;
- }
-
- /* Load first line with zero (therefore invalid) tag. */
- write_c0_taglo(0);
- write_c0_taghi(0);
- __asm__ __volatile__("nop; nop; nop; nop;"); /* avoid the hazard */
- cache_op(Index_Store_Tag_I, begin);
- cache_op(Index_Store_Tag_D, begin);
- cache_op(Index_Store_Tag_SD, begin);
-
- /* Now search for the wrap around point. */
- pow2 = (128 * 1024);
- tmp = 0;
- for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) {
- cache_op(Index_Load_Tag_SD, addr);
- __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */
- if (!read_c0_taglo())
- break;
- pow2 <<= 1;
- }
- local_irq_restore(flags);
- addr -= begin;
-
- c = ¤t_cpu_data;
- scache_size = addr;
- c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
- c->scache.ways = 1;
- c->dcache.waybit = 0; /* does not matter */
-
- return 1;
-}
-
-static void __init setup_noscache_funcs(void)
-{
- unsigned int prid;
-
- switch (current_cpu_data.dcache.linesz) {
- case 16:
- if (cpu_has_64bits)
- _clear_page = r4k_clear_page_d16;
- else
- _clear_page = r4k_clear_page32_d16;
- _copy_page = r4k_copy_page_d16;
-
- break;
- case 32:
- prid = read_c0_prid() & 0xfff0;
- if (prid == 0x2010) { /* R4600 V1.7 */
- _clear_page = r4k_clear_page_r4600_v1;
- _copy_page = r4k_copy_page_r4600_v1;
- } else if (prid == 0x2020) { /* R4600 V2.0 */
- _clear_page = r4k_clear_page_r4600_v2;
- _copy_page = r4k_copy_page_r4600_v2;
- } else {
- if (cpu_has_64bits)
- _clear_page = r4k_clear_page_d32;
- else
- _clear_page = r4k_clear_page32_d32;
- _copy_page = r4k_copy_page_d32;
- }
- break;
- }
-}
-
-static void __init setup_scache_funcs(void)
-{
- if (current_cpu_data.dcache.linesz > current_cpu_data.scache.linesz)
- panic("Invalid primary cache configuration detected");
-
- if (current_cpu_data.cputype == CPU_R10000 ||
- current_cpu_data.cputype == CPU_R12000) {
- _clear_page = andes_clear_page;
- _copy_page = andes_copy_page;
- return;
- }
-
- switch (current_cpu_data.scache.linesz) {
- case 16:
- _clear_page = r4k_clear_page_s16;
- _copy_page = r4k_copy_page_s16;
- break;
- case 32:
- _clear_page = r4k_clear_page_s32;
- _copy_page = r4k_copy_page_s32;
- break;
- case 64:
- _clear_page = r4k_clear_page_s64;
- _copy_page = r4k_copy_page_s64;
- break;
- case 128:
- _clear_page = r4k_clear_page_s128;
- _copy_page = r4k_copy_page_s128;
- break;
- }
-}
-
-typedef int (*probe_func_t)(unsigned long);
-extern int r5k_sc_init(void);
-extern int rm7k_sc_init(void);
-
-static void __init setup_scache(void)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned int config = read_c0_config();
- probe_func_t probe_scache_kseg1;
- int sc_present = 0;
-
- /*
- * Do the probing thing on R4000SC and R4400SC processors. Other
- * processors don't have a S-cache that would be relevant to the
- * Linux memory managment.
- */
- switch (current_cpu_data.cputype) {
- case CPU_R4000PC:
- case CPU_R4000SC:
- case CPU_R4000MC:
- case CPU_R4400PC:
- case CPU_R4400SC:
- case CPU_R4400MC:
- probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache));
- sc_present = probe_scache_kseg1(config);
- break;
-
- case CPU_R10000:
- case CPU_R12000:
- scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
- c->scache.linesz = 64 << ((config >> 13) & 1);
- c->scache.ways = 2;
- c->scache.waybit= 0;
- sc_present = 1;
- break;
-
- case CPU_R5000:
- case CPU_NEVADA:
- setup_noscache_funcs();
-#ifdef CONFIG_R5000_CPU_SCACHE
- r5k_sc_init();
-#endif
- return;
-
- case CPU_RM7000:
- setup_noscache_funcs();
-#ifdef CONFIG_RM7000_CPU_SCACHE
- rm7k_sc_init();
-#endif
- return;
-
- default:
- sc_present = 0;
- }
-
- if (!sc_present) {
- setup_noscache_funcs();
- return;
- }
-
- if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32 ||
- current_cpu_data.isa_level == MIPS_CPU_ISA_M64) &&
- !(current_cpu_data.scache.flags & MIPS_CACHE_NOT_PRESENT))
- panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
-
- printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n",
- scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
-
- current_cpu_data.options |= MIPS_CPU_SUBSET_CACHES;
- setup_scache_funcs();
-}
-
-static inline void coherency_setup(void)
-{
- change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
-
- /*
- * c0_status.cu=0 specifies that updates by the sc instruction use
- * the coherency mode specified by the TLB; 1 means cachable
- * coherent update on write will be used. Not all processors have
- * this bit and; some wire it to zero, others like Toshiba had the
- * silly idea of putting something else there ...
- */
- switch (current_cpu_data.cputype) {
- case CPU_R4000PC:
- case CPU_R4000SC:
- case CPU_R4000MC:
- case CPU_R4400PC:
- case CPU_R4400SC:
- case CPU_R4400MC:
- clear_c0_config(CONF_CU);
- break;
- }
-
-}
-
-void __init ld_mmu_r4xx0(void)
-{
- extern char except_vec2_generic;
-
- /* Default cache error handler for R4000 and R5000 family */
- memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
- memcpy((void *)(KSEG1 + 0x100), &except_vec2_generic, 0x80);
-
- probe_pcache();
- setup_scache();
- coherency_setup();
-
- if (current_cpu_data.dcache.sets *
- current_cpu_data.dcache.ways > PAGE_SIZE)
- current_cpu_data.dcache.flags |= MIPS_CACHE_ALIASES;
-
- /*
- * Some MIPS32 and MIPS64 processors have physically indexed caches.
- * This code supports virtually indexed processors and will be
- * unnecessarily unefficient on physically indexed processors.
- */
- shm_align_mask = max_t(unsigned long,
- current_cpu_data.dcache.sets * current_cpu_data.dcache.linesz - 1,
- PAGE_SIZE - 1);
-
- flush_cache_all = r4k_flush_cache_all;
- __flush_cache_all = r4k___flush_cache_all;
- flush_cache_mm = r4k_flush_cache_mm;
- flush_cache_page = r4k_flush_cache_page;
- flush_icache_page = r4k_flush_icache_page;
- flush_cache_range = r4k_flush_cache_range;
-
- flush_cache_sigtramp = r4k_flush_cache_sigtramp;
- flush_icache_all = r4k_flush_icache_all;
- flush_data_cache_page = r4k_flush_data_cache_page;
- flush_icache_range = r4k_flush_icache_range;
-
-#ifdef CONFIG_NONCOHERENT_IO
- _dma_cache_wback_inv = r4k_dma_cache_wback_inv;
- _dma_cache_wback = r4k_dma_cache_wback_inv;
- _dma_cache_inv = r4k_dma_cache_inv;
-#endif
-
- __flush_cache_all();
-}
diff -Nru a/arch/mips64/mm/c-sb1.c b/arch/mips64/mm/c-sb1.c
--- a/arch/mips64/mm/c-sb1.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,594 +0,0 @@
-/*
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <asm/mmu_context.h>
-#include <asm/bootinfo.h>
-#include <asm/cacheops.h>
-#include <asm/cpu.h>
-#include <asm/uaccess.h>
-
-extern void sb1_clear_page(void * page);
-extern void sb1_copy_page(void * to, void * from);
-
-/* These are probed at ld_mmu time */
-static unsigned long icache_size;
-static unsigned long dcache_size;
-
-static unsigned long icache_line_size;
-static unsigned long dcache_line_size;
-
-static unsigned int icache_index_mask;
-static unsigned int dcache_index_mask;
-
-static unsigned long icache_assoc;
-static unsigned long dcache_assoc;
-
-static unsigned int icache_sets;
-static unsigned int dcache_sets;
-
-static unsigned int icache_range_cutoff;
-static unsigned int dcache_range_cutoff;
-
-/*
- * The dcache is fully coherent to the system, with one
- * big caveat: the instruction stream. In other words,
- * if we miss in the icache, and have dirty data in the
- * L1 dcache, then we'll go out to memory (or the L2) and
- * get the not-as-recent data.
- *
- * So the only time we have to flush the dcache is when
- * we're flushing the icache. Since the L2 is fully
- * coherent to everything, including I/O, we never have
- * to flush it
- */
-
-/*
- * Writeback and invalidate the entire dcache
- */
-static inline void __sb1_writeback_inv_dcache_all(void)
-{
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " move $1, $0 \n" /* Start at index 0 */
- "1: cache %2, 0($1) \n" /* Invalidate this index */
- " cache %2, (1<<13)($1)\n" /* Invalidate this index */
- " cache %2, (2<<13)($1)\n" /* Invalidate this index */
- " cache %2, (3<<13)($1)\n" /* Invalidate this index */
- " daddiu %1, %1, -1 \n" /* Decrement loop count */
- " bnez %1, 1b \n" /* loop test */
- " daddu $1, $1, %0 \n" /* Next address */
- ".set pop \n"
- :
- : "r" (dcache_line_size), "r" (dcache_sets),
- "i" (Index_Writeback_Inv_D));
-}
-
-/*
- * Writeback and invalidate a range of the dcache. The addresses are
- * virtual, and since we're using index ops and bit 12 is part of both
- * the virtual frame and physical index, we have to clear both sets
- * (bit 12 set and cleared).
- */
-static inline void __sb1_writeback_inv_dcache_range(unsigned long start,
- unsigned long end)
-{
- __asm__ __volatile__ (
- " .set push \n"
- " .set noreorder \n"
- " .set noat \n"
- " .set mips4 \n"
- " and $1, %0, %3 \n" /* mask non-index bits */
- "1: cache %4, (0<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-WB-inval this address */
- " xori $1, $1, 1<<12 \n"
- " cache %4, (0<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-WB-inval this address */
- " daddu %0, %0, %2 \n" /* next line */
- " bne %0, %1, 1b \n" /* loop test */
- " and $1, %0, %3 \n" /* mask non-index bits */
- " sync \n"
- " .set pop \n"
- :
- : "r" (start & ~(dcache_line_size - 1)),
- "r" ((end + dcache_line_size - 1) & ~(dcache_line_size - 1)),
- "r" (dcache_line_size),
- "r" (dcache_index_mask),
- "i" (Index_Writeback_Inv_D));
-}
-
-/*
- * Writeback and invalidate a range of the dcache. With physical
- * addresseses, we don't have to worry about possible bit 12 aliasing.
- * XXXKW is it worth turning on KX and using hit ops with xkphys?
- */
-static inline void __sb1_writeback_inv_dcache_phys_range(unsigned long start,
- unsigned long end)
-{
- __asm__ __volatile__ (
- " .set push \n"
- " .set noreorder \n"
- " .set noat \n"
- " .set mips4 \n"
- " and $1, %0, %3 \n" /* mask non-index bits */
- "1: cache %4, (0<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-WB-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-WB-inval this address */
- " daddu %0, %0, %2 \n" /* next line */
- " bne %0, %1, 1b \n" /* loop test */
- " and $1, %0, %3 \n" /* mask non-index bits */
- " sync \n"
- " .set pop \n"
- :
- : "r" (start & ~(dcache_line_size - 1)),
- "r" ((end + dcache_line_size - 1) & ~(dcache_line_size - 1)),
- "r" (dcache_line_size),
- "r" (dcache_index_mask),
- "i" (Index_Writeback_Inv_D));
-}
-
-
-/*
- * Invalidate the entire icache
- */
-static inline void __sb1_flush_icache_all(void)
-{
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " move $1, $0 \n" /* Start at index 0 */
- "1: cache %2, 0($1) \n" /* Invalidate this index */
- " cache %2, (1<<13)($1)\n" /* Invalidate this index */
- " cache %2, (2<<13)($1)\n" /* Invalidate this index */
- " cache %2, (3<<13)($1)\n" /* Invalidate this index */
- " daddiu %1, %1, -1 \n" /* Decrement loop count */
- " bnez %1, 1b \n" /* loop test */
- " daddu $1, $1, %0 \n" /* Next address */
- " bnezl $0, 2f \n" /* Force mispredict */
- " nop \n"
- "2: sync \n"
- ".set pop \n"
- :
- : "r" (icache_line_size), "r" (icache_sets),
- "i" (Index_Invalidate_I));
-}
-
-/*
- * Flush the icache for a given physical page. Need to writeback the
- * dcache first, then invalidate the icache. If the page isn't
- * executable, nothing is required.
- */
-static void local_sb1_flush_cache_page(struct vm_area_struct *vma,
- unsigned long addr)
-{
- int cpu = smp_processor_id();
-
-#ifndef CONFIG_SMP
- if (!(vma->vm_flags & VM_EXEC))
- return;
-#endif
-
- __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
-
- /*
- * Bumping the ASID is probably cheaper than the flush ...
- */
- if (cpu_context(cpu, vma->vm_mm) != 0)
- drop_mmu_context(vma->vm_mm, cpu);
-}
-
-#ifdef CONFIG_SMP
-struct flush_cache_page_args {
- struct vm_area_struct *vma;
- unsigned long addr;
-};
-
-static void sb1_flush_cache_page_ipi(void *info)
-{
- struct flush_cache_page_args *args = info;
-
- local_sb1_flush_cache_page(args->vma, args->addr);
-}
-
-/* Dirty dcache could be on another CPU, so do the IPIs */
-static void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr)
-{
- struct flush_cache_page_args args;
-
- if (!(vma->vm_flags & VM_EXEC))
- return;
-
- args.vma = vma;
- args.addr = addr;
- on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
-}
-#else
-void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr);
-asm("sb1_flush_cache_page = local_sb1_flush_cache_page");
-#endif
-
-/*
- * Invalidate a range of the icache. The addresses are virtual, and
- * the cache is virtually indexed and tagged. However, we don't
- * necessarily have the right ASID context, so use index ops instead
- * of hit ops.
- */
-static inline void __sb1_flush_icache_range(unsigned long start,
- unsigned long end)
-{
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " and $1, %0, %3 \n" /* mask non-index bits */
- "1: cache %4, (0<<13)($1) \n" /* Index-inval this address */
- " cache %4, (1<<13)($1) \n" /* Index-inval this address */
- " cache %4, (2<<13)($1) \n" /* Index-inval this address */
- " cache %4, (3<<13)($1) \n" /* Index-inval this address */
- " daddu %0, %0, %2 \n" /* next line */
- " bne %0, %1, 1b \n" /* loop test */
- " and $1, %0, %3 \n" /* mask non-index bits */
- " bnezl $0, 2f \n" /* Force mispredict */
- " nop \n"
- "2: sync \n"
- ".set pop \n"
- :
- : "r" (start & ~(icache_line_size - 1)),
- "r" ((end + icache_line_size - 1) & ~(icache_line_size - 1)),
- "r" (icache_line_size),
- "r" (icache_index_mask),
- "i" (Index_Invalidate_I));
-}
-
-
-/*
- * Invalidate all caches on this CPU
- */
-static void local_sb1___flush_cache_all(void)
-{
- __sb1_writeback_inv_dcache_all();
- __sb1_flush_icache_all();
-}
-
-#ifdef CONFIG_SMP
-extern void sb1___flush_cache_all_ipi(void *ignored);
-asm("sb1___flush_cache_all_ipi = local_sb1___flush_cache_all");
-
-static void sb1___flush_cache_all(void)
-{
- on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
-}
-#else
-extern void sb1___flush_cache_all(void);
-asm("sb1___flush_cache_all = local_sb1___flush_cache_all");
-#endif
-
-/*
- * When flushing a range in the icache, we have to first writeback
- * the dcache for the same range, so new ifetches will see any
- * data that was dirty in the dcache.
- *
- * The start/end arguments are Kseg addresses (possibly mapped Kseg).
- */
-
-static void local_sb1_flush_icache_range(unsigned long start,
- unsigned long end)
-{
- /* Just wb-inv the whole dcache if the range is big enough */
- if ((end - start) > dcache_range_cutoff)
- __sb1_writeback_inv_dcache_all();
- else
- __sb1_writeback_inv_dcache_range(start, end);
-
- /* Just flush the whole icache if the range is big enough */
- if ((end - start) > icache_range_cutoff)
- __sb1_flush_icache_all();
- else
- __sb1_flush_icache_range(start, end);
-}
-
-#ifdef CONFIG_SMP
-struct flush_icache_range_args {
- unsigned long start;
- unsigned long end;
-};
-
-static void sb1_flush_icache_range_ipi(void *info)
-{
- struct flush_icache_range_args *args = info;
-
- local_sb1_flush_icache_range(args->start, args->end);
-}
-
-void sb1_flush_icache_range(unsigned long start, unsigned long end)
-{
- struct flush_icache_range_args args;
-
- args.start = start;
- args.end = end;
- on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
-}
-#else
-void sb1_flush_icache_range(unsigned long start, unsigned long end);
-asm("sb1_flush_icache_range = local_sb1_flush_icache_range");
-#endif
-
-/*
- * Flush the icache for a given physical page. Need to writeback the
- * dcache first, then invalidate the icache. If the page isn't
- * executable, nothing is required.
- */
-static void local_sb1_flush_icache_page(struct vm_area_struct *vma,
- struct page *page)
-{
- unsigned long start;
- int cpu = smp_processor_id();
-
-#ifndef CONFIG_SMP
- if (!(vma->vm_flags & VM_EXEC))
- return;
-#endif
-
- /* Need to writeback any dirty data for that page, we have the PA */
- start = (unsigned long)(page-mem_map) << PAGE_SHIFT;
- __sb1_writeback_inv_dcache_phys_range(start, start + PAGE_SIZE);
- /*
- * If there's a context, bump the ASID (cheaper than a flush,
- * since we don't know VAs!)
- */
- if (cpu_context(cpu, vma->vm_mm) != 0) {
- drop_mmu_context(vma->vm_mm, cpu);
- }
-}
-
-#ifdef CONFIG_SMP
-struct flush_icache_page_args {
- struct vm_area_struct *vma;
- struct page *page;
-};
-
-static void sb1_flush_icache_page_ipi(void *info)
-{
- struct flush_icache_page_args *args = info;
- local_sb1_flush_icache_page(args->vma, args->page);
-}
-
-/* Dirty dcache could be on another CPU, so do the IPIs */
-static void sb1_flush_icache_page(struct vm_area_struct *vma,
- struct page *page)
-{
- struct flush_icache_page_args args;
-
- if (!(vma->vm_flags & VM_EXEC))
- return;
- args.vma = vma;
- args.page = page;
- on_each_cpu(sb1_flush_icache_page_ipi, (void *) &args, 1, 1);
-}
-#else
-void sb1_flush_icache_page(struct vm_area_struct *vma, struct page *page);
-asm("sb1_flush_icache_page = local_sb1_flush_icache_page");
-#endif
-
-/*
- * A signal trampoline must fit into a single cacheline.
- */
-static void local_sb1_flush_cache_sigtramp(unsigned long addr)
-{
- __asm__ __volatile__ (
- " .set push \n"
- " .set noreorder \n"
- " .set noat \n"
- " .set mips4 \n"
- " cache %2, (0<<13)(%0) \n" /* Index-inval this address */
- " cache %2, (1<<13)(%0) \n" /* Index-inval this address */
- " cache %2, (2<<13)(%0) \n" /* Index-inval this address */
- " cache %2, (3<<13)(%0) \n" /* Index-inval this address */
- " xori $1, %0, 1<<12 \n" /* Flip index bit 12 */
- " cache %2, (0<<13)($1) \n" /* Index-inval this address */
- " cache %2, (1<<13)($1) \n" /* Index-inval this address */
- " cache %2, (2<<13)($1) \n" /* Index-inval this address */
- " cache %2, (3<<13)($1) \n" /* Index-inval this address */
- " cache %3, (0<<13)(%1) \n" /* Index-inval this address */
- " cache %3, (1<<13)(%1) \n" /* Index-inval this address */
- " cache %3, (2<<13)(%1) \n" /* Index-inval this address */
- " cache %3, (3<<13)(%1) \n" /* Index-inval this address */
- " bnezl $0, 1f \n" /* Force mispredict */
- " nop \n"
- "1: \n"
- " .set pop \n"
- :
- : "r" (addr & dcache_index_mask), "r" (addr & icache_index_mask),
- "i" (Index_Writeback_Inv_D), "i" (Index_Invalidate_I));
-}
-
-#ifdef CONFIG_SMP
-static void sb1_flush_cache_sigtramp_ipi(void *info)
-{
- unsigned long iaddr = (unsigned long) info;
- local_sb1_flush_cache_sigtramp(iaddr);
-}
-
-static void sb1_flush_cache_sigtramp(unsigned long addr)
-{
- on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
-}
-#else
-void sb1_flush_cache_sigtramp(unsigned long addr);
-asm("sb1_flush_cache_sigtramp = local_sb1_flush_cache_sigtramp");
-#endif
-
-
-/*
- * Anything that just flushes dcache state can be ignored, as we're always
- * coherent in dcache space. This is just a dummy function that all the
- * nop'ed routines point to
- */
-static void sb1_nop(void)
-{
-}
-
-/*
- * Cache set values (from the mips64 spec)
- * 0 - 64
- * 1 - 128
- * 2 - 256
- * 3 - 512
- * 4 - 1024
- * 5 - 2048
- * 6 - 4096
- * 7 - Reserved
- */
-
-static unsigned int decode_cache_sets(unsigned int config_field)
-{
- if (config_field == 7) {
- /* JDCXXX - Find a graceful way to abort. */
- return 0;
- }
- return (1<<(config_field + 6));
-}
-
-/*
- * Cache line size values (from the mips64 spec)
- * 0 - No cache present.
- * 1 - 4 bytes
- * 2 - 8 bytes
- * 3 - 16 bytes
- * 4 - 32 bytes
- * 5 - 64 bytes
- * 6 - 128 bytes
- * 7 - Reserved
- */
-
-static unsigned int decode_cache_line_size(unsigned int config_field)
-{
- if (config_field == 0) {
- return 0;
- } else if (config_field == 7) {
- /* JDCXXX - Find a graceful way to abort. */
- return 0;
- }
- return (1<<(config_field + 1));
-}
-
-/*
- * Relevant bits of the config1 register format (from the MIPS32/MIPS64 specs)
- *
- * 24:22 Icache sets per way
- * 21:19 Icache line size
- * 18:16 Icache Associativity
- * 15:13 Dcache sets per way
- * 12:10 Dcache line size
- * 9:7 Dcache Associativity
- */
-
-static __init void probe_cache_sizes(void)
-{
- u32 config1;
-
- config1 = read_c0_config1();
- icache_line_size = decode_cache_line_size((config1 >> 19) & 0x7);
- dcache_line_size = decode_cache_line_size((config1 >> 10) & 0x7);
- icache_sets = decode_cache_sets((config1 >> 22) & 0x7);
- dcache_sets = decode_cache_sets((config1 >> 13) & 0x7);
- icache_assoc = ((config1 >> 16) & 0x7) + 1;
- dcache_assoc = ((config1 >> 7) & 0x7) + 1;
- icache_size = icache_line_size * icache_sets * icache_assoc;
- dcache_size = dcache_line_size * dcache_sets * dcache_assoc;
- /* Need to remove non-index bits for index ops */
- icache_index_mask = (icache_sets - 1) * icache_line_size;
- dcache_index_mask = (dcache_sets - 1) * dcache_line_size;
- /*
- * These are for choosing range (index ops) versus all.
- * icache flushes all ways for each set, so drop icache_assoc.
- * dcache flushes all ways and each setting of bit 12 for each
- * index, so drop dcache_assoc and halve the dcache_sets.
- */
- icache_range_cutoff = icache_sets * icache_line_size;
- dcache_range_cutoff = (dcache_sets / 2) * icache_line_size;
-}
-
-/*
- * This is called from loadmmu.c. We have to set up all the
- * memory management function pointers, as well as initialize
- * the caches and tlbs
- */
-void ld_mmu_sb1(void)
-{
- extern char except_vec2_sb1;
- unsigned long temp;
-
- /* Special cache error handler for SB1 */
- memcpy((void *)(KSEG0 + 0x100), &except_vec2_sb1, 0x80);
- memcpy((void *)(KSEG1 + 0x100), &except_vec2_sb1, 0x80);
-
- probe_cache_sizes();
-
- _clear_page = sb1_clear_page;
- _copy_page = sb1_copy_page;
-
- /*
- * None of these are needed for the SB1 - the Dcache is
- * physically indexed and tagged, so no virtual aliasing can
- * occur
- */
- flush_cache_range = (void *) sb1_nop;
- flush_cache_page = sb1_flush_cache_page;
- flush_cache_mm = (void (*)(struct mm_struct *))sb1_nop;
- flush_cache_all = sb1_nop;
-
- /* These routines are for Icache coherence with the Dcache */
- flush_icache_range = sb1_flush_icache_range;
- flush_icache_page = sb1_flush_icache_page;
- flush_icache_all = __sb1_flush_icache_all; /* local only */
-
- flush_cache_sigtramp = sb1_flush_cache_sigtramp;
- flush_data_cache_page = (void *) sb1_nop;
-
- /* Full flush */
- __flush_cache_all = sb1___flush_cache_all;
-
- change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
- /*
- * This is the only way to force the update of K0 to complete
- * before subsequent instruction fetch.
- */
- __asm__ __volatile__ (
- " .set push \n"
- " .set mips4 \n"
- " dla %0, 1f \n"
- " dmtc0 %0, $14 \n"
- " eret \n"
- "1: .set pop \n"
- : "=r" (temp));
- flush_cache_all();
-}
diff -Nru a/arch/mips64/mm/cache.c b/arch/mips64/mm/cache.c
--- a/arch/mips64/mm/cache.c Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,60 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2003 by Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-#include <asm/cacheflush.h>
-
-asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
-{
- /* This should flush more selectivly ... */
- __flush_cache_all();
-
- return 0;
-}
-
-void flush_dcache_page(struct page *page)
-{
- unsigned long addr;
-
- if (page->mapping &&
- list_empty(&page->mapping->i_mmap) &&
- list_empty(&page->mapping->i_mmap_shared)) {
- SetPageDcacheDirty(page);
-
- return;
- }
-
- /*
- * We could delay the flush for the !page->mapping case too. But that
- * case is for exec env/arg pages and those are %99 certainly going to
- * get faulted into the tlb (and thus flushed) anyways.
- */
- addr = (unsigned long) page_address(page);
- flush_data_cache_page(addr);
-}
-
-void __update_cache(struct vm_area_struct *vma, unsigned long address,
- pte_t pte)
-{
- struct page *page;
- unsigned long pfn, addr;
-
- pfn = pte_pfn(pte);
- if (pfn_valid(pfn) && (page = pfn_to_page(pfn), page->mapping) &&
- Page_dcache_dirty(page)) {
- if (pages_do_alias((unsigned long)page_address(page),
- address & PAGE_MASK)) {
- addr = (unsigned long) page_address(page);
- flush_data_cache_page(addr);
- }
-
- ClearPageDcacheDirty(page);
- }
-}
diff -Nru a/arch/mips64/mm/cerr-sb1.c b/arch/mips64/mm/cerr-sb1.c
--- a/arch/mips64/mm/cerr-sb1.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,542 +0,0 @@
-/*
- * Copyright (C) 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#include <linux/sched.h>
-#include <asm/mipsregs.h>
-#include <asm/sibyte/sb1250.h>
-
-#ifndef CONFIG_SIBYTE_BUS_WATCHER
-#include <asm/io.h>
-#include <asm/sibyte/sb1250_regs.h>
-#include <asm/sibyte/sb1250_scd.h>
-#include <asm/sibyte/64bit.h>
-#endif
-
-/* SB1 definitions */
-
-/* XXX should come from config1 XXX */
-#define SB1_CACHE_INDEX_MASK 0x1fe0
-
-#define CP0_ERRCTL_RECOVERABLE (1 << 31)
-#define CP0_ERRCTL_DCACHE (1 << 30)
-#define CP0_ERRCTL_ICACHE (1 << 29)
-#define CP0_ERRCTL_MULTIBUS (1 << 23)
-#define CP0_ERRCTL_MC_TLB (1 << 15)
-#define CP0_ERRCTL_MC_TIMEOUT (1 << 14)
-
-#define CP0_CERRI_TAG_PARITY (1 << 29)
-#define CP0_CERRI_DATA_PARITY (1 << 28)
-#define CP0_CERRI_EXTERNAL (1 << 26)
-
-#define CP0_CERRI_IDX_VALID(c) (!((c) & CP0_CERRI_EXTERNAL))
-#define CP0_CERRI_DATA (CP0_CERRI_DATA_PARITY)
-
-#define CP0_CERRD_MULTIPLE (1 << 31)
-#define CP0_CERRD_TAG_STATE (1 << 30)
-#define CP0_CERRD_TAG_ADDRESS (1 << 29)
-#define CP0_CERRD_DATA_SBE (1 << 28)
-#define CP0_CERRD_DATA_DBE (1 << 27)
-#define CP0_CERRD_EXTERNAL (1 << 26)
-#define CP0_CERRD_LOAD (1 << 25)
-#define CP0_CERRD_STORE (1 << 24)
-#define CP0_CERRD_FILLWB (1 << 23)
-#define CP0_CERRD_COHERENCY (1 << 22)
-#define CP0_CERRD_DUPTAG (1 << 21)
-
-#define CP0_CERRD_DPA_VALID(c) (!((c) & CP0_CERRD_EXTERNAL))
-#define CP0_CERRD_IDX_VALID(c) \
- (((c) & (CP0_CERRD_LOAD | CP0_CERRD_STORE)) ? (!((c) & CP0_CERRD_EXTERNAL)) : 0)
-#define CP0_CERRD_CAUSES \
- (CP0_CERRD_LOAD | CP0_CERRD_STORE | CP0_CERRD_FILLWB | CP0_CERRD_COHERENCY | CP0_CERRD_DUPTAG)
-#define CP0_CERRD_TYPES \
- (CP0_CERRD_TAG_STATE | CP0_CERRD_TAG_ADDRESS | CP0_CERRD_DATA_SBE | CP0_CERRD_DATA_DBE | CP0_CERRD_EXTERNAL)
-#define CP0_CERRD_DATA (CP0_CERRD_DATA_SBE | CP0_CERRD_DATA_DBE)
-
-static uint32_t extract_ic(unsigned short addr, int data);
-static uint32_t extract_dc(unsigned short addr, int data);
-
-static inline void breakout_errctl(unsigned int val)
-{
- if (val & CP0_ERRCTL_RECOVERABLE)
- prom_printf(" recoverable");
- if (val & CP0_ERRCTL_DCACHE)
- prom_printf(" dcache");
- if (val & CP0_ERRCTL_ICACHE)
- prom_printf(" icache");
- if (val & CP0_ERRCTL_MULTIBUS)
- prom_printf(" multiple-buserr");
- prom_printf("\n");
-}
-
-static inline void breakout_cerri(unsigned int val)
-{
- if (val & CP0_CERRI_TAG_PARITY)
- prom_printf(" tag-parity");
- if (val & CP0_CERRI_DATA_PARITY)
- prom_printf(" data-parity");
- if (val & CP0_CERRI_EXTERNAL)
- prom_printf(" external");
- prom_printf("\n");
-}
-
-static inline void breakout_cerrd(unsigned int val)
-{
- switch (val & CP0_CERRD_CAUSES) {
- case CP0_CERRD_LOAD:
- prom_printf(" load,");
- break;
- case CP0_CERRD_STORE:
- prom_printf(" store,");
- break;
- case CP0_CERRD_FILLWB:
- prom_printf(" fill/wb,");
- break;
- case CP0_CERRD_COHERENCY:
- prom_printf(" coherency,");
- break;
- case CP0_CERRD_DUPTAG:
- prom_printf(" duptags,");
- break;
- default:
- prom_printf(" NO CAUSE,");
- break;
- }
- if (!(val & CP0_CERRD_TYPES))
- prom_printf(" NO TYPE");
- else {
- if (val & CP0_CERRD_MULTIPLE)
- prom_printf(" multi-err");
- if (val & CP0_CERRD_TAG_STATE)
- prom_printf(" tag-state");
- if (val & CP0_CERRD_TAG_ADDRESS)
- prom_printf(" tag-address");
- if (val & CP0_CERRD_DATA_SBE)
- prom_printf(" data-SBE");
- if (val & CP0_CERRD_DATA_DBE)
- prom_printf(" data-DBE");
- if (val & CP0_CERRD_EXTERNAL)
- prom_printf(" external");
- }
- prom_printf("\n");
-}
-
-#ifndef CONFIG_SIBYTE_BUS_WATCHER
-
-static void check_bus_watcher(void)
-{
- uint32_t status, l2_err, memio_err;
-
- /* Destructive read, clears register and interrupt */
- status = csr_in32(IO_SPACE_BASE | A_SCD_BUS_ERR_STATUS);
- /* Bit 31 is always on, but there's no #define for that */
- if (status & ~(1UL << 31)) {
- l2_err = csr_in32(IO_SPACE_BASE | A_BUS_L2_ERRORS);
- memio_err = csr_in32(IO_SPACE_BASE | A_BUS_MEM_IO_ERRORS);
- prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
- prom_printf("\nLast recorded signature:\n");
- prom_printf("Request %02x from %d, answered by %d with Dcode %d\n",
- (unsigned int)(G_SCD_BERR_TID(status) & 0x3f),
- (int)(G_SCD_BERR_TID(status) >> 6),
- (int)G_SCD_BERR_RID(status),
- (int)G_SCD_BERR_DCODE(status));
- } else {
- prom_printf("Bus watcher indicates no error\n");
- }
-}
-#else
-extern void check_bus_watcher(void);
-#endif
-
-asmlinkage void sb1_cache_error(void)
-{
- uint64_t cerr_dpa;
- uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res;
-
- prom_printf("Cache error exception on CPU %x:\n",
- (read_c0_prid() >> 25) & 0x7);
-
- __asm__ __volatile__ (
- " .set push\n\t"
- " .set mips64\n\t"
- " .set noat\n\t"
- " mfc0 %0, $26\n\t"
- " mfc0 %1, $27\n\t"
- " mfc0 %2, $27, 1\n\t"
- " dmfc0 $1, $27, 3\n\t"
- " dsrl32 %3, $1, 0 \n\t"
- " sll %4, $1, 0 \n\t"
- " mfc0 %5, $30\n\t"
- " .set pop"
- : "=r" (errctl), "=r" (cerr_i), "=r" (cerr_d),
- "=r" (dpahi), "=r" (dpalo), "=r" (eepc));
-
- cerr_dpa = (((uint64_t)dpahi) << 32) | dpalo;
- prom_printf(" c0_errorepc == %08x\n", eepc);
- prom_printf(" c0_errctl == %08x", errctl);
- breakout_errctl(errctl);
- if (errctl & CP0_ERRCTL_ICACHE) {
- prom_printf(" c0_cerr_i == %08x", cerr_i);
- breakout_cerri(cerr_i);
- if (CP0_CERRI_IDX_VALID(cerr_i)) {
- if ((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK))
- prom_printf(" cerr_i idx doesn't match eepc\n");
- else {
- res = extract_ic(cerr_i & SB1_CACHE_INDEX_MASK,
- (cerr_i & CP0_CERRI_DATA) != 0);
- if (!(res & cerr_i))
- prom_printf("...didn't see indicated icache problem\n");
- }
- }
- }
- if (errctl & CP0_ERRCTL_DCACHE) {
- prom_printf(" c0_cerr_d == %08x", cerr_d);
- breakout_cerrd(cerr_d);
- if (CP0_CERRD_DPA_VALID(cerr_d)) {
- prom_printf(" c0_cerr_dpa == %010llx\n", cerr_dpa);
- if (!CP0_CERRD_IDX_VALID(cerr_d)) {
- res = extract_dc(cerr_dpa & SB1_CACHE_INDEX_MASK,
- (cerr_d & CP0_CERRD_DATA) != 0);
- if (!(res & cerr_d))
- prom_printf("...didn't see indicated dcache problem\n");
- } else {
- if ((cerr_dpa & SB1_CACHE_INDEX_MASK) != (cerr_d & SB1_CACHE_INDEX_MASK))
- prom_printf(" cerr_d idx doesn't match cerr_dpa\n");
- else {
- res = extract_dc(cerr_d & SB1_CACHE_INDEX_MASK,
- (cerr_d & CP0_CERRD_DATA) != 0);
- if (!(res & cerr_d))
- prom_printf("...didn't see indicated problem\n");
- }
- }
- }
- }
-
- check_bus_watcher();
-
- while (1);
- /*
- * This tends to make things get really ugly; let's just stall instead.
- * panic("Can't handle the cache error!");
- */
-}
-
-
-/* Parity lookup table. */
-static const uint8_t parity[256] = {
- 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
- 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
- 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
- 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
- 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
- 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
- 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
- 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0
-};
-
-/* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
-static const uint64_t mask_72_64[8] = {
- 0x0738C808099264FFL,
- 0x38C808099264FF07L,
- 0xC808099264FF0738L,
- 0x08099264FF0738C8L,
- 0x099264FF0738C808L,
- 0x9264FF0738C80809L,
- 0x64FF0738C8080992L,
- 0xFF0738C808099264L
-};
-
-/* Calculate the parity on a range of bits */
-static char range_parity(uint64_t dword, int max, int min)
-{
- char parity = 0;
- int i;
- dword >>= min;
- for (i=max-min; i>=0; i--) {
- if (dword & 0x1)
- parity = !parity;
- dword >>= 1;
- }
- return parity;
-}
-
-/* Calculate the 4-bit even byte-parity for an instruction */
-static unsigned char inst_parity(uint32_t word)
-{
- int i, j;
- char parity = 0;
- for (j=0; j<4; j++) {
- char byte_parity = 0;
- for (i=0; i<8; i++) {
- if (word & 0x80000000)
- byte_parity = !byte_parity;
- word <<= 1;
- }
- parity <<= 1;
- parity |= byte_parity;
- }
- return parity;
-}
-
-static uint32_t extract_ic(unsigned short addr, int data)
-{
- unsigned short way;
- int valid;
- uint64_t taglo, va, tlo_tmp;
- uint32_t taghi, taglolo, taglohi;
- uint8_t lru;
- int res = 0;
-
- prom_printf("Icache index 0x%04x ", addr);
- for (way = 0; way < 4; way++) {
- /* Index-load-tag-I */
- __asm__ __volatile__ (
- " .set push \n\t"
- " .set noreorder \n\t"
- " .set mips64 \n\t"
- " .set noat \n\t"
- " cache 4, 0(%3) \n\t"
- " mfc0 %0, $29 \n\t"
- " dmfc0 $1, $28 \n\t"
- " dsrl32 %1, $1, 0 \n\t"
- " sll %2, $1, 0 \n\t"
- " .set pop"
- : "=r" (taghi), "=r" (taglohi), "=r" (taglolo)
- : "r" ((way << 13) | addr));
-
- taglo = ((unsigned long long)taglohi << 32) | taglolo;
- if (way == 0) {
- lru = (taghi >> 14) & 0xff;
- prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
- ((addr >> 5) & 0x3), /* bank */
- ((addr >> 7) & 0x3f), /* index */
- (lru & 0x3),
- ((lru >> 2) & 0x3),
- ((lru >> 4) & 0x3),
- ((lru >> 6) & 0x3));
- }
- va = (taglo & 0xC0000FFFFFFFE000) | addr;
- if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
- va |= 0x3FFFF00000000000;
- valid = ((taghi >> 29) & 1);
- if (valid) {
- tlo_tmp = taglo & 0xfff3ff;
- if (((taglo >> 10) & 1) ^ range_parity(tlo_tmp, 23, 0)) {
- prom_printf(" ** bad parity in VTag0/G/ASID\n");
- res |= CP0_CERRI_TAG_PARITY;
- }
- if (((taglo >> 11) & 1) ^ range_parity(taglo, 63, 24)) {
- prom_printf(" ** bad parity in R/VTag1\n");
- res |= CP0_CERRI_TAG_PARITY;
- }
- }
- if (valid ^ ((taghi >> 27) & 1)) {
- prom_printf(" ** bad parity for valid bit\n");
- res |= CP0_CERRI_TAG_PARITY;
- }
- prom_printf(" %d [VA %016llx] [Vld? %d] raw tags: %08X-%016llX\n",
- way, va, valid, taghi, taglo);
-
- if (data) {
- uint32_t datahi, insta, instb;
- uint8_t predecode;
- int offset;
-
- /* (hit all banks and ways) */
- for (offset = 0; offset < 4; offset++) {
- /* Index-load-data-I */
- __asm__ __volatile__ (
- " .set push\n\t"
- " .set noreorder\n\t"
- " .set mips64\n\t"
- " .set noat\n\t"
- " cache 6, 0(%3) \n\t"
- " mfc0 %0, $29, 1\n\t"
- " dmfc0 $1, $28, 1\n\t"
- " dsrl32 %1, $1, 0 \n\t"
- " sll %2, $1, 0 \n\t"
- " .set pop \n"
- : "=r" (datahi), "=r" (insta), "=r" (instb)
- : "r" ((way << 13) | addr | (offset << 3)));
- predecode = (datahi >> 8) & 0xff;
- if (((datahi >> 16) & 1) != (uint32_t)range_parity(predecode, 7, 0)) {
- prom_printf(" ** bad parity in predecode\n");
- res |= CP0_CERRI_DATA_PARITY;
- }
- /* XXXKW should/could check predecode bits themselves */
- if (((datahi >> 4) & 0xf) ^ inst_parity(insta)) {
- prom_printf(" ** bad parity in instruction a\n");
- res |= CP0_CERRI_DATA_PARITY;
- }
- if ((datahi & 0xf) ^ inst_parity(instb)) {
- prom_printf(" ** bad parity in instruction b\n");
- res |= CP0_CERRI_DATA_PARITY;
- }
- prom_printf(" %05X-%08X%08X", datahi, insta, instb);
- }
- prom_printf("\n");
- }
- }
- return res;
-}
-
-/* Compute the ECC for a data doubleword */
-static uint8_t dc_ecc(uint64_t dword)
-{
- uint64_t t;
- uint32_t w;
- uint8_t p;
- int i;
-
- p = 0;
- for (i = 7; i >= 0; i--)
- {
- p <<= 1;
- t = dword & mask_72_64[i];
- w = (uint32_t)(t >> 32);
- p ^= (parity[w>>24] ^ parity[(w>>16) & 0xFF]
- ^ parity[(w>>8) & 0xFF] ^ parity[w & 0xFF]);
- w = (uint32_t)(t & 0xFFFFFFFF);
- p ^= (parity[w>>24] ^ parity[(w>>16) & 0xFF]
- ^ parity[(w>>8) & 0xFF] ^ parity[w & 0xFF]);
- }
- return p;
-}
-
-struct dc_state {
- unsigned char val;
- char *name;
-};
-
-static struct dc_state dc_states[] = {
- { 0x00, "INVALID" },
- { 0x0f, "COH-SHD" },
- { 0x13, "NCO-E-C" },
- { 0x19, "NCO-E-D" },
- { 0x16, "COH-E-C" },
- { 0x1c, "COH-E-D" },
- { 0xff, "*ERROR*" }
-};
-
-#define DC_TAG_VALID(state) \
- (((state) == 0xf) || ((state) == 0x13) || ((state) == 0x19) || ((state == 0x16)) || ((state) == 0x1c))
-
-static char *dc_state_str(unsigned char state)
-{
- struct dc_state *dsc = dc_states;
- while (dsc->val != 0xff) {
- if (dsc->val == state)
- break;
- dsc++;
- }
- return dsc->name;
-}
-
-static uint32_t extract_dc(unsigned short addr, int data)
-{
- int valid, way;
- unsigned char state;
- uint64_t taglo, pa;
- uint32_t taghi, taglolo, taglohi;
- uint8_t ecc, lru;
- int res = 0;
-
- prom_printf("Dcache index 0x%04x ", addr);
- for (way = 0; way < 4; way++) {
- __asm__ __volatile__ (
- " .set push\n\t"
- " .set noreorder\n\t"
- " .set mips64\n\t"
- " .set noat\n\t"
- " cache 5, 0(%3)\n\t" /* Index-load-tag-D */
- " mfc0 %0, $29, 2\n\t"
- " dmfc0 $1, $28, 2\n\t"
- " dsrl32 %1, $1, 0\n\t"
- " sll %2, $1, 0\n\t"
- " .set pop"
- : "=r" (taghi), "=r" (taglohi), "=r" (taglolo)
- : "r" ((way << 13) | addr));
-
- taglo = ((unsigned long long)taglohi << 32) | taglolo;
- pa = (taglo & 0xFFFFFFE000) | addr;
- if (way == 0) {
- lru = (taghi >> 14) & 0xff;
- prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
- ((addr >> 11) & 0x2) | ((addr >> 5) & 1), /* bank */
- ((addr >> 6) & 0x3f), /* index */
- (lru & 0x3),
- ((lru >> 2) & 0x3),
- ((lru >> 4) & 0x3),
- ((lru >> 6) & 0x3));
- }
- state = (taghi >> 25) & 0x1f;
- valid = DC_TAG_VALID(state);
- prom_printf(" %d [PA %010llx] [state %s (%02x)] raw tags: %08X-%016llX\n",
- way, pa, dc_state_str(state), state, taghi, taglo);
- if (valid) {
- if (((taglo >> 11) & 1) ^ range_parity(taglo, 39, 26)) {
- prom_printf(" ** bad parity in PTag1\n");
- res |= CP0_CERRD_TAG_ADDRESS;
- }
- if (((taglo >> 10) & 1) ^ range_parity(taglo, 25, 13)) {
- prom_printf(" ** bad parity in PTag0\n");
- res |= CP0_CERRD_TAG_ADDRESS;
- }
- } else {
- res |= CP0_CERRD_TAG_STATE;
- }
-
- if (data) {
- uint64_t datalo;
- uint32_t datalohi, datalolo, datahi;
- int offset;
-
- for (offset = 0; offset < 4; offset++) {
- /* Index-load-data-D */
- __asm__ __volatile__ (
- " .set push\n\t"
- " .set noreorder\n\t"
- " .set mips64\n\t"
- " .set noat\n\t"
- " cache 7, 0(%3)\n\t" /* Index-load-data-D */
- " mfc0 %0, $29, 3\n\t"
- " dmfc0 $1, $28, 3\n\t"
- " dsrl32 %1, $1, 0 \n\t"
- " sll %2, $1, 0 \n\t"
- " .set pop"
- : "=r" (datahi), "=r" (datalohi), "=r" (datalolo)
- : "r" ((way << 13) | addr | (offset << 3)));
- datalo = ((unsigned long long)datalohi << 32) | datalolo;
- ecc = dc_ecc(datalo);
- if (ecc != datahi) {
- int bits = 0;
- prom_printf(" ** bad ECC (%02x %02x) ->",
- datahi, ecc);
- ecc ^= datahi;
- while (ecc) {
- if (ecc & 1) bits++;
- ecc >>= 1;
- }
- res |= (bits == 1) ? CP0_CERRD_DATA_SBE : CP0_CERRD_DATA_DBE;
- }
- prom_printf(" %02X-%016llX", datahi, datalo);
- }
- prom_printf("\n");
- }
- }
- return res;
-}
diff -Nru a/arch/mips64/mm/cex-sb1.S b/arch/mips64/mm/cex-sb1.S
--- a/arch/mips64/mm/cex-sb1.S Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,83 +0,0 @@
-/*
- * Copyright (C) 2001,2002,2003 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/sibyte/board.h>
-
- .text
- .set noat
- .set mips4
-
- __INIT
-
- /* Cache Error handler for SB1 */
- LEAF(except_vec2_sb1)
- mfc0 k1, $26
- # check if error was recoverable
- bltz k1, leave_cerr
-#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
- # look for signature of spurious CErr
- lui k0, 0x4000
- bne k0, k1, 1f
- .word 0x401Bd801 # mfc0 k1, $27, 1
- lui k0, 0xffe0
- and k1, k0, k1
- lui k0, 0x0200
- beq k0, k1, leave_cerr
-1:
-#endif
- j handle_vec2_sb1
-
-leave_cerr:
- # clear/unlock the registers
- mtc0 zero, $26
- mtc0 zero, $27
- .word 0x4080d801 # mtc0 zero, $27, 1
- .word 0x4080d803 # mtc0 zero, $27, 3
- eret
- END(except_vec2_sb1)
-
- __FINIT
-
- LEAF(handle_vec2_sb1)
- mfc0 k0,CP0_CONFIG
- li k1,~CONF_CM_CMASK
- and k0,k0,k1
- ori k0,k0,CONF_CM_UNCACHED
- mtc0 k0,CP0_CONFIG
-
- SSNOP
- SSNOP
- SSNOP
- SSNOP
- bnezl $0, 1f
-1:
- mfc0 k0, CP0_STATUS
- sll k0, k0, 3 # check CU0 (kernel?)
- bltz k0, 2f
- get_saved_sp
- move sp, k1 # want Kseg SP (so uncached)
-2:
- j sb1_cache_error
-
- END(handle_vec2_sb1)
diff -Nru a/arch/mips64/mm/extable.c b/arch/mips64/mm/extable.c
--- a/arch/mips64/mm/extable.c Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,30 +0,0 @@
-/*
- * linux/arch/i386/mm/extable.c
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <asm/uaccess.h>
-
-/* Simple binary search */
-const struct exception_table_entry *
-search_extable(const struct exception_table_entry *first,
- const struct exception_table_entry *last,
- unsigned long value)
-{
- while (first <= last) {
- const struct exception_table_entry *mid;
- long diff;
-
- mid = (last - first) / 2 + first;
- diff = mid->insn - value;
- if (diff == 0)
- return mid;
- else if (diff < 0)
- first = mid+1;
- else
- last = mid-1;
- }
- return NULL;
-}
diff -Nru a/arch/mips64/mm/fault.c b/arch/mips64/mm/fault.c
--- a/arch/mips64/mm/fault.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,246 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 - 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 by Silicon Graphics, Inc.
- */
-#include <linux/config.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/version.h>
-#include <linux/vt_kern.h> /* For unblank_screen() */
-#include <linux/module.h>
-
-#include <asm/branch.h>
-#include <asm/hardirq.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/system.h>
-#include <asm/uaccess.h>
-#include <asm/ptrace.h>
-
-#define development_version (LINUX_VERSION_CODE & 0x100)
-
-/*
- * Macro for exception fixup code to access integer registers.
- */
-#define dpf_reg(r) (regs->regs[r])
-
-/*
- * Unlock any spinlocks which will prevent us from getting the out
- */
-void bust_spinlocks(int yes)
-{
- int loglevel_save = console_loglevel;
-
- if (yes) {
- oops_in_progress = 1;
- return;
- }
-#ifdef CONFIG_VT
- unblank_screen();
-#endif
- oops_in_progress = 0;
- /*
- * OK, the message is on the console. Now we call printk()
- * without oops_in_progress set so that printk will give klogd
- * a poke. Hold onto your hats...
- */
- console_loglevel = 15; /* NMI oopser may have shut the console up */
- printk(" ");
- console_loglevel = loglevel_save;
-}
-
-/*
- * This routine handles page faults. It determines the address,
- * and the problem, and then passes it off to one of the appropriate
- * routines.
- */
-asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
- unsigned long address)
-{
- struct vm_area_struct * vma;
- struct task_struct *tsk = current;
- struct mm_struct *mm = tsk->mm;
- const struct exception_table_entry *fixup;
- siginfo_t info;
-
-#if 0
- printk("Cpu%d[%s:%d:%08lx:%ld:%08lx]\n", smp_processor_id(),
- current->comm, current->pid, address, write, regs->cp0_epc);
-#endif
-
- /*
- * We fault-in kernel-space virtual memory on-demand. The
- * 'reference' page table is init_mm.pgd.
- *
- * NOTE! We MUST NOT take any locks for this case. We may
- * be in an interrupt or a critical region, and should
- * only copy the information from the master page table,
- * nothing more.
- */
- if (address >= VMALLOC_START)
- goto vmalloc_fault;
-
- info.si_code = SEGV_MAPERR;
- /*
- * If we're in an interrupt or have no user
- * context, we must not take the fault..
- */
- if (in_atomic() || !mm)
- goto no_context;
-
- down_read(&mm->mmap_sem);
- vma = find_vma(mm, address);
- if (!vma)
- goto bad_area;
- if (vma->vm_start <= address)
- goto good_area;
- if (!(vma->vm_flags & VM_GROWSDOWN))
- goto bad_area;
- if (expand_stack(vma, address))
- goto bad_area;
-/*
- * Ok, we have a good vm_area for this memory access, so
- * we can handle it..
- */
-good_area:
- info.si_code = SEGV_ACCERR;
-
- if (write) {
- if (!(vma->vm_flags & VM_WRITE))
- goto bad_area;
- } else {
- if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
- goto bad_area;
- }
-
-survive:
- /*
- * If for any reason at all we couldn't handle the fault,
- * make sure we exit gracefully rather than endlessly redo
- * the fault.
- */
- switch (handle_mm_fault(mm, vma, address, write)) {
- case VM_FAULT_MINOR:
- tsk->min_flt++;
- break;
- case VM_FAULT_MAJOR:
- tsk->maj_flt++;
- break;
- case VM_FAULT_SIGBUS:
- goto do_sigbus;
- case VM_FAULT_OOM:
- goto out_of_memory;
- default:
- BUG();
- }
-
- up_read(&mm->mmap_sem);
- return;
-
-/*
- * Something tried to access memory that isn't in our memory map..
- * Fix it, but check if it's kernel or user first..
- */
-bad_area:
- up_read(&mm->mmap_sem);
-
- /* User mode accesses just cause a SIGSEGV */
- if (user_mode(regs)) {
- tsk->thread.cp0_badvaddr = address;
- tsk->thread.error_code = write;
-#if 0
- printk("do_page_fault() #2: sending SIGSEGV to %s for illegal %s\n"
- "%08lx (epc == %08lx, ra == %08lx)\n",
- tsk->comm,
- write ? "write access to" : "read access from",
- address,
- (unsigned long) regs->cp0_epc,
- (unsigned long) regs->regs[31]);
-#endif
- info.si_signo = SIGSEGV;
- info.si_errno = 0;
- /* info.si_code has been set above */
- info.si_addr = (void *) address;
- force_sig_info(SIGSEGV, &info, tsk);
- return;
- }
-
-no_context:
- /* Are we prepared to handle this kernel fault? */
- fixup = search_exception_tables(exception_epc(regs));
- if (fixup) {
- unsigned long new_epc = fixup->nextinsn;
-
- tsk->thread.cp0_baduaddr = address;
- if (development_version)
- printk(KERN_DEBUG "%s: Exception at [<%lx>] (%lx)\n",
- tsk->comm, regs->cp0_epc, new_epc);
- regs->cp0_epc = new_epc;
- return;
- }
-
- /*
- * Oops. The kernel tried to access some bad page. We'll have to
- * terminate things with extreme prejudice.
- */
-
- bust_spinlocks(1);
-
- printk(KERN_ALERT "Cpu %d Unable to handle kernel paging request at "
- "address %016lx, epc == %016lx, ra == %016lx\n",
- smp_processor_id(), address, regs->cp0_epc, regs->regs[31]);
- die("Oops", regs);
-
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
-out_of_memory:
- up_read(&mm->mmap_sem);
- if (tsk->pid == 1) {
- yield();
- down_read(&mm->mmap_sem);
- goto survive;
- }
- printk("VM: killing process %s\n", tsk->comm);
- if (user_mode(regs))
- do_exit(SIGKILL);
- goto no_context;
-
-do_sigbus:
- up_read(&mm->mmap_sem);
-
- /*
- * Send a sigbus, regardless of whether we were in kernel
- * or user mode.
- */
- tsk->thread.cp0_badvaddr = address;
- info.si_signo = SIGBUS;
- info.si_errno = 0;
- info.si_code = BUS_ADRERR;
- info.si_addr = (void *) address;
- force_sig_info(SIGBUS, &info, tsk);
-
- /* Kernel mode? Handle exceptions or die */
- if (!user_mode(regs))
- goto no_context;
-
- return;
-
-vmalloc_fault:
- panic("Pagefault for kernel virtual memory");
-}
diff -Nru a/arch/mips64/mm/init.c b/arch/mips64/mm/init.c
--- a/arch/mips64/mm/init.c Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,256 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 by Silicon Graphics
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/pagemap.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/swap.h>
-#include <linux/initrd.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/dma.h>
-#include <asm/system.h>
-#include <asm/sections.h>
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/tlb.h>
-#include <asm/cpu.h>
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-void pgd_init(unsigned long page)
-{
- unsigned long *p, *end;
-
- p = (unsigned long *) page;
- end = p + PTRS_PER_PGD;
-
- while (p < end) {
- p[0] = (unsigned long) invalid_pmd_table;
- p[1] = (unsigned long) invalid_pmd_table;
- p[2] = (unsigned long) invalid_pmd_table;
- p[3] = (unsigned long) invalid_pmd_table;
- p[4] = (unsigned long) invalid_pmd_table;
- p[5] = (unsigned long) invalid_pmd_table;
- p[6] = (unsigned long) invalid_pmd_table;
- p[7] = (unsigned long) invalid_pmd_table;
- p += 8;
- }
-}
-
-void pmd_init(unsigned long addr, unsigned long pagetable)
-{
- unsigned long *p, *end;
-
- p = (unsigned long *) addr;
- end = p + PTRS_PER_PMD;
-
- while (p < end) {
- p[0] = (unsigned long)pagetable;
- p[1] = (unsigned long)pagetable;
- p[2] = (unsigned long)pagetable;
- p[3] = (unsigned long)pagetable;
- p[4] = (unsigned long)pagetable;
- p[5] = (unsigned long)pagetable;
- p[6] = (unsigned long)pagetable;
- p[7] = (unsigned long)pagetable;
- p += 8;
- }
-}
-
-/*
- * We have up to 8 empty zeroed pages so we can map one of the right colour
- * when needed. This is necessary only on R4000 / R4400 SC and MC versions
- * where we have to avoid VCED / VECI exceptions for good performance at
- * any price. Since page is never written to after the initialization we
- * don't have to care about aliases on other CPUs.
- */
-unsigned long empty_zero_page, zero_page_mask;
-
-unsigned long setup_zero_pages(void)
-{
- unsigned long order, size;
- struct page *page;
-
- if (cpu_has_vce)
- order = 3;
- else
- order = 0;
-
- empty_zero_page = __get_free_pages(GFP_KERNEL, order);
- if (!empty_zero_page)
- panic("Oh boy, that early out of memory?");
-
- page = virt_to_page(empty_zero_page);
- while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
- set_bit(PG_reserved, &page->flags);
- set_page_count(page, 0);
- page++;
- }
-
- size = PAGE_SIZE << order;
- zero_page_mask = (size - 1) & PAGE_MASK;
- memset((void *)empty_zero_page, 0, size);
-
- return 1UL << order;
-}
-
-#ifndef CONFIG_DISCONTIGMEM
-/* References to section boundaries */
-
-extern char _stext, _etext, _fdata, _edata;
-extern char __init_begin, __init_end;
-
-void __init paging_init(void)
-{
- pmd_t *pmd = kpmdtbl;
- pte_t *pte = kptbl;
-
- unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
- unsigned long max_dma, low;
- int i;
-
- /* Initialize the entire pgd. */
- pgd_init((unsigned long)swapper_pg_dir);
- pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
- memset((void *)invalid_pte_table, 0, sizeof(pte_t) * PTRS_PER_PTE);
-
- max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
- low = max_low_pfn;
-
-#ifdef CONFIG_ISA
- if (low < max_dma)
- zones_size[ZONE_DMA] = low;
- else {
- zones_size[ZONE_DMA] = max_dma;
- zones_size[ZONE_NORMAL] = low - max_dma;
- }
-#else
- zones_size[ZONE_DMA] = low;
-#endif
-
- free_area_init(zones_size);
-
- memset((void *)kptbl, 0, PAGE_SIZE << PGD_ORDER);
- memset((void *)kpmdtbl, 0, PAGE_SIZE);
- set_pgd(swapper_pg_dir, __pgd(kpmdtbl));
- for (i = 0; i < (1 << PGD_ORDER); pmd++,i++,pte+=PTRS_PER_PTE)
- pmd_val(*pmd) = (unsigned long)pte;
-}
-
-#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
-#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
-
-static inline int page_is_ram(unsigned long pagenr)
-{
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- unsigned long addr, end;
-
- if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
- /* not usable memory */
- continue;
-
- addr = PFN_UP(boot_mem_map.map[i].addr);
- end = PFN_DOWN(boot_mem_map.map[i].addr +
- boot_mem_map.map[i].size);
-
- if (pagenr >= addr && pagenr < end)
- return 1;
- }
-
- return 0;
-}
-
-void __init mem_init(void)
-{
- unsigned long codesize, reservedpages, datasize, initsize;
- unsigned long tmp, ram;
-
- max_mapnr = num_physpages = max_low_pfn;
- high_memory = (void *) __va(max_mapnr << PAGE_SHIFT);
-
- totalram_pages += free_all_bootmem();
- totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
-
- reservedpages = ram = 0;
- for (tmp = 0; tmp < max_low_pfn; tmp++)
- if (page_is_ram(tmp)) {
- ram++;
- if (PageReserved(mem_map+tmp))
- reservedpages++;
- }
-
- codesize = (unsigned long) &_etext - (unsigned long) &_text;
- datasize = (unsigned long) &_edata - (unsigned long) &_etext;
- initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
-
- printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
- "%ldk reserved, %ldk data, %ldk init)\n",
- (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
- ram << (PAGE_SHIFT-10),
- codesize >> 10,
- reservedpages << (PAGE_SHIFT-10),
- datasize >> 10,
- initsize >> 10);
-}
-#endif /* !CONFIG_DISCONTIGMEM */
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
- /* Switch from KSEG0 to XKPHYS addresses */
- start = (unsigned long)phys_to_virt(CPHYSADDR(start));
- end = (unsigned long)phys_to_virt(CPHYSADDR(end));
- if (start < end)
- printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
- (end - start) >> 10);
-
- for (; start < end; start += PAGE_SIZE) {
- ClearPageReserved(virt_to_page(start));
- set_page_count(virt_to_page(start), 1);
- free_page(start);
- totalram_pages++;
- }
-}
-#endif
-
-extern void prom_free_prom_memory(void) __init;
-
-void free_initmem(void)
-{
- unsigned long addr, page;
-
- prom_free_prom_memory();
-
- addr = (unsigned long)(&__init_begin);
- while (addr < (unsigned long)&__init_end) {
- page = PAGE_OFFSET | CPHYSADDR(addr);
- ClearPageReserved(virt_to_page(page));
- set_page_count(virt_to_page(page), 1);
- free_page(page);
- totalram_pages++;
- addr += PAGE_SIZE;
- }
- printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
- (&__init_end - &__init_begin) >> 10);
-}
diff -Nru a/arch/mips64/mm/loadmmu.c b/arch/mips64/mm/loadmmu.c
--- a/arch/mips64/mm/loadmmu.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,120 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 1999, 2000, 2001, 2002, 2003 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-
-/* memory functions */
-void (*_clear_page)(void * page);
-void (*_copy_page)(void * to, void * from);
-
-/* Cache operations. */
-void (*flush_cache_all)(void);
-void (*__flush_cache_all)(void);
-void (*flush_cache_mm)(struct mm_struct *mm);
-void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
- unsigned long end);
-void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
-void (*flush_icache_range)(unsigned long start, unsigned long end);
-void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page);
-
-/* MIPS specific cache operations */
-void (*flush_cache_sigtramp)(unsigned long addr);
-void (*flush_data_cache_page)(unsigned long addr);
-void (*flush_icache_all)(void);
-
-#ifdef CONFIG_NONCOHERENT_IO
-
-/* DMA cache operations. */
-void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
-void (*_dma_cache_wback)(unsigned long start, unsigned long size);
-void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-
-EXPORT_SYMBOL(_dma_cache_wback_inv);
-EXPORT_SYMBOL(_dma_cache_wback);
-EXPORT_SYMBOL(_dma_cache_inv);
-
-#endif /* CONFIG_NONCOHERENT_IO */
-
-extern void ld_mmu_r23000(void);
-extern void ld_mmu_r4xx0(void);
-extern void ld_mmu_tx39(void);
-extern void ld_mmu_r6000(void);
-extern void ld_mmu_tfp(void);
-extern void ld_mmu_andes(void);
-extern void ld_mmu_sb1(void);
-extern void sb1_tlb_init(void);
-extern void r3k_tlb_init(void);
-extern void r4k_tlb_init(void);
-extern void sb1_tlb_init(void);
-
-void __init load_mmu(void)
-{
- if (cpu_has_4ktlb) {
-#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
- defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
- defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \
- defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \
- defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \
- defined(CONFIG_CPU_RM7000)
- ld_mmu_r4xx0();
- r4k_tlb_init();
-#endif
- } else switch (current_cpu_data.cputype) {
-#ifdef CONFIG_CPU_R3000
- case CPU_R2000:
- case CPU_R3000:
- case CPU_R3000A:
- case CPU_R3081E:
- ld_mmu_r23000();
- r3k_tlb_init();
- break;
-#endif
-#ifdef CONFIG_CPU_TX39XX
- case CPU_TX3912:
- case CPU_TX3922:
- case CPU_TX3927:
- ld_mmu_tx39();
- r3k_tlb_init();
- break;
-#endif
-#ifdef CONFIG_CPU_R10000
- case CPU_R10000:
- case CPU_R12000:
- ld_mmu_r4xx0();
- andes_tlb_init();
- break;
-#endif
-#ifdef CONFIG_CPU_SB1
- case CPU_SB1:
- ld_mmu_sb1();
- sb1_tlb_init();
- break;
-#endif
-
- case CPU_R8000:
- panic("R8000 is unsupported");
- break;
-
- default:
- panic("Yeee, unsupported mmu/cache architecture.");
- }
-}
diff -Nru a/arch/mips64/mm/pg-r4k.c b/arch/mips64/mm/pg-r4k.c
--- a/arch/mips64/mm/pg-r4k.c Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,708 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 98, 99, 2000, 01, 02, 03 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-#include <asm/cacheops.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/bootinfo.h>
-#include <asm/mmu_context.h>
-#include <asm/cpu.h>
-
-/*
- * Zero an entire page. Basically a simple unrolled loop should do the
- * job but we want more performance by saving memory bus bandwidth. We
- * have five flavours of the routine available for:
- *
- * - 16byte cachelines and no second level cache
- * - 32byte cachelines second level cache
- * - a version which handles the buggy R4600 v1.x
- * - a version which handles the buggy R4600 v2.0
- * - Finally a last version without fancy cache games for the SC and MC
- * versions of R4000 and R4400.
- */
-
-void r4k_clear_page_d16(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "cache\t%3,16(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "cache\t%3,-16(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
-}
-
-void r4k_clear_page_d32(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
-}
-
-
-/*
- * This flavour of r4k_clear_page is for the R4600 V1.x. Cite from the
- * IDT R4600 V1.7 errata:
- *
- * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
- * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
- * executed if there is no other dcache activity. If the dcache is
- * accessed for another instruction immeidately preceding when these
- * cache instructions are executing, it is possible that the dcache
- * tag match outputs used by these cache instructions will be
- * incorrect. These cache instructions should be preceded by at least
- * four instructions that are not any kind of load or store
- * instruction.
- *
- * This is not allowed: lw
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- *
- * This is allowed: lw
- * nop
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- */
-void r4k_clear_page_r4600_v1(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tnop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
-}
-
-/*
- * And this one is for the R4600 V2.0
- */
-void r4k_clear_page_r4600_v2(void * page)
-{
- unsigned int flags;
-
- local_irq_save(flags);
- *(volatile unsigned int *)KSEG1;
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
- local_irq_restore(flags);
-}
-
-/*
- * The next 4 versions are optimized for all possible scache configurations
- * of the SC / MC versions of R4000 and R4400 ...
- *
- * Todo: For even better performance we should have a routine optimized for
- * every legal combination of dcache / scache linesize. When I (Ralf) tried
- * this the kernel crashed shortly after mounting the root filesystem. CPU
- * bug? Weirdo cache instruction semantics?
- */
-void r4k_clear_page_s16(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "cache\t%3,16(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "cache\t%3,-16(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-void r4k_clear_page_s32(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-void r4k_clear_page_s64(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-void r4k_clear_page_s128(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "sd\t$0,32(%0)\n\t"
- "sd\t$0,40(%0)\n\t"
- "sd\t$0,48(%0)\n\t"
- "sd\t$0,56(%0)\n\t"
- "daddiu\t%0,128\n\t"
- "sd\t$0,-64(%0)\n\t"
- "sd\t$0,-56(%0)\n\t"
- "sd\t$0,-48(%0)\n\t"
- "sd\t$0,-40(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-/*
- * This version has been tuned on an Origin. For other machines the arguments
- * of the pref instructin may have to be tuned differently.
- */
-void andes_clear_page(void * page)
-{
- __asm__ __volatile__(
- ".set\tpush\n\t"
- ".set\tmips4\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tpref 7,512(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tpop"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE)
- : "memory");
-}
-
-
-/*
- * This is still inefficient. We only can do better if we know the
- * virtual address where the copy will be accessed.
- */
-
-void r4k_copy_page_d16(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "cache\t%7,16(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "cache\t%7,-16(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
-}
-
-void r4k_copy_page_d32(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
-}
-
-/*
- * Again a special version for the R4600 V1.x
- */
-void r4k_copy_page_r4600_v1(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tnop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
-}
-
-void r4k_copy_page_r4600_v2(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
- unsigned int flags;
-
- local_irq_save(flags);
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tnop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
- local_irq_restore(flags);
-}
-
-/*
- * These are for R4000SC / R4400MC
- */
-void r4k_copy_page_s16(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "cache\t%7,16(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "cache\t%7,-16(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-void r4k_copy_page_s32(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-void r4k_copy_page_s64(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-void r4k_copy_page_s128(void * to, void * from)
-{
- unsigned long dummy1, dummy2;
- unsigned long reg1, reg2, reg3, reg4;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%8\n"
- "1:\tcache\t%9,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "ld\t%4,16(%1)\n\t"
- "ld\t%5,24(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "sd\t%4,16(%0)\n\t"
- "sd\t%5,24(%0)\n\t"
- "ld\t%2,32(%1)\n\t"
- "ld\t%3,40(%1)\n\t"
- "ld\t%4,48(%1)\n\t"
- "ld\t%5,56(%1)\n\t"
- "sd\t%2,32(%0)\n\t"
- "sd\t%3,40(%0)\n\t"
- "sd\t%4,48(%0)\n\t"
- "sd\t%5,56(%0)\n\t"
- "daddiu\t%0,128\n\t"
- "daddiu\t%1,128\n\t"
- "ld\t%2,-64(%1)\n\t"
- "ld\t%3,-56(%1)\n\t"
- "ld\t%4,-48(%1)\n\t"
- "ld\t%5,-40(%1)\n\t"
- "sd\t%2,-64(%0)\n\t"
- "sd\t%3,-56(%0)\n\t"
- "sd\t%4,-48(%0)\n\t"
- "sd\t%5,-40(%0)\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "ld\t%4,-16(%1)\n\t"
- "ld\t%5,-8(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "sd\t%4,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%5,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2),
- "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
- :"0" (to), "1" (from),
- "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-/*
- * This version has been tuned on an Origin. For other machines the arguments
- * of the pref instructin may have to be tuned differently.
- */
-void andes_copy_page(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2, reg3, reg4;
-
- __asm__ __volatile__(
- ".set\tpush\n\t"
- ".set\tmips4\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%8\n"
- "1:\tpref\t0,2*128(%1)\n\t"
- "pref\t1,2*128(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "ld\t%4,16(%1)\n\t"
- "ld\t%5,24(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "sd\t%4,16(%0)\n\t"
- "sd\t%5,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "ld\t%4,-16(%1)\n\t"
- "ld\t%5,-8(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "sd\t%4,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%5,-8(%0)\n\t"
- ".set\tpop\n\t"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2),
- "=&r" (reg3), "=&r" (reg4)
- :"0" (to), "1" (from), "I" (PAGE_SIZE));
-}
diff -Nru a/arch/mips64/mm/pg-sb1.c b/arch/mips64/mm/pg-sb1.c
--- a/arch/mips64/mm/pg-sb1.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,131 +0,0 @@
-/*
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000 Sibyte
- *
- * Written by Justin Carlson (carlson@sibyte.com)
- *
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#include <linux/config.h>
-#include <asm/page.h>
-
-#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
-#define SB1_PREF_LOAD_STREAMED_HINT "0"
-#define SB1_PREF_STORE_STREAMED_HINT "1"
-#else
-#define SB1_PREF_LOAD_STREAMED_HINT "4"
-#define SB1_PREF_STORE_STREAMED_HINT "5"
-#endif
-
-/* These are the functions hooked by the memory management function pointers */
-void sb1_clear_page(void *page)
-{
- /*
- * JDCXXX - This should be bottlenecked by the write buffer, but these
- * things tend to be mildly unpredictable...should check this on the
- * performance model
- *
- * We prefetch 4 lines ahead. We're also "cheating" slightly here...
- * since we know we're on an SB1, we force the assembler to take
- * 64-bit operands to speed things up
- */
- __asm__ __volatile__(
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " daddiu $1, %0, %2 \n" /* Calculate the end of the page to clear */
-#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 4 lines */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%0) \n"
-#endif
- "1: sd $0, 0(%0) \n" /* Throw out a cacheline of 0's */
- " sd $0, 8(%0) \n"
- " sd $0, 16(%0) \n"
- " sd $0, 24(%0) \n"
-#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_STORE_STREAMED_HINT ",128(%0) \n" /* Prefetch 4 lines ahead */
-#endif
- " bne $1, %0, 1b \n"
- " daddiu %0, %0, 32\n" /* Next cacheline (This instruction better be short piped!) */
- ".set pop \n"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE-32)
- : "memory");
-
-}
-
-void sb1_copy_page(void *to, void *from)
-{
- /*
- * This should be optimized in assembly...can't use ld/sd, though,
- * because the top 32 bits could be nuked if we took an interrupt
- * during the routine. And this is not a good place to be cli()'ing
- *
- * The pref's used here are using "streaming" hints, which cause the
- * copied data to be kicked out of the cache sooner. A page copy often
- * ends up copying a lot more data than is commonly used, so this seems
- * to make sense in terms of reducing cache pollution, but I've no real
- * performance data to back this up
- */
-
- __asm__ __volatile__(
- ".set push \n"
- ".set noreorder \n"
- ".set noat \n"
- ".set mips4 \n"
- " daddiu $1, %0, %4 \n" /* Calculate the end of the page to copy */
-#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 3 lines */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%1) \n"
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 32(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%1) \n"
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 64(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%1) \n"
-#endif
- "1: lw $2, 0(%0) \n" /* Block copy a cacheline */
- " lw $3, 4(%0) \n"
- " lw $4, 8(%0) \n"
- " lw $5, 12(%0) \n"
- " lw $6, 16(%0) \n"
- " lw $7, 20(%0) \n"
- " lw $8, 24(%0) \n"
- " lw $9, 28(%0) \n"
-#ifdef CONFIG_CPU_HAS_PREFETCH
- " pref " SB1_PREF_LOAD_STREAMED_HINT ", 96(%0) \n" /* Prefetch ahead */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%1) \n"
-#endif
- " sw $2, 0(%1) \n"
- " sw $3, 4(%1) \n"
- " sw $4, 8(%1) \n"
- " sw $5, 12(%1) \n"
- " sw $6, 16(%1) \n"
- " sw $7, 20(%1) \n"
- " sw $8, 24(%1) \n"
- " sw $9, 28(%1) \n"
- " daddiu %1, %1, 32 \n" /* Next cacheline */
- " nop \n" /* Force next add to short pipe */
- " nop \n" /* Force next add to short pipe */
- " bne $1, %0, 1b \n"
- " daddiu %0, %0, 32 \n" /* Next cacheline */
- ".set pop \n"
- : "=r" (to), "=r" (from)
- : "0" (from), "1" (to), "I" (PAGE_SIZE-32)
- : "$2","$3","$4","$5","$6","$7","$8","$9","memory");
-}
diff -Nru a/arch/mips64/mm/pgtable.c b/arch/mips64/mm/pgtable.c
--- a/arch/mips64/mm/pgtable.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,33 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-
-void show_mem(void)
-{
- int pfn, total = 0, reserved = 0;
- int shared = 0, cached = 0;
- int highmem = 0;
- struct page *page;
-
- printk("Mem-info:\n");
- show_free_areas();
- printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10));
- pfn = max_mapnr;
- while (pfn-- > 0) {
- page = pfn_to_page(pfn);
- total++;
- if (PageHighMem(page))
- highmem++;
- if (PageReserved(page))
- reserved++;
- else if (PageSwapCache(page))
- cached++;
- else if (page_count(page))
- shared += page_count(page) - 1;
- }
- printk("%d pages of RAM\n", total);
- printk("%d pages of HIGHMEM\n",highmem);
- printk("%d reserved pages\n",reserved);
- printk("%d pages shared\n",shared);
- printk("%d pages swap cached\n",cached);
-}
diff -Nru a/arch/mips64/mm/sc-ip22.c b/arch/mips64/mm/sc-ip22.c
--- a/arch/mips64/mm/sc-ip22.c Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,177 +0,0 @@
-/*
- * sc-ip22.c: Indy cache management functions.
- *
- * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
- * derived from r4xx0.c by David S. Miller (dm@engr.sgi.com).
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-#include <asm/bcache.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/bootinfo.h>
-#include <asm/sgi/ip22.h>
-#include <asm/sgi/mc.h>
-
-/* Secondary cache size in bytes, if present. */
-static unsigned long scache_size;
-
-#undef DEBUG_CACHE
-
-#define SC_SIZE 0x00080000
-#define SC_LINE 32
-#define CI_MASK (SC_SIZE - SC_LINE)
-#define SC_INDEX(n) ((n) & CI_MASK)
-
-static inline void indy_sc_wipe(unsigned long first, unsigned long last)
-{
- unsigned long tmp;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t# indy_sc_wipe\n\t"
- ".set\tnoreorder\n\t"
- ".set\tmips3\n\t"
- ".set\tnoat\n\t"
- "mfc0\t%2, $12\n\t"
- "li\t$1, 0x80\t\t\t# Go 64 bit\n\t"
- "mtc0\t$1, $12\n\t"
-
- "dli\t$1, 0x9000000080000000\n\t"
- "or\t%0, $1\t\t\t# first line to flush\n\t"
- "or\t%1, $1\t\t\t# last line to flush\n\t"
- ".set\tat\n\t"
-
- "1:\tsw\t$0, 0(%0)\n\t"
- "bne\t%0, %1, 1b\n\t"
- " daddu\t%0, 32\n\t"
-
- "mtc0\t%2, $12\t\t\t# Back to 32 bit\n\t"
- "nop; nop; nop; nop;\n\t"
- ".set\tpop"
- : "=r" (first), "=r" (last), "=&r" (tmp)
- : "0" (first), "1" (last));
-}
-
-static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
-{
- unsigned long first_line, last_line;
- unsigned int flags;
-
-#ifdef DEBUG_CACHE
- printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size);
-#endif
-
- if (!size)
- return;
-
- /* Which lines to flush? */
- first_line = SC_INDEX(addr);
- last_line = SC_INDEX(addr + size - 1);
-
- local_irq_save(flags);
- if (first_line <= last_line) {
- indy_sc_wipe(first_line, last_line);
- goto out;
- }
-
- indy_sc_wipe(first_line, SC_SIZE - SC_LINE);
- indy_sc_wipe(0, last_line);
-out:
- local_irq_restore(flags);
-}
-
-static void indy_sc_enable(void)
-{
- unsigned long addr, tmp1, tmp2;
-
- /* This is really cool... */
-#ifdef DEBUG_CACHE
- printk("Enabling R4600 SCACHE\n");
-#endif
- __asm__ __volatile__(
- ".set\tpush\n\t"
- ".set\tnoreorder\n\t"
- ".set\tmips3\n\t"
- "mfc0\t%2, $12\n\t"
- "nop; nop; nop; nop;\n\t"
- "li\t%1, 0x80\n\t"
- "mtc0\t%1, $12\n\t"
- "nop; nop; nop; nop;\n\t"
- "li\t%0, 0x1\n\t"
- "dsll\t%0, 31\n\t"
- "lui\t%1, 0x9000\n\t"
- "dsll32\t%1, 0\n\t"
- "or\t%0, %1, %0\n\t"
- "sb\t$0, 0(%0)\n\t"
- "mtc0\t$0, $12\n\t"
- "nop; nop; nop; nop;\n\t"
- "mtc0\t%2, $12\n\t"
- "nop; nop; nop; nop;\n\t"
- ".set\tpop"
- : "=r" (tmp1), "=r" (tmp2), "=r" (addr));
-}
-
-static void indy_sc_disable(void)
-{
- unsigned long tmp1, tmp2, tmp3;
-
-#ifdef DEBUG_CACHE
- printk("Disabling R4600 SCACHE\n");
-#endif
- __asm__ __volatile__(
- ".set\tpush\n\t"
- ".set\tnoreorder\n\t"
- ".set\tmips3\n\t"
- "li\t%0, 0x1\n\t"
- "dsll\t%0, 31\n\t"
- "lui\t%1, 0x9000\n\t"
- "dsll32\t%1, 0\n\t"
- "or\t%0, %1, %0\n\t"
- "mfc0\t%2, $12\n\t"
- "nop; nop; nop; nop\n\t"
- "li\t%1, 0x80\n\t"
- "mtc0\t%1, $12\n\t"
- "nop; nop; nop; nop\n\t"
- "sh\t$0, 0(%0)\n\t"
- "mtc0\t$0, $12\n\t"
- "nop; nop; nop; nop\n\t"
- "mtc0\t%2, $12\n\t"
- "nop; nop; nop; nop\n\t"
- ".set\tpop"
- : "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
-}
-
-static inline int __init indy_sc_probe(void)
-{
- unsigned int size = ip22_eeprom_read(&sgimc->eeprom, 17);
- if (size == 0)
- return 0;
-
- size <<= PAGE_SHIFT;
- printk(KERN_INFO "R4600/R5000 SCACHE size %ldK, linesize 32 bytes.\n",
- size >> 10);
- scache_size = size;
-
- return 1;
-}
-
-/* XXX Check with wje if the Indy caches can differenciate between
- writeback + invalidate and just invalidate. */
-struct bcache_ops indy_sc_ops = {
- .bc_enable = indy_sc_enable,
- .bc_disable = indy_sc_disable,
- .bc_wback_inv = indy_sc_wback_invalidate,
- .bc_inv = indy_sc_wback_invalidate
-};
-
-void __init indy_sc_init(void)
-{
- if (indy_sc_probe()) {
- indy_sc_enable();
- bcops = &indy_sc_ops;
- }
-}
diff -Nru a/arch/mips64/mm/sc-r5k.c b/arch/mips64/mm/sc-r5k.c
--- a/arch/mips64/mm/sc-r5k.c Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,115 +0,0 @@
-/*
- * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
- * derived from r4xx0.c by David S. Miller (dm@engr.sgi.com).
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-#include <asm/mipsregs.h>
-#include <asm/bcache.h>
-#include <asm/cacheops.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/mmu_context.h>
-
-/* Secondary cache size in bytes, if present. */
-static unsigned long scache_size;
-
-#define SC_LINE 32
-#define SC_PAGE (128*SC_LINE)
-
-#define cache_op(base,op) \
-__asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, (%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
-static inline void blast_r5000_scache(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = KSEG0 + scache_size;
-
- while(start < end) {
- cache_op(start, R5K_Page_Invalidate_S);
- start += SC_PAGE;
- }
-}
-
-static void r5k_dma_cache_inv_sc(unsigned long addr, unsigned long size)
-{
- unsigned long end, a;
-
- if (size >= scache_size) {
- blast_r5000_scache();
- return;
- }
-
- /* On the R5000 secondary cache we cannot
- * invalidate less than a page at a time.
- * The secondary cache is physically indexed, write-through.
- */
- a = addr & ~(SC_PAGE - 1);
- end = (addr + size - 1) & ~(SC_PAGE - 1);
- while (a <= end) {
- cache_op(a, R5K_Page_Invalidate_S);
- a += SC_PAGE;
- }
-}
-
-static void r5k_sc_enable(void)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- change_c0_config(R5K_CONF_SE, R5K_CONF_SE);
- blast_r5000_scache();
- local_irq_restore(flags);
-}
-
-static void r5k_sc_disable(void)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- blast_r5000_scache();
- change_c0_config(R5K_CONF_SE, 0);
- local_irq_restore(flags);
-}
-
-static inline int __init r5k_sc_probe(void)
-{
- unsigned long config = read_c0_config();
-
- if (config & CONF_SC)
- return(0);
-
- scache_size = (512 * 1024) << ((config & R5K_CONF_SS) >> 20);
-
- printk("R5000 SCACHE size %ldkB, linesize 32 bytes.\n",
- scache_size >> 10);
-
- return 1;
-}
-
-static struct bcache_ops r5k_sc_ops = {
- .bc_enable = r5k_sc_enable,
- .bc_disable = r5k_sc_disable,
- .bc_wback_inv = r5k_dma_cache_inv_sc,
- .bc_inv = r5k_dma_cache_inv_sc
-};
-
-void __init r5k_sc_init(void)
-{
- if (r5k_sc_probe()) {
- r5k_sc_enable();
- bcops = &r5k_sc_ops;
- }
-}
diff -Nru a/arch/mips64/mm/sc-rm7k.c b/arch/mips64/mm/sc-rm7k.c
--- a/arch/mips64/mm/sc-rm7k.c Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,191 +0,0 @@
-/*
- * sc-rm7k.c: RM7000 cache management functions.
- *
- * Copyright (C) 1997, 2001, 2003 Ralf Baechle (ralf@gnu.org),
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-
-#include <asm/addrspace.h>
-#include <asm/bcache.h>
-#include <asm/cacheops.h>
-#include <asm/mipsregs.h>
-#include <asm/processor.h>
-
-/* Primary cache parameters. */
-#define sc_lsize 32
-#define tc_pagesize (32*128)
-
-/* Secondary cache parameters. */
-#define scache_size (256*1024) /* Fixed to 256KiB on RM7000 */
-
-extern unsigned long icache_way_size, dcache_way_size;
-
-#include <asm/r4kcache.h>
-
-int rm7k_tcache_enabled;
-
-/*
- * Writeback and invalidate the primary cache dcache before DMA.
- * (XXX These need to be fixed ...)
- */
-static void rm7k_sc_wback_inv(unsigned long addr, unsigned long size)
-{
- unsigned long end, a;
-
-#ifdef DEBUG_CACHE
- printk("rm7k_sc_wback_inv[%08lx,%08lx]", addr, size);
-#endif
-
- a = addr & ~(sc_lsize - 1);
- end = (addr + size - 1) & ~(sc_lsize - 1);
- while (1) {
- flush_scache_line(a); /* Hit_Writeback_Inv_SD */
- if (a == end)
- break;
- a += sc_lsize;
- }
-
- if (!rm7k_tcache_enabled)
- return;
-
- a = addr & ~(tc_pagesize - 1);
- end = (addr + size - 1) & ~(tc_pagesize - 1);
- while(1) {
- invalidate_tcache_page(a); /* Page_Invalidate_T */
- if (a == end)
- break;
- a += tc_pagesize;
- }
-}
-
-static void rm7k_sc_inv(unsigned long addr, unsigned long size)
-{
- unsigned long end, a;
-
-#ifdef DEBUG_CACHE
- printk("rm7k_sc_inv[%08lx,%08lx]", addr, size);
-#endif
-
- a = addr & ~(sc_lsize - 1);
- end = (addr + size - 1) & ~(sc_lsize - 1);
- while (1) {
- invalidate_scache_line(a); /* Hit_Invalidate_SD */
- if (a == end)
- break;
- a += sc_lsize;
- }
-
- if (!rm7k_tcache_enabled)
- return;
-
- a = addr & ~(tc_pagesize - 1);
- end = (addr + size - 1) & ~(tc_pagesize - 1);
- while(1) {
- invalidate_tcache_page(a); /* Page_Invalidate_T */
- if (a == end)
- break;
- a += tc_pagesize;
- }
-}
-
-/*
- * This function is executed in the uncached segment KSEG1.
- * It must not touch the stack, because the stack pointer still points
- * into KSEG0.
- *
- * Three options:
- * - Write it in assembly and guarantee that we don't use the stack.
- * - Disable caching for KSEG0 before calling it.
- * - Pray that GCC doesn't randomly start using the stack.
- *
- * This being Linux, we obviously take the least sane of those options -
- * following DaveM's lead in c-r4k.c
- *
- * It seems we get our kicks from relying on unguaranteed behaviour in GCC
- */
-static __init void rm7k_sc_enable(void)
-{
- int i;
-
- set_c0_config(1<<3); /* CONF_SE */
-
- write_c0_taglo(0);
- write_c0_taghi(0);
-
- for (i=0; i<scache_size; i+=sc_lsize) {
- __asm__ __volatile__ (
- ".set noreorder\n\t"
- ".set mips3\n\t"
- "cache %1, (%0)\n\t"
- ".set mips0\n\t"
- ".set reorder"
- :
- : "r" (KSEG0ADDR(i)),
- "i" (Index_Store_Tag_SD));
- }
-}
-
-static void rm7k_sc_disable(void)
-{
- set_c0_config(1<<3); /* CONF_SE */
-}
-
-static inline int __init rm7k_sc_probe(void)
-{
- void (*func)(void) = KSEG1ADDR(&rm7k_sc_enable);
- unsigned int config = read_c0_config();
-
- if ((config >> 31) & 1)
- return 0;
-
- printk(KERN_INFO "Secondary cache size %ldK, linesize 32 bytes.\n",
- (scache_size >> 10), sc_lsize);
-
- if ((config >> 3) & 1)
- return;
-
- printk(KERN_INFO "Enabling secondary cache...");
- func();
- printk(" done\n");
-
- /*
- * While we're at it let's deal with the tertiary cache.
- */
- if ((config >> 17) & 1)
- return 1;
-
- /*
- * We can't enable the L3 cache yet. There may be board-specific
- * magic necessary to turn it on, and blindly asking the CPU to
- * start using it would may give cache errors.
- *
- * Also, board-specific knowledge may allow us to use the
- * CACHE Flash_Invalidate_T instruction if the tag RAM supports
- * it, and may specify the size of the L3 cache so we don't have
- * to probe it.
- */
- printk(KERN_INFO "Tertiary cache present, %s enabled\n",
- config&(1<<12) ? "already" : "not (yet)");
-
- if ((config >> 12) & 1)
- rm7k_tcache_enabled = 1;
-
- return 1;
-}
-
-struct bcache_ops rm7k_sc_ops = {
- .bc_enable = rm7k_sc_enable,
- .bc_disable = rm7k_sc_disable,
- .bc_wback_inv = rm7k_sc_wback_inv,
- .bc_inv = rm7k_sc_inv
-};
-
-void __init rm7k_sc_init(void)
-{
- if (rm7k_sc_probe()) {
- rm7k_sc_enable();
- bcops = &rm7k_sc_ops;
- }
-}
diff -Nru a/arch/mips64/mm/tlb-andes.c b/arch/mips64/mm/tlb-andes.c
--- a/arch/mips64/mm/tlb-andes.c Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,257 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 1998, 1999 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/mmu_context.h>
-
-extern void except_vec1_r10k(void);
-
-#define NTLB_ENTRIES 64
-#define NTLB_ENTRIES_HALF 32
-
-void local_flush_tlb_all(void)
-{
- unsigned long flags;
- unsigned long old_ctx;
- unsigned long entry;
-
- local_irq_save(flags);
- /* Save old context and create impossible VPN2 value */
- old_ctx = read_c0_entryhi() & ASID_MASK;
- write_c0_entryhi(CKSEG0);
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
-
- entry = read_c0_wired();
-
- /* Blast 'em all away. */
- while (entry < NTLB_ENTRIES) {
- write_c0_index(entry);
- tlb_write_indexed();
- entry++;
- }
- write_c0_entryhi(old_ctx);
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_mm(struct mm_struct *mm)
-{
- int cpu = smp_processor_id();
- if (cpu_context(cpu, mm) != 0) {
- drop_mmu_context(mm,cpu);
- }
-}
-
-void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- struct mm_struct *mm = vma->vm_mm;
- int cpu = smp_processor_id();
-
- if (cpu_context(cpu, mm) != 0) {
- unsigned long flags;
- int size;
-
- local_irq_save(flags);
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- size = (size + 1) >> 1;
- if (size <= NTLB_ENTRIES_HALF) {
- int oldpid = (read_c0_entryhi() & ASID_MASK);
- int newpid = (cpu_context(smp_processor_id(), mm)
- & ASID_MASK);
-
- start &= (PAGE_MASK << 1);
- end += ((PAGE_SIZE << 1) - 1);
- end &= (PAGE_MASK << 1);
- while(start < end) {
- int idx;
-
- write_c0_entryhi(start | newpid);
- start += (PAGE_SIZE << 1);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0);
- if(idx < 0)
- continue;
- tlb_write_indexed();
- }
- write_c0_entryhi(oldpid);
- } else {
- drop_mmu_context(mm, cpu);
- }
- local_irq_restore(flags);
- }
-}
-
-void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
-{
- unsigned long flags;
- int size;
-
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- size = (size + 1) >> 1;
-
- local_irq_save(flags);
- if (size <= NTLB_ENTRIES_HALF) {
- int pid = read_c0_entryhi();
-
- start &= (PAGE_MASK << 1);
- end += ((PAGE_SIZE << 1) - 1);
- end &= (PAGE_MASK << 1);
-
- while (start < end) {
- int idx;
-
- write_c0_entryhi(start);
- start += (PAGE_SIZE << 1);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
- if (idx < 0)
- continue;
- tlb_write_indexed();
- }
- write_c0_entryhi(pid);
- } else {
- local_flush_tlb_all();
- }
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
- if (cpu_context(smp_processor_id(), vma->vm_mm) != 0) {
- unsigned long flags;
- int oldpid, newpid, idx;
-
- newpid = (cpu_context(smp_processor_id(), vma->vm_mm) &
- ASID_MASK);
- page &= (PAGE_MASK << 1);
- local_irq_save(flags);
- oldpid = (read_c0_entryhi() & ASID_MASK);
- write_c0_entryhi(page | newpid);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0);
- if (idx < 0)
- goto finish;
- tlb_write_indexed();
-
- finish:
- write_c0_entryhi(oldpid);
- local_irq_restore(flags);
- }
-}
-
-/*
- * This one is only used for pages with the global bit set so we don't care
- * much about the ASID.
- */
-void local_flush_tlb_one(unsigned long page)
-{
- unsigned long flags;
- int oldpid, idx;
-
- local_irq_save(flags);
- page &= (PAGE_MASK << 1);
- oldpid = read_c0_entryhi() & 0xff;
- write_c0_entryhi(page);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if (idx >= 0) {
- /* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
- tlb_write_indexed();
- }
- write_c0_entryhi(oldpid);
-
- local_irq_restore(flags);
-}
-
-/* XXX Simplify this. On the R10000 writing a TLB entry for an virtual
- address that already exists will overwrite the old entry and not result
- in TLB malfunction or TLB shutdown. */
-void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
-{
- unsigned long flags;
- pgd_t *pgdp;
- pmd_t *pmdp;
- pte_t *ptep;
- int idx, pid;
-
- /*
- * Handle debugger faulting in for debugee.
- */
- if (current->active_mm != vma->vm_mm)
- return;
-
- pid = read_c0_entryhi() & ASID_MASK;
-
- if ((pid != (cpu_context(smp_processor_id(), vma->vm_mm) & ASID_MASK))
- || (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
- printk(KERN_WARNING
- "%s: Wheee, bogus tlbpid mmpid=%d tlbpid=%d\n",
- __FUNCTION__, (int) (cpu_context(smp_processor_id(),
- vma->vm_mm) & ASID_MASK), pid);
- }
-
- local_irq_save(flags);
- address &= (PAGE_MASK << 1);
- write_c0_entryhi(address | (pid));
- pgdp = pgd_offset(vma->vm_mm, address);
- tlb_probe();
- pmdp = pmd_offset(pgdp, address);
- idx = read_c0_index();
- ptep = pte_offset_map(pmdp, address);
- write_c0_entrylo0(pte_val(*ptep++) >> 6);
- write_c0_entrylo1(pte_val(*ptep) >> 6);
- write_c0_entryhi(address | (pid));
- if (idx < 0) {
- tlb_write_random();
- } else {
- tlb_write_indexed();
- }
- write_c0_entryhi(pid);
- local_irq_restore(flags);
-}
-
-void __init andes_tlb_init(void)
-{
- /*
- * You should never change this register:
- * - On R4600 1.7 the tlbp never hits for pages smaller than
- * the value in the c0_pagemask register.
- * - The entire mm handling assumes the c0_pagemask register to
- * be set for 4kb pages.
- */
- write_c0_pagemask(PM_4K);
- write_c0_wired(0);
- write_c0_framemask(0);
-
- /* From this point on the ARC firmware is dead. */
- local_flush_tlb_all();
-
- /* Did I tell you that ARC SUCKS? */
-
- memcpy((void *)KSEG1 + 0x080, except_vec1_r10k, 0x80);
-}
diff -Nru a/arch/mips64/mm/tlb-dbg-r4k.c b/arch/mips64/mm/tlb-dbg-r4k.c
--- a/arch/mips64/mm/tlb-dbg-r4k.c Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,71 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- *
- * TLB debugging routines. These perform horribly slow but can easily be
- * modified for debugging purposes.
- */
-#include <linux/linkage.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/ptrace.h>
-#include <asm/system.h>
-
-asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
- unsigned long address);
-
-asmlinkage void tlb_refill_debug(struct pt_regs regs)
-{
- show_regs(®s);
- panic(__FUNCTION__ " called. This Does Not Happen (TM).");
-}
-
-asmlinkage void xtlb_refill_debug(struct pt_regs *regs)
-{
- unsigned long addr;
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
-
- addr = regs->cp0_badvaddr & ~((PAGE_SIZE << 1) - 1);
- pgd = pgd_offset(current->active_mm, addr);
- pmd = pmd_offset(pgd, addr);
- pte = pte_offset(pmd, addr);
-
- write_c0_entrylo0(pte_val(pte[0]) >> 6);
- write_c0_entrylo1(pte_val(pte[1]) >> 6);
- __asm__ __volatile__("nop;nop;nop");
-
- tlb_write_random();
-}
-
-asmlinkage void xtlb_mod_debug(struct pt_regs *regs)
-{
- unsigned long addr;
-
- addr = regs->cp0_badvaddr;
- do_page_fault(regs, 1, addr);
-}
-
-asmlinkage void xtlb_tlbl_debug(struct pt_regs *regs)
-{
- unsigned long addr;
-
- addr = regs->cp0_badvaddr;
- do_page_fault(regs, 0, addr);
-}
-
-asmlinkage void xtlb_tlbs_debug(struct pt_regs *regs)
-{
- unsigned long addr;
-
- addr = regs->cp0_badvaddr;
- do_page_fault(regs, 1, addr);
-}
diff -Nru a/arch/mips64/mm/tlb-glue-r4k.S b/arch/mips64/mm/tlb-glue-r4k.S
--- a/arch/mips64/mm/tlb-glue-r4k.S Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,41 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/init.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
- .macro __BUILD_cli
- CLI
- .endm
-
- .macro __BUILD_sti
- STI
- .endm
-
- .macro __BUILD_kmode
- KMODE
- .endm
-
- .macro tlb_handler name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
- j ret_from_exception
- END(__\name)
- .endm
-
- tlb_handler xtlb_mod kmode 1
- tlb_handler xtlb_tlbl kmode 0
- tlb_handler xtlb_tlbs kmode 1
diff -Nru a/arch/mips64/mm/tlb-glue-sb1.S b/arch/mips64/mm/tlb-glue-sb1.S
--- a/arch/mips64/mm/tlb-glue-sb1.S Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,66 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/init.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
- .macro __BUILD_cli
- CLI
- .endm
-
- .macro __BUILD_sti
- STI
- .endm
-
- .macro __BUILD_kmode
- KMODE
- .endm
-
- .macro tlb_handler name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
- j ret_from_exception
- END(__\name)
- .endm
-
- .macro tlb_handler_m3 name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, PAGE_SHIFT + 1
- bnez k0, 1f
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
-1:
- j ret_from_exception
- END(__\name)
- .endm
-
- tlb_handler xtlb_mod kmode 1
-#if BCM1250_M3_WAR
- tlb_handler_m3 xtlb_tlbl kmode 0
-#else
- tlb_handler xtlb_tlbl kmode 0
-#endif
- tlb_handler xtlb_tlbs kmode 1
diff -Nru a/arch/mips64/mm/tlb-r4k.c b/arch/mips64/mm/tlb-r4k.c
--- a/arch/mips64/mm/tlb-r4k.c Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,415 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * MIPS64 CPU variant specific MMU routines.
- * These routine are not optimized in any way, they are done in a generic way
- * so they can be used on all MIPS64 compliant CPUs, and also done in an
- * attempt not to break anything for the R4xx0 style CPUs.
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-
-#undef DEBUG_TLB
-#undef DEBUG_TLBUPDATE
-
-extern void except_vec1_r4k(void);
-
-/* CP0 hazard avoidance. */
-#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
- "nop; nop; nop; nop; nop; nop;\n\t" \
- ".set reorder\n\t")
-
-void local_flush_tlb_all(void)
-{
- unsigned long flags;
- unsigned long old_ctx;
- int entry;
-
-#ifdef DEBUG_TLB
- printk("[tlball]");
-#endif
-
- local_irq_save(flags);
- /* Save old context and create impossible VPN2 value */
- old_ctx = read_c0_entryhi() & ASID_MASK;
- write_c0_entryhi(XKPHYS);
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- BARRIER;
-
- entry = read_c0_wired();
-
- /* Blast 'em all away. */
- while(entry < current_cpu_data.tlbsize) {
- /* Make sure all entries differ. */
- write_c0_entryhi(XKPHYS+entry*0x2000);
- write_c0_index(entry);
- BARRIER;
- tlb_write_indexed();
- BARRIER;
- entry++;
- }
- BARRIER;
- write_c0_entryhi(old_ctx);
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_mm(struct mm_struct *mm)
-{
- int cpu = smp_processor_id();
-
- if (cpu_context(cpu, mm) != 0) {
-#ifdef DEBUG_TLB
- printk("[tlbmm<%d>]", cpu_context(cpu, mm));
-#endif
- drop_mmu_context(mm,cpu);
- }
-}
-
-void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- struct mm_struct *mm = vma->vm_mm;
- int cpu = smp_processor_id();
-
- if (cpu_context(cpu, mm) != 0) {
- unsigned long flags;
- int size;
-
-#ifdef DEBUG_TLB
- printk("[tlbrange<%02x,%08lx,%08lx>]", cpu_context(cpu, mm) & ASID_MASK,
- start, end);
-#endif
- local_irq_save(flags);
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- size = (size + 1) >> 1;
- if(size <= current_cpu_data.tlbsize/2) {
- int oldpid = read_c0_entryhi() & ASID_MASK;
- int newpid = cpu_asid(cpu, mm);
-
- start &= (PAGE_MASK << 1);
- end += ((PAGE_SIZE << 1) - 1);
- end &= (PAGE_MASK << 1);
- while (start < end) {
- int idx;
-
- write_c0_entryhi(start | newpid);
- start += (PAGE_SIZE << 1);
- BARRIER;
- tlb_probe();
- BARRIER;
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if(idx < 0)
- continue;
- /* Make sure all entries differ. */
- write_c0_entryhi(XKPHYS+idx*0x2000);
- BARRIER;
- tlb_write_indexed();
- BARRIER;
- }
- write_c0_entryhi(oldpid);
- } else {
- drop_mmu_context(mm, cpu);
- }
- local_irq_restore(flags);
- }
-}
-
-void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
-{
- unsigned long flags;
- int size;
-
-#ifdef DEBUG_TLB
- printk("[tlbkernelrange<%08lx,%08lx>]", start, end);
-#endif
- local_irq_save(flags);
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- size = (size + 1) >> 1;
- if (size <= current_cpu_data.tlbsize/2) {
- int pid = read_c0_entryhi();
-
- start &= (PAGE_MASK << 1);
- end += ((PAGE_SIZE << 1) - 1);
- end &= (PAGE_MASK << 1);
-
- while (start < end) {
- int idx;
-
- write_c0_entryhi(start);
- start += (PAGE_SIZE << 1);
- BARRIER;
- tlb_probe();
- BARRIER;
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if (idx < 0)
- continue;
- /* Make sure all entries differ. */
- write_c0_entryhi(XKPHYS+idx*0x2000);
- BARRIER;
- tlb_write_indexed();
- BARRIER;
- }
- write_c0_entryhi(pid);
- } else {
- local_flush_tlb_all();
- }
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
- int cpu = smp_processor_id();
-
- if (cpu_context(cpu, vma->vm_mm) != 0) {
- unsigned long flags;
- unsigned long oldpid, newpid, idx;
-
-#ifdef DEBUG_TLB
- printk("[tlbpage<%d,%08lx>]", cpu_asid(cpu, vma->vm_mm), page);
-#endif
- newpid = cpu_asid(cpu, vma->vm_mm);
- page &= (PAGE_MASK << 1);
- local_irq_save(flags);
- oldpid = read_c0_entryhi() & ASID_MASK;
- write_c0_entryhi(page | newpid);
- BARRIER;
- tlb_probe();
- BARRIER;
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if(idx < 0)
- goto finish;
- /* Make sure all entries differ. */
- write_c0_entryhi(XKPHYS+idx*0x2000);
- BARRIER;
- tlb_write_indexed();
- finish:
- BARRIER;
- write_c0_entryhi(oldpid);
- local_irq_restore(flags);
- }
-}
-
-/*
- * This one is only used for pages with the global bit set so we don't care
- * much about the ASID.
- */
-void local_flush_tlb_one(unsigned long page)
-{
- unsigned long flags;
- int oldpid, idx;
-
- local_irq_save(flags);
- page &= (PAGE_MASK << 1);
- oldpid = read_c0_entryhi() & 0xff;
- write_c0_entryhi(page);
- BARRIER;
- tlb_probe();
- BARRIER;
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if (idx >= 0) {
- /* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
- BARRIER;
- tlb_write_indexed();
- }
- BARRIER;
- write_c0_entryhi(oldpid);
-
- local_irq_restore(flags);
-}
-
-/*
- * Updates the TLB with the new pte(s).
- */
-void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
-{
- unsigned long flags;
- pgd_t *pgdp;
- pmd_t *pmdp;
- pte_t *ptep;
- int idx, pid;
-
- /*
- * Handle debugger faulting in for debugee.
- */
- if (current->active_mm != vma->vm_mm)
- return;
-
- pid = read_c0_entryhi() & ASID_MASK;
-
-#ifdef DEBUG_TLB
- if ((pid != cpu_asid(smp_processor_id(), vma->vm_mm))) ||
- (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
- printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
- "tlbpid=%d\n", (int) cpu_asid(smp_processor_id(),
- vma->vm_mm), pid);
- }
-#endif
-
- local_irq_save(flags);
- address &= (PAGE_MASK << 1);
- write_c0_entryhi(address | (pid));
- pgdp = pgd_offset(vma->vm_mm, address);
- BARRIER;
- tlb_probe();
- BARRIER;
- pmdp = pmd_offset(pgdp, address);
- idx = read_c0_index();
- ptep = pte_offset_map(pmdp, address);
- BARRIER;
- write_c0_entrylo0(pte_val(*ptep++) >> 6);
- write_c0_entrylo1(pte_val(*ptep) >> 6);
- write_c0_entryhi(address | (pid));
- BARRIER;
- if(idx < 0) {
- tlb_write_random();
- } else {
- tlb_write_indexed();
- }
- BARRIER;
- write_c0_entryhi(pid);
- BARRIER;
- local_irq_restore(flags);
-}
-
-void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask)
-{
- unsigned long flags;
- unsigned long wired;
- unsigned long old_pagemask;
- unsigned long old_ctx;
-
- local_irq_save(flags);
- /* Save old context and create impossible VPN2 value */
- old_ctx = read_c0_entryhi() & ASID_MASK;
- old_pagemask = read_c0_pagemask();
- wired = read_c0_wired();
- write_c0_wired(wired + 1);
- write_c0_index(wired);
- BARRIER;
- write_c0_pagemask(pagemask);
- write_c0_entryhi(entryhi);
- write_c0_entrylo0(entrylo0);
- write_c0_entrylo1(entrylo1);
- BARRIER;
- tlb_write_indexed();
- BARRIER;
-
- write_c0_entryhi(old_ctx);
- BARRIER;
- write_c0_pagemask(old_pagemask);
- local_flush_tlb_all();
- local_irq_restore(flags);
-}
-
-/*
- * Used for loading TLB entries before trap_init() has started, when we
- * don't actually want to add a wired entry which remains throughout the
- * lifetime of the system
- */
-
-static int temp_tlb_entry __initdata;
-
-__init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask)
-{
- int ret = 0;
- unsigned long flags;
- unsigned long wired;
- unsigned long old_pagemask;
- unsigned long old_ctx;
-
- local_irq_save(flags);
- /* Save old context and create impossible VPN2 value */
- old_ctx = read_c0_entryhi() & ASID_MASK;
- old_pagemask = read_c0_pagemask();
- wired = read_c0_wired();
- if (--temp_tlb_entry < wired) {
- printk(KERN_WARNING "No TLB space left for add_temporary_entry\n");
- ret = -ENOSPC;
- goto out;
- }
-
- write_c0_index(temp_tlb_entry);
- BARRIER;
- write_c0_pagemask(pagemask);
- write_c0_entryhi(entryhi);
- write_c0_entrylo0(entrylo0);
- write_c0_entrylo1(entrylo1);
- BARRIER;
- tlb_write_indexed();
- BARRIER;
-
- write_c0_entryhi(old_ctx);
- BARRIER;
- write_c0_pagemask(old_pagemask);
-out:
- local_irq_restore(flags);
- return ret;
-}
-
-static void __init probe_tlb(unsigned long config)
-{
- unsigned long config1;
-
- if (!(config & (1 << 31))) {
- /*
- * Not a MIPS64 complainant CPU.
- * Config 1 register not supported, we assume R4k style.
- */
- current_cpu_data.tlbsize = 48;
- } else {
- config1 = read_c0_config1();
- if (!((config >> 7) & 3))
- panic("No MMU present");
- else
- current_cpu_data.tlbsize = ((config1 >> 25) & 0x3f) + 1;
- }
-
- printk("Number of TLB entries %d.\n", current_cpu_data.tlbsize);
-}
-
-void __init r4k_tlb_init(void)
-{
- unsigned long config = read_c0_config();
-
- probe_tlb(config);
- write_c0_pagemask(PM_4K);
- write_c0_wired(0);
- temp_tlb_entry = current_cpu_data.tlbsize - 1;
- local_flush_tlb_all();
-
- memcpy((void *)(KSEG0 + 0x80), except_vec1_r4k, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x80);
-}
diff -Nru a/arch/mips64/mm/tlb-sb1.c b/arch/mips64/mm/tlb-sb1.c
--- a/arch/mips64/mm/tlb-sb1.c Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,342 +0,0 @@
-/*
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#include <linux/config.h>
-#include <asm/mmu_context.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-
-extern void except_vec1_sb1(void);
-
-/* Dump the current entry* and pagemask registers */
-static inline void dump_cur_tlb_regs(void)
-{
- unsigned int entryhihi, entryhilo, entrylo0hi, entrylo0lo, entrylo1hi;
- unsigned int entrylo1lo, pagemask;
-
- __asm__ __volatile__ (
- ".set push \n"
- ".set noreorder \n"
- "#.set mips64 \n"
- ".set mips4 \n"
- ".set noat \n"
- " tlbr \n"
- " dmfc0 $1, $10 \n"
- " dsrl32 %0, $1, 0 \n"
- " sll %1, $1, 0 \n"
- " dmfc0 $1, $2 \n"
- " dsrl32 %2, $1, 0 \n"
- " sll %3, $1, 0 \n"
- " dmfc0 $1, $3 \n"
- " dsrl32 %4, $1, 0 \n"
- " sll %5, $1, 0 \n"
- " mfc0 %6, $5 \n"
- ".set pop \n"
- : "=r" (entryhihi),
- "=r" (entryhilo),
- "=r" (entrylo0hi),
- "=r" (entrylo0lo),
- "=r" (entrylo1hi),
- "=r" (entrylo1lo),
- "=r" (pagemask));
- printk("%08X%08X %08X%08X %08X%08X %08X",
- entryhihi, entryhilo,
- entrylo0hi, entrylo0lo,
- entrylo1hi, entrylo1lo,
- pagemask);
-}
-
-void sb1_dump_tlb(void)
-{
- unsigned long old_ctx;
- unsigned long flags;
- int entry;
- local_irq_save(flags);
- old_ctx = read_c0_entryhi();
- printk("Current TLB registers state:\n"
- " EntryHi EntryLo0 EntryLo1 PageMask Index\n"
- "--------------------------------------------------------------------\n");
- dump_cur_tlb_regs();
- printk(" %08X\n", read_c0_index());
- printk("\n\nFull TLB Dump:\n"
- "Idx EntryHi EntryLo0 EntryLo1 PageMask\n"
- "--------------------------------------------------------------\n");
- for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
- write_c0_index(entry);
- printk("\n%02i ", entry);
- dump_cur_tlb_regs();
- }
- printk("\n");
- write_c0_entryhi(old_ctx);
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_all(void)
-{
- unsigned long flags;
- unsigned long old_ctx;
- int entry;
-
- local_irq_save(flags);
- /* Save old context and create impossible VPN2 value */
- old_ctx = read_c0_entryhi() & ASID_MASK;
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
- write_c0_entryhi(KSEG0 + (PAGE_SIZE << 1) * entry);
- write_c0_index(entry);
- tlb_write_indexed();
- }
- write_c0_entryhi(old_ctx);
- local_irq_restore(flags);
-}
-
-
-/*
- * Use a bogus region of memory (starting at 0) to sanitize the TLB's.
- * Use increments of the maximum page size (16MB), and check for duplicate
- * entries before doing a given write. Then, when we're safe from collisions
- * with the firmware, go back and give all the entries invalid addresses with
- * the normal flush routine.
- */
-void sb1_sanitize_tlb(void)
-{
- int entry;
- long addr = 0;
-
- long inc = 1<<24; /* 16MB */
- /* Save old context and create impossible VPN2 value */
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
- do {
- addr += inc;
- write_c0_entryhi(addr);
- tlb_probe();
- } while ((int)(read_c0_index()) >= 0);
- write_c0_index(entry);
- tlb_write_indexed();
- }
- /* Now that we know we're safe from collisions, we can safely flush
- the TLB with the "normal" routine. */
- local_flush_tlb_all();
-}
-
-void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- struct mm_struct *mm = vma->vm_mm;
- unsigned long flags;
- int cpu;
-
- local_irq_save(flags);
- cpu = smp_processor_id();
- if (cpu_context(cpu, mm) != 0) {
- int size;
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- size = (size + 1) >> 1;
- if (size <= (current_cpu_data.tlbsize/2)) {
- int oldpid = read_c0_entryhi() & ASID_MASK;
- int newpid = cpu_asid(cpu, mm);
-
- start &= (PAGE_MASK << 1);
- end += ((PAGE_SIZE << 1) - 1);
- end &= (PAGE_MASK << 1);
- while (start < end) {
- int idx;
-
- write_c0_entryhi(start | newpid);
- start += (PAGE_SIZE << 1);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
- if (idx < 0)
- continue;
- tlb_write_indexed();
- }
- write_c0_entryhi(oldpid);
- } else {
- drop_mmu_context(mm, cpu);
- }
- }
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
-{
- unsigned long flags;
- int size;
-
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- size = (size + 1) >> 1;
-
- local_irq_save(flags);
- if (size <= (current_cpu_data.tlbsize/2)) {
- int pid = read_c0_entryhi();
-
- start &= (PAGE_MASK << 1);
- end += ((PAGE_SIZE << 1) - 1);
- end &= (PAGE_MASK << 1);
-
- while (start < end) {
- int idx;
-
- write_c0_entryhi(start);
- start += (PAGE_SIZE << 1);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
- if (idx < 0)
- continue;
- tlb_write_indexed();
- }
- write_c0_entryhi(pid);
- } else {
- local_flush_tlb_all();
- }
- local_irq_restore(flags);
-}
-
-void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
- unsigned long flags;
- int cpu = smp_processor_id();
-
- local_irq_save(flags);
- if (cpu_context(cpu, vma->vm_mm) != 0) {
- int oldpid, newpid, idx;
- newpid = cpu_asid(cpu, vma->vm_mm);
- page &= (PAGE_MASK << 1);
- oldpid = read_c0_entryhi() & ASID_MASK;
- write_c0_entryhi(page | newpid);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if(idx < 0)
- goto finish;
- /* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
- tlb_write_indexed();
- finish:
- write_c0_entryhi(oldpid);
- }
- local_irq_restore(flags);
-}
-
-/*
- * This one is only used for pages with the global bit set so we don't care
- * much about the ASID.
- */
-void local_flush_tlb_one(unsigned long page)
-{
- unsigned long flags;
- int oldpid, idx;
-
- local_irq_save(flags);
- page &= (PAGE_MASK << 1);
- oldpid = read_c0_entryhi() & 0xff;
- write_c0_entryhi(page);
- tlb_probe();
- idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
- if (idx >= 0) {
- /* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
- tlb_write_indexed();
- }
- write_c0_entryhi(oldpid);
-
- local_irq_restore(flags);
-}
-
-/* All entries common to a mm share an asid. To effectively flush
- these entries, we just bump the asid. */
-void local_flush_tlb_mm(struct mm_struct *mm)
-{
- int cpu = smp_processor_id();
- if (cpu_context(cpu, mm) != 0) {
- drop_mmu_context(mm, cpu);
- }
-}
-
-/* Stolen from mips32 routines */
-
-void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
-{
- unsigned long flags;
- pgd_t *pgdp;
- pmd_t *pmdp;
- pte_t *ptep;
- int idx, pid;
-
- /*
- * Handle debugger faulting in for debugee.
- */
- if (current->active_mm != vma->vm_mm)
- return;
-
- local_irq_save(flags);
-
- pid = read_c0_entryhi() & ASID_MASK;
- address &= (PAGE_MASK << 1);
- write_c0_entryhi(address | (pid));
- pgdp = pgd_offset(vma->vm_mm, address);
- tlb_probe();
- pmdp = pmd_offset(pgdp, address);
- idx = read_c0_index();
- ptep = pte_offset_map(pmdp, address);
- write_c0_entrylo0(pte_val(*ptep++) >> 6);
- write_c0_entrylo1(pte_val(*ptep) >> 6);
- if (idx < 0) {
- tlb_write_random();
- } else {
- tlb_write_indexed();
- }
- local_irq_restore(flags);
-}
-
-/*
- * This is called from loadmmu.c. We have to set up all the
- * memory management function pointers, as well as initialize
- * the caches and tlbs
- */
-void sb1_tlb_init(void)
-{
- u32 config1;
-
- write_c0_pagemask(PM_4K);
- config1 = read_c0_config1();
- current_cpu_data.tlbsize = ((config1 >> 25) & 0x3f) + 1;
-
- /*
- * We don't know what state the firmware left the TLB's in, so this is
- * the ultra-conservative way to flush the TLB's and avoid machine
- * check exceptions due to duplicate TLB entries
- */
- sb1_sanitize_tlb();
-
- memcpy((void *)KSEG0 + 0x080, except_vec1_sb1, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x80);
-}
diff -Nru a/arch/mips64/mm/tlbex-r4k.S b/arch/mips64/mm/tlbex-r4k.S
--- a/arch/mips64/mm/tlbex-r4k.S Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,208 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/threads.h>
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/pgtable.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
- .data
- .comm pgd_current, NR_CPUS * 8, 8
-
- /*
- * After this macro runs we have a pointer to the pte of the address
- * that caused the fault in PTR.
- */
- .macro LOAD_PTE2, ptr, tmp, kaddr
-#ifdef CONFIG_SMP
- dmfc0 \ptr, CP0_CONTEXT
- dmfc0 \tmp, CP0_BADVADDR
- dsra \ptr, 23 # get pgd_current[cpu]
-#else
- dmfc0 \tmp, CP0_BADVADDR
- dla \ptr, pgd_current
-#endif
- bltz \tmp, \kaddr
- ld \ptr, (\ptr)
- dsrl \tmp, (PGDIR_SHIFT-3) # get pgd offset in bytes
- andi \tmp, ((PTRS_PER_PGD - 1)<<3)
- daddu \ptr, \tmp # add in pgd offset
- dmfc0 \tmp, CP0_BADVADDR
- ld \ptr, (\ptr) # get pmd pointer
- dsrl \tmp, (PMD_SHIFT-3) # get pmd offset in bytes
- andi \tmp, ((PTRS_PER_PMD - 1)<<3)
- daddu \ptr, \tmp # add in pmd offset
- dmfc0 \tmp, CP0_XCONTEXT
- ld \ptr, (\ptr) # get pte pointer
- andi \tmp, 0xff0 # get pte offset
- daddu \ptr, \tmp
- .endm
-
-
- /*
- * Ditto for the kernel table.
- */
- .macro LOAD_KPTE2, ptr, tmp, not_vmalloc
- /*
- * First, determine that the address is in/above vmalloc range.
- */
- dmfc0 \tmp, CP0_BADVADDR
- dli \ptr, VMALLOC_START
-
- /*
- * Now find offset into kptbl.
- */
- dsubu \tmp, \tmp, \ptr
- dla \ptr, kptbl
- dsrl \tmp, (PAGE_SHIFT+1) # get vpn2
- dsll \tmp, 4 # byte offset of pte
- daddu \ptr, \ptr, \tmp
-
- /*
- * Determine that fault address is within vmalloc range.
- */
- dla \tmp, ekptbl
- slt \tmp, \ptr, \tmp
- beqz \tmp, \not_vmalloc # not vmalloc
- nop
- .endm
-
-
- /*
- * This places the even/odd pte pair in the page table at the pte
- * entry pointed to by PTE into ENTRYLO0 and ENTRYLO1.
- */
- .macro PTE_RELOAD, pte0, pte1
- dsrl \pte0, 6 # convert to entrylo0
- dmtc0 \pte0, CP0_ENTRYLO0 # load it
- dsrl \pte1, 6 # convert to entrylo1
- dmtc0 \pte1, CP0_ENTRYLO1 # load it
- .endm
-
-
- .text
- .set noreorder
- .set mips3
-
- __INIT
-
- .align 5
-LEAF(except_vec0_generic)
- .set noat
- PANIC("Unused vector called")
-1: b 1b
- nop
-END(except_vec0_generic)
-
-
- /*
- * TLB refill handlers for the R4000 and SB1.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r4k)
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-END(except_vec1_r4k)
-
-LEAF(except_vec1_sb1)
-#if BCM1250_M3_WAR
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-
-1: eret
- nop
-END(except_vec1_sb1)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r4k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- b 1f
- tlbwr
-1: nop
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- b 1f
- tlbwr
-1: nop
- eret
-END(handle_vec1_r4k)
-
-
- __INIT
-
- /*
- * TLB refill handler for the R10000.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r10k)
- .set noat
- dla k0, handle_vec1_r10k
- jr k0
- nop
-END(except_vec1_r10k)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r10k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-END(handle_vec1_r10k)
-
-
- .align 5
-LEAF(invalid_vmalloc_address)
- .set noat
- PANIC("Invalid kernel address")
-1: b 1b
- nop
-END(invalid_vmalloc_address)
diff -Nru a/arch/mips64/vmlinux.lds.S b/arch/mips64/vmlinux.lds.S
--- a/arch/mips64/vmlinux.lds.S Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,174 +0,0 @@
-#include <asm-generic/vmlinux.lds.h>
-
-#undef mips /* CPP really sucks for this job */
-#define mips mips
-OUTPUT_ARCH(mips)
-ENTRY(kernel_entry)
-jiffies = jiffies_64;
-SECTIONS
-{
-#ifdef CONFIG_BOOT_ELF64
- /* Read-only sections, merged into text segment: */
- /* . = 0xc000000000000000; */
-
- /* This is the value for an Origin kernel, taken from an IRIX kernel. */
- /* . = 0xc00000000001c000; */
-
- /* Set the vaddr for the text segment to a value
- >= 0xa800 0000 0001 9000 if no symmon is going to configured
- >= 0xa800 0000 0030 0000 otherwise */
-
- /* . = 0xa800000000300000; */
- /* . = 0xa800000000300000; */
- . = 0xffffffff80300000;
-#endif
- . = LOADADDR;
- /* read-only */
- _text = .; /* Text and read-only data */
- .text : {
- *(.text)
- *(.fixup)
- *(.gnu.warning)
- } =0
-
- _etext = .; /* End of text section */
-
- . = ALIGN(16); /* Exception table */
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- __start___dbe_table = .; /* Exception table for data bus errors */
- __dbe_table : { *(__dbe_table) }
- __stop___dbe_table = .;
-
- RODATA
-
- . = ALIGN(64);
-
- /* writeable */
- .data : { /* Data */
- *(.data)
-
- /* Align the initial ramdisk image (INITRD) on page boundaries. */
- . = ALIGN(4096);
- __rd_start = .;
- *(.initrd)
- . = ALIGN(4096);
- __rd_end = .;
-
- CONSTRUCTORS
- }
- _gp = . + 0x8000;
- .lit8 : { *(.lit8) }
- .lit4 : { *(.lit4) }
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata : { *(.sdata) }
-
- . = ALIGN(4096);
- __nosave_begin = .;
- .data_nosave : { *(.data.nosave) }
- . = ALIGN(4096);
- __nosave_end = .;
-
- . = ALIGN(4096);
- .data.page_aligned : { *(.data.idt) }
-
- . = ALIGN(32);
- .data.cacheline_aligned : { *(.data.cacheline_aligned) }
-
- _edata = .; /* End of data section */
-
- . = ALIGN(16384); /* init_task */
- . = . + MAPPED_OFFSET; /* for CONFIG_MAPPED_KERNEL */
- .data.init_task : { *(.data.init_task) }
-
- /* will be freed after init */
- . = ALIGN(4096); /* Init code and data */
- __init_begin = .;
- /* /DISCARD/ doesn't work for .reginfo */
- .reginfo : { *(.reginfo) }
- .init.text : {
- _sinittext = .;
- *(.init.text)
- _einittext = .;
- }
- .init.data : { *(.init.data) }
- . = ALIGN(16);
- __setup_start = .;
- .init.setup : { *(.init.setup) }
- __setup_end = .;
- __start___param = .;
- __param : { *(__param) }
- __stop___param = .;
- __initcall_start = .;
- .initcall.init : {
- *(.initcall1.init)
- *(.initcall2.init)
- *(.initcall3.init)
- *(.initcall4.init)
- *(.initcall5.init)
- *(.initcall6.init)
- *(.initcall7.init)
- }
- __initcall_end = .;
- __con_initcall_start = .;
- .con_initcall.init : { *(.con_initcall.init) }
- __con_initcall_end = .;
- SECURITY_INIT
- . = ALIGN(4096);
- __initramfs_start = .;
- .init.ramfs : { *(.init.ramfs) }
- __initramfs_end = .;
- . = ALIGN(32);
- __per_cpu_start = .;
- .data.percpu : { *(.data.percpu) }
- __per_cpu_end = .;
- . = ALIGN(4096);
- __init_end = .;
- /* freed after init ends here */
-
- __bss_start = .; /* BSS */
- .sbss : {
- *(.sbss)
- *(.scommon)
- }
- .bss : {
- *(.bss)
- *(COMMON)
- }
- __bss_stop = .;
-
- _end = . ;
-
- /* Sections to be discarded */
- /DISCARD/ : {
- *(.exit.text)
- *(.exit.data)
- *(.exitcall.exit)
- }
-
- /* This is the MIPS specific mdebug section. */
- .mdebug : { *(.mdebug) }
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- /* DWARF debug sections.
- Symbols in the .debug DWARF section are relative to the beginning of the
- section so we begin .debug at 0. It's not clear yet what needs to happen
- for the others. */
- .debug 0 : { *(.debug) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .line 0 : { *(.line) }
- /* These must appear regardless of . */
- .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
- .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
- .comment : { *(.comment) }
- .note : { *(.note) }
-}
diff -Nru a/arch/parisc/Kconfig b/arch/parisc/Kconfig
--- a/arch/parisc/Kconfig Sun Aug 3 13:14:49 2003
+++ b/arch/parisc/Kconfig Sun Aug 3 13:14:49 2003
@@ -215,42 +215,8 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
source "net/bluetooth/Kconfig"
@@ -295,6 +261,15 @@
If you don't debug the kernel, you can say N, but we may not be able
to solve problems without frame pointers.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
endmenu
source "security/Kconfig"
diff -Nru a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
--- a/arch/parisc/kernel/pci.c Sun Aug 3 13:14:44 2003
+++ b/arch/parisc/kernel/pci.c Sun Aug 3 13:14:44 2003
@@ -328,7 +328,7 @@
unsigned long mask, align;
DBG_RES("pcibios_align_resource(%s, (%p) [%lx,%lx]/%x, 0x%lx, 0x%lx)\n",
- ((struct pci_dev *) data)->slot_name,
+ pci_name(((struct pci_dev *) data)),
res->parent, res->start, res->end,
(int) res->flags, size, alignment);
@@ -397,7 +397,7 @@
if (dev->bus->bridge_ctl & PCI_BRIDGE_CTL_FAST_BACK)
cmd |= PCI_COMMAND_FAST_BACK;
#endif
- DBGC("PCIBIOS: Enabling device %s cmd 0x%04x\n", dev->slot_name, cmd);
+ DBGC("PCIBIOS: Enabling device %s cmd 0x%04x\n", pci_name(dev), cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
return 0;
}
diff -Nru a/arch/ppc/8xx_io/cs4218_tdm.c b/arch/ppc/8xx_io/cs4218_tdm.c
--- a/arch/ppc/8xx_io/cs4218_tdm.c Sun Aug 3 13:14:45 2003
+++ b/arch/ppc/8xx_io/cs4218_tdm.c Sun Aug 3 13:14:45 2003
@@ -2696,24 +2696,24 @@
switch (ints[0]) {
case 3:
if ((ints[3] < 0) || (ints[3] > MAX_CATCH_RADIUS))
- printk("dmasound_setup: illegal catch radius, using default = %d\n", catchRadius);
+ printk("dmasound_setup: invalid catch radius, using default = %d\n", catchRadius);
else
catchRadius = ints[3];
/* fall through */
case 2:
if (ints[1] < MIN_BUFFERS)
- printk("dmasound_setup: illegal number of buffers, using default = %d\n", numBufs);
+ printk("dmasound_setup: invalid number of buffers, using default = %d\n", numBufs);
else
numBufs = ints[1];
if (ints[2] < MIN_BUFSIZE || ints[2] > MAX_BUFSIZE)
- printk("dmasound_setup: illegal buffer size, using default = %d\n", bufSize);
+ printk("dmasound_setup: invalid buffer size, using default = %d\n", bufSize);
else
bufSize = ints[2];
break;
case 0:
break;
default:
- printk("dmasound_setup: illegal number of arguments\n");
+ printk("dmasound_setup: invalid number of arguments\n");
}
}
diff -Nru a/arch/ppc/Kconfig b/arch/ppc/Kconfig
--- a/arch/ppc/Kconfig Sun Aug 3 13:14:53 2003
+++ b/arch/ppc/Kconfig Sun Aug 3 13:14:53 2003
@@ -1342,45 +1342,8 @@
source "fs/Kconfig"
-
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
-source "sound/oss/dmasound/Kconfig"
-
source "sound/Kconfig"
-endmenu
-
source "arch/ppc/8xx_io/Kconfig"
source "arch/ppc/8260_io/Kconfig"
@@ -1464,6 +1427,15 @@
debugger. See <http://kgdb.sourceforge.net/> for more information.
Unless you are intending to debug the kernel, say N here.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
choice
prompt "Serial Port"
depends on KGDB
diff -Nru a/arch/ppc/boot/openfirmware/Makefile b/arch/ppc/boot/openfirmware/Makefile
--- a/arch/ppc/boot/openfirmware/Makefile Sun Aug 3 13:14:47 2003
+++ b/arch/ppc/boot/openfirmware/Makefile Sun Aug 3 13:14:47 2003
@@ -50,7 +50,7 @@
$(images)/ramdisk.image.gz:
@echo ' MISSING $@'
- @echo ' RAM disk image must be provided seperatly'
+ @echo ' RAM disk image must be provided separately'
@/bin/false
objcpxmon-$(CONFIG_XMON) := --add-section=.sysmap=System.map \
diff -Nru a/arch/ppc/configs/IVMS8_defconfig b/arch/ppc/configs/IVMS8_defconfig
--- a/arch/ppc/configs/IVMS8_defconfig Sun Aug 3 13:14:50 2003
+++ b/arch/ppc/configs/IVMS8_defconfig Sun Aug 3 13:14:50 2003
@@ -159,7 +159,6 @@
CONFIG_IDE_8xx_PCCARD=y
# CONFIG_IDE_8xx_DIRECT is not set
# CONFIG_IDE_EXT_DIRECT is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/ppc/configs/TQM860L_defconfig b/arch/ppc/configs/TQM860L_defconfig
--- a/arch/ppc/configs/TQM860L_defconfig Sun Aug 3 13:14:47 2003
+++ b/arch/ppc/configs/TQM860L_defconfig Sun Aug 3 13:14:47 2003
@@ -160,7 +160,6 @@
CONFIG_IDE_8xx_PCCARD=y
# CONFIG_IDE_8xx_DIRECT is not set
# CONFIG_IDE_EXT_DIRECT is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/ppc/configs/common_defconfig b/arch/ppc/configs/common_defconfig
--- a/arch/ppc/configs/common_defconfig Sun Aug 3 13:14:46 2003
+++ b/arch/ppc/configs/common_defconfig Sun Aug 3 13:14:46 2003
@@ -218,8 +218,6 @@
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_PDC202XX=y
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/ppc/configs/pmac_defconfig b/arch/ppc/configs/pmac_defconfig
--- a/arch/ppc/configs/pmac_defconfig Sun Aug 3 13:14:52 2003
+++ b/arch/ppc/configs/pmac_defconfig Sun Aug 3 13:14:52 2003
@@ -224,8 +224,6 @@
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_PDC202XX=y
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/ppc/defconfig b/arch/ppc/defconfig
--- a/arch/ppc/defconfig Sun Aug 3 13:14:51 2003
+++ b/arch/ppc/defconfig Sun Aug 3 13:14:51 2003
@@ -219,7 +219,6 @@
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI support
diff -Nru a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
--- a/arch/ppc/kernel/pci.c Sun Aug 3 13:14:48 2003
+++ b/arch/ppc/kernel/pci.c Sun Aug 3 13:14:48 2003
@@ -117,7 +117,7 @@
unsigned long offset;
if (!hose) {
- printk(KERN_ERR "No hose for PCI dev %s!\n", dev->slot_name);
+ printk(KERN_ERR "No hose for PCI dev %s!\n", pci_name(dev));
return;
}
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
@@ -126,7 +126,7 @@
continue;
if (!res->start || res->end == 0xffffffff) {
DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n",
- dev->slot_name, i, res->start, res->end);
+ pci_name(dev), i, res->start, res->end);
res->end -= res->start;
res->start = 0;
res->flags |= IORESOURCE_UNSET;
@@ -144,7 +144,7 @@
res->end += offset;
#ifdef DEBUG
printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n",
- i, res->flags, dev->slot_name,
+ i, res->flags, pci_name(dev),
res->start - offset, res->start);
#endif
}
@@ -231,7 +231,7 @@
if (size > 0x100) {
printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", dev->slot_name,
+ " (%ld bytes)\n", pci_name(dev),
dev->resource - res, size);
}
@@ -522,7 +522,7 @@
} else {
DBG(KERN_ERR "PCI: ugh, bridge %s res %d has flags=%lx\n",
- dev->slot_name, i, res->flags);
+ pci_name(dev), i, res->flags);
}
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
@@ -532,11 +532,11 @@
struct resource *pr, *r = &dev->resource[idx];
DBG("PCI:%s: Resource %d: %08lx-%08lx (f=%lx)\n",
- dev->slot_name, idx, r->start, r->end, r->flags);
+ pci_name(dev), idx, r->start, r->end, r->flags);
pr = pci_find_parent_resource(dev, r);
if (!pr || request_resource(pr, r) < 0) {
printk(KERN_ERR "PCI: Cannot allocate resource region %d"
- " of device %s\n", idx, dev->slot_name);
+ " of device %s\n", idx, pci_name(dev));
if (pr)
DBG("PCI: parent is %p: %08lx-%08lx (f=%lx)\n",
pr, pr->start, pr->end, pr->flags);
@@ -576,7 +576,7 @@
if (r->flags & PCI_ROM_ADDRESS_ENABLE) {
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
u32 reg;
- DBG("PCI: Switching off ROM of %s\n", dev->slot_name);
+ DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, ®);
pci_write_config_dword(dev, dev->rom_base_reg,
@@ -643,7 +643,7 @@
r = &dev->resource[idx];
if (r->flags & IORESOURCE_UNSET) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -654,7 +654,7 @@
if (dev->resource[PCI_ROM_RESOURCE].start)
cmd |= PCI_COMMAND_MEMORY;
if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd);
+ printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
@@ -1409,7 +1409,7 @@
for (idx=0; idx<6; idx++) {
r = &dev->resource[idx];
if (r->flags & IORESOURCE_UNSET) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -1419,7 +1419,7 @@
}
if (cmd != old_cmd) {
printk("PCI: Enabling device %s (%04x -> %04x)\n",
- dev->slot_name, old_cmd, cmd);
+ pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
diff -Nru a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
--- a/arch/ppc/kernel/setup.c Sun Aug 3 13:14:52 2003
+++ b/arch/ppc/kernel/setup.c Sun Aug 3 13:14:52 2003
@@ -572,11 +572,21 @@
}
#endif /* CONFIG_NVRAM */
+static struct cpu cpu_devices[NR_CPUS];
+
int __init ppc_init(void)
{
+ int i;
+
/* clear the progress line */
if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
-
+
+ /* register CPU devices */
+ for (i = 0; i < NR_CPUS; i++)
+ if (cpu_possible(i))
+ register_cpu(&cpu_devices[i], i, NULL);
+
+ /* call platform init */
if (ppc_md.init != NULL) {
ppc_md.init();
}
diff -Nru a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
--- a/arch/ppc/platforms/pmac_cpufreq.c Sun Aug 3 13:14:49 2003
+++ b/arch/ppc/platforms/pmac_cpufreq.c Sun Aug 3 13:14:49 2003
@@ -1,4 +1,16 @@
+/*
+ * arch/ppc/platforms/pmac_cpufreq.c
+ *
+ * Copyright (C) 2002 - 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
#include <linux/config.h>
+#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/kernel.h>
@@ -36,6 +48,18 @@
#define PMAC_CPU_LOW_SPEED 1
#define PMAC_CPU_HIGH_SPEED 0
+/* There are only two frequency states for each processor. Values
+ * are in kHz for the time being.
+ */
+#define CPUFREQ_HIGH PMAC_CPU_HIGH_SPEED
+#define CPUFREQ_LOW PMAC_CPU_LOW_SPEED
+
+static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
+ {CPUFREQ_HIGH, 0},
+ {CPUFREQ_LOW, 0},
+ {0, CPUFREQ_TABLE_END},
+};
+
static inline void
wakeup_decrementer(void)
{
@@ -192,37 +216,21 @@
static int __pmac
pmac_cpufreq_verify(struct cpufreq_policy *policy)
{
- if (!policy)
- return -EINVAL;
-
- policy->cpu = 0; /* UP only */
-
- cpufreq_verify_within_limits(policy, low_freq, hi_freq);
-
- if ((policy->min > low_freq) &&
- (policy->max < hi_freq))
- policy->max = hi_freq;
-
- return 0;
+ return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
}
static int __pmac
-pmac_cpufreq_setpolicy(struct cpufreq_policy *policy)
+pmac_cpufreq_target( struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
{
- int rc;
-
- if (!policy)
+ unsigned int newstate = 0;
+
+ if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
+ target_freq, relation, &newstate))
return -EINVAL;
- if (policy->min > low_freq)
- rc = do_set_cpu_speed(PMAC_CPU_HIGH_SPEED);
- else if (policy->max < hi_freq)
- rc = do_set_cpu_speed(PMAC_CPU_LOW_SPEED);
- else if (policy->policy == CPUFREQ_POLICY_POWERSAVE)
- rc = do_set_cpu_speed(PMAC_CPU_LOW_SPEED);
- else
- rc = do_set_cpu_speed(PMAC_CPU_HIGH_SPEED);
- return rc;
+ return do_set_cpu_speed(newstate);
}
unsigned int __pmac
@@ -232,6 +240,27 @@
return (i == 0) ? cur_freq : 0;
}
+static int __pmac
+pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+ if (policy->cpu != 0)
+ return -ENODEV;
+
+ policy->policy = (cur_freq == low_freq) ?
+ CPUFREQ_POLICY_POWERSAVE : CPUFREQ_POLICY_PERFORMANCE;
+ policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+ policy->cur = cur_freq;
+
+ return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]);
+}
+
+static struct cpufreq_driver pmac_cpufreq_driver = {
+ .verify = pmac_cpufreq_verify,
+ .target = pmac_cpufreq_target,
+ .init = pmac_cpufreq_cpu_init,
+ .name = "powermac",
+ .owner = THIS_MODULE,
+};
/* Currently, we support the following machines:
*
@@ -244,13 +273,9 @@
pmac_cpufreq_setup(void)
{
struct device_node *cpunode;
- struct cpufreq_driver *driver;
u32 *value;
int has_freq_ctl = 0;
- int rc;
- memset(&driver, 0, sizeof(driver));
-
/* Assume only one CPU */
cpunode = find_type_devices("cpu");
if (!cpunode)
@@ -318,34 +343,11 @@
if (!has_freq_ctl)
return -ENODEV;
- /* initialization of main "cpufreq" code*/
- driver = kmalloc(sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL);
- if (!driver)
- return -ENOMEM;
-
- driver->policy = (struct cpufreq_policy *) (driver + 1);
-
- driver->verify = &pmac_cpufreq_verify;
- driver->setpolicy = &pmac_cpufreq_setpolicy;
- driver->init = NULL;
- driver->exit = NULL;
- strlcpy(driver->name, "powermac", sizeof(driver->name));
-
- driver->policy[0].cpu = 0;
- driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL;
- driver->policy[0].cpuinfo.min_freq = low_freq;
- driver->policy[0].min = low_freq;
- driver->policy[0].max = cur_freq;
- driver->policy[0].cpuinfo.max_freq = cur_freq;
- driver->policy[0].policy = (cur_freq == low_freq) ?
- CPUFREQ_POLICY_POWERSAVE : CPUFREQ_POLICY_PERFORMANCE;
-
- rc = cpufreq_register_driver(driver);
- if (rc)
- kfree(driver);
- return rc;
+ pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
+ pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
+
+ return cpufreq_register_driver(&pmac_cpufreq_driver);
}
-__initcall(pmac_cpufreq_setup);
+module_init(pmac_cpufreq_setup);
diff -Nru a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
--- a/arch/ppc/syslib/open_pic.c Sun Aug 3 13:14:49 2003
+++ b/arch/ppc/syslib/open_pic.c Sun Aug 3 13:14:49 2003
@@ -133,16 +133,16 @@
#if 1
#define check_arg_ipi(ipi) \
if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
- printk("open_pic.c:%d: illegal ipi %d\n", __LINE__, ipi);
+ printk("open_pic.c:%d: invalid ipi %d\n", __LINE__, ipi);
#define check_arg_timer(timer) \
if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
- printk("open_pic.c:%d: illegal timer %d\n", __LINE__, timer);
+ printk("open_pic.c:%d: invalid timer %d\n", __LINE__, timer);
#define check_arg_vec(vec) \
if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
- printk("open_pic.c:%d: illegal vector %d\n", __LINE__, vec);
+ printk("open_pic.c:%d: invalid vector %d\n", __LINE__, vec);
#define check_arg_pri(pri) \
if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
- printk("open_pic.c:%d: illegal priority %d\n", __LINE__, pri);
+ printk("open_pic.c:%d: invalid priority %d\n", __LINE__, pri);
/*
* Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
* data has probably been corrupted and we're going to panic or deadlock later
@@ -151,11 +151,11 @@
#define check_arg_irq(irq) \
if (irq < open_pic_irq_offset || irq >= NumSources+open_pic_irq_offset \
|| ISR[irq - open_pic_irq_offset] == 0) { \
- printk("open_pic.c:%d: illegal irq %d\n", __LINE__, irq); \
+ printk("open_pic.c:%d: invalid irq %d\n", __LINE__, irq); \
dump_stack(); }
#define check_arg_cpu(cpu) \
if (cpu < 0 || cpu >= NumProcessors){ \
- printk("open_pic.c:%d: illegal cpu %d\n", __LINE__, cpu); \
+ printk("open_pic.c:%d: invalid cpu %d\n", __LINE__, cpu); \
dump_stack(); }
#else
#define check_arg_ipi(ipi) do {} while (0)
diff -Nru a/arch/ppc64/Kconfig b/arch/ppc64/Kconfig
--- a/arch/ppc64/Kconfig Sun Aug 3 13:14:49 2003
+++ b/arch/ppc64/Kconfig Sun Aug 3 13:14:49 2003
@@ -286,42 +286,8 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
source "net/bluetooth/Kconfig"
@@ -421,6 +387,15 @@
bool "Include PPCDBG realtime debugging"
depends on DEBUG_KERNEL
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
endmenu
source "security/Kconfig"
diff -Nru a/arch/ppc64/kernel/eeh.c b/arch/ppc64/kernel/eeh.c
--- a/arch/ppc64/kernel/eeh.c Sun Aug 3 13:14:50 2003
+++ b/arch/ppc64/kernel/eeh.c Sun Aug 3 13:14:50 2003
@@ -116,7 +116,7 @@
dn->eeh_config_addr, BUID_HI(dn->phb->buid), BUID_LO(dn->phb->buid));
if (ret == 0 && rets[1] == 1 && rets[0] >= 2) {
panic("EEH: MMIO failure (%ld) on device:\n %s %s\n",
- rets[0], dev->slot_name, dev->dev.name);
+ rets[0], pci_name(dev), dev->dev.name);
}
}
eeh_false_positives++;
diff -Nru a/arch/ppc64/kernel/open_pic.c b/arch/ppc64/kernel/open_pic.c
--- a/arch/ppc64/kernel/open_pic.c Sun Aug 3 13:14:49 2003
+++ b/arch/ppc64/kernel/open_pic.c Sun Aug 3 13:14:49 2003
@@ -96,16 +96,16 @@
#if 0
#define check_arg_ipi(ipi) \
if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
- printk(KERN_ERR "open_pic.c:%d: illegal ipi %d\n", __LINE__, ipi);
+ printk(KERN_ERR "open_pic.c:%d: invalid ipi %d\n", __LINE__, ipi);
#define check_arg_timer(timer) \
if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
- printk(KERN_ERR "open_pic.c:%d: illegal timer %d\n", __LINE__, timer);
+ printk(KERN_ERR "open_pic.c:%d: invalid timer %d\n", __LINE__, timer);
#define check_arg_vec(vec) \
if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
- printk(KERN_ERR "open_pic.c:%d: illegal vector %d\n", __LINE__, vec);
+ printk(KERN_ERR "open_pic.c:%d: invalid vector %d\n", __LINE__, vec);
#define check_arg_pri(pri) \
if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
- printk(KERN_ERR "open_pic.c:%d: illegal priority %d\n", __LINE__, pri);
+ printk(KERN_ERR "open_pic.c:%d: invalid priority %d\n", __LINE__, pri);
/*
* Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
* data has probably been corrupted and we're going to panic or deadlock later
@@ -113,11 +113,11 @@
*/
#define check_arg_irq(irq) \
if (irq < open_pic_irq_offset || irq >= (NumSources+open_pic_irq_offset)){ \
- printk(KERN_ERR "open_pic.c:%d: illegal irq %d\n", __LINE__, irq); \
+ printk(KERN_ERR "open_pic.c:%d: invalid irq %d\n", __LINE__, irq); \
dump_stack(); }
#define check_arg_cpu(cpu) \
if (cpu < 0 || cpu >= OPENPIC_MAX_PROCESSORS){ \
- printk(KERN_ERR "open_pic.c:%d: illegal cpu %d\n", __LINE__, cpu); \
+ printk(KERN_ERR "open_pic.c:%d: invalid cpu %d\n", __LINE__, cpu); \
dump_stack(); }
#else
#define check_arg_ipi(ipi) do {} while (0)
diff -Nru a/arch/ppc64/kernel/pSeries_pci.c b/arch/ppc64/kernel/pSeries_pci.c
--- a/arch/ppc64/kernel/pSeries_pci.c Sun Aug 3 13:14:53 2003
+++ b/arch/ppc64/kernel/pSeries_pci.c Sun Aug 3 13:14:53 2003
@@ -149,18 +149,18 @@
pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &intpin);
if (intpin == 0) {
- PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Interrupt used by device.\n", pci_dev->slot_name);
+ PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Interrupt used by device.\n", pci_name(pci_dev));
return 0;
}
node = pci_device_to_OF_node(pci_dev);
if (node == NULL) {
PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s Device Node not found.\n",
- pci_dev->slot_name);
+ pci_name(pci_dev));
return -1;
}
if (node->n_intrs == 0) {
- PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Device OF interrupts defined.\n", pci_dev->slot_name);
+ PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Device OF interrupts defined.\n", pci_name(pci_dev));
return -1;
}
pci_dev->irq = node->intrs[0].line;
@@ -173,7 +173,7 @@
pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq);
PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s pci_dev->irq = 0x%02X\n",
- pci_dev->slot_name, pci_dev->irq);
+ pci_name(pci_dev), pci_dev->irq);
return 0;
}
diff -Nru a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c
--- a/arch/ppc64/kernel/pci.c Sun Aug 3 13:14:52 2003
+++ b/arch/ppc64/kernel/pci.c Sun Aug 3 13:14:52 2003
@@ -325,7 +325,7 @@
/* Cache the location of the ISA bridge (if we have one) */
ppc64_isabridge_dev = pci_find_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
if (ppc64_isabridge_dev != NULL)
- printk("ISA bridge at %s\n", ppc64_isabridge_dev->slot_name);
+ printk("ISA bridge at %s\n", pci_name(ppc64_isabridge_dev));
printk("PCI: Probing PCI hardware done\n");
//ppc64_boot_msg(0x41, "PCI Done");
@@ -363,7 +363,7 @@
if (cmd != oldcmd) {
printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
- dev->slot_name, cmd);
+ pci_name(dev), cmd);
/* Enable the appropriate bits in the PCI command register. */
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
diff -Nru a/arch/s390/Kconfig b/arch/s390/Kconfig
--- a/arch/s390/Kconfig Sun Aug 3 13:14:47 2003
+++ b/arch/s390/Kconfig Sun Aug 3 13:14:47 2003
@@ -306,6 +306,15 @@
symbolic stack backtraces. This increases the size of the kernel
somewhat, as all symbols have to be loaded into the kernel image.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
config DEBUG_SPINLOCK_SLEEP
bool "Sleep-inside-spinlock checking"
help
diff -Nru a/arch/sh/Kconfig b/arch/sh/Kconfig
--- a/arch/sh/Kconfig Sun Aug 3 13:14:53 2003
+++ b/arch/sh/Kconfig Sun Aug 3 13:14:53 2003
@@ -1179,41 +1179,7 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-
-endmenu
source "drivers/usb/Kconfig"
diff -Nru a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
--- a/arch/sh/boards/mpc1211/pci.c Sun Aug 3 13:14:51 2003
+++ b/arch/sh/boards/mpc1211/pci.c Sun Aug 3 13:14:51 2003
@@ -264,11 +264,11 @@
}
if( irq < 0 ) {
- PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", dev->slot_name);
+ PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
return irq;
}
- PCIDBG(2, "Setting IRQ for slot %s to %d\n", dev->slot_name, irq);
+ PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
return irq;
}
diff -Nru a/arch/sh/boards/overdrive/galileo.c b/arch/sh/boards/overdrive/galileo.c
--- a/arch/sh/boards/overdrive/galileo.c Sun Aug 3 13:14:46 2003
+++ b/arch/sh/boards/overdrive/galileo.c Sun Aug 3 13:14:46 2003
@@ -446,7 +446,7 @@
*/
if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
return;
- printk("PCI: IDE base address fixup for %s\n", d->slot_name);
+ printk("PCI: IDE base address fixup for %s\n", pci_name(d));
for(i=0; i<4; i++) {
struct resource *r = &d->resource[i];
if ((r->start & ~0x80) == 0x374) {
@@ -518,7 +518,7 @@
printk(KERN_ERR
"PCI: Device %s not available because"
" of resource collisions\n",
- dev->slot_name);
+ pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -528,7 +528,7 @@
}
if (cmd != old_cmd) {
printk("PCI: enabling device %s (%04x -> %04x)\n",
- dev->slot_name, old_cmd, cmd);
+ pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
@@ -589,6 +589,6 @@
lat = pcibios_max_latency;
else
return;
- printk("PCI: Setting latency timer of device %s to %d\n", dev->slot_name, lat);
+ printk("PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
}
diff -Nru a/arch/sh/configs/defconfig-adx b/arch/sh/configs/defconfig-adx
--- a/arch/sh/configs/defconfig-adx Sun Aug 3 13:14:48 2003
+++ b/arch/sh/configs/defconfig-adx Sun Aug 3 13:14:48 2003
@@ -147,7 +147,6 @@
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/sh/configs/defconfig-cqreek b/arch/sh/configs/defconfig-cqreek
--- a/arch/sh/configs/defconfig-cqreek Sun Aug 3 13:14:50 2003
+++ b/arch/sh/configs/defconfig-cqreek Sun Aug 3 13:14:50 2003
@@ -145,7 +145,6 @@
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
diff -Nru a/arch/sh/configs/defconfig-dreamcast b/arch/sh/configs/defconfig-dreamcast
--- a/arch/sh/configs/defconfig-dreamcast Sun Aug 3 13:14:49 2003
+++ b/arch/sh/configs/defconfig-dreamcast Sun Aug 3 13:14:49 2003
@@ -163,7 +163,6 @@
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set
#
diff -Nru a/arch/sh/defconfig b/arch/sh/defconfig
--- a/arch/sh/defconfig Sun Aug 3 13:14:49 2003
+++ b/arch/sh/defconfig Sun Aug 3 13:14:49 2003
@@ -110,7 +110,6 @@
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_IDE_MODES is not set
#
# SCSI support
diff -Nru a/arch/sh/kernel/cpu/sh4/pci-sh7751.c b/arch/sh/kernel/cpu/sh4/pci-sh7751.c
--- a/arch/sh/kernel/cpu/sh4/pci-sh7751.c Sun Aug 3 13:14:51 2003
+++ b/arch/sh/kernel/cpu/sh4/pci-sh7751.c Sun Aug 3 13:14:51 2003
@@ -226,7 +226,7 @@
*/
if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
return;
- PCIDBG(3,"PCI: IDE base address fixup for %s\n", d->slot_name);
+ PCIDBG(3,"PCI: IDE base address fixup for %s\n", pci_name(d));
for(i=0; i<4; i++) {
struct resource *r = &d->resource[i];
if ((r->start & ~0x80) == 0x374) {
@@ -370,7 +370,7 @@
continue;
pr = pci_find_parent_resource(dev, r);
if (!pr || request_resource(pr, r) < 0)
- printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, dev->slot_name);
+ printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev));
}
}
pcibios_allocate_bus_resources(&bus->children);
@@ -402,7 +402,7 @@
r->start, r->end, r->flags, disabled, pass);
pr = pci_find_parent_resource(dev, r);
if (!pr || request_resource(pr, r) < 0) {
- printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, dev->slot_name);
+ printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev));
/* We'll assign a new address later */
r->end -= r->start;
r->start = 0;
@@ -414,7 +414,7 @@
if (r->flags & PCI_ROM_ADDRESS_ENABLE) {
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
u32 reg;
- PCIDBG(3,"PCI: Switching off ROM of %s\n", dev->slot_name);
+ PCIDBG(3,"PCI: Switching off ROM of %s\n", pci_name(dev));
r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, ®);
pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
@@ -497,7 +497,7 @@
return irq;
}
- PCIDBG(2,"Setting IRQ for slot %s to %d\n", dev->slot_name, irq);
+ PCIDBG(2,"Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
return irq;
}
diff -Nru a/arch/sh/kernel/cpu/sh4/pci-st40.c b/arch/sh/kernel/cpu/sh4/pci-st40.c
--- a/arch/sh/kernel/cpu/sh4/pci-st40.c Sun Aug 3 13:14:49 2003
+++ b/arch/sh/kernel/cpu/sh4/pci-st40.c Sun Aug 3 13:14:49 2003
@@ -151,7 +151,7 @@
*/
if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
return;
- printk("PCI: IDE base address fixup for %s\n", d->slot_name);
+ printk("PCI: IDE base address fixup for %s\n", pci_name(d));
for(i=0; i<4; i++) {
struct resource *r = &d->resource[i];
if ((r->start & ~0x80) == 0x374) {
diff -Nru a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
--- a/arch/sh/kernel/pci.c Sun Aug 3 13:14:51 2003
+++ b/arch/sh/kernel/pci.c Sun Aug 3 13:14:51 2003
@@ -71,7 +71,7 @@
pci_read_config_dword(dev, reg, &check);
if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
printk(KERN_ERR "PCI: Error while updating region "
- "%s/%d (%08x != %08x)\n", dev->slot_name, resource,
+ "%s/%d (%08x != %08x)\n", pci_name(dev), resource,
new, check);
}
}
@@ -110,7 +110,7 @@
for(idx=0; idx<6; idx++) {
r = &dev->resource[idx];
if (!r->start && r->end) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
diff -Nru a/arch/sh/kernel/pcibios.c b/arch/sh/kernel/pcibios.c
--- a/arch/sh/kernel/pcibios.c Sun Aug 3 13:14:47 2003
+++ b/arch/sh/kernel/pcibios.c Sun Aug 3 13:14:47 2003
@@ -54,7 +54,7 @@
for(idx=0; idx<6; idx++) {
r = &dev->resource[idx];
if (!r->start && r->end) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
diff -Nru a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c
--- a/arch/sh/mm/cache-sh2.c Sun Aug 3 13:14:47 2003
+++ b/arch/sh/mm/cache-sh2.c Sun Aug 3 13:14:47 2003
@@ -62,7 +62,7 @@
cpu_data->dcache.flags = 0;
/*
- * SH-2 doesn't have seperate caches
+ * SH-2 doesn't have separate caches
*/
cpu_data->dcache.flags |= SH_CACHE_COMBINED;
cpu_data->icache = cpu_data->dcache;
diff -Nru a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
--- a/arch/sh/mm/cache-sh3.c Sun Aug 3 13:14:44 2003
+++ b/arch/sh/mm/cache-sh3.c Sun Aug 3 13:14:44 2003
@@ -78,7 +78,7 @@
}
/*
- * SH-3 doesn't have seperate caches
+ * SH-3 doesn't have separate caches
*/
cpu_data->dcache.flags |= SH_CACHE_COMBINED;
cpu_data->icache = cpu_data->dcache;
diff -Nru a/arch/sparc/Kconfig b/arch/sparc/Kconfig
--- a/arch/sparc/Kconfig Sun Aug 3 13:14:44 2003
+++ b/arch/sparc/Kconfig Sun Aug 3 13:14:44 2003
@@ -541,42 +541,7 @@
source "fs/Kconfig"
-
-menu "Sound card support"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-
-endmenu
source "drivers/usb/Kconfig"
diff -Nru a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
--- a/arch/sparc64/Kconfig Sun Aug 3 13:14:52 2003
+++ b/arch/sparc64/Kconfig Sun Aug 3 13:14:52 2003
@@ -741,44 +741,6 @@
endmenu
-menu "Video For Linux"
-
-config VIDEO_DEV
- tristate "Video For Linux"
- ---help---
- Support for audio/video capture and overlay devices and FM radio
- cards. The exact capabilities of each device vary. User tools for
- this are available from
- <ftp://ftp.uk.linux.org/pub/linux/video4linux/>.
-
- If you are interested in writing a driver for such an audio/video
- device or user software interacting with such a driver, please read
- the file <file:Documentation/video4linux/API.html>.
-
- This driver is also available as a module called videodev ( = code
- which can be inserted in and removed from the running kernel
- whenever you want). If you want to compile it as a module, say M
- here and read <file:Documentation/modules.txt>.
-
-config VIDEO_BT848
- tristate "BT848 Video For Linux"
- depends on PCI && VIDEO_DEV
- ---help---
- Support for BT848 based frame grabber/overlay boards. This includes
- the Miro, Hauppauge and STB boards. Please read the material in
- <file:Documentation/video4linux/bttv> for more information.
-
- If you say Y or M here, you need to say Y or M to "I2C support" and
- "I2C bit-banging interfaces" in the character device section.
-
- This driver is available as a module called bttv ( = code
- which can be inserted in and removed from the running kernel
- whenever you want). If you want to compile it as a module, say M
- here and read <file:Documentation/modules.txt>.
-
-endmenu
-
-
menu "XFree86 DRI support"
config DRM
@@ -819,45 +781,14 @@
source "drivers/input/Kconfig"
-source "fs/Kconfig"
-
+source "drivers/i2c/Kconfig"
-menu "Sound"
+source "fs/Kconfig"
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
+source "drivers/media/Kconfig"
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
source "net/bluetooth/Kconfig"
@@ -947,6 +878,15 @@
bool "D-cache flush debugging"
depends on DEBUG_KERNEL
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
config STACK_DEBUG
bool "Stack Overflow Detection Support"
diff -Nru a/arch/sparc64/defconfig b/arch/sparc64/defconfig
--- a/arch/sparc64/defconfig Sun Aug 3 13:14:47 2003
+++ b/arch/sparc64/defconfig Sun Aug 3 13:14:47 2003
@@ -20,6 +20,8 @@
CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -51,7 +53,6 @@
# CONFIG_CPU_FREQ_24_API is not set
CONFIG_SPARC64=y
CONFIG_HOTPLUG=y
-CONFIG_HAVE_DEC_LOCK=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_SBUS=y
@@ -267,8 +268,6 @@
CONFIG_BLK_DEV_VIA82CXXX=m
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_PDC202XX=y
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI device support
@@ -383,6 +382,7 @@
#
# Device Drivers
#
+CONFIG_IEEE1394_PCILYNX=m
CONFIG_IEEE1394_OHCI1394=m
#
@@ -594,6 +594,7 @@
CONFIG_BRIDGE_EBT_VLAN=m
CONFIG_BRIDGE_EBT_MARK=m
CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
CONFIG_BRIDGE_EBT_SNAT=m
CONFIG_BRIDGE_EBT_DNAT=m
CONFIG_BRIDGE_EBT_REDIRECT=m
@@ -717,6 +718,15 @@
CONFIG_YELLOWFIN=m
CONFIG_R8169=m
CONFIG_SK98LIN=m
+CONFIG_CONFIG_SK98LIN_T1=y
+CONFIG_CONFIG_SK98LIN_T2=y
+CONFIG_CONFIG_SK98LIN_T3=y
+CONFIG_CONFIG_SK98LIN_T4=y
+CONFIG_CONFIG_SK98LIN_T5=y
+CONFIG_CONFIG_SK98LIN_T6=y
+CONFIG_CONFIG_SK98LIN_T7=y
+CONFIG_CONFIG_SK98LIN_T8=y
+CONFIG_CONFIG_SK98LIN_T9=y
CONFIG_TIGON3=m
#
@@ -924,12 +934,6 @@
CONFIG_UNIX98_PTY_COUNT=256
#
-# Video For Linux
-#
-CONFIG_VIDEO_DEV=y
-# CONFIG_VIDEO_BT848 is not set
-
-#
# XFree86 DRI support
#
CONFIG_DRM=y
@@ -985,6 +989,43 @@
# CONFIG_INPUT_UINPUT is not set
#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_PROSAVAGE=m
+CONFIG_I2C_PHILIPSPAR=m
+CONFIG_SCx200_ACB=m
+CONFIG_I2C_ALGOPCF=m
+# CONFIG_I2C_ELEKTOR is not set
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Hardware Sensors Mainboard support
+#
+CONFIG_I2C_ALI1535=m
+CONFIG_I2C_ALI15X3=m
+CONFIG_I2C_AMD756=m
+CONFIG_I2C_AMD8111=m
+CONFIG_I2C_I801=m
+CONFIG_I2C_NFORCE2=m
+CONFIG_I2C_PIIX4=m
+CONFIG_I2C_SIS96X=m
+CONFIG_I2C_VIAPRO=m
+
+#
+# I2C Hardware Sensors Chip support
+#
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_I2C_SENSOR=m
+
+#
# File systems
#
CONFIG_EXT2_FS=y
@@ -1147,6 +1188,90 @@
# CONFIG_NLS_UTF8 is not set
#
+# Multimedia devices
+#
+CONFIG_VIDEO_DEV=y
+
+#
+# Video For Linux
+#
+CONFIG_VIDEO_PROC_FS=y
+
+#
+# Video Adapters
+#
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_W9966=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA_PP=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_TUNER_3036=m
+# CONFIG_VIDEO_STRADIS is not set
+# CONFIG_VIDEO_ZORAN is not set
+# CONFIG_VIDEO_ZR36120 is not set
+CONFIG_VIDEO_SAA7134=m
+CONFIG_VIDEO_MXB=m
+CONFIG_VIDEO_DPC=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+
+#
+# Radio Adapters
+#
+CONFIG_RADIO_GEMTEK_PCI=m
+CONFIG_RADIO_MAXIRADIO=m
+CONFIG_RADIO_MAESTRO=m
+
+#
+# Digital Video Broadcasting Devices
+#
+CONFIG_DVB=y
+CONFIG_DVB_CORE=m
+
+#
+# Supported Frontend Modules
+#
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_ALPS_BSRV2=m
+CONFIG_DVB_ALPS_TDLB7=m
+CONFIG_DVB_ALPS_TDMB7=m
+CONFIG_DVB_ATMEL_AT76C651=m
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_GRUNDIG_29504_491=m
+CONFIG_DVB_GRUNDIG_29504_401=m
+CONFIG_DVB_MT312=m
+CONFIG_DVB_VES1820=m
+# CONFIG_DVB_TDA1004X is not set
+
+#
+# Supported SAA7146 based PCI Adapters
+#
+# CONFIG_DVB_AV7110 is not set
+CONFIG_DVB_BUDGET=m
+CONFIG_DVB_BUDGET_CI=m
+CONFIG_DVB_BUDGET_AV=m
+CONFIG_DVB_BUDGET_PATCH=m
+
+#
+# Supported USB Adapters
+#
+# CONFIG_DVB_TTUSB_BUDGET is not set
+# CONFIG_DVB_TTUSB_DEC is not set
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+CONFIG_DVB_B2C2_SKYSTAR=m
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_VIDEOBUF=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_BUF=m
+CONFIG_VIDEO_BTCX=m
+
+#
# Sound
#
CONFIG_SOUND=m
@@ -1424,9 +1549,11 @@
# CONFIG_DEBUG_SLAB is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_HAVE_DEC_LOCK=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_DCFLUSH is not set
+# CONFIG_DEBUG_INFO is not set
# CONFIG_STACK_DEBUG is not set
#
diff -Nru a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
--- a/arch/sparc64/kernel/pci.c Sun Aug 3 13:14:44 2003
+++ b/arch/sparc64/kernel/pci.c Sun Aug 3 13:14:44 2003
@@ -191,7 +191,7 @@
static struct {
char *model_name;
void (*init)(int, char *);
-} pci_controller_table[] = {
+} pci_controller_table[] __initdata = {
{ "SUNW,sabre", sabre_init },
{ "pci108e,a000", sabre_init },
{ "pci108e,a001", sabre_init },
@@ -207,7 +207,7 @@
#define PCI_NUM_CONTROLLER_TYPES (sizeof(pci_controller_table) / \
sizeof(pci_controller_table[0]))
-static int pci_controller_init(char *model_name, int namelen, int node)
+static int __init pci_controller_init(char *model_name, int namelen, int node)
{
int i;
@@ -226,7 +226,7 @@
return 0;
}
-static int pci_is_controller(char *model_name, int namelen, int node)
+static int __init pci_is_controller(char *model_name, int namelen, int node)
{
int i;
@@ -240,8 +240,7 @@
return 0;
}
-
-static int pci_controller_scan(int (*handler)(char *, int, int))
+static int __init pci_controller_scan(int (*handler)(char *, int, int))
{
char namebuf[64];
int node;
@@ -278,7 +277,7 @@
/* Is there some PCI controller in the system? */
-int pcic_present(void)
+int __init pcic_present(void)
{
return pci_controller_scan(pci_is_controller);
}
@@ -288,14 +287,14 @@
* pci_controller_root. Setup the controller enough such
* that bus scanning can be done.
*/
-static void pci_controller_probe(void)
+static void __init pci_controller_probe(void)
{
printk("PCI: Probing for controllers.\n");
pci_controller_scan(pci_controller_init);
}
-static void pci_scan_each_controller_bus(void)
+static void __init pci_scan_each_controller_bus(void)
{
struct pci_controller_info *p;
unsigned long flags;
diff -Nru a/arch/sparc64/kernel/pci_iommu.c b/arch/sparc64/kernel/pci_iommu.c
--- a/arch/sparc64/kernel/pci_iommu.c Sun Aug 3 13:14:45 2003
+++ b/arch/sparc64/kernel/pci_iommu.c Sun Aug 3 13:14:45 2003
@@ -825,5 +825,8 @@
}
}
+ if (device_mask >= (1UL << 32UL))
+ return 0;
+
return (device_mask & dma_addr_mask) == dma_addr_mask;
}
diff -Nru a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
--- a/arch/sparc64/kernel/pci_schizo.c Sun Aug 3 13:14:50 2003
+++ b/arch/sparc64/kernel/pci_schizo.c Sun Aug 3 13:14:50 2003
@@ -333,7 +333,7 @@
struct ino_bucket *bucket;
unsigned long imap, iclr;
unsigned long imap_off, iclr_off;
- int pil;
+ int pil, ign_fixup;
ino &= PCI_IRQ_INO;
imap_off = schizo_imap_offset(ino);
@@ -356,8 +356,17 @@
* there is only one IMAP register for each PCI slot even
* though four different INOs can be generated by each
* PCI slot.
+ *
+ * But, for JBUS variants (essentially, Tomatillo), we have
+ * to fixup the lowest bit of the interrupt group number.
*/
- bucket = __bucket(build_irq(pil, 0, iclr, imap));
+ ign_fixup = 0;
+ if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
+ if (pbm->portid & 1)
+ ign_fixup = (1 << 6);
+ }
+
+ bucket = __bucket(build_irq(pil, ign_fixup, iclr, imap));
bucket->flags |= IBF_PCI;
return __irq(bucket);
@@ -1063,6 +1072,20 @@
#define SCHIZO_PCICTRL_ARB_S (0x3fUL << 0UL) /* Safari */
#define SCHIZO_PCICTRL_ARB_T (0xffUL << 0UL) /* Tomatillo */
+struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino)
+{
+ ino &= IMAP_INO;
+ if (p->pbm_A.ino_bitmap & (1UL << ino))
+ return &p->pbm_A;
+ if (p->pbm_B.ino_bitmap & (1UL << ino))
+ return &p->pbm_B;
+ prom_printf("TOMATILLO%d: No entry in ino bitmap for %d\n",
+ p->index, ino);
+ prom_halt();
+ /* NOTREACHED */
+ return NULL;
+}
+
/* How the Tomatillo IRQs are routed around is pure guesswork here.
*
* All the Tomatillo devices I see in prtconf dumps seem to have only
@@ -1082,18 +1105,15 @@
struct pci_pbm_info *pbm;
unsigned int irq;
struct ino_bucket *bucket;
- u64 tmp, err_mask;
- int is_pbm_a;
-
- pbm = &p->pbm_B;
- is_pbm_a = 0;
+ u64 tmp, err_mask, err_no_mask;
/* Build IRQs and register handlers. */
+ pbm = pbm_for_ino(p, SCHIZO_UE_INO);
irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO);
if (request_irq(irq, schizo_ue_intr,
SA_SHIRQ, "TOMATILLO UE", p) < 0) {
- prom_printf("TOMATILLO%d: Cannot register UE interrupt.\n",
- p->index);
+ prom_printf("%s: Cannot register UE interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
@@ -1101,11 +1121,12 @@
upa_writel(tmp, (pbm->pbm_regs +
schizo_imap_offset(SCHIZO_UE_INO) + 4));
+ pbm = pbm_for_ino(p, SCHIZO_CE_INO);
irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO);
if (request_irq(irq, schizo_ce_intr,
SA_SHIRQ, "TOMATILLO CE", p) < 0) {
- prom_printf("TOMATILLO%d: Cannot register CE interrupt.\n",
- p->index);
+ prom_printf("%s: Cannot register CE interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
@@ -1113,14 +1134,12 @@
upa_writel(tmp, (pbm->pbm_regs +
schizo_imap_offset(SCHIZO_CE_INO) + 4));
- pbm = &p->pbm_A;
- is_pbm_a = 1;
-
+ pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) |
SCHIZO_PCIERR_A_INO));
if (request_irq(irq, schizo_pcierr_intr,
SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) {
- prom_printf("%s: Cannot register PciERR interrupt.\n",
+ prom_printf("%s: Cannot register PBM A PciERR interrupt.\n",
pbm->name);
prom_halt();
}
@@ -1129,14 +1148,12 @@
upa_writel(tmp, (pbm->pbm_regs +
schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
- pbm = &p->pbm_B;
- is_pbm_a = 0;
-
+ pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) |
SCHIZO_PCIERR_B_INO));
if (request_irq(irq, schizo_pcierr_intr,
SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) {
- prom_printf("%s: Cannot register PciERR interrupt.\n",
+ prom_printf("%s: Cannot register PBM B PciERR interrupt.\n",
pbm->name);
prom_halt();
}
@@ -1145,6 +1162,7 @@
upa_writel(tmp, (pbm->pbm_regs +
schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
+ pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO);
if (request_irq(irq, schizo_safarierr_intr,
SA_SHIRQ, "TOMATILLO SERR", p) < 0) {
@@ -1174,16 +1192,19 @@
err_mask = (SCHIZO_PCICTRL_BUS_UNUS |
SCHIZO_PCICTRL_TTO_ERR |
SCHIZO_PCICTRL_RTRY_ERR |
- SCHIZO_PCICTRL_DTO_ERR |
SCHIZO_PCICTRL_SERR |
SCHIZO_PCICTRL_EEN);
+ err_no_mask = SCHIZO_PCICTRL_DTO_ERR;
+
tmp = schizo_read(p->pbm_A.pbm_regs + SCHIZO_PCI_CTRL);
tmp |= err_mask;
+ tmp &= ~err_no_mask;
schizo_write(p->pbm_A.pbm_regs + SCHIZO_PCI_CTRL, tmp);
tmp = schizo_read(p->pbm_B.pbm_regs + SCHIZO_PCI_CTRL);
tmp |= err_mask;
+ tmp &= ~err_no_mask;
schizo_write(p->pbm_B.pbm_regs + SCHIZO_PCI_CTRL, tmp);
err_mask = (SCHIZO_PCIAFSR_PMA | SCHIZO_PCIAFSR_PTA |
@@ -1219,70 +1240,74 @@
static void __init schizo_register_error_handlers(struct pci_controller_info *p)
{
- struct pci_pbm_info *pbm_a = &p->pbm_A;
- struct pci_pbm_info *pbm_b = &p->pbm_B;
+ struct pci_pbm_info *pbm;
unsigned int irq;
struct ino_bucket *bucket;
- u64 tmp, err_mask;
+ u64 tmp, err_mask, err_no_mask;
/* Build IRQs and register handlers. */
- irq = schizo_irq_build(pbm_b, NULL, (pbm_b->portid << 6) | SCHIZO_UE_INO);
+ pbm = pbm_for_ino(p, SCHIZO_UE_INO);
+ irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO);
if (request_irq(irq, schizo_ue_intr,
SA_SHIRQ, "SCHIZO UE", p) < 0) {
- prom_printf("SCHIZO%d: Cannot register UE interrupt.\n",
- p->index);
+ prom_printf("%s: Cannot register UE interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
tmp = readl(bucket->imap);
- upa_writel(tmp, (pbm_b->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
+ upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
- irq = schizo_irq_build(pbm_b, NULL, (pbm_b->portid << 6) | SCHIZO_CE_INO);
+ pbm = pbm_for_ino(p, SCHIZO_CE_INO);
+ irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO);
if (request_irq(irq, schizo_ce_intr,
SA_SHIRQ, "SCHIZO CE", p) < 0) {
- prom_printf("SCHIZO%d: Cannot register CE interrupt.\n",
- p->index);
+ prom_printf("%s: Cannot register CE interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
tmp = upa_readl(bucket->imap);
- upa_writel(tmp, (pbm_b->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
+ upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
- irq = schizo_irq_build(pbm_a, NULL, (pbm_a->portid << 6) | SCHIZO_PCIERR_A_INO);
+ pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
+ irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO);
if (request_irq(irq, schizo_pcierr_intr,
- SA_SHIRQ, "SCHIZO PCIERR", pbm_a) < 0) {
- prom_printf("SCHIZO%d(PBMA): Cannot register PciERR interrupt.\n",
- p->index);
+ SA_SHIRQ, "SCHIZO PCIERR", pbm) < 0) {
+ prom_printf("%s: Cannot register PBM A PciERR interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
tmp = upa_readl(bucket->imap);
- upa_writel(tmp, (pbm_a->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
+ upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
- irq = schizo_irq_build(pbm_b, NULL, (pbm_b->portid << 6) | SCHIZO_PCIERR_B_INO);
+ pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
+ irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO);
if (request_irq(irq, schizo_pcierr_intr,
- SA_SHIRQ, "SCHIZO PCIERR", pbm_b) < 0) {
- prom_printf("SCHIZO%d(PBMB): Cannot register PciERR interrupt.\n",
- p->index);
+ SA_SHIRQ, "SCHIZO PCIERR", &p->pbm_B) < 0) {
+ prom_printf("%s: Cannot register PBM B PciERR interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
tmp = upa_readl(bucket->imap);
- upa_writel(tmp, (pbm_b->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
+ upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
- irq = schizo_irq_build(pbm_b, NULL, (pbm_b->portid << 6) | SCHIZO_SERR_INO);
+ pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
+ irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO);
if (request_irq(irq, schizo_safarierr_intr,
SA_SHIRQ, "SCHIZO SERR", p) < 0) {
- prom_printf("SCHIZO%d(PBMB): Cannot register SafariERR interrupt.\n",
- p->index);
+ prom_printf("%s: Cannot register SafariERR interrupt.\n",
+ pbm->name);
prom_halt();
}
bucket = __bucket(irq);
tmp = upa_readl(bucket->imap);
- upa_writel(tmp, (pbm_b->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
+ upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
/* Enable UE and CE interrupts for controller. */
- schizo_write(pbm_a->controller_regs + SCHIZO_ECC_CTRL,
+ schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
(SCHIZO_ECCCTRL_EE |
SCHIZO_ECCCTRL_UE |
SCHIZO_ECCCTRL_CE));
@@ -1291,20 +1316,22 @@
SCHIZO_PCICTRL_ESLCK |
SCHIZO_PCICTRL_TTO_ERR |
SCHIZO_PCICTRL_RTRY_ERR |
- SCHIZO_PCICTRL_DTO_ERR |
SCHIZO_PCICTRL_SBH_ERR |
SCHIZO_PCICTRL_SERR |
SCHIZO_PCICTRL_SBH_INT |
SCHIZO_PCICTRL_EEN);
+ err_no_mask = SCHIZO_PCICTRL_DTO_ERR;
+
/* Enable PCI Error interrupts and clear error
* bits for each PBM.
*/
- tmp = schizo_read(pbm_a->pbm_regs + SCHIZO_PCI_CTRL);
+ tmp = schizo_read(p->pbm_A.pbm_regs + SCHIZO_PCI_CTRL);
tmp |= err_mask;
- schizo_write(pbm_a->pbm_regs + SCHIZO_PCI_CTRL, tmp);
+ tmp &= ~err_no_mask;
+ schizo_write(p->pbm_A.pbm_regs + SCHIZO_PCI_CTRL, tmp);
- schizo_write(pbm_a->pbm_regs + SCHIZO_PCI_AFSR,
+ schizo_write(p->pbm_A.pbm_regs + SCHIZO_PCI_AFSR,
(SCHIZO_PCIAFSR_PMA | SCHIZO_PCIAFSR_PTA |
SCHIZO_PCIAFSR_PRTRY | SCHIZO_PCIAFSR_PPERR |
SCHIZO_PCIAFSR_PTTO | SCHIZO_PCIAFSR_PUNUS |
@@ -1312,11 +1339,12 @@
SCHIZO_PCIAFSR_SRTRY | SCHIZO_PCIAFSR_SPERR |
SCHIZO_PCIAFSR_STTO | SCHIZO_PCIAFSR_SUNUS));
- tmp = schizo_read(pbm_b->pbm_regs + SCHIZO_PCI_CTRL);
+ tmp = schizo_read(p->pbm_B.pbm_regs + SCHIZO_PCI_CTRL);
tmp |= err_mask;
- schizo_write(pbm_b->pbm_regs + SCHIZO_PCI_CTRL, tmp);
+ tmp &= ~err_no_mask;
+ schizo_write(p->pbm_B.pbm_regs + SCHIZO_PCI_CTRL, tmp);
- schizo_write(pbm_b->pbm_regs + SCHIZO_PCI_AFSR,
+ schizo_write(p->pbm_B.pbm_regs + SCHIZO_PCI_AFSR,
(SCHIZO_PCIAFSR_PMA | SCHIZO_PCIAFSR_PTA |
SCHIZO_PCIAFSR_PRTRY | SCHIZO_PCIAFSR_PPERR |
SCHIZO_PCIAFSR_PTTO | SCHIZO_PCIAFSR_PUNUS |
@@ -1349,10 +1377,10 @@
BUS_ERROR_CPU0PS | BUS_ERROR_CPU0PB);
#endif
- schizo_write(pbm_a->controller_regs + SCHIZO_SAFARI_ERRCTRL,
+ schizo_write(p->pbm_A.controller_regs + SCHIZO_SAFARI_ERRCTRL,
(SCHIZO_SAFERRCTRL_EN | err_mask));
- schizo_write(pbm_a->controller_regs + SCHIZO_SAFARI_IRQCTRL,
+ schizo_write(p->pbm_A.controller_regs + SCHIZO_SAFARI_IRQCTRL,
(SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP)));
}
@@ -1616,8 +1644,40 @@
static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
{
struct pci_iommu *iommu = pbm->iommu;
- unsigned long tsbbase, i, tagbase, database;
+ unsigned long tsbbase, i, tagbase, database, order;
+ u32 vdma[2], dma_mask;
u64 control;
+ int err, tsbsize;
+
+ err = prom_getproperty(pbm->prom_node, "virtual-dma",
+ (char *)&vdma[0], sizeof(vdma));
+ if (err == 0 || err == -1) {
+ /* No property, use default values. */
+ vdma[0] = 0xc0000000;
+ vdma[1] = 0x40000000;
+ }
+
+ dma_mask = vdma[0];
+ switch (vdma[1]) {
+ case 0x20000000:
+ dma_mask |= 0x1fffffff;
+ tsbsize = 64;
+ break;
+
+ case 0x40000000:
+ dma_mask |= 0x3fffffff;
+ tsbsize = 128;
+ break;
+
+ case 0x80000000:
+ dma_mask |= 0x7fffffff;
+ tsbsize = 128;
+ break;
+
+ default:
+ prom_printf("SCHIZO: strange virtual-dma size.\n");
+ prom_halt();
+ };
/* Setup initial software IOMMU state. */
spin_lock_init(&iommu->lock);
@@ -1656,16 +1716,32 @@
* table (128K ioptes * 8 bytes per iopte). This is
* page order 7 on UltraSparc.
*/
- tsbbase = __get_free_pages(GFP_KERNEL, get_order(IO_TSB_SIZE));
+ order = get_order(tsbsize * 8 * 1024);
+ tsbbase = __get_free_pages(GFP_KERNEL, order);
if (!tsbbase) {
prom_printf("%s: Error, gfp(tsb) failed.\n", pbm->name);
prom_halt();
}
+
iommu->page_table = (iopte_t *)tsbbase;
- iommu->page_table_sz_bits = 17;
- iommu->page_table_map_base = 0xc0000000;
- iommu->dma_addr_mask = 0xffffffff;
- memset((char *)tsbbase, 0, IO_TSB_SIZE);
+ iommu->page_table_map_base = vdma[0];
+ iommu->dma_addr_mask = dma_mask;
+ memset((char *)tsbbase, 0, PAGE_SIZE << order);
+
+ switch (tsbsize) {
+ case 64:
+ iommu->page_table_sz_bits = 16;
+ break;
+
+ case 128:
+ iommu->page_table_sz_bits = 17;
+ break;
+
+ default:
+ prom_printf("iommu_init: Illegal TSB size %d\n", tsbsize);
+ prom_halt();
+ break;
+ };
/* We start with no consistent mappings. */
iommu->lowest_consistent_map =
@@ -1680,7 +1756,16 @@
control = schizo_read(iommu->iommu_control);
control &= ~(SCHIZO_IOMMU_CTRL_TSBSZ | SCHIZO_IOMMU_CTRL_TBWSZ);
- control |= (SCHIZO_IOMMU_TSBSZ_128K | SCHIZO_IOMMU_CTRL_ENAB);
+ switch (tsbsize) {
+ case 64:
+ control |= SCHIZO_IOMMU_TSBSZ_64K;
+ break;
+ case 128:
+ control |= SCHIZO_IOMMU_TSBSZ_128K;
+ break;
+ };
+
+ control |= SCHIZO_IOMMU_CTRL_ENAB;
schizo_write(iommu->iommu_control, control);
}
@@ -1738,11 +1823,12 @@
else
tmp |= 0xff;
+ tmp &= ~SCHIZO_PCICTRL_PTO;
if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO &&
- pbm->chip_version == 0x2) {
- tmp &= ~SCHIZO_PCICTRL_PTO;
+ pbm->chip_version == 0x2)
tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT;
- }
+ else
+ tmp |= 0x1UL << SCHIZO_PCICTRL_PTO_SHIFT;
if (!prom_getbool(pbm->prom_node, "no-bus-parking"))
tmp |= SCHIZO_PCICTRL_PARK;
@@ -1781,6 +1867,7 @@
unsigned int busrange[2];
struct pci_pbm_info *pbm;
const char *chipset_name;
+ u32 ino_bitmap[2];
int is_pbm_a;
int err;
@@ -1893,6 +1980,16 @@
pbm->num_pbm_intmap = 0;
memset(&pbm->pbm_intmask, 0, sizeof(pbm->pbm_intmask));
}
+
+ err = prom_getproperty(prom_node, "ino-bitmap",
+ (char *) &ino_bitmap[0],
+ sizeof(ino_bitmap));
+ if (err == 0 || err == -1) {
+ prom_printf("%s: Fatal error, no ino-bitmap.\n", pbm->name);
+ prom_halt();
+ }
+ pbm->ino_bitmap = (((u64)ino_bitmap[1] << 32UL) |
+ ((u64)ino_bitmap[0] << 0UL));
err = prom_getproperty(prom_node, "bus-range",
(char *)&busrange[0],
diff -Nru a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
--- a/arch/sparc64/kernel/process.c Sun Aug 3 13:14:47 2003
+++ b/arch/sparc64/kernel/process.c Sun Aug 3 13:14:47 2003
@@ -209,6 +209,8 @@
rw->ins[0], rw->ins[1], rw->ins[2], rw->ins[3]);
printk("i4: %016lx i5: %016lx i6: %016lx i7: %016lx\n",
rw->ins[4], rw->ins[5], rw->ins[6], rw->ins[7]);
+ if (regs->tstate & TSTATE_PRIV)
+ print_symbol("I7: <%s>\n", rw->ins[7]);
}
void show_stackframe(struct sparc_stackf *sf)
@@ -298,6 +300,7 @@
printk("o4: %016lx o5: %016lx sp: %016lx ret_pc: %016lx\n",
regs->u_regs[12], regs->u_regs[13], regs->u_regs[14],
regs->u_regs[15]);
+ print_symbol("RPC: <%s>\n", regs->u_regs[15]);
show_regwindow(regs);
#ifdef CONFIG_SMP
spin_unlock(®dump_lock);
diff -Nru a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
--- a/arch/sparc64/kernel/sys_sparc32.c Sun Aug 3 13:14:50 2003
+++ b/arch/sparc64/kernel/sys_sparc32.c Sun Aug 3 13:14:50 2003
@@ -1987,6 +1987,7 @@
bprm.file = file;
bprm.filename = filename;
+ bprm.interp = filename;
bprm.sh_bang = 0;
bprm.loader = 0;
bprm.exec = 0;
diff -Nru a/arch/sparc64/lib/Makefile b/arch/sparc64/lib/Makefile
--- a/arch/sparc64/lib/Makefile Sun Aug 3 13:14:45 2003
+++ b/arch/sparc64/lib/Makefile Sun Aug 3 13:14:45 2003
@@ -9,5 +9,7 @@
memscan.o strncpy_from_user.o strlen_user.o memcmp.o checksum.o \
VIScopy.o VISbzero.o VISmemset.o VIScsum.o VIScsumcopy.o \
VIScsumcopyusr.o VISsave.o atomic.o rwlock.o bitops.o \
- dec_and_lock.o U3memcpy.o U3copy_from_user.o U3copy_to_user.o \
+ U3memcpy.o U3copy_from_user.o U3copy_to_user.o \
U3copy_in_user.o mcount.o ipcsum.o rwsem.o xor.o
+
+lib-$(CONFIG_HAVE_DEC_LOCK) += dec_and_lock.o
diff -Nru a/arch/sparc64/lib/dec_and_lock.S b/arch/sparc64/lib/dec_and_lock.S
--- a/arch/sparc64/lib/dec_and_lock.S Sun Aug 3 13:14:48 2003
+++ b/arch/sparc64/lib/dec_and_lock.S Sun Aug 3 13:14:48 2003
@@ -7,7 +7,6 @@
#include <linux/config.h>
#include <asm/thread_info.h>
-#ifndef CONFIG_DEBUG_SPINLOCK
.text
.align 64
@@ -76,5 +75,3 @@
ba,pt %xcc, to_zero
nop
nop
-
-#endif /* !(CONFIG_DEBUG_SPINLOCK) */
diff -Nru a/arch/um/Kconfig b/arch/um/Kconfig
--- a/arch/um/Kconfig Sun Aug 3 13:14:48 2003
+++ b/arch/um/Kconfig Sun Aug 3 13:14:48 2003
@@ -221,7 +221,7 @@
config DEBUG_SPINLOCK
bool "Debug spinlocks usage"
-config DEBUGSYM
+config DEBUG_INFO
bool "Enable kernel debugging symbols"
help
When this is enabled, the User-Mode Linux binary will include
@@ -234,15 +234,15 @@
config FRAME_POINTER
bool
- default y if DEBUGSYM
+ default y if DEBUG_INFO
config PT_PROXY
bool "Enable ptrace proxy"
- depends on XTERM_CHAN && DEBUGSYM
+ depends on XTERM_CHAN && DEBUG_INFO
config GPROF
bool "Enable gprof support"
- depends on DEBUGSYM
+ depends on DEBUG_INFO
help
This allows profiling of a User-Mode Linux kernel with the gprof
utility.
@@ -255,7 +255,7 @@
config GCOV
bool "Enable gcov support"
- depends on DEBUGSYM
+ depends on DEBUG_INFO
help
This option allows developers to retrieve coverage data from a UML
session.
diff -Nru a/arch/um/Makefile b/arch/um/Makefile
--- a/arch/um/Makefile Sun Aug 3 13:14:49 2003
+++ b/arch/um/Makefile Sun Aug 3 13:14:49 2003
@@ -13,11 +13,9 @@
# EXTRAVERSION...
MODLIB := $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE)
-ifeq ($(CONFIG_DEBUGSYM),y)
+ifeq ($(CONFIG_DEBUG_INFO),y)
CFLAGS := $(subst -fomit-frame-pointer,,$(CFLAGS))
endif
-
-CFLAGS-$(CONFIG_DEBUGSYM) += -g
core-y += $(ARCH_DIR)/kernel/ \
$(ARCH_DIR)/drivers/ \
diff -Nru a/arch/um/config.release b/arch/um/config.release
--- a/arch/um/config.release Sun Aug 3 13:14:52 2003
+++ b/arch/um/config.release Sun Aug 3 13:14:52 2003
@@ -329,7 +329,7 @@
# Kernel hacking
#
# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUGSYM is not set
+# CONFIG_DEBUG_INFO is not set
# CONFIG_PT_PROXY is not set
# CONFIG_GPROF is not set
# CONFIG_GCOV is not set
diff -Nru a/arch/um/defconfig b/arch/um/defconfig
--- a/arch/um/defconfig Sun Aug 3 13:14:50 2003
+++ b/arch/um/defconfig Sun Aug 3 13:14:50 2003
@@ -399,7 +399,7 @@
#
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
-CONFIG_DEBUGSYM=y
+CONFIG_DEBUG_INFO=y
CONFIG_FRAME_POINTER=y
CONFIG_PT_PROXY=y
# CONFIG_GPROF is not set
diff -Nru a/arch/v850/Kconfig b/arch/v850/Kconfig
--- a/arch/v850/Kconfig Sun Aug 3 13:14:48 2003
+++ b/arch/v850/Kconfig Sun Aug 3 13:14:48 2003
@@ -331,41 +331,7 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-
-endmenu
source "drivers/usb/Kconfig"
diff -Nru a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c
--- a/arch/v850/kernel/rte_mb_a_pci.c Sun Aug 3 13:14:46 2003
+++ b/arch/v850/kernel/rte_mb_a_pci.c Sun Aug 3 13:14:46 2003
@@ -231,7 +231,7 @@
r = &dev->resource[idx];
if (!r->start && r->end) {
printk(KERN_ERR "PCI: Device %s not available because "
- "of resource collisions\n", dev->slot_name);
+ "of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
@@ -241,7 +241,7 @@
}
if (cmd != old_cmd) {
printk("PCI: Enabling device %s (%04x -> %04x)\n",
- dev->slot_name, old_cmd, cmd);
+ pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
diff -Nru a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
--- a/arch/x86_64/Kconfig Sun Aug 3 13:14:51 2003
+++ b/arch/x86_64/Kconfig Sun Aug 3 13:14:51 2003
@@ -443,43 +443,8 @@
source "drivers/video/Kconfig"
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/Introduction>. The file
- <file:Documentation/sound/oss/README.OSS> contains some slightly
- outdated but still useful information as well. Newer sound
- driver documentation is found in <file:Documentation/sound/alsa/*>.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want)
- and load that module after the PnP configuration is finished. To do
- this, say M here and read <file:Documentation/modules.txt> as well
- as <file:Documentation/sound/oss/README.modules>; the module will be
- called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
source "sound/Kconfig"
-endmenu
-
source "drivers/usb/Kconfig"
source "net/bluetooth/Kconfig"
@@ -540,6 +505,15 @@
Fill __init and __initdata at the end of boot. This helps debugging
illegal uses of __init and __initdata after initialization.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
config FRAME_POINTER
bool "Compile the kernel with frame pointers"
help
diff -Nru a/arch/x86_64/defconfig b/arch/x86_64/defconfig
--- a/arch/x86_64/defconfig Sun Aug 3 13:14:50 2003
+++ b/arch/x86_64/defconfig Sun Aug 3 13:14:50 2003
@@ -24,8 +24,11 @@
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
@@ -135,6 +138,7 @@
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
@@ -163,6 +167,7 @@
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_BLK_DEV_IDESCSI is not set
# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IDE_TASKFILE_IO is not set
#
# IDE chipset support/bugfixes
@@ -204,7 +209,6 @@
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
-CONFIG_BLK_DEV_IDE_MODES=y
#
# SCSI device support
@@ -322,7 +326,7 @@
# CONFIG_XFRM_USER is not set
#
-# SCTP Configuration (EXPERIMENTAL)
+# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
@@ -379,7 +383,6 @@
CONFIG_AMD8111_ETH=y
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
-# CONFIG_TC35815 is not set
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
@@ -727,6 +730,9 @@
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_ALI5455 is not set
+# CONFIG_SOUND_FORTE is not set
+# CONFIG_SOUND_AD1980 is not set
#
# USB support
@@ -753,10 +759,8 @@
CONFIG_MAGIC_SYSRQ=y
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_INIT_DEBUG is not set
-CONFIG_KALLSYMS=y
# CONFIG_FRAME_POINTER is not set
-CONFIG_IOMMU_DEBUG=y
-CONFIG_IOMMU_LEAK=y
+# CONFIG_IOMMU_DEBUG is not set
CONFIG_MCE_DEBUG=y
#
diff -Nru a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c
--- a/arch/x86_64/ia32/ia32_binfmt.c Sun Aug 3 13:14:44 2003
+++ b/arch/x86_64/ia32/ia32_binfmt.c Sun Aug 3 13:14:44 2003
@@ -32,12 +32,14 @@
#define AT_SYSINFO 32
#define AT_SYSINFO_EHDR 33
-#if 0 /* disabled for now because the code has still problems */
+int sysctl_vsyscall32;
+
#define ARCH_DLINFO do { \
+ if (sysctl_vsyscall32) { \
NEW_AUX_ENT(AT_SYSINFO, (u32)(u64)VSYSCALL32_VSYSCALL); \
NEW_AUX_ENT(AT_SYSINFO_EHDR, VSYSCALL32_BASE); \
+ } \
} while(0)
-#endif
struct file;
struct elf_phdr;
@@ -202,7 +204,7 @@
}
static inline int
-elf_core_copy_task_fpregs(struct task_struct *tsk, elf_fpregset_t *fpu)
+elf_core_copy_task_fpregs(struct task_struct *tsk, struct pt_regs *xregs, elf_fpregset_t *fpu)
{
struct _fpstate_ia32 *fpstate = (void*)fpu;
struct pt_regs *regs = (struct pt_regs *)(tsk->thread.rsp0);
diff -Nru a/arch/x86_64/ia32/ia32_ioctl.c b/arch/x86_64/ia32/ia32_ioctl.c
--- a/arch/x86_64/ia32/ia32_ioctl.c Sun Aug 3 13:14:48 2003
+++ b/arch/x86_64/ia32/ia32_ioctl.c Sun Aug 3 13:14:48 2003
@@ -726,6 +726,7 @@
COMPATIBLE_IOCTL(BNEPCONNDEL)
COMPATIBLE_IOCTL(BNEPGETCONNLIST)
COMPATIBLE_IOCTL(BNEPGETCONNINFO)
+COMPATIBLE_IOCTL(FIOQSIZE)
/* And these ioctls need translation */
HANDLE_IOCTL(TIOCGDEV, tiocgdev)
diff -Nru a/arch/x86_64/ia32/ipc32.c b/arch/x86_64/ia32/ipc32.c
--- a/arch/x86_64/ia32/ipc32.c Sun Aug 3 13:14:47 2003
+++ b/arch/x86_64/ia32/ipc32.c Sun Aug 3 13:14:47 2003
@@ -687,9 +687,7 @@
return sys_shmget(first, second, third);
case SHMCTL:
return shmctl32(first, second, (void *)AA(ptr));
- default:
- return -EINVAL;
}
- return -EINVAL;
+ return -ENOSYS;
}
diff -Nru a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
--- a/arch/x86_64/kernel/apic.c Sun Aug 3 13:14:45 2003
+++ b/arch/x86_64/kernel/apic.c Sun Aug 3 13:14:45 2003
@@ -441,9 +441,6 @@
#ifdef CONFIG_PM
-#include <linux/device.h>
-#include <linux/module.h>
-
static struct {
/* 'active' is true if the local APIC was enabled by us and
not the BIOS; this signifies that we are also responsible
@@ -540,7 +537,6 @@
.suspend = lapic_suspend,
};
-/* not static, needed by child devices */
static struct sys_device device_lapic = {
.id = 0,
.cls = &lapic_sysclass,
diff -Nru a/arch/x86_64/kernel/bluesmoke.c b/arch/x86_64/kernel/bluesmoke.c
--- a/arch/x86_64/kernel/bluesmoke.c Sun Aug 3 13:14:52 2003
+++ b/arch/x86_64/kernel/bluesmoke.c Sun Aug 3 13:14:52 2003
@@ -127,9 +127,8 @@
{
struct pci_dev *dev = NULL;
int cpu = smp_processor_id();
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- if (dev->bus->number==0 && PCI_FUNC(dev->devfn)==3 &&
- PCI_SLOT(dev->devfn) == (24U+cpu))
+ while ((dev = pci_find_device(PCI_VENDOR_ID_AMD, 0x1103, dev)) != NULL) {
+ if (dev->bus->number==0 && PCI_SLOT(dev->devfn) == (24U+cpu))
return dev;
}
return NULL;
@@ -198,7 +197,7 @@
[0] = "err cpu1",
};
-static void check_k8_nb(void)
+static void check_k8_nb(int header)
{
struct pci_dev *nb;
nb = find_k8_nb();
@@ -210,6 +209,9 @@
pci_read_config_dword(nb, 0x4c, &statushigh);
if (!(statushigh & (1<<31)))
return;
+ if (header)
+ printk(KERN_ERR "CPU %d: Silent Northbridge MCE\n", smp_processor_id());
+
printk(KERN_ERR "Northbridge status %08x%08x\n",
statushigh,statuslow);
@@ -271,9 +273,12 @@
rdmsrl(MSR_IA32_MCG_STATUS, status);
if ((status & (1<<2)) == 0) {
if (!regs)
- check_k8_nb();
+ check_k8_nb(1);
return;
}
+
+ printk(KERN_EMERG "CPU %d: Machine Check Exception: %016Lx\n", smp_processor_id(), status);
+
if (status & 1)
printk(KERN_EMERG "MCG_STATUS: unrecoverable\n");
@@ -291,7 +296,7 @@
if (nbstatus & (1UL<57))
printk(KERN_EMERG "Unrecoverable condition\n");
- check_k8_nb();
+ check_k8_nb(0);
if (nbstatus & (1UL<<58)) {
u64 adr;
diff -Nru a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S
--- a/arch/x86_64/kernel/head.S Sun Aug 3 13:14:50 2003
+++ b/arch/x86_64/kernel/head.S Sun Aug 3 13:14:50 2003
@@ -307,7 +307,8 @@
ENTRY(level3_physmem_pgt)
.quad 0x0000000000105007 /* -> level2_kernel_pgt (so that __va works even before pagetable_init) */
-.org 0xb000
+ .org 0xb000
+#ifdef CONFIG_ACPI_SLEEP
ENTRY(wakeup_level4_pgt)
.quad 0x0000000000102007 /* -> level3_ident_pgt */
.fill 255,8,0
@@ -315,9 +316,9 @@
.fill 254,8,0
/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
.quad 0x0000000000103007 /* -> level3_kernel_pgt */
+#endif
-.org 0xc000
-.data
+ .data
.align 16
.globl cpu_gdt_descr
diff -Nru a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
--- a/arch/x86_64/kernel/io_apic.c Sun Aug 3 13:14:48 2003
+++ b/arch/x86_64/kernel/io_apic.c Sun Aug 3 13:14:48 2003
@@ -63,7 +63,7 @@
*/
static struct irq_pin_list {
- int apic, pin, next;
+ short apic, pin, next;
} irq_2_pin[PIN_MAP_SIZE];
/*
@@ -1781,3 +1781,21 @@
}
#endif /*CONFIG_ACPI_BOOT*/
+
+#ifndef CONFIG_SMP
+void send_IPI_self(int vector)
+{
+ unsigned int cfg;
+
+ /*
+ * Wait for idle.
+ */
+ apic_wait_icr_idle();
+ cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL;
+
+ /*
+ * Send the IPI. The write to APIC_ICR fires this off.
+ */
+ apic_write_around(APIC_ICR, cfg);
+}
+#endif
diff -Nru a/arch/x86_64/kernel/ioport.c b/arch/x86_64/kernel/ioport.c
--- a/arch/x86_64/kernel/ioport.c Sun Aug 3 13:14:46 2003
+++ b/arch/x86_64/kernel/ioport.c Sun Aug 3 13:14:46 2003
@@ -51,42 +51,50 @@
}
}
+
/*
* this changes the io permissions bitmap in the current task.
*/
asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on)
{
struct thread_struct * t = ¤t->thread;
- struct tss_struct * tss;
- int ret = 0;
+ int cpu = get_cpu();
if ((from + num <= from) || (from + num > IO_BITMAP_SIZE*32))
return -EINVAL;
if (turn_on && !capable(CAP_SYS_RAWIO))
return -EPERM;
+ struct tss_struct * tss = init_tss + cpu;
+
+ /*
+ * If it's the first ioperm() call in this thread's lifetime, set the
+ * IO bitmap up. ioperm() is much less timing critical than clone(),
+ * this is why we delay this operation until now:
+ */
if (!t->io_bitmap_ptr) {
- t->io_bitmap_ptr = kmalloc((IO_BITMAP_SIZE+1)*4, GFP_KERNEL);
+ t->io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
if (!t->io_bitmap_ptr) {
- ret = -ENOMEM;
- goto out;
- }
- memset(t->io_bitmap_ptr,0xff,(IO_BITMAP_SIZE+1)*4);
- tss = init_tss + get_cpu();
- tss->io_map_base = IO_BITMAP_OFFSET;
put_cpu();
+ return -ENOMEM;
+ }
+
+ memset(t->io_bitmap_ptr,0xff,IO_BITMAP_BYTES);
}
- tss = init_tss + get_cpu();
/*
* do it in the per-thread copy and in the TSS ...
*/
set_bitmap((unsigned long *) t->io_bitmap_ptr, from, num, !turn_on);
+ if (tss->io_map_base != IO_BITMAP_OFFSET) {
+ memcpy(tss->io_bitmap, t->io_bitmap_ptr, sizeof(tss->io_bitmap));
+ tss->io_map_base = IO_BITMAP_OFFSET;
+ } else {
set_bitmap((unsigned long *) tss->io_bitmap, from, num, !turn_on);
+ }
- out:
put_cpu();
- return ret;
+ return 0;
}
/*
diff -Nru a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
--- a/arch/x86_64/kernel/mpparse.c Sun Aug 3 13:14:47 2003
+++ b/arch/x86_64/kernel/mpparse.c Sun Aug 3 13:14:47 2003
@@ -41,8 +41,10 @@
* MP-table.
*/
int apic_version [MAX_APICS];
-int mp_bus_id_to_type [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
+unsigned char mp_bus_id_to_type [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
+unsigned long mp_bus_to_cpumask [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1UL };
+
int mp_current_pci_id = 0;
/* I/O APIC entries */
struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
diff -Nru a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
--- a/arch/x86_64/kernel/nmi.c Sun Aug 3 13:14:48 2003
+++ b/arch/x86_64/kernel/nmi.c Sun Aug 3 13:14:48 2003
@@ -141,14 +141,14 @@
/* tell do_nmi() and others that we're not active any more */
nmi_watchdog = 0;
}
+
void enable_lapic_nmi_watchdog(void)
- {
+{
if (nmi_active < 0) {
nmi_watchdog = NMI_LOCAL_APIC;
setup_apic_nmi_watchdog();
}
- }
-
+}
void disable_timer_nmi_watchdog(void)
{
@@ -172,8 +172,6 @@
}
#ifdef CONFIG_PM
-
-#include <linux/device.h>
static int nmi_pm_active; /* nmi_active before suspend */
diff -Nru a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
--- a/arch/x86_64/kernel/pci-gart.c Sun Aug 3 13:14:47 2003
+++ b/arch/x86_64/kernel/pci-gart.c Sun Aug 3 13:14:47 2003
@@ -262,7 +262,7 @@
printk(KERN_ERR
"PCI-DMA: Out of IOMMU space for %p size %lu at device %s[%s]\n",
- addr,size, dev ? dev->dev.name : "?", dev ? dev->slot_name : "?");
+ addr,size, dev ? dev->dev.name : "?", dev ? pci_name(dev) : "?");
if (size > PAGE_SIZE*EMERGENCY_PAGES) {
if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL)
diff -Nru a/arch/x86_64/kernel/setup64.c b/arch/x86_64/kernel/setup64.c
--- a/arch/x86_64/kernel/setup64.c Sun Aug 3 13:14:46 2003
+++ b/arch/x86_64/kernel/setup64.c Sun Aug 3 13:14:46 2003
@@ -114,32 +114,37 @@
__setup("noexec32=", nonx32_setup);
-#ifndef __GENERIC_PER_CPU
-
-unsigned long __per_cpu_offset[NR_CPUS];
-
+/*
+ * Great future plan:
+ * Declare PDA itself and support (irqstack,tss,pml4) as per cpu data.
+ * Always point %gs to its beginning
+ */
void __init setup_per_cpu_areas(void)
{
- unsigned long size, i;
- unsigned char *ptr;
+ int i;
+ unsigned long size;
/* Copy section for each CPU (we discard the original) */
size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
- if (!size)
- return;
+#ifdef CONFIG_MODULES
+ if (size < PERCPU_ENOUGH_ROOM)
+ size = PERCPU_ENOUGH_ROOM;
+#endif
- ptr = alloc_bootmem(size * NR_CPUS);
+ /* We don't support CPU hotplug, so only allocate as much as needed here */
- for (i = 0; i < NR_CPUS; i++, ptr += size) {
- /* hide this from the compiler to avoid problems */
- unsigned long offset;
- asm("subq %[b],%0" : "=r" (offset) : "0" (ptr), [b] "r" (&__per_cpu_start));
- __per_cpu_offset[i] = offset;
- cpu_pda[i].cpudata_offset = offset;
- memcpy(ptr, __per_cpu_start, size);
+ int maxi = max_t(unsigned, numnodes, num_online_cpus());
+
+ for (i = 0; i < maxi; i++) {
+ /* If possible allocate on the node of the CPU.
+ In case it doesn't exist round-robin nodes. */
+ unsigned char *ptr = alloc_bootmem_node(NODE_DATA(i % numnodes), size);
+ if (!ptr)
+ panic("Cannot allocate cpu data for CPU %d\n", i);
+ cpu_pda[i].data_offset = ptr - __per_cpu_start;
+ memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
}
}
-#endif
void pda_init(int cpu)
{
@@ -153,7 +158,7 @@
pda->me = pda;
pda->cpunumber = cpu;
pda->irqcount = -1;
- pda->cpudata_offset = 0;
+ pda->data_offset = 0;
pda->kernelstack =
(unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
pda->active_mm = &init_mm;
diff -Nru a/arch/x86_64/mm/extable.c b/arch/x86_64/mm/extable.c
--- a/arch/x86_64/mm/extable.c Sun Aug 3 13:14:52 2003
+++ b/arch/x86_64/mm/extable.c Sun Aug 3 13:14:52 2003
@@ -5,6 +5,7 @@
#include <linux/config.h>
#include <linux/module.h>
#include <linux/spinlock.h>
+#include <linux/init.h>
#include <asm/uaccess.h>
/* Simple binary search */
@@ -28,3 +29,29 @@
}
return NULL;
}
+
+/* When an exception handler is in an non standard section (like __init)
+ the fixup table can end up unordered. Fix that here. */
+static __init int check_extable(void)
+{
+ extern struct exception_table_entry __start___ex_table[];
+ extern struct exception_table_entry __stop___ex_table[];
+ struct exception_table_entry *e;
+ int change;
+
+ /* The input is near completely presorted, which makes bubble sort the
+ best (and simplest) sort algorithm. */
+ do {
+ change = 0;
+ for (e = __start___ex_table+1; e < __stop___ex_table; e++) {
+ if (e->insn < e[-1].insn) {
+ struct exception_table_entry tmp = e[-1];
+ e[-1] = e[0];
+ e[0] = tmp;
+ change = 1;
+ }
+ }
+ } while (change != 0);
+ return 0;
+}
+core_initcall(check_extable);
diff -Nru a/crypto/tcrypt.c b/crypto/tcrypt.c
--- a/crypto/tcrypt.c Sun Aug 3 13:14:51 2003
+++ b/crypto/tcrypt.c Sun Aug 3 13:14:51 2003
@@ -42,7 +42,7 @@
#define IDX7 27333
#define IDX8 3000
-static int mode = 0;
+static int mode;
static char *xbuf;
static char *tvmem;
diff -Nru a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
--- a/drivers/acpi/pci_irq.c Sun Aug 3 13:14:48 2003
+++ b/drivers/acpi/pci_irq.c Sun Aug 3 13:14:48 2003
@@ -291,7 +291,7 @@
}
if (!irq) {
- ACPI_DEBUG_PRINT((ACPI_DB_WARN, "Unable to derive IRQ for device %s\n", dev->slot_name));
+ ACPI_DEBUG_PRINT((ACPI_DB_WARN, "Unable to derive IRQ for device %s\n", pci_name(dev)));
return_VALUE(0);
}
@@ -316,7 +316,7 @@
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
if (!pin) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No interrupt pin configured for device %s\n", dev->slot_name));
+ ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No interrupt pin configured for device %s\n", pci_name(dev)));
return_VALUE(0);
}
pin--;
@@ -344,7 +344,7 @@
* driver reported one, then use it. Exit in any case.
*/
if (!irq) {
- printk(KERN_WARNING PREFIX "No IRQ known for interrupt pin %c of device %s", ('A' + pin), dev->slot_name);
+ printk(KERN_WARNING PREFIX "No IRQ known for interrupt pin %c of device %s", ('A' + pin), pci_name(dev));
/* Interrupt Line values above 0xF are forbidden */
if (dev->irq && dev->irq >= 0xF) {
printk(" - using IRQ %d\n", dev->irq);
@@ -358,7 +358,7 @@
dev->irq = irq;
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device %s using IRQ %d\n", dev->slot_name, dev->irq));
+ ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device %s using IRQ %d\n", pci_name(dev), dev->irq));
/*
* Make sure all (legacy) PCI IRQs are set as level-triggered.
@@ -369,6 +369,10 @@
irq_mask |= (1 << dev->irq);
eisa_set_level_irq(dev->irq);
}
+#endif
+#ifdef CONFIG_IOSAPIC
+ if (acpi_irq_model == ACPI_IRQ_MODEL_IOSAPIC)
+ iosapic_enable_intr(dev->irq);
#endif
return_VALUE(dev->irq);
diff -Nru a/drivers/atm/Kconfig b/drivers/atm/Kconfig
--- a/drivers/atm/Kconfig Sun Aug 3 13:14:48 2003
+++ b/drivers/atm/Kconfig Sun Aug 3 13:14:48 2003
@@ -164,18 +164,6 @@
Note that extended debugging may create certain race conditions
itself. Enable this ONLY if you suspect problems with the driver.
-config ATM_ZATM_EXACT_TS
- bool "Enable usec resolution timestamps"
- depends on ATM_ZATM && X86
- help
- The uPD98401 SAR chip supports a high-resolution timer (approx. 30
- MHz) that is used for very accurate reception timestamps. Because
- that timer overflows after 140 seconds, and also to avoid timer
- drift, time measurements need to be periodically synchronized with
- the normal system time. Enabling this feature will add some general
- overhead for timer synchronization and also per-packet overhead for
- time conversion.
-
# bool 'Rolfs TI TNETA1570' CONFIG_ATM_TNETA1570 y
# if [ "$CONFIG_ATM_TNETA1570" = "y" ]; then
# bool ' Enable extended debugging' CONFIG_ATM_TNETA1570_DEBUG n
diff -Nru a/drivers/atm/Makefile b/drivers/atm/Makefile
--- a/drivers/atm/Makefile Sun Aug 3 13:14:44 2003
+++ b/drivers/atm/Makefile Sun Aug 3 13:14:44 2003
@@ -2,8 +2,6 @@
# Makefile for the Linux network (ATM) device drivers.
#
-EXTRA_CFLAGS := -g
-
fore_200e-objs := fore200e.o
host-progs := fore200e_mkfirm
diff -Nru a/drivers/atm/atmtcp.c b/drivers/atm/atmtcp.c
--- a/drivers/atm/atmtcp.c Sun Aug 3 13:14:50 2003
+++ b/drivers/atm/atmtcp.c Sun Aug 3 13:14:50 2003
@@ -77,7 +77,7 @@
set_current_state(TASK_UNINTERRUPTIBLE);
schedule();
}
- current->state = TASK_RUNNING;
+ set_current_state(TASK_RUNNING);
remove_wait_queue(vcc->sk->sk_sleep, &wait);
return error;
}
diff -Nru a/drivers/atm/eni.c b/drivers/atm/eni.c
--- a/drivers/atm/eni.c Sun Aug 3 13:14:46 2003
+++ b/drivers/atm/eni.c Sun Aug 3 13:14:46 2003
@@ -2327,7 +2327,7 @@
}
-static struct pci_device_id eni_pci_tbl[] __devinitdata = {
+static struct pci_device_id eni_pci_tbl[] = {
{ PCI_VENDOR_ID_EF, PCI_DEVICE_ID_EF_ATM_FPGA, PCI_ANY_ID, PCI_ANY_ID,
0, 0, 0 /* FPGA */ },
{ PCI_VENDOR_ID_EF, PCI_DEVICE_ID_EF_ATM_ASIC, PCI_ANY_ID, PCI_ANY_ID,
diff -Nru a/drivers/atm/firestream.c b/drivers/atm/firestream.c
--- a/drivers/atm/firestream.c Sun Aug 3 13:14:45 2003
+++ b/drivers/atm/firestream.c Sun Aug 3 13:14:45 2003
@@ -1722,7 +1722,7 @@
}
/* Try again after 10ms. */
- current->state = TASK_UNINTERRUPTIBLE;
+ set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout ((HZ+99)/100);
}
@@ -2091,7 +2091,7 @@
#endif
*/
-static struct pci_device_id firestream_pci_tbl[] __devinitdata = {
+static struct pci_device_id firestream_pci_tbl[] = {
{ PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS50},
{ PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155,
@@ -2127,4 +2127,5 @@
module_exit(firestream_cleanup_module);
MODULE_LICENSE("GPL");
+
diff -Nru a/drivers/atm/he.c b/drivers/atm/he.c
--- a/drivers/atm/he.c Sun Aug 3 13:14:46 2003
+++ b/drivers/atm/he.c Sun Aug 3 13:14:46 2003
@@ -3096,7 +3096,7 @@
MODULE_PARM(sdh, "i");
MODULE_PARM_DESC(sdh, "use SDH framing (default 0)");
-static struct pci_device_id he_pci_tbl[] __devinitdata = {
+static struct pci_device_id he_pci_tbl[] = {
{ PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_HE, PCI_ANY_ID, PCI_ANY_ID,
0, 0, 0 },
{ 0, }
diff -Nru a/drivers/atm/idt77252.c b/drivers/atm/idt77252.c
--- a/drivers/atm/idt77252.c Sun Aug 3 13:14:48 2003
+++ b/drivers/atm/idt77252.c Sun Aug 3 13:14:48 2003
@@ -3841,7 +3841,7 @@
return 0;
}
-static struct pci_device_id idt77252_pci_tbl[] __devinitdata =
+static struct pci_device_id idt77252_pci_tbl[] =
{
{ PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77252,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
diff -Nru a/drivers/atm/iphase.c b/drivers/atm/iphase.c
--- a/drivers/atm/iphase.c Sun Aug 3 13:14:52 2003
+++ b/drivers/atm/iphase.c Sun Aug 3 13:14:52 2003
@@ -3279,7 +3279,7 @@
kfree(iadev);
}
-static struct pci_device_id ia_pci_tbl[] __devinitdata = {
+static struct pci_device_id ia_pci_tbl[] = {
{ PCI_VENDOR_ID_IPHASE, 0x0008, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_IPHASE, 0x0009, PCI_ANY_ID, PCI_ANY_ID, },
{ 0,}
diff -Nru a/drivers/atm/lanai.c b/drivers/atm/lanai.c
--- a/drivers/atm/lanai.c Sun Aug 3 13:14:46 2003
+++ b/drivers/atm/lanai.c Sun Aug 3 13:14:46 2003
@@ -1,4 +1,4 @@
-/* lanai.c -- Copyright 1999 by Mitchell Blank Jr <mitch@sfgoth.com>
+/* lanai.c -- Copyright 1999-2003 by Mitchell Blank Jr <mitch@sfgoth.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -55,6 +55,7 @@
*/
/* Version history:
+ * v.1.00 -- 26-JUL-2003 -- PCI/DMA updates
* v.0.02 -- 11-JAN-2000 -- Endian fixes
* v.0.01 -- 30-NOV-1999 -- Initial release
*/
@@ -178,7 +179,7 @@
printk(KERN_DEBUG DEV_LABEL ": " format, ##args)
#define APRINTK(truth, format, args...) \
do { \
- if (!(truth)) \
+ if (unlikely(!(truth))) \
printk(KERN_ERR DEV_LABEL ": " format, ##args); \
} while (0)
@@ -215,7 +216,7 @@
u32 *start; /* From get_free_pages */
u32 *end; /* One past last byte */
u32 *ptr; /* Pointer to current host location */
- int order; /* log2(size/PAGE_SIZE) */
+ dma_addr_t dmaaddr;
};
struct lanai_vcc_stats {
@@ -373,89 +374,76 @@
/*
* Lanai needs DMA buffers aligned to 256 bytes of at least 1024 bytes -
- * we assume that any page allocation will do. I'm sure this is
- * never going to be a problem, but it's good to document assumtions
+ * usually any page allocation will do. Just to be safe in case
+ * PAGE_SIZE is insanely tiny, though...
*/
-#if PAGE_SIZE < 1024
-#error PAGE_SIZE too small to support LANAI chipset
-#endif
-/*
- * We also assume that the maximum buffer size will be some number
- * of whole pages, although that wouldn't be too hard to fix
- */
-#if PAGE_SIZE > (128 * 1024)
-#error PAGE_SIZE too large to support LANAI chipset
-#endif
-
-/* Convert a size to "order" for __get_free_pages */
-static int bytes_to_order(int bytes)
-{
- int order = 0;
- if (bytes > (128 * 1024))
- bytes = 128 * 1024; /* Max buffer size for lanai */
- while ((PAGE_SIZE << order) < bytes)
- order++;
- return order;
-}
+#define LANAI_PAGE_SIZE ((PAGE_SIZE >= 1024) ? PAGE_SIZE : 1024)
/*
* Allocate a buffer in host RAM for service list, RX, or TX
- * Returns buf->order<0 if no memory
- * Note that the size will be rounded up to an "order" of pages, and
+ * Returns buf->start==NULL if no memory
+ * Note that the size will be rounded up 2^n bytes, and
* if we can't allocate that we'll settle for something smaller
* until minbytes
- *
- * NOTE: buffer must be 32-bit DMA capable - when linux can
- * make distinction, this will need tweaking for this
- * to work on BIG memory machines.
*/
static void lanai_buf_allocate(struct lanai_buffer *buf,
- int bytes, int minbytes)
+ size_t bytes, size_t minbytes, struct pci_dev *pci)
{
- unsigned long address;
- int order = bytes_to_order(bytes);
+ int size;
+
+ if (bytes > (128 * 1024)) /* max lanai buffer size */
+ bytes = 128 * 1024;
+ for (size = LANAI_PAGE_SIZE; size < bytes; size *= 2)
+ ;
+ if (minbytes < LANAI_PAGE_SIZE)
+ minbytes = LANAI_PAGE_SIZE;
do {
- address = __get_free_pages(GFP_KERNEL, order);
- if (address != 0) { /* Success */
- bytes = PAGE_SIZE << order;
- buf->start = buf->ptr = (u32 *) address;
- buf->end = (u32 *) (address + bytes);
- memset((void *) address, 0, bytes);
+ /*
+ * Technically we could use non-consistent mappings for
+ * everything, but the way the lanai uses DMA memory would
+ * make that a terrific pain. This is much simpler.
+ */
+ buf->start = pci_alloc_consistent(pci, size, &buf->dmaaddr);
+ if (buf->start != NULL) { /* Success */
+ /* Lanai requires 256-byte alignment of DMA bufs */
+ APRINTK((buf->dmaaddr & ~0xFFFFFF00) == 0,
+ "bad dmaaddr: 0x%lx\n",
+ (unsigned long) buf->dmaaddr);
+ buf->ptr = buf->start;
+ buf->end = (u32 *)
+ (&((unsigned char *) buf->start)[size]);
+ memset(buf->start, 0, size);
break;
}
- if ((PAGE_SIZE << --order) < minbytes)
- order = -1; /* Too small - give up */
- } while (order >= 0);
- buf->order = order;
-}
-
-static inline void lanai_buf_deallocate(struct lanai_buffer *buf)
-{
- if (buf->order >= 0) {
- APRINTK(buf->start != 0, "lanai_buf_deallocate: start==0!\n");
- free_pages((unsigned long) buf->start, buf->order);
- buf->start = buf->end = buf->ptr = 0;
- }
+ size /= 2;
+ } while (size >= minbytes);
}
/* size of buffer in bytes */
-static inline int lanai_buf_size(const struct lanai_buffer *buf)
+static inline size_t lanai_buf_size(const struct lanai_buffer *buf)
{
return ((unsigned long) buf->end) - ((unsigned long) buf->start);
}
-/* size of buffer as "card order" (0=1k .. 7=128k) */
-static inline int lanai_buf_size_cardorder(const struct lanai_buffer *buf)
+static void lanai_buf_deallocate(struct lanai_buffer *buf,
+ struct pci_dev *pci)
{
- return buf->order + PAGE_SHIFT - 10;
+ if (buf->start != NULL) {
+ pci_free_consistent(pci, lanai_buf_size(buf),
+ buf->start, buf->dmaaddr);
+ buf->start = buf->end = buf->ptr = NULL;
+ }
}
-/* DMA-able address for this buffer */
-static unsigned long lanai_buf_dmaaddr(const struct lanai_buffer *buf)
+/* size of buffer as "card order" (0=1k .. 7=128k) */
+static int lanai_buf_size_cardorder(const struct lanai_buffer *buf)
{
- unsigned long r = virt_to_bus(buf->start);
- APRINTK((r & ~0xFFFFFF00) == 0, "bad dmaaddr: 0x%lx\n", (long) r);
- return r;
+ int order = get_order(lanai_buf_size(buf)) + (PAGE_SHIFT - 10);
+
+ /* This can only happen if PAGE_SIZE is gigantic, but just in case */
+ if (order > 7)
+ order = 7;
+ return order;
}
/* -------------------- HANDLE BACKLOG_VCCS BITFIELD: */
@@ -492,7 +480,7 @@
Reset_Reg = 0x00, /* Reset; read for chip type; bits: */
#define RESET_GET_BOARD_REV(x) (((x)>> 0)&0x03) /* Board revision */
#define RESET_GET_BOARD_ID(x) (((x)>> 2)&0x03) /* Board ID */
-#define BOARD_ID_LANAI256 (0) /* 25.6M adaptor card */
+#define BOARD_ID_LANAI256 (0) /* 25.6M adapter card */
Endian_Reg = 0x04, /* Endian setting */
IntStatus_Reg = 0x08, /* Interrupt status */
IntStatusMasked_Reg = 0x0C, /* Interrupt status (masked) */
@@ -850,7 +838,7 @@
{
u32 addr1;
if (lvcc->rx.atmvcc->qos.aal == ATM_AAL5) {
- unsigned long dmaaddr = lanai_buf_dmaaddr(&lvcc->rx.buf);
+ dma_addr_t dmaaddr = lvcc->rx.buf.dmaaddr;
cardvcc_write(lvcc, 0xFFFF, vcc_rxcrc1);
cardvcc_write(lvcc, 0xFFFF, vcc_rxcrc2);
cardvcc_write(lvcc, 0, vcc_rxwriteptr);
@@ -872,7 +860,7 @@
static void host_vcc_start_tx(const struct lanai_vcc *lvcc)
{
- unsigned long dmaaddr = lanai_buf_dmaaddr(&lvcc->tx.buf);
+ dma_addr_t dmaaddr = lvcc->tx.buf.dmaaddr;
cardvcc_write(lvcc, 0, vcc_txicg);
cardvcc_write(lvcc, 0xFFFF, vcc_txcrc1);
cardvcc_write(lvcc, 0xFFFF, vcc_txcrc2);
@@ -971,14 +959,15 @@
static inline int aal0_buffer_allocate(struct lanai_dev *lanai)
{
DPRINTK("aal0_buffer_allocate: allocating AAL0 RX buffer\n");
- lanai_buf_allocate(&lanai->aal0buf, AAL0_RX_BUFFER_SIZE, 80);
- return (lanai->aal0buf.order < 0) ? -ENOMEM : 0;
+ lanai_buf_allocate(&lanai->aal0buf, AAL0_RX_BUFFER_SIZE, 80,
+ lanai->pci);
+ return (lanai->aal0buf.start == NULL) ? -ENOMEM : 0;
}
static inline void aal0_buffer_free(struct lanai_dev *lanai)
{
DPRINTK("aal0_buffer_allocate: freeing AAL0 RX buffer\n");
- lanai_buf_deallocate(&lanai->aal0buf);
+ lanai_buf_deallocate(&lanai->aal0buf, lanai->pci);
}
/* -------------------- EEPROM UTILITIES: */
@@ -1678,36 +1667,37 @@
return lvcc;
}
-static int lanai_get_sized_buffer(int number, struct lanai_buffer *buf,
- int max_sdu, int multiplier, int min, const char *name)
+static int lanai_get_sized_buffer(struct lanai_dev *lanai,
+ struct lanai_buffer *buf, int max_sdu, int multiplier,
+ int min, const char *name)
{
int size;
if (max_sdu < 1)
max_sdu = 1;
max_sdu = aal5_size(max_sdu);
size = (max_sdu + 16) * multiplier + 16;
- lanai_buf_allocate(buf, size, min);
- if (buf->order < 0)
+ lanai_buf_allocate(buf, size, min, lanai->pci);
+ if (buf->start == NULL)
return -ENOMEM;
if (lanai_buf_size(buf) < size)
printk(KERN_WARNING DEV_LABEL "(itf %d): wanted %d bytes "
- "for %s buffer, got only %d\n", number, size, name,
+ "for %s buffer, got only %d\n", lanai->number, size, name,
lanai_buf_size(buf));
DPRINTK("Allocated %d byte %s buffer\n", lanai_buf_size(buf), name);
return 0;
}
/* Setup a RX buffer for a currently unbound AAL5 vci */
-static inline int lanai_setup_rx_vci_aal5(int number, struct lanai_vcc *lvcc,
- const struct atm_qos *qos)
+static inline int lanai_setup_rx_vci_aal5(struct lanai_dev *lanai,
+ struct lanai_vcc *lvcc, const struct atm_qos *qos)
{
- return lanai_get_sized_buffer(number, &lvcc->rx.buf,
+ return lanai_get_sized_buffer(lanai, &lvcc->rx.buf,
qos->rxtp.max_sdu, AAL5_RX_MULTIPLIER, qos->rxtp.max_sdu + 32,
"RX");
}
/* Setup a TX buffer for a currently unbound AAL5 vci */
-static int lanai_setup_tx_vci(int number, struct lanai_vcc *lvcc,
+static int lanai_setup_tx_vci(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
const struct atm_qos *qos)
{
int max_sdu, multiplier;
@@ -1720,7 +1710,7 @@
max_sdu = qos->txtp.max_sdu;
multiplier = AAL5_TX_MULTIPLIER;
}
- return lanai_get_sized_buffer(number, &lvcc->tx.buf, max_sdu,
+ return lanai_get_sized_buffer(lanai, &lvcc->tx.buf, max_sdu,
multiplier, 80, "TX");
}
@@ -1781,8 +1771,9 @@
*/
static int __init service_buffer_allocate(struct lanai_dev *lanai)
{
- lanai_buf_allocate(&lanai->service, SERVICE_ENTRIES * 4, 0);
- if (lanai->service.order < 0)
+ lanai_buf_allocate(&lanai->service, SERVICE_ENTRIES * 4, 8,
+ lanai->pci);
+ if (lanai->service.start == NULL)
return -ENOMEM;
DPRINTK("allocated service buffer at 0x%08lX, size %d(%d)\n",
(unsigned long) lanai->service.start,
@@ -1793,14 +1784,14 @@
/* ServiceStuff register contains size and address of buffer */
reg_write(lanai,
SSTUFF_SET_SIZE(lanai_buf_size_cardorder(&lanai->service)) |
- SSTUFF_SET_ADDR(lanai_buf_dmaaddr(&lanai->service)),
+ SSTUFF_SET_ADDR(lanai->service.dmaaddr),
ServiceStuff_Reg);
return 0;
}
static inline void service_buffer_deallocate(struct lanai_dev *lanai)
{
- lanai_buf_deallocate(&lanai->service);
+ lanai_buf_deallocate(&lanai->service, lanai->pci);
}
/* Bitfields in service list */
@@ -2098,11 +2089,28 @@
/* -------------------- PCI INITIALIZATION/SHUTDOWN: */
-static inline int __init lanai_pci_start(struct lanai_dev *lanai)
+static int __init lanai_pci_start(struct lanai_dev *lanai)
{
struct pci_dev *pci = lanai->pci;
int result;
u16 w;
+
+ if (pci_enable_device(pci) != 0) {
+ printk(KERN_ERR DEV_LABEL "(itf %d): can't enable "
+ "PCI device", lanai->number);
+ return -ENXIO;
+ }
+ pci_set_master(pci);
+ if (pci_set_dma_mask(pci, 0xFFFFFFFF) != 0) {
+ printk(KERN_WARNING DEV_LABEL
+ "(itf %d): No suitable DMA available.\n", lanai->number);
+ return -EBUSY;
+ }
+ if (pci_set_consistent_dma_mask(pci, 0xFFFFFFFF) != 0) {
+ printk(KERN_WARNING DEV_LABEL
+ "(itf %d): No suitable DMA available.\n", lanai->number);
+ return -EBUSY;
+ }
/* Get the pci revision byte */
result = pci_read_config_byte(pci, PCI_REVISION_ID,
&lanai->pci_revision);
@@ -2113,7 +2121,8 @@
}
result = pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &w);
if (result != PCIBIOS_SUCCESSFUL) {
- printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_SUBSYSTEM_ID: %d\n", lanai->number, result);
+ printk(KERN_ERR DEV_LABEL "(itf %d): can't read "
+ "PCI_SUBSYSTEM_ID: %d\n", lanai->number, result);
return -EINVAL;
}
if ((result = check_board_id_and_rev("PCI", w, NULL)) != 0)
@@ -2125,43 +2134,11 @@
"PCI_LATENCY_TIMER: %d\n", lanai->number, result);
return -EINVAL;
}
- result = pci_read_config_word(pci, PCI_COMMAND, &w);
- if (result != PCIBIOS_SUCCESSFUL) {
- printk(KERN_ERR DEV_LABEL "(itf %d): can't read "
- "PCI_COMMAND: %d\n", lanai->number, result);
- return -EINVAL;
- }
- w |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR |
- PCI_COMMAND_PARITY);
- result = pci_write_config_word(pci, PCI_COMMAND, w);
- if (result != PCIBIOS_SUCCESSFUL) {
- printk(KERN_ERR DEV_LABEL "(itf %d): can't "
- "write PCI_COMMAND: %d\n", lanai->number, result);
- return -EINVAL;
- }
pcistatus_check(lanai, 1);
pcistatus_check(lanai, 0);
return 0;
}
-static void lanai_pci_stop(struct lanai_dev *lanai)
-{
- struct pci_dev *pci = lanai->pci;
- int result;
- u16 pci_command;
- result = pci_read_config_word(pci, PCI_COMMAND, &pci_command);
- if (result != PCIBIOS_SUCCESSFUL) {
- printk(KERN_ERR DEV_LABEL "(itf %d): can't "
- "read PCI_COMMAND: %d\n", lanai->number, result);
- return;
- }
- pci_command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- result = pci_write_config_word(pci, PCI_COMMAND, pci_command);
- if (result != PCIBIOS_SUCCESSFUL)
- printk(KERN_ERR DEV_LABEL "(itf %d): can't "
- "write PCI_COMMAND: %d\n", lanai->number, result);
-}
-
/* -------------------- VPI/VCI ALLOCATION: */
/*
@@ -2445,7 +2422,7 @@
#endif
iounmap((void *) lanai->base);
error_pci:
- lanai_pci_stop(lanai);
+ pci_disable_device(lanai->pci);
error:
return result;
}
@@ -2470,7 +2447,7 @@
lanai->conf1 |= CONFIG1_POWERDOWN;
conf1_write(lanai);
#endif
- lanai_pci_stop(lanai);
+ pci_disable_device(lanai->pci);
vcc_table_deallocate(lanai);
service_buffer_deallocate(lanai);
iounmap((void *) lanai->base);
@@ -2493,7 +2470,7 @@
if (--lanai->naal0 <= 0)
aal0_buffer_free(lanai);
} else
- lanai_buf_deallocate(&lvcc->rx.buf);
+ lanai_buf_deallocate(&lvcc->rx.buf, lanai->pci);
lvcc->rx.atmvcc = NULL;
}
if (lvcc->tx.atmvcc == atmvcc) {
@@ -2503,7 +2480,7 @@
lanai->cbrvcc = NULL;
}
lanai_shutdown_tx_vci(lanai, lvcc);
- lanai_buf_deallocate(&lvcc->tx.buf);
+ lanai_buf_deallocate(&lvcc->tx.buf, lanai->pci);
lvcc->tx.atmvcc = NULL;
}
if (--lvcc->nref == 0) {
@@ -2551,7 +2528,7 @@
result = aal0_buffer_allocate(lanai);
} else
result = lanai_setup_rx_vci_aal5(
- lanai->number, lvcc, &atmvcc->qos);
+ lanai, lvcc, &atmvcc->qos);
if (result != 0)
goto out_free;
lvcc->rx.atmvcc = atmvcc;
@@ -2566,7 +2543,7 @@
if (atmvcc->qos.txtp.traffic_class != ATM_NONE) {
APRINTK(lvcc->tx.atmvcc == NULL, "tx.atmvcc!=NULL, vci=%d\n",
vci);
- result = lanai_setup_tx_vci(lanai->number, lvcc, &atmvcc->qos);
+ result = lanai_setup_tx_vci(lanai, lvcc, &atmvcc->qos);
if (result != 0)
goto out_free;
lvcc->tx.atmvcc = atmvcc;
@@ -2849,49 +2826,69 @@
.proc_read = lanai_proc_read
};
-/* detect one type of card LANAI2 or LANAIHB */
-static int __init lanai_detect_1(unsigned int vendor, unsigned int device)
+/* initialize one probed card */
+static int __devinit lanai_init_one(struct pci_dev *pci,
+ const struct pci_device_id *ident)
{
- struct pci_dev *pci = NULL;
struct lanai_dev *lanai;
struct atm_dev *atmdev;
- int count = 0, result;
- while ((pci = pci_find_device(vendor, device, pci)) != NULL) {
- lanai = (struct lanai_dev *)
- kmalloc(sizeof *lanai, GFP_KERNEL);
- if (lanai == NULL) {
- printk(KERN_ERR DEV_LABEL ": couldn't allocate "
- "dev_data structure!\n");
- break;
- }
- atmdev = atm_dev_register(DEV_LABEL, &ops, -1, 0);
- if (atmdev == NULL) {
- printk(KERN_ERR DEV_LABEL ": couldn't register "
- "atm device!\n");
- kfree(lanai);
- break;
- }
- atmdev->dev_data = lanai;
- lanai->pci = pci;
- lanai->type = (enum lanai_type) device;
- if ((result = lanai_dev_open(atmdev)) != 0) {
- DPRINTK("lanai_start() failed, err=%d\n", -result);
- atm_dev_deregister(atmdev);
- kfree(lanai);
- continue;
- }
- count++;
+ int result;
+
+ lanai = (struct lanai_dev *) kmalloc(sizeof(*lanai), GFP_KERNEL);
+ if (lanai == NULL) {
+ printk(KERN_ERR DEV_LABEL
+ ": couldn't allocate dev_data structure!\n");
+ return -ENOMEM;
+ }
+
+ atmdev = atm_dev_register(DEV_LABEL, &ops, -1, 0);
+ if (atmdev == NULL) {
+ printk(KERN_ERR DEV_LABEL
+ ": couldn't register atm device!\n");
+ kfree(lanai);
+ return -EBUSY;
+ }
+
+ atmdev->dev_data = lanai;
+ lanai->pci = pci;
+ lanai->type = (enum lanai_type) ident->device;
+
+ result = lanai_dev_open(atmdev);
+ if (result != 0) {
+ DPRINTK("lanai_start() failed, err=%d\n", -result);
+ atm_dev_deregister(atmdev);
+ kfree(lanai);
}
- return count;
+ return result;
}
+static struct pci_device_id lanai_pci_tbl[] __devinitdata = {
+ {
+ PCI_VENDOR_ID_EF, PCI_VENDOR_ID_EF_ATM_LANAI2,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
+ },
+ {
+ PCI_VENDOR_ID_EF, PCI_VENDOR_ID_EF_ATM_LANAIHB,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
+ },
+ { 0, } /* terminal entry */
+};
+MODULE_DEVICE_TABLE(pci, lanai_pci_tbl);
+
+static struct pci_driver lanai_driver = {
+ .name = DEV_LABEL,
+ .id_table = lanai_pci_tbl,
+ .probe = lanai_init_one,
+};
+
static int __init lanai_module_init(void)
{
- if (lanai_detect_1(PCI_VENDOR_ID_EF, PCI_VENDOR_ID_EF_ATM_LANAI2) +
- lanai_detect_1(PCI_VENDOR_ID_EF, PCI_VENDOR_ID_EF_ATM_LANAIHB))
- return 0;
- printk(KERN_ERR DEV_LABEL ": no adaptor found\n");
- return -ENODEV;
+ int x;
+
+ x = pci_module_init(&lanai_driver);
+ if (x != 0)
+ printk(KERN_ERR DEV_LABEL ": no adapter found\n");
+ return x;
}
static void __exit lanai_module_exit(void)
diff -Nru a/drivers/atm/uPD98402.c b/drivers/atm/uPD98402.c
--- a/drivers/atm/uPD98402.c Sun Aug 3 13:14:47 2003
+++ b/drivers/atm/uPD98402.c Sun Aug 3 13:14:47 2003
@@ -27,6 +27,7 @@
struct k_sonet_stats sonet_stats;/* link diagnostics */
unsigned char framing; /* SONET/SDH framing */
int loop_mode; /* loopback mode */
+ spinlock_t lock;
};
@@ -71,14 +72,13 @@
default:
return -EINVAL;
}
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&PRIV(dev)->lock, flags);
PUT(set[0],C11T);
PUT(set[1],C12T);
PUT(set[2],C13T);
PUT((GET(MDR) & ~uPD98402_MDR_SS_MASK) | (set[3] <<
uPD98402_MDR_SS_SHIFT),MDR);
- restore_flags(flags);
+ spin_unlock_irqrestore(&PRIV(dev)->lock, flags);
return 0;
}
@@ -88,12 +88,11 @@
unsigned long flags;
unsigned char s[3];
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&PRIV(dev)->lock, flags);
s[0] = GET(C11R);
s[1] = GET(C12R);
s[2] = GET(C13R);
- restore_flags(flags);
+ spin_unlock_irqrestore(&PRIV(dev)->lock, flags);
return (put_user(s[0], arg) || put_user(s[1], arg+1) ||
put_user(s[2], arg+2) || put_user(0xff, arg+3) ||
put_user(0xff, arg+4) || put_user(0xff, arg+5)) ? -EFAULT : 0;
@@ -214,6 +213,7 @@
DPRINTK("phy_start\n");
if (!(PRIV(dev) = kmalloc(sizeof(struct uPD98402_priv),GFP_KERNEL)))
return -ENOMEM;
+ spin_lock_init(&PRIV(dev)->lock);
memset(&PRIV(dev)->sonet_stats,0,sizeof(struct k_sonet_stats));
(void) GET(PCR); /* clear performance events */
PUT(uPD98402_PFM_FJ,PCMR); /* ignore frequency adj */
diff -Nru a/drivers/atm/zatm.c b/drivers/atm/zatm.c
--- a/drivers/atm/zatm.c Sun Aug 3 13:14:46 2003
+++ b/drivers/atm/zatm.c Sun Aug 3 13:14:46 2003
@@ -52,13 +52,6 @@
#define DPRINTK(format,args...)
#endif
-#ifndef __i386__
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
-#warning Precise timestamping only available on i386 platform
-#undef CONFIG_ATM_ZATM_EXACT_TS
-#endif
-#endif
-
#ifndef CONFIG_ATM_ZATM_DEBUG
@@ -202,11 +195,10 @@
sizeof(struct rx_buffer_head);
}
size += align;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
free = zpeekl(zatm_dev,zatm_dev->pool_base+2*pool) &
uPD98401_RXFP_REMAIN;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
if (free >= zatm_dev->pool_info[pool].low_water) return;
EVENT("starting ... POOL: 0x%x, 0x%x\n",
zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
@@ -235,22 +227,22 @@
head->skb = skb;
EVENT("enq skb 0x%08lx/0x%08lx\n",(unsigned long) skb,
(unsigned long) head);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
if (zatm_dev->last_free[pool])
((struct rx_buffer_head *) (zatm_dev->last_free[pool]->
data))[-1].link = virt_to_bus(head);
zatm_dev->last_free[pool] = skb;
skb_queue_tail(&zatm_dev->pool[pool],skb);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
free++;
}
if (first) {
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zwait;
zout(virt_to_bus(first),CER);
zout(uPD98401_ADD_BAT | (pool << uPD98401_POOL_SHIFT) | count,
CMR);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
EVENT ("POOL: 0x%x, 0x%x\n",
zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
@@ -293,8 +285,7 @@
size = pool-ZATM_AAL5_POOL_BASE;
if (size < 0) size = 0; /* 64B... */
else if (size > 10) size = 10; /* ... 64kB */
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zpokel(zatm_dev,((zatm_dev->pool_info[pool].low_water/4) <<
uPD98401_RXFP_ALERT_SHIFT) |
(1 << uPD98401_RXFP_BTSZ_SHIFT) |
@@ -302,7 +293,7 @@
zatm_dev->pool_base+pool*2);
zpokel(zatm_dev,(unsigned long) dummy,zatm_dev->pool_base+
pool*2+1);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
zatm_dev->last_free[pool] = NULL;
refill_pool(dev,pool);
}
@@ -322,175 +313,31 @@
{
struct zatm_pool_info *pool;
unsigned long offset,flags;
+ struct zatm_dev *zatm_dev = ZATM_DEV(vcc->dev);
DPRINTK("start 0x%08lx dest 0x%08lx len %d\n",start,dest,len);
if (len < PAGE_SIZE) return;
- pool = &ZATM_DEV(vcc->dev)->pool_info[ZATM_VCC(vcc)->pool];
+ pool = &zatm_dev->pool_info[ZATM_VCC(vcc)->pool];
offset = (dest-start) & (PAGE_SIZE-1);
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
if (!offset || pool->offset == offset) {
pool->next_cnt = 0;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return;
}
if (offset != pool->next_off) {
pool->next_off = offset;
pool->next_cnt = 0;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return;
}
if (++pool->next_cnt >= pool->next_thres) {
pool->offset = pool->next_off;
pool->next_cnt = 0;
}
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
}
-
-/*----------------------- high-precision timestamps -------------------------*/
-
-
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
-
-static struct timer_list sync_timer;
-
-
-/*
- * Note: the exact time is not normalized, i.e. tv_usec can be > 1000000.
- * This must be handled by higher layers.
- */
-
-static inline struct timeval exact_time(struct zatm_dev *zatm_dev,u32 ticks)
-{
- struct timeval tmp;
-
- tmp = zatm_dev->last_time;
- tmp.tv_usec += ((s64) (ticks-zatm_dev->last_clk)*
- (s64) zatm_dev->factor) >> TIMER_SHIFT;
- return tmp;
-}
-
-
-static void zatm_clock_sync(unsigned long dummy)
-{
- struct atm_dev *atm_dev;
- struct zatm_dev *zatm_dev;
-
- for (atm_dev = zatm_boards; atm_dev; atm_dev = zatm_dev->more) {
- unsigned long flags,interval;
- int diff;
- struct timeval now,expected;
- u32 ticks;
-
- zatm_dev = ZATM_DEV(atm_dev);
- save_flags(flags);
- cli();
- ticks = zpeekl(zatm_dev,uPD98401_TSR);
- do_gettimeofday(&now);
- restore_flags(flags);
- expected = exact_time(zatm_dev,ticks);
- diff = 1000000*(expected.tv_sec-now.tv_sec)+
- (expected.tv_usec-now.tv_usec);
- zatm_dev->timer_history[zatm_dev->th_curr].real = now;
- zatm_dev->timer_history[zatm_dev->th_curr].expected = expected;
- zatm_dev->th_curr = (zatm_dev->th_curr+1) &
- (ZATM_TIMER_HISTORY_SIZE-1);
- interval = 1000000*(now.tv_sec-zatm_dev->last_real_time.tv_sec)
- +(now.tv_usec-zatm_dev->last_real_time.tv_usec);
- if (diff >= -ADJ_REP_THRES && diff <= ADJ_REP_THRES)
- zatm_dev->timer_diffs = 0;
- else
-#ifndef AGGRESSIVE_DEBUGGING
- if (++zatm_dev->timer_diffs >= ADJ_MSG_THRES)
-#endif
- {
- zatm_dev->timer_diffs = 0;
- printk(KERN_INFO DEV_LABEL ": TSR update after %ld us:"
- " calculation differed by %d us\n",interval,diff);
-#ifdef AGGRESSIVE_DEBUGGING
- printk(KERN_DEBUG " %d.%08d -> %d.%08d (%lu)\n",
- zatm_dev->last_real_time.tv_sec,
- zatm_dev->last_real_time.tv_usec,
- now.tv_sec,now.tv_usec,interval);
- printk(KERN_DEBUG " %u -> %u (%d)\n",
- zatm_dev->last_clk,ticks,ticks-zatm_dev->last_clk);
- printk(KERN_DEBUG " factor %u\n",zatm_dev->factor);
-#endif
- }
- if (diff < -ADJ_IGN_THRES || diff > ADJ_IGN_THRES) {
- /* filter out any major changes (e.g. time zone setup and
- such) */
- zatm_dev->last_time = now;
- zatm_dev->factor =
- (1000 << TIMER_SHIFT)/(zatm_dev->khz+1);
- }
- else {
- zatm_dev->last_time = expected;
- /*
- * Is the accuracy of udelay really only about 1:300 on
- * a 90 MHz Pentium ? Well, the following line avoids
- * the problem, but ...
- *
- * What it does is simply:
- *
- * zatm_dev->factor = (interval << TIMER_SHIFT)/
- * (ticks-zatm_dev->last_clk);
- */
-#define S(x) #x /* "stringification" ... */
-#define SX(x) S(x)
- asm("movl %2,%%ebx\n\t"
- "subl %3,%%ebx\n\t"
- "xorl %%edx,%%edx\n\t"
- "shldl $" SX(TIMER_SHIFT) ",%1,%%edx\n\t"
- "shl $" SX(TIMER_SHIFT) ",%1\n\t"
- "divl %%ebx\n\t"
- : "=a" (zatm_dev->factor)
- : "0" (interval-diff),"g" (ticks),
- "g" (zatm_dev->last_clk)
- : "ebx","edx","cc");
-#undef S
-#undef SX
-#ifdef AGGRESSIVE_DEBUGGING
- printk(KERN_DEBUG " (%ld << %d)/(%u-%u) = %u\n",
- interval,TIMER_SHIFT,ticks,zatm_dev->last_clk,
- zatm_dev->factor);
-#endif
- }
- zatm_dev->last_real_time = now;
- zatm_dev->last_clk = ticks;
- }
- mod_timer(&sync_timer,sync_timer.expires+POLL_INTERVAL*HZ);
-}
-
-
-static void __init zatm_clock_init(struct zatm_dev *zatm_dev)
-{
- static int start_timer = 1;
- unsigned long flags;
-
- zatm_dev->factor = (1000 << TIMER_SHIFT)/(zatm_dev->khz+1);
- zatm_dev->timer_diffs = 0;
- memset(zatm_dev->timer_history,0,sizeof(zatm_dev->timer_history));
- zatm_dev->th_curr = 0;
- save_flags(flags);
- cli();
- do_gettimeofday(&zatm_dev->last_time);
- zatm_dev->last_clk = zpeekl(zatm_dev,uPD98401_TSR);
- if (start_timer) {
- start_timer = 0;
- init_timer(&sync_timer);
- sync_timer.expires = jiffies+POLL_INTERVAL*HZ;
- sync_timer.function = zatm_clock_sync;
- add_timer(&sync_timer);
- }
- restore_flags(flags);
-}
-
-
-#endif
-
-
/*----------------------------------- RX ------------------------------------*/
@@ -581,11 +428,7 @@
EVENT("error code 0x%x/0x%x\n",(here[3] & uPD98401_AAL5_ES) >>
uPD98401_AAL5_ES_SHIFT,error);
skb = ((struct rx_buffer_head *) bus_to_virt(here[2]))->skb;
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
- skb->stamp = exact_time(zatm_dev,here[1]);
-#else
do_gettimeofday(&skb->stamp);
-#endif
#if 0
printk("[-3..0] 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",((unsigned *) skb->data)[-3],
((unsigned *) skb->data)[-2],((unsigned *) skb->data)[-1],
@@ -690,20 +533,19 @@
zatm_vcc->pool = ZATM_AAL0_POOL;
}
if (zatm_vcc->pool < 0) return -EMSGSIZE;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zwait;
zout(uPD98401_OPEN_CHAN,CMR);
zwait;
DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
DPRINTK("chan is %d\n",chan);
if (!chan) return -EAGAIN;
use_pool(vcc->dev,zatm_vcc->pool);
DPRINTK("pool %d\n",zatm_vcc->pool);
/* set up VC descriptor */
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zpokel(zatm_dev,zatm_vcc->pool << uPD98401_RXVC_POOL_SHIFT,
chan*VC_SIZE/4);
zpokel(zatm_dev,uPD98401_RXVC_OD | (vcc->qos.aal == ATM_AAL5 ?
@@ -711,7 +553,7 @@
zpokel(zatm_dev,0,chan*VC_SIZE/4+2);
zatm_vcc->rx_chan = chan;
zatm_dev->rx_map[chan] = vcc;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return 0;
}
@@ -727,14 +569,13 @@
zatm_dev = ZATM_DEV(vcc->dev);
zatm_vcc = ZATM_VCC(vcc);
if (!zatm_vcc->rx_chan) return 0;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
/* should also handle VPI @@@ */
pos = vcc->vci >> 1;
shift = (1-(vcc->vci & 1)) << 4;
zpokel(zatm_dev,(zpeekl(zatm_dev,pos) & ~(0xffff << shift)) |
((zatm_vcc->rx_chan | uPD98401_RXLT_ENBL) << shift),pos);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return 0;
}
@@ -751,9 +592,8 @@
if (!zatm_vcc->rx_chan) return;
DPRINTK("close_rx\n");
/* disable receiver */
- save_flags(flags);
if (vcc->vpi != ATM_VPI_UNSPEC && vcc->vci != ATM_VCI_UNSPEC) {
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
pos = vcc->vci >> 1;
shift = (1-(vcc->vci & 1)) << 4;
zpokel(zatm_dev,zpeekl(zatm_dev,pos) & ~(0xffff << shift),pos);
@@ -761,9 +601,9 @@
zout(uPD98401_NOP,CMR);
zwait;
zout(uPD98401_NOP,CMR);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
}
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zwait;
zout(uPD98401_DEACT_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
uPD98401_CHAN_ADDR_SHIFT),CMR);
@@ -775,7 +615,7 @@
if (!(zin(CMR) & uPD98401_CHAN_ADDR))
printk(KERN_CRIT DEV_LABEL "(itf %d): can't close RX channel "
"%d\n",vcc->dev->number,zatm_vcc->rx_chan);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
zatm_dev->rx_map[zatm_vcc->rx_chan] = NULL;
zatm_vcc->rx_chan = 0;
unuse_pool(vcc->dev,zatm_vcc->pool);
@@ -828,11 +668,10 @@
zatm_dev = ZATM_DEV(vcc->dev);
zatm_vcc = ZATM_VCC(vcc);
EVENT("iovcnt=%d\n",skb_shinfo(skb)->nr_frags,0);
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
if (!skb_shinfo(skb)->nr_frags) {
if (zatm_vcc->txing == RING_ENTRIES-1) {
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return RING_BUSY;
}
zatm_vcc->txing++;
@@ -887,7 +726,7 @@
zwait;
zout(uPD98401_TX_READY | (zatm_vcc->tx_chan <<
uPD98401_CHAN_ADDR_SHIFT),CMR);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
EVENT("done\n",0,0);
return 0;
}
@@ -1021,15 +860,14 @@
if (zatm_dev->tx_bw < *pcr) return -EAGAIN;
zatm_dev->tx_bw -= *pcr;
}
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr);
zpokel(zatm_dev,(i << uPD98401_IM_I_SHIFT) | m,uPD98401_IM(shaper));
zpokel(zatm_dev,c << uPD98401_PC_C_SHIFT,uPD98401_PC(shaper));
zpokel(zatm_dev,0,uPD98401_X(shaper));
zpokel(zatm_dev,0,uPD98401_Y(shaper));
zpokel(zatm_dev,uPD98401_PS_E,uPD98401_PS(shaper));
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return shaper;
}
@@ -1044,11 +882,10 @@
if (--zatm_dev->ubr_ref_cnt) return;
zatm_dev->ubr = -1;
}
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zpokel(zatm_dev,zpeekl(zatm_dev,uPD98401_PS(shaper)) & ~uPD98401_PS_E,
uPD98401_PS(shaper));
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
zatm_dev->free_shapers |= 1 << shaper;
}
@@ -1067,8 +904,6 @@
chan = zatm_vcc->tx_chan;
if (!chan) return;
DPRINTK("close_tx\n");
- save_flags(flags);
- cli();
while (skb_peek(&zatm_vcc->backlog)) {
if (once) {
printk("waiting for backlog to drain ...\n");
@@ -1087,6 +922,7 @@
DPRINTK("waiting for TX queue to drain ... %p\n",skb);
sleep_on(&zatm_vcc->tx_wait);
}
+ spin_lock_irqsave(&zatm_dev->lock, flags);
#if 0
zwait;
zout(uPD98401_DEACT_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
@@ -1097,7 +933,7 @@
if (!(zin(CMR) & uPD98401_CHAN_ADDR))
printk(KERN_CRIT DEV_LABEL "(itf %d): can't close TX channel "
"%d\n",vcc->dev->number,chan);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
zatm_vcc->tx_chan = 0;
zatm_dev->tx_map[chan] = NULL;
if (zatm_vcc->shaper != zatm_dev->ubr) {
@@ -1122,14 +958,13 @@
zatm_vcc = ZATM_VCC(vcc);
zatm_vcc->tx_chan = 0;
if (vcc->qos.txtp.traffic_class == ATM_NONE) return 0;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zwait;
zout(uPD98401_OPEN_CHAN,CMR);
zwait;
DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
DPRINTK("chan is %d\n",chan);
if (!chan) return -EAGAIN;
unlimited = vcc->qos.txtp.traffic_class == ATM_UBR &&
@@ -1177,15 +1012,14 @@
zatm_dev = ZATM_DEV(vcc->dev);
zatm_vcc = ZATM_VCC(vcc);
if (!zatm_vcc->tx_chan) return 0;
- save_flags(flags);
/* set up VC descriptor */
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4);
zpokel(zatm_dev,uPD98401_TXVC_L | (zatm_vcc->shaper <<
uPD98401_TXVC_SHP_SHIFT) | (vcc->vpi << uPD98401_TXVC_VPI_SHIFT) |
vcc->vci,zatm_vcc->tx_chan*VC_SIZE/4+1);
zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4+2);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
zatm_dev->tx_map[zatm_vcc->tx_chan] = vcc;
return 0;
}
@@ -1391,6 +1225,7 @@
DPRINTK(">zatm_init\n");
zatm_dev = ZATM_DEV(dev);
+ spin_lock_init(&zatm_dev->lock);
pci_dev = zatm_dev->pci_dev;
zatm_dev->base = pci_resource_start(pci_dev, 0);
zatm_dev->irq = pci_dev->irq;
@@ -1440,14 +1275,13 @@
do {
unsigned long flags;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
t0 = zpeekl(zatm_dev,uPD98401_TSR);
udelay(10);
t1 = zpeekl(zatm_dev,uPD98401_TSR);
udelay(1010);
t2 = zpeekl(zatm_dev,uPD98401_TSR);
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
}
while (t0 > t1 || t1 > t2); /* loop if wrapping ... */
zatm_dev->khz = t2-2*t1+t0;
@@ -1455,9 +1289,6 @@
"MHz\n",dev->number,
(zin(VER) & uPD98401_MAJOR) >> uPD98401_MAJOR_SHIFT,
zin(VER) & uPD98401_MINOR,zatm_dev->khz/1000,zatm_dev->khz % 1000);
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
- zatm_clock_init(zatm_dev);
-#endif
return uPD98402_init(dev);
}
@@ -1650,14 +1481,13 @@
return -EFAULT;
if (pool < 0 || pool > ZATM_LAST_POOL)
return -EINVAL;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
info = zatm_dev->pool_info[pool];
if (cmd == ZATM_GETPOOLZ) {
zatm_dev->pool_info[pool].rqa_count = 0;
zatm_dev->pool_info[pool].rqu_count = 0;
}
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return copy_to_user(
&((struct zatm_pool_req *) arg)->info,
&info,sizeof(info)) ? -EFAULT : 0;
@@ -1688,33 +1518,16 @@
if (info.low_water >= info.high_water ||
info.low_water < 0)
return -EINVAL;
- save_flags(flags);
- cli();
+ spin_lock_irqsave(&zatm_dev->lock, flags);
zatm_dev->pool_info[pool].low_water =
info.low_water;
zatm_dev->pool_info[pool].high_water =
info.high_water;
zatm_dev->pool_info[pool].next_thres =
info.next_thres;
- restore_flags(flags);
+ spin_unlock_irqrestore(&zatm_dev->lock, flags);
return 0;
}
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
- case ZATM_GETTHIST:
- {
- int i;
- struct zatm_t_hist hs[ZATM_TIMER_HISTORY_SIZE];
- save_flags(flags);
- cli();
- for (i = 0; i < ZATM_TIMER_HISTORY_SIZE; i++)
- hs[i] = zatm_dev->timer_history[
- (zatm_dev->th_curr+i) &
- (ZATM_TIMER_HISTORY_SIZE-1)];
- restore_flags(flags);
- return copy_to_user((struct zatm_t_hist *) arg,
- hs, sizeof(hs)) ? -EFAULT : 0;
- }
-#endif
default:
if (!dev->phy->ioctl) return -ENOIOCTLCMD;
return dev->phy->ioctl(dev,cmd,arg);
diff -Nru a/drivers/atm/zatm.h b/drivers/atm/zatm.h
--- a/drivers/atm/zatm.h Sun Aug 3 13:14:49 2003
+++ b/drivers/atm/zatm.h Sun Aug 3 13:14:49 2003
@@ -40,31 +40,6 @@
#define MBX_TX_0 2
#define MBX_TX_1 3
-
-/*
- * mkdep doesn't spot this dependency, but that's okay, because zatm.c uses
- * CONFIG_ATM_ZATM_EXACT_TS too.
- */
-
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
-#define POLL_INTERVAL 60 /* TSR poll interval in seconds; must be <=
- (2^31-1)/clock */
-#define TIMER_SHIFT 20 /* scale factor for fixed-point arithmetic;
- 1 << TIMER_SHIFT must be
- (1) <= (2^64-1)/(POLL_INTERVAL*clock),
- (2) >> clock/10^6, and
- (3) <= (2^32-1)/1000 */
-#define ADJ_IGN_THRES 1000000 /* don't adjust if we're off by more than that
- many usecs - this filters clock corrections,
- time zone changes, etc. */
-#define ADJ_REP_THRES 20000 /* report only differences of more than that
- many usecs (don't mention single lost timer
- ticks; 10 msec is only 0.03% anyway) */
-#define ADJ_MSG_THRES 5 /* issue complaints only if getting that many
- significant timer differences in a row */
-#endif
-
-
struct zatm_vcc {
/*-------------------------------- RX part */
int rx_chan; /* RX channel, 0 if none */
@@ -103,17 +78,6 @@
u32 pool_base; /* Free buffer pool dsc (word addr) */
/*-------------------------------- ZATM links */
struct atm_dev *more; /* other ZATM devices */
-#ifdef CONFIG_ATM_ZATM_EXACT_TS
- /*-------------------------------- timestamp calculation */
- u32 last_clk; /* results of last poll: clock, */
- struct timeval last_time; /* virtual time and */
- struct timeval last_real_time; /* real time */
- u32 factor; /* multiplication factor */
- int timer_diffs; /* number of significant deviations */
- struct zatm_t_hist timer_history[ZATM_TIMER_HISTORY_SIZE];
- /* record of timer synchronizations */
- int th_curr; /* current position */
-#endif
/*-------------------------------- general information */
int mem; /* RAM on board (in bytes) */
int khz; /* timer clock */
@@ -121,6 +85,7 @@
unsigned char irq; /* IRQ */
unsigned int base; /* IO base address */
struct pci_dev *pci_dev; /* PCI stuff */
+ spinlock_t lock;
};
diff -Nru a/drivers/block/DAC960.c b/drivers/block/DAC960.c
--- a/drivers/block/DAC960.c Sun Aug 3 13:14:51 2003
+++ b/drivers/block/DAC960.c Sun Aug 3 13:14:51 2003
@@ -2484,6 +2484,7 @@
for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
struct gendisk *disk = Controller->disks[n];
sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
+ sprintf(disk->devfs_name, "rd/c%dd%d", Controller->ControllerNumber, n);
disk->major = MajorNumber;
disk->first_minor = n << DAC960_MaxPartitionsBits;
disk->fops = &DAC960_BlockDeviceOperations;
diff -Nru a/drivers/block/genhd.c b/drivers/block/genhd.c
--- a/drivers/block/genhd.c Sun Aug 3 13:14:48 2003
+++ b/drivers/block/genhd.c Sun Aug 3 13:14:48 2003
@@ -336,7 +336,7 @@
static ssize_t disk_dev_read(struct gendisk * disk, char *page)
{
dev_t base = MKDEV(disk->major, disk->first_minor);
- return sprintf(page, "%04x\n", (unsigned)base);
+ return print_dev_t(page, base);
}
static ssize_t disk_range_read(struct gendisk * disk, char *page)
{
diff -Nru a/drivers/block/ll_rw_blk.c b/drivers/block/ll_rw_blk.c
--- a/drivers/block/ll_rw_blk.c Sun Aug 3 13:14:45 2003
+++ b/drivers/block/ll_rw_blk.c Sun Aug 3 13:14:45 2003
@@ -225,7 +225,6 @@
*/
blk_queue_bounce_limit(q, BLK_BOUNCE_HIGH);
- init_waitqueue_head(&q->queue_wait);
INIT_LIST_HEAD(&q->plug_list);
}
@@ -1027,10 +1026,10 @@
*/
static inline void __generic_unplug_device(request_queue_t *q)
{
- if (!blk_remove_plug(q))
+ if (test_bit(QUEUE_FLAG_STOPPED, &q->queue_flags))
return;
- if (test_bit(QUEUE_FLAG_STOPPED, &q->queue_flags))
+ if (!blk_remove_plug(q))
return;
del_timer(&q->unplug_timer);
diff -Nru a/drivers/block/paride/paride.c b/drivers/block/paride/paride.c
--- a/drivers/block/paride/paride.c Sun Aug 3 13:14:45 2003
+++ b/drivers/block/paride/paride.c Sun Aug 3 13:14:45 2003
@@ -40,6 +40,8 @@
#include "paride.h"
+MODULE_LICENSE("GPL");
+
#define MAX_PROTOS 32
static struct pi_protocol *protocols[MAX_PROTOS];
diff -Nru a/drivers/block/umem.c b/drivers/block/umem.c
--- a/drivers/block/umem.c Sun Aug 3 13:14:53 2003
+++ b/drivers/block/umem.c Sun Aug 3 13:14:53 2003
@@ -1145,7 +1145,7 @@
card->mm_pages[1].page_dma);
}
-static const struct pci_device_id __devinitdata mm_pci_ids[] = { {
+static const struct pci_device_id mm_pci_ids[] = { {
.vendor = PCI_VENDOR_ID_MICRO_MEMORY,
.device = PCI_DEVICE_ID_MICRO_MEMORY_5415CN,
}, {
diff -Nru a/drivers/char/Kconfig b/drivers/char/Kconfig
--- a/drivers/char/Kconfig Sun Aug 3 13:14:44 2003
+++ b/drivers/char/Kconfig Sun Aug 3 13:14:44 2003
@@ -5,8 +5,9 @@
menu "Character devices"
config VT
- bool "Virtual terminal"
+ bool "Virtual terminal" if EMBEDDED
requires INPUT=y
+ default y
---help---
If you say Y here, you will get support for terminal devices with
display and keyboard devices. These are called "virtual" because you
@@ -35,8 +36,9 @@
shiny Linux system :-)
config VT_CONSOLE
- bool "Support for console on virtual terminal"
+ bool "Support for console on virtual terminal" if EMBEDDED
depends on VT
+ default y
---help---
The system console is the device which receives all kernel messages
and warnings and which allows logins in single user mode. If you
diff -Nru a/drivers/char/agp/ali-agp.c b/drivers/char/agp/ali-agp.c
--- a/drivers/char/agp/ali-agp.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/agp/ali-agp.c Sun Aug 3 13:14:50 2003
@@ -363,7 +363,7 @@
agp_put_bridge(bridge);
}
-static struct pci_device_id agp_ali_pci_table[] __initdata = {
+static struct pci_device_id agp_ali_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
--- a/drivers/char/agp/amd-k7-agp.c Sun Aug 3 13:14:53 2003
+++ b/drivers/char/agp/amd-k7-agp.c Sun Aug 3 13:14:53 2003
@@ -442,7 +442,7 @@
agp_put_bridge(bridge);
}
-static struct pci_device_id agp_amdk7_pci_table[] __initdata = {
+static struct pci_device_id agp_amdk7_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/agp/amd-k8-agp.c b/drivers/char/agp/amd-k8-agp.c
--- a/drivers/char/agp/amd-k8-agp.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/agp/amd-k8-agp.c Sun Aug 3 13:14:50 2003
@@ -349,7 +349,7 @@
agp_put_bridge(bridge);
}
-static struct pci_device_id agp_amdk8_pci_table[] __initdata = {
+static struct pci_device_id agp_amdk8_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
--- a/drivers/char/agp/generic.c Sun Aug 3 13:14:47 2003
+++ b/drivers/char/agp/generic.c Sun Aug 3 13:14:47 2003
@@ -40,6 +40,12 @@
__u32 *agp_gatt_table;
int agp_memory_reserved;
+/*
+ * Needed by the Nforce GART driver for the time being. Would be
+ * nice to do this some other way instead of needing this export.
+ */
+EXPORT_SYMBOL_GPL(agp_memory_reserved);
+
/*
* Generic routines for handling agp_memory structures -
* They use the basic page allocation routines to do the brunt of the work.
@@ -515,7 +521,7 @@
continue;
printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
- agp_v3 ? 3 : 2, device->slot_name, mode);
+ agp_v3 ? 3 : 2, pci_name(device), mode);
pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
}
}
diff -Nru a/drivers/char/agp/i460-agp.c b/drivers/char/agp/i460-agp.c
--- a/drivers/char/agp/i460-agp.c Sun Aug 3 13:14:49 2003
+++ b/drivers/char/agp/i460-agp.c Sun Aug 3 13:14:49 2003
@@ -590,7 +590,7 @@
agp_put_bridge(bridge);
}
-static struct pci_device_id agp_intel_i460_pci_table[] __initdata = {
+static struct pci_device_id agp_intel_i460_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
--- a/drivers/char/agp/intel-agp.c Sun Aug 3 13:14:48 2003
+++ b/drivers/char/agp/intel-agp.c Sun Aug 3 13:14:48 2003
@@ -1237,6 +1237,7 @@
struct agp_bridge_data *bridge;
char *name = "(unknown)";
u8 cap_ptr = 0;
+ struct resource *r;
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
@@ -1378,6 +1379,29 @@
printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
+ /*
+ * The following fixes the case where the BIOS has "forgotten" to
+ * provide an address range for the GART.
+ * 20030610 - hamish@zot.org
+ */
+ r = &pdev->resource[0];
+ if (!r->start && r->end) {
+ if(pci_assign_resource(pdev, 0)) {
+ printk(KERN_ERR PFX "could not assign resource 0\n");
+ return (-ENODEV);
+ }
+ }
+
+ /*
+ * If the device has not been properly setup, the following will catch
+ * the problem and should stop the system from crashing.
+ * 20030610 - hamish@zot.org
+ */
+ if (pci_enable_device(pdev)) {
+ printk(KERN_ERR PFX "Unable to Enable PCI device\n");
+ return (-ENODEV);
+ }
+
/* Fill in the mode register */
if (cap_ptr) {
pci_read_config_dword(pdev,
@@ -1417,7 +1441,7 @@
return 0;
}
-static struct pci_device_id agp_intel_pci_table[] __initdata = {
+static struct pci_device_id agp_intel_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/agp/nvidia-agp.c b/drivers/char/agp/nvidia-agp.c
--- a/drivers/char/agp/nvidia-agp.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/agp/nvidia-agp.c Sun Aug 3 13:14:46 2003
@@ -338,7 +338,7 @@
agp_put_bridge(bridge);
}
-static struct pci_device_id agp_nvidia_pci_table[] __initdata = {
+static struct pci_device_id agp_nvidia_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/agp/sworks-agp.c b/drivers/char/agp/sworks-agp.c
--- a/drivers/char/agp/sworks-agp.c Sun Aug 3 13:14:47 2003
+++ b/drivers/char/agp/sworks-agp.c Sun Aug 3 13:14:47 2003
@@ -508,7 +508,7 @@
agp_put_bridge(bridge);
}
-static struct pci_device_id agp_serverworks_pci_table[] __initdata = {
+static struct pci_device_id agp_serverworks_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
diff -Nru a/drivers/char/cyclades.c b/drivers/char/cyclades.c
--- a/drivers/char/cyclades.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/cyclades.c Sun Aug 3 13:14:46 2003
@@ -5665,7 +5665,7 @@
cy_cleanup_module(void)
{
int i;
- int e1, e2;
+ int e1;
unsigned long flags;
#ifndef CONFIG_CYZ_INTR
diff -Nru a/drivers/char/drm/Kconfig b/drivers/char/drm/Kconfig
--- a/drivers/char/drm/Kconfig Sun Aug 3 13:14:52 2003
+++ b/drivers/char/drm/Kconfig Sun Aug 3 13:14:52 2003
@@ -72,3 +72,12 @@
Choose this option if you have a Matrox G200, G400 or G450 graphics
card. If M is selected, the module will be called mga. AGP
support is required for this driver to work.
+
+config DRM_SIS
+ tristate "SiS video cards"
+ depends on DRM && AGP && FB_SIS
+ help
+ Choose this option if you have a SiS 630 or compatibel video
+ chipset. If M is selected the module will be called sis. AGP
+ and SiS FB support is required for this driver to work.
+
diff -Nru a/drivers/char/drm/Makefile b/drivers/char/drm/Makefile
--- a/drivers/char/drm/Makefile Sun Aug 3 13:14:52 2003
+++ b/drivers/char/drm/Makefile Sun Aug 3 13:14:52 2003
@@ -10,6 +10,7 @@
i830-objs := i830_drv.o i830_dma.o i830_irq.o
radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o
ffb-objs := ffb_drv.o ffb_context.o
+sis-objs := sis_drv.o sis_ds.o sis_mm.o
obj-$(CONFIG_DRM_GAMMA) += gamma.o
obj-$(CONFIG_DRM_TDFX) += tdfx.o
@@ -19,3 +20,5 @@
obj-$(CONFIG_DRM_I810) += i810.o
obj-$(CONFIG_DRM_I830) += i830.o
obj-$(CONFIG_DRM_FFB) += ffb.o
+obj-$(CONFIG_DRM_SIS) += sis.o
+
diff -Nru a/drivers/char/drm/gamma_lists.h b/drivers/char/drm/gamma_lists.h
--- a/drivers/char/drm/gamma_lists.h Sun Aug 3 13:14:46 2003
+++ b/drivers/char/drm/gamma_lists.h Sun Aug 3 13:14:46 2003
@@ -29,7 +29,6 @@
* Gareth Hughes <gareth@valinux.com>
*/
-#define __NO_VERSION__
#include "drmP.h"
diff -Nru a/drivers/char/drm/i830_irq.c b/drivers/char/drm/i830_irq.c
--- a/drivers/char/drm/i830_irq.c Sun Aug 3 13:14:51 2003
+++ b/drivers/char/drm/i830_irq.c Sun Aug 3 13:14:51 2003
@@ -35,7 +35,7 @@
#include <linux/delay.h>
-void DRM(dma_service)(int irq, void *device, struct pt_regs *regs)
+irqreturn_t DRM(dma_service)(int irq, void *device, struct pt_regs *regs)
{
drm_device_t *dev = (drm_device_t *)device;
drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
@@ -44,15 +44,15 @@
temp = I830_READ16(I830REG_INT_IDENTITY_R);
DRM_DEBUG("%x\n", temp);
- if (temp == 0)
- return;
+ if ( !( temp & 2 ) )
+ return IRQ_NONE;
I830_WRITE16(I830REG_INT_IDENTITY_R, temp);
- if (temp & 2) {
- atomic_inc(&dev_priv->irq_received);
- wake_up_interruptible(&dev_priv->irq_queue);
- }
+ atomic_inc(&dev_priv->irq_received);
+ wake_up_interruptible(&dev_priv->irq_queue);
+
+ return IRQ_HANDLED;
}
diff -Nru a/drivers/char/drm/r128.h b/drivers/char/drm/r128.h
--- a/drivers/char/drm/r128.h Sun Aug 3 13:14:47 2003
+++ b/drivers/char/drm/r128.h Sun Aug 3 13:14:47 2003
@@ -47,10 +47,10 @@
#define DRIVER_NAME "r128"
#define DRIVER_DESC "ATI Rage 128"
-#define DRIVER_DATE "20030526"
+#define DRIVER_DATE "20030725"
#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 4
+#define DRIVER_MINOR 5
#define DRIVER_PATCHLEVEL 0
/* Interface history:
@@ -68,6 +68,7 @@
[DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_FLIP)] = { r128_cce_flip, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \
diff -Nru a/drivers/char/drm/r128_cce.c b/drivers/char/drm/r128_cce.c
--- a/drivers/char/drm/r128_cce.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/drm/r128_cce.c Sun Aug 3 13:14:46 2003
@@ -782,59 +782,8 @@
return r128_do_engine_reset( dev );
}
-
-/* ================================================================
- * Fullscreen mode
- */
-
-static int r128_do_init_pageflip( drm_device_t *dev )
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG( "\n" );
-
- dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET );
- dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL );
-
- R128_WRITE( R128_CRTC_OFFSET, dev_priv->front_offset );
- R128_WRITE( R128_CRTC_OFFSET_CNTL,
- dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL );
-
- dev_priv->page_flipping = 1;
- dev_priv->current_page = 0;
-
- return 0;
-}
-
-int r128_do_cleanup_pageflip( drm_device_t *dev )
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG( "\n" );
-
- R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset );
- R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
-
- dev_priv->page_flipping = 0;
- dev_priv->current_page = 0;
-
- return 0;
-}
-
int r128_fullscreen( DRM_IOCTL_ARGS )
{
- DRM_DEVICE;
- drm_r128_fullscreen_t fs;
-
- LOCK_TEST_WITH_RETURN( dev, filp );
-
- DRM_COPY_FROM_USER_IOCTL( fs, (drm_r128_fullscreen_t *)data, sizeof(fs) );
-
- switch ( fs.func ) {
- case R128_INIT_FULLSCREEN:
- return r128_do_init_pageflip( dev );
- case R128_CLEANUP_FULLSCREEN:
- return r128_do_cleanup_pageflip( dev );
- }
-
return DRM_ERR(EINVAL);
}
@@ -927,7 +876,7 @@
DRM_UDELAY( 1 );
}
- DRM_ERROR( "returning NULL!\n" );
+ DRM_DEBUG( "returning NULL!\n" );
return NULL;
}
diff -Nru a/drivers/char/drm/r128_drm.h b/drivers/char/drm/r128_drm.h
--- a/drivers/char/drm/r128_drm.h Sun Aug 3 13:14:50 2003
+++ b/drivers/char/drm/r128_drm.h Sun Aug 3 13:14:50 2003
@@ -164,6 +164,8 @@
drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
unsigned int tex_age[R128_NR_TEX_HEAPS];
int ctx_owner;
+ int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
+ int pfCurrentPage; /* which buffer is being displayed? */
} drm_r128_sarea_t;
@@ -191,6 +193,7 @@
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( 0x51, drm_r128_clear2_t)
#define DRM_IOCTL_R128_GETPARAM DRM_IOW( 0x52, drm_r128_getparam_t)
+#define DRM_IOCTL_R128_FLIP DRM_IO( 0x53)
typedef struct drm_r128_init {
enum {
diff -Nru a/drivers/char/drm/r128_drv.h b/drivers/char/drm/r128_drv.h
--- a/drivers/char/drm/r128_drv.h Sun Aug 3 13:14:53 2003
+++ b/drivers/char/drm/r128_drv.h Sun Aug 3 13:14:53 2003
@@ -147,6 +147,7 @@
/* r128_state.c */
extern int r128_cce_clear( DRM_IOCTL_ARGS );
extern int r128_cce_swap( DRM_IOCTL_ARGS );
+extern int r128_cce_flip( DRM_IOCTL_ARGS );
extern int r128_cce_vertex( DRM_IOCTL_ARGS );
extern int r128_cce_indices( DRM_IOCTL_ARGS );
extern int r128_cce_blit( DRM_IOCTL_ARGS );
diff -Nru a/drivers/char/drm/r128_state.c b/drivers/char/drm/r128_state.c
--- a/drivers/char/drm/r128_state.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/drm/r128_state.c Sun Aug 3 13:14:46 2003
@@ -500,8 +500,16 @@
R128_GMC_AUX_CLIP_DIS |
R128_GMC_WR_MSK_DIS );
- OUT_RING( dev_priv->back_pitch_offset_c );
- OUT_RING( dev_priv->front_pitch_offset_c );
+ /* Make this work even if front & back are flipped:
+ */
+ if (dev_priv->current_page == 0) {
+ OUT_RING( dev_priv->back_pitch_offset_c );
+ OUT_RING( dev_priv->front_pitch_offset_c );
+ }
+ else {
+ OUT_RING( dev_priv->front_pitch_offset_c );
+ OUT_RING( dev_priv->back_pitch_offset_c );
+ }
OUT_RING( (x << 16) | y );
OUT_RING( (x << 16) | y );
@@ -528,7 +536,10 @@
{
drm_r128_private_t *dev_priv = dev->dev_private;
RING_LOCALS;
- DRM_DEBUG( "page=%d\n", dev_priv->current_page );
+ DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
+ __FUNCTION__,
+ dev_priv->current_page,
+ dev_priv->sarea_priv->pfCurrentPage);
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
@@ -543,10 +554,8 @@
if ( dev_priv->current_page == 0 ) {
OUT_RING( dev_priv->back_offset );
- dev_priv->current_page = 1;
} else {
OUT_RING( dev_priv->front_offset );
- dev_priv->current_page = 0;
}
ADVANCE_RING();
@@ -556,6 +565,8 @@
* performing the swapbuffer ioctl.
*/
dev_priv->sarea_priv->last_frame++;
+ dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page =
+ 1 - dev_priv->current_page;
BEGIN_RING( 2 );
@@ -1266,6 +1277,62 @@
return 0;
}
+static int r128_do_init_pageflip( drm_device_t *dev )
+{
+ drm_r128_private_t *dev_priv = dev->dev_private;
+ DRM_DEBUG( "\n" );
+
+ dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET );
+ dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL );
+
+ R128_WRITE( R128_CRTC_OFFSET, dev_priv->front_offset );
+ R128_WRITE( R128_CRTC_OFFSET_CNTL,
+ dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL );
+
+ dev_priv->page_flipping = 1;
+ dev_priv->current_page = 0;
+ dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page;
+
+ return 0;
+}
+
+int r128_do_cleanup_pageflip( drm_device_t *dev )
+{
+ drm_r128_private_t *dev_priv = dev->dev_private;
+ DRM_DEBUG( "\n" );
+
+ R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset );
+ R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
+
+ if (dev_priv->current_page != 0)
+ r128_cce_dispatch_flip( dev );
+
+ dev_priv->page_flipping = 0;
+ return 0;
+}
+
+/* Swapping and flipping are different operations, need different ioctls.
+ * They can & should be intermixed to support multiple 3d windows.
+ */
+
+int r128_cce_flip( DRM_IOCTL_ARGS )
+{
+ DRM_DEVICE;
+ drm_r128_private_t *dev_priv = dev->dev_private;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ LOCK_TEST_WITH_RETURN( dev, filp );
+
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+ if (!dev_priv->page_flipping)
+ r128_do_init_pageflip( dev );
+
+ r128_cce_dispatch_flip( dev );
+
+ return 0;
+}
+
int r128_cce_swap( DRM_IOCTL_ARGS )
{
DRM_DEVICE;
@@ -1280,13 +1347,9 @@
if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
- if ( !dev_priv->page_flipping ) {
- r128_cce_dispatch_swap( dev );
- dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT |
- R128_UPLOAD_MASKS);
- } else {
- r128_cce_dispatch_flip( dev );
- }
+ r128_cce_dispatch_swap( dev );
+ dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT |
+ R128_UPLOAD_MASKS);
return 0;
}
diff -Nru a/drivers/char/drm/sis_mm.c b/drivers/char/drm/sis_mm.c
--- a/drivers/char/drm/sis_mm.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/drm/sis_mm.c Sun Aug 3 13:14:50 2003
@@ -28,8 +28,9 @@
*
*/
+#include <linux/config.h>
#include "sis.h"
-#include <linux/sisfb.h>
+#include "video/sisfb.h"
#include "drmP.h"
#include "sis_drm.h"
#include "sis_drv.h"
diff -Nru a/drivers/char/epca.c b/drivers/char/epca.c
--- a/drivers/char/epca.c Sun Aug 3 13:14:49 2003
+++ b/drivers/char/epca.c Sun Aug 3 13:14:49 2003
@@ -3945,7 +3945,7 @@
}
-static struct pci_device_id epca_pci_tbl[] __initdata = {
+static struct pci_device_id epca_pci_tbl[] = {
{ PCI_VENDOR_DIGI, PCI_DEVICE_XR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_xr },
{ PCI_VENDOR_DIGI, PCI_DEVICE_XEM, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_xem },
{ PCI_VENDOR_DIGI, PCI_DEVICE_CX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_cx },
diff -Nru a/drivers/char/ipmi/ipmi_kcs_intf.c b/drivers/char/ipmi/ipmi_kcs_intf.c
--- a/drivers/char/ipmi/ipmi_kcs_intf.c Sun Aug 3 13:14:44 2003
+++ b/drivers/char/ipmi/ipmi_kcs_intf.c Sun Aug 3 13:14:44 2003
@@ -1016,7 +1016,7 @@
return rv;
}
-#ifdef CONFIG_ACPI
+#ifdef CONFIG_ACPI_INTERPRETER
/* Retrieve the base physical address from ACPI tables. Originally
from Hewlett-Packard simple bmc.c, a GPL KCS driver. */
@@ -1072,7 +1072,7 @@
int rv = 0;
int pos = 0;
int i = 0;
-#ifdef CONFIG_ACPI
+#ifdef CONFIG_ACPI_INTERPRETER
unsigned long physaddr = 0;
#endif
@@ -1102,7 +1102,7 @@
(because they weren't already specified above). */
if (kcs_trydefaults) {
-#ifdef CONFIG_ACPI
+#ifdef CONFIG_ACPI_INTERPRETER
if ((physaddr = acpi_find_bmc())) {
if (!check_mem_region(physaddr, 2)) {
rv = init_one_kcs(0,
diff -Nru a/drivers/char/mxser.c b/drivers/char/mxser.c
--- a/drivers/char/mxser.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/mxser.c Sun Aug 3 13:14:50 2003
@@ -498,7 +498,6 @@
{
int i, m, retval, b;
int n, index;
- int ret1, ret2;
struct mxser_hwconf hwconf;
mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
diff -Nru a/drivers/char/n_r3964.c b/drivers/char/n_r3964.c
--- a/drivers/char/n_r3964.c Sun Aug 3 13:14:52 2003
+++ b/drivers/char/n_r3964.c Sun Aug 3 13:14:52 2003
@@ -669,7 +669,7 @@
}
else
{
- TRACE_PE("TRANSMITTING - got illegal char");
+ TRACE_PE("TRANSMITTING - got invalid char");
pInfo->state = R3964_WAIT_ZVZ_BEFORE_TX_RETRY;
mod_timer(&pInfo->tmr, jiffies + R3964_TO_ZVZ);
diff -Nru a/drivers/char/n_tty.c b/drivers/char/n_tty.c
--- a/drivers/char/n_tty.c Sun Aug 3 13:14:44 2003
+++ b/drivers/char/n_tty.c Sun Aug 3 13:14:44 2003
@@ -1251,7 +1251,8 @@
else
tty->minimum_to_wake = 1;
}
- if (tty->driver->chars_in_buffer(tty) < WAKEUP_CHARS)
+ if (tty->driver->chars_in_buffer(tty) < WAKEUP_CHARS &&
+ tty->driver->write_room(tty) > 0)
mask |= POLLOUT | POLLWRNORM;
return mask;
}
diff -Nru a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c
--- a/drivers/char/pcmcia/synclink_cs.c Sun Aug 3 13:14:47 2003
+++ b/drivers/char/pcmcia/synclink_cs.c Sun Aug 3 13:14:47 2003
@@ -2814,7 +2814,7 @@
/* verify range of specified line number */
line = tty->index;
if ((line < 0) || (line >= mgslpc_device_count)) {
- printk("%s(%d):mgslpc_open with illegal line #%d.\n",
+ printk("%s(%d):mgslpc_open with invalid line #%d.\n",
__FILE__,__LINE__,line);
return -ENODEV;
}
diff -Nru a/drivers/char/pcxx.c b/drivers/char/pcxx.c
--- a/drivers/char/pcxx.c Sun Aug 3 13:14:49 2003
+++ b/drivers/char/pcxx.c Sun Aug 3 13:14:49 2003
@@ -110,7 +110,6 @@
static int altpin[] = {0, 0, 0, 0};
static int numports[] = {0, 0, 0, 0};
-# if (LINUX_VERSION_CODE > 0x020111)
MODULE_AUTHOR("Bernhard Kaindl");
MODULE_DESCRIPTION("Digiboard PC/X{i,e,eve} driver");
MODULE_LICENSE("GPL");
@@ -121,7 +120,6 @@
MODULE_PARM(memsize, "1-4i");
MODULE_PARM(altpin, "1-4i");
MODULE_PARM(numports, "1-4i");
-# endif
#endif MODULE
diff -Nru a/drivers/char/random.c b/drivers/char/random.c
--- a/drivers/char/random.c Sun Aug 3 13:14:45 2003
+++ b/drivers/char/random.c Sun Aug 3 13:14:45 2003
@@ -251,6 +251,8 @@
#include <linux/fs.h>
#include <linux/workqueue.h>
#include <linux/genhd.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
@@ -2056,7 +2058,7 @@
static struct keydata *__check_and_rekey(time_t time)
{
struct keydata *keyptr;
- spin_lock(&ip_lock);
+ spin_lock_bh(&ip_lock);
keyptr = &ip_keydata[ip_cnt&1];
if (!keyptr->rekey_time || (time - keyptr->rekey_time) > REKEY_INTERVAL) {
keyptr = &ip_keydata[1^(ip_cnt&1)];
@@ -2066,7 +2068,7 @@
mb();
ip_cnt++;
}
- spin_unlock(&ip_lock);
+ spin_unlock_bh(&ip_lock);
return keyptr;
}
diff -Nru a/drivers/char/rio/riotable.c b/drivers/char/rio/riotable.c
--- a/drivers/char/rio/riotable.c Sun Aug 3 13:14:52 2003
+++ b/drivers/char/rio/riotable.c Sun Aug 3 13:14:52 2003
@@ -208,7 +208,7 @@
return -ENXIO;
}
if ( MapP->ID > MAX_RUP ) {
- rio_dprintk (RIO_DEBUG_TABLE, "RIO: RTA %s has been allocated an illegal ID %d\n",
+ rio_dprintk (RIO_DEBUG_TABLE, "RIO: RTA %s has been allocated an invalid ID %d\n",
MapP->Name, MapP->ID);
p->RIOError.Error = ID_NUMBER_OUT_OF_RANGE;
p->RIOError.Entry = Entry;
diff -Nru a/drivers/char/rocket.c b/drivers/char/rocket.c
--- a/drivers/char/rocket.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/rocket.c Sun Aug 3 13:14:50 2003
@@ -2202,7 +2202,7 @@
ctlp->AiopNumChan[aiop] = ports_per_aiop;
printk("Comtrol PCI controller #%d ID 0x%x found in bus:slot:fn %s at address %04lx, "
- "%d AIOP(s) (%s)\n", i, dev->device, dev->slot_name,
+ "%d AIOP(s) (%s)\n", i, dev->device, pci_name(dev),
rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString);
printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
rocketModel[i].modelString,
diff -Nru a/drivers/char/stallion.c b/drivers/char/stallion.c
--- a/drivers/char/stallion.c Sun Aug 3 13:14:51 2003
+++ b/drivers/char/stallion.c Sun Aug 3 13:14:51 2003
@@ -3173,7 +3173,7 @@
for (i = 0; i < 4; i++) {
devfs_mk_cdev(MKDEV(STL_SIOMEMMAJOR, i),
S_IFCHR|S_IRUSR|S_IWUSR,
- &stl_fsiomem, NULL, "staliomem/%d", i);
+ "staliomem/%d", i);
}
stl_serial->owner = THIS_MODULE;
diff -Nru a/drivers/char/synclink.c b/drivers/char/synclink.c
--- a/drivers/char/synclink.c Sun Aug 3 13:14:47 2003
+++ b/drivers/char/synclink.c Sun Aug 3 13:14:47 2003
@@ -916,7 +916,7 @@
const struct pci_device_id *ent);
static void synclink_remove_one (struct pci_dev *dev);
-static struct pci_device_id synclink_pci_tbl[] __devinitdata = {
+static struct pci_device_id synclink_pci_tbl[] = {
{ PCI_VENDOR_ID_MICROGATE, PCI_DEVICE_ID_MICROGATE_USC, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_MICROGATE, 0x0210, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, }, /* terminate list */
@@ -3487,7 +3487,7 @@
/* verify range of specified line number */
line = tty->index;
if ((line < 0) || (line >= mgsl_device_count)) {
- printk("%s(%d):mgsl_open with illegal line #%d.\n",
+ printk("%s(%d):mgsl_open with invalid line #%d.\n",
__FILE__,__LINE__,line);
return -ENODEV;
}
diff -Nru a/drivers/char/synclinkmp.c b/drivers/char/synclinkmp.c
--- a/drivers/char/synclinkmp.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/synclinkmp.c Sun Aug 3 13:14:46 2003
@@ -501,7 +501,7 @@
static int synclinkmp_init_one(struct pci_dev *dev,const struct pci_device_id *ent);
static void synclinkmp_remove_one(struct pci_dev *dev);
-static struct pci_device_id synclinkmp_pci_tbl[] __devinitdata = {
+static struct pci_device_id synclinkmp_pci_tbl[] = {
{ PCI_VENDOR_ID_MICROGATE, PCI_DEVICE_ID_MICROGATE_SCA, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, }, /* terminate list */
};
@@ -729,7 +729,7 @@
line = tty->index;
if ((line < 0) || (line >= synclinkmp_device_count)) {
- printk("%s(%d): open with illegal line #%d.\n",
+ printk("%s(%d): open with invalid line #%d.\n",
__FILE__,__LINE__,line);
return -ENODEV;
}
diff -Nru a/drivers/char/tty_io.c b/drivers/char/tty_io.c
--- a/drivers/char/tty_io.c Sun Aug 3 13:14:49 2003
+++ b/drivers/char/tty_io.c Sun Aug 3 13:14:49 2003
@@ -611,6 +611,8 @@
(tty->driver->stop)(tty);
}
+EXPORT_SYMBOL(stop_tty);
+
void start_tty(struct tty_struct *tty)
{
if (!tty->stopped || tty->flow_stopped)
@@ -629,6 +631,8 @@
wake_up_interruptible(&tty->write_wait);
}
+EXPORT_SYMBOL(start_tty);
+
static ssize_t tty_read(struct file * file, char * buf, size_t count,
loff_t *ppos)
{
@@ -2106,7 +2110,7 @@
static ssize_t show_dev(struct class_device *class_dev, char *buf)
{
struct tty_dev *tty_dev = to_tty_dev(class_dev);
- return sprintf(buf, "%04lx\n", (unsigned long)tty_dev->dev);
+ return print_dev_t(buf, tty_dev->dev);
}
static CLASS_DEVICE_ATTR(dev, S_IRUGO, show_dev, NULL);
diff -Nru a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
--- a/drivers/char/watchdog/Kconfig Sun Aug 3 13:14:50 2003
+++ b/drivers/char/watchdog/Kconfig Sun Aug 3 13:14:50 2003
@@ -1,5 +1,5 @@
#
-# Character device configuration
+# Watchdog device configuration
#
menu "Watchdog Cards"
@@ -68,6 +68,24 @@
say M here and read <file:Documentation/modules.txt>. The module
will be called wdt.
+config WDT_501
+ bool "WDT501 features"
+ depends on WDT
+ help
+ Saying Y here and creating a character special file /dev/temperature
+ with major number 10 and minor number 131 ("man mknod") will give
+ you a thermometer inside your computer: reading from
+ /dev/temperature yields one byte, the temperature in degrees
+ Fahrenheit. This works only if you have a WDT501P watchdog board
+ installed.
+
+config WDT_501_FAN
+ bool "Fan Tachometer"
+ depends on WDT_501
+ help
+ Enable the Fan Tachometer on the WDT501. Only do this if you have a
+ fan tachometer actually set up.
+
config WDTPCI
tristate "WDT PCI Watchdog timer"
depends on WATCHDOG
@@ -84,9 +102,9 @@
say M here and read <file:Documentation/modules.txt>. The module
will be called wdt_pci.
-config WDT_501
- bool "WDT501 features"
- depends on WDT
+config WDT_501_PCI
+ bool "WDT501-PCI features"
+ depends on WDTPCI
help
Saying Y here and creating a character special file /dev/temperature
with major number 10 and minor number 131 ("man mknod") will give
@@ -95,13 +113,6 @@
Fahrenheit. This works only if you have a WDT501P watchdog board
installed.
-config WDT_501_FAN
- bool "Fan Tachometer"
- depends on WDT_501
- help
- Enable the Fan Tachometer on the WDT501. Only do this if you have a
- fan tachometer actually set up.
-
config PCWATCHDOG
tristate "Berkshire Products PC Watchdog"
depends on WATCHDOG
@@ -132,7 +143,7 @@
This driver is like the WDT501 driver but for different hardware.
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
- The module is called pscwdt. If you want to compile it as a
+ The module is called acquirewdt. If you want to compile it as a
module, say M here and read <file:Documentation/modules.txt>. Most
people will say N.
@@ -179,7 +190,7 @@
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
If you want to compile it as a module, say M here and read
- Documentation/modules.txt. The module will be called sa1100_wdt.
+ <file:Documentation/modules.txt>. The module will be called sa1100_wdt.
config EUROTECH_WDT
tristate "Eurotech CPU-1220/1410 Watchdog Timer"
@@ -203,14 +214,14 @@
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
The module is called ib700wdt. If you want to compile it as a
- module, say M here and read Documentation/modules.txt. Most people
+ module, say M here and read <file:Documentation/modules.txt>. Most people
will say N.
config I810_TCO
- tristate "Intel i810 TCO timer / Watchdog"
+ tristate "Intel i8xx TCO timer / Watchdog"
depends on WATCHDOG
---help---
- Hardware driver for the TCO timer built into the Intel i810 and i815
+ Hardware driver for the TCO timer built into the Intel i8xx
chipset family. The TCO (Total Cost of Ownership) timer is a
watchdog timer that will reboot the machine after its second
expiration. The expiration time can be configured by commandline
@@ -277,7 +288,7 @@
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
- The module is called mixcomwd. If you want to compile it as a
+ The module is called w83877f_wdt. If you want to compile it as a
module, say M here and read <file:Documentation/modules.txt>. Most
people will say N.
@@ -296,10 +307,6 @@
The module is called machzwd. If you want to compile it as a
module, say M here and read <file:Documentation/modules.txt>.
-config W83877F_WDT
- tristate "W83877F Computer Watchdog"
- depends on WATCHDOG
-
config SC520_WDT
tristate "AMD Elan SC520 processor Watchdog"
depends on WATCHDOG
@@ -336,7 +343,7 @@
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
The module is called alim7101_wdt. If you want to compile it as a
- module, say M here and read Documentation/modules.txt. Most
+ module, say M here and read <file:Documentation/modules.txt>. Most
people will say N.
config SC1200_WDT
@@ -351,7 +358,7 @@
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
The module is called sc1200wdt. If you want to compile it as a
- module, say M here and read Documentation/modules.txt. Most
+ module, say M here and read <file:Documentation/modules.txt>. Most
people will say N.
config WAFER_WDT
@@ -364,8 +371,8 @@
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
If you want to compile it as a module, say M here and read
- Documentation/modules.txt. The module will be called
- wafer5823wdt.o
+ <file:Documentation/modules.txt>. The module will be called
+ wafer5823wdt.
config CPU5_WDT
tristate "SMA CPU5 Watchdog"
@@ -374,7 +381,7 @@
TBD.
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
- The module is called cpu5wdt.o. If you want to compile it as a
+ The module is called cpu5wdt. If you want to compile it as a
module, say M here and read <file:Documentation/modules.txt>.
endmenu
diff -Nru a/drivers/char/watchdog/acquirewdt.c b/drivers/char/watchdog/acquirewdt.c
--- a/drivers/char/watchdog/acquirewdt.c Sun Aug 3 13:14:49 2003
+++ b/drivers/char/watchdog/acquirewdt.c Sun Aug 3 13:14:49 2003
@@ -24,6 +24,7 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
@@ -55,7 +56,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
/*
diff -Nru a/drivers/char/watchdog/alim7101_wdt.c b/drivers/char/watchdog/alim7101_wdt.c
--- a/drivers/char/watchdog/alim7101_wdt.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/watchdog/alim7101_wdt.c Sun Aug 3 13:14:50 2003
@@ -38,6 +38,7 @@
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <linux/init.h>
+#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <asm/io.h>
@@ -79,7 +80,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
/*
diff -Nru a/drivers/char/watchdog/ib700wdt.c b/drivers/char/watchdog/ib700wdt.c
--- a/drivers/char/watchdog/ib700wdt.c Sun Aug 3 13:14:52 2003
+++ b/drivers/char/watchdog/ib700wdt.c Sun Aug 3 13:14:52 2003
@@ -42,6 +42,7 @@
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/spinlock.h>
+#include <linux/moduleparam.h>
#include <asm/io.h>
#include <asm/uaccess.h>
@@ -122,7 +123,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
diff -Nru a/drivers/char/watchdog/indydog.c b/drivers/char/watchdog/indydog.c
--- a/drivers/char/watchdog/indydog.c Sun Aug 3 13:14:52 2003
+++ b/drivers/char/watchdog/indydog.c Sun Aug 3 13:14:52 2003
@@ -20,6 +20,7 @@
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/init.h>
+#include <linux/moduleparam.h>
#include <asm/uaccess.h>
#include <asm/sgi/sgimc.h>
@@ -33,7 +34,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
static void indydog_ping()
diff -Nru a/drivers/char/watchdog/machzwd.c b/drivers/char/watchdog/machzwd.c
--- a/drivers/char/watchdog/machzwd.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/watchdog/machzwd.c Sun Aug 3 13:14:46 2003
@@ -30,6 +30,7 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/timer.h>
#include <linux/jiffies.h>
@@ -97,8 +98,6 @@
MODULE_AUTHOR("Fernando Fuganti <fuganti@conectiva.com.br>");
MODULE_DESCRIPTION("MachZ ZF-Logic Watchdog driver");
MODULE_LICENSE("GPL");
-MODULE_PARM(action, "i");
-MODULE_PARM_DESC(action, "after watchdog resets, generate: 0 = RESET(*) 1 = SMI 2 = NMI 3 = SCI");
#ifdef CONFIG_WATCHDOG_NOWAYOUT
static int nowayout = 1;
@@ -106,7 +105,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
#define PFX "machzwd"
@@ -127,6 +126,9 @@
* defaults to GEN_RESET (0)
*/
static int action = 0;
+module_param(action, int, 0);
+MODULE_PARM_DESC(action, "after watchdog resets, generate: 0 = RESET(*) 1 = SMI 2 = NMI 3 = SCI");
+
static int zf_action = GEN_RESET;
static int zf_is_open = 0;
static int zf_expect_close = 0;
diff -Nru a/drivers/char/watchdog/mixcomwd.c b/drivers/char/watchdog/mixcomwd.c
--- a/drivers/char/watchdog/mixcomwd.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/watchdog/mixcomwd.c Sun Aug 3 13:14:46 2003
@@ -36,6 +36,7 @@
#define VERSION "0.5"
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/config.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
@@ -67,7 +68,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
static void mixcomwd_ping(void)
diff -Nru a/drivers/char/watchdog/pcwd.c b/drivers/char/watchdog/pcwd.c
--- a/drivers/char/watchdog/pcwd.c Sun Aug 3 13:14:45 2003
+++ b/drivers/char/watchdog/pcwd.c Sun Aug 3 13:14:45 2003
@@ -45,6 +45,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/timer.h>
#include <linux/config.h>
@@ -87,7 +88,7 @@
static int timeout = 2;
static int expect_close = 0;
-MODULE_PARM(timeout,"i");
+module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default=2)");
#ifdef CONFIG_WATCHDOG_NOWAYOUT
@@ -96,7 +97,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
diff -Nru a/drivers/char/watchdog/sa1100_wdt.c b/drivers/char/watchdog/sa1100_wdt.c
--- a/drivers/char/watchdog/sa1100_wdt.c Sun Aug 3 13:14:48 2003
+++ b/drivers/char/watchdog/sa1100_wdt.c Sun Aug 3 13:14:48 2003
@@ -19,6 +19,7 @@
*/
#include <linux/config.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
@@ -208,9 +209,11 @@
MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
MODULE_DESCRIPTION("SA1100 Watchdog");
-MODULE_PARM(margin,"i");
+
+module_param(margin, int, 0);
MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
-MODULE_PARM(nowayout, "i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
+
MODULE_LICENSE("GPL");
diff -Nru a/drivers/char/watchdog/sbc60xxwdt.c b/drivers/char/watchdog/sbc60xxwdt.c
--- a/drivers/char/watchdog/sbc60xxwdt.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/watchdog/sbc60xxwdt.c Sun Aug 3 13:14:50 2003
@@ -56,6 +56,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/timer.h>
#include <linux/jiffies.h>
@@ -111,7 +112,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
/*
diff -Nru a/drivers/char/watchdog/sc520_wdt.c b/drivers/char/watchdog/sc520_wdt.c
--- a/drivers/char/watchdog/sc520_wdt.c Sun Aug 3 13:14:48 2003
+++ b/drivers/char/watchdog/sc520_wdt.c Sun Aug 3 13:14:48 2003
@@ -49,6 +49,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/timer.h>
#include <linux/miscdevice.h>
@@ -111,7 +112,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
static spinlock_t wdt_spinlock;
diff -Nru a/drivers/char/watchdog/scx200_wdt.c b/drivers/char/watchdog/scx200_wdt.c
--- a/drivers/char/watchdog/scx200_wdt.c Sun Aug 3 13:14:50 2003
+++ b/drivers/char/watchdog/scx200_wdt.c Sun Aug 3 13:14:50 2003
@@ -19,6 +19,7 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
@@ -41,11 +42,11 @@
#endif
static int margin = 60; /* in seconds */
-MODULE_PARM(margin, "i");
+module_param(margin, int, 0);
MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
static int nowayout = CONFIG_WATCHDOG_NOWAYOUT;
-MODULE_PARM(nowayout, "i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
static u16 wdto_restart;
diff -Nru a/drivers/char/watchdog/shwdt.c b/drivers/char/watchdog/shwdt.c
--- a/drivers/char/watchdog/shwdt.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/watchdog/shwdt.c Sun Aug 3 13:14:46 2003
@@ -1,5 +1,5 @@
/*
- * drivers/char/shwdt.c
+ * drivers/char/watchdog/shwdt.c
*
* Watchdog driver for integrated watchdog in the SuperH processors.
*
@@ -19,6 +19,7 @@
*/
#include <linux/config.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
@@ -395,9 +396,11 @@
MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
MODULE_DESCRIPTION("SuperH watchdog driver");
MODULE_LICENSE("GPL");
-MODULE_PARM(clock_division_ratio, "i");
+
+module_param(clock_division_ratio, int, 0);
MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). Defaults to 0x7.");
-MODULE_PARM(nowayout,"i");
+
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
module_init(sh_wdt_init);
diff -Nru a/drivers/char/watchdog/softdog.c b/drivers/char/watchdog/softdog.c
--- a/drivers/char/watchdog/softdog.c Sun Aug 3 13:14:47 2003
+++ b/drivers/char/watchdog/softdog.c Sun Aug 3 13:14:47 2003
@@ -37,6 +37,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/config.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
@@ -56,8 +57,8 @@
static int soft_noboot = 0;
#endif /* ONLY_TESTING */
-MODULE_PARM(soft_margin,"i");
-MODULE_PARM(soft_noboot,"i");
+module_param(soft_margin, int, 0);
+module_param(soft_noboot, int, 0);
MODULE_LICENSE("GPL");
#ifdef CONFIG_WATCHDOG_NOWAYOUT
@@ -66,7 +67,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
/*
diff -Nru a/drivers/char/watchdog/wafer5823wdt.c b/drivers/char/watchdog/wafer5823wdt.c
--- a/drivers/char/watchdog/wafer5823wdt.c Sun Aug 3 13:14:52 2003
+++ b/drivers/char/watchdog/wafer5823wdt.c Sun Aug 3 13:14:52 2003
@@ -27,6 +27,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/fs.h>
@@ -63,7 +64,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
static void wafwdt_ping(void)
diff -Nru a/drivers/char/watchdog/wdt285.c b/drivers/char/watchdog/wdt285.c
--- a/drivers/char/watchdog/wdt285.c Sun Aug 3 13:14:46 2003
+++ b/drivers/char/watchdog/wdt285.c Sun Aug 3 13:14:46 2003
@@ -16,6 +16,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
@@ -222,7 +223,7 @@
MODULE_DESCRIPTION("Footbridge watchdog driver");
MODULE_LICENSE("GPL");
-MODULE_PARM(soft_margin,"i");
+module_param(soft_margin, int, 0);
MODULE_PARM_DESC(soft_margin,"Watchdog timeout in seconds");
module_init(footbridge_watchdog_init);
diff -Nru a/drivers/char/watchdog/wdt977.c b/drivers/char/watchdog/wdt977.c
--- a/drivers/char/watchdog/wdt977.c Sun Aug 3 13:14:51 2003
+++ b/drivers/char/watchdog/wdt977.c Sun Aug 3 13:14:51 2003
@@ -21,6 +21,7 @@
*/
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
@@ -44,9 +45,9 @@
static int testmode;
static int expect_close = 0;
-MODULE_PARM(timeout, "i");
+module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout,"Watchdog timeout in seconds (60..15300), default=60");
-MODULE_PARM(testmode, "i");
+module_param(testmode, int, 0);
MODULE_PARM_DESC(testmode,"Watchdog testmode (1 = no reboot), default=0");
#ifdef CONFIG_WATCHDOG_NOWAYOUT
@@ -55,7 +56,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
diff -Nru a/drivers/char/watchdog/wdt_pci.c b/drivers/char/watchdog/wdt_pci.c
--- a/drivers/char/watchdog/wdt_pci.c Sun Aug 3 13:14:49 2003
+++ b/drivers/char/watchdog/wdt_pci.c Sun Aug 3 13:14:49 2003
@@ -38,6 +38,7 @@
#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
@@ -88,7 +89,7 @@
static int nowayout = 0;
#endif
-MODULE_PARM(nowayout,"i");
+module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
/*
@@ -486,7 +487,7 @@
.fops = &wdtpci_fops,
};
-#ifdef CONFIG_WDT_501
+#ifdef CONFIG_WDT_501_PCI
static struct miscdevice temp_miscdev = {
.minor = TEMP_MINOR,
.name = "temperature",
@@ -550,7 +551,7 @@
printk (KERN_ERR PFX "can't misc_register on minor=%d\n", WATCHDOG_MINOR);
goto out_misc;
}
-#ifdef CONFIG_WDT_501
+#ifdef CONFIG_WDT_501_PCI
ret = misc_register (&temp_miscdev);
if (ret) {
printk (KERN_ERR PFX "can't misc_register (temp) on minor=%d\n", TEMP_MINOR);
@@ -562,7 +563,7 @@
out:
return ret;
-#ifdef CONFIG_WDT_501
+#ifdef CONFIG_WDT_501_PCI
out_rbt:
unregister_reboot_notifier(&wdtpci_notifier);
#endif
@@ -590,7 +591,7 @@
}
-static struct pci_device_id wdtpci_pci_tbl[] __initdata = {
+static struct pci_device_id wdtpci_pci_tbl[] = {
{
.vendor = PCI_VENDOR_ID_ACCESSIO,
.device = PCI_DEVICE_ID_WDG_CSM,
diff -Nru a/drivers/cpufreq/userspace.c b/drivers/cpufreq/userspace.c
--- a/drivers/cpufreq/userspace.c Sun Aug 3 13:14:45 2003
+++ b/drivers/cpufreq/userspace.c Sun Aug 3 13:14:45 2003
@@ -158,7 +158,7 @@
/*********************** cpufreq_sysctl interface ********************/
static int
cpufreq_procctl(ctl_table *ctl, int write, struct file *filp,
- void *buffer, size_t *lenp)
+ void __user *buffer, size_t *lenp)
{
char buf[16], *p;
int cpu = (int) ctl->extra1;
@@ -195,9 +195,9 @@
}
static int
-cpufreq_sysctl(ctl_table *table, int *name, int nlen,
- void *oldval, size_t *oldlenp,
- void *newval, size_t newlen, void **context)
+cpufreq_sysctl(ctl_table *table, int __user *name, int nlen,
+ void __user *oldval, size_t __user *oldlenp,
+ void __user *newval, size_t newlen, void **context)
{
int cpu = (int) table->extra1;
@@ -524,10 +524,10 @@
cpu_min_freq[cpu] = policy->min;
cpu_max_freq[cpu] = policy->max;
if (policy->max < cpu_cur_freq[cpu])
- cpufreq_driver_target(¤t_policy[cpu], policy->max,
+ __cpufreq_driver_target(¤t_policy[cpu], policy->max,
CPUFREQ_RELATION_H);
else if (policy->min > cpu_cur_freq[cpu])
- cpufreq_driver_target(¤t_policy[cpu], policy->min,
+ __cpufreq_driver_target(¤t_policy[cpu], policy->min,
CPUFREQ_RELATION_L);
memcpy (¤t_policy[cpu], policy, sizeof(struct cpufreq_policy));
up(&userspace_sem);
diff -Nru a/drivers/eisa/pci_eisa.c b/drivers/eisa/pci_eisa.c
--- a/drivers/eisa/pci_eisa.c Sun Aug 3 13:14:46 2003
+++ b/drivers/eisa/pci_eisa.c Sun Aug 3 13:14:46 2003
@@ -26,7 +26,7 @@
if ((rc = pci_enable_device (pdev))) {
printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
- pdev->slot_name);
+ pci_name(pdev));
return rc;
}
diff -Nru a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
--- a/drivers/i2c/Kconfig Sun Aug 3 13:14:46 2003
+++ b/drivers/i2c/Kconfig Sun Aug 3 13:14:46 2003
@@ -20,9 +20,7 @@
interfaces", below.
If you want I2C support, you should say Y here and also to the
- specific driver for your bus adapter(s) below. If you say Y to
- "/proc file system" below, you will then get a /proc interface which
- is documented in <file:Documentation/i2c/proc-interface>.
+ specific driver for your bus adapter(s) below.
This I2C support is also available as a module. If you want to
compile it as a module, say M here and read
@@ -79,7 +77,7 @@
config I2C_ELV
tristate "ELV adapter"
- depends on I2C_ALGOBIT
+ depends on I2C_ALGOBIT && ISA
help
This supports parallel-port I2C adapters called ELV. Say Y if you
own such an adapter.
@@ -91,7 +89,7 @@
config I2C_VELLEMAN
tristate "Velleman K9000 adapter"
- depends on I2C_ALGOBIT
+ depends on I2C_ALGOBIT && ISA
help
This supports the Velleman K9000 parallel-port I2C adapter. Say Y
if you own such an adapter.
diff -Nru a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
--- a/drivers/i2c/busses/Kconfig Sun Aug 3 13:14:52 2003
+++ b/drivers/i2c/busses/Kconfig Sun Aug 3 13:14:52 2003
@@ -108,6 +108,23 @@
in the lm_sensors package, which you can download at
http://www.lm-sensors.nu
+config I2C_NFORCE2
+ tristate " Nvidia Nforce2"
+ depends on I2C && PCI && EXPERIMENTAL
+ help
+ If you say yes to this option, support will be included for the Nvidia
+ Nforce2 family of mainboard I2C interfaces.
+
+ This can also be built as a module which can be inserted and removed
+ while the kernel is running. If you want to compile it as a module,
+ say M here and read <file:Documentation/modules.txt>.
+
+ The module will be called i2c-nforce2.
+
+ You will also need the latest user-space utilties: you can find them
+ in the lm_sensors package, which you can download at
+ http://www.lm-sensors.nu
+
config I2C_PIIX4
tristate " Intel PIIX4"
diff -Nru a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
--- a/drivers/i2c/busses/Makefile Sun Aug 3 13:14:45 2003
+++ b/drivers/i2c/busses/Makefile Sun Aug 3 13:14:45 2003
@@ -8,6 +8,7 @@
obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
obj-$(CONFIG_I2C_I801) += i2c-i801.o
obj-$(CONFIG_I2C_ISA) += i2c-isa.o
+obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
diff -Nru a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
--- a/drivers/i2c/busses/i2c-ali1535.c Sun Aug 3 13:14:51 2003
+++ b/drivers/i2c/busses/i2c-ali1535.c Sun Aug 3 13:14:51 2003
@@ -206,12 +206,6 @@
return retval;
}
-static void ali1535_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
static int ali1535_transaction(struct i2c_adapter *adap)
{
int temp;
@@ -283,7 +277,7 @@
/* We will always wait for a fraction of a second! */
timeout = 0;
do {
- ali1535_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
} while (((temp & ALI1535_STS_BUSY) && !(temp & ALI1535_STS_IDLE))
&& (timeout++ < MAX_TIMEOUT));
@@ -357,7 +351,7 @@
for (timeout = 0;
(timeout < MAX_TIMEOUT) && !(temp & ALI1535_STS_IDLE);
timeout++) {
- ali1535_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
}
if (timeout >= MAX_TIMEOUT)
@@ -494,7 +488,7 @@
}
};
-static struct pci_device_id ali1535_ids[] __devinitdata = {
+static struct pci_device_id ali1535_ids[] = {
{
.vendor = PCI_VENDOR_ID_AL,
.device = PCI_DEVICE_ID_AL_M7101,
diff -Nru a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
--- a/drivers/i2c/busses/i2c-ali15x3.c Sun Aug 3 13:14:48 2003
+++ b/drivers/i2c/busses/i2c-ali15x3.c Sun Aug 3 13:14:48 2003
@@ -225,13 +225,6 @@
return -ENODEV;
}
-/* Internally used pause function */
-static void ali15x3_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
/* Another internally used function */
static int ali15x3_transaction(struct i2c_adapter *adap)
{
@@ -304,7 +297,7 @@
/* We will always wait for a fraction of a second! */
timeout = 0;
do {
- ali15x3_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
} while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
&& (timeout++ < MAX_TIMEOUT));
@@ -361,7 +354,7 @@
for (timeout = 0;
(timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
timeout++) {
- ali15x3_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
}
if (timeout >= MAX_TIMEOUT) {
@@ -486,7 +479,7 @@
},
};
-static struct pci_device_id ali15x3_ids[] __devinitdata = {
+static struct pci_device_id ali15x3_ids[] = {
{
.vendor = PCI_VENDOR_ID_AL,
.device = PCI_DEVICE_ID_AL_M7101,
@@ -515,6 +508,7 @@
static void __devexit ali15x3_remove(struct pci_dev *dev)
{
i2c_del_adapter(&ali15x3_adapter);
+ release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
}
static struct pci_driver ali15x3_driver = {
@@ -533,7 +527,6 @@
static void __exit i2c_ali15x3_exit(void)
{
pci_unregister_driver(&ali15x3_driver);
- release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
}
MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
diff -Nru a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c
--- a/drivers/i2c/busses/i2c-amd756.c Sun Aug 3 13:14:51 2003
+++ b/drivers/i2c/busses/i2c-amd756.c Sun Aug 3 13:14:51 2003
@@ -93,14 +93,6 @@
see E0 for the status bits and enabled in E2
*/
-
-/* Internally used pause function */
-static void amd756_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
#define GS_ABRT_STS (1 << 0)
#define GS_COL_STS (1 << 1)
#define GS_PRERR_STS (1 << 2)
@@ -132,7 +124,7 @@
if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
dev_dbg(&adap->dev, ": SMBus busy (%04x). Waiting... \n", temp);
do {
- amd756_do_pause(1);
+ i2c_delay(1);
temp = inw_p(SMB_GLOBAL_STATUS);
} while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
(timeout++ < MAX_TIMEOUT));
@@ -149,7 +141,7 @@
/* We will always wait for a fraction of a second! */
do {
- amd756_do_pause(1);
+ i2c_delay(1);
temp = inw_p(SMB_GLOBAL_STATUS);
} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
@@ -196,7 +188,7 @@
abort:
dev_warn(&adap->dev, ": Sending abort.\n");
outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
- amd756_do_pause(100);
+ i2c_delay(100);
outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
return -1;
}
@@ -322,7 +314,7 @@
enum chiptype { AMD756, AMD766, AMD768, NFORCE };
-static struct pci_device_id amd756_ids[] __devinitdata = {
+static struct pci_device_id amd756_ids[] = {
{PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 },
{PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 },
{PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 },
diff -Nru a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c
--- a/drivers/i2c/busses/i2c-amd8111.c Sun Aug 3 13:14:51 2003
+++ b/drivers/i2c/busses/i2c-amd8111.c Sun Aug 3 13:14:51 2003
@@ -275,8 +275,7 @@
}
if (~temp[0] & AMD_SMB_STS_DONE) {
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(HZ/100);
+ i2c_delay(HZ/100);
amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
}
@@ -331,7 +330,7 @@
};
-static struct pci_device_id amd8111_ids[] __devinitdata = {
+static struct pci_device_id amd8111_ids[] = {
{ 0x1022, 0x746a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0, }
};
diff -Nru a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
--- a/drivers/i2c/busses/i2c-i801.c Sun Aug 3 13:14:48 2003
+++ b/drivers/i2c/busses/i2c-i801.c Sun Aug 3 13:14:48 2003
@@ -103,7 +103,6 @@
"Forcibly enable the I801 at the given address. "
"EXTREMELY DANGEROUS!");
-static void i801_do_pause(unsigned int amount);
static int i801_transaction(void);
static int i801_block_transaction(union i2c_smbus_data *data,
char read_write, int command);
@@ -178,13 +177,6 @@
return error_return;
}
-
-static void i801_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
static int i801_transaction(void)
{
int temp;
@@ -214,7 +206,7 @@
/* We will always wait for a fraction of a second! */
do {
- i801_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
} while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
@@ -342,7 +334,7 @@
timeout = 0;
do {
temp = inb_p(SMBHSTSTS);
- i801_do_pause(1);
+ i2c_delay(1);
}
while ((!(temp & 0x80))
&& (timeout++ < MAX_TIMEOUT));
@@ -402,7 +394,7 @@
timeout = 0;
do {
temp = inb_p(SMBHSTSTS);
- i801_do_pause(1);
+ i2c_delay(1);
} while ((!(temp & 0x02))
&& (timeout++ < MAX_TIMEOUT));
@@ -556,7 +548,7 @@
},
};
-static struct pci_device_id i801_ids[] __devinitdata = {
+static struct pci_device_id i801_ids[] = {
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801AA_3,
diff -Nru a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/drivers/i2c/busses/i2c-nforce2.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,426 @@
+/*
+ SMBus driver for nVidia nForce2 MCP
+
+ Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
+ Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
+ Based on
+ SMBus 2.0 driver for AMD-8111 IO-Hub
+ Copyright (c) 2002 Vojtech Pavlik
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+/*
+ SUPPORTED DEVICES PCI ID
+ nForce2 MCP 0064
+
+ This driver supports the 2 SMBuses that are included in the MCP2 of the
+ nForce2 chipset.
+*/
+
+/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>");
+MODULE_DESCRIPTION("nForce2 SMBus driver");
+
+
+#ifndef PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS
+#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS 0x0064
+#endif
+/* TODO: sync with lm-sensors */
+#ifndef I2C_HW_SMBUS_NFORCE2
+#define I2C_HW_SMBUS_NFORCE2 0x0c
+#endif
+
+
+struct nforce2_smbus {
+ struct pci_dev *dev;
+ struct i2c_adapter adapter;
+ int base;
+ int size;
+};
+
+
+/*
+ * nVidia nForce2 SMBus control register definitions
+ */
+#define NFORCE_PCI_SMB1 0x50
+#define NFORCE_PCI_SMB2 0x54
+
+
+/*
+ * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
+ */
+#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
+#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
+#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
+#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
+#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
+#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */
+#define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */
+#define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */
+
+#define NVIDIA_SMB_STS_DONE 0x80
+#define NVIDIA_SMB_STS_ALRM 0x40
+#define NVIDIA_SMB_STS_RES 0x20
+#define NVIDIA_SMB_STS_STATUS 0x1f
+
+#define NVIDIA_SMB_PRTCL_WRITE 0x00
+#define NVIDIA_SMB_PRTCL_READ 0x01
+#define NVIDIA_SMB_PRTCL_QUICK 0x02
+#define NVIDIA_SMB_PRTCL_BYTE 0x04
+#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
+#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
+#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
+#define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c
+#define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d
+#define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a
+#define NVIDIA_SMB_PRTCL_PEC 0x80
+
+
+/* Other settings */
+#define MAX_TIMEOUT 256
+
+
+
+static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
+ unsigned short flags, char read_write,
+ u8 command, int size, union i2c_smbus_data *data);
+static u32 nforce2_func(struct i2c_adapter *adapter);
+
+
+static struct i2c_algorithm smbus_algorithm = {
+ .name = "Non-I2C SMBus adapter",
+ .id = I2C_ALGO_SMBUS,
+ .smbus_xfer = nforce2_access,
+ .functionality = nforce2_func,
+};
+
+static struct i2c_adapter nforce2_adapter = {
+ .owner = THIS_MODULE,
+ .id = I2C_ALGO_SMBUS | I2C_HW_SMBUS_NFORCE2,
+ .class = I2C_ADAP_CLASS_SMBUS,
+ .algo = &smbus_algorithm,
+ .dev = {
+ .name = "unset",
+ },
+};
+
+
+#if 0
+/* Internally used pause function */
+static void nforce2_do_pause(unsigned int amount)
+{
+ current->state = TASK_INTERRUPTIBLE;
+ schedule_timeout(amount);
+}
+#endif
+
+/* Return -1 on error. See smbus.h for more information */
+static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, unsigned short flags,
+ char read_write, u8 command, int size,
+ union i2c_smbus_data * data)
+{
+ struct nforce2_smbus *smbus = adap->algo_data;
+ unsigned char protocol, pec, temp;
+ unsigned char len = 0; /* to keep the compiler quiet */
+ int timeout = 0;
+ int i;
+
+ protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
+ NVIDIA_SMB_PRTCL_WRITE;
+ pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
+
+ switch (size) {
+
+ case I2C_SMBUS_QUICK:
+ protocol |= NVIDIA_SMB_PRTCL_QUICK;
+ read_write = I2C_SMBUS_WRITE;
+ break;
+
+ case I2C_SMBUS_BYTE:
+ if (read_write == I2C_SMBUS_WRITE)
+ outb_p(data->byte, NVIDIA_SMB_DATA);
+ protocol |= NVIDIA_SMB_PRTCL_BYTE;
+ break;
+
+ case I2C_SMBUS_BYTE_DATA:
+ outb_p(command, NVIDIA_SMB_CMD);
+ if (read_write == I2C_SMBUS_WRITE)
+ outb_p(data->byte, NVIDIA_SMB_DATA);
+ protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
+ break;
+
+ case I2C_SMBUS_WORD_DATA:
+ outb_p(command, NVIDIA_SMB_CMD);
+ if (read_write == I2C_SMBUS_WRITE) {
+ outb_p(data->word, NVIDIA_SMB_DATA);
+ outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
+ }
+ protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
+ break;
+
+ case I2C_SMBUS_BLOCK_DATA:
+ outb_p(command, NVIDIA_SMB_CMD);
+ if (read_write == I2C_SMBUS_WRITE) {
+ len = min_t(u8, data->block[0], 32);
+ outb_p(len, NVIDIA_SMB_BCNT);
+ for (i = 0; i < len; i++)
+ outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
+ }
+ protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
+ break;
+
+ case I2C_SMBUS_I2C_BLOCK_DATA:
+ len = min_t(u8, data->block[0], 32);
+ outb_p(command, NVIDIA_SMB_CMD);
+ outb_p(len, NVIDIA_SMB_BCNT);
+ if (read_write == I2C_SMBUS_WRITE)
+ for (i = 0; i < len; i++)
+ outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
+ protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA;
+ break;
+
+ case I2C_SMBUS_PROC_CALL:
+ dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
+ return -1;
+ /*
+ outb_p(command, NVIDIA_SMB_CMD);
+ outb_p(data->word, NVIDIA_SMB_DATA);
+ outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
+ protocol = NVIDIA_SMB_PRTCL_PROC_CALL | pec;
+ read_write = I2C_SMBUS_READ;
+ break;
+ */
+
+ case I2C_SMBUS_BLOCK_PROC_CALL:
+ dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n");
+ return -1;
+ /*
+ protocol |= pec;
+ len = min_t(u8, data->block[0], 31);
+ outb_p(command, NVIDIA_SMB_CMD);
+ outb_p(len, NVIDIA_SMB_BCNT);
+ for (i = 0; i < len; i++)
+ outb_p(data->block[i + 1], NVIDIA_SMB_DATA + i);
+ protocol = NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL | pec;
+ read_write = I2C_SMBUS_READ;
+ break;
+ */
+
+ case I2C_SMBUS_WORD_DATA_PEC:
+ case I2C_SMBUS_BLOCK_DATA_PEC:
+ case I2C_SMBUS_PROC_CALL_PEC:
+ case I2C_SMBUS_BLOCK_PROC_CALL_PEC:
+ dev_err(&adap->dev, "Unexpected software PEC transaction %d\n.", size);
+ return -1;
+
+ default:
+ dev_err(&adap->dev, "Unsupported transaction %d\n", size);
+ return -1;
+ }
+
+ outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
+ outb_p(protocol, NVIDIA_SMB_PRTCL);
+
+ temp = inb_p(NVIDIA_SMB_STS);
+
+#if 0
+ do {
+ nforce2_do_pause(1);
+ temp = inb_p(NVIDIA_SMB_STS);
+ } while (((temp & NVIDIA_SMB_STS_DONE) == 0) && (timeout++ < MAX_TIMEOUT));
+#endif
+ if (~temp & NVIDIA_SMB_STS_DONE) {
+ udelay(500);
+ temp = inb_p(NVIDIA_SMB_STS);
+ }
+ if (~temp & NVIDIA_SMB_STS_DONE) {
+ current->state = TASK_INTERRUPTIBLE;
+ schedule_timeout(HZ/100);
+ temp = inb_p(NVIDIA_SMB_STS);
+ }
+
+ if ((timeout >= MAX_TIMEOUT) || (~temp & NVIDIA_SMB_STS_DONE)
+ || (temp & NVIDIA_SMB_STS_STATUS))
+ return -1;
+
+ if (read_write == I2C_SMBUS_WRITE)
+ return 0;
+
+ switch (size) {
+
+ case I2C_SMBUS_BYTE:
+ case I2C_SMBUS_BYTE_DATA:
+ data->byte = inb_p(NVIDIA_SMB_DATA);
+ break;
+
+ case I2C_SMBUS_WORD_DATA:
+ /* case I2C_SMBUS_PROC_CALL: not supported */
+ data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
+ break;
+
+ case I2C_SMBUS_BLOCK_DATA:
+ /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */
+ len = inb_p(NVIDIA_SMB_BCNT);
+ len = min_t(u8, len, 32);
+ case I2C_SMBUS_I2C_BLOCK_DATA:
+ for (i = 0; i < len; i++)
+ data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
+ data->block[0] = len;
+ break;
+ }
+
+ return 0;
+}
+
+
+static u32 nforce2_func(struct i2c_adapter *adapter)
+{
+ /* other functionality might be possible, but is not tested */
+ return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* |
+ I2C_FUNC_SMBUS_BLOCK_DATA */;
+}
+
+
+static struct pci_device_id nforce2_ids[] = {
+ { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { 0 }
+};
+
+
+static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg,
+ struct nforce2_smbus *smbus, char *name)
+{
+ u16 iobase;
+ int error;
+
+ if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) {
+ dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name);
+ return -1;
+ }
+ smbus->dev = dev;
+ smbus->base = iobase & 0xfffc;
+ smbus->size = 8;
+
+ if (!request_region(smbus->base, smbus->size, "nForce2 SMBus")) {
+ dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
+ smbus->base, smbus->base+smbus->size-1, name);
+ return -1;
+ }
+/*
+ smbus->adapter.owner = THIS_MODULE;
+ smbus->adapter.id = I2C_ALGO_SMBUS | I2C_HW_SMBUS_NFORCE2;
+ smbus->adapter.algo = &smbus_algorithm;
+ smbus->adapter.algo_data = smbus;
+*/
+ smbus->adapter = nforce2_adapter;
+ smbus->adapter.dev.parent = &dev->dev;
+ snprintf(smbus->adapter.dev.name, DEVICE_NAME_SIZE,
+ "SMBus nForce2 adapter at %04x", smbus->base);
+
+ error = i2c_add_adapter(&smbus->adapter);
+ if (error) {
+ dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
+ release_region(smbus->base, smbus->size);
+ return -1;
+ }
+ dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
+ return 0;
+}
+
+
+static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+ struct nforce2_smbus *smbuses;
+ int res1, res2;
+
+ /* we support 2 SMBus adapters */
+ if (!(smbuses = (void *)kmalloc(2*sizeof(struct nforce2_smbus),
+ GFP_KERNEL)))
+ return -ENOMEM;
+ memset (smbuses, 0, 2*sizeof(struct nforce2_smbus));
+ pci_set_drvdata(dev, smbuses);
+
+ /* SMBus adapter 1 */
+ res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
+ if (res1 < 0) {
+ dev_err(&dev->dev, "Error probing SMB1.\n");
+ smbuses[0].base = 0; /* to have a check value */
+ }
+ res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
+ if (res2 < 0) {
+ dev_err(&dev->dev, "Error probing SMB2.\n");
+ smbuses[1].base = 0; /* to have a check value */
+ }
+ if ((res1 < 0) && (res2 < 0)) {
+ /* we did not find even one of the SMBuses, so we give up */
+ kfree(smbuses);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+
+static void __devexit nforce2_remove(struct pci_dev *dev)
+{
+ struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
+
+ if (smbuses[0].base) {
+ i2c_del_adapter(&smbuses[0].adapter);
+ release_region(smbuses[0].base, smbuses[0].size);
+ }
+ if (smbuses[1].base) {
+ i2c_del_adapter(&smbuses[1].adapter);
+ release_region(smbuses[1].base, smbuses[1].size);
+ }
+ kfree(smbuses);
+}
+
+static struct pci_driver nforce2_driver = {
+ .name = "nForce2 SMBus",
+ .id_table = nforce2_ids,
+ .probe = nforce2_probe,
+ .remove = __devexit_p(nforce2_remove),
+};
+
+static int __init nforce2_init(void)
+{
+ return pci_module_init(&nforce2_driver);
+}
+
+static void __exit nforce2_exit(void)
+{
+ pci_unregister_driver(&nforce2_driver);
+}
+
+module_init(nforce2_init);
+module_exit(nforce2_exit);
+
diff -Nru a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
--- a/drivers/i2c/busses/i2c-piix4.c Sun Aug 3 13:14:47 2003
+++ b/drivers/i2c/busses/i2c-piix4.c Sun Aug 3 13:14:47 2003
@@ -99,7 +99,6 @@
"Forcibly enable the PIIX4 at the given address. "
"EXTREMELY DANGEROUS!");
-static void piix4_do_pause(unsigned int amount);
static int piix4_transaction(void);
@@ -208,13 +207,6 @@
return error_return;
}
-/* Internally used pause function */
-static void piix4_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
/* Another internally used function */
static int piix4_transaction(void)
{
@@ -245,7 +237,7 @@
/* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
do {
- piix4_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
} while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
@@ -402,7 +394,7 @@
},
};
-static struct pci_device_id piix4_ids[] __devinitdata = {
+static struct pci_device_id piix4_ids[] = {
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82371AB_3,
diff -Nru a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c
--- a/drivers/i2c/busses/i2c-sis96x.c Sun Aug 3 13:14:47 2003
+++ b/drivers/i2c/busses/i2c-sis96x.c Sun Aug 3 13:14:47 2003
@@ -99,13 +99,6 @@
outb(data, sis96x_smbus_base + reg) ;
}
-/* Internally used pause function */
-static void sis96x_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
/* Execute a SMBus transaction.
int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
*/
@@ -147,7 +140,7 @@
/* We will always wait for a fraction of a second! */
do {
- sis96x_do_pause(1);
+ i2c_delay(1);
temp = sis96x_read(SMB_STS);
} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
@@ -276,7 +269,7 @@
},
};
-static struct pci_device_id sis96x_ids[] __devinitdata = {
+static struct pci_device_id sis96x_ids[] = {
{
.vendor = PCI_VENDOR_ID_SI,
diff -Nru a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
--- a/drivers/i2c/busses/i2c-viapro.c Sun Aug 3 13:14:50 2003
+++ b/drivers/i2c/busses/i2c-viapro.c Sun Aug 3 13:14:50 2003
@@ -103,13 +103,6 @@
static struct i2c_adapter vt596_adapter;
-/* Internally used pause function */
-static void vt596_do_pause(unsigned int amount)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(amount);
-}
-
/* Another internally used function */
static int vt596_transaction(void)
{
@@ -143,7 +136,7 @@
/* We will always wait for a fraction of a second!
I don't know if VIA needs this, Intel did */
do {
- vt596_do_pause(1);
+ i2c_delay(1);
temp = inb_p(SMBHSTSTS);
} while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
@@ -401,7 +394,7 @@
release_region(vt596_smba, 8);
}
-static struct pci_device_id vt596_ids[] __devinitdata = {
+static struct pci_device_id vt596_ids[] = {
{
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_82C596_3,
diff -Nru a/drivers/i2c/chips/via686a.c b/drivers/i2c/chips/via686a.c
--- a/drivers/i2c/chips/via686a.c Sun Aug 3 13:14:45 2003
+++ b/drivers/i2c/chips/via686a.c Sun Aug 3 13:14:45 2003
@@ -494,27 +494,27 @@
struct i2c_client *client = to_i2c_client(dev);
struct via686a_data *data = i2c_get_clientdata(client);
via686a_update_client(client);
- return sprintf(buf, "%ld\n", TEMP_FROM_REG10(data->temp[nr])*10 );
+ return sprintf(buf, "%ld\n", TEMP_FROM_REG10(data->temp[nr])*100 );
}
/* more like overshoot temperature */
static ssize_t show_temp_max(struct device *dev, char *buf, int nr) {
struct i2c_client *client = to_i2c_client(dev);
struct via686a_data *data = i2c_get_clientdata(client);
via686a_update_client(client);
- return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_over[nr])*10);
+ return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_over[nr])*100);
}
/* more like hysteresis temperature */
static ssize_t show_temp_min(struct device *dev, char *buf, int nr) {
struct i2c_client *client = to_i2c_client(dev);
struct via686a_data *data = i2c_get_clientdata(client);
via686a_update_client(client);
- return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_hyst[nr])*10);
+ return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_hyst[nr])*100);
}
static ssize_t set_temp_max(struct device *dev, const char *buf,
size_t count, int nr) {
struct i2c_client *client = to_i2c_client(dev);
struct via686a_data *data = i2c_get_clientdata(client);
- int val = simple_strtol(buf, NULL, 10)/10;
+ int val = simple_strtol(buf, NULL, 10)/100;
data->temp_over[nr] = TEMP_TO_REG(val);
via686a_write_value(client, VIA686A_REG_TEMP_OVER(nr), data->temp_over[nr]);
return count;
@@ -523,7 +523,7 @@
size_t count, int nr) {
struct i2c_client *client = to_i2c_client(dev);
struct via686a_data *data = i2c_get_clientdata(client);
- int val = simple_strtol(buf, NULL, 10)/10;
+ int val = simple_strtol(buf, NULL, 10)/100;
data->temp_hyst[nr] = TEMP_TO_REG(val);
via686a_write_value(client, VIA686A_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
return count;
@@ -914,7 +914,7 @@
up(&data->update_lock);
}
-static struct pci_device_id via686a_pci_ids[] __devinitdata = {
+static struct pci_device_id via686a_pci_ids[] = {
{
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_82C686_4,
diff -Nru a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
--- a/drivers/i2c/i2c-dev.c Sun Aug 3 13:14:51 2003
+++ b/drivers/i2c/i2c-dev.c Sun Aug 3 13:14:51 2003
@@ -118,7 +118,7 @@
static ssize_t show_dev(struct class_device *class_dev, char *buf)
{
struct i2c_dev *i2c_dev = to_i2c_dev(class_dev);
- return sprintf(buf, "%04x\n", MKDEV(I2C_MAJOR, i2c_dev->minor));
+ return print_dev_t(buf, MKDEV(I2C_MAJOR, i2c_dev->minor));
}
static CLASS_DEVICE_ATTR(dev, S_IRUGO, show_dev, NULL);
diff -Nru a/drivers/i2c/i2c-keywest.c b/drivers/i2c/i2c-keywest.c
--- a/drivers/i2c/i2c-keywest.c Sun Aug 3 13:14:50 2003
+++ b/drivers/i2c/i2c-keywest.c Sun Aug 3 13:14:50 2003
@@ -66,8 +66,6 @@
#include "i2c-keywest.h"
-#undef POLLED_MODE
-
#define DBG(x...) do {\
if (debug > 0) \
printk(KERN_DEBUG "KW:" x); \
@@ -85,27 +83,6 @@
static struct keywest_iface *ifaces = NULL;
-#ifdef POLLED_MODE
-/* This isn't fast, but will go once I implement interrupt with
- * proper timeout
- */
-static u8
-wait_interrupt(struct keywest_iface* iface)
-{
- int i;
- u8 isr;
-
- for (i = 0; i < POLL_TIMEOUT; i++) {
- isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
- if (isr != 0)
- return isr;
- current->state = TASK_UNINTERRUPTIBLE;
- schedule_timeout(1);
- }
- return isr;
-}
-#endif /* POLLED_MODE */
-
static void
do_stop(struct keywest_iface* iface, int result)
@@ -116,16 +93,17 @@
}
/* Main state machine for standard & standard sub mode */
-static void
+static int
handle_interrupt(struct keywest_iface *iface, u8 isr)
{
int ack;
+ int rearm_timer = 1;
DBG("handle_interrupt(), got: %x, status: %x, state: %d\n",
isr, read_reg(reg_status), iface->state);
if (isr == 0 && iface->state != state_stop) {
do_stop(iface, -1);
- return;
+ return rearm_timer;
}
if (isr & KW_I2C_IRQ_STOP && iface->state != state_stop) {
iface->result = -1;
@@ -196,20 +174,19 @@
if (!(isr & KW_I2C_IRQ_STOP) && (++iface->stopretry) < 10)
do_stop(iface, -1);
else {
+ rearm_timer = 0;
iface->state = state_idle;
write_reg(reg_control, 0x00);
write_reg(reg_ier, 0x00);
-#ifndef POLLED_MODE
complete(&iface->complete);
-#endif /* POLLED_MODE */
}
break;
}
write_reg(reg_isr, isr);
-}
-#ifndef POLLED_MODE
+ return rearm_timer;
+}
/* Interrupt handler */
static irqreturn_t
@@ -219,11 +196,8 @@
spin_lock(&iface->lock);
del_timer(&iface->timeout_timer);
- handle_interrupt(iface, read_reg(reg_isr));
- if (iface->state != state_idle) {
- iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
- add_timer(&iface->timeout_timer);
- }
+ if (handle_interrupt(iface, read_reg(reg_isr)))
+ mod_timer(&iface->timeout_timer, jiffies + POLL_TIMEOUT);
spin_unlock(&iface->lock);
return IRQ_HANDLED;
}
@@ -235,16 +209,11 @@
DBG("timeout !\n");
spin_lock_irq(&iface->lock);
- handle_interrupt(iface, read_reg(reg_isr));
- if (iface->state != state_idle) {
- iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
- add_timer(&iface->timeout_timer);
- }
+ if (handle_interrupt(iface, read_reg(reg_isr)))
+ mod_timer(&iface->timeout_timer, jiffies + POLL_TIMEOUT);
spin_unlock(&iface->lock);
}
-#endif /* POLLED_MODE */
-
/*
* SMBUS-type transfer entrypoint
*/
@@ -331,24 +300,13 @@
write_reg(reg_subaddr, command);
/* Arm timeout */
- iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
- add_timer(&iface->timeout_timer);
+ mod_timer(&iface->timeout_timer, jiffies + POLL_TIMEOUT);
/* Start sending address & enable interrupt*/
write_reg(reg_control, read_reg(reg_control) | KW_I2C_CTL_XADDR);
write_reg(reg_ier, KW_I2C_IRQ_MASK);
-#ifdef POLLED_MODE
- DBG("using polled mode...\n");
- /* State machine, to turn into an interrupt handler */
- while(iface->state != state_idle) {
- u8 isr = wait_interrupt(iface);
- handle_interrupt(iface, isr);
- }
-#else /* POLLED_MODE */
- DBG("using interrupt mode...\n");
wait_for_completion(&iface->complete);
-#endif /* POLLED_MODE */
rc = iface->result;
DBG("transfer done, result: %d\n", rc);
@@ -421,24 +379,13 @@
((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
/* Arm timeout */
- iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
- add_timer(&iface->timeout_timer);
+ mod_timer(&iface->timeout_timer, jiffies + POLL_TIMEOUT);
/* Start sending address & enable interrupt*/
write_reg(reg_control, read_reg(reg_control) | KW_I2C_CTL_XADDR);
write_reg(reg_ier, KW_I2C_IRQ_MASK);
-#ifdef POLLED_MODE
- DBG("using polled mode...\n");
- /* State machine, to turn into an interrupt handler */
- while(iface->state != state_idle) {
- u8 isr = wait_interrupt(iface);
- handle_interrupt(iface, isr);
- }
-#else /* POLLED_MODE */
- DBG("using interrupt mode...\n");
wait_for_completion(&iface->complete);
-#endif /* POLLED_MODE */
rc = iface->result;
if (rc == 0)
@@ -540,8 +487,8 @@
*prate);
}
- /* Select standard sub mode */
- iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
+ /* Select standard mode by default */
+ iface->cur_mode |= KW_I2C_MODE_STANDARD;
/* Write mode */
write_reg(reg_mode, iface->cur_mode);
@@ -550,7 +497,6 @@
write_reg(reg_ier, 0x00);
write_reg(reg_isr, KW_I2C_IRQ_MASK);
-#ifndef POLLED_MODE
/* Request chip interrupt */
rc = request_irq(iface->irq, keywest_irq, 0, "keywest i2c", iface);
if (rc) {
@@ -559,7 +505,6 @@
kfree(iface);
return -ENODEV;
}
-#endif /* POLLED_MODE */
for (i=0; i<nchan; i++) {
struct keywest_chan* chan = &iface->channels[i];
@@ -609,19 +554,16 @@
/* Make sure we stop all activity */
down(&iface->sem);
-#ifndef POLLED_MODE
spin_lock_irq(&iface->lock);
while (iface->state != state_idle) {
spin_unlock_irq(&iface->lock);
- schedule();
+ set_task_state(current,TASK_UNINTERRUPTIBLE);
+ schedule_timeout(HZ/10);
spin_lock_irq(&iface->lock);
}
-#endif /* POLLED_MODE */
iface->state = state_dead;
-#ifndef POLLED_MODE
spin_unlock_irq(&iface->lock);
free_irq(iface->irq, iface);
-#endif /* POLLED_MODE */
up(&iface->sem);
/* Release all channels */
diff -Nru a/drivers/i2c/i2c-prosavage.c b/drivers/i2c/i2c-prosavage.c
--- a/drivers/i2c/i2c-prosavage.c Sun Aug 3 13:14:47 2003
+++ b/drivers/i2c/i2c-prosavage.c Sun Aug 3 13:14:47 2003
@@ -321,7 +321,7 @@
/*
* Data for PCI driver interface
*/
-static struct pci_device_id prosavage_pci_tbl[] __devinitdata = {
+static struct pci_device_id prosavage_pci_tbl[] = {
{
.vendor = PCI_VENDOR_ID_S3,
.device = PCI_DEVICE_ID_S3_SAVAGE4,
diff -Nru a/drivers/ide/Kconfig b/drivers/ide/Kconfig
--- a/drivers/ide/Kconfig Sun Aug 3 13:14:48 2003
+++ b/drivers/ide/Kconfig Sun Aug 3 13:14:48 2003
@@ -52,21 +52,19 @@
If unsure, say Y.
+if IDE
+
config IDE_MAX_HWIFS
int "Max IDE interfaces"
- depends on ALPHA && IDE
+ depends on ALPHA
default 4
help
This is the maximum number of IDE hardware interfaces that will
be supported by the driver. Make sure it is at least as high as
the number of IDE interfaces in your system.
-menu "IDE, ATA and ATAPI Block devices"
- depends on IDE!=n
-
config BLK_DEV_IDE
tristate "Enhanced IDE/MFM/RLL disk/cdrom/tape/floppy support"
- depends on IDE
---help---
If you say Y here, you will use the full-featured IDE driver to
control up to ten ATA/IDE interfaces, each being able to serve a
@@ -97,11 +95,13 @@
could say N here, and select the "Old hard disk driver" below
instead to save about 13 KB of memory in the kernel.
+if BLK_DEV_IDE
+
comment "Please see Documentation/ide.txt for help/info on IDE drives"
config BLK_DEV_HD_IDE
bool "Use old disk-only driver on primary interface"
- depends on BLK_DEV_IDE && X86 && X86_PC9800!=y
+ depends on X86 && X86_PC9800!=y
---help---
There are two drivers for MFM/RLL/IDE disks. Most people use just
the new enhanced driver by itself. This option however installs the
@@ -119,7 +119,7 @@
config BLK_DEV_HD_IDE98
bool "Use old disk-only driver on primary interface"
- depends on BLK_DEV_IDE && X86 && X86_PC9800
+ depends on X86 && X86_PC9800
---help---
There are two drivers for MFM/RLL/IDE disks. Most people use just
the new enhanced driver by itself. This option however installs the
@@ -135,14 +135,8 @@
Normally, just say N here; you will then use the new driver for all
4 interfaces.
-config BLK_DEV_HD
- bool
- default BLK_DEV_HD_ONLY if BLK_DEV_IDE=n
- default BLK_DEV_HD_IDE if BLK_DEV_IDE
-
config BLK_DEV_IDEDISK
tristate "Include IDE/ATA-2 DISK support"
- depends on BLK_DEV_IDE
---help---
This will include enhanced support for MFM/RLL/IDE hard disks. If
you have a MFM/RLL/IDE disk, and there is no special reason to use
@@ -183,14 +177,13 @@
config BLK_DEV_IDECS
tristate "PCMCIA IDE support"
- depends on BLK_DEV_IDE && PCMCIA
+ depends on PCMCIA
help
Support for outboard IDE disks, tape drives, and CD-ROM drives
connected through a PCMCIA card.
config BLK_DEV_IDECD
tristate "Include IDE/ATAPI CDROM support"
- depends on BLK_DEV_IDE
---help---
If you have a CD-ROM drive using the ATAPI protocol, say Y. ATAPI is
a newer protocol used by IDE CD-ROM and TAPE drives, similar to the
@@ -216,7 +209,6 @@
#dep_tristate ' Include IDE/ATAPI TAPE support' CONFIG_BLK_DEV_IDETAPE $CONFIG_BLK_DEV_IDE
config BLK_DEV_IDEFLOPPY
tristate "Include IDE/ATAPI FLOPPY support"
- depends on BLK_DEV_IDE
---help---
If you have an IDE floppy drive which uses the ATAPI protocol,
answer Y. ATAPI is a newer protocol used by IDE CD-ROM/tape/floppy
@@ -241,7 +233,7 @@
config BLK_DEV_IDESCSI
tristate "SCSI emulation support"
- depends on BLK_DEV_IDE && SCSI
+ depends on SCSI
---help---
This will provide SCSI host adapter emulation for IDE ATAPI devices,
and will allow you to use a SCSI device driver instead of a native
@@ -267,7 +259,6 @@
config IDE_TASK_IOCTL
bool "IDE Taskfile Access"
- depends on BLK_DEV_IDE
help
This is a direct raw access to the media. It is a complex but
elegant solution to test and validate the domain of the hardware and
@@ -278,7 +269,7 @@
config IDE_TASKFILE_IO
bool 'IDE Taskfile IO (EXPERIMENTAL)'
- depends on BLK_DEV_IDE && EXPERIMENTAL
+ depends on EXPERIMENTAL
default n
---help---
Use new taskfile IO code.
@@ -286,11 +277,10 @@
It is safe to say Y to this question, in most cases.
comment "IDE chipset support/bugfixes"
- depends on BLK_DEV_IDE
config BLK_DEV_CMD640
bool "CMD640 chipset bugfix/support"
- depends on BLK_DEV_IDE && X86
+ depends on X86
---help---
The CMD-Technologies CMD640 IDE chip is used on many common 486 and
Pentium motherboards, usually in combination with a "Neptune" or
@@ -324,7 +314,7 @@
config BLK_DEV_IDEPNP
bool "PNP EIDE support"
- depends on BLK_DEV_IDE && PNP
+ depends on PNP
help
If you have a PnP (Plug and Play) compatible EIDE card and
would like the kernel to automatically detect and activate
@@ -332,17 +322,12 @@
config BLK_DEV_IDEPCI
bool "PCI IDE chipset support" if PCI
- depends on BLK_DEV_IDE
default BLK_DEV_IDEDMA_PMAC if PPC_PMAC && BLK_DEV_IDEDMA_PMAC
help
Say Y here for PCI systems which use IDE drive(s).
This option helps the IDE driver to automatically detect and
configure all PCI-based IDE interfaces in your system.
-config BLK_DEV_GENERIC
- bool "Generic PCI IDE Chipset Support"
- depends on PCI && BLK_DEV_IDEPCI
-
config IDEPCI_SHARE_IRQ
bool "Sharing PCI IDE interrupts support"
depends on PCI && BLK_DEV_IDEPCI
@@ -354,6 +339,60 @@
It is safe to say Y to this question, in most cases.
If unsure, say N.
+config BLK_DEV_OFFBOARD
+ bool "Boot off-board chipsets first support"
+ depends on PCI && BLK_DEV_IDEPCI
+ help
+ Normally, IDE controllers built into the motherboard (on-board
+ controllers) are assigned to ide0 and ide1 while those on add-in PCI
+ cards (off-board controllers) are relegated to ide2 and ide3.
+ Answering Y here will allow you to reverse the situation, with
+ off-board controllers on ide0/1 and on-board controllers on ide2/3.
+ This can improve the usability of some boot managers such as lilo
+ when booting from a drive on an off-board controller.
+
+ If you say Y here, and you actually want to reverse the device scan
+ order as explained above, you also need to issue the kernel command
+ line option "ide=reverse". (Try "man bootparam" or see the
+ documentation of your boot loader (lilo or loadlin) about how to
+ pass options to the kernel at boot time.)
+
+ Note that, if you do this, the order of the hd* devices will be
+ rearranged which may require modification of fstab and other files.
+
+ If in doubt, say N.
+
+config BLK_DEV_GENERIC
+ bool "Generic PCI IDE Chipset Support"
+ depends on PCI && BLK_DEV_IDEPCI
+
+config BLK_DEV_OPTI621
+ tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)"
+ depends on PCI && BLK_DEV_IDEPCI && EXPERIMENTAL
+ help
+ This is a driver for the OPTi 82C621 EIDE controller.
+ Please read the comments at the top of <file:drivers/ide/pci/opti621.c>.
+
+config BLK_DEV_RZ1000
+ tristate "RZ1000 chipset bugfix/support"
+ depends on PCI && BLK_DEV_IDEPCI && X86
+ help
+ The PC-Technologies RZ1000 IDE chip is used on many common 486 and
+ Pentium motherboards, usually along with the "Neptune" chipset.
+ Unfortunately, it has a rather nasty design flaw that can cause
+ severe data corruption under many conditions. Say Y here to include
+ code which automatically detects and corrects the problem under
+ Linux. This may slow disk throughput by a few percent, but at least
+ things will operate 100% reliably.
+
+config BLK_DEV_SL82C105
+ tristate "Winbond SL82c105 support"
+ depends on PCI && (PPC || ARM) && BLK_DEV_IDEPCI
+ help
+ If you have a Winbond SL82c105 IDE controller, say Y here to enable
+ special configuration for this chip. This is common on various CHRP
+ motherboards, but could be used elsewhere. If in doubt, say Y.
+
config BLK_DEV_IDEDMA_PCI
bool "Generic PCI bus-master DMA support"
depends on PCI && BLK_DEV_IDEPCI
@@ -373,9 +412,11 @@
It is safe to say Y to this question.
+if BLK_DEV_IDEDMA_PCI
+
config BLK_DEV_IDE_TCQ
bool "ATA tagged command queueing (EXPERIMENTAL)"
- depends on BLK_DEV_IDEDMA_PCI && EXPERIMENTAL
+ depends on EXPERIMENTAL
help
Support for tagged command queueing on ATA disk drives. This enables
the IDE layer to have multiple in-flight requests on hardware that
@@ -414,32 +455,8 @@
You probably just want the default of 32 here. If you enter an invalid
number, the default value will be used.
-config BLK_DEV_OFFBOARD
- bool "Boot off-board chipsets first support"
- depends on PCI && BLK_DEV_IDEPCI
- ---help---
- Normally, IDE controllers built into the motherboard (on-board
- controllers) are assigned to ide0 and ide1 while those on add-in PCI
- cards (off-board controllers) are relegated to ide2 and ide3.
- Answering Y here will allow you to reverse the situation, with
- off-board controllers on ide0/1 and on-board controllers on ide2/3.
- This can improve the usability of some boot managers such as lilo
- when booting from a drive on an off-board controller.
-
- If you say Y here, and you actually want to reverse the device scan
- order as explained above, you also need to issue the kernel command
- line option "ide=reverse". (Try "man bootparam" or see the
- documentation of your boot loader (lilo or loadlin) about how to
- pass options to the kernel at boot time.)
-
- Note that, if you do this, the order of the hd* devices will be
- rearranged which may require modification of fstab and other files.
-
- If in doubt, say N.
-
config BLK_DEV_IDEDMA_FORCED
bool "Force enable legacy 2.0.X HOSTS to use DMA"
- depends on BLK_DEV_IDEDMA_PCI
help
This is an old piece of lost code from Linux 2.0 Kernels.
@@ -447,7 +464,6 @@
config IDEDMA_PCI_AUTO
bool "Use PCI DMA by default when available"
- depends on BLK_DEV_IDEDMA_PCI
---help---
Prior to kernel version 2.1.112, Linux used to automatically use
DMA for IDE drives and chipsets which support it. Due to concerns
@@ -470,16 +486,9 @@
Generally say N here.
-config BLK_DEV_IDEDMA
- bool
- depends on BLK_DEV_IDE
- default BLK_DEV_IDEDMA_ICS if ARCH_ACORN
- default BLK_DEV_IDEDMA_PMAC if PPC_PMAC && BLK_DEV_IDE_PMAC
- default BLK_DEV_IDEDMA_PCI if PCI && BLK_DEV_IDEPCI
-
config IDEDMA_PCI_WIP
bool "ATA Work(s) In Progress (EXPERIMENTAL)"
- depends on BLK_DEV_IDEDMA_PCI && EXPERIMENTAL
+ depends on EXPERIMENTAL
help
If you enable this you will be able to use and test highly
developmental projects. If you say N, the configurator will
@@ -505,7 +514,6 @@
config BLK_DEV_AEC62XX
tristate "AEC62XX chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds explicit support for Acard AEC62xx (Artop ATP8xx)
IDE controllers. This allows the kernel to change PIO, DMA and UDMA
@@ -513,7 +521,6 @@
config BLK_DEV_ALI15X3
tristate "ALI M15x3 chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C
onboard chipsets. It also tests for Simplex mode and enables
@@ -542,7 +549,6 @@
config BLK_DEV_AMD74XX
tristate "AMD and nVidia IDE support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds explicit support for AMD-7xx and AMD-8111 chips
and also for the nVidia nForce chip. This allows the kernel to
@@ -551,21 +557,18 @@
config BLK_DEV_CMD64X
tristate "CMD64{3|6|8|9} chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
Say Y here if you have an IDE controller which uses any of these
chipsets: CMD643, CMD646, or CMD648.
config BLK_DEV_TRIFLEX
tristate "Compaq Triflex IDE support"
- depends on BLK_DEV_IDEDMA_PCI
help
Say Y here if you have a Compaq Triflex IDE controller, such
as those commonly found on Compaq Pentium-Pro systems
config BLK_DEV_CY82C693
tristate "CY82C693 chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds detection and support for the CY82C693 chipset
used on Digital's PC-Alpha 164SX boards.
@@ -575,7 +578,7 @@
config BLK_DEV_CS5520
tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)"
- depends on BLK_DEV_IDEDMA_PCI && EXPERIMENTAL
+ depends on EXPERIMENTAL
help
Include support for PIO tuning an virtual DMA on the Cyrix MediaGX
5510/5520 chipset. This will automatically be detected and
@@ -585,7 +588,6 @@
config BLK_DEV_CS5530
tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support"
- depends on BLK_DEV_IDEDMA_PCIOA
help
Include support for UDMA on the Cyrix MediaGX 5530 chipset. This
will automatically be detected and configured if found.
@@ -594,7 +596,6 @@
config BLK_DEV_HPT34X
tristate "HPT34X chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds up to 4 more EIDE devices sharing a single
interrupt. The HPT343 chipset in its current form is a non-bootable
@@ -615,7 +616,6 @@
config BLK_DEV_HPT366
tristate "HPT36X/37X chipset support"
- depends on BLK_DEV_IDEDMA_PCI
---help---
HPT366 is an Ultra DMA chipset for ATA-66.
HPT368 is an Ultra DMA chipset for ATA-66 RAID Based.
@@ -640,14 +640,12 @@
config BLK_DEV_SC1200
tristate "National SCx200 chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds support for the built in IDE on the National
SCx200 series of embedded x86 "Geode" systems
config BLK_DEV_PIIX
tristate "Intel PIIXn chipsets support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds explicit support for Intel PIIX and ICH chips
and also for the Efar Victory66 (slc90e66) chip. This allows
@@ -656,7 +654,7 @@
config BLK_DEV_IT8172
bool "IT8172 IDE support"
- depends on (MIPS_ITE8172 || MIPS_IVR) && BLK_DEV_IDEDMA_PCI
+ depends on (MIPS_ITE8172 || MIPS_IVR)
help
Say Y here to support the on-board IDE controller on the Integrated
Technology Express, Inc. ITE8172 SBC. Vendor page at
@@ -665,27 +663,39 @@
config BLK_DEV_NS87415
tristate "NS87415 chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds detection and support for the NS87415 chip
(used in SPARC64, among others).
Please read the comments at the top of <file:drivers/ide/pci/ns87415.c>.
-config BLK_DEV_OPTI621
- tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)"
- depends on PCI && BLK_DEV_IDEPCI && EXPERIMENTAL
- help
- This is a driver for the OPTi 82C621 EIDE controller.
- Please read the comments at the top of <file:drivers/ide/pci/opti621.c>.
-
config BLK_DEV_PDC202XX_OLD
tristate "PROMISE PDC202{46|62|65|67} support"
- depends on BLK_DEV_IDEDMA_PCI
+ help
+ Promise Ultra33 or PDC20246
+ Promise Ultra66 or PDC20262
+ Promise Ultra100 or PDC20265/PDC20267/PDC20268
+
+ This driver adds up to 4 more EIDE devices sharing a single
+ interrupt. This add-on card is a bootable PCI UDMA controller. Since
+ multiple cards can be installed and there are BIOS ROM problems that
+ happen if the BIOS revisions of all installed cards (three-max) do
+ not match, the driver attempts to do dynamic tuning of the chipset
+ at boot-time for max-speed. Ultra33 BIOS 1.25 or newer is required
+ for more than one card. This card may require that you say Y to
+ "Special UDMA Feature".
+
+ If you say Y here, you need to say Y to "Use DMA by default when
+ available" as well.
+
+ Please read the comments at the top of
+ <file:drivers/ide/pci/pdc202xx_old.c>.
+
+ If unsure, say N.
config PDC202XX_BURST
bool "Special UDMA Feature"
- depends on BLK_DEV_PDC202XX_OLD=y && CONFI_BLK_DEV_IDEDMA_PCI
+ depends on BLK_DEV_PDC202XX_OLD=y
---help---
This option causes the pdc202xx driver to enable UDMA modes on the
PDC202xx even when the PDC202xx BIOS has not done so.
@@ -702,7 +712,6 @@
config BLK_DEV_PDC202XX_NEW
tristate "PROMISE PDC202{68|69|70|71|75|76|77} support"
- depends on BLK_DEV_IDEDMA_PCI
# FIXME - probably wants to be one for old and for new
config PDC202XX_FORCE
@@ -711,35 +720,21 @@
help
For FastTrak enable overriding BIOS.
-config BLK_DEV_RZ1000
- tristate "RZ1000 chipset bugfix/support"
- depends on PCI && BLK_DEV_IDEPCI && X86
- help
- The PC-Technologies RZ1000 IDE chip is used on many common 486 and
- Pentium motherboards, usually along with the "Neptune" chipset.
- Unfortunately, it has a rather nasty design flaw that can cause
- severe data corruption under many conditions. Say Y here to include
- code which automatically detects and corrects the problem under
- Linux. This may slow disk throughput by a few percent, but at least
- things will operate 100% reliably.
-
config BLK_DEV_SVWKS
tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5
chipsets.
config BLK_DEV_SIIMAGE
tristate "Silicon Image chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds PIO/(U)DMA support for the SI CMD680 and SII
3112 (Serial ATA) chips.
config BLK_DEV_SIS5513
tristate "SiS5513 chipset support"
- depends on BLK_DEV_IDEDMA_PCI && X86
+ depends on X86
---help---
This driver ensures (U)DMA support for SIS5513 chipset family based
mainboards.
@@ -758,7 +753,6 @@
config BLK_DEV_SLC90E66
tristate "SLC90E66 chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver ensures (U)DMA support for Victroy66 SouthBridges for
SMsC with Intel NorthBridges. This is an Ultra66 based chipset.
@@ -774,7 +768,6 @@
config BLK_DEV_TRM290
tristate "Tekram TRM290 chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds support for bus master DMA transfers
using the Tekram TRM290 PCI IDE chip. Volunteers are
@@ -783,23 +776,16 @@
config BLK_DEV_VIA82CXXX
tristate "VIA82CXXX chipset support"
- depends on BLK_DEV_IDEDMA_PCI
help
This driver adds explicit support for VIA BusMastering IDE chips.
This allows the kernel to change PIO, DMA and UDMA speeds and to
configure the chip to optimum performance.
-config BLK_DEV_SL82C105
- tristate "Winbond SL82c105 support"
- depends on PCI && (PPC || ARM) && BLK_DEV_IDEPCI
- help
- If you have a Winbond SL82c105 IDE controller, say Y here to enable
- special configuration for this chip. This is common on various CHRP
- motherboards, but could be used elsewhere. If in doubt, say Y.
+endif
config BLK_DEV_IDE_PMAC
bool "Builtin PowerMac IDE support"
- depends on BLK_DEV_IDE && PPC_PMAC
+ depends on PPC_PMAC
help
This driver provides support for the built-in IDE controller on
most of the recent Apple Power Macintoshes and PowerBooks.
@@ -827,11 +813,11 @@
config BLK_DEV_IDE_SWARM
bool "SWARM onboard IDE support"
- depends on BLK_DEV_IDE && SIBYTE_SWARM
+ depends on SIBYTE_SWARM
config BLK_DEV_IDE_ICSIDE
tristate "ICS IDE interface support"
- depends on BLK_DEV_IDE!=n && ARM && ARCH_ACORN
+ depends on ARM && ARCH_ACORN
help
On Acorn systems, say Y here if you wish to use the ICS IDE
interface card. This is not required for ICS partition support.
@@ -859,14 +845,14 @@
config BLK_DEV_IDE_RAPIDE
tristate "RapIDE interface support"
- depends on BLK_DEV_IDE!=n && ARM && ARCH_ACORN
+ depends on ARM && ARCH_ACORN
help
Say Y here if you want to support the Yellowstone RapIDE controller
manufactured for use with Acorn computers.
config BLK_DEV_GAYLE
bool "Amiga Gayle IDE interface support"
- depends on BLK_DEV_IDE && AMIGA
+ depends on AMIGA
help
This is the IDE driver for the builtin IDE interface on some Amiga
models. It supports both the `A1200 style' (used in A600 and A1200)
@@ -893,7 +879,7 @@
config BLK_DEV_BUDDHA
bool "Buddha/Catweasel/X-Surf IDE interface support (EXPERIMENTAL)"
- depends on BLK_DEV_IDE && ZORRO && EXPERIMENTAL
+ depends on ZORRO && EXPERIMENTAL
help
This is the IDE driver for the IDE interfaces on the Buddha,
Catweasel and X-Surf expansion boards. It supports up to two interfaces
@@ -905,7 +891,7 @@
config BLK_DEV_FALCON_IDE
bool "Falcon IDE interface support"
- depends on BLK_DEV_IDE && ATARI
+ depends on ATARI
help
This is the IDE driver for the builtin IDE interface on the Atari
Falcon. Say Y if you have a Falcon and want to use IDE devices (hard
@@ -914,7 +900,7 @@
config BLK_DEV_MAC_IDE
bool "Macintosh Quadra/Powerbook IDE interface support"
- depends on BLK_DEV_IDE && MAC
+ depends on MAC
help
This is the IDE driver for the builtin IDE interface on some m68k
Macintosh models. It supports both the `Quadra style' (used in
@@ -927,7 +913,7 @@
config BLK_DEV_Q40IDE
bool "Q40/Q60 IDE interface support"
- depends on BLK_DEV_IDE && Q40
+ depends on Q40
help
Enable the on-board IDE controller in the Q40/Q60. This should
normally be on; disable it only if you are running a custom hard
@@ -935,7 +921,7 @@
config BLK_DEV_MPC8xx_IDE
bool "MPC8xx IDE support"
- depends on BLK_DEV_IDE && 8xx
+ depends on 8xx
help
This option provides support for IDE on Motorola MPC8xx Systems.
Please see 'Type of MPC8xx IDE interface' for details.
@@ -975,7 +961,7 @@
# no isa -> no vlb
config IDE_CHIPSETS
bool "Other IDE chipset support"
- depends on BLK_DEV_IDE && ISA
+ depends on ISA
---help---
Say Y here if you want to include enhanced support for various IDE
interface chipsets used on motherboards and add-on cards. You can
@@ -989,12 +975,12 @@
People with SCSI-only systems can say N here.
+if IDE_CHIPSETS
+
comment "Note: most of these also require special kernel boot parameters"
- depends on BLK_DEV_IDE && IDE_CHIPSETS
config BLK_DEV_4DRIVES
bool "Generic 4 drives/port support"
- depends on IDE_CHIPSETS
help
Certain older chipsets, including the Tekram 690CD, use a single set
of I/O ports at 0x1f0 to control up to four drives, instead of the
@@ -1004,7 +990,6 @@
config BLK_DEV_ALI14XX
tristate "ALI M14xx support"
- depends on IDE_CHIPSETS && BLK_DEV_IDE
help
This driver is enabled at runtime using the "ide0=ali14xx" kernel
boot parameter. It enables support for the secondary IDE interface
@@ -1015,7 +1000,6 @@
config BLK_DEV_DTC2278
tristate "DTC-2278 support"
- depends on IDE_CHIPSETS && BLK_DEV_IDE
help
This driver is enabled at runtime using the "ide0=dtc2278" kernel
boot parameter. It enables support for the secondary IDE interface
@@ -1025,7 +1009,6 @@
config BLK_DEV_HT6560B
tristate "Holtek HT6560B support"
- depends on IDE_CHIPSETS && BLK_DEV_IDE
help
This driver is enabled at runtime using the "ide0=ht6560b" kernel
boot parameter. It enables support for the secondary IDE interface
@@ -1035,7 +1018,7 @@
config BLK_DEV_PDC4030
tristate "PROMISE DC4030 support (EXPERIMENTAL)"
- depends on IDE_CHIPSETS && BLK_DEV_IDEDISK && EXPERIMENTAL
+ depends on BLK_DEV_IDEDISK && EXPERIMENTAL
help
This driver provides support for the secondary IDE interface and
cache of the original Promise IDE chipsets, e.g. DC4030 and DC5030.
@@ -1048,7 +1031,6 @@
config BLK_DEV_QD65XX
tristate "QDI QD65xx support"
- depends on IDE_CHIPSETS && BLK_DEV_IDE
help
This driver is enabled at runtime using the "ide0=qd65xx" kernel
boot parameter. It permits faster I/O speeds to be set. See the
@@ -1057,7 +1039,6 @@
config BLK_DEV_UMC8672
tristate "UMC-8672 support"
- depends on IDE_CHIPSETS && BLK_DEV_IDE
help
This driver is enabled at runtime using the "ide0=umc8672" kernel
boot parameter. It enables support for the secondary IDE interface
@@ -1065,29 +1046,10 @@
See the files <file:Documentation/ide.txt> and
<file:drivers/ide/legacy/umc8672.c> for more info.
-config BLK_DEV_HD_ONLY
- bool "Old hard disk (MFM/RLL/IDE) driver"
- depends on BLK_DEV_IDE=n
- ---help---
- There are two drivers for MFM/RLL/IDE hard disks. Most people use
- the newer enhanced driver, but this old one is still around for two
- reasons. Some older systems have strange timing problems and seem to
- work only with the old driver (which itself does not work with some
- newer systems). The other reason is that the old driver is smaller,
- since it lacks the enhanced functionality of the new one. This makes
- it a good choice for systems with very tight memory restrictions, or
- for systems with only older MFM/RLL/ESDI drives. Choosing the old
- driver can save 13 KB or so of kernel memory.
-
- If you are unsure, then just choose the Enhanced IDE/MFM/RLL driver
- instead of this one. For more detailed information, read the
- Disk-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>.
+endif
-config IDEDMA_AUTO
- bool
- depends on IDEDMA_PCI_AUTO || BLK_DEV_IDEDMA_PMAC_AUTO || IDEDMA_ICS_AUTO
- default y
+config BLK_DEV_IDEDMA
+ def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS
config IDEDMA_IVB
bool "IGNORE word93 Validation BITS"
@@ -1105,42 +1067,36 @@
It is normally safe to answer Y; however, the default is N.
-config DMA_NONPCI
- bool
- depends on BLK_DEV_TIVO
- default y
-
-config BLK_DEV_PDC202XX
- bool
- depends on BLK_DEV_IDEDMA_PCI && (BLK_DEV_PDC202XX_OLD || BLK_DEV_PDC202XX_NEW)
- default y
- ---help---
- Promise Ultra33 or PDC20246
- Promise Ultra66 or PDC20262
- Promise Ultra100 or PDC20265/PDC20267/PDC20268
+config IDEDMA_AUTO
+ def_bool IDEDMA_PCI_AUTO || BLK_DEV_IDEDMA_PMAC_AUTO || IDEDMA_ICS_AUTO
- This driver adds up to 4 more EIDE devices sharing a single
- interrupt. This add-on card is a bootable PCI UDMA controller. Since
- multiple cards can be installed and there are BIOS ROM problems that
- happen if the BIOS revisions of all installed cards (three-max) do
- not match, the driver attempts to do dynamic tuning of the chipset
- at boot-time for max-speed. Ultra33 BIOS 1.25 or newer is required
- for more than one card. This card may require that you say Y to
- "Special UDMA Feature".
+config DMA_NONPCI
+ def_bool BLK_DEV_TIVO
- If you say Y here, you need to say Y to "Use DMA by default when
- available" as well.
+endif
- Please read the comments at the top of
- <file:drivers/ide/pdc202xx_old.c>.
+config BLK_DEV_HD_ONLY
+ bool "Old hard disk (MFM/RLL/IDE) driver"
+ depends on BLK_DEV_IDE=n
+ help
+ There are two drivers for MFM/RLL/IDE hard disks. Most people use
+ the newer enhanced driver, but this old one is still around for two
+ reasons. Some older systems have strange timing problems and seem to
+ work only with the old driver (which itself does not work with some
+ newer systems). The other reason is that the old driver is smaller,
+ since it lacks the enhanced functionality of the new one. This makes
+ it a good choice for systems with very tight memory restrictions, or
+ for systems with only older MFM/RLL/ESDI drives. Choosing the old
+ driver can save 13 KB or so of kernel memory.
- If unsure, say N.
+ If you are unsure, then just choose the Enhanced IDE/MFM/RLL driver
+ instead of this one. For more detailed information, read the
+ Disk-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
-config BLK_DEV_IDE_MODES
- bool
- depends on BLK_DEV_4DRIVES || BLK_DEV_ALI14XX || BLK_DEV_DTC2278 || BLK_DEV_HT6560B || BLK_DEV_PDC4030 || BLK_DEV_QD65XX || BLK_DEV_UMC8672 || BLK_DEV_AEC62XX=y || BLK_DEV_ALI15X3=y || BLK_DEV_AMD74XX=y || BLK_DEV_CMD640 || BLK_DEV_CMD64X=y || BLK_DEV_CS5530=y || BLK_DEV_CY82C693=y || BLK_DEV_HPT34X=y || BLK_DEV_HPT366=y || BLK_DEV_IDE_PMAC || BLK_DEV_IT8172 || BLK_DEV_MPC8xx_IDE || BLK_DEV_NFORCE=y || BLK_DEV_OPTI621=y || BLK_DEV_PDC202XX || BLK_DEV_PIIX=y || BLK_DEV_SVWKS=y || BLK_DEV_SIIMAGE=y || BLK_DEV_SIS5513=y || BLK_DEV_SL82C105=y || BLK_DEV_SLC90E66=y || BLK_DEV_VIA82CXXX=y
- default y
+config BLK_DEV_HD
+ def_bool BLK_DEV_HD_IDE || BLK_DEV_HD_ONLY
-endmenu
+endif
endmenu
diff -Nru a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
--- a/drivers/ide/pci/aec62xx.c Sun Aug 3 13:14:51 2003
+++ b/drivers/ide/pci/aec62xx.c Sun Aug 3 13:14:51 2003
@@ -533,7 +533,7 @@
return 0;
}
-static struct pci_device_id aec62xx_pci_tbl[] __devinitdata = {
+static struct pci_device_id aec62xx_pci_tbl[] = {
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
diff -Nru a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
--- a/drivers/ide/pci/alim15x3.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/alim15x3.c Sun Aug 3 13:14:47 2003
@@ -872,7 +872,7 @@
}
-static struct pci_device_id alim15x3_pci_tbl[] __devinitdata = {
+static struct pci_device_id alim15x3_pci_tbl[] = {
{ PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0, },
};
diff -Nru a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
--- a/drivers/ide/pci/amd74xx.c Sun Aug 3 13:14:53 2003
+++ b/drivers/ide/pci/amd74xx.c Sun Aug 3 13:14:53 2003
@@ -365,7 +365,7 @@
pci_read_config_byte(dev, PCI_REVISION_ID, &t);
printk(KERN_INFO "AMD_IDE: %s (rev %02x) %s controller on pci%s\n",
- dev->dev.name, t, amd_dma[amd_config->flags & AMD_UDMA], dev->slot_name);
+ dev->dev.name, t, amd_dma[amd_config->flags & AMD_UDMA], pci_name(dev));
/*
* Register /proc/ide/amd74xx entry
@@ -440,7 +440,7 @@
return 0;
}
-static struct pci_device_id amd74xx_pci_tbl[] __devinitdata = {
+static struct pci_device_id amd74xx_pci_tbl[] = {
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_COBRA_7401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
--- a/drivers/ide/pci/cmd64x.c Sun Aug 3 13:14:52 2003
+++ b/drivers/ide/pci/cmd64x.c Sun Aug 3 13:14:52 2003
@@ -763,7 +763,7 @@
return 0;
}
-static struct pci_device_id cmd64x_pci_tbl[] __devinitdata = {
+static struct pci_device_id cmd64x_pci_tbl[] = {
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_643, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
--- a/drivers/ide/pci/cs5520.c Sun Aug 3 13:14:45 2003
+++ b/drivers/ide/pci/cs5520.c Sun Aug 3 13:14:45 2003
@@ -296,7 +296,7 @@
return 0;
}
-static struct pci_device_id cs5520_pci_tbl[] __devinitdata = {
+static struct pci_device_id cs5520_pci_tbl[] = {
{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ 0, },
diff -Nru a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
--- a/drivers/ide/pci/cs5530.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/cs5530.c Sun Aug 3 13:14:47 2003
@@ -431,7 +431,7 @@
return 0;
}
-static struct pci_device_id cs5530_pci_tbl[] __devinitdata = {
+static struct pci_device_id cs5530_pci_tbl[] = {
{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
--- a/drivers/ide/pci/cy82c693.c Sun Aug 3 13:14:46 2003
+++ b/drivers/ide/pci/cy82c693.c Sun Aug 3 13:14:46 2003
@@ -439,7 +439,7 @@
return 0;
}
-static struct pci_device_id cy82c693_pci_tbl[] __devinitdata = {
+static struct pci_device_id cy82c693_pci_tbl[] = {
{ PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c
--- a/drivers/ide/pci/generic.c Sun Aug 3 13:14:48 2003
+++ b/drivers/ide/pci/generic.c Sun Aug 3 13:14:48 2003
@@ -130,7 +130,7 @@
return 0;
}
-static struct pci_device_id generic_pci_tbl[] __devinitdata = {
+static struct pci_device_id generic_pci_tbl[] = {
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
--- a/drivers/ide/pci/hpt34x.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/hpt34x.c Sun Aug 3 13:14:47 2003
@@ -339,7 +339,7 @@
return 0;
}
-static struct pci_device_id hpt34x_pci_tbl[] __devinitdata = {
+static struct pci_device_id hpt34x_pci_tbl[] = {
{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT343, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
--- a/drivers/ide/pci/hpt366.c Sun Aug 3 13:14:49 2003
+++ b/drivers/ide/pci/hpt366.c Sun Aug 3 13:14:49 2003
@@ -1190,7 +1190,7 @@
return 0;
}
-static struct pci_device_id hpt366_pci_tbl[] __devinitdata = {
+static struct pci_device_id hpt366_pci_tbl[] = {
{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT366, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/it8172.c b/drivers/ide/pci/it8172.c
--- a/drivers/ide/pci/it8172.c Sun Aug 3 13:14:51 2003
+++ b/drivers/ide/pci/it8172.c Sun Aug 3 13:14:51 2003
@@ -303,7 +303,7 @@
return 0;
}
-static struct pci_device_id it8172_pci_tbl[] __devinitdata = {
+static struct pci_device_id it8172_pci_tbl[] = {
{ PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_IT8172G, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
--- a/drivers/ide/pci/ns87415.c Sun Aug 3 13:14:48 2003
+++ b/drivers/ide/pci/ns87415.c Sun Aug 3 13:14:48 2003
@@ -236,7 +236,7 @@
return 0;
}
-static struct pci_device_id ns87415_pci_tbl[] __devinitdata = {
+static struct pci_device_id ns87415_pci_tbl[] = {
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
--- a/drivers/ide/pci/opti621.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/opti621.c Sun Aug 3 13:14:47 2003
@@ -371,7 +371,7 @@
return 0;
}
-static struct pci_device_id opti621_pci_tbl[] __devinitdata = {
+static struct pci_device_id opti621_pci_tbl[] = {
{ PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ 0, },
diff -Nru a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
--- a/drivers/ide/pci/pdc202xx_new.c Sun Aug 3 13:14:50 2003
+++ b/drivers/ide/pci/pdc202xx_new.c Sun Aug 3 13:14:50 2003
@@ -636,7 +636,7 @@
return 0;
}
-static struct pci_device_id pdc202new_pci_tbl[] __devinitdata = {
+static struct pci_device_id pdc202new_pci_tbl[] = {
{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
--- a/drivers/ide/pci/pdc202xx_old.c Sun Aug 3 13:14:53 2003
+++ b/drivers/ide/pci/pdc202xx_old.c Sun Aug 3 13:14:53 2003
@@ -928,7 +928,7 @@
return 0;
}
-static struct pci_device_id pdc202xx_pci_tbl[] __devinitdata = {
+static struct pci_device_id pdc202xx_pci_tbl[] = {
{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20246, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20262, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/pdcadma.c b/drivers/ide/pci/pdcadma.c
--- a/drivers/ide/pci/pdcadma.c Sun Aug 3 13:14:51 2003
+++ b/drivers/ide/pci/pdcadma.c Sun Aug 3 13:14:51 2003
@@ -134,7 +134,7 @@
return 1;
}
-static struct pci_device_id pdcadma_pci_tbl[] __devinitdata = {
+static struct pci_device_id pdcadma_pci_tbl[] = {
{ PCI_VENDOR_ID_PDC, PCI_DEVICE_ID_PDC_1841, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
--- a/drivers/ide/pci/piix.c Sun Aug 3 13:14:45 2003
+++ b/drivers/ide/pci/piix.c Sun Aug 3 13:14:45 2003
@@ -792,7 +792,7 @@
printk(KERN_WARNING "piix: A BIOS update may resolve this.\n");
}
-static struct pci_device_id piix_pci_tbl[] __devinitdata = {
+static struct pci_device_id piix_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371MX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c
--- a/drivers/ide/pci/rz1000.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/rz1000.c Sun Aug 3 13:14:47 2003
@@ -66,7 +66,7 @@
return 0;
}
-static struct pci_device_id rz1000_pci_tbl[] __devinitdata = {
+static struct pci_device_id rz1000_pci_tbl[] = {
{ PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_RZ1000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_RZ1001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ 0, },
diff -Nru a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
--- a/drivers/ide/pci/sc1200.c Sun Aug 3 13:14:49 2003
+++ b/drivers/ide/pci/sc1200.c Sun Aug 3 13:14:49 2003
@@ -564,7 +564,7 @@
return 0;
}
-static struct pci_device_id sc1200_pci_tbl[] __devinitdata = {
+static struct pci_device_id sc1200_pci_tbl[] = {
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
--- a/drivers/ide/pci/serverworks.c Sun Aug 3 13:14:45 2003
+++ b/drivers/ide/pci/serverworks.c Sun Aug 3 13:14:45 2003
@@ -799,7 +799,7 @@
return 0;
}
-static struct pci_device_id svwks_pci_tbl[] __devinitdata = {
+static struct pci_device_id svwks_pci_tbl[] = {
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
--- a/drivers/ide/pci/siimage.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/siimage.c Sun Aug 3 13:14:47 2003
@@ -826,7 +826,7 @@
return 0;
}
-static struct pci_device_id siimage_pci_tbl[] __devinitdata = {
+static struct pci_device_id siimage_pci_tbl[] = {
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ 0, },
diff -Nru a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
--- a/drivers/ide/pci/sis5513.c Sun Aug 3 13:14:48 2003
+++ b/drivers/ide/pci/sis5513.c Sun Aug 3 13:14:48 2003
@@ -961,7 +961,7 @@
return 0;
}
-static struct pci_device_id sis5513_pci_tbl[] __devinitdata = {
+static struct pci_device_id sis5513_pci_tbl[] = {
{ PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
--- a/drivers/ide/pci/sl82c105.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/pci/sl82c105.c Sun Aug 3 13:14:47 2003
@@ -511,7 +511,7 @@
return 0;
}
-static struct pci_device_id sl82c105_pci_tbl[] __devinitdata = {
+static struct pci_device_id sl82c105_pci_tbl[] = {
{ PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
--- a/drivers/ide/pci/slc90e66.c Sun Aug 3 13:14:51 2003
+++ b/drivers/ide/pci/slc90e66.c Sun Aug 3 13:14:51 2003
@@ -381,7 +381,7 @@
return 0;
}
-static struct pci_device_id slc90e66_pci_tbl[] __devinitdata = {
+static struct pci_device_id slc90e66_pci_tbl[] = {
{ PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/triflex.h b/drivers/ide/pci/triflex.h
--- a/drivers/ide/pci/triflex.h Sun Aug 3 13:14:50 2003
+++ b/drivers/ide/pci/triflex.h Sun Aug 3 13:14:50 2003
@@ -41,7 +41,7 @@
};
#endif
-static struct pci_device_id triflex_pci_tbl[] __devinitdata = {
+static struct pci_device_id triflex_pci_tbl[] = {
{ PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE, PCI_ANY_ID,
PCI_ANY_ID, 0, 0, 0 },
{ 0, },
diff -Nru a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
--- a/drivers/ide/pci/trm290.c Sun Aug 3 13:14:46 2003
+++ b/drivers/ide/pci/trm290.c Sun Aug 3 13:14:46 2003
@@ -407,7 +407,7 @@
return 0;
}
-static struct pci_device_id trm290_pci_tbl[] __devinitdata = {
+static struct pci_device_id trm290_pci_tbl[] = {
{ PCI_VENDOR_ID_TEKRAM, PCI_DEVICE_ID_TEKRAM_DC290, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ 0, },
};
diff -Nru a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
--- a/drivers/ide/pci/via82cxxx.c Sun Aug 3 13:14:44 2003
+++ b/drivers/ide/pci/via82cxxx.c Sun Aug 3 13:14:44 2003
@@ -561,7 +561,7 @@
"controller on pci%s\n",
via_config->name, t,
via_dma[via_config->flags & VIA_UDMA],
- dev->slot_name);
+ pci_name(dev));
/*
* Setup /proc/ide/via entry.
@@ -638,7 +638,7 @@
return 0;
}
-static struct pci_device_id via_pci_tbl[] __devinitdata = {
+static struct pci_device_id via_pci_tbl[] = {
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ 0, },
diff -Nru a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c
--- a/drivers/ide/setup-pci.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ide/setup-pci.c Sun Aug 3 13:14:47 2003
@@ -285,10 +285,10 @@
if ((d->vendor != dev->vendor) && (d->device != dev->device)) {
printk(KERN_INFO "%s: unknown IDE controller at PCI slot "
"%s, VID=%04x, DID=%04x\n",
- d->name, dev->slot_name, dev->vendor, dev->device);
+ d->name, pci_name(dev), dev->vendor, dev->device);
} else {
printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
- d->name, dev->slot_name);
+ d->name, pci_name(dev));
}
}
diff -Nru a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c
--- a/drivers/ieee1394/ohci1394.c Sun Aug 3 13:14:51 2003
+++ b/drivers/ieee1394/ohci1394.c Sun Aug 3 13:14:51 2003
@@ -3571,7 +3571,7 @@
#define PCI_CLASS_FIREWIRE_OHCI ((PCI_CLASS_SERIAL_FIREWIRE << 8) | 0x10)
-static struct pci_device_id ohci1394_pci_tbl[] __devinitdata = {
+static struct pci_device_id ohci1394_pci_tbl[] = {
{
.class = PCI_CLASS_FIREWIRE_OHCI,
.class_mask = PCI_ANY_ID,
diff -Nru a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c
--- a/drivers/ieee1394/pcilynx.c Sun Aug 3 13:14:47 2003
+++ b/drivers/ieee1394/pcilynx.c Sun Aug 3 13:14:47 2003
@@ -1897,7 +1897,7 @@
return sizeof(lynx_csr_rom);
}
-static struct pci_device_id pci_table[] __devinitdata = {
+static struct pci_device_id pci_table[] = {
{
.vendor = PCI_VENDOR_ID_TI,
.device = PCI_DEVICE_ID_TI_PCILYNX,
diff -Nru a/drivers/input/Kconfig b/drivers/input/Kconfig
--- a/drivers/input/Kconfig Sun Aug 3 13:14:45 2003
+++ b/drivers/input/Kconfig Sun Aug 3 13:14:45 2003
@@ -5,7 +5,7 @@
menu "Input device support"
config INPUT
- tristate "Input devices (needed for keyboard, mouse, ...)"
+ tristate "Input devices (needed for keyboard, mouse, ...)" if EMBEDDED
default y
---help---
Say Y here if you have any input device (mouse, keyboard, tablet,
@@ -27,7 +27,7 @@
comment "Userland interfaces"
config INPUT_MOUSEDEV
- tristate "Mouse interface"
+ tristate "Mouse interface" if EMBEDDED
default y
depends on INPUT
---help---
@@ -45,7 +45,7 @@
a module, say M here and read <file:Documentation/modules.txt>.
config INPUT_MOUSEDEV_PSAUX
- bool "Provide legacy /dev/psaux device"
+ bool "Provide legacy /dev/psaux device" if EMBEDDED
default y
depends on INPUT_MOUSEDEV
diff -Nru a/drivers/input/gameport/cs461x.c b/drivers/input/gameport/cs461x.c
--- a/drivers/input/gameport/cs461x.c Sun Aug 3 13:14:44 2003
+++ b/drivers/input/gameport/cs461x.c Sun Aug 3 13:14:44 2003
@@ -216,7 +216,7 @@
return 0;
}
-static struct pci_device_id cs461x_pci_tbl[] __devinitdata = {
+static struct pci_device_id cs461x_pci_tbl[] = {
{ PCI_VENDOR_ID_CIRRUS, 0x6001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Cirrus CS4610 */
{ PCI_VENDOR_ID_CIRRUS, 0x6003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Cirrus CS4612 */
{ PCI_VENDOR_ID_CIRRUS, 0x6005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Cirrus CS4615 */
@@ -287,7 +287,7 @@
port->read = cs461x_gameport_read;
port->cooked_read = cs461x_gameport_cooked_read;
- sprintf(phys, "pci%s/gameport0", pdev->slot_name);
+ sprintf(phys, "pci%s/gameport0", pci_name(pdev));
port->name = name;
port->phys = phys;
@@ -301,7 +301,7 @@
gameport_register_port(port);
printk(KERN_INFO "gameport: %s on pci%s speed %d kHz\n",
- name, pdev->slot_name, port->speed);
+ name, pci_name(pdev), port->speed);
return 0;
}
diff -Nru a/drivers/input/gameport/emu10k1-gp.c b/drivers/input/gameport/emu10k1-gp.c
--- a/drivers/input/gameport/emu10k1-gp.c Sun Aug 3 13:14:49 2003
+++ b/drivers/input/gameport/emu10k1-gp.c Sun Aug 3 13:14:49 2003
@@ -49,7 +49,7 @@
char phys[32];
};
-static struct pci_device_id emu_tbl[] __devinitdata = {
+static struct pci_device_id emu_tbl[] = {
{ 0x1102, 0x7002, PCI_ANY_ID, PCI_ANY_ID }, /* SB Live gameport */
{ 0x1102, 0x7003, PCI_ANY_ID, PCI_ANY_ID }, /* Audigy gameport */
{ 0, }
@@ -78,7 +78,7 @@
}
memset(emu, 0, sizeof(struct emu));
- sprintf(emu->phys, "pci%s/gameport0", pdev->slot_name);
+ sprintf(emu->phys, "pci%s/gameport0", pci_name(pdev));
emu->size = iolen;
emu->dev = pdev;
@@ -95,7 +95,7 @@
gameport_register_port(&emu->gameport);
printk(KERN_INFO "gameport: %s at pci%s speed %d kHz\n",
- pdev->dev.name, pdev->slot_name, emu->gameport.speed);
+ pdev->dev.name, pci_name(pdev), emu->gameport.speed);
return 0;
}
diff -Nru a/drivers/input/gameport/fm801-gp.c b/drivers/input/gameport/fm801-gp.c
--- a/drivers/input/gameport/fm801-gp.c Sun Aug 3 13:14:49 2003
+++ b/drivers/input/gameport/fm801-gp.c Sun Aug 3 13:14:49 2003
@@ -116,7 +116,7 @@
gameport_register_port(&gp->gameport);
printk(KERN_INFO "gameport: %s at pci%s speed %d kHz\n",
- pci->dev.name, pci->slot_name, gp->gameport.speed);
+ pci->dev.name, pci_name(pci), gp->gameport.speed);
return 0;
}
@@ -131,7 +131,7 @@
}
}
-static struct pci_device_id fm801_gp_id_table[] __devinitdata = {
+static struct pci_device_id fm801_gp_id_table[] = {
{ PCI_VENDOR_ID_FORTEMEDIA, PCI_DEVICE_ID_FM801_GP, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0 }
};
diff -Nru a/drivers/input/gameport/vortex.c b/drivers/input/gameport/vortex.c
--- a/drivers/input/gameport/vortex.c Sun Aug 3 13:14:51 2003
+++ b/drivers/input/gameport/vortex.c Sun Aug 3 13:14:51 2003
@@ -115,7 +115,7 @@
memset(vortex, 0, sizeof(struct vortex));
vortex->dev = dev;
- sprintf(vortex->phys, "pci%s/gameport0", dev->slot_name);
+ sprintf(vortex->phys, "pci%s/gameport0", pci_name(dev));
pci_set_drvdata(dev, vortex);
@@ -146,7 +146,7 @@
gameport_register_port(&vortex->gameport);
printk(KERN_INFO "gameport: %s at pci%s speed %d kHz\n",
- dev->dev.name, dev->slot_name, vortex->gameport.speed);
+ dev->dev.name, pci_name(dev), vortex->gameport.speed);
return 0;
}
@@ -159,7 +159,7 @@
kfree(vortex);
}
-static struct pci_device_id vortex_id_table[] __devinitdata =
+static struct pci_device_id vortex_id_table[] =
{{ 0x12eb, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x11000 },
{ 0x12eb, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x28800 },
{ 0 }};
diff -Nru a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
--- a/drivers/input/keyboard/Kconfig Sun Aug 3 13:14:52 2003
+++ b/drivers/input/keyboard/Kconfig Sun Aug 3 13:14:52 2003
@@ -2,7 +2,7 @@
# Input core configuration
#
config INPUT_KEYBOARD
- bool "Keyboards"
+ bool "Keyboards" if EMBEDDED || !X86
default y
depends on INPUT
help
@@ -12,7 +12,7 @@
If unsure, say Y.
config KEYBOARD_ATKBD
- tristate "AT keyboard support"
+ tristate "AT keyboard support" if EMBEDDED || !X86
default y
depends on INPUT && INPUT_KEYBOARD && SERIO
help
diff -Nru a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
--- a/drivers/input/serio/Kconfig Sun Aug 3 13:14:49 2003
+++ b/drivers/input/serio/Kconfig Sun Aug 3 13:14:49 2003
@@ -19,7 +19,7 @@
as a module, say M here and read <file:Documentation/modules.txt>.
config SERIO_I8042
- tristate "i8042 PC Keyboard controller"
+ tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86
default y
depends on SERIO
---help---
diff -Nru a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
--- a/drivers/input/serio/i8042.c Sun Aug 3 13:14:45 2003
+++ b/drivers/input/serio/i8042.c Sun Aug 3 13:14:45 2003
@@ -59,6 +59,7 @@
static unsigned char i8042_initial_ctr;
static unsigned char i8042_ctr;
static unsigned char i8042_last_e0;
+static unsigned char i8042_last_release;
static unsigned char i8042_mux_open;
struct timer_list i8042_timer;
@@ -406,15 +407,22 @@
if (data > 0x7f) {
unsigned char index = (data & 0x7f) | (i8042_last_e0 << 7);
+ /* work around hardware that doubles key releases */
+ if (index == i8042_last_release) {
+ dbg("i8042 skipped double release (%d)\n", index);
+ continue;
+ }
if (index == 0xaa || index == 0xb6)
set_bit(index, i8042_unxlate_seen);
if (test_and_clear_bit(index, i8042_unxlate_seen)) {
serio_interrupt(&i8042_kbd_port, 0xf0, dfl, regs);
data = i8042_unxlate_table[data & 0x7f];
+ i8042_last_release = index;
}
} else {
set_bit(data | (i8042_last_e0 << 7), i8042_unxlate_seen);
data = i8042_unxlate_table[data];
+ i8042_last_release = 0;
}
i8042_last_e0 = (data == 0xe0);
diff -Nru a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c
--- a/drivers/input/serio/serio.c Sun Aug 3 13:14:44 2003
+++ b/drivers/input/serio/serio.c Sun Aug 3 13:14:44 2003
@@ -26,6 +26,10 @@
* Should you need to contact me, the author, you can do so either by
* e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
* Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
+ *
+ * Changes:
+ * 20 Jul. 2003 Daniele Bellucci <bellucda@tiscali.it>
+ * Minor cleanups.
*/
#include <linux/stddef.h>
@@ -213,7 +217,7 @@
serio->dev = NULL;
}
-int serio_init(void)
+static int __init serio_init(void)
{
int pid;
@@ -230,7 +234,7 @@
return 0;
}
-void serio_exit(void)
+static void __exit serio_exit(void)
{
kill_proc(serio_pid, SIGTERM, 1);
wait_for_completion(&serio_exited);
diff -Nru a/drivers/isdn/capi/capidrv.c b/drivers/isdn/capi/capidrv.c
--- a/drivers/isdn/capi/capidrv.c Sun Aug 3 13:14:48 2003
+++ b/drivers/isdn/capi/capidrv.c Sun Aug 3 13:14:48 2003
@@ -1596,7 +1596,7 @@
rc = FVteln2capi20(bchan->num, AdditionalInfo);
isleasedline = (rc == 0);
if (rc < 0)
- printk(KERN_ERR "capidrv-%d: WARNING: illegal leased linedefinition \"%s\"\n", card->contrnr, bchan->num);
+ printk(KERN_ERR "capidrv-%d: WARNING: invalid leased linedefinition \"%s\"\n", card->contrnr, bchan->num);
if (isleasedline) {
calling[0] = 0;
diff -Nru a/drivers/isdn/eicon/eicon_isa.c b/drivers/isdn/eicon/eicon_isa.c
--- a/drivers/isdn/eicon/eicon_isa.c Sun Aug 3 13:14:45 2003
+++ b/drivers/isdn/eicon/eicon_isa.c Sun Aug 3 13:14:45 2003
@@ -90,7 +90,7 @@
if ((Mem < 0x0c0000) ||
(Mem > 0x0fc000) ||
(Mem & 0xfff)) {
- printk(KERN_WARNING "eicon_isa: illegal membase 0x%x for %s\n",
+ printk(KERN_WARNING "eicon_isa: invalid membase 0x%x for %s\n",
Mem, Id);
return -1;
}
@@ -326,7 +326,7 @@
/* Check for valid IRQ */
if ((card->irq < 0) || (card->irq > 15) ||
(!((1 << card->irq) & eicon_isa_valid_irq[card->type & 0x0f]))) {
- printk(KERN_WARNING "eicon_isa_load: illegal irq: %d\n", card->irq);
+ printk(KERN_WARNING "eicon_isa_load: invalid irq: %d\n", card->irq);
eicon_isa_release_shmem(card);
kfree(code);
return -EINVAL;
diff -Nru a/drivers/isdn/hardware/avm/b1isa.c b/drivers/isdn/hardware/avm/b1isa.c
--- a/drivers/isdn/hardware/avm/b1isa.c Sun Aug 3 13:14:48 2003
+++ b/drivers/isdn/hardware/avm/b1isa.c Sun Aug 3 13:14:48 2003
@@ -78,7 +78,7 @@
if ( card->port != 0x150 && card->port != 0x250
&& card->port != 0x300 && card->port != 0x340) {
- printk(KERN_WARNING "b1isa: illegal port 0x%x.\n", card->port);
+ printk(KERN_WARNING "b1isa: invalid port 0x%x.\n", card->port);
retval = -EINVAL;
goto err_free;
}
diff -Nru a/drivers/isdn/hardware/avm/b1pci.c b/drivers/isdn/hardware/avm/b1pci.c
--- a/drivers/isdn/hardware/avm/b1pci.c Sun Aug 3 13:14:44 2003
+++ b/drivers/isdn/hardware/avm/b1pci.c Sun Aug 3 13:14:44 2003
@@ -28,7 +28,7 @@
/* ------------------------------------------------------------- */
-static struct pci_device_id b1pci_pci_tbl[] __devinitdata = {
+static struct pci_device_id b1pci_pci_tbl[] = {
{ PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_B1, PCI_ANY_ID, PCI_ANY_ID },
{ } /* Terminating entry */
};
diff -Nru a/drivers/isdn/hardware/avm/c4.c b/drivers/isdn/hardware/avm/c4.c
--- a/drivers/isdn/hardware/avm/c4.c Sun Aug 3 13:14:49 2003
+++ b/drivers/isdn/hardware/avm/c4.c Sun Aug 3 13:14:49 2003
@@ -36,7 +36,7 @@
static int suppress_pollack;
-static struct pci_device_id c4_pci_tbl[] __devinitdata = {
+static struct pci_device_id c4_pci_tbl[] = {
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_C4, 4 },
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_C2, 2 },
{ } /* Terminating entry */
diff -Nru a/drivers/isdn/hardware/avm/t1isa.c b/drivers/isdn/hardware/avm/t1isa.c
--- a/drivers/isdn/hardware/avm/t1isa.c Sun Aug 3 13:14:49 2003
+++ b/drivers/isdn/hardware/avm/t1isa.c Sun Aug 3 13:14:49 2003
@@ -370,7 +370,7 @@
sprintf(card->name, "t1isa-%x", card->port);
if (!(((card->port & 0x7) == 0) && ((card->port & 0x30) != 0x30))) {
- printk(KERN_WARNING "t1isa: illegal port 0x%x.\n", card->port);
+ printk(KERN_WARNING "t1isa: invalid port 0x%x.\n", card->port);
retval = -EINVAL;
goto err_free;
}
diff -Nru a/drivers/isdn/hardware/avm/t1pci.c b/drivers/isdn/hardware/avm/t1pci.c
--- a/drivers/isdn/hardware/avm/t1pci.c Sun Aug 3 13:14:45 2003
+++ b/drivers/isdn/hardware/avm/t1pci.c Sun Aug 3 13:14:45 2003
@@ -31,7 +31,7 @@
/* ------------------------------------------------------------- */
-static struct pci_device_id t1pci_pci_tbl[] __devinitdata = {
+static struct pci_device_id t1pci_pci_tbl[] = {
{ PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_T1, PCI_ANY_ID, PCI_ANY_ID },
{ } /* Terminating entry */
};
diff -Nru a/drivers/isdn/hardware/eicon/divasmain.c b/drivers/isdn/hardware/eicon/divasmain.c
--- a/drivers/isdn/hardware/eicon/divasmain.c Sun Aug 3 13:14:45 2003
+++ b/drivers/isdn/hardware/eicon/divasmain.c Sun Aug 3 13:14:45 2003
@@ -119,7 +119,7 @@
/*
This table should be sorted by PCI device ID
*/
-static struct pci_device_id divas_pci_tbl[] __devinitdata = {
+static struct pci_device_id divas_pci_tbl[] = {
/* Diva Server BRI-2M PCI 0xE010 */
{PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRA,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_MAESTRA_PCI},
diff -Nru a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c
--- a/drivers/isdn/hardware/eicon/message.c Sun Aug 3 13:14:49 2003
+++ b/drivers/isdn/hardware/eicon/message.c Sun Aug 3 13:14:49 2003
@@ -4487,7 +4487,7 @@
if(rc==WRONG_IE)
{
Info = 0x2007; /* Illegal message parameter coding */
- dbug(1,dprintf("MWI_REQ illegal parameter"));
+ dbug(1,dprintf("MWI_REQ invalid parameter"));
}
else
{
diff -Nru a/drivers/isdn/hisax/hisax_fcpcipnp.c b/drivers/isdn/hisax/hisax_fcpcipnp.c
--- a/drivers/isdn/hisax/hisax_fcpcipnp.c Sun Aug 3 13:14:51 2003
+++ b/drivers/isdn/hisax/hisax_fcpcipnp.c Sun Aug 3 13:14:51 2003
@@ -46,7 +46,7 @@
MODULE_AUTHOR("Kai Germaschewski <kai.germaschewski@gmx.de>/Karsten Keil <kkeil@suse.de>");
MODULE_DESCRIPTION("AVM Fritz!PCI/PnP ISDN driver");
-static struct pci_device_id fcpci_ids[] __devinitdata = {
+static struct pci_device_id fcpci_ids[] = {
{ .vendor = PCI_VENDOR_ID_AVM,
.device = PCI_DEVICE_ID_AVM_A1,
.subvendor = PCI_ANY_ID,
@@ -878,7 +878,7 @@
adapter->irq = pdev->irq;
printk(KERN_INFO "hisax_fcpcipnp: found adapter %s at %s\n",
- (char *) ent->driver_data, pdev->slot_name);
+ (char *) ent->driver_data, pci_name(pdev));
retval = fcpcipnp_setup(adapter);
if (retval)
diff -Nru a/drivers/isdn/hisax/hisax_hfcpci.c b/drivers/isdn/hisax/hisax_hfcpci.c
--- a/drivers/isdn/hisax/hisax_hfcpci.c Sun Aug 3 13:14:47 2003
+++ b/drivers/isdn/hisax/hisax_hfcpci.c Sun Aug 3 13:14:47 2003
@@ -47,7 +47,7 @@
.class_mask = 0, \
.driver_data = (unsigned long) name }
-static struct pci_device_id hfcpci_ids[] __devinitdata = {
+static struct pci_device_id hfcpci_ids[] = {
ID(CCD, CCD_2BD0, "CCD/Billion/Asuscom 2BD0"),
ID(CCD, CCD_B000, "Billion B000"),
ID(CCD, CCD_B006, "Billion B006"),
@@ -1567,7 +1567,7 @@
hfcpci_hw_init(adapter);
printk(KERN_INFO "hisax_hfcpci: found adapter %s at %s\n",
- (char *) ent->driver_data, pdev->slot_name);
+ (char *) ent->driver_data, pci_name(pdev));
return 0;
diff -Nru a/drivers/isdn/hysdn/hycapi.c b/drivers/isdn/hysdn/hycapi.c
--- a/drivers/isdn/hysdn/hycapi.c Sun Aug 3 13:14:45 2003
+++ b/drivers/isdn/hysdn/hycapi.c Sun Aug 3 13:14:45 2003
@@ -591,7 +591,7 @@
" current state\n", card->myid);
break;
case 0x2002:
- printk(KERN_ERR "HYSDN Card%d: illegal PLCI\n", card->myid);
+ printk(KERN_ERR "HYSDN Card%d: invalid PLCI\n", card->myid);
break;
case 0x2004:
printk(KERN_ERR "HYSDN Card%d: out of NCCI\n", card->myid);
diff -Nru a/drivers/isdn/i4l/isdn_ppp.c b/drivers/isdn/i4l/isdn_ppp.c
--- a/drivers/isdn/i4l/isdn_ppp.c Sun Aug 3 13:14:50 2003
+++ b/drivers/isdn/i4l/isdn_ppp.c Sun Aug 3 13:14:50 2003
@@ -715,7 +715,7 @@
found:
unit = isdn_ppp_if_get_unit(idev->name); /* get unit number from interface name .. ugly! */
if (unit < 0) {
- printk(KERN_INFO "isdn_ppp_bind: illegal interface name %s.\n", idev->name);
+ printk(KERN_INFO "isdn_ppp_bind: invalid interface name %s.\n", idev->name);
retval = -ENODEV;
goto err;
}
diff -Nru a/drivers/isdn/i4l/isdn_x25iface.c b/drivers/isdn/i4l/isdn_x25iface.c
--- a/drivers/isdn/i4l/isdn_x25iface.c Sun Aug 3 13:14:47 2003
+++ b/drivers/isdn/i4l/isdn_x25iface.c Sun Aug 3 13:14:47 2003
@@ -63,7 +63,7 @@
/* error message helper function */
static void illegal_state_warn( unsigned state, unsigned char firstbyte)
{
- printk( KERN_WARNING "isdn_x25iface: firstbyte %x illegal in"
+ printk( KERN_WARNING "isdn_x25iface: firstbyte %x invalid in"
"current state %d\n",firstbyte, state );
}
@@ -72,7 +72,7 @@
if( pda && pda -> magic == ISDN_X25IFACE_MAGIC ) return 0;
printk( KERN_WARNING
- "isdn_x25iface_xxx: illegal pointer to proto data\n" );
+ "isdn_x25iface_xxx: invalid pointer to proto data\n" );
return 1;
}
@@ -334,7 +334,7 @@
" options not yet supported\n");
break;
default:
- printk(KERN_WARNING "isdn_x25iface_xmit: frame with illegal"
+ printk(KERN_WARNING "isdn_x25iface_xmit: frame with invalid"
" first byte %x ignored:\n", firstbyte);
}
dev_kfree_skb(skb);
diff -Nru a/drivers/isdn/tpam/tpam_main.c b/drivers/isdn/tpam/tpam_main.c
--- a/drivers/isdn/tpam/tpam_main.c Sun Aug 3 13:14:50 2003
+++ b/drivers/isdn/tpam/tpam_main.c Sun Aug 3 13:14:50 2003
@@ -241,7 +241,7 @@
kfree(card);
}
-static struct pci_device_id tpam_pci_tbl[] __devinitdata = {
+static struct pci_device_id tpam_pci_tbl[] = {
{ PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_TURBOPAM,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ }
diff -Nru a/drivers/media/common/Kconfig b/drivers/media/common/Kconfig
--- a/drivers/media/common/Kconfig Sun Aug 3 13:14:53 2003
+++ b/drivers/media/common/Kconfig Sun Aug 3 13:14:53 2003
@@ -1,8 +1,8 @@
config VIDEO_SAA7146
tristate
- default y if DVB_AV7110=y || DVB_BUDGET=y || DVB_BUDGET_AV=y || VIDEO_MXB=y || VIDEO_DPC=y
- default m if DVB_AV7110=m || DVB_BUDGET=m || DVB_BUDGET_AV=m || VIDEO_MXB=m || VIDEO_DPC=m
- depends on VIDEO_DEV && PCI
+ default y if DVB_AV7110=y || DVB_BUDGET=y || DVB_BUDGET_AV=y || VIDEO_MXB=y || VIDEO_DPC=y || VIDEO_HEXIUM_ORION=y || VIDEO_HEXIUM_GEMINI=y
+ default m if DVB_AV7110=m || DVB_BUDGET=m || DVB_BUDGET_AV=m || VIDEO_MXB=m || VIDEO_DPC=m || VIDEO_HEXIUM_ORION=m || VIDEO_HEXIUM_GEMINI=m
+ depends on VIDEO_DEV && PCI && I2C
config VIDEO_VIDEOBUF
tristate
diff -Nru a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c
--- a/drivers/media/common/saa7146_video.c Sun Aug 3 13:14:50 2003
+++ b/drivers/media/common/saa7146_video.c Sun Aug 3 13:14:50 2003
@@ -794,7 +794,7 @@
strcpy(cap->driver, "saa7146 v4l2");
strlcpy(cap->card, dev->ext->name, sizeof(cap->card));
- sprintf(cap->bus_info,"PCI:%s",dev->pci->slot_name);
+ sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
cap->version = SAA7146_VERSION_CODE;
cap->capabilities =
V4L2_CAP_VIDEO_CAPTURE |
diff -Nru a/drivers/media/dvb/b2c2/skystar2.c b/drivers/media/dvb/b2c2/skystar2.c
--- a/drivers/media/dvb/b2c2/skystar2.c Sun Aug 3 13:14:50 2003
+++ b/drivers/media/dvb/b2c2/skystar2.c Sun Aug 3 13:14:50 2003
@@ -21,6 +21,9 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/pci.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
#include "dvb_i2c.h"
#include "dvb_frontend.h"
@@ -71,8 +74,8 @@
u32 PidFilterMax;
u32 MacFilterMax;
u32 irq;
- u32 io_mem;
- u32 io_port;
+ unsigned long io_mem;
+ unsigned long io_port;
u8 mac_addr[8];
u32 dwSramType;
@@ -285,7 +288,7 @@
dprintk("%s:\n", __FUNCTION__);
for (i = 0; i < num; i++) {
- printk("message %d: flags=%x, addr=0x%04x, buf=%x, len=%d \n", i, msgs[i].flags, msgs[i].addr, (u32) msgs[i].buf, msgs[i].len);
+ printk("message %d: flags=%x, addr=0x%04x, buf=%p, len=%d \n", i, msgs[i].flags, msgs[i].addr, msgs[i].buf, msgs[i].len);
}
}
@@ -1942,7 +1945,7 @@
adapter->dma_status = adapter->dma_status | 0x10000000;
- dprintk("%s: allocated dma buffer at 0x%x, length=%d\n", __FUNCTION__, (int) adapter->dmaq1.buffer, SizeOfBufDMA1);
+ dprintk("%s: allocated dma buffer at 0x%p, length=%d\n", __FUNCTION__, adapter->dmaq1.buffer, SizeOfBufDMA1);
} else {
@@ -1968,7 +1971,7 @@
adapter->dma_status = adapter->dma_status | 0x20000000;
- dprintk("%s: allocated dma buffer at 0x%x, length=%d\n", __FUNCTION__, (int) adapter->dmaq2.buffer, (int) SizeOfBufDMA2);
+ dprintk("%s: allocated dma buffer at 0x%p, length=%d\n", __FUNCTION__, adapter->dmaq2.buffer, (int) SizeOfBufDMA2);
} else {
@@ -2045,7 +2048,7 @@
adapter->io_port = pdev->resource[1].start;
- adapter->io_mem = (u32) ioremap(pdev->resource[0].start, 0x800);
+ adapter->io_mem = (unsigned long) ioremap(pdev->resource[0].start, 0x800);
if (adapter->io_mem == 0) {
dprintk("%s: can not map io memory\n", __FUNCTION__);
@@ -2053,7 +2056,7 @@
return 2;
}
- dprintk("%s: io memory maped at %x\n", __FUNCTION__, adapter->io_mem);
+ dprintk("%s: io memory maped at %lx\n", __FUNCTION__, adapter->io_mem);
return 1;
}
diff -Nru a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c Sun Aug 3 13:14:46 2003
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c Sun Aug 3 13:14:46 2003
@@ -134,6 +134,7 @@
{
struct list_head *entry;
int stepsize = this_fe->info->frequency_stepsize;
+ int this_fe_adap_num = this_fe->frontend.i2c->adapter->num;
int frequency;
if (!stepsize || recursive > 10) {
@@ -156,6 +157,9 @@
int f;
fe = list_entry (entry, struct dvb_frontend_data, list_head);
+
+ if (fe->frontend.i2c->adapter->num != this_fe_adap_num)
+ continue;
f = fe->parameters.frequency;
f += fe->lnb_drift;
diff -Nru a/drivers/media/dvb/dvb-core/dvb_net.c b/drivers/media/dvb/dvb-core/dvb_net.c
--- a/drivers/media/dvb/dvb-core/dvb_net.c Sun Aug 3 13:14:46 2003
+++ b/drivers/media/dvb/dvb-core/dvb_net.c Sun Aug 3 13:14:46 2003
@@ -597,7 +597,7 @@
case NET_REMOVE_IF:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
- return dvb_net_remove_if(dvbnet, (int) parg);
+ return dvb_net_remove_if(dvbnet, (int) (long) parg);
default:
return -EINVAL;
}
diff -Nru a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
--- a/drivers/media/dvb/frontends/Makefile Sun Aug 3 13:14:44 2003
+++ b/drivers/media/dvb/frontends/Makefile Sun Aug 3 13:14:44 2003
@@ -12,6 +12,6 @@
obj-$(CONFIG_DVB_CX24110) += cx24110.o
obj-$(CONFIG_DVB_GRUNDIG_29504_491) += grundig_29504-491.o
obj-$(CONFIG_DVB_GRUNDIG_29504_401) += grundig_29504-401.o
-obi-$(CONFIG_DVB_MT312) += mt312.o
+obj-$(CONFIG_DVB_MT312) += mt312.o
obj-$(CONFIG_DVB_VES1820) += ves1820.o
obj-$(CONFIG_DVB_TDA1004X) += tda1004x.o
diff -Nru a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c
--- a/drivers/media/dvb/frontends/mt312.c Sun Aug 3 13:14:45 2003
+++ b/drivers/media/dvb/frontends/mt312.c Sun Aug 3 13:14:45 2003
@@ -41,6 +41,9 @@
#define MT312_SYS_CLK 90000000UL /* 90 MHz */
#define MT312_PLL_CLK 10000000UL /* 10 MHz */
+/* number of active frontends */
+static int mt312_count = 0;
+
static struct dvb_frontend_info mt312_info = {
.name = "Zarlink MT312",
.type = FE_QPSK,
@@ -78,7 +81,7 @@
ret = i2c->xfer(i2c, msg, 2);
- if (ret != 2) {
+ if ((ret != 2) && (mt312_count != 0)) {
printk(KERN_ERR "%s: ret == %d\n", __FUNCTION__, ret);
return -EREMOTEIO;
}
@@ -722,13 +725,21 @@
if ((id != ID_VP310) && (id != ID_MT312))
return -ENODEV;
- return dvb_register_frontend(mt312_ioctl, i2c, (void *) (long) id,
- &mt312_info);
+ if ((ret = dvb_register_frontend(mt312_ioctl, i2c,
+ (void *)(long)id, &mt312_info)) < 0)
+ return ret;
+
+ mt312_count++;
+
+ return 0;
}
static void mt312_detach(struct dvb_i2c_bus *i2c)
{
dvb_unregister_frontend(mt312_ioctl, i2c);
+
+ if (mt312_count)
+ mt312_count--;
}
static int __init mt312_module_init(void)
diff -Nru a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c
--- a/drivers/media/dvb/ttpci/budget-av.c Sun Aug 3 13:14:51 2003
+++ b/drivers/media/dvb/ttpci/budget-av.c Sun Aug 3 13:14:51 2003
@@ -64,6 +64,19 @@
return mm2[0];
}
+static int i2c_readregs(struct dvb_i2c_bus *i2c, u8 id, u8 reg, u8 *buf, u8 len)
+{
+ u8 mm1[] = { reg };
+ struct i2c_msg msgs[2] = {
+ { addr: id/2, flags: 0, buf: mm1, len: 1 },
+ { addr: id/2, flags: I2C_M_RD, buf: buf, len: len }
+ };
+
+ if (i2c->xfer(i2c, msgs, 2) != 2)
+ return -EIO;
+ return 0;
+}
+
static int i2c_writereg (struct dvb_i2c_bus *i2c, u8 id, u8 reg, u8 val)
{
@@ -177,6 +190,7 @@
{
struct budget_av *budget_av;
struct budget_info *bi = info->ext_priv;
+ u8 *mac;
int err;
DEB_EE(("dev: %p\n",dev));
@@ -243,6 +257,16 @@
/* fixme: find some sane values here... */
saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
+ mac = budget_av->budget.dvb_adapter->proposed_mac;
+ if (i2c_readregs(budget_av->budget.i2c_bus, 0xa0, 0x30, mac, 6)) {
+ printk("KNC1-%d: Could not read MAC from KNC1 card\n",
+ budget_av->budget.dvb_adapter->num);
+ memset(mac, 0, 6);
+ }
+ else
+ printk("KNC1-%d: MAC addr = %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
+ budget_av->budget.dvb_adapter->num,
+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
return 0;
}
diff -Nru a/drivers/media/dvb/ttpci/budget-patch.c b/drivers/media/dvb/ttpci/budget-patch.c
--- a/drivers/media/dvb/ttpci/budget-patch.c Sun Aug 3 13:14:45 2003
+++ b/drivers/media/dvb/ttpci/budget-patch.c Sun Aug 3 13:14:45 2003
@@ -150,7 +150,7 @@
}
case FE_DISEQC_SEND_BURST:
- av7110_send_diseqc_msg (budget, 0, NULL, (int) arg);
+ av7110_send_diseqc_msg (budget, 0, NULL, (int) (long) arg);
break;
default:
diff -Nru a/drivers/media/dvb/ttpci/ttpci-eeprom.c b/drivers/media/dvb/ttpci/ttpci-eeprom.c
--- a/drivers/media/dvb/ttpci/ttpci-eeprom.c Sun Aug 3 13:14:50 2003
+++ b/drivers/media/dvb/ttpci/ttpci-eeprom.c Sun Aug 3 13:14:50 2003
@@ -3,9 +3,6 @@
decode it and store it in the associated adapter struct for
use by dvb_net.c
- This code was tested on TT-Budget/WinTV-NOVA-CI PCI boards with
- Atmel and ST Microelectronics EEPROMs.
-
This card appear to have the 24C16 write protect held to ground,
thus permitting normal read/write operation. Theoretically it
would be possible to write routines to burn a different (encoded)
@@ -15,6 +12,9 @@
Michael Glaum KVH Industries
Holger Waechtler Convergence
+ Copyright (C) 2002-2003 Ralph Metzler <rjkm@metzlerbros.de>
+ Metzler Brothers Systementwicklung GbR
+
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
@@ -40,23 +40,62 @@
#include "dvb_functions.h"
#if 1
-#define dprintk(x...) printk(x)
+#define dprintk(x...) do { printk(x); } while (0)
#else
-#define dprintk(x...)
+#define dprintk(x...) do { } while (0)
#endif
+static int check_mac_tt(u8 *buf)
+{
+ int i;
+ u16 tmp = 0xffff;
+
+ for (i = 0; i < 8; i++) {
+ tmp = (tmp << 8) | ((tmp >> 8) ^ buf[i]);
+ tmp ^= (tmp >> 4) & 0x0f;
+ tmp ^= (tmp << 12) ^ ((tmp & 0xff) << 5);
+ }
+ tmp ^= 0xffff;
+ return (((tmp >> 8) ^ buf[8]) | ((tmp & 0xff) ^ buf[9]));
+}
+
+static int getmac_tt(u8 * decodedMAC, u8 * encodedMAC)
+{
+ u8 xor[20] = { 0x72, 0x23, 0x68, 0x19, 0x5c, 0xa8, 0x71, 0x2c,
+ 0x54, 0xd3, 0x7b, 0xf1, 0x9E, 0x23, 0x16, 0xf6,
+ 0x1d, 0x36, 0x64, 0x78};
+ u8 data[20];
+ int i;
+
+ /* In case there is a sig check failure have the orig contents available */
+ memcpy(data, encodedMAC, 20);
+
+ for (i = 0; i < 20; i++)
+ data[i] ^= xor[i];
+ for (i = 0; i < 10; i++)
+ data[i] = ((data[2 * i + 1] << 8) | data[2 * i])
+ >> ((data[2 * i + 1] >> 6) & 3);
+
+ if (check_mac_tt(data))
+ return -ENODEV;
+
+ decodedMAC[0] = data[2]; decodedMAC[1] = data[1]; decodedMAC[2] = data[0];
+ decodedMAC[3] = data[6]; decodedMAC[4] = data[5]; decodedMAC[5] = data[4];
+ return 0;
+}
+
static int ttpci_eeprom_read_encodedMAC(struct dvb_i2c_bus *i2c, u8 * encodedMAC)
{
int ret;
- u8 b0[] = { 0xd4 };
+ u8 b0[] = { 0xcc };
struct i2c_msg msg[] = {
{.addr = 0x50,.flags = 0,.buf = b0,.len = 1},
- {.addr = 0x50,.flags = I2C_M_RD,.buf = encodedMAC,.len = 6}
+ { .addr = 0x50, .flags = I2C_M_RD, .buf = encodedMAC, .len = 20 }
};
- dprintk("%s\n", __FUNCTION__);
+ /* dprintk("%s\n", __FUNCTION__); */
ret = i2c->xfer(i2c, msg, 2);
@@ -66,34 +105,11 @@
return 0;
}
-static void decodeMAC(u8 * decodedMAC, const u8 * encodedMAC)
-{
- u8 ormask0[3] = { 0x54, 0x7B, 0x9E };
- u8 ormask1[3] = { 0xD3, 0xF1, 0x23 };
- u8 low;
- u8 high;
- u8 shift;
- int i;
-
- decodedMAC[0] = 0x00;
- decodedMAC[1] = 0xD0;
- decodedMAC[2] = 0x5C;
-
- for (i = 0; i < 3; i++) {
- low = encodedMAC[2 * i] ^ ormask0[i];
- high = encodedMAC[2 * i + 1] ^ ormask1[i];
- shift = (high >> 6) & 0x3;
-
- decodedMAC[5 - i] = ((high << 8) | low) >> shift;
- }
-
-}
-
int ttpci_eeprom_parse_mac(struct dvb_i2c_bus *i2c)
{
- int ret;
- u8 encodedMAC[6];
+ int ret, i;
+ u8 encodedMAC[20];
u8 decodedMAC[6];
ret = ttpci_eeprom_read_encodedMAC(i2c, encodedMAC);
@@ -104,16 +120,24 @@
return ret;
}
- decodeMAC(decodedMAC, encodedMAC);
- memcpy(i2c->adapter->proposed_mac, decodedMAC, 6);
+ ret = getmac_tt(decodedMAC, encodedMAC);
+ if( ret != 0 ) {
+ dprintk("%s adapter %i failed MAC signature check\n",
+ i2c->adapter->name, i2c->adapter->num);
+ dprintk("encoded MAC from EEPROM was " );
+ for(i=0; i<19; i++) {
+ dprintk( "%.2x:", encodedMAC[i]);
+ }
+ dprintk("%.2x\n", encodedMAC[19]);
+ memset(i2c->adapter->proposed_mac, 0, 6);
+ return ret;
+ }
- dprintk("%s adapter %i has MAC addr = %02x:%02x:%02x:%02x:%02x:%02x\n",
+ memcpy(i2c->adapter->proposed_mac, decodedMAC, 6);
+ dprintk("%s adapter %i has MAC addr = %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
i2c->adapter->name, i2c->adapter->num,
decodedMAC[0], decodedMAC[1], decodedMAC[2],
decodedMAC[3], decodedMAC[4], decodedMAC[5]);
- dprintk("encoded MAC was %02x:%02x:%02x:%02x:%02x:%02x\n",
- encodedMAC[0], encodedMAC[1], encodedMAC[2],
- encodedMAC[3], encodedMAC[4], encodedMAC[5]);
return 0;
}
diff -Nru a/drivers/media/dvb/ttusb-dec/ttusb_dec.c b/drivers/media/dvb/ttusb-dec/ttusb_dec.c
--- a/drivers/media/dvb/ttusb-dec/ttusb_dec.c Sun Aug 3 13:14:52 2003
+++ b/drivers/media/dvb/ttusb-dec/ttusb_dec.c Sun Aug 3 13:14:52 2003
@@ -124,14 +124,10 @@
ttusb_dec_send_command(dec, 0x50, sizeof(b), b, NULL, NULL);
- if (!down_interruptible(&dec->pes2ts_sem)) {
dvb_filter_pes2ts_init(&dec->a_pes2ts, dec->pid[DMX_PES_AUDIO],
ttusb_dec_av_pes2ts_cb, dec->demux.feed);
dvb_filter_pes2ts_init(&dec->v_pes2ts, dec->pid[DMX_PES_VIDEO],
ttusb_dec_av_pes2ts_cb, dec->demux.feed);
-
- up(&dec->pes2ts_sem);
- }
}
static int ttusb_dec_i2c_master_xfer(struct dvb_i2c_bus *i2c,
@@ -196,14 +192,8 @@
memcpy(&dec->v_pes[dec->v_pes_length],
&av_pes[12], prebytes);
- if (!down_interruptible(&dec->pes2ts_sem)) {
- dvb_filter_pes2ts(&dec->v_pes2ts,
- dec->v_pes,
- dec->v_pes_length +
- prebytes);
-
- up(&dec->pes2ts_sem);
- }
+ dvb_filter_pes2ts(&dec->v_pes2ts, dec->v_pes,
+ dec->v_pes_length + prebytes);
}
if (av_pes[5] & 0x10) {
@@ -246,16 +236,10 @@
postbytes);
memcpy(&dec->v_pes[4], &v_pes_payload_length, 2);
- if (postbytes == 0) {
- if (!down_interruptible(&dec->pes2ts_sem)) {
- dvb_filter_pes2ts(&dec->v_pes2ts,
- dec->v_pes,
+ if (postbytes == 0)
+ dvb_filter_pes2ts(&dec->v_pes2ts, dec->v_pes,
dec->v_pes_length);
- up(&dec->pes2ts_sem);
- }
- }
-
break;
}
@@ -357,6 +341,31 @@
}
}
+static void ttusb_dec_process_urb_frame_list(unsigned long data)
+{
+ struct ttusb_dec *dec = (struct ttusb_dec *)data;
+ struct list_head *item;
+ struct urb_frame *frame;
+ unsigned long flags;
+
+ while (1) {
+ spin_lock_irqsave(&dec->urb_frame_list_lock, flags);
+ if ((item = dec->urb_frame_list.next) != &dec->urb_frame_list) {
+ frame = list_entry(item, struct urb_frame,
+ urb_frame_list);
+ list_del(&frame->urb_frame_list);
+ } else {
+ spin_unlock_irqrestore(&dec->urb_frame_list_lock,
+ flags);
+ return;
+ }
+ spin_unlock_irqrestore(&dec->urb_frame_list_lock, flags);
+
+ ttusb_dec_process_urb_frame(dec, frame->data, frame->length);
+ kfree(frame);
+ }
+}
+
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
static void ttusb_dec_process_urb(struct urb *urb)
#else
@@ -372,12 +381,28 @@
struct usb_iso_packet_descriptor *d;
u8 *b;
int length;
+ struct urb_frame *frame;
d = &urb->iso_frame_desc[i];
b = urb->transfer_buffer + d->offset;
length = d->actual_length;
- ttusb_dec_process_urb_frame(dec, b, length);
+ if ((frame = kmalloc(sizeof(struct urb_frame),
+ GFP_ATOMIC))) {
+ unsigned long flags;
+
+ memcpy(frame->data, b, length);
+ frame->length = length;
+
+ spin_lock_irqsave(&dec->urb_frame_list_lock,
+ flags);
+ list_add_tail(&frame->urb_frame_list,
+ &dec->urb_frame_list);
+ spin_unlock_irqrestore(&dec->urb_frame_list_lock,
+ flags);
+
+ tasklet_schedule(&dec->urb_tasklet);
+ }
}
} else {
/* -ENOENT is expected when unlinking urbs */
@@ -653,6 +678,14 @@
return 0;
}
+static void ttusb_dec_init_tasklet(struct ttusb_dec *dec)
+{
+ dec->urb_frame_list_lock = SPIN_LOCK_UNLOCKED;
+ INIT_LIST_HEAD(&dec->urb_frame_list);
+ tasklet_init(&dec->urb_tasklet, ttusb_dec_process_urb_frame_list,
+ (unsigned long)dec);
+}
+
static void ttusb_dec_init_v_pes(struct ttusb_dec *dec)
{
dprintk("%s\n", __FUNCTION__);
@@ -834,8 +867,6 @@
return result;
}
- sema_init(&dec->pes2ts_sem, 1);
-
dvb_net_init(dec->adapter, &dec->dvb_net, &dec->demux.dmx);
return 0;
@@ -868,6 +899,20 @@
ttusb_dec_free_iso_urbs(dec);
}
+static void ttusb_dec_exit_tasklet(struct ttusb_dec *dec)
+{
+ struct list_head *item;
+ struct urb_frame *frame;
+
+ tasklet_kill(&dec->urb_tasklet);
+
+ while ((item = dec->urb_frame_list.next) != &dec->urb_frame_list) {
+ frame = list_entry(item, struct urb_frame, urb_frame_list);
+ list_del(&frame->urb_frame_list);
+ kfree(frame);
+ }
+}
+
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
static void *ttusb_dec_probe(struct usb_device *udev, unsigned int ifnum,
const struct usb_device_id *id)
@@ -892,6 +937,7 @@
ttusb_dec_init_stb(dec);
ttusb_dec_init_dvb(dec);
ttusb_dec_init_v_pes(dec);
+ ttusb_dec_init_tasklet(dec);
return (void *)dec;
}
@@ -919,6 +965,7 @@
ttusb_dec_init_stb(dec);
ttusb_dec_init_dvb(dec);
ttusb_dec_init_v_pes(dec);
+ ttusb_dec_init_tasklet(dec);
usb_set_intfdata(intf, (void *)dec);
ttusb_dec_set_streaming_interface(dec);
@@ -941,6 +988,7 @@
dprintk("%s\n", __FUNCTION__);
+ ttusb_dec_exit_tasklet(dec);
ttusb_dec_exit_usb(dec);
ttusb_dec_exit_dvb(dec);
diff -Nru a/drivers/media/dvb/ttusb-dec/ttusb_dec.h b/drivers/media/dvb/ttusb-dec/ttusb_dec.h
--- a/drivers/media/dvb/ttusb-dec/ttusb_dec.h Sun Aug 3 13:14:44 2003
+++ b/drivers/media/dvb/ttusb-dec/ttusb_dec.h Sun Aug 3 13:14:44 2003
@@ -22,7 +22,10 @@
#ifndef _TTUSB_DEC_H
#define _TTUSB_DEC_H
-#include "asm/semaphore.h"
+#include <asm/semaphore.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/spinlock.h>
#include "dmxdev.h"
#include "dvb_demux.h"
#include "dvb_filter.h"
@@ -77,11 +80,20 @@
struct dvb_filter_pes2ts a_pes2ts;
struct dvb_filter_pes2ts v_pes2ts;
- struct semaphore pes2ts_sem;
u8 v_pes[16 + MAX_AV_PES_LENGTH];
int v_pes_length;
int v_pes_postbytes;
+
+ struct list_head urb_frame_list;
+ struct tasklet_struct urb_tasklet;
+ spinlock_t urb_frame_list_lock;
+};
+
+struct urb_frame {
+ u8 data[ISO_FRAME_SIZE];
+ int length;
+ struct list_head urb_frame_list;
};
#endif
diff -Nru a/drivers/media/radio/radio-maxiradio.c b/drivers/media/radio/radio-maxiradio.c
--- a/drivers/media/radio/radio-maxiradio.c Sun Aug 3 13:14:52 2003
+++ b/drivers/media/radio/radio-maxiradio.c Sun Aug 3 13:14:52 2003
@@ -327,7 +327,7 @@
release_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
}
-static struct pci_device_id maxiradio_pci_tbl[] __devinitdata = {
+static struct pci_device_id maxiradio_pci_tbl[] = {
{ PCI_VENDOR_ID_GUILLEMOT, PCI_DEVICE_ID_GUILLEMOT_MAXIRADIO,
PCI_ANY_ID, PCI_ANY_ID, },
{ 0,}
diff -Nru a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
--- a/drivers/media/video/Kconfig Sun Aug 3 13:14:52 2003
+++ b/drivers/media/video/Kconfig Sun Aug 3 13:14:52 2003
@@ -35,7 +35,7 @@
config VIDEO_PMS
tristate "Mediavision Pro Movie Studio Video For Linux"
- depends on VIDEO_DEV
+ depends on VIDEO_DEV && ISA
help
Say Y if you have such a thing. This driver is also available as a
module called pms ( = code which can be inserted in and removed
@@ -259,7 +259,7 @@
config VIDEO_HEXIUM_ORION
tristate "Hexium HV-PCI6 and Orion frame grabber"
- depends on VIDEO_DEV && PCI
+ depends on VIDEO_DEV && PCI && I2C
---help---
This is a video4linux driver for the Hexium HV-PCI6 and
Orion frame grabber cards by Hexium.
@@ -271,7 +271,7 @@
config VIDEO_HEXIUM_GEMINI
tristate "Hexium Gemini frame grabber"
- depends on VIDEO_DEV && PCI
+ depends on VIDEO_DEV && PCI && I2C
---help---
This is a video4linux driver for the Hexium Gemini frame
grabber card by Hexium. Please note that the Gemini Dual
diff -Nru a/drivers/media/video/bttv-cards.c b/drivers/media/video/bttv-cards.c
--- a/drivers/media/video/bttv-cards.c Sun Aug 3 13:14:48 2003
+++ b/drivers/media/video/bttv-cards.c Sun Aug 3 13:14:48 2003
@@ -30,6 +30,7 @@
#include <linux/kmod.h>
#include <linux/init.h>
#include <linux/pci.h>
+#include <linux/vmalloc.h>
#include <asm/io.h>
diff -Nru a/drivers/media/video/bttv-driver.c b/drivers/media/video/bttv-driver.c
--- a/drivers/media/video/bttv-driver.c Sun Aug 3 13:14:51 2003
+++ b/drivers/media/video/bttv-driver.c Sun Aug 3 13:14:51 2003
@@ -2310,7 +2310,7 @@
return -EINVAL;
strcpy(cap->driver,"bttv");
strlcpy(cap->card,btv->video_dev.name,sizeof(cap->card));
- sprintf(cap->bus_info,"PCI:%s",btv->dev->slot_name);
+ sprintf(cap->bus_info,"PCI:%s",pci_name(btv->dev));
cap->version = BTTV_VERSION_CODE;
cap->capabilities =
V4L2_CAP_VIDEO_CAPTURE |
@@ -2948,16 +2948,16 @@
static void bttv_print_riscaddr(struct bttv *btv)
{
printk(" main: %08Lx\n",
- (u64)btv->main.dma);
+ (unsigned long long)btv->main.dma);
printk(" vbi : o=%08Lx e=%08Lx\n",
- btv->vcurr ? (u64)btv->vcurr->top.dma : 0,
- btv->vcurr ? (u64)btv->vcurr->bottom.dma : 0);
+ btv->vcurr ? (unsigned long long)btv->vcurr->top.dma : 0,
+ btv->vcurr ? (unsigned long long)btv->vcurr->bottom.dma : 0);
printk(" cap : o=%08Lx e=%08Lx\n",
- btv->top ? (u64)btv->top->top.dma : 0,
- btv->bottom ? (u64)btv->bottom->bottom.dma : 0);
+ btv->top ? (unsigned long long)btv->top->top.dma : 0,
+ btv->bottom ? (unsigned long long)btv->bottom->bottom.dma : 0);
printk(" scr : o=%08Lx e=%08Lx\n",
- btv->screen ? (u64)btv->screen->top.dma : 0,
- btv->screen ? (u64)btv->screen->bottom.dma : 0);
+ btv->screen ? (unsigned long long)btv->screen->top.dma : 0,
+ btv->screen ? (unsigned long long)btv->screen->bottom.dma : 0);
}
static void bttv_irq_timeout(unsigned long data)
@@ -3351,7 +3351,7 @@
pci_read_config_byte(dev, PCI_CLASS_REVISION, &btv->revision);
pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
printk(KERN_INFO "bttv%d: Bt%d (rev %d) at %s, ",
- bttv_num,btv->id, btv->revision, dev->slot_name);
+ bttv_num,btv->id, btv->revision, pci_name(dev));
printk("irq: %d, latency: %d, mmio: 0x%lx\n",
btv->dev->irq, lat, pci_resource_start(dev,0));
@@ -3496,7 +3496,7 @@
return;
}
-static struct pci_device_id bttv_pci_tbl[] __devinitdata = {
+static struct pci_device_id bttv_pci_tbl[] = {
{PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT848,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT849,
diff -Nru a/drivers/media/video/bttv-risc.c b/drivers/media/video/bttv-risc.c
--- a/drivers/media/video/bttv-risc.c Sun Aug 3 13:14:48 2003
+++ b/drivers/media/video/bttv-risc.c Sun Aug 3 13:14:48 2003
@@ -530,10 +530,10 @@
d2printk(KERN_DEBUG
"bttv%d: capctl=%x irq=%d top=%08Lx/%08Lx even=%08Lx/%08Lx\n",
btv->nr,capctl,irqflags,
- btv->vcurr ? (u64)btv->vcurr->top.dma : 0,
- btv->top ? (u64)btv->top->top.dma : 0,
- btv->vcurr ? (u64)btv->vcurr->bottom.dma : 0,
- btv->bottom ? (u64)btv->bottom->bottom.dma : 0);
+ btv->vcurr ? (unsigned long long)btv->vcurr->top.dma : 0,
+ btv->top ? (unsigned long long)btv->top->top.dma : 0,
+ btv->vcurr ? (unsigned long long)btv->vcurr->bottom.dma : 0,
+ btv->bottom ? (unsigned long long)btv->bottom->bottom.dma : 0);
cmd = BT848_RISC_JUMP;
if (irqflags) {
@@ -568,7 +568,7 @@
if ((rc = bttv_riscmem_alloc(btv->dev,&btv->main,PAGE_SIZE)) < 0)
return rc;
dprintk(KERN_DEBUG "bttv%d: risc main @ %08Lx\n",
- btv->nr,(u64)btv->main.dma);
+ btv->nr,(unsigned long long)btv->main.dma);
btv->main.cpu[0] = cpu_to_le32(BT848_RISC_SYNC | BT848_RISC_RESYNC |
BT848_FIFO_STATUS_VRE);
@@ -612,7 +612,7 @@
btv->main.cpu[slot+1] = cpu_to_le32(next);
} else {
d2printk(KERN_DEBUG "bttv%d: risc=%p slot[%d]=%08Lx irq=%d\n",
- btv->nr,risc,slot,(u64)risc->dma,irqflags);
+ btv->nr,risc,slot,(unsigned long long)risc->dma,irqflags);
cmd = BT848_RISC_JUMP;
if (irqflags)
cmd |= BT848_RISC_IRQ | (irqflags << 16);
diff -Nru a/drivers/media/video/bttvp.h b/drivers/media/video/bttvp.h
--- a/drivers/media/video/bttvp.h Sun Aug 3 13:14:47 2003
+++ b/drivers/media/video/bttvp.h Sun Aug 3 13:14:47 2003
@@ -33,6 +33,7 @@
#include <linux/videodev.h>
#include <linux/pci.h>
#include <asm/scatterlist.h>
+#include <asm/io.h>
#include <media/video-buf.h>
#include <media/audiochip.h>
diff -Nru a/drivers/media/video/bw-qcam.c b/drivers/media/video/bw-qcam.c
--- a/drivers/media/video/bw-qcam.c Sun Aug 3 13:14:46 2003
+++ b/drivers/media/video/bw-qcam.c Sun Aug 3 13:14:46 2003
@@ -856,8 +856,8 @@
return video_usercopy(inode, file, cmd, arg, qcam_do_ioctl);
}
-static int qcam_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
+static ssize_t qcam_read(struct file *file, char *buf,
+ size_t count, loff_t *ppos)
{
struct video_device *v = video_devdata(file);
struct qcam_device *qcam=(struct qcam_device *)v;
diff -Nru a/drivers/media/video/c-qcam.c b/drivers/media/video/c-qcam.c
--- a/drivers/media/video/c-qcam.c Sun Aug 3 13:14:48 2003
+++ b/drivers/media/video/c-qcam.c Sun Aug 3 13:14:48 2003
@@ -668,8 +668,8 @@
return video_usercopy(inode, file, cmd, arg, qcam_do_ioctl);
}
-static int qcam_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
+static ssize_t qcam_read(struct file *file, char *buf,
+ size_t count, loff_t *ppos)
{
struct video_device *v = video_devdata(file);
struct qcam_device *qcam=(struct qcam_device *)v;
diff -Nru a/drivers/media/video/cpia.c b/drivers/media/video/cpia.c
--- a/drivers/media/video/cpia.c Sun Aug 3 13:14:50 2003
+++ b/drivers/media/video/cpia.c Sun Aug 3 13:14:50 2003
@@ -3300,8 +3300,8 @@
return 0;
}
-static int cpia_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
+static ssize_t cpia_read(struct file *file, char *buf,
+ size_t count, loff_t *ppos)
{
struct video_device *dev = file->private_data;
struct cam_data *cam = dev->priv;
diff -Nru a/drivers/media/video/cpia_usb.c b/drivers/media/video/cpia_usb.c
--- a/drivers/media/video/cpia_usb.c Sun Aug 3 13:14:44 2003
+++ b/drivers/media/video/cpia_usb.c Sun Aug 3 13:14:44 2003
@@ -621,7 +621,7 @@
udev = interface_to_usbdev(intf);
usb_driver_release_interface(&cpia_driver,
- &udev->actconfig->interface[0]);
+ udev->actconfig->interface[0]);
ucpia->curbuff = ucpia->workbuff = NULL;
diff -Nru a/drivers/media/video/hexium_gemini.c b/drivers/media/video/hexium_gemini.c
--- a/drivers/media/video/hexium_gemini.c Sun Aug 3 13:14:46 2003
+++ b/drivers/media/video/hexium_gemini.c Sun Aug 3 13:14:46 2003
@@ -25,12 +25,12 @@
#include <media/saa7146_vv.h>
-static int debug = 255;
+static int debug = 0;
MODULE_PARM(debug, "i");
MODULE_PARM_DESC(debug, "debug verbosity");
/* global variables */
-int hexium_num = 0;
+static int hexium_num = 0;
#include "hexium_gemini.h"
@@ -388,7 +388,7 @@
.irq_func = NULL,
};
-int __init hexium_init_module(void)
+static int __init hexium_init_module(void)
{
if (0 != saa7146_register_extension(&hexium_extension)) {
DEB_S(("failed to register extension.\n"));
@@ -398,7 +398,7 @@
return 0;
}
-void __exit hexium_cleanup_module(void)
+static void __exit hexium_cleanup_module(void)
{
saa7146_unregister_extension(&hexium_extension);
}
diff -Nru a/drivers/media/video/hexium_orion.c b/drivers/media/video/hexium_orion.c
--- a/drivers/media/video/hexium_orion.c Sun Aug 3 13:14:44 2003
+++ b/drivers/media/video/hexium_orion.c Sun Aug 3 13:14:44 2003
@@ -25,7 +25,7 @@
#include <media/saa7146_vv.h>
-static int debug = 255;
+static int debug = 0;
MODULE_PARM(debug, "i");
MODULE_PARM_DESC(debug, "debug verbosity");
diff -Nru a/drivers/media/video/meye.c b/drivers/media/video/meye.c
--- a/drivers/media/video/meye.c Sun Aug 3 13:14:49 2003
+++ b/drivers/media/video/meye.c Sun Aug 3 13:14:49 2003
@@ -1416,7 +1416,7 @@
printk(KERN_INFO "meye: removed\n");
}
-static struct pci_device_id meye_pci_tbl[] __devinitdata = {
+static struct pci_device_id meye_pci_tbl[] = {
{ PCI_VENDOR_ID_KAWASAKI, PCI_DEVICE_ID_MCHIP_KL5A72002,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ }
diff -Nru a/drivers/media/video/pms.c b/drivers/media/video/pms.c
--- a/drivers/media/video/pms.c Sun Aug 3 13:14:51 2003
+++ b/drivers/media/video/pms.c Sun Aug 3 13:14:51 2003
@@ -664,7 +664,7 @@
dt=count-len;
cnt += dev->height;
if (copy_to_user(buf, tmp+32, dt))
- return -EFAULT;
+ return len ? len : -EFAULT;
buf += dt;
len += dt;
}
diff -Nru a/drivers/media/video/saa5249.c b/drivers/media/video/saa5249.c
--- a/drivers/media/video/saa5249.c Sun Aug 3 13:14:51 2003
+++ b/drivers/media/video/saa5249.c Sun Aug 3 13:14:51 2003
@@ -579,7 +579,7 @@
case VTXIOCSETVIRT:
{
/* The SAA5249 has virtual-row reception turned on always */
- t->virtual_mode = (int)arg;
+ t->virtual_mode = (int)(long)arg;
return 0;
}
}
diff -Nru a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c
--- a/drivers/media/video/saa7134/saa7134-core.c Sun Aug 3 13:14:47 2003
+++ b/drivers/media/video/saa7134/saa7134-core.c Sun Aug 3 13:14:47 2003
@@ -746,7 +746,7 @@
pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
printk(KERN_INFO "%s: found at %s, rev: %d, irq: %d, "
"latency: %d, mmio: 0x%lx\n", dev->name,
- pci_dev->slot_name, dev->pci_rev, pci_dev->irq,
+ pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
dev->pci_lat,pci_resource_start(pci_dev,0));
pci_set_master(pci_dev);
if (!pci_dma_supported(pci_dev,0xffffffff)) {
diff -Nru a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c
--- a/drivers/media/video/saa7134/saa7134-ts.c Sun Aug 3 13:14:44 2003
+++ b/drivers/media/video/saa7134/saa7134-ts.c Sun Aug 3 13:14:44 2003
@@ -253,7 +253,7 @@
strcpy(cap->driver, "saa7134");
strlcpy(cap->card, saa7134_boards[dev->board].name,
sizeof(cap->card));
- sprintf(cap->bus_info,"PCI:%s",dev->pci->slot_name);
+ sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
cap->version = SAA7134_VERSION_CODE;
cap->capabilities =
V4L2_CAP_VIDEO_CAPTURE |
diff -Nru a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c
--- a/drivers/media/video/saa7134/saa7134-video.c Sun Aug 3 13:14:46 2003
+++ b/drivers/media/video/saa7134/saa7134-video.c Sun Aug 3 13:14:46 2003
@@ -1503,7 +1503,7 @@
strcpy(cap->driver, "saa7134");
strlcpy(cap->card, saa7134_boards[dev->board].name,
sizeof(cap->card));
- sprintf(cap->bus_info,"PCI:%s",dev->pci->slot_name);
+ sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
cap->version = SAA7134_VERSION_CODE;
cap->capabilities =
V4L2_CAP_VIDEO_CAPTURE |
@@ -1903,7 +1903,7 @@
strcpy(cap->driver, "saa7134");
strlcpy(cap->card, saa7134_boards[dev->board].name,
sizeof(cap->card));
- sprintf(cap->bus_info,"PCI:%s",dev->pci->slot_name);
+ sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
cap->version = SAA7134_VERSION_CODE;
cap->capabilities = V4L2_CAP_TUNER;
return 0;
diff -Nru a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
--- a/drivers/media/video/saa7134/saa7134.h Sun Aug 3 13:14:50 2003
+++ b/drivers/media/video/saa7134/saa7134.h Sun Aug 3 13:14:50 2003
@@ -23,6 +23,8 @@
#include <linux/videodev.h>
#include <linux/kdev_t.h>
+#include <asm/io.h>
+
#include <media/video-buf.h>
#include <media/tuner.h>
#include <media/audiochip.h>
diff -Nru a/drivers/media/video/w9966.c b/drivers/media/video/w9966.c
--- a/drivers/media/video/w9966.c Sun Aug 3 13:14:46 2003
+++ b/drivers/media/video/w9966.c Sun Aug 3 13:14:46 2003
@@ -179,8 +179,8 @@
static int w9966_v4l_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg);
-static int w9966_v4l_read(struct file *file, char *buf,
- size_t count, loff_t *ppos);
+static ssize_t w9966_v4l_read(struct file *file, char *buf,
+ size_t count, loff_t *ppos);
static struct file_operations w9966_fops = {
.owner = THIS_MODULE,
@@ -867,8 +867,8 @@
}
// Capture data
-static int w9966_v4l_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
+static ssize_t w9966_v4l_read(struct file *file, char *buf,
+ size_t count, loff_t *ppos)
{
struct video_device *vdev = video_devdata(file);
struct w9966_dev *cam = (struct w9966_dev *)vdev->priv;
diff -Nru a/drivers/media/video/zr36120.c b/drivers/media/video/zr36120.c
--- a/drivers/media/video/zr36120.c Sun Aug 3 13:14:48 2003
+++ b/drivers/media/video/zr36120.c Sun Aug 3 13:14:48 2003
@@ -488,7 +488,7 @@
vcp->width < 0 || (uint)(vcp->x+vcp->width) > ztv->overinfo.w ||
vcp->height < 0 || (vcp->y+vcp->height) > ztv->overinfo.h)
{
- DEBUG(printk(CARD_DEBUG "illegal clipzone (%d,%d,%d,%d) not in (0,0,%d,%d), adapting\n",CARD,vcp->x,vcp->y,vcp->width,vcp->height,ztv->overinfo.w,ztv->overinfo.h));
+ DEBUG(printk(CARD_DEBUG "invalid clipzone (%d,%d,%d,%d) not in (0,0,%d,%d), adapting\n",CARD,vcp->x,vcp->y,vcp->width,vcp->height,ztv->overinfo.w,ztv->overinfo.h));
if (vcp->x < 0) vcp->x = 0;
if ((uint)vcp->x > ztv->overinfo.w) vcp->x = ztv->overinfo.w;
if (vcp->y < 0) vcp->y = 0;
diff -Nru a/drivers/mtd/devices/blkmtd.c b/drivers/mtd/devices/blkmtd.c
--- a/drivers/mtd/devices/blkmtd.c Sun Aug 3 13:14:44 2003
+++ b/drivers/mtd/devices/blkmtd.c Sun Aug 3 13:14:44 2003
@@ -710,7 +710,7 @@
struct page **pages;
int pagecnt = 0;
char b[BDEVNAME_SIZE];
-21 e3
+
*retlen = 0;
DEBUG(2, "blkmtd: write: dev = `%s' to = %ld len = %d buf = %p\n",
bdevname(rawdevice->binding, b), (long int)to, len, buf);
@@ -1189,6 +1189,7 @@
INIT_LIST_HEAD(&mtd_rawdevice->as.locked_pages);
mtd_rawdevice->as.host = NULL;
init_MUTEX(&(mtd_rawdevice->as.i_shared_sem));
+ atomic_set(&(mtd_rawdevice->as.truncate_count), 0);
mtd_rawdevice->as.a_ops = &blkmtd_aops;
INIT_LIST_HEAD(&mtd_rawdevice->as.i_mmap);
diff -Nru a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c
--- a/drivers/mtd/ftl.c Sun Aug 3 13:14:51 2003
+++ b/drivers/mtd/ftl.c Sun Aug 3 13:14:51 2003
@@ -188,7 +188,7 @@
printk(KERN_NOTICE "ftl_cs: FTL header not found.\n");
return -ENOENT;
}
- if ((le16_to_cpu(header.NumEraseUnits) > 65536) || header.BlockSize != 9 ||
+ if (header.BlockSize != 9 ||
(header.EraseUnitSize < 10) || (header.EraseUnitSize > 31) ||
(header.NumTransferUnits >= le16_to_cpu(header.NumEraseUnits))) {
printk(KERN_NOTICE "ftl_cs: FTL header corrupt!\n");
diff -Nru a/drivers/mtd/maps/amd76xrom.c b/drivers/mtd/maps/amd76xrom.c
--- a/drivers/mtd/maps/amd76xrom.c Sun Aug 3 13:14:46 2003
+++ b/drivers/mtd/maps/amd76xrom.c Sun Aug 3 13:14:46 2003
@@ -160,7 +160,7 @@
#endif /* REQUEST_MEM_REGION */
}
-static struct pci_device_id amd76xrom_pci_tbl[] __devinitdata = {
+static struct pci_device_id amd76xrom_pci_tbl[] = {
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
diff -Nru a/drivers/mtd/maps/elan-104nc.c b/drivers/mtd/maps/elan-104nc.c
--- a/drivers/mtd/maps/elan-104nc.c Sun Aug 3 13:14:48 2003
+++ b/drivers/mtd/maps/elan-104nc.c Sun Aug 3 13:14:48 2003
@@ -27,7 +27,7 @@
16 bit I/O port (0x22) for some sort of paging.
-The single flash device is divided into 3 partition which appear as seperate
+The single flash device is divided into 3 partition which appear as separate
MTD devices.
Linux thinks that the I/O port is used by the PIC and hence check_region() will
diff -Nru a/drivers/mtd/maps/ich2rom.c b/drivers/mtd/maps/ich2rom.c
--- a/drivers/mtd/maps/ich2rom.c Sun Aug 3 13:14:53 2003
+++ b/drivers/mtd/maps/ich2rom.c Sun Aug 3 13:14:53 2003
@@ -260,7 +260,7 @@
#endif
}
-static struct pci_device_id ich2rom_pci_tbl[] __devinitdata = {
+static struct pci_device_id ich2rom_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0,
PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,
diff -Nru a/drivers/mtd/maps/pci.c b/drivers/mtd/maps/pci.c
--- a/drivers/mtd/maps/pci.c Sun Aug 3 13:14:47 2003
+++ b/drivers/mtd/maps/pci.c Sun Aug 3 13:14:47 2003
@@ -140,7 +140,7 @@
pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val);
val |= PCI_ROM_ADDRESS_ENABLE;
pci_write_config_dword(dev, PCI_ROM_ADDRESS, val);
- printk("%s: enabling expansion ROM\n", dev->slot_name);
+ printk("%s: enabling expansion ROM\n", pci_name(dev));
}
}
@@ -191,7 +191,7 @@
* PCI device ID table
*/
-static struct pci_device_id mtd_pci_ids[] __devinitdata = {
+static struct pci_device_id mtd_pci_ids[] = {
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x530d,
@@ -306,7 +306,7 @@
goto release;
map->map = mtd_pci_map;
- map->map.name = dev->slot_name;
+ map->map.name = pci_name(dev);
map->dev = dev;
map->exit = info->exit;
map->translate = info->translate;
diff -Nru a/drivers/mtd/maps/scb2_flash.c b/drivers/mtd/maps/scb2_flash.c
--- a/drivers/mtd/maps/scb2_flash.c Sun Aug 3 13:14:49 2003
+++ b/drivers/mtd/maps/scb2_flash.c Sun Aug 3 13:14:49 2003
@@ -31,17 +31,17 @@
*
* The actual BIOS layout has been mostly reverse engineered. Intel BIOS
* updates for this board include 10 related (*.bio - &.bi9) binary files and
- * another seperate (*.bbo) binary file. The 10 files are 64k of data + a
+ * another separate (*.bbo) binary file. The 10 files are 64k of data + a
* small header. If the headers are stripped off, the 10 64k files can be
* concatenated into a 640k image. This is your BIOS image, proper. The
- * seperate .bbo file also has a small header. It is the 'Boot Block'
+ * separate .bbo file also has a small header. It is the 'Boot Block'
* recovery BIOS. Once the header is stripped, no further prep is needed.
* As best I can tell, the BIOS is arranged as such:
* offset 0x00000 to 0x4ffff (320k): unknown - SCSI BIOS, etc?
* offset 0x50000 to 0xeffff (640k): BIOS proper
* offset 0xf0000 ty 0xfffff (64k): Boot Block region
*
- * Intel's BIOS update program flashes the BIOS and Boot Block in seperate
+ * Intel's BIOS update program flashes the BIOS and Boot Block in separate
* steps. Probably a wise thing to do.
*/
@@ -218,7 +218,7 @@
pci_set_drvdata(dev, NULL);
}
-static struct pci_device_id scb2_flash_pci_ids[] __devinitdata = {
+static struct pci_device_id scb2_flash_pci_ids[] = {
{
.vendor = PCI_VENDOR_ID_SERVERWORKS,
.device = PCI_DEVICE_ID_SERVERWORKS_CSB5,
diff -Nru a/drivers/net/3c59x.c b/drivers/net/3c59x.c
--- a/drivers/net/3c59x.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/3c59x.c Sun Aug 3 13:14:44 2003
@@ -291,8 +291,6 @@
MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
-MODULE_PARM(global_enable_wol, "i");
-MODULE_PARM(enable_wol, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(rx_copybreak, "i");
MODULE_PARM(max_interrupt_work, "i");
MODULE_PARM(compaq_ioaddr, "i");
@@ -306,8 +304,6 @@
MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
-MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
-MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if options is unset");
MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
@@ -484,10 +480,8 @@
} vortex_info_tbl[] __devinitdata = {
{"3c590 Vortex 10Mbps",
PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
-#define EISA_3C592_OFFSET 1 /* Offset of this entry for vortex_eisa_init */
{"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
-#define EISA_3C597_OFFSET 2 /* Offset of this entry for vortex_eisa_init */
{"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
{"3c595 Vortex 100baseTx",
@@ -577,7 +571,7 @@
};
-static struct pci_device_id vortex_pci_tbl[] __devinitdata = {
+static struct pci_device_id vortex_pci_tbl[] = {
{ 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
{ 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
{ 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
@@ -819,7 +813,6 @@
flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
partner_flow_ctrl:1, /* Partner supports flow control */
has_nway:1,
- enable_wol:1, /* Wake-on-LAN is enabled */
pm_state_valid:1, /* power_state[] has sane contents */
open:1,
medialock:1,
@@ -915,10 +908,8 @@
static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
-static int enable_wol[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int global_options = -1;
static int global_full_duplex = -1;
-static int global_enable_wol = -1;
/* #define dev_alloc_skb dev_alloc_skb_debug */
@@ -960,8 +951,8 @@
#ifdef CONFIG_EISA
static struct eisa_device_id vortex_eisa_ids[] = {
- { "TCM5920", EISA_3C592_OFFSET },
- { "TCM5970", EISA_3C597_OFFSET },
+ { "TCM5920", CH_3C592 },
+ { "TCM5970", CH_3C597 },
{ "" }
};
@@ -1100,7 +1091,7 @@
if (gendev) {
if ((pdev = DEVICE_PCI(gendev))) {
- print_name = pdev->slot_name;
+ print_name = pci_name(pdev);
}
if ((edev = DEVICE_EISA(gendev))) {
@@ -1138,8 +1129,6 @@
vortex_debug = 7;
if (option & 0x4000)
vortex_debug = 2;
- if (option & 0x0400)
- vp->enable_wol = 1;
}
print_info = (vortex_debug > 1);
@@ -1227,16 +1216,12 @@
if (global_full_duplex > 0)
vp->full_duplex = 1;
- if (global_enable_wol > 0)
- vp->enable_wol = 1;
if (card_idx < MAX_UNITS) {
if (full_duplex[card_idx] > 0)
vp->full_duplex = 1;
if (flow_ctrl[card_idx] > 0)
vp->flow_ctrl = 1;
- if (enable_wol[card_idx] > 0)
- vp->enable_wol = 1;
}
vp->force_fd = vp->full_duplex;
@@ -1379,7 +1364,7 @@
} else
dev->if_port = vp->default_media;
- if ((vp->available_media & 0x4b) || (vci->drv_flags & HAS_NWAY) ||
+ if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
int phy, phy_idx = 0;
EL3WINDOW(4);
@@ -1463,7 +1448,7 @@
dev->set_multicast_list = set_rx_mode;
dev->tx_timeout = vortex_tx_timeout;
dev->watchdog_timeo = (watchdog * HZ) / 1000;
- if (pdev && vp->enable_wol) {
+ if (pdev) {
vp->pm_state_valid = 1;
pci_save_state(VORTEX_PCI(vp), vp->power_state);
acpi_set_WOL(dev);
@@ -1520,7 +1505,7 @@
unsigned int config;
int i;
- if (VORTEX_PCI(vp) && vp->enable_wol) {
+ if (VORTEX_PCI(vp)) {
pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
pci_restore_state(VORTEX_PCI(vp), vp->power_state);
}
@@ -2669,7 +2654,7 @@
if (vp->full_bus_master_tx)
outl(0, ioaddr + DownListPtr);
- if (VORTEX_PCI(vp) && vp->enable_wol) {
+ if (VORTEX_PCI(vp)) {
pci_save_state(VORTEX_PCI(vp), vp->power_state);
acpi_set_WOL(dev);
}
@@ -2845,7 +2830,7 @@
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
if (VORTEX_PCI(vp))
- strcpy(info.bus_info, VORTEX_PCI(vp)->slot_name);
+ strcpy(info.bus_info, pci_name(VORTEX_PCI(vp)));
else {
if (VORTEX_EISA(vp))
sprintf (info.bus_info, vp->gendev->bus_id);
@@ -3059,7 +3044,7 @@
/* Should really use issue_and_wait() here */
outw(TotalReset|0x14, dev->base_addr + EL3_CMD);
- if (VORTEX_PCI(vp) && vp->enable_wol) {
+ if (VORTEX_PCI(vp)) {
pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
if (vp->pm_state_valid)
pci_restore_state(VORTEX_PCI(vp), vp->power_state);
diff -Nru a/drivers/net/8139cp.c b/drivers/net/8139cp.c
--- a/drivers/net/8139cp.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/8139cp.c Sun Aug 3 13:14:48 2003
@@ -415,7 +415,7 @@
{ "RTL-8169" },
};
-static struct pci_device_id cp_pci_tbl[] __devinitdata = {
+static struct pci_device_id cp_pci_tbl[] = {
{ PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139Cp },
#if 0
@@ -1373,7 +1373,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
- strcpy (info.bus_info, cp->pdev->slot_name);
+ strcpy (info.bus_info, pci_name(cp->pdev));
info.regdump_len = CP_REGS_SIZE;
info.n_stats = CP_NUM_STATS;
if (copy_to_user (useraddr, &info, sizeof (info)))
@@ -1792,7 +1792,7 @@
if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev < 0x20) {
printk(KERN_ERR PFX "pci dev %s (id %04x:%04x rev %02x) is not an 8139C+ compatible chip\n",
- pdev->slot_name, pdev->vendor, pdev->device, pci_rev);
+ pci_name(pdev), pdev->vendor, pdev->device, pci_rev);
printk(KERN_ERR PFX "Try the \"8139too\" driver instead.\n");
return -ENODEV;
}
@@ -1828,20 +1828,20 @@
if (pdev->irq < 2) {
rc = -EIO;
printk(KERN_ERR PFX "invalid irq (%d) for pci dev %s\n",
- pdev->irq, pdev->slot_name);
+ pdev->irq, pci_name(pdev));
goto err_out_res;
}
pciaddr = pci_resource_start(pdev, 1);
if (!pciaddr) {
rc = -EIO;
printk(KERN_ERR PFX "no MMIO resource for pci dev %s\n",
- pdev->slot_name);
+ pci_name(pdev));
goto err_out_res;
}
if (pci_resource_len(pdev, 1) < CP_REGS_SIZE) {
rc = -EIO;
printk(KERN_ERR PFX "MMIO resource (%lx) too small on pci dev %s\n",
- pci_resource_len(pdev, 1), pdev->slot_name);
+ pci_resource_len(pdev, 1), pci_name(pdev));
goto err_out_res;
}
@@ -1862,7 +1862,7 @@
if (!regs) {
rc = -EIO;
printk(KERN_ERR PFX "Cannot map PCI MMIO (%lx@%lx) on pci dev %s\n",
- pci_resource_len(pdev, 1), pciaddr, pdev->slot_name);
+ pci_resource_len(pdev, 1), pciaddr, pci_name(pdev));
goto err_out_res;
}
dev->base_addr = (unsigned long) regs;
diff -Nru a/drivers/net/8139too.c b/drivers/net/8139too.c
--- a/drivers/net/8139too.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/8139too.c Sun Aug 3 13:14:44 2003
@@ -248,7 +248,7 @@
};
-static struct pci_device_id rtl8139_pci_tbl[] __devinitdata = {
+static struct pci_device_id rtl8139_pci_tbl[] = {
{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139_CB },
{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMC1211TX },
@@ -765,7 +765,7 @@
/* dev and dev->priv zeroed in alloc_etherdev */
dev = alloc_etherdev (sizeof (*tp));
if (dev == NULL) {
- printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pdev->slot_name);
+ printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pci_name(pdev));
return -ENOMEM;
}
SET_MODULE_OWNER(dev);
@@ -797,25 +797,25 @@
#ifdef USE_IO_OPS
/* make sure PCI base addr 0 is PIO */
if (!(pio_flags & IORESOURCE_IO)) {
- printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pdev->slot_name);
+ printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pci_name(pdev));
rc = -ENODEV;
goto err_out;
}
/* check for weird/broken PCI region reporting */
if (pio_len < RTL_MIN_IO_SIZE) {
- printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pdev->slot_name);
+ printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pci_name(pdev));
rc = -ENODEV;
goto err_out;
}
#else
/* make sure PCI base addr 1 is MMIO */
if (!(mmio_flags & IORESOURCE_MEM)) {
- printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pdev->slot_name);
+ printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pci_name(pdev));
rc = -ENODEV;
goto err_out;
}
if (mmio_len < RTL_MIN_IO_SIZE) {
- printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pdev->slot_name);
+ printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pci_name(pdev));
rc = -ENODEV;
goto err_out;
}
@@ -837,7 +837,7 @@
/* ioremap MMIO region */
ioaddr = ioremap (mmio_start, mmio_len);
if (ioaddr == NULL) {
- printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pdev->slot_name);
+ printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev));
rc = -EIO;
goto err_out;
}
@@ -852,7 +852,7 @@
/* check for missing/broken hardware */
if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
printk (KERN_ERR PFX "%s: Chip not responding, ignoring board\n",
- pdev->slot_name);
+ pci_name(pdev));
rc = -EIO;
goto err_out;
}
@@ -867,8 +867,8 @@
/* if unknown chip, assume array element #0, original RTL-8139 in this case */
printk (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n",
- pdev->slot_name);
- printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pdev->slot_name, RTL_R32 (TxConfig));
+ pci_name(pdev));
+ printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pci_name(pdev), RTL_R32 (TxConfig));
tp->chipset = 0;
match:
@@ -943,7 +943,7 @@
if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
printk(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
- pdev->slot_name, pdev->vendor, pdev->device, pci_rev);
+ pci_name(pdev), pdev->vendor, pdev->device, pci_rev);
printk(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n");
}
@@ -2260,7 +2260,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
- strcpy (info.bus_info, np->pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(np->pci_dev));
info.regdump_len = np->regs_len;
if (copy_to_user (useraddr, &info, sizeof (info)))
return -EFAULT;
diff -Nru a/drivers/net/Kconfig b/drivers/net/Kconfig
--- a/drivers/net/Kconfig Sun Aug 3 13:14:52 2003
+++ b/drivers/net/Kconfig Sun Aug 3 13:14:52 2003
@@ -2043,32 +2043,204 @@
recommended. The module will be called r8169.
config SK98LIN
- tristate "SysKonnect SK-98xx support"
+ tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support"
depends on PCI
---help---
- Say Y here if you have a SysKonnect SK-98xx Gigabit Ethernet Server
- Adapter. The following adapters are supported by this driver:
- - SK-9841 (single link 1000Base-LX)
- - SK-9842 (dual link 1000Base-LX)
- - SK-9843 (single link 1000Base-SX)
- - SK-9844 (dual link 1000Base-SX)
- - SK-9821 (single link 1000Base-T)
- - SK-9822 (dual link 1000Base-T)
- - SK-9861 (single link Volition connector)
- - SK-9862 (dual link Volition connector)
- The driver also supports the following adapters from Allied Telesyn:
- - AT2970...
-
- The dual link adapters support a link-failover feature. Read
- <file:Documentation/networking/sk98lin.txt> for information about
+ Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
+ compliant Gigabit Ethernet Adapter. The following adapters are supported
+ by this driver:
+ - 3Com 3C940 Gigabit LOM Ethernet Adapter
+ - 3Com 3C941 Gigabit LOM Ethernet Adapter
+ - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
+ - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
+ - DGE-530T Gigabit Ethernet Adapter
+ - EG1032 v2 Instant Gigabit Network Adapter
+ - EG1064 v2 Instant Gigabit Network Adapter
+ - Marvell RDK-8001 Adapter
+ - Marvell RDK-8002 Adapter
+ - Marvell RDK-8003 Adapter
+ - Marvell RDK-8004 Adapter
+ - Marvell RDK-8006 Adapter
+ - Marvell RDK-8007 Adapter
+ - Marvell RDK-8008 Adapter
+ - Marvell RDK-8009 Adapter
+ - Marvell RDK-8011 Adapter
+ - Marvell RDK-8012 Adapter
+ - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter
+ - SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
+ - SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
+ - SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
+ - SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
+ - SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
+ - SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
+ - SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
+ - SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
+ - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
+ - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
+ - SK-9521 V2.0 10/100/1000Base-T Adapter
+ - SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
+ - SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
+ - SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
+ - SK-9521 10/100/1000Base-T Adapter
+
+ The adapters support Jumbo Frames.
+ The dual link adapters support link-failover and dual port features.
+ Both Marvell Yukon and SysKonnect SK-98xx/SK-95xx adapters support
+ the scatter-gather functionality with sendfile(). Please refer to
+ Documentation/networking/sk98lin.txt for more information about
optional driver parameters.
Questions concerning this driver may be addressed to:
- linux@syskonnect.de
-
+ linux@syskonnect.de
+
If you want to compile this driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
- say M here and read <file:Documentation/modules.txt>. This is
- recommended. The module will be called sk98lin.
+ say M here and read Documentation/modules.txt. This is recommended.
+ The module will be called sk98lin.o.
+
+config CONFIG_SK98LIN_T1
+ bool "3Com 3C940/3C941 Gigabit Ethernet Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - 3Com 3C940 Gigabit LOM Ethernet Adapter
+ - 3Com 3C941 Gigabit LOM Ethernet Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T2
+ bool "Allied Telesyn AT-29xx Gigabit Ethernet Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T3
+ bool "CNet N-Way Gigabit Ethernet Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T4
+ bool "D-Link DGE-530T Gigabit Ethernet Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - DGE-530T Gigabit Ethernet Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T5
+ bool "Linksys EG10xx Ethernet Server Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - EG1032 v2 Instant Gigabit Network Adapter
+ - EG1064 v2 Instant Gigabit Network Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T6
+ bool "Marvell RDK-80xx Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - Marvell RDK-8001 Adapter
+ - Marvell RDK-8002 Adapter
+ - Marvell RDK-8003 Adapter
+ - Marvell RDK-8004 Adapter
+ - Marvell RDK-8006 Adapter
+ - Marvell RDK-8007 Adapter
+ - Marvell RDK-8008 Adapter
+ - Marvell RDK-8009 Adapter
+ - Marvell RDK-8011 Adapter
+ - Marvell RDK-8012 Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T7
+ bool "Marvell Yukon Gigabit Ethernet Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T8
+ bool "SysKonnect SK-98xx Server Gigabit Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
+ - SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
+ - SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
+ - SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
+ - SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
+ - SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
+ - SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
+ - SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
+ - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
+ - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+config CONFIG_SK98LIN_T9
+ bool "SysKonnect SK-98xx V2.0 Gigabit Ethernet Adapter"
+ depends on SK98LIN
+ help
+ This driver supports:
+
+ - SK-9521 V2.0 10/100/1000Base-T Adapter
+ - SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
+ - SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
+ - SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
+ - SK-9521 10/100/1000Base-T Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+
config TIGON3
tristate "Broadcom Tigon3 support"
diff -Nru a/drivers/net/acenic.c b/drivers/net/acenic.c
--- a/drivers/net/acenic.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/acenic.c Sun Aug 3 13:14:48 2003
@@ -132,7 +132,7 @@
#endif
#if LINUX_VERSION_CODE >= 0x20400
-static struct pci_device_id acenic_pci_tbl[] __initdata = {
+static struct pci_device_id acenic_pci_tbl[] = {
{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
@@ -3088,7 +3088,7 @@
tigonFwReleaseFix);
strncpy(info.version, version, sizeof(info.version) - 1);
if (ap && ap->pdev)
- strcpy(info.bus_info, ap->pdev->slot_name);
+ strcpy(info.bus_info, pci_name(ap->pdev));
if (copy_to_user(ifr->ifr_data, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/net/amd8111e.c b/drivers/net/amd8111e.c
--- a/drivers/net/amd8111e.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/amd8111e.c Sun Aug 3 13:14:49 2003
@@ -102,7 +102,7 @@
MODULE_PARM(dynamic_ipg, "1-" __MODULE_STRING(MAX_UNITS) "i");
MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: Disable");
-static struct pci_device_id amd8111e_pci_tbl[] __devinitdata = {
+static struct pci_device_id amd8111e_pci_tbl[] = {
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
@@ -1405,7 +1405,7 @@
strcpy (info.version, MODULE_VERSION);
memset(&info.fw_version, 0, sizeof(info.fw_version));
sprintf(info.fw_version,"%u",chip_version);
- strcpy (info.bus_info, pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(pci_dev));
info.eedump_len = 0;
info.regdump_len = AMD8111E_REG_DUMP_LEN;
if (copy_to_user (useraddr, &info, sizeof(info)))
diff -Nru a/drivers/net/arcnet/com20020-isa.c b/drivers/net/arcnet/com20020-isa.c
--- a/drivers/net/arcnet/com20020-isa.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/arcnet/com20020-isa.c Sun Aug 3 13:14:45 2003
@@ -152,7 +152,7 @@
lp->clockp = clockp & 7;
lp->clockm = clockm & 3;
lp->timeout = timeout & 3;
- lp->owner = THIS_MODULE;
+ lp->hw.owner = THIS_MODULE;
dev->base_addr = io;
dev->irq = irq;
diff -Nru a/drivers/net/arcnet/com20020-pci.c b/drivers/net/arcnet/com20020-pci.c
--- a/drivers/net/arcnet/com20020-pci.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/arcnet/com20020-pci.c Sun Aug 3 13:14:46 2003
@@ -139,7 +139,7 @@
com20020_remove(pci_get_drvdata(pdev));
}
-static struct pci_device_id com20020pci_id_table[] __devinitdata = {
+static struct pci_device_id com20020pci_id_table[] = {
{ 0x1571, 0xa001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0x1571, 0xa002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0x1571, 0xa003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
diff -Nru a/drivers/net/arcnet/rfc1201.c b/drivers/net/arcnet/rfc1201.c
--- a/drivers/net/arcnet/rfc1201.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/arcnet/rfc1201.c Sun Aug 3 13:14:48 2003
@@ -30,6 +30,7 @@
#include <linux/skbuff.h>
#include <linux/arcdevice.h>
+MODULE_LICENSE("GPL");
#define VERSION "arcnet: RFC1201 \"standard\" (`a') encapsulation support loaded.\n"
diff -Nru a/drivers/net/b44.c b/drivers/net/b44.c
--- a/drivers/net/b44.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/b44.c Sun Aug 3 13:14:47 2003
@@ -89,7 +89,7 @@
#define irqreturn_t void
#endif
-static struct pci_device_id b44_pci_tbl[] __devinitdata = {
+static struct pci_device_id b44_pci_tbl[] = {
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4401,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ } /* terminate list with empty entry */
@@ -1393,7 +1393,7 @@
strcpy (info.driver, DRV_MODULE_NAME);
strcpy (info.version, DRV_MODULE_VERSION);
memset(&info.fw_version, 0, sizeof(info.fw_version));
- strcpy (info.bus_info, pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(pci_dev));
info.eedump_len = 0;
info.regdump_len = 0;
if (copy_to_user (useraddr, &info, sizeof (info)))
diff -Nru a/drivers/net/defxx.c b/drivers/net/defxx.c
--- a/drivers/net/defxx.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/defxx.c Sun Aug 3 13:14:44 2003
@@ -3352,7 +3352,7 @@
pci_set_drvdata(pdev, NULL);
}
-static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
+static struct pci_device_id dfx_pci_tbl[] = {
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, }
};
diff -Nru a/drivers/net/dl2k.c b/drivers/net/dl2k.c
--- a/drivers/net/dl2k.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/dl2k.c Sun Aug 3 13:14:47 2003
@@ -1201,7 +1201,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy(info.driver, "DL2K");
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, np->pdev->slot_name);
+ strcpy(info.bus_info, pci_name(np->pdev));
memset(&info.fw_version, 0, sizeof(info.fw_version));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
diff -Nru a/drivers/net/dl2k.h b/drivers/net/dl2k.h
--- a/drivers/net/dl2k.h Sun Aug 3 13:14:52 2003
+++ b/drivers/net/dl2k.h Sun Aug 3 13:14:52 2003
@@ -695,7 +695,7 @@
class_mask of the class are honored during the comparison.
driver_data Data private to the driver.
*/
-static struct pci_device_id rio_pci_tbl[] __devinitdata = {
+static struct pci_device_id rio_pci_tbl[] = {
{0x1186, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0,}
};
diff -Nru a/drivers/net/e100/e100_main.c b/drivers/net/e100/e100_main.c
--- a/drivers/net/e100/e100_main.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/e100/e100_main.c Sun Aug 3 13:14:48 2003
@@ -759,7 +759,7 @@
--e100nics;
}
-static struct pci_device_id e100_id_table[] __devinitdata = {
+static struct pci_device_id e100_id_table[] = {
{0x8086, 0x1229, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
{0x8086, 0x2449, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
{0x8086, 0x1059, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
@@ -3592,7 +3592,7 @@
strncpy(info.version, e100_driver_version, sizeof (info.version) - 1);
strncpy(info.fw_version, "N/A",
sizeof (info.fw_version) - 1);
- strncpy(info.bus_info, bdp->pdev->slot_name,
+ strncpy(info.bus_info, pci_name(bdp->pdev),
sizeof (info.bus_info) - 1);
info.n_stats = E100_STATS_LEN;
info.regdump_len = E100_REGS_LEN * sizeof(u32);
diff -Nru a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c
--- a/drivers/net/e1000/e1000_ethtool.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/e1000/e1000_ethtool.c Sun Aug 3 13:14:48 2003
@@ -197,7 +197,7 @@
strncpy(drvinfo->driver, e1000_driver_name, 32);
strncpy(drvinfo->version, e1000_driver_version, 32);
strncpy(drvinfo->fw_version, "N/A", 32);
- strncpy(drvinfo->bus_info, adapter->pdev->slot_name, 32);
+ strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
drvinfo->n_stats = E1000_STATS_LEN;
drvinfo->testinfo_len = E1000_TEST_LEN;
#define E1000_REGS_LEN 32
diff -Nru a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
--- a/drivers/net/e1000/e1000_main.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/e1000/e1000_main.c Sun Aug 3 13:14:47 2003
@@ -61,7 +61,7 @@
* { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
* Class, Class Mask, private data (not used) }
*/
-static struct pci_device_id e1000_pci_tbl[] __devinitdata = {
+static struct pci_device_id e1000_pci_tbl[] = {
{0x8086, 0x1000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0x8086, 0x1001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0x8086, 0x1004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
diff -Nru a/drivers/net/eepro.c b/drivers/net/eepro.c
--- a/drivers/net/eepro.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/eepro.c Sun Aug 3 13:14:50 2003
@@ -819,7 +819,7 @@
}
}
if (dev->irq < 2) {
- printk(KERN_ERR " Duh! illegal interrupt vector stored in EEPROM.\n");
+ printk(KERN_ERR " Duh! invalid interrupt vector stored in EEPROM.\n");
retval = -ENODEV;
goto freeall;
} else
diff -Nru a/drivers/net/eepro100.c b/drivers/net/eepro100.c
--- a/drivers/net/eepro100.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/eepro100.c Sun Aug 3 13:14:50 2003
@@ -2007,7 +2007,7 @@
strncpy(info.driver, "eepro100", sizeof(info.driver)-1);
strncpy(info.version, version, sizeof(info.version)-1);
if (sp && sp->pdev)
- strcpy(info.bus_info, sp->pdev->slot_name);
+ strcpy(info.bus_info, pci_name(sp->pdev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -2381,7 +2381,7 @@
kfree(dev);
}
-static struct pci_device_id eepro100_pci_tbl[] __devinitdata = {
+static struct pci_device_id eepro100_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82557,
PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82559ER,
diff -Nru a/drivers/net/epic100.c b/drivers/net/epic100.c
--- a/drivers/net/epic100.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/epic100.c Sun Aug 3 13:14:48 2003
@@ -242,7 +242,7 @@
};
-static struct pci_device_id epic_pci_tbl[] __devinitdata = {
+static struct pci_device_id epic_pci_tbl[] = {
{ 0x10B8, 0x0005, 0x1092, 0x0AB4, 0, 0, SMSC_83C170_0 },
{ 0x10B8, 0x0005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMSC_83C170 },
{ 0x10B8, 0x0006, PCI_ANY_ID, PCI_ANY_ID,
@@ -479,7 +479,7 @@
if (debug > 2) {
printk(KERN_DEBUG DRV_NAME "(%s): EEPROM contents\n",
- pdev->slot_name);
+ pci_name(pdev));
for (i = 0; i < 64; i++)
printk(" %4.4x%s", read_eeprom(ioaddr, i),
i % 16 == 15 ? "\n" : "");
@@ -500,7 +500,7 @@
ep->phys[phy_idx++] = phy;
printk(KERN_INFO DRV_NAME "(%s): MII transceiver #%d control "
"%4.4x status %4.4x.\n",
- pdev->slot_name, phy, mdio_read(dev, phy, 0), mii_status);
+ pci_name(pdev), phy, mdio_read(dev, phy, 0), mii_status);
}
}
ep->mii_phy_cnt = phy_idx;
@@ -509,10 +509,10 @@
ep->mii.advertising = mdio_read(dev, phy, MII_ADVERTISE);
printk(KERN_INFO DRV_NAME "(%s): Autonegotiation advertising %4.4x link "
"partner %4.4x.\n",
- pdev->slot_name, ep->mii.advertising, mdio_read(dev, phy, 5));
+ pci_name(pdev), ep->mii.advertising, mdio_read(dev, phy, 5));
} else if ( ! (ep->chip_flags & NO_MII)) {
printk(KERN_WARNING DRV_NAME "(%s): ***WARNING***: No MII transceiver found!\n",
- pdev->slot_name);
+ pci_name(pdev));
/* Use the known PHY address of the EPII. */
ep->phys[0] = 3;
}
@@ -528,7 +528,7 @@
if (duplex) {
ep->mii.force_media = ep->mii.full_duplex = 1;
printk(KERN_INFO DRV_NAME "(%s): Forced full duplex operation requested.\n",
- pdev->slot_name);
+ pci_name(pdev));
}
dev->if_port = ep->default_port = option;
@@ -1374,7 +1374,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
- strcpy (info.bus_info, np->pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(np->pci_dev));
if (copy_to_user (useraddr, &info, sizeof (info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/net/fealnx.c b/drivers/net/fealnx.c
--- a/drivers/net/fealnx.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/fealnx.c Sun Aug 3 13:14:50 2003
@@ -1773,7 +1773,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
- strcpy (info.bus_info, np->pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(np->pci_dev));
if (copy_to_user (useraddr, &info, sizeof (info)))
return -EFAULT;
return 0;
@@ -1905,7 +1905,7 @@
return 0;
}
-static struct pci_device_id fealnx_pci_tbl[] __devinitdata = {
+static struct pci_device_id fealnx_pci_tbl[] = {
{0x1516, 0x0800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0x1516, 0x0803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{0x1516, 0x0891, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
diff -Nru a/drivers/net/hamachi.c b/drivers/net/hamachi.c
--- a/drivers/net/hamachi.c Sun Aug 3 13:14:53 2003
+++ b/drivers/net/hamachi.c Sun Aug 3 13:14:53 2003
@@ -1872,7 +1872,7 @@
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, np->pci_dev->slot_name);
+ strcpy(info.bus_info, pci_name(np->pci_dev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -1982,7 +1982,7 @@
}
}
-static struct pci_device_id hamachi_pci_tbl[] __initdata = {
+static struct pci_device_id hamachi_pci_tbl[] = {
{ 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, }
};
diff -Nru a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c
--- a/drivers/net/hamradio/6pack.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/hamradio/6pack.c Sun Aug 3 13:14:46 2003
@@ -67,11 +67,11 @@
#define SIXP_DAMA_OFF 0
/* default level 2 parameters */
-#define SIXP_TXDELAY 25 /* in 10 ms */
+#define SIXP_TXDELAY (HZ/4) /* in 1 s */
#define SIXP_PERSIST 50 /* in 256ths */
-#define SIXP_SLOTTIME 10 /* in 10 ms */
-#define SIXP_INIT_RESYNC_TIMEOUT 150 /* in 10 ms */
-#define SIXP_RESYNC_TIMEOUT 500 /* in 10 ms */
+#define SIXP_SLOTTIME (HZ/10) /* in 1 s */
+#define SIXP_INIT_RESYNC_TIMEOUT (3*HZ/2) /* in 1 s */
+#define SIXP_RESYNC_TIMEOUT 5*HZ /* in 1 s */
/* 6pack configuration. */
#define SIXP_NRUNIT 31 /* MAX number of 6pack channels */
diff -Nru a/drivers/net/ioc3-eth.c b/drivers/net/ioc3-eth.c
--- a/drivers/net/ioc3-eth.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/ioc3-eth.c Sun Aug 3 13:14:45 2003
@@ -1453,7 +1453,7 @@
ioc3 = (struct ioc3 *) ioremap(ioc3_base, ioc3_size);
if (!ioc3) {
printk(KERN_CRIT "ioc3eth(%s): ioremap failed, goodbye.\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -ENOMEM;
goto out_res;
}
@@ -1473,7 +1473,7 @@
if (ip->phy == -1) {
printk(KERN_CRIT "ioc3-eth(%s): Didn't find a PHY, goodbye.\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -ENODEV;
goto out_stop;
}
@@ -1528,7 +1528,7 @@
kfree(dev);
}
-static struct pci_device_id ioc3_pci_tbl[] __devinitdata = {
+static struct pci_device_id ioc3_pci_tbl[] = {
{ PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID },
{ 0 }
};
diff -Nru a/drivers/net/irda/donauboe.c b/drivers/net/irda/donauboe.c
--- a/drivers/net/irda/donauboe.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/irda/donauboe.c Sun Aug 3 13:14:47 2003
@@ -189,7 +189,7 @@
#define CONFIG0H_DMA_ON_NORX CONFIG0H_DMA_OFF| OBOE_CONFIG0H_ENDMAC
#define CONFIG0H_DMA_ON CONFIG0H_DMA_ON_NORX | OBOE_CONFIG0H_ENRX
-static struct pci_device_id toshoboe_pci_tbl[] __initdata = {
+static struct pci_device_id toshoboe_pci_tbl[] = {
{ PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_FIR701, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_FIRD01, PCI_ANY_ID, PCI_ANY_ID, },
{ } /* Terminating entry */
diff -Nru a/drivers/net/irda/toshoboe.c b/drivers/net/irda/toshoboe.c
--- a/drivers/net/irda/toshoboe.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/irda/toshoboe.c Sun Aug 3 13:14:44 2003
@@ -77,7 +77,7 @@
#define PCI_DEVICE_ID_FIR701b 0x0d01
-static struct pci_device_id toshoboe_pci_tbl[] __initdata = {
+static struct pci_device_id toshoboe_pci_tbl[] = {
{ PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_FIR701, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_FIR701b, PCI_ANY_ID, PCI_ANY_ID, },
{ } /* Terminating entry */
diff -Nru a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c
--- a/drivers/net/irda/vlsi_ir.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/irda/vlsi_ir.c Sun Aug 3 13:14:44 2003
@@ -57,7 +57,7 @@
#define PCI_CLASS_WIRELESS_IRDA 0x0d00
-static struct pci_device_id vlsi_irda_table [] __devinitdata = { {
+static struct pci_device_id vlsi_irda_table [] = { {
.class = PCI_CLASS_WIRELESS_IRDA << 8,
.vendor = PCI_VENDOR_ID_VLSI,
diff -Nru a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c
--- a/drivers/net/ixgb/ixgb_ethtool.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/ixgb/ixgb_ethtool.c Sun Aug 3 13:14:52 2003
@@ -119,7 +119,7 @@
strncpy(drvinfo->driver, ixgb_driver_name, 32);
strncpy(drvinfo->version, ixgb_driver_version, 32);
strncpy(drvinfo->fw_version, "", 32);
- strncpy(drvinfo->bus_info, adapter->pdev->slot_name, 32);
+ strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
#ifdef ETHTOOL_GREGS
drvinfo->regdump_len = IXGB_REG_DUMP_LEN;
#endif /* ETHTOOL_GREGS */
diff -Nru a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
--- a/drivers/net/ixgb/ixgb_main.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/ixgb/ixgb_main.c Sun Aug 3 13:14:46 2003
@@ -44,7 +44,7 @@
* { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
* Class, Class Mask, String Index }
*/
-static struct pci_device_id ixgb_pci_tbl[] __devinitdata = {
+static struct pci_device_id ixgb_pci_tbl[] = {
/* Intel(R) PRO/10GbE Network Connection */
{INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
INTEL_SUBVENDOR_ID, IXGB_SUBDEVICE_ID_A11F, 0, 0, 0},
diff -Nru a/drivers/net/natsemi.c b/drivers/net/natsemi.c
--- a/drivers/net/natsemi.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/natsemi.c Sun Aug 3 13:14:45 2003
@@ -366,7 +366,7 @@
{ "NatSemi DP8381[56]", PCI_IOTYPE },
};
-static struct pci_device_id natsemi_pci_tbl[] __devinitdata = {
+static struct pci_device_id natsemi_pci_tbl[] = {
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, },
};
@@ -1967,7 +1967,7 @@
strncpy(info.driver, DRV_NAME, ETHTOOL_BUSINFO_LEN);
strncpy(info.version, DRV_VERSION, ETHTOOL_BUSINFO_LEN);
info.fw_version[0] = '\0';
- strncpy(info.bus_info, np->pci_dev->slot_name,
+ strncpy(info.bus_info, pci_name(np->pci_dev),
ETHTOOL_BUSINFO_LEN);
info.eedump_len = NATSEMI_EEPROM_SIZE;
info.regdump_len = NATSEMI_REGS_SIZE;
diff -Nru a/drivers/net/ne2k-pci.c b/drivers/net/ne2k-pci.c
--- a/drivers/net/ne2k-pci.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/ne2k-pci.c Sun Aug 3 13:14:46 2003
@@ -136,7 +136,7 @@
};
-static struct pci_device_id ne2k_pci_tbl[] __devinitdata = {
+static struct pci_device_id ne2k_pci_tbl[] = {
{ 0x10ec, 0x8029, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RealTek_RTL_8029 },
{ 0x1050, 0x0940, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940 },
{ 0x11f6, 0x1401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Compex_RL2000 },
@@ -334,7 +334,7 @@
/* Allocate dev->priv and fill in 8390 specific dev fields. */
if (ethdev_init(dev)) {
printk (KERN_ERR "ne2kpci(%s): unable to get memory for dev->priv.\n",
- pdev->slot_name);
+ pci_name(pdev));
goto err_out_free_netdev;
}
@@ -605,7 +605,7 @@
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, pci_dev->slot_name);
+ strcpy(info.bus_info, pci_name(pci_dev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/net/ns83820.c b/drivers/net/ns83820.c
--- a/drivers/net/ns83820.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/ns83820.c Sun Aug 3 13:14:52 2003
@@ -1186,7 +1186,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy(info.driver, "ns83820");
strcpy(info.version, VERSION);
- strcpy(info.bus_info, dev->pci_dev->slot_name);
+ strcpy(info.bus_info, pci_name(dev->pci_dev));
if (copy_to_user(useraddr, &info, sizeof (info)))
return -EFAULT;
return 0;
@@ -2061,7 +2061,7 @@
pci_set_drvdata(pci_dev, NULL);
}
-static struct pci_device_id ns83820_pci_tbl[] __devinitdata = {
+static struct pci_device_id ns83820_pci_tbl[] = {
{ 0x100b, 0x0022, PCI_ANY_ID, PCI_ANY_ID, 0, .driver_data = 0, },
{ 0, },
};
diff -Nru a/drivers/net/pci-skeleton.c b/drivers/net/pci-skeleton.c
--- a/drivers/net/pci-skeleton.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/pci-skeleton.c Sun Aug 3 13:14:44 2003
@@ -212,7 +212,7 @@
};
-static struct pci_device_id netdrv_pci_tbl[] __devinitdata = {
+static struct pci_device_id netdrv_pci_tbl[] = {
{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NETDRV_CB },
{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMC1211TX },
@@ -704,8 +704,8 @@
/* if unknown chip, assume array element #0, original RTL-8139 in this case */
printk (KERN_DEBUG PFX "PCI device %s: unknown chip version, assuming RTL-8139\n",
- pdev->slot_name);
- printk (KERN_DEBUG PFX "PCI device %s: TxConfig = 0x%lx\n", pdev->slot_name, NETDRV_R32 (TxConfig));
+ pci_name(pdev));
+ printk (KERN_DEBUG PFX "PCI device %s: TxConfig = 0x%lx\n", pci_name(pdev), NETDRV_R32 (TxConfig));
tp->chipset = 0;
match:
diff -Nru a/drivers/net/pcmcia/com20020_cs.c b/drivers/net/pcmcia/com20020_cs.c
--- a/drivers/net/pcmcia/com20020_cs.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/pcmcia/com20020_cs.c Sun Aug 3 13:14:48 2003
@@ -171,14 +171,6 @@
======================================================================*/
-static void com20020cs_open_close(struct net_device *dev, bool open)
-{
- if (open)
- MOD_INC_USE_COUNT;
- else
- MOD_DEC_USE_COUNT;
-}
-
static dev_link_t *com20020_attach(void)
{
client_reg_t client_reg;
@@ -237,7 +229,7 @@
lp->backplane = backplane;
lp->clockp = clockp;
lp->clockm = clockm & 3;
- lp->hw.open_close_ll = com20020cs_open_close;
+ lp->hw.owner = THIS_MODULE;
link->irq.Instance = info->dev = dev;
link->priv = info;
diff -Nru a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
--- a/drivers/net/pcnet32.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/pcnet32.c Sun Aug 3 13:14:46 2003
@@ -55,7 +55,7 @@
/*
* PCI device identifiers for "new style" Linux PCI Device Drivers
*/
-static struct pci_device_id pcnet32_pci_tbl[] __devinitdata = {
+static struct pci_device_id pcnet32_pci_tbl[] = {
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0, }
@@ -1588,7 +1588,7 @@
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
if (lp->pci_dev)
- strcpy (info.bus_info, lp->pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(lp->pci_dev));
else
sprintf(info.bus_info, "VLB 0x%lx", dev->base_addr);
if (copy_to_user (useraddr, &info, sizeof (info)))
diff -Nru a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c
--- a/drivers/net/ppp_async.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/ppp_async.c Sun Aug 3 13:14:50 2003
@@ -891,6 +891,11 @@
process_input_packet(ap);
} else if (c == PPP_ESCAPE) {
ap->state |= SC_ESCAPE;
+ } else if (I_IXON(ap->tty)) {
+ if (c == START_CHAR(ap->tty))
+ start_tty(ap->tty);
+ else if (c == STOP_CHAR(ap->tty))
+ stop_tty(ap->tty);
}
/* otherwise it's a char in the recv ACCM */
++n;
diff -Nru a/drivers/net/r8169.c b/drivers/net/r8169.c
--- a/drivers/net/r8169.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/r8169.c Sun Aug 3 13:14:48 2003
@@ -107,7 +107,7 @@
{
"RealTek RTL8169 Gigabit Ethernet"},};
-static struct pci_device_id rtl8169_pci_tbl[] __devinitdata = {
+static struct pci_device_id rtl8169_pci_tbl[] = {
{0x10ec, 0x8169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0,},
};
@@ -437,9 +437,9 @@
//if unknown chip, assume array element #0, original RTL-8169 in this case
printk(KERN_DEBUG PFX
"PCI device %s: unknown chip version, assuming RTL-8169\n",
- pdev->slot_name);
+ pci_name(pdev));
printk(KERN_DEBUG PFX "PCI device %s: TxConfig = 0x%lx\n",
- pdev->slot_name, (unsigned long) RTL_R32(TxConfig));
+ pci_name(pdev), (unsigned long) RTL_R32(TxConfig));
tp->chipset = 0;
match:
diff -Nru a/drivers/net/rcpci45.c b/drivers/net/rcpci45.c
--- a/drivers/net/rcpci45.c Sun Aug 3 13:14:51 2003
+++ b/drivers/net/rcpci45.c Sun Aug 3 13:14:51 2003
@@ -118,7 +118,7 @@
static void RCreboot_callback (U32, U32, U32, struct net_device *);
static int RC_allocate_and_post_buffers (struct net_device *, int);
-static struct pci_device_id rcpci45_pci_table[] __devinitdata = {
+static struct pci_device_id rcpci45_pci_table[] = {
{ PCI_VENDOR_ID_REDCREEK, PCI_DEVICE_ID_RC45, PCI_ANY_ID, PCI_ANY_ID,},
{}
};
diff -Nru a/drivers/net/rrunner.c b/drivers/net/rrunner.c
--- a/drivers/net/rrunner.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/rrunner.c Sun Aug 3 13:14:46 2003
@@ -1716,7 +1716,7 @@
}
}
-static struct pci_device_id rr_pci_tbl[] __devinitdata = {
+static struct pci_device_id rr_pci_tbl[] = {
{ PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
PCI_ANY_ID, PCI_ANY_ID, },
{ 0,}
diff -Nru a/drivers/net/sis900.c b/drivers/net/sis900.c
--- a/drivers/net/sis900.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/sis900.c Sun Aug 3 13:14:47 2003
@@ -97,7 +97,7 @@
"SiS 900 PCI Fast Ethernet",
"SiS 7016 PCI Fast Ethernet"
};
-static struct pci_device_id sis900_pci_tbl [] __devinitdata = {
+static struct pci_device_id sis900_pci_tbl [] = {
{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
@@ -1874,7 +1874,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, SIS900_MODULE_NAME);
strcpy (info.version, SIS900_DRV_VERSION);
- strcpy (info.bus_info, sis_priv->pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(sis_priv->pci_dev));
if (copy_to_user (useraddr, &info, sizeof (info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/net/sk98lin/Makefile b/drivers/net/sk98lin/Makefile
--- a/drivers/net/sk98lin/Makefile Sun Aug 3 13:14:44 2003
+++ b/drivers/net/sk98lin/Makefile Sun Aug 3 13:14:44 2003
@@ -2,11 +2,32 @@
# Makefile for the SysKonnect SK-98xx device driver.
#
-obj-$(CONFIG_SK98LIN) += sk98lin.o
-sk98lin-objs := skge.o skaddr.o skgehwt.o skgeinit.o skgepnmi.o skgesirq.o \
- ski2c.o sklm80.o skqueue.o skrlmt.o sktimer.o skvpd.o \
- skxmac2.o skproc.o skcsum.o
+#
+# Standalone driver params
+# SKPARAM += -DSK_KERNEL_24
+# SKPARAM += -DSK_KERNEL_24_26
+# SKPARAM += -DSK_KERNEL_26
+# SKPARAM += -DSK_KERNEL_22_24
+
+obj-$(CONFIG_SK98LIN) += sk98lin.o
+sk98lin-objs := \
+ skge.o \
+ skdim.o \
+ skaddr.o \
+ skgehwt.o \
+ skgeinit.o \
+ skgepnmi.o \
+ skgesirq.o \
+ ski2c.o \
+ sklm80.o \
+ skqueue.o \
+ skrlmt.o \
+ sktimer.o \
+ skvpd.o \
+ skxmac2.o \
+ skproc.o \
+ skcsum.o
# DBGDEF = \
# -DDEBUG
@@ -55,4 +76,13 @@
# SK_DBGCAT_DRV_INT_SRC 0x04000000 interrupts sources
# SK_DBGCAT_DRV_EVENT 0x08000000 driver events
-EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_USE_CSUM $(DBGDEF)
+EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_USE_CSUM -DGENESIS -DYUKON $(DBGDEF) $(SKPARAM)
+
+clean:
+ rm -f core *.o *.a *.s
+
+
+
+
+
+
diff -Nru a/drivers/net/sk98lin/h/lm80.h b/drivers/net/sk98lin/h/lm80.h
--- a/drivers/net/sk98lin/h/lm80.h Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sk98lin/h/lm80.h Sun Aug 3 13:14:52 2003
@@ -1,9 +1,9 @@
/******************************************************************************
*
* Name: lm80.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.3 $
- * Date: $Date: 1999/11/22 13:41:19 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.6 $
+ * Date: $Date: 2003/05/13 17:26:52 $
* Purpose: Contains all defines for the LM80 Chip
* (National Semiconductor).
*
@@ -11,8 +11,8 @@
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +27,16 @@
*
* History:
* $Log: lm80.h,v $
+ * Revision 1.6 2003/05/13 17:26:52 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.5 2003/03/31 07:15:18 mkarl
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.4 2002/04/25 11:04:10 rschmidt
+ * Editorial changes
+ *
* Revision 1.3 1999/11/22 13:41:19 cgoos
* Changed license header to GPL.
*
@@ -53,23 +63,23 @@
*
* All registers are 8 bit wide
*/
-#define LM80_CFG 0x00 /* Configuration Register */
-#define LM80_ISRC_1 0x01 /* Interrupt Status Register 1 */
-#define LM80_ISRC_2 0x02 /* Interrupt Status Register 2 */
-#define LM80_IMSK_1 0x03 /* Interrupt Mask Register 1 */
-#define LM80_IMSK_2 0x04 /* Interrupt Mask Register 2 */
+#define LM80_CFG 0x00 /* Configuration Register */
+#define LM80_ISRC_1 0x01 /* Interrupt Status Register 1 */
+#define LM80_ISRC_2 0x02 /* Interrupt Status Register 2 */
+#define LM80_IMSK_1 0x03 /* Interrupt Mask Register 1 */
+#define LM80_IMSK_2 0x04 /* Interrupt Mask Register 2 */
#define LM80_FAN_CTRL 0x05 /* Fan Devisor/RST#/OS# Register */
#define LM80_TEMP_CTRL 0x06 /* OS# Config, Temp Res. Reg */
/* 0x07 - 0x1f reserved */
/* current values */
-#define LM80_VT0_IN 0x20 /* current Voltage 0 value */
-#define LM80_VT1_IN 0x21 /* current Voltage 1 value */
-#define LM80_VT2_IN 0x22 /* current Voltage 2 value */
-#define LM80_VT3_IN 0x23 /* current Voltage 3 value */
-#define LM80_VT4_IN 0x24 /* current Voltage 4 value */
-#define LM80_VT5_IN 0x25 /* current Voltage 5 value */
-#define LM80_VT6_IN 0x26 /* current Voltage 6 value */
-#define LM80_TEMP_IN 0x27 /* current temperature value */
+#define LM80_VT0_IN 0x20 /* current Voltage 0 value */
+#define LM80_VT1_IN 0x21 /* current Voltage 1 value */
+#define LM80_VT2_IN 0x22 /* current Voltage 2 value */
+#define LM80_VT3_IN 0x23 /* current Voltage 3 value */
+#define LM80_VT4_IN 0x24 /* current Voltage 4 value */
+#define LM80_VT5_IN 0x25 /* current Voltage 5 value */
+#define LM80_VT6_IN 0x26 /* current Voltage 6 value */
+#define LM80_TEMP_IN 0x27 /* current Temperature value */
#define LM80_FAN1_IN 0x28 /* current Fan 1 count */
#define LM80_FAN2_IN 0x29 /* current Fan 2 count */
/* limit values */
@@ -91,8 +101,8 @@
#define LM80_THOT_LIM_LO 0x39 /* hot temperature limit (low) */
#define LM80_TOS_LIM_UP 0x3a /* OS temperature limit (high) */
#define LM80_TOS_LIM_LO 0x3b /* OS temperature limit (low) */
-#define LM80_FAN1_COUNT_LIM 0x3c /* Fan 1 count limit (high) */
-#define LM80_FAN2_COUNT_LIM 0x3d /* Fan 2 count limit (low) */
+#define LM80_FAN1_COUNT_LIM 0x3c /* Fan 1 count limit (high) */
+#define LM80_FAN2_COUNT_LIM 0x3d /* Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
/*
@@ -111,23 +121,23 @@
/* LM80_ISRC_1 Interrupt Status Register 1 */
/* LM80_IMSK_1 Interrupt Mask Register 1 */
-#define LM80_IS_VT0 (1<<0) /* limit exceeded for Voltage 0 */
-#define LM80_IS_VT1 (1<<1) /* limit exceeded for Voltage 1 */
-#define LM80_IS_VT2 (1<<2) /* limit exceeded for Voltage 2 */
-#define LM80_IS_VT3 (1<<3) /* limit exceeded for Voltage 3 */
-#define LM80_IS_VT4 (1<<4) /* limit exceeded for Voltage 4 */
-#define LM80_IS_VT5 (1<<5) /* limit exceeded for Voltage 5 */
-#define LM80_IS_VT6 (1<<6) /* limit exceeded for Voltage 6 */
+#define LM80_IS_VT0 (1<<0) /* limit exceeded for Voltage 0 */
+#define LM80_IS_VT1 (1<<1) /* limit exceeded for Voltage 1 */
+#define LM80_IS_VT2 (1<<2) /* limit exceeded for Voltage 2 */
+#define LM80_IS_VT3 (1<<3) /* limit exceeded for Voltage 3 */
+#define LM80_IS_VT4 (1<<4) /* limit exceeded for Voltage 4 */
+#define LM80_IS_VT5 (1<<5) /* limit exceeded for Voltage 5 */
+#define LM80_IS_VT6 (1<<6) /* limit exceeded for Voltage 6 */
#define LM80_IS_INT_IN (1<<7) /* state of INT_IN# */
/* LM80_ISRC_2 Interrupt Status Register 2 */
/* LM80_IMSK_2 Interrupt Mask Register 2 */
-#define LM80_IS_TEMP (1<<0) /* HOT temperature limit exceeded */
-#define LM80_IS_BTI (1<<1) /* state of BTI# pin */
+#define LM80_IS_TEMP (1<<0) /* HOT temperature limit exceeded */
+#define LM80_IS_BTI (1<<1) /* state of BTI# pin */
#define LM80_IS_FAN1 (1<<2) /* count limit exceeded for Fan 1 */
#define LM80_IS_FAN2 (1<<3) /* count limit exceeded for Fan 2 */
-#define LM80_IS_CI (1<<4) /* Chassis Intrusion occurred */
-#define LM80_IS_OS (1<<5) /* OS temperature limit exceeded */
+#define LM80_IS_CI (1<<4) /* Chassis Intrusion occured */
+#define LM80_IS_OS (1<<5) /* OS temperature limit exceeded */
/* bit 6 and 7 are reserved in LM80_ISRC_2 */
#define LM80_IS_HT_IRQ_MD (1<<6) /* Hot temperature interrupt mode */
#define LM80_IS_OT_IRQ_MD (1<<7) /* OS temperature interrupt mode */
@@ -141,7 +151,7 @@
#define LM80_FAN_RST_ENA (1<<7) /* sets RST_OUT#/OS# pins in RST mode */
/* LM80_TEMP_CTRL OS# Config, Temp Res. Reg */
-#define LM80_TEMP_OS_STAT (1<<0) /* mirrors the state of RST_OUT#/OS# */
+#define LM80_TEMP_OS_STAT (1<<0) /* mirrors the state of RST_OUT#/OS# */
#define LM80_TEMP_OS_POL (1<<1) /* select OS# polarity */
#define LM80_TEMP_OS_MODE (1<<2) /* selects Interrupt mode */
#define LM80_TEMP_RES (1<<3) /* selects 9 or 11 bit temp resulution*/
@@ -181,7 +191,7 @@
/* LM80_FAN2_COUNT_LIM Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
-#define LM80_ADDR 0x28 /* LM80 default addr */
+#define LM80_ADDR 0x28 /* LM80 default addr */
/* typedefs *******************************************************************/
diff -Nru a/drivers/net/sk98lin/h/skaddr.h b/drivers/net/sk98lin/h/skaddr.h
--- a/drivers/net/sk98lin/h/skaddr.h Sun Aug 3 13:14:48 2003
+++ b/drivers/net/sk98lin/h/skaddr.h Sun Aug 3 13:14:48 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skaddr.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.24 $
- * Date: $Date: 2001/01/22 13:41:34 $
+ * Project: Gigabit Ethernet Adapters, ADDR-Modul
+ * Version: $Revision: 1.29 $
+ * Date: $Date: 2003/05/13 16:57:24 $
* Purpose: Header file for Address Management (MC, UC, Prom).
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,24 @@
* History:
*
* $Log: skaddr.h,v $
+ * Revision 1.29 2003/05/13 16:57:24 mkarl
+ * Changes for SLIM driver.
+ * Editorial changes.
+ *
+ * Revision 1.28 2003/04/15 09:33:22 tschilli
+ * Copyright messages changed.
+ *
+ * Revision 1.27 2003/04/14 15:55:11 tschilli
+ * "#error C++ is not yet supported." removed.
+ *
+ * Revision 1.26 2002/11/15 07:24:42 tschilli
+ * SK_ADDR_EQUAL macro fixed.
+ *
+ * Revision 1.25 2002/06/10 13:55:18 tschilli
+ * Changes for handling YUKON.
+ * All changes are internally and not visible to the programmer
+ * using this module.
+ *
* Revision 1.24 2001/01/22 13:41:34 rassmann
* Supporting two nets on dual-port adapters.
*
@@ -132,7 +151,6 @@
#define __INC_SKADDR_H
#ifdef __cplusplus
-#error C++ is not yet supported.
extern "C" {
#endif /* cplusplus */
@@ -144,7 +162,7 @@
/* ----- Common return values ----- */
#define SK_ADDR_SUCCESS 0 /* Function returned successfully. */
-#define SK_ADDR_ILLEGAL_PORT 100 /* Port number too high. */
+#define SK_ADDR_ILLEGAL_PORT 100 /* Port number too high. */
#define SK_ADDR_TOO_EARLY 101 /* Function called too early. */
/* ----- Clear/Add flag bits ----- */
@@ -198,6 +216,7 @@
/* Macros */
+#ifdef OLD_STUFF
#ifndef SK_ADDR_EQUAL
/*
* "&" instead of "&&" allows better optimization on IA-64.
@@ -217,6 +236,25 @@
(*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
+#endif /* 0 */
+
+#ifndef SK_ADDR_EQUAL
+#ifndef SK_ADDR_DWORD_COMPARE
+#define SK_ADDR_EQUAL(A1,A2) ( \
+ (((SK_U8 SK_FAR *)(A1))[5] == ((SK_U8 SK_FAR *)(A2))[5]) & \
+ (((SK_U8 SK_FAR *)(A1))[4] == ((SK_U8 SK_FAR *)(A2))[4]) & \
+ (((SK_U8 SK_FAR *)(A1))[3] == ((SK_U8 SK_FAR *)(A2))[3]) & \
+ (((SK_U8 SK_FAR *)(A1))[2] == ((SK_U8 SK_FAR *)(A2))[2]) & \
+ (((SK_U8 SK_FAR *)(A1))[1] == ((SK_U8 SK_FAR *)(A2))[1]) & \
+ (((SK_U8 SK_FAR *)(A1))[0] == ((SK_U8 SK_FAR *)(A2))[0]))
+#else /* SK_ADDR_DWORD_COMPARE */
+#define SK_ADDR_EQUAL(A1,A2) ( \
+ (*(SK_U16 SK_FAR *)&(((SK_U8 SK_FAR *)(A1))[4]) == \
+ *(SK_U16 SK_FAR *)&(((SK_U8 SK_FAR *)(A2))[4])) && \
+ (*(SK_U32 SK_FAR *)&(((SK_U8 SK_FAR *)(A1))[0]) == \
+ *(SK_U32 SK_FAR *)&(((SK_U8 SK_FAR *)(A2))[0])))
+#endif /* SK_ADDR_DWORD_COMPARE */
+#endif /* SK_ADDR_EQUAL */
/* typedefs *******************************************************************/
@@ -239,13 +277,13 @@
/* ----- Public part (read-only) ----- */
- SK_MAC_ADDR CurrentMacAddress; /* Current physical MAC Address. */
+ SK_MAC_ADDR CurrentMacAddress; /* Current physical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Permanent physical MAC Address. */
- int PromMode; /* Promiscuous Mode. */
+ int PromMode; /* Promiscuous Mode. */
/* ----- Private part ----- */
- SK_MAC_ADDR PreviousMacAddress; /* Prev. phys. MAC Address. */
+ SK_MAC_ADDR PreviousMacAddress; /* Prev. phys. MAC Address. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
@@ -255,18 +293,20 @@
SK_U32 NextExactMatchDrv;
SK_MAC_ADDR Exact[SK_ADDR_EXACT_MATCHES];
SK_FILTER64 InexactFilter; /* For 64-bit hash register. */
+ SK_FILTER64 InexactRlmtFilter; /* For 64-bit hash register. */
+ SK_FILTER64 InexactDrvFilter; /* For 64-bit hash register. */
} SK_ADDR_PORT;
struct s_AddrNet {
/* ----- Public part (read-only) ----- */
- SK_MAC_ADDR CurrentMacAddress; /* Logical MAC Address. */
+ SK_MAC_ADDR CurrentMacAddress; /* Logical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Logical MAC Address. */
/* ----- Private part ----- */
- SK_U32 ActivePort; /* View of module ADDR. */
+ SK_U32 ActivePort; /* View of module ADDR. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U16 Align02;
@@ -294,44 +334,94 @@
extern int SkAddrInit(
SK_AC *pAC,
SK_IOC IoC,
- int Level);
+ int Level);
extern int SkAddrMcClear(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
- int Flags);
+ int Flags);
+
+extern int SkAddrXmacMcClear(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber,
+ int Flags);
+
+extern int SkAddrGmacMcClear(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber,
+ int Flags);
extern int SkAddrMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pMc,
- int Flags);
+ int Flags);
+
+extern int SkAddrXmacMcAdd(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber,
+ SK_MAC_ADDR *pMc,
+ int Flags);
+
+extern int SkAddrGmacMcAdd(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber,
+ SK_MAC_ADDR *pMc,
+ int Flags);
extern int SkAddrMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
+extern int SkAddrXmacMcUpdate(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber);
+
+extern int SkAddrGmacMcUpdate(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber);
+
extern int SkAddrOverride(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
- SK_MAC_ADDR *pNewAddr,
- int Flags);
+ SK_MAC_ADDR SK_FAR *pNewAddr,
+ int Flags);
extern int SkAddrPromiscuousChange(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
- int NewPromMode);
+ int NewPromMode);
+
+extern int SkAddrXmacPromiscuousChange(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber,
+ int NewPromMode);
+
+extern int SkAddrGmacPromiscuousChange(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ SK_U32 PortNumber,
+ int NewPromMode);
+#ifndef SK_SLIM
extern int SkAddrSwap(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 FromPortNumber,
SK_U32 ToPortNumber);
+#endif
#else /* defined(SK_KR_PROTO)) */
diff -Nru a/drivers/net/sk98lin/h/skdebug.h b/drivers/net/sk98lin/h/skdebug.h
--- a/drivers/net/sk98lin/h/skdebug.h Sun Aug 3 13:14:48 2003
+++ b/drivers/net/sk98lin/h/skdebug.h Sun Aug 3 13:14:48 2003
@@ -1,17 +1,17 @@
/******************************************************************************
*
* Name: skdebug.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.10 $
- * Date: $Date: 1999/11/22 13:47:40 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.14 $
+ * Date: $Date: 2003/05/13 17:26:00 $
* Purpose: SK specific DEBUG support
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +26,19 @@
*
* History:
* $Log: skdebug.h,v $
+ * Revision 1.14 2003/05/13 17:26:00 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.13 2003/03/31 07:16:39 mkarl
+ * Corrected Copyright.
+ *
+ * Revision 1.12 2002/07/15 15:37:13 rschmidt
+ * Power Management support
+ * Editorial changes
+ *
+ * Revision 1.11 2002/04/25 11:04:39 rschmidt
+ * Editorial changes
+ *
* Revision 1.10 1999/11/22 13:47:40 cgoos
* Changed license header to GPL.
*
@@ -89,26 +102,25 @@
#define SK_DBGMOD_MERR 0x00000001L /* general module error indication */
#define SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
-#define SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
-#define SK_DBGMOD_VPD 0x00000008L /* VPD module */
-#define SK_DBGMOD_I2C 0x00000010L /* I2C module */
-#define SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
-#define SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
-#define SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
+#define SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
+#define SK_DBGMOD_VPD 0x00000008L /* VPD module */
+#define SK_DBGMOD_I2C 0x00000010L /* I2C module */
+#define SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
+#define SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
+#define SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
#define SK_DBGMOD_PECP 0x00000100L /* PECP module */
+#define SK_DBGMOD_POWM 0x00000200L /* Power Management module */
/* Debug events */
-#define SK_DBGCAT_INIT 0x00000001L /* module/driver initialization */
-#define SK_DBGCAT_CTRL 0x00000002L /* controlling: add/rmv MCA/MAC
- * and other controls (IOCTL)
- */
-#define SK_DBGCAT_ERR 0x00000004L /* error handling paths */
-#define SK_DBGCAT_TX 0x00000008L /* transmit path */
-#define SK_DBGCAT_RX 0x00000010L /* receive path */
-#define SK_DBGCAT_IRQ 0x00000020L /* general IRQ handling */
-#define SK_DBGCAT_QUEUE 0x00000040L /* any queue management */
-#define SK_DBGCAT_DUMP 0x00000080L /* large data output e.g. hex dump */
-#define SK_DBGCAT_FATAL 0x00000100L /* large data output e.g. hex dump */
+#define SK_DBGCAT_INIT 0x00000001L /* module/driver initialization */
+#define SK_DBGCAT_CTRL 0x00000002L /* controlling devices */
+#define SK_DBGCAT_ERR 0x00000004L /* error handling paths */
+#define SK_DBGCAT_TX 0x00000008L /* transmit path */
+#define SK_DBGCAT_RX 0x00000010L /* receive path */
+#define SK_DBGCAT_IRQ 0x00000020L /* general IRQ handling */
+#define SK_DBGCAT_QUEUE 0x00000040L /* any queue management */
+#define SK_DBGCAT_DUMP 0x00000080L /* large data output e.g. hex dump */
+#define SK_DBGCAT_FATAL 0x00000100L /* fatal error */
#endif /* __INC_SKDEBUG_H */
diff -Nru a/drivers/net/sk98lin/h/skdrv1st.h b/drivers/net/sk98lin/h/skdrv1st.h
--- a/drivers/net/sk98lin/h/skdrv1st.h Sun Aug 3 13:14:44 2003
+++ b/drivers/net/sk98lin/h/skdrv1st.h Sun Aug 3 13:14:44 2003
@@ -2,16 +2,15 @@
*
* Name: skdrv1st.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.9.2.1 $
- * Date: $Date: 2001/03/12 16:50:59 $
+ * Version: $Revision: 1.15 $
+ * Date: $Date: 2003/07/17 14:54:09 $
* Purpose: First header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,30 @@
* History:
*
* $Log: skdrv1st.h,v $
+ * Revision 1.15 2003/07/17 14:54:09 rroesler
+ * Fix: Corrected SK_PNMI_READ macros to copy right amount of bytes
+ *
+ * Revision 1.14 2003/06/03 14:36:32 mlindner
+ * Add: Additions for SK_SLIM
+ *
+ * Revision 1.13 2003/05/26 14:03:06 mlindner
+ * Add: Support for SLIM skaddr
+ *
+ * Revision 1.12 2003/05/26 12:56:39 mlindner
+ * Add: Support for Kernel 2.5/2.6
+ * Add: New SkOsGetTimeCurrent function
+ * Add: SK_PNMI_HUNDREDS_SEC definition
+ * Fix: SK_TICKS_PER_SEC on Intel Itanium2
+ *
+ * Revision 1.11 2003/02/25 14:16:40 mlindner
+ * Fix: Copyright statement
+ *
+ * Revision 1.10 2002/10/02 12:46:02 mlindner
+ * Add: Support for Yukon
+ *
+ * Revision 1.9.2.2 2001/12/07 12:06:42 mlindner
+ * Fix: malloc -> slab changes
+ *
* Revision 1.9.2.1 2001/03/12 16:50:59 mlindner
* chg: kernel 2.4 adaption
*
@@ -72,7 +95,7 @@
* Description:
*
* This is the first include file of the driver, which includes all
- * necessary system header files and some of the GEnesis header files.
+ * neccessary system header files and some of the GEnesis header files.
* It also defines some basic items.
*
* Include File Hierarchy:
@@ -84,17 +107,22 @@
#ifndef __INC_SKDRV1ST_H
#define __INC_SKDRV1ST_H
+/* Check kernel version */
+#include <linux/version.h>
typedef struct s_AC SK_AC;
+/* Set card versions */
+#define SK_FAR
+
/* override some default functions with optimized linux functions */
#define SK_PNMI_STORE_U16(p,v) memcpy((char*)(p),(char*)&(v),2)
#define SK_PNMI_STORE_U32(p,v) memcpy((char*)(p),(char*)&(v),4)
#define SK_PNMI_STORE_U64(p,v) memcpy((char*)(p),(char*)&(v),8)
#define SK_PNMI_READ_U16(p,v) memcpy((char*)&(v),(char*)(p),2)
-#define SK_PNMI_READ_U32(p,v) memcpy((char*)&(v),(char*)(p),2)
-#define SK_PNMI_READ_U64(p,v) memcpy((char*)&(v),(char*)(p),2)
+#define SK_PNMI_READ_U32(p,v) memcpy((char*)&(v),(char*)(p),4)
+#define SK_PNMI_READ_U64(p,v) memcpy((char*)&(v),(char*)(p),8)
#define SkCsCalculateChecksum(p,l) ((~ip_compute_csum(p, l)) & 0xffff)
@@ -116,7 +144,6 @@
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
-#include <linux/crc32.h>
#include <asm/byteorder.h>
#include <asm/bitops.h>
#include <asm/io.h>
@@ -140,9 +167,11 @@
#define SK_BIG_ENDIAN
#endif
+#define SK_NET_DEVICE net_device
+
/* we use gethrtime(), return unit: nanoseconds */
-#define SK_TICKS_PER_SEC HZ
+#define SK_TICKS_PER_SEC 100
#define SK_MEM_MAPPED_IO
@@ -161,17 +190,17 @@
#define SK_MEMCPY(dest,src,size) memcpy(dest,src,size)
#define SK_MEMCMP(s1,s2,size) memcmp(s1,s2,size)
#define SK_MEMSET(dest,val,size) memset(dest,val,size)
-#define SK_STRLEN(pStr) strlen((char*)pStr)
-#define SK_STRNCPY(pDest,pSrc,size) strncpy((char*)pDest,(char*)pSrc,size)
-#define SK_STRCMP(pStr1,pStr2) strcmp((char*)pStr1,(char*)pStr2)
+#define SK_STRLEN(pStr) strlen((char*)(pStr))
+#define SK_STRNCPY(pDest,pSrc,size) strncpy((char*)(pDest),(char*)(pSrc),size)
+#define SK_STRCMP(pStr1,pStr2) strcmp((char*)(pStr1),(char*)(pStr2))
/* macros to access the adapter */
-#define SK_OUT8(b,a,v) writeb(v, (b+a))
-#define SK_OUT16(b,a,v) writew(v, (b+a))
-#define SK_OUT32(b,a,v) writel(v, (b+a))
-#define SK_IN8(b,a,pv) (*(pv) = readb(b+a))
-#define SK_IN16(b,a,pv) (*(pv) = readw(b+a))
-#define SK_IN32(b,a,pv) (*(pv) = readl(b+a))
+#define SK_OUT8(b,a,v) writeb((v), ((b)+(a)))
+#define SK_OUT16(b,a,v) writew((v), ((b)+(a)))
+#define SK_OUT32(b,a,v) writel((v), ((b)+(a)))
+#define SK_IN8(b,a,pv) (*(pv) = readb((b)+(a)))
+#define SK_IN16(b,a,pv) (*(pv) = readw((b)+(a)))
+#define SK_IN32(b,a,pv) (*(pv) = readl((b)+(a)))
#define int8_t char
#define int16_t short
@@ -222,11 +251,11 @@
#define SK_DBGCAT_DRV_INT_SRC 0x04000000
#define SK_DBGCAT_DRV_EVENT 0x08000000
-#endif /* DEBUG */
+#endif
#define SK_ERR_LOG SkErrorLog
extern void SkErrorLog(SK_AC*, int, int, char*);
-#endif /* __INC_SKDRV1ST_H */
+#endif
diff -Nru a/drivers/net/sk98lin/h/skdrv2nd.h b/drivers/net/sk98lin/h/skdrv2nd.h
--- a/drivers/net/sk98lin/h/skdrv2nd.h Sun Aug 3 13:14:53 2003
+++ b/drivers/net/sk98lin/h/skdrv2nd.h Sun Aug 3 13:14:53 2003
@@ -2,16 +2,15 @@
*
* Name: skdrv2nd.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.12.2.1 $
- * Date: $Date: 2001/03/12 16:50:59 $
+ * Version: $Revision: 1.19 $
+ * Date: $Date: 2003/07/07 09:53:10 $
* Purpose: Second header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,33 @@
* History:
*
* $Log: skdrv2nd.h,v $
+ * Revision 1.19 2003/07/07 09:53:10 rroesler
+ * Fix: Removed proprietary RxTx defines and used the ones from skgehw.h instead
+ *
+ * Revision 1.18 2003/06/12 07:54:14 mlindner
+ * Fix: Changed Descriptor Alignment to 64 Byte
+ *
+ * Revision 1.17 2003/05/26 12:56:39 mlindner
+ * Add: Support for Kernel 2.5/2.6
+ * Add: New SkOsGetTimeCurrent function
+ * Add: SK_PNMI_HUNDREDS_SEC definition
+ * Fix: SK_TICKS_PER_SEC on Intel Itanium2
+ *
+ * Revision 1.16 2003/03/21 14:56:18 rroesler
+ * Added code regarding interrupt moderation
+ *
+ * Revision 1.15 2003/02/25 14:16:40 mlindner
+ * Fix: Copyright statement
+ *
+ * Revision 1.14 2003/02/25 13:26:26 mlindner
+ * Add: Support for various vendors
+ *
+ * Revision 1.13 2002/10/02 12:46:02 mlindner
+ * Add: Support for Yukon
+ *
+ * Revision 1.12.2.2 2001/09/05 12:14:50 mlindner
+ * add: New hardware revision int
+ *
* Revision 1.12.2.1 2001/03/12 16:50:59 mlindner
* chg: kernel 2.4 adaption
*
@@ -85,7 +111,7 @@
* Description:
*
* This is the second include file of the driver, which includes all other
- * necessary files and defines all structures and constants used by the
+ * neccessary files and defines all structures and constants used by the
* driver and the common modules.
*
* Include File Hierarchy:
@@ -111,7 +137,54 @@
#include "h/skrlmt.h"
#include "h/skgedrv.h"
-/* global function prototypes ******************************************/
+#define SK_PCI_ISCOMPLIANT(result, pdev) { \
+ result = SK_FALSE; /* default */ \
+ /* 3Com (0x10b7) */ \
+ if (pdev->vendor == 0x10b7) { \
+ /* Gigabit Ethernet Adapter (0x1700) */ \
+ if ((pdev->device == 0x1700)) { \
+ result = SK_TRUE; \
+ } \
+ /* SysKonnect (0x1148) */ \
+ } else if (pdev->vendor == 0x1148) { \
+ /* SK-98xx Gigabit Ethernet Server Adapter (0x4300) */ \
+ /* SK-98xx V2.0 Gigabit Ethernet Adapter (0x4320) */ \
+ if ((pdev->device == 0x4300) || \
+ (pdev->device == 0x4320)) { \
+ result = SK_TRUE; \
+ } \
+ /* D-Link (0x1186) */ \
+ } else if (pdev->vendor == 0x1186) { \
+ /* Gigabit Ethernet Adapter (0x4c00) */ \
+ if ((pdev->device == 0x4c00)) { \
+ result = SK_TRUE; \
+ } \
+ /* Marvell (0x11ab) */ \
+ } else if (pdev->vendor == 0x11ab) { \
+ /* Gigabit Ethernet Adapter (0x4320) */ \
+ if ((pdev->device == 0x4320)) { \
+ result = SK_TRUE; \
+ } \
+ /* CNet (0x1371) */ \
+ } else if (pdev->vendor == 0x1371) { \
+ /* GigaCard Network Adapter (0x434e) */ \
+ if ((pdev->device == 0x434e)) { \
+ result = SK_TRUE; \
+ } \
+ /* Linksys (0x1737) */ \
+ } else if (pdev->vendor == 0x1737) { \
+ /* Gigabit Network Adapter (0x1032) */ \
+ /* Gigabit Network Adapter (0x1064) */ \
+ if ((pdev->device == 0x1032) || \
+ (pdev->device == 0x1064)) { \
+ result = SK_TRUE; \
+ } \
+ } else { \
+ result = SK_FALSE; \
+ } \
+}
+
+
extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
extern SK_U64 SkOsGetTime(SK_AC*);
@@ -136,6 +209,25 @@
};
+/*
+ * Time macros
+ */
+#if SK_TICKS_PER_SEC == 100
+#define SK_PNMI_HUNDREDS_SEC(t) (t)
+#else
+#define SK_PNMI_HUNDREDS_SEC(t) ((((unsigned long)t) * 100) / \
+ (SK_TICKS_PER_SEC))
+#endif
+
+/*
+ * New SkOsGetTime
+ */
+#define SkOsGetTimeCurrent(pAC, pUsec) {\
+ struct timeval t;\
+ do_gettimeofday(&t);\
+ *pUsec = ((((t.tv_sec) * 1000000L)+t.tv_usec)/10000);\
+}
+
/*
* ioctl definitions
@@ -144,6 +236,7 @@
#define SK_IOCTL_GETMIB (SK_IOCTL_BASE + 0)
#define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1)
#define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2)
+#define SK_IOCTL_GEN (SK_IOCTL_BASE + 3)
typedef struct s_IOCTL SK_GE_IOCTL;
@@ -178,7 +271,7 @@
/*
* alignment of rx/tx descriptors
*/
-#define DESCR_ALIGN 8
+#define DESCR_ALIGN 64
/*
* definitions for pnmi. TODO
@@ -191,6 +284,43 @@
#define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0
#define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v) 0
+/*
+** Interim definition of SK_DRV_TIMER placed in this file until
+** common modules have boon finallized
+*/
+#define SK_DRV_TIMER 11
+#define SK_DRV_MODERATION_TIMER 1
+#define SK_DRV_MODERATION_TIMER_LENGTH 1000000 /* 1 second */
+#define SK_DRV_RX_CLEANUP_TIMER 2
+#define SK_DRV_RX_CLEANUP_TIMER_LENGTH 1000000 /* 100 millisecs */
+
+/*
+** Definitions regarding transmitting frames
+** any calculating any checksum.
+*/
+#define C_LEN_ETHERMAC_HEADER_DEST_ADDR 6
+#define C_LEN_ETHERMAC_HEADER_SRC_ADDR 6
+#define C_LEN_ETHERMAC_HEADER_LENTYPE 2
+#define C_LEN_ETHERMAC_HEADER ( (C_LEN_ETHERMAC_HEADER_DEST_ADDR) + \
+ (C_LEN_ETHERMAC_HEADER_SRC_ADDR) + \
+ (C_LEN_ETHERMAC_HEADER_LENTYPE) )
+
+#define C_LEN_ETHERMTU_MINSIZE 46
+#define C_LEN_ETHERMTU_MAXSIZE_STD 1500
+#define C_LEN_ETHERMTU_MAXSIZE_JUMBO 9000
+
+#define C_LEN_ETHERNET_MINSIZE ( (C_LEN_ETHERMAC_HEADER) + \
+ (C_LEN_ETHERMTU_MINSIZE) )
+
+#define C_OFFSET_IPHEADER C_LEN_ETHERMAC_HEADER
+#define C_OFFSET_IPHEADER_IPPROTO 9
+#define C_OFFSET_TCPHEADER_TCPCS 16
+
+#define C_OFFSET_IPPROTO ( (C_LEN_ETHERMAC_HEADER) + \
+ (C_OFFSET_IPHEADER_IPPROTO) )
+
+#define C_PROTO_ID_UDP 6 /* refer to RFC 790 or Stevens' */
+#define C_PROTO_ID_TCP 17 /* TCP/IP illustrated for details */
/* TX and RX descriptors *****************************************************/
@@ -202,7 +332,7 @@
SK_U32 VDataLow; /* Receive buffer Addr, low dword */
SK_U32 VDataHigh; /* Receive buffer Addr, high dword */
SK_U32 FrameStat; /* Receive Frame Status word */
- SK_U32 TimeStamp; /* Time stamp from XMAX */
+ SK_U32 TimeStamp; /* Time stamp from XMAC */
SK_U32 TcpSums; /* TCP Sum 2 / TCP Sum 1 */
SK_U32 TcpSumStarts; /* TCP Sum Start 2 / TCP Sum Start 1 */
RXD *pNextRxd; /* Pointer to next Rxd */
@@ -218,162 +348,44 @@
SK_U32 VDataHigh; /* Transmit Buffer Addr, high dword */
SK_U32 FrameStat; /* Transmit Frame Status Word */
SK_U32 TcpSumOfs; /* Reserved / TCP Sum Offset */
- SK_U32 TcpSumStWr; /* TCP Sum Start / TCP Sum Write */
+ SK_U16 TcpSumSt; /* TCP Sum Start */
+ SK_U16 TcpSumWr; /* TCP Sum Write */
SK_U32 TcpReserved; /* not used */
TXD *pNextTxd; /* Pointer to next Txd */
struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
};
+/* Used interrupt bits in the interrupts source register *********************/
-/* definition of flags in descriptor control field */
-#define RX_CTRL_OWN_BMU UINT32_C(0x80000000)
-#define RX_CTRL_STF UINT32_C(0x40000000)
-#define RX_CTRL_EOF UINT32_C(0x20000000)
-#define RX_CTRL_EOB_IRQ UINT32_C(0x10000000)
-#define RX_CTRL_EOF_IRQ UINT32_C(0x08000000)
-#define RX_CTRL_DEV_NULL UINT32_C(0x04000000)
-#define RX_CTRL_STAT_VALID UINT32_C(0x02000000)
-#define RX_CTRL_TIME_VALID UINT32_C(0x01000000)
-#define RX_CTRL_CHECK_DEFAULT UINT32_C(0x00550000)
-#define RX_CTRL_CHECK_CSUM UINT32_C(0x00560000)
-#define RX_CTRL_LEN_MASK UINT32_C(0x0000FFFF)
-
-#define TX_CTRL_OWN_BMU UINT32_C(0x80000000)
-#define TX_CTRL_STF UINT32_C(0x40000000)
-#define TX_CTRL_EOF UINT32_C(0x20000000)
-#define TX_CTRL_EOB_IRQ UINT32_C(0x10000000)
-#define TX_CTRL_EOF_IRQ UINT32_C(0x08000000)
-#define TX_CTRL_ST_FWD UINT32_C(0x04000000)
-#define TX_CTRL_DISAB_CRC UINT32_C(0x02000000)
-#define TX_CTRL_SOFTWARE UINT32_C(0x01000000)
-#define TX_CTRL_CHECK_DEFAULT UINT32_C(0x00550000)
-#define TX_CTRL_CHECK_CSUM UINT32_C(0x00560000)
-#define TX_CTRL_LEN_MASK UINT32_C(0x0000FFFF)
-
-
-
-/* The offsets of registers in the TX and RX queue control io area ***********/
-
-#define RX_Q_BUF_CTRL_CNT 0x00
-#define RX_Q_NEXT_DESCR_LOW 0x04
-#define RX_Q_BUF_ADDR_LOW 0x08
-#define RX_Q_BUF_ADDR_HIGH 0x0c
-#define RX_Q_FRAME_STAT 0x10
-#define RX_Q_TIME_STAMP 0x14
-#define RX_Q_CSUM_1_2 0x18
-#define RX_Q_CSUM_START_1_2 0x1c
-#define RX_Q_CUR_DESCR_LOW 0x20
-#define RX_Q_DESCR_HIGH 0x24
-#define RX_Q_CUR_ADDR_LOW 0x28
-#define RX_Q_CUR_ADDR_HIGH 0x2c
-#define RX_Q_CUR_BYTE_CNT 0x30
-#define RX_Q_CTRL 0x34
-#define RX_Q_FLAG 0x38
-#define RX_Q_TEST1 0x3c
-#define RX_Q_TEST2 0x40
-#define RX_Q_TEST3 0x44
-
-#define TX_Q_BUF_CTRL_CNT 0x00
-#define TX_Q_NEXT_DESCR_LOW 0x04
-#define TX_Q_BUF_ADDR_LOW 0x08
-#define TX_Q_BUF_ADDR_HIGH 0x0c
-#define TX_Q_FRAME_STAT 0x10
-#define TX_Q_CSUM_START 0x14
-#define TX_Q_CSUM_START_POS 0x18
-#define TX_Q_RESERVED 0x1c
-#define TX_Q_CUR_DESCR_LOW 0x20
-#define TX_Q_DESCR_HIGH 0x24
-#define TX_Q_CUR_ADDR_LOW 0x28
-#define TX_Q_CUR_ADDR_HIGH 0x2c
-#define TX_Q_CUR_BYTE_CNT 0x30
-#define TX_Q_CTRL 0x34
-#define TX_Q_FLAG 0x38
-#define TX_Q_TEST1 0x3c
-#define TX_Q_TEST2 0x40
-#define TX_Q_TEST3 0x44
-
-/* definition of flags in the queue control field */
-#define RX_Q_CTRL_POLL_ON 0x00000080
-#define RX_Q_CTRL_POLL_OFF 0x00000040
-#define RX_Q_CTRL_STOP 0x00000020
-#define RX_Q_CTRL_START 0x00000010
-#define RX_Q_CTRL_CLR_I_PAR 0x00000008
-#define RX_Q_CTRL_CLR_I_EOB 0x00000004
-#define RX_Q_CTRL_CLR_I_EOF 0x00000002
-#define RX_Q_CTRL_CLR_I_ERR 0x00000001
-
-#define TX_Q_CTRL_POLL_ON 0x00000080
-#define TX_Q_CTRL_POLL_OFF 0x00000040
-#define TX_Q_CTRL_STOP 0x00000020
-#define TX_Q_CTRL_START 0x00000010
-#define TX_Q_CTRL_CLR_I_EOB 0x00000004
-#define TX_Q_CTRL_CLR_I_EOF 0x00000002
-#define TX_Q_CTRL_CLR_I_ERR 0x00000001
-
-
-/* Interrupt bits in the interrupts source register **************************/
-#define IRQ_HW_ERROR 0x80000000
-#define IRQ_RESERVED 0x40000000
-#define IRQ_PKT_TOUT_RX1 0x20000000
-#define IRQ_PKT_TOUT_RX2 0x10000000
-#define IRQ_PKT_TOUT_TX1 0x08000000
-#define IRQ_PKT_TOUT_TX2 0x04000000
-#define IRQ_I2C_READY 0x02000000
-#define IRQ_SW 0x01000000
-#define IRQ_EXTERNAL_REG 0x00800000
-#define IRQ_TIMER 0x00400000
-#define IRQ_MAC1 0x00200000
-#define IRQ_LINK_SYNC_C_M1 0x00100000
-#define IRQ_MAC2 0x00080000
-#define IRQ_LINK_SYNC_C_M2 0x00040000
-#define IRQ_EOB_RX1 0x00020000
-#define IRQ_EOF_RX1 0x00010000
-#define IRQ_CHK_RX1 0x00008000
-#define IRQ_EOB_RX2 0x00004000
-#define IRQ_EOF_RX2 0x00002000
-#define IRQ_CHK_RX2 0x00001000
-#define IRQ_EOB_SY_TX1 0x00000800
-#define IRQ_EOF_SY_TX1 0x00000400
-#define IRQ_CHK_SY_TX1 0x00000200
-#define IRQ_EOB_AS_TX1 0x00000100
-#define IRQ_EOF_AS_TX1 0x00000080
-#define IRQ_CHK_AS_TX1 0x00000040
-#define IRQ_EOB_SY_TX2 0x00000020
-#define IRQ_EOF_SY_TX2 0x00000010
-#define IRQ_CHK_SY_TX2 0x00000008
-#define IRQ_EOB_AS_TX2 0x00000004
-#define IRQ_EOF_AS_TX2 0x00000002
-#define IRQ_CHK_AS_TX2 0x00000001
-
-#define DRIVER_IRQS (IRQ_SW | IRQ_EOF_RX1 | IRQ_EOF_RX2 | \
- IRQ_EOF_SY_TX1 | IRQ_EOF_AS_TX1 | \
- IRQ_EOF_SY_TX2 | IRQ_EOF_AS_TX2)
-
-#define SPECIAL_IRQS (IRQ_HW_ERROR | IRQ_PKT_TOUT_RX1 | IRQ_PKT_TOUT_RX2 | \
- IRQ_PKT_TOUT_TX1 | IRQ_PKT_TOUT_TX2 | \
- IRQ_I2C_READY | IRQ_EXTERNAL_REG | IRQ_TIMER | \
- IRQ_MAC1 | IRQ_LINK_SYNC_C_M1 | \
- IRQ_MAC2 | IRQ_LINK_SYNC_C_M2 | \
- IRQ_CHK_RX1 | IRQ_CHK_RX2 | \
- IRQ_CHK_SY_TX1 | IRQ_CHK_AS_TX1 | \
- IRQ_CHK_SY_TX2 | IRQ_CHK_AS_TX2)
-
-#define IRQ_MASK (IRQ_SW | IRQ_EOB_RX1 | IRQ_EOF_RX1 | \
- IRQ_EOB_RX2 | IRQ_EOF_RX2 | \
- IRQ_EOB_SY_TX1 | IRQ_EOF_SY_TX1 | \
- IRQ_EOB_AS_TX1 | IRQ_EOF_AS_TX1 | \
- IRQ_EOB_SY_TX2 | IRQ_EOF_SY_TX2 | \
- IRQ_EOB_AS_TX2 | IRQ_EOF_AS_TX2 | \
- IRQ_HW_ERROR | IRQ_PKT_TOUT_RX1 | IRQ_PKT_TOUT_RX2 | \
- IRQ_PKT_TOUT_TX1 | IRQ_PKT_TOUT_TX2 | \
- IRQ_I2C_READY | IRQ_EXTERNAL_REG | IRQ_TIMER | \
- IRQ_MAC1 | \
- IRQ_MAC2 | \
- IRQ_CHK_RX1 | IRQ_CHK_RX2 | \
- IRQ_CHK_SY_TX1 | IRQ_CHK_AS_TX1 | \
- IRQ_CHK_SY_TX2 | IRQ_CHK_AS_TX2)
+#define DRIVER_IRQS ((IS_IRQ_SW) | \
+ (IS_R1_F) |(IS_R2_F) | \
+ (IS_XS1_F) |(IS_XA1_F) | \
+ (IS_XS2_F) |(IS_XA2_F))
+
+#define SPECIAL_IRQS ((IS_HW_ERR) |(IS_I2C_READY) | \
+ (IS_EXT_REG) |(IS_TIMINT) | \
+ (IS_PA_TO_RX1) |(IS_PA_TO_RX2) | \
+ (IS_PA_TO_TX1) |(IS_PA_TO_TX2) | \
+ (IS_MAC1) |(IS_LNK_SYNC_M1)| \
+ (IS_MAC2) |(IS_LNK_SYNC_M2)| \
+ (IS_R1_C) |(IS_R2_C) | \
+ (IS_XS1_C) |(IS_XA1_C) | \
+ (IS_XS2_C) |(IS_XA2_C))
+
+#define IRQ_MASK ((IS_IRQ_SW) | \
+ (IS_R1_B) |(IS_R1_F) |(IS_R2_B) |(IS_R2_F) | \
+ (IS_XS1_B) |(IS_XS1_F) |(IS_XA1_B)|(IS_XA1_F)| \
+ (IS_XS2_B) |(IS_XS2_F) |(IS_XA2_B)|(IS_XA2_F)| \
+ (IS_HW_ERR) |(IS_I2C_READY)| \
+ (IS_EXT_REG) |(IS_TIMINT) | \
+ (IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \
+ (IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \
+ (IS_MAC1) |(IS_MAC2) | \
+ (IS_R1_C) |(IS_R2_C) | \
+ (IS_XS1_C) |(IS_XA1_C) | \
+ (IS_XS2_C) |(IS_XA2_C))
-#define IRQ_HWE_MASK 0x00000FFF /* enable all HW irqs */
+#define IRQ_HWE_MASK (IS_ERR_MSK) /* enable all HW irqs */
typedef struct s_DevNet DEV_NET;
@@ -383,7 +395,6 @@
int Mtu;
int Up;
SK_AC *pAC;
- struct proc_dir_entry *proc;
};
typedef struct s_TxPort TX_PORT;
@@ -417,6 +428,55 @@
int PortIndex; /* index number of port (0 or 1) */
};
+/* Definitions needed for interrupt moderation *******************************/
+
+#define IRQ_EOF_AS_TX ((IS_XA1_F) | (IS_XA2_F))
+#define IRQ_EOF_SY_TX ((IS_XS1_F) | (IS_XS2_F))
+#define IRQ_MASK_TX_ONLY ((IRQ_EOF_AS_TX)| (IRQ_EOF_SY_TX))
+#define IRQ_MASK_RX_ONLY ((IS_R1_F) | (IS_R2_F))
+#define IRQ_MASK_SP_ONLY (SPECIAL_IRQS)
+#define IRQ_MASK_TX_RX ((IRQ_MASK_TX_ONLY)| (IRQ_MASK_RX_ONLY))
+#define IRQ_MASK_SP_RX ((SPECIAL_IRQS) | (IRQ_MASK_RX_ONLY))
+#define IRQ_MASK_SP_TX ((SPECIAL_IRQS) | (IRQ_MASK_TX_ONLY))
+#define IRQ_MASK_RX_TX_SP ((SPECIAL_IRQS) | (IRQ_MASK_TX_RX))
+
+#define C_INT_MOD_NONE 1
+#define C_INT_MOD_STATIC 2
+#define C_INT_MOD_DYNAMIC 4
+
+#define C_CLK_FREQ_GENESIS 53215000 /* shorter: 53.125 MHz */
+#define C_CLK_FREQ_YUKON 78215000 /* shorter: 78.125 MHz */
+
+#define C_INTS_PER_SEC_DEFAULT 2000
+#define C_INT_MOD_ENABLE_PERCENTAGE 50 /* if higher 50% enable */
+#define C_INT_MOD_DISABLE_PERCENTAGE 50 /* if lower 50% disable */
+
+typedef struct s_DynIrqModInfo DIM_INFO;
+struct s_DynIrqModInfo {
+ unsigned long PrevTimeVal;
+ unsigned int PrevSysLoad;
+ unsigned int PrevUsedTime;
+ unsigned int PrevTotalTime;
+ int PrevUsedDescrRatio;
+ int NbrProcessedDescr;
+ SK_U64 PrevPort0RxIntrCts;
+ SK_U64 PrevPort1RxIntrCts;
+ SK_U64 PrevPort0TxIntrCts;
+ SK_U64 PrevPort1TxIntrCts;
+ SK_BOOL ModJustEnabled; /* Moderation just enabled yes/no */
+
+ int MaxModIntsPerSec; /* Moderation Threshold */
+ int MaxModIntsPerSecUpperLimit; /* Upper limit for DIM */
+ int MaxModIntsPerSecLowerLimit; /* Lower limit for DIM */
+
+ long MaskIrqModeration; /* ModIrqType (eg. 'TxRx') */
+ SK_BOOL DisplayStats; /* Stats yes/no */
+ SK_BOOL AutoSizing; /* Resize DIM-timer on/off */
+ int IntModTypeSelect; /* EnableIntMod (eg. 'dynamic') */
+
+ SK_TIMER ModTimer; /* just some timer */
+};
+
typedef struct s_PerStrm PER_STRM;
#define SK_ALLOC_IRQ 0x00000001
@@ -446,11 +506,11 @@
int BoardLevel; /* level of active hw init (0-2) */
char DeviceStr[80]; /* adapter string from vpd */
SK_U32 AllocFlag; /* flag allocation of resources */
- struct pci_dev PciDev; /* for access to pci config space */
+ struct pci_dev *PciDev; /* for access to pci config space */
SK_U32 PciDevId; /* pci device id */
- struct net_device *dev[2]; /* pointer to device struct */
+ struct SK_NET_DEVICE *dev[2]; /* pointer to device struct */
char Name[30]; /* driver name */
- struct net_device *Next; /* link all devices (for clearing) */
+ struct SK_NET_DEVICE *Next; /* link all devices (for clearing) */
int RxBufSize; /* length of receive buffers */
struct net_device_stats stats; /* linux 'netstat -i' statistics */
int Index; /* internal board index number */
@@ -466,12 +526,12 @@
/* addresses for this board */
/* (may be more than HW can)*/
+ int HWRevision; /* Hardware revision */
int ActivePort; /* the active XMAC port */
int MaxPorts; /* number of activated ports */
int TxDescrPerRing; /* # of descriptors per tx ring */
int RxDescrPerRing; /* # of descriptors per rx ring */
-
caddr_t pDescrMem; /* Pointer to the descriptor area */
dma_addr_t pDescrMemDMA; /* PCI DMA address of area */
@@ -484,6 +544,12 @@
SK_U32 CsOfs; /* for checksum calculation */
SK_BOOL CheckQueue; /* check event queue soon */
+ SK_TIMER DrvCleanupTimer;/* to check for pending descriptors */
+ DIM_INFO DynIrqModInfo; /* all data related to DIM */
+
+ /* Only for tests */
+ int PortUp;
+ int PortDown;
};
diff -Nru a/drivers/net/sk98lin/h/skerror.h b/drivers/net/sk98lin/h/skerror.h
--- a/drivers/net/sk98lin/h/skerror.h Sun Aug 3 13:14:48 2003
+++ b/drivers/net/sk98lin/h/skerror.h Sun Aug 3 13:14:48 2003
@@ -1,17 +1,17 @@
/******************************************************************************
*
* Name: skerror.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.4 $
- * Date: $Date: 1999/11/22 13:51:59 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.7 $
+ * Date: $Date: 2003/05/13 17:25:13 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +26,15 @@
*
* History:
* $Log: skerror.h,v $
+ * Revision 1.7 2003/05/13 17:25:13 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.6 2003/03/31 07:17:48 mkarl
+ * Corrected Copyright.
+ *
+ * Revision 1.5 2002/04/25 11:05:10 rschmidt
+ * Editorial changes
+ *
* Revision 1.4 1999/11/22 13:51:59 cgoos
* Changed license header to GPL.
*
@@ -49,29 +58,29 @@
#define _INC_SKERROR_H_
/*
- * Define the Error Classes
+ * Define Error Classes
*/
-#define SK_ERRCL_OTHER (0) /* Other error */
+#define SK_ERRCL_OTHER (0) /* Other error */
#define SK_ERRCL_CONFIG (1L<<0) /* Configuration error */
#define SK_ERRCL_INIT (1L<<1) /* Initialization error */
-#define SK_ERRCL_NORES (1L<<2) /* Out of resources error */
-#define SK_ERRCL_SW (1L<<3) /* internal Software error */
-#define SK_ERRCL_HW (1L<<4) /* Hardware failure */
+#define SK_ERRCL_NORES (1L<<2) /* Out of Resources error */
+#define SK_ERRCL_SW (1L<<3) /* Internal Software error */
+#define SK_ERRCL_HW (1L<<4) /* Hardware Failure */
#define SK_ERRCL_COMM (1L<<5) /* Communication error */
/*
- * Define Error code bases
+ * Define Error Code Bases
*/
-#define SK_ERRBASE_RLMT 100 /* Base Error number for RLMT */
-#define SK_ERRBASE_HWINIT 200 /* Base Error number for HWInit */
-#define SK_ERRBASE_VPD 300 /* Base Error number for VPD */
-#define SK_ERRBASE_PNMI 400 /* Base Error number for PNMI */
-#define SK_ERRBASE_CSUM 500 /* Base Error number for Checksum */
-#define SK_ERRBASE_SIRQ 600 /* Base Error number for Special IRQ */
-#define SK_ERRBASE_I2C 700 /* Base Error number for i2C module */
-#define SK_ERRBASE_QUEUE 800 /* Base Error number for Scheduler */
-#define SK_ERRBASE_ADDR 900 /* Base Error number for Address mod. */
+#define SK_ERRBASE_RLMT 100 /* Base Error number for RLMT */
+#define SK_ERRBASE_HWINIT 200 /* Base Error number for HWInit */
+#define SK_ERRBASE_VPD 300 /* Base Error number for VPD */
+#define SK_ERRBASE_PNMI 400 /* Base Error number for PNMI */
+#define SK_ERRBASE_CSUM 500 /* Base Error number for Checksum */
+#define SK_ERRBASE_SIRQ 600 /* Base Error number for Special IRQ */
+#define SK_ERRBASE_I2C 700 /* Base Error number for I2C module */
+#define SK_ERRBASE_QUEUE 800 /* Base Error number for Scheduler */
+#define SK_ERRBASE_ADDR 900 /* Base Error number for Address module */
#define SK_ERRBASE_PECP 1000 /* Base Error number for PECP */
#define SK_ERRBASE_DRV 1100 /* Base Error number for Driver */
diff -Nru a/drivers/net/sk98lin/h/skgedrv.h b/drivers/net/sk98lin/h/skgedrv.h
--- a/drivers/net/sk98lin/h/skgedrv.h Sun Aug 3 13:14:50 2003
+++ b/drivers/net/sk98lin/h/skgedrv.h Sun Aug 3 13:14:50 2003
@@ -1,17 +1,17 @@
/******************************************************************************
*
* Name: skgedrv.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.4 $
- * Date: $Date: 1999/11/22 13:52:46 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.10 $
+ * Date: $Date: 2003/07/04 12:25:01 $
* Purpose: Interface with the driver
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +27,27 @@
* History:
*
* $Log: skgedrv.h,v $
+ * Revision 1.10 2003/07/04 12:25:01 rschmidt
+ * Added event SK_DRV_DOWNSHIFT_DET for Downshift 4-Pair / 2-Pair
+ *
+ * Revision 1.9 2003/05/13 17:24:21 mkarl
+ * Added events SK_DRV_LINK_UP and SK_DRV_LINK_DOWN for drivers not using
+ * RLMT (SK_NO_RLMT).
+ * Editorial changes.
+ *
+ * Revision 1.8 2003/03/31 07:18:54 mkarl
+ * Corrected Copyright.
+ *
+ * Revision 1.7 2003/03/18 09:43:47 rroesler
+ * Added new event for timer
+ *
+ * Revision 1.6 2002/07/15 15:38:01 rschmidt
+ * Power Management support
+ * Editorial changes
+ *
+ * Revision 1.5 2002/04/25 11:05:47 rschmidt
+ * Editorial changes
+ *
* Revision 1.4 1999/11/22 13:52:46 cgoos
* Changed license header to GPL.
*
@@ -49,17 +70,23 @@
/*
* Define the driver events.
- * Usually the events are defined by the destination module. In case of the
- * driver we put the definition of the events here.
+ * Usually the events are defined by the destination module.
+ * In case of the driver we put the definition of the events here.
*/
-#define SK_DRV_PORT_RESET 1 /* The port needs to be reset */
-#define SK_DRV_NET_UP 2 /* The net is now operational */
-#define SK_DRV_NET_DOWN 3 /* The net is now down */
-#define SK_DRV_SWITCH_SOFT 4 /* Ports switch with both links conn */
-#define SK_DRV_SWITCH_HARD 5 /* Port switch due to link failure */
-#define SK_DRV_RLMT_SEND 6 /* Send a RLMT packet */
-#define SK_DRV_ADAP_FAIL 7 /* The whole adapter fails */
-#define SK_DRV_PORT_FAIL 8 /* One port fails */
-#define SK_DRV_SWITCH_INTERN 9 /* Port switch from driver to itself */
-
-#endif /* __INC_SKGEDRV_H_ */
+#define SK_DRV_PORT_RESET 1 /* The port needs to be reset */
+#define SK_DRV_NET_UP 2 /* The net is operational */
+#define SK_DRV_NET_DOWN 3 /* The net is down */
+#define SK_DRV_SWITCH_SOFT 4 /* Ports switch with both links connected */
+#define SK_DRV_SWITCH_HARD 5 /* Port switch due to link failure */
+#define SK_DRV_RLMT_SEND 6 /* Send a RLMT packet */
+#define SK_DRV_ADAP_FAIL 7 /* The whole adapter fails */
+#define SK_DRV_PORT_FAIL 8 /* One port fails */
+#define SK_DRV_SWITCH_INTERN 9 /* Port switch by the driver itself */
+#define SK_DRV_POWER_DOWN 10 /* Power down mode */
+#define SK_DRV_TIMER 11 /* Timer for free use */
+#ifdef SK_NO_RLMT
+#define SK_DRV_LINK_UP 12 /* Link Up event for driver */
+#define SK_DRV_LINK_DOWN 13 /* Link Down event for driver */
+#endif
+#define SK_DRV_DOWNSHIFT_DET 14 /* Downshift 4-Pair / 2-Pair (YUKON only) */
+#endif /* __INC_SKGEDRV_H_ */
diff -Nru a/drivers/net/sk98lin/h/skgehw.h b/drivers/net/sk98lin/h/skgehw.h
--- a/drivers/net/sk98lin/h/skgehw.h Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sk98lin/h/skgehw.h Sun Aug 3 13:14:52 2003
@@ -1,17 +1,17 @@
/******************************************************************************
*
* Name: skgehw.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.36 $
- * Date: $Date: 2000/11/09 12:32:49 $
- * Purpose: Defines and Macros for the Gigabit Ethernet Adapter Product
- * Family
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.53 $
+ * Date: $Date: 2003/07/04 12:39:01 $
+ * Purpose: Defines and Macros for the Gigabit Ethernet Adapter Product Family
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2000 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +26,82 @@
*
* History:
* $Log: skgehw.h,v $
+ * Revision 1.53 2003/07/04 12:39:01 rschmidt
+ * Added SK_FAR to pointers in XM_IN32() and GM_IN32() macros (for PXE)
+ * Editorial changes
+ *
+ * Revision 1.52 2003/05/13 17:16:36 mkarl
+ * Added SK_FAR for PXE.
+ * Editorial changes.
+ *
+ * Revision 1.51 2003/04/08 16:31:50 rschmidt
+ * Added defines for new Chip IDs (YUKON-Lite, YUKON-LP)
+ * Editorial changes
+ *
+ * Revision 1.50 2003/03/31 07:29:45 mkarl
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.49 2003/01/28 09:43:49 rschmidt
+ * Added defines for PCI-Spec. 2.3 IRQ
+ * Added defines for CLK_RUN (YUKON-Lite)
+ * Editorial changes
+ *
+ * Revision 1.48 2002/12/05 10:25:11 rschmidt
+ * Added defines for Half Duplex Burst Mode On/Off
+ * Added defines for Rx GMAC FIFO Flush feature
+ * Editorial changes
+ *
+ * Revision 1.47 2002/11/12 17:01:31 rschmidt
+ * Added defines for WOL_CTL_DEFAULT
+ * Editorial changes
+ *
+ * Revision 1.46 2002/10/14 14:47:57 rschmidt
+ * Corrected bit mask for HW self test results
+ * Added defines for WOL Registers
+ * Editorial changes
+ *
+ * Revision 1.45 2002/10/11 09:25:22 mkarl
+ * Added bit mask for HW self test results.
+ *
+ * Revision 1.44 2002/08/16 14:44:36 rschmidt
+ * Added define GPC_HWCFG_GMII_FIB for YUKON Fiber
+ *
+ * Revision 1.43 2002/08/12 13:31:50 rschmidt
+ * Corrected macros for GMAC Address Registers: GM_INADDR(),
+ * GM_OUTADDR(), GM_INHASH, GM_OUTHASH.
+ * Editorial changes
+ *
+ * Revision 1.42 2002/08/08 15:37:56 rschmidt
+ * Added defines for Power Management Capabilities
+ * Editorial changes
+ *
+ * Revision 1.41 2002/07/23 16:02:25 rschmidt
+ * Added macro WOL_REG() to access WOL reg. (HW-Bug in YUKON 1st rev.)
+ *
+ * Revision 1.40 2002/07/15 15:41:37 rschmidt
+ * Added new defines for Power Management Cap. & Control
+ * Editorial changes
+ *
+ * Revision 1.39 2002/06/10 09:37:07 rschmidt
+ * Added macros for the ADDR-Modul
+ *
+ * Revision 1.38 2002/06/05 08:15:19 rschmidt
+ * Added defines for WOL Registers
+ * Editorial changes
+ *
+ * Revision 1.37 2002/04/25 11:39:23 rschmidt
+ * Added new defines for PCI Our Register 1
+ * Added new registers and defines for YUKON (Rx FIFO, Tx FIFO,
+ * Time Stamp Timer, GMAC Control, GPHY Control,Link Control,
+ * GMAC IRQ Source and Mask, Wake-up Frame Pattern Match);
+ * Added new defines for Control/Status (VAUX available)
+ * Added Chip ID for YUKON
+ * Added define for descriptors with UDP ext. for YUKON
+ * Added macros to access the GMAC
+ * Added new Phy Type for Marvell 88E1011S (GPHY)
+ * Editorial changes
+ *
* Revision 1.36 2000/11/09 12:32:49 rassmann
* Renamed variables.
*
@@ -36,7 +112,7 @@
* Changed license header to GPL.
*
* Revision 1.33 1999/08/27 11:17:10 malthoff
- * It's more savely to put bracket around marco parameters.
+ * It's more savely to put brackets around macro parameters.
* Brackets added for PHY_READ and PHY_WRITE.
*
* Revision 1.32 1999/05/19 07:31:01 cgoos
@@ -50,7 +126,7 @@
* Add PCI_ERRBITS.
*
* Revision 1.29 1999/01/26 08:55:48 malthoff
- * Bugfix: The 16 bit field releations inside the descriptor are
+ * Bugfix: The 16 bit field relations inside the descriptor are
* endianess dependend if the descriptor reversal feature
* (PCI_REV_DESC bit in PCI_OUR_REG_2) is enabled.
* Drivers which use this feature has to set the define
@@ -91,7 +167,7 @@
* fix: typo B0_XM_IMSK regs
*
* Revision 1.18 1998/10/16 09:46:54 malthoff
- * Remove temp defines for ML diag prototyp.
+ * Remove temp defines for ML diag prototype.
* Fix register definition for B0_XM1_PHY_DATA, B0_XM1_PHY_DATA
* B0_XM2_PHY_DATA, B0_XM2_PHY_ADDR, B0_XA1_CSR, B0_XS1_CSR,
* B0_XS2_CSR, and B0_XA2_CSR.
@@ -133,7 +209,7 @@
*
* Revision 1.10 1998/09/02 11:16:39 malthoff
* Temporary modify B2_I2C_SW to make tests with
- * the GE/ML prototyp.
+ * the GE/ML prototype.
*
* Revision 1.9 1998/08/19 09:11:49 gklug
* fix: struct are removed from c-source (see CCC)
@@ -145,7 +221,7 @@
*
* Revision 1.7 1998/07/03 14:42:26 malthoff
* bug fix: Correct macro XMA().
- * Add temporary workaround to access the PCI config space over IO
+ * Add temporary workaround to access the PCI config space over I/O
*
* Revision 1.6 1998/06/23 11:30:36 malthoff
* Remove ';' with ',' in macors.
@@ -174,38 +250,120 @@
/* defines ********************************************************************/
+#define BIT_31 (1UL << 31)
+#define BIT_30 (1L << 30)
+#define BIT_29 (1L << 29)
+#define BIT_28 (1L << 28)
+#define BIT_27 (1L << 27)
+#define BIT_26 (1L << 26)
+#define BIT_25 (1L << 25)
+#define BIT_24 (1L << 24)
+#define BIT_23 (1L << 23)
+#define BIT_22 (1L << 22)
+#define BIT_21 (1L << 21)
+#define BIT_20 (1L << 20)
+#define BIT_19 (1L << 19)
+#define BIT_18 (1L << 18)
+#define BIT_17 (1L << 17)
+#define BIT_16 (1L << 16)
+#define BIT_15 (1L << 15)
+#define BIT_14 (1L << 14)
+#define BIT_13 (1L << 13)
+#define BIT_12 (1L << 12)
+#define BIT_11 (1L << 11)
+#define BIT_10 (1L << 10)
+#define BIT_9 (1L << 9)
+#define BIT_8 (1L << 8)
+#define BIT_7 (1L << 7)
+#define BIT_6 (1L << 6)
+#define BIT_5 (1L << 5)
+#define BIT_4 (1L << 4)
+#define BIT_3 (1L << 3)
+#define BIT_2 (1L << 2)
+#define BIT_1 (1L << 1)
+#define BIT_0 1L
+
+#define BIT_15S (1U << 15)
+#define BIT_14S (1 << 14)
+#define BIT_13S (1 << 13)
+#define BIT_12S (1 << 12)
+#define BIT_11S (1 << 11)
+#define BIT_10S (1 << 10)
+#define BIT_9S (1 << 9)
+#define BIT_8S (1 << 8)
+#define BIT_7S (1 << 7)
+#define BIT_6S (1 << 6)
+#define BIT_5S (1 << 5)
+#define BIT_4S (1 << 4)
+#define BIT_3S (1 << 3)
+#define BIT_2S (1 << 2)
+#define BIT_1S (1 << 1)
+#define BIT_0S 1
+
+#define SHIFT31(x) ((x) << 31)
+#define SHIFT30(x) ((x) << 30)
+#define SHIFT29(x) ((x) << 29)
+#define SHIFT28(x) ((x) << 28)
+#define SHIFT27(x) ((x) << 27)
+#define SHIFT26(x) ((x) << 26)
+#define SHIFT25(x) ((x) << 25)
+#define SHIFT24(x) ((x) << 24)
+#define SHIFT23(x) ((x) << 23)
+#define SHIFT22(x) ((x) << 22)
+#define SHIFT21(x) ((x) << 21)
+#define SHIFT20(x) ((x) << 20)
+#define SHIFT19(x) ((x) << 19)
+#define SHIFT18(x) ((x) << 18)
+#define SHIFT17(x) ((x) << 17)
+#define SHIFT16(x) ((x) << 16)
+#define SHIFT15(x) ((x) << 15)
+#define SHIFT14(x) ((x) << 14)
+#define SHIFT13(x) ((x) << 13)
+#define SHIFT12(x) ((x) << 12)
+#define SHIFT11(x) ((x) << 11)
+#define SHIFT10(x) ((x) << 10)
+#define SHIFT9(x) ((x) << 9)
+#define SHIFT8(x) ((x) << 8)
+#define SHIFT7(x) ((x) << 7)
+#define SHIFT6(x) ((x) << 6)
+#define SHIFT5(x) ((x) << 5)
+#define SHIFT4(x) ((x) << 4)
+#define SHIFT3(x) ((x) << 3)
+#define SHIFT2(x) ((x) << 2)
+#define SHIFT1(x) ((x) << 1)
+#define SHIFT0(x) ((x) << 0)
+
/*
* Configuration Space header
* Since this module is used for different OS', those may be
* duplicate on some of them (e.g. Linux). But to keep the
* common source, we have to live with this...
*/
-#define PCI_VENDOR_ID 0x00 /* 16 bit Vendor ID */
-#define PCI_DEVICE_ID 0x02 /* 16 bit Device ID */
-#define PCI_COMMAND 0x04 /* 16 bit Command */
-#define PCI_STATUS 0x06 /* 16 bit Status */
-#define PCI_REV_ID 0x08 /* 8 bit Revision ID */
-#define PCI_CLASS_CODE 0x09 /* 24 bit Class Code */
-#define PCI_CACHE_LSZ 0x0c /* 8 bit Cache Line Size */
-#define PCI_LAT_TIM 0x0d /* 8 bit Latency Timer */
-#define PCI_HEADER_T 0x0e /* 8 bit Header Type */
-#define PCI_BIST 0x0f /* 8 bit Built-in selftest */
-#define PCI_BASE_1ST 0x10 /* 32 bit 1st Base address */
-#define PCI_BASE_2ND 0x14 /* 32 bit 2nd Base address */
- /* Byte 18..2b: reserved */
-#define PCI_SUB_VID 0x2c /* 16 bit Subsystem Vendor ID */
-#define PCI_SUB_ID 0x2e /* 16 bit Subsystem ID */
-#define PCI_BASE_ROM 0x30 /* 32 bit Expansion ROM Base Address */
- /* Byte 34..33: reserved */
+#define PCI_VENDOR_ID 0x00 /* 16 bit Vendor ID */
+#define PCI_DEVICE_ID 0x02 /* 16 bit Device ID */
+#define PCI_COMMAND 0x04 /* 16 bit Command */
+#define PCI_STATUS 0x06 /* 16 bit Status */
+#define PCI_REV_ID 0x08 /* 8 bit Revision ID */
+#define PCI_CLASS_CODE 0x09 /* 24 bit Class Code */
+#define PCI_CACHE_LSZ 0x0c /* 8 bit Cache Line Size */
+#define PCI_LAT_TIM 0x0d /* 8 bit Latency Timer */
+#define PCI_HEADER_T 0x0e /* 8 bit Header Type */
+#define PCI_BIST 0x0f /* 8 bit Built-in selftest */
+#define PCI_BASE_1ST 0x10 /* 32 bit 1st Base address */
+#define PCI_BASE_2ND 0x14 /* 32 bit 2nd Base address */
+ /* Byte 0x18..0x2b: reserved */
+#define PCI_SUB_VID 0x2c /* 16 bit Subsystem Vendor ID */
+#define PCI_SUB_ID 0x2e /* 16 bit Subsystem ID */
+#define PCI_BASE_ROM 0x30 /* 32 bit Expansion ROM Base Address */
#define PCI_CAP_PTR 0x34 /* 8 bit Capabilities Ptr */
- /* Byte 35..3b: reserved */
-#define PCI_IRQ_LINE 0x3c /* 8 bit Interrupt Line */
-#define PCI_IRQ_PIN 0x3d /* 8 bit Interrupt Pin */
-#define PCI_MIN_GNT 0x3e /* 8 bit Min_Gnt */
-#define PCI_MAX_LAT 0x3f /* 8 bit Max_Lat */
+ /* Byte 0x35..0x3b: reserved */
+#define PCI_IRQ_LINE 0x3c /* 8 bit Interrupt Line */
+#define PCI_IRQ_PIN 0x3d /* 8 bit Interrupt Pin */
+#define PCI_MIN_GNT 0x3e /* 8 bit Min_Gnt */
+#define PCI_MAX_LAT 0x3f /* 8 bit Max_Lat */
/* Device Dependent Region */
-#define PCI_OUR_REG_1 0x40 /* 32 bit Our Register 1 */
-#define PCI_OUR_REG_2 0x44 /* 32 bit Our Register 2 */
+#define PCI_OUR_REG_1 0x40 /* 32 bit Our Register 1 */
+#define PCI_OUR_REG_2 0x44 /* 32 bit Our Register 2 */
/* Power Management Region */
#define PCI_PM_CAP_ID 0x48 /* 8 bit Power Management Cap. ID */
#define PCI_PM_NITEM 0x49 /* 8 bit Next Item Ptr */
@@ -214,11 +372,13 @@
/* Byte 0x4e: reserved */
#define PCI_PM_DAT_REG 0x4f /* 8 bit Power Manag. Data Register */
/* VPD Region */
-#define PCI_VPD_CAP_ID 0x50 /* 8 bit VPD Cap. ID */
+#define PCI_VPD_CAP_ID 0x50 /* 8 bit VPD Cap. ID */
#define PCI_VPD_NITEM 0x51 /* 8 bit Next Item Ptr */
#define PCI_VPD_ADR_REG 0x52 /* 16 bit VPD Address Register */
#define PCI_VPD_DAT_REG 0x54 /* 32 bit VPD Data Register */
- /* Byte 58..ff: reserved */
+ /* Byte 0x58..0x59: reserved */
+#define PCI_SER_LD_CTRL 0x5a /* 16 bit SEEPROM Loader Ctrl (YUKON only) */
+ /* Byte 0x5c..0xff: reserved */
/*
* I2C Address (PCI Config)
@@ -226,43 +386,45 @@
* Note: The temperature and voltage sensors are relocated on a different
* I2C bus.
*/
-#define I2C_ADDR_VPD 0xA0 /* I2C address for the VPD EEPROM */
+#define I2C_ADDR_VPD 0xa0 /* I2C address for the VPD EEPROM */
/*
* Define Bits and Values of the registers
*/
-/* PCI_VENDOR_ID 16 bit Vendor ID */
-/* PCI_DEVICE_ID 16 bit Device ID */
-/* Values for Vendor ID and Device ID shall be patched into the code */
/* PCI_COMMAND 16 bit Command */
- /* Bit 15..10: reserved */
-#define PCI_FBTEN (1<<9) /* Bit 9: Fast Back-To-Back enable */
-#define PCI_SERREN (1<<8) /* Bit 8: SERR enable */
-#define PCI_ADSTEP (1<<7) /* Bit 7: Address Stepping */
-#define PCI_PERREN (1<<6) /* Bit 6: Parity Report Response enable */
-#define PCI_VGA_SNOOP (1<<5) /* Bit 5: VGA palette snoop */
-#define PCI_MWIEN (1<<4) /* Bit 4: Memory write an inv cycl ena */
-#define PCI_SCYCEN (1<<3) /* Bit 3: Special Cycle enable */
-#define PCI_BMEN (1<<2) /* Bit 2: Bus Master enable */
-#define PCI_MEMEN (1<<1) /* Bit 1: Memory Space Access enable */
-#define PCI_IOEN (1<<0) /* Bit 0: IO Space Access enable */
+ /* Bit 15..11: reserved */
+#define PCI_INT_DIS BIT_10S /* Interrupt INTx# disable (PCI 2.3) */
+#define PCI_FBTEN BIT_9S /* Fast Back-To-Back enable */
+#define PCI_SERREN BIT_8S /* SERR enable */
+#define PCI_ADSTEP BIT_7S /* Address Stepping */
+#define PCI_PERREN BIT_6S /* Parity Report Response enable */
+#define PCI_VGA_SNOOP BIT_5S /* VGA palette snoop */
+#define PCI_MWIEN BIT_4S /* Memory write an inv cycl ena */
+#define PCI_SCYCEN BIT_3S /* Special Cycle enable */
+#define PCI_BMEN BIT_2S /* Bus Master enable */
+#define PCI_MEMEN BIT_1S /* Memory Space Access enable */
+#define PCI_IOEN BIT_0S /* I/O Space Access enable */
+
+#define PCI_COMMAND_VAL (PCI_FBTEN | PCI_SERREN | PCI_PERREN | PCI_MWIEN |\
+ PCI_BMEN | PCI_MEMEN | PCI_IOEN)
/* PCI_STATUS 16 bit Status */
-#define PCI_PERR (1<<15) /* Bit 15: Parity Error */
-#define PCI_SERR (1<<14) /* Bit 14: Signaled SERR */
-#define PCI_RMABORT (1<<13) /* Bit 13: Received Master Abort */
-#define PCI_RTABORT (1<<12) /* Bit 12: Received Target Abort */
+#define PCI_PERR BIT_15S /* Parity Error */
+#define PCI_SERR BIT_14S /* Signaled SERR */
+#define PCI_RMABORT BIT_13S /* Received Master Abort */
+#define PCI_RTABORT BIT_12S /* Received Target Abort */
/* Bit 11: reserved */
-#define PCI_DEVSEL (3<<9) /* Bit 10..9: DEVSEL Timing */
-#define PCI_DEV_FAST (0<<9) /* fast */
-#define PCI_DEV_MEDIUM (1<<9) /* medium */
-#define PCI_DEV_SLOW (2<<9) /* slow */
-#define PCI_DATAPERR (1<<8) /* Bit 8: DATA Parity error detected */
-#define PCI_FB2BCAP (1<<7) /* Bit 7: Fast Back-to-Back Capability */
-#define PCI_UDF (1<<6) /* Bit 6: User Defined Features */
-#define PCI_66MHZCAP (1<<5) /* Bit 5: 66 MHz PCI bus clock capable */
-#define PCI_NEWCAP (1<<4) /* Bit 4: New cap. list implemented */
- /* Bit 3..0: reserved */
+#define PCI_DEVSEL (3<<9) /* Bit 10.. 9: DEVSEL Timing */
+#define PCI_DEV_FAST (0<<9) /* fast */
+#define PCI_DEV_MEDIUM (1<<9) /* medium */
+#define PCI_DEV_SLOW (2<<9) /* slow */
+#define PCI_DATAPERR BIT_8S /* DATA Parity error detected */
+#define PCI_FB2BCAP BIT_7S /* Fast Back-to-Back Capability */
+#define PCI_UDF BIT_6S /* User Defined Features */
+#define PCI_66MHZCAP BIT_5S /* 66 MHz PCI bus clock capable */
+#define PCI_NEWCAP BIT_4S /* New cap. list implemented */
+#define PCI_INT_STAT BIT_3S /* Interrupt INTx# Status (PCI 2.3) */
+ /* Bit 2.. 0: reserved */
#define PCI_ERRBITS (PCI_PERR | PCI_SERR | PCI_RMABORT | PCI_RTABORT |\
PCI_DATAPERR)
@@ -276,159 +438,167 @@
/* Possible values: 0,2,4,8,16,32,64,128 */
/* PCI_HEADER_T 8 bit Header Type */
-#define PCI_HD_MF_DEV (1<<7) /* Bit 7: 0= single, 1= multi-func dev */
-#define PCI_HD_TYPE 0x7f /* Bit 6..0: Header Layout 0= normal */
+#define PCI_HD_MF_DEV BIT_7S /* 0= single, 1= multi-func dev */
+#define PCI_HD_TYPE 0x7f /* Bit 6..0: Header Layout 0= normal */
/* PCI_BIST 8 bit Built-in selftest */
/* Built-in Self test not supported (optional) */
/* PCI_BASE_1ST 32 bit 1st Base address */
-#define PCI_MEMSIZE 0x4000L /* use 16 kB Memory Base */
-#define PCI_MEMBASE_MSK 0xffffc000L /* Bit 31..14: Memory Base Address */
-#define PCI_MEMSIZE_MSK 0x00003ff0L /* Bit 13.. 4: Memory Size Req. */
-#define PCI_PREFEN (1L<<3) /* Bit 3: Prefetchable */
-#define PCI_MEM_TYP (3L<<2) /* Bit 2.. 1: Memory Type */
-#define PCI_MEM32BIT (0L<<1) /* Base addr anywhere in 32 Bit range */
-#define PCI_MEM1M (1L<<1) /* Base addr below 1 MegaByte */
-#define PCI_MEM64BIT (2L<<1) /* Base addr anywhere in 64 Bit range */
-#define PCI_MEMSPACE (1L<<0) /* Bit 0: Memory Space Indic. */
+#define PCI_MEMSIZE 0x4000L /* use 16 kB Memory Base */
+#define PCI_MEMBASE_MSK 0xffffc000L /* Bit 31..14: Memory Base Address */
+#define PCI_MEMSIZE_MSK 0x00003ff0L /* Bit 13.. 4: Memory Size Req. */
+#define PCI_PREFEN BIT_3 /* Prefetchable */
+#define PCI_MEM_TYP (3L<<2) /* Bit 2.. 1: Memory Type */
+#define PCI_MEM32BIT (0L<<1) /* Base addr anywhere in 32 Bit range */
+#define PCI_MEM1M (1L<<1) /* Base addr below 1 MegaByte */
+#define PCI_MEM64BIT (2L<<1) /* Base addr anywhere in 64 Bit range */
+#define PCI_MEMSPACE BIT_0 /* Memory Space Indicator */
/* PCI_BASE_2ND 32 bit 2nd Base address */
-#define PCI_IOBASE 0xffffff00L /* Bit 31..8: I/O Base address */
-#define PCI_IOSIZE 0x000000fcL /* Bit 7..2: I/O Size Requirements */
+#define PCI_IOBASE 0xffffff00L /* Bit 31.. 8: I/O Base address */
+#define PCI_IOSIZE 0x000000fcL /* Bit 7.. 2: I/O Size Requirements */
/* Bit 1: reserved */
-#define PCI_IOSPACE (1L<<0) /* Bit 0: I/O Space Indicator */
+#define PCI_IOSPACE BIT_0 /* I/O Space Indicator */
/* PCI_BASE_ROM 32 bit Expansion ROM Base Address */
-#define PCI_ROMBASE (0xfffeL<<17) /* Bit 31..17: ROM BASE address (1st)*/
-#define PCI_ROMBASZ (0x1cL<<14) /* Bit 16..14: Treat as BASE or SIZE */
-#define PCI_ROMSIZE (0x38L<<11) /* Bit 13..11: ROM Size Requirements */
+#define PCI_ROMBASE_MSK 0xfffe0000L /* Bit 31..17: ROM Base address */
+#define PCI_ROMBASE_SIZ (0x1cL<<14) /* Bit 16..14: Treat as Base or Size */
+#define PCI_ROMSIZE (0x38L<<11) /* Bit 13..11: ROM Size Requirements */
/* Bit 10.. 1: reserved */
-#define PCI_ROMEN (0x1L<<0) /* Bit 0: Address Decode enable */
+#define PCI_ROMEN BIT_0 /* Address Decode enable */
/* Device Dependent Region */
/* PCI_OUR_REG_1 32 bit Our Register 1 */
- /* Bit 31..26: reserved */
-#define PCI_VIO (1L<<25) /* Bit 25: PCI IO Voltage, */
- /* 0 = 3.3V / 1 = 5V */
-#define PCI_EN_BOOT (1L<<24) /* Bit 24: Enable BOOT via ROM */
- /* 1 = Don't boot wth ROM*/
- /* 0 = Boot with ROM */
-#define PCI_EN_IO (1L<<23) /* Bit 23: Mapping to IO space */
-#define PCI_EN_FPROM (1L<<22) /* Bit 22: FLASH mapped to mem? */
- /* 1 = Map Flash to Mem */
- /* 0 = Disable addr. dec*/
-#define PCI_PAGESIZE (3L<<20) /* Bit 21..20: FLASH Page Size */
-#define PCI_PAGE_16 (0L<<20) /* 16 k pages */
-#define PCI_PAGE_32K (1L<<20) /* 32 k pages */
-#define PCI_PAGE_64K (2L<<20) /* 64 k pages */
-#define PCI_PAGE_128K (3L<<20) /* 128 k pages */
+ /* Bit 31..29: reserved */
+#define PCI_PHY_COMA BIT_28 /* Set PHY to Coma Mode (YUKON only) */
+#define PCI_TEST_CAL BIT_27 /* Test PCI buffer calib. (YUKON only) */
+#define PCI_EN_CAL BIT_26 /* Enable PCI buffer calib. (YUKON only) */
+#define PCI_VIO BIT_25 /* PCI I/O Voltage, 0 = 3.3V, 1 = 5V */
+#define PCI_DIS_BOOT BIT_24 /* Disable BOOT via ROM */
+#define PCI_EN_IO BIT_23 /* Mapping to I/O space */
+#define PCI_EN_FPROM BIT_22 /* Enable FLASH mapping to memory */
+ /* 1 = Map Flash to memory */
+ /* 0 = Disable addr. dec */
+#define PCI_PAGESIZE (3L<<20) /* Bit 21..20: FLASH Page Size */
+#define PCI_PAGE_16 (0L<<20) /* 16 k pages */
+#define PCI_PAGE_32K (1L<<20) /* 32 k pages */
+#define PCI_PAGE_64K (2L<<20) /* 64 k pages */
+#define PCI_PAGE_128K (3L<<20) /* 128 k pages */
/* Bit 19: reserved */
-#define PCI_PAGEREG (7L<<16) /* Bit 18..16: Page Register */
-#define PCI_NOTAR (1L<<15) /* Bit 15: No turnaround cycle */
-#define PCI_FORCE_BE (1L<<14) /* Bit 14: Assert all BEs on MR */
-#define PCI_DIS_MRL (1L<<13) /* Bit 13: Disable Mem R Line */
-#define PCI_DIS_MRM (1L<<12) /* Bit 12: Disable Mem R multip */
-#define PCI_DIS_MWI (1L<<11) /* Bit 11: Disable Mem W & inv */
-#define PCI_DISC_CLS (1L<<10) /* Bit 10: Disc: cacheLsz bound */
-#define PCI_BURST_DIS (1L<<9) /* Bit 9: Burst Disable */
-#define PCI_DIS_PCI_CLK (1L<<8) /* Bit 8: Disable PCI clock driv*/
-#define PCI_SKEW_DAS (0xfL<<4) /* Bit 7..4: Skew Ctrl, DAS Ext */
-#define PCI_SKEW_BASE (0xfL<<0) /* Bit 3..0: Skew Ctrl, Base */
+#define PCI_PAGEREG (7L<<16) /* Bit 18..16: Page Register */
+#define PCI_NOTAR BIT_15 /* No turnaround cycle */
+#define PCI_FORCE_BE BIT_14 /* Assert all BEs on MR */
+#define PCI_DIS_MRL BIT_13 /* Disable Mem Read Line */
+#define PCI_DIS_MRM BIT_12 /* Disable Mem Read Multiple */
+#define PCI_DIS_MWI BIT_11 /* Disable Mem Write & Invalidate */
+#define PCI_DISC_CLS BIT_10 /* Disc: cacheLsz bound */
+#define PCI_BURST_DIS BIT_9 /* Burst Disable */
+#define PCI_DIS_PCI_CLK BIT_8 /* Disable PCI clock driving */
+#define PCI_SKEW_DAS (0xfL<<4) /* Bit 7.. 4: Skew Ctrl, DAS Ext */
+#define PCI_SKEW_BASE 0xfL /* Bit 3.. 0: Skew Ctrl, Base */
/* PCI_OUR_REG_2 32 bit Our Register 2 */
#define PCI_VPD_WR_THR (0xffL<<24) /* Bit 31..24: VPD Write Threshold */
-#define PCI_DEV_SEL (0x7fL<<17) /* Bit 23..17: EEPROM Device Select */
-#define PCI_VPD_ROM_SZ (7L<<14) /* Bit 16..14: VPD ROM Size */
+#define PCI_DEV_SEL (0x7fL<<17) /* Bit 23..17: EEPROM Device Select */
+#define PCI_VPD_ROM_SZ (7L<<14) /* Bit 16..14: VPD ROM Size */
/* Bit 13..12: reserved */
-#define PCI_PATCH_DIR (0xfL<<8) /* Bit 11.. 8: Ext Patchs dir 3..0 */
-#define PCI_PATCH_DIR_0 (1L<<8)
-#define PCI_PATCH_DIR_1 (1L<<9)
-#define PCI_PATCH_DIR_2 (1L<<10)
-#define PCI_PATCH_DIR_3 (1L<<11)
-#define PCI_EXT_PATCHS (0xfL<<4) /* Bit 7..4: Extended Patches 3..0 */
-#define PCI_EXT_PATCH_0 (1L<<4)
-#define PCI_EXT_PATCH_1 (1L<<5)
-#define PCI_EXT_PATCH_2 (1L<<6)
-#define PCI_EXT_PATCH_3 (1L<<7)
-#define PCI_EN_DUMMY_RD (1L<<3) /* Bit 3: Enable Dummy Read */
-#define PCI_REV_DESC (1L<<2) /* Bit 2: Reverse Desc. Bytes */
+#define PCI_PATCH_DIR (0xfL<<8) /* Bit 11.. 8: Ext Patches dir 3..0 */
+#define PCI_PATCH_DIR_3 BIT_11
+#define PCI_PATCH_DIR_2 BIT_10
+#define PCI_PATCH_DIR_1 BIT_9
+#define PCI_PATCH_DIR_0 BIT_8
+#define PCI_EXT_PATCHS (0xfL<<4) /* Bit 7.. 4: Extended Patches 3..0 */
+#define PCI_EXT_PATCH_3 BIT_7
+#define PCI_EXT_PATCH_2 BIT_6
+#define PCI_EXT_PATCH_1 BIT_5
+#define PCI_EXT_PATCH_0 BIT_4
+#define PCI_EN_DUMMY_RD BIT_3 /* Enable Dummy Read */
+#define PCI_REV_DESC BIT_2 /* Reverse Desc. Bytes */
/* Bit 1: reserved */
-#define PCI_USEDATA64 (1L<<0) /* Bit 0: Use 64Bit Data bus ext*/
+#define PCI_USEDATA64 BIT_0 /* Use 64Bit Data bus ext */
/* Power Management Region */
/* PCI_PM_CAP_REG 16 bit Power Management Capabilities */
-#define PCI_PME_SUP (0x1f<<11) /* Bit 15..11: PM Manag. Event Sup */
-#define PCI_PM_D2_SUB (1<<10) /* Bit 10: D2 Support Bit */
-#define PCI_PM_D1_SUB (1<<9) /* Bit 9: D1 Support Bit */
- /* Bit 8..6: reserved */
-#define PCI_PM_DSI (1<<5) /* Bit 5: Device Specific Init.*/
-#define PCI_PM_APS (1<<4) /* Bit 4: Auxialiary Power Src */
-#define PCI_PME_CLOCK (1<<3) /* Bit 3: PM Event Clock */
-#define PCI_PM_VER (7<<0) /* Bit 2..0: PM PCI Spec. version */
-
-/* PCI_PM_CTL_STS 16 bit Power Manag. Control/Status */
-#define PCI_PME_STATUS (1<<15) /* Bit 15: PGA doesn't sup. PME# */
-#define PCI_PM_DAT_SCL (3<<13) /* Bit 14..13: dat reg Scaling factor*/
-#define PCI_PM_DAT_SEL (0xf<<9) /* Bit 12.. 9: PM data selector field*/
-#define PCI_PME_EN (1<<8) /* Bit 8: PGA doesn't sup. PME# */
+#define PCI_PME_SUP_MSK (0x1f<<11) /* Bit 15..11: PM Event Support Mask */
+#define PCI_PME_D3C_SUP BIT_15S /* PME from D3cold Support (if Vaux) */
+#define PCI_PME_D3H_SUP BIT_14S /* PME from D3hot Support */
+#define PCI_PME_D2_SUP BIT_13S /* PME from D2 Support */
+#define PCI_PME_D1_SUP BIT_12S /* PME from D1 Support */
+#define PCI_PME_D0_SUP BIT_11S /* PME from D0 Support */
+#define PCI_PM_D2_SUP BIT_10S /* D2 Support in 33 MHz mode */
+#define PCI_PM_D1_SUP BIT_9S /* D1 Support */
+ /* Bit 8.. 6: reserved */
+#define PCI_PM_DSI BIT_5S /* Device Specific Initialization */
+#define PCI_PM_APS BIT_4S /* Auxialiary Power Source */
+#define PCI_PME_CLOCK BIT_3S /* PM Event Clock */
+#define PCI_PM_VER_MSK 7 /* Bit 2.. 0: PM PCI Spec. version */
+
+/* PCI_PM_CTL_STS 16 bit Power Management Control/Status */
+#define PCI_PME_STATUS BIT_15S /* PME Status (YUKON only) */
+#define PCI_PM_DAT_SCL (3<<13) /* Bit 14..13: Data Reg. scaling factor */
+#define PCI_PM_DAT_SEL (0xf<<9) /* Bit 12.. 9: PM data selector field */
+#define PCI_PME_EN BIT_8S /* Enable PME# generation (YUKON only) */
/* Bit 7.. 2: reserved */
-#define PCI_PM_STATE (3<<0) /* Bit 1.. 0: Power Management State*/
-#define PCI_PM_STATE_D0 (0<<0) /* D0: Operational (default) */
-#define PCI_PM_STATE_D1 (1<<0) /* D1: not supported */
-#define PCI_PM_STATE_D2 (2<<0) /* D2: not supported */
-#define PCI_PM_STATE_D3 (3<<0) /* D3: HOT, Power Down and Reset */
+#define PCI_PM_STATE_MSK 3 /* Bit 1.. 0: Power Management State */
+
+#define PCI_PM_STATE_D0 0 /* D0: Operational (default) */
+#define PCI_PM_STATE_D1 1 /* D1: (YUKON only) */
+#define PCI_PM_STATE_D2 2 /* D2: (YUKON only) */
+#define PCI_PM_STATE_D3 3 /* D3: HOT, Power Down and Reset */
/* VPD Region */
/* PCI_VPD_ADR_REG 16 bit VPD Address Register */
-#define PCI_VPD_FLAG (1L<<15) /* Bit 15: starts VPD rd/wd cycle*/
+#define PCI_VPD_FLAG BIT_15S /* starts VPD rd/wr cycle */
+#define PCI_VPD_ADR_MSK 0x7fffL /* Bit 14.. 0: VPD address mask */
+
+/* Control Register File (Address Map) */
/*
- * Control Register File:
* Bank 0
*/
-#define B0_RAP 0x0000 /* 8 bit Register Address Port */
+#define B0_RAP 0x0000 /* 8 bit Register Address Port */
/* 0x0001 - 0x0003: reserved */
-#define B0_CTST 0x0004 /* 16 bit Control/Status register */
-#define B0_LED 0x0006 /* 8 Bit LED register */
- /* 0x0007: reserved */
-#define B0_ISRC 0x0008 /* 32 bit Interrupt Source Register */
-#define B0_IMSK 0x000c /* 32 bit Interrupt Mask Register */
+#define B0_CTST 0x0004 /* 16 bit Control/Status register */
+#define B0_LED 0x0006 /* 8 Bit LED register */
+#define B0_POWER_CTRL 0x0007 /* 8 Bit Power Control reg (YUKON only) */
+#define B0_ISRC 0x0008 /* 32 bit Interrupt Source Register */
+#define B0_IMSK 0x000c /* 32 bit Interrupt Mask Register */
#define B0_HWE_ISRC 0x0010 /* 32 bit HW Error Interrupt Src Reg */
#define B0_HWE_IMSK 0x0014 /* 32 bit HW Error Interrupt Mask Reg */
#define B0_SP_ISRC 0x0018 /* 32 bit Special Interrupt Source Reg */
/* 0x001c: reserved */
-/* B0 XMAC 1 registers */
-#define B0_XM1_IMSK 0x0020 /* 16 bit r/w XMAC 1 Interrupt Mask Register*/
- /* 0x0022 - 0x0027 reserved */
+/* B0 XMAC 1 registers (GENESIS only) */
+#define B0_XM1_IMSK 0x0020 /* 16 bit r/w XMAC 1 Interrupt Mask Register*/
+ /* 0x0022 - 0x0027: reserved */
#define B0_XM1_ISRC 0x0028 /* 16 bit ro XMAC 1 Interrupt Status Reg */
- /* 0x002a - 0x002f reserved */
+ /* 0x002a - 0x002f: reserved */
#define B0_XM1_PHY_ADDR 0x0030 /* 16 bit r/w XMAC 1 PHY Address Register */
- /* 0x0032 - 0x0033 reserved */
+ /* 0x0032 - 0x0033: reserved */
#define B0_XM1_PHY_DATA 0x0034 /* 16 bit r/w XMAC 1 PHY Data Register */
- /* 0x0036 - 0x003f reserved */
+ /* 0x0036 - 0x003f: reserved */
-/* B0 XMAC 2 registers */
-#define B0_XM2_IMSK 0x0040 /* 16 bit r/w XMAC 2 Interrupt Mask Register*/
- /* 0x0042 - 0x0047 reserved */
+/* B0 XMAC 2 registers (GENESIS only) */
+#define B0_XM2_IMSK 0x0040 /* 16 bit r/w XMAC 2 Interrupt Mask Register*/
+ /* 0x0042 - 0x0047: reserved */
#define B0_XM2_ISRC 0x0048 /* 16 bit ro XMAC 2 Interrupt Status Reg */
- /* 0x004a - 0x004f reserved */
+ /* 0x004a - 0x004f: reserved */
#define B0_XM2_PHY_ADDR 0x0050 /* 16 bit r/w XMAC 2 PHY Address Register */
- /* 0x0052 - 0x0053 reserved */
+ /* 0x0052 - 0x0053: reserved */
#define B0_XM2_PHY_DATA 0x0054 /* 16 bit r/w XMAC 2 PHY Data Register */
- /* 0x0056 - 0x005f reserved */
+ /* 0x0056 - 0x005f: reserved */
/* BMU Control Status Registers */
-#define B0_R1_CSR 0x0060 /* 32 bit BMU Ctrl/Stat Rx Queue 1 */
-#define B0_R2_CSR 0x0064 /* 32 bit BMU Ctrl/Stat Rx Queue 2 */
-#define B0_XS1_CSR 0x0068 /* 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */
-#define B0_XA1_CSR 0x006c /* 32 bit BMU Ctrl/Stat Async Tx Queue 1*/
-#define B0_XS2_CSR 0x0070 /* 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
-#define B0_XA2_CSR 0x0074 /* 32 bit BMU Ctrl/Stat Async Tx Queue 2*/
- /* x0078 - 0x007f reserved */
+#define B0_R1_CSR 0x0060 /* 32 bit BMU Ctrl/Stat Rx Queue 1 */
+#define B0_R2_CSR 0x0064 /* 32 bit BMU Ctrl/Stat Rx Queue 2 */
+#define B0_XS1_CSR 0x0068 /* 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */
+#define B0_XA1_CSR 0x006c /* 32 bit BMU Ctrl/Stat Async Tx Queue 1*/
+#define B0_XS2_CSR 0x0070 /* 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
+#define B0_XA2_CSR 0x0074 /* 32 bit BMU Ctrl/Stat Async Tx Queue 2*/
+ /* 0x0078 - 0x007f: reserved */
/*
* Bank 1
@@ -440,20 +610,19 @@
* Bank 2
*/
/* NA reg = 48 bit Network Address Register, 3x16 or 8x8 bit readable */
-
-#define B2_MAC_1 0x0100 /* NA reg MAC Address 1 */
- /* 0x0106 - 0x0107 reserved */
-#define B2_MAC_2 0x0108 /* NA reg MAC Address 2 */
- /* 0x010e - 0x010f reserved */
-#define B2_MAC_3 0x0110 /* NA reg MAC Address 3 */
- /* 0x0116 - 0x0117 reserved */
+#define B2_MAC_1 0x0100 /* NA reg MAC Address 1 */
+ /* 0x0106 - 0x0107: reserved */
+#define B2_MAC_2 0x0108 /* NA reg MAC Address 2 */
+ /* 0x010e - 0x010f: reserved */
+#define B2_MAC_3 0x0110 /* NA reg MAC Address 3 */
+ /* 0x0116 - 0x0117: reserved */
#define B2_CONN_TYP 0x0118 /* 8 bit Connector type */
#define B2_PMD_TYP 0x0119 /* 8 bit PMD type */
-#define B2_MAC_CFG 0x011a /* 8 bit MAC Configuration */
-#define B2_CHIP_REV 0x011b /* 8 bit Queen Chip Revision Number */
+#define B2_MAC_CFG 0x011a /* 8 bit MAC Configuration / Chip Revision */
+#define B2_CHIP_ID 0x011b /* 8 bit Chip Identification Number */
/* Eprom registers are currently of no use */
-#define B2_E_0 0x011c /* 8 bit EPROM Byte 0 */
-#define B2_E_1 0x011d /* 8 bit EPROM Byte 1 */
+#define B2_E_0 0x011c /* 8 bit EPROM Byte 0 (ext. SRAM size */
+#define B2_E_1 0x011d /* 8 bit EPROM Byte 1 (PHY type) */
#define B2_E_2 0x011e /* 8 bit EPROM Byte 2 */
#define B2_E_3 0x011f /* 8 bit EPROM Byte 3 */
#define B2_FAR 0x0120 /* 32 bit Flash-Prom Addr Reg/Cnt */
@@ -462,9 +631,9 @@
#define B2_LD_CRTL 0x0128 /* 8 bit EPROM loader control register */
#define B2_LD_TEST 0x0129 /* 8 bit EPROM loader test register */
/* 0x012a - 0x012f: reserved */
-#define B2_TI_INI 0x0130 /* 32 bit Timer init value */
-#define B2_TI_VAL 0x0134 /* 32 bit Timer value */
-#define B2_TI_CRTL 0x0138 /* 8 bit Timer control */
+#define B2_TI_INI 0x0130 /* 32 bit Timer Init Value */
+#define B2_TI_VAL 0x0134 /* 32 bit Timer Value */
+#define B2_TI_CRTL 0x0138 /* 8 bit Timer Control */
#define B2_TI_TEST 0x0139 /* 8 Bit Timer Test */
/* 0x013a - 0x013f: reserved */
#define B2_IRQM_INI 0x0140 /* 32 bit IRQ Moderation Timer Init Reg.*/
@@ -474,14 +643,16 @@
#define B2_IRQM_MSK 0x014c /* 32 bit IRQ Moderation Mask */
#define B2_IRQM_HWE_MSK 0x0150 /* 32 bit IRQ Moderation HW Error Mask */
/* 0x0154 - 0x0157: reserved */
-#define B2_TST_CTRL1 0x0158 /* 8 bit Test Control Register 1 */
+#define B2_TST_CTRL1 0x0158 /* 8 bit Test Control Register 1 */
#define B2_TST_CTRL2 0x0159 /* 8 bit Test Control Register 2 */
/* 0x015a - 0x015b: reserved */
-#define B2_GP_IO 0x015c /* 32 bit General Purpose IO Register */
+#define B2_GP_IO 0x015c /* 32 bit General Purpose I/O Register */
#define B2_I2C_CTRL 0x0160 /* 32 bit I2C HW Control Register */
#define B2_I2C_DATA 0x0164 /* 32 bit I2C HW Data Register */
#define B2_I2C_IRQ 0x0168 /* 32 bit I2C HW IRQ Register */
#define B2_I2C_SW 0x016c /* 32 bit I2C SW Port Register */
+
+/* Blink Source Counter (GENESIS only) */
#define B2_BSC_INI 0x0170 /* 32 bit Blink Source Counter Init Val */
#define B2_BSC_VAL 0x0174 /* 32 bit Blink Source Counter Value */
#define B2_BSC_CTRL 0x0178 /* 8 bit Blink Source Counter Control */
@@ -492,66 +663,70 @@
/*
* Bank 3
*/
+/* RAM Random Registers */
#define B3_RAM_ADDR 0x0180 /* 32 bit RAM Address, to read or write */
#define B3_RAM_DATA_LO 0x0184 /* 32 bit RAM Data Word (low dWord) */
#define B3_RAM_DATA_HI 0x0188 /* 32 bit RAM Data Word (high dWord) */
/* 0x018c - 0x018f: reserved */
+
/* RAM Interface Registers */
/*
- * The HW-Spec. call this registers Timeout Value 0..11. But this names are
+ * The HW-Spec. calls this registers Timeout Value 0..11. But this names are
* not usable in SW. Please notice these are NOT real timeouts, these are
- * the number of qWords transfered continously.
+ * the number of qWords transferred continuously.
*/
-#define B3_RI_WTO_R1 0x0190 /* 8 bit RAM Iface WR Timeout Queue R1 (TO0) */
-#define B3_RI_WTO_XA1 0x0191 /* 8 bit RAM Iface WR Timeout Queue XA1 (TO1) */
-#define B3_RI_WTO_XS1 0x0192 /* 8 bit RAM Iface WR Timeout Queue XS1 (TO2) */
-#define B3_RI_RTO_R1 0x0193 /* 8 bit RAM Iface RD Timeout Queue R1 (TO3) */
-#define B3_RI_RTO_XA1 0x0194 /* 8 bit RAM Iface RD Timeout Queue XA1 (TO4) */
-#define B3_RI_RTO_XS1 0x0195 /* 8 bit RAM Iface RD Timeout Queue XS1 (TO5) */
-#define B3_RI_WTO_R2 0x0196 /* 8 bit RAM Iface WR Timeout Queue R2 (TO6) */
-#define B3_RI_WTO_XA2 0x0197 /* 8 bit RAM Iface WR Timeout Queue XA2 (TO7) */
-#define B3_RI_WTO_XS2 0x0198 /* 8 bit RAM Iface WR Timeout Queue XS2 (TO8) */
-#define B3_RI_RTO_R2 0x0199 /* 8 bit RAM Iface RD Timeout Queue R2 (TO9) */
-#define B3_RI_RTO_XA2 0x019a /* 8 bit RAM Iface RD Timeout Queue XA2 (TO10)*/
-#define B3_RI_RTO_XS2 0x019b /* 8 bit RAM Iface RD Timeout Queue XS2 (TO11)*/
-#define B3_RI_TO_VAL 0x019c /* 8 bit RAM Iface Current Timeout Count Val */
- /* 0x019d - 0x019f reserved */
-#define B3_RI_CTRL 0x01a0 /* 16 bit RAM Iface Control Register */
-#define B3_RI_TEST 0x01a2 /* 8 bit RAM Iface Test Register */
- /* 0x01a3 - 0x01af reserved */
-/* MAC Arbiter Registers */
-/* Please notice these are the number of qWord tranfered continously and */
-/* NOT real timeouts */
-#define B3_MA_TOINI_RX1 0x01b0 /* 8 bit Timeout Init Value Rx Path MAC 1 */
-#define B3_MA_TOINI_RX2 0x01b1 /* 8 bit Timeout Init Value Rx Path MAC 2 */
-#define B3_MA_TOINI_TX1 0x01b2 /* 8 bit Timeout Init Value Tx Path MAC 1 */
-#define B3_MA_TOINI_TX2 0x01b3 /* 8 bit Timeout Init Value Tx Path MAC 2 */
-#define B3_MA_TOVAL_RX1 0x01b4 /* 8 bit Timeout Value Rx Path MAC 1 */
-#define B3_MA_TOVAL_RX2 0x01b5 /* 8 bit Timeout Value Rx Path MAC 1 */
-#define B3_MA_TOVAL_TX1 0x01b6 /* 8 bit Timeout Value Tx Path MAC 2 */
-#define B3_MA_TOVAL_TX2 0x01b7 /* 8 bit Timeout Value Tx Path MAC 2 */
+#define B3_RI_WTO_R1 0x0190 /* 8 bit WR Timeout Queue R1 (TO0) */
+#define B3_RI_WTO_XA1 0x0191 /* 8 bit WR Timeout Queue XA1 (TO1) */
+#define B3_RI_WTO_XS1 0x0192 /* 8 bit WR Timeout Queue XS1 (TO2) */
+#define B3_RI_RTO_R1 0x0193 /* 8 bit RD Timeout Queue R1 (TO3) */
+#define B3_RI_RTO_XA1 0x0194 /* 8 bit RD Timeout Queue XA1 (TO4) */
+#define B3_RI_RTO_XS1 0x0195 /* 8 bit RD Timeout Queue XS1 (TO5) */
+#define B3_RI_WTO_R2 0x0196 /* 8 bit WR Timeout Queue R2 (TO6) */
+#define B3_RI_WTO_XA2 0x0197 /* 8 bit WR Timeout Queue XA2 (TO7) */
+#define B3_RI_WTO_XS2 0x0198 /* 8 bit WR Timeout Queue XS2 (TO8) */
+#define B3_RI_RTO_R2 0x0199 /* 8 bit RD Timeout Queue R2 (TO9) */
+#define B3_RI_RTO_XA2 0x019a /* 8 bit RD Timeout Queue XA2 (TO10)*/
+#define B3_RI_RTO_XS2 0x019b /* 8 bit RD Timeout Queue XS2 (TO11)*/
+#define B3_RI_TO_VAL 0x019c /* 8 bit Current Timeout Count Val */
+ /* 0x019d - 0x019f: reserved */
+#define B3_RI_CTRL 0x01a0 /* 16 bit RAM Interface Control Register */
+#define B3_RI_TEST 0x01a2 /* 8 bit RAM Interface Test Register */
+ /* 0x01a3 - 0x01af: reserved */
+
+/* MAC Arbiter Registers (GENESIS only) */
+/* these are the no. of qWord transferred continuously and NOT real timeouts */
+#define B3_MA_TOINI_RX1 0x01b0 /* 8 bit Timeout Init Val Rx Path MAC 1 */
+#define B3_MA_TOINI_RX2 0x01b1 /* 8 bit Timeout Init Val Rx Path MAC 2 */
+#define B3_MA_TOINI_TX1 0x01b2 /* 8 bit Timeout Init Val Tx Path MAC 1 */
+#define B3_MA_TOINI_TX2 0x01b3 /* 8 bit Timeout Init Val Tx Path MAC 2 */
+#define B3_MA_TOVAL_RX1 0x01b4 /* 8 bit Timeout Value Rx Path MAC 1 */
+#define B3_MA_TOVAL_RX2 0x01b5 /* 8 bit Timeout Value Rx Path MAC 1 */
+#define B3_MA_TOVAL_TX1 0x01b6 /* 8 bit Timeout Value Tx Path MAC 2 */
+#define B3_MA_TOVAL_TX2 0x01b7 /* 8 bit Timeout Value Tx Path MAC 2 */
#define B3_MA_TO_CTRL 0x01b8 /* 16 bit MAC Arbiter Timeout Ctrl Reg */
#define B3_MA_TO_TEST 0x01ba /* 16 bit MAC Arbiter Timeout Test Reg */
- /* 0x01bc - 0x01bf reserved */
-#define B3_MA_RCINI_RX1 0x01c0 /* 8 bit Recovery Init Value Rx Path MAC 1 */
-#define B3_MA_RCINI_RX2 0x01c1 /* 8 bit Recovery Init Value Rx Path MAC 2 */
-#define B3_MA_RCINI_TX1 0x01c2 /* 8 bit Recovery Init Value Tx Path MAC 1 */
-#define B3_MA_RCINI_TX2 0x01c3 /* 8 bit Recovery Init Value Tx Path MAC 2 */
-#define B3_MA_RCVAL_RX1 0x01c4 /* 8 bit Recovery Value Rx Path MAC 1 */
-#define B3_MA_RCVAL_RX2 0x01c5 /* 8 bit Recovery Value Rx Path MAC 1 */
-#define B3_MA_RCVAL_TX1 0x01c6 /* 8 bit Recovery Value Tx Path MAC 2 */
-#define B3_MA_RCVAL_TX2 0x01c7 /* 8 bit Recovery Value Tx Path MAC 2 */
+ /* 0x01bc - 0x01bf: reserved */
+#define B3_MA_RCINI_RX1 0x01c0 /* 8 bit Recovery Init Val Rx Path MAC 1 */
+#define B3_MA_RCINI_RX2 0x01c1 /* 8 bit Recovery Init Val Rx Path MAC 2 */
+#define B3_MA_RCINI_TX1 0x01c2 /* 8 bit Recovery Init Val Tx Path MAC 1 */
+#define B3_MA_RCINI_TX2 0x01c3 /* 8 bit Recovery Init Val Tx Path MAC 2 */
+#define B3_MA_RCVAL_RX1 0x01c4 /* 8 bit Recovery Value Rx Path MAC 1 */
+#define B3_MA_RCVAL_RX2 0x01c5 /* 8 bit Recovery Value Rx Path MAC 1 */
+#define B3_MA_RCVAL_TX1 0x01c6 /* 8 bit Recovery Value Tx Path MAC 2 */
+#define B3_MA_RCVAL_TX2 0x01c7 /* 8 bit Recovery Value Tx Path MAC 2 */
#define B3_MA_RC_CTRL 0x01c8 /* 16 bit MAC Arbiter Recovery Ctrl Reg */
#define B3_MA_RC_TEST 0x01ca /* 16 bit MAC Arbiter Recovery Test Reg */
- /* 0x01cc - 0x01cf reserved */
-/* Packet Arbiter Registers, This are real timeouts */
-#define B3_PA_TOINI_RX1 0x01d0 /* 16 bit Timeout Init Val Rx Path MAC 1*/
+ /* 0x01cc - 0x01cf: reserved */
+
+/* Packet Arbiter Registers (GENESIS only) */
+/* these are real timeouts */
+#define B3_PA_TOINI_RX1 0x01d0 /* 16 bit Timeout Init Val Rx Path MAC 1 */
/* 0x01d2 - 0x01d3: reserved */
-#define B3_PA_TOINI_RX2 0x01d4 /* 16 bit Timeout Init Val Rx Path MAC 2*/
+#define B3_PA_TOINI_RX2 0x01d4 /* 16 bit Timeout Init Val Rx Path MAC 2 */
/* 0x01d6 - 0x01d7: reserved */
-#define B3_PA_TOINI_TX1 0x01d8 /* 16 bit Timeout Init Val Tx Path MAC 1*/
+#define B3_PA_TOINI_TX1 0x01d8 /* 16 bit Timeout Init Val Tx Path MAC 1 */
/* 0x01da - 0x01db: reserved */
-#define B3_PA_TOINI_TX2 0x01dc /* 16 bit Timeout Init Val Tx Path MAC 2*/
+#define B3_PA_TOINI_TX2 0x01dc /* 16 bit Timeout Init Val Tx Path MAC 2 */
/* 0x01de - 0x01df: reserved */
#define B3_PA_TOVAL_RX1 0x01e0 /* 16 bit Timeout Val Rx Path MAC 1 */
/* 0x01e2 - 0x01e3: reserved */
@@ -568,8 +743,7 @@
/*
* Bank 4 - 5
*/
-
-/* Transmit Arbiter Registers MAC 1 and 2, user MR_ADDR() to address */
+/* Transmit Arbiter Registers MAC 1 and 2, use MR_ADDR() to access */
#define TXA_ITI_INI 0x0200 /* 32 bit Tx Arb Interval Timer Init Val*/
#define TXA_ITI_VAL 0x0204 /* 32 bit Tx Arb Interval Timer Value */
#define TXA_LIM_INI 0x0208 /* 32 bit Tx Arb Limit Counter Init Val */
@@ -578,11 +752,13 @@
#define TXA_TEST 0x0211 /* 8 bit Tx Arbiter Test Register */
#define TXA_STAT 0x0212 /* 8 bit Tx Arbiter Status Register */
/* 0x0213 - 0x027f: reserved */
+ /* 0x0280 - 0x0292: MAC 2 */
+ /* 0x0213 - 0x027f: reserved */
/*
* Bank 6
*/
-/* External registers */
+/* External registers (GENESIS only) */
#define B6_EXT_REG 0x0300
/*
@@ -595,7 +771,7 @@
* Bank 8 - 15
*/
/* Receive and Transmit Queue Registers, use Q_ADDR() to access */
-#define B8_Q_REGS 0x0400
+#define B8_Q_REGS 0x0400
/* Queue Register Offsets, use Q_ADDR() to access */
#define Q_D 0x00 /* 8*32 bit Current Descriptor */
@@ -619,254 +795,376 @@
* Bank 16 - 23
*/
/* RAM Buffer Registers */
-#define B16_RAM_REGS 0x0800
+#define B16_RAM_REGS 0x0800
-/* RAM Buffer Register Offsets */
-/* use RB_ADDR(Queue,Offs) to address */
-#define RB_START 0x00 /* 32 bit RAM Buffer Start Address */
-#define RB_END 0x04 /* 32 bit RAM Buffer End Address */
-#define RB_WP 0x08 /* 32 bit RAM Buffer Write Pointer */
-#define RB_RP 0x0c /* 32 bit RAM Buffer Read Pointer */
-#define RB_RX_UTPP 0x10 /* 32 bit Rx Upper Threshold, Pause Pack*/
-#define RB_RX_LTPP 0x14 /* 32 bit Rx Lower Threshold, Pause Pack*/
-#define RB_RX_UTHP 0x18 /* 32 bit Rx Upper Threshold, High Prio */
-#define RB_RX_LTHP 0x1c /* 32 bit Rx Lower Threshold, High Prio */
- /* 0x10 - 0x1f: reserved for Tx RAM Buffer Registers */
-#define RB_PC 0x20 /* 32 bit RAM Buffer Packet Counter */
-#define RB_LEV 0x24 /* 32 bit RAM Buffer Level Register */
-#define RB_CTRL 0x28 /* 8 bit RAM Buffer Control Register */
-#define RB_TST1 0x29 /* 8 bit RAM Buffer Test Register 1 */
-#define RB_TST2 0x2A /* 8 bit RAM Buffer Test Register 2 */
- /* 0x2c - 0x7f: reserved */
+/* RAM Buffer Register Offsets, use RB_ADDR() to access */
+#define RB_START 0x00 /* 32 bit RAM Buffer Start Address */
+#define RB_END 0x04 /* 32 bit RAM Buffer End Address */
+#define RB_WP 0x08 /* 32 bit RAM Buffer Write Pointer */
+#define RB_RP 0x0c /* 32 bit RAM Buffer Read Pointer */
+#define RB_RX_UTPP 0x10 /* 32 bit Rx Upper Threshold, Pause Pack */
+#define RB_RX_LTPP 0x14 /* 32 bit Rx Lower Threshold, Pause Pack */
+#define RB_RX_UTHP 0x18 /* 32 bit Rx Upper Threshold, High Prio */
+#define RB_RX_LTHP 0x1c /* 32 bit Rx Lower Threshold, High Prio */
+ /* 0x10 - 0x1f: reserved at Tx RAM Buffer Registers */
+#define RB_PC 0x20 /* 32 bit RAM Buffer Packet Counter */
+#define RB_LEV 0x24 /* 32 bit RAM Buffer Level Register */
+#define RB_CTRL 0x28 /* 8 bit RAM Buffer Control Register */
+#define RB_TST1 0x29 /* 8 bit RAM Buffer Test Register 1 */
+#define RB_TST2 0x2A /* 8 bit RAM Buffer Test Register 2 */
+ /* 0x2c - 0x7f: reserved */
/*
- * Bank 24 - 25
+ * Bank 24
+ */
+/*
+ * Receive MAC FIFO, Receive LED, and Link_Sync regs (GENESIS only)
+ * use MR_ADDR() to access
*/
-/* Receive MAC FIFO, Receive LED, and Link Sync regs, use MR_ADDR() to address*/
#define RX_MFF_EA 0x0c00 /* 32 bit Receive MAC FIFO End Address */
-#define RX_MFF_WP 0x0c04 /* 32 bit Receive MAC FIFO Write Pointer*/
- /* 0x0c08 - 0x0c0b reserved */
+#define RX_MFF_WP 0x0c04 /* 32 bit Receive MAC FIFO Write Pointer */
+ /* 0x0c08 - 0x0c0b: reserved */
#define RX_MFF_RP 0x0c0c /* 32 bit Receive MAC FIFO Read Pointer */
#define RX_MFF_PC 0x0c10 /* 32 bit Receive MAC FIFO Packet Cnt */
#define RX_MFF_LEV 0x0c14 /* 32 bit Receive MAC FIFO Level */
#define RX_MFF_CTRL1 0x0c18 /* 16 bit Receive MAC FIFO Control Reg 1*/
#define RX_MFF_STAT_TO 0x0c1a /* 8 bit Receive MAC Status Timeout */
-#define RX_MFF_TIST_TO 0x0c1b /* 8 bit Receive MAC Timestamp Timeout */
+#define RX_MFF_TIST_TO 0x0c1b /* 8 bit Receive MAC Time Stamp Timeout */
#define RX_MFF_CTRL2 0x0c1c /* 8 bit Receive MAC FIFO Control Reg 2*/
#define RX_MFF_TST1 0x0c1d /* 8 bit Receive MAC FIFO Test Reg 1 */
#define RX_MFF_TST2 0x0c1e /* 8 bit Receive MAC FIFO Test Reg 2 */
- /* 0x0c1f reserved */
+ /* 0x0c1f: reserved */
#define RX_LED_INI 0x0c20 /* 32 bit Receive LED Cnt Init Value */
#define RX_LED_VAL 0x0c24 /* 32 bit Receive LED Cnt Current Value */
#define RX_LED_CTRL 0x0c28 /* 8 bit Receive LED Cnt Control Reg */
#define RX_LED_TST 0x0c29 /* 8 bit Receive LED Cnt Test Register */
- /* 0x0c2a - 0x0c2f reserved */
+ /* 0x0c2a - 0x0c2f: reserved */
#define LNK_SYNC_INI 0x0c30 /* 32 bit Link Sync Cnt Init Value */
#define LNK_SYNC_VAL 0x0c34 /* 32 bit Link Sync Cnt Current Value */
-#define LNK_SYNC_CTRL 0x0c38 /* 8 bit Link Sync Cnt Control Register*/
+#define LNK_SYNC_CTRL 0x0c38 /* 8 bit Link Sync Cnt Control Register */
#define LNK_SYNC_TST 0x0c39 /* 8 bit Link Sync Cnt Test Register */
- /* 0x0c3a - 0x0c3b reserved */
+ /* 0x0c3a - 0x0c3b: reserved */
#define LNK_LED_REG 0x0c3c /* 8 bit Link LED Register */
- /* 0x0c3d - 0x0c7f reserved */
+ /* 0x0c3d - 0x0c3f: reserved */
+
+/* Receive GMAC FIFO (YUKON only), use MR_ADDR() to access */
+#define RX_GMF_EA 0x0c40 /* 32 bit Rx GMAC FIFO End Address */
+#define RX_GMF_AF_THR 0x0c44 /* 32 bit Rx GMAC FIFO Almost Full Thresh. */
+#define RX_GMF_CTRL_T 0x0c48 /* 32 bit Rx GMAC FIFO Control/Test */
+#define RX_GMF_FL_MSK 0x0c4c /* 32 bit Rx GMAC FIFO Flush Mask */
+#define RX_GMF_FL_THR 0x0c50 /* 32 bit Rx GMAC FIFO Flush Threshold */
+ /* 0x0c54 - 0x0c5f: reserved */
+#define RX_GMF_WP 0x0c60 /* 32 bit Rx GMAC FIFO Write Pointer */
+ /* 0x0c64 - 0x0c67: reserved */
+#define RX_GMF_WLEV 0x0c68 /* 32 bit Rx GMAC FIFO Write Level */
+ /* 0x0c6c - 0x0c6f: reserved */
+#define RX_GMF_RP 0x0c70 /* 32 bit Rx GMAC FIFO Read Pointer */
+ /* 0x0c74 - 0x0c77: reserved */
+#define RX_GMF_RLEV 0x0c78 /* 32 bit Rx GMAC FIFO Read Level */
+ /* 0x0c7c - 0x0c7f: reserved */
+
+/*
+ * Bank 25
+ */
+ /* 0x0c80 - 0x0cbf: MAC 2 */
+ /* 0x0cc0 - 0x0cff: reserved */
/*
- * Bank 26 - 27
+ * Bank 26
+ */
+/*
+ * Transmit MAC FIFO and Transmit LED Registers (GENESIS only),
+ * use MR_ADDR() to access
*/
-/* Transmit MAC FIFO and Transmit LED Registers, use MR_ADDR() to address */
#define TX_MFF_EA 0x0d00 /* 32 bit Transmit MAC FIFO End Address */
#define TX_MFF_WP 0x0d04 /* 32 bit Transmit MAC FIFO WR Pointer */
-#define TX_MFF_WSP 0x0d08 /* 32 bit Transmit MAC FIFO WR Shadow Pt*/
+#define TX_MFF_WSP 0x0d08 /* 32 bit Transmit MAC FIFO WR Shadow Ptr */
#define TX_MFF_RP 0x0d0c /* 32 bit Transmit MAC FIFO RD Pointer */
#define TX_MFF_PC 0x0d10 /* 32 bit Transmit MAC FIFO Packet Cnt */
#define TX_MFF_LEV 0x0d14 /* 32 bit Transmit MAC FIFO Level */
#define TX_MFF_CTRL1 0x0d18 /* 16 bit Transmit MAC FIFO Ctrl Reg 1 */
-#define TX_MFF_WAF 0x0d1a /* 8 bit Transmit MAC Wait after flush*/
- /* 0x0c1b reserved */
+#define TX_MFF_WAF 0x0d1a /* 8 bit Transmit MAC Wait after flush */
+ /* 0x0c1b: reserved */
#define TX_MFF_CTRL2 0x0d1c /* 8 bit Transmit MAC FIFO Ctrl Reg 2 */
#define TX_MFF_TST1 0x0d1d /* 8 bit Transmit MAC FIFO Test Reg 1 */
#define TX_MFF_TST2 0x0d1e /* 8 bit Transmit MAC FIFO Test Reg 2 */
- /* 0x0d1f reserved */
+ /* 0x0d1f: reserved */
#define TX_LED_INI 0x0d20 /* 32 bit Transmit LED Cnt Init Value */
#define TX_LED_VAL 0x0d24 /* 32 bit Transmit LED Cnt Current Val */
#define TX_LED_CTRL 0x0d28 /* 8 bit Transmit LED Cnt Control Reg */
-#define TX_LED_TST 0x0d29 /* 8 bit Transmit LED Cnt Test Register*/
- /* 0x0d2a - 0x0d7f reserved */
+#define TX_LED_TST 0x0d29 /* 8 bit Transmit LED Cnt Test Reg */
+ /* 0x0d2a - 0x0d3f: reserved */
+
+/* Transmit GMAC FIFO (YUKON only), use MR_ADDR() to access */
+#define TX_GMF_EA 0x0d40 /* 32 bit Tx GMAC FIFO End Address */
+#define TX_GMF_AE_THR 0x0d44 /* 32 bit Tx GMAC FIFO Almost Empty Thresh.*/
+#define TX_GMF_CTRL_T 0x0d48 /* 32 bit Tx GMAC FIFO Control/Test */
+ /* 0x0d4c - 0x0d5f: reserved */
+#define TX_GMF_WP 0x0d60 /* 32 bit Tx GMAC FIFO Write Pointer */
+#define TX_GMF_WSP 0x0d64 /* 32 bit Tx GMAC FIFO Write Shadow Ptr. */
+#define TX_GMF_WLEV 0x0d68 /* 32 bit Tx GMAC FIFO Write Level */
+ /* 0x0d6c - 0x0d6f: reserved */
+#define TX_GMF_RP 0x0d70 /* 32 bit Tx GMAC FIFO Read Pointer */
+#define TX_GMF_RSTP 0x0d74 /* 32 bit Tx GMAC FIFO Restart Pointer */
+#define TX_GMF_RLEV 0x0d78 /* 32 bit Tx GMAC FIFO Read Level */
+ /* 0x0d7c - 0x0d7f: reserved */
+
+/*
+ * Bank 27
+ */
+ /* 0x0d80 - 0x0dbf: MAC 2 */
+ /* 0x0daa - 0x0dff: reserved */
/*
* Bank 28
*/
/* Descriptor Poll Timer Registers */
-#define B28_DPT_INI 0x0e00 /* 32 bit Descriptor Poll Timer Init Val*/
-#define B28_DPT_VAL 0x0e04 /* 32 bit Descriptor Poll Timer Curr Val*/
-#define B28_DPT_CTRL 0x0e08 /* 8 bit Descriptor Poll Timer Ctrl Reg*/
- /* 0x0e09: reserved */
-#define B28_DPT_TST 0x0e0a /* 8 bit Descriptor Poll Timer Test Reg*/
- /* 0x0e0b - 0x0e8f: reserved */
+#define B28_DPT_INI 0x0e00 /* 24 bit Descriptor Poll Timer Init Val */
+#define B28_DPT_VAL 0x0e04 /* 24 bit Descriptor Poll Timer Curr Val */
+#define B28_DPT_CTRL 0x0e08 /* 8 bit Descriptor Poll Timer Ctrl Reg */
+ /* 0x0e09: reserved */
+#define B28_DPT_TST 0x0e0a /* 8 bit Descriptor Poll Timer Test Reg */
+ /* 0x0e0b: reserved */
+
+/* Time Stamp Timer Registers (YUKON only) */
+ /* 0x0e10: reserved */
+#define GMAC_TI_ST_VAL 0x0e14 /* 32 bit Time Stamp Timer Curr Val */
+#define GMAC_TI_ST_CTRL 0x0e18 /* 8 bit Time Stamp Timer Ctrl Reg */
+ /* 0x0e19: reserved */
+#define GMAC_TI_ST_TST 0x0e1a /* 8 bit Time Stamp Timer Test Reg */
+ /* 0x0e1b - 0x0e7f: reserved */
+
+/*
+ * Bank 29
+ */
+ /* 0x0e80 - 0x0efc: reserved */
+
+/*
+ * Bank 30
+ */
+/* GMAC and GPHY Control Registers (YUKON only) */
+#define GMAC_CTRL 0x0f00 /* 32 bit GMAC Control Reg */
+#define GPHY_CTRL 0x0f04 /* 32 bit GPHY Control Reg */
+#define GMAC_IRQ_SRC 0x0f08 /* 8 bit GMAC Interrupt Source Reg */
+ /* 0x0f09 - 0x0f0b: reserved */
+#define GMAC_IRQ_MSK 0x0f0c /* 8 bit GMAC Interrupt Mask Reg */
+ /* 0x0f0d - 0x0f0f: reserved */
+#define GMAC_LINK_CTRL 0x0f10 /* 16 bit Link Control Reg */
+ /* 0x0f14 - 0x0f1f: reserved */
+
+/* Wake-up Frame Pattern Match Control Registers (YUKON only) */
+
+#define WOL_REG_OFFS 0x20 /* HW-Bug: Address is + 0x20 against spec. */
+
+#define WOL_CTRL_STAT 0x0f20 /* 16 bit WOL Control/Status Reg */
+#define WOL_MATCH_CTL 0x0f22 /* 8 bit WOL Match Control Reg */
+#define WOL_MATCH_RES 0x0f23 /* 8 bit WOL Match Result Reg */
+#define WOL_MAC_ADDR_LO 0x0f24 /* 32 bit WOL MAC Address Low */
+#define WOL_MAC_ADDR_HI 0x0f28 /* 16 bit WOL MAC Address High */
+#define WOL_PATT_RPTR 0x0f2c /* 8 bit WOL Pattern Read Ptr */
+
+/* use this macro to access above registers */
+#define WOL_REG(Reg) ((Reg) + (pAC->GIni.GIWolOffs))
+
+
+/* WOL Pattern Length Registers (YUKON only) */
+
+#define WOL_PATT_LEN_LO 0x0f30 /* 32 bit WOL Pattern Length 3..0 */
+#define WOL_PATT_LEN_HI 0x0f34 /* 24 bit WOL Pattern Length 6..4 */
+
+/* WOL Pattern Counter Registers (YUKON only) */
+
+#define WOL_PATT_CNT_0 0x0f38 /* 32 bit WOL Pattern Counter 3..0 */
+#define WOL_PATT_CNT_4 0x0f3c /* 24 bit WOL Pattern Counter 6..4 */
+ /* 0x0f40 - 0x0f7f: reserved */
/*
- * Bank 29 - 31
+ * Bank 31
*/
-/* 0x0e90 - 0x0fff: reserved */
+/* 0x0f80 - 0x0fff: reserved */
/*
- * Bank 0x20 - 0x3f
+ * Bank 32 - 33
*/
-/* 0x1000 - 0x1fff: reserved */
+#define WOL_PATT_RAM_1 0x1000 /* WOL Pattern RAM Link 1 */
+
+/*
+ * Bank 0x22 - 0x3f
+ */
+/* 0x1100 - 0x1fff: reserved */
/*
* Bank 0x40 - 0x4f
*/
-/* XMAC 1 registers */
-#define B40_XMAC1 0x2000
+#define BASE_XMAC_1 0x2000 /* XMAC 1 registers */
/*
* Bank 0x50 - 0x5f
*/
-/* 0x2800 - 0x2fff: reserved */
+
+#define BASE_GMAC_1 0x2800 /* GMAC 1 registers */
/*
* Bank 0x60 - 0x6f
*/
-/* XMAC 2 registers */
-#define B40_XMAC2 0x3000
+#define BASE_XMAC_2 0x3000 /* XMAC 2 registers */
/*
* Bank 0x70 - 0x7f
*/
-/* 0x3800 - 0x3fff: reserved */
+#define BASE_GMAC_2 0x3800 /* GMAC 2 registers */
/*
* Control Register Bit Definitions:
*/
/* B0_RAP 8 bit Register Address Port */
- /* Bit 7: reserved */
-#define RAP_RAP 0x3f /* Bit 6..0: 0 = block 0, .., 6f = block 6f*/
+ /* Bit 7: reserved */
+#define RAP_RAP 0x3f /* Bit 6..0: 0 = block 0,..,6f = block 6f */
/* B0_CTST 16 bit Control/Status register */
- /* Bit 15..10: reserved */
-#define CS_BUS_CLOCK (1<<9) /* Bit 9: Bus Clock 0/1 = 33/66MHz */
-#define CS_BUS_SLOT_SZ (1<<8) /* Bit 8: Slot Size 0/1 = 32/64 bit slot*/
-#define CS_ST_SW_IRQ (1<<7) /* Bit 7: Set IRQ SW Request */
-#define CS_CL_SW_IRQ (1<<6) /* Bit 6: Clear IRQ SW Request */
-#define CS_STOP_DONE (1<<5) /* Bit 5: Stop Master is finished */
-#define CS_STOP_MAST (1<<4) /* Bit 4: Command Bit to stop the master*/
-#define CS_MRST_CLR (1<<3) /* Bit 3: Clear Master reset */
-#define CS_MRST_SET (1<<2) /* Bit 2: Set Master reset */
-#define CS_RST_CLR (1<<1) /* Bit 1: Clear Software reset */
-#define CS_RST_SET (1<<0) /* Bit 0: Set Software reset */
+ /* Bit 15..14: reserved */
+#define CS_CLK_RUN_HOT BIT_13S /* CLK_RUN hot m. (YUKON-Lite only) */
+#define CS_CLK_RUN_RST BIT_12S /* CLK_RUN reset (YUKON-Lite only) */
+#define CS_CLK_RUN_ENA BIT_11S /* CLK_RUN enable (YUKON-Lite only) */
+#define CS_VAUX_AVAIL BIT_10S /* VAUX available (YUKON only) */
+#define CS_BUS_CLOCK BIT_9S /* Bus Clock 0/1 = 33/66 MHz */
+#define CS_BUS_SLOT_SZ BIT_8S /* Slot Size 0/1 = 32/64 bit slot */
+#define CS_ST_SW_IRQ BIT_7S /* Set IRQ SW Request */
+#define CS_CL_SW_IRQ BIT_6S /* Clear IRQ SW Request */
+#define CS_STOP_DONE BIT_5S /* Stop Master is finished */
+#define CS_STOP_MAST BIT_4S /* Command Bit to stop the master */
+#define CS_MRST_CLR BIT_3S /* Clear Master reset */
+#define CS_MRST_SET BIT_2S /* Set Master reset */
+#define CS_RST_CLR BIT_1S /* Clear Software reset */
+#define CS_RST_SET BIT_0S /* Set Software reset */
/* B0_LED 8 Bit LED register */
- /* Bit 7..2: reserved */
-#define LED_STAT_ON (1<<1) /* Bit 1: Status LED on */
-#define LED_STAT_OFF (1<<0) /* Bit 0: Status LED off */
+ /* Bit 7.. 2: reserved */
+#define LED_STAT_ON BIT_1S /* Status LED on */
+#define LED_STAT_OFF BIT_0S /* Status LED off */
+
+/* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */
+#define PC_VAUX_ENA BIT_7 /* Switch VAUX Enable */
+#define PC_VAUX_DIS BIT_6 /* Switch VAUX Disable */
+#define PC_VCC_ENA BIT_5 /* Switch VCC Enable */
+#define PC_VCC_DIS BIT_4 /* Switch VCC Disable */
+#define PC_VAUX_ON BIT_3 /* Switch VAUX On */
+#define PC_VAUX_OFF BIT_2 /* Switch VAUX Off */
+#define PC_VCC_ON BIT_1 /* Switch VCC On */
+#define PC_VCC_OFF BIT_0 /* Switch VCC Off */
/* B0_ISRC 32 bit Interrupt Source Register */
/* B0_IMSK 32 bit Interrupt Mask Register */
/* B0_SP_ISRC 32 bit Special Interrupt Source Reg */
/* B2_IRQM_MSK 32 bit IRQ Moderation Mask */
-#define IS_ALL_MSK 0xbfffffffL /* All Interrupt bits */
-#define IS_HW_ERR (1UL<<31) /* Bit 31: Interrupt HW Error */
- /* Bit 30: reserved */
-#define IS_PA_TO_RX1 (1L<<29) /* Bit 29: Packet Arb Timeout Rx1*/
-#define IS_PA_TO_RX2 (1L<<28) /* Bit 28: Packet Arb Timeout Rx2*/
-#define IS_PA_TO_TX1 (1L<<27) /* Bit 27: Packet Arb Timeout Tx1*/
-#define IS_PA_TO_TX2 (1L<<26) /* Bit 26: Packet Arb Timeout Tx2*/
-#define IS_I2C_READY (1L<<25) /* Bit 25: IRQ on end of I2C tx */
-#define IS_IRQ_SW (1L<<24) /* Bit 24: SW forced IRQ */
-#define IS_EXT_REG (1L<<23) /* Bit 23: IRQ from external reg */
-#define IS_TIMINT (1L<<22) /* Bit 22: IRQ from Timer */
-#define IS_MAC1 (1L<<21) /* Bit 21: IRQ from MAC 1 */
-#define IS_LNK_SYNC_M1 (1L<<20) /* Bit 20: Link Sync Cnt wrap M1 */
-#define IS_MAC2 (1L<<19) /* Bit 19: IRQ from MAC 2 */
-#define IS_LNK_SYNC_M2 (1L<<18) /* Bit 18: Link Sync Cnt wrap M2 */
+#define IS_ALL_MSK 0xbfffffffUL /* All Interrupt bits */
+#define IS_HW_ERR BIT_31 /* Interrupt HW Error */
+ /* Bit 30: reserved */
+#define IS_PA_TO_RX1 BIT_29 /* Packet Arb Timeout Rx1 */
+#define IS_PA_TO_RX2 BIT_28 /* Packet Arb Timeout Rx2 */
+#define IS_PA_TO_TX1 BIT_27 /* Packet Arb Timeout Tx1 */
+#define IS_PA_TO_TX2 BIT_26 /* Packet Arb Timeout Tx2 */
+#define IS_I2C_READY BIT_25 /* IRQ on end of I2C Tx */
+#define IS_IRQ_SW BIT_24 /* SW forced IRQ */
+#define IS_EXT_REG BIT_23 /* IRQ from LM80 or PHY (GENESIS only) */
+ /* IRQ from PHY (YUKON only) */
+#define IS_TIMINT BIT_22 /* IRQ from Timer */
+#define IS_MAC1 BIT_21 /* IRQ from MAC 1 */
+#define IS_LNK_SYNC_M1 BIT_20 /* Link Sync Cnt wrap MAC 1 */
+#define IS_MAC2 BIT_19 /* IRQ from MAC 2 */
+#define IS_LNK_SYNC_M2 BIT_18 /* Link Sync Cnt wrap MAC 2 */
/* Receive Queue 1 */
-#define IS_R1_B (1L<<17) /* Bit 17: Q_R1 End of Buffer */
-#define IS_R1_F (1L<<16) /* Bit 16: Q_R1 End of Frame */
-#define IS_R1_C (1L<<15) /* Bit 15: Q_R1 Encoding Error */
+#define IS_R1_B BIT_17 /* Q_R1 End of Buffer */
+#define IS_R1_F BIT_16 /* Q_R1 End of Frame */
+#define IS_R1_C BIT_15 /* Q_R1 Encoding Error */
/* Receive Queue 2 */
-#define IS_R2_B (1L<<14) /* Bit 14: Q_R2 End of Buffer */
-#define IS_R2_F (1L<<13) /* Bit 13: Q_R2 End of Frame */
-#define IS_R2_C (1L<<12) /* Bit 12: Q_R2 Encoding Error */
+#define IS_R2_B BIT_14 /* Q_R2 End of Buffer */
+#define IS_R2_F BIT_13 /* Q_R2 End of Frame */
+#define IS_R2_C BIT_12 /* Q_R2 Encoding Error */
/* Synchronous Transmit Queue 1 */
-#define IS_XS1_B (1L<<11) /* Bit 11: Q_XS1 End of Buffer */
-#define IS_XS1_F (1L<<10) /* Bit 10: Q_XS1 End of Frame */
-#define IS_XS1_C (1L<<9) /* Bit 9: Q_XS1 Encoding Error */
+#define IS_XS1_B BIT_11 /* Q_XS1 End of Buffer */
+#define IS_XS1_F BIT_10 /* Q_XS1 End of Frame */
+#define IS_XS1_C BIT_9 /* Q_XS1 Encoding Error */
/* Asynchronous Transmit Queue 1 */
-#define IS_XA1_B (1L<<8) /* Bit 8: Q_XA1 End of Buffer */
-#define IS_XA1_F (1L<<7) /* Bit 7: Q_XA1 End of Frame */
-#define IS_XA1_C (1L<<6) /* Bit 6: Q_XA1 Encoding Error */
+#define IS_XA1_B BIT_8 /* Q_XA1 End of Buffer */
+#define IS_XA1_F BIT_7 /* Q_XA1 End of Frame */
+#define IS_XA1_C BIT_6 /* Q_XA1 Encoding Error */
/* Synchronous Transmit Queue 2 */
-#define IS_XS2_B (1L<<5) /* Bit 5: Q_XS2 End of Buffer */
-#define IS_XS2_F (1L<<4) /* Bit 4: Q_XS2 End of Frame */
-#define IS_XS2_C (1L<<3) /* Bit 3: Q_XS2 Encoding Error */
+#define IS_XS2_B BIT_5 /* Q_XS2 End of Buffer */
+#define IS_XS2_F BIT_4 /* Q_XS2 End of Frame */
+#define IS_XS2_C BIT_3 /* Q_XS2 Encoding Error */
/* Asynchronous Transmit Queue 2 */
-#define IS_XA2_B (1L<<2) /* Bit 2: Q_XA2 End of Buffer */
-#define IS_XA2_F (1L<<1) /* Bit 1: Q_XA2 End of Frame */
-#define IS_XA2_C (1L<<0) /* Bit 0: Q_XA2 Encoding Error */
+#define IS_XA2_B BIT_2 /* Q_XA2 End of Buffer */
+#define IS_XA2_F BIT_1 /* Q_XA2 End of Frame */
+#define IS_XA2_C BIT_0 /* Q_XA2 Encoding Error */
/* B0_HWE_ISRC 32 bit HW Error Interrupt Src Reg */
/* B0_HWE_IMSK 32 bit HW Error Interrupt Mask Reg */
/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
#define IS_ERR_MSK 0x00000fffL /* All Error bits */
- /* Bit 31..12: reserved */
-#define IS_IRQ_MST_ERR (1L<<11) /* Bit 11: IRQ master error */
- /* PERR,RMABORT,RTABORT,DATAPERR */
-#define IS_IRQ_STAT (1L<<10) /* Bit 10: IRQ status exception */
- /* RMABORT, RTABORT, DATAPERR */
-#define IS_NO_STAT_M1 (1L<<9) /* Bit 9: No Rx Status from MAC1*/
-#define IS_NO_STAT_M2 (1L<<8) /* Bit 8: No Rx Status from MAC2*/
-#define IS_NO_TIST_M1 (1L<<7) /* Bit 7: No Timestamp from MAC1*/
-#define IS_NO_TIST_M2 (1L<<6) /* Bit 6: No Timestamp from MAC2*/
-#define IS_RAM_RD_PAR (1L<<5) /* Bit 5: RAM Read Parity Error */
-#define IS_RAM_WR_PAR (1L<<4) /* Bit 4: RAM Write Parity Error*/
-#define IS_M1_PAR_ERR (1L<<3) /* Bit 3: MAC 1 Parity Error */
-#define IS_M2_PAR_ERR (1L<<2) /* Bit 2: MAC 2 Parity Error */
-#define IS_R1_PAR_ERR (1L<<1) /* Bit 1: Queue R1 Parity Error */
-#define IS_R2_PAR_ERR (1L<<0) /* Bit 0: Queue R2 Parity Error */
+ /* Bit 31..14: reserved */
+#define IS_IRQ_TIST_OV BIT_13 /* Time Stamp Timer Overflow (YUKON only) */
+#define IS_IRQ_SENSOR BIT_12 /* IRQ from Sensor (YUKON only) */
+#define IS_IRQ_MST_ERR BIT_11 /* IRQ master error detected */
+#define IS_IRQ_STAT BIT_10 /* IRQ status exception */
+#define IS_NO_STAT_M1 BIT_9 /* No Rx Status from MAC 1 */
+#define IS_NO_STAT_M2 BIT_8 /* No Rx Status from MAC 2 */
+#define IS_NO_TIST_M1 BIT_7 /* No Time Stamp from MAC 1 */
+#define IS_NO_TIST_M2 BIT_6 /* No Time Stamp from MAC 2 */
+#define IS_RAM_RD_PAR BIT_5 /* RAM Read Parity Error */
+#define IS_RAM_WR_PAR BIT_4 /* RAM Write Parity Error */
+#define IS_M1_PAR_ERR BIT_3 /* MAC 1 Parity Error */
+#define IS_M2_PAR_ERR BIT_2 /* MAC 2 Parity Error */
+#define IS_R1_PAR_ERR BIT_1 /* Queue R1 Parity Error */
+#define IS_R2_PAR_ERR BIT_0 /* Queue R2 Parity Error */
/* B2_CONN_TYP 8 bit Connector type */
/* B2_PMD_TYP 8 bit PMD type */
/* Values of connector and PMD type comply to SysKonnect internal std */
-/* B2_MAC_CFG 8 bit MAC Configuration */
- /* Bit 7..2: reserved */
-#define CFG_DIS_M2_CLK (1<<1) /* Bit 1: Disable Clock for 2nd MAC */
-#define CFG_SNG_MAC (1<<0) /* Bit 0: MAC Config: 1=2 MACs / 0=1 MAC*/
-
-/* B2_CHIP_REV 8 bit Queen Chip Revision Number */
-#define FIRST_CHIP_REV 0x0a /* Initial Revision Value */
+/* B2_MAC_CFG 8 bit MAC Configuration / Chip Revision */
+#define CFG_CHIP_R_MSK (0xf<<4) /* Bit 7.. 4: Chip Revision */
+ /* Bit 3.. 2: reserved */
+#define CFG_DIS_M2_CLK BIT_1S /* Disable Clock for 2nd MAC */
+#define CFG_SNG_MAC BIT_0S /* MAC Config: 0=2 MACs / 1=1 MAC*/
+
+/* B2_CHIP_ID 8 bit Chip Identification Number */
+#define CHIP_ID_GENESIS 0x0a /* Chip ID for GENESIS */
+#define CHIP_ID_YUKON 0xb0 /* Chip ID for YUKON */
+#define CHIP_ID_YUKON_LITE 0xb1 /* Chip ID for YUKON-Lite (Rev. A1) */
+#define CHIP_ID_YUKON_LP 0xb2 /* Chip ID for YUKON-LP */
/* B2_FAR 32 bit Flash-Prom Addr Reg/Cnt */
-#define FAR_ADDR 0x1ffffL /* Bit 16..0: FPROM Address mask */
+#define FAR_ADDR 0x1ffffL /* Bit 16.. 0: FPROM Address mask */
/* B2_LD_CRTL 8 bit EPROM loader control register */
/* Bits are currently reserved */
/* B2_LD_TEST 8 bit EPROM loader test register */
- /* Bit 7..4: reserved */
-#define LD_T_ON (1<<3) /* Bit 3: Loader Testmode on */
-#define LD_T_OFF (1<<2) /* Bit 2: Loader Testmode off */
-#define LD_T_STEP (1<<1) /* Bit 1: Decrement FPROM addr. Counter */
-#define LD_START (1<<0) /* Bit 0: Start loading FPROM */
+ /* Bit 7.. 4: reserved */
+#define LD_T_ON BIT_3S /* Loader Test mode on */
+#define LD_T_OFF BIT_2S /* Loader Test mode off */
+#define LD_T_STEP BIT_1S /* Decrement FPROM addr. Counter */
+#define LD_START BIT_0S /* Start loading FPROM */
/*
* Timer Section
*/
/* B2_TI_CRTL 8 bit Timer control */
/* B2_IRQM_CTRL 8 bit IRQ Moderation Timer Control */
- /* Bit 7..3: reserved */
-#define TIM_START (1<<2) /* Bit 2: Start Timer */
-#define TIM_STOP (1<<1) /* Bit 1: Stop Timer */
-#define TIM_CLR_IRQ (1<<0) /* Bit 0: Clear Timer IRQ, (!IRQM) */
+ /* Bit 7.. 3: reserved */
+#define TIM_START BIT_2S /* Start Timer */
+#define TIM_STOP BIT_1S /* Stop Timer */
+#define TIM_CLR_IRQ BIT_0S /* Clear Timer IRQ (!IRQM) */
/* B2_TI_TEST 8 Bit Timer Test */
/* B2_IRQM_TEST 8 bit IRQ Moderation Timer Test */
/* B28_DPT_TST 8 bit Descriptor Poll Timer Test Reg */
- /* Bit 7..3: reserved */
-#define TIM_T_ON (1<<2) /* Bit 2: Test mode on */
-#define TIM_T_OFF (1<<1) /* Bit 1: Test mode off */
-#define TIM_T_STEP (1<<0) /* Bit 0: Test step */
+ /* Bit 7.. 3: reserved */
+#define TIM_T_ON BIT_2S /* Test mode on */
+#define TIM_T_OFF BIT_1S /* Test mode off */
+#define TIM_T_STEP BIT_0S /* Test step */
/* B28_DPT_INI 32 bit Descriptor Poll Timer Init Val */
/* B28_DPT_VAL 32 bit Descriptor Poll Timer Curr Val */
@@ -874,100 +1172,101 @@
#define DPT_MSK 0x00ffffffL /* Bit 23.. 0: Desc Poll Timer Bits */
/* B28_DPT_CTRL 8 bit Descriptor Poll Timer Ctrl Reg */
- /* Bit 7..2: reserved */
-#define DPT_START (1<<1) /* Bit 1: Start Desciptor Poll Timer */
-#define DPT_STOP (1<<0) /* Bit 0: Stop Desciptor Poll Timer */
+ /* Bit 7.. 2: reserved */
+#define DPT_START BIT_1S /* Start Descriptor Poll Timer */
+#define DPT_STOP BIT_0S /* Stop Descriptor Poll Timer */
+/* B2_E_3 8 bit lower 4 bits used for HW self test result */
+#define B2_E3_RES_MASK 0x0f
/* B2_TST_CTRL1 8 bit Test Control Register 1 */
-#define TST_FRC_DPERR_MR (1<<7) /* Bit 7: force DATAPERR on MST RD */
-#define TST_FRC_DPERR_MW (1<<6) /* Bit 6: force DATAPERR on MST WR */
-#define TST_FRC_DPERR_TR (1<<5) /* Bit 5: force DATAPERR on TRG RD */
-#define TST_FRC_DPERR_TW (1<<4) /* Bit 4: force DATAPERR on TRG WR */
-#define TST_FRC_APERR_M (1<<3) /* Bit 3: force ADDRPERR on MST */
-#define TST_FRC_APERR_T (1<<2) /* Bit 2: force ADDRPERR on TRG */
-#define TST_CFG_WRITE_ON (1<<1) /* Bit 1: Enable Config Reg WR */
-#define TST_CFG_WRITE_OFF (1<<0) /* Bit 0: Disable Config Reg WR */
+#define TST_FRC_DPERR_MR BIT_7S /* force DATAPERR on MST RD */
+#define TST_FRC_DPERR_MW BIT_6S /* force DATAPERR on MST WR */
+#define TST_FRC_DPERR_TR BIT_5S /* force DATAPERR on TRG RD */
+#define TST_FRC_DPERR_TW BIT_4S /* force DATAPERR on TRG WR */
+#define TST_FRC_APERR_M BIT_3S /* force ADDRPERR on MST */
+#define TST_FRC_APERR_T BIT_2S /* force ADDRPERR on TRG */
+#define TST_CFG_WRITE_ON BIT_1S /* Enable Config Reg WR */
+#define TST_CFG_WRITE_OFF BIT_0S /* Disable Config Reg WR */
/* B2_TST_CTRL2 8 bit Test Control Register 2 */
- /* Bit 7..4: reserved */
- /* force the following error on */
- /* the next master read/write */
-#define TST_FRC_DPERR_MR64 (1<<3) /* Bit 3: DataPERR RD 64 */
-#define TST_FRC_DPERR_MW64 (1<<2) /* Bit 2: DataPERR WR 64 */
-#define TST_FRC_APERR_1M64 (1<<1) /* Bit 1: AddrPERR on 1. phase */
-#define TST_FRC_APERR_2M64 (1<<0) /* Bit 0: AddrPERR on 2. phase */
-
-/* B2_GP_IO 32 bit General Purpose IO Register */
- /* Bit 31..26: reserved */
-#define GP_DIR_9 (1L<<25) /* Bit 25: IO_9 direct, 0=I/1=O */
-#define GP_DIR_8 (1L<<24) /* Bit 24: IO_8 direct, 0=I/1=O */
-#define GP_DIR_7 (1L<<23) /* Bit 23: IO_7 direct, 0=I/1=O */
-#define GP_DIR_6 (1L<<22) /* Bit 22: IO_6 direct, 0=I/1=O */
-#define GP_DIR_5 (1L<<21) /* Bit 21: IO_5 direct, 0=I/1=O */
-#define GP_DIR_4 (1L<<20) /* Bit 20: IO_4 direct, 0=I/1=O */
-#define GP_DIR_3 (1L<<19) /* Bit 19: IO_3 direct, 0=I/1=O */
-#define GP_DIR_2 (1L<<18) /* Bit 18: IO_2 direct, 0=I/1=O */
-#define GP_DIR_1 (1L<<17) /* Bit 17: IO_1 direct, 0=I/1=O */
-#define GP_DIR_0 (1L<<16) /* Bit 16: IO_0 direct, 0=I/1=O */
- /* Bit 15..10: reserved */
-#define GP_IO_9 (1L<<9) /* Bit 9: IO_9 pin */
-#define GP_IO_8 (1L<<8) /* Bit 8: IO_8 pin */
-#define GP_IO_7 (1L<<7) /* Bit 7: IO_7 pin */
-#define GP_IO_6 (1L<<6) /* Bit 6: IO_6 pin */
-#define GP_IO_5 (1L<<5) /* Bit 5: IO_5 pin */
-#define GP_IO_4 (1L<<4) /* Bit 4: IO_4 pin */
-#define GP_IO_3 (1L<<3) /* Bit 3: IO_3 pin */
-#define GP_IO_2 (1L<<2) /* Bit 2: IO_2 pin */
-#define GP_IO_1 (1L<<1) /* Bit 1: IO_1 pin */
-#define GP_IO_0 (1L<<0) /* Bit 0: IO_0 pin */
+ /* Bit 7.. 4: reserved */
+ /* force the following error on the next master read/write */
+#define TST_FRC_DPERR_MR64 BIT_3S /* DataPERR RD 64 */
+#define TST_FRC_DPERR_MW64 BIT_2S /* DataPERR WR 64 */
+#define TST_FRC_APERR_1M64 BIT_1S /* AddrPERR on 1. phase */
+#define TST_FRC_APERR_2M64 BIT_0S /* AddrPERR on 2. phase */
+
+/* B2_GP_IO 32 bit General Purpose I/O Register */
+ /* Bit 31..26: reserved */
+#define GP_DIR_9 BIT_25 /* IO_9 direct, 0=In/1=Out */
+#define GP_DIR_8 BIT_24 /* IO_8 direct, 0=In/1=Out */
+#define GP_DIR_7 BIT_23 /* IO_7 direct, 0=In/1=Out */
+#define GP_DIR_6 BIT_22 /* IO_6 direct, 0=In/1=Out */
+#define GP_DIR_5 BIT_21 /* IO_5 direct, 0=In/1=Out */
+#define GP_DIR_4 BIT_20 /* IO_4 direct, 0=In/1=Out */
+#define GP_DIR_3 BIT_19 /* IO_3 direct, 0=In/1=Out */
+#define GP_DIR_2 BIT_18 /* IO_2 direct, 0=In/1=Out */
+#define GP_DIR_1 BIT_17 /* IO_1 direct, 0=In/1=Out */
+#define GP_DIR_0 BIT_16 /* IO_0 direct, 0=In/1=Out */
+ /* Bit 15..10: reserved */
+#define GP_IO_9 BIT_9 /* IO_9 pin */
+#define GP_IO_8 BIT_8 /* IO_8 pin */
+#define GP_IO_7 BIT_7 /* IO_7 pin */
+#define GP_IO_6 BIT_6 /* IO_6 pin */
+#define GP_IO_5 BIT_5 /* IO_5 pin */
+#define GP_IO_4 BIT_4 /* IO_4 pin */
+#define GP_IO_3 BIT_3 /* IO_3 pin */
+#define GP_IO_2 BIT_2 /* IO_2 pin */
+#define GP_IO_1 BIT_1 /* IO_1 pin */
+#define GP_IO_0 BIT_0 /* IO_0 pin */
/* B2_I2C_CTRL 32 bit I2C HW Control Register */
-#define I2C_FLAG (1UL<<31) /* Bit 31: Start read/write if WR*/
-#define I2C_ADDR (0x7fffL<<16) /* Bit 30..16: Addr to be RD/WR */
-#define I2C_DEV_SEL (0x7fL<<9) /* Bit 15.. 9: I2C Device Select */
- /* Bit 8.. 5: reserved */
-#define I2C_BURST_LEN (1L<<4) /* Bit 4: Burst Len, 1/4 bytes */
+#define I2C_FLAG BIT_31 /* Start read/write if WR */
+#define I2C_ADDR (0x7fffL<<16) /* Bit 30..16: Addr to be RD/WR */
+#define I2C_DEV_SEL (0x7fL<<9) /* Bit 15.. 9: I2C Device Select */
+ /* Bit 8.. 5: reserved */
+#define I2C_BURST_LEN BIT_4 /* Burst Len, 1/4 bytes */
#define I2C_DEV_SIZE (7L<<1) /* Bit 3.. 1: I2C Device Size */
#define I2C_025K_DEV (0L<<1) /* 0: 256 Bytes or smal. */
#define I2C_05K_DEV (1L<<1) /* 1: 512 Bytes */
-#define I2C_1K_DEV (2L<<1) /* 2: 1024 Bytes */
+#define I2C_1K_DEV (2L<<1) /* 2: 1024 Bytes */
#define I2C_2K_DEV (3L<<1) /* 3: 2048 Bytes */
-#define I2C_4K_DEV (4L<<1) /* 4: 4096 Bytes */
-#define I2C_8K_DEV (5L<<1) /* 5: 8192 Bytes */
-#define I2C_16K_DEV (6L<<1) /* 6: 16384 Bytes */
-#define I2C_32K_DEV (7L<<1) /* 7: 32768 Bytes */
-#define I2C_STOP (1L<<0) /* Bit 0: Interrupt I2C transfer*/
+#define I2C_4K_DEV (4L<<1) /* 4: 4096 Bytes */
+#define I2C_8K_DEV (5L<<1) /* 5: 8192 Bytes */
+#define I2C_16K_DEV (6L<<1) /* 6: 16384 Bytes */
+#define I2C_32K_DEV (7L<<1) /* 7: 32768 Bytes */
+#define I2C_STOP BIT_0 /* Interrupt I2C transfer */
/* B2_I2C_IRQ 32 bit I2C HW IRQ Register */
- /* Bit 31..1 reserved */
-#define I2C_CLR_IRQ (1<<0) /* Bit 0: Clear I2C IRQ */
+ /* Bit 31.. 1 reserved */
+#define I2C_CLR_IRQ BIT_0 /* Clear I2C IRQ */
-/* B2_I2C_SW 32 bit I2C HW SW Port Register */
- /* Bit 7..3: reserved */
-#define I2C_DATA_DIR (1<<2) /* Bit 2: direction of I2C_DATA */
-#define I2C_DATA (1<<1) /* Bit 1: I2C Data Port */
-#define I2C_CLK (1<<0) /* Bit 0: I2C Clock Port */
+/* B2_I2C_SW 32 bit (8 bit access) I2C HW SW Port Register */
+ /* Bit 7.. 3: reserved */
+#define I2C_DATA_DIR BIT_2S /* direction of I2C_DATA */
+#define I2C_DATA BIT_1S /* I2C Data Port */
+#define I2C_CLK BIT_0S /* I2C Clock Port */
/*
* I2C Address
*/
-#define I2C_SENS_ADDR LM80_ADDR /* I2C Sensor Address, (Volt and Temp)*/
+#define I2C_SENS_ADDR LM80_ADDR /* I2C Sensor Address, (Volt and Temp)*/
/* B2_BSC_CTRL 8 bit Blink Source Counter Control */
- /* Bit 7..2: reserved */
-#define BSC_START (1<<1) /* Bit 1: Start Blink Source Counter */
-#define BSC_STOP (1<<0) /* Bit 0: Stop Blink Source Counter */
+ /* Bit 7.. 2: reserved */
+#define BSC_START BIT_1S /* Start Blink Source Counter */
+#define BSC_STOP BIT_0S /* Stop Blink Source Counter */
/* B2_BSC_STAT 8 bit Blink Source Counter Status */
- /* Bit 7..1: reserved */
-#define BSC_SRC (1<<0) /* Bit 0: Blink Source, 0=Off / 1=On */
+ /* Bit 7.. 1: reserved */
+#define BSC_SRC BIT_0S /* Blink Source, 0=Off / 1=On */
/* B2_BSC_TST 16 bit Blink Source Counter Test Reg */
-#define BSC_T_ON (1<<2) /* Bit 2: Test mode on */
-#define BSC_T_OFF (1<<1) /* Bit 1: Test mode off */
-#define BSC_T_STEP (1<<0) /* Bit 0: Test step */
+#define BSC_T_ON BIT_2S /* Test mode on */
+#define BSC_T_OFF BIT_1S /* Test mode off */
+#define BSC_T_STEP BIT_0S /* Test step */
/* B3_RAM_ADDR 32 bit RAM Address, to read or write */
@@ -977,55 +1276,55 @@
/* RAM Interface Registers */
/* B3_RI_CTRL 16 bit RAM Iface Control Register */
/* Bit 15..10: reserved */
-#define RI_CLR_RD_PERR (1<<9) /* Bit 9: Clear IRQ RAM Read Parity Err */
-#define RI_CLR_WR_PERR (1<<8) /* Bit 8: Clear IRQ RAM Write Parity Err*/
- /* Bit 7..2: reserved */
-#define RI_RST_CLR (1<<1) /* Bit 1: Clear RAM Interface Reset */
-#define RI_RST_SET (1<<0) /* Bit 0: Set RAM Interface Reset */
+#define RI_CLR_RD_PERR BIT_9S /* Clear IRQ RAM Read Parity Err */
+#define RI_CLR_WR_PERR BIT_8S /* Clear IRQ RAM Write Parity Err*/
+ /* Bit 7.. 2: reserved */
+#define RI_RST_CLR BIT_1S /* Clear RAM Interface Reset */
+#define RI_RST_SET BIT_0S /* Set RAM Interface Reset */
/* B3_RI_TEST 8 bit RAM Iface Test Register */
- /* Bit 15..4: reserved */
-#define RI_T_EV (1<<3) /* Bit 3: Timeout Event occured */
-#define RI_T_ON (1<<2) /* Bit 2: Timeout Timer Test On */
-#define RI_T_OFF (1<<1) /* Bit 1: Timeout Timer Test Off */
-#define RI_T_STEP (1<<0) /* Bit 0: Timeout Timer Step */
+ /* Bit 15.. 4: reserved */
+#define RI_T_EV BIT_3S /* Timeout Event occured */
+#define RI_T_ON BIT_2S /* Timeout Timer Test On */
+#define RI_T_OFF BIT_1S /* Timeout Timer Test Off */
+#define RI_T_STEP BIT_0S /* Timeout Timer Step */
/* MAC Arbiter Registers */
/* B3_MA_TO_CTRL 16 bit MAC Arbiter Timeout Ctrl Reg */
- /* Bit 15..4: reserved */
-#define MA_FOE_ON (1<<3) /* Bit 3: XMAC Fast Output Enable ON */
-#define MA_FOE_OFF (1<<2) /* Bit 2: XMAC Fast Output Enable OFF */
-#define MA_RST_CLR (1<<1) /* Bit 1: Clear MAC Arbiter Reset */
-#define MA_RST_SET (1<<0) /* Bit 0: Set MAC Arbiter Reset */
+ /* Bit 15.. 4: reserved */
+#define MA_FOE_ON BIT_3S /* XMAC Fast Output Enable ON */
+#define MA_FOE_OFF BIT_2S /* XMAC Fast Output Enable OFF */
+#define MA_RST_CLR BIT_1S /* Clear MAC Arbiter Reset */
+#define MA_RST_SET BIT_0S /* Set MAC Arbiter Reset */
/* B3_MA_RC_CTRL 16 bit MAC Arbiter Recovery Ctrl Reg */
- /* Bit 15..8: reserved */
-#define MA_ENA_REC_TX2 (1<<7) /* Bit 7: Enable Recovery Timer TX2 */
-#define MA_DIS_REC_TX2 (1<<6) /* Bit 6: Disable Recovery Timer TX2 */
-#define MA_ENA_REC_TX1 (1<<5) /* Bit 5: Enable Recovery Timer TX1 */
-#define MA_DIS_REC_TX1 (1<<4) /* Bit 4: Disable Recovery Timer TX1 */
-#define MA_ENA_REC_RX2 (1<<3) /* Bit 3: Enable Recovery Timer RX2 */
-#define MA_DIS_REC_RX2 (1<<2) /* Bit 2: Disable Recovery Timer RX2 */
-#define MA_ENA_REC_RX1 (1<<1) /* Bit 1: Enable Recovery Timer RX1 */
-#define MA_DIS_REC_RX1 (1<<0) /* Bit 0: Disable Recovery Timer RX1 */
+ /* Bit 15.. 8: reserved */
+#define MA_ENA_REC_TX2 BIT_7S /* Enable Recovery Timer TX2 */
+#define MA_DIS_REC_TX2 BIT_6S /* Disable Recovery Timer TX2 */
+#define MA_ENA_REC_TX1 BIT_5S /* Enable Recovery Timer TX1 */
+#define MA_DIS_REC_TX1 BIT_4S /* Disable Recovery Timer TX1 */
+#define MA_ENA_REC_RX2 BIT_3S /* Enable Recovery Timer RX2 */
+#define MA_DIS_REC_RX2 BIT_2S /* Disable Recovery Timer RX2 */
+#define MA_ENA_REC_RX1 BIT_1S /* Enable Recovery Timer RX1 */
+#define MA_DIS_REC_RX1 BIT_0S /* Disable Recovery Timer RX1 */
/* Packet Arbiter Registers */
/* B3_PA_CTRL 16 bit Packet Arbiter Ctrl Register */
/* Bit 15..14: reserved */
-#define PA_CLR_TO_TX2 (1<<13) /* Bit 13: Clear IRQ Packet Timeout TX2 */
-#define PA_CLR_TO_TX1 (1<<12) /* Bit 12: Clear IRQ Packet Timeout TX1 */
-#define PA_CLR_TO_RX2 (1<<11) /* Bit 11: Clear IRQ Packet Timeout RX2 */
-#define PA_CLR_TO_RX1 (1<<10) /* Bit 10: Clear IRQ Packet Timeout RX1 */
-#define PA_ENA_TO_TX2 (1<<9) /* Bit 9: Enable Timeout Timer TX2 */
-#define PA_DIS_TO_TX2 (1<<8) /* Bit 8: Disable Timeout Timer TX2 */
-#define PA_ENA_TO_TX1 (1<<7) /* Bit 7: Enable Timeout Timer TX1 */
-#define PA_DIS_TO_TX1 (1<<6) /* Bit 6: Disable Timeout Timer TX1 */
-#define PA_ENA_TO_RX2 (1<<5) /* Bit 5: Enable Timeout Timer RX2 */
-#define PA_DIS_TO_RX2 (1<<4) /* Bit 4: Disable Timeout Timer RX2 */
-#define PA_ENA_TO_RX1 (1<<3) /* Bit 3: Enable Timeout Timer RX1 */
-#define PA_DIS_TO_RX1 (1<<2) /* Bit 2: Disable Timeout Timer RX1 */
-#define PA_RST_CLR (1<<1) /* Bit 1: Clear MAC Arbiter Reset */
-#define PA_RST_SET (1<<0) /* Bit 0: Set MAC Arbiter Reset */
+#define PA_CLR_TO_TX2 BIT_13S /* Clear IRQ Packet Timeout TX2 */
+#define PA_CLR_TO_TX1 BIT_12S /* Clear IRQ Packet Timeout TX1 */
+#define PA_CLR_TO_RX2 BIT_11S /* Clear IRQ Packet Timeout RX2 */
+#define PA_CLR_TO_RX1 BIT_10S /* Clear IRQ Packet Timeout RX1 */
+#define PA_ENA_TO_TX2 BIT_9S /* Enable Timeout Timer TX2 */
+#define PA_DIS_TO_TX2 BIT_8S /* Disable Timeout Timer TX2 */
+#define PA_ENA_TO_TX1 BIT_7S /* Enable Timeout Timer TX1 */
+#define PA_DIS_TO_TX1 BIT_6S /* Disable Timeout Timer TX1 */
+#define PA_ENA_TO_RX2 BIT_5S /* Enable Timeout Timer RX2 */
+#define PA_DIS_TO_RX2 BIT_4S /* Disable Timeout Timer RX2 */
+#define PA_ENA_TO_RX1 BIT_3S /* Enable Timeout Timer RX1 */
+#define PA_DIS_TO_RX1 BIT_2S /* Disable Timeout Timer RX1 */
+#define PA_RST_CLR BIT_1S /* Clear MAC Arbiter Reset */
+#define PA_RST_SET BIT_0S /* Set MAC Arbiter Reset */
#define PA_ENA_TO_ALL (PA_ENA_TO_RX1 | PA_ENA_TO_RX2 |\
PA_ENA_TO_TX1 | PA_ENA_TO_TX2)
@@ -1035,57 +1334,57 @@
/* B3_MA_RC_TEST 16 bit MAC Arbiter Recovery Test Reg */
/* B3_PA_TEST 16 bit Packet Arbiter Test Register */
/* Bit 15, 11, 7, and 3 are reserved in B3_PA_TEST */
-#define TX2_T_EV (1<<15) /* Bit 15: TX2 Timeout/Recv Event occured*/
-#define TX2_T_ON (1<<14) /* Bit 14: TX2 Timeout/Recv Timer Test On*/
-#define TX2_T_OFF (1<<13) /* Bit 13: TX2 Timeout/Recv Timer Tst Off*/
-#define TX2_T_STEP (1<<12) /* Bit 12: TX2 Timeout/Recv Timer Step */
-#define TX1_T_EV (1<<11) /* Bit 11: TX1 Timeout/Recv Event occured*/
-#define TX1_T_ON (1<<10) /* Bit 10: TX1 Timeout/Recv Timer Test On*/
-#define TX1_T_OFF (1<<9) /* Bit 9: TX1 Timeout/Recv Timer Tst Off*/
-#define TX1_T_STEP (1<<8) /* Bit 8: TX1 Timeout/Recv Timer Step */
-#define RX2_T_EV (1<<7) /* Bit 7: RX2 Timeout/Recv Event occured*/
-#define RX2_T_ON (1<<6) /* Bit 6: RX2 Timeout/Recv Timer Test On*/
-#define RX2_T_OFF (1<<5) /* Bit 5: RX2 Timeout/Recv Timer Tst Off*/
-#define RX2_T_STEP (1<<4) /* Bit 4: RX2 Timeout/Recv Timer Step */
-#define RX1_T_EV (1<<3) /* Bit 3: RX1 Timeout/Recv Event occured*/
-#define RX1_T_ON (1<<2) /* Bit 2: RX1 Timeout/Recv Timer Test On*/
-#define RX1_T_OFF (1<<1) /* Bit 1: RX1 Timeout/Recv Timer Tst Off*/
-#define RX1_T_STEP (1<<0) /* Bit 0: RX1 Timeout/Recv Timer Step */
+#define TX2_T_EV BIT_15S /* TX2 Timeout/Recv Event occured */
+#define TX2_T_ON BIT_14S /* TX2 Timeout/Recv Timer Test On */
+#define TX2_T_OFF BIT_13S /* TX2 Timeout/Recv Timer Tst Off */
+#define TX2_T_STEP BIT_12S /* TX2 Timeout/Recv Timer Step */
+#define TX1_T_EV BIT_11S /* TX1 Timeout/Recv Event occured */
+#define TX1_T_ON BIT_10S /* TX1 Timeout/Recv Timer Test On */
+#define TX1_T_OFF BIT_9S /* TX1 Timeout/Recv Timer Tst Off */
+#define TX1_T_STEP BIT_8S /* TX1 Timeout/Recv Timer Step */
+#define RX2_T_EV BIT_7S /* RX2 Timeout/Recv Event occured */
+#define RX2_T_ON BIT_6S /* RX2 Timeout/Recv Timer Test On */
+#define RX2_T_OFF BIT_5S /* RX2 Timeout/Recv Timer Tst Off */
+#define RX2_T_STEP BIT_4S /* RX2 Timeout/Recv Timer Step */
+#define RX1_T_EV BIT_3S /* RX1 Timeout/Recv Event occured */
+#define RX1_T_ON BIT_2S /* RX1 Timeout/Recv Timer Test On */
+#define RX1_T_OFF BIT_1S /* RX1 Timeout/Recv Timer Tst Off */
+#define RX1_T_STEP BIT_0S /* RX1 Timeout/Recv Timer Step */
-/* Transmit Arbiter Registers MAC 1 and 2, user MR_ADDR() to address */
+/* Transmit Arbiter Registers MAC 1 and 2, use MR_ADDR() to access */
/* TXA_ITI_INI 32 bit Tx Arb Interval Timer Init Val */
/* TXA_ITI_VAL 32 bit Tx Arb Interval Timer Value */
/* TXA_LIM_INI 32 bit Tx Arb Limit Counter Init Val */
/* TXA_LIM_VAL 32 bit Tx Arb Limit Counter Value */
/* Bit 31..24: reserved */
-#define TXA_MAX_VAL 0x00ffffffL /* Bit 23.. 0: Max TXA Timer/Cnt Val */
+#define TXA_MAX_VAL 0x00ffffffUL/* Bit 23.. 0: Max TXA Timer/Cnt Val */
/* TXA_CTRL 8 bit Tx Arbiter Control Register */
-#define TXA_ENA_FSYNC (1<<7) /* Bit 7: Enable force of sync tx queue */
-#define TXA_DIS_FSYNC (1<<6) /* Bit 6: Disable force of sync tx queue*/
-#define TXA_ENA_ALLOC (1<<5) /* Bit 5: Enable alloc of free bandwidth*/
-#define TXA_DIS_ALLOC (1<<4) /* Bit 4: Disabl alloc of free bandwidth*/
-#define TXA_START_RC (1<<3) /* Bit 3: Start sync Rate Control */
-#define TXA_STOP_RC (1<<2) /* Bit 2: Stop sync Rate Control */
-#define TXA_ENA_ARB (1<<1) /* Bit 1: Enable Tx Arbiter */
-#define TXA_DIS_ARB (1<<0) /* Bit 0: Disable Tx Arbiter */
+#define TXA_ENA_FSYNC BIT_7S /* Enable force of sync Tx queue */
+#define TXA_DIS_FSYNC BIT_6S /* Disable force of sync Tx queue */
+#define TXA_ENA_ALLOC BIT_5S /* Enable alloc of free bandwidth */
+#define TXA_DIS_ALLOC BIT_4S /* Disable alloc of free bandwidth */
+#define TXA_START_RC BIT_3S /* Start sync Rate Control */
+#define TXA_STOP_RC BIT_2S /* Stop sync Rate Control */
+#define TXA_ENA_ARB BIT_1S /* Enable Tx Arbiter */
+#define TXA_DIS_ARB BIT_0S /* Disable Tx Arbiter */
/* TXA_TEST 8 bit Tx Arbiter Test Register */
- /* Bit 7..6: reserved */
-#define TXA_INT_T_ON (1<<5) /* Bit 5: Tx Arb Interval Timer Test On */
-#define TXA_INT_T_OFF (1<<4) /* Bit 4: Tx Arb Interval Timer Test Off*/
-#define TXA_INT_T_STEP (1<<3) /* Bit 3: Tx Arb Interval Timer Step */
-#define TXA_LIM_T_ON (1<<2) /* Bit 2: Tx Arb Limit Timer Test On */
-#define TXA_LIM_T_OFF (1<<1) /* Bit 1: Tx Arb Limit Timer Test Off */
-#define TXA_LIM_T_STEP (1<<0) /* Bit 0: Tx Arb Limit Timer Step */
+ /* Bit 7.. 6: reserved */
+#define TXA_INT_T_ON BIT_5S /* Tx Arb Interval Timer Test On */
+#define TXA_INT_T_OFF BIT_4S /* Tx Arb Interval Timer Test Off */
+#define TXA_INT_T_STEP BIT_3S /* Tx Arb Interval Timer Step */
+#define TXA_LIM_T_ON BIT_2S /* Tx Arb Limit Timer Test On */
+#define TXA_LIM_T_OFF BIT_1S /* Tx Arb Limit Timer Test Off */
+#define TXA_LIM_T_STEP BIT_0S /* Tx Arb Limit Timer Step */
/* TXA_STAT 8 bit Tx Arbiter Status Register */
- /* Bit 7..1: reserved */
-#define TXA_PRIO_XS (1<<0) /* Bit 0: sync queue has prio to send */
+ /* Bit 7.. 1: reserved */
+#define TXA_PRIO_XS BIT_0S /* sync queue has prio to send */
/* Q_BC 32 bit Current Byte Counter */
- /* Bit 31..16: reserved */
+ /* Bit 31..16: reserved */
#define BC_MAX 0xffff /* Bit 15.. 0: Byte counter */
/* BMU Control Status Registers */
@@ -1095,94 +1394,95 @@
/* B0_XS1_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 1 */
/* B0_XA2_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
/* B0_XS2_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 2 */
-/* Q_CSR 32 bit BMU Control/Status Register */
- /* Bit 31..25: reserved */
-#define CSR_SV_IDLE (1L<<24) /* Bit 24: BMU SM Idle */
- /* Bit 23..22: reserved */
-#define CSR_DESC_CLR (1L<<21) /* Bit 21: Clear Reset for Descr */
-#define CSR_DESC_SET (1L<<20) /* Bit 20: Set Reset for Descr */
-#define CSR_FIFO_CLR (1L<<19) /* Bit 19: Clear Reset for FIFO */
-#define CSR_FIFO_SET (1L<<18) /* Bit 18: Set Reset for FIFO */
-#define CSR_HPI_RUN (1L<<17) /* Bit 17: Release HPI SM */
-#define CSR_HPI_RST (1L<<16) /* Bit 16: Reset HPI SM to Idle */
-#define CSR_SV_RUN (1L<<15) /* Bit 15: Release Supervisor SM */
-#define CSR_SV_RST (1L<<14) /* Bit 14: Reset Supervisor SM */
-#define CSR_DREAD_RUN (1L<<13) /* Bit 13: Release Descr Read SM */
-#define CSR_DREAD_RST (1L<<12) /* Bit 12: Reset Descr Read SM */
-#define CSR_DWRITE_RUN (1L<<11) /* Bit 11: Rel. Descr Write SM */
-#define CSR_DWRITE_RST (1L<<10) /* Bit 10: Reset Descr Write SM */
-#define CSR_TRANS_RUN (1L<<9) /* Bit 9: Release Transfer SM */
-#define CSR_TRANS_RST (1L<<8) /* Bit 8: Reset Transfer SM */
-#define CSR_ENA_POL (1L<<7) /* Bit 7: Enable Descr Polling */
-#define CSR_DIS_POL (1L<<6) /* Bit 6: Disable Descr Polling */
-#define CSR_STOP (1L<<5) /* Bit 5: Stop Rx/Tx Queue */
-#define CSR_START (1L<<4) /* Bit 4: Start Rx/Tx Queue */
-#define CSR_IRQ_CL_P (1L<<3) /* Bit 3: (Rx) Clear Parity IRQ */
-#define CSR_IRQ_CL_B (1L<<2) /* Bit 2: Clear EOB IRQ */
-#define CSR_IRQ_CL_F (1L<<1) /* Bit 1: Clear EOF IRQ */
-#define CSR_IRQ_CL_C (1L<<0) /* Bit 0: Clear ERR IRQ */
-
-#define CSR_SET_RESET (CSR_DESC_SET|CSR_FIFO_SET|CSR_HPI_RST|CSR_SV_RST|\
- CSR_DREAD_RST|CSR_DWRITE_RST|CSR_TRANS_RST)
-#define CSR_CLR_RESET (CSR_DESC_CLR|CSR_FIFO_CLR|CSR_HPI_RUN|CSR_SV_RUN|\
- CSR_DREAD_RUN|CSR_DWRITE_RUN|CSR_TRANS_RUN)
-
+/* Q_CSR 32 bit BMU Control/Status Register */
+ /* Bit 31..25: reserved */
+#define CSR_SV_IDLE BIT_24 /* BMU SM Idle */
+ /* Bit 23..22: reserved */
+#define CSR_DESC_CLR BIT_21 /* Clear Reset for Descr */
+#define CSR_DESC_SET BIT_20 /* Set Reset for Descr */
+#define CSR_FIFO_CLR BIT_19 /* Clear Reset for FIFO */
+#define CSR_FIFO_SET BIT_18 /* Set Reset for FIFO */
+#define CSR_HPI_RUN BIT_17 /* Release HPI SM */
+#define CSR_HPI_RST BIT_16 /* Reset HPI SM to Idle */
+#define CSR_SV_RUN BIT_15 /* Release Supervisor SM */
+#define CSR_SV_RST BIT_14 /* Reset Supervisor SM */
+#define CSR_DREAD_RUN BIT_13 /* Release Descr Read SM */
+#define CSR_DREAD_RST BIT_12 /* Reset Descr Read SM */
+#define CSR_DWRITE_RUN BIT_11 /* Release Descr Write SM */
+#define CSR_DWRITE_RST BIT_10 /* Reset Descr Write SM */
+#define CSR_TRANS_RUN BIT_9 /* Release Transfer SM */
+#define CSR_TRANS_RST BIT_8 /* Reset Transfer SM */
+#define CSR_ENA_POL BIT_7 /* Enable Descr Polling */
+#define CSR_DIS_POL BIT_6 /* Disable Descr Polling */
+#define CSR_STOP BIT_5 /* Stop Rx/Tx Queue */
+#define CSR_START BIT_4 /* Start Rx/Tx Queue */
+#define CSR_IRQ_CL_P BIT_3 /* (Rx) Clear Parity IRQ */
+#define CSR_IRQ_CL_B BIT_2 /* Clear EOB IRQ */
+#define CSR_IRQ_CL_F BIT_1 /* Clear EOF IRQ */
+#define CSR_IRQ_CL_C BIT_0 /* Clear ERR IRQ */
+
+#define CSR_SET_RESET (CSR_DESC_SET | CSR_FIFO_SET | CSR_HPI_RST |\
+ CSR_SV_RST | CSR_DREAD_RST | CSR_DWRITE_RST |\
+ CSR_TRANS_RST)
+#define CSR_CLR_RESET (CSR_DESC_CLR | CSR_FIFO_CLR | CSR_HPI_RUN |\
+ CSR_SV_RUN | CSR_DREAD_RUN | CSR_DWRITE_RUN |\
+ CSR_TRANS_RUN)
/* Q_F 32 bit Flag Register */
- /* Bit 28..31: reserved */
-#define F_ALM_FULL (1L<<27) (Rx) /* Bit 27: (Rx) FIFO almost full */
-#define F_EMPTY (1L<<27) (Tx) /* Bit 27: (Tx) FIFO empty flag */
-#define F_FIFO_EOF (1L<<26) /* Bit 26: Fag bit in FIFO */
-#define F_WM_REACHED (1L<<25) /* Bit 25: Watermark reached */
- /* Bit 24: reserved */
+ /* Bit 31..28: reserved */
+#define F_ALM_FULL BIT_27 /* Rx FIFO: almost full */
+#define F_EMPTY BIT_27 /* Tx FIFO: empty flag */
+#define F_FIFO_EOF BIT_26 /* Tag (EOF Flag) bit in FIFO */
+#define F_WM_REACHED BIT_25 /* Watermark reached */
+ /* reserved */
#define F_FIFO_LEVEL (0x1fL<<16) /* Bit 23..16: # of Qwords in FIFO */
/* Bit 15..11: reserved */
#define F_WATER_MARK 0x0007ffL /* Bit 10.. 0: Watermark */
/* Q_T1 32 bit Test Register 1 */
/* Holds four State Machine control Bytes */
-#define SM_CRTL_SV (0xffL<<24) /* Bit 31..24: Control Supervisor SM */
-#define SM_CRTL_RD (0xffL<<16) /* Bit 23..16: Control Read Desc SM */
-#define SM_CRTL_WR (0xffL<<8) /* Bit 15.. 8: Control Write Desc SM */
-#define SM_CRTL_TR (0xffL<<0) /* Bit 7.. 0: Control Transfer SM */
+#define SM_CRTL_SV_MSK (0xffL<<24) /* Bit 31..24: Control Supervisor SM */
+#define SM_CRTL_RD_MSK (0xffL<<16) /* Bit 23..16: Control Read Desc SM */
+#define SM_CRTL_WR_MSK (0xffL<<8) /* Bit 15.. 8: Control Write Desc SM */
+#define SM_CRTL_TR_MSK 0xffL /* Bit 7.. 0: Control Transfer SM */
/* Q_T1_TR 8 bit Test Register 1 Transfer SM */
/* Q_T1_WR 8 bit Test Register 1 Write Descriptor SM */
/* Q_T1_RD 8 bit Test Register 1 Read Descriptor SM */
/* Q_T1_SV 8 bit Test Register 1 Supervisor SM */
+
/* The control status byte of each machine looks like ... */
-#define SM_STATE 0xf0 /* Bit 7..4: State which shall be loaded */
-#define SM_LOAD (1<<3) /* Bit 3: Load the SM with SM_STATE */
-#define SM_TEST_ON (1<<2) /* Bit 2: Switch on SM Test Mode */
-#define SM_TEST_OFF (1<<1) /* Bit 1: Go off the Test Mode */
-#define SM_STEP (1<<0) /* Bit 0: Step the State Machine */
+#define SM_STATE 0xf0 /* Bit 7.. 4: State which shall be loaded */
+#define SM_LOAD BIT_3S /* Load the SM with SM_STATE */
+#define SM_TEST_ON BIT_2S /* Switch on SM Test Mode */
+#define SM_TEST_OFF BIT_1S /* Go off the Test Mode */
+#define SM_STEP BIT_0S /* Step the State Machine */
/* The encoding of the states is not supported by the Diagnostics Tool */
/* Q_T2 32 bit Test Register 2 */
- /* Bit 31..8: reserved */
-#define T2_AC_T_ON (1<<7) /* Bit 7: Address Counter Test Mode on */
-#define T2_AC_T_OFF (1<<6) /* Bit 6: Address Counter Test Mode off*/
-#define T2_BC_T_ON (1<<5) /* Bit 5: Byte Counter Test Mode on */
-#define T2_BC_T_OFF (1<<4) /* Bit 4: Byte Counter Test Mode off */
-#define T2_STEP04 (1<<3) /* Bit 3: Inc AC/Dec BC by 4 */
-#define T2_STEP03 (1<<2) /* Bit 2: Inc AC/Dec BC by 3 */
-#define T2_STEP02 (1<<1) /* Bit 1: Inc AC/Dec BC by 2 */
-#define T2_STEP01 (1<<0) /* Bit 0: Inc AC/Dec BC by 1 */
+ /* Bit 31.. 8: reserved */
+#define T2_AC_T_ON BIT_7 /* Address Counter Test Mode on */
+#define T2_AC_T_OFF BIT_6 /* Address Counter Test Mode off */
+#define T2_BC_T_ON BIT_5 /* Byte Counter Test Mode on */
+#define T2_BC_T_OFF BIT_4 /* Byte Counter Test Mode off */
+#define T2_STEP04 BIT_3 /* Inc AC/Dec BC by 4 */
+#define T2_STEP03 BIT_2 /* Inc AC/Dec BC by 3 */
+#define T2_STEP02 BIT_1 /* Inc AC/Dec BC by 2 */
+#define T2_STEP01 BIT_0 /* Inc AC/Dec BC by 1 */
/* Q_T3 32 bit Test Register 3 */
- /* Bit 31..7: reserved */
-#define T3_MUX (7<<4) /* Bit 6.. 4: Mux Position */
- /* Bit 3: reserved */
-#define T3_VRAM (7<<0) /* Bit 2.. 0: Virtual RAM Buffer Address */
+ /* Bit 31.. 7: reserved */
+#define T3_MUX_MSK (7<<4) /* Bit 6.. 4: Mux Position */
+ /* Bit 3: reserved */
+#define T3_VRAM_MSK 7 /* Bit 2.. 0: Virtual RAM Buffer Address */
-/* RAM Buffer Register Offsets */
-/* use RB_ADDR(Queue,Offs) to address */
+/* RAM Buffer Register Offsets, use RB_ADDR(Queue, Offs) to access */
/* RB_START 32 bit RAM Buffer Start Address */
/* RB_END 32 bit RAM Buffer End Address */
/* RB_WP 32 bit RAM Buffer Write Pointer */
/* RB_RP 32 bit RAM Buffer Read Pointer */
/* RB_RX_UTPP 32 bit Rx Upper Threshold, Pause Pack */
-/* RB_RX_LTPP 32 bit Rx Lower Threshold, Pasue Pack */
+/* RB_RX_LTPP 32 bit Rx Lower Threshold, Pause Pack */
/* RB_RX_UTHP 32 bit Rx Upper Threshold, High Prio */
/* RB_RX_LTHP 32 bit Rx Lower Threshold, High Prio */
/* RB_PC 32 bit RAM Buffer Packet Counter */
@@ -1190,144 +1490,327 @@
/* Bit 31..19: reserved */
#define RB_MSK 0x0007ffff /* Bit 18.. 0: RAM Buffer Pointer Bits */
-/* RB_TST2 8 bit RAM Buffer Test Register 2 */
- /* Bit 4..7: reserved */
-#define RB_PC_DEC (1<<3) /* Bit 3: Packet Counter Decrem */
-#define RB_PC_T_ON (1<<2) /* Bit 2: Packet Counter Test On */
-#define RB_PC_T_OFF (1<<1) /* Bit 1: Packet Counter Tst Off */
-#define RB_PC_INC (1<<0) /* Bit 0: Packet Counter Increm */
-
-/* RB_TST1 8 bit RAM Buffer Test Register 1 */
- /* Bit 7: reserved */
-#define RB_WP_T_ON (1<<6) /* Bit 6: Write Pointer Test On */
-#define RB_WP_T_OFF (1<<5) /* Bit 5: Write Pointer Test Off */
-#define RB_WP_INC (1<<4) /* Bit 4: Write Pointer Increm */
- /* Bit 3: reserved */
-#define RB_RP_T_ON (1<<2) /* Bit 2: Read Pointer Test On */
-#define RB_RP_T_OFF (1<<1) /* Bit 1: Read Pointer Test Off */
-#define RB_RP_DEC (1<<0) /* Bit 0: Read Pointer Decrement */
-
-/* RB_CTRL 8 bit RAM Buffer Control Register */
- /* Bit 7..6: reserved */
-#define RB_ENA_STFWD (1<<5) /* Bit 5: Enable Store & Forward */
-#define RB_DIS_STFWD (1<<4) /* Bit 4: Disab. Store & Forward */
-#define RB_ENA_OP_MD (1<<3) /* Bit 3: Enable Operation Mode */
-#define RB_DIS_OP_MD (1<<2) /* Bit 2: Disab. Operation Mode */
-#define RB_RST_CLR (1<<1) /* Bit 1: Clr RAM Buf STM Reset */
-#define RB_RST_SET (1<<0) /* Bit 0: Set RAM Buf STM Reset */
+/* RB_TST2 8 bit RAM Buffer Test Register 2 */
+ /* Bit 7.. 4: reserved */
+#define RB_PC_DEC BIT_3S /* Packet Counter Decrem */
+#define RB_PC_T_ON BIT_2S /* Packet Counter Test On */
+#define RB_PC_T_OFF BIT_1S /* Packet Counter Tst Off */
+#define RB_PC_INC BIT_0S /* Packet Counter Increm */
+
+/* RB_TST1 8 bit RAM Buffer Test Register 1 */
+ /* Bit 7: reserved */
+#define RB_WP_T_ON BIT_6S /* Write Pointer Test On */
+#define RB_WP_T_OFF BIT_5S /* Write Pointer Test Off */
+#define RB_WP_INC BIT_4S /* Write Pointer Increm */
+ /* Bit 3: reserved */
+#define RB_RP_T_ON BIT_2S /* Read Pointer Test On */
+#define RB_RP_T_OFF BIT_1S /* Read Pointer Test Off */
+#define RB_RP_DEC BIT_0S /* Read Pointer Decrement */
+
+/* RB_CTRL 8 bit RAM Buffer Control Register */
+ /* Bit 7.. 6: reserved */
+#define RB_ENA_STFWD BIT_5S /* Enable Store & Forward */
+#define RB_DIS_STFWD BIT_4S /* Disable Store & Forward */
+#define RB_ENA_OP_MD BIT_3S /* Enable Operation Mode */
+#define RB_DIS_OP_MD BIT_2S /* Disable Operation Mode */
+#define RB_RST_CLR BIT_1S /* Clear RAM Buf STM Reset */
+#define RB_RST_SET BIT_0S /* Set RAM Buf STM Reset */
+
+/* Receive and Transmit MAC FIFO Registers (GENESIS only) */
-/* Receive and Transmit MAC FIFO Registers, use MR_ADDR() to address */
/* RX_MFF_EA 32 bit Receive MAC FIFO End Address */
/* RX_MFF_WP 32 bit Receive MAC FIFO Write Pointer */
/* RX_MFF_RP 32 bit Receive MAC FIFO Read Pointer */
-/* RX_MFF_PC 32 bit Receive MAC FIFO Packet Counter*/
+/* RX_MFF_PC 32 bit Receive MAC FIFO Packet Counter */
/* RX_MFF_LEV 32 bit Receive MAC FIFO Level */
/* TX_MFF_EA 32 bit Transmit MAC FIFO End Address */
-/* TX_MFF_WP 32 bit Transmit MAC FIFO Write Pointer*/
-/* TX_MFF_WSP 32 bit Transmit MAC FIFO WR Shadow Pt*/
+/* TX_MFF_WP 32 bit Transmit MAC FIFO Write Pointer */
+/* TX_MFF_WSP 32 bit Transmit MAC FIFO WR Shadow Pointer */
/* TX_MFF_RP 32 bit Transmit MAC FIFO Read Pointer */
/* TX_MFF_PC 32 bit Transmit MAC FIFO Packet Cnt */
/* TX_MFF_LEV 32 bit Transmit MAC FIFO Level */
- /* Bit 31..6: reserved */
-#define MFF_MSK 0x007fL /* Bit 5..0: MAC FIFO Address/Pointer Bits */
+ /* Bit 31.. 6: reserved */
+#define MFF_MSK 0x007fL /* Bit 5.. 0: MAC FIFO Address/Ptr Bits */
/* RX_MFF_CTRL1 16 bit Receive MAC FIFO Control Reg 1 */
- /* Bit 15..14: reserved */
-#define MFF_ENA_RDY_PAT (1<<13) /* Bit 13: Enable Ready Patch */
-#define MFF_DIS_RDY_PAT (1<<12) /* Bit 12: Disable Ready Patch */
-#define MFF_ENA_TIM_PAT (1<<11) /* Bit 11: Enable Timing Patch */
-#define MFF_DIS_TIM_PAT (1<<10) /* Bit 10: Disable Timing Patch */
-#define MFF_ENA_ALM_FUL (1<<9) /* Bit 9: Enable AlmostFull Sign*/
-#define MFF_DIS_ALM_FUL (1<<8) /* Bit 8: Disab. AlmostFull Sign*/
-#define MFF_ENA_PAUSE (1<<7) /* Bit 7: Enable Pause Signaling*/
-#define MFF_DIS_PAUSE (1<<6) /* Bit 6: Disab. Pause Signaling*/
-#define MFF_ENA_FLUSH (1<<5) /* Bit 5: Enable Frame Flushing */
-#define MFF_DIS_FLUSH (1<<4) /* Bit 4: Disab. Frame Flushing */
-#define MFF_ENA_TIST (1<<3) /* Bit 3: Enable Timestamp Gener*/
-#define MFF_DIS_TIST (1<<2) /* Bit 2: Disab. Timestamp Gener*/
-#define MFF_CLR_INTIST (1<<1) /* Bit 1: Clear IRQ No Timestamp*/
-#define MFF_CLR_INSTAT (1<<0) /* Bit 0: Clear IRQ No Status */
+ /* Bit 15..14: reserved */
+#define MFF_ENA_RDY_PAT BIT_13S /* Enable Ready Patch */
+#define MFF_DIS_RDY_PAT BIT_12S /* Disable Ready Patch */
+#define MFF_ENA_TIM_PAT BIT_11S /* Enable Timing Patch */
+#define MFF_DIS_TIM_PAT BIT_10S /* Disable Timing Patch */
+#define MFF_ENA_ALM_FUL BIT_9S /* Enable AlmostFull Sign */
+#define MFF_DIS_ALM_FUL BIT_8S /* Disable AlmostFull Sign */
+#define MFF_ENA_PAUSE BIT_7S /* Enable Pause Signaling */
+#define MFF_DIS_PAUSE BIT_6S /* Disable Pause Signaling */
+#define MFF_ENA_FLUSH BIT_5S /* Enable Frame Flushing */
+#define MFF_DIS_FLUSH BIT_4S /* Disable Frame Flushing */
+#define MFF_ENA_TIST BIT_3S /* Enable Time Stamp Gener */
+#define MFF_DIS_TIST BIT_2S /* Disable Time Stamp Gener */
+#define MFF_CLR_INTIST BIT_1S /* Clear IRQ No Time Stamp */
+#define MFF_CLR_INSTAT BIT_0S /* Clear IRQ No Status */
#define MFF_RX_CTRL_DEF MFF_ENA_TIM_PAT
/* TX_MFF_CTRL1 16 bit Transmit MAC FIFO Control Reg 1 */
-#define MFF_CLR_PERR (1<<15) /* Bit 15: Clear Parity Error IRQ*/
- /* Bit 14: reserved */
-#define MFF_ENA_PKT_REC (1<<13) /* Bit 13: Enable Packet Recovery*/
-#define MFF_DIS_PKT_REC (1<<12) /* Bit 12: Disable Packet Recov. */
-/* MFF_ENA_TIM_PAT (see RX_MFF_CTRL1)Bit 11: Enable Timing Patch */
-/* MFF_DIS_TIM_PAT (see RX_MFF_CTRL1)Bit 10: Disable Timing Patch */
-/* MFF_ENA_ALM_FUL (see RX_MFF_CTRL1)Bit 9: Enable AlmostFull Sign*/
-/* MFF_DIS_ALM_FUL (see RX_MFF_CTRL1)Bit 8: Disab. AlmostFull Sign*/
-#define MFF_ENA_W4E (1<<7) /* Bit 7: Enable Wait for Empty */
-#define MFF_DIS_W4E (1<<6) /* Bit 6: Disab. Wait for Empty */
-/* MFF_ENA_FLUSH (see RX_MFF_CTRL1)Bit 5: Enable Frame Flushing */
-/* MFF_DIS_FLUSH (see RX_MFF_CTRL1)Bit 4: Disab. Frame Flushing */
-#define MFF_ENA_LOOPB (1<<3) /* Bit 3: Enable Loopback */
-#define MFF_DIS_LOOPB (1<<2) /* Bit 2: Disable Loopback */
-#define MFF_CLR_MAC_RST (1<<1) /* Bit 1: Clear XMAC Reset */
-#define MFF_SET_MAC_RST (1<<0) /* Bit 0: Set XMAC Reset */
+#define MFF_CLR_PERR BIT_15S /* Clear Parity Error IRQ */
+ /* Bit 14: reserved */
+#define MFF_ENA_PKT_REC BIT_13S /* Enable Packet Recovery */
+#define MFF_DIS_PKT_REC BIT_12S /* Disable Packet Recovery */
+/* MFF_ENA_TIM_PAT (see RX_MFF_CTRL1) Bit 11: Enable Timing Patch */
+/* MFF_DIS_TIM_PAT (see RX_MFF_CTRL1) Bit 10: Disable Timing Patch */
+/* MFF_ENA_ALM_FUL (see RX_MFF_CTRL1) Bit 9: Enable Almost Full Sign */
+/* MFF_DIS_ALM_FUL (see RX_MFF_CTRL1) Bit 8: Disable Almost Full Sign */
+#define MFF_ENA_W4E BIT_7S /* Enable Wait for Empty */
+#define MFF_DIS_W4E BIT_6S /* Disable Wait for Empty */
+/* MFF_ENA_FLUSH (see RX_MFF_CTRL1) Bit 5: Enable Frame Flushing */
+/* MFF_DIS_FLUSH (see RX_MFF_CTRL1) Bit 4: Disable Frame Flushing */
+#define MFF_ENA_LOOPB BIT_3S /* Enable Loopback */
+#define MFF_DIS_LOOPB BIT_2S /* Disable Loopback */
+#define MFF_CLR_MAC_RST BIT_1S /* Clear XMAC Reset */
+#define MFF_SET_MAC_RST BIT_0S /* Set XMAC Reset */
#define MFF_TX_CTRL_DEF (MFF_ENA_PKT_REC | MFF_ENA_TIM_PAT | MFF_ENA_FLUSH)
-/* RX_MFF_TST2 8 bit Receive MAC FIFO Test Register 2 */
-/* TX_MFF_TST2 8 bit Transmit MAC FIFO Test Register 2 */
+/* RX_MFF_TST2 8 bit Receive MAC FIFO Test Register 2 */
+/* TX_MFF_TST2 8 bit Transmit MAC FIFO Test Register 2 */
/* Bit 7: reserved */
-#define MFF_WSP_T_ON (1<<6) /* Bit 6: (Tx) Write Shadow Pt TestOn */
-#define MFF_WSP_T_OFF (1<<5) /* Bit 5: (Tx) Write Shadow Pt TstOff */
-#define MFF_WSP_INC (1<<4) /* Bit 4: (Tx) Write Shadow Pt Increm */
-#define MFF_PC_DEC (1<<3) /* Bit 3: Packet Counter Decrem */
-#define MFF_PC_T_ON (1<<2) /* Bit 2: Packet Counter Test On */
-#define MFF_PC_T_OFF (1<<1) /* Bit 1: Packet Counter Tst Off */
-#define MFF_PC_INC (1<<0) /* Bit 0: Packet Counter Increm */
+#define MFF_WSP_T_ON BIT_6S /* Tx: Write Shadow Ptr TestOn */
+#define MFF_WSP_T_OFF BIT_5S /* Tx: Write Shadow Ptr TstOff */
+#define MFF_WSP_INC BIT_4S /* Tx: Write Shadow Ptr Increment */
+#define MFF_PC_DEC BIT_3S /* Packet Counter Decrement */
+#define MFF_PC_T_ON BIT_2S /* Packet Counter Test On */
+#define MFF_PC_T_OFF BIT_1S /* Packet Counter Test Off */
+#define MFF_PC_INC BIT_0S /* Packet Counter Increment */
-/* RX_MFF_TST1 8 bit Receive MAC FIFO Test Register 1 */
-/* TX_MFF_TST1 8 bit Transmit MAC FIFO Test Register 1 */
+/* RX_MFF_TST1 8 bit Receive MAC FIFO Test Register 1 */
+/* TX_MFF_TST1 8 bit Transmit MAC FIFO Test Register 1 */
/* Bit 7: reserved */
-#define MFF_WP_T_ON (1<<6) /* Bit 6: Write Pointer Test On */
-#define MFF_WP_T_OFF (1<<5) /* Bit 5: Write Pointer Test Off */
-#define MFF_WP_INC (1<<4) /* Bit 4: Write Pointer Increm */
- /* Bit 3: reserved */
-#define MFF_RP_T_ON (1<<2) /* Bit 2: Read Pointer Test On */
-#define MFF_RP_T_OFF (1<<1) /* Bit 1: Read Pointer Test Off */
-#define MFF_RP_DEC (1<<0) /* Bit 0: Read Pointer Decrement */
+#define MFF_WP_T_ON BIT_6S /* Write Pointer Test On */
+#define MFF_WP_T_OFF BIT_5S /* Write Pointer Test Off */
+#define MFF_WP_INC BIT_4S /* Write Pointer Increm */
+ /* Bit 3: reserved */
+#define MFF_RP_T_ON BIT_2S /* Read Pointer Test On */
+#define MFF_RP_T_OFF BIT_1S /* Read Pointer Test Off */
+#define MFF_RP_DEC BIT_0S /* Read Pointer Decrement */
/* RX_MFF_CTRL2 8 bit Receive MAC FIFO Control Reg 2 */
/* TX_MFF_CTRL2 8 bit Transmit MAC FIFO Control Reg 2 */
/* Bit 7..4: reserved */
-#define MFF_ENA_OP_MD (1<<3) /* Bit 3: Enable Operation Mode */
-#define MFF_DIS_OP_MD (1<<2) /* Bit 2: Disab. Operation Mode */
-#define MFF_RST_CLR (1<<1) /* Bit 1: Clear MAC FIFO Reset */
-#define MFF_RST_SET (1<<0) /* Bit 0: Set MAC FIFO Reset */
-
-
-/* Receive, Transmit, and Link LED Counter Registers */
-/* RX_LED_CTRL 8 bit Receive LED Cnt Control Reg */
-/* TX_LED_CTRL 8 bit Transmit LED Cnt Control Reg */
-/* LNK_SYNC_CTRL 8 bit Link Sync Cnt Control Register */
- /* Bit 7..3: reserved */
-#define LED_START (1<<2) /* Bit 2: Start Timer */
-#define LED_STOP (1<<1) /* Bit 1: Stop Timer */
-#define LED_STATE (1<<0) /* Bit 0:(Rx/Tx)LED State, 1=LED on */
-#define LED_CLR_IRQ (1<<0) /* Bit 0:(Lnk) Clear Link IRQ */
-
-/* RX_LED_TST 8 bit Receive LED Cnt Test Register */
-/* TX_LED_TST 8 bit Transmit LED Cnt Test Register */
-/* LNK_SYNC_TST 8 bit Link Sync Cnt Test Register */
- /* Bit 7..3: reserved */
-#define LED_T_ON (1<<2) /* Bit 2: LED Counter Testmode On */
-#define LED_T_OFF (1<<1) /* Bit 1: LED Counter Testmode Off */
-#define LED_T_STEP (1<<0) /* Bit 0: LED Counter Step */
-
-/* LNK_LED_REG 8 bit Link LED Register */
- /* Bit 7..6: reserved */
-#define LED_BLK_ON (1<<5) /* Bit 5: Link LED Blinking On */
-#define LED_BLK_OFF (1<<4) /* Bit 4: Link LED Blinking Off */
-#define LED_SYNC_ON (1<<3) /* Bit 3: Use Sync Wire to switch LED */
-#define LED_SYNC_OFF (1<<2) /* Bit 2: Disable Sync Wire Input */
-#define LED_ON (1<<1) /* Bit 1: switch LED on */
-#define LED_OFF (1<<0) /* Bit 0: switch LED off */
+#define MFF_ENA_OP_MD BIT_3S /* Enable Operation Mode */
+#define MFF_DIS_OP_MD BIT_2S /* Disable Operation Mode */
+#define MFF_RST_CLR BIT_1S /* Clear MAC FIFO Reset */
+#define MFF_RST_SET BIT_0S /* Set MAC FIFO Reset */
+
+
+/* Link LED Counter Registers (GENESIS only) */
+
+/* RX_LED_CTRL 8 bit Receive LED Cnt Control Reg */
+/* TX_LED_CTRL 8 bit Transmit LED Cnt Control Reg */
+/* LNK_SYNC_CTRL 8 bit Link Sync Cnt Control Register */
+ /* Bit 7.. 3: reserved */
+#define LED_START BIT_2S /* Start Timer */
+#define LED_STOP BIT_1S /* Stop Timer */
+#define LED_STATE BIT_0S /* Rx/Tx: LED State, 1=LED on */
+#define LED_CLR_IRQ BIT_0S /* Lnk: Clear Link IRQ */
+
+/* RX_LED_TST 8 bit Receive LED Cnt Test Register */
+/* TX_LED_TST 8 bit Transmit LED Cnt Test Register */
+/* LNK_SYNC_TST 8 bit Link Sync Cnt Test Register */
+ /* Bit 7.. 3: reserved */
+#define LED_T_ON BIT_2S /* LED Counter Test mode On */
+#define LED_T_OFF BIT_1S /* LED Counter Test mode Off */
+#define LED_T_STEP BIT_0S /* LED Counter Step */
+
+/* LNK_LED_REG 8 bit Link LED Register */
+ /* Bit 7.. 6: reserved */
+#define LED_BLK_ON BIT_5S /* Link LED Blinking On */
+#define LED_BLK_OFF BIT_4S /* Link LED Blinking Off */
+#define LED_SYNC_ON BIT_3S /* Use Sync Wire to switch LED */
+#define LED_SYNC_OFF BIT_2S /* Disable Sync Wire Input */
+#define LED_ON BIT_1S /* switch LED on */
+#define LED_OFF BIT_0S /* switch LED off */
+
+/* Receive and Transmit GMAC FIFO Registers (YUKON only) */
+
+/* RX_GMF_EA 32 bit Rx GMAC FIFO End Address */
+/* RX_GMF_AF_THR 32 bit Rx GMAC FIFO Almost Full Thresh. */
+/* RX_GMF_WP 32 bit Rx GMAC FIFO Write Pointer */
+/* RX_GMF_WLEV 32 bit Rx GMAC FIFO Write Level */
+/* RX_GMF_RP 32 bit Rx GMAC FIFO Read Pointer */
+/* RX_GMF_RLEV 32 bit Rx GMAC FIFO Read Level */
+/* TX_GMF_EA 32 bit Tx GMAC FIFO End Address */
+/* TX_GMF_AE_THR 32 bit Tx GMAC FIFO Almost Empty Thresh.*/
+/* TX_GMF_WP 32 bit Tx GMAC FIFO Write Pointer */
+/* TX_GMF_WSP 32 bit Tx GMAC FIFO Write Shadow Ptr. */
+/* TX_GMF_WLEV 32 bit Tx GMAC FIFO Write Level */
+/* TX_GMF_RP 32 bit Tx GMAC FIFO Read Pointer */
+/* TX_GMF_RSTP 32 bit Tx GMAC FIFO Restart Pointer */
+/* TX_GMF_RLEV 32 bit Tx GMAC FIFO Read Level */
+
+/* RX_GMF_CTRL_T 32 bit Rx GMAC FIFO Control/Test */
+ /* Bits 31..15: reserved */
+#define GMF_WP_TST_ON BIT_14 /* Write Pointer Test On */
+#define GMF_WP_TST_OFF BIT_13 /* Write Pointer Test Off */
+#define GMF_WP_STEP BIT_12 /* Write Pointer Step/Increment */
+ /* Bit 11: reserved */
+#define GMF_RP_TST_ON BIT_10 /* Read Pointer Test On */
+#define GMF_RP_TST_OFF BIT_9 /* Read Pointer Test Off */
+#define GMF_RP_STEP BIT_8 /* Read Pointer Step/Increment */
+#define GMF_RX_F_FL_ON BIT_7 /* Rx FIFO Flush Mode On */
+#define GMF_RX_F_FL_OFF BIT_6 /* Rx FIFO Flush Mode Off */
+#define GMF_CLI_RX_FO BIT_5 /* Clear IRQ Rx FIFO Overrun */
+#define GMF_CLI_RX_FC BIT_4 /* Clear IRQ Rx Frame Complete */
+#define GMF_OPER_ON BIT_3 /* Operational Mode On */
+#define GMF_OPER_OFF BIT_2 /* Operational Mode Off */
+#define GMF_RST_CLR BIT_1 /* Clear GMAC FIFO Reset */
+#define GMF_RST_SET BIT_0 /* Set GMAC FIFO Reset */
+
+/* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */
+ /* Bits 31..19: reserved */
+#define GMF_WSP_TST_ON BIT_18 /* Write Shadow Pointer Test On */
+#define GMF_WSP_TST_OFF BIT_17 /* Write Shadow Pointer Test Off */
+#define GMF_WSP_STEP BIT_16 /* Write Shadow Pointer Step/Increment */
+ /* Bits 15..7: same as for RX_GMF_CTRL_T */
+#define GMF_CLI_TX_FU BIT_6 /* Clear IRQ Tx FIFO Underrun */
+#define GMF_CLI_TX_FC BIT_5 /* Clear IRQ Tx Frame Complete */
+#define GMF_CLI_TX_PE BIT_4 /* Clear IRQ Tx Parity Error */
+ /* Bits 3..0: same as for RX_GMF_CTRL_T */
+
+#define GMF_RX_CTRL_DEF (GMF_OPER_ON | GMF_RX_F_FL_ON)
+#define GMF_TX_CTRL_DEF GMF_OPER_ON
+
+#define RX_GMF_FL_THR_DEF 0x0a /* Rx GMAC FIFO Flush Threshold default */
+
+/* GMAC_TI_ST_CTRL 8 bit Time Stamp Timer Ctrl Reg (YUKON only) */
+ /* Bit 7.. 3: reserved */
+#define GMT_ST_START BIT_2S /* Start Time Stamp Timer */
+#define GMT_ST_STOP BIT_1S /* Stop Time Stamp Timer */
+#define GMT_ST_CLR_IRQ BIT_0S /* Clear Time Stamp Timer IRQ */
+
+/* GMAC_CTRL 32 bit GMAC Control Reg (YUKON only) */
+ /* Bits 31.. 8: reserved */
+#define GMC_H_BURST_ON BIT_7 /* Half Duplex Burst Mode On */
+#define GMC_H_BURST_OFF BIT_6 /* Half Duplex Burst Mode Off */
+#define GMC_F_LOOPB_ON BIT_5 /* FIFO Loopback On */
+#define GMC_F_LOOPB_OFF BIT_4 /* FIFO Loopback Off */
+#define GMC_PAUSE_ON BIT_3 /* Pause On */
+#define GMC_PAUSE_OFF BIT_2 /* Pause Off */
+#define GMC_RST_CLR BIT_1 /* Clear GMAC Reset */
+#define GMC_RST_SET BIT_0 /* Set GMAC Reset */
+
+/* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
+ /* Bits 31..29: reserved */
+#define GPC_SEL_BDT BIT_28 /* Select Bi-Dir. Transfer for MDC/MDIO */
+#define GPC_INT_POL_HI BIT_27 /* IRQ Polarity is Active HIGH */
+#define GPC_75_OHM BIT_26 /* Use 75 Ohm Termination instead of 50 */
+#define GPC_DIS_FC BIT_25 /* Disable Automatic Fiber/Copper Detection */
+#define GPC_DIS_SLEEP BIT_24 /* Disable Energy Detect */
+#define GPC_HWCFG_M_3 BIT_23 /* HWCFG_MODE[3] */
+#define GPC_HWCFG_M_2 BIT_22 /* HWCFG_MODE[2] */
+#define GPC_HWCFG_M_1 BIT_21 /* HWCFG_MODE[1] */
+#define GPC_HWCFG_M_0 BIT_20 /* HWCFG_MODE[0] */
+#define GPC_ANEG_0 BIT_19 /* ANEG[0] */
+#define GPC_ENA_XC BIT_18 /* Enable MDI crossover */
+#define GPC_DIS_125 BIT_17 /* Disable 125 MHz clock */
+#define GPC_ANEG_3 BIT_16 /* ANEG[3] */
+#define GPC_ANEG_2 BIT_15 /* ANEG[2] */
+#define GPC_ANEG_1 BIT_14 /* ANEG[1] */
+#define GPC_ENA_PAUSE BIT_13 /* Enable Pause (SYM_OR_REM) */
+#define GPC_PHYADDR_4 BIT_12 /* Bit 4 of Phy Addr */
+#define GPC_PHYADDR_3 BIT_11 /* Bit 3 of Phy Addr */
+#define GPC_PHYADDR_2 BIT_10 /* Bit 2 of Phy Addr */
+#define GPC_PHYADDR_1 BIT_9 /* Bit 1 of Phy Addr */
+#define GPC_PHYADDR_0 BIT_8 /* Bit 0 of Phy Addr */
+ /* Bits 7..2: reserved */
+#define GPC_RST_CLR BIT_1 /* Clear GPHY Reset */
+#define GPC_RST_SET BIT_0 /* Set GPHY Reset */
+
+#define GPC_HWCFG_GMII_COP (GPC_HWCFG_M_3 | GPC_HWCFG_M_2 | \
+ GPC_HWCFG_M_1 | GPC_HWCFG_M_0)
+
+#define GPC_HWCFG_GMII_FIB ( GPC_HWCFG_M_2 | \
+ GPC_HWCFG_M_1 | GPC_HWCFG_M_0)
+
+#define GPC_ANEG_ADV_ALL_M (GPC_ANEG_3 | GPC_ANEG_2 | \
+ GPC_ANEG_1 | GPC_ANEG_0)
+
+/* forced speed and duplex mode (don't mix with other ANEG bits) */
+#define GPC_FRC10MBIT_HALF 0
+#define GPC_FRC10MBIT_FULL GPC_ANEG_0
+#define GPC_FRC100MBIT_HALF GPC_ANEG_1
+#define GPC_FRC100MBIT_FULL (GPC_ANEG_0 | GPC_ANEG_1)
+
+/* auto-negotiation with limited advertised speeds */
+/* mix only with master/slave settings (for copper) */
+#define GPC_ADV_1000_HALF GPC_ANEG_2
+#define GPC_ADV_1000_FULL GPC_ANEG_3
+#define GPC_ADV_ALL (GPC_ANEG_2 | GPC_ANEG_3)
+
+/* master/slave settings */
+/* only for copper with 1000 Mbps */
+#define GPC_FORCE_MASTER 0
+#define GPC_FORCE_SLAVE GPC_ANEG_0
+#define GPC_PREF_MASTER GPC_ANEG_1
+#define GPC_PREF_SLAVE (GPC_ANEG_1 | GPC_ANEG_0)
+
+/* GMAC_IRQ_SRC 8 bit GMAC Interrupt Source Reg (YUKON only) */
+/* GMAC_IRQ_MSK 8 bit GMAC Interrupt Mask Reg (YUKON only) */
+#define GM_IS_TX_CO_OV BIT_5 /* Transmit Counter Overflow IRQ */
+#define GM_IS_RX_CO_OV BIT_4 /* Receive Counter Overflow IRQ */
+#define GM_IS_TX_FF_UR BIT_3 /* Transmit FIFO Underrun */
+#define GM_IS_TX_COMPL BIT_2 /* Frame Transmission Complete */
+#define GM_IS_RX_FF_OR BIT_1 /* Receive FIFO Overrun */
+#define GM_IS_RX_COMPL BIT_0 /* Frame Reception Complete */
+
+#define GMAC_DEF_MSK (GM_IS_TX_CO_OV | GM_IS_RX_CO_OV | \
+ GM_IS_TX_FF_UR)
+
+/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
+ /* Bits 15.. 2: reserved */
+#define GMLC_RST_CLR BIT_1S /* Clear GMAC Link Reset */
+#define GMLC_RST_SET BIT_0S /* Set GMAC Link Reset */
+
+
+/* WOL_CTRL_STAT 16 bit WOL Control/Status Reg */
+#define WOL_CTL_LINK_CHG_OCC BIT_15S
+#define WOL_CTL_MAGIC_PKT_OCC BIT_14S
+#define WOL_CTL_PATTERN_OCC BIT_13S
+
+#define WOL_CTL_CLEAR_RESULT BIT_12S
+
+#define WOL_CTL_ENA_PME_ON_LINK_CHG BIT_11S
+#define WOL_CTL_DIS_PME_ON_LINK_CHG BIT_10S
+#define WOL_CTL_ENA_PME_ON_MAGIC_PKT BIT_9S
+#define WOL_CTL_DIS_PME_ON_MAGIC_PKT BIT_8S
+#define WOL_CTL_ENA_PME_ON_PATTERN BIT_7S
+#define WOL_CTL_DIS_PME_ON_PATTERN BIT_6S
+
+#define WOL_CTL_ENA_LINK_CHG_UNIT BIT_5S
+#define WOL_CTL_DIS_LINK_CHG_UNIT BIT_4S
+#define WOL_CTL_ENA_MAGIC_PKT_UNIT BIT_3S
+#define WOL_CTL_DIS_MAGIC_PKT_UNIT BIT_2S
+#define WOL_CTL_ENA_PATTERN_UNIT BIT_1S
+#define WOL_CTL_DIS_PATTERN_UNIT BIT_0S
+
+#define WOL_CTL_DEFAULT \
+ (WOL_CTL_DIS_PME_ON_LINK_CHG | \
+ WOL_CTL_DIS_PME_ON_PATTERN | \
+ WOL_CTL_DIS_PME_ON_MAGIC_PKT | \
+ WOL_CTL_DIS_LINK_CHG_UNIT | \
+ WOL_CTL_DIS_PATTERN_UNIT | \
+ WOL_CTL_DIS_MAGIC_PKT_UNIT)
+
+/* WOL_MATCH_CTL 8 bit WOL Match Control Reg */
+#define WOL_CTL_PATT_ENA(x) (BIT_0 << (x))
+
+#define SK_NUM_WOL_PATTERN 7
+#define SK_PATTERN_PER_WORD 4
+#define SK_BITMASK_PATTERN 7
+#define SK_POW_PATTERN_LENGTH 128
+
+#define WOL_LENGTH_MSK 0x7f
+#define WOL_LENGTH_SHIFT 8
/* Receive and Transmit Descriptors ******************************************/
@@ -1356,55 +1839,56 @@
/* Receive Descriptor struct */
typedef struct s_HwRxd {
SK_U32 volatile RxCtrl; /* Receive Buffer Control Field */
- SK_U32 RxNext; /* Physical Address Pointer to the next TxD */
- SK_U32 RxAdrLo; /* Physical Receive Buffer Address lower dword*/
- SK_U32 RxAdrHi; /* Physical Receive Buffer Address upper dword*/
- SK_U32 RxStat; /* Receive Frame Status Word */
- SK_U32 RxTiSt; /* Receive Timestamp provided by the XMAC */
-#ifndef SK_USE_REV_DESC
- SK_U16 RxTcpSum1; /* TCP Checksum 1 */
- SK_U16 RxTcpSum2; /* TCP Checksum 2 */
- SK_U16 RxTcpSp1; /* TCP Checksum Calculation Start Position 1 */
- SK_U16 RxTcpSp2; /* TCP Checksum Calculation Start Position 2 */
+ SK_U32 RxNext; /* Physical Address Pointer to the next RxD */
+ SK_U32 RxAdrLo; /* Physical Rx Buffer Address lower dword */
+ SK_U32 RxAdrHi; /* Physical Rx Buffer Address upper dword */
+ SK_U32 RxStat; /* Receive Frame Status Word */
+ SK_U32 RxTiSt; /* Receive Time Stamp (from XMAC on GENESIS) */
+#ifndef SK_USE_REV_DESC
+ SK_U16 RxTcpSum1; /* TCP Checksum 1 */
+ SK_U16 RxTcpSum2; /* TCP Checksum 2 */
+ SK_U16 RxTcpSp1; /* TCP Checksum Calculation Start Position 1 */
+ SK_U16 RxTcpSp2; /* TCP Checksum Calculation Start Position 2 */
#else /* SK_USE_REV_DESC */
- SK_U16 RxTcpSum2; /* TCP Checksum 2 */
- SK_U16 RxTcpSum1; /* TCP Checksum 1 */
- SK_U16 RxTcpSp2; /* TCP Checksum Calculation Start Position 2 */
- SK_U16 RxTcpSp1; /* TCP Checksum Calculation Start Position 1 */
+ SK_U16 RxTcpSum2; /* TCP Checksum 2 */
+ SK_U16 RxTcpSum1; /* TCP Checksum 1 */
+ SK_U16 RxTcpSp2; /* TCP Checksum Calculation Start Position 2 */
+ SK_U16 RxTcpSp1; /* TCP Checksum Calculation Start Position 1 */
#endif /* SK_USE_REV_DESC */
} SK_HWRXD;
/*
* Drivers which use the reverse descriptor feature (PCI_OUR_REG_2)
* should set the define SK_USE_REV_DESC.
- * Structures are 'normaly' not endianess dependent. But in
+ * Structures are 'normaly' not endianess dependent. But in
* this case the SK_U16 fields are bound to bit positions inside the
* descriptor. RxTcpSum1 e.g. must start at bit 0 within the 6.th DWord.
* The bit positions inside a DWord are of course endianess dependent and
- * swaps if the DWord is swaped by the hardware.
+ * swaps if the DWord is swapped by the hardware.
*/
/* Descriptor Bit Definition */
/* TxCtrl Transmit Buffer Control Field */
-/* RxCtrl Receive Buffer Control Field */
-#define BMU_OWN (1UL<<31) /* Bit 31: OWN bit: 0=host/1=BMU */
-#define BMU_STF (1L<<30) /* Bit 30: Start of Frame ? */
-#define BMU_EOF (1L<<29) /* Bit 29: End of Frame ? */
-#define BMU_IRQ_EOB (1L<<28) /* Bit 28: Req "End of Buff" IRQ */
-#define BMU_IRQ_EOF (1L<<27) /* Bit 27: Req "End of Frame" IRQ*/
+/* RxCtrl Receive Buffer Control Field */
+#define BMU_OWN BIT_31 /* OWN bit: 0=host/1=BMU */
+#define BMU_STF BIT_30 /* Start of Frame */
+#define BMU_EOF BIT_29 /* End of Frame */
+#define BMU_IRQ_EOB BIT_28 /* Req "End of Buffer" IRQ */
+#define BMU_IRQ_EOF BIT_27 /* Req "End of Frame" IRQ */
/* TxCtrl specific bits */
-#define BMU_STFWD (1L<<26) /* Bit 26: (Tx) Store&Forward Frame */
-#define BMU_NO_FCS (1L<<25) /* Bit 25: (Tx) disable XMAC FCS gener*/
-#define BMU_SW (1L<<24) /* Bit 24: (Tx) 1 bit res. for SW use */
+#define BMU_STFWD BIT_26 /* (Tx) Store & Forward Frame */
+#define BMU_NO_FCS BIT_25 /* (Tx) Disable MAC FCS (CRC) generation */
+#define BMU_SW BIT_24 /* (Tx) 1 bit res. for SW use */
/* RxCtrl specific bits */
-#define BMU_DEV_0 (1L<<26) /* Bit 26: (Rx) transfer data to Dev0 */
-#define BMU_STAT_VAL (1L<<25) /* Bit 25: (Rx) RxStat Valid */
-#define BMU_TIST_VAL (1L<<24) /* Bit 24: (Rx) RxTiSt Valid */
- /* Bit 23..16: BMU Check Opcodes */
-#define BMU_CHECK 0x00550000L /* Default BMU check */
-#define BMU_TCP_CHECK 0x00560000L /* Descr with TCP ext */
-#define BMU_BBC 0x0000FFFFL /* Bit 15..0: Buffer Byte Counter */
+#define BMU_DEV_0 BIT_26 /* (Rx) Transfer data to Dev0 */
+#define BMU_STAT_VAL BIT_25 /* (Rx) Rx Status Valid */
+#define BMU_TIST_VAL BIT_24 /* (Rx) Rx TimeStamp Valid */
+ /* Bit 23..16: BMU Check Opcodes */
+#define BMU_CHECK (0x55L<<16) /* Default BMU check */
+#define BMU_TCP_CHECK (0x56L<<16) /* Descr with TCP ext */
+#define BMU_UDP_CHECK (0x57L<<16) /* Descr with UDP ext (YUKON only) */
+#define BMU_BBC 0xffffL /* Bit 15.. 0: Buffer Byte Counter */
/* TxStat Transmit Frame Status Word */
/* RxStat Receive Frame Status Word */
@@ -1415,20 +1899,9 @@
* (see XMR_FS bits)
*/
-/* other defines *************************************************************/
-
-/*
- * FlashProm specification
- */
-#define MAX_PAGES 0x20000L /* Every byte has a single page */
-#define MAX_FADDR 1 /* 1 byte per page */
-#define SKFDDI_PSZ 8 /* address PROM size */
-
/* macros ********************************************************************/
-/*
- * Receive and Transmit Queues
- */
+/* Receive and Transmit Queues */
#define Q_R1 0x0000 /* Receive Queue 1 */
#define Q_R2 0x0080 /* Receive Queue 2 */
#define Q_XS1 0x0200 /* Synchronous Transmit Queue 1 */
@@ -1439,59 +1912,65 @@
/*
* Macro Q_ADDR()
*
- * Use this macro to address the Receive and Transmit Queue Registers.
+ * Use this macro to access the Receive and Transmit Queue Registers.
*
- * para Queue Queue to address.
- * Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, and Q_XA2
+ * para:
+ * Queue Queue to access.
+ * Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, and Q_XA2
* Offs Queue register offset.
- * Values: Q_D, Q_DA_L ... Q_T2, Q_T3
+ * Values: Q_D, Q_DA_L ... Q_T2, Q_T3
*
- * usage SK_IN32(pAC,Q_ADDR(Q_R2,Q_BC),pVal)
+ * usage SK_IN32(pAC, Q_ADDR(Q_R2, Q_BC), pVal)
*/
-#define Q_ADDR(Queue,Offs) (B8_Q_REGS + (Queue) + (Offs))
+#define Q_ADDR(Queue, Offs) (B8_Q_REGS + (Queue) + (Offs))
/*
* Macro RB_ADDR()
*
- * Use this macro to address the RAM Buffer Registers.
+ * Use this macro to access the RAM Buffer Registers.
*
- * para Queue Queue to address.
- * Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, and Q_XA2
+ * para:
+ * Queue Queue to access.
+ * Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, and Q_XA2
* Offs Queue register offset.
- * Values: RB_START, RB_END ... RB_LEV, RB_CTRL
+ * Values: RB_START, RB_END ... RB_LEV, RB_CTRL
*
- * usage SK_IN32(pAC,RB_ADDR(Q_R2,RB_RP),pVal)
+ * usage SK_IN32(pAC, RB_ADDR(Q_R2, RB_RP), pVal)
*/
-#define RB_ADDR(Queue,Offs) (B16_RAM_REGS + (Queue) + (Offs))
+#define RB_ADDR(Queue, Offs) (B16_RAM_REGS + (Queue) + (Offs))
-/*
- * MAC Related Registers
- */
-#define MAC_1 0 /* belongs to the port near the slot */
+/* MAC Related Registers */
+#define MAC_1 0 /* belongs to the port near the slot */
#define MAC_2 1 /* belongs to the port far away from the slot */
/*
* Macro MR_ADDR()
*
- * Use this macro to address a MAC Related Registers in side the ASIC.
+ * Use this macro to access a MAC Related Registers inside the ASIC.
*
- * para Queue Queue to address.
- * Values: TXA_ITI_INI ... TXA_TEST,
- * RX_MFF_EA ... RX_LED_TST,
- * LNK_SYNC_INI ... LNK_LED_REG, and
- * TX_MFF_EA ... TX_LED_TST
- * Mac MAC to address.
- * Values: MAC_1, MAC_2
+ * para:
+ * Mac MAC to access.
+ * Values: MAC_1, MAC_2
+ * Offs MAC register offset.
+ * Values: RX_MFF_EA, RX_MFF_WP ... LNK_LED_REG,
+ * TX_MFF_EA, TX_MFF_WP ... TX_LED_TST
*
- * usage SK_IN32(pAC,MR_ADDR(MAC_1,TX_MFF_EA),pVal)
+ * usage SK_IN32(pAC, MR_ADDR(MAC_1, TX_MFF_EA), pVal)
*/
-#define MR_ADDR(Mac,Offs) (((Mac) << 7) + (Offs))
+#define MR_ADDR(Mac, Offs) (((Mac) << 7) + (Offs))
+#ifdef SK_LITTLE_ENDIAN
+#define XM_WORD_LO 0
+#define XM_WORD_HI 1
+#else /* !SK_LITTLE_ENDIAN */
+#define XM_WORD_LO 1
+#define XM_WORD_HI 0
+#endif /* !SK_LITTLE_ENDIAN */
/*
- * macros to access the XMAC
+ * macros to access the XMAC (GENESIS only)
*
* XM_IN16(), to read a 16 bit register (e.g. XM_MMU_CMD)
* XM_OUT16(), to write a 16 bit register (e.g. XM_MMU_CMD)
@@ -1502,43 +1981,37 @@
* XM_INHASH(), to read the XM_HSM_CHK register
* XM_OUTHASH() to write the XM_HSM_CHK register
*
- * para: Mac XMAC to address values: MAC_1 or MAC_2
- * IoC I/O context needed for SK IO macros
- * Reg XMAC Register to read or write
- * (p)Val Value or pointer to the value which should be read or
- * written.
+ * para:
+ * Mac XMAC to access values: MAC_1 or MAC_2
+ * IoC I/O context needed for SK I/O macros
+ * Reg XMAC Register to read or write
+ * (p)Val Value or pointer to the value which should be read or written
*
* usage: XM_OUT16(IoC, MAC_1, XM_MMU_CMD, Value);
*/
-#ifdef SK_LITTLE_ENDIAN
-#define XM_WORD_LO 0
-#define XM_WORD_HI 1
-#else /* !SK_LITTLE_ENDIAN */
-#define XM_WORD_LO 1
-#define XM_WORD_HI 0
-#endif /* !SK_LITTLE_ENDIAN */
+#define XMA(Mac, Reg) \
+ ((BASE_XMAC_1 + (Mac) * (BASE_XMAC_2 - BASE_XMAC_1)) | ((Reg) << 1))
-#define XMA(Mac,Reg) (((0x1000 << (Mac)) + 0x1000) | ((Reg) << 1))
+#define XM_IN16(IoC, Mac, Reg, pVal) \
+ SK_IN16((IoC), XMA((Mac), (Reg)), (pVal))
-#define XM_IN16(IoC,Mac,Reg,pVal) SK_IN16((IoC), XMA((Mac), (Reg)), (pVal))
-#define XM_OUT16(IoC,Mac,Reg,Val) SK_OUT16((IoC), XMA((Mac), (Reg)), (Val))
+#define XM_OUT16(IoC, Mac, Reg, Val) \
+ SK_OUT16((IoC), XMA((Mac), (Reg)), (Val))
-#define XM_IN32(IoC,Mac,Reg,pVal) { \
+#define XM_IN32(IoC, Mac, Reg, pVal) { \
SK_IN16((IoC), XMA((Mac), (Reg)), \
- (SK_U16 *)&((SK_U16 *)(pVal))[XM_WORD_LO]); \
+ (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_LO]); \
SK_IN16((IoC), XMA((Mac), (Reg+2)), \
- (SK_U16 *)&((SK_U16 *)(pVal))[XM_WORD_HI]); \
+ (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_HI]); \
}
-#define XM_OUT32(IoC,Mac,Reg,Val) { \
- SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)((Val) & 0x0000ffffL)); \
- SK_OUT16((IoC), XMA((Mac), (Reg+2)),(SK_U16)(((Val)>>16) & 0x0000ffffL)); \
+#define XM_OUT32(IoC, Mac, Reg, Val) { \
+ SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL)); \
+ SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)(((Val) >> 16) & 0xffffL));\
}
-/*
- * Remember: we are always writing to / reading from LITTLE ENDIAN memory
- */
+/* Remember: we are always writing to / reading from LITTLE ENDIAN memory */
#define XM_INADDR(IoC, Mac, Reg, pVal) { \
SK_U16 Word; \
@@ -1556,8 +2029,8 @@
}
#define XM_OUTADDR(IoC, Mac, Reg, pVal) { \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
+ SK_U8 SK_FAR *pByte; \
+ pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0]; \
SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16) \
(((SK_U16)(pByte[0]) & 0x00ff) | \
(((SK_U16)(pByte[1]) << 8) & 0xff00))); \
@@ -1571,8 +2044,8 @@
#define XM_INHASH(IoC, Mac, Reg, pVal) { \
SK_U16 Word; \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
+ SK_U8 SK_FAR *pByte; \
+ pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0]; \
SK_IN16((IoC), XMA((Mac), (Reg)), &Word); \
pByte[0] = (SK_U8)(Word & 0x00ff); \
pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
@@ -1588,8 +2061,8 @@
}
#define XM_OUTHASH(IoC, Mac, Reg, pVal) { \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
+ SK_U8 SK_FAR *pByte; \
+ pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0]; \
SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16) \
(((SK_U16)(pByte[0]) & 0x00ff)| \
(((SK_U16)(pByte[1]) << 8) & 0xff00))); \
@@ -1605,32 +2078,150 @@
}
/*
+ * macros to access the GMAC (YUKON only)
+ *
+ * GM_IN16(), to read a 16 bit register (e.g. GM_GP_STAT)
+ * GM_OUT16(), to write a 16 bit register (e.g. GM_GP_CTRL)
+ * GM_IN32(), to read a 32 bit register (e.g. GM_)
+ * GM_OUT32(), to write a 32 bit register (e.g. GM_)
+ * GM_INADDR(), to read a network address register (e.g. GM_SRC_ADDR_1L)
+ * GM_OUTADDR(), to write a network address register (e.g. GM_SRC_ADDR_2L)
+ * GM_INHASH(), to read the GM_MC_ADDR_H1 register
+ * GM_OUTHASH() to write the GM_MC_ADDR_H1 register
+ *
+ * para:
+ * Mac GMAC to access values: MAC_1 or MAC_2
+ * IoC I/O context needed for SK I/O macros
+ * Reg GMAC Register to read or write
+ * (p)Val Value or pointer to the value which should be read or written
+ *
+ * usage: GM_OUT16(IoC, MAC_1, GM_GP_CTRL, Value);
+ */
+
+#define GMA(Mac, Reg) \
+ ((BASE_GMAC_1 + (Mac) * (BASE_GMAC_2 - BASE_GMAC_1)) | (Reg))
+
+#define GM_IN16(IoC, Mac, Reg, pVal) \
+ SK_IN16((IoC), GMA((Mac), (Reg)), (pVal))
+
+#define GM_OUT16(IoC, Mac, Reg, Val) \
+ SK_OUT16((IoC), GMA((Mac), (Reg)), (Val))
+
+#define GM_IN32(IoC, Mac, Reg, pVal) { \
+ SK_IN16((IoC), GMA((Mac), (Reg)), \
+ (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_LO]); \
+ SK_IN16((IoC), GMA((Mac), (Reg+4)), \
+ (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_HI]); \
+}
+
+#define GM_OUT32(IoC, Mac, Reg, Val) { \
+ SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL)); \
+ SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)(((Val) >> 16) & 0xffffL));\
+}
+
+#define GM_INADDR(IoC, Mac, Reg, pVal) { \
+ SK_U16 Word; \
+ SK_U8 *pByte; \
+ pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
+ SK_IN16((IoC), GMA((Mac), (Reg)), &Word); \
+ pByte[0] = (SK_U8)(Word & 0x00ff); \
+ pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
+ SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word); \
+ pByte[2] = (SK_U8)(Word & 0x00ff); \
+ pByte[3] = (SK_U8)((Word >> 8) & 0x00ff); \
+ SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word); \
+ pByte[4] = (SK_U8)(Word & 0x00ff); \
+ pByte[5] = (SK_U8)((Word >> 8) & 0x00ff); \
+}
+
+#define GM_OUTADDR(IoC, Mac, Reg, pVal) { \
+ SK_U8 SK_FAR *pByte; \
+ pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0]; \
+ SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16) \
+ (((SK_U16)(pByte[0]) & 0x00ff) | \
+ (((SK_U16)(pByte[1]) << 8) & 0xff00))); \
+ SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16) \
+ (((SK_U16)(pByte[2]) & 0x00ff) | \
+ (((SK_U16)(pByte[3]) << 8) & 0xff00))); \
+ SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16) \
+ (((SK_U16)(pByte[4]) & 0x00ff) | \
+ (((SK_U16)(pByte[5]) << 8) & 0xff00))); \
+}
+
+#define GM_INHASH(IoC, Mac, Reg, pVal) { \
+ SK_U16 Word; \
+ SK_U8 *pByte; \
+ pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
+ SK_IN16((IoC), GMA((Mac), (Reg)), &Word); \
+ pByte[0] = (SK_U8)(Word & 0x00ff); \
+ pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
+ SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word); \
+ pByte[2] = (SK_U8)(Word & 0x00ff); \
+ pByte[3] = (SK_U8)((Word >> 8) & 0x00ff); \
+ SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word); \
+ pByte[4] = (SK_U8)(Word & 0x00ff); \
+ pByte[5] = (SK_U8)((Word >> 8) & 0x00ff); \
+ SK_IN16((IoC), GMA((Mac), (Reg+12)), &Word); \
+ pByte[6] = (SK_U8)(Word & 0x00ff); \
+ pByte[7] = (SK_U8)((Word >> 8) & 0x00ff); \
+}
+
+#define GM_OUTHASH(IoC, Mac, Reg, pVal) { \
+ SK_U8 *pByte; \
+ pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
+ SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16) \
+ (((SK_U16)(pByte[0]) & 0x00ff)| \
+ (((SK_U16)(pByte[1]) << 8) & 0xff00))); \
+ SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16) \
+ (((SK_U16)(pByte[2]) & 0x00ff)| \
+ (((SK_U16)(pByte[3]) << 8) & 0xff00))); \
+ SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16) \
+ (((SK_U16)(pByte[4]) & 0x00ff)| \
+ (((SK_U16)(pByte[5]) << 8) & 0xff00))); \
+ SK_OUT16((IoC), GMA((Mac), (Reg+12)), (SK_U16) \
+ (((SK_U16)(pByte[6]) & 0x00ff)| \
+ (((SK_U16)(pByte[7]) << 8) & 0xff00))); \
+}
+
+/*
+ * Different MAC Types
+ */
+#define SK_MAC_XMAC 0 /* Xaqti XMAC II */
+#define SK_MAC_GMAC 1 /* Marvell GMAC */
+
+/*
* Different PHY Types
*/
-#define SK_PHY_XMAC 0 /* integrated in Xmac II*/
-#define SK_PHY_BCOM 1 /* Broadcom BCM5400 */
-#define SK_PHY_LONE 2 /* Level One LXT1000 */
-#define SK_PHY_NAT 3 /* National DP83891 */
+#define SK_PHY_XMAC 0 /* integrated in XMAC II */
+#define SK_PHY_BCOM 1 /* Broadcom BCM5400 */
+#define SK_PHY_LONE 2 /* Level One LXT1000 */
+#define SK_PHY_NAT 3 /* National DP83891 */
+#define SK_PHY_MARV_COPPER 4 /* Marvell 88E1011S */
+#define SK_PHY_MARV_FIBER 5 /* Marvell 88E1011S working on fiber */
/*
- * PHY addresses (bits 8..12 of PHY address reg)
+ * PHY addresses (bits 12..8 of PHY address reg)
*/
#define PHY_ADDR_XMAC (0<<8)
#define PHY_ADDR_BCOM (1<<8)
#define PHY_ADDR_LONE (3<<8)
#define PHY_ADDR_NAT (0<<8)
+/* GPHY address (bits 15..11 of SMI control reg) */
+#define PHY_ADDR_MARV 0
+
/*
* macros to access the PHY
*
* PHY_READ() read a 16 bit value from the PHY
- * PHY_WIRTE() write a 16 bit value to the PHY
+ * PHY_WRITE() write a 16 bit value to the PHY
*
- * para: IoC I/O context needed for SK IO macros
- * pPort Pointer to port struct for PhyAddr
- * Mac XMAC to address values: MAC_1 or MAC_2
- * PhyReg PHY Register to read or write
- * (p)Val Value or pointer to the value which should be read or
+ * para:
+ * IoC I/O context needed for SK I/O macros
+ * pPort Pointer to port struct for PhyAddr
+ * Mac XMAC to access values: MAC_1 or MAC_2
+ * PhyReg PHY Register to read or write
+ * (p)Val Value or pointer to the value which should be read or
* written.
*
* usage: PHY_READ(IoC, pPort, MAC_1, PHY_CTRL, Value);
@@ -1671,7 +2262,7 @@
XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal)); \
} \
}
-#endif
+#endif /* DEBUG */
#define PHY_WRITE(IoC, pPort, Mac, PhyReg, Val) { \
SK_U16 Mmu; \
@@ -1693,48 +2284,52 @@
/*
* Macro PCI_C()
*
- * Use this macro to address PCI config register from the IO space.
+ * Use this macro to access PCI config register from the I/O space.
*
- * para Addr PCI configuration register to address.
- * Values: PCI_VENDOR_ID ... PCI_VPD_ADDR,
+ * para:
+ * Addr PCI configuration register to access.
+ * Values: PCI_VENDOR_ID ... PCI_VPD_ADR_REG,
*
- * usage SK_IN16(pAC,PCI_C(PCI_VENDOR_ID),pVal);
+ * usage SK_IN16(pAC, PCI_C(PCI_VENDOR_ID), pVal);
*/
#define PCI_C(Addr) (B7_CFG_SPC + (Addr)) /* PCI Config Space */
/*
- * Macro SK_ADDR(Base,Addr)
+ * Macro SK_HW_ADDR(Base, Addr)
*
* Calculates the effective HW address
*
- * para Base IO- or memory base address
+ * para:
+ * Base I/O or memory base address
* Addr Address offset
*
* usage: May be used in SK_INxx and SK_OUTxx macros
- * #define SK_IN8(pAC,Addr,pVal) ...\
- * *pVal = (SK_U8) inp(SK_ADDR(pAC->Hw.Iop,Addr)))
+ * #define SK_IN8(pAC, Addr, pVal) ...\
+ * *pVal = (SK_U8)inp(SK_HW_ADDR(pAC->Hw.Iop, Addr)))
*/
-#ifdef SK_MEM_MAPPED_IO
-#define SK_HW_ADDR(Base,Addr) ((Base)+(Addr))
-#else /* SK_MEM_MAPPED_IO */
-#define SK_HW_ADDR(Base,Addr) ((Base)+(((Addr)&0x7F)|((Addr)>>7 ? 0x80:0)))
-#endif /* SK_MEM_MAPPED_IO */
+#ifdef SK_MEM_MAPPED_IO
+#define SK_HW_ADDR(Base, Addr) ((Base) + (Addr))
+#else /* SK_MEM_MAPPED_IO */
+#define SK_HW_ADDR(Base, Addr) \
+ ((Base) + (((Addr) & 0x7f) | (((Addr) >> 7 > 0) ? 0x80 : 0)))
+#endif /* SK_MEM_MAPPED_IO */
-#define SZ_LONG (sizeof(SK_U32))
+#define SZ_LONG (sizeof(SK_U32))
/*
* Macro SK_HWAC_LINK_LED()
*
* Use this macro to set the link LED mode.
- * para pAC Pointer to adapter context struct
- * IoC I/O context needed for SK IO macros
- * Port Port number
+ * para:
+ * pAC Pointer to adapter context struct
+ * IoC I/O context needed for SK I/O macros
+ * Port Port number
* Mode Mode to set for this LED
*/
#define SK_HWAC_LINK_LED(pAC, IoC, Port, Mode) \
- SK_OUT8(IoC, MR_ADDR(Port,LNK_LED_REG), Mode);
+ SK_OUT8(IoC, MR_ADDR(Port, LNK_LED_REG), Mode);
+
-
/* typedefs *******************************************************************/
diff -Nru a/drivers/net/sk98lin/h/skgehwt.h b/drivers/net/sk98lin/h/skgehwt.h
--- a/drivers/net/sk98lin/h/skgehwt.h Sun Aug 3 13:14:47 2003
+++ b/drivers/net/sk98lin/h/skgehwt.h Sun Aug 3 13:14:47 2003
@@ -1,32 +1,23 @@
/******************************************************************************
*
* Name: skhwt.h
- * Project: Genesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.4 $
- * Date: $Date: 1998/08/19 09:50:58 $
+ * Project: Gigabit Ethernet Adapters, Schedule-Modul
+ * Version: $Revision: 1.6 $
+ * Date: $Date: 2003/05/13 17:57:48 $
* Purpose: Defines for the hardware timer functions
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1989-1998 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- * All Rights Reserved
- *
- * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF SYSKONNECT
- * The copyright notice above does not evidence any
- * actual or intended publication of such source code.
- *
- * This Module contains Proprietary Information of SysKonnect
- * and should be treated as Confidential.
- *
- * The information in this file is provided for the exclusive use of
- * the licensees of SysKonnect.
- * Such users have the right to use, modify, and incorporate this code
- * into products for purposes authorized by the license agreement
- * provided they include this notice and the associated copyright notice
- * with any such product.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
@@ -36,6 +27,12 @@
* History:
*
* $Log: skgehwt.h,v $
+ * Revision 1.6 2003/05/13 17:57:48 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.5 1999/11/22 13:54:24 cgoos
+ * Changed license header to GPL.
+ *
* Revision 1.4 1998/08/19 09:50:58 gklug
* fix: remove struct keyword from c-code (see CCC) add typedefs
*
diff -Nru a/drivers/net/sk98lin/h/skgei2c.h b/drivers/net/sk98lin/h/skgei2c.h
--- a/drivers/net/sk98lin/h/skgei2c.h Sun Aug 3 13:14:51 2003
+++ b/drivers/net/sk98lin/h/skgei2c.h Sun Aug 3 13:14:51 2003
@@ -2,17 +2,15 @@
*
* Name: skgei2c.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.17 $
- * Date: $Date: 1999/11/22 13:55:25 $
- * Purpose: Special genesis defines for I2C
- * (taken from Monalisa (taken from Concentrator))
+ * Version: $Revision: 1.23 $
+ * Date: $Date: 2002/12/19 14:34:27 $
+ * Purpose: Special GEnesis defines for TWSI
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -28,6 +26,28 @@
* History:
*
* $Log: skgei2c.h,v $
+ * Revision 1.23 2002/12/19 14:34:27 rschmidt
+ * Added cast in macros SK_I2C_SET_BIT() and SK_I2C_CLR_BIT()
+ * Editorial changes (TWSI)
+ *
+ * Revision 1.22 2002/10/14 16:45:56 rschmidt
+ * Editorial changes (TWSI)
+ *
+ * Revision 1.21 2002/08/13 08:42:24 rschmidt
+ * Changed define for SK_MIN_SENSORS back to 5
+ * Merged defines for PHY PLL 3V3 voltage (A and B)
+ * Editorial changes
+ *
+ * Revision 1.20 2002/08/06 09:43:56 jschmalz
+ * Extensions and changes for Yukon
+ *
+ * Revision 1.19 2002/08/02 12:00:08 rschmidt
+ * Added defines for YUKON sensors
+ * Editorial changes
+ *
+ * Revision 1.18 2001/08/16 12:44:33 afischer
+ * LM80 sensor init values corrected
+ *
* Revision 1.17 1999/11/22 13:55:25 cgoos
* Changed license header to GPL.
*
@@ -70,7 +90,7 @@
*
* Revision 1.5 1998/08/17 06:52:21 malthoff
* Remove unrequired macros.
- * Add macros for accessing I2C SW register.
+ * Add macros for accessing TWSI SW register.
*
* Revision 1.4 1998/08/13 08:30:18 gklug
* add: conversion factors for read values
@@ -81,8 +101,8 @@
*
* Revision 1.2 1998/08/11 07:54:38 gklug
* add: sensor states for GE sensors
- * add: Macro to access I2c hardware register
- * chg: Error messages for I2c errors
+ * add: Macro to access TWSI hardware register
+ * chg: Error messages for TWSI errors
*
* Revision 1.1 1998/07/17 11:27:56 gklug
* Created.
@@ -92,7 +112,7 @@
******************************************************************************/
/*
- * SKGEI2C.H contains all SK-98xx specific defines for the I2C handling
+ * SKGEI2C.H contains all SK-98xx specific defines for the TWSI handling
*/
#ifndef _INC_SKGEI2C_H_
@@ -101,12 +121,12 @@
/*
* Macros to access the B2_I2C_CTRL
*/
-#define SK_I2C_CTL(IoC,flag,dev,reg,burst) \
- SK_OUT32(IoC,B2_I2C_CTRL,\
- (flag ? 0x80000000UL : 0x0L ) | \
+#define SK_I2C_CTL(IoC, flag, dev, reg, burst) \
+ SK_OUT32(IoC, B2_I2C_CTRL,\
+ (flag ? 0x80000000UL : 0x0L) | \
(((SK_U32) reg << 16) & I2C_ADDR) | \
(((SK_U32) dev << 9) & I2C_DEV_SEL) | \
- (( burst << 4) & I2C_BURST_LEN) )
+ (( burst << 4) & I2C_BURST_LEN))
#define SK_I2C_STOP(IoC) { \
SK_U32 I2cCtrl; \
@@ -114,29 +134,29 @@
SK_OUT32(IoC, B2_I2C_CTRL, I2cCtrl | I2C_STOP); \
}
-#define SK_I2C_GET_CTL(Ioc,pI2cCtrl) SK_IN32(Ioc,B2_I2C_CTRL,pI2cCtrl)
+#define SK_I2C_GET_CTL(IoC, pI2cCtrl) SK_IN32(IoC, B2_I2C_CTRL, pI2cCtrl)
/*
- * Macros to access the I2C SW Registers
+ * Macros to access the TWSI SW Registers
*/
#define SK_I2C_SET_BIT(IoC, SetBits) { \
SK_U8 OrgBits; \
SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
- SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SetBits)); \
+ SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SK_U8)(SetBits)); \
}
-#define SK_I2C_CLR_BIT(IoC,ClrBits) { \
+#define SK_I2C_CLR_BIT(IoC, ClrBits) { \
SK_U8 OrgBits; \
SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
- SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~(ClrBits)); \
+ SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~((SK_U8)(ClrBits))); \
}
-#define SK_I2C_GET_SW(IoC,pI2cSw) SK_IN8(IoC,B2_I2C_SW,pI2cSw)
+#define SK_I2C_GET_SW(IoC, pI2cSw) SK_IN8(IoC, B2_I2C_SW, pI2cSw)
/*
* define the possible sensor states
*/
-#define SK_SEN_IDLE 0 /* Idle: sensor not read */
+#define SK_SEN_IDLE 0 /* Idle: sensor not read */
#define SK_SEN_VALUE 1 /* Value Read cycle */
#define SK_SEN_VALEXT 2 /* Extended Value Read cycle */
@@ -147,7 +167,7 @@
#define SK_LM80_VT_LSB 22 /* 22mV LSB resolution */
#define SK_LM80_TEMP_LSB 10 /* 1 degree LSB resolution */
#define SK_LM80_TEMPEXT_LSB 5 /* 0.5 degree LSB resolution for the
- * extension value
+ * extension value
*/
#define SK_LM80_FAN_FAKTOR ((22500L*60)/(1*2))
/* formula: counter = (22500*60)/(rpm * divisor * pulses/2)
@@ -163,20 +183,27 @@
#define SK_MIN_SENSORS 5 /* minimal no. of installed sensors */
/*
+ * To watch the statemachine (JS) use the timer in two ways instead of one as hitherto
+ */
+#define SK_TIMER_WATCH_STATEMACHINE 0 /* Watch the statemachine to finish in a specific time */
+#define SK_TIMER_NEW_GAUGING 1 /* Start a new gauging when timer expires */
+
+
+/*
* Defines for the individual Thresholds
*/
/* Temperature sensor */
-#define SK_SEN_ERRHIGH0 800 /* Temperature High Err Threshold */
-#define SK_SEN_WARNHIGH0 700 /* Temperature High Warn Threshold */
-#define SK_SEN_WARNLOW0 100 /* Temperature Low Err Threshold */
-#define SK_SEN_ERRLOW0 0 /* Temperature Low Warn Threshold */
+#define SK_SEN_TEMP_HIGH_ERR 800 /* Temperature High Err Threshold */
+#define SK_SEN_TEMP_HIGH_WARN 700 /* Temperature High Warn Threshold */
+#define SK_SEN_TEMP_LOW_WARN 100 /* Temperature Low Warn Threshold */
+#define SK_SEN_TEMP_LOW_ERR 0 /* Temperature Low Err Threshold */
/* VCC which should be 5 V */
-#define SK_SEN_ERRHIGH1 5588 /* Voltage PCI High Err Threshold */
-#define SK_SEN_WARNHIGH1 5346 /* Voltage PCI High Warn Threshold */
-#define SK_SEN_WARNLOW1 4664 /* Voltage PCI Low Err Threshold */
-#define SK_SEN_ERRLOW1 4422 /* Voltage PCI Low Warn Threshold */
+#define SK_SEN_PCI_5V_HIGH_ERR 5588 /* Voltage PCI High Err Threshold */
+#define SK_SEN_PCI_5V_HIGH_WARN 5346 /* Voltage PCI High Warn Threshold */
+#define SK_SEN_PCI_5V_LOW_WARN 4664 /* Voltage PCI Low Warn Threshold */
+#define SK_SEN_PCI_5V_LOW_ERR 4422 /* Voltage PCI Low Err Threshold */
/*
* VIO may be 5 V or 3.3 V. Initialization takes two parts:
@@ -187,49 +214,66 @@
* Warning limits are +-5% of the exepected voltage.
* Error limits are +-10% of the expected voltage.
*/
-#define SK_SEN_ERRHIGH2 5588 /* Voltage PCI-IO High Err Threshold */
-#define SK_SEN_WARNHIGH2 5346 /* Voltage PCI-IO High Warn Threshold */
-#define SK_SEN_WARNLOW2 3146 /* Voltage PCI-IO Low Err Threshold */
-#define SK_SEN_ERRLOW2 2970 /* Voltage PCI-IO Low Warn Threshold */
+
+/* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
+
+#define SK_SEN_PCI_IO_5V_HIGH_ERR 5566 /* + 10% V PCI-IO High Err Threshold */
+#define SK_SEN_PCI_IO_5V_HIGH_WARN 5324 /* + 5% V PCI-IO High Warn Threshold */
+ /* 5000 mVolt */
+#define SK_SEN_PCI_IO_5V_LOW_WARN 4686 /* - 5% V PCI-IO Low Warn Threshold */
+#define SK_SEN_PCI_IO_5V_LOW_ERR 4444 /* - 10% V PCI-IO Low Err Threshold */
+
+#define SK_SEN_PCI_IO_RANGE_LIMITER 4000 /* 4000 mV range delimiter */
/* correction values for the second pass */
-#define SK_SEN_ERRHIGH2C 3630 /* Voltage PCI-IO High Err Threshold */
-#define SK_SEN_WARNHIGH2C 3476 /* Voltage PCI-IO High Warn Threshold */
-#define SK_SEN_WARNLOW2C 4664 /* Voltage PCI-IO Low Err Threshold */
-#define SK_SEN_ERRLOW2C 4422 /* Voltage PCI-IO Low Warn Threshold */
+#define SK_SEN_PCI_IO_3V3_HIGH_ERR 3850 /* + 15% V PCI-IO High Err Threshold */
+#define SK_SEN_PCI_IO_3V3_HIGH_WARN 3674 /* + 10% V PCI-IO High Warn Threshold */
+ /* 3300 mVolt */
+#define SK_SEN_PCI_IO_3V3_LOW_WARN 2926 /* - 10% V PCI-IO Low Warn Threshold */
+#define SK_SEN_PCI_IO_3V3_LOW_ERR 2772 /* - 15% V PCI-IO Low Err Threshold */
+
/*
* VDD voltage
*/
-#define SK_SEN_ERRHIGH3 3630 /* Voltage ASIC High Err Threshold */
-#define SK_SEN_WARNHIGH3 3476 /* Voltage ASIC High Warn Threshold */
-#define SK_SEN_WARNLOW3 3146 /* Voltage ASIC Low Err Threshold */
-#define SK_SEN_ERRLOW3 2970 /* Voltage ASIC Low Warn Threshold */
+#define SK_SEN_VDD_HIGH_ERR 3630 /* Voltage ASIC High Err Threshold */
+#define SK_SEN_VDD_HIGH_WARN 3476 /* Voltage ASIC High Warn Threshold */
+#define SK_SEN_VDD_LOW_WARN 3146 /* Voltage ASIC Low Warn Threshold */
+#define SK_SEN_VDD_LOW_ERR 2970 /* Voltage ASIC Low Err Threshold */
+
+/*
+ * PHY PLL 3V3 voltage
+ */
+#define SK_SEN_PLL_3V3_HIGH_ERR 3630 /* Voltage PMA High Err Threshold */
+#define SK_SEN_PLL_3V3_HIGH_WARN 3476 /* Voltage PMA High Warn Threshold */
+#define SK_SEN_PLL_3V3_LOW_WARN 3146 /* Voltage PMA Low Warn Threshold */
+#define SK_SEN_PLL_3V3_LOW_ERR 2970 /* Voltage PMA Low Err Threshold */
/*
- * PLC_3V3 voltage
- * PHY_PLL_A_3V3 voltage
+ * VAUX (YUKON only)
*/
-#define SK_SEN_ERRHIGH4 3630 /* Voltage PMA High Err Threshold */
-#define SK_SEN_WARNHIGH4 3476 /* Voltage PMA High Warn Threshold */
-#define SK_SEN_WARNLOW4 3146 /* Voltage PMA Low Err Threshold */
-#define SK_SEN_ERRLOW4 2970 /* Voltage PMA Low Warn Threshold */
+#define SK_SEN_VAUX_3V3_HIGH_ERR 3630 /* Voltage VAUX High Err Threshold */
+#define SK_SEN_VAUX_3V3_HIGH_WARN 3476 /* Voltage VAUX High Warn Threshold */
+#define SK_SEN_VAUX_3V3_LOW_WARN 3146 /* Voltage VAUX Low Warn Threshold */
+#define SK_SEN_VAUX_3V3_LOW_ERR 2970 /* Voltage VAUX Low Err Threshold */
+#define SK_SEN_VAUX_0V_WARN_ERR 0 /* if VAUX not present */
+#define SK_SEN_VAUX_RANGE_LIMITER 1000 /* 1000 mV range delimiter */
/*
- * PHY_2V5 voltage
+ * PHY 2V5 voltage
*/
-#define SK_SEN_ERRHIGH5 2750 /* Voltage PHY High Err Threshold */
-#define SK_SEN_WARNHIGH5 2640 /* Voltage PHY High Warn Threshold */
-#define SK_SEN_WARNLOW5 2376 /* Voltage PHY Low Err Threshold */
-#define SK_SEN_ERRLOW5 2222 /* Voltage PHY Low Warn Threshold */
+#define SK_SEN_PHY_2V5_HIGH_ERR 2750 /* Voltage PHY High Err Threshold */
+#define SK_SEN_PHY_2V5_HIGH_WARN 2640 /* Voltage PHY High Warn Threshold */
+#define SK_SEN_PHY_2V5_LOW_WARN 2376 /* Voltage PHY Low Warn Threshold */
+#define SK_SEN_PHY_2V5_LOW_ERR 2222 /* Voltage PHY Low Err Threshold */
/*
- * PHY_PLL_B_3V3 voltage
+ * ASIC Core 1V5 voltage (YUKON only)
*/
-#define SK_SEN_ERRHIGH6 3630 /* Voltage PMA High Err Threshold */
-#define SK_SEN_WARNHIGH6 3476 /* Voltage PMA High Warn Threshold */
-#define SK_SEN_WARNLOW6 3146 /* Voltage PMA Low Err Threshold */
-#define SK_SEN_ERRLOW6 2970 /* Voltage PMA Low Warn Threshold */
+#define SK_SEN_CORE_1V5_HIGH_ERR 1650 /* Voltage ASIC Core High Err Threshold */
+#define SK_SEN_CORE_1V5_HIGH_WARN 1575 /* Voltage ASIC Core High Warn Threshold */
+#define SK_SEN_CORE_1V5_LOW_WARN 1425 /* Voltage ASIC Core Low Warn Threshold */
+#define SK_SEN_CORE_1V5_LOW_ERR 1350 /* Voltage ASIC Core Low Err Threshold */
/*
* FAN 1 speed
@@ -239,10 +283,17 @@
* error at: 70 %
* no upper limit
*/
-#define SK_SEN_ERRHIGH 20000 /* FAN Speed High Err Threshold */
-#define SK_SEN_WARNHIGH 20000 /* FAN Speed High Warn Threshold */
-#define SK_SEN_WARNLOW 5200 /* FAN Speed Low Err Threshold */
-#define SK_SEN_ERRLOW 4550 /* FAN Speed Low Warn Threshold */
+#define SK_SEN_FAN_HIGH_ERR 20000 /* FAN Speed High Err Threshold */
+#define SK_SEN_FAN_HIGH_WARN 20000 /* FAN Speed High Warn Threshold */
+#define SK_SEN_FAN_LOW_WARN 5200 /* FAN Speed Low Warn Threshold */
+#define SK_SEN_FAN_LOW_ERR 4550 /* FAN Speed Low Err Threshold */
+
+/*
+ * Some Voltages need dynamic thresholds
+ */
+#define SK_SEN_DYN_INIT_NONE 0 /* No dynamic init of thresholds */
+#define SK_SEN_DYN_INIT_PCI_IO 10 /* Init PCI-IO with new thresholds */
+#define SK_SEN_DYN_INIT_VAUX 11 /* Init VAUX with new thresholds */
extern int SkLm80ReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
#endif /* n_INC_SKGEI2C_H */
diff -Nru a/drivers/net/sk98lin/h/skgeinit.h b/drivers/net/sk98lin/h/skgeinit.h
--- a/drivers/net/sk98lin/h/skgeinit.h Sun Aug 3 13:14:51 2003
+++ b/drivers/net/sk98lin/h/skgeinit.h Sun Aug 3 13:14:51 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skgeinit.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.51 $
- * Date: $Date: 2001/02/09 12:26:38 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.81 $
+ * Date: $Date: 2003/07/04 12:30:38 $
* Purpose: Structures and prototypes for the GE Init Module
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,137 +27,278 @@
* History:
*
* $Log: skgeinit.h,v $
+ * Revision 1.81 2003/07/04 12:30:38 rschmidt
+ * Added SK_FAR to pointers in MAC statistic functions (for PXE)
+ * Editorial changes
+ *
+ * Revision 1.80 2003/05/28 15:25:30 rschmidt
+ * Added SK_FAR to pointers in MAC/PHY read functions (for PXE)
+ * Minor changes to avoid LINT warnings
+ * Editorial changes
+ *
+ * Revision 1.79 2003/05/06 12:02:33 rschmidt
+ * Added entry GIYukon in s_GeInit structure
+ * Editorial changes
+ *
+ * Revision 1.78 2003/04/28 08:59:57 rschmidt
+ * Added entries GIValIrqMask and GITimeStampCnt in s_GeInit structure
+ *
+ * Revision 1.77 2003/04/08 16:27:02 rschmidt
+ * Added entry GILedBlinkCtrl in s_GeInit structure
+ * Added defines for LED Blink Control
+ *
+ * Revision 1.76 2003/03/31 07:21:01 mkarl
+ * Added PGmANegAdv to SK_GEPORT.
+ * Corrected Copyright.
+ *
+ * Revision 1.75 2003/02/05 13:36:39 rschmidt
+ * Added define SK_FACT_78 for YUKON's Host Clock of 78.12 MHz
+ * Editorial changes
+ *
+ * Revision 1.74 2003/01/28 09:39:16 rschmidt
+ * Added entry GIYukonLite in s_GeInit structure
+ * Editorial changes
+ *
+ * Revision 1.73 2002/11/15 12:47:25 rschmidt
+ * Replaced error message SKERR_HWI_E024 for Cable Diagnostic with
+ * Rx queue error in SkGeStopPort().
+ *
+ * Revision 1.72 2002/11/12 17:08:35 rschmidt
+ * Added entries for Cable Diagnostic to Port structure
+ * Added entries GIPciSlot64 and GIPciClock66 in s_GeInit structure
+ * Added error message for Cable Diagnostic
+ * Added prototypes for SkGmCableDiagStatus()
+ * Editorial changes
+ *
+ * Revision 1.71 2002/10/21 11:26:10 mkarl
+ * Changed interface of SkGeInitAssignRamToQueues().
+ *
+ * Revision 1.70 2002/10/14 08:21:32 rschmidt
+ * Changed type of GICopperType, GIVauxAvail to SK_BOOL
+ * Added entry PRxOverCnt to Port structure
+ * Added entry GIYukon32Bit in s_GeInit structure
+ * Editorial changes
+ *
+ * Revision 1.69 2002/10/09 16:57:15 mkarl
+ * Added some constants and macros for SkGeInitAssignRamToQueues().
+ *
+ * Revision 1.68 2002/09/12 08:58:51 rwahl
+ * Retrieve counters needed for XMAC errata workarounds directly because
+ * PNMI returns corrected counter values (e.g. #10620).
+ *
+ * Revision 1.67 2002/08/16 14:40:30 rschmidt
+ * Added entries GIGenesis and GICopperType in s_GeInit structure
+ * Added prototypes for SkMacHashing()
+ * Editorial changes
+ *
+ * Revision 1.66 2002/08/12 13:27:21 rschmidt
+ * Added defines for Link speed capabilities
+ * Added entry PLinkSpeedCap to Port structure
+ * Added entry GIVauxAvail in s_GeInit structure
+ * Added prototypes for SkMacPromiscMode()
+ * Editorial changes
+ *
+ * Revision 1.65 2002/08/08 15:46:18 rschmidt
+ * Added define SK_PHY_ACC_TO for PHY access timeout
+ * Added define SK_XM_RX_HI_WM for XMAC Rx High Watermark
+ * Added define SK_MIN_TXQ_SIZE for Min RAM Buffer Tx Queue Size
+ * Added entry PhyId1 to Port structure
+ *
+ * Revision 1.64 2002/07/23 16:02:56 rschmidt
+ * Added entry GIWolOffs in s_GeInit struct (HW-Bug in YUKON 1st rev.)
+ * Added prototypes for: SkGePhyRead(), SkGePhyWrite()
+ *
+ * Revision 1.63 2002/07/18 08:17:38 rwahl
+ * Corrected definitions for SK_LSPEED_xxx & SK_LSPEED_STAT_xxx.
+ *
+ * Revision 1.62 2002/07/17 18:21:55 rwahl
+ * Added SK_LSPEED_INDETERMINATED define.
+ *
+ * Revision 1.61 2002/07/17 17:16:03 rwahl
+ * - MacType now member of GIni struct.
+ * - Struct alignment to 32bit.
+ * - Editorial change.
+ *
+ * Revision 1.60 2002/07/15 18:23:39 rwahl
+ * Added GeMacFunc to GE Init structure.
+ * Added prototypes for SkXmUpdateStats(), SkGmUpdateStats(),
+ * SkXmMacStatistic(), SkGmMacStatistic(), SkXmResetCounter(),
+ * SkGmResetCounter(), SkXmOverflowStatus(), SkGmOverflowStatus().
+ * Added defines for current link speed state.
+ * Added ERRMSG defintions for MacUpdateStat() & MacStatistics().
+ *
+ * Revision 1.59 2002/07/15 15:40:22 rschmidt
+ * Added entry PLinkSpeedUsed to Port structure
+ * Editorial changes
+ *
+ * Revision 1.58 2002/06/10 09:36:30 rschmidt
+ * Editorial changes.
+ *
+ * Revision 1.57 2002/06/05 08:18:00 rschmidt
+ * Corrected alignment in Port Structure
+ * Added new prototypes for GMAC
+ * Editorial changes
+ *
+ * Revision 1.56 2002/04/25 11:38:12 rschmidt
+ * Added defines for Link speed values
+ * Added defines for Loopback parameters for MAC and PHY
+ * Removed entry PRxCmd from Port structure
+ * Added entry PLinkSpeed to Port structure
+ * Added entries GIChipId and GIChipRev to GE Init structure
+ * Removed entry GIAnyPortAct from GE Init structure
+ * Added prototypes for: SkMacInit(), SkMacInitPhy(),
+ * SkMacRxTxDisable(), SkMacSoftRst(), SkMacHardRst(), SkMacIrq(),
+ * SkMacIrqDisable(), SkMacFlushTxFifo(), SkMacFlushRxFifo(),
+ * SkMacAutoNegDone(), SkMacAutoNegLipaPhy(), SkMacSetRxTxEn(),
+ * SkXmPhyRead(), SkXmPhyRead(), SkGmPhyWrite(), SkGmPhyWrite();
+ * Removed prototypes for static functions in SkXmac2.c
+ * Editorial changes
+ *
+ * Revision 1.55 2002/02/26 15:24:53 rwahl
+ * Fix: no link with manual configuration (#10673). The previous fix for
+ * #10639 was removed. So for RLMT mode = CLS the RLMT may switch to
+ * misconfigured port. It should not occur for the other RLMT modes.
+ *
+ * Revision 1.54 2002/01/18 16:52:52 rwahl
+ * Editorial corrections.
+ *
+ * Revision 1.53 2001/11/20 09:19:58 rwahl
+ * Reworked bugfix #10639 (no dependency to RLMT mode).
+ *
+ * Revision 1.52 2001/10/26 07:52:23 afischer
+ * Port switching bug in `check local link` mode
+ *
* Revision 1.51 2001/02/09 12:26:38 cgoos
* Inserted #ifdef DIAG for half duplex workaround timer.
- *
+ *
* Revision 1.50 2001/02/07 07:56:40 rassmann
* Corrected copyright.
- *
+ *
* Revision 1.49 2001/01/31 15:32:18 gklug
* fix: problem with autosensing an SR8800 switch
* add: counter for autoneg timeouts
- *
+ *
* Revision 1.48 2000/11/09 11:30:10 rassmann
* WA: Waiting after releasing reset until BCom chip is accessible.
- *
+ *
* Revision 1.47 2000/10/18 12:22:40 cgoos
* Added workaround for half duplex hangup.
- *
+ *
* Revision 1.46 2000/08/10 11:28:00 rassmann
* Editorial changes.
* Preserving 32-bit alignment in structs for the adapter context.
- *
+ *
* Revision 1.45 1999/11/22 13:56:19 cgoos
* Changed license header to GPL.
- *
+ *
* Revision 1.44 1999/10/26 07:34:15 malthoff
* The define SK_LNK_ON has been lost in v1.41.
- *
+ *
* Revision 1.43 1999/10/06 09:30:16 cgoos
* Changed SK_XM_THR_JUMBO.
- *
+ *
* Revision 1.42 1999/09/16 12:58:26 cgoos
* Changed SK_LED_STANDY macro to be independent of HW link sync.
- *
+ *
* Revision 1.41 1999/07/30 06:56:14 malthoff
* Correct comment for SK_MS_STAT_UNSET.
- *
+ *
* Revision 1.40 1999/05/27 13:38:46 cgoos
* Added SK_BMU_TX_WM.
* Made SK_BMU_TX_WM and SK_BMU_RX_WM user-definable.
* Changed XMAC Tx treshold to max. values.
- *
+ *
* Revision 1.39 1999/05/20 14:35:26 malthoff
* Remove prototypes for SkGeLinkLED().
- *
+ *
* Revision 1.38 1999/05/19 11:59:12 cgoos
* Added SK_MS_CAP_INDETERMINATED define.
- *
+ *
* Revision 1.37 1999/05/19 07:32:33 cgoos
* Changes for 1000Base-T.
* LED-defines for HWAC_LINK_LED macro.
- *
+ *
* Revision 1.36 1999/04/08 14:00:24 gklug
* add:Port struct field PLinkResCt
- *
+ *
* Revision 1.35 1999/03/25 07:43:07 malthoff
* Add error string for SKERR_HWI_E018MSG.
- *
+ *
* Revision 1.34 1999/03/12 16:25:57 malthoff
* Remove PPollRxD and PPollTxD.
* Add SKERR_HWI_E017MSG. and SK_DPOLL_MAX.
- *
+ *
* Revision 1.33 1999/03/12 13:34:41 malthoff
* Add Autonegotiation error codes.
* Change defines for parameter Mode in SkXmSetRxCmd().
* Replace __STDC__ by SK_KR_PROTO.
- *
+ *
* Revision 1.32 1999/01/25 14:40:20 mhaveman
* Added new return states for the virtual management port if multiple
* ports are active but differently configured.
- *
+ *
* Revision 1.31 1998/12/11 15:17:02 gklug
- * add: Link partnet autoneg states : Unknown Manual and Autonegotiation
- *
+ * add: Link partnet autoneg states : Unknown Manual and Auto-negotiation
+ *
* Revision 1.30 1998/12/07 12:17:04 gklug
- * add: Link Partner autonegotiation flag
- *
+ * add: Link Partner auto-negotiation flag
+ *
* Revision 1.29 1998/12/01 10:54:42 gklug
* add: variables for XMAC Errata
- *
+ *
* Revision 1.28 1998/12/01 10:14:15 gklug
* add: PIsave saves the Interrupt status word
- *
+ *
* Revision 1.27 1998/11/26 15:24:52 mhaveman
* Added link status states SK_LMODE_STAT_AUTOHALF and
* SK_LMODE_STAT_AUTOFULL which are used by PNMI.
- *
+ *
* Revision 1.26 1998/11/26 14:53:01 gklug
* add:autoNeg Timeout variable
- *
+ *
* Revision 1.25 1998/11/26 08:58:50 gklug
* add: Link Mode configuration (AUTO Sense mode)
- *
+ *
* Revision 1.24 1998/11/24 13:30:27 gklug
* add: PCheckPar to port struct
- *
+ *
* Revision 1.23 1998/11/18 13:23:26 malthoff
* Add SK_PKT_TO_MAX.
- *
+ *
* Revision 1.22 1998/11/18 13:19:54 gklug
* add: PPrevShorts and PLinkBroken to port struct for WA XMAC Errata #C1
*
* Revision 1.21 1998/10/26 08:02:57 malthoff
* Add GIRamOffs.
- *
+ *
* Revision 1.20 1998/10/19 07:28:37 malthoff
- * Add prototyp for SkGeInitRamIface().
- *
+ * Add prototype for SkGeInitRamIface().
+ *
* Revision 1.19 1998/10/14 14:47:48 malthoff
* SK_TIMER should not be defined for Diagnostics.
* Add SKERR_HWI_E015MSG and SKERR_HWI_E016MSG.
- *
+ *
* Revision 1.18 1998/10/14 14:00:03 gklug
* add: timer to port struct for workaround of Errata #2
- *
+ *
* Revision 1.17 1998/10/14 11:23:09 malthoff
* Add prototype for SkXmAutoNegDone().
* Fix SkXmSetRxCmd() prototype statement.
*
* Revision 1.16 1998/10/14 05:42:29 gklug
* add: HWLinkUp flag to Port struct
- *
+ *
* Revision 1.15 1998/10/09 08:26:33 malthoff
* Rename SK_RB_ULPP_B to SK_RB_LLPP_B.
- *
+ *
* Revision 1.14 1998/10/09 07:11:13 malthoff
* bug fix: SK_FACT_53 is 85 not 117.
* Rework time out init values.
* Add GIPortUsage and corresponding defines.
* Add some error log messages.
- *
+ *
* Revision 1.13 1998/10/06 14:13:14 malthoff
- * Add prototyp for SkGeLoadLnkSyncCnt().
+ * Add prototype for SkGeLoadLnkSyncCnt().
*
* Revision 1.12 1998/10/05 11:29:53 malthoff
* bug fix: A comment was not closed.
@@ -194,7 +336,7 @@
* Revision 1.4 1998/09/03 09:55:31 malthoff
* Add constants for parameters Dir and RstMode
* when calling SkGeStopPort().
- * Rework the prototyp section.
+ * Rework the prototype section.
* Add Queue Address offsets PRxQOff, PXsQOff, and PXaQOff.
* Remove Ioc with IoC.
*
@@ -208,7 +350,6 @@
* Revision 1.1 1998/07/23 09:50:24 malthoff
* Created.
*
- *
******************************************************************************/
#ifndef __INC_SKGEINIT_H_
@@ -220,53 +361,54 @@
/* defines ********************************************************************/
-/*
- * defines for modifying Link LED behaviour (has been used with SkGeLinkLED())
- */
-#define SK_LNK_OFF LED_OFF
-#define SK_LNK_ON (LED_ON | LED_BLK_OFF| LED_SYNC_OFF)
-#define SK_LNK_BLINK (LED_ON | LED_BLK_ON | LED_SYNC_ON)
-#define SK_LNK_PERM (LED_ON | LED_BLK_OFF| LED_SYNC_ON)
-#define SK_LNK_TST (LED_ON | LED_BLK_ON | LED_SYNC_OFF)
+#define SK_TEST_VAL 0x11335577UL
-/*
- * defines for parameter 'Mode' when calling SK_HWAC_LINK_LED()
- */
-#define SK_LED_OFF LED_OFF
-#define SK_LED_ACTIVE (LED_ON | LED_BLK_OFF| LED_SYNC_OFF)
-#define SK_LED_STANDBY (LED_ON | LED_BLK_ON| LED_SYNC_OFF)
+/* modifying Link LED behaviour (used with SkGeLinkLED()) */
+#define SK_LNK_OFF LED_OFF
+#define SK_LNK_ON (LED_ON | LED_BLK_OFF | LED_SYNC_OFF)
+#define SK_LNK_BLINK (LED_ON | LED_BLK_ON | LED_SYNC_ON)
+#define SK_LNK_PERM (LED_ON | LED_BLK_OFF | LED_SYNC_ON)
+#define SK_LNK_TST (LED_ON | LED_BLK_ON | LED_SYNC_OFF)
+
+/* parameter 'Mode' when calling SK_HWAC_LINK_LED() */
+#define SK_LED_OFF LED_OFF
+#define SK_LED_ACTIVE (LED_ON | LED_BLK_OFF | LED_SYNC_OFF)
+#define SK_LED_STANDBY (LED_ON | LED_BLK_ON | LED_SYNC_OFF)
+
+/* addressing LED Registers in SkGeXmitLED() */
+#define XMIT_LED_INI 0
+#define XMIT_LED_CNT (RX_LED_VAL - RX_LED_INI)
+#define XMIT_LED_CTRL (RX_LED_CTRL- RX_LED_INI)
+#define XMIT_LED_TST (RX_LED_TST - RX_LED_INI)
-/*
- * defines for parameter 'Mode' when calling SkGeXmitLED()
- */
+/* parameter 'Mode' when calling SkGeXmitLED() */
#define SK_LED_DIS 0
#define SK_LED_ENA 1
#define SK_LED_TST 2
-/*
- * Counter and Timer constants, for a host clock of 62.5 MHz
- */
-#define SK_XMIT_DUR 0x002faf08L /* 50 ms */
-#define SK_BLK_DUR 0x01dcd650L /* 500 ms */
+/* Counter and Timer constants, for a host clock of 62.5 MHz */
+#define SK_XMIT_DUR 0x002faf08UL /* 50 ms */
+#define SK_BLK_DUR 0x01dcd650UL /* 500 ms */
-#define SK_DPOLL_DEF 0x00EE6B28L /* 250 ms */
-#define SK_DPOLL_MAX 0x00FFFFFFL /* ca. 268ms */
+#define SK_DPOLL_DEF 0x00ee6b28UL /* 250 ms at 62.5 MHz */
-#define SK_FACT_62 100 /* is given in percent */
-#define SK_FACT_53 85
+#define SK_DPOLL_MAX 0x00ffffffUL /* 268 ms at 62.5 MHz */
+ /* 215 ms at 78.12 MHz */
-/*
- * Timeout values
- */
-#define SK_MAC_TO_53 72 /* MAC arbiter timeout */
+#define SK_FACT_62 100 /* is given in percent */
+#define SK_FACT_53 85 /* on GENESIS: 53.12 MHz */
+#define SK_FACT_78 125 /* on YUKON: 78.12 MHz */
+
+/* Timeout values */
+#define SK_MAC_TO_53 72 /* MAC arbiter timeout */
#define SK_PKT_TO_53 0x2000 /* Packet arbiter timeout */
#define SK_PKT_TO_MAX 0xffff /* Maximum value */
-#define SK_RI_TO_53 36 /* RAM interface timeout */
+#define SK_RI_TO_53 36 /* RAM interface timeout */
-/*
- * RAM Buffer High Pause Threshold values
- */
-#define SK_RB_ULPP ( 8 * 1024) /* Upper Level in kB/8 */
+#define SK_PHY_ACC_TO 600000 /* PHY access timeout */
+
+/* RAM Buffer High Pause Threshold values */
+#define SK_RB_ULPP ( 8 * 1024) /* Upper Level in kB/8 */
#define SK_RB_LLPP_S (10 * 1024) /* Lower Level for small Queues */
#define SK_RB_LLPP_B (16 * 1024) /* Lower Level for big Queues */
@@ -274,9 +416,12 @@
#define SK_BMU_RX_WM 0x600 /* BMU Rx Watermark */
#endif
#ifndef SK_BMU_TX_WM
-#define SK_BMU_TX_WM 0x600 /* BMU Rx Watermark */
+#define SK_BMU_TX_WM 0x600 /* BMU Tx Watermark */
#endif
+/* XMAC II Rx High Watermark */
+#define SK_XM_RX_HI_WM 0x05aa /* 1450 */
+
/* XMAC II Tx Threshold */
#define SK_XM_THR_REDL 0x01fb /* .. for redundant link usage */
#define SK_XM_THR_SL 0x01fb /* .. for single link adapters */
@@ -284,184 +429,203 @@
#define SK_XM_THR_JUMBO 0x03fc /* .. for jumbo frame usage */
/* values for GIPortUsage */
-#define SK_RED_LINK 1 /* redundant link usage */
-#define SK_MUL_LINK 2 /* multiple link usage */
+#define SK_RED_LINK 1 /* redundant link usage */
+#define SK_MUL_LINK 2 /* multiple link usage */
#define SK_JUMBO_LINK 3 /* driver uses jumbo frames */
-/* Minimum RAM Buffer Receive Queue Size */
-#define SK_MIN_RXQ_SIZE 16 /* 16 kB */
-/*
- * defines for parameter 'Dir' when calling SkGeStopPort()
- */
-#define SK_STOP_TX 1 /* Stops the transmit path, resets the XMAC */
-#define SK_STOP_RX 2 /* Stops the receive path */
-#define SK_STOP_ALL 3 /* Stops rx and tx path, resets the XMAC */
+/* Minimum RAM Buffer Rx Queue Size */
+#define SK_MIN_RXQ_SIZE 16 /* 16 kB */
-/*
- * defines for parameter 'RstMode' when calling SkGeStopPort()
- */
-#define SK_SOFT_RST 1 /* perform a software reset */
-#define SK_HARD_RST 2 /* perform a hardware reset */
+/* Minimum RAM Buffer Tx Queue Size */
+#define SK_MIN_TXQ_SIZE 16 /* 16 kB */
-/*
- * Define Init Levels
- */
-#define SK_INIT_DATA 0 /* Init level 0: init data structures */
-#define SK_INIT_IO 1 /* Init level 1: init with IOs */
-#define SK_INIT_RUN 2 /* Init level 2: init for run time */
+/* Queue Size units */
+#define QZ_UNITS 0x7
+#define QZ_STEP 8
+
+/* Percentage of queue size from whole memory */
+/* 80 % for receive */
+#define RAM_QUOTA_RX 80L
+/* 0% for sync transfer */
+#define RAM_QUOTA_SYNC 0L
+/* the rest (20%) is taken for async transfer */
+
+/* Get the rounded queue size in Bytes in 8k steps */
+#define ROUND_QUEUE_SIZE(SizeInBytes) \
+ ((((unsigned long) (SizeInBytes) + (QZ_STEP*1024L)-1) / 1024) & \
+ ~(QZ_STEP-1))
+
+/* Get the rounded queue size in KBytes in 8k steps */
+#define ROUND_QUEUE_SIZE_KB(Kilobytes) \
+ ROUND_QUEUE_SIZE((Kilobytes) * 1024L)
+
+/* Types of RAM Buffer Queues */
+#define SK_RX_SRAM_Q 1 /* small receive queue */
+#define SK_RX_BRAM_Q 2 /* big receive queue */
+#define SK_TX_RAM_Q 3 /* small or big transmit queue */
-/*
- * Set Link Mode Parameter
- */
-#define SK_LMODE_HALF 1 /* Half Duplex Mode */
-#define SK_LMODE_FULL 2 /* Full Duplex Mode */
-#define SK_LMODE_AUTOHALF 3 /* AutoHalf Duplex Mode */
-#define SK_LMODE_AUTOFULL 4 /* AutoFull Duplex Mode */
-#define SK_LMODE_AUTOBOTH 5 /* AutoBoth Duplex Mode */
-#define SK_LMODE_AUTOSENSE 6 /* configured mode auto sensing */
-#define SK_LMODE_INDETERMINATED 7 /* Return value for virtual port if
- * multiple ports are differently
- * configured.
- */
-
-/*
- * Autonegotiation timeout in 100ms granularity.
- */
-#define SK_AND_MAX_TO 6 /* Wait 600 msec before link comes up */
-
-/*
- * Define Autonegotiation error codes here
- */
-#define SK_AND_OK 0 /* no error */
-#define SK_AND_OTHER 1 /* other error than below */
-#define SK_AND_DUP_CAP 2 /* Duplex capabilities error */
-
-/*
- * Link Capability value
- */
-#define SK_LMODE_CAP_HALF (1<<0) /* Half Duplex Mode */
-#define SK_LMODE_CAP_FULL (1<<1) /* Full Duplex Mode */
-#define SK_LMODE_CAP_AUTOHALF (1<<2) /* AutoHalf Duplex Mode */
-#define SK_LMODE_CAP_AUTOFULL (1<<3) /* AutoFull Duplex Mode */
-#define SK_LMODE_CAP_INDETERMINATED (1<<4) /* Return value for virtual port if
- * multiple ports are differently
- * configured.
- */
-
-/*
- * Link mode current state
- */
-#define SK_LMODE_STAT_UNKNOWN 1 /* Unknown Duplex Mode */
-#define SK_LMODE_STAT_HALF 2 /* Half Duplex Mode */
-#define SK_LMODE_STAT_FULL 3 /* Full Duplex Mode */
-#define SK_LMODE_STAT_AUTOHALF 4 /* Half Duplex Mode obtained by AutoNeg */
-#define SK_LMODE_STAT_AUTOFULL 5 /* Half Duplex Mode obtained by AutoNeg */
-#define SK_LMODE_STAT_INDETERMINATED 6 /* Return value for virtual port if
- * multiple ports are differently
- * configured.
- */
-/*
- * Set Flow Control Mode Parameter (and capabilities)
- */
-#define SK_FLOW_MODE_NONE 1 /* No Flow Control */
-#define SK_FLOW_MODE_LOC_SEND 2 /* Local station sends PAUSE */
-#define SK_FLOW_MODE_SYMMETRIC 3 /* Both station may send PAUSE */
-#define SK_FLOW_MODE_SYM_OR_REM 4 /* Both station may send PAUSE or
- * just the remote station may send
- * PAUSE
- */
-#define SK_FLOW_MODE_INDETERMINATED 5 /* Return value for virtual port if
- * multiple ports are differently
- * configured.
- */
-
-/*
- * Flow Control Status Parameter
- */
-#define SK_FLOW_STAT_NONE 1 /* No Flow Control */
-#define SK_FLOW_STAT_REM_SEND 2 /* Remote Station sends PAUSE */
-#define SK_FLOW_STAT_LOC_SEND 3 /* Local station sends PAUSE */
-#define SK_FLOW_STAT_SYMMETRIC 4 /* Both station may send PAUSE */
-#define SK_FLOW_STAT_INDETERMINATED 5 /* Return value for virtual port if
- * multiple ports are differently
- * configured.
- */
-/*
- * Master/Slave Mode capabilities
- */
-#define SK_MS_CAP_AUTO (1<<0) /* Automatic resolution */
-#define SK_MS_CAP_MASTER (1<<1) /* This station is master */
-#define SK_MS_CAP_SLAVE (1<<2) /* This station is slave */
-#define SK_MS_CAP_INDETERMINATED (1<<3) /* Return value for virtual port if
- * multiple ports are differently
- * configured.
- */
+/* parameter 'Dir' when calling SkGeStopPort() */
+#define SK_STOP_TX 1 /* Stops the transmit path, resets the XMAC */
+#define SK_STOP_RX 2 /* Stops the receive path */
+#define SK_STOP_ALL 3 /* Stops Rx and Tx path, resets the XMAC */
-/*
- * Set Master/Slave Mode Parameter (and capabilities)
- */
-#define SK_MS_MODE_AUTO 1 /* Automatic resolution */
-#define SK_MS_MODE_MASTER 2 /* This station is master */
-#define SK_MS_MODE_SLAVE 3 /* This station is slave */
-#define SK_MS_MODE_INDETERMINATED 4 /* Return value for virtual port if
- * multiple ports are differently
- */
+/* parameter 'RstMode' when calling SkGeStopPort() */
+#define SK_SOFT_RST 1 /* perform a software reset */
+#define SK_HARD_RST 2 /* perform a hardware reset */
-/*
- * Master/Slave Status Parameter
- */
-#define SK_MS_STAT_UNSET 1 /* The MS status is never been determ*/
-#define SK_MS_STAT_MASTER 2 /* This station is master */
-#define SK_MS_STAT_SLAVE 3 /* This station is slave */
-#define SK_MS_STAT_FAULT 4 /* MS resolution failed */
-#define SK_MS_STAT_INDETERMINATED 5 /* Return value for virtual port if
- * multiple ports are differently
+/* Init Levels */
+#define SK_INIT_DATA 0 /* Init level 0: init data structures */
+#define SK_INIT_IO 1 /* Init level 1: init with IOs */
+#define SK_INIT_RUN 2 /* Init level 2: init for run time */
+
+/* Link Mode Parameter */
+#define SK_LMODE_HALF 1 /* Half Duplex Mode */
+#define SK_LMODE_FULL 2 /* Full Duplex Mode */
+#define SK_LMODE_AUTOHALF 3 /* AutoHalf Duplex Mode */
+#define SK_LMODE_AUTOFULL 4 /* AutoFull Duplex Mode */
+#define SK_LMODE_AUTOBOTH 5 /* AutoBoth Duplex Mode */
+#define SK_LMODE_AUTOSENSE 6 /* configured mode auto sensing */
+#define SK_LMODE_INDETERMINATED 7 /* indeterminated */
+
+/* Auto-negotiation timeout in 100ms granularity */
+#define SK_AND_MAX_TO 6 /* Wait 600 msec before link comes up */
+
+/* Auto-negotiation error codes */
+#define SK_AND_OK 0 /* no error */
+#define SK_AND_OTHER 1 /* other error than below */
+#define SK_AND_DUP_CAP 2 /* Duplex capabilities error */
+
+
+/* Link Speed Capabilities */
+#define SK_LSPEED_CAP_AUTO (1<<0) /* Automatic resolution */
+#define SK_LSPEED_CAP_10MBPS (1<<1) /* 10 Mbps */
+#define SK_LSPEED_CAP_100MBPS (1<<2) /* 100 Mbps */
+#define SK_LSPEED_CAP_1000MBPS (1<<3) /* 1000 Mbps */
+#define SK_LSPEED_CAP_INDETERMINATED (1<<4) /* indeterminated */
+
+/* Link Speed Parameter */
+#define SK_LSPEED_AUTO 1 /* Automatic resolution */
+#define SK_LSPEED_10MBPS 2 /* 10 Mbps */
+#define SK_LSPEED_100MBPS 3 /* 100 Mbps */
+#define SK_LSPEED_1000MBPS 4 /* 1000 Mbps */
+#define SK_LSPEED_INDETERMINATED 5 /* indeterminated */
+
+/* Link Speed Current State */
+#define SK_LSPEED_STAT_UNKNOWN 1
+#define SK_LSPEED_STAT_10MBPS 2
+#define SK_LSPEED_STAT_100MBPS 3
+#define SK_LSPEED_STAT_1000MBPS 4
+#define SK_LSPEED_STAT_INDETERMINATED 5
+
+
+/* Link Capability Parameter */
+#define SK_LMODE_CAP_HALF (1<<0) /* Half Duplex Mode */
+#define SK_LMODE_CAP_FULL (1<<1) /* Full Duplex Mode */
+#define SK_LMODE_CAP_AUTOHALF (1<<2) /* AutoHalf Duplex Mode */
+#define SK_LMODE_CAP_AUTOFULL (1<<3) /* AutoFull Duplex Mode */
+#define SK_LMODE_CAP_INDETERMINATED (1<<4) /* indeterminated */
+
+/* Link Mode Current State */
+#define SK_LMODE_STAT_UNKNOWN 1 /* Unknown Duplex Mode */
+#define SK_LMODE_STAT_HALF 2 /* Half Duplex Mode */
+#define SK_LMODE_STAT_FULL 3 /* Full Duplex Mode */
+#define SK_LMODE_STAT_AUTOHALF 4 /* Half Duplex Mode obtained by Auto-Neg */
+#define SK_LMODE_STAT_AUTOFULL 5 /* Full Duplex Mode obtained by Auto-Neg */
+#define SK_LMODE_STAT_INDETERMINATED 6 /* indeterminated */
+
+/* Flow Control Mode Parameter (and capabilities) */
+#define SK_FLOW_MODE_NONE 1 /* No Flow-Control */
+#define SK_FLOW_MODE_LOC_SEND 2 /* Local station sends PAUSE */
+#define SK_FLOW_MODE_SYMMETRIC 3 /* Both stations may send PAUSE */
+#define SK_FLOW_MODE_SYM_OR_REM 4 /* Both stations may send PAUSE or
+ * just the remote station may send PAUSE
*/
+#define SK_FLOW_MODE_INDETERMINATED 5 /* indeterminated */
-/*
- * defines for parameter 'Mode' when calling SkXmSetRxCmd()
- */
-#define SK_STRIP_FCS_ON (1<<0) /* Enable FCS stripping of rx frames */
-#define SK_STRIP_FCS_OFF (1<<1) /* Disable FCS stripping of rx frames */
-#define SK_STRIP_PAD_ON (1<<2) /* Enable pad byte stripping of rx f */
-#define SK_STRIP_PAD_OFF (1<<3) /* Disable pad byte stripping of rx f */
-#define SK_LENERR_OK_ON (1<<4) /* Don't chk fr for in range len error*/
-#define SK_LENERR_OK_OFF (1<<5) /* Check frames for in range len error*/
-#define SK_BIG_PK_OK_ON (1<<6) /* Don't set rcvError bit for big fr */
-#define SK_BIG_PK_OK_OFF (1<<7) /* Set rcvError bit for big frames */
+/* Flow Control Status Parameter */
+#define SK_FLOW_STAT_NONE 1 /* No Flow Control */
+#define SK_FLOW_STAT_REM_SEND 2 /* Remote Station sends PAUSE */
+#define SK_FLOW_STAT_LOC_SEND 3 /* Local station sends PAUSE */
+#define SK_FLOW_STAT_SYMMETRIC 4 /* Both station may send PAUSE */
+#define SK_FLOW_STAT_INDETERMINATED 5 /* indeterminated */
+
+/* Master/Slave Mode Capabilities */
+#define SK_MS_CAP_AUTO (1<<0) /* Automatic resolution */
+#define SK_MS_CAP_MASTER (1<<1) /* This station is master */
+#define SK_MS_CAP_SLAVE (1<<2) /* This station is slave */
+#define SK_MS_CAP_INDETERMINATED (1<<3) /* indeterminated */
+
+/* Set Master/Slave Mode Parameter (and capabilities) */
+#define SK_MS_MODE_AUTO 1 /* Automatic resolution */
+#define SK_MS_MODE_MASTER 2 /* This station is master */
+#define SK_MS_MODE_SLAVE 3 /* This station is slave */
+#define SK_MS_MODE_INDETERMINATED 4 /* indeterminated */
+
+/* Master/Slave Status Parameter */
+#define SK_MS_STAT_UNSET 1 /* The M/S status is not set */
+#define SK_MS_STAT_MASTER 2 /* This station is master */
+#define SK_MS_STAT_SLAVE 3 /* This station is slave */
+#define SK_MS_STAT_FAULT 4 /* M/S resolution failed */
+#define SK_MS_STAT_INDETERMINATED 5 /* indeterminated */
+
+/* parameter 'Mode' when calling SkXmSetRxCmd() */
+#define SK_STRIP_FCS_ON (1<<0) /* Enable FCS stripping of Rx frames */
+#define SK_STRIP_FCS_OFF (1<<1) /* Disable FCS stripping of Rx frames */
+#define SK_STRIP_PAD_ON (1<<2) /* Enable pad byte stripping of Rx fr */
+#define SK_STRIP_PAD_OFF (1<<3) /* Disable pad byte stripping of Rx fr */
+#define SK_LENERR_OK_ON (1<<4) /* Don't chk fr for in range len error */
+#define SK_LENERR_OK_OFF (1<<5) /* Check frames for in range len error */
+#define SK_BIG_PK_OK_ON (1<<6) /* Don't set Rx Error bit for big frames */
+#define SK_BIG_PK_OK_OFF (1<<7) /* Set Rx Error bit for big frames */
+#define SK_SELF_RX_ON (1<<8) /* Enable Rx of own packets */
+#define SK_SELF_RX_OFF (1<<9) /* Disable Rx of own packets */
+
+/* parameter 'Para' when calling SkMacSetRxTxEn() */
+#define SK_MAC_LOOPB_ON (1<<0) /* Enable MAC Loopback Mode */
+#define SK_MAC_LOOPB_OFF (1<<1) /* Disable MAC Loopback Mode */
+#define SK_PHY_LOOPB_ON (1<<2) /* Enable PHY Loopback Mode */
+#define SK_PHY_LOOPB_OFF (1<<3) /* Disable PHY Loopback Mode */
+#define SK_PHY_FULLD_ON (1<<4) /* Enable GMII Full Duplex */
+#define SK_PHY_FULLD_OFF (1<<5) /* Disable GMII Full Duplex */
-/*
- * States of PState
- */
+/* States of PState */
#define SK_PRT_RESET 0 /* the port is reset */
-#define SK_PRT_STOP 1 /* the port is stopped (similar to sw reset) */
-#define SK_PRT_INIT 2 /* the port is initialized */
-#define SK_PRT_RUN 3 /* the port has an active link */
+#define SK_PRT_STOP 1 /* the port is stopped (similar to SW reset) */
+#define SK_PRT_INIT 2 /* the port is initialized */
+#define SK_PRT_RUN 3 /* the port has an active link */
+
+/* Default receive frame limit for Workaround of XMAC Errata */
+#define SK_DEF_RX_WA_LIM SK_CONSTU64(100)
+
+/* values for GILedBlinkCtrl (LED Blink Control) */
+#define SK_ACT_LED_BLINK (1<<0) /* Active LED blinking */
+#define SK_DUP_LED_NORMAL (1<<1) /* Duplex LED normal */
+#define SK_LED_LINK100_ON (1<<2) /* Link 100M LED on */
+
+/* Link Partner Status */
+#define SK_LIPA_UNKNOWN 0 /* Link partner is in unknown state */
+#define SK_LIPA_MANUAL 1 /* Link partner is in detected manual state */
+#define SK_LIPA_AUTO 2 /* Link partner is in auto-negotiation state */
-/*
- * Default receive frame limit for Workaround of XMAC Errata
- */
-#define SK_DEF_RX_WA_LIM SK_CONSTU64(100)
+/* Maximum Restarts before restart is ignored (3Com WA) */
+#define SK_MAX_LRESTART 3 /* Max. 3 times the link is restarted */
-/*
- * Define link partner Status
- */
-#define SK_LIPA_UNKNOWN 0 /* Link partner is in unknown state */
-#define SK_LIPA_MANUAL 1 /* Link partner is in detected manual state */
-#define SK_LIPA_AUTO 2 /* Link partner is in autonegotiation state */
+/* Max. Auto-neg. timeouts before link detection in sense mode is reset */
+#define SK_MAX_ANEG_TO 10 /* Max. 10 times the sense mode is reset */
-/*
- * Define Maximum Restarts before restart is ignored (3com WA)
- */
-#define SK_MAX_LRESTART 3 /* Max. 3 times the link is restarted */
+/* structures *****************************************************************/
/*
- * define max. autonegotiation timeouts before link detection in sense mode is
- * reset.
+ * MAC specific functions
*/
-#define SK_MAX_ANEG_TO 10 /* Max. 10 times the sense mode is reset */
-
-/* structures *****************************************************************/
+typedef struct s_GeMacFunc {
+ int (*pFnMacUpdateStats)(SK_AC *pAC, SK_IOC IoC, unsigned int Port);
+ int (*pFnMacStatistic)(SK_AC *pAC, SK_IOC IoC, unsigned int Port,
+ SK_U16 StatAddr, SK_U32 SK_FAR *pVal);
+ int (*pFnMacResetCounter)(SK_AC *pAC, SK_IOC IoC, unsigned int Port);
+ int (*pFnMacOverflow)(SK_AC *pAC, SK_IOC IoC, unsigned int Port,
+ SK_U16 IStatus, SK_U64 SK_FAR *pVal);
+} SK_GEMACFUNC;
/*
* Port Structure
@@ -469,38 +633,37 @@
typedef struct s_GePort {
#ifndef SK_DIAG
SK_TIMER PWaTimer; /* Workaround Timer */
-#endif
- SK_U64 PPrevShorts; /* Previous short Counter checking */
+ SK_TIMER HalfDupChkTimer;
+#endif /* SK_DIAG */
+ SK_U32 PPrevShorts; /* Previous Short Counter checking */
+ SK_U32 PPrevFcs; /* Previous FCS Error Counter checking */
SK_U64 PPrevRx; /* Previous RxOk Counter checking */
- SK_U64 PPrevFcs; /* Previous FCS Error Counter checking */
SK_U64 PRxLim; /* Previous RxOk Counter checking */
SK_U64 LastOctets; /* For half duplex hang check */
-#ifndef SK_DIAG
- SK_TIMER HalfDupChkTimer;
-#endif
int PLinkResCt; /* Link Restart Counter */
- int PAutoNegTimeOut;/* AutoNegotiation timeout current value */
- int PAutoNegTOCt; /* AutoNeg Timeout Counter */
+ int PAutoNegTimeOut;/* Auto-negotiation timeout current value */
+ int PAutoNegTOCt; /* Auto-negotiation Timeout Counter */
int PRxQSize; /* Port Rx Queue Size in kB */
- int PXSQSize; /* Port Synchronous Transmit Queue Size in kB */
- int PXAQSize; /* Port Asynchronous Transmit Queue Size in kB*/
+ int PXSQSize; /* Port Synchronous Transmit Queue Size in kB */
+ int PXAQSize; /* Port Asynchronous Transmit Queue Size in kB */
SK_U32 PRxQRamStart; /* Receive Queue RAM Buffer Start Address */
SK_U32 PRxQRamEnd; /* Receive Queue RAM Buffer End Address */
SK_U32 PXsQRamStart; /* Sync Tx Queue RAM Buffer Start Address */
SK_U32 PXsQRamEnd; /* Sync Tx Queue RAM Buffer End Address */
SK_U32 PXaQRamStart; /* Async Tx Queue RAM Buffer Start Address */
SK_U32 PXaQRamEnd; /* Async Tx Queue RAM Buffer End Address */
+ SK_U32 PRxOverCnt; /* Receive Overflow Counter */
int PRxQOff; /* Rx Queue Address Offset */
int PXsQOff; /* Synchronous Tx Queue Address Offset */
int PXaQOff; /* Asynchronous Tx Queue Address Offset */
int PhyType; /* PHY used on this port */
+ int PState; /* Port status (reset, stop, init, run) */
+ SK_U16 PhyId1; /* PHY Id1 on this port */
SK_U16 PhyAddr; /* MDIO/MDC PHY address */
- SK_U16 PRxCmd; /* Port Receive Command Configuration Value */
SK_U16 PIsave; /* Saved Interrupt status word */
SK_U16 PSsave; /* Saved PHY status word */
- SK_U16 Align01;
- SK_BOOL PHWLinkUp; /* The hardware Link is up (wireing) */
- SK_BOOL PState; /* Is port initialized ? */
+ SK_U16 PGmANegAdv; /* Saved GPhy AutoNegAdvertisment register */
+ SK_BOOL PHWLinkUp; /* The hardware Link is up (wiring) */
SK_BOOL PLinkBroken; /* Is Link broken ? */
SK_BOOL PCheckPar; /* Do we check for parity errors ? */
SK_BOOL HalfDupTimerActive;
@@ -508,77 +671,108 @@
SK_U8 PLinkModeConf; /* Link Mode configured */
SK_U8 PLinkMode; /* Link Mode currently used */
SK_U8 PLinkModeStatus;/* Link Mode Status */
+ SK_U8 PLinkSpeedCap; /* Link Speed Capabilities(10/100/1000 Mbps) */
+ SK_U8 PLinkSpeed; /* configured Link Speed (10/100/1000 Mbps) */
+ SK_U8 PLinkSpeedUsed; /* current Link Speed (10/100/1000 Mbps) */
SK_U8 PFlowCtrlCap; /* Flow Control Capabilities */
SK_U8 PFlowCtrlMode; /* Flow Control Mode */
SK_U8 PFlowCtrlStatus;/* Flow Control Status */
SK_U8 PMSCap; /* Master/Slave Capabilities */
SK_U8 PMSMode; /* Master/Slave Mode */
SK_U8 PMSStatus; /* Master/Slave Status */
- SK_U8 PAutoNegFail; /* Autonegotiation fail flag */
- SK_U8 PLipaAutoNeg; /* Autonegotiation possible with Link Partner */
- SK_U8 Align02;
+ SK_BOOL PAutoNegFail; /* Auto-negotiation fail flag */
+ SK_U8 PLipaAutoNeg; /* Auto-negotiation possible with Link Partner */
+ SK_U8 PCableLen; /* Cable Length */
+ SK_U8 PMdiPairLen[4]; /* MDI[0..3] Pair Length */
+ SK_U8 PMdiPairSts[4]; /* MDI[0..3] Pair Diagnostic Status */
} SK_GEPORT;
/*
- * Gigabit Ethernet Initalization Struct
+ * Gigabit Ethernet Initialization Struct
* (has to be included in the adapter context)
*/
typedef struct s_GeInit {
+ int GIChipId; /* Chip Identification Number */
+ int GIChipRev; /* Chip Revision Number */
+ SK_U8 GIPciHwRev; /* PCI HW Revision Number */
+ SK_BOOL GIGenesis; /* Genesis adapter ? */
+ SK_BOOL GIYukon; /* YUKON-A1/Bx chip */
+ SK_BOOL GIYukonLite; /* YUKON-Lite chip */
+ SK_BOOL GICopperType; /* Copper Type adapter ? */
+ SK_BOOL GIPciSlot64; /* 64-bit PCI Slot */
+ SK_BOOL GIPciClock66; /* 66 MHz PCI Clock */
+ SK_BOOL GIVauxAvail; /* VAUX available (YUKON) */
+ SK_BOOL GIYukon32Bit; /* 32-Bit YUKON adapter */
+ SK_U16 GILedBlinkCtrl; /* LED Blink Control */
int GIMacsFound; /* Number of MACs found on this adapter */
- int GIPciHwRev; /* PCI HW Revision Number */
- SK_U32 GIRamOffs; /* RAM Address Offset for addr calculation */
- int GIRamSize; /* The RAM size of the adapter in kB */
+ int GIMacType; /* MAC Type used on this adapter */
int GIHstClkFact; /* Host Clock Factor (62.5 / HstClk * 100) */
- int GIPortUsage; /* driver port usage: SK_RED_LINK/SK_MUL_LINK */
- SK_U32 GIPollTimerVal; /* Descriptor Poll Timer Init Val in clk ticks*/
- int GILevel; /* Initialization Level Completed */
+ int GIPortUsage; /* Driver Port Usage */
+ int GILevel; /* Initialization Level completed */
+ int GIRamSize; /* The RAM size of the adapter in kB */
+ int GIWolOffs; /* WOL Register Offset (HW-Bug in Rev. A) */
+ SK_U32 GIRamOffs; /* RAM Address Offset for addr calculation */
+ SK_U32 GIPollTimerVal; /* Descr. Poll Timer Init Val (HstClk ticks) */
+ SK_U32 GIValIrqMask; /* Value for Interrupt Mask */
+ SK_U32 GITimeStampCnt; /* Time Stamp High Counter (YUKON only) */
SK_GEPORT GP[SK_MAX_MACS];/* Port Dependent Information */
- SK_BOOL GIAnyPortAct; /* Is True if one or more port is initialized */
- SK_U8 Align01;
- SK_U16 Align02;
+ SK_GEMACFUNC GIFunc; /* MAC depedent functions */
} SK_GEINIT;
/*
- * Define the error numbers and messages for xmac_ii.c and skgeinit.c
+ * Error numbers and messages for skxmac2.c and skgeinit.c
*/
-#define SKERR_HWI_E001 (SK_ERRBASE_HWINIT)
-#define SKERR_HWI_E001MSG "SkXmClrExactAddr() has got illegal parameters"
-#define SKERR_HWI_E002 (SKERR_HWI_E001+1)
-#define SKERR_HWI_E002MSG "SkGeInit() Level 1 call missing"
-#define SKERR_HWI_E003 (SKERR_HWI_E002+1)
-#define SKERR_HWI_E003MSG "SkGeInit() called with illegal init Level"
-#define SKERR_HWI_E004 (SKERR_HWI_E003+1)
-#define SKERR_HWI_E004MSG "SkGeInitPort() Queue size illegal configured"
-#define SKERR_HWI_E005 (SKERR_HWI_E004+1)
-#define SKERR_HWI_E005MSG "SkGeInitPort() cannot init running ports"
-#define SKERR_HWI_E006 (SKERR_HWI_E005+1)
-#define SKERR_HWI_E006MSG "SkGeXmInit(): PState does not match HW state"
-#define SKERR_HWI_E007 (SKERR_HWI_E006+1)
-#define SKERR_HWI_E007MSG "SkXmInitDupMd() called with invalid Dup Mode"
-#define SKERR_HWI_E008 (SKERR_HWI_E007+1)
-#define SKERR_HWI_E008MSG "SkXmSetRxCmd() called with invalid Mode"
-#define SKERR_HWI_E009 (SKERR_HWI_E008+1)
-#define SKERR_HWI_E009MSG "SkGeCfgSync() called although PXSQSize zero"
-#define SKERR_HWI_E010 (SKERR_HWI_E009+1)
-#define SKERR_HWI_E010MSG "SkGeCfgSync() called with invalid parameters"
-#define SKERR_HWI_E011 (SKERR_HWI_E010+1)
-#define SKERR_HWI_E011MSG "SkGeInitPort() Receive Queue Size to small"
-#define SKERR_HWI_E012 (SKERR_HWI_E011+1)
-#define SKERR_HWI_E012MSG "SkGeInitPort() invalid Queue Size specified"
-#define SKERR_HWI_E013 (SKERR_HWI_E012+1)
-#define SKERR_HWI_E013MSG "SkGeInitPort() cfg changed for running queue"
-#define SKERR_HWI_E014 (SKERR_HWI_E013+1)
-#define SKERR_HWI_E014MSG "SkGeInitPort() unknown GIPortUsage specified"
-#define SKERR_HWI_E015 (SKERR_HWI_E014+1)
-#define SKERR_HWI_E015MSG "Illegal Link mode parameter"
-#define SKERR_HWI_E016 (SKERR_HWI_E015+1)
-#define SKERR_HWI_E016MSG "Illegal Flow control mode parameter"
-#define SKERR_HWI_E017 (SKERR_HWI_E016+1)
-#define SKERR_HWI_E017MSG "Illegal value specified for GIPollTimerVal"
-#define SKERR_HWI_E018 (SKERR_HWI_E017+1)
-#define SKERR_HWI_E018MSG "FATAL: SkGeStopPort() does not terminate"
-#define SKERR_HWI_E019 (SKERR_HWI_E018+1)
-#define SKERR_HWI_E019MSG ""
+
+#define SKERR_HWI_E001 (SK_ERRBASE_HWINIT)
+#define SKERR_HWI_E001MSG "SkXmClrExactAddr() has got invalid parameters"
+#define SKERR_HWI_E002 (SKERR_HWI_E001+1)
+#define SKERR_HWI_E002MSG "SkGeInit(): Level 1 call missing"
+#define SKERR_HWI_E003 (SKERR_HWI_E002+1)
+#define SKERR_HWI_E003MSG "SkGeInit() called with invalid init Level"
+#define SKERR_HWI_E004 (SKERR_HWI_E003+1)
+#define SKERR_HWI_E004MSG "SkGeInitPort(): Queue Size invalid configured"
+#define SKERR_HWI_E005 (SKERR_HWI_E004+1)
+#define SKERR_HWI_E005MSG "SkGeInitPort(): cannot init running ports"
+#define SKERR_HWI_E006 (SKERR_HWI_E005+1)
+#define SKERR_HWI_E006MSG "SkGeMacInit(): PState does not match HW state"
+#define SKERR_HWI_E007 (SKERR_HWI_E006+1)
+#define SKERR_HWI_E007MSG "SkXmInitDupMd() called with invalid Dup Mode"
+#define SKERR_HWI_E008 (SKERR_HWI_E007+1)
+#define SKERR_HWI_E008MSG "SkXmSetRxCmd() called with invalid Mode"
+#define SKERR_HWI_E009 (SKERR_HWI_E008+1)
+#define SKERR_HWI_E009MSG "SkGeCfgSync() called although PXSQSize zero"
+#define SKERR_HWI_E010 (SKERR_HWI_E009+1)
+#define SKERR_HWI_E010MSG "SkGeCfgSync() called with invalid parameters"
+#define SKERR_HWI_E011 (SKERR_HWI_E010+1)
+#define SKERR_HWI_E011MSG "SkGeInitPort(): Receive Queue Size too small"
+#define SKERR_HWI_E012 (SKERR_HWI_E011+1)
+#define SKERR_HWI_E012MSG "SkGeInitPort(): invalid Queue Size specified"
+#define SKERR_HWI_E013 (SKERR_HWI_E012+1)
+#define SKERR_HWI_E013MSG "SkGeInitPort(): cfg changed for running queue"
+#define SKERR_HWI_E014 (SKERR_HWI_E013+1)
+#define SKERR_HWI_E014MSG "SkGeInitPort(): unknown GIPortUsage specified"
+#define SKERR_HWI_E015 (SKERR_HWI_E014+1)
+#define SKERR_HWI_E015MSG "Invalid Link mode parameter"
+#define SKERR_HWI_E016 (SKERR_HWI_E015+1)
+#define SKERR_HWI_E016MSG "Invalid Flow control mode parameter"
+#define SKERR_HWI_E017 (SKERR_HWI_E016+1)
+#define SKERR_HWI_E017MSG "Invalid value specified for GIPollTimerVal"
+#define SKERR_HWI_E018 (SKERR_HWI_E017+1)
+#define SKERR_HWI_E018MSG "FATAL: SkGeStopPort() does not terminate (Tx)"
+#define SKERR_HWI_E019 (SKERR_HWI_E018+1)
+#define SKERR_HWI_E019MSG "Invalid Speed parameter"
+#define SKERR_HWI_E020 (SKERR_HWI_E019+1)
+#define SKERR_HWI_E020MSG "Invalid Master/Slave parameter"
+#define SKERR_HWI_E021 (SKERR_HWI_E020+1)
+#define SKERR_HWI_E021MSG "MacUpdateStats(): cannot update statistic counter"
+#define SKERR_HWI_E022 (SKERR_HWI_E021+1)
+#define SKERR_HWI_E022MSG "MacStatistic(): invalid statistic base address"
+#define SKERR_HWI_E023 (SKERR_HWI_E022+1)
+#define SKERR_HWI_E023MSG "SkGeInitPort(): Transmit Queue Size too small"
+#define SKERR_HWI_E024 (SKERR_HWI_E023+1)
+#define SKERR_HWI_E024MSG "FATAL: SkGeStopPort() does not terminate (Rx)"
+#define SKERR_HWI_E025 (SKERR_HWI_E024+1)
+#define SKERR_HWI_E025MSG ""
/* function prototypes ********************************************************/
@@ -588,146 +782,301 @@
* public functions in skgeinit.c
*/
extern void SkGePollRxD(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_BOOL PollRxD);
+ SK_BOOL PollRxD);
extern void SkGePollTxD(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_BOOL PollTxD);
+ SK_BOOL PollTxD);
extern void SkGeYellowLED(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int State);
extern int SkGeCfgSync(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_U32 IntTime,
- SK_U32 LimCount,
+ SK_U32 IntTime,
+ SK_U32 LimCount,
int SyncMode);
extern void SkGeLoadLnkSyncCnt(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_U32 CntVal);
+ SK_U32 CntVal);
extern void SkGeStopPort(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
int Dir,
int RstMode);
extern int SkGeInit(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Level);
extern void SkGeDeInit(
- SK_AC *pAC,
- SK_IOC IoC);
+ SK_AC *pAC,
+ SK_IOC IoC);
extern int SkGeInitPort(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
extern void SkGeXmitLED(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Led,
int Mode);
extern void SkGeInitRamIface(
- SK_AC *pAC,
- SK_IOC IoC);
+ SK_AC *pAC,
+ SK_IOC IoC);
+
+extern int SkGeInitAssignRamToQueues(
+ SK_AC *pAC,
+ int ActivePort,
+ SK_BOOL DualNet);
/*
* public functions in skxmac2.c
*/
-extern void SkXmSetRxCmd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Mode);
+extern void SkMacRxTxDisable(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port);
-extern void SkXmClrExactAddr(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacSoftRst(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port);
+
+extern void SkMacHardRst(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port);
+
+extern void SkXmInitMac(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port);
+
+extern void SkGmInitMac(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port);
+
+extern void SkMacInitPhy(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- int StartNum,
- int StopNum);
+ SK_BOOL DoLoop);
-extern void SkXmFlushTxFifo(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacIrqDisable(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern void SkXmFlushRxFifo(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacFlushTxFifo(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern void SkXmSoftRst(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacFlushRxFifo(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern void SkXmHardRst(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacIrq(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern void SkXmInitMac(
- SK_AC *pAC,
- SK_IOC IoC,
+extern int SkMacAutoNegDone(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern void SkXmInitDupMd(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacAutoNegLipaPhy(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ SK_U16 IStatus);
+
+extern void SkMacSetRxTxEn(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int Para);
+
+extern int SkMacRxTxEnable(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern void SkXmInitPauseMd(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkMacPromiscMode(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ SK_BOOL Enable);
+
+extern void SkMacHashing(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ SK_BOOL Enable);
+
+extern void SkXmPhyRead(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int Addr,
+ SK_U16 SK_FAR *pVal);
+
+extern void SkXmPhyWrite(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int Addr,
+ SK_U16 Val);
+
+extern void SkGmPhyRead(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int Addr,
+ SK_U16 SK_FAR *pVal);
+
+extern void SkGmPhyWrite(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int Addr,
+ SK_U16 Val);
+
+extern void SkXmClrExactAddr(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int StartNum,
+ int StopNum);
+
+extern void SkXmInitDupMd(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
-extern int SkXmAutoNegDone(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkXmInitPauseMd(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port);
extern void SkXmAutoNegLipaXmac(
- SK_AC *pAC,
- SK_IOC IoC,
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_U16 IStatus);
+ SK_U16 IStatus);
-extern void SkXmAutoNegLipaBcom(
- SK_AC *pAC,
- SK_IOC IoC,
+extern int SkXmUpdateStats(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port);
+
+extern int SkGmUpdateStats(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port);
+
+extern int SkXmMacStatistic(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port,
+ SK_U16 StatAddr,
+ SK_U32 SK_FAR *pVal);
+
+extern int SkGmMacStatistic(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port,
+ SK_U16 StatAddr,
+ SK_U32 SK_FAR *pVal);
+
+extern int SkXmResetCounter(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port);
+
+extern int SkGmResetCounter(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port);
+
+extern int SkXmOverflowStatus(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port,
+ SK_U16 IStatus,
+ SK_U64 SK_FAR *pStatus);
+
+extern int SkGmOverflowStatus(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ unsigned int Port,
+ SK_U16 MacStatus,
+ SK_U64 SK_FAR *pStatus);
+
+extern int SkGmCableDiagStatus(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_U16 IStatus);
+ SK_BOOL StartTest);
-extern void SkXmAutoNegLipaLone(
- SK_AC *pAC,
- SK_IOC IoC,
+#ifdef SK_DIAG
+extern void SkGePhyRead(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_U16 IStatus);
+ int Addr,
+ SK_U16 *pVal);
-extern void SkXmIrq(
- SK_AC *pAC,
- SK_IOC IoC,
+extern void SkGePhyWrite(
+ SK_AC *pAC,
+ SK_IOC IoC,
int Port,
- SK_U16 IStatus);
+ int Addr,
+ SK_U16 Val);
+
+extern void SkMacSetRxCmd(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ int Mode);
+extern void SkMacCrcGener(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ SK_BOOL Enable);
+extern void SkMacTimeStamp(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ SK_BOOL Enable);
+extern void SkXmSendCont(
+ SK_AC *pAC,
+ SK_IOC IoC,
+ int Port,
+ SK_BOOL Enable);
+#endif /* SK_DIAG */
#else /* SK_KR_PROTO */
@@ -745,22 +1094,53 @@
extern int SkGeInitPort();
extern void SkGeXmitLED();
extern void SkGeInitRamIface();
+extern int SkGeInitAssignRamToQueues();
/*
* public functions in skxmac2.c
*/
-extern void SkXmSetRxCmd();
-extern void SkXmClrExactAddr();
-extern void SkXmFlushTxFifo();
-extern void SkXmFlushRxFifo();
-extern void SkXmSoftRst();
-extern void SkXmHardRst();
+extern void SkMacRxTxDisable();
+extern void SkMacSoftRst();
+extern void SkMacHardRst();
+extern void SkMacInitPhy();
+extern int SkMacRxTxEnable();
+extern void SkMacPromiscMode();
+extern void SkMacHashing();
+extern void SkMacIrqDisable();
+extern void SkMacFlushTxFifo();
+extern void SkMacFlushRxFifo();
+extern void SkMacIrq();
+extern int SkMacAutoNegDone();
+extern void SkMacAutoNegLipaPhy();
+extern void SkMacSetRxTxEn();
extern void SkXmInitMac();
+extern void SkXmPhyRead();
+extern void SkXmPhyWrite();
+extern void SkGmInitMac();
+extern void SkGmPhyRead();
+extern void SkGmPhyWrite();
+extern void SkXmClrExactAddr();
extern void SkXmInitDupMd();
extern void SkXmInitPauseMd();
-extern int SkXmAutoNegDone();
-extern void SkXmAutoNegLipa();
-extern void SkXmIrq();
+extern void SkXmAutoNegLipaXmac();
+extern int SkXmUpdateStats();
+extern int SkGmUpdateStats();
+extern int SkXmMacStatistic();
+extern int SkGmMacStatistic();
+extern int SkXmResetCounter();
+extern int SkGmResetCounter();
+extern int SkXmOverflowStatus();
+extern int SkGmOverflowStatus();
+extern int SkGmCableDiagStatus();
+
+#ifdef SK_DIAG
+extern void SkGePhyRead();
+extern void SkGePhyWrite();
+extern void SkMacSetRxCmd();
+extern void SkMacCrcGener();
+extern void SkMacTimeStamp();
+extern void SkXmSendCont();
+#endif /* SK_DIAG */
#endif /* SK_KR_PROTO */
diff -Nru a/drivers/net/sk98lin/h/skgepnm2.h b/drivers/net/sk98lin/h/skgepnm2.h
--- a/drivers/net/sk98lin/h/skgepnm2.h Sun Aug 3 13:14:50 2003
+++ b/drivers/net/sk98lin/h/skgepnm2.h Sun Aug 3 13:14:50 2003
@@ -2,15 +2,16 @@
*
* Name: skgepnm2.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.30 $
- * Date: $Date: 2001/02/06 10:03:41 $
+ * Version: $Revision: 1.36 $
+ * Date: $Date: 2003/05/23 12:45:13 $
* Purpose: Defines for Private Network Management Interface
*
****************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,28 @@
* History:
*
* $Log: skgepnm2.h,v $
+ * Revision 1.36 2003/05/23 12:45:13 tschilli
+ * #ifndef SK_PNMI_HUNDREDS_SEC added to SK_PNMI_HUNDREDS_SEC definition
+ * to allow own time macro defines.
+ *
+ * Revision 1.35 2003/03/27 11:27:48 tschilli
+ * Copyright messages changed.
+ *
+ * Revision 1.34 2002/12/16 09:05:18 tschilli
+ * Code for VCT handling added.
+ *
+ * Revision 1.33 2002/09/10 09:00:03 rwahl
+ * Adapted boolean definitions according sktypes.
+ *
+ * Revision 1.32 2002/08/09 09:47:01 rwahl
+ * Added write-only flag to oid access defines.
+ * Editorial changes.
+ *
+ * Revision 1.31 2002/07/17 19:23:18 rwahl
+ * - Replaced MAC counter definitions by enumeration.
+ * - Added definition SK_PNMI_MAC_TYPES.
+ * - Added chipset defnition for Yukon.
+ *
* Revision 1.30 2001/02/06 10:03:41 mkunz
* - Pnmi V4 dual net support added. Interface functions and macros extended
* - Vpd bug fixed
@@ -140,26 +163,19 @@
#ifndef _SKGEPNM2_H_
#define _SKGEPNM2_H_
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE !(FALSE)
-#endif
-
/*
* General definitions
*/
-#define SK_PNMI_CHIPSET 1 /* XMAC11800FP */
+#define SK_PNMI_CHIPSET_XMAC 1 /* XMAC11800FP */
+#define SK_PNMI_CHIPSET_YUKON 2 /* YUKON */
#define SK_PNMI_BUS_PCI 1 /* PCI bus*/
/*
* Actions
*/
-#define SK_PNMI_ACT_IDLE 1
-#define SK_PNMI_ACT_RESET 2
+#define SK_PNMI_ACT_IDLE 1
+#define SK_PNMI_ACT_RESET 2
#define SK_PNMI_ACT_SELFTEST 3
#define SK_PNMI_ACT_RESETCNT 4
@@ -170,13 +186,13 @@
#define SK_PNMI_VPD_RW 1
#define SK_PNMI_VPD_RO 2
-#define SK_PNMI_VPD_OK 0
+#define SK_PNMI_VPD_OK 0
#define SK_PNMI_VPD_NOTFOUND 1
-#define SK_PNMI_VPD_CUT 2
-#define SK_PNMI_VPD_TIMEOUT 3
-#define SK_PNMI_VPD_FULL 4
-#define SK_PNMI_VPD_NOWRITE 5
-#define SK_PNMI_VPD_FATAL 6
+#define SK_PNMI_VPD_CUT 2
+#define SK_PNMI_VPD_TIMEOUT 3
+#define SK_PNMI_VPD_FULL 4
+#define SK_PNMI_VPD_NOWRITE 5
+#define SK_PNMI_VPD_FATAL 6
#define SK_PNMI_VPD_IGNORE 0
#define SK_PNMI_VPD_CREATE 1
@@ -188,124 +204,137 @@
*/
#define SK_PNMI_DEF_RLMT_CHG_THRES 240 /* 4 changes per minute */
+
+/*
+ * VCT internal status values
+ */
+#define SK_PNMI_VCT_PENDING 32
+#define SK_PNMI_VCT_TEST_DONE 64
+#define SK_PNMI_VCT_LINK 128
+
/*
* Internal table definitions
*/
#define SK_PNMI_GET 0
-#define SK_PNMI_PRESET 1
+#define SK_PNMI_PRESET 1
#define SK_PNMI_SET 2
#define SK_PNMI_RO 0
#define SK_PNMI_RW 1
+#define SK_PNMI_WO 2
typedef struct s_OidTabEntry {
- SK_U32 Id;
- SK_U32 InstanceNo;
+ SK_U32 Id;
+ SK_U32 InstanceNo;
unsigned int StructSize;
unsigned int Offset;
- int Access;
- int (* Func)(SK_AC *pAc, SK_IOC pIo, int action,
- SK_U32 Id, char* pBuf, unsigned int* pLen,
- SK_U32 Instance, unsigned int TableIndex,
- SK_U32 NetNumber);
- SK_U16 Param;
+ int Access;
+ int (* Func)(SK_AC *pAc, SK_IOC pIo, int action,
+ SK_U32 Id, char* pBuf, unsigned int* pLen,
+ SK_U32 Instance, unsigned int TableIndex,
+ SK_U32 NetNumber);
+ SK_U16 Param;
} SK_PNMI_TAB_ENTRY;
/*
* Trap lengths
*/
-#define SK_PNMI_TRAP_SIMPLE_LEN 17
+#define SK_PNMI_TRAP_SIMPLE_LEN 17
#define SK_PNMI_TRAP_SENSOR_LEN_BASE 46
#define SK_PNMI_TRAP_RLMT_CHANGE_LEN 23
-#define SK_PNMI_TRAP_RLMT_PORT_LEN 23
-
+#define SK_PNMI_TRAP_RLMT_PORT_LEN 23
/*
- * MAC statistic data structures
- * Only for the first 64 counters: the number relates to the bit in the
- * XMAC overflow status register
- */
-#define SK_PNMI_HTX 0
-#define SK_PNMI_HTX_OCTET 1
-#define SK_PNMI_HTX_OCTETHIGH 1
-#define SK_PNMI_HTX_OCTETLOW 2
-#define SK_PNMI_HTX_BROADCAST 3
-#define SK_PNMI_HTX_MULTICAST 4
-#define SK_PNMI_HTX_UNICAST 5
-#define SK_PNMI_HTX_LONGFRAMES 6
-#define SK_PNMI_HTX_BURST 7
-#define SK_PNMI_HTX_PMACC 8
-#define SK_PNMI_HTX_MACC 9
-#define SK_PNMI_HTX_SINGLE_COL 10
-#define SK_PNMI_HTX_MULTI_COL 11
-#define SK_PNMI_HTX_EXCESS_COL 12
-#define SK_PNMI_HTX_LATE_COL 13
-#define SK_PNMI_HTX_DEFFERAL 14
-#define SK_PNMI_HTX_EXCESS_DEF 15
-#define SK_PNMI_HTX_UNDERRUN 16
-#define SK_PNMI_HTX_CARRIER 17
-#define SK_PNMI_HTX_UTILUNDER 18
-#define SK_PNMI_HTX_UTILOVER 19
-#define SK_PNMI_HTX_64 20
-#define SK_PNMI_HTX_127 21
-#define SK_PNMI_HTX_255 22
-#define SK_PNMI_HTX_511 23
-#define SK_PNMI_HTX_1023 24
-#define SK_PNMI_HTX_MAX 25
-#define SK_PNMI_HTX_RESERVED26 26
-#define SK_PNMI_HTX_RESERVED27 27
-#define SK_PNMI_HTX_RESERVED28 28
-#define SK_PNMI_HTX_RESERVED29 29
-#define SK_PNMI_HTX_RESERVED30 30
-#define SK_PNMI_HTX_RESERVED31 31
-#define SK_PNMI_HRX (32 + 0)
-#define SK_PNMI_HRX_OCTET (32 + 1)
-#define SK_PNMI_HRX_OCTETHIGH (32 + 1)
-#define SK_PNMI_HRX_OCTETLOW (32 + 2)
-#define SK_PNMI_HRX_BROADCAST (32 + 3)
-#define SK_PNMI_HRX_MULTICAST (32 + 4)
-#define SK_PNMI_HRX_UNICAST (32 + 5)
-#define SK_PNMI_HRX_PMACC (32 + 6)
-#define SK_PNMI_HRX_MACC (32 + 7)
-#define SK_PNMI_HRX_PMACC_ERR (32 + 8)
-#define SK_PNMI_HRX_MACC_UNKWN (32 + 9)
-#define SK_PNMI_HRX_BURST (32 + 10)
-#define SK_PNMI_HRX_MISSED (32 + 11)
-#define SK_PNMI_HRX_FRAMING (32 + 12)
-#define SK_PNMI_HRX_OVERFLOW (32 + 13)
-#define SK_PNMI_HRX_JABBER (32 + 14)
-#define SK_PNMI_HRX_CARRIER (32 + 15)
-#define SK_PNMI_HRX_IRLENGTH (32 + 16)
-#define SK_PNMI_HRX_SYMBOL (32 + 17)
-#define SK_PNMI_HRX_SHORTS (32 + 18)
-#define SK_PNMI_HRX_RUNT (32 + 19)
-#define SK_PNMI_HRX_TOO_LONG (32 + 20)
-#define SK_PNMI_HRX_FCS (32 + 21)
-#define SK_PNMI_HRX_RESERVED22 (32 + 22)
-#define SK_PNMI_HRX_CEXT (32 + 23)
-#define SK_PNMI_HRX_UTILUNDER (32 + 24)
-#define SK_PNMI_HRX_UTILOVER (32 + 25)
-#define SK_PNMI_HRX_64 (32 + 26)
-#define SK_PNMI_HRX_127 (32 + 27)
-#define SK_PNMI_HRX_255 (32 + 28)
-#define SK_PNMI_HRX_511 (32 + 29)
-#define SK_PNMI_HRX_1023 (32 + 30)
-#define SK_PNMI_HRX_MAX (32 + 31)
-
-#define SK_PNMI_HTX_SYNC 64
-#define SK_PNMI_HTX_SYNC_OCTET 65
-
-#define SK_PNMI_HRX_LONGFRAMES 66
+ * Number of MAC types supported
+ */
+#define SK_PNMI_MAC_TYPES (SK_MAC_GMAC + 1)
-#define SK_PNMI_MAX_IDX (SK_PNMI_CNT_NO)
+/*
+ * MAC statistic data list (overall set for MAC types used)
+ */
+enum SK_MACSTATS {
+ SK_PNMI_HTX = 0,
+ SK_PNMI_HTX_OCTET,
+ SK_PNMI_HTX_OCTETHIGH = SK_PNMI_HTX_OCTET,
+ SK_PNMI_HTX_OCTETLOW,
+ SK_PNMI_HTX_BROADCAST,
+ SK_PNMI_HTX_MULTICAST,
+ SK_PNMI_HTX_UNICAST,
+ SK_PNMI_HTX_BURST,
+ SK_PNMI_HTX_PMACC,
+ SK_PNMI_HTX_MACC,
+ SK_PNMI_HTX_COL,
+ SK_PNMI_HTX_SINGLE_COL,
+ SK_PNMI_HTX_MULTI_COL,
+ SK_PNMI_HTX_EXCESS_COL,
+ SK_PNMI_HTX_LATE_COL,
+ SK_PNMI_HTX_DEFFERAL,
+ SK_PNMI_HTX_EXCESS_DEF,
+ SK_PNMI_HTX_UNDERRUN,
+ SK_PNMI_HTX_CARRIER,
+ SK_PNMI_HTX_UTILUNDER,
+ SK_PNMI_HTX_UTILOVER,
+ SK_PNMI_HTX_64,
+ SK_PNMI_HTX_127,
+ SK_PNMI_HTX_255,
+ SK_PNMI_HTX_511,
+ SK_PNMI_HTX_1023,
+ SK_PNMI_HTX_MAX,
+ SK_PNMI_HTX_LONGFRAMES,
+ SK_PNMI_HTX_SYNC,
+ SK_PNMI_HTX_SYNC_OCTET,
+ SK_PNMI_HTX_RESERVED,
+
+ SK_PNMI_HRX,
+ SK_PNMI_HRX_OCTET,
+ SK_PNMI_HRX_OCTETHIGH = SK_PNMI_HRX_OCTET,
+ SK_PNMI_HRX_OCTETLOW,
+ SK_PNMI_HRX_BADOCTET,
+ SK_PNMI_HRX_BADOCTETHIGH = SK_PNMI_HRX_BADOCTET,
+ SK_PNMI_HRX_BADOCTETLOW,
+ SK_PNMI_HRX_BROADCAST,
+ SK_PNMI_HRX_MULTICAST,
+ SK_PNMI_HRX_UNICAST,
+ SK_PNMI_HRX_PMACC,
+ SK_PNMI_HRX_MACC,
+ SK_PNMI_HRX_PMACC_ERR,
+ SK_PNMI_HRX_MACC_UNKWN,
+ SK_PNMI_HRX_BURST,
+ SK_PNMI_HRX_MISSED,
+ SK_PNMI_HRX_FRAMING,
+ SK_PNMI_HRX_UNDERSIZE,
+ SK_PNMI_HRX_OVERFLOW,
+ SK_PNMI_HRX_JABBER,
+ SK_PNMI_HRX_CARRIER,
+ SK_PNMI_HRX_IRLENGTH,
+ SK_PNMI_HRX_SYMBOL,
+ SK_PNMI_HRX_SHORTS,
+ SK_PNMI_HRX_RUNT,
+ SK_PNMI_HRX_TOO_LONG,
+ SK_PNMI_HRX_FCS,
+ SK_PNMI_HRX_CEXT,
+ SK_PNMI_HRX_UTILUNDER,
+ SK_PNMI_HRX_UTILOVER,
+ SK_PNMI_HRX_64,
+ SK_PNMI_HRX_127,
+ SK_PNMI_HRX_255,
+ SK_PNMI_HRX_511,
+ SK_PNMI_HRX_1023,
+ SK_PNMI_HRX_MAX,
+ SK_PNMI_HRX_LONGFRAMES,
+
+ SK_PNMI_HRX_RESERVED,
+
+ SK_PNMI_MAX_IDX /* NOTE: Ensure SK_PNMI_CNT_NO is set to this value */
+};
/*
* MAC specific data
*/
typedef struct s_PnmiStatAddr {
- SK_BOOL GetOffset; /* TRUE: Call GetStatVal function */
- SK_U16 Param; /* XMAC register containing value */
+ SK_U16 Reg; /* MAC register containing the value */
+ SK_BOOL GetOffset; /* TRUE: Offset managed by PNMI (call GetStatVal())*/
} SK_PNMI_STATADDR;
@@ -338,11 +367,13 @@
/*
* Time macros
*/
+#ifndef SK_PNMI_HUNDREDS_SEC
#if SK_TICKS_PER_SEC == 100
#define SK_PNMI_HUNDREDS_SEC(t) (t)
#else
-#define SK_PNMI_HUNDREDS_SEC(t) ((((long)t) * 100) / (SK_TICKS_PER_SEC))
-#endif
+#define SK_PNMI_HUNDREDS_SEC(t) (((t) * 100) / (SK_TICKS_PER_SEC))
+#endif /* !SK_TICKS_PER_SEC */
+#endif /* !SK_PNMI_HUNDREDS_SEC */
/*
* Macros to work around alignment problems
diff -Nru a/drivers/net/sk98lin/h/skgepnmi.h b/drivers/net/sk98lin/h/skgepnmi.h
--- a/drivers/net/sk98lin/h/skgepnmi.h Sun Aug 3 13:14:45 2003
+++ b/drivers/net/sk98lin/h/skgepnmi.h Sun Aug 3 13:14:45 2003
@@ -2,15 +2,16 @@
*
* Name: skgepnmi.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.48 $
- * Date: $Date: 2001/02/23 14:34:24 $
+ * Version: $Revision: 1.61 $
+ * Date: $Date: 2003/05/23 12:53:52 $
* Purpose: Defines for Private Network Management Interface
*
****************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,53 @@
* History:
*
* $Log: skgepnmi.h,v $
+ * Revision 1.61 2003/05/23 12:53:52 tschilli
+ * Generic PNMI IOCTL subcommands added.
+ * Function prototype SkPnmiGenIoctl() added.
+ * OID_SKGE_BOARDLEVEL added.
+ * Return value SK_PNMI_ERR_NOT_SUPPORTED added.
+ * Editorial changes.
+ *
+ * Revision 1.60 2003/03/27 11:27:26 tschilli
+ * Copyright messages changed.
+ *
+ * Revision 1.59 2002/12/16 14:03:50 tschilli
+ * New defines for VCT added.
+ *
+ * Revision 1.58 2002/12/16 09:04:59 tschilli
+ * Code for VCT handling added.
+ *
+ * Revision 1.57 2002/09/26 12:41:05 tschilli
+ * SK_PNMI_PORT BufPort entry in struct SK_PNMI added.
+ *
+ * Revision 1.56 2002/08/16 11:10:41 rwahl
+ * - Replaced c++ comment.
+ *
+ * Revision 1.55 2002/08/09 15:40:21 rwahl
+ * Editorial change (renamed ConfSpeedCap).
+ *
+ * Revision 1.54 2002/08/09 11:06:07 rwahl
+ * Added OID_SKGE_SPEED_CAP.
+ *
+ * Revision 1.53 2002/08/09 09:45:28 rwahl
+ * Added support for NDIS OID_PNP_xxx.
+ * Editorial changes.
+ *
+ * Revision 1.52 2002/08/06 17:54:07 rwahl
+ * - Added speed cap to PNMI config struct.
+ *
+ * Revision 1.51 2002/07/17 19:19:26 rwahl
+ * - Added OID_SKGE_SPEED_MODE and OID_SKGE_SPEED_STATUS.
+ * - Added SK_PNMI_CNT_RX_PMACC_ERR() & SK_PNMI_CNT_RX_LONGFRAMES().
+ * - Added speed mode & status to PNMI config struct.
+ * - Editorial changes.
+ *
+ * Revision 1.50 2002/05/22 08:59:37 rwahl
+ * Added string definitions for error msgs.
+ *
+ * Revision 1.49 2001/11/20 09:23:50 rwahl
+ * - pnmi struct: reordered and aligned to 32bit.
+ *
* Revision 1.48 2001/02/23 14:34:24 mkunz
* Changed macro PHYS2INST. Added pAC to Interface
*
@@ -233,18 +281,21 @@
#define SK_PNMI_EVT_RLMT_ACTIVE_UP 15 /* Port came logically up */
#define SK_PNMI_EVT_RLMT_SET_NETS 16 /* 1. Parameter is number of nets
1 = single net; 2 = dual net */
+#define SK_PNMI_EVT_VCT_RESET 17 /* VCT port reset timer event started with SET. */
+
/*
* Return values
*/
-#define SK_PNMI_ERR_OK 0
-#define SK_PNMI_ERR_GENERAL 1
+#define SK_PNMI_ERR_OK 0
+#define SK_PNMI_ERR_GENERAL 1
#define SK_PNMI_ERR_TOO_SHORT 2
#define SK_PNMI_ERR_BAD_VALUE 3
#define SK_PNMI_ERR_READ_ONLY 4
#define SK_PNMI_ERR_UNKNOWN_OID 5
#define SK_PNMI_ERR_UNKNOWN_INST 6
#define SK_PNMI_ERR_UNKNOWN_NET 7
+#define SK_PNMI_ERR_NOT_SUPPORTED 10
/*
@@ -290,11 +341,11 @@
*/
#ifndef _NDIS_ /* Check, whether NDIS already included OIDs */
-#define OID_GEN_XMIT_OK 0x00020101
-#define OID_GEN_RCV_OK 0x00020102
-#define OID_GEN_XMIT_ERROR 0x00020103
-#define OID_GEN_RCV_ERROR 0x00020104
-#define OID_GEN_RCV_NO_BUFFER 0x00020105
+#define OID_GEN_XMIT_OK 0x00020101
+#define OID_GEN_RCV_OK 0x00020102
+#define OID_GEN_XMIT_ERROR 0x00020103
+#define OID_GEN_RCV_ERROR 0x00020104
+#define OID_GEN_RCV_NO_BUFFER 0x00020105
/* #define OID_GEN_DIRECTED_BYTES_XMIT 0x00020201 */
#define OID_GEN_DIRECTED_FRAMES_XMIT 0x00020202
@@ -303,215 +354,278 @@
/* #define OID_GEN_BROADCAST_BYTES_XMIT 0x00020205 */
#define OID_GEN_BROADCAST_FRAMES_XMIT 0x00020206
/* #define OID_GEN_DIRECTED_BYTES_RCV 0x00020207 */
-#define OID_GEN_DIRECTED_FRAMES_RCV 0x00020208
+#define OID_GEN_DIRECTED_FRAMES_RCV 0x00020208
/* #define OID_GEN_MULTICAST_BYTES_RCV 0x00020209 */
#define OID_GEN_MULTICAST_FRAMES_RCV 0x0002020A
/* #define OID_GEN_BROADCAST_BYTES_RCV 0x0002020B */
#define OID_GEN_BROADCAST_FRAMES_RCV 0x0002020C
-#define OID_GEN_RCV_CRC_ERROR 0x0002020D
+#define OID_GEN_RCV_CRC_ERROR 0x0002020D
#define OID_GEN_TRANSMIT_QUEUE_LENGTH 0x0002020E
-#define OID_802_3_PERMANENT_ADDRESS 0x01010101
-#define OID_802_3_CURRENT_ADDRESS 0x01010102
-/* #define OID_802_3_MULTICAST_LIST 0x01010103 */
+#define OID_802_3_PERMANENT_ADDRESS 0x01010101
+#define OID_802_3_CURRENT_ADDRESS 0x01010102
+/* #define OID_802_3_MULTICAST_LIST 0x01010103 */
/* #define OID_802_3_MAXIMUM_LIST_SIZE 0x01010104 */
-/* #define OID_802_3_MAC_OPTIONS 0x01010105 */
+/* #define OID_802_3_MAC_OPTIONS 0x01010105 */
#define OID_802_3_RCV_ERROR_ALIGNMENT 0x01020101
#define OID_802_3_XMIT_ONE_COLLISION 0x01020102
#define OID_802_3_XMIT_MORE_COLLISIONS 0x01020103
-#define OID_802_3_XMIT_DEFERRED 0x01020201
+#define OID_802_3_XMIT_DEFERRED 0x01020201
#define OID_802_3_XMIT_MAX_COLLISIONS 0x01020202
-#define OID_802_3_RCV_OVERRUN 0x01020203
-#define OID_802_3_XMIT_UNDERRUN 0x01020204
+#define OID_802_3_RCV_OVERRUN 0x01020203
+#define OID_802_3_XMIT_UNDERRUN 0x01020204
#define OID_802_3_XMIT_TIMES_CRS_LOST 0x01020206
#define OID_802_3_XMIT_LATE_COLLISIONS 0x01020207
+/*
+ * PnP and PM OIDs
+ */
+#ifdef SK_POWER_MGMT
+#define OID_PNP_CAPABILITIES 0xFD010100
+#define OID_PNP_SET_POWER 0xFD010101
+#define OID_PNP_QUERY_POWER 0xFD010102
+#define OID_PNP_ADD_WAKE_UP_PATTERN 0xFD010103
+#define OID_PNP_REMOVE_WAKE_UP_PATTERN 0xFD010104
+#define OID_PNP_ENABLE_WAKE_UP 0xFD010106
+#endif /* SK_POWER_MGMT */
+
#endif /* _NDIS_ */
-#define OID_SKGE_MDB_VERSION 0xFF010100
-#define OID_SKGE_SUPPORTED_LIST 0xFF010101
-#define OID_SKGE_VPD_FREE_BYTES 0xFF010102
-#define OID_SKGE_VPD_ENTRIES_LIST 0xFF010103
-#define OID_SKGE_VPD_ENTRIES_NUMBER 0xFF010104
-#define OID_SKGE_VPD_KEY 0xFF010105
-#define OID_SKGE_VPD_VALUE 0xFF010106
-#define OID_SKGE_VPD_ACCESS 0xFF010107
-#define OID_SKGE_VPD_ACTION 0xFF010108
+#define OID_SKGE_MDB_VERSION 0xFF010100
+#define OID_SKGE_SUPPORTED_LIST 0xFF010101
+#define OID_SKGE_VPD_FREE_BYTES 0xFF010102
+#define OID_SKGE_VPD_ENTRIES_LIST 0xFF010103
+#define OID_SKGE_VPD_ENTRIES_NUMBER 0xFF010104
+#define OID_SKGE_VPD_KEY 0xFF010105
+#define OID_SKGE_VPD_VALUE 0xFF010106
+#define OID_SKGE_VPD_ACCESS 0xFF010107
+#define OID_SKGE_VPD_ACTION 0xFF010108
-#define OID_SKGE_PORT_NUMBER 0xFF010110
-#define OID_SKGE_DEVICE_TYPE 0xFF010111
-#define OID_SKGE_DRIVER_DESCR 0xFF010112
-#define OID_SKGE_DRIVER_VERSION 0xFF010113
-#define OID_SKGE_HW_DESCR 0xFF010114
-#define OID_SKGE_HW_VERSION 0xFF010115
-#define OID_SKGE_CHIPSET 0xFF010116
-#define OID_SKGE_ACTION 0xFF010117
-#define OID_SKGE_RESULT 0xFF010118
-#define OID_SKGE_BUS_TYPE 0xFF010119
-#define OID_SKGE_BUS_SPEED 0xFF01011A
-#define OID_SKGE_BUS_WIDTH 0xFF01011B
-
-/*#define OID_SKGE_MULTICAST_LIST 0xFF01011C*/
-
-#define OID_SKGE_SENSOR_NUMBER 0xFF020100
-#define OID_SKGE_SENSOR_INDEX 0xFF020101
-#define OID_SKGE_SENSOR_DESCR 0xFF020102
-#define OID_SKGE_SENSOR_TYPE 0xFF020103
-#define OID_SKGE_SENSOR_VALUE 0xFF020104
+#define OID_SKGE_PORT_NUMBER 0xFF010110
+#define OID_SKGE_DEVICE_TYPE 0xFF010111
+#define OID_SKGE_DRIVER_DESCR 0xFF010112
+#define OID_SKGE_DRIVER_VERSION 0xFF010113
+#define OID_SKGE_HW_DESCR 0xFF010114
+#define OID_SKGE_HW_VERSION 0xFF010115
+#define OID_SKGE_CHIPSET 0xFF010116
+#define OID_SKGE_ACTION 0xFF010117
+#define OID_SKGE_RESULT 0xFF010118
+#define OID_SKGE_BUS_TYPE 0xFF010119
+#define OID_SKGE_BUS_SPEED 0xFF01011A
+#define OID_SKGE_BUS_WIDTH 0xFF01011B
+/* 0xFF01011C unused */
+#define OID_SKGE_DIAG_ACTION 0xFF01011D
+#define OID_SKGE_DIAG_RESULT 0xFF01011E
+#define OID_SKGE_MTU 0xFF01011F
+#define OID_SKGE_PHYS_CUR_ADDR 0xFF010120
+#define OID_SKGE_PHYS_FAC_ADDR 0xFF010121
+#define OID_SKGE_PMD 0xFF010122
+#define OID_SKGE_CONNECTOR 0xFF010123
+#define OID_SKGE_LINK_CAP 0xFF010124
+#define OID_SKGE_LINK_MODE 0xFF010125
+#define OID_SKGE_LINK_MODE_STATUS 0xFF010126
+#define OID_SKGE_LINK_STATUS 0xFF010127
+#define OID_SKGE_FLOWCTRL_CAP 0xFF010128
+#define OID_SKGE_FLOWCTRL_MODE 0xFF010129
+#define OID_SKGE_FLOWCTRL_STATUS 0xFF01012A
+#define OID_SKGE_PHY_OPERATION_CAP 0xFF01012B
+#define OID_SKGE_PHY_OPERATION_MODE 0xFF01012C
+#define OID_SKGE_PHY_OPERATION_STATUS 0xFF01012D
+#define OID_SKGE_MULTICAST_LIST 0xFF01012E
+#define OID_SKGE_CURRENT_PACKET_FILTER 0xFF01012F
+
+#define OID_SKGE_TRAP 0xFF010130
+#define OID_SKGE_TRAP_NUMBER 0xFF010131
+
+#define OID_SKGE_RLMT_MODE 0xFF010140
+#define OID_SKGE_RLMT_PORT_NUMBER 0xFF010141
+#define OID_SKGE_RLMT_PORT_ACTIVE 0xFF010142
+#define OID_SKGE_RLMT_PORT_PREFERRED 0xFF010143
+#define OID_SKGE_INTERMEDIATE_SUPPORT 0xFF010160
+
+#define OID_SKGE_SPEED_CAP 0xFF010170
+#define OID_SKGE_SPEED_MODE 0xFF010171
+#define OID_SKGE_SPEED_STATUS 0xFF010172
+
+#define OID_SKGE_BOARDLEVEL 0xFF010180
+
+#define OID_SKGE_SENSOR_NUMBER 0xFF020100
+#define OID_SKGE_SENSOR_INDEX 0xFF020101
+#define OID_SKGE_SENSOR_DESCR 0xFF020102
+#define OID_SKGE_SENSOR_TYPE 0xFF020103
+#define OID_SKGE_SENSOR_VALUE 0xFF020104
#define OID_SKGE_SENSOR_WAR_THRES_LOW 0xFF020105
#define OID_SKGE_SENSOR_WAR_THRES_UPP 0xFF020106
#define OID_SKGE_SENSOR_ERR_THRES_LOW 0xFF020107
#define OID_SKGE_SENSOR_ERR_THRES_UPP 0xFF020108
-#define OID_SKGE_SENSOR_STATUS 0xFF020109
-#define OID_SKGE_SENSOR_WAR_CTS 0xFF02010A
-#define OID_SKGE_SENSOR_ERR_CTS 0xFF02010B
-#define OID_SKGE_SENSOR_WAR_TIME 0xFF02010C
-#define OID_SKGE_SENSOR_ERR_TIME 0xFF02010D
+#define OID_SKGE_SENSOR_STATUS 0xFF020109
+#define OID_SKGE_SENSOR_WAR_CTS 0xFF02010A
+#define OID_SKGE_SENSOR_ERR_CTS 0xFF02010B
+#define OID_SKGE_SENSOR_WAR_TIME 0xFF02010C
+#define OID_SKGE_SENSOR_ERR_TIME 0xFF02010D
-#define OID_SKGE_CHKSM_NUMBER 0xFF020110
-#define OID_SKGE_CHKSM_RX_OK_CTS 0xFF020111
+#define OID_SKGE_CHKSM_NUMBER 0xFF020110
+#define OID_SKGE_CHKSM_RX_OK_CTS 0xFF020111
#define OID_SKGE_CHKSM_RX_UNABLE_CTS 0xFF020112
-#define OID_SKGE_CHKSM_RX_ERR_CTS 0xFF020113
-#define OID_SKGE_CHKSM_TX_OK_CTS 0xFF020114
+#define OID_SKGE_CHKSM_RX_ERR_CTS 0xFF020113
+#define OID_SKGE_CHKSM_TX_OK_CTS 0xFF020114
#define OID_SKGE_CHKSM_TX_UNABLE_CTS 0xFF020115
-#define OID_SKGE_STAT_TX 0xFF020120
-#define OID_SKGE_STAT_TX_OCTETS 0xFF020121
-#define OID_SKGE_STAT_TX_BROADCAST 0xFF020122
-#define OID_SKGE_STAT_TX_MULTICAST 0xFF020123
-#define OID_SKGE_STAT_TX_UNICAST 0xFF020124
-#define OID_SKGE_STAT_TX_LONGFRAMES 0xFF020125
-#define OID_SKGE_STAT_TX_BURST 0xFF020126
-#define OID_SKGE_STAT_TX_PFLOWC 0xFF020127
-#define OID_SKGE_STAT_TX_FLOWC 0xFF020128
-#define OID_SKGE_STAT_TX_SINGLE_COL 0xFF020129
-#define OID_SKGE_STAT_TX_MULTI_COL 0xFF02012A
-#define OID_SKGE_STAT_TX_EXCESS_COL 0xFF02012B
-#define OID_SKGE_STAT_TX_LATE_COL 0xFF02012C
-#define OID_SKGE_STAT_TX_DEFFERAL 0xFF02012D
-#define OID_SKGE_STAT_TX_EXCESS_DEF 0xFF02012E
-#define OID_SKGE_STAT_TX_UNDERRUN 0xFF02012F
-#define OID_SKGE_STAT_TX_CARRIER 0xFF020130
+#define OID_SKGE_STAT_TX 0xFF020120
+#define OID_SKGE_STAT_TX_OCTETS 0xFF020121
+#define OID_SKGE_STAT_TX_BROADCAST 0xFF020122
+#define OID_SKGE_STAT_TX_MULTICAST 0xFF020123
+#define OID_SKGE_STAT_TX_UNICAST 0xFF020124
+#define OID_SKGE_STAT_TX_LONGFRAMES 0xFF020125
+#define OID_SKGE_STAT_TX_BURST 0xFF020126
+#define OID_SKGE_STAT_TX_PFLOWC 0xFF020127
+#define OID_SKGE_STAT_TX_FLOWC 0xFF020128
+#define OID_SKGE_STAT_TX_SINGLE_COL 0xFF020129
+#define OID_SKGE_STAT_TX_MULTI_COL 0xFF02012A
+#define OID_SKGE_STAT_TX_EXCESS_COL 0xFF02012B
+#define OID_SKGE_STAT_TX_LATE_COL 0xFF02012C
+#define OID_SKGE_STAT_TX_DEFFERAL 0xFF02012D
+#define OID_SKGE_STAT_TX_EXCESS_DEF 0xFF02012E
+#define OID_SKGE_STAT_TX_UNDERRUN 0xFF02012F
+#define OID_SKGE_STAT_TX_CARRIER 0xFF020130
/* #define OID_SKGE_STAT_TX_UTIL 0xFF020131 */
-#define OID_SKGE_STAT_TX_64 0xFF020132
-#define OID_SKGE_STAT_TX_127 0xFF020133
-#define OID_SKGE_STAT_TX_255 0xFF020134
-#define OID_SKGE_STAT_TX_511 0xFF020135
-#define OID_SKGE_STAT_TX_1023 0xFF020136
-#define OID_SKGE_STAT_TX_MAX 0xFF020137
-#define OID_SKGE_STAT_TX_SYNC 0xFF020138
+#define OID_SKGE_STAT_TX_64 0xFF020132
+#define OID_SKGE_STAT_TX_127 0xFF020133
+#define OID_SKGE_STAT_TX_255 0xFF020134
+#define OID_SKGE_STAT_TX_511 0xFF020135
+#define OID_SKGE_STAT_TX_1023 0xFF020136
+#define OID_SKGE_STAT_TX_MAX 0xFF020137
+#define OID_SKGE_STAT_TX_SYNC 0xFF020138
#define OID_SKGE_STAT_TX_SYNC_OCTETS 0xFF020139
-#define OID_SKGE_STAT_RX 0xFF02013A
-#define OID_SKGE_STAT_RX_OCTETS 0xFF02013B
-#define OID_SKGE_STAT_RX_BROADCAST 0xFF02013C
-#define OID_SKGE_STAT_RX_MULTICAST 0xFF02013D
-#define OID_SKGE_STAT_RX_UNICAST 0xFF02013E
-#define OID_SKGE_STAT_RX_PFLOWC 0xFF02013F
-#define OID_SKGE_STAT_RX_FLOWC 0xFF020140
-#define OID_SKGE_STAT_RX_PFLOWC_ERR 0xFF020141
+#define OID_SKGE_STAT_RX 0xFF02013A
+#define OID_SKGE_STAT_RX_OCTETS 0xFF02013B
+#define OID_SKGE_STAT_RX_BROADCAST 0xFF02013C
+#define OID_SKGE_STAT_RX_MULTICAST 0xFF02013D
+#define OID_SKGE_STAT_RX_UNICAST 0xFF02013E
+#define OID_SKGE_STAT_RX_PFLOWC 0xFF02013F
+#define OID_SKGE_STAT_RX_FLOWC 0xFF020140
+#define OID_SKGE_STAT_RX_PFLOWC_ERR 0xFF020141
#define OID_SKGE_STAT_RX_FLOWC_UNKWN 0xFF020142
-#define OID_SKGE_STAT_RX_BURST 0xFF020143
-#define OID_SKGE_STAT_RX_MISSED 0xFF020144
-#define OID_SKGE_STAT_RX_FRAMING 0xFF020145
-#define OID_SKGE_STAT_RX_OVERFLOW 0xFF020146
-#define OID_SKGE_STAT_RX_JABBER 0xFF020147
-#define OID_SKGE_STAT_RX_CARRIER 0xFF020148
-#define OID_SKGE_STAT_RX_IR_LENGTH 0xFF020149
-#define OID_SKGE_STAT_RX_SYMBOL 0xFF02014A
-#define OID_SKGE_STAT_RX_SHORTS 0xFF02014B
-#define OID_SKGE_STAT_RX_RUNT 0xFF02014C
-#define OID_SKGE_STAT_RX_CEXT 0xFF02014D
-#define OID_SKGE_STAT_RX_TOO_LONG 0xFF02014E
-#define OID_SKGE_STAT_RX_FCS 0xFF02014F
+#define OID_SKGE_STAT_RX_BURST 0xFF020143
+#define OID_SKGE_STAT_RX_MISSED 0xFF020144
+#define OID_SKGE_STAT_RX_FRAMING 0xFF020145
+#define OID_SKGE_STAT_RX_OVERFLOW 0xFF020146
+#define OID_SKGE_STAT_RX_JABBER 0xFF020147
+#define OID_SKGE_STAT_RX_CARRIER 0xFF020148
+#define OID_SKGE_STAT_RX_IR_LENGTH 0xFF020149
+#define OID_SKGE_STAT_RX_SYMBOL 0xFF02014A
+#define OID_SKGE_STAT_RX_SHORTS 0xFF02014B
+#define OID_SKGE_STAT_RX_RUNT 0xFF02014C
+#define OID_SKGE_STAT_RX_CEXT 0xFF02014D
+#define OID_SKGE_STAT_RX_TOO_LONG 0xFF02014E
+#define OID_SKGE_STAT_RX_FCS 0xFF02014F
/* #define OID_SKGE_STAT_RX_UTIL 0xFF020150 */
-#define OID_SKGE_STAT_RX_64 0xFF020151
-#define OID_SKGE_STAT_RX_127 0xFF020152
-#define OID_SKGE_STAT_RX_255 0xFF020153
-#define OID_SKGE_STAT_RX_511 0xFF020154
-#define OID_SKGE_STAT_RX_1023 0xFF020155
-#define OID_SKGE_STAT_RX_MAX 0xFF020156
-#define OID_SKGE_STAT_RX_LONGFRAMES 0xFF020157
-
-#define OID_SKGE_DIAG_ACTION 0xFF01011D
-#define OID_SKGE_DIAG_RESULT 0xFF01011E
-#define OID_SKGE_MTU 0xFF01011F
-#define OID_SKGE_PHYS_CUR_ADDR 0xFF010120
-#define OID_SKGE_PHYS_FAC_ADDR 0xFF010121
-#define OID_SKGE_PMD 0xFF010122
-#define OID_SKGE_CONNECTOR 0xFF010123
-#define OID_SKGE_LINK_CAP 0xFF010124
-#define OID_SKGE_LINK_MODE 0xFF010125
-#define OID_SKGE_LINK_MODE_STATUS 0xFF010126
-#define OID_SKGE_LINK_STATUS 0xFF010127
-#define OID_SKGE_FLOWCTRL_CAP 0xFF010128
-#define OID_SKGE_FLOWCTRL_MODE 0xFF010129
-#define OID_SKGE_FLOWCTRL_STATUS 0xFF01012A
-#define OID_SKGE_PHY_OPERATION_CAP 0xFF01012B
-#define OID_SKGE_PHY_OPERATION_MODE 0xFF01012C
-#define OID_SKGE_PHY_OPERATION_STATUS 0xFF01012D
-#define OID_SKGE_MULTICAST_LIST 0xFF01012E
-#define OID_SKGE_CURRENT_PACKET_FILTER 0xFF01012F
-
-#define OID_SKGE_TRAP 0xFF010130
-#define OID_SKGE_TRAP_NUMBER 0xFF010131
-
-#define OID_SKGE_RLMT_MODE 0xFF010140
-#define OID_SKGE_RLMT_PORT_NUMBER 0xFF010141
-#define OID_SKGE_RLMT_PORT_ACTIVE 0xFF010142
-#define OID_SKGE_RLMT_PORT_PREFERRED 0xFF010143
-#define OID_SKGE_INTERMEDIATE_SUPPORT 0xFF010160
-#define OID_SKGE_RLMT_CHANGE_CTS 0xFF020160
-#define OID_SKGE_RLMT_CHANGE_TIME 0xFF020161
-#define OID_SKGE_RLMT_CHANGE_ESTIM 0xFF020162
-#define OID_SKGE_RLMT_CHANGE_THRES 0xFF020163
-
-#define OID_SKGE_RLMT_PORT_INDEX 0xFF020164
-#define OID_SKGE_RLMT_STATUS 0xFF020165
-#define OID_SKGE_RLMT_TX_HELLO_CTS 0xFF020166
-#define OID_SKGE_RLMT_RX_HELLO_CTS 0xFF020167
-#define OID_SKGE_RLMT_TX_SP_REQ_CTS 0xFF020168
-#define OID_SKGE_RLMT_RX_SP_CTS 0xFF020169
+#define OID_SKGE_STAT_RX_64 0xFF020151
+#define OID_SKGE_STAT_RX_127 0xFF020152
+#define OID_SKGE_STAT_RX_255 0xFF020153
+#define OID_SKGE_STAT_RX_511 0xFF020154
+#define OID_SKGE_STAT_RX_1023 0xFF020155
+#define OID_SKGE_STAT_RX_MAX 0xFF020156
+#define OID_SKGE_STAT_RX_LONGFRAMES 0xFF020157
+
+#define OID_SKGE_RLMT_CHANGE_CTS 0xFF020160
+#define OID_SKGE_RLMT_CHANGE_TIME 0xFF020161
+#define OID_SKGE_RLMT_CHANGE_ESTIM 0xFF020162
+#define OID_SKGE_RLMT_CHANGE_THRES 0xFF020163
+
+#define OID_SKGE_RLMT_PORT_INDEX 0xFF020164
+#define OID_SKGE_RLMT_STATUS 0xFF020165
+#define OID_SKGE_RLMT_TX_HELLO_CTS 0xFF020166
+#define OID_SKGE_RLMT_RX_HELLO_CTS 0xFF020167
+#define OID_SKGE_RLMT_TX_SP_REQ_CTS 0xFF020168
+#define OID_SKGE_RLMT_RX_SP_CTS 0xFF020169
#define OID_SKGE_RLMT_MONITOR_NUMBER 0xFF010150
-#define OID_SKGE_RLMT_MONITOR_INDEX 0xFF010151
-#define OID_SKGE_RLMT_MONITOR_ADDR 0xFF010152
-#define OID_SKGE_RLMT_MONITOR_ERRS 0xFF010153
+#define OID_SKGE_RLMT_MONITOR_INDEX 0xFF010151
+#define OID_SKGE_RLMT_MONITOR_ADDR 0xFF010152
+#define OID_SKGE_RLMT_MONITOR_ERRS 0xFF010153
#define OID_SKGE_RLMT_MONITOR_TIMESTAMP 0xFF010154
-#define OID_SKGE_RLMT_MONITOR_ADMIN 0xFF010155
+#define OID_SKGE_RLMT_MONITOR_ADMIN 0xFF010155
-#define OID_SKGE_TX_SW_QUEUE_LEN 0xFF020170
-#define OID_SKGE_TX_SW_QUEUE_MAX 0xFF020171
-#define OID_SKGE_TX_RETRY 0xFF020172
-#define OID_SKGE_RX_INTR_CTS 0xFF020173
-#define OID_SKGE_TX_INTR_CTS 0xFF020174
-#define OID_SKGE_RX_NO_BUF_CTS 0xFF020175
-#define OID_SKGE_TX_NO_BUF_CTS 0xFF020176
-#define OID_SKGE_TX_USED_DESCR_NO 0xFF020177
-#define OID_SKGE_RX_DELIVERED_CTS 0xFF020178
+#define OID_SKGE_TX_SW_QUEUE_LEN 0xFF020170
+#define OID_SKGE_TX_SW_QUEUE_MAX 0xFF020171
+#define OID_SKGE_TX_RETRY 0xFF020172
+#define OID_SKGE_RX_INTR_CTS 0xFF020173
+#define OID_SKGE_TX_INTR_CTS 0xFF020174
+#define OID_SKGE_RX_NO_BUF_CTS 0xFF020175
+#define OID_SKGE_TX_NO_BUF_CTS 0xFF020176
+#define OID_SKGE_TX_USED_DESCR_NO 0xFF020177
+#define OID_SKGE_RX_DELIVERED_CTS 0xFF020178
#define OID_SKGE_RX_OCTETS_DELIV_CTS 0xFF020179
-#define OID_SKGE_RX_HW_ERROR_CTS 0xFF02017A
-#define OID_SKGE_TX_HW_ERROR_CTS 0xFF02017B
-#define OID_SKGE_IN_ERRORS_CTS 0xFF02017C
-#define OID_SKGE_OUT_ERROR_CTS 0xFF02017D
-#define OID_SKGE_ERR_RECOVERY_CTS 0xFF02017E
-#define OID_SKGE_SYSUPTIME 0xFF02017F
-
-#define OID_SKGE_ALL_DATA 0xFF020190
-
-
-#define OID_SKGE_TRAP_SEN_WAR_LOW 500
-#define OID_SKGE_TRAP_SEN_WAR_UPP 501
-#define OID_SKGE_TRAP_SEN_ERR_LOW 502
-#define OID_SKGE_TRAP_SEN_ERR_UPP 503
+#define OID_SKGE_RX_HW_ERROR_CTS 0xFF02017A
+#define OID_SKGE_TX_HW_ERROR_CTS 0xFF02017B
+#define OID_SKGE_IN_ERRORS_CTS 0xFF02017C
+#define OID_SKGE_OUT_ERROR_CTS 0xFF02017D
+#define OID_SKGE_ERR_RECOVERY_CTS 0xFF02017E
+#define OID_SKGE_SYSUPTIME 0xFF02017F
+
+#define OID_SKGE_ALL_DATA 0xFF020190
+
+/* Defines for VCT. */
+#define OID_SKGE_VCT_GET 0xFF020200
+#define OID_SKGE_VCT_SET 0xFF020201
+#define OID_SKGE_VCT_STATUS 0xFF020202
+
+#ifdef SK_DIAG_SUPPORT
+/* Defines for driver DIAG mode. */
+#define OID_SKGE_DIAG_MODE 0xFF020204
+#endif /* SK_DIAG_SUPPORT */
+
+
+/* VCT struct to store a backup copy of VCT data after a port reset. */
+typedef struct s_PnmiVct {
+ SK_U8 VctStatus;
+ SK_U8 PCableLen;
+ SK_U32 PMdiPairLen[4];
+ SK_U8 PMdiPairSts[4];
+} SK_PNMI_VCT;
+
+
+/* VCT status values (to be given to CPA via OID_SKGE_VCT_STATUS). */
+#define SK_PNMI_VCT_NONE 0
+#define SK_PNMI_VCT_OLD_VCT_DATA 1
+#define SK_PNMI_VCT_NEW_VCT_DATA 2
+#define SK_PNMI_VCT_OLD_DSP_DATA 4
+#define SK_PNMI_VCT_NEW_DSP_DATA 8
+#define SK_PNMI_VCT_RUNNING 16
+
+
+/* VCT cable test status. */
+#define SK_PNMI_VCT_NORMAL_CABLE 0
+#define SK_PNMI_VCT_SHORT_CABLE 1
+#define SK_PNMI_VCT_OPEN_CABLE 2
+#define SK_PNMI_VCT_TEST_FAIL 3
+#define SK_PNMI_VCT_IMPEDANCE_MISMATCH 4
+
+#define OID_SKGE_TRAP_SEN_WAR_LOW 500
+#define OID_SKGE_TRAP_SEN_WAR_UPP 501
+#define OID_SKGE_TRAP_SEN_ERR_LOW 502
+#define OID_SKGE_TRAP_SEN_ERR_UPP 503
#define OID_SKGE_TRAP_RLMT_CHANGE_THRES 520
#define OID_SKGE_TRAP_RLMT_CHANGE_PORT 521
#define OID_SKGE_TRAP_RLMT_PORT_DOWN 522
-#define OID_SKGE_TRAP_RLMT_PORT_UP 523
+#define OID_SKGE_TRAP_RLMT_PORT_UP 523
#define OID_SKGE_TRAP_RLMT_SEGMENTATION 524
/*
+ * Generic PNMI IOCTL subcommand definitions.
+ */
+#define SK_GET_SINGLE_VAR 1
+#define SK_SET_SINGLE_VAR 2
+#define SK_PRESET_SINGLE_VAR 3
+#define SK_GET_FULL_MIB 4
+#define SK_SET_FULL_MIB 5
+#define SK_PRESET_FULL_MIB 6
+
+
+/*
* Define error numbers and messages for syslog
*/
#define SK_PNMI_ERR001 (SK_ERRBASE_PNMI + 1)
@@ -539,7 +653,7 @@
#define SK_PNMI_ERR012 (SK_ERRBASE_PNMI + 12)
#define SK_PNMI_ERR012MSG "SensorStat: Unknown OID"
#define SK_PNMI_ERR013 (SK_ERRBASE_PNMI + 13)
-#define SK_PNMI_ERR013MSG "SensorStat: Unknown OID should be errored before"
+#define SK_PNMI_ERR013MSG ""
#define SK_PNMI_ERR014 (SK_ERRBASE_PNMI + 14)
#define SK_PNMI_ERR014MSG "Vpd: Cannot read VPD keys"
#define SK_PNMI_ERR015 (SK_ERRBASE_PNMI + 15)
@@ -583,7 +697,7 @@
#define SK_PNMI_ERR035 (SK_ERRBASE_PNMI + 35)
#define SK_PNMI_ERR035MSG "Rlmt: Unknown OID"
#define SK_PNMI_ERR036 (SK_ERRBASE_PNMI + 36)
-#define SK_PNMI_ERR036MSG "Rlmt: Unknown OID should be errored before"
+#define SK_PNMI_ERR036MSG ""
#define SK_PNMI_ERR037 (SK_ERRBASE_PNMI + 37)
#define SK_PNMI_ERR037MSG "Rlmt: SK_RLMT_MODE_CHANGE event return not 0"
#define SK_PNMI_ERR038 (SK_ERRBASE_PNMI + 38)
@@ -591,17 +705,17 @@
#define SK_PNMI_ERR039 (SK_ERRBASE_PNMI + 39)
#define SK_PNMI_ERR039MSG "RlmtStat: Unknown OID"
#define SK_PNMI_ERR040 (SK_ERRBASE_PNMI + 40)
-#define SK_PNMI_ERR040MSG "RlmtStat: Unknown OID should be errored before"
+#define SK_PNMI_ERR040MSG "PowerManagement: Unknown OID"
#define SK_PNMI_ERR041 (SK_ERRBASE_PNMI + 41)
#define SK_PNMI_ERR041MSG "MacPrivateConf: Unknown OID"
#define SK_PNMI_ERR042 (SK_ERRBASE_PNMI + 42)
-#define SK_PNMI_ERR042MSG "MacPrivateConf: Unknown OID should be errored before"
+#define SK_PNMI_ERR042MSG "MacPrivateConf: SK_HWEV_SET_ROLE returned not 0"
#define SK_PNMI_ERR043 (SK_ERRBASE_PNMI + 43)
#define SK_PNMI_ERR043MSG "MacPrivateConf: SK_HWEV_SET_LMODE returned not 0"
#define SK_PNMI_ERR044 (SK_ERRBASE_PNMI + 44)
#define SK_PNMI_ERR044MSG "MacPrivateConf: SK_HWEV_SET_FLOWMODE returned not 0"
#define SK_PNMI_ERR045 (SK_ERRBASE_PNMI + 45)
-#define SK_PNMI_ERR045MSG "MacPrivateConf: Unknown OID in set action"
+#define SK_PNMI_ERR045MSG "MacPrivateConf: SK_HWEV_SET_SPEED returned not 0"
#define SK_PNMI_ERR046 (SK_ERRBASE_PNMI + 46)
#define SK_PNMI_ERR046MSG "Monitor: Unknown OID"
#define SK_PNMI_ERR047 (SK_ERRBASE_PNMI + 47)
@@ -609,13 +723,13 @@
#define SK_PNMI_ERR048 (SK_ERRBASE_PNMI + 48)
#define SK_PNMI_ERR048MSG "RlmtUpdate: Event function returns not 0"
#define SK_PNMI_ERR049 (SK_ERRBASE_PNMI + 49)
-#define SK_PNMI_ERR049MSG ""
+#define SK_PNMI_ERR049MSG "SkPnmiInit: Invalid size of 'CounterOffset' struct!!"
#define SK_PNMI_ERR050 (SK_ERRBASE_PNMI + 50)
-#define SK_PNMI_ERR050MSG "MacUpdate: Cannot update statistic counter"
+#define SK_PNMI_ERR050MSG "SkPnmiInit: Invalid size of 'StatAddr' table!!"
#define SK_PNMI_ERR051 (SK_ERRBASE_PNMI + 51)
#define SK_PNMI_ERR051MSG "SkPnmiEvent: Port switch suspicious"
#define SK_PNMI_ERR052 (SK_ERRBASE_PNMI + 52)
-#define SK_PNMI_ERR052MSG "MacPrivateConf: SK_HWEV_SET_ROLE returned not 0"
+#define SK_PNMI_ERR052MSG ""
/*
* Management counter macros called by the driver
@@ -659,7 +773,21 @@
#define SK_PNMI_CNT_RX_LONGFRAMES(pAC,p) \
{ \
if ((p) < SK_MAX_MACS) { \
- ((pAC)->Pnmi.Port[p].StatRxLongFrameCts)++; \
+ ((pAC)->Pnmi.Port[p].StatRxLongFrameCts++); \
+ } \
+ }
+
+#define SK_PNMI_CNT_RX_FRAMETOOLONG(pAC,p) \
+ { \
+ if ((p) < SK_MAX_MACS) { \
+ ((pAC)->Pnmi.Port[p].StatRxFrameTooLongCts++); \
+ } \
+ }
+
+#define SK_PNMI_CNT_RX_PMACC_ERR(pAC,p) \
+ { \
+ if ((p) < SK_MAX_MACS) { \
+ ((pAC)->Pnmi.Port[p].StatRxPMaccErr++); \
} \
}
@@ -685,12 +813,12 @@
#define SK_PNMI_MULTICAST_LISTLEN 64
#define SK_PNMI_SENSOR_ENTRIES (SK_MAX_SENSORS)
#define SK_PNMI_CHECKSUM_ENTRIES 3
-#define SK_PNMI_MAC_ENTRIES (SK_MAX_MACS + 1)
+#define SK_PNMI_MAC_ENTRIES (SK_MAX_MACS + 1)
#define SK_PNMI_MONITOR_ENTRIES 20
#define SK_PNMI_TRAP_ENTRIES 10
-#define SK_PNMI_TRAPLEN 128
-#define SK_PNMI_STRINGLEN1 80
-#define SK_PNMI_STRINGLEN2 25
+#define SK_PNMI_TRAPLEN 128
+#define SK_PNMI_STRINGLEN1 80
+#define SK_PNMI_STRINGLEN2 25
#define SK_PNMI_TRAP_QUEUE_LEN 512
typedef struct s_PnmiVpd {
@@ -798,6 +926,9 @@
SK_U8 ConfPhyOperationCapability;
SK_U8 ConfPhyOperationMode;
SK_U8 ConfPhyOperationStatus;
+ SK_U8 ConfSpeedCapability;
+ SK_U8 ConfSpeedMode;
+ SK_U8 ConfSpeedStatus;
} SK_PNMI_CONF;
typedef struct s_PnmiRlmt {
@@ -843,11 +974,11 @@
SK_U8 BusSpeed;
SK_U8 BusWidth;
SK_U8 SensorNumber;
- SK_PNMI_SENSOR Sensor[SK_PNMI_SENSOR_ENTRIES];
+ SK_PNMI_SENSOR Sensor[SK_PNMI_SENSOR_ENTRIES];
SK_U8 ChecksumNumber;
SK_PNMI_CHECKSUM Checksum[SK_PNMI_CHECKSUM_ENTRIES];
- SK_PNMI_STAT Stat[SK_PNMI_MAC_ENTRIES];
- SK_PNMI_CONF Conf[SK_PNMI_MAC_ENTRIES];
+ SK_PNMI_STAT Stat[SK_PNMI_MAC_ENTRIES];
+ SK_PNMI_CONF Conf[SK_PNMI_MAC_ENTRIES];
SK_U8 RlmtMode;
SK_U32 RlmtPortNumber;
SK_U8 RlmtPortActive;
@@ -856,7 +987,7 @@
SK_U64 RlmtChangeTime;
SK_U64 RlmtChangeEstimate;
SK_U64 RlmtChangeThreshold;
- SK_PNMI_RLMT Rlmt[SK_MAX_MACS];
+ SK_PNMI_RLMT Rlmt[SK_MAX_MACS];
SK_U32 RlmtMonitorNumber;
SK_PNMI_RLMT_MONITOR RlmtMonitor[SK_PNMI_MONITOR_ENTRIES];
SK_U32 TrapNumber;
@@ -882,25 +1013,27 @@
#define SK_PNMI_STRUCT_SIZE (sizeof(SK_PNMI_STRUCT_DATA))
#define SK_PNMI_MIN_STRUCT_SIZE ((unsigned int)(SK_UPTR)\
&(((SK_PNMI_STRUCT_DATA *)0)->VpdFreeBytes))
- /*
- * ReturnStatus field
- * must be located
- * before VpdFreeBytes
- */
+ /*
+ * ReturnStatus field
+ * must be located
+ * before VpdFreeBytes
+ */
/*
* Various definitions
*/
#define SK_PNMI_MAX_PROTOS 3
-#define SK_PNMI_SCNT_NOT 64
-#define SK_PNMI_CNT_NO 67
+#define SK_PNMI_CNT_NO 66 /* Must have the value of the enum
+ * SK_PNMI_MAX_IDX. Define SK_PNMI_CHECK
+ * for check while init phase 1
+ */
/*
* Estimate data structure
*/
typedef struct s_PnmiEstimate {
- unsigned int EstValueIndex;
+ unsigned int EstValueIndex;
SK_U64 EstValue[7];
SK_U64 Estimate;
SK_TIMER EstTimer;
@@ -908,15 +1041,22 @@
/*
- * PNMI specific adatper context structure
+ * VCT timer data structure
+ */
+typedef struct s_VctTimer {
+ SK_TIMER VctTimer;
+} SK_PNMI_VCT_TIMER;
+
+
+/*
+ * PNMI specific adapter context structure
*/
typedef struct s_PnmiPort {
- SK_U32 CounterHigh[SK_PNMI_SCNT_NOT];
- SK_U64 CounterOffset[SK_PNMI_CNT_NO];
SK_U64 StatSyncCts;
SK_U64 StatSyncOctetsCts;
SK_U64 StatRxLongFrameCts;
- SK_BOOL ActiveFlag;
+ SK_U64 StatRxFrameTooLongCts;
+ SK_U64 StatRxPMaccErr;
SK_U64 TxSwQueueLen;
SK_U64 TxSwQueueMax;
SK_U64 TxRetryCts;
@@ -932,61 +1072,75 @@
SK_U64 InErrorsCts;
SK_U64 OutErrorsCts;
SK_U64 ErrRecoveryCts;
+ SK_U64 RxShortZeroMark;
+ SK_U64 CounterOffset[SK_PNMI_CNT_NO];
+ SK_U32 CounterHigh[SK_PNMI_CNT_NO];
+ SK_BOOL ActiveFlag;
+ SK_U8 Align[3];
} SK_PNMI_PORT;
typedef struct s_PnmiData {
- SK_PNMI_PORT Port[SK_MAX_MACS];
+ SK_PNMI_PORT Port [SK_MAX_MACS];
+ SK_PNMI_PORT BufPort [SK_MAX_MACS]; /* 2002-09-13 pweber */
SK_U64 VirtualCounterOffset[SK_PNMI_CNT_NO];
SK_U32 TestResult;
char HwVersion[10];
+ SK_U16 Align01;
char *pDriverDescription;
char *pDriverVersion;
- char TrapBuf[SK_PNMI_TRAP_QUEUE_LEN];
- unsigned int TrapBufFree;
- unsigned int TrapQueueBeg;
- unsigned int TrapQueueEnd;
- unsigned int TrapBufPad;
- unsigned int TrapUnique;
-
- int MacUpdatedFlag;
- int RlmtUpdatedFlag;
- int SirqUpdatedFlag;
+ int MacUpdatedFlag;
+ int RlmtUpdatedFlag;
+ int SirqUpdatedFlag;
SK_U64 RlmtChangeCts;
SK_U64 RlmtChangeTime;
SK_PNMI_ESTIMATE RlmtChangeEstimate;
SK_U64 RlmtChangeThreshold;
+ SK_U64 StartUpTime;
SK_U32 DeviceType;
char PciBusSpeed;
char PciBusWidth;
+ char Chipset;
char PMD;
char Connector;
- SK_U64 StartUpTime;
SK_BOOL DualNetActiveFlag;
+ SK_U16 Align02;
+
+ char TrapBuf[SK_PNMI_TRAP_QUEUE_LEN];
+ unsigned int TrapBufFree;
+ unsigned int TrapQueueBeg;
+ unsigned int TrapQueueEnd;
+ unsigned int TrapBufPad;
+ unsigned int TrapUnique;
+ SK_U8 VctStatus[SK_MAX_MACS];
+ SK_PNMI_VCT VctBackup[SK_MAX_MACS];
+ SK_PNMI_VCT_TIMER VctTimeout[SK_MAX_MACS];
} SK_PNMI;
/*
* Function prototypes
*/
-extern int SkPnmiInit(SK_AC *pAc, SK_IOC IoC, int level);
-extern int SkPnmiGetVar(SK_AC *pAc, SK_IOC IoC, SK_U32 Id, void* pBuf,
+extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level);
+extern int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiPreSetVar(SK_AC *pAc, SK_IOC IoC, SK_U32 Id,
+extern int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id,
void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiSetVar(SK_AC *pAc, SK_IOC IoC, SK_U32 Id, void* pBuf,
+extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiGetStruct(SK_AC *pAc, SK_IOC IoC, void* pBuf,
+extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
unsigned int *pLen, SK_U32 NetIndex);
-extern int SkPnmiPreSetStruct(SK_AC *pAc, SK_IOC IoC, void* pBuf,
+extern int SkPnmiPreSetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
unsigned int *pLen, SK_U32 NetIndex);
-extern int SkPnmiSetStruct(SK_AC *pAc, SK_IOC IoC, void* pBuf,
+extern int SkPnmiSetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
unsigned int *pLen, SK_U32 NetIndex);
-extern int SkPnmiEvent(SK_AC *pAc, SK_IOC IoC, SK_U32 Event,
+extern int SkPnmiEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event,
SK_EVPARA Param);
+extern int SkPnmiGenIoctl(SK_AC *pAC, SK_IOC IoC, void * pBuf,
+ unsigned int * pLen, SK_U32 NetIndex);
#endif
diff -Nru a/drivers/net/sk98lin/h/skgesirq.h b/drivers/net/sk98lin/h/skgesirq.h
--- a/drivers/net/sk98lin/h/skgesirq.h Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sk98lin/h/skgesirq.h Sun Aug 3 13:14:52 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skgesirq.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.22 $
- * Date: $Date: 2000/11/09 11:30:10 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.30 $
+ * Date: $Date: 2003/07/04 12:34:13 $
* Purpose: SK specific Gigabit Ethernet special IRQ functions
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2000 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,6 +26,35 @@
*
* History:
* $Log: skgesirq.h,v $
+ * Revision 1.30 2003/07/04 12:34:13 rschmidt
+ * Added SKERR_SIRQ_E025 for Downshift detected (Yukon-Copper)
+ *
+ * Revision 1.29 2003/05/28 15:14:49 rschmidt
+ * Moved defines for return codes of SkGePortCheckUp() to header file.
+ * Minor changes to avoid LINT warnings.
+ *
+ * Revision 1.28 2003/05/13 17:22:43 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.27 2003/03/31 07:32:34 mkarl
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.26 2002/10/14 09:52:36 rschmidt
+ * Added SKERR_SIRQ_E023 and SKERR_SIRQ_E024 for GPHY (Yukon)
+ * Editorial changes
+ *
+ * Revision 1.25 2002/07/15 18:15:52 rwahl
+ * Editorial changes.
+ *
+ * Revision 1.24 2002/07/15 15:39:21 rschmidt
+ * Corrected define for SKERR_SIRQ_E022
+ * Editorial changes
+ *
+ * Revision 1.23 2002/04/25 11:09:45 rschmidt
+ * Removed declarations for SkXmInitPhy(), SkXmRxTxEnable()
+ * Editorial changes
+ *
* Revision 1.22 2000/11/09 11:30:10 rassmann
* WA: Waiting after releasing reset until BCom chip is accessible.
*
@@ -66,7 +96,7 @@
* defined in skgeinit.h now.
*
* Revision 1.9 1998/10/14 14:00:39 gklug
- * add: eroor logs for init phys
+ * add: error logs for init phys
*
* Revision 1.8 1998/10/14 05:44:05 gklug
* add: E020
@@ -100,76 +130,86 @@
#ifndef _INC_SKGESIRQ_H_
#define _INC_SKGESIRQ_H_
+/* Define return codes of SkGePortCheckUp and CheckShort */
+#define SK_HW_PS_NONE 0 /* No action needed */
+#define SK_HW_PS_RESTART 1 /* Restart needed */
+#define SK_HW_PS_LINK 2 /* Link Up actions needed */
+
/*
* Define the Event the special IRQ/INI module can handle
*/
-#define SK_HWEV_WATIM 1 /* Timeout for WA errata #2 XMAC */
-#define SK_HWEV_PORT_START 2 /* Port Start Event by RLMT */
-#define SK_HWEV_PORT_STOP 3 /* Port Stop Event by RLMT */
-#define SK_HWEV_CLEAR_STAT 4 /* Clear Statistics by PNMI */
-#define SK_HWEV_UPDATE_STAT 5 /* Update Statistics by PNMI */
-#define SK_HWEV_SET_LMODE 6 /* Set Link Mode by PNMI */
+#define SK_HWEV_WATIM 1 /* Timeout for WA Errata #2 XMAC */
+#define SK_HWEV_PORT_START 2 /* Port Start Event by RLMT */
+#define SK_HWEV_PORT_STOP 3 /* Port Stop Event by RLMT */
+#define SK_HWEV_CLEAR_STAT 4 /* Clear Statistics by PNMI */
+#define SK_HWEV_UPDATE_STAT 5 /* Update Statistics by PNMI */
+#define SK_HWEV_SET_LMODE 6 /* Set Link Mode by PNMI */
#define SK_HWEV_SET_FLOWMODE 7 /* Set Flow Control Mode by PNMI */
-#define SK_HWEV_SET_ROLE 8 /* Set Master/Slave (Role) by PNMI */
-#define SK_HWEV_HALFDUP_CHK 9 /* Set Master/Slave (Role) by PNMI */
+#define SK_HWEV_SET_ROLE 8 /* Set Master/Slave (Role) by PNMI */
+#define SK_HWEV_SET_SPEED 9 /* Set Link Speed by PNMI */
+#define SK_HWEV_HALFDUP_CHK 10 /* Half Duplex Hangup Workaround */
-#define SK_WA_ACT_TIME (5000000L) /* 5 sec */
-#define SK_WA_INA_TIME (100000L) /* 100 msec */
+#define SK_WA_ACT_TIME (5000000UL) /* 5 sec */
+#define SK_WA_INA_TIME (100000UL) /* 100 msec */
-#define SK_HALFDUP_CHK_TIME (10000L) /* 10 msec */
+#define SK_HALFDUP_CHK_TIME (10000UL) /* 10 msec */
/*
* Define the error numbers and messages
*/
-#define SKERR_SIRQ_E001 (SK_ERRBASE_SIRQ+0)
-#define SKERR_SIRQ_E001MSG "Unknown event"
-#define SKERR_SIRQ_E002 (SKERR_SIRQ_E001+1)
-#define SKERR_SIRQ_E002MSG "Packet timeout RX1"
-#define SKERR_SIRQ_E003 (SKERR_SIRQ_E002+1)
-#define SKERR_SIRQ_E003MSG "Packet timeout RX2"
-#define SKERR_SIRQ_E004 (SKERR_SIRQ_E003+1)
-#define SKERR_SIRQ_E004MSG "XMAC 1 not correctly initialized"
-#define SKERR_SIRQ_E005 (SKERR_SIRQ_E004+1)
-#define SKERR_SIRQ_E005MSG "XMAC 2 not correctly initialized"
-#define SKERR_SIRQ_E006 (SKERR_SIRQ_E005+1)
-#define SKERR_SIRQ_E006MSG "CHECK failure R1"
-#define SKERR_SIRQ_E007 (SKERR_SIRQ_E006+1)
-#define SKERR_SIRQ_E007MSG "CHECK failure R2"
-#define SKERR_SIRQ_E008 (SKERR_SIRQ_E007+1)
-#define SKERR_SIRQ_E008MSG "CHECK failure XS1"
-#define SKERR_SIRQ_E009 (SKERR_SIRQ_E008+1)
-#define SKERR_SIRQ_E009MSG "CHECK failure XA1"
-#define SKERR_SIRQ_E010 (SKERR_SIRQ_E009+1)
-#define SKERR_SIRQ_E010MSG "CHECK failure XS2"
-#define SKERR_SIRQ_E011 (SKERR_SIRQ_E010+1)
-#define SKERR_SIRQ_E011MSG "CHECK failure XA2"
-#define SKERR_SIRQ_E012 (SKERR_SIRQ_E011+1)
-#define SKERR_SIRQ_E012MSG "unexpected IRQ Master error"
-#define SKERR_SIRQ_E013 (SKERR_SIRQ_E012+1)
-#define SKERR_SIRQ_E013MSG "unexpected IRQ Status error"
-#define SKERR_SIRQ_E014 (SKERR_SIRQ_E013+1)
-#define SKERR_SIRQ_E014MSG "Parity error on RAM (read)"
-#define SKERR_SIRQ_E015 (SKERR_SIRQ_E014+1)
-#define SKERR_SIRQ_E015MSG "Parity error on RAM (write)"
-#define SKERR_SIRQ_E016 (SKERR_SIRQ_E015+1)
-#define SKERR_SIRQ_E016MSG "Parity error MAC 1"
-#define SKERR_SIRQ_E017 (SKERR_SIRQ_E016+1)
-#define SKERR_SIRQ_E017MSG "Parity error MAC 2"
-#define SKERR_SIRQ_E018 (SKERR_SIRQ_E017+1)
-#define SKERR_SIRQ_E018MSG "Parity error RX 1"
-#define SKERR_SIRQ_E019 (SKERR_SIRQ_E018+1)
-#define SKERR_SIRQ_E019MSG "Parity error RX 2"
-#define SKERR_SIRQ_E020 (SKERR_SIRQ_E019+1)
-#define SKERR_SIRQ_E020MSG "XMAC transmit FIFO underrun"
-#define SKERR_SIRQ_E021 (SKERR_SIRQ_E020+1)
-#define SKERR_SIRQ_E021MSG "Spurious I2C interrupt"
-#define SKERR_SIRQ_E022 (SKERR_SIRQ_E020+1)
-#define SKERR_SIRQ_E022MSG "Cable pair swap error"
+#define SKERR_SIRQ_E001 (SK_ERRBASE_SIRQ+0)
+#define SKERR_SIRQ_E001MSG "Unknown event"
+#define SKERR_SIRQ_E002 (SKERR_SIRQ_E001+1)
+#define SKERR_SIRQ_E002MSG "Packet timeout RX1"
+#define SKERR_SIRQ_E003 (SKERR_SIRQ_E002+1)
+#define SKERR_SIRQ_E003MSG "Packet timeout RX2"
+#define SKERR_SIRQ_E004 (SKERR_SIRQ_E003+1)
+#define SKERR_SIRQ_E004MSG "MAC 1 not correctly initialized"
+#define SKERR_SIRQ_E005 (SKERR_SIRQ_E004+1)
+#define SKERR_SIRQ_E005MSG "MAC 2 not correctly initialized"
+#define SKERR_SIRQ_E006 (SKERR_SIRQ_E005+1)
+#define SKERR_SIRQ_E006MSG "CHECK failure R1"
+#define SKERR_SIRQ_E007 (SKERR_SIRQ_E006+1)
+#define SKERR_SIRQ_E007MSG "CHECK failure R2"
+#define SKERR_SIRQ_E008 (SKERR_SIRQ_E007+1)
+#define SKERR_SIRQ_E008MSG "CHECK failure XS1"
+#define SKERR_SIRQ_E009 (SKERR_SIRQ_E008+1)
+#define SKERR_SIRQ_E009MSG "CHECK failure XA1"
+#define SKERR_SIRQ_E010 (SKERR_SIRQ_E009+1)
+#define SKERR_SIRQ_E010MSG "CHECK failure XS2"
+#define SKERR_SIRQ_E011 (SKERR_SIRQ_E010+1)
+#define SKERR_SIRQ_E011MSG "CHECK failure XA2"
+#define SKERR_SIRQ_E012 (SKERR_SIRQ_E011+1)
+#define SKERR_SIRQ_E012MSG "unexpected IRQ Master error"
+#define SKERR_SIRQ_E013 (SKERR_SIRQ_E012+1)
+#define SKERR_SIRQ_E013MSG "unexpected IRQ Status error"
+#define SKERR_SIRQ_E014 (SKERR_SIRQ_E013+1)
+#define SKERR_SIRQ_E014MSG "Parity error on RAM (read)"
+#define SKERR_SIRQ_E015 (SKERR_SIRQ_E014+1)
+#define SKERR_SIRQ_E015MSG "Parity error on RAM (write)"
+#define SKERR_SIRQ_E016 (SKERR_SIRQ_E015+1)
+#define SKERR_SIRQ_E016MSG "Parity error MAC 1"
+#define SKERR_SIRQ_E017 (SKERR_SIRQ_E016+1)
+#define SKERR_SIRQ_E017MSG "Parity error MAC 2"
+#define SKERR_SIRQ_E018 (SKERR_SIRQ_E017+1)
+#define SKERR_SIRQ_E018MSG "Parity error RX 1"
+#define SKERR_SIRQ_E019 (SKERR_SIRQ_E018+1)
+#define SKERR_SIRQ_E019MSG "Parity error RX 2"
+#define SKERR_SIRQ_E020 (SKERR_SIRQ_E019+1)
+#define SKERR_SIRQ_E020MSG "MAC transmit FIFO underrun"
+#define SKERR_SIRQ_E021 (SKERR_SIRQ_E020+1)
+#define SKERR_SIRQ_E021MSG "Spurious TWSI interrupt"
+#define SKERR_SIRQ_E022 (SKERR_SIRQ_E021+1)
+#define SKERR_SIRQ_E022MSG "Cable pair swap error"
+#define SKERR_SIRQ_E023 (SKERR_SIRQ_E022+1)
+#define SKERR_SIRQ_E023MSG "Auto-negotiation error"
+#define SKERR_SIRQ_E024 (SKERR_SIRQ_E023+1)
+#define SKERR_SIRQ_E024MSG "FIFO overflow error"
+#define SKERR_SIRQ_E025 (SKERR_SIRQ_E024+1)
+#define SKERR_SIRQ_E025MSG "2 Pair Downshift detected"
extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
-extern void SkXmInitPhy( SK_AC *pAC, SK_IOC IoC, int Port, SK_BOOL DoLoop);
-extern int SkXmRxTxEnable(SK_AC *pAC, SK_IOC IoC, int Port);
extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
diff -Nru a/drivers/net/sk98lin/h/ski2c.h b/drivers/net/sk98lin/h/ski2c.h
--- a/drivers/net/sk98lin/h/ski2c.h Sun Aug 3 13:14:46 2003
+++ b/drivers/net/sk98lin/h/ski2c.h Sun Aug 3 13:14:46 2003
@@ -2,17 +2,15 @@
*
* Name: ski2c.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.30 $
- * Date: $Date: 2001/04/05 11:38:09 $
+ * Version: $Revision: 1.34 $
+ * Date: $Date: 2003/01/28 09:11:21 $
* Purpose: Defines to access Voltage and Temperature Sensor
- * (taken from Monalisa (taken from Concentrator))
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -28,6 +26,18 @@
* History:
*
* $Log: ski2c.h,v $
+ * Revision 1.34 2003/01/28 09:11:21 rschmidt
+ * Editorial changes
+ *
+ * Revision 1.33 2002/10/14 16:40:50 rschmidt
+ * Editorial changes (TWSI)
+ *
+ * Revision 1.32 2002/08/13 08:55:07 rschmidt
+ * Editorial changes
+ *
+ * Revision 1.31 2002/08/06 09:44:22 jschmalz
+ * Extensions and changes for Yukon
+ *
* Revision 1.30 2001/04/05 11:38:09 rassmann
* Set SenState to idle in SkI2cWaitIrq().
* Changed error message in SkI2cWaitIrq().
@@ -142,127 +152,131 @@
#include "h/skgei2c.h"
/*
- * Define the I2c events.
+ * Define the I2C events.
*/
#define SK_I2CEV_IRQ 1 /* IRQ happened Event */
#define SK_I2CEV_TIM 2 /* Timeout event */
-#define SK_I2CEV_CLEAR 3 /* Clear Mib Values */
+#define SK_I2CEV_CLEAR 3 /* Clear MIB Values */
/*
* Define READ and WRITE Constants.
*/
-#define I2C_READ 0
-#define I2C_WRITE 1
+#define I2C_READ 0
+#define I2C_WRITE 1
#define I2C_BURST 1
-#define I2C_SIGLE 0
+#define I2C_SINGLE 0
-#define SKERR_I2C_E001 (SK_ERRBASE_I2C+0)
-#define SKERR_I2C_E001MSG "Sensor index unknown"
-#define SKERR_I2C_E002 (SKERR_I2C_E001+1)
-#define SKERR_I2C_E002MSG "I2C: transfer does not complete.\n"
-#define SKERR_I2C_E003 (SKERR_I2C_E002+1)
-#define SKERR_I2C_E003MSG "lm80: NAK on device send.\n"
-#define SKERR_I2C_E004 (SKERR_I2C_E003+1)
-#define SKERR_I2C_E004MSG "lm80: NAK on register send.\n"
-#define SKERR_I2C_E005 (SKERR_I2C_E004+1)
-#define SKERR_I2C_E005MSG "lm80: NAK on device (2) send.\n"
-#define SKERR_I2C_E006 (SKERR_I2C_E005+1)
-#define SKERR_I2C_E006MSG "Unknown event"
-#define SKERR_I2C_E007 (SKERR_I2C_E006+1)
-#define SKERR_I2C_E007MSG "LM80 read out of state"
-#define SKERR_I2C_E008 (SKERR_I2C_E007+1)
-#define SKERR_I2C_E008MSG "unexpected sensor read completed"
-#define SKERR_I2C_E009 (SKERR_I2C_E008+1)
-#define SKERR_I2C_E009MSG "WARNING: temperature sensor out of range"
-#define SKERR_I2C_E010 (SKERR_I2C_E009+1)
-#define SKERR_I2C_E010MSG "WARNING: voltage sensor out of range"
-#define SKERR_I2C_E011 (SKERR_I2C_E010+1)
-#define SKERR_I2C_E011MSG "ERROR: temperature sensor out of range"
-#define SKERR_I2C_E012 (SKERR_I2C_E011+1)
-#define SKERR_I2C_E012MSG "ERROR: voltage sensor out of range"
-#define SKERR_I2C_E013 (SKERR_I2C_E012+1)
-#define SKERR_I2C_E013MSG "ERROR: couldn't init sensor"
-#define SKERR_I2C_E014 (SKERR_I2C_E013+1)
-#define SKERR_I2C_E014MSG "WARNING: fan sensor out of range"
-#define SKERR_I2C_E015 (SKERR_I2C_E014+1)
-#define SKERR_I2C_E015MSG "ERROR: fan sensor out of range"
-#define SKERR_I2C_E016 (SKERR_I2C_E015+1)
-#define SKERR_I2C_E016MSG "I2C: active transfer does not complete.\n"
+#define SKERR_I2C_E001 (SK_ERRBASE_I2C+0)
+#define SKERR_I2C_E001MSG "Sensor index unknown"
+#define SKERR_I2C_E002 (SKERR_I2C_E001+1)
+#define SKERR_I2C_E002MSG "TWSI: transfer does not complete"
+#define SKERR_I2C_E003 (SKERR_I2C_E002+1)
+#define SKERR_I2C_E003MSG "LM80: NAK on device send"
+#define SKERR_I2C_E004 (SKERR_I2C_E003+1)
+#define SKERR_I2C_E004MSG "LM80: NAK on register send"
+#define SKERR_I2C_E005 (SKERR_I2C_E004+1)
+#define SKERR_I2C_E005MSG "LM80: NAK on device (2) send"
+#define SKERR_I2C_E006 (SKERR_I2C_E005+1)
+#define SKERR_I2C_E006MSG "Unknown event"
+#define SKERR_I2C_E007 (SKERR_I2C_E006+1)
+#define SKERR_I2C_E007MSG "LM80 read out of state"
+#define SKERR_I2C_E008 (SKERR_I2C_E007+1)
+#define SKERR_I2C_E008MSG "Unexpected sensor read completed"
+#define SKERR_I2C_E009 (SKERR_I2C_E008+1)
+#define SKERR_I2C_E009MSG "WARNING: temperature sensor out of range"
+#define SKERR_I2C_E010 (SKERR_I2C_E009+1)
+#define SKERR_I2C_E010MSG "WARNING: voltage sensor out of range"
+#define SKERR_I2C_E011 (SKERR_I2C_E010+1)
+#define SKERR_I2C_E011MSG "ERROR: temperature sensor out of range"
+#define SKERR_I2C_E012 (SKERR_I2C_E011+1)
+#define SKERR_I2C_E012MSG "ERROR: voltage sensor out of range"
+#define SKERR_I2C_E013 (SKERR_I2C_E012+1)
+#define SKERR_I2C_E013MSG "ERROR: couldn't init sensor"
+#define SKERR_I2C_E014 (SKERR_I2C_E013+1)
+#define SKERR_I2C_E014MSG "WARNING: fan sensor out of range"
+#define SKERR_I2C_E015 (SKERR_I2C_E014+1)
+#define SKERR_I2C_E015MSG "ERROR: fan sensor out of range"
+#define SKERR_I2C_E016 (SKERR_I2C_E015+1)
+#define SKERR_I2C_E016MSG "TWSI: active transfer does not complete"
/*
* Define Timeout values
*/
-#define SK_I2C_TIM_LONG 2000000L /* 2 seconds */
-#define SK_I2C_TIM_SHORT 100000L /* 100 milliseconds */
+#define SK_I2C_TIM_LONG 2000000L /* 2 seconds */
+#define SK_I2C_TIM_SHORT 100000L /* 100 milliseconds */
+#define SK_I2C_TIM_WATCH 1000000L /* 1 second */
/*
* Define trap and error log hold times
*/
#ifndef SK_SEN_ERR_TR_HOLD
-#define SK_SEN_ERR_TR_HOLD (4*SK_TICKS_PER_SEC)
+#define SK_SEN_ERR_TR_HOLD (4*SK_TICKS_PER_SEC)
#endif
#ifndef SK_SEN_ERR_LOG_HOLD
-#define SK_SEN_ERR_LOG_HOLD (60*SK_TICKS_PER_SEC)
+#define SK_SEN_ERR_LOG_HOLD (60*SK_TICKS_PER_SEC)
#endif
#ifndef SK_SEN_WARN_TR_HOLD
-#define SK_SEN_WARN_TR_HOLD (15*SK_TICKS_PER_SEC)
+#define SK_SEN_WARN_TR_HOLD (15*SK_TICKS_PER_SEC)
#endif
#ifndef SK_SEN_WARN_LOG_HOLD
-#define SK_SEN_WARN_LOG_HOLD (15*60*SK_TICKS_PER_SEC)
+#define SK_SEN_WARN_LOG_HOLD (15*60*SK_TICKS_PER_SEC)
#endif
/*
* Defines for SenType
*/
-#define SK_SEN_TEMP 1
-#define SK_SEN_VOLT 2
-#define SK_SEN_FAN 3
+#define SK_SEN_UNKNOWN 0
+#define SK_SEN_TEMP 1
+#define SK_SEN_VOLT 2
+#define SK_SEN_FAN 3
/*
- * Define for the ErrorFlag
+ * Define for the SenErrorFlag
*/
-#define SK_SEN_ERR_OK 1 /* Error Flag: O.K. */
-#define SK_SEN_ERR_WARN 2 /* Error Flag: Warning */
-#define SK_SEN_ERR_ERR 3 /* Error Flag: Error */
+#define SK_SEN_ERR_NOT_PRESENT 0 /* Error Flag: Sensor not present */
+#define SK_SEN_ERR_OK 1 /* Error Flag: O.K. */
+#define SK_SEN_ERR_WARN 2 /* Error Flag: Warning */
+#define SK_SEN_ERR_ERR 3 /* Error Flag: Error */
+#define SK_SEN_ERR_FAULTY 4 /* Error Flag: Faulty */
/*
* Define the Sensor struct
*/
struct s_Sensor {
- char *SenDesc; /* Description */
- int SenType; /* Voltage or Temperature */
- SK_I32 SenValue; /* Current value of the sensor */
- SK_I32 SenThreErrHigh; /* High error Threshhold of this sensor */
- SK_I32 SenThreWarnHigh;/* High warning Threshhold of this sensor */
- SK_I32 SenThreErrLow; /* Lower error Threshold of the sensor */
- SK_I32 SenThreWarnLow; /* Lower warning Threshold of the sensor */
- int SenErrFlag; /* Sensor indicated an error */
- SK_BOOL SenInit; /* Is sensor initialized? */
- SK_U64 SenErrCts; /* Error trap counter */
- SK_U64 SenWarnCts; /* Warning trap counter */
- SK_U64 SenBegErrTS; /* Begin error timestamp */
- SK_U64 SenBegWarnTS; /* Begin warning timestamp */
+ char *SenDesc; /* Description */
+ int SenType; /* Voltage or Temperature */
+ SK_I32 SenValue; /* Current value of the sensor */
+ SK_I32 SenThreErrHigh; /* High error Threshhold of this sensor */
+ SK_I32 SenThreWarnHigh; /* High warning Threshhold of this sensor */
+ SK_I32 SenThreErrLow; /* Lower error Threshold of the sensor */
+ SK_I32 SenThreWarnLow; /* Lower warning Threshold of the sensor */
+ int SenErrFlag; /* Sensor indicated an error */
+ SK_BOOL SenInit; /* Is sensor initialized ? */
+ SK_U64 SenErrCts; /* Error trap counter */
+ SK_U64 SenWarnCts; /* Warning trap counter */
+ SK_U64 SenBegErrTS; /* Begin error timestamp */
+ SK_U64 SenBegWarnTS; /* Begin warning timestamp */
SK_U64 SenLastErrTrapTS; /* Last error trap timestamp */
SK_U64 SenLastErrLogTS; /* Last error log timestamp */
SK_U64 SenLastWarnTrapTS; /* Last warning trap timestamp */
SK_U64 SenLastWarnLogTS; /* Last warning log timestamp */
- int SenState; /* Sensor State (see HW specific include) */
- int (*SenRead)(SK_AC *pAC, SK_IOC IoC,struct s_Sensor *pSen) ;
- /* Sensors read function */
- SK_U16 SenReg; /* Register Address for this sensor */
- SK_U8 SenDev; /* DeviceSelection for this sensor */
-} ;
-
+ int SenState; /* Sensor State (see HW specific include) */
+ int (*SenRead)(SK_AC *pAC, SK_IOC IoC, struct s_Sensor *pSen);
+ /* Sensors read function */
+ SK_U16 SenReg; /* Register Address for this sensor */
+ SK_U8 SenDev; /* Device Selection for this sensor */
+};
typedef struct s_I2c {
SK_SENSOR SenTable[SK_MAX_SENSORS]; /* Sensor Table */
- int CurrSens; /* Which sensor is currently queried */
- int MaxSens; /* Max. number of sensors */
- int InitLevel; /* Initialized Level */
+ int CurrSens; /* Which sensor is currently queried */
+ int MaxSens; /* Max. number of sensors */
+ int TimerMode; /* Use the timer also to watch the state machine */
+ int InitLevel; /* Initialized Level */
#ifndef SK_DIAG
- int DummyReads; /* Number of non-checked dummy reads */
+ int DummyReads; /* Number of non-checked dummy reads */
SK_TIMER SenTimer; /* Sensors timer */
-#endif /* !SK_DIAG */
+#endif /* !SK_DIAG */
} SK_I2C;
extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
@@ -273,5 +287,5 @@
extern void SkI2cIsr(SK_AC *pAC, SK_IOC IoC);
#endif
-#endif /* n_SKI2C_H */
+#endif /* n_SKI2C_H */
diff -Nru a/drivers/net/sk98lin/h/skqueue.h b/drivers/net/sk98lin/h/skqueue.h
--- a/drivers/net/sk98lin/h/skqueue.h Sun Aug 3 13:14:53 2003
+++ b/drivers/net/sk98lin/h/skqueue.h Sun Aug 3 13:14:53 2003
@@ -1,32 +1,23 @@
/******************************************************************************
*
* Name: skqueue.h
- * Project: Genesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.12 $
- * Date: $Date: 1998/09/08 08:48:01 $
+ * Project: Gigabit Ethernet Adapters, Schedule-Modul
+ * Version: $Revision: 1.15 $
+ * Date: $Date: 2003/05/13 17:54:57 $
* Purpose: Defines for the Event queue
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1989-1998 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- * All Rights Reserved
- *
- * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF SYSKONNECT
- * The copyright notice above does not evidence any
- * actual or intended publication of such source code.
- *
- * This Module contains Proprietary Information of SysKonnect
- * and should be treated as Confidential.
- *
- * The information in this file is provided for the exclusive use of
- * the licensees of SysKonnect.
- * Such users have the right to use, modify, and incorporate this code
- * into products for purposes authorized by the license agreement
- * provided they include this notice and the associated copyright notice
- * with any such product.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
@@ -36,6 +27,15 @@
* History:
*
* $Log: skqueue.h,v $
+ * Revision 1.15 2003/05/13 17:54:57 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.14 2002/03/15 10:52:13 mkunz
+ * Added event classes for link aggregation
+ *
+ * Revision 1.13 1999/11/22 13:59:05 cgoos
+ * Changed license header to GPL.
+ *
* Revision 1.12 1998/09/08 08:48:01 gklug
* add: init level handling
*
@@ -96,6 +96,12 @@
#define SKGE_PNMI 4 /* PNMI Event Class */
#define SKGE_CSUM 5 /* Checksum Event Class */
#define SKGE_HWAC 6 /* Hardware Access Event Class */
+
+#define SKGE_SWT 9 /* Software Timer Event Class */
+#define SKGE_LACP 10 /* LACP Aggregation Event Class */
+#define SKGE_RSF 11 /* RSF Aggregation Event Class */
+#define SKGE_MARKER 12 /* MARKER Aggregation Event Class */
+#define SKGE_FD 13 /* FD Distributor Event Class */
/*
* define event queue as circular buffer
diff -Nru a/drivers/net/sk98lin/h/skrlmt.h b/drivers/net/sk98lin/h/skrlmt.h
--- a/drivers/net/sk98lin/h/skrlmt.h Sun Aug 3 13:14:53 2003
+++ b/drivers/net/sk98lin/h/skrlmt.h Sun Aug 3 13:14:53 2003
@@ -2,15 +2,16 @@
*
* Name: skrlmt.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.32 $
- * Date: $Date: 2001/02/14 14:06:31 $
+ * Version: $Revision: 1.37 $
+ * Date: $Date: 2003/04/15 09:43:43 $
* Purpose: Header file for Redundant Link ManagemenT.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,21 @@
* History:
*
* $Log: skrlmt.h,v $
+ * Revision 1.37 2003/04/15 09:43:43 tschilli
+ * Copyright messages changed.
+ *
+ * Revision 1.36 2003/04/14 15:56:22 tschilli
+ * "#error C++ is not yet supported." removed.
+ *
+ * Revision 1.35 2003/01/31 14:12:41 mkunz
+ * single port adapter runs now with two identical MAC addresses
+ *
+ * Revision 1.34 2002/09/23 15:13:41 rwahl
+ * Editorial changes.
+ *
+ * Revision 1.33 2001/07/03 12:16:48 mkunz
+ * New Flag ChgBcPrio (Change priority of last broadcast received)
+ *
* Revision 1.32 2001/02/14 14:06:31 rassmann
* Editorial changes.
*
@@ -160,7 +176,6 @@
#define __INC_SKRLMT_H
#ifdef __cplusplus
-#error C++ is not yet supported.
extern "C" {
#endif /* cplusplus */
@@ -283,28 +298,33 @@
_PortNum = (SK_U32)(PortNum); \
/* _pAC->Rlmt.Port[_PortNum].PacketsRx++; */ \
_pAC->Rlmt.Port[_PortNum].PacketsPerTimeSlot++; \
- if ((_pAC->Rlmt.Port[_PortNum].Net->RlmtMode & SK_RLMT_TRANSPARENT) != 0) { \
+ if (_pAC->Rlmt.RlmtOff) { \
*(pNumBytes) = 0; \
- } \
- else if (IsBc) { \
- if (_pAC->Rlmt.Port[_PortNum].Net->RlmtMode != SK_RLMT_MODE_CLS) { \
- *(pNumBytes) = 6; \
- *(pOffset) = 6; \
- } \
- else { \
- *(pNumBytes) = 0; \
- } \
- } \
- else { \
- if ((PktLen) > SK_RLMT_MAX_TX_BUF_SIZE) { \
- /* _pAC->Rlmt.Port[_PortNum].DataPacketsPerTimeSlot++; */ \
- *(pNumBytes) = 0; \
- } \
- else { \
- *(pNumBytes) = 6; \
- *(pOffset) = 0; \
- } \
- } \
+ } \
+ else {\
+ if ((_pAC->Rlmt.Port[_PortNum].Net->RlmtMode & SK_RLMT_TRANSPARENT) != 0) { \
+ *(pNumBytes) = 0; \
+ } \
+ else if (IsBc) { \
+ if (_pAC->Rlmt.Port[_PortNum].Net->RlmtMode != SK_RLMT_MODE_CLS) { \
+ *(pNumBytes) = 6; \
+ *(pOffset) = 6; \
+ } \
+ else { \
+ *(pNumBytes) = 0; \
+ } \
+ } \
+ else { \
+ if ((PktLen) > SK_RLMT_MAX_TX_BUF_SIZE) { \
+ /* _pAC->Rlmt.Port[_PortNum].DataPacketsPerTimeSlot++; */ \
+ *(pNumBytes) = 0; \
+ } \
+ else { \
+ *(pNumBytes) = 6; \
+ *(pOffset) = 0; \
+ } \
+ } \
+ } \
}
#if 0
@@ -468,6 +488,7 @@
/* For PNMI */
+ SK_U32 ChgBcPrio; /* Change Priority of last broadcast received */
SK_U32 RlmtMode; /* Check ... */
SK_U32 ActivePort; /* Active port. */
SK_U32 Preference; /* 0xFFFFFFFF: Automatic. */
@@ -501,8 +522,10 @@
/* ----- Private part ----- */
SK_BOOL CheckSwitch;
- SK_U8 Align01;
- SK_U16 Align02;
+ SK_BOOL RlmtOff; /* set to zero if the Mac addresses
+ are equal or the second one
+ is zero */
+ SK_U16 Align01;
} SK_RLMT;
diff -Nru a/drivers/net/sk98lin/h/sktimer.h b/drivers/net/sk98lin/h/sktimer.h
--- a/drivers/net/sk98lin/h/sktimer.h Sun Aug 3 13:14:46 2003
+++ b/drivers/net/sk98lin/h/sktimer.h Sun Aug 3 13:14:46 2003
@@ -1,32 +1,23 @@
/******************************************************************************
*
* Name: sktimer.h
- * Project: Genesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.8 $
- * Date: $Date: 1998/09/08 08:48:02 $
+ * Project: Gigabit Ethernet Adapters, Schedule-Modul
+ * Version: $Revision: 1.10 $
+ * Date: $Date: 2003/05/13 17:56:44 $
* Purpose: Defines for the timer functions
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1989-1998 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- * All Rights Reserved
- *
- * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF SYSKONNECT
- * The copyright notice above does not evidence any
- * actual or intended publication of such source code.
- *
- * This Module contains Proprietary Information of SysKonnect
- * and should be treated as Confidential.
- *
- * The information in this file is provided for the exclusive use of
- * the licensees of SysKonnect.
- * Such users have the right to use, modify, and incorporate this code
- * into products for purposes authorized by the license agreement
- * provided they include this notice and the associated copyright notice
- * with any such product.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
@@ -36,6 +27,12 @@
* History:
*
* $Log: sktimer.h,v $
+ * Revision 1.10 2003/05/13 17:56:44 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.9 1999/11/22 14:00:29 cgoos
+ * Changed license header to GPL.
+ *
* Revision 1.8 1998/09/08 08:48:02 gklug
* add: init level handling
*
diff -Nru a/drivers/net/sk98lin/h/sktypes.h b/drivers/net/sk98lin/h/sktypes.h
--- a/drivers/net/sk98lin/h/sktypes.h Sun Aug 3 13:14:53 2003
+++ b/drivers/net/sk98lin/h/sktypes.h Sun Aug 3 13:14:53 2003
@@ -2,16 +2,15 @@
*
* Name: sktypes.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.2 $
- * Date: $Date: 1999/11/22 14:01:58 $
+ * Version: $Revision: 1.3 $
+ * Date: $Date: 2003/02/25 14:16:40 $
* Purpose: Define data types for Linux
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,9 @@
* History:
*
* $Log: sktypes.h,v $
+ * Revision 1.3 2003/02/25 14:16:40 mlindner
+ * Fix: Copyright statement
+ *
* Revision 1.2 1999/11/22 14:01:58 cgoos
* Changed license header to GPL.
* Now using Linux' fixed size types instead of standard types.
diff -Nru a/drivers/net/sk98lin/h/skversion.h b/drivers/net/sk98lin/h/skversion.h
--- a/drivers/net/sk98lin/h/skversion.h Sun Aug 3 13:14:49 2003
+++ b/drivers/net/sk98lin/h/skversion.h Sun Aug 3 13:14:49 2003
@@ -2,16 +2,15 @@
*
* Name: version.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.1 $
- * Date: $Date: 2001/03/06 09:25:00 $
+ * Version: $Revision: 1.4 $
+ * Date: $Date: 2003/02/25 14:16:40 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +25,15 @@
*
* History:
* $Log: skversion.h,v $
+ * Revision 1.4 2003/02/25 14:16:40 mlindner
+ * Fix: Copyright statement
+ *
+ * Revision 1.3 2003/02/25 13:30:18 mlindner
+ * Add: Support for various vendors
+ *
+ * Revision 1.1.2.1 2001/09/05 13:38:30 mlindner
+ * Removed FILE description
+ *
* Revision 1.1 2001/03/06 09:25:00 mlindner
* first version
*
@@ -34,13 +42,13 @@
******************************************************************************/
-static const char SysKonnectFileId[] = "@(#)" __FILE__ " (C) SysKonnect GmbH.";
+static const char SysKonnectFileId[] = "@(#) (C) SysKonnect GmbH.";
static const char SysKonnectBuildNumber[] =
- "@(#)SK-BUILD: 4.06 PL: 01";
+ "@(#)SK-BUILD: 6.14 PL: 01";
-#define BOOT_STRING "sk98lin: Network Device Driver v4.06\n" \
- "Copyright (C) 2000-2001 SysKonnect GmbH."
+#define BOOT_STRING "sk98lin: Network Device Driver v6.14\n" \
+ "(C)Copyright 1999-2003 Marvell(R)."
-#define VER_STRING "4.06"
+#define VER_STRING "6.14"
diff -Nru a/drivers/net/sk98lin/h/skvpd.h b/drivers/net/sk98lin/h/skvpd.h
--- a/drivers/net/sk98lin/h/skvpd.h Sun Aug 3 13:14:47 2003
+++ b/drivers/net/sk98lin/h/skvpd.h Sun Aug 3 13:14:47 2003
@@ -2,16 +2,15 @@
*
* Name: skvpd.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.9 $
- * Date: $Date: 1999/11/22 14:02:27 $
+ * Version: $Revision: 1.15 $
+ * Date: $Date: 2003/01/13 10:39:38 $
* Purpose: Defines and Macros for VPD handling
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,33 @@
* History:
*
* $Log: skvpd.h,v $
+ * Revision 1.15 2003/01/13 10:39:38 rschmidt
+ * Replaced define for PCI device Id for YUKON with GENESIS
+ * Editorial changes
+ *
+ * Revision 1.14 2002/11/14 15:18:10 gheinig
+ * Added const specifier to key and buf parameters for VpdPara,VpdRead
+ * and VpdWrite. This is necessary for the Diag 7 GUI API
+ *
+ * Revision 1.13 2002/10/14 15:58:18 rschmidt
+ * Added entry in rom_size struct s_vpd
+ * Editorial changes
+ *
+ * Revision 1.12 2002/09/09 14:43:51 mkarl
+ * added PCI Id of Yukon for reading VPD in diag before the adapter has
+ * been initialized
+ * editorial changes
+ *
+ * Revision 1.11 2002/07/26 13:19:16 mkarl
+ * added support for Yukon
+ * added vpd_size to VPD struct
+ *
+ * Revision 1.10 2000/08/10 11:29:07 rassmann
+ * Editorial changes.
+ * Preserving 32-bit alignment in structs for the adapter context.
+ * Removed unused function VpdWriteDword() (#if 0).
+ * Made VpdReadKeyword() available for SKDIAG only.
+ *
* Revision 1.9 1999/11/22 14:02:27 cgoos
* Changed license header to GPL.
*
@@ -45,7 +71,7 @@
* Changed constants in SK_SWAP_32 to UL.
*
* Revision 1.4 1998/08/19 08:14:09 gklug
- * fix: remove struct keyword as much as possible from the c-code (see CCC)
+ * fix: remove struct keyword as much as possible from the C-code (see CCC)
*
* Revision 1.3 1998/08/18 08:18:56 malthoff
* Modify VPD in and out macros for SK_DIAG
@@ -99,7 +125,12 @@
/*
* Define READ and WRITE Constants.
*/
-#define VPD_SIZE 512
+
+#define VPD_DEV_ID_GENESIS 0x4300
+
+#define VPD_SIZE_YUKON 256
+#define VPD_SIZE_GENESIS 512
+#define VPD_SIZE 512
#define VPD_READ 0x0000
#define VPD_WRITE 0x8000
@@ -115,40 +146,44 @@
/* VPD status */
/* bit 7..1 reserved */
-#define VPD_VALID (1<<0) /* VPD data buffer, vpd_free_ro, */
- /* and vpd_free_rw valid */
+#define VPD_VALID (1<<0) /* VPD data buffer, vpd_free_ro, */
+ /* and vpd_free_rw valid */
/*
* VPD structs
*/
typedef struct s_vpd_status {
- unsigned short vpd_status ; /* VPD status, description see above */
- int vpd_free_ro ; /* unused bytes in read only area */
- int vpd_free_rw ; /* bytes available in read/write area */
+ unsigned short Align01; /* Alignment */
+ unsigned short vpd_status; /* VPD status, description see above */
+ int vpd_free_ro; /* unused bytes in read only area */
+ int vpd_free_rw; /* bytes available in read/write area */
} SK_VPD_STATUS;
typedef struct s_vpd {
- SK_VPD_STATUS v ; /* VPD status structure */
- char vpd_buf[VPD_SIZE] ; /* VPD buffer */
+ SK_VPD_STATUS v; /* VPD status structure */
+ char vpd_buf[VPD_SIZE]; /* VPD buffer */
+ int rom_size; /* VPD ROM Size from PCI_OUR_REG_2 */
+ int vpd_size; /* saved VPD-size */
} SK_VPD;
typedef struct s_vpd_para {
- unsigned int p_len ; /* parameter length */
- char *p_val ; /* points to the value */
+ unsigned int p_len; /* parameter length */
+ char *p_val; /* points to the value */
} SK_VPD_PARA;
/*
* structure of Large Resource Type Identifiers
*/
-/* was removed, because of alignment problems */
+
+/* was removed because of alignment problems */
/*
- * sturcture of VPD keywords
+ * structure of VPD keywords
*/
typedef struct s_vpd_key {
- char p_key[2] ; /* 2 bytes ID string */
- unsigned char p_len ; /* 1 byte length */
- char p_val ; /* start of the value string */
+ char p_key[2]; /* 2 bytes ID string */
+ unsigned char p_len; /* 1 byte length */
+ char p_val; /* start of the value string */
} SK_VPD_KEY;
@@ -172,39 +207,39 @@
#define VPD_IN32(pAC,IoC,Addr,pVal) SK_IN32(IoC,PCI_C(Addr),pVal)
#endif /* VPD_DO_IO */
#else /* SKDIAG */
-#define VPD_OUT8(pAC,Ioc,Addr,Val) { \
+#define VPD_OUT8(pAC,Ioc,Addr,Val) { \
if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciWriteCfgByte(pAC,Addr,Val) ; \
- else \
+ SkPciWriteCfgByte(pAC,Addr,Val); \
+ else \
SK_OUT8(pAC,PCI_C(Addr),Val); \
}
-#define VPD_OUT16(pAC,Ioc,Addr,Val) { \
+#define VPD_OUT16(pAC,Ioc,Addr,Val) { \
if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciWriteCfgWord(pAC,Addr,Val) ; \
+ SkPciWriteCfgWord(pAC,Addr,Val); \
else \
SK_OUT16(pAC,PCI_C(Addr),Val); \
}
-#define VPD_OUT32(pAC,Ioc,Addr,Val) { \
+#define VPD_OUT32(pAC,Ioc,Addr,Val) { \
if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciWriteCfgDWord(pAC,Addr,Val) ; \
+ SkPciWriteCfgDWord(pAC,Addr,Val); \
else \
SK_OUT32(pAC,PCI_C(Addr),Val); \
}
-#define VPD_IN8(pAC,Ioc,Addr,pVal) { \
+#define VPD_IN8(pAC,Ioc,Addr,pVal) { \
if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciReadCfgByte(pAC,Addr,pVal) ; \
+ SkPciReadCfgByte(pAC,Addr,pVal); \
else \
SK_IN8(pAC,PCI_C(Addr),pVal); \
}
-#define VPD_IN16(pAC,Ioc,Addr,pVal) { \
+#define VPD_IN16(pAC,Ioc,Addr,pVal) { \
if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciReadCfgWord(pAC,Addr,pVal) ; \
+ SkPciReadCfgWord(pAC,Addr,pVal); \
else \
SK_IN16(pAC,PCI_C(Addr),pVal); \
}
-#define VPD_IN32(pAC,Ioc,Addr,pVal) { \
+#define VPD_IN32(pAC,Ioc,Addr,pVal) { \
if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciReadCfgDWord(pAC,Addr,pVal) ; \
+ SkPciReadCfgDWord(pAC,Addr,pVal); \
else \
SK_IN32(pAC,PCI_C(Addr),pVal); \
}
@@ -213,50 +248,52 @@
/* function prototypes ********************************************************/
#ifndef SK_KR_PROTO
+#ifdef SKDIAG
extern SK_U32 VpdReadDWord(
SK_AC *pAC,
SK_IOC IoC,
- int addr) ;
+ int addr);
+#endif /* SKDIAG */
extern int VpdSetupPara(
SK_AC *pAC,
- char *key,
- char *buf,
- int len,
- int type,
- int op) ;
+ const char *key,
+ const char *buf,
+ int len,
+ int type,
+ int op);
extern SK_VPD_STATUS *VpdStat(
SK_AC *pAC,
- SK_IOC IoC) ;
+ SK_IOC IoC);
extern int VpdKeys(
SK_AC *pAC,
SK_IOC IoC,
char *buf,
- int *len,
- int *elements) ;
+ int *len,
+ int *elements);
extern int VpdRead(
SK_AC *pAC,
SK_IOC IoC,
- char *key,
+ const char *key,
char *buf,
- int *len) ;
+ int *len);
-extern SK_BOOL VpdMayWrite(
- char *key) ;
+extern SK_BOOL VpdMayWrite(
+ char *key);
extern int VpdWrite(
SK_AC *pAC,
SK_IOC IoC,
- char *key,
- char *buf) ;
+ const char *key,
+ const char *buf);
extern int VpdDelete(
SK_AC *pAC,
SK_IOC IoC,
- char *key) ;
+ char *key);
extern int VpdUpdate(
SK_AC *pAC,
@@ -265,34 +302,34 @@
extern void VpdErrLog(
SK_AC *pAC,
SK_IOC IoC,
- char *msg) ;
+ char *msg);
#ifdef SKDIAG
extern int VpdReadBlock(
SK_AC *pAC,
SK_IOC IoC,
char *buf,
- int addr,
- int len) ;
+ int addr,
+ int len);
extern int VpdWriteBlock(
SK_AC *pAC,
SK_IOC IoC,
char *buf,
- int addr,
- int len) ;
+ int addr,
+ int len);
#endif /* SKDIAG */
#else /* SK_KR_PROTO */
-extern SK_U32 VpdReadDWord() ;
-extern int VpdSetupPara() ;
-extern SK_VPD_STATUS *VpdStat() ;
-extern int VpdKeys() ;
-extern int VpdRead() ;
-extern SK_BOOL VpdMayWrite() ;
-extern int VpdWrite() ;
-extern int VpdDelete() ;
-extern int VpdUpdate() ;
-extern void VpdErrLog() ;
+extern SK_U32 VpdReadDWord();
+extern int VpdSetupPara();
+extern SK_VPD_STATUS *VpdStat();
+extern int VpdKeys();
+extern int VpdRead();
+extern SK_BOOL VpdMayWrite();
+extern int VpdWrite();
+extern int VpdDelete();
+extern int VpdUpdate();
+extern void VpdErrLog();
#endif /* SK_KR_PROTO */
#endif /* __INC_SKVPD_H_ */
diff -Nru a/drivers/net/sk98lin/h/xmac_ii.h b/drivers/net/sk98lin/h/xmac_ii.h
--- a/drivers/net/sk98lin/h/xmac_ii.h Sun Aug 3 13:14:51 2003
+++ b/drivers/net/sk98lin/h/xmac_ii.h Sun Aug 3 13:14:51 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: xmac_ii.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.28 $
- * Date: $Date: 2000/11/09 12:32:49 $
- * Purpose: Defines and Macros for XaQti's Gigabit Ethernet Controller
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.48 $
+ * Date: $Date: 2003/05/13 17:17:55 $
+ * Purpose: Defines and Macros for Gigabit Ethernet Controller
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2000 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,89 @@
* History:
*
* $Log: xmac_ii.h,v $
+ * Revision 1.48 2003/05/13 17:17:55 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.47 2003/03/31 07:37:25 mkarl
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.46 2003/01/28 09:47:45 rschmidt
+ * Added defines for copper MDI/MDIX configuration
+ * Added defines for LED Control Register
+ * Editorial changes
+ *
+ * Revision 1.45 2002/12/10 14:35:13 rschmidt
+ * Corrected defines for Extended PHY Specific Control
+ * Added defines for Ext. PHY Specific Ctrl 2 Reg. (Fiber specific)
+ *
+ * Revision 1.44 2002/12/09 14:58:41 rschmidt
+ * Added defines for Ext. PHY Specific Ctrl Reg. (downshift feature)
+ * Added 'GMR_FS_UN_SIZE'-Bit to Rx GMAC FIFO Flush Mask
+ *
+ * Revision 1.43 2002/12/05 10:14:45 rschmidt
+ * Added define for GMAC's Half Duplex Burst Mode
+ * Added define for Rx GMAC FIFO Flush Mask (default)
+ *
+ * Revision 1.42 2002/11/12 16:48:19 rschmidt
+ * Added defines for Cable Diagnostic Register (GPHY)
+ * Editorial changes
+ *
+ * Revision 1.41 2002/10/21 11:20:22 rschmidt
+ * Added bit GMR_FS_GOOD_FC to GMR_FS_ANY_ERR
+ * Editorial changes
+ *
+ * Revision 1.40 2002/10/14 14:54:14 rschmidt
+ * Added defines for GPHY Specific Status and GPHY Interrupt Status
+ * Added bits PHY_M_IS_AN_ERROR and PHY_M_IS_FIFO_ERROR to PHY_M_DEF_MSK
+ * Editorial changes
+ *
+ * Revision 1.39 2002/10/10 15:53:44 mkarl
+ * added some bit definitions for link speed status and LED's
+ *
+ * Revision 1.38 2002/08/21 16:23:46 rschmidt
+ * Added defines for PHY Specific Ctrl Reg
+ * Editorial changes
+ *
+ * Revision 1.37 2002/08/16 14:50:33 rschmidt
+ * Added defines for Auto-Neg. Advertisement YUKON Fiber (88E1011S only)
+ * Changed define PHY_M_DEF_MSK for GPHY IRQ Mask
+ * Editorial changes
+ *
+ * Revision 1.36 2002/08/12 13:21:10 rschmidt
+ * Added defines for different Broadcom PHY Ids
+ *
+ * Revision 1.35 2002/08/08 15:58:01 rschmidt
+ * Added defines for Manual LED Override register (YUKON)
+ * Editorial changes
+ *
+ * Revision 1.34 2002/07/31 17:23:36 rwahl
+ * Added define GMR_FS_ANY_ERR (analogous to XMR_FS_ANY_ERR).
+ *
+ * Revision 1.33 2002/07/23 16:03:37 rschmidt
+ * Added defines for GPHY registers
+ * Editorial changes
+ *
+ * Revision 1.32 2002/07/15 18:14:37 rwahl
+ * Added GMAC MIB counters definitions.
+ * Editorial changes.
+ *
+ * Revision 1.31 2002/07/15 15:42:50 rschmidt
+ * Removed defines from PHY specific reg. which are
+ * common to all PHYs
+ * Added defines for GMAC MIB Counters
+ * Editorial changes
+ *
+ * Revision 1.30 2002/06/05 08:22:12 rschmidt
+ * Changed defines for GMAC Rx Control Register and Rx Status
+ * Editorial changes
+ *
+ * Revision 1.29 2002/04/25 11:43:56 rschmidt
+ * Added define PHY_B_AS_PAUSE_MSK for BCom Pause Res.
+ * Added new registers and defines for YUKON (GMAC, GPHY)
+ * Added Receive Frame Status Encoding for YUKON
+ * Editorial changes
+ *
* Revision 1.28 2000/11/09 12:32:49 rassmann
* Renamed variables.
*
@@ -82,7 +166,7 @@
* Changed shifted constant to ULONG.
*
* Revision 1.11 1998/10/14 05:43:26 gklug
- * add: shift pause codeing
+ * add: shift pause coding
* fix: PAUSE bits definition
*
* Revision 1.10 1998/10/13 09:19:21 malthoff
@@ -135,61 +219,61 @@
/*
* XMAC II registers
*
- * The XMAC registers are 16 or 32 bits wide. The XMACs host processor
- * interface is set to 16 bit mode, therefore ALL registers will be
- * addressed with 16 bit accesses.
+ * The XMAC registers are 16 or 32 bits wide.
+ * The XMACs host processor interface is set to 16 bit mode,
+ * therefore ALL registers will be addressed with 16 bit accesses.
*
* The following macros are provided to access the XMAC registers
- * XM_IN16(), XM_OUT16, XM_IN32(), MX_OUT32(), XM_INADR(), XM_OUTADR(),
+ * XM_IN16(), XM_OUT16, XM_IN32(), XM_OUT32(), XM_INADR(), XM_OUTADR(),
* XM_INHASH(), and XM_OUTHASH().
* The macros are defined in SkGeHw.h.
*
* Note: NA reg = Network Address e.g DA, SA etc.
*
*/
-#define XM_MMU_CMD 0x0000 /* 16 bit r/w MMU Command Register */
+#define XM_MMU_CMD 0x0000 /* 16 bit r/w MMU Command Register */
/* 0x0004: reserved */
-#define XM_POFF 0x0008 /* 32 bit r/w Packet Offset Register */
-#define XM_BURST 0x000c /* 32 bit r/w Burst Register for half duplex*/
+#define XM_POFF 0x0008 /* 32 bit r/w Packet Offset Register */
+#define XM_BURST 0x000c /* 32 bit r/w Burst Register for half duplex*/
#define XM_1L_VLAN_TAG 0x0010 /* 16 bit r/w One Level VLAN Tag ID */
#define XM_2L_VLAN_TAG 0x0014 /* 16 bit r/w Two Level VLAN Tag ID */
/* 0x0018 - 0x001e: reserved */
-#define XM_TX_CMD 0x0020 /* 16 bit r/w Transmit Command Register */
-#define XM_TX_RT_LIM 0x0024 /* 16 bit r/w Transmit Retry Limit Register */
-#define XM_TX_STIME 0x0028 /* 16 bit r/w Transmit Slottime Register */
-#define XM_TX_IPG 0x002c /* 16 bit r/w Transmit Inter Packet Gap */
-#define XM_RX_CMD 0x0030 /* 16 bit r/w Receive Command Register */
-#define XM_PHY_ADDR 0x0034 /* 16 bit r/w PHY Address Register */
-#define XM_PHY_DATA 0x0038 /* 16 bit r/w PHY Data Register */
+#define XM_TX_CMD 0x0020 /* 16 bit r/w Transmit Command Register */
+#define XM_TX_RT_LIM 0x0024 /* 16 bit r/w Transmit Retry Limit Register */
+#define XM_TX_STIME 0x0028 /* 16 bit r/w Transmit Slottime Register */
+#define XM_TX_IPG 0x002c /* 16 bit r/w Transmit Inter Packet Gap */
+#define XM_RX_CMD 0x0030 /* 16 bit r/w Receive Command Register */
+#define XM_PHY_ADDR 0x0034 /* 16 bit r/w PHY Address Register */
+#define XM_PHY_DATA 0x0038 /* 16 bit r/w PHY Data Register */
/* 0x003c: reserved */
-#define XM_GP_PORT 0x0040 /* 32 bit r/w General Purpose Port Register */
-#define XM_IMSK 0x0044 /* 16 bit r/w Interrupt Mask Register */
-#define XM_ISRC 0x0048 /* 16 bit ro Interrupt Status Register */
-#define XM_HW_CFG 0x004c /* 16 bit r/w Hardware Config Register */
+#define XM_GP_PORT 0x0040 /* 32 bit r/w General Purpose Port Register */
+#define XM_IMSK 0x0044 /* 16 bit r/w Interrupt Mask Register */
+#define XM_ISRC 0x0048 /* 16 bit r/o Interrupt Status Register */
+#define XM_HW_CFG 0x004c /* 16 bit r/w Hardware Config Register */
/* 0x0050 - 0x005e: reserved */
-#define XM_TX_LO_WM 0x0060 /* 16 bit r/w Tx FIFO Low Water Mark */
-#define XM_TX_HI_WM 0x0062 /* 16 bit r/w Tx FIFO High Water Mark */
-#define XM_TX_THR 0x0064 /* 16 bit r/w Tx Request Threshold */
-#define XM_HT_THR 0x0066 /* 16 bit r/w Host Request Threshold */
-#define XM_PAUSE_DA 0x0068 /* NA reg r/w Pause Destination Address */
+#define XM_TX_LO_WM 0x0060 /* 16 bit r/w Tx FIFO Low Water Mark */
+#define XM_TX_HI_WM 0x0062 /* 16 bit r/w Tx FIFO High Water Mark */
+#define XM_TX_THR 0x0064 /* 16 bit r/w Tx Request Threshold */
+#define XM_HT_THR 0x0066 /* 16 bit r/w Host Request Threshold */
+#define XM_PAUSE_DA 0x0068 /* NA reg r/w Pause Destination Address */
/* 0x006e: reserved */
-#define XM_CTL_PARA 0x0070 /* 32 bit r/w Control Parameter Register */
+#define XM_CTL_PARA 0x0070 /* 32 bit r/w Control Parameter Register */
#define XM_MAC_OPCODE 0x0074 /* 16 bit r/w Opcode for MAC control frames */
#define XM_MAC_PTIME 0x0076 /* 16 bit r/w Pause time for MAC ctrl frames*/
-#define XM_TX_STAT 0x0078 /* 32 bit ro Tx Status LIFO Register */
+#define XM_TX_STAT 0x0078 /* 32 bit r/o Tx Status LIFO Register */
- /* 0x0080 - 0x00fc: 16 NA reg r/w Exakt Match Address Registers */
- /* use the XM_EMX() macro to address */
+ /* 0x0080 - 0x00fc: 16 NA reg r/w Exact Match Address Registers */
+ /* use the XM_EXM() macro to address */
#define XM_EXM_START 0x0080 /* r/w Start Address of the EXM Regs */
/*
* XM_EXM(Reg)
*
- * returns the XMAC address offset off specified Exakt Match Addr Reg
+ * returns the XMAC address offset of specified Exact Match Addr Reg
*
* para: Reg EXM register to addr (0 .. 15)
*
- * usage: XM_INADDR(XMAC_1,pAC,XM_EXM(i),&val[i]) ;
+ * usage: XM_INADDR(IoC, MAC_1, XM_EXM(i), &val[i]);
*/
#define XM_EXM(Reg) (XM_EXM_START + ((Reg) << 3))
@@ -199,78 +283,78 @@
#define XM_RX_LO_WM 0x0118 /* 16 bit r/w Receive Low Water Mark */
#define XM_RX_HI_WM 0x011a /* 16 bit r/w Receive High Water Mark */
#define XM_RX_THR 0x011c /* 32 bit r/w Receive Request Threshold */
-#define XM_DEV_ID 0x0120 /* 32 bit ro Device ID Register */
+#define XM_DEV_ID 0x0120 /* 32 bit r/o Device ID Register */
#define XM_MODE 0x0124 /* 32 bit r/w Mode Register */
-#define XM_LSA 0x0128 /* NA reg ro Last Source Register */
+#define XM_LSA 0x0128 /* NA reg r/o Last Source Register */
/* 0x012e: reserved */
-#define XM_TS_READ 0x0130 /* 32 bit ro TimeStamp Read Regeister */
-#define XM_TS_LOAD 0x0134 /* 32 bit ro TimeStamp Load Value */
+#define XM_TS_READ 0x0130 /* 32 bit r/o Time Stamp Read Register */
+#define XM_TS_LOAD 0x0134 /* 32 bit r/o Time Stamp Load Value */
/* 0x0138 - 0x01fe: reserved */
#define XM_STAT_CMD 0x0200 /* 16 bit r/w Statistics Command Register */
-#define XM_RX_CNT_EV 0x0204 /* 32 bit ro Rx Counter Event Register */
-#define XM_TX_CNT_EV 0x0208 /* 32 bit ro Tx Counter Event Register */
+#define XM_RX_CNT_EV 0x0204 /* 32 bit r/o Rx Counter Event Register */
+#define XM_TX_CNT_EV 0x0208 /* 32 bit r/o Tx Counter Event Register */
#define XM_RX_EV_MSK 0x020c /* 32 bit r/w Rx Counter Event Mask */
#define XM_TX_EV_MSK 0x0210 /* 32 bit r/w Tx Counter Event Mask */
/* 0x0204 - 0x027e: reserved */
-#define XM_TXF_OK 0x0280 /* 32 bit ro Frames Transmitted OK Conuter */
-#define XM_TXO_OK_HI 0x0284 /* 32 bit ro Octets Transmitted OK High Cnt*/
-#define XM_TXO_OK_LO 0x0288 /* 32 bit ro Octets Transmitted OK Low Cnt */
-#define XM_TXF_BC_OK 0x028c /* 32 bit ro Broadcast Frames Xmitted OK */
-#define XM_TXF_MC_OK 0x0290 /* 32 bit ro Multicast Frames Xmitted OK */
-#define XM_TXF_UC_OK 0x0294 /* 32 bit ro Unicast Frames Xmitted OK */
-#define XM_TXF_LONG 0x0298 /* 32 bit ro Tx Long Frame Counter */
-#define XM_TXE_BURST 0x029c /* 32 bit ro Tx Burst Event Counter */
-#define XM_TXF_MPAUSE 0x02a0 /* 32 bit ro Tx Pause MAC Ctrl Frame Cnt */
-#define XM_TXF_MCTRL 0x02a4 /* 32 bit ro Tx MAC Ctrl Frame Counter */
-#define XM_TXF_SNG_COL 0x02a8 /* 32 bit ro Tx Single Colliosion Counter */
-#define XM_TXF_MUL_COL 0x02ac /* 32 bit ro Tx Multiple Collision Counter */
-#define XM_TXF_ABO_COL 0x02b0 /* 32 bit ro Tx aborted due to Exessive Col*/
-#define XM_TXF_LAT_COL 0x02b4 /* 32 bit ro Tx Late Collision Counter */
-#define XM_TXF_DEF 0x02b8 /* 32 bit ro Tx Deferred Frame Counter */
-#define XM_TXF_EX_DEF 0x02bc /* 32 bit ro Tx Excessive Deferall Counter */
-#define XM_TXE_FIFO_UR 0x02c0 /* 32 bit ro Tx FIFO Underrun Event Cnt */
-#define XM_TXE_CS_ERR 0x02c4 /* 32 bit ro Tx Carrier Sence Error Cnt */
-#define XM_TXP_UTIL 0x02c8 /* 32 bit ro Tx Utilization in % */
+#define XM_TXF_OK 0x0280 /* 32 bit r/o Frames Transmitted OK Conuter */
+#define XM_TXO_OK_HI 0x0284 /* 32 bit r/o Octets Transmitted OK High Cnt*/
+#define XM_TXO_OK_LO 0x0288 /* 32 bit r/o Octets Transmitted OK Low Cnt */
+#define XM_TXF_BC_OK 0x028c /* 32 bit r/o Broadcast Frames Xmitted OK */
+#define XM_TXF_MC_OK 0x0290 /* 32 bit r/o Multicast Frames Xmitted OK */
+#define XM_TXF_UC_OK 0x0294 /* 32 bit r/o Unicast Frames Xmitted OK */
+#define XM_TXF_LONG 0x0298 /* 32 bit r/o Tx Long Frame Counter */
+#define XM_TXE_BURST 0x029c /* 32 bit r/o Tx Burst Event Counter */
+#define XM_TXF_MPAUSE 0x02a0 /* 32 bit r/o Tx Pause MAC Ctrl Frame Cnt */
+#define XM_TXF_MCTRL 0x02a4 /* 32 bit r/o Tx MAC Ctrl Frame Counter */
+#define XM_TXF_SNG_COL 0x02a8 /* 32 bit r/o Tx Single Collision Counter */
+#define XM_TXF_MUL_COL 0x02ac /* 32 bit r/o Tx Multiple Collision Counter */
+#define XM_TXF_ABO_COL 0x02b0 /* 32 bit r/o Tx aborted due to Exces. Col. */
+#define XM_TXF_LAT_COL 0x02b4 /* 32 bit r/o Tx Late Collision Counter */
+#define XM_TXF_DEF 0x02b8 /* 32 bit r/o Tx Deferred Frame Counter */
+#define XM_TXF_EX_DEF 0x02bc /* 32 bit r/o Tx Excessive Deferall Counter */
+#define XM_TXE_FIFO_UR 0x02c0 /* 32 bit r/o Tx FIFO Underrun Event Cnt */
+#define XM_TXE_CS_ERR 0x02c4 /* 32 bit r/o Tx Carrier Sense Error Cnt */
+#define XM_TXP_UTIL 0x02c8 /* 32 bit r/o Tx Utilization in % */
/* 0x02cc - 0x02ce: reserved */
-#define XM_TXF_64B 0x02d0 /* 32 bit ro 64 Byte Tx Frame Counter */
-#define XM_TXF_127B 0x02d4 /* 32 bit ro 65-127 Byte Tx Frame Counter */
-#define XM_TXF_255B 0x02d8 /* 32 bit ro 128-255 Byte Tx Frame Counter */
-#define XM_TXF_511B 0x02dc /* 32 bit ro 256-511 Byte Tx Frame Counter */
-#define XM_TXF_1023B 0x02e0 /* 32 bit ro 512-1023 Byte Tx Frame Counter*/
-#define XM_TXF_MAX_SZ 0x02e4 /* 32 bit ro 1024-MaxSize Byte Tx Frame Cnt*/
+#define XM_TXF_64B 0x02d0 /* 32 bit r/o 64 Byte Tx Frame Counter */
+#define XM_TXF_127B 0x02d4 /* 32 bit r/o 65-127 Byte Tx Frame Counter */
+#define XM_TXF_255B 0x02d8 /* 32 bit r/o 128-255 Byte Tx Frame Counter */
+#define XM_TXF_511B 0x02dc /* 32 bit r/o 256-511 Byte Tx Frame Counter */
+#define XM_TXF_1023B 0x02e0 /* 32 bit r/o 512-1023 Byte Tx Frame Counter*/
+#define XM_TXF_MAX_SZ 0x02e4 /* 32 bit r/o 1024-MaxSize Byte Tx Frame Cnt*/
/* 0x02e8 - 0x02fe: reserved */
-#define XM_RXF_OK 0x0300 /* 32 bit ro Frames Received OK */
-#define XM_RXO_OK_HI 0x0304 /* 32 bit ro Octets Received OK High Cnt */
-#define XM_RXO_OK_LO 0x0308 /* 32 bit ro Octets Received OK Low Counter*/
-#define XM_RXF_BC_OK 0x030c /* 32 bit ro Broadcast Frames Received OK */
-#define XM_RXF_MC_OK 0x0310 /* 32 bit ro Multicast Frames Received OK */
-#define XM_RXF_UC_OK 0x0314 /* 32 bit ro Unicast Frames Received OK */
-#define XM_RXF_MPAUSE 0x0318 /* 32 bit ro Rx Pause MAC Ctrl Frame Cnt */
-#define XM_RXF_MCTRL 0x031c /* 32 bit ro Rx MAC Ctrl Frame Counter */
-#define XM_RXF_INV_MP 0x0320 /* 32 bit ro Rx invalid Pause Frame Cnt */
-#define XM_RXF_INV_MOC 0x0324 /* 32 bit ro Rx Frames with inv. MAC Opcode*/
-#define XM_RXE_BURST 0x0328 /* 32 bit ro Rx Burst Event Counter */
-#define XM_RXE_FMISS 0x032c /* 32 bit ro Rx Missed Frames Event Cnt */
-#define XM_RXF_FRA_ERR 0x0330 /* 32 bit ro Rx Framing Error Counter */
-#define XM_RXE_FIFO_OV 0x0334 /* 32 bit ro Rx FIFO overflow Event Cnt */
-#define XM_RXF_JAB_PKT 0x0338 /* 32 bit ro Rx Jabber Packet Frame Cnt */
-#define XM_RXE_CAR_ERR 0x033c /* 32 bit ro Rx Carrier Event Error Cnt */
-#define XM_RXF_LEN_ERR 0x0340 /* 32 bit ro Rx in Range Length Error */
-#define XM_RXE_SYM_ERR 0x0344 /* 32 bit ro Rx Symbol Error Counter */
-#define XM_RXE_SHT_ERR 0x0348 /* 32 bit ro Rx Short Event Error Cnt */
-#define XM_RXE_RUNT 0x034c /* 32 bit ro Rx Runt Event Counter */
-#define XM_RXF_LNG_ERR 0x0350 /* 32 bit ro Rx Frame too Long Error Cnt */
-#define XM_RXF_FCS_ERR 0x0354 /* 32 bit ro Rx Frame Check Seq. Error Cnt */
+#define XM_RXF_OK 0x0300 /* 32 bit r/o Frames Received OK */
+#define XM_RXO_OK_HI 0x0304 /* 32 bit r/o Octets Received OK High Cnt */
+#define XM_RXO_OK_LO 0x0308 /* 32 bit r/o Octets Received OK Low Counter*/
+#define XM_RXF_BC_OK 0x030c /* 32 bit r/o Broadcast Frames Received OK */
+#define XM_RXF_MC_OK 0x0310 /* 32 bit r/o Multicast Frames Received OK */
+#define XM_RXF_UC_OK 0x0314 /* 32 bit r/o Unicast Frames Received OK */
+#define XM_RXF_MPAUSE 0x0318 /* 32 bit r/o Rx Pause MAC Ctrl Frame Cnt */
+#define XM_RXF_MCTRL 0x031c /* 32 bit r/o Rx MAC Ctrl Frame Counter */
+#define XM_RXF_INV_MP 0x0320 /* 32 bit r/o Rx invalid Pause Frame Cnt */
+#define XM_RXF_INV_MOC 0x0324 /* 32 bit r/o Rx Frames with inv. MAC Opcode*/
+#define XM_RXE_BURST 0x0328 /* 32 bit r/o Rx Burst Event Counter */
+#define XM_RXE_FMISS 0x032c /* 32 bit r/o Rx Missed Frames Event Cnt */
+#define XM_RXF_FRA_ERR 0x0330 /* 32 bit r/o Rx Framing Error Counter */
+#define XM_RXE_FIFO_OV 0x0334 /* 32 bit r/o Rx FIFO overflow Event Cnt */
+#define XM_RXF_JAB_PKT 0x0338 /* 32 bit r/o Rx Jabber Packet Frame Cnt */
+#define XM_RXE_CAR_ERR 0x033c /* 32 bit r/o Rx Carrier Event Error Cnt */
+#define XM_RXF_LEN_ERR 0x0340 /* 32 bit r/o Rx in Range Length Error */
+#define XM_RXE_SYM_ERR 0x0344 /* 32 bit r/o Rx Symbol Error Counter */
+#define XM_RXE_SHT_ERR 0x0348 /* 32 bit r/o Rx Short Event Error Cnt */
+#define XM_RXE_RUNT 0x034c /* 32 bit r/o Rx Runt Event Counter */
+#define XM_RXF_LNG_ERR 0x0350 /* 32 bit r/o Rx Frame too Long Error Cnt */
+#define XM_RXF_FCS_ERR 0x0354 /* 32 bit r/o Rx Frame Check Seq. Error Cnt */
/* 0x0358 - 0x035a: reserved */
-#define XM_RXF_CEX_ERR 0x035c /* 32 bit ro Rx Carrier Ext Error Frame Cnt*/
-#define XM_RXP_UTIL 0x0360 /* 32 bit ro Rx Utilization in % */
+#define XM_RXF_CEX_ERR 0x035c /* 32 bit r/o Rx Carrier Ext Error Frame Cnt*/
+#define XM_RXP_UTIL 0x0360 /* 32 bit r/o Rx Utilization in % */
/* 0x0364 - 0x0366: reserved */
-#define XM_RXF_64B 0x0368 /* 32 bit ro 64 Byte Rx Frame Counter */
-#define XM_RXF_127B 0x036c /* 32 bit ro 65-127 Byte Rx Frame Counter */
-#define XM_RXF_255B 0x0370 /* 32 bit ro 128-255 Byte Rx Frame Counter */
-#define XM_RXF_511B 0x0374 /* 32 bit ro 256-511 Byte Rx Frame Counter */
-#define XM_RXF_1023B 0x0378 /* 32 bit ro 512-1023 Byte Rx Frame Counter*/
-#define XM_RXF_MAX_SZ 0x037c /* 32 bit ro 1024-MaxSize Byte Rx Frame Cnt*/
+#define XM_RXF_64B 0x0368 /* 32 bit r/o 64 Byte Rx Frame Counter */
+#define XM_RXF_127B 0x036c /* 32 bit r/o 65-127 Byte Rx Frame Counter */
+#define XM_RXF_255B 0x0370 /* 32 bit r/o 128-255 Byte Rx Frame Counter */
+#define XM_RXF_511B 0x0374 /* 32 bit r/o 256-511 Byte Rx Frame Counter */
+#define XM_RXF_1023B 0x0378 /* 32 bit r/o 512-1023 Byte Rx Frame Counter*/
+#define XM_RXF_MAX_SZ 0x037c /* 32 bit r/o 1024-MaxSize Byte Rx Frame Cnt*/
/* 0x02e8 - 0x02fe: reserved */
@@ -279,104 +363,104 @@
* XMAC Bit Definitions
*
* If the bit access behaviour differs from the register access behaviour
- * (r/w, ro) this is documented after the bit number. The following bit
- * access behaviours are used:
+ * (r/w, r/o) this is documented after the bit number.
+ * The following bit access behaviours are used:
* (sc) self clearing
* (ro) read only
*/
-/* XM_MMU_CMD 16 bit r/w MMU Comamnd Register */
+/* XM_MMU_CMD 16 bit r/w MMU Command Register */
/* Bit 15..13: reserved */
#define XM_MMU_PHY_RDY (1<<12) /* Bit 12: PHY Read Ready */
#define XM_MMU_PHY_BUSY (1<<11) /* Bit 11: PHY Busy */
#define XM_MMU_IGN_PF (1<<10) /* Bit 10: Ignore Pause Frame */
-#define XM_MMU_MAC_LB (1<<9) /* Bit 9: Enable MAC Loopback */
- /* Bit 8: reserved */
-#define XM_MMU_FRC_COL (1<<7) /* Bit 7: Force Collision */
-#define XM_MMU_SIM_COL (1<<6) /* Bit 6: Simulate Collision */
-#define XM_MMU_NO_PRE (1<<5) /* Bit 5: No MDIO Preamble */
-#define XM_MMU_GMII_FD (1<<4) /* Bit 4: GMII uses Full Duplex */
-#define XM_MMU_RAT_CTRL (1<<3) /* Bit 3: Enable Rate Control */
-#define XM_MMU_GMII_LOOP (1<<2) /* Bit 2: PHY is in Lookback Mode */
-#define XM_MMU_ENA_RX (1<<1) /* Bit 1: Enable Receiver */
-#define XM_MMU_ENA_TX (1<<0) /* Bit 0: Enable Transmitter */
+#define XM_MMU_MAC_LB (1<<9) /* Bit 9: Enable MAC Loopback */
+ /* Bit 8: reserved */
+#define XM_MMU_FRC_COL (1<<7) /* Bit 7: Force Collision */
+#define XM_MMU_SIM_COL (1<<6) /* Bit 6: Simulate Collision */
+#define XM_MMU_NO_PRE (1<<5) /* Bit 5: No MDIO Preamble */
+#define XM_MMU_GMII_FD (1<<4) /* Bit 4: GMII uses Full Duplex */
+#define XM_MMU_RAT_CTRL (1<<3) /* Bit 3: Enable Rate Control */
+#define XM_MMU_GMII_LOOP (1<<2) /* Bit 2: PHY is in Loopback Mode */
+#define XM_MMU_ENA_RX (1<<1) /* Bit 1: Enable Receiver */
+#define XM_MMU_ENA_TX (1<<0) /* Bit 0: Enable Transmitter */
/* XM_TX_CMD 16 bit r/w Transmit Command Register */
/* Bit 15..7: reserved */
-#define XM_TX_BK2BK (1<<6) /* Bit 6: Ignor Carrier Sense (tx Bk2Bk)*/
-#define XM_TX_ENC_BYP (1<<5) /* Bit 5: Set Encoder in Bypass Mode */
-#define XM_TX_SAM_LINE (1<<4) /* Bit 4: (sc) Start utilization calculation */
-#define XM_TX_NO_GIG_MD (1<<3) /* Bit 3: Disable Carrier Extension */
-#define XM_TX_NO_PRE (1<<2) /* Bit 2: Disable Preamble Generation */
-#define XM_TX_NO_CRC (1<<1) /* Bit 1: Disable CRC Generation */
-#define XM_TX_AUTO_PAD (1<<0) /* Bit 0: Enable Automatic Padding */
+#define XM_TX_BK2BK (1<<6) /* Bit 6: Ignor Carrier Sense (Tx Bk2Bk)*/
+#define XM_TX_ENC_BYP (1<<5) /* Bit 5: Set Encoder in Bypass Mode */
+#define XM_TX_SAM_LINE (1<<4) /* Bit 4: (sc) Start utilization calculation */
+#define XM_TX_NO_GIG_MD (1<<3) /* Bit 3: Disable Carrier Extension */
+#define XM_TX_NO_PRE (1<<2) /* Bit 2: Disable Preamble Generation */
+#define XM_TX_NO_CRC (1<<1) /* Bit 1: Disable CRC Generation */
+#define XM_TX_AUTO_PAD (1<<0) /* Bit 0: Enable Automatic Padding */
/* XM_TX_RT_LIM 16 bit r/w Transmit Retry Limit Register */
/* Bit 15..5: reserved */
-#define XM_RT_LIM_MSK 0x1f /* Bit 4..0: Tx Retry Limit */
+#define XM_RT_LIM_MSK 0x1f /* Bit 4..0: Tx Retry Limit */
/* XM_TX_STIME 16 bit r/w Transmit Slottime Register */
/* Bit 15..7: reserved */
-#define XM_STIME_MSK 0x7f /* Bit 6..0: Tx Slottime bits */
+#define XM_STIME_MSK 0x7f /* Bit 6..0: Tx Slottime bits */
/* XM_TX_IPG 16 bit r/w Transmit Inter Packet Gap */
/* Bit 15..8: reserved */
-#define XM_IPG_MSK 0xff /* Bit 7..0: IPG value bits */
+#define XM_IPG_MSK 0xff /* Bit 7..0: IPG value bits */
/* XM_RX_CMD 16 bit r/w Receive Command Register */
/* Bit 15..9: reserved */
-#define XM_RX_LENERR_OK (1<<8) /* Bit 8 don't set Rx Err bit for */
+#define XM_RX_LENERR_OK (1<<8) /* Bit 8 don't set Rx Err bit for */
/* inrange error packets */
-#define XM_RX_BIG_PK_OK (1<<7) /* Bit 7 don't set Rx Err bit for */
+#define XM_RX_BIG_PK_OK (1<<7) /* Bit 7 don't set Rx Err bit for */
/* jumbo packets */
-#define XM_RX_IPG_CAP (1<<6) /* Bit 6 repl. type field with IPG */
-#define XM_RX_TP_MD (1<<5) /* Bit 5: Enable transparent Mode */
-#define XM_RX_STRIP_FCS (1<<4) /* Bit 4: Enable FCS Stripping */
-#define XM_RX_SELF_RX (1<<3) /* Bit 3: Enable Rx of own packets */
-#define XM_RX_SAM_LINE (1<<2) /* Bit 2: (sc) Start utilization calculation */
-#define XM_RX_STRIP_PAD (1<<1) /* Bit 1: Strip pad bytes of rx frames */
-#define XM_RX_DIS_CEXT (1<<0) /* Bit 0: Disable carrier ext. check */
+#define XM_RX_IPG_CAP (1<<6) /* Bit 6 repl. type field with IPG */
+#define XM_RX_TP_MD (1<<5) /* Bit 5: Enable transparent Mode */
+#define XM_RX_STRIP_FCS (1<<4) /* Bit 4: Enable FCS Stripping */
+#define XM_RX_SELF_RX (1<<3) /* Bit 3: Enable Rx of own packets */
+#define XM_RX_SAM_LINE (1<<2) /* Bit 2: (sc) Start utilization calculation */
+#define XM_RX_STRIP_PAD (1<<1) /* Bit 1: Strip pad bytes of Rx frames */
+#define XM_RX_DIS_CEXT (1<<0) /* Bit 0: Disable carrier ext. check */
/* XM_PHY_ADDR 16 bit r/w PHY Address Register */
/* Bit 15..5: reserved */
-#define XM_PHY_ADDR_SZ 0x1f /* Bit 4..0: PHY Address bits */
+#define XM_PHY_ADDR_SZ 0x1f /* Bit 4..0: PHY Address bits */
/* XM_GP_PORT 32 bit r/w General Purpose Port Register */
/* Bit 31..7: reserved */
-#define XM_GP_ANIP (1L<<6) /* Bit 6: (ro) Auto Negotiation in Progress */
-#define XM_GP_FRC_INT (1L<<5) /* Bit 5: (sc) Force Interrupt */
- /* Bit 4: reserved */
-#define XM_GP_RES_MAC (1L<<3) /* Bit 3: (sc) Reset MAC and FIFOs */
-#define XM_GP_RES_STAT (1L<<2) /* Bit 2: (sc) Reset the statistics module */
- /* Bit 1: reserved */
-#define XM_GP_INP_ASS (1L<<0) /* Bit 0: (ro) GP Input Pin asserted */
+#define XM_GP_ANIP (1L<<6) /* Bit 6: (ro) Auto-Neg. in progress */
+#define XM_GP_FRC_INT (1L<<5) /* Bit 5: (sc) Force Interrupt */
+ /* Bit 4: reserved */
+#define XM_GP_RES_MAC (1L<<3) /* Bit 3: (sc) Reset MAC and FIFOs */
+#define XM_GP_RES_STAT (1L<<2) /* Bit 2: (sc) Reset the statistics module */
+ /* Bit 1: reserved */
+#define XM_GP_INP_ASS (1L<<0) /* Bit 0: (ro) GP Input Pin asserted */
/* XM_IMSK 16 bit r/w Interrupt Mask Register */
-/* XM_ISRC 16 bit ro Interrupt Status Register */
+/* XM_ISRC 16 bit r/o Interrupt Status Register */
/* Bit 15: reserved */
#define XM_IS_LNK_AE (1<<14) /* Bit 14: Link Asynchronous Event */
#define XM_IS_TX_ABORT (1<<13) /* Bit 13: Transmit Abort, late Col. etc */
#define XM_IS_FRC_INT (1<<12) /* Bit 12: Force INT bit set in GP */
#define XM_IS_INP_ASS (1<<11) /* Bit 11: Input Asserted, GP bit 0 set */
#define XM_IS_LIPA_RC (1<<10) /* Bit 10: Link Partner requests config */
-#define XM_IS_RX_PAGE (1<<9) /* Bit 9: Page Received */
-#define XM_IS_TX_PAGE (1<<8) /* Bit 8: Next Page Loaded for Transmit */
-#define XM_IS_AND (1<<7) /* Bit 7: Auto Negotiation Done */
-#define XM_IS_TSC_OV (1<<6) /* Bit 6: Time Stamp Counter Overflow */
-#define XM_IS_RXC_OV (1<<5) /* Bit 5: Rx Counter Event Overflow */
-#define XM_IS_TXC_OV (1<<4) /* Bit 4: Tx Counter Event Overflow */
-#define XM_IS_RXF_OV (1<<3) /* Bit 3: Receive FIFO Overflow */
-#define XM_IS_TXF_UR (1<<2) /* Bit 2: Transmit FIFO Underrun */
-#define XM_IS_TX_COMP (1<<1) /* Bit 1: Frame Tx Complete */
-#define XM_IS_RX_COMP (1<<0) /* Bit 0: Frame Rx Complete */
+#define XM_IS_RX_PAGE (1<<9) /* Bit 9: Page Received */
+#define XM_IS_TX_PAGE (1<<8) /* Bit 8: Next Page Loaded for Transmit */
+#define XM_IS_AND (1<<7) /* Bit 7: Auto-Negotiation Done */
+#define XM_IS_TSC_OV (1<<6) /* Bit 6: Time Stamp Counter Overflow */
+#define XM_IS_RXC_OV (1<<5) /* Bit 5: Rx Counter Event Overflow */
+#define XM_IS_TXC_OV (1<<4) /* Bit 4: Tx Counter Event Overflow */
+#define XM_IS_RXF_OV (1<<3) /* Bit 3: Receive FIFO Overflow */
+#define XM_IS_TXF_UR (1<<2) /* Bit 2: Transmit FIFO Underrun */
+#define XM_IS_TX_COMP (1<<1) /* Bit 1: Frame Tx Complete */
+#define XM_IS_RX_COMP (1<<0) /* Bit 0: Frame Rx Complete */
#define XM_DEF_MSK (~(XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE |\
XM_IS_AND | XM_IS_RXC_OV | XM_IS_TXC_OV | XM_IS_TXF_UR))
@@ -384,50 +468,50 @@
/* XM_HW_CFG 16 bit r/w Hardware Config Register */
/* Bit 15.. 4: reserved */
-#define XM_HW_GEN_EOP (1<<3) /* Bit 3: generate End of Packet pulse */
-#define XM_HW_COM4SIG (1<<2) /* Bit 2: use Comma Detect for Sig. Det.*/
- /* Bit 1: reserved */
-#define XM_HW_GMII_MD (1<<0) /* Bit 0: GMII Interface selected */
+#define XM_HW_GEN_EOP (1<<3) /* Bit 3: generate End of Packet pulse */
+#define XM_HW_COM4SIG (1<<2) /* Bit 2: use Comma Detect for Sig. Det.*/
+ /* Bit 1: reserved */
+#define XM_HW_GMII_MD (1<<0) /* Bit 0: GMII Interface selected */
/* XM_TX_LO_WM 16 bit r/w Tx FIFO Low Water Mark */
/* XM_TX_HI_WM 16 bit r/w Tx FIFO High Water Mark */
/* Bit 15..10 reserved */
-#define XM_TX_WM_MSK 0x01ff /* Bit 9.. 0 Tx FIFO Watermark bits */
+#define XM_TX_WM_MSK 0x01ff /* Bit 9.. 0 Tx FIFO Watermark bits */
/* XM_TX_THR 16 bit r/w Tx Request Threshold */
/* XM_HT_THR 16 bit r/w Host Request Threshold */
-/* XM_RX_THR 16 bit r/w Receive Request Threshold */
+/* XM_RX_THR 16 bit r/w Rx Request Threshold */
/* Bit 15..11 reserved */
-#define XM_THR_MSK 0x03ff /* Bit 10.. 0 Tx FIFO Watermark bits */
+#define XM_THR_MSK 0x03ff /* Bit 10.. 0 Rx/Tx Request Threshold bits */
-/* XM_TX_STAT 32 bit ro Tx Status LIFO Register */
+/* XM_TX_STAT 32 bit r/o Tx Status LIFO Register */
#define XM_ST_VALID (1UL<<31) /* Bit 31: Status Valid */
#define XM_ST_BYTE_CNT (0x3fffL<<17) /* Bit 30..17: Tx frame Length */
#define XM_ST_RETRY_CNT (0x1fL<<12) /* Bit 16..12: Retry Count */
#define XM_ST_EX_COL (1L<<11) /* Bit 11: Excessive Collisions */
#define XM_ST_EX_DEF (1L<<10) /* Bit 10: Excessive Deferral */
-#define XM_ST_BURST (1L<<9) /* Bit 9: p. xmitted in burst md*/
-#define XM_ST_DEFER (1L<<8) /* Bit 8: packet was defered */
-#define XM_ST_BC (1L<<7) /* Bit 7: Broadcast packet */
-#define XM_ST_MC (1L<<6) /* Bit 6: Multicast packet */
-#define XM_ST_UC (1L<<5) /* Bit 5: Unicast packet */
-#define XM_ST_TX_UR (1L<<4) /* Bit 4: FIFO Underrun occurred */
-#define XM_ST_CS_ERR (1L<<3) /* Bit 3: Carrier Sense Error */
-#define XM_ST_LAT_COL (1L<<2) /* Bit 2: Late Collision Error */
-#define XM_ST_MUL_COL (1L<<1) /* Bit 1: Multiple Collisions */
-#define XM_ST_SGN_COL (1L<<0) /* Bit 0: Single Collision */
+#define XM_ST_BURST (1L<<9) /* Bit 9: p. xmitted in burst md*/
+#define XM_ST_DEFER (1L<<8) /* Bit 8: packet was defered */
+#define XM_ST_BC (1L<<7) /* Bit 7: Broadcast packet */
+#define XM_ST_MC (1L<<6) /* Bit 6: Multicast packet */
+#define XM_ST_UC (1L<<5) /* Bit 5: Unicast packet */
+#define XM_ST_TX_UR (1L<<4) /* Bit 4: FIFO Underrun occured */
+#define XM_ST_CS_ERR (1L<<3) /* Bit 3: Carrier Sense Error */
+#define XM_ST_LAT_COL (1L<<2) /* Bit 2: Late Collision Error */
+#define XM_ST_MUL_COL (1L<<1) /* Bit 1: Multiple Collisions */
+#define XM_ST_SGN_COL (1L<<0) /* Bit 0: Single Collision */
/* XM_RX_LO_WM 16 bit r/w Receive Low Water Mark */
/* XM_RX_HI_WM 16 bit r/w Receive High Water Mark */
/* Bit 15..11: reserved */
-#define XM_RX_WM_MSK 0x03ff /* Bit 11.. 0: Rx FIFO Watermark bits */
+#define XM_RX_WM_MSK 0x03ff /* Bit 11.. 0: Rx FIFO Watermark bits */
-/* XM_DEV_ID 32 bit ro Device ID Register */
-#define XM_DEV_OUI (0x00ffffffUL<<8) /* Bit 31..8: Device OUI */
-#define XM_DEV_REV (0x07L << 5) /* Bit 7..5: Chip Rev Num */
+/* XM_DEV_ID 32 bit r/o Device ID Register */
+#define XM_DEV_OUI (0x00ffffffUL<<8) /* Bit 31..8: Device OUI */
+#define XM_DEV_REV (0x07L << 5) /* Bit 7..5: Chip Rev Num */
/* XM_MODE 32 bit r/w Mode Register */
@@ -435,10 +519,10 @@
#define XM_MD_ENA_REJ (1L<<26) /* Bit 26: Enable Frame Reject */
#define XM_MD_SPOE_E (1L<<25) /* Bit 25: Send Pause on Edge */
/* extern generated */
-#define XM_MD_TX_REP (1L<<24) /* Bit 24: Transmit Repeater Mode*/
-#define XM_MD_SPOFF_I (1L<<23) /* Bit 23: Send Pause on FIFOfull*/
+#define XM_MD_TX_REP (1L<<24) /* Bit 24: Transmit Repeater Mode */
+#define XM_MD_SPOFF_I (1L<<23) /* Bit 23: Send Pause on FIFO full */
/* intern generated */
-#define XM_MD_LE_STW (1L<<22) /* Bit 22: Rx Stat Word in Lit En*/
+#define XM_MD_LE_STW (1L<<22) /* Bit 22: Rx Stat Word in Little Endian */
#define XM_MD_TX_CONT (1L<<21) /* Bit 21: Send Continuous */
#define XM_MD_TX_PAUSE (1L<<20) /* Bit 20: (sc) Send Pause Frame */
#define XM_MD_ATS (1L<<19) /* Bit 19: Append Time Stamp */
@@ -447,40 +531,40 @@
#define XM_MD_SPOH_I (1L<<17) /* Bit 17: Send Pause on High */
/* intern generated */
#define XM_MD_CAP (1L<<16) /* Bit 16: Check Address Pair */
-#define XM_MD_ENA_HSH (1L<<15) /* Bit 15: Enable Hashing */
+#define XM_MD_ENA_HASH (1L<<15) /* Bit 15: Enable Hashing */
#define XM_MD_CSA (1L<<14) /* Bit 14: Check Station Address */
#define XM_MD_CAA (1L<<13) /* Bit 13: Check Address Array */
-#define XM_MD_RX_MCTRL (1L<<12) /* Bit 12: Rx MAC Control Frames */
+#define XM_MD_RX_MCTRL (1L<<12) /* Bit 12: Rx MAC Control Frame */
#define XM_MD_RX_RUNT (1L<<11) /* Bit 11: Rx Runt Frames */
-#define XM_MD_RX_IRLE (1L<<10) /* Bit 10: Rx in Range Len Err F */
-#define XM_MD_RX_LONG (1L<<9) /* Bit 9: Rx Long Frames */
-#define XM_MD_RX_CRCE (1L<<8) /* Bit 8: Rx CRC Error Frames */
-#define XM_MD_RX_ERR (1L<<7) /* Bit 7: Rx Error Frames */
-#define XM_MD_DIS_UC (1L<<6) /* Bit 6: Disable Rx Unicast */
-#define XM_MD_DIS_MC (1L<<5) /* Bit 5: Disable Rx Multicast */
-#define XM_MD_DIS_BC (1L<<4) /* Bit 4: Disable Rx Boradcast */
-#define XM_MD_ENA_PROM (1L<<3) /* Bit 3: Enable Promiscuous */
-#define XM_MD_ENA_BE (1L<<2) /* Bit 2: Enable Big Endian */
-#define XM_MD_FTF (1L<<1) /* Bit 1: (sc) Flush Tx FIFO */
-#define XM_MD_FRF (1L<<0) /* Bit 0: (sc) Flush Rx FIFO */
-
-#define XM_PAUSE_MODE (XM_MD_SPOE_E | XM_MD_SPOL_I | XM_MD_SPOH_I)
-#define XM_DEF_MODE (XM_MD_RX_RUNT | XM_MD_RX_IRLE | XM_MD_RX_LONG |\
- XM_MD_RX_CRCE | XM_MD_RX_ERR | XM_MD_CSA | XM_MD_CAA)
+#define XM_MD_RX_IRLE (1L<<10) /* Bit 10: Rx in Range Len Err Frame */
+#define XM_MD_RX_LONG (1L<<9) /* Bit 9: Rx Long Frame */
+#define XM_MD_RX_CRCE (1L<<8) /* Bit 8: Rx CRC Error Frame */
+#define XM_MD_RX_ERR (1L<<7) /* Bit 7: Rx Error Frame */
+#define XM_MD_DIS_UC (1L<<6) /* Bit 6: Disable Rx Unicast */
+#define XM_MD_DIS_MC (1L<<5) /* Bit 5: Disable Rx Multicast */
+#define XM_MD_DIS_BC (1L<<4) /* Bit 4: Disable Rx Broadcast */
+#define XM_MD_ENA_PROM (1L<<3) /* Bit 3: Enable Promiscuous */
+#define XM_MD_ENA_BE (1L<<2) /* Bit 2: Enable Big Endian */
+#define XM_MD_FTF (1L<<1) /* Bit 1: (sc) Flush Tx FIFO */
+#define XM_MD_FRF (1L<<0) /* Bit 0: (sc) Flush Rx FIFO */
+
+#define XM_PAUSE_MODE (XM_MD_SPOE_E | XM_MD_SPOL_I | XM_MD_SPOH_I)
+#define XM_DEF_MODE (XM_MD_RX_RUNT | XM_MD_RX_IRLE | XM_MD_RX_LONG |\
+ XM_MD_RX_CRCE | XM_MD_RX_ERR | XM_MD_CSA | XM_MD_CAA)
/* XM_STAT_CMD 16 bit r/w Statistics Command Register */
/* Bit 16..6: reserved */
-#define XM_SC_SNP_RXC (1<<5) /* Bit 5: (sc) Snap Rx Counters */
-#define XM_SC_SNP_TXC (1<<4) /* Bit 4: (sc) Snap Tx Counters */
-#define XM_SC_CP_RXC (1<<3) /* Bit 3: Copy Rx Counters Continuously */
-#define XM_SC_CP_TXC (1<<2) /* Bit 2: Copy Tx Counters Continuously */
-#define XM_SC_CLR_RXC (1<<1) /* Bit 1: (sc) Clear Rx Counters */
-#define XM_SC_CLR_TXC (1<<0) /* Bit 0: (sc) Clear Tx Counters */
+#define XM_SC_SNP_RXC (1<<5) /* Bit 5: (sc) Snap Rx Counters */
+#define XM_SC_SNP_TXC (1<<4) /* Bit 4: (sc) Snap Tx Counters */
+#define XM_SC_CP_RXC (1<<3) /* Bit 3: Copy Rx Counters Continuously */
+#define XM_SC_CP_TXC (1<<2) /* Bit 2: Copy Tx Counters Continuously */
+#define XM_SC_CLR_RXC (1<<1) /* Bit 1: (sc) Clear Rx Counters */
+#define XM_SC_CLR_TXC (1<<0) /* Bit 0: (sc) Clear Tx Counters */
-/* XM_RX_CNT_EV 32 bit ro Rx Counter Event Register */
+/* XM_RX_CNT_EV 32 bit r/o Rx Counter Event Register */
/* XM_RX_EV_MSK 32 bit r/w Rx Counter Event Mask */
-#define XMR_MAX_SZ_OV (1UL<<31) /* Bit 31: 1024-MaxSize Rx Cnt Ov*/
+#define XMR_MAX_SZ_OV (1UL<<31) /* Bit 31: 1024-MaxSize Rx Cnt Ov*/
#define XMR_1023B_OV (1L<<30) /* Bit 30: 512-1023Byte Rx Cnt Ov*/
#define XMR_511B_OV (1L<<29) /* Bit 29: 256-511 Byte Rx Cnt Ov*/
#define XMR_255B_OV (1L<<28) /* Bit 28: 128-255 Byte Rx Cnt Ov*/
@@ -502,20 +586,20 @@
#define XMR_FRA_ERR_OV (1L<<12) /* Bit 12: Rx Framing Err Cnt Ov */
#define XMR_FMISS_OV (1L<<11) /* Bit 11: Rx Missed Ev Cnt Ov */
#define XMR_BURST (1L<<10) /* Bit 10: Rx Burst Event Cnt Ov */
-#define XMR_INV_MOC (1L<<9) /* Bit 9: Rx with inv. MAC OC Ov*/
-#define XMR_INV_MP (1L<<8) /* Bit 8: Rx inv Pause Frame Ov */
-#define XMR_MCTRL_OV (1L<<7) /* Bit 7: Rx MAC Ctrl-F Cnt Ov */
-#define XMR_MPAUSE_OV (1L<<6) /* Bit 6: Rx Pause MAC Ctrl-F Ov*/
-#define XMR_UC_OK_OV (1L<<5) /* Bit 5: Rx Unicast Frame CntOv*/
-#define XMR_MC_OK_OV (1L<<4) /* Bit 4: Rx Multicast Cnt Ov */
-#define XMR_BC_OK_OV (1L<<3) /* Bit 3: Rx Broadcast Cnt Ov */
-#define XMR_OK_LO_OV (1L<<2) /* Bit 2: Octets Rx OK Low CntOv*/
-#define XMR_OK_HI_OV (1L<<1) /* Bit 1: Octets Rx OK Hi Cnt Ov*/
-#define XMR_OK_OV (1L<<0) /* Bit 0: Frames Received Ok Ov */
+#define XMR_INV_MOC (1L<<9) /* Bit 9: Rx with inv. MAC OC Ov*/
+#define XMR_INV_MP (1L<<8) /* Bit 8: Rx inv Pause Frame Ov */
+#define XMR_MCTRL_OV (1L<<7) /* Bit 7: Rx MAC Ctrl-F Cnt Ov */
+#define XMR_MPAUSE_OV (1L<<6) /* Bit 6: Rx Pause MAC Ctrl-F Ov*/
+#define XMR_UC_OK_OV (1L<<5) /* Bit 5: Rx Unicast Frame CntOv*/
+#define XMR_MC_OK_OV (1L<<4) /* Bit 4: Rx Multicast Cnt Ov */
+#define XMR_BC_OK_OV (1L<<3) /* Bit 3: Rx Broadcast Cnt Ov */
+#define XMR_OK_LO_OV (1L<<2) /* Bit 2: Octets Rx OK Low CntOv*/
+#define XMR_OK_HI_OV (1L<<1) /* Bit 1: Octets Rx OK Hi Cnt Ov*/
+#define XMR_OK_OV (1L<<0) /* Bit 0: Frames Received Ok Ov */
-#define XMR_DEF_MSK 0x00000006L /* all bits excepting 1 and 2 */
+#define XMR_DEF_MSK (XMR_OK_LO_OV | XMR_OK_HI_OV)
-/* XM_TX_CNT_EV 32 bit ro Tx Counter Event Register */
+/* XM_TX_CNT_EV 32 bit r/o Tx Counter Event Register */
/* XM_TX_EV_MSK 32 bit r/w Tx Counter Event Mask */
/* Bit 31..26: reserved */
#define XMT_MAX_SZ_OV (1L<<25) /* Bit 25: 1024-MaxSize Tx Cnt Ov*/
@@ -534,18 +618,18 @@
#define XMT_ABO_COL_OV (1L<<12) /* Bit 12: Tx abo dueto Ex Col Ov*/
#define XMT_MUL_COL_OV (1L<<11) /* Bit 11: Tx Mult Col Cnt Ov */
#define XMT_SNG_COL (1L<<10) /* Bit 10: Tx Single Col Cnt Ov */
-#define XMT_MCTRL_OV (1L<<9) /* Bit 9: Tx MAC Ctrl Counter Ov*/
-#define XMT_MPAUSE (1L<<8) /* Bit 8: Tx Pause MAC Ctrl-F Ov*/
-#define XMT_BURST (1L<<7) /* Bit 7: Tx Burst Event Cnt Ov */
-#define XMT_LONG (1L<<6) /* Bit 6: Tx Long Frame Cnt Ov */
-#define XMT_UC_OK_OV (1L<<5) /* Bit 5: Tx Unicast Cnt Ov */
-#define XMT_MC_OK_OV (1L<<4) /* Bit 4: Tx Multicast Cnt Ov */
-#define XMT_BC_OK_OV (1L<<3) /* Bit 3: Tx Broadcast Cnt Ov */
-#define XMT_OK_LO_OV (1L<<2) /* Bit 2: Octets Tx OK Low CntOv*/
-#define XMT_OK_HI_OV (1L<<1) /* Bit 1: Octets Tx OK Hi Cnt Ov*/
-#define XMT_OK_OV (1L<<0) /* Bit 0: Frames Tx Ok Ov */
+#define XMT_MCTRL_OV (1L<<9) /* Bit 9: Tx MAC Ctrl Counter Ov*/
+#define XMT_MPAUSE (1L<<8) /* Bit 8: Tx Pause MAC Ctrl-F Ov*/
+#define XMT_BURST (1L<<7) /* Bit 7: Tx Burst Event Cnt Ov */
+#define XMT_LONG (1L<<6) /* Bit 6: Tx Long Frame Cnt Ov */
+#define XMT_UC_OK_OV (1L<<5) /* Bit 5: Tx Unicast Cnt Ov */
+#define XMT_MC_OK_OV (1L<<4) /* Bit 4: Tx Multicast Cnt Ov */
+#define XMT_BC_OK_OV (1L<<3) /* Bit 3: Tx Broadcast Cnt Ov */
+#define XMT_OK_LO_OV (1L<<2) /* Bit 2: Octets Tx OK Low CntOv*/
+#define XMT_OK_HI_OV (1L<<1) /* Bit 1: Octets Tx OK Hi Cnt Ov*/
+#define XMT_OK_OV (1L<<0) /* Bit 0: Frames Tx Ok Ov */
-#define XMT_DEF_MSK 0x00000006L /* all bits excepting 1 and 2 */
+#define XMT_DEF_MSK (XMT_OK_LO_OV | XMT_OK_HI_OV)
/*
* Receive Frame Status Encoding
@@ -559,16 +643,16 @@
/* Bit 12: reserved */
#define XMR_FS_BURST (1L<<11) /* Bit 11: Burst Mode */
#define XMR_FS_CEX_ERR (1L<<10) /* Bit 10: Carrier Ext. Error */
-#define XMR_FS_802_3 (1L<<9) /* Bit 9: 802.3 Frame */
-#define XMR_FS_COL_ERR (1L<<8) /* Bit 8: Collision Error */
-#define XMR_FS_CAR_ERR (1L<<7) /* Bit 7: Carrier Event Error */
-#define XMR_FS_LEN_ERR (1L<<6) /* Bit 6: In-Range Length Error */
-#define XMR_FS_FRA_ERR (1L<<5) /* Bit 5: Framing Error */
-#define XMR_FS_RUNT (1L<<4) /* Bit 4: Runt Error */
-#define XMR_FS_LNG_ERR (1L<<3) /* Bit 3: Gaint Error */
-#define XMR_FS_FCS_ERR (1L<<2) /* Bit 2: Frame Check Sequ Err */
-#define XMR_FS_ERR (1L<<1) /* Bit 1: Frame Error */
-#define XMR_FS_MCTRL (1L<<0) /* Bit 0: MAC Control Packet */
+#define XMR_FS_802_3 (1L<<9) /* Bit 9: 802.3 Frame */
+#define XMR_FS_COL_ERR (1L<<8) /* Bit 8: Collision Error */
+#define XMR_FS_CAR_ERR (1L<<7) /* Bit 7: Carrier Event Error */
+#define XMR_FS_LEN_ERR (1L<<6) /* Bit 6: In-Range Length Error */
+#define XMR_FS_FRA_ERR (1L<<5) /* Bit 5: Framing Error */
+#define XMR_FS_RUNT (1L<<4) /* Bit 4: Runt Frame */
+#define XMR_FS_LNG_ERR (1L<<3) /* Bit 3: Giant (Jumbo) Frame */
+#define XMR_FS_FCS_ERR (1L<<2) /* Bit 2: Frame Check Sequ Err */
+#define XMR_FS_ERR (1L<<1) /* Bit 1: Frame Error */
+#define XMR_FS_MCTRL (1L<<0) /* Bit 0: MAC Control Packet */
/*
* XMR_FS_ERR will be set if
@@ -584,102 +668,135 @@
/*
* XMAC-PHY Registers, indirect addressed over the XMAC
*/
-#define PHY_XMAC_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_XMAC_STAT 0x01 /* 16 bit r/w PHY Status Register */
-#define PHY_XMAC_ID0 0x02 /* 16 bit ro PHY ID0 Register */
-#define PHY_XMAC_ID1 0x03 /* 16 bit ro PHY ID1 Register */
-#define PHY_XMAC_AUNE_ADV 0x04 /* 16 bit r/w Autoneg Advertisement */
-#define PHY_XMAC_AUNE_LP 0x05 /* 16 bit ro Link Partner Abi Reg */
-#define PHY_XMAC_AUNE_EXP 0x06 /* 16 bit ro Autoneg Expansion Reg */
-#define PHY_XMAC_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_XMAC_NEPG_LP 0x08 /* 16 bit ro Next Page Link P Reg */
+#define PHY_XMAC_CTRL 0x00 /* 16 bit r/w PHY Control Register */
+#define PHY_XMAC_STAT 0x01 /* 16 bit r/w PHY Status Register */
+#define PHY_XMAC_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
+#define PHY_XMAC_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
+#define PHY_XMAC_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
+#define PHY_XMAC_AUNE_LP 0x05 /* 16 bit r/o Link Partner Abi Reg */
+#define PHY_XMAC_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
+#define PHY_XMAC_NEPG 0x07 /* 16 bit r/w Next Page Register */
+#define PHY_XMAC_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
/* 0x09 - 0x0e: reserved */
-#define PHY_XMAC_EXT_STAT 0x0f /* 16 bit ro Ext Status Register */
-#define PHY_XMAC_RES_ABI 0x10 /* 16 bit ro PHY Resolved Ability */
+#define PHY_XMAC_EXT_STAT 0x0f /* 16 bit r/o Ext Status Register */
+#define PHY_XMAC_RES_ABI 0x10 /* 16 bit r/o PHY Resolved Ability */
/*----------------------------------------------------------------------------*/
/*
* Broadcom-PHY Registers, indirect addressed over XMAC
*/
-#define PHY_BCOM_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_BCOM_STAT 0x01 /* 16 bit ro PHY Status Register */
-#define PHY_BCOM_ID0 0x02 /* 16 bit ro PHY ID0 Register */
-#define PHY_BCOM_ID1 0x03 /* 16 bit ro PHY ID1 Register */
-#define PHY_BCOM_AUNE_ADV 0x04 /* 16 bit r/w Autoneg Advertisement */
-#define PHY_BCOM_AUNE_LP 0x05 /* 16 bit ro Link Part Ability Reg */
-#define PHY_BCOM_AUNE_EXP 0x06 /* 16 bit ro Autoneg Expansion Reg */
-#define PHY_BCOM_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_BCOM_NEPG_LP 0x08 /* 16 bit ro Next Page Link P Reg */
+#define PHY_BCOM_CTRL 0x00 /* 16 bit r/w PHY Control Register */
+#define PHY_BCOM_STAT 0x01 /* 16 bit r/o PHY Status Register */
+#define PHY_BCOM_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
+#define PHY_BCOM_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
+#define PHY_BCOM_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
+#define PHY_BCOM_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
+#define PHY_BCOM_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
+#define PHY_BCOM_NEPG 0x07 /* 16 bit r/w Next Page Register */
+#define PHY_BCOM_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
/* Broadcom-specific registers */
-#define PHY_BCOM_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
-#define PHY_BCOM_1000T_STAT 0x0a /* 16 bit ro 1000Base-T Status Reg */
+#define PHY_BCOM_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
+#define PHY_BCOM_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
/* 0x0b - 0x0e: reserved */
-#define PHY_BCOM_EXT_STAT 0x0f /* 16 bit ro Extended Status Reg */
-#define PHY_BCOM_P_EXT_CTRL 0x10 /* 16 bit r/w PHY Extended Ctrl Reg */
-#define PHY_BCOM_P_EXT_STAT 0x11 /* 16 bit ro PHY Extended Stat Reg */
-#define PHY_BCOM_RE_CTR 0x12 /* 16 bit r/w Receive Error Counter */
-#define PHY_BCOM_FC_CTR 0x13 /* 16 bit r/w False Carr Sense Cnt */
-#define PHY_BCOM_RNO_CTR 0x14 /* 16 bit r/w Receiver NOT_OK Cnt */
+#define PHY_BCOM_EXT_STAT 0x0f /* 16 bit r/o Extended Status Reg */
+#define PHY_BCOM_P_EXT_CTRL 0x10 /* 16 bit r/w PHY Extended Ctrl Reg */
+#define PHY_BCOM_P_EXT_STAT 0x11 /* 16 bit r/o PHY Extended Stat Reg */
+#define PHY_BCOM_RE_CTR 0x12 /* 16 bit r/w Receive Error Counter */
+#define PHY_BCOM_FC_CTR 0x13 /* 16 bit r/w False Carr Sense Cnt */
+#define PHY_BCOM_RNO_CTR 0x14 /* 16 bit r/w Receiver NOT_OK Cnt */
/* 0x15 - 0x17: reserved */
-#define PHY_BCOM_AUX_CTRL 0x18 /* 16 bit r/w Auxiliary Control Reg */
-#define PHY_BCOM_AUX_STAT 0x19 /* 16 bit ro Auxiliary Stat Summary*/
-#define PHY_BCOM_INT_STAT 0x1a /* 16 bit ro Interrupt Status Reg */
-#define PHY_BCOM_INT_MASK 0x1b /* 16 bit r/w Interrupt Mask Reg */
+#define PHY_BCOM_AUX_CTRL 0x18 /* 16 bit r/w Auxiliary Control Reg */
+#define PHY_BCOM_AUX_STAT 0x19 /* 16 bit r/o Auxiliary Stat Summary */
+#define PHY_BCOM_INT_STAT 0x1a /* 16 bit r/o Interrupt Status Reg */
+#define PHY_BCOM_INT_MASK 0x1b /* 16 bit r/w Interrupt Mask Reg */
/* 0x1c: reserved */
/* 0x1d - 0x1f: test registers */
/*----------------------------------------------------------------------------*/
/*
+ * Marvel-PHY Registers, indirect addressed over GMAC
+ */
+#define PHY_MARV_CTRL 0x00 /* 16 bit r/w PHY Control Register */
+#define PHY_MARV_STAT 0x01 /* 16 bit r/o PHY Status Register */
+#define PHY_MARV_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
+#define PHY_MARV_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
+#define PHY_MARV_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
+#define PHY_MARV_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
+#define PHY_MARV_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
+#define PHY_MARV_NEPG 0x07 /* 16 bit r/w Next Page Register */
+#define PHY_MARV_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
+ /* Marvel-specific registers */
+#define PHY_MARV_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
+#define PHY_MARV_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
+ /* 0x0b - 0x0e: reserved */
+#define PHY_MARV_EXT_STAT 0x0f /* 16 bit r/o Extended Status Reg */
+#define PHY_MARV_PHY_CTRL 0x10 /* 16 bit r/w PHY Specific Ctrl Reg */
+#define PHY_MARV_PHY_STAT 0x11 /* 16 bit r/o PHY Specific Stat Reg */
+#define PHY_MARV_INT_MASK 0x12 /* 16 bit r/w Interrupt Mask Reg */
+#define PHY_MARV_INT_STAT 0x13 /* 16 bit r/o Interrupt Status Reg */
+#define PHY_MARV_EXT_CTRL 0x14 /* 16 bit r/w Ext. PHY Specific Ctrl */
+#define PHY_MARV_RXE_CNT 0x15 /* 16 bit r/w Receive Error Counter */
+#define PHY_MARV_EXT_ADR 0x16 /* 16 bit r/w Ext. Ad. for Cable Diag. */
+ /* 0x17: reserved */
+#define PHY_MARV_LED_CTRL 0x18 /* 16 bit r/w LED Control Reg */
+#define PHY_MARV_LED_OVER 0x19 /* 16 bit r/w Manual LED Override Reg */
+#define PHY_MARV_EXT_CTRL_2 0x1a /* 16 bit r/w Ext. PHY Specific Ctrl 2 */
+#define PHY_MARV_EXT_P_STAT 0x1b /* 16 bit r/w Ext. PHY Spec. Stat Reg */
+#define PHY_MARV_CABLE_DIAG 0x1c /* 16 bit r/o Cable Diagnostic Reg */
+ /* 0x1d - 0x1f: reserved */
+
+/*----------------------------------------------------------------------------*/
+/*
* Level One-PHY Registers, indirect addressed over XMAC
*/
-#define PHY_LONE_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_LONE_STAT 0x01 /* 16 bit ro PHY Status Register */
-#define PHY_LONE_ID0 0x02 /* 16 bit ro PHY ID0 Register */
-#define PHY_LONE_ID1 0x03 /* 16 bit ro PHY ID1 Register */
-#define PHY_LONE_AUNE_ADV 0x04 /* 16 bit r/w Autoneg Advertisement */
-#define PHY_LONE_AUNE_LP 0x05 /* 16 bit ro Link Part Ability Reg */
-#define PHY_LONE_AUNE_EXP 0x06 /* 16 bit ro Autoneg Expansion Reg */
-#define PHY_LONE_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_LONE_NEPG_LP 0x08 /* 16 bit ro Next Page Link Partner*/
+#define PHY_LONE_CTRL 0x00 /* 16 bit r/w PHY Control Register */
+#define PHY_LONE_STAT 0x01 /* 16 bit r/o PHY Status Register */
+#define PHY_LONE_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
+#define PHY_LONE_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
+#define PHY_LONE_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
+#define PHY_LONE_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
+#define PHY_LONE_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
+#define PHY_LONE_NEPG 0x07 /* 16 bit r/w Next Page Register */
+#define PHY_LONE_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner*/
/* Level One-specific registers */
-#define PHY_LONE_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg*/
-#define PHY_LONE_1000T_STAT 0x0a /* 16 bit ro 1000Base-T Status Reg */
+#define PHY_LONE_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg*/
+#define PHY_LONE_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
/* 0x0b -0x0e: reserved */
-#define PHY_LONE_EXT_STAT 0x0f /* 16 bit ro Extended Status Reg */
-#define PHY_LONE_PORT_CFG 0x10 /* 16 bit r/w Port Configuration Reg*/
-#define PHY_LONE_Q_STAT 0x11 /* 16 bit ro Quick Status Reg */
-#define PHY_LONE_INT_ENAB 0x12 /* 16 bit r/w Interrupt Enable Reg */
-#define PHY_LONE_INT_STAT 0x13 /* 16 bit ro Interrupt Status Reg */
-#define PHY_LONE_LED_CFG 0x14 /* 16 bit r/w LED Configuration Reg */
-#define PHY_LONE_PORT_CTRL 0x15 /* 16 bit r/w Port Control Reg */
-#define PHY_LONE_CIM 0x16 /* 16 bit ro CIM Reg */
+#define PHY_LONE_EXT_STAT 0x0f /* 16 bit r/o Extended Status Reg */
+#define PHY_LONE_PORT_CFG 0x10 /* 16 bit r/w Port Configuration Reg*/
+#define PHY_LONE_Q_STAT 0x11 /* 16 bit r/o Quick Status Reg */
+#define PHY_LONE_INT_ENAB 0x12 /* 16 bit r/w Interrupt Enable Reg */
+#define PHY_LONE_INT_STAT 0x13 /* 16 bit r/o Interrupt Status Reg */
+#define PHY_LONE_LED_CFG 0x14 /* 16 bit r/w LED Configuration Reg */
+#define PHY_LONE_PORT_CTRL 0x15 /* 16 bit r/w Port Control Reg */
+#define PHY_LONE_CIM 0x16 /* 16 bit r/o CIM Reg */
/* 0x17 -0x1c: reserved */
/*----------------------------------------------------------------------------*/
/*
* National-PHY Registers, indirect addressed over XMAC
*/
-#define PHY_NAT_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_NAT_STAT 0x01 /* 16 bit r/w PHY Status Register */
-#define PHY_NAT_ID0 0x02 /* 16 bit ro PHY ID0 Register */
-#define PHY_NAT_ID1 0x03 /* 16 bit ro PHY ID1 Register */
-#define PHY_NAT_AUNE_ADV 0x04 /* 16 bit r/w Autonegotiation Advertisement */
-#define PHY_NAT_AUNE_LP 0x05 /* 16 bit ro Link Partner Ability Reg */
-#define PHY_NAT_AUNE_EXP 0x06 /* 16 bit ro Autonegotiation Expansion Reg */
-#define PHY_NAT_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_NAT_NEPG_LP 0x08 /* 16 bit ro Next Page Link Partner Reg */
+#define PHY_NAT_CTRL 0x00 /* 16 bit r/w PHY Control Register */
+#define PHY_NAT_STAT 0x01 /* 16 bit r/w PHY Status Register */
+#define PHY_NAT_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
+#define PHY_NAT_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
+#define PHY_NAT_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
+#define PHY_NAT_AUNE_LP 0x05 /* 16 bit r/o Link Partner Ability Reg */
+#define PHY_NAT_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
+#define PHY_NAT_NEPG 0x07 /* 16 bit r/w Next Page Register */
+#define PHY_NAT_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner Reg */
/* National-specific registers */
-#define PHY_NAT_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg */
-#define PHY_NAT_1000T_STAT 0x0a /* 16 bit ro 1000Base-T Status Reg */
+#define PHY_NAT_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg */
+#define PHY_NAT_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
/* 0x0b -0x0e: reserved */
-#define PHY_NAT_EXT_STAT 0x0f /* 16 bit ro Extended Status Register */
-#define PHY_NAT_EXT_CTRL1 0x10 /* 16 bit ro Extended Control Reg1 */
-#define PHY_NAT_Q_STAT1 0x11 /* 16 bit ro Quick Status Reg1 */
-#define PHY_NAT_10B_OP 0x12 /* 16 bit ro 10Base-T Operations Reg */
-#define PHY_NAT_EXT_CTRL2 0x13 /* 16 bit ro Extended Control Reg1 */
-#define PHY_NAT_Q_STAT2 0x14 /* 16 bit ro Quick Status Reg2 */
+#define PHY_NAT_EXT_STAT 0x0f /* 16 bit r/o Extended Status Register */
+#define PHY_NAT_EXT_CTRL1 0x10 /* 16 bit r/o Extended Control Reg1 */
+#define PHY_NAT_Q_STAT1 0x11 /* 16 bit r/o Quick Status Reg1 */
+#define PHY_NAT_10B_OP 0x12 /* 16 bit r/o 10Base-T Operations Reg */
+#define PHY_NAT_EXT_CTRL2 0x13 /* 16 bit r/o Extended Control Reg1 */
+#define PHY_NAT_Q_STAT2 0x14 /* 16 bit r/o Quick Status Reg2 */
/* 0x15 -0x18: reserved */
-#define PHY_NAT_PHY_ADDR 0x19 /* 16 bit ro PHY Address Register */
+#define PHY_NAT_PHY_ADDR 0x19 /* 16 bit r/o PHY Address Register */
/*----------------------------------------------------------------------------*/
@@ -691,201 +808,205 @@
* All other are general.
*/
-/***** PHY_XMAC_CTRL 16 bit r/w PHY Control Register *****/
-/***** PHY_BCOM_CTRL 16 bit r/w PHY Control Register *****/
-/***** PHY_LONE_CTRL 16 bit r/w PHY Control Register *****/
-#define PHY_CT_RESET (1<<15) /* Bit 15: (sc) clear all PHY releated regs */
+/***** PHY_XMAC_CTRL 16 bit r/w PHY Control Register *****/
+/***** PHY_BCOM_CTRL 16 bit r/w PHY Control Register *****/
+/***** PHY_LONE_CTRL 16 bit r/w PHY Control Register *****/
+#define PHY_CT_RESET (1<<15) /* Bit 15: (sc) clear all PHY related regs */
#define PHY_CT_LOOP (1<<14) /* Bit 14: enable Loopback over PHY */
#define PHY_CT_SPS_LSB (1<<13) /* Bit 13: (BC,L1) Speed select, lower bit */
-#define PHY_CT_ANE (1<<12) /* Bit 12: Autonegotiation Enabled */
+#define PHY_CT_ANE (1<<12) /* Bit 12: Auto-Negotiation Enabled */
#define PHY_CT_PDOWN (1<<11) /* Bit 11: (BC,L1) Power Down Mode */
#define PHY_CT_ISOL (1<<10) /* Bit 10: (BC,L1) Isolate Mode */
-#define PHY_CT_RE_CFG (1<<9) /* Bit 9: (sc) Restart Autonegotiation */
-#define PHY_CT_DUP_MD (1<<8) /* Bit 8: Duplex Mode */
-#define PHY_CT_COL_TST (1<<7) /* Bit 7: (BC,L1) Collsion Test enabled */
-#define PHY_CT_SPS_MSB (1<<6) /* Bit 6: (BC,L1) Speed select, upper bit */
- /* Bit 5..0: reserved */
-
-#define PHY_B_CT_SP1000 (1<<6) /* Bit 6: enable speed of 1000 MBit/s */
-#define PHY_B_CT_SP100 (1<<13) /* Bit 13: enable speed of 100 MBit/s */
-#define PHY_B_CT_SP10 (0) /* Bit 6/13 not set, speed of 10 MBit/s */
-
-#define PHY_L_CT_SP1000 (1<<6) /* Bit 6: enable speed of 1000 MBit/s */
-#define PHY_L_CT_SP100 (1<<13) /* Bit 13: enable speed of 100 MBit/s */
-#define PHY_L_CT_SP10 (0) /* Bit 6/13 not set, speed of 10 MBit/s */
-
-
-/***** PHY_XMAC_STAT 16 bit r/w PHY Status Register *****/
-/***** PHY_BCOM_STAT 16 bit r/w PHY Status Register *****/
-/***** PHY_LONE_STAT 16 bit r/w PHY Status Register *****/
+#define PHY_CT_RE_CFG (1<<9) /* Bit 9: (sc) Restart Auto-Negotiation */
+#define PHY_CT_DUP_MD (1<<8) /* Bit 8: Duplex Mode */
+#define PHY_CT_COL_TST (1<<7) /* Bit 7: (BC,L1) Collision Test enabled */
+#define PHY_CT_SPS_MSB (1<<6) /* Bit 6: (BC,L1) Speed select, upper bit */
+ /* Bit 5..0: reserved */
+
+#define PHY_CT_SP1000 PHY_CT_SPS_MSB /* enable speed of 1000 Mbps */
+#define PHY_CT_SP100 PHY_CT_SPS_LSB /* enable speed of 100 Mbps */
+#define PHY_CT_SP10 (0) /* enable speed of 10 Mbps */
+
+
+/***** PHY_XMAC_STAT 16 bit r/w PHY Status Register *****/
+/***** PHY_BCOM_STAT 16 bit r/w PHY Status Register *****/
+/***** PHY_MARV_STAT 16 bit r/w PHY Status Register *****/
+/***** PHY_LONE_STAT 16 bit r/w PHY Status Register *****/
/* Bit 15..9: reserved */
- /* (BC/L1) 100/10 MBit/s cap bits ignored*/
-#define PHY_ST_EXT_ST (1<<8) /* Bit 8: Extended Status Present */
- /* Bit 7: reserved */
-#define PHY_ST_PRE_SUB (1<<6) /* Bit 6: (BC/L1) preamble suppression */
-#define PHY_ST_AN_OVER (1<<5) /* Bit 5: Autonegotiation Over */
-#define PHY_ST_REM_FLT (1<<4) /* Bit 4: Remode Fault Condition Occured*/
-#define PHY_ST_AN_CAP (1<<3) /* Bit 3: Autonegotiation Capability */
-#define PHY_ST_LSYNC (1<<2) /* Bit 2: Link Synchronized */
-#define PHY_ST_JAP_DET (1<<1) /* Bit 1: (BC/L1) Japper Detected */
-#define PHY_ST_EXT_REG (1<<0) /* Bit 0: Extended Register available */
-
-
-/* PHY_XMAC_ID1 16 bit ro PHY ID1 Register */
-/* PHY_BCOM_ID1 16 bit ro PHY ID1 Register */
-/* PHY_LONE_ID1 16 bit ro PHY ID1 Register */
-#define PHY_I1_OUI (0x3f<<10) /* Bit 15..10: Organiz. Unique ID */
-#define PHY_I1_MOD_NUM (0x3f<<4) /* Bit 9.. 4: Model Number */
-#define PHY_I1_REV (0x0f<<0) /* Bit 3.. 0: Revision Number */
+ /* (BC/L1) 100/10 Mbps cap bits ignored*/
+#define PHY_ST_EXT_ST (1<<8) /* Bit 8: Extended Status Present */
+ /* Bit 7: reserved */
+#define PHY_ST_PRE_SUP (1<<6) /* Bit 6: (BC/L1) preamble suppression */
+#define PHY_ST_AN_OVER (1<<5) /* Bit 5: Auto-Negotiation Over */
+#define PHY_ST_REM_FLT (1<<4) /* Bit 4: Remote Fault Condition Occured */
+#define PHY_ST_AN_CAP (1<<3) /* Bit 3: Auto-Negotiation Capability */
+#define PHY_ST_LSYNC (1<<2) /* Bit 2: Link Synchronized */
+#define PHY_ST_JAB_DET (1<<1) /* Bit 1: (BC/L1) Jabber Detected */
+#define PHY_ST_EXT_REG (1<<0) /* Bit 0: Extended Register available */
+
+
+/***** PHY_XMAC_ID1 16 bit r/o PHY ID1 Register */
+/***** PHY_BCOM_ID1 16 bit r/o PHY ID1 Register */
+/***** PHY_MARV_ID1 16 bit r/o PHY ID1 Register */
+/***** PHY_LONE_ID1 16 bit r/o PHY ID1 Register */
+#define PHY_I1_OUI_MSK (0x3f<<10) /* Bit 15..10: Organization Unique ID */
+#define PHY_I1_MOD_NUM (0x3f<<4) /* Bit 9.. 4: Model Number */
+#define PHY_I1_REV_MSK 0x0f /* Bit 3.. 0: Revision Number */
+
+/* different Broadcom PHY Ids */
+#define PHY_BCOM_ID1_A1 0x6041
+#define PHY_BCOM_ID1_B2 0x6043
+#define PHY_BCOM_ID1_C0 0x6044
+#define PHY_BCOM_ID1_C5 0x6047
-/***** PHY_XMAC_AUNE_ADV 16 bit r/w Autoneg Advertisement *****/
-/***** PHY_XMAC_AUNE_LP 16 bit ro Link Partner Ability Reg *****/
+/***** PHY_XMAC_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
+/***** PHY_XMAC_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
#define PHY_AN_NXT_PG (1<<15) /* Bit 15: Request Next Page */
#define PHY_X_AN_ACK (1<<14) /* Bit 14: (ro) Acknowledge Received */
-#define PHY_X_AN_RFB (3<<12) /* Bit 13..12: Remode Fault Bits */
+#define PHY_X_AN_RFB (3<<12) /* Bit 13..12: Remote Fault Bits */
/* Bit 11.. 9: reserved */
-#define PHY_X_AN_PAUSE (3<<7) /* Bit 8.. 7: Pause Bits */
-#define PHY_X_AN_HD (1<<6) /* Bit 6: Half Duplex */
-#define PHY_X_AN_FD (1<<5) /* Bit 5: Full Duplex */
- /* Bit 4.. 0: reserved */
+#define PHY_X_AN_PAUSE (3<<7) /* Bit 8.. 7: Pause Bits */
+#define PHY_X_AN_HD (1<<6) /* Bit 6: Half Duplex */
+#define PHY_X_AN_FD (1<<5) /* Bit 5: Full Duplex */
+ /* Bit 4.. 0: reserved */
-/***** PHY_BCOM_AUNE_ADV 16 bit r/w Autoneg Advertisement *****/
-/***** PHY_BCOM_AUNE_LP 16 bit ro Link Partner Ability Reg *****/
+/***** PHY_BCOM_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
+/***** PHY_BCOM_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
/* PHY_AN_NXT_PG (see XMAC) Bit 15: Request Next Page */
/* Bit 14: reserved */
#define PHY_B_AN_RF (1<<13) /* Bit 13: Remote Fault */
/* Bit 12: reserved */
-#define PHY_B_AN_ASP (1<<11) /* Bit 11: Asymetric Pause */
+#define PHY_B_AN_ASP (1<<11) /* Bit 11: Asymmetric Pause */
#define PHY_B_AN_PC (1<<10) /* Bit 10: Pause Capable */
- /* Bit 9..5: 100/10 BT cap bits ingnored */
-#define PHY_B_AN_SEL (0x1f<<0)/* Bit 4..0: Selector Field, 00001=Ethernet*/
+ /* Bit 9..5: 100/10 BT cap bits ingnored */
+#define PHY_B_AN_SEL 0x1f /* Bit 4..0: Selector Field, 00001=Ethernet*/
-/***** PHY_LONE_AUNE_ADV 16 bit r/w Autoneg Advertisement *****/
-/***** PHY_LONE_AUNE_LP 16 bit ro Link Partner Ability Reg *****/
+/***** PHY_LONE_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
+/***** PHY_LONE_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
/* PHY_AN_NXT_PG (see XMAC) Bit 15: Request Next Page */
/* Bit 14: reserved */
#define PHY_L_AN_RF (1<<13) /* Bit 13: Remote Fault */
/* Bit 12: reserved */
-#define PHY_L_AN_ASP (1<<11) /* Bit 11: Asymetric Pause */
+#define PHY_L_AN_ASP (1<<11) /* Bit 11: Asymmetric Pause */
#define PHY_L_AN_PC (1<<10) /* Bit 10: Pause Capable */
- /* Bit 9..5: 100/10 BT cap bits ingnored */
-#define PHY_L_AN_SEL (0x1f<<0)/* Bit 4..0: Selector Field, 00001=Ethernet*/
+ /* Bit 9..5: 100/10 BT cap bits ingnored */
+#define PHY_L_AN_SEL 0x1f /* Bit 4..0: Selector Field, 00001=Ethernet*/
-/***** PHY_NAT_AUNE_ADV 16 bit r/w Autoneg Advertisement *****/
-/***** PHY_NAT_AUNE_LP 16 bit ro Link Partner Ability Reg *****/
+/***** PHY_NAT_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
+/***** PHY_NAT_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
/* PHY_AN_NXT_PG (see XMAC) Bit 15: Request Next Page */
/* Bit 14: reserved */
#define PHY_N_AN_RF (1<<13) /* Bit 13: Remote Fault */
/* Bit 12: reserved */
#define PHY_N_AN_100F (1<<11) /* Bit 11: 100Base-T2 FD Support */
#define PHY_N_AN_100H (1<<10) /* Bit 10: 100Base-T2 HD Support */
- /* Bit 9..5: 100/10 BT cap bits ingnored */
-#define PHY_N_AN_SEL (0x1f<<0)/* Bit 4..0: Selector Field, 00001=Ethernet*/
+ /* Bit 9..5: 100/10 BT cap bits ingnored */
+#define PHY_N_AN_SEL 0x1f /* Bit 4..0: Selector Field, 00001=Ethernet*/
/* field type definition for PHY_x_AN_SEL */
#define PHY_SEL_TYPE 0x01 /* 00001 = Ethernet */
-/***** PHY_XMAC_AUNE_EXP 16 bit ro Autoneg Expansion Reg *****/
- /* Bit 15..4: reserved */
-#define PHY_AN_LP_NP (1<<3) /* Bit 3: Link Partner can Next Page */
-#define PHY_AN_LOC_NP (1<<2) /* Bit 2: Local PHY can Next Page */
-#define PHY_AN_RX_PG (1<<1) /* Bit 1: Page Received */
- /* Bit 0: reserved */
+/***** PHY_XMAC_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
+ /* Bit 15..4: reserved */
+#define PHY_AN_LP_NP (1<<3) /* Bit 3: Link Partner can Next Page */
+#define PHY_AN_LOC_NP (1<<2) /* Bit 2: Local PHY can Next Page */
+#define PHY_AN_RX_PG (1<<1) /* Bit 1: Page Received */
+ /* Bit 0: reserved */
-/***** PHY_BCOM_AUNE_EXP 16 bit ro Autoneg Expansion Reg *****/
+/***** PHY_BCOM_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
/* Bit 15..5: reserved */
-#define PHY_B_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
-/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
-/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
-/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
-#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Autoneg Cap. */
-
-/***** PHY_LONE_AUNE_EXP 16 bit ro Autoneg Expansion Reg *****/
-#define PHY_L_AN_BP (1<<5) /* Bit 5: Base Page Indication */
-#define PHY_L_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
-/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
-/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
-/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
-#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Autoneg Cap. */
-
-
-/***** PHY_XMAC_NEPG 16 bit r/w Next Page Register *****/
-/***** PHY_BCOM_NEPG 16 bit r/w Next Page Register *****/
-/***** PHY_LONE_NEPG 16 bit r/w Next Page Register *****/
-/***** PHY_XMAC_NEPG_LP 16 bit ro Next Page Link Partner *****/
-/***** PHY_BCOM_NEPG_LP 16 bit ro Next Page Link Partner *****/
-/***** PHY_LONE_NEPG_LP 16 bit ro Next Page Link Partner *****/
+#define PHY_B_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
+/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
+/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
+/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
+#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
+
+/***** PHY_LONE_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
+#define PHY_L_AN_BP (1<<5) /* Bit 5: Base Page Indication */
+#define PHY_L_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
+/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
+/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
+/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
+#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
+
+
+/***** PHY_XMAC_NEPG 16 bit r/w Next Page Register *****/
+/***** PHY_BCOM_NEPG 16 bit r/w Next Page Register *****/
+/***** PHY_LONE_NEPG 16 bit r/w Next Page Register *****/
+/***** PHY_XMAC_NEPG_LP 16 bit r/o Next Page Link Partner *****/
+/***** PHY_BCOM_NEPG_LP 16 bit r/o Next Page Link Partner *****/
+/***** PHY_LONE_NEPG_LP 16 bit r/o Next Page Link Partner *****/
#define PHY_NP_MORE (1<<15) /* Bit 15: More, Next Pages to follow */
-#define PHY_NP_ACK1 (1<<14) /* Bit 14: (ro) Ack 1, for receiving a message*/
+#define PHY_NP_ACK1 (1<<14) /* Bit 14: (ro) Ack1, for receiving a message */
#define PHY_NP_MSG_VAL (1<<13) /* Bit 13: Message Page valid */
-#define PHY_NP_ACK2 (1<<12) /* Bit 12: Ack 2, comply with msg content*/
+#define PHY_NP_ACK2 (1<<12) /* Bit 12: Ack2, comply with msg content */
#define PHY_NP_TOG (1<<11) /* Bit 11: Toggle Bit, ensure sync */
#define PHY_NP_MSG 0x07ff /* Bit 10..0: Message from/to Link Partner */
/*
* XMAC-Specific
*/
-/***** PHY_XMAC_EXT_STAT 16 bit r/w Extended Status Register *****/
+/***** PHY_XMAC_EXT_STAT 16 bit r/w Extended Status Register *****/
#define PHY_X_EX_FD (1<<15) /* Bit 15: Device Supports Full Duplex */
#define PHY_X_EX_HD (1<<14) /* Bit 14: Device Supports Half Duplex */
/* Bit 13..0: reserved */
-/***** PHY_XMAC_RES_ABI 16 bit ro PHY Resolved Ability *****/
+/***** PHY_XMAC_RES_ABI 16 bit r/o PHY Resolved Ability *****/
/* Bit 15..9: reserved */
-#define PHY_X_RS_PAUSE (3<<7) /* Bit 8..7: selected Pause Mode */
-#define PHY_X_RS_HD (1<<6) /* Bit 6: Half Duplex Mode selected */
-#define PHY_X_RS_FD (1<<5) /* Bit 5: Full Duplex Mode selected */
-#define PHY_X_RS_ABLMIS (1<<4) /* Bit 4: duplex or pause cap mismatch */
-#define PHY_X_RS_PAUMIS (1<<3) /* Bit 3: pause capability missmatch */
- /* Bit 2..0: reserved */
+#define PHY_X_RS_PAUSE (3<<7) /* Bit 8..7: selected Pause Mode */
+#define PHY_X_RS_HD (1<<6) /* Bit 6: Half Duplex Mode selected */
+#define PHY_X_RS_FD (1<<5) /* Bit 5: Full Duplex Mode selected */
+#define PHY_X_RS_ABLMIS (1<<4) /* Bit 4: duplex or pause cap mismatch */
+#define PHY_X_RS_PAUMIS (1<<3) /* Bit 3: pause capability missmatch */
+ /* Bit 2..0: reserved */
/*
* Remote Fault Bits (PHY_X_AN_RFB) encoding
*/
-#define X_RFB_OK (0<<12) /* Bit 12..13 No errors, Link OK */
-#define X_RFB_LF (1<<12) /* Bit 12..13 Link Failure */
-#define X_RFB_OFF (2<<12) /* Bit 12..13 Offline */
-#define X_RFB_AN_ERR (3<<12) /* Bit 12..13 Autonegotiation Error */
+#define X_RFB_OK (0<<12) /* Bit 13..12 No errors, Link OK */
+#define X_RFB_LF (1<<12) /* Bit 13..12 Link Failure */
+#define X_RFB_OFF (2<<12) /* Bit 13..12 Offline */
+#define X_RFB_AN_ERR (3<<12) /* Bit 13..12 Auto-Negotiation Error */
/*
* Pause Bits (PHY_X_AN_PAUSE and PHY_X_RS_PAUSE) encoding
*/
-#define PHY_X_P_NO_PAUSE (0<<7) /* Bit 8..7: no Pause Mode */
-#define PHY_X_P_SYM_MD (1<<7) /* Bit 8..7: symmetric Pause Mode */
-#define PHY_X_P_ASYM_MD (2<<7) /* Bit 8..7: asymmetric Pause Mode */
-#define PHY_X_P_BOTH_MD (3<<7) /* Bit 8..7: both Pause Mode */
+#define PHY_X_P_NO_PAUSE (0<<7) /* Bit 8..7: no Pause Mode */
+#define PHY_X_P_SYM_MD (1<<7) /* Bit 8..7: symmetric Pause Mode */
+#define PHY_X_P_ASYM_MD (2<<7) /* Bit 8..7: asymmetric Pause Mode */
+#define PHY_X_P_BOTH_MD (3<<7) /* Bit 8..7: both Pause Mode */
/*
* Broadcom-Specific
*/
-/***** PHY_BCOM_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_B_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_B_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
-#define PHY_B_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
-#define PHY_B_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
-#define PHY_B_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_B_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
- /* Bit 7..0: reserved */
-
-/***** PHY_BCOM_1000T_STAT 16 bit ro 1000Base-T Status Reg *****/
-#define PHY_B_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
-#define PHY_B_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
-#define PHY_B_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
-#define PHY_B_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status */
-#define PHY_B_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
-#define PHY_B_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
- /* Bit 9..8: reserved */
-#define PHY_B_1000S_IEC (255<<0)/* Bit 7..0: Idle Error Count */
+/***** PHY_BCOM_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
+#define PHY_B_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
+#define PHY_B_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
+#define PHY_B_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
+#define PHY_B_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
+#define PHY_B_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
+#define PHY_B_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
+ /* Bit 7..0: reserved */
+
+/***** PHY_BCOM_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
+#define PHY_B_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
+#define PHY_B_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
+#define PHY_B_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
+#define PHY_B_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status */
+#define PHY_B_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
+#define PHY_B_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
+ /* Bit 9..8: reserved */
+#define PHY_B_1000S_IEC 0xff /* Bit 7..0: Idle Error Count */
-/***** PHY_BCOM_EXT_STAT 16 bit ro Extended Status Register *****/
+/***** PHY_BCOM_EXT_STAT 16 bit r/o Extended Status Register *****/
#define PHY_B_ES_X_FD_CAP (1<<15) /* Bit 15: 1000Base-X FD capable */
#define PHY_B_ES_X_HD_CAP (1<<14) /* Bit 14: 1000Base-X HD capable */
#define PHY_B_ES_T_FD_CAP (1<<13) /* Bit 13: 1000Base-T FD capable */
#define PHY_B_ES_T_HD_CAP (1<<12) /* Bit 12: 1000Base-T HD capable */
/* Bit 11..0: reserved */
-/***** PHY_BCOM_P_EXT_CTRL 16 bit r/w PHY Extended Control Reg *****/
+/***** PHY_BCOM_P_EXT_CTRL 16 bit r/w PHY Extended Control Reg *****/
#define PHY_B_PEC_MAC_PHY (1<<15) /* Bit 15: 10BIT/GMI-Interface */
#define PHY_B_PEC_DIS_CROSS (1<<14) /* Bit 14: Disable MDI Crossover */
#define PHY_B_PEC_TX_DIS (1<<13) /* Bit 13: Tx output Disabled */
@@ -901,9 +1022,9 @@
#define PHY_B_PEC_LED_OFF (1<<3) /* Bit 3: Force LED's off */
#define PHY_B_PEC_EX_IPG (1<<2) /* Bit 2: Extend Tx IPG Mode */
#define PHY_B_PEC_3_LED (1<<1) /* Bit 1: Three Link LED mode */
-#define PHY_B_PEC_HIGH_LA (1<<0) /* Bit 0: GMII Fifo Elasticy */
+#define PHY_B_PEC_HIGH_LA (1<<0) /* Bit 0: GMII FIFO Elasticy */
-/***** PHY_BCOM_P_EXT_STAT 16 bit ro PHY Extended Status Reg *****/
+/***** PHY_BCOM_P_EXT_STAT 16 bit r/o PHY Extended Status Reg *****/
/* Bit 15..14: reserved */
#define PHY_B_PES_CROSS_STAT (1<<13) /* Bit 13: MDI Crossover Status */
#define PHY_B_PES_INT_STAT (1<<12) /* Bit 12: Interrupt Status */
@@ -920,20 +1041,20 @@
#define PHY_B_PES_LOCK_ER (1<<1) /* Bit 1: Lock Error */
#define PHY_B_PES_MLT3_ER (1<<0) /* Bit 0: MLT3 code Error */
-/***** PHY_BCOM_FC_CTR 16 bit r/w False Carrier Counter *****/
+/***** PHY_BCOM_FC_CTR 16 bit r/w False Carrier Counter *****/
/* Bit 15..8: reserved */
-#define PHY_B_FC_CTR (255<<0)/* Bit 7..0: False Carrier Counter */
+#define PHY_B_FC_CTR 0xff /* Bit 7..0: False Carrier Counter */
-/***** PHY_BCOM_RNO_CTR 16 bit r/w Receive NOT_OK Counter *****/
-#define PHY_B_RC_LOC (255<<8)/* Bit 15..8: Local Rx NOT_OK cnt */
-#define PHY_B_RC_REM (255<<0)/* Bit 7..0: Remote Rx NOT_OK cnt */
+/***** PHY_BCOM_RNO_CTR 16 bit r/w Receive NOT_OK Counter *****/
+#define PHY_B_RC_LOC_MSK 0xff00 /* Bit 15..8: Local Rx NOT_OK cnt */
+#define PHY_B_RC_REM_MSK 0x00ff /* Bit 7..0: Remote Rx NOT_OK cnt */
-/***** PHY_BCOM_AUX_CTRL 16 bit r/w Auxiliary Control Reg *****/
+/***** PHY_BCOM_AUX_CTRL 16 bit r/w Auxiliary Control Reg *****/
#define PHY_B_AC_L_SQE (1<<15) /* Bit 15: Low Squelch */
#define PHY_B_AC_LONG_PACK (1<<14) /* Bit 14: Rx Long Packets */
#define PHY_B_AC_ER_CTRL (3<<12) /* Bit 13..12: Edgerate Control */
/* Bit 11: reserved */
-#define PHY_B_AC_TX_TST (1<<10) /* Bit 10: tx test bit, always 1 */
+#define PHY_B_AC_TX_TST (1<<10) /* Bit 10: Tx test bit, always 1 */
/* Bit 9.. 8: reserved */
#define PHY_B_AC_DIS_PRF (1<<7) /* Bit 7: dis part resp filter */
/* Bit 6: reserved */
@@ -942,14 +1063,14 @@
#define PHY_B_AC_DIAG (1<<3) /* Bit 3: Diagnostic Mode */
/* Bit 2.. 0: reserved */
-/***** PHY_BCOM_AUX_STAT 16 bit ro Auxiliary Status Reg *****/
+/***** PHY_BCOM_AUX_STAT 16 bit r/o Auxiliary Status Reg *****/
#define PHY_B_AS_AN_C (1<<15) /* Bit 15: AutoNeg complete */
#define PHY_B_AS_AN_CA (1<<14) /* Bit 14: AN Complete Ack */
#define PHY_B_AS_ANACK_D (1<<13) /* Bit 13: AN Ack Detect */
#define PHY_B_AS_ANAB_D (1<<12) /* Bit 12: AN Ability Detect */
#define PHY_B_AS_NPW (1<<11) /* Bit 11: AN Next Page Wait */
-#define PHY_B_AS_AN_RES (7<<8) /* Bit 10..8: AN HDC */
-#define PHY_B_AS_PDF (1<<7) /* Bit 7: Parallel Detect. Fault*/
+#define PHY_B_AS_AN_RES_MSK (7<<8) /* Bit 10..8: AN HDC */
+#define PHY_B_AS_PDF (1<<7) /* Bit 7: Parallel Detect. Fault */
#define PHY_B_AS_RF (1<<6) /* Bit 6: Remote Fault */
#define PHY_B_AS_ANP_R (1<<5) /* Bit 5: AN Page Received */
#define PHY_B_AS_LP_ANAB (1<<4) /* Bit 4: LP AN Ability */
@@ -958,8 +1079,10 @@
#define PHY_B_AS_PRR (1<<1) /* Bit 1: Pause Resolution-Rx */
#define PHY_B_AS_PRT (1<<0) /* Bit 0: Pause Resolution-Tx */
-/***** PHY_BCOM_INT_STAT 16 bit ro Interrupt Status Reg *****/
-/***** PHY_BCOM_INT_MASK 16 bit r/w Interrupt Mask Reg *****/
+#define PHY_B_AS_PAUSE_MSK (PHY_B_AS_PRR | PHY_B_AS_PRT)
+
+/***** PHY_BCOM_INT_STAT 16 bit r/o Interrupt Status Reg *****/
+/***** PHY_BCOM_INT_MASK 16 bit r/w Interrupt Mask Reg *****/
/* Bit 15: reserved */
#define PHY_B_IS_PSE (1<<14) /* Bit 14: Pair Swap Error */
#define PHY_B_IS_MDXI_SC (1<<13) /* Bit 13: MDIX Status Change */
@@ -979,125 +1102,123 @@
#define PHY_B_DEF_MSK (~(PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE))
-/*
- * Pause Bits (PHY_B_AN_ASP and PHY_B_AN_PC) encoding
- */
-#define PHY_B_P_NO_PAUSE (0<<10) /* Bit 11..10: no Pause Mode */
-#define PHY_B_P_SYM_MD (1<<10) /* Bit 11..10: symmetric Pause Mode */
-#define PHY_B_P_ASYM_MD (2<<10) /* Bit 11..10: asymmetric Pause Mode */
-#define PHY_B_P_BOTH_MD (3<<10) /* Bit 11..10: both Pause Mode */
+/* Pause Bits (PHY_B_AN_ASP and PHY_B_AN_PC) encoding */
+#define PHY_B_P_NO_PAUSE (0<<10) /* Bit 11..10: no Pause Mode */
+#define PHY_B_P_SYM_MD (1<<10) /* Bit 11..10: symmetric Pause Mode */
+#define PHY_B_P_ASYM_MD (2<<10) /* Bit 11..10: asymmetric Pause Mode */
+#define PHY_B_P_BOTH_MD (3<<10) /* Bit 11..10: both Pause Mode */
/*
* Resolved Duplex mode and Capabilities (Aux Status Summary Reg)
*/
-#define PHY_B_RES_1000FD (7<<8) /* Bit 10..8: 1000Base-T Full Dup. */
-#define PHY_B_RES_1000HD (6<<8) /* Bit 10..8: 1000Base-T Half Dup. */
+#define PHY_B_RES_1000FD (7<<8) /* Bit 10..8: 1000Base-T Full Dup. */
+#define PHY_B_RES_1000HD (6<<8) /* Bit 10..8: 1000Base-T Half Dup. */
/* others: 100/10: invalid for us */
/*
* Level One-Specific
*/
-/***** PHY_LONE_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_L_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_L_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
-#define PHY_L_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
-#define PHY_L_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
-#define PHY_L_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_L_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
- /* Bit 7..0: reserved */
-
-/***** PHY_LONE_1000T_STAT 16 bit ro 1000Base-T Status Reg *****/
-#define PHY_L_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
-#define PHY_L_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
-#define PHY_L_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
-#define PHY_L_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status*/
-#define PHY_L_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
-#define PHY_L_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
- /* Bit 9..8: reserved */
-#define PHY_B_1000S_IEC (255<<0)/* Bit 7..0: Idle Error Count */
+/***** PHY_LONE_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
+#define PHY_L_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
+#define PHY_L_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
+#define PHY_L_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
+#define PHY_L_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
+#define PHY_L_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
+#define PHY_L_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
+ /* Bit 7..0: reserved */
+
+/***** PHY_LONE_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
+#define PHY_L_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
+#define PHY_L_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
+#define PHY_L_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
+#define PHY_L_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status */
+#define PHY_L_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
+#define PHY_L_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
+ /* Bit 9..8: reserved */
+#define PHY_B_1000S_IEC 0xff /* Bit 7..0: Idle Error Count */
-/***** PHY_LONE_EXT_STAT 16 bit ro Extended Status Register *****/
+/***** PHY_LONE_EXT_STAT 16 bit r/o Extended Status Register *****/
#define PHY_L_ES_X_FD_CAP (1<<15) /* Bit 15: 1000Base-X FD capable */
#define PHY_L_ES_X_HD_CAP (1<<14) /* Bit 14: 1000Base-X HD capable */
#define PHY_L_ES_T_FD_CAP (1<<13) /* Bit 13: 1000Base-T FD capable */
#define PHY_L_ES_T_HD_CAP (1<<12) /* Bit 12: 1000Base-T HD capable */
/* Bit 11..0: reserved */
-/***** PHY_LONE_PORT_CFG 16 bit r/w Port Configuration Reg *****/
+/***** PHY_LONE_PORT_CFG 16 bit r/w Port Configuration Reg *****/
#define PHY_L_PC_REP_MODE (1<<15) /* Bit 15: Repeater Mode */
/* Bit 14: reserved */
#define PHY_L_PC_TX_DIS (1<<13) /* Bit 13: Tx output Disabled */
#define PHY_L_PC_BY_SCR (1<<12) /* Bit 12: Bypass Scrambler */
#define PHY_L_PC_BY_45 (1<<11) /* Bit 11: Bypass 4B5B-Decoder */
#define PHY_L_PC_JAB_DIS (1<<10) /* Bit 10: Jabber Disabled */
-#define PHY_L_PC_SQE (1<<9) /* Bit 9: Enable Heartbeat */
-#define PHY_L_PC_TP_LOOP (1<<8) /* Bit 8: TP Loopback */
-#define PHY_L_PC_SSS (1<<7) /* Bit 7: Smart Speed Selection */
-#define PHY_L_PC_FIFO_SIZE (1<<6) /* Bit 6: FIFO Size */
-#define PHY_L_PC_PRE_EN (1<<5) /* Bit 5: Preamble Enable */
-#define PHY_L_PC_CIM (1<<4) /* Bit 4: Carrier Integrity Mon */
-#define PHY_L_PC_10_SER (1<<3) /* Bit 3: Use Serial Output */
-#define PHY_L_PC_ANISOL (1<<2) /* Bit 2: Unisolate Port */
-#define PHY_L_PC_TEN_BIT (1<<1) /* Bit 1: 10bit iface mode on */
-#define PHY_L_PC_ALTCLOCK (1<<0) /* Bit 0: (ro) ALTCLOCK Mode on */
+#define PHY_L_PC_SQE (1<<9) /* Bit 9: Enable Heartbeat */
+#define PHY_L_PC_TP_LOOP (1<<8) /* Bit 8: TP Loopback */
+#define PHY_L_PC_SSS (1<<7) /* Bit 7: Smart Speed Selection */
+#define PHY_L_PC_FIFO_SIZE (1<<6) /* Bit 6: FIFO Size */
+#define PHY_L_PC_PRE_EN (1<<5) /* Bit 5: Preamble Enable */
+#define PHY_L_PC_CIM (1<<4) /* Bit 4: Carrier Integrity Mon */
+#define PHY_L_PC_10_SER (1<<3) /* Bit 3: Use Serial Output */
+#define PHY_L_PC_ANISOL (1<<2) /* Bit 2: Unisolate Port */
+#define PHY_L_PC_TEN_BIT (1<<1) /* Bit 1: 10bit iface mode on */
+#define PHY_L_PC_ALTCLOCK (1<<0) /* Bit 0: (ro) ALTCLOCK Mode on */
-/***** PHY_LONE_Q_STAT 16 bit ro Quick Status Reg *****/
+/***** PHY_LONE_Q_STAT 16 bit r/o Quick Status Reg *****/
#define PHY_L_QS_D_RATE (3<<14) /* Bit 15..14: Data Rate */
#define PHY_L_QS_TX_STAT (1<<13) /* Bit 13: Transmitting */
#define PHY_L_QS_RX_STAT (1<<12) /* Bit 12: Receiving */
#define PHY_L_QS_COL_STAT (1<<11) /* Bit 11: Collision */
#define PHY_L_QS_L_STAT (1<<10) /* Bit 10: Link is up */
-#define PHY_L_QS_DUP_MOD (1<<9) /* Bit 9: Full/Half Duplex */
-#define PHY_L_QS_AN (1<<8) /* Bit 8: AutoNeg is On */
-#define PHY_L_QS_AN_C (1<<7) /* Bit 7: AN is Complete */
-#define PHY_L_QS_LLE (7<<4) /* Bit 6: Line Length Estim. */
-#define PHY_L_QS_PAUSE (1<<3) /* Bit 3: LP advertised Pause */
-#define PHY_L_QS_AS_PAUSE (1<<2) /* Bit 2: LP adv. asym. Pause */
-#define PHY_L_QS_ISOLATE (1<<1) /* Bit 1: CIM Isolated */
-#define PHY_L_QS_EVENT (1<<0) /* Bit 0: Event has occurred */
+#define PHY_L_QS_DUP_MOD (1<<9) /* Bit 9: Full/Half Duplex */
+#define PHY_L_QS_AN (1<<8) /* Bit 8: AutoNeg is On */
+#define PHY_L_QS_AN_C (1<<7) /* Bit 7: AN is Complete */
+#define PHY_L_QS_LLE (7<<4) /* Bit 6: Line Length Estim. */
+#define PHY_L_QS_PAUSE (1<<3) /* Bit 3: LP advertised Pause */
+#define PHY_L_QS_AS_PAUSE (1<<2) /* Bit 2: LP adv. asym. Pause */
+#define PHY_L_QS_ISOLATE (1<<1) /* Bit 1: CIM Isolated */
+#define PHY_L_QS_EVENT (1<<0) /* Bit 0: Event has occurred */
-/***** PHY_LONE_INT_ENAB 16 bit r/w Interrupt Enable Reg *****/
-/***** PHY_LONE_INT_STAT 16 bit ro Interrupt Status Reg *****/
+/***** PHY_LONE_INT_ENAB 16 bit r/w Interrupt Enable Reg *****/
+/***** PHY_LONE_INT_STAT 16 bit r/o Interrupt Status Reg *****/
/* Bit 15..14: reserved */
-#define PHY_L_IS_AN_F (1<<13) /* Bit 13: Autoneg fault */
+#define PHY_L_IS_AN_F (1<<13) /* Bit 13: Auto-Negotiation fault */
/* Bit 12: not described */
#define PHY_L_IS_CROSS (1<<11) /* Bit 11: Crossover used */
-#define PHY_L_IS_POL (1<<10) /* Bit 10: Polarity correct. used*/
-#define PHY_L_IS_SS (1<<9) /* Bit 9: Smart Speed Downgrade*/
-#define PHY_L_IS_CFULL (1<<8) /* Bit 8: Counter Full */
-#define PHY_L_IS_AN_C (1<<7) /* Bit 7: AutoNeg Complete */
-#define PHY_L_IS_SPEED (1<<6) /* Bit 6: Speed Changed */
-#define PHY_L_IS_DUP (1<<5) /* Bit 5: Duplex Changed */
-#define PHY_L_IS_LS (1<<4) /* Bit 4: Link Status Changed */
-#define PHY_L_IS_ISOL (1<<3) /* Bit 3: Isolate Occured */
-#define PHY_L_IS_MDINT (1<<2) /* Bit 2: (ro) STAT: MII Int Pending */
-#define PHY_L_IS_INTEN (1<<1) /* Bit 1: ENAB: Enable IRQs */
-#define PHY_L_IS_FORCE (1<<0) /* Bit 0: ENAB: Force Interrupt */
+#define PHY_L_IS_POL (1<<10) /* Bit 10: Polarity correct. used */
+#define PHY_L_IS_SS (1<<9) /* Bit 9: Smart Speed Downgrade */
+#define PHY_L_IS_CFULL (1<<8) /* Bit 8: Counter Full */
+#define PHY_L_IS_AN_C (1<<7) /* Bit 7: AutoNeg Complete */
+#define PHY_L_IS_SPEED (1<<6) /* Bit 6: Speed Changed */
+#define PHY_L_IS_DUP (1<<5) /* Bit 5: Duplex Changed */
+#define PHY_L_IS_LS (1<<4) /* Bit 4: Link Status Changed */
+#define PHY_L_IS_ISOL (1<<3) /* Bit 3: Isolate Occured */
+#define PHY_L_IS_MDINT (1<<2) /* Bit 2: (ro) STAT: MII Int Pending */
+#define PHY_L_IS_INTEN (1<<1) /* Bit 1: ENAB: Enable IRQs */
+#define PHY_L_IS_FORCE (1<<0) /* Bit 0: ENAB: Force Interrupt */
/* int. mask */
#define PHY_L_DEF_MSK (PHY_L_IS_LS | PHY_L_IS_ISOL | PHY_L_IS_INTEN)
-/***** PHY_LONE_LED_CFG 16 bit r/w LED Configuration Reg *****/
+/***** PHY_LONE_LED_CFG 16 bit r/w LED Configuration Reg *****/
#define PHY_L_LC_LEDC (3<<14) /* Bit 15..14: Col/Blink/On/Off */
#define PHY_L_LC_LEDR (3<<12) /* Bit 13..12: Rx/Blink/On/Off */
#define PHY_L_LC_LEDT (3<<10) /* Bit 11..10: Tx/Blink/On/Off */
-#define PHY_L_LC_LEDG (3<<8) /* Bit 9..8: Giga/Blink/On/Off */
-#define PHY_L_LC_LEDS (3<<6) /* Bit 7..6: 10-100/Blink/On/Off */
-#define PHY_L_LC_LEDL (3<<4) /* Bit 5..4: Link/Blink/On/Off */
-#define PHY_L_LC_LEDF (3<<2) /* Bit 3..2: Duplex/Blink/On/Off */
-#define PHY_L_LC_PSTRECH (1<<1) /* Bit 1: Strech LED Pulses */
-#define PHY_L_LC_FREQ (1<<0) /* Bit 0: 30/100 ms */
+#define PHY_L_LC_LEDG (3<<8) /* Bit 9..8: Giga/Blink/On/Off */
+#define PHY_L_LC_LEDS (3<<6) /* Bit 7..6: 10-100/Blink/On/Off */
+#define PHY_L_LC_LEDL (3<<4) /* Bit 5..4: Link/Blink/On/Off */
+#define PHY_L_LC_LEDF (3<<2) /* Bit 3..2: Duplex/Blink/On/Off */
+#define PHY_L_LC_PSTRECH (1<<1) /* Bit 1: Strech LED Pulses */
+#define PHY_L_LC_FREQ (1<<0) /* Bit 0: 30/100 ms */
-/***** PHY_LONE_PORT_CTRL 16 bit r/w Port Control Reg *****/
+/***** PHY_LONE_PORT_CTRL 16 bit r/w Port Control Reg *****/
#define PHY_L_PC_TX_TCLK (1<<15) /* Bit 15: Enable TX_TCLK */
/* Bit 14: reserved */
#define PHY_L_PC_ALT_NP (1<<13) /* Bit 14: Alternate Next Page */
#define PHY_L_PC_GMII_ALT (1<<12) /* Bit 13: Alternate GMII driver */
/* Bit 11: reserved */
#define PHY_L_PC_TEN_CRS (1<<10) /* Bit 10: Extend CRS*/
- /* Bit 9..0: not described */
+ /* Bit 9..0: not described */
-/***** PHY_LONE_CIM 16 bit ro CIM Reg *****/
+/***** PHY_LONE_CIM 16 bit r/o CIM Reg *****/
#define PHY_L_CIM_ISOL (255<<8)/* Bit 15..8: Isolate Count */
#define PHY_L_CIM_FALSE_CAR (255<<0)/* Bit 7..0: False Carrier Count */
@@ -1105,37 +1226,37 @@
/*
* Pause Bits (PHY_L_AN_ASP and PHY_L_AN_PC) encoding
*/
-#define PHY_L_P_NO_PAUSE (0<<10) /* Bit 11..10: no Pause Mode */
-#define PHY_L_P_SYM_MD (1<<10) /* Bit 11..10: symmetric Pause Mode */
-#define PHY_L_P_ASYM_MD (2<<10) /* Bit 11..10: asymmetric Pause Mode */
-#define PHY_L_P_BOTH_MD (3<<10) /* Bit 11..10: both Pause Mode */
+#define PHY_L_P_NO_PAUSE (0<<10) /* Bit 11..10: no Pause Mode */
+#define PHY_L_P_SYM_MD (1<<10) /* Bit 11..10: symmetric Pause Mode */
+#define PHY_L_P_ASYM_MD (2<<10) /* Bit 11..10: asymmetric Pause Mode */
+#define PHY_L_P_BOTH_MD (3<<10) /* Bit 11..10: both Pause Mode */
/*
* National-Specific
*/
-/***** PHY_NAT_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_N_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_N_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
-#define PHY_N_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
-#define PHY_N_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
-#define PHY_N_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_N_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
-#define PHY_N_1000C_APC (1<<7) /* Bit 7: Asymetric Pause Cap. */
- /* Bit 6..0: reserved */
-
-/***** PHY_NAT_1000T_STAT 16 bit ro 1000Base-T Status Reg *****/
-#define PHY_N_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
-#define PHY_N_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
-#define PHY_N_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
-#define PHY_N_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status*/
-#define PHY_N_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
-#define PHY_N_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
-#define PHY_N_1000C_LP_APC (1<<9) /* Bit 9: LP Asym. Pause Cap. */
- /* Bit 8: reserved */
-#define PHY_N_1000S_IEC (255<<0)/* Bit 7..0: Idle Error Count */
+/***** PHY_NAT_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
+#define PHY_N_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
+#define PHY_N_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
+#define PHY_N_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
+#define PHY_N_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
+#define PHY_N_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
+#define PHY_N_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
+#define PHY_N_1000C_APC (1<<7) /* Bit 7: Asymmetric Pause Cap. */
+ /* Bit 6..0: reserved */
+
+/***** PHY_NAT_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
+#define PHY_N_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
+#define PHY_N_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
+#define PHY_N_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
+#define PHY_N_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status*/
+#define PHY_N_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
+#define PHY_N_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
+#define PHY_N_1000C_LP_APC (1<<9) /* Bit 9: LP Asym. Pause Cap. */
+ /* Bit 8: reserved */
+#define PHY_N_1000S_IEC 0xff /* Bit 7..0: Idle Error Count */
-/***** PHY_NAT_EXT_STAT 16 bit ro Extended Status Register *****/
+/***** PHY_NAT_EXT_STAT 16 bit r/o Extended Status Register *****/
#define PHY_N_ES_X_FD_CAP (1<<15) /* Bit 15: 1000Base-X FD capable */
#define PHY_N_ES_X_HD_CAP (1<<14) /* Bit 14: 1000Base-X HD capable */
#define PHY_N_ES_T_FD_CAP (1<<13) /* Bit 13: 1000Base-T FD capable */
@@ -1143,12 +1264,475 @@
/* Bit 11..0: reserved */
/* todo: those are still missing */
-/***** PHY_NAT_EXT_CTRL1 16 bit ro Extended Control Reg1 *****/
-/***** PHY_NAT_Q_STAT1 16 bit ro Quick Status Reg1 *****/
-/***** PHY_NAT_10B_OP 16 bit ro 10Base-T Operations Reg *****/
-/***** PHY_NAT_EXT_CTRL2 16 bit ro Extended Control Reg1 *****/
-/***** PHY_NAT_Q_STAT2 16 bit ro Quick Status Reg2 *****/
-/***** PHY_NAT_PHY_ADDR 16 bit ro PHY Address Register *****/
+/***** PHY_NAT_EXT_CTRL1 16 bit r/o Extended Control Reg1 *****/
+/***** PHY_NAT_Q_STAT1 16 bit r/o Quick Status Reg1 *****/
+/***** PHY_NAT_10B_OP 16 bit r/o 10Base-T Operations Reg *****/
+/***** PHY_NAT_EXT_CTRL2 16 bit r/o Extended Control Reg1 *****/
+/***** PHY_NAT_Q_STAT2 16 bit r/o Quick Status Reg2 *****/
+/***** PHY_NAT_PHY_ADDR 16 bit r/o PHY Address Register *****/
+
+/*
+ * Marvell-Specific
+ */
+/***** PHY_MARV_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
+/***** PHY_MARV_AUNE_LP 16 bit r/w Link Part Ability Reg *****/
+#define PHY_M_AN_NXT_PG BIT_15 /* Request Next Page */
+#define PHY_M_AN_ACK BIT_14 /* (ro) Acknowledge Received */
+#define PHY_M_AN_RF BIT_13 /* Remote Fault */
+ /* Bit 12: reserved */
+#define PHY_M_AN_ASP BIT_11 /* Asymmetric Pause */
+#define PHY_M_AN_PC BIT_10 /* MAC Pause implemented */
+#define PHY_M_AN_100_FD BIT_8 /* Advertise 100Base-TX Full Duplex */
+#define PHY_M_AN_100_HD BIT_7 /* Advertise 100Base-TX Half Duplex */
+#define PHY_M_AN_10_FD BIT_6 /* Advertise 10Base-TX Full Duplex */
+#define PHY_M_AN_10_HD BIT_5 /* Advertise 10Base-TX Half Duplex */
+
+/* special defines for FIBER (88E1011S only) */
+#define PHY_M_AN_ASP_X BIT_8 /* Asymmetric Pause */
+#define PHY_M_AN_PC_X BIT_7 /* MAC Pause implemented */
+#define PHY_M_AN_1000X_AHD BIT_6 /* Advertise 10000Base-X Half Duplex */
+#define PHY_M_AN_1000X_AFD BIT_5 /* Advertise 10000Base-X Full Duplex */
+
+/* Pause Bits (PHY_M_AN_ASP_X and PHY_M_AN_PC_X) encoding */
+#define PHY_M_P_NO_PAUSE_X (0<<7) /* Bit 8.. 7: no Pause Mode */
+#define PHY_M_P_SYM_MD_X (1<<7) /* Bit 8.. 7: symmetric Pause Mode */
+#define PHY_M_P_ASYM_MD_X (2<<7) /* Bit 8.. 7: asymmetric Pause Mode */
+#define PHY_M_P_BOTH_MD_X (3<<7) /* Bit 8.. 7: both Pause Mode */
+
+/***** PHY_MARV_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
+#define PHY_M_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
+#define PHY_M_1000C_MSE (1<<12) /* Bit 12: Manual Master/Slave Enable */
+#define PHY_M_1000C_MSC (1<<11) /* Bit 11: M/S Configuration (1=Master) */
+#define PHY_M_1000C_MPD (1<<10) /* Bit 10: Multi-Port Device */
+#define PHY_M_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
+#define PHY_M_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
+ /* Bit 7..0: reserved */
+
+/***** PHY_MARV_PHY_CTRL 16 bit r/w PHY Specific Ctrl Reg *****/
+
+#define PHY_M_PC_TX_FFD_MSK (3<<14) /* Bit 15..14: Tx FIFO Depth Mask */
+#define PHY_M_PC_RX_FFD_MSK (3<<12) /* Bit 13..12: Rx FIFO Depth Mask */
+#define PHY_M_PC_ASS_CRS_TX (1<<11) /* Bit 11: Assert CRS on Transmit */
+#define PHY_M_PC_FL_GOOD (1<<10) /* Bit 10: Force Link Good */
+#define PHY_M_PC_EN_DET_MSK (3<<8) /* Bit 9.. 8: Energy Detect Mask */
+#define PHY_M_PC_ENA_EXT_D (1<<7) /* Bit 7: Enable Ext. Distance (10BT) */
+#define PHY_M_PC_MDIX_MSK (3<<5) /* Bit 6.. 5: MDI/MDIX Config. Mask */
+#define PHY_M_PC_DIS_125CLK (1<<4) /* Bit 4: Disable 125 CLK */
+#define PHY_M_PC_MAC_POW_UP (1<<3) /* Bit 3: MAC Power up */
+#define PHY_M_PC_SQE_T_ENA (1<<2) /* Bit 2: SQE Test Enabled */
+#define PHY_M_PC_POL_R_DIS (1<<1) /* Bit 1: Polarity Reversal Disabled */
+#define PHY_M_PC_DIS_JABBER (1<<0) /* Bit 0: Disable Jabber */
+
+#define PHY_M_PC_MDI_XMODE(x) SHIFT5(x)
+#define PHY_M_PC_MAN_MDI 0 /* 00 = Manual MDI configuration */
+#define PHY_M_PC_MAN_MDIX 1 /* 01 = Manual MDIX configuration */
+#define PHY_M_PC_ENA_AUTO 3 /* 11 = Enable Automatic Crossover */
+
+/***** PHY_MARV_PHY_STAT 16 bit r/o PHY Specific Status Reg *****/
+#define PHY_M_PS_SPEED_MSK (3<<14) /* Bit 15..14: Speed Mask */
+#define PHY_M_PS_SPEED_1000 (1<<15) /* 10 = 1000 Mbps */
+#define PHY_M_PS_SPEED_100 (1<<14) /* 01 = 100 Mbps */
+#define PHY_M_PS_SPEED_10 0 /* 00 = 10 Mbps */
+#define PHY_M_PS_FULL_DUP (1<<13) /* Bit 13: Full Duplex */
+#define PHY_M_PS_PAGE_REC (1<<12) /* Bit 12: Page Received */
+#define PHY_M_PS_SPDUP_RES (1<<11) /* Bit 11: Speed & Duplex Resolved */
+#define PHY_M_PS_LINK_UP (1<<10) /* Bit 10: Link Up */
+#define PHY_M_PS_CABLE_MSK (3<<7) /* Bit 9.. 7: Cable Length Mask */
+#define PHY_M_PS_MDI_X_STAT (1<<6) /* Bit 6: MDI Crossover Stat (1=MDIX) */
+#define PHY_M_PS_DOWNS_STAT (1<<5) /* Bit 5: Downshift Status (1=downsh.) */
+#define PHY_M_PS_ENDET_STAT (1<<4) /* Bit 4: Energy Detect Status (1=act) */
+#define PHY_M_PS_TX_P_EN (1<<3) /* Bit 3: Tx Pause Enabled */
+#define PHY_M_PS_RX_P_EN (1<<2) /* Bit 2: Rx Pause Enabled */
+#define PHY_M_PS_POL_REV (1<<1) /* Bit 1: Polarity Reversed */
+#define PHY_M_PC_JABBER (1<<0) /* Bit 0: Jabber */
+
+#define PHY_M_PS_PAUSE_MSK (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN)
+
+/***** PHY_MARV_INT_MASK 16 bit r/w Interrupt Mask Reg *****/
+/***** PHY_MARV_INT_STAT 16 bit r/o Interrupt Status Reg *****/
+#define PHY_M_IS_AN_ERROR (1<<15) /* Bit 15: Auto-Negotiation Error */
+#define PHY_M_IS_LSP_CHANGE (1<<14) /* Bit 14: Link Speed Changed */
+#define PHY_M_IS_DUP_CHANGE (1<<13) /* Bit 13: Duplex Mode Changed */
+#define PHY_M_IS_AN_PR (1<<12) /* Bit 12: Page Received */
+#define PHY_M_IS_AN_COMPL (1<<11) /* Bit 11: Auto-Negotiation Completed */
+#define PHY_M_IS_LST_CHANGE (1<<10) /* Bit 10: Link Status Changed */
+#define PHY_M_IS_SYMB_ERROR (1<<9) /* Bit 9: Symbol Error */
+#define PHY_M_IS_FALSE_CARR (1<<8) /* Bit 8: False Carrier */
+#define PHY_M_IS_FIFO_ERROR (1<<7) /* Bit 7: FIFO Overflow/Underrun Error */
+#define PHY_M_IS_MDI_CHANGE (1<<6) /* Bit 6: MDI Crossover Changed */
+#define PHY_M_IS_DOWNSH_DET (1<<5) /* Bit 5: Downshift Detected */
+#define PHY_M_IS_END_CHANGE (1<<4) /* Bit 4: Energy Detect Changed */
+ /* Bit 3..2: reserved */
+#define PHY_M_IS_POL_CHANGE (1<<1) /* Bit 1: Polarity Changed */
+#define PHY_M_IS_JABBER (1<<0) /* Bit 0: Jabber */
+
+#define PHY_M_DEF_MSK (PHY_M_IS_AN_ERROR | PHY_M_IS_AN_PR | \
+ PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR)
+
+/***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/
+#define PHY_M_EC_M_DSC_MSK (3<<10) /* Bit 11..10: Master downshift counter */
+#define PHY_M_EC_S_DSC_MSK (3<<8) /* Bit 9.. 8: Slave downshift counter */
+#define PHY_M_EC_MAC_S_MSK (7<<4) /* Bit 6.. 4: Def. MAC interface speed */
+
+#define PHY_M_EC_M_DSC(x) SHIFT10(x) /* 00=1x; 01=2x; 10=3x; 11=4x */
+#define PHY_M_EC_S_DSC(x) SHIFT8(x) /* 00=dis; 01=1x; 10=2x; 11=3x */
+#define PHY_M_EC_MAC_S(x) SHIFT4(x) /* 01X=0; 110=2.5; 111=25 (MHz) */
+
+#define MAC_TX_CLK_0_MHZ 2
+#define MAC_TX_CLK_2_5_MHZ 6
+#define MAC_TX_CLK_25_MHZ 7
+
+/***** PHY_MARV_LED_CTRL 16 bit r/w LED Control Reg *****/
+#define PHY_M_LEDC_DIS_LED (1<<15) /* Bit 15: Disable LED */
+#define PHY_M_LEDC_PULS_MSK (7<<12) /* Bit 14..12: Pulse Stretch Mask */
+#define PHY_M_LEDC_F_INT (1<<11) /* Bit 11: Force Interrupt */
+#define PHY_M_LEDC_BL_R_MSK (7<<8) /* Bit 10.. 8: Blink Rate Mask */
+ /* Bit 7.. 5: reserved */
+#define PHY_M_LEDC_LINK_MSK (3<<3) /* Bit 4.. 3: Link Control Mask */
+#define PHY_M_LEDC_DP_CTRL (1<<2) /* Bit 2: Duplex Control */
+#define PHY_M_LEDC_RX_CTRL (1<<1) /* Bit 1: Rx activity / Link */
+#define PHY_M_LEDC_TX_CTRL (1<<0) /* Bit 0: Tx activity / Link */
+
+#define PHY_M_LED_PULS_DUR(x) SHIFT12(x) /* Pulse Stretch Duration */
+
+#define PULS_NO_STR 0 /* no pulse stretching */
+#define PULS_21MS 1 /* 21 ms to 42 ms */
+#define PULS_42MS 2 /* 42 ms to 84 ms */
+#define PULS_84MS 3 /* 84 ms to 170 ms */
+#define PULS_170MS 4 /* 170 ms to 340 ms */
+#define PULS_340MS 5 /* 340 ms to 670 ms */
+#define PULS_670MS 6 /* 670 ms to 1.3 s */
+#define PULS_1300MS 7 /* 1.3 s to 2.7 s */
+
+#define PHY_M_LED_BLINK_RT(x) SHIFT8(x) /* Blink Rate */
+
+#define BLINK_42MS 0 /* 42 ms */
+#define BLINK_84MS 1 /* 84 ms */
+#define BLINK_170MS 2 /* 170 ms */
+#define BLINK_340MS 3 /* 340 ms */
+#define BLINK_670MS 4 /* 670 ms */
+ /* values 5 - 7: reserved */
+
+/***** PHY_MARV_LED_OVER 16 bit r/w Manual LED Override Reg *****/
+#define PHY_M_LED_MO_DUP(x) SHIFT10(x) /* Bit 11..10: Duplex */
+#define PHY_M_LED_MO_10(x) SHIFT8(x) /* Bit 9.. 8: Link 10 */
+#define PHY_M_LED_MO_100(x) SHIFT6(x) /* Bit 7.. 6: Link 100 */
+#define PHY_M_LED_MO_1000(x) SHIFT4(x) /* Bit 5.. 4: Link 1000 */
+#define PHY_M_LED_MO_RX(x) SHIFT2(x) /* Bit 3.. 2: Rx */
+#define PHY_M_LED_MO_TX(x) SHIFT0(x) /* Bit 1.. 0: Tx */
+
+#define MO_LED_NORM 0
+#define MO_LED_BLINK 1
+#define MO_LED_OFF 2
+#define MO_LED_ON 3
+
+/***** PHY_MARV_EXT_CTRL_2 16 bit r/w Ext. PHY Specific Ctrl 2 *****/
+ /* Bit 15.. 7: reserved */
+#define PHY_M_EC2_FI_IMPED (1<<6) /* Bit 6: Fiber Input Impedance */
+#define PHY_M_EC2_FO_IMPED (1<<5) /* Bit 5: Fiber Output Impedance */
+#define PHY_M_EC2_FO_M_CLK (1<<4) /* Bit 4: Fiber Mode Clock Enable */
+#define PHY_M_EC2_FO_BOOST (1<<3) /* Bit 3: Fiber Output Boost */
+#define PHY_M_EC2_FO_AM_MSK 7 /* Bit 2.. 0: Fiber Output Amplitude */
+
+/***** PHY_MARV_CABLE_DIAG 16 bit r/o Cable Diagnostic Reg *****/
+#define PHY_M_CABD_ENA_TEST (1<<15) /* Bit 15: Enable Test */
+#define PHY_M_CABD_STAT_MSK (3<<13) /* Bit 14..13: Status */
+ /* Bit 12.. 8: reserved */
+#define PHY_M_CABD_DIST_MSK 0xff /* Bit 7.. 0: Distance */
+
+/* values for Cable Diagnostic Status (11=fail; 00=OK; 10=open; 01=short) */
+#define CABD_STAT_NORMAL 0
+#define CABD_STAT_SHORT 1
+#define CABD_STAT_OPEN 2
+#define CABD_STAT_FAIL 3
+
+
+/*
+ * GMAC registers
+ *
+ * The GMAC registers are 16 or 32 bits wide.
+ * The GMACs host processor interface is 16 bits wide,
+ * therefore ALL registers will be addressed with 16 bit accesses.
+ *
+ * The following macros are provided to access the GMAC registers
+ * GM_IN16(), GM_OUT16, GM_IN32(), GM_OUT32(), GM_INADR(), GM_OUTADR(),
+ * GM_INHASH(), and GM_OUTHASH().
+ * The macros are defined in SkGeHw.h.
+ *
+ * Note: NA reg = Network Address e.g DA, SA etc.
+ *
+ */
+
+/* Port Registers */
+#define GM_GP_STAT 0x0000 /* 16 bit r/o General Purpose Status */
+#define GM_GP_CTRL 0x0004 /* 16 bit r/w General Purpose Control */
+#define GM_TX_CTRL 0x0008 /* 16 bit r/w Transmit Control Reg. */
+#define GM_RX_CTRL 0x000c /* 16 bit r/w Receive Control Reg. */
+#define GM_TX_FLOW_CTRL 0x0010 /* 16 bit r/w Transmit Flow-Control */
+#define GM_TX_PARAM 0x0014 /* 16 bit r/w Transmit Parameter Reg. */
+#define GM_SERIAL_MODE 0x0018 /* 16 bit r/w Serial Mode Register */
+
+/* Source Address Registers */
+#define GM_SRC_ADDR_1L 0x001c /* 16 bit r/w Source Address 1 (low) */
+#define GM_SRC_ADDR_1M 0x0020 /* 16 bit r/w Source Address 1 (middle) */
+#define GM_SRC_ADDR_1H 0x0024 /* 16 bit r/w Source Address 1 (high) */
+#define GM_SRC_ADDR_2L 0x0028 /* 16 bit r/w Source Address 2 (low) */
+#define GM_SRC_ADDR_2M 0x002c /* 16 bit r/w Source Address 2 (middle) */
+#define GM_SRC_ADDR_2H 0x0030 /* 16 bit r/w Source Address 2 (high) */
+
+/* Multicast Address Hash Registers */
+#define GM_MC_ADDR_H1 0x0034 /* 16 bit r/w Multicast Address Hash 1 */
+#define GM_MC_ADDR_H2 0x0038 /* 16 bit r/w Multicast Address Hash 2 */
+#define GM_MC_ADDR_H3 0x003c /* 16 bit r/w Multicast Address Hash 3 */
+#define GM_MC_ADDR_H4 0x0040 /* 16 bit r/w Multicast Address Hash 4 */
+
+/* Interrupt Source Registers */
+#define GM_TX_IRQ_SRC 0x0044 /* 16 bit r/o Tx Overflow IRQ Source */
+#define GM_RX_IRQ_SRC 0x0048 /* 16 bit r/o Rx Overflow IRQ Source */
+#define GM_TR_IRQ_SRC 0x004c /* 16 bit r/o Tx/Rx Over. IRQ Source */
+
+/* Interrupt Mask Registers */
+#define GM_TX_IRQ_MSK 0x0050 /* 16 bit r/w Tx Overflow IRQ Mask */
+#define GM_RX_IRQ_MSK 0x0054 /* 16 bit r/w Rx Overflow IRQ Mask */
+#define GM_TR_IRQ_MSK 0x0058 /* 16 bit r/w Tx/Rx Over. IRQ Mask */
+
+/* Serial Management Interface (SMI) Registers */
+#define GM_SMI_CTRL 0x0080 /* 16 bit r/w SMI Control Register */
+#define GM_SMI_DATA 0x0084 /* 16 bit r/w SMI Data Register */
+#define GM_PHY_ADDR 0x0088 /* 16 bit r/w GPHY Address Register */
+
+/* MIB Counters */
+#define GM_MIB_CNT_BASE 0x0100 /* Base Address of MIB Counters */
+#define GM_MIB_CNT_SIZE 44 /* Number of MIB Counters */
+
+/*
+ * MIB Counters base address definitions (low word) -
+ * use offset 4 for access to high word (32 bit r/o)
+ */
+#define GM_RXF_UC_OK \
+ (GM_MIB_CNT_BASE + 0) /* Unicast Frames Received OK */
+#define GM_RXF_BC_OK \
+ (GM_MIB_CNT_BASE + 8) /* Broadcast Frames Received OK */
+#define GM_RXF_MPAUSE \
+ (GM_MIB_CNT_BASE + 16) /* Pause MAC Ctrl Frames Received */
+#define GM_RXF_MC_OK \
+ (GM_MIB_CNT_BASE + 24) /* Multicast Frames Received OK */
+#define GM_RXF_FCS_ERR \
+ (GM_MIB_CNT_BASE + 32) /* Rx Frame Check Seq. Error */
+ /* GM_MIB_CNT_BASE + 40: reserved */
+#define GM_RXO_OK_LO \
+ (GM_MIB_CNT_BASE + 48) /* Octets Received OK Low */
+#define GM_RXO_OK_HI \
+ (GM_MIB_CNT_BASE + 56) /* Octets Received OK High */
+#define GM_RXO_ERR_LO \
+ (GM_MIB_CNT_BASE + 64) /* Octets Received Invalid Low */
+#define GM_RXO_ERR_HI \
+ (GM_MIB_CNT_BASE + 72) /* Octets Received Invalid High */
+#define GM_RXF_SHT \
+ (GM_MIB_CNT_BASE + 80) /* Frames <64 Byte Received OK */
+#define GM_RXE_FRAG \
+ (GM_MIB_CNT_BASE + 88) /* Frames <64 Byte Receeived with FCS Err */
+#define GM_RXF_64B \
+ (GM_MIB_CNT_BASE + 96) /* 64 Byte Rx Frame */
+#define GM_RXF_127B \
+ (GM_MIB_CNT_BASE + 104) /* 65-127 Byte Rx Frame */
+#define GM_RXF_255B \
+ (GM_MIB_CNT_BASE + 112) /* 128-255 Byte Rx Frame */
+#define GM_RXF_511B \
+ (GM_MIB_CNT_BASE + 120) /* 256-511 Byte Rx Frame */
+#define GM_RXF_1023B \
+ (GM_MIB_CNT_BASE + 128) /* 512-1023 Byte Rx Frame */
+#define GM_RXF_1518B \
+ (GM_MIB_CNT_BASE + 136) /* 1024-1518 Byte Rx Frame */
+#define GM_RXF_MAX_SZ \
+ (GM_MIB_CNT_BASE + 144) /* 1519-MaxSize Byte Rx Frame */
+#define GM_RXF_LNG_ERR \
+ (GM_MIB_CNT_BASE + 152) /* Rx Frame too Long Error */
+#define GM_RXF_JAB_PKT \
+ (GM_MIB_CNT_BASE + 160) /* Rx Jabber Packet Frame */
+ /* GM_MIB_CNT_BASE + 168: reserved */
+#define GM_RXE_FIFO_OV \
+ (GM_MIB_CNT_BASE + 176) /* Rx FIFO overflow Event */
+ /* GM_MIB_CNT_BASE + 184: reserved */
+#define GM_TXF_UC_OK \
+ (GM_MIB_CNT_BASE + 192) /* Unicast Frames Xmitted OK */
+#define GM_TXF_BC_OK \
+ (GM_MIB_CNT_BASE + 200) /* Broadcast Frames Xmitted OK */
+#define GM_TXF_MPAUSE \
+ (GM_MIB_CNT_BASE + 208) /* Pause MAC Ctrl Frames Xmitted */
+#define GM_TXF_MC_OK \
+ (GM_MIB_CNT_BASE + 216) /* Multicast Frames Xmitted OK */
+#define GM_TXO_OK_LO \
+ (GM_MIB_CNT_BASE + 224) /* Octets Transmitted OK Low */
+#define GM_TXO_OK_HI \
+ (GM_MIB_CNT_BASE + 232) /* Octets Transmitted OK High */
+#define GM_TXF_64B \
+ (GM_MIB_CNT_BASE + 240) /* 64 Byte Tx Frame */
+#define GM_TXF_127B \
+ (GM_MIB_CNT_BASE + 248) /* 65-127 Byte Tx Frame */
+#define GM_TXF_255B \
+ (GM_MIB_CNT_BASE + 256) /* 128-255 Byte Tx Frame */
+#define GM_TXF_511B \
+ (GM_MIB_CNT_BASE + 264) /* 256-511 Byte Tx Frame */
+#define GM_TXF_1023B \
+ (GM_MIB_CNT_BASE + 272) /* 512-1023 Byte Tx Frame */
+#define GM_TXF_1518B \
+ (GM_MIB_CNT_BASE + 280) /* 1024-1518 Byte Tx Frame */
+#define GM_TXF_MAX_SZ \
+ (GM_MIB_CNT_BASE + 288) /* 1519-MaxSize Byte Tx Frame */
+ /* GM_MIB_CNT_BASE + 296: reserved */
+#define GM_TXF_COL \
+ (GM_MIB_CNT_BASE + 304) /* Tx Collision */
+#define GM_TXF_LAT_COL \
+ (GM_MIB_CNT_BASE + 312) /* Tx Late Collision */
+#define GM_TXF_ABO_COL \
+ (GM_MIB_CNT_BASE + 320) /* Tx aborted due to Exces. Col. */
+#define GM_TXF_MUL_COL \
+ (GM_MIB_CNT_BASE + 328) /* Tx Multiple Collision */
+#define GM_TXF_SNG_COL \
+ (GM_MIB_CNT_BASE + 336) /* Tx Single Collision */
+#define GM_TXE_FIFO_UR \
+ (GM_MIB_CNT_BASE + 344) /* Tx FIFO Underrun Event */
+
+/*----------------------------------------------------------------------------*/
+/*
+ * GMAC Bit Definitions
+ *
+ * If the bit access behaviour differs from the register access behaviour
+ * (r/w, r/o) this is documented after the bit number.
+ * The following bit access behaviours are used:
+ * (sc) self clearing
+ * (r/o) read only
+ */
+
+/* GM_GP_STAT 16 bit r/o General Purpose Status Register */
+
+#define GM_GPSR_SPEED (1<<15) /* Bit 15: Port Speed (1 = 100 Mbps) */
+#define GM_GPSR_DUPLEX (1<<14) /* Bit 14: Duplex Mode (1 = Full) */
+#define GM_GPSR_FC_TX_DIS (1<<13) /* Bit 13: Tx Flow-Control Mode Disabled */
+#define GM_GPSR_LINK_UP (1<<12) /* Bit 12: Link Up Status */
+#define GM_GPSR_PAUSE (1<<11) /* Bit 11: Pause State */
+#define GM_GPSR_TX_ACTIVE (1<<10) /* Bit 10: Tx in Progress */
+#define GM_GPSR_EXC_COL (1<<9) /* Bit 9: Excessive Collisions Occured */
+#define GM_GPSR_LAT_COL (1<<8) /* Bit 8: Late Collisions Occured */
+ /* Bit 7..6: reserved */
+#define GM_GPSR_PHY_ST_CH (1<<5) /* Bit 5: PHY Status Change */
+#define GM_GPSR_GIG_SPEED (1<<4) /* Bit 4: Gigabit Speed (1 = 1000 Mbps) */
+#define GM_GPSR_PART_MODE (1<<3) /* Bit 3: Partition mode */
+#define GM_GPSR_FC_RX_DIS (1<<2) /* Bit 2: Rx Flow-Control Mode Disabled */
+#define GM_GPSR_PROM_EN (1<<1) /* Bit 1: Promiscuous Mode Enabled */
+ /* Bit 0: reserved */
+
+/* GM_GP_CTRL 16 bit r/w General Purpose Control Register */
+ /* Bit 15: reserved */
+#define GM_GPCR_PROM_ENA (1<<14) /* Bit 14: Enable Promiscuous Mode */
+#define GM_GPCR_FC_TX_DIS (1<<13) /* Bit 13: Disable Tx Flow-Control Mode */
+#define GM_GPCR_TX_ENA (1<<12) /* Bit 12: Enable Transmit */
+#define GM_GPCR_RX_ENA (1<<11) /* Bit 11: Enable Receive */
+#define GM_GPCR_BURST_ENA (1<<10) /* Bit 10: Enable Burst Mode */
+#define GM_GPCR_LOOP_ENA (1<<9) /* Bit 9: Enable MAC Loopback Mode */
+#define GM_GPCR_PART_ENA (1<<8) /* Bit 8: Enable Partition Mode */
+#define GM_GPCR_GIGS_ENA (1<<7) /* Bit 7: Gigabit Speed (1000 Mbps) */
+#define GM_GPCR_FL_PASS (1<<6) /* Bit 6: Force Link Pass */
+#define GM_GPCR_DUP_FULL (1<<5) /* Bit 5: Full Duplex Mode */
+#define GM_GPCR_FC_RX_DIS (1<<4) /* Bit 4: Disable Rx Flow-Control Mode */
+#define GM_GPCR_SPEED_100 (1<<3) /* Bit 3: Port Speed 100 Mbps */
+#define GM_GPCR_AU_DUP_DIS (1<<2) /* Bit 2: Disable Auto-Update Duplex */
+#define GM_GPCR_AU_FCT_DIS (1<<1) /* Bit 1: Disable Auto-Update Flow-C. */
+#define GM_GPCR_AU_SPD_DIS (1<<0) /* Bit 0: Disable Auto-Update Speed */
+
+#define GM_GPCR_SPEED_1000 (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100)
+#define GM_GPCR_AU_ALL_DIS (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |\
+ GM_GPCR_AU_SPD_DIS)
+
+/* GM_TX_CTRL 16 bit r/w Transmit Control Register */
+
+#define GM_TXCR_FORCE_JAM (1<<15) /* Bit 15: Force Jam / Flow-Control */
+#define GM_TXCR_CRC_DIS (1<<14) /* Bit 14: Disable insertion of CRC */
+#define GM_TXCR_PAD_DIS (1<<13) /* Bit 13: Disable padding of packets */
+#define GM_TXCR_COL_THR (4<<10) /* Bit 12..10: Collision Threshold */
+
+/* GM_RX_CTRL 16 bit r/w Receive Control Register */
+#define GM_RXCR_UCF_ENA (1<<15) /* Bit 15: Enable Unicast filtering */
+#define GM_RXCR_MCF_ENA (1<<14) /* Bit 14: Enable Multicast filtering */
+#define GM_RXCR_CRC_DIS (1<<13) /* Bit 13: Remove 4-byte CRC */
+#define GM_RXCR_PASS_FC (1<<12) /* Bit 12: Pass FC packets to FIFO */
+
+/* GM_TX_PARAM 16 bit r/w Transmit Parameter Register */
+#define GM_TXPA_JAMLEN_MSK (0x03<<14) /* Bit 15..14: Jam Length */
+#define GM_TXPA_JAMIPG_MSK (0x1f<<9) /* Bit 13..9: Jam IPG */
+#define GM_TXPA_JAMDAT_MSK (0x1f<<4) /* Bit 8..4: IPG Jam to Data */
+ /* Bit 3..0: reserved */
+#define JAM_LEN_VAL(x) SHIFT14(x)
+#define JAM_IPG_VAL(x) SHIFT9(x)
+#define IPG_JAM_DATA(x) SHIFT4(x)
+
+/* GM_SERIAL_MODE 16 bit r/w Serial Mode Register */
+#define GM_SMOD_DATABL_MSK (0x1f<<11) /* Bit 15..11: Data Blinder */
+#define GM_SMOD_LIMIT_4 (1<<10) /* Bit 10: 4 consecutive Tx trials */
+#define GM_SMOD_VLAN_ENA (1<<9) /* Bit 9: Enable VLAN (Max. Frame Len) */
+#define GM_SMOD_JUMBO_ENA (1<<8) /* Bit 8: Enable Jumbo (Max. Frame Len) */
+ /* Bit 7..5: reserved */
+#define GM_SMOD_IPG_MSK 0x1f /* Bit 4..0: Inter-Packet Gap (IPG) */
+
+#define DATA_BLIND_VAL(x) SHIFT11(x)
+#define DATA_BLIND_FAST_ETH 0x1c
+#define DATA_BLIND_GIGABIT 4
+
+#define IPG_VAL_FAST_ETH 0x1e
+#define IPG_VAL_GIGABIT 6
+
+/* GM_SMI_CTRL 16 bit r/w SMI Control Register */
+
+#define GM_SMI_CT_PHY_AD(x) SHIFT11(x)
+#define GM_SMI_CT_REG_AD(x) SHIFT6(x)
+#define GM_SMI_CT_OP_RD (1<<5) /* Bit 5: OpCode Read (0=Write)*/
+#define GM_SMI_CT_RD_VAL (1<<4) /* Bit 4: Read Valid (Read completed) */
+#define GM_SMI_CT_BUSY (1<<3) /* Bit 3: Busy (Operation in progress) */
+ /* Bit 2..0: reserved */
+
+/* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
+ /* Bit 15..6: reserved */
+#define GM_PAR_MIB_CLR (1<<5) /* Bit 5: Set MIB Clear Counter Mode */
+#define GM_PAR_MIB_TST (1<<4) /* Bit 4: MIB Load Counter (Test Mode) */
+ /* Bit 3..0: reserved */
+
+/* Receive Frame Status Encoding */
+#define GMR_FS_LEN (0xffffUL<<16) /* Bit 31..16: Rx Frame Length */
+ /* Bit 15..14: reserved */
+#define GMR_FS_VLAN (1L<<13) /* Bit 13: VLAN Packet */
+#define GMR_FS_JABBER (1L<<12) /* Bit 12: Jabber Packet */
+#define GMR_FS_UN_SIZE (1L<<11) /* Bit 11: Undersize Packet */
+#define GMR_FS_MC (1L<<10) /* Bit 10: Multicast Packet */
+#define GMR_FS_BC (1L<<9) /* Bit 9: Broadcast Packet */
+#define GMR_FS_RX_OK (1L<<8) /* Bit 8: Receive OK (Good Packet) */
+#define GMR_FS_GOOD_FC (1L<<7) /* Bit 7: Good Flow-Control Packet */
+#define GMR_FS_BAD_FC (1L<<6) /* Bit 6: Bad Flow-Control Packet */
+#define GMR_FS_MII_ERR (1L<<5) /* Bit 5: MII Error */
+#define GMR_FS_LONG_ERR (1L<<4) /* Bit 4: Too Long Packet */
+#define GMR_FS_FRAGMENT (1L<<3) /* Bit 3: Fragment */
+ /* Bit 2: reserved */
+#define GMR_FS_CRC_ERR (1L<<1) /* Bit 1: CRC Error */
+#define GMR_FS_RX_FF_OV (1L<<0) /* Bit 0: Rx FIFO Overflow */
+
+/*
+ * GMR_FS_ANY_ERR (analogous to XMR_FS_ANY_ERR)
+ */
+#define GMR_FS_ANY_ERR (GMR_FS_CRC_ERR | \
+ GMR_FS_LONG_ERR | \
+ GMR_FS_MII_ERR | \
+ GMR_FS_BAD_FC | \
+ GMR_FS_GOOD_FC | \
+ GMR_FS_JABBER)
+
+/* Rx GMAC FIFO Flush Mask (default) */
+#define RX_FF_FL_DEF_MSK (GMR_FS_CRC_ERR | \
+ GMR_FS_RX_FF_OV | \
+ GMR_FS_MII_ERR | \
+ GMR_FS_BAD_FC | \
+ GMR_FS_GOOD_FC | \
+ GMR_FS_UN_SIZE | \
+ GMR_FS_JABBER)
/* typedefs *******************************************************************/
diff -Nru a/drivers/net/sk98lin/skaddr.c b/drivers/net/sk98lin/skaddr.c
--- a/drivers/net/sk98lin/skaddr.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/sk98lin/skaddr.c Sun Aug 3 13:14:49 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skaddr.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.40 $
- * Date: $Date: 2001/02/14 14:04:59 $
+ * Project: Gigabit Ethernet Adapters, ADDR-Module
+ * Version: $Revision: 1.52 $
+ * Date: $Date: 2003/06/02 13:46:15 $
* Purpose: Manage Addresses (Multicast and Unicast) and Promiscuous Mode.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,63 @@
* History:
*
* $Log: skaddr.c,v $
+ * Revision 1.52 2003/06/02 13:46:15 tschilli
+ * Editorial changes.
+ *
+ * Revision 1.51 2003/05/13 17:12:43 mkarl
+ * Changes for SLIM Driver via SK_SLIM.
+ * Changes for driver not using RLMT via SK_NO_RLMT.
+ * Changes for driver not supporting MAC address override via SK_NO_MAO.
+ * Separeted GENESIS and YUKON only code to reduce code size.
+ * Editorial changes.
+ *
+ * Revision 1.50 2003/05/08 12:29:31 rschmidt
+ * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
+ * Changed initialisation for Next0[SK_MAX_MACS] to avoid
+ * compiler errors when SK_MAX_MACS=1.
+ * Editorial changes.
+ *
+ * Revision 1.49 2003/04/15 09:30:51 tschilli
+ * Copyright messages changed.
+ * "#error C++ is not yet supported." removed.
+ *
+ * Revision 1.48 2003/02/12 17:09:37 tschilli
+ * Fix in SkAddrOverride() to set both (physical and logical) MAC addresses
+ * in case that both addresses are identical.
+ *
+ * Revision 1.47 2002/09/17 06:31:10 tschilli
+ * Handling of SK_PROM_MODE_ALL_MC flag in SkAddrGmacMcUpdate()
+ * and SkAddrGmacPromiscuousChange() fixed.
+ * Editorial changes.
+ *
+ * Revision 1.46 2002/08/22 07:55:41 tschilli
+ * New function SkGmacMcHash() for GMAC multicast hashing algorithm added.
+ * Editorial changes.
+ *
+ * Revision 1.45 2002/08/15 12:29:35 tschilli
+ * SkAddrGmacMcUpdate() and SkAddrGmacPromiscuousChange() changed.
+ *
+ * Revision 1.44 2002/08/14 12:18:03 rschmidt
+ * Replaced direct handling of MAC Hashing (XMAC and GMAC)
+ * with routine SkMacHashing().
+ * Replaced wrong 3rd para 'i' with 'PortNumber' in SkMacPromiscMode().
+ *
+ * Revision 1.43 2002/08/13 09:37:43 rschmidt
+ * Corrected some SK_DBG_MSG outputs.
+ * Replaced wrong 2nd para pAC with IoC in SkMacPromiscMode().
+ * Editorial changes.
+ *
+ * Revision 1.42 2002/08/12 11:24:36 rschmidt
+ * Remove setting of logical MAC address GM_SRC_ADDR_2 in SkAddrInit().
+ * Replaced direct handling of MAC Promiscuous Mode (XMAC and GMAC)
+ * with routine SkMacPromiscMode().
+ * Editorial changes.
+ *
+ * Revision 1.41 2002/06/10 13:52:18 tschilli
+ * Changes for handling YUKON.
+ * All changes are internally and not visible to the programmer
+ * using this module.
+ *
* Revision 1.40 2001/02/14 14:04:59 rassmann
* Editorial changes.
*
@@ -166,13 +224,13 @@
* Description:
*
* This module is intended to manage multicast addresses, address override,
- * and promiscuous mode on GEnesis adapters.
+ * and promiscuous mode on GEnesis and Yukon adapters.
*
* Address Layout:
* port address: physical MAC address
- * 1st exact match: logical MAC address
- * 2nd exact match: RLMT multicast
- * exact match 3-13: OS-specific multicasts
+ * 1st exact match: logical MAC address (GEnesis only)
+ * 2nd exact match: RLMT multicast (GEnesis only)
+ * exact match 3-13: OS-specific multicasts (GEnesis only)
*
* Include File Hierarchy:
*
@@ -181,15 +239,14 @@
*
******************************************************************************/
-#ifndef lint
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
- "@(#) $Id: skaddr.c,v 1.40 2001/02/14 14:04:59 rassmann Exp $ (C) SysKonnect.";
-#endif /* !defined(lint) */
+ "@(#) $Id: skaddr.c,v 1.52 2003/06/02 13:46:15 tschilli Exp $ (C) Marvell.";
+#endif /* DEBUG ||!LINT || !SK_SLIM */
#define __SKADDR_C
#ifdef __cplusplus
-#error C++ is not yet supported.
extern "C" {
#endif /* cplusplus */
@@ -199,6 +256,8 @@
/* defines ********************************************************************/
+#define XMAC_POLY 0xEDB88320UL /* CRC32-Poly - XMAC: Little Endian */
+#define GMAC_POLY 0x04C11DB7L /* CRC16-Poly - GMAC: Little Endian */
#define HASH_BITS 6 /* #bits in hash */
#define SK_MC_BIT 0x01
@@ -222,7 +281,7 @@
/* local variables ************************************************************/
#ifdef DEBUG
-static int Next0[SK_MAX_MACS] = {0, 0};
+static int Next0[SK_MAX_MACS] = {0};
#endif /* DEBUG */
/* functions ******************************************************************/
@@ -247,7 +306,7 @@
* All permanent MAC addresses are read from EPROM.
* If the current MAC addresses are not already set in software,
* they are set to the values of the permanent addresses.
- * The current addresses are written to the corresponding XMAC.
+ * The current addresses are written to the corresponding MAC.
*
*
* SK_INIT_RUN
@@ -266,38 +325,27 @@
SK_IOC IoC, /* I/O context */
int Level) /* initialization level */
{
- int j;
- SK_U32 i;
- SK_U8 *InAddr;
- SK_U16 *OutAddr;
+ int j;
+ SK_U32 i;
+ SK_U8 *InAddr;
+ SK_U16 *OutAddr;
SK_ADDR_PORT *pAPort;
switch (Level) {
case SK_INIT_DATA:
- SK_MEMSET((char *)&pAC->Addr, 0, sizeof(SK_ADDR));
+ SK_MEMSET((char *) &pAC->Addr, (SK_U8) 0,
+ (SK_U16) sizeof(SK_ADDR));
for (i = 0; i < SK_MAX_MACS; i++) {
pAPort = &pAC->Addr.Port[i];
pAPort->PromMode = SK_PROM_MODE_NONE;
-
- pAPort->FirstExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
- pAPort->FirstExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
- pAPort->NextExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
- pAPort->NextExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
-
-#if 0
- /* Don't do this here ... */
-
- /* Reset Promiscuous mode. */
- (void)SkAddrPromiscuousChange(
- pAC,
- IoC,
- i,
- SK_PROM_MODE_NONE);
-#endif /* 0 */
+
+ pAPort->FirstExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
+ pAPort->FirstExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
+ pAPort->NextExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
+ pAPort->NextExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
}
-
-#ifdef DEBUG
+#ifdef xDEBUG
for (i = 0; i < SK_MAX_MACS; i++) {
if (pAC->Addr.Port[i].NextExactMatchRlmt <
SK_ADDR_FIRST_MATCH_RLMT) {
@@ -305,16 +353,16 @@
}
}
#endif /* DEBUG */
-
/* pAC->Addr.InitDone = SK_INIT_DATA; */
break;
- case SK_INIT_IO:
+ case SK_INIT_IO:
+#ifndef SK_NO_RLMT
for (i = 0; i < SK_MAX_NETS; i++) {
pAC->Addr.Net[i].ActivePort = pAC->Rlmt.Net[i].ActivePort;
}
-
-#ifdef DEBUG
+#endif /* !SK_NO_RLMT */
+#ifdef xDEBUG
for (i = 0; i < SK_MAX_MACS; i++) {
if (pAC->Addr.Port[i].NextExactMatchRlmt <
SK_ADDR_FIRST_MATCH_RLMT) {
@@ -322,10 +370,10 @@
}
}
#endif /* DEBUG */
-
+
/* Read permanent logical MAC address from Control Register File. */
for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
- InAddr = (SK_U8 *)&pAC->Addr.Net[0].PermanentMacAddress.a[j];
+ InAddr = (SK_U8 *) &pAC->Addr.Net[0].PermanentMacAddress.a[j];
SK_IN8(IoC, B2_MAC_1 + j, InAddr);
}
@@ -339,7 +387,6 @@
/* Set the current logical MAC address. */
pAC->Addr.Port[pAC->Addr.Net[0].ActivePort].Exact[0] =
pAC->Addr.Net[0].CurrentMacAddress;
-
#if SK_MAX_NETS > 1
/* Set logical MAC address for net 2 to (log | 3). */
if (!pAC->Addr.Net[1].CurrentMacAddressSet) {
@@ -353,43 +400,36 @@
}
#endif /* SK_MAX_NETS > 1 */
-#ifdef xDEBUG
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_INIT,
- ("Permanent MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.PermanentMacAddress.a[0],
- pAC->Addr.PermanentMacAddress.a[1],
- pAC->Addr.PermanentMacAddress.a[2],
- pAC->Addr.PermanentMacAddress.a[3],
- pAC->Addr.PermanentMacAddress.a[4],
- pAC->Addr.PermanentMacAddress.a[5]))
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_INIT,
- ("Logical MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.CurrentMacAddress.a[0],
- pAC->Addr.CurrentMacAddress.a[1],
- pAC->Addr.CurrentMacAddress.a[2],
- pAC->Addr.CurrentMacAddress.a[3],
- pAC->Addr.CurrentMacAddress.a[4],
- pAC->Addr.CurrentMacAddress.a[5]))
+#ifdef DEBUG
+ for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
+ ("Permanent MAC Address (Net%d): %02X %02X %02X %02X %02X %02X\n",
+ i,
+ pAC->Addr.Net[i].PermanentMacAddress.a[0],
+ pAC->Addr.Net[i].PermanentMacAddress.a[1],
+ pAC->Addr.Net[i].PermanentMacAddress.a[2],
+ pAC->Addr.Net[i].PermanentMacAddress.a[3],
+ pAC->Addr.Net[i].PermanentMacAddress.a[4],
+ pAC->Addr.Net[i].PermanentMacAddress.a[5]))
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
+ ("Logical MAC Address (Net%d): %02X %02X %02X %02X %02X %02X\n",
+ i,
+ pAC->Addr.Net[i].CurrentMacAddress.a[0],
+ pAC->Addr.Net[i].CurrentMacAddress.a[1],
+ pAC->Addr.Net[i].CurrentMacAddress.a[2],
+ pAC->Addr.Net[i].CurrentMacAddress.a[3],
+ pAC->Addr.Net[i].CurrentMacAddress.a[4],
+ pAC->Addr.Net[i].CurrentMacAddress.a[5]))
+ }
#endif /* DEBUG */
-#if 0
- /* Don't do this here ... */
-
- (void)SkAddrMcUpdate(pAC, IoC, pAC->Addr.ActivePort);
-#endif /* 0 */
-
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
+ for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
pAPort = &pAC->Addr.Port[i];
/* Read permanent port addresses from Control Register File. */
for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
- InAddr = (SK_U8 *)&pAPort->PermanentMacAddress.a[j];
+ InAddr = (SK_U8 *) &pAPort->PermanentMacAddress.a[j];
SK_IN8(IoC, B2_MAC_2 + 8 * i + j, InAddr);
}
@@ -403,40 +443,43 @@
pAPort->CurrentMacAddressSet = SK_TRUE;
}
- /* Set port's current MAC addresses. */
- OutAddr = (SK_U16 *)&pAPort->CurrentMacAddress.a[0];
- XM_OUTADDR(IoC, i, XM_SA, OutAddr);
-
-#ifdef xDEBUG
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_INIT,
- ("Permanent Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
+ /* Set port's current physical MAC address. */
+ OutAddr = (SK_U16 *) &pAPort->CurrentMacAddress.a[0];
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ XM_OUTADDR(IoC, i, XM_SA, OutAddr);
+ }
+#endif /* GENESIS */
+#ifdef YUKON
+ if (!pAC->GIni.GIGenesis) {
+ GM_OUTADDR(IoC, i, GM_SRC_ADDR_1L, OutAddr);
+ }
+#endif /* YUKON */
+#ifdef DEBUG
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
+ ("SkAddrInit: Permanent Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
pAPort->PermanentMacAddress.a[0],
pAPort->PermanentMacAddress.a[1],
pAPort->PermanentMacAddress.a[2],
pAPort->PermanentMacAddress.a[3],
pAPort->PermanentMacAddress.a[4],
pAPort->PermanentMacAddress.a[5]))
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_INIT,
- ("Phsical MAC Address: %02X %02X %02X %02X %02X %02X\n",
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
+ ("SkAddrInit: Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
pAPort->CurrentMacAddress.a[0],
pAPort->CurrentMacAddress.a[1],
pAPort->CurrentMacAddress.a[2],
pAPort->CurrentMacAddress.a[3],
pAPort->CurrentMacAddress.a[4],
pAPort->CurrentMacAddress.a[5]))
-#endif /* DEBUG */
+#endif /* DEBUG */
}
/* pAC->Addr.InitDone = SK_INIT_IO; */
break;
case SK_INIT_RUN:
-#ifdef DEBUG
+#ifdef xDEBUG
for (i = 0; i < SK_MAX_MACS; i++) {
if (pAC->Addr.Port[i].NextExactMatchRlmt <
SK_ADDR_FIRST_MATCH_RLMT) {
@@ -453,19 +496,24 @@
}
return (SK_ADDR_SUCCESS);
+
} /* SkAddrInit */
+#ifndef SK_SLIM
/******************************************************************************
*
* SkAddrMcClear - clear the multicast table
*
* Description:
- * This routine clears the multicast table
- * (either entry 2 or entries 3-16 and InexactFilter) of the given port.
+ * This routine clears the multicast table.
+ *
* If not suppressed by Flag SK_MC_SW_ONLY, the hardware is updated
* immediately.
*
+ * It calls either SkAddrXmacMcClear or SkAddrGmacMcClear, according
+ * to the adapter in use. The real work is done there.
+ *
* Context:
* runtime, pageable
* may be called starting with SK_INIT_DATA with flag SK_MC_SW_ONLY
@@ -481,21 +529,62 @@
SK_U32 PortNumber, /* Index of affected port */
int Flags) /* permanent/non-perm, sw-only */
{
- int i;
-
- if (PortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
+ int ReturnCode;
+
+ if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
return (SK_ADDR_ILLEGAL_PORT);
}
+
+ if (pAC->GIni.GIGenesis) {
+ ReturnCode = SkAddrXmacMcClear(pAC, IoC, PortNumber, Flags);
+ }
+ else {
+ ReturnCode = SkAddrGmacMcClear(pAC, IoC, PortNumber, Flags);
+ }
- if (Flags & SK_ADDR_PERMANENT) {
+ return (ReturnCode);
+
+} /* SkAddrMcClear */
+
+#endif /* !SK_SLIM */
+
+#ifndef SK_SLIM
+
+/******************************************************************************
+ *
+ * SkAddrXmacMcClear - clear the multicast table
+ *
+ * Description:
+ * This routine clears the multicast table
+ * (either entry 2 or entries 3-16 and InexactFilter) of the given port.
+ * If not suppressed by Flag SK_MC_SW_ONLY, the hardware is updated
+ * immediately.
+ *
+ * Context:
+ * runtime, pageable
+ * may be called starting with SK_INIT_DATA with flag SK_MC_SW_ONLY
+ * may be called after SK_INIT_IO without limitation
+ *
+ * Returns:
+ * SK_ADDR_SUCCESS
+ * SK_ADDR_ILLEGAL_PORT
+ */
+int SkAddrXmacMcClear(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* Index of affected port */
+int Flags) /* permanent/non-perm, sw-only */
+{
+ int i;
+
+ if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
/* Clear RLMT multicast addresses. */
pAC->Addr.Port[PortNumber].NextExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
}
else { /* not permanent => DRV */
- /* Clear InexactFilter. */
-
+ /* Clear InexactFilter */
for (i = 0; i < 8; i++) {
pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0;
}
@@ -506,20 +595,117 @@
}
if (!(Flags & SK_MC_SW_ONLY)) {
- (void)SkAddrMcUpdate(pAC, IoC, PortNumber);
+ (void) SkAddrXmacMcUpdate(pAC, IoC, PortNumber);
}
return (SK_ADDR_SUCCESS);
-} /* SkAddrMcClear */
+
+} /* SkAddrXmacMcClear */
+
+#endif /* !SK_SLIM */
+
+#ifndef SK_SLIM
+
+/******************************************************************************
+ *
+ * SkAddrGmacMcClear - clear the multicast table
+ *
+ * Description:
+ * This routine clears the multicast hashing table (InexactFilter)
+ * (either the RLMT or the driver bits) of the given port.
+ *
+ * If not suppressed by Flag SK_MC_SW_ONLY, the hardware is updated
+ * immediately.
+ *
+ * Context:
+ * runtime, pageable
+ * may be called starting with SK_INIT_DATA with flag SK_MC_SW_ONLY
+ * may be called after SK_INIT_IO without limitation
+ *
+ * Returns:
+ * SK_ADDR_SUCCESS
+ * SK_ADDR_ILLEGAL_PORT
+ */
+int SkAddrGmacMcClear(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* Index of affected port */
+int Flags) /* permanent/non-perm, sw-only */
+{
+ int i;
+
+#ifdef DEBUG
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("GMAC InexactFilter (not cleared): %02X %02X %02X %02X %02X %02X %02X %02X\n",
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[1],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[2],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[3],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[4],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[5],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[6],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]))
+#endif /* DEBUG */
+
+ /* Clear InexactFilter */
+ for (i = 0; i < 8; i++) {
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0;
+ }
+
+ if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
+
+ /* Copy DRV bits to InexactFilter. */
+ for (i = 0; i < 8; i++) {
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[i];
+
+ /* Clear InexactRlmtFilter. */
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[i] = 0;
+
+ }
+ }
+ else { /* not permanent => DRV */
+
+ /* Copy RLMT bits to InexactFilter. */
+ for (i = 0; i < 8; i++) {
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[i];
+
+ /* Clear InexactDrvFilter. */
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[i] = 0;
+ }
+ }
+
+#ifdef DEBUG
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("GMAC InexactFilter (cleared): %02X %02X %02X %02X %02X %02X %02X %02X\n",
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[1],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[2],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[3],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[4],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[5],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[6],
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]))
+#endif /* DEBUG */
+
+ if (!(Flags & SK_MC_SW_ONLY)) {
+ (void) SkAddrGmacMcUpdate(pAC, IoC, PortNumber);
+ }
+
+ return (SK_ADDR_SUCCESS);
+
+} /* SkAddrGmacMcClear */
#ifndef SK_ADDR_CHEAT
/******************************************************************************
*
- * SkCrc32McHash - hash multicast address
+ * SkXmacMcHash - hash multicast address
*
* Description:
* This routine computes the hash value for a multicast address.
+ * A CRC32 algorithm is used.
*
* Notes:
* The code was adapted from the XaQti data sheet.
@@ -530,17 +716,86 @@
* Returns:
* Hash value of multicast address.
*/
-unsigned SkCrc32McHash(
+SK_U32 SkXmacMcHash(
unsigned char *pMc) /* Multicast address */
{
- u32 Crc;
+ SK_U32 Idx;
+ SK_U32 Bit;
+ SK_U32 Data;
+ SK_U32 Crc;
+
+ Crc = 0xFFFFFFFFUL;
+ for (Idx = 0; Idx < SK_MAC_ADDR_LEN; Idx++) {
+ Data = *pMc++;
+ for (Bit = 0; Bit < 8; Bit++, Data >>= 1) {
+ Crc = (Crc >> 1) ^ (((Crc ^ Data) & 1) ? XMAC_POLY : 0);
+ }
+ }
- Crc = ether_crc_le(SK_MAC_ADDR_LEN, pMc);
+ return (Crc & ((1 << HASH_BITS) - 1));
+} /* SkXmacMcHash */
+
+
+/******************************************************************************
+ *
+ * SkGmacMcHash - hash multicast address
+ *
+ * Description:
+ * This routine computes the hash value for a multicast address.
+ * A CRC16 algorithm is used.
+ *
+ * Notes:
+ *
+ *
+ * Context:
+ * runtime, pageable
+ *
+ * Returns:
+ * Hash value of multicast address.
+ */
+SK_U32 SkGmacMcHash(
+unsigned char *pMc) /* Multicast address */
+{
+ SK_U32 Data;
+ SK_U32 TmpData;
+ SK_U32 Crc;
+ int Byte;
+ int Bit;
+
+ Crc = 0xFFFFFFFFUL;
+ for (Byte = 0; Byte < 6; Byte++) {
+ /* Get next byte. */
+ Data = (SK_U32) pMc[Byte];
+
+ /* Change bit order in byte. */
+ TmpData = Data;
+ for (Bit = 0; Bit < 8; Bit++) {
+ if (TmpData & 1L) {
+ Data |= 1L << (7 - Bit);
+ }
+ else {
+ Data &= ~(1L << (7 - Bit));
+ }
+ TmpData >>= 1;
+ }
+
+ Crc ^= (Data << 24);
+ for (Bit = 0; Bit < 8; Bit++) {
+ if (Crc & 0x80000000) {
+ Crc = (Crc << 1) ^ GMAC_POLY;
+ }
+ else {
+ Crc <<= 1;
+ }
+ }
+ }
+
return (Crc & ((1 << HASH_BITS) - 1));
-} /* SkCrc32McHash */
-#endif /* not SK_ADDR_CHEAT */
+} /* SkGmacMcHash */
+
+#endif /* !SK_ADDR_CHEAT */
/******************************************************************************
*
@@ -549,11 +804,57 @@
* Description:
* This routine enables reception for a given address on the given port.
*
+ * It calls either SkAddrXmacMcAdd or SkAddrGmacMcAdd, according to the
+ * adapter in use. The real work is done there.
+ *
* Notes:
* The return code is only valid for SK_PROM_MODE_NONE.
*
- * In the current version, only RLMT may add addresses to the non-active
- * port.
+ * Context:
+ * runtime, pageable
+ * may be called after SK_INIT_DATA
+ *
+ * Returns:
+ * SK_MC_FILTERING_EXACT
+ * SK_MC_FILTERING_INEXACT
+ * SK_MC_ILLEGAL_ADDRESS
+ * SK_MC_ILLEGAL_PORT
+ * SK_MC_RLMT_OVERFLOW
+ */
+int SkAddrMcAdd(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* Port Number */
+SK_MAC_ADDR *pMc, /* multicast address to be added */
+int Flags) /* permanent/non-permanent */
+{
+ int ReturnCode;
+
+ if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
+ return (SK_ADDR_ILLEGAL_PORT);
+ }
+
+ if (pAC->GIni.GIGenesis) {
+ ReturnCode = SkAddrXmacMcAdd(pAC, IoC, PortNumber, pMc, Flags);
+ }
+ else {
+ ReturnCode = SkAddrGmacMcAdd(pAC, IoC, PortNumber, pMc, Flags);
+ }
+
+ return (ReturnCode);
+
+} /* SkAddrMcAdd */
+
+
+/******************************************************************************
+ *
+ * SkAddrXmacMcAdd - add a multicast address to a port
+ *
+ * Description:
+ * This routine enables reception for a given address on the given port.
+ *
+ * Notes:
+ * The return code is only valid for SK_PROM_MODE_NONE.
*
* The multicast bit is only checked if there are no free exact match
* entries.
@@ -566,28 +867,23 @@
* SK_MC_FILTERING_EXACT
* SK_MC_FILTERING_INEXACT
* SK_MC_ILLEGAL_ADDRESS
- * SK_MC_ILLEGAL_PORT
* SK_MC_RLMT_OVERFLOW
*/
-int SkAddrMcAdd(
+int SkAddrXmacMcAdd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Port Number */
SK_MAC_ADDR *pMc, /* multicast address to be added */
-int Flags) /* permanent/non-permanent */
+int Flags) /* permanent/non-permanent */
{
int i;
SK_U8 Inexact;
#ifndef SK_ADDR_CHEAT
- unsigned HashBit;
+ SK_U32 HashBit;
#endif /* !defined(SK_ADDR_CHEAT) */
- if (PortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (Flags & SK_ADDR_PERMANENT) {
-#ifdef DEBUG
+ if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
+#ifdef xDEBUG
if (pAC->Addr.Port[PortNumber].NextExactMatchRlmt <
SK_ADDR_FIRST_MATCH_RLMT) {
Next0[PortNumber] |= 1;
@@ -600,7 +896,7 @@
return (SK_MC_RLMT_OVERFLOW);
}
- /* Set an RLMT multicast address. */
+ /* Set a RLMT multicast address. */
pAC->Addr.Port[PortNumber].Exact[
pAC->Addr.Port[PortNumber].NextExactMatchRlmt++] = *pMc;
@@ -608,15 +904,7 @@
return (SK_MC_FILTERING_EXACT);
}
-#if 0
- /* Not PERMANENT => DRV */
- if (PortNumber != pAC->Addr.ActivePort) {
- /* Only RLMT is allowed to do this. */
- return (SK_MC_ILLEGAL_PORT);
- }
-#endif /* 0 */
-
-#ifdef DEBUG
+#ifdef xDEBUG
if (pAC->Addr.Port[PortNumber].NextExactMatchDrv <
SK_ADDR_FIRST_MATCH_DRV) {
Next0[PortNumber] |= 2;
@@ -630,22 +918,19 @@
pAC->Addr.Port[PortNumber].Exact[
pAC->Addr.Port[PortNumber].NextExactMatchDrv++] = *pMc;
- /* Clear InexactFilter. */
+ /* Clear InexactFilter */
for (i = 0; i < 8; i++) {
pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0;
}
}
else {
if (!(pMc->a[0] & SK_MC_BIT)) {
- /*
- * Hashing only possible with
- * multicast addresses.
- */
+ /* Hashing only possible with multicast addresses */
return (SK_MC_ILLEGAL_ADDRESS);
}
#ifndef SK_ADDR_CHEAT
/* Compute hash value of address. */
- HashBit = 63 - SkCrc32McHash(&pMc->a[0]);
+ HashBit = 63 - SkXmacMcHash(&pMc->a[0]);
/* Add bit to InexactFilter. */
pAC->Addr.Port[PortNumber].InexactFilter.Bytes[HashBit / 8] |=
@@ -668,11 +953,115 @@
else {
return (SK_MC_FILTERING_INEXACT);
}
-} /* SkAddrMcAdd */
+
+} /* SkAddrXmacMcAdd */
/******************************************************************************
*
+ * SkAddrGmacMcAdd - add a multicast address to a port
+ *
+ * Description:
+ * This routine enables reception for a given address on the given port.
+ *
+ * Notes:
+ * The return code is only valid for SK_PROM_MODE_NONE.
+ *
+ * Context:
+ * runtime, pageable
+ * may be called after SK_INIT_DATA
+ *
+ * Returns:
+ * SK_MC_FILTERING_INEXACT
+ * SK_MC_ILLEGAL_ADDRESS
+ */
+int SkAddrGmacMcAdd(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* Port Number */
+SK_MAC_ADDR *pMc, /* multicast address to be added */
+int Flags) /* permanent/non-permanent */
+{
+ int i;
+#ifndef SK_ADDR_CHEAT
+ SK_U32 HashBit;
+#endif /* !defined(SK_ADDR_CHEAT) */
+
+ if (!(pMc->a[0] & SK_MC_BIT)) {
+ /* Hashing only possible with multicast addresses */
+ return (SK_MC_ILLEGAL_ADDRESS);
+ }
+
+#ifndef SK_ADDR_CHEAT
+
+ /* Compute hash value of address. */
+ HashBit = SkGmacMcHash(&pMc->a[0]);
+
+ if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
+
+ /* Add bit to InexactRlmtFilter. */
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[HashBit / 8] |=
+ 1 << (HashBit % 8);
+
+ /* Copy bit to InexactFilter. */
+ for (i = 0; i < 8; i++) {
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[i];
+ }
+#ifdef DEBUG
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("GMAC InexactRlmtFilter: %02X %02X %02X %02X %02X %02X %02X %02X\n",
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[0],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[1],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[2],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[3],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[4],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[5],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[6],
+ pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[7]))
+#endif /* DEBUG */
+ }
+ else { /* not permanent => DRV */
+
+ /* Add bit to InexactDrvFilter. */
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[HashBit / 8] |=
+ 1 << (HashBit % 8);
+
+ /* Copy bit to InexactFilter. */
+ for (i = 0; i < 8; i++) {
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[i];
+ }
+#ifdef DEBUG
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("GMAC InexactDrvFilter: %02X %02X %02X %02X %02X %02X %02X %02X\n",
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[0],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[1],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[2],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[3],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[4],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[5],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[6],
+ pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[7]))
+#endif /* DEBUG */
+ }
+
+#else /* SK_ADDR_CHEAT */
+
+ /* Set all bits in InexactFilter. */
+ for (i = 0; i < 8; i++) {
+ pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0xFF;
+ }
+#endif /* SK_ADDR_CHEAT */
+
+ return (SK_MC_FILTERING_INEXACT);
+
+} /* SkAddrGmacMcAdd */
+
+#endif /* !SK_SLIM */
+
+/******************************************************************************
+ *
* SkAddrMcUpdate - update the HW MC address table and set the MAC address
*
* Description:
@@ -680,6 +1069,9 @@
* table for a given port.
* It also programs the port's current physical MAC address.
*
+ * It calls either SkAddrXmacMcUpdate or SkAddrGmacMcUpdate, according
+ * to the adapter in use. The real work is done there.
+ *
* Notes:
* The return code is only valid for SK_PROM_MODE_NONE.
*
@@ -697,61 +1089,94 @@
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber) /* Port Number */
{
- SK_U32 i;
- SK_U8 Inexact;
- SK_U16 *OutAddr;
- SK_U16 LoMode; /* Lower 16 bits of XMAC Mode Reg. */
- SK_ADDR_PORT *pAPort;
-
- if (PortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
+ int ReturnCode;
+#if (!defined(SK_SLIM) || defined(DEBUG))
+ if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
return (SK_ADDR_ILLEGAL_PORT);
}
+#endif /* !SK_SLIM || DEBUG */
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ ReturnCode = SkAddrXmacMcUpdate(pAC, IoC, PortNumber);
+ }
+#endif /* GENESIS */
+#ifdef YUKON
+ if (!pAC->GIni.GIGenesis) {
+ ReturnCode = SkAddrGmacMcUpdate(pAC, IoC, PortNumber);
+ }
+#endif /* YUKON */
+ return (ReturnCode);
+
+} /* SkAddrMcUpdate */
+
+
+#ifdef GENESIS
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_CTRL,
- ("SkAddrMcUpdate on Port %u.\n", PortNumber))
+/******************************************************************************
+ *
+ * SkAddrXmacMcUpdate - update the HW MC address table and set the MAC address
+ *
+ * Description:
+ * This routine enables reception of the addresses contained in a local
+ * table for a given port.
+ * It also programs the port's current physical MAC address.
+ *
+ * Notes:
+ * The return code is only valid for SK_PROM_MODE_NONE.
+ *
+ * Context:
+ * runtime, pageable
+ * may be called after SK_INIT_IO
+ *
+ * Returns:
+ * SK_MC_FILTERING_EXACT
+ * SK_MC_FILTERING_INEXACT
+ * SK_ADDR_ILLEGAL_PORT
+ */
+int SkAddrXmacMcUpdate(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber) /* Port Number */
+{
+ SK_U32 i;
+ SK_U8 Inexact;
+ SK_U16 *OutAddr;
+ SK_ADDR_PORT *pAPort;
+
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrXmacMcUpdate on Port %u.\n", PortNumber))
pAPort = &pAC->Addr.Port[PortNumber];
#ifdef DEBUG
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_CTRL,
- ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
-#endif /* DEBUG */
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
+#endif /* DEBUG */
/* Start with 0 to also program the logical MAC address. */
for (i = 0; i < pAPort->NextExactMatchRlmt; i++) {
- /* Set exact match address i on HW. */
- OutAddr = (SK_U16 *)&pAPort->Exact[i].a[0];
+ /* Set exact match address i on XMAC */
+ OutAddr = (SK_U16 *) &pAPort->Exact[i].a[0];
XM_OUTADDR(IoC, PortNumber, XM_EXM(i), OutAddr);
}
- /* Clear other permanent exact match addresses on HW. */
+ /* Clear other permanent exact match addresses on XMAC */
if (pAPort->NextExactMatchRlmt <= SK_ADDR_LAST_MATCH_RLMT) {
- SkXmClrExactAddr(
- pAC,
- IoC,
- PortNumber,
- pAPort->NextExactMatchRlmt,
+
+ SkXmClrExactAddr(pAC, IoC, PortNumber, pAPort->NextExactMatchRlmt,
SK_ADDR_LAST_MATCH_RLMT);
}
for (i = pAPort->FirstExactMatchDrv; i < pAPort->NextExactMatchDrv; i++) {
- OutAddr = (SK_U16 *)&pAPort->Exact[i].a[0];
+ OutAddr = (SK_U16 *) &pAPort->Exact[i].a[0];
XM_OUTADDR(IoC, PortNumber, XM_EXM(i), OutAddr);
}
- /* Clear other non-permanent exact match addresses on HW. */
+ /* Clear other non-permanent exact match addresses on XMAC */
if (pAPort->NextExactMatchDrv <= SK_ADDR_LAST_MATCH_DRV) {
- SkXmClrExactAddr(
- pAC,
- IoC,
- PortNumber,
- pAPort->NextExactMatchDrv,
+
+ SkXmClrExactAddr(pAC, IoC, PortNumber, pAPort->NextExactMatchDrv,
SK_ADDR_LAST_MATCH_DRV);
}
@@ -760,36 +1185,33 @@
}
if (pAPort->PromMode & SK_PROM_MODE_ALL_MC) {
+
/* Set all bits in 64-bit hash register. */
XM_OUTHASH(IoC, PortNumber, XM_HSM, &OnesHash);
-
- /* Set bit 15 in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- LoMode |= XM_MD_ENA_HSH;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
}
else if (Inexact != 0) {
+
/* Set 64-bit hash register to InexactFilter. */
XM_OUTHASH(IoC, PortNumber, XM_HSM, &pAPort->InexactFilter.Bytes[0]);
-
- /* Set bit 15 in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- LoMode |= XM_MD_ENA_HSH;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
}
else {
- /* Clear bit 15 in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- LoMode &= ~XM_MD_ENA_HSH;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+ /* Disable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_FALSE);
}
if (pAPort->PromMode != SK_PROM_MODE_NONE) {
- (void)SkAddrPromiscuousChange(pAC, IoC, PortNumber, pAPort->PromMode);
+ (void) SkAddrXmacPromiscuousChange(pAC, IoC, PortNumber, pAPort->PromMode);
}
- /* Set port's current MAC address. */
- OutAddr = (SK_U16 *)&pAPort->CurrentMacAddress.a[0];
+ /* Set port's current physical MAC address. */
+ OutAddr = (SK_U16 *) &pAPort->CurrentMacAddress.a[0];
+
XM_OUTADDR(IoC, PortNumber, XM_SA, OutAddr);
#ifdef xDEBUG
@@ -798,13 +1220,13 @@
SK_U16 *InAddr;
/* Get exact match address i from port PortNumber. */
- InAddr = (SK_U16 *)&InAddr8[0];
+ InAddr = (SK_U16 *) &InAddr8[0];
+
XM_INADDR(IoC, PortNumber, XM_EXM(i), InAddr);
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_CTRL,
- ("MC address %d on Port %u: %02x %02x %02x %02x %02x %02x -- %02x %02x %02x %02x %02x %02x.\n",
+
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrXmacMcUpdate: MC address %d on Port %u: ",
+ "%02x %02x %02x %02x %02x %02x -- %02x %02x %02x %02x %02x %02x\n",
i,
PortNumber,
InAddr8[0],
@@ -820,7 +1242,7 @@
pAPort->Exact[i].a[4],
pAPort->Exact[i].a[5]))
}
-#endif /* DEBUG */
+#endif /* DEBUG */
/* Determine return value. */
if (Inexact == 0 && pAPort->PromMode == 0) {
@@ -829,8 +1251,138 @@
else {
return (SK_MC_FILTERING_INEXACT);
}
-} /* SkAddrMcUpdate */
+
+} /* SkAddrXmacMcUpdate */
+
+#endif /* GENESIS */
+#ifdef YUKON
+
+/******************************************************************************
+ *
+ * SkAddrGmacMcUpdate - update the HW MC address table and set the MAC address
+ *
+ * Description:
+ * This routine enables reception of the addresses contained in a local
+ * table for a given port.
+ * It also programs the port's current physical MAC address.
+ *
+ * Notes:
+ * The return code is only valid for SK_PROM_MODE_NONE.
+ *
+ * Context:
+ * runtime, pageable
+ * may be called after SK_INIT_IO
+ *
+ * Returns:
+ * SK_MC_FILTERING_EXACT
+ * SK_MC_FILTERING_INEXACT
+ * SK_ADDR_ILLEGAL_PORT
+ */
+int SkAddrGmacMcUpdate(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber) /* Port Number */
+{
+#ifndef SK_SLIM
+ SK_U32 i;
+ SK_U8 Inexact;
+#endif /* not SK_SLIM */
+ SK_U16 *OutAddr;
+ SK_ADDR_PORT *pAPort;
+
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrGmacMcUpdate on Port %u.\n", PortNumber))
+
+ pAPort = &pAC->Addr.Port[PortNumber];
+
+#ifdef DEBUG
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
+#endif /* DEBUG */
+
+#ifndef SK_SLIM
+ for (Inexact = 0, i = 0; i < 8; i++) {
+ Inexact |= pAPort->InexactFilter.Bytes[i];
+ }
+
+ /* Set 64-bit hash register to InexactFilter. */
+ GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1,
+ &pAPort->InexactFilter.Bytes[0]);
+
+ if (pAPort->PromMode & SK_PROM_MODE_ALL_MC) {
+
+ /* Set all bits in 64-bit hash register. */
+ GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1, &OnesHash);
+
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
+ }
+ else {
+ /* Enable Hashing. */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
+ }
+
+ if (pAPort->PromMode != SK_PROM_MODE_NONE) {
+ (void) SkAddrGmacPromiscuousChange(pAC, IoC, PortNumber, pAPort->PromMode);
+ }
+#else /* SK_SLIM */
+
+ /* Set all bits in 64-bit hash register. */
+ GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1, &OnesHash);
+
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
+
+ (void) SkAddrGmacPromiscuousChange(pAC, IoC, PortNumber, pAPort->PromMode);
+
+#endif /* SK_SLIM */
+
+ /* Set port's current physical MAC address. */
+ OutAddr = (SK_U16 *) &pAPort->CurrentMacAddress.a[0];
+ GM_OUTADDR(IoC, PortNumber, GM_SRC_ADDR_1L, OutAddr);
+
+ /* Set port's current logical MAC address. */
+ OutAddr = (SK_U16 *) &pAPort->Exact[0].a[0];
+ GM_OUTADDR(IoC, PortNumber, GM_SRC_ADDR_2L, OutAddr);
+
+#ifdef DEBUG
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrGmacMcUpdate: Permanent Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
+ pAPort->Exact[0].a[0],
+ pAPort->Exact[0].a[1],
+ pAPort->Exact[0].a[2],
+ pAPort->Exact[0].a[3],
+ pAPort->Exact[0].a[4],
+ pAPort->Exact[0].a[5]))
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrGmacMcUpdate: Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
+ pAPort->CurrentMacAddress.a[0],
+ pAPort->CurrentMacAddress.a[1],
+ pAPort->CurrentMacAddress.a[2],
+ pAPort->CurrentMacAddress.a[3],
+ pAPort->CurrentMacAddress.a[4],
+ pAPort->CurrentMacAddress.a[5]))
+#endif /* DEBUG */
+
+#ifndef SK_SLIM
+ /* Determine return value. */
+ if (Inexact == 0 && pAPort->PromMode == 0) {
+ return (SK_MC_FILTERING_EXACT);
+ }
+ else {
+ return (SK_MC_FILTERING_INEXACT);
+ }
+#else /* SK_SLIM */
+ return (SK_MC_FILTERING_INEXACT);
+#endif /* SK_SLIM */
+
+} /* SkAddrGmacMcUpdate */
+
+#endif /* YUKON */
+
+#ifndef SK_NO_MAO
/******************************************************************************
*
@@ -850,23 +1402,29 @@
* SK_ADDR_TOO_EARLY if SK_INIT_IO was not executed before.
*/
int SkAddrOverride(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Port Number */
-SK_MAC_ADDR *pNewAddr, /* new MAC address */
-int Flags) /* logical/physical MAC address */
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* Port Number */
+SK_MAC_ADDR SK_FAR *pNewAddr, /* new MAC address */
+int Flags) /* logical/physical MAC address */
{
+#ifndef SK_NO_RLMT
SK_EVPARA Para;
+#endif /* !SK_NO_RLMT */
SK_U32 NetNumber;
SK_U32 i;
- SK_U16 *OutAddr;
+ SK_U16 SK_FAR *OutAddr;
+#ifndef SK_NO_RLMT
NetNumber = pAC->Rlmt.Port[PortNumber].Net->NetNumber;
-
- if (PortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
+#else
+ NetNumber = 0;
+#endif /* SK_NO_RLMT */
+#if (!defined(SK_SLIM) || defined(DEBUG))
+ if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
return (SK_ADDR_ILLEGAL_PORT);
}
-
+#endif /* !SK_SLIM || DEBUG */
if (pNewAddr != NULL && (pNewAddr->a[0] & SK_MC_BIT) != 0) {
return (SK_ADDR_MULTICAST_ADDRESS);
}
@@ -877,41 +1435,41 @@
if (Flags & SK_ADDR_SET_LOGICAL) { /* Activate logical MAC address. */
/* Parameter *pNewAddr is ignored. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
+ for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
return (SK_ADDR_TOO_EARLY);
}
}
-
+#ifndef SK_NO_RLMT
/* Set PortNumber to number of net's active port. */
PortNumber = pAC->Rlmt.Net[NetNumber].
Port[pAC->Addr.Net[NetNumber].ActivePort]->PortNumber;
-
+#endif /* !SK_NO_RLMT */
pAC->Addr.Port[PortNumber].Exact[0] =
pAC->Addr.Net[NetNumber].CurrentMacAddress;
/* Write address to first exact match entry of active port. */
- (void)SkAddrMcUpdate(pAC, IoC, PortNumber);
+ (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
}
else if (Flags & SK_ADDR_CLEAR_LOGICAL) {
/* Deactivate logical MAC address. */
/* Parameter *pNewAddr is ignored. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
+ for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
return (SK_ADDR_TOO_EARLY);
}
}
-
+#ifndef SK_NO_RLMT
/* Set PortNumber to number of net's active port. */
PortNumber = pAC->Rlmt.Net[NetNumber].
Port[pAC->Addr.Net[NetNumber].ActivePort]->PortNumber;
-
+#endif /* !SK_NO_RLMT */
for (i = 0; i < SK_MAC_ADDR_LEN; i++ ) {
pAC->Addr.Port[PortNumber].Exact[0].a[i] = 0;
}
/* Write address to first exact match entry of active port. */
- (void)SkAddrMcUpdate(pAC, IoC, PortNumber);
+ (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
}
else if (Flags & SK_ADDR_PHYSICAL_ADDRESS) { /* Physical MAC address. */
if (SK_ADDR_EQUAL(pNewAddr->a,
@@ -919,7 +1477,7 @@
return (SK_ADDR_DUPLICATE_ADDRESS);
}
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
+ for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
return (SK_ADDR_TOO_EARLY);
}
@@ -939,14 +1497,25 @@
pAC->Addr.Port[PortNumber].CurrentMacAddress;
pAC->Addr.Port[PortNumber].CurrentMacAddress = *pNewAddr;
- /* Change port's address. */
- OutAddr = (SK_U16 *)pNewAddr;
- XM_OUTADDR(IoC, PortNumber, XM_SA, OutAddr);
+ /* Change port's physical MAC address. */
+ OutAddr = (SK_U16 SK_FAR *) pNewAddr;
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ XM_OUTADDR(IoC, PortNumber, XM_SA, OutAddr);
+ }
+#endif /* GENESIS */
+#ifdef YUKON
+ if (!pAC->GIni.GIGenesis) {
+ GM_OUTADDR(IoC, PortNumber, GM_SRC_ADDR_1L, OutAddr);
+ }
+#endif /* YUKON */
+#ifndef SK_NO_RLMT
/* Report address change to RLMT. */
Para.Para32[0] = PortNumber;
Para.Para32[0] = -1;
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_PORT_ADDR, Para);
+#endif /* !SK_NO_RLMT */
}
else { /* Logical MAC address. */
if (SK_ADDR_EQUAL(pNewAddr->a,
@@ -954,7 +1523,7 @@
return (SK_ADDR_SUCCESS);
}
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
+ for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
return (SK_ADDR_TOO_EARLY);
}
@@ -964,47 +1533,66 @@
return (SK_ADDR_DUPLICATE_ADDRESS);
}
}
-
+
+ /*
+ * In case that the physical and the logical MAC addresses are equal
+ * we must also change the physical MAC address here.
+ * In this case we have an adapter which initially was programmed with
+ * two identical MAC addresses.
+ */
+ if (SK_ADDR_EQUAL(pAC->Addr.Port[PortNumber].CurrentMacAddress.a,
+ pAC->Addr.Port[PortNumber].Exact[0].a)) {
+
+ pAC->Addr.Port[PortNumber].PreviousMacAddress =
+ pAC->Addr.Port[PortNumber].CurrentMacAddress;
+ pAC->Addr.Port[PortNumber].CurrentMacAddress = *pNewAddr;
+
+#ifndef SK_NO_RLMT
+ /* Report address change to RLMT. */
+ Para.Para32[0] = PortNumber;
+ Para.Para32[0] = -1;
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_PORT_ADDR, Para);
+#endif /* !SK_NO_RLMT */
+ }
+
+#ifndef SK_NO_RLMT
/* Set PortNumber to number of net's active port. */
PortNumber = pAC->Rlmt.Net[NetNumber].
Port[pAC->Addr.Net[NetNumber].ActivePort]->PortNumber;
-
+#endif /* !SK_NO_RLMT */
pAC->Addr.Net[NetNumber].CurrentMacAddress = *pNewAddr;
pAC->Addr.Port[PortNumber].Exact[0] = *pNewAddr;
-
#ifdef DEBUG
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_CTRL,
- ("Permanent MAC Address: %02X %02X %02X %02X %02X %02X\n",
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrOverride: Permanent MAC Address: %02X %02X %02X %02X %02X %02X\n",
pAC->Addr.Net[NetNumber].PermanentMacAddress.a[0],
pAC->Addr.Net[NetNumber].PermanentMacAddress.a[1],
pAC->Addr.Net[NetNumber].PermanentMacAddress.a[2],
pAC->Addr.Net[NetNumber].PermanentMacAddress.a[3],
pAC->Addr.Net[NetNumber].PermanentMacAddress.a[4],
pAC->Addr.Net[NetNumber].PermanentMacAddress.a[5]))
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_ADDR,
- SK_DBGCAT_CTRL,
- ("New logical MAC Address: %02X %02X %02X %02X %02X %02X\n",
+
+ SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
+ ("SkAddrOverride: New logical MAC Address: %02X %02X %02X %02X %02X %02X\n",
pAC->Addr.Net[NetNumber].CurrentMacAddress.a[0],
pAC->Addr.Net[NetNumber].CurrentMacAddress.a[1],
pAC->Addr.Net[NetNumber].CurrentMacAddress.a[2],
pAC->Addr.Net[NetNumber].CurrentMacAddress.a[3],
pAC->Addr.Net[NetNumber].CurrentMacAddress.a[4],
pAC->Addr.Net[NetNumber].CurrentMacAddress.a[5]))
-#endif /* DEBUG */
+#endif /* DEBUG */
- /* Write address to first exact match entry of active port. */
- (void)SkAddrMcUpdate(pAC, IoC, PortNumber);
+ /* Write address to first exact match entry of active port. */
+ (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
}
return (SK_ADDR_SUCCESS);
+
} /* SkAddrOverride */
+#endif /* SK_NO_MAO */
+
/******************************************************************************
*
* SkAddrPromiscuousChange - set promiscuous mode for given port
@@ -1015,6 +1603,10 @@
* - all LLC frames
* - all MC frames
*
+ * It calls either SkAddrXmacPromiscuousChange or
+ * SkAddrGmacPromiscuousChange, according to the adapter in use.
+ * The real work is done there.
+ *
* Context:
* runtime, pageable
* may be called after SK_INIT_IO
@@ -1029,6 +1621,56 @@
SK_U32 PortNumber, /* port whose promiscuous mode changes */
int NewPromMode) /* new promiscuous mode */
{
+ int ReturnCode;
+#if (!defined(SK_SLIM) || defined(DEBUG))
+ if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
+ return (SK_ADDR_ILLEGAL_PORT);
+ }
+#endif /* !SK_SLIM || DEBUG */
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ ReturnCode =
+ SkAddrXmacPromiscuousChange(pAC, IoC, PortNumber, NewPromMode);
+ }
+#endif /* GENESIS */
+#ifdef YUKON
+ if (!pAC->GIni.GIGenesis) {
+ ReturnCode =
+ SkAddrGmacPromiscuousChange(pAC, IoC, PortNumber, NewPromMode);
+ }
+#endif /* YUKON */
+
+ return (ReturnCode);
+
+} /* SkAddrPromiscuousChange */
+
+#ifdef GENESIS
+
+/******************************************************************************
+ *
+ * SkAddrXmacPromiscuousChange - set promiscuous mode for given port
+ *
+ * Description:
+ * This routine manages promiscuous mode:
+ * - none
+ * - all LLC frames
+ * - all MC frames
+ *
+ * Context:
+ * runtime, pageable
+ * may be called after SK_INIT_IO
+ *
+ * Returns:
+ * SK_ADDR_SUCCESS
+ * SK_ADDR_ILLEGAL_PORT
+ */
+int SkAddrXmacPromiscuousChange(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* port whose promiscuous mode changes */
+int NewPromMode) /* new promiscuous mode */
+{
int i;
SK_BOOL InexactModeBit;
SK_U8 Inexact;
@@ -1037,14 +1679,11 @@
SK_U16 LoMode; /* Lower 16 bits of XMAC Mode Register. */
int CurPromMode = SK_PROM_MODE_NONE;
- if (PortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
/* Read CurPromMode from Hardware. */
XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- if (LoMode & XM_MD_ENA_PROM) {
+ if ((LoMode & XM_MD_ENA_PROM) != 0) {
+ /* Promiscuous mode! */
CurPromMode |= SK_PROM_MODE_LLC;
}
@@ -1055,12 +1694,12 @@
CurPromMode |= (pAC->Addr.Port[PortNumber].PromMode & SK_PROM_MODE_ALL_MC);
}
else {
- /* Read InexactModeBit (bit 15 in mode register). */
+ /* Get InexactModeBit (bit XM_MD_ENA_HASH in mode register) */
XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- InexactModeBit = (LoMode & XM_MD_ENA_HSH) != 0;
+ InexactModeBit = (LoMode & XM_MD_ENA_HASH) != 0;
- /* Read 64-bit hash register from HW. */
+ /* Read 64-bit hash register from XMAC */
XM_INHASH(IoC, PortNumber, XM_HSM, &HwInexactFilter.Bytes[0]);
for (HwInexact = 0xFF, i = 0; i < 8; i++) {
@@ -1080,13 +1719,12 @@
if ((NewPromMode & SK_PROM_MODE_ALL_MC) &&
!(CurPromMode & SK_PROM_MODE_ALL_MC)) { /* All MC. */
+
/* Set all bits in 64-bit hash register. */
XM_OUTHASH(IoC, PortNumber, XM_HSM, &OnesHash);
- /* Set bit 15 in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- LoMode |= XM_MD_ENA_HSH;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
}
else if ((CurPromMode & SK_PROM_MODE_ALL_MC) &&
!(NewPromMode & SK_PROM_MODE_ALL_MC)) { /* Norm MC. */
@@ -1094,56 +1732,125 @@
Inexact |= pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i];
}
if (Inexact == 0) {
- /* Clear bit 15 in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- LoMode &= ~XM_MD_ENA_HSH;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+ /* Disable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_FALSE);
}
else {
/* Set 64-bit hash register to InexactFilter. */
- XM_OUTHASH(
- IoC,
- PortNumber,
- XM_HSM,
+ XM_OUTHASH(IoC, PortNumber, XM_HSM,
&pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0]);
- /* Set bit 15 in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
- LoMode |= XM_MD_ENA_HSH;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
}
}
if ((NewPromMode & SK_PROM_MODE_LLC) &&
!(CurPromMode & SK_PROM_MODE_LLC)) { /* Prom. LLC */
- /* Set promiscuous bit in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
-
-#if 0
- /* Receive MAC frames. */
- LoMode |= XM_MD_RX_MCTRL;
-#endif /* 0 */
-
- LoMode |= XM_MD_ENA_PROM;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+ /* Set the MAC in Promiscuous Mode */
+ SkMacPromiscMode(pAC, IoC, (int) PortNumber, SK_TRUE);
}
else if ((CurPromMode & SK_PROM_MODE_LLC) &&
!(NewPromMode & SK_PROM_MODE_LLC)) { /* Norm. LLC. */
- /* Clear promiscuous bit in mode register. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
+ /* Clear Promiscuous Mode */
+ SkMacPromiscMode(pAC, IoC, (int) PortNumber, SK_FALSE);
+ }
+
+ return (SK_ADDR_SUCCESS);
+
+} /* SkAddrXmacPromiscuousChange */
+
+#endif /* GENESIS */
+
+#ifdef YUKON
+
+/******************************************************************************
+ *
+ * SkAddrGmacPromiscuousChange - set promiscuous mode for given port
+ *
+ * Description:
+ * This routine manages promiscuous mode:
+ * - none
+ * - all LLC frames
+ * - all MC frames
+ *
+ * Context:
+ * runtime, pageable
+ * may be called after SK_INIT_IO
+ *
+ * Returns:
+ * SK_ADDR_SUCCESS
+ * SK_ADDR_ILLEGAL_PORT
+ */
+int SkAddrGmacPromiscuousChange(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* I/O context */
+SK_U32 PortNumber, /* port whose promiscuous mode changes */
+int NewPromMode) /* new promiscuous mode */
+{
+ SK_U16 ReceiveControl; /* GMAC Receive Control Register */
+ int CurPromMode = SK_PROM_MODE_NONE;
+
+ /* Read CurPromMode from Hardware. */
+ GM_IN16(IoC, PortNumber, GM_RX_CTRL, &ReceiveControl);
+
+ if ((ReceiveControl & (GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA)) == 0) {
+ /* Promiscuous mode! */
+ CurPromMode |= SK_PROM_MODE_LLC;
+ }
-#if 0
- /* Don't receive MAC frames. */
- LoMode &= ~XM_MD_RX_MCTRL;
-#endif /* 0 */
+ if ((ReceiveControl & GM_RXCR_MCF_ENA) == 0) {
+ /* All Multicast mode! */
+ CurPromMode |= (pAC->Addr.Port[PortNumber].PromMode & SK_PROM_MODE_ALL_MC);
+ }
+
+ pAC->Addr.Port[PortNumber].PromMode = NewPromMode;
+
+ if (NewPromMode == CurPromMode) {
+ return (SK_ADDR_SUCCESS);
+ }
+
+ if ((NewPromMode & SK_PROM_MODE_ALL_MC) &&
+ !(CurPromMode & SK_PROM_MODE_ALL_MC)) { /* All MC */
- LoMode &= ~XM_MD_ENA_PROM;
- XM_OUT16(IoC, PortNumber, XM_MODE, LoMode);
+ /* Set all bits in 64-bit hash register. */
+ GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1, &OnesHash);
+
+ /* Enable Hashing */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
}
+ if ((CurPromMode & SK_PROM_MODE_ALL_MC) &&
+ !(NewPromMode & SK_PROM_MODE_ALL_MC)) { /* Norm. MC */
+
+ /* Set 64-bit hash register to InexactFilter. */
+ GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1,
+ &pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0]);
+
+ /* Enable Hashing. */
+ SkMacHashing(pAC, IoC, (int) PortNumber, SK_TRUE);
+ }
+
+ if ((NewPromMode & SK_PROM_MODE_LLC) &&
+ !(CurPromMode & SK_PROM_MODE_LLC)) { /* Prom. LLC */
+
+ /* Set the MAC to Promiscuous Mode. */
+ SkMacPromiscMode(pAC, IoC, (int) PortNumber, SK_TRUE);
+ }
+ else if ((CurPromMode & SK_PROM_MODE_LLC) &&
+ !(NewPromMode & SK_PROM_MODE_LLC)) { /* Norm. LLC */
+
+ /* Clear Promiscuous Mode. */
+ SkMacPromiscMode(pAC, IoC, (int) PortNumber, SK_FALSE);
+ }
+
return (SK_ADDR_SUCCESS);
-} /* SkAddrPromiscuousChange */
+
+} /* SkAddrGmacPromiscuousChange */
+
+#endif /* YUKON */
+#ifndef SK_SLIM
/******************************************************************************
*
@@ -1163,7 +1870,7 @@
int SkAddrSwap(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
-SK_U32 FromPortNumber, /* Port1 Index */
+SK_U32 FromPortNumber, /* Port1 Index */
SK_U32 ToPortNumber) /* Port2 Index */
{
int i;
@@ -1171,11 +1878,11 @@
SK_MAC_ADDR MacAddr;
SK_U32 DWord;
- if (FromPortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
+ if (FromPortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
return (SK_ADDR_ILLEGAL_PORT);
}
- if (ToPortNumber >= (SK_U32)pAC->GIni.GIMacsFound) {
+ if (ToPortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
return (SK_ADDR_ILLEGAL_PORT);
}
@@ -1184,13 +1891,15 @@
}
/*
- * Swap
- * - Exact Match Entries
- * - FirstExactMatchRlmt;
- * - NextExactMatchRlmt;
- * - FirstExactMatchDrv;
- * - NextExactMatchDrv;
- * - 64-bit filter
+ * Swap:
+ * - Exact Match Entries (GEnesis and Yukon)
+ * Yukon uses first entry for the logical MAC
+ * address (stored in the second GMAC register).
+ * - FirstExactMatchRlmt (GEnesis only)
+ * - NextExactMatchRlmt (GEnesis only)
+ * - FirstExactMatchDrv (GEnesis only)
+ * - NextExactMatchDrv (GEnesis only)
+ * - 64-bit filter (InexactFilter)
* - Promiscuous Mode
* of ports.
*/
@@ -1208,47 +1917,52 @@
pAC->Addr.Port[ToPortNumber].InexactFilter.Bytes[i];
pAC->Addr.Port[ToPortNumber].InexactFilter.Bytes[i] = Byte;
}
-
+
i = pAC->Addr.Port[FromPortNumber].PromMode;
pAC->Addr.Port[FromPortNumber].PromMode = pAC->Addr.Port[ToPortNumber].PromMode;
pAC->Addr.Port[ToPortNumber].PromMode = i;
-
- DWord = pAC->Addr.Port[FromPortNumber].FirstExactMatchRlmt;
- pAC->Addr.Port[FromPortNumber].FirstExactMatchRlmt =
- pAC->Addr.Port[ToPortNumber].FirstExactMatchRlmt;
- pAC->Addr.Port[ToPortNumber].FirstExactMatchRlmt = DWord;
-
- DWord = pAC->Addr.Port[FromPortNumber].NextExactMatchRlmt;
- pAC->Addr.Port[FromPortNumber].NextExactMatchRlmt =
- pAC->Addr.Port[ToPortNumber].NextExactMatchRlmt;
- pAC->Addr.Port[ToPortNumber].NextExactMatchRlmt = DWord;
-
- DWord = pAC->Addr.Port[FromPortNumber].FirstExactMatchDrv;
- pAC->Addr.Port[FromPortNumber].FirstExactMatchDrv =
- pAC->Addr.Port[ToPortNumber].FirstExactMatchDrv;
- pAC->Addr.Port[ToPortNumber].FirstExactMatchDrv = DWord;
-
- DWord = pAC->Addr.Port[FromPortNumber].NextExactMatchDrv;
- pAC->Addr.Port[FromPortNumber].NextExactMatchDrv =
- pAC->Addr.Port[ToPortNumber].NextExactMatchDrv;
- pAC->Addr.Port[ToPortNumber].NextExactMatchDrv = DWord;
-
+
+ if (pAC->GIni.GIGenesis) {
+ DWord = pAC->Addr.Port[FromPortNumber].FirstExactMatchRlmt;
+ pAC->Addr.Port[FromPortNumber].FirstExactMatchRlmt =
+ pAC->Addr.Port[ToPortNumber].FirstExactMatchRlmt;
+ pAC->Addr.Port[ToPortNumber].FirstExactMatchRlmt = DWord;
+
+ DWord = pAC->Addr.Port[FromPortNumber].NextExactMatchRlmt;
+ pAC->Addr.Port[FromPortNumber].NextExactMatchRlmt =
+ pAC->Addr.Port[ToPortNumber].NextExactMatchRlmt;
+ pAC->Addr.Port[ToPortNumber].NextExactMatchRlmt = DWord;
+
+ DWord = pAC->Addr.Port[FromPortNumber].FirstExactMatchDrv;
+ pAC->Addr.Port[FromPortNumber].FirstExactMatchDrv =
+ pAC->Addr.Port[ToPortNumber].FirstExactMatchDrv;
+ pAC->Addr.Port[ToPortNumber].FirstExactMatchDrv = DWord;
+
+ DWord = pAC->Addr.Port[FromPortNumber].NextExactMatchDrv;
+ pAC->Addr.Port[FromPortNumber].NextExactMatchDrv =
+ pAC->Addr.Port[ToPortNumber].NextExactMatchDrv;
+ pAC->Addr.Port[ToPortNumber].NextExactMatchDrv = DWord;
+ }
+
/* CAUTION: Solution works if only ports of one adapter are in use. */
- for (i = 0; (SK_U32)i < pAC->Rlmt.Net[pAC->Rlmt.Port[ToPortNumber].
+ for (i = 0; (SK_U32) i < pAC->Rlmt.Net[pAC->Rlmt.Port[ToPortNumber].
Net->NetNumber].NumPorts; i++) {
if (pAC->Rlmt.Net[pAC->Rlmt.Port[ToPortNumber].Net->NetNumber].
Port[i]->PortNumber == ToPortNumber) {
pAC->Addr.Net[pAC->Rlmt.Port[ToPortNumber].Net->NetNumber].
ActivePort = i;
/* 20001207 RA: Was "ToPortNumber;". */
-
}
}
- (void)SkAddrMcUpdate(pAC, IoC, FromPortNumber);
- (void)SkAddrMcUpdate(pAC, IoC, ToPortNumber);
+
+ (void) SkAddrMcUpdate(pAC, IoC, FromPortNumber);
+ (void) SkAddrMcUpdate(pAC, IoC, ToPortNumber);
return (SK_ADDR_SUCCESS);
+
} /* SkAddrSwap */
+
+#endif /* !SK_SLIM */
#ifdef __cplusplus
}
diff -Nru a/drivers/net/sk98lin/skcsum.c b/drivers/net/sk98lin/skcsum.c
--- a/drivers/net/sk98lin/skcsum.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/sk98lin/skcsum.c Sun Aug 3 13:14:44 2003
@@ -2,15 +2,15 @@
*
* Name: skcsum.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.8 $
- * Date: $Date: 2001/02/06 11:15:36 $
+ * Version: $Revision: 1.11 $
+ * Date: $Date: 2003/03/11 14:05:55 $
* Purpose: Store/verify Internet checksum in send/receive packets.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +26,19 @@
* History:
*
* $Log: skcsum.c,v $
+ * Revision 1.11 2003/03/11 14:05:55 rschmidt
+ * Replaced memset() by macro SK_MEMSET()
+ * Editorial changes
+ *
+ * Revision 1.10 2002/04/11 10:02:04 rwahl
+ * Fix in SkCsGetSendInfo():
+ * - function did not return ProtocolFlags in every case.
+ * - pseudo header csum calculated wrong for big endian.
+ *
+ * Revision 1.9 2001/06/13 07:42:08 gklug
+ * fix: NetNumber was wrong in CLEAR_STAT event
+ * add: check for good NetNumber in Clear STAT
+ *
* Revision 1.8 2001/02/06 11:15:36 rassmann
* Supporting two nets on dual-port adapters.
*
@@ -64,9 +77,8 @@
#ifdef SK_USE_CSUM /* Check if CSUM is to be used. */
#ifndef lint
-static const char SysKonnectFileId[] = "@(#)"
- "$Id: skcsum.c,v 1.8 2001/02/06 11:15:36 rassmann Exp $"
- " (C) SysKonnect.";
+static const char SysKonnectFileId[] =
+ "@(#) $Id: skcsum.c,v 1.11 2003/03/11 14:05:55 rschmidt Exp $ (C) SysKonnect.";
#endif /* !lint */
/******************************************************************************
@@ -98,8 +110,8 @@
*
* "h/skdrv1st.h"
* "h/skcsum.h"
- * "h/sktypes.h"
- * "h/skqueue.h"
+ * "h/sktypes.h"
+ * "h/skqueue.h"
* "h/skdrv2nd.h"
*
******************************************************************************/
@@ -164,7 +176,7 @@
* little/big endian conversion on little endian machines only.
*/
#ifdef SK_LITTLE_ENDIAN
-#define SKCS_HTON16(Val16) (((unsigned) (Val16) >> 8) | (((Val16) & 0xFF) << 8))
+#define SKCS_HTON16(Val16) (((unsigned) (Val16) >> 8) | (((Val16) & 0xff) << 8))
#endif /* SK_LITTLE_ENDIAN */
#ifdef SK_BIG_ENDIAN
#define SKCS_HTON16(Val16) (Val16)
@@ -195,7 +207,7 @@
* zero.)
*
* Note:
- * There is a bug in the ASIC which may lead to wrong checksums.
+ * There is a bug in the GENESIS ASIC which may lead to wrong checksums.
*
* Arguments:
* pAc - A pointer to the adapter context struct.
@@ -411,9 +423,9 @@
SKCS_OFS_IP_DESTINATION_ADDRESS + 0) +
(unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
SKCS_OFS_IP_DESTINATION_ADDRESS + 2) +
- (unsigned long) (NextLevelProtocol << 8) +
+ (unsigned long) SKCS_HTON16(NextLevelProtocol) +
(unsigned long) SKCS_HTON16(IpDataLength);
-
+
/* Add-in any carries. */
SKCS_OC_ADD(PseudoHeaderChecksum, PseudoHeaderChecksum, 0);
@@ -422,6 +434,7 @@
SKCS_OC_ADD(pPacketInfo->PseudoHeaderChecksum, PseudoHeaderChecksum, 0);
+ pPacketInfo->ProtocolFlags = ProtocolFlags;
NextLevelProtoStats->TxOkCts++; /* Success. */
} /* SkCsGetSendInfo */
@@ -593,7 +606,7 @@
NextLevelProtocol = *(SK_U8 *)
SKCS_IDX(pIpHeader, SKCS_OFS_IP_NEXT_LEVEL_PROTOCOL);
- if (IpHeaderChecksum != 0xFFFF) {
+ if (IpHeaderChecksum != 0xffff) {
pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].RxErrCts++;
/* the NDIS tester wants to know the upper level protocol too */
if (NextLevelProtocol == SKCS_PROTO_ID_TCP) {
@@ -711,7 +724,7 @@
/* Check if the TCP/UDP checksum is ok. */
- if ((unsigned) NextLevelProtocolChecksum == 0xFFFF) {
+ if ((unsigned) NextLevelProtocolChecksum == 0xffff) {
/* TCP/UDP checksum ok. */
@@ -889,14 +902,16 @@
*/
case SK_CSUM_EVENT_CLEAR_PROTO_STATS:
- ProtoIndex = (int)Param.Para32[0];
- NetNumber = (int)Param.Para32[1];
+ ProtoIndex = (int)Param.Para32[1];
+ NetNumber = (int)Param.Para32[0];
if (ProtoIndex < 0) { /* Clear for all protocols. */
- memset(&pAc->Csum.ProtoStats[NetNumber][0], 0,
- sizeof(pAc->Csum.ProtoStats[NetNumber]));
+ if (NetNumber >= 0) {
+ SK_MEMSET(&pAc->Csum.ProtoStats[NetNumber][0], 0,
+ sizeof(pAc->Csum.ProtoStats[NetNumber]));
+ }
}
else { /* Clear for individual protocol. */
- memset(&pAc->Csum.ProtoStats[NetNumber][ProtoIndex], 0,
+ SK_MEMSET(&pAc->Csum.ProtoStats[NetNumber][ProtoIndex], 0,
sizeof(pAc->Csum.ProtoStats[NetNumber][ProtoIndex]));
}
break;
diff -Nru a/drivers/net/sk98lin/skdim.c b/drivers/net/sk98lin/skdim.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/drivers/net/sk98lin/skdim.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,759 @@
+/******************************************************************************
+ *
+ * Name: skdim.c
+ * Project: GEnesis, PCI Gigabit Ethernet Adapter
+ * Version: $Revision: 1.4 $
+ * Date: $Date: 2003/07/07 09:45:47 $
+ * Purpose: All functions to maintain interrupt moderation
+ *
+ ******************************************************************************/
+
+/******************************************************************************
+ *
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * The information in this file is provided "AS IS" without warranty.
+ *
+ ******************************************************************************/
+
+/******************************************************************************
+ *
+ * History:
+ *
+ * $Log: skdim.c,v $
+ * Revision 1.4 2003/07/07 09:45:47 rroesler
+ * Fix: Compiler warnings corrected
+ *
+ * Revision 1.3 2003/06/10 09:16:40 rroesler
+ * Adapt GetCurrentSystemLoad() to NOT access the kernels
+ * kstat-structure in kernel 2.5/2.6. This must be done
+ * due to a not exported symbol. Instead of evaluating the
+ * SystemLoad directly, the nbr of interrupts is used as
+ * a rough basis for the load.
+ *
+ *
+ *
+ ******************************************************************************/
+
+/******************************************************************************
+ *
+ * Description:
+ *
+ * This module is intended to manage the dynamic interrupt moderation on both
+ * GEnesis and Yukon adapters.
+ *
+ * Include File Hierarchy:
+ *
+ * "skdrv1st.h"
+ * "skdrv2nd.h"
+ *
+ ******************************************************************************/
+
+#ifndef lint
+static const char SysKonnectFileId[] =
+ "@(#) $Id: skdim.c,v 1.4 2003/07/07 09:45:47 rroesler Exp $ (C) SysKonnect.";
+#endif
+
+#define __SKADDR_C
+
+#ifdef __cplusplus
+#error C++ is not yet supported.
+extern "C" {
+#endif
+
+/*******************************************************************************
+**
+** Includes
+**
+*******************************************************************************/
+
+#ifndef __INC_SKDRV1ST_H
+#include "h/skdrv1st.h"
+#endif
+
+#ifndef __INC_SKDRV2ND_H
+#include "h/skdrv2nd.h"
+#endif
+
+#include <linux/kernel_stat.h>
+
+/*******************************************************************************
+**
+** Defines
+**
+*******************************************************************************/
+
+/*******************************************************************************
+**
+** Typedefs
+**
+*******************************************************************************/
+
+/*******************************************************************************
+**
+** Local function prototypes
+**
+*******************************************************************************/
+
+static unsigned int GetCurrentSystemLoad(SK_AC *pAC);
+static SK_U64 GetIsrCalls(SK_AC *pAC);
+static SK_BOOL IsIntModEnabled(SK_AC *pAC);
+static void SetCurrIntCtr(SK_AC *pAC);
+static void EnableIntMod(SK_AC *pAC);
+static void DisableIntMod(SK_AC *pAC);
+static void ResizeDimTimerDuration(SK_AC *pAC);
+static void DisplaySelectedModerationType(SK_AC *pAC);
+static void DisplaySelectedModerationMask(SK_AC *pAC);
+static void DisplayDescrRatio(SK_AC *pAC);
+
+/*******************************************************************************
+**
+** Global variables
+**
+*******************************************************************************/
+
+/*******************************************************************************
+**
+** Local variables
+**
+*******************************************************************************/
+
+/*******************************************************************************
+**
+** Global functions
+**
+*******************************************************************************/
+
+/*******************************************************************************
+** Function : SkDimModerate
+** Description : Called in every ISR to check if moderation is to be applied
+** or not for the current number of interrupts
+** Programmer : Ralph Roesler
+** Last Modified: 22-mar-03
+** Returns : void (!)
+** Notes : -
+*******************************************************************************/
+
+void
+SkDimModerate(SK_AC *pAC) {
+ unsigned int CurrSysLoad = 0; /* expressed in percent */
+ unsigned int LoadIncrease = 0; /* expressed in percent */
+ SK_U64 ThresholdInts = 0;
+ SK_U64 IsrCallsPerSec = 0;
+
+#define M_DIMINFO pAC->DynIrqModInfo
+
+ if (!IsIntModEnabled(pAC)) {
+ if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
+ CurrSysLoad = GetCurrentSystemLoad(pAC);
+ if (CurrSysLoad > 75) {
+ /*
+ ** More than 75% total system load! Enable the moderation
+ ** to shield the system against too many interrupts.
+ */
+ EnableIntMod(pAC);
+ } else if (CurrSysLoad > M_DIMINFO.PrevSysLoad) {
+ LoadIncrease = (CurrSysLoad - M_DIMINFO.PrevSysLoad);
+ if (LoadIncrease > ((M_DIMINFO.PrevSysLoad *
+ C_INT_MOD_ENABLE_PERCENTAGE) / 100)) {
+ if (CurrSysLoad > 10) {
+ /*
+ ** More than 50% increase with respect to the
+ ** previous load of the system. Most likely this
+ ** is due to our ISR-proc...
+ */
+ EnableIntMod(pAC);
+ }
+ }
+ } else {
+ /*
+ ** Neither too much system load at all nor too much increase
+ ** with respect to the previous system load. Hence, we can leave
+ ** the ISR-handling like it is without enabling moderation.
+ */
+ }
+ M_DIMINFO.PrevSysLoad = CurrSysLoad;
+ }
+ } else {
+ if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
+ ThresholdInts = ((M_DIMINFO.MaxModIntsPerSec *
+ C_INT_MOD_DISABLE_PERCENTAGE) / 100);
+ IsrCallsPerSec = GetIsrCalls(pAC);
+ if (IsrCallsPerSec <= ThresholdInts) {
+ /*
+ ** The number of interrupts within the last second is
+ ** lower than the disable_percentage of the desried
+ ** maxrate. Therefore we can disable the moderation.
+ */
+ DisableIntMod(pAC);
+ M_DIMINFO.MaxModIntsPerSec =
+ (M_DIMINFO.MaxModIntsPerSecUpperLimit +
+ M_DIMINFO.MaxModIntsPerSecLowerLimit) / 2;
+ } else {
+ /*
+ ** The number of interrupts per sec is the same as expected.
+ ** Evalulate the descriptor-ratio. If it has changed, a resize
+ ** in the moderation timer might be usefull
+ */
+ if (M_DIMINFO.AutoSizing) {
+ ResizeDimTimerDuration(pAC);
+ }
+ }
+ }
+ }
+
+ /*
+ ** Some information to the log...
+ */
+ if (M_DIMINFO.DisplayStats) {
+ DisplaySelectedModerationType(pAC);
+ DisplaySelectedModerationMask(pAC);
+ DisplayDescrRatio(pAC);
+ }
+
+ M_DIMINFO.NbrProcessedDescr = 0;
+ SetCurrIntCtr(pAC);
+}
+
+/*******************************************************************************
+** Function : SkDimStartModerationTimer
+** Description : Starts the audit-timer for the dynamic interrupt moderation
+** Programmer : Ralph Roesler
+** Last Modified: 22-mar-03
+** Returns : void (!)
+** Notes : -
+*******************************************************************************/
+
+void
+SkDimStartModerationTimer(SK_AC *pAC) {
+ SK_EVPARA EventParam; /* Event struct for timer event */
+
+ SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
+ EventParam.Para32[0] = SK_DRV_MODERATION_TIMER;
+ SkTimerStart(pAC, pAC->IoBase, &pAC->DynIrqModInfo.ModTimer,
+ SK_DRV_MODERATION_TIMER_LENGTH,
+ SKGE_DRV, SK_DRV_TIMER, EventParam);
+}
+
+/*******************************************************************************
+** Function : SkDimEnableModerationIfNeeded
+** Description : Either enables or disables moderation
+** Programmer : Ralph Roesler
+** Last Modified: 22-mar-03
+** Returns : void (!)
+** Notes : This function is called when a particular adapter is opened
+** There is no Disable function, because when all interrupts
+** might be disable, the moderation timer has no meaning at all
+******************************************************************************/
+
+void
+SkDimEnableModerationIfNeeded(SK_AC *pAC) {
+
+ if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_STATIC) {
+ EnableIntMod(pAC); /* notification print in this function */
+ } else if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
+ SkDimStartModerationTimer(pAC);
+ if (M_DIMINFO.DisplayStats) {
+ printk("Dynamic moderation has been enabled\n");
+ }
+ } else {
+ if (M_DIMINFO.DisplayStats) {
+ printk("No moderation has been enabled\n");
+ }
+ }
+}
+
+/*******************************************************************************
+** Function : SkDimDisplayModerationSettings
+** Description : Displays the current settings regaring interrupt moderation
+** Programmer : Ralph Roesler
+** Last Modified: 22-mar-03
+** Returns : void (!)
+** Notes : -
+*******************************************************************************/
+
+void
+SkDimDisplayModerationSettings(SK_AC *pAC) {
+ DisplaySelectedModerationType(pAC);
+ DisplaySelectedModerationMask(pAC);
+}
+
+/*******************************************************************************
+**
+** Local functions
+**
+*******************************************************************************/
+
+/*******************************************************************************
+** Function : GetCurrentSystemLoad
+** Description : Retrieves the current system load of the system. This load
+** is evaluated for all processors within the system.
+** Programmer : Ralph Roesler
+** Last Modified: 22-mar-03
+** Returns : unsigned int: load expressed in percentage
+** Notes : The possible range being returned is from 0 up to 100.
+** Whereas 0 means 'no load at all' and 100 'system fully loaded'
+** It is impossible to determine what actually causes the system
+** to be in 100%, but maybe that is due to too much interrupts.
+*******************************************************************************/
+
+static unsigned int
+GetCurrentSystemLoad(SK_AC *pAC) {
+ unsigned long jif = jiffies;
+ unsigned int UserTime = 0;
+ unsigned int SystemTime = 0;
+ unsigned int NiceTime = 0;
+ unsigned int IdleTime = 0;
+ unsigned int TotalTime = 0;
+ unsigned int UsedTime = 0;
+ unsigned int SystemLoad = 0;
+ /* unsigned int NbrCpu = 0; */
+
+ /*
+ ** The following lines have been commented out, because
+ ** from kernel 2.5.44 onwards, the kernel-owned structure
+ **
+ ** struct kernel_stat kstat
+ **
+ ** is not marked as an exported symbol in the file
+ **
+ ** kernel/ksyms.c
+ **
+ ** As a consequence, using this driver as KLM is not possible
+ ** and any access of the structure kernel_stat via the
+ ** dedicated macros kstat_cpu(i).cpustat.xxx is to be avoided.
+ **
+ ** The kstat-information might be added again in future
+ ** versions of the 2.5.xx kernel, but for the time being,
+ ** number of interrupts will serve as indication how much
+ ** load we currently have...
+ **
+ ** for (NbrCpu = 0; NbrCpu < num_online_cpus(); NbrCpu++) {
+ ** UserTime = UserTime + kstat_cpu(NbrCpu).cpustat.user;
+ ** NiceTime = NiceTime + kstat_cpu(NbrCpu).cpustat.nice;
+ ** SystemTime = SystemTime + kstat_cpu(NbrCpu).cpustat.system;
+ ** }
+ */
+ SK_U64 ThresholdInts = 0;
+ SK_U64 IsrCallsPerSec = 0;
+
+ ThresholdInts = ((M_DIMINFO.MaxModIntsPerSec *
+ C_INT_MOD_ENABLE_PERCENTAGE) + 100);
+ IsrCallsPerSec = GetIsrCalls(pAC);
+ if (IsrCallsPerSec >= ThresholdInts) {
+ /*
+ ** We do not know how much the real CPU-load is!
+ ** Return 80% as a default in order to activate DIM
+ */
+ SystemLoad = 80;
+ return (SystemLoad);
+ }
+
+ UsedTime = UserTime + NiceTime + SystemTime;
+
+ IdleTime = jif * num_online_cpus() - UsedTime;
+ TotalTime = UsedTime + IdleTime;
+
+ SystemLoad = ( 100 * (UsedTime - M_DIMINFO.PrevUsedTime) ) /
+ (TotalTime - M_DIMINFO.PrevTotalTime);
+
+ if (M_DIMINFO.DisplayStats) {
+ printk("Current system load is: %u\n", SystemLoad);
+ }
+
+ M_DIMINFO.PrevTotalTime = TotalTime;
+ M_DIMINFO.PrevUsedTime = UsedTime;
+
+ return (SystemLoad);
+}
+
+/*******************************************************************************
+** Function : GetIsrCalls
+** Description : Depending on the selected moderation mask, this function will
+** return the number of interrupts handled in the previous time-
+** frame. This evaluated number is based on the current number
+** of interrupts stored in PNMI-context and the previous stored
+** interrupts.
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : int: the number of interrupts being executed in the last
+** timeframe
+** Notes : It makes only sense to call this function, when dynamic
+** interrupt moderation is applied
+*******************************************************************************/
+
+static SK_U64
+GetIsrCalls(SK_AC *pAC) {
+ SK_U64 RxPort0IntDiff = 0;
+ SK_U64 RxPort1IntDiff = 0;
+ SK_U64 TxPort0IntDiff = 0;
+ SK_U64 TxPort1IntDiff = 0;
+
+ if (pAC->DynIrqModInfo.MaskIrqModeration == IRQ_MASK_TX_ONLY) {
+ if (pAC->GIni.GIMacsFound == 2) {
+ TxPort1IntDiff = pAC->Pnmi.Port[1].TxIntrCts -
+ pAC->DynIrqModInfo.PrevPort1TxIntrCts;
+ }
+ TxPort0IntDiff = pAC->Pnmi.Port[0].TxIntrCts -
+ pAC->DynIrqModInfo.PrevPort0TxIntrCts;
+ } else if (pAC->DynIrqModInfo.MaskIrqModeration == IRQ_MASK_RX_ONLY) {
+ if (pAC->GIni.GIMacsFound == 2) {
+ RxPort1IntDiff = pAC->Pnmi.Port[1].RxIntrCts -
+ pAC->DynIrqModInfo.PrevPort1RxIntrCts;
+ }
+ RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
+ pAC->DynIrqModInfo.PrevPort0RxIntrCts;
+ } else {
+ if (pAC->GIni.GIMacsFound == 2) {
+ RxPort1IntDiff = pAC->Pnmi.Port[1].RxIntrCts -
+ pAC->DynIrqModInfo.PrevPort1RxIntrCts;
+ TxPort1IntDiff = pAC->Pnmi.Port[1].TxIntrCts -
+ pAC->DynIrqModInfo.PrevPort1TxIntrCts;
+ }
+ RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
+ pAC->DynIrqModInfo.PrevPort0RxIntrCts;
+ TxPort0IntDiff = pAC->Pnmi.Port[0].TxIntrCts -
+ pAC->DynIrqModInfo.PrevPort0TxIntrCts;
+ }
+
+ return (RxPort0IntDiff + RxPort1IntDiff + TxPort0IntDiff + TxPort1IntDiff);
+}
+
+/*******************************************************************************
+** Function : GetRxCalls
+** Description : This function will return the number of times a receive inter-
+** rupt was processed. This is needed to evaluate any resizing
+** factor.
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : SK_U64: the number of RX-ints being processed
+** Notes : It makes only sense to call this function, when dynamic
+** interrupt moderation is applied
+*******************************************************************************/
+
+static SK_U64
+GetRxCalls(SK_AC *pAC) {
+ SK_U64 RxPort0IntDiff = 0;
+ SK_U64 RxPort1IntDiff = 0;
+
+ if (pAC->GIni.GIMacsFound == 2) {
+ RxPort1IntDiff = pAC->Pnmi.Port[1].RxIntrCts -
+ pAC->DynIrqModInfo.PrevPort1RxIntrCts;
+ }
+ RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
+ pAC->DynIrqModInfo.PrevPort0RxIntrCts;
+
+ return (RxPort0IntDiff + RxPort1IntDiff);
+}
+
+/*******************************************************************************
+** Function : SetCurrIntCtr
+** Description : Will store the current number orf occured interrupts in the
+** adapter context. This is needed to evaluated the number of
+** interrupts within a current timeframe.
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : void (!)
+** Notes : -
+*******************************************************************************/
+
+static void
+SetCurrIntCtr(SK_AC *pAC) {
+ if (pAC->GIni.GIMacsFound == 2) {
+ pAC->DynIrqModInfo.PrevPort1RxIntrCts = pAC->Pnmi.Port[1].RxIntrCts;
+ pAC->DynIrqModInfo.PrevPort1TxIntrCts = pAC->Pnmi.Port[1].TxIntrCts;
+ }
+ pAC->DynIrqModInfo.PrevPort0RxIntrCts = pAC->Pnmi.Port[0].RxIntrCts;
+ pAC->DynIrqModInfo.PrevPort0TxIntrCts = pAC->Pnmi.Port[0].TxIntrCts;
+}
+
+/*******************************************************************************
+** Function : IsIntModEnabled()
+** Description : Retrieves the current value of the interrupts moderation
+** command register. Its content determines whether any
+** moderation is running or not.
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : SK_TRUE : if mod timer running
+** SK_FALSE : if no moderation is being performed
+** Notes : -
+*******************************************************************************/
+
+static SK_BOOL
+IsIntModEnabled(SK_AC *pAC) {
+ unsigned long CtrCmd;
+
+ SK_IN32(pAC->IoBase, B2_IRQM_CTRL, &CtrCmd);
+ if ((CtrCmd & TIM_START) == TIM_START) {
+ return SK_TRUE;
+ } else {
+ return SK_FALSE;
+ }
+}
+
+/*******************************************************************************
+** Function : EnableIntMod()
+** Description : Enables the interrupt moderation using the values stored in
+** in the pAC->DynIntMod data structure
+** Programmer : Ralph Roesler
+** Last Modified: 22-mar-03
+** Returns : -
+** Notes : -
+*******************************************************************************/
+
+static void
+EnableIntMod(SK_AC *pAC) {
+ unsigned long ModBase;
+
+ if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
+ ModBase = C_CLK_FREQ_GENESIS / pAC->DynIrqModInfo.MaxModIntsPerSec;
+ } else {
+ ModBase = C_CLK_FREQ_YUKON / pAC->DynIrqModInfo.MaxModIntsPerSec;
+ }
+
+ SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
+ SK_OUT32(pAC->IoBase, B2_IRQM_MSK, pAC->DynIrqModInfo.MaskIrqModeration);
+ SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
+ if (M_DIMINFO.DisplayStats) {
+ printk("Enabled interrupt moderation (%i ints/sec)\n",
+ M_DIMINFO.MaxModIntsPerSec);
+ }
+}
+
+/*******************************************************************************
+** Function : DisableIntMod()
+** Description : Disbles the interrupt moderation independent of what inter-
+** rupts are running or not
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : -
+** Notes : -
+*******************************************************************************/
+
+static void
+DisableIntMod(SK_AC *pAC) {
+
+ SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_STOP);
+ if (M_DIMINFO.DisplayStats) {
+ printk("Disabled interrupt moderation\n");
+ }
+}
+
+/*******************************************************************************
+** Function : ResizeDimTimerDuration();
+** Description : Checks the current used descriptor ratio and resizes the
+** duration timer (longer/smaller) if possible.
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : -
+** Notes : There are both maximum and minimum timer duration value.
+** This function assumes that interrupt moderation is already
+** enabled!
+*******************************************************************************/
+
+static void
+ResizeDimTimerDuration(SK_AC *pAC) {
+ SK_BOOL IncreaseTimerDuration;
+ int TotalMaxNbrDescr;
+ int UsedDescrRatio;
+ int RatioDiffAbs;
+ int RatioDiffRel;
+ int NewMaxModIntsPerSec;
+ int ModAdjValue;
+ long ModBase;
+
+ /*
+ ** Check first if we are allowed to perform any modification
+ */
+ if (IsIntModEnabled(pAC)) {
+ if (M_DIMINFO.IntModTypeSelect != C_INT_MOD_DYNAMIC) {
+ return;
+ } else {
+ if (M_DIMINFO.ModJustEnabled) {
+ M_DIMINFO.ModJustEnabled = SK_FALSE;
+ return;
+ }
+ }
+ }
+
+ /*
+ ** If we got until here, we have to evaluate the amount of the
+ ** descriptor ratio change...
+ */
+ TotalMaxNbrDescr = pAC->RxDescrPerRing * GetRxCalls(pAC);
+ UsedDescrRatio = (M_DIMINFO.NbrProcessedDescr * 100) / TotalMaxNbrDescr;
+
+ if (UsedDescrRatio > M_DIMINFO.PrevUsedDescrRatio) {
+ RatioDiffAbs = (UsedDescrRatio - M_DIMINFO.PrevUsedDescrRatio);
+ RatioDiffRel = (RatioDiffAbs * 100) / UsedDescrRatio;
+ M_DIMINFO.PrevUsedDescrRatio = UsedDescrRatio;
+ IncreaseTimerDuration = SK_FALSE; /* in other words: DECREASE */
+ } else if (UsedDescrRatio < M_DIMINFO.PrevUsedDescrRatio) {
+ RatioDiffAbs = (M_DIMINFO.PrevUsedDescrRatio - UsedDescrRatio);
+ RatioDiffRel = (RatioDiffAbs * 100) / M_DIMINFO.PrevUsedDescrRatio;
+ M_DIMINFO.PrevUsedDescrRatio = UsedDescrRatio;
+ IncreaseTimerDuration = SK_TRUE; /* in other words: INCREASE */
+ } else {
+ RatioDiffAbs = (M_DIMINFO.PrevUsedDescrRatio - UsedDescrRatio);
+ RatioDiffRel = (RatioDiffAbs * 100) / M_DIMINFO.PrevUsedDescrRatio;
+ M_DIMINFO.PrevUsedDescrRatio = UsedDescrRatio;
+ IncreaseTimerDuration = SK_TRUE; /* in other words: INCREASE */
+ }
+
+ /*
+ ** Now we can determine the change in percent
+ */
+ if ((RatioDiffRel >= 0) && (RatioDiffRel <= 5) ) {
+ ModAdjValue = 1; /* 1% change - maybe some other value in future */
+ } else if ((RatioDiffRel > 5) && (RatioDiffRel <= 10) ) {
+ ModAdjValue = 1; /* 1% change - maybe some other value in future */
+ } else if ((RatioDiffRel > 10) && (RatioDiffRel <= 15) ) {
+ ModAdjValue = 1; /* 1% change - maybe some other value in future */
+ } else {
+ ModAdjValue = 1; /* 1% change - maybe some other value in future */
+ }
+
+ if (IncreaseTimerDuration) {
+ NewMaxModIntsPerSec = M_DIMINFO.MaxModIntsPerSec +
+ (M_DIMINFO.MaxModIntsPerSec * ModAdjValue) / 100;
+ } else {
+ NewMaxModIntsPerSec = M_DIMINFO.MaxModIntsPerSec -
+ (M_DIMINFO.MaxModIntsPerSec * ModAdjValue) / 100;
+ }
+
+ /*
+ ** Check if we exceed boundaries...
+ */
+ if ( (NewMaxModIntsPerSec > M_DIMINFO.MaxModIntsPerSecUpperLimit) ||
+ (NewMaxModIntsPerSec < M_DIMINFO.MaxModIntsPerSecLowerLimit)) {
+ if (M_DIMINFO.DisplayStats) {
+ printk("Cannot change ModTim from %i to %i ints/sec\n",
+ M_DIMINFO.MaxModIntsPerSec, NewMaxModIntsPerSec);
+ }
+ return;
+ } else {
+ if (M_DIMINFO.DisplayStats) {
+ printk("Resized ModTim from %i to %i ints/sec\n",
+ M_DIMINFO.MaxModIntsPerSec, NewMaxModIntsPerSec);
+ }
+ }
+
+ M_DIMINFO.MaxModIntsPerSec = NewMaxModIntsPerSec;
+
+ if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
+ ModBase = C_CLK_FREQ_GENESIS / pAC->DynIrqModInfo.MaxModIntsPerSec;
+ } else {
+ ModBase = C_CLK_FREQ_YUKON / pAC->DynIrqModInfo.MaxModIntsPerSec;
+ }
+
+ /*
+ ** We do not need to touch any other registers
+ */
+ SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
+}
+
+/*******************************************************************************
+** Function : DisplaySelectedModerationType()
+** Description : Displays what type of moderation we have
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : void!
+** Notes : -
+*******************************************************************************/
+
+static void
+DisplaySelectedModerationType(SK_AC *pAC) {
+
+ if (pAC->DynIrqModInfo.DisplayStats) {
+ if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_STATIC) {
+ printk("Static int moderation runs with %i INTS/sec\n",
+ pAC->DynIrqModInfo.MaxModIntsPerSec);
+ } else if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
+ if (IsIntModEnabled(pAC)) {
+ printk("Dynamic int moderation runs with %i INTS/sec\n",
+ pAC->DynIrqModInfo.MaxModIntsPerSec);
+ } else {
+ printk("Dynamic int moderation currently not applied\n");
+ }
+ } else {
+ printk("No interrupt moderation selected!\n");
+ }
+ }
+}
+
+/*******************************************************************************
+** Function : DisplaySelectedModerationMask()
+** Description : Displays what interrupts are moderated
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : void!
+** Notes : -
+*******************************************************************************/
+
+static void
+DisplaySelectedModerationMask(SK_AC *pAC) {
+
+ if (pAC->DynIrqModInfo.DisplayStats) {
+ if (pAC->DynIrqModInfo.IntModTypeSelect != C_INT_MOD_NONE) {
+ switch (pAC->DynIrqModInfo.MaskIrqModeration) {
+ case IRQ_MASK_TX_ONLY:
+ printk("Only Tx-interrupts are moderated\n");
+ break;
+ case IRQ_MASK_RX_ONLY:
+ printk("Only Rx-interrupts are moderated\n");
+ break;
+ case IRQ_MASK_SP_ONLY:
+ printk("Only special-interrupts are moderated\n");
+ break;
+ case IRQ_MASK_TX_RX:
+ printk("Tx- and Rx-interrupts are moderated\n");
+ break;
+ case IRQ_MASK_SP_RX:
+ printk("Special- and Rx-interrupts are moderated\n");
+ break;
+ case IRQ_MASK_SP_TX:
+ printk("Special- and Tx-interrupts are moderated\n");
+ break;
+ case IRQ_MASK_RX_TX_SP:
+ printk("All Rx-, Tx and special-interrupts are moderated\n");
+ break;
+ default:
+ printk("Don't know what is moderated\n");
+ break;
+ }
+ } else {
+ printk("No specific interrupts masked for moderation\n");
+ }
+ }
+}
+
+/*******************************************************************************
+** Function : DisplayDescrRatio
+** Description : Like the name states...
+** Programmer : Ralph Roesler
+** Last Modified: 23-mar-03
+** Returns : void!
+** Notes : -
+*******************************************************************************/
+
+static void
+DisplayDescrRatio(SK_AC *pAC) {
+ int TotalMaxNbrDescr = 0;
+
+ if (pAC->DynIrqModInfo.DisplayStats) {
+ TotalMaxNbrDescr = pAC->RxDescrPerRing * GetRxCalls(pAC);
+ printk("Ratio descriptors: %i/%i\n",
+ M_DIMINFO.NbrProcessedDescr, TotalMaxNbrDescr);
+ }
+}
+
+/*******************************************************************************
+**
+** End of file
+**
+*******************************************************************************/
diff -Nru a/drivers/net/sk98lin/skge.c b/drivers/net/sk98lin/skge.c
--- a/drivers/net/sk98lin/skge.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/sk98lin/skge.c Sun Aug 3 13:14:45 2003
@@ -1,19 +1,22 @@
+
/******************************************************************************
*
* Name: skge.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.29.2.6 $
- * Date: $Date: 2001/05/21 07:59:29 $
+ * Version: $Revision: 1.63 $
+ * Date: $Date: 2003/07/15 09:26:23 $
* Purpose: The main driver source module
*
******************************************************************************/
-
+
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* Driver for SysKonnect Gigabit Ethernet Server Adapters:
*
+ * SK-9871 (single link 1000Base-ZX)
+ * SK-9872 (dual link 1000Base-ZX)
* SK-9861 (single link 1000Base-SX, VF45 Volition Plug)
* SK-9862 (dual link 1000Base-SX, VF45 Volition Plug)
* SK-9841 (single link 1000Base-LX)
@@ -22,8 +25,14 @@
* SK-9844 (dual link 1000Base-SX)
* SK-9821 (single link 1000Base-T)
* SK-9822 (dual link 1000Base-T)
+ * SK-9881 (single link 1000Base-SX V2 LC)
+ * SK-9871 (single link 1000Base-ZX V2)
+ * SK-9861 (single link 1000Base-SX V2, VF45 Volition Plug)
+ * SK-9841 (single link 1000Base-LX V2)
+ * SK-9843 (single link 1000Base-SX V2)
+ * SK-9821 (single link 1000Base-T V2)
*
- * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
+ * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
* SysKonnects GEnesis Solaris driver
* Author: Christoph Goos (cgoos@syskonnect.de)
* Mirko Lindner (mlindner@syskonnect.de)
@@ -48,9 +57,136 @@
* History:
*
* $Log: skge.c,v $
- * Revision x.xx.x.x 2003/06/07 02:31:17 romieu@fr.zoreil.com
- * pci api style init.
- *
+ * Revision 1.63 2003/07/15 09:26:23 rroesler
+ * Fix: Removed memory leak when sending short padded frames
+ *
+ * Revision 1.62 2003/07/09 11:11:16 rroesler
+ * Fix: Call of ReceiveIrq() performed with parameter SK_FALSE in
+ * order not to hang the system with multiple spinlocks
+ *
+ * Revision 1.61 2003/07/08 07:32:41 rroesler
+ * Fix: Correct Kernel-version
+ *
+ * Revision 1.60 2003/07/07 15:42:30 rroesler
+ * Fix: Removed function pci_present() for 2.5/2.6 kernels (deprecated)
+ * Fix: Corrected warning in GetConfiguration()
+ *
+ * Revision 1.59 2003/07/07 09:44:32 rroesler
+ * Add: HW checksumming on kernel 2.5/2.6
+ * Add: padding of short frames (<60 bytes) with 0x00 instead of 0xaa
+ * Add: ConType parameter combining multiple other parameters into one
+ * Fix: Corrected bugreport #10721 (warning when changing MTU size)
+ * Fix: Removed obsolete function SetQueueSize()
+ * Fix: Function ChangeMtuSize() returns new MTU size in kernel 2.5/2.6
+ *
+ * Revision 1.58 2003/06/17 07:14:29 mlindner
+ * Add: Disable checksum functionality
+ * Fix: Unload module (Kernel 2.5)
+ *
+ * Revision 1.57 2003/06/05 14:55:27 mlindner
+ * Fix: ProcFS creation (Kernel 2.2.x)
+ * Fix: ProcFS OWNER (Kernel 2.2.x)
+ *
+ * Revision 1.56 2003/06/03 14:34:29 mlindner
+ * Add: Additions for SK_SLIM
+ * Fix: SkGeIoctl SK_IOCTL_GEN
+ *
+ * Revision 1.55 2003/05/26 13:00:52 mlindner
+ * Add: Support for Kernel 2.5/2.6
+ * Add: Support for new IO-control MIB data structure
+ * Add: New SkOsGetTime function
+ * Fix: Race condition with broken LM80 chip
+ * Fix: Race condition with padded frames
+ *
+ * Revision 1.54 2003/04/28 13:07:27 mlindner
+ * Fix: Delay race condition with some server machines
+ *
+ * Revision 1.53 2003/04/28 12:49:49 mlindner
+ * Fix: Code optimization
+ *
+ * Revision 1.52 2003/04/28 12:24:32 mlindner
+ * Fix: Disabled HW Error IRQ on 32-bit Yukon if sensor IRQ occurs
+ *
+ * Revision 1.51 2003/04/16 08:31:14 mlindner
+ * Fix: Kernel 2.2 compilation
+ *
+ * Revision 1.49 2003/04/10 09:08:51 mlindner
+ * Add: Blink mode verification
+ * Fix: Checksum calculation
+ *
+ * Revision 1.48 2003/03/21 14:48:38 rroesler
+ * Added code for interrupt moderation
+ *
+ * Revision 1.47 2003/03/12 13:56:15 mlindner
+ * Fix: Mac update during SK_DRV_NET_UP
+ *
+ * Revision 1.46 2003/02/25 14:16:36 mlindner
+ * Fix: Copyright statement
+ *
+ * Revision 1.45 2003/02/25 13:25:55 mlindner
+ * Add: Performance improvements
+ * Add: Support for various vendors
+ * Fix: Init function
+ *
+ * Revision 1.44 2003/01/09 09:25:26 mlindner
+ * Fix: Remove useless init_module/cleanup_module forward declarations
+ *
+ * Revision 1.43 2002/11/29 08:42:41 mlindner
+ * Fix: Boot message
+ *
+ * Revision 1.42 2002/11/28 13:30:23 mlindner
+ * Add: New frame check
+ *
+ * Revision 1.41 2002/11/27 13:55:18 mlindner
+ * Fix: Drop wrong csum packets
+ * Fix: Initialize proc_entry after hw check
+ *
+ * Revision 1.40 2002/10/31 07:50:37 tschilli
+ * Function SkGeInitAssignRamToQueues() from common module inserted.
+ * Autonegotiation is set to ON for all adapters.
+ * LinkSpeedUsed is used in link up status report.
+ * Role parameter will show up for 1000 Mbps links only.
+ * GetConfiguration() inserted after init level 1 in SkGeChangeMtu().
+ * All return values of SkGeInit() and SkGeInitPort() are checked.
+ *
+ * Revision 1.39 2002/10/02 12:56:05 mlindner
+ * Add: Support for Yukon
+ * Add: Support for ZEROCOPY, scatter-gather and hw checksum
+ * Add: New transmit ring function (use SG and TCP/UDP hardware checksumming)
+ * Add: New init function
+ * Add: Speed check and setup
+ * Add: Merge source for kernel 2.2.x and 2.4.x
+ * Add: Opcode check for tcp
+ * Add: Frame length check
+ * Fix: Transmit complete interrupt
+ * Fix: Interrupt moderation
+ *
+ * Revision 1.29.2.13 2002/01/14 12:44:52 mlindner
+ * Fix: Rlmt modes
+ *
+ * Revision 1.29.2.12 2001/12/07 12:06:18 mlindner
+ * Fix: malloc -> slab changes
+ *
+ * Revision 1.29.2.11 2001/12/06 15:19:20 mlindner
+ * Add: DMA attributes
+ * Fix: Module initialisation
+ * Fix: pci_map_single and pci_unmap_single replaced
+ *
+ * Revision 1.29.2.10 2001/12/06 09:56:50 mlindner
+ * Corrected some printk's
+ *
+ * Revision 1.29.2.9 2001/09/05 12:15:34 mlindner
+ * Add: LBFO Changes
+ * Fix: Counter Errors (Jumbo == to long errors)
+ * Fix: Changed pAC->PciDev declaration
+ * Fix: too short counters
+ *
+ * Revision 1.29.2.8 2001/06/25 12:10:44 mlindner
+ * fix: ReceiveIrq() changed.
+ *
+ * Revision 1.29.2.7 2001/06/25 08:07:05 mlindner
+ * fix: RLMT locking in ReceiveIrq() changed.
+ *
* Revision 1.29.2.6 2001/05/21 07:59:29 mlindner
* fix: MTU init problems
*
@@ -192,7 +328,7 @@
* Printing "ethX:" before adapter type at adapter init.
*
*
- * 10-Feb-1999 cg Created, based on Linux' acenic.c, 3c59x.c and
+ * 10-Feb-1999 cg Created, based on Linux' acenic.c, 3c59x.c and
* SysKonnects GEnesis Solaris driver
*
******************************************************************************/
@@ -201,11 +337,11 @@
*
* Possible compiler options (#define xxx / -Dxxx):
*
- * debugging can be enable by changing SK_DEBUG_CHKMOD and
+ * debugging can be enable by changing SK_DEBUG_CHKMOD and
* SK_DEBUG_CHKCAT in makefile (described there).
*
******************************************************************************/
-
+
/******************************************************************************
*
* Description:
@@ -277,34 +413,44 @@
#include "h/skdrv1st.h"
#include "h/skdrv2nd.h"
-/* defines ******************************************************************/
-
-#define DRV_MODULE_NAME "sk98lin"
-#define PFX DRV_MODULE_NAME ": "
+/*******************************************************************************
+ *
+ * Defines
+ *
+ ******************************************************************************/
/* for debuging on x86 only */
/* #define BREAKPOINT() asm(" int $3"); */
+/* use the transmit hw checksum driver functionality */
+#define USE_SK_TX_CHECKSUM
+
+/* use the receive hw checksum driver functionality */
+#define USE_SK_RX_CHECKSUM
+
+/* use the scatter-gather functionality with sendfile() */
+#define SK_ZEROCOPY
+
/* use of a transmit complete interrupt */
#define USE_TX_COMPLETE
-/* use interrupt moderation (for tx complete only) */
-// #define USE_INT_MOD
-#define INTS_PER_SEC 1000
-
/*
* threshold for copying small receive frames
* set to 0 to avoid copying, set to 9001 to copy all frames
*/
-#define SK_COPY_THRESHOLD 200
+#define SK_COPY_THRESHOLD 50
/* number of adapters that can be configured via command line params */
#define SK_MAX_CARD_PARAM 16
+
+
/*
- * use those defines for a compile-in version of the driver instead
+ * use those defines for a compile-in version of the driver instead
* of command line parameters
*/
+// #define LINK_SPEED_A {"Auto", }
+// #define LINK_SPEED_B {"Auto", }
// #define AUTO_NEG_A {"Sense", }
// #define AUTO_NEG_B {"Sense", }
// #define DUP_CAP_A {"Both", }
@@ -314,51 +460,84 @@
// #define ROLE_A {"Auto", }
// #define ROLE_B {"Auto", }
// #define PREF_PORT {"A", }
+// #define CON_TYPE {"Auto", }
// #define RLMT_MODE {"CheckLinkState", }
#define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
#define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
#define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
-/* function prototypes ******************************************************/
-static void FreeResources(struct net_device *dev);
-static int SkGeBoardInit(struct net_device *dev, SK_AC *pAC);
+
+/* Set blink mode*/
+#define OEM_CONFIG_VALUE ( SK_ACT_LED_BLINK | \
+ SK_DUP_LED_NORMAL | \
+ SK_LED_LINK100_ON)
+
+
+/* Isr return value */
+#define SkIsrRetVar irqreturn_t
+#define SkIsrRetNone IRQ_NONE
+#define SkIsrRetHandled IRQ_HANDLED
+
+
+/*******************************************************************************
+ *
+ * Local Function Prototypes
+ *
+ ******************************************************************************/
+
+static void FreeResources(struct SK_NET_DEVICE *dev);
+static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
static SK_BOOL BoardAllocMem(SK_AC *pAC);
static void BoardFreeMem(SK_AC *pAC);
static void BoardInitMem(SK_AC *pAC);
-static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**,
- int*, SK_BOOL);
-
-static irqreturn_t SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
-static irqreturn_t SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
-static int SkGeOpen(struct net_device *dev);
-static int SkGeClose(struct net_device *dev);
-static int SkGeXmit(struct sk_buff *skb, struct net_device *dev);
-static int SkGeSetMacAddr(struct net_device *dev, void *p);
-static void SkGeSetRxMode(struct net_device *dev);
-static struct net_device_stats *SkGeStats(struct net_device *dev);
-static int SkGeIoctl(struct net_device *dev, struct ifreq *rq, int cmd);
+static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**, int*, SK_BOOL);
+static SkIsrRetVar SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
+static SkIsrRetVar SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
+static int SkGeOpen(struct SK_NET_DEVICE *dev);
+static int SkGeClose(struct SK_NET_DEVICE *dev);
+static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
+static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
+static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
+static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
+static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
static void GetConfiguration(SK_AC*);
static void ProductStr(SK_AC*);
static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
static void FillRxRing(SK_AC*, RX_PORT*);
static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
-static void ReceiveIrq(SK_AC*, RX_PORT*);
+static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
static void ClearAndStartRx(SK_AC*, int);
static void ClearTxIrq(SK_AC*, int, int);
static void ClearRxRing(SK_AC*, RX_PORT*);
static void ClearTxRing(SK_AC*, TX_PORT*);
-static void SetQueueSizes(SK_AC *pAC);
-static int SkGeChangeMtu(struct net_device *dev, int new_mtu);
+static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
static void PortReInitBmu(SK_AC*, int);
static int SkGeIocMib(DEV_NET*, unsigned int, int);
+static void StartDrvCleanupTimer(SK_AC *pAC);
+static void StopDrvCleanupTimer(SK_AC *pAC);
+static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
+/*******************************************************************************
+ *
+ * Extern Function Prototypes
+ *
+ ******************************************************************************/
-static const char SK_Root_Dir_entry[] = "sk98lin";
-static struct proc_dir_entry *pSkRootDir;
-
-extern struct file_operations sk_proc_fops;
+static const char SK_Root_Dir_entry[] = "sk98lin";
+static struct proc_dir_entry *pSkRootDir;
+extern int sk_proc_read( char *buffer,
+ char **buffer_location,
+ off_t offset,
+ int buffer_length,
+ int *eof,
+ void *data);
+
+extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);
+extern void SkDimDisplayModerationSettings(SK_AC *pAC);
+extern void SkDimStartModerationTimer(SK_AC *pAC);
+extern void SkDimModerate(SK_AC *pAC);
#ifdef DEBUG
static void DumpMsg(struct sk_buff*, char*);
@@ -366,229 +545,302 @@
static void DumpLong(char*, int);
#endif
-
/* global variables *********************************************************/
-static int boards_found;
-struct inode_operations SkInodeOps;
-//static struct file_operations SkFileOps; /* with open/relase */
+static const char *BootString = BOOT_STRING;
+struct SK_NET_DEVICE *SkGeRootDev = NULL;
+static int probed __initdata = 0;
/* local variables **********************************************************/
static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
-spinlock_t sk_devs_lock = SPIN_LOCK_UNLOCKED;
-
-static int SkGeDevInit(struct net_device *dev)
-{
- DEV_NET *pNet = dev->priv;
- int ret = 0;
- dev->open = &SkGeOpen;
- dev->stop = &SkGeClose;
- dev->hard_start_xmit = &SkGeXmit;
- dev->get_stats = &SkGeStats;
- dev->set_multicast_list = &SkGeSetRxMode;
- dev->set_mac_address = &SkGeSetMacAddr;
- dev->do_ioctl = &SkGeIoctl;
- dev->change_mtu = &SkGeChangeMtu;
-
- if (register_netdev(dev) != 0) {
- printk(KERN_ERR "Unable to register etherdev\n");
- ret = -ENOMEM;
- goto out;
- }
- pNet->proc = create_proc_entry(dev->name, S_IFREG | 0444, pSkRootDir);
- if (pNet->proc) {
- pNet->proc->data = dev;
- pNet->proc->owner = THIS_MODULE;
- pNet->proc->proc_fops = &sk_proc_fops;
- }
-out:
- return ret;
-}
+static struct proc_dir_entry *pSkRootDir;
-static void SkGeDevCleanUp(struct net_device *dev)
-{
- DEV_NET *pNet = dev->priv;
-
- if (pNet->proc) {
- spin_lock(&sk_devs_lock);
- pNet->proc->data = NULL;
- spin_unlock(&sk_devs_lock);
- remove_proc_entry(dev->name, pSkRootDir);
- }
- unregister_netdev(dev);
-}
/*****************************************************************************
*
- * skge_init_one - init a single instance of a SK-98xx adapter
+ * skge_probe - find all SK-98xx adapters
*
* Description:
- * This function allocates resources for an SK-98xx adapter and brings
- * it into Init 1 state.
+ * This function scans the PCI bus for SK-98xx adapters. Resources for
+ * each adapter are allocated and the adapter is brought into Init 1
+ * state.
*
* Returns:
* 0, if everything is ok
- * <0, on error
+ * !=0, on error
*/
-static int __devinit skge_init_one(struct pci_dev *pdev,
- const struct pci_device_id *ent)
+static int __init skge_probe (void)
{
- SK_AC *pAC;
- DEV_NET *pNet;
- unsigned long base_address;
- struct net_device *dev;
- int ret;
+ int proc_root_initialized = 0;
+ int boards_found = 0;
+ int vendor_flag = SK_FALSE;
+ SK_AC *pAC;
+ DEV_NET *pNet = NULL;
+ struct proc_dir_entry *pProcFile;
+ struct pci_dev *pdev = NULL;
+ unsigned long base_address;
+ struct SK_NET_DEVICE *dev = NULL;
+ SK_BOOL DeviceFound = SK_FALSE;
+ SK_BOOL BootStringCount = SK_FALSE;
+
+ if (probed)
+ return -ENODEV;
+ probed++;
+
+
+ while((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev))) {
+
+ if (pci_enable_device(pdev)) {
+ continue;
+ }
+ dev = NULL;
+ pNet = NULL;
-#ifndef MODULE
- static int version_disp = 0;
-if (!version_disp++)
- printk(KERN_INFO "%s\n", BOOT_STRING);
-#endif
- ret = pci_enable_device(pdev);
- if (ret)
- goto out;
+ SK_PCI_ISCOMPLIANT(vendor_flag, pdev);
+ if (!vendor_flag)
+ continue;
+
+ /* Configure DMA attributes. */
+ if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff) &&
+ pci_set_dma_mask(pdev, (u64) 0xffffffff))
+ continue;
- /* Configure DMA attributes. */
- if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff)) {
- ret = pci_set_dma_mask(pdev, (u64) 0xffffffff);
- if (ret) {
- printk(KERN_ERR PFX "No usable DMA configuration\n");
- goto out_disable;
+
+ if ((dev = init_etherdev(dev, sizeof(DEV_NET))) == NULL) {
+ printk(KERN_ERR "Unable to allocate etherdev "
+ "structure!\n");
+ break;
}
- }
- ret = -ENOMEM;
+ if (dev->priv == NULL) {
+ printk(KERN_ERR "Unable to allocate adapter "
+ "structure!\n");
+ break;
+ }
- dev = alloc_etherdev(sizeof(DEV_NET));
- if (!dev) {
- printk(KERN_ERR "Unable to allocate etherdev structure!\n");
- goto out_disable;
- }
+ pNet = dev->priv;
+ pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
+ if (pNet->pAC == NULL){
+ kfree(dev->priv);
+ printk(KERN_ERR "Unable to allocate adapter "
+ "structure!\n");
+ break;
+ }
- pNet = dev->priv;
+ /* Print message */
+ if (!BootStringCount) {
+ /* set display flag to TRUE so that */
+ /* we only display this string ONCE */
+ BootStringCount = SK_TRUE;
+ printk("%s\n", BootString);
+ }
- pAC = kmalloc(sizeof(*pAC), GFP_KERNEL);
- if (pAC == NULL){
- printk(KERN_ERR "Unable to allocate adapter structure!\n");
- goto out_free_dev;
- }
+ memset(pNet->pAC, 0, sizeof(SK_AC));
+ pAC = pNet->pAC;
+ pAC->PciDev = pdev;
+ pAC->PciDevId = pdev->device;
+ pAC->dev[0] = dev;
+ pAC->dev[1] = dev;
+ sprintf(pAC->Name, "SysKonnect SK-98xx");
+ pAC->CheckQueue = SK_FALSE;
- memset(pAC, 0, sizeof(SK_AC));
- pNet->pAC = pAC;
- pAC->PciDev = *pdev;
- pAC->PciDevId = pdev->device;
- pAC->dev[0] = dev;
- pAC->dev[1] = dev;
- sprintf(pAC->Name, "SysKonnect SK-98xx");
- pAC->CheckQueue = SK_FALSE;
-
- pNet->Mtu = 1500;
- pNet->Up = 0;
- dev->irq = pdev->irq;
+ pNet->Mtu = 1500;
+ pNet->Up = 0;
+ dev->irq = pdev->irq;
+
+ SET_MODULE_OWNER(dev);
+ dev->open = &SkGeOpen;
+ dev->stop = &SkGeClose;
+ dev->hard_start_xmit = &SkGeXmit;
+ dev->get_stats = &SkGeStats;
+ dev->set_multicast_list = &SkGeSetRxMode;
+ dev->set_mac_address = &SkGeSetMacAddr;
+ dev->do_ioctl = &SkGeIoctl;
+ dev->change_mtu = &SkGeChangeMtu;
+ dev->flags &= ~IFF_RUNNING;
+
+#ifdef SK_ZEROCOPY
+#ifdef USE_SK_TX_CHECKSUM
+
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
+ /* Use only if yukon hardware */
+ /* SK and ZEROCOPY - fly baby... */
+ dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
+ }
+#endif
+#endif
- SET_MODULE_OWNER(dev);
- SET_NETDEV_DEV(dev, &pdev->dev);
- ret = SkGeDevInit(dev);
- if (ret < 0)
- goto out_free_priv;
+ /*
+ * Dummy value.
+ */
+ dev->base_addr = 42;
+ pci_set_master(pdev);
- /*
- * Dummy value.
- */
- dev->base_addr = 42;
- pci_set_master(pdev);
- base_address = pci_resource_start(pdev, 0);
+ pci_set_master(pdev);
+ base_address = pci_resource_start (pdev, 0);
#ifdef SK_BIG_ENDIAN
- /*
- * On big endian machines, we use the adapter's ability of
- * reading the descriptors as big endian.
- */
- {
+ /*
+ * On big endian machines, we use the adapter's aibility of
+ * reading the descriptors as big endian.
+ */
+ {
SK_U32 our2;
- SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
- our2 |= PCI_REV_DESC;
- SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
- }
-#endif /* BIG ENDIAN */
+ SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
+ our2 |= PCI_REV_DESC;
+ SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
+ }
+#endif
- /*
- * Remap the regs into kernel space.
- */
+ /*
+ * Remap the regs into kernel space.
+ */
+ pAC->IoBase = (char*)ioremap(base_address, 0x4000);
- pAC->IoBase = (char*)ioremap(base_address, 0x4000);
- if (!pAC->IoBase) {
- printk(KERN_ERR PFX "unable to map I/O register. "
- "SK 98xx device disabled.\n");
- ret = -EIO;
- goto out_dev_uninit;
- }
- pAC->Index = boards_found++;
-
- ret = SkGeBoardInit(dev, pAC);
- if (ret < 0)
- goto out_free_resources;
+ if (!pAC->IoBase){
+ printk(KERN_ERR "%s: Unable to map I/O register, "
+ "SK 98xx No. %i will be disabled.\n",
+ dev->name, boards_found);
+ kfree(dev);
+ break;
+ }
- memcpy((caddr_t) &dev->dev_addr,
- (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
+ pAC->Index = boards_found;
+ if (SkGeBoardInit(dev, pAC)) {
+ FreeResources(dev);
+ kfree(dev);
+ continue;
+ }
- pNet->PortNr = 0;
- pNet->NetNr = 0;
+ memcpy((caddr_t) &dev->dev_addr,
+ (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
- /* More then one port found */
- if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
- struct net_device *sec_dev;
+ /* First adapter... Create proc and print message */
+ if (!DeviceFound) {
+ DeviceFound = SK_TRUE;
+ SK_MEMCPY(&SK_Root_Dir_entry, BootString,
+ sizeof(SK_Root_Dir_entry) - 1);
+
+ /*Create proc (directory)*/
+ if(!proc_root_initialized) {
+ pSkRootDir = create_proc_entry(SK_Root_Dir_entry,
+ S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
+ pSkRootDir->owner = THIS_MODULE;
+ proc_root_initialized = 1;
+ }
- sec_dev = alloc_etherdev(sizeof(DEV_NET));
- if (!sec_dev) {
- printk(KERN_ERR PFX
- "Unable to allocate etherdev structure!\n");
- ret = -ENOMEM;
- goto out_free_resources;
}
- pAC->dev[1] = sec_dev;
- pNet = sec_dev->priv;
- pNet->PortNr = 1;
- pNet->NetNr = 1;
- pNet->pAC = pAC;
- pNet->Mtu = 1500;
- pNet->Up = 0;
- ret = SkGeDevInit(sec_dev);
- if (ret < 0)
- goto out_free_secondary_dev;
- memcpy((caddr_t) &sec_dev->dev_addr,
- (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
+ /* Create proc file */
+ pProcFile = create_proc_entry(dev->name,
+ S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
+ pSkRootDir);
- printk("%s: %s\n", sec_dev->name, pAC->DeviceStr);
- printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
+
+ pProcFile->read_proc = sk_proc_read;
+ pProcFile->write_proc = NULL;
+ pProcFile->nlink = 1;
+ pProcFile->size = sizeof(dev->name + 1);
+ pProcFile->data = (void *)pProcFile;
+ pProcFile->owner = THIS_MODULE;
+
+ pNet->PortNr = 0;
+ pNet->NetNr = 0;
+
+#ifdef SK_ZEROCOPY
+#ifdef USE_SK_TX_CHECKSUM
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
+ /* SG and ZEROCOPY - fly baby... */
+ dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
+ }
+#endif
+#endif
+
+ boards_found++;
+
+ /* More then one port found */
+ if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
+ if ((dev = init_etherdev(NULL, sizeof(DEV_NET))) == 0) {
+ printk(KERN_ERR "Unable to allocate etherdev "
+ "structure!\n");
+ break;
+ }
+
+ pAC->dev[1] = dev;
+ pNet = dev->priv;
+ pNet->PortNr = 1;
+ pNet->NetNr = 1;
+ pNet->pAC = pAC;
+ pNet->Mtu = 1500;
+ pNet->Up = 0;
+
+ dev->open = &SkGeOpen;
+ dev->stop = &SkGeClose;
+ dev->hard_start_xmit = &SkGeXmit;
+ dev->get_stats = &SkGeStats;
+ dev->set_multicast_list = &SkGeSetRxMode;
+ dev->set_mac_address = &SkGeSetMacAddr;
+ dev->do_ioctl = &SkGeIoctl;
+ dev->change_mtu = &SkGeChangeMtu;
+ dev->flags &= ~IFF_RUNNING;
+
+#ifdef SK_ZEROCOPY
+#ifdef USE_SK_TX_CHECKSUM
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
+ /* SG and ZEROCOPY - fly baby... */
+ dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
+ }
+#endif
+#endif
+
+ pProcFile = create_proc_entry(dev->name,
+ S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
+ pSkRootDir);
+
+
+ pProcFile->read_proc = sk_proc_read;
+ pProcFile->write_proc = NULL;
+ pProcFile->nlink = 1;
+ pProcFile->size = sizeof(dev->name + 1);
+ pProcFile->data = (void *)pProcFile;
+ pProcFile->owner = THIS_MODULE;
+
+ memcpy((caddr_t) &dev->dev_addr,
+ (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
+
+ printk("%s: %s\n", dev->name, pAC->DeviceStr);
+ printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
+
+ }
+
+
+ /* Save the hardware revision */
+ pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
+ (pAC->GIni.GIPciHwRev & 0x0F);
+
+ /*
+ * This is bollocks, but we need to tell the net-init
+ * code that it shall go for the next device.
+ */
+#ifndef MODULE
+ dev->base_addr = 0;
+#endif
}
- pci_set_drvdata(pdev, dev);
- ret = 0;
-out:
- return ret;
-
-out_free_secondary_dev:
- kfree(pAC->dev[1]);
-out_free_resources:
- FreeResources(dev);
-out_dev_uninit:
- SkGeDevCleanUp(dev);
-out_free_priv:
- kfree(pAC);
-out_free_dev:
- kfree(dev);
-out_disable:
- pci_disable_device(pdev);
- goto out;
+ /*
+ * If we're at this point we're going through skge_probe() for
+ * the first time. Return success (0) if we've initialized 1
+ * or more boards. Otherwise, return failure (-ENODEV).
+ */
+
+ return boards_found;
+} /* skge_probe */
-} /* skge_init_one */
/*****************************************************************************
*
@@ -601,7 +853,7 @@
* Returns: N/A
*
*/
-static void FreeResources(struct net_device *dev)
+static void FreeResources(struct SK_NET_DEVICE *dev)
{
SK_U32 AllocFlag;
DEV_NET *pNet;
@@ -624,9 +876,11 @@
} /* FreeResources */
-MODULE_AUTHOR("Christoph Goos <cgoos@syskonnect.de>");
+MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
MODULE_LICENSE("GPL");
+MODULE_PARM(Speed_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
+MODULE_PARM(Speed_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(AutoNeg_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(AutoNeg_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(DupCap_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
@@ -635,13 +889,32 @@
MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(Role_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(Role_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
+MODULE_PARM(ConType, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(PrefPort, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
MODULE_PARM(RlmtMode, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
/* not used, just there because every driver should have them: */
MODULE_PARM(options, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
MODULE_PARM(debug, "i");
+/* used for interrupt moderation */
+MODULE_PARM(IntsPerSec, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
+MODULE_PARM(Moderation, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
+MODULE_PARM(Stats, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
+MODULE_PARM(ModerationMask, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
+MODULE_PARM(AutoSizing, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
+#ifdef LINK_SPEED_A
+static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED;
+#else
+static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
+#endif
+
+#ifdef LINK_SPEED_B
+static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED;
+#else
+static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
+#endif
+
#ifdef AUTO_NEG_A
static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
#else
@@ -690,6 +963,12 @@
static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
#endif
+#ifdef CON_TYPE
+static char *ConType[SK_MAX_CARD_PARAM] = CON_TYPE;
+#else
+static char *ConType[SK_MAX_CARD_PARAM] = {"", };
+#endif
+
#ifdef PREF_PORT
static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
#else
@@ -702,13 +981,47 @@
static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
#endif
-
static int debug = 0; /* not used */
static int options[SK_MAX_CARD_PARAM] = {0, }; /* not used */
+static int IntsPerSec[SK_MAX_CARD_PARAM];
+static char *Moderation[SK_MAX_CARD_PARAM];
+static char *ModerationMask[SK_MAX_CARD_PARAM];
+static char *AutoSizing[SK_MAX_CARD_PARAM];
+static char *Stats[SK_MAX_CARD_PARAM];
+
+
/*****************************************************************************
*
- * skge_remove_one - remove a single instance of a SK-98xx adapter
+ * skge_init_module - module initialization function
+ *
+ * Description:
+ * Very simple, only call skge_probe and return approriate result.
+ *
+ * Returns:
+ * 0, if everything is ok
+ * !=0, on error
+ */
+static int __init skge_init_module(void)
+{
+ int cards;
+ SkGeRootDev = NULL;
+
+ /* just to avoid warnings ... */
+ debug = 0;
+ options[0] = 0;
+
+ cards = skge_probe();
+ if (cards == 0) {
+ printk("sk98lin: No adapter found.\n");
+ }
+ return cards ? 0 : -ENODEV;
+} /* skge_init_module */
+
+
+/*****************************************************************************
+ *
+ * skge_cleanup_module - module unload function
*
* Description:
* Disable adapter if it is still running, free resources,
@@ -716,65 +1029,72 @@
*
* Returns: N/A
*/
-static void __devexit skge_remove_one(struct pci_dev *pdev)
+static void __exit skge_cleanup_module(void)
{
- struct net_device *dev = pci_get_drvdata(pdev);
- DEV_NET *pNet = dev->priv;
- SK_AC *pAC = pNet->pAC;
- unsigned long Flags;
- SK_EVPARA EvPara;
+DEV_NET *pNet;
+SK_AC *pAC;
+struct SK_NET_DEVICE *next;
+unsigned long Flags;
+SK_EVPARA EvPara;
+ while (SkGeRootDev) {
+ pNet = (DEV_NET*) SkGeRootDev->priv;
+ pAC = pNet->pAC;
+ next = pAC->Next;
- netif_stop_queue(dev);
- SkGeYellowLED(pAC, pAC->IoBase, 0);
- if (pNet->proc) {
- spin_lock(&sk_devs_lock);
- pNet->proc->data = NULL;
- spin_unlock(&sk_devs_lock);
- remove_proc_entry(dev->name, pSkRootDir);
- }
+ netif_stop_queue(SkGeRootDev);
+ SkGeYellowLED(pAC, pAC->IoBase, 0);
- if (pAC->BoardLevel == 2) {
- /* board is still alive */
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- EvPara.Para32[0] = 0;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- EvPara.Para32[0] = 1;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- SkEventDispatcher(pAC, pAC->IoBase);
- /* disable interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, 0);
- SkGeDeInit(pAC, pAC->IoBase);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- pAC->BoardLevel = 0;
- /* We do NOT check here, if IRQ was pending, of course*/
- }
+ if(pAC->BoardLevel == SK_INIT_RUN) {
+ /* board is still alive */
+ spin_lock_irqsave(&pAC->SlowPathLock, Flags);
+ EvPara.Para32[0] = 0;
+ EvPara.Para32[1] = -1;
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
+ EvPara.Para32[0] = 1;
+ EvPara.Para32[1] = -1;
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
+ SkEventDispatcher(pAC, pAC->IoBase);
+ /* disable interrupts */
+ SK_OUT32(pAC->IoBase, B0_IMSK, 0);
+ SkGeDeInit(pAC, pAC->IoBase);
+ spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
+ pAC->BoardLevel = SK_INIT_DATA;
+ /* We do NOT check here, if IRQ was pending, of course*/
+ }
- if (pAC->BoardLevel == 1) {
- /* board is still alive */
- SkGeDeInit(pAC, pAC->IoBase);
- pAC->BoardLevel = 0;
- }
+ if(pAC->BoardLevel == SK_INIT_IO) {
+ /* board is still alive */
+ SkGeDeInit(pAC, pAC->IoBase);
+ pAC->BoardLevel = SK_INIT_DATA;
+ }
- if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2) {
- SkGeDevCleanUp(pAC->dev[1]);
- kfree(pAC->dev[1]);
+ if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
+ unregister_netdev(pAC->dev[1]);
+ kfree(pAC->dev[1]);
+ }
+
+ FreeResources(SkGeRootDev);
+
+ SkGeRootDev->get_stats = NULL;
+ /*
+ * otherwise unregister_netdev calls get_stats with
+ * invalid IO ... :-(
+ */
+ unregister_netdev(SkGeRootDev);
+ kfree(SkGeRootDev);
+ kfree(pAC);
+ SkGeRootDev = next;
}
- FreeResources(dev);
+ /* clear proc-dir */
+ remove_proc_entry(pSkRootDir->name, proc_net);
+
+} /* skge_cleanup_module */
+
+module_init(skge_init_module);
+module_exit(skge_cleanup_module);
- dev->get_stats = NULL;
- /*
- * otherwise unregister_netdev calls get_stats with
- * invalid IO ... :-(
- */
- unregister_netdev(dev);
- kfree(dev);
- kfree(pAC);
- boards_found--;
-} /* skge_remove_one */
/*****************************************************************************
*
@@ -789,13 +1109,14 @@
* 0, if everything is ok
* !=0, on error
*/
-static int __init SkGeBoardInit(struct net_device *dev, SK_AC *pAC)
+static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
{
short i;
unsigned long Flags;
char *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
char *VerStr = VER_STRING;
int Ret; /* return code of request_irq */
+SK_BOOL DualNet;
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
@@ -807,7 +1128,6 @@
}
/* Initialize the mutexes */
-
for (i=0; i<SK_MAX_MACS; i++) {
spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
@@ -818,20 +1138,20 @@
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
/* Does a RESET on board ...*/
- if (SkGeInit(pAC, pAC->IoBase, 0) != 0) {
+ if (SkGeInit(pAC, pAC->IoBase, SK_INIT_DATA) != 0) {
printk("HWInit (0) failed.\n");
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
return(-EAGAIN);
}
- SkI2cInit( pAC, pAC->IoBase, 0);
- SkEventInit(pAC, pAC->IoBase, 0);
- SkPnmiInit( pAC, pAC->IoBase, 0);
- SkAddrInit( pAC, pAC->IoBase, 0);
- SkRlmtInit( pAC, pAC->IoBase, 0);
- SkTimerInit(pAC, pAC->IoBase, 0);
+ SkI2cInit( pAC, pAC->IoBase, SK_INIT_DATA);
+ SkEventInit(pAC, pAC->IoBase, SK_INIT_DATA);
+ SkPnmiInit( pAC, pAC->IoBase, SK_INIT_DATA);
+ SkAddrInit( pAC, pAC->IoBase, SK_INIT_DATA);
+ SkRlmtInit( pAC, pAC->IoBase, SK_INIT_DATA);
+ SkTimerInit(pAC, pAC->IoBase, SK_INIT_DATA);
- pAC->BoardLevel = 0;
- pAC->RxBufSize = ETH_BUF_SIZE;
+ pAC->BoardLevel = SK_INIT_DATA;
+ pAC->RxBufSize = ETH_BUF_SIZE;
SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
@@ -840,25 +1160,24 @@
/* level 1 init common modules here (HW init) */
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
+ if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
printk("HWInit (1) failed.\n");
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
return(-EAGAIN);
}
- SkI2cInit( pAC, pAC->IoBase, 1);
- SkEventInit(pAC, pAC->IoBase, 1);
- SkPnmiInit( pAC, pAC->IoBase, 1);
- SkAddrInit( pAC, pAC->IoBase, 1);
- SkRlmtInit( pAC, pAC->IoBase, 1);
- SkTimerInit(pAC, pAC->IoBase, 1);
+ SkI2cInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
+ SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
GetConfiguration(pAC);
if (pAC->RlmtNets == 2) {
pAC->GIni.GIPortUsage = SK_MUL_LINK;
}
-
- pAC->BoardLevel = 1;
+ pAC->BoardLevel = SK_INIT_IO;
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
if (pAC->GIni.GIMacsFound == 2) {
@@ -867,12 +1186,13 @@
Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
pAC->Name, dev);
} else {
- printk(KERN_WARNING "%s: illegal number of ports: %d\n",
+ printk(KERN_WARNING "%s: Invalid number of ports: %d\n",
dev->name, pAC->GIni.GIMacsFound);
return -EAGAIN;
}
+
if (Ret) {
- printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
+ printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
dev->name, dev->irq);
return -EAGAIN;
}
@@ -880,7 +1200,7 @@
/* Alloc memory for this board (Mem for RxD/TxD) : */
if(!BoardAllocMem(pAC)) {
- printk("No memory for descriptor rings\n");
+ printk("No memory for descriptor rings.\n");
return(-EAGAIN);
}
@@ -890,8 +1210,20 @@
pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
BoardInitMem(pAC);
-
- SetQueueSizes(pAC);
+ /* tschilling: New common function with minimum size check. */
+ DualNet = SK_FALSE;
+ if (pAC->RlmtNets == 2) {
+ DualNet = SK_TRUE;
+ }
+
+ if (SkGeInitAssignRamToQueues(
+ pAC,
+ pAC->ActivePort,
+ DualNet)) {
+ BoardFreeMem(pAC);
+ printk("SkGeInitAssignRamToQueues failed.\n");
+ return(-EAGAIN);
+ }
/* Print adapter specific string from vpd */
ProductStr(pAC);
@@ -901,14 +1233,19 @@
printk(" PrefPort:%c RlmtMode:%s\n",
'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
(pAC->RlmtMode==0) ? "Check Link State" :
- ((pAC->RlmtMode==1) ? "Check Link State" :
- ((pAC->RlmtMode==3) ? "Check Local Port" :
- ((pAC->RlmtMode==7) ? "Check Segmentation" :
+ ((pAC->RlmtMode==1) ? "Check Link State" :
+ ((pAC->RlmtMode==3) ? "Check Local Port" :
+ ((pAC->RlmtMode==7) ? "Check Segmentation" :
((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
-
SkGeYellowLED(pAC, pAC->IoBase, 1);
+ /*
+ * Register the device here
+ */
+ pAC->Next = SkGeRootDev;
+ SkGeRootDev = dev;
+
return (0);
} /* SkGeBoardInit */
@@ -944,17 +1281,19 @@
AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
+ RX_RING_SIZE + 8;
#endif
- pDescrMem = pci_alloc_consistent(&pAC->PciDev, AllocLength,
+
+ pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
&pAC->pDescrMemDMA);
+
if (pDescrMem == NULL) {
return (SK_FALSE);
}
pAC->pDescrMem = pDescrMem;
+ BusAddr = (unsigned long) pAC->pDescrMemDMA;
/* Descriptors need 8 byte alignment, and this is ensured
* by pci_alloc_consistent.
*/
- BusAddr = (unsigned long) pAC->pDescrMemDMA;
for (i=0; i<pAC->GIni.GIMacsFound; i++) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
@@ -1002,7 +1341,8 @@
AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
+ RX_RING_SIZE + 8;
#endif
- pci_free_consistent(&pAC->PciDev, AllocLength,
+
+ pci_free_consistent(pAC->PciDev, AllocLength,
pAC->pDescrMem, pAC->pDescrMemDMA);
pAC->pDescrMem = NULL;
} /* BoardFreeMem */
@@ -1089,8 +1429,7 @@
DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
DESCR_ALIGN;
DescrNum = TX_RING_SIZE / DescrSize;
- }
- else {
+ } else {
DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
DESCR_ALIGN;
DescrNum = RX_RING_SIZE / DescrSize;
@@ -1109,7 +1448,8 @@
pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
pDescr->pNextRxd = pNextDescr;
pDescr->TcpSumStarts = pAC->CsOfs;
- /* advance on step */
+
+ /* advance one step */
pPrevDescr = pDescr;
pDescr = pNextDescr;
pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
@@ -1145,24 +1485,22 @@
("PortReInitBmu "));
/* set address of first descriptor of ring in BMU */
- SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
- TX_Q_CUR_DESCR_LOW,
+ SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_L,
(uint32_t)(((caddr_t)
(pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
0xFFFFFFFF));
- SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
- TX_Q_DESCR_HIGH,
+ SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_H,
(uint32_t)(((caddr_t)
(pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
- SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CUR_DESCR_LOW,
+ SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_L,
(uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
pAC->RxPort[PortIndex].pRxDescrRing +
pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
- SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_DESCR_HIGH,
+ SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_H,
(uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
pAC->RxPort[PortIndex].pRxDescrRing +
pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
@@ -1181,10 +1519,9 @@
* Returns: N/A
*
*/
-static irqreturn_t SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
+static SkIsrRetVar SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
{
-struct net_device *dev = (struct net_device *)dev_id;
-
+struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
DEV_NET *pNet;
SK_AC *pAC;
SK_U32 IntSrc; /* interrupts source register contents */
@@ -1197,135 +1534,124 @@
*/
SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
if (IntSrc == 0) {
- return IRQ_NONE;
+ return SkIsrRetNone;
}
while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
#if 0 /* software irq currently not used */
- if (IntSrc & IRQ_SW) {
+ if (IntSrc & IS_IRQ_SW) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("Software IRQ\n"));
}
#endif
- if (IntSrc & IRQ_EOF_RX1) {
+ if (IntSrc & IS_R1_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF RX1 IRQ\n"));
- ReceiveIrq(pAC, &pAC->RxPort[0]);
- SK_PNMI_CNT_RX_INTR(pAC,0);
+ ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
+ SK_PNMI_CNT_RX_INTR(pAC, 0);
}
- if (IntSrc & IRQ_EOF_RX2) {
+ if (IntSrc & IS_R2_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF RX2 IRQ\n"));
- ReceiveIrq(pAC, &pAC->RxPort[1]);
- SK_PNMI_CNT_RX_INTR(pAC,1);
+ ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
+ SK_PNMI_CNT_RX_INTR(pAC, 1);
}
#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1) {
+ if (IntSrc & IS_XA1_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF AS TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC,0);
+ SK_PNMI_CNT_TX_INTR(pAC, 0);
spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
}
- if (IntSrc & IRQ_EOF_AS_TX2) {
+ if (IntSrc & IS_XA2_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF AS TX2 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC,1);
+ SK_PNMI_CNT_TX_INTR(pAC, 1);
spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
}
#if 0 /* only if sync. queues used */
- if (IntSrc & IRQ_EOF_SY_TX1) {
+ if (IntSrc & IS_XS1_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF SY TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC,0);
+ SK_PNMI_CNT_TX_INTR(pAC, 1);
spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
}
- if (IntSrc & IRQ_EOF_SY_TX2) {
+ if (IntSrc & IS_XS2_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF SY TX2 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC,1);
+ SK_PNMI_CNT_TX_INTR(pAC, 1);
spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
}
-#endif /* 0 */
-#endif /* USE_TX_COMPLETE */
+#endif
+#endif
/* do all IO at once */
- if (IntSrc & IRQ_EOF_RX1)
+ if (IntSrc & IS_R1_F)
ClearAndStartRx(pAC, 0);
- if (IntSrc & IRQ_EOF_RX2)
+ if (IntSrc & IS_R2_F)
ClearAndStartRx(pAC, 1);
#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1)
+ if (IntSrc & IS_XA1_F)
ClearTxIrq(pAC, 0, TX_PRIO_LOW);
- if (IntSrc & IRQ_EOF_AS_TX2)
+ if (IntSrc & IS_XA2_F)
ClearTxIrq(pAC, 1, TX_PRIO_LOW);
#endif
SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
} /* while (IntSrc & IRQ_MASK != 0) */
+ IntSrc &= pAC->GIni.GIValIrqMask;
if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
- ("SPECIAL IRQ\n"));
+ ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
pAC->CheckQueue = SK_FALSE;
spin_lock(&pAC->SlowPathLock);
if (IntSrc & SPECIAL_IRQS)
SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
+
SkEventDispatcher(pAC, pAC->IoBase);
spin_unlock(&pAC->SlowPathLock);
}
/*
- * do it all again is case we cleared an interrupt that
+ * do it all again is case we cleared an interrupt that
* came in after handling the ring (OUTs may be delayed
* in hardware buffers, but are through after IN)
+ *
+ * rroesler: has been commented out and shifted to
+ * SkGeDrvEvent(), because it is timer
+ * guarded now
+ *
+ ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
+ ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
*/
- // ReceiveIrq(pAC, &pAC->RxPort[pAC->ActivePort]);
- ReceiveIrq(pAC, &pAC->RxPort[0]);
- ReceiveIrq(pAC, &pAC->RxPort[1]);
-
-
-
-#if 0
-// #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
- FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
-
- spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
- FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
- spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
-
-#if 0 /* only if sync. queues used */
- spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
- FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
-
- spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
- FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
- spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
-#endif /* 0 */
-#endif /* USE_TX_COMPLETE */
+ if (pAC->CheckQueue) {
+ pAC->CheckQueue = SK_FALSE;
+ spin_lock(&pAC->SlowPathLock);
+ SkEventDispatcher(pAC, pAC->IoBase);
+ spin_unlock(&pAC->SlowPathLock);
+ }
/* IRQ is processed - Enable IRQs again*/
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
+ SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
- return IRQ_HANDLED;
+ return SkIsrRetHandled;
} /* SkGeIsr */
@@ -1342,9 +1668,9 @@
* Returns: N/A
*
*/
-static irqreturn_t SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
+static SkIsrRetVar SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
{
-struct net_device *dev = (struct net_device *)dev_id;
+struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
DEV_NET *pNet;
SK_AC *pAC;
SK_U32 IntSrc; /* interrupts source register contents */
@@ -1357,93 +1683,86 @@
*/
SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
if (IntSrc == 0) {
- return IRQ_NONE;
+ return SkIsrRetNone;
}
-
+
while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
#if 0 /* software irq currently not used */
- if (IntSrc & IRQ_SW) {
+ if (IntSrc & IS_IRQ_SW) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("Software IRQ\n"));
}
#endif
- if (IntSrc & IRQ_EOF_RX1) {
+ if (IntSrc & IS_R1_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF RX1 IRQ\n"));
- ReceiveIrq(pAC, &pAC->RxPort[0]);
- SK_PNMI_CNT_RX_INTR(pAC,0);
+ ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
+ SK_PNMI_CNT_RX_INTR(pAC, 0);
}
#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1) {
+ if (IntSrc & IS_XA1_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF AS TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC,0);
+ SK_PNMI_CNT_TX_INTR(pAC, 0);
spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
}
#if 0 /* only if sync. queues used */
- if (IntSrc & IRQ_EOF_SY_TX1) {
+ if (IntSrc & IS_XS1_F) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_INT_SRC,
("EOF SY TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC,1);
+ SK_PNMI_CNT_TX_INTR(pAC, 0);
spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
}
-#endif /* 0 */
-#endif /* USE_TX_COMPLETE */
+#endif
+#endif
/* do all IO at once */
- if (IntSrc & IRQ_EOF_RX1)
+ if (IntSrc & IS_R1_F)
ClearAndStartRx(pAC, 0);
#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1)
+ if (IntSrc & IS_XA1_F)
ClearTxIrq(pAC, 0, TX_PRIO_LOW);
#endif
SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
} /* while (IntSrc & IRQ_MASK != 0) */
+ IntSrc &= pAC->GIni.GIValIrqMask;
if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
- ("SPECIAL IRQ\n"));
+ ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
pAC->CheckQueue = SK_FALSE;
spin_lock(&pAC->SlowPathLock);
if (IntSrc & SPECIAL_IRQS)
SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
+
SkEventDispatcher(pAC, pAC->IoBase);
spin_unlock(&pAC->SlowPathLock);
}
/*
- * do it all again is case we cleared an interrupt that
+ * do it all again is case we cleared an interrupt that
* came in after handling the ring (OUTs may be delayed
* in hardware buffers, but are through after IN)
+ *
+ * rroesler: has been commented out and shifted to
+ * SkGeDrvEvent(), because it is timer
+ * guarded now
+ *
+ ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
*/
- ReceiveIrq(pAC, &pAC->RxPort[0]);
-
-#if 0
-// #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
- FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
-
-#if 0 /* only if sync. queues used */
- spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
- FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
-
-#endif /* 0 */
-#endif /* USE_TX_COMPLETE */
/* IRQ is processed - Enable IRQs again*/
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
+ SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
- return IRQ_HANDLED;
+ return SkIsrRetHandled;
} /* SkGeIsrOnePort */
@@ -1464,13 +1783,13 @@
* != 0 on error
*/
static int SkGeOpen(
-struct net_device *dev)
+struct SK_NET_DEVICE *dev)
{
-DEV_NET *pNet;
-SK_AC *pAC;
-unsigned long Flags; /* for spin lock */
-int i;
-SK_EVPARA EvPara; /* an event parameter union */
+ DEV_NET *pNet;
+ SK_AC *pAC;
+ unsigned long Flags; /* for spin lock */
+ int i;
+ SK_EVPARA EvPara; /* an event parameter union */
pNet = (DEV_NET*) dev->priv;
pAC = pNet->pAC;
@@ -1478,32 +1797,41 @@
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
- if (pAC->BoardLevel == 0) {
+
+ /* Set blink mode */
+ if (pAC->PciDev->vendor == 0x1186)
+ pAC->GIni.GILedBlinkCtrl = OEM_CONFIG_VALUE;
+
+ if (pAC->BoardLevel == SK_INIT_DATA) {
/* level 1 init common modules here */
- if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
- printk("%s: HWInit(1) failed\n", pAC->dev[pNet->PortNr]->name);
+ if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
+ printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
return (-1);
}
- SkI2cInit (pAC, pAC->IoBase, 1);
- SkEventInit (pAC, pAC->IoBase, 1);
- SkPnmiInit (pAC, pAC->IoBase, 1);
- SkAddrInit (pAC, pAC->IoBase, 1);
- SkRlmtInit (pAC, pAC->IoBase, 1);
- SkTimerInit (pAC, pAC->IoBase, 1);
- pAC->BoardLevel = 1;
- }
-
- if (pAC->BoardLevel != 2) {
- /* level 2 init modules here */
- SkGeInit (pAC, pAC->IoBase, 2);
- SkI2cInit (pAC, pAC->IoBase, 2);
- SkEventInit (pAC, pAC->IoBase, 2);
- SkPnmiInit (pAC, pAC->IoBase, 2);
- SkAddrInit (pAC, pAC->IoBase, 2);
- SkRlmtInit (pAC, pAC->IoBase, 2);
- SkTimerInit (pAC, pAC->IoBase, 2);
- pAC->BoardLevel = 2;
+ SkI2cInit (pAC, pAC->IoBase, SK_INIT_IO);
+ SkEventInit (pAC, pAC->IoBase, SK_INIT_IO);
+ SkPnmiInit (pAC, pAC->IoBase, SK_INIT_IO);
+ SkAddrInit (pAC, pAC->IoBase, SK_INIT_IO);
+ SkRlmtInit (pAC, pAC->IoBase, SK_INIT_IO);
+ SkTimerInit (pAC, pAC->IoBase, SK_INIT_IO);
+ pAC->BoardLevel = SK_INIT_IO;
}
+
+ if (pAC->BoardLevel != SK_INIT_RUN) {
+ /* tschilling: Level 2 init modules here, check return value. */
+ if (SkGeInit(pAC, pAC->IoBase, SK_INIT_RUN) != 0) {
+ printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
+ return (-1);
+ }
+ SkI2cInit (pAC, pAC->IoBase, SK_INIT_RUN);
+ SkEventInit (pAC, pAC->IoBase, SK_INIT_RUN);
+ SkPnmiInit (pAC, pAC->IoBase, SK_INIT_RUN);
+ SkAddrInit (pAC, pAC->IoBase, SK_INIT_RUN);
+ SkRlmtInit (pAC, pAC->IoBase, SK_INIT_RUN);
+ SkTimerInit (pAC, pAC->IoBase, SK_INIT_RUN);
+ pAC->BoardLevel = SK_INIT_RUN;
+ }
+
for (i=0; i<pAC->GIni.GIMacsFound; i++) {
/* Enable transmit descriptor polling. */
SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
@@ -1511,20 +1839,14 @@
}
SkGeYellowLED(pAC, pAC->IoBase, 1);
-#ifdef USE_INT_MOD
-/* moderate only TX complete interrupts (these are not time critical) */
-#define IRQ_MOD_MASK (IRQ_EOF_AS_TX1 | IRQ_EOF_AS_TX2)
- {
- unsigned long ModBase;
- ModBase = 53125000 / INTS_PER_SEC;
- SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
- SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
- SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
- }
-#endif
+ StartDrvCleanupTimer(pAC);
+ SkDimEnableModerationIfNeeded(pAC);
+ SkDimDisplayModerationSettings(pAC);
+
+ pAC->GIni.GIValIrqMask &= IRQ_MASK;
/* enable Interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
+ SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
@@ -1549,6 +1871,8 @@
pAC->MaxPorts++;
pNet->Up = 1;
+ try_module_get(THIS_MODULE);
+
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeOpen suceeded\n"));
@@ -1568,18 +1892,17 @@
* error code - on error
*/
static int SkGeClose(
-struct net_device *dev)
+struct SK_NET_DEVICE *dev)
{
-DEV_NET *pNet;
-SK_AC *pAC;
+ DEV_NET *pNet;
+ SK_AC *pAC;
-unsigned long Flags; /* for spin lock */
-int i;
-int PortIdx;
-SK_EVPARA EvPara;
+ unsigned long Flags; /* for spin lock */
+ int i;
+ int PortIdx;
+ SK_EVPARA EvPara;
netif_stop_queue(dev);
-
pNet = (DEV_NET*) dev->priv;
pAC = pNet->pAC;
@@ -1591,10 +1914,11 @@
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
- /*
+ StopDrvCleanupTimer(pAC);
+
+ /*
* Clear multicast table, promiscuous mode ....
*/
-
SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
SK_PROM_MODE_NONE);
@@ -1610,7 +1934,7 @@
SK_OUT32(pAC->IoBase, B0_IMSK, 0);
/* stop the hardware */
SkGeDeInit(pAC, pAC->IoBase);
- pAC->BoardLevel = 0;
+ pAC->BoardLevel = SK_INIT_DATA;
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
} else {
@@ -1624,21 +1948,22 @@
/* Stop port */
spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
[TX_PRIO_LOW].TxDesRingLock, Flags);
- SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
+ SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
SK_STOP_ALL, SK_HARD_RST);
spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
[TX_PRIO_LOW].TxDesRingLock, Flags);
}
+
if (pAC->RlmtNets == 1) {
/* clear all descriptor rings */
for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- ReceiveIrq(pAC, &pAC->RxPort[i]);
+ ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
ClearRxRing(pAC, &pAC->RxPort[i]);
ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
}
} else {
/* clear port descriptor rings */
- ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr]);
+ ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
}
@@ -1648,10 +1973,12 @@
pAC->MaxPorts--;
pNet->Up = 0;
-
+
+ module_put(THIS_MODULE);
return (0);
} /* SkGeClose */
+
/*****************************************************************************
*
* SkGeXmit - Linux frame transmit function
@@ -1667,23 +1994,47 @@
* WARNING: returning 1 in 'tbusy' case caused system crashes (double
* allocated skb's) !!!
*/
-static int SkGeXmit(struct sk_buff *skb, struct net_device *dev)
+static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
{
DEV_NET *pNet;
SK_AC *pAC;
int Rc; /* return code of XmitFrame */
-
+
pNet = (DEV_NET*) dev->priv;
pAC = pNet->pAC;
- if (pAC->RlmtNets == 2)
- Rc = XmitFrame(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW], skb);
- else
- Rc = XmitFrame(pAC, &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW], skb);
+ if ((!skb_shinfo(skb)->nr_frags) ||
+ (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
+ /* Don't activate scatter-gather and hardware checksum */
+
+ if (pAC->RlmtNets == 2)
+ Rc = XmitFrame(
+ pAC,
+ &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
+ skb);
+ else
+ Rc = XmitFrame(
+ pAC,
+ &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
+ skb);
+ } else {
+ /* scatter-gather and hardware TCP checksumming anabled*/
+ if (pAC->RlmtNets == 2)
+ Rc = XmitFrameSG(
+ pAC,
+ &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
+ skb);
+ else
+ Rc = XmitFrameSG(
+ pAC,
+ &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
+ skb);
+ }
/* Transmitter out of resources? */
- if (Rc <= 0)
+ if (Rc <= 0) {
netif_stop_queue(dev);
+ }
/* If not taken, give buffer ownership back to the
* queueing layer.
@@ -1713,28 +2064,35 @@
* if necessary.
*
* Returns:
- * > 0 - on succes: the number of bytes in the message
- * = 0 - on resource shortage: this frame sent or dropped, now
- * the ring is full ( -> set tbusy)
- * < 0 - on failure: other problems ( -> return failure to upper layers)
+ * > 0 - on succes: the number of bytes in the message
+ * = 0 - on resource shortage: this frame sent or dropped, now
+ * the ring is full ( -> set tbusy)
+ * < 0 - on failure: other problems ( -> return failure to upper layers)
*/
static int XmitFrame(
-SK_AC *pAC, /* pointer to adapter context */
+SK_AC *pAC, /* pointer to adapter context */
TX_PORT *pTxPort, /* pointer to struct of port to send to */
-struct sk_buff *pMessage) /* pointer to send-message */
+struct sk_buff *pMessage) /* pointer to send-message */
{
-TXD *pTxd; /* the rxd to fill */
-unsigned long Flags;
-SK_U64 PhysAddr;
-int BytesSend;
+ TXD *pTxd; /* the rxd to fill */
+ TXD *pOldTxd;
+ unsigned long Flags;
+ SK_U64 PhysAddr;
+ int Protocol;
+ int IpHeaderLength;
+ int BytesSend = pMessage->len;
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("X"));
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS, ("X"));
spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
-
+#ifndef USE_TX_COMPLETE
+ FreeTxDescriptors(pAC, pTxPort);
+#endif
if (pTxPort->TxdRingFree == 0) {
- /* no enough free descriptors in ring at the moment */
+ /*
+ ** no enough free descriptors in ring at the moment.
+ ** Maybe free'ing some old one help?
+ */
FreeTxDescriptors(pAC, pTxPort);
if (pTxPort->TxdRingFree == 0) {
spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
@@ -1742,63 +2100,279 @@
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_TX_PROGRESS,
("XmitFrame failed\n"));
- /* this message can not be sent now */
+ /*
+ ** the desired message can not be sent
+ ** Because tbusy seems to be set, the message
+ ** should not be freed here. It will be used
+ ** by the scheduler of the ethernet handler
+ */
return (-1);
}
}
- /* advance head counter behind descriptor needed for this frame */
+
+ /*
+ ** If the passed socket buffer is of smaller MTU-size than 60,
+ ** copy everything into new buffer and fill all bytes between
+ ** the original packet end and the new packet end of 60 with 0x00.
+ ** This is to resolve faulty padding by the HW with 0xaa bytes.
+ */
+ if (BytesSend < C_LEN_ETHERNET_MINSIZE) {
+ skb_put(pMessage, (C_LEN_ETHERNET_MINSIZE-BytesSend));
+ memset( ((void *)(pMessage->data))+BytesSend,
+ 0, C_LEN_ETHERNET_MINSIZE-BytesSend);
+ }
+
+ /*
+ ** advance head counter behind descriptor needed for this frame,
+ ** so that needed descriptor is reserved from that on. The next
+ ** action will be to add the passed buffer to the TX-descriptor
+ */
pTxd = pTxPort->pTxdRingHead;
pTxPort->pTxdRingHead = pTxd->pNextTxd;
pTxPort->TxdRingFree--;
- /* the needed descriptor is reserved now */
-
- /*
- * everything allocated ok, so add buffer to descriptor
- */
#ifdef SK_DUMP_TX
DumpMsg(pMessage, "XmitFrame");
#endif
- /* set up descriptor and CONTROL dword */
- PhysAddr = (SK_U64) pci_map_page(&pAC->PciDev,
- virt_to_page(pMessage->data),
- ((unsigned long) pMessage->data &
- ~PAGE_MASK),
- pMessage->len,
- PCI_DMA_TODEVICE);
- pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
+ /*
+ ** First step is to map the data to be sent via the adapter onto
+ ** the DMA memory. Kernel 2.2 uses virt_to_bus(), but kernels 2.4
+ ** and 2.6 need to use pci_map_page() for that mapping.
+ */
+ PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
+ virt_to_page(pMessage->data),
+ ((unsigned long) pMessage->data & ~PAGE_MASK),
+ pMessage->len,
+ PCI_DMA_TODEVICE);
+ pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
- pTxd->pMBuf = pMessage;
- pTxd->TBControl = TX_CTRL_OWN_BMU | TX_CTRL_STF |
- TX_CTRL_CHECK_DEFAULT | TX_CTRL_SOFTWARE |
+ pTxd->pMBuf = pMessage;
+
+ if (pMessage->ip_summed == CHECKSUM_HW) {
+ Protocol = ((SK_U8)pMessage->data[C_OFFSET_IPPROTO] & 0xf);
+ if ((Protocol == C_PROTO_ID_TCP) && (pAC->GIni.GIChipRev != 0)) {
+ pTxd->TBControl = BMU_UDP_CHECK;
+ } else {
+ pTxd->TBControl = BMU_TCP_CHECK ;
+ }
+
+ IpHeaderLength = (SK_U8)pMessage->data[C_OFFSET_IPHEADER];
+ IpHeaderLength = (IpHeaderLength & 0xf) * 4;
+ pTxd->TcpSumOfs = 0; /* PH-Checksum already calculated */
+ pTxd->TcpSumSt = C_LEN_ETHERMAC_HEADER + IpHeaderLength +
+ C_OFFSET_TCPHEADER_TCPCS;
+ pTxd->TcpSumWr = C_LEN_ETHERMAC_HEADER + IpHeaderLength;
+
+ pTxd->TBControl |= BMU_OWN | BMU_STF |
+ BMU_SW | BMU_EOF |
#ifdef USE_TX_COMPLETE
- TX_CTRL_EOF | TX_CTRL_EOF_IRQ | pMessage->len;
-#else
- TX_CTRL_EOF | pMessage->len;
+ BMU_IRQ_EOF |
#endif
-
- if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
- /* previous descriptor already done, so give tx start cmd */
- /* StartTx(pAC, pTxPort->HwAddr); */
- SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
+ pMessage->len;
+ } else {
+ pTxd->TBControl = BMU_OWN | BMU_STF | BMU_CHECK |
+ BMU_SW | BMU_EOF |
+#ifdef USE_TX_COMPLETE
+ BMU_IRQ_EOF |
+#endif
+ pMessage->len;
}
- pTxPort->pTxdRingPrev = pTxd;
-
-
- BytesSend = pMessage->len;
- /* after releasing the lock, the skb may be immidiately freed */
+
+ /*
+ ** If previous descriptor already done, give TX start cmd
+ */
+ pOldTxd = xchg(&pTxPort->pTxdRingPrev, pTxd);
+ if ((pOldTxd->TBControl & BMU_OWN) == 0) {
+ SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
+ }
+
+ /*
+ ** after releasing the lock, the skb may immediately be free'd
+ */
+ spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
if (pTxPort->TxdRingFree != 0) {
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
return (BytesSend);
- }
- else {
- /* ring full: set tbusy on return */
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
+ } else {
return (0);
}
+
} /* XmitFrame */
+/*****************************************************************************
+ *
+ * XmitFrameSG - fill one socket buffer into the transmit ring
+ * (use SG and TCP/UDP hardware checksumming)
+ *
+ * Description:
+ * This function puts a message into the transmit descriptor ring
+ * if there is a descriptors left.
+ *
+ * Returns:
+ * > 0 - on succes: the number of bytes in the message
+ * = 0 - on resource shortage: this frame sent or dropped, now
+ * the ring is full ( -> set tbusy)
+ * < 0 - on failure: other problems ( -> return failure to upper layers)
+ */
+static int XmitFrameSG(
+SK_AC *pAC, /* pointer to adapter context */
+TX_PORT *pTxPort, /* pointer to struct of port to send to */
+struct sk_buff *pMessage) /* pointer to send-message */
+{
+
+ TXD *pTxd;
+ TXD *pTxdFst;
+ TXD *pTxdLst;
+ int CurrFrag;
+ int BytesSend;
+ int IpHeaderLength;
+ int Protocol;
+ skb_frag_t *sk_frag;
+ SK_U64 PhysAddr;
+ unsigned long Flags;
+
+ spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
+#ifndef USE_TX_COMPLETE
+ FreeTxDescriptors(pAC, pTxPort);
+#endif
+ if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
+ FreeTxDescriptors(pAC, pTxPort);
+ if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
+ spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
+ SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+ SK_DBGCAT_DRV_TX_PROGRESS,
+ ("XmitFrameSG failed - Ring full\n"));
+ /* this message can not be sent now */
+ return(-1);
+ }
+ }
+
+ pTxd = pTxPort->pTxdRingHead;
+ pTxdFst = pTxd;
+ pTxdLst = pTxd;
+ BytesSend = 0;
+ Protocol = 0;
+
+ /*
+ ** Map the first fragment (header) into the DMA-space
+ */
+ PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
+ virt_to_page(pMessage->data),
+ ((unsigned long) pMessage->data & ~PAGE_MASK),
+ skb_headlen(pMessage),
+ PCI_DMA_TODEVICE);
+
+ pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
+ pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
+
+ /*
+ ** Does the HW need to evaluate checksum for TCP or UDP packets?
+ */
+ if (pMessage->ip_summed == CHECKSUM_HW) {
+ pTxd->TBControl = BMU_STF | BMU_STFWD | skb_headlen(pMessage);
+ /*
+ ** We have to use the opcode for tcp here, because the
+ ** opcode for udp is not working in the hardware yet
+ ** (Revision 2.0)
+ */
+ Protocol = ((SK_U8)pMessage->data[C_OFFSET_IPPROTO] & 0xf);
+ if ((Protocol == C_PROTO_ID_TCP) && (pAC->GIni.GIChipRev != 0)) {
+ pTxd->TBControl |= BMU_UDP_CHECK;
+ } else {
+ pTxd->TBControl |= BMU_TCP_CHECK ;
+ }
+
+ IpHeaderLength = ((SK_U8)pMessage->data[C_OFFSET_IPHEADER] & 0xf)*4;
+ pTxd->TcpSumOfs = 0; /* PH-Checksum already claculated */
+ pTxd->TcpSumSt = C_LEN_ETHERMAC_HEADER + IpHeaderLength +
+ C_OFFSET_TCPHEADER_TCPCS;
+ pTxd->TcpSumWr = C_LEN_ETHERMAC_HEADER + IpHeaderLength;
+ } else {
+ pTxd->TBControl = BMU_CHECK | BMU_SW | BMU_STF |
+ skb_headlen(pMessage);
+ }
+
+ pTxd = pTxd->pNextTxd;
+ pTxPort->TxdRingFree--;
+ BytesSend += skb_headlen(pMessage);
+
+ /*
+ ** Browse over all SG fragments and map each of them into the DMA space
+ */
+ for (CurrFrag = 0; CurrFrag < skb_shinfo(pMessage)->nr_frags; CurrFrag++) {
+ sk_frag = &skb_shinfo(pMessage)->frags[CurrFrag];
+ /*
+ ** we already have the proper value in entry
+ */
+ PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
+ sk_frag->page,
+ sk_frag->page_offset,
+ sk_frag->size,
+ PCI_DMA_TODEVICE);
+
+ pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
+ pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
+ pTxd->pMBuf = pMessage;
+
+ /*
+ ** Does the HW need to evaluate checksum for TCP or UDP packets?
+ */
+ if (pMessage->ip_summed == CHECKSUM_HW) {
+ pTxd->TBControl = BMU_OWN | BMU_SW | BMU_STFWD;
+ /*
+ ** We have to use the opcode for tcp here because the
+ ** opcode for udp is not working in the hardware yet
+ ** (revision 2.0)
+ */
+ if ( (Protocol == C_PROTO_ID_TCP) &&
+ (pAC->GIni.GIChipRev != 0) ) {
+ pTxd->TBControl |= BMU_UDP_CHECK ;
+ } else {
+ pTxd->TBControl |= BMU_TCP_CHECK ;
+ }
+ } else {
+ pTxd->TBControl = BMU_CHECK | BMU_SW | BMU_OWN;
+ }
+
+ /*
+ ** Do we have the last fragment?
+ */
+ if( (CurrFrag+1) == skb_shinfo(pMessage)->nr_frags ) {
+#ifdef USE_TX_COMPLETE
+ pTxd->TBControl |= BMU_EOF | BMU_IRQ_EOF | sk_frag->size;
+#else
+ pTxd->TBControl |= BMU_EOF | sk_frag->size;
+#endif
+ pTxdFst->TBControl |= BMU_OWN | BMU_SW;
+
+ } else {
+ pTxd->TBControl |= sk_frag->size;
+ }
+ pTxdLst = pTxd;
+ pTxd = pTxd->pNextTxd;
+ pTxPort->TxdRingFree--;
+ BytesSend += sk_frag->size;
+ }
+
+ /*
+ ** If previous descriptor already done, give TX start cmd
+ */
+ if ((pTxPort->pTxdRingPrev->TBControl & BMU_OWN) == 0) {
+ SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
+ }
+
+ pTxPort->pTxdRingPrev = pTxdLst;
+ pTxPort->pTxdRingHead = pTxd;
+
+ spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
+
+ if (pTxPort->TxdRingFree > 0) {
+ return (BytesSend);
+ } else {
+ return (0);
+ }
+}
/*****************************************************************************
*
@@ -1828,49 +2402,52 @@
SK_U64 PhysAddr; /* address of DMA mapping */
pNewTail = pTxPort->pTxdRingTail;
- pTxd = pNewTail;
-
- /*
- * loop forever; exits if TX_CTRL_SOFTWARE bit not set in start frame
- * or TX_CTRL_OWN_BMU bit set in any frame
- */
+ pTxd = pNewTail;
+ /*
+ ** loop forever; exits if BMU_SW bit not set in start frame
+ ** or BMU_OWN bit set in any frame
+ */
while (1) {
Control = pTxd->TBControl;
- if ((Control & TX_CTRL_SOFTWARE) == 0) {
- /*
- * software controllable bit is set in first
- * fragment when given to BMU. Not set means that
- * this fragment was never sent or is already
- * freed ( -> ring completely free now).
- */
+ if ((Control & BMU_SW) == 0) {
+ /*
+ ** software controllable bit is set in first
+ ** fragment when given to BMU. Not set means that
+ ** this fragment was never sent or is already
+ ** freed ( -> ring completely free now).
+ */
pTxPort->pTxdRingTail = pTxd;
- netif_start_queue(pAC->dev[pTxPort->PortIndex]);
+ netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
return;
}
- if (Control & TX_CTRL_OWN_BMU) {
+ if (Control & BMU_OWN) {
pTxPort->pTxdRingTail = pTxd;
if (pTxPort->TxdRingFree > 0) {
- netif_start_queue(pAC->dev[pTxPort->PortIndex]);
+ netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
}
return;
}
- /* release the DMA mapping */
+ /*
+ ** release the DMA mapping, because until not unmapped
+ ** this buffer is considered being under control of the
+ ** adapter card!
+ */
PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
PhysAddr |= (SK_U64) pTxd->VDataLow;
- pci_unmap_page(&pAC->PciDev, PhysAddr,
- pTxd->pMBuf->len,
- PCI_DMA_TODEVICE);
+ pci_unmap_page(pAC->PciDev, PhysAddr,
+ pTxd->pMBuf->len,
+ PCI_DMA_TODEVICE);
+
+ if (Control & BMU_EOF)
+ DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
- /* free message */
- DEV_KFREE_SKB_ANY(pTxd->pMBuf);
pTxPort->TxdRingFree++;
- pTxd->TBControl &= ~TX_CTRL_SOFTWARE;
+ pTxd->TBControl &= ~BMU_SW;
pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
} /* while(forever) */
} /* FreeTxDescriptors */
-
/*****************************************************************************
*
* FillRxRing - fill the receive ring with valid descriptors
@@ -1939,17 +2516,21 @@
pRxPort->pRxdRingTail = pRxd->pNextRxd;
pRxPort->RxdRingFree--;
Length = pAC->RxBufSize;
- PhysAddr = (SK_U64) pci_map_page(&pAC->PciDev,
- virt_to_page(pMsgBlock->data),
- ((unsigned long) pMsgBlock->data &
- ~PAGE_MASK),
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
- pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
+ PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
+ virt_to_page(pMsgBlock->data),
+ ((unsigned long) pMsgBlock->data &
+ ~PAGE_MASK),
+ pAC->RxBufSize - 2,
+ PCI_DMA_FROMDEVICE);
+
+ pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
- pRxd->pMBuf = pMsgBlock;
- pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
- RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
+ pRxd->pMBuf = pMsgBlock;
+ pRxd->RBControl = BMU_OWN |
+ BMU_STF |
+ BMU_IRQ_EOF |
+ BMU_TCP_CHECK |
+ Length;
return (SK_TRUE);
} /* FillRxDescriptor */
@@ -1980,15 +2561,18 @@
pRxPort->pRxdRingTail = pRxd->pNextRxd;
pRxPort->RxdRingFree--;
Length = pAC->RxBufSize;
- pRxd->VDataLow = PhysLow;
+
+ pRxd->VDataLow = PhysLow;
pRxd->VDataHigh = PhysHigh;
- pRxd->pMBuf = pMsg;
- pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
- RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
+ pRxd->pMBuf = pMsg;
+ pRxd->RBControl = BMU_OWN |
+ BMU_STF |
+ BMU_IRQ_EOF |
+ BMU_TCP_CHECK |
+ Length;
return;
} /* ReQueueRxBuffer */
-
/*****************************************************************************
*
* ReceiveIrq - handle a receive IRQ
@@ -2001,31 +2585,36 @@
* Returns: N/A
*/
static void ReceiveIrq(
-SK_AC *pAC, /* pointer to adapter context */
-RX_PORT *pRxPort) /* pointer to receive port struct */
-{
-RXD *pRxd; /* pointer to receive descriptors */
-SK_U32 Control; /* control field of descriptor */
-struct sk_buff *pMsg; /* pointer to message holding frame */
-struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
-int FrameLength; /* total length of received frame */
-SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
-SK_EVPARA EvPara; /* an event parameter union */
-int PortIndex = pRxPort->PortIndex;
+ SK_AC *pAC, /* pointer to adapter context */
+ RX_PORT *pRxPort, /* pointer to receive port struct */
+ SK_BOOL SlowPathLock) /* indicates if SlowPathLock is needed */
+{
+RXD *pRxd; /* pointer to receive descriptors */
+SK_U32 Control; /* control field of descriptor */
+struct sk_buff *pMsg; /* pointer to message holding frame */
+struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
+int FrameLength; /* total length of received frame */
+int IpFrameLength;
+SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
+SK_EVPARA EvPara; /* an event parameter union */
+unsigned long Flags; /* for spin lock */
+int PortIndex = pRxPort->PortIndex;
unsigned int Offset;
unsigned int NumBytes;
unsigned int ForRlmt;
-SK_BOOL IsBc;
-SK_BOOL IsMc;
-SK_U32 FrameStat;
+SK_BOOL IsBc;
+SK_BOOL IsMc;
+SK_BOOL IsBadFrame; /* Bad frame */
+
+SK_U32 FrameStat;
unsigned short Csum1;
unsigned short Csum2;
unsigned short Type;
-int Result;
-SK_U64 PhysAddr;
+int Result;
+SK_U64 PhysAddr;
rx_start:
- /* do forever; exit if RX_CTRL_OWN_BMU found */
+ /* do forever; exit if BMU_OWN found */
for ( pRxd = pRxPort->pRxdRingHead ;
pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
pRxd = pRxd->pNextRxd,
@@ -2033,8 +2622,8 @@
pRxPort->RxdRingFree ++) {
/*
- * For a better understanding of this loop
- * Go through every descriptor beginning at the head
+ * For a better understanding of this loop
+ * Go through every descriptor beginning at the head
* Please note: the ring might be completely received so the OWN bit
* set is not a good crirteria to leave that loop.
* Therefore the RingFree counter is used.
@@ -2045,52 +2634,93 @@
Control = pRxd->RBControl;
/* check if this descriptor is ready */
- if ((Control & RX_CTRL_OWN_BMU) != 0) {
+ if ((Control & BMU_OWN) != 0) {
/* this descriptor is not yet ready */
/* This is the usual end of the loop */
/* We don't need to start the ring again */
FillRxRing(pAC, pRxPort);
return;
}
+ pAC->DynIrqModInfo.NbrProcessedDescr++;
/* get length of frame and check it */
- FrameLength = Control & RX_CTRL_LEN_MASK;
+ FrameLength = Control & BMU_BBC;
if (FrameLength > pAC->RxBufSize) {
goto rx_failed;
}
/* check for STF and EOF */
- if ((Control & (RX_CTRL_STF | RX_CTRL_EOF)) !=
- (RX_CTRL_STF | RX_CTRL_EOF)) {
+ if ((Control & (BMU_STF | BMU_EOF)) != (BMU_STF | BMU_EOF)) {
goto rx_failed;
}
-
+
/* here we have a complete frame in the ring */
pMsg = pRxd->pMBuf;
FrameStat = pRxd->FrameStat;
+
+ /* check for frame length mismatch */
+#define XMR_FS_LEN_SHIFT 18
+#define GMR_FS_LEN_SHIFT 16
+ if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
+ if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+ SK_DBGCAT_DRV_RX_PROGRESS,
+ ("skge: Frame length mismatch (%u/%u).\n",
+ FrameLength,
+ (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
+ goto rx_failed;
+ }
+ }
+ else {
+ if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+ SK_DBGCAT_DRV_RX_PROGRESS,
+ ("skge: Frame length mismatch (%u/%u).\n",
+ FrameLength,
+ (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
+ goto rx_failed;
+ }
+ }
+
+ /* Set Rx Status */
+ if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
+ IsBc = (FrameStat & XMR_FS_BC) != 0;
+ IsMc = (FrameStat & XMR_FS_MC) != 0;
+ IsBadFrame = (FrameStat &
+ (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
+ } else {
+ IsBc = (FrameStat & GMR_FS_BC) != 0;
+ IsMc = (FrameStat & GMR_FS_MC) != 0;
+ IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
+ ((FrameStat & GMR_FS_RX_OK) == 0));
+ }
+
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
("Received frame of length %d on port %d\n",
FrameLength, PortIndex));
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
("Number of free rx descriptors: %d\n",
pRxPort->RxdRingFree));
- /*DumpMsg(pMsg, "Rx"); */
-
- if ((Control & RX_CTRL_STAT_VALID) != RX_CTRL_STAT_VALID ||
+/* DumpMsg(pMsg, "Rx"); */
+
+ if ((Control & BMU_STAT_VAL) != BMU_STAT_VAL || (IsBadFrame)) {
+#if 0
(FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
+#endif
/* there is a receive error in this frame */
SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_RX_PROGRESS,
("skge: Error in received frame, dropped!\n"
"Control: %x\nRxStat: %x\n",
Control, FrameStat));
+
PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
PhysAddr |= (SK_U64) pRxd->VDataLow;
- pci_dma_sync_single(&pAC->PciDev,
- (dma_addr_t) PhysAddr,
- FrameLength,
- PCI_DMA_FROMDEVICE);
+ pci_dma_sync_single(pAC->PciDev,
+ (dma_addr_t) PhysAddr,
+ FrameLength,
+ PCI_DMA_FROMDEVICE);
ReQueueRxBuffer(pAC, pRxPort, pMsg,
pRxd->VDataHigh, pRxd->VDataLow);
@@ -2105,20 +2735,21 @@
/*
* Short frame detected and allocation successfull
*/
- PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
- PhysAddr |= (SK_U64) pRxd->VDataLow;
-
/* use new skb and copy data */
skb_reserve(pNewMsg, 2);
skb_put(pNewMsg, FrameLength);
- pci_dma_sync_single(&pAC->PciDev,
- (dma_addr_t) PhysAddr,
- FrameLength,
- PCI_DMA_FROMDEVICE);
+ PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
+ PhysAddr |= (SK_U64) pRxd->VDataLow;
+
+ pci_dma_sync_single(pAC->PciDev,
+ (dma_addr_t) PhysAddr,
+ FrameLength,
+ PCI_DMA_FROMDEVICE);
eth_copy_and_sum(pNewMsg, pMsg->data,
FrameLength, 0);
ReQueueRxBuffer(pAC, pRxPort, pMsg,
pRxd->VDataHigh, pRxd->VDataLow);
+
pMsg = pNewMsg;
}
@@ -2132,45 +2763,88 @@
PhysAddr |= (SK_U64) pRxd->VDataLow;
/* release the DMA mapping */
- pci_unmap_page(&pAC->PciDev,
- PhysAddr,
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
+ pci_unmap_single(pAC->PciDev,
+ PhysAddr,
+ pAC->RxBufSize - 2,
+ PCI_DMA_FROMDEVICE);
/* set length in message */
skb_put(pMsg, FrameLength);
/* hardware checksum */
Type = ntohs(*((short*)&pMsg->data[12]));
+
+#ifdef USE_SK_RX_CHECKSUM
if (Type == 0x800) {
Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
- if ((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) {
- Result = SkCsGetReceiveInfo(pAC,
- &pMsg->data[14],
- Csum1, Csum2, pRxPort->PortIndex);
- if (Result ==
- SKCS_STATUS_IP_FRAGMENT ||
- Result ==
- SKCS_STATUS_IP_CSUM_OK ||
- Result ==
- SKCS_STATUS_TCP_CSUM_OK ||
- Result ==
- SKCS_STATUS_UDP_CSUM_OK) {
- pMsg->ip_summed =
- CHECKSUM_UNNECESSARY;
- }
- } /* checksum calculation valid */
+ IpFrameLength = (int) ntohs((unsigned short)
+ ((unsigned short *) pMsg->data)[8]);
+
+ /*
+ * Test: If frame is padded, a check is not possible!
+ * Frame not padded? Length difference must be 14 (0xe)!
+ */
+ if ((FrameLength - IpFrameLength) != 0xe) {
+ /* Frame padded => TCP offload not possible! */
+ pMsg->ip_summed = CHECKSUM_NONE;
+ } else {
+ /* Frame not padded => TCP offload! */
+ if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
+ (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
+ (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
+ Result = SkCsGetReceiveInfo(pAC,
+ &pMsg->data[14],
+ Csum1, Csum2, pRxPort->PortIndex);
+ if (Result ==
+ SKCS_STATUS_IP_FRAGMENT ||
+ Result ==
+ SKCS_STATUS_IP_CSUM_OK ||
+ Result ==
+ SKCS_STATUS_TCP_CSUM_OK ||
+ Result ==
+ SKCS_STATUS_UDP_CSUM_OK) {
+ pMsg->ip_summed =
+ CHECKSUM_UNNECESSARY;
+ }
+ else if (Result ==
+ SKCS_STATUS_TCP_CSUM_ERROR ||
+ Result ==
+ SKCS_STATUS_UDP_CSUM_ERROR ||
+ Result ==
+ SKCS_STATUS_IP_CSUM_ERROR_UDP ||
+ Result ==
+ SKCS_STATUS_IP_CSUM_ERROR_TCP ||
+ Result ==
+ SKCS_STATUS_IP_CSUM_ERROR ) {
+ /* HW Checksum error */
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+ SK_DBGCAT_DRV_RX_PROGRESS,
+ ("skge: CRC error. Frame dropped!\n"));
+ goto rx_failed;
+ } else {
+ pMsg->ip_summed =
+ CHECKSUM_NONE;
+ }
+ }/* checksumControl calculation valid */
+ } /* Frame length check */
} /* IP frame */
+#else
+ pMsg->ip_summed = CHECKSUM_NONE;
+#endif
} /* frame > SK_COPY_TRESHOLD */
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
ForRlmt = SK_RLMT_RX_PROTOCOL;
+#if 0
IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
+#endif
SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
IsBc, &Offset, &NumBytes);
if (NumBytes != 0) {
+#if 0
IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
- SK_RLMT_LOOKAHEAD(pAC, PortIndex,
+#endif
+ SK_RLMT_LOOKAHEAD(pAC, PortIndex,
&pMsg->data[Offset],
IsBc, IsMc, &ForRlmt);
}
@@ -2195,7 +2869,7 @@
}
else {
/* drop frame */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_RX_PROGRESS,
("D"));
DEV_KFREE_SKB(pMsg);
@@ -2204,7 +2878,7 @@
} /* if not for rlmt */
else {
/* packet for rlmt */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
pAC->IoBase, FrameLength);
@@ -2216,18 +2890,30 @@
memcpy((char*)(pRlmtMbuf->pData),
(char*)(pMsg->data),
FrameLength);
- SkEventQueue(pAC, SKGE_RLMT,
- SK_RLMT_PACKET_RECEIVED,
- EvPara);
- pAC->CheckQueue = SK_TRUE;
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
+
+ /* SlowPathLock needed? */
+ if (SlowPathLock == SK_TRUE) {
+ spin_lock_irqsave(&pAC->SlowPathLock, Flags);
+ SkEventQueue(pAC, SKGE_RLMT,
+ SK_RLMT_PACKET_RECEIVED,
+ EvPara);
+ pAC->CheckQueue = SK_TRUE;
+ spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
+ } else {
+ SkEventQueue(pAC, SKGE_RLMT,
+ SK_RLMT_PACKET_RECEIVED,
+ EvPara);
+ pAC->CheckQueue = SK_TRUE;
+ }
+
+ SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
SK_DBGCAT_DRV_RX_PROGRESS,
("Q"));
}
- if ((pAC->dev[pRxPort->PortIndex]->flags &
+ if ((pAC->dev[pRxPort->PortIndex]->flags &
(IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
- (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
- SK_RLMT_RX_PROTOCOL) {
+ (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
+ SK_RLMT_RX_PROTOCOL) {
pMsg->dev = pAC->dev[pRxPort->PortIndex];
pMsg->protocol = eth_type_trans(pMsg,
pAC->dev[pRxPort->PortIndex]);
@@ -2244,7 +2930,7 @@
/* RXD ring is empty -> fill and restart */
FillRxRing(pAC, pRxPort);
/* do not start if called from Close */
- if (pAC->BoardLevel > 0) {
+ if (pAC->BoardLevel > SK_INIT_DATA) {
ClearAndStartRx(pAC, PortIndex);
}
return;
@@ -2255,12 +2941,13 @@
("Schrottdescriptor, length: 0x%x\n", FrameLength));
/* release the DMA mapping */
+
PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
PhysAddr |= (SK_U64) pRxd->VDataLow;
- pci_unmap_page(&pAC->PciDev,
- PhysAddr,
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
+ pci_unmap_page(pAC->PciDev,
+ PhysAddr,
+ pAC->RxBufSize - 2,
+ PCI_DMA_FROMDEVICE);
DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
pRxd->pMBuf = NULL;
pRxPort->RxdRingFree++;
@@ -2285,8 +2972,9 @@
SK_AC *pAC, /* pointer to the adapter context */
int PortIndex) /* index of the receive port (XMAC) */
{
- SK_OUT8(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CTRL,
- RX_Q_CTRL_START | RX_Q_CTRL_CLR_I_EOF);
+ SK_OUT8(pAC->IoBase,
+ RxQueueAddr[PortIndex]+Q_CSR,
+ CSR_START | CSR_IRQ_CL_F);
} /* ClearAndStartRx */
@@ -2305,8 +2993,9 @@
int PortIndex, /* index of the transmit port (XMAC) */
int Prio) /* priority or normal queue */
{
- SK_OUT8(pAC->IoBase, TxQueueAddr[PortIndex][Prio]+TX_Q_CTRL,
- TX_Q_CTRL_CLR_I_EOF);
+ SK_OUT8(pAC->IoBase,
+ TxQueueAddr[PortIndex][Prio]+Q_CSR,
+ CSR_IRQ_CL_F);
} /* ClearTxIrq */
@@ -2326,7 +3015,7 @@
{
RXD *pRxd; /* pointer to the current descriptor */
unsigned long Flags;
- SK_U64 PhysAddr;
+SK_U64 PhysAddr;
if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
return;
@@ -2335,16 +3024,17 @@
pRxd = pRxPort->pRxdRingHead;
do {
if (pRxd->pMBuf != NULL) {
+
PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
PhysAddr |= (SK_U64) pRxd->VDataLow;
- pci_unmap_page(&pAC->PciDev,
- PhysAddr,
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
+ pci_unmap_page(pAC->PciDev,
+ PhysAddr,
+ pAC->RxBufSize - 2,
+ PCI_DMA_FROMDEVICE);
DEV_KFREE_SKB(pRxd->pMBuf);
pRxd->pMBuf = NULL;
}
- pRxd->RBControl &= RX_CTRL_OWN_BMU;
+ pRxd->RBControl &= BMU_OWN;
pRxd = pRxd->pNextRxd;
pRxPort->RxdRingFree++;
} while (pRxd != pRxPort->pRxdRingTail);
@@ -2352,7 +3042,6 @@
spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
} /* ClearRxRing */
-
/*****************************************************************************
*
* ClearTxRing - remove all buffers from the transmit ring
@@ -2377,107 +3066,13 @@
spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
pTxd = pTxPort->pTxdRingHead;
for (i=0; i<pAC->TxDescrPerRing; i++) {
- pTxd->TBControl &= ~TX_CTRL_OWN_BMU;
+ pTxd->TBControl &= ~BMU_OWN;
pTxd = pTxd->pNextTxd;
}
FreeTxDescriptors(pAC, pTxPort);
spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
} /* ClearTxRing */
-
-/*****************************************************************************
- *
- * SetQueueSizes - configure the sizes of rx and tx queues
- *
- * Description:
- * This function assigns the sizes for active and passive port
- * to the appropriate HWinit structure variables.
- * The passive port(s) get standard values, all remaining RAM
- * is given to the active port.
- * The queue sizes are in kbyte and must be multiple of 8.
- * The limits for the number of buffers filled into the rx rings
- * is also set in this routine.
- *
- * Returns:
- * none
- */
-static void SetQueueSizes(
-SK_AC *pAC) /* pointer to the adapter context */
-{
-int StandbyRam; /* adapter RAM used for a standby port */
-int RemainingRam; /* adapter RAM available for the active port */
-int RxRam; /* RAM used for the active port receive queue */
-int i; /* loop counter */
-
-if (pAC->RlmtNets == 1) {
- StandbyRam = SK_RLMT_STANDBY_QRXSIZE + SK_RLMT_STANDBY_QXASIZE +
- SK_RLMT_STANDBY_QXSSIZE;
- RemainingRam = pAC->GIni.GIRamSize -
- (pAC->GIni.GIMacsFound-1) * StandbyRam;
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PRxQSize = SK_RLMT_STANDBY_QRXSIZE;
- pAC->GIni.GP[i].PXSQSize = SK_RLMT_STANDBY_QXSSIZE;
- pAC->GIni.GP[i].PXAQSize = SK_RLMT_STANDBY_QXASIZE;
- }
- RxRam = (RemainingRam * 8 / 10) & ~7;
- pAC->GIni.GP[pAC->ActivePort].PRxQSize = RxRam;
- pAC->GIni.GP[pAC->ActivePort].PXSQSize = 0;
- pAC->GIni.GP[pAC->ActivePort].PXAQSize =
- (RemainingRam - RxRam) & ~7;
- pAC->RxQueueSize = RxRam;
- pAC->TxSQueueSize = 0;
- pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("queue sizes settings - rx:%d txA:%d txS:%d\n",
- pAC->RxQueueSize,pAC->TxAQueueSize, pAC->TxSQueueSize));
-} else {
- RemainingRam = pAC->GIni.GIRamSize/pAC->GIni.GIMacsFound;
- RxRam = (RemainingRam * 8 / 10) & ~7;
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PRxQSize = RxRam;
- pAC->GIni.GP[i].PXSQSize = 0;
- pAC->GIni.GP[i].PXAQSize = (RemainingRam - RxRam) & ~7;
- }
-
- pAC->RxQueueSize = RxRam;
- pAC->TxSQueueSize = 0;
- pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
-}
- for (i=0; i<SK_MAX_MACS; i++) {
- pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing;
- }
-
- if (pAC->RlmtNets == 2) {
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
- }
- } else {
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
- }
- /*
- * Do not set the Limit to 0, because this could cause
- * wrap around with ReQueue'ed buffers (a buffer could
- * be requeued in the same position, made accessible to
- * the hardware, and the hardware could change its
- * contents!
- */
- pAC->RxPort[pAC->ActivePort].RxFillLimit = 1;
- }
-
-#ifdef DEBUG
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("i: %d, RxQSize: %d, PXSQsize: %d, PXAQSize: %d\n",
- i,
- pAC->GIni.GP[i].PRxQSize,
- pAC->GIni.GP[i].PXSQSize,
- pAC->GIni.GP[i].PXAQSize));
- }
-#endif
-} /* SetQueueSizes */
-
-
/*****************************************************************************
*
* SkGeSetMacAddr - Set the hardware MAC address
@@ -2489,7 +3084,7 @@
* 0, if everything is ok
* !=0, on error
*/
-static int SkGeSetMacAddr(struct net_device *dev, void *p)
+static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
{
DEV_NET *pNet = (DEV_NET*) dev->priv;
@@ -2497,12 +3092,12 @@
struct sockaddr *addr = p;
unsigned long Flags;
-
+
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeSetMacAddr starts now...\n"));
- if(netif_running(dev)) {
+ if(netif_running(dev))
return -EBUSY;
- }
+
memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
@@ -2535,7 +3130,7 @@
* 0, if everything is ok
* !=0, on error
*/
-static void SkGeSetRxMode(struct net_device *dev)
+static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
{
DEV_NET *pNet;
@@ -2589,7 +3184,6 @@
pMcList->dmi_addr[5]));
}
SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
-
}
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
@@ -2610,7 +3204,7 @@
* 0, if everything is ok
* !=0, on error
*/
-static int SkGeChangeMtu(struct net_device *dev, int NewMtu)
+static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
{
DEV_NET *pNet;
DEV_NET *pOtherNet;
@@ -2623,192 +3217,187 @@
("SkGeChangeMtu starts now...\n"));
pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
+ pAC = pNet->pAC;
if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
return -EINVAL;
}
+ if(pAC->BoardLevel != SK_INIT_RUN) {
+ return -EINVAL;
+ }
+
pNet->Mtu = NewMtu;
pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
- if ((pOtherNet->Mtu > 1500) && (NewMtu <= 1500) && (pOtherNet->Up==1)) {
+ if ((pOtherNet->Mtu>1500) && (NewMtu<=1500) && (pOtherNet->Up==1)) {
return(0);
}
- EvPara.Para32[0] = pNet->NetNr;
- EvPara.Para32[1] = -1;
-
pAC->RxBufSize = NewMtu + 32;
dev->mtu = NewMtu;
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("New MTU: %d\n", NewMtu));
- if(pAC->BoardLevel != 2) {
- return 0;
- }
-
- /* prevent reconfiguration while changing the MTU */
-
- /* disable interrupts */
+ /*
+ ** Prevent any reconfiguration while changing the MTU
+ ** by disabling any interrupts
+ */
SK_OUT32(pAC->IoBase, B0_IMSK, 0);
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- /* Stop both ports */
- EvPara.Para32[0] = 0;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- EvPara.Para32[0] = 1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
+ /*
+ ** Notify RLMT that any ports are to be stopped
+ */
+ EvPara.Para32[0] = 0;
+ EvPara.Para32[1] = -1;
+ if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
+ EvPara.Para32[0] = 1;
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
} else {
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
}
+ /*
+ ** After calling the SkEventDispatcher(), RLMT is aware about
+ ** the stopped ports -> configuration can take place!
+ */
SkEventDispatcher(pAC, pAC->IoBase);
for (i=0; i<pAC->GIni.GIMacsFound; i++) {
spin_lock_irqsave(
&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock, Flags);
netif_stop_queue(pAC->dev[i]);
+
}
- /*
- * adjust number of rx buffers allocated
- */
+ /*
+ ** Depending on the desired MTU size change, a different number of
+ ** RX buffers need to be allocated
+ */
if (NewMtu > 1500) {
- /* use less rx buffers */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 100;
- } else {
- if (i == pAC->ActivePort)
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 100;
- else
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 10;
- }
+ /*
+ ** Use less rx buffers
+ */
+ for (i=0; i<pAC->GIni.GIMacsFound; i++) {
+ if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
+ pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
+ (pAC->RxDescrPerRing / 4);
+ } else {
+ if (i == pAC->ActivePort) {
+ pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
+ (pAC->RxDescrPerRing / 4);
+ } else {
+ pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
+ (pAC->RxDescrPerRing / 10);
+ }
}
- }
- else {
- /* use normal anoumt of rx buffers */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- pAC->RxPort[i].RxFillLimit = 1;
- } else {
- if (i == pAC->ActivePort)
- pAC->RxPort[i].RxFillLimit = 1;
- else
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 100;
- }
+ }
+ } else {
+ /*
+ ** Use the normal amount of rx buffers
+ */
+ for (i=0; i<pAC->GIni.GIMacsFound; i++) {
+ if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
+ pAC->RxPort[i].RxFillLimit = 1;
+ } else {
+ if (i == pAC->ActivePort) {
+ pAC->RxPort[i].RxFillLimit = 1;
+ } else {
+ pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
+ (pAC->RxDescrPerRing / 4);
+ }
}
+ }
}
-
- SkGeDeInit(pAC, pAC->IoBase);
+
+ SkGeDeInit(pAC, pAC->IoBase);
- /*
- * enable/disable hardware support for long frames
- */
+ /*
+ ** enable/disable hardware support for long frames
+ */
if (NewMtu > 1500) {
-// pAC->JumboActivated = SK_TRUE; /* is never set back !!! */
+// pAC->JumboActivated = SK_TRUE; /* is never set back !!! */
pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PRxCmd =
- XM_RX_STRIP_FCS | XM_RX_LENERR_OK;
- }
- }
- else {
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- pAC->GIni.GIPortUsage = SK_MUL_LINK;
- } else {
- pAC->GIni.GIPortUsage = SK_RED_LINK;
- }
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PRxCmd = XM_RX_STRIP_FCS;
- }
+ } else {
+ if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
+ pAC->GIni.GIPortUsage = SK_MUL_LINK;
+ } else {
+ pAC->GIni.GIPortUsage = SK_RED_LINK;
+ }
}
- SkGeInit( pAC, pAC->IoBase, 1);
- SkI2cInit( pAC, pAC->IoBase, 1);
- SkEventInit(pAC, pAC->IoBase, 1);
- SkPnmiInit( pAC, pAC->IoBase, 1);
- SkAddrInit( pAC, pAC->IoBase, 1);
- SkRlmtInit( pAC, pAC->IoBase, 1);
- SkTimerInit(pAC, pAC->IoBase, 1);
+ SkGeInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkI2cInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
+ SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
+ SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
+
+ /*
+ ** tschilling:
+ ** Speed and others are set back to default in level 1 init!
+ */
+ GetConfiguration(pAC);
- SkGeInit( pAC, pAC->IoBase, 2);
- SkI2cInit( pAC, pAC->IoBase, 2);
- SkEventInit(pAC, pAC->IoBase, 2);
- SkPnmiInit( pAC, pAC->IoBase, 2);
- SkAddrInit( pAC, pAC->IoBase, 2);
- SkRlmtInit( pAC, pAC->IoBase, 2);
- SkTimerInit(pAC, pAC->IoBase, 2);
+ SkGeInit( pAC, pAC->IoBase, SK_INIT_RUN);
+ SkI2cInit( pAC, pAC->IoBase, SK_INIT_RUN);
+ SkEventInit(pAC, pAC->IoBase, SK_INIT_RUN);
+ SkPnmiInit( pAC, pAC->IoBase, SK_INIT_RUN);
+ SkAddrInit( pAC, pAC->IoBase, SK_INIT_RUN);
+ SkRlmtInit( pAC, pAC->IoBase, SK_INIT_RUN);
+ SkTimerInit(pAC, pAC->IoBase, SK_INIT_RUN);
- /*
- * clear and reinit the rx rings here
- */
+ /*
+ ** clear and reinit the rx rings here
+ */
for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- ReceiveIrq(pAC, &pAC->RxPort[i]);
+ ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
ClearRxRing(pAC, &pAC->RxPort[i]);
FillRxRing(pAC, &pAC->RxPort[i]);
- /* Enable transmit descriptor polling. */
+ /*
+ ** Enable transmit descriptor polling
+ */
SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
FillRxRing(pAC, &pAC->RxPort[i]);
};
SkGeYellowLED(pAC, pAC->IoBase, 1);
-
-#ifdef USE_INT_MOD
- {
- unsigned long ModBase;
- ModBase = 53125000 / INTS_PER_SEC;
- SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
- SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
- SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
- }
-#endif
+ SkDimEnableModerationIfNeeded(pAC);
+ SkDimDisplayModerationSettings(pAC);
netif_start_queue(pAC->dev[pNet->PortNr]);
for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
}
- /* enable Interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
+ /*
+ ** Enable Interrupts again
+ */
+ SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
SkEventDispatcher(pAC, pAC->IoBase);
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- /* Start both ports */
- EvPara.Para32[0] = pAC->RlmtNets;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
- EvPara);
-
+ /*
+ ** Notify RLMT about the changing and restarting one (or more) ports
+ */
+ if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
+ EvPara.Para32[0] = pAC->RlmtNets;
+ EvPara.Para32[1] = -1;
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS, EvPara);
+ EvPara.Para32[0] = pNet->PortNr;
+ EvPara.Para32[1] = -1;
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
- EvPara.Para32[1] = -1;
- EvPara.Para32[0] = pNet->PortNr;
+ if (pOtherNet->Up) {
+ EvPara.Para32[0] = pOtherNet->PortNr;
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
-
- if (pOtherNet->Up) {
- EvPara.Para32[0] = pOtherNet->PortNr;
- SkEventQueue(pAC, SKGE_RLMT,
- SK_RLMT_START, EvPara);
- }
+ }
} else {
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
}
@@ -2816,7 +3405,20 @@
SkEventDispatcher(pAC, pAC->IoBase);
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- return 0;
+ /*
+ ** While testing this driver with latest kernel 2.5 (2.5.70), it
+ ** seems as if upper layers have a problem to handle a successful
+ ** return value of '0'. If such a zero is returned, the complete
+ ** system hangs for several minutes (!), which is in acceptable.
+ **
+ ** Currently it is not clear, what the exact reason for this problem
+ ** is. The implemented workaround for 2.5 is to return the desired
+ ** new MTU size if all needed changes for the new MTU size where
+ ** performed. In kernels 2.2 and 2.4, a zero value is returned,
+ ** which indicates the successful change of the mtu-size.
+ */
+ return NewMtu;
+
} /* SkGeChangeMtu */
@@ -2831,12 +3433,13 @@
* Returns:
* pointer to the statistic structure.
*/
-static struct net_device_stats *SkGeStats(struct net_device *dev)
+static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
{
DEV_NET *pNet = (DEV_NET*) dev->priv;
SK_AC *pAC = pNet->pAC;
SK_PNMI_STRUCT_DATA *pPnmiStruct; /* structure for all Pnmi-Data */
-SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
+SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */
+SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
unsigned int Size; /* size of pnmi struct */
unsigned long Flags; /* for spin lock */
@@ -2855,7 +3458,18 @@
pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
- pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
+
+ if (pNet->Mtu <= 1500) {
+ pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
+ } else {
+ pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
+ pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
+ }
+
+
+ if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
+ pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
+
pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
@@ -2894,14 +3508,18 @@
* 0, if everything is ok
* !=0, on error
*/
-static int SkGeIoctl(struct net_device *dev, struct ifreq *rq, int cmd)
+static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
{
DEV_NET *pNet;
SK_AC *pAC;
+void *pMemBuf;
SK_GE_IOCTL Ioctl;
unsigned int Err = 0;
-int Size;
+int Size = 0;
+int Ret = 0;
+unsigned int Length = 0;
+int HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeIoctl starts now...\n"));
@@ -2918,7 +3536,7 @@
case SK_IOCTL_PRESETMIB:
if (!capable(CAP_NET_ADMIN)) return -EPERM;
case SK_IOCTL_GETMIB:
- if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
+ if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
Ioctl.Len<sizeof(pAC->PnmiStruct)?
Ioctl.Len : sizeof(pAC->PnmiStruct))) {
return -EFAULT;
@@ -2933,10 +3551,36 @@
return -EFAULT;
}
break;
+ case SK_IOCTL_GEN:
+ if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
+ Length = Ioctl.Len;
+ } else {
+ Length = sizeof(pAC->PnmiStruct) + HeaderLength;
+ }
+ if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
+ return -EFAULT;
+ }
+ if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
+ return -EFAULT;
+ }
+ if ((Ret = SkPnmiGenIoctl(pAC, pAC->IoBase, pMemBuf, &Length, 0)) < 0) {
+ return -EFAULT;
+ }
+ if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
+ return -EFAULT;
+ }
+ Ioctl.Len = Length;
+ if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
+ return -EFAULT;
+ }
+ kfree(pMemBuf); /* cleanup everything */
+ break;
default:
Err = -EOPNOTSUPP;
}
+
return(Err);
+
} /* SkGeIoctl */
@@ -3008,11 +3652,18 @@
SK_AC *pAC) /* pointer to the adapter context structure */
{
SK_I32 Port; /* preferred port */
-int AutoNeg; /* auto negotiation off (0) or on (1) */
-int DuplexCap; /* duplex capabilities (0=both, 1=full, 2=half */
-int MSMode; /* master / slave mode selection */
SK_BOOL AutoSet;
SK_BOOL DupSet;
+int LinkSpeed = SK_LSPEED_AUTO; /* Link speed */
+int AutoNeg = 1; /* autoneg off (0) or on (1) */
+int DuplexCap = 0; /* 0=both,1=full,2=half */
+int FlowCtrl = SK_FLOW_MODE_SYM_OR_REM; /* FlowControl */
+int MSMode = SK_MS_MODE_AUTO; /* master/slave mode */
+SK_BOOL IsConTypeDefined = SK_TRUE;
+SK_BOOL IsLinkSpeedDefined = SK_TRUE;
+SK_BOOL IsFlowCtrlDefined = SK_TRUE;
+SK_BOOL IsRoleDefined = SK_TRUE;
+SK_BOOL IsModeDefined = SK_TRUE;
/*
* The two parameters AutoNeg. and DuplexCap. map to one configuration
* parameter. The mapping is described by this table:
@@ -3025,72 +3676,202 @@
* -----------------------------------------------------------------
* Sense | AutoSense | AutoSense | AutoSense |
*/
-int Capabilities[3][3] =
- { { -1, SK_LMODE_FULL, SK_LMODE_HALF},
- {SK_LMODE_AUTOBOTH, SK_LMODE_AUTOFULL, SK_LMODE_AUTOHALF},
+int Capabilities[3][3] =
+ { { -1, SK_LMODE_FULL , SK_LMODE_HALF },
+ {SK_LMODE_AUTOBOTH , SK_LMODE_AUTOFULL , SK_LMODE_AUTOHALF },
{SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
+
#define DC_BOTH 0
#define DC_FULL 1
#define DC_HALF 2
#define AN_OFF 0
#define AN_ON 1
#define AN_SENS 2
+#define M_CurrPort pAC->GIni.GP[Port]
- /* settings for port A */
- AutoNeg = AN_SENS; /* default: do auto Sense */
+ /*
+ ** Set the default values first for both ports!
+ */
+ for (Port = 0; Port < SK_MAX_MACS; Port++) {
+ M_CurrPort.PLinkModeConf = Capabilities[AN_ON][DC_BOTH];
+ M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
+ M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
+ M_CurrPort.PLinkSpeed = SK_LSPEED_AUTO;
+ }
+
+ /*
+ ** Check merged parameter ConType. If it has not been used,
+ ** verify any other parameter (e.g. AutoNeg) and use default values.
+ **
+ ** Stating both ConType and other lowlevel link parameters is also
+ ** possible. If this is the case, the passed ConType-parameter is
+ ** overwritten by the lowlevel link parameter.
+ **
+ ** The following settings are used for a merged ConType-parameter:
+ **
+ ** ConType DupCap AutoNeg FlowCtrl Role Speed
+ ** ------- ------ ------- -------- ---------- -----
+ ** Auto Both On SymOrRem Auto Auto
+ ** 100FD Full Off None <ignored> 100
+ ** 100HD Half Off None <ignored> 100
+ ** 10FD Full Off None <ignored> 10
+ ** 10HD Half Off None <ignored> 10
+ **
+ ** This ConType parameter is used for all ports of the adapter!
+ */
+ if ( (ConType != NULL) &&
+ (pAC->Index < SK_MAX_CARD_PARAM) &&
+ (ConType[pAC->Index] != NULL) ) {
+ if (strcmp(ConType[pAC->Index],"")==0) {
+ IsConTypeDefined = SK_FALSE; /* No ConType defined */
+ } else if (strcmp(ConType[pAC->Index],"Auto")==0) {
+ for (Port = 0; Port < SK_MAX_MACS; Port++) {
+ M_CurrPort.PLinkModeConf = Capabilities[AN_ON][DC_BOTH];
+ M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
+ M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
+ M_CurrPort.PLinkSpeed = SK_LSPEED_AUTO;
+ }
+ } else if (strcmp(ConType[pAC->Index],"100FD")==0) {
+ for (Port = 0; Port < SK_MAX_MACS; Port++) {
+ M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
+ M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
+ M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
+ M_CurrPort.PLinkSpeed = SK_LSPEED_100MBPS;
+ }
+ } else if (strcmp(ConType[pAC->Index],"100HD")==0) {
+ for (Port = 0; Port < SK_MAX_MACS; Port++) {
+ M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
+ M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
+ M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
+ M_CurrPort.PLinkSpeed = SK_LSPEED_100MBPS;
+ }
+ } else if (strcmp(ConType[pAC->Index],"10FD")==0) {
+ for (Port = 0; Port < SK_MAX_MACS; Port++) {
+ M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
+ M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
+ M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
+ M_CurrPort.PLinkSpeed = SK_LSPEED_10MBPS;
+ }
+ } else if (strcmp(ConType[pAC->Index],"10HD")==0) {
+ for (Port = 0; Port < SK_MAX_MACS; Port++) {
+ M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
+ M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
+ M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
+ M_CurrPort.PLinkSpeed = SK_LSPEED_10MBPS;
+ }
+ } else {
+ printk("%s: Illegal value \"%s\" for ConType\n",
+ pAC->dev[0]->name, ConType[pAC->Index]);
+ IsConTypeDefined = SK_FALSE; /* Wrong ConType defined */
+ }
+ } else {
+ IsConTypeDefined = SK_FALSE; /* No ConType defined */
+ }
+
+ /*
+ ** Parse any parameter settings for port A:
+ ** a) any LinkSpeed stated?
+ */
+ if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
+ Speed_A[pAC->Index] != NULL) {
+ if (strcmp(Speed_A[pAC->Index],"")==0) {
+ IsLinkSpeedDefined = SK_FALSE;
+ } else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
+ LinkSpeed = SK_LSPEED_AUTO;
+ } else if (strcmp(Speed_A[pAC->Index],"10")==0) {
+ LinkSpeed = SK_LSPEED_10MBPS;
+ } else if (strcmp(Speed_A[pAC->Index],"100")==0) {
+ LinkSpeed = SK_LSPEED_100MBPS;
+ } else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
+ LinkSpeed = SK_LSPEED_1000MBPS;
+ } else {
+ printk("%s: Illegal value \"%s\" for Speed_A\n",
+ pAC->dev[0]->name, Speed_A[pAC->Index]);
+ IsLinkSpeedDefined = SK_FALSE;
+ }
+ } else {
+ IsLinkSpeedDefined = SK_FALSE;
+ }
+
+ /*
+ ** Check speed parameter:
+ ** Only copper type adapter and GE V2 cards
+ */
+ if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
+ (pAC->GIni.GICopperType != SK_TRUE)) &&
+ ((LinkSpeed != SK_LSPEED_AUTO) &&
+ (LinkSpeed != SK_LSPEED_1000MBPS))) {
+ printk("%s: Illegal value for Speed_A. "
+ "Not a copper card or GE V2 card\n Using "
+ "speed 1000\n", pAC->dev[0]->name);
+ LinkSpeed = SK_LSPEED_1000MBPS;
+ }
+
+ /*
+ ** Decide whether to set new config value if somethig valid has
+ ** been received.
+ */
+ if (IsLinkSpeedDefined) {
+ pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
+ }
+
+ /*
+ ** b) Any Autonegotiation and DuplexCapabilities set?
+ ** Please note that both belong together...
+ */
+ AutoNeg = AN_ON; /* tschilling: Default: Autonegotiation on! */
AutoSet = SK_FALSE;
if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
AutoNeg_A[pAC->Index] != NULL) {
AutoSet = SK_TRUE;
if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
- AutoSet = SK_FALSE;
- }
- else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
- AutoNeg = AN_ON;
- }
- else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
- AutoNeg = AN_OFF;
- }
- else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
- AutoNeg = AN_SENS;
+ AutoSet = SK_FALSE;
+ } else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
+ AutoNeg = AN_ON;
+ } else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
+ AutoNeg = AN_OFF;
+ } else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
+ AutoNeg = AN_SENS;
+ } else {
+ printk("%s: Illegal value \"%s\" for AutoNeg_A\n",
+ pAC->dev[0]->name, AutoNeg_A[pAC->Index]);
}
- else printk("%s: Illegal value for AutoNeg_A\n",
- pAC->dev[0]->name);
}
DuplexCap = DC_BOTH;
- DupSet = SK_FALSE;
+ DupSet = SK_FALSE;
if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
DupCap_A[pAC->Index] != NULL) {
DupSet = SK_TRUE;
if (strcmp(DupCap_A[pAC->Index],"")==0) {
- DupSet = SK_FALSE;
- }
- else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
- DuplexCap = DC_BOTH;
- }
- else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
- DuplexCap = DC_FULL;
- }
- else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
- DuplexCap = DC_HALF;
+ DupSet = SK_FALSE;
+ } else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
+ DuplexCap = DC_BOTH;
+ } else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
+ DuplexCap = DC_FULL;
+ } else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
+ DuplexCap = DC_HALF;
+ } else {
+ printk("%s: Illegal value \"%s\" for DupCap_A\n",
+ pAC->dev[0]->name, DupCap_A[pAC->Index]);
}
- else printk("%s: Illegal value for DupCap_A\n",
- pAC->dev[0]->name);
}
- /* check for illegal combinations */
- if (AutoSet && AutoNeg==AN_SENS && DupSet) {
+ /*
+ ** Check for illegal combinations
+ */
+ if ( AutoSet && AutoNeg==AN_SENS && DupSet) {
printk("%s, Port A: DuplexCapabilities"
" ignored using Sense mode\n", pAC->dev[0]->name);
}
+
if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
printk("%s, Port A: Illegal combination"
" of values AutoNeg. and DuplexCap.\n Using "
"Full Duplex\n", pAC->dev[0]->name);
-
DuplexCap = DC_FULL;
}
+
if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
DuplexCap = DC_FULL;
}
@@ -3103,114 +3884,184 @@
AutoNeg = AN_ON;
}
- /* set the desired mode */
- pAC->GIni.GP[0].PLinkModeConf =
- Capabilities[AutoNeg][DuplexCap];
+ /*
+ ** set the desired mode
+ */
+ if (AutoSet || DupSet) {
+ pAC->GIni.GP[0].PLinkModeConf = Capabilities[AutoNeg][DuplexCap];
+ }
- pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
+ /*
+ ** c) Any Flowcontrol-parameter set?
+ */
if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
FlowCtrl_A[pAC->Index] != NULL) {
if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
+ IsFlowCtrlDefined = SK_FALSE;
+ } else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
+ FlowCtrl = SK_FLOW_MODE_SYM_OR_REM;
+ } else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
+ FlowCtrl = SK_FLOW_MODE_SYMMETRIC;
+ } else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
+ FlowCtrl = SK_FLOW_MODE_LOC_SEND;
+ } else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
+ FlowCtrl = SK_FLOW_MODE_NONE;
+ } else {
+ printk("%s: Illegal value \"%s\" for FlowCtrl_A\n",
+ pAC->dev[0]->name, FlowCtrl_A[pAC->Index]);
+ IsFlowCtrlDefined = SK_FALSE;
}
- else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_SYM_OR_REM;
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_SYMMETRIC;
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_LOC_SEND;
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_NONE;
- }
- else printk("Illegal value for FlowCtrl_A\n");
+ } else {
+ IsFlowCtrlDefined = SK_FALSE;
}
- if (AutoNeg==AN_OFF && pAC->GIni.GP[0].PFlowCtrlMode!=
- SK_FLOW_MODE_NONE) {
+
+ if (IsFlowCtrlDefined) {
+ if ((AutoNeg == AN_OFF) && (FlowCtrl != SK_FLOW_MODE_NONE)) {
printk("%s, Port A: FlowControl"
" impossible without AutoNegotiation,"
" disabled\n", pAC->dev[0]->name);
- pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_NONE;
+ FlowCtrl = SK_FLOW_MODE_NONE;
+ }
+ pAC->GIni.GP[0].PFlowCtrlMode = FlowCtrl;
}
- MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
+ /*
+ ** d) What is with the RoleParameter?
+ */
if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
Role_A[pAC->Index] != NULL) {
if (strcmp(Role_A[pAC->Index],"")==0) {
+ IsRoleDefined = SK_FALSE;
+ } else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
+ MSMode = SK_MS_MODE_AUTO;
+ } else if (strcmp(Role_A[pAC->Index],"Master")==0) {
+ MSMode = SK_MS_MODE_MASTER;
+ } else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
+ MSMode = SK_MS_MODE_SLAVE;
+ } else {
+ printk("%s: Illegal value \"%s\" for Role_A\n",
+ pAC->dev[0]->name, Role_A[pAC->Index]);
+ IsRoleDefined = SK_FALSE;
}
- else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
- MSMode = SK_MS_MODE_AUTO;
- }
- else if (strcmp(Role_A[pAC->Index],"Master")==0) {
- MSMode = SK_MS_MODE_MASTER;
- }
- else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
- MSMode = SK_MS_MODE_SLAVE;
- }
- else printk("%s: Illegal value for Role_A\n",
- pAC->dev[0]->name);
+ } else {
+ IsRoleDefined = SK_FALSE;
+ }
+
+ if (IsRoleDefined == SK_TRUE) {
+ pAC->GIni.GP[0].PMSMode = MSMode;
}
- pAC->GIni.GP[0].PMSMode = MSMode;
+
- /* settings for port B */
+ /*
+ ** Parse any parameter settings for port B:
+ ** a) any LinkSpeed stated?
+ */
+ IsConTypeDefined = SK_TRUE;
+ IsLinkSpeedDefined = SK_TRUE;
+ IsFlowCtrlDefined = SK_TRUE;
+ IsModeDefined = SK_TRUE;
+
+ if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
+ Speed_B[pAC->Index] != NULL) {
+ if (strcmp(Speed_B[pAC->Index],"")==0) {
+ IsLinkSpeedDefined = SK_FALSE;
+ } else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
+ LinkSpeed = SK_LSPEED_AUTO;
+ } else if (strcmp(Speed_B[pAC->Index],"10")==0) {
+ LinkSpeed = SK_LSPEED_10MBPS;
+ } else if (strcmp(Speed_B[pAC->Index],"100")==0) {
+ LinkSpeed = SK_LSPEED_100MBPS;
+ } else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
+ LinkSpeed = SK_LSPEED_1000MBPS;
+ } else {
+ printk("%s: Illegal value \"%s\" for Speed_B\n",
+ pAC->dev[1]->name, Speed_B[pAC->Index]);
+ IsLinkSpeedDefined = SK_FALSE;
+ }
+ } else {
+ IsLinkSpeedDefined = SK_FALSE;
+ }
+
+ /*
+ ** Check speed parameter:
+ ** Only copper type adapter and GE V2 cards
+ */
+ if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
+ (pAC->GIni.GICopperType != SK_TRUE)) &&
+ ((LinkSpeed != SK_LSPEED_AUTO) &&
+ (LinkSpeed != SK_LSPEED_1000MBPS))) {
+ printk("%s: Illegal value for Speed_B. "
+ "Not a copper card or GE V2 card\n Using "
+ "speed 1000\n", pAC->dev[1]->name);
+ LinkSpeed = SK_LSPEED_1000MBPS;
+ }
+
+ /*
+ ** Decide whether to set new config value if somethig valid has
+ ** been received.
+ */
+ if (IsLinkSpeedDefined) {
+ pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
+ }
+
+ /*
+ ** b) Any Autonegotiation and DuplexCapabilities set?
+ ** Please note that both belong together...
+ */
AutoNeg = AN_SENS; /* default: do auto Sense */
AutoSet = SK_FALSE;
if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
AutoNeg_B[pAC->Index] != NULL) {
AutoSet = SK_TRUE;
if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
- AutoSet = SK_FALSE;
- }
- else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
- AutoNeg = AN_ON;
- }
- else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
- AutoNeg = AN_OFF;
- }
- else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
- AutoNeg = AN_SENS;
+ AutoSet = SK_FALSE;
+ } else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
+ AutoNeg = AN_ON;
+ } else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
+ AutoNeg = AN_OFF;
+ } else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
+ AutoNeg = AN_SENS;
+ } else {
+ printk("%s: Illegal value \"%s\" for AutoNeg_B\n",
+ pAC->dev[0]->name, AutoNeg_B[pAC->Index]);
}
- else printk("Illegal value for AutoNeg_B\n");
}
DuplexCap = DC_BOTH;
- DupSet = SK_FALSE;
+ DupSet = SK_FALSE;
if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
DupCap_B[pAC->Index] != NULL) {
DupSet = SK_TRUE;
if (strcmp(DupCap_B[pAC->Index],"")==0) {
- DupSet = SK_FALSE;
- }
- else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
- DuplexCap = DC_BOTH;
- }
- else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
- DuplexCap = DC_FULL;
- }
- else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
- DuplexCap = DC_HALF;
+ DupSet = SK_FALSE;
+ } else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
+ DuplexCap = DC_BOTH;
+ } else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
+ DuplexCap = DC_FULL;
+ } else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
+ DuplexCap = DC_HALF;
+ } else {
+ printk("%s: Illegal value \"%s\" for DupCap_B\n",
+ pAC->dev[0]->name, DupCap_B[pAC->Index]);
}
- else printk("Illegal value for DupCap_B\n");
}
- /* check for illegal combinations */
+ /*
+ ** Check for illegal combinations
+ */
if (AutoSet && AutoNeg==AN_SENS && DupSet) {
printk("%s, Port B: DuplexCapabilities"
" ignored using Sense mode\n", pAC->dev[1]->name);
}
+
if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
printk("%s, Port B: Illegal combination"
" of values AutoNeg. and DuplexCap.\n Using "
"Full Duplex\n", pAC->dev[1]->name);
-
DuplexCap = DC_FULL;
}
+
if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
DuplexCap = DC_FULL;
}
@@ -3223,129 +4074,231 @@
AutoNeg = AN_ON;
}
- /* set the desired mode */
- pAC->GIni.GP[1].PLinkModeConf =
- Capabilities[AutoNeg][DuplexCap];
+ /*
+ ** set the desired mode
+ */
+ if (AutoSet || DupSet) {
+ pAC->GIni.GP[1].PLinkModeConf = Capabilities[AutoNeg][DuplexCap];
+ }
- pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
+ /*
+ ** c) Any FlowCtrl parameter set?
+ */
if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
FlowCtrl_B[pAC->Index] != NULL) {
if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
+ IsFlowCtrlDefined = SK_FALSE;
+ } else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
+ FlowCtrl = SK_FLOW_MODE_SYM_OR_REM;
+ } else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
+ FlowCtrl = SK_FLOW_MODE_SYMMETRIC;
+ } else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
+ FlowCtrl = SK_FLOW_MODE_LOC_SEND;
+ } else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
+ FlowCtrl = SK_FLOW_MODE_NONE;
+ } else {
+ printk("%s: Illegal value \"%s\" for FlowCtrl_B\n",
+ pAC->dev[0]->name, FlowCtrl_B[pAC->Index]);
+ IsFlowCtrlDefined = SK_FALSE;
}
- else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_SYM_OR_REM;
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_SYMMETRIC;
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_LOC_SEND;
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_NONE;
- }
- else printk("Illegal value for FlowCtrl_B\n");
+ } else {
+ IsFlowCtrlDefined = SK_FALSE;
}
- if (AutoNeg==AN_OFF && pAC->GIni.GP[1].PFlowCtrlMode!=
- SK_FLOW_MODE_NONE) {
+
+ if (IsFlowCtrlDefined) {
+ if ((AutoNeg == AN_OFF) && (FlowCtrl != SK_FLOW_MODE_NONE)) {
printk("%s, Port B: FlowControl"
" impossible without AutoNegotiation,"
" disabled\n", pAC->dev[1]->name);
- pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_NONE;
+ FlowCtrl = SK_FLOW_MODE_NONE;
+ }
+ pAC->GIni.GP[1].PFlowCtrlMode = FlowCtrl;
}
- MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
+ /*
+ ** d) What is the RoleParameter?
+ */
if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
Role_B[pAC->Index] != NULL) {
if (strcmp(Role_B[pAC->Index],"")==0) {
+ IsRoleDefined = SK_FALSE;
+ } else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
+ MSMode = SK_MS_MODE_AUTO;
+ } else if (strcmp(Role_B[pAC->Index],"Master")==0) {
+ MSMode = SK_MS_MODE_MASTER;
+ } else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
+ MSMode = SK_MS_MODE_SLAVE;
+ } else {
+ printk("%s: Illegal value \"%s\" for Role_B\n",
+ pAC->dev[1]->name, Role_B[pAC->Index]);
+ IsRoleDefined = SK_FALSE;
}
- else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
- MSMode = SK_MS_MODE_AUTO;
- }
- else if (strcmp(Role_B[pAC->Index],"Master")==0) {
- MSMode = SK_MS_MODE_MASTER;
- }
- else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
- MSMode = SK_MS_MODE_SLAVE;
- }
- else printk("%s: Illegal value for Role_B\n",
- pAC->dev[1]->name);
+ } else {
+ IsRoleDefined = SK_FALSE;
+ }
+
+ if (IsRoleDefined) {
+ pAC->GIni.GP[1].PMSMode = MSMode;
}
- pAC->GIni.GP[1].PMSMode = MSMode;
-
- /* settings for both ports */
+ /*
+ ** Evaluate settings for both ports
+ */
pAC->ActivePort = 0;
if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
PrefPort[pAC->Index] != NULL) {
if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
- pAC->ActivePort = 0;
- pAC->Rlmt.Net[0].Preference = -1; /* auto */
- pAC->Rlmt.Net[0].PrefPort = 0;
- }
- else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
- /*
- * do not set ActivePort here, thus a port
- * switch is issued after net up.
- */
- Port = 0;
- pAC->Rlmt.Net[0].Preference = Port;
- pAC->Rlmt.Net[0].PrefPort = Port;
- }
- else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
- /*
- * do not set ActivePort here, thus a port
- * switch is issued after net up.
- */
- Port = 1;
- pAC->Rlmt.Net[0].Preference = Port;
- pAC->Rlmt.Net[0].PrefPort = Port;
+ pAC->ActivePort = 0;
+ pAC->Rlmt.Net[0].Preference = -1; /* auto */
+ pAC->Rlmt.Net[0].PrefPort = 0;
+ } else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
+ /*
+ ** do not set ActivePort here, thus a port
+ ** switch is issued after net up.
+ */
+ Port = 0;
+ pAC->Rlmt.Net[0].Preference = Port;
+ pAC->Rlmt.Net[0].PrefPort = Port;
+ } else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
+ /*
+ ** do not set ActivePort here, thus a port
+ ** switch is issued after net up.
+ */
+ Port = 1;
+ pAC->Rlmt.Net[0].Preference = Port;
+ pAC->Rlmt.Net[0].PrefPort = Port;
+ } else {
+ printk("%s: Illegal value \"%s\" for PrefPort\n",
+ pAC->dev[0]->name, PrefPort[pAC->Index]);
}
- else printk("%s: Illegal value for PrefPort\n",
- pAC->dev[0]->name);
}
pAC->RlmtNets = 1;
-
+
if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
RlmtMode[pAC->Index] != NULL) {
if (strcmp(RlmtMode[pAC->Index], "") == 0) {
pAC->RlmtMode = 0;
- }
- else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
+ } else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
pAC->RlmtMode = SK_RLMT_CHECK_LINK;
- }
- else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
+ } else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
pAC->RlmtMode = SK_RLMT_CHECK_LINK |
- SK_RLMT_CHECK_LOC_LINK;
- }
- else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
- pAC->RlmtMode = SK_RLMT_CHECK_LINK |
- SK_RLMT_CHECK_LOC_LINK |
- SK_RLMT_CHECK_SEG;
- }
- else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
+ SK_RLMT_CHECK_LOC_LINK;
+ } else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
+ pAC->RlmtMode = SK_RLMT_CHECK_LINK |
+ SK_RLMT_CHECK_LOC_LINK |
+ SK_RLMT_CHECK_SEG;
+ } else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
(pAC->GIni.GIMacsFound == 2)) {
- pAC->RlmtMode = SK_RLMT_CHECK_LINK;
- pAC->RlmtNets = 2;
- }
- else {
- printk("%s: Illegal value for"
- " RlmtMode, using default\n", pAC->dev[0]->name);
-
-printk("MacFound = %d\nRlmtMode = %s", pAC->GIni.GIMacsFound, RlmtMode[pAC->Index]);
-
-
+ pAC->RlmtMode = SK_RLMT_CHECK_LINK;
+ pAC->RlmtNets = 2;
+ } else {
+ printk("%s: Illegal value \"%s\" for"
+ " RlmtMode, using default\n",
+ pAC->dev[0]->name, RlmtMode[pAC->Index]);
pAC->RlmtMode = 0;
}
- }
- else {
+ } else {
pAC->RlmtMode = 0;
}
+
+ /*
+ ** Check the interrupt moderation parameters
+ */
+ if (Moderation[pAC->Index] != NULL) {
+ if (strcmp(Moderation[pAC->Index], "Static") == 0) {
+ pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_STATIC;
+ } else if (strcmp(Moderation[pAC->Index], "Dynamic") == 0) {
+ pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_DYNAMIC;
+ } else {
+ pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
+ }
+ } else {
+ pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
+ }
+
+ if (Stats[pAC->Index] != NULL) {
+ if (strcmp(Stats[pAC->Index], "Yes") == 0) {
+ pAC->DynIrqModInfo.DisplayStats = SK_TRUE;
+ } else {
+ pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
+ }
+ } else {
+ pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
+ }
+
+ if (ModerationMask[pAC->Index] != NULL) {
+ if (strcmp(ModerationMask[pAC->Index], "Rx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
+ } else if (strcmp(ModerationMask[pAC->Index], "Tx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_ONLY;
+ } else if (strcmp(ModerationMask[pAC->Index], "Sp") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_ONLY;
+ } else if (strcmp(ModerationMask[pAC->Index], "RxSp") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
+ } else if (strcmp(ModerationMask[pAC->Index], "SpRx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
+ } else if (strcmp(ModerationMask[pAC->Index], "RxTx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
+ } else if (strcmp(ModerationMask[pAC->Index], "TxRx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
+ } else if (strcmp(ModerationMask[pAC->Index], "TxSp") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
+ } else if (strcmp(ModerationMask[pAC->Index], "SpTx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
+ } else if (strcmp(ModerationMask[pAC->Index], "RxTxSp") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
+ } else if (strcmp(ModerationMask[pAC->Index], "RxSpTx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
+ } else if (strcmp(ModerationMask[pAC->Index], "TxRxSp") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
+ } else if (strcmp(ModerationMask[pAC->Index], "TxSpRx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
+ } else if (strcmp(ModerationMask[pAC->Index], "SpTxRx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
+ } else if (strcmp(ModerationMask[pAC->Index], "SpRxTx") == 0) {
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
+ } else { /* some rubbish */
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
+ }
+ } else { /* operator has stated nothing */
+ pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
+ }
+
+ if (AutoSizing[pAC->Index] != NULL) {
+ if (strcmp(AutoSizing[pAC->Index], "On") == 0) {
+ pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
+ } else {
+ pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
+ }
+ } else { /* operator has stated nothing */
+ pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
+ }
+
+ if (IntsPerSec[pAC->Index] != 0) {
+ if ((IntsPerSec[pAC->Index]< 30)&&(IntsPerSec[pAC->Index]> 40000)) {
+ pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
+ } else {
+ pAC->DynIrqModInfo.MaxModIntsPerSec = IntsPerSec[pAC->Index];
+ }
+ } else {
+ pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
+ }
+
+ /*
+ ** Evaluate upper and lower moderation threshold
+ */
+ pAC->DynIrqModInfo.MaxModIntsPerSecUpperLimit =
+ pAC->DynIrqModInfo.MaxModIntsPerSec +
+ (pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
+
+ pAC->DynIrqModInfo.MaxModIntsPerSecLowerLimit =
+ pAC->DynIrqModInfo.MaxModIntsPerSec -
+ (pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
+
+ pAC->DynIrqModInfo.PrevTimeVal = jiffies; /* initial value */
+
+
} /* GetConfiguration */
@@ -3380,8 +4333,44 @@
}
} /* ProductStr */
+/*****************************************************************************
+ *
+ * StartDrvCleanupTimer - Start timer to check for descriptors which
+ * might be placed in descriptor ring, but
+ * havent been handled up to now
+ *
+ * Description:
+ * This function requests a HW-timer fo the Yukon card. The actions to
+ * perform when this timer expires, are located in the SkDrvEvent().
+ *
+ * Returns: N/A
+ */
+static void
+StartDrvCleanupTimer(SK_AC *pAC) {
+ SK_EVPARA EventParam; /* Event struct for timer event */
+
+ SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
+ EventParam.Para32[0] = SK_DRV_RX_CLEANUP_TIMER;
+ SkTimerStart(pAC, pAC->IoBase, &pAC->DrvCleanupTimer,
+ SK_DRV_RX_CLEANUP_TIMER_LENGTH,
+ SKGE_DRV, SK_DRV_TIMER, EventParam);
+}
-
+/*****************************************************************************
+ *
+ * StopDrvCleanupTimer - Stop timer to check for descriptors
+ *
+ * Description:
+ * This function requests a HW-timer fo the Yukon card. The actions to
+ * perform when this timer expires, are located in the SkDrvEvent().
+ *
+ * Returns: N/A
+ */
+static void
+StopDrvCleanupTimer(SK_AC *pAC) {
+ SkTimerStop(pAC, pAC->IoBase, &pAC->DrvCleanupTimer);
+ SK_MEMSET((char *) &pAC->DrvCleanupTimer, 0, sizeof(SK_TIMER));
+}
/****************************************************************************/
/* functions for common modules *********************************************/
@@ -3440,8 +4429,8 @@
* Nothing
*/
void SkDrvFreeRlmtMbuf(
-SK_AC *pAC, /* pointer to adapter context */
-SK_IOC IoC, /* the IO-context */
+SK_AC *pAC, /* pointer to adapter context */
+SK_IOC IoC, /* the IO-context */
SK_MBUF *pMbuf) /* size of the requested buffer */
{
SK_MBUF *pFreeMbuf;
@@ -3470,7 +4459,9 @@
*/
SK_U64 SkOsGetTime(SK_AC *pAC)
{
- return jiffies;
+ SK_U64 PrivateJiffies;
+ SkOsGetTimeCurrent(pAC, &PrivateJiffies);
+ return PrivateJiffies;
} /* SkOsGetTime */
@@ -3491,7 +4482,7 @@
int PciAddr, /* PCI register address */
SK_U32 *pVal) /* pointer to store the read value */
{
- pci_read_config_dword(&pAC->PciDev, PciAddr, pVal);
+ pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
return(0);
} /* SkPciReadCfgDWord */
@@ -3513,7 +4504,7 @@
int PciAddr, /* PCI register address */
SK_U16 *pVal) /* pointer to store the read value */
{
- pci_read_config_word(&pAC->PciDev, PciAddr, pVal);
+ pci_read_config_word(pAC->PciDev, PciAddr, pVal);
return(0);
} /* SkPciReadCfgWord */
@@ -3535,7 +4526,7 @@
int PciAddr, /* PCI register address */
SK_U8 *pVal) /* pointer to store the read value */
{
- pci_read_config_byte(&pAC->PciDev, PciAddr, pVal);
+ pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
return(0);
} /* SkPciReadCfgByte */
@@ -3557,7 +4548,7 @@
int PciAddr, /* PCI register address */
SK_U32 Val) /* pointer to store the read value */
{
- pci_write_config_dword(&pAC->PciDev, PciAddr, Val);
+ pci_write_config_dword(pAC->PciDev, PciAddr, Val);
return(0);
} /* SkPciWriteCfgDWord */
@@ -3569,7 +4560,7 @@
* Description:
* This routine writes a 16 bit value to the pci configuration
* space. The flag PciConfigUp indicates whether the config space
- * is accessible or must be set up first.
+ * is accesible or must be set up first.
*
* Returns:
* 0 - indicate everything worked ok.
@@ -3580,7 +4571,7 @@
int PciAddr, /* PCI register address */
SK_U16 Val) /* pointer to store the read value */
{
- pci_write_config_word(&pAC->PciDev, PciAddr, Val);
+ pci_write_config_word(pAC->PciDev, PciAddr, Val);
return(0);
} /* SkPciWriteCfgWord */
@@ -3592,7 +4583,7 @@
* Description:
* This routine writes a 8 bit value to the pci configuration
* space. The flag PciConfigUp indicates whether the config space
- * is accessible or must be set up first.
+ * is accesible or must be set up first.
*
* Returns:
* 0 - indicate everything worked ok.
@@ -3603,7 +4594,7 @@
int PciAddr, /* PCI register address */
SK_U8 Val) /* pointer to store the read value */
{
- pci_write_config_byte(&pAC->PciDev, PciAddr, Val);
+ pci_write_config_byte(pAC->PciDev, PciAddr, Val);
return(0);
} /* SkPciWriteCfgByte */
@@ -3636,6 +4627,7 @@
SK_EVPARA NewPara; /* parameter for further events */
int Stat;
unsigned long Flags;
+SK_BOOL DualNet;
switch (Event) {
case SK_DRV_ADAP_FAIL:
@@ -3668,18 +4660,27 @@
&pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
Flags);
SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
+ pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
spin_unlock_irqrestore(
&pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
Flags);
/* clear rx ring from received frames */
- ReceiveIrq(pAC, &pAC->RxPort[FromPort]);
+ ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
spin_lock_irqsave(
&pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
Flags);
- SkGeInitPort(pAC, IoC, FromPort);
+
+ /* tschilling: Handling of return value inserted. */
+ if (SkGeInitPort(pAC, IoC, FromPort)) {
+ if (FromPort == 0) {
+ printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
+ } else {
+ printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
+ }
+ }
SkAddrMcUpdate(pAC,IoC, FromPort);
PortReInitBmu(pAC, FromPort);
SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
@@ -3695,7 +4696,22 @@
("NET UP EVENT, Port: %d ", Param.Para32[0]));
printk("%s: network connection up using"
" port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
- printk(" speed: 1000\n");
+
+ /* tschilling: Values changed according to LinkSpeedUsed. */
+ Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
+ if (Stat == SK_LSPEED_STAT_10MBPS) {
+ printk(" speed: 10\n");
+ } else if (Stat == SK_LSPEED_STAT_100MBPS) {
+ printk(" speed: 100\n");
+ } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
+ printk(" speed: 1000\n");
+ } else {
+ printk(" speed: unknown\n");
+ }
+
+ /* Mac update */
+ SkAddrMcUpdate(pAC,IoC, FromPort);
+
Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
if (Stat == SK_LMODE_STAT_AUTOHALF ||
Stat == SK_LMODE_STAT_AUTOFULL) {
@@ -3724,8 +4740,12 @@
else {
printk(" flowctrl: none\n");
}
- if (pAC->GIni.GP[FromPort].PhyType != SK_PHY_XMAC) {
- Stat = pAC->GIni.GP[FromPort].PMSStatus;
+
+ /* tschilling: Check against CopperType now. */
+ if ((pAC->GIni.GICopperType == SK_TRUE) &&
+ (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
+ SK_LSPEED_STAT_1000MBPS)) {
+ Stat = pAC->GIni.GP[FromPort].PMSStatus;
if (Stat == SK_MS_STAT_MASTER ) {
printk(" role: master\n");
}
@@ -3736,20 +4756,43 @@
printk(" role: ???\n");
}
}
-
- if ((Param.Para32[0] != pAC->ActivePort) &&
+
+#ifdef SK_ZEROCOPY
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON)
+#ifdef USE_SK_TX_CHECKSUM
+ printk(" scatter-gather: enabled\n");
+#else
+ printk(" tx-checksum: disabled\n");
+#endif
+ else
+ printk(" scatter-gather: disabled\n");
+#else
+ printk(" scatter-gather: disabled\n");
+#endif
+
+#ifndef USE_SK_RX_CHECKSUM
+ printk(" rx-checksum: disabled\n");
+#endif
+
+
+ if ((Param.Para32[0] != pAC->ActivePort) &&
(pAC->RlmtNets == 1)) {
NewPara.Para32[0] = pAC->ActivePort;
NewPara.Para32[1] = Param.Para32[0];
SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
NewPara);
}
+
+ /* Inform the world that link protocol is up. */
+ pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
+
break;
case SK_DRV_NET_DOWN: /* SK_U32 Reason */
/* action list 7 */
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
("NET DOWN EVENT "));
printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
+ pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
break;
case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
@@ -3781,24 +4824,48 @@
&pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
Flags);
- ReceiveIrq(pAC, &pAC->RxPort[FromPort]); /* clears rx ring */
- ReceiveIrq(pAC, &pAC->RxPort[ToPort]); /* clears rx ring */
+ ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
+ ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
spin_lock_irqsave(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
+ &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
Flags);
spin_lock_irqsave(
&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
pAC->ActivePort = ToPort;
+#if 0
SetQueueSizes(pAC);
- SkGeInitPort(pAC, IoC, FromPort);
- SkGeInitPort(pAC, IoC, ToPort);
+#else
+ /* tschilling: New common function with minimum size check. */
+ DualNet = SK_FALSE;
+ if (pAC->RlmtNets == 2) {
+ DualNet = SK_TRUE;
+ }
+
+ if (SkGeInitAssignRamToQueues(
+ pAC,
+ pAC->ActivePort,
+ DualNet)) {
+ spin_unlock_irqrestore(
+ &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
+ spin_unlock_irqrestore(
+ &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
+ Flags);
+ printk("SkGeInitAssignRamToQueues failed.\n");
+ break;
+ }
+#endif
+ /* tschilling: Handling of return values inserted. */
+ if (SkGeInitPort(pAC, IoC, FromPort) ||
+ SkGeInitPort(pAC, IoC, ToPort)) {
+ printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
+ }
if (Event == SK_DRV_SWITCH_SOFT) {
- SkXmRxTxEnable(pAC, IoC, FromPort);
+ SkMacRxTxEnable(pAC, IoC, FromPort);
}
- SkXmRxTxEnable(pAC, IoC, ToPort);
+ SkMacRxTxEnable(pAC, IoC, ToPort);
SkAddrSwap(pAC, IoC, FromPort, ToPort);
SkAddrMcUpdate(pAC, IoC, FromPort);
SkAddrMcUpdate(pAC, IoC, ToPort);
@@ -3821,9 +4888,35 @@
pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
skb_put(pMsg, pRlmtMbuf->Length);
if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
- pMsg) < 0)
+ pMsg) < 0)
+
DEV_KFREE_SKB_ANY(pMsg);
break;
+ case SK_DRV_TIMER:
+ if (Param.Para32[0] == SK_DRV_MODERATION_TIMER) {
+ /*
+ ** expiration of the moderation timer implies that
+ ** dynamic moderation is to be applied
+ */
+ SkDimStartModerationTimer(pAC);
+ SkDimModerate(pAC);
+ if (pAC->DynIrqModInfo.DisplayStats) {
+ SkDimDisplayModerationSettings(pAC);
+ }
+ } else if (Param.Para32[0] == SK_DRV_RX_CLEANUP_TIMER) {
+ /*
+ ** check if we need to check for descriptors which
+ ** haven't been handled the last millisecs
+ */
+ StartDrvCleanupTimer(pAC);
+ if (pAC->GIni.GIMacsFound == 2) {
+ ReceiveIrq(pAC, &pAC->RxPort[1], SK_FALSE);
+ }
+ ReceiveIrq(pAC, &pAC->RxPort[0], SK_FALSE);
+ } else {
+ printk("Expiration of unknown timer\n");
+ }
+ break;
default:
break;
}
@@ -3883,7 +4976,8 @@
} /* SkErrorLog */
-#ifdef DEBUG /***************************************************************/
+#ifdef DEBUG
+/****************************************************************************/
/* "debug only" section *****************************************************/
/****************************************************************************/
@@ -3930,7 +5024,7 @@
* DumpData - print a data area
*
* Description:
- * This function prints a area of data to the system logfile/to the
+ * This function prints a area of data to the system logfile/to the
* console.
*
* Returns: N/A
@@ -3978,7 +5072,7 @@
* DumpLong - print a data area as long values
*
* Description:
- * This function prints a area of data to the system logfile/to the
+ * This function prints a area of data to the system logfile/to the
* console.
*
* Returns: N/A
@@ -4030,64 +5124,10 @@
printk("------------------------\n");
} /* DumpLong */
-#endif /* DEBUG */
-
-static struct pci_device_id skge_pci_tbl[] __devinitdata = {
- { PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE,
- PCI_ANY_ID, PCI_ANY_ID, },
- { 0,}
-};
-MODULE_DEVICE_TABLE(pci, skge_pci_tbl);
-
-static struct pci_driver skge_driver = {
- .name = DRV_MODULE_NAME,
- .id_table = skge_pci_tbl,
- .probe = skge_init_one,
- .remove = __devexit_p(skge_remove_one),
-};
+#endif
-/*****************************************************************************
- *
- * skge_init - module initialization function
+/*******************************************************************************
*
- * Description:
- * root /proc directory allocation and pci driver invocation.
+ * End of file
*
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-static int __init skge_init(void)
-{
- int ret = -ENOMEM;
-
- /* just to avoid warnings ... */
- debug = 0;
- options[0] = 0;
-
- pSkRootDir = create_proc_entry(DRV_MODULE_NAME,
- S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
- if (pSkRootDir) {
- pSkRootDir->owner = THIS_MODULE;
- ret = pci_module_init(&skge_driver);
- if (ret)
- remove_proc_entry(pSkRootDir->name, proc_net);
- }
- return ret;
-} /* skge_init */
-
-
-static void __exit skge_cleanup(void)
-{
- remove_proc_entry(pSkRootDir->name, proc_net);
- pci_unregister_driver(&skge_driver);
-}
-
-module_init(skge_init);
-module_exit(skge_cleanup);
-
-/*
- * Local variables:
- * compile-command: "make"
- * End:
- */
+ ******************************************************************************/
diff -Nru a/drivers/net/sk98lin/skgehwt.c b/drivers/net/sk98lin/skgehwt.c
--- a/drivers/net/sk98lin/skgehwt.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sk98lin/skgehwt.c Sun Aug 3 13:14:52 2003
@@ -1,32 +1,23 @@
/******************************************************************************
*
* Name: skgehwt.c
- * Project: PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.12 $
- * Date: $Date: 1998/10/15 15:11:34 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.14 $
+ * Date: $Date: 2003/05/13 18:01:58 $
* Purpose: Hardware Timer.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1989-1998 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- * All Rights Reserved
- *
- * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF SYSKONNECT
- * The copyright notice above does not evidence any
- * actual or intended publication of such source code.
- *
- * This Module contains Proprietary Information of SysKonnect
- * and should be treated as Confidential.
- *
- * The information in this file is provided for the exclusive use of
- * the licensees of SysKonnect.
- * Such users have the right to use, modify, and incorporate this code
- * into products for purposes authorized by the license agreement
- * provided they include this notice and the associated copyright notice
- * with any such product.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
@@ -36,6 +27,12 @@
* History:
*
* $Log: skgehwt.c,v $
+ * Revision 1.14 2003/05/13 18:01:58 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.13 1999/11/22 13:31:12 cgoos
+ * Changed license header to GPL.
+ *
* Revision 1.12 1998/10/15 15:11:34 gklug
* fix: ID_sccs to SysKonnectFileId
*
@@ -61,14 +58,14 @@
* fix: chg pAc -> pAC
*
* Revision 1.4 1998/08/10 14:14:52 gklug
- * rmv: unnecessary SK_ADDR macro
+ * rmv: unneccessary SK_ADDR macro
*
* Revision 1.3 1998/08/07 12:53:44 gklug
* fix: first compiled version
*
* Revision 1.2 1998/08/07 09:19:29 gklug
* adapt functions to the C coding conventions
- * rmv unnecessary functions.
+ * rmv unneccessary functions.
*
* Revision 1.1 1998/08/05 11:28:36 gklug
* first version: adapted from SMT/FDDI
@@ -82,8 +79,10 @@
/*
Event queue and dispatcher
*/
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
- "$Header: /usr56/projects/ge/schedule/skgehwt.c,v 1.12 1998/10/15 15:11:34 gklug Exp $" ;
+ "$Header: /usr56/projects/ge/schedule/skgehwt.c,v 1.14 2003/05/13 18:01:58 mkarl Exp $" ;
+#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
diff -Nru a/drivers/net/sk98lin/skgeinit.c b/drivers/net/sk98lin/skgeinit.c
--- a/drivers/net/sk98lin/skgeinit.c Sun Aug 3 13:14:48 2003
+++ b/drivers/net/sk98lin/skgeinit.c Sun Aug 3 13:14:48 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skgeinit.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.63 $
- * Date: $Date: 2001/04/05 11:02:09 $
- * Purpose: Contains functions to initialize the GE HW
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.93 $
+ * Date: $Date: 2003/05/28 15:44:43 $
+ * Purpose: Contains functions to initialize the adapter
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,168 @@
* History:
*
* $Log: skgeinit.c,v $
+ * Revision 1.93 2003/05/28 15:44:43 rschmidt
+ * Added check for chip Id on WOL WA for chip Rev. A.
+ * Added setting of GILevel in SkGeDeInit().
+ * Minor changes to avoid LINT warnings.
+ * Editorial changes.
+ *
+ * Revision 1.92 2003/05/13 17:42:26 mkarl
+ * Added SK_FAR for PXE.
+ * Separated code pathes not used for SLIM driver to reduce code size.
+ * Removed calls to I2C for SLIM driver.
+ * Removed currently unused function SkGeLoadLnkSyncCnt.
+ * Editorial changes.
+ *
+ * Revision 1.91 2003/05/06 12:21:48 rschmidt
+ * Added use of pAC->GIni.GIYukon for selection of YUKON branches.
+ * Added defines around GENESIS resp. YUKON branches to reduce
+ * code size for PXE.
+ * Editorial changes.
+ *
+ * Revision 1.90 2003/04/28 09:12:20 rschmidt
+ * Added init for GIValIrqMask (common IRQ mask).
+ * Disabled HW Error IRQ on Yukon if sensor IRQ is set in SkGeInit1()
+ * by changing the common mask stored in GIValIrqMask.
+ * Editorial changes.
+ *
+ * Revision 1.89 2003/04/10 14:33:10 rschmidt
+ * Fixed alignement error of patchable configuration parameter
+ * in struct OemConfig caused by length of recognition string.
+ *
+ * Revision 1.88 2003/04/09 12:59:45 rschmidt
+ * Added define around initialization of patchable OEM specific
+ * configuration parameter.
+ *
+ * Revision 1.87 2003/04/08 16:46:13 rschmidt
+ * Added configuration variable for OEMs and initialization for
+ * GILedBlinkCtrl (LED Blink Control).
+ * Improved detection for YUKON-Lite Rev. A1.
+ * Editorial changes.
+ *
+ * Revision 1.86 2003/03/31 06:53:13 mkarl
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.85 2003/02/05 15:30:33 rschmidt
+ * Corrected setting of GIHstClkFact (Host Clock Factor) and
+ * GIPollTimerVal (Descr. Poll Timer Init Value) for YUKON.
+ * Editorial changes.
+ *
+ * Revision 1.84 2003/01/28 09:57:25 rschmidt
+ * Added detection of YUKON-Lite Rev. A0 (stored in GIYukonLite).
+ * Disabled Rx GMAC FIFO Flush for YUKON-Lite Rev. A0.
+ * Added support for CLK_RUN (YUKON-Lite).
+ * Added additional check of PME from D3cold for setting GIVauxAvail.
+ * Editorial changes.
+ *
+ * Revision 1.83 2002/12/17 16:15:41 rschmidt
+ * Added default setting of PhyType (Copper) for YUKON.
+ * Added define around check for HW self test results.
+ * Editorial changes.
+ *
+ * Revision 1.82 2002/12/05 13:40:21 rschmidt
+ * Added setting of Rx GMAC FIFO Flush Mask register.
+ * Corrected PhyType with new define SK_PHY_MARV_FIBER when
+ * YUKON Fiber board was found.
+ * Editorial changes.
+ *
+ * Revision 1.81 2002/11/15 12:48:35 rschmidt
+ * Replaced message SKERR_HWI_E018 with SKERR_HWI_E024 for Rx queue error
+ * in SkGeStopPort().
+ * Added init for pAC->GIni.GIGenesis with SK_FALSE in YUKON-branch.
+ * Editorial changes.
+ *
+ * Revision 1.80 2002/11/12 17:28:30 rschmidt
+ * Initialized GIPciSlot64 and GIPciClock66 in SkGeInit1().
+ * Reduced PCI FIFO watermarks for 32bit/33MHz bus in SkGeInitBmu().
+ * Editorial changes.
+ *
+ * Revision 1.79 2002/10/21 09:31:02 mkarl
+ * Changed SkGeInitAssignRamToQueues(), removed call to
+ * SkGeInitAssignRamToQueues in SkGeInit1 and fixed compiler warning in
+ * SkGeInit1.
+ *
+ * Revision 1.78 2002/10/16 15:55:07 mkarl
+ * Fixed a bug in SkGeInitAssignRamToQueues.
+ *
+ * Revision 1.77 2002/10/14 15:07:22 rschmidt
+ * Corrected timeout handling for Rx queue in SkGeStopPort() (#10748)
+ * Editorial changes.
+ *
+ * Revision 1.76 2002/10/11 09:24:38 mkarl
+ * Added check for HW self test results.
+ *
+ * Revision 1.75 2002/10/09 16:56:44 mkarl
+ * Now call SkGeInitAssignRamToQueues() in Init Level 1 in order to assign
+ * the adapter memory to the queues. This default assignment is not suitable
+ * for dual net mode.
+ *
+ * Revision 1.74 2002/09/12 08:45:06 rwahl
+ * Set defaults for PMSCap, PLinkSpeed & PLinkSpeedCap dependent on PHY.
+ *
+ * Revision 1.73 2002/08/16 15:19:45 rschmidt
+ * Corrected check for Tx queues in SkGeCheckQSize().
+ * Added init for new entry GIGenesis and GICopperType
+ * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
+ * Replaced wrong 1st para pAC with IoC in SK_IN/OUT macros.
+ *
+ * Revision 1.72 2002/08/12 13:38:55 rschmidt
+ * Added check if VAUX is available (stored in GIVauxAvail)
+ * Initialized PLinkSpeedCap in Port struct with SK_LSPEED_CAP_1000MBPS
+ * Editorial changes.
+ *
+ * Revision 1.71 2002/08/08 16:32:58 rschmidt
+ * Added check for Tx queues in SkGeCheckQSize().
+ * Added start of Time Stamp Timer (YUKON) in SkGeInit2().
+ * Editorial changes.
+ *
+ * Revision 1.70 2002/07/23 16:04:26 rschmidt
+ * Added init for GIWolOffs (HW-Bug in YUKON 1st rev.)
+ * Minor changes
+ *
+ * Revision 1.69 2002/07/17 17:07:08 rwahl
+ * - SkGeInit1(): fixed PHY type debug output; corrected init of GIFunc
+ * table & GIMacType.
+ * - Editorial changes.
+ *
+ * Revision 1.68 2002/07/15 18:38:31 rwahl
+ * Added initialization for MAC type dependent function table.
+ *
+ * Revision 1.67 2002/07/15 15:45:39 rschmidt
+ * Added Tx Store & Forward for YUKON (GMAC Tx FIFO is only 1 kB)
+ * Replaced SK_PHY_MARV by SK_PHY_MARV_COPPER
+ * Editorial changes
+ *
+ * Revision 1.66 2002/06/10 09:35:08 rschmidt
+ * Replaced C++ comments (//)
+ * Editorial changes
+ *
+ * Revision 1.65 2002/06/05 08:33:37 rschmidt
+ * Changed GIRamSize and Reset sequence for YUKON.
+ * SkMacInit() replaced by SkXmInitMac() resp. SkGmInitMac()
+ *
+ * Revision 1.64 2002/04/25 13:03:20 rschmidt
+ * Changes for handling YUKON.
+ * Removed reference to xmac_ii.h (not necessary).
+ * Moved all defines into header file.
+ * Replaced all SkXm...() functions with SkMac...() to handle also
+ * YUKON's GMAC.
+ * Added handling for GMAC FIFO in SkGeInitMacFifo(), SkGeStopPort().
+ * Removed 'goto'-directive from SkGeCfgSync(), SkGeCheckQSize().
+ * Replaced all XMAC-access macros by functions: SkMacRxTxDisable(),
+ * SkMacFlushTxFifo().
+ * Optimized timeout handling in SkGeStopPort().
+ * Initialized PLinkSpeed in Port struct with SK_LSPEED_AUTO.
+ * Release of GMAC Link Control reset in SkGeInit1().
+ * Initialized GIChipId and GIChipRev in GE Init structure.
+ * Added GIRamSize and PhyType values for YUKON.
+ * Removed use of PRxCmd to setup XMAC.
+ * Moved setting of XM_RX_DIS_CEXT to SkXmInitMac().
+ * Use of SkGeXmitLED() only for GENESIS.
+ * Changes for V-CPU support.
+ * Editorial changes.
+ *
* Revision 1.63 2001/04/05 11:02:09 rassmann
* Stop Port check of the STOP bit did not take 2/18 sec as wanted.
*
@@ -139,7 +302,7 @@
* chg: Default is autosensing with AUTOFULL mode
*
* Revision 1.31 1998/11/25 15:36:16 gklug
- * fix: do NOT stop LED Timer when port should be stoped
+ * fix: do NOT stop LED Timer when port should be stopped
*
* Revision 1.30 1998/11/24 13:15:28 gklug
* add: Init PCkeckPar struct member
@@ -150,8 +313,8 @@
* transmit timeouts.
* Add TestStopBit() function to handle stop RX/TX
* problem with active descriptor poll timers.
- * Bug Fix: Descriptor Poll Timer not started, beacuse
- * GIPollTimerVal was initilaized with 0.
+ * Bug Fix: Descriptor Poll Timer not started, because
+ * GIPollTimerVal was initialized with 0.
*
* Revision 1.28 1998/11/13 14:24:26 malthoff
* Bug Fix: SkGeStopPort() may hang if a Packet Arbiter Timout
@@ -181,7 +344,7 @@
*
* Revision 1.21 1998/10/20 12:11:56 malthoff
* Don't dendy the Queue config if the size of the unused
- * rx queue is zero.
+ * Rx qeueu is zero.
*
* Revision 1.20 1998/10/19 07:27:58 malthoff
* SkGeInitRamIface() is public to be called by diagnostics.
@@ -268,39 +431,23 @@
*
* Revision 1.1 1998/07/23 09:48:57 malthoff
* Creation. First dummy 'C' file.
- * SkGeInit(Level 0) is card_start for ML.
- * SkGeDeInit() is card_stop for ML.
+ * SkGeInit(Level 0) is card_start for GE.
+ * SkGeDeInit() is card_stop for GE.
*
*
******************************************************************************/
#include "h/skdrv1st.h"
-#include "h/xmac_ii.h"
#include "h/skdrv2nd.h"
-/* defines ********************************************************************/
-
-/* defines for SkGeXmitLed() */
-#define XMIT_LED_INI 0
-#define XMIT_LED_CNT (RX_LED_VAL - RX_LED_INI)
-#define XMIT_LED_CTRL (RX_LED_CTRL- RX_LED_INI)
-#define XMIT_LED_TST (RX_LED_TST - RX_LED_INI)
-
-/* Queue Size units */
-#define QZ_UNITS 0x7
-
-/* Types of RAM Buffer Queues */
-#define SK_RX_SRAM_Q 1 /* small receive queue */
-#define SK_RX_BRAM_Q 2 /* big receive queue */
-#define SK_TX_RAM_Q 3 /* small or big transmit queue */
-
-/* typedefs *******************************************************************/
/* global variables ***********************************************************/
/* local variables ************************************************************/
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
- "@(#)$Id: skgeinit.c,v 1.63 2001/04/05 11:02:09 rassmann Exp $ (C) SK ";
+ "@(#) $Id: skgeinit.c,v 1.93 2003/05/28 15:44:43 rschmidt Exp $ (C) Marvell.";
+#endif
struct s_QOffTab {
int RxQOff; /* Receive Queue Address Offset */
@@ -311,14 +458,27 @@
{Q_R1, Q_XS1, Q_XA1}, {Q_R2, Q_XS2, Q_XA2}
};
+struct s_Config {
+ char ScanString[8];
+ SK_U32 Value;
+};
+
+static struct s_Config OemConfig = {
+ {'O','E','M','_','C','o','n','f'},
+#ifdef SK_OEM_CONFIG
+ OEM_CONFIG_VALUE,
+#else
+ 0,
+#endif
+};
/******************************************************************************
*
- * SkGePollRxD() - Enable/Disable Descriptor Polling of RxD Ring
+ * SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
*
* Description:
- * Enable or disable the descriptor polling the receive descriptor
- * ring (RxD) of port 'port'.
+ * Enable or disable the descriptor polling of the receive descriptor
+ * ring (RxD) for port 'Port'.
* The new configuration is *not* saved over any SkGeStopPort() and
* SkGeInitPort() calls.
*
@@ -335,22 +495,18 @@
pPrt = &pAC->GIni.GP[Port];
- if (PollRxD) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_ENA_POL);
- }
- else {
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_DIS_POL);
- }
+ SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
+ CSR_ENA_POL : CSR_DIS_POL);
} /* SkGePollRxD */
/******************************************************************************
*
- * SkGePollTxD() - Enable/Disable Descriptor Polling of TxD Rings
+ * SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings
*
* Description:
- * Enable or disable the descriptor polling the transmit descriptor
- * ring(s) (RxD) of port 'port'.
+ * Enable or disable the descriptor polling of the transmit descriptor
+ * ring(s) (TxD) for port 'Port'.
* The new configuration is *not* saved over any SkGeStopPort() and
* SkGeInitPort() calls.
*
@@ -368,16 +524,12 @@
pPrt = &pAC->GIni.GP[Port];
- if (PollTxD) {
- DWord = CSR_ENA_POL;
- }
- else {
- DWord = CSR_DIS_POL;
- }
+ DWord = (SK_U32)(PollTxD ? CSR_ENA_POL : CSR_DIS_POL);
if (pPrt->PXSQSize != 0) {
SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), DWord);
}
+
if (pPrt->PXAQSize != 0) {
SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), DWord);
}
@@ -397,7 +549,7 @@
* Returns:
* nothing
*/
-void SkGeYellowLED(
+void SkGeYellowLED(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int State) /* yellow LED state, 0 = OFF, 0 != ON */
@@ -413,6 +565,7 @@
} /* SkGeYellowLED */
+#if (!defined(SK_SLIM) || defined(GENESIS))
/******************************************************************************
*
* SkGeXmitLED() - Modify the Operational Mode of a transmission LED.
@@ -430,7 +583,7 @@
* Returns:
* nothing
*/
-void SkGeXmitLED(
+void SkGeXmitLED(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Led, /* offset to the LED Init Value register */
@@ -468,6 +621,7 @@
* (In this case it has to be added here. But we will see. XXX)
*/
} /* SkGeXmitLED */
+#endif /* !SK_SLIM || GENESIS */
/******************************************************************************
@@ -475,9 +629,8 @@
* DoCalcAddr() - Calculates the start and the end address of a queue.
*
* Description:
- * This function calculates the start- end the end address
- * of a queue. Afterwards the 'StartVal' is incremented to the
- * next start position.
+ * This function calculates the start and the end address of a queue.
+ * Afterwards the 'StartVal' is incremented to the next start position.
* If the port is already initialized the calculated values
* will be checked against the configured values and an
* error will be returned, if they are not equal.
@@ -489,16 +642,16 @@
* 1: configuration error
*/
static int DoCalcAddr(
-SK_AC *pAC, /* adapter context */
-SK_GEPORT *pPrt, /* port index */
-int QuSize, /* size of the queue to configure in kB */
-SK_U32 *StartVal, /* start value for address calculation */
-SK_U32 *QuStartAddr, /* start addr to calculate */
-SK_U32 *QuEndAddr) /* end address to calculate */
+SK_AC *pAC, /* adapter context */
+SK_GEPORT SK_FAR *pPrt, /* port index */
+int QuSize, /* size of the queue to configure in kB */
+SK_U32 SK_FAR *StartVal, /* start value for address calculation */
+SK_U32 SK_FAR *QuStartAddr,/* start addr to calculate */
+SK_U32 SK_FAR *QuEndAddr) /* end address to calculate */
{
SK_U32 EndVal;
SK_U32 NextStart;
- int Rtv;
+ int Rtv;
Rtv = 0;
if (QuSize == 0) {
@@ -521,9 +674,124 @@
}
*StartVal = NextStart;
- return (Rtv);
+ return(Rtv);
} /* DoCalcAddr */
+/******************************************************************************
+ *
+ * SkGeInitAssignRamToQueues() - allocate default queue sizes
+ *
+ * Description:
+ * This function assigns the memory to the different queues and ports.
+ * When DualNet is set to SK_TRUE all ports get the same amount of memory.
+ * Otherwise the first port gets most of the memory and all the
+ * other ports just the required minimum.
+ * This function can only be called when pAC->GIni.GIRamSize and
+ * pAC->GIni.GIMacsFound have been initialized, usually this happens
+ * at init level 1
+ *
+ * Returns:
+ * 0 - ok
+ * 1 - invalid input values
+ * 2 - not enough memory
+ */
+
+int SkGeInitAssignRamToQueues(
+SK_AC *pAC, /* Adapter context */
+int ActivePort, /* Active Port in RLMT mode */
+SK_BOOL DualNet) /* adapter context */
+{
+ int i;
+ int UsedKilobytes; /* memory already assigned */
+ int ActivePortKilobytes; /* memory available for active port */
+ SK_GEPORT *pGePort;
+
+ UsedKilobytes = 0;
+
+ if (ActivePort >= pAC->GIni.GIMacsFound) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
+ ("SkGeInitAssignRamToQueues: ActivePort (%d) invalid\n",
+ ActivePort));
+ return(1);
+ }
+ if (((pAC->GIni.GIMacsFound * (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE)) +
+ ((RAM_QUOTA_SYNC == 0) ? 0 : SK_MIN_TXQ_SIZE)) > pAC->GIni.GIRamSize) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
+ ("SkGeInitAssignRamToQueues: Not enough memory (%d)\n",
+ pAC->GIni.GIRamSize));
+ return(2);
+ }
+
+ if (DualNet) {
+ /* every port gets the same amount of memory */
+ ActivePortKilobytes = pAC->GIni.GIRamSize / pAC->GIni.GIMacsFound;
+ for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
+
+ pGePort = &pAC->GIni.GP[i];
+
+ /* take away the minimum memory for active queues */
+ ActivePortKilobytes -= (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE);
+
+ /* receive queue gets the minimum + 80% of the rest */
+ pGePort->PRxQSize = (int) (ROUND_QUEUE_SIZE_KB((
+ ActivePortKilobytes * (unsigned long) RAM_QUOTA_RX) / 100))
+ + SK_MIN_RXQ_SIZE;
+
+ ActivePortKilobytes -= (pGePort->PRxQSize - SK_MIN_RXQ_SIZE);
+
+ /* synchronous transmit queue */
+ pGePort->PXSQSize = 0;
+
+ /* asynchronous transmit queue */
+ pGePort->PXAQSize = (int) ROUND_QUEUE_SIZE_KB(ActivePortKilobytes +
+ SK_MIN_TXQ_SIZE);
+ }
+ }
+ else {
+ /* Rlmt Mode or single link adapter */
+
+ /* Set standby queue size defaults for all standby ports */
+ for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
+
+ if (i != ActivePort) {
+ pGePort = &pAC->GIni.GP[i];
+
+ pGePort->PRxQSize = SK_MIN_RXQ_SIZE;
+ pGePort->PXAQSize = SK_MIN_TXQ_SIZE;
+ pGePort->PXSQSize = 0;
+
+ /* Count used RAM */
+ UsedKilobytes += pGePort->PRxQSize + pGePort->PXAQSize;
+ }
+ }
+ /* what's left? */
+ ActivePortKilobytes = pAC->GIni.GIRamSize - UsedKilobytes;
+
+ /* assign it to the active port */
+ /* first take away the minimum memory */
+ ActivePortKilobytes -= (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE);
+ pGePort = &pAC->GIni.GP[ActivePort];
+
+ /* receive queue get's the minimum + 80% of the rest */
+ pGePort->PRxQSize = (int) (ROUND_QUEUE_SIZE_KB((ActivePortKilobytes *
+ (unsigned long) RAM_QUOTA_RX) / 100)) + SK_MIN_RXQ_SIZE;
+
+ ActivePortKilobytes -= (pGePort->PRxQSize - SK_MIN_RXQ_SIZE);
+
+ /* synchronous transmit queue */
+ pGePort->PXSQSize = 0;
+
+ /* asynchronous transmit queue */
+ pGePort->PXAQSize = (int) ROUND_QUEUE_SIZE_KB(ActivePortKilobytes) +
+ SK_MIN_TXQ_SIZE;
+ }
+#ifdef VCPU
+ VCPUprintf(0, "PRxQSize=%u, PXSQSize=%u, PXAQSize=%u\n",
+ pGePort->PRxQSize, pGePort->PXSQSize, pGePort->PXAQSize);
+#endif /* VCPU */
+
+ return(0);
+} /* SkGeInitAssignRamToQueues */
/******************************************************************************
*
@@ -531,18 +799,20 @@
*
* Description:
* This function verifies the Queue Size Configuration specified
- * in the variabels PRxQSize, PXSQSize, and PXAQSize of all
+ * in the variables PRxQSize, PXSQSize, and PXAQSize of all
* used ports.
* This requirements must be fullfilled to have a valid configuration:
* - The size of all queues must not exceed GIRamSize.
* - The queue sizes must be specified in units of 8 kB.
- * - The size of rx queues of available ports must not be
- * smaller than 16kB.
+ * - The size of Rx queues of available ports must not be
+ * smaller than 16 kB.
+ * - The size of at least one Tx queue (synch. or asynch.)
+ * of available ports must not be smaller than 16 kB
+ * when Jumbo Frames are used.
* - The RAM start and end addresses must not be changed
* for ports which are already initialized.
- * Furthermore SkGeCheckQSize() defines the Start and End
- * Addresses of all ports and stores them into the HWAC port
- * structure.
+ * Furthermore SkGeCheckQSize() defines the Start and End Addresses
+ * of all ports and stores them into the HWAC port structure.
*
* Returns:
* 0: Queue Size Configuration valid
@@ -553,39 +823,55 @@
int Port) /* port index */
{
SK_GEPORT *pPrt;
- int UsedMem;
int i;
int Rtv;
int Rtv2;
SK_U32 StartAddr;
+#ifndef SK_SLIM
+ int UsedMem; /* total memory used (max. found ports) */
+#endif
- UsedMem = 0;
Rtv = 0;
+
+#ifndef SK_SLIM
+
+ UsedMem = 0;
for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
pPrt = &pAC->GIni.GP[i];
- if (( pPrt->PRxQSize & QZ_UNITS) ||
- (pPrt->PXSQSize & QZ_UNITS) ||
- (pPrt->PXAQSize & QZ_UNITS)) {
+ if ((pPrt->PRxQSize & QZ_UNITS) != 0 ||
+ (pPrt->PXSQSize & QZ_UNITS) != 0 ||
+ (pPrt->PXAQSize & QZ_UNITS) != 0) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
- Rtv = 1;
- goto CheckQSizeEnd;
+ return(1);
}
- UsedMem += pPrt->PRxQSize + pPrt->PXSQSize + pPrt->PXAQSize;
-
if (i == Port && pPrt->PRxQSize < SK_MIN_RXQ_SIZE) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E011, SKERR_HWI_E011MSG);
- Rtv = 1;
- goto CheckQSizeEnd;
+ return(1);
+ }
+
+ /*
+ * the size of at least one Tx queue (synch. or asynch.) has to be > 0.
+ * if Jumbo Frames are used, this size has to be >= 16 kB.
+ */
+ if ((i == Port && pPrt->PXSQSize == 0 && pPrt->PXAQSize == 0) ||
+ (pAC->GIni.GIPortUsage == SK_JUMBO_LINK &&
+ ((pPrt->PXSQSize > 0 && pPrt->PXSQSize < SK_MIN_TXQ_SIZE) ||
+ (pPrt->PXAQSize > 0 && pPrt->PXAQSize < SK_MIN_TXQ_SIZE)))) {
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E023, SKERR_HWI_E023MSG);
+ return(1);
}
+
+ UsedMem += pPrt->PRxQSize + pPrt->PXSQSize + pPrt->PXAQSize;
}
+
if (UsedMem > pAC->GIni.GIRamSize) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
- Rtv = 1;
- goto CheckQSizeEnd;
+ return(1);
}
+#endif /* !SK_SLIM */
/* Now start address calculation */
StartAddr = pAC->GIni.GIRamOffs;
@@ -597,27 +883,27 @@
&pPrt->PRxQRamStart, &pPrt->PRxQRamEnd);
Rtv |= Rtv2;
- /* Calculate/Check values for the synchronous tx queue */
+ /* Calculate/Check values for the synchronous Tx queue */
Rtv2 = DoCalcAddr(pAC, pPrt, pPrt->PXSQSize, &StartAddr,
&pPrt->PXsQRamStart, &pPrt->PXsQRamEnd);
Rtv |= Rtv2;
- /* Calculate/Check values for the asynchronous tx queue */
+ /* Calculate/Check values for the asynchronous Tx queue */
Rtv2 = DoCalcAddr(pAC, pPrt, pPrt->PXAQSize, &StartAddr,
&pPrt->PXaQRamStart, &pPrt->PXaQRamEnd);
Rtv |= Rtv2;
if (Rtv) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E013, SKERR_HWI_E013MSG);
- break;
+ return(1);
}
}
-CheckQSizeEnd:
- return (Rtv);
+ return(0);
} /* SkGeCheckQSize */
+#ifdef GENESIS
/******************************************************************************
*
* SkGeInitMacArb() - Initialize the MAC Arbiter
@@ -625,10 +911,10 @@
* Description:
* This function initializes the MAC Arbiter.
* It must not be called if there is still an
- * initilaized or active port.
+ * initialized or active port.
*
* Returns:
- * nothing:
+ * nothing
*/
static void SkGeInitMacArb(
SK_AC *pAC, /* adapter context */
@@ -652,7 +938,7 @@
/* Fast Output Enable Mode was intended to use with Rev. B2, but now? */
/*
- * There is not start or enable buttom to push, therefore
+ * There is no start or enable button to push, therefore
* the MAC arbiter is configured and enabled now.
*/
} /* SkGeInitMacArb */
@@ -665,10 +951,10 @@
* Description:
* This function initializes the Packet Arbiter.
* It must not be called if there is still an
- * initilaized or active port.
+ * initialized or active port.
*
* Returns:
- * nothing:
+ * nothing
*/
static void SkGeInitPktArb(
SK_AC *pAC, /* adapter context */
@@ -693,10 +979,11 @@
SK_OUT16(IoC, B3_PA_CTRL, PA_ENA_TO_TX1);
}
else {
- SK_OUT16(IoC, B3_PA_CTRL,(PA_ENA_TO_TX1 | PA_ENA_TO_TX2));
+ SK_OUT16(IoC, B3_PA_CTRL, PA_ENA_TO_TX1 | PA_ENA_TO_TX2);
}
}
} /* SkGeInitPktArb */
+#endif /* GENESIS */
/******************************************************************************
@@ -714,6 +1001,10 @@
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
+ SK_U16 Word;
+#ifdef VCPU
+ SK_U32 DWord;
+#endif /* VCPU */
/*
* For each FIFO:
* - release local reset
@@ -721,23 +1012,63 @@
* - setup defaults for the control register
* - enable the FIFO
*/
- /* Configure RX MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_CLR);
- SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_RX_CTRL_DEF);
- SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_ENA_OP_MD);
-
- /* Configure TX MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_CLR);
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF);
- SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_ENA_OP_MD);
-
- /* Enable frame flushing if jumbo frames used */
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_FLUSH);
+
+ Word = (SK_U16)GMF_RX_CTRL_DEF;
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* Configure Rx MAC FIFO */
+ SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_CLR);
+ SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_RX_CTRL_DEF);
+ SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_ENA_OP_MD);
+
+ /* Configure Tx MAC FIFO */
+ SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_CLR);
+ SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF);
+ SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_ENA_OP_MD);
+
+ /* Enable frame flushing if jumbo frames used */
+ if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
+ SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_FLUSH);
+ }
}
-} /* SkGeInitMacFifo */
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* set Rx GMAC FIFO Flush Mask */
+ SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_MSK), (SK_U16)RX_FF_FL_DEF_MSK);
+
+ /* disable Rx GMAC FIFO Flush for YUKON-Lite Rev. A0 only */
+ if (pAC->GIni.GIYukonLite && pAC->GIni.GIChipId == CHIP_ID_YUKON) {
+
+ Word &= ~GMF_RX_F_FL_ON;
+ }
+
+ /* Configure Rx MAC FIFO */
+ SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_RST_CLR);
+ SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), Word);
+
+ /* set Rx GMAC FIFO Flush Threshold (default: 0x0a -> 56 bytes) */
+ SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF);
+
+ /* Configure Tx MAC FIFO */
+ SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_CLR);
+ SK_OUT16(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U16)GMF_TX_CTRL_DEF);
+
+#ifdef VCPU
+ SK_IN32(IoC, MR_ADDR(Port, RX_GMF_AF_THR), &DWord);
+ SK_IN32(IoC, MR_ADDR(Port, TX_GMF_AE_THR), &DWord);
+#endif /* VCPU */
+
+ /* set Tx GMAC FIFO Almost Empty Threshold */
+/* SK_OUT32(IoC, MR_ADDR(Port, TX_GMF_AE_THR), 0); */
+ }
+#endif /* YUKON */
+} /* SkGeInitMacFifo */
+#ifdef SK_LNK_SYNC_CNT
/******************************************************************************
*
* SkGeLoadLnkSyncCnt() - Load the Link Sync Counter and starts counting
@@ -750,11 +1081,11 @@
*
* Note:
* o To ensure receiving the Link Sync Event the LinkSyncCounter
- * should be initialized BEFORE clearing the XMACs reset!
+ * should be initialized BEFORE clearing the XMAC's reset!
* o Enable IS_LNK_SYNC_M1 and IS_LNK_SYNC_M2 after calling this
* function.
*
- * Retruns:
+ * Returns:
* nothing
*/
void SkGeLoadLnkSyncCnt(
@@ -784,13 +1115,13 @@
SK_IN32(IoC, B0_IMSK, &OrgIMsk);
if (Port == MAC_1) {
NewIMsk = OrgIMsk & ~IS_LNK_SYNC_M1;
- if (ISrc & IS_LNK_SYNC_M1) {
+ if ((ISrc & IS_LNK_SYNC_M1) != 0) {
IrqPend = SK_TRUE;
}
}
else {
NewIMsk = OrgIMsk & ~IS_LNK_SYNC_M2;
- if (ISrc & IS_LNK_SYNC_M2) {
+ if ((ISrc & IS_LNK_SYNC_M2) != 0) {
IrqPend = SK_TRUE;
}
}
@@ -810,8 +1141,9 @@
SK_OUT32(IoC, B0_IMSK, OrgIMsk);
}
} /* SkGeLoadLnkSyncCnt*/
+#endif /* SK_LNK_SYNC_CNT */
-
+#if defined(SK_DIAG) || defined(SK_CFG_SYNC)
/******************************************************************************
*
* SkGeCfgSync() - Configure synchronous bandwidth for this port.
@@ -829,14 +1161,14 @@
* TXA_ENA_FSYNC. This means if the size of
* the synchronous queue is unequal zero but no specific
* synchronous bandwidth is configured, the synchronous queue
- * will always have the 'unlimitted' transmit priority!
+ * will always have the 'unlimited' transmit priority!
*
* This mode will be restored if the synchronous bandwidth is
* deallocated ('IntTime' = 0 and 'LimCount' = 0).
*
* Returns:
* 0: success
- * 1: paramter configuration error
+ * 1: parameter configuration error
* 2: try to configure quality of service although no
* synchronous queue is configured
*/
@@ -855,59 +1187,60 @@
/* check the parameters */
if (LimCount > IntTime ||
(LimCount == 0 && IntTime != 0) ||
- (LimCount !=0 && IntTime == 0)) {
+ (LimCount != 0 && IntTime == 0)) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
- Rtv = 1;
- goto CfgSyncEnd;
+ return(1);
}
- if (pAC->GIni.GP[Port].PXSQSize != 0) {
- /* calculate register values */
- IntTime = (IntTime / 2) * pAC->GIni.GIHstClkFact / 100;
- LimCount = LimCount / 8;
- if (IntTime > TXA_MAX_VAL || LimCount > TXA_MAX_VAL) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
- Rtv = 1;
- goto CfgSyncEnd;
- }
-
- /*
- * - Enable 'Force Sync' to ensure the synchronous queue
- * has the priority while configuring the new values.
- * - Also 'disable alloc' to ensure the settings complies
- * to the SyncMode parameter.
- * - Disable 'Rate Control' to configure the new values.
- * - write IntTime and Limcount
- * - start 'Rate Control' and disable 'Force Sync'
- * if Interval Timer or Limit Counter not zero.
- */
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
- TXA_ENA_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
- SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), IntTime);
- SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), LimCount);
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
- (SyncMode & (TXA_ENA_ALLOC|TXA_DIS_ALLOC)));
- if (IntTime != 0 || LimCount != 0) {
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
- TXA_DIS_FSYNC|TXA_START_RC);
- }
- }
- else {
+
+ if (pAC->GIni.GP[Port].PXSQSize == 0) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E009, SKERR_HWI_E009MSG);
- Rtv = 2;
+ return(2);
+ }
+
+ /* calculate register values */
+ IntTime = (IntTime / 2) * pAC->GIni.GIHstClkFact / 100;
+ LimCount = LimCount / 8;
+
+ if (IntTime > TXA_MAX_VAL || LimCount > TXA_MAX_VAL) {
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
+ return(1);
+ }
+
+ /*
+ * - Enable 'Force Sync' to ensure the synchronous queue
+ * has the priority while configuring the new values.
+ * - Also 'disable alloc' to ensure the settings complies
+ * to the SyncMode parameter.
+ * - Disable 'Rate Control' to configure the new values.
+ * - write IntTime and LimCount
+ * - start 'Rate Control' and disable 'Force Sync'
+ * if Interval Timer or Limit Counter not zero.
+ */
+ SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
+ TXA_ENA_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
+
+ SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), IntTime);
+ SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), LimCount);
+
+ SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
+ (SK_U8)(SyncMode & (TXA_ENA_ALLOC | TXA_DIS_ALLOC)));
+
+ if (IntTime != 0 || LimCount != 0) {
+ SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL), TXA_DIS_FSYNC | TXA_START_RC);
}
-CfgSyncEnd:
- return (Rtv);
+ return(0);
} /* SkGeCfgSync */
+#endif /* SK_DIAG || SK_CFG_SYNC*/
/******************************************************************************
*
- * DoInitRamQueue() - Initilaize the RAM Buffer Address of a single Queue
+ * DoInitRamQueue() - Initialize the RAM Buffer Address of a single Queue
*
* Desccription:
- * If the queue is used, enable and initilaize it.
+ * If the queue is used, enable and initialize it.
* Make sure the queue is still reset, if it is not used.
*
* Returns:
@@ -952,22 +1285,21 @@
/* write threshold for Rx Queue */
SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RX_UTPP), RxUpThresVal);
- SK_OUT32(IoC, RB_ADDR(QuIoOffs,RB_RX_LTPP), RxLoThresVal);
+ SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RX_LTPP), RxLoThresVal);
/* the high priority threshold not used */
break;
case SK_TX_RAM_Q:
/*
- * Do NOT use Store and forward under normal
- * operation due to performance optimization.
- * But if Jumbo frames are configured we NEED
- * the store and forward of the RAM buffer.
+ * Do NOT use Store & Forward under normal operation due to
+ * performance optimization (GENESIS only).
+ * But if Jumbo Frames are configured (XMAC Tx FIFO is only 4 kB)
+ * or YUKON is used ((GMAC Tx FIFO is only 1 kB)
+ * we NEED Store & Forward of the RAM buffer.
*/
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- /*
- * enable Store & Forward Mode for the
- * Tx Side
- */
+ if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK ||
+ pAC->GIni.GIYukon) {
+ /* enable Store & Forward Mode for the Tx Side */
SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_ENA_STFWD);
}
break;
@@ -980,7 +1312,7 @@
/* ensure the queue is still disabled */
SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_RST_SET);
}
-} /* DoInitRamQueue*/
+} /* DoInitRamQueue */
/******************************************************************************
@@ -1012,10 +1344,13 @@
DoInitRamQueue(pAC, IoC, pPrt->PRxQOff, pPrt->PRxQRamStart,
pPrt->PRxQRamEnd, RxQType);
+
DoInitRamQueue(pAC, IoC, pPrt->PXsQOff, pPrt->PXsQRamStart,
pPrt->PXsQRamEnd, SK_TX_RAM_Q);
+
DoInitRamQueue(pAC, IoC, pPrt->PXaQOff, pPrt->PXaQRamStart,
pPrt->PXaQRamEnd, SK_TX_RAM_Q);
+
} /* SkGeInitRamBufs */
@@ -1024,7 +1359,7 @@
* SkGeInitRamIface() - Initialize the RAM Interface
*
* Description:
- * This function initializes the Adapbers RAM Interface.
+ * This function initializes the Adapters RAM Interface.
*
* Note:
* This function is used in the diagnostics.
@@ -1052,6 +1387,7 @@
SK_OUT8(IoC, B3_RI_RTO_R2, SK_RI_TO_53);
SK_OUT8(IoC, B3_RI_RTO_XA2, SK_RI_TO_53);
SK_OUT8(IoC, B3_RI_RTO_XS2, SK_RI_TO_53);
+
} /* SkGeInitRamIface */
@@ -1070,25 +1406,37 @@
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
- SK_GEPORT *pPrt;
+ SK_GEPORT *pPrt;
+ SK_U32 RxWm;
+ SK_U32 TxWm;
pPrt = &pAC->GIni.GP[Port];
+ RxWm = SK_BMU_RX_WM;
+ TxWm = SK_BMU_TX_WM;
+
+ if (!pAC->GIni.GIPciSlot64 && !pAC->GIni.GIPciClock66) {
+ /* for better performance */
+ RxWm /= 2;
+ TxWm /= 2;
+ }
+
/* Rx Queue: Release all local resets and set the watermark */
SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_CLR_RESET);
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_F), SK_BMU_RX_WM);
+ SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_F), RxWm);
/*
- * Tx Queue: Release all local resets if the queue is used!
+ * Tx Queue: Release all local resets if the queue is used !
* set watermark
*/
if (pPrt->PXSQSize != 0) {
SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_CLR_RESET);
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_F), SK_BMU_TX_WM);
+ SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_F), TxWm);
}
+
if (pPrt->PXAQSize != 0) {
SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_CLR_RESET);
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_F), SK_BMU_TX_WM);
+ SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_F), TxWm);
}
/*
* Do NOT enable the descriptor poll timers here, because
@@ -1107,7 +1455,7 @@
* that RX/TX stop is done and SV idle is NOT set.
* In this case we have to issue another stop command.
*
- * Retruns:
+ * Returns:
* The queues control status register
*/
static SK_U32 TestStopBit(
@@ -1118,12 +1466,16 @@
SK_U32 QuCsr; /* CSR contents */
SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
- if ((QuCsr & (CSR_STOP|CSR_SV_IDLE)) == 0) {
+
+ if ((QuCsr & (CSR_STOP | CSR_SV_IDLE)) == 0) {
+ /* Stop Descriptor overridden by start command */
SK_OUT32(IoC, Q_ADDR(QuIoOffs, Q_CSR), CSR_STOP);
+
SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
}
- return (QuCsr);
-} /* TestStopBit*/
+
+ return(QuCsr);
+} /* TestStopBit */
/******************************************************************************
@@ -1131,31 +1483,31 @@
* SkGeStopPort() - Stop the Rx/Tx activity of the port 'Port'.
*
* Description:
- * After calling this function the descriptor rings and rx and tx
+ * After calling this function the descriptor rings and Rx and Tx
* queues of this port may be reconfigured.
*
* It is possible to stop the receive and transmit path separate or
* both together.
*
- * Dir = SK_STOP_TX Stops the transmit path only and resets
- * the XMAC. The receive queue is still and
- * the pending rx frames may still transfered
+ * Dir = SK_STOP_TX Stops the transmit path only and resets the MAC.
+ * The receive queue is still active and
+ * the pending Rx frames may be still transferred
* into the RxD.
* SK_STOP_RX Stop the receive path. The tansmit path
- * has to be stoped once before.
+ * has to be stopped once before.
* SK_STOP_ALL SK_STOP_TX + SK_STOP_RX
*
- * RstMode=SK_SOFT_RST Resets the XMAC. The PHY is still alive.
- * SK_HARD_RST Resets the XMAC and the PHY.
+ * RstMode = SK_SOFT_RST Resets the MAC. The PHY is still alive.
+ * SK_HARD_RST Resets the MAC and the PHY.
*
* Example:
* 1) A Link Down event was signaled for a port. Therefore the activity
- * of this port should be stoped and a hardware reset should be issued
- * to enable the workaround of XMAC errata #2. But the received frames
+ * of this port should be stopped and a hardware reset should be issued
+ * to enable the workaround of XMAC Errata #2. But the received frames
* should not be discarded.
* ...
* SkGeStopPort(pAC, IoC, Port, SK_STOP_TX, SK_HARD_RST);
- * (transfer all pending rx frames)
+ * (transfer all pending Rx frames)
* SkGeStopPort(pAC, IoC, Port, SK_STOP_RX, SK_HARD_RST);
* ...
*
@@ -1170,29 +1522,29 @@
*
* Extended Description:
* If SK_STOP_TX is set,
- * o disable the XMACs receive and transmiter to prevent
+ * o disable the MAC's receive and transmitter to prevent
* from sending incomplete frames
* o stop the port's transmit queues before terminating the
* BMUs to prevent from performing incomplete PCI cycles
* on the PCI bus
- * - The network rx and tx activity and PCI tx transfer is
+ * - The network Rx and Tx activity and PCI Tx transfer is
* disabled now.
- * o reset the XMAC depending on the RstMode
+ * o reset the MAC depending on the RstMode
* o Stop Interval Timer and Limit Counter of Tx Arbiter,
* also disable Force Sync bit and Enable Alloc bit.
- * o perform a local reset of the port's tx path
- * - reset the PCI FIFO of the async tx queue
- * - reset the PCI FIFO of the sync tx queue
- * - reset the RAM Buffer async tx queue
- * - reset the RAM Butter sync tx queue
+ * o perform a local reset of the port's Tx path
+ * - reset the PCI FIFO of the async Tx queue
+ * - reset the PCI FIFO of the sync Tx queue
+ * - reset the RAM Buffer async Tx queue
+ * - reset the RAM Buffer sync Tx queue
* - reset the MAC Tx FIFO
* o switch Link and Tx LED off, stop the LED counters
*
* If SK_STOP_RX is set,
* o stop the port's receive queue
* - The path data transfer activity is fully stopped now.
- * o perform a local reset of the port's rx path
- * - reset the PCI FIFO of the rx queue
+ * o perform a local reset of the port's Rx path
+ * - reset the PCI FIFO of the Rx queue
* - reset the RAM Buffer receive queue
* - reset the MAC Rx FIFO
* o switch Rx LED off, stop the LED counter
@@ -1204,36 +1556,30 @@
* o This function may be called during the driver states RESET_PORT and
* SWITCH_PORT.
*/
-void SkGeStopPort(
+void SkGeStopPort(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
int Port, /* port to stop (MAC_1 + n) */
int Dir, /* Direction to Stop (SK_STOP_RX, SK_STOP_TX, SK_STOP_ALL) */
int RstMode)/* Reset Mode (SK_SOFT_RST, SK_HARD_RST) */
{
-#ifndef SK_DIAG
+#ifndef SK_DIAG
SK_EVPARA Para;
-#endif /* !SK_DIAG */
+#endif /* !SK_DIAG */
SK_GEPORT *pPrt;
SK_U32 DWord;
- SK_U16 Word;
SK_U32 XsCsr;
SK_U32 XaCsr;
- int i;
- SK_BOOL AllPortsDis;
SK_U64 ToutStart;
+ int i;
int ToutCnt;
pPrt = &pAC->GIni.GP[Port];
- if (Dir & SK_STOP_TX) {
- /* disable the XMACs receiver and transmitter */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
-
- /* dummy read to ensure writing */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
+ if ((Dir & SK_STOP_TX) != 0) {
+ /* disable receiver and transmitter */
+ SkMacRxTxDisable(pAC, IoC, Port);
+
/* stop both transmit queues */
/*
* If the BMU is in the reset state CSR_STOP will terminate
@@ -1249,21 +1595,14 @@
* Clear packet arbiter timeout to make sure
* this loop will terminate.
*/
- if (Port == MAC_1) {
- Word = PA_CLR_TO_TX1;
- }
- else {
- Word = PA_CLR_TO_TX2;
- }
- SK_OUT16(IoC, B3_PA_CTRL, Word);
+ SK_OUT16(IoC, B3_PA_CTRL, (SK_U16)((Port == MAC_1) ?
+ PA_CLR_TO_TX1 : PA_CLR_TO_TX2));
/*
- * If the transfer stucks at the XMAC the STOP command will not
- * terminate if we don't flush the XMAC's transmit FIFO!
+ * If the transfer stucks at the MAC the STOP command will not
+ * terminate if we don't flush the XMAC's transmit FIFO !
*/
- XM_IN32(IoC, Port, XM_MODE, &DWord);
- DWord |= XM_MD_FTF;
- XM_OUT32(IoC, Port, XM_MODE, DWord);
+ SkMacFlushTxFifo(pAC, IoC, Port);
XsCsr = TestStopBit(pAC, IoC, pPrt->PXsQOff);
XaCsr = TestStopBit(pAC, IoC, pPrt->PXaQOff);
@@ -1274,40 +1613,32 @@
* This needs to be checked at 1/18 sec only.
*/
ToutCnt++;
- switch (ToutCnt) {
- case 1:
- /*
- * Cache Incoherency workaround: Assume a start command
- * has been lost while sending the frame.
- */
- ToutStart = SkOsGetTime(pAC);
- if (XsCsr & CSR_STOP) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_START);
- }
- if (XaCsr & CSR_STOP) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_START);
- }
- break;
- case 2:
- default:
+ if (ToutCnt > 1) {
/* Might be a problem when the driver event handler
- * calls StopPort again.
- * XXX.
+ * calls StopPort again. XXX.
*/
/* Fatal Error, Loop aborted */
- /* Create an Error Log Entry */
- SK_ERR_LOG(
- pAC,
- SK_ERRCL_HW,
- SKERR_HWI_E018,
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E018,
SKERR_HWI_E018MSG);
#ifndef SK_DIAG
Para.Para64 = Port;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
-#endif /* !SK_DIAG */
+#endif /* !SK_DIAG */
return;
}
+ /*
+ * Cache incoherency workaround: Assume a start command
+ * has been lost while sending the frame.
+ */
+ ToutStart = SkOsGetTime(pAC);
+
+ if ((XsCsr & CSR_STOP) != 0) {
+ SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_START);
+ }
+ if ((XaCsr & CSR_STOP) != 0) {
+ SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_START);
+ }
}
/*
@@ -1315,46 +1646,56 @@
* required to wait until CSR_STOP is reset and CSR_SV_IDLE is set.
*/
} while ((XsCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE ||
- (XaCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
+ (XaCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
- /* reset the XMAC depending on the RstMode */
+ /* Reset the MAC depending on the RstMode */
if (RstMode == SK_SOFT_RST) {
- SkXmSoftRst(pAC, IoC, Port);
+ SkMacSoftRst(pAC, IoC, Port);
}
else {
- SkXmHardRst(pAC, IoC, Port);
+ SkMacHardRst(pAC, IoC, Port);
}
-
- /*
- * Stop Interval Timer and Limit Counter of Tx Arbiter,
- * also disable Force Sync bit and Enable Alloc bit.
- */
+
+ /* Disable Force Sync bit and Enable Alloc bit */
SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
- SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), 0x00000000L);
- SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), 0x00000000L);
+
+ /* Stop Interval Timer and Limit Counter of Tx Arbiter */
+ SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), 0L);
+ SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), 0L);
- /*
- * perform a local reset of the port's tx path
- * - reset the PCI FIFO of the async tx queue
- * - reset the PCI FIFO of the sync tx queue
- * - reset the RAM Buffer async tx queue
- * - reset the RAM Butter sync tx queue
- * - reset the MAC Tx FIFO
- */
+ /* Perform a local reset of the port's Tx path */
+
+ /* Reset the PCI FIFO of the async Tx queue */
SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_SET_RESET);
+ /* Reset the PCI FIFO of the sync Tx queue */
SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_SET_RESET);
+ /* Reset the RAM Buffer async Tx queue */
SK_OUT8(IoC, RB_ADDR(pPrt->PXaQOff, RB_CTRL), RB_RST_SET);
+ /* Reset the RAM Buffer sync Tx queue */
SK_OUT8(IoC, RB_ADDR(pPrt->PXsQOff, RB_CTRL), RB_RST_SET);
- /* Note: MFF_RST_SET does NOT reset the XMAC! */
- SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_SET);
-
- /* switch Link and Tx LED off, stop the LED counters */
- /* Link LED is switched off by the RLMT and the Diag itself */
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_DIS);
+
+ /* Reset Tx MAC FIFO */
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* Note: MFF_RST_SET does NOT reset the XMAC ! */
+ SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_SET);
+
+ /* switch Link and Tx LED off, stop the LED counters */
+ /* Link LED is switched off by the RLMT and the Diag itself */
+ SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_DIS);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* Reset TX MAC FIFO */
+ SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
+ }
+#endif /* YUKON */
}
- if (Dir & SK_STOP_RX) {
+ if ((Dir & SK_STOP_RX) != 0) {
/*
* The RX Stop Command will not terminate if no buffers
* are queued in the RxD ring. But it will always reach
@@ -1363,64 +1704,57 @@
*/
/* stop the port's receive queue */
SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_STOP);
+
i = 100;
do {
/*
* Clear packet arbiter timeout to make sure
* this loop will terminate
*/
- if (Port == MAC_1) {
- Word = PA_CLR_TO_RX1;
- }
- else {
- Word = PA_CLR_TO_RX2;
- }
- SK_OUT16(IoC, B3_PA_CTRL, Word);
+ SK_OUT16(IoC, B3_PA_CTRL, (SK_U16)((Port == MAC_1) ?
+ PA_CLR_TO_RX1 : PA_CLR_TO_RX2));
DWord = TestStopBit(pAC, IoC, pPrt->PRxQOff);
- if (i != 0) {
- i--;
- }
- /* finish if CSR_STOP is done or CSR_SV_IDLE is true and i==0 */
+ /* timeout if i==0 (bug fix for #10748) */
+ if (--i == 0) {
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E024,
+ SKERR_HWI_E024MSG);
+ break;
+ }
/*
* because of the ASIC problem report entry from 21.08.98
* it is required to wait until CSR_STOP is reset and
* CSR_SV_IDLE is set.
*/
- } while ((DWord & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE &&
- ((DWord & CSR_SV_IDLE) == 0 || i != 0));
+ } while ((DWord & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
- /* The path data transfer activity is fully stopped now. */
+ /* The path data transfer activity is fully stopped now */
- /*
- * perform a local reset of the port's rx path
- * - reset the PCI FIFO of the rx queue
- * - reset the RAM Buffer receive queue
- * - reset the MAC Rx FIFO
- */
+ /* Perform a local reset of the port's Rx path */
+
+ /* Reset the PCI FIFO of the Rx queue */
SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_SET_RESET);
+ /* Reset the RAM Buffer receive queue */
SK_OUT8(IoC, RB_ADDR(pPrt->PRxQOff, RB_CTRL), RB_RST_SET);
- SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_SET);
-
- /* switch Rx LED off, stop the LED counter */
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_DIS);
- }
-
- /*
- * If all ports are stopped reset the RAM Interface.
- */
- for (i = 0, AllPortsDis = SK_TRUE; i < pAC->GIni.GIMacsFound; i++) {
- if (pAC->GIni.GP[i].PState != SK_PRT_RESET &&
- pAC->GIni.GP[i].PState != SK_PRT_STOP) {
+ /* Reset Rx MAC FIFO */
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_SET);
- AllPortsDis = SK_FALSE;
- break;
+ /* switch Rx LED off, stop the LED counter */
+ SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_DIS);
}
- }
- if (AllPortsDis) {
- pAC->GIni.GIAnyPortAct = SK_FALSE;
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* Reset Rx MAC FIFO */
+ SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
+ }
+#endif /* YUKON */
}
} /* SkGeStopPort */
@@ -1444,12 +1778,12 @@
for (i = 0; i < SK_MAX_MACS; i++) {
pPrt = &pAC->GIni.GP[i];
+
pPrt->PState = SK_PRT_RESET;
pPrt->PRxQOff = QOffTab[i].RxQOff;
pPrt->PXsQOff = QOffTab[i].XsQOff;
pPrt->PXaQOff = QOffTab[i].XaQOff;
pPrt->PCheckPar = SK_FALSE;
- pPrt->PRxCmd = XM_RX_STRIP_FCS | XM_RX_LENERR_OK;
pPrt->PIsave = 0;
pPrt->PPrevShorts = 0;
pPrt->PLinkResCt = 0;
@@ -1457,26 +1791,30 @@
pPrt->PPrevRx = 0;
pPrt->PPrevFcs = 0;
pPrt->PRxLim = SK_DEF_RX_WA_LIM;
- pPrt->PLinkMode = SK_LMODE_AUTOFULL;
- pPrt->PLinkModeConf = SK_LMODE_AUTOSENSE;
- pPrt->PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
- pPrt->PLinkBroken = SK_TRUE; /* See WA code */
- pPrt->PLinkCap = (SK_LMODE_CAP_HALF | SK_LMODE_CAP_FULL |
- SK_LMODE_CAP_AUTOHALF | SK_LMODE_CAP_AUTOFULL);
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
- pPrt->PFlowCtrlCap = SK_FLOW_MODE_SYM_OR_REM;
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- pPrt->PMSCap = (SK_MS_CAP_AUTO | SK_MS_CAP_MASTER |
- SK_MS_CAP_SLAVE);
- pPrt->PMSMode = SK_MS_MODE_AUTO;
- pPrt->PMSStatus = SK_MS_STAT_UNSET;
+ pPrt->PLinkMode = (SK_U8)SK_LMODE_AUTOFULL;
+ pPrt->PLinkSpeedCap = (SK_U8)SK_LSPEED_CAP_1000MBPS;
+ pPrt->PLinkSpeed = (SK_U8)SK_LSPEED_1000MBPS;
+ pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_UNKNOWN;
+ pPrt->PLinkModeConf = (SK_U8)SK_LMODE_AUTOSENSE;
+ pPrt->PFlowCtrlMode = (SK_U8)SK_FLOW_MODE_SYM_OR_REM;
+ pPrt->PLinkCap = (SK_U8)(SK_LMODE_CAP_HALF | SK_LMODE_CAP_FULL |
+ SK_LMODE_CAP_AUTOHALF | SK_LMODE_CAP_AUTOFULL);
+ pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
+ pPrt->PFlowCtrlCap = (SK_U8)SK_FLOW_MODE_SYM_OR_REM;
+ pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
+ pPrt->PMSCap = 0;
+ pPrt->PMSMode = (SK_U8)SK_MS_MODE_AUTO;
+ pPrt->PMSStatus = (SK_U8)SK_MS_STAT_UNSET;
+ pPrt->PLipaAutoNeg = (SK_U8)SK_LIPA_UNKNOWN;
pPrt->PAutoNegFail = SK_FALSE;
- pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
pPrt->PHWLinkUp = SK_FALSE;
+ pPrt->PLinkBroken = SK_TRUE; /* See WA code */
}
pAC->GIni.GIPortUsage = SK_RED_LINK;
- pAC->GIni.GIAnyPortAct = SK_FALSE;
+ pAC->GIni.GILedBlinkCtrl = (SK_U16)OemConfig.Value;
+ pAC->GIni.GIValIrqMask = IS_ALL_MSK;
+
} /* SkGeInit0*/
#ifdef SK_PCI_RESET
@@ -1520,45 +1858,42 @@
/* We know the RAM Interface Arbiter is enabled. */
SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
- if ((PmCtlSts & PCI_PM_STATE) != PCI_PM_STATE_D3) {
- return (1);
+
+ if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
+ return(1);
}
- /*
- * Return to D0 state.
- */
+ /* Return to D0 state. */
SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0);
/* Check for D0 state. */
SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
- if ((PmCtlSts & PCI_PM_STATE) != PCI_PM_STATE_D0) {
- return (1);
+
+ if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
+ return(1);
}
- /*
- * Check PCI Config Registers.
- */
+ /* Check PCI Config Registers. */
SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
- SkPciReadCfgByte(pAC, PCI_LAT_TIM, &lat);
- if (PciCmd != 0 || Cls != 0 || (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1 ||
- Lat != 0 ) {
- return (0);
+ SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
+
+ if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 ||
+ (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) {
+ return(1);
}
- /*
- * Restore Config Space.
- */
+ /* Restore PCI Config Space. */
for (i = 0; i < PCI_CFG_SIZE; i++) {
SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]);
}
- return (0);
+ return(0);
} /* SkGePciReset */
-#endif /* SK_PCI_RESET */
+#endif /* SK_PCI_RESET */
/******************************************************************************
*
@@ -1572,13 +1907,14 @@
* o Get the hardware configuration
* + Read the number of MACs/Ports.
* + Read the RAM size.
- * + Read the PCI Revision ID.
+ * + Read the PCI Revision Id.
* + Find out the adapters host clock speed
* + Read and check the PHY type
*
* Returns:
* 0: success
* 5: Unexpected PHY type detected
+ * 6: HW self test failed
*/
static int SkGeInit1(
SK_AC *pAC, /* adapter context */
@@ -1586,91 +1922,284 @@
{
SK_U8 Byte;
SK_U16 Word;
+ SK_U16 CtrlStat;
+ SK_U32 DWord;
int RetVal;
int i;
RetVal = 0;
+ /* save CLK_RUN bits (YUKON-Lite) */
+ SK_IN16(IoC, B0_CTST, &CtrlStat);
+
#ifdef SK_PCI_RESET
(void)SkGePciReset(pAC, IoC);
-#endif /* SK_PCI_RESET */
+#endif /* SK_PCI_RESET */
- /* Do the reset */
+ /* do the SW-reset */
SK_OUT8(IoC, B0_CTST, CS_RST_SET);
- /* Release the reset */
+ /* release the SW-reset */
SK_OUT8(IoC, B0_CTST, CS_RST_CLR);
- /* Reset all error bits in the PCI STATUS register */
+ /* reset all error bits in the PCI STATUS register */
/*
- * Note: Cfg cycles cannot be used, because they are not
+ * Note: PCI Cfg cycles cannot be used, because they are not
* available on some platforms after 'boot time'.
*/
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
- SK_OUT16(IoC, PCI_C(PCI_STATUS), Word | PCI_ERRBITS);
+
+ SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+ SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
- /* Release Master_Reset */
+ /* release Master Reset */
SK_OUT8(IoC, B0_CTST, CS_MRST_CLR);
- /* Read number of MACs */
+#ifdef CLK_RUN
+ CtrlStat |= CS_CLK_RUN_ENA;
+#endif /* CLK_RUN */
+
+ /* restore CLK_RUN bits */
+ SK_OUT16(IoC, B0_CTST, (SK_U16)(CtrlStat &
+ (CS_CLK_RUN_HOT | CS_CLK_RUN_RST | CS_CLK_RUN_ENA)));
+
+ /* read Chip Identification Number */
+ SK_IN8(IoC, B2_CHIP_ID, &Byte);
+ pAC->GIni.GIChipId = Byte;
+
+ /* read number of MACs */
SK_IN8(IoC, B2_MAC_CFG, &Byte);
- if (Byte & CFG_SNG_MAC) {
- pAC->GIni.GIMacsFound = 1;
- }
- else {
- pAC->GIni.GIMacsFound = 2;
- }
- SK_IN8(IoC, PCI_C(PCI_REV_ID), &Byte);
- pAC->GIni.GIPciHwRev = (int) Byte;
+ pAC->GIni.GIMacsFound = (Byte & CFG_SNG_MAC) ? 1 : 2;
+
+ /* get Chip Revision Number */
+ pAC->GIni.GIChipRev = (SK_U8)((Byte & CFG_CHIP_R_MSK) >> 4);
- /* Read the adapters RAM size */
+ /* get diff. PCI parameters */
+ SK_IN16(IoC, B0_CTST, &CtrlStat);
+
+ /* read the adapters RAM size */
SK_IN8(IoC, B2_E_0, &Byte);
- if (Byte == 3) {
- pAC->GIni.GIRamSize = (int)(Byte-1) * 512;
- pAC->GIni.GIRamOffs = (SK_U32)512 * 1024;
+
+ pAC->GIni.GIGenesis = SK_FALSE;
+ pAC->GIni.GIYukon = SK_FALSE;
+ pAC->GIni.GIYukonLite = SK_FALSE;
+
+#ifdef GENESIS
+ if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
+
+ pAC->GIni.GIGenesis = SK_TRUE;
+
+ if (Byte == (SK_U8)3) {
+ /* special case: 4 x 64k x 36, offset = 0x80000 */
+ pAC->GIni.GIRamSize = 1024;
+ pAC->GIni.GIRamOffs = (SK_U32)512 * 1024;
+ }
+ else {
+ pAC->GIni.GIRamSize = (int)Byte * 512;
+ pAC->GIni.GIRamOffs = 0;
+ }
+ /* all GE adapters work with 53.125 MHz host clock */
+ pAC->GIni.GIHstClkFact = SK_FACT_53;
+
+ /* set Descr. Poll Timer Init Value to 250 ms */
+ pAC->GIni.GIPollTimerVal =
+ SK_DPOLL_DEF * (SK_U32)pAC->GIni.GIHstClkFact / 100;
}
- else {
- pAC->GIni.GIRamSize = (int)Byte * 512;
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIChipId != CHIP_ID_GENESIS) {
+
+ pAC->GIni.GIYukon = SK_TRUE;
+
+ pAC->GIni.GIRamSize = (Byte == (SK_U8)0) ? 128 : (int)Byte * 4;
+
pAC->GIni.GIRamOffs = 0;
+
+ /* WA for chip Rev. A */
+ pAC->GIni.GIWolOffs = (pAC->GIni.GIChipId == CHIP_ID_YUKON &&
+ pAC->GIni.GIChipRev == 0) ? WOL_REG_OFFS : 0;
+
+ /* get PM Capabilities of PCI config space */
+ SK_IN16(IoC, PCI_C(PCI_PM_CAP_REG), &Word);
+
+ /* check if VAUX is available */
+ if (((CtrlStat & CS_VAUX_AVAIL) != 0) &&
+ /* check also if PME from D3cold is set */
+ ((Word & PCI_PME_D3C_SUP) != 0)) {
+ /* set entry in GE init struct */
+ pAC->GIni.GIVauxAvail = SK_TRUE;
+ }
+
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE) {
+ /* this is Rev. A1 */
+ pAC->GIni.GIYukonLite = SK_TRUE;
+ }
+ else {
+ /* save Flash-Address Register */
+ SK_IN32(IoC, B2_FAR, &DWord);
+
+ /* test Flash-Address Register */
+ SK_OUT8(IoC, B2_FAR + 3, 0xff);
+ SK_IN8(IoC, B2_FAR + 3, &Byte);
+
+ if (Byte != 0) {
+ /* this is Rev. A0 */
+ pAC->GIni.GIYukonLite = SK_TRUE;
+
+ /* restore Flash-Address Register */
+ SK_OUT32(IoC, B2_FAR, DWord);
+ }
+ }
+
+ /* read the Interrupt source */
+ SK_IN32(IoC, B0_ISRC, &DWord);
+
+ if ((DWord & IS_HW_ERR) != 0) {
+ /* read the HW Error Interrupt source */
+ SK_IN32(IoC, B0_HWE_ISRC, &DWord);
+
+ if ((DWord & IS_IRQ_SENSOR) != 0) {
+ /* disable HW Error IRQ */
+ pAC->GIni.GIValIrqMask &= ~IS_HW_ERR;
+ }
+ }
+
+ for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
+ /* set GMAC Link Control reset */
+ SK_OUT16(IoC, MR_ADDR(i, GMAC_LINK_CTRL), GMLC_RST_SET);
+
+ /* clear GMAC Link Control reset */
+ SK_OUT16(IoC, MR_ADDR(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
+ }
+ /* all YU chips work with 78.125 MHz host clock */
+ pAC->GIni.GIHstClkFact = SK_FACT_78;
+
+ pAC->GIni.GIPollTimerVal = SK_DPOLL_MAX; /* 215 ms */
}
+#endif /* YUKON */
- /* All known GE Adapters works with 53.125 MHz host clock */
- pAC->GIni.GIHstClkFact = SK_FACT_53;
- pAC->GIni.GIPollTimerVal =
- SK_DPOLL_DEF * (SK_U32)pAC->GIni.GIHstClkFact / 100;
+ /* check if 64-bit PCI Slot is present */
+ pAC->GIni.GIPciSlot64 = (SK_BOOL)((CtrlStat & CS_BUS_SLOT_SZ) != 0);
- /* Read the PHY type */
+ /* check if 66 MHz PCI Clock is active */
+ pAC->GIni.GIPciClock66 = (SK_BOOL)((CtrlStat & CS_BUS_CLOCK) != 0);
+
+ /* read PCI HW Revision Id. */
+ SK_IN8(IoC, PCI_C(PCI_REV_ID), &Byte);
+ pAC->GIni.GIPciHwRev = Byte;
+
+ /* read the PMD type */
+ SK_IN8(IoC, B2_PMD_TYP, &Byte);
+ pAC->GIni.GICopperType = (SK_U8)(Byte == 'T');
+
+ /* read the PHY type */
SK_IN8(IoC, B2_E_1, &Byte);
+
Byte &= 0x0f; /* the PHY type is stored in the lower nibble */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PhyType = Byte;
- switch (Byte) {
- case SK_PHY_XMAC:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_XMAC;
- break;
- case SK_PHY_BCOM:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_BCOM;
- break;
- case SK_PHY_LONE:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_LONE;
- break;
- case SK_PHY_NAT:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_NAT;
- break;
- default:
- /* ERROR: unexpected PHY typ detected */
- RetVal = 5;
- break;
+ for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ switch (Byte) {
+ case SK_PHY_XMAC:
+ pAC->GIni.GP[i].PhyAddr = PHY_ADDR_XMAC;
+ break;
+ case SK_PHY_BCOM:
+ pAC->GIni.GP[i].PhyAddr = PHY_ADDR_BCOM;
+ pAC->GIni.GP[i].PMSCap = (SK_U8)(SK_MS_CAP_AUTO |
+ SK_MS_CAP_MASTER | SK_MS_CAP_SLAVE);
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ pAC->GIni.GP[i].PhyAddr = PHY_ADDR_LONE;
+ break;
+ case SK_PHY_NAT:
+ pAC->GIni.GP[i].PhyAddr = PHY_ADDR_NAT;
+ break;
+#endif /* OTHER_PHY */
+ default:
+ /* ERROR: unexpected PHY type detected */
+ RetVal = 5;
+ break;
+ }
}
- }
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
- ("PHY type: %d PHY addr: %x\n", pAC->GIni.GP[i].PhyType,
- pAC->GIni.GP[i].PhyAddr));
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ if (Byte < (SK_U8)SK_PHY_MARV_COPPER) {
+ /* if this field is not initialized */
+ Byte = (SK_U8)SK_PHY_MARV_COPPER;
+
+ pAC->GIni.GICopperType = SK_TRUE;
+ }
+
+ pAC->GIni.GP[i].PhyAddr = PHY_ADDR_MARV;
+
+ if (pAC->GIni.GICopperType) {
- return (RetVal);
-} /* SkGeInit1*/
+ pAC->GIni.GP[i].PLinkSpeedCap = (SK_U8)(SK_LSPEED_CAP_AUTO |
+ SK_LSPEED_CAP_10MBPS | SK_LSPEED_CAP_100MBPS |
+ SK_LSPEED_CAP_1000MBPS);
+
+ pAC->GIni.GP[i].PLinkSpeed = (SK_U8)SK_LSPEED_AUTO;
+
+ pAC->GIni.GP[i].PMSCap = (SK_U8)(SK_MS_CAP_AUTO |
+ SK_MS_CAP_MASTER | SK_MS_CAP_SLAVE);
+ }
+ else {
+ Byte = (SK_U8)SK_PHY_MARV_FIBER;
+ }
+ }
+#endif /* YUKON */
+
+ pAC->GIni.GP[i].PhyType = (int)Byte;
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
+ ("PHY type: %d PHY addr: %04x\n", Byte,
+ pAC->GIni.GP[i].PhyAddr));
+ }
+
+ /* get MAC Type & set function pointers dependent on */
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ pAC->GIni.GIMacType = SK_MAC_XMAC;
+
+ pAC->GIni.GIFunc.pFnMacUpdateStats = SkXmUpdateStats;
+ pAC->GIni.GIFunc.pFnMacStatistic = SkXmMacStatistic;
+ pAC->GIni.GIFunc.pFnMacResetCounter = SkXmResetCounter;
+ pAC->GIni.GIFunc.pFnMacOverflow = SkXmOverflowStatus;
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ pAC->GIni.GIMacType = SK_MAC_GMAC;
+
+ pAC->GIni.GIFunc.pFnMacUpdateStats = SkGmUpdateStats;
+ pAC->GIni.GIFunc.pFnMacStatistic = SkGmMacStatistic;
+ pAC->GIni.GIFunc.pFnMacResetCounter = SkGmResetCounter;
+ pAC->GIni.GIFunc.pFnMacOverflow = SkGmOverflowStatus;
+
+#ifdef SPECIAL_HANDLING
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
+ /* check HW self test result */
+ SK_IN8(IoC, B2_E_3, &Byte);
+ if (Byte & B2_E3_RES_MASK) {
+ RetVal = 6;
+ }
+ }
+#endif
+ }
+#endif /* YUKON */
+
+ return(RetVal);
+} /* SkGeInit1 */
/******************************************************************************
@@ -1692,64 +2221,55 @@
SK_AC *pAC, /* adapter context */
SK_IOC IoC) /* IO context */
{
- SK_GEPORT *pPrt;
+#ifdef GENESIS
SK_U32 DWord;
- int i;
-
- /* start the Blink Source Counter */
- DWord = SK_BLK_DUR * (SK_U32)pAC->GIni.GIHstClkFact / 100;
- SK_OUT32(IoC, B2_BSC_INI, DWord);
- SK_OUT8(IoC, B2_BSC_CTRL, BSC_START);
+#endif /* GENESIS */
+ int i;
/* start the Descriptor Poll Timer */
if (pAC->GIni.GIPollTimerVal != 0) {
if (pAC->GIni.GIPollTimerVal > SK_DPOLL_MAX) {
pAC->GIni.GIPollTimerVal = SK_DPOLL_MAX;
- /* Create an Error Log Entry */
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E017, SKERR_HWI_E017MSG);
}
SK_OUT32(IoC, B28_DPT_INI, pAC->GIni.GIPollTimerVal);
SK_OUT8(IoC, B28_DPT_CTRL, DPT_START);
}
- /*
- * Configure
- * - the MAC-Arbiter and
- * - the Paket Arbiter
- *
- * The MAC and the packet arbiter will be started once
- * and never be stopped.
- */
- SkGeInitMacArb(pAC, IoC);
- SkGeInitPktArb(pAC, IoC);
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* start the Blink Source Counter */
+ DWord = SK_BLK_DUR * (SK_U32)pAC->GIni.GIHstClkFact / 100;
+
+ SK_OUT32(IoC, B2_BSC_INI, DWord);
+ SK_OUT8(IoC, B2_BSC_CTRL, BSC_START);
+
+ /*
+ * Configure the MAC Arbiter and the Packet Arbiter.
+ * They will be started once and never be stopped.
+ */
+ SkGeInitMacArb(pAC, IoC);
+
+ SkGeInitPktArb(pAC, IoC);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* start Time Stamp Timer */
+ SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8)GMT_ST_START);
+ }
+#endif /* YUKON */
/* enable the Tx Arbiters */
- SK_OUT8(IoC, MR_ADDR(MAC_1, TXA_CTRL), TXA_ENA_ARB);
- if (pAC->GIni.GIMacsFound > 1) {
- SK_OUT8(IoC, MR_ADDR(MAC_2, TXA_CTRL), TXA_ENA_ARB);
+ for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
+ SK_OUT8(IoC, MR_ADDR(i, TXA_CTRL), TXA_ENA_ARB);
}
/* enable the RAM Interface Arbiter */
SkGeInitRamIface(pAC, IoC);
- for (i = 0; i < SK_MAX_MACS; i++) {
- pPrt = &pAC->GIni.GP[i];
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- pPrt->PRxCmd |= XM_RX_BIG_PK_OK;
- }
-
- if (pPrt->PLinkModeConf == SK_LMODE_HALF) {
- /*
- * If in manual half duplex mode
- * the other side might be in full duplex mode
- * so ignore if a carrier extension is not seen on
- * frames received
- */
- pPrt->PRxCmd |= XM_RX_DIS_CEXT;
- }
-
- }
} /* SkGeInit2 */
/******************************************************************************
@@ -1758,9 +2278,8 @@
*
* Description:
* Level 0: Initialize the Module structures.
- * Level 1: Generic Hardware Initialization. The
- * IOP/MemBase pointer has to be set before
- * calling this level.
+ * Level 1: Generic Hardware Initialization. The IOP/MemBase pointer has
+ * to be set before calling this level.
*
* o Do a software reset.
* o Clear all reset bits.
@@ -1780,18 +2299,19 @@
*
* Returns:
* 0: success
- * 1: Number of MACs exceeds SK_MAX_MACS ( after level 1)
+ * 1: Number of MACs exceeds SK_MAX_MACS (after level 1)
* 2: Adapter not present or not accessible
* 3: Illegal initialization level
* 4: Initialization Level 1 Call missing
* 5: Unexpected PHY type detected
+ * 6: HW self test failed
*/
int SkGeInit(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Level) /* initialization level */
{
- int RetVal; /* return value */
+ int RetVal; /* return value */
SK_U32 DWord;
RetVal = 0;
@@ -1804,20 +2324,25 @@
SkGeInit0(pAC, IoC);
pAC->GIni.GILevel = SK_INIT_DATA;
break;
+
case SK_INIT_IO:
/* Initialization Level 1 */
RetVal = SkGeInit1(pAC, IoC);
+ if (RetVal != 0) {
+ break;
+ }
- /* Check if the adapter seems to be accessible */
- SK_OUT32(IoC, B2_IRQM_INI, 0x11335577L);
+ /* check if the adapter seems to be accessible */
+ SK_OUT32(IoC, B2_IRQM_INI, SK_TEST_VAL);
SK_IN32(IoC, B2_IRQM_INI, &DWord);
- SK_OUT32(IoC, B2_IRQM_INI, 0x00000000L);
- if (DWord != 0x11335577L) {
+ SK_OUT32(IoC, B2_IRQM_INI, 0L);
+
+ if (DWord != SK_TEST_VAL) {
RetVal = 2;
break;
}
- /* Check if the number of GIMacsFound matches SK_MAX_MACS */
+ /* check if the number of GIMacsFound matches SK_MAX_MACS */
if (pAC->GIni.GIMacsFound > SK_MAX_MACS) {
RetVal = 1;
break;
@@ -1826,12 +2351,13 @@
/* Level 1 successfully passed */
pAC->GIni.GILevel = SK_INIT_IO;
break;
+
case SK_INIT_RUN:
/* Initialization Level 2 */
if (pAC->GIni.GILevel != SK_INIT_IO) {
-#ifndef SK_DIAG
+#ifndef SK_DIAG
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E002, SKERR_HWI_E002MSG);
-#endif
+#endif /* !SK_DIAG */
RetVal = 4;
break;
}
@@ -1840,20 +2366,20 @@
/* Level 2 successfully passed */
pAC->GIni.GILevel = SK_INIT_RUN;
break;
+
default:
- /* Create an Error Log Entry */
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E003, SKERR_HWI_E003MSG);
RetVal = 3;
break;
}
- return (RetVal);
-} /* SkGeInit*/
+ return(RetVal);
+} /* SkGeInit */
/******************************************************************************
*
- * SkGeDeInit() - Deinitialize the adapter.
+ * SkGeDeInit() - Deinitialize the adapter
*
* Description:
* All ports of the adapter will be stopped if not already done.
@@ -1862,17 +2388,19 @@
* Returns:
* nothing
*/
-void SkGeDeInit(
+void SkGeDeInit(
SK_AC *pAC, /* adapter context */
SK_IOC IoC) /* IO context */
{
int i;
SK_U16 Word;
- /* Ensure I2C is ready. */
+#if (!defined(SK_SLIM) && !defined(VCPU))
+ /* ensure I2C is ready */
SkI2cWaitIrq(pAC, IoC);
+#endif
- /* Stop all current transfer activity */
+ /* stop all current transfer activity */
for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
if (pAC->GIni.GP[i].PState != SK_PRT_STOP &&
pAC->GIni.GP[i].PState != SK_PRT_RESET) {
@@ -1883,39 +2411,41 @@
/* Reset all bits in the PCI STATUS register */
/*
- * Note: Cfg cycles cannot be used, because they are not
+ * Note: PCI Cfg cycles cannot be used, because they are not
* available on some platforms after 'boot time'.
*/
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
- SK_OUT16(IoC, PCI_C(PCI_STATUS), Word | PCI_ERRBITS);
+
+ SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+ SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
- /* Do the reset, all LEDs are switched off now */
+ /* do the reset, all LEDs are switched off now */
SK_OUT8(IoC, B0_CTST, CS_RST_SET);
-} /* SkGeDeInit*/
+
+ pAC->GIni.GILevel = SK_INIT_DATA;
+} /* SkGeDeInit */
/******************************************************************************
*
- * SkGeInitPort() Initialize the specified prot.
+ * SkGeInitPort() Initialize the specified port.
*
* Description:
* PRxQSize, PXSQSize, and PXAQSize has to be
- * configured for the specified port before calling this
- * function. The descriptor rings has to be initialized, too.
+ * configured for the specified port before calling this function.
+ * The descriptor rings has to be initialized too.
*
* o (Re)configure queues of the specified port.
- * o configure the XMAC of the specified port.
- * o put ASIC and XMAC(s) in operational mode.
+ * o configure the MAC of the specified port.
+ * o put ASIC and MAC(s) in operational mode.
* o initialize Rx/Tx and Sync LED
* o initialize RAM Buffers and MAC FIFOs
*
* The port is ready to connect when returning.
*
* Note:
- * The XMACs Rx and Tx state machine is still disabled when
- * returning.
+ * The MAC's Rx and Tx state machine is still disabled when returning.
*
* Returns:
* 0: success
@@ -1936,45 +2466,53 @@
if (SkGeCheckQSize(pAC, Port) != 0) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E004, SKERR_HWI_E004MSG);
- return (1);
+ return(1);
}
+
if (pPrt->PState == SK_PRT_INIT || pPrt->PState == SK_PRT_RUN) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E005, SKERR_HWI_E005MSG);
- return (2);
+ return(2);
}
- /* Configuration ok, initialize the Port now */
+ /* configuration ok, initialize the Port now */
- /* Initialize Rx, Tx and Link LED */
- /*
- * If 1000BT Phy needs LED initialization than swap
- * LED and XMAC initialization order
- */
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_ENA);
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_ENA);
- /* The Link LED is initialized by RLMT or Diagnostics itself */
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* initialize Rx, Tx and Link LED */
+ /*
+ * If 1000BT Phy needs LED initialization than swap
+ * LED and XMAC initialization order
+ */
+ SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_ENA);
+ SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_ENA);
+ /* The Link LED is initialized by RLMT or Diagnostics itself */
+
+ SkXmInitMac(pAC, IoC, Port);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
- /* Do NOT initialize the Link Sync Counter */
+ SkGmInitMac(pAC, IoC, Port);
+ }
+#endif /* YUKON */
+
+ /* do NOT initialize the Link Sync Counter */
- /*
- * Configure
- * - XMAC
- * - MAC FIFOs
- * - RAM Buffers
- * - enable Force Sync bit if synchronous queue available
- * - BMUs
- */
- SkXmInitMac(pAC, IoC, Port);
SkGeInitMacFifo(pAC, IoC, Port);
+
SkGeInitRamBufs(pAC, IoC, Port);
+
if (pPrt->PXSQSize != 0) {
+ /* enable Force Sync bit if synchronous queue available */
SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL), TXA_ENA_FSYNC);
}
+
SkGeInitBmu(pAC, IoC, Port);
- /* Mark port as initialized. */
+ /* mark port as initialized */
pPrt->PState = SK_PRT_INIT;
- pAC->GIni.GIAnyPortAct = SK_TRUE;
- return (0);
+ return(0);
} /* SkGeInitPort */
diff -Nru a/drivers/net/sk98lin/skgemib.c b/drivers/net/sk98lin/skgemib.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/drivers/net/sk98lin/skgemib.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,1080 @@
+/*****************************************************************************
+ *
+ * Name: skgemib.c
+ * Project: GEnesis, PCI Gigabit Ethernet Adapter
+ * Version: $Revision: 1.9 $
+ * Date: $Date: 2003/05/23 12:55:20 $
+ * Purpose: Private Network Management Interface Management Database
+ *
+ ****************************************************************************/
+
+/******************************************************************************
+ *
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * The information in this file is provided "AS IS" without warranty.
+ *
+ ******************************************************************************/
+
+/*****************************************************************************
+ *
+ * History:
+ *
+ * $Log: skgemib.c,v $
+ * Revision 1.9 2003/05/23 12:55:20 tschilli
+ * OID_SKGE_BOARDLEVEL added.
+ *
+ * Revision 1.8 2003/03/27 11:19:15 tschilli
+ * Copyright messages changed.
+ *
+ * Revision 1.7 2002/12/16 09:04:34 tschilli
+ * Code for VCT handling added.
+ *
+ * Revision 1.6 2002/08/09 15:40:21 rwahl
+ * Editorial change (renamed ConfSpeedCap).
+ *
+ * Revision 1.5 2002/08/09 11:05:34 rwahl
+ * Added oid handling for link speed cap.
+ *
+ * Revision 1.4 2002/08/09 09:40:27 rwahl
+ * Added support for NDIS OID_PNP_xxx.
+ *
+ * Revision 1.3 2002/07/17 19:39:54 rwahl
+ * Added handler for OID_SKGE_SPEED_MODE & OID_SKGE_SPEED_STATUS.
+ *
+ * Revision 1.2 2002/05/22 08:59:00 rwahl
+ * - static functions only for release build.
+ * - Source file must be included.
+ *
+ * Revision 1.1 2002/05/22 08:12:42 rwahl
+ * Initial version.
+ *
+ ****************************************************************************/
+
+/*
+ * PRIVATE OID handler function prototypes
+ */
+PNMI_STATIC int Addr(SK_AC *pAC, SK_IOC IoC, int action,
+ SK_U32 Id, char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int CsumStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int General(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int Mac8023Stat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int MacPrivateConf(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int MacPrivateStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int Monitor(SK_AC *pAC, SK_IOC IoC, int action,
+ SK_U32 Id, char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int OidStruct(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int Perform(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int* pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int Rlmt(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int RlmtStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int SensorStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int Vpd(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC int Vct(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+
+#ifdef SK_POWER_MGMT
+PNMI_STATIC int PowerManagement(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+#endif /* SK_POWER_MGMT */
+
+#ifdef SK_DIAG_SUPPORT
+PNMI_STATIC int DiagActions(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
+ char *pBuf, unsigned int *pLen, SK_U32 Instance,
+ unsigned int TableIndex, SK_U32 NetIndex);
+#endif /* SK_DIAG_SUPPORT */
+
+
+/* defines *******************************************************************/
+#define ID_TABLE_SIZE (sizeof(IdTable)/sizeof(IdTable[0]))
+
+
+/* global variables **********************************************************/
+
+/*
+ * Table to correlate OID with handler function and index to
+ * hardware register stored in StatAddress if applicable.
+ */
+PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
+ {OID_GEN_XMIT_OK,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX},
+ {OID_GEN_RCV_OK,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX},
+ {OID_GEN_XMIT_ERROR,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, General, 0},
+ {OID_GEN_RCV_ERROR,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, General, 0},
+ {OID_GEN_RCV_NO_BUFFER,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, General, 0},
+ {OID_GEN_DIRECTED_FRAMES_XMIT,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_UNICAST},
+ {OID_GEN_MULTICAST_FRAMES_XMIT,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_MULTICAST},
+ {OID_GEN_BROADCAST_FRAMES_XMIT,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_BROADCAST},
+ {OID_GEN_DIRECTED_FRAMES_RCV,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_UNICAST},
+ {OID_GEN_MULTICAST_FRAMES_RCV,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_MULTICAST},
+ {OID_GEN_BROADCAST_FRAMES_RCV,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_BROADCAST},
+ {OID_GEN_RCV_CRC_ERROR,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_FCS},
+ {OID_GEN_TRANSMIT_QUEUE_LENGTH,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, General, 0},
+ {OID_802_3_PERMANENT_ADDRESS,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, 0},
+ {OID_802_3_CURRENT_ADDRESS,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, 0},
+ {OID_802_3_RCV_ERROR_ALIGNMENT,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_FRAMING},
+ {OID_802_3_XMIT_ONE_COLLISION,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_SINGLE_COL},
+ {OID_802_3_XMIT_MORE_COLLISIONS,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_MULTI_COL},
+ {OID_802_3_XMIT_DEFERRED,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_DEFFERAL},
+ {OID_802_3_XMIT_MAX_COLLISIONS,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_EXCESS_COL},
+ {OID_802_3_RCV_OVERRUN,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_OVERFLOW},
+ {OID_802_3_XMIT_UNDERRUN,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_UNDERRUN},
+ {OID_802_3_XMIT_TIMES_CRS_LOST,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_CARRIER},
+ {OID_802_3_XMIT_LATE_COLLISIONS,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_LATE_COL},
+#ifdef SK_POWER_MGMT
+ {OID_PNP_CAPABILITIES,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, PowerManagement, 0},
+ {OID_PNP_SET_POWER,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_WO, PowerManagement, 0},
+ {OID_PNP_QUERY_POWER,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, PowerManagement, 0},
+ {OID_PNP_ADD_WAKE_UP_PATTERN,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_WO, PowerManagement, 0},
+ {OID_PNP_REMOVE_WAKE_UP_PATTERN,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_WO, PowerManagement, 0},
+ {OID_PNP_ENABLE_WAKE_UP,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RW, PowerManagement, 0},
+#endif /* SK_POWER_MGMT */
+#ifdef SK_DIAG_SUPPORT
+ {OID_SKGE_DIAG_MODE,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RW, DiagActions, 0},
+#endif /* SK_DIAG_SUPPORT */
+ {OID_SKGE_MDB_VERSION,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(MgmtDBVersion),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_SUPPORTED_LIST,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_ALL_DATA,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RW, OidStruct, 0},
+ {OID_SKGE_VPD_FREE_BYTES,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(VpdFreeBytes),
+ SK_PNMI_RO, Vpd, 0},
+ {OID_SKGE_VPD_ENTRIES_LIST,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(VpdEntriesList),
+ SK_PNMI_RO, Vpd, 0},
+ {OID_SKGE_VPD_ENTRIES_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(VpdEntriesNumber),
+ SK_PNMI_RO, Vpd, 0},
+ {OID_SKGE_VPD_KEY,
+ SK_PNMI_VPD_ENTRIES,
+ sizeof(SK_PNMI_VPD),
+ SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdKey),
+ SK_PNMI_RO, Vpd, 0},
+ {OID_SKGE_VPD_VALUE,
+ SK_PNMI_VPD_ENTRIES,
+ sizeof(SK_PNMI_VPD),
+ SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdValue),
+ SK_PNMI_RO, Vpd, 0},
+ {OID_SKGE_VPD_ACCESS,
+ SK_PNMI_VPD_ENTRIES,
+ sizeof(SK_PNMI_VPD),
+ SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdAccess),
+ SK_PNMI_RO, Vpd, 0},
+ {OID_SKGE_VPD_ACTION,
+ SK_PNMI_VPD_ENTRIES,
+ sizeof(SK_PNMI_VPD),
+ SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdAction),
+ SK_PNMI_RW, Vpd, 0},
+ {OID_SKGE_PORT_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(PortNumber),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_DEVICE_TYPE,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(DeviceType),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_DRIVER_DESCR,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(DriverDescr),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_DRIVER_VERSION,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(DriverVersion),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_HW_DESCR,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(HwDescr),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_HW_VERSION,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(HwVersion),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_CHIPSET,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(Chipset),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_ACTION,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(Action),
+ SK_PNMI_RW, Perform, 0},
+ {OID_SKGE_RESULT,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TestResult),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_BUS_TYPE,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(BusType),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_BUS_SPEED,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(BusSpeed),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_BUS_WIDTH,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(BusWidth),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_SW_QUEUE_LEN,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxSwQueueLen),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_SW_QUEUE_MAX,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxSwQueueMax),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_RETRY,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxRetryCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RX_INTR_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RxIntrCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_INTR_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxIntrCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RX_NO_BUF_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RxNoBufCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_NO_BUF_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxNoBufCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_USED_DESCR_NO,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxUsedDescrNo),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RX_DELIVERED_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RxDeliveredCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RX_OCTETS_DELIV_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RxOctetsDeliveredCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RX_HW_ERROR_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RxHwErrorsCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TX_HW_ERROR_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TxHwErrorsCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_IN_ERRORS_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(InErrorsCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_OUT_ERROR_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(OutErrorsCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_ERR_RECOVERY_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(ErrRecoveryCts),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_SYSUPTIME,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(SysUpTime),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_SENSOR_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(SensorNumber),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_SENSOR_INDEX,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorIndex),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_DESCR,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorDescr),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_TYPE,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorType),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_VALUE,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorValue),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_WAR_THRES_LOW,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningThresholdLow),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_WAR_THRES_UPP,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningThresholdHigh),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_ERR_THRES_LOW,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorThresholdLow),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_ERR_THRES_UPP,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorThresholdHigh),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_STATUS,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorStatus),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_WAR_CTS,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningCts),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_ERR_CTS,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorCts),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_WAR_TIME,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningTimestamp),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_SENSOR_ERR_TIME,
+ SK_PNMI_SENSOR_ENTRIES,
+ sizeof(SK_PNMI_SENSOR),
+ SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorTimestamp),
+ SK_PNMI_RO, SensorStat, 0},
+ {OID_SKGE_CHKSM_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(ChecksumNumber),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_CHKSM_RX_OK_CTS,
+ SKCS_NUM_PROTOCOLS,
+ sizeof(SK_PNMI_CHECKSUM),
+ SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxOkCts),
+ SK_PNMI_RO, CsumStat, 0},
+ {OID_SKGE_CHKSM_RX_UNABLE_CTS,
+ SKCS_NUM_PROTOCOLS,
+ sizeof(SK_PNMI_CHECKSUM),
+ SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxUnableCts),
+ SK_PNMI_RO, CsumStat, 0},
+ {OID_SKGE_CHKSM_RX_ERR_CTS,
+ SKCS_NUM_PROTOCOLS,
+ sizeof(SK_PNMI_CHECKSUM),
+ SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxErrCts),
+ SK_PNMI_RO, CsumStat, 0},
+ {OID_SKGE_CHKSM_TX_OK_CTS,
+ SKCS_NUM_PROTOCOLS,
+ sizeof(SK_PNMI_CHECKSUM),
+ SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumTxOkCts),
+ SK_PNMI_RO, CsumStat, 0},
+ {OID_SKGE_CHKSM_TX_UNABLE_CTS,
+ SKCS_NUM_PROTOCOLS,
+ sizeof(SK_PNMI_CHECKSUM),
+ SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumTxUnableCts),
+ SK_PNMI_RO, CsumStat, 0},
+ {OID_SKGE_STAT_TX,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX},
+ {OID_SKGE_STAT_TX_OCTETS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxOctetsOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_OCTET},
+ {OID_SKGE_STAT_TX_BROADCAST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxBroadcastOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_BROADCAST},
+ {OID_SKGE_STAT_TX_MULTICAST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMulticastOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MULTICAST},
+ {OID_SKGE_STAT_TX_UNICAST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxUnicastOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_UNICAST},
+ {OID_SKGE_STAT_TX_LONGFRAMES,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxLongFramesCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_LONGFRAMES},
+ {OID_SKGE_STAT_TX_BURST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxBurstCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_BURST},
+ {OID_SKGE_STAT_TX_PFLOWC,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxPauseMacCtrlCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_PMACC},
+ {OID_SKGE_STAT_TX_FLOWC,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMacCtrlCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MACC},
+ {OID_SKGE_STAT_TX_SINGLE_COL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSingleCollisionCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SINGLE_COL},
+ {OID_SKGE_STAT_TX_MULTI_COL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMultipleCollisionCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MULTI_COL},
+ {OID_SKGE_STAT_TX_EXCESS_COL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxExcessiveCollisionCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_EXCESS_COL},
+ {OID_SKGE_STAT_TX_LATE_COL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxLateCollisionCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_LATE_COL},
+ {OID_SKGE_STAT_TX_DEFFERAL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxDeferralCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_DEFFERAL},
+ {OID_SKGE_STAT_TX_EXCESS_DEF,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxExcessiveDeferralCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_EXCESS_DEF},
+ {OID_SKGE_STAT_TX_UNDERRUN,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxFifoUnderrunCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_UNDERRUN},
+ {OID_SKGE_STAT_TX_CARRIER,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxCarrierCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_CARRIER},
+/* {OID_SKGE_STAT_TX_UTIL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxUtilization),
+ SK_PNMI_RO, MacPrivateStat, (SK_U16)(-1)}, */
+ {OID_SKGE_STAT_TX_64,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx64Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_64},
+ {OID_SKGE_STAT_TX_127,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx127Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_127},
+ {OID_SKGE_STAT_TX_255,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx255Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_255},
+ {OID_SKGE_STAT_TX_511,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx511Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_511},
+ {OID_SKGE_STAT_TX_1023,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx1023Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_1023},
+ {OID_SKGE_STAT_TX_MAX,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMaxCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MAX},
+ {OID_SKGE_STAT_TX_SYNC,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSyncCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SYNC},
+ {OID_SKGE_STAT_TX_SYNC_OCTETS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSyncOctetsCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SYNC_OCTET},
+ {OID_SKGE_STAT_RX,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX},
+ {OID_SKGE_STAT_RX_OCTETS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxOctetsOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_OCTET},
+ {OID_SKGE_STAT_RX_BROADCAST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxBroadcastOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_BROADCAST},
+ {OID_SKGE_STAT_RX_MULTICAST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMulticastOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MULTICAST},
+ {OID_SKGE_STAT_RX_UNICAST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxUnicastOkCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_UNICAST},
+ {OID_SKGE_STAT_RX_LONGFRAMES,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxLongFramesCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_LONGFRAMES},
+ {OID_SKGE_STAT_RX_PFLOWC,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxPauseMacCtrlCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_PMACC},
+ {OID_SKGE_STAT_RX_FLOWC,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMacCtrlCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MACC},
+ {OID_SKGE_STAT_RX_PFLOWC_ERR,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxPauseMacCtrlErrorCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_PMACC_ERR},
+ {OID_SKGE_STAT_RX_FLOWC_UNKWN,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMacCtrlUnknownCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MACC_UNKWN},
+ {OID_SKGE_STAT_RX_BURST,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxBurstCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_BURST},
+ {OID_SKGE_STAT_RX_MISSED,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMissedCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MISSED},
+ {OID_SKGE_STAT_RX_FRAMING,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFramingCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_FRAMING},
+ {OID_SKGE_STAT_RX_OVERFLOW,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFifoOverflowCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_OVERFLOW},
+ {OID_SKGE_STAT_RX_JABBER,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxJabberCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_JABBER},
+ {OID_SKGE_STAT_RX_CARRIER,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxCarrierCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_CARRIER},
+ {OID_SKGE_STAT_RX_IR_LENGTH,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxIRLengthCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_IRLENGTH},
+ {OID_SKGE_STAT_RX_SYMBOL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxSymbolCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_SYMBOL},
+ {OID_SKGE_STAT_RX_SHORTS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxShortsCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_SHORTS},
+ {OID_SKGE_STAT_RX_RUNT,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxRuntCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_RUNT},
+ {OID_SKGE_STAT_RX_CEXT,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxCextCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_CEXT},
+ {OID_SKGE_STAT_RX_TOO_LONG,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxTooLongCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_TOO_LONG},
+ {OID_SKGE_STAT_RX_FCS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFcsCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_FCS},
+/* {OID_SKGE_STAT_RX_UTIL,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxUtilization),
+ SK_PNMI_RO, MacPrivateStat, (SK_U16)(-1)}, */
+ {OID_SKGE_STAT_RX_64,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx64Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_64},
+ {OID_SKGE_STAT_RX_127,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx127Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_127},
+ {OID_SKGE_STAT_RX_255,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx255Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_255},
+ {OID_SKGE_STAT_RX_511,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx511Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_511},
+ {OID_SKGE_STAT_RX_1023,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx1023Cts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_1023},
+ {OID_SKGE_STAT_RX_MAX,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_STAT),
+ SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMaxCts),
+ SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MAX},
+ {OID_SKGE_PHYS_CUR_ADDR,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfMacCurrentAddr),
+ SK_PNMI_RW, Addr, 0},
+ {OID_SKGE_PHYS_FAC_ADDR,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfMacFactoryAddr),
+ SK_PNMI_RO, Addr, 0},
+ {OID_SKGE_PMD,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPMD),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_CONNECTOR,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfConnector),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_LINK_CAP,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkCapability),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_LINK_MODE,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkMode),
+ SK_PNMI_RW, MacPrivateConf, 0},
+ {OID_SKGE_LINK_MODE_STATUS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkModeStatus),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_LINK_STATUS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkStatus),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_FLOWCTRL_CAP,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlCapability),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_FLOWCTRL_MODE,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlMode),
+ SK_PNMI_RW, MacPrivateConf, 0},
+ {OID_SKGE_FLOWCTRL_STATUS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlStatus),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_PHY_OPERATION_CAP,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationCapability),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_PHY_OPERATION_MODE,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationMode),
+ SK_PNMI_RW, MacPrivateConf, 0},
+ {OID_SKGE_PHY_OPERATION_STATUS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationStatus),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_SPEED_CAP,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfSpeedCapability),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_SPEED_MODE,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfSpeedMode),
+ SK_PNMI_RW, MacPrivateConf, 0},
+ {OID_SKGE_SPEED_STATUS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_CONF),
+ SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfSpeedStatus),
+ SK_PNMI_RO, MacPrivateConf, 0},
+ {OID_SKGE_TRAP,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(Trap),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_TRAP_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(TrapNumber),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RLMT_MODE,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtMode),
+ SK_PNMI_RW, Rlmt, 0},
+ {OID_SKGE_RLMT_PORT_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtPortNumber),
+ SK_PNMI_RO, Rlmt, 0},
+ {OID_SKGE_RLMT_PORT_ACTIVE,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtPortActive),
+ SK_PNMI_RO, Rlmt, 0},
+ {OID_SKGE_RLMT_PORT_PREFERRED,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtPortPreferred),
+ SK_PNMI_RW, Rlmt, 0},
+ {OID_SKGE_RLMT_CHANGE_CTS,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtChangeCts),
+ SK_PNMI_RO, Rlmt, 0},
+ {OID_SKGE_RLMT_CHANGE_TIME,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtChangeTime),
+ SK_PNMI_RO, Rlmt, 0},
+ {OID_SKGE_RLMT_CHANGE_ESTIM,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtChangeEstimate),
+ SK_PNMI_RO, Rlmt, 0},
+ {OID_SKGE_RLMT_CHANGE_THRES,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtChangeThreshold),
+ SK_PNMI_RW, Rlmt, 0},
+ {OID_SKGE_RLMT_PORT_INDEX,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_RLMT),
+ SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtIndex),
+ SK_PNMI_RO, RlmtStat, 0},
+ {OID_SKGE_RLMT_STATUS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_RLMT),
+ SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtStatus),
+ SK_PNMI_RO, RlmtStat, 0},
+ {OID_SKGE_RLMT_TX_HELLO_CTS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_RLMT),
+ SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtTxHelloCts),
+ SK_PNMI_RO, RlmtStat, 0},
+ {OID_SKGE_RLMT_RX_HELLO_CTS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_RLMT),
+ SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtRxHelloCts),
+ SK_PNMI_RO, RlmtStat, 0},
+ {OID_SKGE_RLMT_TX_SP_REQ_CTS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_RLMT),
+ SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtTxSpHelloReqCts),
+ SK_PNMI_RO, RlmtStat, 0},
+ {OID_SKGE_RLMT_RX_SP_CTS,
+ SK_PNMI_MAC_ENTRIES,
+ sizeof(SK_PNMI_RLMT),
+ SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtRxSpHelloCts),
+ SK_PNMI_RO, RlmtStat, 0},
+ {OID_SKGE_RLMT_MONITOR_NUMBER,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(RlmtMonitorNumber),
+ SK_PNMI_RO, General, 0},
+ {OID_SKGE_RLMT_MONITOR_INDEX,
+ SK_PNMI_MONITOR_ENTRIES,
+ sizeof(SK_PNMI_RLMT_MONITOR),
+ SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorIndex),
+ SK_PNMI_RO, Monitor, 0},
+ {OID_SKGE_RLMT_MONITOR_ADDR,
+ SK_PNMI_MONITOR_ENTRIES,
+ sizeof(SK_PNMI_RLMT_MONITOR),
+ SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorAddr),
+ SK_PNMI_RO, Monitor, 0},
+ {OID_SKGE_RLMT_MONITOR_ERRS,
+ SK_PNMI_MONITOR_ENTRIES,
+ sizeof(SK_PNMI_RLMT_MONITOR),
+ SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorErrorCts),
+ SK_PNMI_RO, Monitor, 0},
+ {OID_SKGE_RLMT_MONITOR_TIMESTAMP,
+ SK_PNMI_MONITOR_ENTRIES,
+ sizeof(SK_PNMI_RLMT_MONITOR),
+ SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorTimestamp),
+ SK_PNMI_RO, Monitor, 0},
+ {OID_SKGE_RLMT_MONITOR_ADMIN,
+ SK_PNMI_MONITOR_ENTRIES,
+ sizeof(SK_PNMI_RLMT_MONITOR),
+ SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorAdmin),
+ SK_PNMI_RW, Monitor, 0},
+ {OID_SKGE_MTU,
+ 1,
+ 0,
+ SK_PNMI_MAI_OFF(MtuSize),
+ SK_PNMI_RW, MacPrivateConf, 0},
+ {OID_SKGE_VCT_GET,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Vct, 0},
+ {OID_SKGE_VCT_SET,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_WO, Vct, 0},
+ {OID_SKGE_VCT_STATUS,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, Vct, 0},
+ {OID_SKGE_BOARDLEVEL,
+ 0,
+ 0,
+ 0,
+ SK_PNMI_RO, General, 0},
+};
+
diff -Nru a/drivers/net/sk98lin/skgepnmi.c b/drivers/net/sk98lin/skgepnmi.c
--- a/drivers/net/sk98lin/skgepnmi.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/sk98lin/skgepnmi.c Sun Aug 3 13:14:50 2003
@@ -2,15 +2,16 @@
*
* Name: skgepnmi.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.87 $
- * Date: $Date: 2001/04/06 13:35:09 $
+ * Version: $Revision: 1.109 $
+ * Date: $Date: 2003/07/17 14:15:24 $
* Purpose: Private Network Management Interface
*
****************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,114 @@
* History:
*
* $Log: skgepnmi.c,v $
+ * Revision 1.109 2003/07/17 14:15:24 tschilli
+ * Bug in SkPnmiGenIoctl() fixed.
+ *
+ * Revision 1.108 2003/05/27 07:10:11 tschilli
+ * Bug in SkPnmiGenIoctl() fixed.
+ *
+ * Revision 1.107 2003/05/23 13:01:10 tschilli
+ * Code for DIAG support added (#define SK_DIAG_SUPPORT).
+ * Code for generic PNMI IOCTL support added. The new function
+ * SkPnmiGenIoctl() is used for this purpose.
+ * Handling of OID_SKGE_BOARDLEVEL added.
+ * Incorrect buffer size handling of OID_SKGE_MTU during GET action fixed.
+ * Return code handling in PowerManagement() fixed.
+ * Editorial changes.
+ *
+ * Revision 1.106 2003/04/10 14:47:31 rschmidt
+ * Fixed handling for OID_GEN_RCV_OK and OID_GEN_XMIT_OK for YUKON's GMAC
+ * in GetPhysStatVal().
+ * Replaced macro PHY_READ() with function call SkXmPhyRead().
+ * Made optimisations for readability and code size.
+ * Editorial changes.
+ *
+ * Revision 1.105 2003/04/09 12:51:32 rschmidt
+ * Fixed XMAC only handling for some events in SkPnmiEvent().
+ * Fixed return value for OID_GEN_RCV_OK (SK_PNMI_HRX) in GetPhysStatVal().
+ * Editorial changes.
+ *
+ * Revision 1.104 2003/03/27 11:18:21 tschilli
+ * BRK statements from DEBUG code removed.
+ * OID_GEN_XMIT_OK and OID_GEN_RCV_OK work with Yukon now.
+ * Copyright messages changed.
+ *
+ * Revision 1.103 2002/12/20 09:57:13 tschilli
+ * SK_PNMI_EVT_VCT_RESET event code changed.
+ * Unused variable from Vct() removed.
+ *
+ * Revision 1.102 2002/12/16 14:03:24 tschilli
+ * VCT code in Vct() changed.
+ *
+ * Revision 1.101 2002/12/16 09:04:10 tschilli
+ * Code for VCT handling added.
+ *
+ * Revision 1.100 2002/09/26 14:28:13 tschilli
+ * For XMAC the values in the SK_PNMI_PORT Port struct are copied to
+ * the new SK_PNMI_PORT BufPort struct during a MacUpdate() call.
+ * These values are used when GetPhysStatVal() is called. With this
+ * mechanism you get the best results when software corrections for
+ * counters are needed. Example: RX_LONGFRAMES.
+ *
+ * Revision 1.99 2002/09/17 12:31:19 tschilli
+ * OID_SKGE_TX_HW_ERROR_CTS, OID_SKGE_OUT_ERROR_CTS, OID_GEN_XMIT_ERROR:
+ * Double count of SK_PNMI_HTX_EXCESS_COL in function General() removed.
+ * OID_PNP_CAPABILITIES: sizeof(SK_PM_WAKE_UP_CAPABILITIES) changed to
+ * sizeof(SK_PNP_CAPABILITIES) in function PowerManagement().
+ *
+ * Revision 1.98 2002/09/10 09:00:03 rwahl
+ * Adapted boolean definitions according sktypes.
+ *
+ * Revision 1.97 2002/09/05 15:07:03 rwahl
+ * Editorial changes.
+ *
+ * Revision 1.96 2002/09/05 11:04:14 rwahl
+ * - Rx/Tx packets statistics of virtual port were zero on link down (#10750)
+ * - For GMAC the overflow IRQ for Rx longframe counter was not counted.
+ * - Incorrect calculation for oids OID_SKGE_RX_HW_ERROR_CTS,
+ * OID_SKGE_IN_ERRORS_CTS, OID_GEN_RCV_ERROR.
+ * - Moved correction for OID_SKGE_STAT_RX_TOO_LONG to GetPhysStatVal().
+ * - Editorial changes.
+ *
+ * Revision 1.95 2002/09/04 08:53:37 rwahl
+ * - Incorrect statistics for Rx_too_long counter with jumbo frame (#10751)
+ * - StatRxFrameTooLong & StatRxPMaccErr counters were not reset.
+ * - Fixed compiler warning for debug msg arg types.
+ *
+ * Revision 1.94 2002/08/09 15:42:14 rwahl
+ * - Fixed StatAddr table for GMAC.
+ * - VirtualConf(): returned indeterminated status for speed oids if no
+ * active port.
+ *
+ * Revision 1.93 2002/08/09 11:04:59 rwahl
+ * Added handler for link speed caps.
+ *
+ * Revision 1.92 2002/08/09 09:43:03 rwahl
+ * - Added handler for NDIS OID_PNP_xxx ids.
+ *
+ * Revision 1.91 2002/07/17 19:53:03 rwahl
+ * - Added StatOvrflwBit table for XMAC & GMAC.
+ * - Extended StatAddr table for GMAC. Added check of number of counters
+ * in enumeration and size of StatAddr table on init level.
+ * - Added use of GIFunc table.
+ * - ChipSet is not static anymore,
+ * - Extended SIRQ event handler for both mac types.
+ * - Fixed rx short counter bug (#10620)
+ * - Added handler for oids SKGE_SPEED_MODE & SKGE_SPEED_STATUS.
+ * - Extended GetPhysStatVal() for GMAC.
+ * - Editorial changes.
+ *
+ * Revision 1.90 2002/05/22 08:56:25 rwahl
+ * - Moved OID table to separate source file.
+ * - Fix: TX_DEFFERAL counter incremented in full-duplex mode.
+ * - Use string definitions for error msgs.
+ *
+ * Revision 1.89 2001/09/18 10:01:30 mkunz
+ * some OID's fixed for dualnetmode
+ *
+ * Revision 1.88 2001/08/02 07:58:08 rwahl
+ * - Fixed NetIndex to csum module at ResetCounter().
+ *
* Revision 1.87 2001/04/06 13:35:09 mkunz
* -Bugs fixed in handling of OID_SKGE_MTU and the VPD OID's
*
@@ -37,7 +146,6 @@
*
* Revision 1.84 2001/03/06 09:04:55 mkunz
* Made some changes in instance calculation
- * C ^VS:
*
* Revision 1.83 2001/02/15 09:15:32 mkunz
* Necessary changes for dual net mode added
@@ -101,7 +209,7 @@
* Added state check to PHY_READ call (hanged if called during startup).
*
* Revision 1.67 1999/09/22 09:53:20 rwahl
- * - Read Broadcom register for updating fcs error counter (1000Base-T).
+ * - Read Broadcom register for updating FCS error counter (1000Base-T).
*
* Revision 1.66 1999/08/26 13:47:56 rwahl
* Added SK_DRIVER_SENDEVENT when queueing RLMT_CHANGE_THRES trap.
@@ -236,7 +344,7 @@
* -Fixed bug for RX counters. On an RX overflow interrupt the high
* words of all RX counters were incremented.
* -SET operations on FLOWCTRL_MODE and LINK_MODE accept now the
- * value 0, which has no effect. It is useful for multiple instance
+ * value 0, which has no effect. It is usefull for multiple instance
* SETs.
*
* Revision 1.37 1998/11/20 08:02:04 mhaveman
@@ -361,14 +469,14 @@
****************************************************************************/
+#ifndef _lint
static const char SysKonnectFileId[] =
- "@(#) $Id: skgepnmi.c,v 1.87 2001/04/06 13:35:09 mkunz Exp $"
- " (C) SysKonnect.";
+ "@(#) $Id: skgepnmi.c,v 1.109 2003/07/17 14:15:24 tschilli Exp $ (C) Marvell.";
+#endif /* !_lint */
#include "h/skdrv1st.h"
#include "h/sktypes.h"
#include "h/xmac_ii.h"
-
#include "h/skdebug.h"
#include "h/skqueue.h"
#include "h/skgepnmi.h"
@@ -379,7 +487,16 @@
#include "h/skgeinit.h"
#include "h/skdrv2nd.h"
#include "h/skgepnm2.h"
+#ifdef SK_POWER_MGMT
+#include "h/skgepmgt.h"
+#endif
+/* defines *******************************************************************/
+#ifndef DEBUG
+#define PNMI_STATIC static
+#else /* DEBUG */
+#define PNMI_STATIC
+#endif /* DEBUG */
/*
* Public Function prototypes
@@ -393,1047 +510,271 @@
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
unsigned int *pLen, SK_U32 NetIndex);
-int SkPnmiPreSetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
+int SkPnmiPreSetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
unsigned int *pLen, SK_U32 NetIndex);
-int SkPnmiSetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
+int SkPnmiSetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
unsigned int *pLen, SK_U32 NetIndex);
int SkPnmiEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Param);
+int SkPnmiGenIoctl(SK_AC *pAC, SK_IOC IoC, void * pBuf,
+ unsigned int * pLen, SK_U32 NetIndex);
/*
* Private Function prototypes
*/
-static int Addr(SK_AC *pAC, SK_IOC IoC, int action,
- SK_U32 Id, char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static SK_U8 CalculateLinkModeStatus(SK_AC *pAC, SK_IOC IoC, unsigned int
+
+PNMI_STATIC SK_U8 CalculateLinkModeStatus(SK_AC *pAC, SK_IOC IoC, unsigned int
PhysPortIndex);
-static SK_U8 CalculateLinkStatus(SK_AC *pAC, SK_IOC IoC, unsigned int
+PNMI_STATIC SK_U8 CalculateLinkStatus(SK_AC *pAC, SK_IOC IoC, unsigned int
PhysPortIndex);
-static void CopyMac(char *pDst, SK_MAC_ADDR *pMac);
-static void CopyTrapQueue(SK_AC *pAC, char *pDstBuf);
-static int CsumStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int General(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static SK_U64 GetPhysStatVal(SK_AC *pAC, SK_IOC IoC,
+PNMI_STATIC void CopyMac(char *pDst, SK_MAC_ADDR *pMac);
+PNMI_STATIC void CopyTrapQueue(SK_AC *pAC, char *pDstBuf);
+PNMI_STATIC SK_U64 GetPhysStatVal(SK_AC *pAC, SK_IOC IoC,
unsigned int PhysPortIndex, unsigned int StatIndex);
-static SK_U64 GetStatVal(SK_AC *pAC, SK_IOC IoC, unsigned int LogPortIndex,
+PNMI_STATIC SK_U64 GetStatVal(SK_AC *pAC, SK_IOC IoC, unsigned int LogPortIndex,
unsigned int StatIndex, SK_U32 NetIndex);
-static char* GetTrapEntry(SK_AC *pAC, SK_U32 TrapId, unsigned int Size);
-static void GetTrapQueueLen(SK_AC *pAC, unsigned int *pLen,
+PNMI_STATIC char* GetTrapEntry(SK_AC *pAC, SK_U32 TrapId, unsigned int Size);
+PNMI_STATIC void GetTrapQueueLen(SK_AC *pAC, unsigned int *pLen,
unsigned int *pEntries);
-static int GetVpdKeyArr(SK_AC *pAC, SK_IOC IoC, char *pKeyArr,
+PNMI_STATIC int GetVpdKeyArr(SK_AC *pAC, SK_IOC IoC, char *pKeyArr,
unsigned int KeyArrLen, unsigned int *pKeyNo);
-static int LookupId(SK_U32 Id);
-static int Mac8023Stat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int MacPrivateConf(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int MacPrivateStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int MacUpdate(SK_AC *pAC, SK_IOC IoC, unsigned int FirstMac,
+PNMI_STATIC int LookupId(SK_U32 Id);
+PNMI_STATIC int MacUpdate(SK_AC *pAC, SK_IOC IoC, unsigned int FirstMac,
unsigned int LastMac);
-static int Monitor(SK_AC *pAC, SK_IOC IoC, int action,
- SK_U32 Id, char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int OidStruct(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int Perform(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int* pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int PnmiStruct(SK_AC *pAC, SK_IOC IoC, int Action, char *pBuf,
+PNMI_STATIC int PnmiStruct(SK_AC *pAC, SK_IOC IoC, int Action, char *pBuf,
unsigned int *pLen, SK_U32 NetIndex);
-static int PnmiVar(SK_AC *pAC, SK_IOC IoC, int Action, SK_U32 Id,
+PNMI_STATIC int PnmiVar(SK_AC *pAC, SK_IOC IoC, int Action, SK_U32 Id,
char *pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-static void QueueRlmtNewMacTrap(SK_AC *pAC, unsigned int ActiveMac);
-static void QueueRlmtPortTrap(SK_AC *pAC, SK_U32 TrapId,
+PNMI_STATIC void QueueRlmtNewMacTrap(SK_AC *pAC, unsigned int ActiveMac);
+PNMI_STATIC void QueueRlmtPortTrap(SK_AC *pAC, SK_U32 TrapId,
unsigned int PortIndex);
-static void QueueSensorTrap(SK_AC *pAC, SK_U32 TrapId,
+PNMI_STATIC void QueueSensorTrap(SK_AC *pAC, SK_U32 TrapId,
unsigned int SensorIndex);
-static void QueueSimpleTrap(SK_AC *pAC, SK_U32 TrapId);
-static void ResetCounter(SK_AC *pAC, SK_IOC IoC, SK_U32 NetIndex);
-static int Rlmt(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int RlmtStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int RlmtUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 NetIndex);
-static int SensorStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-static int SirqUpdate(SK_AC *pAC, SK_IOC IoC);
-static void VirtualConf(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, char *pBuf);
-static int Vpd(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-
-
-/******************************************************************************
- *
- * Global variables
- */
+PNMI_STATIC void QueueSimpleTrap(SK_AC *pAC, SK_U32 TrapId);
+PNMI_STATIC void ResetCounter(SK_AC *pAC, SK_IOC IoC, SK_U32 NetIndex);
+PNMI_STATIC int RlmtUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 NetIndex);
+PNMI_STATIC int SirqUpdate(SK_AC *pAC, SK_IOC IoC);
+PNMI_STATIC void VirtualConf(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, char *pBuf);
+PNMI_STATIC int Vct(SK_AC *pAC, SK_IOC IoC, int Action, SK_U32 Id, char *pBuf,
+ unsigned int *pLen, SK_U32 Instance, unsigned int TableIndex, SK_U32 NetIndex);
+PNMI_STATIC void CheckVctStatus(SK_AC *, SK_IOC, char *, SK_U32, SK_U32);
/*
* Table to correlate OID with handler function and index to
* hardware register stored in StatAddress if applicable.
*/
-static const SK_PNMI_TAB_ENTRY IdTable[] = {
- {OID_GEN_XMIT_OK,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX},
- {OID_GEN_RCV_OK,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX},
- {OID_GEN_XMIT_ERROR,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_GEN_RCV_ERROR,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_GEN_RCV_NO_BUFFER,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_GEN_DIRECTED_FRAMES_XMIT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_UNICAST},
- {OID_GEN_MULTICAST_FRAMES_XMIT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_MULTICAST},
- {OID_GEN_BROADCAST_FRAMES_XMIT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_BROADCAST},
- {OID_GEN_DIRECTED_FRAMES_RCV,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_UNICAST},
- {OID_GEN_MULTICAST_FRAMES_RCV,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_MULTICAST},
- {OID_GEN_BROADCAST_FRAMES_RCV,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_BROADCAST},
- {OID_GEN_RCV_CRC_ERROR,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_FCS},
- {OID_GEN_TRANSMIT_QUEUE_LENGTH,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_802_3_PERMANENT_ADDRESS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, 0},
- {OID_802_3_CURRENT_ADDRESS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, 0},
- {OID_802_3_RCV_ERROR_ALIGNMENT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_FRAMING},
- {OID_802_3_XMIT_ONE_COLLISION,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_SINGLE_COL},
- {OID_802_3_XMIT_MORE_COLLISIONS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_MULTI_COL},
- {OID_802_3_XMIT_DEFERRED,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_DEFFERAL},
- {OID_802_3_XMIT_MAX_COLLISIONS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_EXCESS_COL},
- {OID_802_3_RCV_OVERRUN,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_OVERFLOW},
- {OID_802_3_XMIT_UNDERRUN,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_UNDERRUN},
- {OID_802_3_XMIT_TIMES_CRS_LOST,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_CARRIER},
- {OID_802_3_XMIT_LATE_COLLISIONS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_LATE_COL},
- {OID_SKGE_MDB_VERSION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(MgmtDBVersion),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SUPPORTED_LIST,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_SKGE_ALL_DATA,
- 0,
- 0,
- 0,
- SK_PNMI_RW, OidStruct, 0},
- {OID_SKGE_VPD_FREE_BYTES,
- 1,
- 0,
- SK_PNMI_MAI_OFF(VpdFreeBytes),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ENTRIES_LIST,
- 1,
- 0,
- SK_PNMI_MAI_OFF(VpdEntriesList),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ENTRIES_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(VpdEntriesNumber),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_KEY,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdKey),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_VALUE,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdValue),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ACCESS,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdAccess),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ACTION,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdAction),
- SK_PNMI_RW, Vpd, 0},
- {OID_SKGE_PORT_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(PortNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_DEVICE_TYPE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(DeviceType),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_DRIVER_DESCR,
- 1,
- 0,
- SK_PNMI_MAI_OFF(DriverDescr),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_DRIVER_VERSION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(DriverVersion),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_HW_DESCR,
- 1,
- 0,
- SK_PNMI_MAI_OFF(HwDescr),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_HW_VERSION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(HwVersion),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_CHIPSET,
- 1,
- 0,
- SK_PNMI_MAI_OFF(Chipset),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_ACTION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(Action),
- SK_PNMI_RW, Perform, 0},
- {OID_SKGE_RESULT,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TestResult),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_BUS_TYPE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(BusType),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_BUS_SPEED,
- 1,
- 0,
- SK_PNMI_MAI_OFF(BusSpeed),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_BUS_WIDTH,
- 1,
- 0,
- SK_PNMI_MAI_OFF(BusWidth),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_SW_QUEUE_LEN,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxSwQueueLen),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_SW_QUEUE_MAX,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxSwQueueMax),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_RETRY,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxRetryCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_INTR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxIntrCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_INTR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxIntrCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_NO_BUF_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxNoBufCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_NO_BUF_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxNoBufCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_USED_DESCR_NO,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxUsedDescrNo),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_DELIVERED_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxDeliveredCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_OCTETS_DELIV_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxOctetsDeliveredCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_HW_ERROR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxHwErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_HW_ERROR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxHwErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_IN_ERRORS_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(InErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_OUT_ERROR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(OutErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_ERR_RECOVERY_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(ErrRecoveryCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SYSUPTIME,
- 1,
- 0,
- SK_PNMI_MAI_OFF(SysUpTime),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SENSOR_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(SensorNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SENSOR_INDEX,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorIndex),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_DESCR,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorDescr),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_TYPE,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorType),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_VALUE,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorValue),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_THRES_LOW,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningThresholdLow),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_THRES_UPP,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningThresholdHigh),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_THRES_LOW,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorThresholdLow),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_THRES_UPP,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorThresholdHigh),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_STATUS,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorStatus),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_CTS,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningCts),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_CTS,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorCts),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_TIME,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningTimestamp),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_TIME,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorTimestamp),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_CHKSM_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(ChecksumNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_CHKSM_RX_OK_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxOkCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_RX_UNABLE_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxUnableCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_RX_ERR_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxErrCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_TX_OK_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumTxOkCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_TX_UNABLE_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumTxUnableCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_STAT_TX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX},
- {OID_SKGE_STAT_TX_OCTETS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxOctetsOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_OCTET},
- {OID_SKGE_STAT_TX_BROADCAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxBroadcastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_BROADCAST},
- {OID_SKGE_STAT_TX_MULTICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMulticastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MULTICAST},
- {OID_SKGE_STAT_TX_UNICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxUnicastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_UNICAST},
- {OID_SKGE_STAT_TX_LONGFRAMES,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxLongFramesCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_LONGFRAMES},
- {OID_SKGE_STAT_TX_BURST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxBurstCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_BURST},
- {OID_SKGE_STAT_TX_PFLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxPauseMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_PMACC},
- {OID_SKGE_STAT_TX_FLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MACC},
- {OID_SKGE_STAT_TX_SINGLE_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSingleCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SINGLE_COL},
- {OID_SKGE_STAT_TX_MULTI_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMultipleCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MULTI_COL},
- {OID_SKGE_STAT_TX_EXCESS_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxExcessiveCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_EXCESS_COL},
- {OID_SKGE_STAT_TX_LATE_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxLateCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_LATE_COL},
- {OID_SKGE_STAT_TX_DEFFERAL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxDeferralCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_DEFFERAL},
- {OID_SKGE_STAT_TX_EXCESS_DEF,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxExcessiveDeferralCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_EXCESS_DEF},
- {OID_SKGE_STAT_TX_UNDERRUN,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxFifoUnderrunCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_UNDERRUN},
- {OID_SKGE_STAT_TX_CARRIER,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxCarrierCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_CARRIER},
-/* {OID_SKGE_STAT_TX_UTIL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxUtilization),
- SK_PNMI_RO, MacPrivateStat, (SK_U16)(-1)}, */
- {OID_SKGE_STAT_TX_64,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx64Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_64},
- {OID_SKGE_STAT_TX_127,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx127Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_127},
- {OID_SKGE_STAT_TX_255,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx255Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_255},
- {OID_SKGE_STAT_TX_511,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx511Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_511},
- {OID_SKGE_STAT_TX_1023,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx1023Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_1023},
- {OID_SKGE_STAT_TX_MAX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMaxCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MAX},
- {OID_SKGE_STAT_TX_SYNC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSyncCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SYNC},
- {OID_SKGE_STAT_TX_SYNC_OCTETS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSyncOctetsCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SYNC_OCTET},
- {OID_SKGE_STAT_RX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX},
- {OID_SKGE_STAT_RX_OCTETS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxOctetsOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_OCTET},
- {OID_SKGE_STAT_RX_BROADCAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxBroadcastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_BROADCAST},
- {OID_SKGE_STAT_RX_MULTICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMulticastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MULTICAST},
- {OID_SKGE_STAT_RX_UNICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxUnicastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_UNICAST},
- {OID_SKGE_STAT_RX_LONGFRAMES,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxLongFramesCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_LONGFRAMES},
- {OID_SKGE_STAT_RX_PFLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxPauseMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_PMACC},
- {OID_SKGE_STAT_RX_FLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MACC},
- {OID_SKGE_STAT_RX_PFLOWC_ERR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxPauseMacCtrlErrorCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_PMACC_ERR},
- {OID_SKGE_STAT_RX_FLOWC_UNKWN,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMacCtrlUnknownCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MACC_UNKWN},
- {OID_SKGE_STAT_RX_BURST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxBurstCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_BURST},
- {OID_SKGE_STAT_RX_MISSED,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMissedCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MISSED},
- {OID_SKGE_STAT_RX_FRAMING,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFramingCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_FRAMING},
- {OID_SKGE_STAT_RX_OVERFLOW,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFifoOverflowCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_OVERFLOW},
- {OID_SKGE_STAT_RX_JABBER,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxJabberCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_JABBER},
- {OID_SKGE_STAT_RX_CARRIER,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxCarrierCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_CARRIER},
- {OID_SKGE_STAT_RX_IR_LENGTH,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxIRLengthCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_IRLENGTH},
- {OID_SKGE_STAT_RX_SYMBOL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxSymbolCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_SYMBOL},
- {OID_SKGE_STAT_RX_SHORTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxShortsCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_SHORTS},
- {OID_SKGE_STAT_RX_RUNT,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxRuntCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_RUNT},
- {OID_SKGE_STAT_RX_CEXT,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxCextCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_CEXT},
- {OID_SKGE_STAT_RX_TOO_LONG,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxTooLongCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_TOO_LONG},
- {OID_SKGE_STAT_RX_FCS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFcsCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_FCS},
-/* {OID_SKGE_STAT_RX_UTIL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxUtilization),
- SK_PNMI_RO, MacPrivateStat, (SK_U16)(-1)}, */
- {OID_SKGE_STAT_RX_64,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx64Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_64},
- {OID_SKGE_STAT_RX_127,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx127Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_127},
- {OID_SKGE_STAT_RX_255,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx255Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_255},
- {OID_SKGE_STAT_RX_511,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx511Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_511},
- {OID_SKGE_STAT_RX_1023,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx1023Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_1023},
- {OID_SKGE_STAT_RX_MAX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMaxCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MAX},
- {OID_SKGE_PHYS_CUR_ADDR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfMacCurrentAddr),
- SK_PNMI_RW, Addr, 0},
- {OID_SKGE_PHYS_FAC_ADDR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfMacFactoryAddr),
- SK_PNMI_RO, Addr, 0},
- {OID_SKGE_PMD,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPMD),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_CONNECTOR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfConnector),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_LINK_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_LINK_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_LINK_MODE_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkModeStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_LINK_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_FLOWCTRL_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_FLOWCTRL_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_FLOWCTRL_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_PHY_OPERATION_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_PHY_OPERATION_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_PHY_OPERATION_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_TRAP,
- 1,
- 0,
- SK_PNMI_MAI_OFF(Trap),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TRAP_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TrapNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RLMT_MODE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtMode),
- SK_PNMI_RW, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtPortNumber),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_ACTIVE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtPortActive),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_PREFERRED,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtPortPreferred),
- SK_PNMI_RW, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeCts),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_TIME,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeTime),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_ESTIM,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeEstimate),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_THRES,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeThreshold),
- SK_PNMI_RW, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_INDEX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtIndex),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtStatus),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_TX_HELLO_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtTxHelloCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_RX_HELLO_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtRxHelloCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_TX_SP_REQ_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtTxSpHelloReqCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_RX_SP_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtRxSpHelloCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_MONITOR_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtMonitorNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RLMT_MONITOR_INDEX,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorIndex),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_ADDR,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorAddr),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_ERRS,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorErrorCts),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_TIMESTAMP,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorTimestamp),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_ADMIN,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorAdmin),
- SK_PNMI_RW, Monitor, 0},
- {OID_SKGE_MTU,
- 1,
- 0,
- SK_PNMI_MAI_OFF(MtuSize),
- SK_PNMI_RW, MacPrivateConf, 0},
+#include "skgemib.c"
+
+/* global variables **********************************************************/
+
+/*
+ * Overflow status register bit table and corresponding counter
+ * dependent on MAC type - the number relates to the size of overflow
+ * mask returned by the pFnMacOverflow function
+ */
+PNMI_STATIC const SK_U16 StatOvrflwBit[][SK_PNMI_MAC_TYPES] = {
+/* Bit0 */ { SK_PNMI_HTX, SK_PNMI_HTX_UNICAST},
+/* Bit1 */ { SK_PNMI_HTX_OCTETHIGH, SK_PNMI_HTX_BROADCAST},
+/* Bit2 */ { SK_PNMI_HTX_OCTETLOW, SK_PNMI_HTX_PMACC},
+/* Bit3 */ { SK_PNMI_HTX_BROADCAST, SK_PNMI_HTX_MULTICAST},
+/* Bit4 */ { SK_PNMI_HTX_MULTICAST, SK_PNMI_HTX_OCTETLOW},
+/* Bit5 */ { SK_PNMI_HTX_UNICAST, SK_PNMI_HTX_OCTETHIGH},
+/* Bit6 */ { SK_PNMI_HTX_LONGFRAMES, SK_PNMI_HTX_64},
+/* Bit7 */ { SK_PNMI_HTX_BURST, SK_PNMI_HTX_127},
+/* Bit8 */ { SK_PNMI_HTX_PMACC, SK_PNMI_HTX_255},
+/* Bit9 */ { SK_PNMI_HTX_MACC, SK_PNMI_HTX_511},
+/* Bit10 */ { SK_PNMI_HTX_SINGLE_COL, SK_PNMI_HTX_1023},
+/* Bit11 */ { SK_PNMI_HTX_MULTI_COL, SK_PNMI_HTX_MAX},
+/* Bit12 */ { SK_PNMI_HTX_EXCESS_COL, SK_PNMI_HTX_LONGFRAMES},
+/* Bit13 */ { SK_PNMI_HTX_LATE_COL, SK_PNMI_HTX_RESERVED},
+/* Bit14 */ { SK_PNMI_HTX_DEFFERAL, SK_PNMI_HTX_COL},
+/* Bit15 */ { SK_PNMI_HTX_EXCESS_DEF, SK_PNMI_HTX_LATE_COL},
+/* Bit16 */ { SK_PNMI_HTX_UNDERRUN, SK_PNMI_HTX_EXCESS_COL},
+/* Bit17 */ { SK_PNMI_HTX_CARRIER, SK_PNMI_HTX_MULTI_COL},
+/* Bit18 */ { SK_PNMI_HTX_UTILUNDER, SK_PNMI_HTX_SINGLE_COL},
+/* Bit19 */ { SK_PNMI_HTX_UTILOVER, SK_PNMI_HTX_UNDERRUN},
+/* Bit20 */ { SK_PNMI_HTX_64, SK_PNMI_HTX_RESERVED},
+/* Bit21 */ { SK_PNMI_HTX_127, SK_PNMI_HTX_RESERVED},
+/* Bit22 */ { SK_PNMI_HTX_255, SK_PNMI_HTX_RESERVED},
+/* Bit23 */ { SK_PNMI_HTX_511, SK_PNMI_HTX_RESERVED},
+/* Bit24 */ { SK_PNMI_HTX_1023, SK_PNMI_HTX_RESERVED},
+/* Bit25 */ { SK_PNMI_HTX_MAX, SK_PNMI_HTX_RESERVED},
+/* Bit26 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
+/* Bit27 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
+/* Bit28 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
+/* Bit29 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
+/* Bit30 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
+/* Bit31 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
+/* Bit32 */ { SK_PNMI_HRX, SK_PNMI_HRX_UNICAST},
+/* Bit33 */ { SK_PNMI_HRX_OCTETHIGH, SK_PNMI_HRX_BROADCAST},
+/* Bit34 */ { SK_PNMI_HRX_OCTETLOW, SK_PNMI_HRX_PMACC},
+/* Bit35 */ { SK_PNMI_HRX_BROADCAST, SK_PNMI_HRX_MULTICAST},
+/* Bit36 */ { SK_PNMI_HRX_MULTICAST, SK_PNMI_HRX_FCS},
+/* Bit37 */ { SK_PNMI_HRX_UNICAST, SK_PNMI_HRX_RESERVED},
+/* Bit38 */ { SK_PNMI_HRX_PMACC, SK_PNMI_HRX_OCTETLOW},
+/* Bit39 */ { SK_PNMI_HRX_MACC, SK_PNMI_HRX_OCTETHIGH},
+/* Bit40 */ { SK_PNMI_HRX_PMACC_ERR, SK_PNMI_HRX_BADOCTETLOW},
+/* Bit41 */ { SK_PNMI_HRX_MACC_UNKWN, SK_PNMI_HRX_BADOCTETHIGH},
+/* Bit42 */ { SK_PNMI_HRX_BURST, SK_PNMI_HRX_UNDERSIZE},
+/* Bit43 */ { SK_PNMI_HRX_MISSED, SK_PNMI_HRX_RUNT},
+/* Bit44 */ { SK_PNMI_HRX_FRAMING, SK_PNMI_HRX_64},
+/* Bit45 */ { SK_PNMI_HRX_OVERFLOW, SK_PNMI_HRX_127},
+/* Bit46 */ { SK_PNMI_HRX_JABBER, SK_PNMI_HRX_255},
+/* Bit47 */ { SK_PNMI_HRX_CARRIER, SK_PNMI_HRX_511},
+/* Bit48 */ { SK_PNMI_HRX_IRLENGTH, SK_PNMI_HRX_1023},
+/* Bit49 */ { SK_PNMI_HRX_SYMBOL, SK_PNMI_HRX_MAX},
+/* Bit50 */ { SK_PNMI_HRX_SHORTS, SK_PNMI_HRX_LONGFRAMES},
+/* Bit51 */ { SK_PNMI_HRX_RUNT, SK_PNMI_HRX_TOO_LONG},
+/* Bit52 */ { SK_PNMI_HRX_TOO_LONG, SK_PNMI_HRX_JABBER},
+/* Bit53 */ { SK_PNMI_HRX_FCS, SK_PNMI_HRX_RESERVED},
+/* Bit54 */ { SK_PNMI_HRX_RESERVED, SK_PNMI_HRX_OVERFLOW},
+/* Bit55 */ { SK_PNMI_HRX_CEXT, SK_PNMI_HRX_RESERVED},
+/* Bit56 */ { SK_PNMI_HRX_UTILUNDER, SK_PNMI_HRX_RESERVED},
+/* Bit57 */ { SK_PNMI_HRX_UTILOVER, SK_PNMI_HRX_RESERVED},
+/* Bit58 */ { SK_PNMI_HRX_64, SK_PNMI_HRX_RESERVED},
+/* Bit59 */ { SK_PNMI_HRX_127, SK_PNMI_HRX_RESERVED},
+/* Bit60 */ { SK_PNMI_HRX_255, SK_PNMI_HRX_RESERVED},
+/* Bit61 */ { SK_PNMI_HRX_511, SK_PNMI_HRX_RESERVED},
+/* Bit62 */ { SK_PNMI_HRX_1023, SK_PNMI_HRX_RESERVED},
+/* Bit63 */ { SK_PNMI_HRX_MAX, SK_PNMI_HRX_RESERVED}
};
/*
* Table for hardware register saving on resets and port switches
*/
-static const SK_PNMI_STATADDR StatAddress[SK_PNMI_MAX_IDX] = {
- /* 0 */ {TRUE, XM_TXF_OK},
- /* 1 */ {TRUE, 0},
- /* 2 */ {FALSE, 0},
- /* 3 */ {TRUE, XM_TXF_BC_OK},
- /* 4 */ {TRUE, XM_TXF_MC_OK},
- /* 5 */ {TRUE, XM_TXF_UC_OK},
- /* 6 */ {TRUE, XM_TXF_LONG},
- /* 7 */ {TRUE, XM_TXE_BURST},
- /* 8 */ {TRUE, XM_TXF_MPAUSE},
- /* 9 */ {TRUE, XM_TXF_MCTRL},
- /* 10 */ {TRUE, XM_TXF_SNG_COL},
- /* 11 */ {TRUE, XM_TXF_MUL_COL},
- /* 12 */ {TRUE, XM_TXF_ABO_COL},
- /* 13 */ {TRUE, XM_TXF_LAT_COL},
- /* 14 */ {TRUE, XM_TXF_DEF},
- /* 15 */ {TRUE, XM_TXF_EX_DEF},
- /* 16 */ {TRUE, XM_TXE_FIFO_UR},
- /* 17 */ {TRUE, XM_TXE_CS_ERR},
- /* 18 */ {FALSE, 0},
- /* 19 */ {FALSE, 0},
- /* 20 */ {TRUE, XM_TXF_64B},
- /* 21 */ {TRUE, XM_TXF_127B},
- /* 22 */ {TRUE, XM_TXF_255B},
- /* 23 */ {TRUE, XM_TXF_511B},
- /* 24 */ {TRUE, XM_TXF_1023B},
- /* 25 */ {TRUE, XM_TXF_MAX_SZ},
- /* 26 */ {FALSE, 0},
- /* 27 */ {FALSE, 0},
- /* 28 */ {FALSE, 0},
- /* 29 */ {FALSE, 0},
- /* 30 */ {FALSE, 0},
- /* 31 */ {FALSE, 0},
- /* 32 */ {TRUE, XM_RXF_OK},
- /* 33 */ {TRUE, 0},
- /* 34 */ {FALSE, 0},
- /* 35 */ {TRUE, XM_RXF_BC_OK},
- /* 36 */ {TRUE, XM_RXF_MC_OK},
- /* 37 */ {TRUE, XM_RXF_UC_OK},
- /* 38 */ {TRUE, XM_RXF_MPAUSE},
- /* 39 */ {TRUE, XM_RXF_MCTRL},
- /* 40 */ {TRUE, XM_RXF_INV_MP},
- /* 41 */ {TRUE, XM_RXF_INV_MOC},
- /* 42 */ {TRUE, XM_RXE_BURST},
- /* 43 */ {TRUE, XM_RXE_FMISS},
- /* 44 */ {TRUE, XM_RXF_FRA_ERR},
- /* 45 */ {TRUE, XM_RXE_FIFO_OV},
- /* 46 */ {TRUE, XM_RXF_JAB_PKT},
- /* 47 */ {TRUE, XM_RXE_CAR_ERR},
- /* 48 */ {TRUE, XM_RXF_LEN_ERR},
- /* 49 */ {TRUE, XM_RXE_SYM_ERR},
- /* 50 */ {TRUE, XM_RXE_SHT_ERR},
- /* 51 */ {TRUE, XM_RXE_RUNT},
- /* 52 */ {TRUE, XM_RXF_LNG_ERR},
- /* 53 */ {TRUE, XM_RXF_FCS_ERR},
- /* 54 */ {FALSE, 0},
- /* 55 */ {TRUE, XM_RXF_CEX_ERR},
- /* 56 */ {FALSE, 0},
- /* 57 */ {FALSE, 0},
- /* 58 */ {TRUE, XM_RXF_64B},
- /* 59 */ {TRUE, XM_RXF_127B},
- /* 60 */ {TRUE, XM_RXF_255B},
- /* 61 */ {TRUE, XM_RXF_511B},
- /* 62 */ {TRUE, XM_RXF_1023B},
- /* 63 */ {TRUE, XM_RXF_MAX_SZ},
- /* 64 */ {FALSE, 0},
- /* 65 */ {FALSE, 0},
- /* 66 */ {TRUE, 0}
+PNMI_STATIC const SK_PNMI_STATADDR StatAddr[SK_PNMI_MAX_IDX][SK_PNMI_MAC_TYPES] = {
+ /* SK_PNMI_HTX */
+ {{XM_TXF_OK, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_OCTETHIGH */
+ {{XM_TXO_OK_HI, SK_TRUE}, {GM_TXO_OK_HI, SK_TRUE}},
+ /* SK_PNMI_HTX_OCTETLOW */
+ {{XM_TXO_OK_LO, SK_FALSE}, {GM_TXO_OK_LO, SK_FALSE}},
+ /* SK_PNMI_HTX_BROADCAST */
+ {{XM_TXF_BC_OK, SK_TRUE}, {GM_TXF_BC_OK, SK_TRUE}},
+ /* SK_PNMI_HTX_MULTICAST */
+ {{XM_TXF_MC_OK, SK_TRUE}, {GM_TXF_MC_OK, SK_TRUE}},
+ /* SK_PNMI_HTX_UNICAST */
+ {{XM_TXF_UC_OK, SK_TRUE}, {GM_TXF_UC_OK, SK_TRUE}},
+ /* SK_PNMI_HTX_BURST */
+ {{XM_TXE_BURST, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_PMACC */
+ {{XM_TXF_MPAUSE, SK_TRUE}, {GM_TXF_MPAUSE, SK_TRUE}},
+ /* SK_PNMI_HTX_MACC */
+ {{XM_TXF_MCTRL, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_COL */
+ {{0, SK_FALSE}, {GM_TXF_COL, SK_TRUE}},
+ /* SK_PNMI_HTX_SINGLE_COL */
+ {{XM_TXF_SNG_COL, SK_TRUE}, {GM_TXF_SNG_COL, SK_TRUE}},
+ /* SK_PNMI_HTX_MULTI_COL */
+ {{XM_TXF_MUL_COL, SK_TRUE}, {GM_TXF_MUL_COL, SK_TRUE}},
+ /* SK_PNMI_HTX_EXCESS_COL */
+ {{XM_TXF_ABO_COL, SK_TRUE}, {GM_TXF_ABO_COL, SK_TRUE}},
+ /* SK_PNMI_HTX_LATE_COL */
+ {{XM_TXF_LAT_COL, SK_TRUE}, {GM_TXF_LAT_COL, SK_TRUE}},
+ /* SK_PNMI_HTX_DEFFERAL */
+ {{XM_TXF_DEF, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_EXCESS_DEF */
+ {{XM_TXF_EX_DEF, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_UNDERRUN */
+ {{XM_TXE_FIFO_UR, SK_TRUE}, {GM_TXE_FIFO_UR, SK_TRUE}},
+ /* SK_PNMI_HTX_CARRIER */
+ {{XM_TXE_CS_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_UTILUNDER */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_UTILOVER */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_64 */
+ {{XM_TXF_64B, SK_TRUE}, {GM_TXF_64B, SK_TRUE}},
+ /* SK_PNMI_HTX_127 */
+ {{XM_TXF_127B, SK_TRUE}, {GM_TXF_127B, SK_TRUE}},
+ /* SK_PNMI_HTX_255 */
+ {{XM_TXF_255B, SK_TRUE}, {GM_TXF_255B, SK_TRUE}},
+ /* SK_PNMI_HTX_511 */
+ {{XM_TXF_511B, SK_TRUE}, {GM_TXF_511B, SK_TRUE}},
+ /* SK_PNMI_HTX_1023 */
+ {{XM_TXF_1023B, SK_TRUE}, {GM_TXF_1023B, SK_TRUE}},
+ /* SK_PNMI_HTX_MAX */
+ {{XM_TXF_MAX_SZ, SK_TRUE}, {GM_TXF_1518B, SK_TRUE}},
+ /* SK_PNMI_HTX_LONGFRAMES */
+ {{XM_TXF_LONG, SK_TRUE}, {GM_TXF_MAX_SZ, SK_TRUE}},
+ /* SK_PNMI_HTX_SYNC */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_SYNC_OCTET */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HTX_RESERVED */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX */
+ {{XM_RXF_OK, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_OCTETHIGH */
+ {{XM_RXO_OK_HI, SK_TRUE}, {GM_RXO_OK_HI, SK_TRUE}},
+ /* SK_PNMI_HRX_OCTETLOW */
+ {{XM_RXO_OK_LO, SK_FALSE}, {GM_RXO_OK_LO, SK_FALSE}},
+ /* SK_PNMI_HRX_BADOCTETHIGH */
+ {{0, SK_FALSE}, {GM_RXO_ERR_HI, SK_TRUE}},
+ /* SK_PNMI_HRX_BADOCTETLOW */
+ {{0, SK_FALSE}, {GM_RXO_ERR_LO, SK_TRUE}},
+ /* SK_PNMI_HRX_BROADCAST */
+ {{XM_RXF_BC_OK, SK_TRUE}, {GM_RXF_BC_OK, SK_TRUE}},
+ /* SK_PNMI_HRX_MULTICAST */
+ {{XM_RXF_MC_OK, SK_TRUE}, {GM_RXF_MC_OK, SK_TRUE}},
+ /* SK_PNMI_HRX_UNICAST */
+ {{XM_RXF_UC_OK, SK_TRUE}, {GM_RXF_UC_OK, SK_TRUE}},
+ /* SK_PNMI_HRX_PMACC */
+ {{XM_RXF_MPAUSE, SK_TRUE}, {GM_RXF_MPAUSE, SK_TRUE}},
+ /* SK_PNMI_HRX_MACC */
+ {{XM_RXF_MCTRL, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_PMACC_ERR */
+ {{XM_RXF_INV_MP, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_MACC_UNKWN */
+ {{XM_RXF_INV_MOC, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_BURST */
+ {{XM_RXE_BURST, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_MISSED */
+ {{XM_RXE_FMISS, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_FRAMING */
+ {{XM_RXF_FRA_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_UNDERSIZE */
+ {{0, SK_FALSE}, {GM_RXF_SHT, SK_TRUE}},
+ /* SK_PNMI_HRX_OVERFLOW */
+ {{XM_RXE_FIFO_OV, SK_TRUE}, {GM_RXE_FIFO_OV, SK_TRUE}},
+ /* SK_PNMI_HRX_JABBER */
+ {{XM_RXF_JAB_PKT, SK_TRUE}, {GM_RXF_JAB_PKT, SK_TRUE}},
+ /* SK_PNMI_HRX_CARRIER */
+ {{XM_RXE_CAR_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_IRLENGTH */
+ {{XM_RXF_LEN_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_SYMBOL */
+ {{XM_RXE_SYM_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_SHORTS */
+ {{XM_RXE_SHT_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_RUNT */
+ {{XM_RXE_RUNT, SK_TRUE}, {GM_RXE_FRAG, SK_TRUE}},
+ /* SK_PNMI_HRX_TOO_LONG */
+ {{XM_RXF_LNG_ERR, SK_TRUE}, {GM_RXF_LNG_ERR, SK_TRUE}},
+ /* SK_PNMI_HRX_FCS */
+ {{XM_RXF_FCS_ERR, SK_TRUE}, {GM_RXF_FCS_ERR, SK_TRUE}},
+ /* SK_PNMI_HRX_CEXT */
+ {{XM_RXF_CEX_ERR, SK_TRUE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_UTILUNDER */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_UTILOVER */
+ {{0, SK_FALSE}, {0, SK_FALSE}},
+ /* SK_PNMI_HRX_64 */
+ {{XM_RXF_64B, SK_TRUE}, {GM_RXF_64B, SK_TRUE}},
+ /* SK_PNMI_HRX_127 */
+ {{XM_RXF_127B, SK_TRUE}, {GM_RXF_127B, SK_TRUE}},
+ /* SK_PNMI_HRX_255 */
+ {{XM_RXF_255B, SK_TRUE}, {GM_RXF_255B, SK_TRUE}},
+ /* SK_PNMI_HRX_511 */
+ {{XM_RXF_511B, SK_TRUE}, {GM_RXF_511B, SK_TRUE}},
+ /* SK_PNMI_HRX_1023 */
+ {{XM_RXF_1023B, SK_TRUE}, {GM_RXF_1023B, SK_TRUE}},
+ /* SK_PNMI_HRX_MAX */
+ {{XM_RXF_MAX_SZ, SK_TRUE}, {GM_RXF_1518B, SK_TRUE}},
+ /* SK_PNMI_HRX_LONGFRAMES */
+ {{0, SK_FALSE}, {GM_RXF_MAX_SZ, SK_TRUE}},
+ /* SK_PNMI_HRX_RESERVED */
+ {{0, SK_FALSE}, {0, SK_FALSE}}
};
@@ -1457,7 +798,6 @@
* Returns:
* Always 0
*/
-
int SkPnmiInit(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
@@ -1468,6 +808,7 @@
SK_U16 Val16; /* Multiple purpose 16 bit variable */
SK_U8 Val8; /* Mulitple purpose 8 bit variable */
SK_EVPARA EventParam; /* Event struct for timer event */
+ SK_PNMI_VCT *pVctBackupData;
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
@@ -1485,6 +826,31 @@
pAC->Pnmi.Port[PortIndex].ActiveFlag = SK_FALSE;
pAC->Pnmi.DualNetActiveFlag = SK_FALSE;
}
+
+#ifdef SK_PNMI_CHECK
+ if (SK_PNMI_MAX_IDX != SK_PNMI_CNT_NO) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR049, SK_PNMI_ERR049MSG);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_INIT | SK_DBGCAT_FATAL,
+ ("CounterOffset struct size (%d) differs from"
+ "SK_PNMI_MAX_IDX (%d)\n",
+ SK_PNMI_CNT_NO, SK_PNMI_MAX_IDX));
+ }
+
+ if (SK_PNMI_MAX_IDX !=
+ (sizeof(StatAddr) / (sizeof(SK_PNMI_STATADDR) * SK_PNMI_MAC_TYPES))) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR050, SK_PNMI_ERR050MSG);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_INIT | SK_DBGCAT_FATAL,
+ ("StatAddr table size (%d) differs from "
+ "SK_PNMI_MAX_IDX (%d)\n",
+ (sizeof(StatAddr) /
+ (sizeof(SK_PNMI_STATADDR) * SK_PNMI_MAC_TYPES)),
+ SK_PNMI_MAX_IDX));
+ }
+#endif /* SK_PNMI_CHECK */
break;
case SK_INIT_IO:
@@ -1495,12 +861,16 @@
for (PortIndex = 0; PortIndex < PortMax; PortIndex ++) {
- Val16 = XM_SC_CLR_RXC | XM_SC_CLR_TXC;
- XM_OUT16(IoC, PortIndex, XM_STAT_CMD, Val16);
- /* Clear two times according to Errata #3 */
- XM_OUT16(IoC, PortIndex, XM_STAT_CMD, Val16);
+ pAC->GIni.GIFunc.pFnMacResetCounter(pAC, IoC, PortIndex);
}
-
+
+ /* Initialize DSP variables for Vct() to 0xff => Never written! */
+ for (PortIndex = 0; PortIndex < PortMax; PortIndex ++) {
+ pAC->GIni.GP[PortIndex].PCableLen = 0xff;
+ pVctBackupData = &pAC->Pnmi.VctBackup[PortIndex];
+ pVctBackupData->PCableLen = 0xff;
+ }
+
/*
* Get pci bus speed
*/
@@ -1526,6 +896,22 @@
}
/*
+ * Get chipset
+ */
+ switch (pAC->GIni.GIChipId) {
+ case CHIP_ID_GENESIS:
+ pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_XMAC;
+ break;
+
+ case CHIP_ID_YUKON:
+ pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON;
+ break;
+
+ default:
+ break;
+ }
+
+ /*
* Get PMD and DeviceType
*/
SK_IN8(IoC, B2_PMD_TYP, &Val8);
@@ -1639,23 +1025,22 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to take
* the data.
* SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
int SkPnmiGetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
-void *pBuf, /* Buffer to which to mgmt data will be retrieved */
+void *pBuf, /* Buffer to which the management data will be copied */
unsigned int *pLen, /* On call: buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
("PNMI: SkPnmiGetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
@@ -1672,13 +1057,13 @@
* Description:
* Calls a general sub-function for all this stuff. The preset does
* the same as a set, but returns just before finally setting the
- * new value. This is useful to check if a set might be successful.
- * If as instance a -1 is passed, an array of values is supposed and
- * all instance of the OID will be set.
+ * new value. This is usefull to check if a set might be successfull.
+ * If the instance -1 is passed, an array of values is supposed and
+ * all instances of the OID will be set.
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -1687,18 +1072,17 @@
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
int SkPnmiPreSetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
-void *pBuf, /* Buffer which stores the mgmt data to be set */
-unsigned int *pLen, /* Total length of mgmt data */
+void *pBuf, /* Buffer to which the management data will be copied */
+unsigned int *pLen, /* Total length of management data */
SK_U32 Instance, /* Instance (1..n) that is to be set or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
("PNMI: SkPnmiPreSetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
@@ -1716,13 +1100,13 @@
* Description:
* Calls a general sub-function for all this stuff. The preset does
* the same as a set, but returns just before finally setting the
- * new value. This is useful to check if a set might be successful.
- * If as instance a -1 is passed, an array of values is supposed and
- * all instance of the OID will be set.
+ * new value. This is usefull to check if a set might be successfull.
+ * If the instance -1 is passed, an array of values is supposed and
+ * all instances of the OID will be set.
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -1731,18 +1115,17 @@
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
int SkPnmiSetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
-void *pBuf, /* Buffer which stores the mgmt data to be set */
-unsigned int *pLen, /* Total length of mgmt data */
+void *pBuf, /* Buffer to which the management data will be copied */
+unsigned int *pLen, /* Total length of management data */
SK_U32 Instance, /* Instance (1..n) that is to be set or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
("PNMI: SkPnmiSetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
@@ -1766,18 +1149,17 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to take
* the data.
- * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
+ * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
*/
-
int SkPnmiGetStruct(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-void *pBuf, /* Buffer which will store the retrieved data */
+void *pBuf, /* Buffer to which the management data will be copied. */
unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
int Ret;
unsigned int TableIndex;
@@ -1861,8 +1243,7 @@
/* Retrieve values */
SK_MEMSET((char *)pBuf, 0, SK_PNMI_STRUCT_SIZE);
- for (TableIndex = 0; TableIndex < sizeof(IdTable)/sizeof(IdTable[0]);
- TableIndex ++) {
+ for (TableIndex = 0; TableIndex < ID_TABLE_SIZE; TableIndex ++) {
InstanceNo = IdTable[TableIndex].InstanceNo;
for (InstanceCnt = 1; InstanceCnt <= InstanceNo;
@@ -1935,7 +1316,7 @@
* Description:
* Calls a general sub-function for all this set stuff. The preset does
* the same as a set, but returns just before finally setting the
- * new value. This is useful to check if a set might be successful.
+ * new value. This is usefull to check if a set might be successfull.
* The sub-function runs through the IdTable, checks which OIDs are able
* to set, and calls the handler function of the OID to perform the
* preset. The return value of the function will also be stored in
@@ -1944,26 +1325,25 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
* value range.
*/
-
int SkPnmiPreSetStruct(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
void *pBuf, /* Buffer which contains the data to be set */
unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
("PNMI: SkPnmiPreSetStruct: Called, BufLen=%d, NetIndex=%d\n",
*pLen, NetIndex));
- return (PnmiStruct(pAC, IoC, SK_PNMI_PRESET, (char *)pBuf,
+ return (PnmiStruct(pAC, IoC, SK_PNMI_PRESET, (char *)pBuf,
pLen, NetIndex));
}
@@ -1983,26 +1363,25 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
* value range.
*/
-
int SkPnmiSetStruct(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
void *pBuf, /* Buffer which contains the data to be set */
unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
("PNMI: SkPnmiSetStruct: Called, BufLen=%d, NetIndex=%d\n",
*pLen, NetIndex));
- return (PnmiStruct(pAC, IoC, SK_PNMI_SET, (char *)pBuf,
+ return (PnmiStruct(pAC, IoC, SK_PNMI_SET, (char *)pBuf,
pLen, NetIndex));
}
@@ -2049,14 +1428,13 @@
* is now an active port. PNMI will now
* add the statistic data of this port to
* the virtual port.
- * SK_PNMI_EVT_RLMT_SET_NETS Notifies PNMI about the net mode. The first Parameter
+ * SK_PNMI_EVT_RLMT_SET_NETS Notifies PNMI about the net mode. The first parameter
* contains the number of nets. 1 means single net, 2 means
- * dual net. The second Parameter is -1
+ * dual net. The second parameter is -1
*
* Returns:
* Always 0
*/
-
int SkPnmiEvent(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
@@ -2065,13 +1443,14 @@
{
unsigned int PhysPortIndex;
unsigned int MaxNetNumber;
- int CounterIndex;
- int Ret;
+ int CounterIndex;
+ int Ret;
SK_U16 MacStatus;
SK_U64 OverflowStatus;
SK_U64 Mask;
- SK_U32 MacCntEvent;
+ int MacType;
SK_U64 Value;
+ SK_U32 Val32;
SK_U16 Register;
SK_EVPARA EventParam;
SK_U64 NewestValue;
@@ -2079,6 +1458,11 @@
SK_U64 Delta;
SK_PNMI_ESTIMATE *pEst;
SK_U32 NetIndex;
+ SK_GEPORT *pPrt;
+ SK_PNMI_VCT *pVctBackupData;
+ SK_U32 RetCode;
+ int i;
+ SK_U32 CableLength;
#ifdef DEBUG
@@ -2086,11 +1470,13 @@
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
("PNMI: SkPnmiEvent: Called, Event=0x%x, Param=0x%x\n",
- (unsigned long)Event, (unsigned long)Param.Para64));
+ (unsigned int)Event, (unsigned int)Param.Para64));
}
-#endif
+#endif /* DEBUG */
SK_PNMI_CHECKFLAGS("SkPnmiEvent: On call");
+ MacType = pAC->GIni.GIMacType;
+
switch (Event) {
case SK_PNMI_EVT_SIRQ_OVERFLOW:
@@ -2100,33 +1486,20 @@
if (PhysPortIndex >= SK_MAX_MACS) {
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SIRQ_OVERFLOW parameter wrong, PhysPortIndex=0x%x\n",
+ ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SIRQ_OVERFLOW parameter"
+ " wrong, PhysPortIndex=0x%x\n",
PhysPortIndex));
return (0);
}
-#endif
+#endif /* DEBUG */
OverflowStatus = 0;
/*
- * Check which source caused an overflow interrupt. The
- * interrupt source is a self-clearing register. We only
- * need to check the interrupt source once. Another check
- * will be done by the SIRQ module to be sure that no
- * interrupt get lost during process time.
+ * Check which source caused an overflow interrupt.
*/
- if ((MacStatus & XM_IS_RXC_OV) == XM_IS_RXC_OV) {
-
- XM_IN32(IoC, PhysPortIndex, XM_RX_CNT_EV,
- &MacCntEvent);
- OverflowStatus |= (SK_U64)MacCntEvent << 32;
- }
- if ((MacStatus & XM_IS_TXC_OV) == XM_IS_TXC_OV) {
-
- XM_IN32(IoC, PhysPortIndex, XM_TX_CNT_EV,
- &MacCntEvent);
- OverflowStatus |= (SK_U64)MacCntEvent;
- }
- if (OverflowStatus == 0) {
+ if ((pAC->GIni.GIFunc.pFnMacOverflow(pAC, IoC, PhysPortIndex,
+ MacStatus, &OverflowStatus) != 0) ||
+ (OverflowStatus == 0)) {
SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
return (0);
@@ -2145,45 +1518,46 @@
continue;
}
- switch (CounterIndex) {
+ switch (StatOvrflwBit[CounterIndex][MacType]) {
case SK_PNMI_HTX_UTILUNDER:
case SK_PNMI_HTX_UTILOVER:
- XM_IN16(IoC, PhysPortIndex, XM_TX_CMD,
- &Register);
- Register |= XM_TX_SAM_LINE;
- XM_OUT16(IoC, PhysPortIndex, XM_TX_CMD,
- Register);
+ if (MacType == SK_MAC_XMAC) {
+ XM_IN16(IoC, PhysPortIndex, XM_TX_CMD, &Register);
+ Register |= XM_TX_SAM_LINE;
+ XM_OUT16(IoC, PhysPortIndex, XM_TX_CMD, Register);
+ }
break;
case SK_PNMI_HRX_UTILUNDER:
case SK_PNMI_HRX_UTILOVER:
- XM_IN16(IoC, PhysPortIndex, XM_RX_CMD,
- &Register);
- Register |= XM_RX_SAM_LINE;
- XM_OUT16(IoC, PhysPortIndex, XM_RX_CMD,
- Register);
+ if (MacType == SK_MAC_XMAC) {
+ XM_IN16(IoC, PhysPortIndex, XM_RX_CMD, &Register);
+ Register |= XM_RX_SAM_LINE;
+ XM_OUT16(IoC, PhysPortIndex, XM_RX_CMD, Register);
+ }
break;
case SK_PNMI_HTX_OCTETHIGH:
case SK_PNMI_HTX_OCTETLOW:
- case SK_PNMI_HTX_RESERVED26:
- case SK_PNMI_HTX_RESERVED27:
- case SK_PNMI_HTX_RESERVED28:
- case SK_PNMI_HTX_RESERVED29:
- case SK_PNMI_HTX_RESERVED30:
- case SK_PNMI_HTX_RESERVED31:
+ case SK_PNMI_HTX_RESERVED:
case SK_PNMI_HRX_OCTETHIGH:
case SK_PNMI_HRX_OCTETLOW:
case SK_PNMI_HRX_IRLENGTH:
- case SK_PNMI_HRX_RESERVED22:
+ case SK_PNMI_HRX_RESERVED:
/*
* the following counters aren't be handled (id > 63)
*/
case SK_PNMI_HTX_SYNC:
case SK_PNMI_HTX_SYNC_OCTET:
+ break;
+
case SK_PNMI_HRX_LONGFRAMES:
+ if (MacType == SK_MAC_GMAC) {
+ pAC->Pnmi.Port[PhysPortIndex].
+ CounterHigh[CounterIndex] ++;
+ }
break;
default:
@@ -2202,7 +1576,8 @@
(unsigned int)Param.Para64));
return (0);
}
-#endif
+#endif /* DEBUG */
+
/*
* Store a trap message in the trap buffer and generate
* an event for user space applications with the
@@ -2218,11 +1593,12 @@
if ((unsigned int)Param.Para64 >= (unsigned int)pAC->I2c.MaxSens) {
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR:SkPnmiEvent: SK_PNMI_EVT_SEN_WAR_UPP parameter wrong, SensorIndex=%d\n",
+ ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SEN_WAR_UPP parameter wrong, SensorIndex=%d\n",
(unsigned int)Param.Para64));
return (0);
}
-#endif
+#endif /* DEBUG */
+
/*
* Store a trap message in the trap buffer and generate
* an event for user space applications with the
@@ -2242,7 +1618,8 @@
(unsigned int)Param.Para64));
return (0);
}
-#endif
+#endif /* DEBUG */
+
/*
* Store a trap message in the trap buffer and generate
* an event for user space applications with the
@@ -2262,7 +1639,8 @@
(unsigned int)Param.Para64));
return (0);
}
-#endif
+#endif /* DEBUG */
+
/*
* Store a trap message in the trap buffer and generate
* an event for user space applications with the
@@ -2282,7 +1660,7 @@
* Be careful in changing these values, on change check
* - typedef of SK_PNMI_ESTIMATE (Size of EstValue
* array one less than value number)
- * - Timer initilization SkTimerStart() in SkPnmiInit
+ * - Timer initialization SkTimerStart() in SkPnmiInit
* - Delta value below must be multiplicated with
* power of 2
*
@@ -2355,20 +1733,21 @@
return (0);
}
-#endif
+#endif /* DEBUG */
/*
- * Set all counters and timestamps to zero
+ * Set all counters and timestamps to zero.
+ * The according NetIndex is required as a
+ * parameter of the event.
*/
- ResetCounter(pAC, IoC, NetIndex); /* the according NetIndex is required
- as a Parameter of the Event */
+ ResetCounter(pAC, IoC, NetIndex);
break;
case SK_PNMI_EVT_XMAC_RESET:
/*
* To grant continuous counter values store the current
* XMAC statistic values to the entries 1..n of the
- * CounterOffset array. XMAC Errata #2
+ * CounterOffset array. XMAC Errata #2
*/
#ifdef DEBUG
if ((unsigned int)Param.Para64 >= SK_MAX_MACS) {
@@ -2396,67 +1775,96 @@
*/
pAC->Pnmi.MacUpdatedFlag ++;
- for (CounterIndex = 0; CounterIndex < SK_PNMI_SCNT_NOT;
+ for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
CounterIndex ++) {
- if (!StatAddress[CounterIndex].GetOffset) {
+ if (!StatAddr[CounterIndex][MacType].GetOffset) {
continue;
}
- pAC->Pnmi.Port[PhysPortIndex].
- CounterOffset[CounterIndex] = GetPhysStatVal(
- pAC, IoC, PhysPortIndex, CounterIndex);
- pAC->Pnmi.Port[PhysPortIndex].
- CounterHigh[CounterIndex] = 0;
+ pAC->Pnmi.Port[PhysPortIndex].CounterOffset[CounterIndex] =
+ GetPhysStatVal(pAC, IoC, PhysPortIndex, CounterIndex);
+
+ pAC->Pnmi.Port[PhysPortIndex].CounterHigh[CounterIndex] = 0;
}
pAC->Pnmi.MacUpdatedFlag --;
break;
case SK_PNMI_EVT_RLMT_PORT_UP:
+ PhysPortIndex = (unsigned int)Param.Para32[0];
#ifdef DEBUG
- if ((unsigned int)Param.Para32[0] >= SK_MAX_MACS) {
+ if (PhysPortIndex >= SK_MAX_MACS) {
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_PORT_UP parameter wrong, PhysPortIndex=%d\n",
- (unsigned int)Param.Para32[0]));
+ ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_PORT_UP parameter"
+ " wrong, PhysPortIndex=%d\n", PhysPortIndex));
return (0);
}
-#endif
+#endif /* DEBUG */
+
/*
* Store a trap message in the trap buffer and generate an event for
* user space applications with the SK_DRIVER_SENDEVENT macro.
*/
- QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_UP,
- (unsigned int)Param.Para32[0]);
+ QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_UP, PhysPortIndex);
(void)SK_DRIVER_SENDEVENT(pAC, IoC);
+
+ /* Bugfix for XMAC errata (#10620)*/
+ if (MacType == SK_MAC_XMAC) {
+ /* Add incremental difference to offset (#10620)*/
+ (void)pAC->GIni.GIFunc.pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ XM_RXE_SHT_ERR, &Val32);
+
+ Value = (((SK_U64)pAC->Pnmi.Port[PhysPortIndex].
+ CounterHigh[SK_PNMI_HRX_SHORTS] << 32) | (SK_U64)Val32);
+ pAC->Pnmi.Port[PhysPortIndex].CounterOffset[SK_PNMI_HRX_SHORTS] +=
+ Value - pAC->Pnmi.Port[PhysPortIndex].RxShortZeroMark;
+ }
+
+ /* Tell VctStatus() that a link was up meanwhile. */
+ pAC->Pnmi.VctStatus[PhysPortIndex] |= SK_PNMI_VCT_LINK;
break;
- case SK_PNMI_EVT_RLMT_PORT_DOWN:
+ case SK_PNMI_EVT_RLMT_PORT_DOWN:
+ PhysPortIndex = (unsigned int)Param.Para32[0];
+
#ifdef DEBUG
- if ((unsigned int)Param.Para32[0] >= SK_MAX_MACS) {
+ if (PhysPortIndex >= SK_MAX_MACS) {
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_PORT_DOWN parameter wrong, PhysPortIndex=%d\n",
- (unsigned int)Param.Para32[0]));
+ ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_PORT_DOWN parameter"
+ " wrong, PhysPortIndex=%d\n", PhysPortIndex));
return (0);
}
-#endif
+#endif /* DEBUG */
+
/*
* Store a trap message in the trap buffer and generate an event for
* user space applications with the SK_DRIVER_SENDEVENT macro.
*/
- QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_DOWN,
- (unsigned int)Param.Para32[0]);
+ QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_DOWN, PhysPortIndex);
(void)SK_DRIVER_SENDEVENT(pAC, IoC);
+
+ /* Bugfix #10620 - get zero level for incremental difference */
+ if (MacType == SK_MAC_XMAC) {
+
+ (void)pAC->GIni.GIFunc.pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ XM_RXE_SHT_ERR, &Val32);
+
+ pAC->Pnmi.Port[PhysPortIndex].RxShortZeroMark =
+ (((SK_U64)pAC->Pnmi.Port[PhysPortIndex].
+ CounterHigh[SK_PNMI_HRX_SHORTS] << 32) | (SK_U64)Val32);
+ }
break;
case SK_PNMI_EVT_RLMT_ACTIVE_DOWN:
PhysPortIndex = (unsigned int)Param.Para32[0];
NetIndex = (SK_U32)Param.Para32[1];
+
#ifdef DEBUG
if (PhysPortIndex >= SK_MAX_MACS) {
@@ -2471,7 +1879,8 @@
("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_ACTIVE_DOWN parameter too high, NetIndex=%d\n",
NetIndex));
}
-#endif
+#endif /* DEBUG */
+
/*
* For now, ignore event if NetIndex != 0.
*/
@@ -2512,7 +1921,7 @@
for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
CounterIndex ++) {
- if (!StatAddress[CounterIndex].GetOffset) {
+ if (!StatAddr[CounterIndex][MacType].GetOffset) {
continue;
}
@@ -2533,6 +1942,7 @@
case SK_PNMI_EVT_RLMT_ACTIVE_UP:
PhysPortIndex = (unsigned int)Param.Para32[0];
NetIndex = (SK_U32)Param.Para32[1];
+
#ifdef DEBUG
if (PhysPortIndex >= SK_MAX_MACS) {
@@ -2547,7 +1957,8 @@
("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_ACTIVE_UP parameter too high, NetIndex=%d\n",
NetIndex));
}
-#endif
+#endif /* DEBUG */
+
/*
* For now, ignore event if NetIndex != 0.
*/
@@ -2599,7 +2010,7 @@
for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
CounterIndex ++) {
- if (!StatAddress[CounterIndex].GetOffset) {
+ if (!StatAddr[CounterIndex][MacType].GetOffset) {
continue;
}
@@ -2609,9 +2020,7 @@
pAC->Pnmi.VirtualCounterOffset[CounterIndex] -= Value;
}
- /*
- * Set port to active
- */
+ /* Set port to active */
pAC->Pnmi.Port[PhysPortIndex].ActiveFlag = SK_TRUE;
pAC->Pnmi.MacUpdatedFlag --;
@@ -2644,7 +2053,7 @@
return (SK_PNMI_ERR_UNKNOWN_NET);
}
- if((unsigned int)Param.Para32[0] == 1){ /* single net mode */
+ if ((unsigned int)Param.Para32[0] == 1) { /* single net mode */
pAC->Pnmi.DualNetActiveFlag = SK_FALSE;
}
else { /* dual net mode */
@@ -2652,6 +2061,58 @@
}
break;
+ case SK_PNMI_EVT_VCT_RESET:
+ PhysPortIndex = Param.Para32[0];
+ pPrt = &pAC->GIni.GP[PhysPortIndex];
+ pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
+
+ if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING) {
+ RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_FALSE);
+ if (RetCode == 2) {
+ /*
+ * VCT test is still running.
+ * Start VCT timer counter again.
+ */
+ SK_MEMSET((char *) &Param, 0, sizeof(Param));
+ Param.Para32[0] = PhysPortIndex;
+ Param.Para32[1] = -1;
+ SkTimerStart(pAC, IoC,
+ &pAC->Pnmi.VctTimeout[PhysPortIndex].VctTimer,
+ 4000000, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Param);
+ break;
+ }
+ pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_PENDING;
+ pAC->Pnmi.VctStatus[PhysPortIndex] |=
+ (SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_TEST_DONE);
+
+ /* Copy results for later use to PNMI struct. */
+ for (i = 0; i < 4; i++) {
+ if (pPrt->PMdiPairSts[i] == SK_PNMI_VCT_NORMAL_CABLE) {
+ if ((pPrt->PMdiPairLen[i] > 35) &&
+ (pPrt->PMdiPairLen[i] < 0xff)) {
+ pPrt->PMdiPairSts[i] = SK_PNMI_VCT_IMPEDANCE_MISMATCH;
+ }
+ }
+ if ((pPrt->PMdiPairLen[i] > 35) &&
+ (pPrt->PMdiPairLen[i] != 0xff)) {
+ CableLength = 1000 *
+ (((175 * pPrt->PMdiPairLen[i]) / 210) - 28);
+ }
+ else {
+ CableLength = 0;
+ }
+ pVctBackupData->PMdiPairLen[i] = CableLength;
+ pVctBackupData->PMdiPairSts[i] = pPrt->PMdiPairSts[i];
+ }
+
+ Param.Para32[0] = PhysPortIndex;
+ Param.Para32[1] = -1;
+ SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Param);
+ SkEventDispatcher(pAC, IoC);
+ }
+
+ break;
+
default:
break;
}
@@ -2678,20 +2139,19 @@
* SkGePnmiPreSetVar, or SkGePnmiSetVar.
*
* Returns:
- * SK_PNMI_ERR_XXX. For details have a look to the description of the
+ * SK_PNMI_ERR_XXX. For details have a look at the description of the
* calling functions.
- * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
+ * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
*/
-
-static int PnmiVar(
+PNMI_STATIC int PnmiVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer which stores the mgmt data to be set */
-unsigned int *pLen, /* Total length of mgmt data */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* Total length of pBuf management data */
SK_U32 Instance, /* Instance (1..n) that is to be set or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int TableIndex;
int Ret;
@@ -2703,9 +2163,7 @@
return (SK_PNMI_ERR_UNKNOWN_OID);
}
- /*
- * Check NetIndex
- */
+ /* Check NetIndex */
if (NetIndex >= pAC->Rlmt.NumNets) {
return (SK_PNMI_ERR_UNKNOWN_NET);
}
@@ -2736,16 +2194,15 @@
*
* Returns:
* SK_PNMI_ERR_XXX. The codes are described in the calling functions.
- * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
+ * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
*/
-
-static int PnmiStruct(
+PNMI_STATIC int PnmiStruct(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Set action to be performed */
-char *pBuf, /* Buffer which contains the data to be set */
-unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+int Action, /* PRESET/SET action to be performed */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* Length of pBuf management data buffer */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
int Ret;
unsigned int TableIndex;
@@ -2771,9 +2228,7 @@
return (SK_PNMI_ERR_TOO_SHORT);
}
- /*
- * Check NetIndex
- */
+ /* Check NetIndex */
if (NetIndex >= pAC->Rlmt.NumNets) {
return (SK_PNMI_ERR_UNKNOWN_NET);
}
@@ -2802,10 +2257,10 @@
pAC->Pnmi.SirqUpdatedFlag ++;
/* Preset/Set values */
- for (TableIndex = 0; TableIndex < sizeof(IdTable)/sizeof(IdTable[0]);
- TableIndex ++) {
+ for (TableIndex = 0; TableIndex < ID_TABLE_SIZE; TableIndex ++) {
- if (IdTable[TableIndex].Access != SK_PNMI_RW) {
+ if ((IdTable[TableIndex].Access != SK_PNMI_RW) &&
+ (IdTable[TableIndex].Access != SK_PNMI_WO)) {
continue;
}
@@ -2906,14 +2361,12 @@
* Returns:
* The table index or -1 if not found.
*/
-
-static int LookupId(
+PNMI_STATIC int LookupId(
SK_U32 Id) /* Object identifier to be searched */
{
int i;
- int Len = sizeof(IdTable)/sizeof(IdTable[0]);
- for (i=0; i<Len; i++) {
+ for (i = 0; i < ID_TABLE_SIZE; i++) {
if (IdTable[i].Id == Id) {
@@ -2934,7 +2387,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -2942,20 +2395,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int OidStruct(
+PNMI_STATIC int OidStruct(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
if (Id != OID_SKGE_ALL_DATA) {
@@ -3002,7 +2454,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -3010,20 +2462,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int Perform(
+PNMI_STATIC int Perform(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
int Ret;
SK_U32 ActionOp;
@@ -3137,28 +2588,28 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int Mac8023Stat(
+PNMI_STATIC int Mac8023Stat(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
- int Ret;
- SK_U64 StatVal;
+ int Ret;
+ SK_U64 StatVal;
+ SK_U32 StatVal32;
SK_BOOL Is64BitReq = SK_FALSE;
/*
@@ -3179,9 +2630,7 @@
return (SK_PNMI_ERR_READ_ONLY);
}
- /*
- * Check length
- */
+ /* Check length */
switch (Id) {
case OID_802_3_PERMANENT_ADDRESS:
@@ -3202,9 +2651,7 @@
#else /* SK_NDIS_64BIT_CTR */
- /*
- * for compatibility, at least 32bit are required for oid
- */
+ /* for compatibility, at least 32bit are required for OID */
if (*pLen < sizeof(SK_U32)) {
/*
* but indicate handling for 64bit values,
@@ -3250,11 +2697,8 @@
default:
StatVal = GetStatVal(pAC, IoC, 0, IdTable[TableIndex].Param, NetIndex);
- /*
- * by default 32bit values are evaluated
- */
+ /* by default 32bit values are evaluated */
if (!Is64BitReq) {
- SK_U32 StatVal32;
StatVal32 = (SK_U32)StatVal;
SK_PNMI_STORE_U32(pBuf, StatVal32);
*pLen = sizeof(SK_U32);
@@ -3276,47 +2720,47 @@
* MacPrivateStat - OID handler function of OID_SKGE_STAT_XXX
*
* Description:
- * Retrieves the XMAC statistic data.
+ * Retrieves the MAC statistic data.
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int MacPrivateStat(
+PNMI_STATIC int MacPrivateStat(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int LogPortMax;
unsigned int LogPortIndex;
unsigned int PhysPortMax;
unsigned int Limit;
unsigned int Offset;
- int Ret;
- SK_U64 StatVal;
-
+ int MacType;
+ int Ret;
+ SK_U64 StatVal;
+
+
- /*
- * Calculate instance if wished. MAC index 0 is the virtual
- * MAC.
- */
+ /* Calculate instance if wished. MAC index 0 is the virtual MAC */
PhysPortMax = pAC->GIni.GIMacsFound;
LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
+
+ MacType = pAC->GIni.GIMacType;
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
LogPortMax--;
}
@@ -3337,19 +2781,14 @@
Limit = LogPortMax;
}
-
- /*
- * Check action
- */
+ /* Check action */
if (Action != SK_PNMI_GET) {
*pLen = 0;
return (SK_PNMI_ERR_READ_ONLY);
}
- /*
- * Check length
- */
+ /* Check length */
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U64)) {
*pLen = (Limit - LogPortIndex) * sizeof(SK_U64);
@@ -3357,7 +2796,7 @@
}
/*
- * Update XMAC statistic and increment semaphore to indicate that
+ * Update MAC statistic and increment semaphore to indicate that
* an update was already done.
*/
Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
@@ -3368,9 +2807,7 @@
}
pAC->Pnmi.MacUpdatedFlag ++;
- /*
- * Get value
- */
+ /* Get value */
Offset = 0;
for (; LogPortIndex < Limit; LogPortIndex ++) {
@@ -3384,26 +2821,45 @@
case OID_SKGE_STAT_RX_UTIL:
return (SK_PNMI_ERR_GENERAL);
*/
- /*
- * Frames longer than IEEE 802.3 frame max size are counted
- * by XMAC in frame_too_long counter even reception of long
- * frames was enabled and the frame was correct.
- * So correct the value by subtracting RxLongFrame counter.
- */
- case OID_SKGE_STAT_RX_TOO_LONG:
- StatVal = GetStatVal(pAC, IoC, LogPortIndex,
- IdTable[TableIndex].Param, NetIndex) -
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HRX_LONGFRAMES, NetIndex);
- SK_PNMI_STORE_U64(pBuf + Offset, StatVal);
+ case OID_SKGE_STAT_RX:
+ if (MacType == SK_MAC_GMAC) {
+ StatVal =
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HRX_BROADCAST, NetIndex) +
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HRX_MULTICAST, NetIndex) +
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HRX_UNICAST, NetIndex) +
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HRX_UNDERSIZE, NetIndex);
+ }
+ else {
+ StatVal = GetStatVal(pAC, IoC, LogPortIndex,
+ IdTable[TableIndex].Param, NetIndex);
+ }
+ break;
+
+ case OID_SKGE_STAT_TX:
+ if (MacType == SK_MAC_GMAC) {
+ StatVal =
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HTX_BROADCAST, NetIndex) +
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HTX_MULTICAST, NetIndex) +
+ GetStatVal(pAC, IoC, LogPortIndex,
+ SK_PNMI_HTX_UNICAST, NetIndex);
+ }
+ else {
+ StatVal = GetStatVal(pAC, IoC, LogPortIndex,
+ IdTable[TableIndex].Param, NetIndex);
+ }
break;
default:
StatVal = GetStatVal(pAC, IoC, LogPortIndex,
IdTable[TableIndex].Param, NetIndex);
- SK_PNMI_STORE_U64(pBuf + Offset, StatVal);
- break;
}
+ SK_PNMI_STORE_U64(pBuf + Offset, StatVal);
Offset += sizeof(SK_U64);
}
@@ -3427,7 +2883,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -3435,20 +2891,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int Addr(
+PNMI_STATIC int Addr(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
int Ret;
unsigned int LogPortMax;
@@ -3458,8 +2913,6 @@
unsigned int Limit;
unsigned int Offset = 0;
-
-
/*
* Calculate instance if wished. MAC index 0 is the virtual
* MAC.
@@ -3467,7 +2920,7 @@
PhysPortMax = pAC->GIni.GIMacsFound;
LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
LogPortMax--;
}
@@ -3481,7 +2934,6 @@
LogPortIndex = SK_PNMI_PORT_INST2LOG(Instance);
Limit = LogPortIndex + 1;
}
-
else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
LogPortIndex = 0;
@@ -3493,9 +2945,7 @@
*/
if (Action == SK_PNMI_GET) {
- /*
- * Check length
- */
+ /* Check length */
if (*pLen < (Limit - LogPortIndex) * 6) {
*pLen = (Limit - LogPortIndex) * 6;
@@ -3571,9 +3021,7 @@
return (SK_PNMI_ERR_GENERAL);
}
- /*
- * Check length
- */
+ /* Check length */
if (*pLen < (Limit - LogPortIndex) * 6) {
*pLen = (Limit - LogPortIndex) * 6;
@@ -3639,25 +3087,24 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int CsumStat(
+PNMI_STATIC int CsumStat(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int Index;
unsigned int Limit;
@@ -3692,9 +3139,7 @@
return (SK_PNMI_ERR_READ_ONLY);
}
- /*
- * Check length
- */
+ /* Check length */
if (*pLen < (Limit - Index) * sizeof(SK_U64)) {
*pLen = (Limit - Index) * sizeof(SK_U64);
@@ -3758,25 +3203,24 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int SensorStat(
+PNMI_STATIC int SensorStat(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int i;
unsigned int Index;
@@ -3815,9 +3259,7 @@
return (SK_PNMI_ERR_READ_ONLY);
}
- /*
- * Check length
- */
+ /* Check length */
switch (Id) {
case OID_SKGE_SENSOR_VALUE:
@@ -3976,8 +3418,8 @@
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR013,
- SK_PNMI_ERR013MSG);
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
+ ("SensorStat: Unknown OID should be handled before"));
return (SK_PNMI_ERR_GENERAL);
}
@@ -4003,7 +3445,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -4011,20 +3453,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int Vpd(
+PNMI_STATIC int Vpd(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_VPD_STATUS *pVpdStatus;
unsigned int BufLen;
@@ -4043,8 +3484,7 @@
/*
* Get array of all currently stored VPD keys
*/
- Ret = GetVpdKeyArr(pAC, IoC, &KeyArr[0][0], sizeof(KeyArr),
- &KeyNo);
+ Ret = GetVpdKeyArr(pAC, IoC, &KeyArr[0][0], sizeof(KeyArr), &KeyNo);
if (Ret != SK_PNMI_ERR_OK) {
*pLen = 0;
return (Ret);
@@ -4290,7 +3730,7 @@
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
- }
+ }
else {
/* The only OID which can be set is VPD_ACTION */
if (Id != OID_SKGE_VPD_ACTION) {
@@ -4482,25 +3922,24 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int General(
+PNMI_STATIC int General(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
+char *pBuf, /* Buffer used for the management data transfer */
unsigned int *pLen, /* On call: buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
int Ret;
unsigned int Index;
@@ -4515,10 +3954,10 @@
SK_U64 Val64TxHwErrs = 0;
SK_BOOL Is64BitReq = SK_FALSE;
char Buf[256];
-
+ int MacType;
/*
- * Check instance. We only handle single instance variables
+ * Check instance. We only handle single instance variables.
*/
if (Instance != (SK_U32)(-1) && Instance != 1) {
@@ -4534,7 +3973,9 @@
*pLen = 0;
return (SK_PNMI_ERR_READ_ONLY);
}
-
+
+ MacType = pAC->GIni.GIMacType;
+
/*
* Check length for the various supported OIDs
*/
@@ -4567,6 +4008,14 @@
#endif /* SK_NDIS_64BIT_CTR */
break;
+ case OID_SKGE_BOARDLEVEL:
+ if (*pLen < sizeof(SK_U32)) {
+
+ *pLen = sizeof(SK_U32);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
case OID_SKGE_PORT_NUMBER:
case OID_SKGE_DEVICE_TYPE:
case OID_SKGE_RESULT:
@@ -4662,15 +4111,14 @@
Val64RxHwErrs =
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_MISSED, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_FRAMING, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_OVERFLOW, NetIndex)+
+ GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_OVERFLOW, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_JABBER, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_CARRIER, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_IRLENGTH, NetIndex)+
+ GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_IRLENGTH, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_SYMBOL, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_SHORTS, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_RUNT, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_TOO_LONG, NetIndex)-
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_LONGFRAMES, NetIndex)+
+ GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_TOO_LONG, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_FCS, NetIndex) +
GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_CEXT, NetIndex);
break;
@@ -4680,10 +4128,9 @@
case OID_GEN_XMIT_ERROR:
Val64TxHwErrs =
GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_EXCESS_COL, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_LATE_COL, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_UNDERRUN, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_CARRIER, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_EXCESS_COL, NetIndex);
+ GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_LATE_COL, NetIndex) +
+ GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_UNDERRUN, NetIndex) +
+ GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_CARRIER, NetIndex);
break;
}
}
@@ -4694,7 +4141,7 @@
switch (Id) {
case OID_SKGE_SUPPORTED_LIST:
- Len = sizeof(IdTable)/sizeof(IdTable[0]) * sizeof(SK_U32);
+ Len = ID_TABLE_SIZE * sizeof(SK_U32);
if (*pLen < Len) {
*pLen = Len;
@@ -4709,6 +4156,12 @@
*pLen = Len;
break;
+ case OID_SKGE_BOARDLEVEL:
+ Val32 = (SK_U32)pAC->GIni.GILevel;
+ SK_PNMI_STORE_U32(pBuf, Val32);
+ *pLen = sizeof(SK_U32);
+ break;
+
case OID_SKGE_PORT_NUMBER:
Val32 = (SK_U32)pAC->GIni.GIMacsFound;
SK_PNMI_STORE_U32(pBuf, Val32);
@@ -4833,7 +4286,7 @@
break;
case OID_SKGE_CHIPSET:
- Val16 = SK_PNMI_CHIPSET;
+ Val16 = pAC->Pnmi.Chipset;
SK_PNMI_STORE_U16(pBuf, Val16);
*pLen = sizeof(SK_U16);
break;
@@ -4895,141 +4348,281 @@
break;
case OID_SKGE_TX_SW_QUEUE_LEN:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueLen;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].TxSwQueueLen;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].TxSwQueueLen +
+ pAC->Pnmi.BufPort[1].TxSwQueueLen;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].TxSwQueueLen +
- pAC->Pnmi.Port[1].TxSwQueueLen;
- }
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueLen;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].TxSwQueueLen +
+ pAC->Pnmi.Port[1].TxSwQueueLen;
+ }
+ }
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_TX_SW_QUEUE_MAX:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueMax;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].TxSwQueueMax;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].TxSwQueueMax +
+ pAC->Pnmi.BufPort[1].TxSwQueueMax;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].TxSwQueueMax +
- pAC->Pnmi.Port[1].TxSwQueueMax;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueMax;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].TxSwQueueMax +
+ pAC->Pnmi.Port[1].TxSwQueueMax;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_TX_RETRY:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].TxRetryCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].TxRetryCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].TxRetryCts +
+ pAC->Pnmi.BufPort[1].TxRetryCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].TxRetryCts +
- pAC->Pnmi.Port[1].TxRetryCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].TxRetryCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].TxRetryCts +
+ pAC->Pnmi.Port[1].TxRetryCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_RX_INTR_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].RxIntrCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].RxIntrCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].RxIntrCts +
+ pAC->Pnmi.BufPort[1].RxIntrCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].RxIntrCts +
- pAC->Pnmi.Port[1].RxIntrCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].RxIntrCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].RxIntrCts +
+ pAC->Pnmi.Port[1].RxIntrCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_TX_INTR_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].TxIntrCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].TxIntrCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].TxIntrCts +
+ pAC->Pnmi.BufPort[1].TxIntrCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].TxIntrCts +
- pAC->Pnmi.Port[1].TxIntrCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].TxIntrCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].TxIntrCts +
+ pAC->Pnmi.Port[1].TxIntrCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_RX_NO_BUF_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].RxNoBufCts +
+ pAC->Pnmi.BufPort[1].RxNoBufCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].RxNoBufCts +
- pAC->Pnmi.Port[1].RxNoBufCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].RxNoBufCts +
+ pAC->Pnmi.Port[1].RxNoBufCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_TX_NO_BUF_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].TxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].TxNoBufCts +
+ pAC->Pnmi.BufPort[1].TxNoBufCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].TxNoBufCts +
- pAC->Pnmi.Port[1].TxNoBufCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].TxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].TxNoBufCts +
+ pAC->Pnmi.Port[1].TxNoBufCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_TX_USED_DESCR_NO:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].TxUsedDescrNo;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].TxUsedDescrNo;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].TxUsedDescrNo +
+ pAC->Pnmi.BufPort[1].TxUsedDescrNo;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].TxUsedDescrNo +
- pAC->Pnmi.Port[1].TxUsedDescrNo;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].TxUsedDescrNo;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].TxUsedDescrNo +
+ pAC->Pnmi.Port[1].TxUsedDescrNo;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_RX_DELIVERED_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].RxDeliveredCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].RxDeliveredCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].RxDeliveredCts +
+ pAC->Pnmi.BufPort[1].RxDeliveredCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].RxDeliveredCts +
- pAC->Pnmi.Port[1].RxDeliveredCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].RxDeliveredCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].RxDeliveredCts +
+ pAC->Pnmi.Port[1].RxDeliveredCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_RX_OCTETS_DELIV_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].RxOctetsDeliveredCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].RxOctetsDeliveredCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].RxOctetsDeliveredCts +
+ pAC->Pnmi.BufPort[1].RxOctetsDeliveredCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].RxOctetsDeliveredCts +
- pAC->Pnmi.Port[1].RxOctetsDeliveredCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].RxOctetsDeliveredCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].RxOctetsDeliveredCts +
+ pAC->Pnmi.Port[1].RxOctetsDeliveredCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
@@ -5046,44 +4639,88 @@
break;
case OID_SKGE_IN_ERRORS_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = Val64RxHwErrs + pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = Val64RxHwErrs +
+ pAC->Pnmi.BufPort[0].RxNoBufCts +
+ pAC->Pnmi.BufPort[1].RxNoBufCts;
+ }
}
- /* Single net mode */
else {
- Val64 = Val64RxHwErrs +
- pAC->Pnmi.Port[0].RxNoBufCts +
- pAC->Pnmi.Port[1].RxNoBufCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = Val64RxHwErrs +
+ pAC->Pnmi.Port[0].RxNoBufCts +
+ pAC->Pnmi.Port[1].RxNoBufCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_OUT_ERROR_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = Val64TxHwErrs + pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = Val64TxHwErrs +
+ pAC->Pnmi.BufPort[0].TxNoBufCts +
+ pAC->Pnmi.BufPort[1].TxNoBufCts;
+ }
}
- /* Single net mode */
else {
- Val64 = Val64TxHwErrs +
- pAC->Pnmi.Port[0].TxNoBufCts +
- pAC->Pnmi.Port[1].TxNoBufCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = Val64TxHwErrs +
+ pAC->Pnmi.Port[0].TxNoBufCts +
+ pAC->Pnmi.Port[1].TxNoBufCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
break;
case OID_SKGE_ERR_RECOVERY_CTS:
- /* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
- Val64 = pAC->Pnmi.Port[NetIndex].ErrRecoveryCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].ErrRecoveryCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.BufPort[0].ErrRecoveryCts +
+ pAC->Pnmi.BufPort[1].ErrRecoveryCts;
+ }
}
- /* Single net mode */
else {
- Val64 = pAC->Pnmi.Port[0].ErrRecoveryCts +
- pAC->Pnmi.Port[1].ErrRecoveryCts;
+ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ Val64 = pAC->Pnmi.Port[NetIndex].ErrRecoveryCts;
+ }
+ /* Single net mode */
+ else {
+ Val64 = pAC->Pnmi.Port[0].ErrRecoveryCts +
+ pAC->Pnmi.Port[1].ErrRecoveryCts;
+ }
}
SK_PNMI_STORE_U64(pBuf, Val64);
*pLen = sizeof(SK_U64);
@@ -5103,7 +4740,13 @@
break;
case OID_GEN_RCV_ERROR:
- Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ Val64 = Val64RxHwErrs + pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
+ }
+ else {
+ Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ }
/*
* by default 32bit values are evaluated
@@ -5120,7 +4763,13 @@
break;
case OID_GEN_XMIT_ERROR:
- Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ Val64 = Val64TxHwErrs + pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
+ }
+ else {
+ Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
+ }
/*
* by default 32bit values are evaluated
@@ -5137,7 +4786,13 @@
break;
case OID_GEN_RCV_NO_BUFFER:
- Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
+ }
+ else {
+ Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
+ }
/*
* by default 32bit values are evaluated
@@ -5189,7 +4844,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -5197,20 +4852,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int Rlmt(
+PNMI_STATIC int Rlmt(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
int Ret;
unsigned int PhysPortIndex;
@@ -5230,7 +4884,7 @@
}
/*
- * Perform the requested action
+ * Perform the requested action.
*/
if (Action == SK_PNMI_GET) {
@@ -5359,8 +5013,8 @@
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR036,
- SK_PNMI_ERR036MSG);
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
+ ("Rlmt: Unknown OID should be handled before"));
pAC->Pnmi.RlmtUpdatedFlag --;
*pLen = 0;
@@ -5498,25 +5152,24 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int RlmtStat(
+PNMI_STATIC int RlmtStat(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int PhysPortMax;
unsigned int PhysPortIndex;
@@ -5527,7 +5180,7 @@
SK_U64 Val64;
/*
- * Calculate the port indexes from the instance
+ * Calculate the port indexes from the instance.
*/
PhysPortMax = pAC->GIni.GIMacsFound;
@@ -5543,7 +5196,7 @@
PhysPortIndex = Instance - 1;
/* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
PhysPortIndex = NetIndex;
}
@@ -5556,7 +5209,7 @@
Limit = PhysPortMax;
/* Dual net mode */
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
PhysPortIndex = NetIndex;
Limit = PhysPortIndex + 1;
}
@@ -5674,8 +5327,8 @@
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR040,
- SK_PNMI_ERR040MSG);
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
+ ("RlmtStat: Unknown OID should be errored before"));
pAC->Pnmi.RlmtUpdatedFlag --;
*pLen = 0;
@@ -5698,7 +5351,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -5706,20 +5359,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int MacPrivateConf(
+PNMI_STATIC int MacPrivateConf(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int PhysPortMax;
unsigned int PhysPortIndex;
@@ -5728,19 +5380,18 @@
unsigned int Limit;
unsigned int Offset;
char Val8;
- int Ret;
+ char *pBufPtr;
+ int Ret;
SK_EVPARA EventParam;
SK_U32 Val32;
-
/*
- * Calculate instance if wished. MAC index 0 is the virtual
- * MAC.
+ * Calculate instance if wished. MAC index 0 is the virtual MAC.
*/
PhysPortMax = pAC->GIni.GIMacsFound;
LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
LogPortMax--;
}
@@ -5766,9 +5417,7 @@
*/
if (Action == SK_PNMI_GET) {
- /*
- * Check length
- */
+ /* Check length */
switch (Id) {
case OID_SKGE_PMD:
@@ -5783,18 +5432,20 @@
case OID_SKGE_PHY_OPERATION_CAP:
case OID_SKGE_PHY_OPERATION_MODE:
case OID_SKGE_PHY_OPERATION_STATUS:
+ case OID_SKGE_SPEED_CAP:
+ case OID_SKGE_SPEED_MODE:
+ case OID_SKGE_SPEED_STATUS:
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
- *pLen = (Limit - LogPortIndex) *
- sizeof(SK_U8);
+ *pLen = (Limit - LogPortIndex) * sizeof(SK_U8);
return (SK_PNMI_ERR_TOO_SHORT);
}
break;
case OID_SKGE_MTU:
- if (*pLen < sizeof(SK_U32)) {
+ if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U32)) {
- *pLen = sizeof(SK_U32);
+ *pLen = (Limit - LogPortIndex) * sizeof(SK_U32);
return (SK_PNMI_ERR_TOO_SHORT);
}
break;
@@ -5823,210 +5474,303 @@
Offset = 0;
for (; LogPortIndex < Limit; LogPortIndex ++) {
+ pBufPtr = pBuf + Offset;
+
switch (Id) {
case OID_SKGE_PMD:
- *(pBuf + Offset) = pAC->Pnmi.PMD;
+ *pBufPtr = pAC->Pnmi.PMD;
Offset += sizeof(char);
break;
case OID_SKGE_CONNECTOR:
- *(pBuf + Offset) = pAC->Pnmi.Connector;
+ *pBufPtr = pAC->Pnmi.Connector;
Offset += sizeof(char);
break;
case OID_SKGE_LINK_CAP:
- if (LogPortIndex == 0) {
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical ports */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkCap;
+ }
}
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkCap;
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PLinkCap;
}
Offset += sizeof(char);
break;
case OID_SKGE_LINK_MODE:
- if (LogPortIndex == 0) {
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical ports */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkModeConf;
+ }
}
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkModeConf;
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PLinkModeConf;
}
-
Offset += sizeof(char);
break;
case OID_SKGE_LINK_MODE_STATUS:
- if (LogPortIndex == 0) {
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ *pBufPtr =
+ CalculateLinkModeStatus(pAC, IoC, PhysPortIndex);
+ }
}
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) =
- CalculateLinkModeStatus(pAC,
- IoC, PhysPortIndex);
+ else { /* DualNetMode */
+
+ *pBufPtr = CalculateLinkModeStatus(pAC, IoC, NetIndex);
}
Offset += sizeof(char);
break;
case OID_SKGE_LINK_STATUS:
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical ports */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = CalculateLinkStatus(pAC, IoC, PhysPortIndex);
+ }
}
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
+ else { /* DualNetMode */
- *(pBuf + Offset) =
- CalculateLinkStatus(pAC,
- IoC, PhysPortIndex);
+ *pBufPtr = CalculateLinkStatus(pAC, IoC, NetIndex);
}
Offset += sizeof(char);
break;
case OID_SKGE_FLOWCTRL_CAP:
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical ports */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PFlowCtrlCap;
+ }
}
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PFlowCtrlCap;
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PFlowCtrlCap;
}
Offset += sizeof(char);
break;
case OID_SKGE_FLOWCTRL_MODE:
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PFlowCtrlMode;
+ }
}
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
+ else { /* DualNetMode */
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PFlowCtrlMode;
+ *pBufPtr = pAC->GIni.GP[NetIndex].PFlowCtrlMode;
}
Offset += sizeof(char);
break;
case OID_SKGE_FLOWCTRL_STATUS:
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PFlowCtrlStatus;
+ }
}
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
+ else { /* DualNetMode */
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PFlowCtrlStatus;
+ *pBufPtr = pAC->GIni.GP[NetIndex].PFlowCtrlStatus;
}
Offset += sizeof(char);
break;
case OID_SKGE_PHY_OPERATION_CAP:
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical ports */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PMSCap;
+ }
}
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PMSCap;
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PMSCap;
}
Offset += sizeof(char);
break;
case OID_SKGE_PHY_OPERATION_MODE:
- if (LogPortIndex == 0) {
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PMSMode;
+ }
}
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PMSMode;
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PMSMode;
}
Offset += sizeof(char);
break;
case OID_SKGE_PHY_OPERATION_STATUS:
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PMSStatus;
+ }
}
else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PMSStatus;
+ }
+ Offset += sizeof(char);
+ break;
+
+ case OID_SKGE_SPEED_CAP:
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical ports */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkSpeedCap;
+ }
+ }
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PLinkSpeedCap;
+ }
+ Offset += sizeof(char);
+ break;
+
+ case OID_SKGE_SPEED_MODE:
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkSpeed;
+ }
+ }
+ else { /* DualNetMode */
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PMSStatus;
+ *pBufPtr = pAC->GIni.GP[NetIndex].PLinkSpeed;
}
Offset += sizeof(char);
break;
+ case OID_SKGE_SPEED_STATUS:
+ if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
+ if (LogPortIndex == 0) {
+ /* Get value for virtual port */
+ VirtualConf(pAC, IoC, Id, pBufPtr);
+ }
+ else {
+ /* Get value for physical port */
+ PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+
+ *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed;
+ }
+ }
+ else { /* DualNetMode */
+
+ *pBufPtr = pAC->GIni.GP[NetIndex].PLinkSpeedUsed;
+ }
+ Offset += sizeof(char);
+ break;
+
case OID_SKGE_MTU:
Val32 = SK_DRIVER_GET_MTU(pAC, IoC, NetIndex);
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
+ SK_PNMI_STORE_U32(pBufPtr, Val32);
Offset += sizeof(SK_U32);
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR042,
- SK_PNMI_ERR042MSG);
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
+ ("MacPrivateConf: Unknown OID should be handled before"));
pAC->Pnmi.SirqUpdatedFlag --;
return (SK_PNMI_ERR_GENERAL);
@@ -6047,6 +5791,7 @@
case OID_SKGE_LINK_MODE:
case OID_SKGE_FLOWCTRL_MODE:
case OID_SKGE_PHY_OPERATION_MODE:
+ case OID_SKGE_SPEED_MODE:
if (*pLen < Limit - LogPortIndex) {
*pLen = Limit - LogPortIndex;
@@ -6284,8 +6029,8 @@
EventParam) > 0) {
SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR052,
- SK_PNMI_ERR052MSG);
+ SK_PNMI_ERR042,
+ SK_PNMI_ERR042MSG);
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
@@ -6304,8 +6049,8 @@
SK_HWEV_SET_ROLE, EventParam) > 0) {
SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR052,
- SK_PNMI_ERR052MSG);
+ SK_PNMI_ERR042,
+ SK_PNMI_ERR042MSG);
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
@@ -6315,6 +6060,82 @@
Offset += sizeof(char);
break;
+ case OID_SKGE_SPEED_MODE:
+ /* Check the value range */
+ Val8 = *(pBuf + Offset);
+ if (Val8 == 0) {
+
+ Offset += sizeof(char);
+ break;
+ }
+ if (Val8 < (SK_LSPEED_AUTO) ||
+ (LogPortIndex != 0 && Val8 > (SK_LSPEED_1000MBPS)) ||
+ (LogPortIndex == 0 && Val8 > (SK_LSPEED_INDETERMINATED))) {
+
+ *pLen = 0;
+ return (SK_PNMI_ERR_BAD_VALUE);
+ }
+
+ /* The preset ends here */
+ if (Action == SK_PNMI_PRESET) {
+
+ return (SK_PNMI_ERR_OK);
+ }
+
+ if (LogPortIndex == 0) {
+
+ /*
+ * The virtual port consists of all currently
+ * active ports. Find them and send an event
+ * with the new flow control mode to SIRQ.
+ */
+ for (PhysPortIndex = 0;
+ PhysPortIndex < PhysPortMax;
+ PhysPortIndex ++) {
+
+ if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
+
+ continue;
+ }
+
+ EventParam.Para32[0] = PhysPortIndex;
+ EventParam.Para32[1] = (SK_U32)Val8;
+ if (SkGeSirqEvent(pAC, IoC,
+ SK_HWEV_SET_SPEED,
+ EventParam) > 0) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW,
+ SK_PNMI_ERR045,
+ SK_PNMI_ERR045MSG);
+
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+ }
+ }
+ else {
+ /*
+ * Send an event with the new flow control
+ * mode to the SIRQ module.
+ */
+ EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
+ pAC, LogPortIndex);
+ EventParam.Para32[1] = (SK_U32)Val8;
+ if (SkGeSirqEvent(pAC, IoC,
+ SK_HWEV_SET_SPEED,
+ EventParam) > 0) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW,
+ SK_PNMI_ERR045,
+ SK_PNMI_ERR045MSG);
+
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+ }
+ Offset += sizeof(char);
+ break;
+
case OID_SKGE_MTU :
/* Check the value range */
Val32 = *(SK_U32*)(pBuf + Offset);
@@ -6341,8 +6162,8 @@
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR045,
- SK_PNMI_ERR045MSG);
+ SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
+ ("MacPrivateConf: Unknown OID should be handled before set"));
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
@@ -6362,7 +6183,7 @@
*
* Returns:
* SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occurred.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
* SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
* the correct data (e.g. a 32bit value is
* needed, but a 16 bit value was passed).
@@ -6370,20 +6191,19 @@
* value range.
* SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
* SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
+ * exist (e.g. port instance 3 on a two port
* adapter.
*/
-
-static int Monitor(
+PNMI_STATIC int Monitor(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
+int Action, /* GET/PRESET/SET action */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
unsigned int Index;
unsigned int Limit;
@@ -6394,7 +6214,7 @@
/*
* Calculate instance if wished.
*/
-/* XXX Not yet implemented. Return always an empty table. */
+ /* XXX Not yet implemented. Return always an empty table. */
Entries = 0;
if ((Instance != (SK_U32)(-1))) {
@@ -6489,26 +6309,27 @@
* Returns:
* Nothing
*/
-
-static void VirtualConf(
+PNMI_STATIC void VirtualConf(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf) /* Buffer to which to mgmt data will be retrieved */
+char *pBuf) /* Buffer used for the management data transfer */
{
unsigned int PhysPortMax;
unsigned int PhysPortIndex;
SK_U8 Val8;
SK_BOOL PortActiveFlag;
-
+ SK_GEPORT *pPrt;
*pBuf = 0;
PortActiveFlag = SK_FALSE;
PhysPortMax = pAC->GIni.GIMacsFound;
-
+
for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
PhysPortIndex ++) {
+ pPrt = &pAC->GIni.GP[PhysPortIndex];
+
/* Check if the physical port is active */
if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
@@ -6527,15 +6348,14 @@
* From a curious point of view the virtual port
* is capable of all found capabilities.
*/
- *pBuf |= pAC->GIni.GP[PhysPortIndex].PLinkCap;
+ *pBuf |= pPrt->PLinkCap;
break;
case OID_SKGE_LINK_MODE:
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PLinkModeConf;
+ *pBuf = pPrt->PLinkModeConf;
continue;
}
@@ -6544,8 +6364,7 @@
* mode than the first one we return a value that
* indicates that the link mode is indeterminated.
*/
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PLinkModeConf
- ) {
+ if (*pBuf != pPrt->PLinkModeConf) {
*pBuf = SK_LMODE_INDETERMINATED;
}
@@ -6553,8 +6372,7 @@
case OID_SKGE_LINK_MODE_STATUS:
/* Get the link mode of the physical port */
- Val8 = CalculateLinkModeStatus(pAC, IoC,
- PhysPortIndex);
+ Val8 = CalculateLinkModeStatus(pAC, IoC, PhysPortIndex);
/* Check if it is the first active port */
if (*pBuf == 0) {
@@ -6602,8 +6420,7 @@
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PFlowCtrlCap;
+ *pBuf = pPrt->PFlowCtrlCap;
continue;
}
@@ -6611,15 +6428,14 @@
* From a curious point of view the virtual port
* is capable of all found capabilities.
*/
- *pBuf |= pAC->GIni.GP[PhysPortIndex].PFlowCtrlCap;
+ *pBuf |= pPrt->PFlowCtrlCap;
break;
case OID_SKGE_FLOWCTRL_MODE:
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PFlowCtrlMode;
+ *pBuf = pPrt->PFlowCtrlMode;
continue;
}
@@ -6628,8 +6444,7 @@
* control mode than the first one, we return a value
* that indicates that the mode is indeterminated.
*/
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].
- PFlowCtrlMode) {
+ if (*pBuf != pPrt->PFlowCtrlMode) {
*pBuf = SK_FLOW_MODE_INDETERMINATED;
}
@@ -6639,8 +6454,7 @@
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PFlowCtrlStatus;
+ *pBuf = pPrt->PFlowCtrlStatus;
continue;
}
@@ -6650,18 +6464,17 @@
* value that indicates that the status is
* indeterminated.
*/
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].
- PFlowCtrlStatus) {
+ if (*pBuf != pPrt->PFlowCtrlStatus) {
*pBuf = SK_FLOW_STAT_INDETERMINATED;
}
break;
+
case OID_SKGE_PHY_OPERATION_CAP:
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PMSCap;
+ *pBuf = pPrt->PMSCap;
continue;
}
@@ -6669,15 +6482,14 @@
* From a curious point of view the virtual port
* is capable of all found capabilities.
*/
- *pBuf |= pAC->GIni.GP[PhysPortIndex].PMSCap;
+ *pBuf |= pPrt->PMSCap;
break;
case OID_SKGE_PHY_OPERATION_MODE:
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PMSMode;
+ *pBuf = pPrt->PMSMode;
continue;
}
@@ -6686,8 +6498,7 @@
* slave mode than the first one, we return a value
* that indicates that the mode is indeterminated.
*/
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].
- PMSMode) {
+ if (*pBuf != pPrt->PMSMode) {
*pBuf = SK_MS_MODE_INDETERMINATED;
}
@@ -6697,8 +6508,7 @@
/* Check if it is the first active port */
if (*pBuf == 0) {
- *pBuf = pAC->GIni.GP[PhysPortIndex].
- PMSStatus;
+ *pBuf = pPrt->PMSStatus;
continue;
}
@@ -6708,12 +6518,50 @@
* value that indicates that the status is
* indeterminated.
*/
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].
- PMSStatus) {
+ if (*pBuf != pPrt->PMSStatus) {
*pBuf = SK_MS_STAT_INDETERMINATED;
}
break;
+
+ case OID_SKGE_SPEED_MODE:
+ /* Check if it is the first active port */
+ if (*pBuf == 0) {
+
+ *pBuf = pPrt->PLinkSpeed;
+ continue;
+ }
+
+ /*
+ * If we find an active port with a different flow
+ * control mode than the first one, we return a value
+ * that indicates that the mode is indeterminated.
+ */
+ if (*pBuf != pPrt->PLinkSpeed) {
+
+ *pBuf = SK_LSPEED_INDETERMINATED;
+ }
+ break;
+
+ case OID_SKGE_SPEED_STATUS:
+ /* Check if it is the first active port */
+ if (*pBuf == 0) {
+
+ *pBuf = pPrt->PLinkSpeedUsed;
+ continue;
+ }
+
+ /*
+ * If we find an active port with a different flow
+ * control status than the first one, we return a
+ * value that indicates that the status is
+ * indeterminated.
+ */
+ if (*pBuf != pPrt->PLinkSpeedUsed) {
+
+ *pBuf = SK_LSPEED_STAT_INDETERMINATED;
+ }
+ break;
}
}
@@ -6760,6 +6608,17 @@
case OID_SKGE_PHY_OPERATION_STATUS:
*pBuf = SK_MS_STAT_INDETERMINATED;
break;
+ case OID_SKGE_SPEED_CAP:
+ *pBuf = SK_LSPEED_CAP_INDETERMINATED;
+ break;
+
+ case OID_SKGE_SPEED_MODE:
+ *pBuf = SK_LSPEED_INDETERMINATED;
+ break;
+
+ case OID_SKGE_SPEED_STATUS:
+ *pBuf = SK_LSPEED_STAT_INDETERMINATED;
+ break;
}
}
}
@@ -6779,15 +6638,13 @@
* Returns:
* Link status of physical port
*/
-
-static SK_U8 CalculateLinkStatus(
+PNMI_STATIC SK_U8 CalculateLinkStatus(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
unsigned int PhysPortIndex) /* Physical port index */
{
SK_U8 Result;
-
if (!pAC->GIni.GP[PhysPortIndex].PHWLinkUp) {
Result = SK_PNMI_RLMT_LSTAT_PHY_DOWN;
@@ -6813,22 +6670,20 @@
*
* Description:
* The COMMON module only tells us if the mode is half or full duplex.
- * But in the decade of auto sensing it is useful for the user to
+ * But in the decade of auto sensing it is usefull for the user to
* know if the mode was negotiated or forced. Therefore we have a
* look to the mode, which was last used by the negotiation process.
*
* Returns:
* The link mode status
*/
-
-static SK_U8 CalculateLinkModeStatus(
+PNMI_STATIC SK_U8 CalculateLinkModeStatus(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
unsigned int PhysPortIndex) /* Physical port index */
{
SK_U8 Result;
-
/* Get the current mode, which can be full or half duplex */
Result = pAC->GIni.GP[PhysPortIndex].PLinkModeStatus;
@@ -6836,7 +6691,7 @@
if (Result < SK_LMODE_STAT_HALF) {
Result = SK_LMODE_STAT_UNKNOWN;
- }
+ }
else if (pAC->GIni.GP[PhysPortIndex].PLinkMode >= SK_LMODE_AUTOHALF) {
/*
@@ -6869,8 +6724,7 @@
* SK_PNMI_ERR_OK Task successfully performed.
* SK_PNMI_ERR_GENERAL Something went wrong.
*/
-
-static int GetVpdKeyArr(
+PNMI_STATIC int GetVpdKeyArr(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
char *pKeyArr, /* Ptr KeyArray */
@@ -6966,8 +6820,7 @@
* SK_PNMI_ERR_OK Task successfully performed.
* SK_PNMI_ERR_GENERAL Something went wrong.
*/
-
-static int SirqUpdate(
+PNMI_STATIC int SirqUpdate(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC) /* IO context handle */
{
@@ -7006,8 +6859,7 @@
* SK_PNMI_ERR_OK Task successfully performed.
* SK_PNMI_ERR_GENERAL Something went wrong.
*/
-
-static int RlmtUpdate(
+PNMI_STATIC int RlmtUpdate(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
@@ -7043,23 +6895,19 @@
* Description:
* The XMAC holds its statistic internally. To obtain the current
* values we must send a command so that the statistic data will
- * be written to a predefined memory area on the adapter.
+ * be written to a predefined memory area on the adapter.
*
* Returns:
* SK_PNMI_ERR_OK Task successfully performed.
* SK_PNMI_ERR_GENERAL Something went wrong.
*/
-
-static int MacUpdate(
+PNMI_STATIC int MacUpdate(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
unsigned int FirstMac, /* Index of the first Mac to be updated */
unsigned int LastMac) /* Index of the last Mac to be updated */
{
unsigned int MacIndex;
- SK_U16 StatReg;
- unsigned int WaitIndex;
-
/*
* Were the statistics already updated during the
@@ -7070,31 +6918,21 @@
return (SK_PNMI_ERR_OK);
}
- /* Send an update command to all XMACs specified */
+ /* Send an update command to all MACs specified */
for (MacIndex = FirstMac; MacIndex <= LastMac; MacIndex ++) {
- StatReg = XM_SC_SNP_TXC | XM_SC_SNP_RXC;
- XM_OUT16(IoC, MacIndex, XM_STAT_CMD, StatReg);
-
/*
- * It is an auto-clearing register. If the command bits
- * went to zero again, the statistics are transfered.
- * Normally the command should be executed immediately.
- * But just to be sure we execute a loop.
+ * 2002-09-13 pweber: Freeze the current SW counters.
+ * (That should be done as close as
+ * possible to the update of the
+ * HW counters)
*/
- for (WaitIndex = 0; WaitIndex < 10; WaitIndex ++) {
-
- XM_IN16(IoC, MacIndex, XM_STAT_CMD, &StatReg);
- if ((StatReg & (XM_SC_SNP_TXC | XM_SC_SNP_RXC)) ==
- 0) {
-
- break;
- }
+ if (pAC->GIni.GIMacType == SK_MAC_XMAC) {
+ pAC->Pnmi.BufPort[MacIndex] = pAC->Pnmi.Port[MacIndex];
}
- if (WaitIndex == 10 ) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SK_PNMI_ERR050,
- SK_PNMI_ERR050MSG);
+
+ /* 2002-09-13 pweber: Update the HW counter */
+ if (pAC->GIni.GIFunc.pFnMacUpdateStats(pAC, IoC, MacIndex) != 0) {
return (SK_PNMI_ERR_GENERAL);
}
@@ -7119,8 +6957,7 @@
* Returns:
* Requested statistic value
*/
-
-static SK_U64 GetStatVal(
+PNMI_STATIC SK_U64 GetStatVal(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
unsigned int LogPortIndex, /* Index of the logical Port to be processed */
@@ -7129,16 +6966,16 @@
{
unsigned int PhysPortIndex;
unsigned int PhysPortMax;
- SK_U64 Val = 0;
+ SK_U64 Val = 0;
- if(pAC->Pnmi.DualNetActiveFlag == SK_TRUE){ /* Dual net mode */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
PhysPortIndex = NetIndex;
+
Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
- } /* end of dual net mode */
-
- else { /* single net mode */
+ }
+ else { /* Single Net mode */
if (LogPortIndex == 0) {
@@ -7150,8 +6987,7 @@
if (pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
- Val += GetPhysStatVal(pAC, IoC, PhysPortIndex,
- StatIndex);
+ Val += GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
}
}
@@ -7161,9 +6997,10 @@
else {
/* Get counter value of physical port */
PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
+
Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
}
- } /* end of single net mode */
+ }
return (Val);
}
@@ -7183,87 +7020,325 @@
* Returns:
* Counter value
*/
-
-static SK_U64 GetPhysStatVal(
+PNMI_STATIC SK_U64 GetPhysStatVal(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
unsigned int PhysPortIndex, /* Index of the logical Port to be processed */
unsigned int StatIndex) /* Index to statistic value */
{
- SK_U64 Val = 0;
- SK_U32 LowVal;
- SK_U32 HighVal;
-
+ SK_U64 Val = 0;
+ SK_U32 LowVal = 0;
+ SK_U32 HighVal = 0;
+ SK_U16 Word;
+ int MacType;
+ unsigned int HelpIndex;
+ SK_GEPORT *pPrt;
+
+ SK_PNMI_PORT *pPnmiPrt;
+ SK_GEMACFUNC *pFnMac;
+
+ pPrt = &pAC->GIni.GP[PhysPortIndex];
+
+ MacType = pAC->GIni.GIMacType;
+
+ /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
+ if (MacType == SK_MAC_XMAC) {
+ pPnmiPrt = &pAC->Pnmi.BufPort[PhysPortIndex];
+ }
+ else {
+ pPnmiPrt = &pAC->Pnmi.Port[PhysPortIndex];
+ }
+
+ pFnMac = &pAC->GIni.GIFunc;
switch (StatIndex) {
+ case SK_PNMI_HTX:
+ if (MacType == SK_MAC_GMAC) {
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[SK_PNMI_HTX_BROADCAST][MacType].Reg,
+ &LowVal);
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[SK_PNMI_HTX_MULTICAST][MacType].Reg,
+ &HighVal);
+ LowVal += HighVal;
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[SK_PNMI_HTX_UNICAST][MacType].Reg,
+ &HighVal);
+ LowVal += HighVal;
+ }
+ else {
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ }
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
+
+ case SK_PNMI_HRX:
+ if (MacType == SK_MAC_GMAC) {
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[SK_PNMI_HRX_BROADCAST][MacType].Reg,
+ &LowVal);
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[SK_PNMI_HRX_MULTICAST][MacType].Reg,
+ &HighVal);
+ LowVal += HighVal;
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[SK_PNMI_HRX_UNICAST][MacType].Reg,
+ &HighVal);
+ LowVal += HighVal;
+ }
+ else {
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ }
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
case SK_PNMI_HTX_OCTET:
- XM_IN32(IoC, PhysPortIndex, XM_TXO_OK_LO, &LowVal);
- XM_IN32(IoC, PhysPortIndex, XM_TXO_OK_HI, &HighVal);
+ case SK_PNMI_HRX_OCTET:
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &HighVal);
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex + 1][MacType].Reg,
+ &LowVal);
+ break;
+
+ case SK_PNMI_HTX_BURST:
+ case SK_PNMI_HTX_EXCESS_DEF:
+ case SK_PNMI_HTX_CARRIER:
+ /* Not supported by GMAC */
+ if (MacType == SK_MAC_GMAC) {
+ return (Val);
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
+
+ case SK_PNMI_HTX_MACC:
+ /* GMAC only supports PAUSE MAC control frames */
+ if (MacType == SK_MAC_GMAC) {
+ HelpIndex = SK_PNMI_HTX_PMACC;
+ }
+ else {
+ HelpIndex = StatIndex;
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[HelpIndex][MacType].Reg,
+ &LowVal);
+
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
break;
- case SK_PNMI_HRX_OCTET:
- XM_IN32(IoC, PhysPortIndex, XM_RXO_OK_LO, &LowVal);
- XM_IN32(IoC, PhysPortIndex, XM_RXO_OK_HI, &HighVal);
+ case SK_PNMI_HTX_COL:
+ case SK_PNMI_HRX_UNDERSIZE:
+ /* Not supported by XMAC */
+ if (MacType == SK_MAC_XMAC) {
+ return (Val);
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
+
+ case SK_PNMI_HTX_DEFFERAL:
+ /* Not supported by GMAC */
+ if (MacType == SK_MAC_GMAC) {
+ return (Val);
+ }
+
+ /*
+ * XMAC counts frames with deferred transmission
+ * even in full-duplex mode.
+ *
+ * In full-duplex mode the counter remains constant!
+ */
+ if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL) ||
+ (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL)) {
+
+ LowVal = 0;
+ HighVal = 0;
+ }
+ else {
+ /* Otherwise get contents of hardware register */
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ }
+ break;
+
+ case SK_PNMI_HRX_BADOCTET:
+ /* Not supported by XMAC */
+ if (MacType == SK_MAC_XMAC) {
+ return (Val);
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &HighVal);
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex + 1][MacType].Reg,
+ &LowVal);
break;
case SK_PNMI_HTX_OCTETLOW:
case SK_PNMI_HRX_OCTETLOW:
+ case SK_PNMI_HRX_BADOCTETLOW:
return (Val);
- case SK_PNMI_HTX_SYNC:
- LowVal = (SK_U32)pAC->Pnmi.Port[PhysPortIndex].StatSyncCts;
- HighVal = (SK_U32)
- (pAC->Pnmi.Port[PhysPortIndex].StatSyncCts >> 32);
+ case SK_PNMI_HRX_LONGFRAMES:
+ /* For XMAC the SW counter is managed by PNMI */
+ if (MacType == SK_MAC_XMAC) {
+ return (pPnmiPrt->StatRxLongFrameCts);
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
+
+ case SK_PNMI_HRX_TOO_LONG:
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+
+ Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
+
+ if (MacType == SK_MAC_GMAC) {
+ /* For GMAC the SW counter is additionally managed by PNMI */
+ Val += pPnmiPrt->StatRxFrameTooLongCts;
+ }
+ else {
+ /*
+ * Frames longer than IEEE 802.3 frame max size are counted
+ * by XMAC in frame_too_long counter even reception of long
+ * frames was enabled and the frame was correct.
+ * So correct the value by subtracting RxLongFrame counter.
+ */
+ Val -= pPnmiPrt->StatRxLongFrameCts;
+ }
+
+ LowVal = (SK_U32)Val;
+ HighVal = (SK_U32)(Val >> 32);
break;
+
+ case SK_PNMI_HRX_SHORTS:
+ /* Not supported by GMAC */
+ if (MacType == SK_MAC_GMAC) {
+ /* GM_RXE_FRAG?? */
+ return (Val);
+ }
+
+ /*
+ * XMAC counts short frame errors even if link down (#10620)
+ *
+ * If link-down the counter remains constant
+ */
+ if (pPrt->PLinkModeStatus != SK_LMODE_STAT_UNKNOWN) {
- case SK_PNMI_HTX_SYNC_OCTET:
- LowVal = (SK_U32)pAC->Pnmi.Port[PhysPortIndex].
- StatSyncOctetsCts;
- HighVal = (SK_U32)
- (pAC->Pnmi.Port[PhysPortIndex].StatSyncOctetsCts >>
- 32);
+ /* Otherwise get incremental difference */
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+
+ Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
+ Val -= pPnmiPrt->RxShortZeroMark;
+
+ LowVal = (SK_U32)Val;
+ HighVal = (SK_U32)(Val >> 32);
+ }
break;
- case SK_PNMI_HRX_LONGFRAMES:
- LowVal = (SK_U32)pAC->Pnmi.Port[PhysPortIndex].StatRxLongFrameCts;
- HighVal = (SK_U32)
- (pAC->Pnmi.Port[PhysPortIndex].StatRxLongFrameCts >> 32);
+ case SK_PNMI_HRX_MACC:
+ case SK_PNMI_HRX_MACC_UNKWN:
+ case SK_PNMI_HRX_BURST:
+ case SK_PNMI_HRX_MISSED:
+ case SK_PNMI_HRX_FRAMING:
+ case SK_PNMI_HRX_CARRIER:
+ case SK_PNMI_HRX_IRLENGTH:
+ case SK_PNMI_HRX_SYMBOL:
+ case SK_PNMI_HRX_CEXT:
+ /* Not supported by GMAC */
+ if (MacType == SK_MAC_GMAC) {
+ return (Val);
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
+
+ case SK_PNMI_HRX_PMACC_ERR:
+ /* For GMAC the SW counter is managed by PNMI */
+ if (MacType == SK_MAC_GMAC) {
+ return (pPnmiPrt->StatRxPMaccErr);
+ }
+
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
+ break;
+
+ /* SW counter managed by PNMI */
+ case SK_PNMI_HTX_SYNC:
+ LowVal = (SK_U32)pPnmiPrt->StatSyncCts;
+ HighVal = (SK_U32)(pPnmiPrt->StatSyncCts >> 32);
+ break;
+
+ /* SW counter managed by PNMI */
+ case SK_PNMI_HTX_SYNC_OCTET:
+ LowVal = (SK_U32)pPnmiPrt->StatSyncOctetsCts;
+ HighVal = (SK_U32)(pPnmiPrt->StatSyncOctetsCts >> 32);
break;
case SK_PNMI_HRX_FCS:
- /*
- * Broadcom filters fcs errors and counts it in
+ /*
+ * Broadcom filters FCS errors and counts it in
* Receive Error Counter register
*/
- if (pAC->GIni.GP[PhysPortIndex].PhyType == SK_PHY_BCOM) {
+ if (pPrt->PhyType == SK_PHY_BCOM) {
/* do not read while not initialized (PHY_READ hangs!)*/
- if (pAC->GIni.GP[PhysPortIndex].PState) {
- PHY_READ(IoC, &pAC->GIni.GP[PhysPortIndex],
- PhysPortIndex, PHY_BCOM_RE_CTR,
- &LowVal);
- }
- else {
- LowVal = 0;
+ if (pPrt->PState != SK_PRT_RESET) {
+ SkXmPhyRead(pAC, IoC, PhysPortIndex, PHY_BCOM_RE_CTR, &Word);
+
+ LowVal = Word;
}
- HighVal = pAC->Pnmi.Port[PhysPortIndex].CounterHigh[StatIndex];
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
}
else {
- XM_IN32(IoC, PhysPortIndex,
- StatAddress[StatIndex].Param, &LowVal);
- HighVal = pAC->Pnmi.Port[PhysPortIndex].CounterHigh[StatIndex];
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
}
+ break;
+
default:
- XM_IN32(IoC, PhysPortIndex, StatAddress[StatIndex].Param,
- &LowVal);
- HighVal = pAC->Pnmi.Port[PhysPortIndex].CounterHigh[StatIndex];
+ (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
+ StatAddr[StatIndex][MacType].Reg,
+ &LowVal);
+ HighVal = pPnmiPrt->CounterHigh[StatIndex];
break;
}
Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
/* Correct value because of possible XMAC reset. XMAC Errata #2 */
- Val += pAC->Pnmi.Port[PhysPortIndex].CounterOffset[StatIndex];
+ Val += pPnmiPrt->CounterOffset[StatIndex];
return (Val);
}
@@ -7279,8 +7354,7 @@
* Returns:
* Nothing
*/
-
-static void ResetCounter(
+PNMI_STATIC void ResetCounter(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 NetIndex)
@@ -7305,20 +7379,17 @@
/* Notify CSUM module */
#ifdef SK_USE_CSUM
- EventParam.Para64 = (SK_U64)(-1);
+ EventParam.Para32[0] = NetIndex;
+ EventParam.Para32[1] = (SK_U32)-1;
SkEventQueue(pAC, SKGE_CSUM, SK_CSUM_EVENT_CLEAR_PROTO_STATS,
EventParam);
-#endif
-
+#endif /* SK_USE_CSUM */
+
/* Clear XMAC statistic */
for (PhysPortIndex = 0; PhysPortIndex <
(unsigned int)pAC->GIni.GIMacsFound; PhysPortIndex ++) {
- XM_OUT16(IoC, PhysPortIndex, XM_STAT_CMD,
- XM_SC_CLR_RXC | XM_SC_CLR_TXC);
- /* Clear two times according to Errata #3 */
- XM_OUT16(IoC, PhysPortIndex, XM_STAT_CMD,
- XM_SC_CLR_RXC | XM_SC_CLR_TXC);
+ (void)pAC->GIni.GIFunc.pFnMacResetCounter(pAC, IoC, PhysPortIndex);
SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].CounterHigh,
0, sizeof(pAC->Pnmi.Port[PhysPortIndex].CounterHigh));
@@ -7333,6 +7404,12 @@
SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
StatRxLongFrameCts, 0, sizeof(pAC->Pnmi.Port[
PhysPortIndex].StatRxLongFrameCts));
+ SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
+ StatRxFrameTooLongCts, 0, sizeof(pAC->Pnmi.Port[
+ PhysPortIndex].StatRxFrameTooLongCts));
+ SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
+ StatRxPMaccErr, 0, sizeof(pAC->Pnmi.Port[
+ PhysPortIndex].StatRxPMaccErr));
}
/*
@@ -7364,7 +7441,7 @@
*
* Description:
* The trap buffer stores various events. A user application somehow
- * gets notified that an event occurred and retrieves the trap buffer
+ * gets notified that an event occured and retrieves the trap buffer
* contens (or simply polls the buffer). The buffer is organized as
* a ring which stores the newest traps at the beginning. The oldest
* traps are overwritten by the newest ones. Each trap entry has a
@@ -7373,8 +7450,7 @@
* Returns:
* A pointer to the trap entry
*/
-
-static char* GetTrapEntry(
+PNMI_STATIC char* GetTrapEntry(
SK_AC *pAC, /* Pointer to adapter context */
SK_U32 TrapId, /* SNMP ID of the trap */
unsigned int Size) /* Space needed for trap entry */
@@ -7399,11 +7475,11 @@
if (Beg >= Size) {
NeededSpace = Size;
- Wrap = FALSE;
+ Wrap = SK_FALSE;
}
else {
NeededSpace = Beg + Size;
- Wrap = TRUE;
+ Wrap = SK_TRUE;
}
/*
@@ -7424,18 +7500,18 @@
End -= EntrySize;
#ifdef DEBUG
SK_MEMSET(pBuf + End, (char)(-1), EntrySize);
-#endif
+#endif /* DEBUG */
if (End == BufPad) {
#ifdef DEBUG
SK_MEMSET(pBuf, (char)(-1), End);
-#endif
+#endif /* DEBUG */
BufFree += End;
End = 0;
BufPad = 0;
}
}
- /*
+ /*
* Insert new entry as first entry. Newest entries are
* stored at the beginning of the queue.
*/
@@ -7479,8 +7555,7 @@
* Returns:
* Nothing
*/
-
-static void CopyTrapQueue(
+PNMI_STATIC void CopyTrapQueue(
SK_AC *pAC, /* Pointer to adapter context */
char *pDstBuf) /* Buffer to which the queued traps will be copied */
{
@@ -7523,8 +7598,7 @@
* Returns:
* Nothing
*/
-
-static void GetTrapQueueLen(
+PNMI_STATIC void GetTrapQueueLen(
SK_AC *pAC, /* Pointer to adapter context */
unsigned int *pLen, /* Length in Bytes of all queued traps */
unsigned int *pEntries) /* Returns number of trapes stored in queue */
@@ -7566,8 +7640,7 @@
* Returns:
* Nothing
*/
-
-static void QueueSimpleTrap(
+PNMI_STATIC void QueueSimpleTrap(
SK_AC *pAC, /* Pointer to adapter context */
SK_U32 TrapId) /* Type of sensor trap */
{
@@ -7585,8 +7658,7 @@
* Returns:
* Nothing
*/
-
-static void QueueSensorTrap(
+PNMI_STATIC void QueueSensorTrap(
SK_AC *pAC, /* Pointer to adapter context */
SK_U32 TrapId, /* Type of sensor trap */
unsigned int SensorIndex) /* Index of sensor which caused the trap */
@@ -7641,8 +7713,7 @@
* Returns:
* Nothing
*/
-
-static void QueueRlmtNewMacTrap(
+PNMI_STATIC void QueueRlmtNewMacTrap(
SK_AC *pAC, /* Pointer to adapter context */
unsigned int ActiveMac) /* Index (0..n) of the currently active port */
{
@@ -7669,8 +7740,7 @@
* Returns:
* Nothing
*/
-
-static void QueueRlmtPortTrap(
+PNMI_STATIC void QueueRlmtPortTrap(
SK_AC *pAC, /* Pointer to adapter context */
SK_U32 TrapId, /* Type of RLMT port trap */
unsigned int PortIndex) /* Index of the port, which changed its state */
@@ -7697,8 +7767,7 @@
* Returns:
* Nothing
*/
-
-static void CopyMac(
+PNMI_STATIC void CopyMac(
char *pDst, /* Pointer to destination buffer */
SK_MAC_ADDR *pMac) /* Pointer of Source */
{
@@ -7710,3 +7779,716 @@
*(pDst + i) = pMac->a[i];
}
}
+
+#ifdef SK_POWER_MGMT
+/*****************************************************************************
+ *
+ * PowerManagement - OID handler function of PowerManagement OIDs
+ *
+ * Description:
+ * The code is simple. No description necessary.
+ *
+ * Returns:
+ * SK_PNMI_ERR_OK The request was successfully performed.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
+ * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
+ * the correct data (e.g. a 32bit value is
+ * needed, but a 16 bit value was passed).
+ * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
+ * exist (e.g. port instance 3 on a two port
+ * adapter.
+ */
+
+PNMI_STATIC int PowerManagement(
+SK_AC *pAC, /* Pointer to adapter context */
+SK_IOC IoC, /* IO context handle */
+int Action, /* Get/PreSet/Set action */
+SK_U32 Id, /* Object ID that is to be processed */
+char *pBuf, /* Buffer to which to mgmt data will be retrieved */
+unsigned int *pLen, /* On call: buffer length. On return: used buffer */
+SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
+unsigned int TableIndex, /* Index to the Id table */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
+{
+
+ SK_U32 RetCode = SK_PNMI_ERR_GENERAL;
+
+ /*
+ * Check instance. We only handle single instance variables
+ */
+ if (Instance != (SK_U32)(-1) && Instance != 1) {
+
+ *pLen = 0;
+ return (SK_PNMI_ERR_UNKNOWN_INST);
+ }
+
+
+ /* Check length */
+ switch (Id) {
+
+ case OID_PNP_CAPABILITIES:
+ if (*pLen < sizeof(SK_PNP_CAPABILITIES)) {
+
+ *pLen = sizeof(SK_PNP_CAPABILITIES);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ case OID_PNP_SET_POWER:
+ case OID_PNP_QUERY_POWER:
+ if (*pLen < sizeof(SK_DEVICE_POWER_STATE))
+ {
+ *pLen = sizeof(SK_DEVICE_POWER_STATE);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ case OID_PNP_ADD_WAKE_UP_PATTERN:
+ case OID_PNP_REMOVE_WAKE_UP_PATTERN:
+ if (*pLen < sizeof(SK_PM_PACKET_PATTERN)) {
+
+ *pLen = sizeof(SK_PM_PACKET_PATTERN);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ case OID_PNP_ENABLE_WAKE_UP:
+ if (*pLen < sizeof(SK_U32)) {
+
+ *pLen = sizeof(SK_U32);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+ }
+
+ /*
+ * Perform action
+ */
+ if (Action == SK_PNMI_GET) {
+
+ /*
+ * Get value
+ */
+ switch (Id) {
+
+ case OID_PNP_CAPABILITIES:
+ RetCode = SkPowerQueryPnPCapabilities(pAC, IoC, pBuf, pLen);
+ break;
+
+ case OID_PNP_QUERY_POWER:
+ /* The Windows DDK describes: An OID_PNP_QUERY_POWER requests
+ the miniport to indicate whether it can transition its NIC
+ to the low-power state.
+ A miniport driver must always return NDIS_STATUS_SUCCESS
+ to a query of OID_PNP_QUERY_POWER. */
+ *pLen = sizeof(SK_DEVICE_POWER_STATE);;
+ RetCode = SK_PNMI_ERR_OK;
+ break;
+
+ /* NDIS handles these OIDs as write-only.
+ * So in case of get action the buffer with written length = 0
+ * is returned
+ */
+ case OID_PNP_SET_POWER:
+ case OID_PNP_ADD_WAKE_UP_PATTERN:
+ case OID_PNP_REMOVE_WAKE_UP_PATTERN:
+ *pLen = 0;
+ RetCode = SK_PNMI_ERR_NOT_SUPPORTED;
+ break;
+
+ case OID_PNP_ENABLE_WAKE_UP:
+ RetCode = SkPowerGetEnableWakeUp(pAC, IoC, pBuf, pLen);
+ break;
+
+ default:
+ RetCode = SK_PNMI_ERR_GENERAL;
+ break;
+ }
+
+ return (RetCode);
+ }
+
+
+ /*
+ * Perform preset or set
+ */
+
+ /* POWER module does not support PRESET action */
+ if (Action == SK_PNMI_PRESET) {
+ return (SK_PNMI_ERR_OK);
+ }
+
+ switch (Id) {
+ case OID_PNP_SET_POWER:
+ RetCode = SkPowerSetPower(pAC, IoC, pBuf, pLen);
+ break;
+
+ case OID_PNP_ADD_WAKE_UP_PATTERN:
+ RetCode = SkPowerAddWakeUpPattern(pAC, IoC, pBuf, pLen);
+ break;
+
+ case OID_PNP_REMOVE_WAKE_UP_PATTERN:
+ RetCode = SkPowerRemoveWakeUpPattern(pAC, IoC, pBuf, pLen);
+ break;
+
+ case OID_PNP_ENABLE_WAKE_UP:
+ RetCode = SkPowerSetEnableWakeUp(pAC, IoC, pBuf, pLen);
+ break;
+
+ default:
+ RetCode = SK_PNMI_ERR_READ_ONLY;
+ }
+
+ return (RetCode);
+}
+#endif /* SK_POWER_MGMT */
+
+#ifdef SK_DIAG_SUPPORT
+/*****************************************************************************
+ *
+ * DiagActions - OID handler function of Diagnostic driver
+ *
+ * Description:
+ * The code is simple. No description necessary.
+ *
+ * Returns:
+ * SK_PNMI_ERR_OK The request was successfully performed.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
+ * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
+ * the correct data (e.g. a 32bit value is
+ * needed, but a 16 bit value was passed).
+ * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
+ * exist (e.g. port instance 3 on a two port
+ * adapter.
+ */
+
+PNMI_STATIC int DiagActions(
+SK_AC *pAC, /* Pointer to adapter context */
+SK_IOC IoC, /* IO context handle */
+int Action, /* GET/PRESET/SET action */
+SK_U32 Id, /* Object ID that is to be processed */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
+SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
+unsigned int TableIndex, /* Index to the Id table */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
+{
+
+ SK_U32 RetCode = SK_PNMI_ERR_GENERAL;
+
+ /*
+ * Check instance. We only handle single instance variables.
+ */
+ if (Instance != (SK_U32)(-1) && Instance != 1) {
+
+ *pLen = 0;
+ return (SK_PNMI_ERR_UNKNOWN_INST);
+ }
+
+ /*
+ * Check length.
+ */
+ switch (Id) {
+
+ case OID_SKGE_DIAG_MODE:
+ if (*pLen < sizeof(SK_U32)) {
+
+ *pLen = sizeof(SK_U32);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR040, SK_PNMI_ERR040MSG);
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+
+ /* Perform action. */
+
+ /* GET value. */
+ if (Action == SK_PNMI_GET) {
+
+ switch (Id) {
+
+ case OID_SKGE_DIAG_MODE:
+ SK_PNMI_STORE_U32(pBuf, pAC->DiagModeActive);
+ *pLen = sizeof(SK_U32);
+ RetCode = SK_PNMI_ERR_OK;
+ break;
+
+ default:
+ *pLen = 0;
+ RetCode = SK_PNMI_ERR_GENERAL;
+ break;
+ }
+
+ return (RetCode);
+ }
+
+ /* From here SET or PRESET value. */
+
+ /* PRESET value is not supported. */
+ if (Action == SK_PNMI_PRESET) {
+ return (SK_PNMI_ERR_OK);
+ }
+
+ /* SET value. */
+ switch (Id) {
+ case OID_SKGE_DIAG_MODE:
+
+ /* Handle the SET. */
+ switch (*pBuf) {
+
+ /* Enter the DIAG mode in the driver. */
+ case 1:
+ /* If DiagMode is not active, we can enter it. */
+ if (!pAC->DiagModeActive) {
+
+ RetCode = SkDrvEnterDiagMode(pAC);
+ }
+ else {
+
+ RetCode = SK_PNMI_ERR_GENERAL;
+ }
+ break;
+
+ /* Leave the DIAG mode in the driver. */
+ case 0:
+ RetCode = SkDrvLeaveDiagMode(pAC);
+ break;
+
+ default:
+ RetCode = SK_PNMI_ERR_BAD_VALUE;
+ break;
+ }
+ break;
+
+ default:
+ RetCode = SK_PNMI_ERR_GENERAL;
+ }
+
+ if (RetCode == SK_PNMI_ERR_OK) {
+ *pLen = sizeof(SK_U32);
+ }
+ else {
+
+ *pLen = 0;
+ }
+ return (RetCode);
+}
+#endif /* SK_DIAG_SUPPORT */
+
+/*****************************************************************************
+ *
+ * Vct - OID handler function of OIDs
+ *
+ * Description:
+ * The code is simple. No description necessary.
+ *
+ * Returns:
+ * SK_PNMI_ERR_OK The request was performed successfully.
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured.
+ * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
+ * the correct data (e.g. a 32bit value is
+ * needed, but a 16 bit value was passed).
+ * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
+ * exist (e.g. port instance 3 on a two port
+ * adapter).
+ * SK_PNMI_ERR_READ_ONLY Only the Get action is allowed.
+ *
+ */
+
+PNMI_STATIC int Vct(
+SK_AC *pAC, /* Pointer to adapter context */
+SK_IOC IoC, /* IO context handle */
+int Action, /* GET/PRESET/SET action */
+SK_U32 Id, /* Object ID that is to be processed */
+char *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
+SK_U32 Instance, /* Instance (-1,2..n) that is to be queried */
+unsigned int TableIndex, /* Index to the Id table */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
+{
+ SK_GEPORT *pPrt;
+ SK_PNMI_VCT *pVctBackupData;
+ SK_U32 LogPortMax;
+ SK_U32 PhysPortMax;
+ SK_U32 PhysPortIndex;
+ SK_U32 Limit;
+ SK_U32 Offset;
+ SK_BOOL Link;
+ SK_U32 RetCode = SK_PNMI_ERR_GENERAL;
+ int i;
+ SK_EVPARA Para;
+ SK_U32 CableLength;
+
+ /*
+ * Calculate the port indexes from the instance.
+ */
+ PhysPortMax = pAC->GIni.GIMacsFound;
+ LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
+
+ /* Dual net mode? */
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ LogPortMax--;
+ }
+
+ if ((Instance != (SK_U32) (-1))) {
+ /* Check instance range. */
+ if ((Instance < 2) || (Instance > LogPortMax)) {
+ *pLen = 0;
+ return (SK_PNMI_ERR_UNKNOWN_INST);
+ }
+
+ if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
+ PhysPortIndex = NetIndex;
+ }
+ else {
+ PhysPortIndex = Instance - 2;
+ }
+ Limit = PhysPortIndex + 1;
+ }
+ else {
+ /*
+ * Instance == (SK_U32) (-1), get all Instances of that OID.
+ *
+ * Not implemented yet. May be used in future releases.
+ */
+ PhysPortIndex = 0;
+ Limit = PhysPortMax;
+ }
+
+ pPrt = &pAC->GIni.GP[PhysPortIndex];
+ if (pPrt->PHWLinkUp) {
+ Link = SK_TRUE;
+ }
+ else {
+ Link = SK_FALSE;
+ }
+
+ /* Check MAC type */
+ if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+
+ /* Initialize backup data pointer. */
+ pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
+
+ /* Check action type */
+ if (Action == SK_PNMI_GET) {
+ /* Check length */
+ switch (Id) {
+
+ case OID_SKGE_VCT_GET:
+ if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_PNMI_VCT)) {
+ *pLen = (Limit - PhysPortIndex) * sizeof(SK_PNMI_VCT);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ case OID_SKGE_VCT_STATUS:
+ if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U8)) {
+ *pLen = (Limit - PhysPortIndex) * sizeof(SK_U8);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ default:
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+
+ /* Get value */
+ Offset = 0;
+ for (; PhysPortIndex < Limit; PhysPortIndex++) {
+ switch (Id) {
+
+ case OID_SKGE_VCT_GET:
+ if ((Link == SK_FALSE) &&
+ (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING)) {
+ RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_FALSE);
+ if (RetCode == 0) {
+ pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_PENDING;
+ pAC->Pnmi.VctStatus[PhysPortIndex] |=
+ (SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_TEST_DONE);
+
+ /* Copy results for later use to PNMI struct. */
+ for (i = 0; i < 4; i++) {
+ if (pPrt->PMdiPairSts[i] == SK_PNMI_VCT_NORMAL_CABLE) {
+ if ((pPrt->PMdiPairLen[i] > 35) && (pPrt->PMdiPairLen[i] < 0xff)) {
+ pPrt->PMdiPairSts[i] = SK_PNMI_VCT_IMPEDANCE_MISMATCH;
+ }
+ }
+ if ((pPrt->PMdiPairLen[i] > 35) && (pPrt->PMdiPairLen[i] != 0xff)) {
+ CableLength = 1000 * (((175 * pPrt->PMdiPairLen[i]) / 210) - 28);
+ }
+ else {
+ CableLength = 0;
+ }
+ pVctBackupData->PMdiPairLen[i] = CableLength;
+ pVctBackupData->PMdiPairSts[i] = pPrt->PMdiPairSts[i];
+ }
+
+ Para.Para32[0] = PhysPortIndex;
+ Para.Para32[1] = -1;
+ SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
+ SkEventDispatcher(pAC, IoC);
+ }
+ else {
+ ; /* VCT test is running. */
+ }
+ }
+
+ /* Get all results. */
+ CheckVctStatus(pAC, IoC, pBuf, Offset, PhysPortIndex);
+ Offset += sizeof(SK_U8);
+ *(pBuf + Offset) = pPrt->PCableLen;
+ Offset += sizeof(SK_U8);
+ for (i = 0; i < 4; i++) {
+ SK_PNMI_STORE_U32((pBuf + Offset), pVctBackupData->PMdiPairLen[i]);
+ Offset += sizeof(SK_U32);
+ }
+ for (i = 0; i < 4; i++) {
+ *(pBuf + Offset) = pVctBackupData->PMdiPairSts[i];
+ Offset += sizeof(SK_U8);
+ }
+
+ RetCode = SK_PNMI_ERR_OK;
+ break;
+
+ case OID_SKGE_VCT_STATUS:
+ CheckVctStatus(pAC, IoC, pBuf, Offset, PhysPortIndex);
+ Offset += sizeof(SK_U8);
+ RetCode = SK_PNMI_ERR_OK;
+ break;
+
+ default:
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+ } /* for */
+ *pLen = Offset;
+ return (RetCode);
+
+ } /* if SK_PNMI_GET */
+
+ /*
+ * From here SET or PRESET action. Check if the passed
+ * buffer length is plausible.
+ */
+
+ /* Check length */
+ switch (Id) {
+ case OID_SKGE_VCT_SET:
+ if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U32)) {
+ *pLen = (Limit - PhysPortIndex) * sizeof(SK_U32);
+ return (SK_PNMI_ERR_TOO_SHORT);
+ }
+ break;
+
+ default:
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+
+ /*
+ * Perform preset or set.
+ */
+
+ /* VCT does not support PRESET action. */
+ if (Action == SK_PNMI_PRESET) {
+ return (SK_PNMI_ERR_OK);
+ }
+
+ Offset = 0;
+ for (; PhysPortIndex < Limit; PhysPortIndex++) {
+ switch (Id) {
+ case OID_SKGE_VCT_SET: /* Start VCT test. */
+ if (Link == SK_FALSE) {
+ SkGeStopPort(pAC, IoC, PhysPortIndex, SK_STOP_ALL, SK_SOFT_RST);
+
+ RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_TRUE);
+ if (RetCode == 0) { /* RetCode: 0 => Start! */
+ pAC->Pnmi.VctStatus[PhysPortIndex] |= SK_PNMI_VCT_PENDING;
+ pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_NEW_VCT_DATA;
+ pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_LINK;
+
+ /*
+ * Start VCT timer counter.
+ */
+ SK_MEMSET((char *) &Para, 0, sizeof(Para));
+ Para.Para32[0] = PhysPortIndex;
+ Para.Para32[1] = -1;
+ SkTimerStart(pAC, IoC, &pAC->Pnmi.VctTimeout[PhysPortIndex].VctTimer,
+ 4000000, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Para);
+ SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
+ RetCode = SK_PNMI_ERR_OK;
+ }
+ else { /* RetCode: 2 => Running! */
+ SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
+ RetCode = SK_PNMI_ERR_OK;
+ }
+ }
+ else { /* RetCode: 4 => Link! */
+ RetCode = 4;
+ SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
+ RetCode = SK_PNMI_ERR_OK;
+ }
+ Offset += sizeof(SK_U32);
+ break;
+
+ default:
+ *pLen = 0;
+ return (SK_PNMI_ERR_GENERAL);
+ }
+ } /* for */
+ *pLen = Offset;
+ return (RetCode);
+
+} /* Vct */
+
+
+PNMI_STATIC void CheckVctStatus(
+SK_AC *pAC,
+SK_IOC IoC,
+char *pBuf,
+SK_U32 Offset,
+SK_U32 PhysPortIndex)
+{
+ SK_GEPORT *pPrt;
+ SK_PNMI_VCT *pVctData;
+ SK_U32 RetCode;
+
+ pPrt = &pAC->GIni.GP[PhysPortIndex];
+
+ pVctData = (SK_PNMI_VCT *) (pBuf + Offset);
+ pVctData->VctStatus = SK_PNMI_VCT_NONE;
+
+ if (!pPrt->PHWLinkUp) {
+
+ /* Was a VCT test ever made before? */
+ if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_TEST_DONE) {
+ if ((pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_LINK)) {
+ pVctData->VctStatus |= SK_PNMI_VCT_OLD_VCT_DATA;
+ }
+ else {
+ pVctData->VctStatus |= SK_PNMI_VCT_NEW_VCT_DATA;
+ }
+ }
+
+ /* Check VCT test status. */
+ RetCode = SkGmCableDiagStatus(pAC,IoC, PhysPortIndex, SK_FALSE);
+ if (RetCode == 2) { /* VCT test is running. */
+ pVctData->VctStatus |= SK_PNMI_VCT_RUNNING;
+ }
+ else { /* VCT data was copied to pAC here. Check PENDING state. */
+ if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING) {
+ pVctData->VctStatus |= SK_PNMI_VCT_NEW_VCT_DATA;
+ }
+ }
+
+ if (pPrt->PCableLen != 0xff) { /* Old DSP value. */
+ pVctData->VctStatus |= SK_PNMI_VCT_OLD_DSP_DATA;
+ }
+ }
+ else {
+
+ /* Was a VCT test ever made before? */
+ if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_TEST_DONE) {
+ pVctData->VctStatus &= ~SK_PNMI_VCT_NEW_VCT_DATA;
+ pVctData->VctStatus |= SK_PNMI_VCT_OLD_VCT_DATA;
+ }
+
+ /* DSP only valid in 100/1000 modes. */
+ if (pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed !=
+ SK_LSPEED_STAT_10MBPS) {
+ pVctData->VctStatus |= SK_PNMI_VCT_NEW_DSP_DATA;
+ }
+ }
+} /* CheckVctStatus */
+
+
+/*****************************************************************************
+ *
+ * SkPnmiGenIoctl - Handles new generic PNMI IOCTL, calls the needed
+ * PNMI function depending on the subcommand and
+ * returns all data belonging to the complete database
+ * or OID request.
+ *
+ * Description:
+ * Looks up the requested subcommand, calls the corresponding handler
+ * function and passes all required parameters to it.
+ * The function is called by the driver. It is needed to handle the new
+ * generic PNMI IOCTL. This IOCTL is given to the driver and contains both
+ * the OID and a subcommand to decide what kind of request has to be done.
+ *
+ * Returns:
+ * SK_PNMI_ERR_OK The request was successfully performed
+ * SK_PNMI_ERR_GENERAL A general severe internal error occured
+ * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to take
+ * the data.
+ * SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown
+ * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
+ * exist (e.g. port instance 3 on a two port
+ * adapter.
+ */
+int SkPnmiGenIoctl(
+SK_AC *pAC, /* Pointer to adapter context struct */
+SK_IOC IoC, /* I/O context */
+void *pBuf, /* Buffer used for the management data transfer */
+unsigned int *pLen, /* Length of buffer */
+SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
+{
+SK_I32 Mode; /* Store value of subcommand. */
+SK_U32 Oid; /* Store value of OID. */
+int ReturnCode; /* Store return value to show status of PNMI action. */
+int HeaderLength; /* Length of desired action plus OID. */
+
+ ReturnCode = SK_PNMI_ERR_GENERAL;
+
+ SK_MEMCPY(&Mode, pBuf, sizeof(SK_I32));
+ SK_MEMCPY(&Oid, (char *) pBuf + sizeof(SK_I32), sizeof(SK_U32));
+ HeaderLength = sizeof(SK_I32) + sizeof(SK_U32);
+ *pLen = *pLen - HeaderLength;
+ SK_MEMCPY((char *) pBuf + sizeof(SK_I32), (char *) pBuf + HeaderLength, *pLen);
+
+ switch(Mode) {
+ case SK_GET_SINGLE_VAR:
+ ReturnCode = SkPnmiGetVar(pAC, IoC, Oid,
+ (char *) pBuf + sizeof(SK_I32), pLen,
+ ((SK_U32) (-1)), NetIndex);
+ SK_PNMI_STORE_U32(pBuf, ReturnCode);
+ *pLen = *pLen + sizeof(SK_I32);
+ break;
+ case SK_PRESET_SINGLE_VAR:
+ ReturnCode = SkPnmiPreSetVar(pAC, IoC, Oid,
+ (char *) pBuf + sizeof(SK_I32), pLen,
+ ((SK_U32) (-1)), NetIndex);
+ SK_PNMI_STORE_U32(pBuf, ReturnCode);
+ *pLen = *pLen + sizeof(SK_I32);
+ break;
+ case SK_SET_SINGLE_VAR:
+ ReturnCode = SkPnmiSetVar(pAC, IoC, Oid,
+ (char *) pBuf + sizeof(SK_I32), pLen,
+ ((SK_U32) (-1)), NetIndex);
+ SK_PNMI_STORE_U32(pBuf, ReturnCode);
+ *pLen = *pLen + sizeof(SK_I32);
+ break;
+ case SK_GET_FULL_MIB:
+ ReturnCode = SkPnmiGetStruct(pAC, IoC, pBuf, pLen, NetIndex);
+ break;
+ case SK_PRESET_FULL_MIB:
+ ReturnCode = SkPnmiPreSetStruct(pAC, IoC, pBuf, pLen, NetIndex);
+ break;
+ case SK_SET_FULL_MIB:
+ ReturnCode = SkPnmiSetStruct(pAC, IoC, pBuf, pLen, NetIndex);
+ break;
+ default:
+ break;
+ }
+
+ return (ReturnCode);
+
+} /* SkGeIocGen */
diff -Nru a/drivers/net/sk98lin/skgesirq.c b/drivers/net/sk98lin/skgesirq.c
--- a/drivers/net/sk98lin/skgesirq.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/sk98lin/skgesirq.c Sun Aug 3 13:14:44 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skgesirq.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.65 $
- * Date: $Date: 2001/02/23 13:41:51 $
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.91 $
+ * Date: $Date: 2003/07/04 12:46:22 $
* Purpose: Special IRQ module
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2000 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,143 @@
* History:
*
* $Log: skgesirq.c,v $
+ * Revision 1.91 2003/07/04 12:46:22 rschmidt
+ * Added debug messages in SkGePortCheckUpGmac().
+ * Added error log message and new driver event SK_DRV_DOWNSHIFT_DET
+ * for Downshift detection (Yukon-Copper).
+ * Editorial changes.
+ *
+ * Revision 1.90 2003/05/28 15:35:45 rschmidt
+ * Added parameter AutoNeg in all SkGePortCheckUp...() to save code.
+ * Added setting for AutoNeg only once in SkGePortCheckUp().
+ * Moved defines for return codes of SkGePortCheckUp() to header file.
+ * Editorial changes.
+ *
+ * Revision 1.89 2003/05/13 17:32:20 mkarl
+ * Removed links to RLMT and PNMI for SLIM driver (SK_SLIM).
+ * Separated GENESIS and YUKON only code to reduce code size.
+ *
+ * Revision 1.88 2003/05/06 13:20:34 rschmidt
+ * Changed workaround for Tx hang in half duplex only for Genesis.
+ * Replaced SkPnmiGetVar() calls for Tx Octets Counter
+ * with SkXmMacStatistic() in SkGeSirqIsr().
+ * Added defines around GENESIS resp. YUKON branches to reduce
+ * code size for PXE.
+ * Editorial changes.
+ *
+ * Revision 1.87 2003/04/28 09:18:31 rschmidt
+ * Added increment for GITimeStampCnt (high dword for
+ * Time Stamp Timer counter), when overflow IRQ occurs.
+ * Disabled HW Error IRQ on 32-bit Yukon if sensor IRQ occurs
+ * by changing the common mask stored in GIValIrqMask.
+ * Changed handling for HW Error IRQ in SkGeSirqIsr().
+ * Added clearing of the software forced IRQ in SkGeSirqIsr().
+ * Editorial changes.
+ *
+ * Revision 1.86 2003/04/09 13:03:24 rschmidt
+ * Added workaround for configuration of GPHY's Auto-negotiation
+ * advertisement register after link down event in SkPhyIsrGmac().
+ *
+ * Revision 1.85 2003/04/08 16:39:02 rschmidt
+ * Changed handling for different PhyTypes for source code
+ * portability to PXE, UNDI.
+ * Editorial changes.
+ *
+ * Revision 1.84 2003/03/31 07:01:43 mkarl
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.83 2003/02/05 15:10:59 rschmidt
+ * Fixed setting of PLinkSpeedUsed in SkHWLinkUp() when
+ * auto-negotiation is disabled.
+ * Editorial changes.
+ *
+ * Revision 1.82 2003/01/29 13:34:33 rschmidt
+ * Added some typecasts to avoid compiler warnings.
+ *
+ * Revision 1.81 2002/12/05 10:49:51 rschmidt
+ * Fixed missing Link Down Event for fiber (Bug Id #10768)
+ * Added reading of cable length when link is up
+ * Removed testing of unused error bits in PHY ISR
+ * Editorial changes.
+ *
+ * Revision 1.80 2002/11/12 17:15:21 rschmidt
+ * Replaced SkPnmiGetVar() by ...MacStatistic() in SkMacParity().
+ * Editorial changes.
+ *
+ * Revision 1.79 2002/10/14 15:14:51 rschmidt
+ * Changed clearing of IS_M1_PAR_ERR (MAC 1 Parity Error) in
+ * SkMacParity() depending on GIChipRev (HW-Bug #8).
+ * Added error messages for GPHY Auto-Negotiation Error and
+ * FIFO Overflow/Underrun in SkPhyIsrGmac().
+ * Editorial changes.
+ *
+ * Revision 1.78 2002/10/10 15:54:29 mkarl
+ * changes for PLinkSpeedUsed
+ *
+ * Revision 1.77 2002/09/12 08:58:51 rwahl
+ * Retrieve counters needed for XMAC errata workarounds directly because
+ * PNMI returns corrected counter values (e.g. #10620).
+ *
+ * Revision 1.76 2002/08/16 15:21:54 rschmidt
+ * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
+ * Replaced wrong 1st para pAC with IoC in SK_IN/OUT macros.
+ * Editorial changes.
+ *
+ * Revision 1.75 2002/08/12 13:50:47 rschmidt
+ * Changed clearing of IS_M1_PAR_ERR (MAC 1 Parity Error) in
+ * SkMacParity() by GMF_CLI_TX_FC instead of GMF_CLI_TX_PE (HW-Bug #8).
+ * Added clearing of IS_IRQ_TIST_OV and IS_IRQ_SENSOR in SkGeHwErr().
+ * Corrected handling of Link Up and Auto-Negotiation Over for GPHY.
+ * in SkGePortCheckUpGmac().
+ * Editorial changes.
+ *
+ * Revision 1.74 2002/08/08 16:17:04 rschmidt
+ * Added PhyType check for SK_HWEV_SET_ROLE event (copper only)
+ * Changed Link Up check reading PHY Specific Status (YUKON)
+ * Editorial changes
+ *
+ * Revision 1.73 2002/07/15 18:36:53 rwahl
+ * Editorial changes.
+ *
+ * Revision 1.72 2002/07/15 15:46:26 rschmidt
+ * Added new event: SK_HWEV_SET_SPEED
+ * Editorial changes
+ *
+ * Revision 1.71 2002/06/10 09:34:19 rschmidt
+ * Editorial changes
+ *
+ * Revision 1.70 2002/06/05 08:29:18 rschmidt
+ * SkXmRxTxEnable() replaced by SkMacRxTxEnable().
+ * Editorial changes.
+ *
+ * Revision 1.69 2002/04/25 13:03:49 rschmidt
+ * Changes for handling YUKON.
+ * Use of #ifdef OTHER_PHY to eliminate code for unused Phy types.
+ * Replaced all XMAC-access macros by functions: SkMacRxTxDisable(),
+ * SkMacIrqDisable().
+ * Added handling for GMAC FIFO in SkMacParity().
+ * Replaced all SkXm...() functions with SkMac...() to handle also
+ * YUKON's GMAC.
+ * Macros for XMAC PHY access PHY_READ(), PHY_WRITE() replaced
+ * by functions SkXmPhyRead(), SkXmPhyWrite().
+ * Disabling all PHY interrupts moved to SkMacIrqDisable().
+ * Added handling for GPHY IRQ in SkGeSirqIsr().
+ * Removed status parameter from MAC IRQ handler SkMacIrq().
+ * Added SkGePortCheckUpGmac(), SkPhyIsrGmac() for GMAC.
+ * Editorial changes
+ *
+ * Revision 1.68 2002/02/26 15:24:53 rwahl
+ * Fix: no link with manual configuration (#10673). The previous fix for
+ * #10639 was removed. So for RLMT mode = CLS the RLMT may switch to
+ * misconfigured port. It should not occur for the other RLMT modes.
+ *
+ * Revision 1.67 2001/11/20 09:19:58 rwahl
+ * Reworked bugfix #10639 (no dependency to RLMT mode).
+ *
+ * Revision 1.66 2001/10/26 07:52:53 afischer
+ * Port switching bug in `check local link` mode
+ *
* Revision 1.65 2001/02/23 13:41:51 gklug
* fix: PHYS2INST should be used correctly for Dual Net operation
* chg: do no longer work with older PNMI
@@ -49,7 +187,7 @@
* Added workaround for half duplex hangup.
*
* Revision 1.58 2000/09/28 13:06:04 gklug
- * fix: BCOM may NOT be touched if XMAC is in RESET state
+ * fix: BCom may NOT be touched if XMAC is in RESET state
*
* Revision 1.57 2000/09/08 12:38:39 cgoos
* Added forgotten variable declaration.
@@ -254,50 +392,64 @@
*
* In the ISR of the driver the bits for frame transmission complete and
* for receive complete are checked and handled by the driver itself.
- * The bits of the slow path mask are checked after this and then the
- * entry into the so-called "slow path" is prepared. It is an implemetors
+ * The bits of the slow path mask are checked after that and then the
+ * entry into the so-called "slow path" is prepared. It is an implementors
* decision whether this is executed directly or just scheduled by
- * disabling the mask. In the interrupt service routine events may be
+ * disabling the mask. In the interrupt service routine some events may be
* generated, so it would be a good idea to call the EventDispatcher
* right after this ISR.
*
- * The Interrupt service register of the adapter is NOT read by this
- * module. SO if the drivers implemetor needs a while loop around the
- * slow data paths Interrupt bits, he needs to call the SkGeIsr() for
+ * The Interrupt source register of the adapter is NOT read by this module.
+ * SO if the drivers implementor needs a while loop around the
+ * slow data paths interrupt bits, he needs to call the SkGeSirqIsr() for
* each loop entered.
*
- * However, the XMAC Interrupt status registers are read in a while loop.
+ * However, the MAC Interrupt status registers are read in a while loop.
*
*/
-
+
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
- "$Id: skgesirq.c,v 1.65 2001/02/23 13:41:51 gklug Exp $" ;
+ "@(#) $Id: skgesirq.c,v 1.91 2003/07/04 12:46:22 rschmidt Exp $ (C) Marvell.";
+#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
+#ifndef SK_SLIM
#include "h/skgepnmi.h" /* PNMI Definitions */
#include "h/skrlmt.h" /* RLMT Definitions */
-#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
+#endif
+#include "h/skdrv2nd.h" /* Adapter Control and Driver specific Def. */
/* local function prototypes */
-static int SkGePortCheckUpXmac(SK_AC*, SK_IOC, int);
-static int SkGePortCheckUpBcom(SK_AC*, SK_IOC, int);
-static int SkGePortCheckUpLone(SK_AC*, SK_IOC, int);
-static int SkGePortCheckUpNat(SK_AC*, SK_IOC, int);
+#ifdef GENESIS
+static int SkGePortCheckUpXmac(SK_AC*, SK_IOC, int, SK_BOOL);
+static int SkGePortCheckUpBcom(SK_AC*, SK_IOC, int, SK_BOOL);
static void SkPhyIsrBcom(SK_AC*, SK_IOC, int, SK_U16);
+#endif /* GENESIS */
+#ifdef YUKON
+static int SkGePortCheckUpGmac(SK_AC*, SK_IOC, int, SK_BOOL);
+static void SkPhyIsrGmac(SK_AC*, SK_IOC, int, SK_U16);
+#endif /* YUKON */
+#ifdef OTHER_PHY
+static int SkGePortCheckUpLone(SK_AC*, SK_IOC, int, SK_BOOL);
+static int SkGePortCheckUpNat(SK_AC*, SK_IOC, int, SK_BOOL);
static void SkPhyIsrLone(SK_AC*, SK_IOC, int, SK_U16);
+#endif /* OTHER_PHY */
+#ifdef GENESIS
/*
- * Define an array of RX counter which are checked
- * in AutoSense mode to check whether a link is not able to autonegotiate.
+ * array of Rx counter from XMAC which are checked
+ * in AutoSense mode to check whether a link is not able to auto-negotiate.
*/
-static const SK_U32 SkGeRxOids[]= {
- OID_SKGE_STAT_RX_64,
- OID_SKGE_STAT_RX_127,
- OID_SKGE_STAT_RX_255,
- OID_SKGE_STAT_RX_511,
- OID_SKGE_STAT_RX_1023,
- OID_SKGE_STAT_RX_MAX,
+static const SK_U16 SkGeRxRegs[]= {
+ XM_RXF_64B,
+ XM_RXF_127B,
+ XM_RXF_255B,
+ XM_RXF_511B,
+ XM_RXF_1023B,
+ XM_RXF_MAX_SZ
} ;
+#endif /* GENESIS */
#ifdef __C2MAN__
/*
@@ -310,27 +462,20 @@
{}
#endif
-/* Define return codes of SkGePortCheckUp and CheckShort. */
-#define SK_HW_PS_NONE 0 /* No action needed */
-#define SK_HW_PS_RESTART 1 /* Restart needed */
-#define SK_HW_PS_LINK 2 /* Link Up actions needed */
-
/******************************************************************************
*
* SkHWInitDefSense() - Default Autosensing mode initialization
*
- * Description:
- * This function handles the Hardware link down signal
- *
- * Note:
+ * Description: sets the PLinkMode for HWInit
*
+ * Returns: N/A
*/
-void SkHWInitDefSense(
+static void SkHWInitDefSense(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
- SK_GEPORT *pPrt;
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
pPrt = &pAC->GIni.GP[Port];
@@ -343,8 +488,7 @@
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("AutoSensing: First mode %d on Port %d\n",
- (int)SK_LMODE_AUTOFULL,
- Port));
+ (int)SK_LMODE_AUTOFULL, Port));
pPrt->PLinkMode = SK_LMODE_AUTOFULL;
@@ -352,39 +496,39 @@
} /* SkHWInitDefSense */
+#ifdef GENESIS
/******************************************************************************
*
- * SkHWSenseGetNext() - GetNextAutosensing Mode
+ * SkHWSenseGetNext() - Get Next Autosensing Mode
*
- * Description:
- * This function handles the AutoSensing
+ * Description: gets the appropriate next mode
*
* Note:
*
*/
-SK_U8 SkHWSenseGetNext(
+static SK_U8 SkHWSenseGetNext(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
- SK_GEPORT *pPrt;
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
pPrt = &pAC->GIni.GP[Port];
pPrt->PAutoNegTimeOut = 0;
- if (pPrt->PLinkModeConf != SK_LMODE_AUTOSENSE) {
+ if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
/* Leave all as configured */
- return (pPrt->PLinkModeConf);
+ return(pPrt->PLinkModeConf);
}
- if (pPrt->PLinkMode == SK_LMODE_AUTOFULL) {
+ if (pPrt->PLinkMode == (SK_U8)SK_LMODE_AUTOFULL) {
/* Return next mode AUTOBOTH */
- return (SK_LMODE_AUTOBOTH);
+ return ((SK_U8)SK_LMODE_AUTOBOTH);
}
/* Return default autofull */
- return (SK_LMODE_AUTOFULL);
+ return ((SK_U8)SK_LMODE_AUTOFULL);
} /* SkHWSenseGetNext */
@@ -392,113 +536,86 @@
*
* SkHWSenseSetNext() - Autosensing Set next mode
*
- * Description:
- * This function sets the appropriate next mode.
- *
- * Note:
+ * Description: sets the appropriate next mode
*
+ * Returns: N/A
*/
-void SkHWSenseSetNext(
+static void SkHWSenseSetNext(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
+int Port, /* Port Index (MAC_1 + n) */
SK_U8 NewMode) /* New Mode to be written in sense mode */
{
- SK_GEPORT *pPrt;
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
pPrt = &pAC->GIni.GP[Port];
pPrt->PAutoNegTimeOut = 0;
- if (pPrt->PLinkModeConf != SK_LMODE_AUTOSENSE) {
+ if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
return;
}
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("AutoSensing: next mode %d on Port %d\n", (int)NewMode, Port));
+ ("AutoSensing: next mode %d on Port %d\n",
+ (int)NewMode, Port));
+
pPrt->PLinkMode = NewMode;
return;
} /* SkHWSenseSetNext */
+#endif /* GENESIS */
/******************************************************************************
*
* SkHWLinkDown() - Link Down handling
*
- * Description:
- * This function handles the Hardware link down signal
- *
- * Note:
+ * Description: handles the hardware link down signal
*
+ * Returns: N/A
*/
-void SkHWLinkDown(
+void SkHWLinkDown(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
- SK_GEPORT *pPrt;
- SK_U16 Word;
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
pPrt = &pAC->GIni.GP[Port];
- /* Disable all XMAC interrupts. */
- XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
+ /* Disable all MAC interrupts */
+ SkMacIrqDisable(pAC, IoC, Port);
- /* Disable Receiver and Transmitter. */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
+ /* Disable Receiver and Transmitter */
+ SkMacRxTxDisable(pAC, IoC, Port);
- /* Disable all PHY interrupts. */
- switch (pPrt->PhyType) {
- case SK_PHY_BCOM:
- /* Make sure that PHY is initialized. */
- if (pAC->GIni.GP[Port].PState) {
- /* NOT allowed if BCOM is in RESET state */
- /* Workaround BCOM Errata (#10523) all BCom. */
- /* Disable Power Management if link is down. */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL, &Word);
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL,
- Word | PHY_B_AC_DIS_PM);
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_INT_MASK, 0xffff);
- }
- break;
- case SK_PHY_LONE:
- PHY_WRITE(IoC, pPrt, Port, PHY_LONE_INT_ENAB, 0x0);
- break;
- case SK_PHY_NAT:
- /* todo: National
- PHY_WRITE(IoC, pPrt, Port, PHY_NAT_INT_MASK, 0xffff); */
- break;
- }
-
- /* Init default sense mode. */
+ /* Init default sense mode */
SkHWInitDefSense(pAC, IoC, Port);
- if (!pPrt->PHWLinkUp) {
+ if (pPrt->PHWLinkUp == SK_FALSE) {
return;
- }
+ }
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_IRQ,
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Link down Port %d\n", Port));
- /* Set Link to DOWN. */
+ /* Set Link to DOWN */
pPrt->PHWLinkUp = SK_FALSE;
/* Reset Port stati */
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
+ pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
+ pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_INDETERMINATED;
- /*
- * Reinit Phy especially when the AutoSense default is set now.
- */
- SkXmInitPhy(pAC, IoC, Port, SK_FALSE);
+ /* Re-init Phy especially when the AutoSense default is set now */
+ SkMacInitPhy(pAC, IoC, Port, SK_FALSE);
- /* GP0: used for workaround of Rev. C Errata 2. */
+ /* GP0: used for workaround of Rev. C Errata 2 */
- /* Do NOT signal to RLMT. */
+ /* Do NOT signal to RLMT */
- /* Do NOT start the timer here. */
+ /* Do NOT start the timer here */
} /* SkHWLinkDown */
@@ -506,85 +623,112 @@
*
* SkHWLinkUp() - Link Up handling
*
- * Description:
- * This function handles the Hardware link up signal
- *
- * Note:
+ * Description: handles the hardware link up signal
*
+ * Returns: N/A
*/
-void SkHWLinkUp(
+void SkHWLinkUp(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
- SK_GEPORT *pPrt;
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
pPrt = &pAC->GIni.GP[Port];
if (pPrt->PHWLinkUp) {
/* We do NOT need to proceed on active link */
return;
- }
+ }
pPrt->PHWLinkUp = SK_TRUE;
pPrt->PAutoNegFail = SK_FALSE;
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
-
- if (pPrt->PLinkMode != SK_LMODE_AUTOHALF &&
- pPrt->PLinkMode != SK_LMODE_AUTOFULL &&
- pPrt->PLinkMode != SK_LMODE_AUTOBOTH) {
- /* Link is up and no Autonegotiation should be done */
+ pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
- /* Configure Port */
+ if (pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOHALF &&
+ pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOFULL &&
+ pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOBOTH) {
+ /* Link is up and no Auto-negotiation should be done */
+
+ /* Link speed should be the configured one */
+ switch (pPrt->PLinkSpeed) {
+ case SK_LSPEED_AUTO:
+ /* default is 1000 Mbps */
+ case SK_LSPEED_1000MBPS:
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
+ break;
+ case SK_LSPEED_100MBPS:
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_100MBPS;
+ break;
+ case SK_LSPEED_10MBPS:
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_10MBPS;
+ break;
+ }
- /* Set Link Mode */
+ /* Set Link Mode Status */
if (pPrt->PLinkMode == SK_LMODE_FULL) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_FULL;
}
else {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_HALF;
+ pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_HALF;
}
- /* No flow control without autonegotiation */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
+ /* No flow control without auto-negotiation */
+ pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
- /* RX/TX enable */
- SkXmRxTxEnable(pAC, IoC, Port);
+ /* enable Rx/Tx */
+ (void)SkMacRxTxEnable(pAC, IoC, Port);
}
} /* SkHWLinkUp */
/******************************************************************************
*
- * SkMacParity - does everything to handle MAC parity errors correctly
+ * SkMacParity() - MAC parity workaround
*
+ * Description: handles MAC parity errors correctly
+ *
+ * Returns: N/A
*/
-static void SkMacParity(
+static void SkMacParity(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* Port Index of the port failed */
+int Port) /* Port Index of the port failed */
{
SK_EVPARA Para;
SK_GEPORT *pPrt; /* GIni Port struct pointer */
- SK_U64 TxMax; /* TxMax Counter */
- unsigned Len;
+ SK_U32 TxMax; /* Tx Max Size Counter */
pPrt = &pAC->GIni.GP[Port];
- /* Clear IRQ */
- SK_OUT16(IoC, MR_ADDR(Port,TX_MFF_CTRL1), MFF_CLR_PERR);
+ /* Clear IRQ Tx Parity Error */
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_PERR);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* HW-Bug #8: cleared by GMF_CLI_TX_FC instead of GMF_CLI_TX_PE */
+ SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T),
+ (SK_U8)((pAC->GIni.GIChipId == CHIP_ID_YUKON &&
+ pAC->GIni.GIChipRev == 0) ? GMF_CLI_TX_FC : GMF_CLI_TX_PE));
+ }
+#endif /* YUKON */
+
if (pPrt->PCheckPar) {
+
if (Port == MAC_1) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E016,
- SKERR_SIRQ_E016MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E016, SKERR_SIRQ_E016MSG);
}
else {
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E017,
- SKERR_SIRQ_E017MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E017, SKERR_SIRQ_E017MSG);
}
Para.Para64 = Port;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
+
Para.Para32[0] = Port;
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
@@ -592,11 +736,22 @@
}
/* Check whether frames with a size of 1k were sent */
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_MAX, (char *)&TxMax,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* Snap statistic counters */
+ (void)SkXmUpdateStats(pAC, IoC, Port);
+
+ (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXF_MAX_SZ, &TxMax);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ (void)SkGmMacStatistic(pAC, IoC, Port, GM_TXF_1518B, &TxMax);
+ }
+#endif /* YUKON */
+
if (TxMax > 0) {
/* From now on check the parity */
pPrt->PCheckPar = SK_TRUE;
@@ -606,13 +761,13 @@
/******************************************************************************
*
- * Hardware Error service routine
+ * SkGeHwErr() - Hardware Error service routine
*
- * Description:
+ * Description: handles all HW Error interrupts
*
- * Notes:
+ * Returns: N/A
*/
-static void SkGeHwErr(
+static void SkGeHwErr(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
SK_U32 HwStatus) /* Interrupt status word */
@@ -620,88 +775,118 @@
SK_EVPARA Para;
SK_U16 Word;
- if ((HwStatus & IS_IRQ_MST_ERR) || (HwStatus & IS_IRQ_STAT)) {
- if (HwStatus & IS_IRQ_STAT) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E013, SKERR_SIRQ_E013MSG);
+ if ((HwStatus & (IS_IRQ_MST_ERR | IS_IRQ_STAT)) != 0) {
+ /* PCI Errors occured */
+ if ((HwStatus & IS_IRQ_STAT) != 0) {
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E013, SKERR_SIRQ_E013MSG);
}
else {
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E012, SKERR_SIRQ_E012MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E012, SKERR_SIRQ_E012MSG);
}
/* Reset all bits in the PCI STATUS register */
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
- SK_OUT16(IoC, PCI_C(PCI_STATUS), Word | PCI_ERRBITS);
+
+ SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+ SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Para.Para64 = 0;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
}
- if (HwStatus & IS_NO_STAT_M1) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_1,RX_MFF_CTRL1), MFF_CLR_INSTAT);
- }
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
- if (HwStatus & IS_NO_STAT_M2) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_2,RX_MFF_CTRL1), MFF_CLR_INSTAT);
- }
+ if ((HwStatus & IS_NO_STAT_M1) != 0) {
+ /* Ignore it */
+ /* This situation is also indicated in the descriptor */
+ SK_OUT16(IoC, MR_ADDR(MAC_1, RX_MFF_CTRL1), MFF_CLR_INSTAT);
+ }
- if (HwStatus & IS_NO_TIST_M1) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_1,RX_MFF_CTRL1), MFF_CLR_INTIST);
- }
+ if ((HwStatus & IS_NO_STAT_M2) != 0) {
+ /* Ignore it */
+ /* This situation is also indicated in the descriptor */
+ SK_OUT16(IoC, MR_ADDR(MAC_2, RX_MFF_CTRL1), MFF_CLR_INSTAT);
+ }
- if (HwStatus & IS_NO_TIST_M2) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_2,RX_MFF_CTRL1), MFF_CLR_INTIST);
+ if ((HwStatus & IS_NO_TIST_M1) != 0) {
+ /* Ignore it */
+ /* This situation is also indicated in the descriptor */
+ SK_OUT16(IoC, MR_ADDR(MAC_1, RX_MFF_CTRL1), MFF_CLR_INTIST);
+ }
+
+ if ((HwStatus & IS_NO_TIST_M2) != 0) {
+ /* Ignore it */
+ /* This situation is also indicated in the descriptor */
+ SK_OUT16(IoC, MR_ADDR(MAC_2, RX_MFF_CTRL1), MFF_CLR_INTIST);
+ }
}
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* This is necessary only for Rx timing measurements */
+ if ((HwStatus & IS_IRQ_TIST_OV) != 0) {
+ /* increment Time Stamp Timer counter (high) */
+ pAC->GIni.GITimeStampCnt++;
+
+ /* Clear Time Stamp Timer IRQ */
+ SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8)GMT_ST_CLR_IRQ);
+ }
+
+ if ((HwStatus & IS_IRQ_SENSOR) != 0) {
+ /* no sensors on 32-bit Yukon */
+ if (pAC->GIni.GIYukon32Bit) {
+ /* disable HW Error IRQ */
+ pAC->GIni.GIValIrqMask &= ~IS_HW_ERR;
+ }
+ }
+ }
+#endif /* YUKON */
- if (HwStatus & IS_RAM_RD_PAR) {
+ if ((HwStatus & IS_RAM_RD_PAR) != 0) {
SK_OUT16(IoC, B3_RI_CTRL, RI_CLR_RD_PERR);
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E014, SKERR_SIRQ_E014MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E014, SKERR_SIRQ_E014MSG);
Para.Para64 = 0;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
}
- if (HwStatus & IS_RAM_WR_PAR) {
+ if ((HwStatus & IS_RAM_WR_PAR) != 0) {
SK_OUT16(IoC, B3_RI_CTRL, RI_CLR_WR_PERR);
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E015, SKERR_SIRQ_E015MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E015, SKERR_SIRQ_E015MSG);
Para.Para64 = 0;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
}
- if (HwStatus & IS_M1_PAR_ERR) {
+ if ((HwStatus & IS_M1_PAR_ERR) != 0) {
SkMacParity(pAC, IoC, MAC_1);
}
- if (HwStatus & IS_M2_PAR_ERR) {
+ if ((HwStatus & IS_M2_PAR_ERR) != 0) {
SkMacParity(pAC, IoC, MAC_2);
}
- if (HwStatus & IS_R1_PAR_ERR) {
+ if ((HwStatus & IS_R1_PAR_ERR) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_R1_CSR, CSR_IRQ_CL_P);
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E018, SKERR_SIRQ_E018MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E018, SKERR_SIRQ_E018MSG);
Para.Para64 = MAC_1;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
+
Para.Para32[0] = MAC_1;
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- if (HwStatus & IS_R2_PAR_ERR) {
+ if ((HwStatus & IS_R2_PAR_ERR) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_R2_CSR, CSR_IRQ_CL_P);
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E019, SKERR_SIRQ_E019MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E019, SKERR_SIRQ_E019MSG);
Para.Para64 = MAC_2;
SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
+
Para.Para32[0] = MAC_2;
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
@@ -710,132 +895,155 @@
/******************************************************************************
*
- * Interrupt service routine
+ * SkGeSirqIsr() - Special Interrupt Service Routine
*
- * Description:
+ * Description: handles all non data transfer specific interrupts (slow path)
*
- * Notes:
+ * Returns: N/A
*/
-void SkGeSirqIsr(
+void SkGeSirqIsr(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
SK_U32 Istatus) /* Interrupt status word */
{
SK_EVPARA Para;
- SK_U32 RegVal32; /* Read register Value */
- SK_U16 XmIsr;
+ SK_U32 RegVal32; /* Read register value */
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
+ SK_U16 PhyInt;
+ int i;
- if (Istatus & IS_HW_ERR) {
+ if (((Istatus & IS_HW_ERR) & pAC->GIni.GIValIrqMask) != 0) {
+ /* read the HW Error Interrupt source */
SK_IN32(IoC, B0_HWE_ISRC, &RegVal32);
+
SkGeHwErr(pAC, IoC, RegVal32);
}
/*
* Packet Timeout interrupts
*/
- /* Check whether XMACs are correctly initialized */
- if ((Istatus & (IS_PA_TO_RX1 | IS_PA_TO_TX1)) &&
- !pAC->GIni.GP[MAC_1].PState) {
- /* XMAC was not initialized but Packet timeout occurred */
+ /* Check whether MACs are correctly initialized */
+ if (((Istatus & (IS_PA_TO_RX1 | IS_PA_TO_TX1)) != 0) &&
+ pAC->GIni.GP[MAC_1].PState == SK_PRT_RESET) {
+ /* MAC 1 was not initialized but Packet timeout occured */
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E004,
SKERR_SIRQ_E004MSG);
}
- if ((Istatus & (IS_PA_TO_RX2 | IS_PA_TO_TX2)) &&
- !pAC->GIni.GP[MAC_2].PState) {
- /* XMAC was not initialized but Packet timeout occurred */
+ if (((Istatus & (IS_PA_TO_RX2 | IS_PA_TO_TX2)) != 0) &&
+ pAC->GIni.GP[MAC_2].PState == SK_PRT_RESET) {
+ /* MAC 2 was not initialized but Packet timeout occured */
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E005,
SKERR_SIRQ_E005MSG);
}
- if (Istatus & IS_PA_TO_RX1) {
+ if ((Istatus & IS_PA_TO_RX1) != 0) {
/* Means network is filling us up */
SK_ERR_LOG(pAC, SK_ERRCL_HW | SK_ERRCL_INIT, SKERR_SIRQ_E002,
SKERR_SIRQ_E002MSG);
SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_RX1);
}
- if (Istatus & IS_PA_TO_RX2) {
+ if ((Istatus & IS_PA_TO_RX2) != 0) {
/* Means network is filling us up */
SK_ERR_LOG(pAC, SK_ERRCL_HW | SK_ERRCL_INIT, SKERR_SIRQ_E003,
SKERR_SIRQ_E003MSG);
SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_RX2);
}
- if (Istatus & IS_PA_TO_TX1) {
- unsigned int Len;
- SK_U64 Octets;
- SK_GEPORT *pPrt = &pAC->GIni.GP[0];
+ if ((Istatus & IS_PA_TO_TX1) != 0) {
+
+ pPrt = &pAC->GIni.GP[0];
/* May be a normal situation in a server with a slow network */
SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_TX1);
- /*
- * workaround: if in half duplex mode, check for tx hangup.
- * Read number of TX'ed bytes, wait for 10 ms, then compare
- * the number with current value. If nothing changed, we
- * assume that tx is hanging and do a FIFO flush (see event
- * routine).
- */
- if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
- !pPrt->HalfDupTimerActive) {
- /*
- * many more pack. arb. timeouts may come in between,
- * we ignore those
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /*
+ * workaround: if in half duplex mode, check for Tx hangup.
+ * Read number of TX'ed bytes, wait for 10 ms, then compare
+ * the number with current value. If nothing changed, we assume
+ * that Tx is hanging and do a FIFO flush (see event routine).
*/
- pPrt->HalfDupTimerActive = SK_TRUE;
+ if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
+ pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
+ !pPrt->HalfDupTimerActive) {
+ /*
+ * many more pack. arb. timeouts may come in between,
+ * we ignore those
+ */
+ pPrt->HalfDupTimerActive = SK_TRUE;
+#ifdef XXX
+ Len = sizeof(SK_U64);
+ SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
+ &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0),
+ pAC->Rlmt.Port[0].Net->NetNumber);
+
+ pPrt->LastOctets = Octets;
+#endif /* XXX */
+ /* Snap statistic counters */
+ (void)SkXmUpdateStats(pAC, IoC, 0);
+
+ (void)SkXmMacStatistic(pAC, IoC, 0, XM_TXO_OK_HI, &RegVal32);
+
+ pPrt->LastOctets = (SK_U64)RegVal32 << 32;
+
+ (void)SkXmMacStatistic(pAC, IoC, 0, XM_TXO_OK_LO, &RegVal32);
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *) &Octets,
- &Len, (SK_U32) SK_PNMI_PORT_PHYS2INST(pAC, 0),
- pAC->Rlmt.Port[0].Net->NetNumber);
- pPrt->LastOctets = Octets;
- Para.Para32[0] = 0;
- SkTimerStart(pAC, IoC,
- &pPrt->HalfDupChkTimer,
- SK_HALFDUP_CHK_TIME,
- SKGE_HWAC,
- SK_HWEV_HALFDUP_CHK,
- Para);
+ pPrt->LastOctets += RegVal32;
+
+ Para.Para32[0] = 0;
+ SkTimerStart(pAC, IoC, &pPrt->HalfDupChkTimer, SK_HALFDUP_CHK_TIME,
+ SKGE_HWAC, SK_HWEV_HALFDUP_CHK, Para);
+ }
}
+#endif /* GENESIS */
}
- if (Istatus & IS_PA_TO_TX2) {
- unsigned int Len;
- SK_U64 Octets;
- SK_GEPORT *pPrt = &pAC->GIni.GP[1];
+ if ((Istatus & IS_PA_TO_TX2) != 0) {
+
+ pPrt = &pAC->GIni.GP[1];
/* May be a normal situation in a server with a slow network */
SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_TX2);
- /*
- * workaround: see above
- */
- if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
- !pPrt->HalfDupTimerActive) {
- pPrt->HalfDupTimerActive = SK_TRUE;
-
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *) &Octets,
- &Len, (SK_U32) SK_PNMI_PORT_PHYS2INST(pAC, 1),
- pAC->Rlmt.Port[1].Net->NetNumber);
- pPrt->LastOctets = Octets;
- Para.Para32[0] = 1;
- SkTimerStart(pAC, IoC,
- &pPrt->HalfDupChkTimer,
- SK_HALFDUP_CHK_TIME,
- SKGE_HWAC,
- SK_HWEV_HALFDUP_CHK,
- Para);
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* workaround: see above */
+ if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
+ pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
+ !pPrt->HalfDupTimerActive) {
+ pPrt->HalfDupTimerActive = SK_TRUE;
+#ifdef XXX
+ Len = sizeof(SK_U64);
+ SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
+ &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1),
+ pAC->Rlmt.Port[1].Net->NetNumber);
+
+ pPrt->LastOctets = Octets;
+#endif /* XXX */
+ /* Snap statistic counters */
+ (void)SkXmUpdateStats(pAC, IoC, 1);
+
+ (void)SkXmMacStatistic(pAC, IoC, 1, XM_TXO_OK_HI, &RegVal32);
+
+ pPrt->LastOctets = (SK_U64)RegVal32 << 32;
+
+ (void)SkXmMacStatistic(pAC, IoC, 1, XM_TXO_OK_LO, &RegVal32);
+
+ pPrt->LastOctets += RegVal32;
+
+ Para.Para32[0] = 1;
+ SkTimerStart(pAC, IoC, &pPrt->HalfDupChkTimer, SK_HALFDUP_CHK_TIME,
+ SKGE_HWAC, SK_HWEV_HALFDUP_CHK, Para);
+ }
}
+#endif /* GENESIS */
}
- /*
- * Check interrupts of the particular queues.
- */
- if (Istatus & IS_R1_C) {
+ /* Check interrupts of the particular queues */
+ if ((Istatus & IS_R1_C) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_R1_CSR, CSR_IRQ_CL_C);
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E006,
@@ -846,7 +1054,7 @@
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- if (Istatus & IS_R2_C) {
+ if ((Istatus & IS_R2_C) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_R2_CSR, CSR_IRQ_CL_C);
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E007,
@@ -857,7 +1065,7 @@
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- if (Istatus & IS_XS1_C) {
+ if ((Istatus & IS_XS1_C) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_XS1_CSR, CSR_IRQ_CL_C);
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E008,
@@ -868,7 +1076,7 @@
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- if (Istatus & IS_XA1_C) {
+ if ((Istatus & IS_XA1_C) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_XA1_CSR, CSR_IRQ_CL_C);
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E009,
@@ -879,7 +1087,7 @@
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- if (Istatus & IS_XS2_C) {
+ if ((Istatus & IS_XS2_C) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_XS2_CSR, CSR_IRQ_CL_C);
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E010,
@@ -890,7 +1098,7 @@
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- if (Istatus & IS_XA2_C) {
+ if ((Istatus & IS_XA2_C) != 0) {
/* Clear IRQ */
SK_OUT32(IoC, B0_XA2_CSR, CSR_IRQ_CL_C);
SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E011,
@@ -901,77 +1109,83 @@
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
- /*
- * External reg interrupt.
- */
- if (Istatus & IS_EXT_REG) {
- SK_U16 PhyInt;
- SK_U16 PhyIMsk;
- int i;
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- /* Test IRQs from PHY. */
+ /* External reg interrupt */
+ if ((Istatus & IS_EXT_REG) != 0) {
+ /* Test IRQs from PHY */
for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
+
pPrt = &pAC->GIni.GP[i];
- switch (pPrt->PhyType) {
- case SK_PHY_XMAC:
- break;
- case SK_PHY_BCOM:
- if (pPrt->PState) {
- PHY_READ(IoC, pPrt, i, PHY_BCOM_INT_STAT, &PhyInt);
- PHY_READ(IoC, pPrt, i, PHY_BCOM_INT_MASK, &PhyIMsk);
-
-#ifdef xDEBUG
- if (PhyInt & PhyIMsk) {
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "SirqIsr - Stat: %x",
- (void *)PhyInt,
- (void *)NULL);
+
+ if (pPrt->PState == SK_PRT_RESET) {
+ continue;
+ }
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ switch (pPrt->PhyType) {
+
+ case SK_PHY_XMAC:
+ break;
+
+ case SK_PHY_BCOM:
+ SkXmPhyRead(pAC, IoC, i, PHY_BCOM_INT_STAT, &PhyInt);
+
+ if ((PhyInt & ~PHY_B_DEF_MSK) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("Port %d Bcom Int: 0x%04X\n",
+ i, PhyInt));
+ SkPhyIsrBcom(pAC, IoC, i, PhyInt);
}
-#endif /* DEBUG */
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ SkXmPhyRead(pAC, IoC, i, PHY_LONE_INT_STAT, &PhyInt);
- if (PhyInt & ~PhyIMsk) {
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_HWM,
- SK_DBGCAT_IRQ,
- ("Port %d Bcom Int: %x Mask: %x\n",
- i, PhyInt, PhyIMsk));
- SkPhyIsrBcom(pAC, IoC, i, PhyInt);
+ if ((PhyInt & PHY_L_DEF_MSK) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("Port %d Lone Int: %x\n",
+ i, PhyInt));
+ SkPhyIsrLone(pAC, IoC, i, PhyInt);
}
+ break;
+#endif /* OTHER_PHY */
}
- break;
- case SK_PHY_LONE:
- PHY_READ(IoC, pPrt, i, PHY_LONE_INT_STAT, &PhyInt);
- PHY_READ(IoC, pPrt, i, PHY_LONE_INT_ENAB, &PhyIMsk);
-
- if (PhyInt & PhyIMsk) {
- SK_DBG_MSG(
- pAC,
- SK_DBGMOD_HWM,
- SK_DBGCAT_IRQ,
- ("Port %d Lone Int: %x Mask: %x\n",
- i, PhyInt, PhyIMsk));
- SkPhyIsrLone(pAC, IoC, i, PhyInt);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* Read PHY Interrupt Status */
+ SkGmPhyRead(pAC, IoC, i, PHY_MARV_INT_STAT, &PhyInt);
+
+ if ((PhyInt & PHY_M_DEF_MSK) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("Port %d Marv Int: 0x%04X\n",
+ i, PhyInt));
+ SkPhyIsrGmac(pAC, IoC, i, PhyInt);
}
- break;
- case SK_PHY_NAT:
- /* todo: National */
- break;
}
+#endif /* YUKON */
}
}
- /*
- * I2C Ready interrupt
- */
- if (Istatus & IS_I2C_READY) {
+ /* I2C Ready interrupt */
+ if ((Istatus & IS_I2C_READY) != 0) {
+#ifdef SK_SLIM
+ SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
+#else
SkI2cIsr(pAC, IoC);
+#endif
+ }
+
+ /* SW forced interrupt */
+ if ((Istatus & IS_IRQ_SW) != 0) {
+ /* clear the software IRQ */
+ SK_OUT8(IoC, B0_CTST, CS_CL_SW_IRQ);
}
- if (Istatus & IS_LNK_SYNC_M1) {
+ if ((Istatus & IS_LNK_SYNC_M1) != 0) {
/*
* We do NOT need the Link Sync interrupt, because it shows
* us only a link going down.
@@ -981,56 +1195,62 @@
}
/* Check MAC after link sync counter */
- if (Istatus & IS_MAC1) {
- XM_IN16(IoC, MAC_1, XM_ISRC, &XmIsr);
- SkXmIrq(pAC, IoC, MAC_1, XmIsr);
+ if ((Istatus & IS_MAC1) != 0) {
+ /* IRQ from MAC 1 */
+ SkMacIrq(pAC, IoC, MAC_1);
}
- if (Istatus & IS_LNK_SYNC_M2) {
+ if ((Istatus & IS_LNK_SYNC_M2) != 0) {
/*
* We do NOT need the Link Sync interrupt, because it shows
* us only a link going down.
*/
/* clear interrupt */
- SK_OUT8(IoC, MR_ADDR(MAC_2,LNK_SYNC_CTRL), LED_CLR_IRQ);
+ SK_OUT8(IoC, MR_ADDR(MAC_2, LNK_SYNC_CTRL), LED_CLR_IRQ);
}
/* Check MAC after link sync counter */
- if (Istatus & IS_MAC2) {
- XM_IN16(IoC, MAC_2, XM_ISRC, &XmIsr);
- SkXmIrq(pAC, IoC, MAC_2, XmIsr);
+ if ((Istatus & IS_MAC2) != 0) {
+ /* IRQ from MAC 2 */
+ SkMacIrq(pAC, IoC, MAC_2);
}
- /*
- * Timer interrupt
- * To be served last
- */
- if (Istatus & IS_TIMINT) {
+ /* Timer interrupt (served last) */
+ if ((Istatus & IS_TIMINT) != 0) {
+ /* check for HW Errors */
+ if (((Istatus & IS_HW_ERR) & ~pAC->GIni.GIValIrqMask) != 0) {
+ /* read the HW Error Interrupt source */
+ SK_IN32(IoC, B0_HWE_ISRC, &RegVal32);
+
+ SkGeHwErr(pAC, IoC, RegVal32);
+ }
+
SkHwtIsr(pAC, IoC);
}
+
} /* SkGeSirqIsr */
+#ifdef GENESIS
/******************************************************************************
*
- * SkGePortCheckShorts - Implementing of the Workaround Errata # 2
+ * SkGePortCheckShorts() - Implementing XMAC Workaround Errata # 2
*
* return:
* 0 o.k. nothing needed
* 1 Restart needed on this port
*/
-int SkGePortCheckShorts(
+static int SkGePortCheckShorts(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* IO Context */
int Port) /* Which port should be checked */
{
- SK_U64 Shorts; /* Short Event Counter */
- SK_U64 CheckShorts; /* Check value for Short Event Counter */
- SK_U64 RxCts; /* RX Counter (packets on network) */
- SK_U64 RxTmp; /* RX temp. Counter */
- SK_U64 FcsErrCts; /* FCS Error Counter */
+ SK_U32 Shorts; /* Short Event Counter */
+ SK_U32 CheckShorts; /* Check value for Short Event Counter */
+ SK_U64 RxCts; /* Rx Counter (packets on network) */
+ SK_U32 RxTmp; /* Rx temp. Counter */
+ SK_U32 FcsErrCts; /* FCS Error Counter */
SK_GEPORT *pPrt; /* GIni Port struct pointer */
- unsigned Len;
int Rtv; /* Return value */
int i;
@@ -1039,48 +1259,37 @@
/* Default: no action */
Rtv = SK_HW_PS_NONE;
- /*
- * Extra precaution: check for short Event counter
- */
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_RX_SHORTS, (char *)&Shorts,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
+ (void)SkXmUpdateStats(pAC, IoC, Port);
+
+ /* Extra precaution: check for short Event counter */
+ (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXE_SHT_ERR, &Shorts);
/*
- * Read RX counter (packets seen on the network and not neccesarily
+ * Read Rx counters (packets seen on the network and not necessarily
* really received.
*/
- Len = sizeof(SK_U64);
RxCts = 0;
- for (i = 0; i < sizeof(SkGeRxOids)/sizeof(SK_U32); i++) {
- SkPnmiGetVar(pAC, IoC, SkGeRxOids[i], (char *)&RxTmp,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
- RxCts += RxTmp;
+ for (i = 0; i < sizeof(SkGeRxRegs)/sizeof(SkGeRxRegs[0]); i++) {
+
+ (void)SkXmMacStatistic(pAC, IoC, Port, SkGeRxRegs[i], &RxTmp);
+
+ RxCts += (SK_U64)RxTmp;
}
/* On default: check shorts against zero */
CheckShorts = 0;
- /*
- * Extra extra precaution on active links:
- */
+ /* Extra precaution on active links */
if (pPrt->PHWLinkUp) {
- /*
- * Reset Link Restart counter
- */
+ /* Reset Link Restart counter */
pPrt->PLinkResCt = 0;
pPrt->PAutoNegTOCt = 0;
/* If link is up check for 2 */
CheckShorts = 2;
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_RX_FCS,
- (char *)&FcsErrCts, &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
+ (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXF_FCS_ERR, &FcsErrCts);
if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
pPrt->PLipaAutoNeg == SK_LIPA_UNKNOWN &&
@@ -1091,13 +1300,11 @@
* manual full/half duplex mode.
*/
if (RxCts == pPrt->PPrevRx) {
- /*
- * Nothing received
- * restart link
- */
+ /* Nothing received, restart link */
pPrt->PPrevFcs = FcsErrCts;
pPrt->PPrevShorts = Shorts;
- return (SK_HW_PS_RESTART);
+
+ return(SK_HW_PS_RESTART);
}
else {
pPrt->PLipaAutoNeg = SK_LIPA_MANUAL;
@@ -1111,14 +1318,14 @@
* otherwise the Linux driver will have a problem.
*/
/*
- * We received a bunch of frames or no CRC error occurred on the
+ * We received a bunch of frames or no CRC error occured on the
* network -> ok.
*/
pPrt->PPrevRx = RxCts;
pPrt->PPrevFcs = FcsErrCts;
pPrt->PPrevShorts = Shorts;
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
}
pPrt->PPrevFcs = FcsErrCts;
@@ -1134,55 +1341,92 @@
pPrt->PPrevShorts = Shorts;
pPrt->PPrevRx = RxCts;
- return (Rtv);
-} /* SkGePortCheckShorts*/
+ return(Rtv);
+} /* SkGePortCheckShorts */
+#endif /* GENESIS */
/******************************************************************************
*
- * SkGePortCheckUp - Implementation of the Workaround for Errata #2
+ * SkGePortCheckUp() - Check if the link is up
*
* return:
* 0 o.k. nothing needed
* 1 Restart needed on this port
* 2 Link came up
*/
-int SkGePortCheckUp(
+static int SkGePortCheckUp(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* IO Context */
int Port) /* Which port should be checked */
{
- switch (pAC->GIni.GP[Port].PhyType) {
- case SK_PHY_XMAC:
- return (SkGePortCheckUpXmac(pAC, IoC, Port));
- case SK_PHY_BCOM:
- return (SkGePortCheckUpBcom(pAC, IoC, Port));
- case SK_PHY_LONE:
- return (SkGePortCheckUpLone(pAC, IoC, Port));
- case SK_PHY_NAT:
- return (SkGePortCheckUpNat(pAC, IoC, Port));
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
+ SK_BOOL AutoNeg; /* Is Auto-negotiation used ? */
+ int Rtv; /* Return value */
+
+ Rtv = SK_HW_PS_NONE;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
+ AutoNeg = SK_FALSE;
+ }
+ else {
+ AutoNeg = SK_TRUE;
+ }
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ switch (pPrt->PhyType) {
+
+ case SK_PHY_XMAC:
+ Rtv = SkGePortCheckUpXmac(pAC, IoC, Port, AutoNeg);
+ break;
+ case SK_PHY_BCOM:
+ Rtv = SkGePortCheckUpBcom(pAC, IoC, Port, AutoNeg);
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ Rtv = SkGePortCheckUpLone(pAC, IoC, Port, AutoNeg);
+ break;
+ case SK_PHY_NAT:
+ Rtv = SkGePortCheckUpNat(pAC, IoC, Port, AutoNeg);
+ break;
+#endif /* OTHER_PHY */
+ }
}
- return (SK_HW_PS_NONE);
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ Rtv = SkGePortCheckUpGmac(pAC, IoC, Port, AutoNeg);
+ }
+#endif /* YUKON */
+
+ return(Rtv);
} /* SkGePortCheckUp */
+#ifdef GENESIS
/******************************************************************************
*
- * SkGePortCheckUpXmac - Implementing of the Workaround Errata # 2
+ * SkGePortCheckUpXmac() - Implementing of the Workaround Errata # 2
*
* return:
* 0 o.k. nothing needed
* 1 Restart needed on this port
* 2 Link came up
*/
-static int SkGePortCheckUpXmac(
+static int SkGePortCheckUpXmac(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
+int Port, /* Which port should be checked */
+SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
{
- SK_U64 Shorts; /* Short Event Counter */
+ SK_U32 Shorts; /* Short Event Counter */
SK_GEPORT *pPrt; /* GIni Port struct pointer */
- unsigned Len;
int Done;
SK_U32 GpReg; /* General Purpose register value */
SK_U16 Isrc; /* Interrupt source register */
@@ -1190,55 +1434,46 @@
SK_U16 LpAb; /* Link Partner Ability */
SK_U16 ResAb; /* Resolved Ability */
SK_U16 ExtStat; /* Extended Status Register */
- SK_BOOL AutoNeg; /* Is Autonegotiation used ? */
SK_U8 NextMode; /* Next AutoSensing Mode */
pPrt = &pAC->GIni.GP[Port];
if (pPrt->PHWLinkUp) {
if (pPrt->PhyType != SK_PHY_XMAC) {
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
}
else {
- return (SkGePortCheckShorts(pAC, IoC, Port));
+ return(SkGePortCheckShorts(pAC, IoC, Port));
}
}
IsrcSum = pPrt->PIsave;
pPrt->PIsave = 0;
- /* Now wait for each port's link. */
- if (pPrt->PLinkMode == SK_LMODE_HALF ||
- pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
+ /* Now wait for each port's link */
if (pPrt->PLinkBroken) {
/* Link was broken */
- XM_IN32(IoC,Port,XM_GP_PORT, &GpReg);
+ XM_IN32(IoC, Port, XM_GP_PORT, &GpReg);
if ((GpReg & XM_GP_INP_ASS) == 0) {
/* The Link is in sync */
- XM_IN16(IoC,Port,XM_ISRC, &Isrc);
+ XM_IN16(IoC, Port, XM_ISRC, &Isrc);
IsrcSum |= Isrc;
SkXmAutoNegLipaXmac(pAC, IoC, Port, IsrcSum);
+
if ((Isrc & XM_IS_INP_ASS) == 0) {
- /* It has been in sync since last Time */
+ /* It has been in sync since last time */
/* Restart the PORT */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Link in sync Restart Port %d\n", Port));
- /* We now need to reinitialize the PrevShorts counter. */
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_RX_SHORTS, (char *)&Shorts,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
+ (void)SkXmUpdateStats(pAC, IoC, Port);
+
+ /* We now need to reinitialize the PrevShorts counter */
+ (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXE_SHT_ERR, &Shorts);
pPrt->PPrevShorts = Shorts;
- pAC->GIni.GP[Port].PLinkBroken = SK_FALSE;
+ pPrt->PLinkBroken = SK_FALSE;
/*
* Link Restart Workaround:
@@ -1248,31 +1483,34 @@
* happening we check for a maximum number
* of consecutive restart. If those happens,
* we do NOT restart the active link and
- * check whether the lionk is now o.k.
+ * check whether the link is now o.k.
*/
- pAC->GIni.GP[Port].PLinkResCt ++;
+ pPrt->PLinkResCt++;
+
pPrt->PAutoNegTimeOut = 0;
- if (pAC->GIni.GP[Port].PLinkResCt < SK_MAX_LRESTART) {
- return (SK_HW_PS_RESTART);
+ if (pPrt->PLinkResCt < SK_MAX_LRESTART) {
+ return(SK_HW_PS_RESTART);
}
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ pPrt->PLinkResCt = 0;
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Do NOT restart on Port %d %x %x\n", Port, Isrc, IsrcSum));
- pAC->GIni.GP[Port].PLinkResCt = 0;
}
else {
- pPrt->PIsave = (SK_U16)(IsrcSum & (XM_IS_AND));
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ pPrt->PIsave = (SK_U16)(IsrcSum & XM_IS_AND);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Save Sync/nosync Port %d %x %x\n", Port, Isrc, IsrcSum));
/* Do nothing more if link is broken */
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
}
}
else {
/* Do nothing more if link is broken */
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
}
}
@@ -1280,69 +1518,68 @@
/* Link was not broken, check if it is */
XM_IN16(IoC, Port, XM_ISRC, &Isrc);
IsrcSum |= Isrc;
- if ((Isrc & XM_IS_INP_ASS) == XM_IS_INP_ASS) {
+ if ((Isrc & XM_IS_INP_ASS) != 0) {
XM_IN16(IoC, Port, XM_ISRC, &Isrc);
IsrcSum |= Isrc;
- if ((Isrc & XM_IS_INP_ASS) == XM_IS_INP_ASS) {
+ if ((Isrc & XM_IS_INP_ASS) != 0) {
XM_IN16(IoC, Port, XM_ISRC, &Isrc);
IsrcSum |= Isrc;
- if ((Isrc & XM_IS_INP_ASS) == XM_IS_INP_ASS) {
+ if ((Isrc & XM_IS_INP_ASS) != 0) {
pPrt->PLinkBroken = SK_TRUE;
- /*
- * Re-Init Link partner Autoneg flag
- */
+ /* Re-Init Link partner Autoneg flag */
pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Link broken Port %d\n", Port));
- /* Cable removed-> reinit sense mode. */
- /* Init default sense mode. */
+ /* Cable removed-> reinit sense mode */
SkHWInitDefSense(pAC, IoC, Port);
- return (SK_HW_PS_RESTART);
+ return(SK_HW_PS_RESTART);
}
}
}
else {
SkXmAutoNegLipaXmac(pAC, IoC, Port, Isrc);
+
if (SkGePortCheckShorts(pAC, IoC, Port) == SK_HW_PS_RESTART) {
- return (SK_HW_PS_RESTART);
+ return(SK_HW_PS_RESTART);
}
}
}
/*
* here we usually can check whether the link is in sync and
- * autonegotiation is done.
+ * auto-negotiation is done.
*/
XM_IN32(IoC, Port, XM_GP_PORT, &GpReg);
XM_IN16(IoC, Port, XM_ISRC, &Isrc);
IsrcSum |= Isrc;
SkXmAutoNegLipaXmac(pAC, IoC, Port, IsrcSum);
+
if ((GpReg & XM_GP_INP_ASS) != 0 || (IsrcSum & XM_IS_INP_ASS) != 0) {
if ((GpReg & XM_GP_INP_ASS) == 0) {
- /* Save Autonegotiation Done interrupt only if link is in sync. */
- pPrt->PIsave = (SK_U16)(IsrcSum & (XM_IS_AND));
+ /* Save Auto-negotiation Done interrupt only if link is in sync */
+ pPrt->PIsave = (SK_U16)(IsrcSum & XM_IS_AND);
}
-#ifdef DEBUG
- if (pPrt->PIsave & (XM_IS_AND)) {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+#ifdef DEBUG
+ if ((pPrt->PIsave & XM_IS_AND) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done rescheduled Port %d\n", Port));
}
-#endif
- return (SK_HW_PS_NONE);
+#endif /* DEBUG */
+ return(SK_HW_PS_NONE);
}
if (AutoNeg) {
- if (IsrcSum & XM_IS_AND) {
+ if ((IsrcSum & XM_IS_AND) != 0) {
SkHWLinkUp(pAC, IoC, Port);
- Done = SkXmAutoNegDone(pAC,IoC,Port);
+ Done = SkMacAutoNegDone(pAC, IoC, Port);
if (Done != SK_AND_OK) {
- /* Get PHY parameters, for debuging only */
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_AUNE_LP, &LpAb);
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_RES_ABI, &ResAb);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ /* Get PHY parameters, for debugging only */
+ SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_LP, &LpAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_RES_ABI, &ResAb);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg FAIL Port %d (LpAb %x, ResAb %x)\n",
Port, LpAb, ResAb));
@@ -1354,44 +1591,30 @@
SkHWSenseSetNext(pAC, IoC, Port, NextMode);
}
- return (SK_HW_PS_RESTART);
+ return(SK_HW_PS_RESTART);
}
- else {
- /*
- * Dummy Read extended status to prevent extra link down/ups
- * (clear Page Received bit if set)
- */
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_AUNE_EXP, &ExtStat);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNeg done Port %d\n", Port));
- return (SK_HW_PS_LINK);
- }
- }
-
- /*
- * AutoNeg not done, but HW link is up. Check for timeouts
- */
- pPrt->PAutoNegTimeOut ++;
- if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
/*
- * Increase the Timeout counter.
+ * Dummy Read extended status to prevent extra link down/ups
+ * (clear Page Received bit if set)
*/
- pPrt->PAutoNegTOCt ++;
+ SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_EXP, &ExtStat);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNeg done Port %d\n", Port));
+ return(SK_HW_PS_LINK);
+ }
+
+ /* AutoNeg not done, but HW link is up. Check for timeouts */
+ pPrt->PAutoNegTimeOut++;
+ if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
+ /* Increase the Timeout counter */
+ pPrt->PAutoNegTOCt++;
- /*
- * Timeout occurred.
- * What do we need now?
- */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,
- SK_DBGCAT_IRQ,
- ("AutoNeg timeout Port %d\n",
- Port));
+ /* Timeout occured */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("AutoNeg timeout Port %d\n", Port));
if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
pPrt->PLipaAutoNeg != SK_LIPA_AUTO) {
- /*
- * Timeout occurred
- * Set Link manually up.
- */
+ /* Set Link manually up */
SkHWSenseSetNext(pAC, IoC, Port, SK_LMODE_FULL);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Set manual full duplex Port %d\n", Port));
@@ -1403,10 +1626,10 @@
/*
* This is rather complicated.
* we need to check here whether the LIPA_AUTO
- * we saw before is false alert. We saw at one
+ * we saw before is false alert. We saw at one
* switch ( SR8800) that on boot time it sends
- * just one autoneg packet and does no further
- * autonegotiation.
+ * just one auto-neg packet and does no further
+ * auto-negotiation.
* Solution: we restart the autosensing after
* a few timeouts.
*/
@@ -1415,46 +1638,48 @@
SkHWInitDefSense(pAC, IoC, Port);
}
- /*
- * Do the restart
- */
- return (SK_HW_PS_RESTART);
+ /* Do the restart */
+ return(SK_HW_PS_RESTART);
}
}
else {
- /*
- * Link is up and we don't need more.
- */
-#ifdef DEBUG
+ /* Link is up and we don't need more */
+#ifdef DEBUG
if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("ERROR: Lipa auto detected on port %d\n", Port));
}
-#endif
-
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_IRQ,
+#endif /* DEBUG */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Link sync(GP), Port %d\n", Port));
SkHWLinkUp(pAC, IoC, Port);
- return (SK_HW_PS_LINK);
+
+ /*
+ * Link sync (GP) and so assume a good connection. But if not received
+ * a bunch of frames received in a time slot (maybe broken tx cable)
+ * the port is restart.
+ */
+ return(SK_HW_PS_LINK);
}
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
} /* SkGePortCheckUpXmac */
/******************************************************************************
*
- * SkGePortCheckUpBcom - Check, if the link is up
+ * SkGePortCheckUpBcom() - Check if the link is up on Bcom PHY
*
* return:
* 0 o.k. nothing needed
* 1 Restart needed on this port
* 2 Link came up
*/
-static int SkGePortCheckUpBcom(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
+static int SkGePortCheckUpBcom(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO Context */
+int Port, /* Which port should be checked */
+SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
{
SK_GEPORT *pPrt; /* GIni Port struct pointer */
int Done;
@@ -1465,20 +1690,21 @@
#ifdef DEBUG
SK_U16 LpAb;
SK_U16 ExtStat;
-#endif /* DEBUG */
- SK_BOOL AutoNeg; /* Is Autonegotiation used ? */
+#endif /* DEBUG */
pPrt = &pAC->GIni.GP[Port];
/* Check for No HCD Link events (#10523) */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_INT_STAT, &Isrc);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &Isrc);
#ifdef xDEBUG
- if ((Isrc & ~0x1800) == 0x70) {
+ if ((Isrc & ~(PHY_B_IS_HCT | PHY_B_IS_LCT) ==
+ (PHY_B_IS_SCR_S_ER | PHY_B_IS_RRS_CHANGE | PHY_B_IS_LRS_CHANGE)) {
+
SK_U32 Stat1, Stat2, Stat3;
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_INT_MASK, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_MASK, &Stat1);
CMSMPrintString(
pAC->pConfigTable,
MSG_TYPE_RUNTIME_INFO,
@@ -1487,14 +1713,14 @@
(void *)Stat1);
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_CTRL, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Stat1);
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_STAT, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &Stat2);
Stat1 = Stat1 << 16 | Stat2;
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUNE_ADV, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, &Stat2);
Stat3 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUNE_LP, &Stat3);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &Stat3);
Stat2 = Stat2 << 16 | Stat3;
CMSMPrintString(
pAC->pConfigTable,
@@ -1504,14 +1730,14 @@
(void *)Stat2);
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUNE_EXP, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_EXP, &Stat1);
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_EXT_STAT, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_EXT_STAT, &Stat2);
Stat1 = Stat1 << 16 | Stat2;
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_1000T_CTRL, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, &Stat2);
Stat3 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_1000T_STAT, &Stat3);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &Stat3);
Stat2 = Stat2 << 16 | Stat3;
CMSMPrintString(
pAC->pConfigTable,
@@ -1521,14 +1747,14 @@
(void *)Stat2);
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
Stat1 = Stat1 << 16 | Stat2;
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUX_CTRL, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Stat2);
Stat3 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUX_STAT, &Stat3);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &Stat3);
Stat2 = Stat2 << 16 | Stat3;
CMSMPrintString(
pAC->pConfigTable,
@@ -1537,16 +1763,18 @@
(void *)Stat1,
(void *)Stat2);
}
-#endif /* DEBUG */
+#endif /* DEBUG */
if ((Isrc & (PHY_B_IS_NO_HDCL /* | PHY_B_IS_NO_HDC */)) != 0) {
/*
- * Workaround BCOM Errata:
+ * Workaround BCom Errata:
* enable and disable loopback mode if "NO HCD" occurs.
*/
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_CTRL, &Ctrl);
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_CTRL, Ctrl | PHY_CT_LOOP);
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_CTRL, Ctrl & ~PHY_CT_LOOP);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Ctrl);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL,
+ (SK_U16)(Ctrl | PHY_CT_LOOP));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL,
+ (SK_U16)(Ctrl & ~PHY_CT_LOOP));
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("No HCD Link event, Port %d\n", Port));
#ifdef xDEBUG
@@ -1556,14 +1784,14 @@
"No HCD link event, port %d.",
(void *)Port,
(void *)NULL);
-#endif /* DEBUG */
+#endif /* DEBUG */
}
/* Not obsolete: link status bit is latched to 0 and autoclearing! */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_STAT, &PhyStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
if (pPrt->PHWLinkUp) {
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
}
#ifdef xDEBUG
@@ -1571,7 +1799,7 @@
SK_U32 Stat1, Stat2, Stat3;
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_INT_MASK, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_MASK, &Stat1);
CMSMPrintString(
pAC->pConfigTable,
MSG_TYPE_RUNTIME_INFO,
@@ -1580,14 +1808,14 @@
(void *)Stat1);
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_CTRL, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Stat1);
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_STAT, &PhyStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
Stat1 = Stat1 << 16 | PhyStat;
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUNE_ADV, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, &Stat2);
Stat3 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUNE_LP, &Stat3);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &Stat3);
Stat2 = Stat2 << 16 | Stat3;
CMSMPrintString(
pAC->pConfigTable,
@@ -1597,14 +1825,14 @@
(void *)Stat2);
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUNE_EXP, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_EXP, &Stat1);
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_EXT_STAT, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_EXT_STAT, &Stat2);
Stat1 = Stat1 << 16 | Stat2;
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_1000T_CTRL, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, &Stat2);
Stat3 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_1000T_STAT, &ResAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
Stat2 = Stat2 << 16 | ResAb;
CMSMPrintString(
pAC->pConfigTable,
@@ -1614,14 +1842,14 @@
(void *)Stat2);
Stat1 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
Stat1 = Stat1 << 16 | Stat2;
Stat2 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUX_CTRL, &Stat2);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Stat2);
Stat3 = 0;
- PHY_READ(pAC, pPrt, Port, PHY_BCOM_AUX_STAT, &Stat3);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &Stat3);
Stat2 = Stat2 << 16 | Stat3;
CMSMPrintString(
pAC->pConfigTable,
@@ -1630,88 +1858,64 @@
(void *)Stat1,
(void *)Stat2);
}
-#endif /* DEBUG */
-
- /* Now wait for each port's link. */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
+#endif /* DEBUG */
/*
* Here we usually can check whether the link is in sync and
- * autonegotiation is done.
+ * auto-negotiation is done.
*/
-#if 0
-/* RA;:;: obsolete */
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
-#endif /* 0 */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_STAT, &PhyStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
-#ifdef xDEBUG
- if ((PhyStat & PHY_ST_LSYNC) >> 2 != (ExtStat & PHY_B_PES_LS) >> 8) {
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "PhyStat != ExtStat: %x %x",
- (void *)PhyStat,
- (void *)ExtStat);
- }
-#endif /* DEBUG */
-
- SkXmAutoNegLipaBcom(pAC, IoC, Port, PhyStat);
+ SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg:%d, PhyStat: %Xh.\n", AutoNeg, PhyStat));
+ ("AutoNeg: %d, PhyStat: 0x%04X\n", AutoNeg, PhyStat));
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_1000T_STAT, &ResAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
- if (ResAb & PHY_B_1000S_MSF) {
+ if ((ResAb & PHY_B_1000S_MSF) != 0) {
/* Error */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Master/Slave Fault port %d\n", Port));
+
pPrt->PAutoNegFail = SK_TRUE;
pPrt->PMSStatus = SK_MS_STAT_FAULT;
- return (SK_HW_PS_RESTART);
+
+ return(SK_HW_PS_RESTART);
}
if ((PhyStat & PHY_ST_LSYNC) == 0) {
- return (SK_HW_PS_NONE);
- }
- else if (ResAb & PHY_B_1000S_MSR) {
- pPrt->PMSStatus = SK_MS_STAT_MASTER;
- }
- else {
- pPrt->PMSStatus = SK_MS_STAT_SLAVE;
+ return(SK_HW_PS_NONE);
}
+ pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
+ SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
+
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg:%d, PhyStat: %Xh.\n", AutoNeg, PhyStat));
+ ("Port %d, ResAb: 0x%04X\n", Port, ResAb));
if (AutoNeg) {
- if (PhyStat & PHY_ST_AN_OVER) {
+ if ((PhyStat & PHY_ST_AN_OVER) != 0) {
SkHWLinkUp(pAC, IoC, Port);
- Done = SkXmAutoNegDone(pAC, IoC, Port);
+ Done = SkMacAutoNegDone(pAC, IoC, Port);
if (Done != SK_AND_OK) {
#ifdef DEBUG
- /* Get PHY parameters, for debugging only. */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUNE_LP, &LpAb);
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_1000T_STAT, &ExtStat);
+ /* Get PHY parameters, for debugging only */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &LpAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ExtStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg FAIL Port %d (LpAb %x, 1000TStat %x)\n",
Port, LpAb, ExtStat));
-#endif /* DEBUG */
- return (SK_HW_PS_RESTART);
+#endif /* DEBUG */
+ return(SK_HW_PS_RESTART);
}
else {
#ifdef xDEBUG
- /* Dummy read ISR to prevent extra link downs/ups. */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_INT_STAT, &ExtStat);
+ /* Dummy read ISR to prevent extra link downs/ups */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &ExtStat);
- if ((ExtStat & ~0x1800) != 0) {
+ if ((ExtStat & ~(PHY_B_IS_HCT | PHY_B_IS_LCT)) != 0) {
CMSMPrintString(
pAC->pConfigTable,
MSG_TYPE_RUNTIME_INFO,
@@ -1719,30 +1923,28 @@
(void *)ExtStat,
(void *)NULL);
}
-#endif /* DEBUG */
+#endif /* DEBUG */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
- return (SK_HW_PS_LINK);
+ return(SK_HW_PS_LINK);
}
- }
+ }
}
else { /* !AutoNeg */
- /*
- * Link is up and we don't need more.
- */
-#ifdef DEBUG
+ /* Link is up and we don't need more. */
+#ifdef DEBUG
if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("ERROR: Lipa auto detected on port %d\n", Port));
}
-#endif
+#endif /* DEBUG */
#ifdef xDEBUG
- /* Dummy read ISR to prevent extra link downs/ups. */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_INT_STAT, &ExtStat);
+ /* Dummy read ISR to prevent extra link downs/ups */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &ExtStat);
- if ((ExtStat & ~0x1800) != 0) {
+ if ((ExtStat & ~(PHY_B_IS_HCT | PHY_B_IS_LCT)) != 0) {
CMSMPrintString(
pAC->pConfigTable,
MSG_TYPE_RUNTIME_INFO,
@@ -1750,95 +1952,212 @@
(void *)ExtStat,
(void *)NULL);
}
-#endif /* DEBUG */
+#endif /* DEBUG */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Link sync(GP), Port %d\n", Port));
SkHWLinkUp(pAC, IoC, Port);
- return (SK_HW_PS_LINK);
+
+ return(SK_HW_PS_LINK);
}
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
} /* SkGePortCheckUpBcom */
+#endif /* GENESIS */
+#ifdef YUKON
/******************************************************************************
*
- * SkGePortCheckUpLone - Check if the link is up
+ * SkGePortCheckUpGmac() - Check if the link is up on Marvell PHY
*
* return:
* 0 o.k. nothing needed
* 1 Restart needed on this port
* 2 Link came up
*/
-static int SkGePortCheckUpLone(
+static int SkGePortCheckUpGmac(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
+int Port, /* Which port should be checked */
+SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
+{
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
+ int Done;
+ SK_U16 PhyIsrc; /* PHY Interrupt source */
+ SK_U16 PhyStat; /* PPY Status */
+ SK_U16 PhySpecStat;/* PHY Specific Status */
+ SK_U16 ResAb; /* Master/Slave resolution */
+ SK_EVPARA Para;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ /* Read PHY Interrupt Status */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &PhyIsrc);
+
+ if ((PhyIsrc & PHY_M_IS_AN_COMPL) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Auto-Negotiation Completed, PhyIsrc: 0x%04X\n", PhyIsrc));
+ }
+
+ if ((PhyIsrc & PHY_M_IS_LSP_CHANGE) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Link Speed Changed, PhyIsrc: 0x%04X\n", PhyIsrc));
+ }
+
+ if (pPrt->PHWLinkUp) {
+ return(SK_HW_PS_NONE);
+ }
+
+ /* Read PHY Status */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNeg: %d, PhyStat: 0x%04X\n", AutoNeg, PhyStat));
+
+ SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
+
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
+
+ if ((ResAb & PHY_B_1000S_MSF) != 0) {
+ /* Error */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Master/Slave Fault port %d\n", Port));
+
+ pPrt->PAutoNegFail = SK_TRUE;
+ pPrt->PMSStatus = SK_MS_STAT_FAULT;
+
+ return(SK_HW_PS_RESTART);
+ }
+
+ /* Read PHY Specific Status */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNeg: %d, PhySpecStat: 0x%04X\n", AutoNeg, PhySpecStat));
+
+ if ((PhySpecStat & PHY_M_PS_LINK_UP) == 0) {
+ return(SK_HW_PS_NONE);
+ }
+
+ if ((PhySpecStat & PHY_M_PS_DOWNS_STAT) != 0 ||
+ (PhyIsrc & PHY_M_IS_DOWNSH_DET) != 0) {
+ /* Downshift detected */
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E025, SKERR_SIRQ_E025MSG);
+
+ Para.Para64 = Port;
+ SkEventQueue(pAC, SKGE_DRV, SK_DRV_DOWNSHIFT_DET, Para);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Downshift detected, PhyIsrc: 0x%04X\n", PhyIsrc));
+ }
+
+ pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
+ SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
+
+ pPrt->PCableLen = (SK_U8)((PhySpecStat & PHY_M_PS_CABLE_MSK) >> 7);
+
+ if (AutoNeg) {
+ /* Auto-Negotiation Over ? */
+ if ((PhyStat & PHY_ST_AN_OVER) != 0) {
+
+ SkHWLinkUp(pAC, IoC, Port);
+
+ Done = SkMacAutoNegDone(pAC, IoC, Port);
+
+ if (Done != SK_AND_OK) {
+ return(SK_HW_PS_RESTART);
+ }
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNeg done Port %d\n", Port));
+ return(SK_HW_PS_LINK);
+ }
+ }
+ else { /* !AutoNeg */
+ /* Link is up and we don't need more */
+#ifdef DEBUG
+ if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("ERROR: Lipa auto detected on port %d\n", Port));
+ }
+#endif /* DEBUG */
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("Link sync, Port %d\n", Port));
+ SkHWLinkUp(pAC, IoC, Port);
+
+ return(SK_HW_PS_LINK);
+ }
+
+ return(SK_HW_PS_NONE);
+} /* SkGePortCheckUpGmac */
+#endif /* YUKON */
+
+
+#ifdef OTHER_PHY
+/******************************************************************************
+ *
+ * SkGePortCheckUpLone() - Check if the link is up on Level One PHY
+ *
+ * return:
+ * 0 o.k. nothing needed
+ * 1 Restart needed on this port
+ * 2 Link came up
+ */
+static int SkGePortCheckUpLone(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO Context */
+int Port, /* Which port should be checked */
+SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
{
SK_GEPORT *pPrt; /* GIni Port struct pointer */
- int Done;
+ int Done;
SK_U16 Isrc; /* Interrupt source register */
SK_U16 LpAb; /* Link Partner Ability */
SK_U16 ExtStat; /* Extended Status Register */
SK_U16 PhyStat; /* Phy Status Register */
SK_U16 StatSum;
- SK_BOOL AutoNeg; /* Is Autonegotiation used ? */
SK_U8 NextMode; /* Next AutoSensing Mode */
pPrt = &pAC->GIni.GP[Port];
if (pPrt->PHWLinkUp) {
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
}
StatSum = pPrt->PIsave;
pPrt->PIsave = 0;
- /* Now wait for each ports link */
- if (pPrt->PLinkMode == SK_LMODE_HALF ||
- pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
/*
* here we usually can check whether the link is in sync and
- * autonegotiation is done.
+ * auto-negotiation is done.
*/
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
- PHY_READ(IoC, pPrt, Port, PHY_LONE_STAT, &PhyStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_STAT, &PhyStat);
StatSum |= PhyStat;
- SkXmAutoNegLipaLone(pAC, IoC, Port, PhyStat);
- if ((PhyStat & PHY_ST_LSYNC) == 0){
- /*
- * Save Autonegotiation Done bit
- */
+ SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
+
+ if ((PhyStat & PHY_ST_LSYNC) == 0) {
+ /* Save Auto-negotiation Done bit */
pPrt->PIsave = (SK_U16)(StatSum & PHY_ST_AN_OVER);
#ifdef DEBUG
- if (pPrt->PIsave & PHY_ST_AN_OVER) {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ if ((pPrt->PIsave & PHY_ST_AN_OVER) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done rescheduled Port %d\n", Port));
}
-#endif
- return (SK_HW_PS_NONE);
+#endif /* DEBUG */
+ return(SK_HW_PS_NONE);
}
if (AutoNeg) {
- if (StatSum & PHY_ST_AN_OVER) {
+ if ((StatSum & PHY_ST_AN_OVER) != 0) {
SkHWLinkUp(pAC, IoC, Port);
- Done = SkXmAutoNegDone(pAC,IoC,Port);
+ Done = SkMacAutoNegDone(pAC, IoC, Port);
if (Done != SK_AND_OK) {
- /* Get PHY parameters, for debuging only */
- PHY_READ(IoC, pPrt, Port,
- PHY_LONE_AUNE_LP,
- &LpAb);
- PHY_READ(IoC, pPrt, Port,
- PHY_LONE_1000T_STAT,
- &ExtStat);
+ /* Get PHY parameters, for debugging only */
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_AUNE_LP, &LpAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_1000T_STAT, &ExtStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg FAIL Port %d (LpAb %x, 1000TStat %x)\n",
Port, LpAb, ExtStat));
@@ -1851,7 +2170,7 @@
SkHWSenseSetNext(pAC, IoC, Port, NextMode);
}
- return (SK_HW_PS_RESTART);
+ return(SK_HW_PS_RESTART);
}
else {
@@ -1859,95 +2178,81 @@
* Dummy Read interrupt status to prevent
* extra link down/ups
*/
- PHY_READ(IoC, pPrt, Port, PHY_LONE_INT_STAT, &ExtStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_INT_STAT, &ExtStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
- return (SK_HW_PS_LINK);
+ return(SK_HW_PS_LINK);
}
- }
+ }
- /*
- * AutoNeg not done, but HW link is up. Check for timeouts
- */
- pPrt->PAutoNegTimeOut ++;
+ /* AutoNeg not done, but HW link is up. Check for timeouts */
+ pPrt->PAutoNegTimeOut++;
if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
- /*
- * Timeout occurred.
- * What do we need now?
- */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,
- SK_DBGCAT_IRQ,
- ("AutoNeg timeout Port %d\n",
- Port));
+ /* Timeout occured */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("AutoNeg timeout Port %d\n", Port));
if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
pPrt->PLipaAutoNeg != SK_LIPA_AUTO) {
- /*
- * Timeout occurred
- * Set Link manually up.
- */
- SkHWSenseSetNext(pAC, IoC, Port,
- SK_LMODE_FULL);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,
- SK_DBGCAT_IRQ,
- ("Set manual full duplex Port %d\n",
- Port));
+ /* Set Link manually up */
+ SkHWSenseSetNext(pAC, IoC, Port, SK_LMODE_FULL);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("Set manual full duplex Port %d\n", Port));
}
- /*
- * Do the restart
- */
- return (SK_HW_PS_RESTART);
+ /* Do the restart */
+ return(SK_HW_PS_RESTART);
}
}
else {
- /*
- * Link is up and we don't need more.
- */
-#ifdef DEBUG
+ /* Link is up and we don't need more */
+#ifdef DEBUG
if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("ERROR: Lipa auto detected on port %d\n", Port));
}
-#endif
+#endif /* DEBUG */
/*
* Dummy Read interrupt status to prevent
* extra link down/ups
*/
- PHY_READ(IoC, pPrt, Port, PHY_LONE_INT_STAT, &ExtStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_INT_STAT, &ExtStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
("Link sync(GP), Port %d\n", Port));
SkHWLinkUp(pAC, IoC, Port);
- return (SK_HW_PS_LINK);
+
+ return(SK_HW_PS_LINK);
}
- return (SK_HW_PS_NONE);
-} /* SkGePortCheckUpLone*/
+ return(SK_HW_PS_NONE);
+} /* SkGePortCheckUpLone */
/******************************************************************************
*
- * SkGePortCheckUpNat - Check if the link is up
+ * SkGePortCheckUpNat() - Check if the link is up on National PHY
*
* return:
* 0 o.k. nothing needed
* 1 Restart needed on this port
* 2 Link came up
*/
-static int SkGePortCheckUpNat(
+static int SkGePortCheckUpNat(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
+int Port, /* Which port should be checked */
+SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
{
/* todo: National */
- return (SK_HW_PS_NONE);
+ return(SK_HW_PS_NONE);
} /* SkGePortCheckUpNat */
+#endif /* OTHER_PHY */
/******************************************************************************
*
- * Event service routine
+ * SkGeSirqEvent() - Event Service Routine
*
* Description:
*
@@ -1959,29 +2264,28 @@
SK_U32 Event, /* Module specific Event */
SK_EVPARA Para) /* Event specific Parameter */
{
- SK_U64 Octets;
SK_GEPORT *pPrt; /* GIni Port struct pointer */
SK_U32 Port;
- SK_U32 Time;
- unsigned Len;
+ SK_U32 Val32;
int PortStat;
SK_U8 Val8;
+#ifdef GENESIS
+ SK_U64 Octets;
+#endif /* GENESIS */
Port = Para.Para32[0];
- pPrt = & pAC->GIni.GP[Port];
+ pPrt = &pAC->GIni.GP[Port];
switch (Event) {
case SK_HWEV_WATIM:
/* Check whether port came up */
- PortStat = SkGePortCheckUp(pAC, IoC, Port);
+ PortStat = SkGePortCheckUp(pAC, IoC, (int)Port);
switch (PortStat) {
case SK_HW_PS_RESTART:
if (pPrt->PHWLinkUp) {
- /*
- * Set Link to down.
- */
- SkHWLinkDown(pAC, IoC, Port);
+ /* Set Link to down */
+ SkHWLinkDown(pAC, IoC, (int)Port);
/*
* Signal directly to RLMT to ensure correct
@@ -1998,21 +2302,20 @@
/* Signal to RLMT */
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_UP, Para);
break;
-
}
/* Start again the check Timer */
if (pPrt->PHWLinkUp) {
- Time = SK_WA_ACT_TIME;
+ Val32 = SK_WA_ACT_TIME;
}
else {
- Time = SK_WA_INA_TIME;
+ Val32 = SK_WA_INA_TIME;
}
/* Todo: still needed for non-XMAC PHYs??? */
- /* Start workaround Errata #2 timer. */
- SkTimerStart(pAC, IoC, &pAC->GIni.GP[Port].PWaTimer,
- Time, SKGE_HWAC, SK_HWEV_WATIM, Para);
+ /* Start workaround Errata #2 timer */
+ SkTimerStart(pAC, IoC, &pPrt->PWaTimer, Val32,
+ SKGE_HWAC, SK_HWEV_WATIM, Para);
break;
case SK_HWEV_PORT_START:
@@ -2024,7 +2327,7 @@
SkRlmtEvent(pAC, IoC, SK_RLMT_LINK_DOWN, Para);
}
- SkHWLinkDown(pAC, IoC, Port);
+ SkHWLinkDown(pAC, IoC, (int)Port);
/* Schedule Port RESET */
SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
@@ -2035,7 +2338,7 @@
break;
case SK_HWEV_PORT_STOP:
- if (pAC->GIni.GP[Port].PHWLinkUp) {
+ if (pPrt->PHWLinkUp) {
/*
* Signal directly to RLMT to ensure correct
* sequence of SWITCH and RESET event.
@@ -2046,7 +2349,7 @@
/* Stop Workaround Timer */
SkTimerStop(pAC, IoC, &pPrt->PWaTimer);
- SkHWLinkDown(pAC, IoC, Port);
+ SkHWLinkDown(pAC, IoC, (int)Port);
break;
case SK_HWEV_UPDATE_STAT:
@@ -2087,9 +2390,13 @@
break;
case SK_HWEV_SET_ROLE:
+ /* not possible for fiber */
+ if (!pAC->GIni.GICopperType) {
+ break;
+ }
Val8 = (SK_U8)Para.Para32[1];
if (pPrt->PMSMode != Val8) {
- /* Set New link mode */
+ /* Set New Role (Master/Slave) mode */
pPrt->PMSMode = Val8;
/* Restart Port */
@@ -2098,38 +2405,72 @@
}
break;
+ case SK_HWEV_SET_SPEED:
+ if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
+ break;
+ }
+ Val8 = (SK_U8)Para.Para32[1];
+ if (pPrt->PLinkSpeed != Val8) {
+ /* Set New Speed parameter */
+ pPrt->PLinkSpeed = Val8;
+
+ /* Restart Port */
+ SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_STOP, Para);
+ SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_START, Para);
+ }
+ break;
+
+#ifdef GENESIS
case SK_HWEV_HALFDUP_CHK:
- /*
- * half duplex hangup workaround. See packet arbiter timeout
- * interrupt for description
- */
- pPrt->HalfDupTimerActive = SK_FALSE;
- if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
- if (pPrt->LastOctets == Octets) {
- /* TX hanging, do a FIFO flush restarts it. */
- SkXmFlushTxFifo(pAC, IoC, Port);
+ if (pAC->GIni.GIGenesis) {
+ /*
+ * half duplex hangup workaround.
+ * See packet arbiter timeout interrupt for description
+ */
+ pPrt->HalfDupTimerActive = SK_FALSE;
+ if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
+ pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
+#ifdef XXX
+ Len = sizeof(SK_U64);
+ SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
+ &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
+ pAC->Rlmt.Port[Port].Net->NetNumber);
+#endif /* XXX */
+ /* Snap statistic counters */
+ (void)SkXmUpdateStats(pAC, IoC, Port);
+
+ (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXO_OK_HI, &Val32);
+
+ Octets = (SK_U64)Val32 << 32;
+
+ (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXO_OK_LO, &Val32);
+
+ Octets += Val32;
+
+ if (pPrt->LastOctets == Octets) {
+ /* Tx hanging, a FIFO flush restarts it */
+ SkMacFlushTxFifo(pAC, IoC, Port);
+ }
}
}
break;
+#endif /* GENESIS */
+
default:
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_SIRQ_E001, SKERR_SIRQ_E001MSG);
break;
}
- return (0);
+ return(0);
} /* SkGeSirqEvent */
+#ifdef GENESIS
/******************************************************************************
*
- * SkPhyIsrBcom - PHY interrupt service routine
+ * SkPhyIsrBcom() - PHY interrupt service routine
*
- * Description: handle all interrupts from BCOM PHY
+ * Description: handles all interrupts from BCom PHY
*
* Returns: N/A
*/
@@ -2144,79 +2485,91 @@
pPrt = &pAC->GIni.GP[Port];
- if (IStatus & PHY_B_IS_PSE) {
- /* Incorrectable pair swap error. */
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E022,
+ if ((IStatus & PHY_B_IS_PSE) != 0) {
+ /* Incorrectable pair swap error */
+ SK_ERR_LOG(pAC, SK_ERRCL_HW | SK_ERRCL_INIT, SKERR_SIRQ_E022,
SKERR_SIRQ_E022MSG);
}
- if (IStatus & PHY_B_IS_MDXI_SC) {
- /* not used */
- }
-
- if (IStatus & PHY_B_IS_HCT) {
- /* not used */
- }
-
- if (IStatus & PHY_B_IS_LCT) {
- /* not used */
- }
-
- if (IStatus & (PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE)) {
- Para.Para32[0] = (SK_U32)Port;
+ if ((IStatus & (PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE)) != 0) {
SkHWLinkDown(pAC, IoC, Port);
+ Para.Para32[0] = (SK_U32)Port;
/* Signal to RLMT */
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
/* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pPrt->PWaTimer,
- SK_WA_INA_TIME, SKGE_HWAC, SK_HWEV_WATIM, Para);
+ SkTimerStart(pAC, IoC, &pPrt->PWaTimer, SK_WA_INA_TIME,
+ SKGE_HWAC, SK_HWEV_WATIM, Para);
}
- if (IStatus & PHY_B_IS_NO_HDCL) {
- }
+} /* SkPhyIsrBcom */
+#endif /* GENESIS */
- if (IStatus & PHY_B_IS_NO_HDC) {
- /* not used */
- }
- if (IStatus & PHY_B_IS_NEG_USHDC) {
- /* not used */
- }
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkPhyIsrGmac() - PHY interrupt service routine
+ *
+ * Description: handles all interrupts from Marvell PHY
+ *
+ * Returns: N/A
+ */
+static void SkPhyIsrGmac(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* Io Context */
+int Port, /* Port Num = PHY Num */
+SK_U16 IStatus) /* Interrupt Status */
+{
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
+ SK_EVPARA Para;
+ SK_U16 Word;
- if (IStatus & PHY_B_IS_SCR_S_ER) {
- /* not used */
- }
+ pPrt = &pAC->GIni.GP[Port];
- if (IStatus & PHY_B_IS_RRS_CHANGE) {
- /* not used */
- }
+ if ((IStatus & (PHY_M_IS_AN_PR | PHY_M_IS_LST_CHANGE)) != 0) {
- if (IStatus & PHY_B_IS_LRS_CHANGE) {
- /* not used */
- }
+ SkHWLinkDown(pAC, IoC, Port);
- if (IStatus & PHY_B_IS_DUP_CHANGE) {
- /* not used */
- }
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &Word);
- if (IStatus & PHY_B_IS_LSP_CHANGE) {
- /* not used */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNeg.Adv: 0x%04X\n", Word));
+
+ /* Set Auto-negotiation advertisement */
+ if (pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) {
+ /* restore Asymmetric Pause bit */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV,
+ (SK_U16)(Word | PHY_M_AN_ASP));
+ }
+
+ Para.Para32[0] = (SK_U32)Port;
+ /* Signal to RLMT */
+ SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
}
-
- if (IStatus & PHY_B_IS_CRC_ER) {
- /* not used */
+
+ if ((IStatus & PHY_M_IS_AN_ERROR) != 0) {
+ /* Auto-Negotiation Error */
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E023, SKERR_SIRQ_E023MSG);
}
-} /* SkPhyIsrBcom */
+
+ if ((IStatus & PHY_M_IS_FIFO_ERROR) != 0) {
+ /* FIFO Overflow/Underrun Error */
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E024, SKERR_SIRQ_E024MSG);
+ }
+
+} /* SkPhyIsrGmac */
+#endif /* YUKON */
+#ifdef OTHER_PHY
/******************************************************************************
*
- * SkPhyIsrLone - PHY interrupt service routine
+ * SkPhyIsrLone() - PHY interrupt service routine
*
- * Description: handle all interrupts from LONE PHY
+ * Description: handles all interrupts from LONE PHY
*
* Returns: N/A
*/
@@ -2228,49 +2581,16 @@
{
SK_EVPARA Para;
- if (IStatus & PHY_L_IS_CROSS) {
- /* not used */
- }
-
- if (IStatus & PHY_L_IS_POL) {
- /* not used */
- }
-
- if (IStatus & PHY_L_IS_SS) {
- /* not used */
- }
-
- if (IStatus & PHY_L_IS_CFULL) {
- /* not used */
- }
-
- if (IStatus & PHY_L_IS_AN_C) {
- /* not used */
- }
-
- if (IStatus & PHY_L_IS_SPEED) {
- /* not used */
- }
-
- if (IStatus & PHY_L_IS_CFULL) {
- /* not used */
- }
-
if (IStatus & (PHY_L_IS_DUP | PHY_L_IS_ISOL)) {
+
SkHWLinkDown(pAC, IoC, Port);
- /* Signal to RLMT */
Para.Para32[0] = (SK_U32)Port;
+ /* Signal to RLMT */
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
-
- /* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pAC->GIni.GP[Port].PWaTimer,
- SK_WA_INA_TIME, SKGE_HWAC, SK_HWEV_WATIM, Para);
}
- if (IStatus & PHY_L_IS_MDINT) {
- /* not used */
- }
} /* SkPhyIsrLone */
+#endif /* OTHER_PHY */
/* End of File */
diff -Nru a/drivers/net/sk98lin/ski2c.c b/drivers/net/sk98lin/ski2c.c
--- a/drivers/net/sk98lin/ski2c.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/sk98lin/ski2c.c Sun Aug 3 13:14:44 2003
@@ -2,16 +2,15 @@
*
* Name: ski2c.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.47 $
- * Date: $Date: 2001/04/05 11:38:09 $
+ * Version: $Revision: 1.57 $
+ * Date: $Date: 2003/01/28 09:17:38 $
* Purpose: Functions to access Voltage and Temperature Sensor
- * (taken from Monalisa (taken from Concentrator))
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,47 @@
* History:
*
* $Log: ski2c.c,v $
+ * Revision 1.57 2003/01/28 09:17:38 rschmidt
+ * Fixed handling for sensors on YUKON Fiber.
+ * Editorial changes.
+ *
+ * Revision 1.56 2002/12/19 14:20:41 rschmidt
+ * Added debugging code in SkI2cWait().
+ * Replaced all I2C-write operations with function SkI2cWrite().
+ * Fixed compiler warning because of uninitialized 'Time' in SkI2cEvent().
+ * Editorial changes.
+ *
+ * Revision 1.55 2002/10/15 07:23:55 rschmidt
+ * Added setting of the GIYukon32Bit bool variable to distinguish
+ * 32-bit adapters.
+ * Editorial changes (TWSI).
+ *
+ * Revision 1.54 2002/08/13 09:05:06 rschmidt
+ * Added new thresholds if VAUX is not available (GIVauxAvail).
+ * Merged defines for PHY PLL 3V3 voltage (A and B).
+ * Editorial changes.
+ *
+ * Revision 1.53 2002/08/08 11:04:53 rwahl
+ * Added missing comment for revision 1.51
+ *
+ * Revision 1.52 2002/08/08 10:09:02 jschmalz
+ * Sensor init state caused wrong error log entry
+ *
+ * Revision 1.51 2002/08/06 09:43:03 jschmalz
+ * Extensions and changes for Yukon
+ *
+ * Revision 1.50 2002/08/02 12:09:22 rschmidt
+ * Added support for YUKON sensors.
+ * Editorial changes.
+ *
+ * Revision 1.49 2002/07/30 11:07:52 rschmidt
+ * Replaced MaxSens init by update for Copper in SkI2cInit1(),
+ * because it was already initialized in SkI2cInit0().
+ * Editorial changes.
+ *
+ * Revision 1.48 2001/08/16 12:44:33 afischer
+ * LM80 sensor init values corrected
+ *
* Revision 1.47 2001/04/05 11:38:09 rassmann
* Set SenState to idle in SkI2cWaitIrq().
* Changed error message in SkI2cWaitIrq().
@@ -192,7 +232,7 @@
* I2C Protocol
*/
static const char SysKonnectFileId[] =
- "$Id: ski2c.c,v 1.47 2001/04/05 11:38:09 rassmann Exp $";
+ "$Id: ski2c.c,v 1.57 2003/01/28 09:17:38 rschmidt Exp $";
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/lm80.h"
@@ -213,7 +253,7 @@
The Genesis has 2 I2C buses. One for the EEPROM which holds
the VPD Data and one for temperature and voltage sensor.
The following picture shows the I2C buses, I2C devices and
- there control registers.
+ their control registers.
Note: The VPD functions are in skvpd.c
.
@@ -278,23 +318,23 @@
* If new devices are added to the I2C bus the timing values have to be checked.
*/
#ifndef I2C_SLOW_TIMING
-#define T_CLK_LOW 1300L /* clock low time in ns */
-#define T_CLK_HIGH 600L /* clock high time in ns */
-#define T_DATA_IN_SETUP 100L /* data in Set-UP Time */
+#define T_CLK_LOW 1300L /* clock low time in ns */
+#define T_CLK_HIGH 600L /* clock high time in ns */
+#define T_DATA_IN_SETUP 100L /* data in Set-up Time */
#define T_START_HOLD 600L /* start condition hold time */
#define T_START_SETUP 600L /* start condition Set-up time */
#define T_STOP_SETUP 600L /* stop condition Set-up time */
-#define T_BUS_IDLE 1300L /* time the bus must free after tx */
+#define T_BUS_IDLE 1300L /* time the bus must free after Tx */
#define T_CLK_2_DATA_OUT 900L /* max. clock low to data output valid */
#else /* I2C_SLOW_TIMING */
/* I2C Standard Mode Timing */
-#define T_CLK_LOW 4700L /* clock low time in ns */
-#define T_CLK_HIGH 4000L /* clock high time in ns */
-#define T_DATA_IN_SETUP 250L /* data in Set-UP Time */
+#define T_CLK_LOW 4700L /* clock low time in ns */
+#define T_CLK_HIGH 4000L /* clock high time in ns */
+#define T_DATA_IN_SETUP 250L /* data in Set-up Time */
#define T_START_HOLD 4000L /* start condition hold time */
-#define T_START_SETUP 4700L /* start condition Set_up time */
+#define T_START_SETUP 4700L /* start condition Set-up time */
#define T_STOP_SETUP 4000L /* stop condition Set-up time */
-#define T_BUS_IDLE 4700L /* time the bus must free after tx */
+#define T_BUS_IDLE 4700L /* time the bus must free after Tx */
#endif /* !I2C_SLOW_TIMING */
#define NS2BCLK(x) (((x)*125)/10000)
@@ -312,9 +352,9 @@
#define I2C_DATA_HIGH(IoC) SK_I2C_SET_BIT(IoC, I2C_DATA)
#define I2C_DATA_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA)
#define I2C_DATA_OUT(IoC) SK_I2C_SET_BIT(IoC, I2C_DATA_DIR)
-#define I2C_DATA_IN(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR|I2C_DATA)
+#define I2C_DATA_IN(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA)
#define I2C_CLK_HIGH(IoC) SK_I2C_SET_BIT(IoC, I2C_CLK)
-#define I2C_CLK_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK|I2C_DATA_DIR)
+#define I2C_CLK_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK | I2C_DATA_DIR)
#define I2C_START_COND(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK)
#define NS2CLKT(x) ((x*125L)/10000)
@@ -331,7 +371,8 @@
I2C_DATA_OUT(IoC);
if (Bit) {
I2C_DATA_HIGH(IoC);
- } else {
+ }
+ else {
I2C_DATA_LOW(IoC);
}
SkDgWaitTime(IoC, NS2BCLK(T_DATA_IN_SETUP));
@@ -428,11 +469,8 @@
SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
SK_I2C_GET_SW(IoC, &I2cSwCtrl);
- if (I2cSwCtrl & I2C_DATA) {
- Bit = 1;
- } else {
- Bit = 0;
- }
+
+ Bit = (I2cSwCtrl & I2C_DATA) ? 1 : 0;
I2C_CLK_LOW(IoC);
SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW-T_CLK_2_DATA_OUT));
@@ -448,12 +486,12 @@
* 1 in case of an error
*/
int SkI2cRcvAck(
-SK_IOC IoC) /* I/O Context */
+SK_IOC IoC) /* I/O Context */
{
/*
* Received bit must be zero.
*/
- return (SkI2cRcvBit(IoC) != 0);
+ return(SkI2cRcvBit(IoC) != 0);
} /* SkI2cRcvAck */
@@ -461,7 +499,7 @@
* Send an NACK.
*/
void SkI2cSndNAck(
-SK_IOC IoC) /* I/O Context */
+SK_IOC IoC) /* I/O Context */
{
/*
* Received bit must be zero.
@@ -487,18 +525,19 @@
/*
* Send one byte to the I2C device and wait for ACK.
*
- * Return acknoleged status.
+ * Return acknowleged status.
*/
int SkI2cSndByte(
SK_IOC IoC, /* I/O Context */
-int Byte) /* byte to send */
+int Byte) /* byte to send */
{
int i;
for (i = 0; i < 8; i++) {
if (Byte & (1<<(7-i))) {
SkI2cSndBit(IoC, 1);
- } else {
+ }
+ else {
SkI2cSndBit(IoC, 0);
}
}
@@ -514,7 +553,7 @@
*/
int SkI2cRcvByte(
SK_IOC IoC, /* I/O Context */
-int Last) /* Last Byte Flag */
+int Last) /* Last Byte Flag */
{
int i;
int Byte = 0;
@@ -526,7 +565,8 @@
if (Last) {
SkI2cSndNAck(IoC);
- } else {
+ }
+ else {
SkI2cSndAck(IoC);
}
@@ -537,7 +577,7 @@
/*
* Start dialog and send device address
*
- * Return 0 if acknoleged, 1 in case of an error
+ * Return 0 if acknowleged, 1 in case of an error
*/
int SkI2cSndDev(
SK_IOC IoC, /* I/O Context */
@@ -545,7 +585,7 @@
int Rw) /* Read / Write Flag */
{
SkI2cStart(IoC);
- Rw = ~Rw;
+ Rw = ~Rw;
Rw &= I2C_WRITE;
return(SkI2cSndByte(IoC, (Addr<<1) | Rw));
} /* SkI2cSndDev */
@@ -567,18 +607,33 @@
int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
{
SK_U64 StartTime;
+ SK_U64 CurrentTime;
SK_U32 I2cCtrl;
StartTime = SkOsGetTime(pAC);
+
do {
- if (SkOsGetTime(pAC) - StartTime > SK_TICKS_PER_SEC / 8) {
+ CurrentTime = SkOsGetTime(pAC);
+
+ if (CurrentTime - StartTime > SK_TICKS_PER_SEC / 8) {
+
SK_I2C_STOP(IoC);
#ifndef SK_DIAG
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG);
#endif /* !SK_DIAG */
return(1);
}
+
SK_I2C_GET_CTL(IoC, &I2cCtrl);
+
+#ifdef xYUKON_DBG
+ printf("StartTime=%lu, CurrentTime=%lu\n",
+ StartTime, CurrentTime);
+ if (kbhit()) {
+ return(1);
+ }
+#endif /* YUKON_DBG */
+
} while ((I2cCtrl & I2C_FLAG) == (SK_U32)Event << 31);
return(0);
@@ -591,7 +646,7 @@
* Returns
* Nothing
*/
-void SkI2cWaitIrq(
+void SkI2cWaitIrq(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC) /* I/O Context */
{
@@ -621,8 +676,6 @@
return;
} /* SkI2cWaitIrq */
-#ifdef SK_DIAG
-
/*
* writes a single byte or 4 bytes into the I2C device
*
@@ -635,14 +688,17 @@
SK_U32 I2cData, /* I2C Data to write */
int I2cDev, /* I2C Device Address */
int I2cReg, /* I2C Device Register Address */
-int I2cBurst) /* I2C Burst Flag ( 0 || I2C_BURST ) */
+int I2cBurst) /* I2C Burst Flag */
{
SK_OUT32(IoC, B2_I2C_DATA, I2cData);
SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cReg, I2cBurst);
+
return(SkI2cWait(pAC, IoC, I2C_WRITE));
} /* SkI2cWrite*/
+#ifdef SK_DIAG
+
/*
* reads a single byte or 4 bytes from the I2C device
*
@@ -653,15 +709,17 @@
SK_IOC IoC, /* I/O Context */
int I2cDev, /* I2C Device Address */
int I2cReg, /* I2C Device Register Address */
-int I2cBurst) /* I2C Burst Flag ( 0 || I2C_BURST ) */
+int I2cBurst) /* I2C Burst Flag */
{
SK_U32 Data;
SK_OUT32(IoC, B2_I2C_DATA, 0);
SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cReg, I2cBurst);
- if (SkI2cWait(pAC, IoC, I2C_READ)) {
- w_print("I2C Transfer Timeout!\n");
+
+ if (SkI2cWait(pAC, IoC, I2C_READ) != 0) {
+ w_print("%s\n", SKERR_I2C_E002MSG);
}
+
SK_IN32(IoC, B2_I2C_DATA, &Data);
return(Data);
} /* SkI2cRead */
@@ -684,13 +742,17 @@
SK_IOC IoC, /* I/O Context */
SK_SENSOR *pSen) /* Sensor to be read */
{
- return((*pSen->SenRead)(pAC, IoC, pSen));
+ if (pSen->SenRead != NULL) {
+ return((*pSen->SenRead)(pAC, IoC, pSen));
+ }
+ else
+ return(0); /* no success */
} /* SkI2cReadSensor*/
/*
* Do the Init state 0 initialization
*/
-static int SkI2cInit0(
+static int SkI2cInit0(
SK_AC *pAC) /* Adapter Context */
{
int i;
@@ -698,95 +760,245 @@
/* Begin with first sensor */
pAC->I2c.CurrSens = 0;
- /* Set to mimimum sensor number */
- pAC->I2c.MaxSens = SK_MIN_SENSORS;
+ /* Begin with timeout control for state machine */
+ pAC->I2c.TimerMode = SK_TIMER_WATCH_STATEMACHINE;
+
+ /* Set sensor number to zero */
+ pAC->I2c.MaxSens = 0;
#ifndef SK_DIAG
/* Initialize Number of Dummy Reads */
pAC->I2c.DummyReads = SK_MAX_SENSORS;
#endif
- for (i = 0; i < SK_MAX_SENSORS; i ++) {
+ for (i = 0; i < SK_MAX_SENSORS; i++) {
+ pAC->I2c.SenTable[i].SenDesc = "unknown";
+ pAC->I2c.SenTable[i].SenType = SK_SEN_UNKNOWN;
+ pAC->I2c.SenTable[i].SenThreErrHigh = 0;
+ pAC->I2c.SenTable[i].SenThreErrLow = 0;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = 0;
+ pAC->I2c.SenTable[i].SenThreWarnLow = 0;
+ pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
+ pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_NONE;
+ pAC->I2c.SenTable[i].SenValue = 0;
+ pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_NOT_PRESENT;
+ pAC->I2c.SenTable[i].SenErrCts = 0;
+ pAC->I2c.SenTable[i].SenBegErrTS = 0;
+ pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE;
+ pAC->I2c.SenTable[i].SenRead = NULL;
+ pAC->I2c.SenTable[i].SenDev = 0;
+ }
+
+ /* Now we are "INIT data"ed */
+ pAC->I2c.InitLevel = SK_INIT_DATA;
+ return(0);
+} /* SkI2cInit0*/
+
+
+/*
+ * Do the init state 1 initialization
+ *
+ * initialize the following register of the LM80:
+ * Configuration register:
+ * - START, noINT, activeLOW, noINT#Clear, noRESET, noCI, noGPO#, noINIT
+ *
+ * Interrupt Mask Register 1:
+ * - all interrupts are Disabled (0xff)
+ *
+ * Interrupt Mask Register 2:
+ * - all interrupts are Disabled (0xff) Interrupt modi doesn't matter.
+ *
+ * Fan Divisor/RST_OUT register:
+ * - Divisors set to 1 (bits 00), all others 0s.
+ *
+ * OS# Configuration/Temperature resolution Register:
+ * - all 0s
+ *
+ */
+static int SkI2cInit1(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC) /* I/O Context */
+{
+ int i;
+ SK_U8 I2cSwCtrl;
+ SK_GEPORT *pPrt; /* GIni Port struct pointer */
+
+ if (pAC->I2c.InitLevel != SK_INIT_DATA) {
+ /* ReInit not needed in I2C module */
+ return(0);
+ }
+
+ /* Set the Direction of I2C-Data Pin to IN */
+ SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA);
+ /* Check for 32-Bit Yukon with Low at I2C-Data Pin */
+ SK_I2C_GET_SW(IoC, &I2cSwCtrl);
+
+ if ((I2cSwCtrl & I2C_DATA) == 0) {
+ /* this is a 32-Bit board */
+ pAC->GIni.GIYukon32Bit = SK_TRUE;
+ return(0);
+ }
+
+ /* Check for 64 Bit Yukon without sensors */
+ if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_CFG, 0) != 0) {
+ return(0);
+ }
+
+ (void)SkI2cWrite(pAC, IoC, 0xff, LM80_ADDR, LM80_IMSK_1, 0);
+
+ (void)SkI2cWrite(pAC, IoC, 0xff, LM80_ADDR, LM80_IMSK_2, 0);
+
+ (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_FAN_CTRL, 0);
+
+ (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_TEMP_CTRL, 0);
+
+ (void)SkI2cWrite(pAC, IoC, LM80_CFG_START, LM80_ADDR, LM80_CFG, 0);
+
+ /*
+ * MaxSens has to be updated here, because PhyType is not
+ * set when performing Init Level 0
+ */
+ pAC->I2c.MaxSens = 5;
+
+ pPrt = &pAC->GIni.GP[0];
+
+ if (pAC->GIni.GIGenesis) {
+ if (pPrt->PhyType == SK_PHY_BCOM) {
+ if (pAC->GIni.GIMacsFound == 1) {
+ pAC->I2c.MaxSens += 1;
+ }
+ else {
+ pAC->I2c.MaxSens += 3;
+ }
+ }
+ }
+ else {
+ pAC->I2c.MaxSens += 3;
+ }
+
+ for (i = 0; i < pAC->I2c.MaxSens; i++) {
switch (i) {
case 0:
pAC->I2c.SenTable[i].SenDesc = "Temperature";
pAC->I2c.SenTable[i].SenType = SK_SEN_TEMP;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH0;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW0;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH0;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW0;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_TEMP_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_TEMP_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_TEMP_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_TEMP_LOW_ERR;
pAC->I2c.SenTable[i].SenReg = LM80_TEMP_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
break;
case 1:
pAC->I2c.SenTable[i].SenDesc = "Voltage PCI";
pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH1;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW1;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH1;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW1;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_5V_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_5V_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_5V_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_5V_LOW_ERR;
pAC->I2c.SenTable[i].SenReg = LM80_VT0_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
break;
case 2:
pAC->I2c.SenTable[i].SenDesc = "Voltage PCI-IO";
pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH2;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW2;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH2;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW2;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_IO_5V_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_IO_5V_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_IO_3V3_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_IO_3V3_LOW_ERR;
pAC->I2c.SenTable[i].SenReg = LM80_VT1_IN;
- pAC->I2c.SenTable[i].SenInit = SK_FALSE;
+ pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_PCI_IO;
break;
case 3:
pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC";
pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH3;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW3;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH3;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW3;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VDD_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VDD_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VDD_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VDD_LOW_ERR;
pAC->I2c.SenTable[i].SenReg = LM80_VT2_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
break;
case 4:
- pAC->I2c.SenTable[i].SenDesc = "Voltage PMA";
+ if (pAC->GIni.GIGenesis) {
+ if (pPrt->PhyType == SK_PHY_BCOM) {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage PHY A PLL";
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
+ }
+ else {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage PMA";
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
+ }
+ }
+ else {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage VAUX";
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VAUX_3V3_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VAUX_3V3_HIGH_WARN;
+ if (pAC->GIni.GIVauxAvail) {
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
+ }
+ else {
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_0V_WARN_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_0V_WARN_ERR;
+ }
+ }
pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH4;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW4;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH4;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW4;
pAC->I2c.SenTable[i].SenReg = LM80_VT3_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
break;
case 5:
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
+ if (pAC->GIni.GIGenesis) {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
+ }
+ else {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC-Co 1V5";
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_CORE_1V5_LOW_ERR;
+ }
pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH5;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW5;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH5;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW5;
pAC->I2c.SenTable[i].SenReg = LM80_VT4_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
break;
case 6:
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY B PLL";
+ if (pAC->GIni.GIGenesis) {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage PHY B PLL";
+ }
+ else {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 3V3";
+ }
pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH6;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW6;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH6;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW6;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
pAC->I2c.SenTable[i].SenReg = LM80_VT5_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
break;
case 7:
- pAC->I2c.SenTable[i].SenDesc = "Speed Fan";
- pAC->I2c.SenTable[i].SenType = SK_SEN_FAN;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_ERRHIGH;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_ERRLOW;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_WARNHIGH;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_WARNLOW;
- pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
- pAC->I2c.SenTable[i].SenInit = SK_TRUE;
+ if (pAC->GIni.GIGenesis) {
+ pAC->I2c.SenTable[i].SenDesc = "Speed Fan";
+ pAC->I2c.SenTable[i].SenType = SK_SEN_FAN;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_FAN_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_FAN_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_FAN_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_FAN_LOW_ERR;
+ pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
+ }
+ else {
+ pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
+ pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
+ pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
+ pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
+ pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
+ pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
+ pAC->I2c.SenTable[i].SenReg = LM80_VT6_IN;
+ }
break;
default:
SK_ERR_LOG(pAC, SK_ERRCL_INIT | SK_ERRCL_SW,
@@ -803,94 +1015,13 @@
pAC->I2c.SenTable[i].SenDev = LM80_ADDR;
}
- /* Now we are "INIT data"ed */
- pAC->I2c.InitLevel = SK_INIT_DATA;
- return(0);
-} /* SkI2cInit0*/
-
-
-/*
- * Do the init state 1 initialization
- *
- * initialize the following register of the LM80:
- * Configuration register:
- * - START, noINT, activeLOW, noINT#Clear, noRESET, noCI, noGPO#, noINIT
- *
- * Interrupt Mask Register 1:
- * - all interrupts are Disabled (0xff)
- *
- * Interrupt Mask Register 2:
- * - all interrupts are Disabled (0xff) Interrupt modi doesn't matter.
- *
- * Fan Divisor/RST_OUT register:
- * - Divisors set to 1 (bits 00), all others 0s.
- *
- * OS# Configuration/Temperature resolution Register:
- * - all 0s
- *
- */
-static int SkI2cInit1(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC) /* I/O Context */
-{
- if (pAC->I2c.InitLevel != SK_INIT_DATA) {
- /* ReInit not needed in I2C module */
- return(0);
- }
-
- SK_OUT32(IoC, B2_I2C_DATA, 0);
- SK_I2C_CTL(IoC, I2C_WRITE, LM80_ADDR, LM80_CFG, 0);
- (void)SkI2cWait(pAC, IoC, I2C_WRITE);
-
- SK_OUT32(IoC, B2_I2C_DATA, 0xff);
- SK_I2C_CTL(IoC, I2C_WRITE, LM80_ADDR, LM80_IMSK_1, 0);
- (void)SkI2cWait(pAC, IoC, I2C_WRITE);
-
- SK_OUT32(IoC, B2_I2C_DATA, 0xff);
- SK_I2C_CTL(IoC, I2C_WRITE, LM80_ADDR, LM80_IMSK_2, 0);
- (void)SkI2cWait(pAC, IoC, I2C_WRITE);
-
- SK_OUT32(IoC, B2_I2C_DATA, 0x0);
- SK_I2C_CTL(IoC, I2C_WRITE, LM80_ADDR, LM80_FAN_CTRL, 0);
- (void)SkI2cWait(pAC, IoC, I2C_WRITE);
-
- SK_OUT32(IoC, B2_I2C_DATA, 0);
- SK_I2C_CTL(IoC, I2C_WRITE, LM80_ADDR, LM80_TEMP_CTRL, 0);
- (void)SkI2cWait(pAC, IoC, I2C_WRITE);
-
- SK_OUT32(IoC, B2_I2C_DATA, LM80_CFG_START);
- SK_I2C_CTL(IoC, I2C_WRITE, LM80_ADDR, LM80_CFG, 0);
- (void)SkI2cWait(pAC, IoC, I2C_WRITE);
-
- /*
- * MaxSens has to be initialized here, because PhyType is not
- * set when performing Init Level 1
- */
- switch (pAC->GIni.GP[0].PhyType) {
- case SK_PHY_XMAC:
- pAC->I2c.MaxSens = 5;
- break;
- case SK_PHY_BCOM:
- pAC->I2c.SenTable[4].SenDesc = "Voltage PHY A PLL";
- if (pAC->GIni.GIMacsFound == 1) {
- pAC->I2c.MaxSens = 6;
- }
- else {
- pAC->I2c.MaxSens = 8;
- }
- break;
- case SK_PHY_LONE:
- pAC->I2c.MaxSens = 5;
- break;
- }
-
#ifndef SK_DIAG
pAC->I2c.DummyReads = pAC->I2c.MaxSens;
-
- /* Clear the interrupt source */
- SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
#endif /* !SK_DIAG */
+ /* Clear I2C IRQ */
+ SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
+
/* Now we are I/O initialized */
pAC->I2c.InitLevel = SK_INIT_IO;
return(0);
@@ -900,7 +1031,7 @@
/*
* Init level 2: Start first sensor read.
*/
-static int SkI2cInit2(
+static int SkI2cInit2(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC) /* I/O Context */
{
@@ -977,13 +1108,13 @@
*
* Starts the timer if necessary.
*/
-void SkI2cIsr(
+void SkI2cIsr(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC) /* I/O Context */
{
SK_EVPARA Para;
- /* Clear the interrupt source */
+ /* Clear I2C IRQ */
SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
Para.Para64 = 0;
@@ -994,7 +1125,7 @@
/*
* Check this sensors Value against the threshold and send events.
*/
-static void SkI2cCheckSensor(
+static void SkI2cCheckSensor(
SK_AC *pAC, /* Adapter Context */
SK_SENSOR *pSen)
{
@@ -1008,7 +1139,7 @@
/* Check Dummy Reads first */
if (pAC->I2c.DummyReads > 0) {
- pAC->I2c.DummyReads --;
+ pAC->I2c.DummyReads--;
return;
}
@@ -1016,7 +1147,7 @@
CurrTime = SkOsGetTime(pAC);
/* Set para to the most useful setting: The current sensor. */
- ParaLocal.Para64 = (SK_U64) pAC->I2c.CurrSens;
+ ParaLocal.Para64 = (SK_U64)pAC->I2c.CurrSens;
/* Check the Value against the thresholds. First: Error Thresholds */
TooHigh = (pSen->SenValue > pSen->SenThreErrHigh);
@@ -1053,9 +1184,9 @@
*/
DoErrLog = SK_FALSE;
}
- } else {
- /* We came from a different state */
- /* -> Set Begin Time Stamp */
+ }
+ else {
+ /* We came from a different state -> Set Begin Time Stamp */
pSen->SenBegErrTS = CurrTime;
pSen->SenErrFlag = SK_SEN_ERR_ERR;
}
@@ -1063,7 +1194,7 @@
if (DoTrapSend) {
/* Set current Time */
pSen->SenLastErrTrapTS = CurrTime;
- pSen->SenErrCts ++;
+ pSen->SenErrCts++;
/* Queue PNMI Event */
SkEventQueue(pAC, SKGE_PNMI, (TooHigh ?
@@ -1095,7 +1226,6 @@
TooHigh = (pSen->SenValue > pSen->SenThreWarnHigh);
TooLow = (pSen->SenValue < pSen->SenThreWarnLow);
-
if (!IsError && (TooHigh || TooLow)) {
/* Error condition is satisfied */
DoTrapSend = SK_TRUE;
@@ -1123,9 +1253,9 @@
*/
DoErrLog = SK_FALSE;
}
- } else {
- /* We came from a different state */
- /* -> Set Begin Time Stamp */
+ }
+ else {
+ /* We came from a different state -> Set Begin Time Stamp */
pSen->SenBegWarnTS = CurrTime;
pSen->SenErrFlag = SK_SEN_ERR_WARN;
}
@@ -1133,7 +1263,7 @@
if (DoTrapSend) {
/* Set current Time */
pSen->SenLastWarnTrapTS = CurrTime;
- pSen->SenWarnCts ++;
+ pSen->SenWarnCts++;
/* Queue PNMI Event */
SkEventQueue(pAC, SKGE_PNMI, (TooHigh ?
@@ -1168,6 +1298,43 @@
/* End of check against the thresholds */
+ /* Bug fix AF: 16.Aug.2001: Correct the init base
+ * of LM80 sensor.
+ */
+ if (pSen->SenInit == SK_SEN_DYN_INIT_PCI_IO) {
+
+ pSen->SenInit = SK_SEN_DYN_INIT_NONE;
+
+ if (pSen->SenValue > SK_SEN_PCI_IO_RANGE_LIMITER) {
+ /* 5V PCI-IO Voltage */
+ pSen->SenThreWarnLow = SK_SEN_PCI_IO_5V_LOW_WARN;
+ pSen->SenThreErrLow = SK_SEN_PCI_IO_5V_LOW_ERR;
+ }
+ else {
+ /* 3.3V PCI-IO Voltage */
+ pSen->SenThreWarnHigh = SK_SEN_PCI_IO_3V3_HIGH_WARN;
+ pSen->SenThreErrHigh = SK_SEN_PCI_IO_3V3_HIGH_ERR;
+ }
+ }
+
+#if 0
+ /* Dynamic thresholds also for VAUX of LM80 sensor */
+ if (pSen->SenInit == SK_SEN_DYN_INIT_VAUX) {
+
+ pSen->SenInit = SK_SEN_DYN_INIT_NONE;
+
+ /* 3.3V VAUX Voltage */
+ if (pSen->SenValue > SK_SEN_VAUX_RANGE_LIMITER) {
+ pSen->SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
+ pSen->SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
+ }
+ /* 0V VAUX Voltage */
+ else {
+ pSen->SenThreWarnHigh = SK_SEN_VAUX_0V_WARN_ERR;
+ pSen->SenThreErrHigh = SK_SEN_VAUX_0V_WARN_ERR;
+ }
+ }
+
/*
* Check initialization state:
* The VIO Thresholds need adaption
@@ -1175,20 +1342,21 @@
if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
pSen->SenValue > SK_SEN_WARNLOW2C &&
pSen->SenValue < SK_SEN_WARNHIGH2) {
- pSen->SenThreErrLow = SK_SEN_ERRLOW2C;
- pSen->SenThreWarnLow = SK_SEN_WARNLOW2C;
+ pSen->SenThreErrLow = SK_SEN_ERRLOW2C;
+ pSen->SenThreWarnLow = SK_SEN_WARNLOW2C;
pSen->SenInit = SK_TRUE;
}
if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
pSen->SenValue > SK_SEN_WARNLOW2 &&
pSen->SenValue < SK_SEN_WARNHIGH2C) {
- pSen->SenThreErrHigh = SK_SEN_ERRHIGH2C;
- pSen->SenThreWarnHigh = SK_SEN_WARNHIGH2C;
+ pSen->SenThreErrHigh = SK_SEN_ERRHIGH2C;
+ pSen->SenThreWarnHigh = SK_SEN_WARNHIGH2C;
pSen->SenInit = SK_TRUE;
}
+#endif
- if (!pSen->SenInit) {
+ if (pSen->SenInit != SK_SEN_DYN_INIT_NONE) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E013, SKERR_I2C_E013MSG);
}
} /* SkI2cCheckSensor*/
@@ -1210,9 +1378,13 @@
SK_EVPARA ParaLocal;
int i;
+ /* New case: no sensors */
+ if (pAC->I2c.MaxSens == 0) {
+ return(0);
+ }
+
switch (Event) {
case SK_I2CEV_IRQ:
- case SK_I2CEV_TIM:
pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
@@ -1220,23 +1392,92 @@
/* Check sensor against defined thresholds */
SkI2cCheckSensor (pAC, pSen);
- /* Increment Current and set appropriate Timeout */
- Time = SK_I2C_TIM_SHORT;
+ /* Increment Current sensor and set appropriate Timeout */
+ pAC->I2c.CurrSens++;
+ if (pAC->I2c.CurrSens >= pAC->I2c.MaxSens) {
+ pAC->I2c.CurrSens = 0;
+ Time = SK_I2C_TIM_LONG;
+ }
+ else {
+ Time = SK_I2C_TIM_SHORT;
+ }
+
+ /* Start Timer */
+ ParaLocal.Para64 = (SK_U64)0;
+
+ pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
+
+ SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
+ SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
+ }
+ else {
+ /* Start Timer */
+ ParaLocal.Para64 = (SK_U64)0;
+
+ pAC->I2c.TimerMode = SK_TIMER_WATCH_STATEMACHINE;
+
+ SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, SK_I2C_TIM_WATCH,
+ SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
+ }
+ break;
+ case SK_I2CEV_TIM:
+ if (pAC->I2c.TimerMode == SK_TIMER_NEW_GAUGING) {
+
+ ParaLocal.Para64 = (SK_U64)0;
+ SkTimerStop(pAC, IoC, &pAC->I2c.SenTimer);
+
+ pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
+ ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
- pAC->I2c.CurrSens ++;
+ if (ReadComplete) {
+ /* Check sensor against defined thresholds */
+ SkI2cCheckSensor (pAC, pSen);
+
+ /* Increment Current sensor and set appropriate Timeout */
+ pAC->I2c.CurrSens++;
+ if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
+ pAC->I2c.CurrSens = 0;
+ Time = SK_I2C_TIM_LONG;
+ }
+ else {
+ Time = SK_I2C_TIM_SHORT;
+ }
+
+ /* Start Timer */
+ ParaLocal.Para64 = (SK_U64)0;
+
+ pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
+
+ SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
+ SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
+ }
+ }
+ else {
+ pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
+ pSen->SenErrFlag = SK_SEN_ERR_FAULTY;
+ SK_I2C_STOP(IoC);
+
+ /* Increment Current sensor and set appropriate Timeout */
+ pAC->I2c.CurrSens++;
if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
pAC->I2c.CurrSens = 0;
Time = SK_I2C_TIM_LONG;
}
+ else {
+ Time = SK_I2C_TIM_SHORT;
+ }
/* Start Timer */
- ParaLocal.Para64 = (SK_U64) 0;
+ ParaLocal.Para64 = (SK_U64)0;
+
+ pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
+
SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
}
break;
case SK_I2CEV_CLEAR:
- for (i = 0; i < SK_MAX_SENSORS; i ++) {
+ for (i = 0; i < SK_MAX_SENSORS; i++) {
pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_OK;
pAC->I2c.SenTable[i].SenErrCts = 0;
pAC->I2c.SenTable[i].SenWarnCts = 0;
@@ -1255,4 +1496,4 @@
return(0);
} /* SkI2cEvent*/
-#endif /* !SK_DIAG */
+#endif /* !SK_DIAG */
diff -Nru a/drivers/net/sk98lin/sklm80.c b/drivers/net/sk98lin/sklm80.c
--- a/drivers/net/sk98lin/sklm80.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sk98lin/sklm80.c Sun Aug 3 13:14:52 2003
@@ -2,16 +2,15 @@
*
* Name: sklm80.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.17 $
- * Date: $Date: 1999/11/22 13:35:51 $
+ * Version: $Revision: 1.20 $
+ * Date: $Date: 2002/08/13 09:16:27 $
* Purpose: Funktions to access Voltage and Temperature Sensor (LM80)
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,16 @@
* History:
*
* $Log: sklm80.c,v $
+ * Revision 1.20 2002/08/13 09:16:27 rschmidt
+ * Changed return value for SkLm80ReadSensor() back to 'int'
+ * Editorial changes
+ *
+ * Revision 1.19 2002/08/06 09:43:31 jschmalz
+ * Extensions and changes for Yukon
+ *
+ * Revision 1.18 2002/08/02 12:26:57 rschmidt
+ * Editorial changes
+ *
* Revision 1.17 1999/11/22 13:35:51 cgoos
* Changed license header to GPL.
*
@@ -93,7 +102,7 @@
LM80 functions
*/
static const char SysKonnectFileId[] =
- "$Id: sklm80.c,v 1.17 1999/11/22 13:35:51 cgoos Exp $" ;
+ "$Id: sklm80.c,v 1.20 2002/08/13 09:16:27 rschmidt Exp $" ;
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/lm80.h"
@@ -107,15 +116,15 @@
#ifdef SK_DIAG
/*
- * read the regeister 'reg' from the device 'device'
+ * read the register 'Reg' from the device 'Dev'
*
* return read error -1
* success the read value
*/
int SkLm80RcvReg(
SK_IOC IoC, /* Adapter Context */
-int Dev, /* I2C device address */
-int Reg) /* register to read */
+int Dev, /* I2C device address */
+int Reg) /* register to read */
{
int Val = 0;
int TempExt;
@@ -134,9 +143,9 @@
return(-1);
}
- switch(Reg) {
+ switch (Reg) {
case LM80_TEMP_IN:
- Val = (int)SkI2cRcvByte(IoC, 1) ;
+ Val = (int)SkI2cRcvByte(IoC, 1);
/* First: correct the value: it might be negative */
if ((Val & 0x80) != 0) {
@@ -145,7 +154,9 @@
}
Val = Val * SK_LM80_TEMP_LSB;
SkI2cStop(IoC);
- TempExt = (int) SkLm80RcvReg(IoC,LM80_ADDR,LM80_TEMP_CTRL);
+
+ TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL);
+
if (Val > 0) {
Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
}
@@ -158,10 +169,11 @@
case LM80_VT1_IN:
case LM80_VT2_IN:
case LM80_VT3_IN:
- Val = (int) SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
+ Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
break;
+
default:
- Val = (int) SkI2cRcvByte(IoC, 1);
+ Val = (int)SkI2cRcvByte(IoC, 1);
break;
}
@@ -173,30 +185,32 @@
/*
* read a sensors value (LM80 specific)
*
- * This function reads a sensors value from the I2c sensor chip LM80. The
- * sensor is defined by its index into the sensors database in the struct
+ * This function reads a sensors value from the I2C sensor chip LM80.
+ * The sensor is defined by its index into the sensors database in the struct
* pAC points to.
*
* Returns 1 if the read is completed
- * 0 if the read must be continued (I2c Bus still allocated)
+ * 0 if the read must be continued (I2C Bus still allocated)
*/
-int SkLm80ReadSensor(
+int SkLm80ReadSensor(
SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IoContext needed in level 1 and 2 */
+SK_IOC IoC, /* I/O Context needed in level 1 and 2 */
SK_SENSOR *pSen) /* Sensor to be read */
{
SK_I32 Value;
- switch(pSen->SenState) {
+ switch (pSen->SenState) {
case SK_SEN_IDLE:
/* Send address to ADDR register */
- SK_I2C_CTL(IoC,I2C_READ,pSen->SenDev,pSen->SenReg,0);
+ SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, pSen->SenReg, 0);
pSen->SenState = SK_SEN_VALUE ;
- BREAK_OR_WAIT(pAC, IoC, I2C_READ) ;
+ BREAK_OR_WAIT(pAC, IoC, I2C_READ);
+
case SK_SEN_VALUE:
/* Read value from data register */
- SK_IN32(IoC,B2_I2C_DATA, ((SK_U32 *)&Value));
+ SK_IN32(IoC, B2_I2C_DATA, ((SK_U32 *)&Value));
+
Value &= 0xff; /* only least significant byte is valid */
/* Do NOT check the Value against the thresholds */
@@ -228,10 +242,9 @@
Value = Value - 256;
}
- /* We have a temperature sensor and need to get the signed
- * extension. For now we get the extension from the last
- * reading, so in the normal case we won't see flickering
- * temperatures.
+ /* We have a temperature sensor and need to get the signed extension.
+ * For now we get the extension from the last reading, so in the normal
+ * case we won't see flickering temperatures.
*/
pSen->SenValue = (Value * SK_LM80_TEMP_LSB) +
(pSen->SenValue % SK_LM80_TEMP_LSB);
@@ -240,32 +253,34 @@
SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, LM80_TEMP_CTRL, 0);
pSen->SenState = SK_SEN_VALEXT ;
- BREAK_OR_WAIT(pAC, IoC, I2C_READ) ;
+ BREAK_OR_WAIT(pAC, IoC, I2C_READ);
+
case SK_SEN_VALEXT:
/* Read value from data register */
- SK_IN32(IoC,B2_I2C_DATA,((SK_U32 *)&Value));
+ SK_IN32(IoC, B2_I2C_DATA, ((SK_U32 *)&Value));
Value &= LM80_TEMP_LSB_9; /* only bit 7 is valid */
/* cut the LSB bit */
pSen->SenValue = ((pSen->SenValue / SK_LM80_TEMP_LSB) *
- SK_LM80_TEMP_LSB) ;
+ SK_LM80_TEMP_LSB);
if (pSen->SenValue < 0) {
/* Value negative: The bit value must be subtracted */
pSen->SenValue -= ((Value >> 7) * SK_LM80_TEMPEXT_LSB);
- } else {
+ }
+ else {
/* Value positive: The bit value must be added */
pSen->SenValue += ((Value >> 7) * SK_LM80_TEMPEXT_LSB);
}
pSen->SenState = SK_SEN_IDLE ;
return(1);
+
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E007,
- SKERR_I2C_E007MSG) ;
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E007, SKERR_I2C_E007MSG);
return(1);
}
/* Not completed */
- return(0) ;
+ return(0);
}
diff -Nru a/drivers/net/sk98lin/skproc.c b/drivers/net/sk98lin/skproc.c
--- a/drivers/net/sk98lin/skproc.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/sk98lin/skproc.c Sun Aug 3 13:14:45 2003
@@ -2,15 +2,15 @@
*
* Name: skproc.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.2.2.2 $
- * Date: $Date: 2001/03/15 12:50:13 $
+ * Version: $Revision: 1.8 $
+ * Date: $Date: 2003/06/27 14:41:42 $
* Purpose: Funktions to display statictic data
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -28,6 +28,46 @@
* History:
*
* $Log: skproc.c,v $
+ * Revision 1.8 2003/06/27 14:41:42 rroesler
+ * Corrected compiler-warning kernel 2.2
+ *
+ * Revision 1.7 2003/06/27 12:09:51 rroesler
+ * corrected minor edits
+ *
+ * Revision 1.6 2003/05/26 12:58:53 mlindner
+ * Add: Support for Kernel 2.5/2.6
+ *
+ * Revision 1.5 2003/03/19 14:40:47 mlindner
+ * Fix: Editorial changes
+ *
+ * Revision 1.4 2003/02/25 14:16:37 mlindner
+ * Fix: Copyright statement
+ *
+ * Revision 1.3 2002/10/02 12:59:51 mlindner
+ * Add: Support for Yukon
+ * Add: Speed check and setup
+ * Add: Merge source for kernel 2.2.x and 2.4.x
+ * Add: Read sensor names directly from VPD
+ * Fix: Volt values
+ *
+ * Revision 1.2.2.7 2002/01/14 12:45:15 mlindner
+ * Fix: Editorial changes
+ *
+ * Revision 1.2.2.6 2001/12/06 15:26:07 mlindner
+ * Fix: Return value of proc_read
+ *
+ * Revision 1.2.2.5 2001/12/06 09:57:39 mlindner
+ * New ProcFs entries
+ *
+ * Revision 1.2.2.4 2001/09/05 12:16:02 mlindner
+ * Add: New ProcFs entries
+ * Fix: Counter Errors (Jumbo == to long errors)
+ * Fix: Kernel error compilation
+ * Fix: too short counters
+ *
+ * Revision 1.2.2.3 2001/06/25 07:26:26 mlindner
+ * Add: More error messages
+ *
* Revision 1.2.2.2 2001/03/15 12:50:13 mlindner
* fix: ProcFS owner protection
*
@@ -46,168 +86,449 @@
#include "h/skdrv1st.h"
#include "h/skdrv2nd.h"
+#define ZEROPAD 1 /* pad with zero */
+#define SIGN 2 /* unsigned/signed long */
+#define PLUS 4 /* show plus */
+#define SPACE 8 /* space if plus */
+#define LEFT 16 /* left justified */
+#define SPECIALX 32 /* 0x */
+#define LARGE 64
+
+ extern struct net_device *SkGeRootDev;
+
+extern char * SkNumber(
+ char * str,
+ long long num,
+ int base,
+ int size,
+ int precision,
+ int type);
+
+int sk_proc_read(char *buffer,
+ char **buffer_location,
+ off_t offset,
+ int buffer_length,
+ int *eof,
+ void *data);
+
-extern spinlock_t sk_devs_lock;
-static int sk_show_dev(struct net_device *dev, char *buf)
+/*****************************************************************************
+ *
+ * sk_proc_read - print "summaries" entry
+ *
+ * Description:
+ * This function fills the proc entry with statistic data about
+ * the ethernet device.
+ *
+ *
+ * Returns: buffer with statistic data
+ *
+ */
+int sk_proc_read(char *buffer,
+char **buffer_location,
+off_t offset,
+int buffer_length,
+int *eof,
+void *data)
{
- DEV_NET *pNet = (DEV_NET*) dev->priv;
- SK_AC *pAC = pNet->pAC;
- int t = pNet->PortNr;
- SK_RLMT_NET *rlmt = &pAC->Rlmt.Net[t];
- unsigned long Flags;
- unsigned Size;
int len = 0;
+ int t;
int i;
+ DEV_NET *pNet;
+ SK_AC *pAC;
+ char test_buf[100];
+ char sens_msg[50];
+ unsigned long Flags;
+ unsigned int Size;
+ struct SK_NET_DEVICE *next;
+ struct SK_NET_DEVICE *SkgeProcDev = SkGeRootDev;
- SK_PNMI_STRUCT_DATA *pPnmiStruct = &pAC->PnmiStruct;
+ SK_PNMI_STRUCT_DATA *pPnmiStruct;
SK_PNMI_STAT *pPnmiStat;
+ struct proc_dir_entry *file = (struct proc_dir_entry*) data;
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- Size = SK_PNMI_STRUCT_SIZE;
- SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, t);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- pPnmiStat = &pPnmiStruct->Stat[0];
-
- len = sprintf(buf, "\nDetailed statistic for device %s\n", dev->name);
- len += sprintf(buf + len, "==================================\n");
-
- /* Board statistics */
- len += sprintf(buf + len, "\nBoard statistics\n\n");
- len += sprintf(buf + len, "Active Port %c\n",
- 'A' + rlmt->Port[rlmt->ActivePort]->PortNumber);
- len += sprintf(buf + len, "Preferred Port %c\n",
- 'A' + rlmt->Port[rlmt->PrefPort]->PortNumber);
-
- len += sprintf(buf + len, "Bus speed (Mhz) %d\n",
- pPnmiStruct->BusSpeed);
-
- len += sprintf(buf + len, "Bus width (Bit) %d\n",
- pPnmiStruct->BusWidth);
-
- for (i=0; i < SK_MAX_SENSORS; i ++) {
- SK_SENSOR *sens = &pAC->I2c.SenTable[i];
- SK_I32 val = sens->SenValue;
- if (strcmp(sens->SenDesc, "Temperature") == 0 ) {
- len += sprintf(buf + len,
- "Temperature (C) %d.%d\n",
- val / 10, val % 10);
- val = val * 18 + 3200;
- len += sprintf(buf + len,
- "Temperature (F) %d.%d\n",
- val/100, val % 10);
- } else if (strcmp(sens->SenDesc, "Speed Fan") == 0 ) {
- len += sprintf(buf + len,
- "Speed Fan %d\n",
- val);
- } else {
- len += sprintf(buf + len,
- "%-20s %d.%d\n",
- sens->SenDesc, val / 1000, val % 1000);
- }
- }
+ while (SkgeProcDev) {
+ pNet = (DEV_NET*) SkgeProcDev->priv;
+ pAC = pNet->pAC;
+ next = pAC->Next;
+ pPnmiStruct = &pAC->PnmiStruct;
+ /* NetIndex in GetStruct is now required, zero is only dummy */
+
+ for (t=pAC->GIni.GIMacsFound; t > 0; t--) {
+ if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 1)
+ t--;
+
+ spin_lock_irqsave(&pAC->SlowPathLock, Flags);
+ Size = SK_PNMI_STRUCT_SIZE;
+ SkPnmiGetStruct(pAC, pAC->IoBase,
+ pPnmiStruct, &Size, t-1);
+ spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- /*Receive statistics */
+ if (strcmp(pAC->dev[t-1]->name, file->name) == 0) {
+ pPnmiStat = &pPnmiStruct->Stat[0];
+ len = sprintf(buffer,
+ "\nDetailed statistic for device %s\n",
+ pAC->dev[t-1]->name);
+ len += sprintf(buffer + len,
+ "=======================================\n");
- len += sprintf(buf + len, "\nReceive statistics\n\n");
+ /* Board statistics */
+ len += sprintf(buffer + len,
+ "\nBoard statistics\n\n");
+ len += sprintf(buffer + len,
+ "Active Port %c\n",
+ 'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
+ Net[t-1].PrefPort]->PortNumber);
+ len += sprintf(buffer + len,
+ "Preferred Port %c\n",
+ 'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
+ Net[t-1].PrefPort]->PortNumber);
+
+ len += sprintf(buffer + len,
+ "Bus speed (MHz) %d\n",
+ pPnmiStruct->BusSpeed);
+
+ len += sprintf(buffer + len,
+ "Bus width (Bit) %d\n",
+ pPnmiStruct->BusWidth);
+ len += sprintf(buffer + len,
+ "Hardware revision v%d.%d\n",
+ (pAC->GIni.GIPciHwRev >> 4) & 0x0F,
+ pAC->GIni.GIPciHwRev & 0x0F);
+
+ /* Print sensor informations */
+ for (i=0; i < pAC->I2c.MaxSens; i ++) {
+ /* Check type */
+ switch (pAC->I2c.SenTable[i].SenType) {
+ case 1:
+ strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
+ strcat(sens_msg, " (C)");
+ len += sprintf(buffer + len,
+ "%-25s %d.%02d\n",
+ sens_msg,
+ pAC->I2c.SenTable[i].SenValue / 10,
+ pAC->I2c.SenTable[i].SenValue % 10);
+
+ strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
+ strcat(sens_msg, " (F)");
+ len += sprintf(buffer + len,
+ "%-25s %d.%02d\n",
+ sens_msg,
+ ((((pAC->I2c.SenTable[i].SenValue)
+ *10)*9)/5 + 3200)/100,
+ ((((pAC->I2c.SenTable[i].SenValue)
+ *10)*9)/5 + 3200) % 10);
+ break;
+ case 2:
+ strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
+ strcat(sens_msg, " (V)");
+ len += sprintf(buffer + len,
+ "%-25s %d.%03d\n",
+ sens_msg,
+ pAC->I2c.SenTable[i].SenValue / 1000,
+ pAC->I2c.SenTable[i].SenValue % 1000);
+ break;
+ case 3:
+ strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
+ strcat(sens_msg, " (rpm)");
+ len += sprintf(buffer + len,
+ "%-25s %d\n",
+ sens_msg,
+ pAC->I2c.SenTable[i].SenValue);
+ break;
+ default:
+ break;
+ }
+ }
+
+ /*Receive statistics */
+ len += sprintf(buffer + len,
+ "\nReceive statistics\n\n");
+
+ len += sprintf(buffer + len,
+ "Received bytes %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxOctetsOkCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Received packets %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxOkCts,
+ 10,0,-1,0));
+#if 0
+ if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC &&
+ pAC->HWRevision < 12) {
+ pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
+ pPnmiStat->StatRxShortsCts;
+ pPnmiStat->StatRxShortsCts = 0;
+ }
+#endif
+ if (pNet->Mtu > 1500)
+ pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
+ pPnmiStat->StatRxTooLongCts;
+
+ len += sprintf(buffer + len,
+ "Receive errors %s\n",
+ SkNumber(test_buf, pPnmiStruct->InErrorsCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Receive dropped %s\n",
+ SkNumber(test_buf, pPnmiStruct->RxNoBufCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Received multicast %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxMulticastOkCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Receive error types\n");
+ len += sprintf(buffer + len,
+ " length %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxRuntCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " buffer overflow %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxFifoOverflowCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " bad crc %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxFcsCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " framing %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxFramingCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " missed frames %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxMissedCts,
+ 10, 0, -1, 0));
+
+ if (pNet->Mtu > 1500)
+ pPnmiStat->StatRxTooLongCts = 0;
+
+ len += sprintf(buffer + len,
+ " too long %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxTooLongCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " carrier extension %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxCextCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " too short %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxShortsCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " symbol %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxSymbolCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " LLC MAC size %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxIRLengthCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " carrier event %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxCarrierCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " jabber %s\n",
+ SkNumber(test_buf, pPnmiStat->StatRxJabberCts,
+ 10, 0, -1, 0));
+
+
+ /*Transmit statistics */
+ len += sprintf(buffer + len,
+ "\nTransmit statistics\n\n");
+
+ len += sprintf(buffer + len,
+ "Transmited bytes %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxOctetsOkCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Transmited packets %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxOkCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Transmit errors %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxSingleCollisionCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Transmit dropped %s\n",
+ SkNumber(test_buf, pPnmiStruct->TxNoBufCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Transmit collisions %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxSingleCollisionCts,
+ 10,0,-1,0));
+ len += sprintf(buffer + len,
+ "Transmit error types\n");
+ len += sprintf(buffer + len,
+ " excessive collision %ld\n",
+ pAC->stats.tx_aborted_errors);
+ len += sprintf(buffer + len,
+ " carrier %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxCarrierCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " fifo underrun %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxFifoUnderrunCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " heartbeat %s\n",
+ SkNumber(test_buf, pPnmiStat->StatTxCarrierCts,
+ 10, 0, -1, 0));
+ len += sprintf(buffer + len,
+ " window %ld\n",
+ pAC->stats.tx_window_errors);
+
+ }
+ }
+ SkgeProcDev = next;
+ }
+ if (offset >= len) {
+ *eof = 1;
+ return 0;
+ }
- len += sprintf(buf + len, "Received bytes %Ld\n",
- (unsigned long long) pPnmiStat->StatRxOctetsOkCts);
- len += sprintf(buf + len, "Received packets %Ld\n",
- (unsigned long long) pPnmiStat->StatRxOkCts);
- len += sprintf(buf + len, "Received errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxFcsCts);
- len += sprintf(buf + len, "Received dropped %Ld\n",
- (unsigned long long) pPnmiStruct->RxNoBufCts);
- len += sprintf(buf + len, "Received multicast %Ld\n",
- (unsigned long long) pPnmiStat->StatRxMulticastOkCts);
- len += sprintf(buf + len, "Received errors types\n");
- len += sprintf(buf + len, " length errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxRuntCts);
- len += sprintf(buf + len, " over errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxFifoOverflowCts);
- len += sprintf(buf + len, " crc errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxFcsCts);
- len += sprintf(buf + len, " frame errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxFramingCts);
- len += sprintf(buf + len, " fifo errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxFifoOverflowCts);
- len += sprintf(buf + len, " missed errors %Ld\n",
- (unsigned long long) pPnmiStat->StatRxMissedCts);
-
- /*Transmit statistics */
- len += sprintf(buf + len, "\nTransmit statistics\n\n");
-
- len += sprintf(buf + len, "Transmit bytes %Ld\n",
- (unsigned long long) pPnmiStat->StatTxOctetsOkCts);
- len += sprintf(buf + len, "Transmit packets %Ld\n",
- (unsigned long long) pPnmiStat->StatTxOkCts);
- len += sprintf(buf + len, "Transmit errors %Ld\n",
- (unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
- len += sprintf(buf + len, "Transmit dropped %Ld\n",
- (unsigned long long) pPnmiStruct->TxNoBufCts);
- len += sprintf(buf + len, "Transmit collisions %Ld\n",
- (unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
- len += sprintf(buf + len, "Transmited errors types\n");
- len += sprintf(buf + len, " aborted errors %ld\n",
- pAC->stats.tx_aborted_errors);
- len += sprintf(buf + len, " carrier errors %Ld\n",
- (unsigned long long) pPnmiStat->StatTxCarrierCts);
- len += sprintf(buf + len, " fifo errors %Ld\n",
- (unsigned long long) pPnmiStat->StatTxFifoUnderrunCts);
- len += sprintf(buf + len, " heartbeat errors %Ld\n",
- (unsigned long long) pPnmiStat->StatTxCarrierCts);
- len += sprintf(buf + len, " window errors %ld\n",
- pAC->stats.tx_window_errors);
- return len;
+ *buffer_location = buffer + offset;
+ if (buffer_length >= len - offset) {
+ *eof = 1;
+ }
+ return (min_t(int, buffer_length, len - offset));
}
-static ssize_t sk_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
+
+
+
+
+/*****************************************************************************
+ *
+ * SkDoDiv - convert 64bit number
+ *
+ * Description:
+ * This function "converts" a long long number.
+ *
+ * Returns:
+ * remainder of division
+ */
+static long SkDoDiv (long long Dividend, int Divisor, long long *pErg)
{
- struct inode * inode = file->f_dentry->d_inode;
- struct proc_dir_entry *entry = PDE(inode);
- char *page = (char *)__get_free_page(GFP_KERNEL);
- struct net_device *dev;
- loff_t pos = *ppos;
- ssize_t res = 0;
- int len = 0;
+ long Rest;
+ long long Ergebnis;
+ long Akku;
- if (!page)
- return -ENOMEM;
- spin_lock(&sk_devs_lock);
- dev = entry->data;
- if (dev)
- len = sk_show_dev(dev, page);
- spin_unlock(&sk_devs_lock);
-
- if (pos >= 0 && pos < len) {
- res = nbytes;
- if (res > len - pos)
- res = len - pos;
- if (copy_to_user(page + pos, buf, nbytes))
- res = -EFAULT;
- else
- *ppos = pos + res;
- }
- free_page((unsigned long) page);
- return nbytes;
+ Akku = Dividend >> 32;
+
+ Ergebnis = ((long long) (Akku / Divisor)) << 32;
+ Rest = Akku % Divisor ;
+
+ Akku = Rest << 16;
+ Akku |= ((Dividend & 0xFFFF0000) >> 16);
+
+
+ Ergebnis += ((long long) (Akku / Divisor)) << 16;
+ Rest = Akku % Divisor ;
+
+ Akku = Rest << 16;
+ Akku |= (Dividend & 0xFFFF);
+
+ Ergebnis += (Akku / Divisor);
+ Rest = Akku % Divisor ;
+
+ *pErg = Ergebnis;
+ return (Rest);
}
-static loff_t sk_lseek(struct file *file, loff_t offset, int orig)
+
+#if 0
+#define do_div(n,base) ({ \
+long long __res; \
+__res = ((unsigned long long) n) % (unsigned) base; \
+n = ((unsigned long long) n) / (unsigned) base; \
+__res; })
+
+#endif
+
+
+/*****************************************************************************
+ *
+ * SkNumber - Print results
+ *
+ * Description:
+ * This function converts a long long number into a string.
+ *
+ * Returns:
+ * number as string
+ */
+char * SkNumber(char * str, long long num, int base, int size, int precision
+ ,int type)
{
- switch (orig) {
- case 1:
- offset += file->f_pos;
- case 0:
- if (offset >= 0)
- return file->f_pos = offset;
+ char c,sign,tmp[66], *strorg = str;
+ const char *digits="0123456789abcdefghijklmnopqrstuvwxyz";
+ int i;
+
+ if (type & LARGE)
+ digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
+ if (type & LEFT)
+ type &= ~ZEROPAD;
+ if (base < 2 || base > 36)
+ return 0;
+ c = (type & ZEROPAD) ? '0' : ' ';
+ sign = 0;
+ if (type & SIGN) {
+ if (num < 0) {
+ sign = '-';
+ num = -num;
+ size--;
+ } else if (type & PLUS) {
+ sign = '+';
+ size--;
+ } else if (type & SPACE) {
+ sign = ' ';
+ size--;
+ }
}
- return -EINVAL;
+ if (type & SPECIALX) {
+ if (base == 16)
+ size -= 2;
+ else if (base == 8)
+ size--;
+ }
+ i = 0;
+ if (num == 0)
+ tmp[i++]='0';
+ else while (num != 0)
+ tmp[i++] = digits[SkDoDiv(num,base, &num)];
+
+ if (i > precision)
+ precision = i;
+ size -= precision;
+ if (!(type&(ZEROPAD+LEFT)))
+ while(size-->0)
+ *str++ = ' ';
+ if (sign)
+ *str++ = sign;
+ if (type & SPECIALX) {
+ if (base==8)
+ *str++ = '0';
+ else if (base==16) {
+ *str++ = '0';
+ *str++ = digits[33];
+ }
+ }
+ if (!(type & LEFT))
+ while (size-- > 0)
+ *str++ = c;
+ while (i < precision--)
+ *str++ = '0';
+ while (i-- > 0)
+ *str++ = tmp[i];
+ while (size-- > 0)
+ *str++ = ' ';
+
+ str[0] = '\0';
+
+ return strorg;
}
-struct file_operations sk_proc_fops = {
- .read = sk_read,
- .llseek = sk_lseek,
-};
+
+
diff -Nru a/drivers/net/sk98lin/skqueue.c b/drivers/net/sk98lin/skqueue.c
--- a/drivers/net/sk98lin/skqueue.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/sk98lin/skqueue.c Sun Aug 3 13:14:46 2003
@@ -1,32 +1,23 @@
/******************************************************************************
*
* Name: skqueue.c
- * Project: PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.14 $
- * Date: $Date: 1998/10/15 15:11:35 $
+ * Project: Gigabit Ethernet Adapters, Schedule-Modul
+ * Version: $Revision: 1.19 $
+ * Date: $Date: 2003/05/13 18:00:07 $
* Purpose: Management of an event queue.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1989-1998 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- * All Rights Reserved
- *
- * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF SYSKONNECT
- * The copyright notice above does not evidence any
- * actual or intended publication of such source code.
- *
- * This Module contains Proprietary Information of SysKonnect
- * and should be treated as Confidential.
- *
- * The information in this file is provided for the exclusive use of
- * the licensees of SysKonnect.
- * Such users have the right to use, modify, and incorporate this code
- * into products for purposes authorized by the license agreement
- * provided they include this notice and the associated copyright notice
- * with any such product.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
@@ -36,6 +27,22 @@
* History:
*
* $Log: skqueue.c,v $
+ * Revision 1.19 2003/05/13 18:00:07 mkarl
+ * Removed calls to RLMT, TWSI, and PNMI for SLIM driver (SK_SLIM).
+ * Editorial changes.
+ *
+ * Revision 1.18 2002/05/07 14:11:11 rwahl
+ * Fixed Watcom Precompiler error.
+ *
+ * Revision 1.17 2002/03/25 10:06:41 mkunz
+ * SkIgnoreEvent deleted
+ *
+ * Revision 1.16 2002/03/15 10:51:59 mkunz
+ * Added event classes for link aggregation
+ *
+ * Revision 1.15 1999/11/22 13:36:29 cgoos
+ * Changed license header to GPL.
+ *
* Revision 1.14 1998/10/15 15:11:35 gklug
* fix: ID_sccs to SysKonnectFileId
*
@@ -87,8 +94,10 @@
/*
Event queue and dispatcher
*/
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
- "$Header: /usr56/projects/ge/schedule/skqueue.c,v 1.14 1998/10/15 15:11:35 gklug Exp $" ;
+ "$Header: /usr56/projects/ge/schedule/skqueue.c,v 1.19 2003/05/13 18:00:07 mkarl Exp $" ;
+#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/skqueue.h" /* Queue Definitions */
@@ -153,7 +162,7 @@
* send command to state machine
* end
* return error reported by individual Event function
- * 0 if no error occurred.
+ * 0 if no error occured.
*/
int SkEventDispatcher(
SK_AC *pAC, /* Adapters Context */
@@ -168,9 +177,8 @@
while (pEv != pAC->Event.EvPut) {
PRINTF("dispatch Class %d Event %d\n",pEv->Class,pEv->Event) ;
switch(Class = pEv->Class) {
- case SKGE_DRV : /* Driver Event */
- Rtv = SkDrvEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
+#ifndef SK_USE_LAC_EV
+#ifndef SK_SLIM
case SKGE_RLMT : /* RLMT Event */
Rtv = SkRlmtEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
@@ -180,9 +188,34 @@
case SKGE_PNMI :
Rtv = SkPnmiEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
+#endif /* not SK_SLIM */
+#endif /* not SK_USE_LAC_EV */
+ case SKGE_DRV : /* Driver Event */
+ Rtv = SkDrvEvent(pAC,Ioc,pEv->Event,pEv->Para);
+ break ;
+#ifndef SK_USE_SW_TIMER
case SKGE_HWAC :
Rtv = SkGeSirqEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
+#else /* !SK_USE_SW_TIMER */
+ case SKGE_SWT :
+ Rtv = SkSwtEvent(pAC,Ioc,pEv->Event,pEv->Para);
+ break ;
+#endif /* !SK_USE_SW_TIMER */
+#ifdef SK_USE_LAC_EV
+ case SKGE_LACP :
+ Rtv = SkLacpEvent(pAC,Ioc,pEv->Event,pEv->Para);
+ break ;
+ case SKGE_RSF :
+ Rtv = SkRsfEvent(pAC,Ioc,pEv->Event,pEv->Para);
+ break ;
+ case SKGE_MARKER :
+ Rtv = SkMarkerEvent(pAC,Ioc,pEv->Event,pEv->Para);
+ break ;
+ case SKGE_FD :
+ Rtv = SkFdEvent(pAC,Ioc,pEv->Event,pEv->Para);
+ break ;
+#endif /* SK_USE_LAC_EV */
#ifdef SK_USE_CSUM
case SKGE_CSUM :
Rtv = SkCsEvent(pAC,Ioc,pEv->Event,pEv->Para);
diff -Nru a/drivers/net/sk98lin/skrlmt.c b/drivers/net/sk98lin/skrlmt.c
--- a/drivers/net/sk98lin/skrlmt.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/sk98lin/skrlmt.c Sun Aug 3 13:14:49 2003
@@ -2,15 +2,16 @@
*
* Name: skrlmt.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.61 $
- * Date: $Date: 2001/03/14 12:52:08 $
+ * Version: $Revision: 1.69 $
+ * Date: $Date: 2003/04/15 09:39:22 $
* Purpose: Manage links on SK-NET Adapters, esp. redundant ones.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,37 @@
* History:
*
* $Log: skrlmt.c,v $
+ * Revision 1.69 2003/04/15 09:39:22 tschilli
+ * Copyright messages changed.
+ * "#error C++ is not yet supported." removed.
+ *
+ * Revision 1.68 2003/01/31 15:26:56 rschmidt
+ * Added init for local variables in RlmtInit().
+ *
+ * Revision 1.67 2003/01/31 14:12:41 mkunz
+ * single port adapter runs now with two identical MAC addresses
+ *
+ * Revision 1.66 2002/09/23 15:14:19 rwahl
+ * - Reset broadcast timestamp on link down.
+ * - Editorial corrections.
+ *
+ * Revision 1.65 2002/07/22 14:29:48 rwahl
+ * - Removed BRK statement from debug check.
+ *
+ * Revision 1.64 2001/11/28 19:36:14 rwahl
+ * - RLMT Packets sent to an invalid MAC address in CLP/CLPSS mode
+ * (#10650).
+ * - Reworked fix for port switching in CLS mode (#10639)
+ * (no dependency to RLMT module).
+ * - Enabled dbg output for entry/exit of event functions.
+ * - Editorial changes.
+ *
+ * Revision 1.63 2001/10/26 07:53:18 afischer
+ * Port switching bug in `check local link` mode
+ *
+ * Revision 1.62 2001/07/03 12:16:30 mkunz
+ * New Flag ChgBcPrio (Change priority of last broadcast received)
+ *
* Revision 1.61 2001/03/14 12:52:08 rassmann
* Fixed reporting of active port up/down to PNMI.
*
@@ -255,13 +287,12 @@
#ifndef lint
static const char SysKonnectFileId[] =
- "@(#) $Id: skrlmt.c,v 1.61 2001/03/14 12:52:08 rassmann Exp $ (C) SysKonnect.";
+ "@(#) $Id: skrlmt.c,v 1.69 2003/04/15 09:39:22 tschilli Exp $ (C) Marvell.";
#endif /* !defined(lint) */
#define __SKRLMT_C
#ifdef __cplusplus
-#error C++ is not yet supported.
extern "C" {
#endif /* cplusplus */
@@ -561,6 +592,10 @@
SK_U32 i, j;
SK_U64 Random;
SK_EVPARA Para;
+ SK_MAC_ADDR VirtualMacAddress;
+ SK_MAC_ADDR PhysicalAMacAddress;
+ SK_BOOL VirtualMacAddressSet;
+ SK_BOOL PhysicalAMacAddressSet;
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_INIT,
("RLMT Init level %d.\n", Level))
@@ -585,8 +620,8 @@
for (i = 0; i < SK_MAX_NETS; i++) {
pAC->Rlmt.Net[i].RlmtState = SK_RLMT_RS_INIT;
pAC->Rlmt.Net[i].RootIdSet = SK_FALSE;
- pAC->Rlmt.Net[i].Preference = 0xFFFFFFFF; /* Automatic. */
pAC->Rlmt.Net[i].PrefPort = SK_RLMT_DEF_PREF_PORT;
+ pAC->Rlmt.Net[i].Preference = 0xFFFFFFFF; /* Automatic. */
/* Just assuming. */
pAC->Rlmt.Net[i].ActivePort = pAC->Rlmt.Net[i].PrefPort;
pAC->Rlmt.Net[i].RlmtMode = SK_RLMT_DEF_MODE;
@@ -608,7 +643,7 @@
pAC->Rlmt.Net[0].NumPorts = pAC->GIni.GIMacsFound;
/* Initialize HW registers? */
- if (pAC->GIni.GIMacsFound < 2) {
+ if (pAC->GIni.GIMacsFound == 1) {
Para.Para32[0] = SK_RLMT_MODE_CLS;
Para.Para32[1] = 0;
(void)SkRlmtEvent(pAC, IoC, SK_RLMT_MODE_CHANGE, Para);
@@ -644,6 +679,38 @@
(void)SkAddrMcUpdate(pAC, IoC, i);
}
+
+ VirtualMacAddressSet = SK_FALSE;
+ /* Read virtual MAC address from Control Register File. */
+ for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
+
+ SK_IN8(IoC, B2_MAC_1 + j, &VirtualMacAddress.a[j]);
+ VirtualMacAddressSet |= VirtualMacAddress.a[j];
+ }
+
+ PhysicalAMacAddressSet = SK_FALSE;
+ /* Read physical MAC address for MAC A from Control Register File. */
+ for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
+
+ SK_IN8(IoC, B2_MAC_2 + j, &PhysicalAMacAddress.a[j]);
+ PhysicalAMacAddressSet |= PhysicalAMacAddress.a[j];
+ }
+
+ /* check if the two mac addresses contain reasonable values */
+ if (!VirtualMacAddressSet || !PhysicalAMacAddressSet) {
+
+ pAC->Rlmt.RlmtOff = SK_TRUE;
+ }
+
+ /* if the two mac addresses are equal switch off the RLMT_PRE_LOOKAHEAD
+ and the RLMT_LOOKAHEAD macros */
+ else if (SK_ADDR_EQUAL(PhysicalAMacAddress.a, VirtualMacAddress.a)) {
+
+ pAC->Rlmt.RlmtOff = SK_TRUE;
+ }
+ else {
+ pAC->Rlmt.RlmtOff = SK_FALSE;
+ }
break;
default: /* error */
@@ -714,7 +781,7 @@
FirstMacUp = pAC->Rlmt.Net[NetIdx].Port[i];
}
else {
- pAC->Rlmt.Net[NetIdx].Port[i]->PortCheck[
+ PrevMacUp->PortCheck[
pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked].CheckAddr =
pAC->Rlmt.Net[NetIdx].Port[i]->AddrPort->CurrentMacAddress;
PrevMacUp->PortCheck[
@@ -737,13 +804,13 @@
#ifdef DEBUG
for (i = 0; i < pAC->Rlmt.Net[NetIdx].NumPorts; i++) {
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Port %d checks %d other ports: %2X.\n", NetIdx,
+ ("Port %d checks %d other ports: %2X.\n", i,
pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked,
pAC->Rlmt.Net[NetIdx].Port[i]->PortCheck[0].CheckAddr.a[5]))
}
#endif /* DEBUG */
- return;
+ return;
} /* SkRlmtBuildCheckChain */
@@ -773,6 +840,22 @@
SK_MBUF *pMb;
SK_RLMT_PACKET *pPacket;
+#ifdef DEBUG
+ SK_U8 CheckSrc = 0;
+ SK_U8 CheckDest = 0;
+
+ for (i = 0; i < SK_MAC_ADDR_LEN; ++i) {
+ CheckSrc |= SrcAddr->a[i];
+ CheckDest |= DestAddr->a[i];
+ }
+
+ if ((CheckSrc == 0) || (CheckDest == 0)) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_ERR,
+ ("SkRlmtBuildPacket: Invalid %s%saddr.\n",
+ (CheckSrc == 0 ? "Src" : ""), (CheckDest == 0 ? "Dest" : "")))
+ }
+#endif
+
if ((pMb = SkDrvAllocRlmtMbuf(pAC, IoC, SK_RLMT_MAX_PACKET_SIZE)) != NULL) {
pPacket = (SK_RLMT_PACKET*)pMb->pData;
for (i = 0; i < SK_MAC_ADDR_LEN; i++) {
@@ -814,7 +897,7 @@
}
}
- return (pMb);
+ return (pMb);
} /* SkRlmtBuildPacket */
@@ -896,7 +979,7 @@
pAC->Rlmt.Port[PortNumber].TxSpHelloReqCts++;
}
- return (pMb);
+ return (pMb);
} /* SkRlmtBuildSpanningTreePacket */
@@ -963,8 +1046,8 @@
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_TX,
("SkRlmtSend: BPDU Packet on Port %u.\n", PortNumber))
}
- }
- return;
+ }
+ return;
} /* SkRlmtSend */
@@ -1304,7 +1387,7 @@
pRPort->Root.Id[0], pRPort->Root.Id[1],
pRPort->Root.Id[2], pRPort->Root.Id[3],
pRPort->Root.Id[4], pRPort->Root.Id[5],
- pRPort->Root.Id[6], pRPort->Root.Id[7]))
+ pRPort->Root.Id[6], pRPort->Root.Id[7]))
}
SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
@@ -1467,10 +1550,10 @@
SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
}
- NewTimeout = SK_RLMT_DEF_TO_VAL;
+ NewTimeout = SK_RLMT_DEF_TO_VAL;
}
- return (NewTimeout);
+ return (NewTimeout);
} /* SkRlmtCheckPort */
@@ -1504,13 +1587,14 @@
/* Select port with the latest TimeStamp. */
for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
-#ifdef xDEBUG
+
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("TimeStamp Port %d: %08x %08x.\n",
+ ("TimeStamp Port %d (Down: %d, NoRx: %d): %08x %08x.\n",
i,
+ pAC->Rlmt.Port[i].PortDown, pAC->Rlmt.Port[i].PortNoRx,
*((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_HI32),
*((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_LO32)))
-#endif /* DEBUG */
+
if (!pAC->Rlmt.Port[i].PortDown && !pAC->Rlmt.Port[i].PortNoRx) {
if (!PortFound || pAC->Rlmt.Port[i].BcTimeStamp > BcTimeStamp) {
BcTimeStamp = pAC->Rlmt.Port[i].BcTimeStamp;
@@ -1521,10 +1605,8 @@
}
if (PortFound) {
-#if 0
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("Port %d received the last broadcast.\n", *pSelect))
-#endif /* 0 */
/* Look if another port's time stamp is similar. */
for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
@@ -1537,19 +1619,19 @@
pAC->Rlmt.Port[i].BcTimeStamp +
SK_RLMT_BC_DELTA > BcTimeStamp)) {
PortFound = SK_FALSE;
-#ifdef xDEBUG
+
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("Port %d received a broadcast at a similar time.\n", i))
-#endif /* DEBUG */
break;
}
}
}
-#ifdef xDEBUG
+#ifdef DEBUG
if (PortFound) {
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_CHECK_SWITCH found Port %d receiving the substantially latest broadcast (%d).\n",
+ ("SK_RLMT_SELECT_BCRX found Port %d receiving the substantially "
+ "latest broadcast (%u).\n",
*pSelect,
BcTimeStamp - pAC->Rlmt.Port[1 - *pSelect].BcTimeStamp))
}
@@ -1599,7 +1681,7 @@
}
PortFound = SK_TRUE;
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_CHECK_SWITCH found Port %d up and not check RX.\n",
+ ("SK_RLMT_SELECT_NOTSUSPECT found Port %d up and not check RX.\n",
*pSelect))
break;
}
@@ -1649,7 +1731,7 @@
}
PortFound = SK_TRUE;
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_CHECK_SWITCH found Port %d up.\n", *pSelect))
+ ("SK_RLMT_SELECT_UP found Port %d up.\n", *pSelect))
break;
}
}
@@ -1710,7 +1792,7 @@
}
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_CHECK_SWITCH found Port %d going up.\n", *pSelect))
+ ("SK_RLMT_SELECT_GOINGUP found Port %d going up.\n", *pSelect))
return (SK_TRUE);
} /* SkRlmtSelectGoingUp */
@@ -1756,7 +1838,7 @@
}
PortFound = SK_TRUE;
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_CHECK_SWITCH found Port %d down.\n", *pSelect))
+ ("SK_RLMT_SELECT_DOWN found Port %d down.\n", *pSelect))
break;
}
}
@@ -1794,6 +1876,13 @@
PortFound = SK_FALSE;
pAC->Rlmt.CheckSwitch = SK_FALSE;
+#if 0 /* RW 2001/10/18 - active port becomes always prefered one */
+ if (pAC->Rlmt.Net[NetIdx].Preference == 0xFFFFFFFF) { /* Automatic */
+ /* disable auto-fail back */
+ PrefPort = Active;
+ }
+#endif
+
if (pAC->Rlmt.Net[NetIdx].LinksUp == 0) {
/* Last link went down - shut down the net. */
pAC->Rlmt.Net[NetIdx].RlmtState = SK_RLMT_RS_NET_DOWN;
@@ -1882,7 +1971,10 @@
* else
* SwitchSoft
*/
- if (pAC->Rlmt.Net[0].RlmtMode != SK_RLMT_MODE_CLS) {
+ /* check of ChgBcPrio flag added */
+ if ((pAC->Rlmt.Net[0].RlmtMode != SK_RLMT_MODE_CLS) &&
+ (!pAC->Rlmt.Net[0].ChgBcPrio)) {
+
if (!PortFound) {
PortFound = SkRlmtSelectBcRx(
pAC, IoC, Active, PrefPort, &Para.Para32[1]);
@@ -1894,6 +1986,20 @@
}
} /* pAC->Rlmt.RlmtMode != SK_RLMT_MODE_CLS */
+ /* with changed priority for last broadcast received */
+ if ((pAC->Rlmt.Net[0].RlmtMode != SK_RLMT_MODE_CLS) &&
+ (pAC->Rlmt.Net[0].ChgBcPrio)) {
+ if (!PortFound) {
+ PortFound = SkRlmtSelectNotSuspect(
+ pAC, IoC, Active, PrefPort, &Para.Para32[1]);
+ }
+
+ if (!PortFound) {
+ PortFound = SkRlmtSelectBcRx(
+ pAC, IoC, Active, PrefPort, &Para.Para32[1]);
+ }
+ } /* pAC->Rlmt.RlmtMode != SK_RLMT_MODE_CLS */
+
if (!PortFound) {
PortFound = SkRlmtSelectUp(
pAC, IoC, Active, PrefPort, &Para.Para32[1], AUTONEG_SUCCESS);
@@ -1927,6 +2033,7 @@
} /* pAC->Rlmt.RlmtMode != SK_RLMT_MODE_CLS */
if (PortFound) {
+
if (Para.Para32[1] != Active) {
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("Active: %d, Para1: %d.\n", Active, Para.Para32[1]))
@@ -2369,6 +2476,7 @@
pRPort->PacketsPerTimeSlot = 0;
/* pRPort->DataPacketsPerTimeSlot = 0; */
pRPort->BpduPacketsPerTimeSlot = 0;
+ pRPort->BcTimeStamp = 0;
/*
* RA;:;: To be checked:
@@ -2639,7 +2747,7 @@
}
/* Stop RLMT timers. */
- SkTimerStop(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].LocTimer);
+ SkTimerStop(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].LocTimer);
SkTimerStop(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].SegTimer);
/* Stop net. */
@@ -2698,10 +2806,8 @@
SK_U32 PortNumber;
SK_U32 i;
-#if 0
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("SK_RLMT_TIM Event BEGIN.\n"))
-#endif /* 0 */
if (Para.Para32[1] != (SK_U32)-1) {
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
@@ -2778,10 +2884,8 @@
SK_RLMT_RCS_SEG | SK_RLMT_RCS_REPORT_SEG;
}
-#if 0
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("SK_RLMT_TIM Event END.\n"))
-#endif /* 0 */
} /* SkRlmtEvtTim */
@@ -2804,7 +2908,7 @@
SK_IOC IoC, /* I/O Context */
SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
{
-#ifdef XDEBUG
+#ifdef xDEBUG
int j;
#endif /* DEBUG */
@@ -2820,7 +2924,7 @@
}
#ifdef xDEBUG
- for (j = 0; i < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; j++) {
+ for (j = 0; j < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; j++) {
SK_ADDR_PORT *pAPort;
SK_U32 k;
SK_U16 *InAddr;
@@ -2842,8 +2946,8 @@
pAPort->Exact[k].a[4], pAPort->Exact[k].a[5]))
}
}
-#endif /* DEBUG */
-
+#endif /* xDEBUG */
+
SkRlmtCheckSeg(pAC, IoC, Para.Para32[0]);
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
@@ -2874,10 +2978,9 @@
SK_MBUF *pNextMb;
SK_U32 NetNumber;
-#if 0
+
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("SK_RLMT_PACKET_RECEIVED Event BEGIN.\n"))
-#endif /* 0 */
/* Should we ignore frames during port switching? */
@@ -2905,10 +3008,8 @@
}
}
-#if 0
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("SK_RLMT_PACKET_RECEIVED Event END.\n"))
-#endif /* 0 */
} /* SkRlmtEvtPacketRx */
@@ -2987,6 +3088,9 @@
SK_IOC IoC, /* I/O Context */
SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
{
+ SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
+ ("SK_RLMT_STATS_UPDATE Event BEGIN.\n"))
+
if (Para.Para32[1] != (SK_U32)-1) {
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("Bad Parameter.\n"))
@@ -3003,15 +3107,10 @@
return;
}
-#if 0
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_UPDATE Event BEGIN.\n"))
-
/* Update statistics - currently always up-to-date. */
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
("SK_RLMT_STATS_UPDATE Event END.\n"))
-#endif /* 0 */
} /* SkRlmtEvtStatsUpdate */
@@ -3236,7 +3335,7 @@
Para.Para32[0] |= SK_RLMT_CHECK_LINK;
- if (pAC->Rlmt.Net[Para.Para32[1]].NumPorts < 2 &&
+ if ((pAC->Rlmt.Net[Para.Para32[1]].NumPorts == 1) &&
Para.Para32[0] != SK_RLMT_MODE_CLS) {
pAC->Rlmt.Net[Para.Para32[1]].RlmtMode = SK_RLMT_MODE_CLS;
SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
@@ -3399,7 +3498,7 @@
break;
} /* switch() */
- return (0);
+ return (0);
} /* SkRlmtEvent */
#ifdef __cplusplus
diff -Nru a/drivers/net/sk98lin/sktimer.c b/drivers/net/sk98lin/sktimer.c
--- a/drivers/net/sk98lin/sktimer.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/sk98lin/sktimer.c Sun Aug 3 13:14:45 2003
@@ -1,32 +1,23 @@
/******************************************************************************
*
* Name: sktimer.c
- * Project: PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.11 $
- * Date: $Date: 1998/12/17 13:24:13 $
+ * Project: Gigabit Ethernet Adapters, Schedule-Modul
+ * Version: $Revision: 1.13 $
+ * Date: $Date: 2003/05/13 18:01:01 $
* Purpose: High level timer functions.
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1989-1998 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- * All Rights Reserved
- *
- * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF SYSKONNECT
- * The copyright notice above does not evidence any
- * actual or intended publication of such source code.
- *
- * This Module contains Proprietary Information of SysKonnect
- * and should be treated as Confidential.
- *
- * The information in this file is provided for the exclusive use of
- * the licensees of SysKonnect.
- * Such users have the right to use, modify, and incorporate this code
- * into products for purposes authorized by the license agreement
- * provided they include this notice and the associated copyright notice
- * with any such product.
+ * (C)Copyright 1998-2002 SysKonnect GmbH.
+ * (C)Copyright 2002-2003 Marvell.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
@@ -36,6 +27,12 @@
* History:
*
* $Log: sktimer.c,v $
+ * Revision 1.13 2003/05/13 18:01:01 mkarl
+ * Editorial changes.
+ *
+ * Revision 1.12 1999/11/22 13:38:51 cgoos
+ * Changed license header to GPL.
+ *
* Revision 1.11 1998/12/17 13:24:13 gklug
* fix: restart problem: do NOT destroy timer queue if init 1 is done
*
@@ -81,8 +78,10 @@
/*
Event queue and dispatcher
*/
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
- "$Header: /usr56/projects/ge/schedule/sktimer.c,v 1.11 1998/12/17 13:24:13 gklug Exp $" ;
+ "$Header: /usr56/projects/ge/schedule/sktimer.c,v 1.13 2003/05/13 18:01:01 mkarl Exp $" ;
+#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
diff -Nru a/drivers/net/sk98lin/skvpd.c b/drivers/net/sk98lin/skvpd.c
--- a/drivers/net/sk98lin/skvpd.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/sk98lin/skvpd.c Sun Aug 3 13:14:49 2003
@@ -2,16 +2,15 @@
*
* Name: skvpd.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.26 $
- * Date: $Date: 2000/06/13 08:00:01 $
+ * Version: $Revision: 1.37 $
+ * Date: $Date: 2003/01/13 10:42:45 $
* Purpose: Shared software to read and write VPD data
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
+ * (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,6 +26,47 @@
* History:
*
* $Log: skvpd.c,v $
+ * Revision 1.37 2003/01/13 10:42:45 rschmidt
+ * Replaced check for PCI device Id from YUKON with GENESIS
+ * to set the VPD size in VpdInit()
+ * Editorial changes
+ *
+ * Revision 1.36 2002/11/14 15:16:56 gheinig
+ * Added const specifier to key and buf parameters for VpdPara, VpdRead
+ * and VpdWrite for Diag 7 GUI
+ *
+ * Revision 1.35 2002/10/21 14:31:59 gheinig
+ * Took out CVS web garbage at head of file
+ *
+ * Revision 1.34 2002/10/21 11:47:24 gheinig
+ * Reverted to version 1.32 due to unwanted commit
+ *
+ * Revision 1.32 2002/10/14 16:04:29 rschmidt
+ * Added saving of VPD ROM Size from PCI_OUR_REG_2
+ * Avoid reading of PCI_OUR_REG_2 in VpdTransferBlock()
+ * Editorial changes
+ *
+ * Revision 1.31 2002/09/10 09:21:32 mkarl
+ * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis
+ *
+ * Revision 1.30 2002/09/09 14:43:03 mkarl
+ * changes for diagnostics in order to read VPD data before the adapter
+ * has been initialized
+ * editorial changes
+ *
+ * Revision 1.29 2002/07/26 13:20:43 mkarl
+ * added Yukon support
+ * save size of VPD in pAC->vpd.vpd_size
+ *
+ * Revision 1.28 2002/04/02 15:31:47 afischer
+ * Bug fix in VpdWait()
+ *
+ * Revision 1.27 2000/08/10 11:29:06 rassmann
+ * Editorial changes.
+ * Preserving 32-bit alignment in structs for the adapter context.
+ * Removed unused function VpdWriteDword() (#if 0).
+ * Made VpdReadKeyword() available for SKDIAG only.
+ *
* Revision 1.26 2000/06/13 08:00:01 mkarl
* additional cast to avoid compile problems in 64 bit environment
*
@@ -66,11 +106,11 @@
*
* Revision 1.14 1998/10/28 07:20:38 gklug
* chg: Interface functions to use IoC as parameter as well
- * fix: VpdRead/WriteDWord now return SK_U32
+ * fix: VpdRead/WriteDWord now returns SK_U32
* chg: VPD_IN/OUT names conform to SK_IN/OUT
* add: usage of VPD_IN/OUT8 macros
* add: VpdRead/Write Stream functions to r/w a stream of data
- * fix: VpdTransferBlock swapped illeagal
+ * fix: VpdTransferBlock swapped illegal
* add: VpdMayWrite
*
* Revision 1.13 1998/10/22 10:02:37 gklug
@@ -86,7 +126,7 @@
* Remove CvsId by SysKonnectFileId.
*
* Revision 1.9 1998/09/16 07:33:52 malthoff
- * remove memcmp() by SK_MEMCMP and
+ * replace memcmp() by SK_MEMCMP and
* memcpy() by SK_MEMCPY() to be
* independent from the 'C' Standard Library.
*
@@ -94,7 +134,7 @@
* compiler fix: use SK_VPD_KEY instead of S_VPD.
*
* Revision 1.7 1998/08/19 08:14:01 gklug
- * fix: remove struct keyword as much as possible from the c-code (see CCC)
+ * fix: remove struct keyword as much as possible from the C-code (see CCC)
*
* Revision 1.6 1998/08/18 13:03:58 gklug
* SkOsGetTime now returns SK_U64
@@ -121,10 +161,10 @@
******************************************************************************/
/*
- Please refer skvpd.txt for information how to include this module
+ Please refer skvpd.txt for infomation how to include this module
*/
static const char SysKonnectFileId[] =
- "@(#)$Id: skvpd.c,v 1.26 2000/06/13 08:00:01 mkarl Exp $ (C) SK" ;
+ "@(#)$Id: skvpd.c,v 1.37 2003/01/13 10:42:45 rschmidt Exp $ (C) SK";
#include "h/skdrv1st.h"
#include "h/sktypes.h"
@@ -137,46 +177,60 @@
#ifndef SK_KR_PROTO
static SK_VPD_PARA *vpd_find_para(
SK_AC *pAC,
- char *key,
- SK_VPD_PARA *p) ;
+ const char *key,
+ SK_VPD_PARA *p);
#else /* SK_KR_PROTO */
-static SK_VPD_PARA *vpd_find_para() ;
+static SK_VPD_PARA *vpd_find_para();
#endif /* SK_KR_PROTO */
/*
- * waits for a completetion of a VPD transfer
+ * waits for a completion of a VPD transfer
* The VPD transfer must complete within SK_TICKS_PER_SEC/16
*
* returns 0: success, transfer completes
* error exit(9) with a error message
*/
-static int VpdWait(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
+static int VpdWait(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC, /* IO Context */
int event) /* event to wait for (VPD_READ / VPD_write) completion*/
{
- SK_U64 start_time ;
- SK_U16 state ;
+ SK_U64 start_time;
+ SK_U16 state;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd wait for %s\n",event?"Write":"Read")) ;
- start_time = SkOsGetTime(pAC) ;
+ SK_DBG_MSG(pAC,SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD wait for %s\n", event?"Write":"Read"));
+ start_time = SkOsGetTime(pAC);
do {
- if (SkOsGetTime(pAC) - start_time > SK_TICKS_PER_SEC/16) {
- VPD_STOP(pAC,IoC) ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,
- SK_DBGCAT_FATAL|SK_DBGCAT_ERR,
- ("ERROR:vpd wait timeout\n")) ;
- return(1) ;
- }
- VPD_IN16(pAC,IoC,PCI_VPD_ADR_REG,&state) ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("state = %x, event %x\n",state,event)) ;
- } while((int)(state & PCI_VPD_FLAG) == event) ;
+ if (SkOsGetTime(pAC) - start_time > SK_TICKS_PER_SEC) {
+
+ /* Bug fix AF: Thu Mar 28 2002
+ * Do not call: VPD_STOP(pAC, IoC);
+ * A pending VPD read cycle can not be aborted by writing
+ * VPD_WRITE to the PCI_VPD_ADR_REG (VPD address register).
+ * Although the write threshold in the OUR-register protects
+ * VPD read only space from being overwritten this does not
+ * protect a VPD read from being `converted` into a VPD write
+ * operation (on the fly). As a consequence the VPD_STOP would
+ * delete VPD read only data. In case of any problems with the
+ * I2C bus we exit the loop here. The I2C read operation can
+ * not be aborted except by a reset (->LR).
+ */
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_FATAL | SK_DBGCAT_ERR,
+ ("ERROR:VPD wait timeout\n"));
+ return(1);
+ }
+
+ VPD_IN16(pAC, IoC, PCI_VPD_ADR_REG, &state);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("state = %x, event %x\n",state,event));
+ } while((int)(state & PCI_VPD_FLAG) == event);
- return(0) ;
+ return(0);
}
+#ifdef SKDIAG
/*
* Read the dword at address 'addr' from the VPD EEPROM.
@@ -188,32 +242,37 @@
*
* Returns the data read.
*/
-SK_U32 VpdReadDWord(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
+SK_U32 VpdReadDWord(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC, /* IO Context */
int addr) /* VPD address */
{
- SK_U32 Rtv ;
+ SK_U32 Rtv;
/* start VPD read */
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd read dword at 0x%x\n",addr)) ;
- addr &= ~VPD_WRITE ; /* ensure the R/W bit is set to read */
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD read dword at 0x%x\n",addr));
+ addr &= ~VPD_WRITE; /* ensure the R/W bit is set to read */
- VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG, (SK_U16) addr) ;
+ VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)addr);
/* ignore return code here */
- (void)VpdWait(pAC,IoC,VPD_READ) ;
+ (void)VpdWait(pAC, IoC, VPD_READ);
/* Don't swap here, it's a data stream of bytes */
- Rtv = 0 ;
+ Rtv = 0;
- VPD_IN32(pAC,IoC,PCI_VPD_DAT_REG,&Rtv) ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd read dword data = 0x%x\n",Rtv)) ;
- return (Rtv) ;
+ VPD_IN32(pAC, IoC, PCI_VPD_DAT_REG, &Rtv);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD read dword data = 0x%x\n",Rtv));
+ return(Rtv);
}
+#endif /* SKDIAG */
+
+#if 0
+
/*
Write the dword 'data' at address 'addr' into the VPD EEPROM, and
verify that the data is written.
@@ -233,43 +292,43 @@
Returns 0: success
- 1: error, I2C transfer does not terminate
- 2: error, data verify error
+ 1: error, I2C transfer does not terminate
+ 2: error, data verify error
*/
-#if 0 /* Unused at the moment */
-static int VpdWriteDWord(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
+static int VpdWriteDWord(
+SK_AC *pAC, /* pAC pointer */
+SK_IOC IoC, /* IO Context */
int addr, /* VPD address */
-SK_U32 data) /* VPD data to write */
+SK_U32 data) /* VPD data to write */
{
/* start VPD write */
/* Don't swap here, it's a data stream of bytes */
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd write dword at addr 0x%x, data = 0x%x\n",addr,data)) ;
- VPD_OUT32(pAC,IoC,PCI_VPD_DAT_REG, (SK_U32)data) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data));
+ VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data);
/* But do it here */
- addr |= VPD_WRITE ;
+ addr |= VPD_WRITE;
- VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE)) ;
+ VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE));
/* this may take up to 10,6 ms */
- if (VpdWait(pAC,IoC,VPD_WRITE)) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("Write Timed Out\n")) ;
- return(1) ;
- } ;
+ if (VpdWait(pAC, IoC, VPD_WRITE)) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("Write Timed Out\n"));
+ return(1);
+ };
/* verify data */
- if (VpdReadDWord(pAC,IoC,addr) != data) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR|SK_DBGCAT_FATAL,
- ("Data Verify Error\n")) ;
- return(2) ;
+ if (VpdReadDWord(pAC, IoC, addr) != data) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("Data Verify Error\n"));
+ return(2);
}
- return(0) ;
-}
-#endif
+ return(0);
+} /* VpdWriteDWord */
+
+#endif /* 0 */
/*
* Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
@@ -277,89 +336,88 @@
*
* Returns number of bytes read / written.
*/
-static int VpdWriteStream(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-char *buf, /* data buffer */
+static int VpdWriteStream(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC, /* IO Context */
+char *buf, /* data buffer */
int Addr, /* VPD start address */
int Len) /* number of bytes to read / to write */
{
- int i ;
- int j ;
- SK_U16 AdrReg ;
- int Rtv ;
- SK_U8 * pComp; /* Compare pointer */
- SK_U8 Data ; /* Input Data for Compare */
+ int i;
+ int j;
+ SK_U16 AdrReg;
+ int Rtv;
+ SK_U8 * pComp; /* Compare pointer */
+ SK_U8 Data; /* Input Data for Compare */
/* Init Compare Pointer */
pComp = (SK_U8 *) buf;
- for (i=0; i < Len; i ++, buf++) {
+ for (i = 0; i < Len; i++, buf++) {
if ((i%sizeof(SK_U32)) == 0) {
/*
* At the begin of each cycle read the Data Reg
* So it is initialized even if only a few bytes
* are written.
*/
- AdrReg = (SK_U16) Addr ;
- AdrReg &= ~VPD_WRITE ; /* READ operation */
+ AdrReg = (SK_U16) Addr;
+ AdrReg &= ~VPD_WRITE; /* READ operation */
- VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG, AdrReg) ;
+ VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
- /* ignore return code here */
- Rtv = VpdWait(pAC,IoC,VPD_READ) ;
+ /* Wait for termination */
+ Rtv = VpdWait(pAC, IoC, VPD_READ);
if (Rtv != 0) {
- return(i) ;
+ return(i);
}
}
/* Write current Byte */
- VPD_OUT8(pAC,IoC,PCI_VPD_DAT_REG+(i%sizeof(SK_U32)),
- *(SK_U8*)buf) ;
+ VPD_OUT8(pAC, IoC, PCI_VPD_DAT_REG + (i%sizeof(SK_U32)),
+ *(SK_U8*)buf);
if (((i%sizeof(SK_U32)) == 3) || (i == (Len - 1))) {
/* New Address needs to be written to VPD_ADDR reg */
- AdrReg = (SK_U16) Addr ;
+ AdrReg = (SK_U16) Addr;
Addr += sizeof(SK_U32);
- AdrReg |= VPD_WRITE ; /* WRITE operation */
+ AdrReg |= VPD_WRITE; /* WRITE operation */
- VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG, AdrReg) ;
+ VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
/* Wait for termination */
- Rtv = VpdWait(pAC,IoC,VPD_WRITE) ;
+ Rtv = VpdWait(pAC, IoC, VPD_WRITE);
if (Rtv != 0) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("Write Timed Out\n")) ;
- return(i - (i%sizeof(SK_U32))) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("Write Timed Out\n"));
+ return(i - (i%sizeof(SK_U32)));
}
/*
* Now re-read to verify
*/
- AdrReg &= ~VPD_WRITE ; /* READ operation */
+ AdrReg &= ~VPD_WRITE; /* READ operation */
- VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG, AdrReg) ;
+ VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
/* Wait for termination */
- Rtv = VpdWait(pAC,IoC,VPD_READ) ;
+ Rtv = VpdWait(pAC, IoC, VPD_READ);
if (Rtv != 0) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("Verify Timed Out\n")) ;
- return(i - (i%sizeof(SK_U32))) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("Verify Timed Out\n"));
+ return(i - (i%sizeof(SK_U32)));
}
- for (j = 0; j <= (int) (i%sizeof(SK_U32));
- j ++, pComp ++ ) {
- VPD_IN8(pAC,IoC,PCI_VPD_DAT_REG+j, &Data) ;
+ for (j = 0; j <= (int)(i%sizeof(SK_U32)); j++, pComp++) {
+
+ VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + j, &Data);
+
if (Data != *pComp) {
/* Verify Error */
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,
- SK_DBGCAT_ERR,
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
("WriteStream Verify Error\n"));
return(i - (i%sizeof(SK_U32)) + j);
}
}
-
}
}
@@ -373,86 +431,86 @@
*
* Returns number of bytes read / written.
*/
-static int VpdReadStream(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-char *buf, /* data buffer */
+static int VpdReadStream(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC, /* IO Context */
+char *buf, /* data buffer */
int Addr, /* VPD start address */
int Len) /* number of bytes to read / to write */
{
- int i ;
- SK_U16 AdrReg ;
- int Rtv ;
+ int i;
+ SK_U16 AdrReg;
+ int Rtv;
- for (i=0; i < Len; i ++, buf++) {
+ for (i = 0; i < Len; i++, buf++) {
if ((i%sizeof(SK_U32)) == 0) {
/* New Address needs to be written to VPD_ADDR reg */
- AdrReg = (SK_U16) Addr ;
+ AdrReg = (SK_U16) Addr;
Addr += sizeof(SK_U32);
- AdrReg &= ~VPD_WRITE ; /* READ operation */
+ AdrReg &= ~VPD_WRITE; /* READ operation */
- VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG, AdrReg) ;
+ VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
- /* ignore return code here */
- Rtv = VpdWait(pAC,IoC,VPD_READ) ;
+ /* Wait for termination */
+ Rtv = VpdWait(pAC, IoC, VPD_READ);
if (Rtv != 0) {
- return(i) ;
+ return(i);
}
-
}
- VPD_IN8(pAC,IoC,PCI_VPD_DAT_REG+(i%sizeof(SK_U32)),
- (SK_U8 *)buf) ;
+ VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + (i%sizeof(SK_U32)),
+ (SK_U8 *)buf);
}
- return(Len) ;
+ return(Len);
}
/*
- * Read ore wirtes 'len' bytes of VPD data, starting at 'addr' from
+ * Read ore writes 'len' bytes of VPD data, starting at 'addr' from
* or to the I2C EEPROM.
*
* Returns number of bytes read / written.
*/
-static int VpdTransferBlock(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-char *buf, /* data buffer */
+static int VpdTransferBlock(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC, /* IO Context */
+char *buf, /* data buffer */
int addr, /* VPD start address */
int len, /* number of bytes to read / to write */
int dir) /* transfer direction may be VPD_READ or VPD_WRITE */
{
- int Rtv ; /* Return value */
- int vpd_rom_size ;
- SK_U32 our_reg2 ;
-
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd %s block, addr = 0x%x, len = %d\n",
- dir?"write":"read",addr,len)) ;
+ int Rtv; /* Return value */
+ int vpd_rom_size;
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD %s block, addr = 0x%x, len = %d\n",
+ dir ? "write" : "read", addr, len));
if (len == 0)
- return (0) ;
+ return(0);
- VPD_IN32(pAC,IoC,PCI_OUR_REG_2,&our_reg2) ;
- vpd_rom_size = 256 << ((our_reg2 & PCI_VPD_ROM_SZ) >> 14);
+ vpd_rom_size = pAC->vpd.rom_size;
+
if (addr > vpd_rom_size - 4) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR|SK_DBGCAT_FATAL,
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
("Address error: 0x%x, exp. < 0x%x\n",
- addr, vpd_rom_size - 4)) ;
- return (0) ;
+ addr, vpd_rom_size - 4));
+ return(0);
}
+
if (addr + len > vpd_rom_size) {
- len = vpd_rom_size - addr ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("Warning: len was cut to %d\n",len)) ;
+ len = vpd_rom_size - addr;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("Warning: len was cut to %d\n", len));
}
if (dir == VPD_READ) {
Rtv = VpdReadStream(pAC, IoC, buf, addr, len);
- } else {
+ }
+ else {
Rtv = VpdWriteStream(pAC, IoC, buf, addr, len);
}
- return (Rtv) ;
+ return(Rtv);
}
#ifdef SKDIAG
@@ -462,14 +520,14 @@
*
* Returns number of bytes read.
*/
-int VpdReadBlock(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-char *buf, /* buffer were the data should be stored */
+int VpdReadBlock(
+SK_AC *pAC, /* pAC pointer */
+SK_IOC IoC, /* IO Context */
+char *buf, /* buffer were the data should be stored */
int addr, /* start reading at the VPD address */
int len) /* number of bytes to read */
{
- return (VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_READ)) ;
+ return(VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_READ));
}
/*
@@ -477,14 +535,14 @@
*
* Returns number of bytes writes.
*/
-int VpdWriteBlock(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-char *buf, /* buffer, holds the data to write */
+int VpdWriteBlock(
+SK_AC *pAC, /* pAC pointer */
+SK_IOC IoC, /* IO Context */
+char *buf, /* buffer, holds the data to write */
int addr, /* start writing at the VPD address */
int len) /* number of bytes to write */
{
- return (VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_WRITE)) ;
+ return(VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_WRITE));
}
#endif /* SKDIAG */
@@ -497,139 +555,180 @@
* return 0: success
* 1: fatal VPD error
*/
-static int VpdInit(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC) /* IO Context */
-{
- SK_VPD_PARA *r, rp ; /* RW or RV */
- int i ;
- unsigned char x ;
+static int VpdInit(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC) /* IO Context */
+{
+ SK_VPD_PARA *r, rp; /* RW or RV */
+ int i;
+ unsigned char x;
+ int vpd_size;
+ SK_U16 dev_id;
+ SK_U32 our_reg2;
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_INIT, ("VpdInit .. "));
+
+ VPD_IN16(pAC, IoC, PCI_DEVICE_ID, &dev_id);
+
+ VPD_IN32(pAC, IoC, PCI_OUR_REG_2, &our_reg2);
+
+ pAC->vpd.rom_size = 256 << ((our_reg2 & PCI_VPD_ROM_SZ) >> 14);
+
+ /*
+ * this function might get used before the hardware is initialized
+ * therefore we cannot always trust in GIChipId
+ */
+ if (((pAC->vpd.v.vpd_status & VPD_VALID) == 0 &&
+ dev_id != VPD_DEV_ID_GENESIS) ||
+ ((pAC->vpd.v.vpd_status & VPD_VALID) != 0 &&
+ !pAC->GIni.GIGenesis)) {
+
+ /* for Yukon the VPD size is always 256 */
+ vpd_size = VPD_SIZE_YUKON;
+ }
+ else {
+ /* Genesis uses the maximum ROM size up to 512 for VPD */
+ if (pAC->vpd.rom_size > VPD_SIZE_GENESIS) {
+ vpd_size = VPD_SIZE_GENESIS;
+ }
+ else {
+ vpd_size = pAC->vpd.rom_size;
+ }
+ }
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_INIT,("VpdInit .. ")) ;
/* read the VPD data into the VPD buffer */
- if (VpdTransferBlock(pAC,IoC,pAC->vpd.vpd_buf,0,VPD_SIZE,VPD_READ)
- != VPD_SIZE) {
+ if (VpdTransferBlock(pAC, IoC, pAC->vpd.vpd_buf, 0, vpd_size, VPD_READ)
+ != vpd_size) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("Block Read Error\n")) ;
- return(1) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("Block Read Error\n"));
+ return(1);
}
+
+ pAC->vpd.vpd_size = vpd_size;
/* find the end tag of the RO area */
- if (!(r = vpd_find_para(pAC,VPD_RV,&rp))) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: RV Tag not found\n")) ;
- return (1) ;
+ if (!(r = vpd_find_para(pAC, VPD_RV, &rp))) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("Encoding Error: RV Tag not found\n"));
+ return(1);
}
- if (r->p_val + r->p_len > pAC->vpd.vpd_buf + VPD_SIZE/2) {
+
+ if (r->p_val + r->p_len > pAC->vpd.vpd_buf + vpd_size/2) {
SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: Invalid VPD struct size\n")) ;
- return (1) ;
+ ("Encoding Error: Invalid VPD struct size\n"));
+ return(1);
}
- pAC->vpd.v.vpd_free_ro = r->p_len - 1 ;
+ pAC->vpd.v.vpd_free_ro = r->p_len - 1;
/* test the checksum */
- for (i = 0, x = 0; (unsigned)i<=(unsigned)VPD_SIZE/2 - r->p_len; i++) {
- x += pAC->vpd.vpd_buf[i] ;
+ for (i = 0, x = 0; (unsigned)i <= (unsigned)vpd_size/2 - r->p_len; i++) {
+ x += pAC->vpd.vpd_buf[i];
}
+
if (x != 0) {
/* checksum error */
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("VPD Checksum Error\n")) ;
- return (1) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("VPD Checksum Error\n"));
+ return(1);
}
/* find and check the end tag of the RW area */
- if (!(r = vpd_find_para(pAC,VPD_RW,&rp))) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: RV Tag not found\n")) ;
- return (1) ;
+ if (!(r = vpd_find_para(pAC, VPD_RW, &rp))) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("Encoding Error: RV Tag not found\n"));
+ return(1);
}
- if (r->p_val < pAC->vpd.vpd_buf + VPD_SIZE/2) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: Invalid VPD struct size\n")) ;
- return (1) ;
+
+ if (r->p_val < pAC->vpd.vpd_buf + vpd_size/2) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("Encoding Error: Invalid VPD struct size\n"));
+ return(1);
}
- pAC->vpd.v.vpd_free_rw = r->p_len ;
+ pAC->vpd.v.vpd_free_rw = r->p_len;
/* everything seems to be ok */
- pAC->vpd.v.vpd_status |= VPD_VALID ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_INIT,
+ if (pAC->GIni.GIChipId != 0) {
+ pAC->vpd.v.vpd_status |= VPD_VALID;
+ }
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_INIT,
("done. Free RO = %d, Free RW = %d\n",
- pAC->vpd.v.vpd_free_ro, pAC->vpd.v.vpd_free_rw)) ;
+ pAC->vpd.v.vpd_free_ro, pAC->vpd.v.vpd_free_rw));
- return(0) ;
+ return(0);
}
/*
* find the Keyword 'key' in the VPD buffer and fills the
- * parameter sturct 'p' with its values
+ * parameter struct 'p' with it's values
*
* returns *p success
* 0: parameter was not found or VPD encoding error
*/
static SK_VPD_PARA *vpd_find_para(
-SK_AC *pAC, /* common data base */
-char *key, /* keyword to find (e.g. "MN") */
-SK_VPD_PARA *p) /* parameter description struct */
+SK_AC *pAC, /* common data base */
+const char *key, /* keyword to find (e.g. "MN") */
+SK_VPD_PARA *p) /* parameter description struct */
{
- char *v ; /* points to vpd buffer */
- int max ; /* Maximum Number of Iterations */
+ char *v ; /* points to VPD buffer */
+ int max; /* Maximum Number of Iterations */
- v = pAC->vpd.vpd_buf ;
- max = 128 ;
+ v = pAC->vpd.vpd_buf;
+ max = 128;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd find para %s .. ",key)) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD find para %s .. ",key));
/* check mandatory resource type ID string (Product Name) */
- if (*v != (char) RES_ID) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Error: 0x%x missing\n",RES_ID)) ;
- return (0) ;
- }
-
- if (strcmp(key,VPD_NAME) == 0) {
- p->p_len = VPD_GET_RES_LEN(v) ;
- p->p_val = VPD_GET_VAL(v) ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("found, len = %d\n",p->p_len)) ;
- return(p) ;
+ if (*v != (char)RES_ID) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("Error: 0x%x missing\n", RES_ID));
+ return(0);
+ }
+
+ if (strcmp(key, VPD_NAME) == 0) {
+ p->p_len = VPD_GET_RES_LEN(v);
+ p->p_val = VPD_GET_VAL(v);
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("found, len = %d\n", p->p_len));
+ return(p);
}
- v += 3 + VPD_GET_RES_LEN(v) + 3 ;
- for ( ; ; ) {
+ v += 3 + VPD_GET_RES_LEN(v) + 3;
+ for (;; ) {
if (SK_MEMCMP(key,v,2) == 0) {
- p->p_len = VPD_GET_VPD_LEN(v) ;
- p->p_val = VPD_GET_VAL(v) ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("found, len = %d\n",p->p_len)) ;
- return (p) ;
+ p->p_len = VPD_GET_VPD_LEN(v);
+ p->p_val = VPD_GET_VAL(v);
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("found, len = %d\n",p->p_len));
+ return(p);
}
/* exit when reaching the "RW" Tag or the maximum of itera. */
- max-- ;
+ max--;
if (SK_MEMCMP(VPD_RW,v,2) == 0 || max == 0) {
- break ;
+ break;
}
if (SK_MEMCMP(VPD_RV,v,2) == 0) {
- v += 3 + VPD_GET_VPD_LEN(v) + 3 ; /* skip VPD-W */
- } else {
- v += 3 + VPD_GET_VPD_LEN(v) ;
+ v += 3 + VPD_GET_VPD_LEN(v) + 3; /* skip VPD-W */
+ }
+ else {
+ v += 3 + VPD_GET_VPD_LEN(v);
}
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("scanning '%c%c' len = %d\n",v[0],v[1],v[2])) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("scanning '%c%c' len = %d\n",v[0],v[1],v[2]));
}
#ifdef DEBUG
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,("not found\n")) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL, ("not found\n"));
if (max == 0) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Key/Len Encoding error\n")) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
+ ("Key/Len Encoding error\n"));
}
-#endif
- return (0) ;
+#endif /* DEBUG */
+ return(0);
}
/*
@@ -639,28 +738,29 @@
* returns nothing
*/
static void vpd_move_para(
-char *start, /* start of memory block */
-char *end, /* end of memory block to move */
-int n) /* number of bytes the memory block has to be moved */
+char *start, /* start of memory block */
+char *end, /* end of memory block to move */
+int n) /* number of bytes the memory block has to be moved */
{
- char *p ;
- int i ; /* number of byte copied */
+ char *p;
+ int i; /* number of byte copied */
if (n == 0)
- return ;
+ return;
- i = (int) (end - start + 1) ;
+ i = (int) (end - start + 1);
if (n < 0) {
- p = start + n ;
+ p = start + n;
while (i != 0) {
- *p++ = *start++ ;
- i-- ;
+ *p++ = *start++;
+ i--;
}
- } else {
- p = end + n ;
+ }
+ else {
+ p = end + n;
while (i != 0) {
- *p-- = *end-- ;
- i-- ;
+ *p-- = *end--;
+ i--;
}
}
}
@@ -671,18 +771,18 @@
* returns nothing
*/
static void vpd_insert_key(
-char *key, /* keyword to insert */
-char *buf, /* buffer with the keyword value */
-int len, /* length of the value string */
-char *ip) /* inseration point */
-{
- SK_VPD_KEY *p ;
-
- p = (SK_VPD_KEY *) ip ;
- p->p_key[0] = key[0] ;
- p->p_key[1] = key[1] ;
- p->p_len = (unsigned char) len ;
- SK_MEMCPY(&p->p_val,buf,len) ;
+const char *key, /* keyword to insert */
+const char *buf, /* buffer with the keyword value */
+int len, /* length of the value string */
+char *ip) /* inseration point */
+{
+ SK_VPD_KEY *p;
+
+ p = (SK_VPD_KEY *) ip;
+ p->p_key[0] = key[0];
+ p->p_key[1] = key[1];
+ p->p_len = (unsigned char) len;
+ SK_MEMCPY(&p->p_val,buf,len);
}
/*
@@ -693,49 +793,53 @@
* 1: encoding error
*/
static int vpd_mod_endtag(
-SK_AC *pAC, /* common data base */
-char *etp) /* end pointer input position */
+SK_AC *pAC, /* common data base */
+char *etp) /* end pointer input position */
{
- SK_VPD_KEY *p ;
- unsigned char x ;
- int i ;
+ SK_VPD_KEY *p;
+ unsigned char x;
+ int i;
+ int vpd_size;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd modify endtag at 0x%x = '%c%c'\n",etp,etp[0],etp[1])) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD modify endtag at 0x%x = '%c%c'\n",etp,etp[0],etp[1]));
- p = (SK_VPD_KEY *) etp ;
+ vpd_size = pAC->vpd.vpd_size;
+
+ p = (SK_VPD_KEY *) etp;
if (p->p_key[0] != 'R' || (p->p_key[1] != 'V' && p->p_key[1] != 'W')) {
/* something wrong here, encoding error */
SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: invalid end tag\n")) ;
- return(1) ;
+ ("Encoding Error: invalid end tag\n"));
+ return(1);
}
- if (etp > pAC->vpd.vpd_buf + VPD_SIZE/2) {
+ if (etp > pAC->vpd.vpd_buf + vpd_size/2) {
/* create "RW" tag */
- p->p_len = (unsigned char)(pAC->vpd.vpd_buf+VPD_SIZE-etp-3-1) ;
- pAC->vpd.v.vpd_free_rw = (int) p->p_len ;
- i = pAC->vpd.v.vpd_free_rw ;
- etp += 3 ;
- } else {
+ p->p_len = (unsigned char)(pAC->vpd.vpd_buf+vpd_size-etp-3-1);
+ pAC->vpd.v.vpd_free_rw = (int) p->p_len;
+ i = pAC->vpd.v.vpd_free_rw;
+ etp += 3;
+ }
+ else {
/* create "RV" tag */
- p->p_len = (unsigned char)(pAC->vpd.vpd_buf+VPD_SIZE/2-etp-3) ;
- pAC->vpd.v.vpd_free_ro = (int) p->p_len - 1 ;
+ p->p_len = (unsigned char)(pAC->vpd.vpd_buf+vpd_size/2-etp-3);
+ pAC->vpd.v.vpd_free_ro = (int) p->p_len - 1;
/* setup checksum */
- for (i = 0, x = 0; i < VPD_SIZE/2 - p->p_len; i++) {
- x += pAC->vpd.vpd_buf[i] ;
+ for (i = 0, x = 0; i < vpd_size/2 - p->p_len; i++) {
+ x += pAC->vpd.vpd_buf[i];
}
- p->p_val = (char) 0 - x ;
- i = pAC->vpd.v.vpd_free_ro ;
- etp += 4 ;
+ p->p_val = (char) 0 - x;
+ i = pAC->vpd.v.vpd_free_ro;
+ etp += 4;
}
while (i) {
- *etp++ = 0x00 ;
- i-- ;
+ *etp++ = 0x00;
+ i--;
}
- return (0) ;
+ return(0);
}
/*
@@ -754,82 +858,87 @@
*/
int VpdSetupPara(
SK_AC *pAC, /* common data base */
-char *key, /* keyword to insert */
-char *buf, /* buffer with the keyword value */
-int len, /* length of the keyword value */
-int type, /* VPD_RO_KEY or VPD_RW_KEY */
-int op) /* operation to do: ADD_KEY or OWR_KEY */
-{
- SK_VPD_PARA vp ;
- char *etp ; /* end tag position */
- int free ; /* remaining space in selected area */
- char *ip ; /* input position inside the VPD buffer */
- int rtv ; /* return code */
- int head ; /* additional haeder bytes to move */
- int found ; /* additinoal bytes if the keyword was found */
+const char *key, /* keyword to insert */
+const char *buf, /* buffer with the keyword value */
+int len, /* length of the keyword value */
+int type, /* VPD_RO_KEY or VPD_RW_KEY */
+int op) /* operation to do: ADD_KEY or OWR_KEY */
+{
+ SK_VPD_PARA vp;
+ char *etp; /* end tag position */
+ int free; /* remaining space in selected area */
+ char *ip; /* input position inside the VPD buffer */
+ int rtv; /* return code */
+ int head; /* additional haeder bytes to move */
+ int found; /* additinoal bytes if the keyword was found */
+ int vpd_size;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("vpd setup para key = %s, val = %s\n",key,buf)) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("VPD setup para key = %s, val = %s\n",key,buf));
+
+ vpd_size = pAC->vpd.vpd_size;
- rtv = 0 ;
- ip = 0 ;
+ rtv = 0;
+ ip = 0;
if (type == VPD_RW_KEY) {
/* end tag is "RW" */
- free = pAC->vpd.v.vpd_free_rw ;
- etp = pAC->vpd.vpd_buf + (VPD_SIZE - free - 1 - 3) ;
- } else {
+ free = pAC->vpd.v.vpd_free_rw;
+ etp = pAC->vpd.vpd_buf + (vpd_size - free - 1 - 3);
+ }
+ else {
/* end tag is "RV" */
- free = pAC->vpd.v.vpd_free_ro ;
- etp = pAC->vpd.vpd_buf + (VPD_SIZE/2 - free - 4) ;
+ free = pAC->vpd.v.vpd_free_ro;
+ etp = pAC->vpd.vpd_buf + (vpd_size/2 - free - 4);
}
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
("Free RO = %d, Free RW = %d\n",
- pAC->vpd.v.vpd_free_ro, pAC->vpd.v.vpd_free_rw)) ;
+ pAC->vpd.v.vpd_free_ro, pAC->vpd.v.vpd_free_rw));
- head = 0 ;
- found = 0 ;
+ head = 0;
+ found = 0;
if (op == OWR_KEY) {
- if (vpd_find_para(pAC,key,&vp)) {
- found = 3 ;
- ip = vp.p_val - 3 ;
- free += vp.p_len + 3 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("Overwrite Key\n")) ;
- } else {
- op = ADD_KEY ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_CTRL,
- ("Add Key\n")) ;
+ if (vpd_find_para(pAC, key, &vp)) {
+ found = 3;
+ ip = vp.p_val - 3;
+ free += vp.p_len + 3;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("Overwrite Key\n"));
+ }
+ else {
+ op = ADD_KEY;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
+ ("Add Key\n"));
}
}
if (op == ADD_KEY) {
- ip = etp ;
- vp.p_len = 0 ;
- head = 3 ;
+ ip = etp;
+ vp.p_len = 0;
+ head = 3;
}
if (len + 3 > free) {
if (free < 7) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
("VPD Buffer Overflow, keyword not written\n"));
- return (4) ;
+ return(4);
}
/* cut it again */
- len = free - 3 ;
- rtv = 2 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("VPD Buffer Full, Keyword was cut\n")) ;
+ len = free - 3;
+ rtv = 2;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD Buffer Full, Keyword was cut\n"));
}
- vpd_move_para(ip + vp.p_len + found, etp+2, len-vp.p_len+head) ;
- vpd_insert_key(key, buf, len, ip) ;
+ vpd_move_para(ip + vp.p_len + found, etp+2, len-vp.p_len+head);
+ vpd_insert_key(key, buf, len, ip);
if (vpd_mod_endtag(pAC, etp + len - vp.p_len + head)) {
- pAC->vpd.v.vpd_status &= ~VPD_VALID ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("VPD Encoding Error\n")) ;
- return(6) ;
+ pAC->vpd.v.vpd_status &= ~VPD_VALID;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD Encoding Error\n"));
+ return(6);
}
- return (rtv) ;
+ return(rtv);
}
@@ -837,17 +946,17 @@
* Read the contents of the VPD EEPROM and copy it to the
* VPD buffer if not already done.
*
- * return: A pointer to the vpd_status structure. The structure contain
+ * return: A pointer to the vpd_status structure. The structure contains
* this fields.
*/
-SK_VPD_STATUS *VpdStat(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC) /* IO Context */
+SK_VPD_STATUS *VpdStat(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC) /* IO Context */
{
- if (!(pAC->vpd.v.vpd_status & VPD_VALID)) {
- (void)VpdInit(pAC,IoC) ;
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
+ (void)VpdInit(pAC, IoC);
}
- return(&pAC->vpd.v) ;
+ return(&pAC->vpd.v);
}
@@ -873,74 +982,76 @@
* *len = 30
* *elements = 9
*/
-int VpdKeys(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *buf, /* buffer where to copy the keywords */
+int VpdKeys(
+SK_AC *pAC, /* common data base */
+SK_IOC IoC, /* IO Context */
+char *buf, /* buffer where to copy the keywords */
int *len, /* buffer length */
int *elements) /* number of keywords returned */
{
- char *v ;
- int n ;
+ char *v;
+ int n;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_RX,("list vpd keys .. ")) ;
- *elements = 0 ;
- if (!(pAC->vpd.v.vpd_status & VPD_VALID)) {
- if (VpdInit(pAC,IoC) != 0 ) {
- *len = 0 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("VPD Init Error, terminated\n")) ;
- return(6) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX, ("list VPD keys .. "));
+ *elements = 0;
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
+ if (VpdInit(pAC, IoC) != 0) {
+ *len = 0;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD Init Error, terminated\n"));
+ return(6);
}
}
if ((signed)strlen(VPD_NAME) + 1 <= *len) {
- v = pAC->vpd.vpd_buf ;
- strcpy(buf,VPD_NAME) ;
- n = strlen(VPD_NAME) + 1 ;
- buf += n ;
- *elements = 1 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_RX,
- ("'%c%c' ",v[0],v[1])) ;
- } else {
- *len = 0 ;
+ v = pAC->vpd.vpd_buf;
+ strcpy(buf,VPD_NAME);
+ n = strlen(VPD_NAME) + 1;
+ buf += n;
+ *elements = 1;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
+ ("'%c%c' ",v[0],v[1]));
+ }
+ else {
+ *len = 0;
SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("buffer overflow\n")) ;
- return(2) ;
+ ("buffer overflow\n"));
+ return(2);
}
- v += 3 + VPD_GET_RES_LEN(v) + 3 ;
- for ( ; ; ) {
+ v += 3 + VPD_GET_RES_LEN(v) + 3;
+ for (;; ) {
/* exit when reaching the "RW" Tag */
if (SK_MEMCMP(VPD_RW,v,2) == 0) {
- break ;
+ break;
}
if (SK_MEMCMP(VPD_RV,v,2) == 0) {
- v += 3 + VPD_GET_VPD_LEN(v) + 3 ; /* skip VPD-W */
- continue ;
+ v += 3 + VPD_GET_VPD_LEN(v) + 3; /* skip VPD-W */
+ continue;
}
if (n+3 <= *len) {
- SK_MEMCPY(buf,v,2) ;
- buf += 2 ;
- *buf++ = '\0' ;
- n += 3 ;
- v += 3 + VPD_GET_VPD_LEN(v) ;
- *elements += 1 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_RX,
- ("'%c%c' ",v[0],v[1])) ;
- } else {
- *len = n ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("buffer overflow\n")) ;
- return (2) ;
+ SK_MEMCPY(buf,v,2);
+ buf += 2;
+ *buf++ = '\0';
+ n += 3;
+ v += 3 + VPD_GET_VPD_LEN(v);
+ *elements += 1;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
+ ("'%c%c' ",v[0],v[1]));
+ }
+ else {
+ *len = n;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("buffer overflow\n"));
+ return(2);
}
}
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_RX,("\n")) ;
- *len = n ;
- return(0) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX, ("\n"));
+ *len = n;
+ return(0);
}
@@ -957,41 +1068,42 @@
* 3: VPD transfer timeout
* 6: fatal VPD error
*/
-int VpdRead(
+int VpdRead(
SK_AC *pAC, /* common data base */
SK_IOC IoC, /* IO Context */
-char *key, /* keyword to read (e.g. "MN") */
+const char *key, /* keyword to read (e.g. "MN") */
char *buf, /* buffer where to copy the keyword value */
-int *len) /* buffer length */
+int *len) /* buffer length */
{
- SK_VPD_PARA *p, vp ;
+ SK_VPD_PARA *p, vp;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_RX,("vpd read %s .. ",key)) ;
- if (!(pAC->vpd.v.vpd_status & VPD_VALID)) {
- if (VpdInit(pAC,IoC) != 0 ) {
- *len = 0 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("vpd init error\n")) ;
- return(6) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX, ("VPD read %s .. ", key));
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
+ if (VpdInit(pAC, IoC) != 0) {
+ *len = 0;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD init error\n"));
+ return(6);
}
}
- if ((p = vpd_find_para(pAC,key,&vp))) {
+ if ((p = vpd_find_para(pAC, key, &vp)) != NULL) {
if (p->p_len > (*(unsigned *)len)-1) {
- p->p_len = *len - 1 ;
+ p->p_len = *len - 1;
}
- SK_MEMCPY(buf,p->p_val,p->p_len) ;
- buf[p->p_len] = '\0' ;
- *len = p->p_len ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_RX,
+ SK_MEMCPY(buf, p->p_val, p->p_len);
+ buf[p->p_len] = '\0';
+ *len = p->p_len;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
("%c%c%c%c.., len = %d\n",
- buf[0],buf[1],buf[2],buf[3],*len)) ;
- } else {
- *len = 0 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,("not found\n")) ;
- return (1) ;
+ buf[0],buf[1],buf[2],buf[3],*len));
}
- return (0) ;
+ else {
+ *len = 0;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR, ("not found\n"));
+ return(1);
+ }
+ return(0);
}
@@ -1002,16 +1114,16 @@
* SK_TRUE Yes it may be written
* SK_FALSE No it may be written
*/
-SK_BOOL VpdMayWrite(
-char *key) /* keyword to write (allowed values "Yx", "Vx") */
+SK_BOOL VpdMayWrite(
+char *key) /* keyword to write (allowed values "Yx", "Vx") */
{
if ((*key != 'Y' && *key != 'V') ||
key[1] < '0' || key[1] > 'Z' ||
(key[1] > '9' && key[1] < 'A') || strlen(key) != 2) {
- return (SK_FALSE) ;
+ return(SK_FALSE);
}
- return (SK_TRUE) ;
+ return(SK_TRUE);
}
/*
@@ -1027,53 +1139,52 @@
* 5: keyword cannot be written
* 6: fatal VPD error
*/
-int VpdWrite(
+int VpdWrite(
SK_AC *pAC, /* common data base */
SK_IOC IoC, /* IO Context */
-char *key, /* keyword to write (allowed values "Yx", "Vx") */
-char *buf) /* buffer where the keyword value can be read from */
+const char *key, /* keyword to write (allowed values "Yx", "Vx") */
+const char *buf) /* buffer where the keyword value can be read from */
{
- int len ; /* lenght of the keyword to write */
- int rtv ; /* return code */
- int rtv2 ;
+ int len; /* length of the keyword to write */
+ int rtv; /* return code */
+ int rtv2;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,
- ("vpd write %s = %s\n",key,buf)) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
+ ("VPD write %s = %s\n",key,buf));
if ((*key != 'Y' && *key != 'V') ||
key[1] < '0' || key[1] > 'Z' ||
(key[1] > '9' && key[1] < 'A') || strlen(key) != 2) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("illegal key tag, keyword not written\n")) ;
- return (5) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("illegal key tag, keyword not written\n"));
+ return(5);
}
- if (!(pAC->vpd.v.vpd_status & VPD_VALID)) {
- if (VpdInit(pAC,IoC) != 0 ) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("vpd init error\n")) ;
- return(6) ;
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
+ if (VpdInit(pAC, IoC) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD init error\n"));
+ return(6);
}
}
- rtv = 0 ;
- len = strlen(buf) ;
+ rtv = 0;
+ len = strlen(buf);
if (len > VPD_MAX_LEN) {
/* cut it */
- len = VPD_MAX_LEN ;
- rtv = 2 ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("keyword too long, cut after %d bytes\n",
- VPD_MAX_LEN));
- }
- if ((rtv2 = VpdSetupPara(pAC,key,buf,len,VPD_RW_KEY,OWR_KEY)) != 0) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("vpd write error\n")) ;
- return(rtv2) ;
+ len = VPD_MAX_LEN;
+ rtv = 2;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("keyword too long, cut after %d bytes\n",VPD_MAX_LEN));
+ }
+ if ((rtv2 = VpdSetupPara(pAC, key, buf, len, VPD_RW_KEY, OWR_KEY)) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD write error\n"));
+ return(rtv2);
}
- return (rtv) ;
+ return(rtv);
}
/*
@@ -1088,48 +1199,52 @@
* 5: keyword cannot be deleted
* 6: fatal VPD error
*/
-int VpdDelete(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *key) /* keyword to read (e.g. "MN") */
+int VpdDelete(
+SK_AC *pAC, /* common data base */
+SK_IOC IoC, /* IO Context */
+char *key) /* keyword to read (e.g. "MN") */
{
- SK_VPD_PARA *p, vp ;
- char *etp ;
+ SK_VPD_PARA *p, vp;
+ char *etp;
+ int vpd_size;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("vpd delete key %s\n",key)) ;
- if (!(pAC->vpd.v.vpd_status & VPD_VALID)) {
- if (VpdInit(pAC,IoC) != 0 ) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("vpd init error\n")) ;
- return(6) ;
+ vpd_size = pAC->vpd.vpd_size;
+
+ SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("VPD delete key %s\n",key));
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
+ if (VpdInit(pAC, IoC) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD init error\n"));
+ return(6);
}
}
- if ((p = vpd_find_para(pAC,key,&vp))) {
- if (p->p_val < pAC->vpd.vpd_buf + VPD_SIZE/2) {
+ if ((p = vpd_find_para(pAC, key, &vp)) != NULL) {
+ if (p->p_val < pAC->vpd.vpd_buf + vpd_size/2) {
/* try to delete read only keyword */
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("cannot delete RO keyword\n")) ;
- return (5) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("cannot delete RO keyword\n"));
+ return(5);
}
- etp = pAC->vpd.vpd_buf + (VPD_SIZE-pAC->vpd.v.vpd_free_rw-1-3) ;
+ etp = pAC->vpd.vpd_buf + (vpd_size-pAC->vpd.v.vpd_free_rw-1-3);
vpd_move_para(vp.p_val+vp.p_len, etp+2,
- - ((int)(vp.p_len + 3))) ;
+ - ((int)(vp.p_len + 3)));
if (vpd_mod_endtag(pAC, etp - vp.p_len - 3)) {
- pAC->vpd.v.vpd_status &= ~VPD_VALID ;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("vpd encoding error\n")) ;
- return(6) ;
+ pAC->vpd.v.vpd_status &= ~VPD_VALID;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD encoding error\n"));
+ return(6);
}
- } else {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("keyword not found\n")) ;
- return (1) ;
+ }
+ else {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("keyword not found\n"));
+ return(1);
}
- return (0) ;
+ return(0);
}
/*
@@ -1139,22 +1254,26 @@
* returns 0: success
* 3: VPD transfer timeout
*/
-int VpdUpdate(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC) /* IO Context */
-{
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("vpd update .. ")) ;
- if (pAC->vpd.v.vpd_status & VPD_VALID) {
- if (VpdTransferBlock(pAC,IoC,pAC->vpd.vpd_buf + VPD_SIZE/2,
- VPD_SIZE/2, VPD_SIZE/2, VPD_WRITE) != VPD_SIZE/2) {
-
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("transfer timed out\n")) ;
- return(3) ;
+int VpdUpdate(
+SK_AC *pAC, /* Adapters context */
+SK_IOC IoC) /* IO Context */
+{
+ int vpd_size;
+
+ vpd_size = pAC->vpd.vpd_size;
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("VPD update .. "));
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) != 0) {
+ if (VpdTransferBlock(pAC, IoC, pAC->vpd.vpd_buf + vpd_size/2,
+ vpd_size/2, vpd_size/2, VPD_WRITE) != vpd_size/2) {
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("transfer timed out\n"));
+ return(3);
}
}
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("done\n")) ;
- return (0) ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("done\n"));
+ return(0);
}
@@ -1169,37 +1288,38 @@
*
* returns nothing, errors will be ignored.
*/
-void VpdErrLog(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *msg) /* error log message */
+void VpdErrLog(
+SK_AC *pAC, /* common data base */
+SK_IOC IoC, /* IO Context */
+char *msg) /* error log message */
{
- SK_VPD_PARA *v, vf ; /* VF */
- int len ;
+ SK_VPD_PARA *v, vf; /* VF */
+ int len;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,
- ("vpd error log msg %s\n",msg)) ;
- if (!(pAC->vpd.v.vpd_status & VPD_VALID)) {
- if (VpdInit(pAC,IoC) != 0 ) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("vpd init error\n")) ;
- return ;
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
+ ("VPD error log msg %s\n", msg));
+ if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
+ if (VpdInit(pAC, IoC) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
+ ("VPD init error\n"));
+ return;
}
}
- len = strlen(msg) ;
+ len = strlen(msg);
if (len > VPD_MAX_LEN) {
/* cut it */
- len = VPD_MAX_LEN ;
+ len = VPD_MAX_LEN;
+ }
+ if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n"));
+ (void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY);
}
- if ((v = vpd_find_para(pAC,VPD_VF,&vf))) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("overwrite VL\n")) ;
- (void)VpdSetupPara(pAC,VPD_VL,msg,len,VPD_RW_KEY,OWR_KEY) ;
- } else {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("write VF\n")) ;
- (void)VpdSetupPara(pAC,VPD_VF,msg,len,VPD_RW_KEY,ADD_KEY) ;
+ else {
+ SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n"));
+ (void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY);
}
- (void)VpdUpdate(pAC,IoC) ;
+ (void)VpdUpdate(pAC, IoC);
}
diff -Nru a/drivers/net/sk98lin/skxmac2.c b/drivers/net/sk98lin/skxmac2.c
--- a/drivers/net/sk98lin/skxmac2.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sk98lin/skxmac2.c Sun Aug 3 13:14:52 2003
@@ -1,16 +1,17 @@
/******************************************************************************
*
* Name: skxmac2.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.61 $
- * Date: $Date: 2001/02/09 15:40:59 $
- * Purpose: Contains functions to initialize the XMAC II
+ * Project: Gigabit Ethernet Adapters, Common Modules
+ * Version: $Revision: 1.99 $
+ * Date: $Date: 2003/07/11 12:19:33 $
+ * Purpose: Contains functions to initialize the MACs and PHYs
*
******************************************************************************/
/******************************************************************************
*
- * (C)Copyright 1998-2001 SysKonnect GmbH.
+ * (C)Copyright 1998-2002 SysKonnect.
+ * (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +27,221 @@
* History:
*
* $Log: skxmac2.c,v $
+ * Revision 1.99 2003/07/11 12:19:33 rschmidt
+ * Reduced init values for Master & Slave downshift counters to
+ * minimum values.
+ * Editorial changes.
+ *
+ * Revision 1.98 2003/07/04 12:53:56 rschmidt
+ * Changed setting of downshift feature in SkGmInitPhyMarv().
+ * Enabled downshift feature only for para 'Speed' set to 'Auto'.
+ * Changed init values for Master & Slave downshift counters.
+ * Editorial changes.
+ *
+ * Revision 1.97 2003/05/28 15:53:47 rschmidt
+ * Removed setting of Yukon PHY's 'force link good' in loopback mode.
+ * Replaced call pFnMacOverflow() with SkXmOverflowStatus() resp.
+ * SkGmOverflowStatus().
+ * Editorial changes.
+ *
+ * Revision 1.96 2003/05/13 17:37:11 mkarl
+ * Removed calls to PNMI for SLIM driver.
+ * Added SK_FAR for PXE.
+ * Separated code pathes not used for SLIM driver.
+ * Some further separations for YUKON and GENESIS.
+ * Editorial changes.
+ *
+ * Revision 1.95 2003/05/06 13:09:53 rschmidt
+ * Changed init sequence for auto-negotiation disabled in SkGmInitMac().
+ * Added defines around GENESIS resp. YUKON branches to reduce
+ * code size for PXE.
+ * Editorial changes.
+ *
+ * Revision 1.94 2003/04/10 14:36:40 rschmidt
+ * Fixed define for debug code in SkGmInitPhyMarv().
+ *
+ * Revision 1.93 2003/04/08 16:58:16 rschmidt
+ * Changed initialisation of GMAC and GPHY for disabling
+ * Flow-Control with parameter 'none' (Bug Id #10769).
+ * Changed init for blinking active LED and normal duplex LED
+ * depending on value from GILedBlinkCtrl (LED Blink Control).
+ * Added control for Link100 LED.
+ * Changed handling for different PhyTypes for source code
+ * portability to PXE, UNDI.
+ * Editorial changes.
+ *
+ * Revision 1.92 2003/03/31 07:12:33 mkarl
+ * Restore PHY_MARV_AUNE_ADV after writing to GM_GP_CTRL in order to make
+ * auto-negotiation of limited flow-control possible.
+ * Corrected Copyright.
+ * Editorial changes.
+ *
+ * Revision 1.91 2003/02/05 15:09:34 rschmidt
+ * Removed setting of 'Collision Test'-bit in SkGmInitPhyMarv().
+ * Disabled auto-update for speed, duplex and flow-control when
+ * auto-negotiation is not enabled (Bug Id #10766).
+ * Editorial changes.
+ *
+ * Revision 1.90 2003/01/29 13:35:19 rschmidt
+ * Increment Rx FIFO Overflow counter only in DEBUG-mode.
+ * Corrected define for blinking active LED.
+ *
+ * Revision 1.89 2003/01/28 16:37:45 rschmidt
+ * Changed init for blinking active LED
+ *
+ * Revision 1.88 2003/01/28 10:09:38 rschmidt
+ * Added debug outputs in SkGmInitMac().
+ * Added customized init of LED registers in SkGmInitPhyMarv(),
+ * for blinking active LED (#ifdef ACT_LED_BLINK) and
+ * for normal duplex LED (#ifdef DUP_LED_NORMAL).
+ * Editorial changes.
+ *
+ * Revision 1.87 2002/12/10 14:39:05 rschmidt
+ * Improved initialization of GPHY in SkGmInitPhyMarv().
+ * Editorial changes.
+ *
+ * Revision 1.86 2002/12/09 15:01:12 rschmidt
+ * Added setup of Ext. PHY Specific Ctrl Reg (downshift feature).
+ *
+ * Revision 1.85 2002/12/05 14:09:16 rschmidt
+ * Improved avoiding endless loop in SkGmPhyRead(), SkGmPhyWrite().
+ * Added additional advertising for 10Base-T when 100Base-T is selected.
+ * Added case SK_PHY_MARV_FIBER for YUKON Fiber adapter.
+ * Editorial changes.
+ *
+ * Revision 1.84 2002/11/15 12:50:09 rschmidt
+ * Changed SkGmCableDiagStatus() when getting results.
+ *
+ * Revision 1.83 2002/11/13 10:28:29 rschmidt
+ * Added some typecasts to avoid compiler warnings.
+ *
+ * Revision 1.82 2002/11/13 09:20:46 rschmidt
+ * Replaced for(..) with do {} while (...) in SkXmUpdateStats().
+ * Replaced 2 macros GM_IN16() with 1 GM_IN32() in SkGmMacStatistic().
+ * Added SkGmCableDiagStatus() for Virtual Cable Test (VCT).
+ * Editorial changes.
+ *
+ * Revision 1.81 2002/10/28 14:28:08 rschmidt
+ * Changed MAC address setup for GMAC in SkGmInitMac().
+ * Optimized handling of counter overflow IRQ in SkGmOverflowStatus().
+ * Editorial changes.
+ *
+ * Revision 1.80 2002/10/14 15:29:44 rschmidt
+ * Corrected disabling of all PHY IRQs.
+ * Added WA for deviation #16 (address used for pause packets).
+ * Set Pause Mode in SkMacRxTxEnable() only for Genesis.
+ * Added IRQ and counter for Receive FIFO Overflow in DEBUG-mode.
+ * SkXmTimeStamp() replaced by SkMacTimeStamp().
+ * Added clearing of GMAC Tx FIFO Underrun IRQ in SkGmIrq().
+ * Editorial changes.
+ *
+ * Revision 1.79 2002/10/10 15:55:36 mkarl
+ * changes for PLinkSpeedUsed
+ *
+ * Revision 1.78 2002/09/12 09:39:51 rwahl
+ * Removed deactivate code for SIRQ overflow event separate for TX/RX.
+ *
+ * Revision 1.77 2002/09/09 12:26:37 mkarl
+ * added handling for Yukon to SkXmTimeStamp
+ *
+ * Revision 1.76 2002/08/21 16:41:16 rschmidt
+ * Added bit GPC_ENA_XC (Enable MDI crossover) in HWCFG_MODE.
+ * Added forced speed settings in SkGmInitPhyMarv().
+ * Added settings of full/half duplex capabilities for YUKON Fiber.
+ * Editorial changes.
+ *
+ * Revision 1.75 2002/08/16 15:12:01 rschmidt
+ * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
+ * Added function SkMacHashing() for ADDR-Module.
+ * Removed functions SkXmClrSrcCheck(), SkXmClrHashAddr() (calls replaced
+ * with macros).
+ * Removed functions SkGmGetMuxConfig().
+ * Added HWCFG_MODE init for YUKON Fiber.
+ * Changed initialization of GPHY in SkGmInitPhyMarv().
+ * Changed check of parameter in SkXmMacStatistic().
+ * Editorial changes.
+ *
+ * Revision 1.74 2002/08/12 14:00:17 rschmidt
+ * Replaced usage of Broadcom PHY Ids with defines.
+ * Corrected error messages in SkGmMacStatistic().
+ * Made SkMacPromiscMode() public for ADDR-Modul.
+ * Editorial changes.
+ *
+ * Revision 1.73 2002/08/08 16:26:24 rschmidt
+ * Improved reset sequence for YUKON in SkGmHardRst() and SkGmInitMac().
+ * Replaced XMAC Rx High Watermark init value with SK_XM_RX_HI_WM.
+ * Editorial changes.
+ *
+ * Revision 1.72 2002/07/24 15:11:19 rschmidt
+ * Fixed wrong placement of parenthesis.
+ * Editorial changes.
+ *
+ * Revision 1.71 2002/07/23 16:05:18 rschmidt
+ * Added global functions for PHY: SkGePhyRead(), SkGePhyWrite().
+ * Fixed Tx Counter Overflow IRQ (Bug ID #10730).
+ * Editorial changes.
+ *
+ * Revision 1.70 2002/07/18 14:27:27 rwahl
+ * Fixed syntax error.
+ *
+ * Revision 1.69 2002/07/17 17:08:47 rwahl
+ * Fixed check in SkXmMacStatistic().
+ *
+ * Revision 1.68 2002/07/16 07:35:24 rwahl
+ * Removed check for cleared mib counter in SkGmResetCounter().
+ *
+ * Revision 1.67 2002/07/15 18:35:56 rwahl
+ * Added SkXmUpdateStats(), SkGmUpdateStats(), SkXmMacStatistic(),
+ * SkGmMacStatistic(), SkXmResetCounter(), SkGmResetCounter(),
+ * SkXmOverflowStatus(), SkGmOverflowStatus().
+ * Changes to SkXmIrq() & SkGmIrq(): Combined SIRQ Overflow for both
+ * RX & TX.
+ * Changes to SkGmInitMac(): call to SkGmResetCounter().
+ * Editorial changes.
+ *
+ * Revision 1.66 2002/07/15 15:59:30 rschmidt
+ * Added PHY Address in SkXmPhyRead(), SkXmPhyWrite().
+ * Added MIB Clear Counter in SkGmInitMac().
+ * Added Duplex and Flow-Control settings.
+ * Reset all Multicast filtering Hash reg. in SkGmInitMac().
+ * Added new function: SkGmGetMuxConfig().
+ * Editorial changes.
+ *
+ * Revision 1.65 2002/06/10 09:35:39 rschmidt
+ * Replaced C++ comments (//).
+ * Added #define VCPU around VCPUwaitTime.
+ * Editorial changes.
+ *
+ * Revision 1.64 2002/06/05 08:41:10 rschmidt
+ * Added function for XMAC2: SkXmTimeStamp().
+ * Added function for YUKON: SkGmSetRxCmd().
+ * Changed SkGmInitMac() resp. SkGmHardRst().
+ * Fixed wrong variable in SkXmAutoNegLipaXmac() (debug mode).
+ * SkXmRxTxEnable() replaced by SkMacRxTxEnable().
+ * Editorial changes.
+ *
+ * Revision 1.63 2002/04/25 13:04:44 rschmidt
+ * Changes for handling YUKON.
+ * Use of #ifdef OTHER_PHY to eliminate code for unused Phy types.
+ * Macros for XMAC PHY access PHY_READ(), PHY_WRITE() replaced
+ * by functions SkXmPhyRead(), SkXmPhyWrite();
+ * Removed use of PRxCmd to setup XMAC.
+ * Added define PHY_B_AS_PAUSE_MSK for BCom Pause Res.
+ * Added setting of XM_RX_DIS_CEXT in SkXmInitMac().
+ * Removed status parameter from MAC IRQ handler SkMacIrq(),
+ * SkXmIrq() and SkGmIrq().
+ * SkXmAutoNegLipa...() for ext. Phy replaced by SkMacAutoNegLipaPhy().
+ * Added SkMac...() functions to handle both XMAC and GMAC.
+ * Added functions for YUKON: SkGmHardRst(), SkGmSoftRst(),
+ * SkGmSetRxTxEn(), SkGmIrq(), SkGmInitMac(), SkGmInitPhyMarv(),
+ * SkGmAutoNegDoneMarv(), SkGmPhyRead(), SkGmPhyWrite().
+ * Changes for V-CPU support.
+ * Editorial changes.
+ *
+ * Revision 1.62 2001/08/06 09:50:14 rschmidt
+ * Workaround BCOM Errata #1 for the C5 type.
+ * Editorial changes.
+ *
* Revision 1.61 2001/02/09 15:40:59 rassmann
* Editorial changes.
*
@@ -203,17 +419,16 @@
* Revision 1.10 1998/10/14 11:20:57 malthoff
* Make SkXmAutoNegDone() public, because it's
* used in diagnostics, too.
- * The Link Up event to the RLMT is issued in
- * SkXmIrq(). SkXmIrq() is not available in
- * diagnostics. Use PHY_READ when reading
- * PHY registers.
+ * The Link Up event to the RLMT is issued in SkXmIrq().
+ * SkXmIrq() is not available in diagnostics.
+ * Use PHY_READ when reading PHY registers.
*
* Revision 1.9 1998/10/14 05:50:10 cgoos
* Added definition for Para.
*
* Revision 1.8 1998/10/14 05:41:28 gklug
* add: Xmac IRQ
- * add: auto negotiation done function
+ * add: auto-negotiation done function
*
* Revision 1.7 1998/10/09 06:55:20 malthoff
* The configuration of the XMACs Tx Request Threshold
@@ -246,17 +461,9 @@
******************************************************************************/
#include "h/skdrv1st.h"
-#include "h/xmac_ii.h"
#include "h/skdrv2nd.h"
-/* defines ********************************************************************/
/* typedefs *******************************************************************/
-/* global variables ***********************************************************/
-
-/* local variables ************************************************************/
-
-static const char SysKonnectFileId[] =
- "@(#)$Id: skxmac2.c,v 1.61 2001/02/09 15:40:59 rassmann Exp $ (C) SK ";
/* BCOM PHY magic pattern list */
typedef struct s_PhyHack {
@@ -264,6 +471,14 @@
SK_U16 PhyVal; /* Value to write */
} BCOM_HACK;
+/* local variables ************************************************************/
+
+#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
+static const char SysKonnectFileId[] =
+ "@(#) $Id: skxmac2.c,v 1.99 2003/07/11 12:19:33 rschmidt Exp $ (C) Marvell.";
+#endif
+
+#ifdef GENESIS
BCOM_HACK BcomRegA1Hack[] = {
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 },
{ 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 },
@@ -275,223 +490,771 @@
{ 0x15, 0x0A04 }, { 0x18, 0x0420 },
{ 0, 0 }
};
+#endif
/* function prototypes ********************************************************/
+#ifdef GENESIS
static void SkXmInitPhyXmac(SK_AC*, SK_IOC, int, SK_BOOL);
static void SkXmInitPhyBcom(SK_AC*, SK_IOC, int, SK_BOOL);
-static void SkXmInitPhyLone(SK_AC*, SK_IOC, int, SK_BOOL);
-static void SkXmInitPhyNat (SK_AC*, SK_IOC, int, SK_BOOL);
static int SkXmAutoNegDoneXmac(SK_AC*, SK_IOC, int);
static int SkXmAutoNegDoneBcom(SK_AC*, SK_IOC, int);
+#endif /* GENESIS */
+#ifdef YUKON
+static void SkGmInitPhyMarv(SK_AC*, SK_IOC, int, SK_BOOL);
+static int SkGmAutoNegDoneMarv(SK_AC*, SK_IOC, int);
+#endif /* YUKON */
+#ifdef OTHER_PHY
+static void SkXmInitPhyLone(SK_AC*, SK_IOC, int, SK_BOOL);
+static void SkXmInitPhyNat (SK_AC*, SK_IOC, int, SK_BOOL);
static int SkXmAutoNegDoneLone(SK_AC*, SK_IOC, int);
static int SkXmAutoNegDoneNat (SK_AC*, SK_IOC, int);
+#endif /* OTHER_PHY */
+
+
+#ifdef GENESIS
+/******************************************************************************
+ *
+ * SkXmPhyRead() - Read from XMAC PHY register
+ *
+ * Description: reads a 16-bit word from XMAC PHY or ext. PHY
+ *
+ * Returns:
+ * nothing
+ */
+void SkXmPhyRead(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* I/O Context */
+int Port, /* Port Index (MAC_1 + n) */
+int PhyReg, /* Register Address (Offset) */
+SK_U16 SK_FAR *pVal) /* Pointer to Value */
+{
+ SK_U16 Mmu;
+ SK_GEPORT *pPrt;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ /* write the PHY register's address */
+ XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
+
+ /* get the PHY register's value */
+ XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
+
+ if (pPrt->PhyType != SK_PHY_XMAC) {
+ do {
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
+ /* wait until 'Ready' is set */
+ } while ((Mmu & XM_MMU_PHY_RDY) == 0);
+ /* get the PHY register's value */
+ XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
+ }
+} /* SkXmPhyRead */
+
+
+/******************************************************************************
+ *
+ * SkXmPhyWrite() - Write to XMAC PHY register
+ *
+ * Description: writes a 16-bit word to XMAC PHY or ext. PHY
+ *
+ * Returns:
+ * nothing
+ */
+void SkXmPhyWrite(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* I/O Context */
+int Port, /* Port Index (MAC_1 + n) */
+int PhyReg, /* Register Address (Offset) */
+SK_U16 Val) /* Value */
+{
+ SK_U16 Mmu;
+ SK_GEPORT *pPrt;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ if (pPrt->PhyType != SK_PHY_XMAC) {
+ do {
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
+ /* wait until 'Busy' is cleared */
+ } while ((Mmu & XM_MMU_PHY_BUSY) != 0);
+ }
+
+ /* write the PHY register's address */
+ XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
+
+ /* write the PHY register's value */
+ XM_OUT16(IoC, Port, XM_PHY_DATA, Val);
+
+ if (pPrt->PhyType != SK_PHY_XMAC) {
+ do {
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
+ /* wait until 'Busy' is cleared */
+ } while ((Mmu & XM_MMU_PHY_BUSY) != 0);
+ }
+} /* SkXmPhyWrite */
+#endif /* GENESIS */
+
+
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmPhyRead() - Read from GPHY register
+ *
+ * Description: reads a 16-bit word from GPHY through MDIO
+ *
+ * Returns:
+ * nothing
+ */
+void SkGmPhyRead(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* I/O Context */
+int Port, /* Port Index (MAC_1 + n) */
+int PhyReg, /* Register Address (Offset) */
+SK_U16 SK_FAR *pVal) /* Pointer to Value */
+{
+ SK_U16 Ctrl;
+ SK_GEPORT *pPrt;
+#ifdef VCPU
+ u_long SimCyle;
+ u_long SimLowTime;
+
+ VCPUgetTime(&SimCyle, &SimLowTime);
+ VCPUprintf(0, "SkGmPhyRead(%u), SimCyle=%u, SimLowTime=%u\n",
+ PhyReg, SimCyle, SimLowTime);
+#endif /* VCPU */
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ /* set PHY-Register offset and 'Read' OpCode (= 1) */
+ *pVal = (SK_U16)(GM_SMI_CT_PHY_AD(pPrt->PhyAddr) |
+ GM_SMI_CT_REG_AD(PhyReg) | GM_SMI_CT_OP_RD);
+
+ GM_OUT16(IoC, Port, GM_SMI_CTRL, *pVal);
+
+ GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
+
+ /* additional check for MDC/MDIO activity */
+ if ((Ctrl & GM_SMI_CT_BUSY) == 0) {
+ *pVal = 0;
+ return;
+ }
+
+ *pVal |= GM_SMI_CT_BUSY;
+
+ do {
+#ifdef VCPU
+ VCPUwaitTime(1000);
+#endif /* VCPU */
+
+ GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
+
+ /* wait until 'ReadValid' is set */
+ } while (Ctrl == *pVal);
+
+ /* get the PHY register's value */
+ GM_IN16(IoC, Port, GM_SMI_DATA, pVal);
+
+#ifdef VCPU
+ VCPUgetTime(&SimCyle, &SimLowTime);
+ VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n",
+ SimCyle, SimLowTime);
+#endif /* VCPU */
+
+} /* SkGmPhyRead */
+
+
+/******************************************************************************
+ *
+ * SkGmPhyWrite() - Write to GPHY register
+ *
+ * Description: writes a 16-bit word to GPHY through MDIO
+ *
+ * Returns:
+ * nothing
+ */
+void SkGmPhyWrite(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* I/O Context */
+int Port, /* Port Index (MAC_1 + n) */
+int PhyReg, /* Register Address (Offset) */
+SK_U16 Val) /* Value */
+{
+ SK_U16 Ctrl;
+ SK_GEPORT *pPrt;
+#ifdef VCPU
+ SK_U32 DWord;
+ u_long SimCyle;
+ u_long SimLowTime;
+
+ VCPUgetTime(&SimCyle, &SimLowTime);
+ VCPUprintf(0, "SkGmPhyWrite(Reg=%u, Val=0x%04x), SimCyle=%u, SimLowTime=%u\n",
+ PhyReg, Val, SimCyle, SimLowTime);
+#endif /* VCPU */
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ /* write the PHY register's value */
+ GM_OUT16(IoC, Port, GM_SMI_DATA, Val);
+
+ /* set PHY-Register offset and 'Write' OpCode (= 0) */
+ Val = GM_SMI_CT_PHY_AD(pPrt->PhyAddr) | GM_SMI_CT_REG_AD(PhyReg);
+
+ GM_OUT16(IoC, Port, GM_SMI_CTRL, Val);
+
+ GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
+
+ /* additional check for MDC/MDIO activity */
+ if ((Ctrl & GM_SMI_CT_BUSY) == 0) {
+ return;
+ }
+
+ Val |= GM_SMI_CT_BUSY;
+
+ do {
+#ifdef VCPU
+ /* read Timer value */
+ SK_IN32(IoC, B2_TI_VAL, &DWord);
+
+ VCPUwaitTime(1000);
+#endif /* VCPU */
+
+ GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
+
+ /* wait until 'Busy' is cleared */
+ } while (Ctrl == Val);
+
+#ifdef VCPU
+ VCPUgetTime(&SimCyle, &SimLowTime);
+ VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n",
+ SimCyle, SimLowTime);
+#endif /* VCPU */
+
+} /* SkGmPhyWrite */
+#endif /* YUKON */
+
+
+#ifdef SK_DIAG
/******************************************************************************
*
- * SkXmSetRxCmd() - Modify the value of the XMACs Rx Command Register
+ * SkGePhyRead() - Read from PHY register
+ *
+ * Description: calls a read PHY routine dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkGePhyRead(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* I/O Context */
+int Port, /* Port Index (MAC_1 + n) */
+int PhyReg, /* Register Address (Offset) */
+SK_U16 *pVal) /* Pointer to Value */
+{
+ void (*r_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 *pVal);
+
+ if (pAC->GIni.GIGenesis) {
+ r_func = SkXmPhyRead;
+ }
+ else {
+ r_func = SkGmPhyRead;
+ }
+
+ r_func(pAC, IoC, Port, PhyReg, pVal);
+} /* SkGePhyRead */
+
+
+/******************************************************************************
+ *
+ * SkGePhyWrite() - Write to PHY register
+ *
+ * Description: calls a write PHY routine dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkGePhyWrite(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* I/O Context */
+int Port, /* Port Index (MAC_1 + n) */
+int PhyReg, /* Register Address (Offset) */
+SK_U16 Val) /* Value */
+{
+ void (*w_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 Val);
+
+ if (pAC->GIni.GIGenesis) {
+ w_func = SkXmPhyWrite;
+ }
+ else {
+ w_func = SkGmPhyWrite;
+ }
+
+ w_func(pAC, IoC, Port, PhyReg, Val);
+} /* SkGePhyWrite */
+#endif /* SK_DIAG */
+
+
+/******************************************************************************
+ *
+ * SkMacPromiscMode() - Enable / Disable Promiscuous Mode
+ *
+ * Description:
+ * enables / disables promiscuous mode by setting Mode Register (XMAC) or
+ * Receive Control Register (GMAC) dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacPromiscMode(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL Enable) /* Enable / Disable */
+{
+#ifdef YUKON
+ SK_U16 RcReg;
+#endif
+#ifdef GENESIS
+ SK_U32 MdReg;
+#endif
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN32(IoC, Port, XM_MODE, &MdReg);
+ /* enable or disable promiscuous mode */
+ if (Enable) {
+ MdReg |= XM_MD_ENA_PROM;
+ }
+ else {
+ MdReg &= ~XM_MD_ENA_PROM;
+ }
+ /* setup Mode Register */
+ XM_OUT32(IoC, Port, XM_MODE, MdReg);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
+
+ /* enable or disable unicast and multicast filtering */
+ if (Enable) {
+ RcReg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
+ }
+ else {
+ RcReg |= (GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
+ }
+ /* setup Receive Control Register */
+ GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg);
+ }
+#endif /* YUKON */
+
+} /* SkMacPromiscMode*/
+
+
+/******************************************************************************
+ *
+ * SkMacHashing() - Enable / Disable Hashing
+ *
+ * Description:
+ * enables / disables hashing by setting Mode Register (XMAC) or
+ * Receive Control Register (GMAC) dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacHashing(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL Enable) /* Enable / Disable */
+{
+#ifdef YUKON
+ SK_U16 RcReg;
+#endif
+#ifdef GENESIS
+ SK_U32 MdReg;
+#endif
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN32(IoC, Port, XM_MODE, &MdReg);
+ /* enable or disable hashing */
+ if (Enable) {
+ MdReg |= XM_MD_ENA_HASH;
+ }
+ else {
+ MdReg &= ~XM_MD_ENA_HASH;
+ }
+ /* setup Mode Register */
+ XM_OUT32(IoC, Port, XM_MODE, MdReg);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
+
+ /* enable or disable multicast filtering */
+ if (Enable) {
+ RcReg |= GM_RXCR_MCF_ENA;
+ }
+ else {
+ RcReg &= ~GM_RXCR_MCF_ENA;
+ }
+ /* setup Receive Control Register */
+ GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg);
+ }
+#endif /* YUKON */
+
+} /* SkMacHashing*/
+
+
+#ifdef SK_DIAG
+/******************************************************************************
+ *
+ * SkXmSetRxCmd() - Modify the value of the XMAC's Rx Command Register
*
* Description:
* The features
- * o FCS stripping, SK_STRIP_FCS_ON/OFF
- * o pad byte stripping, SK_STRIP_PAD_ON/OFF
- * o don't set XMR_FS_ERR in frame SK_LENERR_OK_ON/OFF
- * status for inrange length error
- * frames, and
- * o don't set XMR_FS_ERR in frame SK_BIG_PK_OK_ON/OFF
- * status for frames > 1514 bytes
+ * - FCS stripping, SK_STRIP_FCS_ON/OFF
+ * - pad byte stripping, SK_STRIP_PAD_ON/OFF
+ * - don't set XMR_FS_ERR in status SK_LENERR_OK_ON/OFF
+ * for inrange length error frames
+ * - don't set XMR_FS_ERR in status SK_BIG_PK_OK_ON/OFF
+ * for frames > 1514 bytes
+ * - enable Rx of own packets SK_SELF_RX_ON/OFF
*
- * for incomming packets may be enabled/disabled by this function.
+ * for incoming packets may be enabled/disabled by this function.
* Additional modes may be added later.
* Multiple modes can be enabled/disabled at the same time.
- * The new configuration is stored into the HWAC port configuration
- * and is written to the Receive Command register immediatlely.
- * The new configuration is saved over any SkGePortStop() and
- * SkGeInitPort() calls. The configured value will be overwritten
- * when SkGeInit(Level 0) is executed.
+ * The new configuration is written to the Rx Command register immediately.
*
* Returns:
* nothing
*/
-void SkXmSetRxCmd(
+static void SkXmSetRxCmd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port, /* The XMAC to handle with belongs to this Port */
+int Port, /* Port Index (MAC_1 + n) */
int Mode) /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF,
SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
{
- SK_GEPORT *pPrt;
- SK_U16 OldRxMode;
+ SK_U16 OldRxCmd;
+ SK_U16 RxCmd;
- pPrt = &pAC->GIni.GP[Port];
- OldRxMode = pPrt->PRxCmd;
+ XM_IN16(IoC, Port, XM_RX_CMD, &OldRxCmd);
- switch(Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) {
+ RxCmd = OldRxCmd;
+
+ switch (Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) {
case SK_STRIP_FCS_ON:
- pPrt->PRxCmd |= XM_RX_STRIP_FCS;
+ RxCmd |= XM_RX_STRIP_FCS;
break;
case SK_STRIP_FCS_OFF:
- pPrt->PRxCmd &= ~XM_RX_STRIP_FCS;
+ RxCmd &= ~XM_RX_STRIP_FCS;
break;
}
- switch(Mode & (SK_STRIP_PAD_ON | SK_STRIP_PAD_OFF)) {
+ switch (Mode & (SK_STRIP_PAD_ON | SK_STRIP_PAD_OFF)) {
case SK_STRIP_PAD_ON:
- pPrt->PRxCmd |= XM_RX_STRIP_PAD;
+ RxCmd |= XM_RX_STRIP_PAD;
break;
case SK_STRIP_PAD_OFF:
- pPrt->PRxCmd &= ~XM_RX_STRIP_PAD;
+ RxCmd &= ~XM_RX_STRIP_PAD;
break;
}
- switch(Mode & (SK_LENERR_OK_ON | SK_LENERR_OK_OFF)) {
+ switch (Mode & (SK_LENERR_OK_ON | SK_LENERR_OK_OFF)) {
case SK_LENERR_OK_ON:
- pPrt->PRxCmd |= XM_RX_LENERR_OK;
+ RxCmd |= XM_RX_LENERR_OK;
break;
case SK_LENERR_OK_OFF:
- pPrt->PRxCmd &= ~XM_RX_LENERR_OK;
+ RxCmd &= ~XM_RX_LENERR_OK;
break;
}
- switch(Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) {
+ switch (Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) {
case SK_BIG_PK_OK_ON:
- pPrt->PRxCmd |= XM_RX_BIG_PK_OK;
+ RxCmd |= XM_RX_BIG_PK_OK;
break;
case SK_BIG_PK_OK_OFF:
- pPrt->PRxCmd &= ~XM_RX_BIG_PK_OK;
+ RxCmd &= ~XM_RX_BIG_PK_OK;
+ break;
+ }
+
+ switch (Mode & (SK_SELF_RX_ON | SK_SELF_RX_OFF)) {
+ case SK_SELF_RX_ON:
+ RxCmd |= XM_RX_SELF_RX;
+ break;
+ case SK_SELF_RX_OFF:
+ RxCmd &= ~XM_RX_SELF_RX;
break;
}
- /* Write the new mode to the receive command register if required */
- if (OldRxMode != pPrt->PRxCmd) {
- XM_OUT16(IoC, Port, XM_RX_CMD, pPrt->PRxCmd);
+ /* Write the new mode to the Rx command register if required */
+ if (OldRxCmd != RxCmd) {
+ XM_OUT16(IoC, Port, XM_RX_CMD, RxCmd);
}
-} /* SkXmSetRxCmd*/
+} /* SkXmSetRxCmd */
/******************************************************************************
*
- * SkXmClrExactAddr() - Clear Exact Match Address Registers
+ * SkGmSetRxCmd() - Modify the value of the GMAC's Rx Control Register
*
* Description:
- * All Exact Match Address registers of the XMAC 'Port' will be
- * cleared starting with 'StartNum' up to (and including) the
- * Exact Match address number of 'StopNum'.
+ * The features
+ * - FCS (CRC) stripping, SK_STRIP_FCS_ON/OFF
+ * - don't set GMR_FS_LONG_ERR SK_BIG_PK_OK_ON/OFF
+ * for frames > 1514 bytes
+ * - enable Rx of own packets SK_SELF_RX_ON/OFF
+ *
+ * for incoming packets may be enabled/disabled by this function.
+ * Additional modes may be added later.
+ * Multiple modes can be enabled/disabled at the same time.
+ * The new configuration is written to the Rx Command register immediately.
*
* Returns:
* nothing
*/
-void SkXmClrExactAddr(
+static void SkGmSetRxCmd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port, /* The XMAC to handle with belongs to this Port */
-int StartNum, /* Begin with this Address Register Index (0..15) */
-int StopNum) /* Stop after finished with this Register Idx (0..15) */
+int Port, /* Port Index (MAC_1 + n) */
+int Mode) /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF,
+ SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
{
- int i;
- SK_U16 ZeroAddr[3] = {0x0000, 0x0000, 0x0000};
+ SK_U16 OldRxCmd;
+ SK_U16 RxCmd;
- if ((unsigned)StartNum > 15 || (unsigned)StopNum > 15 ||
- StartNum > StopNum) {
+ if ((Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) != 0) {
+
+ GM_IN16(IoC, Port, GM_RX_CTRL, &OldRxCmd);
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E001, SKERR_HWI_E001MSG);
- return;
+ RxCmd = OldRxCmd;
+
+ if ((Mode & SK_STRIP_FCS_ON) != 0) {
+ RxCmd |= GM_RXCR_CRC_DIS;
+ }
+ else {
+ RxCmd &= ~GM_RXCR_CRC_DIS;
+ }
+ /* Write the new mode to the Rx control register if required */
+ if (OldRxCmd != RxCmd) {
+ GM_OUT16(IoC, Port, GM_RX_CTRL, RxCmd);
+ }
}
- for (i = StartNum; i <= StopNum; i++) {
- XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]);
+ if ((Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) != 0) {
+
+ GM_IN16(IoC, Port, GM_SERIAL_MODE, &OldRxCmd);
+
+ RxCmd = OldRxCmd;
+
+ if ((Mode & SK_BIG_PK_OK_ON) != 0) {
+ RxCmd |= GM_SMOD_JUMBO_ENA;
+ }
+ else {
+ RxCmd &= ~GM_SMOD_JUMBO_ENA;
+ }
+ /* Write the new mode to the Rx control register if required */
+ if (OldRxCmd != RxCmd) {
+ GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd);
+ }
}
-} /* SkXmClrExactAddr */
+} /* SkGmSetRxCmd */
/******************************************************************************
*
- * SkXmClrSrcCheck() - Clear Source Check Address Register
+ * SkMacSetRxCmd() - Modify the value of the MAC's Rx Control Register
*
- * Description:
- * The Source Check Address Register of the XMAC 'Port' number
- * will be cleared.
+ * Description: modifies the MAC's Rx Control reg. dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacSetRxCmd(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+int Mode) /* Rx Mode */
+{
+ if (pAC->GIni.GIGenesis) {
+
+ SkXmSetRxCmd(pAC, IoC, Port, Mode);
+ }
+ else {
+
+ SkGmSetRxCmd(pAC, IoC, Port, Mode);
+ }
+
+} /* SkMacSetRxCmd */
+
+
+/******************************************************************************
+ *
+ * SkMacCrcGener() - Enable / Disable CRC Generation
+ *
+ * Description: enables / disables CRC generation dep. on board type
*
* Returns:
* nothing
*/
-static void SkXmClrSrcCheck(
+void SkMacCrcGener(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* The XMAC to handle with belongs to this Port (MAC_1 + n) */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL Enable) /* Enable / Disable */
{
- SK_U16 ZeroAddr[3] = {0x0000, 0x0000, 0x0000};
+ SK_U16 Word;
- XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr);
-} /* SkXmClrSrcCheck */
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN16(IoC, Port, XM_TX_CMD, &Word);
+
+ if (Enable) {
+ Word &= ~XM_TX_NO_CRC;
+ }
+ else {
+ Word |= XM_TX_NO_CRC;
+ }
+ /* setup Tx Command Register */
+ XM_OUT16(IoC, Port, XM_TX_CMD, Word);
+ }
+ else {
+
+ GM_IN16(IoC, Port, GM_TX_CTRL, &Word);
+
+ if (Enable) {
+ Word &= ~GM_TXCR_CRC_DIS;
+ }
+ else {
+ Word |= GM_TXCR_CRC_DIS;
+ }
+ /* setup Tx Control Register */
+ GM_OUT16(IoC, Port, GM_TX_CTRL, Word);
+ }
+
+} /* SkMacCrcGener*/
+
+#endif /* SK_DIAG */
+#ifdef GENESIS
/******************************************************************************
*
- * SkXmClrHashAddr() - Clear Hash Address Registers
+ * SkXmClrExactAddr() - Clear Exact Match Address Registers
*
* Description:
- * The Hash Address Register of the XMAC 'Port' will be cleared.
+ * All Exact Match Address registers of the XMAC 'Port' will be
+ * cleared starting with 'StartNum' up to (and including) the
+ * Exact Match address number of 'StopNum'.
*
* Returns:
* nothing
*/
-static void SkXmClrHashAddr(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* The XMAC to handle with belongs to this Port (MAC_1 + n) */
+void SkXmClrExactAddr(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+int StartNum, /* Begin with this Address Register Index (0..15) */
+int StopNum) /* Stop after finished with this Register Idx (0..15) */
{
- SK_U16 ZeroAddr[4] = {0x0000, 0x0000, 0x0000, 0x0000};
+ int i;
+ SK_U16 ZeroAddr[3] = {0x0000, 0x0000, 0x0000};
- XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr);
-} /* SkXmClrHashAddr*/
+ if ((unsigned)StartNum > 15 || (unsigned)StopNum > 15 ||
+ StartNum > StopNum) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E001, SKERR_HWI_E001MSG);
+ return;
+ }
+
+ for (i = StartNum; i <= StopNum; i++) {
+ XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]);
+ }
+} /* SkXmClrExactAddr */
+#endif /* GENESIS */
/******************************************************************************
*
- * SkXmFlushTxFifo() - Flush the XMACs transmit FIFO
+ * SkMacFlushTxFifo() - Flush the MAC's transmit FIFO
*
* Description:
- * Flush the transmit FIFO of the XMAC specified by the index 'Port'
+ * Flush the transmit FIFO of the MAC specified by the index 'Port'
*
* Returns:
* nothing
*/
-void SkXmFlushTxFifo(
+void SkMacFlushTxFifo(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* The XMAC to handle with belongs to this Port (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
+#ifdef GENESIS
SK_U32 MdReg;
- XM_IN32(IoC, Port, XM_MODE, &MdReg);
- MdReg |= XM_MD_FTF;
- XM_OUT32(IoC, Port, XM_MODE, MdReg);
-} /* SkXmFlushTxFifo */
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN32(IoC, Port, XM_MODE, &MdReg);
+
+ XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FTF);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* no way to flush the FIFO we have to issue a reset */
+ /* TBD */
+ }
+#endif /* YUKON */
+
+} /* SkMacFlushTxFifo */
/******************************************************************************
*
- * SkXmFlushRxFifo() - Flush the XMACs receive FIFO
+ * SkMacFlushRxFifo() - Flush the MAC's receive FIFO
*
* Description:
- * Flush the receive FIFO of the XMAC specified by the index 'Port'
+ * Flush the receive FIFO of the MAC specified by the index 'Port'
*
* Returns:
* nothing
*/
-void SkXmFlushRxFifo(
+void SkMacFlushRxFifo(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* The XMAC to handle with belongs to this Port (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
+#ifdef GENESIS
SK_U32 MdReg;
- XM_IN32(IoC, Port, XM_MODE, &MdReg);
- MdReg |= XM_MD_FRF;
- XM_OUT32(IoC, Port, XM_MODE, MdReg);
-} /* SkXmFlushRxFifo*/
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN32(IoC, Port, XM_MODE, &MdReg);
+ XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FRF);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* no way to flush the FIFO we have to issue a reset */
+ /* TBD */
+ }
+#endif /* YUKON */
+} /* SkMacFlushRxFifo */
+
+
+#ifdef GENESIS
/******************************************************************************
*
* SkXmSoftRst() - Do a XMAC software reset
@@ -502,8 +1265,8 @@
* (XM_GP_RES_MAC bit in XM_GP_PORT) must not be used!
*
* The software reset is done by
- * - disabling the Rx and Tx state maschine,
- * - reseting the statistics module,
+ * - disabling the Rx and Tx state machine,
+ * - resetting the statistics module,
* - clear all other significant XMAC Mode,
* Command, and Control Registers
* - clearing the Hash Register and the
@@ -513,9 +1276,9 @@
* Note:
* Another requirement when stopping the XMAC is to
* avoid sending corrupted frames on the network.
- * Disabling the Tx state maschine will NOT interrupt
+ * Disabling the Tx state machine will NOT interrupt
* the currently transmitted frame. But we must take care
- * that the tx FIFO is cleared AFTER the current frame
+ * that the Tx FIFO is cleared AFTER the current frame
* is complete sent to the network.
*
* It takes about 12ns to send a frame with 1538 bytes.
@@ -527,60 +1290,50 @@
* Returns:
* nothing
*/
-void SkXmSoftRst(
+static void SkXmSoftRst(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* port to stop (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
- SK_GEPORT *pPrt;
- SK_U16 Word;
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* disable the receiver and transmitter */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX|XM_MMU_ENA_TX));
-
+ SK_U16 ZeroAddr[4] = {0x0000, 0x0000, 0x0000, 0x0000};
+
/* reset the statistics module */
XM_OUT32(IoC, Port, XM_GP_PORT, XM_GP_RES_STAT);
- /*
- * clear all other significant XMAC Mode,
- * Command, and Control Registers
- */
- XM_OUT16(IoC, Port, XM_IMSK, 0xffff); /* disable all IRQs */
- XM_OUT32(IoC, Port, XM_MODE, 0x00000000); /* clear Mode Reg */
- XM_OUT16(IoC, Port, XM_TX_CMD, 0x0000); /* reset TX CMD Reg */
- XM_OUT16(IoC, Port, XM_RX_CMD, 0x0000); /* reset RX CMD Reg */
+ /* disable all XMAC IRQs */
+ XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
+
+ XM_OUT32(IoC, Port, XM_MODE, 0); /* clear Mode Reg */
+
+ XM_OUT16(IoC, Port, XM_TX_CMD, 0); /* reset TX CMD Reg */
+ XM_OUT16(IoC, Port, XM_RX_CMD, 0); /* reset RX CMD Reg */
/* disable all PHY IRQs */
switch (pAC->GIni.GP[Port].PhyType) {
case SK_PHY_BCOM:
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_INT_MASK, 0xffff);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);
break;
+#ifdef OTHER_PHY
case SK_PHY_LONE:
- PHY_WRITE(IoC, pPrt, Port, PHY_LONE_INT_ENAB, 0x0);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);
break;
case SK_PHY_NAT:
/* todo: National
- PHY_WRITE(IoC, pPrt, Port, PHY_NAT_INT_MASK,
- 0xffff); */
+ SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */
break;
+#endif /* OTHER_PHY */
}
/* clear the Hash Register */
- SkXmClrHashAddr(pAC, IoC, Port);
+ XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr);
/* clear the Exact Match Address registers */
SkXmClrExactAddr(pAC, IoC, Port, 0, 15);
- SkXmClrSrcCheck(pAC, IoC, Port);
-
- /* flush the XMAC's Rx and Tx FIFOs */
- SkXmFlushTxFifo(pAC, IoC, Port);
- SkXmFlushRxFifo(pAC, IoC, Port);
+
+ /* clear the Source Check Address registers */
+ XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr);
- pAC->GIni.GP[Port].PState = SK_PRT_STOP;
-} /* SkXmSoftRst*/
+} /* SkXmSoftRst */
/******************************************************************************
@@ -589,11 +1342,9 @@
*
* Description:
* The XMAC of the specified 'Port' and all connected devices
- * (PHY and SERDES) will receive a reset signal on its *Reset
- * pins.
- * External PHYs must be reset be clearing a bit in the GPIO
- * register (Timing requirements: Broadcom: 400ns, Level One:
- * none, National: 80ns).
+ * (PHY and SERDES) will receive a reset signal on its *Reset pins.
+ * External PHYs must be reset be clearing a bit in the GPIO register
+ * (Timing requirements: Broadcom: 400ns, Level One: none, National: 80ns).
*
* ATTENTION:
* It is absolutely necessary to reset the SW_RST Bit first
@@ -602,10 +1353,10 @@
* Returns:
* nothing
*/
-void SkXmHardRst(
+static void SkXmHardRst(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port) /* port to stop (MAC_1 + n) */
+int Port) /* Port Index (MAC_1 + n) */
{
SK_U32 Reg;
int i;
@@ -613,14 +1364,12 @@
SK_U16 Word;
for (i = 0; i < 4; i++) {
- /* TX_MFF_CTRL1 is a 32 bit register but only the lowest 16 */
- /* bit contains buttoms to press */
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), (SK_U16)MFF_CLR_MAC_RST);
+ /* TX_MFF_CTRL1 has 32 bits, but only the lowest 16 bits are used */
+ SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
TOut = 0;
do {
- TOut ++;
- if (TOut > 10000) {
+ if (TOut++ > 10000) {
/*
* Adapter seems to be in RESET state.
* Registers cannot be written.
@@ -628,9 +1377,10 @@
return;
}
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1),
- (SK_U16) MFF_SET_MAC_RST);
- SK_IN16(IoC,MR_ADDR(Port,TX_MFF_CTRL1), &Word);
+ SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_SET_MAC_RST);
+
+ SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &Word);
+
} while ((Word & MFF_SET_MAC_RST) == 0);
}
@@ -652,16 +1402,164 @@
SK_IN32(IoC, B2_GP_IO, &Reg);
}
- pAC->GIni.GP[Port].PState = SK_PRT_RESET;
} /* SkXmHardRst */
+#endif /* GENESIS */
+
+
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmSoftRst() - Do a GMAC software reset
+ *
+ * Description:
+ * The GPHY registers should not be destroyed during this
+ * kind of software reset.
+ *
+ * Returns:
+ * nothing
+ */
+static void SkGmSoftRst(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_U16 EmptyHash[4] = {0x0000, 0x0000, 0x0000, 0x0000};
+ SK_U16 RxCtrl;
+
+ /* reset the statistics module */
+
+ /* disable all GMAC IRQs */
+ SK_OUT8(IoC, GMAC_IRQ_MSK, 0);
+
+ /* disable all PHY IRQs */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
+
+ /* clear the Hash Register */
+ GM_OUTHASH(IoC, Port, GM_MC_ADDR_H1, EmptyHash);
+
+ /* Enable Unicast and Multicast filtering */
+ GM_IN16(IoC, Port, GM_RX_CTRL, &RxCtrl);
+
+ GM_OUT16(IoC, Port, GM_RX_CTRL,
+ (SK_U16)(RxCtrl | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA));
+
+} /* SkGmSoftRst */
+
+
+/******************************************************************************
+ *
+ * SkGmHardRst() - Do a GMAC hardware reset
+ *
+ * Description:
+ *
+ * ATTENTION:
+ * It is absolutely necessary to reset the SW_RST Bit first
+ * before calling this function.
+ *
+ * Returns:
+ * nothing
+ */
+static void SkGmHardRst(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ /* set GPHY Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
+
+ /* set GMAC Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
+
+} /* SkGmHardRst */
+#endif /* YUKON */
+
+
+/******************************************************************************
+ *
+ * SkMacSoftRst() - Do a MAC software reset
+ *
+ * Description: calls a MAC software reset routine dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacSoftRst(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ /* disable receiver and transmitter */
+ SkMacRxTxDisable(pAC, IoC, Port);
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ SkXmSoftRst(pAC, IoC, Port);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ SkGmSoftRst(pAC, IoC, Port);
+ }
+#endif /* YUKON */
+
+ /* flush the MAC's Rx and Tx FIFOs */
+ SkMacFlushTxFifo(pAC, IoC, Port);
+
+ SkMacFlushRxFifo(pAC, IoC, Port);
+ pPrt->PState = SK_PRT_STOP;
+} /* SkMacSoftRst */
+
+
+/******************************************************************************
+ *
+ * SkMacHardRst() - Do a MAC hardware reset
+ *
+ * Description: calls a MAC hardware reset routine dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacHardRst(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ SkXmHardRst(pAC, IoC, Port);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ SkGmHardRst(pAC, IoC, Port);
+ }
+#endif /* YUKON */
+
+ pAC->GIni.GP[Port].PState = SK_PRT_RESET;
+
+} /* SkMacHardRst */
+
+
+#ifdef GENESIS
/******************************************************************************
*
* SkXmInitMac() - Initialize the XMAC II
*
* Description:
- * Initialize all the XMAC of the specified port.
+ * Initialize the XMAC of the specified port.
* The XMAC must be reset or stopped before calling this function.
*
* Note:
@@ -679,7 +1577,6 @@
SK_U32 Reg;
int i;
SK_U16 SWord;
- SK_U16 PhyId;
pPrt = &pAC->GIni.GP[Port];
@@ -687,10 +1584,11 @@
/* Port State: SK_PRT_STOP */
/* Verify that the reset bit is cleared */
SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
- if (SWord & (SK_U16)MFF_SET_MAC_RST) {
+
+ if ((SWord & MFF_SET_MAC_RST) != 0) {
/* PState does not match HW state */
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E006MSG);
- /* Correct it. */
+ /* Correct it */
pPrt->PState = SK_PRT_RESET;
}
}
@@ -701,127 +1599,96 @@
* Note: The SW reset is self clearing, therefore there is
* nothing to do here.
*/
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), (SK_U16)MFF_CLR_MAC_RST);
+ SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
- /* Ensure that XMAC reset release is done (errata from LReinbold?). */
+ /* Ensure that XMAC reset release is done (errata from LReinbold?) */
SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
- /* Clear PHY reset. */
- if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
+ /* Clear PHY reset */
+ if (pPrt->PhyType != SK_PHY_XMAC) {
+
SK_IN32(IoC, B2_GP_IO, &Reg);
+
if (Port == 0) {
- Reg |= GP_DIR_0; /* Set to output. */
- Reg |= GP_IO_0;
+ Reg |= (GP_DIR_0 | GP_IO_0); /* set to output */
}
else {
- Reg |= GP_DIR_2; /* Set to output. */
- Reg |= GP_IO_2;
+ Reg |= (GP_DIR_2 | GP_IO_2); /* set to output */
}
SK_OUT32(IoC, B2_GP_IO, Reg);
- /* Enable GMII interface. */
+ /* Enable GMII interface */
XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD);
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_ID1, &PhyId);
-#ifdef xDEBUG
- if (SWord == 0xFFFF) {
- i = 1;
- do {
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_ID1, &SWord);
- i++;
- /* Limit retries; else machine may hang. */
- } while (SWord == 0xFFFF && i < 500000);
-
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "ID1 is %x after %d reads.",
- (void *)SWord,
- (void *)i);
-
- /* Trigger PCI analyzer */
- /* SK_IN32(IoC, 0x012c, &Reg); */
- }
-#endif /* DEBUG */
+ /* read Id from external PHY (all have the same address) */
+ SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_ID1, &pPrt->PhyId1);
/*
* Optimize MDIO transfer by suppressing preamble.
* Must be done AFTER first access to BCOM chip.
*/
XM_IN16(IoC, Port, XM_MMU_CMD, &SWord);
+
XM_OUT16(IoC, Port, XM_MMU_CMD, SWord | XM_MMU_NO_PRE);
- if (PhyId == 0x6044) {
- /* Workaround BCOM Errata for the C0 type. */
- /* Write magic patterns to reserved registers. */
+ if (pPrt->PhyId1 == PHY_BCOM_ID1_C0) {
+ /*
+ * Workaround BCOM Errata for the C0 type.
+ * Write magic patterns to reserved registers.
+ */
i = 0;
while (BcomRegC0Hack[i].PhyReg != 0) {
- PHY_WRITE(IoC, pPrt, Port, BcomRegC0Hack[i].PhyReg,
+ SkXmPhyWrite(pAC, IoC, Port, BcomRegC0Hack[i].PhyReg,
BcomRegC0Hack[i].PhyVal);
i++;
}
}
- else if (PhyId == 0x6041) {
- /* Workaround BCOM Errata for the A1 type. */
- /* Write magic patterns to reserved registers. */
+ else if (pPrt->PhyId1 == PHY_BCOM_ID1_A1) {
+ /*
+ * Workaround BCOM Errata for the A1 type.
+ * Write magic patterns to reserved registers.
+ */
i = 0;
while (BcomRegA1Hack[i].PhyReg != 0) {
- PHY_WRITE(IoC, pPrt, Port, BcomRegA1Hack[i].PhyReg,
+ SkXmPhyWrite(pAC, IoC, Port, BcomRegA1Hack[i].PhyReg,
BcomRegA1Hack[i].PhyVal);
i++;
}
}
- /* Workaround BCOM Errata (#10523) for all BCom PHYs. */
- /* Disable Power Management after reset. */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL, &SWord);
-#ifdef xDEBUG
- if (SWord == 0xFFFF) {
- i = 1;
- do {
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL, &SWord);
- i++;
- /* Limit retries; else machine may hang. */
- } while (SWord == 0xFFFF && i < 500000);
-
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "AUX_CTRL is %x after %d reads.",
- (void *)SWord,
- (void *)i);
-
- /* Trigger PCI analyzer */
- /* SK_IN32(IoC, 0x012c, &Reg); */
- }
-#endif /* DEBUG */
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL,
- SWord | PHY_B_AC_DIS_PM);
+ /*
+ * Workaround BCOM Errata (#10523) for all BCom PHYs.
+ * Disable Power Management after reset.
+ */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
+
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
+ (SK_U16)(SWord | PHY_B_AC_DIS_PM));
- /* PHY LED initialization is done in SkGeXmitLED(), not here. */
+ /* PHY LED initialization is done in SkGeXmitLED() */
}
/* Dummy read the Interrupt source register */
XM_IN16(IoC, Port, XM_ISRC, &SWord);
/*
- * The autonegotiation process starts immediately after
- * clearing the reset. The autonegotiation process should be
+ * The auto-negotiation process starts immediately after
+ * clearing the reset. The auto-negotiation process should be
* started by the SIRQ, therefore stop it here immediately.
*/
- SkXmInitPhy(pAC, IoC, Port, SK_FALSE);
+ SkMacInitPhy(pAC, IoC, Port, SK_FALSE);
-#if 0
+#ifdef TEST_ONLY
/* temp. code: enable signal detect */
/* WARNING: do not override GMII setting above */
- XM_OUT16(pAC, Port, XM_HW_CFG, XM_HW_COM4SIG);
+ XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_COM4SIG);
#endif
}
/*
* configure the XMACs Station Address
- * B2_MAC_2 = xx xx xx xx xx x1 is programed to XMAC A
- * B2_MAC_3 = xx xx xx xx xx x2 is programed to XMAC B
+ * B2_MAC_2 = xx xx xx xx xx x1 is programmed to XMAC A
+ * B2_MAC_3 = xx xx xx xx xx x2 is programmed to XMAC B
*/
for (i = 0; i < 3; i++) {
/*
@@ -829,6 +1696,7 @@
* independent. Remember this when changing.
*/
SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
+
XM_OUT16(IoC, Port, (XM_SA + i * 2), SWord);
}
@@ -840,49 +1708,54 @@
/* Rx Low Water Mark (XM_RX_LO_WM): use default */
/* configure Rx High Water Mark (XM_RX_HI_WM) */
- XM_OUT16(IoC, Port, XM_RX_HI_WM, 0x05aa);
+ XM_OUT16(IoC, Port, XM_RX_HI_WM, SK_XM_RX_HI_WM);
+
+ /* Configure Tx Request Threshold */
+ SWord = SK_XM_THR_SL; /* for single port */
if (pAC->GIni.GIMacsFound > 1) {
switch (pAC->GIni.GIPortUsage) {
case SK_RED_LINK:
- /* Configure Tx Request Threshold for red. link */
- XM_OUT16(IoC, Port, XM_TX_THR, SK_XM_THR_REDL);
+ SWord = SK_XM_THR_REDL; /* redundant link */
break;
case SK_MUL_LINK:
- /* Configure Tx Request Threshold for load bal. */
- XM_OUT16(IoC, Port, XM_TX_THR, SK_XM_THR_MULL);
+ SWord = SK_XM_THR_MULL; /* load balancing */
break;
case SK_JUMBO_LINK:
- /* Configure Tx Request Threshold for jumbo frames */
- XM_OUT16(IoC, Port, XM_TX_THR, SK_XM_THR_JUMBO);
+ SWord = SK_XM_THR_JUMBO; /* jumbo frames */
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E014,
- SKERR_HWI_E014MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E014, SKERR_HWI_E014MSG);
break;
}
}
- else {
- /* Configure Tx Request Threshold for single port */
- XM_OUT16(IoC, Port, XM_TX_THR, SK_XM_THR_SL);
- }
+ XM_OUT16(IoC, Port, XM_TX_THR, SWord);
- /*
- * setup register defaults for the Rx Command Register
- * - Enable Automatic Frame Padding on Tx side
- */
+ /* setup register defaults for the Tx Command Register */
XM_OUT16(IoC, Port, XM_TX_CMD, XM_TX_AUTO_PAD);
- /*
- * setup register defaults for the Rx Command Register,
- * program value of PRxCmd
- */
- XM_OUT16(IoC, Port, XM_RX_CMD, pPrt->PRxCmd);
+ /* setup register defaults for the Rx Command Register */
+ SWord = XM_RX_STRIP_FCS | XM_RX_LENERR_OK;
+
+ if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
+ SWord |= XM_RX_BIG_PK_OK;
+ }
+
+ if (pPrt->PLinkMode == SK_LMODE_HALF) {
+ /*
+ * If in manual half duplex mode the other side might be in
+ * full duplex mode, so ignore if a carrier extension is not seen
+ * on frames received
+ */
+ SWord |= XM_RX_DIS_CEXT;
+ }
+
+ XM_OUT16(IoC, Port, XM_RX_CMD, SWord);
/*
* setup register defaults for the Mode Register
* - Don't strip error frames to avoid Store & Forward
- * on the rx side.
+ * on the Rx side.
* - Enable 'Check Station Address' bit
* - Enable 'Check Address Array' bit
*/
@@ -906,25 +1779,271 @@
* Do NOT init XMAC interrupt mask here.
* All interrupts remain disable until link comes up!
*/
- pPrt->PState = SK_PRT_INIT;
/*
* Any additional configuration changes may be done now.
- * The last action is to enable the rx and tx state machine.
- * This should be done after the autonegotiation process
+ * The last action is to enable the Rx and Tx state machine.
+ * This should be done after the auto-negotiation process
* has been completed successfully.
*/
-} /* SkXmInitMac*/
+} /* SkXmInitMac */
+#endif /* GENESIS */
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmInitMac() - Initialize the GMAC
+ *
+ * Description:
+ * Initialize the GMAC of the specified port.
+ * The GMAC must be reset or stopped before calling this function.
+ *
+ * Note:
+ * The GMAC's Rx and Tx state machine is still disabled when returning.
+ *
+ * Returns:
+ * nothing
+ */
+void SkGmInitMac(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+ int i;
+ SK_U16 SWord;
+ SK_U32 DWord;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ if (pPrt->PState == SK_PRT_STOP) {
+ /* Port State: SK_PRT_STOP */
+ /* Verify that the reset bit is cleared */
+ SK_IN32(IoC, MR_ADDR(Port, GMAC_CTRL), &DWord);
+
+ if ((DWord & GMC_RST_SET) != 0) {
+ /* PState does not match HW state */
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E006MSG);
+ /* Correct it */
+ pPrt->PState = SK_PRT_RESET;
+ }
+ }
+
+ if (pPrt->PState == SK_PRT_RESET) {
+ /* set GPHY Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
+
+ /* set GMAC Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
+
+#ifdef XXX
+ /* clear GMAC Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR);
+
+ /* set GMAC Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
+#endif /* XXX */
+
+ /* set HWCFG_MODE */
+ DWord = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP |
+ GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE |
+ (pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP :
+ GPC_HWCFG_GMII_FIB);
+
+ /* set GPHY Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
+
+ /* release GPHY Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
+
+#ifdef VCPU
+ VCpuWait(9000);
+#endif /* VCPU */
+
+ /* clear GMAC Control reset */
+ SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
+
+#ifdef VCPU
+ VCpuWait(2000);
+#endif /* VCPU */
+
+ /* Auto-negotiation ? */
+ if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
+ /* Auto-negotiation disabled */
+
+ /* get General Purpose Control */
+ GM_IN16(IoC, Port, GM_GP_CTRL, &SWord);
+
+ /* disable auto-update for speed, duplex and flow-control */
+ SWord |= GM_GPCR_AU_ALL_DIS;
+
+ /* setup General Purpose Control Register */
+ GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
+
+ SWord = GM_GPCR_AU_ALL_DIS;
+ }
+ else {
+ SWord = 0;
+ }
+
+ /* speed settings */
+ switch (pPrt->PLinkSpeed) {
+ case SK_LSPEED_AUTO:
+ case SK_LSPEED_1000MBPS:
+ SWord |= GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100;
+ break;
+ case SK_LSPEED_100MBPS:
+ SWord |= GM_GPCR_SPEED_100;
+ break;
+ case SK_LSPEED_10MBPS:
+ break;
+ }
+
+ /* duplex settings */
+ if (pPrt->PLinkMode != SK_LMODE_HALF) {
+ /* set full duplex */
+ SWord |= GM_GPCR_DUP_FULL;
+ }
+
+ switch (pPrt->PFlowCtrlMode) {
+ case SK_FLOW_MODE_NONE:
+ /* set Pause Off */
+ SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_OFF);
+ /* disable Tx & Rx flow-control */
+ SWord |= GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
+ break;
+ case SK_FLOW_MODE_LOC_SEND:
+ /* disable Rx flow-control */
+ SWord |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
+ break;
+ case SK_FLOW_MODE_SYMMETRIC:
+ case SK_FLOW_MODE_SYM_OR_REM:
+ /* enable Tx & Rx flow-control */
+ break;
+ }
+
+ /* setup General Purpose Control Register */
+ GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
+
+ /* dummy read the Interrupt Source Register */
+ SK_IN16(IoC, GMAC_IRQ_SRC, &SWord);
+
+#ifndef VCPU
+ /* read Id from PHY */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_ID1, &pPrt->PhyId1);
+
+ SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
+#endif /* VCPU */
+ }
+
+ (void)SkGmResetCounter(pAC, IoC, Port);
+
+ /* setup Transmit Control Register */
+ GM_OUT16(IoC, Port, GM_TX_CTRL, GM_TXCR_COL_THR);
+
+ /* setup Receive Control Register */
+ GM_OUT16(IoC, Port, GM_RX_CTRL, GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA |
+ GM_RXCR_CRC_DIS);
+
+ /* setup Transmit Flow Control Register */
+ GM_OUT16(IoC, Port, GM_TX_FLOW_CTRL, 0xffff);
+
+ /* setup Transmit Parameter Register */
+#ifdef VCPU
+ GM_IN16(IoC, Port, GM_TX_PARAM, &SWord);
+#endif /* VCPU */
+
+ SWord = (SK_U16)(JAM_LEN_VAL(3) | JAM_IPG_VAL(11) | IPG_JAM_DATA(26));
+
+ GM_OUT16(IoC, Port, GM_TX_PARAM, SWord);
+
+ /* configure the Serial Mode Register */
+#ifdef VCPU
+ GM_IN16(IoC, Port, GM_SERIAL_MODE, &SWord);
+#endif /* VCPU */
+
+ SWord = GM_SMOD_VLAN_ENA | IPG_VAL_FAST_ETH;
+
+ if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
+ /* enable jumbo mode (Max. Frame Length = 9018) */
+ SWord |= GM_SMOD_JUMBO_ENA;
+ }
+
+ GM_OUT16(IoC, Port, GM_SERIAL_MODE, SWord);
+
+ /*
+ * configure the GMACs Station Addresses
+ * in PROM you can find our addresses at:
+ * B2_MAC_1 = xx xx xx xx xx x0 virtual address
+ * B2_MAC_2 = xx xx xx xx xx x1 is programmed to GMAC A
+ * B2_MAC_3 = xx xx xx xx xx x2 is reserved for DualPort
+ */
+
+ for (i = 0; i < 3; i++) {
+ /*
+ * The following 2 statements are together endianess
+ * independent. Remember this when changing.
+ */
+ /* physical address: will be used for pause frames */
+ SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
+
+#ifdef WA_DEV_16
+ /* WA for deviation #16 */
+ if (pAC->GIni.GIChipId == CHIP_ID_YUKON && pAC->GIni.GIChipRev == 0) {
+ /* swap the address bytes */
+ SWord = ((SWord & 0xff00) >> 8) | ((SWord & 0x00ff) << 8);
+
+ /* write to register in reversed order */
+ GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + (2 - i) * 4), SWord);
+ }
+ else {
+ GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
+ }
+#else
+ GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
+#endif /* WA_DEV_16 */
+
+ /* virtual address: will be used for data */
+ SK_IN16(IoC, (B2_MAC_1 + Port * 8 + i * 2), &SWord);
+
+ GM_OUT16(IoC, Port, (GM_SRC_ADDR_2L + i * 4), SWord);
+
+ /* reset Multicast filtering Hash registers 1-3 */
+ GM_OUT16(IoC, Port, GM_MC_ADDR_H1 + 4*i, 0);
+ }
+
+ /* reset Multicast filtering Hash register 4 */
+ GM_OUT16(IoC, Port, GM_MC_ADDR_H4, 0);
+
+ /* enable interrupt mask for counter overflows */
+ GM_OUT16(IoC, Port, GM_TX_IRQ_MSK, 0);
+ GM_OUT16(IoC, Port, GM_RX_IRQ_MSK, 0);
+ GM_OUT16(IoC, Port, GM_TR_IRQ_MSK, 0);
+
+ /* read General Purpose Status */
+ GM_IN16(IoC, Port, GM_GP_STAT, &SWord);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("MAC Stat Reg=0x%04X\n", SWord));
+
+#ifdef SK_DIAG
+ c_print("MAC Stat Reg=0x%04X\n", SWord);
+#endif /* SK_DIAG */
+
+} /* SkGmInitMac */
+#endif /* YUKON */
+
+
+#ifdef GENESIS
/******************************************************************************
*
* SkXmInitDupMd() - Initialize the XMACs Duplex Mode
*
* Description:
- * This function initilaizes the XMACs Duplex Mode.
+ * This function initializes the XMACs Duplex Mode.
* It should be called after successfully finishing
- * the Autonegotiation Process
+ * the Auto-negotiation Process
*
* Returns:
* nothing
@@ -939,9 +2058,9 @@
case SK_LMODE_STAT_HALF:
/* Configuration Actions for Half Duplex Mode */
/*
- * XM_BURST = default value. We are propable not quick
+ * XM_BURST = default value. We are probable not quick
* enough at the 'XMAC' bus to burst 8kB.
- * The XMAC stopps bursting if no transmit frames
+ * The XMAC stops bursting if no transmit frames
* are available or the burst limit is exceeded.
*/
/* XM_TX_RT_LIM = default value (15) */
@@ -969,10 +2088,10 @@
* SkXmInitPauseMd() - initialize the Pause Mode to be used for this port
*
* Description:
- * This function initilaizes the Pause Mode which should
+ * This function initializes the Pause Mode which should
* be used for this port.
* It should be called after successfully finishing
- * the Autonegotiation Process
+ * the Auto-negotiation Process
*
* Returns:
* nothing
@@ -988,22 +2107,26 @@
pPrt = &pAC->GIni.GP[Port];
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
+
if (pPrt->PFlowCtrlStatus == SK_FLOW_STAT_NONE ||
pPrt->PFlowCtrlStatus == SK_FLOW_STAT_LOC_SEND) {
/* Disable Pause Frame Reception */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_IGN_PF);
+ Word |= XM_MMU_IGN_PF;
}
else {
/*
- * enabling pause frame reception is required for 1000BT
+ * enabling pause frame reception is required for 1000BT
* because the XMAC is not reset if the link is going down
*/
/* Enable Pause Frame Reception */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~XM_MMU_IGN_PF);
+ Word &= ~XM_MMU_IGN_PF;
}
+
+ XM_OUT16(IoC, Port, XM_MMU_CMD, Word);
+
+ XM_IN32(IoC, Port, XM_MODE, &DWord);
if (pPrt->PFlowCtrlStatus == SK_FLOW_STAT_SYMMETRIC ||
pPrt->PFlowCtrlStatus == SK_FLOW_STAT_LOC_SEND) {
@@ -1011,11 +2134,10 @@
/*
* Configure Pause Frame Generation
* Use internal and external Pause Frame Generation.
- * Sending pause frames is edge triggert. Send a
- * Pause frame with the maximum pause time if
- * internal oder external FIFO full condition
- * occurs. Send a zero pause time frame to
- * start transmission again.
+ * Sending pause frames is edge triggered.
+ * Send a Pause frame with the maximum pause time if
+ * internal oder external FIFO full condition occurs.
+ * Send a zero pause time frame to re-start transmission.
*/
/* XM_PAUSE_DA = '010000C28001' (default) */
@@ -1025,71 +2147,32 @@
XM_OUT16(IoC, Port, XM_MAC_PTIME, 0xffff);
/* Set Pause Mode in Mode Register */
- XM_IN32(IoC, Port, XM_MODE, &DWord);
- XM_OUT32(IoC, Port, XM_MODE, DWord | XM_PAUSE_MODE);
+ DWord |= XM_PAUSE_MODE;
/* Set Pause Mode in MAC Rx FIFO */
- SK_OUT16(IoC, MR_ADDR(Port,RX_MFF_CTRL1), MFF_ENA_PAUSE);
+ SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_PAUSE);
}
else {
/*
- * disable pause frame generation is required for 1000BT
+ * disable pause frame generation is required for 1000BT
* because the XMAC is not reset if the link is going down
*/
/* Disable Pause Mode in Mode Register */
- XM_IN32(IoC, Port, XM_MODE, &DWord);
- XM_OUT32(IoC, Port, XM_MODE, DWord & ~XM_PAUSE_MODE);
+ DWord &= ~XM_PAUSE_MODE;
/* Disable Pause Mode in MAC Rx FIFO */
- SK_OUT16(IoC, MR_ADDR(Port,RX_MFF_CTRL1), MFF_DIS_PAUSE);
+ SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_DIS_PAUSE);
}
+
+ XM_OUT32(IoC, Port, XM_MODE, DWord);
} /* SkXmInitPauseMd*/
/******************************************************************************
*
- * SkXmInitPhy() - Initialize the XMAC II Phy registers
- *
- * Description:
- * Initialize all the XMACs Phy registers
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-void SkXmInitPhy(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LOOback be set-up? */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
- switch (pPrt->PhyType) {
- case SK_PHY_XMAC:
- SkXmInitPhyXmac(pAC, IoC, Port, DoLoop);
- break;
- case SK_PHY_BCOM:
- SkXmInitPhyBcom(pAC, IoC, Port, DoLoop);
- break;
- case SK_PHY_LONE:
- SkXmInitPhyLone(pAC, IoC, Port, DoLoop);
- break;
- case SK_PHY_NAT:
- SkXmInitPhyNat(pAC, IoC, Port, DoLoop);
- break;
- }
-} /* SkXmInitPhy*/
-
-
-/******************************************************************************
- *
- * SkXmInitPhyXmac() - Initialize the XMAC II Phy registers
+ * SkXmInitPhyXmac() - Initialize the XMAC Phy registers
*
- * Description:
- * Initialize all the XMACs Phy registers
+ * Description: initializes all the XMACs Phy registers
*
* Note:
*
@@ -1100,32 +2183,32 @@
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LOOback be set-up? */
+SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
{
SK_GEPORT *pPrt;
SK_U16 Ctrl;
pPrt = &pAC->GIni.GP[Port];
-
- /* Autonegotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF ||
- pPrt->PLinkMode == SK_LMODE_FULL) {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("InitPhyXmac: no autonegotiation Port %d\n", Port));
- /* No Autonegiotiation */
+ Ctrl = 0;
+
+ /* Auto-negotiation ? */
+ if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyXmac: no auto-negotiation Port %d\n", Port));
/* Set DuplexMode in Config register */
- Ctrl = (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
+ if (pPrt->PLinkMode == SK_LMODE_FULL) {
+ Ctrl |= PHY_CT_DUP_MD;
+ }
/*
- * Do NOT enable Autonegotiation here. This would hold
- * the link down because no IDLES are transmitted
+ * Do NOT enable Auto-negotiation here. This would hold
+ * the link down because no IDLEs are transmitted
*/
}
else {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("InitPhyXmac: with autonegotiation Port %d\n", Port));
- /* Set Autonegotiation advertisement */
- Ctrl = 0;
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyXmac: with auto-negotiation Port %d\n", Port));
+ /* Set Auto-negotiation advertisement */
/* Set Full/half duplex capabilities */
switch (pPrt->PLinkMode) {
@@ -1139,8 +2222,8 @@
Ctrl |= PHY_X_AN_FD | PHY_X_AN_HD;
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E015, SKERR_HWI_E015MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
+ SKERR_HWI_E015MSG);
}
switch (pPrt->PFlowCtrlMode) {
@@ -1157,14 +2240,14 @@
Ctrl |= PHY_X_P_BOTH_MD;
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E016, SKERR_HWI_E016MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
+ SKERR_HWI_E016MSG);
}
/* Write AutoNeg Advertisement Register */
- PHY_WRITE(IoC, pPrt, Port, PHY_XMAC_AUNE_ADV, Ctrl);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_XMAC_AUNE_ADV, Ctrl);
- /* Restart Autonegotiation */
+ /* Restart Auto-negotiation */
Ctrl = PHY_CT_ANE | PHY_CT_RE_CFG;
}
@@ -1174,16 +2257,15 @@
}
/* Write to the Phy control register */
- PHY_WRITE(IoC, pPrt, Port, PHY_XMAC_CTRL, Ctrl);
-} /* SkXmInitPhyXmac*/
+ SkXmPhyWrite(pAC, IoC, Port, PHY_XMAC_CTRL, Ctrl);
+} /* SkXmInitPhyXmac */
/******************************************************************************
*
* SkXmInitPhyBcom() - Initialize the Broadcom Phy registers
*
- * Description:
- * Initialize all the Broadcom Phy registers
+ * Description: initializes all the Broadcom Phy registers
*
* Note:
*
@@ -1194,7 +2276,7 @@
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LOOback be set-up? */
+SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
{
SK_GEPORT *pPrt;
SK_U16 Ctrl1;
@@ -1203,7 +2285,7 @@
SK_U16 Ctrl4;
SK_U16 Ctrl5;
- Ctrl1 = PHY_B_CT_SP1000;
+ Ctrl1 = PHY_CT_SP1000;
Ctrl2 = 0;
Ctrl3 = PHY_SEL_TYPE;
Ctrl4 = PHY_B_PEC_EN_LTR;
@@ -1214,35 +2296,41 @@
/* manually Master/Slave ? */
if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
Ctrl2 |= PHY_B_1000C_MSE;
+
if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
Ctrl2 |= PHY_B_1000C_MSC;
}
}
- /* Autonegotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF ||
- pPrt->PLinkMode == SK_LMODE_FULL) {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("InitPhyBcom: no autonegotiation Port %d\n", Port));
- /* No Autonegiotiation */
+ /* Auto-negotiation ? */
+ if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyBcom: no auto-negotiation Port %d\n", Port));
/* Set DuplexMode in Config register */
Ctrl1 |= (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
- /* Determine Master/Slave manually if not already done. */
+ /* Determine Master/Slave manually if not already done */
if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
Ctrl2 |= PHY_B_1000C_MSE; /* set it to Slave */
}
/*
- * Do NOT enable Autonegotiation here. This would hold
+ * Do NOT enable Auto-negotiation here. This would hold
* the link down because no IDLES are transmitted
*/
}
else {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("InitPhyBcom: with autonegotiation Port %d\n", Port));
- /* Set Autonegotiation advertisement */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyBcom: with auto-negotiation Port %d\n", Port));
+ /* Set Auto-negotiation advertisement */
- /* Set Full/half duplex capabilities */
+ /*
+ * Workaround BCOM Errata #1 for the C5 type.
+ * 1000Base-T Link Acquisition Failure in Slave Mode
+ * Set Repeater/DTE bit 10 of the 1000Base-T Control Register
+ */
+ Ctrl2 |= PHY_B_1000C_RD;
+
+ /* Set Full/half duplex capabilities */
switch (pPrt->PLinkMode) {
case SK_LMODE_AUTOHALF:
Ctrl2 |= PHY_B_1000C_AHD;
@@ -1254,8 +2342,8 @@
Ctrl2 |= PHY_B_1000C_AFD | PHY_B_1000C_AHD;
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E015, SKERR_HWI_E015MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
+ SKERR_HWI_E015MSG);
}
switch (pPrt->PFlowCtrlMode) {
@@ -1272,13 +2360,12 @@
Ctrl3 |= PHY_B_P_BOTH_MD;
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E016, SKERR_HWI_E016MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
+ SKERR_HWI_E016MSG);
}
- /* Restart Autonegotiation */
+ /* Restart Auto-negotiation */
Ctrl1 |= PHY_CT_ANE | PHY_CT_RE_CFG;
-
}
/* Initialize LED register here? */
@@ -1286,47 +2373,417 @@
init order of LEDs and XMAC. (MAl) */
/* Write 1000Base-T Control Register */
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_1000T_CTRL, Ctrl2);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("1000Base-T Control Reg = %x\n", Ctrl2));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, Ctrl2);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
/* Write AutoNeg Advertisement Register */
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_AUNE_ADV, Ctrl3);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNeg Advertisment Reg = %x\n", Ctrl3));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, Ctrl3);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Auto-Neg.Adv.Reg=0x%04X\n", Ctrl3));
-
if (DoLoop) {
/* Set the Phy Loopback bit, too */
Ctrl1 |= PHY_CT_LOOP;
}
if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- /* configure fifo to high latency for xmission of ext. packets*/
+ /* configure FIFO to high latency for transmission of ext. packets */
Ctrl4 |= PHY_B_PEC_HIGH_LA;
/* configure reception of extended packets */
Ctrl5 |= PHY_B_AC_LONG_PACK;
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL, Ctrl5);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, Ctrl5);
}
/* Configure LED Traffic Mode and Jumbo Frame usage if specified */
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_P_EXT_CTRL, Ctrl4);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, Ctrl4);
/* Write to the Phy control register */
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_CTRL, Ctrl1);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("PHY Control Reg = %x\n", Ctrl1));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL, Ctrl1);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Control Reg=0x%04X\n", Ctrl1));
} /* SkXmInitPhyBcom */
+#endif /* GENESIS */
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmInitPhyMarv() - Initialize the Marvell Phy registers
+ *
+ * Description: initializes all the Marvell Phy registers
+ *
+ * Note:
+ *
+ * Returns:
+ * nothing
+ */
+static void SkGmInitPhyMarv(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
+{
+ SK_GEPORT *pPrt;
+ SK_U16 PhyCtrl;
+ SK_U16 C1000BaseT;
+ SK_U16 AutoNegAdv;
+ SK_U16 ExtPhyCtrl;
+ SK_U16 LedCtrl;
+ SK_BOOL AutoNeg;
+#if defined(SK_DIAG) || defined(DEBUG)
+ SK_U16 PhyStat;
+ SK_U16 PhyStat1;
+ SK_U16 PhySpecStat;
+#endif /* SK_DIAG || DEBUG */
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ /* Auto-negotiation ? */
+ if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
+ AutoNeg = SK_FALSE;
+ }
+ else {
+ AutoNeg = SK_TRUE;
+ }
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyMarv: Port %d, auto-negotiation %s\n",
+ Port, AutoNeg ? "ON" : "OFF"));
+
+#ifdef VCPU
+ VCPUprintf(0, "SkGmInitPhyMarv(), Port=%u, DoLoop=%u\n",
+ Port, DoLoop);
+#else /* VCPU */
+
+ if (DoLoop) {
+ /* Set 'MAC Power up'-bit, set Manual MDI configuration */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
+ PHY_M_PC_MAC_POW_UP);
+ }
+ else if (AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_AUTO) {
+ /* Read Ext. PHY Specific Control */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
+
+ ExtPhyCtrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
+ PHY_M_EC_MAC_S_MSK);
+
+ ExtPhyCtrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ) |
+ PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
+
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL, ExtPhyCtrl);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
+ }
+
+ /* Read PHY Control */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
+
+ PhyCtrl |= PHY_CT_RESET;
+ /* Assert software reset */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
+
+#endif /* VCPU */
+
+ PhyCtrl = 0 /* PHY_CT_COL_TST */;
+ C1000BaseT = 0;
+ AutoNegAdv = PHY_SEL_TYPE;
+
+ /* manually Master/Slave ? */
+ if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
+ /* enable Manual Master/Slave */
+ C1000BaseT |= PHY_M_1000C_MSE;
+
+ if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
+ C1000BaseT |= PHY_M_1000C_MSC; /* set it to Master */
+ }
+ }
+
+ /* Auto-negotiation ? */
+ if (!AutoNeg) {
+
+ if (pPrt->PLinkMode == SK_LMODE_FULL) {
+ /* Set Full Duplex Mode */
+ PhyCtrl |= PHY_CT_DUP_MD;
+ }
+
+ /* Set Master/Slave manually if not already done */
+ if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
+ C1000BaseT |= PHY_M_1000C_MSE; /* set it to Slave */
+ }
+
+ /* Set Speed */
+ switch (pPrt->PLinkSpeed) {
+ case SK_LSPEED_AUTO:
+ case SK_LSPEED_1000MBPS:
+ PhyCtrl |= PHY_CT_SP1000;
+ break;
+ case SK_LSPEED_100MBPS:
+ PhyCtrl |= PHY_CT_SP100;
+ break;
+ case SK_LSPEED_10MBPS:
+ break;
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
+ SKERR_HWI_E019MSG);
+ }
+
+ if (!DoLoop) {
+ PhyCtrl |= PHY_CT_RESET;
+ }
+ /*
+ * Do NOT enable Auto-negotiation here. This would hold
+ * the link down because no IDLES are transmitted
+ */
+ }
+ else {
+ PhyCtrl |= PHY_CT_ANE;
+
+ if (pAC->GIni.GICopperType) {
+ /* Set Speed capabilities */
+ switch (pPrt->PLinkSpeed) {
+ case SK_LSPEED_AUTO:
+ C1000BaseT |= PHY_M_1000C_AHD | PHY_M_1000C_AFD;
+ AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
+ PHY_M_AN_10_FD | PHY_M_AN_10_HD;
+ break;
+ case SK_LSPEED_1000MBPS:
+ C1000BaseT |= PHY_M_1000C_AHD | PHY_M_1000C_AFD;
+ break;
+ case SK_LSPEED_100MBPS:
+ AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
+ PHY_M_AN_10_FD | PHY_M_AN_10_HD;
+ break;
+ case SK_LSPEED_10MBPS:
+ AutoNegAdv |= PHY_M_AN_10_FD | PHY_M_AN_10_HD;
+ break;
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
+ SKERR_HWI_E019MSG);
+ }
+
+ /* Set Full/half duplex capabilities */
+ switch (pPrt->PLinkMode) {
+ case SK_LMODE_AUTOHALF:
+ C1000BaseT &= ~PHY_M_1000C_AFD;
+ AutoNegAdv &= ~(PHY_M_AN_100_FD | PHY_M_AN_10_FD);
+ break;
+ case SK_LMODE_AUTOFULL:
+ C1000BaseT &= ~PHY_M_1000C_AHD;
+ AutoNegAdv &= ~(PHY_M_AN_100_HD | PHY_M_AN_10_HD);
+ break;
+ case SK_LMODE_AUTOBOTH:
+ break;
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
+ SKERR_HWI_E015MSG);
+ }
+
+ /* Set Auto-negotiation advertisement */
+ switch (pPrt->PFlowCtrlMode) {
+ case SK_FLOW_MODE_NONE:
+ AutoNegAdv |= PHY_B_P_NO_PAUSE;
+ break;
+ case SK_FLOW_MODE_LOC_SEND:
+ AutoNegAdv |= PHY_B_P_ASYM_MD;
+ break;
+ case SK_FLOW_MODE_SYMMETRIC:
+ AutoNegAdv |= PHY_B_P_SYM_MD;
+ break;
+ case SK_FLOW_MODE_SYM_OR_REM:
+ AutoNegAdv |= PHY_B_P_BOTH_MD;
+ break;
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
+ SKERR_HWI_E016MSG);
+ }
+ }
+ else { /* special defines for FIBER (88E1011S only) */
+
+ /* Set Full/half duplex capabilities */
+ switch (pPrt->PLinkMode) {
+ case SK_LMODE_AUTOHALF:
+ AutoNegAdv |= PHY_M_AN_1000X_AHD;
+ break;
+ case SK_LMODE_AUTOFULL:
+ AutoNegAdv |= PHY_M_AN_1000X_AFD;
+ break;
+ case SK_LMODE_AUTOBOTH:
+ AutoNegAdv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD;
+ break;
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
+ SKERR_HWI_E015MSG);
+ }
+
+ /* Set Auto-negotiation advertisement */
+ switch (pPrt->PFlowCtrlMode) {
+ case SK_FLOW_MODE_NONE:
+ AutoNegAdv |= PHY_M_P_NO_PAUSE_X;
+ break;
+ case SK_FLOW_MODE_LOC_SEND:
+ AutoNegAdv |= PHY_M_P_ASYM_MD_X;
+ break;
+ case SK_FLOW_MODE_SYMMETRIC:
+ AutoNegAdv |= PHY_M_P_SYM_MD_X;
+ break;
+ case SK_FLOW_MODE_SYM_OR_REM:
+ AutoNegAdv |= PHY_M_P_BOTH_MD_X;
+ break;
+ default:
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
+ SKERR_HWI_E016MSG);
+ }
+ }
+
+ if (!DoLoop) {
+ /* Restart Auto-negotiation */
+ PhyCtrl |= PHY_CT_RE_CFG;
+ }
+ }
+
+#ifdef VCPU
+ /*
+ * E-mail from Gu Lin (08-03-2002):
+ */
+
+ /* Program PHY register 30 as 16'h0708 for simulation speed up */
+ SkGmPhyWrite(pAC, IoC, Port, 30, 0x0700 /* 0x0708 */);
+
+ VCpuWait(2000);
+
+#else /* VCPU */
+
+ /* Write 1000Base-T Control Register */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("1000B-T Ctrl=0x%04X\n", C1000BaseT));
+
+ /* Write AutoNeg Advertisement Register */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV, AutoNegAdv);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Auto-Neg.Ad.=0x%04X\n", AutoNegAdv));
+#endif /* VCPU */
+
+ if (DoLoop) {
+ /* Set the PHY Loopback bit */
+ PhyCtrl |= PHY_CT_LOOP;
+
+#ifdef XXX
+ /* Program PHY register 16 as 16'h0400 to force link good */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PHY_M_PC_FL_GOOD);
+#endif /* XXX */
+
+#ifndef VCPU
+ if (pPrt->PLinkSpeed != SK_LSPEED_AUTO) {
+ /* Write Ext. PHY Specific Control */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL,
+ (SK_U16)((pPrt->PLinkSpeed + 2) << 4));
+ }
+#endif /* VCPU */
+ }
+#ifdef TEST_ONLY
+ else if (pPrt->PLinkSpeed == SK_LSPEED_10MBPS) {
+ /* Write PHY Specific Control */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
+ PHY_M_PC_EN_DET_MSK);
+ }
+#endif
+
+ /* Write to the PHY Control register */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
+
+#ifdef VCPU
+ VCpuWait(2000);
+#else
+
+ LedCtrl = PHY_M_LED_PULS_DUR(PULS_170MS) | PHY_M_LED_BLINK_RT(BLINK_84MS);
+
+ if ((pAC->GIni.GILedBlinkCtrl & SK_ACT_LED_BLINK) != 0) {
+ LedCtrl |= PHY_M_LEDC_RX_CTRL | PHY_M_LEDC_TX_CTRL;
+ }
+
+ if ((pAC->GIni.GILedBlinkCtrl & SK_DUP_LED_NORMAL) != 0) {
+ LedCtrl |= PHY_M_LEDC_DP_CTRL;
+ }
+
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_CTRL, LedCtrl);
+
+ if ((pAC->GIni.GILedBlinkCtrl & SK_LED_LINK100_ON) != 0) {
+ /* only in forced 100Mbps mode */
+ if (!AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_100MBPS) {
+
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_OVER,
+ PHY_M_LED_MO_100(MO_LED_ON));
+ }
+ }
+
+#ifdef SK_DIAG
+ c_print("Set PHY Ctrl=0x%04X\n", PhyCtrl);
+ c_print("Set 1000 B-T=0x%04X\n", C1000BaseT);
+ c_print("Set Auto-Neg=0x%04X\n", AutoNegAdv);
+ c_print("Set Ext Ctrl=0x%04X\n", ExtPhyCtrl);
+#endif /* SK_DIAG */
+
+#if defined(SK_DIAG) || defined(DEBUG)
+ /* Read PHY Control */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Ctrl Reg.=0x%04X\n", PhyCtrl));
+
+ /* Read 1000Base-T Control Register */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_CTRL, &C1000BaseT);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("1000B-T Ctrl =0x%04X\n", C1000BaseT));
+
+ /* Read AutoNeg Advertisement Register */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &AutoNegAdv);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Auto-Neg. Ad.=0x%04X\n", AutoNegAdv));
+
+ /* Read Ext. PHY Specific Control */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
+
+ /* Read PHY Status */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Stat Reg.=0x%04X\n", PhyStat));
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat1);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Stat Reg.=0x%04X\n", PhyStat1));
+
+ /* Read PHY Specific Status */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Spec Stat=0x%04X\n", PhySpecStat));
+#endif /* SK_DIAG || DEBUG */
+
+#ifdef SK_DIAG
+ c_print("PHY Ctrl Reg=0x%04X\n", PhyCtrl);
+ c_print("PHY 1000 Reg=0x%04X\n", C1000BaseT);
+ c_print("PHY AnAd Reg=0x%04X\n", AutoNegAdv);
+ c_print("Ext Ctrl Reg=0x%04X\n", ExtPhyCtrl);
+ c_print("PHY Stat Reg=0x%04X\n", PhyStat);
+ c_print("PHY Stat Reg=0x%04X\n", PhyStat1);
+ c_print("PHY Spec Reg=0x%04X\n", PhySpecStat);
+#endif /* SK_DIAG */
+
+#endif /* VCPU */
+
+} /* SkGmInitPhyMarv */
+#endif /* YUKON */
+
+
+#ifdef OTHER_PHY
/******************************************************************************
*
* SkXmInitPhyLone() - Initialize the Level One Phy registers
*
- * Description:
- * Initialize all the Level One Phy registers
+ * Description: initializes all the Level One Phy registers
*
* Note:
*
@@ -1337,14 +2794,14 @@
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LOOback be set-up? */
+SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
{
SK_GEPORT *pPrt;
SK_U16 Ctrl1;
SK_U16 Ctrl2;
SK_U16 Ctrl3;
- Ctrl1 = PHY_L_CT_SP1000;
+ Ctrl1 = PHY_CT_SP1000;
Ctrl2 = 0;
Ctrl3 = PHY_SEL_TYPE;
@@ -1353,39 +2810,36 @@
/* manually Master/Slave ? */
if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
Ctrl2 |= PHY_L_1000C_MSE;
+
if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
Ctrl2 |= PHY_L_1000C_MSC;
}
}
- /* Autonegotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF ||
- pPrt->PLinkMode == SK_LMODE_FULL) {
+ /* Auto-negotiation ? */
+ if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
/*
* level one spec say: "1000Mbps: manual mode not allowed"
* but lets see what happens...
*/
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- 0, "Level One PHY only works with Autoneg");
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("InitPhyLone: no autonegotiation Port %d\n", Port));
- /* No Autonegiotiation */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyLone: no auto-negotiation Port %d\n", Port));
/* Set DuplexMode in Config register */
Ctrl1 = (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
- /* Determine Master/Slave manually if not already done. */
+ /* Determine Master/Slave manually if not already done */
if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
Ctrl2 |= PHY_L_1000C_MSE; /* set it to Slave */
}
/*
- * Do NOT enable Autonegotiation here. This would hold
+ * Do NOT enable Auto-negotiation here. This would hold
* the link down because no IDLES are transmitted
*/
}
else {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("InitPhyLone: with autonegotiation Port %d\n", Port));
- /* Set Autonegotiation advertisement */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("InitPhyLone: with auto-negotiation Port %d\n", Port));
+ /* Set Auto-negotiation advertisement */
/* Set Full/half duplex capabilities */
switch (pPrt->PLinkMode) {
@@ -1399,8 +2853,8 @@
Ctrl2 |= PHY_L_1000C_AFD | PHY_L_1000C_AHD;
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E015, SKERR_HWI_E015MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
+ SKERR_HWI_E015MSG);
}
switch (pPrt->PFlowCtrlMode) {
@@ -1417,55 +2871,42 @@
Ctrl3 |= PHY_L_P_BOTH_MD;
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E016, SKERR_HWI_E016MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
+ SKERR_HWI_E016MSG);
}
- /* Restart Autonegotiation */
+ /* Restart Auto-negotiation */
Ctrl1 = PHY_CT_ANE | PHY_CT_RE_CFG;
}
- /* Initialize LED register here ? */
- /* No. Please do it in SkDgXmitLed() (if required) and swap
- init order of LEDs and XMAC. (MAl) */
-
/* Write 1000Base-T Control Register */
- PHY_WRITE(IoC, pPrt, Port, PHY_LONE_1000T_CTRL, Ctrl2);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("1000Base-T Control Reg = %x\n", Ctrl2));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_1000T_CTRL, Ctrl2);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
/* Write AutoNeg Advertisement Register */
- PHY_WRITE(IoC, pPrt, Port, PHY_LONE_AUNE_ADV, Ctrl3);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNeg Advertisment Reg = %x\n", Ctrl3));
-
+ SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_AUNE_ADV, Ctrl3);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Auto-Neg.Adv.Reg=0x%04X\n", Ctrl3));
if (DoLoop) {
/* Set the Phy Loopback bit, too */
Ctrl1 |= PHY_CT_LOOP;
}
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- /*
- * nothing to do for Level one.
- * PHY supports frames up to 10k.
- */
- }
-
/* Write to the Phy control register */
- PHY_WRITE(IoC, pPrt, Port, PHY_LONE_CTRL, Ctrl1);
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("PHY Control Reg = %x\n", Ctrl1));
-} /* SkXmInitPhyLone*/
+ SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_CTRL, Ctrl1);
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Control Reg=0x%04X\n", Ctrl1));
+} /* SkXmInitPhyLone */
/******************************************************************************
*
* SkXmInitPhyNat() - Initialize the National Phy registers
*
- * Description:
- * Initialize all the National Phy registers
+ * Description: initializes all the National Phy registers
*
* Note:
*
@@ -1476,174 +2917,80 @@
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LOOback be set-up? */
+SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
{
/* todo: National */
-} /* SkXmInitPhyNat*/
+} /* SkXmInitPhyNat */
+#endif /* OTHER_PHY */
/******************************************************************************
*
- * SkXmAutoNegLipaXmac() - Decides whether Link Partner could do autoneg
+ * SkMacInitPhy() - Initialize the PHY registers
*
- * This function analyses the Interrupt status word. If any of the
- * Autonegotiating interrupt bits are set, the PLipaAutoNeg variable
- * is set true.
- */
-void SkXmAutoNegLipaXmac(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U16 IStatus) /* Interrupt Status word to analyse */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
- (IStatus & (XM_IS_LIPA_RC|XM_IS_RX_PAGE|XM_IS_AND))) {
-
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNegLipa: AutoNeg detected on port %d %x\n", Port, IStatus));
- pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
- }
-} /* SkXmAutoNegLipaXmac*/
-
-
-/******************************************************************************
+ * Description: calls the Init PHY routines dep. on board type
*
- * SkXmAutoNegLipaBcom() - Decides whether Link Partner could do autoneg
+ * Note:
*
- * This function analyses the PHY status word. If any of the
- * Autonegotiating bits are set, The PLipaAutoNeg variable
- * is set true.
+ * Returns:
+ * nothing
*/
-void SkXmAutoNegLipaBcom(
+void SkMacInitPhy(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port, /* Port Index (MAC_1 + n) */
-SK_U16 PhyStat) /* PHY Status word to analyse */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO && (PhyStat & PHY_ST_AN_OVER)) {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNegLipa: AutoNeg detected on port %d %x\n", Port, PhyStat));
- pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
- }
-} /* SkXmAutoNegLipaBcom*/
-
-
-/******************************************************************************
- *
- * SkXmAutoNegLipaLone() - Decides whether Link Partner could do autoneg
- *
- * This function analyses the PHY status word. If any of the
- * Autonegotiating bits are set, The PLipaAutoNeg variable
- * is set true.
- */
-void SkXmAutoNegLipaLone(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U16 PhyStat) /* PHY Status word to analyse */
+SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
{
SK_GEPORT *pPrt;
pPrt = &pAC->GIni.GP[Port];
- if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
- (PhyStat & (PHY_ST_AN_OVER))) {
-
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNegLipa: AutoNeg detected on port %d %x\n", Port, PhyStat));
- pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ switch (pPrt->PhyType) {
+ case SK_PHY_XMAC:
+ SkXmInitPhyXmac(pAC, IoC, Port, DoLoop);
+ break;
+ case SK_PHY_BCOM:
+ SkXmInitPhyBcom(pAC, IoC, Port, DoLoop);
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ SkXmInitPhyLone(pAC, IoC, Port, DoLoop);
+ break;
+ case SK_PHY_NAT:
+ SkXmInitPhyNat(pAC, IoC, Port, DoLoop);
+ break;
+#endif /* OTHER_PHY */
+ }
}
-} /* SkXmAutoNegLipaLone*/
-
-
-/******************************************************************************
- *
- * SkXmAutoNegLipaNat() - Decides whether Link Partner could do autoneg
- *
- * This function analyses the PHY status word. If any of the
- * Autonegotiating bits are set, The PLipaAutoNeg variable
- * is set true.
- */
-void SkXmAutoNegLipaNat(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U16 PhyStat) /* PHY Status word to analyse */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
- (PhyStat & (PHY_ST_AN_OVER))) {
-
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNegLipa: AutoNeg detected on port %d %x\n", Port, PhyStat));
- pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ SkGmInitPhyMarv(pAC, IoC, Port, DoLoop);
}
-} /* SkXmAutoNegLipaNat*/
-
+#endif /* YUKON */
-/******************************************************************************
- *
- * SkXmAutoNegDone() - Auto negotiation handling
- *
- * Description:
- * This function handles the autonegotiation if the Done bit is set.
- *
- * Note:
- * o The XMACs interrupt source register is NOT read here.
- * o This function is public because it is used in the diagnostics
- * tool, too.
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-int SkXmAutoNegDone(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- switch (pAC->GIni.GP[Port].PhyType) {
- case SK_PHY_XMAC:
- return (SkXmAutoNegDoneXmac(pAC, IoC, Port));
- case SK_PHY_BCOM:
- return (SkXmAutoNegDoneBcom(pAC, IoC, Port));
- case SK_PHY_LONE:
- return (SkXmAutoNegDoneLone(pAC, IoC, Port));
- case SK_PHY_NAT:
- return (SkXmAutoNegDoneNat(pAC, IoC, Port));
- }
- return (SK_AND_OTHER);
-} /* SkXmAutoNegDone*/
+} /* SkMacInitPhy */
+#ifdef GENESIS
/******************************************************************************
*
- * SkXmAutoNegDoneXmac() - Auto negotiation handling
+ * SkXmAutoNegDoneXmac() - Auto-negotiation handling
*
* Description:
- * This function handles the autonegotiation if the Done bit is set.
- *
- * Note:
- * o The XMACs interrupt source register is NOT read here.
+ * This function handles the auto-negotiation if the Done bit is set.
*
* Returns:
* SK_AND_OK o.k.
* SK_AND_DUP_CAP Duplex capability error happened
* SK_AND_OTHER Other error happened
*/
-static int SkXmAutoNegDoneXmac(
+static int SkXmAutoNegDoneXmac(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
@@ -1652,22 +2999,22 @@
SK_U16 ResAb; /* Resolved Ability */
SK_U16 LPAb; /* Link Partner Ability */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL, ("AutoNegDoneXmac"
- "Port %d\n",Port));
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegDoneXmac, Port %d\n", Port));
pPrt = &pAC->GIni.GP[Port];
/* Get PHY parameters */
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_AUNE_LP, &LPAb);
- PHY_READ(IoC, pPrt, Port, PHY_XMAC_RES_ABI, &ResAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_LP, &LPAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_RES_ABI, &ResAb);
- if (LPAb & PHY_X_AN_RFB) {
+ if ((LPAb & PHY_X_AN_RFB) != 0) {
/* At least one of the remote fault bit is set */
/* Error */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNegFail: Remote fault bit set Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
- return (SK_AND_OTHER);
+ return(SK_AND_OTHER);
}
/* Check Duplex mismatch */
@@ -1679,10 +3026,10 @@
}
else {
/* Error */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNegFail: Duplex mode mismatch port %d\n", Port));
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
- return (SK_AND_DUP_CAP);
+ return(SK_AND_DUP_CAP);
}
/* Check PAUSE mismatch */
@@ -1690,7 +3037,7 @@
/* We are using IEEE 802.3z/D5.0 Table 37-4 */
if ((pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYMMETRIC ||
pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) &&
- (LPAb & PHY_X_P_SYM_MD)) {
+ (LPAb & PHY_X_P_SYM_MD) != 0) {
/* Symmetric PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
}
@@ -1708,31 +3055,25 @@
/* PAUSE mismatch -> no PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
}
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
- /* We checked everything and may now enable the link */
- pPrt->PAutoNegFail = SK_FALSE;
-
- SkXmRxTxEnable(pAC, IoC, Port);
- return (SK_AND_OK);
-} /* SkXmAutoNegDoneXmac*/
+ return(SK_AND_OK);
+} /* SkXmAutoNegDoneXmac */
/******************************************************************************
*
- * SkXmAutoNegDoneBcom() - Auto negotiation handling
+ * SkXmAutoNegDoneBcom() - Auto-negotiation handling
*
* Description:
- * This function handles the autonegotiation if the Done bit is set.
- *
- * Note:
- * o The XMACs interrupt source register is NOT read here.
+ * This function handles the auto-negotiation if the Done bit is set.
*
* Returns:
* SK_AND_OK o.k.
* SK_AND_DUP_CAP Duplex capability error happened
* SK_AND_OTHER Other error happened
*/
-static int SkXmAutoNegDoneBcom(
+static int SkXmAutoNegDoneBcom(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
@@ -1741,110 +3082,207 @@
SK_U16 LPAb; /* Link Partner Ability */
SK_U16 AuxStat; /* Auxiliary Status */
-#if 0
+#ifdef TEST_ONLY
01-Sep-2000 RA;:;:
SK_U16 ResAb; /* Resolved Ability */
#endif /* 0 */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNegDoneBcom, Port %d\n", Port));
pPrt = &pAC->GIni.GP[Port];
- /* Get PHY parameters. */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUNE_LP, &LPAb);
-#if 0
+ /* Get PHY parameters */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &LPAb);
+#ifdef TEST_ONLY
01-Sep-2000 RA;:;:
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_1000T_STAT, &ResAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
#endif /* 0 */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUX_STAT, &AuxStat);
+
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &AuxStat);
- if (LPAb & PHY_B_AN_RF) {
- /* Remote fault bit is set: Error. */
+ if ((LPAb & PHY_B_AN_RF) != 0) {
+ /* Remote fault bit is set: Error */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNegFail: Remote fault bit set Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
- return (SK_AND_OTHER);
+ return(SK_AND_OTHER);
}
- /* Check Duplex mismatch. */
- if ((AuxStat & PHY_B_AS_AN_RES) == PHY_B_RES_1000FD) {
+ /* Check Duplex mismatch */
+ if ((AuxStat & PHY_B_AS_AN_RES_MSK) == PHY_B_RES_1000FD) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
}
- else if ((AuxStat & PHY_B_AS_AN_RES) == PHY_B_RES_1000HD) {
+ else if ((AuxStat & PHY_B_AS_AN_RES_MSK) == PHY_B_RES_1000HD) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
}
else {
- /* Error. */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("AutoNegFail: Duplex mode mismatch port %d\n", Port));
+ /* Error */
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
- return (SK_AND_DUP_CAP);
+ return(SK_AND_DUP_CAP);
}
-#if 0
+#ifdef TEST_ONLY
01-Sep-2000 RA;:;:
- /* Check Master/Slave resolution. */
- if (ResAb & PHY_B_1000S_MSF) {
- /* Error. */
+ /* Check Master/Slave resolution */
+ if ((ResAb & PHY_B_1000S_MSF) != 0) {
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Master/Slave Fault port %d\n", Port));
+ ("Master/Slave Fault Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
pPrt->PMSStatus = SK_MS_STAT_FAULT;
- return (SK_AND_OTHER);
+ return(SK_AND_OTHER);
}
- else if (ResAb & PHY_B_1000S_MSR) {
- pPrt->PMSStatus = SK_MS_STAT_MASTER;
+
+ pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
+ SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
+#endif /* 0 */
+
+ /* Check PAUSE mismatch ??? */
+ /* We are using IEEE 802.3z/D5.0 Table 37-4 */
+ if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PAUSE_MSK) {
+ /* Symmetric PAUSE */
+ pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
+ }
+ else if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PRR) {
+ /* Enable PAUSE receive, disable PAUSE transmit */
+ pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
+ }
+ else if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PRT) {
+ /* Disable PAUSE receive, enable PAUSE transmit */
+ pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
}
else {
- pPrt->PMSStatus = SK_MS_STAT_SLAVE;
+ /* PAUSE mismatch -> no PAUSE */
+ pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
}
-#endif /* 0 */
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
+
+ return(SK_AND_OK);
+} /* SkXmAutoNegDoneBcom */
+#endif /* GENESIS */
+
+
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmAutoNegDoneMarv() - Auto-negotiation handling
+ *
+ * Description:
+ * This function handles the auto-negotiation if the Done bit is set.
+ *
+ * Returns:
+ * SK_AND_OK o.k.
+ * SK_AND_DUP_CAP Duplex capability error happened
+ * SK_AND_OTHER Other error happened
+ */
+static int SkGmAutoNegDoneMarv(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+ SK_U16 LPAb; /* Link Partner Ability */
+ SK_U16 ResAb; /* Resolved Ability */
+ SK_U16 AuxStat; /* Auxiliary Status */
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegDoneMarv, Port %d\n", Port));
+ pPrt = &pAC->GIni.GP[Port];
- /* Check PAUSE mismatch. */
- /* We are NOT using chapter 4.23 of the Xaqti manual. */
- /* We are using IEEE 802.3z/D5.0 Table 37-4. */
- if ((AuxStat & (PHY_B_AS_PRR | PHY_B_AS_PRT)) ==
- (PHY_B_AS_PRR | PHY_B_AS_PRT)) {
- /* Symmetric PAUSE. */
+ /* Get PHY parameters */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_LP, &LPAb);
+
+ if ((LPAb & PHY_M_AN_RF) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegFail: Remote fault bit set Port %d\n", Port));
+ pPrt->PAutoNegFail = SK_TRUE;
+ return(SK_AND_OTHER);
+ }
+
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
+
+ /* Check Master/Slave resolution */
+ if ((ResAb & PHY_B_1000S_MSF) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Master/Slave Fault Port %d\n", Port));
+ pPrt->PAutoNegFail = SK_TRUE;
+ pPrt->PMSStatus = SK_MS_STAT_FAULT;
+ return(SK_AND_OTHER);
+ }
+
+ pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
+ (SK_U8)SK_MS_STAT_MASTER : (SK_U8)SK_MS_STAT_SLAVE;
+
+ /* Read PHY Specific Status */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &AuxStat);
+
+ /* Check Speed & Duplex resolved */
+ if ((AuxStat & PHY_M_PS_SPDUP_RES) == 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegFail: Speed & Duplex not resolved, Port %d\n", Port));
+ pPrt->PAutoNegFail = SK_TRUE;
+ pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
+ return(SK_AND_DUP_CAP);
+ }
+
+ if ((AuxStat & PHY_M_PS_FULL_DUP) != 0) {
+ pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
+ }
+ else {
+ pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
+ }
+
+ /* Check PAUSE mismatch ??? */
+ /* We are using IEEE 802.3z/D5.0 Table 37-4 */
+ if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_PAUSE_MSK) {
+ /* Symmetric PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
}
- else if ((AuxStat & (PHY_B_AS_PRR | PHY_B_AS_PRT)) == PHY_B_AS_PRR) {
- /* Enable PAUSE receive, disable PAUSE transmit. */
+ else if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_RX_P_EN) {
+ /* Enable PAUSE receive, disable PAUSE transmit */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
}
- else if ((AuxStat & (PHY_B_AS_PRR | PHY_B_AS_PRT)) == PHY_B_AS_PRT) {
- /* Disable PAUSE receive, enable PAUSE transmit. */
+ else if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_TX_P_EN) {
+ /* Disable PAUSE receive, enable PAUSE transmit */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
}
else {
- /* PAUSE mismatch -> no PAUSE. */
+ /* PAUSE mismatch -> no PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
}
+
+ /* set used link speed */
+ switch ((unsigned)(AuxStat & PHY_M_PS_SPEED_MSK)) {
+ case (unsigned)PHY_M_PS_SPEED_1000:
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
+ break;
+ case PHY_M_PS_SPEED_100:
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_100MBPS;
+ break;
+ default:
+ pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_10MBPS;
+ }
- /* We checked everything and may now enable the link. */
- pPrt->PAutoNegFail = SK_FALSE;
-
- SkXmRxTxEnable(pAC, IoC, Port);
- return (SK_AND_OK);
-} /* SkXmAutoNegDoneBcom*/
+ return(SK_AND_OK);
+} /* SkGmAutoNegDoneMarv */
+#endif /* YUKON */
+#ifdef OTHER_PHY
/******************************************************************************
*
- * SkXmAutoNegDoneLone() - Auto negotiation handling
+ * SkXmAutoNegDoneLone() - Auto-negotiation handling
*
* Description:
- * This function handles the autonegotiation if the Done bit is set.
- *
- * Note:
- * o The XMACs interrupt source register is NOT read here.
+ * This function handles the auto-negotiation if the Done bit is set.
*
* Returns:
* SK_AND_OK o.k.
* SK_AND_DUP_CAP Duplex capability error happened
* SK_AND_OTHER Other error happened
*/
-static int SkXmAutoNegDoneLone(
+static int SkXmAutoNegDoneLone(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
@@ -1854,26 +3292,26 @@
SK_U16 LPAb; /* Link Partner Ability */
SK_U16 QuickStat; /* Auxiliary Status */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL, ("AutoNegDoneLone"
- "Port %d\n",Port));
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegDoneLone, Port %d\n", Port));
pPrt = &pAC->GIni.GP[Port];
/* Get PHY parameters */
- PHY_READ(IoC, pPrt, Port, PHY_LONE_AUNE_LP, &LPAb);
- PHY_READ(IoC, pPrt, Port, PHY_LONE_1000T_STAT, &ResAb);
- PHY_READ(IoC, pPrt, Port, PHY_LONE_Q_STAT, &QuickStat);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_AUNE_LP, &LPAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_1000T_STAT, &ResAb);
+ SkXmPhyRead(pAC, IoC, Port, PHY_LONE_Q_STAT, &QuickStat);
- if (LPAb & PHY_L_AN_RF) {
+ if ((LPAb & PHY_L_AN_RF) != 0) {
/* Remote fault bit is set */
/* Error */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNegFail: Remote fault bit set Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
- return (SK_AND_OTHER);
+ return(SK_AND_OTHER);
}
/* Check Duplex mismatch */
- if (QuickStat & PHY_L_QS_DUP_MOD) {
+ if ((QuickStat & PHY_L_QS_DUP_MOD) != 0) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
}
else {
@@ -1881,13 +3319,13 @@
}
/* Check Master/Slave resolution */
- if (ResAb & (PHY_L_1000S_MSF)) {
+ if ((ResAb & PHY_L_1000S_MSF) != 0) {
/* Error */
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_CTRL,
- ("Master/Slave Fault port %d\n", Port));
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("Master/Slave Fault Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
pPrt->PMSStatus = SK_MS_STAT_FAULT;
- return (SK_AND_OTHER);
+ return(SK_AND_OTHER);
}
else if (ResAb & PHY_L_1000S_MSR) {
pPrt->PMSStatus = SK_MS_STAT_MASTER;
@@ -1897,7 +3335,6 @@
}
/* Check PAUSE mismatch */
- /* We are NOT using chapter 4.23 of the Xaqti manual */
/* We are using IEEE 802.3z/D5.0 Table 37-4 */
/* we must manually resolve the abilities here */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
@@ -1913,7 +3350,7 @@
}
break;
case SK_FLOW_MODE_SYMMETRIC:
- if ((QuickStat & PHY_L_QS_PAUSE) == PHY_L_QS_PAUSE) {
+ if ((QuickStat & PHY_L_QS_PAUSE) != 0) {
/* Symmetric PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
}
@@ -1924,154 +3361,656 @@
/* Enable PAUSE receive, disable PAUSE transmit */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
}
- else if ((QuickStat & PHY_L_QS_PAUSE) == PHY_L_QS_PAUSE) {
+ else if ((QuickStat & PHY_L_QS_PAUSE) != 0) {
/* Symmetric PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
}
break;
default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT,
- SKERR_HWI_E016, SKERR_HWI_E016MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
+ SKERR_HWI_E016MSG);
}
-
- /* We checked everything and may now enable the link */
- pPrt->PAutoNegFail = SK_FALSE;
-
- SkXmRxTxEnable(pAC, IoC, Port);
- return (SK_AND_OK);
+
+ return(SK_AND_OK);
} /* SkXmAutoNegDoneLone */
/******************************************************************************
*
- * SkXmAutoNegDoneNat() - Auto negotiation handling
+ * SkXmAutoNegDoneNat() - Auto-negotiation handling
*
* Description:
- * This function handles the autonegotiation if the Done bit is set.
- *
- * Note:
- * o The XMACs interrupt source register is NOT read here.
- * o This function is public because it is used in the diagnostics
- * tool, too.
+ * This function handles the auto-negotiation if the Done bit is set.
*
* Returns:
* SK_AND_OK o.k.
* SK_AND_DUP_CAP Duplex capability error happened
* SK_AND_OTHER Other error happened
*/
-static int SkXmAutoNegDoneNat(
+static int SkXmAutoNegDoneNat(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
/* todo: National */
- return (SK_AND_OK);
-} /* SkXmAutoNegDoneNat*/
+ return(SK_AND_OK);
+} /* SkXmAutoNegDoneNat */
+#endif /* OTHER_PHY */
+
+
+/******************************************************************************
+ *
+ * SkMacAutoNegDone() - Auto-negotiation handling
+ *
+ * Description: calls the auto-negotiation done routines dep. on board type
+ *
+ * Returns:
+ * SK_AND_OK o.k.
+ * SK_AND_DUP_CAP Duplex capability error happened
+ * SK_AND_OTHER Other error happened
+ */
+int SkMacAutoNegDone(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+ int Rtv;
+
+ Rtv = SK_AND_OK;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ switch (pPrt->PhyType) {
+
+ case SK_PHY_XMAC:
+ Rtv = SkXmAutoNegDoneXmac(pAC, IoC, Port);
+ break;
+ case SK_PHY_BCOM:
+ Rtv = SkXmAutoNegDoneBcom(pAC, IoC, Port);
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ Rtv = SkXmAutoNegDoneLone(pAC, IoC, Port);
+ break;
+ case SK_PHY_NAT:
+ Rtv = SkXmAutoNegDoneNat(pAC, IoC, Port);
+ break;
+#endif /* OTHER_PHY */
+ default:
+ return(SK_AND_OTHER);
+ }
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ Rtv = SkGmAutoNegDoneMarv(pAC, IoC, Port);
+ }
+#endif /* YUKON */
+
+ if (Rtv != SK_AND_OK) {
+ return(Rtv);
+ }
+
+ /* We checked everything and may now enable the link */
+ pPrt->PAutoNegFail = SK_FALSE;
+
+ SkMacRxTxEnable(pAC, IoC, Port);
+
+ return(SK_AND_OK);
+} /* SkMacAutoNegDone */
+#ifdef GENESIS
/******************************************************************************
*
- * SkXmRxTxEnable() - Enable RxTx activity if port is up
+ * SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC
*
* Description:
+ * sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg.
+ * enables Rx/Tx
*
- * Note:
- * o The XMACs interrupt source register is NOT read here.
+ * Returns: N/A
+ */
+static void SkXmSetRxTxEn(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
+{
+ SK_U16 Word;
+
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
+
+ switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
+ case SK_MAC_LOOPB_ON:
+ Word |= XM_MMU_MAC_LB;
+ break;
+ case SK_MAC_LOOPB_OFF:
+ Word &= ~XM_MMU_MAC_LB;
+ break;
+ }
+
+ switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) {
+ case SK_PHY_LOOPB_ON:
+ Word |= XM_MMU_GMII_LOOP;
+ break;
+ case SK_PHY_LOOPB_OFF:
+ Word &= ~XM_MMU_GMII_LOOP;
+ break;
+ }
+
+ switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
+ case SK_PHY_FULLD_ON:
+ Word |= XM_MMU_GMII_FD;
+ break;
+ case SK_PHY_FULLD_OFF:
+ Word &= ~XM_MMU_GMII_FD;
+ break;
+ }
+
+ XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
+
+ /* dummy read to ensure writing */
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
+
+} /* SkXmSetRxTxEn */
+#endif /* GENESIS */
+
+
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC
+ *
+ * Description:
+ * sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg.
+ * enables Rx/Tx
+ *
+ * Returns: N/A
+ */
+static void SkGmSetRxTxEn(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */
+{
+ SK_U16 Ctrl;
+
+ GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
+
+ switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
+ case SK_MAC_LOOPB_ON:
+ Ctrl |= GM_GPCR_LOOP_ENA;
+ break;
+ case SK_MAC_LOOPB_OFF:
+ Ctrl &= ~GM_GPCR_LOOP_ENA;
+ break;
+ }
+
+ switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
+ case SK_PHY_FULLD_ON:
+ Ctrl |= GM_GPCR_DUP_FULL;
+ break;
+ case SK_PHY_FULLD_OFF:
+ Ctrl &= ~GM_GPCR_DUP_FULL;
+ break;
+ }
+
+ GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA |
+ GM_GPCR_TX_ENA));
+
+ /* dummy read to ensure writing */
+ GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
+
+} /* SkGmSetRxTxEn */
+#endif /* YUKON */
+
+
+#ifndef SK_SLIM
+/******************************************************************************
+ *
+ * SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters
+ *
+ * Description: calls the Special Set Rx/Tx Enable routines dep. on board type
+ *
+ * Returns: N/A
+ */
+void SkMacSetRxTxEn(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+int Para)
+{
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ SkXmSetRxTxEn(pAC, IoC, Port, Para);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ SkGmSetRxTxEn(pAC, IoC, Port, Para);
+ }
+#endif /* YUKON */
+
+} /* SkMacSetRxTxEn */
+#endif /* !SK_SLIM */
+
+
+/******************************************************************************
+ *
+ * SkMacRxTxEnable() - Enable Rx/Tx activity if port is up
+ *
+ * Description: enables Rx/Tx dep. on board type
*
* Returns:
* 0 o.k.
* != 0 Error happened
*/
-int SkXmRxTxEnable(
+int SkMacRxTxEnable(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
SK_GEPORT *pPrt;
- SK_U16 Reg; /* 16bit register value */
- SK_U16 IntMask; /* XMac interrupt mask */
+ SK_U16 Reg; /* 16-bit register value */
+ SK_U16 IntMask; /* MAC interrupt mask */
+#ifdef GENESIS
SK_U16 SWord;
+#endif
pPrt = &pAC->GIni.GP[Port];
if (!pPrt->PHWLinkUp) {
/* The Hardware link is NOT up */
- return (0);
+ return(0);
}
if ((pPrt->PLinkMode == SK_LMODE_AUTOHALF ||
pPrt->PLinkMode == SK_LMODE_AUTOFULL ||
pPrt->PLinkMode == SK_LMODE_AUTOBOTH) &&
pPrt->PAutoNegFail) {
- /* Autonegotiation is not done or failed */
- return (0);
+ /* Auto-negotiation is not done or failed */
+ return(0);
}
- /* Set Dup Mode and Pause Mode */
- SkXmInitDupMd (pAC, IoC, Port);
- SkXmInitPauseMd (pAC, IoC, Port);
-
- /*
- * Initialize the Interrupt Mask Register. Default IRQs are...
- * - Link Asynchronous Event
- * - Link Partner requests config
- * - Auto Negotiation Done
- * - Rx Counter Event Overflow
- * - Tx Counter Event Overflow
- * - Transmit FIFO Underrun
- */
- if (pPrt->PhyType == SK_PHY_XMAC) {
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* set Duplex Mode and Pause Mode */
+ SkXmInitDupMd(pAC, IoC, Port);
+
+ SkXmInitPauseMd(pAC, IoC, Port);
+
+ /*
+ * Initialize the Interrupt Mask Register. Default IRQs are...
+ * - Link Asynchronous Event
+ * - Link Partner requests config
+ * - Auto Negotiation Done
+ * - Rx Counter Event Overflow
+ * - Tx Counter Event Overflow
+ * - Transmit FIFO Underrun
+ */
IntMask = XM_DEF_MSK;
+
+#ifdef DEBUG
+ /* add IRQ for Receive FIFO Overflow */
+ IntMask &= ~XM_IS_RXF_OV;
+#endif /* DEBUG */
+
+ if (pPrt->PhyType != SK_PHY_XMAC) {
+ /* disable GP0 interrupt bit */
+ IntMask |= XM_IS_INP_ASS;
+ }
+ XM_OUT16(IoC, Port, XM_IMSK, IntMask);
+
+ /* get MMU Command Reg. */
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Reg);
+
+ if (pPrt->PhyType != SK_PHY_XMAC &&
+ (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
+ pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL)) {
+ /* set to Full Duplex */
+ Reg |= XM_MMU_GMII_FD;
+ }
+
+ switch (pPrt->PhyType) {
+ case SK_PHY_BCOM:
+ /*
+ * Workaround BCOM Errata (#10523) for all BCom Phys
+ * Enable Power Management after link up
+ */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
+ (SK_U16)(SWord & ~PHY_B_AC_DIS_PM));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK,
+ (SK_U16)PHY_B_DEF_MSK);
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, PHY_L_DEF_MSK);
+ break;
+ case SK_PHY_NAT:
+ /* todo National:
+ SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, PHY_N_DEF_MSK); */
+ /* no interrupts possible from National ??? */
+ break;
+#endif /* OTHER_PHY */
+ }
+
+ /* enable Rx/Tx */
+ XM_OUT16(IoC, Port, XM_MMU_CMD, Reg | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /*
+ * Initialize the Interrupt Mask Register. Default IRQs are...
+ * - Rx Counter Event Overflow
+ * - Tx Counter Event Overflow
+ * - Transmit FIFO Underrun
+ */
+ IntMask = GMAC_DEF_MSK;
+
+#ifdef DEBUG
+ /* add IRQ for Receive FIFO Overrun */
+ IntMask |= GM_IS_RX_FF_OR;
+#endif /* DEBUG */
+
+ SK_OUT8(IoC, GMAC_IRQ_MSK, (SK_U8)IntMask);
+
+ /* get General Purpose Control */
+ GM_IN16(IoC, Port, GM_GP_CTRL, &Reg);
+
+ if (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
+ pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL) {
+ /* set to Full Duplex */
+ Reg |= GM_GPCR_DUP_FULL;
+ }
+
+ /* enable Rx/Tx */
+ GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Reg | GM_GPCR_RX_ENA |
+ GM_GPCR_TX_ENA));
+
+#ifndef VCPU
+ /* Enable all PHY interrupts */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK,
+ (SK_U16)PHY_M_DEF_MSK);
+#endif /* VCPU */
+ }
+#endif /* YUKON */
+
+ return(0);
+
+} /* SkMacRxTxEnable */
+
+
+/******************************************************************************
+ *
+ * SkMacRxTxDisable() - Disable Receiver and Transmitter
+ *
+ * Description: disables Rx/Tx dep. on board type
+ *
+ * Returns: N/A
+ */
+void SkMacRxTxDisable(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_U16 Word;
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
+
+ XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
+
+ /* dummy read to ensure writing */
+ XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+
+ GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
+
+ GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Word & ~(GM_GPCR_RX_ENA |
+ GM_GPCR_TX_ENA)));
+
+ /* dummy read to ensure writing */
+ GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
+ }
+#endif /* YUKON */
+
+} /* SkMacRxTxDisable */
+
+
+/******************************************************************************
+ *
+ * SkMacIrqDisable() - Disable IRQ from MAC
+ *
+ * Description: sets the IRQ-mask to disable IRQ dep. on board type
+ *
+ * Returns: N/A
+ */
+void SkMacIrqDisable(
+SK_AC *pAC, /* Adapter Context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+#ifdef GENESIS
+ SK_U16 Word;
+#endif
+
+ pPrt = &pAC->GIni.GP[Port];
+
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+
+ /* disable all XMAC IRQs */
+ XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
+
+ /* Disable all PHY interrupts */
+ switch (pPrt->PhyType) {
+ case SK_PHY_BCOM:
+ /* Make sure that PHY is initialized */
+ if (pPrt->PState != SK_PRT_RESET) {
+ /* NOT allowed if BCOM is in RESET state */
+ /* Workaround BCOM Errata (#10523) all BCom */
+ /* Disable Power Management if link is down */
+ SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Word);
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
+ (SK_U16)(Word | PHY_B_AC_DIS_PM));
+ SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);
+ }
+ break;
+#ifdef OTHER_PHY
+ case SK_PHY_LONE:
+ SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);
+ break;
+ case SK_PHY_NAT:
+ /* todo: National
+ SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */
+ break;
+#endif /* OTHER_PHY */
+ }
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* disable all GMAC IRQs */
+ SK_OUT8(IoC, GMAC_IRQ_MSK, 0);
+
+#ifndef VCPU
+ /* Disable all PHY interrupts */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
+#endif /* VCPU */
+ }
+#endif /* YUKON */
+
+} /* SkMacIrqDisable */
+
+
+#ifdef SK_DIAG
+/******************************************************************************
+ *
+ * SkXmSendCont() - Enable / Disable Send Continuous Mode
+ *
+ * Description: enable / disable Send Continuous Mode on XMAC
+ *
+ * Returns:
+ * nothing
+ */
+void SkXmSendCont(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL Enable) /* Enable / Disable */
+{
+ SK_U32 MdReg;
+
+ XM_IN32(IoC, Port, XM_MODE, &MdReg);
+
+ if (Enable) {
+ MdReg |= XM_MD_TX_CONT;
}
else {
- /* disable GP0 interrupt bit */
- IntMask = XM_DEF_MSK | XM_IS_INP_ASS;
+ MdReg &= ~XM_MD_TX_CONT;
}
- XM_OUT16(IoC, Port, XM_IMSK, IntMask);
+ /* setup Mode Register */
+ XM_OUT32(IoC, Port, XM_MODE, MdReg);
+
+} /* SkXmSendCont */
+
+
+/******************************************************************************
+ *
+ * SkMacTimeStamp() - Enable / Disable Time Stamp
+ *
+ * Description: enable / disable Time Stamp generation for Rx packets
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacTimeStamp(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL Enable) /* Enable / Disable */
+{
+ SK_U32 MdReg;
+ SK_U8 TimeCtrl;
+
+ if (pAC->GIni.GIGenesis) {
+
+ XM_IN32(IoC, Port, XM_MODE, &MdReg);
- /* RX/TX enable */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Reg);
- if (pPrt->PhyType != SK_PHY_XMAC &&
- (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL)) {
- Reg |= XM_MMU_GMII_FD;
+ if (Enable) {
+ MdReg |= XM_MD_ATS;
+ }
+ else {
+ MdReg &= ~XM_MD_ATS;
+ }
+ /* setup Mode Register */
+ XM_OUT32(IoC, Port, XM_MODE, MdReg);
}
- switch (pPrt->PhyType) {
- case SK_PHY_BCOM:
- /* Workaround BCOM Errata (#10523) for all BCom Phys */
- /* Enable Power Management after link up */
- PHY_READ(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL, &SWord);
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_AUX_CTRL, SWord & ~PHY_B_AC_DIS_PM);
- PHY_WRITE(IoC, pPrt, Port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK);
- break;
- case SK_PHY_LONE:
- PHY_WRITE(IoC, pPrt, Port, PHY_LONE_INT_ENAB, PHY_L_DEF_MSK);
- break;
- case SK_PHY_NAT:
- /* todo National:
- PHY_WRITE(IoC, pPrt, Port, PHY_NAT_INT_MASK,
- PHY_N_DEF_MSK); */
- /* no interrupts possible from National ??? */
- break;
+ else {
+ if (Enable) {
+ TimeCtrl = GMT_ST_START | GMT_ST_CLR_IRQ;
+ }
+ else {
+ TimeCtrl = GMT_ST_STOP | GMT_ST_CLR_IRQ;
+ }
+ /* Start/Stop Time Stamp Timer */
+ SK_OUT8(IoC, GMAC_TI_ST_CTRL, TimeCtrl);
}
- XM_OUT16(IoC, Port, XM_MMU_CMD, Reg | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
-
- return (0);
-} /* SkXmRxTxEnable*/
-#ifndef SK_DIAG
+} /* SkMacTimeStamp*/
+
+#else /* !SK_DIAG */
+#ifdef GENESIS
/******************************************************************************
*
- * SkXmIrq() - Interrupt service routine
+ * SkXmAutoNegLipaXmac() - Decides whether Link Partner could do auto-neg
*
- * Description:
- * Services an Interrupt of the XMAC II
+ * This function analyses the Interrupt status word. If any of the
+ * Auto-negotiating interrupt bits are set, the PLipaAutoNeg variable
+ * is set true.
+ */
+void SkXmAutoNegLipaXmac(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_U16 IStatus) /* Interrupt Status word to analyse */
+{
+ SK_GEPORT *pPrt;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
+ (IStatus & (XM_IS_LIPA_RC | XM_IS_RX_PAGE | XM_IS_AND)) != 0) {
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegLipa: AutoNeg detected on Port %d, IStatus=0x%04X\n",
+ Port, IStatus));
+ pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
+ }
+} /* SkXmAutoNegLipaXmac */
+#endif /* GENESIS */
+
+
+/******************************************************************************
+ *
+ * SkMacAutoNegLipaPhy() - Decides whether Link Partner could do auto-neg
+ *
+ * This function analyses the PHY status word.
+ * If any of the Auto-negotiating bits are set, the PLipaAutoNeg variable
+ * is set true.
+ */
+void SkMacAutoNegLipaPhy(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_U16 PhyStat) /* PHY Status word to analyse */
+{
+ SK_GEPORT *pPrt;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
+ (PhyStat & PHY_ST_AN_OVER) != 0) {
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("AutoNegLipa: AutoNeg detected on Port %d, PhyStat=0x%04X\n",
+ Port, PhyStat));
+ pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
+ }
+} /* SkMacAutoNegLipaPhy */
+
+
+#ifdef GENESIS
+/******************************************************************************
+ *
+ * SkXmIrq() - Interrupt Service Routine
+ *
+ * Description: services an Interrupt Request of the XMAC
*
* Note:
- * The XMACs interrupt source register is NOT read here.
- * With an external PHY, some interrupt bits are not meaningfull
- * any more:
+ * With an external PHY, some interrupt bits are not meaningfull any more:
* - LinkAsyncEvent (bit #14) XM_IS_LNK_AE
* - LinkPartnerReqConfig (bit #10) XM_IS_LIPA_RC
* - Page Received (bit #9) XM_IS_RX_PAGE
@@ -2086,124 +4025,629 @@
void SkXmIrq(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U16 IStatus) /* Interrupt status read from the XMAC */
+int Port) /* Port Index (MAC_1 + n) */
{
SK_GEPORT *pPrt;
SK_EVPARA Para;
+ SK_U16 IStatus; /* Interrupt status read from the XMAC */
SK_U16 IStatus2;
+#ifdef SK_SLIM
+ SK_U64 OverflowStatus;
+#endif
pPrt = &pAC->GIni.GP[Port];
- if (pPrt->PhyType != SK_PHY_XMAC) {
+ XM_IN16(IoC, Port, XM_ISRC, &IStatus);
+
+ /* LinkPartner Auto-negable? */
+ if (pPrt->PhyType == SK_PHY_XMAC) {
+ SkXmAutoNegLipaXmac(pAC, IoC, Port, IStatus);
+ }
+ else {
/* mask bits that are not used with ext. PHY */
IStatus &= ~(XM_IS_LNK_AE | XM_IS_LIPA_RC |
XM_IS_RX_PAGE | XM_IS_TX_PAGE |
XM_IS_AND | XM_IS_INP_ASS);
}
- /*
- * LinkPartner Autonegable?
- */
- if (pPrt->PhyType == SK_PHY_XMAC) {
- SkXmAutoNegLipaXmac(pAC, IoC, Port, IStatus);
- }
-
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("XmacIrq Port %d Isr %x\n", Port, IStatus));
+ ("XmacIrq Port %d Isr 0x%04X\n", Port, IStatus));
if (!pPrt->PHWLinkUp) {
/* Spurious XMAC interrupt */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("SkXmIrq: spurious interrupt on port %d\n", Port));
+ ("SkXmIrq: spurious interrupt on Port %d\n", Port));
return;
}
- if (IStatus & XM_IS_INP_ASS) {
+ if ((IStatus & XM_IS_INP_ASS) != 0) {
/* Reread ISR Register if link is not in sync */
XM_IN16(IoC, Port, XM_ISRC, &IStatus2);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("SkXmIrq: Link async. Double check port %d %x %x\n",
+ ("SkXmIrq: Link async. Double check Port %d 0x%04X 0x%04X\n",
Port, IStatus, IStatus2));
IStatus &= ~XM_IS_INP_ASS;
IStatus |= IStatus2;
-
}
- if (IStatus & XM_IS_LNK_AE) {
- /* not used GP0 is used instead */
+ if ((IStatus & XM_IS_LNK_AE) != 0) {
+ /* not used, GP0 is used instead */
}
- if (IStatus & XM_IS_TX_ABORT) {
+ if ((IStatus & XM_IS_TX_ABORT) != 0) {
/* not used */
}
- if (IStatus & XM_IS_FRC_INT) {
- /* not used. use ASIC IRQ instead if needed */
+ if ((IStatus & XM_IS_FRC_INT) != 0) {
+ /* not used, use ASIC IRQ instead if needed */
}
- if (IStatus & (XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE)) {
+ if ((IStatus & (XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE)) != 0) {
SkHWLinkDown(pAC, IoC, Port);
/* Signal to RLMT */
- Para.Para32[0] = (SK_U32) Port;
+ Para.Para32[0] = (SK_U32)Port;
SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
/* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pAC->GIni.GP[Port].PWaTimer,
- SK_WA_INA_TIME, SKGE_HWAC, SK_HWEV_WATIM, Para);
+ SkTimerStart(pAC, IoC, &pPrt->PWaTimer, SK_WA_INA_TIME,
+ SKGE_HWAC, SK_HWEV_WATIM, Para);
}
- if (IStatus & XM_IS_RX_PAGE) {
+ if ((IStatus & XM_IS_RX_PAGE) != 0) {
/* not used */
}
- if (IStatus & XM_IS_TX_PAGE) {
+ if ((IStatus & XM_IS_TX_PAGE) != 0) {
/* not used */
}
- if (IStatus & XM_IS_AND) {
- SK_DBG_MSG(pAC,SK_DBGMOD_HWM,SK_DBGCAT_IRQ,
- ("SkXmIrq: AND on link that is up port %d\n", Port));
+ if ((IStatus & XM_IS_AND) != 0) {
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("SkXmIrq: AND on link that is up Port %d\n", Port));
}
- if (IStatus & XM_IS_TSC_OV) {
+ if ((IStatus & XM_IS_TSC_OV) != 0) {
/* not used */
}
- if (IStatus & XM_IS_RXC_OV) {
- Para.Para32[0] = (SK_U32) Port;
- Para.Para32[1] = (SK_U32) IStatus;
+ /* Combined Tx & Rx Counter Overflow SIRQ Event */
+ if ((IStatus & (XM_IS_RXC_OV | XM_IS_TXC_OV)) != 0) {
+#ifdef SK_SLIM
+ SkXmOverflowStatus(pAC, IoC, Port, IStatus, &OverflowStatus);
+#else
+ Para.Para32[0] = (SK_U32)Port;
+ Para.Para32[1] = (SK_U32)IStatus;
SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_SIRQ_OVERFLOW, Para);
+#endif /* SK_SLIM */
+ }
+
+ if ((IStatus & XM_IS_RXF_OV) != 0) {
+ /* normal situation -> no effect */
+#ifdef DEBUG
+ pPrt->PRxOverCnt++;
+#endif /* DEBUG */
}
- if (IStatus & XM_IS_TXC_OV) {
- Para.Para32[0] = (SK_U32) Port;
- Para.Para32[1] = (SK_U32) IStatus;
+ if ((IStatus & XM_IS_TXF_UR) != 0) {
+ /* may NOT happen -> error log */
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E020, SKERR_SIRQ_E020MSG);
+ }
+
+ if ((IStatus & XM_IS_TX_COMP) != 0) {
+ /* not served here */
+ }
+
+ if ((IStatus & XM_IS_RX_COMP) != 0) {
+ /* not served here */
+ }
+} /* SkXmIrq */
+#endif /* GENESIS */
+
+
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmIrq() - Interrupt Service Routine
+ *
+ * Description: services an Interrupt Request of the GMAC
+ *
+ * Note:
+ *
+ * Returns:
+ * nothing
+ */
+void SkGmIrq(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+ SK_U8 IStatus; /* Interrupt status */
+#ifdef SK_SLIM
+ SK_U64 OverflowStatus;
+#else
+ SK_EVPARA Para;
+#endif
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ SK_IN8(IoC, GMAC_IRQ_SRC, &IStatus);
+
+#ifdef XXX
+ /* LinkPartner Auto-negable? */
+ SkMacAutoNegLipaPhy(pAC, IoC, Port, IStatus);
+#endif /* XXX */
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
+ ("GmacIrq Port %d Isr 0x%04X\n", Port, IStatus));
+
+ /* Combined Tx & Rx Counter Overflow SIRQ Event */
+ if (IStatus & (GM_IS_RX_CO_OV | GM_IS_TX_CO_OV)) {
+ /* these IRQs will be cleared by reading GMACs register */
+#ifdef SK_SLIM
+ SkGmOverflowStatus(pAC, IoC, Port, IStatus, &OverflowStatus);
+#else
+ Para.Para32[0] = (SK_U32)Port;
+ Para.Para32[1] = (SK_U32)IStatus;
SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_SIRQ_OVERFLOW, Para);
+#endif
}
- if (IStatus & XM_IS_RXF_OV) {
- /* normal situation -> no effect */
+ if (IStatus & GM_IS_RX_FF_OR) {
+ /* clear GMAC Rx FIFO Overrun IRQ */
+ SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_CLI_RX_FO);
+#ifdef DEBUG
+ pPrt->PRxOverCnt++;
+#endif /* DEBUG */
}
- if (IStatus & XM_IS_TXF_UR) {
+ if (IStatus & GM_IS_TX_FF_UR) {
+ /* clear GMAC Tx FIFO Underrun IRQ */
+ SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_CLI_TX_FU);
/* may NOT happen -> error log */
- SK_ERR_LOG(pAC, SK_ERRCL_HW , SKERR_SIRQ_E020,
- SKERR_SIRQ_E020MSG);
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E020, SKERR_SIRQ_E020MSG);
}
- if (IStatus & XM_IS_TX_COMP) {
+ if (IStatus & GM_IS_TX_COMPL) {
/* not served here */
}
- if (IStatus & XM_IS_RX_COMP) {
+ if (IStatus & GM_IS_RX_COMPL) {
/* not served here */
}
+} /* SkGmIrq */
+#endif /* YUKON */
+
+
+/******************************************************************************
+ *
+ * SkMacIrq() - Interrupt Service Routine for MAC
+ *
+ * Description: calls the Interrupt Service Routine dep. on board type
+ *
+ * Returns:
+ * nothing
+ */
+void SkMacIrq(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port) /* Port Index (MAC_1 + n) */
+{
+#ifdef GENESIS
+ if (pAC->GIni.GIGenesis) {
+ /* IRQ from XMAC */
+ SkXmIrq(pAC, IoC, Port);
+ }
+#endif /* GENESIS */
+
+#ifdef YUKON
+ if (pAC->GIni.GIYukon) {
+ /* IRQ from GMAC */
+ SkGmIrq(pAC, IoC, Port);
+ }
+#endif /* YUKON */
-} /* SkXmIrq*/
+} /* SkMacIrq */
#endif /* !SK_DIAG */
+
+#ifdef GENESIS
+/******************************************************************************
+ *
+ * SkXmUpdateStats() - Force the XMAC to output the current statistic
+ *
+ * Description:
+ * The XMAC holds its statistic internally. To obtain the current
+ * values a command must be sent so that the statistic data will
+ * be written to a predefined memory area on the adapter.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkXmUpdateStats(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_GEPORT *pPrt;
+ SK_U16 StatReg;
+ int WaitIndex;
+
+ pPrt = &pAC->GIni.GP[Port];
+ WaitIndex = 0;
+
+ /* Send an update command to XMAC specified */
+ XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_SNP_TXC | XM_SC_SNP_RXC);
+
+ /*
+ * It is an auto-clearing register. If the command bits
+ * went to zero again, the statistics are transferred.
+ * Normally the command should be executed immediately.
+ * But just to be sure we execute a loop.
+ */
+ do {
+
+ XM_IN16(IoC, Port, XM_STAT_CMD, &StatReg);
+
+ if (++WaitIndex > 10) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E021, SKERR_HWI_E021MSG);
+
+ return(1);
+ }
+ } while ((StatReg & (XM_SC_SNP_TXC | XM_SC_SNP_RXC)) != 0);
+
+ return(0);
+} /* SkXmUpdateStats */
+
+
+/******************************************************************************
+ *
+ * SkXmMacStatistic() - Get XMAC counter value
+ *
+ * Description:
+ * Gets the 32bit counter value. Except for the octet counters
+ * the lower 32bit are counted in hardware and the upper 32bit
+ * must be counted in software by monitoring counter overflow interrupts.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkXmMacStatistic(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port, /* Port Index (MAC_1 + n) */
+SK_U16 StatAddr, /* MIB counter base address */
+SK_U32 SK_FAR *pVal) /* ptr to return statistic value */
+{
+ if ((StatAddr < XM_TXF_OK) || (StatAddr > XM_RXF_MAX_SZ)) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E022, SKERR_HWI_E022MSG);
+
+ return(1);
+ }
+
+ XM_IN32(IoC, Port, StatAddr, pVal);
+
+ return(0);
+} /* SkXmMacStatistic */
+
+
+/******************************************************************************
+ *
+ * SkXmResetCounter() - Clear MAC statistic counter
+ *
+ * Description:
+ * Force the XMAC to clear its statistic counter.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkXmResetCounter(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port) /* Port Index (MAC_1 + n) */
+{
+ XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
+ /* Clear two times according to Errata #3 */
+ XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
+
+ return(0);
+} /* SkXmResetCounter */
+
+
+/******************************************************************************
+ *
+ * SkXmOverflowStatus() - Gets the status of counter overflow interrupt
+ *
+ * Description:
+ * Checks the source causing an counter overflow interrupt. On success the
+ * resulting counter overflow status is written to <pStatus>, whereas the
+ * upper dword stores the XMAC ReceiveCounterEvent register and the lower
+ * dword the XMAC TransmitCounterEvent register.
+ *
+ * Note:
+ * For XMAC the interrupt source is a self-clearing register, so the source
+ * must be checked only once. SIRQ module does another check to be sure
+ * that no interrupt get lost during process time.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkXmOverflowStatus(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port, /* Port Index (MAC_1 + n) */
+SK_U16 IStatus, /* Interupt Status from MAC */
+SK_U64 SK_FAR *pStatus) /* ptr for return overflow status value */
+{
+ SK_U64 Status; /* Overflow status */
+ SK_U32 RegVal;
+
+ Status = 0;
+
+ if ((IStatus & XM_IS_RXC_OV) != 0) {
+
+ XM_IN32(IoC, Port, XM_RX_CNT_EV, &RegVal);
+ Status |= (SK_U64)RegVal << 32;
+ }
+
+ if ((IStatus & XM_IS_TXC_OV) != 0) {
+
+ XM_IN32(IoC, Port, XM_TX_CNT_EV, &RegVal);
+ Status |= (SK_U64)RegVal;
+ }
+
+ *pStatus = Status;
+
+ return(0);
+} /* SkXmOverflowStatus */
+#endif /* GENESIS */
+
+
+#ifdef YUKON
+/******************************************************************************
+ *
+ * SkGmUpdateStats() - Force the GMAC to output the current statistic
+ *
+ * Description:
+ * Empty function for GMAC. Statistic data is accessible in direct way.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkGmUpdateStats(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port) /* Port Index (MAC_1 + n) */
+{
+ return(0);
+}
+
+
+/******************************************************************************
+ *
+ * SkGmMacStatistic() - Get GMAC counter value
+ *
+ * Description:
+ * Gets the 32bit counter value. Except for the octet counters
+ * the lower 32bit are counted in hardware and the upper 32bit
+ * must be counted in software by monitoring counter overflow interrupts.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkGmMacStatistic(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port, /* Port Index (MAC_1 + n) */
+SK_U16 StatAddr, /* MIB counter base address */
+SK_U32 SK_FAR *pVal) /* ptr to return statistic value */
+{
+
+ if ((StatAddr < GM_RXF_UC_OK) || (StatAddr > GM_TXE_FIFO_UR)) {
+
+ SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E022, SKERR_HWI_E022MSG);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("SkGmMacStat: wrong MIB counter 0x%04X\n", StatAddr));
+ return(1);
+ }
+
+ GM_IN32(IoC, Port, StatAddr, pVal);
+
+ return(0);
+} /* SkGmMacStatistic */
+
+
+/******************************************************************************
+ *
+ * SkGmResetCounter() - Clear MAC statistic counter
+ *
+ * Description:
+ * Force GMAC to clear its statistic counter.
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkGmResetCounter(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port) /* Port Index (MAC_1 + n) */
+{
+ SK_U16 Reg; /* Phy Address Register */
+ SK_U16 Word;
+ int i;
+
+ GM_IN16(IoC, Port, GM_PHY_ADDR, &Reg);
+
+ /* set MIB Clear Counter Mode */
+ GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg | GM_PAR_MIB_CLR);
+
+ /* read all MIB Counters with Clear Mode set */
+ for (i = 0; i < GM_MIB_CNT_SIZE; i++) {
+ /* the reset is performed only when the lower 16 bits are read */
+ GM_IN16(IoC, Port, GM_MIB_CNT_BASE + 8*i, &Word);
+ }
+
+ /* clear MIB Clear Counter Mode */
+ GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg);
+
+ return(0);
+} /* SkGmResetCounter */
+
+
+/******************************************************************************
+ *
+ * SkGmOverflowStatus() - Gets the status of counter overflow interrupt
+ *
+ * Description:
+ * Checks the source causing an counter overflow interrupt. On success the
+ * resulting counter overflow status is written to <pStatus>, whereas the
+ * the following bit coding is used:
+ * 63:56 - unused
+ * 55:48 - TxRx interrupt register bit7:0
+ * 32:47 - Rx interrupt register
+ * 31:24 - unused
+ * 23:16 - TxRx interrupt register bit15:8
+ * 15:0 - Tx interrupt register
+ *
+ * Returns:
+ * 0: success
+ * 1: something went wrong
+ */
+int SkGmOverflowStatus(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+unsigned int Port, /* Port Index (MAC_1 + n) */
+SK_U16 IStatus, /* Interupt Status from MAC */
+SK_U64 SK_FAR *pStatus) /* ptr for return overflow status value */
+{
+ SK_U64 Status; /* Overflow status */
+ SK_U16 RegVal;
+
+ Status = 0;
+
+ if ((IStatus & GM_IS_RX_CO_OV) != 0) {
+ /* this register is self-clearing after read */
+ GM_IN16(IoC, Port, GM_RX_IRQ_SRC, &RegVal);
+ Status |= (SK_U64)RegVal << 32;
+ }
+
+ if ((IStatus & GM_IS_TX_CO_OV) != 0) {
+ /* this register is self-clearing after read */
+ GM_IN16(IoC, Port, GM_TX_IRQ_SRC, &RegVal);
+ Status |= (SK_U64)RegVal;
+ }
+
+ /* this register is self-clearing after read */
+ GM_IN16(IoC, Port, GM_TR_IRQ_SRC, &RegVal);
+ /* Rx overflow interrupt register bits (LoByte)*/
+ Status |= (SK_U64)((SK_U8)RegVal) << 48;
+ /* Tx overflow interrupt register bits (HiByte)*/
+ Status |= (SK_U64)(RegVal >> 8) << 16;
+
+ *pStatus = Status;
+
+ return(0);
+} /* SkGmOverflowStatus */
+
+
+#ifndef SK_SLIM
+/******************************************************************************
+ *
+ * SkGmCableDiagStatus() - Starts / Gets status of cable diagnostic test
+ *
+ * Description:
+ * starts the cable diagnostic test if 'StartTest' is true
+ * gets the results if 'StartTest' is true
+ *
+ * NOTE: this test is meaningful only when link is down
+ *
+ * Returns:
+ * 0: success
+ * 1: no YUKON copper
+ * 2: test in progress
+ */
+int SkGmCableDiagStatus(
+SK_AC *pAC, /* adapter context */
+SK_IOC IoC, /* IO context */
+int Port, /* Port Index (MAC_1 + n) */
+SK_BOOL StartTest) /* flag for start / get result */
+{
+ int i;
+ SK_U16 RegVal;
+ SK_GEPORT *pPrt;
+
+ pPrt = &pAC->GIni.GP[Port];
+
+ if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
+
+ return(1);
+ }
+
+ if (StartTest) {
+ /* only start the cable test */
+ if ((pPrt->PhyId1 & PHY_I1_REV_MSK) < 4) {
+ /* apply TDR workaround from Marvell */
+ SkGmPhyWrite(pAC, IoC, Port, 29, 0x001e);
+
+ SkGmPhyWrite(pAC, IoC, Port, 30, 0xcc00);
+ SkGmPhyWrite(pAC, IoC, Port, 30, 0xc800);
+ SkGmPhyWrite(pAC, IoC, Port, 30, 0xc400);
+ SkGmPhyWrite(pAC, IoC, Port, 30, 0xc000);
+ SkGmPhyWrite(pAC, IoC, Port, 30, 0xc100);
+ }
+
+ /* set address to 0 for MDI[0] */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0);
+
+ /* Read Cable Diagnostic Reg */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
+
+ /* start Cable Diagnostic Test */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CABLE_DIAG,
+ (SK_U16)(RegVal | PHY_M_CABD_ENA_TEST));
+
+ return(0);
+ }
+
+ /* Read Cable Diagnostic Reg */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
+
+ SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
+ ("PHY Cable Diag.=0x%04X\n", RegVal));
+
+ if ((RegVal & PHY_M_CABD_ENA_TEST) != 0) {
+ /* test is running */
+ return(2);
+ }
+
+ /* get the test results */
+ for (i = 0; i < 4; i++) {
+ /* set address to i for MDI[i] */
+ SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, (SK_U16)i);
+
+ /* get Cable Diagnostic values */
+ SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
+
+ pPrt->PMdiPairLen[i] = (SK_U8)(RegVal & PHY_M_CABD_DIST_MSK);
+
+ pPrt->PMdiPairSts[i] = (SK_U8)((RegVal & PHY_M_CABD_STAT_MSK) >> 13);
+ }
+
+ return(0);
+} /* SkGmCableDiagStatus */
+#endif /* !SK_SLIM */
+#endif /* YUKON */
/* End of file */
diff -Nru a/drivers/net/skfp/h/cmtdef.h b/drivers/net/skfp/h/cmtdef.h
--- a/drivers/net/skfp/h/cmtdef.h Sun Aug 3 13:14:46 2003
+++ b/drivers/net/skfp/h/cmtdef.h Sun Aug 3 13:14:46 2003
@@ -721,21 +721,21 @@
#endif
#define SMT_E0100 SMT_EBASE + 0
-#define SMT_E0100_MSG "cfm FSM: illegal ce_type"
+#define SMT_E0100_MSG "cfm FSM: invalid ce_type"
#define SMT_E0101 SMT_EBASE + 1
#define SMT_E0101_MSG "CEM: case ???"
#define SMT_E0102 SMT_EBASE + 2
-#define SMT_E0102_MSG "CEM A: illegal state"
+#define SMT_E0102_MSG "CEM A: invalid state"
#define SMT_E0103 SMT_EBASE + 3
-#define SMT_E0103_MSG "CEM B: illegal state"
+#define SMT_E0103_MSG "CEM B: invalid state"
#define SMT_E0104 SMT_EBASE + 4
-#define SMT_E0104_MSG "CEM M: illegal state"
+#define SMT_E0104_MSG "CEM M: invalid state"
#define SMT_E0105 SMT_EBASE + 5
-#define SMT_E0105_MSG "CEM S: illegal state"
+#define SMT_E0105_MSG "CEM S: invalid state"
#define SMT_E0106 SMT_EBASE + 6
-#define SMT_E0106_MSG "CFM : illegal state"
+#define SMT_E0106_MSG "CFM : invalid state"
#define SMT_E0107 SMT_EBASE + 7
-#define SMT_E0107_MSG "ECM : illegal state"
+#define SMT_E0107_MSG "ECM : invalid state"
#define SMT_E0108 SMT_EBASE + 8
#define SMT_E0108_MSG "prop_actions : NAC in DAS CFM"
#define SMT_E0109 SMT_EBASE + 9
@@ -757,21 +757,21 @@
#define SMT_E0117 SMT_EBASE + 17
#define SMT_E0117_MSG "E_SMT_001: RxD count for receive queue 1 = 0"
#define SMT_E0118 SMT_EBASE + 18
-#define SMT_E0118_MSG "PCM : illegal state"
+#define SMT_E0118_MSG "PCM : invalid state"
#define SMT_E0119 SMT_EBASE + 19
#define SMT_E0119_MSG "smt_add_para"
#define SMT_E0120 SMT_EBASE + 20
#define SMT_E0120_MSG "smt_set_para"
#define SMT_E0121 SMT_EBASE + 21
-#define SMT_E0121_MSG "illegal event in dispatcher"
+#define SMT_E0121_MSG "invalid event in dispatcher"
#define SMT_E0122 SMT_EBASE + 22
-#define SMT_E0122_MSG "RMT : illegal state"
+#define SMT_E0122_MSG "RMT : invalid state"
#define SMT_E0123 SMT_EBASE + 23
-#define SMT_E0123_MSG "SBA: state machine has illegal state"
+#define SMT_E0123_MSG "SBA: state machine has invalid state"
#define SMT_E0124 SMT_EBASE + 24
#define SMT_E0124_MSG "sba_free_session() called with NULL pointer"
#define SMT_E0125 SMT_EBASE + 25
-#define SMT_E0125_MSG "SBA : illegal session pointer"
+#define SMT_E0125_MSG "SBA : invalid session pointer"
#define SMT_E0126 SMT_EBASE + 26
#define SMT_E0126_MSG "smt_free_mbuf() called with NULL pointer\n"
#define SMT_E0127 SMT_EBASE + 27
diff -Nru a/drivers/net/skfp/smt.c b/drivers/net/skfp/smt.c
--- a/drivers/net/skfp/smt.c Sun Aug 3 13:14:51 2003
+++ b/drivers/net/skfp/smt.c Sun Aug 3 13:14:51 2003
@@ -817,7 +817,7 @@
#endif
}
if (illegal) {
- DB_SMT("SMT: discarding illegal frame, reason = %d\n",
+ DB_SMT("SMT: discarding invalid frame, reason = %d\n",
illegal,0) ;
}
smt_free_mbuf(smc,mb) ;
diff -Nru a/drivers/net/starfire.c b/drivers/net/starfire.c
--- a/drivers/net/starfire.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/starfire.c Sun Aug 3 13:14:46 2003
@@ -323,7 +323,7 @@
#define netif_start_if(dev)
#define netif_stop_if(dev)
-#define PCI_SLOT_NAME(pci_dev) (pci_dev)->slot_name
+#define PCI_SLOT_NAME(pci_dev) pci_name(pci_dev)
#endif /* LINUX_VERSION_CODE > 0x20300 */
@@ -487,7 +487,7 @@
CH_6915 = 0,
};
-static struct pci_device_id starfire_pci_tbl[] __devinitdata = {
+static struct pci_device_id starfire_pci_tbl[] = {
{ 0x9004, 0x6915, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_6915 },
{ 0, }
};
diff -Nru a/drivers/net/sundance.c b/drivers/net/sundance.c
--- a/drivers/net/sundance.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/sundance.c Sun Aug 3 13:14:49 2003
@@ -284,7 +284,7 @@
#define USE_IO_OPS 1
#endif
-static struct pci_device_id sundance_pci_tbl[] __devinitdata = {
+static struct pci_device_id sundance_pci_tbl[] = {
{0x1186, 0x1002, 0x1186, 0x1002, 0, 0, 0},
{0x1186, 0x1002, 0x1186, 0x1003, 0, 0, 1},
{0x1186, 0x1002, 0x1186, 0x1012, 0, 0, 2},
@@ -1584,7 +1584,7 @@
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, np->pci_dev->slot_name);
+ strcpy(info.bus_info, pci_name(np->pci_dev));
memset(&info.fw_version, 0, sizeof(info.fw_version));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
diff -Nru a/drivers/net/sungem.c b/drivers/net/sungem.c
--- a/drivers/net/sungem.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/sungem.c Sun Aug 3 13:14:52 2003
@@ -84,7 +84,7 @@
#define GEM_MODULE_NAME "gem"
#define PFX GEM_MODULE_NAME ": "
-static struct pci_device_id gem_pci_tbl[] __devinitdata = {
+static struct pci_device_id gem_pci_tbl[] = {
{ PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_GEM,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
@@ -2101,17 +2101,14 @@
gp->hw_running = 1;
}
- spin_lock_irq(&gp->lock);
-
/* We can now request the interrupt as we know it's masked
* on the controller
*/
if (request_irq(gp->pdev->irq, gem_interrupt,
SA_SHIRQ, dev->name, (void *)dev)) {
- spin_unlock_irq(&gp->lock);
-
printk(KERN_ERR "%s: failed to request irq !\n", gp->dev->name);
+ spin_lock_irq(&gp->lock);
#ifdef CONFIG_PPC_PMAC
if (!hw_was_up && gp->pdev->vendor == PCI_VENDOR_ID_APPLE)
gem_apple_powerdown(gp);
@@ -2120,10 +2117,13 @@
gp->pm_timer.expires = jiffies + 10*HZ;
add_timer(&gp->pm_timer);
up(&gp->pm_sem);
+ spin_unlock_irq(&gp->lock);
return -EAGAIN;
}
+ spin_lock_irq(&gp->lock);
+
/* Allocate & setup ring buffers */
gem_init_rings(gp);
@@ -2338,7 +2338,7 @@
strncpy(info.driver, DRV_NAME, ETHTOOL_BUSINFO_LEN);
strncpy(info.version, DRV_VERSION, ETHTOOL_BUSINFO_LEN);
info.fw_version[0] = '\0';
- strncpy(info.bus_info, gp->pdev->slot_name, ETHTOOL_BUSINFO_LEN);
+ strncpy(info.bus_info, pci_name(gp->pdev), ETHTOOL_BUSINFO_LEN);
info.regdump_len = 0; /*SUNGEM_NREGS;*/
if (copy_to_user(ep_user, &info, sizeof(info)))
diff -Nru a/drivers/net/sunhme.c b/drivers/net/sunhme.c
--- a/drivers/net/sunhme.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/sunhme.c Sun Aug 3 13:14:47 2003
@@ -177,7 +177,7 @@
/* This happy_pci_ids is declared __initdata because it is only used
as an advisory to depmod. If this is ported to the new PCI interface
where it could be referenced at any time due to hot plugging,
- it should be changed to __devinitdata. */
+ the __initdata reference should be removed. */
struct pci_device_id happymeal_pci_ids[] __initdata = {
{
diff -Nru a/drivers/net/tc35815.c b/drivers/net/tc35815.c
--- a/drivers/net/tc35815.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/tc35815.c Sun Aug 3 13:14:44 2003
@@ -48,6 +48,7 @@
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/proc_fs.h>
+#include <linux/spinlock.h>
#include <asm/system.h>
#include <asm/bitops.h>
@@ -442,6 +443,7 @@
unsigned char fbl_curid;
dma_addr_t data_buf_dma_handle[RX_BUF_PAGES];
void * data_buf[RX_BUF_PAGES]; /* packing */
+ spinlock_t lock;
};
/* Index to functions, as function prototypes. */
@@ -469,7 +471,7 @@
/*
* PCI device identifiers for "new style" Linux PCI Device Drivers
*/
-static struct pci_device_id tc35815_pci_tbl[] __devinitdata = {
+static struct pci_device_id tc35815_pci_tbl[] = {
{ PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0, }
};
@@ -577,6 +579,8 @@
lp->next_module = root_tc35815_dev;
root_tc35815_dev = dev;
+ spin_lock_init(&lp->lock);
+
if (dev->mem_start > 0) {
lp->option = dev->mem_start;
if ((lp->option & TC35815_OPT_10M) &&
@@ -895,7 +899,7 @@
struct tc35815_regs *tr = (struct tc35815_regs *)dev->base_addr;
int flags;
- save_and_cli(flags);
+ spin_lock_irqsave(&lp->lock, flags);
printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
dev->name, tc_readl(&tr->Tx_Stat));
/* Try to restart the adaptor. */
@@ -903,7 +907,7 @@
tc35815_clear_queues(dev);
tc35815_chip_init(dev);
lp->tbusy=0;
- restore_flags(flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
dev->trans_start = jiffies;
netif_wake_queue(dev);
}
@@ -951,7 +955,7 @@
dma_cache_wback_inv((unsigned long)buf, length);
#endif
- save_and_cli(flags);
+ spin_lock_irqsave(&lp->lock, flags);
/* failsafe... */
if (lp->tfd_start != lp->tfd_end)
@@ -999,7 +1003,7 @@
if (tc35815_debug > 1)
printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
}
- restore_flags(flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
}
return 0;
@@ -1403,10 +1407,10 @@
unsigned long flags;
if (netif_running(dev)) {
- save_and_cli(flags);
+ spin_lock_irqsave(&lp->lock, flags);
/* Update the statistics from the device registers. */
lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
- restore_flags(flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
}
return &lp->stats;
@@ -1507,28 +1511,34 @@
}
}
-static unsigned long tc_phy_read(struct tc35815_regs *tr, int phy, int phy_reg)
+static unsigned long tc_phy_read(struct net_device *dev, struct tc35815_regs *tr, int phy, int phy_reg)
{
+ struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
unsigned long data;
int flags;
- save_and_cli(flags);
+
+ spin_lock_irqsave(&lp->lock, flags);
+
tc_writel(MD_CA_Busy | (phy << 5) | phy_reg, &tr->MD_CA);
while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
;
data = tc_readl(&tr->MD_Data);
- restore_flags(flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
return data;
}
-static void tc_phy_write(unsigned long d, struct tc35815_regs *tr, int phy, int phy_reg)
+static void tc_phy_write(struct net_device *dev, unsigned long d, struct tc35815_regs *tr, int phy, int phy_reg)
{
+ struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
int flags;
- save_and_cli(flags);
+
+ spin_lock_irqsave(&lp->lock, flags);
+
tc_writel(d, &tr->MD_Data);
tc_writel(MD_CA_Busy | MD_CA_Wr | (phy << 5) | phy_reg, &tr->MD_CA);
while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
;
- restore_flags(flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
}
static void tc35815_phy_chip_init(struct net_device *dev)
@@ -1544,18 +1554,18 @@
first = 0;
/* first data written to the PHY will be an ID number */
- tc_phy_write(0, tr, 0, MII_CONTROL); /* ID:0 */
+ tc_phy_write(dev, 0, tr, 0, MII_CONTROL); /* ID:0 */
#if 0
- tc_phy_write(MIICNTL_RESET, tr, 0, MII_CONTROL);
+ tc_phy_write(dev, MIICNTL_RESET, tr, 0, MII_CONTROL);
printk(KERN_INFO "%s: Resetting PHY...", dev->name);
- while (tc_phy_read(tr, 0, MII_CONTROL) & MIICNTL_RESET)
+ while (tc_phy_read(dev, tr, 0, MII_CONTROL) & MIICNTL_RESET)
;
printk("\n");
- tc_phy_write(MIICNTL_AUTO|MIICNTL_SPEED|MIICNTL_FDX, tr, 0,
+ tc_phy_write(dev, MIICNTL_AUTO|MIICNTL_SPEED|MIICNTL_FDX, tr, 0,
MII_CONTROL);
#endif
- id0 = tc_phy_read(tr, 0, MII_PHY_ID0);
- id1 = tc_phy_read(tr, 0, MII_PHY_ID1);
+ id0 = tc_phy_read(dev, tr, 0, MII_PHY_ID0);
+ id1 = tc_phy_read(dev, tr, 0, MII_PHY_ID1);
printk(KERN_DEBUG "%s: PHY ID %04x %04x\n", dev->name,
id0, id1);
if (lp->option & TC35815_OPT_10M) {
@@ -1567,10 +1577,10 @@
} else {
/* auto negotiation */
unsigned long neg_result;
- tc_phy_write(MIICNTL_AUTO | MIICNTL_RST_AUTO, tr, 0, MII_CONTROL);
+ tc_phy_write(dev, MIICNTL_AUTO | MIICNTL_RST_AUTO, tr, 0, MII_CONTROL);
printk(KERN_INFO "%s: Auto Negotiation...", dev->name);
count = 0;
- while (!(tc_phy_read(tr, 0, MII_STATUS) & MIISTAT_AUTO_DONE)) {
+ while (!(tc_phy_read(dev, tr, 0, MII_STATUS) & MIISTAT_AUTO_DONE)) {
if (count++ > 5000) {
printk(" failed. Assume 10Mbps\n");
lp->linkspeed = 10;
@@ -1582,7 +1592,7 @@
mdelay(1);
}
printk(" done.\n");
- neg_result = tc_phy_read(tr, 0, MII_ANLPAR);
+ neg_result = tc_phy_read(dev, tr, 0, MII_ANLPAR);
if (neg_result & (MII_AN_TX_FDX | MII_AN_TX_HDX))
lp->linkspeed = 100;
else
@@ -1601,7 +1611,7 @@
ctl |= MIICNTL_SPEED;
if (lp->fullduplex)
ctl |= MIICNTL_FDX;
- tc_phy_write(ctl, tr, 0, MII_CONTROL);
+ tc_phy_write(dev, ctl, tr, 0, MII_CONTROL);
if (lp->fullduplex) {
tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
@@ -1652,7 +1662,7 @@
tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
- save_and_cli(flags);
+ spin_lock_irqsave(&lp->lock, flags);
tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
@@ -1683,7 +1693,7 @@
#if 0 /* No need to polling */
tc_writel(virt_to_bus(lp->tfd_base), &tr->TxFrmPtr); /* start DMA transmitter */
#endif
- restore_flags(flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
}
static int tc35815_proc_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
diff -Nru a/drivers/net/tg3.c b/drivers/net/tg3.c
--- a/drivers/net/tg3.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/tg3.c Sun Aug 3 13:14:49 2003
@@ -1,7 +1,7 @@
/*
* tg3.c: Broadcom Tigon3 ethernet driver.
*
- * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2001, 2002, 2003 David S. Miller (davem@redhat.com)
* Copyright (C) 2001, 2002 Jeff Garzik (jgarzik@pobox.com)
*/
@@ -57,8 +57,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "1.7"
-#define DRV_MODULE_RELDATE "July 23, 2003"
+#define DRV_MODULE_VERSION "1.8"
+#define DRV_MODULE_RELDATE "August 1, 2003"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@@ -127,7 +127,7 @@
static int tg3_debug = -1; /* -1 == use TG3_DEF_MSG_ENABLE as value */
-static struct pci_device_id tg3_pci_tbl[] __devinitdata = {
+static struct pci_device_id tg3_pci_tbl[] = {
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5700,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5701,
@@ -258,6 +258,7 @@
{
if (!test_bit(__LINK_STATE_RX_SCHED, &dev->state)) BUG();
list_del(&dev->poll_list);
+ smp_mb__before_clear_bit();
clear_bit(__LINK_STATE_RX_SCHED, &dev->state);
}
@@ -3102,18 +3103,20 @@
u32 val;
u32 flags_save;
- /* Force NVRAM to settle.
- * This deals with a chip bug which can result in EEPROM
- * corruption.
- */
- if (tp->tg3_flags & TG3_FLAG_NVRAM) {
- int i;
+ if (!(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
+ /* Force NVRAM to settle.
+ * This deals with a chip bug which can result in EEPROM
+ * corruption.
+ */
+ if (tp->tg3_flags & TG3_FLAG_NVRAM) {
+ int i;
- tw32(NVRAM_SWARB, SWARB_REQ_SET1);
- for (i = 0; i < 100000; i++) {
- if (tr32(NVRAM_SWARB) & SWARB_GNT1)
- break;
- udelay(10);
+ tw32(NVRAM_SWARB, SWARB_REQ_SET1);
+ for (i = 0; i < 100000; i++) {
+ if (tr32(NVRAM_SWARB) & SWARB_GNT1)
+ break;
+ udelay(10);
+ }
}
}
@@ -3206,7 +3209,8 @@
udelay(10);
}
- if (i >= 100000) {
+ if (i >= 100000 &&
+ !(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
printk(KERN_ERR PFX "tg3_halt timed out for %s, "
"firmware will not restart magic=%08x\n",
tp->dev->name, val);
@@ -3950,7 +3954,8 @@
break;
udelay(10);
}
- if (i >= 100000) {
+ if (i >= 100000 &&
+ !(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
printk(KERN_ERR PFX "tg3_reset_hw timed out for %s, "
"firmware will not restart magic=%08x\n",
tp->dev->name, val);
@@ -5126,7 +5131,7 @@
strcpy (info.driver, DRV_MODULE_NAME);
strcpy (info.version, DRV_MODULE_VERSION);
memset(&info.fw_version, 0, sizeof(info.fw_version));
- strcpy (info.bus_info, pci_dev->slot_name);
+ strcpy (info.bus_info, pci_name(pci_dev));
info.eedump_len = 0;
info.regdump_len = TG3_REGDUMP_LEN;
if (copy_to_user (useraddr, &info, sizeof (info)))
@@ -5568,6 +5573,9 @@
{
int j;
+ if (tp->tg3_flags2 & TG3_FLG2_SUN_5704)
+ return;
+
tw32(GRC_EEPROM_ADDR,
(EEPROM_ADDR_FSM_RESET |
(EEPROM_DEFAULT_CLOCK_PERIOD <<
@@ -5640,6 +5648,11 @@
{
int i, saw_done_clear;
+ if (tp->tg3_flags2 & TG3_FLG2_SUN_5704) {
+ printk(KERN_ERR PFX "Attempt to do nvram_read on Sun 5704\n");
+ return -EINVAL;
+ }
+
if (!(tp->tg3_flags & TG3_FLAG_NVRAM))
return tg3_nvram_read_using_eeprom(tp, offset, val);
@@ -5908,6 +5921,14 @@
unsigned char vpd_data[256];
int i;
+ if (tp->tg3_flags2 & TG3_FLG2_SUN_5704) {
+ /* Sun decided not to put the necessary bits in the
+ * NVRAM of their onboard tg3 parts :(
+ */
+ strcpy(tp->board_part_number, "Sun 5704");
+ return;
+ }
+
for (i = 0; i < 256; i += 4) {
u32 tmp;
@@ -5964,6 +5985,34 @@
strcpy(tp->board_part_number, "none");
}
+#ifdef CONFIG_SPARC64
+static int __devinit tg3_is_sun_5704(struct tg3 *tp)
+{
+ struct pci_dev *pdev = tp->pdev;
+ struct pcidev_cookie *pcp = pdev->sysdata;
+
+ if (pcp != NULL) {
+ int node = pcp->prom_node;
+ u32 venid, devid;
+ int err;
+
+ err = prom_getproperty(node, "subsystem-vendor-id",
+ (char *) &venid, sizeof(venid));
+ if (err == 0 || err == -1)
+ return 0;
+ err = prom_getproperty(node, "subsystem-id",
+ (char *) &devid, sizeof(devid));
+ if (err == 0 || err == -1)
+ return 0;
+
+ if (venid == PCI_VENDOR_ID_SUN &&
+ devid == PCI_DEVICE_ID_TIGON3_5704)
+ return 1;
+ }
+ return 0;
+}
+#endif
+
static int __devinit tg3_get_invariants(struct tg3 *tp)
{
u32 misc_ctrl_reg;
@@ -5972,6 +6021,11 @@
u16 pci_cmd;
int err;
+#ifdef CONFIG_SPARC64
+ if (tg3_is_sun_5704(tp))
+ tp->tg3_flags2 |= TG3_FLG2_SUN_5704;
+#endif
+
/* If we have an AMD 762 or Intel ICH/ICH0 chipset, write
* reordering to the mailbox registers done by the host
* controller can cause major troubles. We read back from
@@ -6095,7 +6149,7 @@
err = tg3_set_power_state(tp, 0);
if (err) {
printk(KERN_ERR PFX "(%s) transition to D0 failed\n",
- tp->pdev->slot_name);
+ pci_name(tp->pdev));
return err;
}
@@ -6206,7 +6260,7 @@
err = tg3_phy_probe(tp);
if (err) {
printk(KERN_ERR PFX "(%s) phy probe failed, err %d\n",
- tp->pdev->slot_name, err);
+ pci_name(tp->pdev), err);
/* ... but do not return immediately ... */
}
@@ -6336,7 +6390,8 @@
dev->dev_addr[5] = (lo >> 0) & 0xff;
}
/* Next, try NVRAM. */
- else if (!tg3_nvram_read(tp, mac_offset + 0, &hi) &&
+ else if (!(tp->tg3_flags & TG3_FLG2_SUN_5704) &&
+ !tg3_nvram_read(tp, mac_offset + 0, &hi) &&
!tg3_nvram_read(tp, mac_offset + 4, &lo)) {
dev->dev_addr[0] = ((hi >> 16) & 0xff);
dev->dev_addr[1] = ((hi >> 24) & 0xff);
diff -Nru a/drivers/net/tg3.h b/drivers/net/tg3.h
--- a/drivers/net/tg3.h Sun Aug 3 13:14:46 2003
+++ b/drivers/net/tg3.h Sun Aug 3 13:14:46 2003
@@ -1823,6 +1823,7 @@
#define TG3_FLAG_INIT_COMPLETE 0x80000000
u32 tg3_flags2;
#define TG3_FLG2_RESTART_TIMER 0x00000001
+#define TG3_FLG2_SUN_5704 0x00000002
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
diff -Nru a/drivers/net/tlan.c b/drivers/net/tlan.c
--- a/drivers/net/tlan.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/tlan.c Sun Aug 3 13:14:45 2003
@@ -252,7 +252,7 @@
{ "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
};
-static struct pci_device_id tlan_pci_tbl[] __devinitdata = {
+static struct pci_device_id tlan_pci_tbl[] = {
{ PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
diff -Nru a/drivers/net/tokenring/3c359.c b/drivers/net/tokenring/3c359.c
--- a/drivers/net/tokenring/3c359.c Sun Aug 3 13:14:53 2003
+++ b/drivers/net/tokenring/3c359.c Sun Aug 3 13:14:53 2003
@@ -116,7 +116,7 @@
#include "3c359_microcode.h"
-static struct pci_device_id xl_pci_tbl[] __devinitdata =
+static struct pci_device_id xl_pci_tbl[] =
{
{PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
{ } /* terminate list */
@@ -1123,7 +1123,7 @@
if (macstatus & (1<<3))
printk(KERN_WARNING "eint error: Internal watchdog timer expired \n") ;
if (macstatus & (1<<2))
- printk(KERN_WARNING "aint error: Host tried to perform illegal operation \n") ;
+ printk(KERN_WARNING "aint error: Host tried to perform invalid operation \n") ;
printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ;
printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
netif_stop_queue(dev) ;
diff -Nru a/drivers/net/tokenring/abyss.c b/drivers/net/tokenring/abyss.c
--- a/drivers/net/tokenring/abyss.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/tokenring/abyss.c Sun Aug 3 13:14:46 2003
@@ -45,7 +45,7 @@
#define ABYSS_IO_EXTENT 64
-static struct pci_device_id abyss_pci_tbl[] __initdata = {
+static struct pci_device_id abyss_pci_tbl[] = {
{ PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_MK2,
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_TOKEN_RING << 8, 0x00ffffff, },
{ } /* Terminating entry */
diff -Nru a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c
--- a/drivers/net/tokenring/ibmtr.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/tokenring/ibmtr.c Sun Aug 3 13:14:50 2003
@@ -109,7 +109,8 @@
#include <linux/module.h>
-#ifdef PCMCIA
+#ifdef PCMCIA /* required for ibmtr_cs.c to build */
+#undef MODULE /* yes, really */
#undef ENABLE_PAGING
#else
#define ENABLE_PAGING 1
diff -Nru a/drivers/net/tokenring/lanstreamer.c b/drivers/net/tokenring/lanstreamer.c
--- a/drivers/net/tokenring/lanstreamer.c Sun Aug 3 13:14:53 2003
+++ b/drivers/net/tokenring/lanstreamer.c Sun Aug 3 13:14:53 2003
@@ -140,7 +140,7 @@
static char version[] = "LanStreamer.c v0.4.0 03/08/01 - Mike Sullivan\n"
" v0.5.3 11/13/02 - Kent Yoder";
-static struct pci_device_id streamer_pci_tbl[] __initdata = {
+static struct pci_device_id streamer_pci_tbl[] = {
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_TR, PCI_ANY_ID, PCI_ANY_ID,},
{} /* terminating entry */
};
diff -Nru a/drivers/net/tokenring/olympic.c b/drivers/net/tokenring/olympic.c
--- a/drivers/net/tokenring/olympic.c Sun Aug 3 13:14:51 2003
+++ b/drivers/net/tokenring/olympic.c Sun Aug 3 13:14:51 2003
@@ -171,7 +171,7 @@
static int network_monitor[OLYMPIC_MAX_ADAPTERS] = {0,};
MODULE_PARM(network_monitor, "1-" __MODULE_STRING(OLYMPIC_MAX_ADAPTERS) "i");
-static struct pci_device_id olympic_pci_tbl[] __devinitdata = {
+static struct pci_device_id olympic_pci_tbl[] = {
{PCI_VENDOR_ID_IBM,PCI_DEVICE_ID_IBM_TR_WAKE,PCI_ANY_ID,PCI_ANY_ID,},
{ } /* Terminating Entry */
};
diff -Nru a/drivers/net/tokenring/tmspci.c b/drivers/net/tokenring/tmspci.c
--- a/drivers/net/tokenring/tmspci.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/tokenring/tmspci.c Sun Aug 3 13:14:52 2003
@@ -57,7 +57,7 @@
{ {0x03, 0x01}, "3Com Token Link Velocity"},
};
-static struct pci_device_id tmspci_pci_tbl[] __initdata = {
+static struct pci_device_id tmspci_pci_tbl[] = {
{ PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_TR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
{ PCI_VENDOR_ID_TCONRAD, PCI_DEVICE_ID_TCONRAD_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
diff -Nru a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c
--- a/drivers/net/tulip/de2104x.c Sun Aug 3 13:14:51 2003
+++ b/drivers/net/tulip/de2104x.c Sun Aug 3 13:14:51 2003
@@ -329,7 +329,7 @@
static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media);
-static struct pci_device_id de_pci_tbl[] __initdata = {
+static struct pci_device_id de_pci_tbl[] = {
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_PLUS,
@@ -1600,7 +1600,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
- strcpy (info.bus_info, de->pdev->slot_name);
+ strcpy (info.bus_info, pci_name(de->pdev));
info.eedump_len = DE_EEPROM_SIZE;
info.regdump_len = DE_REGS_SIZE;
if (copy_to_user (useraddr, &info, sizeof (info)))
@@ -2048,7 +2048,7 @@
if (pdev->irq < 2) {
rc = -EIO;
printk(KERN_ERR PFX "invalid irq (%d) for pci dev %s\n",
- pdev->irq, pdev->slot_name);
+ pdev->irq, pci_name(pdev));
goto err_out_res;
}
@@ -2057,13 +2057,13 @@
if (!pciaddr) {
rc = -EIO;
printk(KERN_ERR PFX "no MMIO resource for pci dev %s\n",
- pdev->slot_name);
+ pci_name(pdev));
goto err_out_res;
}
if (pci_resource_len(pdev, 1) < DE_REGS_SIZE) {
rc = -EIO;
printk(KERN_ERR PFX "MMIO resource (%lx) too small on pci dev %s\n",
- pci_resource_len(pdev, 1), pdev->slot_name);
+ pci_resource_len(pdev, 1), pci_name(pdev));
goto err_out_res;
}
@@ -2072,7 +2072,7 @@
if (!regs) {
rc = -EIO;
printk(KERN_ERR PFX "Cannot map PCI MMIO (%lx@%lx) on pci dev %s\n",
- pci_resource_len(pdev, 1), pciaddr, pdev->slot_name);
+ pci_resource_len(pdev, 1), pciaddr, pci_name(pdev));
goto err_out_res;
}
dev->base_addr = (unsigned long) regs;
@@ -2084,7 +2084,7 @@
rc = de_reset_mac(de);
if (rc) {
printk(KERN_ERR PFX "Cannot reset MAC, pci dev %s\n",
- pdev->slot_name);
+ pci_name(pdev));
goto err_out_iomap;
}
diff -Nru a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c
--- a/drivers/net/tulip/dmfe.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/tulip/dmfe.c Sun Aug 3 13:14:52 2003
@@ -442,7 +442,7 @@
printk(KERN_INFO "%s: Davicom DM%04lx at pci%s,",
dev->name,
ent->driver_data >> 16,
- pdev->slot_name);
+ pci_name(pdev));
for (i = 0; i < 6; i++)
printk("%c%02x", i ? ':' : ' ', dev->dev_addr[i]);
printk(", irq %d.\n", dev->irq);
@@ -1019,7 +1019,7 @@
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
if (db->pdev)
- strcpy(info.bus_info, db->pdev->slot_name);
+ strcpy(info.bus_info, pci_name(db->pdev));
else
sprintf(info.bus_info, "EISA 0x%lx %d",
dev->base_addr, dev->irq);
@@ -1975,7 +1975,7 @@
-static struct pci_device_id dmfe_pci_tbl[] __devinitdata = {
+static struct pci_device_id dmfe_pci_tbl[] = {
{ 0x1282, 0x9132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_DM9132_ID },
{ 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_DM9102_ID },
{ 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_DM9100_ID },
diff -Nru a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
--- a/drivers/net/tulip/tulip_core.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/tulip/tulip_core.c Sun Aug 3 13:14:49 2003
@@ -194,7 +194,7 @@
};
-static struct pci_device_id tulip_pci_tbl[] __devinitdata = {
+static struct pci_device_id tulip_pci_tbl[] = {
{ 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
{ 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
{ 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
@@ -858,7 +858,7 @@
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, np->pdev->slot_name);
+ strcpy(info.bus_info, pci_name(np->pdev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -1172,7 +1172,7 @@
u32 csr0;
if (tulip_debug > 3)
- printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pdev->slot_name);
+ printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
tp->csr0 = csr0 = 0;
@@ -1240,7 +1240,7 @@
tp->csr0 = csr0;
if (tulip_debug > 2)
printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
- pdev->slot_name, cache, csr0);
+ pci_name(pdev), cache, csr0);
}
#endif
@@ -1365,7 +1365,7 @@
SET_NETDEV_DEV(dev, &pdev->dev);
if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
- "aborting\n", pdev->slot_name,
+ "aborting\n", pci_name(pdev),
pci_resource_len (pdev, 0),
pci_resource_start (pdev, 0));
goto err_out_free_netdev;
diff -Nru a/drivers/net/tulip/winbond-840.c b/drivers/net/tulip/winbond-840.c
--- a/drivers/net/tulip/winbond-840.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/tulip/winbond-840.c Sun Aug 3 13:14:46 2003
@@ -234,7 +234,7 @@
#define W840_FLAGS (PCI_USES_MEM | PCI_ADDR1 | PCI_USES_MASTER)
#endif
-static struct pci_device_id w840_pci_tbl[] __devinitdata = {
+static struct pci_device_id w840_pci_tbl[] = {
{ 0x1050, 0x0840, PCI_ANY_ID, 0x8153, 0, 0, 0 },
{ 0x1050, 0x0840, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
{ 0x11f6, 0x2011, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
@@ -416,7 +416,7 @@
if (pci_set_dma_mask(pdev,0xFFFFffff)) {
printk(KERN_WARNING "Winbond-840: Device %s disabled due to DMA limitations.\n",
- pdev->slot_name);
+ pci_name(pdev));
return -EIO;
}
dev = alloc_etherdev(sizeof(*np));
@@ -1465,7 +1465,7 @@
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, np->pci_dev->slot_name);
+ strcpy(info.bus_info, pci_name(np->pci_dev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/net/tulip/xircom_cb.c b/drivers/net/tulip/xircom_cb.c
--- a/drivers/net/tulip/xircom_cb.c Sun Aug 3 13:14:51 2003
+++ b/drivers/net/tulip/xircom_cb.c Sun Aug 3 13:14:51 2003
@@ -140,7 +140,7 @@
-static struct pci_device_id xircom_pci_table[] __devinitdata = {
+static struct pci_device_id xircom_pci_table[] = {
{0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,},
{0,},
};
diff -Nru a/drivers/net/tulip/xircom_tulip_cb.c b/drivers/net/tulip/xircom_tulip_cb.c
--- a/drivers/net/tulip/xircom_tulip_cb.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/tulip/xircom_tulip_cb.c Sun Aug 3 13:14:45 2003
@@ -544,7 +544,7 @@
printk(version);
#endif
- //printk(KERN_INFO "xircom_init_one(%s)\n", pdev->slot_name);
+ //printk(KERN_INFO "xircom_init_one(%s)\n", pci_name(pdev));
board_idx++;
@@ -1448,7 +1448,7 @@
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
*info.fw_version = 0;
- strcpy(info.bus_info, tp->pdev->slot_name);
+ strcpy(info.bus_info, pci_name(tp->pdev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -1654,7 +1654,7 @@
}
-static struct pci_device_id xircom_pci_table[] __devinitdata = {
+static struct pci_device_id xircom_pci_table[] = {
{ 0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, X3201_3 },
{0},
};
diff -Nru a/drivers/net/typhoon.c b/drivers/net/typhoon.c
--- a/drivers/net/typhoon.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/typhoon.c Sun Aug 3 13:14:50 2003
@@ -192,7 +192,7 @@
* bit 8 indicates if this is a (0) copper or (1) fiber card
* bits 12-16 indicate card type: (0) client and (1) server
*/
-static struct pci_device_id typhoon_pci_tbl[] __devinitdata = {
+static struct pci_device_id typhoon_pci_tbl[] = {
{ PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3CR990,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,TYPHOON_TX },
{ PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3CR990_TX_95,
@@ -1049,7 +1049,7 @@
strcpy(info->driver, DRV_MODULE_NAME);
strcpy(info->version, DRV_MODULE_VERSION);
- strcpy(info->bus_info, pci_dev->slot_name);
+ strcpy(info->bus_info, pci_name(pci_dev));
}
static inline void
@@ -2261,7 +2261,7 @@
dev = alloc_etherdev(sizeof(*tp));
if(dev == NULL) {
printk(ERR_PFX "%s: unable to alloc new net device\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -ENOMEM;
goto error_out;
}
@@ -2271,7 +2271,7 @@
err = pci_enable_device(pdev);
if(err < 0) {
printk(ERR_PFX "%s: unable to enable device\n",
- pdev->slot_name);
+ pci_name(pdev));
goto error_out_dev;
}
@@ -2284,7 +2284,7 @@
err = pci_set_dma_mask(pdev, 0xffffffffULL);
if(err < 0) {
printk(ERR_PFX "%s: No usable DMA configuration\n",
- pdev->slot_name);
+ pci_name(pdev));
goto error_out_dev;
}
@@ -2293,13 +2293,13 @@
if(!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
printk(ERR_PFX
"%s: region #1 not a PCI MMIO resource, aborting\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -ENODEV;
goto error_out_dev;
}
if(pci_resource_len(pdev, 1) < 128) {
printk(ERR_PFX "%s: Invalid PCI MMIO region size, aborting\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -ENODEV;
goto error_out_dev;
}
@@ -2307,7 +2307,7 @@
err = pci_request_regions(pdev, "typhoon");
if(err < 0) {
printk(ERR_PFX "%s: could not request regions\n",
- pdev->slot_name);
+ pci_name(pdev));
goto error_out_dev;
}
@@ -2320,7 +2320,7 @@
ioaddr = (unsigned long) ioremap(ioaddr, 128);
if(!ioaddr) {
printk(ERR_PFX "%s: cannot remap MMIO, aborting\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -EIO;
goto error_out_regions;
}
@@ -2332,7 +2332,7 @@
&shared_dma);
if(!shared) {
printk(ERR_PFX "%s: could not allocate DMA memory\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -ENOMEM;
goto error_out_remap;
}
@@ -2358,7 +2358,7 @@
* 5) Put the card to sleep.
*/
if(typhoon_reset(ioaddr, WaitSleep) < 0) {
- printk(ERR_PFX "%s: could not reset 3XP\n", pdev->slot_name);
+ printk(ERR_PFX "%s: could not reset 3XP\n", pci_name(pdev));
err = -EIO;
goto error_out_dma;
}
@@ -2367,14 +2367,14 @@
* use some common routines to initialize the card. So that those
* routines print the right name, we keep our oun pointer to the name
*/
- tp->name = pdev->slot_name;
+ tp->name = pci_name(pdev);
typhoon_init_interface(tp);
typhoon_init_rings(tp);
if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) {
printk(ERR_PFX "%s: cannot boot 3XP sleep image\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -EIO;
goto error_out_reset;
}
@@ -2382,7 +2382,7 @@
INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_READ_MAC_ADDRESS);
if(typhoon_issue_command(tp, 1, &xp_cmd, 1, &xp_resp) < 0) {
printk(ERR_PFX "%s: cannot read MAC address\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -EIO;
goto error_out_reset;
}
@@ -2392,13 +2392,13 @@
if(!is_valid_ether_addr(dev->dev_addr)) {
printk(ERR_PFX "%s: Could not obtain valid ethernet address, "
- "aborting\n", pdev->slot_name);
+ "aborting\n", pci_name(pdev));
goto error_out_reset;
}
if(typhoon_sleep(tp, 3, 0) < 0) {
printk(ERR_PFX "%s: cannot put adapter to sleep\n",
- pdev->slot_name);
+ pci_name(pdev));
err = -EIO;
goto error_out_reset;
}
diff -Nru a/drivers/net/via-rhine.c b/drivers/net/via-rhine.c
--- a/drivers/net/via-rhine.c Sun Aug 3 13:14:53 2003
+++ b/drivers/net/via-rhine.c Sun Aug 3 13:14:53 2003
@@ -401,7 +401,7 @@
CanHaveMII | HasWOL },
};
-static struct pci_device_id via_rhine_pci_tbl[] __devinitdata =
+static struct pci_device_id via_rhine_pci_tbl[] =
{
{0x1106, 0x3043, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VT86C100A},
{0x1106, 0x3065, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VT6102},
@@ -682,7 +682,7 @@
ioaddr = (long) ioremap (memaddr, io_size);
if (!ioaddr) {
printk (KERN_ERR "ioremap failed for device %s, region 0x%X @ 0x%lX\n",
- pdev->slot_name, io_size, memaddr);
+ pci_name(pdev), io_size, memaddr);
goto err_out_free_res;
}
@@ -1754,7 +1754,7 @@
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
strcpy (info.driver, DRV_NAME);
strcpy (info.version, DRV_VERSION);
- strcpy (info.bus_info, np->pdev->slot_name);
+ strcpy (info.bus_info, pci_name(np->pdev));
if (copy_to_user (useraddr, &info, sizeof (info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/net/wan/cycx_drv.c b/drivers/net/wan/cycx_drv.c
--- a/drivers/net/wan/cycx_drv.c Sun Aug 3 13:14:49 2003
+++ b/drivers/net/wan/cycx_drv.c Sun Aug 3 13:14:49 2003
@@ -142,7 +142,7 @@
/* Verify IRQ configuration options */
if (!get_option_index(cycx_2x_irq_options, hw->irq)) {
- printk(KERN_ERR "%s: IRQ %d is illegal!\n", modname, hw->irq);
+ printk(KERN_ERR "%s: IRQ %d is invalid!\n", modname, hw->irq);
return -EINVAL;
}
@@ -152,7 +152,7 @@
modname);
return -EINVAL;
} else if (!get_option_index(cyc2x_dpmbase_options, hw->dpmbase)) {
- printk(KERN_ERR "%s: memory address 0x%lX is illegal!\n",
+ printk(KERN_ERR "%s: memory address 0x%lX is invalid!\n",
modname, dpmbase);
return -EINVAL;
}
diff -Nru a/drivers/net/wan/dscc4.c b/drivers/net/wan/dscc4.c
--- a/drivers/net/wan/dscc4.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/wan/dscc4.c Sun Aug 3 13:14:46 2003
@@ -876,6 +876,8 @@
d->do_ioctl = dscc4_ioctl;
d->tx_timeout = dscc4_tx_timeout;
d->watchdog_timeo = TX_TIMEOUT;
+ SET_MODULE_OWNER(d);
+ SET_NETDEV_DEV(d, &pdev->dev);
dpriv->dev_id = i;
dpriv->pci_priv = ppriv;
@@ -888,8 +890,7 @@
printk(KERN_ERR "%s: unable to register\n", DRV_NAME);
goto err_unregister;
}
- hdlc->proto = IF_PROTO_HDLC;
- SET_MODULE_OWNER(d);
+
dscc4_init_registers(dpriv, d);
dpriv->parity = PARITY_CRC16_PR0_CCITT;
dpriv->encoding = ENCODING_NRZ;
@@ -955,8 +956,6 @@
if ((ret = hdlc_open(hdlc)))
goto err;
- MOD_INC_USE_COUNT;
-
ppriv = dpriv->pci_priv;
if ((ret = dscc4_init_ring(dev)))
@@ -1015,7 +1014,6 @@
dscc4_release_ring(dpriv);
err_out:
hdlc_close(hdlc);
- MOD_DEC_USE_COUNT;
err:
return ret;
}
@@ -1867,7 +1865,7 @@
__setup("dscc4.setup=", dscc4_setup);
-static struct pci_device_id dscc4_pci_tbl[] __devinitdata = {
+static struct pci_device_id dscc4_pci_tbl[] = {
{ PCI_VENDOR_ID_SIEMENS, PCI_DEVICE_ID_SIEMENS_DSCC4,
PCI_ANY_ID, PCI_ANY_ID, },
{ 0,}
diff -Nru a/drivers/net/wan/farsync.c b/drivers/net/wan/farsync.c
--- a/drivers/net/wan/farsync.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/wan/farsync.c Sun Aug 3 13:14:50 2003
@@ -414,7 +414,7 @@
/*
* PCI ID lookup table
*/
-static struct pci_device_id fst_pci_dev_id[] __devinitdata = {
+static struct pci_device_id fst_pci_dev_id[] = {
{ FSC_PCI_VENDOR_ID, T2P_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
FST_TYPE_T2P },
{ FSC_PCI_VENDOR_ID, T4P_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
diff -Nru a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c
--- a/drivers/net/wan/hdlc_cisco.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/wan/hdlc_cisco.c Sun Aug 3 13:14:47 2003
@@ -116,7 +116,7 @@
}
-static void cisco_rx(struct sk_buff *skb)
+static int cisco_rx(struct sk_buff *skb)
{
hdlc_device *hdlc = dev_to_hdlc(skb->dev);
hdlc_header *data = (hdlc_header*)skb->data;
@@ -131,24 +131,22 @@
data->address != CISCO_UNICAST)
goto rx_error;
- skb_pull(skb, sizeof(hdlc_header));
-
switch(ntohs(data->protocol)) {
case CISCO_SYS_INFO:
/* Packet is not needed, drop it. */
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_SUCCESS;
case CISCO_KEEPALIVE:
- if (skb->len != CISCO_PACKET_LEN &&
- skb->len != CISCO_BIG_PACKET_LEN) {
+ if (skb->len != sizeof(hdlc_header) + CISCO_PACKET_LEN &&
+ skb->len != sizeof(hdlc_header) + CISCO_BIG_PACKET_LEN) {
printk(KERN_INFO "%s: Invalid length of Cisco "
"control packet (%d bytes)\n",
hdlc_to_name(hdlc), skb->len);
goto rx_error;
}
- cisco_data = (cisco_packet*)skb->data;
+ cisco_data = (cisco_packet*)(skb->data + sizeof(hdlc_header));
switch(ntohl (cisco_data->type)) {
case CISCO_ADDR_REQ: /* Stolen from syncppp.c :-) */
@@ -173,7 +171,7 @@
addr, mask);
}
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_SUCCESS;
case CISCO_ADDR_REPLY:
printk(KERN_INFO "%s: Unexpected Cisco IP address "
@@ -199,18 +197,19 @@
}
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_SUCCESS;
} /* switch(keepalive type) */
} /* switch(protocol) */
printk(KERN_INFO "%s: Unsupported protocol %x\n", hdlc_to_name(hdlc),
data->protocol);
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_DROP;
rx_error:
hdlc->stats.rx_errors++; /* Mark error */
dev_kfree_skb_any(skb);
+ return NET_RX_DROP;
}
diff -Nru a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c
--- a/drivers/net/wan/hdlc_fr.c Sun Aug 3 13:14:51 2003
+++ b/drivers/net/wan/hdlc_fr.c Sun Aug 3 13:14:51 2003
@@ -800,7 +800,7 @@
-static void fr_rx(struct sk_buff *skb)
+static int fr_rx(struct sk_buff *skb)
{
hdlc_device *hdlc = dev_to_hdlc(skb->dev);
fr_hdr *fh = (fr_hdr*)skb->data;
@@ -826,7 +826,7 @@
hdlc->state.fr.request = 0;
hdlc->state.fr.last_poll = jiffies;
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_SUCCESS;
}
}
@@ -842,7 +842,7 @@
hdlc_to_name(hdlc), dlci);
#endif
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_DROP;
}
if (pvc->state.fecn != fh->fecn) {
@@ -862,6 +862,11 @@
}
+ if ((skb = skb_share_check(skb, GFP_ATOMIC)) == NULL) {
+ hdlc->stats.rx_dropped++;
+ return NET_RX_DROP;
+ }
+
if (data[3] == NLPID_IP) {
skb_pull(skb, 4); /* Remove 4-byte header (hdr, UI, NLPID) */
dev = pvc->main;
@@ -896,13 +901,13 @@
printk(KERN_INFO "%s: Unsupported protocol, OUI=%x "
"PID=%x\n", hdlc_to_name(hdlc), oui, pid);
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_DROP;
}
} else {
printk(KERN_INFO "%s: Unsupported protocol, NLPID=%x "
"length = %i\n", hdlc_to_name(hdlc), data[3], skb->len);
dev_kfree_skb_any(skb);
- return;
+ return NET_RX_DROP;
}
if (dev) {
@@ -913,14 +918,16 @@
stats->rx_compressed++;
skb->dev = dev;
netif_rx(skb);
- } else
+ return NET_RX_SUCCESS;
+ } else {
dev_kfree_skb_any(skb);
-
- return;
+ return NET_RX_DROP;
+ }
rx_error:
hdlc->stats.rx_errors++; /* Mark error */
dev_kfree_skb_any(skb);
+ return NET_RX_DROP;
}
diff -Nru a/drivers/net/wan/hdlc_generic.c b/drivers/net/wan/hdlc_generic.c
--- a/drivers/net/wan/hdlc_generic.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/wan/hdlc_generic.c Sun Aug 3 13:14:45 2003
@@ -33,7 +33,7 @@
#include <linux/hdlc.h>
-static const char* version = "HDLC support module revision 1.15";
+static const char* version = "HDLC support module revision 1.16";
#undef DEBUG_LINK
@@ -60,12 +60,11 @@
{
hdlc_device *hdlc = dev_to_hdlc(dev);
if (hdlc->proto.netif_rx)
- hdlc->proto.netif_rx(skb);
- else {
- hdlc->stats.rx_dropped++; /* Shouldn't happen */
- dev_kfree_skb(skb);
- }
- return 0;
+ return hdlc->proto.netif_rx(skb);
+
+ hdlc->stats.rx_dropped++; /* Shouldn't happen */
+ dev_kfree_skb(skb);
+ return NET_RX_DROP;
}
@@ -280,10 +279,11 @@
EXPORT_SYMBOL(register_hdlc_device);
EXPORT_SYMBOL(unregister_hdlc_device);
-struct packet_type hdlc_packet_type=
+static struct packet_type hdlc_packet_type =
{
.type = __constant_htons(ETH_P_HDLC),
.func = hdlc_rcv,
+ .data = (void *)1,
};
diff -Nru a/drivers/net/wan/hdlc_x25.c b/drivers/net/wan/hdlc_x25.c
--- a/drivers/net/wan/hdlc_x25.c Sun Aug 3 13:14:53 2003
+++ b/drivers/net/wan/hdlc_x25.c Sun Aug 3 13:14:53 2003
@@ -164,14 +164,21 @@
-static void x25_rx(struct sk_buff *skb)
+static int x25_rx(struct sk_buff *skb)
{
hdlc_device *hdlc = dev_to_hdlc(skb->dev);
+ if ((skb = skb_share_check(skb, GFP_ATOMIC)) == NULL) {
+ hdlc->stats.rx_dropped++;
+ return NET_RX_DROP;
+ }
+
if (lapb_data_received(hdlc, skb) == LAPB_OK)
- return;
+ return NET_RX_SUCCESS;
+
hdlc->stats.rx_errors++;
dev_kfree_skb_any(skb);
+ return NET_RX_DROP;
}
diff -Nru a/drivers/net/wan/lmc/lmc_main.c b/drivers/net/wan/lmc/lmc_main.c
--- a/drivers/net/wan/lmc/lmc_main.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/wan/lmc/lmc_main.c Sun Aug 3 13:14:47 2003
@@ -88,7 +88,7 @@
int LMC_PKT_BUF_SZ = 1542;
#ifdef MODULE
-static struct pci_device_id lmc_pci_tbl[] __devinitdata = {
+static struct pci_device_id lmc_pci_tbl[] = {
{ 0x1011, 0x009, 0x1379, PCI_ANY_ID, 0, 0, 0},
{ 0, }
};
diff -Nru a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c
--- a/drivers/net/wan/pc300_drv.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/wan/pc300_drv.c Sun Aug 3 13:14:52 2003
@@ -253,7 +253,7 @@
#undef PC300_DEBUG_RX
#undef PC300_DEBUG_OTHER
-static struct pci_device_id cpc_pci_dev_id[] __devinitdata = {
+static struct pci_device_id cpc_pci_dev_id[] = {
/* PC300/RSV or PC300/X21, 2 chan */
{0x120e, 0x300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x300},
/* PC300/RSV or PC300/X21, 1 chan */
@@ -2554,10 +2554,10 @@
case SIOCGPC300CONF:
#ifdef CONFIG_PC300_MLPPP
if (conf->proto != PC300_PROTO_MLPPP) {
- conf->proto = hdlc->proto;
+ conf->proto = hdlc->proto.id;
}
#else
- conf->proto = hdlc->proto;
+ conf->proto = hdlc->proto.id;
#endif
memcpy(&conf_aux.conf, conf, sizeof(pc300chconf_t));
memcpy(&conf_aux.hw, &card->hw, sizeof(pc300hw_t));
@@ -2590,12 +2590,12 @@
}
} else {
memcpy(conf, &conf_aux.conf, sizeof(pc300chconf_t));
- hdlc->proto = conf->proto;
+ hdlc->proto.id = conf->proto;
}
}
#else
memcpy(conf, &conf_aux.conf, sizeof(pc300chconf_t));
- hdlc->proto = conf->proto;
+ hdlc->proto.id = conf->proto;
#endif
return 0;
case SIOCGPC300STATUS:
@@ -3153,12 +3153,12 @@
printk("pc300: cpc_open");
#endif
- if (hdlc->proto == IF_PROTO_PPP) {
+ if (hdlc->proto.id == IF_PROTO_PPP) {
d->if_ptr = &hdlc->state.ppp.pppdev;
}
result = hdlc_open(hdlc);
- if (hdlc->proto == IF_PROTO_PPP) {
+ if (hdlc->proto.id == IF_PROTO_PPP) {
dev->priv = d;
}
if (result) {
@@ -3191,7 +3191,7 @@
CPC_UNLOCK(card, flags);
hdlc_close(hdlc);
- if (hdlc->proto == IF_PROTO_PPP) {
+ if (hdlc->proto.id == IF_PROTO_PPP) {
d->if_ptr = NULL;
}
#ifdef CONFIG_PC300_MLPPP
diff -Nru a/drivers/net/wan/sdladrv.c b/drivers/net/wan/sdladrv.c
--- a/drivers/net/wan/sdladrv.c Sun Aug 3 13:14:46 2003
+++ b/drivers/net/wan/sdladrv.c Sun Aug 3 13:14:46 2003
@@ -428,7 +428,7 @@
/* Verify IRQ configuration options */
if (!get_option_index(irq_opt, hw->irq)) {
- printk(KERN_INFO "%s: IRQ %d is illegal!\n",
+ printk(KERN_INFO "%s: IRQ %d is invalid!\n",
modname, hw->irq);
return -EINVAL;
}
@@ -438,7 +438,7 @@
hw->pclk = pclk_opt[1]; /* use default */
else if (!get_option_index(pclk_opt, hw->pclk)) {
- printk(KERN_INFO "%s: CPU clock %u is illegal!\n",
+ printk(KERN_INFO "%s: CPU clock %u is invalid!\n",
modname, hw->pclk);
return -EINVAL;
}
@@ -458,7 +458,7 @@
else if (!get_option_index(dpmbase_opt,
virt_to_phys(hw->dpmbase))) {
printk(KERN_INFO
- "%s: memory address 0x%lX is illegal!\n",
+ "%s: memory address 0x%lX is invalid!\n",
modname, virt_to_phys(hw->dpmbase));
return -EINVAL;
}
diff -Nru a/drivers/net/wan/z85230.c b/drivers/net/wan/z85230.c
--- a/drivers/net/wan/z85230.c Sun Aug 3 13:14:44 2003
+++ b/drivers/net/wan/z85230.c Sun Aug 3 13:14:44 2003
@@ -890,12 +890,12 @@
if(c->mtu > PAGE_SIZE/2)
return -EMSGSIZE;
- c->rx_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA);
+ c->rx_buf[0]=(void *)get_free_page(GFP_KERNEL|GFP_DMA);
if(c->rx_buf[0]==NULL)
return -ENOBUFS;
c->rx_buf[1]=c->rx_buf[0]+PAGE_SIZE/2;
- c->tx_dma_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA);
+ c->tx_dma_buf[0]=(void *)get_free_page(GFP_KERNEL|GFP_DMA);
if(c->tx_dma_buf[0]==NULL)
{
free_page((unsigned long)c->rx_buf[0]);
@@ -1080,7 +1080,7 @@
if(c->mtu > PAGE_SIZE/2)
return -EMSGSIZE;
- c->tx_dma_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA);
+ c->tx_dma_buf[0]=(void *)get_free_page(GFP_KERNEL|GFP_DMA);
if(c->tx_dma_buf[0]==NULL)
return -ENOBUFS;
@@ -1261,7 +1261,6 @@
dev->chanB.dcdcheck=DCD;
/* Set up the chip level lock */
- spin_lock_init(&dev->lock);
dev->chanA.lock = &dev->lock;
dev->chanB.lock = &dev->lock;
@@ -1452,7 +1451,6 @@
c->tx_next_skb=NULL;
c->tx_ptr=c->tx_next_ptr;
- netif_wake_queue(c->netdevice);
if(c->tx_skb==NULL)
{
/* Idle on */
@@ -1514,7 +1512,6 @@
/* ABUNDER off */
write_zsreg(c, R10, c->regs[10]);
write_zsctrl(c, RES_Tx_CRC);
-//??? write_zsctrl(c, RES_EOM_L);
while(c->txcount && (read_zsreg(c,R0)&Tx_BUF_EMP))
{
@@ -1524,6 +1521,10 @@
}
}
+ /*
+ * Since we emptied tx_skb we can ask for more
+ */
+ netif_wake_queue(c->netdevice);
}
/**
@@ -1541,7 +1542,6 @@
{
struct sk_buff *skb;
- netif_wake_queue(c->netdevice);
/* Actually this can happen.*/
if(c->tx_skb==NULL)
return;
@@ -1635,7 +1635,7 @@
write_zsreg(c, R0, RES_Rx_CRC);
}
else
- /* Can't occur as we don't reenable the DMA irq until
+ /* Can't occur as we dont reenable the DMA irq until
after the flip is done */
printk(KERN_WARNING "%s: DMA flip overrun!\n", c->netdevice->name);
@@ -1796,7 +1796,6 @@
z8530_tx_begin(c);
spin_unlock_irqrestore(c->lock, flags);
- netif_wake_queue(c->netdevice);
return 0;
}
diff -Nru a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
--- a/drivers/net/wireless/airo.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/wireless/airo.c Sun Aug 3 13:14:45 2003
@@ -47,7 +47,7 @@
#include <asm/uaccess.h>
#ifdef CONFIG_PCI
-static struct pci_device_id card_ids[] __devinitdata = {
+static struct pci_device_id card_ids[] = {
{ 0x14b9, 1, PCI_ANY_ID, PCI_ANY_ID, },
{ 0x14b9, 0x4500, PCI_ANY_ID, PCI_ANY_ID },
{ 0x14b9, 0x4800, PCI_ANY_ID, PCI_ANY_ID, },
@@ -1021,6 +1021,8 @@
#define FLAG_UPDATE_MULTI 0x40
#define FLAG_UPDATE_UNI 0x80
#define FLAG_802_11 0x200
+#define FLAG_PENDING_XMIT 0x400
+#define FLAG_PENDING_XMIT11 0x800
int (*bap_read)(struct airo_info*, u16 *pu16Dst, int bytelen,
int whichbap);
unsigned short *flash;
@@ -1345,6 +1347,7 @@
u32 *fids = priv->fids;
if (down_trylock(&priv->sem) != 0) {
+ priv->flags |= FLAG_PENDING_XMIT;
netif_stop_queue(dev);
priv->xmit.task.func = (void (*)(void *))airo_do_xmit;
priv->xmit.task.data = (void *)dev;
@@ -1353,6 +1356,7 @@
}
status = transmit_802_3_packet (priv, fids[fid], skb->data);
up(&priv->sem);
+ priv->flags &= ~FLAG_PENDING_XMIT;
i = 0;
if ( status == SUCCESS ) {
@@ -1364,14 +1368,12 @@
}
if (i < MAX_FIDS / 2)
netif_wake_queue(dev);
- else
- netif_stop_queue(dev);
dev_kfree_skb(skb);
}
static int airo_start_xmit(struct sk_buff *skb, struct net_device *dev) {
s16 len;
- int i;
+ int i, j;
struct airo_info *priv = dev->priv;
u32 *fids = priv->fids;
@@ -1382,19 +1384,23 @@
/* Find a vacant FID */
for( i = 0; i < MAX_FIDS / 2 && (fids[i] & 0xffff0000); i++ );
+ for( j = i + 1; j < MAX_FIDS / 2 && (fids[j] & 0xffff0000); j++ );
- if ( i == MAX_FIDS / 2 ) {
- priv->stats.tx_fifo_errors++;
- dev_kfree_skb(skb);
- } else {
- /* check min length*/
- len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
- /* Mark fid as used & save length for later */
- fids[i] |= (len << 16);
- priv->xmit.skb = skb;
- priv->xmit.fid = i;
- airo_do_xmit(dev);
+ if ( j >= MAX_FIDS / 2 ) {
+ netif_stop_queue(dev);
+
+ if (i == MAX_FIDS / 2) {
+ priv->stats.tx_fifo_errors++;
+ return 1;
+ }
}
+ /* check min length*/
+ len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
+ /* Mark fid as used & save length for later */
+ fids[i] |= (len << 16);
+ priv->xmit.skb = skb;
+ priv->xmit.fid = i;
+ airo_do_xmit(dev);
return 0;
}
@@ -1407,6 +1413,7 @@
u32 *fids = priv->fids;
if (down_trylock(&priv->sem) != 0) {
+ priv->flags |= FLAG_PENDING_XMIT11;
netif_stop_queue(dev);
priv->xmit11.task.func = (void (*)(void *))airo_do_xmit11;
priv->xmit11.task.data = (void *)dev;
@@ -1415,6 +1422,7 @@
}
status = transmit_802_11_packet (priv, fids[fid], skb->data);
up(&priv->sem);
+ priv->flags &= ~FLAG_PENDING_XMIT11;
i = MAX_FIDS / 2;
if ( status == SUCCESS ) {
@@ -1426,14 +1434,12 @@
}
if (i < MAX_FIDS)
netif_wake_queue(dev);
- else
- netif_stop_queue(dev);
dev_kfree_skb(skb);
}
static int airo_start_xmit11(struct sk_buff *skb, struct net_device *dev) {
s16 len;
- int i;
+ int i, j;
struct airo_info *priv = dev->priv;
u32 *fids = priv->fids;
@@ -1444,19 +1450,23 @@
/* Find a vacant FID */
for( i = MAX_FIDS / 2; i < MAX_FIDS && (fids[i] & 0xffff0000); i++ );
+ for( j = i + 1; j < MAX_FIDS && (fids[j] & 0xffff0000); j++ );
- if ( i == MAX_FIDS ) {
- priv->stats.tx_fifo_errors++;
- dev_kfree_skb(skb);
- } else {
- /* check min length*/
- len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
- /* Mark fid as used & save length for later */
- fids[i] |= (len << 16);
- priv->xmit11.skb = skb;
- priv->xmit11.fid = i;
- airo_do_xmit11(dev);
+ if ( j >= MAX_FIDS ) {
+ netif_stop_queue(dev);
+
+ if (i == MAX_FIDS) {
+ priv->stats.tx_fifo_errors++;
+ return 1;
+ }
}
+ /* check min length*/
+ len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
+ /* Mark fid as used & save length for later */
+ fids[i] |= (len << 16);
+ priv->xmit11.skb = skb;
+ priv->xmit11.fid = i;
+ airo_do_xmit11(dev);
return 0;
}
@@ -1593,6 +1603,8 @@
{
struct airo_info *ai = dev->priv;
flush_scheduled_work();
+ disable_interrupts(ai);
+ free_irq( dev->irq, dev );
if (ai->flash)
kfree(ai->flash);
if (ai->rssi)
@@ -1607,8 +1619,6 @@
}
ai->registered = 0;
}
- disable_interrupts(ai);
- free_irq( dev->irq, dev );
if (auto_wep) del_timer_sync(&ai->timer);
if (freeres) {
/* PCMCIA frees this stuff, so only for PCI and ISA */
@@ -2188,7 +2198,13 @@
OUT4500( apriv, EVACK, status & (EV_TX | EV_TXEXC));
/* Set up to be used again */
apriv->fids[index] &= 0xffff;
- netif_wake_queue(dev);
+ if (index < MAX_FIDS / 2) {
+ if (!(apriv->flags & FLAG_PENDING_XMIT))
+ netif_wake_queue(dev);
+ } else {
+ if (!(apriv->flags & FLAG_PENDING_XMIT11))
+ netif_wake_queue(apriv->wifidev);
+ }
} else {
OUT4500( apriv, EVACK, status & (EV_TX | EV_TXEXC));
printk( KERN_ERR "airo: Unallocated FID was used to xmit\n" );
@@ -2710,6 +2726,7 @@
one for now. */
static u16 transmit_allocate(struct airo_info *ai, int lenPayload, int raw)
{
+ unsigned int loop = 3000;
Cmd cmd;
Resp rsp;
u16 txFid;
@@ -2730,7 +2747,12 @@
/* wait for the allocate event/indication
* It makes me kind of nervous that this can just sit here and spin,
* but in practice it only loops like four times. */
- while ( (IN4500(ai, EVSTAT) & EV_ALLOC) == 0) ;
+ while (((IN4500(ai, EVSTAT) & EV_ALLOC) == 0) && --loop);
+ if (!loop) {
+ txFid = ERROR;
+ goto done;
+ }
+
// get the allocated fid and acknowledge
txFid = IN4500(ai, TXALLOCFID);
OUT4500(ai, EVACK, EV_ALLOC);
@@ -3288,15 +3310,18 @@
ai->config.rmode &= 0xfe00;
ai->flags &= ~FLAG_802_11;
ai->config.opmode &= 0xFF00;
+ ai->config.scanMode = SCANMODE_ACTIVE;
if ( line[0] == 'a' ) {
ai->config.opmode |= 0;
} else {
ai->config.opmode |= 1;
if ( line[0] == 'r' ) {
ai->config.rmode |= RXMODE_RFMON | RXMODE_DISABLE_802_3_HEADER;
+ ai->config.scanMode = SCANMODE_PASSIVE;
ai->flags |= FLAG_802_11;
} else if ( line[0] == 'y' ) {
ai->config.rmode |= RXMODE_RFMON_ANYBSS | RXMODE_DISABLE_802_3_HEADER;
+ ai->config.scanMode = SCANMODE_PASSIVE;
ai->flags |= FLAG_802_11;
} else if ( line[0] == 'l' )
ai->config.rmode |= RXMODE_LANMON;
@@ -4571,24 +4596,28 @@
local->config.opmode &= 0xFF00;
local->config.opmode |= MODE_STA_IBSS;
local->config.rmode &= 0xfe00;
+ local->config.scanMode = SCANMODE_ACTIVE;
local->flags &= ~FLAG_802_11;
break;
case IW_MODE_INFRA:
local->config.opmode &= 0xFF00;
local->config.opmode |= MODE_STA_ESS;
local->config.rmode &= 0xfe00;
+ local->config.scanMode = SCANMODE_ACTIVE;
local->flags &= ~FLAG_802_11;
break;
case IW_MODE_MASTER:
local->config.opmode &= 0xFF00;
local->config.opmode |= MODE_AP;
local->config.rmode &= 0xfe00;
+ local->config.scanMode = SCANMODE_ACTIVE;
local->flags &= ~FLAG_802_11;
break;
case IW_MODE_REPEAT:
local->config.opmode &= 0xFF00;
local->config.opmode |= MODE_AP_RPTR;
local->config.rmode &= 0xfe00;
+ local->config.scanMode = SCANMODE_ACTIVE;
local->flags &= ~FLAG_802_11;
break;
case IW_MODE_MONITOR:
@@ -4596,6 +4625,7 @@
local->config.opmode |= MODE_STA_ESS;
local->config.rmode &= 0xfe00;
local->config.rmode |= RXMODE_RFMON | RXMODE_DISABLE_802_3_HEADER;
+ local->config.scanMode = SCANMODE_PASSIVE;
local->flags |= FLAG_802_11;
break;
default:
@@ -5952,7 +5982,6 @@
*
* TODO :
* o Check if work in Ad-Hoc mode (otherwise, use SPY, as in wvlan_cs)
- * o Find the noise level
*
* Jean
*/
@@ -5976,8 +6005,13 @@
local->wstats.qual.level = 0x100 - local->rssi[status_rid.sigQuality].rssidBm;
else
local->wstats.qual.level = (status_rid.normalizedSignalStrength + 321) / 2;
- local->wstats.qual.noise = 0;
- local->wstats.qual.updated = 3;
+ if (status_rid.len >= 124) {
+ local->wstats.qual.noise = 256 - status_rid.noisedBm;
+ local->wstats.qual.updated = 7;
+ } else {
+ local->wstats.qual.noise = 0;
+ local->wstats.qual.updated = 3;
+ }
/* Packets discarded in the wireless adapter due to wireless
* specific problems */
diff -Nru a/drivers/net/wireless/orinoco_pci.c b/drivers/net/wireless/orinoco_pci.c
--- a/drivers/net/wireless/orinoco_pci.c Sun Aug 3 13:14:50 2003
+++ b/drivers/net/wireless/orinoco_pci.c Sun Aug 3 13:14:50 2003
@@ -223,7 +223,7 @@
printk(KERN_DEBUG
"Detected Orinoco/Prism2 PCI device at %s, mem:0x%lX to 0x%lX -> 0x%p, irq:%d\n",
- pdev->slot_name, dev->mem_start, dev->mem_end, pci_ioaddr, pdev->irq);
+ pci_name(pdev), dev->mem_start, dev->mem_end, pci_ioaddr, pdev->irq);
hermes_struct_init(&priv->hw, dev->base_addr,
HERMES_MEM, HERMES_32BIT_REGSPACING);
@@ -359,7 +359,7 @@
return 0;
}
-static struct pci_device_id orinoco_pci_pci_id_table[] __devinitdata = {
+static struct pci_device_id orinoco_pci_pci_id_table[] = {
{0x1260, 0x3873, PCI_ANY_ID, PCI_ANY_ID,},
{0,},
};
diff -Nru a/drivers/net/wireless/orinoco_plx.c b/drivers/net/wireless/orinoco_plx.c
--- a/drivers/net/wireless/orinoco_plx.c Sun Aug 3 13:14:52 2003
+++ b/drivers/net/wireless/orinoco_plx.c Sun Aug 3 13:14:52 2003
@@ -236,7 +236,7 @@
printk(KERN_DEBUG
"Detected Orinoco/Prism2 PLX device at %s irq:%d, io addr:0x%lx\n",
- pdev->slot_name, pdev->irq, pccard_ioaddr);
+ pci_name(pdev), pdev->irq, pccard_ioaddr);
hermes_struct_init(&(priv->hw), dev->base_addr,
HERMES_IO, HERMES_16BIT_REGSPACING);
@@ -299,7 +299,7 @@
}
-static struct pci_device_id orinoco_plx_pci_id_table[] __devinitdata = {
+static struct pci_device_id orinoco_plx_pci_id_table[] = {
{0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */
{0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */
{0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */
diff -Nru a/drivers/net/wireless/orinoco_tmd.c b/drivers/net/wireless/orinoco_tmd.c
--- a/drivers/net/wireless/orinoco_tmd.c Sun Aug 3 13:14:45 2003
+++ b/drivers/net/wireless/orinoco_tmd.c Sun Aug 3 13:14:45 2003
@@ -128,7 +128,7 @@
printk(KERN_DEBUG
"Detected Orinoco/Prism2 TMD device at %s irq:%d, io addr:0x%lx\n",
- pdev->slot_name, pdev->irq, pccard_ioaddr);
+ pci_name(pdev), pdev->irq, pccard_ioaddr);
hermes_struct_init(&(priv->hw), dev->base_addr,
HERMES_IO, HERMES_16BIT_REGSPACING);
@@ -190,7 +190,7 @@
}
-static struct pci_device_id orinoco_tmd_pci_id_table[] __devinitdata = {
+static struct pci_device_id orinoco_tmd_pci_id_table[] = {
{0x15e8, 0x0131, PCI_ANY_ID, PCI_ANY_ID,}, /* NDC and OEMs, e.g. pheecom */
{0,},
};
diff -Nru a/drivers/net/yellowfin.c b/drivers/net/yellowfin.c
--- a/drivers/net/yellowfin.c Sun Aug 3 13:14:47 2003
+++ b/drivers/net/yellowfin.c Sun Aug 3 13:14:47 2003
@@ -295,7 +295,7 @@
{0,},
};
-static struct pci_device_id yellowfin_pci_tbl[] __devinitdata = {
+static struct pci_device_id yellowfin_pci_tbl[] = {
{ 0x1000, 0x0702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0x1000, 0x0701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
{ 0, }
@@ -1413,7 +1413,7 @@
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
strcpy(info.driver, DRV_NAME);
strcpy(info.version, DRV_VERSION);
- strcpy(info.bus_info, np->pci_dev->slot_name);
+ strcpy(info.bus_info, pci_name(np->pci_dev));
if (copy_to_user(useraddr, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c
--- a/drivers/parisc/eisa.c Sun Aug 3 13:14:44 2003
+++ b/drivers/parisc/eisa.c Sun Aug 3 13:14:44 2003
@@ -398,7 +398,7 @@
return 0;
}
-static struct parisc_device_id __devinitdata eisa_tbl[] = {
+static struct parisc_device_id eisa_tbl[] = {
{ HPHW_BA, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x00076 }, /* Mongoose */
{ HPHW_BA, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x00090 }, /* Wax EISA */
{ 0, }
diff -Nru a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
--- a/drivers/parisc/lba_pci.c Sun Aug 3 13:14:50 2003
+++ b/drivers/parisc/lba_pci.c Sun Aug 3 13:14:50 2003
@@ -670,7 +670,7 @@
if (dev->resource[i].flags & srch_flags) {
pci_claim_resource(dev, i);
DBG(" claimed %s %d [%lx,%lx]/%x\n",
- dev->slot_name, i,
+ pci_name(dev), i,
dev->resource[i].start,
dev->resource[i].end,
(int) dev->resource[i].flags
diff -Nru a/drivers/parisc/superio.c b/drivers/parisc/superio.c
--- a/drivers/parisc/superio.c Sun Aug 3 13:14:50 2003
+++ b/drivers/parisc/superio.c Sun Aug 3 13:14:50 2003
@@ -160,7 +160,7 @@
}
printk (KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
- pdev->slot_name,sio->iosapic_irq);
+ pci_name(pdev),sio->iosapic_irq);
/* Find our I/O devices */
pci_read_config_word (pdev, SIO_SP1BAR, &sio->sp1_base);
@@ -346,7 +346,7 @@
return -1;
}
printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
- pcidev->slot_name,
+ pci_name(pcidev),
pcidev->vendor, pcidev->device,
__builtin_return_address(0));
#endif
@@ -487,7 +487,7 @@
{
#ifdef DEBUG_INIT
printk("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
- dev->slot_name,
+ pci_name(dev),
dev->vendor, dev->device,
dev->subsystem_vendor, dev->subsystem_device,
dev->class);
@@ -517,7 +517,7 @@
}
}
-static struct pci_device_id superio_tbl[] __devinitdata = {
+static struct pci_device_id superio_tbl[] = {
{ PCI_VENDOR_ID_NS, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0, }
};
diff -Nru a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c
--- a/drivers/parport/parport_pc.c Sun Aug 3 13:14:52 2003
+++ b/drivers/parport/parport_pc.c Sun Aug 3 13:14:52 2003
@@ -2825,7 +2825,7 @@
/* mobility_pp */ { 1, { { 0, 1 }, } },
};
-static struct pci_device_id parport_pc_pci_tbl[] __devinitdata = {
+static struct pci_device_id parport_pc_pci_tbl[] = {
/* Super-IO onboard chips */
{ 0x1106, 0x0686, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_686a },
{ PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8872,
diff -Nru a/drivers/parport/parport_serial.c b/drivers/parport/parport_serial.c
--- a/drivers/parport/parport_serial.c Sun Aug 3 13:14:52 2003
+++ b/drivers/parport/parport_serial.c Sun Aug 3 13:14:52 2003
@@ -87,7 +87,7 @@
/* siig_2s1p_20x */ { 1, { { 2, 3 }, } },
};
-static struct pci_device_id parport_serial_pci_tbl[] __devinitdata = {
+static struct pci_device_id parport_serial_pci_tbl[] = {
/* PCI cards */
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
diff -Nru a/drivers/pci/hotplug/cpcihp_zt5550.c b/drivers/pci/hotplug/cpcihp_zt5550.c
--- a/drivers/pci/hotplug/cpcihp_zt5550.c Sun Aug 3 13:14:49 2003
+++ b/drivers/pci/hotplug/cpcihp_zt5550.c Sun Aug 3 13:14:49 2003
@@ -187,8 +187,7 @@
return 0;
}
-static int __devinit zt5550_hc_init_one (struct pci_dev *pdev,
- const struct pci_device_id *ent)
+static int zt5550_hc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
int status;
@@ -262,7 +261,7 @@
}
-static struct pci_device_id zt5550_hc_pci_tbl[] __devinitdata = {
+static struct pci_device_id zt5550_hc_pci_tbl[] = {
{ PCI_VENDOR_ID_ZIATECH, PCI_DEVICE_ID_ZIATECH_5550_HC, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, }
};
diff -Nru a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
--- a/drivers/pci/hotplug/cpqphp_core.c Sun Aug 3 13:14:44 2003
+++ b/drivers/pci/hotplug/cpqphp_core.c Sun Aug 3 13:14:44 2003
@@ -1488,7 +1488,7 @@
-static struct pci_device_id hpcd_pci_tbl[] __devinitdata = {
+static struct pci_device_id hpcd_pci_tbl[] = {
{
/* handle any PCI Hotplug controller */
.class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
diff -Nru a/drivers/pci/hotplug/ibmphp_ebda.c b/drivers/pci/hotplug/ibmphp_ebda.c
--- a/drivers/pci/hotplug/ibmphp_ebda.c Sun Aug 3 13:14:46 2003
+++ b/drivers/pci/hotplug/ibmphp_ebda.c Sun Aug 3 13:14:46 2003
@@ -1230,7 +1230,7 @@
}
}
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{
.vendor = PCI_VENDOR_ID_IBM,
.device = HPC_DEVICE_ID,
diff -Nru a/drivers/pci/pci.ids b/drivers/pci/pci.ids
--- a/drivers/pci/pci.ids Sun Aug 3 13:14:48 2003
+++ b/drivers/pci/pci.ids Sun Aug 3 13:14:48 2003
@@ -2190,6 +2190,9 @@
1006 MINI PCI type 3B Data Fax Modem
1007 Mini PCI 56k Winmodem
10b7 615c Mini PCI 56K Modem
+ 1700 Gigabit Ethernet Adapter
+ 10b7 0010 3Com 3C940 Gigabit LOM Ethernet Adapter
+ 10b7 0020 3Com 3C941 Gigabit LOM Ethernet Adapter
3390 3c339 TokenLink Velocity
3590 3c359 TokenLink Velocity XL
10b7 3590 TokenLink Velocity XL Adapter (3C359/359B)
@@ -3205,15 +3208,44 @@
1148 5843 FDDI SK-5843 (SK-NET FDDI-LP64)
1148 5844 FDDI SK-5844 (SK-NET FDDI-LP64 DAS)
4200 Token Ring adapter
- 4300 Gigabit Ethernet
- 1148 9821 SK-9821 (1000Base-T single link)
- 1148 9822 SK-9822 (1000Base-T dual link)
- 1148 9841 SK-9841 (1000Base-LX single link)
- 1148 9842 SK-9842 (1000Base-LX dual link)
- 1148 9843 SK-9843 (1000Base-SX single link)
- 1148 9844 SK-9844 (1000Base-SX dual link)
- 1148 9861 SK-9861 (1000Base-SX VF45 single link)
- 1148 9862 SK-9862 (1000Base-SX VF45 dual link)
+ 4300 SK-98xx Gigabit Ethernet Server Adapter
+ 1148 9821 SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
+ 1148 9822 SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
+ 1148 9841 SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
+ 1148 9842 SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
+ 1148 9843 SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
+ 1148 9844 SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
+ 1148 9861 SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
+ 1148 9862 SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
+ 1148 9871 SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
+ 1148 9872 SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
+ 1259 2970 Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
+ 1259 2971 Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
+ 1259 2972 Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
+ 1259 2973 Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
+ 1259 2974 Allied Telesyn AT-2971T Gigabit Ethernet Adapter
+ 1259 2975 Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
+ 1259 2976 Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
+ 1259 2977 Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
+ 4320 SK-98xx V2.0 Gigabit Ethernet Adapter
+ 1148 0121 Marvell RDK-8001 Adapter
+ 1148 0221 Marvell RDK-8002 Adapter
+ 1148 0321 Marvell RDK-8003 Adapter
+ 1148 0421 Marvell RDK-8004 Adapter
+ 1148 0621 Marvell RDK-8006 Adapter
+ 1148 0721 Marvell RDK-8007 Adapter
+ 1148 0821 Marvell RDK-8008 Adapter
+ 1148 0921 Marvell RDK-8009 Adapter
+ 1148 1121 Marvell RDK-8011 Adapter
+ 1148 1221 Marvell RDK-8012 Adapter
+ 1148 3221 SK-9521 V2.0 10/100/1000Base-T Adapter
+ 1148 5021 SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
+ 1148 5041 SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
+ 1148 5043 SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ 1148 5051 SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ 1148 5061 SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ 1148 5071 SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
+ 1148 9521 SK-9521 10/100/1000Base-T Adapter
4400 Gigabit Ethernet
1149 Win System Corporation
114a VMIC
@@ -3426,6 +3458,8 @@
1340 DFE-690TXD CardBus PC Card
1561 DRP-32TXD Cardbus PC Card
4000 DL2K Ethernet
+ 4c00 Gigabit Ethernet Adapter
+ 1186 4c00 DGE-530T Gigabit Ethernet Adapter
1187 Advanced Technology Laboratories, Inc.
1188 Shima Seiki Manufacturing Ltd.
1189 Matsushita Electronics Co Ltd
@@ -3503,6 +3537,8 @@
11aa Actel
11ab Galileo Technology Ltd.
0146 GT-64010/64010A System Controller
+ 4320 Gigabit Ethernet Adapter
+ 11ab 9521 Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter
4611 GT-64115 System Controller
4620 GT-64120/64120A/64121A System Controller
4801 GT-48001
@@ -4720,6 +4756,8 @@
136f Applied Magic Inc
1370 ATL Products
1371 CNet Technology Inc
+ 434e GigaCard Network Adapter
+ 1371 434e N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
1373 Silicon Vision Inc
1374 Silicom Ltd
1375 Argosystems Inc
@@ -5830,6 +5868,10 @@
170c YottaYotta Inc.
172a Accelerated Encryption
1737 Linksys
+ 1032 Gigabit Network Adapter
+ 1737 0015 EG1032 v2 Instant Gigabit Network Adapter
+ 1064 Gigabit Network Adapter
+ 1737 0016 EG1064 v2 Instant Gigabit Network Adapter
173b Altima (nee Broadcom)
03e8 AC1000 Gigabit Ethernet
03e9 AC1001 Gigabit Ethernet
diff -Nru a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c
--- a/drivers/pcmcia/cs.c Sun Aug 3 13:14:46 2003
+++ b/drivers/pcmcia/cs.c Sun Aug 3 13:14:46 2003
@@ -120,7 +120,7 @@
/*====================================================================*/
socket_state_t dead_socket = {
- 0, SS_DETECT, 0, 0, 0
+ .csc_mask = SS_DETECT,
};
@@ -1958,6 +1958,9 @@
irq = req->IRQInfo1 & IRQ_MASK;
ret = try_irq(req->Attributes, irq, 1);
}
+#else
+ } else {
+ ret = CS_UNSUPPORTED_MODE;
#endif
}
if (ret != 0) return ret;
diff -Nru a/drivers/pcmcia/i82092.c b/drivers/pcmcia/i82092.c
--- a/drivers/pcmcia/i82092.c Sun Aug 3 13:14:53 2003
+++ b/drivers/pcmcia/i82092.c Sun Aug 3 13:14:53 2003
@@ -44,7 +44,7 @@
static int i82092aa_socket_suspend (struct pci_dev *dev, u32 state)
{
- return pcmcia_socket_dev_suspend(&dev->dev, state, 0);
+ return pcmcia_socket_dev_suspend(&dev->dev, state, SUSPEND_SAVE_STATE);
}
static int i82092aa_socket_resume (struct pci_dev *dev)
diff -Nru a/drivers/pcmcia/rsrc_mgr.c b/drivers/pcmcia/rsrc_mgr.c
--- a/drivers/pcmcia/rsrc_mgr.c Sun Aug 3 13:14:49 2003
+++ b/drivers/pcmcia/rsrc_mgr.c Sun Aug 3 13:14:49 2003
@@ -77,10 +77,14 @@
} resource_map_t;
/* Memory resource database */
-static resource_map_t mem_db = { 0, 0, &mem_db };
+static resource_map_t mem_db = {
+ .next = &mem_db,
+};
/* IO port resource database */
-static resource_map_t io_db = { 0, 0, &io_db };
+static resource_map_t io_db = {
+ .next = &io_db,
+};
static DECLARE_MUTEX(rsrc_sem);
@@ -93,7 +97,7 @@
} irq_info_t;
/* Table of IRQ assignments */
-static irq_info_t irq_table[NR_IRQS] = { { 0, 0, 0 }, /* etc */ };
+static irq_info_t irq_table[NR_IRQS];
#endif
diff -Nru a/drivers/pcmcia/yenta_socket.c b/drivers/pcmcia/yenta_socket.c
--- a/drivers/pcmcia/yenta_socket.c Sun Aug 3 13:14:49 2003
+++ b/drivers/pcmcia/yenta_socket.c Sun Aug 3 13:14:49 2003
@@ -657,7 +657,7 @@
if (request_resource(root, res) == 0)
return;
printk(KERN_INFO "yenta %s: Preassigned resource %d busy, reconfiguring...\n",
- socket->dev->slot_name, nr);
+ pci_name(socket->dev), nr);
res->start = res->end = 0;
}
@@ -697,7 +697,7 @@
align = size;
} while (size >= min);
printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
- socket->dev->slot_name, type);
+ pci_name(socket->dev), type);
res->start = res->end = 0;
}
@@ -901,7 +901,7 @@
static int yenta_dev_suspend (struct pci_dev *dev, u32 state)
{
- return pcmcia_socket_dev_suspend(&dev->dev, state, 0);
+ return pcmcia_socket_dev_suspend(&dev->dev, state, SUSPEND_SAVE_STATE);
}
@@ -911,7 +911,7 @@
}
-static struct pci_device_id yenta_table [] __devinitdata = { {
+static struct pci_device_id yenta_table [] = { {
.class = PCI_CLASS_BRIDGE_CARDBUS << 8,
.class_mask = ~0,
diff -Nru a/drivers/scsi/53c7xx.c b/drivers/scsi/53c7xx.c
--- a/drivers/scsi/53c7xx.c Sun Aug 3 13:14:53 2003
+++ b/drivers/scsi/53c7xx.c Sun Aug 3 13:14:53 2003
@@ -4977,7 +4977,7 @@
hostdata->options |= OPTION_NO_PRINT_RACE;
}
} else {
- printk(KERN_ALERT "scsi%d : illegal instruction\n", host->host_no);
+ printk(KERN_ALERT "scsi%d : invalid instruction\n", host->host_no);
print_lots (host);
printk(KERN_ALERT " mail Richard@sleepie.demon.co.uk with ALL\n"
" boot messages and diagnostic output\n");
diff -Nru a/drivers/scsi/AM53C974.c b/drivers/scsi/AM53C974.c
--- a/drivers/scsi/AM53C974.c Sun Aug 3 13:14:48 2003
+++ b/drivers/scsi/AM53C974.c Sun Aug 3 13:14:48 2003
@@ -598,7 +598,7 @@
(ints[1] == ints[2]) ||
(ints[3] < (DEF_CLK / MAX_PERIOD)) || (ints[3] > (DEF_CLK / MIN_PERIOD)) ||
(ints[4] < 0) || (ints[4] > MAX_OFFSET))
- printk("AM53C974_setup: illegal parameter\n");
+ printk("AM53C974_setup: invalid parameter\n");
else {
overrides[commandline_current].host_scsi_id = ints[1];
overrides[commandline_current].target_scsi_id = ints[2];
diff -Nru a/drivers/scsi/BusLogic.c b/drivers/scsi/BusLogic.c
--- a/drivers/scsi/BusLogic.c Sun Aug 3 13:14:52 2003
+++ b/drivers/scsi/BusLogic.c Sun Aug 3 13:14:52 2003
@@ -840,7 +840,7 @@
}
if (IRQ_Channel == 0)
{
- BusLogic_Error("BusLogic: IRQ Channel %d illegal for "
+ BusLogic_Error("BusLogic: IRQ Channel %d invalid for "
"MultiMaster Host Adapter\n", NULL, IRQ_Channel);
BusLogic_Error("at PCI Bus %d Device %d I/O Address 0x%X\n",
NULL, Bus, Device, IO_Address);
@@ -1112,7 +1112,7 @@
}
if (IRQ_Channel == 0)
{
- BusLogic_Error("BusLogic: IRQ Channel %d illegal for "
+ BusLogic_Error("BusLogic: IRQ Channel %d invalid for "
"FlashPoint Host Adapter\n", NULL, IRQ_Channel);
BusLogic_Error("at PCI Bus %d Device %d I/O Address 0x%X\n",
NULL, Bus, Device, IO_Address);
@@ -4847,7 +4847,7 @@
break;
default:
BusLogic_Error("BusLogic: Invalid Driver Options "
- "(illegal I/O Address 0x%X)\n",
+ "(invalid I/O Address 0x%X)\n",
NULL, IO_Address);
return 0;
}
@@ -4877,7 +4877,7 @@
if (QueueDepth > BusLogic_MaxTaggedQueueDepth)
{
BusLogic_Error("BusLogic: Invalid Driver Options "
- "(illegal Queue Depth %d)\n",
+ "(invalid Queue Depth %d)\n",
NULL, QueueDepth);
return 0;
}
@@ -4911,7 +4911,7 @@
if (QueueDepth == 0 || QueueDepth > BusLogic_MaxTaggedQueueDepth)
{
BusLogic_Error("BusLogic: Invalid Driver Options "
- "(illegal Queue Depth %d)\n",
+ "(invalid Queue Depth %d)\n",
NULL, QueueDepth);
return 0;
}
@@ -5029,7 +5029,7 @@
if (BusSettleTime > 5 * 60)
{
BusLogic_Error("BusLogic: Invalid Driver Options "
- "(illegal Bus Settle Time %d)\n",
+ "(invalid Bus Settle Time %d)\n",
NULL, BusSettleTime);
return 0;
}
diff -Nru a/drivers/scsi/NCR53C9x.c b/drivers/scsi/NCR53C9x.c
--- a/drivers/scsi/NCR53C9x.c Sun Aug 3 13:14:46 2003
+++ b/drivers/scsi/NCR53C9x.c Sun Aug 3 13:14:46 2003
@@ -3470,7 +3470,7 @@
* for reselection. See esp100_reconnect_hwbug()
* to see how we try very hard to avoid this.
*/
- ESPLOG(("esp%d: illegal command\n", esp->esp_id));
+ ESPLOG(("esp%d: invalid command\n", esp->esp_id));
esp_dump_state(esp, eregs);
diff -Nru a/drivers/scsi/aha152x.c b/drivers/scsi/aha152x.c
--- a/drivers/scsi/aha152x.c Sun Aug 3 13:14:44 2003
+++ b/drivers/scsi/aha152x.c Sun Aug 3 13:14:44 2003
@@ -3098,7 +3098,7 @@
printk("MESSAGE IN");
break;
default:
- printk("*illegal*");
+ printk("*invalid*");
break;
}
@@ -3467,7 +3467,7 @@
SPRINTF("MESSAGE IN");
break;
default:
- SPRINTF("*illegal*");
+ SPRINTF("*invalid*");
break;
}
diff -Nru a/drivers/scsi/aha1542.c b/drivers/scsi/aha1542.c
--- a/drivers/scsi/aha1542.c Sun Aug 3 13:14:48 2003
+++ b/drivers/scsi/aha1542.c Sun Aug 3 13:14:48 2003
@@ -67,7 +67,7 @@
int nseg,
int badseg)
{
- printk(KERN_CRIT "sgpnt[%d:%d] page %p/0x%x length %ld\n",
+ printk(KERN_CRIT "sgpnt[%d:%d] page %p/0x%x length %u\n",
badseg, nseg,
page_address(sgpnt[badseg].page) + sgpnt[badseg].offset,
SCSI_SG_PA(&sgpnt[badseg]),
diff -Nru a/drivers/scsi/aic7xxx/aic7770.c b/drivers/scsi/aic7xxx/aic7770.c
--- a/drivers/scsi/aic7xxx/aic7770.c Sun Aug 3 13:14:53 2003
+++ b/drivers/scsi/aic7xxx/aic7770.c Sun Aug 3 13:14:53 2003
@@ -170,7 +170,7 @@
case 15:
break;
default:
- printf("aic7770_config: illegal irq setting %d\n", intdef);
+ printf("aic7770_config: invalid irq setting %d\n", intdef);
return (ENXIO);
}
diff -Nru a/drivers/scsi/dc395x.c b/drivers/scsi/dc395x.c
--- a/drivers/scsi/dc395x.c Sun Aug 3 13:14:45 2003
+++ b/drivers/scsi/dc395x.c Sun Aug 3 13:14:45 2003
@@ -180,18 +180,18 @@
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
# define DEBUGTRACEBUFSZ 512
-char DC395x_tracebuf[64];
-char DC395x_traceoverflow[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
+static char tracebuf[64];
+static char traceoverflow[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
# define TRACEPRINTF(x...) \
do { \
- int ln = sprintf(DC395x_tracebuf, x); \
- if (pSRB->debugpos + ln >= DEBUGTRACEBUFSZ) { \
- pSRB->debugtrace[pSRB->debugpos] = 0; \
- pSRB->debugpos = DEBUGTRACEBUFSZ/5; \
- pSRB->debugtrace[pSRB->debugpos++] = '>'; \
+ int ln = sprintf(tracebuf, x); \
+ if (srb->debugpos + ln >= DEBUGTRACEBUFSZ) { \
+ srb->debugtrace[srb->debugpos] = 0; \
+ srb->debugpos = DEBUGTRACEBUFSZ/5; \
+ srb->debugtrace[srb->debugpos++] = '>'; \
} \
- sprintf(pSRB->debugtrace + pSRB->debugpos, "%s", DC395x_tracebuf); \
- pSRB->debugpos += ln - 1; \
+ sprintf(srb->debugtrace + srb->debugpos, "%s", tracebuf); \
+ srb->debugpos += ln - 1; \
} while (0)
# define TRACEOUT(x...) printk (x)
#else
@@ -203,7 +203,6 @@
/*---------------------------------------------------------------------------
---------------------------------------------------------------------------*/
-
#ifndef PCI_VENDOR_ID_TEKRAM
#define PCI_VENDOR_ID_TEKRAM 0x1DE1 /* Vendor ID */
#endif
@@ -213,33 +212,30 @@
-#define DC395x_LOCK_IO(dev) spin_lock_irqsave(((struct Scsi_Host *)dev)->host_lock, flags)
-#define DC395x_UNLOCK_IO(dev) spin_unlock_irqrestore(((struct Scsi_Host *)dev)->host_lock, flags)
+#define DC395x_LOCK_IO(dev,flags) spin_lock_irqsave(((struct Scsi_Host *)dev)->host_lock, flags)
+#define DC395x_UNLOCK_IO(dev,flags) spin_unlock_irqrestore(((struct Scsi_Host *)dev)->host_lock, flags)
-#define DC395x_ACB_INITLOCK(pACB) spin_lock_init(&pACB->smp_lock)
-#define DC395x_ACB_LOCK(pACB,acb_flags) if (!pACB->lock_level_count[cpuid]) { spin_lock_irqsave(&pACB->smp_lock,acb_flags); pACB->lock_level_count[cpuid]++; } else { pACB->lock_level_count[cpuid]++; }
-#define DC395x_ACB_UNLOCK(pACB,acb_flags) if (--pACB->lock_level_count[cpuid] == 0) { spin_unlock_irqrestore(&pACB->smp_lock,acb_flags); }
-
-#define DC395x_SMP_IO_LOCK(dev,irq_flags) spin_lock_irqsave(((struct Scsi_Host*)dev)->host_lock,irq_flags)
-#define DC395x_SMP_IO_UNLOCK(dev,irq_flags) spin_unlock_irqrestore(((struct Scsi_Host*)dev)->host_lock,irq_flags)
-#define DC395x_SCSI_DONE_ACB_LOCK spin_lock(&(pACB->smp_lock))
-#define DC395x_SCSI_DONE_ACB_UNLOCK spin_unlock(&(pACB->smp_lock))
-
-
-#define DC395x_read8(address) (u8)(inb(pACB->IOPortBase + (address)))
-#define DC395x_read8_(address, base) (u8)(inb((USHORT)(base) + (address)))
-#define DC395x_read16(address) (u16)(inw(pACB->IOPortBase + (address)))
-#define DC395x_read32(address) (u32)(inl(pACB->IOPortBase + (address)))
-#define DC395x_write8(address,value) outb((value), pACB->IOPortBase + (address))
-#define DC395x_write8_(address,value,base) outb((value), (USHORT)(base) + (address))
-#define DC395x_write16(address,value) outw((value), pACB->IOPortBase + (address))
-#define DC395x_write32(address,value) outl((value), pACB->IOPortBase + (address))
+#define DC395x_ACB_INITLOCK(acb) spin_lock_init(&acb->smp_lock)
+#define DC395x_ACB_LOCK(acb,acb_flags) if (!acb->lock_level_count[cpuid]) { spin_lock_irqsave(&acb->smp_lock,acb_flags); acb->lock_level_count[cpuid]++; } else { acb->lock_level_count[cpuid]++; }
+#define DC395x_ACB_UNLOCK(acb,acb_flags) if (--acb->lock_level_count[cpuid] == 0) { spin_unlock_irqrestore(&acb->smp_lock,acb_flags); }
+
+#define DC395x_SMP_IO_LOCK(dev,irq_flags) spin_lock_irqsave(((struct Scsi_Host*)dev)->host_lock,irq_flags)
+#define DC395x_SMP_IO_UNLOCK(dev,irq_flags) spin_unlock_irqrestore(((struct Scsi_Host*)dev)->host_lock,irq_flags)
+
+
+#define DC395x_read8(acb,address) (u8)(inb(acb->IOPortBase + (address)))
+#define DC395x_read8_(address, base) (u8)(inb((USHORT)(base) + (address)))
+#define DC395x_read16(acb,address) (u16)(inw(acb->IOPortBase + (address)))
+#define DC395x_read32(acb,address) (u32)(inl(acb->IOPortBase + (address)))
+#define DC395x_write8(acb,address,value) outb((value), acb->IOPortBase + (address))
+#define DC395x_write8_(address,value,base) outb((value), (USHORT)(base) + (address))
+#define DC395x_write16(acb,address,value) outw((value), acb->IOPortBase + (address))
+#define DC395x_write32(acb,address,value) outl((value), acb->IOPortBase + (address))
#define BUS_ADDR(sg) sg_dma_address(&(sg))
#define CPU_ADDR(sg) (page_address((sg).page)+(sg).offset)
#define PAGE_ADDRESS(sg) page_address((sg)->page)
-#define SET_DIR(dir,pcmd) dir = scsi_to_pci_dma_dir((pcmd)->sc_data_direction)
/* cmd->result */
#define RES_TARGET 0x000000FF /* Target State */
@@ -260,7 +256,6 @@
/*
**************************************************************************
*/
-#define NO_IRQ 255
#define TAG_NONE 255
struct SGentry {
@@ -273,49 +268,42 @@
SCSI Request Block
-----------------------------------------------------------------------*/
struct ScsiReqBlk {
- struct ScsiReqBlk *pNextSRB;
- struct DeviceCtlBlk *pSRBDCB;
+ struct ScsiReqBlk *next;
+ struct DeviceCtlBlk *dcb;
/* HW scatter list (up to 64 entries) */
- struct SGentry *SegmentX;
- Scsi_Cmnd *pcmd;
+ struct SGentry *segment_x;
+ Scsi_Cmnd *cmd;
- /* Offset 0x20/0x10 */
- unsigned char *virt_addr; /* set by DC395x_update_SGlist */
+ unsigned char *virt_addr; /* set by update_sg_list */
- u32 SRBTotalXferLength;
- u32 Xferred; /* Backup for the already xferred len */
+ u32 total_xfer_length;
+ u32 xferred; /* Backup for the already xferred len */
- u32 SRBSGBusAddr; /* bus address of DC395x scatterlist */
+ u32 sg_bus_addr; /* bus address of DC395x scatterlist */
- u16 SRBState;
- u8 SRBSGCount;
- u8 SRBSGIndex;
+ u16 state;
+ u8 sg_count;
+ u8 sg_index;
- /* Offset 0x38/0x24 */
- u8 MsgInBuf[6];
- u8 MsgOutBuf[6];
+ u8 msgin_buf[6];
+ u8 msgout_buf[6];
- u8 AdaptStatus;
- u8 TargetStatus;
- u8 MsgCnt;
- u8 EndMessage;
+ u8 adapter_status;
+ u8 target_status;
+ u8 msg_count;
+ u8 end_message;
- /* Offset 0x48/0x34 */
- u8 *pMsgPtr;
+ u8 tag_number;
+ u8 status;
+ u8 retry_count;
+ u8 flag;
- u8 TagNumber;
- u8 SRBStatus;
- u8 RetryCnt;
- u8 SRBFlag;
+ u8 scsi_phase;
- u8 ScsiPhase;
- u8 padding;
- u16 debugpos;
- /* Offset 0x58/0x40 */
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
+ u16 debugpos;
char *debugtrace;
- /* Offset 0x60/0x44 */
#endif
};
@@ -324,111 +312,83 @@
Device Control Block
-----------------------------------------------------------------------*/
struct DeviceCtlBlk {
- struct DeviceCtlBlk *pNextDCB;
- struct AdapterCtlBlk *pDCBACB;
+ struct DeviceCtlBlk *next;
+ struct AdapterCtlBlk *acb;
- struct ScsiReqBlk *pGoingSRB;
- struct ScsiReqBlk *pGoingLast;
+ struct ScsiReqBlk *going_srb;
+ struct ScsiReqBlk *going_last;
-/* 0x10: */
- struct ScsiReqBlk *pWaitingSRB;
- struct ScsiReqBlk *pWaitLast;
-
- struct ScsiReqBlk *pActiveSRB;
- u32 TagMask;
-
-/* 0x20: */
- u16 MaxCommand;
- u8 AdaptIndex; /* UnitInfo struc start */
- u8 UnitIndex; /* nth Unit on this card */
-
- u16 GoingSRBCnt;
- u16 WaitSRBCnt;
- u8 TargetID; /* SCSI Target ID (SCSI Only) */
- u8 TargetLUN; /* SCSI Log. Unit (SCSI Only) */
- u8 IdentifyMsg;
- u8 DevMode;
-
-/* 0x2c: */
-/* u8 AdpMode;*/
- u8 Inquiry7; /* To store Inquiry flags */
- u8 SyncMode; /* 0:async mode */
- u8 MinNegoPeriod; /* for nego. */
- u8 SyncPeriod; /* for reg. */
-
- u8 SyncOffset; /* for reg. and nego.(low nibble) */
- u8 UnitCtrlFlag;
- u8 DCBFlag;
- u8 DevType;
- u8 init_TCQ_flag;
-
- unsigned long last_derated; /* last time, when features were turned off in abort */
-/* 0x38: */
- /* u8 Reserved2[3]; for dword alignment */
+ struct ScsiReqBlk *waiting_srb;
+ struct ScsiReqBlk *wait_list;
+
+ struct ScsiReqBlk *active_srb;
+ u32 tag_mask;
+
+ u16 max_command;
+
+ u16 going_srb_count;
+ u16 waiting_srb_count;
+ u8 target_id; /* SCSI Target ID (SCSI Only) */
+ u8 target_lun; /* SCSI Log. Unit (SCSI Only) */
+ u8 identify_msg;
+ u8 dev_mode;
+
+ u8 inquiry7; /* To store Inquiry flags */
+ u8 sync_mode; /* 0:async mode */
+ u8 min_nego_period; /* for nego. */
+ u8 sync_period; /* for reg. */
+
+ u8 sync_offset; /* for reg. and nego.(low nibble) */
+ u8 flag;
+ u8 dev_type;
+ u8 init_tcq_flag;
};
/*-----------------------------------------------------------------------
Adapter Control Block
-----------------------------------------------------------------------*/
struct AdapterCtlBlk {
- struct Scsi_Host *pScsiHost;
- struct AdapterCtlBlk *pNextACB;
+ struct Scsi_Host *scsi_host;
+ struct AdapterCtlBlk *next_acb;
u16 IOPortBase;
- u16 Revxx1;
-
- struct DeviceCtlBlk *pLinkDCB;
- struct DeviceCtlBlk *pLastDCB;
- struct DeviceCtlBlk *pDCBRunRobin;
- struct DeviceCtlBlk *pActiveDCB;
+ struct DeviceCtlBlk *link_dcb;
+ struct DeviceCtlBlk *last_dcb;
+ struct DeviceCtlBlk *dcb_run_robin;
- struct ScsiReqBlk *pFreeSRB;
- struct ScsiReqBlk *pTmpSRB;
- struct timer_list Waiting_Timer;
- struct timer_list SelTO_Timer;
+ struct DeviceCtlBlk *active_dcb;
- u16 SRBCount;
- u16 AdapterIndex; /* nth Adapter this driver */
+ struct ScsiReqBlk *free_srb;
+ struct ScsiReqBlk *tmp_srb;
+ struct timer_list waiting_timer;
+ struct timer_list selto_timer;
- u32 QueryCnt;
- Scsi_Cmnd *pQueryHead;
- Scsi_Cmnd *pQueryTail;
+ u16 srb_count;
+ u16 adapter_index; /* nth Adapter this driver */
- u8 msgin123[4];
-
- u8 status;
- u8 DCBCnt;
+ u8 dcb_count;
u8 sel_timeout;
- u8 dummy;
- u8 IRQLevel;
- u8 TagMaxNum;
- u8 ACBFlag;
- u8 Gmode2;
+ u8 irq_level;
+ u8 tag_max_num;
+ u8 acb_flag;
+ u8 gmode2;
- u8 Config;
- u8 LUNchk;
+ u8 config;
+ u8 lun_chk;
u8 scan_devices;
- u8 HostID_Bit;
+ u8 hostid_bit;
- u8 DCBmap[DC395x_MAX_SCSI_ID];
+ u8 dcb_map[DC395x_MAX_SCSI_ID];
struct DeviceCtlBlk *children[DC395x_MAX_SCSI_ID][32];
- u32 Cmds;
- u32 SelLost;
- u32 SelConn;
- u32 CmdInQ;
- u32 CmdOutOfSRB;
+ struct pci_dev *dev;
- /*struct DeviceCtlBlk DCB_array[DC395x_MAX_DCB]; *//* +74h, Len=3E8 */
- struct pci_dev *pdev;
+ u8 msg_len;
- u8 MsgLen;
- u8 DeviceCnt;
-
- struct ScsiReqBlk SRB_array[DC395x_MAX_SRB_CNT];
- struct ScsiReqBlk TmpSRB;
+ struct ScsiReqBlk srb_array[DC395x_MAX_SRB_CNT];
+ struct ScsiReqBlk srb;
};
@@ -436,148 +396,157 @@
* The SEEPROM structure for TRM_S1040
*/
struct NVRamTarget {
- u8 NvmTarCfg0; /* Target configuration byte 0 */
- u8 NvmTarPeriod; /* Target period */
- u8 NvmTarCfg2; /* Target configuration byte 2 */
- u8 NvmTarCfg3; /* Target configuration byte 3 */
+ u8 cfg0; /* Target configuration byte 0 */
+ u8 period; /* Target period */
+ u8 cfg2; /* Target configuration byte 2 */
+ u8 cfg3; /* Target configuration byte 3 */
};
struct NvRamType {
- u8 NvramSubVendorID[2]; /* 0,1 Sub Vendor ID */
- u8 NvramSubSysID[2]; /* 2,3 Sub System ID */
- u8 NvramSubClass; /* 4 Sub Class */
- u8 NvramVendorID[2]; /* 5,6 Vendor ID */
- u8 NvramDeviceID[2]; /* 7,8 Device ID */
- u8 NvramReserved; /* 9 Reserved */
- struct NVRamTarget NvramTarget[DC395x_MAX_SCSI_ID];
+ u8 sub_vendor_id[2]; /* 0,1 Sub Vendor ID */
+ u8 sub_sys_id[2]; /* 2,3 Sub System ID */
+ u8 sub_class; /* 4 Sub Class */
+ u8 vendor_id[2]; /* 5,6 Vendor ID */
+ u8 device_id[2]; /* 7,8 Device ID */
+ u8 reserved; /* 9 Reserved */
+ struct NVRamTarget target[DC395x_MAX_SCSI_ID];
/** 10,11,12,13
** 14,15,16,17
** ....
** ....
** 70,71,72,73
*/
- u8 NvramScsiId; /* 74 Host Adapter SCSI ID */
- u8 NvramChannelCfg; /* 75 Channel configuration */
- u8 NvramDelayTime; /* 76 Power on delay time */
- u8 NvramMaxTag; /* 77 Maximum tags */
- u8 NvramReserved0; /* 78 */
- u8 NvramBootTarget; /* 79 */
- u8 NvramBootLun; /* 80 */
- u8 NvramReserved1; /* 81 */
- u16 Reserved[22]; /* 82,..125 */
- u16 NvramCheckSum; /* 126,127 */
+ u8 scsi_id; /* 74 Host Adapter SCSI ID */
+ u8 channel_cfg; /* 75 Channel configuration */
+ u8 delay_time; /* 76 Power on delay time */
+ u8 max_tag; /* 77 Maximum tags */
+ u8 reserved0; /* 78 */
+ u8 boot_target; /* 79 */
+ u8 boot_lun; /* 80 */
+ u8 reserved1; /* 81 */
+ u16 reserved2[22]; /* 82,..125 */
+ u16 cksum; /* 126,127 */
};
-/*------------------------------------------------------------------------------*/
-void DC395x_DataOutPhase0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB, u16 * pscsi_status);
-void DC395x_DataInPhase0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB, u16 * pscsi_status);
-static void DC395x_CommandPhase0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_StatusPhase0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_MsgOutPhase0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-void DC395x_MsgInPhase0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB, u16 * pscsi_status);
-static void DC395x_DataOutPhase1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_DataInPhase1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_CommandPhase1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_StatusPhase1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_MsgOutPhase1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_MsgInPhase1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB,
- u16 * pscsi_status);
-static void DC395x_Nop0(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB, u16 * pscsi_status);
-static void DC395x_Nop1(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB, u16 * pscsi_status);
-static void DC395x_basic_config(struct AdapterCtlBlk *pACB);
-static void DC395x_cleanup_after_transfer(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB);
-static void DC395x_ResetSCSIBus(struct AdapterCtlBlk *pACB);
-void DC395x_DataIO_transfer(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB, u16 ioDir);
-void DC395x_Disconnect(struct AdapterCtlBlk *pACB);
-void DC395x_Reselect(struct AdapterCtlBlk *pACB);
-u8 DC395x_StartSCSI(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB);
-static void DC395x_BuildSRB(Scsi_Cmnd * pcmd, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB);
-void DC395x_DoingSRB_Done(struct AdapterCtlBlk *pACB, u8 did_code,
- Scsi_Cmnd * pcmd, u8 force);
-static void DC395x_ScsiRstDetect(struct AdapterCtlBlk *pACB);
-static void DC395x_pci_unmap(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB);
-static void DC395x_pci_unmap_sense(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB);
-static inline void DC395x_EnableMsgOut_Abort(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB);
-void DC395x_SRBdone(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB);
-static void DC395x_RequestSense(struct AdapterCtlBlk *pACB,
- struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB);
-static inline void DC395x_SetXferRate(struct AdapterCtlBlk *pACB,
- struct DeviceCtlBlk *pDCB);
-void DC395x_initDCB(struct AdapterCtlBlk *pACB,
- struct DeviceCtlBlk **ppDCB, u8 target, u8 lun);
-static void DC395x_remove_dev(struct AdapterCtlBlk *pACB,
- struct DeviceCtlBlk *pDCB);
-
-
-static struct AdapterCtlBlk *DC395x_pACB_start = NULL;
-static struct AdapterCtlBlk *DC395x_pACB_current = NULL;
-static u16 DC395x_adapterCnt = 0;
-static u16 DC395x_CurrSyncOffset = 0;
+/*---------------------------------------------------------------------------
+ Forward declarations
+ ---------------------------------------------------------------------------*/
+static void data_out_phase0(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void data_in_phase0(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void command_phase0(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void status_phase0(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void msgout_phase0(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void msgin_phase0(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void data_out_phase1(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void data_in_phase1(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void command_phase1(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void status_phase1(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void msgout_phase1(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void msgin_phase1(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status);
+static void set_basic_config(struct AdapterCtlBlk *acb);
+static void cleanup_after_transfer(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb);
+static void reset_scsi_bus(struct AdapterCtlBlk *acb);
+static void data_io_transfer(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb, u16 io_dir);
+static void disconnect(struct AdapterCtlBlk *acb);
+static void reselect(struct AdapterCtlBlk *acb);
+static u8 start_scsi(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb);
+static void build_srb(Scsi_Cmnd * cmd, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb);
+static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_code,
+ Scsi_Cmnd * cmd, u8 force);
+static void scsi_reset_detect(struct AdapterCtlBlk *acb);
+static void pci_unmap_srb(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb);
+static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb);
+static inline void enable_msgout_abort(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb);
+static void srb_done(struct AdapterCtlBlk *acb,
+ struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb);
+static void request_sense(struct AdapterCtlBlk *acb,
+ struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb);
+static inline void set_xfer_rate(struct AdapterCtlBlk *acb,
+ struct DeviceCtlBlk *dcb);
+static void init_dcb(struct AdapterCtlBlk *acb,
+ struct DeviceCtlBlk **pdcb, u8 target, u8 lun);
+static void remove_dev(struct AdapterCtlBlk *acb,
+ struct DeviceCtlBlk *dcb);
+static void waiting_timeout(unsigned long ptr);
+
-static char DC395x_monitor_next_IRQ = 0;
+/*---------------------------------------------------------------------------
+ Static Data
+ ---------------------------------------------------------------------------*/
+static struct AdapterCtlBlk *acb_list_head = NULL;
+static struct AdapterCtlBlk *acb_list_tail = NULL;
+static u16 adapter_count = 0;
+static u16 current_sync_offset = 0;
+static char monitor_next_irq = 0;
/*
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
*/
-static void *DC395x_SCSI_phase0[] = {
- DC395x_DataOutPhase0, /* phase:0 */
- DC395x_DataInPhase0, /* phase:1 */
- DC395x_CommandPhase0, /* phase:2 */
- DC395x_StatusPhase0, /* phase:3 */
- DC395x_Nop0, /* phase:4 PH_BUS_FREE .. initial phase */
- DC395x_Nop0, /* phase:5 PH_BUS_FREE .. initial phase */
- DC395x_MsgOutPhase0, /* phase:6 */
- DC395x_MsgInPhase0, /* phase:7 */
+static void *dc395x_scsi_phase0[] = {
+ data_out_phase0,/* phase:0 */
+ data_in_phase0, /* phase:1 */
+ command_phase0, /* phase:2 */
+ status_phase0, /* phase:3 */
+ nop0, /* phase:4 PH_BUS_FREE .. initial phase */
+ nop0, /* phase:5 PH_BUS_FREE .. initial phase */
+ msgout_phase0, /* phase:6 */
+ msgin_phase0, /* phase:7 */
};
/*
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
*/
-static void *DC395x_SCSI_phase1[] = {
- DC395x_DataOutPhase1, /* phase:0 */
- DC395x_DataInPhase1, /* phase:1 */
- DC395x_CommandPhase1, /* phase:2 */
- DC395x_StatusPhase1, /* phase:3 */
- DC395x_Nop1, /* phase:4 PH_BUS_FREE .. initial phase */
- DC395x_Nop1, /* phase:5 PH_BUS_FREE .. initial phase */
- DC395x_MsgOutPhase1, /* phase:6 */
- DC395x_MsgInPhase1, /* phase:7 */
+static void *dc395x_scsi_phase1[] = {
+ data_out_phase1,/* phase:0 */
+ data_in_phase1, /* phase:1 */
+ command_phase1, /* phase:2 */
+ status_phase1, /* phase:3 */
+ nop1, /* phase:4 PH_BUS_FREE .. initial phase */
+ nop1, /* phase:5 PH_BUS_FREE .. initial phase */
+ msgout_phase1, /* phase:6 */
+ msgin_phase1, /* phase:7 */
};
-struct NvRamType dc395x_trm_eepromBuf[DC395x_MAX_ADAPTER_NUM];
+struct NvRamType eeprom_buf[DC395x_MAX_ADAPTER_NUM];
/*
*Fast20: 000 50ns, 20.0 MHz
* 001 75ns, 13.3 MHz
@@ -597,11 +566,11 @@
* 110 175ns, 5.7 MHz
* 111 200ns, 5.0 MHz
*/
-/*static u8 dc395x_clock_period[] = {12,19,25,31,37,44,50,62};*/
+/*static u8 clock_period[] = {12,19,25,31,37,44,50,62};*/
/* real period:48ns,76ns,100ns,124ns,148ns,176ns,200ns,248ns */
-static u8 dc395x_clock_period[] = { 12, 18, 25, 31, 37, 43, 50, 62 };
-static u16 dc395x_clock_speed[] = { 200, 133, 100, 80, 67, 58, 50, 40 };
+static u8 clock_period[] = { 12, 18, 25, 31, 37, 43, 50, 62 };
+static u16 clock_speed[] = { 200, 133, 100, 80, 67, 58, 50, 40 };
/* real period:48ns,72ns,100ns,124ns,148ns,172ns,200ns,248ns */
@@ -609,10 +578,14 @@
/*---------------------------------------------------------------------------
Configuration
---------------------------------------------------------------------------*/
+/*
+ * Module/boot parameters currently effect *all* instances of the
+ * card in the system.
+ */
/*
* Command line parameters are stored in a structure below.
- * These are the index's into the strcuture for the various
+ * These are the index's into the structure for the various
* command line options.
*/
#define CFG_ADAPTER_ID 0
@@ -635,14 +608,14 @@
/*
* Hold command line parameters.
*/
-struct dc395x_config_data {
+struct ParameterData {
int value; /* value of this setting */
int min; /* minimum value */
int max; /* maximum value */
int def; /* default value */
int safe; /* safe value */
};
-struct dc395x_config_data __initdata cfg_data[] = {
+static struct ParameterData __initdata cfg_data[] = {
{ /* adapter id */
CFG_PARAM_UNSET,
0,
@@ -698,8 +671,8 @@
* Safe settings. If set to zero the the BIOS/default values with command line
* overrides will be used. If set to 1 then safe and slow settings will be used.
*/
-static int dc395x_safe = 0;
-module_param_named(safe, dc395x_safe, bool, 0);
+static int use_safe_settings = 0;
+module_param_named(safe, use_safe_settings, bool, 0);
MODULE_PARM_DESC(safe, "Use safe and slow settings only. Default: false");
@@ -723,17 +696,17 @@
/**
- * set_safe_settings - if the safe parameter is set then
+ * set_safe_settings - if the use_safe_settings option is set then
* set all values to the safe and slow values.
**/
static
void __init set_safe_settings(void)
{
- if (dc395x_safe)
+ if (use_safe_settings)
{
int i;
- dprintkl(KERN_INFO, "Using sage settings.\n");
+ dprintkl(KERN_INFO, "Using safe settings.\n");
for (i = 0; i < CFG_NUM; i++)
{
cfg_data[i].value = cfg_data[i].safe;
@@ -743,7 +716,7 @@
/**
- * fix_settings - reset any boot parmeters which are out of range
+ * fix_settings - reset any boot parameters which are out of range
* back to the default values.
**/
static
@@ -771,8 +744,8 @@
/*
- * Mapping from the eeprom value (index into this array) to the
- * the number of actual seconds that the delay should be for.
+ * Mapping from the eeprom delay index value (index into this array)
+ * to the the number of actual seconds that the delay should be for.
*/
static
char __initdata eeprom_index_to_delay_map[] = { 1, 3, 5, 10, 16, 30, 60, 120 };
@@ -781,17 +754,22 @@
/**
* eeprom_index_to_delay - Take the eeprom delay setting and convert it
* into a number of seconds.
- */
-static void __init eeprom_index_to_delay(struct NvRamType *eeprom)
+ *
+ * @eeprom: The eeprom structure in which we find the delay index to map.
+ **/
+static
+void __init eeprom_index_to_delay(struct NvRamType *eeprom)
{
- eeprom->NvramDelayTime = eeprom_index_to_delay_map[eeprom->NvramDelayTime];
+ eeprom->delay_time = eeprom_index_to_delay_map[eeprom->delay_time];
}
/**
* delay_to_eeprom_index - Take a delay in seconds and return the closest
* eeprom index which will delay for at least that amount of seconds.
- */
+ *
+ * @delay: The delay, in seconds, to find the eeprom index for.
+ **/
static int __init delay_to_eeprom_index(int delay)
{
u8 idx = 0;
@@ -802,47 +780,56 @@
}
-/* Overrride BIOS values with the set ones */
-static void __init DC395x_EEprom_Override(struct NvRamType *eeprom)
+/**
+ * eeprom_override - Override the eeprom settings, in the provided
+ * eeprom structure, with values that have been set on the command
+ * line.
+ *
+ * @eeprom: The eeprom data to override with command line options.
+ **/
+static
+void __init eeprom_override(struct NvRamType *eeprom)
{
u8 id;
/* Adapter Settings */
if (cfg_data[CFG_ADAPTER_ID].value != CFG_PARAM_UNSET) {
- eeprom->NvramScsiId =
+ eeprom->scsi_id =
(u8)cfg_data[CFG_ADAPTER_ID].value;
}
if (cfg_data[CFG_ADAPTER_MODE].value != CFG_PARAM_UNSET) {
- eeprom->NvramChannelCfg =
+ eeprom->channel_cfg =
(u8)cfg_data[CFG_ADAPTER_MODE].value;
}
if (cfg_data[CFG_RESET_DELAY].value != CFG_PARAM_UNSET) {
- eeprom->NvramDelayTime =
+ eeprom->delay_time =
delay_to_eeprom_index(cfg_data[CFG_RESET_DELAY].value);
}
if (cfg_data[CFG_TAGS].value != CFG_PARAM_UNSET) {
- eeprom->NvramMaxTag = (u8)cfg_data[CFG_TAGS].value;
+ eeprom->max_tag = (u8)cfg_data[CFG_TAGS].value;
}
/* Device Settings */
for (id = 0; id < DC395x_MAX_SCSI_ID; id++) {
if (cfg_data[CFG_DEV_MODE].value != CFG_PARAM_UNSET) {
- eeprom->NvramTarget[id].NvmTarCfg0 =
+ eeprom->target[id].cfg0 =
(u8)cfg_data[CFG_DEV_MODE].value;
}
if (cfg_data[CFG_MAX_SPEED].value != CFG_PARAM_UNSET) {
- eeprom->NvramTarget[id].NvmTarPeriod =
+ eeprom->target[id].period =
(u8)cfg_data[CFG_MAX_SPEED].value;
}
}
}
+/*---------------------------------------------------------------------------
+ ---------------------------------------------------------------------------*/
+
+
/*
* Queueing philosphy:
* There are a couple of lists:
- * - Query: Contains the Scsi Commands not yet turned into SRBs (per ACB)
- * (Note: For new EH, it is unecessary!)
* - Waiting: Contains a list of SRBs not yet sent (per DCB)
* - Free: List of free SRB slots
*
@@ -854,300 +841,266 @@
*/
/* Nomen est omen ... */
-static inline void
-DC395x_freetag(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB)
+static inline
+void free_tag(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
{
- if (pSRB->TagNumber < 255) {
- pDCB->TagMask &= ~(1 << pSRB->TagNumber); /* free tag mask */
- pSRB->TagNumber = 255;
+ if (srb->tag_number < 255) {
+ dcb->tag_mask &= ~(1 << srb->tag_number); /* free tag mask */
+ srb->tag_number = 255;
}
}
/* Find cmd in SRB list */
-inline static struct ScsiReqBlk *DC395x_find_cmd(Scsi_Cmnd * pcmd,
- struct ScsiReqBlk *start)
+inline static
+struct ScsiReqBlk *find_cmd(Scsi_Cmnd * cmd,
+ struct ScsiReqBlk *start)
{
struct ScsiReqBlk *psrb = start;
if (!start)
return 0;
do {
- if (psrb->pcmd == pcmd)
+ if (psrb->cmd == cmd)
return psrb;
- psrb = psrb->pNextSRB;
+ psrb = psrb->next;
} while (psrb && psrb != start);
return 0;
}
-/* Append to Query List */
-static void
-DC395x_Query_append(Scsi_Cmnd * cmd, struct AdapterCtlBlk *pACB)
-{
- dprintkdbg(DBG_0, "Append cmd %li to Query\n", cmd->pid);
-
- cmd->host_scribble = NULL;
-
- if (!pACB->QueryCnt)
- pACB->pQueryHead = cmd;
- else
- pACB->pQueryTail->host_scribble = (void *) cmd;
-
- pACB->pQueryTail = cmd;
- pACB->QueryCnt++;
- pACB->CmdOutOfSRB++;
-}
-
-
-/* Return next cmd from Query list */
-static Scsi_Cmnd *DC395x_Query_get(struct AdapterCtlBlk *pACB)
-{
- Scsi_Cmnd *pcmd;
-
- pcmd = pACB->pQueryHead;
- if (!pcmd)
- return pcmd;
- dprintkdbg(DBG_0, "Get cmd %li from Query\n", pcmd->pid);
- pACB->pQueryHead = (void *) pcmd->host_scribble;
- pcmd->host_scribble = NULL;
- if (!pACB->pQueryHead)
- pACB->pQueryTail = NULL;
- pACB->QueryCnt--;
- return pcmd;
-}
-
-
/* Return next free SRB */
-static __inline__ struct ScsiReqBlk *DC395x_Free_get(struct AdapterCtlBlk
- *pACB)
+static inline
+struct ScsiReqBlk *get_srb_free(struct AdapterCtlBlk *acb)
{
- struct ScsiReqBlk *pSRB;
+ struct ScsiReqBlk *srb;
- /*DC395x_Free_integrity (pACB); */
- pSRB = pACB->pFreeSRB;
- if (!pSRB)
+ /*DC395x_Free_integrity (acb); */
+ srb = acb->free_srb;
+ if (!srb)
dprintkl(KERN_ERR, "Out of Free SRBs :-(\n");
- if (pSRB) {
- pACB->pFreeSRB = pSRB->pNextSRB;
- pSRB->pNextSRB = NULL;
+ if (srb) {
+ acb->free_srb = srb->next;
+ srb->next = NULL;
}
- return pSRB;
+ return srb;
}
/* Insert SRB oin top of free list */
-static __inline__ void
-DC395x_Free_insert(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static inline
+void insert_srb_free(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
- dprintkdbg(DBG_0, "Free SRB %p\n", pSRB);
- pSRB->pNextSRB = pACB->pFreeSRB;
- pACB->pFreeSRB = pSRB;
+ dprintkdbg(DBG_0, "Free SRB %p\n", srb);
+ srb->next = acb->free_srb;
+ acb->free_srb = srb;
}
/* Inserts a SRB to the top of the Waiting list */
-static __inline__ void
-DC395x_Waiting_insert(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB)
+static inline
+void insert_srb_waiting(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
{
- dprintkdbg(DBG_0, "Insert pSRB %p cmd %li to Waiting\n", pSRB, pSRB->pcmd->pid);
- pSRB->pNextSRB = pDCB->pWaitingSRB;
- if (!pDCB->pWaitingSRB)
- pDCB->pWaitLast = pSRB;
- pDCB->pWaitingSRB = pSRB;
- pDCB->WaitSRBCnt++;
+ dprintkdbg(DBG_0, "Insert srb %p cmd %li to Waiting\n", srb, srb->cmd->pid);
+ srb->next = dcb->waiting_srb;
+ if (!dcb->waiting_srb)
+ dcb->wait_list = srb;
+ dcb->waiting_srb = srb;
+ dcb->waiting_srb_count++;
}
/* Queue SRB to waiting list */
-static __inline__ void
-DC395x_Waiting_append(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB)
+static inline
+void append_srb_waiting(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
{
- dprintkdbg(DBG_0, "Append pSRB %p cmd %li to Waiting\n", pSRB, pSRB->pcmd->pid);
- if (pDCB->pWaitingSRB)
- pDCB->pWaitLast->pNextSRB = pSRB;
+ dprintkdbg(DBG_0, "Append srb %p cmd %li to Waiting\n", srb, srb->cmd->pid);
+ if (dcb->waiting_srb)
+ dcb->wait_list->next = srb;
else
- pDCB->pWaitingSRB = pSRB;
+ dcb->waiting_srb = srb;
- pDCB->pWaitLast = pSRB;
+ dcb->wait_list = srb;
/* No next one in waiting list */
- pSRB->pNextSRB = NULL;
- pDCB->WaitSRBCnt++;
- /*pDCB->pDCBACB->CmdInQ++; */
+ srb->next = NULL;
+ dcb->waiting_srb_count++;
}
-static __inline__ void
-DC395x_Going_append(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB)
+static inline
+void append_srb_going(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
{
- dprintkdbg(DBG_0, "Append SRB %p to Going\n", pSRB);
+ dprintkdbg(DBG_0, "Append SRB %p to Going\n", srb);
/* Append to the list of Going commands */
- if (pDCB->pGoingSRB)
- pDCB->pGoingLast->pNextSRB = pSRB;
+ if (dcb->going_srb)
+ dcb->going_last->next = srb;
else
- pDCB->pGoingSRB = pSRB;
+ dcb->going_srb = srb;
- pDCB->pGoingLast = pSRB;
+ dcb->going_last = srb;
/* No next one in sent list */
- pSRB->pNextSRB = NULL;
- pDCB->GoingSRBCnt++;
+ srb->next = NULL;
+ dcb->going_srb_count++;
}
/* Find predecessor SRB */
-inline static struct ScsiReqBlk *DC395x_find_SRBpre(struct ScsiReqBlk
- *pSRB,
- struct ScsiReqBlk
- *start)
+inline static
+struct ScsiReqBlk *find_srb_prev(struct ScsiReqBlk *srb,
+ struct ScsiReqBlk *start)
{
- struct ScsiReqBlk *srb = start;
+ struct ScsiReqBlk *p = start;
if (!start)
return 0;
do {
- if (srb->pNextSRB == pSRB)
- return srb;
- srb = srb->pNextSRB;
- } while (srb && srb != start);
+ if (p->next == srb)
+ return p;
+ p = p->next;
+ } while (p && p != start);
return 0;
}
/* Remove SRB from SRB queue */
-inline static struct ScsiReqBlk *DC395x_rmv_SRB(struct ScsiReqBlk *pSRB,
- struct ScsiReqBlk *pre)
+inline static
+struct ScsiReqBlk *remove_srb(struct ScsiReqBlk *srb,
+ struct ScsiReqBlk *pre)
{
- if (pre->pNextSRB != pSRB)
- pre = DC395x_find_SRBpre(pSRB, pre);
+ if (pre->next != srb)
+ pre = find_srb_prev(srb, pre);
if (!pre) {
dprintkl(KERN_ERR, "Internal ERROR: SRB to rmv not found in Q!\n");
return 0;
}
- pre->pNextSRB = pSRB->pNextSRB;
- /*pSRB->pNextSRB = 0; */
+ pre->next = srb->next;
+ /*srb->next = NULL; */
return pre;
}
/* Remove SRB from Going queue */
-static void
-DC395x_Going_remove(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB,
- struct ScsiReqBlk *hint)
-{
- struct ScsiReqBlk *pre = 0;
- dprintkdbg(DBG_0, "Remove SRB %p from Going\n", pSRB);
- if (!pSRB)
- dprintkl(KERN_ERR, "Going_remove %p!\n", pSRB);
- if (pSRB == pDCB->pGoingSRB)
- pDCB->pGoingSRB = pSRB->pNextSRB;
- else if (hint && hint->pNextSRB == pSRB)
- pre = DC395x_rmv_SRB(pSRB, hint);
+static
+void remove_srb_going(struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb,
+ struct ScsiReqBlk *hint)
+{
+ struct ScsiReqBlk *pre = NULL;
+ dprintkdbg(DBG_0, "Remove SRB %p from Going\n", srb);
+ if (!srb)
+ dprintkl(KERN_ERR, "Going_remove %p!\n", srb);
+ if (srb == dcb->going_srb)
+ dcb->going_srb = srb->next;
+ else if (hint && hint->next == srb)
+ pre = remove_srb(srb, hint);
else
- pre = DC395x_rmv_SRB(pSRB, pDCB->pGoingSRB);
- if (pSRB == pDCB->pGoingLast)
- pDCB->pGoingLast = pre;
- pDCB->GoingSRBCnt--;
+ pre = remove_srb(srb, dcb->going_srb);
+ if (srb == dcb->going_last)
+ dcb->going_last = pre;
+ dcb->going_srb_count--;
}
/* Remove SRB from Waiting queue */
-static void
-DC395x_Waiting_remove(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB,
- struct ScsiReqBlk *hint)
-{
- struct ScsiReqBlk *pre = 0;
- dprintkdbg(DBG_0, "Remove SRB %p from Waiting\n", pSRB);
- if (!pSRB)
- dprintkl(KERN_ERR, "Waiting_remove %p!\n", pSRB);
- if (pSRB == pDCB->pWaitingSRB)
- pDCB->pWaitingSRB = pSRB->pNextSRB;
- else if (hint && hint->pNextSRB == pSRB)
- pre = DC395x_rmv_SRB(pSRB, hint);
+static
+void remove_srb_waiting(struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb,
+ struct ScsiReqBlk *hint)
+{
+ struct ScsiReqBlk *pre = NULL;
+ dprintkdbg(DBG_0, "Remove SRB %p from Waiting\n", srb);
+ if (!srb)
+ dprintkl(KERN_ERR, "Waiting_remove %p!\n", srb);
+ if (srb == dcb->waiting_srb)
+ dcb->waiting_srb = srb->next;
+ else if (hint && hint->next == srb)
+ pre = remove_srb(srb, hint);
else
- pre = DC395x_rmv_SRB(pSRB, pDCB->pWaitingSRB);
- if (pSRB == pDCB->pWaitLast)
- pDCB->pWaitLast = pre;
- pDCB->WaitSRBCnt--;
+ pre = remove_srb(srb, dcb->waiting_srb);
+ if (srb == dcb->wait_list)
+ dcb->wait_list = pre;
+ dcb->waiting_srb_count--;
}
/* Moves SRB from Going list to the top of Waiting list */
-static void
-DC395x_Going_to_Waiting(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB)
+static
+void move_srb_going_to_waiting(struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
- dprintkdbg(DBG_0, "Going_to_Waiting (SRB %p) pid = %li\n", pSRB, pSRB->pcmd->pid);
+ dprintkdbg(DBG_0, "Going_to_Waiting (SRB %p) pid = %li\n", srb, srb->cmd->pid);
/* Remove SRB from Going */
- DC395x_Going_remove(pDCB, pSRB, 0);
+ remove_srb_going(dcb, srb, 0);
TRACEPRINTF("GtW *");
/* Insert on top of Waiting */
- DC395x_Waiting_insert(pDCB, pSRB);
+ insert_srb_waiting(dcb, srb);
/* Tag Mask must be freed elsewhere ! (KG, 99/06/18) */
}
/* Moves first SRB from Waiting list to Going list */
-static __inline__ void
-DC395x_Waiting_to_Going(struct DeviceCtlBlk *pDCB, struct ScsiReqBlk *pSRB)
+static inline
+void move_srb_waiting_to_going(struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
/* Remove from waiting list */
- dprintkdbg(DBG_0, "Remove SRB %p from head of Waiting\n", pSRB);
- DC395x_Waiting_remove(pDCB, pSRB, 0);
+ dprintkdbg(DBG_0, "Remove SRB %p from head of Waiting\n", srb);
+ remove_srb_waiting(dcb, srb, 0);
TRACEPRINTF("WtG *");
- DC395x_Going_append(pDCB, pSRB);
+ append_srb_going(dcb, srb);
}
-void DC395x_waiting_timed_out(unsigned long ptr);
/* Sets the timer to wake us up */
-static void
-DC395x_waiting_timer(struct AdapterCtlBlk *pACB, unsigned long to)
+static
+void waiting_set_timer(struct AdapterCtlBlk *acb, unsigned long to)
{
- if (timer_pending(&pACB->Waiting_Timer))
+ if (timer_pending(&acb->waiting_timer))
return;
- init_timer(&pACB->Waiting_Timer);
- pACB->Waiting_Timer.function = DC395x_waiting_timed_out;
- pACB->Waiting_Timer.data = (unsigned long) pACB;
- if (time_before
- (jiffies + to, pACB->pScsiHost->last_reset - HZ / 2))
- pACB->Waiting_Timer.expires =
- pACB->pScsiHost->last_reset - HZ / 2 + 1;
+ init_timer(&acb->waiting_timer);
+ acb->waiting_timer.function = waiting_timeout;
+ acb->waiting_timer.data = (unsigned long) acb;
+ if (time_before(jiffies + to, acb->scsi_host->last_reset - HZ / 2))
+ acb->waiting_timer.expires =
+ acb->scsi_host->last_reset - HZ / 2 + 1;
else
- pACB->Waiting_Timer.expires = jiffies + to + 1;
- add_timer(&pACB->Waiting_Timer);
+ acb->waiting_timer.expires = jiffies + to + 1;
+ add_timer(&acb->waiting_timer);
}
/* Send the next command from the waiting list to the bus */
-void DC395x_Waiting_process(struct AdapterCtlBlk *pACB)
+static
+void waiting_process_next(struct AdapterCtlBlk *acb)
{
struct DeviceCtlBlk *ptr;
struct DeviceCtlBlk *ptr1;
- struct ScsiReqBlk *pSRB;
+ struct ScsiReqBlk *srb;
- if ((pACB->pActiveDCB)
- || (pACB->ACBFlag & (RESET_DETECT + RESET_DONE + RESET_DEV)))
+ if ((acb->active_dcb)
+ || (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV)))
return;
- if (timer_pending(&pACB->Waiting_Timer))
- del_timer(&pACB->Waiting_Timer);
- ptr = pACB->pDCBRunRobin;
+ if (timer_pending(&acb->waiting_timer))
+ del_timer(&acb->waiting_timer);
+ ptr = acb->dcb_run_robin;
if (!ptr) { /* This can happen! */
- ptr = pACB->pLinkDCB;
- pACB->pDCBRunRobin = ptr;
+ ptr = acb->link_dcb;
+ acb->dcb_run_robin = ptr;
}
ptr1 = ptr;
if (!ptr1)
return;
do {
/* Make sure, the next another device gets scheduled ... */
- pACB->pDCBRunRobin = ptr1->pNextDCB;
- if (!(pSRB = ptr1->pWaitingSRB)
- || (ptr1->MaxCommand <= ptr1->GoingSRBCnt))
- ptr1 = ptr1->pNextDCB;
+ acb->dcb_run_robin = ptr1->next;
+ if (!(srb = ptr1->waiting_srb)
+ || (ptr1->max_command <= ptr1->going_srb_count))
+ ptr1 = ptr1->next;
else {
/* Try to send to the bus */
- if (!DC395x_StartSCSI(pACB, ptr1, pSRB))
- DC395x_Waiting_to_Going(ptr1, pSRB);
+ if (!start_scsi(acb, ptr1, srb))
+ move_srb_waiting_to_going(ptr1, srb);
else
- DC395x_waiting_timer(pACB, HZ / 50);
+ waiting_set_timer(acb, HZ / 50);
break;
}
} while (ptr1 != ptr);
@@ -1156,64 +1109,65 @@
/* Wake up waiting queue */
-void DC395x_waiting_timed_out(unsigned long ptr)
+static void waiting_timeout(unsigned long ptr)
{
unsigned long flags;
- struct AdapterCtlBlk *pACB = (struct AdapterCtlBlk *) ptr;
+ struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *) ptr;
dprintkdbg(DBG_KG, "Debug: Waiting queue woken up by timer.\n");
- DC395x_LOCK_IO(pACB->pScsiHost);
- DC395x_Waiting_process(pACB);
- DC395x_UNLOCK_IO(pACB->pScsiHost);
+ DC395x_LOCK_IO(acb->scsi_host, flags);
+ waiting_process_next(acb);
+ DC395x_UNLOCK_IO(acb->scsi_host, flags);
}
/* Get the DCB for a given ID/LUN combination */
-static inline struct DeviceCtlBlk *DC395x_findDCB(struct AdapterCtlBlk
- *pACB, u8 id, u8 lun)
+static inline
+struct DeviceCtlBlk *find_dcb(struct AdapterCtlBlk *acb, u8 id, u8 lun)
{
- return pACB->children[id][lun];
+ return acb->children[id][lun];
}
/***********************************************************************
- * Function: static void DC395x_SendSRB (struct AdapterCtlBlk* pACB, struct ScsiReqBlk* pSRB)
+ * Function: static void send_srb (struct AdapterCtlBlk* acb, struct ScsiReqBlk* srb)
*
- * Purpose: Send SCSI Request Block (pSRB) to adapter (pACB)
+ * Purpose: Send SCSI Request Block (srb) to adapter (acb)
*
- * DC395x_queue_command
- * DC395x_Waiting_process
+ * dc395x_queue_command
+ * waiting_process_next
*
***********************************************************************/
-static void
-DC395x_SendSRB(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static
+void send_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
- struct DeviceCtlBlk *pDCB;
+ struct DeviceCtlBlk *dcb;
- pDCB = pSRB->pSRBDCB;
- if ((pDCB->MaxCommand <= pDCB->GoingSRBCnt) || (pACB->pActiveDCB)
- || (pACB->ACBFlag & (RESET_DETECT + RESET_DONE + RESET_DEV))) {
- DC395x_Waiting_append(pDCB, pSRB);
- DC395x_Waiting_process(pACB);
+ dcb = srb->dcb;
+ if ((dcb->max_command <= dcb->going_srb_count) ||
+ (acb->active_dcb) ||
+ (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV))) {
+ append_srb_waiting(dcb, srb);
+ waiting_process_next(acb);
return;
}
#if 0
- if (pDCB->pWaitingSRB) {
- DC395x_Waiting_append(pDCB, pSRB);
- /* pSRB = GetWaitingSRB(pDCB); *//* non-existent */
- pSRB = pDCB->pWaitingSRB;
+ if (dcb->waiting_srb) {
+ append_srb_waiting(dcb, srb);
+ /* srb = waiting_srb_get(dcb); *//* non-existent */
+ srb = dcb->waiting_srb;
/* Remove from waiting list */
- pDCB->pWaitingSRB = pSRB->pNextSRB;
- pSRB->pNextSRB = NULL;
- if (!pDCB->pWaitingSRB)
- pDCB->pWaitLast = NULL;
+ dcb->waiting_srb = srb->next;
+ srb->next = NULL;
+ if (!dcb->waiting_srb)
+ dcb->wait_list = NULL;
}
#endif
- if (!DC395x_StartSCSI(pACB, pDCB, pSRB))
- DC395x_Going_append(pDCB, pSRB);
+ if (!start_scsi(acb, dcb, srb))
+ append_srb_going(dcb, srb);
else {
- DC395x_Waiting_insert(pDCB, pSRB);
- DC395x_waiting_timer(pACB, HZ / 50);
+ insert_srb_waiting(dcb, srb);
+ waiting_set_timer(acb, HZ / 50);
}
}
@@ -1221,15 +1175,15 @@
/*
*********************************************************************
*
- * Function: static void DC395x_BuildSRB (Scsi_Cmd *pcmd, struct DeviceCtlBlk* pDCB, struct ScsiReqBlk* pSRB)
+ * Function: static void build_srb (Scsi_Cmd *cmd, struct DeviceCtlBlk* dcb, struct ScsiReqBlk* srb)
*
- * Purpose: Prepare SRB for being sent to Device DCB w/ command *pcmd
+ * Purpose: Prepare SRB for being sent to Device DCB w/ command *cmd
*
*********************************************************************
*/
-static void
-DC395x_BuildSRB(Scsi_Cmnd * pcmd, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB)
+static
+void build_srb(Scsi_Cmnd * cmd, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
int i, max;
struct SGentry *sgp;
@@ -1237,33 +1191,33 @@
u32 request_size;
int dir;
- dprintkdbg(DBG_0, "DC395x_BuildSRB..............\n");
- /*memset (pSRB, 0, sizeof (struct ScsiReqBlk)); */
- pSRB->pSRBDCB = pDCB;
- pSRB->pcmd = pcmd;
+ dprintkdbg(DBG_0, "build_srb..............\n");
+ /*memset (srb, 0, sizeof (struct ScsiReqBlk)); */
+ srb->dcb = dcb;
+ srb->cmd = cmd;
/* Find out about direction */
- dir = scsi_to_pci_dma_dir(pcmd->sc_data_direction);
+ dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
- if (pcmd->use_sg && dir != PCI_DMA_NONE) {
+ if (cmd->use_sg && dir != PCI_DMA_NONE) {
unsigned int len = 0;
/* TODO: In case usg_sg and the no of segments differ, things
* will probably go wrong. */
- max = pSRB->SRBSGCount =
- pci_map_sg(pDCB->pDCBACB->pdev,
- (struct scatterlist *) pcmd->request_buffer,
- pcmd->use_sg, dir);
- sgp = pSRB->SegmentX;
- request_size = pcmd->request_bufflen;
+ max = srb->sg_count =
+ pci_map_sg(dcb->acb->dev,
+ (struct scatterlist *) cmd->request_buffer,
+ cmd->use_sg, dir);
+ sgp = srb->segment_x;
+ request_size = cmd->request_bufflen;
dprintkdbg(DBG_SGPARANOIA,
"BuildSRB: Bufflen = %d, buffer = %p, use_sg = %d\n",
- pcmd->request_bufflen, pcmd->request_buffer,
- pcmd->use_sg);
+ cmd->request_bufflen, cmd->request_buffer,
+ cmd->use_sg);
dprintkdbg(DBG_SGPARANOIA,
- "Mapped %i Segments to %i\n", pcmd->use_sg,
- pSRB->SRBSGCount);
- sl = (struct scatterlist *) pcmd->request_buffer;
+ "Mapped %i Segments to %i\n", cmd->use_sg,
+ srb->sg_count);
+ sl = (struct scatterlist *) cmd->request_buffer;
- pSRB->virt_addr = page_address(sl->page);
+ srb->virt_addr = page_address(sl->page);
for (i = 0; i < max; i++) {
u32 busaddr = (u32) sg_dma_address(&sl[i]);
u32 seglen = (u32) sl[i].length;
@@ -1287,150 +1241,117 @@
len = request_size;
}
/* WIDE padding */
- if (pDCB->SyncPeriod & WIDE_SYNC && len % 2) {
+ if (dcb->sync_period & WIDE_SYNC && len % 2) {
len++;
sgp->length++;
}
- pSRB->SRBTotalXferLength = len; /*? */
+ srb->total_xfer_length = len; /*? */
/* Hopefully this does not cross a page boundary ... */
- pSRB->SRBSGBusAddr =
- pci_map_single(pDCB->pDCBACB->pdev, pSRB->SegmentX,
+ srb->sg_bus_addr =
+ pci_map_single(dcb->acb->dev, srb->segment_x,
sizeof(struct SGentry) *
DC395x_MAX_SG_LISTENTRY,
PCI_DMA_TODEVICE);
dprintkdbg(DBG_SGPARANOIA,
"Map SG descriptor list %p (%05x) to %08x\n",
- pSRB->SegmentX,
+ srb->segment_x,
sizeof(struct SGentry) * DC395x_MAX_SG_LISTENTRY,
- pSRB->SRBSGBusAddr);
+ srb->sg_bus_addr);
} else {
- if (pcmd->request_buffer && dir != PCI_DMA_NONE) {
- u32 len = pcmd->request_bufflen; /* Actual request size */
- pSRB->SRBSGCount = 1;
- pSRB->SegmentX[0].address =
- pci_map_single(pDCB->pDCBACB->pdev,
- pcmd->request_buffer, len, dir);
+ if (cmd->request_buffer && dir != PCI_DMA_NONE) {
+ u32 len = cmd->request_bufflen; /* Actual request size */
+ srb->sg_count = 1;
+ srb->segment_x[0].address =
+ pci_map_single(dcb->acb->dev,
+ cmd->request_buffer, len, dir);
/* WIDE padding */
- if (pDCB->SyncPeriod & WIDE_SYNC && len % 2)
+ if (dcb->sync_period & WIDE_SYNC && len % 2)
len++;
- pSRB->SegmentX[0].length = len;
- pSRB->SRBTotalXferLength = len;
- pSRB->virt_addr = pcmd->request_buffer;
- pSRB->SRBSGBusAddr = 0;
+ srb->segment_x[0].length = len;
+ srb->total_xfer_length = len;
+ srb->virt_addr = cmd->request_buffer;
+ srb->sg_bus_addr = 0;
dprintkdbg(DBG_SGPARANOIA,
"BuildSRB: len = %d, buffer = %p, use_sg = %d, map %08x\n",
- len, pcmd->request_buffer, pcmd->use_sg,
- pSRB->SegmentX[0].address);
+ len, cmd->request_buffer, cmd->use_sg,
+ srb->segment_x[0].address);
} else {
- pSRB->SRBSGCount = 0;
- pSRB->SRBTotalXferLength = 0;
- pSRB->SRBSGBusAddr = 0;
- pSRB->virt_addr = 0;
+ srb->sg_count = 0;
+ srb->total_xfer_length = 0;
+ srb->sg_bus_addr = 0;
+ srb->virt_addr = 0;
dprintkdbg(DBG_SGPARANOIA,
"BuildSRB: buflen = %d, buffer = %p, use_sg = %d, NOMAP %08x\n",
- pcmd->bufflen, pcmd->request_buffer,
- pcmd->use_sg, pSRB->SegmentX[0].address);
+ cmd->bufflen, cmd->request_buffer,
+ cmd->use_sg, srb->segment_x[0].address);
}
}
- pSRB->SRBSGIndex = 0;
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
- pSRB->MsgCnt = 0;
- pSRB->SRBStatus = 0;
- pSRB->SRBFlag = 0;
- pSRB->SRBState = 0;
- pSRB->RetryCnt = 0;
+ srb->sg_index = 0;
+ srb->adapter_status = 0;
+ srb->target_status = 0;
+ srb->msg_count = 0;
+ srb->status = 0;
+ srb->flag = 0;
+ srb->state = 0;
+ srb->retry_count = 0;
#if debug_enabled(DBG_TRACE|DBG_TRACEALL) && debug_enabled(DBG_SGPARANOIA)
- if ((unsigned long)pSRB->debugtrace & (DEBUGTRACEBUFSZ - 1)) {
+ if ((unsigned long)srb->debugtrace & (DEBUGTRACEBUFSZ - 1)) {
dprintkdbg(DBG_SGPARANOIA,
"SRB %i (%p): debugtrace %p corrupt!\n",
- (pSRB - pDCB->pDCBACB->SRB_array) /
- sizeof(struct ScsiReqBlk), pSRB, pSRB->debugtrace);
+ (srb - dcb->acb->srb_array) /
+ sizeof(struct ScsiReqBlk), srb, srb->debugtrace);
}
#endif
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
- pSRB->debugpos = 0;
- pSRB->debugtrace = 0;
+ srb->debugpos = 0;
+ srb->debugtrace = 0;
#endif
- TRACEPRINTF("pid %li(%li):%02x %02x..(%i-%i) *", pcmd->pid,
- jiffies, pcmd->cmnd[0], pcmd->cmnd[1],
- pcmd->device->id, pcmd->device->lun);
- pSRB->TagNumber = TAG_NONE;
+ TRACEPRINTF("pid %li(%li):%02x %02x..(%i-%i) *", cmd->pid,
+ jiffies, cmd->cmnd[0], cmd->cmnd[1],
+ cmd->device->id, cmd->device->lun);
+ srb->tag_number = TAG_NONE;
- pSRB->ScsiPhase = PH_BUS_FREE; /* initial phase */
- pSRB->EndMessage = 0;
+ srb->scsi_phase = PH_BUS_FREE; /* initial phase */
+ srb->end_message = 0;
return;
}
-/* Put cmnd from Query to Waiting list and send next Waiting cmnd */
-static void DC395x_Query_to_Waiting(struct AdapterCtlBlk *pACB)
-{
- Scsi_Cmnd *pcmd;
- struct ScsiReqBlk *pSRB;
- struct DeviceCtlBlk *pDCB;
-
- if (pACB->ACBFlag & (RESET_DETECT + RESET_DONE + RESET_DEV))
- return;
-
- while (pACB->QueryCnt) {
- pSRB = DC395x_Free_get(pACB);
- if (!pSRB)
- return;
- pcmd = DC395x_Query_get(pACB);
- if (!pcmd) {
- DC395x_Free_insert(pACB, pSRB);
- return;
- } /* should not happen */
- pDCB =
- DC395x_findDCB(pACB, pcmd->device->id,
- pcmd->device->lun);
- if (!pDCB) {
- DC395x_Free_insert(pACB, pSRB);
- dprintkl(KERN_ERR, "Command in queue to non-existing device!\n");
- pcmd->result =
- MK_RES(DRIVER_ERROR, DID_ERROR, 0, 0);
- /*DC395x_UNLOCK_ACB_NI; */
- pcmd->done(pcmd);
- /*DC395x_LOCK_ACB_NI; */
- }
- DC395x_BuildSRB(pcmd, pDCB, pSRB);
- DC395x_Waiting_append(pDCB, pSRB);
- }
-}
-
-/***********************************************************************
- * Function : static int DC395x_queue_command (Scsi_Cmnd *cmd,
- * void (*done)(Scsi_Cmnd *))
+/**
+ * dc395x_queue_command - queue scsi command passed from the mid
+ * layer, invoke 'done' on completion
*
- * Purpose : enqueues a SCSI command
+ * @cmd: pointer to scsi command object
+ * @done: function pointer to be invoked on completion
*
- * Inputs : cmd - SCSI command, done - callback function called on
- * completion, with a pointer to the command descriptor.
+ * Returns 1 if the adapter (host) is busy, else returns 0. One
+ * reason for an adapter to be busy is that the number
+ * of outstanding queued commands is already equal to
+ * struct Scsi_Host::can_queue .
*
- * Returns : (depending on kernel version)
- * 2.0.x: always return 0
- * 2.1.x: old model: (use_new_eh_code == 0): like 2.0.x
- * new model: return 0 if successful
- * return 1 if command cannot be queued (queue full)
- * command will be inserted in midlevel queue then ...
+ * Required: if struct Scsi_Host::can_queue is ever non-zero
+ * then this function is required.
*
- ***********************************************************************/
+ * Locks: struct Scsi_Host::host_lock held on entry (with "irqsave")
+ * and is expected to be held on return.
+ *
+ **/
static int
-DC395x_queue_command(Scsi_Cmnd * cmd, void (*done) (Scsi_Cmnd *))
+dc395x_queue_command(Scsi_Cmnd *cmd, void (*done)(Scsi_Cmnd *))
{
- struct DeviceCtlBlk *pDCB;
- struct ScsiReqBlk *pSRB;
- struct AdapterCtlBlk *pACB =
- (struct AdapterCtlBlk *) cmd->device->host->hostdata;
-
+ struct DeviceCtlBlk *dcb;
+ struct ScsiReqBlk *srb;
+ struct AdapterCtlBlk *acb =
+ (struct AdapterCtlBlk *)cmd->device->host->hostdata;
dprintkdbg(DBG_0, "Queue Cmd=%02x,Tgt=%d,LUN=%d (pid=%li)\n",
- cmd->cmnd[0], cmd->device->id,
- cmd->device->lun, cmd->pid);
+ cmd->cmnd[0],
+ cmd->device->id,
+ cmd->device->lun,
+ cmd->pid);
#if debug_enabled(DBG_RECURSION)
if (dbg_in_driver++ > NORM_REC_LVL) {
@@ -1443,198 +1364,134 @@
/* Assume BAD_TARGET; will be cleared later */
cmd->result = DID_BAD_TARGET << 16;
- if ((cmd->device->id >= pACB->pScsiHost->max_id)
- || (cmd->device->lun >= pACB->pScsiHost->max_lun)
- || (cmd->device->lun >31)) {
- /* dprintkl(KERN_INFO, "Ignore target %d lun %d\n",
- cmd->device->id, cmd->device->lun); */
-#if debug_enabled(DBG_RECURSION)
- dbg_in_driver--
-#endif
- /*return 1; */
- done(cmd);
- return 0;
+ /* ignore invalid targets */
+ if (cmd->device->id >= acb->scsi_host->max_id ||
+ cmd->device->lun >= acb->scsi_host->max_lun ||
+ cmd->device->lun >31) {
+ goto complete;
}
- if (!(pACB->DCBmap[cmd->device->id] & (1 << cmd->device->lun))) {
+ /* does the specified lun on the specified device exist */
+ if (!(acb->dcb_map[cmd->device->id] & (1 << cmd->device->lun))) {
dprintkl(KERN_INFO, "Ignore target %02x lun %02x\n", cmd->device->id,
cmd->device->lun);
- /*return 1; */
-#if debug_enabled(DBG_RECURSION)
- dbg_in_driver--
-#endif
- done(cmd);
- return 0;
- } else {
- pDCB =
- DC395x_findDCB(pACB, cmd->device->id,
- cmd->device->lun);
- if (!pDCB) { /* should never happen */
- dprintkl(KERN_ERR, "no DCB failed, target %02x lun %02x\n",
- cmd->device->id, cmd->device->lun);
- dprintkl(KERN_ERR, "No DCB in queuecommand (2)!\n");
-#if debug_enabled(DBG_RECURSION)
- dbg_in_driver--
-#endif
- return 1;
- }
+ goto complete;
+ }
+
+ /* do we have a DCB for the device */
+ dcb = find_dcb(acb, cmd->device->id, cmd->device->lun);
+ if (!dcb) {
+ /* should never happen */
+ dprintkl(KERN_ERR, "no DCB failed, target %02x lun %02x\n",
+ cmd->device->id, cmd->device->lun);
+ dprintkl(KERN_ERR, "No DCB in queuecommand (2)!\n");
+ goto complete;
}
- pACB->Cmds++;
+ /* set callback and clear result in the command */
cmd->scsi_done = done;
cmd->result = 0;
- DC395x_Query_to_Waiting(pACB);
+ /* get a free SRB */
+ srb = get_srb_free(acb);
+ if (!srb)
+ {
+ /*
+ * Return 1 since we are unable to queue this command at this
+ * point in time.
+ */
+ dprintkdbg(DBG_0, "No free SRB's in queuecommand\n");
+ return 1;
+ }
+
+ /* build srb for the command */
+ build_srb(cmd, dcb, srb);
- if (pACB->QueryCnt) {
- /* Unsent commands ? */
- dprintkdbg(DBG_0, "QueryCnt != 0\n");
- DC395x_Query_append(cmd, pACB);
- DC395x_Waiting_process(pACB);
+ if (dcb->waiting_srb) {
+ /* append to waiting queue */
+ append_srb_waiting(dcb, srb);
+ waiting_process_next(acb);
} else {
- if (pDCB->pWaitingSRB) {
- pSRB = DC395x_Free_get(pACB);
- if (debug_enabled(DBG_0)) {
- if (!pSRB)
- dprintkdbg(DBG_0, "No free SRB but Waiting\n");
- else
- dprintkdbg(DBG_0, "Free SRB w/ Waiting\n");
- }
- if (!pSRB) {
- DC395x_Query_append(cmd, pACB);
- } else {
- DC395x_BuildSRB(cmd, pDCB, pSRB);
- DC395x_Waiting_append(pDCB, pSRB);
- }
- DC395x_Waiting_process(pACB);
- } else {
- pSRB = DC395x_Free_get(pACB);
- if (debug_enabled(DBG_0)) {
- if (!pSRB)
- dprintkdbg(DBG_0, "No free SRB w/o Waiting\n");
- else
- dprintkdbg(DBG_0, "Free SRB w/o Waiting\n");
- }
- if (!pSRB) {
- DC395x_Query_append(cmd, pACB);
- DC395x_Waiting_process(pACB);
- } else {
- DC395x_BuildSRB(cmd, pDCB, pSRB);
- DC395x_SendSRB(pACB, pSRB);
- }
- }
+ /* process immediately */
+ send_srb(acb, srb);
}
-
- /*DC395x_ACB_LOCK(pACB,acb_flags); */
dprintkdbg(DBG_1, "... command (pid %li) queued successfully.\n", cmd->pid);
+
#if debug_enabled(DBG_RECURSION)
dbg_in_driver--
#endif
return 0;
+
+complete:
+ /*
+ * Complete the command immediatey, and then return 0 to
+ * indicate that we have handled the command. This is usually
+ * done when the commad is for things like non existent
+ * devices.
+ */
+#if debug_enabled(DBG_RECURSION)
+ dbg_in_driver--
+#endif
+ done(cmd);
+ return 0;
}
/***********************************************************************
- * Function static int DC395x_slave_alloc()
+ * Function static int dc395x_slave_alloc()
*
* Purpose: Allocate DCB
***********************************************************************/
-static int DC395x_slave_alloc(struct scsi_device *sdp)
+static int dc395x_slave_alloc(struct scsi_device *sdp)
{
- struct AdapterCtlBlk *pACB;
+ struct AdapterCtlBlk *acb;
struct DeviceCtlBlk *dummy;
- pACB = (struct AdapterCtlBlk *) sdp->host->hostdata;
+ acb = (struct AdapterCtlBlk *) sdp->host->hostdata;
- DC395x_initDCB(pACB, &dummy, sdp->id, sdp->lun);
+ init_dcb(acb, &dummy, sdp->id, sdp->lun);
return dummy ? 0 : -ENOMEM;
}
-static void DC395x_slave_destroy(struct scsi_device *sdp)
+static void dc395x_slave_destroy(struct scsi_device *sdp)
{
- struct AdapterCtlBlk *ACB;
- struct DeviceCtlBlk *DCB;
+ struct AdapterCtlBlk *acb;
+ struct DeviceCtlBlk *dcb;
- ACB = (struct AdapterCtlBlk *) sdp->host->hostdata;
- DCB = DC395x_findDCB(ACB, sdp->id, sdp->lun);
+ acb = (struct AdapterCtlBlk *) sdp->host->hostdata;
+ dcb = find_dcb(acb, sdp->id, sdp->lun);
- DC395x_remove_dev(ACB, DCB);
-}
-
-
-/***********************************************************************
- * Function : static void DC395_updateDCB()
- *
- * Purpose : Set the configuration dependent DCB parameters
- ***********************************************************************/
-void
-DC395x_updateDCB(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB)
-{
- /* Prevent disconnection of narrow devices if this_id > 7 */
- if (!(pDCB->DevMode & NTC_DO_WIDE_NEGO)
- && pACB->pScsiHost->this_id > 7)
- pDCB->DevMode &= ~NTC_DO_DISCONNECT;
-
- /* TagQ w/o DisCn is impossible */
- if (!(pDCB->DevMode & NTC_DO_DISCONNECT))
- pDCB->DevMode &= ~NTC_DO_TAG_QUEUEING;
- pDCB->IdentifyMsg =
- IDENTIFY((pDCB->DevMode & NTC_DO_DISCONNECT), pDCB->TargetLUN);
-
- pDCB->SyncMode &=
- EN_TAG_QUEUEING | SYNC_NEGO_DONE | WIDE_NEGO_DONE
- /*| EN_ATN_STOP */ ;
- if (pDCB->DevMode & NTC_DO_TAG_QUEUEING) {
- if (pDCB->SyncMode & EN_TAG_QUEUEING)
- pDCB->MaxCommand = pACB->TagMaxNum;
- } else {
- pDCB->SyncMode &= ~EN_TAG_QUEUEING;
- pDCB->MaxCommand = 1;
- }
-
- if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
- pDCB->SyncMode |= SYNC_NEGO_ENABLE;
- else {
- pDCB->SyncMode &= ~(SYNC_NEGO_DONE | SYNC_NEGO_ENABLE);
- pDCB->SyncOffset &= ~0x0f;
- }
-
- if (pDCB->DevMode & NTC_DO_WIDE_NEGO
- && pACB->Config & HCC_WIDE_CARD)
- pDCB->SyncMode |= WIDE_NEGO_ENABLE;
- else {
- pDCB->SyncMode &= ~(WIDE_NEGO_DONE | WIDE_NEGO_ENABLE);
- pDCB->SyncPeriod &= ~WIDE_SYNC;
- }
- /*if (! (pDCB->DevMode & EN_DISCONNECT_)) pDCB->SyncMode &= ~EN_ATN_STOP; */
+ remove_dev(acb, dcb);
}
/*
*********************************************************************
*
- * Function : DC395x_bios_param
+ * Function : dc395x_bios_param
* Description: Return the disk geometry for the given SCSI device.
*********************************************************************
*/
-static int
-DC395x_bios_param(struct scsi_device *sdev, struct block_device *bdev,
- sector_t capacity, int *info)
+static
+int dc395x_bios_param(struct scsi_device *sdev,
+ struct block_device *bdev,
+ sector_t capacity,
+ int *info)
{
#ifdef CONFIG_SCSI_DC395x_TRMS1040_TRADMAP
int heads, sectors, cylinders;
- struct AdapterCtlBlk *pACB;
+ struct AdapterCtlBlk *acb;
int size = capacity;
- dprintkdbg(DBG_0, "DC395x_bios_param..............\n");
- pACB = (struct AdapterCtlBlk *) sdev->host->hostdata;
+ dprintkdbg(DBG_0, "dc395x_bios_param..............\n");
+ acb = (struct AdapterCtlBlk *) sdev->host->hostdata;
heads = 64;
sectors = 32;
cylinders = size / (heads * sectors);
- if ((pACB->Gmode2 & NAC_GREATER_1G) && (cylinders > 1024)) {
+ if ((acb->gmode2 & NAC_GREATER_1G) && (cylinders > 1024)) {
heads = 255;
sectors = 63;
cylinders = size / (heads * sectors);
@@ -1652,338 +1509,307 @@
/*
* DC395x register dump
*/
-void
-DC395x_dumpinfo(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB)
+static
+void dump_register_info(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
u16 pstat;
- struct pci_dev *pdev = pACB->pdev;
- pci_read_config_word(pdev, PCI_STATUS, &pstat);
- if (!pDCB)
- pDCB = pACB->pActiveDCB;
- if (!pSRB && pDCB)
- pSRB = pDCB->pActiveSRB;
- if (pSRB) {
- if (!(pSRB->pcmd))
- dprintkl(KERN_INFO, "dump: SRB %p: cmd %p OOOPS!\n", pSRB,
- pSRB->pcmd);
+ struct pci_dev *dev = acb->dev;
+ pci_read_config_word(dev, PCI_STATUS, &pstat);
+ if (!dcb)
+ dcb = acb->active_dcb;
+ if (!srb && dcb)
+ srb = dcb->active_srb;
+ if (srb) {
+ if (!(srb->cmd))
+ dprintkl(KERN_INFO, "dump: SRB %p: cmd %p OOOPS!\n", srb,
+ srb->cmd);
else
dprintkl(KERN_INFO, "dump: SRB %p: cmd %p pid %li: %02x (%02i-%i)\n",
- pSRB, pSRB->pcmd, pSRB->pcmd->pid,
- pSRB->pcmd->cmnd[0], pSRB->pcmd->device->id,
- pSRB->pcmd->device->lun);
+ srb, srb->cmd, srb->cmd->pid,
+ srb->cmd->cmnd[0], srb->cmd->device->id,
+ srb->cmd->device->lun);
printk(" SGList %p Cnt %i Idx %i Len %i\n",
- pSRB->SegmentX, pSRB->SRBSGCount, pSRB->SRBSGIndex,
- pSRB->SRBTotalXferLength);
+ srb->segment_x, srb->sg_count, srb->sg_index,
+ srb->total_xfer_length);
printk
(" State %04x Status %02x Phase %02x (%sconn.)\n",
- pSRB->SRBState, pSRB->SRBStatus, pSRB->ScsiPhase,
- (pACB->pActiveDCB) ? "" : "not");
- TRACEOUT(" %s\n", pSRB->debugtrace);
+ srb->state, srb->status, srb->scsi_phase,
+ (acb->active_dcb) ? "" : "not");
+ TRACEOUT(" %s\n", srb->debugtrace);
}
dprintkl(KERN_INFO, "dump: SCSI block\n");
printk
(" Status %04x FIFOCnt %02x Signals %02x IRQStat %02x\n",
- DC395x_read16(TRM_S1040_SCSI_STATUS),
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT),
- DC395x_read8(TRM_S1040_SCSI_SIGNAL),
- DC395x_read8(TRM_S1040_SCSI_INTSTATUS));
+ DC395x_read16(acb, TRM_S1040_SCSI_STATUS),
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL),
+ DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS));
printk
(" Sync %02x Target %02x RSelID %02x SCSICtr %08x\n",
- DC395x_read8(TRM_S1040_SCSI_SYNC),
- DC395x_read8(TRM_S1040_SCSI_TARGETID),
- DC395x_read8(TRM_S1040_SCSI_IDMSG),
- DC395x_read32(TRM_S1040_SCSI_COUNTER));
+ DC395x_read8(acb, TRM_S1040_SCSI_SYNC),
+ DC395x_read8(acb, TRM_S1040_SCSI_TARGETID),
+ DC395x_read8(acb, TRM_S1040_SCSI_IDMSG),
+ DC395x_read32(acb, TRM_S1040_SCSI_COUNTER));
printk
(" IRQEn %02x Config %04x Cfg2 %02x Cmd %02x SelTO %02x\n",
- DC395x_read8(TRM_S1040_SCSI_INTEN),
- DC395x_read16(TRM_S1040_SCSI_CONFIG0),
- DC395x_read8(TRM_S1040_SCSI_CONFIG2),
- DC395x_read8(TRM_S1040_SCSI_COMMAND),
- DC395x_read8(TRM_S1040_SCSI_TIMEOUT));
+ DC395x_read8(acb, TRM_S1040_SCSI_INTEN),
+ DC395x_read16(acb, TRM_S1040_SCSI_CONFIG0),
+ DC395x_read8(acb, TRM_S1040_SCSI_CONFIG2),
+ DC395x_read8(acb, TRM_S1040_SCSI_COMMAND),
+ DC395x_read8(acb, TRM_S1040_SCSI_TIMEOUT));
dprintkl(KERN_INFO, "dump: DMA block\n");
printk
(" Cmd %04x FIFOCnt %02x FStat %02x IRQStat %02x IRQEn %02x Cfg %04x\n",
- DC395x_read16(TRM_S1040_DMA_COMMAND),
- DC395x_read8(TRM_S1040_DMA_FIFOCNT),
- DC395x_read8(TRM_S1040_DMA_FIFOSTAT),
- DC395x_read8(TRM_S1040_DMA_STATUS),
- DC395x_read8(TRM_S1040_DMA_INTEN),
- DC395x_read16(TRM_S1040_DMA_CONFIG));
+ DC395x_read16(acb, TRM_S1040_DMA_COMMAND),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
+ DC395x_read8(acb, TRM_S1040_DMA_STATUS),
+ DC395x_read8(acb, TRM_S1040_DMA_INTEN),
+ DC395x_read16(acb, TRM_S1040_DMA_CONFIG));
printk(" TCtr %08x CTCtr %08x Addr %08x%08x\n",
- DC395x_read32(TRM_S1040_DMA_XCNT),
- DC395x_read32(TRM_S1040_DMA_CXCNT),
- DC395x_read32(TRM_S1040_DMA_XHIGHADDR),
- DC395x_read32(TRM_S1040_DMA_XLOWADDR));
+ DC395x_read32(acb, TRM_S1040_DMA_XCNT),
+ DC395x_read32(acb, TRM_S1040_DMA_CXCNT),
+ DC395x_read32(acb, TRM_S1040_DMA_XHIGHADDR),
+ DC395x_read32(acb, TRM_S1040_DMA_XLOWADDR));
dprintkl(KERN_INFO, "dump: Misc: GCtrl %02x GStat %02x GTmr %02x\n",
- DC395x_read8(TRM_S1040_GEN_CONTROL),
- DC395x_read8(TRM_S1040_GEN_STATUS),
- DC395x_read8(TRM_S1040_GEN_TIMER));
+ DC395x_read8(acb, TRM_S1040_GEN_CONTROL),
+ DC395x_read8(acb, TRM_S1040_GEN_STATUS),
+ DC395x_read8(acb, TRM_S1040_GEN_TIMER));
dprintkl(KERN_INFO, "dump: PCI Status %04x\n", pstat);
}
-static inline void DC395x_clrfifo(struct AdapterCtlBlk *pACB, char *txt)
+static inline void clear_fifo(struct AdapterCtlBlk *acb, char *txt)
{
#if debug_enabled(DBG_FIFO)
- u8 lines = DC395x_read8(TRM_S1040_SCSI_SIGNAL);
- u8 fifocnt = DC395x_read8(TRM_S1040_SCSI_FIFOCNT);
+ u8 lines = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
+ u8 fifocnt = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
if (!(fifocnt & 0x40))
dprintkdbg(DBG_FIFO,
"Clr FIFO (%i bytes) on phase %02x in %s\n",
fifocnt & 0x3f, lines, txt);
#endif
#if debug_enabled(DBG_TRACE)
- if (pACB->pActiveDCB && pACB->pActiveDCB->pActiveSRB) {
- struct ScsiReqBlk *pSRB = pACB->pActiveDCB->pActiveSRB;
+ if (acb->active_dcb && acb->active_dcb->active_srb) {
+ struct ScsiReqBlk *srb = acb->active_dcb->active_srb;
TRACEPRINTF("#*");
}
#endif
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_CLRFIFO);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRFIFO);
}
/*
********************************************************************
*
- * DC395x_reset DC395x_ScsiRstDetect
+ * DC395x_reset scsi_reset_detect
*
********************************************************************
*/
-static void DC395x_ResetDevParam(struct AdapterCtlBlk *pACB)
+static void reset_dev_param(struct AdapterCtlBlk *acb)
{
- struct DeviceCtlBlk *pDCB;
- struct DeviceCtlBlk *pDCBTemp;
+ struct DeviceCtlBlk *dcb;
+ struct DeviceCtlBlk *dcb_temp;
struct NvRamType *eeprom;
- u8 PeriodIndex;
+ u8 period_index;
u16 index;
- dprintkdbg(DBG_0, "DC395x_ResetDevParam..............\n");
- pDCB = pACB->pLinkDCB;
- if (pDCB == NULL)
+ dprintkdbg(DBG_0, "reset_dev_param..............\n");
+ dcb = acb->link_dcb;
+ if (dcb == NULL)
return;
- pDCBTemp = pDCB;
+ dcb_temp = dcb;
do {
- pDCB->SyncMode &= ~(SYNC_NEGO_DONE + WIDE_NEGO_DONE);
- pDCB->SyncPeriod = 0;
- pDCB->SyncOffset = 0;
- index = pACB->AdapterIndex;
- eeprom = &dc395x_trm_eepromBuf[index];
-
- pDCB->DevMode =
- eeprom->NvramTarget[pDCB->TargetID].NvmTarCfg0;
- /*pDCB->AdpMode = eeprom->NvramChannelCfg; */
- PeriodIndex =
- eeprom->NvramTarget[pDCB->TargetID].
- NvmTarPeriod & 0x07;
- pDCB->MinNegoPeriod = dc395x_clock_period[PeriodIndex];
- if (!(pDCB->DevMode & NTC_DO_WIDE_NEGO)
- || !(pACB->Config & HCC_WIDE_CARD))
- pDCB->SyncMode &= ~WIDE_NEGO_ENABLE;
+ dcb->sync_mode &= ~(SYNC_NEGO_DONE + WIDE_NEGO_DONE);
+ dcb->sync_period = 0;
+ dcb->sync_offset = 0;
+ index = acb->adapter_index;
+ eeprom = &eeprom_buf[index];
+
+ dcb->dev_mode = eeprom->target[dcb->target_id].cfg0;
+ /*dcb->AdpMode = eeprom->channel_cfg; */
+ period_index = eeprom->target[dcb->target_id].period & 0x07;
+ dcb->min_nego_period = clock_period[period_index];
+ if (!(dcb->dev_mode & NTC_DO_WIDE_NEGO)
+ || !(acb->config & HCC_WIDE_CARD))
+ dcb->sync_mode &= ~WIDE_NEGO_ENABLE;
- pDCB = pDCB->pNextDCB;
+ dcb = dcb->next;
}
- while (pDCBTemp != pDCB && pDCB != NULL);
+ while (dcb_temp != dcb && dcb != NULL);
}
/*
*********************************************************************
- * Function : int DC395x_eh_bus_reset(Scsi_Cmnd *cmd)
+ * Function : int dc395x_eh_bus_reset(Scsi_Cmnd *cmd)
* Purpose : perform a hard reset on the SCSI bus
* Inputs : cmd - some command for this host (for fetching hooks)
* Returns : SUCCESS (0x2002) on success, else FAILED (0x2003).
*********************************************************************
*/
-static int DC395x_eh_bus_reset(Scsi_Cmnd * cmd)
+static int dc395x_eh_bus_reset(Scsi_Cmnd * cmd)
{
- struct AdapterCtlBlk *pACB;
+ struct AdapterCtlBlk *acb;
/*u32 acb_flags=0; */
dprintkl(KERN_INFO, "reset requested!\n");
- pACB = (struct AdapterCtlBlk *) cmd->device->host->hostdata;
+ acb = (struct AdapterCtlBlk *) cmd->device->host->hostdata;
/* mid level guarantees no recursion */
- /*DC395x_ACB_LOCK(pACB,acb_flags); */
+ /*DC395x_ACB_LOCK(acb,acb_flags); */
- if (timer_pending(&pACB->Waiting_Timer))
- del_timer(&pACB->Waiting_Timer);
+ if (timer_pending(&acb->waiting_timer))
+ del_timer(&acb->waiting_timer);
/*
* disable interrupt
*/
- DC395x_write8(TRM_S1040_DMA_INTEN, 0x00);
- DC395x_write8(TRM_S1040_SCSI_INTEN, 0x00);
- DC395x_write8(TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
- DC395x_write8(TRM_S1040_DMA_CONTROL, DMARESETMODULE);
+ DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00);
+ DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00);
+ DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
- DC395x_ResetSCSIBus(pACB);
+ reset_scsi_bus(acb);
udelay(500);
/* We may be in serious trouble. Wait some seconds */
- pACB->pScsiHost->last_reset =
+ acb->scsi_host->last_reset =
jiffies + 3 * HZ / 2 +
- HZ * dc395x_trm_eepromBuf[pACB->AdapterIndex].NvramDelayTime;
+ HZ * eeprom_buf[acb->adapter_index].delay_time;
/*
* re-enable interrupt
*/
/* Clear SCSI FIFO */
- DC395x_write8(TRM_S1040_DMA_CONTROL, CLRXFIFO);
- DC395x_clrfifo(pACB, "reset");
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
+ clear_fifo(acb, "reset");
/* Delete pending IRQ */
- DC395x_read8(TRM_S1040_SCSI_INTSTATUS);
- DC395x_basic_config(pACB);
+ DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
+ set_basic_config(acb);
- DC395x_ResetDevParam(pACB);
- DC395x_DoingSRB_Done(pACB, DID_RESET, cmd, 0);
+ reset_dev_param(acb);
+ doing_srb_done(acb, DID_RESET, cmd, 0);
- pACB->pActiveDCB = NULL;
+ acb->active_dcb = NULL;
- pACB->ACBFlag = 0; /* RESET_DETECT, RESET_DONE ,RESET_DEV */
- DC395x_Waiting_process(pACB);
+ acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE ,RESET_DEV */
+ waiting_process_next(acb);
- /*DC395x_ACB_LOCK(pACB,acb_flags); */
+ /*DC395x_ACB_LOCK(acb,acb_flags); */
return SUCCESS;
}
/*
*********************************************************************
- * Function : int DC395x_eh_abort(Scsi_Cmnd *cmd)
+ * Function : int dc395x_eh_abort(Scsi_Cmnd *cmd)
* Purpose : abort an errant SCSI command
* Inputs : cmd - command to be aborted
* Returns : SUCCESS (0x2002) on success, else FAILED (0x2003).
*********************************************************************
*/
-static int DC395x_eh_abort(Scsi_Cmnd * cmd)
+static int dc395x_eh_abort(Scsi_Cmnd * cmd)
{
/*
* Look into our command queues: If it has not been sent already,
* we remove it and return success. Otherwise fail.
- * First check the Query Queues, then the Waiting ones
*/
- struct AdapterCtlBlk *pACB =
+ struct AdapterCtlBlk *acb =
(struct AdapterCtlBlk *) cmd->device->host->hostdata;
- struct DeviceCtlBlk *pDCB;
- struct ScsiReqBlk *pSRB;
- int cnt = pACB->QueryCnt;
- Scsi_Cmnd *pcmd;
- Scsi_Cmnd *last = 0;
+ struct DeviceCtlBlk *dcb;
+ struct ScsiReqBlk *srb;
+
dprintkl(KERN_INFO, "eh abort: cmd %p (pid %li, %02i-%i) ",
- cmd, cmd->pid, cmd->device->id, cmd->device->lun);
- for (pcmd = pACB->pQueryHead; cnt--;
- last = pcmd, pcmd = (Scsi_Cmnd *) pcmd->host_scribble) {
- if (pcmd == cmd) {
- /* unqueue */
- if (last) {
- last->host_scribble = pcmd->host_scribble;
- if (!pcmd->host_scribble)
- pACB->pQueryTail = last;
- } else {
- pACB->pQueryHead =
- (Scsi_Cmnd *) pcmd->host_scribble;
- if (!pcmd->host_scribble)
- pACB->pQueryTail = 0;
- }
- printk("found in Query queue :-)\n");
- pACB->QueryCnt--;
- cmd->result = DID_ABORT << 16;
- return SUCCESS;
- }
- }
- pDCB = DC395x_findDCB(pACB, cmd->device->id, cmd->device->lun);
- if (!pDCB) {
- printk("no DCB!\n");
+ cmd,
+ cmd->pid,
+ cmd->device->id,
+ cmd->device->lun);
+
+ dcb = find_dcb(acb, cmd->device->id, cmd->device->lun);
+ if (!dcb) {
+ dprintkl(KERN_DEBUG, "abort - no DCB found");
return FAILED;
}
- pSRB = DC395x_find_cmd(cmd, pDCB->pWaitingSRB);
- if (pSRB) {
- DC395x_Waiting_remove(pDCB, pSRB, 0);
- DC395x_pci_unmap_sense(pACB, pSRB);
- DC395x_pci_unmap(pACB, pSRB);
- DC395x_freetag(pDCB, pSRB);
- DC395x_Free_insert(pACB, pSRB);
- printk("found in waiting queue :-)\n");
+ srb = find_cmd(cmd, dcb->waiting_srb);
+ if (srb) {
+ remove_srb_waiting(dcb, srb, 0);
+ pci_unmap_srb_sense(acb, srb);
+ pci_unmap_srb(acb, srb);
+ free_tag(dcb, srb);
+ insert_srb_free(acb, srb);
+ dprintkl(KERN_DEBUG, "abort - command found in waiting commands queue");
cmd->result = DID_ABORT << 16;
return SUCCESS;
}
- pSRB = DC395x_find_cmd(cmd, pDCB->pGoingSRB);
- if (pSRB)
- printk("found in going queue :-(\n");
- else
- printk("not found!\n");
+ srb = find_cmd(cmd, dcb->going_srb);
+ if (srb) {
+ dprintkl(KERN_DEBUG, "abort - command currently in progress");
+ /* XXX: Should abort the command here */
+ } else {
+ dprintkl(KERN_DEBUG, "abort - command not found");
+ }
return FAILED;
}
-/*
- * TODO (new EH):
- * int (*eh_device_reset_handler)(Scsi_Cmnd *);
- * int (*eh_host_reset_handler)(Scsi_Cmnd *);
- *
- * remove Query Queue
- * investigate whether/which commands need to be ffed back to mid-layer
- * in _eh_reset()
- */
-
-
/* SDTR */
-static void
-DC395x_Build_SDTR(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB)
+static
+void build_sdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
- u8 *ptr = pSRB->MsgOutBuf + pSRB->MsgCnt;
- if (pSRB->MsgCnt > 1) {
+ u8 *ptr = srb->msgout_buf + srb->msg_count;
+ if (srb->msg_count > 1) {
dprintkl(KERN_INFO,
- "Build_SDTR: MsgOutBuf BUSY (%i: %02x %02x)\n",
- pSRB->MsgCnt, pSRB->MsgOutBuf[0],
- pSRB->MsgOutBuf[1]);
+ "Build_SDTR: msgout_buf BUSY (%i: %02x %02x)\n",
+ srb->msg_count, srb->msgout_buf[0],
+ srb->msgout_buf[1]);
return;
}
- if (!(pDCB->DevMode & NTC_DO_SYNC_NEGO)) {
- pDCB->SyncOffset = 0;
- pDCB->MinNegoPeriod = 200 >> 2;
- } else if (pDCB->SyncOffset == 0)
- pDCB->SyncOffset = SYNC_NEGO_OFFSET;
+ if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO)) {
+ dcb->sync_offset = 0;
+ dcb->min_nego_period = 200 >> 2;
+ } else if (dcb->sync_offset == 0)
+ dcb->sync_offset = SYNC_NEGO_OFFSET;
*ptr++ = MSG_EXTENDED; /* (01h) */
*ptr++ = 3; /* length */
*ptr++ = EXTENDED_SDTR; /* (01h) */
- *ptr++ = pDCB->MinNegoPeriod; /* Transfer period (in 4ns) */
- *ptr++ = pDCB->SyncOffset; /* Transfer period (max. REQ/ACK dist) */
- pSRB->MsgCnt += 5;
- pSRB->SRBState |= SRB_DO_SYNC_NEGO;
+ *ptr++ = dcb->min_nego_period; /* Transfer period (in 4ns) */
+ *ptr++ = dcb->sync_offset; /* Transfer period (max. REQ/ACK dist) */
+ srb->msg_count += 5;
+ srb->state |= SRB_DO_SYNC_NEGO;
TRACEPRINTF("S *");
}
/* SDTR */
-static void
-DC395x_Build_WDTR(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB)
+static
+void build_wdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
u8 wide =
- ((pDCB->DevMode & NTC_DO_WIDE_NEGO) & (pACB->
- Config & HCC_WIDE_CARD))
+ ((dcb->dev_mode & NTC_DO_WIDE_NEGO) & (acb->
+ config & HCC_WIDE_CARD))
? 1 : 0;
- u8 *ptr = pSRB->MsgOutBuf + pSRB->MsgCnt;
- if (pSRB->MsgCnt > 1) {
+ u8 *ptr = srb->msgout_buf + srb->msg_count;
+ if (srb->msg_count > 1) {
dprintkl(KERN_INFO,
- "Build_WDTR: MsgOutBuf BUSY (%i: %02x %02x)\n",
- pSRB->MsgCnt, pSRB->MsgOutBuf[0],
- pSRB->MsgOutBuf[1]);
+ "Build_WDTR: msgout_buf BUSY (%i: %02x %02x)\n",
+ srb->msg_count, srb->msgout_buf[0],
+ srb->msgout_buf[1]);
return;
}
*ptr++ = MSG_EXTENDED; /* (01h) */
*ptr++ = 2; /* length */
*ptr++ = EXTENDED_WDTR; /* (03h) */
*ptr++ = wide;
- pSRB->MsgCnt += 4;
- pSRB->SRBState |= SRB_DO_WIDE_NEGO;
+ srb->msg_count += 4;
+ srb->state |= SRB_DO_WIDE_NEGO;
TRACEPRINTF("W *");
}
@@ -1991,69 +1817,69 @@
#if 0
/* Timer to work around chip flaw: When selecting and the bus is
* busy, we sometimes miss a Selection timeout IRQ */
-void DC395x_selection_timeout_missed(unsigned long ptr);
+void selection_timeout_missed(unsigned long ptr);
/* Sets the timer to wake us up */
-static void DC395x_selto_timer(struct AdapterCtlBlk *pACB)
+static void selto_timer(struct AdapterCtlBlk *acb)
{
- if (timer_pending(&pACB->SelTO_Timer))
+ if (timer_pending(&acb->selto_timer))
return;
- init_timer(&pACB->SelTO_Timer);
- pACB->SelTO_Timer.function = DC395x_selection_timeout_missed;
- pACB->SelTO_Timer.data = (unsigned long) pACB;
+ init_timer(&acb->selto_timer);
+ acb->selto_timer.function = selection_timeout_missed;
+ acb->selto_timer.data = (unsigned long) acb;
if (time_before
- (jiffies + HZ, pACB->pScsiHost->last_reset + HZ / 2))
- pACB->SelTO_Timer.expires =
- pACB->pScsiHost->last_reset + HZ / 2 + 1;
+ (jiffies + HZ, acb->scsi_host->last_reset + HZ / 2))
+ acb->selto_timer.expires =
+ acb->scsi_host->last_reset + HZ / 2 + 1;
else
- pACB->SelTO_Timer.expires = jiffies + HZ + 1;
- add_timer(&pACB->SelTO_Timer);
+ acb->selto_timer.expires = jiffies + HZ + 1;
+ add_timer(&acb->selto_timer);
}
-void DC395x_selection_timeout_missed(unsigned long ptr)
+void selection_timeout_missed(unsigned long ptr)
{
unsigned long flags;
- struct AdapterCtlBlk *pACB = (struct AdapterCtlBlk *) ptr;
- struct ScsiReqBlk *pSRB;
+ struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *) ptr;
+ struct ScsiReqBlk *srb;
dprintkl(KERN_DEBUG, "Chip forgot to produce SelTO IRQ!\n");
- if (!pACB->pActiveDCB || !pACB->pActiveDCB->pActiveSRB) {
+ if (!acb->active_dcb || !acb->active_dcb->active_srb) {
dprintkl(KERN_DEBUG, "... but no cmd pending? Oops!\n");
return;
}
- DC395x_LOCK_IO(pACB->pScsiHost);
- pSRB = pACB->pActiveDCB->pActiveSRB;
+ DC395x_LOCK_IO(acb->scsi_host, flags);
+ srb = acb->active_dcb->active_srb;
TRACEPRINTF("N/TO *");
- DC395x_Disconnect(pACB);
- DC395x_UNLOCK_IO(pACB->pScsiHost);
+ disconnect(acb);
+ DC395x_UNLOCK_IO(acb->scsi_host, flags);
}
#endif
/*
* scsiio
- * DC395x_DoWaitingSRB DC395x_SRBdone
- * DC395x_SendSRB DC395x_RequestSense
+ * DC395x_DoWaitingSRB srb_done
+ * send_srb request_sense
*/
-u8
-DC395x_StartSCSI(struct AdapterCtlBlk * pACB, struct DeviceCtlBlk * pDCB,
- struct ScsiReqBlk * pSRB)
+static
+u8 start_scsi(struct AdapterCtlBlk * acb, struct DeviceCtlBlk * dcb,
+ struct ScsiReqBlk * srb)
{
u16 s_stat2, return_code;
u8 s_stat, scsicommand, i, identify_message;
u8 *ptr;
- dprintkdbg(DBG_0, "DC395x_StartSCSI..............\n");
- pSRB->TagNumber = TAG_NONE; /* pACB->TagMaxNum: had error read in eeprom */
+ dprintkdbg(DBG_0, "start_scsi..............\n");
+ srb->tag_number = TAG_NONE; /* acb->tag_max_num: had error read in eeprom */
- s_stat = DC395x_read8(TRM_S1040_SCSI_SIGNAL);
+ s_stat = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
s_stat2 = 0;
- s_stat2 = DC395x_read16(TRM_S1040_SCSI_STATUS);
+ s_stat2 = DC395x_read16(acb, TRM_S1040_SCSI_STATUS);
TRACEPRINTF("Start %02x *", s_stat);
#if 1
if (s_stat & 0x20 /* s_stat2 & 0x02000 */ ) {
dprintkdbg(DBG_KG,
"StartSCSI: pid %li(%02i-%i): BUSY %02x %04x\n",
- pSRB->pcmd->pid, pDCB->TargetID, pDCB->TargetLUN,
+ srb->cmd->pid, dcb->target_id, dcb->target_lun,
s_stat, s_stat2);
/*
* Try anyway?
@@ -2066,122 +1892,122 @@
* tried again after a short time
*/
TRACEPRINTF("^*");
- /*DC395x_selto_timer (pACB); */
- /*DC395x_monitor_next_IRQ = 1; */
+ /*selto_timer (acb); */
+ /*monitor_next_irq = 1; */
return 1;
}
#endif
- if (pACB->pActiveDCB) {
+ if (acb->active_dcb) {
dprintkl(KERN_DEBUG, "We try to start a SCSI command (%li)!\n",
- pSRB->pcmd->pid);
+ srb->cmd->pid);
dprintkl(KERN_DEBUG, "While another one (%li) is active!!\n",
- (pACB->pActiveDCB->pActiveSRB ? pACB->pActiveDCB->
- pActiveSRB->pcmd->pid : 0));
- TRACEOUT(" %s\n", pSRB->debugtrace);
- if (pACB->pActiveDCB->pActiveSRB)
+ (acb->active_dcb->active_srb ? acb->active_dcb->
+ active_srb->cmd->pid : 0));
+ TRACEOUT(" %s\n", srb->debugtrace);
+ if (acb->active_dcb->active_srb)
TRACEOUT(" %s\n",
- pACB->pActiveDCB->pActiveSRB->debugtrace);
+ acb->active_dcb->active_srb->debugtrace);
return 1;
}
- if (DC395x_read16(TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
+ if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
dprintkdbg(DBG_KG,
"StartSCSI failed (busy) for pid %li(%02i-%i)\n",
- pSRB->pcmd->pid, pDCB->TargetID, pDCB->TargetLUN);
+ srb->cmd->pid, dcb->target_id, dcb->target_lun);
TRACEPRINTF("°*");
return 1;
}
/* Allow starting of SCSI commands half a second before we allow the mid-level
* to queue them again after a reset */
- if (time_before(jiffies, pACB->pScsiHost->last_reset - HZ / 2)) {
+ if (time_before(jiffies, acb->scsi_host->last_reset - HZ / 2)) {
dprintkdbg(DBG_KG,
"We were just reset and don't accept commands yet!\n");
return 1;
}
/* Flush FIFO */
- DC395x_clrfifo(pACB, "Start");
- DC395x_write8(TRM_S1040_SCSI_HOSTID, pACB->pScsiHost->this_id);
- DC395x_write8(TRM_S1040_SCSI_TARGETID, pDCB->TargetID);
- DC395x_write8(TRM_S1040_SCSI_SYNC, pDCB->SyncPeriod);
- DC395x_write8(TRM_S1040_SCSI_OFFSET, pDCB->SyncOffset);
- pSRB->ScsiPhase = PH_BUS_FREE; /* initial phase */
+ clear_fifo(acb, "Start");
+ DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id);
+ DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id);
+ DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period);
+ DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset);
+ srb->scsi_phase = PH_BUS_FREE; /* initial phase */
- identify_message = pDCB->IdentifyMsg;
+ identify_message = dcb->identify_msg;
/*DC395x_TRM_write8(TRM_S1040_SCSI_IDMSG, identify_message); */
/* Don't allow disconnection for AUTO_REQSENSE: Cont.All.Cond.! */
- if (pSRB->SRBFlag & AUTO_REQSENSE)
+ if (srb->flag & AUTO_REQSENSE)
identify_message &= 0xBF;
- if (((pSRB->pcmd->cmnd[0] == INQUIRY)
- || (pSRB->pcmd->cmnd[0] == REQUEST_SENSE)
- || (pSRB->SRBFlag & AUTO_REQSENSE))
- && (((pDCB->SyncMode & WIDE_NEGO_ENABLE)
- && !(pDCB->SyncMode & WIDE_NEGO_DONE))
- || ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
- && !(pDCB->SyncMode & SYNC_NEGO_DONE)))
- && (pDCB->TargetLUN == 0)) {
- pSRB->MsgOutBuf[0] = identify_message;
- pSRB->MsgCnt = 1;
+ if (((srb->cmd->cmnd[0] == INQUIRY)
+ || (srb->cmd->cmnd[0] == REQUEST_SENSE)
+ || (srb->flag & AUTO_REQSENSE))
+ && (((dcb->sync_mode & WIDE_NEGO_ENABLE)
+ && !(dcb->sync_mode & WIDE_NEGO_DONE))
+ || ((dcb->sync_mode & SYNC_NEGO_ENABLE)
+ && !(dcb->sync_mode & SYNC_NEGO_DONE)))
+ && (dcb->target_lun == 0)) {
+ srb->msgout_buf[0] = identify_message;
+ srb->msg_count = 1;
scsicommand = SCMD_SEL_ATNSTOP;
- pSRB->SRBState = SRB_MSGOUT;
+ srb->state = SRB_MSGOUT;
#ifndef SYNC_FIRST
- if (pDCB->SyncMode & WIDE_NEGO_ENABLE
- && pDCB->Inquiry7 & SCSI_INQ_WBUS16) {
- DC395x_Build_WDTR(pACB, pDCB, pSRB);
+ if (dcb->sync_mode & WIDE_NEGO_ENABLE
+ && dcb->inquiry7 & SCSI_INQ_WBUS16) {
+ build_wdtr(acb, dcb, srb);
goto no_cmd;
}
#endif
- if (pDCB->SyncMode & SYNC_NEGO_ENABLE
- && pDCB->Inquiry7 & SCSI_INQ_SYNC) {
- DC395x_Build_SDTR(pACB, pDCB, pSRB);
+ if (dcb->sync_mode & SYNC_NEGO_ENABLE
+ && dcb->inquiry7 & SCSI_INQ_SYNC) {
+ build_sdtr(acb, dcb, srb);
goto no_cmd;
}
- if (pDCB->SyncMode & WIDE_NEGO_ENABLE
- && pDCB->Inquiry7 & SCSI_INQ_WBUS16) {
- DC395x_Build_WDTR(pACB, pDCB, pSRB);
+ if (dcb->sync_mode & WIDE_NEGO_ENABLE
+ && dcb->inquiry7 & SCSI_INQ_WBUS16) {
+ build_wdtr(acb, dcb, srb);
goto no_cmd;
}
- pSRB->MsgCnt = 0;
+ srb->msg_count = 0;
}
/*
** Send identify message
*/
- DC395x_write8(TRM_S1040_SCSI_FIFO, identify_message);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, identify_message);
scsicommand = SCMD_SEL_ATN;
- pSRB->SRBState = SRB_START_;
+ srb->state = SRB_START_;
#ifndef DC395x_NO_TAGQ
- if ((pDCB->SyncMode & EN_TAG_QUEUEING)
+ if ((dcb->sync_mode & EN_TAG_QUEUEING)
&& (identify_message & 0xC0)) {
/* Send Tag message */
u32 tag_mask = 1;
u8 tag_number = 0;
- while (tag_mask & pDCB->TagMask
- && tag_number <= pDCB->MaxCommand) {
+ while (tag_mask & dcb->tag_mask
+ && tag_number <= dcb->max_command) {
tag_mask = tag_mask << 1;
tag_number++;
}
- if (tag_number >= pDCB->MaxCommand) {
+ if (tag_number >= dcb->max_command) {
dprintkl(KERN_WARNING,
"Start_SCSI: Out of tags for pid %li (%i-%i)\n",
- pSRB->pcmd->pid, pSRB->pcmd->device->id,
- pSRB->pcmd->device->lun);
- pSRB->SRBState = SRB_READY;
- DC395x_write16(TRM_S1040_SCSI_CONTROL,
+ srb->cmd->pid, srb->cmd->device->id,
+ srb->cmd->device->lun);
+ srb->state = SRB_READY;
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
DO_HWRESELECT);
return 1;
}
/*
** Send Tag id
*/
- DC395x_write8(TRM_S1040_SCSI_FIFO, MSG_SIMPLE_QTAG);
- DC395x_write8(TRM_S1040_SCSI_FIFO, tag_number);
- pDCB->TagMask |= tag_mask;
- pSRB->TagNumber = tag_number;
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, MSG_SIMPLE_QTAG);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, tag_number);
+ dcb->tag_mask |= tag_mask;
+ srb->tag_number = tag_number;
TRACEPRINTF("Tag %i *", tag_number);
scsicommand = SCMD_SEL_ATN3;
- pSRB->SRBState = SRB_START_;
+ srb->state = SRB_START_;
}
#endif
/*polling:*/
@@ -2190,57 +2016,57 @@
*/
dprintkdbg(DBG_KG,
"StartSCSI (pid %li) %02x (%i-%i): Tag %i\n",
- pSRB->pcmd->pid, pSRB->pcmd->cmnd[0],
- pSRB->pcmd->device->id, pSRB->pcmd->device->lun,
- pSRB->TagNumber);
- if (pSRB->SRBFlag & AUTO_REQSENSE) {
- DC395x_write8(TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
- DC395x_write8(TRM_S1040_SCSI_FIFO, (pDCB->TargetLUN << 5));
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
- DC395x_write8(TRM_S1040_SCSI_FIFO,
- sizeof(pSRB->pcmd->sense_buffer));
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
+ srb->cmd->pid, srb->cmd->cmnd[0],
+ srb->cmd->device->id, srb->cmd->device->lun,
+ srb->tag_number);
+ if (srb->flag & AUTO_REQSENSE) {
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5));
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO,
+ sizeof(srb->cmd->sense_buffer));
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
} else {
- ptr = (u8 *) pSRB->pcmd->cmnd;
- for (i = 0; i < pSRB->pcmd->cmd_len; i++)
- DC395x_write8(TRM_S1040_SCSI_FIFO, *ptr++);
+ ptr = (u8 *) srb->cmd->cmnd;
+ for (i = 0; i < srb->cmd->cmd_len; i++)
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++);
}
no_cmd:
- DC395x_write16(TRM_S1040_SCSI_CONTROL,
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
DO_HWRESELECT | DO_DATALATCH);
- if (DC395x_read16(TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
+ if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
/*
- * If DC395x_StartSCSI return 1:
+ * If start_scsi return 1:
* we caught an interrupt (must be reset or reselection ... )
* : Let's process it first!
*/
dprintkdbg(DBG_0, "Debug: StartSCSI failed (busy) for pid %li(%02i-%i)!\n",
- pSRB->pcmd->pid, pDCB->TargetID, pDCB->TargetLUN);
- /*DC395x_clrfifo (pACB, "Start2"); */
+ srb->cmd->pid, dcb->target_id, dcb->target_lun);
+ /*clear_fifo (acb, "Start2"); */
/*DC395x_write16 (TRM_S1040_SCSI_CONTROL, DO_HWRESELECT | DO_DATALATCH); */
- pSRB->SRBState = SRB_READY;
- DC395x_freetag(pDCB, pSRB);
- pSRB->MsgCnt = 0;
+ srb->state = SRB_READY;
+ free_tag(dcb, srb);
+ srb->msg_count = 0;
return_code = 1;
/* This IRQ should NOT get lost, as we did not acknowledge it */
} else {
/*
- * If DC395x_StartSCSI returns 0:
+ * If start_scsi returns 0:
* we know that the SCSI processor is free
*/
- pSRB->ScsiPhase = PH_BUS_FREE; /* initial phase */
- pDCB->pActiveSRB = pSRB;
- pACB->pActiveDCB = pDCB;
+ srb->scsi_phase = PH_BUS_FREE; /* initial phase */
+ dcb->active_srb = srb;
+ acb->active_dcb = dcb;
return_code = 0;
/* it's important for atn stop */
- DC395x_write16(TRM_S1040_SCSI_CONTROL,
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
DO_DATALATCH | DO_HWRESELECT);
/*
** SCSI command
*/
TRACEPRINTF("%02x *", scsicommand);
- DC395x_write8(TRM_S1040_SCSI_COMMAND, scsicommand);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, scsicommand);
}
return return_code;
}
@@ -2249,7 +2075,7 @@
/*
********************************************************************
* scsiio
- * DC395x_initAdapter
+ * init_adapter
********************************************************************
*/
@@ -2257,50 +2083,50 @@
* dc395x_handle_interrupt - Handle an interrupt that has been confirmed to
* have been triggered for this card.
*
- * @pACB: a pointer to the adpter control block
+ * @acb: a pointer to the adpter control block
* @scsi_status: the status return when we checked the card
**/
-static void dc395x_handle_interrupt(struct AdapterCtlBlk *pACB, u16 scsi_status)
+static void dc395x_handle_interrupt(struct AdapterCtlBlk *acb, u16 scsi_status)
{
- struct DeviceCtlBlk *pDCB;
- struct ScsiReqBlk *pSRB;
+ struct DeviceCtlBlk *dcb;
+ struct ScsiReqBlk *srb;
u16 phase;
u8 scsi_intstatus;
unsigned long flags;
- void (*DC395x_stateV) (struct AdapterCtlBlk *, struct ScsiReqBlk *,
+ void (*dc395x_statev) (struct AdapterCtlBlk *, struct ScsiReqBlk *,
u16 *);
- DC395x_LOCK_IO(pACB->pScsiHost);
+ DC395x_LOCK_IO(acb->scsi_host, flags);
/* This acknowledges the IRQ */
- scsi_intstatus = DC395x_read8(TRM_S1040_SCSI_INTSTATUS);
+ scsi_intstatus = DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
if ((scsi_status & 0x2007) == 0x2002)
dprintkl(KERN_DEBUG, "COP after COP completed? %04x\n",
scsi_status);
#if 1 /*def DBG_0 */
- if (DC395x_monitor_next_IRQ) {
+ if (monitor_next_irq) {
dprintkl(KERN_INFO,
"status=%04x intstatus=%02x\n", scsi_status,
scsi_intstatus);
- DC395x_monitor_next_IRQ--;
+ monitor_next_irq--;
}
#endif
- /*DC395x_ACB_LOCK(pACB,acb_flags); */
+ /*DC395x_ACB_LOCK(acb,acb_flags); */
if (debug_enabled(DBG_KG)) {
if (scsi_intstatus & INT_SELTIMEOUT)
dprintkdbg(DBG_KG, "Sel Timeout IRQ\n");
}
/*dprintkl(KERN_DEBUG, "DC395x_IRQ: intstatus = %02x ", scsi_intstatus); */
- if (timer_pending(&pACB->SelTO_Timer))
- del_timer(&pACB->SelTO_Timer);
+ if (timer_pending(&acb->selto_timer))
+ del_timer(&acb->selto_timer);
if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
- DC395x_Disconnect(pACB); /* bus free interrupt */
+ disconnect(acb); /* bus free interrupt */
goto out_unlock;
}
if (scsi_intstatus & INT_RESELECTED) {
- DC395x_Reselect(pACB);
+ reselect(acb);
goto out_unlock;
}
if (scsi_intstatus & INT_SELECT) {
@@ -2308,82 +2134,84 @@
goto out_unlock;
}
if (scsi_intstatus & INT_SCSIRESET) {
- DC395x_ScsiRstDetect(pACB);
+ scsi_reset_detect(acb);
goto out_unlock;
}
if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
- pDCB = pACB->pActiveDCB;
- if (!pDCB) {
+ dcb = acb->active_dcb;
+ if (!dcb) {
dprintkl(KERN_DEBUG,
"Oops: BusService (%04x %02x) w/o ActiveDCB!\n",
scsi_status, scsi_intstatus);
goto out_unlock;
}
- pSRB = pDCB->pActiveSRB;
- if (pDCB->DCBFlag & ABORT_DEV_) {
+ srb = dcb->active_srb;
+ if (dcb->flag & ABORT_DEV_) {
dprintkdbg(DBG_0, "MsgOut Abort Device.....\n");
- DC395x_EnableMsgOut_Abort(pACB, pSRB);
+ enable_msgout_abort(acb, srb);
}
/*
************************************************************
* software sequential machine
************************************************************
*/
- phase = (u16) pSRB->ScsiPhase;
+ phase = (u16) srb->scsi_phase;
/*
* 62037 or 62137
- * call DC395x_SCSI_phase0[]... "phase entry"
+ * call dc395x_scsi_phase0[]... "phase entry"
* handle every phase before start transfer
*/
- /* DC395x_DataOutPhase0, phase:0 */
- /* DC395x_DataInPhase0, phase:1 */
- /* DC395x_CommandPhase0, phase:2 */
- /* DC395x_StatusPhase0, phase:3 */
- /* DC395x_Nop0, phase:4 PH_BUS_FREE .. initial phase */
- /* DC395x_Nop0, phase:5 PH_BUS_FREE .. initial phase */
- /* DC395x_MsgOutPhase0, phase:6 */
- /* DC395x_MsgInPhase0, phase:7 */
- DC395x_stateV = (void *) DC395x_SCSI_phase0[phase];
- DC395x_stateV(pACB, pSRB, &scsi_status);
+ /* data_out_phase0, phase:0 */
+ /* data_in_phase0, phase:1 */
+ /* command_phase0, phase:2 */
+ /* status_phase0, phase:3 */
+ /* nop0, phase:4 PH_BUS_FREE .. initial phase */
+ /* nop0, phase:5 PH_BUS_FREE .. initial phase */
+ /* msgout_phase0, phase:6 */
+ /* msgin_phase0, phase:7 */
+ dc395x_statev = (void *) dc395x_scsi_phase0[phase];
+ dc395x_statev(acb, srb, &scsi_status);
/*
*$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
*
* if there were any exception occured
* scsi_status will be modify to bus free phase
- * new scsi_status transfer out from ... previous DC395x_stateV
+ * new scsi_status transfer out from ... previous dc395x_statev
*
*$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
*/
- pSRB->ScsiPhase = scsi_status & PHASEMASK;
+ srb->scsi_phase = scsi_status & PHASEMASK;
phase = (u16) scsi_status & PHASEMASK;
/*
- * call DC395x_SCSI_phase1[]... "phase entry"
+ * call dc395x_scsi_phase1[]... "phase entry"
* handle every phase do transfer
*/
- /* DC395x_DataOutPhase1, phase:0 */
- /* DC395x_DataInPhase1, phase:1 */
- /* DC395x_CommandPhase1, phase:2 */
- /* DC395x_StatusPhase1, phase:3 */
- /* DC395x_Nop1, phase:4 PH_BUS_FREE .. initial phase */
- /* DC395x_Nop1, phase:5 PH_BUS_FREE .. initial phase */
- /* DC395x_MsgOutPhase1, phase:6 */
- /* DC395x_MsgInPhase1, phase:7 */
- DC395x_stateV = (void *) DC395x_SCSI_phase1[phase];
- DC395x_stateV(pACB, pSRB, &scsi_status);
+ /* data_out_phase1, phase:0 */
+ /* data_in_phase1, phase:1 */
+ /* command_phase1, phase:2 */
+ /* status_phase1, phase:3 */
+ /* nop1, phase:4 PH_BUS_FREE .. initial phase */
+ /* nop1, phase:5 PH_BUS_FREE .. initial phase */
+ /* msgout_phase1, phase:6 */
+ /* msgin_phase1, phase:7 */
+ dc395x_statev = (void *) dc395x_scsi_phase1[phase];
+ dc395x_statev(acb, srb, &scsi_status);
}
out_unlock:
- DC395x_UNLOCK_IO(pACB->pScsiHost);
+ DC395x_UNLOCK_IO(acb->scsi_host, flags);
return;
}
-irqreturn_t DC395x_Interrupt(int irq, void *dev_id, struct pt_regs *regs)
+
+static
+irqreturn_t dc395x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
- struct AdapterCtlBlk *pACB = DC395x_pACB_start;
+ struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)dev_id;
u16 scsi_status;
u8 dma_status;
irqreturn_t handled = IRQ_NONE;
- dprintkdbg(DBG_0, "DC395x_Interrupt..............\n");
+ dprintkdbg(DBG_0, "dc395x_interrupt..............\n");
#if debug_enabled(DBG_RECURSION)
if (dbg_in_driver++ > NORM_REC_LVL) {
dprintkl(KERN_DEBUG, "%i interrupt recursion?\n", dbg_in_driver);
@@ -2391,48 +2219,31 @@
#endif
/*
- * Find which card generated the interrupt. Note that it may have
- * been something else that we share the interupt with which
- * actually generated it.
- *
- * We'll check the interupt status register of each card that
- * is on the IRQ that was responsible for this interupt.
+ * Check for pending interupt
*/
- for (; pACB != NULL; pACB = pACB->pNextACB) {
- if (pACB->IRQLevel != (u8) irq) {
- /* card is not on the irq that triggered */
- continue;
- }
-
- /*
- * Ok, we've found a card on the correct irq,
- * let's check if an interupt is pending
- */
- scsi_status = DC395x_read16(TRM_S1040_SCSI_STATUS);
- dma_status = DC395x_read8(TRM_S1040_DMA_STATUS);
- if (scsi_status & SCSIINTERRUPT) {
- /* interupt pending - let's process it! */
- dc395x_handle_interrupt(pACB, scsi_status);
- handled = IRQ_HANDLED;
- }
- else if (dma_status & 0x20) {
- /* Error from the DMA engine */
- dprintkl(KERN_INFO, "Interrupt from DMA engine: %02x!\n",
- dma_status);
+ scsi_status = DC395x_read16(acb, TRM_S1040_SCSI_STATUS);
+ dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
+ if (scsi_status & SCSIINTERRUPT) {
+ /* interupt pending - let's process it! */
+ dc395x_handle_interrupt(acb, scsi_status);
+ handled = IRQ_HANDLED;
+ }
+ else if (dma_status & 0x20) {
+ /* Error from the DMA engine */
+ dprintkl(KERN_INFO, "Interrupt from DMA engine: %02x!\n", dma_status);
#if 0
- dprintkl(KERN_INFO, "This means DMA error! Try to handle ...\n");
- if (pACB->pActiveDCB) {
- pACB->pActiveDCB-> DCBFlag |= ABORT_DEV_;
- if (pACB->pActiveDCB->pActiveSRB)
- DC395x_EnableMsgOut_Abort(pACB, pACB->pActiveDCB->pActiveSRB);
- }
- DC395x_write8(TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO);
+ dprintkl(KERN_INFO, "This means DMA error! Try to handle ...\n");
+ if (acb->active_dcb) {
+ acb->active_dcb-> flag |= ABORT_DEV_;
+ if (acb->active_dcb->active_srb)
+ enable_msgout_abort(acb, acb->active_dcb->active_srb);
+ }
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO);
#else
- dprintkl(KERN_INFO, "Ignoring DMA error (probably a bad thing) ...\n");
- pACB = (struct AdapterCtlBlk *)NULL;
+ dprintkl(KERN_INFO, "Ignoring DMA error (probably a bad thing) ...\n");
+ acb = NULL;
#endif
- handled = IRQ_HANDLED;
- }
+ handled = IRQ_HANDLED;
}
#if debug_enabled(DBG_RECURSION)
@@ -2445,21 +2256,21 @@
/*
********************************************************************
* scsiio
- * DC395x_MsgOutPhase0: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * msgout_phase0: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =6
********************************************************************
*/
-static void
-DC395x_MsgOutPhase0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
+static
+void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
u16 * pscsi_status)
{
- dprintkdbg(DBG_0, "DC395x_MsgOutPhase0.....\n");
- if (pSRB->SRBState & (SRB_UNEXPECT_RESEL + SRB_ABORT_SENT)) {
+ dprintkdbg(DBG_0, "msgout_phase0.....\n");
+ if (srb->state & (SRB_UNEXPECT_RESEL + SRB_ABORT_SENT)) {
*pscsi_status = PH_BUS_FREE; /*.. initial phase */
}
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
- pSRB->SRBState &= ~SRB_MSGOUT;
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ srb->state &= ~SRB_MSGOUT;
TRACEPRINTF("MOP0 *");
}
@@ -2467,51 +2278,51 @@
/*
********************************************************************
* scsiio
- * DC395x_MsgOutPhase1: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * msgout_phase1: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =6
********************************************************************
*/
-static void
-DC395x_MsgOutPhase1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
+static
+void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
u16 * pscsi_status)
{
u16 i;
u8 *ptr;
- struct DeviceCtlBlk *pDCB;
+ struct DeviceCtlBlk *dcb;
- dprintkdbg(DBG_0, "DC395x_MsgOutPhase1..............\n");
+ dprintkdbg(DBG_0, "msgout_phase1..............\n");
TRACEPRINTF("MOP1*");
- pDCB = pACB->pActiveDCB;
- DC395x_clrfifo(pACB, "MOP1");
- if (!(pSRB->SRBState & SRB_MSGOUT)) {
- pSRB->SRBState |= SRB_MSGOUT;
- dprintkl(KERN_DEBUG, "Debug: pid %li: MsgOut Phase unexpected.\n", pSRB->pcmd->pid); /* So what ? */
+ dcb = acb->active_dcb;
+ clear_fifo(acb, "MOP1");
+ if (!(srb->state & SRB_MSGOUT)) {
+ srb->state |= SRB_MSGOUT;
+ dprintkl(KERN_DEBUG, "Debug: pid %li: MsgOut Phase unexpected.\n", srb->cmd->pid); /* So what ? */
}
- if (!pSRB->MsgCnt) {
+ if (!srb->msg_count) {
dprintkdbg(DBG_0, "Debug: pid %li: NOP Msg (no output message there).\n",
- pSRB->pcmd->pid);
- DC395x_write8(TRM_S1040_SCSI_FIFO, MSG_NOP);
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
+ srb->cmd->pid);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, MSG_NOP);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
TRACEPRINTF("\\*");
- TRACEOUT(" %s\n", pSRB->debugtrace);
+ TRACEOUT(" %s\n", srb->debugtrace);
return;
}
- ptr = (u8 *) pSRB->MsgOutBuf;
+ ptr = (u8 *) srb->msgout_buf;
TRACEPRINTF("(*");
- /*dprintkl(KERN_DEBUG, "Send msg: "); DC395x_printMsg (ptr, pSRB->MsgCnt); */
+ /*dprintkl(KERN_DEBUG, "Send msg: "); print_msg (ptr, srb->msg_count); */
/*dprintkl(KERN_DEBUG, "MsgOut: "); */
- for (i = 0; i < pSRB->MsgCnt; i++) {
+ for (i = 0; i < srb->msg_count; i++) {
TRACEPRINTF("%02x *", *ptr);
- DC395x_write8(TRM_S1040_SCSI_FIFO, *ptr++);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++);
}
TRACEPRINTF(")*");
- pSRB->MsgCnt = 0;
+ srb->msg_count = 0;
/*printk("\n"); */
- if ( /*(pDCB->DCBFlag & ABORT_DEV_) && */
- (pSRB->MsgOutBuf[0] == MSG_ABORT))
- pSRB->SRBState = SRB_ABORT_SENT;
+ if (/*(dcb->flag & ABORT_DEV_) && */
+ (srb->msgout_buf[0] == MSG_ABORT))
+ srb->state = SRB_ABORT_SENT;
/*1.25 */
/*DC395x_write16 (TRM_S1040_SCSI_CONTROL, DO_DATALATCH); *//* it's important for atn stop */
@@ -2519,88 +2330,88 @@
** SCSI command
*/
/*TRACEPRINTF (".*"); */
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
}
/*
********************************************************************
* scsiio
- * DC395x_CommandPhase0: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * command_phase0: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =2
********************************************************************
*/
-static void
-DC395x_CommandPhase0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
TRACEPRINTF("COP0 *");
/*1.25 */
- /*DC395x_clrfifo (pACB, COP0); */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
+ /*clear_fifo (acb, COP0); */
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
}
/*
********************************************************************
* scsiio
- * DC395x_CommandPhase1: one of DC395x_SCSI_phase1[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * command_phase1: one of dc395x_scsi_phase1[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
* if phase =2
********************************************************************
*/
-static void
-DC395x_CommandPhase1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
- struct DeviceCtlBlk *pDCB;
+ struct DeviceCtlBlk *dcb;
u8 *ptr;
u16 i;
- dprintkdbg(DBG_0, "DC395x_CommandPhase1..............\n");
+ dprintkdbg(DBG_0, "command_phase1..............\n");
TRACEPRINTF("COP1*");
- DC395x_clrfifo(pACB, "COP1");
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_CLRATN);
- if (!(pSRB->SRBFlag & AUTO_REQSENSE)) {
- ptr = (u8 *) pSRB->pcmd->cmnd;
- for (i = 0; i < pSRB->pcmd->cmd_len; i++) {
- DC395x_write8(TRM_S1040_SCSI_FIFO, *ptr);
+ clear_fifo(acb, "COP1");
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRATN);
+ if (!(srb->flag & AUTO_REQSENSE)) {
+ ptr = (u8 *) srb->cmd->cmnd;
+ for (i = 0; i < srb->cmd->cmd_len; i++) {
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr);
ptr++;
}
} else {
- DC395x_write8(TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
- pDCB = pACB->pActiveDCB;
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
+ dcb = acb->active_dcb;
/* target id */
- DC395x_write8(TRM_S1040_SCSI_FIFO, (pDCB->TargetLUN << 5));
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
- DC395x_write8(TRM_S1040_SCSI_FIFO,
- sizeof(pSRB->pcmd->sense_buffer));
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5));
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO,
+ sizeof(srb->cmd->sense_buffer));
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
}
- pSRB->SRBState |= SRB_COMMAND;
+ srb->state |= SRB_COMMAND;
/* it's important for atn stop */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
/* SCSI command */
TRACEPRINTF(".*");
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
}
/* Do sanity checks for S/G list */
-static inline void DC395x_check_SG(struct ScsiReqBlk *pSRB)
+static inline void check_sg_list(struct ScsiReqBlk *srb)
{
if (debug_enabled(DBG_SGPARANOIA)) {
- unsigned Length = 0;
- unsigned Idx = pSRB->SRBSGIndex;
- struct SGentry *psge = pSRB->SegmentX + Idx;
- for (; Idx < pSRB->SRBSGCount; psge++, Idx++)
- Length += psge->length;
- if (Length != pSRB->SRBTotalXferLength)
+ unsigned len = 0;
+ unsigned idx = srb->sg_index;
+ struct SGentry *psge = srb->segment_x + idx;
+ for (; idx < srb->sg_count; psge++, idx++)
+ len += psge->length;
+ if (len != srb->total_xfer_length)
dprintkdbg(DBG_SGPARANOIA,
"Inconsistent SRB S/G lengths (Tot=%i, Count=%i) !!\n",
- pSRB->SRBTotalXferLength, Length);
+ srb->total_xfer_length, len);
}
}
@@ -2609,38 +2420,38 @@
* Compute the next Scatter Gather list index and adjust its length
* and address if necessary; also compute virt_addr
*/
-void DC395x_update_SGlist(struct ScsiReqBlk *pSRB, u32 Left)
+static void update_sg_list(struct ScsiReqBlk *srb, u32 left)
{
struct SGentry *psge;
- u32 Xferred = 0;
- u8 Idx;
- Scsi_Cmnd *pcmd = pSRB->pcmd;
+ u32 xferred = 0;
+ u8 idx;
+ Scsi_Cmnd *cmd = srb->cmd;
struct scatterlist *sg;
- int segment = pcmd->use_sg;
+ int segment = cmd->use_sg;
dprintkdbg(DBG_KG, "Update SG: Total %i, Left %i\n",
- pSRB->SRBTotalXferLength, Left);
- DC395x_check_SG(pSRB);
- psge = pSRB->SegmentX + pSRB->SRBSGIndex;
+ srb->total_xfer_length, left);
+ check_sg_list(srb);
+ psge = srb->segment_x + srb->sg_index;
/* data that has already been transferred */
- Xferred = pSRB->SRBTotalXferLength - Left;
- if (pSRB->SRBTotalXferLength != Left) {
- /*DC395x_check_SG_TX (pSRB, Xferred); */
+ xferred = srb->total_xfer_length - left;
+ if (srb->total_xfer_length != left) {
+ /*check_sg_list_TX (srb, xferred); */
/* Remaining */
- pSRB->SRBTotalXferLength = Left;
+ srb->total_xfer_length = left;
/* parsing from last time disconnect SGIndex */
- for (Idx = pSRB->SRBSGIndex; Idx < pSRB->SRBSGCount; Idx++) {
+ for (idx = srb->sg_index; idx < srb->sg_count; idx++) {
/* Complete SG entries done */
- if (Xferred >= psge->length)
- Xferred -= psge->length;
+ if (xferred >= psge->length)
+ xferred -= psge->length;
/* Partial SG entries done */
else {
- psge->length -= Xferred; /* residue data length */
- psge->address += Xferred; /* residue data pointer */
- pSRB->SRBSGIndex = Idx;
- pci_dma_sync_single(pSRB->pSRBDCB->
- pDCBACB->pdev,
- pSRB->SRBSGBusAddr,
+ psge->length -= xferred; /* residue data length */
+ psge->address += xferred; /* residue data pointer */
+ srb->sg_index = idx;
+ pci_dma_sync_single(srb->dcb->
+ acb->dev,
+ srb->sg_bus_addr,
sizeof(struct SGentry)
*
DC395x_MAX_SG_LISTENTRY,
@@ -2649,65 +2460,65 @@
}
psge++;
}
- DC395x_check_SG(pSRB);
+ check_sg_list(srb);
}
/* We need the corresponding virtual address sg_to_virt */
/*dprintkl(KERN_DEBUG, "sg_to_virt: bus %08x -> virt ", psge->address); */
if (!segment) {
- pSRB->virt_addr += Xferred;
- /*printk("%p\n", pSRB->virt_addr); */
+ srb->virt_addr += xferred;
+ /*printk("%p\n", srb->virt_addr); */
return;
}
/* We have to walk the scatterlist to find it */
- sg = (struct scatterlist *) pcmd->request_buffer;
+ sg = (struct scatterlist *) cmd->request_buffer;
while (segment--) {
/*printk("(%08x)%p ", BUS_ADDR(*sg), PAGE_ADDRESS(sg)); */
unsigned long mask =
~((unsigned long) sg->length - 1) & PAGE_MASK;
if ((BUS_ADDR(*sg) & mask) == (psge->address & mask)) {
- pSRB->virt_addr = (PAGE_ADDRESS(sg)
+ srb->virt_addr = (PAGE_ADDRESS(sg)
+ psge->address -
(psge->address & PAGE_MASK));
- /*printk("%p\n", pSRB->virt_addr); */
+ /*printk("%p\n", srb->virt_addr); */
return;
}
++sg;
}
dprintkl(KERN_ERR, "sg_to_virt failed!\n");
- pSRB->virt_addr = 0;
+ srb->virt_addr = 0;
}
/*
- * DC395x_cleanup_after_transfer
+ * cleanup_after_transfer
*
* Makes sure, DMA and SCSI engine are empty, after the transfer has finished
* KG: Currently called from StatusPhase1 ()
* Should probably also be called from other places
* Best might be to call it in DataXXPhase0, if new phase will differ
*/
-static void
-DC395x_cleanup_after_transfer(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB)
+static
+void cleanup_after_transfer(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb)
{
TRACEPRINTF(" Cln*");
/*DC395x_write8 (TRM_S1040_DMA_STATUS, FORCEDMACOMP); */
- if (DC395x_read16(TRM_S1040_DMA_COMMAND) & 0x0001) { /* read */
- if (!(DC395x_read8(TRM_S1040_SCSI_FIFOCNT) & 0x40))
- DC395x_clrfifo(pACB, "ClnIn");
+ if (DC395x_read16(acb, TRM_S1040_DMA_COMMAND) & 0x0001) { /* read */
+ if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
+ clear_fifo(acb, "ClnIn");
- if (!(DC395x_read8(TRM_S1040_DMA_FIFOSTAT) & 0x80))
- DC395x_write8(TRM_S1040_DMA_CONTROL, CLRXFIFO);
+ if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80))
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
} else { /* write */
- if (!(DC395x_read8(TRM_S1040_DMA_FIFOSTAT) & 0x80))
- DC395x_write8(TRM_S1040_DMA_CONTROL, CLRXFIFO);
+ if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80))
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
- if (!(DC395x_read8(TRM_S1040_SCSI_FIFOCNT) & 0x40))
- DC395x_clrfifo(pACB, "ClnOut");
+ if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
+ clear_fifo(acb, "ClnOut");
}
/*1.25 */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
}
@@ -2719,22 +2530,22 @@
/*
********************************************************************
* scsiio
- * DC395x_DataOutPhase0: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * data_out_phase0: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =0
********************************************************************
*/
-void
-DC395x_DataOutPhase0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
+static
+void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
u16 * pscsi_status)
{
u16 scsi_status;
- u32 dLeftCounter = 0;
- struct DeviceCtlBlk *pDCB = pSRB->pSRBDCB;
+ u32 d_left_counter = 0;
+ struct DeviceCtlBlk *dcb = srb->dcb;
- dprintkdbg(DBG_0, "DC395x_DataOutPhase0.....\n");
+ dprintkdbg(DBG_0, "data_out_phase0.....\n");
TRACEPRINTF("DOP0*");
- pDCB = pSRB->pSRBDCB;
+ dcb = srb->dcb;
scsi_status = *pscsi_status;
/*
@@ -2750,16 +2561,16 @@
* If we need more data, the DMA SG list will be freshly set up, anyway
*/
dprintkdbg(DBG_PIO, "DOP0: DMA_FCNT: %02x, DMA_FSTAT: %02x, SCSI_FCNT: %02x, CTR %06x, stat %04x, Tot: %06x\n",
- DC395x_read8(TRM_S1040_DMA_FIFOCNT),
- DC395x_read8(TRM_S1040_DMA_FIFOSTAT),
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT),
- DC395x_read32(TRM_S1040_SCSI_COUNTER), scsi_status,
- pSRB->SRBTotalXferLength);
- DC395x_write8(TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO);
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
+ DC395x_read32(acb, TRM_S1040_SCSI_COUNTER), scsi_status,
+ srb->total_xfer_length);
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO);
- if (!(pSRB->SRBState & SRB_XFERPAD)) {
+ if (!(srb->state & SRB_XFERPAD)) {
if (scsi_status & PARITYERROR)
- pSRB->SRBStatus |= PARITY_ERROR;
+ srb->status |= PARITY_ERROR;
/*
* KG: Right, we can't just rely on the SCSI_COUNTER, because this
@@ -2772,27 +2583,27 @@
* when data transfer from DMA FIFO to SCSI FIFO
* if there was some data left in SCSI FIFO
*/
- dLeftCounter =
- (u32) (DC395x_read8(TRM_S1040_SCSI_FIFOCNT) &
+ d_left_counter =
+ (u32) (DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
0x1F);
- if (pDCB->SyncPeriod & WIDE_SYNC)
- dLeftCounter <<= 1;
+ if (dcb->sync_period & WIDE_SYNC)
+ d_left_counter <<= 1;
dprintkdbg(DBG_KG,
"Debug: SCSI FIFO contains %i %s in DOP0\n",
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT),
- (pDCB->
- SyncPeriod & WIDE_SYNC) ? "words" :
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
+ (dcb->
+ sync_period & WIDE_SYNC) ? "words" :
"bytes");
dprintkdbg(DBG_KG,
"SCSI FIFOCNT %02x, SCSI CTR %08x\n",
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT),
- DC395x_read32(TRM_S1040_SCSI_COUNTER));
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
+ DC395x_read32(acb, TRM_S1040_SCSI_COUNTER));
dprintkdbg(DBG_KG,
"DMA FIFOCNT %04x, FIFOSTAT %02x, DMA CTR %08x\n",
- DC395x_read8(TRM_S1040_DMA_FIFOCNT),
- DC395x_read8(TRM_S1040_DMA_FIFOSTAT),
- DC395x_read32(TRM_S1040_DMA_CXCNT));
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
+ DC395x_read32(acb, TRM_S1040_DMA_CXCNT));
/*
* if WIDE scsi SCSI FIFOCNT unit is word !!!
@@ -2808,17 +2619,17 @@
* .....TRM_S1040_SCSI_FIFOCNT ( 5bits)
* The counter is SCSI FIFO offset counter (in units of bytes or! words)
*/
- if (pSRB->SRBTotalXferLength > DC395x_LASTPIO)
- dLeftCounter +=
- DC395x_read32(TRM_S1040_SCSI_COUNTER);
- TRACEPRINTF("%06x *", dLeftCounter);
+ if (srb->total_xfer_length > DC395x_LASTPIO)
+ d_left_counter +=
+ DC395x_read32(acb, TRM_S1040_SCSI_COUNTER);
+ TRACEPRINTF("%06x *", d_left_counter);
/* Is this a good idea? */
- /*DC395x_clrfifo (pACB, "DOP1"); */
+ /*clear_fifo (acb, "DOP1"); */
/* KG: What is this supposed to be useful for? WIDE padding stuff? */
- if (dLeftCounter == 1 && pDCB->SyncPeriod & WIDE_SYNC
- && pSRB->pcmd->request_bufflen % 2) {
- dLeftCounter = 0;
+ if (d_left_counter == 1 && dcb->sync_period & WIDE_SYNC
+ && srb->cmd->request_bufflen % 2) {
+ d_left_counter = 0;
dprintkl(KERN_INFO, "DOP0: Discard 1 byte. (%02x)\n",
scsi_status);
}
@@ -2832,60 +2643,60 @@
* KG: This is nonsense: We have been WRITING data to the bus
* If the SCSI engine has no bytes left, how should the DMA engine?
*/
- if ((dLeftCounter ==
+ if ((d_left_counter ==
0) /*|| (scsi_status & SCSIXFERCNT_2_ZERO) ) */ ) {
/*
* int ctr = 6000000; u8 TempDMAstatus;
* do
* {
- * TempDMAstatus = DC395x_read8(TRM_S1040_DMA_STATUS);
+ * TempDMAstatus = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
* } while( !(TempDMAstatus & DMAXFERCOMP) && --ctr);
* if (ctr < 6000000-1) dprintkl(KERN_DEBUG, "DMA should be complete ... in DOP1\n");
* if (!ctr) dprintkl(KERN_ERR, "Deadlock in DataOutPhase0 !!\n");
*/
- pSRB->SRBTotalXferLength = 0;
+ srb->total_xfer_length = 0;
} else { /* Update SG list */
/*
* if transfer not yet complete
* there were some data residue in SCSI FIFO or
* SCSI transfer counter not empty
*/
- long oldXferred =
- pSRB->SRBTotalXferLength - dLeftCounter;
+ long oldxferred =
+ srb->total_xfer_length - d_left_counter;
const int diff =
- (pDCB->SyncPeriod & WIDE_SYNC) ? 2 : 1;
- DC395x_update_SGlist(pSRB, dLeftCounter);
+ (dcb->sync_period & WIDE_SYNC) ? 2 : 1;
+ update_sg_list(srb, d_left_counter);
/* KG: Most ugly hack! Apparently, this works around a chip bug */
- if ((pSRB->SegmentX[pSRB->SRBSGIndex].length ==
- diff && pSRB->pcmd->use_sg)
- || ((oldXferred & ~PAGE_MASK) ==
+ if ((srb->segment_x[srb->sg_index].length ==
+ diff && srb->cmd->use_sg)
+ || ((oldxferred & ~PAGE_MASK) ==
(PAGE_SIZE - diff))
) {
dprintkl(KERN_INFO,
"Work around chip bug (%i)?\n", diff);
- dLeftCounter =
- pSRB->SRBTotalXferLength - diff;
- DC395x_update_SGlist(pSRB, dLeftCounter);
- /*pSRB->SRBTotalXferLength -= diff; */
- /*pSRB->virt_addr += diff; */
- /*if (pSRB->pcmd->use_sg) */
- /* pSRB->SRBSGIndex++; */
+ d_left_counter =
+ srb->total_xfer_length - diff;
+ update_sg_list(srb, d_left_counter);
+ /*srb->total_xfer_length -= diff; */
+ /*srb->virt_addr += diff; */
+ /*if (srb->cmd->use_sg) */
+ /* srb->sg_index++; */
}
}
}
#if 0
- if (!(DC395x_read8(TRM_S1040_SCSI_FIFOCNT) & 0x40))
+ if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
dprintkl(KERN_DEBUG,
"DOP0(%li): %i bytes in SCSI FIFO! (Clear!)\n",
- pSRB->pcmd->pid,
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT) & 0x1f);
+ srb->cmd->pid,
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x1f);
#endif
- /*DC395x_clrfifo (pACB, "DOP0"); */
+ /*clear_fifo (acb, "DOP0"); */
/*DC395x_write8 (TRM_S1040_DMA_CONTROL, CLRXFIFO | ABORTXFER); */
#if 1
if ((*pscsi_status & PHASEMASK) != PH_DATA_OUT) {
/*dprintkl(KERN_DEBUG, "Debug: Clean up after Data Out ...\n"); */
- DC395x_cleanup_after_transfer(pACB, pSRB);
+ cleanup_after_transfer(acb, srb);
}
#endif
TRACEPRINTF(".*");
@@ -2895,25 +2706,25 @@
/*
********************************************************************
* scsiio
- * DC395x_DataOutPhase1: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * data_out_phase1: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =0
* 62037
********************************************************************
*/
-static void
-DC395x_DataOutPhase1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
+static
+void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
u16 * pscsi_status)
{
- dprintkdbg(DBG_0, "DC395x_DataOutPhase1.....\n");
+ dprintkdbg(DBG_0, "data_out_phase1.....\n");
/*1.25 */
TRACEPRINTF("DOP1*");
- DC395x_clrfifo(pACB, "DOP1");
+ clear_fifo(acb, "DOP1");
/*
** do prepare befor transfer when data out phase
*/
- DC395x_DataIO_transfer(pACB, pSRB, XFERDATAOUT);
+ data_io_transfer(acb, srb, XFERDATAOUT);
TRACEPRINTF(".*");
}
@@ -2921,21 +2732,21 @@
/*
********************************************************************
* scsiio
- * DC395x_DataInPhase0: one of DC395x_SCSI_phase1[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * data_in_phase0: one of dc395x_scsi_phase1[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
* if phase =1
********************************************************************
*/
-void
-DC395x_DataInPhase0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
+static
+void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
u16 * pscsi_status)
{
u16 scsi_status;
- u32 dLeftCounter = 0;
- /*struct DeviceCtlBlk* pDCB = pSRB->pSRBDCB; */
+ u32 d_left_counter = 0;
+ /*struct DeviceCtlBlk* dcb = srb->dcb; */
/*u8 bval; */
- dprintkdbg(DBG_0, "DC395x_DataInPhase0..............\n");
+ dprintkdbg(DBG_0, "data_in_phase0..............\n");
TRACEPRINTF("DIP0*");
scsi_status = *pscsi_status;
@@ -2952,13 +2763,13 @@
* made its way to the system memory! Some documentation on this would not
* seem to be a bad idea, actually.
*/
- if (!(pSRB->SRBState & SRB_XFERPAD)) {
+ if (!(srb->state & SRB_XFERPAD)) {
if (scsi_status & PARITYERROR) {
dprintkl(KERN_INFO,
"Parity Error (pid %li, target %02i-%i)\n",
- pSRB->pcmd->pid, pSRB->pcmd->device->id,
- pSRB->pcmd->device->lun);
- pSRB->SRBStatus |= PARITY_ERROR;
+ srb->cmd->pid, srb->cmd->device->id,
+ srb->cmd->device->lun);
+ srb->status |= PARITY_ERROR;
}
/*
* KG: We should wait for the DMA FIFO to be empty ...
@@ -2966,7 +2777,7 @@
* the DMA FIFO to become empty? How do we know, that the device not already
* sent data to the FIFO in a MsgIn phase, eg.?
*/
- if (!(DC395x_read8(TRM_S1040_DMA_FIFOSTAT) & 0x80)) {
+ if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80)) {
#if 0
int ctr = 6000000;
dprintkl(KERN_DEBUG,
@@ -2975,7 +2786,7 @@
/*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 7); */
/*DC395x_write8 (TRM_S1040_SCSI_COMMAND, SCMD_DMA_IN); */
while (!
- (DC395x_read16(TRM_S1040_DMA_FIFOSTAT) &
+ (DC395x_read16(acb, TRM_S1040_DMA_FIFOSTAT) &
0x80) && --ctr);
if (ctr < 6000000 - 1)
dprintkl(KERN_DEBUG
@@ -2986,82 +2797,82 @@
/*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 0); */
#endif
dprintkdbg(DBG_KG, "DIP0: DMA_FIFO: %02x %02x\n",
- DC395x_read8(TRM_S1040_DMA_FIFOCNT),
- DC395x_read8(TRM_S1040_DMA_FIFOSTAT));
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT));
}
/* Now: Check remainig data: The SCSI counters should tell us ... */
- dLeftCounter = DC395x_read32(TRM_S1040_SCSI_COUNTER)
- + ((DC395x_read8(TRM_S1040_SCSI_FIFOCNT) & 0x1f)
- << ((pSRB->pSRBDCB->SyncPeriod & WIDE_SYNC) ? 1 :
+ d_left_counter = DC395x_read32(acb, TRM_S1040_SCSI_COUNTER)
+ + ((DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x1f)
+ << ((srb->dcb->sync_period & WIDE_SYNC) ? 1 :
0));
dprintkdbg(DBG_KG, "SCSI FIFO contains %i %s in DIP0\n",
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT) & 0x1f,
- (pSRB->pSRBDCB->
- SyncPeriod & WIDE_SYNC) ? "words" : "bytes");
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x1f,
+ (srb->dcb->
+ sync_period & WIDE_SYNC) ? "words" : "bytes");
dprintkdbg(DBG_KG, "SCSI FIFOCNT %02x, SCSI CTR %08x\n",
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT),
- DC395x_read32(TRM_S1040_SCSI_COUNTER));
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
+ DC395x_read32(acb, TRM_S1040_SCSI_COUNTER));
dprintkdbg(DBG_KG, "DMA FIFOCNT %02x,%02x DMA CTR %08x\n",
- DC395x_read8(TRM_S1040_DMA_FIFOCNT),
- DC395x_read8(TRM_S1040_DMA_FIFOSTAT),
- DC395x_read32(TRM_S1040_DMA_CXCNT));
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
+ DC395x_read32(acb, TRM_S1040_DMA_CXCNT));
dprintkdbg(DBG_KG, "Remaining: TotXfer: %i, SCSI FIFO+Ctr: %i\n",
- pSRB->SRBTotalXferLength, dLeftCounter);
+ srb->total_xfer_length, d_left_counter);
#if DC395x_LASTPIO
/* KG: Less than or equal to 4 bytes can not be transfered via DMA, it seems. */
- if (dLeftCounter
- && pSRB->SRBTotalXferLength <= DC395x_LASTPIO) {
- /*u32 addr = (pSRB->SegmentX[pSRB->SRBSGIndex].address); */
- /*DC395x_update_SGlist (pSRB, dLeftCounter); */
+ if (d_left_counter
+ && srb->total_xfer_length <= DC395x_LASTPIO) {
+ /*u32 addr = (srb->segment_x[srb->sg_index].address); */
+ /*update_sg_list (srb, d_left_counter); */
dprintkdbg(DBG_PIO, "DIP0: PIO (%i %s) to %p for remaining %i bytes:",
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT) &
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
0x1f,
- (pSRB->pSRBDCB->
- SyncPeriod & WIDE_SYNC) ? "words" :
- "bytes", pSRB->virt_addr,
- pSRB->SRBTotalXferLength);
+ (srb->dcb->
+ sync_period & WIDE_SYNC) ? "words" :
+ "bytes", srb->virt_addr,
+ srb->total_xfer_length);
- if (pSRB->pSRBDCB->SyncPeriod & WIDE_SYNC)
- DC395x_write8(TRM_S1040_SCSI_CONFIG2,
+ if (srb->dcb->sync_period & WIDE_SYNC)
+ DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
CFG2_WIDEFIFO);
- while (DC395x_read8(TRM_S1040_SCSI_FIFOCNT) !=
+ while (DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) !=
0x40) {
u8 byte =
- DC395x_read8(TRM_S1040_SCSI_FIFO);
- *(pSRB->virt_addr)++ = byte;
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
+ *(srb->virt_addr)++ = byte;
if (debug_enabled(DBG_PIO))
printk(" %02x", byte);
- pSRB->SRBTotalXferLength--;
- dLeftCounter--;
- pSRB->SegmentX[pSRB->SRBSGIndex].length--;
- if (pSRB->SRBTotalXferLength
- && !pSRB->SegmentX[pSRB->SRBSGIndex].
+ srb->total_xfer_length--;
+ d_left_counter--;
+ srb->segment_x[srb->sg_index].length--;
+ if (srb->total_xfer_length
+ && !srb->segment_x[srb->sg_index].
length) {
if (debug_enabled(DBG_PIO))
printk(" (next segment)");
- pSRB->SRBSGIndex++;
- DC395x_update_SGlist(pSRB,
- dLeftCounter);
+ srb->sg_index++;
+ update_sg_list(srb,
+ d_left_counter);
}
}
- if (pSRB->pSRBDCB->SyncPeriod & WIDE_SYNC) {
+ if (srb->dcb->sync_period & WIDE_SYNC) {
#if 1 /* Read the last byte ... */
- if (pSRB->SRBTotalXferLength > 0) {
+ if (srb->total_xfer_length > 0) {
u8 byte =
DC395x_read8
- (TRM_S1040_SCSI_FIFO);
- *(pSRB->virt_addr)++ = byte;
- pSRB->SRBTotalXferLength--;
+ (acb, TRM_S1040_SCSI_FIFO);
+ *(srb->virt_addr)++ = byte;
+ srb->total_xfer_length--;
if (debug_enabled(DBG_PIO))
printk(" %02x", byte);
}
#endif
- DC395x_write8(TRM_S1040_SCSI_CONFIG2, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
}
/*printk(" %08x", *(u32*)(bus_to_virt (addr))); */
- /*pSRB->SRBTotalXferLength = 0; */
+ /*srb->total_xfer_length = 0; */
if (debug_enabled(DBG_PIO))
printk("\n");
}
@@ -3077,11 +2888,11 @@
* when data transfer from DMA FIFO to SCSI FIFO
* if there was some data left in SCSI FIFO
*/
- dLeftCounter =
- (u32) (DC395x_read8(TRM_S1040_SCSI_FIFOCNT) &
+ d_left_counter =
+ (u32) (DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
0x1F);
- if (pSRB->pSRBDCB->SyncPeriod & WIDE_SYNC)
- dLeftCounter <<= 1;
+ if (srb->dcb->sync_period & WIDE_SYNC)
+ d_left_counter <<= 1;
/*
* if WIDE scsi SCSI FIFOCNT unit is word !!!
* so need to *= 2
@@ -3089,39 +2900,39 @@
*/
}
#endif
- /*dLeftCounter += DC395x_read32(TRM_S1040_SCSI_COUNTER); */
+ /*d_left_counter += DC395x_read32(acb, TRM_S1040_SCSI_COUNTER); */
#if 0
dprintkl(KERN_DEBUG,
"DIP0: ctr=%08x, DMA_FIFO=%02x,%02x SCSI_FIFO=%02x\n",
- dLeftCounter, DC395x_read8(TRM_S1040_DMA_FIFOCNT),
- DC395x_read8(TRM_S1040_DMA_FIFOSTAT),
- DC395x_read8(TRM_S1040_SCSI_FIFOCNT));
+ d_left_counter, DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
+ DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
+ DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT));
dprintkl(KERN_DEBUG, "DIP0: DMAStat %02x\n",
- DC395x_read8(TRM_S1040_DMA_STATUS));
+ DC395x_read8(acb, TRM_S1040_DMA_STATUS));
#endif
/* KG: This should not be needed any more! */
- if ((dLeftCounter == 0)
+ if ((d_left_counter == 0)
|| (scsi_status & SCSIXFERCNT_2_ZERO)) {
#if 0
int ctr = 6000000;
u8 TempDMAstatus;
do {
TempDMAstatus =
- DC395x_read8(TRM_S1040_DMA_STATUS);
+ DC395x_read8(acb, TRM_S1040_DMA_STATUS);
} while (!(TempDMAstatus & DMAXFERCOMP) && --ctr);
if (!ctr)
dprintkl(KERN_ERR,
"Deadlock in DataInPhase0 waiting for DMA!!\n");
- pSRB->SRBTotalXferLength = 0;
+ srb->total_xfer_length = 0;
#endif
#if 0 /*def DBG_KG */
dprintkl(KERN_DEBUG,
"DIP0: DMA not yet ready: %02x: %i -> %i bytes\n",
- DC395x_read8(TRM_S1040_DMA_STATUS),
- pSRB->SRBTotalXferLength, dLeftCounter);
+ DC395x_read8(acb, TRM_S1040_DMA_STATUS),
+ srb->total_xfer_length, d_left_counter);
#endif
- pSRB->SRBTotalXferLength = dLeftCounter;
+ srb->total_xfer_length = d_left_counter;
} else { /* phase changed */
/*
* parsing the case:
@@ -3131,33 +2942,33 @@
* there were some data residue in SCSI FIFO or
* SCSI transfer counter not empty
*/
- DC395x_update_SGlist(pSRB, dLeftCounter);
+ update_sg_list(srb, d_left_counter);
}
}
/* KG: The target may decide to disconnect: Empty FIFO before! */
if ((*pscsi_status & PHASEMASK) != PH_DATA_IN) {
/*dprintkl(KERN_DEBUG, "Debug: Clean up after Data In ...\n"); */
- DC395x_cleanup_after_transfer(pACB, pSRB);
+ cleanup_after_transfer(acb, srb);
}
#if 0
/* KG: Make sure, no previous transfers are pending! */
- bval = DC395x_read8(TRM_S1040_SCSI_FIFOCNT);
+ bval = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
if (!(bval & 0x40)) {
bval &= 0x1f;
dprintkl(KERN_DEBUG,
"DIP0(%li): %i bytes in SCSI FIFO (stat %04x) (left %08x)!!\n",
- pSRB->pcmd->pid, bval & 0x1f, scsi_status,
- dLeftCounter);
- if ((dLeftCounter == 0)
+ srb->cmd->pid, bval & 0x1f, scsi_status,
+ d_left_counter);
+ if ((d_left_counter == 0)
|| (scsi_status & SCSIXFERCNT_2_ZERO)) {
dprintkl(KERN_DEBUG, "Clear FIFO!\n");
- DC395x_clrfifo(pACB, "DIP0");
+ clear_fifo(acb, "DIP0");
}
}
#endif
/*DC395x_write8 (TRM_S1040_DMA_CONTROL, CLRXFIFO | ABORTXFER); */
- /*DC395x_clrfifo (pACB, "DIP0"); */
+ /*clear_fifo (acb, "DIP0"); */
/*DC395x_write16 (TRM_S1040_SCSI_CONTROL, DO_DATALATCH); */
TRACEPRINTF(".*");
}
@@ -3166,25 +2977,25 @@
/*
********************************************************************
* scsiio
- * DC395x_DataInPhase1: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * data_in_phase1: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =1
********************************************************************
*/
-static void
-DC395x_DataInPhase1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
+static
+void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
u16 * pscsi_status)
{
- dprintkdbg(DBG_0, "DC395x_DataInPhase1.....\n");
+ dprintkdbg(DBG_0, "data_in_phase1.....\n");
/* FIFO should be cleared, if previous phase was not DataPhase */
- /*DC395x_clrfifo (pACB, "DIP1"); */
+ /*clear_fifo (acb, "DIP1"); */
/* Allow data in! */
/*DC395x_write16 (TRM_S1040_SCSI_CONTROL, DO_DATALATCH); */
TRACEPRINTF("DIP1:*");
/*
** do prepare before transfer when data in phase
*/
- DC395x_DataIO_transfer(pACB, pSRB, XFERDATAIN);
+ data_io_transfer(acb, srb, XFERDATAIN);
TRACEPRINTF(".*");
}
@@ -3192,140 +3003,139 @@
/*
********************************************************************
* scsiio
- * DC395x_DataOutPhase1
- * DC395x_DataInPhase1
+ * data_out_phase1
+ * data_in_phase1
********************************************************************
*/
-void
-DC395x_DataIO_transfer(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 ioDir)
+static
+void data_io_transfer(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 io_dir)
{
u8 bval;
- struct DeviceCtlBlk *pDCB;
+ struct DeviceCtlBlk *dcb;
dprintkdbg(DBG_0, "DataIO_transfer %c (pid %li): len = %i, SG: %i/%i\n",
- ((ioDir & DMACMD_DIR) ? 'r' : 'w'), pSRB->pcmd->pid,
- pSRB->SRBTotalXferLength, pSRB->SRBSGIndex,
- pSRB->SRBSGCount);
- TRACEPRINTF("%05x(%i/%i)*", pSRB->SRBTotalXferLength,
- pSRB->SRBSGIndex, pSRB->SRBSGCount);
- pDCB = pSRB->pSRBDCB;
- if (pSRB == pACB->pTmpSRB) {
- dprintkl(KERN_ERR, "Using TmpSRB in DataPhase!\n");
- }
- if (pSRB->SRBSGIndex < pSRB->SRBSGCount) {
- if (pSRB->SRBTotalXferLength > DC395x_LASTPIO) {
- u8 dma_status = DC395x_read8(TRM_S1040_DMA_STATUS);
+ ((io_dir & DMACMD_DIR) ? 'r' : 'w'), srb->cmd->pid,
+ srb->total_xfer_length, srb->sg_index,
+ srb->sg_count);
+ TRACEPRINTF("%05x(%i/%i)*", srb->total_xfer_length,
+ srb->sg_index, srb->sg_count);
+ dcb = srb->dcb;
+ if (srb == acb->tmp_srb) {
+ dprintkl(KERN_ERR, "Using tmp_srb in DataPhase!\n");
+ }
+ if (srb->sg_index < srb->sg_count) {
+ if (srb->total_xfer_length > DC395x_LASTPIO) {
+ u8 dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
/*
* KG: What should we do: Use SCSI Cmd 0x90/0x92?
* Maybe, even ABORTXFER would be appropriate
*/
if (dma_status & XFERPENDING) {
dprintkl(KERN_DEBUG, "Xfer pending! Expect trouble!!\n");
- DC395x_dumpinfo(pACB, pDCB, pSRB);
- DC395x_write8(TRM_S1040_DMA_CONTROL,
+ dump_register_info(acb, dcb, srb);
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL,
CLRXFIFO);
}
- /*DC395x_clrfifo (pACB, "IO"); */
+ /*clear_fifo (acb, "IO"); */
/*
* load what physical address of Scatter/Gather list table want to be
* transfer
*/
- pSRB->SRBState |= SRB_DATA_XFER;
- DC395x_write32(TRM_S1040_DMA_XHIGHADDR, 0);
- if (pSRB->pcmd->use_sg) { /* with S/G */
- ioDir |= DMACMD_SG;
- DC395x_write32(TRM_S1040_DMA_XLOWADDR,
- pSRB->SRBSGBusAddr +
+ srb->state |= SRB_DATA_XFER;
+ DC395x_write32(acb, TRM_S1040_DMA_XHIGHADDR, 0);
+ if (srb->cmd->use_sg) { /* with S/G */
+ io_dir |= DMACMD_SG;
+ DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR,
+ srb->sg_bus_addr +
sizeof(struct SGentry) *
- pSRB->SRBSGIndex);
+ srb->sg_index);
/* load how many bytes in the Scatter/Gather list table */
- DC395x_write32(TRM_S1040_DMA_XCNT,
+ DC395x_write32(acb, TRM_S1040_DMA_XCNT,
((u32)
- (pSRB->SRBSGCount -
- pSRB->SRBSGIndex) << 3));
+ (srb->sg_count -
+ srb->sg_index) << 3));
} else { /* without S/G */
- ioDir &= ~DMACMD_SG;
- DC395x_write32(TRM_S1040_DMA_XLOWADDR,
- pSRB->SegmentX[0].address);
- DC395x_write32(TRM_S1040_DMA_XCNT,
- pSRB->SegmentX[0].length);
+ io_dir &= ~DMACMD_SG;
+ DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR,
+ srb->segment_x[0].address);
+ DC395x_write32(acb, TRM_S1040_DMA_XCNT,
+ srb->segment_x[0].length);
}
/* load total transfer length (24bits) max value 16Mbyte */
- DC395x_write32(TRM_S1040_SCSI_COUNTER,
- pSRB->SRBTotalXferLength);
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
- if (ioDir & DMACMD_DIR) { /* read */
- DC395x_write8(TRM_S1040_SCSI_COMMAND,
+ DC395x_write32(acb, TRM_S1040_SCSI_COUNTER,
+ srb->total_xfer_length);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ if (io_dir & DMACMD_DIR) { /* read */
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
SCMD_DMA_IN);
- DC395x_write16(TRM_S1040_DMA_COMMAND,
- ioDir);
+ DC395x_write16(acb, TRM_S1040_DMA_COMMAND,
+ io_dir);
} else {
- DC395x_write16(TRM_S1040_DMA_COMMAND,
- ioDir);
- DC395x_write8(TRM_S1040_SCSI_COMMAND,
+ DC395x_write16(acb, TRM_S1040_DMA_COMMAND,
+ io_dir);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
SCMD_DMA_OUT);
}
}
#if DC395x_LASTPIO
- else if (pSRB->SRBTotalXferLength > 0) { /* The last four bytes: Do PIO */
- /*DC395x_clrfifo (pACB, "IO"); */
+ else if (srb->total_xfer_length > 0) { /* The last four bytes: Do PIO */
+ /*clear_fifo (acb, "IO"); */
/*
* load what physical address of Scatter/Gather list table want to be
* transfer
*/
- pSRB->SRBState |= SRB_DATA_XFER;
+ srb->state |= SRB_DATA_XFER;
/* load total transfer length (24bits) max value 16Mbyte */
- DC395x_write32(TRM_S1040_SCSI_COUNTER,
- pSRB->SRBTotalXferLength);
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
- if (ioDir & DMACMD_DIR) { /* read */
- DC395x_write8(TRM_S1040_SCSI_COMMAND,
+ DC395x_write32(acb, TRM_S1040_SCSI_COUNTER,
+ srb->total_xfer_length);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ if (io_dir & DMACMD_DIR) { /* read */
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
SCMD_FIFO_IN);
} else { /* write */
- int ln = pSRB->SRBTotalXferLength;
- if (pSRB->pSRBDCB->SyncPeriod & WIDE_SYNC)
+ int ln = srb->total_xfer_length;
+ if (srb->dcb->sync_period & WIDE_SYNC)
DC395x_write8
- (TRM_S1040_SCSI_CONFIG2,
+ (acb, TRM_S1040_SCSI_CONFIG2,
CFG2_WIDEFIFO);
dprintkdbg(DBG_PIO, "DOP1: PIO %i bytes from %p:",
- pSRB->SRBTotalXferLength,
- pSRB->virt_addr);
- while (pSRB->SRBTotalXferLength) {
+ srb->total_xfer_length,
+ srb->virt_addr);
+ while (srb->total_xfer_length) {
if (debug_enabled(DBG_PIO))
- printk(" %02x", (unsigned char) *(pSRB->virt_addr));
+ printk(" %02x", (unsigned char) *(srb->virt_addr));
DC395x_write8
- (TRM_S1040_SCSI_FIFO,
- *(pSRB->virt_addr)++);
- pSRB->SRBTotalXferLength--;
- pSRB->SegmentX[pSRB->SRBSGIndex].
+ (acb, TRM_S1040_SCSI_FIFO,
+ *(srb->virt_addr)++);
+ srb->total_xfer_length--;
+ srb->segment_x[srb->sg_index].
length--;
- if (pSRB->SRBTotalXferLength
- && !pSRB->SegmentX[pSRB->
- SRBSGIndex].
+ if (srb->total_xfer_length
+ && !srb->segment_x[srb->
+ sg_index].
length) {
if (debug_enabled(DBG_PIO))
printk(" (next segment)");
- pSRB->SRBSGIndex++;
- DC395x_update_SGlist(pSRB,
- pSRB->
- SRBTotalXferLength);
+ srb->sg_index++;
+ update_sg_list(srb,
+ srb->total_xfer_length);
}
}
- if (pSRB->pSRBDCB->SyncPeriod & WIDE_SYNC) {
+ if (srb->dcb->sync_period & WIDE_SYNC) {
if (ln % 2) {
- DC395x_write8(TRM_S1040_SCSI_FIFO, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
if (debug_enabled(DBG_PIO))
printk(" |00");
}
DC395x_write8
- (TRM_S1040_SCSI_CONFIG2, 0);
+ (acb, TRM_S1040_SCSI_CONFIG2, 0);
}
- /*DC395x_write32(TRM_S1040_SCSI_COUNTER, ln); */
+ /*DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, ln); */
if (debug_enabled(DBG_PIO))
printk("\n");
- DC395x_write8(TRM_S1040_SCSI_COMMAND,
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
SCMD_FIFO_OUT);
}
}
@@ -3333,62 +3143,62 @@
else { /* xfer pad */
u8 data = 0, data2 = 0;
- if (pSRB->SRBSGCount) {
- pSRB->AdaptStatus = H_OVER_UNDER_RUN;
- pSRB->SRBStatus |= OVER_RUN;
+ if (srb->sg_count) {
+ srb->adapter_status = H_OVER_UNDER_RUN;
+ srb->status |= OVER_RUN;
}
/*
* KG: despite the fact that we are using 16 bits I/O ops
* the SCSI FIFO is only 8 bits according to the docs
* (we can set bit 1 in 0x8f to serialize FIFO access ...)
*/
- if (pDCB->SyncPeriod & WIDE_SYNC) {
- DC395x_write32(TRM_S1040_SCSI_COUNTER, 2);
- DC395x_write8(TRM_S1040_SCSI_CONFIG2,
+ if (dcb->sync_period & WIDE_SYNC) {
+ DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 2);
+ DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
CFG2_WIDEFIFO);
- if (ioDir & DMACMD_DIR) { /* read */
+ if (io_dir & DMACMD_DIR) { /* read */
data =
DC395x_read8
- (TRM_S1040_SCSI_FIFO);
+ (acb, TRM_S1040_SCSI_FIFO);
data2 =
DC395x_read8
- (TRM_S1040_SCSI_FIFO);
+ (acb, TRM_S1040_SCSI_FIFO);
/*dprintkl(KERN_DEBUG, "DataIO: Xfer pad: %02x %02x\n", data, data2); */
} else {
/* Danger, Robinson: If you find KGs scattered over the wide
* disk, the driver or chip is to blame :-( */
- DC395x_write8(TRM_S1040_SCSI_FIFO,
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO,
'K');
- DC395x_write8(TRM_S1040_SCSI_FIFO,
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO,
'G');
}
- DC395x_write8(TRM_S1040_SCSI_CONFIG2, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
} else {
- DC395x_write32(TRM_S1040_SCSI_COUNTER, 1);
+ DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1);
/* Danger, Robinson: If you find a collection of Ks on your disk
* something broke :-( */
- if (ioDir & DMACMD_DIR) { /* read */
+ if (io_dir & DMACMD_DIR) { /* read */
data =
DC395x_read8
- (TRM_S1040_SCSI_FIFO);
+ (acb, TRM_S1040_SCSI_FIFO);
/*dprintkl(KERN_DEBUG, "DataIO: Xfer pad: %02x\n", data); */
} else {
- DC395x_write8(TRM_S1040_SCSI_FIFO,
+ DC395x_write8(acb, TRM_S1040_SCSI_FIFO,
'K');
}
}
- pSRB->SRBState |= SRB_XFERPAD;
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ srb->state |= SRB_XFERPAD;
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
/*
* SCSI command
*/
bval =
- (ioDir & DMACMD_DIR) ? SCMD_FIFO_IN :
+ (io_dir & DMACMD_DIR) ? SCMD_FIFO_IN :
SCMD_FIFO_OUT;
- DC395x_write8(TRM_S1040_SCSI_COMMAND, bval);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, bval);
}
}
- /*DC395x_monitor_next_IRQ = 2; */
+ /*monitor_next_irq = 2; */
/*printk(" done\n"); */
}
@@ -3396,72 +3206,72 @@
/*
********************************************************************
* scsiio
- * DC395x_StatusPhase0: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * status_phase0: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =3
********************************************************************
*/
-static void
-DC395x_StatusPhase0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
- dprintkdbg(DBG_0, "StatusPhase0 (pid %li)\n", pSRB->pcmd->pid);
+ dprintkdbg(DBG_0, "StatusPhase0 (pid %li)\n", srb->cmd->pid);
TRACEPRINTF("STP0 *");
- pSRB->TargetStatus = DC395x_read8(TRM_S1040_SCSI_FIFO);
- pSRB->EndMessage = DC395x_read8(TRM_S1040_SCSI_FIFO); /* get message */
- pSRB->SRBState = SRB_COMPLETED;
+ srb->target_status = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
+ srb->end_message = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); /* get message */
+ srb->state = SRB_COMPLETED;
*pscsi_status = PH_BUS_FREE; /*.. initial phase */
/*1.25 */
- /*DC395x_clrfifo (pACB, "STP0"); */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ /*clear_fifo (acb, "STP0"); */
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
/*
** SCSI command
*/
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
}
/*
********************************************************************
* scsiio
- * DC395x_StatusPhase1: one of DC395x_SCSI_phase1[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * status_phase1: one of dc395x_scsi_phase1[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
* if phase =3
********************************************************************
*/
-static void
-DC395x_StatusPhase1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
- dprintkdbg(DBG_0, "StatusPhase1 (pid=%li)\n", pSRB->pcmd->pid);
+ dprintkdbg(DBG_0, "StatusPhase1 (pid=%li)\n", srb->cmd->pid);
TRACEPRINTF("STP1 *");
/* Cleanup is now done at the end of DataXXPhase0 */
- /*DC395x_cleanup_after_transfer (pACB, pSRB); */
+ /*cleanup_after_transfer (acb, srb); */
- pSRB->SRBState = SRB_STATUS;
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ srb->state = SRB_STATUS;
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
/*
* SCSI command
*/
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_COMP);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_COMP);
}
/* Message handling */
#if 0
/* Print received message */
-static void DC395x_printMsg(u8 * MsgBuf, u32 len)
+static void print_msg(u8 * msg_buf, u32 len)
{
int i;
- printk(" %02x", MsgBuf[0]);
+ printk(" %02x", msg_buf[0]);
for (i = 1; i < len; i++)
- printk(" %02x", MsgBuf[i]);
+ printk(" %02x", msg_buf[i]);
printk("\n");
}
#endif
/* Check if the message is complete */
-static inline u8 DC395x_MsgIn_complete(u8 * msgbuf, u32 len)
+static inline u8 msgin_completed(u8 * msgbuf, u32 len)
{
if (*msgbuf == EXTENDED_MESSAGE) {
if (len < 2)
@@ -3475,132 +3285,133 @@
}
#define DC395x_ENABLE_MSGOUT \
- DC395x_write16 (TRM_S1040_SCSI_CONTROL, DO_SETATN); \
- pSRB->SRBState |= SRB_MSGOUT
+ DC395x_write16 (acb, TRM_S1040_SCSI_CONTROL, DO_SETATN); \
+ srb->state |= SRB_MSGOUT
/* reject_msg */
-static inline void
-DC395x_MsgIn_reject(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static inline
+void msgin_reject(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
- pSRB->MsgOutBuf[0] = MESSAGE_REJECT;
- pSRB->MsgCnt = 1;
+ srb->msgout_buf[0] = MESSAGE_REJECT;
+ srb->msg_count = 1;
DC395x_ENABLE_MSGOUT;
- pSRB->SRBState &= ~SRB_MSGIN;
- pSRB->SRBState |= SRB_MSGOUT;
+ srb->state &= ~SRB_MSGIN;
+ srb->state |= SRB_MSGOUT;
dprintkl(KERN_INFO,
- "Reject message %02x from %02i-%i\n", pSRB->MsgInBuf[0],
- pSRB->pSRBDCB->TargetID, pSRB->pSRBDCB->TargetLUN);
+ "Reject message %02x from %02i-%i\n", srb->msgin_buf[0],
+ srb->dcb->target_id, srb->dcb->target_lun);
TRACEPRINTF("\\*");
}
/* abort command */
-static inline void
-DC395x_EnableMsgOut_Abort(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB)
+static inline
+void enable_msgout_abort(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb)
{
- pSRB->MsgOutBuf[0] = ABORT;
- pSRB->MsgCnt = 1;
+ srb->msgout_buf[0] = ABORT;
+ srb->msg_count = 1;
DC395x_ENABLE_MSGOUT;
- pSRB->SRBState &= ~SRB_MSGIN;
- pSRB->SRBState |= SRB_MSGOUT;
+ srb->state &= ~SRB_MSGIN;
+ srb->state |= SRB_MSGOUT;
/*
- if (pSRB->pSRBDCB)
- pSRB->pSRBDCB->DCBFlag &= ~ABORT_DEV_;
+ if (srb->dcb)
+ srb->dcb->flag &= ~ABORT_DEV_;
*/
TRACEPRINTF("#*");
}
-static struct ScsiReqBlk *DC395x_MsgIn_QTag(struct AdapterCtlBlk *pACB,
- struct DeviceCtlBlk *pDCB,
- u8 tag)
-{
- struct ScsiReqBlk *lastSRB = pDCB->pGoingLast;
- struct ScsiReqBlk *pSRB = pDCB->pGoingSRB;
- dprintkdbg(DBG_0, "QTag Msg (SRB %p): %i\n", pSRB, tag);
- if (!(pDCB->TagMask & (1 << tag)))
+static
+struct ScsiReqBlk *msgin_qtag(struct AdapterCtlBlk *acb,
+ struct DeviceCtlBlk *dcb,
+ u8 tag)
+{
+ struct ScsiReqBlk *last_srb = dcb->going_last;
+ struct ScsiReqBlk *srb = dcb->going_srb;
+ dprintkdbg(DBG_0, "QTag Msg (SRB %p): %i\n", srb, tag);
+ if (!(dcb->tag_mask & (1 << tag)))
dprintkl(KERN_DEBUG,
- "MsgIn_QTag: TagMask (%08x) does not reserve tag %i!\n",
- pDCB->TagMask, tag);
+ "MsgIn_QTag: tag_mask (%08x) does not reserve tag %i!\n",
+ dcb->tag_mask, tag);
- if (!pSRB)
+ if (!srb)
goto mingx0;
- while (pSRB) {
- if (pSRB->TagNumber == tag)
+ while (srb) {
+ if (srb->tag_number == tag)
break;
- if (pSRB == lastSRB)
+ if (srb == last_srb)
goto mingx0;
- pSRB = pSRB->pNextSRB;
+ srb = srb->next;
}
- dprintkdbg(DBG_0, "pid %li (%i-%i)\n", pSRB->pcmd->pid,
- pSRB->pSRBDCB->TargetID, pSRB->pSRBDCB->TargetLUN);
- if (pDCB->DCBFlag & ABORT_DEV_) {
- /*pSRB->SRBState = SRB_ABORT_SENT; */
- DC395x_EnableMsgOut_Abort(pACB, pSRB);
+ dprintkdbg(DBG_0, "pid %li (%i-%i)\n", srb->cmd->pid,
+ srb->dcb->target_id, srb->dcb->target_lun);
+ if (dcb->flag & ABORT_DEV_) {
+ /*srb->state = SRB_ABORT_SENT; */
+ enable_msgout_abort(acb, srb);
}
- if (!(pSRB->SRBState & SRB_DISCONNECT))
+ if (!(srb->state & SRB_DISCONNECT))
goto mingx0;
/* Tag found */
- TRACEPRINTF("[%s]*", pDCB->pActiveSRB->debugtrace);
+ TRACEPRINTF("[%s]*", dcb->active_srb->debugtrace);
TRACEPRINTF("RTag*");
/* Just for debugging ... */
- lastSRB = pSRB;
- pSRB = pDCB->pActiveSRB;
+ last_srb = srb;
+ srb = dcb->active_srb;
TRACEPRINTF("Found.*");
- pSRB = lastSRB;
+ srb = last_srb;
- memcpy(pSRB->MsgInBuf, pDCB->pActiveSRB->MsgInBuf, pACB->MsgLen);
- pSRB->SRBState |= pDCB->pActiveSRB->SRBState;
- pSRB->SRBState |= SRB_DATA_XFER;
- pDCB->pActiveSRB = pSRB;
+ memcpy(srb->msgin_buf, dcb->active_srb->msgin_buf, acb->msg_len);
+ srb->state |= dcb->active_srb->state;
+ srb->state |= SRB_DATA_XFER;
+ dcb->active_srb = srb;
/* How can we make the DORS happy? */
- return pSRB;
+ return srb;
mingx0:
- pSRB = pACB->pTmpSRB;
- pSRB->SRBState = SRB_UNEXPECT_RESEL;
- pDCB->pActiveSRB = pSRB;
- pSRB->MsgOutBuf[0] = MSG_ABORT_TAG;
- pSRB->MsgCnt = 1;
+ srb = acb->tmp_srb;
+ srb->state = SRB_UNEXPECT_RESEL;
+ dcb->active_srb = srb;
+ srb->msgout_buf[0] = MSG_ABORT_TAG;
+ srb->msg_count = 1;
DC395x_ENABLE_MSGOUT;
TRACEPRINTF("?*");
dprintkl(KERN_DEBUG, "Unknown tag received: %i: abort !!\n", tag);
- return pSRB;
+ return srb;
}
/* Reprogram registers */
static inline void
-DC395x_reprog(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB)
+reprogram_regs(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb)
{
- DC395x_write8(TRM_S1040_SCSI_TARGETID, pDCB->TargetID);
- DC395x_write8(TRM_S1040_SCSI_SYNC, pDCB->SyncPeriod);
- DC395x_write8(TRM_S1040_SCSI_OFFSET, pDCB->SyncOffset);
- DC395x_SetXferRate(pACB, pDCB);
+ DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id);
+ DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period);
+ DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset);
+ set_xfer_rate(acb, dcb);
}
/* set async transfer mode */
-static void
-DC395x_MsgIn_set_async(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static
+void msgin_set_async(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
- struct DeviceCtlBlk *pDCB = pSRB->pSRBDCB;
- dprintkl(KERN_DEBUG, "Target %02i: No sync transfers\n", pDCB->TargetID);
+ struct DeviceCtlBlk *dcb = srb->dcb;
+ dprintkl(KERN_DEBUG, "Target %02i: No sync transfers\n", dcb->target_id);
TRACEPRINTF("!S *");
- pDCB->SyncMode &= ~(SYNC_NEGO_ENABLE);
- pDCB->SyncMode |= SYNC_NEGO_DONE;
- /*pDCB->SyncPeriod &= 0; */
- pDCB->SyncOffset = 0;
- pDCB->MinNegoPeriod = 200 >> 2; /* 200ns <=> 5 MHz */
- pSRB->SRBState &= ~SRB_DO_SYNC_NEGO;
- DC395x_reprog(pACB, pDCB);
- if ((pDCB->SyncMode & WIDE_NEGO_ENABLE)
- && !(pDCB->SyncMode & WIDE_NEGO_DONE)) {
- DC395x_Build_WDTR(pACB, pDCB, pSRB);
+ dcb->sync_mode &= ~(SYNC_NEGO_ENABLE);
+ dcb->sync_mode |= SYNC_NEGO_DONE;
+ /*dcb->sync_period &= 0; */
+ dcb->sync_offset = 0;
+ dcb->min_nego_period = 200 >> 2; /* 200ns <=> 5 MHz */
+ srb->state &= ~SRB_DO_SYNC_NEGO;
+ reprogram_regs(acb, dcb);
+ if ((dcb->sync_mode & WIDE_NEGO_ENABLE)
+ && !(dcb->sync_mode & WIDE_NEGO_DONE)) {
+ build_wdtr(acb, dcb, srb);
DC395x_ENABLE_MSGOUT;
dprintkdbg(DBG_0, "SDTR(rej): Try WDTR anyway ...\n");
}
@@ -3608,138 +3419,138 @@
/* set sync transfer mode */
-static void
-DC395x_MsgIn_set_sync(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static
+void msgin_set_sync(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
u8 bval;
int fact;
- struct DeviceCtlBlk *pDCB = pSRB->pSRBDCB;
- /*u8 oldsyncperiod = pDCB->SyncPeriod; */
- /*u8 oldsyncoffset = pDCB->SyncOffset; */
+ struct DeviceCtlBlk *dcb = srb->dcb;
+ /*u8 oldsyncperiod = dcb->sync_period; */
+ /*u8 oldsyncoffset = dcb->sync_offset; */
dprintkdbg(DBG_1, "Target %02i: Sync: %ins (%02i.%01i MHz) Offset %i\n",
- pDCB->TargetID, pSRB->MsgInBuf[3] << 2,
- (250 / pSRB->MsgInBuf[3]),
- ((250 % pSRB->MsgInBuf[3]) * 10) / pSRB->MsgInBuf[3],
- pSRB->MsgInBuf[4]);
-
- if (pSRB->MsgInBuf[4] > 15)
- pSRB->MsgInBuf[4] = 15;
- if (!(pDCB->DevMode & NTC_DO_SYNC_NEGO))
- pDCB->SyncOffset = 0;
- else if (pDCB->SyncOffset == 0)
- pDCB->SyncOffset = pSRB->MsgInBuf[4];
- if (pSRB->MsgInBuf[4] > pDCB->SyncOffset)
- pSRB->MsgInBuf[4] = pDCB->SyncOffset;
+ dcb->target_id, srb->msgin_buf[3] << 2,
+ (250 / srb->msgin_buf[3]),
+ ((250 % srb->msgin_buf[3]) * 10) / srb->msgin_buf[3],
+ srb->msgin_buf[4]);
+
+ if (srb->msgin_buf[4] > 15)
+ srb->msgin_buf[4] = 15;
+ if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO))
+ dcb->sync_offset = 0;
+ else if (dcb->sync_offset == 0)
+ dcb->sync_offset = srb->msgin_buf[4];
+ if (srb->msgin_buf[4] > dcb->sync_offset)
+ srb->msgin_buf[4] = dcb->sync_offset;
else
- pDCB->SyncOffset = pSRB->MsgInBuf[4];
+ dcb->sync_offset = srb->msgin_buf[4];
bval = 0;
- while (bval < 7 && (pSRB->MsgInBuf[3] > dc395x_clock_period[bval]
- || pDCB->MinNegoPeriod >
- dc395x_clock_period[bval]))
+ while (bval < 7 && (srb->msgin_buf[3] > clock_period[bval]
+ || dcb->min_nego_period >
+ clock_period[bval]))
bval++;
- if (pSRB->MsgInBuf[3] < dc395x_clock_period[bval])
+ if (srb->msgin_buf[3] < clock_period[bval])
dprintkl(KERN_INFO,
"Increase sync nego period to %ins\n",
- dc395x_clock_period[bval] << 2);
- pSRB->MsgInBuf[3] = dc395x_clock_period[bval];
- pDCB->SyncPeriod &= 0xf0;
- pDCB->SyncPeriod |= ALT_SYNC | bval;
- pDCB->MinNegoPeriod = pSRB->MsgInBuf[3];
+ clock_period[bval] << 2);
+ srb->msgin_buf[3] = clock_period[bval];
+ dcb->sync_period &= 0xf0;
+ dcb->sync_period |= ALT_SYNC | bval;
+ dcb->min_nego_period = srb->msgin_buf[3];
- if (pDCB->SyncPeriod & WIDE_SYNC)
+ if (dcb->sync_period & WIDE_SYNC)
fact = 500;
else
fact = 250;
dprintkl(KERN_INFO,
"Target %02i: %s Sync: %ins Offset %i (%02i.%01i MB/s)\n",
- pDCB->TargetID, (fact == 500) ? "Wide16" : "",
- pDCB->MinNegoPeriod << 2, pDCB->SyncOffset,
- (fact / pDCB->MinNegoPeriod),
- ((fact % pDCB->MinNegoPeriod) * 10 +
- pDCB->MinNegoPeriod / 2) / pDCB->MinNegoPeriod);
+ dcb->target_id, (fact == 500) ? "Wide16" : "",
+ dcb->min_nego_period << 2, dcb->sync_offset,
+ (fact / dcb->min_nego_period),
+ ((fact % dcb->min_nego_period) * 10 +
+ dcb->min_nego_period / 2) / dcb->min_nego_period);
- TRACEPRINTF("S%i *", pDCB->MinNegoPeriod << 2);
- if (!(pSRB->SRBState & SRB_DO_SYNC_NEGO)) {
+ TRACEPRINTF("S%i *", dcb->min_nego_period << 2);
+ if (!(srb->state & SRB_DO_SYNC_NEGO)) {
/* Reply with corrected SDTR Message */
dprintkl(KERN_DEBUG, " .. answer w/ %ins %i\n",
- pSRB->MsgInBuf[3] << 2, pSRB->MsgInBuf[4]);
+ srb->msgin_buf[3] << 2, srb->msgin_buf[4]);
- memcpy(pSRB->MsgOutBuf, pSRB->MsgInBuf, 5);
- pSRB->MsgCnt = 5;
+ memcpy(srb->msgout_buf, srb->msgin_buf, 5);
+ srb->msg_count = 5;
DC395x_ENABLE_MSGOUT;
- pDCB->SyncMode |= SYNC_NEGO_DONE;
+ dcb->sync_mode |= SYNC_NEGO_DONE;
} else {
- if ((pDCB->SyncMode & WIDE_NEGO_ENABLE)
- && !(pDCB->SyncMode & WIDE_NEGO_DONE)) {
- DC395x_Build_WDTR(pACB, pDCB, pSRB);
+ if ((dcb->sync_mode & WIDE_NEGO_ENABLE)
+ && !(dcb->sync_mode & WIDE_NEGO_DONE)) {
+ build_wdtr(acb, dcb, srb);
DC395x_ENABLE_MSGOUT;
dprintkdbg(DBG_0, "SDTR: Also try WDTR ...\n");
}
}
- pSRB->SRBState &= ~SRB_DO_SYNC_NEGO;
- pDCB->SyncMode |= SYNC_NEGO_DONE | SYNC_NEGO_ENABLE;
+ srb->state &= ~SRB_DO_SYNC_NEGO;
+ dcb->sync_mode |= SYNC_NEGO_DONE | SYNC_NEGO_ENABLE;
- DC395x_reprog(pACB, pDCB);
+ reprogram_regs(acb, dcb);
}
-static inline void
-DC395x_MsgIn_set_nowide(struct AdapterCtlBlk *pACB,
- struct ScsiReqBlk *pSRB)
+static inline
+void msgin_set_nowide(struct AdapterCtlBlk *acb,
+ struct ScsiReqBlk *srb)
{
- struct DeviceCtlBlk *pDCB = pSRB->pSRBDCB;
+ struct DeviceCtlBlk *dcb = srb->dcb;
dprintkdbg(DBG_KG, "WDTR got rejected from target %02i\n",
- pDCB->TargetID);
+ dcb->target_id);
TRACEPRINTF("!W *");
- pDCB->SyncPeriod &= ~WIDE_SYNC;
- pDCB->SyncMode &= ~(WIDE_NEGO_ENABLE);
- pDCB->SyncMode |= WIDE_NEGO_DONE;
- pSRB->SRBState &= ~SRB_DO_WIDE_NEGO;
- DC395x_reprog(pACB, pDCB);
- if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
- && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
- DC395x_Build_SDTR(pACB, pDCB, pSRB);
+ dcb->sync_period &= ~WIDE_SYNC;
+ dcb->sync_mode &= ~(WIDE_NEGO_ENABLE);
+ dcb->sync_mode |= WIDE_NEGO_DONE;
+ srb->state &= ~SRB_DO_WIDE_NEGO;
+ reprogram_regs(acb, dcb);
+ if ((dcb->sync_mode & SYNC_NEGO_ENABLE)
+ && !(dcb->sync_mode & SYNC_NEGO_DONE)) {
+ build_sdtr(acb, dcb, srb);
DC395x_ENABLE_MSGOUT;
dprintkdbg(DBG_0, "WDTR(rej): Try SDTR anyway ...\n");
}
}
-static void
-DC395x_MsgIn_set_wide(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static
+void msgin_set_wide(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
- struct DeviceCtlBlk *pDCB = pSRB->pSRBDCB;
- u8 wide = (pDCB->DevMode & NTC_DO_WIDE_NEGO
- && pACB->Config & HCC_WIDE_CARD) ? 1 : 0;
- if (pSRB->MsgInBuf[3] > wide)
- pSRB->MsgInBuf[3] = wide;
+ struct DeviceCtlBlk *dcb = srb->dcb;
+ u8 wide = (dcb->dev_mode & NTC_DO_WIDE_NEGO
+ && acb->config & HCC_WIDE_CARD) ? 1 : 0;
+ if (srb->msgin_buf[3] > wide)
+ srb->msgin_buf[3] = wide;
/* Completed */
- if (!(pSRB->SRBState & SRB_DO_WIDE_NEGO)) {
+ if (!(srb->state & SRB_DO_WIDE_NEGO)) {
dprintkl(KERN_DEBUG,
"Target %02i initiates Wide Nego ...\n",
- pDCB->TargetID);
- memcpy(pSRB->MsgOutBuf, pSRB->MsgInBuf, 4);
- pSRB->MsgCnt = 4;
- pSRB->SRBState |= SRB_DO_WIDE_NEGO;
+ dcb->target_id);
+ memcpy(srb->msgout_buf, srb->msgin_buf, 4);
+ srb->msg_count = 4;
+ srb->state |= SRB_DO_WIDE_NEGO;
DC395x_ENABLE_MSGOUT;
}
- pDCB->SyncMode |= (WIDE_NEGO_ENABLE | WIDE_NEGO_DONE);
- if (pSRB->MsgInBuf[3] > 0)
- pDCB->SyncPeriod |= WIDE_SYNC;
+ dcb->sync_mode |= (WIDE_NEGO_ENABLE | WIDE_NEGO_DONE);
+ if (srb->msgin_buf[3] > 0)
+ dcb->sync_period |= WIDE_SYNC;
else
- pDCB->SyncPeriod &= ~WIDE_SYNC;
- pSRB->SRBState &= ~SRB_DO_WIDE_NEGO;
- TRACEPRINTF("W%i *", (pDCB->SyncPeriod & WIDE_SYNC ? 1 : 0));
- /*pDCB->SyncMode &= ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE); */
+ dcb->sync_period &= ~WIDE_SYNC;
+ srb->state &= ~SRB_DO_WIDE_NEGO;
+ TRACEPRINTF("W%i *", (dcb->sync_period & WIDE_SYNC ? 1 : 0));
+ /*dcb->sync_mode &= ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE); */
dprintkdbg(DBG_KG,
"Wide transfers (%i bit) negotiated with target %02i\n",
- (8 << pSRB->MsgInBuf[3]), pDCB->TargetID);
- DC395x_reprog(pACB, pDCB);
- if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
- && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
- DC395x_Build_SDTR(pACB, pDCB, pSRB);
+ (8 << srb->msgin_buf[3]), dcb->target_id);
+ reprogram_regs(acb, dcb);
+ if ((dcb->sync_mode & SYNC_NEGO_ENABLE)
+ && !(dcb->sync_mode & SYNC_NEGO_DONE)) {
+ build_sdtr(acb, dcb, srb);
DC395x_ENABLE_MSGOUT;
dprintkdbg(DBG_0, "WDTR: Also try SDTR ...\n");
}
@@ -3749,8 +3560,8 @@
/*
********************************************************************
* scsiio
- * DC395x_MsgInPhase0: one of DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
+ * msgin_phase0: one of dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
* if phase =7
*
* extended message codes:
@@ -3766,68 +3577,68 @@
*
********************************************************************
*/
-void
-DC395x_MsgInPhase0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
- struct DeviceCtlBlk *pDCB;
+ struct DeviceCtlBlk *dcb;
- dprintkdbg(DBG_0, "DC395x_MsgInPhase0..............\n");
+ dprintkdbg(DBG_0, "msgin_phase0..............\n");
TRACEPRINTF("MIP0*");
- pDCB = pACB->pActiveDCB;
+ dcb = acb->active_dcb;
- pSRB->MsgInBuf[pACB->MsgLen++] = DC395x_read8(TRM_S1040_SCSI_FIFO);
- if (DC395x_MsgIn_complete(pSRB->MsgInBuf, pACB->MsgLen)) {
- TRACEPRINTF("(%02x)*", pSRB->MsgInBuf[0]);
+ srb->msgin_buf[acb->msg_len++] = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
+ if (msgin_completed(srb->msgin_buf, acb->msg_len)) {
+ TRACEPRINTF("(%02x)*", srb->msgin_buf[0]);
/*dprintkl(KERN_INFO, "MsgIn:"); */
- /*DC395x_printMsg (pSRB->MsgInBuf, pACB->MsgLen); */
+ /*print_msg (srb->msgin_buf, acb->msg_len); */
/* Now eval the msg */
- switch (pSRB->MsgInBuf[0]) {
+ switch (srb->msgin_buf[0]) {
case DISCONNECT:
- pSRB->SRBState = SRB_DISCONNECT;
+ srb->state = SRB_DISCONNECT;
break;
case SIMPLE_QUEUE_TAG:
case HEAD_OF_QUEUE_TAG:
case ORDERED_QUEUE_TAG:
- TRACEPRINTF("(%02x)*", pSRB->MsgInBuf[1]);
- pSRB =
- DC395x_MsgIn_QTag(pACB, pDCB,
- pSRB->MsgInBuf[1]);
+ TRACEPRINTF("(%02x)*", srb->msgin_buf[1]);
+ srb =
+ msgin_qtag(acb, dcb,
+ srb->msgin_buf[1]);
break;
case MESSAGE_REJECT:
- DC395x_write16(TRM_S1040_SCSI_CONTROL,
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
DO_CLRATN | DO_DATALATCH);
/* A sync nego message was rejected ! */
- if (pSRB->SRBState & SRB_DO_SYNC_NEGO) {
- DC395x_MsgIn_set_async(pACB, pSRB);
+ if (srb->state & SRB_DO_SYNC_NEGO) {
+ msgin_set_async(acb, srb);
break;
}
/* A wide nego message was rejected ! */
- if (pSRB->SRBState & SRB_DO_WIDE_NEGO) {
- DC395x_MsgIn_set_nowide(pACB, pSRB);
+ if (srb->state & SRB_DO_WIDE_NEGO) {
+ msgin_set_nowide(acb, srb);
break;
}
- DC395x_EnableMsgOut_Abort(pACB, pSRB);
- /*pSRB->SRBState |= SRB_ABORT_SENT */
+ enable_msgout_abort(acb, srb);
+ /*srb->state |= SRB_ABORT_SENT */
break;
case EXTENDED_MESSAGE:
- TRACEPRINTF("(%02x)*", pSRB->MsgInBuf[2]);
+ TRACEPRINTF("(%02x)*", srb->msgin_buf[2]);
/* SDTR */
- if (pSRB->MsgInBuf[1] == 3
- && pSRB->MsgInBuf[2] == EXTENDED_SDTR) {
- DC395x_MsgIn_set_sync(pACB, pSRB);
+ if (srb->msgin_buf[1] == 3
+ && srb->msgin_buf[2] == EXTENDED_SDTR) {
+ msgin_set_sync(acb, srb);
break;
}
/* WDTR */
- if (pSRB->MsgInBuf[1] == 2 && pSRB->MsgInBuf[2] == EXTENDED_WDTR && pSRB->MsgInBuf[3] <= 2) { /* sanity check ... */
- DC395x_MsgIn_set_wide(pACB, pSRB);
+ if (srb->msgin_buf[1] == 2 && srb->msgin_buf[2] == EXTENDED_WDTR && srb->msgin_buf[3] <= 2) { /* sanity check ... */
+ msgin_set_wide(acb, srb);
break;
}
- DC395x_MsgIn_reject(pACB, pSRB);
+ msgin_reject(acb, srb);
break;
/* Discard wide residual */
@@ -3847,97 +3658,97 @@
*/
case SAVE_POINTERS:
dprintkdbg(DBG_0, "SAVE POINTER message received (pid %li: rem.%i) ... ignore :-(\n",
- pSRB->pcmd->pid, pSRB->SRBTotalXferLength);
- /*pSRB->Saved_Ptr = pSRB->TotalXferredLen; */
+ srb->cmd->pid, srb->total_xfer_length);
+ /*srb->Saved_Ptr = srb->TotalxferredLen; */
break;
/* The device might want to restart transfer with a RESTORE */
case RESTORE_POINTERS:
dprintkl(KERN_DEBUG,
"RESTORE POINTER message received ... ignore :-(\n");
- /*dc395x_restore_ptr (pACB, pSRB); */
+ /*dc395x_restore_ptr (acb, srb); */
break;
case ABORT:
dprintkl(KERN_DEBUG,
"ABORT msg received (pid %li %02i-%i)\n",
- pSRB->pcmd->pid, pDCB->TargetID,
- pDCB->TargetLUN);
- pDCB->DCBFlag |= ABORT_DEV_;
- DC395x_EnableMsgOut_Abort(pACB, pSRB);
+ srb->cmd->pid, dcb->target_id,
+ dcb->target_lun);
+ dcb->flag |= ABORT_DEV_;
+ enable_msgout_abort(acb, srb);
break;
/* reject unknown messages */
default:
- if (pSRB->MsgInBuf[0] & IDENTIFY_BASE) {
+ if (srb->msgin_buf[0] & IDENTIFY_BASE) {
dprintkl(KERN_DEBUG, "Identify Message received?\n");
- /*TRACEOUT (" %s\n", pSRB->debugtrace); */
- pSRB->MsgCnt = 1;
- pSRB->MsgOutBuf[0] = pDCB->IdentifyMsg;
+ /*TRACEOUT (" %s\n", srb->debugtrace); */
+ srb->msg_count = 1;
+ srb->msgout_buf[0] = dcb->identify_msg;
DC395x_ENABLE_MSGOUT;
- pSRB->SRBState |= SRB_MSGOUT;
+ srb->state |= SRB_MSGOUT;
/*break; */
}
- DC395x_MsgIn_reject(pACB, pSRB);
- TRACEOUT(" %s\n", pSRB->debugtrace);
+ msgin_reject(acb, srb);
+ TRACEOUT(" %s\n", srb->debugtrace);
}
TRACEPRINTF(".*");
/* Clear counter and MsgIn state */
- pSRB->SRBState &= ~SRB_MSGIN;
- pACB->MsgLen = 0;
+ srb->state &= ~SRB_MSGIN;
+ acb->msg_len = 0;
}
/*1.25 */
if ((*pscsi_status & PHASEMASK) != PH_MSG_IN)
#if 0
- DC395x_clrfifo(pACB, "MIP0_");
+ clear_fifo(acb, "MIP0_");
#else
TRACEPRINTF("N/Cln *");
#endif
*pscsi_status = PH_BUS_FREE;
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important ... you know! */
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important ... you know! */
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
}
/*
********************************************************************
* scsiio
- * DC395x_MsgInPhase1: one of DC395x_SCSI_phase1[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * msgin_phase1: one of dc395x_scsi_phase1[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
* if phase =7
********************************************************************
*/
-static void
-DC395x_MsgInPhase1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
- dprintkdbg(DBG_0, "DC395x_MsgInPhase1..............\n");
+ dprintkdbg(DBG_0, "msgin_phase1..............\n");
TRACEPRINTF("MIP1 *");
- DC395x_clrfifo(pACB, "MIP1");
- DC395x_write32(TRM_S1040_SCSI_COUNTER, 1);
- if (!(pSRB->SRBState & SRB_MSGIN)) {
- pSRB->SRBState &= ~SRB_DISCONNECT;
- pSRB->SRBState |= SRB_MSGIN;
+ clear_fifo(acb, "MIP1");
+ DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1);
+ if (!(srb->state & SRB_MSGIN)) {
+ srb->state &= ~SRB_DISCONNECT;
+ srb->state |= SRB_MSGIN;
}
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
/*
* SCSI command
*/
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_FIFO_IN);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_IN);
}
/*
********************************************************************
* scsiio
- * DC395x_Nop0: one of DC395x_SCSI_phase1[] ,DC395x_SCSI_phase0[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * nop0: one of dc395x_scsi_phase1[] ,dc395x_scsi_phase0[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
* if phase =4 ..PH_BUS_FREE
********************************************************************
*/
-static void
-DC395x_Nop0(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
/*TRACEPRINTF("NOP0 *"); */
}
@@ -3946,15 +3757,15 @@
/*
********************************************************************
* scsiio
- * DC395x_Nop1: one of DC395x_SCSI_phase0[] ,DC395x_SCSI_phase1[] vectors
- * DC395x_stateV = (void *)DC395x_SCSI_phase0[phase]
- * DC395x_stateV = (void *)DC395x_SCSI_phase1[phase]
+ * nop1: one of dc395x_scsi_phase0[] ,dc395x_scsi_phase1[] vectors
+ * dc395x_statev = (void *)dc395x_scsi_phase0[phase]
+ * dc395x_statev = (void *)dc395x_scsi_phase1[phase]
* if phase =5
********************************************************************
*/
-static void
-DC395x_Nop1(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB,
- u16 * pscsi_status)
+static
+void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
+ u16 * pscsi_status)
{
/*TRACEPRINTF("NOP1 *"); */
}
@@ -3963,38 +3774,38 @@
/*
********************************************************************
* scsiio
- * DC395x_MsgInPhase0
+ * msgin_phase0
********************************************************************
*/
-static void
-DC395x_SetXferRate(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB)
+static
+void set_xfer_rate(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb)
{
u8 bval;
u16 cnt, i;
- struct DeviceCtlBlk *pDCBTemp;
+ struct DeviceCtlBlk *dcb_temp;
/*
** set all lun device's period , offset
*/
- if (!(pDCB->IdentifyMsg & 0x07)) {
- if (pACB->scan_devices)
- DC395x_CurrSyncOffset = pDCB->SyncOffset;
+ if (!(dcb->identify_msg & 0x07)) {
+ if (acb->scan_devices)
+ current_sync_offset = dcb->sync_offset;
else {
- pDCBTemp = pACB->pLinkDCB;
- cnt = pACB->DCBCnt;
- bval = pDCB->TargetID;
+ dcb_temp = acb->link_dcb;
+ cnt = acb->dcb_count;
+ bval = dcb->target_id;
for (i = 0; i < cnt; i++) {
- if (pDCBTemp->TargetID == bval) {
- pDCBTemp->SyncPeriod =
- pDCB->SyncPeriod;
- pDCBTemp->SyncOffset =
- pDCB->SyncOffset;
- pDCBTemp->SyncMode =
- pDCB->SyncMode;
- pDCBTemp->MinNegoPeriod =
- pDCB->MinNegoPeriod;
+ if (dcb_temp->target_id == bval) {
+ dcb_temp->sync_period =
+ dcb->sync_period;
+ dcb_temp->sync_offset =
+ dcb->sync_offset;
+ dcb_temp->sync_mode =
+ dcb->sync_mode;
+ dcb_temp->min_nego_period =
+ dcb->min_nego_period;
}
- pDCBTemp = pDCBTemp->pNextDCB;
+ dcb_temp = dcb_temp->next;
}
}
}
@@ -4005,115 +3816,114 @@
/*
********************************************************************
* scsiio
- * DC395x_Interrupt
+ * dc395x_interrupt
********************************************************************
*/
-void DC395x_Disconnect(struct AdapterCtlBlk *pACB)
+static void disconnect(struct AdapterCtlBlk *acb)
{
- struct DeviceCtlBlk *pDCB;
- struct ScsiReqBlk *pSRB;
+ struct DeviceCtlBlk *dcb;
+ struct ScsiReqBlk *srb;
- dprintkdbg(DBG_0, "Disconnect (pid=%li)\n", pACB->pActiveDCB->pActiveSRB->pcmd->pid);
- pDCB = pACB->pActiveDCB;
- if (!pDCB) {
- dprintkl(KERN_ERR, "Disc: Exception Disconnect pDCB=NULL !!\n ");
+ dprintkdbg(DBG_0, "Disconnect (pid=%li)\n", acb->active_dcb->active_srb->cmd->pid);
+ dcb = acb->active_dcb;
+ if (!dcb) {
+ dprintkl(KERN_ERR, "Disc: Exception Disconnect dcb=NULL !!\n ");
udelay(500);
/* Suspend queue for a while */
- pACB->pScsiHost->last_reset =
+ acb->scsi_host->last_reset =
jiffies + HZ / 2 +
HZ *
- dc395x_trm_eepromBuf[pACB->AdapterIndex].
- NvramDelayTime;
- DC395x_clrfifo(pACB, "DiscEx");
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
+ eeprom_buf[acb->adapter_index].
+ delay_time;
+ clear_fifo(acb, "DiscEx");
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
return;
}
- pSRB = pDCB->pActiveSRB;
- pACB->pActiveDCB = 0;
+ srb = dcb->active_srb;
+ acb->active_dcb = NULL;
TRACEPRINTF("DISC *");
- pSRB->ScsiPhase = PH_BUS_FREE; /* initial phase */
- DC395x_clrfifo(pACB, "Disc");
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
- if (pSRB->SRBState & SRB_UNEXPECT_RESEL) {
+ srb->scsi_phase = PH_BUS_FREE; /* initial phase */
+ clear_fifo(acb, "Disc");
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
+ if (srb->state & SRB_UNEXPECT_RESEL) {
dprintkl(KERN_ERR, "Disc: Unexpected Reselection (%i-%i)\n",
- pDCB->TargetID, pDCB->TargetLUN);
- pSRB->SRBState = 0;
- DC395x_Waiting_process(pACB);
- } else if (pSRB->SRBState & SRB_ABORT_SENT) {
- /*Scsi_Cmnd* pcmd = pSRB->pcmd; */
- pDCB->DCBFlag &= ~ABORT_DEV_;
- pACB->pScsiHost->last_reset = jiffies + HZ / 2 + 1;
+ dcb->target_id, dcb->target_lun);
+ srb->state = 0;
+ waiting_process_next(acb);
+ } else if (srb->state & SRB_ABORT_SENT) {
+ /*Scsi_Cmnd* cmd = srb->cmd; */
+ dcb->flag &= ~ABORT_DEV_;
+ acb->scsi_host->last_reset = jiffies + HZ / 2 + 1;
dprintkl(KERN_ERR, "Disc: SRB_ABORT_SENT!\n");
- DC395x_DoingSRB_Done(pACB, DID_ABORT, pSRB->pcmd, 1);
- DC395x_Query_to_Waiting(pACB);
- DC395x_Waiting_process(pACB);
+ doing_srb_done(acb, DID_ABORT, srb->cmd, 1);
+ waiting_process_next(acb);
} else {
- if ((pSRB->SRBState & (SRB_START_ + SRB_MSGOUT))
- || !(pSRB->
- SRBState & (SRB_DISCONNECT + SRB_COMPLETED))) {
+ if ((srb->state & (SRB_START_ + SRB_MSGOUT))
+ || !(srb->
+ state & (SRB_DISCONNECT + SRB_COMPLETED))) {
/*
* Selection time out
* SRB_START_ || SRB_MSGOUT || (!SRB_DISCONNECT && !SRB_COMPLETED)
*/
/* Unexp. Disc / Sel Timeout */
- if (pSRB->SRBState != SRB_START_
- && pSRB->SRBState != SRB_MSGOUT) {
- pSRB->SRBState = SRB_READY;
+ if (srb->state != SRB_START_
+ && srb->state != SRB_MSGOUT) {
+ srb->state = SRB_READY;
dprintkl(KERN_DEBUG, "Unexpected Disconnection (pid %li)!\n",
- pSRB->pcmd->pid);
- pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
+ srb->cmd->pid);
+ srb->target_status = SCSI_STAT_SEL_TIMEOUT;
TRACEPRINTF("UnExpD *");
- TRACEOUT("%s\n", pSRB->debugtrace);
+ TRACEOUT("%s\n", srb->debugtrace);
goto disc1;
} else {
/* Normal selection timeout */
TRACEPRINTF("SlTO *");
dprintkdbg(DBG_KG,
"Disc: SelTO (pid=%li) for dev %02i-%i\n",
- pSRB->pcmd->pid, pDCB->TargetID,
- pDCB->TargetLUN);
- if (pSRB->RetryCnt++ > DC395x_MAX_RETRIES
- || pACB->scan_devices) {
- pSRB->TargetStatus =
+ srb->cmd->pid, dcb->target_id,
+ dcb->target_lun);
+ if (srb->retry_count++ > DC395x_MAX_RETRIES
+ || acb->scan_devices) {
+ srb->target_status =
SCSI_STAT_SEL_TIMEOUT;
goto disc1;
}
- DC395x_freetag(pDCB, pSRB);
- DC395x_Going_to_Waiting(pDCB, pSRB);
+ free_tag(dcb, srb);
+ move_srb_going_to_waiting(dcb, srb);
dprintkdbg(DBG_KG, "Retry pid %li ...\n",
- pSRB->pcmd->pid);
- DC395x_waiting_timer(pACB, HZ / 20);
+ srb->cmd->pid);
+ waiting_set_timer(acb, HZ / 20);
}
- } else if (pSRB->SRBState & SRB_DISCONNECT) {
- u8 bval = DC395x_read8(TRM_S1040_SCSI_SIGNAL);
+ } else if (srb->state & SRB_DISCONNECT) {
+ u8 bval = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
/*
* SRB_DISCONNECT (This is what we expect!)
*/
- /* dprintkl(KERN_DEBUG, "DoWaitingSRB (pid=%li)\n", pSRB->pcmd->pid); */
+ /* dprintkl(KERN_DEBUG, "DoWaitingSRB (pid=%li)\n", srb->cmd->pid); */
TRACEPRINTF("+*");
if (bval & 0x40) {
dprintkdbg(DBG_0, "Debug: DISC: SCSI bus stat %02x: ACK set! Other controllers?\n",
bval);
/* It could come from another initiator, therefore don't do much ! */
TRACEPRINTF("ACK(%02x) *", bval);
- /*DC395x_dumpinfo (pACB, pDCB, pSRB); */
- /*TRACEOUT (" %s\n", pSRB->debugtrace); */
- /*pDCB->DCBFlag |= ABORT_DEV_; */
- /*DC395x_EnableMsgOut_Abort (pACB, pSRB); */
+ /*dump_register_info (acb, dcb, srb); */
+ /*TRACEOUT (" %s\n", srb->debugtrace); */
+ /*dcb->flag |= ABORT_DEV_; */
+ /*enable_msgout_abort (acb, srb); */
/*DC395x_write16 (TRM_S1040_SCSI_CONTROL, DO_CLRFIFO | DO_CLRATN | DO_HWRESELECT); */
} else
- DC395x_Waiting_process(pACB);
- } else if (pSRB->SRBState & SRB_COMPLETED) {
+ waiting_process_next(acb);
+ } else if (srb->state & SRB_COMPLETED) {
disc1:
/*
** SRB_COMPLETED
*/
- DC395x_freetag(pDCB, pSRB);
- pDCB->pActiveSRB = 0;
- pSRB->SRBState = SRB_FREE;
- /*dprintkl(KERN_DEBUG, "done (pid=%li)\n", pSRB->pcmd->pid); */
- DC395x_SRBdone(pACB, pDCB, pSRB);
+ free_tag(dcb, srb);
+ dcb->active_srb = NULL;
+ srb->state = SRB_FREE;
+ /*dprintkl(KERN_DEBUG, "done (pid=%li)\n", srb->cmd->pid); */
+ srb_done(acb, dcb, srb);
}
}
return;
@@ -4123,173 +3933,172 @@
/*
********************************************************************
* scsiio
- * DC395x_Reselect
+ * reselect
********************************************************************
*/
-void DC395x_Reselect(struct AdapterCtlBlk *pACB)
+static void reselect(struct AdapterCtlBlk *acb)
{
- struct DeviceCtlBlk *pDCB;
- struct ScsiReqBlk *pSRB = 0;
- u16 RselTarLunId;
+ struct DeviceCtlBlk *dcb;
+ struct ScsiReqBlk *srb = NULL;
+ u16 rsel_tar_lun_id;
u8 id, lun;
u8 arblostflag = 0;
- dprintkdbg(DBG_0, "DC395x_Reselect..............\n");
+ dprintkdbg(DBG_0, "reselect..............\n");
- DC395x_clrfifo(pACB, "Resel");
- /*DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_HWRESELECT | DO_DATALATCH); */
+ clear_fifo(acb, "Resel");
+ /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT | DO_DATALATCH); */
/* Read Reselected Target ID and LUN */
- RselTarLunId = DC395x_read16(TRM_S1040_SCSI_TARGETID);
- pDCB = pACB->pActiveDCB;
- if (pDCB) { /* Arbitration lost but Reselection win */
- pSRB = pDCB->pActiveSRB;
- if (!pSRB) {
- dprintkl(KERN_DEBUG, "Arb lost Resel won, but pActiveSRB == 0!\n");
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ rsel_tar_lun_id = DC395x_read16(acb, TRM_S1040_SCSI_TARGETID);
+ dcb = acb->active_dcb;
+ if (dcb) { /* Arbitration lost but Reselection win */
+ srb = dcb->active_srb;
+ if (!srb) {
+ dprintkl(KERN_DEBUG, "Arb lost Resel won, but active_srb == NULL!\n");
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
return;
}
/* Why the if ? */
- if (!(pACB->scan_devices)) {
+ if (!(acb->scan_devices)) {
dprintkdbg(DBG_KG,
"Arb lost but Resel win pid %li (%02i-%i) Rsel %04x Stat %04x\n",
- pSRB->pcmd->pid, pDCB->TargetID,
- pDCB->TargetLUN, RselTarLunId,
- DC395x_read16(TRM_S1040_SCSI_STATUS));
+ srb->cmd->pid, dcb->target_id,
+ dcb->target_lun, rsel_tar_lun_id,
+ DC395x_read16(acb, TRM_S1040_SCSI_STATUS));
TRACEPRINTF("ArbLResel!*");
- /*TRACEOUT (" %s\n", pSRB->debugtrace); */
+ /*TRACEOUT (" %s\n", srb->debugtrace); */
arblostflag = 1;
- /*pSRB->SRBState |= SRB_DISCONNECT; */
+ /*srb->state |= SRB_DISCONNECT; */
- pSRB->SRBState = SRB_READY;
- DC395x_freetag(pDCB, pSRB);
- DC395x_Going_to_Waiting(pDCB, pSRB);
- DC395x_waiting_timer(pACB, HZ / 20);
+ srb->state = SRB_READY;
+ free_tag(dcb, srb);
+ move_srb_going_to_waiting(dcb, srb);
+ waiting_set_timer(acb, HZ / 20);
/* return; */
}
}
/* Read Reselected Target Id and LUN */
- if (!(RselTarLunId & (IDENTIFY_BASE << 8)))
+ if (!(rsel_tar_lun_id & (IDENTIFY_BASE << 8)))
dprintkl(KERN_DEBUG, "Resel expects identify msg! Got %04x!\n",
- RselTarLunId);
- id = RselTarLunId & 0xff;
- lun = (RselTarLunId >> 8) & 7;
- pDCB = DC395x_findDCB(pACB, id, lun);
- if (!pDCB) {
+ rsel_tar_lun_id);
+ id = rsel_tar_lun_id & 0xff;
+ lun = (rsel_tar_lun_id >> 8) & 7;
+ dcb = find_dcb(acb, id, lun);
+ if (!dcb) {
dprintkl(KERN_ERR, "Reselect from non existing device (%02i-%i)\n",
id, lun);
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
return;
}
- pACB->pActiveDCB = pDCB;
+ acb->active_dcb = dcb;
- if (!(pDCB->DevMode & NTC_DO_DISCONNECT))
+ if (!(dcb->dev_mode & NTC_DO_DISCONNECT))
dprintkl(KERN_DEBUG, "Reselection in spite of forbidden disconnection? (%02i-%i)\n",
- pDCB->TargetID, pDCB->TargetLUN);
+ dcb->target_id, dcb->target_lun);
- if ((pDCB->SyncMode & EN_TAG_QUEUEING) /*&& !arblostflag */ ) {
- struct ScsiReqBlk *oldSRB = pSRB;
- pSRB = pACB->pTmpSRB;
+ if ((dcb->sync_mode & EN_TAG_QUEUEING) /*&& !arblostflag */ ) {
+ struct ScsiReqBlk *oldSRB = srb;
+ srb = acb->tmp_srb;
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
- pSRB->debugpos = 0;
- pSRB->debugtrace[0] = 0;
+ srb->debugpos = 0;
+ srb->debugtrace[0] = 0;
#endif
- pDCB->pActiveSRB = pSRB;
+ dcb->active_srb = srb;
if (oldSRB)
- TRACEPRINTF("ArbLResel(%li):*", oldSRB->pcmd->pid);
+ TRACEPRINTF("ArbLResel(%li):*", oldSRB->cmd->pid);
/*if (arblostflag) dprintkl(KERN_DEBUG, "Reselect: Wait for Tag ... \n"); */
} else {
/* There can be only one! */
- pSRB = pDCB->pActiveSRB;
- if (pSRB)
+ srb = dcb->active_srb;
+ if (srb)
TRACEPRINTF("RSel *");
- if (!pSRB || !(pSRB->SRBState & SRB_DISCONNECT)) {
+ if (!srb || !(srb->state & SRB_DISCONNECT)) {
/*
* abort command
*/
dprintkl(KERN_DEBUG,
"Reselected w/o disconnected cmds from %02i-%i?\n",
- pDCB->TargetID, pDCB->TargetLUN);
- pSRB = pACB->pTmpSRB;
- pSRB->SRBState = SRB_UNEXPECT_RESEL;
- pDCB->pActiveSRB = pSRB;
- DC395x_EnableMsgOut_Abort(pACB, pSRB);
+ dcb->target_id, dcb->target_lun);
+ srb = acb->tmp_srb;
+ srb->state = SRB_UNEXPECT_RESEL;
+ dcb->active_srb = srb;
+ enable_msgout_abort(acb, srb);
} else {
- if (pDCB->DCBFlag & ABORT_DEV_) {
- /*pSRB->SRBState = SRB_ABORT_SENT; */
- DC395x_EnableMsgOut_Abort(pACB, pSRB);
+ if (dcb->flag & ABORT_DEV_) {
+ /*srb->state = SRB_ABORT_SENT; */
+ enable_msgout_abort(acb, srb);
} else
- pSRB->SRBState = SRB_DATA_XFER;
+ srb->state = SRB_DATA_XFER;
}
- /*if (arblostflag) TRACEOUT (" %s\n", pSRB->debugtrace); */
+ /*if (arblostflag) TRACEOUT (" %s\n", srb->debugtrace); */
}
- pSRB->ScsiPhase = PH_BUS_FREE; /* initial phase */
+ srb->scsi_phase = PH_BUS_FREE; /* initial phase */
/*
***********************************************
** Program HA ID, target ID, period and offset
***********************************************
*/
- DC395x_write8(TRM_S1040_SCSI_HOSTID, pACB->pScsiHost->this_id); /* host ID */
- DC395x_write8(TRM_S1040_SCSI_TARGETID, pDCB->TargetID); /* target ID */
- DC395x_write8(TRM_S1040_SCSI_OFFSET, pDCB->SyncOffset); /* offset */
- DC395x_write8(TRM_S1040_SCSI_SYNC, pDCB->SyncPeriod); /* sync period, wide */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
+ DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id); /* host ID */
+ DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id); /* target ID */
+ DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset); /* offset */
+ DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); /* sync period, wide */
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
/* SCSI command */
- DC395x_write8(TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
+ DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
}
/* Dynamic device handling */
/* Remove dev (and DCB) */
-static void
-DC395x_remove_dev(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB)
+static
+void remove_dev(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb)
{
- struct DeviceCtlBlk *pPrevDCB = pACB->pLinkDCB;
+ struct DeviceCtlBlk *pPrevDCB = acb->link_dcb;
dprintkdbg(DBG_0, "remove_dev\n");
- if (pDCB->GoingSRBCnt > 1) {
+ if (dcb->going_srb_count > 1) {
dprintkdbg(DBG_DCB, "Driver won't free DCB (ID %i, LUN %i): 0x%08x because of SRBCnt %i\n",
- pDCB->TargetID, pDCB->TargetLUN, (int) pDCB,
- pDCB->GoingSRBCnt);
+ dcb->target_id, dcb->target_lun, (int) dcb,
+ dcb->going_srb_count);
return;
}
- pACB->DCBmap[pDCB->TargetID] &= ~(1 << pDCB->TargetLUN);
- pACB->children[pDCB->TargetID][pDCB->TargetLUN] = NULL;
+ acb->dcb_map[dcb->target_id] &= ~(1 << dcb->target_lun);
+ acb->children[dcb->target_id][dcb->target_lun] = NULL;
/* The first one */
- if (pDCB == pACB->pLinkDCB) {
+ if (dcb == acb->link_dcb) {
/* The last one */
- if (pACB->pLastDCB == pDCB) {
- pDCB->pNextDCB = 0;
- pACB->pLastDCB = 0;
+ if (acb->last_dcb == dcb) {
+ dcb->next = NULL;
+ acb->last_dcb = NULL;
}
- pACB->pLinkDCB = pDCB->pNextDCB;
+ acb->link_dcb = dcb->next;
} else {
- while (pPrevDCB->pNextDCB != pDCB)
- pPrevDCB = pPrevDCB->pNextDCB;
- pPrevDCB->pNextDCB = pDCB->pNextDCB;
- if (pDCB == pACB->pLastDCB)
- pACB->pLastDCB = pPrevDCB;
+ while (pPrevDCB->next != dcb)
+ pPrevDCB = pPrevDCB->next;
+ pPrevDCB->next = dcb->next;
+ if (dcb == acb->last_dcb)
+ acb->last_dcb = pPrevDCB;
}
dprintkdbg(DBG_DCB, "Driver about to free DCB (ID %i, LUN %i): %p\n",
- pDCB->TargetID, pDCB->TargetLUN, pDCB);
- if (pDCB == pACB->pActiveDCB)
- pACB->pActiveDCB = 0;
- if (pDCB == pACB->pLinkDCB)
- pACB->pLinkDCB = pDCB->pNextDCB;
- if (pDCB == pACB->pDCBRunRobin)
- pACB->pDCBRunRobin = pDCB->pNextDCB;
- pACB->DCBCnt--;
- dc395x_kfree(pDCB);
- /* pACB->DeviceCnt--; */
+ dcb->target_id, dcb->target_lun, dcb);
+ if (dcb == acb->active_dcb)
+ acb->active_dcb = NULL;
+ if (dcb == acb->link_dcb)
+ acb->link_dcb = dcb->next;
+ if (dcb == acb->dcb_run_robin)
+ acb->dcb_run_robin = dcb->next;
+ acb->dcb_count--;
+ dc395x_kfree(dcb);
}
-static inline u8 DC395x_tagq_blacklist(char *name)
+static inline u8 tagq_blacklist(char *name)
{
#ifndef DC395x_NO_TAGQ
#if 0
@@ -4305,36 +4114,36 @@
}
-static void
-DC395x_disc_tagq_set(struct DeviceCtlBlk *pDCB, struct ScsiInqData *ptr)
+static
+void disc_tagq_set(struct DeviceCtlBlk *dcb, struct ScsiInqData *ptr)
{
/* Check for SCSI format (ANSI and Response data format) */
if ((ptr->Vers & 0x07) >= 2 || (ptr->RDF & 0x0F) == 2) {
if ((ptr->Flags & SCSI_INQ_CMDQUEUE)
- && (pDCB->DevMode & NTC_DO_TAG_QUEUEING) &&
- /*(pDCB->DevMode & NTC_DO_DISCONNECT) */
- /* ((pDCB->DevType == TYPE_DISK)
- || (pDCB->DevType == TYPE_MOD)) && */
- !DC395x_tagq_blacklist(((char *) ptr) + 8)) {
- if (pDCB->MaxCommand == 1)
- pDCB->MaxCommand =
- pDCB->pDCBACB->TagMaxNum;
- pDCB->SyncMode |= EN_TAG_QUEUEING;
- /*pDCB->TagMask = 0; */
+ && (dcb->dev_mode & NTC_DO_TAG_QUEUEING) &&
+ /*(dcb->dev_mode & NTC_DO_DISCONNECT) */
+ /* ((dcb->dev_type == TYPE_DISK)
+ || (dcb->dev_type == TYPE_MOD)) && */
+ !tagq_blacklist(((char *) ptr) + 8)) {
+ if (dcb->max_command == 1)
+ dcb->max_command =
+ dcb->acb->tag_max_num;
+ dcb->sync_mode |= EN_TAG_QUEUEING;
+ /*dcb->tag_mask = 0; */
} else
- pDCB->MaxCommand = 1;
+ dcb->max_command = 1;
}
}
-static void
-DC395x_add_dev(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiInqData *ptr)
+static
+void add_dev(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiInqData *ptr)
{
u8 bval1 = ptr->DevType & SCSI_DEVTYPE;
- pDCB->DevType = bval1;
+ dcb->dev_type = bval1;
/* if (bval1 == TYPE_DISK || bval1 == TYPE_MOD) */
- DC395x_disc_tagq_set(pDCB, ptr);
+ disc_tagq_set(dcb, ptr);
}
@@ -4343,33 +4152,33 @@
* unmap mapped pci regions from SRB
********************************************************************
*/
-static void
-DC395x_pci_unmap(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static
+void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
int dir;
- Scsi_Cmnd *pcmd = pSRB->pcmd;
- dir = scsi_to_pci_dma_dir(pcmd->sc_data_direction);
- if (pcmd->use_sg && dir != PCI_DMA_NONE) {
+ Scsi_Cmnd *cmd = srb->cmd;
+ dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
+ if (cmd->use_sg && dir != PCI_DMA_NONE) {
/* unmap DC395x SG list */
dprintkdbg(DBG_SGPARANOIA,
"Unmap SG descriptor list %08x (%05x)\n",
- pSRB->SRBSGBusAddr,
+ srb->sg_bus_addr,
sizeof(struct SGentry) * DC395x_MAX_SG_LISTENTRY);
- pci_unmap_single(pACB->pdev, pSRB->SRBSGBusAddr,
+ pci_unmap_single(acb->dev, srb->sg_bus_addr,
sizeof(struct SGentry) *
DC395x_MAX_SG_LISTENTRY,
PCI_DMA_TODEVICE);
dprintkdbg(DBG_SGPARANOIA, "Unmap %i SG segments from %p\n",
- pcmd->use_sg, pcmd->request_buffer);
+ cmd->use_sg, cmd->request_buffer);
/* unmap the sg segments */
- pci_unmap_sg(pACB->pdev,
- (struct scatterlist *) pcmd->request_buffer,
- pcmd->use_sg, dir);
- } else if (pcmd->request_buffer && dir != PCI_DMA_NONE) {
+ pci_unmap_sg(acb->dev,
+ (struct scatterlist *) cmd->request_buffer,
+ cmd->use_sg, dir);
+ } else if (cmd->request_buffer && dir != PCI_DMA_NONE) {
dprintkdbg(DBG_SGPARANOIA, "Unmap buffer at %08x (%05x)\n",
- pSRB->SegmentX[0].address, pcmd->request_bufflen);
- pci_unmap_single(pACB->pdev, pSRB->SegmentX[0].address,
- pcmd->request_bufflen, dir);
+ srb->segment_x[0].address, cmd->request_bufflen);
+ pci_unmap_single(acb->dev, srb->segment_x[0].address,
+ cmd->request_bufflen, dir);
}
}
@@ -4379,133 +4188,133 @@
* unmap mapped pci sense buffer from SRB
********************************************************************
*/
-static void
-DC395x_pci_unmap_sense(struct AdapterCtlBlk *pACB, struct ScsiReqBlk *pSRB)
+static
+void pci_unmap_srb_sense(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
{
- if (!(pSRB->SRBFlag & AUTO_REQSENSE))
+ if (!(srb->flag & AUTO_REQSENSE))
return;
/* Unmap sense buffer */
dprintkdbg(DBG_SGPARANOIA, "Unmap sense buffer from %08x\n",
- pSRB->SegmentX[0].address);
- pci_unmap_single(pACB->pdev, pSRB->SegmentX[0].address,
- pSRB->SegmentX[0].length, PCI_DMA_FROMDEVICE);
+ srb->segment_x[0].address);
+ pci_unmap_single(acb->dev, srb->segment_x[0].address,
+ srb->segment_x[0].length, PCI_DMA_FROMDEVICE);
/* Restore SG stuff */
/*printk ("Auto_ReqSense finished: Restore Counters ...\n"); */
- pSRB->SRBTotalXferLength = pSRB->Xferred;
- pSRB->SegmentX[0].address =
- pSRB->SegmentX[DC395x_MAX_SG_LISTENTRY - 1].address;
- pSRB->SegmentX[0].length =
- pSRB->SegmentX[DC395x_MAX_SG_LISTENTRY - 1].length;
+ srb->total_xfer_length = srb->xferred;
+ srb->segment_x[0].address =
+ srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address;
+ srb->segment_x[0].length =
+ srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length;
}
/*
********************************************************************
* scsiio
- * DC395x_Disconnected
+ * disconnect
* Complete execution of a SCSI command
* Signal completion to the generic SCSI driver
********************************************************************
*/
-void
-DC395x_SRBdone(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB)
+static
+void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
u8 tempcnt, status;
- Scsi_Cmnd *pcmd;
+ Scsi_Cmnd *cmd;
struct ScsiInqData *ptr;
/*u32 drv_flags=0; */
int dir;
- pcmd = pSRB->pcmd;
+ cmd = srb->cmd;
TRACEPRINTF("DONE *");
- dir = scsi_to_pci_dma_dir(pcmd->sc_data_direction);
- ptr = (struct ScsiInqData *) (pcmd->request_buffer);
- if (pcmd->use_sg)
+ dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
+ ptr = (struct ScsiInqData *) (cmd->request_buffer);
+ if (cmd->use_sg)
ptr =
(struct ScsiInqData *) CPU_ADDR(*(struct scatterlist *)
ptr);
dprintkdbg(DBG_SGPARANOIA,
"SRBdone SG=%i (%i/%i), req_buf = %p, adr = %p\n",
- pcmd->use_sg, pSRB->SRBSGIndex, pSRB->SRBSGCount,
- pcmd->request_buffer, ptr);
+ cmd->use_sg, srb->sg_index, srb->sg_count,
+ cmd->request_buffer, ptr);
dprintkdbg(DBG_KG,
- "SRBdone (pid %li, target %02i-%i): ", pSRB->pcmd->pid,
- pSRB->pcmd->device->id, pSRB->pcmd->device->lun);
- status = pSRB->TargetStatus;
- if (pSRB->SRBFlag & AUTO_REQSENSE) {
+ "SRBdone (pid %li, target %02i-%i): ", srb->cmd->pid,
+ srb->cmd->device->id, srb->cmd->device->lun);
+ status = srb->target_status;
+ if (srb->flag & AUTO_REQSENSE) {
dprintkdbg(DBG_0, "AUTO_REQSENSE1..............\n");
- DC395x_pci_unmap_sense(pACB, pSRB);
+ pci_unmap_srb_sense(acb, srb);
/*
** target status..........................
*/
- pSRB->SRBFlag &= ~AUTO_REQSENSE;
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = CHECK_CONDITION << 1;
+ srb->flag &= ~AUTO_REQSENSE;
+ srb->adapter_status = 0;
+ srb->target_status = CHECK_CONDITION << 1;
if (debug_enabled(DBG_KG)) {
- switch (pcmd->sense_buffer[2] & 0x0f) {
+ switch (cmd->sense_buffer[2] & 0x0f) {
case NOT_READY:
dprintkl(KERN_DEBUG,
"ReqSense: NOT_READY (Cmnd = 0x%02x, Dev = %i-%i, Stat = %i, Scan = %i) ",
- pcmd->cmnd[0], pDCB->TargetID,
- pDCB->TargetLUN, status, pACB->scan_devices);
+ cmd->cmnd[0], dcb->target_id,
+ dcb->target_lun, status, acb->scan_devices);
break;
case UNIT_ATTENTION:
dprintkl(KERN_DEBUG,
"ReqSense: UNIT_ATTENTION (Cmnd = 0x%02x, Dev = %i-%i, Stat = %i, Scan = %i) ",
- pcmd->cmnd[0], pDCB->TargetID,
- pDCB->TargetLUN, status, pACB->scan_devices);
+ cmd->cmnd[0], dcb->target_id,
+ dcb->target_lun, status, acb->scan_devices);
break;
case ILLEGAL_REQUEST:
dprintkl(KERN_DEBUG,
"ReqSense: ILLEGAL_REQUEST (Cmnd = 0x%02x, Dev = %i-%i, Stat = %i, Scan = %i) ",
- pcmd->cmnd[0], pDCB->TargetID,
- pDCB->TargetLUN, status, pACB->scan_devices);
+ cmd->cmnd[0], dcb->target_id,
+ dcb->target_lun, status, acb->scan_devices);
break;
case MEDIUM_ERROR:
dprintkl(KERN_DEBUG,
"ReqSense: MEDIUM_ERROR (Cmnd = 0x%02x, Dev = %i-%i, Stat = %i, Scan = %i) ",
- pcmd->cmnd[0], pDCB->TargetID,
- pDCB->TargetLUN, status, pACB->scan_devices);
+ cmd->cmnd[0], dcb->target_id,
+ dcb->target_lun, status, acb->scan_devices);
break;
case HARDWARE_ERROR:
dprintkl(KERN_DEBUG,
"ReqSense: HARDWARE_ERROR (Cmnd = 0x%02x, Dev = %i-%i, Stat = %i, Scan = %i) ",
- pcmd->cmnd[0], pDCB->TargetID,
- pDCB->TargetLUN, status, pACB->scan_devices);
+ cmd->cmnd[0], dcb->target_id,
+ dcb->target_lun, status, acb->scan_devices);
break;
}
- if (pcmd->sense_buffer[7] >= 6)
+ if (cmd->sense_buffer[7] >= 6)
dprintkl(KERN_DEBUG,
"Sense=%02x, ASC=%02x, ASCQ=%02x (%08x %08x) ",
- pcmd->sense_buffer[2], pcmd->sense_buffer[12],
- pcmd->sense_buffer[13],
- *((unsigned int *) (pcmd->sense_buffer + 3)),
- *((unsigned int *) (pcmd->sense_buffer + 8)));
+ cmd->sense_buffer[2], cmd->sense_buffer[12],
+ cmd->sense_buffer[13],
+ *((unsigned int *) (cmd->sense_buffer + 3)),
+ *((unsigned int *) (cmd->sense_buffer + 8)));
else
dprintkl(KERN_DEBUG,
"Sense=%02x, No ASC/ASCQ (%08x) ",
- pcmd->sense_buffer[2],
- *((unsigned int *) (pcmd->sense_buffer + 3)));
+ cmd->sense_buffer[2],
+ *((unsigned int *) (cmd->sense_buffer + 3)));
}
if (status == (CHECK_CONDITION << 1)) {
- pcmd->result = DID_BAD_TARGET << 16;
+ cmd->result = DID_BAD_TARGET << 16;
goto ckc_e;
}
dprintkdbg(DBG_0, "AUTO_REQSENSE2..............\n");
- if ((pSRB->SRBTotalXferLength)
- && (pSRB->SRBTotalXferLength >= pcmd->underflow))
- pcmd->result =
+ if ((srb->total_xfer_length)
+ && (srb->total_xfer_length >= cmd->underflow))
+ cmd->result =
MK_RES_LNX(DRIVER_SENSE, DID_OK,
- pSRB->EndMessage, CHECK_CONDITION);
- /*SET_RES_DID(pcmd->result,DID_OK) */
+ srb->end_message, CHECK_CONDITION);
+ /*SET_RES_DID(cmd->result,DID_OK) */
else
- pcmd->result =
+ cmd->result =
MK_RES_LNX(DRIVER_SENSE, DID_OK,
- pSRB->EndMessage, CHECK_CONDITION);
+ srb->end_message, CHECK_CONDITION);
goto ckc_e;
}
@@ -4516,118 +4325,117 @@
* target status..........................
*/
if (status_byte(status) == CHECK_CONDITION) {
- DC395x_RequestSense(pACB, pDCB, pSRB);
+ request_sense(acb, dcb, srb);
return;
} else if (status_byte(status) == QUEUE_FULL) {
- tempcnt = (u8) pDCB->GoingSRBCnt;
+ tempcnt = (u8) dcb->going_srb_count;
printk
("\nDC395x: QUEUE_FULL for dev %02i-%i with %i cmnds\n",
- pDCB->TargetID, pDCB->TargetLUN, tempcnt);
+ dcb->target_id, dcb->target_lun, tempcnt);
if (tempcnt > 1)
tempcnt--;
- pDCB->MaxCommand = tempcnt;
- DC395x_freetag(pDCB, pSRB);
- DC395x_Going_to_Waiting(pDCB, pSRB);
- DC395x_waiting_timer(pACB, HZ / 20);
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
+ dcb->max_command = tempcnt;
+ free_tag(dcb, srb);
+ move_srb_going_to_waiting(dcb, srb);
+ waiting_set_timer(acb, HZ / 20);
+ srb->adapter_status = 0;
+ srb->target_status = 0;
return;
} else if (status == SCSI_STAT_SEL_TIMEOUT) {
- pSRB->AdaptStatus = H_SEL_TIMEOUT;
- pSRB->TargetStatus = 0;
- pcmd->result = DID_NO_CONNECT << 16;
+ srb->adapter_status = H_SEL_TIMEOUT;
+ srb->target_status = 0;
+ cmd->result = DID_NO_CONNECT << 16;
} else {
- pSRB->AdaptStatus = 0;
- SET_RES_DID(pcmd->result, DID_ERROR);
- SET_RES_MSG(pcmd->result, pSRB->EndMessage);
- SET_RES_TARGET(pcmd->result, status);
+ srb->adapter_status = 0;
+ SET_RES_DID(cmd->result, DID_ERROR);
+ SET_RES_MSG(cmd->result, srb->end_message);
+ SET_RES_TARGET(cmd->result, status);
}
} else {
/*
** process initiator status..........................
*/
- status = pSRB->AdaptStatus;
+ status = srb->adapter_status;
if (status & H_OVER_UNDER_RUN) {
- pSRB->TargetStatus = 0;
- SET_RES_DID(pcmd->result, DID_OK);
- SET_RES_MSG(pcmd->result, pSRB->EndMessage);
- } else if (pSRB->SRBStatus & PARITY_ERROR) {
- SET_RES_DID(pcmd->result, DID_PARITY);
- SET_RES_MSG(pcmd->result, pSRB->EndMessage);
+ srb->target_status = 0;
+ SET_RES_DID(cmd->result, DID_OK);
+ SET_RES_MSG(cmd->result, srb->end_message);
+ } else if (srb->status & PARITY_ERROR) {
+ SET_RES_DID(cmd->result, DID_PARITY);
+ SET_RES_MSG(cmd->result, srb->end_message);
} else { /* No error */
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
- SET_RES_DID(pcmd->result, DID_OK);
+ srb->adapter_status = 0;
+ srb->target_status = 0;
+ SET_RES_DID(cmd->result, DID_OK);
}
}
if (dir != PCI_DMA_NONE) {
- if (pcmd->use_sg)
- pci_dma_sync_sg(pACB->pdev,
- (struct scatterlist *) pcmd->
- request_buffer, pcmd->use_sg, dir);
- else if (pcmd->request_buffer)
- pci_dma_sync_single(pACB->pdev,
- pSRB->SegmentX[0].address,
- pcmd->request_bufflen, dir);
+ if (cmd->use_sg)
+ pci_dma_sync_sg(acb->dev,
+ (struct scatterlist *) cmd->
+ request_buffer, cmd->use_sg, dir);
+ else if (cmd->request_buffer)
+ pci_dma_sync_single(acb->dev,
+ srb->segment_x[0].address,
+ cmd->request_bufflen, dir);
}
- if ((pcmd->result & RES_DID) == 0 && pcmd->cmnd[0] == INQUIRY
- && pcmd->cmnd[2] == 0 && pcmd->request_bufflen >= 8
+ if ((cmd->result & RES_DID) == 0 && cmd->cmnd[0] == INQUIRY
+ && cmd->cmnd[2] == 0 && cmd->request_bufflen >= 8
&& dir != PCI_DMA_NONE && ptr && (ptr->Vers & 0x07) >= 2)
- pDCB->Inquiry7 = ptr->Flags;
+ dcb->inquiry7 = ptr->Flags;
/* Check Error Conditions */
ckc_e:
- /*if( pSRB->pcmd->cmnd[0] == INQUIRY && */
- /* (host_byte(pcmd->result) == DID_OK || status_byte(pcmd->result) & CHECK_CONDITION) ) */
- if (pcmd->cmnd[0] == INQUIRY && (pcmd->result == (DID_OK << 16)
- || status_byte(pcmd->
+ /*if( srb->cmd->cmnd[0] == INQUIRY && */
+ /* (host_byte(cmd->result) == DID_OK || status_byte(cmd->result) & CHECK_CONDITION) ) */
+ if (cmd->cmnd[0] == INQUIRY && (cmd->result == (DID_OK << 16)
+ || status_byte(cmd->
result) &
CHECK_CONDITION)) {
- if (!pDCB->init_TCQ_flag) {
- DC395x_add_dev(pACB, pDCB, ptr);
- pDCB->init_TCQ_flag = 1;
+ if (!dcb->init_tcq_flag) {
+ add_dev(acb, dcb, ptr);
+ dcb->init_tcq_flag = 1;
}
}
/* Here is the info for Doug Gilbert's sg3 ... */
- pcmd->resid = pSRB->SRBTotalXferLength;
+ cmd->resid = srb->total_xfer_length;
/* This may be interpreted by sb. or not ... */
- pcmd->SCp.this_residual = pSRB->SRBTotalXferLength;
- pcmd->SCp.buffers_residual = 0;
+ cmd->SCp.this_residual = srb->total_xfer_length;
+ cmd->SCp.buffers_residual = 0;
if (debug_enabled(DBG_KG)) {
- if (pSRB->SRBTotalXferLength)
+ if (srb->total_xfer_length)
dprintkdbg(DBG_KG, "pid %li: %02x (%02i-%i): Missed %i bytes\n",
- pcmd->pid, pcmd->cmnd[0], pcmd->device->id,
- pcmd->device->lun, pSRB->SRBTotalXferLength);
+ cmd->pid, cmd->cmnd[0], cmd->device->id,
+ cmd->device->lun, srb->total_xfer_length);
}
- DC395x_Going_remove(pDCB, pSRB, 0);
+ remove_srb_going(dcb, srb, 0);
/* Add to free list */
- if (pSRB == pACB->pTmpSRB)
- dprintkl(KERN_ERR, "ERROR! Completed Cmnd with TmpSRB!\n");
+ if (srb == acb->tmp_srb)
+ dprintkl(KERN_ERR, "ERROR! Completed Cmnd with tmp_srb!\n");
else
- DC395x_Free_insert(pACB, pSRB);
+ insert_srb_free(acb, srb);
- dprintkdbg(DBG_0, "SRBdone: done pid %li\n", pcmd->pid);
+ dprintkdbg(DBG_0, "SRBdone: done pid %li\n", cmd->pid);
if (debug_enabled(DBG_KG)) {
- printk(" 0x%08x\n", pcmd->result);
+ printk(" 0x%08x\n", cmd->result);
}
- TRACEPRINTF("%08x(%li)*", pcmd->result, jiffies);
- DC395x_pci_unmap(pACB, pSRB);
+ TRACEPRINTF("%08x(%li)*", cmd->result, jiffies);
+ pci_unmap_srb(acb, srb);
/*DC395x_UNLOCK_ACB_NI; */
- pcmd->scsi_done(pcmd);
+ cmd->scsi_done(cmd);
/*DC395x_LOCK_ACB_NI; */
- TRACEOUTALL(KERN_INFO " %s\n", pSRB->debugtrace);
+ TRACEOUTALL(KERN_INFO " %s\n", srb->debugtrace);
- DC395x_Query_to_Waiting(pACB);
- DC395x_Waiting_process(pACB);
+ waiting_process_next(acb);
return;
}
@@ -4639,120 +4447,114 @@
* abort all cmds in our queues
********************************************************************
*/
-void
-DC395x_DoingSRB_Done(struct AdapterCtlBlk *pACB, u8 did_flag,
- Scsi_Cmnd * cmd, u8 force)
-{
- struct DeviceCtlBlk *pDCB;
- struct ScsiReqBlk *pSRB;
- struct ScsiReqBlk *pSRBTemp;
+static
+void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_flag,
+ Scsi_Cmnd * cmd, u8 force)
+{
+ struct DeviceCtlBlk *dcb;
+ struct ScsiReqBlk *srb;
+ struct ScsiReqBlk *srb_temp;
u16 cnt;
- Scsi_Cmnd *pcmd;
+ Scsi_Cmnd *p;
- pDCB = pACB->pLinkDCB;
- if (!pDCB)
+ dcb = acb->link_dcb;
+ if (!dcb)
return;
- dprintkl(KERN_INFO, "DC395x_DoingSRB_Done: pids ");
+ dprintkl(KERN_INFO, "doing_srb_done: pids ");
do {
/* As the ML may queue cmnds again, cache old values */
- struct ScsiReqBlk *pWaitingSRB = pDCB->pWaitingSRB;
- /*struct ScsiReqBlk* pWaitLast = pDCB->pWaitLast; */
- u16 WaitSRBCnt = pDCB->WaitSRBCnt;
+ struct ScsiReqBlk *waiting_srb = dcb->waiting_srb;
+ /*struct ScsiReqBlk* wait_list = dcb->wait_list; */
+ u16 waiting_srb_count = dcb->waiting_srb_count;
/* Going queue */
- cnt = pDCB->GoingSRBCnt;
- pSRB = pDCB->pGoingSRB;
+ cnt = dcb->going_srb_count;
+ srb = dcb->going_srb;
while (cnt--) {
int result;
int dir;
- pSRBTemp = pSRB->pNextSRB;
- pcmd = pSRB->pcmd;
- dir = scsi_to_pci_dma_dir(pcmd->sc_data_direction);
+ srb_temp = srb->next;
+ p = srb->cmd;
+ dir = scsi_to_pci_dma_dir(p->sc_data_direction);
result = MK_RES(0, did_flag, 0, 0);
/*result = MK_RES(0,DID_RESET,0,0); */
TRACEPRINTF("Reset(%li):%08x*", jiffies, result);
printk(" (G)");
#if 1 /*ndef DC395x_DEBUGTRACE */
- printk("%li(%02i-%i) ", pcmd->pid,
- pcmd->device->id, pcmd->device->lun);
+ printk("%li(%02i-%i) ", p->pid,
+ p->device->id, p->device->lun);
#endif
- TRACEOUT("%s\n", pSRB->debugtrace);
- pDCB->pGoingSRB = pSRBTemp;
- pDCB->GoingSRBCnt--;
- if (!pSRBTemp)
- pDCB->pGoingLast = NULL;
- DC395x_freetag(pDCB, pSRB);
- DC395x_Free_insert(pACB, pSRB);
- pcmd->result = result;
- DC395x_pci_unmap_sense(pACB, pSRB);
- DC395x_pci_unmap(pACB, pSRB);
+ TRACEOUT("%s\n", srb->debugtrace);
+ dcb->going_srb = srb_temp;
+ dcb->going_srb_count--;
+ if (!srb_temp)
+ dcb->going_last = NULL;
+ free_tag(dcb, srb);
+ insert_srb_free(acb, srb);
+ p->result = result;
+ pci_unmap_srb_sense(acb, srb);
+ pci_unmap_srb(acb, srb);
if (force) {
/* For new EH, we normally don't need to give commands back,
* as they all complete or all time out */
- /* do we need the aic7xxx hack and conditionally decrease retry ? */
- /*DC395x_SCSI_DONE_ACB_UNLOCK; */
- pcmd->scsi_done(pcmd);
- /*DC395x_SCSI_DONE_ACB_LOCK; */
+ p->scsi_done(p);
}
- pSRB = pSRBTemp;
+ srb = srb_temp;
}
- if (pDCB->pGoingSRB)
+ if (dcb->going_srb)
dprintkl(KERN_DEBUG,
"How could the ML send cmnds to the Going queue? (%02i-%i)!!\n",
- pDCB->TargetID, pDCB->TargetLUN);
- if (pDCB->TagMask)
+ dcb->target_id, dcb->target_lun);
+ if (dcb->tag_mask)
dprintkl(KERN_DEBUG,
- "TagMask for %02i-%i should be empty, is %08x!\n",
- pDCB->TargetID, pDCB->TargetLUN,
- pDCB->TagMask);
- /*pDCB->GoingSRBCnt = 0;; */
- /*pDCB->pGoingSRB = NULL; pDCB->pGoingLast = NULL; */
+ "tag_mask for %02i-%i should be empty, is %08x!\n",
+ dcb->target_id, dcb->target_lun,
+ dcb->tag_mask);
+ /*dcb->going_srb_count = 0;; */
+ /*dcb->going_srb = NULL; dcb->going_last = NULL; */
/* Waiting queue */
- cnt = WaitSRBCnt;
- pSRB = pWaitingSRB;
+ cnt = waiting_srb_count;
+ srb = waiting_srb;
while (cnt--) {
int result;
- pSRBTemp = pSRB->pNextSRB;
- pcmd = pSRB->pcmd;
+ srb_temp = srb->next;
+ p = srb->cmd;
result = MK_RES(0, did_flag, 0, 0);
TRACEPRINTF("Reset(%li):%08x*", jiffies, result);
printk(" (W)");
#if 1 /*ndef DC395x_DEBUGTRACE */
- printk("%li(%i-%i)", pcmd->pid, pcmd->device->id,
- pcmd->device->lun);
+ printk("%li(%i-%i)", p->pid, p->device->id,
+ p->device->lun);
#endif
- TRACEOUT("%s\n", pSRB->debugtrace);
- pDCB->pWaitingSRB = pSRBTemp;
- pDCB->WaitSRBCnt--;
- if (!pSRBTemp)
- pDCB->pWaitLast = NULL;
- DC395x_Free_insert(pACB, pSRB);
-
- pcmd->result = result;
- DC395x_pci_unmap_sense(pACB, pSRB);
- DC395x_pci_unmap(pACB, pSRB);
+ TRACEOUT("%s\n", srb->debugtrace);
+ dcb->waiting_srb = srb_temp;
+ dcb->waiting_srb_count--;
+ if (!srb_temp)
+ dcb->wait_list = NULL;
+ insert_srb_free(acb, srb);
+
+ p->result = result;
+ pci_unmap_srb_sense(acb, srb);
+ pci_unmap_srb(acb, srb);
if (force) {
/* For new EH, we normally don't need to give commands back,
* as they all complete or all time out */
- /* do we need the aic7xxx hack and conditionally decrease retry ? */
- /*DC395x_SCSI_DONE_ACB_UNLOCK; */
- pcmd->scsi_done(pcmd);
- /*DC395x_SCSI_DONE_ACB_LOCK; */
- pSRB = pSRBTemp;
+ cmd->scsi_done(cmd);
+ srb = srb_temp;
}
}
- if (pDCB->WaitSRBCnt)
+ if (dcb->waiting_srb_count)
printk
("\nDC395x: Debug: ML queued %i cmnds again to %02i-%i\n",
- pDCB->WaitSRBCnt, pDCB->TargetID,
- pDCB->TargetLUN);
+ dcb->waiting_srb_count, dcb->target_id,
+ dcb->target_lun);
/* The ML could have queued the cmnds again! */
- /*pDCB->WaitSRBCnt = 0;; */
- /*pDCB->pWaitingSRB = NULL; pDCB->pWaitLast = NULL; */
- pDCB->DCBFlag &= ~ABORT_DEV_;
- pDCB = pDCB->pNextDCB;
+ /*dcb->waiting_srb_count = 0;; */
+ /*dcb->waiting_srb = NULL; dcb->wait_list = NULL; */
+ dcb->flag &= ~ABORT_DEV_;
+ dcb = dcb->next;
}
- while (pDCB != pACB->pLinkDCB && pDCB);
+ while (dcb != acb->link_dcb && dcb);
printk("\n");
}
@@ -4763,17 +4565,17 @@
* DC395x_shutdown DC395x_reset
********************************************************************
*/
-static void DC395x_ResetSCSIBus(struct AdapterCtlBlk *pACB)
+static void reset_scsi_bus(struct AdapterCtlBlk *acb)
{
/*u32 drv_flags=0; */
- dprintkdbg(DBG_0, "DC395x_ResetSCSIBus..............\n");
+ dprintkdbg(DBG_0, "reset_scsi_bus..............\n");
/*DC395x_DRV_LOCK(drv_flags); */
- pACB->ACBFlag |= RESET_DEV; /* RESET_DETECT, RESET_DONE, RESET_DEV */
+ acb->acb_flag |= RESET_DEV; /* RESET_DETECT, RESET_DONE, RESET_DEV */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
- while (!(DC395x_read8(TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET));
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
+ while (!(DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET));
/*DC395x_DRV_UNLOCK(drv_flags); */
return;
@@ -4781,38 +4583,38 @@
/* Set basic config */
-static void DC395x_basic_config(struct AdapterCtlBlk *pACB)
+static void set_basic_config(struct AdapterCtlBlk *acb)
{
u8 bval;
u16 wval;
- DC395x_write8(TRM_S1040_SCSI_TIMEOUT, pACB->sel_timeout);
- if (pACB->Config & HCC_PARITY)
+ DC395x_write8(acb, TRM_S1040_SCSI_TIMEOUT, acb->sel_timeout);
+ if (acb->config & HCC_PARITY)
bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
else
bval = PHASELATCH | INITIATOR | BLOCKRST;
- DC395x_write8(TRM_S1040_SCSI_CONFIG0, bval);
+ DC395x_write8(acb, TRM_S1040_SCSI_CONFIG0, bval);
/* program configuration 1: Act_Neg (+ Act_Neg_Enh? + Fast_Filter? + DataDis?) */
- DC395x_write8(TRM_S1040_SCSI_CONFIG1, 0x03); /* was 0x13: default */
+ DC395x_write8(acb, TRM_S1040_SCSI_CONFIG1, 0x03); /* was 0x13: default */
/* program Host ID */
- DC395x_write8(TRM_S1040_SCSI_HOSTID, pACB->pScsiHost->this_id);
+ DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id);
/* set ansynchronous transfer */
- DC395x_write8(TRM_S1040_SCSI_OFFSET, 0x00);
+ DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, 0x00);
/* Turn LED control off */
- wval = DC395x_read16(TRM_S1040_GEN_CONTROL) & 0x7F;
- DC395x_write16(TRM_S1040_GEN_CONTROL, wval);
+ wval = DC395x_read16(acb, TRM_S1040_GEN_CONTROL) & 0x7F;
+ DC395x_write16(acb, TRM_S1040_GEN_CONTROL, wval);
/* DMA config */
- wval = DC395x_read16(TRM_S1040_DMA_CONFIG) & ~DMA_FIFO_CTRL;
+ wval = DC395x_read16(acb, TRM_S1040_DMA_CONFIG) & ~DMA_FIFO_CTRL;
wval |=
DMA_FIFO_HALF_HALF | DMA_ENHANCE /*| DMA_MEM_MULTI_READ */ ;
/*dprintkl(KERN_INFO, "DMA_Config: %04x\n", wval); */
- DC395x_write16(TRM_S1040_DMA_CONFIG, wval);
+ DC395x_write16(acb, TRM_S1040_DMA_CONFIG, wval);
/* Clear pending interrupt status */
- DC395x_read8(TRM_S1040_SCSI_INTSTATUS);
+ DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
/* Enable SCSI interrupt */
- DC395x_write8(TRM_S1040_SCSI_INTEN, 0x7F);
- DC395x_write8(TRM_S1040_DMA_INTEN, EN_SCSIINTR | EN_DMAXFERERROR
+ DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x7F);
+ DC395x_write8(acb, TRM_S1040_DMA_INTEN, EN_SCSIINTR | EN_DMAXFERERROR
/*| EN_DMAXFERABORT | EN_DMAXFERCOMP | EN_FORCEDMACOMP */
);
}
@@ -4821,40 +4623,40 @@
/*
********************************************************************
* scsiio
- * DC395x_Interrupt
+ * dc395x_interrupt
********************************************************************
*/
-static void DC395x_ScsiRstDetect(struct AdapterCtlBlk *pACB)
+static void scsi_reset_detect(struct AdapterCtlBlk *acb)
{
- dprintkl(KERN_INFO, "DC395x_ScsiRstDetect\n");
+ dprintkl(KERN_INFO, "scsi_reset_detect\n");
/* delay half a second */
- if (timer_pending(&pACB->Waiting_Timer))
- del_timer(&pACB->Waiting_Timer);
+ if (timer_pending(&acb->waiting_timer))
+ del_timer(&acb->waiting_timer);
- DC395x_write8(TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
- DC395x_write8(TRM_S1040_DMA_CONTROL, DMARESETMODULE);
- /*DC395x_write8(TRM_S1040_DMA_CONTROL,STOPDMAXFER); */
+ DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
+ /*DC395x_write8(acb, TRM_S1040_DMA_CONTROL,STOPDMAXFER); */
udelay(500);
/* Maybe we locked up the bus? Then lets wait even longer ... */
- pACB->pScsiHost->last_reset =
+ acb->scsi_host->last_reset =
jiffies + 5 * HZ / 2 +
- HZ * dc395x_trm_eepromBuf[pACB->AdapterIndex].NvramDelayTime;
+ HZ * eeprom_buf[acb->adapter_index].delay_time;
- DC395x_clrfifo(pACB, "RstDet");
- DC395x_basic_config(pACB);
+ clear_fifo(acb, "RstDet");
+ set_basic_config(acb);
/*1.25 */
- /*DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); */
+ /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); */
- if (pACB->ACBFlag & RESET_DEV) { /* RESET_DETECT, RESET_DONE, RESET_DEV */
- pACB->ACBFlag |= RESET_DONE;
+ if (acb->acb_flag & RESET_DEV) { /* RESET_DETECT, RESET_DONE, RESET_DEV */
+ acb->acb_flag |= RESET_DONE;
} else {
- pACB->ACBFlag |= RESET_DETECT;
- DC395x_ResetDevParam(pACB);
- DC395x_DoingSRB_Done(pACB, DID_RESET, 0, 1);
- /*DC395x_RecoverSRB( pACB ); */
- pACB->pActiveDCB = NULL;
- pACB->ACBFlag = 0;
- DC395x_Waiting_process(pACB);
+ acb->acb_flag |= RESET_DETECT;
+ reset_dev_param(acb);
+ doing_srb_done(acb, DID_RESET, 0, 1);
+ /*DC395x_RecoverSRB( acb ); */
+ acb->active_dcb = NULL;
+ acb->acb_flag = 0;
+ waiting_process_next(acb);
}
return;
@@ -4864,53 +4666,53 @@
/*
********************************************************************
* scsiio
- * DC395x_SRBdone
+ * srb_done
********************************************************************
*/
-static void
-DC395x_RequestSense(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB,
- struct ScsiReqBlk *pSRB)
+static
+void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
+ struct ScsiReqBlk *srb)
{
- Scsi_Cmnd *pcmd;
+ Scsi_Cmnd *cmd;
- pcmd = pSRB->pcmd;
+ cmd = srb->cmd;
dprintkdbg(DBG_KG,
- "DC395x_RequestSense for pid %li, target %02i-%i\n",
- pcmd->pid, pcmd->device->id, pcmd->device->lun);
+ "request_sense for pid %li, target %02i-%i\n",
+ cmd->pid, cmd->device->id, cmd->device->lun);
TRACEPRINTF("RqSn*");
- pSRB->SRBFlag |= AUTO_REQSENSE;
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
+ srb->flag |= AUTO_REQSENSE;
+ srb->adapter_status = 0;
+ srb->target_status = 0;
/* KG: Can this prevent crap sense data ? */
- memset(pcmd->sense_buffer, 0, sizeof(pcmd->sense_buffer));
+ memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
/* Save some data */
- pSRB->SegmentX[DC395x_MAX_SG_LISTENTRY - 1].address =
- pSRB->SegmentX[0].address;
- pSRB->SegmentX[DC395x_MAX_SG_LISTENTRY - 1].length =
- pSRB->SegmentX[0].length;
- pSRB->Xferred = pSRB->SRBTotalXferLength;
- /* pSRB->SegmentX : a one entry of S/G list table */
- pSRB->SRBTotalXferLength = sizeof(pcmd->sense_buffer);
- pSRB->SegmentX[0].length = sizeof(pcmd->sense_buffer);
+ srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address =
+ srb->segment_x[0].address;
+ srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length =
+ srb->segment_x[0].length;
+ srb->xferred = srb->total_xfer_length;
+ /* srb->segment_x : a one entry of S/G list table */
+ srb->total_xfer_length = sizeof(cmd->sense_buffer);
+ srb->segment_x[0].length = sizeof(cmd->sense_buffer);
/* Map sense buffer */
- pSRB->SegmentX[0].address =
- pci_map_single(pACB->pdev, pcmd->sense_buffer,
- sizeof(pcmd->sense_buffer), PCI_DMA_FROMDEVICE);
+ srb->segment_x[0].address =
+ pci_map_single(acb->dev, cmd->sense_buffer,
+ sizeof(cmd->sense_buffer), PCI_DMA_FROMDEVICE);
dprintkdbg(DBG_SGPARANOIA, "Map sense buffer at %p (%05x) to %08x\n",
- pcmd->sense_buffer, sizeof(pcmd->sense_buffer),
- pSRB->SegmentX[0].address);
- pSRB->SRBSGCount = 1;
- pSRB->SRBSGIndex = 0;
+ cmd->sense_buffer, sizeof(cmd->sense_buffer),
+ srb->segment_x[0].address);
+ srb->sg_count = 1;
+ srb->sg_index = 0;
- if (DC395x_StartSCSI(pACB, pDCB, pSRB)) { /* Should only happen, if sb. else grabs the bus */
+ if (start_scsi(acb, dcb, srb)) { /* Should only happen, if sb. else grabs the bus */
dprintkl(KERN_DEBUG,
"Request Sense failed for pid %li (%02i-%i)!\n",
- pSRB->pcmd->pid, pDCB->TargetID, pDCB->TargetLUN);
+ srb->cmd->pid, dcb->target_id, dcb->target_lun);
TRACEPRINTF("?*");
- DC395x_Going_to_Waiting(pDCB, pSRB);
- DC395x_waiting_timer(pACB, HZ / 100);
+ move_srb_going_to_waiting(dcb, srb);
+ waiting_set_timer(acb, HZ / 100);
}
TRACEPRINTF(".*");
}
@@ -4918,107 +4720,105 @@
/*
*********************************************************************
- * DC395x_queue_command
+ * dc395x_queue_command
*
- * Function : void DC395x_initDCB
+ * Function : void init_dcb
* Purpose : initialize the internal structures for a given DCB
* Inputs : cmd - pointer to this scsi cmd request block structure
*********************************************************************
*/
-void
-DC395x_initDCB(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk **ppDCB,
- u8 target, u8 lun)
+static
+void init_dcb(struct AdapterCtlBlk *acb, struct DeviceCtlBlk **pdcb,
+ u8 target, u8 lun)
{
struct NvRamType *eeprom;
- u8 PeriodIndex;
+ u8 period_index;
u16 index;
- struct DeviceCtlBlk *pDCB;
- struct DeviceCtlBlk *pDCB2;
+ struct DeviceCtlBlk *dcb;
+ struct DeviceCtlBlk *dcb2;
- dprintkdbg(DBG_0, "DC395x_initDCB..............\n");
- pDCB = dc395x_kmalloc(sizeof(struct DeviceCtlBlk), GFP_ATOMIC);
- /*pDCB = DC395x_findDCB (pACB, target, lun); */
- *ppDCB = pDCB;
- pDCB2 = 0;
- if (!pDCB)
+ dprintkdbg(DBG_0, "init_dcb..............\n");
+ dcb = dc395x_kmalloc(sizeof(struct DeviceCtlBlk), GFP_ATOMIC);
+ /*dcb = find_dcb (acb, target, lun); */
+ *pdcb = dcb;
+ dcb2 = NULL;
+ if (!dcb)
return;
- if (pACB->DCBCnt == 0) {
- pACB->pLinkDCB = pDCB;
- pACB->pDCBRunRobin = pDCB;
+ if (acb->dcb_count == 0) {
+ acb->link_dcb = dcb;
+ acb->dcb_run_robin = dcb;
} else {
- pACB->pLastDCB->pNextDCB = pDCB;
+ acb->last_dcb->next = dcb;
}
- pACB->DCBCnt++;
- pDCB->pNextDCB = pACB->pLinkDCB;
- pACB->pLastDCB = pDCB;
+ acb->dcb_count++;
+ dcb->next = acb->link_dcb;
+ acb->last_dcb = dcb;
/* $$$$$$$ */
- pDCB->pDCBACB = pACB;
- pDCB->TargetID = target;
- pDCB->TargetLUN = lun;
+ dcb->acb = acb;
+ dcb->target_id = target;
+ dcb->target_lun = lun;
/* $$$$$$$ */
- pDCB->pWaitingSRB = NULL;
- pDCB->pGoingSRB = NULL;
- pDCB->GoingSRBCnt = 0;
- pDCB->WaitSRBCnt = 0;
- pDCB->pActiveSRB = NULL;
+ dcb->waiting_srb = NULL;
+ dcb->going_srb = NULL;
+ dcb->going_srb_count = 0;
+ dcb->waiting_srb_count = 0;
+ dcb->active_srb = NULL;
/* $$$$$$$ */
- pDCB->TagMask = 0;
- pDCB->DCBFlag = 0;
- pDCB->MaxCommand = 1;
- pDCB->AdaptIndex = pACB->AdapterIndex;
+ dcb->tag_mask = 0;
+ dcb->flag = 0;
+ dcb->max_command = 1;
/* $$$$$$$ */
- index = pACB->AdapterIndex;
- eeprom = &dc395x_trm_eepromBuf[index];
- pDCB->DevMode = eeprom->NvramTarget[target].NvmTarCfg0;
- /*pDCB->AdpMode = eeprom->NvramChannelCfg; */
- pDCB->Inquiry7 = 0;
- pDCB->SyncMode = 0;
- pDCB->last_derated = pACB->pScsiHost->last_reset - 2;
+ index = acb->adapter_index;
+ eeprom = &eeprom_buf[index];
+ dcb->dev_mode = eeprom->target[target].cfg0;
+ /*dcb->AdpMode = eeprom->channel_cfg; */
+ dcb->inquiry7 = 0;
+ dcb->sync_mode = 0;
/* $$$$$$$ */
- pDCB->SyncPeriod = 0;
- pDCB->SyncOffset = 0;
- PeriodIndex = eeprom->NvramTarget[target].NvmTarPeriod & 0x07;
- pDCB->MinNegoPeriod = dc395x_clock_period[PeriodIndex];
+ dcb->sync_period = 0;
+ dcb->sync_offset = 0;
+ period_index = eeprom->target[target].period & 0x07;
+ dcb->min_nego_period = clock_period[period_index];
#ifndef DC395x_NO_WIDE
- if ((pDCB->DevMode & NTC_DO_WIDE_NEGO)
- && (pACB->Config & HCC_WIDE_CARD))
- pDCB->SyncMode |= WIDE_NEGO_ENABLE;
+ if ((dcb->dev_mode & NTC_DO_WIDE_NEGO)
+ && (acb->config & HCC_WIDE_CARD))
+ dcb->sync_mode |= WIDE_NEGO_ENABLE;
#endif
#ifndef DC395x_NO_SYNC
- if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
- if (!(lun) || DC395x_CurrSyncOffset)
- pDCB->SyncMode |= SYNC_NEGO_ENABLE;
+ if (dcb->dev_mode & NTC_DO_SYNC_NEGO)
+ if (!(lun) || current_sync_offset)
+ dcb->sync_mode |= SYNC_NEGO_ENABLE;
#endif
/* $$$$$$$ */
#ifndef DC395x_NO_DISCONNECT
- pDCB->IdentifyMsg =
- IDENTIFY(pDCB->DevMode & NTC_DO_DISCONNECT, lun);
+ dcb->identify_msg =
+ IDENTIFY(dcb->dev_mode & NTC_DO_DISCONNECT, lun);
#else
- pDCB->IdentifyMsg = IDENTIFY(0, lun);
+ dcb->identify_msg = IDENTIFY(0, lun);
#endif
/* $$$$$$$ */
- if (pDCB->TargetLUN != 0) {
+ if (dcb->target_lun != 0) {
/* Copy settings */
- struct DeviceCtlBlk *prevDCB = pACB->pLinkDCB;
- while (prevDCB->TargetID != pDCB->TargetID)
- prevDCB = prevDCB->pNextDCB;
+ struct DeviceCtlBlk *prevDCB = acb->link_dcb;
+ while (prevDCB->target_id != dcb->target_id)
+ prevDCB = prevDCB->next;
dprintkdbg(DBG_KG,
"Copy settings from %02i-%02i to %02i-%02i\n",
- prevDCB->TargetID, prevDCB->TargetLUN,
- pDCB->TargetID, pDCB->TargetLUN);
- pDCB->SyncMode = prevDCB->SyncMode;
- pDCB->SyncPeriod = prevDCB->SyncPeriod;
- pDCB->MinNegoPeriod = prevDCB->MinNegoPeriod;
- pDCB->SyncOffset = prevDCB->SyncOffset;
- pDCB->Inquiry7 = prevDCB->Inquiry7;
+ prevDCB->target_id, prevDCB->target_lun,
+ dcb->target_id, dcb->target_lun);
+ dcb->sync_mode = prevDCB->sync_mode;
+ dcb->sync_period = prevDCB->sync_period;
+ dcb->min_nego_period = prevDCB->min_nego_period;
+ dcb->sync_offset = prevDCB->sync_offset;
+ dcb->inquiry7 = prevDCB->inquiry7;
};
- pACB->DCBmap[target] |= (1 << lun);
- pACB->children[target][lun] = pDCB;
+ acb->dcb_map[target] |= (1 << lun);
+ acb->children[target][lun] = dcb;
}
@@ -5026,62 +4826,63 @@
/*
* Memory for trace buffers
*/
-void DC395x_free_tracebufs(struct AdapterCtlBlk *pACB, int SRBIdx)
+static
+void free_tracebufs(struct AdapterCtlBlk *acb, int srb_idx)
{
- int srbidx;
+ int i;
const unsigned bufs_per_page = PAGE_SIZE / DEBUGTRACEBUFSZ;
- for (srbidx = 0; srbidx < SRBIdx; srbidx += bufs_per_page) {
+ for (i = 0; i < srb_idx; i += bufs_per_page) {
/*dprintkl(KERN_DEBUG, "Free tracebuf %p (for %i)\n", */
- /* pACB->SRB_array[srbidx].debugtrace, srbidx); */
- dc395x_kfree(pACB->SRB_array[srbidx].debugtrace);
+ /* acb->srb_array[i].debugtrace, i); */
+ dc395x_kfree(acb->srb_array[i].debugtrace);
}
}
-int DC395x_alloc_tracebufs(struct AdapterCtlBlk *pACB)
+static
+int alloc_tracebufs(struct AdapterCtlBlk *acb)
{
const unsigned mem_needed =
(DC395x_MAX_SRB_CNT + 1) * DEBUGTRACEBUFSZ;
int pages = (mem_needed + (PAGE_SIZE - 1)) / PAGE_SIZE;
const unsigned bufs_per_page = PAGE_SIZE / DEBUGTRACEBUFSZ;
- int SRBIdx = 0;
+ int srb_idx = 0;
unsigned i = 0;
unsigned char *ptr;
/*dprintkl(KERN_DEBUG, "Alloc %i pages for tracebufs\n", pages); */
while (pages--) {
ptr = dc395x_kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!ptr) {
- DC395x_free_tracebufs(pACB, SRBIdx);
+ free_tracebufs(acb, srb_idx);
return 1;
}
/*dprintkl(KERN_DEBUG, "Alloc %li bytes at %p for tracebuf %i\n", */
- /* PAGE_SIZE, ptr, SRBIdx); */
+ /* PAGE_SIZE, ptr, srb_idx); */
i = 0;
- while (i < bufs_per_page && SRBIdx < DC395x_MAX_SRB_CNT)
- pACB->SRB_array[SRBIdx++].debugtrace =
+ while (i < bufs_per_page && srb_idx < DC395x_MAX_SRB_CNT)
+ acb->srb_array[srb_idx++].debugtrace =
ptr + (i++ * DEBUGTRACEBUFSZ);
}
if (i < bufs_per_page) {
- pACB->TmpSRB.debugtrace = ptr + (i * DEBUGTRACEBUFSZ);
- pACB->TmpSRB.debugtrace[0] = 0;
+ acb->srb.debugtrace = ptr + (i * DEBUGTRACEBUFSZ);
+ acb->srb.debugtrace[0] = 0;
} else
- dprintkl(KERN_DEBUG, "No space for tmpSRB tracebuf reserved?!\n");
+ dprintkl(KERN_DEBUG, "No space for tmsrb tracebuf reserved?!\n");
return 0;
}
#endif
/* Free SG tables */
-static
-void DC395x_free_SG_tables(struct AdapterCtlBlk *pACB, int SRBIdx)
+static void free_sg_tables(struct AdapterCtlBlk *acb, int srb_idx)
{
- int srbidx;
- const unsigned SRBs_per_page =
+ int i;
+ const unsigned srbs_per_page =
PAGE_SIZE / (DC395x_MAX_SG_LISTENTRY * sizeof(struct SGentry));
- for (srbidx = 0; srbidx < SRBIdx; srbidx += SRBs_per_page) {
+ for (i = 0; i < srb_idx; i += srbs_per_page) {
/*dprintkl(KERN_DEBUG, "Free SG segs %p (for %i)\n", */
- /* pACB->SRB_array[srbidx].SegmentX, srbidx); */
- dc395x_kfree(pACB->SRB_array[srbidx].SegmentX);
+ /* acb->srb_array[i].segment_x, i); */
+ dc395x_kfree(acb->srb_array[i].segment_x);
}
}
@@ -5089,36 +4890,36 @@
/*
* Allocate SG tables; as we have to pci_map them, an SG list (struct SGentry*)
* should never cross a page boundary */
-int DC395x_alloc_SG_tables(struct AdapterCtlBlk *pACB)
+static int alloc_sg_tables(struct AdapterCtlBlk *acb)
{
const unsigned mem_needed =
(DC395x_MAX_SRB_CNT +
1) * DC395x_MAX_SG_LISTENTRY * sizeof(struct SGentry);
int pages = (mem_needed + (PAGE_SIZE - 1)) / PAGE_SIZE;
- const unsigned SRBs_per_page =
+ const unsigned srbs_per_page =
PAGE_SIZE / (DC395x_MAX_SG_LISTENTRY * sizeof(struct SGentry));
- int SRBIdx = 0;
+ int srb_idx = 0;
unsigned i = 0;
struct SGentry *ptr;
/*dprintkl(KERN_DEBUG, "Alloc %i pages for SG tables\n", pages); */
while (pages--) {
ptr = (struct SGentry *) dc395x_kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!ptr) {
- DC395x_free_SG_tables(pACB, SRBIdx);
+ free_sg_tables(acb, srb_idx);
return 1;
}
/*dprintkl(KERN_DEBUG, "Alloc %li bytes at %p for SG segments %i\n", */
- /* PAGE_SIZE, ptr, SRBIdx); */
+ /* PAGE_SIZE, ptr, srb_idx); */
i = 0;
- while (i < SRBs_per_page && SRBIdx < DC395x_MAX_SRB_CNT)
- pACB->SRB_array[SRBIdx++].SegmentX =
+ while (i < srbs_per_page && srb_idx < DC395x_MAX_SRB_CNT)
+ acb->srb_array[srb_idx++].segment_x =
ptr + (i++ * DC395x_MAX_SG_LISTENTRY);
}
- if (i < SRBs_per_page)
- pACB->TmpSRB.SegmentX =
+ if (i < srbs_per_page)
+ acb->srb.segment_x =
ptr + (i * DC395x_MAX_SG_LISTENTRY);
else
- dprintkl(KERN_DEBUG, "No space for tmpSRB SG table reserved?!\n");
+ dprintkl(KERN_DEBUG, "No space for tmsrb SG table reserved?!\n");
return 0;
}
@@ -5126,41 +4927,41 @@
/*
********************************************************************
* scsiio
- * DC395x_initACB
+ * init_acb
********************************************************************
*/
-void __init DC395x_linkSRB(struct AdapterCtlBlk *pACB)
+static void __init link_srb(struct AdapterCtlBlk *acb)
{
int i;
- for (i = 0; i < pACB->SRBCount - 1; i++)
- pACB->SRB_array[i].pNextSRB = &pACB->SRB_array[i + 1];
- pACB->SRB_array[i].pNextSRB = NULL;
- /*DC395x_Free_integrity (pACB); */
+ for (i = 0; i < acb->srb_count - 1; i++)
+ acb->srb_array[i].next = &acb->srb_array[i + 1];
+ acb->srb_array[i].next = NULL;
+ /*DC395x_Free_integrity (acb); */
}
/*
***********************************************************************
- * DC395x_init
+ * host_init
*
- * Function : static void DC395x_initACB
+ * Function : static void init_acb
* Purpose : initialize the internal structures for a given SCSI host
* Inputs : host - pointer to this host adapter's structure
***********************************************************************
*/
-int __init
-DC395x_initACB(struct Scsi_Host *host, u32 io_port, u8 irq, u16 index)
+static
+int __init init_acb(struct Scsi_Host *host, u32 io_port, u8 irq, u16 index)
{
struct NvRamType *eeprom;
- struct AdapterCtlBlk *pACB;
+ struct AdapterCtlBlk *acb;
u16 i;
- eeprom = &dc395x_trm_eepromBuf[index];
+ eeprom = &eeprom_buf[index];
host->max_cmd_len = 24;
host->can_queue = DC395x_MAX_CMD_QUEUE;
host->cmd_per_lun = DC395x_MAX_CMD_PER_LUN;
- host->this_id = (int) eeprom->NvramScsiId;
+ host->this_id = (int) eeprom->scsi_id;
host->io_port = io_port;
host->n_io_port = 0x80;
host->dma_channel = -1;
@@ -5168,13 +4969,13 @@
host->irq = irq;
host->last_reset = jiffies;
- pACB = (struct AdapterCtlBlk *) host->hostdata;
+ acb = (struct AdapterCtlBlk *) host->hostdata;
host->max_id = 16;
- if (host->max_id - 1 == eeprom->NvramScsiId)
+ if (host->max_id - 1 == eeprom->scsi_id)
host->max_id--;
#ifdef CONFIG_SCSI_MULTI_LUN
- if (eeprom->NvramChannelCfg & NAC_SCANLUN)
+ if (eeprom->channel_cfg & NAC_SCANLUN)
host->max_lun = 8;
else
host->max_lun = 1;
@@ -5184,57 +4985,55 @@
/*
********************************
*/
- pACB->pScsiHost = host;
- pACB->IOPortBase = (u16) io_port;
- pACB->pLinkDCB = NULL;
- pACB->pDCBRunRobin = NULL;
- pACB->pActiveDCB = NULL;
- pACB->SRBCount = DC395x_MAX_SRB_CNT;
- pACB->AdapterIndex = index;
- pACB->status = 0;
- pACB->pScsiHost->this_id = eeprom->NvramScsiId;
- pACB->HostID_Bit = (1 << pACB->pScsiHost->this_id);
- /*pACB->pScsiHost->this_lun = 0; */
- pACB->DCBCnt = 0;
- pACB->DeviceCnt = 0;
- pACB->IRQLevel = irq;
- pACB->TagMaxNum = 1 << eeprom->NvramMaxTag;
- if (pACB->TagMaxNum > 30)
- pACB->TagMaxNum = 30;
- pACB->ACBFlag = 0; /* RESET_DETECT, RESET_DONE, RESET_DEV */
- pACB->scan_devices = 1;
- pACB->MsgLen = 0;
- pACB->Gmode2 = eeprom->NvramChannelCfg;
- if (eeprom->NvramChannelCfg & NAC_SCANLUN)
- pACB->LUNchk = 1;
+ acb->scsi_host = host;
+ acb->IOPortBase = (u16) io_port;
+ acb->link_dcb = NULL;
+ acb->dcb_run_robin = NULL;
+ acb->active_dcb = NULL;
+ acb->srb_count = DC395x_MAX_SRB_CNT;
+ acb->adapter_index = index;
+ acb->scsi_host->this_id = eeprom->scsi_id;
+ acb->hostid_bit = (1 << acb->scsi_host->this_id);
+ /*acb->scsi_host->this_lun = 0; */
+ acb->dcb_count = 0;
+ acb->irq_level = irq;
+ acb->tag_max_num = 1 << eeprom->max_tag;
+ if (acb->tag_max_num > 30)
+ acb->tag_max_num = 30;
+ acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE, RESET_DEV */
+ acb->scan_devices = 1;
+ acb->msg_len = 0;
+ acb->gmode2 = eeprom->channel_cfg;
+ if (eeprom->channel_cfg & NAC_SCANLUN)
+ acb->lun_chk = 1;
/*
* link all device's SRB Q of this adapter
*/
- if (DC395x_alloc_SG_tables(pACB)) {
+ if (alloc_sg_tables(acb)) {
dprintkl(KERN_DEBUG, "SG table allocation failed!\n");
return 1;
}
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
- if (DC395x_alloc_tracebufs(pACB)) {
+ if (alloc_tracebufs(acb)) {
dprintkl(KERN_DEBUG, "SG trace buffer allocation failed!\n");
- DC395x_free_SG_tables(pACB, DC395x_MAX_SRB_CNT);
+ free_sg_tables(acb, DC395x_MAX_SRB_CNT);
return 1;
}
#endif
- DC395x_linkSRB(pACB);
- pACB->pFreeSRB = pACB->SRB_array;
+ link_srb(acb);
+ acb->free_srb = acb->srb_array;
/*
* temp SRB for Q tag used or abort command used
*/
- pACB->pTmpSRB = &pACB->TmpSRB;
- pACB->TmpSRB.pSRBDCB = 0;
- pACB->TmpSRB.pNextSRB = 0;
- init_timer(&pACB->Waiting_Timer);
+ acb->tmp_srb = &acb->srb;
+ acb->srb.dcb = NULL;
+ acb->srb.next = NULL;
+ init_timer(&acb->waiting_timer);
for (i = 0; i < DC395x_MAX_SCSI_ID; i++)
- pACB->DCBmap[i] = 0;
- dprintkdbg(DBG_0, "pACB = %p, pDCBmap = %p, pSRB_array = %p\n", pACB,
- pACB->DCBmap, pACB->SRB_array);
+ acb->dcb_map[i] = 0;
+ dprintkdbg(DBG_0, "acb = %p, pdcb_map = %p, psrb_array = %p\n", acb,
+ acb->dcb_map, acb->srb_array);
dprintkdbg(DBG_0, "ACB size= %04x, DCB size= %04x, SRB size= %04x\n",
sizeof(struct AdapterCtlBlk), sizeof(struct DeviceCtlBlk),
sizeof(struct ScsiReqBlk));
@@ -5245,101 +5044,88 @@
/*===========================================================================
Init
===========================================================================*/
-/*
- * Intialise the SCSI chip control registers
+/**
+ * init_adapter - Initialize the SCSI chip control registers
*
- * @param host This hosts adapter strcuture
- * @param io_port The base I/O port
- * @param irq IRQ
- * @param index Card number?? (for multiple cards?)
- */
-static int __init
-DC395x_initAdapter(struct Scsi_Host *host, u32 io_port, u8 irq, u16 index)
+ * @host: This hosts adapter strcuture
+ * @io_port: The base I/O port
+ * @irq: IRQ
+ * @index: Card instance number
+ *
+ * Returns 0 if the initialization succeeds, any other value on failure.
+ **/
+static
+int __init init_adapter(struct Scsi_Host *host, u32 io_port,
+ u8 irq, u16 index)
{
- struct NvRamType *eeprom;
- struct AdapterCtlBlk *pACB;
- struct AdapterCtlBlk *pTempACB;
- u16 used_irq = 0;
-
- eeprom = &dc395x_trm_eepromBuf[index];
- pTempACB = DC395x_pACB_start;
- if (pTempACB != NULL) {
- while (pTempACB) {
- if (pTempACB->IRQLevel == irq) {
- used_irq = 1;
- break;
- } else
- pTempACB = pTempACB->pNextACB;
- }
- }
+ struct NvRamType *eeprom = &eeprom_buf[index];
+ struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata;
if (!request_region(io_port, host->n_io_port, DC395X_NAME)) {
dprintkl(KERN_ERR, "Failed to reserve IO region 0x%x\n", io_port);
return -1;
}
- if (!used_irq) {
- if (request_irq
- (irq, DC395x_Interrupt, SA_SHIRQ, DC395X_NAME,
- (void *) host->hostdata)) {
- dprintkl(KERN_INFO, "Failed to register IRQ!\n");
- return -1;
- }
+ if (request_irq(irq, dc395x_interrupt, SA_SHIRQ, DC395X_NAME, acb)) {
+ /* release the region we just claimed */
+ release_region(io_port, host->n_io_port);
+ dprintkl(KERN_INFO, "Failed to register IRQ!\n");
+ return -1;
}
- pACB = (struct AdapterCtlBlk *) host->hostdata;
- pACB->IOPortBase = io_port;
+ acb->IOPortBase = io_port;
/* selection timeout = 250 ms */
- pACB->sel_timeout = DC395x_SEL_TIMEOUT;
+ acb->sel_timeout = DC395x_SEL_TIMEOUT;
/* Mask all the interrupt */
- DC395x_write8(TRM_S1040_DMA_INTEN, 0x00);
- DC395x_write8(TRM_S1040_SCSI_INTEN, 0x00);
+ DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00);
+ DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00);
/* Reset SCSI module */
- DC395x_write16(TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
+ DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
/* Reset PCI/DMA module */
- DC395x_write8(TRM_S1040_DMA_CONTROL, DMARESETMODULE);
+ DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
udelay(20);
/* program configuration 0 */
- pACB->Config = HCC_AUTOTERM | HCC_PARITY;
- if (DC395x_read8(TRM_S1040_GEN_STATUS) & WIDESCSI)
- pACB->Config |= HCC_WIDE_CARD;
+ acb->config = HCC_AUTOTERM | HCC_PARITY;
+ if (DC395x_read8(acb, TRM_S1040_GEN_STATUS) & WIDESCSI)
+ acb->config |= HCC_WIDE_CARD;
- if (eeprom->NvramChannelCfg & NAC_POWERON_SCSI_RESET)
- pACB->Config |= HCC_SCSI_RESET;
+ if (eeprom->channel_cfg & NAC_POWERON_SCSI_RESET)
+ acb->config |= HCC_SCSI_RESET;
- if (pACB->Config & HCC_SCSI_RESET) {
+ if (acb->config & HCC_SCSI_RESET) {
dprintkl(KERN_INFO, "Performing initial SCSI bus reset\n");
- DC395x_write8(TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
+ DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
- /*while (!( DC395x_read8(TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET )); */
+ /*while (!( DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET )); */
/*spin_unlock_irq (&io_request_lock); */
udelay(500);
- pACB->pScsiHost->last_reset =
+ acb->scsi_host->last_reset =
jiffies + HZ / 2 +
HZ *
- dc395x_trm_eepromBuf[pACB->AdapterIndex].
- NvramDelayTime;
+ eeprom_buf[acb->adapter_index].
+ delay_time;
/*spin_lock_irq (&io_request_lock); */
}
- DC395x_basic_config(pACB);
+ set_basic_config(acb);
return 0;
}
-/*
- * eeprom - wait 30 us
+/**
+ * trms1040_wait_30us: wait for 30 us
*
* Waits for 30us (using the chip by the looks of it..)
*
- * @param io_port - base I/O address
- */
-static void __init TRM_S1040_wait_30us(u16 io_port)
+ * @io_port: base I/O address
+ **/
+static
+void __init trms1040_wait_30us(u16 io_port)
{
/* ScsiPortStallExecution(30); wait 30 us */
outb(5, io_port + TRM_S1040_GEN_TIMER);
@@ -5349,16 +5135,16 @@
}
-/*
- * eeprom - write command and address to chip
- *
- * Write the specified command and address
+/**
+ * trms1040_write_cmd - write the secified command and address to
+ * chip
*
- * @param io_port - base I/O address
- * @param cmd - SB + op code (command) to send
- * @param addr - address to send
- */
-static void __init TRM_S1040_write_cmd(u16 io_port, u8 cmd, u8 addr)
+ * @io_port: base I/O address
+ * @cmd: SB + op code (command) to send
+ * @addr: address to send
+ **/
+static
+void __init trms1040_write_cmd(u16 io_port, u8 cmd, u8 addr)
{
int i;
u8 send_data;
@@ -5370,10 +5156,10 @@
send_data |= NVR_BITOUT;
outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
outb((send_data | NVR_CLOCK),
io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
}
/* send address */
@@ -5383,33 +5169,34 @@
send_data |= NVR_BITOUT;
outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
outb((send_data | NVR_CLOCK),
io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
}
outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
}
-/*
- * eeprom - store a single byte in the SEEPROM
+/**
+ * trms1040_set_data - store a single byte in the eeprom
*
* Called from write all to write a single byte into the SSEEPROM
* Which is done one bit at a time.
*
- * @param io_port - base I/O address
- * @param addr - offset into EEPROM
- * @param byte - bytes to write
- */
-static void __init TRM_S1040_set_data(u16 io_port, u8 addr, u8 byte)
+ * @io_port: base I/O address
+ * @addr: offset into EEPROM
+ * @byte: bytes to write
+ **/
+static
+void __init trms1040_set_data(u16 io_port, u8 addr, u8 byte)
{
int i;
u8 send_data;
/* Send write command & address */
- TRM_S1040_write_cmd(io_port, 0x05, addr);
+ trms1040_write_cmd(io_port, 0x05, addr);
/* Write data */
for (i = 0; i < 8; i++, byte <<= 1) {
@@ -5418,29 +5205,27 @@
send_data |= NVR_BITOUT;
outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
- outb((send_data | NVR_CLOCK),
- io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
+ outb((send_data | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
+ trms1040_wait_30us(io_port);
}
outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
/* Disable chip select */
outb(0, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
/* Wait for write ready */
while (1) {
- outb((NVR_SELECT | NVR_CLOCK),
- io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
+ trms1040_wait_30us(io_port);
outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
if (inb(io_port + TRM_S1040_GEN_NVRAM) & NVR_BITIN)
break;
@@ -5451,16 +5236,16 @@
}
-/*
- * eeprom - write 128 bytes to the SEEPROM
+/**
+ * trms1040_write_all - write 128 bytes to the eeprom
*
* Write the supplied 128 bytes to the chips SEEPROM
*
- * @param eeprom - the data to write
- * @param io_port - the base io port
- */
-static void __init
-TRM_S1040_write_all(struct NvRamType *eeprom, u16 io_port)
+ * @eeprom: the data to write
+ * @io_port: the base io port
+ **/
+static
+void __init trms1040_write_all(struct NvRamType *eeprom, u16 io_port)
{
u8 *b_eeprom = (u8 *) eeprom;
u8 addr;
@@ -5470,19 +5255,19 @@
io_port + TRM_S1040_GEN_CONTROL);
/* write enable */
- TRM_S1040_write_cmd(io_port, 0x04, 0xFF);
+ trms1040_write_cmd(io_port, 0x04, 0xFF);
outb(0, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
/* write */
for (addr = 0; addr < 128; addr++, b_eeprom++) {
- TRM_S1040_set_data(io_port, addr, *b_eeprom);
+ trms1040_set_data(io_port, addr, *b_eeprom);
}
/* write disable */
- TRM_S1040_write_cmd(io_port, 0x04, 0x00);
+ trms1040_write_cmd(io_port, 0x04, 0x00);
outb(0, io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
/* Disable SEEPROM */
outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM),
@@ -5490,30 +5275,31 @@
}
-/*
- * eeprom - get a single byte from the SEEPROM
+/**
+ * trms1040_get_data - get a single byte from the eeprom
*
* Called from read all to read a single byte into the SSEEPROM
* Which is done one bit at a time.
*
- * @param io_port - base I/O address
- * @param addr - offset into SEEPROM
- * @return - the byte read
- */
-static u8 __init TRM_S1040_get_data(u16 io_port, u8 addr)
+ * @io_port: base I/O address
+ * @addr: offset into SEEPROM
+ *
+ * Returns the the byte read.
+ **/
+static
+u8 __init trms1040_get_data(u16 io_port, u8 addr)
{
int i;
u8 read_byte;
u8 result = 0;
/* Send read command & address */
- TRM_S1040_write_cmd(io_port, 0x06, addr);
+ trms1040_write_cmd(io_port, 0x06, addr);
/* read data */
for (i = 0; i < 8; i++) {
- outb((NVR_SELECT | NVR_CLOCK),
- io_port + TRM_S1040_GEN_NVRAM);
- TRM_S1040_wait_30us(io_port);
+ outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
+ trms1040_wait_30us(io_port);
outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
/* Get data bit while falling edge */
@@ -5522,7 +5308,7 @@
if (read_byte & NVR_BITIN)
result |= 1;
- TRM_S1040_wait_30us(io_port);
+ trms1040_wait_30us(io_port);
}
/* Disable chip select */
@@ -5531,16 +5317,16 @@
}
-/*
- * eeprom - read_all
+/**
+ * trms1040_read_all - read all bytes from the eeprom
*
* Read the 128 bytes from the SEEPROM.
*
- * @param eeprom - where to store the data
- * @param io_port - the base io port
- */
-static void __init
-TRM_S1040_read_all(struct NvRamType *eeprom, u16 io_port)
+ * @eeprom: where to store the data
+ * @io_port: the base io port
+ **/
+static
+void __init trms1040_read_all(struct NvRamType *eeprom, u16 io_port)
{
u8 *b_eeprom = (u8 *) eeprom;
u8 addr;
@@ -5551,7 +5337,7 @@
/* read details */
for (addr = 0; addr < 128; addr++, b_eeprom++) {
- *b_eeprom = TRM_S1040_get_data(io_port, addr);
+ *b_eeprom = trms1040_get_data(io_port, addr);
}
/* Disable SEEPROM */
@@ -5561,18 +5347,18 @@
-/*
- * eeprom - get and check contents
+/**
+ * check_eeprom - get and check contents of the eeprom
*
* Read seeprom 128 bytes into the memory provider in eeprom.
* Checks the checksum and if it's not correct it uses a set of default
* values.
*
- * @param eeprom - caller allocated strcuture to read the eeprom data into
- * @param io_port - io port to read from
- */
-static void __init
-DC395x_check_eeprom(struct NvRamType *eeprom, u16 io_port)
+ * @eeprom: caller allocated strcuture to read the eeprom data into
+ * @io_port: io port to read from
+ **/
+static
+void __init check_eeprom(struct NvRamType *eeprom, u16 io_port)
{
u16 *w_eeprom = (u16 *) eeprom;
u16 w_addr;
@@ -5580,7 +5366,7 @@
u32 d_addr;
u32 *d_eeprom;
- TRM_S1040_read_all(eeprom, io_port); /* read eeprom */
+ trms1040_read_all(eeprom, io_port); /* read eeprom */
cksum = 0;
for (w_addr = 0, w_eeprom = (u16 *) eeprom; w_addr < 64;
@@ -5593,63 +5379,61 @@
*/
dprintkl(KERN_WARNING,
"EEProm checksum error: using default values and options.\n");
- eeprom->NvramSubVendorID[0] = (u8) PCI_VENDOR_ID_TEKRAM;
- eeprom->NvramSubVendorID[1] =
- (u8) (PCI_VENDOR_ID_TEKRAM >> 8);
- eeprom->NvramSubSysID[0] =
- (u8) PCI_DEVICE_ID_TEKRAM_TRMS1040;
- eeprom->NvramSubSysID[1] =
+ eeprom->sub_vendor_id[0] = (u8) PCI_VENDOR_ID_TEKRAM;
+ eeprom->sub_vendor_id[1] = (u8) (PCI_VENDOR_ID_TEKRAM >> 8);
+ eeprom->sub_sys_id[0] = (u8) PCI_DEVICE_ID_TEKRAM_TRMS1040;
+ eeprom->sub_sys_id[1] =
(u8) (PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8);
- eeprom->NvramSubClass = 0x00;
- eeprom->NvramVendorID[0] = (u8) PCI_VENDOR_ID_TEKRAM;
- eeprom->NvramVendorID[1] =
- (u8) (PCI_VENDOR_ID_TEKRAM >> 8);
- eeprom->NvramDeviceID[0] =
- (u8) PCI_DEVICE_ID_TEKRAM_TRMS1040;
- eeprom->NvramDeviceID[1] =
+ eeprom->sub_class = 0x00;
+ eeprom->vendor_id[0] = (u8) PCI_VENDOR_ID_TEKRAM;
+ eeprom->vendor_id[1] = (u8) (PCI_VENDOR_ID_TEKRAM >> 8);
+ eeprom->device_id[0] = (u8) PCI_DEVICE_ID_TEKRAM_TRMS1040;
+ eeprom->device_id[1] =
(u8) (PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8);
- eeprom->NvramReserved = 0x00;
+ eeprom->reserved = 0x00;
- for (d_addr = 0, d_eeprom = (u32 *) eeprom->NvramTarget;
+ for (d_addr = 0, d_eeprom = (u32 *) eeprom->target;
d_addr < 16; d_addr++, d_eeprom++)
- *d_eeprom = 0x00000077; /* NvmTarCfg3,NvmTarCfg2,NvmTarPeriod,NvmTarCfg0 */
+ *d_eeprom = 0x00000077; /* cfg3,cfg2,period,cfg0 */
- *d_eeprom++ = 0x04000F07; /* NvramMaxTag,NvramDelayTime,NvramChannelCfg,NvramScsiId */
- *d_eeprom++ = 0x00000015; /* NvramReserved1,NvramBootLun,NvramBootTarget,NvramReserved0 */
+ *d_eeprom++ = 0x04000F07; /* max_tag,delay_time,channel_cfg,scsi_id */
+ *d_eeprom++ = 0x00000015; /* reserved1,boot_lun,boot_target,reserved0 */
for (d_addr = 0; d_addr < 12; d_addr++, d_eeprom++)
*d_eeprom = 0x00;
/* Now load defaults (maybe set by boot/module params) */
set_safe_settings();
fix_settings();
- DC395x_EEprom_Override(eeprom);
+ eeprom_override(eeprom);
- eeprom->NvramCheckSum = 0x00;
+ eeprom->cksum = 0x00;
for (w_addr = 0, cksum = 0, w_eeprom = (u16 *) eeprom;
w_addr < 63; w_addr++, w_eeprom++)
cksum += *w_eeprom;
*w_eeprom = 0x1234 - cksum;
- TRM_S1040_write_all(eeprom, io_port);
- eeprom->NvramDelayTime = cfg_data[CFG_RESET_DELAY].value;
+ trms1040_write_all(eeprom, io_port);
+ eeprom->delay_time = cfg_data[CFG_RESET_DELAY].value;
} else {
set_safe_settings();
eeprom_index_to_delay(eeprom);
- DC395x_EEprom_Override(eeprom);
+ eeprom_override(eeprom);
}
}
-/*
- * adapter - print connection and terminiation config
+/**
+ * print_config - print adapter connection and termination
+ * config
*
- * @param pACB - adapter control block
- */
-static void __init DC395x_print_config(struct AdapterCtlBlk *pACB)
+ * @acb: adapter control block
+ **/
+static
+void __init print_config(struct AdapterCtlBlk *acb)
{
u8 bval;
- bval = DC395x_read8(TRM_S1040_GEN_STATUS);
+ bval = DC395x_read8(acb, TRM_S1040_GEN_STATUS);
dprintkl(KERN_INFO, "%c: Connectors: ",
((bval & WIDESCSI) ? 'W' : ' '));
if (!(bval & CON5068))
@@ -5661,7 +5445,7 @@
if ((bval & (CON5068 | CON50 | CON68)) ==
0 /*(CON5068 | CON50 | CON68) */ )
printk(" Oops! (All 3?) ");
- bval = DC395x_read8(TRM_S1040_GEN_CONTROL);
+ bval = DC395x_read8(acb, TRM_S1040_GEN_CONTROL);
printk(" Termination: ");
if (bval & DIS_TERM)
printk("Disabled\n");
@@ -5678,25 +5462,25 @@
/**
- * DC395x_print_eeprom_settings - output the eeprom settings
+ * print_eeprom_settings - output the eeprom settings
* to the kernel log so people can see what they were.
*
* @index: Adapter number
**/
-static void __init
-DC395x_print_eeprom_settings(u16 index)
+static
+void __init print_eeprom_settings(u16 index)
{
- dprintkl(KERN_INFO, "Used settings: AdapterID=%02i, Speed=%i(%02i.%01iMHz), DevMode=0x%02x\n",
- dc395x_trm_eepromBuf[index].NvramScsiId,
- dc395x_trm_eepromBuf[index].NvramTarget[0].NvmTarPeriod,
- dc395x_clock_speed[dc395x_trm_eepromBuf[index].NvramTarget[0].NvmTarPeriod] / 10,
- dc395x_clock_speed[dc395x_trm_eepromBuf[index].NvramTarget[0].NvmTarPeriod] % 10,
- dc395x_trm_eepromBuf[index].NvramTarget[0].NvmTarCfg0);
+ dprintkl(KERN_INFO, "Used settings: AdapterID=%02i, Speed=%i(%02i.%01iMHz), dev_mode=0x%02x\n",
+ eeprom_buf[index].scsi_id,
+ eeprom_buf[index].target[0].period,
+ clock_speed[eeprom_buf[index].target[0].period] / 10,
+ clock_speed[eeprom_buf[index].target[0].period] % 10,
+ eeprom_buf[index].target[0].cfg0);
dprintkl(KERN_INFO, " AdaptMode=0x%02x, Tags=%i(%02i), DelayReset=%is\n",
- dc395x_trm_eepromBuf[index].NvramChannelCfg,
- dc395x_trm_eepromBuf[index].NvramMaxTag,
- 1 << dc395x_trm_eepromBuf[index].NvramMaxTag,
- dc395x_trm_eepromBuf[index].NvramDelayTime);
+ eeprom_buf[index].channel_cfg,
+ eeprom_buf[index].max_tag,
+ 1 << eeprom_buf[index].max_tag,
+ eeprom_buf[index].delay_time);
}
@@ -5704,25 +5488,26 @@
*********************************************************************
* DC395x_detect
*
- * Function : static int DC395x_init (struct Scsi_Host *host)
+ * Function : static int host_init (struct Scsi_Host *host)
* Purpose : initialize the internal structures for a given SCSI host
* Inputs : host - pointer to this host adapter's structure/
* Preconditions : when this function is called, the chip_type
- * field of the pACB structure MUST have been set.
+ * field of the acb structure MUST have been set.
*********************************************************************
*/
-static struct Scsi_Host *__init
-DC395x_init(Scsi_Host_Template * host_template, u32 io_port, u8 irq,
- u16 index)
+static
+struct Scsi_Host *__init host_init(Scsi_Host_Template * host_template,
+ u32 io_port, u8 irq,
+ u16 index)
{
struct Scsi_Host *host;
- struct AdapterCtlBlk *pACB;
+ struct AdapterCtlBlk *acb;
/*
* Read the eeprom contents info the buffer we supply. Use
* defaults is eeprom checksum is wrong.
*/
- DC395x_check_eeprom(&dc395x_trm_eepromBuf[index], (u16) io_port);
+ check_eeprom(&eeprom_buf[index], (u16) io_port);
/*
*$$$$$$$$$$$ MEMORY ALLOCATE FOR ADAPTER CONTROL BLOCK $$$$$$$$$$$$
@@ -5732,28 +5517,26 @@
dprintkl(KERN_INFO, "pSH scsi_host_alloc ERROR\n");
return 0;
}
- DC395x_print_eeprom_settings(index);
+ print_eeprom_settings(index);
- pACB = (struct AdapterCtlBlk *) host->hostdata;
-
- if (DC395x_initACB(host, io_port, irq, index)) {
+ acb = (struct AdapterCtlBlk *) host->hostdata;
+ if (init_acb(host, io_port, irq, index)) {
scsi_host_put(host);
return 0;
}
- DC395x_print_config(pACB);
+ print_config(acb);
/*
*$$$$$$$$$$$$$$$$$ INITIAL ADAPTER $$$$$$$$$$$$$$$$$
*/
- if (!DC395x_initAdapter(host, io_port, irq, index)) {
- if (!DC395x_pACB_start) {
- DC395x_pACB_start = pACB;
- } else {
- DC395x_pACB_current->pNextACB = pACB;
- }
- DC395x_pACB_current = pACB;
- pACB->pNextACB = NULL;
-
+ if (!init_adapter(host, io_port, irq, index)) {
+ if (!acb_list_head) {
+ acb_list_head = acb;
+ } else {
+ acb_list_tail->next_acb = acb;
+ }
+ acb_list_tail = acb;
+ acb->next_acb = NULL;
} else {
dprintkl(KERN_INFO, "DC395x_initAdapter initial ERROR\n");
scsi_host_put(host);
@@ -5762,112 +5545,6 @@
return host;
}
-/*
- * Functions: DC395x_inquiry(), DC395x_inquiry_done()
- *
- * Purpose: When changing speed etc., we have to issue an INQUIRY
- * command to make sure, we agree upon the nego parameters
- * with the device
- */
-static void DC395x_inquiry_done(Scsi_Cmnd * cmd)
-{
- struct AdapterCtlBlk *pACB =
- (struct AdapterCtlBlk *) cmd->device->host->hostdata;
- struct DeviceCtlBlk *pDCB =
- DC395x_findDCB(pACB, cmd->device->id, cmd->device->lun);
-#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
- struct ScsiReqBlk *pSRB = pACB->pFreeSRB;
-#endif
- dprintkl(KERN_INFO,
- "INQUIRY (%02i-%i) returned %08x: %02x %02x %02x %02x ...\n",
- cmd->device->id, cmd->device->lun, cmd->result,
- ((u8 *) cmd->request_buffer)[0],
- ((u8 *) cmd->request_buffer)[1],
- ((u8 *) cmd->request_buffer)[2],
- ((u8 *) cmd->request_buffer)[3]);
- /*TRACEOUT ("%s\n", pSRB->debugtrace); */
- if (cmd->result) {
- dprintkl(KERN_INFO, "Unsetting Wide, Sync and TagQ!\n");
- if (pDCB) {
- TRACEOUT("%s\n", pSRB->debugtrace);
- pDCB->DevMode &=
- ~(NTC_DO_SYNC_NEGO | NTC_DO_WIDE_NEGO |
- NTC_DO_TAG_QUEUEING);
- DC395x_updateDCB(pACB, pDCB);
- }
- }
- if (pDCB) {
- if (!(pDCB->SyncMode & SYNC_NEGO_DONE)) {
- pDCB->SyncOffset = 0; /*pDCB->SyncMode &= ~SYNC_NEGO_ENABLE; */
- }
- if (!(pDCB->SyncMode & WIDE_NEGO_DONE)) {
- pDCB->SyncPeriod &= ~WIDE_SYNC;
- pDCB->SyncMode &= ~WIDE_NEGO_ENABLE;
- }
- } else {
- dprintkl(KERN_ERR,
- "ERROR! No DCB existent for %02i-%i ?\n",
- cmd->device->id, cmd->device->lun);
- }
- kfree(cmd->buffer);
- kfree(cmd);
-}
-
-
-/*
- * Perform INQUIRY
- */
-void DC395x_inquiry(struct AdapterCtlBlk *pACB, struct DeviceCtlBlk *pDCB)
-{
- char *buffer;
- Scsi_Cmnd *cmd;
- cmd = dc395x_kmalloc(sizeof(Scsi_Cmnd), GFP_ATOMIC);
- if (!cmd) {
- dprintkl(KERN_ERR, "kmalloc failed in inquiry!\n");
- return;
- }
- buffer = kmalloc(256, GFP_ATOMIC);
- if (!buffer) {
- kfree(cmd);
- dprintkl(KERN_ERR, "kmalloc failed in inquiry!\n");
- return;
- }
-
- memset(cmd, 0, sizeof(Scsi_Cmnd));
- cmd->cmnd[0] = INQUIRY;
- cmd->cmnd[1] = (pDCB->TargetLUN << 5) & 0xe0;
- cmd->cmnd[4] = 0xff;
-
- cmd->cmd_len = 6;
- cmd->old_cmd_len = 6;
- cmd->device->host = pACB->pScsiHost;
- cmd->device->id = pDCB->TargetID;
- cmd->device->lun = pDCB->TargetLUN;
- cmd->serial_number = 1;
- cmd->pid = 395;
- cmd->bufflen = 128;
- cmd->buffer = buffer;
- cmd->request_bufflen = 128;
- cmd->request_buffer = &buffer[128];
- cmd->done = DC395x_inquiry_done;
- cmd->scsi_done = DC395x_inquiry_done;
- cmd->timeout_per_command = HZ;
-
-#if 0
- /* XXX */
- cmd->request.rq_status = RQ_SCSI_BUSY;
-#endif
-
- pDCB->SyncMode &= ~SYNC_NEGO_DONE;
- pDCB->SyncMode |= SYNC_NEGO_ENABLE;
- pDCB->SyncMode &= ~WIDE_NEGO_DONE;
- pDCB->SyncMode |= WIDE_NEGO_ENABLE;
- dprintkl(KERN_INFO,
- "Queue INQUIRY command to dev %02i-%i\n", pDCB->TargetID,
- pDCB->TargetLUN);
- DC395x_queue_command(cmd, DC395x_inquiry_done);
-}
-
#undef SEARCH
#undef YESNO
#undef SCANF
@@ -5875,7 +5552,7 @@
/*
******************************************************************
- * Function: DC395x_proc_info(char* buffer, char **start,
+ * Function: dc395x_proc_info(char* buffer, char **start,
* off_t offset, int length, int hostno, int inout)
* Purpose: return SCSI Adapter/Device Info
* Input:
@@ -5892,7 +5569,7 @@
******************************************************************
*/
-/* KG: proc_info taken from driver aha152x.c */
+/* KG: dc395x_proc_info taken from driver aha152x.c */
#undef SPRINTF
#define SPRINTF(args...) pos += sprintf(pos, args)
@@ -5901,27 +5578,24 @@
if (YN) SPRINTF(" Yes ");\
else SPRINTF(" No ")
-static int
-DC395x_proc_info(struct Scsi_Host *shpnt, char *buffer, char **start, off_t offset, int length,
- int inout)
+static
+int dc395x_proc_info(struct Scsi_Host *shpnt, char *buffer, char **start, off_t offset, int length,
+ int inout)
{
int dev, spd, spd1;
char *pos = buffer;
- struct AdapterCtlBlk *pACB;
- struct DeviceCtlBlk *pDCB;
+ struct AdapterCtlBlk *acb;
+ struct DeviceCtlBlk *dcb;
unsigned long flags;
- Scsi_Cmnd *pcmd;
- /* Scsi_Cmnd *ptr; */
+ acb = acb_list_head;
- pACB = DC395x_pACB_start;
-
- while (pACB) {
- if (pACB->pScsiHost == shpnt)
- break;
- pACB = pACB->pNextACB;
- }
- if (!pACB)
+ while (acb) {
+ if (acb->scsi_host == shpnt)
+ break;
+ acb = acb->next_acb;
+ }
+ if (!acb)
return -ESRCH;
if (inout) /* Has data been written to the file ? */
@@ -5930,119 +5604,114 @@
SPRINTF(DC395X_BANNER " PCI SCSI Host Adapter\n");
SPRINTF(" Driver Version " DC395X_VERSION "\n");
- DC395x_LOCK_IO(pACB->pScsiHost);
+ DC395x_LOCK_IO(acb->scsi_host, flags);
SPRINTF("SCSI Host Nr %i, ", shpnt->host_no);
SPRINTF("DC395U/UW/F DC315/U %s Adapter Nr %i\n",
- (pACB->Config & HCC_WIDE_CARD) ? "Wide" : "",
- pACB->AdapterIndex);
- SPRINTF("IOPortBase 0x%04x, ", pACB->IOPortBase);
- SPRINTF("IRQLevel 0x%02x, ", pACB->IRQLevel);
- SPRINTF(" SelTimeout %ims\n", (1638 * pACB->sel_timeout) / 1000);
+ (acb->config & HCC_WIDE_CARD) ? "Wide" : "",
+ acb->adapter_index);
+ SPRINTF("IOPortBase 0x%04x, ", acb->IOPortBase);
+ SPRINTF("irq_level 0x%02x, ", acb->irq_level);
+ SPRINTF(" SelTimeout %ims\n", (1638 * acb->sel_timeout) / 1000);
SPRINTF("MaxID %i, MaxLUN %i, ", shpnt->max_id, shpnt->max_lun);
SPRINTF("AdapterID %i\n", shpnt->this_id);
- SPRINTF("TagMaxNum %i, Status %i", pACB->TagMaxNum, pACB->status);
- /*SPRINTF(", DMA_Status %i\n", DC395x_read8(TRM_S1040_DMA_STATUS)); */
+ SPRINTF("tag_max_num %i", acb->tag_max_num);
+ /*SPRINTF(", DMA_Status %i\n", DC395x_read8(acb, TRM_S1040_DMA_STATUS)); */
SPRINTF(", FilterCfg 0x%02x",
- DC395x_read8(TRM_S1040_SCSI_CONFIG1));
+ DC395x_read8(acb, TRM_S1040_SCSI_CONFIG1));
SPRINTF(", DelayReset %is\n",
- dc395x_trm_eepromBuf[pACB->AdapterIndex].NvramDelayTime);
+ eeprom_buf[acb->adapter_index].delay_time);
/*SPRINTF("\n"); */
- SPRINTF("Nr of attached devices: %i, Nr of DCBs: %i\n",
- pACB->DeviceCnt, pACB->DCBCnt);
+ SPRINTF("Nr of DCBs: %i\n", acb->dcb_count);
SPRINTF
("Map of attached LUNs: %02x %02x %02x %02x %02x %02x %02x %02x\n",
- pACB->DCBmap[0], pACB->DCBmap[1], pACB->DCBmap[2],
- pACB->DCBmap[3], pACB->DCBmap[4], pACB->DCBmap[5],
- pACB->DCBmap[6], pACB->DCBmap[7]);
+ acb->dcb_map[0], acb->dcb_map[1], acb->dcb_map[2],
+ acb->dcb_map[3], acb->dcb_map[4], acb->dcb_map[5],
+ acb->dcb_map[6], acb->dcb_map[7]);
SPRINTF
(" %02x %02x %02x %02x %02x %02x %02x %02x\n",
- pACB->DCBmap[8], pACB->DCBmap[9], pACB->DCBmap[10],
- pACB->DCBmap[11], pACB->DCBmap[12], pACB->DCBmap[13],
- pACB->DCBmap[14], pACB->DCBmap[15]);
+ acb->dcb_map[8], acb->dcb_map[9], acb->dcb_map[10],
+ acb->dcb_map[11], acb->dcb_map[12], acb->dcb_map[13],
+ acb->dcb_map[14], acb->dcb_map[15]);
SPRINTF
- ("Un ID LUN Prty Sync Wide DsCn SndS TagQ NegoPeriod SyncFreq SyncOffs MaxCmd\n");
+ ("Un ID LUN Prty Sync Wide DsCn SndS TagQ nego_period SyncFreq SyncOffs MaxCmd\n");
- pDCB = pACB->pLinkDCB;
- for (dev = 0; dev < pACB->DCBCnt; dev++) {
- int NegoPeriod;
- SPRINTF("%02i %02i %02i ", dev, pDCB->TargetID,
- pDCB->TargetLUN);
- YESNO(pDCB->DevMode & NTC_DO_PARITY_CHK);
- YESNO(pDCB->SyncOffset);
- YESNO(pDCB->SyncPeriod & WIDE_SYNC);
- YESNO(pDCB->DevMode & NTC_DO_DISCONNECT);
- YESNO(pDCB->DevMode & NTC_DO_SEND_START);
- YESNO(pDCB->SyncMode & EN_TAG_QUEUEING);
- NegoPeriod =
- dc395x_clock_period[pDCB->SyncPeriod & 0x07] << 2;
- if (pDCB->SyncOffset)
- SPRINTF(" %03i ns ", NegoPeriod);
+ dcb = acb->link_dcb;
+ for (dev = 0; dev < acb->dcb_count; dev++) {
+ int nego_period;
+ SPRINTF("%02i %02i %02i ", dev, dcb->target_id,
+ dcb->target_lun);
+ YESNO(dcb->dev_mode & NTC_DO_PARITY_CHK);
+ YESNO(dcb->sync_offset);
+ YESNO(dcb->sync_period & WIDE_SYNC);
+ YESNO(dcb->dev_mode & NTC_DO_DISCONNECT);
+ YESNO(dcb->dev_mode & NTC_DO_SEND_START);
+ YESNO(dcb->sync_mode & EN_TAG_QUEUEING);
+ nego_period =
+ clock_period[dcb->sync_period & 0x07] << 2;
+ if (dcb->sync_offset)
+ SPRINTF(" %03i ns ", nego_period);
else
- SPRINTF(" (%03i ns)", (pDCB->MinNegoPeriod << 2));
+ SPRINTF(" (%03i ns)", (dcb->min_nego_period << 2));
- if (pDCB->SyncOffset & 0x0f) {
- spd = 1000 / (NegoPeriod);
- spd1 = 1000 % (NegoPeriod);
- spd1 = (spd1 * 10 + NegoPeriod / 2) / (NegoPeriod);
+ if (dcb->sync_offset & 0x0f) {
+ spd = 1000 / (nego_period);
+ spd1 = 1000 % (nego_period);
+ spd1 = (spd1 * 10 + nego_period / 2) / (nego_period);
SPRINTF(" %2i.%1i M %02i ", spd, spd1,
- (pDCB->SyncOffset & 0x0f));
+ (dcb->sync_offset & 0x0f));
} else
SPRINTF(" ");
/* Add more info ... */
- SPRINTF(" %02i\n", pDCB->MaxCommand);
- pDCB = pDCB->pNextDCB;
+ SPRINTF(" %02i\n", dcb->max_command);
+ dcb = dcb->next;
}
- SPRINTF("Commands in Queues: Query: %i:", pACB->QueryCnt);
- for (pcmd = pACB->pQueryHead; pcmd;
- pcmd = (Scsi_Cmnd *) pcmd->host_scribble)
- SPRINTF(" %li", pcmd->pid);
- if (timer_pending(&pACB->Waiting_Timer))
+ if (timer_pending(&acb->waiting_timer))
SPRINTF("Waiting queue timer running\n");
else
SPRINTF("\n");
- pDCB = pACB->pLinkDCB;
+ dcb = acb->link_dcb;
- for (dev = 0; dev < pACB->DCBCnt; dev++) {
- struct ScsiReqBlk *pSRB;
- if (pDCB->WaitSRBCnt)
+ for (dev = 0; dev < acb->dcb_count; dev++) {
+ struct ScsiReqBlk *srb;
+ if (dcb->waiting_srb_count)
SPRINTF("DCB (%02i-%i): Waiting: %i:",
- pDCB->TargetID, pDCB->TargetLUN,
- pDCB->WaitSRBCnt);
- for (pSRB = pDCB->pWaitingSRB; pSRB; pSRB = pSRB->pNextSRB)
- SPRINTF(" %li", pSRB->pcmd->pid);
- if (pDCB->GoingSRBCnt)
+ dcb->target_id, dcb->target_lun,
+ dcb->waiting_srb_count);
+ for (srb = dcb->waiting_srb; srb; srb = srb->next)
+ SPRINTF(" %li", srb->cmd->pid);
+ if (dcb->going_srb_count)
SPRINTF("\nDCB (%02i-%i): Going : %i:",
- pDCB->TargetID, pDCB->TargetLUN,
- pDCB->GoingSRBCnt);
- for (pSRB = pDCB->pGoingSRB; pSRB; pSRB = pSRB->pNextSRB)
+ dcb->target_id, dcb->target_lun,
+ dcb->going_srb_count);
+ for (srb = dcb->going_srb; srb; srb = srb->next)
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
- SPRINTF("\n %s", pSRB->debugtrace);
+ SPRINTF("\n %s", srb->debugtrace);
#else
- SPRINTF(" %li", pSRB->pcmd->pid);
+ SPRINTF(" %li", srb->cmd->pid);
#endif
- if (pDCB->WaitSRBCnt || pDCB->GoingSRBCnt)
+ if (dcb->waiting_srb_count || dcb->going_srb_count)
SPRINTF("\n");
- pDCB = pDCB->pNextDCB;
+ dcb = dcb->next;
}
if (debug_enabled(DBG_DCB)) {
- SPRINTF("DCB list for ACB %p:\n", pACB);
- pDCB = pACB->pLinkDCB;
- SPRINTF("%p", pDCB);
- for (dev = 0; dev < pACB->DCBCnt; dev++, pDCB = pDCB->pNextDCB)
- SPRINTF("->%p", pDCB->pNextDCB);
+ SPRINTF("DCB list for ACB %p:\n", acb);
+ dcb = acb->link_dcb;
+ SPRINTF("%p", dcb);
+ for (dev = 0; dev < acb->dcb_count; dev++, dcb = dcb->next)
+ SPRINTF("->%p", dcb->next);
SPRINTF("\n");
}
*start = buffer + offset;
- DC395x_UNLOCK_IO(pACB->pScsiHost);
+ DC395x_UNLOCK_IO(acb->scsi_host, flags);
if (pos - buffer < offset)
return 0;
@@ -6054,91 +5723,88 @@
/**
- * DC395x_chip_shutdown - cleanly shut down the scsi controller chip,
+ * chip_shutdown - cleanly shut down the scsi controller chip,
* stopping all operations and disablig interrupt generation on the
* card.
*
* @acb: The scsi adapter control block of the adapter to shut down.
**/
static
-void DC395x_chip_shutdown(struct AdapterCtlBlk *pACB)
+void chip_shutdown(struct AdapterCtlBlk *acb)
{
/* disable interrupt */
- DC395x_write8(TRM_S1040_DMA_INTEN, 0);
- DC395x_write8(TRM_S1040_SCSI_INTEN, 0);
+ DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0);
+ DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0);
/* remove timers */
- if (timer_pending(&pACB->Waiting_Timer))
- del_timer(&pACB->Waiting_Timer);
- if (timer_pending(&pACB->SelTO_Timer))
- del_timer(&pACB->SelTO_Timer);
+ if (timer_pending(&acb->waiting_timer))
+ del_timer(&acb->waiting_timer);
+ if (timer_pending(&acb->selto_timer))
+ del_timer(&acb->selto_timer);
/* reset the scsi bus */
- if (pACB->Config & HCC_SCSI_RESET)
- DC395x_ResetSCSIBus(pACB);
+ if (acb->config & HCC_SCSI_RESET)
+ reset_scsi_bus(acb);
/* clear any pending interupt state */
- DC395x_read8(TRM_S1040_SCSI_INTSTATUS);
+ DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
/* release chip resources */
#if debug_enabled(DBG_TRACE|DBG_TRACEALL)
- DC395x_free_tracebufs(pACB, DC395x_MAX_SRB_CNT);
+ free_tracebufs(acb, DC395x_MAX_SRB_CNT);
#endif
- DC395x_free_SG_tables(pACB, DC395x_MAX_SRB_CNT);
+ free_sg_tables(acb, DC395x_MAX_SRB_CNT);
}
/**
- * DC395x_free_DCBs - Free all of the DCBs.
+ * free_dcbs - Free all of the DCBs.
*
- * @pACB: Adapter to remove the DCBs for.
+ * @acb: Adapter to remove the DCBs for.
**/
static
-void DC395x_free_DCBs(struct AdapterCtlBlk* pACB)
+void free_dcbs(struct AdapterCtlBlk* acb)
{
struct DeviceCtlBlk *dcb;
struct DeviceCtlBlk *dcb_next;
- dprintkdbg(DBG_DCB, "Free %i DCBs\n", pACB->DCBCnt);
+ dprintkdbg(DBG_DCB, "Free %i DCBs\n", acb->dcb_count);
- for (dcb = pACB->pLinkDCB; dcb != NULL; dcb = dcb_next)
+ for (dcb = acb->link_dcb; dcb != NULL; dcb = dcb_next)
{
- dcb_next = dcb->pNextDCB;
+ dcb_next = dcb->next;
dprintkdbg(DBG_DCB, "Free DCB (ID %i, LUN %i): %p\n",
- dcb->TargetID, dcb->TargetLUN, dcb);
+ dcb->target_id, dcb->target_lun, dcb);
/*
* Free the DCB. This removes the entry from the
- * pLinkDCB list and decrements the count in DCBCnt
+ * link_dcb list and decrements the count in dcb_count
*/
- DC395x_remove_dev(pACB, dcb);
-
+ remove_dev(acb, dcb);
}
}
/**
- * DC395x_release - shutdown device and release resources that were
+ * host_release - shutdown device and release resources that were
* allocate for it. Called once for each card as it is shutdown.
*
* @host: The adapter instance to shutdown.
**/
static
-void DC395x_release(struct Scsi_Host *host)
+void host_release(struct Scsi_Host *host)
{
- struct AdapterCtlBlk *pACB = (struct AdapterCtlBlk *) (host->hostdata);
+ struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)(host->hostdata);
unsigned long flags;
dprintkl(KERN_DEBUG, "DC395x release\n");
- DC395x_LOCK_IO(pACB->pScsiHost);
- DC395x_chip_shutdown(pACB);
- DC395x_free_DCBs(pACB);
+ DC395x_LOCK_IO(acb->scsi_host, flags);
+ chip_shutdown(acb);
+ free_dcbs(acb);
- if (host->irq != NO_IRQ) {
- free_irq(host->irq, DC395x_pACB_start);
- }
+ free_irq(host->irq, acb);
release_region(host->io_port, host->n_io_port);
- DC395x_UNLOCK_IO(pACB->pScsiHost);
+ DC395x_UNLOCK_IO(acb->scsi_host, flags);
}
@@ -6148,28 +5814,38 @@
static Scsi_Host_Template dc395x_driver_template = {
.module = THIS_MODULE,
.proc_name = DC395X_NAME,
- .proc_info = DC395x_proc_info,
+ .proc_info = dc395x_proc_info,
.name = DC395X_BANNER " " DC395X_VERSION,
- .queuecommand = DC395x_queue_command,
- .bios_param = DC395x_bios_param,
- .slave_alloc = DC395x_slave_alloc,
- .slave_destroy = DC395x_slave_destroy,
+ .queuecommand = dc395x_queue_command,
+ .bios_param = dc395x_bios_param,
+ .slave_alloc = dc395x_slave_alloc,
+ .slave_destroy = dc395x_slave_destroy,
.can_queue = DC395x_MAX_CAN_QUEUE,
.this_id = 7,
.sg_tablesize = DC395x_MAX_SG_TABLESIZE,
.cmd_per_lun = DC395x_MAX_CMD_PER_LUN,
- .eh_abort_handler = DC395x_eh_abort,
- .eh_bus_reset_handler = DC395x_eh_bus_reset,
+ .eh_abort_handler = dc395x_eh_abort,
+ .eh_bus_reset_handler = dc395x_eh_bus_reset,
.unchecked_isa_dma = 0,
.use_clustering = DISABLE_CLUSTERING,
};
-/*
- * Called to initialise a single instance of the adaptor
- */
+/**
+ * dc395x_init_one - Initialise a single instance of the adapter.
+ *
+ * The PCI layer will call this once for each instance of the adapter
+ * that it finds in the system. The pci_dev strcuture indicates which
+ * instance we are being called from.
+ *
+ * @dev: The PCI device to intialize.
+ * @id: Looks like a pointer to the entry in our pci device table
+ * that was actually matched by the PCI subsystem.
+ *
+ * Returns 0 on success, or an error code (-ve) on failure.
+ **/
static
-int __devinit dc395x_init_one(struct pci_dev *pdev,
+int __devinit dc395x_init_one(struct pci_dev *dev,
const struct pci_device_id *id)
{
unsigned int io_port;
@@ -6184,60 +5860,64 @@
banner_done = 1;
}
- if (pci_enable_device(pdev))
+ if (pci_enable_device(dev))
{
dprintkl(KERN_INFO, "PCI Enable device failed.\n");
return -ENODEV;
}
dprintkdbg(DBG_0, "Get resources...\n");
- io_port = pci_resource_start(pdev, 0) & PCI_BASE_ADDRESS_IO_MASK;
- irq = pdev->irq;
+ io_port = pci_resource_start(dev, 0) & PCI_BASE_ADDRESS_IO_MASK;
+ irq = dev->irq;
dprintkdbg(DBG_0, "IO_PORT=%04x,IRQ=%x\n", (unsigned int) io_port, irq);
- scsi_host = DC395x_init(&dc395x_driver_template, io_port, irq, DC395x_adapterCnt);
+ scsi_host = host_init(&dc395x_driver_template, io_port, irq, adapter_count);
if (!scsi_host)
{
- dprintkdbg(DBG_0, "DC395x_init failed\n");
+ dprintkdbg(DBG_0, "host_init failed\n");
return -ENOMEM;
}
- pci_set_master(pdev);
+ pci_set_master(dev);
/* store pci devices in out host data object. */
- ((struct AdapterCtlBlk *)(scsi_host->hostdata))->pdev = pdev;
+ ((struct AdapterCtlBlk *)(scsi_host->hostdata))->dev = dev;
/* increment adaptor count */
- DC395x_adapterCnt++;
+ adapter_count++;
/* store ptr to scsi host in the PCI device structure */
- pci_set_drvdata(pdev, scsi_host);
+ pci_set_drvdata(dev, scsi_host);
/* get the scsi mid level to scan for new devices on the bus */
- scsi_add_host(scsi_host, &pdev->dev); /* XXX handle failure */
+ scsi_add_host(scsi_host, &dev->dev); /* XXX handle failure */
scsi_scan_host(scsi_host);
return 0;
}
-/*
- * Called to remove a single instance of the adaptor
- */
-static void __devexit dc395x_remove_one(struct pci_dev *pdev)
+/**
+ * dc395x_remove_one - Called to remove a single instance of the
+ * adapter.
+ *
+ * @dev: The PCI device to intialize.
+ **/
+static void __devexit dc395x_remove_one(struct pci_dev *dev)
{
- struct Scsi_Host *host = pci_get_drvdata(pdev);
+ struct Scsi_Host *host = pci_get_drvdata(dev);
dprintkdbg(DBG_0, "Removing instance\n");
scsi_remove_host(host);
- DC395x_release(host);
- pci_set_drvdata(pdev, NULL);
+ host_release(host);
+ pci_set_drvdata(dev, NULL);
}
+
/*
* Table which identifies the PCI devices which
* are handled by this device driver.
*/
-static struct pci_device_id dc395x_pci_table[] __devinitdata = {
+static struct pci_device_id dc395x_pci_table[] = {
{
.vendor = PCI_VENDOR_ID_TEKRAM,
.device = PCI_DEVICE_ID_TEKRAM_TRMS1040,
@@ -6248,6 +5928,7 @@
};
MODULE_DEVICE_TABLE(pci, dc395x_pci_table);
+
/*
* PCI driver operations.
* Tells the PCI sub system what can be done with the card.
@@ -6259,15 +5940,28 @@
.remove = __devexit_p(dc395x_remove_one),
};
-static int __init dc395x_module_init(void)
+
+/**
+ * dc395x_module_init - Module initialization function
+ *
+ * Used by both module and built-in driver to initialise this driver.
+ **/
+static
+int __init dc395x_module_init(void)
{
return pci_module_init(&dc395x_driver);
}
-static void __exit dc395x_module_exit(void)
+
+/**
+ * dc395x_module_exit - Module cleanup function.
+ **/
+static
+void __exit dc395x_module_exit(void)
{
pci_unregister_driver(&dc395x_driver);
}
+
module_init(dc395x_module_init);
module_exit(dc395x_module_exit);
diff -Nru a/drivers/scsi/dc395x.h b/drivers/scsi/dc395x.h
--- a/drivers/scsi/dc395x.h Sun Aug 3 13:14:52 2003
+++ b/drivers/scsi/dc395x.h Sun Aug 3 13:14:52 2003
@@ -18,7 +18,7 @@
/************************************************************************/
#define DC395X_NAME "dc395x"
#define DC395X_BANNER "Tekram DC395(U/UW/F), DC315(U) - ASIC TRM-S1040"
-#define DC395X_VERSION "v2.02, 2003/04/20"
+#define DC395X_VERSION "v2.04, 2003/05/19"
/************************************************************************/
/* */
diff -Nru a/drivers/scsi/esp.c b/drivers/scsi/esp.c
--- a/drivers/scsi/esp.c Sun Aug 3 13:14:53 2003
+++ b/drivers/scsi/esp.c Sun Aug 3 13:14:53 2003
@@ -4256,7 +4256,7 @@
* for reselection. See esp100_reconnect_hwbug()
* to see how we try very hard to avoid this.
*/
- ESPLOG(("esp%d: illegal command\n", esp->esp_id));
+ ESPLOG(("esp%d: invalid command\n", esp->esp_id));
esp_dump_state(esp);
diff -Nru a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c
--- a/drivers/scsi/gdth.c Sun Aug 3 13:14:49 2003
+++ b/drivers/scsi/gdth.c Sun Aug 3 13:14:49 2003
@@ -862,7 +862,7 @@
/* Vortex only makes RAID controllers.
* We do not really want to specify all 550 ids here, so wildcard match.
*/
-static struct pci_device_id gdthtable[] __devinitdata = {
+static struct pci_device_id gdthtable[] = {
{PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
{PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
{PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
@@ -3838,9 +3838,9 @@
/*31*/ "\007\000\002\012\001\013\001"
"GDT HA %u, Fault bus %u, ID %u: old disk detected",
/*32*/ "\007\000\002\012\001\013\001"
- "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is illegal",
+ "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
/*33*/ "\007\000\002\012\001\013\001"
- "GDT HA %u, Fault bus %u, ID %u: illegal device detected",
+ "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
/*34*/ "\011\000\002\012\001\013\001\006\004"
"GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
/*35*/ "\007\000\002\012\001\013\001"
diff -Nru a/drivers/scsi/ips.c b/drivers/scsi/ips.c
--- a/drivers/scsi/ips.c Sun Aug 3 13:14:44 2003
+++ b/drivers/scsi/ips.c Sun Aug 3 13:14:44 2003
@@ -280,7 +280,7 @@
/* This table describes all ServeRAID Adapters */
- static struct pci_device_id ips_pci_table[] __devinitdata = {
+ static struct pci_device_id ips_pci_table[] = {
{ 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
diff -Nru a/drivers/scsi/ips.h b/drivers/scsi/ips.h
--- a/drivers/scsi/ips.h Sun Aug 3 13:14:46 2003
+++ b/drivers/scsi/ips.h Sun Aug 3 13:14:46 2003
@@ -107,7 +107,7 @@
#define IPS_SCSI_SET_DEVICE(sh,ha) scsi_set_pci_device(sh, (ha)->pcidev)
#define IPS_PRINTK(level, pcidev, format, arg...) \
printk(level "%s %s:" format , (pcidev)->driver->name , \
- (pcidev)->slot_name , ## arg)
+ pci_name(pcidev) , ## arg)
#else
#define IPS_REGISTER_HOSTS(SHT) (!ips_detect(SHT))
#define IPS_UNREGISTER_HOSTS(SHT)
diff -Nru a/drivers/scsi/mac53c94.c b/drivers/scsi/mac53c94.c
--- a/drivers/scsi/mac53c94.c Sun Aug 3 13:14:45 2003
+++ b/drivers/scsi/mac53c94.c Sun Aug 3 13:14:45 2003
@@ -361,7 +361,7 @@
return;
}
if (intr & INTR_ILL_CMD) {
- printk(KERN_ERR "53c94: illegal cmd, intr=%x stat=%x seq=%x phase=%d\n",
+ printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
intr, stat, seq, state->phase);
cmd_done(state, DID_ERROR << 16);
return;
diff -Nru a/drivers/scsi/ncr53c8xx.c b/drivers/scsi/ncr53c8xx.c
--- a/drivers/scsi/ncr53c8xx.c Sun Aug 3 13:14:46 2003
+++ b/drivers/scsi/ncr53c8xx.c Sun Aug 3 13:14:46 2003
@@ -5166,7 +5166,7 @@
printk ("extraneous data discarded.\n");
break;
case XE_BAD_PHASE:
- printk ("illegal scsi phase (4/5).\n");
+ printk ("invalid scsi phase (4/5).\n");
break;
default:
printk ("extended error %d.\n", cp->xerr_status);
diff -Nru a/drivers/scsi/nsp32.c b/drivers/scsi/nsp32.c
--- a/drivers/scsi/nsp32.c Sun Aug 3 13:14:47 2003
+++ b/drivers/scsi/nsp32.c Sun Aug 3 13:14:47 2003
@@ -1977,7 +1977,7 @@
ret = nsp32_detect(pdev);
nsp32_msg(KERN_INFO, "nsp32 irq: %i mmio: 0x%lx slot: %s model: %s",
- pdev->irq, data->MmioAddress, pdev->slot_name,
+ pdev->irq, data->MmioAddress, pci_name(pdev),
nsp32_model[id->driver_data]);
nsp32_dbg(NSP32_DEBUG_REGISTER, "exit");
@@ -2001,7 +2001,7 @@
iounmap((void *)(data->MmioAddress));
}
-static struct pci_device_id nsp32_pci_table[] __devinitdata = {
+static struct pci_device_id nsp32_pci_table[] = {
{
.vendor = PCI_VENDOR_ID_IODATA,
.device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
diff -Nru a/drivers/scsi/script_asm.pl b/drivers/scsi/script_asm.pl
--- a/drivers/scsi/script_asm.pl Sun Aug 3 13:14:52 2003
+++ b/drivers/scsi/script_asm.pl Sun Aug 3 13:14:52 2003
@@ -813,7 +813,7 @@
$address = $2;
$length = $3;
die
-"$0 : $symbol $i has illegal relative reference at address $address,
+"$0 : $symbol $i has invalid relative reference at address $address,
size $length\n"
if ($type eq 'REL');
@@ -831,12 +831,12 @@
$length = $3;
die
-"$0 : symbol $label is external, has illegal relative reference at $address,
+"$0 : symbol $label is external, has invalid relative reference at $address,
size $length\n"
if ($type eq 'REL');
die
-"$0 : symbol $label has illegal reference at $address, size $length\n"
+"$0 : symbol $label has invalid reference at $address, size $length\n"
if ((($address % 4) !=0) || ($length != 4));
$symbol = $symbol_values{$external};
@@ -862,7 +862,7 @@
$length = $3;
if ((($address % 4) !=0) || ($length != 4)) {
- die "$0 : symbol $label has illegal reference at $1, size $2\n";
+ die "$0 : symbol $label has invalid reference at $1, size $2\n";
}
if ($type eq 'ABS') {
diff -Nru a/drivers/scsi/st.c b/drivers/scsi/st.c
--- a/drivers/scsi/st.c Sun Aug 3 13:14:50 2003
+++ b/drivers/scsi/st.c Sun Aug 3 13:14:50 2003
@@ -3659,7 +3659,7 @@
}
}
if (i >= sizeof(parms) / sizeof(struct st_dev_parm))
- printk(KERN_WARNING "st: illegal parameter in '%s'\n",
+ printk(KERN_WARNING "st: invalid parameter in '%s'\n",
stp);
stp = strchr(stp, ',');
if (stp)
diff -Nru a/drivers/scsi/tmscsim.c b/drivers/scsi/tmscsim.c
--- a/drivers/scsi/tmscsim.c Sun Aug 3 13:14:53 2003
+++ b/drivers/scsi/tmscsim.c Sun Aug 3 13:14:53 2003
@@ -274,7 +274,7 @@
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,99)
-static struct pci_device_id tmscsim_pci_tbl[] __initdata = {
+static struct pci_device_id tmscsim_pci_tbl[] = {
{
.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_AMD53C974,
@@ -2815,7 +2815,7 @@
return (length);
einv_dev:
- printk (KERN_WARNING "DC390: Ignore cmnd to illegal Dev(Idx) %i. Valid range: 0 - %i.\n",
+ printk (KERN_WARNING "DC390: Ignore cmnd to invalid Dev(Idx) %i. Valid range: 0 - %i.\n",
dev, pACB->DCBCnt - 1);
DC390_UNLOCK_ACB;
DC390_UNLOCK_IO(pACB.pScsiHost);
diff -Nru a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
--- a/drivers/serial/8250_pci.c Sun Aug 3 13:14:51 2003
+++ b/drivers/serial/8250_pci.c Sun Aug 3 13:14:51 2003
@@ -103,7 +103,7 @@
KERN_WARNING "message (0x%04x,0x%04x,0x%04x,0x%04x), the\n"
KERN_WARNING "manufacturer and name of serial board or\n"
KERN_WARNING "modem board to rmk+serial@arm.linux.org.uk.\n",
- dev->slot_name, str, dev->vendor, dev->device,
+ pci_name(dev), str, dev->vendor, dev->device,
dev->subsystem_vendor, dev->subsystem_device);
}
@@ -1647,7 +1647,7 @@
return 0;
}
-static struct pci_device_id serial_pci_tbl[] __devinitdata = {
+static struct pci_device_id serial_pci_tbl[] = {
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0,
diff -Nru a/drivers/serial/Kconfig b/drivers/serial/Kconfig
--- a/drivers/serial/Kconfig Sun Aug 3 13:14:52 2003
+++ b/drivers/serial/Kconfig Sun Aug 3 13:14:52 2003
@@ -9,8 +9,7 @@
#
# The new 8250/16550 serial drivers
config SERIAL_8250
- tristate "8250/16550 and compatible serial support (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ tristate "8250/16550 and compatible serial support"
---help---
This selects whether you want to include the driver for the standard
serial ports. The standard answer is Y. People who might say N
@@ -40,7 +39,7 @@
modems and similar devices connecting to the standard serial ports.
config SERIAL_8250_CONSOLE
- bool "Console on 8250/16550 and compatible serial port (EXPERIMENTAL)"
+ bool "Console on 8250/16550 and compatible serial port"
depends on SERIAL_8250=y
---help---
If you say Y here, it will be possible to use a serial port as the
@@ -53,8 +52,8 @@
(/dev/tty0) will still be used as the system console by default, but
you can alter that using a kernel command line option such as
"console=ttyS1". (Try "man bootparam" or see the documentation of
- your boot loader (lilo or loadlin) about how to pass options to the
- kernel at boot time.)
+ your boot loader (grub or lilo or loadlin) about how to pass options
+ to the kernel at boot time.)
If you don't have a VGA card installed and you say Y here, the
kernel will automatically use the first serial line, /dev/ttyS0, as
diff -Nru a/drivers/telephony/ixj.c b/drivers/telephony/ixj.c
--- a/drivers/telephony/ixj.c Sun Aug 3 13:14:44 2003
+++ b/drivers/telephony/ixj.c Sun Aug 3 13:14:44 2003
@@ -2250,8 +2250,6 @@
j->flags.cidplay = 0;
j->flags.cidcw_ack = 0;
- MOD_INC_USE_COUNT;
-
if (ixjdebug & 0x0002)
printk(KERN_INFO "Opening board %d\n", p->board);
@@ -2463,7 +2461,6 @@
file_p->private_data = NULL;
clear_bit(board, &j->busyflags);
- MOD_DEC_USE_COUNT;
return 0;
}
diff -Nru a/drivers/telephony/phonedev.c b/drivers/telephony/phonedev.c
--- a/drivers/telephony/phonedev.c Sun Aug 3 13:14:49 2003
+++ b/drivers/telephony/phonedev.c Sun Aug 3 13:14:49 2003
@@ -106,7 +106,6 @@
if (phone_device[i] == NULL) {
phone_device[i] = p;
p->minor = i;
- MOD_INC_USE_COUNT;
up(&phone_lock);
return 0;
}
@@ -126,7 +125,6 @@
panic("phone: bad unregister");
phone_device[pfd->minor] = NULL;
up(&phone_lock);
- MOD_DEC_USE_COUNT;
}
diff -Nru a/drivers/usb/Makefile b/drivers/usb/Makefile
--- a/drivers/usb/Makefile Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/Makefile Sun Aug 3 13:14:52 2003
@@ -35,6 +35,7 @@
obj-$(CONFIG_USB_STV680) += media/
obj-$(CONFIG_USB_VICAM) += media/
+obj-$(CONFIG_USB_AX8817X) += net/
obj-$(CONFIG_USB_CATC) += net/
obj-$(CONFIG_USB_KAWETH) += net/
obj-$(CONFIG_USB_PEGASUS) += net/
diff -Nru a/drivers/usb/class/audio.c b/drivers/usb/class/audio.c
--- a/drivers/usb/class/audio.c Sun Aug 3 13:14:53 2003
+++ b/drivers/usb/class/audio.c Sun Aug 3 13:14:53 2003
@@ -1524,7 +1524,7 @@
if (u->interface < 0 || u->interface >= config->desc.bNumInterfaces)
return 0;
- iface = &config->interface[u->interface];
+ iface = config->interface[u->interface];
fmtnr = find_format(as->fmtin, as->numfmtin, d->format, d->srate);
if (fmtnr < 0) {
@@ -1612,7 +1612,7 @@
if (u->interface < 0 || u->interface >= config->desc.bNumInterfaces)
return 0;
- iface = &config->interface[u->interface];
+ iface = config->interface[u->interface];
fmtnr = find_format(as->fmtout, as->numfmtout, d->format, d->srate);
if (fmtnr < 0) {
@@ -2704,7 +2704,7 @@
if (file->f_mode & FMODE_WRITE) {
usbout_stop(as);
if (dev && as->usbout.interface >= 0) {
- iface = &dev->actconfig->interface[as->usbout.interface];
+ iface = dev->actconfig->interface[as->usbout.interface];
usb_set_interface(dev, iface->altsetting->desc.bInterfaceNumber, 0);
}
dmabuf_release(&as->usbout.dma);
@@ -2713,7 +2713,7 @@
if (file->f_mode & FMODE_READ) {
usbin_stop(as);
if (dev && as->usbin.interface >= 0) {
- iface = &dev->actconfig->interface[as->usbin.interface];
+ iface = dev->actconfig->interface[as->usbin.interface];
usb_set_interface(dev, iface->altsetting->desc.bInterfaceNumber, 0);
}
dmabuf_release(&as->usbin.dma);
@@ -2866,7 +2866,7 @@
/* search for input formats */
if (asifin >= 0) {
as->usbin.flags = FLG_CONNECTED;
- iface = &config->interface[asifin];
+ iface = config->interface[asifin];
for (i = 0; i < iface->num_altsetting; i++) {
alts = &iface->altsetting[i];
if (alts->desc.bInterfaceClass != USB_CLASS_AUDIO || alts->desc.bInterfaceSubClass != 2)
@@ -2947,12 +2947,14 @@
/* search for output formats */
if (asifout >= 0) {
as->usbout.flags = FLG_CONNECTED;
- iface = &config->interface[asifout];
+ iface = config->interface[asifout];
for (i = 0; i < iface->num_altsetting; i++) {
alts = &iface->altsetting[i];
if (alts->desc.bInterfaceClass != USB_CLASS_AUDIO || alts->desc.bInterfaceSubClass != 2)
continue;
if (alts->desc.bNumEndpoints < 1) {
+ /* altsetting 0 should never have iso EPs */
+ if (alts->desc.bAlternateSetting != 0)
printk(KERN_ERR "usbaudio: device %u interface %u altsetting %u does not have an endpoint\n",
dev->devnum, asifout, i);
continue;
@@ -3684,7 +3686,7 @@
dev->devnum, ctrlif, j);
continue;
}
- iface = &config->interface[j];
+ iface = config->interface[j];
if (iface->altsetting[0].desc.bInterfaceClass != USB_CLASS_AUDIO) {
printk(KERN_ERR "usbaudio: device %d audiocontrol interface %u interface %u is not an AudioClass interface\n",
dev->devnum, ctrlif, j);
@@ -3872,9 +3874,10 @@
static int __init usb_audio_init(void)
{
- usb_register(&usb_audio_driver);
- info(DRIVER_VERSION ":" DRIVER_DESC);
- return 0;
+ int result = usb_register(&usb_audio_driver);
+ if (result == 0)
+ info(DRIVER_VERSION ":" DRIVER_DESC);
+ return result;
}
diff -Nru a/drivers/usb/class/bluetty.c b/drivers/usb/class/bluetty.c
--- a/drivers/usb/class/bluetty.c Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/class/bluetty.c Sun Aug 3 13:14:51 2003
@@ -190,7 +190,6 @@
int bulk_in_buffer_size;
int bulk_out_buffer_size;
- struct urb * write_urb_pool[NUM_BULK_URBS];
__u8 bulk_out_endpointAddress;
wait_queue_head_t write_wait;
@@ -408,7 +407,6 @@
static void bluetooth_close (struct tty_struct *tty, struct file * filp)
{
struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
- int i;
if (!bluetooth) {
return;
@@ -427,9 +425,7 @@
if (bluetooth->open_count <= 0) {
bluetooth->open_count = 0;
- /* shutdown any bulk reads and writes that might be going on */
- for (i = 0; i < NUM_BULK_URBS; ++i)
- usb_unlink_urb (bluetooth->write_urb_pool[i]);
+ /* shutdown any in-flight urbs that we know about */
usb_unlink_urb (bluetooth->read_urb);
usb_unlink_urb (bluetooth->interrupt_in_urb);
}
@@ -443,9 +439,7 @@
struct urb *urb = NULL;
unsigned char *temp_buffer = NULL;
const unsigned char *current_buffer;
- const unsigned char *current_position;
- int bytes_sent;
- int buffer_size;
+ unsigned char *urb_buffer;
int i;
int retval = 0;
@@ -506,54 +500,46 @@
break;
case ACL_PKT:
- current_position = current_buffer;
- ++current_position;
+ ++current_buffer;
--count;
- bytes_sent = 0;
- while (count > 0) {
- urb = NULL;
+ urb_buffer = kmalloc (count, GFP_ATOMIC);
+ if (!urb_buffer) {
+ dev_err(&bluetooth->dev->dev, "out of memory\n");
+ retval = -ENOMEM;
+ goto exit;
+ }
- /* try to find a free urb in our list */
- for (i = 0; i < NUM_BULK_URBS; ++i) {
- if (bluetooth->write_urb_pool[i]->status != -EINPROGRESS) {
- urb = bluetooth->write_urb_pool[i];
- break;
- }
- }
- if (urb == NULL) {
- dbg ("%s - no free urbs", __FUNCTION__);
- retval = bytes_sent;
- goto exit;
- }
-
-
- buffer_size = min (count, bluetooth->bulk_out_buffer_size);
- memcpy (urb->transfer_buffer, current_position, buffer_size);
-
- /* build up our urb */
- usb_fill_bulk_urb (urb, bluetooth->dev, usb_sndbulkpipe(bluetooth->dev, bluetooth->bulk_out_endpointAddress),
- urb->transfer_buffer, buffer_size, bluetooth_write_bulk_callback, bluetooth);
-
- /* send it down the pipe */
- retval = usb_submit_urb(urb, GFP_KERNEL);
- if (retval) {
- dbg("%s - usb_submit_urb(write bulk) failed with error = %d", __FUNCTION__, retval);
- goto exit;
- }
-#ifdef BTBUGGYHARDWARE
- /* A workaround for the stalled data bug */
- /* May or may not be needed...*/
- if (count != 0) {
- udelay(500);
- }
-#endif
- current_position += buffer_size;
- bytes_sent += buffer_size;
- count -= buffer_size;
+ urb = usb_alloc_urb(0, GFP_ATOMIC);
+ if (!urb) {
+ dev_err(&bluetooth->dev->dev, "no more free urbs\n");
+ kfree(urb_buffer);
+ retval = -ENOMEM;
+ goto exit;
}
+ memcpy (urb_buffer, current_buffer, count);
+
+ /* build up our urb */
+ usb_fill_bulk_urb(urb, bluetooth->dev,
+ usb_sndbulkpipe(bluetooth->dev,
+ bluetooth->bulk_out_endpointAddress),
+ urb_buffer,
+ count,
+ bluetooth_write_bulk_callback,
+ bluetooth);
- retval = bytes_sent + 1;
+
+ /* send it down the pipe */
+ retval = usb_submit_urb(urb, GFP_KERNEL);
+ if (retval) {
+ dbg("%s - usb_submit_urb(write bulk) failed with error = %d", __FUNCTION__, retval);
+ goto exit;
+ }
+
+ /* we are done with this urb, so let the host driver
+ * really free it when it is finished with it */
+ usb_free_urb (urb);
+ retval = count + 1;
break;
default :
@@ -563,8 +549,7 @@
}
exit:
- if (temp_buffer != NULL)
- kfree (temp_buffer);
+ kfree (temp_buffer);
return retval;
}
@@ -572,55 +557,28 @@
static int bluetooth_write_room (struct tty_struct *tty)
{
- struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
- int room = 0;
- int i;
-
- if (!bluetooth) {
- return -ENODEV;
- }
-
dbg("%s", __FUNCTION__);
- if (!bluetooth->open_count) {
- dbg ("%s - device not open", __FUNCTION__);
- return -EINVAL;
- }
-
- for (i = 0; i < NUM_BULK_URBS; ++i) {
- if (bluetooth->write_urb_pool[i]->status != -EINPROGRESS) {
- room += bluetooth->bulk_out_buffer_size;
- }
- }
-
- dbg("%s - returns %d", __FUNCTION__, room);
- return room;
+ /*
+ * We really can take anything the user throws at us
+ * but let's pick a nice big number to tell the tty
+ * layer that we have lots of free space
+ */
+ return 2048;
}
static int bluetooth_chars_in_buffer (struct tty_struct *tty)
{
- struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
- int chars = 0;
- int i;
-
- if (!bluetooth) {
- return -ENODEV;
- }
-
- if (!bluetooth->open_count) {
- dbg ("%s - device not open", __FUNCTION__);
- return -EINVAL;
- }
-
- for (i = 0; i < NUM_BULK_URBS; ++i) {
- if (bluetooth->write_urb_pool[i]->status == -EINPROGRESS) {
- chars += bluetooth->write_urb_pool[i]->transfer_buffer_length;
- }
- }
+ dbg("%s", __FUNCTION__);
- dbg ("%s - returns %d", __FUNCTION__, chars);
- return chars;
+ /*
+ * We can't really account for how much data we
+ * have sent out, but hasn't made it through to the
+ * device, so just tell the tty layer that everything
+ * is flushed.
+ */
+ return 0;
}
@@ -1009,6 +967,9 @@
dbg("%s", __FUNCTION__);
+ /* free up the transfer buffer, as usb_free_urb() does not do this */
+ kfree(urb->transfer_buffer);
+
if (!bluetooth) {
dbg("%s - bad bluetooth pointer, exiting", __FUNCTION__);
return;
@@ -1161,21 +1122,6 @@
bluetooth->bulk_out_endpointAddress = endpoint->bEndpointAddress;
bluetooth->bulk_out_buffer_size = endpoint->wMaxPacketSize * 2;
- /* create our write urb pool */
- for (i = 0; i < NUM_BULK_URBS; ++i) {
- struct urb *urb = usb_alloc_urb(0, GFP_KERNEL);
- if (urb == NULL) {
- err("No free urbs available");
- goto probe_error;
- }
- urb->transfer_buffer = kmalloc (bluetooth->bulk_out_buffer_size, GFP_KERNEL);
- if (urb->transfer_buffer == NULL) {
- err("out of memory");
- goto probe_error;
- }
- bluetooth->write_urb_pool[i] = urb;
- }
-
endpoint = interrupt_in_endpoint[0];
bluetooth->interrupt_in_urb = usb_alloc_urb(0, GFP_KERNEL);
if (!bluetooth->interrupt_in_urb) {
@@ -1213,12 +1159,6 @@
usb_free_urb (bluetooth->interrupt_in_urb);
if (bluetooth->interrupt_in_buffer)
kfree (bluetooth->interrupt_in_buffer);
- for (i = 0; i < NUM_BULK_URBS; ++i)
- if (bluetooth->write_urb_pool[i]) {
- if (bluetooth->write_urb_pool[i]->transfer_buffer)
- kfree (bluetooth->write_urb_pool[i]->transfer_buffer);
- usb_free_urb (bluetooth->write_urb_pool[i]);
- }
for (i = 0; i < NUM_CONTROL_URBS; ++i)
if (bluetooth->control_urb_pool[i]) {
if (bluetooth->control_urb_pool[i]->transfer_buffer)
@@ -1262,14 +1202,6 @@
tty_unregister_device (bluetooth_tty_driver, bluetooth->minor);
- for (i = 0; i < NUM_BULK_URBS; ++i) {
- if (bluetooth->write_urb_pool[i]) {
- usb_unlink_urb (bluetooth->write_urb_pool[i]);
- if (bluetooth->write_urb_pool[i]->transfer_buffer)
- kfree (bluetooth->write_urb_pool[i]->transfer_buffer);
- usb_free_urb (bluetooth->write_urb_pool[i]);
- }
- }
for (i = 0; i < NUM_CONTROL_URBS; ++i) {
if (bluetooth->control_urb_pool[i]) {
usb_unlink_urb (bluetooth->control_urb_pool[i]);
diff -Nru a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
--- a/drivers/usb/class/cdc-acm.c Sun Aug 3 13:14:50 2003
+++ b/drivers/usb/class/cdc-acm.c Sun Aug 3 13:14:50 2003
@@ -560,16 +560,16 @@
for (j = 0; j < cfacm->desc.bNumInterfaces - 1; j++) {
- if (usb_interface_claimed(cfacm->interface + j) ||
- usb_interface_claimed(cfacm->interface + j + 1))
+ if (usb_interface_claimed(cfacm->interface[j]) ||
+ usb_interface_claimed(cfacm->interface[j + 1]))
continue;
- ifcom = cfacm->interface[j].altsetting + 0;
- ifdata = cfacm->interface[j + 1].altsetting + 0;
+ ifcom = cfacm->interface[j]->altsetting + 0;
+ ifdata = cfacm->interface[j + 1]->altsetting + 0;
if (ifdata->desc.bInterfaceClass != 10 || ifdata->desc.bNumEndpoints < 2) {
- ifcom = cfacm->interface[j + 1].altsetting + 0;
- ifdata = cfacm->interface[j].altsetting + 0;
+ ifcom = cfacm->interface[j + 1]->altsetting + 0;
+ ifdata = cfacm->interface[j]->altsetting + 0;
if (ifdata->desc.bInterfaceClass != 10 || ifdata->desc.bNumEndpoints < 2)
continue;
}
@@ -610,7 +610,7 @@
ctrlsize = epctrl->wMaxPacketSize;
readsize = epread->wMaxPacketSize;
acm->writesize = epwrite->wMaxPacketSize;
- acm->iface = cfacm->interface + j;
+ acm->iface = cfacm->interface[j];
acm->minor = minor;
acm->dev = dev;
diff -Nru a/drivers/usb/class/usb-midi.c b/drivers/usb/class/usb-midi.c
--- a/drivers/usb/class/usb-midi.c Sun Aug 3 13:14:44 2003
+++ b/drivers/usb/class/usb-midi.c Sun Aug 3 13:14:44 2003
@@ -1524,10 +1524,10 @@
int epin, epout;
int i;
- alts = d->actconfig->interface[ifnum].num_altsetting;
+ alts = d->actconfig->interface[ifnum]->num_altsetting;
for ( alt=0 ; alt<alts ; alt++ ) {
- interface = &d->actconfig->interface[ifnum].altsetting[alt];
+ interface = &d->actconfig->interface[ifnum]->altsetting[alt];
epin = -1;
epout = -1;
@@ -1795,8 +1795,8 @@
return -EINVAL;
}
- for ( i=0 ; i < c->interface[ifnum].num_altsetting; i++ ) {
- interface = c->interface[ifnum].altsetting + i;
+ for ( i=0 ; i < c->interface[ifnum]->num_altsetting; i++ ) {
+ interface = c->interface[ifnum]->altsetting + i;
if ( interface->desc.bInterfaceClass != 255 ||
interface->desc.bInterfaceSubClass != 0 )
@@ -1889,8 +1889,8 @@
int alts=-1;
int ret;
- for ( i=0 ; i < c->interface[ifnum].num_altsetting; i++ ) {
- interface = c->interface[ifnum].altsetting + i;
+ for ( i=0 ; i < c->interface[ifnum]->num_altsetting; i++ ) {
+ interface = c->interface[ifnum]->altsetting + i;
if ( interface->desc.bInterfaceClass != USB_CLASS_AUDIO ||
interface->desc.bInterfaceSubClass != USB_SUBCLASS_MIDISTREAMING )
diff -Nru a/drivers/usb/class/usblp.c b/drivers/usb/class/usblp.c
--- a/drivers/usb/class/usblp.c Sun Aug 3 13:14:46 2003
+++ b/drivers/usb/class/usblp.c Sun Aug 3 13:14:46 2003
@@ -383,7 +383,7 @@
usb_buffer_free (usblp->dev, USBLP_BUF_SIZE,
usblp->writebuf, usblp->writeurb->transfer_dma);
usb_buffer_free (usblp->dev, USBLP_BUF_SIZE,
- usblp->readbuf, usblp->writeurb->transfer_dma);
+ usblp->readbuf, usblp->readurb->transfer_dma);
kfree (usblp->device_id_string);
kfree (usblp->statusbuf);
usb_free_urb(usblp->writeurb);
@@ -403,14 +403,12 @@
struct usblp *usblp = file->private_data;
down (&usblp->sem);
- lock_kernel();
usblp->used = 0;
if (usblp->present) {
usblp_unlink_urbs(usblp);
up(&usblp->sem);
} else /* finish cleanup from disconnect */
usblp_cleanup (usblp);
- unlock_kernel();
return 0;
}
@@ -419,8 +417,8 @@
{
struct usblp *usblp = file->private_data;
poll_wait(file, &usblp->wait, wait);
- return ((!usblp->bidir || usblp->readurb->status == -EINPROGRESS) ? 0 : POLLIN | POLLRDNORM)
- | (usblp->writeurb->status == -EINPROGRESS ? 0 : POLLOUT | POLLWRNORM);
+ return ((!usblp->bidir || !usblp->rcomplete) ? 0 : POLLIN | POLLRDNORM)
+ | (!usblp->wcomplete ? 0 : POLLOUT | POLLWRNORM);
}
static int usblp_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
@@ -573,7 +571,7 @@
break;
default:
- retval = -EINVAL;
+ retval = -ENOTTY;
}
else /* old-style ioctl value */
switch (cmd) {
@@ -590,7 +588,7 @@
break;
default:
- retval = -EINVAL;
+ retval = -ENOTTY;
}
done:
@@ -628,6 +626,12 @@
}
}
remove_wait_queue(&usblp->wait, &wait);
+ if (!timeout) {
+ /* we timed out and need to bail out cleanly */
+ usb_unlink_urb(usblp->writeurb);
+ return writecount ? writecount : -EIO;
+ }
+
}
down (&usblp->sem);
@@ -738,7 +742,7 @@
usblp->readurb->dev = usblp->dev;
usblp->readcount = 0;
if (usb_submit_urb(usblp->readurb, GFP_KERNEL) < 0)
- dbg("error submitting urb");
+ dbg("error submitting urb");
count = -EIO;
goto done;
}
@@ -966,7 +970,7 @@
struct usb_endpoint_descriptor *epd, *epwrite, *epread;
int p, i, e;
- if_alt = &usblp->dev->actconfig->interface[usblp->ifnum];
+ if_alt = usblp->dev->actconfig->interface[usblp->ifnum];
for (p = 0; p < USBLP_MAX_PROTOCOLS; p++)
usblp->protocol[p].alt_setting = -1;
diff -Nru a/drivers/usb/core/config.c b/drivers/usb/core/config.c
--- a/drivers/usb/core/config.c Sun Aug 3 13:14:44 2003
+++ b/drivers/usb/core/config.c Sun Aug 3 13:14:44 2003
@@ -98,6 +98,32 @@
return parsed;
}
+static void usb_release_intf(struct device *dev)
+{
+ struct usb_interface *intf;
+ int j;
+ int k;
+
+ intf = to_usb_interface(dev);
+
+ if (intf->altsetting) {
+ for (j = 0; j < intf->num_altsetting; j++) {
+ struct usb_host_interface *as = &intf->altsetting[j];
+ if (as->extra)
+ kfree(as->extra);
+
+ if (as->endpoint) {
+ for (k = 0; k < as->desc.bNumEndpoints; k++)
+ if (as->endpoint[k].extra)
+ kfree(as->endpoint[k].extra);
+ kfree(as->endpoint);
+ }
+ }
+ kfree(intf->altsetting);
+ }
+ kfree(intf);
+}
+
static int usb_parse_interface(struct usb_interface *interface, unsigned char *buffer, int size)
{
int i, len, numskipped, retval, parsed = 0;
@@ -109,7 +135,11 @@
interface->num_altsetting = 0;
interface->max_altsetting = USB_ALTSETTINGALLOC;
device_initialize(&interface->dev);
+ interface->dev.release = usb_release_intf;
+ /* put happens in usb_destroy_configuration */
+ get_device(&interface->dev);
+
interface->altsetting = kmalloc(sizeof(*interface->altsetting) * interface->max_altsetting,
GFP_KERNEL);
@@ -253,30 +283,33 @@
int usb_parse_configuration(struct usb_host_config *config, char *buffer)
{
- int i, retval, size;
+ int i, size;
+ int retval = -EINVAL;
struct usb_descriptor_header *header;
memcpy(&config->desc, buffer, USB_DT_CONFIG_SIZE);
le16_to_cpus(&config->desc.wTotalLength);
size = config->desc.wTotalLength;
+ for (i = 0; i < USB_MAXINTERFACES; ++i)
+ config->interface[i] = NULL;
+
if (config->desc.bNumInterfaces > USB_MAXINTERFACES) {
warn("too many interfaces");
- return -1;
+ goto error;
}
- config->interface = (struct usb_interface *)
- kmalloc(config->desc.bNumInterfaces *
- sizeof(struct usb_interface), GFP_KERNEL);
- dbg("kmalloc IF %p, numif %i", config->interface, config->desc.bNumInterfaces);
- if (!config->interface) {
- err("out of memory");
- return -1;
+ for (i = 0; i < config->desc.bNumInterfaces; ++i) {
+ config->interface[i] = kmalloc(sizeof(struct usb_interface), GFP_KERNEL);
+ dbg("kmalloc IF %p, numif %i", config->interface[i], i);
+ if (!config->interface[i]) {
+ err("out of memory");
+ retval = -ENOMEM;
+ goto error;
+ }
+ memset(config->interface[i], 0x00, sizeof(struct usb_interface));
}
- memset(config->interface, 0,
- config->desc.bNumInterfaces * sizeof(struct usb_interface));
-
buffer += config->desc.bLength;
size -= config->desc.bLength;
@@ -334,7 +367,7 @@
}
}
- retval = usb_parse_interface(config->interface + i, buffer, size);
+ retval = usb_parse_interface(config->interface[i], buffer, size);
if (retval < 0)
return retval;
@@ -343,13 +376,17 @@
}
return size;
+error:
+ for (i = 0; i < USB_MAXINTERFACES; ++i)
+ kfree(config->interface[i]);
+ return retval;
}
// hub-only!! ... and only exported for reset/reinit path.
// otherwise used internally on disconnect/destroy path
void usb_destroy_configuration(struct usb_device *dev)
{
- int c, i, j, k;
+ int c, i;
if (!dev->config)
return;
@@ -368,34 +405,9 @@
break;
for (i = 0; i < cf->desc.bNumInterfaces; i++) {
- struct usb_interface *ifp =
- &cf->interface[i];
-
- if (!ifp->altsetting)
- break;
-
- for (j = 0; j < ifp->num_altsetting; j++) {
- struct usb_host_interface *as =
- &ifp->altsetting[j];
-
- if(as->extra) {
- kfree(as->extra);
- }
-
- if (!as->endpoint)
- break;
-
- for(k = 0; k < as->desc.bNumEndpoints; k++) {
- if(as->endpoint[k].extra) {
- kfree(as->endpoint[k].extra);
- }
- }
- kfree(as->endpoint);
- }
-
- kfree(ifp->altsetting);
+ struct usb_interface *ifp = cf->interface[i];
+ put_device(&ifp->dev);
}
- kfree(cf->interface);
}
kfree(dev->config);
}
diff -Nru a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c
--- a/drivers/usb/core/devices.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/core/devices.c Sun Aug 3 13:14:52 2003
@@ -309,7 +309,7 @@
return start + sprintf(start, "(null Cfg. desc.)\n");
start = usb_dump_config_descriptor(start, end, &config->desc, active);
for (i = 0; i < config->desc.bNumInterfaces; i++) {
- interface = config->interface + i;
+ interface = config->interface[i];
if (!interface)
break;
for (j = 0; j < interface->num_altsetting; j++) {
diff -Nru a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
--- a/drivers/usb/core/devio.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/core/devio.c Sun Aug 3 13:14:48 2003
@@ -47,6 +47,7 @@
#include <asm/byteorder.h>
#include "hcd.h" /* for usbcore internals */
+#include "usb.h"
struct async {
struct list_head asynclist;
@@ -360,7 +361,7 @@
/* already claimed */
if (test_bit(intf, &ps->ifclaimed))
return 0;
- iface = &dev->actconfig->interface[intf];
+ iface = dev->actconfig->interface[intf];
err = -EBUSY;
lock_kernel();
if (!usb_interface_claimed(iface)) {
@@ -384,7 +385,7 @@
dev = ps->dev;
down(&dev->serialize);
if (dev && test_and_clear_bit(intf, &ps->ifclaimed)) {
- iface = &dev->actconfig->interface[intf];
+ iface = dev->actconfig->interface[intf];
usb_driver_release_interface(&usbdevfs_driver, iface);
err = 0;
}
@@ -414,7 +415,7 @@
if (ep & ~(USB_DIR_IN|0xf))
return -EINVAL;
for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
- iface = &dev->actconfig->interface[i];
+ iface = dev->actconfig->interface[i];
for (j = 0; j < iface->num_altsetting; j++) {
alts = &iface->altsetting[j];
for (e = 0; e < alts->desc.bNumEndpoints; e++) {
@@ -436,7 +437,7 @@
if (ifn & ~0xff)
return -EINVAL;
for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
- iface = &dev->actconfig->interface[i];
+ iface = dev->actconfig->interface[i];
for (j = 0; j < iface->num_altsetting; j++) {
alts = &iface->altsetting[j];
if (alts->desc.bInterfaceNumber == ifn)
@@ -718,7 +719,7 @@
return ret;
for (i = 0; i < ps->dev->actconfig->desc.bNumInterfaces; i++) {
- struct usb_interface *intf = &ps->dev->actconfig->interface[i];
+ struct usb_interface *intf = ps->dev->actconfig->interface[i];
/* Don't simulate interfaces we've claimed */
if (test_bit(i, &ps->ifclaimed))
@@ -726,7 +727,7 @@
err ("%s - this function is broken", __FUNCTION__);
if (intf->driver && ps->dev) {
- usb_device_probe (&intf->dev);
+ usb_probe_interface (&intf->dev);
}
}
@@ -1105,7 +1106,7 @@
if (driver) {
dbg ("disconnect '%s' from dev %d interface %d",
driver->name, ps->dev->devnum, ctrl.ifno);
- usb_device_remove(&ifp->dev);
+ usb_unbind_interface(&ifp->dev);
} else
retval = -ENODATA;
unlock_kernel();
@@ -1114,7 +1115,7 @@
/* let kernel drivers try to (re)bind to the interface */
case USBDEVFS_CONNECT:
lock_kernel();
- retval = usb_device_probe (&ifp->dev);
+ retval = usb_probe_interface (&ifp->dev);
unlock_kernel();
break;
diff -Nru a/drivers/usb/core/file.c b/drivers/usb/core/file.c
--- a/drivers/usb/core/file.c Sun Aug 3 13:14:53 2003
+++ b/drivers/usb/core/file.c Sun Aug 3 13:14:53 2003
@@ -93,7 +93,7 @@
{
struct usb_interface *intf = class_dev_to_usb_interface(class_dev);
dev_t dev = MKDEV(USB_MAJOR, intf->minor);
- return sprintf(buf, "%04x\n", dev);
+ return print_dev_t(buf, dev);
}
static CLASS_DEVICE_ATTR(dev, S_IRUGO, show_dev, NULL);
diff -Nru a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
--- a/drivers/usb/core/hcd-pci.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/core/hcd-pci.c Sun Aug 3 13:14:48 2003
@@ -122,10 +122,9 @@
base = (void *) resource;
}
- // driver->start(), later on, will transfer device from
+ // driver->reset(), later on, will transfer device from
// control by SMM/BIOS to control by Linux (if needed)
- pci_set_master (dev);
hcd = driver->hcd_alloc ();
if (hcd == NULL){
dbg ("hcd alloc fail");
@@ -140,6 +139,9 @@
return retval;
}
}
+ hcd->regs = base;
+ hcd->region = region;
+
pci_set_drvdata (dev, hcd);
hcd->driver = driver;
hcd->description = driver->description;
@@ -157,22 +159,27 @@
dev_info (hcd->controller, "%s\n", hcd->product_desc);
+ /* till now HC has been in an indeterminate state ... */
+ if (driver->reset && (retval = driver->reset (hcd)) < 0) {
+ dev_err (hcd->controller, "can't reset\n");
+ goto clean_3;
+ }
+
+ pci_set_master (dev);
#ifndef __sparc__
sprintf (buf, "%d", dev->irq);
#else
bufp = __irq_itoa(dev->irq);
#endif
- if (request_irq (dev->irq, usb_hcd_irq, SA_SHIRQ, hcd->description, hcd)
- != 0) {
+ retval = request_irq (dev->irq, usb_hcd_irq, SA_SHIRQ,
+ hcd->description, hcd);
+ if (retval != 0) {
dev_err (hcd->controller,
"request interrupt %s failed\n", bufp);
- retval = -EBUSY;
goto clean_3;
}
hcd->irq = dev->irq;
- hcd->regs = base;
- hcd->region = region;
dev_info (hcd->controller, "irq %s, %s %p\n", bufp,
(driver->flags & HCD_MEMORY) ? "pci mem" : "io base",
base);
diff -Nru a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
--- a/drivers/usb/core/hcd.c Sun Aug 3 13:14:49 2003
+++ b/drivers/usb/core/hcd.c Sun Aug 3 13:14:49 2003
@@ -734,14 +734,20 @@
* The USB host controller calls this function to register the root hub
* properly with the USB subsystem. It sets up the device properly in
* the driverfs tree, and then calls usb_new_device() to register the
- * usb device.
+ * usb device. It also assigns the root hub's USB address (always 1).
*/
int usb_register_root_hub (struct usb_device *usb_dev, struct device *parent_dev)
{
+ const int devnum = 1;
int retval;
sprintf (&usb_dev->dev.bus_id[0], "usb%d", usb_dev->bus->busnum);
usb_dev->state = USB_STATE_DEFAULT;
+
+ usb_dev->devnum = devnum;
+ usb_dev->bus->devnum_next = devnum + 1;
+ set_bit (devnum, usb_dev->bus->devmap.devicemap);
+
retval = usb_new_device (usb_dev, parent_dev);
if (retval)
dev_err (parent_dev, "can't register root hub for %s, %d\n",
@@ -1273,7 +1279,6 @@
*/
static void hcd_endpoint_disable (struct usb_device *udev, int endpoint)
{
- unsigned long flags;
struct hcd_dev *dev;
struct usb_hcd *hcd;
struct urb *urb;
@@ -1282,6 +1287,8 @@
dev = udev->hcpriv;
hcd = udev->bus->hcpriv;
+ local_irq_disable ();
+
rescan:
/* (re)block new requests, as best we can */
if (endpoint & USB_DIR_IN) {
@@ -1293,7 +1300,6 @@
}
/* then kill any current requests */
- local_irq_save (flags);
spin_lock (&hcd_data_lock);
list_for_each_entry (urb, &dev->urb_list, urb_list) {
int tmp = urb->pipe;
@@ -1342,7 +1348,7 @@
goto rescan;
}
spin_unlock (&hcd_data_lock);
- local_irq_restore (flags);
+ local_irq_enable ();
/* synchronize with the hardware, so old configuration state
* clears out immediately (and will be freed).
diff -Nru a/drivers/usb/core/hcd.h b/drivers/usb/core/hcd.h
--- a/drivers/usb/core/hcd.h Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/core/hcd.h Sun Aug 3 13:14:47 2003
@@ -173,6 +173,7 @@
#define HCD_USB2 0x0020 /* USB 2.0 */
/* called to init HCD and root hub */
+ int (*reset) (struct usb_hcd *hcd);
int (*start) (struct usb_hcd *hcd);
/* called after all devices were suspended */
@@ -246,12 +247,11 @@
/* Enumeration is only for the hub driver, or HCD virtual root hubs */
extern int usb_new_device(struct usb_device *dev, struct device *parent);
-extern void usb_connect(struct usb_device *dev);
+extern void usb_choose_address(struct usb_device *dev);
extern void usb_disconnect(struct usb_device **);
/* exported to hub driver ONLY to support usb_reset_device () */
extern int usb_get_configuration(struct usb_device *dev);
-extern void usb_set_maxpacket(struct usb_device *dev);
extern void usb_destroy_configuration(struct usb_device *dev);
extern int usb_set_address(struct usb_device *dev);
diff -Nru a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
--- a/drivers/usb/core/hub.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/core/hub.c Sun Aug 3 13:14:48 2003
@@ -60,7 +60,7 @@
/* for dev_info, dev_dbg, etc */
static inline struct device *hubdev (struct usb_device *dev)
{
- return &dev->actconfig->interface [0].dev;
+ return &dev->actconfig->interface[0]->dev;
}
/* USB 2.0 spec Section 11.24.4.5 */
@@ -691,7 +691,7 @@
static int hub_port_status(struct usb_device *dev, int port,
u16 *status, u16 *change)
{
- struct usb_hub *hub = usb_get_intfdata (dev->actconfig->interface);
+ struct usb_hub *hub = usb_get_intfdata(dev->actconfig->interface[0]);
int ret;
ret = get_port_status(dev, port + 1, &hub->status->port);
@@ -708,6 +708,7 @@
#define HUB_RESET_TRIES 5
#define HUB_PROBE_TRIES 2
+#define HUB_ROOT_RESET_TIME 50 /* times are in msec */
#define HUB_SHORT_RESET_TIME 10
#define HUB_LONG_RESET_TIME 200
#define HUB_RESET_TIMEOUT 500
@@ -903,6 +904,12 @@
return;
}
+ /* root hub ports have a slightly longer reset period
+ * (from USB 2.0 spec, section 7.1.7.5)
+ */
+ if (!hub->parent)
+ delay = HUB_ROOT_RESET_TIME;
+
/* Some low speed devices have problems with the quick delay, so */
/* be a bit pessimistic with those devices. RHbug #23670 */
if (portstatus & USB_PORT_STAT_LOW_SPEED)
@@ -932,7 +939,7 @@
}
/* Find a new address for it */
- usb_connect(dev);
+ usb_choose_address(dev);
/* Set up TT records, if needed */
if (hub->tt) {
@@ -1324,9 +1331,7 @@
return 1;
}
- dev->actconfig = dev->config;
- usb_set_maxpacket(dev);
-
+ usb_set_configuration(dev, dev->config[0].desc.bConfigurationValue);
return 1;
}
@@ -1340,7 +1345,7 @@
}
for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
- struct usb_interface *intf = &dev->actconfig->interface[i];
+ struct usb_interface *intf = dev->actconfig->interface[i];
struct usb_interface_descriptor *as;
as = &intf->altsetting[intf->act_altsetting].desc;
diff -Nru a/drivers/usb/core/message.c b/drivers/usb/core/message.c
--- a/drivers/usb/core/message.c Sun Aug 3 13:14:46 2003
+++ b/drivers/usb/core/message.c Sun Aug 3 13:14:46 2003
@@ -2,6 +2,14 @@
* message.c - synchronous message handling
*/
+#include <linux/config.h>
+
+#ifdef CONFIG_USB_DEBUG
+ #define DEBUG
+#else
+ #undef DEBUG
+#endif
+
#include <linux/pci.h> /* for scatterlist macros */
#include <linux/usb.h>
#include <linux/module.h>
@@ -11,6 +19,7 @@
#include <asm/byteorder.h>
#include "hcd.h" /* for usbcore internals */
+#include "usb.h"
struct usb_api_data {
wait_queue_head_t wqh;
@@ -666,41 +675,6 @@
HZ * USB_CTRL_GET_TIMEOUT);
}
-
-// hub-only!! ... and only exported for reset/reinit path.
-// otherwise used internally, when setting up a config
-void usb_set_maxpacket(struct usb_device *dev)
-{
- int i, b;
-
- /* NOTE: affects all endpoints _except_ ep0 */
- for (i=0; i<dev->actconfig->desc.bNumInterfaces; i++) {
- struct usb_interface *ifp = dev->actconfig->interface + i;
- struct usb_host_interface *as = ifp->altsetting + ifp->act_altsetting;
- struct usb_host_endpoint *ep = as->endpoint;
- int e;
-
- for (e=0; e<as->desc.bNumEndpoints; e++) {
- struct usb_endpoint_descriptor *d;
- d = &ep [e].desc;
- b = d->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
- if ((d->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
- USB_ENDPOINT_XFER_CONTROL) { /* Control => bidirectional */
- dev->epmaxpacketout[b] = d->wMaxPacketSize;
- dev->epmaxpacketin [b] = d->wMaxPacketSize;
- }
- else if (usb_endpoint_out(d->bEndpointAddress)) {
- if (d->wMaxPacketSize > dev->epmaxpacketout[b])
- dev->epmaxpacketout[b] = d->wMaxPacketSize;
- }
- else {
- if (d->wMaxPacketSize > dev->epmaxpacketin [b])
- dev->epmaxpacketin [b] = d->wMaxPacketSize;
- }
- }
- }
-}
-
/**
* usb_clear_halt - tells device to clear endpoint halt/stall condition
* @dev: device whose endpoint is halted
@@ -760,6 +734,124 @@
}
/**
+ * usb_disable_endpoint -- Disable an endpoint by address
+ * @dev: the device whose endpoint is being disabled
+ * @epaddr: the endpoint's address. Endpoint number for output,
+ * endpoint number + USB_DIR_IN for input
+ *
+ * Deallocates hcd/hardware state for this endpoint ... and nukes all
+ * pending urbs.
+ *
+ * If the HCD hasn't registered a disable() function, this marks the
+ * endpoint as halted and sets its maxpacket size to 0 to prevent
+ * further submissions.
+ */
+void usb_disable_endpoint(struct usb_device *dev, unsigned int epaddr)
+{
+ if (dev && dev->bus && dev->bus->op && dev->bus->op->disable)
+ dev->bus->op->disable(dev, epaddr);
+ else {
+ unsigned int epnum = epaddr & USB_ENDPOINT_NUMBER_MASK;
+
+ if (usb_endpoint_out(epaddr)) {
+ usb_endpoint_halt(dev, epnum, 1);
+ dev->epmaxpacketout[epnum] = 0;
+ } else {
+ usb_endpoint_halt(dev, epnum, 0);
+ dev->epmaxpacketin[epnum] = 0;
+ }
+ }
+}
+
+/**
+ * usb_disable_interface -- Disable all endpoints for an interface
+ * @dev: the device whose interface is being disabled
+ * @intf: pointer to the interface descriptor
+ *
+ * Disables all the endpoints for the interface's current altsetting.
+ */
+void usb_disable_interface(struct usb_device *dev, struct usb_interface *intf)
+{
+ struct usb_host_interface *hintf =
+ &intf->altsetting[intf->act_altsetting];
+ int i;
+
+ for (i = 0; i < hintf->desc.bNumEndpoints; ++i) {
+ usb_disable_endpoint(dev,
+ hintf->endpoint[i].desc.bEndpointAddress);
+ }
+}
+
+/*
+ * usb_disable_device - Disable all the endpoints for a USB device
+ * @dev: the device whose endpoints are being disabled
+ * @skip_ep0: 0 to disable endpoint 0, 1 to skip it.
+ *
+ * Disables all the device's endpoints, potentially including endpoint 0.
+ * Deallocates hcd/hardware state for the endpoints ... and nukes all
+ * pending urbs.
+ */
+void usb_disable_device(struct usb_device *dev, int skip_ep0)
+{
+ int i;
+
+ dbg("nuking URBs for device %s", dev->dev.bus_id);
+ for (i = skip_ep0; i < 16; ++i) {
+ usb_disable_endpoint(dev, i);
+ usb_disable_endpoint(dev, i + USB_DIR_IN);
+ }
+}
+
+
+/*
+ * usb_enable_endpoint - Enable an endpoint for USB communications
+ * @dev: the device whose interface is being enabled
+ * @epd: pointer to the endpoint descriptor
+ *
+ * Marks the endpoint as running, resets its toggle, and stores
+ * its maxpacket value. For control endpoints, both the input
+ * and output sides are handled.
+ */
+void usb_enable_endpoint(struct usb_device *dev,
+ struct usb_endpoint_descriptor *epd)
+{
+ int maxsize = epd->wMaxPacketSize;
+ unsigned int epaddr = epd->bEndpointAddress;
+ unsigned int epnum = epaddr & USB_ENDPOINT_NUMBER_MASK;
+ int is_control = ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+ USB_ENDPOINT_XFER_CONTROL);
+
+ if (usb_endpoint_out(epaddr) || is_control) {
+ usb_endpoint_running(dev, epnum, 1);
+ usb_settoggle(dev, epnum, 1, 0);
+ dev->epmaxpacketout[epnum] = maxsize;
+ }
+ if (!usb_endpoint_out(epaddr) || is_control) {
+ usb_endpoint_running(dev, epnum, 0);
+ usb_settoggle(dev, epnum, 0, 0);
+ dev->epmaxpacketin[epnum] = maxsize;
+ }
+}
+
+/*
+ * usb_enable_interface - Enable all the endpoints for an interface
+ * @dev: the device whose interface is being enabled
+ * @intf: pointer to the interface descriptor
+ *
+ * Enables all the endpoints for the interface's current altsetting.
+ */
+void usb_enable_interface(struct usb_device *dev,
+ struct usb_interface *intf)
+{
+ struct usb_host_interface *hintf =
+ &intf->altsetting[intf->act_altsetting];
+ int i;
+
+ for (i = 0; i < hintf->desc.bNumEndpoints; ++i)
+ usb_enable_endpoint(dev, &hintf->endpoint[i].desc);
+}
+
+/**
* usb_set_interface - Makes a particular alternate setting be current
* @dev: the device whose interface is being updated
* @interface: the interface being updated
@@ -795,9 +887,8 @@
int usb_set_interface(struct usb_device *dev, int interface, int alternate)
{
struct usb_interface *iface;
- struct usb_host_interface *iface_as;
- int i, ret;
- void (*disable)(struct usb_device *, int) = dev->bus->op->disable;
+ int ret;
+ int manual = 0;
iface = usb_ifnum_to_if(dev, interface);
if (!iface) {
@@ -805,22 +896,23 @@
return -EINVAL;
}
- /* 9.4.10 says devices don't need this, if the interface
- only has one alternate setting */
- if (iface->num_altsetting == 1) {
- dbg("ignoring set_interface for dev %d, iface %d, alt %d",
- dev->devnum, interface, alternate);
- return 0;
- }
-
if (alternate < 0 || alternate >= iface->num_altsetting)
return -EINVAL;
- if ((ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
+ ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
USB_REQ_SET_INTERFACE, USB_RECIP_INTERFACE,
iface->altsetting[alternate]
.desc.bAlternateSetting,
- interface, NULL, 0, HZ * 5)) < 0)
+ interface, NULL, 0, HZ * 5);
+
+ /* 9.4.10 says devices don't need this and are free to STALL the
+ * request if the interface only has one alternate setting.
+ */
+ if (ret == -EPIPE && iface->num_altsetting == 1) {
+ dbg("manual set_interface for dev %d, iface %d, alt %d",
+ dev->devnum, interface, alternate);
+ manual = 1;
+ } else if (ret < 0)
return ret;
/* FIXME drivers shouldn't need to replicate/bugfix the logic here
@@ -830,20 +922,32 @@
*/
/* prevent submissions using previous endpoint settings */
- iface_as = iface->altsetting + iface->act_altsetting;
- for (i = 0; i < iface_as->desc.bNumEndpoints; i++) {
- u8 ep = iface_as->endpoint [i].desc.bEndpointAddress;
- int out = !(ep & USB_DIR_IN);
-
- /* clear out hcd state, then usbcore state */
- if (disable)
- disable (dev, ep);
- ep &= USB_ENDPOINT_NUMBER_MASK;
- (out ? dev->epmaxpacketout : dev->epmaxpacketin ) [ep] = 0;
- }
+ usb_disable_interface(dev, iface);
+
iface->act_altsetting = alternate;
- /* 9.1.1.5: reset toggles for all endpoints affected by this iface-as
+ /* If the interface only has one altsetting and the device didn't
+ * accept the request, we attempt to carry out the equivalent action
+ * by manually clearing the HALT feature for each endpoint in the
+ * new altsetting.
+ */
+ if (manual) {
+ struct usb_host_interface *iface_as =
+ &iface->altsetting[alternate];
+ int i;
+
+ for (i = 0; i < iface_as->desc.bNumEndpoints; i++) {
+ unsigned int epaddr =
+ iface_as->endpoint[i].desc.bEndpointAddress;
+ unsigned int pipe =
+ __create_pipe(dev, USB_ENDPOINT_NUMBER_MASK & epaddr)
+ | (usb_endpoint_out(epaddr) ? USB_DIR_OUT : USB_DIR_IN);
+
+ usb_clear_halt(dev, pipe);
+ }
+ }
+
+ /* 9.1.1.5: reset toggles for all endpoints in the new altsetting
*
* Note:
* Despite EP0 is always present in all interfaces/AS, the list of
@@ -854,18 +958,7 @@
* during the SETUP stage - hence EP0 toggles are "don't care" here.
* (Likewise, EP0 never "halts" on well designed devices.)
*/
-
- iface_as = &iface->altsetting[alternate];
- for (i = 0; i < iface_as->desc.bNumEndpoints; i++) {
- u8 ep = iface_as->endpoint[i].desc.bEndpointAddress;
- int out = !(ep & USB_DIR_IN);
-
- ep &= USB_ENDPOINT_NUMBER_MASK;
- usb_settoggle (dev, ep, out, 0);
- (out ? dev->epmaxpacketout : dev->epmaxpacketin) [ep]
- = iface_as->endpoint [i].desc.wMaxPacketSize;
- usb_endpoint_running (dev, ep, out);
- }
+ usb_enable_interface(dev, iface);
return 0;
}
@@ -904,7 +997,6 @@
{
int i, ret;
struct usb_host_config *cp = NULL;
- void (*disable)(struct usb_device *, int) = dev->bus->op->disable;
for (i=0; i<dev->descriptor.bNumConfigurations; i++) {
if (dev->config[i].desc.bConfigurationValue == configuration) {
@@ -918,12 +1010,8 @@
}
/* if it's already configured, clear out old state first. */
- if (dev->state != USB_STATE_ADDRESS && disable) {
- for (i = 1 /* skip ep0 */; i < 15; i++) {
- disable (dev, i);
- disable (dev, USB_DIR_IN | i);
- }
- }
+ if (dev->state != USB_STATE_ADDRESS)
+ usb_disable_device (dev, 1); // Skip ep0
dev->toggle[0] = dev->toggle[1] = 0;
dev->halted[0] = dev->halted[1] = 0;
dev->state = USB_STATE_ADDRESS;
@@ -936,8 +1024,13 @@
dev->state = USB_STATE_CONFIGURED;
dev->actconfig = cp;
- /* reset more hc/hcd endpoint state */
- usb_set_maxpacket(dev);
+ /* reset more hc/hcd interface/endpoint state */
+ for (i = 0; i < cp->desc.bNumInterfaces; ++i) {
+ struct usb_interface *intf = cp->interface[i];
+
+ intf->act_altsetting = 0;
+ usb_enable_interface(dev, intf);
+ }
return 0;
}
diff -Nru a/drivers/usb/core/urb.c b/drivers/usb/core/urb.c
--- a/drivers/usb/core/urb.c Sun Aug 3 13:14:49 2003
+++ b/drivers/usb/core/urb.c Sun Aug 3 13:14:49 2003
@@ -379,24 +379,29 @@
* usb_unlink_urb - abort/cancel a transfer request for an endpoint
* @urb: pointer to urb describing a previously submitted request
*
- * This routine cancels an in-progress request. The requests's
- * completion handler will be called with a status code indicating
- * that the request has been canceled, and that control of the URB
- * has been returned to that device driver.
+ * This routine cancels an in-progress request. URBs complete only
+ * once per submission, and may be canceled only once per submission.
+ * Successful cancelation means the requests's completion handler will
+ * be called with a status code indicating that the request has been
+ * canceled (rather than any other code) and will quickly be removed
+ * from host controller data structures.
*
* When the URB_ASYNC_UNLINK transfer flag for the URB is clear, this
* request is synchronous. Success is indicated by returning zero,
- * at which time the urb will have been unlinked,
- * and the completion function will see status -ENOENT. Failure is
- * indicated by any other return value. This mode may not be used
+ * at which time the urb will have been unlinked and its completion
+ * handler will have been called with urb->status -ENOENT. Failure is
+ * indicated by any other return value.
+ *
+ * The synchronous cancelation mode may not be used
* when unlinking an urb from an interrupt context, such as a bottom
- * half or a completion handler,
+ * half or a completion handler; or when holding a spinlock; or in
+ * other cases when the caller can't schedule().
*
* When the URB_ASYNC_UNLINK transfer flag for the URB is set, this
* request is asynchronous. Success is indicated by returning -EINPROGRESS,
- * at which time the urb will normally not have been unlinked,
- * and the completion function will see status -ECONNRESET. Failure is
- * indicated by any other return value.
+ * at which time the urb will normally not have been unlinked.
+ * The completion function will see urb->status -ECONNRESET. Failure
+ * is indicated by any other return value.
*/
int usb_unlink_urb(struct urb *urb)
{
diff -Nru a/drivers/usb/core/usb-debug.c b/drivers/usb/core/usb-debug.c
--- a/drivers/usb/core/usb-debug.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/core/usb-debug.c Sun Aug 3 13:14:52 2003
@@ -37,7 +37,7 @@
usb_show_config_descriptor(&config->desc);
for (i = 0; i < config->desc.bNumInterfaces; i++) {
- ifp = config->interface + i;
+ ifp = config->interface[i];
if (!ifp)
break;
diff -Nru a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
--- a/drivers/usb/core/usb.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/core/usb.c Sun Aug 3 13:14:48 2003
@@ -80,25 +80,8 @@
static int usb_generic_driver_data;
-/* deallocate hcd/hardware state ... and nuke all pending urbs */
-static void nuke_urbs(struct usb_device *dev)
-{
- void (*disable)(struct usb_device *, int);
- int i;
-
- if (!dev || !dev->bus || !dev->bus->op || !dev->bus->op->disable)
- return;
- dbg("nuking urbs assigned to %s", dev->dev.bus_id);
-
- disable = dev->bus->op->disable;
- for (i = 0; i < 15; i++) {
- disable(dev, i);
- disable(dev, USB_DIR_IN | i);
- }
-}
-
/* needs to be called with BKL held */
-int usb_device_probe(struct device *dev)
+int usb_probe_interface(struct device *dev)
{
struct usb_interface * intf = to_usb_interface(dev);
struct usb_driver * driver = to_usb_driver(dev->driver);
@@ -123,25 +106,21 @@
return error;
}
-int usb_device_remove(struct device *dev)
+int usb_unbind_interface(struct device *dev)
{
- struct usb_interface *intf;
- struct usb_driver *driver;
-
- intf = list_entry(dev,struct usb_interface,dev);
- driver = to_usb_driver(dev->driver);
+ struct usb_interface *intf = to_usb_interface(dev);
+ struct usb_driver *driver = to_usb_driver(dev->driver);
down(&driver->serialize);
- /* release all urbs for this device */
- nuke_urbs(interface_to_usbdev(intf));
+ /* release all urbs for this interface */
+ usb_disable_interface(interface_to_usbdev(intf), intf);
if (intf->driver && intf->driver->disconnect)
intf->driver->disconnect(intf);
- /* if driver->disconnect didn't release the interface */
- if (intf->driver)
- usb_driver_release_interface(driver, intf);
+ /* force a release and re-initialize the interface */
+ usb_driver_release_interface(driver, intf);
up(&driver->serialize);
@@ -170,8 +149,8 @@
new_driver->driver.name = (char *)new_driver->name;
new_driver->driver.bus = &usb_bus_type;
- new_driver->driver.probe = usb_device_probe;
- new_driver->driver.remove = usb_device_remove;
+ new_driver->driver.probe = usb_probe_interface;
+ new_driver->driver.remove = usb_unbind_interface;
init_MUTEX(&new_driver->serialize);
@@ -229,9 +208,9 @@
int i;
for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++)
- if (dev->actconfig->interface[i].altsetting[0]
+ if (dev->actconfig->interface[i]->altsetting[0]
.desc.bInterfaceNumber == ifnum)
- return &dev->actconfig->interface[i];
+ return dev->actconfig->interface[i];
return NULL;
}
@@ -256,14 +235,14 @@
int i, j, k;
for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++)
- for (j = 0; j < dev->actconfig->interface[i].num_altsetting; j++)
- for (k = 0; k < dev->actconfig->interface[i]
- .altsetting[j].desc.bNumEndpoints; k++)
- if (epnum == dev->actconfig->interface[i]
- .altsetting[j].endpoint[k]
+ for (j = 0; j < dev->actconfig->interface[i]->num_altsetting; j++)
+ for (k = 0; k < dev->actconfig->interface[i]->
+ altsetting[j].desc.bNumEndpoints; k++)
+ if (epnum == dev->actconfig->interface[i]->
+ altsetting[j].endpoint[k]
.desc.bEndpointAddress)
- return &dev->actconfig->interface[i]
- .altsetting[j].endpoint[k]
+ return &dev->actconfig->interface[i]->
+ altsetting[j].endpoint[k]
.desc;
return NULL;
@@ -325,24 +304,31 @@
* usb_driver_release_interface - unbind a driver from an interface
* @driver: the driver to be unbound
* @iface: the interface from which it will be unbound
+ *
+ * In addition to unbinding the driver, this re-initializes the interface
+ * by selecting altsetting 0, the default alternate setting.
*
- * This should be used by drivers to release their claimed interfaces.
- * It is normally called in their disconnect() methods, and only for
- * drivers that bound to more than one interface in their probe().
+ * This can be used by drivers to release an interface without waiting
+ * for their disconnect() methods to be called.
*
* When the USB subsystem disconnect()s a driver from some interface,
* it automatically invokes this method for that interface. That
* means that even drivers that used usb_driver_claim_interface()
* usually won't need to call this.
+ *
+ * This call is synchronous, and may not be used in an interrupt context.
*/
void usb_driver_release_interface(struct usb_driver *driver, struct usb_interface *iface)
{
/* this should never happen, don't release something that's not ours */
- if (!iface || iface->driver != driver)
+ if (iface->driver && iface->driver != driver)
return;
iface->driver = NULL;
usb_set_intfdata(iface, NULL);
+ usb_set_interface(interface_to_usbdev(iface),
+ iface->altsetting[0].desc.bInterfaceNumber,
+ 0);
}
/**
@@ -654,6 +640,26 @@
#endif /* CONFIG_HOTPLUG */
/**
+ * usb_release_dev - free a usb device structure when all users of it are finished.
+ * @dev: device that's been disconnected
+ *
+ * Will be called only by the device core when all users of this usb device are
+ * done.
+ */
+static void usb_release_dev(struct device *dev)
+{
+ struct usb_device *udev;
+
+ udev = to_usb_device(dev);
+
+ if (udev->bus && udev->bus->op && udev->bus->op->deallocate)
+ udev->bus->op->deallocate(udev);
+ usb_destroy_configuration(udev);
+ usb_bus_put(udev->bus);
+ kfree (udev);
+}
+
+/**
* usb_alloc_dev - allocate a usb device structure (usbcore-internal)
* @parent: hub to which device is connected
* @bus: bus used to access the device
@@ -681,6 +687,7 @@
}
device_initialize(&dev->dev);
+ dev->dev.release = usb_release_dev;
dev->state = USB_STATE_ATTACHED;
if (!parent)
@@ -736,27 +743,6 @@
put_device(&dev->dev);
}
-/**
- * usb_release_dev - free a usb device structure when all users of it are finished.
- * @dev: device that's been disconnected
- *
- * Will be called only by the device core when all users of this usb device are
- * done.
- */
-static void usb_release_dev(struct device *dev)
-{
- struct usb_device *udev;
-
- udev = to_usb_device(dev);
-
- if (udev->bus && udev->bus->op && udev->bus->op->deallocate)
- udev->bus->op->deallocate(udev);
- usb_destroy_configuration (udev);
- usb_bus_put (udev->bus);
- kfree (udev);
-}
-
-
static struct usb_device *match_device(struct usb_device *dev,
u16 vendor_id, u16 product_id)
{
@@ -917,7 +903,7 @@
}
/* deallocate hcd/hardware state ... and nuke all pending urbs */
- nuke_urbs(dev);
+ usb_disable_device(dev, 0);
/* disconnect() drivers from interfaces (a key side effect) */
dev_dbg (&dev->dev, "unregistering interfaces\n");
@@ -926,7 +912,7 @@
struct usb_interface *interface;
/* remove this interface */
- interface = &dev->actconfig->interface[i];
+ interface = dev->actconfig->interface[i];
device_unregister(&interface->dev);
}
}
@@ -945,25 +931,21 @@
}
/**
- * usb_connect - pick device address (usbcore-internal)
+ * usb_choose_address - pick device address (usbcore-internal)
* @dev: newly detected device (in DEFAULT state)
*
* Picks a device address. It's up to the hub (or root hub) driver
* to handle and manage enumeration, starting from the DEFAULT state.
- * Only hub drivers (including virtual root hub drivers for host
+ * Only hub drivers (but not virtual root hub drivers for host
* controllers) should ever call this.
*/
-void usb_connect(struct usb_device *dev)
+void usb_choose_address(struct usb_device *dev)
{
int devnum;
// FIXME needs locking for SMP!!
/* why? this is called only from the hub thread,
* which hopefully doesn't run on multiple CPU's simultaneously 8-)
- * ... it's also called from modprobe/rmmod/apmd threads as part
- * of virtual root hub init/reinit. In the init case, the hub code
- * won't have seen this, but not so for reinit ...
*/
- dev->descriptor.bMaxPacketSize0 = 8; /* Start off at 8 bytes */
/* Try to allocate the next devnum beginning at bus->devnum_next. */
devnum = find_next_zero_bit(dev->bus->devmap.devicemap, 128, dev->bus->devnum_next);
@@ -1090,7 +1072,6 @@
dev->dev.parent = parent;
dev->dev.driver = &usb_generic_driver;
dev->dev.bus = &usb_bus_type;
- dev->dev.release = usb_release_dev;
dev->dev.driver_data = &usb_generic_driver_data;
usb_get_dev(dev);
if (dev->dev.bus_id[0] == 0)
@@ -1216,7 +1197,7 @@
/* Register all of the interfaces for this device with the driver core.
* Remember, interfaces get bound to drivers, not devices. */
for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
- struct usb_interface *interface = &dev->actconfig->interface[i];
+ struct usb_interface *interface = dev->actconfig->interface[i];
struct usb_interface_descriptor *desc;
desc = &interface->altsetting [interface->act_altsetting].desc;
@@ -1591,9 +1572,6 @@
EXPORT_SYMBOL(usb_deregister);
EXPORT_SYMBOL(usb_disabled);
-EXPORT_SYMBOL(usb_device_probe);
-EXPORT_SYMBOL(usb_device_remove);
-
EXPORT_SYMBOL(usb_alloc_dev);
EXPORT_SYMBOL(usb_put_dev);
EXPORT_SYMBOL(usb_get_dev);
@@ -1608,7 +1586,6 @@
EXPORT_SYMBOL(usb_new_device);
EXPORT_SYMBOL(usb_reset_device);
-EXPORT_SYMBOL(usb_connect);
EXPORT_SYMBOL(usb_disconnect);
EXPORT_SYMBOL(__usb_get_extra_descriptor);
diff -Nru a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
--- a/drivers/usb/core/usb.h Sun Aug 3 13:14:46 2003
+++ b/drivers/usb/core/usb.h Sun Aug 3 13:14:46 2003
@@ -2,4 +2,15 @@
extern void usb_create_driverfs_dev_files (struct usb_device *dev);
extern void usb_create_driverfs_intf_files (struct usb_interface *intf);
+extern int usb_probe_interface (struct device *dev);
+extern int usb_unbind_interface (struct device *dev);
+extern void usb_disable_endpoint (struct usb_device *dev, unsigned int epaddr);
+extern void usb_disable_interface (struct usb_device *dev,
+ struct usb_interface *intf);
+extern void usb_disable_device (struct usb_device *dev, int skip_ep0);
+
+extern void usb_enable_endpoint (struct usb_device *dev,
+ struct usb_endpoint_descriptor *epd);
+extern void usb_enable_interface (struct usb_device *dev,
+ struct usb_interface *intf);
diff -Nru a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c
--- a/drivers/usb/gadget/net2280.c Sun Aug 3 13:14:45 2003
+++ b/drivers/usb/gadget/net2280.c Sun Aug 3 13:14:45 2003
@@ -2664,7 +2664,7 @@
/*-------------------------------------------------------------------------*/
-static struct pci_device_id __devinitdata pci_ids [] = { {
+static struct pci_device_id pci_ids [] = { {
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
.class_mask = ~0,
.vendor = 0x17cc,
diff -Nru a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
--- a/drivers/usb/host/ehci-dbg.c Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/host/ehci-dbg.c Sun Aug 3 13:14:51 2003
@@ -476,28 +476,53 @@
do {
switch (tag) {
case Q_TYPE_QH:
- temp = snprintf (next, size, " qh%d/%p",
- p.qh->period, p.qh);
+ temp = snprintf (next, size, " qh%d-%04x/%p",
+ p.qh->period,
+ le32_to_cpup (&p.qh->hw_info2)
+ /* uframe masks */
+ & 0xffff,
+ p.qh);
size -= temp;
next += temp;
+ /* don't repeat what follows this qh */
for (temp = 0; temp < seen_count; temp++) {
- if (seen [temp].ptr == p.ptr)
- break;
+ if (seen [temp].ptr != p.ptr)
+ continue;
+ if (p.qh->qh_next.ptr)
+ temp = snprintf (next, size,
+ " ...");
+ p.ptr = 0;
+ break;
}
/* show more info the first time around */
if (temp == seen_count) {
u32 scratch = cpu_to_le32p (
&p.qh->hw_info1);
+ struct ehci_qtd *qtd;
+ char *type = "";
+
+ /* count tds, get ep direction */
+ temp = 0;
+ list_for_each_entry (qtd,
+ &p.qh->qtd_list,
+ qtd_list) {
+ temp++;
+ switch (0x03 & (le32_to_cpu (
+ qtd->hw_token) >> 8)) {
+ case 0: type = "out"; continue;
+ case 1: type = "in"; continue;
+ }
+ }
temp = snprintf (next, size,
- " (%cs dev%d ep%d [%d/%d] %d)",
+ " (%c%d ep%d%s "
+ "[%d/%d] q%d p%d)",
speed_char (scratch),
scratch & 0x007f,
- (scratch >> 8) & 0x000f,
+ (scratch >> 8) & 0x000f, type,
p.qh->usecs, p.qh->c_usecs,
+ temp,
0x7ff & (scratch >> 16));
-
- /* FIXME TD info too */
if (seen_count < DBG_SCHED_LIMIT)
seen [seen_count++].qh = p.qh;
diff -Nru a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
--- a/drivers/usb/host/ehci-hcd.c Sun Aug 3 13:14:50 2003
+++ b/drivers/usb/host/ehci-hcd.c Sun Aug 3 13:14:50 2003
@@ -318,27 +318,21 @@
/* called by khubd or root hub init threads */
-static int ehci_start (struct usb_hcd *hcd)
+static int ehci_hc_reset (struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
u32 temp;
- struct usb_device *udev;
- struct usb_bus *bus;
- int retval;
- u32 hcc_params;
- u8 tempbyte;
spin_lock_init (&ehci->lock);
ehci->caps = (struct ehci_caps *) hcd->regs;
- ehci->regs = (struct ehci_regs *) (hcd->regs + ehci->caps->length);
- dbg_hcs_params (ehci, "ehci_start");
- dbg_hcc_params (ehci, "ehci_start");
-
- hcc_params = readl (&ehci->caps->hcc_params);
+ ehci->regs = (struct ehci_regs *) (hcd->regs +
+ readb (&ehci->caps->length));
+ dbg_hcs_params (ehci, "reset");
+ dbg_hcc_params (ehci, "reset");
/* EHCI 0.96 and later may have "extended capabilities" */
- temp = HCC_EXT_CAPS (hcc_params);
+ temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
while (temp) {
u32 cap;
@@ -363,8 +357,18 @@
ehci->hcs_params = readl (&ehci->caps->hcs_params);
/* force HC to halt state */
- if ((retval = ehci_halt (ehci)) != 0)
- return retval;
+ return ehci_halt (ehci);
+}
+
+static int ehci_start (struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci (hcd);
+ u32 temp;
+ struct usb_device *udev;
+ struct usb_bus *bus;
+ int retval;
+ u32 hcc_params;
+ u8 tempbyte;
/*
* hw default: 1K periodic list heads, one per frame.
@@ -375,6 +379,7 @@
return retval;
/* controllers may cache some of the periodic schedule ... */
+ hcc_params = readl (&ehci->caps->hcc_params);
if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
ehci->i_thresh = 8;
else // N microframes cached
@@ -496,7 +501,6 @@
* Before this point the HC was idle/ready. After, khubd
* and device drivers may start it running.
*/
- usb_connect (udev);
udev->speed = USB_SPEED_HIGH;
if (hcd_register_root (hcd) != 0) {
if (hcd->state == USB_STATE_RUNNING)
@@ -937,6 +941,7 @@
/*
* basic lifecycle operations
*/
+ .reset = ehci_hc_reset,
.start = ehci_start,
#ifdef CONFIG_PM
.suspend = ehci_suspend,
@@ -974,7 +979,7 @@
/* EHCI spec says PCI is required. */
/* PCI driver selection metadata; PCI hotplugging uses this */
-static struct pci_device_id __devinitdata pci_ids [] = { {
+static struct pci_device_id pci_ids [] = { {
/* handle any USB 2.0 EHCI controller */
diff -Nru a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
--- a/drivers/usb/host/ehci-q.c Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/host/ehci-q.c Sun Aug 3 13:14:51 2003
@@ -161,16 +161,18 @@
usb_endpoint_halt (urb->dev,
usb_pipeendpoint (pipe),
usb_pipeout (pipe));
- if (urb->dev->tt && !usb_pipeint (pipe)) {
+
+ /* if async CSPLIT failed, try cleaning out the TT buffer */
+ } else if (urb->dev->tt && !usb_pipeint (urb->pipe)
+ && QTD_CERR(token) == 0) {
#ifdef DEBUG
- struct usb_device *tt = urb->dev->tt->hub;
- dbg ("clear tt %s-%s p%d buffer, a%d ep%d",
- tt->bus->bus_name, tt->devpath,
- urb->dev->ttport, urb->dev->devnum,
- usb_pipeendpoint (pipe));
+ struct usb_device *tt = urb->dev->tt->hub;
+ dev_dbg (&tt->dev,
+ "clear tt buffer port %d, a%d ep%d t%08x\n",
+ urb->dev->ttport, urb->dev->devnum,
+ usb_pipeendpoint (urb->pipe), token);
#endif /* DEBUG */
- usb_hub_tt_clear_buffer (urb->dev, pipe);
- }
+ usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
}
}
}
diff -Nru a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
--- a/drivers/usb/host/ehci-sched.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/host/ehci-sched.c Sun Aug 3 13:14:47 2003
@@ -397,7 +397,7 @@
if (status == 0)
break;
}
- } while (status && --frame);
+ } while (status && frame--);
if (status)
goto done;
qh->start = frame;
diff -Nru a/drivers/usb/host/hc_sl811_rh.c b/drivers/usb/host/hc_sl811_rh.c
--- a/drivers/usb/host/hc_sl811_rh.c Sun Aug 3 13:14:50 2003
+++ b/drivers/usb/host/hc_sl811_rh.c Sun Aug 3 13:14:50 2003
@@ -564,7 +564,10 @@
return -ENOMEM;
hci->bus->root_hub = usb_dev;
- usb_connect (usb_dev);
+ usb_dev->devnum = 1;
+ usb_dev->bus->devnum_next = usb_dev->devnum + 1;
+ set_bit (usb_dev->devnum, usb_dev->bus->devmap.devicemap);
+
if (usb_new_device (usb_dev) != 0) {
usb_put_dev (usb_dev);
return -ENODEV;
diff -Nru a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
--- a/drivers/usb/host/ohci-hcd.c Sun Aug 3 13:14:45 2003
+++ b/drivers/usb/host/ohci-hcd.c Sun Aug 3 13:14:45 2003
@@ -538,7 +538,6 @@
return -ENOMEM;
}
- usb_connect (udev);
udev->speed = USB_SPEED_FULL;
if (hcd_register_root (&ohci->hcd) != 0) {
usb_put_dev (udev);
diff -Nru a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
--- a/drivers/usb/host/ohci-pci.c Sun Aug 3 13:14:50 2003
+++ b/drivers/usb/host/ohci-pci.c Sun Aug 3 13:14:50 2003
@@ -351,7 +351,7 @@
/*-------------------------------------------------------------------------*/
-static const struct pci_device_id __devinitdata pci_ids [] = { {
+static const struct pci_device_id pci_ids [] = { {
/* handle any USB OHCI controller */
.class = (PCI_CLASS_SERIAL_USB << 8) | 0x10,
diff -Nru a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
--- a/drivers/usb/host/uhci-hcd.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/host/uhci-hcd.c Sun Aug 3 13:14:52 2003
@@ -2346,7 +2346,6 @@
/* disable legacy emulation */
pci_write_config_word(hcd->pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
- usb_connect(udev);
udev->speed = USB_SPEED_FULL;
if (usb_register_root_hub(udev, &hcd->pdev->dev) != 0) {
@@ -2503,7 +2502,7 @@
.hub_control = uhci_hub_control,
};
-static const struct pci_device_id __devinitdata uhci_pci_ids[] = { {
+static const struct pci_device_id uhci_pci_ids[] = { {
/* handle any USB UHCI controller */
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0x00),
diff -Nru a/drivers/usb/image/scanner.c b/drivers/usb/image/scanner.c
--- a/drivers/usb/image/scanner.c Sun Aug 3 13:14:46 2003
+++ b/drivers/usb/image/scanner.c Sun Aug 3 13:14:46 2003
@@ -847,7 +847,7 @@
down (&(scn->sem));
usb_driver_release_interface(&scanner_driver,
- &scn->scn_dev->actconfig->interface[scn->ifnum]);
+ scn->scn_dev->actconfig->interface[scn->ifnum]);
kfree(scn->ibuf);
kfree(scn->obuf);
diff -Nru a/drivers/usb/input/aiptek.c b/drivers/usb/input/aiptek.c
--- a/drivers/usb/input/aiptek.c Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/input/aiptek.c Sun Aug 3 13:14:51 2003
@@ -367,10 +367,12 @@
static int __init
aiptek_init(void)
{
- usb_register(&aiptek_driver);
- info(DRIVER_VERSION " " DRIVER_AUTHOR);
- info(DRIVER_DESC);
- return 0;
+ int result = usb_register(&aiptek_driver);
+ if (result == 0) {
+ info(DRIVER_VERSION " " DRIVER_AUTHOR);
+ info(DRIVER_DESC);
+ }
+ return result;
}
static void __exit
diff -Nru a/drivers/usb/input/usbkbd.c b/drivers/usb/input/usbkbd.c
--- a/drivers/usb/input/usbkbd.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/input/usbkbd.c Sun Aug 3 13:14:52 2003
@@ -366,9 +366,10 @@
static int __init usb_kbd_init(void)
{
- usb_register(&usb_kbd_driver);
- info(DRIVER_VERSION ":" DRIVER_DESC);
- return 0;
+ int result = usb_register(&usb_kbd_driver);
+ if (result == 0)
+ info(DRIVER_VERSION ":" DRIVER_DESC);
+ return result;
}
static void __exit usb_kbd_exit(void)
diff -Nru a/drivers/usb/input/usbmouse.c b/drivers/usb/input/usbmouse.c
--- a/drivers/usb/input/usbmouse.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/input/usbmouse.c Sun Aug 3 13:14:52 2003
@@ -247,9 +247,10 @@
static int __init usb_mouse_init(void)
{
- usb_register(&usb_mouse_driver);
- info(DRIVER_VERSION ":" DRIVER_DESC);
- return 0;
+ int retval = usb_register(&usb_mouse_driver);
+ if (retval == 0)
+ info(DRIVER_VERSION ":" DRIVER_DESC);
+ return retval;
}
static void __exit usb_mouse_exit(void)
diff -Nru a/drivers/usb/input/wacom.c b/drivers/usb/input/wacom.c
--- a/drivers/usb/input/wacom.c Sun Aug 3 13:14:44 2003
+++ b/drivers/usb/input/wacom.c Sun Aug 3 13:14:44 2003
@@ -629,9 +629,10 @@
static int __init wacom_init(void)
{
- usb_register(&wacom_driver);
- info(DRIVER_VERSION ":" DRIVER_DESC);
- return 0;
+ int result = usb_register(&wacom_driver);
+ if (result == 0)
+ info(DRIVER_VERSION ":" DRIVER_DESC);
+ return result;
}
static void __exit wacom_exit(void)
diff -Nru a/drivers/usb/input/xpad.c b/drivers/usb/input/xpad.c
--- a/drivers/usb/input/xpad.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/input/xpad.c Sun Aug 3 13:14:48 2003
@@ -342,9 +342,10 @@
static int __init usb_xpad_init(void)
{
- usb_register(&xpad_driver);
- info(DRIVER_DESC ":" DRIVER_VERSION);
- return 0;
+ int result = usb_register(&xpad_driver);
+ if (result == 0)
+ info(DRIVER_DESC ":" DRIVER_VERSION);
+ return result;
}
static void __exit usb_xpad_exit(void)
diff -Nru a/drivers/usb/media/ibmcam.c b/drivers/usb/media/ibmcam.c
--- a/drivers/usb/media/ibmcam.c Sun Aug 3 13:14:46 2003
+++ b/drivers/usb/media/ibmcam.c Sun Aug 3 13:14:46 2003
@@ -3718,7 +3718,7 @@
} while (0);
/* Validate found interface: must have one ISO endpoint */
- nas = dev->actconfig->interface[ifnum].num_altsetting;
+ nas = dev->actconfig->interface[ifnum]->num_altsetting;
if (debug > 0)
info("Number of alternate settings=%d.", nas);
if (nas < 2) {
@@ -3730,7 +3730,7 @@
const struct usb_host_interface *interface;
const struct usb_endpoint_descriptor *endpoint;
- interface = &dev->actconfig->interface[ifnum].altsetting[i];
+ interface = &dev->actconfig->interface[ifnum]->altsetting[i];
if (interface->desc.bNumEndpoints != 1) {
err("Interface %d. has %u. endpoints!",
ifnum, (unsigned)(interface->desc.bNumEndpoints));
diff -Nru a/drivers/usb/media/konicawc.c b/drivers/usb/media/konicawc.c
--- a/drivers/usb/media/konicawc.c Sun Aug 3 13:14:44 2003
+++ b/drivers/usb/media/konicawc.c Sun Aug 3 13:14:44 2003
@@ -383,7 +383,7 @@
int pktsz;
struct usb_host_interface *interface;
- interface = &dev->actconfig->interface[uvd->iface].altsetting[spd_to_iface[cam->speed]];
+ interface = &dev->actconfig->interface[uvd->iface]->altsetting[spd_to_iface[cam->speed]];
pktsz = interface->endpoint[1].desc.wMaxPacketSize;
DEBUG(1, "pktsz = %d", pktsz);
if (!CAMERA_IS_OPERATIONAL(uvd)) {
diff -Nru a/drivers/usb/media/ov511.c b/drivers/usb/media/ov511.c
--- a/drivers/usb/media/ov511.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/media/ov511.c Sun Aug 3 13:14:47 2003
@@ -6088,7 +6088,7 @@
if (ov->bridge == BRG_OV518)
{
- struct usb_interface *ifp = &ov->dev->config[0].interface[0];
+ struct usb_interface *ifp = ov->dev->config[0].interface[0];
__u16 mxps = ifp->altsetting[7].endpoint[0].desc.wMaxPacketSize;
/* Some OV518s have packet numbering by default, some don't */
diff -Nru a/drivers/usb/media/pwc-ctrl.c b/drivers/usb/media/pwc-ctrl.c
--- a/drivers/usb/media/pwc-ctrl.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/media/pwc-ctrl.c Sun Aug 3 13:14:52 2003
@@ -1,7 +1,7 @@
/* Driver for Philips webcam
Functions that send various control messages to the webcam, including
video modes.
- (C) 1999-2002 Nemosoft Unv. (webcam@smcc.demon.nl)
+ (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -452,7 +452,7 @@
pdev->view.x = width;
pdev->view.y = height;
pwc_set_image_buffer_size(pdev);
- Trace(TRACE_SIZE, "Set viewport to %dx%d, image size is %dx%d, palette = %d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y, pdev->vpalette);
+ Trace(TRACE_SIZE, "Set viewport to %dx%d, image size is %dx%d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y);
return 0;
}
@@ -461,38 +461,8 @@
{
int factor, i, filler = 0;
- switch(pdev->vpalette) {
- case VIDEO_PALETTE_RGB32 | 0x80:
- case VIDEO_PALETTE_RGB32:
- factor = 16;
- filler = 0;
- break;
- case VIDEO_PALETTE_RGB24 | 0x80:
- case VIDEO_PALETTE_RGB24:
- factor = 12;
- filler = 0;
- break;
- case VIDEO_PALETTE_YUYV:
- case VIDEO_PALETTE_YUV422:
- factor = 8;
- filler = 128;
- break;
- case VIDEO_PALETTE_YUV420:
- case VIDEO_PALETTE_YUV420P:
- factor = 6;
- filler = 128;
- break;
-#if PWC_DEBUG
- case VIDEO_PALETTE_RAW:
- pdev->image.size = pdev->frame_size;
- pdev->view.size = pdev->frame_size;
- return;
- break;
-#endif
- default:
- factor = 0;
- break;
- }
+ factor = 6;
+ filler = 128;
/* Set sizes in bytes */
pdev->image.size = pdev->image.x * pdev->image.y * factor / 4;
@@ -1355,7 +1325,7 @@
{
struct pwc_probe *probe = arg;
- strcpy(probe->name, pdev->vdev->name);
+ strcpy(probe->name, pdev->vdev.name);
probe->type = pdev->type;
break;
}
diff -Nru a/drivers/usb/media/pwc-if.c b/drivers/usb/media/pwc-if.c
--- a/drivers/usb/media/pwc-if.c Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/media/pwc-if.c Sun Aug 3 13:14:51 2003
@@ -1,6 +1,6 @@
/* Linux driver for Philips webcam
USB and Video4Linux interface part.
- (C) 1999-2002 Nemosoft Unv.
+ (C) 1999-2003 Nemosoft Unv.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -74,14 +74,21 @@
{ USB_DEVICE(0x0471, 0x0310) },
{ USB_DEVICE(0x0471, 0x0311) },
{ USB_DEVICE(0x0471, 0x0312) },
+ { USB_DEVICE(0x0471, 0x0313) }, /* the 'new' 720K */
{ USB_DEVICE(0x069A, 0x0001) }, /* Askey */
- { USB_DEVICE(0x046D, 0x08b0) }, /* Logitech QuickCam Pro 3000 */
- { USB_DEVICE(0x046D, 0x08b1) }, /* Logitech QuickCam Notebook Pro */
- { USB_DEVICE(0x046D, 0x08b2) }, /* Logitech QuickCam Pro 4000 */
- { USB_DEVICE(0x046D, 0x08b3) }, /* Logitech QuickCam Zoom */
+ { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam Pro 3000 */
+ { USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */
+ { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam Pro 4000 */
+ { USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom */
+ { USB_DEVICE(0x046D, 0x08B4) }, /* Logitech (reserved) */
+ { USB_DEVICE(0x046D, 0x08B5) }, /* Logitech (reserved) */
+ { USB_DEVICE(0x046D, 0x08B6) }, /* Logitech (reserved) */
+ { USB_DEVICE(0x046D, 0x08B7) }, /* Logitech (reserved) */
+ { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech (reserved) */
{ USB_DEVICE(0x055D, 0x9000) }, /* Samsung */
{ USB_DEVICE(0x055D, 0x9001) },
{ USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */
+ { USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */
{ USB_DEVICE(0x04CC, 0x8116) }, /* Afina Eye */
{ USB_DEVICE(0x0d81, 0x1910) }, /* Visionite */
{ USB_DEVICE(0x0d81, 0x1900) },
@@ -100,11 +107,11 @@
.disconnect = usb_pwc_disconnect, /* disconnect() */
};
-#define MAX_DEV_HINTS 10
+#define MAX_DEV_HINTS 20
+#define MAX_ISOC_ERRORS 20
static int default_size = PSZ_QCIF;
static int default_fps = 10;
-static int default_palette = VIDEO_PALETTE_YUV420P; /* This format is understood by most tools */
static int default_fbufs = 3; /* Default number of frame buffers */
static int default_mbufs = 2; /* Default number of mmap() buffers */
int pwc_trace = TRACE_MODULE | TRACE_FLOW | TRACE_PWCX;
@@ -118,9 +125,6 @@
struct pwc_device *pdev;
} device_hint[MAX_DEV_HINTS];
-static struct semaphore mem_lock;
-static void *mem_leak = NULL; /* For delayed kfree()s. See below */
-
/***/
static int pwc_video_open(struct inode *inode, struct file *file);
@@ -385,50 +389,50 @@
the user program. The first scheme involves the ISO buffers (called thus
since they transport ISO data from the USB controller), and not really
interesting. Suffices to say the data from this buffer is quickly
- gathered in an interrupt handler (pwc_isoc_handler) and placed into the
+ gathered in an interrupt handler (pwc_isoc_handler) and placed into the
frame buffer.
-
+
The frame buffer is the second scheme, and is the central element here.
It collects the data from a single frame from the camera (hence, the
name). Frames are delimited by the USB camera with a short USB packet,
so that's easy to detect. The frame buffers form a list that is filled
- by the camera+USB controller and drained by the user process through
+ by the camera+USB controller and drained by the user process through
either read() or mmap().
-
+
The image buffer is the third scheme, in which frames are decompressed
- and possibly converted into planar format. For mmap() there is more than
+ and converted into planar format. For mmap() there is more than
one image buffer available.
- The frame buffers provide the image buffering, in case the user process
- is a bit slow. This introduces lag and some undesired side-effects.
- The problem arises when the frame buffer is full. I used to drop the last
- frame, which makes the data in the queue stale very quickly. But dropping
+ The frame buffers provide the image buffering. In case the user process
+ is a bit slow, this introduces lag and some undesired side-effects.
+ The problem arises when the frame buffer is full. I used to drop the last
+ frame, which makes the data in the queue stale very quickly. But dropping
the frame at the head of the queue proved to be a litte bit more difficult.
I tried a circular linked scheme, but this introduced more problems than
it solved.
Because filling and draining are completely asynchronous processes, this
requires some fiddling with pointers and mutexes.
-
+
Eventually, I came up with a system with 2 lists: an 'empty' frame list
and a 'full' frame list:
* Initially, all frame buffers but one are on the 'empty' list; the one
remaining buffer is our initial fill frame.
- * If a frame is needed for filling, we take it from the 'empty' list,
- unless that list is empty, in which case we take the buffer at the
- head of the 'full' list.
- * When our fill buffer has been filled, it is appended to the 'full'
+ * If a frame is needed for filling, we try to take it from the 'empty'
+ list, unless that list is empty, in which case we take the buffer at
+ the head of the 'full' list.
+ * When our fill buffer has been filled, it is appended to the 'full'
list.
- * If a frame is needed by read() or mmap(), it is taken from the head of
+ * If a frame is needed by read() or mmap(), it is taken from the head of
the 'full' list, handled, and then appended to the 'empty' list. If no
buffer is present on the 'full' list, we wait.
The advantage is that the buffer that is currently being decompressed/
- converted, is on neither list, and thus not in our way (any other scheme
+ converted, is on neither list, and thus not in our way (any other scheme
I tried had the problem of old data lingering in the queue).
Whatever strategy you choose, it always remains a tradeoff: with more
frame buffers the chances of a missed frame are reduced. On the other
- hand, on slower machines it introduces lag because the queue will
+ hand, on slower machines it introduces lag because the queue will
always be full.
*/
@@ -456,11 +460,11 @@
if (pdev->empty_frames != NULL) {
/* We have empty frames available. That's easy */
pdev->fill_frame = pdev->empty_frames;
- pdev->empty_frames = pdev->empty_frames->next;
+ pdev->empty_frames = pdev->empty_frames->next;
}
else {
/* Hmm. Take it from the full list */
-#if PWC_DEBUG
+#if PWC_DEBUG
/* sanity check */
if (pdev->full_frames == NULL) {
Err("Neither empty or full frames available!\n");
@@ -480,10 +484,10 @@
spin_unlock_irqrestore(&pdev->ptrlock, flags);
return ret;
}
-
+
/**
- \brief Reset all buffers, pointers and lists, except for the image_used[] buffer.
+ \brief Reset all buffers, pointers and lists, except for the image_used[] buffer.
If the image_used[] buffer is cleared too, mmap()/VIDIOCSYNC will run into trouble.
*/
@@ -568,7 +572,7 @@
}
/**
- \brief Advance pointers of image buffer (after each user request)
+ \brief Advance pointers of image buffer (after each user request)
*/
static inline void pwc_next_image(struct pwc_device *pdev)
{
@@ -576,23 +580,6 @@
pdev->fill_image = (pdev->fill_image + 1) % default_mbufs;
}
-/* 2002-10-11: YUV420P is the only palette remaining. */
-static int pwc_set_palette(struct pwc_device *pdev, int pal)
-{
- if ( pal == VIDEO_PALETTE_YUV420P
-#if PWC_DEBUG
- || pal == VIDEO_PALETTE_RAW
-#endif
- ) {
- pdev->vpalette = pal;
- pwc_set_image_buffer_size(pdev);
- return 0;
- }
- Trace(TRACE_READ, "Palette %d not supported.\n", pal);
- return -1;
-}
-
-
/* This gets called for the Isochronous pipe (video). This is done in
* interrupt time, so it has to be fast, not crash, and not stall. Neat.
@@ -603,14 +590,15 @@
int i, fst, flen;
int awake;
struct pwc_frame_buf *fbuf;
- unsigned char *fillptr, *iso_buf;
+ unsigned char *fillptr = 0, *iso_buf = 0;
+ awake = 0;
pdev = (struct pwc_device *)urb->context;
if (pdev == NULL) {
Err("isoc_handler() called with NULL device?!\n");
return;
}
-#ifdef PWC_MAGIC
+#ifdef PWC_MAGIC
if (pdev->magic != PWC_MAGIC) {
Err("isoc_handler() called with bad magic!\n");
return;
@@ -621,33 +609,47 @@
return;
}
if (urb->status != -EINPROGRESS && urb->status != 0) {
- char *errmsg;
-
+ const char *errmsg;
+
errmsg = "Unknown";
switch(urb->status) {
case -ENOSR: errmsg = "Buffer error (overrun)"; break;
case -EPIPE: errmsg = "Stalled (device not responding)"; break;
case -EOVERFLOW: errmsg = "Babble (bad cable?)"; break;
case -EPROTO: errmsg = "Bit-stuff error (bad cable?)"; break;
- case -EILSEQ: errmsg = "CRC/Timeout"; break;
+ case -EILSEQ: errmsg = "CRC/Timeout (could be anything)"; break;
case -ETIMEDOUT: errmsg = "NAK (device does not respond)"; break;
}
Trace(TRACE_FLOW, "pwc_isoc_handler() called with status %d [%s].\n", urb->status, errmsg);
- return;
+ /* Give up after a number of contiguous errors on the USB bus.
+ Appearantly something is wrong so we simulate an unplug event.
+ */
+ if (++pdev->visoc_errors > MAX_ISOC_ERRORS)
+ {
+ Info("Too many ISOC errors, bailing out.\n");
+ pdev->error_status = EIO;
+ awake = 1;
+ wake_up_interruptible(&pdev->frameq);
+ }
+ goto handler_end; // ugly, but practical
}
fbuf = pdev->fill_frame;
if (fbuf == NULL) {
Err("pwc_isoc_handler without valid fill frame.\n");
- wake_up_interruptible(&pdev->frameq);
- return;
+ awake = 1;
+ goto handler_end;
}
- fillptr = fbuf->data + fbuf->filled;
- awake = 0;
+ else {
+ fillptr = fbuf->data + fbuf->filled;
+ }
+
+ /* Reset ISOC error counter. We did get here, after all. */
+ pdev->visoc_errors = 0;
/* vsync: 0 = don't copy data
1 = sync-hunt
- 2 = synched
+ 2 = synched
*/
/* Compact data */
for (i = 0; i < urb->number_of_packets; i++) {
@@ -676,7 +678,7 @@
if (flen < pdev->vlast_packet_size) {
/* Shorter packet... We probably have the end of an image-frame;
wake up read() process and let select()/poll() do something.
- Decompression is done in user time over there.
+ Decompression is done in user time over there.
*/
if (pdev->vsync == 2) {
/* The ToUCam Fun CMOS sensor causes the firmware to send 2 or 3 bogus
@@ -733,7 +735,7 @@
else {
/* Send only once per EOF */
awake = 1; /* delay wake_ups */
-
+
/* Find our next frame to fill. This will always succeed, since we
* nick a frame from either empty or full list, but if we had to
* take it from the full list, it means a frame got dropped.
@@ -766,8 +768,10 @@
if (iso_error < 20)
Trace(TRACE_FLOW, "Iso frame %d of USB has error %d\n", i, fst);
}
-#endif
+#endif
}
+
+handler_end:
if (awake)
wake_up_interruptible(&pdev->frameq);
@@ -796,7 +800,7 @@
/* Get the current alternate interface, adjust packet size */
if (!udev->actconfig)
return -EFAULT;
- idesc = &udev->actconfig->interface[0].altsetting[pdev->valternate];
+ idesc = &udev->actconfig->interface[0]->altsetting[pdev->valternate];
if (!idesc)
return -EFAULT;
@@ -900,8 +904,10 @@
}
}
- /* Stop camera, but only if we are sure the camera is still there */
- if (!pdev->unplugged) {
+ /* Stop camera, but only if we are sure the camera is still there (unplug
+ is signalled by EPIPE)
+ */
+ if (pdev->error_status && pdev->error_status != EPIPE) {
Trace(TRACE_OPEN, "Setting alternate interface 0.\n");
usb_set_interface(pdev->udev, 0, 0);
}
@@ -930,28 +936,6 @@
}
-static inline void set_mem_leak(void *ptr)
-{
- down(&mem_lock);
- if (mem_leak != NULL)
- Err("Memleak: overwriting mem_leak pointer!\n");
- Trace(TRACE_MEMORY, "Setting mem_leak to 0x%p.\n", ptr);
- mem_leak = ptr;
- up(&mem_lock);
-}
-
-static inline void free_mem_leak(void)
-{
- down(&mem_lock);
- if (mem_leak != NULL) {
- Trace(TRACE_MEMORY, "Freeing mem_leak ptr 0x%p.\n", mem_leak);
- kfree(mem_leak);
- mem_leak = NULL;
- }
- up(&mem_lock);
-}
-
-
/***************************************************************************/
/* Video4Linux functions */
@@ -975,7 +959,7 @@
pdev->usb_init = 1;
if (pwc_trace & TRACE_OPEN) {
- /* Query CMOS sensor type */
+ /* Query sensor type */
const char *sensor_type = NULL;
i = pwc_get_cmos_sensor(pdev);
@@ -994,7 +978,7 @@
default: sensor_type = "unknown type of sensor"; break;
}
if (sensor_type != NULL)
- Info("This %s camera is equipped with a %s (%d).\n", pdev->vdev->name, sensor_type, i);
+ Info("This %s camera is equipped with a %s (%d).\n", pdev->vdev.name, sensor_type, i);
}
}
@@ -1029,24 +1013,19 @@
pdev->vframe_count = 0;
pdev->vframes_dumped = 0;
pdev->vframes_error = 0;
- pdev->vpalette = default_palette;
-#if PWC_DEBUG
+ pdev->visoc_errors = 0;
+ pdev->error_status = 0;
+#if PWC_DEBUG
pdev->sequence = 0;
#endif
/* Set some defaults */
pdev->vsnapshot = 0;
- if (pdev->type == 730 || pdev->type == 740 || pdev->type == 750)
- pdev->vsize = PSZ_QSIF;
- else
- pdev->vsize = PSZ_QCIF;
- pdev->vframes = 10;
-
- /* Start iso pipe for video; first try user-supplied size/fps, if
- that fails try QCIF/10 or QSIF/10 (a reasonable default),
- then give up
+ /* Start iso pipe for video; first try the last used video size
+ (or the default one); if that fails try QCIF/10 or QSIF/10;
+ it that fails too, give up.
*/
- i = pwc_set_video_mode(pdev, pwc_image_sizes[default_size].x, pwc_image_sizes[default_size].y, default_fps, pdev->vcompression, 0);
+ i = pwc_set_video_mode(pdev, pwc_image_sizes[pdev->vsize].x, pwc_image_sizes[pdev->vsize].y, pdev->vframes, pdev->vcompression, 0);
if (i) {
Trace(TRACE_OPEN, "First attempt at set_video_mode failed.\n");
if (pdev->type == 730 || pdev->type == 740 || pdev->type == 750)
@@ -1100,32 +1079,27 @@
if (pdev->vframe_count > 20)
Info("Closing video device: %d frames received, dumped %d frames, %d frames with errors.\n", pdev->vframe_count, pdev->vframes_dumped, pdev->vframes_error);
- /* Free isoc URBs, stop camera */
+ if (pdev->decompressor != NULL) {
+ pdev->decompressor->exit();
+ pdev->decompressor->unlock();
+ pdev->decompressor = NULL;
+ }
+
pwc_isoc_cleanup(pdev);
+ pwc_free_buffers(pdev);
- if (!pdev->unplugged) {
+ /* Turn off LEDS and power down camera, but only when not unplugged */
+ if (pdev->error_status != EPIPE) {
/* Turn LEDs off */
if (pwc_set_leds(pdev, 0, 0) < 0)
Info("Failed to set LED on/off time.\n");
- /* Power down camera to save energy */
if (power_save) {
i = pwc_camera_power(pdev, 0);
if (i < 0)
Err("Failed to power down camera (%d)\n", i);
}
}
-
pdev->vopen = 0;
- if (pdev->decompressor != NULL) {
- pdev->decompressor->exit();
- pdev->decompressor->unlock();
- }
- pwc_free_buffers(pdev);
-
- /* wake up _disconnect() routine */
- if (pdev->unplugged)
- wake_up(&pdev->remove_ok);
- file->private_data = NULL;
Trace(TRACE_OPEN, "<< video_close()\n");
return 0;
}
@@ -1133,15 +1107,15 @@
/*
* FIXME: what about two parallel reads ????
* ANSWER: Not supported. You can't open the device more than once,
- despite what the V4L1 interface says. First, I don't see
- the need, second there's no mechanism of alerting the
+ despite what the V4L1 interface says. First, I don't see
+ the need, second there's no mechanism of alerting the
2nd/3rd/... process of events like changing image size.
- And I don't see the point of blocking that for the
+ And I don't see the point of blocking that for the
2nd/3rd/... process.
In multi-threaded environments reading parallel from any
device is tricky anyhow.
*/
-
+
static int pwc_video_read(struct file *file, char *buf,
size_t count, loff_t *ppos)
{
@@ -1156,16 +1130,20 @@
pdev = vdev->priv;
if (pdev == NULL)
return -EFAULT;
- if (pdev->unplugged) {
- Info("pwc_video_read: Device got unplugged (1).\n");
- return -EPIPE; /* unplugged device! */
- }
+ if (pdev->error_status)
+ return -pdev->error_status; /* Something happened, report what. */
/* In case we're doing partial reads, we don't have to wait for a frame */
if (pdev->image_read_pos == 0) {
/* Do wait queueing according to the (doc)book */
add_wait_queue(&pdev->frameq, &wait);
while (pdev->full_frames == NULL) {
+ /* Check for unplugged/etc. here */
+ if (pdev->error_status) {
+ remove_wait_queue(&pdev->frameq, &wait);
+ set_current_state(TASK_RUNNING);
+ return -pdev->error_status ;
+ }
if (noblock) {
remove_wait_queue(&pdev->frameq, &wait);
set_current_state(TASK_RUNNING);
@@ -1182,7 +1160,7 @@
remove_wait_queue(&pdev->frameq, &wait);
set_current_state(TASK_RUNNING);
- /* Decompress [, convert] and release frame */
+ /* Decompress and release frame */
if (pwc_handle_frame(pdev))
return -EFAULT;
}
@@ -1205,31 +1183,29 @@
{
struct video_device *vdev = file->private_data;
struct pwc_device *pdev;
-
+
if (vdev == NULL)
return -EFAULT;
pdev = vdev->priv;
if (pdev == NULL)
return -EFAULT;
-
+
poll_wait(file, &pdev->frameq, wait);
- if (pdev->unplugged) {
- Info("pwc_video_poll: Device got unplugged.\n");
+ if (pdev->error_status)
return POLLERR;
- }
if (pdev->full_frames != NULL) /* we have frames waiting */
return (POLLIN | POLLRDNORM);
return 0;
}
-
+
static int pwc_video_do_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, void *arg)
{
struct video_device *vdev = file->private_data;
struct pwc_device *pdev;
DECLARE_WAITQUEUE(wait, current);
-
+
if (vdev == NULL)
return -EFAULT;
pdev = vdev->priv;
@@ -1238,7 +1214,7 @@
switch (cmd) {
/* Query cabapilities */
- case VIDIOCGCAP:
+ case VIDIOCGCAP:
{
struct video_capability *caps = arg;
@@ -1310,7 +1286,7 @@
else
p->colour = 0xffff;
p->depth = 24;
- p->palette = pdev->vpalette;
+ p->palette = VIDEO_PALETTE_YUV420P;
p->hue = 0xFFFF; /* N/A */
break;
}
@@ -1326,9 +1302,8 @@
is used exactly once in the uncompress
routine.
*/
- if (p->palette && p->palette != pdev->vpalette) {
- if (pwc_set_palette(pdev, p->palette) < 0)
- return -EINVAL;
+ if (p->palette && p->palette != VIDEO_PALETTE_YUV420P) {
+ return -EINVAL;
}
pwc_set_brightness(pdev, p->brightness);
pwc_set_contrast(pdev, p->contrast);
@@ -1407,9 +1382,8 @@
various palettes... The driver doesn't support
such small images, so I'm working around it.
*/
- if (vm->format && vm->format != pdev->vpalette)
- if (pwc_set_palette(pdev, vm->format) < 0)
- return -EINVAL;
+ if (vm->format && vm->format != VIDEO_PALETTE_YUV420P)
+ return -EINVAL;
if ((vm->width != pdev->view.x || vm->height != pdev->view.y) &&
(vm->width >= pdev->view_min.x && vm->height >= pdev->view_min.y)) {
@@ -1429,7 +1403,7 @@
/* Okay, we're done here. In the SYNC call we wait until a
frame comes available, then expand image into the given
buffer.
- In contrast to the CPiA cam the Philips cams deliver a
+ In contrast to the CPiA cam the Philips cams deliver a
constant stream, almost like a grabber card. Also,
we have separate buffers for the rawdata and the image,
meaning we can nearly always expand into the requested buffer.
@@ -1469,15 +1443,15 @@
/* Add ourselves to the frame wait-queue.
FIXME: needs auditing for safety.
- QUSTION: In what respect? I think that using the
- frameq is safe now.
+ QUESTION: In what respect? I think that using the
+ frameq is safe now.
*/
add_wait_queue(&pdev->frameq, &wait);
while (pdev->full_frames == NULL) {
- if (pdev->unplugged) {
+ if (pdev->error_status) {
remove_wait_queue(&pdev->frameq, &wait);
set_current_state(TASK_RUNNING);
- return -ENODEV;
+ return -pdev->error_status;
}
if (signal_pending(current)) {
@@ -1485,8 +1459,8 @@
set_current_state(TASK_RUNNING);
return -ERESTARTSYS;
}
- set_current_state(TASK_INTERRUPTIBLE);
schedule();
+ set_current_state(TASK_INTERRUPTIBLE);
}
remove_wait_queue(&pdev->frameq, &wait);
set_current_state(TASK_RUNNING);
@@ -1533,7 +1507,7 @@
{
struct video_unit *vu = arg;
- vu->video = pdev->vdev->minor & 0x3F;
+ vu->video = pdev->vdev.minor & 0x3F;
vu->audio = -1; /* not known yet */
vu->vbi = -1;
vu->radio = -1;
@@ -1592,14 +1566,11 @@
{
struct usb_device *udev = interface_to_usbdev(intf);
struct pwc_device *pdev = NULL;
- struct video_device *vdev;
int vendor_id, product_id, type_id;
int i, hint;
int video_nr = -1; /* default: use next available device */
char serial_number[30], *name;
- free_mem_leak();
-
/* Check if we can handle this device */
Trace(TRACE_PROBE, "probe() called [%04X %04X], if %d\n",
udev->descriptor.idVendor, udev->descriptor.idProduct,
@@ -1662,6 +1633,11 @@
name = "Philips 750 webcam";
type_id = 750;
break;
+ case 0x0313:
+ Info("Philips PCVC720K/40 (ToUCam XS) USB webcam detected.\n");
+ name = "Philips 720K/40 webcam";
+ type_id = 720;
+ break;
default:
return -ENODEV;
break;
@@ -1684,12 +1660,12 @@
case 0x08b0:
Info("Logitech QuickCam Pro 3000 USB webcam detected.\n");
name = "Logitech QuickCam Pro 3000";
- type_id = 730;
+ type_id = 740; /* CCD sensor */
break;
case 0x08b1:
Info("Logitech QuickCam Notebook Pro USB webcam detected.\n");
name = "Logitech QuickCam Notebook Pro";
- type_id = 740; /* ?? unknown sensor */
+ type_id = 740; /* CCD sensor */
break;
case 0x08b2:
Info("Logitech QuickCam 4000 Pro USB webcam detected.\n");
@@ -1699,7 +1675,16 @@
case 0x08b3:
Info("Logitech QuickCam Zoom USB webcam detected.\n");
name = "Logitech QuickCam Zoom";
- type_id = 740; /* ?? unknown sensor */
+ type_id = 740; /* CCD sensor */
+ break;
+ case 0x08b4:
+ case 0x08b5:
+ case 0x08b6:
+ case 0x08b7:
+ case 0x08b8:
+ Info("Logitech QuickCam detected (reserved ID).\n");
+ name = "Logitech QuickCam (res.)";
+ type_id = 730; /* Assuming CMOS */
break;
default:
return -ENODEV;
@@ -1734,6 +1719,11 @@
name = "Creative Labs Webcam 5";
type_id = 730;
break;
+ case 0x4011:
+ Info("Creative Labs Webcam Pro Ex detected.\n");
+ name = "Creative Labs Webcam Pro Ex";
+ type_id = 740;
+ break;
default:
return -ENODEV;
break;
@@ -1787,26 +1777,20 @@
memset(pdev, 0, sizeof(struct pwc_device));
pdev->type = type_id;
pwc_construct(pdev);
+ pdev->vsize = default_size;
+ pdev->vframes = default_fps;
init_MUTEX(&pdev->modlock);
pdev->ptrlock = SPIN_LOCK_UNLOCKED;
pdev->udev = udev;
init_waitqueue_head(&pdev->frameq);
- init_waitqueue_head(&pdev->remove_ok);
pdev->vcompression = pwc_preferred_compression;
- /* Now hook it up to the video subsystem */
- vdev = kmalloc(sizeof(struct video_device), GFP_KERNEL);
- if (vdev == NULL) {
- Err("Oops, could not allocate memory for video_device.\n");
- return -ENOMEM;
- }
- memcpy(vdev, &pwc_template, sizeof(pwc_template));
- strcpy(vdev->name, name);
- vdev->owner = THIS_MODULE;
- pdev->vdev = vdev;
- vdev->priv = pdev;
+ memcpy(&pdev->vdev, &pwc_template, sizeof(pwc_template));
+ strcpy(pdev->vdev.name, name);
+ pdev->vdev.owner = THIS_MODULE;
+ pdev->vdev.priv = pdev;
pdev->release = udev->descriptor.bcdDevice;
Trace(TRACE_PROBE, "Release: %04x\n", pdev->release);
@@ -1825,14 +1809,14 @@
}
}
- i = video_register_device(vdev, VFL_TYPE_GRABBER, video_nr);
+ i = video_register_device(&pdev->vdev, VFL_TYPE_GRABBER, video_nr);
if (i < 0) {
Err("Failed to register as video device (%d).\n", i);
+ kfree(pdev); /* Oops, no memory leaks please */
return -EIO;
}
else {
- Trace(TRACE_PROBE, "Registered video struct at 0x%p.\n", vdev);
- Info("Registered as /dev/video%d.\n", vdev->minor & 0x3F);
+ Info("Registered as /dev/video%d.\n", pdev->vdev.minor & 0x3F);
}
/* occupy slot */
if (hint < MAX_DEV_HINTS)
@@ -1848,11 +1832,8 @@
{
struct pwc_device *pdev;
int hint;
- DECLARE_WAITQUEUE(wait, current);
lock_kernel();
- free_mem_leak();
-
pdev = usb_get_intfdata (intf);
usb_set_intfdata (intf, NULL);
if (pdev == NULL) {
@@ -1874,41 +1855,23 @@
}
#endif
- pdev->unplugged = 1;
- if (pdev->vdev != NULL) {
- Trace(TRACE_PROBE, "Unregistering video device.\n");
- video_unregister_device(pdev->vdev);
- if (pdev->vopen) {
- Info("Disconnected while device/video is open!\n");
-
- /* Wake up any processes that might be waiting for
- a frame, let them return an error condition
- */
- wake_up(&pdev->frameq);
-
- /* Wait until we get a 'go' from _close(). This used
- to have a gigantic race condition, since we kfree()
- stuff here, but we have to wait until close()
- is finished.
- */
-
- Trace(TRACE_PROBE, "Sleeping on remove_ok.\n");
- add_wait_queue(&pdev->remove_ok, &wait);
- set_current_state(TASK_UNINTERRUPTIBLE);
- /* ... wait ... */
- schedule();
- remove_wait_queue(&pdev->remove_ok, &wait);
- set_current_state(TASK_RUNNING);
- Trace(TRACE_PROBE, "Done sleeping.\n");
- set_mem_leak(pdev->vdev);
- pdev->vdev = NULL;
- }
- else {
- /* Normal disconnect; remove from available devices */
- kfree(pdev->vdev);
- pdev->vdev = NULL;
- }
+ /* We got unplugged; this is signalled by an EPIPE error code */
+ if (pdev->vopen) {
+ Info("Disconnected while webcam is in use!\n");
+ pdev->error_status = EPIPE;
}
+
+ /* Alert waiting processes */
+ wake_up_interruptible(&pdev->frameq);
+ /* Wait until device is closed */
+ while (pdev->vopen)
+ schedule();
+ /* Device is now closed, so we can safely unregister it */
+ Trace(TRACE_PROBE, "Unregistering video device in disconnect().\n");
+ video_unregister_device(&pdev->vdev);
+
+ /* Free memory (don't set pdev to 0 just yet) */
+ kfree(pdev);
disconnect_out:
/* search device_hint[] table if we occupy a slot, by any chance */
@@ -1916,9 +1879,7 @@
if (device_hint[hint].pdev == pdev)
device_hint[hint].pdev = NULL;
- pdev->udev = NULL;
unlock_kernel();
- kfree(pdev);
}
@@ -1947,7 +1908,7 @@
static int trace = -1;
static int compression = -1;
static int leds[2] = { -1, -1 };
-static char *dev_hint[10] = { };
+static char *dev_hint[MAX_DEV_HINTS] = { };
MODULE_PARM(size, "s");
MODULE_PARM_DESC(size, "Initial image size. One of sqcif, qsif, qcif, sif, cif, vga");
@@ -1965,7 +1926,7 @@
MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)");
MODULE_PARM(leds, "2i");
MODULE_PARM_DESC(leds, "LED on,off time in milliseconds");
-MODULE_PARM(dev_hint, "0-10s");
+MODULE_PARM(dev_hint, "0-20s");
MODULE_PARM_DESC(dev_hint, "Device node hints");
MODULE_DESCRIPTION("Philips & OEM USB webcam driver");
@@ -2107,14 +2068,12 @@
device_hint[i].type = 0; /* not filled */
} /* ..for MAX_DEV_HINTS */
- init_MUTEX(&mem_lock);
Trace(TRACE_PROBE, "Registering driver at address 0x%p.\n", &pwc_driver);
return usb_register(&pwc_driver);
}
static void __exit usb_pwc_exit(void)
{
- free_mem_leak();
Trace(TRACE_MODULE, "Deregistering driver.\n");
usb_deregister(&pwc_driver);
Info("Philips webcam module removed.\n");
diff -Nru a/drivers/usb/media/pwc-ioctl.h b/drivers/usb/media/pwc-ioctl.h
--- a/drivers/usb/media/pwc-ioctl.h Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/media/pwc-ioctl.h Sun Aug 3 13:14:48 2003
@@ -1,7 +1,7 @@
#ifndef PWC_IOCTL_H
#define PWC_IOCTL_H
-/* (C) 2001-2002 Nemosoft Unv. webcam@smcc.demon.nl
+/* (C) 2001-2003 Nemosoft Unv. webcam@smcc.demon.nl
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
diff -Nru a/drivers/usb/media/pwc-misc.c b/drivers/usb/media/pwc-misc.c
--- a/drivers/usb/media/pwc-misc.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/media/pwc-misc.c Sun Aug 3 13:14:47 2003
@@ -1,6 +1,6 @@
/* Linux driver for Philips webcam
Various miscellaneous functions and tables.
- (C) 1999-2002 Nemosoft Unv. (webcam@smcc.demon.nl)
+ (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -81,6 +81,7 @@
pdev->frame_header_size = 0;
pdev->frame_trailer_size = 0;
break;
+ case 720:
case 730:
case 740:
case 750:
diff -Nru a/drivers/usb/media/pwc-uncompress.c b/drivers/usb/media/pwc-uncompress.c
--- a/drivers/usb/media/pwc-uncompress.c Sun Aug 3 13:14:49 2003
+++ b/drivers/usb/media/pwc-uncompress.c Sun Aug 3 13:14:49 2003
@@ -1,6 +1,6 @@
/* Linux driver for Philips webcam
Decompression frontend.
- (C) 1999-2002 Nemosoft Unv. (webcam@smcc.demon.nl)
+ (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -98,14 +98,6 @@
if (!image)
return -EFAULT;
-#if PWC_DEBUG
- /* This is a quickie */
- if (pdev->vpalette == VIDEO_PALETTE_RAW) {
- memcpy(image, fbuf->data, pdev->frame_size);
- return 0;
- }
-#endif
-
yuv = fbuf->data + pdev->frame_header_size; /* Skip header */
if (pdev->vbandlength == 0) {
/* Uncompressed mode. We copy the data into the output buffer,
@@ -113,8 +105,6 @@
size). Unfortunately we have to do a bit of byte stuffing
to get the desired output format/size.
*/
- switch (pdev->vpalette) {
- case VIDEO_PALETTE_YUV420P:
/*
* We do some byte shuffling here to go from the
* native format to YUV420P.
@@ -149,11 +139,6 @@
else
dstu += (stride >> 1);
}
- break;
- default:
- Err("Unsupported palette!");
- break;
- }
}
else {
/* Compressed; the decompressor routines will write the data
diff -Nru a/drivers/usb/media/pwc-uncompress.h b/drivers/usb/media/pwc-uncompress.h
--- a/drivers/usb/media/pwc-uncompress.h Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/media/pwc-uncompress.h Sun Aug 3 13:14:47 2003
@@ -1,4 +1,4 @@
-/* (C) 1999-2002 Nemosoft Unv. (webcam@smcc.demon.nl)
+/* (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
diff -Nru a/drivers/usb/media/pwc.h b/drivers/usb/media/pwc.h
--- a/drivers/usb/media/pwc.h Sun Aug 3 13:14:49 2003
+++ b/drivers/usb/media/pwc.h Sun Aug 3 13:14:49 2003
@@ -1,4 +1,4 @@
-/* (C) 1999-2002 Nemosoft Unv. (webcam@smcc.demon.nl)
+/* (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -60,8 +60,8 @@
/* Version block */
#define PWC_MAJOR 8
-#define PWC_MINOR 10
-#define PWC_VERSION "8.10"
+#define PWC_MINOR 11
+#define PWC_VERSION "8.11"
#define PWC_NAME "pwc"
/* Turn certain features on/off */
@@ -82,7 +82,7 @@
#define PWC_FRAME_SIZE (460800 + TOUCAM_HEADER_SIZE + TOUCAM_TRAILER_SIZE)
/* Absolute maximum number of buffers available for mmap() */
-#define MAX_IMAGES 4
+#define MAX_IMAGES 10
struct pwc_coord
{
@@ -112,6 +112,7 @@
struct pwc_device
{
+ struct video_device vdev;
#ifdef PWC_MAGIC
int magic;
#endif
@@ -120,22 +121,21 @@
int type; /* type of cam (645, 646, 675, 680, 690) */
int release; /* release number */
- int unplugged; /* set when the plug is pulled */
+ int error_status; /* set when something goes wrong with the cam (unplugged, USB errors) */
int usb_init; /* set when the cam has been initialized over USB */
/*** Video data ***/
int vopen; /* flag */
- struct video_device *vdev;
int vendpoint; /* video isoc endpoint */
int vcinterface; /* video control interface */
int valternate; /* alternate interface needed */
int vframes, vsize; /* frames-per-second & size (see PSZ_*) */
- int vpalette; /* YUV */
int vframe_count; /* received frames */
int vframes_dumped; /* counter for dumped frames */
int vframes_error; /* frames received in error */
int vmax_packet_size; /* USB maxpacket size */
int vlast_packet_size; /* for frame synchronisation */
+ int visoc_errors; /* number of contiguous ISOC errors */
int vcompression; /* desired compression factor */
int vbandlength; /* compressed band length; 0 is uncompressed */
char vsnapshot; /* snapshot mode */
@@ -149,13 +149,13 @@
3b. in case data is uncompressed, copy into image buffer with viewport
4. data is transferred to the user process
- Note that MAX_ISO_BUFS != MAX_FRAMES != MAX_IMAGES....
+ Note that MAX_ISO_BUFS != MAX_FRAMES != MAX_IMAGES....
We have in effect a back-to-back-double-buffer system.
*/
/* 1: isoc */
struct pwc_iso_buf sbuf[MAX_ISO_BUFS];
char iso_init;
-
+
/* 2: frame */
struct pwc_frame_buf *fbuf; /* all frames */
struct pwc_frame_buf *empty_frames, *empty_frames_tail; /* all empty frames */
@@ -168,7 +168,7 @@
#if PWC_DEBUG
int sequence; /* Debugging aid */
#endif
-
+
/* 3: decompression */
struct pwc_decompressor *decompressor; /* function block with decompression routines */
void *decompress_data; /* private data for decompression engine */
@@ -176,7 +176,7 @@
/* 4: image */
/* We have an 'image' and a 'view', where 'image' is the fixed-size image
as delivered by the camera, and 'view' is the size requested by the
- program. The camera image is centered in this viewport, laced with
+ program. The camera image is centered in this viewport, laced with
a gray or black border. view_min <= image <= view <= view_max;
*/
int image_mask; /* bitmask of supported sizes */
@@ -196,10 +196,9 @@
/*** Misc. data ***/
wait_queue_head_t frameq; /* When waiting for a frame to finish... */
- wait_queue_head_t remove_ok; /* When we got hot unplugged, we have to avoid a few race conditions */
#if PWC_INT_PIPE
void *usb_int_handler; /* for the interrupt endpoint */
-#endif
+#endif
};
/* Enumeration of image sizes */
diff -Nru a/drivers/usb/misc/auerswald.c b/drivers/usb/misc/auerswald.c
--- a/drivers/usb/misc/auerswald.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/misc/auerswald.c Sun Aug 3 13:14:47 2003
@@ -774,7 +774,7 @@
/* requirement: auerbuf_init() */
static int auerbuf_setup (pauerbufctl_t bcp, unsigned int numElements, unsigned int bufsize)
{
- pauerbuf_t bep;
+ pauerbuf_t bep = NULL;
dbg ("auerbuf_setup called with %d elements of %d bytes", numElements, bufsize);
@@ -801,6 +801,7 @@
bl_fail:/* not enough memory. Free allocated elements */
dbg ("auerbuf_setup: no more memory");
+ kfree(bep);
auerbuf_free_buffers (bcp);
return -ENOMEM;
}
diff -Nru a/drivers/usb/misc/brlvger.c b/drivers/usb/misc/brlvger.c
--- a/drivers/usb/misc/brlvger.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/misc/brlvger.c Sun Aug 3 13:14:48 2003
@@ -289,7 +289,7 @@
we reserve it.*/
static DECLARE_MUTEX(reserve_sem);
- actifsettings = dev->actconfig->interface->altsetting;
+ actifsettings = dev->actconfig->interface[0]->altsetting;
if( dev->descriptor.bNumConfigurations != 1
|| dev->config->desc.bNumInterfaces != 1
diff -Nru a/drivers/usb/misc/emi26.c b/drivers/usb/misc/emi26.c
--- a/drivers/usb/misc/emi26.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/misc/emi26.c Sun Aug 3 13:14:47 2003
@@ -201,7 +201,7 @@
return err;
}
-static __devinitdata struct usb_device_id id_table [] = {
+static struct usb_device_id id_table [] = {
{ USB_DEVICE(EMI26_VENDOR_ID, EMI26_PRODUCT_ID) },
{ } /* Terminating entry */
};
@@ -231,13 +231,12 @@
.name = "emi26 - firmware loader",
.probe = emi26_probe,
.disconnect = emi26_disconnect,
- .id_table = NULL,
+ .id_table = id_table,
};
static int __init emi26_init (void)
{
- usb_register (&emi26_driver);
- return 0;
+ return usb_register(&emi26_driver);
}
static void __exit emi26_exit (void)
diff -Nru a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
--- a/drivers/usb/misc/usbtest.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/misc/usbtest.c Sun Aug 3 13:14:52 2003
@@ -471,7 +471,7 @@
* they're ordered meaningfully in this array
*/
if (iface->altsetting [i].desc.bAlternateSetting != i) {
- dbg ("%s, illegal alt [%d].bAltSetting = %d",
+ dbg ("%s, invalid alt [%d].bAltSetting = %d",
dev->id, i,
iface->altsetting [i].desc
.bAlternateSetting);
@@ -695,8 +695,9 @@
*/
/* unlink whatever's still pending */
- for (i = 0; i < ctx->param->sglen; i++) {
- struct urb *u = ctx->urb [i];
+ for (i = 1; i < ctx->param->sglen; i++) {
+ struct urb *u = ctx->urb [
+ (i + subcase->number) % ctx->param->sglen];
if (u == urb || !u->dev)
continue;
@@ -893,7 +894,8 @@
/* FIXME set timer and time out; provide a disconnect hook */
/* wait for the last one to complete */
- wait_for_completion (&context.complete);
+ if (context.pending > 0)
+ wait_for_completion (&context.complete);
cleanup:
for (i = 0; i < param->sglen; i++) {
@@ -1374,6 +1376,7 @@
usb_set_intfdata (intf, NULL);
info ("unbound %s", dev->id);
+ kfree (dev);
}
/* Basic testing only needs a device that can source or sink bulk traffic.
diff -Nru a/drivers/usb/net/ax8817x.c b/drivers/usb/net/ax8817x.c
--- a/drivers/usb/net/ax8817x.c Sun Aug 3 13:14:46 2003
+++ b/drivers/usb/net/ax8817x.c Sun Aug 3 13:14:46 2003
@@ -1,7 +1,7 @@
/*
* ASIX AX8817x USB 2.0 10/100/HomePNA Ethernet controller driver
*
- * $Id: ax8817x.c,v 1.11 2003/06/15 19:00:02 dhollis Exp $
+ * $Id: ax8817x.c,v 1.18 2003/07/24 11:08:17 dhollis Exp $
*
* Copyright (c) 2002-2003 TiVo Inc.
*
@@ -10,6 +10,15 @@
*
* History
*
+ * 2003-07-24 - Dave Hollis <dhollis@davehollis.com> 2.0.2
+ * * Minor fix that greatly increases rx performance
+
+ * 2003-07-22 - Dave Hollis <dhollis@davehollis.com> 2.0.1
+ * * Add Intellinet USB ids
+ * * Fix mii/ethtool support - link check works!
+ * * Add msglevel support
+ * * Shamelessly 'borrowed' devdbg/err/info macros from usbnet
+ * * Change strlcpy to strncpy
* 2003-06-15 - Dave Hollis <dhollis@davehollis.com> 2.0.0
* * Remove crc32 inline function, use core kernel instead
* * Set sane defaults for rx_buffers
@@ -50,7 +59,7 @@
* Known Issues
*
* Todo
- * Fix mii/ethtool output
+ * Fix receive performance on OHCI
*/
#include <linux/slab.h>
@@ -69,7 +78,7 @@
#include <linux/version.h>
/* Version Information */
-#define DRIVER_VERSION "v2.0.0"
+#define DRIVER_VERSION "v2.0.2"
#define DRIVER_AUTHOR "TiVo, Inc."
#define DRIVER_DESC "ASIX AX8817x USB Ethernet driver"
#define DRIVER_NAME "ax8817x"
@@ -95,6 +104,7 @@
#define AX_RX_MAX ETH_FRAME_LEN
#define AX_TIMEOUT_CMD ( HZ / 10 )
#define AX_TIMEOUT_TX ( HZ * 2 )
+#define AX_MCAST_FILTER_SIZE 8
#define AX_MAX_MCAST 64
#define AX_DRV_STATE_INITIALIZING 0x00
@@ -155,10 +165,11 @@
u8 phy_id;
u8 phy_state;
u8 drv_state;
+ int msg_level;
};
-const struct usb_device_id ax8817x_id_table[] __devinitdata = {
+const struct usb_device_id ax8817x_id_table[] = {
/* Linksys USB200M */
{USB_DEVICE(0x077b, 0x2226), driver_info:0x00130103},
/* Hawking UF200, TRENDnet TU2-ET100 */
@@ -167,12 +178,27 @@
{USB_DEVICE(0x0846, 0x1040), driver_info:0x00130103},
/* D-Link DUB-E100 */
{USB_DEVICE(0x2001, 0x1a00), driver_info:0x009f9d9f},
-
+ /* Intellinet USB Ethernet */
+ {USB_DEVICE(0x0b95, 0x1720), driver_info:0x00130103},
{}
};
MODULE_DEVICE_TABLE(usb, ax8817x_id_table);
+#ifdef DEBUG
+#define devdbg(ax_info, fmt, arg...) \
+ printk(KERN_DEBUG "%s: " fmt "\n" , (ax_info)->net->name, ## arg)
+#else
+#define devdbg(ax_info, fmt, arg...) do {} while(0)
+#endif
+
+#define deverr(ax_info, fmt, arg...) \
+ printk(KERN_ERR "%s: " fmt "\n", (ax_info)->net->name, ## arg)
+
+#define devinfo(ax_info, fmt, arg...) \
+ do { if ((ax_info)->msg_level >= 1) \
+ printk(KERN_INFO "%s: " fmt "\n", (ax_info)->net->name, ## arg); \
+ } while (0)
static void ax_run_ctl_queue(struct ax8817x_info *, struct ax_cmd_req *,
int);
@@ -735,7 +761,7 @@
break;
}
if (n_rx_urbs > 1) {
- urb->transfer_flags |= URB_NO_INTERRUPT; /* FIXME: Was USB_QUEUE_BULK */
+ urb->transfer_flags |= URB_ZERO_PACKET;
}
}
ret = ax_refill_rx_urb(ax_info, urb);
@@ -880,14 +906,14 @@
u32 crc_bits;
int i;
- multi_filter = kmalloc(8, GFP_ATOMIC);
+ multi_filter = kmalloc(AX_MCAST_FILTER_SIZE, GFP_ATOMIC);
if (multi_filter == NULL) {
/* Oops, couldn't allocate a DMA buffer for setting the multicast
filter. Try all multi mode, although the ax_write_cmd_async
will almost certainly fail, too... (but it will printk). */
rx_ctl |= 0x02;
} else {
- memset(multi_filter, 0, 8);
+ memset(multi_filter, 0, AX_MCAST_FILTER_SIZE);
/* Build the multicast hash filter. */
for (i = 0; i < net->mc_count; i++) {
@@ -901,7 +927,7 @@
ax_write_cmd_async(ax_info,
AX_CMD_WRITE_MULTI_FILTER, 0, 0,
- 8, multi_filter);
+ AX_MCAST_FILTER_SIZE, multi_filter);
rx_ctl |= 0x10;
}
@@ -915,19 +941,24 @@
__u16 * regd)
{
int ret;
+ u8 buf[4];
- ax_write_cmd(ax_info, AX_CMD_SET_SW_MII, 0, 0, 0, NULL);
- ret =
- ax_read_cmd(ax_info, AX_CMD_READ_MII_REG, phy, indx, 2, regd);
- ax_write_cmd(ax_info, AX_CMD_SET_HW_MII, 0, 0, 0, NULL);
-
- return 0;
+ devdbg(ax_info,"read_mii_word: phy=%02x, indx=%02x, regd=%04x", phy, indx, *regd);
+
+ ax_write_cmd(ax_info, AX_CMD_SET_SW_MII, 0, 0, 0, &buf);
+
+ ret = ax_read_cmd(ax_info, AX_CMD_READ_MII_REG, ax_info->phy_id, (__u16)indx, 2, regd);
+ devdbg(ax_info,"read_mii_word: AX_CMD_READ_MII_REG ret=%02x, regd=%04x", ret, *regd);
+
+ ax_write_cmd(ax_info, AX_CMD_SET_HW_MII, 0, 0, 0, &buf);
+
+ return ret;
}
static int write_mii_word(struct ax8817x_info *ax_info, __u8 phy,
__u8 indx, __u16 regd)
{
- warn("write_mii_word - not implemented!");
+ deverr(ax_info, "write_mii_word - not implemented!");
return 0;
}
@@ -936,6 +967,8 @@
struct ax8817x_info *ax_info = dev->priv;
int res;
+ devdbg(ax_info, "mdio_read: phy_id=%02x, loc=%02x", phy_id, loc);
+
read_mii_word(ax_info, phy_id, loc, (u16 *) & res);
return res & 0xffff;
}
@@ -945,6 +978,7 @@
{
struct ax8817x_info *ax_info = dev->priv;
+ devdbg(ax_info, "mdio_write: phy_id=%02x, loc=%02x", phy_id, loc);
write_mii_word(ax_info, phy_id, loc, val);
}
@@ -961,10 +995,10 @@
case ETHTOOL_GDRVINFO:{
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
- strlcpy(info.driver, DRIVER_NAME,
- ETHTOOL_BUSINFO_LEN);
- strlcpy(info.version, DRIVER_VERSION,
- ETHTOOL_BUSINFO_LEN);
+ strncpy(info.driver, DRIVER_NAME,
+ sizeof(info.driver) - 1);
+ strncpy(info.version, DRIVER_VERSION,
+ sizeof(info.version) - 1);
usb_make_path(ax_info->usb, info.bus_info,sizeof info.bus_info);
if (copy_to_user(uaddr, &info, sizeof(info)))
return -EFAULT;
@@ -993,15 +1027,14 @@
case ETHTOOL_GLINK:{
struct ethtool_value edata = { ETHTOOL_GLINK };
- edata.data =
- ax_info->phy_state == AX_PHY_STATE_LINK;
+ edata.data = mii_link_ok(&ax_info->mii);
if (copy_to_user(uaddr, &edata, sizeof(edata)))
return -EFAULT;
return 0;
}
case ETHTOOL_GMSGLVL:{
struct ethtool_value edata = { ETHTOOL_GMSGLVL };
- /* edata.data = ax_info->msg_enable; FIXME */
+ edata.data = ax_info->msg_level;
if (copy_to_user(uaddr, &edata, sizeof(edata)))
return -EFAULT;
return 0;
@@ -1011,62 +1044,24 @@
if (copy_from_user(&edata, uaddr, sizeof(edata)))
return -EFAULT;
- /* sp->msg_enable = edata.data; FIXME */
+ ax_info->msg_level = edata.data;
return 0;
}
}
return -EOPNOTSUPP;
}
-static int ax8817x_mii_ioctl(struct net_device *net, struct ifreq *ifr,
- int cmd)
-{
- struct ax8817x_info *ax_info;
- struct mii_ioctl_data *data_ptr =
- (struct mii_ioctl_data *) &(ifr->ifr_data);
-
- ax_info = net->priv;
-
- switch (cmd) {
- case SIOCGMIIPHY:
- data_ptr->phy_id = ax_info->phy_id;
- break;
- case SIOCGMIIREG:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- ax_read_cmd(ax_info, AX_CMD_READ_MII_REG, 0,
- data_ptr->reg_num & 0x1f, 2,
- &(data_ptr->val_out));
- break;
- default:
- return -EOPNOTSUPP;
- }
- return 0;
-}
-
static int ax8817x_ioctl(struct net_device *net, struct ifreq *ifr,
int cmd)
{
struct ax8817x_info *ax_info;
- int res;
ax_info = net->priv;
- res = 0;
-
- switch (cmd) {
- case SIOCETHTOOL:
- res = ax8817x_ethtool_ioctl(net, (void __user *)ifr->ifr_data);
- break;
- case SIOCGMIIPHY: /* Get address of PHY in use */
- case SIOCGMIIREG: /* Read from MII PHY register */
- case SIOCSMIIREG: /* Write to MII PHY register */
- return ax8817x_mii_ioctl(net, ifr, cmd);
- default:
- res = -EOPNOTSUPP;
- }
- return res;
+ if (cmd == SIOCETHTOOL)
+ return ax8817x_ethtool_ioctl(net, (void __user *) ifr->ifr_data);
+
+ return generic_mii_ioctl(&ax_info->mii, (struct mii_ioctl_data *) &ifr->ifr_data, cmd, NULL);
}
static int ax8817x_net_init(struct net_device *net)
@@ -1219,7 +1214,8 @@
ax_info->mii.dev = net;
ax_info->mii.mdio_read = mdio_read;
ax_info->mii.mdio_write = mdio_write;
- ax_info->mii.phy_id_mask = 0x1f;
+ ax_info->mii.phy_id = ax_info->phy_id;
+ ax_info->mii.phy_id_mask = 0x3f;
ax_info->mii.reg_num_mask = 0x1f;
/* Set up the interrupt URB, and start PHY state monitoring */
@@ -1239,7 +1235,7 @@
usb_fill_int_urb(ax_info->int_urb, usb, usb_rcvintpipe(usb, 1),
ax_info->int_buf, 8, ax_int_callback, ax_info,
- 100);
+ usb->speed == USB_SPEED_HIGH? 8: 100);
ret = usb_submit_urb(ax_info->int_urb, GFP_ATOMIC);
if (ret < 0) {
diff -Nru a/drivers/usb/net/catc.c b/drivers/usb/net/catc.c
--- a/drivers/usb/net/catc.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/net/catc.c Sun Aug 3 13:14:48 2003
@@ -989,9 +989,10 @@
static int __init catc_init(void)
{
- info(DRIVER_VERSION " " DRIVER_DESC);
- usb_register(&catc_driver);
- return 0;
+ int result = usb_register(&catc_driver);
+ if (result == 0)
+ info(DRIVER_VERSION " " DRIVER_DESC);
+ return result;
}
static void __exit catc_exit(void)
diff -Nru a/drivers/usb/net/usbnet.c b/drivers/usb/net/usbnet.c
--- a/drivers/usb/net/usbnet.c Sun Aug 3 13:14:49 2003
+++ b/drivers/usb/net/usbnet.c Sun Aug 3 13:14:49 2003
@@ -519,7 +519,17 @@
if (sizeof dev->data < sizeof *info)
return -EDOM;
- /* expect strict spec conformance for the descriptors */
+ /* expect strict spec conformance for the descriptors, but
+ * cope with firmware which stores them in the wrong place
+ */
+ if (len == 0 && dev->udev->config->extralen) {
+ /* Motorola SB4100 (and maybe others) put
+ * CDC descriptors here
+ */
+ buf = dev->udev->config->extra;
+ len = dev->udev->config->extralen;
+ }
+
memset (info, 0, sizeof *info);
info->control = intf;
while (len > 3) {
@@ -547,7 +557,7 @@
d = &intf->altsetting->desc;
if (info->u->bMasterInterface0 != d->bInterfaceNumber)
goto bad_desc;
- info->data = dev->udev->actconfig->interface;
+ info->data = dev->udev->actconfig->interface[0];
if (intf != (info->data + info->u->bMasterInterface0))
goto bad_desc;
@@ -606,7 +616,7 @@
return 0;
bad_desc:
- // devdbg (dev, "bad CDC descriptors");
+ dev_info (&dev->udev->dev, "bad CDC descriptors\n");
return -ENODEV;
}
@@ -890,7 +900,7 @@
le32_to_cpus (&header->packet_count);
if ((header->packet_count > GL_MAX_TRANSMIT_PACKETS)
|| (header->packet_count < 0)) {
- dbg ("genelink: illegal received packet count %d",
+ dbg ("genelink: invalid received packet count %d",
header->packet_count);
return 0;
}
@@ -907,7 +917,7 @@
// this may be a broken packet
if (size > GL_MAX_PACKET_LEN) {
- dbg ("genelink: illegal rx length %d", size);
+ dbg ("genelink: invalid rx length %d", size);
return 0;
}
@@ -943,7 +953,7 @@
skb_pull (skb, 4);
if (skb->len > GL_MAX_PACKET_LEN) {
- dbg ("genelink: illegal rx length %d", skb->len);
+ dbg ("genelink: invalid rx length %d", skb->len);
return 0;
}
return 1;
@@ -1645,6 +1655,9 @@
* crc32, added to help detect when some sa1100 usb-to-memory DMA errata
* haven't been fully worked around.
*
+ * PXA based models use the same framing, and also can't implement
+ * set_interface properly.
+ *
*-------------------------------------------------------------------------*/
static struct sk_buff *
@@ -1684,34 +1697,14 @@
.unbind = cdc_unbind,
.tx_fixup = zaurus_tx_fixup,
};
-static const struct driver_info zaurus_sla300_info = {
- .description = "Sharp Zaurus SL-A300",
+static const struct driver_info zaurus_pxa_info = {
+ .description = "Sharp Zaurus, PXA-2xx based",
.flags = FLAG_FRAMING_Z,
.check_connect = always_connected,
.tx_fixup = zaurus_tx_fixup,
.in = 1, .out = 2,
};
-static const struct driver_info zaurus_slb500_info = {
- /* Japanese B500 ~= US SL-5600 */
- .description = "Sharp Zaurus SL-B500",
- .flags = FLAG_FRAMING_Z,
- .check_connect = always_connected,
- .tx_fixup = zaurus_tx_fixup,
-
- .in = 1, .out = 2,
-};
-static const struct driver_info zaurus_slc700_info = {
- .description = "Sharp Zaurus SL-C700",
- .flags = FLAG_FRAMING_Z,
- .check_connect = always_connected,
- .tx_fixup = zaurus_tx_fixup,
-
- .in = 1, .out = 2,
-};
-
-
-// SL-5600 and C-700 are PXA based; should resemble A300
#endif
@@ -2731,6 +2724,8 @@
/*
* SA-1100 based Sharp Zaurus ("collie"), or compatible.
* Same idea as above, but different framing.
+ *
+ * PXA-2xx based models are also lying-about-cdc.
*/
{
.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
@@ -2746,29 +2741,38 @@
.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
| USB_DEVICE_ID_MATCH_DEVICE,
.idVendor = 0x04DD,
- .idProduct = 0x8005,
+ .idProduct = 0x8005, /* A-300 */
.bInterfaceClass = 0x02,
.bInterfaceSubClass = 0x0a,
.bInterfaceProtocol = 0x00,
- .driver_info = (unsigned long) &zaurus_sla300_info,
+ .driver_info = (unsigned long) &zaurus_pxa_info,
}, {
.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
| USB_DEVICE_ID_MATCH_DEVICE,
.idVendor = 0x04DD,
- .idProduct = 0x8006,
+ .idProduct = 0x8006, /* B-500/SL-5600 */
.bInterfaceClass = 0x02,
.bInterfaceSubClass = 0x0a,
.bInterfaceProtocol = 0x00,
- .driver_info = (unsigned long) &zaurus_slb500_info,
+ .driver_info = (unsigned long) &zaurus_pxa_info,
}, {
.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
| USB_DEVICE_ID_MATCH_DEVICE,
- .idVendor = 0x04DD,
- .idProduct = 0x8007,
+ .idVendor = 0x04DD,
+ .idProduct = 0x8007, /* C-700 */
.bInterfaceClass = 0x02,
.bInterfaceSubClass = 0x0a,
.bInterfaceProtocol = 0x00,
- .driver_info = (unsigned long) &zaurus_slc700_info,
+ .driver_info = (unsigned long) &zaurus_pxa_info,
+}, {
+ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO
+ | USB_DEVICE_ID_MATCH_DEVICE,
+ .idVendor = 0x04DD,
+ .idProduct = 0x9031, /* C-750 */
+ .bInterfaceClass = 0x02,
+ .bInterfaceSubClass = 0x0a,
+ .bInterfaceProtocol = 0x00,
+ .driver_info = (unsigned long) &zaurus_pxa_info,
},
#endif
@@ -2787,6 +2791,7 @@
.bInterfaceProtocol = 0,
.driver_info = 0, /* BLACKLIST */
},
+ // FIXME blacklist the other Zaurus models too, sigh
#endif
{
diff -Nru a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
--- a/drivers/usb/serial/ftdi_sio.c Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/serial/ftdi_sio.c Sun Aug 3 13:14:51 2003
@@ -17,6 +17,13 @@
* See http://ftdi-usb-sio.sourceforge.net for upto date testing info
* and extra documentation
*
+ * (23/Jul/2003) Ian Abbott
+ * Added PIDs for CrystalFontz 547, 633, 631, 635, 640 and 640 from
+ * Wayne Wylupski.
+ *
+ * (10/Jul/2003) David Glance
+ * Added PID for DSS-20 SyncStation cradle for Sony-Ericsson P800.
+ *
* (27/Jun/2003) Ian Abbott
* Reworked the urb handling logic. We have no more pool, but dynamically
* allocate the urb and the transfer buffer on the fly. In testing this
@@ -254,8 +261,14 @@
{ USB_DEVICE_VER(FTDI_VID, FTDI_8U232AM_PID, 0, 0x3ff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_RELAIS_PID, 0, 0x3ff) },
{ USB_DEVICE_VER(FTDI_NF_RIC_VID, FTDI_NF_RIC_PID, 0, 0x3ff) },
- { USB_DEVICE_VER(FTDI_VID, FTDI_XF_634_PID, 0, 0x3ff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_XF_632_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_634_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_547_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_633_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_631_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_635_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_640_PID, 0, 0x3ff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_642_PID, 0, 0x3ff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_VNHCPCUSB_D_PID, 0, 0x3ff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_DSS20_PID, 0, 0x3ff) },
{ USB_DEVICE_VER(FTDI_MTXORB_VID, FTDI_MTXORB_0_PID, 0, 0x3ff) },
@@ -319,8 +332,14 @@
{ USB_DEVICE_VER(FTDI_VID, FTDI_8U232AM_PID, 0x400, 0xffff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_RELAIS_PID, 0x400, 0xffff) },
{ USB_DEVICE_VER(FTDI_NF_RIC_VID, FTDI_NF_RIC_PID, 0x400, 0xffff) },
- { USB_DEVICE_VER(FTDI_VID, FTDI_XF_634_PID, 0x400, 0xffff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_XF_632_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_634_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_547_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_633_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_631_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_635_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_640_PID, 0x400, 0xffff) },
+ { USB_DEVICE_VER(FTDI_VID, FTDI_XF_642_PID, 0x400, 0xffff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_VNHCPCUSB_D_PID, 0x400, 0xffff) },
{ USB_DEVICE_VER(FTDI_VID, FTDI_DSS20_PID, 0x400, 0xffff) },
{ USB_DEVICE_VER(FTDI_MTXORB_VID, FTDI_MTXORB_0_PID, 0x400, 0xffff) },
@@ -392,12 +411,18 @@
};
-static __devinitdata struct usb_device_id id_table_combined [] = {
+static struct usb_device_id id_table_combined [] = {
{ USB_DEVICE(FTDI_VID, FTDI_SIO_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_8U232AM_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_RELAIS_PID) },
- { USB_DEVICE(FTDI_VID, FTDI_XF_634_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_XF_632_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_634_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_547_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_633_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_631_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_635_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_640_PID) },
+ { USB_DEVICE(FTDI_VID, FTDI_XF_642_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_DSS20_PID) },
{ USB_DEVICE(FTDI_NF_RIC_VID, FTDI_NF_RIC_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_VNHCPCUSB_D_PID) },
diff -Nru a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
--- a/drivers/usb/serial/ftdi_sio.h Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/serial/ftdi_sio.h Sun Aug 3 13:14:52 2003
@@ -32,8 +32,14 @@
/* www.crystalfontz.com devices - thanx for providing free devices for evaluation ! */
/* they use the ftdi chipset for the USB interface and the vendor id is the same */
-#define FTDI_XF_634_PID 0xFC09 /* Four line device */
-#define FTDI_XF_632_PID 0xFC08 /* Two line device */
+#define FTDI_XF_632_PID 0xFC08 /* 632: 16x2 Character Display */
+#define FTDI_XF_634_PID 0xFC09 /* 634: 20x4 Character Display */
+#define FTDI_XF_547_PID 0xFC0A /* 547: Two line Display */
+#define FTDI_XF_633_PID 0xFC0B /* 633: 16x2 Character Display with Keys */
+#define FTDI_XF_631_PID 0xFC0C /* 631: 20x2 Character Display */
+#define FTDI_XF_635_PID 0xFC0D /* 635: 20x4 Character Display */
+#define FTDI_XF_640_PID 0xFC0E /* 640: Two line Display */
+#define FTDI_XF_642_PID 0xFC0F /* 642: Two line Display */
/* Video Networks Limited / Homechoice in the UK use an ftdi-based device for their 1Mb */
/* broadband internet service. The following PID is exhibited by the usb device supplied */
diff -Nru a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
--- a/drivers/usb/serial/io_ti.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/serial/io_ti.c Sun Aug 3 13:14:52 2003
@@ -993,7 +993,7 @@
if (status)
return status;
- interface = &serial->serial->dev->config->interface->altsetting->desc;
+ interface = &serial->serial->dev->config->interface[0]->altsetting->desc;
if (!interface) {
dev_err (&serial->serial->dev->dev, "%s - no interface set, error!", __FUNCTION__);
return -ENODEV;
diff -Nru a/drivers/usb/serial/kobil_sct.c b/drivers/usb/serial/kobil_sct.c
--- a/drivers/usb/serial/kobil_sct.c Sun Aug 3 13:14:52 2003
+++ b/drivers/usb/serial/kobil_sct.c Sun Aug 3 13:14:52 2003
@@ -182,7 +182,7 @@
// search for the necessary endpoints
pdev = serial->dev;
actconfig = pdev->actconfig;
- interface = actconfig->interface;
+ interface = actconfig->interface[0];
altsetting = interface->altsetting;
endpoint = altsetting->endpoint;
diff -Nru a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
--- a/drivers/usb/serial/pl2303.c Sun Aug 3 13:14:48 2003
+++ b/drivers/usb/serial/pl2303.c Sun Aug 3 13:14:48 2003
@@ -61,7 +61,7 @@
/*
* Version Information
*/
-#define DRIVER_VERSION "v0.9"
+#define DRIVER_VERSION "v0.10"
#define DRIVER_DESC "Prolific PL2303 USB to serial adaptor driver"
@@ -550,7 +550,9 @@
result = ((mcr & CONTROL_DTR) ? TIOCM_DTR : 0)
| ((mcr & CONTROL_RTS) ? TIOCM_RTS : 0)
| ((status & UART_CTS) ? TIOCM_CTS : 0)
- | ((status & UART_DSR) ? TIOCM_DSR : 0);
+ | ((status & UART_DSR) ? TIOCM_DSR : 0)
+ | ((status & UART_RING) ? TIOCM_RI : 0)
+ | ((status & UART_DCD) ? TIOCM_CD : 0);
dbg("%s - result = %x", __FUNCTION__, result);
@@ -637,7 +639,7 @@
usb_serial_debug_data (__FILE__, __FUNCTION__, urb->actual_length, urb->transfer_buffer);
- if (urb->actual_length > UART_STATE)
+ if (urb->actual_length < UART_STATE)
goto exit;
/* Save off the uart status for others to look at */
diff -Nru a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
--- a/drivers/usb/serial/usb-serial.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/serial/usb-serial.c Sun Aug 3 13:14:47 2003
@@ -489,6 +489,7 @@
if (retval) {
port->open_count = 0;
module_put(serial->type->owner);
+ kobject_put(&serial->kobj);
}
}
bailout:
@@ -1055,9 +1056,9 @@
(dev->descriptor.idProduct == PL2303_PRODUCT_ID)) ||
((dev->descriptor.idVendor == ATEN_VENDOR_ID) &&
(dev->descriptor.idProduct == ATEN_PRODUCT_ID))) {
- if (interface != &dev->actconfig->interface[0]) {
+ if (interface != dev->actconfig->interface[0]) {
/* check out the endpoints of the other interface*/
- iface_desc = &dev->actconfig->interface[0].altsetting[0];
+ iface_desc = &dev->actconfig->interface[0]->altsetting[0];
for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
endpoint = &iface_desc->endpoint[i].desc;
if ((endpoint->bEndpointAddress & 0x80) &&
diff -Nru a/drivers/usb/serial/visor.c b/drivers/usb/serial/visor.c
--- a/drivers/usb/serial/visor.c Sun Aug 3 13:14:47 2003
+++ b/drivers/usb/serial/visor.c Sun Aug 3 13:14:47 2003
@@ -169,7 +169,7 @@
*/
#define DRIVER_VERSION "v2.1"
#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>"
-#define DRIVER_DESC "USB HandSpring Visor, Palm m50x, Sony Clié driver"
+#define DRIVER_DESC "USB HandSpring Visor / Palm OS driver"
/* function prototypes for a handspring visor */
static int visor_open (struct usb_serial_port *port, struct file *filp);
@@ -275,7 +275,7 @@
/* All of the device info needed for the Handspring Visor, and Palm 4.0 devices */
static struct usb_serial_device_type handspring_device = {
.owner = THIS_MODULE,
- .name = "Handspring Visor / Treo / Palm 4.0 / Clié 4.x",
+ .name = "Handspring Visor / Palm OS",
.short_name = "visor",
.id_table = id_table,
.num_interrupt_in = NUM_DONT_CARE,
@@ -303,7 +303,7 @@
/* device info for the Sony Clie OS version 3.5 */
static struct usb_serial_device_type clie_3_5_device = {
.owner = THIS_MODULE,
- .name = "Sony Clié 3.5",
+ .name = "Sony Clie 3.5",
.short_name = "clie_3.5",
.id_table = clie_id_3_5_table,
.num_interrupt_in = 0,
diff -Nru a/drivers/usb/storage/shuttle_usbat.c b/drivers/usb/storage/shuttle_usbat.c
--- a/drivers/usb/storage/shuttle_usbat.c Sun Aug 3 13:14:44 2003
+++ b/drivers/usb/storage/shuttle_usbat.c Sun Aug 3 13:14:44 2003
@@ -103,10 +103,16 @@
unsigned char subcountL) {
int result;
- unsigned char command[8] = {
- 0x40, 0x81, epp_control, external_trigger,
- test_pattern, mask_byte, subcountL, subcountH
- };
+ unsigned char *command = us->iobuf;
+
+ command[0] = 0x40;
+ command[1] = 0x81;
+ command[2] = epp_control;
+ command[3] = external_trigger;
+ command[4] = test_pattern;
+ command[5] = mask_byte;
+ command[6] = subcountL;
+ command[7] = subcountH;
result = usb_stor_ctrl_transfer(us,
us->send_ctrl_pipe,
@@ -128,14 +134,20 @@
int use_sg) {
int result;
- unsigned char command[8] = {
- 0xC0, access|0x02, reg, 0x00, 0x00, 0x00,
- LSB_of(len), MSB_of(len)
- };
+ unsigned char *command = us->iobuf;
if (!len)
return USB_STOR_TRANSPORT_GOOD;
+ command[0] = 0xC0;
+ command[1] = access | 0x02;
+ command[2] = reg;
+ command[3] = 0;
+ command[4] = 0;
+ command[5] = 0;
+ command[6] = LSB_of(len);
+ command[7] = MSB_of(len);
+
result = usb_stor_ctrl_transfer(us,
us->send_ctrl_pipe,
0x80,
@@ -164,7 +176,7 @@
int i;
int result;
- unsigned char status;
+ unsigned char *status = us->iobuf;
/* Synchronizing cache on a CDR could take a heck of a long time,
* but probably not more than 10 minutes or so. On the other hand,
@@ -174,18 +186,18 @@
for (i=0; i<1200+minutes*60; i++) {
- result = usbat_read(us, USBAT_ATA, 0x17, &status);
+ result = usbat_read(us, USBAT_ATA, 0x17, status);
if (result!=USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (status&0x01) { // check condition
- result = usbat_read(us, USBAT_ATA, 0x10, &status);
+ if (*status & 0x01) { // check condition
+ result = usbat_read(us, USBAT_ATA, 0x10, status);
return USB_STOR_TRANSPORT_FAILED;
}
- if (status&0x20) // device fault
+ if (*status & 0x20) // device fault
return USB_STOR_TRANSPORT_FAILED;
- if ((status&0x80)==0x00) { // not busy
+ if ((*status & 0x80)==0x00) { // not busy
US_DEBUGP("Waited not busy for %d steps\n", i);
return USB_STOR_TRANSPORT_GOOD;
}
@@ -214,14 +226,20 @@
int minutes) {
int result;
- unsigned char command[8] = {
- 0x40, access|0x03, reg, 0x00, 0x00, 0x00,
- LSB_of(len), MSB_of(len)
- };
+ unsigned char *command = us->iobuf;
if (!len)
return USB_STOR_TRANSPORT_GOOD;
+ command[0] = 0x40;
+ command[1] = access | 0x03;
+ command[2] = reg;
+ command[3] = 0;
+ command[4] = 0;
+ command[5] = 0;
+ command[6] = LSB_of(len);
+ command[7] = MSB_of(len);
+
result = usb_stor_ctrl_transfer(us,
us->send_ctrl_pipe,
0x80,
@@ -265,23 +283,13 @@
// Not really sure the 0x07, 0x17, 0xfc, 0xe7 is necessary here,
// but that's what came out of the trace every single time.
- unsigned char command[16] = {
- 0x40, access|0x07, 0x07, 0x17, 0xfc, 0xe7,
- LSB_of(num_registers*2), MSB_of(num_registers*2),
- (direction==SCSI_DATA_WRITE ? 0x40 : 0xC0),
- access|(direction==SCSI_DATA_WRITE ? 0x05 : 0x04),
- data_reg, status_reg,
- timeout, qualifier, LSB_of(len), MSB_of(len)
- };
+ unsigned char *command = us->iobuf;
+ int i, j;
+ int cmdlen;
+ unsigned char *data = us->iobuf;
+ unsigned char *status = us->iobuf;
- int i;
- unsigned char data[num_registers*2];
- unsigned char status;
-
- for (i=0; i<num_registers; i++) {
- data[i<<1] = registers[i];
- data[1+(i<<1)] = data_out[i];
- }
+ BUG_ON(num_registers > US_IOBUF_SIZE/2);
for (i=0; i<20; i++) {
@@ -296,20 +304,48 @@
* that, we just return a failure.
*/
+ if (i==0) {
+ cmdlen = 16;
+ command[0] = 0x40;
+ command[1] = access | 0x07;
+ command[2] = 0x07;
+ command[3] = 0x17;
+ command[4] = 0xFC;
+ command[5] = 0xE7;
+ command[6] = LSB_of(num_registers*2);
+ command[7] = MSB_of(num_registers*2);
+ } else
+ cmdlen = 8;
+
+ command[cmdlen-8] = (direction==SCSI_DATA_WRITE ? 0x40 : 0xC0);
+ command[cmdlen-7] = access |
+ (direction==SCSI_DATA_WRITE ? 0x05 : 0x04);
+ command[cmdlen-6] = data_reg;
+ command[cmdlen-5] = status_reg;
+ command[cmdlen-4] = timeout;
+ command[cmdlen-3] = qualifier;
+ command[cmdlen-2] = LSB_of(len);
+ command[cmdlen-1] = MSB_of(len);
+
result = usb_stor_ctrl_transfer(us,
us->send_ctrl_pipe,
0x80,
0x40,
0,
0,
- (i==0 ? command : command+8),
- (i==0 ? 16 : 8));
+ command,
+ cmdlen);
if (result != USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
if (i==0) {
+ for (j=0; j<num_registers; j++) {
+ data[j<<1] = registers[j];
+ data[1+(j<<1)] = data_out[j];
+ }
+
result = usb_stor_bulk_transfer_buf(us,
us->send_bulk_pipe,
data, num_registers*2, NULL);
@@ -366,13 +402,13 @@
result = usbat_read(us, USBAT_ATA,
direction==SCSI_DATA_WRITE ? 0x17 : 0x0E,
- &status);
+ status);
if (result!=USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (status&0x01) // check condition
+ if (*status & 0x01) // check condition
return USB_STOR_TRANSPORT_FAILED;
- if (status&0x20) // device fault
+ if (*status & 0x20) // device fault
return USB_STOR_TRANSPORT_FAILED;
US_DEBUGP("Redoing %s\n",
@@ -403,17 +439,20 @@
unsigned short num_registers) {
int result;
- unsigned char data[num_registers*2];
+ unsigned char *data = us->iobuf;
int i;
- unsigned char command[8] = {
- 0x40, access|0x07, 0x00, 0x00, 0x00, 0x00,
- LSB_of(num_registers*2), MSB_of(num_registers*2)
- };
+ unsigned char *command = us->iobuf;
- for (i=0; i<num_registers; i++) {
- data[i<<1] = registers[i];
- data[1+(i<<1)] = data_out[i];
- }
+ BUG_ON(num_registers > US_IOBUF_SIZE/2);
+
+ command[0] = 0x40;
+ command[1] = access | 0x07;
+ command[2] = 0;
+ command[3] = 0;
+ command[4] = 0;
+ command[5] = 0;
+ command[6] = LSB_of(num_registers*2);
+ command[7] = MSB_of(num_registers*2);
result = usb_stor_ctrl_transfer(us,
us->send_ctrl_pipe,
@@ -427,6 +466,11 @@
if (result != USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
+ for (i=0; i<num_registers; i++) {
+ data[i<<1] = registers[i];
+ data[1+(i<<1)] = data_out[i];
+ }
+
result = usb_stor_bulk_transfer_buf(us,
us->send_bulk_pipe, data, num_registers*2, NULL);
@@ -593,7 +637,7 @@
static int hp_8200e_select_and_test_registers(struct us_data *us) {
int selector;
- unsigned char status;
+ unsigned char *status = us->iobuf;
// try device = master, then device = slave.
@@ -603,19 +647,19 @@
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (usbat_read(us, USBAT_ATA, 0x17, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x17, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (usbat_read(us, USBAT_ATA, 0x16, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x16, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (usbat_read(us, USBAT_ATA, 0x14, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x14, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (usbat_read(us, USBAT_ATA, 0x15, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x15, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
@@ -627,11 +671,11 @@
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (usbat_read(us, USBAT_ATA, 0x14, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x14, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
- if (usbat_read(us, USBAT_ATA, 0x15, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x15, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
}
@@ -642,7 +686,7 @@
int init_8200e(struct us_data *us) {
int result;
- unsigned char status;
+ unsigned char *status = us->iobuf;
// Enable peripheral control signals
@@ -655,13 +699,13 @@
wait_ms(2000);
- if (usbat_read_user_io(us, &status) !=
+ if (usbat_read_user_io(us, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
US_DEBUGP("INIT 2\n");
- if (usbat_read_user_io(us, &status) !=
+ if (usbat_read_user_io(us, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
@@ -699,13 +743,13 @@
// Read ISA port 0x27
- if (usbat_read(us, USBAT_ISA, 0x27, &status) !=
+ if (usbat_read(us, USBAT_ISA, 0x27, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
US_DEBUGP("INIT 7\n");
- if (usbat_read_user_io(us, &status) !=
+ if (usbat_read_user_io(us, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
@@ -717,7 +761,7 @@
US_DEBUGP("INIT 9\n");
- if (usbat_read_user_io(us, &status) !=
+ if (usbat_read_user_io(us, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
@@ -732,7 +776,7 @@
US_DEBUGP("INIT 11\n");
- if (usbat_read_user_io(us, &status) !=
+ if (usbat_read_user_io(us, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
@@ -740,7 +784,7 @@
wait_ms(1400);
- if (usbat_read_user_io(us, &status) !=
+ if (usbat_read_user_io(us, status) !=
USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
@@ -768,7 +812,7 @@
int hp8200e_transport(Scsi_Cmnd *srb, struct us_data *us)
{
int result;
- unsigned char status;
+ unsigned char *status = us->iobuf;
unsigned char registers[32];
unsigned char data[32];
unsigned int len;
@@ -802,8 +846,8 @@
data[i] = (i-7 >= srb->cmd_len) ? 0 : srb->cmnd[i-7];
}
- result = usbat_read(us, USBAT_ATA, 0x17, &status);
- US_DEBUGP("Status = %02X\n", status);
+ result = usbat_read(us, USBAT_ATA, 0x17, status);
+ US_DEBUGP("Status = %02X\n", *status);
if (result != USB_STOR_XFER_GOOD)
return USB_STOR_TRANSPORT_ERROR;
if (srb->cmnd[0] == TEST_UNIT_READY)
@@ -866,21 +910,21 @@
// How many bytes to read in? Check cylL register
- if (usbat_read(us, USBAT_ATA, 0x14, &status) !=
+ if (usbat_read(us, USBAT_ATA, 0x14, status) !=
USB_STOR_XFER_GOOD) {
return USB_STOR_TRANSPORT_ERROR;
}
if (len > 0xFF) { // need to read cylH also
- len = status;
- if (usbat_read(us, USBAT_ATA, 0x15, &status) !=
+ len = *status;
+ if (usbat_read(us, USBAT_ATA, 0x15, status) !=
USB_STOR_XFER_GOOD) {
return USB_STOR_TRANSPORT_ERROR;
}
- len += ((unsigned int)status)<<8;
+ len += ((unsigned int) *status)<<8;
}
else
- len = status;
+ len = *status;
result = usbat_read_block(us, USBAT_ATA, 0x10,
diff -Nru a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
--- a/drivers/usb/storage/unusual_devs.h Sun Aug 3 13:14:51 2003
+++ b/drivers/usb/storage/unusual_devs.h Sun Aug 3 13:14:51 2003
@@ -407,7 +407,7 @@
UNUSUAL_DEV( 0x0781, 0x0002, 0x0009, 0x0009,
"Sandisk",
"ImageMate SDDR-31",
- US_SC_SCSI, US_PR_BULK, NULL,
+ US_SC_DEVICE, US_PR_DEVICE, NULL,
US_FL_IGNORE_SER ),
UNUSUAL_DEV( 0x0781, 0x0100, 0x0100, 0x0100,
@@ -604,6 +604,13 @@
US_SC_ISD200, US_PR_BULK, isd200_Initialization,
0 ),
#endif
+
+/* Submitted by Antoine Mairesse <antoine.mairesse@free.fr> */
+UNUSUAL_DEV( 0x0ed1, 0x6660, 0x0100, 0x0300,
+ "USB",
+ "Solid state disk",
+ US_SC_DEVICE, US_PR_DEVICE, NULL,
+ US_FL_FIX_INQUIRY ),
/* Reported by Kevin Cernekee <kpc-usbdev@gelato.uiuc.edu>
* Tested on hardware version 1.10.
diff -Nru a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c
--- a/drivers/video/aty/aty128fb.c Sun Aug 3 13:14:48 2003
+++ b/drivers/video/aty/aty128fb.c Sun Aug 3 13:14:48 2003
@@ -148,7 +148,7 @@
static void aty128_remove(struct pci_dev *pdev);
/* supported Rage128 chipsets */
-static struct pci_device_id aty128_pci_tbl[] __devinitdata = {
+static struct pci_device_id aty128_pci_tbl[] = {
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF,
diff -Nru a/drivers/video/chipsfb.c b/drivers/video/chipsfb.c
--- a/drivers/video/chipsfb.c Sun Aug 3 13:14:48 2003
+++ b/drivers/video/chipsfb.c Sun Aug 3 13:14:48 2003
@@ -446,7 +446,7 @@
#endif /* CONFIG_PMAC_PBOOK */
}
-static struct pci_device_id chipsfb_pci_tbl[] __devinitdata = {
+static struct pci_device_id chipsfb_pci_tbl[] = {
{ PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_65550, PCI_ANY_ID, PCI_ANY_ID },
{ 0 }
};
diff -Nru a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
--- a/drivers/video/console/Kconfig Sun Aug 3 13:14:46 2003
+++ b/drivers/video/console/Kconfig Sun Aug 3 13:14:46 2003
@@ -5,8 +5,9 @@
menu "Console display driver support"
config VGA_CONSOLE
- bool "VGA text console"
+ bool "VGA text console" if EMBEDDED || !X86
depends on !ARCH_ACORN && !ARCH_EBSA110 || !4xx && !8xx
+ default y
help
Saying Y here will allow you to use Linux in text mode through a
display that complies with the generic VGA standard. Virtually
diff -Nru a/drivers/video/console/sticore.c b/drivers/video/console/sticore.c
--- a/drivers/video/console/sticore.c Sun Aug 3 13:14:46 2003
+++ b/drivers/video/console/sticore.c Sun Aug 3 13:14:46 2003
@@ -1003,7 +1003,7 @@
}
-static struct pci_device_id sti_pci_tbl[] __devinitdata = {
+static struct pci_device_id sti_pci_tbl[] = {
{ PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_VISUALIZE_EG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_VISUALIZE_FX6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_VISUALIZE_FX4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
diff -Nru a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
--- a/drivers/video/cyber2000fb.c Sun Aug 3 13:14:46 2003
+++ b/drivers/video/cyber2000fb.c Sun Aug 3 13:14:46 2003
@@ -1683,7 +1683,7 @@
return 0;
}
-static struct pci_device_id cyberpro_pci_table[] __devinitdata = {
+static struct pci_device_id cyberpro_pci_table[] = {
// Not yet
// { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
// PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_IGA_1682 },
diff -Nru a/drivers/video/fbmem.c b/drivers/video/fbmem.c
--- a/drivers/video/fbmem.c Sun Aug 3 13:14:44 2003
+++ b/drivers/video/fbmem.c Sun Aug 3 13:14:44 2003
@@ -214,6 +214,9 @@
#ifdef CONFIG_FB_RIVA
{ "rivafb", rivafb_init, rivafb_setup },
#endif
+#ifdef CONFIG_FB_3DFX
+ { "tdfxfb", tdfxfb_init, tdfxfb_setup },
+#endif
#ifdef CONFIG_FB_RADEON
{ "radeonfb", radeonfb_init, radeonfb_setup },
#endif
@@ -294,9 +297,6 @@
* Chipset specific drivers that don't use resource management (yet)
*/
-#ifdef CONFIG_FB_3DFX
- { "tdfxfb", tdfxfb_init, tdfxfb_setup },
-#endif
#ifdef CONFIG_FB_SGIVW
{ "sgivwfb", sgivwfb_init, sgivwfb_setup },
#endif
diff -Nru a/drivers/video/i810/i810_main.c b/drivers/video/i810/i810_main.c
--- a/drivers/video/i810/i810_main.c Sun Aug 3 13:14:47 2003
+++ b/drivers/video/i810/i810_main.c Sun Aug 3 13:14:47 2003
@@ -56,6 +56,57 @@
#include "i810.h"
#include "i810_main.h"
+/* PCI */
+static const char *i810_pci_list[] __initdata = {
+ "Intel(R) 810 Framebuffer Device" ,
+ "Intel(R) 810-DC100 Framebuffer Device" ,
+ "Intel(R) 810E Framebuffer Device" ,
+ "Intel(R) 815 (Internal Graphics 100Mhz FSB) Framebuffer Device" ,
+ "Intel(R) 815 (Internal Graphics only) Framebuffer Device" ,
+ "Intel(R) 815 (Internal Graphics with AGP) Framebuffer Device"
+};
+
+static struct pci_device_id i810fb_pci_tbl[] __initdata = {
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_IG,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
+ /* mvo: added i815 PCI-ID */
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_100,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_NOAGP,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_CGC,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
+ { 0 },
+};
+
+static struct pci_driver i810fb_driver = {
+ .name = "i810fb",
+ .id_table = i810fb_pci_tbl,
+ .probe = i810fb_init_pci,
+ .remove = __exit_p(i810fb_remove_pci),
+ .suspend = i810fb_suspend,
+ .resume = i810fb_resume,
+};
+
+static int vram __initdata = 4;
+static int bpp __initdata = 8;
+static int mtrr __initdata = 0;
+static int accel __initdata = 0;
+static int hsync1 __initdata = 0;
+static int hsync2 __initdata = 0;
+static int vsync1 __initdata = 0;
+static int vsync2 __initdata = 0;
+static int xres __initdata = 640;
+static int yres __initdata = 480;
+static int vyres __initdata = 0;
+static int sync __initdata = 0;
+static int ext_vga __initdata = 0;
+static int dcolor __initdata = 0;
+
/*------------------------------------------------------------*/
/**************************************************************
diff -Nru a/drivers/video/i810/i810_main.h b/drivers/video/i810/i810_main.h
--- a/drivers/video/i810/i810_main.h Sun Aug 3 13:14:49 2003
+++ b/drivers/video/i810/i810_main.h Sun Aug 3 13:14:49 2003
@@ -14,61 +14,11 @@
#ifndef __I810_MAIN_H__
#define __I810_MAIN_H__
-/* PCI */
-static const char *i810_pci_list[] __initdata = {
- "Intel(R) 810 Framebuffer Device" ,
- "Intel(R) 810-DC100 Framebuffer Device" ,
- "Intel(R) 810E Framebuffer Device" ,
- "Intel(R) 815 (Internal Graphics 100Mhz FSB) Framebuffer Device" ,
- "Intel(R) 815 (Internal Graphics only) Framebuffer Device" ,
- "Intel(R) 815 (Internal Graphics with AGP) Framebuffer Device"
-};
-
-static struct pci_device_id i810fb_pci_tbl[] __initdata = {
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_IG,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
- /* mvo: added i815 PCI-ID */
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_100,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_NOAGP,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_CGC,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }
-};
-
static int __init i810fb_init_pci (struct pci_dev *dev,
const struct pci_device_id *entry);
static void __exit i810fb_remove_pci(struct pci_dev *dev);
static int i810fb_resume(struct pci_dev *dev);
static int i810fb_suspend(struct pci_dev *dev, u32 state);
-
-static struct pci_driver i810fb_driver = {
- .name = "i810fb",
- .id_table = i810fb_pci_tbl,
- .probe = i810fb_init_pci,
- .remove = __exit_p(i810fb_remove_pci),
- .suspend = i810fb_suspend,
- .resume = i810fb_resume,
-};
-
-static int vram __initdata = 4;
-static int bpp __initdata = 8;
-static int mtrr __initdata = 0;
-static int accel __initdata = 0;
-static int hsync1 __initdata = 0;
-static int hsync2 __initdata = 0;
-static int vsync1 __initdata = 0;
-static int vsync2 __initdata = 0;
-static int xres __initdata = 640;
-static int yres __initdata = 480;
-static int vyres __initdata = 0;
-static int sync __initdata = 0;
-static int ext_vga __initdata = 0;
-static int dcolor __initdata = 0;
/*
* voffset - framebuffer offset in MiB from aperture start address. In order for
diff -Nru a/drivers/video/imsttfb.c b/drivers/video/imsttfb.c
--- a/drivers/video/imsttfb.c Sun Aug 3 13:14:48 2003
+++ b/drivers/video/imsttfb.c Sun Aug 3 13:14:48 2003
@@ -1316,7 +1316,7 @@
}
}
-static struct pci_device_id imsttfb_pci_tbl[] __devinitdata = {
+static struct pci_device_id imsttfb_pci_tbl[] = {
{ PCI_VENDOR_ID_IMS, PCI_DEVICE_ID_IMS_TT128,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, IBM },
{ PCI_VENDOR_ID_IMS, PCI_DEVICE_ID_IMS_TT3D,
diff -Nru a/drivers/video/logo/Makefile b/drivers/video/logo/Makefile
--- a/drivers/video/logo/Makefile Sun Aug 3 13:14:50 2003
+++ b/drivers/video/logo/Makefile Sun Aug 3 13:14:50 2003
@@ -13,6 +13,18 @@
obj-$(CONFIG_LOGO_SUPERH_VGA16) += logo_superh_vga16.o
obj-$(CONFIG_LOGO_SUPERH_CLUT224) += logo_superh_clut224.o
+# Dependencies on generated files need to be listed explicitly
+
+$(obj)/%_mono.o: $(src)/%_mono.c
+
+$(obj)/%_vga16.o: $(src)/%_vga16.c
+
+$(obj)/%_clut224.o: $(src)/%_clut224.c
+
+$(obj)/%_gray256.o: $(src)/%_gray256.c
+
+# How to generate them
+
$(obj)/%_mono.c: $(src)/%_mono.pbm
$(objtree)/scripts/pnmtologo -t mono -n $*_mono -o $@ $<
diff -Nru a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c
--- a/drivers/video/matrox/matroxfb_base.c Sun Aug 3 13:14:50 2003
+++ b/drivers/video/matrox/matroxfb_base.c Sun Aug 3 13:14:50 2003
@@ -1070,7 +1070,7 @@
memset(&r, 0, sizeof(r));
strcpy(r.driver, "matroxfb");
strcpy(r.card, "Matrox");
- sprintf(r.bus_info, "PCI:%s", ACCESS_FBINFO(pcidev)->slot_name);
+ sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
r.version = KERNEL_VERSION(1,0,0);
r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
if (copy_to_user((void*)arg, &r, sizeof(r)))
@@ -2012,7 +2012,7 @@
matroxfb_remove(PMINFO 1);
}
-static struct pci_device_id matroxfb_devices[] __devinitdata = {
+static struct pci_device_id matroxfb_devices[] = {
#ifdef CONFIG_FB_MATROX_MILLENIUM
{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
diff -Nru a/drivers/video/neofb.c b/drivers/video/neofb.c
--- a/drivers/video/neofb.c Sun Aug 3 13:14:49 2003
+++ b/drivers/video/neofb.c Sun Aug 3 13:14:49 2003
@@ -2065,7 +2065,7 @@
}
}
-static struct pci_device_id neofb_devices[] __devinitdata = {
+static struct pci_device_id neofb_devices[] = {
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
diff -Nru a/drivers/video/radeonfb.c b/drivers/video/radeonfb.c
--- a/drivers/video/radeonfb.c Sun Aug 3 13:14:52 2003
+++ b/drivers/video/radeonfb.c Sun Aug 3 13:14:52 2003
@@ -185,7 +185,7 @@
};
-static struct pci_device_id radeonfb_pci_table[] __devinitdata = {
+static struct pci_device_id radeonfb_pci_table[] = {
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QD},
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QE},
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QF},
diff -Nru a/drivers/video/riva/fbdev.c b/drivers/video/riva/fbdev.c
--- a/drivers/video/riva/fbdev.c Sun Aug 3 13:14:50 2003
+++ b/drivers/video/riva/fbdev.c Sun Aug 3 13:14:50 2003
@@ -193,7 +193,7 @@
{ "Quadro4-700-XGL", NV_ARCH_20 }
};
-static struct pci_device_id rivafb_pci_tbl[] __initdata = {
+static struct pci_device_id rivafb_pci_tbl[] = {
{ PCI_VENDOR_ID_NVIDIA_SGS, PCI_DEVICE_ID_NVIDIA_SGS_RIVA128,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_128 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT,
diff -Nru a/drivers/video/sstfb.c b/drivers/video/sstfb.c
--- a/drivers/video/sstfb.c Sun Aug 3 13:14:49 2003
+++ b/drivers/video/sstfb.c Sun Aug 3 13:14:49 2003
@@ -1554,7 +1554,7 @@
}
-static struct pci_device_id sstfb_id_tbl[] __devinitdata = {
+static struct pci_device_id sstfb_id_tbl[] = {
{ PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_VOODOO1 },
{ PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO2,
diff -Nru a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c
--- a/drivers/video/tdfxfb.c Sun Aug 3 13:14:46 2003
+++ b/drivers/video/tdfxfb.c Sun Aug 3 13:14:46 2003
@@ -1,3 +1,4 @@
+
/*
*
* tdfxfb.c
@@ -128,7 +129,7 @@
static int tdfxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id);
static void tdfxfb_remove(struct pci_dev *pdev);
-static struct pci_device_id tdfxfb_id_table[] __devinitdata = {
+static struct pci_device_id tdfxfb_id_table[] = {
{ PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE,
PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
0xff0000, 0 },
@@ -177,7 +178,7 @@
.fb_pan_display = tdfxfb_pan_display,
.fb_fillrect = tdfxfb_fillrect,
.fb_copyarea = tdfxfb_copyarea,
- .fb_imageblit = cfb_imageblit,
+ .fb_imageblit = tdfxfb_imageblit,
.fb_sync = banshee_wait_idle,
.fb_cursor = soft_cursor,
};
@@ -316,7 +317,9 @@
static inline void banshee_make_room(struct tdfx_par *par, int size)
{
- while((tdfx_inl(par, STATUS) & 0x1f) < size);
+ /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
+ * won't quit if you ask for more. */
+ while((tdfx_inl(par, STATUS) & 0x1f) < size-1);
}
static int banshee_wait_idle(struct fb_info *info)
@@ -746,6 +749,7 @@
#if defined(__BIG_ENDIAN)
switch (info->var.bits_per_pixel) {
case 8:
+ case 24:
reg.miscinit0 &= ~(1 << 30);
reg.miscinit0 &= ~(1 << 31);
break;
@@ -753,7 +757,6 @@
reg.miscinit0 |= (1 << 30);
reg.miscinit0 |= (1 << 31);
break;
- case 24:
case 32:
reg.miscinit0 |= (1 << 30);
reg.miscinit0 &= ~(1 << 31);
@@ -771,6 +774,9 @@
return 0;
}
+/* A handy macro shamelessly pinched from matroxfb */
+#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
+
static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
unsigned blue,unsigned transp,struct fb_info *info)
{
@@ -788,13 +794,10 @@
break;
/* Truecolor has no hardware color palettes. */
case FB_VISUAL_TRUECOLOR:
- rgbcol = (red << info->var.red.offset) |
- (green << info->var.green.offset) |
- (blue << info->var.blue.offset) |
- (transp << info->var.transp.offset);
- if (info->var.bits_per_pixel <= 16)
- ((u16*)(info->pseudo_palette))[regno] = rgbcol;
- else
+ rgbcol = (CNVT_TOHW( red, info->var.red.length) << info->var.red.offset) |
+ (CNVT_TOHW( green, info->var.green.length) << info->var.green.offset) |
+ (CNVT_TOHW( blue, info->var.blue.length) << info->var.blue.offset) |
+ (CNVT_TOHW( transp, info->var.transp.length) << info->var.transp.offset);
((u32*)(info->pseudo_palette))[regno] = rgbcol;
break;
default:
@@ -934,6 +937,7 @@
{
struct tdfx_par *par = (struct tdfx_par *) info->par;
int size = image->height * ((image->width * image->depth + 7)>>3);
+ int fifo_free;
int i, stride = info->fix.line_length;
u32 bpp = info->var.bits_per_pixel;
u32 dstfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13);
@@ -946,10 +950,22 @@
cfb_imageblit(info, image);
return;
} else {
- banshee_make_room(par, 8 + ((size + 3) >> 2));
+ banshee_make_room(par, 8);
+ switch (info->fix.visual) {
+ case FB_VISUAL_PSEUDOCOLOR:
tdfx_outl(par, COLORFORE, image->fg_color);
tdfx_outl(par, COLORBACK, image->bg_color);
+ break;
+ case FB_VISUAL_TRUECOLOR:
+ default:
+ tdfx_outl(par, COLORFORE, ((u32*)(info->pseudo_palette))[image->fg_color]);
+ tdfx_outl(par, COLORBACK, ((u32*)(info->pseudo_palette))[image->bg_color]);
+ }
+#ifdef __BIG_ENDIAN
+ srcfmt = 0x400000 | BIT(20);
+#else
srcfmt = 0x400000;
+#endif
}
tdfx_outl(par, SRCXY, 0);
@@ -959,13 +975,22 @@
tdfx_outl(par, DSTFORMAT, dstfmt);
tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
+ /* A count of how many free FIFO entries we've requested.
+ * When this goes negative, we need to request more. */
+ fifo_free = 0;
+
/* Send four bytes at a time of data */
for (i = (size >> 2) ; i > 0; i--) {
+ if(--fifo_free < 0) {
+ fifo_free=31;
+ banshee_make_room(par,fifo_free);
+ }
tdfx_outl(par, LAUNCH_2D,*(u32*)chardata);
chardata += 4;
}
/* Send the leftovers now */
+ banshee_make_room(par,3);
i = size%4;
switch (i) {
case 0: break;
diff -Nru a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c
--- a/drivers/video/tridentfb.c Sun Aug 3 13:14:48 2003
+++ b/drivers/video/tridentfb.c Sun Aug 3 13:14:48 2003
@@ -1176,7 +1176,7 @@
}
/* List of boards that we are trying to support */
-static struct pci_device_id trident_devices[] __devinitdata = {
+static struct pci_device_id trident_devices[] = {
{PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
{PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
{PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
diff -Nru a/fs/Makefile b/fs/Makefile
--- a/fs/Makefile Sun Aug 3 13:14:49 2003
+++ b/fs/Makefile Sun Aug 3 13:14:49 2003
@@ -12,15 +12,11 @@
filesystems.o namespace.o seq_file.o xattr.o libfs.o \
fs-writeback.o mpage.o direct-io.o aio.o
-obj-$(CONFIG_EPOLL) += eventpoll.o
+obj-$(CONFIG_EPOLL) += eventpoll.o
+obj-$(CONFIG_COMPAT) += compat.o
-obj-$(CONFIG_COMPAT) += compat.o
-
-ifneq ($(CONFIG_NFSD),n)
-ifneq ($(CONFIG_NFSD),)
-obj-y += nfsctl.o
-endif
-endif
+nfsd-$(CONFIG_NFSD) := nfsctl.o
+obj-y += $(nfsd-y) $(nfsd-m)
obj-$(CONFIG_BINFMT_AOUT) += binfmt_aout.o
obj-$(CONFIG_BINFMT_EM86) += binfmt_em86.o
@@ -74,7 +70,7 @@
obj-$(CONFIG_NLS) += nls/
obj-$(CONFIG_SYSV_FS) += sysv/
obj-$(CONFIG_SMB_FS) += smbfs/
-obj-$(CONFIG_CIFS) += cifs/
+obj-$(CONFIG_CIFS) += cifs/
obj-$(CONFIG_NCP_FS) += ncpfs/
obj-$(CONFIG_HPFS_FS) += hpfs/
obj-$(CONFIG_NTFS_FS) += ntfs/
diff -Nru a/fs/binfmt_flat.c b/fs/binfmt_flat.c
--- a/fs/binfmt_flat.c Sun Aug 3 13:14:44 2003
+++ b/fs/binfmt_flat.c Sun Aug 3 13:14:44 2003
@@ -501,7 +501,7 @@
extra = max(bss_len + stack_len, relocs * sizeof(unsigned long));
/*
- * there are a couple of cases here, the seperate code/data
+ * there are a couple of cases here, the separate code/data
* case, and then the fully copied to RAM case which lumps
* it all together.
*/
diff -Nru a/fs/binfmt_misc.c b/fs/binfmt_misc.c
--- a/fs/binfmt_misc.c Sun Aug 3 13:14:47 2003
+++ b/fs/binfmt_misc.c Sun Aug 3 13:14:47 2003
@@ -62,7 +62,7 @@
*/
static Node *check_file(struct linux_binprm *bprm)
{
- char *p = strrchr(bprm->filename, '.');
+ char *p = strrchr(bprm->interp, '.');
struct list_head *l;
list_for_each(l, &entries) {
@@ -127,13 +127,13 @@
if (!(fmt->flags & MISC_FMT_PRESERVE_ARGV0)) {
remove_arg_zero(bprm);
}
- retval = copy_strings_kernel(1, &bprm->filename, bprm);
+ retval = copy_strings_kernel(1, &bprm->interp, bprm);
if (retval < 0) goto _ret;
bprm->argc++;
retval = copy_strings_kernel(1, &iname_addr, bprm);
if (retval < 0) goto _ret;
bprm->argc++;
- bprm->filename = iname; /* for binfmt_script */
+ bprm->interp = iname; /* for binfmt_script */
file = open_exec(iname);
retval = PTR_ERR(file);
diff -Nru a/fs/binfmt_script.c b/fs/binfmt_script.c
--- a/fs/binfmt_script.c Sun Aug 3 13:14:45 2003
+++ b/fs/binfmt_script.c Sun Aug 3 13:14:45 2003
@@ -69,7 +69,7 @@
* user environment and arguments are stored.
*/
remove_arg_zero(bprm);
- retval = copy_strings_kernel(1, &bprm->filename, bprm);
+ retval = copy_strings_kernel(1, &bprm->interp, bprm);
if (retval < 0) return retval;
bprm->argc++;
if (i_arg) {
@@ -80,6 +80,8 @@
retval = copy_strings_kernel(1, &i_name, bprm);
if (retval) return retval;
bprm->argc++;
+ bprm->interp = interp;
+
/*
* OK, now restart the process with the interpreter's dentry.
*/
diff -Nru a/fs/block_dev.c b/fs/block_dev.c
--- a/fs/block_dev.c Sun Aug 3 13:14:53 2003
+++ b/fs/block_dev.c Sun Aug 3 13:14:53 2003
@@ -125,7 +125,7 @@
struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
return blockdev_direct_IO(rw, iocb, inode, inode->i_bdev, iov, offset,
- nr_segs, blkdev_get_blocks);
+ nr_segs, blkdev_get_blocks, NULL);
}
static int blkdev_writepage(struct page *page, struct writeback_control *wbc)
diff -Nru a/fs/buffer.c b/fs/buffer.c
--- a/fs/buffer.c Sun Aug 3 13:14:49 2003
+++ b/fs/buffer.c Sun Aug 3 13:14:49 2003
@@ -91,6 +91,7 @@
{
wait_queue_head_t *wq = bh_waitq_head(bh);
+ smp_mb();
if (waitqueue_active(wq))
wake_up_all(wq);
}
@@ -414,6 +415,9 @@
bh = bh->b_this_page;
} while (bh != head);
buffer_error();
+ printk("block=%llu, b_blocknr=%llu\n",
+ (unsigned long long)block, (unsigned long long)bh->b_blocknr);
+ printk("b_state=0x%08lx, b_size=%u\n", bh->b_state, bh->b_size);
out_unlock:
spin_unlock(&bd_mapping->private_lock);
page_cache_release(page);
@@ -502,7 +506,8 @@
set_buffer_uptodate(bh);
} else {
clear_buffer_uptodate(bh);
- buffer_io_error(bh);
+ if (!(current->flags & PF_READAHEAD))
+ buffer_io_error(bh);
SetPageError(page);
}
diff -Nru a/fs/cramfs/inode.c b/fs/cramfs/inode.c
--- a/fs/cramfs/inode.c Sun Aug 3 13:14:44 2003
+++ b/fs/cramfs/inode.c Sun Aug 3 13:14:44 2003
@@ -43,7 +43,7 @@
static struct inode *get_cramfs_inode(struct super_block *sb, struct cramfs_inode * cramfs_inode)
{
struct inode * inode = new_inode(sb);
- static struct timespec zerotime = { 0, 0 };
+ static struct timespec zerotime;
if (inode) {
inode->i_mode = cramfs_inode->mode;
diff -Nru a/fs/devfs/base.c b/fs/devfs/base.c
--- a/fs/devfs/base.c Sun Aug 3 13:14:46 2003
+++ b/fs/devfs/base.c Sun Aug 3 13:14:46 2003
@@ -2221,46 +2221,8 @@
{
devfs_handle_t de;
wait_queue_head_t wait_queue;
- atomic_t count;
};
-static struct devfs_lookup_struct *
-new_devfs_lookup_struct(void)
-{
- struct devfs_lookup_struct *p = kmalloc(sizeof(*p), GFP_KERNEL);
-
- if (!p)
- return NULL;
-
- init_waitqueue_head (&p->wait_queue);
- atomic_set(&p->count, 1);
- return p;
-}
-
-static void
-get_devfs_lookup_struct(struct devfs_lookup_struct *info)
-{
- if (info)
- atomic_inc(&info->count);
- else {
- printk(KERN_ERR "null devfs_lookup_struct pointer\n");
- dump_stack();
- }
-}
-
-static void
-put_devfs_lookup_struct(struct devfs_lookup_struct *info)
-{
- if (info) {
- if (!atomic_dec_and_test(&info->count))
- return;
- kfree(info);
- } else {
- printk(KERN_ERR "null devfs_lookup_struct pointer\n");
- dump_stack();
- }
-}
-
/* XXX: this doesn't handle the case where we got a negative dentry
but a devfs entry has been registered in the meanwhile */
static int devfs_d_revalidate_wait (struct dentry *dentry, struct nameidata *nd)
@@ -2303,13 +2265,19 @@
read_lock (&parent->u.dir.lock);
if (dentry->d_fsdata)
{
- get_devfs_lookup_struct(lookup_info);
set_current_state (TASK_UNINTERRUPTIBLE);
add_wait_queue (&lookup_info->wait_queue, &wait);
read_unlock (&parent->u.dir.lock);
schedule ();
- remove_wait_queue (&lookup_info->wait_queue, &wait);
- put_devfs_lookup_struct(lookup_info);
+ /*
+ * This does not need nor should remove wait from wait_queue.
+ * Wait queue head is never reused - nothing is ever added to it
+ * after all waiters have been waked up and head itself disappears
+ * very soon after it. Moreover it is local variable on stack that
+ * is likely to have already disappeared so any reference to it
+ * at this point is buggy.
+ */
+
}
else read_unlock (&parent->u.dir.lock);
return 1;
@@ -2321,7 +2289,7 @@
static struct dentry *devfs_lookup (struct inode *dir, struct dentry *dentry, struct nameidata *nd)
{
struct devfs_entry tmp; /* Must stay in scope until devfsd idle again */
- struct devfs_lookup_struct *lookup_info;
+ struct devfs_lookup_struct lookup_info;
struct fs_info *fs_info = dir->i_sb->s_fs_info;
struct devfs_entry *parent, *de;
struct inode *inode;
@@ -2338,10 +2306,9 @@
read_lock (&parent->u.dir.lock);
de = _devfs_search_dir (parent, dentry->d_name.name, dentry->d_name.len);
read_unlock (&parent->u.dir.lock);
- lookup_info = new_devfs_lookup_struct();
- if (!lookup_info) return ERR_PTR(-ENOMEM);
- lookup_info->de = de;
- dentry->d_fsdata = lookup_info;
+ lookup_info.de = de;
+ init_waitqueue_head (&lookup_info.wait_queue);
+ dentry->d_fsdata = &lookup_info;
if (de == NULL)
{ /* Try with devfsd. For any kind of failure, leave a negative dentry
so someone else can deal with it (in the case where the sysadmin
@@ -2351,7 +2318,6 @@
if (try_modload (parent, fs_info,
dentry->d_name.name, dentry->d_name.len, &tmp) < 0)
{ /* Lookup event was not queued to devfsd */
- put_devfs_lookup_struct(lookup_info);
d_add (dentry, NULL);
return NULL;
}
@@ -2363,7 +2329,7 @@
revalidation */
up (&dir->i_sem);
wait_for_devfsd_finished (fs_info); /* If I'm not devfsd, must wait */
- de = lookup_info->de;
+ de = lookup_info.de;
/* If someone else has been so kind as to make the inode, we go home
early */
if (dentry->d_inode) goto out;
@@ -2390,8 +2356,7 @@
write_lock (&parent->u.dir.lock);
dentry->d_op = &devfs_dops;
dentry->d_fsdata = NULL;
- wake_up (&lookup_info->wait_queue);
- put_devfs_lookup_struct(lookup_info);
+ wake_up (&lookup_info.wait_queue);
write_unlock (&parent->u.dir.lock);
down (&dir->i_sem); /* Grab it again because them's the rules */
devfs_put (de);
diff -Nru a/fs/direct-io.c b/fs/direct-io.c
--- a/fs/direct-io.c Sun Aug 3 13:14:49 2003
+++ b/fs/direct-io.c Sun Aug 3 13:14:49 2003
@@ -15,6 +15,8 @@
* added support for non-aligned IO.
* 06Nov2002 pbadari@us.ibm.com
* added asynchronous IO support.
+ * 21Jul2003 nathans@sgi.com
+ * added IO completion notifier.
*/
#include <linux/kernel.h>
@@ -74,6 +76,7 @@
int boundary; /* prev block is at a boundary */
int reap_counter; /* rate limit reaping */
get_blocks_t *get_blocks; /* block mapping function */
+ dio_iodone_t *end_io; /* IO completion function */
sector_t final_block_in_bio; /* current final block in bio + 1 */
sector_t next_block_for_io; /* next block to be put under IO,
in dio_blocks units */
@@ -193,13 +196,27 @@
}
/*
+ * Called when all DIO BIO I/O has been completed - let the filesystem
+ * know, if it registered an interest earlier via get_blocks. Pass the
+ * private field of the map buffer_head so that filesystems can use it
+ * to hold additional state between get_blocks calls and dio_complete.
+ */
+static void dio_complete(struct dio *dio, loff_t offset, ssize_t bytes)
+{
+ if (dio->end_io)
+ dio->end_io(dio->inode, offset, bytes, dio->map_bh.b_private);
+}
+
+/*
* Called when a BIO has been processed. If the count goes to zero then IO is
* complete and we can signal this to the AIO layer.
*/
static void finished_one_bio(struct dio *dio)
{
if (atomic_dec_and_test(&dio->bio_count)) {
- if(dio->is_async) {
+ if (dio->is_async) {
+ dio_complete(dio, dio->block_in_file << dio->blkbits,
+ dio->result);
aio_complete(dio->iocb, dio->result, 0);
kfree(dio);
}
@@ -824,7 +841,7 @@
static int
direct_io_worker(int rw, struct kiocb *iocb, struct inode *inode,
const struct iovec *iov, loff_t offset, unsigned long nr_segs,
- unsigned blkbits, get_blocks_t get_blocks)
+ unsigned blkbits, get_blocks_t get_blocks, dio_iodone_t end_io)
{
unsigned long user_addr;
int seg;
@@ -852,6 +869,8 @@
dio->boundary = 0;
dio->reap_counter = 0;
dio->get_blocks = get_blocks;
+ dio->end_io = end_io;
+ dio->map_bh.b_private = NULL;
dio->final_block_in_bio = -1;
dio->next_block_for_io = -1;
@@ -953,6 +972,7 @@
if (rw == READ && (offset + ret > i_size))
ret = i_size - offset;
}
+ dio_complete(dio, offset, ret);
kfree(dio);
}
return ret;
@@ -964,7 +984,7 @@
int
blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
struct block_device *bdev, const struct iovec *iov, loff_t offset,
- unsigned long nr_segs, get_blocks_t get_blocks)
+ unsigned long nr_segs, get_blocks_t get_blocks, dio_iodone_t end_io)
{
int seg;
size_t size;
@@ -999,7 +1019,7 @@
}
retval = direct_io_worker(rw, iocb, inode, iov, offset,
- nr_segs, blkbits, get_blocks);
+ nr_segs, blkbits, get_blocks, end_io);
out:
return retval;
}
diff -Nru a/fs/exec.c b/fs/exec.c
--- a/fs/exec.c Sun Aug 3 13:14:47 2003
+++ b/fs/exec.c Sun Aug 3 13:14:47 2003
@@ -1053,6 +1053,7 @@
bprm.file = file;
bprm.filename = filename;
+ bprm.interp = filename;
bprm.sh_bang = 0;
bprm.loader = 0;
bprm.exec = 0;
diff -Nru a/fs/ext2/inode.c b/fs/ext2/inode.c
--- a/fs/ext2/inode.c Sun Aug 3 13:14:45 2003
+++ b/fs/ext2/inode.c Sun Aug 3 13:14:45 2003
@@ -106,7 +106,7 @@
static int ext2_alloc_block (struct inode * inode, unsigned long goal, int *err)
{
#ifdef EXT2FS_DEBUG
- static unsigned long alloc_hits = 0, alloc_attempts = 0;
+ static unsigned long alloc_hits, alloc_attempts;
#endif
unsigned long result;
@@ -662,7 +662,7 @@
struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
return blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iov,
- offset, nr_segs, ext2_get_blocks);
+ offset, nr_segs, ext2_get_blocks, NULL);
}
static int
diff -Nru a/fs/ext3/balloc.c b/fs/ext3/balloc.c
--- a/fs/ext3/balloc.c Sun Aug 3 13:14:45 2003
+++ b/fs/ext3/balloc.c Sun Aug 3 13:14:45 2003
@@ -498,7 +498,7 @@
struct ext3_super_block *es;
struct ext3_sb_info *sbi;
#ifdef EXT3FS_DEBUG
- static int goal_hits = 0, goal_attempts = 0;
+ static int goal_hits, goal_attempts;
#endif
*errp = -ENOSPC;
sb = inode->i_sb;
diff -Nru a/fs/ext3/inode.c b/fs/ext3/inode.c
--- a/fs/ext3/inode.c Sun Aug 3 13:14:50 2003
+++ b/fs/ext3/inode.c Sun Aug 3 13:14:50 2003
@@ -267,7 +267,7 @@
#ifdef EXT3_PREALLOCATE
#ifdef EXT3FS_DEBUG
- static unsigned long alloc_hits = 0, alloc_attempts = 0;
+ static unsigned long alloc_hits, alloc_attempts;
#endif
struct ext3_inode_info *ei = EXT3_I(inode);
/* Writer: ->i_prealloc* */
@@ -938,15 +938,15 @@
lock_buffer(bh);
BUFFER_TRACE(bh, "call get_create_access");
fatal = ext3_journal_get_create_access(handle, bh);
- if (!fatal) {
- memset(bh->b_data, 0,
- inode->i_sb->s_blocksize);
+ if (!fatal && !buffer_uptodate(bh)) {
+ memset(bh->b_data, 0, inode->i_sb->s_blocksize);
set_buffer_uptodate(bh);
}
unlock_buffer(bh);
BUFFER_TRACE(bh, "call ext3_journal_dirty_metadata");
err = ext3_journal_dirty_metadata(handle, bh);
- if (!fatal) fatal = err;
+ if (!fatal)
+ fatal = err;
} else {
BUFFER_TRACE(bh, "not a new buffer");
}
@@ -1562,7 +1562,8 @@
}
ret = blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iov,
- offset, nr_segs, ext3_direct_io_get_blocks);
+ offset, nr_segs,
+ ext3_direct_io_get_blocks, NULL);
out_stop:
if (handle) {
@@ -2337,26 +2338,114 @@
}
/*
- * ext3_get_inode_loc returns with an extra refcount against the
- * inode's underlying buffer_head on success.
+ * ext3_get_inode_loc returns with an extra refcount against the inode's
+ * underlying buffer_head on success. If `in_mem' is false then we're purely
+ * trying to determine the inode's location on-disk and no read need be
+ * performed.
*/
-
-int ext3_get_inode_loc (struct inode *inode, struct ext3_iloc *iloc)
+static int ext3_get_inode_loc(struct inode *inode,
+ struct ext3_iloc *iloc, int in_mem)
{
unsigned long block;
+ struct buffer_head *bh;
block = ext3_get_inode_block(inode->i_sb, inode->i_ino, iloc);
- if (block) {
- struct buffer_head *bh = sb_bread(inode->i_sb, block);
- if (bh) {
- iloc->bh = bh;
- return 0;
- }
+ if (!block)
+ return -EIO;
+
+ bh = sb_getblk(inode->i_sb, block);
+ if (!bh) {
ext3_error (inode->i_sb, "ext3_get_inode_loc",
- "unable to read inode block - "
- "inode=%lu, block=%lu", inode->i_ino, block);
+ "unable to read inode block - "
+ "inode=%lu, block=%lu", inode->i_ino, block);
+ return -EIO;
+ }
+ if (!buffer_uptodate(bh)) {
+ lock_buffer(bh);
+ if (buffer_uptodate(bh)) {
+ /* someone brought it uptodate while we waited */
+ unlock_buffer(bh);
+ goto has_buffer;
+ }
+
+ /* we can't skip I/O if inode is on a disk only */
+ if (in_mem) {
+ struct buffer_head *bitmap_bh;
+ struct ext3_group_desc *desc;
+ int inodes_per_buffer;
+ int inode_offset, i;
+ int block_group;
+ int start;
+
+ /*
+ * If this is the only valid inode in the block we
+ * need not read the block.
+ */
+ block_group = (inode->i_ino - 1) /
+ EXT3_INODES_PER_GROUP(inode->i_sb);
+ inodes_per_buffer = bh->b_size /
+ EXT3_INODE_SIZE(inode->i_sb);
+ inode_offset = ((inode->i_ino - 1) %
+ EXT3_INODES_PER_GROUP(inode->i_sb));
+ start = inode_offset & ~(inodes_per_buffer - 1);
+
+ /* Is the inode bitmap in cache? */
+ desc = ext3_get_group_desc(inode->i_sb,
+ block_group, NULL);
+ if (!desc)
+ goto make_io;
+
+ bitmap_bh = sb_getblk(inode->i_sb,
+ le32_to_cpu(desc->bg_inode_bitmap));
+ if (!bitmap_bh)
+ goto make_io;
+
+ /*
+ * If the inode bitmap isn't in cache then the
+ * optimisation may end up performing two reads instead
+ * of one, so skip it.
+ */
+ if (!buffer_uptodate(bitmap_bh)) {
+ brelse(bitmap_bh);
+ goto make_io;
+ }
+ for (i = start; i < start + inodes_per_buffer; i++) {
+ if (i == inode_offset)
+ continue;
+ if (ext3_test_bit(i, bitmap_bh->b_data))
+ break;
+ }
+ brelse(bitmap_bh);
+ if (i == start + inodes_per_buffer) {
+ /* all other inodes are free, so skip I/O */
+ memset(bh->b_data, 0, bh->b_size);
+ set_buffer_uptodate(bh);
+ unlock_buffer(bh);
+ goto has_buffer;
+ }
+ }
+
+make_io:
+ /*
+ * There are another valid inodes in the buffer so we must
+ * read the block from disk
+ */
+ get_bh(bh);
+ bh->b_end_io = end_buffer_io_sync;
+ submit_bh(READ, bh);
+ wait_on_buffer(bh);
+ if (!buffer_uptodate(bh)) {
+ ext3_error(inode->i_sb, "ext3_get_inode_loc",
+ "unable to read inode block - "
+ "inode=%lu, block=%lu",
+ inode->i_ino, block);
+ brelse(bh);
+ return -EIO;
+ }
}
- return -EIO;
+has_buffer:
+ iloc->bh = bh;
+ return 0;
}
void ext3_set_inode_flags(struct inode *inode)
@@ -2376,7 +2465,6 @@
inode->i_flags |= S_DIRSYNC;
}
-
void ext3_read_inode(struct inode * inode)
{
struct ext3_iloc iloc;
@@ -2389,7 +2477,7 @@
ei->i_acl = EXT3_ACL_NOT_CACHED;
ei->i_default_acl = EXT3_ACL_NOT_CACHED;
#endif
- if (ext3_get_inode_loc(inode, &iloc))
+ if (ext3_get_inode_loc(inode, &iloc, 0))
goto bad_inode;
bh = iloc.bh;
raw_inode = ext3_raw_inode(&iloc);
@@ -2793,7 +2881,7 @@
{
int err = 0;
if (handle) {
- err = ext3_get_inode_loc(inode, iloc);
+ err = ext3_get_inode_loc(inode, iloc, 1);
if (!err) {
BUFFER_TRACE(iloc->bh, "get_write_access");
err = ext3_journal_get_write_access(handle, iloc->bh);
@@ -2891,7 +2979,7 @@
int err = 0;
if (handle) {
- err = ext3_get_inode_loc(inode, &iloc);
+ err = ext3_get_inode_loc(inode, &iloc, 1);
if (!err) {
BUFFER_TRACE(iloc.bh, "get_write_access");
err = journal_get_write_access(handle, iloc.bh);
diff -Nru a/fs/ext3/super.c b/fs/ext3/super.c
--- a/fs/ext3/super.c Sun Aug 3 13:14:52 2003
+++ b/fs/ext3/super.c Sun Aug 3 13:14:52 2003
@@ -1811,7 +1811,6 @@
if (down_trylock(&sb->s_lock) == 0)
BUG();
sb->s_dirt = 0;
- journal_start_commit(EXT3_SB(sb)->s_journal, NULL);
}
static int ext3_sync_fs(struct super_block *sb, int wait)
diff -Nru a/fs/fat/cache.c b/fs/fat/cache.c
--- a/fs/fat/cache.c Sun Aug 3 13:14:51 2003
+++ b/fs/fat/cache.c Sun Aug 3 13:14:51 2003
@@ -258,8 +258,8 @@
if (walk->start_cluster == first &&
walk->file_cluster == f_clu) {
if (walk->disk_cluster != d_clu) {
- printk(KERN_ERR "FAT: cache corruption"
- " (ino %lu)\n", inode->i_ino);
+ printk(KERN_ERR "FAT: cache corruption "
+ "(i_pos %lld)\n", MSDOS_I(inode)->i_pos);
__fat_cache_inval_inode(inode);
goto out;
}
@@ -307,7 +307,7 @@
/* prevent the infinite loop of cluster chain */
if (*fclus > limit) {
fat_fs_panic(sb, "%s: detected the cluster chain loop"
- " (i_pos %llu)", __FUNCTION__,
+ " (i_pos %lld)", __FUNCTION__,
MSDOS_I(inode)->i_pos);
return -EIO;
}
@@ -317,7 +317,7 @@
return nr;
else if (nr == FAT_ENT_FREE) {
fat_fs_panic(sb, "%s: invalid cluster chain"
- " (i_pos %llu)", __FUNCTION__,
+ " (i_pos %lld)", __FUNCTION__,
MSDOS_I(inode)->i_pos);
return -EIO;
} else if (nr == FAT_ENT_EOF) {
@@ -343,7 +343,7 @@
if (ret < 0)
return ret;
else if (ret == FAT_ENT_EOF) {
- fat_fs_panic(sb, "%s: request beyond EOF (i_pos %llu)",
+ fat_fs_panic(sb, "%s: request beyond EOF (i_pos %lld)",
__FUNCTION__, MSDOS_I(inode)->i_pos);
return -EIO;
}
@@ -427,8 +427,8 @@
if (nr < 0)
goto error;
else if (nr == FAT_ENT_FREE) {
- fat_fs_panic(sb, "%s: deleting beyond EOF (ino %lu)",
- __FUNCTION__, inode->i_ino);
+ fat_fs_panic(sb, "%s: deleting beyond EOF (i_pos %lld)",
+ __FUNCTION__, MSDOS_I(inode)->i_pos);
nr = -EIO;
goto error;
}
diff -Nru a/fs/fat/dir.c b/fs/fat/dir.c
--- a/fs/fat/dir.c Sun Aug 3 13:14:45 2003
+++ b/fs/fat/dir.c Sun Aug 3 13:14:45 2003
@@ -688,32 +688,6 @@
return ret;
}
-/***** See if directory is empty */
-int fat_dir_empty(struct inode *dir)
-{
- loff_t pos, i_pos;
- struct buffer_head *bh;
- struct msdos_dir_entry *de;
- int result = 0;
-
- pos = 0;
- bh = NULL;
- while (fat_get_entry(dir,&pos,&bh,&de,&i_pos) > -1) {
- /* Ignore vfat longname entries */
- if (de->attr == ATTR_EXT)
- continue;
- if (!IS_FREE(de->name) &&
- strncmp(de->name,MSDOS_DOT , MSDOS_NAME) &&
- strncmp(de->name,MSDOS_DOTDOT, MSDOS_NAME)) {
- result = -ENOTEMPTY;
- break;
- }
- }
-
- brelse(bh);
- return result;
-}
-
/* This assumes that size of cluster is above the 32*slots */
int fat_add_entries(struct inode *dir,int slots, struct buffer_head **bh,
@@ -790,19 +764,75 @@
return 0;
}
+static int fat_get_short_entry(struct inode *dir, loff_t *pos,
+ struct buffer_head **bh,
+ struct msdos_dir_entry **de, loff_t *i_pos)
+{
+ while (fat_get_entry(dir, pos, bh, de, i_pos) >= 0) {
+ /* free entry or long name entry or volume label */
+ if (!IS_FREE((*de)->name) && !((*de)->attr & ATTR_VOLUME))
+ return 0;
+ }
+ return -ENOENT;
+}
+
+/* See if directory is empty */
+int fat_dir_empty(struct inode *dir)
+{
+ struct buffer_head *bh;
+ struct msdos_dir_entry *de;
+ loff_t cpos, i_pos;
+ int result = 0;
+
+ bh = NULL;
+ cpos = 0;
+ while (fat_get_short_entry(dir, &cpos, &bh, &de, &i_pos) >= 0) {
+ if (strncmp(de->name, MSDOS_DOT , MSDOS_NAME) &&
+ strncmp(de->name, MSDOS_DOTDOT, MSDOS_NAME)) {
+ result = -ENOTEMPTY;
+ break;
+ }
+ }
+ brelse(bh);
+ return result;
+}
+
/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-indent-level: 8
- * c-brace-imaginary-offset: 0
- * c-brace-offset: -8
- * c-argdecl-indent: 8
- * c-label-offset: -8
- * c-continued-statement-offset: 8
- * c-continued-brace-offset: 0
- * End:
+ * fat_subdirs counts the number of sub-directories of dir. It can be run
+ * on directories being created.
*/
+int fat_subdirs(struct inode *dir)
+{
+ struct buffer_head *bh;
+ struct msdos_dir_entry *de;
+ loff_t cpos, i_pos;
+ int count = 0;
+
+ bh = NULL;
+ cpos = 0;
+ while (fat_get_short_entry(dir, &cpos, &bh, &de, &i_pos) >= 0) {
+ if (de->attr & ATTR_DIR)
+ count++;
+ }
+ brelse(bh);
+ return count;
+}
+
+/*
+ * Scans a directory for a given file (name points to its formatted name).
+ * Returns an error code or zero.
+ */
+int fat_scan(struct inode *dir, const unsigned char *name,
+ struct buffer_head **bh, struct msdos_dir_entry **de,
+ loff_t *i_pos)
+{
+ loff_t cpos;
+
+ *bh = NULL;
+ cpos = 0;
+ while (fat_get_short_entry(dir, &cpos, bh, de, i_pos) >= 0) {
+ if (!strncmp((*de)->name, name, MSDOS_NAME))
+ return 0;
+ }
+ return -ENOENT;
+}
diff -Nru a/fs/fat/inode.c b/fs/fat/inode.c
--- a/fs/fat/inode.c Sun Aug 3 13:14:48 2003
+++ b/fs/fat/inode.c Sun Aug 3 13:14:48 2003
@@ -1172,7 +1172,7 @@
}
lock_kernel();
if (!(bh = sb_bread(sb, i_pos >> MSDOS_SB(sb)->dir_per_block_bits))) {
- fat_fs_panic(sb, "unable to read i-node block (i_pos %llu)",
+ fat_fs_panic(sb, "unable to read i-node block (i_pos %lld)",
i_pos);
unlock_kernel();
return;
diff -Nru a/fs/fat/misc.c b/fs/fat/misc.c
--- a/fs/fat/misc.c Sun Aug 3 13:14:51 2003
+++ b/fs/fat/misc.c Sun Aug 3 13:14:51 2003
@@ -150,7 +150,7 @@
mark_inode_dirty(inode);
}
if (new_fclus != (inode->i_blocks >> (cluster_bits - 9))) {
- fat_fs_panic(sb, "clusters badly computed (%d != %ld)",
+ fat_fs_panic(sb, "clusters badly computed (%d != %lu)",
new_fclus, inode->i_blocks >> (cluster_bits - 9));
fat_cache_inval_inode(inode);
}
@@ -307,56 +307,4 @@
*i_pos = ((loff_t)phys << sbi->dir_per_block_bits) + (offset >> MSDOS_DIR_BITS);
return 0;
-}
-
-static int fat_get_short_entry(struct inode *dir, loff_t *pos,
- struct buffer_head **bh,
- struct msdos_dir_entry **de, loff_t *i_pos)
-{
- while (fat_get_entry(dir, pos, bh, de, i_pos) >= 0) {
- /* free entry or long name entry or volume label */
- if (!IS_FREE((*de)->name) && !((*de)->attr & ATTR_VOLUME))
- return 0;
- }
- return -ENOENT;
-}
-
-/*
- * fat_subdirs counts the number of sub-directories of dir. It can be run
- * on directories being created.
- */
-int fat_subdirs(struct inode *dir)
-{
- struct buffer_head *bh;
- struct msdos_dir_entry *de;
- loff_t cpos, i_pos;
- int count = 0;
-
- bh = NULL;
- cpos = 0;
- while (fat_get_short_entry(dir, &cpos, &bh, &de, &i_pos) >= 0) {
- if (de->attr & ATTR_DIR)
- count++;
- }
- brelse(bh);
- return count;
-}
-
-/*
- * Scans a directory for a given file (name points to its formatted name).
- * Returns an error code or zero.
- */
-int fat_scan(struct inode *dir, const unsigned char *name,
- struct buffer_head **bh, struct msdos_dir_entry **de,
- loff_t *i_pos)
-{
- loff_t cpos;
-
- *bh = NULL;
- cpos = 0;
- while (fat_get_short_entry(dir, &cpos, bh, de, i_pos) >= 0) {
- if (!strncmp((*de)->name, name, MSDOS_NAME))
- return 0;
- }
- return -ENOENT;
}
diff -Nru a/fs/file_table.c b/fs/file_table.c
--- a/fs/file_table.c Sun Aug 3 13:14:44 2003
+++ b/fs/file_table.c Sun Aug 3 13:14:44 2003
@@ -61,7 +61,7 @@
*/
struct file *get_empty_filp(void)
{
-static int old_max = 0;
+static int old_max;
struct file * f;
/*
diff -Nru a/fs/inode.c b/fs/inode.c
--- a/fs/inode.c Sun Aug 3 13:14:53 2003
+++ b/fs/inode.c Sun Aug 3 13:14:53 2003
@@ -184,6 +184,7 @@
INIT_RADIX_TREE(&inode->i_data.page_tree, GFP_ATOMIC);
spin_lock_init(&inode->i_data.page_lock);
init_MUTEX(&inode->i_data.i_shared_sem);
+ atomic_set(&inode->i_data.truncate_count, 0);
INIT_LIST_HEAD(&inode->i_data.private_list);
spin_lock_init(&inode->i_data.private_lock);
INIT_LIST_HEAD(&inode->i_data.i_mmap);
@@ -685,7 +686,7 @@
ino_t iunique(struct super_block *sb, ino_t max_reserved)
{
- static ino_t counter = 0;
+ static ino_t counter;
struct inode *inode;
struct hlist_head * head;
ino_t res;
diff -Nru a/fs/intermezzo/dir.c b/fs/intermezzo/dir.c
--- a/fs/intermezzo/dir.c Sun Aug 3 13:14:46 2003
+++ b/fs/intermezzo/dir.c Sun Aug 3 13:14:46 2003
@@ -82,7 +82,7 @@
* these are initialized in super.c
*/
extern int presto_permission(struct inode *inode, int mask, struct nameidata *nd);
-static int izo_authorized_uid = 0;
+static int izo_authorized_uid;
int izo_dentry_is_ilookup(struct dentry *dentry, ino_t *id,
unsigned int *generation)
diff -Nru a/fs/intermezzo/fileset.c b/fs/intermezzo/fileset.c
--- a/fs/intermezzo/fileset.c Sun Aug 3 13:14:47 2003
+++ b/fs/intermezzo/fileset.c Sun Aug 3 13:14:47 2003
@@ -22,8 +22,6 @@
*
*/
-#define __NO_VERSION__
-
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/system.h>
diff -Nru a/fs/jbd/commit.c b/fs/jbd/commit.c
--- a/fs/jbd/commit.c Sun Aug 3 13:14:52 2003
+++ b/fs/jbd/commit.c Sun Aug 3 13:14:52 2003
@@ -699,7 +699,6 @@
cp_transaction = jh->b_cp_transaction;
if (cp_transaction) {
JBUFFER_TRACE(jh, "remove from old cp transaction");
- J_ASSERT_JH(jh, commit_transaction != cp_transaction);
__journal_remove_checkpoint(jh);
}
diff -Nru a/fs/jbd/transaction.c b/fs/jbd/transaction.c
--- a/fs/jbd/transaction.c Sun Aug 3 13:14:47 2003
+++ b/fs/jbd/transaction.c Sun Aug 3 13:14:47 2003
@@ -1088,7 +1088,6 @@
transaction_t *transaction = handle->h_transaction;
journal_t *journal = transaction->t_journal;
struct journal_head *jh = bh2jh(bh);
- int console_loglevel_saved = console_loglevel;
jbd_debug(5, "journal_head %p\n", jh);
JBUFFER_TRACE(jh, "entry");
@@ -1147,7 +1146,6 @@
jbd_unlock_bh_state(bh);
out:
JBUFFER_TRACE(jh, "exit");
- console_loglevel = console_loglevel_saved;
return 0;
}
diff -Nru a/fs/jffs/jffs_proc.c b/fs/jffs/jffs_proc.c
--- a/fs/jffs/jffs_proc.c Sun Aug 3 13:14:51 2003
+++ b/fs/jffs/jffs_proc.c Sun Aug 3 13:14:51 2003
@@ -51,7 +51,7 @@
* Linked list of 'jffs_partition_dirs' to help us track
* the mounted JFFS partitions in the system
*/
-static struct jffs_partition_dir *jffs_part_dirs = 0;
+static struct jffs_partition_dir *jffs_part_dirs;
/*
* Read functions for entries
diff -Nru a/fs/jfs/acl.c b/fs/jfs/acl.c
--- a/fs/jfs/acl.c Sun Aug 3 13:14:45 2003
+++ b/fs/jfs/acl.c Sun Aug 3 13:14:45 2003
@@ -123,11 +123,11 @@
}
/*
- * __jfs_permission()
+ * jfs_permission()
*
* modified vfs_permission to check posix acl
*/
-static int __jfs_permission(struct inode * inode, int mask, int have_sem)
+int jfs_permission(struct inode * inode, int mask, struct nameidata *nd)
{
umode_t mode = inode->i_mode;
struct jfs_inode_info *ji = JFS_IP(inode);
@@ -161,11 +161,7 @@
if (ji->i_acl == JFS_ACL_NOT_CACHED) {
struct posix_acl *acl;
- if (!have_sem)
- down(&inode->i_sem);
acl = jfs_get_acl(inode, ACL_TYPE_ACCESS);
- if (!have_sem)
- up(&inode->i_sem);
if (IS_ERR(acl))
return PTR_ERR(acl);
@@ -207,14 +203,6 @@
return 0;
return -EACCES;
-}
-int jfs_permission(struct inode * inode, int mask, struct nameidata *nd)
-{
- return __jfs_permission(inode, mask, 0);
-}
-int jfs_permission_have_sem(struct inode * inode, int mask)
-{
- return __jfs_permission(inode, mask, 1);
}
int jfs_init_acl(struct inode *inode, struct inode *dir)
diff -Nru a/fs/jfs/inode.c b/fs/jfs/inode.c
--- a/fs/jfs/inode.c Sun Aug 3 13:14:44 2003
+++ b/fs/jfs/inode.c Sun Aug 3 13:14:44 2003
@@ -65,9 +65,6 @@
}
}
-/* This define is from fs/open.c */
-#define special_file(m) (S_ISCHR(m)||S_ISBLK(m)||S_ISFIFO(m)||S_ISSOCK(m))
-
/*
* Workhorse of both fsync & write_inode
*/
@@ -105,7 +102,7 @@
rc = txCommit(tid, 1, &inode, wait ? COMMIT_SYNC : 0);
txEnd(tid);
up(&JFS_IP(inode)->commit_sem);
- return -rc;
+ return rc;
}
void jfs_write_inode(struct inode *inode, int wait)
@@ -308,7 +305,7 @@
struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
return blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iov,
- offset, nr_segs, jfs_get_blocks);
+ offset, nr_segs, jfs_get_blocks, NULL);
}
struct address_space_operations jfs_aops = {
diff -Nru a/fs/jfs/jfs_acl.h b/fs/jfs/jfs_acl.h
--- a/fs/jfs/jfs_acl.h Sun Aug 3 13:14:51 2003
+++ b/fs/jfs/jfs_acl.h Sun Aug 3 13:14:51 2003
@@ -24,7 +24,6 @@
struct posix_acl *jfs_get_acl(struct inode *, int);
int jfs_set_acl(struct inode *, int, struct posix_acl *);
-int jfs_permission_have_sem(struct inode *, int);
int jfs_permission(struct inode *, int, struct nameidata *);
int jfs_init_acl(struct inode *, struct inode *);
int jfs_setattr(struct dentry *, struct iattr *);
diff -Nru a/fs/jfs/jfs_dtree.c b/fs/jfs/jfs_dtree.c
--- a/fs/jfs/jfs_dtree.c Sun Aug 3 13:14:50 2003
+++ b/fs/jfs/jfs_dtree.c Sun Aug 3 13:14:50 2003
@@ -1328,7 +1328,7 @@
rbn = addressPXD(pxd);
rmp = get_metapage(ip, rbn, PSIZE, 1);
if (rmp == NULL)
- return EIO;
+ return -EIO;
jfs_info("dtSplitPage: ip:0x%p smp:0x%p rmp:0x%p", ip, smp, rmp);
diff -Nru a/fs/jfs/jfs_incore.h b/fs/jfs/jfs_incore.h
--- a/fs/jfs/jfs_incore.h Sun Aug 3 13:14:44 2003
+++ b/fs/jfs/jfs_incore.h Sun Aug 3 13:14:44 2003
@@ -67,6 +67,8 @@
* inode is blocked in txBegin or TxBeginAnon
*/
struct semaphore commit_sem;
+ /* xattr_sem allows us to access the xattrs without taking i_sem */
+ struct rw_semaphore xattr_sem;
lid_t xtlid; /* lid of xtree lock on directory */
#ifdef CONFIG_JFS_POSIX_ACL
struct posix_acl *i_acl;
diff -Nru a/fs/jfs/jfs_logmgr.c b/fs/jfs/jfs_logmgr.c
--- a/fs/jfs/jfs_logmgr.c Sun Aug 3 13:14:48 2003
+++ b/fs/jfs/jfs_logmgr.c Sun Aug 3 13:14:48 2003
@@ -1615,7 +1615,7 @@
if (i == MAX_ACTIVE) {
jfs_warn("Too many file systems sharing journal!");
lbmFree(bpsuper);
- return EMFILE; /* Is there a better rc? */
+ return -EMFILE; /* Is there a better rc? */
}
} else {
for (i = 0; i < MAX_ACTIVE; i++)
diff -Nru a/fs/jfs/jfs_txnmgr.c b/fs/jfs/jfs_txnmgr.c
--- a/fs/jfs/jfs_txnmgr.c Sun Aug 3 13:14:49 2003
+++ b/fs/jfs/jfs_txnmgr.c Sun Aug 3 13:14:49 2003
@@ -178,7 +178,7 @@
struct tlock * tlck);
void mapLog(struct jfs_log * log, struct tblock * tblk, struct lrd * lrd,
struct tlock * tlck);
-void txAbortCommit(struct commit * cd, int exval);
+static void txAbortCommit(struct commit * cd);
static void txAllocPMap(struct inode *ip, struct maplock * maplock,
struct tblock * tblk);
void txForce(struct tblock * tblk);
@@ -1113,7 +1113,7 @@
jfs_info("txCommit, tid = %d, flag = %d", tid, flag);
/* is read-only file system ? */
if (isReadOnly(iplist[0])) {
- rc = EROFS;
+ rc = -EROFS;
goto TheEnd;
}
@@ -1317,7 +1317,7 @@
out:
if (rc != 0)
- txAbortCommit(&cd, rc);
+ txAbortCommit(&cd);
TheEnd:
jfs_info("txCommit: tid = %d, returning %d", tid, rc);
@@ -2672,14 +2672,13 @@
* log age of page-frames in memory for which caller has
* are reset to 0 (to avoid logwarap).
*/
-void txAbortCommit(struct commit * cd, int exval)
+static void txAbortCommit(struct commit * cd)
{
struct tblock *tblk;
tid_t tid;
lid_t lid, next;
struct metapage *mp;
- assert(exval == EIO || exval == ENOMEM);
jfs_warn("txAbortCommit: cd:0x%p", cd);
/*
diff -Nru a/fs/jfs/namei.c b/fs/jfs/namei.c
--- a/fs/jfs/namei.c Sun Aug 3 13:14:51 2003
+++ b/fs/jfs/namei.c Sun Aug 3 13:14:51 2003
@@ -120,7 +120,7 @@
ino = ip->i_ino;
if ((rc = dtInsert(tid, dip, &dname, &ino, &btstack))) {
jfs_err("jfs_create: dtInsert returned %d", rc);
- if (rc == EIO)
+ if (rc == -EIO)
txAbort(tid, 1); /* Marks Filesystem dirty */
else
txAbort(tid, 0); /* Filesystem full */
@@ -247,7 +247,7 @@
if ((rc = dtInsert(tid, dip, &dname, &ino, &btstack))) {
jfs_err("jfs_mkdir: dtInsert returned %d", rc);
- if (rc == EIO)
+ if (rc == -EIO)
txAbort(tid, 1); /* Marks Filesystem dirty */
else
txAbort(tid, 0); /* Filesystem full */
@@ -353,7 +353,7 @@
ino = ip->i_ino;
if ((rc = dtDelete(tid, dip, &dname, &ino, JFS_REMOVE))) {
jfs_err("jfs_rmdir: dtDelete returned %d", rc);
- if (rc == EIO)
+ if (rc == -EIO)
txAbort(tid, 1);
txEnd(tid);
up(&JFS_IP(dip)->commit_sem);
@@ -469,7 +469,7 @@
ino = ip->i_ino;
if ((rc = dtDelete(tid, dip, &dname, &ino, JFS_REMOVE))) {
jfs_err("jfs_unlink: dtDelete returned %d", rc);
- if (rc == EIO)
+ if (rc == -EIO)
txAbort(tid, 1); /* Marks FS Dirty */
txEnd(tid);
up(&JFS_IP(dip)->commit_sem);
@@ -535,7 +535,7 @@
new_size = xtTruncate_pmap(tid, ip, new_size);
if (new_size < 0) {
txAbort(tid, 1); /* Marks FS Dirty */
- rc = -new_size; /* We return -rc */
+ rc = new_size;
} else
rc = txCommit(tid, 2, &iplist[0], COMMIT_SYNC);
txEnd(tid);
diff -Nru a/fs/jfs/super.c b/fs/jfs/super.c
--- a/fs/jfs/super.c Sun Aug 3 13:14:48 2003
+++ b/fs/jfs/super.c Sun Aug 3 13:14:48 2003
@@ -382,6 +382,7 @@
if (!(sb->s_flags & MS_RDONLY)) {
txQuiesce(sb);
lmLogShutdown(log);
+ updateSuper(sb, FM_CLEAN);
}
}
@@ -392,6 +393,7 @@
int rc = 0;
if (!(sb->s_flags & MS_RDONLY)) {
+ updateSuper(sb, FM_MOUNT);
if ((rc = lmLogInit(log)))
jfs_err("jfs_unlock failed with return code %d", rc);
else
@@ -457,6 +459,7 @@
INIT_LIST_HEAD(&jfs_ip->anon_inode_list);
init_rwsem(&jfs_ip->rdwrlock);
init_MUTEX(&jfs_ip->commit_sem);
+ init_rwsem(&jfs_ip->xattr_sem);
jfs_ip->atlhead = 0;
jfs_ip->active_ag = -1;
#ifdef CONFIG_JFS_POSIX_ACL
diff -Nru a/fs/jfs/xattr.c b/fs/jfs/xattr.c
--- a/fs/jfs/xattr.c Sun Aug 3 13:14:47 2003
+++ b/fs/jfs/xattr.c Sun Aug 3 13:14:47 2003
@@ -729,7 +729,7 @@
return -EPERM;
#ifdef CONFIG_JFS_POSIX_ACL
- return jfs_permission_have_sem(inode, MAY_WRITE);
+ return jfs_permission(inode, MAY_WRITE, NULL);
#else
return permission(inode, MAY_WRITE, NULL);
#endif
@@ -763,6 +763,8 @@
namelen -= XATTR_OS2_PREFIX_LEN;
}
+ down_write(&JFS_IP(inode)->xattr_sem);
+
xattr_size = ea_get(inode, &ea_buf, 0);
if (xattr_size < 0) {
rc = xattr_size;
@@ -868,6 +870,8 @@
release:
ea_release(inode, &ea_buf);
out:
+ up_write(&JFS_IP(inode)->xattr_sem);
+
if (os2name)
kfree(os2name);
@@ -890,8 +894,7 @@
#ifdef CONFIG_JFS_POSIX_ACL
if(strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN) == 0)
return 0;
- else
- return jfs_permission_have_sem(inode, MAY_READ);
+ return jfs_permission(inode, MAY_READ, NULL);
#else
return permission(inode, MAY_READ, NULL);
#endif
@@ -923,7 +926,10 @@
namelen -= XATTR_OS2_PREFIX_LEN;
}
+ down_read(&JFS_IP(inode)->xattr_sem);
+
xattr_size = ea_get(inode, &ea_buf, 0);
+
if (xattr_size < 0) {
size = xattr_size;
goto out;
@@ -955,6 +961,8 @@
release:
ea_release(inode, &ea_buf);
out:
+ up_read(&JFS_IP(inode)->xattr_sem);
+
if (os2name)
kfree(os2name);
@@ -966,15 +974,12 @@
{
int err;
- down(&dentry->d_inode->i_sem);
err = __jfs_getxattr(dentry->d_inode, name, data, buf_size);
- up(&dentry->d_inode->i_sem);
return err;
}
-static ssize_t __jfs_listxattr(struct dentry * dentry, char *data,
- size_t buf_size)
+ssize_t jfs_listxattr(struct dentry * dentry, char *data, size_t buf_size)
{
struct inode *inode = dentry->d_inode;
char *buffer;
@@ -984,6 +989,8 @@
struct jfs_ea *ea;
struct ea_buffer ea_buf;
+ down_read(&JFS_IP(inode)->xattr_sem);
+
xattr_size = ea_get(inode, &ea_buf, 0);
if (xattr_size < 0) {
size = xattr_size;
@@ -1017,18 +1024,8 @@
release:
ea_release(inode, &ea_buf);
out:
+ up_read(&JFS_IP(inode)->xattr_sem);
return size;
-}
-
-ssize_t jfs_listxattr(struct dentry * dentry, char *data, size_t buf_size)
-{
- int err;
-
- down(&dentry->d_inode->i_sem);
- err = __jfs_listxattr(dentry, data, buf_size);
- up(&dentry->d_inode->i_sem);
-
- return err;
}
int jfs_removexattr(struct dentry *dentry, const char *name)
diff -Nru a/fs/lockd/svc.c b/fs/lockd/svc.c
--- a/fs/lockd/svc.c Sun Aug 3 13:14:49 2003
+++ b/fs/lockd/svc.c Sun Aug 3 13:14:49 2003
@@ -196,7 +196,7 @@
int
lockd_up(void)
{
- static int warned = 0;
+ static int warned;
struct svc_serv * serv;
int error = 0;
@@ -267,7 +267,7 @@
void
lockd_down(void)
{
- static int warned = 0;
+ static int warned;
down(&nlmsvc_sema);
if (nlmsvc_users) {
diff -Nru a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
--- a/fs/nfsd/nfs4state.c Sun Aug 3 13:14:50 2003
+++ b/fs/nfsd/nfs4state.c Sun Aug 3 13:14:50 2003
@@ -53,9 +53,9 @@
/* Globals */
time_t boot_time;
static u32 current_clientid = 1;
-static u32 current_ownerid = 0;
-static u32 current_fileid = 0;
-static u32 nfs4_init = 0;
+static u32 current_ownerid;
+static u32 current_fileid;
+static u32 nfs4_init;
stateid_t zerostateid; /* bits all 0 */
stateid_t onestateid; /* bits all 1 */
diff -Nru a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c
--- a/fs/nfsd/vfs.c Sun Aug 3 13:14:47 2003
+++ b/fs/nfsd/vfs.c Sun Aug 3 13:14:47 2003
@@ -761,7 +761,7 @@
if (err >= 0 && stable) {
static ino_t last_ino;
- static dev_t last_dev = 0;
+ static dev_t last_dev;
/*
* Gathered writes: If another process is currently
diff -Nru a/fs/ntfs/super.c b/fs/ntfs/super.c
--- a/fs/ntfs/super.c Sun Aug 3 13:14:50 2003
+++ b/fs/ntfs/super.c Sun Aug 3 13:14:50 2003
@@ -33,7 +33,7 @@
#include "sysctl.h"
/* Number of mounted file systems which have compression enabled. */
-static unsigned long ntfs_nr_compression_users = 0;
+static unsigned long ntfs_nr_compression_users;
/* Error constants/strings used in inode.c::ntfs_show_options(). */
typedef enum {
@@ -1670,10 +1670,10 @@
};
/* Stable names for the slab caches. */
-static const char *ntfs_attr_ctx_cache_name = "ntfs_attr_ctx_cache";
-static const char *ntfs_name_cache_name = "ntfs_name_cache";
-static const char *ntfs_inode_cache_name = "ntfs_inode_cache";
-static const char *ntfs_big_inode_cache_name = "ntfs_big_inode_cache";
+static const char ntfs_attr_ctx_cache_name[] = "ntfs_attr_ctx_cache";
+static const char ntfs_name_cache_name[] = "ntfs_name_cache";
+static const char ntfs_inode_cache_name[] = "ntfs_inode_cache";
+static const char ntfs_big_inode_cache_name[] = "ntfs_big_inode_cache";
static int __init init_ntfs_fs(void)
{
diff -Nru a/fs/open.c b/fs/open.c
--- a/fs/open.c Sun Aug 3 13:14:44 2003
+++ b/fs/open.c Sun Aug 3 13:14:44 2003
@@ -20,8 +20,7 @@
#include <linux/mount.h>
#include <linux/vfs.h>
#include <asm/uaccess.h>
-
-#define special_file(m) (S_ISCHR(m)||S_ISBLK(m)||S_ISFIFO(m)||S_ISSOCK(m))
+#include <linux/fs.h>
int vfs_statfs(struct super_block *sb, struct kstatfs *buf)
{
diff -Nru a/fs/openpromfs/inode.c b/fs/openpromfs/inode.c
--- a/fs/openpromfs/inode.c Sun Aug 3 13:14:48 2003
+++ b/fs/openpromfs/inode.c Sun Aug 3 13:14:48 2003
@@ -44,13 +44,13 @@
char name[8];
} openprom_property;
-static openpromfs_node *nodes = NULL;
-static int alloced = 0;
-static u16 last_node = 0;
-static u16 first_prop = 0;
+static openpromfs_node *nodes;
+static int alloced;
+static u16 last_node;
+static u16 first_prop;
static u16 options = 0xffff;
static u16 aliases = 0xffff;
-static int aliases_nodes = 0;
+static int aliases_nodes;
static char *alias_names [ALIASES_NNODES];
#define OPENPROM_ROOT_INO 16
diff -Nru a/fs/partitions/osf.c b/fs/partitions/osf.c
--- a/fs/partitions/osf.c Sun Aug 3 13:14:51 2003
+++ b/fs/partitions/osf.c Sun Aug 3 13:14:51 2003
@@ -67,9 +67,10 @@
if (slot == state->limit)
break;
if (le32_to_cpu(partition->p_size))
- put_partition(state, slot++,
+ put_partition(state, slot,
le32_to_cpu(partition->p_offset),
le32_to_cpu(partition->p_size));
+ slot++;
}
printk("\n");
put_dev_sector(sect);
diff -Nru a/fs/quota_v1.c b/fs/quota_v1.c
--- a/fs/quota_v1.c Sun Aug 3 13:14:50 2003
+++ b/fs/quota_v1.c Sun Aug 3 13:14:50 2003
@@ -164,7 +164,6 @@
struct v1_disk_dqblk dqblk;
int ret;
- down(&dqopt->dqio_sem);
offset = v1_dqoff(0);
fs = get_fs();
set_fs(KERNEL_DS);
@@ -177,7 +176,6 @@
dqopt->info[type].dqi_igrace = dqblk.dqb_itime ? dqblk.dqb_itime : MAX_IQ_TIME;
dqopt->info[type].dqi_bgrace = dqblk.dqb_btime ? dqblk.dqb_btime : MAX_DQ_TIME;
out:
- up(&dqopt->dqio_sem);
set_fs(fs);
return ret;
}
@@ -191,7 +189,6 @@
loff_t offset;
int ret;
- down(&dqopt->dqio_sem);
dqopt->info[type].dqi_flags &= ~DQF_INFO_DIRTY;
offset = v1_dqoff(0);
fs = get_fs();
@@ -210,7 +207,6 @@
else if (ret > 0)
ret = -EIO;
out:
- up(&dqopt->dqio_sem);
set_fs(fs);
return ret;
}
diff -Nru a/fs/reiserfs/do_balan.c b/fs/reiserfs/do_balan.c
--- a/fs/reiserfs/do_balan.c Sun Aug 3 13:14:46 2003
+++ b/fs/reiserfs/do_balan.c Sun Aug 3 13:14:46 2003
@@ -376,7 +376,7 @@
if ( is_direntry_le_ih (B_N_PITEM_HEAD (tbS0, item_pos))) {
RFALSE( zeros_num,
- "PAP-12090: illegal parameter in case of a directory");
+ "PAP-12090: invalid parameter in case of a directory");
/* directory item */
if ( tb->lbytes > pos_in_item ) {
/* new directory entry falls into L[0] */
@@ -646,7 +646,7 @@
int entry_count;
RFALSE( zeros_num,
- "PAP-12145: illegal parametr in case of a directory");
+ "PAP-12145: invalid parameter in case of a directory");
entry_count = I_ENTRY_COUNT(B_N_PITEM_HEAD(tbS0, item_pos));
if ( entry_count - tb->rbytes < pos_in_item )
/* new directory entry falls into R[0] */
diff -Nru a/fs/reiserfs/fix_node.c b/fs/reiserfs/fix_node.c
--- a/fs/reiserfs/fix_node.c Sun Aug 3 13:14:46 2003
+++ b/fs/reiserfs/fix_node.c Sun Aug 3 13:14:46 2003
@@ -1847,7 +1847,7 @@
if ( n_path_offset <= FIRST_PATH_ELEMENT_OFFSET ) {
RFALSE( n_path_offset < FIRST_PATH_ELEMENT_OFFSET - 1,
- "PAP-8260: illegal offset in the path");
+ "PAP-8260: invalid offset in the path");
if ( PATH_OFFSET_PBUFFER(p_s_path, FIRST_PATH_ELEMENT_OFFSET)->b_blocknr ==
SB_ROOT_BLOCK (p_s_tb->tb_sb) ) {
diff -Nru a/fs/reiserfs/journal.c b/fs/reiserfs/journal.c
--- a/fs/reiserfs/journal.c Sun Aug 3 13:14:49 2003
+++ b/fs/reiserfs/journal.c Sun Aug 3 13:14:49 2003
@@ -64,7 +64,7 @@
/* the number of mounted filesystems. This is used to decide when to
** start and kill the commit workqueue
*/
-static int reiserfs_mounted_fs_count = 0 ;
+static int reiserfs_mounted_fs_count;
static struct workqueue_struct *commit_wq;
@@ -113,7 +113,7 @@
static struct reiserfs_bitmap_node *
allocate_bitmap_node(struct super_block *p_s_sb) {
struct reiserfs_bitmap_node *bn ;
- static int id = 0 ;
+ static int id;
bn = reiserfs_kmalloc(sizeof(struct reiserfs_bitmap_node), GFP_NOFS, p_s_sb) ;
if (!bn) {
diff -Nru a/fs/reiserfs/procfs.c b/fs/reiserfs/procfs.c
--- a/fs/reiserfs/procfs.c Sun Aug 3 13:14:46 2003
+++ b/fs/reiserfs/procfs.c Sun Aug 3 13:14:46 2003
@@ -574,7 +574,7 @@
static struct proc_dir_entry *proc_info_root = NULL;
-static const char *proc_info_root_name = "fs/reiserfs";
+static const char proc_info_root_name[] = "fs/reiserfs";
int reiserfs_proc_info_init( struct super_block *sb )
{
diff -Nru a/fs/reiserfs/stree.c b/fs/reiserfs/stree.c
--- a/fs/reiserfs/stree.c Sun Aug 3 13:14:50 2003
+++ b/fs/reiserfs/stree.c Sun Aug 3 13:14:50 2003
@@ -311,7 +311,7 @@
struct buffer_head * p_s_parent;
RFALSE( n_path_offset < FIRST_PATH_ELEMENT_OFFSET,
- "PAP-5010: illegal offset in the path");
+ "PAP-5010: invalid offset in the path");
/* While not higher in path than first element. */
while ( n_path_offset-- > FIRST_PATH_ELEMENT_OFFSET ) {
@@ -351,7 +351,7 @@
struct buffer_head * p_s_parent;
RFALSE( n_path_offset < FIRST_PATH_ELEMENT_OFFSET,
- "PAP-5030: illegal offset in the path");
+ "PAP-5030: invalid offset in the path");
while ( n_path_offset-- > FIRST_PATH_ELEMENT_OFFSET ) {
@@ -393,7 +393,7 @@
RFALSE( ! p_s_key || p_s_chk_path->path_length < FIRST_PATH_ELEMENT_OFFSET ||
p_s_chk_path->path_length > MAX_HEIGHT,
- "PAP-5050: pointer to the key(%p) is NULL or illegal path length(%d)",
+ "PAP-5050: pointer to the key(%p) is NULL or invalid path length(%d)",
p_s_key, p_s_chk_path->path_length);
RFALSE( !PATH_PLAST_BUFFER(p_s_chk_path)->b_bdev,
"PAP-5060: device must not be NODEV");
@@ -430,7 +430,7 @@
RFALSE( n_path_offset < ILLEGAL_PATH_ELEMENT_OFFSET ||
n_path_offset > EXTENDED_MAX_HEIGHT - 1,
- "PAP-5080: illegal path offset of %d", n_path_offset);
+ "PAP-5080: invalid path offset of %d", n_path_offset);
while ( n_path_offset > ILLEGAL_PATH_ELEMENT_OFFSET ) {
struct buffer_head * bh;
@@ -461,7 +461,7 @@
int n_path_offset = p_s_search_path->path_length;
RFALSE( n_path_offset < ILLEGAL_PATH_ELEMENT_OFFSET,
- "clm-4000: illegal path offset");
+ "clm-4000: invalid path offset");
while ( n_path_offset > ILLEGAL_PATH_ELEMENT_OFFSET ) {
reiserfs_restore_prepared_buffer(s, PATH_OFFSET_PBUFFER(p_s_search_path,
@@ -478,7 +478,7 @@
int n_path_offset = p_s_search_path->path_length;
RFALSE( n_path_offset < ILLEGAL_PATH_ELEMENT_OFFSET,
- "PAP-5090: illegal path offset");
+ "PAP-5090: invalid path offset");
while ( n_path_offset > ILLEGAL_PATH_ELEMENT_OFFSET )
brelse(PATH_OFFSET_PBUFFER(p_s_search_path, n_path_offset--));
@@ -1044,7 +1044,7 @@
RFALSE( ! is_indirect_le_ih(&s_ih) || ! n_unfm_number ||
pos_in_item (p_s_path) + 1 != n_unfm_number,
- "PAP-5240: illegal item %h "
+ "PAP-5240: invalid item %h "
"n_unfm_number = %d *p_n_pos_in_item = %d",
&s_ih, n_unfm_number, pos_in_item (p_s_path));
@@ -1065,7 +1065,7 @@
pos_in_item (p_s_path) = (n_new_file_length + n_blk_size - le_ih_k_offset (&s_ih) ) >> p_s_sb->s_blocksize_bits;
RFALSE( pos_in_item (p_s_path) > n_unfm_number,
- "PAP-5250: illegal position in the item");
+ "PAP-5250: invalid position in the item");
/* Either convert last unformatted node of indirect item to direct item or increase
its free space. */
@@ -1081,7 +1081,7 @@
}
RFALSE( n_unfm_number <= pos_in_item (p_s_path),
- "PAP-5260: illegal position in the indirect item");
+ "PAP-5260: invalid position in the indirect item");
/* pointers to be cut */
n_unfm_number -= pos_in_item (p_s_path);
@@ -1573,7 +1573,7 @@
/* go ahead and perform balancing */
- RFALSE( c_mode == M_PASTE || c_mode == M_INSERT, "illegal mode");
+ RFALSE( c_mode == M_PASTE || c_mode == M_INSERT, "invalid mode");
/* Calculate number of bytes that need to be cut from the item. */
if (retval2 == -1)
diff -Nru a/fs/smbfs/request.c b/fs/smbfs/request.c
--- a/fs/smbfs/request.c Sun Aug 3 13:14:53 2003
+++ b/fs/smbfs/request.c Sun Aug 3 13:14:53 2003
@@ -194,7 +194,7 @@
{
struct smb_sb_info *server = req->rq_server;
int mparam, mdata;
- static unsigned char padding[4] = { 0, };
+ static unsigned char padding[4];
/* I know the following is very ugly, but I want to build the
smb packet as efficiently as possible. */
diff -Nru a/fs/stat.c b/fs/stat.c
--- a/fs/stat.c Sun Aug 3 13:14:46 2003
+++ b/fs/stat.c Sun Aug 3 13:14:46 2003
@@ -106,7 +106,7 @@
{
static int warncount = 5;
struct __old_kernel_stat tmp;
-
+
if (warncount > 0) {
warncount--;
printk(KERN_WARNING "VFS: Warning: %s using old stat() call. Recompile your binary.\n",
@@ -116,6 +116,7 @@
warncount = 0;
}
+ memset(&tmp, 0, sizeof(struct __old_kernel_stat));
tmp.st_dev = stat->dev;
tmp.st_ino = stat->ino;
tmp.st_mode = stat->mode;
diff -Nru a/fs/sysfs/bin.c b/fs/sysfs/bin.c
--- a/fs/sysfs/bin.c Sun Aug 3 13:14:48 2003
+++ b/fs/sysfs/bin.c Sun Aug 3 13:14:48 2003
@@ -47,8 +47,8 @@
return ret;
count = ret;
- if (copy_to_user(userbuf, buffer + offs, count) != 0)
- return -EINVAL;
+ if (copy_to_user(userbuf, buffer + offs, count))
+ return -EFAULT;
pr_debug("offs = %lld, *off = %lld, count = %zd\n", offs, *off, count);
diff -Nru a/fs/umsdos/mangle.c b/fs/umsdos/mangle.c
--- a/fs/umsdos/mangle.c Sun Aug 3 13:14:51 2003
+++ b/fs/umsdos/mangle.c Sun Aug 3 13:14:51 2003
@@ -178,7 +178,7 @@
* So it serves both as a flag and as a translator.
*/
static char lkp[256];
- static char is_init = 0;
+ static char is_init;
if (!is_init) {
/*
diff -Nru a/fs/vfat/namei.c b/fs/vfat/namei.c
--- a/fs/vfat/namei.c Sun Aug 3 13:14:50 2003
+++ b/fs/vfat/namei.c Sun Aug 3 13:14:50 2003
@@ -72,18 +72,21 @@
static int vfat_revalidate(struct dentry *dentry, struct nameidata *nd)
{
int ret = 1;
- PRINTK1(("vfat_revalidate: %s\n", dentry->d_name.name));
- spin_lock(&dcache_lock);
- if (nd && !(nd->flags & LOOKUP_CONTINUE) && (nd->flags & LOOKUP_CREATE))
+
+ if (!dentry->d_inode &&
+ nd && !(nd->flags & LOOKUP_CONTINUE) && (nd->flags & LOOKUP_CREATE))
/*
* negative dentry is dropped, in order to make sure
* to use the name which a user desires if this is
* create path.
*/
ret = 0;
- else if (dentry->d_time != dentry->d_parent->d_inode->i_version)
- ret = 0;
- spin_unlock(&dcache_lock);
+ else {
+ spin_lock(&dcache_lock);
+ if (dentry->d_time != dentry->d_parent->d_inode->i_version)
+ ret = 0;
+ spin_unlock(&dcache_lock);
+ }
return ret;
}
@@ -103,7 +106,7 @@
return nc ? nc : c;
}
-static int
+static inline int
vfat_strnicmp(struct nls_table *t, const unsigned char *s1,
const unsigned char *s2, int len)
{
@@ -114,6 +117,17 @@
return 0;
}
+/* returns the length of a struct qstr, ignoring trailing dots */
+static unsigned int vfat_striptail_len(struct qstr *qstr)
+{
+ unsigned int len = qstr->len;
+
+ while (len && qstr->name[len-1] == '.')
+ len--;
+
+ return len;
+}
+
/*
* Compute the hash for the vfat name corresponding to the dentry.
* Note: if the name is invalid, we leave the hash code unchanged so
@@ -122,15 +136,7 @@
*/
static int vfat_hash(struct dentry *dentry, struct qstr *qstr)
{
- const unsigned char *name;
- int len;
-
- len = qstr->len;
- name = qstr->name;
- while (len && name[len-1] == '.')
- len--;
-
- qstr->hash = full_name_hash(name, len);
+ qstr->hash = full_name_hash(qstr->name, vfat_striptail_len(qstr));
return 0;
}
@@ -145,13 +151,11 @@
{
struct nls_table *t = MSDOS_SB(dentry->d_inode->i_sb)->nls_io;
const unsigned char *name;
- int len;
+ unsigned int len;
unsigned long hash;
- len = qstr->len;
name = qstr->name;
- while (len && name[len-1] == '.')
- len--;
+ len = vfat_striptail_len(qstr);
hash = init_name_hash();
while (len--)
@@ -167,15 +171,11 @@
static int vfat_cmpi(struct dentry *dentry, struct qstr *a, struct qstr *b)
{
struct nls_table *t = MSDOS_SB(dentry->d_inode->i_sb)->nls_io;
- int alen, blen;
+ unsigned int alen, blen;
/* A filename cannot end in '.' or we treat it like it has none */
- alen = a->len;
- blen = b->len;
- while (alen && a->name[alen-1] == '.')
- alen--;
- while (blen && b->name[blen-1] == '.')
- blen--;
+ alen = vfat_striptail_len(a);
+ blen = vfat_striptail_len(b);
if (alen == blen) {
if (vfat_strnicmp(t, a->name, b->name, alen) == 0)
return 0;
@@ -188,15 +188,11 @@
*/
static int vfat_cmp(struct dentry *dentry, struct qstr *a, struct qstr *b)
{
- int alen, blen;
+ unsigned int alen, blen;
/* A filename cannot end in '.' or we treat it like it has none */
- alen = a->len;
- blen = b->len;
- while (alen && a->name[alen-1] == '.')
- alen--;
- while (blen && b->name[blen-1] == '.')
- blen--;
+ alen = vfat_striptail_len(a);
+ blen = vfat_striptail_len(b);
if (alen == blen) {
if (strncmp(a->name, b->name, alen) == 0)
return 0;
@@ -761,7 +757,7 @@
struct msdos_dir_slot *dir_slots;
loff_t offset;
int slots, slot;
- int res, len;
+ int res;
struct msdos_dir_entry *dummy_de;
struct buffer_head *dummy_bh;
loff_t dummy_i_pos;
@@ -771,10 +767,7 @@
if (dir_slots == NULL)
return -ENOMEM;
- len = qname->len;
- while (len && qname->name[len-1] == '.')
- len--;
- res = vfat_build_slots(dir, qname->name, len,
+ res = vfat_build_slots(dir, qname->name, vfat_striptail_len(qname),
dir_slots, &slots, is_dir);
if (res < 0)
goto cleanup;
@@ -825,12 +818,9 @@
{
struct super_block *sb = dir->i_sb;
loff_t offset;
- int res,len;
+ int res;
- len = qname->len;
- while (len && qname->name[len-1] == '.')
- len--;
- res = fat_search_long(dir, qname->name, len,
+ res = fat_search_long(dir, qname->name, vfat_striptail_len(qname),
(MSDOS_SB(sb)->options.name_check != 's'),
&offset,&sinfo->longname_offset);
if (res>0) {
diff -Nru a/fs/xfs/linux/xfs_aops.c b/fs/xfs/linux/xfs_aops.c
--- a/fs/xfs/linux/xfs_aops.c Sun Aug 3 13:14:52 2003
+++ b/fs/xfs/linux/xfs_aops.c Sun Aug 3 13:14:52 2003
@@ -67,7 +67,7 @@
bh->b_end_io = NULL;
clear_buffer_unwritten(bh);
if (!uptodate)
- pagebuf_ioerror(pb, -EIO);
+ pagebuf_ioerror(pb, EIO);
if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
pagebuf_iodone(pb, 1, 1);
}
@@ -76,10 +76,10 @@
/*
* Issue transactions to convert a buffer range from unwritten
- * to written extents.
+ * to written extents (buffered IO).
*/
STATIC void
-linvfs_unwritten_conv(
+linvfs_unwritten_convert(
xfs_buf_t *bp)
{
vnode_t *vp = XFS_BUF_FSPRIVATE(bp, vnode_t *);
@@ -93,9 +93,34 @@
XFS_BUF_SET_FSPRIVATE(bp, NULL);
XFS_BUF_CLR_IODONE_FUNC(bp);
XFS_BUF_UNDATAIO(bp);
+ iput(LINVFS_GET_IP(vp));
pagebuf_iodone(bp, 0, 0);
}
+/*
+ * Issue transactions to convert a buffer range from unwritten
+ * to written extents (direct IO).
+ */
+STATIC void
+linvfs_unwritten_convert_direct(
+ struct inode *inode,
+ loff_t offset,
+ ssize_t size,
+ void *private)
+{
+ ASSERT(!private || inode == (struct inode *)private);
+
+ /* private indicates an unwritten extent lay beneath this IO,
+ * see linvfs_get_block_core.
+ */
+ if (private && size > 0) {
+ vnode_t *vp = LINVFS_GET_VP(inode);
+ int error;
+
+ VOP_BMAP(vp, offset, size, BMAP_UNWRITTEN, NULL, NULL, error);
+ }
+}
+
STATIC int
map_blocks(
struct inode *inode,
@@ -108,7 +133,7 @@
int error, nmaps = 1;
if (((flags & (BMAP_DIRECT|BMAP_SYNC)) == BMAP_DIRECT) &&
- (offset >= inode->i_size))
+ (offset >= i_size_read(inode)))
count = max_t(ssize_t, count, XFS_WRITE_IO_LOG);
retry:
VOP_BMAP(vp, offset, count, flags, pbmapp, &nmaps, error);
@@ -285,7 +310,7 @@
struct buffer_head *bh,
struct buffer_head *head)
{
- unsigned long tindex, tlast;
+ unsigned long tindex, tlast, tloff;
unsigned int len, total = 0;
struct address_space *mapping = inode->i_mapping;
@@ -300,20 +325,19 @@
* following pages.
*/
if (bh == head) {
- tlast = inode->i_size >> PAGE_CACHE_SHIFT;
+ tlast = i_size_read(inode) >> PAGE_CACHE_SHIFT;
/* Prune this back to avoid pathological behavior */
- tlast = min(tlast, startpage->index + 64);
- for (tindex = startpage->index + 1; tindex < tlast; tindex++) {
+ tloff = min(tlast, startpage->index + 64);
+ for (tindex = startpage->index + 1; tindex < tloff; tindex++) {
len = probe_unmapped_page(mapping, tindex,
PAGE_CACHE_SIZE);
if (!len)
- break;
+ return total;
total += len;
}
- if ((tindex == tlast) && (inode->i_size & ~PAGE_CACHE_MASK)) {
- len = probe_unmapped_page(mapping, tindex,
- inode->i_size & ~PAGE_CACHE_MASK);
- total += len;
+ if (tindex == tlast &&
+ (tloff = i_size_read(inode) & (PAGE_CACHE_SIZE - 1))) {
+ total += probe_unmapped_page(mapping, tindex, tloff);
}
}
return total;
@@ -384,7 +408,16 @@
pb = pagebuf_lookup(mp->pbm_target,
mp->pbm_offset, mp->pbm_bsize, 0);
if (!pb)
- return -ENOMEM;
+ return -EAGAIN;
+
+ /* Take a reference to the inode to prevent it from
+ * being reclaimed while we have outstanding unwritten
+ * extent IO on it.
+ */
+ if ((igrab(inode)) != inode) {
+ pagebuf_free(pb);
+ return -EAGAIN;
+ }
/* Set the count to 1 initially, this will stop an I/O
* completion callout which happens before we have started
@@ -421,14 +454,14 @@
*/
if (bh == head) {
struct address_space *mapping = inode->i_mapping;
- unsigned long tindex, tlast, bs;
+ unsigned long tindex, tloff, tlast, bs;
struct page *page;
- tlast = inode->i_size >> PAGE_CACHE_SHIFT;
- tlast = min(tlast, start_page->index + pb->pb_page_count - 1);
- for (tindex = start_page->index + 1; tindex < tlast; tindex++) {
+ tlast = i_size_read(inode) >> PAGE_CACHE_SHIFT;
+ tloff = min(tlast, start_page->index + pb->pb_page_count - 1);
+ for (tindex = start_page->index + 1; tindex < tloff; tindex++) {
page = probe_unwritten_page(mapping, tindex, mp, pb,
- PAGE_CACHE_SIZE, &bs);
+ PAGE_CACHE_SIZE, &bs);
if (!page)
break;
nblocks += bs;
@@ -436,14 +469,14 @@
convert_page(inode, page, mp, pb, 1, all_bh);
}
- if ((tindex == tlast) && (inode->i_size & ~PAGE_CACHE_MASK)) {
+ if (tindex == tlast &&
+ (tloff = (i_size_read(inode) & (PAGE_CACHE_SIZE - 1)))) {
page = probe_unwritten_page(mapping, tindex, mp, pb,
- inode->i_size & ~PAGE_CACHE_MASK, &bs);
+ tloff, &bs);
if (page) {
nblocks += bs;
atomic_add(bs, &pb->pb_io_remaining);
- convert_page(inode, page,
- mp, pb, 1, all_bh);
+ convert_page(inode, page, mp, pb, 1, all_bh);
}
}
}
@@ -456,7 +489,7 @@
XFS_BUF_SET_SIZE(pb, size);
XFS_BUF_SET_OFFSET(pb, offset);
XFS_BUF_SET_FSPRIVATE(pb, LINVFS_GET_VP(inode));
- XFS_BUF_SET_IODONE_FUNC(pb, linvfs_unwritten_conv);
+ XFS_BUF_SET_IODONE_FUNC(pb, linvfs_unwritten_convert);
if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
pagebuf_iodone(pb, 1, 1);
@@ -516,11 +549,11 @@
int i = 0, index = 0;
int bbits = inode->i_blkbits;
- end_index = inode->i_size >> PAGE_CACHE_SHIFT;
+ end_index = i_size_read(inode) >> PAGE_CACHE_SHIFT;
if (page->index < end_index) {
end = PAGE_CACHE_SIZE;
} else {
- end = inode->i_size & (PAGE_CACHE_SIZE-1);
+ end = i_size_read(inode) & (PAGE_CACHE_SIZE-1);
}
bh = head = page_buffers(page);
do {
@@ -617,11 +650,11 @@
STATIC int
page_state_convert(
+ struct inode *inode,
struct page *page,
int startio,
int unmapped) /* also implies page uptodate */
{
- struct inode *inode = page->mapping->host;
struct buffer_head *bh_arr[MAX_BUF_PER_PAGE], *bh, *head;
page_buf_bmap_t *mp, map;
unsigned long p_offset = 0, end_index;
@@ -632,9 +665,9 @@
/* Are we off the end of the file ? */
- end_index = inode->i_size >> PAGE_CACHE_SHIFT;
+ end_index = i_size_read(inode) >> PAGE_CACHE_SHIFT;
if (page->index >= end_index) {
- unsigned remaining = inode->i_size & (PAGE_CACHE_SIZE-1);
+ unsigned remaining = i_size_read(inode) & (PAGE_CACHE_SIZE-1);
if ((page->index >= end_index+1) || !remaining) {
return -EIO;
}
@@ -642,8 +675,8 @@
offset = (loff_t)page->index << PAGE_CACHE_SHIFT;
end_offset = offset + PAGE_CACHE_SIZE;
- if (end_offset > inode->i_size)
- end_offset = inode->i_size;
+ if (end_offset > i_size_read(inode))
+ end_offset = i_size_read(inode);
bh = head = page_buffers(page);
mp = NULL;
@@ -804,7 +837,7 @@
linvfs_get_block_core(
struct inode *inode,
sector_t iblock,
- int blocks,
+ unsigned long blocks,
struct buffer_head *bh_result,
int create,
int direct,
@@ -822,7 +855,7 @@
*/
if (blocks)
size = blocks << inode->i_blkbits;
- else if (create && (offset >= inode->i_size))
+ else if (create && (offset >= i_size_read(inode)))
size = 1 << XFS_WRITE_IO_LOG;
else
size = 1 << inode->i_blkbits;
@@ -854,8 +887,11 @@
set_buffer_mapped(bh_result);
}
if (pbmap.pbm_flags & PBMF_UNWRITTEN) {
- if (create)
+ if (create) {
+ if (direct)
+ bh_result->b_private = inode;
set_buffer_mapped(bh_result);
+ }
set_buffer_unwritten(bh_result);
set_buffer_delay(bh_result);
}
@@ -867,7 +903,7 @@
*/
if (create &&
((!buffer_mapped(bh_result) && !buffer_uptodate(bh_result)) ||
- (offset >= inode->i_size))) {
+ (offset >= i_size_read(inode)) || (pbmap.pbm_flags & PBMF_NEW))) {
set_buffer_new(bh_result);
}
@@ -932,11 +968,22 @@
loff_t offset,
unsigned long nr_segs)
{
- struct file *file = iocb->ki_filp;
- struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
+ struct file *file = iocb->ki_filp;
+ struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
+ vnode_t *vp = LINVFS_GET_VP(inode);
+ page_buf_bmap_t pbmap;
+ int maps = 1;
+ int error;
+
+ VOP_BMAP(vp, offset, 0, BMAP_DEVICE, &pbmap, &maps, error);
+ if (error)
+ return -error;
- return blockdev_direct_IO(rw, iocb, inode, NULL,
- iov, offset, nr_segs, linvfs_get_blocks_direct);
+ return blockdev_direct_IO(rw, iocb, inode,
+ pbmap.pbm_target->pbr_bdev,
+ iov, offset, nr_segs,
+ linvfs_get_blocks_direct,
+ linvfs_unwritten_convert_direct);
}
@@ -949,11 +996,6 @@
vnode_t *vp = LINVFS_GET_VP(inode);
int error;
- /* block - Linux disk blocks 512b */
- /* bmap input offset - bytes 1b */
- /* bmap output bn - XFS BBs 512b */
- /* bmap output delta - bytes 1b */
-
vn_trace_entry(vp, "linvfs_bmap", (inst_t *)__return_address);
VOP_RWLOCK(vp, VRWLOCK_READ);
@@ -1021,7 +1063,6 @@
* the page, we have to check the process flags first, if we
* are already in a transaction or disk I/O during allocations
* is off, we need to fail the writepage and redirty the page.
- * We also need to set PF_NOIO ourselves.
*/
STATIC int
@@ -1057,7 +1098,7 @@
* then mark the page dirty again and leave the page
* as is.
*/
- if ((current->flags & (PF_FSTRANS)) && need_trans)
+ if (PFLAGS_TEST_FSTRANS() && need_trans)
goto out_fail;
/*
@@ -1071,7 +1112,7 @@
* Convert delayed allocate, unwritten or unmapped space
* to real space and flush out to disk.
*/
- error = page_state_convert(page, 1, unmapped);
+ error = page_state_convert(inode, page, 1, unmapped);
if (error == -EAGAIN)
goto out_fail;
if (unlikely(error < 0))
@@ -1112,6 +1153,7 @@
struct page *page,
int gfp_mask)
{
+ struct inode *inode = page->mapping->host;
int delalloc, unmapped, unwritten;
count_page_state(page, &delalloc, &unmapped, &unwritten);
@@ -1127,7 +1169,7 @@
* Never need to allocate space here - we will always
* come back to writepage in that case.
*/
- if (page_state_convert(page, 0, 0) == 0)
+ if (page_state_convert(inode, page, 0, 0) == 0)
goto free_buffers;
return 0;
diff -Nru a/fs/xfs/linux/xfs_file.c b/fs/xfs/linux/xfs_file.c
--- a/fs/xfs/linux/xfs_file.c Sun Aug 3 13:14:48 2003
+++ b/fs/xfs/linux/xfs_file.c Sun Aug 3 13:14:48 2003
@@ -59,105 +59,102 @@
STATIC ssize_t
-linvfs_readv(
- struct file *filp,
- const struct iovec *iovp,
- unsigned long nr_segs,
- loff_t *ppos)
+linvfs_read(
+ struct kiocb *iocb,
+ char __user *buf,
+ size_t count,
+ loff_t pos)
{
- vnode_t *vp = LINVFS_GET_VP(filp->f_dentry->d_inode);
+ struct iovec iov = {buf, count};
+ vnode_t *vp;
int error;
- VOP_READ(vp, filp, iovp, nr_segs, ppos, NULL, error);
+ BUG_ON(iocb->ki_pos != pos);
+ vp = LINVFS_GET_VP(iocb->ki_filp->f_dentry->d_inode);
+ VOP_READ(vp, iocb, &iov, 1, &iocb->ki_pos, NULL, error);
return error;
}
STATIC ssize_t
-linvfs_writev(
- struct file *filp,
- const struct iovec *iovp,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- struct inode *inode = filp->f_dentry->d_inode;
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error = filp->f_error;
-
- if (unlikely(error)) {
- filp->f_error = 0;
- return error;
- }
+linvfs_write(
+ struct kiocb *iocb,
+ const char *buf,
+ size_t count,
+ loff_t pos)
+{
+ struct iovec iov = {(void *)buf, count};
+ struct file *file = iocb->ki_filp;
+ struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
+ vnode_t *vp = LINVFS_GET_VP(inode);
+ int error;
+ int direct = file->f_flags & O_DIRECT;
- /*
- * We allow multiple direct writers in, there is no
- * potential call to vmtruncate in that path.
- */
- if (filp->f_flags & O_DIRECT) {
- VOP_WRITE(vp, filp, iovp, nr_segs, ppos, NULL, error);
+ BUG_ON(iocb->ki_pos != pos);
+
+ if (direct) {
+ VOP_WRITE(vp, iocb, &iov, 1, &iocb->ki_pos, NULL, error);
} else {
down(&inode->i_sem);
- VOP_WRITE(vp, filp, iovp, nr_segs, ppos, NULL, error);
+ VOP_WRITE(vp, iocb, &iov, 1, &iocb->ki_pos, NULL, error);
up(&inode->i_sem);
}
return error;
}
-
STATIC ssize_t
-linvfs_read(
- struct file *filp,
- char *buf,
- size_t count,
+linvfs_readv(
+ struct file *file,
+ const struct iovec *iov,
+ unsigned long nr_segs,
loff_t *ppos)
{
- struct iovec iov = {buf, count};
+ struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
+ vnode_t *vp = LINVFS_GET_VP(inode);
+ struct kiocb kiocb;
+ int error;
- return linvfs_readv(filp, &iov, 1, ppos);
-}
+ init_sync_kiocb(&kiocb, file);
+ kiocb.ki_pos = *ppos;
+ VOP_READ(vp, &kiocb, iov, nr_segs, &kiocb.ki_pos, NULL, error);
+ if (-EIOCBQUEUED == error)
+ error = wait_on_sync_kiocb(&kiocb);
+ *ppos = kiocb.ki_pos;
+ return error;
+}
STATIC ssize_t
-linvfs_write(
+linvfs_writev(
struct file *file,
- const char *buf,
- size_t count,
+ const struct iovec *iov,
+ unsigned long nr_segs,
loff_t *ppos)
{
- struct iovec iov = {(void *)buf, count};
-
- return linvfs_writev(file, &iov, 1, ppos);
-}
-
-
-STATIC ssize_t
-linvfs_aio_read(
- struct kiocb *iocb,
- char *buf,
- size_t count,
- loff_t pos)
-{
- struct iovec iov = {buf, count};
-
- return linvfs_readv(iocb->ki_filp, &iov, 1, &iocb->ki_pos);
-}
-
+ struct inode *inode = file->f_dentry->d_inode->i_mapping->host;
+ vnode_t *vp = LINVFS_GET_VP(inode);
+ struct kiocb kiocb;
+ int error;
+ int direct = file->f_flags & O_DIRECT;
-STATIC ssize_t
-linvfs_aio_write(
- struct kiocb *iocb,
- const char *buf,
- size_t count,
- loff_t pos)
-{
- struct iovec iov = {(void *)buf, count};
+ init_sync_kiocb(&kiocb, file);
+ kiocb.ki_pos = *ppos;
+ if (direct) {
+ VOP_WRITE(vp, &kiocb, iov, nr_segs, &kiocb.ki_pos, NULL, error);
+ } else {
+ down(&inode->i_sem);
+ VOP_WRITE(vp, &kiocb, iov, nr_segs, &kiocb.ki_pos, NULL, error);
+ up(&inode->i_sem);
+ }
+ if (-EIOCBQUEUED == error)
+ error = wait_on_sync_kiocb(&kiocb);
+ *ppos = kiocb.ki_pos;
- return linvfs_writev(iocb->ki_filp, &iov, 1, &iocb->ki_pos);
+ return error;
}
-
STATIC ssize_t
linvfs_sendfile(
struct file *filp,
@@ -183,7 +180,7 @@
vnode_t *vp = LINVFS_GET_VP(inode);
int error;
- if (!(filp->f_flags & O_LARGEFILE) && inode->i_size > MAX_NON_LFS)
+ if (!(filp->f_flags & O_LARGEFILE) && i_size_read(inode) > MAX_NON_LFS)
return -EFBIG;
ASSERT(vp);
@@ -381,12 +378,12 @@
struct file_operations linvfs_file_operations = {
.llseek = generic_file_llseek,
- .read = linvfs_read,
- .write = linvfs_write,
+ .read = do_sync_read,
+ .write = do_sync_write,
.readv = linvfs_readv,
.writev = linvfs_writev,
- .aio_read = linvfs_aio_read,
- .aio_write = linvfs_aio_write,
+ .aio_read = linvfs_read,
+ .aio_write = linvfs_write,
.sendfile = linvfs_sendfile,
.ioctl = linvfs_ioctl,
.mmap = linvfs_file_mmap,
diff -Nru a/fs/xfs/linux/xfs_globals.c b/fs/xfs/linux/xfs_globals.c
--- a/fs/xfs/linux/xfs_globals.c Sun Aug 3 13:14:49 2003
+++ b/fs/xfs/linux/xfs_globals.c Sun Aug 3 13:14:49 2003
@@ -51,15 +51,14 @@
*/
xfs_param_t xfs_params = {
- /* MIN DFLT MAX */
- restrict_chown: { 0, 1, 1 },
- sgid_inherit: { 0, 0, 1 },
- symlink_mode: { 0, 0, 1 },
- panic_mask: { 0, 0, 127 },
- error_level: { 0, 3, 11 },
- sync_interval: { HZ, 30*HZ, 60*HZ },
- stats_clear: { 0, 0, 1 },
-
+ /* MIN DFLT MAX */
+ .restrict_chown = { 0, 1, 1 },
+ .sgid_inherit = { 0, 0, 1 },
+ .symlink_mode = { 0, 0, 1 },
+ .panic_mask = { 0, 0, 127 },
+ .error_level = { 0, 3, 11 },
+ .sync_interval = { HZ, 30*HZ, 60*HZ },
+ .stats_clear = { 0, 0, 1 },
};
/*
diff -Nru a/fs/xfs/linux/xfs_ioctl.c b/fs/xfs/linux/xfs_ioctl.c
--- a/fs/xfs/linux/xfs_ioctl.c Sun Aug 3 13:14:51 2003
+++ b/fs/xfs/linux/xfs_ioctl.c Sun Aug 3 13:14:51 2003
@@ -624,15 +624,11 @@
case XFS_IOC_DIOINFO: {
struct dioattr da;
+ pb_target_t *target =
+ (ip->i_d.di_flags & XFS_DIFLAG_REALTIME) ?
+ mp->m_rtdev_targp : mp->m_ddev_targp;
-
- /*
- * this only really needs to be BBSIZE.
- * it is set to the file system block size to
- * avoid having to do block zeroing on short writes.
- */
- da.d_miniosz = mp->m_sb.sb_blocksize;
- da.d_mem = mp->m_sb.sb_blocksize;
+ da.d_mem = da.d_miniosz = 1 << target->pbr_sshift;
/* The size dio will do in one go */
da.d_maxiosz = 64 * PAGE_CACHE_SIZE;
diff -Nru a/fs/xfs/linux/xfs_iomap.c b/fs/xfs/linux/xfs_iomap.c
--- a/fs/xfs/linux/xfs_iomap.c Sun Aug 3 13:14:48 2003
+++ b/fs/xfs/linux/xfs_iomap.c Sun Aug 3 13:14:48 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -77,6 +77,7 @@
_xfs_imap_to_bmap(
xfs_iocore_t *io,
xfs_off_t offset,
+ int new,
xfs_bmbt_irec_t *imap,
page_buf_bmap_t *pbmapp,
int imaps, /* Number of imap entries */
@@ -117,6 +118,9 @@
pbmapp->pbm_flags |= PBMF_EOF;
}
+ if (new)
+ pbmapp->pbm_flags |= PBMF_NEW;
+
offset += pbmapp->pbm_bsize - pbmapp->pbm_delta;
}
return pbm; /* Return the number filled */
@@ -134,16 +138,18 @@
xfs_mount_t *mp = io->io_mount;
xfs_fileoff_t offset_fsb, end_fsb;
int error = 0;
+ int new = 0;
int lockmode = 0;
xfs_bmbt_irec_t imap;
int nimaps = 1;
int bmap_flags = 0;
if (XFS_FORCED_SHUTDOWN(mp))
- return XFS_ERROR(EIO);
+ return -XFS_ERROR(EIO);
switch (flags &
- (BMAP_READ|BMAP_WRITE|BMAP_ALLOCATE|BMAP_UNWRITTEN)) {
+ (BMAP_READ | BMAP_WRITE | BMAP_ALLOCATE |
+ BMAP_UNWRITTEN | BMAP_DEVICE)) {
case BMAP_READ:
lockmode = XFS_LCK_MAP_SHARED(mp, io);
bmap_flags = XFS_BMAPI_ENTIRE;
@@ -168,12 +174,22 @@
break;
case BMAP_UNWRITTEN:
goto phase2;
+ case BMAP_DEVICE:
+ lockmode = XFS_LCK_MAP_SHARED(mp, io);
+ pbmapp->pbm_target = io->io_flags & XFS_IOCORE_RT ?
+ mp->m_rtdev_targp : mp->m_ddev_targp;
+ error = 0;
+ *npbmaps = 1;
+ goto out;
default:
BUG();
}
+ ASSERT(offset <= mp->m_maxioffset);
+ if ((xfs_fsize_t)offset + count > mp->m_maxioffset)
+ count = mp->m_maxioffset - offset;
+ end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + count);
offset_fsb = XFS_B_TO_FSBT(mp, offset);
- end_fsb = XFS_B_TO_FSB(mp, ((xfs_ufsize_t)(offset + count)));
error = XFS_BMAPI(mp, NULL, io, offset_fsb,
(xfs_filblks_t)(end_fsb - offset_fsb) ,
@@ -197,6 +213,7 @@
error = XFS_IOMAP_WRITE_DELAY(mp, io, offset, count,
flags, &imap, &nimaps);
}
+ new = 1;
break;
case BMAP_ALLOCATE:
/* If we found an extent, return it */
@@ -216,8 +233,8 @@
}
if (nimaps) {
- *npbmaps = _xfs_imap_to_bmap(io, offset, &imap,
- pbmapp, nimaps, *npbmaps);
+ *npbmaps = _xfs_imap_to_bmap(io, offset, new, &imap,
+ pbmapp, nimaps, *npbmaps);
} else if (npbmaps) {
*npbmaps = 0;
}
diff -Nru a/fs/xfs/linux/xfs_iops.c b/fs/xfs/linux/xfs_iops.c
--- a/fs/xfs/linux/xfs_iops.c Sun Aug 3 13:14:47 2003
+++ b/fs/xfs/linux/xfs_iops.c Sun Aug 3 13:14:47 2003
@@ -428,6 +428,7 @@
return error;
}
+#ifdef CONFIG_XFS_POSIX_ACL
STATIC int
linvfs_permission(
struct inode *inode,
@@ -441,6 +442,9 @@
VOP_ACCESS(vp, mode, NULL, error);
return -error;
}
+#else
+#define linvfs_permission NULL
+#endif
STATIC int
linvfs_getattr(
@@ -642,7 +646,7 @@
}
STATIC ssize_t
-__linvfs_getxattr(
+linvfs_getxattr(
struct dentry *dentry,
const char *name,
void *data,
@@ -698,23 +702,7 @@
}
STATIC ssize_t
-linvfs_getxattr(
- struct dentry *dentry,
- const char *name,
- void *data,
- size_t size)
-{
- int error;
-
- down(&dentry->d_inode->i_sem);
- error = __linvfs_getxattr(dentry, name, data, size);
- up(&dentry->d_inode->i_sem);
-
- return error;
-}
-
-STATIC ssize_t
-__linvfs_listxattr(
+linvfs_listxattr(
struct dentry *dentry,
char *data,
size_t size)
@@ -754,21 +742,6 @@
}
}
return result;
-}
-
-STATIC ssize_t
-linvfs_listxattr(
- struct dentry *dentry,
- char *data,
- size_t size)
-{
- int error;
-
- down(&dentry->d_inode->i_sem);
- error = __linvfs_listxattr(dentry, data, size);
- up(&dentry->d_inode->i_sem);
-
- return error;
}
STATIC int
diff -Nru a/fs/xfs/linux/xfs_lrw.c b/fs/xfs/linux/xfs_lrw.c
--- a/fs/xfs/linux/xfs_lrw.c Sun Aug 3 13:14:44 2003
+++ b/fs/xfs/linux/xfs_lrw.c Sun Aug 3 13:14:44 2003
@@ -127,8 +127,8 @@
if (!status) {
pos += bytes;
count -= bytes;
- if (pos > ip->i_size)
- ip->i_size = pos < end_size ? pos : end_size;
+ if (pos > i_size_read(ip))
+ i_size_write(ip, pos < end_size ? pos : end_size);
}
unlock:
@@ -145,12 +145,13 @@
ssize_t /* bytes read, or (-) error */
xfs_read(
bhv_desc_t *bdp,
- struct file *filp,
+ struct kiocb *iocb,
const struct iovec *iovp,
- unsigned long segs,
- loff_t *offp,
+ unsigned int segs,
+ loff_t *offset,
cred_t *credp)
{
+ struct file *file = iocb->ki_filp;
size_t size = 0;
ssize_t ret;
xfs_fsize_t n;
@@ -158,8 +159,8 @@
xfs_mount_t *mp;
vnode_t *vp;
unsigned long seg;
- int direct = (filp->f_flags & O_DIRECT);
- int invisible = (filp->f_mode & FINVIS);
+ int direct = (file->f_flags & O_DIRECT);
+ int invisible = (file->f_mode & FINVIS);
ip = XFS_BHVTOI(bdp);
vp = BHV_TO_VNODE(bdp);
@@ -179,33 +180,23 @@
size += iv->iov_len;
if (unlikely((ssize_t)(size|iv->iov_len) < 0))
return XFS_ERROR(-EINVAL);
- if (direct) { /* XFS specific check */
- if ((__psint_t)iv->iov_base & BBMASK) {
- if (*offp == ip->i_d.di_size)
- return 0;
- return XFS_ERROR(-EINVAL);
- }
- }
- if (access_ok(VERIFY_WRITE, iv->iov_base, iv->iov_len))
- continue;
- if (seg == 0)
- return XFS_ERROR(-EFAULT);
- segs = seg;
- break;
}
/* END copy & waste from filemap.c */
if (direct) {
- if ((*offp & mp->m_blockmask) ||
- (size & mp->m_blockmask)) {
- if (*offp == ip->i_d.di_size) {
+ pb_target_t *target =
+ (ip->i_d.di_flags & XFS_DIFLAG_REALTIME) ?
+ mp->m_rtdev_targp : mp->m_ddev_targp;
+ if ((*offset & target->pbr_smask) ||
+ (size & target->pbr_smask)) {
+ if (*offset == ip->i_d.di_size) {
return (0);
}
return -XFS_ERROR(EINVAL);
}
}
- n = XFS_MAX_FILE_OFFSET - *offp;
+ n = XFS_MAXIOFFSET(mp) - *offset;
if ((n <= 0) || (size == 0))
return 0;
@@ -216,24 +207,31 @@
return -EIO;
}
+ /* OK so we are holding the I/O lock for the duration
+ * of the submission, then what happens if the I/O
+ * does not really happen here, but is scheduled
+ * later?
+ */
xfs_ilock(ip, XFS_IOLOCK_SHARED);
if (DM_EVENT_ENABLED(vp->v_vfsp, ip, DM_EVENT_READ) && !invisible) {
int error;
vrwlock_t locktype = VRWLOCK_READ;
- error = XFS_SEND_DATA(mp, DM_EVENT_READ, bdp, *offp, size,
- FILP_DELAY_FLAG(filp), &locktype);
+ error = XFS_SEND_DATA(mp, DM_EVENT_READ, bdp, *offset, size,
+ FILP_DELAY_FLAG(file), &locktype);
if (error) {
xfs_iunlock(ip, XFS_IOLOCK_SHARED);
return -error;
}
}
- ret = generic_file_readv(filp, iovp, segs, offp);
+ /* We need to deal with the iovec case seperately here */
+ ret = __generic_file_aio_read(iocb, iovp, segs, offset);
xfs_iunlock(ip, XFS_IOLOCK_SHARED);
- XFS_STATS_ADD(xfsstats.xs_read_bytes, ret);
+ if (ret > 0)
+ XFS_STATS_ADD(xfsstats.xs_read_bytes, ret);
if (!invisible)
xfs_ichgtime(ip, XFS_ICHGTIME_ACC);
@@ -245,7 +243,7 @@
xfs_sendfile(
bhv_desc_t *bdp,
struct file *filp,
- loff_t *offp,
+ loff_t *offset,
size_t count,
read_actor_t actor,
void *target,
@@ -265,7 +263,7 @@
XFS_STATS_INC(xfsstats.xs_read_calls);
- n = XFS_MAX_FILE_OFFSET - *offp;
+ n = XFS_MAXIOFFSET(mp) - *offset;
if ((n <= 0) || (count == 0))
return 0;
@@ -280,14 +278,14 @@
vrwlock_t locktype = VRWLOCK_READ;
int error;
- error = XFS_SEND_DATA(mp, DM_EVENT_READ, bdp, *offp, count,
+ error = XFS_SEND_DATA(mp, DM_EVENT_READ, bdp, *offset, count,
FILP_DELAY_FLAG(filp), &locktype);
if (error) {
xfs_iunlock(ip, XFS_IOLOCK_SHARED);
return -error;
}
}
- ret = generic_file_sendfile(filp, offp, count, actor, target);
+ ret = generic_file_sendfile(filp, offset, count, actor, target);
xfs_iunlock(ip, XFS_IOLOCK_SHARED);
XFS_STATS_ADD(xfsstats.xs_read_bytes, ret);
@@ -454,7 +452,8 @@
}
ASSERT(nimaps > 0);
- if (imap.br_startblock == HOLESTARTBLOCK) {
+ if (imap.br_state == XFS_EXT_UNWRITTEN ||
+ imap.br_startblock == HOLESTARTBLOCK) {
/*
* This loop handles initializing pages that were
* partially initialized by the code below this
@@ -515,19 +514,20 @@
ssize_t /* bytes written, or (-) error */
xfs_write(
bhv_desc_t *bdp,
- struct file *file,
+ struct kiocb *iocb,
const struct iovec *iovp,
- unsigned long segs,
+ unsigned int segs,
loff_t *offset,
cred_t *credp)
{
+ struct file *file = iocb->ki_filp;
size_t size = 0;
xfs_inode_t *xip;
xfs_mount_t *mp;
ssize_t ret;
int error = 0;
xfs_fsize_t isize, new_size;
- xfs_fsize_t n, limit = XFS_MAX_FILE_OFFSET;
+ xfs_fsize_t n, limit;
xfs_iocore_t *io;
vnode_t *vp;
unsigned long seg;
@@ -554,16 +554,6 @@
size += iv->iov_len;
if (unlikely((ssize_t)(size|iv->iov_len) < 0))
return XFS_ERROR(-EINVAL);
- if (direct) { /* XFS specific check */
- if ((__psint_t)iv->iov_base & BBMASK)
- return XFS_ERROR(-EINVAL);
- }
- if (access_ok(VERIFY_READ, iv->iov_base, iv->iov_len))
- continue;
- if (seg == 0)
- return XFS_ERROR(-EFAULT);
- segs = seg;
- break;
}
/* END copy & waste from filemap.c */
@@ -575,13 +565,17 @@
xfs_check_frozen(mp, bdp, XFS_FREEZE_WRITE);
- if (XFS_FORCED_SHUTDOWN(xip->i_mount)) {
+ if (XFS_FORCED_SHUTDOWN(mp)) {
return -EIO;
}
if (direct) {
- if ((*offset & mp->m_blockmask) ||
- (size & mp->m_blockmask)) {
+ pb_target_t *target =
+ (xip->i_d.di_flags & XFS_DIFLAG_REALTIME) ?
+ mp->m_rtdev_targp : mp->m_ddev_targp;
+
+ if ((*offset & target->pbr_smask) ||
+ (size & target->pbr_smask)) {
return XFS_ERROR(-EINVAL);
}
iolock = XFS_IOLOCK_SHARED;
@@ -593,6 +587,7 @@
xfs_ilock(xip, XFS_ILOCK_EXCL|iolock);
isize = xip->i_d.di_size;
+ limit = XFS_MAXIOFFSET(mp);
if (file->f_flags & O_APPEND)
*offset = isize;
@@ -692,7 +687,7 @@
xfs_inval_cached_pages(vp, &xip->i_iocore, *offset, 1, 1);
}
- ret = generic_file_write_nolock(file, iovp, segs, offset);
+ ret = generic_file_aio_write_nolock(iocb, iovp, segs, offset);
if ((ret == -ENOSPC) &&
DM_EVENT_ENABLED(vp->v_vfsp, xip, DM_EVENT_NOSPACE) && !invisible) {
@@ -709,24 +704,25 @@
}
- if (ret <= 0) {
- xfs_rwunlock(bdp, locktype);
- return ret;
- }
-
- XFS_STATS_ADD(xfsstats.xs_write_bytes, ret);
-
if (*offset > xip->i_d.di_size) {
xfs_ilock(xip, XFS_ILOCK_EXCL);
if (*offset > xip->i_d.di_size) {
struct inode *inode = LINVFS_GET_IP(vp);
- inode->i_size = xip->i_d.di_size = *offset;
+ xip->i_d.di_size = *offset;
+ i_size_write(inode, *offset);
xip->i_update_core = 1;
xip->i_update_size = 1;
}
xfs_iunlock(xip, XFS_ILOCK_EXCL);
}
+
+ if (ret <= 0) {
+ xfs_rwunlock(bdp, locktype);
+ return ret;
+ }
+
+ XFS_STATS_ADD(xfsstats.xs_write_bytes, ret);
/* Handle various SYNC-type writes */
if ((file->f_flags & O_SYNC) || IS_SYNC(file->f_dentry->d_inode)) {
diff -Nru a/fs/xfs/linux/xfs_lrw.h b/fs/xfs/linux/xfs_lrw.h
--- a/fs/xfs/linux/xfs_lrw.h Sun Aug 3 13:14:45 2003
+++ b/fs/xfs/linux/xfs_lrw.h Sun Aug 3 13:14:45 2003
@@ -54,11 +54,11 @@
extern int xfs_zero_eof(struct vnode *, struct xfs_iocore *, xfs_off_t,
xfs_fsize_t, xfs_fsize_t);
-extern ssize_t xfs_read(struct bhv_desc *, struct file *,
- const struct iovec *, unsigned long,
+extern ssize_t xfs_read(struct bhv_desc *, struct kiocb *,
+ const struct iovec *, unsigned int,
loff_t *, struct cred *);
-extern ssize_t xfs_write(struct bhv_desc *, struct file *,
- const struct iovec *, unsigned long,
+extern ssize_t xfs_write(struct bhv_desc *, struct kiocb *,
+ const struct iovec *, unsigned int,
loff_t *, struct cred *);
extern ssize_t xfs_sendfile(struct bhv_desc *, struct file *,
loff_t *, size_t, read_actor_t,
diff -Nru a/fs/xfs/linux/xfs_super.c b/fs/xfs/linux/xfs_super.c
--- a/fs/xfs/linux/xfs_super.c Sun Aug 3 13:14:52 2003
+++ b/fs/xfs/linux/xfs_super.c Sun Aug 3 13:14:52 2003
@@ -79,7 +79,7 @@
STATIC kmem_cache_t * linvfs_inode_cachep;
STATIC struct xfs_mount_args *
-args_allocate(
+xfs_args_allocate(
struct super_block *sb)
{
struct xfs_mount_args *args;
@@ -98,6 +98,40 @@
return args;
}
+__uint64_t
+xfs_max_file_offset(
+ unsigned int blockshift)
+{
+ unsigned int pagefactor = 1;
+ unsigned int bitshift = BITS_PER_LONG - 1;
+
+ /* Figure out maximum filesize, on Linux this can depend on
+ * the filesystem blocksize (on 32 bit platforms).
+ * __block_prepare_write does this in an [unsigned] long...
+ * page->index << (PAGE_CACHE_SHIFT - bbits)
+ * So, for page sized blocks (4K on 32 bit platforms),
+ * this wraps at around 8Tb (hence MAX_LFS_FILESIZE which is
+ * (((u64)PAGE_CACHE_SIZE << (BITS_PER_LONG-1))-1)
+ * but for smaller blocksizes it is less (bbits = log2 bsize).
+ * Note1: get_block_t takes a long (implicit cast from above)
+ * Note2: The Large Block Device (LBD and HAVE_SECTOR_T) patch
+ * can optionally convert the [unsigned] long from above into
+ * an [unsigned] long long.
+ */
+
+#if BITS_PER_LONG == 32
+# if defined(HAVE_SECTOR_T)
+ ASSERT(sizeof(sector_t) == 8);
+ pagefactor = PAGE_CACHE_SIZE;
+ bitshift = BITS_PER_LONG;
+# else
+ pagefactor = PAGE_CACHE_SIZE >> (PAGE_CACHE_SHIFT - blockshift);
+# endif
+#endif
+
+ return (((__uint64_t)pagefactor) << bitshift) - 1;
+}
+
STATIC __inline__ void
xfs_set_inodeops(
struct inode *inode)
@@ -144,7 +178,7 @@
}
inode->i_blksize = PAGE_CACHE_SIZE;
inode->i_generation = ip->i_d.di_gen;
- inode->i_size = ip->i_d.di_size;
+ i_size_write(inode, ip->i_d.di_size);
inode->i_blocks =
XFS_FSB_TO_BB(mp, ip->i_d.di_nblocks + ip->i_delayed_blks);
inode->i_atime.tv_sec = ip->i_d.di_atime.t_sec;
@@ -287,20 +321,14 @@
return btp;
}
-STATIC __inline__ unsigned int gfp_mask(void)
-{
- /* If we're not in a transaction, FS activity is ok */
- if (current->flags & PF_FSTRANS) return GFP_NOFS;
- return GFP_KERNEL;
-}
-
STATIC struct inode *
linvfs_alloc_inode(
struct super_block *sb)
{
vnode_t *vp;
- vp = (vnode_t *)kmem_cache_alloc(linvfs_inode_cachep, gfp_mask());
+ vp = (vnode_t *)kmem_cache_alloc(linvfs_inode_cachep,
+ kmem_flags_convert(KM_SLEEP));
if (!vp)
return NULL;
return LINVFS_GET_IP(vp);
@@ -497,7 +525,7 @@
char *options)
{
vfs_t *vfsp = LINVFS_GET_VFS(sb);
- struct xfs_mount_args *args = args_allocate(sb);
+ struct xfs_mount_args *args = xfs_args_allocate(sb);
int error;
VFS_PARSEARGS(vfsp, options, args, 1, error);
@@ -676,7 +704,7 @@
{
vnode_t *rootvp;
struct vfs *vfsp = vfs_allocate();
- struct xfs_mount_args *args = args_allocate(sb);
+ struct xfs_mount_args *args = xfs_args_allocate(sb);
struct kstatfs statvfs;
int error;
@@ -693,7 +721,6 @@
}
sb_min_blocksize(sb, BBSIZE);
- sb->s_maxbytes = XFS_MAX_FILE_OFFSET;
sb->s_export_op = &linvfs_export_ops;
sb->s_qcop = &linvfs_qops;
sb->s_op = &linvfs_sops;
@@ -709,9 +736,10 @@
goto fail_unmount;
sb->s_dirt = 1;
- sb->s_magic = XFS_SB_MAGIC;
+ sb->s_magic = statvfs.f_type;
sb->s_blocksize = statvfs.f_bsize;
sb->s_blocksize_bits = ffs(statvfs.f_bsize) - 1;
+ sb->s_maxbytes = xfs_max_file_offset(sb->s_blocksize_bits);
set_posix_acl_flag(sb);
VFS_ROOT(vfsp, &rootvp, error);
diff -Nru a/fs/xfs/linux/xfs_super.h b/fs/xfs/linux/xfs_super.h
--- a/fs/xfs/linux/xfs_super.h Sun Aug 3 13:14:46 2003
+++ b/fs/xfs/linux/xfs_super.h Sun Aug 3 13:14:46 2003
@@ -66,6 +66,12 @@
# define XFS_REALTIME_STRING
#endif
+#if XFS_BIG_FILESYSTEMS
+# define XFS_BIGFS_STRING "big filesystems, "
+#else
+# define XFS_BIGFS_STRING
+#endif
+
#ifdef CONFIG_XFS_VNODE_TRACING
# define XFS_VNTRACE_STRING "VN-trace, "
#else
@@ -80,6 +86,7 @@
#define XFS_BUILD_OPTIONS XFS_ACL_STRING \
XFS_REALTIME_STRING \
+ XFS_BIGFS_STRING \
XFS_VNTRACE_STRING \
XFS_DBG_STRING /* DBG must be last */
@@ -91,6 +98,8 @@
struct xfs_mount;
struct pb_target;
struct block_device;
+
+extern __uint64_t xfs_max_file_offset(unsigned int);
extern void xfs_initialize_vnode(bhv_desc_t *, vnode_t *, bhv_desc_t *, int);
diff -Nru a/fs/xfs/linux/xfs_version.h b/fs/xfs/linux/xfs_version.h
--- a/fs/xfs/linux/xfs_version.h Sun Aug 3 13:14:52 2003
+++ b/fs/xfs/linux/xfs_version.h Sun Aug 3 13:14:52 2003
@@ -39,8 +39,6 @@
#ifndef __XFS_VERSION_H__
#define __XFS_VERSION_H__
-#include <linux/version.h>
-
-#define XFS_VERSION_STRING "for Linux " UTS_RELEASE
+#define XFS_VERSION_STRING "for Linux"
#endif /* __XFS_VERSION_H__ */
diff -Nru a/fs/xfs/linux/xfs_vfs.h b/fs/xfs/linux/xfs_vfs.h
--- a/fs/xfs/linux/xfs_vfs.h Sun Aug 3 13:14:44 2003
+++ b/fs/xfs/linux/xfs_vfs.h Sun Aug 3 13:14:44 2003
@@ -44,8 +44,8 @@
typedef struct vfs {
u_int vfs_flag; /* flags */
- fsid_t vfs_fsid; /* file system ID */
- fsid_t *vfs_altfsid; /* An ID fixed for life of FS */
+ __kernel_fsid_t vfs_fsid; /* file system ID */
+ __kernel_fsid_t *vfs_altfsid; /* An ID fixed for life of FS */
bhv_head_t vfs_bh; /* head of vfs behavior chain */
struct super_block *vfs_super; /* Linux superblock structure */
struct task_struct *vfs_sync_task;
diff -Nru a/fs/xfs/linux/xfs_vnode.c b/fs/xfs/linux/xfs_vnode.c
--- a/fs/xfs/linux/xfs_vnode.c Sun Aug 3 13:14:47 2003
+++ b/fs/xfs/linux/xfs_vnode.c Sun Aug 3 13:14:47 2003
@@ -208,11 +208,11 @@
inode->i_nlink = va.va_nlink;
inode->i_uid = va.va_uid;
inode->i_gid = va.va_gid;
- inode->i_size = va.va_size;
inode->i_blocks = va.va_nblocks;
inode->i_mtime = va.va_mtime;
inode->i_ctime = va.va_ctime;
inode->i_atime = va.va_atime;
+ i_size_write(inode, va.va_size);
VUNMODIFY(vp);
}
return -error;
diff -Nru a/fs/xfs/linux/xfs_vnode.h b/fs/xfs/linux/xfs_vnode.h
--- a/fs/xfs/linux/xfs_vnode.h Sun Aug 3 13:14:53 2003
+++ b/fs/xfs/linux/xfs_vnode.h Sun Aug 3 13:14:53 2003
@@ -158,11 +158,11 @@
typedef int (*vop_open_t)(bhv_desc_t *, struct cred *);
-typedef ssize_t (*vop_read_t)(bhv_desc_t *, struct file *,
- const struct iovec *, unsigned long,
+typedef ssize_t (*vop_read_t)(bhv_desc_t *, struct kiocb *,
+ const struct iovec *, unsigned int,
loff_t *, struct cred *);
-typedef ssize_t (*vop_write_t)(bhv_desc_t *, struct file *,
- const struct iovec *, unsigned long,
+typedef ssize_t (*vop_write_t)(bhv_desc_t *, struct kiocb *,
+ const struct iovec *, unsigned int,
loff_t *, struct cred *);
typedef ssize_t (*vop_sendfile_t)(bhv_desc_t *, struct file *,
loff_t *, size_t, read_actor_t,
diff -Nru a/fs/xfs/pagebuf/page_buf.c b/fs/xfs/pagebuf/page_buf.c
--- a/fs/xfs/pagebuf/page_buf.c Sun Aug 3 13:14:44 2003
+++ b/fs/xfs/pagebuf/page_buf.c Sun Aug 3 13:14:44 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -130,11 +130,11 @@
*/
pagebuf_param_t pb_params = {
- /* MIN DFLT MAX */
- flush_interval: { HZ/2, HZ, 30*HZ },
- age_buffer: { 1*HZ, 15*HZ, 300*HZ },
- stats_clear: { 0, 0, 1 },
- debug: { 0, 0, 1 },
+ /* MIN DFLT MAX */
+ .flush_interval = { HZ/2, HZ, 30*HZ },
+ .age_buffer = { 1*HZ, 15*HZ, 300*HZ },
+ .stats_clear = { 0, 0, 1 },
+ .debug = { 0, 0, 1 },
};
/*
@@ -834,13 +834,14 @@
page_buf_t *
pagebuf_get_empty(
+ size_t len,
pb_target_t *target)
{
page_buf_t *pb;
pb = pagebuf_allocate(_PBF_LOCKABLE);
if (pb)
- _pagebuf_initialize(pb, target, 0, 0, _PBF_LOCKABLE);
+ _pagebuf_initialize(pb, target, 0, len, _PBF_LOCKABLE);
return pb;
}
@@ -1250,6 +1251,28 @@
/*
* Helper routine for pagebuf_iorequest
*/
+
+STATIC __inline__ int
+_pagebuf_iolocked(
+ page_buf_t *pb)
+{
+ ASSERT(pb->pb_flags & (PBF_READ|PBF_WRITE));
+ if (pb->pb_flags & PBF_READ)
+ return pb->pb_locked;
+ return ((pb->pb_flags & _PBF_LOCKABLE) == 0);
+}
+
+STATIC __inline__ void
+_pagebuf_iodone(
+ page_buf_t *pb,
+ int schedule)
+{
+ if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
+ pb->pb_locked = 0;
+ pagebuf_iodone(pb, (pb->pb_flags & PBF_FS_DATAIOD), schedule);
+ }
+}
+
STATIC int
bio_end_io_pagebuf(
struct bio *bio,
@@ -1285,43 +1308,19 @@
SetPageUptodate(page);
}
- if (pb->pb_locked) {
+ if (_pagebuf_iolocked(pb)) {
unlock_page(page);
- } else {
- BUG_ON(PageLocked(page));
}
}
- if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
- pb->pb_locked = 0;
- pagebuf_iodone(pb, (pb->pb_flags & PBF_FS_DATAIOD), 1);
- }
-
+ _pagebuf_iodone(pb, 1);
bio_put(bio);
return 0;
}
-/*
- * pagebuf_iorequest
- *
- * pagebuf_iorequest is the core I/O request routine.
- * It assumes that the buffer is well-formed and
- * mapped and ready for physical I/O, unlike
- * pagebuf_iostart() and pagebuf_iophysio(). Those
- * routines call the pagebuf_ioinitiate routine to start I/O,
- * if it is present, or else call pagebuf_iorequest()
- * directly if the pagebuf_ioinitiate routine is not present.
- *
- * This function will be responsible for ensuring access to the
- * pages is restricted whilst I/O is in progress - for locking
- * pagebufs the pagebuf lock is the mediator, for non-locking
- * pagebufs the pages will be locked. In the locking case we
- * need to use the pagebuf lock as multiple meta-data buffers
- * will reference the same page.
- */
-int
-pagebuf_iorequest( /* start real I/O */
- page_buf_t *pb) /* buffer to convey to device */
+void
+_pagebuf_ioapply(
+ page_buf_t *pb)
{
int i, map_i, total_nr_pages, nr_pages;
struct bio *bio;
@@ -1329,31 +1328,19 @@
int size = pb->pb_count_desired;
sector_t sector = pb->pb_bn;
unsigned int blocksize = pb->pb_target->pbr_bsize;
- int locking;
-
- locking = (pb->pb_flags & _PBF_LOCKABLE) == 0 && (pb->pb_locked == 0);
+ int locking = _pagebuf_iolocked(pb);
- PB_TRACE(pb, PB_TRACE_REC(ioreq), 0);
-
- if (pb->pb_flags & PBF_DELWRI) {
- pagebuf_delwri_queue(pb, 1);
- return 0;
- }
-
- /* Set the count to 1 initially, this will stop an I/O
- * completion callout which happens before we have started
- * all the I/O from calling pagebuf_iodone too early.
- */
- atomic_set(&pb->pb_io_remaining, 1);
+ total_nr_pages = pb->pb_page_count;
+ map_i = 0;
/* Special code path for reading a sub page size pagebuf in --
* we populate up the whole page, and hence the other metadata
* in the same page. This optimization is only valid when the
* filesystem block size and the page size are equal.
*/
- if (unlikely((pb->pb_buffer_length < PAGE_CACHE_SIZE) &&
- (pb->pb_flags & PBF_READ) && pb->pb_locked &&
- (blocksize == PAGE_CACHE_SIZE))) {
+ if ((pb->pb_buffer_length < PAGE_CACHE_SIZE) &&
+ (pb->pb_flags & PBF_READ) && locking &&
+ (blocksize == PAGE_CACHE_SIZE)) {
bio = bio_alloc(GFP_NOIO, 1);
bio->bi_bdev = pb->pb_target->pbr_bdev;
@@ -1362,19 +1349,15 @@
bio->bi_private = pb;
bio_add_page(bio, pb->pb_pages[0], PAGE_CACHE_SIZE, 0);
+ size = 0;
atomic_inc(&pb->pb_io_remaining);
- submit_bio(READ, bio);
- goto io_submitted;
- }
-
- if (pb->pb_flags & PBF_WRITE) {
- _pagebuf_wait_unpin(pb);
+ goto submit_io;
}
/* Lock down the pages which we need to for the request */
- if (locking) {
+ if (locking && (pb->pb_flags & PBF_WRITE) && (pb->pb_locked == 0)) {
for (i = 0; size; i++) {
int nbytes = PAGE_CACHE_SIZE - offset;
struct page *page = pb->pb_pages[i];
@@ -1389,12 +1372,8 @@
}
offset = pb->pb_offset;
size = pb->pb_count_desired;
- pb->pb_locked = 1;
}
- total_nr_pages = pb->pb_page_count;
- map_i = 0;
-
next_chunk:
atomic_inc(&pb->pb_io_remaining);
nr_pages = BIO_MAX_SECTORS >> (PAGE_SHIFT - BBSHIFT);
@@ -1415,7 +1394,8 @@
if (nbytes > size)
nbytes = size;
- if (bio_add_page(bio, pb->pb_pages[map_i], nbytes, offset) < nbytes)
+ if (bio_add_page(bio, pb->pb_pages[map_i],
+ nbytes, offset) < nbytes)
break;
offset = 0;
@@ -1425,22 +1405,61 @@
total_nr_pages--;
}
- if (pb->pb_flags & PBF_READ) {
- submit_bio(READ, bio);
+submit_io:
+ if (likely(bio->bi_size)) {
+ if (pb->pb_flags & PBF_READ) {
+ submit_bio(READ, bio);
+ } else {
+ submit_bio(WRITE, bio);
+ }
+
+ if (size)
+ goto next_chunk;
} else {
- submit_bio(WRITE, bio);
+ pagebuf_ioerror(pb, EIO);
}
+}
- if (size)
- goto next_chunk;
+/*
+ * pagebuf_iorequest
+ *
+ * pagebuf_iorequest is the core I/O request routine.
+ * It assumes that the buffer is well-formed and
+ * mapped and ready for physical I/O, unlike
+ * pagebuf_iostart() and pagebuf_iophysio(). Those
+ * routines call the pagebuf_ioinitiate routine to start I/O,
+ * if it is present, or else call pagebuf_iorequest()
+ * directly if the pagebuf_ioinitiate routine is not present.
+ *
+ * This function will be responsible for ensuring access to the
+ * pages is restricted whilst I/O is in progress - for locking
+ * pagebufs the pagebuf lock is the mediator, for non-locking
+ * pagebufs the pages will be locked. In the locking case we
+ * need to use the pagebuf lock as multiple meta-data buffers
+ * will reference the same page.
+ */
+int
+pagebuf_iorequest( /* start real I/O */
+ page_buf_t *pb) /* buffer to convey to device */
+{
+ PB_TRACE(pb, PB_TRACE_REC(ioreq), 0);
-io_submitted:
+ if (pb->pb_flags & PBF_DELWRI) {
+ pagebuf_delwri_queue(pb, 1);
+ return 0;
+ }
- if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
- pb->pb_locked = 0;
- pagebuf_iodone(pb, (pb->pb_flags & PBF_FS_DATAIOD), 1);
+ if (pb->pb_flags & PBF_WRITE) {
+ _pagebuf_wait_unpin(pb);
}
+ /* Set the count to 1 initially, this will stop an I/O
+ * completion callout which happens before we have started
+ * all the I/O from calling pagebuf_iodone too early.
+ */
+ atomic_set(&pb->pb_io_remaining, 1);
+ _pagebuf_ioapply(pb);
+ _pagebuf_iodone(pb, 0);
return 0;
}
diff -Nru a/fs/xfs/pagebuf/page_buf.h b/fs/xfs/pagebuf/page_buf.h
--- a/fs/xfs/pagebuf/page_buf.h Sun Aug 3 13:14:49 2003
+++ b/fs/xfs/pagebuf/page_buf.h Sun Aug 3 13:14:49 2003
@@ -37,7 +37,6 @@
#ifndef __PAGE_BUF_H__
#define __PAGE_BUF_H__
-#include <linux/version.h>
#include <linux/config.h>
#include <linux/list.h>
#include <linux/types.h>
@@ -79,8 +78,9 @@
PBMF_EOF = 0x01, /* mapping contains EOF */
PBMF_HOLE = 0x02, /* mapping covers a hole */
PBMF_DELAY = 0x04, /* mapping covers delalloc region */
- PBMF_UNWRITTEN = 0x20 /* mapping covers allocated */
+ PBMF_UNWRITTEN = 0x20, /* mapping covers allocated */
/* but uninitialized file data */
+ PBMF_NEW = 0x40 /* just allocated */
} bmap_flags_t;
typedef enum {
@@ -95,6 +95,7 @@
BMAP_MMAP = (1 << 6), /* allocate for mmap write */
BMAP_SYNC = (1 << 7), /* sync write */
BMAP_TRYLOCK = (1 << 8), /* non-blocking request */
+ BMAP_DEVICE = (1 << 9), /* we only want to know the device */
} bmapi_flags_t;
typedef enum page_buf_flags_e { /* pb_flags values */
@@ -267,6 +268,7 @@
extern page_buf_t *pagebuf_get_empty( /* allocate pagebuf struct with */
/* no memory or disk address */
+ size_t len,
struct pb_target *); /* mount point "fake" inode */
extern page_buf_t *pagebuf_get_no_daddr(/* allocate pagebuf struct */
diff -Nru a/fs/xfs/pagebuf/page_buf_internal.h b/fs/xfs/pagebuf/page_buf_internal.h
--- a/fs/xfs/pagebuf/page_buf_internal.h Sun Aug 3 13:14:48 2003
+++ b/fs/xfs/pagebuf/page_buf_internal.h Sun Aug 3 13:14:48 2003
@@ -43,11 +43,6 @@
#define PB_DEFINE_TRACES
#include "page_buf_trace.h"
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,9)
-#define page_buffers(page) ((page)->buffers)
-#define page_has_buffers(page) ((page)->buffers)
-#endif
-
#ifdef PAGEBUF_LOCK_TRACKING
#define PB_SET_OWNER(pb) (pb->pb_last_holder = current->pid)
#define PB_CLEAR_OWNER(pb) (pb->pb_last_holder = -1)
diff -Nru a/fs/xfs/quota/xfs_qm.c b/fs/xfs/quota/xfs_qm.c
--- a/fs/xfs/quota/xfs_qm.c Sun Aug 3 13:14:44 2003
+++ b/fs/xfs/quota/xfs_qm.c Sun Aug 3 13:14:44 2003
@@ -1612,7 +1612,7 @@
map = kmem_alloc(XFS_DQITER_MAP_SIZE * sizeof(*map), KM_SLEEP);
lblkno = 0;
- maxlblkcnt = XFS_B_TO_FSB(mp, (xfs_ufsize_t)XFS_MAX_FILE_OFFSET);
+ maxlblkcnt = XFS_B_TO_FSB(mp, (xfs_ufsize_t)XFS_MAXIOFFSET(mp));
do {
nmaps = XFS_DQITER_MAP_SIZE;
/*
diff -Nru a/fs/xfs/support/kmem.h b/fs/xfs/support/kmem.h
--- a/fs/xfs/support/kmem.h Sun Aug 3 13:14:53 2003
+++ b/fs/xfs/support/kmem.h Sun Aug 3 13:14:53 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -53,14 +53,32 @@
#define KM_NOSLEEP 0x0002
#define KM_NOFS 0x0004
+typedef unsigned long xfs_pflags_t;
+
+#define PFLAGS_TEST_FSTRANS() (current->flags & PF_FSTRANS)
+
+#define PFLAGS_SET_FSTRANS(STATEP) do { \
+ *(STATEP) = current->flags; \
+ current->flags |= PF_FSTRANS; \
+} while (0)
+
+#define PFLAGS_RESTORE(STATEP) do { \
+ current->flags = *(STATEP); \
+} while (0)
+
+#define PFLAGS_DUP(OSTATEP, NSTATEP) do { \
+ *(NSTATEP) = *(OSTATEP); \
+} while (0)
/*
* XXX get rid of the unconditional __GFP_NOFAIL by adding
* a KM_FAIL flag and using it where we're allowed to fail.
*/
static __inline unsigned int
-flag_convert(int flags)
+kmem_flags_convert(int flags)
{
+ int lflags;
+
#if DEBUG
if (unlikely(flags & ~(KM_SLEEP|KM_NOSLEEP|KM_NOFS))) {
printk(KERN_WARNING
@@ -69,12 +87,13 @@
}
#endif
- if (flags & KM_NOSLEEP)
- return GFP_ATOMIC;
- /* If we're in a transaction, FS activity is not ok */
- else if ((current->flags & PF_FSTRANS) || (flags & KM_NOFS))
- return GFP_NOFS | __GFP_NOFAIL;
- return GFP_KERNEL | __GFP_NOFAIL;
+ lflags = (flags & KM_NOSLEEP) ? GFP_ATOMIC : (GFP_KERNEL|__GFP_NOFAIL);
+
+ /* avoid recusive callbacks to filesystem during transactions */
+ if (PFLAGS_TEST_FSTRANS())
+ lflags &= ~__GFP_FS;
+
+ return lflags;
}
static __inline void *
@@ -82,8 +101,8 @@
{
if (unlikely(MAX_SLAB_SIZE < size))
/* Avoid doing filesystem sensitive stuff to get this */
- return __vmalloc(size, flag_convert(flags), PAGE_KERNEL);
- return kmalloc(size, flag_convert(flags));
+ return __vmalloc(size, kmem_flags_convert(flags), PAGE_KERNEL);
+ return kmalloc(size, kmem_flags_convert(flags));
}
static __inline void *
@@ -128,7 +147,7 @@
static __inline void *
kmem_zone_alloc(kmem_zone_t *zone, int flags)
{
- return kmem_cache_alloc(zone, flag_convert(flags));
+ return kmem_cache_alloc(zone, kmem_flags_convert(flags));
}
static __inline void *
diff -Nru a/fs/xfs/support/mrlock.h b/fs/xfs/support/mrlock.h
--- a/fs/xfs/support/mrlock.h Sun Aug 3 13:14:50 2003
+++ b/fs/xfs/support/mrlock.h Sun Aug 3 13:14:50 2003
@@ -32,7 +32,6 @@
#ifndef __XFS_SUPPORT_MRLOCK_H__
#define __XFS_SUPPORT_MRLOCK_H__
-#include <linux/version.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <asm/atomic.h>
diff -Nru a/fs/xfs/support/sema.h b/fs/xfs/support/sema.h
--- a/fs/xfs/support/sema.h Sun Aug 3 13:14:53 2003
+++ b/fs/xfs/support/sema.h Sun Aug 3 13:14:53 2003
@@ -32,7 +32,6 @@
#ifndef __XFS_SUPPORT_SEMA_H__
#define __XFS_SUPPORT_SEMA_H__
-#include <linux/version.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <asm/atomic.h>
diff -Nru a/fs/xfs/support/spin.h b/fs/xfs/support/spin.h
--- a/fs/xfs/support/spin.h Sun Aug 3 13:14:49 2003
+++ b/fs/xfs/support/spin.h Sun Aug 3 13:14:49 2003
@@ -43,6 +43,8 @@
* We don't need to worry about SMP or not here.
*/
+#define SPLDECL(s) unsigned long s
+
typedef spinlock_t lock_t;
#define spinlock_init(lock, name) spin_lock_init(lock)
diff -Nru a/fs/xfs/xfs_bmap.c b/fs/xfs/xfs_bmap.c
--- a/fs/xfs/xfs_bmap.c Sun Aug 3 13:14:52 2003
+++ b/fs/xfs/xfs_bmap.c Sun Aug 3 13:14:52 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -2170,7 +2170,7 @@
xfs_extlen_t ralen=0; /* realtime allocation length */
#endif
-#define ISLEGAL(x,y) \
+#define ISVALID(x,y) \
(rt ? \
(x) < mp->m_sb.sb_rblocks : \
XFS_FSB_TO_AGNO(mp, x) == XFS_FSB_TO_AGNO(mp, y) && \
@@ -2249,7 +2249,7 @@
/*
* If we're now overlapping the next or previous extent that
* means we can't fit an extsz piece in this hole. Just move
- * the start forward to the first legal spot and set
+ * the start forward to the first valid spot and set
* the length so we hit the end.
*/
if ((ap->off != orig_off && ap->off < prevo) ||
@@ -2310,7 +2310,7 @@
ralen = ap->alen / mp->m_sb.sb_rextsize;
/*
* If the old value was close enough to MAXEXTLEN that
- * we rounded up to it, cut it back so it's legal again.
+ * we rounded up to it, cut it back so it's valid again.
* Note that if it's a really large request (bigger than
* MAXEXTLEN), we don't hear about that number, and can't
* adjust the starting point to match it.
@@ -2343,7 +2343,7 @@
*/
if (ap->eof && ap->prevp->br_startoff != NULLFILEOFF &&
!ISNULLSTARTBLOCK(ap->prevp->br_startblock) &&
- ISLEGAL(ap->prevp->br_startblock + ap->prevp->br_blockcount,
+ ISVALID(ap->prevp->br_startblock + ap->prevp->br_blockcount,
ap->prevp->br_startblock)) {
ap->rval = ap->prevp->br_startblock + ap->prevp->br_blockcount;
/*
@@ -2352,7 +2352,7 @@
adjust = ap->off -
(ap->prevp->br_startoff + ap->prevp->br_blockcount);
if (adjust &&
- ISLEGAL(ap->rval + adjust, ap->prevp->br_startblock))
+ ISVALID(ap->rval + adjust, ap->prevp->br_startblock))
ap->rval += adjust;
}
/*
@@ -2374,7 +2374,7 @@
!ISNULLSTARTBLOCK(ap->prevp->br_startblock) &&
(prevbno = ap->prevp->br_startblock +
ap->prevp->br_blockcount) &&
- ISLEGAL(prevbno, ap->prevp->br_startblock)) {
+ ISVALID(prevbno, ap->prevp->br_startblock)) {
/*
* Calculate gap to end of previous block.
*/
@@ -2386,11 +2386,11 @@
* end and the gap size.
* Heuristic!
* If the gap is large relative to the piece we're
- * allocating, or using it gives us an illegal block
+ * allocating, or using it gives us an invalid block
* number, then just use the end of the previous block.
*/
if (prevdiff <= XFS_ALLOC_GAP_UNITS * ap->alen &&
- ISLEGAL(prevbno + prevdiff,
+ ISVALID(prevbno + prevdiff,
ap->prevp->br_startblock))
prevbno += adjust;
else
@@ -2425,14 +2425,14 @@
/*
* Heuristic!
* If the gap is large relative to the piece we're
- * allocating, or using it gives us an illegal block
+ * allocating, or using it gives us an invalid block
* number, then just use the start of the next block
* offset by our length.
*/
if (gotdiff <= XFS_ALLOC_GAP_UNITS * ap->alen &&
- ISLEGAL(gotbno - gotdiff, gotbno))
+ ISVALID(gotbno - gotdiff, gotbno))
gotbno -= adjust;
- else if (ISLEGAL(gotbno - ap->alen, gotbno)) {
+ else if (ISVALID(gotbno - ap->alen, gotbno)) {
gotbno -= ap->alen;
gotdiff += adjust - ap->alen;
} else
@@ -2734,7 +2734,7 @@
}
}
return 0;
-#undef ISLEGAL
+#undef ISVALID
}
/*
@@ -3353,7 +3353,7 @@
/*
* We don't want to deal with the case of keeping inode data inline yet.
- * So sending the data fork of a regular inode is illegal.
+ * So sending the data fork of a regular inode is invalid.
*/
ASSERT(!((ip->i_d.di_mode & IFMT) == IFREG &&
whichfork == XFS_DATA_FORK));
@@ -5579,7 +5579,7 @@
if (whichfork == XFS_DATA_FORK) {
if (ip->i_d.di_flags & XFS_DIFLAG_PREALLOC) {
prealloced = 1;
- fixlen = XFS_MAX_FILE_OFFSET;
+ fixlen = XFS_MAXIOFFSET(mp);
} else {
prealloced = 0;
fixlen = ip->i_d.di_size;
diff -Nru a/fs/xfs/xfs_buf.h b/fs/xfs/xfs_buf.h
--- a/fs/xfs/xfs_buf.h Sun Aug 3 13:14:52 2003
+++ b/fs/xfs/xfs_buf.h Sun Aug 3 13:14:52 2003
@@ -316,11 +316,8 @@
#define xfs_baread(target, rablkno, ralen) \
pagebuf_readahead((target), (rablkno), (ralen), PBF_DONT_BLOCK)
-#define XFS_getrbuf(sleep,mp) \
- pagebuf_get_empty((mp)->m_ddev_targp)
-#define XFS_ngetrbuf(len,mp) \
- pagebuf_get_no_daddr(len,(mp)->m_ddev_targp)
-#define XFS_freerbuf(bp) pagebuf_free(bp)
-#define XFS_nfreerbuf(bp) pagebuf_free(bp)
+#define xfs_buf_get_empty(len, target) pagebuf_get_empty((len), (target))
+#define xfs_buf_get_noaddr(len, target) pagebuf_get_no_daddr((len), (target))
+#define xfs_buf_free(bp) pagebuf_free(bp)
#endif
diff -Nru a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c
--- a/fs/xfs/xfs_inode.c Sun Aug 3 13:14:52 2003
+++ b/fs/xfs/xfs_inode.c Sun Aug 3 13:14:52 2003
@@ -1040,7 +1040,7 @@
size = XFS_IFORK_NEXTENTS(ip, whichfork) * (uint)sizeof(xfs_bmbt_rec_t);
ifp = XFS_IFORK_PTR(ip, whichfork);
/*
- * We know that the size is legal (it's checked in iformat_btree)
+ * We know that the size is valid (it's checked in iformat_btree)
*/
ifp->if_u1.if_extents = kmem_alloc(size, KM_SLEEP);
ASSERT(ifp->if_u1.if_extents != NULL);
@@ -1265,7 +1265,7 @@
*/
if (xfs_bmapi(NULL, ip, map_first,
(XFS_B_TO_FSB(mp,
- (xfs_ufsize_t)XFS_MAX_FILE_OFFSET) -
+ (xfs_ufsize_t)XFS_MAXIOFFSET(mp)) -
map_first),
XFS_BMAPI_ENTIRE, NULL, 0, imaps, &nimaps,
NULL))
@@ -1319,11 +1319,11 @@
last_byte = XFS_FSB_TO_B(mp, last_block);
if (last_byte < 0) {
- return XFS_MAX_FILE_OFFSET;
+ return XFS_MAXIOFFSET(mp);
}
last_byte += (1 << mp->m_writeio_log);
if (last_byte < 0) {
- return XFS_MAX_FILE_OFFSET;
+ return XFS_MAXIOFFSET(mp);
}
return last_byte;
}
@@ -1613,7 +1613,7 @@
* beyond the maximum file size (ie it is the same as last_block),
* then there is nothing to do.
*/
- last_block = XFS_B_TO_FSB(mp, (xfs_ufsize_t)XFS_MAX_FILE_OFFSET);
+ last_block = XFS_B_TO_FSB(mp, (xfs_ufsize_t)XFS_MAXIOFFSET(mp));
ASSERT(first_unmap_block <= last_block);
done = 0;
if (last_block == first_unmap_block) {
diff -Nru a/fs/xfs/xfs_inode.h b/fs/xfs/xfs_inode.h
--- a/fs/xfs/xfs_inode.h Sun Aug 3 13:14:50 2003
+++ b/fs/xfs/xfs_inode.h Sun Aug 3 13:14:50 2003
@@ -406,14 +406,6 @@
#define XFS_ITRUNC_DEFINITE 0x1
#define XFS_ITRUNC_MAYBE 0x2
-/*
- * max file offset is 2^(31+PAGE_SHIFT) - 1 (due to linux page cache)
- *
- * NOTE: XFS itself can handle 2^63 - 1 (largest positive value of xfs_fsize_t)
- * but this is the Linux limit.
- */
-#define XFS_MAX_FILE_OFFSET MAX_LFS_FILESIZE
-
#if XFS_WANT_FUNCS || (XFS_WANT_SPACE && XFSSO_XFS_ITOV)
struct vnode *xfs_itov(xfs_inode_t *ip);
#define XFS_ITOV(ip) xfs_itov(ip)
diff -Nru a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c
--- a/fs/xfs/xfs_log.c Sun Aug 3 13:14:53 2003
+++ b/fs/xfs/xfs_log.c Sun Aug 3 13:14:53 2003
@@ -777,7 +777,7 @@
s = GRANT_LOCK(log);
- /* Also an illegal lsn. 1 implies that we aren't passing in a legal
+ /* Also an invalid lsn. 1 implies that we aren't passing in a valid
* tail_lsn.
*/
if (tail_lsn != 1)
@@ -1066,7 +1066,7 @@
if (mp->m_logbufs == 0) {
xlog_debug = 0;
xlog_devt = log->l_dev;
- log->l_iclog_bufs = XLOG_NUM_ICLOGS;
+ log->l_iclog_bufs = XLOG_MIN_ICLOGS;
} else
#endif
{
@@ -1074,9 +1074,16 @@
* This is the normal path. If m_logbufs == -1, then the
* admin has chosen to use the system defaults for logbuffers.
*/
- if (mp->m_logbufs == -1)
- log->l_iclog_bufs = XLOG_NUM_ICLOGS;
- else
+ if (mp->m_logbufs == -1) {
+ if (xfs_physmem <= btoc(128*1024*1024)) {
+ log->l_iclog_bufs = XLOG_MIN_ICLOGS;
+ } else if (xfs_physmem <= btoc(400*1024*1024)) {
+ log->l_iclog_bufs = XLOG_MED_ICLOGS;;
+ } else {
+ /* 256K with 32K bufs */
+ log->l_iclog_bufs = XLOG_MAX_ICLOGS;
+ }
+ } else
log->l_iclog_bufs = mp->m_logbufs;
#if defined(DEBUG) || defined(XLOG_NOLOG)
@@ -1153,7 +1160,7 @@
log->l_iclog_bufs = 8;
break;
default:
- xlog_panic("XFS: Illegal blocksize");
+ xlog_panic("XFS: Invalid blocksize");
break;
}
}
@@ -1219,15 +1226,14 @@
xlog_get_iclog_buffer_size(mp, log);
- bp = log->l_xbuf = XFS_getrbuf(0,mp); /* get my locked buffer */ /* mp needed for pagebuf/linux only */
-
- XFS_BUF_SET_TARGET(bp, mp->m_logdev_targp);
- XFS_BUF_SET_SIZE(bp, log->l_iclog_size);
+ bp = xfs_buf_get_empty(log->l_iclog_size, mp->m_logdev_targp);
XFS_BUF_SET_IODONE_FUNC(bp, xlog_iodone);
XFS_BUF_SET_BDSTRAT_FUNC(bp, xlog_bdstrat_cb);
XFS_BUF_SET_FSPRIVATE2(bp, (unsigned long)1);
- ASSERT(XFS_BUF_ISBUSY(log->l_xbuf));
- ASSERT(XFS_BUF_VALUSEMA(log->l_xbuf) <= 0);
+ ASSERT(XFS_BUF_ISBUSY(bp));
+ ASSERT(XFS_BUF_VALUSEMA(bp) <= 0);
+ log->l_xbuf = bp;
+
spinlock_init(&log->l_icloglock, "iclog");
spinlock_init(&log->l_grant_lock, "grhead_iclog");
initnsema(&log->l_flushsema, 0, "ic-flush");
@@ -1267,12 +1273,11 @@
INT_SET(head->h_fmt, ARCH_CONVERT, XLOG_FMT);
memcpy(&head->h_fs_uuid, &mp->m_sb.sb_uuid, sizeof(uuid_t));
- bp = iclog->ic_bp = XFS_getrbuf(0,mp); /* my locked buffer */ /* mp need for pagebuf/linux only */
- XFS_BUF_SET_TARGET(bp, mp->m_logdev_targp);
- XFS_BUF_SET_SIZE(bp, log->l_iclog_size);
+ bp = xfs_buf_get_empty(log->l_iclog_size, mp->m_logdev_targp);
XFS_BUF_SET_IODONE_FUNC(bp, xlog_iodone);
XFS_BUF_SET_BDSTRAT_FUNC(bp, xlog_bdstrat_cb);
XFS_BUF_SET_FSPRIVATE2(bp, (unsigned long)1);
+ iclog->ic_bp = bp;
iclog->ic_size = XFS_BUF_SIZE(bp) - log->l_iclog_hsize;
iclog->ic_state = XLOG_STATE_ACTIVE;
@@ -1572,7 +1577,7 @@
for (i=0; i<log->l_iclog_bufs; i++) {
sv_destroy(&iclog->ic_forcesema);
sv_destroy(&iclog->ic_writesema);
- XFS_freerbuf(iclog->ic_bp);
+ xfs_buf_free(iclog->ic_bp);
#ifdef DEBUG
if (iclog->ic_trace != NULL) {
ktrace_free(iclog->ic_trace);
@@ -1603,7 +1608,7 @@
tic = next_tic;
}
}
- XFS_freerbuf(log->l_xbuf);
+ xfs_buf_free(log->l_xbuf);
#ifdef DEBUG
if (log->l_trace != NULL) {
ktrace_free(log->l_trace);
@@ -3375,6 +3380,7 @@
{
xlog_op_header_t *ophead;
xlog_in_core_t *icptr;
+ xlog_in_core_2_t *xhdr;
xfs_caddr_t ptr;
xfs_caddr_t base_ptr;
__psint_t field_offset;
@@ -3383,17 +3389,12 @@
int idx;
SPLDECL(s);
- union ich {
- xlog_rec_ext_header_t hic_xheader;
- char hic_sector[XLOG_HEADER_SIZE];
- }*xhdr;
-
/* check validity of iclog pointers */
s = LOG_LOCK(log);
icptr = log->l_iclog;
for (i=0; i < log->l_iclog_bufs; i++) {
if (icptr == 0)
- xlog_panic("xlog_verify_iclog: illegal ptr");
+ xlog_panic("xlog_verify_iclog: invalid ptr");
icptr = icptr->ic_next;
}
if (icptr != log->l_iclog)
@@ -3403,7 +3404,7 @@
/* check log magic numbers */
ptr = (xfs_caddr_t) &(iclog->ic_header);
if (INT_GET(*(uint *)ptr, ARCH_CONVERT) != XLOG_HEADER_MAGIC_NUM)
- xlog_panic("xlog_verify_iclog: illegal magic num");
+ xlog_panic("xlog_verify_iclog: invalid magic num");
for (ptr += BBSIZE; ptr < ((xfs_caddr_t)&(iclog->ic_header))+count;
ptr += BBSIZE) {
@@ -3416,7 +3417,7 @@
ptr = iclog->ic_datap;
base_ptr = ptr;
ophead = (xlog_op_header_t *)ptr;
- xhdr = (union ich*)&iclog->ic_header;
+ xhdr = (xlog_in_core_2_t *)&iclog->ic_header;
for (i = 0; i < len; i++) {
ophead = (xlog_op_header_t *)ptr;
@@ -3436,7 +3437,7 @@
}
}
if (clientid != XFS_TRANSACTION && clientid != XFS_LOG)
- cmn_err(CE_WARN, "xlog_verify_iclog: illegal clientid %d op 0x%p offset 0x%x", clientid, ophead, field_offset);
+ cmn_err(CE_WARN, "xlog_verify_iclog: invalid clientid %d op 0x%p offset 0x%x", clientid, ophead, field_offset);
/* check length */
field_offset = (__psint_t)
diff -Nru a/fs/xfs/xfs_log_priv.h b/fs/xfs/xfs_log_priv.h
--- a/fs/xfs/xfs_log_priv.h Sun Aug 3 13:14:45 2003
+++ b/fs/xfs/xfs_log_priv.h Sun Aug 3 13:14:45 2003
@@ -50,10 +50,11 @@
* Macros, structures, prototypes for internal log manager use.
*/
-#define XLOG_NUM_ICLOGS 2
+#define XLOG_MIN_ICLOGS 2
+#define XLOG_MED_ICLOGS 4
#define XLOG_MAX_ICLOGS 8
#define XLOG_CALLBACK_SIZE 10
-#define XLOG_HEADER_MAGIC_NUM 0xFEEDbabe /* Illegal cycle number */
+#define XLOG_HEADER_MAGIC_NUM 0xFEEDbabe /* Invalid cycle number */
#define XLOG_VERSION_1 1
#define XLOG_VERSION_2 2 /* Large IClogs, Log sunit */
#define XLOG_VERSION_OKBITS (XLOG_VERSION_1 | XLOG_VERSION_2)
@@ -484,59 +485,65 @@
* that round off problems won't occur when releasing partial reservations.
*/
typedef struct log {
- /* The following block of fields are changed while holding icloglock */
- sema_t l_flushsema; /* iclog flushing semaphore */
- int l_flushcnt; /* # of procs waiting on this sema */
- int l_ticket_cnt; /* free ticket count */
- int l_ticket_tcnt; /* total ticket count */
- int l_covered_state;/* state of "covering disk log entries" */
- xlog_ticket_t *l_freelist; /* free list of tickets */
- xlog_ticket_t *l_unmount_free;/* kmem_free these addresses */
- xlog_ticket_t *l_tail; /* free list of tickets */
- xlog_in_core_t *l_iclog; /* head log queue */
- lock_t l_icloglock; /* grab to change iclog state */
- xfs_lsn_t l_tail_lsn; /* lsn of 1st LR w/ unflush buffers */
- xfs_lsn_t l_last_sync_lsn;/* lsn of last LR on disk */
- struct xfs_mount *l_mp; /* mount point */
- struct xfs_buf *l_xbuf; /* extra buffer for log wrapping */
- dev_t l_dev; /* dev_t of log */
- xfs_daddr_t l_logBBstart; /* start block of log */
- int l_logsize; /* size of log in bytes */
- int l_logBBsize; /* size of log in 512 byte chunks */
- int l_roundoff; /* round off error of all iclogs */
- int l_curr_cycle; /* Cycle number of log writes */
- int l_prev_cycle; /* Cycle # b4 last block increment */
- int l_curr_block; /* current logical block of log */
- int l_prev_block; /* previous logical block of log */
- int l_iclog_size; /* size of log in bytes */
- int l_iclog_size_log;/* log power size of log */
- int l_iclog_bufs; /* number of iclog buffers */
-
- /* The following field are used for debugging; need to hold icloglock */
- char *l_iclog_bak[XLOG_MAX_ICLOGS];
-
- /* The following block of fields are changed while holding grant_lock */
- lock_t l_grant_lock; /* protects below fields */
- xlog_ticket_t *l_reserve_headq; /* */
- xlog_ticket_t *l_write_headq; /* */
- int l_grant_reserve_cycle; /* */
- int l_grant_reserve_bytes; /* */
- int l_grant_write_cycle; /* */
- int l_grant_write_bytes; /* */
+ /* The following block of fields are changed while holding icloglock */
+ sema_t l_flushsema; /* iclog flushing semaphore */
+ int l_flushcnt; /* # of procs waiting on this
+ * sema */
+ int l_ticket_cnt; /* free ticket count */
+ int l_ticket_tcnt; /* total ticket count */
+ int l_covered_state;/* state of "covering disk
+ * log entries" */
+ xlog_ticket_t *l_freelist; /* free list of tickets */
+ xlog_ticket_t *l_unmount_free;/* kmem_free these addresses */
+ xlog_ticket_t *l_tail; /* free list of tickets */
+ xlog_in_core_t *l_iclog; /* head log queue */
+ lock_t l_icloglock; /* grab to change iclog state */
+ xfs_lsn_t l_tail_lsn; /* lsn of 1st LR with unflushed
+ * buffers */
+ xfs_lsn_t l_last_sync_lsn;/* lsn of last LR on disk */
+ struct xfs_mount *l_mp; /* mount point */
+ struct xfs_buf *l_xbuf; /* extra buffer for log
+ * wrapping */
+ dev_t l_dev; /* dev_t of log */
+ xfs_daddr_t l_logBBstart; /* start block of log */
+ int l_logsize; /* size of log in bytes */
+ int l_logBBsize; /* size of log in BB chunks */
+ int l_roundoff; /* round off error of iclogs */
+ int l_curr_cycle; /* Cycle number of log writes */
+ int l_prev_cycle; /* Cycle number before last
+ * block increment */
+ int l_curr_block; /* current logical log block */
+ int l_prev_block; /* previous logical log block */
+ int l_iclog_size; /* size of log in bytes */
+ int l_iclog_size_log; /* log power size of log */
+ int l_iclog_bufs; /* number of iclog buffers */
+
+ /* The following field are used for debugging; need to hold icloglock */
+ char *l_iclog_bak[XLOG_MAX_ICLOGS];
+
+ /* The following block of fields are changed while holding grant_lock */
+ lock_t l_grant_lock;
+ xlog_ticket_t *l_reserve_headq;
+ xlog_ticket_t *l_write_headq;
+ int l_grant_reserve_cycle;
+ int l_grant_reserve_bytes;
+ int l_grant_write_cycle;
+ int l_grant_write_bytes;
- /* The following fields don't need locking */
+ /* The following fields don't need locking */
#ifdef DEBUG
- struct ktrace *l_trace;
- struct ktrace *l_grant_trace;
+ struct ktrace *l_trace;
+ struct ktrace *l_grant_trace;
#endif
- uint l_flags;
- uint l_quotaoffs_flag;/* XFS_DQ_*, if QUOTAOFFs found */
- struct xfs_buf_cancel **l_buf_cancel_table;
- int l_stripemask; /* log stripe mask */
- int l_iclog_hsize; /* size of iclog header */
- int l_iclog_heads; /* number of iclog header sectors */
- uint l_sectbb_log; /* log2 of sector size in bbs */
- uint l_sectbb_mask; /* sector size in bbs alignment mask */
+ uint l_flags;
+ uint l_quotaoffs_flag; /* XFS_DQ_*, for QUOTAOFFs */
+ struct xfs_buf_cancel **l_buf_cancel_table;
+ int l_stripemask; /* log stripe mask */
+ int l_iclog_hsize; /* size of iclog header */
+ int l_iclog_heads; /* # of iclog header sectors */
+ uint l_sectbb_log; /* log2 of sector size in BBs */
+ uint l_sectbb_mask; /* sector size (in BBs)
+ * alignment mask */
} xlog_t;
diff -Nru a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c
--- a/fs/xfs/xfs_log_recover.c Sun Aug 3 13:14:49 2003
+++ b/fs/xfs/xfs_log_recover.c Sun Aug 3 13:14:49 2003
@@ -99,14 +99,14 @@
num_bblks += XLOG_SECTOR_ROUNDUP_BBCOUNT(log, 1);
num_bblks = XLOG_SECTOR_ROUNDUP_BBCOUNT(log, num_bblks);
}
- return XFS_ngetrbuf(BBTOB(num_bblks), log->l_mp);
+ return xfs_buf_get_noaddr(BBTOB(num_bblks), log->l_mp->m_logdev_targp);
}
void
xlog_put_bp(
xfs_buf_t *bp)
{
- XFS_nfreerbuf(bp);
+ xfs_buf_free(bp);
}
@@ -449,7 +449,7 @@
for (i = (*last_blk) - 1; i >= 0; i--) {
if (i < start_blk) {
- /* legal log record not found */
+ /* valid log record not found */
xlog_warn(
"XFS: Log inconsistent (didn't find previous header)");
ASSERT(0);
@@ -582,7 +582,7 @@
* then the entire log is stamped with the same cycle number. In this
* case, head_blk can't be set to zero (which makes sense). The below
* math doesn't work out properly with head_blk equal to zero. Instead,
- * we set it to log_bbnum which is an illegal block number, but this
+ * we set it to log_bbnum which is an invalid block number, but this
* value makes the math correct. If head_blk doesn't changed through
* all the tests below, *head_blk is set to zero at the very end rather
* than log_bbnum. In a sense, log_bbnum and zero are the same block
@@ -2462,7 +2462,7 @@
break;
default:
- xlog_warn("XFS: xlog_recover_do_inode_trans: Illegal flag");
+ xlog_warn("XFS: xlog_recover_do_inode_trans: Invalid flag");
ASSERT(0);
xfs_buf_relse(bp);
return XFS_ERROR(EIO);
diff -Nru a/fs/xfs/xfs_mount.c b/fs/xfs/xfs_mount.c
--- a/fs/xfs/xfs_mount.c Sun Aug 3 13:14:47 2003
+++ b/fs/xfs/xfs_mount.c Sun Aug 3 13:14:47 2003
@@ -728,6 +728,8 @@
} else
mp->m_maxicount = 0;
+ mp->m_maxioffset = xfs_max_file_offset(sbp->sb_blocklog);
+
/*
* XFS uses the uuid from the superblock as the unique
* identifier for fsid. We can not use the uuid from the volume
@@ -889,7 +891,7 @@
* File systems that don't support user level file handles (i.e.
* all of them except for XFS) will leave vfs_altfsid as NULL.
*/
- vfsp->vfs_altfsid = (fsid_t *)mp->m_fixedfsid;
+ vfsp->vfs_altfsid = (__kernel_fsid_t *)mp->m_fixedfsid;
mp->m_dmevmask = 0; /* not persistent; set after each mount */
/*
diff -Nru a/fs/xfs/xfs_mount.h b/fs/xfs/xfs_mount.h
--- a/fs/xfs/xfs_mount.h Sun Aug 3 13:14:44 2003
+++ b/fs/xfs/xfs_mount.h Sun Aug 3 13:14:44 2003
@@ -80,7 +80,6 @@
struct xfs_bmbt_irec;
struct xfs_bmap_free;
-#define SPLDECL(s) unsigned long s
#define AIL_LOCK_T lock_t
#define AIL_LOCKINIT(x,y) spinlock_init(x,y)
#define AIL_LOCK_DESTROY(x) spinlock_destroy(x)
@@ -352,6 +351,7 @@
uint m_qflags; /* quota status flags */
xfs_trans_reservations_t m_reservations;/* precomputed res values */
__uint64_t m_maxicount; /* maximum inode count */
+ __uint64_t m_maxioffset; /* maximum inode offset */
__uint64_t m_resblks; /* total reserved blocks */
__uint64_t m_resblks_avail;/* available reserved blocks */
#if XFS_BIG_FILESYSTEMS
@@ -418,8 +418,6 @@
* 32 bits in size */
#define XFS_MOUNT_NOLOGFLUSH 0x00010000
-#define XFS_FORCED_SHUTDOWN(mp) ((mp)->m_flags & XFS_MOUNT_FS_SHUTDOWN)
-
/*
* Default minimum read and write sizes.
*/
@@ -444,6 +442,9 @@
#define XFS_WSYNC_READIO_LOG 15 /* 32K */
#define XFS_WSYNC_WRITEIO_LOG 14 /* 16K */
+#define XFS_MAXIOFFSET(mp) ((mp)->m_maxioffset)
+
+#define XFS_FORCED_SHUTDOWN(mp) ((mp)->m_flags & XFS_MOUNT_FS_SHUTDOWN)
#define xfs_force_shutdown(m,f) \
VFS_FORCE_SHUTDOWN((XFS_MTOVFS(m)), f, __FILE__, __LINE__)
diff -Nru a/fs/xfs/xfs_trans.c b/fs/xfs/xfs_trans.c
--- a/fs/xfs/xfs_trans.c Sun Aug 3 13:14:48 2003
+++ b/fs/xfs/xfs_trans.c Sun Aug 3 13:14:48 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -200,6 +200,7 @@
tp->t_blk_res = tp->t_blk_res_used;
ntp->t_rtx_res = tp->t_rtx_res - tp->t_rtx_res_used;
tp->t_rtx_res = tp->t_rtx_res_used;
+ PFLAGS_DUP(&tp->t_pflags, &ntp->t_pflags);
XFS_TRANS_DUP_DQINFO(tp->t_mountp, tp, ntp);
@@ -238,7 +239,7 @@
rsvd = (tp->t_flags & XFS_TRANS_RESERVE) != 0;
/* Mark this thread as being in a transaction */
- current->flags |= PF_FSTRANS;
+ PFLAGS_SET_FSTRANS(&tp->t_pflags);
/*
* Attempt to reserve the needed disk blocks by decrementing
@@ -249,7 +250,7 @@
error = xfs_mod_incore_sb(tp->t_mountp, XFS_SBS_FDBLOCKS,
-blocks, rsvd);
if (error != 0) {
- current->flags &= ~PF_FSTRANS;
+ PFLAGS_RESTORE(&tp->t_pflags);
return (XFS_ERROR(ENOSPC));
}
tp->t_blk_res += blocks;
@@ -322,7 +323,7 @@
tp->t_blk_res = 0;
}
- current->flags &= ~PF_FSTRANS;
+ PFLAGS_RESTORE(&tp->t_pflags);
return (error);
}
@@ -671,7 +672,7 @@
* be inconsistent. In such cases, this returns an error, and the
* caller may assume that all locked objects joined to the transaction
* have already been unlocked as if the commit had succeeded.
- * It's illegal to reference the transaction structure after this call.
+ * Do not reference the transaction structure after this call.
*/
/*ARGSUSED*/
int
@@ -734,13 +735,13 @@
if (commit_lsn == -1 && !shutdown)
shutdown = XFS_ERROR(EIO);
}
+ PFLAGS_RESTORE(&tp->t_pflags);
xfs_trans_free_items(tp, shutdown? XFS_TRANS_ABORT : 0);
xfs_trans_free_busy(tp);
xfs_trans_free(tp);
XFS_STATS_INC(xfsstats.xs_trans_empty);
if (commit_lsn_p)
*commit_lsn_p = commit_lsn;
- current->flags &= ~PF_FSTRANS;
return (shutdown);
}
#if defined(XLOG_NOLOG) || defined(DEBUG)
@@ -823,8 +824,8 @@
* had pinned, clean up, free trans structure, and return error.
*/
if (error || commit_lsn == -1) {
+ PFLAGS_RESTORE(&tp->t_pflags);
xfs_trans_uncommit(tp, flags|XFS_TRANS_ABORT);
- current->flags &= ~PF_FSTRANS;
return XFS_ERROR(EIO);
}
@@ -861,6 +862,9 @@
*/
error = xfs_log_notify(mp, commit_iclog, &(tp->t_logcb));
+ /* mark this thread as no longer being in a transaction */
+ PFLAGS_RESTORE(&tp->t_pflags);
+
/*
* Once all the items of the transaction have been copied
* to the in core log and the callback is attached, the
@@ -896,9 +900,6 @@
XFS_STATS_INC(xfsstats.xs_trans_async);
}
- /* mark this thread as no longer being in a transaction */
- current->flags &= ~PF_FSTRANS;
-
return (error);
}
@@ -1098,12 +1099,13 @@
}
xfs_log_done(tp->t_mountp, tp->t_ticket, NULL, log_flags);
}
+
+ /* mark this thread as no longer being in a transaction */
+ PFLAGS_RESTORE(&tp->t_pflags);
+
xfs_trans_free_items(tp, flags);
xfs_trans_free_busy(tp);
xfs_trans_free(tp);
-
- /* mark this thread as no longer being in a transaction */
- current->flags &= ~PF_FSTRANS;
}
diff -Nru a/fs/xfs/xfs_trans.h b/fs/xfs/xfs_trans.h
--- a/fs/xfs/xfs_trans.h Sun Aug 3 13:14:50 2003
+++ b/fs/xfs/xfs_trans.h Sun Aug 3 13:14:50 2003
@@ -409,6 +409,7 @@
xfs_trans_header_t t_header; /* header for in-log trans */
unsigned int t_busy_free; /* busy descs free */
xfs_log_busy_chunk_t t_busy; /* busy/async free blocks */
+ xfs_pflags_t t_pflags; /* saved pflags state */
} xfs_trans_t;
#endif /* __KERNEL__ */
diff -Nru a/fs/xfs/xfs_vfsops.c b/fs/xfs/xfs_vfsops.c
--- a/fs/xfs/xfs_vfsops.c Sun Aug 3 13:14:46 2003
+++ b/fs/xfs/xfs_vfsops.c Sun Aug 3 13:14:46 2003
@@ -235,11 +235,11 @@
}
if (ap->logbufs != 0 && ap->logbufs != -1 &&
- (ap->logbufs < XLOG_NUM_ICLOGS ||
+ (ap->logbufs < XLOG_MIN_ICLOGS ||
ap->logbufs > XLOG_MAX_ICLOGS)) {
cmn_err(CE_WARN,
"XFS: invalid logbufs value: %d [not %d-%d]",
- ap->logbufs, XLOG_NUM_ICLOGS, XLOG_MAX_ICLOGS);
+ ap->logbufs, XLOG_MIN_ICLOGS, XLOG_MAX_ICLOGS);
return XFS_ERROR(EINVAL);
}
mp->m_logbufs = ap->logbufs;
diff -Nru a/fs/xfs/xfs_vnodeops.c b/fs/xfs/xfs_vnodeops.c
--- a/fs/xfs/xfs_vnodeops.c Sun Aug 3 13:14:53 2003
+++ b/fs/xfs/xfs_vnodeops.c Sun Aug 3 13:14:53 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -318,6 +318,9 @@
vp = BHV_TO_VNODE(bdp);
vn_trace_entry(vp, __FUNCTION__, (inst_t *)__return_address);
+ if (vp->v_vfsp->vfs_flag & VFS_RDONLY)
+ return XFS_ERROR(EROFS);
+
/*
* Cannot set certain attributes.
*/
@@ -1287,7 +1290,7 @@
* of the file. If not, then there is nothing to do.
*/
end_fsb = XFS_B_TO_FSB(mp, ((xfs_ufsize_t)ip->i_d.di_size));
- last_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)XFS_MAX_FILE_OFFSET);
+ last_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)XFS_MAXIOFFSET(mp));
map_len = last_fsb - end_fsb;
if (map_len <= 0)
return (0);
@@ -4282,24 +4285,18 @@
xfs_off_t startoff,
xfs_off_t endoff)
{
- xfs_buf_t *bp;
- int error=0;
xfs_bmbt_irec_t imap;
+ xfs_fileoff_t offset_fsb;
xfs_off_t lastoffset;
- xfs_mount_t *mp;
- int nimap;
xfs_off_t offset;
- xfs_fileoff_t offset_fsb;
-
- mp = ip->i_mount;
- bp = XFS_ngetrbuf(mp->m_sb.sb_blocksize,mp);
- ASSERT(!XFS_BUF_GETERROR(bp));
+ xfs_buf_t *bp;
+ xfs_mount_t *mp = ip->i_mount;
+ int nimap;
+ int error = 0;
- if (ip->i_d.di_flags & XFS_DIFLAG_REALTIME) {
- XFS_BUF_SET_TARGET(bp, mp->m_rtdev_targp);
- } else {
- XFS_BUF_SET_TARGET(bp, mp->m_ddev_targp);
- }
+ bp = xfs_buf_get_noaddr(mp->m_sb.sb_blocksize,
+ ip->i_d.di_flags & XFS_DIFLAG_REALTIME ?
+ mp->m_rtdev_targp : mp->m_ddev_targp);
for (offset = startoff; offset <= endoff; offset = lastoffset + 1) {
offset_fsb = XFS_B_TO_FSBT(mp, offset);
@@ -4341,7 +4338,7 @@
break;
}
}
- XFS_nfreerbuf(bp);
+ xfs_buf_free(bp);
return error;
}
@@ -4612,9 +4609,9 @@
llen = bf->l_len > 0 ? bf->l_len - 1 : bf->l_len;
if ( (bf->l_start < 0)
- || (bf->l_start > XFS_MAX_FILE_OFFSET)
+ || (bf->l_start > XFS_MAXIOFFSET(mp))
|| (bf->l_start + llen < 0)
- || (bf->l_start + llen > XFS_MAX_FILE_OFFSET))
+ || (bf->l_start + llen > XFS_MAXIOFFSET(mp)))
return XFS_ERROR(EINVAL);
bf->l_whence = 0;
diff -Nru a/fs/xfs/xfsidbg.c b/fs/xfs/xfsidbg.c
--- a/fs/xfs/xfsidbg.c Sun Aug 3 13:14:51 2003
+++ b/fs/xfs/xfsidbg.c Sun Aug 3 13:14:51 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -4091,7 +4091,7 @@
if (iclog->ic_state & XLOG_STATE_ALL)
printflags(iclog->ic_state, ic_flags, "state:");
else
- kdb_printf("state: ILLEGAL 0x%x", iclog->ic_state);
+ kdb_printf("state: INVALID 0x%x", iclog->ic_state);
kdb_printf("\n");
} /* xfsidbg_xiclog */
diff -Nru a/include/asm-h8300/aki3068net/ne.h b/include/asm-h8300/aki3068net/ne.h
--- a/include/asm-h8300/aki3068net/ne.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-h8300/aki3068net/ne.h Sun Aug 3 13:14:52 2003
@@ -1,6 +1,9 @@
/* AE-3068 (aka. aki3068net) RTL8019AS Config */
-#define NE2000_ADDR CONFIG_NE_BASE
+#ifndef __H8300_AKI3068NET_NE__
+#define __H8300_AKI3068NET_NE__
+
+#define NE2000_ADDR 0x200000
#define NE2000_IRQ 5
#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ)
#define NE2000_BYTE volatile unsigned short
@@ -21,3 +24,5 @@
wordlength = 1; \
outb_p(0x48, ioaddr + EN0_DCFG); \
} while(0)
+
+#endif
diff -Nru a/include/asm-h8300/aki3068net/timer_rate.h b/include/asm-h8300/aki3068net/timer_rate.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-h8300/aki3068net/timer_rate.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,9 @@
+#ifndef __H8300_AKI3068NET_TIMER_RATE__
+#define __H8300_AKI3068NET_TIMER_RATE__
+
+#include <linux/config.h>
+
+#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
+#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
+
+#endif
diff -Nru a/include/asm-h8300/atomic.h b/include/asm-h8300/atomic.h
--- a/include/asm-h8300/atomic.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/atomic.h Sun Aug 3 13:14:47 2003
@@ -71,6 +71,7 @@
return ret == 0;
}
+#if defined(__H8300H__)
static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("stc ccr,r2l\n\t"
@@ -94,14 +95,37 @@
"ldc r2l,ccr"
: "=m" (*v) : "ir" (mask) :"er0","er1","er2");
}
+#endif
+#if defined(__H8300S__)
+static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
+{
+ __asm__ __volatile__("stc exr,r2l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l %0,er0\n\t"
+ "mov.l %1,er1\n\t"
+ "and.l er1,er0\n\t"
+ "mov.l er0,%0\n\t"
+ "ldc r2l,exr"
+ : "=m" (*v) : "ir" (~(mask)) :"er0","er1","er2");
+}
+
+static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
+{
+ __asm__ __volatile__("stc exr,r2l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l %0,er0\n\t"
+ "mov.l %1,er1\n\t"
+ "or.l er1,er0\n\t"
+ "mov.l er0,%0\n\t"
+ "ldc r2l,exr"
+ : "=m" (*v) : "ir" (mask) :"er0","er1","er2");
+}
+#endif
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
-
-#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
-#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
#endif /* __ARCH_H8300_ATOMIC __ */
diff -Nru a/include/asm-h8300/bitops.h b/include/asm-h8300/bitops.h
--- a/include/asm-h8300/bitops.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/bitops.h Sun Aug 3 13:14:47 2003
@@ -10,6 +10,7 @@
#include <linux/config.h>
#include <linux/compiler.h>
#include <asm/byteorder.h> /* swab32 */
+#include <asm/system.h>
#ifdef __KERNEL__
/*
@@ -17,48 +18,33 @@
*/
/*
- * The __ functions are not atomic
- */
-
-extern void set_bit(int nr, volatile unsigned long* addr);
-extern void clear_bit(int nr, volatile unsigned long* addr);
-extern void change_bit(int nr, volatile unsigned long* addr);
-extern int test_and_set_bit(int nr, volatile unsigned long* addr);
-extern int __test_and_set_bit(int nr, volatile unsigned long* addr);
-extern int test_and_clear_bit(int nr, volatile unsigned long* addr);
-extern int __test_and_clear_bit(int nr, volatile unsigned long* addr);
-extern int test_and_change_bit(int nr, volatile unsigned long* addr);
-extern int __test_and_change_bit(int nr, volatile unsigned long* addr);
-extern int __constant_test_bit(int nr, const volatile unsigned long* addr);
-extern int __test_bit(int nr, volatile unsigned long* addr);
-extern int find_first_zero_bit(void * addr, unsigned size);
-extern int find_next_zero_bit (void * addr, int size, int offset);
-
-/*
* ffz = Find First Zero in word. Undefined if no zero exists,
* so code should check against ~0UL first..
*/
-extern __inline__ unsigned long ffz(unsigned long word)
+static __inline__ unsigned long ffz(unsigned long word)
{
- unsigned long result;
+ register unsigned long result asm("er0");
+ register unsigned long _word asm("er1");
+ _word = word;
__asm__("sub.l %0,%0\n\t"
"dec.l #1,%0\n"
"1:\n\t"
"shlr.l %1\n\t"
"adds #1,%0\n\t"
"bcs 1b"
- : "=r" (result) : "r" (word));
+ : "=r" (result) : "r" (_word));
return result;
}
-extern __inline__ void set_bit(int nr, volatile unsigned long* addr)
+static __inline__ void set_bit(int nr, volatile unsigned long* addr)
{
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %0,er0\n\t"
- "bset r0l,@%1"
- ::"r"(nr & 7),"r"(a):"er0","er1");
+ __asm__("mov.l %1,er0\n\t"
+ "mov.l %0,er1\n\t"
+ "bset r0l,@er1"
+ :"=m"(a):"g"(nr & 7):"er0","er1","memory");
}
/* Bigendian is complexed... */
@@ -70,175 +56,239 @@
#define smp_mb__before_clear_bit() barrier()
#define smp_mb__after_clear_bit() barrier()
-extern __inline__ void clear_bit(int nr, volatile unsigned long* addr)
+static __inline__ void clear_bit(int nr, volatile unsigned long* addr)
{
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %0,er0\n\t"
- "bclr r0l,@%1"
- ::"r"(nr & 7),"r"(a):"er0");
+ __asm__("mov.l %1,er0\n\t"
+ "mov.l %0,er1\n\t"
+ "bclr r0l,@er1"
+ :"=m"(a):"g"(nr & 7):"er0","er1","memory");
}
#define __clear_bit(nr, addr) clear_bit(nr, addr)
-extern __inline__ void change_bit(int nr, volatile unsigned long* addr)
+static __inline__ void change_bit(int nr, volatile unsigned long* addr)
{
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %0,er0\n\t"
- "bnot r0l,@%1"
- ::"r"(nr & 7),"r"(a):"er0");
+ __asm__("mov.l %1,er0\n\t"
+ "mov.l %0,er1\n\t"
+ "bnot r0l,@er1"
+ :"=m"(a):"g"(nr & 7):"er0","er1","memory");
}
#define __change_bit(nr, addr) change_bit(nr, addr)
-extern __inline__ int test_and_set_bit(int nr, volatile unsigned long* addr)
+#if defined(__H8300H__)
+static __inline__ int test_and_set_bit(int nr, volatile unsigned long* addr)
{
int retval;
unsigned char *a;
a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %1,er0\n\t"
+ __asm__("mov.l %2,er0\n\t"
"stc ccr,r0h\n\t"
"orc #0x80,ccr\n\t"
- "btst r0l,@%2\n\t"
- "bset r0l,@%2\n\t"
+ "mov.b %1,r1l\n\t"
+ "btst r0l,r1l\n\t"
+ "bset r0l,r1l\n\t"
"stc ccr,r0l\n\t"
+ "mov.b r1l,%1\n\t"
"ldc r0h,ccr\n\t"
- "btst #2,r0l\n\t"
- "bne 1f\n\t"
"sub.l %0,%0\n\t"
- "inc.l #1,%0\n"
- "bra 2f\n"
- "1:\n\t"
- "sub.l %0,%0\n"
- "2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","er1","memory");
return retval;
}
+#endif
+#if defined(__H8300S__)
+static __inline__ int test_and_set_bit(int nr, volatile unsigned long* addr)
+{
+ int retval;
+ unsigned char *a;
+ a = (unsigned char *) addr;
-extern __inline__ int __test_and_set_bit(int nr, volatile unsigned long* addr)
+ a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
+ __asm__("mov.l %2,er0\n\t"
+ "stc exr,r0h\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.b %1,r1l\n\t"
+ "btst r0l,r1l\n\t"
+ "bset r0l,r1l\n\t"
+ "stc ccr,r0l\n\t"
+ "mov.b r1l,%1\n\t"
+ "ldc r0h,exr\n\t"
+ "sub.l %0,%0\n\t"
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","er1","memory");
+ return retval;
+}
+#endif
+
+static __inline__ int __test_and_set_bit(int nr, volatile unsigned long* addr)
{
int retval;
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %1,er0\n\t"
- "btst r0l,@%2\n\t"
- "bset r0l,@%2\n\t"
- "beq 1f\n\t"
+ __asm__("mov.l %2,er0\n\t"
+ "mov.b %1,r0h\n\t"
+ "btst r0l,r0h\n\t"
+ "bset r0l,r0h\n\t"
+ "stc ccr,r0l\n\t"
+ "mov.b r0h,%1\n\t"
"sub.l %0,%0\n\t"
- "inc.l #1,%0\n"
- "bra 2f\n"
- "1:\n\t"
- "sub.l %0,%0\n"
- "2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","memory");
return retval;
}
-extern __inline__ int test_and_clear_bit(int nr, volatile unsigned long* addr)
+#if defined(__H8300H__)
+static __inline__ int test_and_clear_bit(int nr, volatile unsigned long* addr)
{
int retval;
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %1,er0\n\t"
+ __asm__("mov.l %2,er0\n\t"
"stc ccr,r0h\n\t"
"orc #0x80,ccr\n\t"
- "btst r0l,@%2\n\t"
- "bclr r0l,@%2\n\t"
+ "mov.b %1,r1l\n\t"
+ "btst r0l,r1l\n\t"
+ "bclr r0l,r1l\n\t"
"stc ccr,r0l\n\t"
+ "mov.b r1l,%1\n\t"
"ldc r0h,ccr\n\t"
- "btst #2,r0l\n\t"
- "bne 1f\n\t"
"sub.l %0,%0\n\t"
- "inc.l #1,%0\n"
- "bra 2f\n"
- "1:\n\t"
- "sub.l %0,%0\n"
- "2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","er1","memory");
return retval;
}
+#endif
+#if defined(__H8300S__)
+static __inline__ int test_and_clear_bit(int nr, volatile unsigned long* addr)
+{
+ int retval;
+ unsigned char *a = (unsigned char *) addr;
-extern __inline__ int __test_and_clear_bit(int nr, volatile unsigned long* addr)
+ a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
+ __asm__("mov.l %2,er0\n\t"
+ "stc exr,r0h\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.b %1,r1l\n\t"
+ "btst r0l,r1l\n\t"
+ "bclr r0l,r1l\n\t"
+ "stc ccr,r0l\n\t"
+ "mov.b r1l,%1\n\t"
+ "ldc r0h,exr\n\t"
+ "sub.l %0,%0\n\t"
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","er1","memory");
+ return retval;
+}
+#endif
+
+static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long* addr)
{
int retval;
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %1,er0\n\t"
- "btst r0l,@%2\n\t"
- "bclr r0l,@%2\n\t"
- "beq 1f\n\t"
+ __asm__("mov.l %2,er0\n\t"
+ "mov.b %1,r0h\n\t"
+ "btst r0l,r0h\n\t"
+ "bclr r0l,r0h\n\t"
+ "stc ccr,r0l\n\t"
+ "mov.b r0h,%1\n\t"
"sub.l %0,%0\n\t"
- "inc.l #1,%0\n"
- "bra 2f\n"
- "1:\n\t"
- "sub.l %0,%0\n"
- "2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","memory");
return retval;
}
-extern __inline__ int test_and_change_bit(int nr, volatile unsigned long* addr)
+#if defined(__H8300H__)
+static __inline__ int test_and_change_bit(int nr, volatile unsigned long* addr)
{
int retval;
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %1,er0\n\t"
+ __asm__("mov.l %2,er0\n\t"
"stc ccr,r0h\n\t"
"orc #0x80,ccr\n\t"
- "btst r0l,@%2\n\t"
- "bnot r0l,@%2\n\t"
+ "mov.b %1,r1l\n\t"
+ "btst r0l,r1l\n\t"
+ "bnot r0l,r1l\n\t"
"stc ccr,r0l\n\t"
+ "mov.b r1l,%1\n\t"
"ldc r0h,ccr\n\t"
- "btst #2,r0l\n\t"
- "bne 1f\n\t"
"sub.l %0,%0\n\t"
- "inc.l #1,%0\n"
- "bra 2f\n"
- "1:\n\t"
- "sub.l %0,%0\n"
- "2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","er1","memory");
return retval;
}
+#endif
+#if defined(__H8300S__)
+static __inline__ int test_and_change_bit(int nr, volatile unsigned long* addr)
+{
+ int retval;
+ unsigned char *a = (unsigned char *) addr;
+
+ a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
+ __asm__("mov.l %2,er0\n\t"
+ "stc exr,r0h\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.b %1,r1l\n\t"
+ "btst r0l,r1l\n\t"
+ "bnot r0l,r1l\n\t"
+ "stc ccr,r0l\n\t"
+ "mov.b r1l,%1\n\t"
+ "ldc r0h,exr\n\t"
+ "sub.l %0,%0\n\t"
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","er1","memory");
+ return retval;
+}
+#endif
-extern __inline__ int __test_and_change_bit(int nr, volatile unsigned long* addr)
+static __inline__ int __test_and_change_bit(int nr, volatile unsigned long* addr)
{
int retval;
unsigned char *a = (unsigned char *) addr;
a += ((nr >> 3) & ~3) + (3 - ((nr >> 3) & 3));
- __asm__("mov.l %1,er0\n\t"
- "btst r0l,@%2\n\t"
- "bnot r0l,@%2\n\t"
- "beq 1f\n\t"
+ __asm__("mov.l %2,er0\n\t"
+ "mov.b %1,r0h\n\t"
+ "btst r0l,r0h\n\t"
+ "bnot r0l,r0h\n\t"
+ "stc ccr,r0l\n\t"
+ "mov.b r0h,%1\n\t"
"sub.l %0,%0\n\t"
- "inc.l #1,%0\n"
- "bra 2f\n"
- "1:\n\t"
- "sub.l %0,%0\n"
- "2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ "bild #2,r0l\n\t"
+ "rotxl.l %0"
+ : "=r"(retval),"=m"(*a) :"g"(nr & 7):"er0","memory");
return retval;
}
/*
* This routine doesn't need to be atomic.
*/
-extern __inline__ int __constant_test_bit(int nr, const volatile unsigned long* addr)
+static __inline__ int __constant_test_bit(int nr, const volatile unsigned long* addr)
{
- return ((1UL << (nr & 7)) &
- (((const volatile unsigned char *) addr)
- [((nr >> 3) & ~3) + 3 - ((nr >> 3) & 3)])) != 0;
+ return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
}
-extern __inline__ int __test_bit(int nr, volatile unsigned long* addr)
+static __inline__ int __test_bit(int nr, const unsigned long* addr)
{
int retval;
unsigned char *a = (unsigned char *) addr;
@@ -253,7 +303,7 @@
"1:\n\t"
"sub.l %0,%0\n"
"2:"
- : "=r"(retval) :"r"(nr & 7),"r"(a):"er0");
+ : "=r"(retval) :"g"(nr & 7),"r"(a):"er0");
return retval;
}
@@ -266,7 +316,7 @@
#define find_first_zero_bit(addr, size) \
find_next_zero_bit((addr), (size), 0)
-extern __inline__ int find_next_zero_bit (void * addr, int size, int offset)
+static __inline__ int find_next_zero_bit (void * addr, int size, int offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
@@ -302,18 +352,19 @@
return result + ffz(tmp);
}
-extern __inline__ unsigned long ffs(unsigned long word)
+static __inline__ unsigned long ffs(unsigned long word)
{
- unsigned long result;
+ register unsigned long result asm("er0");
+ register unsigned long _word asm("er1");
- __asm__("sub.l er0,er0\n\t"
- "dec.l #1,er0\n"
+ _word = word;
+ __asm__("sub.l %0,%0\n\t"
+ "dec.l #1,%0\n"
"1:\n\t"
"shlr.l %1\n\t"
- "adds #1,er0\n\t"
- "bcc 1b\n\t"
- "mov.l er0,%0"
- : "=r" (result) : "r"(word) : "er0");
+ "adds #1,%0\n\t"
+ "bcc 1b"
+ : "=r" (result) : "r"(_word));
return result;
}
@@ -352,62 +403,50 @@
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
-extern __inline__ int ext2_set_bit(int nr, volatile void *addr)
+static __inline__ int ext2_set_bit(int nr, volatile void * addr)
{
- unsigned char *a = (unsigned char *) addr;
- register unsigned short r __asm__("er0");
- a += nr >> 3;
- __asm__("mov.l %1,er0\n\t"
- "sub.w e0,e0\n\t"
- "btst r0l,@%2\n\t"
- "bset r0l,@%2\n\t"
- "beq 1f\n\t"
- "inc.w #1,e0\n"
- "1:\n\t"
- "mov.w e0,r0\n\t"
- "sub.w e0,e0"
- :"=r"(r):"r"(nr & 7),"r"(a));
- return r;
+ int mask, retval;
+ unsigned long flags;
+ volatile unsigned char *ADDR = (unsigned char *) addr;
+
+ ADDR += nr >> 3;
+ mask = 1 << (nr & 0x07);
+ local_irq_save(flags);
+ retval = (mask & *ADDR) != 0;
+ *ADDR |= mask;
+ local_irq_restore(flags);
+ return retval;
}
-extern __inline__ int ext2_clear_bit(int nr, volatile void *addr)
+static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
{
- unsigned char *a = (unsigned char *) addr;
- register unsigned short r __asm__("er0");
- a += nr >> 3;
- __asm__("mov.l %1,er0\n\t"
- "sub.w e0,e0\n\t"
- "btst r0l,@%2\n\t"
- "bclr r0l,@%2\n\t"
- "beq 1f\n\t"
- "inc.w #1,e0\n"
- "1:\n\t"
- "mov.w e0,r0\n\t"
- "sub.w e0,e0"
- :"=r"(r):"r"(nr & 7),"r"(a));
- return r;
+ int mask, retval;
+ unsigned long flags;
+ volatile unsigned char *ADDR = (unsigned char *) addr;
+
+ ADDR += nr >> 3;
+ mask = 1 << (nr & 0x07);
+ local_irq_save(flags);
+ retval = (mask & *ADDR) != 0;
+ *ADDR &= ~mask;
+ local_irq_restore(flags);
+ return retval;
}
-extern __inline__ int ext2_test_bit(int nr, volatile void *addr)
+static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
{
- unsigned char *a = (unsigned char *) addr;
- int ret;
- a += nr >> 3;
- __asm__("mov.l %1,er0\n\t"
- "sub.l %0,%0\n\t"
- "btst r0l,@%2\n\t"
- "beq 1f\n\t"
- "inc.l #1,%0\n"
- "1:"
- : "=r"(ret) :"r"(nr & 7),"r"(a):"er0","er1");
- return ret;
-}
+ int mask;
+ const volatile unsigned char *ADDR = (const unsigned char *) addr;
+ ADDR += nr >> 3;
+ mask = 1 << (nr & 0x07);
+ return ((mask & *ADDR) != 0);
+}
#define ext2_find_first_zero_bit(addr, size) \
ext2_find_next_zero_bit((addr), (size), 0)
-extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
+static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
diff -Nru a/include/asm-h8300/checksum.h b/include/asm-h8300/checksum.h
--- a/include/asm-h8300/checksum.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-h8300/checksum.h Sun Aug 3 13:14:50 2003
@@ -49,15 +49,15 @@
static inline unsigned int csum_fold(unsigned int sum)
{
__asm__("mov.l %0,er0\n\t"
- "sub.w r1,r1\n\t"
"add.w e0,r0\n\t"
- "addx #0,r1l\n\t"
- "add.w r1,r0\n\t"
+ "xor.w e0,e0\n\t"
+ "rotxl.w e0\n\t"
+ "add.w e0,r0\n\t"
"sub.w e0,e0\n\t"
"mov.l er0,%0"
: "=r"(sum)
: "0"(sum)
- : "er0","er1");
+ : "er0");
return ~sum;
}
diff -Nru a/include/asm-h8300/edosk2674/timer_rate.h b/include/asm-h8300/edosk2674/timer_rate.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-h8300/edosk2674/timer_rate.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,4 @@
+#include <linux/config.h>
+
+#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
+#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
diff -Nru a/include/asm-h8300/errno.h b/include/asm-h8300/errno.h
--- a/include/asm-h8300/errno.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-h8300/errno.h Sun Aug 3 13:14:50 2003
@@ -1,132 +1,6 @@
#ifndef _H8300_ERRNO_H
#define _H8300_ERRNO_H
-#define EPERM 1 /* Operation not permitted */
-#define ENOENT 2 /* No such file or directory */
-#define ESRCH 3 /* No such process */
-#define EINTR 4 /* Interrupted system call */
-#define EIO 5 /* I/O error */
-#define ENXIO 6 /* No such device or address */
-#define E2BIG 7 /* Arg list too long */
-#define ENOEXEC 8 /* Exec format error */
-#define EBADF 9 /* Bad file number */
-#define ECHILD 10 /* No child processes */
-#define EAGAIN 11 /* Try again */
-#define ENOMEM 12 /* Out of memory */
-#define EACCES 13 /* Permission denied */
-#define EFAULT 14 /* Bad address */
-#define ENOTBLK 15 /* Block device required */
-#define EBUSY 16 /* Device or resource busy */
-#define EEXIST 17 /* File exists */
-#define EXDEV 18 /* Cross-device link */
-#define ENODEV 19 /* No such device */
-#define ENOTDIR 20 /* Not a directory */
-#define EISDIR 21 /* Is a directory */
-#define EINVAL 22 /* Invalid argument */
-#define ENFILE 23 /* File table overflow */
-#define EMFILE 24 /* Too many open files */
-#define ENOTTY 25 /* Not a typewriter */
-#define ETXTBSY 26 /* Text file busy */
-#define EFBIG 27 /* File too large */
-#define ENOSPC 28 /* No space left on device */
-#define ESPIPE 29 /* Illegal seek */
-#define EROFS 30 /* Read-only file system */
-#define EMLINK 31 /* Too many links */
-#define EPIPE 32 /* Broken pipe */
-#define EDOM 33 /* Math argument out of domain of func */
-#define ERANGE 34 /* Math result not representable */
-#define EDEADLK 35 /* Resource deadlock would occur */
-#define ENAMETOOLONG 36 /* File name too long */
-#define ENOLCK 37 /* No record locks available */
-#define ENOSYS 38 /* Function not implemented */
-#define ENOTEMPTY 39 /* Directory not empty */
-#define ELOOP 40 /* Too many symbolic links encountered */
-#define EWOULDBLOCK EAGAIN /* Operation would block */
-#define ENOMSG 42 /* No message of desired type */
-#define EIDRM 43 /* Identifier removed */
-#define ECHRNG 44 /* Channel number out of range */
-#define EL2NSYNC 45 /* Level 2 not synchronized */
-#define EL3HLT 46 /* Level 3 halted */
-#define EL3RST 47 /* Level 3 reset */
-#define ELNRNG 48 /* Link number out of range */
-#define EUNATCH 49 /* Protocol driver not attached */
-#define ENOCSI 50 /* No CSI structure available */
-#define EL2HLT 51 /* Level 2 halted */
-#define EBADE 52 /* Invalid exchange */
-#define EBADR 53 /* Invalid request descriptor */
-#define EXFULL 54 /* Exchange full */
-#define ENOANO 55 /* No anode */
-#define EBADRQC 56 /* Invalid request code */
-#define EBADSLT 57 /* Invalid slot */
-
-#define EDEADLOCK EDEADLK
-
-#define EBFONT 59 /* Bad font file format */
-#define ENOSTR 60 /* Device not a stream */
-#define ENODATA 61 /* No data available */
-#define ETIME 62 /* Timer expired */
-#define ENOSR 63 /* Out of streams resources */
-#define ENONET 64 /* Machine is not on the network */
-#define ENOPKG 65 /* Package not installed */
-#define EREMOTE 66 /* Object is remote */
-#define ENOLINK 67 /* Link has been severed */
-#define EADV 68 /* Advertise error */
-#define ESRMNT 69 /* Srmount error */
-#define ECOMM 70 /* Communication error on send */
-#define EPROTO 71 /* Protocol error */
-#define EMULTIHOP 72 /* Multihop attempted */
-#define EDOTDOT 73 /* RFS specific error */
-#define EBADMSG 74 /* Not a data message */
-#define EOVERFLOW 75 /* Value too large for defined data type */
-#define ENOTUNIQ 76 /* Name not unique on network */
-#define EBADFD 77 /* File descriptor in bad state */
-#define EREMCHG 78 /* Remote address changed */
-#define ELIBACC 79 /* Can not access a needed shared library */
-#define ELIBBAD 80 /* Accessing a corrupted shared library */
-#define ELIBSCN 81 /* .lib section in a.out corrupted */
-#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
-#define ELIBEXEC 83 /* Cannot exec a shared library directly */
-#define EILSEQ 84 /* Illegal byte sequence */
-#define ERESTART 85 /* Interrupted system call should be restarted */
-#define ESTRPIPE 86 /* Streams pipe error */
-#define EUSERS 87 /* Too many users */
-#define ENOTSOCK 88 /* Socket operation on non-socket */
-#define EDESTADDRREQ 89 /* Destination address required */
-#define EMSGSIZE 90 /* Message too long */
-#define EPROTOTYPE 91 /* Protocol wrong type for socket */
-#define ENOPROTOOPT 92 /* Protocol not available */
-#define EPROTONOSUPPORT 93 /* Protocol not supported */
-#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
-#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
-#define EPFNOSUPPORT 96 /* Protocol family not supported */
-#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
-#define EADDRINUSE 98 /* Address already in use */
-#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
-#define ENETDOWN 100 /* Network is down */
-#define ENETUNREACH 101 /* Network is unreachable */
-#define ENETRESET 102 /* Network dropped connection because of reset */
-#define ECONNABORTED 103 /* Software caused connection abort */
-#define ECONNRESET 104 /* Connection reset by peer */
-#define ENOBUFS 105 /* No buffer space available */
-#define EISCONN 106 /* Transport endpoint is already connected */
-#define ENOTCONN 107 /* Transport endpoint is not connected */
-#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
-#define ETOOMANYREFS 109 /* Too many references: cannot splice */
-#define ETIMEDOUT 110 /* Connection timed out */
-#define ECONNREFUSED 111 /* Connection refused */
-#define EHOSTDOWN 112 /* Host is down */
-#define EHOSTUNREACH 113 /* No route to host */
-#define EALREADY 114 /* Operation already in progress */
-#define EINPROGRESS 115 /* Operation now in progress */
-#define ESTALE 116 /* Stale NFS file handle */
-#define EUCLEAN 117 /* Structure needs cleaning */
-#define ENOTNAM 118 /* Not a XENIX named type file */
-#define ENAVAIL 119 /* No XENIX semaphores available */
-#define EISNAM 120 /* Is a named type file */
-#define EREMOTEIO 121 /* Remote I/O error */
-#define EDQUOT 122 /* Quota exceeded */
-
-#define ENOMEDIUM 123 /* No medium found */
-#define EMEDIUMTYPE 124 /* Wrong medium type */
+#include <asm-generic/errno.h>
#endif /* _H8300_ERRNO_H */
diff -Nru a/include/asm-h8300/generic/timer_rate.h b/include/asm-h8300/generic/timer_rate.h
--- a/include/asm-h8300/generic/timer_rate.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-h8300/generic/timer_rate.h Sun Aug 3 13:14:52 2003
@@ -1,6 +1,6 @@
#include <linux/config.h>
-#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
+#if defined(CONFIG_H83007) || defined(CONFIG_H83068) || defined(CONFIG_H8S2678)
#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
#endif
@@ -8,4 +8,8 @@
#if defined(H8_3002) || defined(CONFIG_H83048)
#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8
+#endif
+
+#if !defined(H8300_TIMER_COUNT_DATA)
+#error illigal configuration
#endif
diff -Nru a/include/asm-h8300/gpio.h b/include/asm-h8300/gpio.h
--- a/include/asm-h8300/gpio.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/gpio.h Sun Aug 3 13:14:47 2003
@@ -7,11 +7,17 @@
#define H8300_GPIO_P4 3
#define H8300_GPIO_P5 4
#define H8300_GPIO_P6 5
-/*#define H8300_GPIO_P7 6*/
+#define H8300_GPIO_P7 6
#define H8300_GPIO_P8 7
#define H8300_GPIO_P9 8
#define H8300_GPIO_PA 9
#define H8300_GPIO_PB 10
+#define H8300_GPIO_PC 11
+#define H8300_GPIO_PD 12
+#define H8300_GPIO_PE 13
+#define H8300_GPIO_PF 14
+#define H8300_GPIO_PG 15
+#define H8300_GPIO_PH 16
#define H8300_GPIO_B7 0x80
#define H8300_GPIO_B6 0x40
@@ -32,10 +38,10 @@
h8300_free_gpio(port, bits)
#define H8300_GPIO_DDR(port, bit, dir) \
- h8300_set_gpio_dir(((port) << 8) | bit, dir)
+ h8300_set_gpio_dir(((port) << 8) | (bit), dir)
#define H8300_GPIO_GETDIR(port, bit) \
- h8300_get_gpio_dir(((port) << 8) | bit)
+ h8300_get_gpio_dir(((port) << 8) | (bit))
extern int h8300_reserved_gpio(int port, int bits);
extern int h8300_free_gpio(int port, int bits);
diff -Nru a/include/asm-h8300/h8max/ne.h b/include/asm-h8300/h8max/ne.h
--- a/include/asm-h8300/h8max/ne.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-h8300/h8max/ne.h Sun Aug 3 13:14:44 2003
@@ -1,5 +1,8 @@
/* H8MAX RTL8019AS Config */
+#ifndef __H8300_H8MAX_NE__
+#define __H8300_H8MAX_NE__
+
#define NE2000_ADDR 0x800600
#define NE2000_IRQ 4
#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ)
@@ -33,6 +36,14 @@
# undef insw
#endif
#define insw(a,p,l) h8max_insw((a) - NE2000_ADDR,(unsigned short *)p,l)
+#if defined(outsb)
+# undef outsb
+#endif
+#define outsb(a,p,l) h8max_outsb((a) - NE2000_ADDR,(unsigned char *)p,l)
+#if defined(insb)
+# undef insb
+#endif
+#define insb(a,p,l) h8max_insb((a) - NE2000_ADDR,(unsigned char *)p,l)
#define H8300_INIT_NE() \
do { \
@@ -69,3 +80,18 @@
}
}
+static inline void h8max_outsb(unsigned char a,unsigned char *p,unsigned long l)
+{
+ for (; l != 0; --l, p++) {
+ *(unsigned short *)(NE2000_ADDR + (a << 1)) = *p;
+ }
+}
+
+static inline void h8max_insb(unsigned char a,unsigned char *p,unsigned long l)
+{
+ for (; l != 0; --l, p++) {
+ *p = *((unsigned char *)(NE2000_ADDR + (a << 1))+1);
+ }
+}
+
+#endif
diff -Nru a/include/asm-h8300/h8max/timer_rate.h b/include/asm-h8300/h8max/timer_rate.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-h8300/h8max/timer_rate.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,10 @@
+#ifndef __H8300_H8MAX_TIMER_RATE__
+#define __H8300_H8MAX_TIMER_RATE__
+
+#include <linux/config.h>
+
+#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
+#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
+
+#endif
+
diff -Nru a/include/asm-h8300/io.h b/include/asm-h8300/io.h
--- a/include/asm-h8300/io.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-h8300/io.h Sun Aug 3 13:14:49 2003
@@ -41,15 +41,15 @@
}
#define readb(addr) \
- ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
+ ({ unsigned char __v = (*(volatile unsigned char *) (addr & 0x00ffffff)); __v; })
#define readw(addr) \
- ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
+ ({ unsigned short __v = (*(volatile unsigned short *) (addr & 0x00ffffff)); __v; })
#define readl(addr) \
- ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
+ ({ unsigned int __v = (*(volatile unsigned int *) (addr & 0x00ffffff)); __v; })
-#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
-#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
-#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
+#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr & 0x00ffffff)) = (b))
+#define writew(b,addr) (void)((*(volatile unsigned short *) (addr & 0x00ffffff)) = (b))
+#define writel(b,addr) (void)((*(volatile unsigned int *) (addr & 0x00ffffff)) = (b))
/*
* The following are some defines we need for MTD with our
@@ -146,7 +146,7 @@
#define insw(a,b,l) io_insw(a,b,l)
#define insl(a,b,l) io_insl(a,b,l)
-#define IO_SPACE_LIMIT 0xffff
+#define IO_SPACE_LIMIT 0xffffff
/* Values for nocacheflag and cmode */
diff -Nru a/include/asm-h8300/irq.h b/include/asm-h8300/irq.h
--- a/include/asm-h8300/irq.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-h8300/irq.h Sun Aug 3 13:14:46 2003
@@ -1,17 +1,14 @@
#ifndef _H8300_IRQ_H_
#define _H8300_IRQ_H_
-#define SYS_IRQS 64
-
-#define NR_IRQS 64
-
#include <asm/ptrace.h>
-/*
- * "Generic" interrupt sources
- */
-
-#define IRQ_SCHED_TIMER (40) /* interrupt source for scheduling timer */
+#if defined(CONFIG_CPU_H8300H)
+#define NR_IRQS 64
+#endif
+#if defined(CONFIG_CPU_H8S)
+#define NR_IRQS 128
+#endif
static __inline__ int irq_canonicalize(int irq)
{
@@ -20,32 +17,6 @@
extern void enable_irq(unsigned int);
extern void disable_irq(unsigned int);
-
-extern int sys_request_irq(unsigned int,
- void (*)(int, void *, struct pt_regs *),
- unsigned long, const char *, void *);
-extern void sys_free_irq(unsigned int, void *);
-
-typedef struct irq_node {
- void (*handler)(int, void *, struct pt_regs *);
- unsigned long flags;
- void *dev_id;
- const char *devname;
- struct irq_node *next;
-} irq_node_t;
-
-/*
- * This structure has only 4 elements for speed reasons
- */
-typedef struct irq_handler {
- void (*handler)(int, void *, struct pt_regs *);
- unsigned long flags;
- void *dev_id;
- const char *devname;
-} irq_handler_t;
-
-/* count of spurious interrupts */
-extern volatile unsigned int num_spurious;
/*
* Some drivers want these entry points
diff -Nru a/include/asm-h8300/local.h b/include/asm-h8300/local.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-h8300/local.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,6 @@
+#ifndef _H8300_LOCAL_H_
+#define _H8300_LOCAL_H_
+
+#include <asm-generic/local.h>
+
+#endif
diff -Nru a/include/asm-h8300/pgtable.h b/include/asm-h8300/pgtable.h
--- a/include/asm-h8300/pgtable.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/pgtable.h Sun Aug 3 13:14:47 2003
@@ -15,6 +15,9 @@
#define pgd_clear(pgdp)
#define kern_addr_valid(addr) (1)
#define pmd_offset(a, b) ((void *)0)
+#define pmd_none(pmd) (1)
+#define pgd_offset_k(adrdress) ((pgd_t *)0)
+#define pte_offset_kernel(dir, address) ((pte_t *)0)
#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
@@ -31,6 +34,8 @@
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
+static inline int pte_file(pte_t pte) { return 0; }
+
/*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc..
@@ -48,5 +53,19 @@
*/
#define pgtable_cache_init() do { } while (0)
#define io_remap_page_range remap_page_range
+
+/*
+ * All 32bit addresses are effectively valid for vmalloc...
+ * Sort of meaningless for non-VM targets.
+ */
+#define VMALLOC_START 0
+#define VMALLOC_END 0xffffffff
+
+/*
+ * All 32bit addresses are effectively valid for vmalloc...
+ * Sort of meaningless for non-VM targets.
+ */
+#define VMALLOC_START 0
+#define VMALLOC_END 0xffffffff
#endif /* _H8300_PGTABLE_H */
diff -Nru a/include/asm-h8300/processor.h b/include/asm-h8300/processor.h
--- a/include/asm-h8300/processor.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-h8300/processor.h Sun Aug 3 13:14:45 2003
@@ -52,17 +52,16 @@
#define MCA_bus 0
struct thread_struct {
- unsigned long ksp; /* kernel stack pointer */
- unsigned long usp; /* user stack pointer */
- unsigned short ccr; /* saved status register */
- unsigned long esp0; /* points to SR of stack frame */
- unsigned long vfork_ret;
- unsigned long debugreg[8]; /* debug info */
-} __attribute__((aligned(2),packed));
+ unsigned long ksp; /* kernel stack pointer */
+ unsigned long usp; /* user stack pointer */
+ unsigned long ccr; /* saved status register */
+ unsigned long esp0; /* points to SR of stack frame */
+ unsigned long debugreg[8]; /* debug info */
+};
#define INIT_THREAD { \
sizeof(init_stack) + (unsigned long) init_stack, 0, \
- PS_S, 0, 0, \
+ PS_S, \
}
/*
@@ -71,13 +70,25 @@
* pass the data segment into user programs if it exists,
* it can't hurt anything as far as I can tell
*/
+#if defined(__H8300S__)
#define start_thread(_regs, _pc, _usp) \
do { \
+ set_fs(USER_DS); /* reads from user space */ \
+ (_regs)->pc = (_pc); \
+ (_regs)->ccr &= ~0x10; /* clear kernel flag */ \
+} while(0)
+#endif
+#if defined(__H8300S__)
+#define start_thread(_regs, _pc, _usp) \
+do { \
+ set_fs(USER_DS); /* reads from user space */ \
(_regs)->pc = (_pc); \
- (_regs)->ccr &= ~0x10; \
- *((unsigned long *)(_usp)-1) = _pc; \
- wrusp((unsigned long)(_usp) - sizeof(unsigned long)*3); \
+ (_regs)->ccr &= ~0x10; /* clear kernel flag */ \
+ (_regs)->exr = 0x78; /* enable all interrupts */ \
+ /* 14 = space for retaddr(4), vector(4), er0(4) and ext(2) on stack */ \
+ wrusp(((unsigned long)(_usp)) - 14); \
} while(0)
+#endif
/* Forward declaration, a strange C thing */
struct task_struct;
diff -Nru a/include/asm-h8300/ptrace.h b/include/asm-h8300/ptrace.h
--- a/include/asm-h8300/ptrace.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-h8300/ptrace.h Sun Aug 3 13:14:52 2003
@@ -19,6 +19,10 @@
stack during a system call. */
struct pt_regs {
+ long retpc;
+ long er4;
+ long er5;
+ long er6;
long er3;
long er2;
long er1;
@@ -26,19 +30,11 @@
unsigned short ccr;
long er0;
long vector;
+#if defined(CONFIG_CPU_H8S)
+ unsigned short exr;
+#endif
unsigned long pc;
} __attribute__((aligned(2),packed));
-
-/*
- * This is the extended stack used by signal handlers and the context
- * switcher: it's pushed after the normal "struct pt_regs".
- */
-struct switch_stack {
- unsigned long er6;
- unsigned long er5;
- unsigned long er4;
- unsigned long retpc;
-};
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
diff -Nru a/include/asm-h8300/regs306x.h b/include/asm-h8300/regs306x.h
--- a/include/asm-h8300/regs306x.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/regs306x.h Sun Aug 3 13:14:47 2003
@@ -6,7 +6,7 @@
#if defined(__KERNEL__)
-#define DASTCR *(volatile unsigned char *)0xFEE01A
+#define DASTCR 0xFEE01A
#define DADR0 0xFEE09C
#define DADR1 0xFEE09D
#define DACR 0xFEE09E
diff -Nru a/include/asm-h8300/sections.h b/include/asm-h8300/sections.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-h8300/sections.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,6 @@
+#ifndef _H8300_SECTIONS_H_
+#define _H8300_SECTIONS_H_
+
+#include <asm-generic/sections.h>
+
+#endif
diff -Nru a/include/asm-h8300/semaphore.h b/include/asm-h8300/semaphore.h
--- a/include/asm-h8300/semaphore.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-h8300/semaphore.h Sun Aug 3 13:14:48 2003
@@ -51,7 +51,7 @@
#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
-extern inline void sema_init (struct semaphore *sem, int val)
+static inline void sema_init (struct semaphore *sem, int val)
{
*sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
}
@@ -83,92 +83,187 @@
* "down_failed" is a special asm handler that calls the C
* routine that actually waits. See arch/m68k/lib/semaphore.S
*/
-extern inline void down(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline void down(struct semaphore * sem)
{
+ register atomic_t *count asm("er0");
+
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r4l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%0, er0\n\t"
- "dec.l #1,er0\n\t"
- "mov.l er0,@%0\n\t"
+ "mov.l @%1, er1\n\t"
+ "dec.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
"bpl 1f\n\t"
- "ldc r4l,ccr\n\t"
- "mov.l %0,er0\n\t"
- "jsr @___down\n"
+ "ldc r3l,ccr\n\t"
+ "jsr @___down\n\t"
+ "bra 2f\n"
"1:\n\t"
- "ldc r4l,ccr"
- : /* no outputs */
- : "r" (&(sem->count))
- : "cc", "er0", "er1", "er2", "er3", "er4", "memory");
+ "ldc r3l,ccr\n"
+ "2:"
+ : "=m"(sem->count)
+ : "g" (count)
+ : "cc", "er1", "er2", "er3", "er4", "memory");
+}
+#endif
+#if defined(__H8300S__)
+static inline void down(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%1, er1\n\t"
+ "dec.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
+ "ldc r3l,exr\n\t"
+ "bpl 1f\n\t"
+ "jsr @___down\n"
+ "1:"
+ : "=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
}
+#endif
-extern inline int down_interruptible(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline int down_interruptible(struct semaphore * sem)
{
- register int ret __asm__("er0");
+ register atomic_t *count asm("er0");
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r1l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%1, er2\n\t"
+ "mov.l @%2, er2\n\t"
"dec.l #1,er2\n\t"
- "mov.l er2,@%1\n\t"
+ "mov.l er2,@%2\n\t"
"bpl 1f\n\t"
- "ldc r1l,ccr\n\t"
- "mov.l %1,er0\n\t"
+ "ldc r3l,ccr\n\t"
"jsr @___down_interruptible\n\t"
"bra 2f\n"
"1:\n\t"
- "ldc r1l,ccr\n\t"
+ "ldc r3l,ccr\n\t"
+ "sub.l %0,%0\n"
+ "2:"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
+ return (int)count;
+}
+#endif
+#if defined(__H8300S__)
+static inline int down_interruptible(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%2, er2\n\t"
+ "dec.l #1,er2\n\t"
+ "mov.l er2,@%2\n\t"
+ "ldc r3l,exr\n\t"
+ "bmi 1f\n\t"
"sub.l %0,%0\n\t"
- "2:\n\t"
- : "=r" (ret)
- : "r" (&(sem->count))
+ "bra 2f\n"
+ "1:\n\t"
+ "jsr @___down_interruptible\n"
+ "2:"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
: "cc", "er1", "er2", "er3", "memory");
- return ret;
+ return (int)count;
}
+#endif
-extern inline int down_trylock(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline int down_trylock(struct semaphore * sem)
{
- register int result;
+ register atomic_t *count asm("er0");
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r4l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%1,er0\n\t"
- "dec.l #1,er0\n\t"
- "mov.l er0,@%1\n\t"
+ "mov.l @%2,er2\n\t"
+ "dec.l #1,er2\n\t"
+ "mov.l er2,@%2\n\t"
"bpl 1f\n\t"
- "ldc r4l,ccr\n\t"
+ "ldc r3l,ccr\n\t"
"jmp @3f\n"
"1:\n\t"
- "ldc r4l,ccr\n\t"
+ "ldc r3l,ccr\n\t"
"sub.l %0,%0\n"
- "2:\n"
- ".section .text.lock,\"ax\"\n"
- ".align 2\n"
+ LOCK_SECTION_START(".align 2\n\t")
"3:\n\t"
- "mov.l %1,er0\n\t"
- "jsr @___down_trylock\n"
- "mov.l er0,%0\n\t"
- "jmp @2b\n\t"
- ".previous"
- : "=r" (result)
- : "r" (&(sem->count))
- : "cc", "er0","er4", "memory");
- return result;
+ "jsr @___down_trylock\n\t"
+ "jmp @2f\n\t"
+ LOCK_SECTION_END
+ "2:"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
+ : "cc", "er2", "er3", "memory");
+ return (int)count;
}
+#endif
+#if defined(__H8300S__)
+static inline int down_trylock(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%2,er2\n\t"
+ "dec.l #1,er2\n\t"
+ "mov.l er2,@%2\n\t"
+ "ldc r3l,exr\n\t"
+ "bpl 1f\n\t"
+ "jmp @3f\n"
+ "1:\n\t"
+ "sub.l %0,%0\n\t"
+ LOCK_SECTION_START(".align 2\n\t")
+ "3:\n\t"
+ "jsr @___down_trylock\n\t"
+ "jmp @2f\n\t"
+ LOCK_SECTION_END
+ "2:\n\t"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
+ return (int)count;
+}
+#endif
/*
* Note! This is subtle. We jump to wake people up only if
@@ -176,30 +271,60 @@
* The default case (no contention) will result in NO
* jumps for both down() and up().
*/
-extern inline void up(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline void up(struct semaphore * sem)
{
+ register atomic_t *count asm("er0");
+
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r4l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%0,er0\n\t"
- "inc.l #1,er0\n\t"
- "mov.l er0,@%0\n\t"
- "bmi 1f\n\t"
- "bne 2f\n\t"
- "1:\n\t"
- "ldc r4l,ccr\n\t"
- "mov.l %0,er0\n\t"
+ "mov.l @%1,er1\n\t"
+ "inc.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
+ "ldc r3l,ccr\n\t"
+ "sub.l er2,er2\n\t"
+ "cmp.l er2,er1\n\t"
+ "bgt 1f\n\t"
"jsr @___up\n"
- "2:\n\t"
- "ldc r4l,ccr"
- : /* no outputs */
- : "r" (&(sem->count))
- : "cc", "er0", "er4", "memory");
+ "1:"
+ : "=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
}
+#endif
+#if defined(__H8300S__)
+static inline void up(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%1,er1\n\t"
+ "inc.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
+ "ldc r3l,exr\n\t"
+ "sub.l er2,er2\n\t"
+ "cmp.l er2,er1\n\t"
+ "bgt 1f\n\t"
+ "jsr @___up\n"
+ "1:"
+ : "=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
+}
+#endif
#endif /* __ASSEMBLY__ */
diff -Nru a/include/asm-h8300/system.h b/include/asm-h8300/system.h
--- a/include/asm-h8300/system.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-h8300/system.h Sun Aug 3 13:14:48 2003
@@ -36,17 +36,20 @@
* H8/300 Porting 2002/09/04 Yoshinori Sato
*/
asmlinkage void resume(void);
-#define switch_to(prev,next,last) { \
- void *_last; \
- __asm__ __volatile__( \
- "mov.l %1, er0\n\t" \
- "mov.l %2, er1\n\t" \
- "jsr @_resume" \
- : "=r" (_last) \
- : "r" (&(prev->thread)), \
- "r" (&(next->thread)) \
- : "cc", "er0", "er1", "er2", "er3"); \
- (last) = _last; \
+#define switch_to(prev,next,last) { \
+ void *_last; \
+ __asm__ __volatile__( \
+ "mov.l %1, er0\n\t" \
+ "mov.l %2, er1\n\t" \
+ "mov.l %3, er2\n\t" \
+ "jsr @_resume\n\t" \
+ "mov.l er2,%0\n\t" \
+ : "=r" (_last) \
+ : "r" (&(prev->thread)), \
+ "r" (&(next->thread)), \
+ "g" (prev) \
+ : "cc", "er0", "er1", "er2", "er3"); \
+ (last) = _last; \
}
#if defined(__H8300H__)
@@ -54,17 +57,25 @@
#define __cli() asm volatile ("orc #0x80,ccr")
#define __save_flags(x) \
- asm volatile ("sub.l er0,er0\n\tstc ccr,r0l\n\tmov.l er0,%0":"=r" (x) : : "er0")
+ asm volatile ("stc ccr,r0l\n\tmov.l er0,%0":"=r" (x) : : "er0")
#define __restore_flags(x) \
asm volatile ("mov.l %0,er0\n\tldc r0l,ccr": :"r" (x) : "er0")
+
+#define irqs_disabled() \
+({ \
+ unsigned long flags; \
+ __save_flags(flags); \
+ ((flags & 0x80) == 0x80); \
+})
+
#endif
#if defined(__H8300S__)
#define __sti() asm volatile ("andc #0xf8,exr")
#define __cli() asm volatile ("orc #0x07,exr")
#define __save_flags(x) \
- asm volatile ("sub.l er0,er0\n\tstc exr,r0l\n\tmov.l er0,%0":"=r" (x) : : "er0")
+ asm volatile ("stc exr,r0l\n\tmov.l er0,%0":"=r" (x) : : "er0")
#define __restore_flags(x) \
asm volatile ("mov.l %0,er0\n\tldc r0l,exr": :"r" (x) : "er0")
@@ -73,22 +84,22 @@
#define irqs_disabled() \
({ \
unsigned long flags; \
- __save_flags(flags); \
- ((flags & 0x80) == 0x80); \
+ __save_flags(flags); \
+ ((flags & 0x07) == 0x07); \
})
#define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
/* For spinlocks etc */
-#define local_irq_disable() asm volatile ("orc #0x80,ccr")
-#define local_irq_enable() asm volatile ("andc #0x7f,ccr")
+#define local_irq_disable() __cli()
+#define local_irq_enable() __sti()
#define local_irq_save(x) ({ __save_flags(x); local_irq_disable(); })
#define local_irq_restore(x) __restore_flags(x)
#define local_save_flags(x) __save_flags(x)
/*
* Force strict CPU ordering.
- * Not really required on m68k...
+ * Not really required on H8...
*/
#define nop() asm volatile ("nop"::)
#define mb() asm volatile ("" : : :"memory")
diff -Nru a/include/asm-h8300/target_time.h b/include/asm-h8300/target_time.h
--- a/include/asm-h8300/target_time.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-h8300/target_time.h Sun Aug 3 13:14:49 2003
@@ -1,4 +1,4 @@
extern int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *));
extern void platform_timer_eoi(void);
-extern void platfrom_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
+extern void platform_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
unsigned int *hour, unsigned int *min, unsigned int *sec);
diff -Nru a/include/asm-h8300/thread_info.h b/include/asm-h8300/thread_info.h
--- a/include/asm-h8300/thread_info.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/thread_info.h Sun Aug 3 13:14:47 2003
@@ -59,7 +59,7 @@
"mov.l sp, %0 \n\t"
"and.l %1, %0"
: "=&r"(ti)
- : "r" (~(THREAD_SIZE-1))
+ : "g" (~(THREAD_SIZE-1))
);
return ti;
}
diff -Nru a/include/asm-h8300/tlb.h b/include/asm-h8300/tlb.h
--- a/include/asm-h8300/tlb.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-h8300/tlb.h Sun Aug 3 13:14:50 2003
@@ -1 +1,23 @@
+/*
+ include/asm-h8300/tlb.h
+*/
+
+#ifndef __H8300_TLB_H__
+#define __H8300_TLB_H__
+
+#define tlb_flush(tlb) do { } while(0)
+
+/*
+ include/asm-h8300/tlb.h
+*/
+
+#ifndef __H8300_TLB_H__
+#define __H8300_TLB_H__
+
+#define tlb_flush(tlb) do { } while(0)
+
#include <asm-generic/tlb.h>
+
+#endif
+
+#endif
diff -Nru a/include/asm-h8300/traps.h b/include/asm-h8300/traps.h
--- a/include/asm-h8300/traps.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-h8300/traps.h Sun Aug 3 13:14:53 2003
@@ -1,7 +1,7 @@
/*
- * linux/include/asm/traps.h
+ * linux/include/asm-h8300/traps.h
*
- * Copyright (C) 1993 Hamish Macdonald
+ * Copyright (C) 2003 Yoshinori Sato <ysato@users.sourceforge.jp>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -11,197 +11,18 @@
#ifndef _H8300_TRAPS_H
#define _H8300_TRAPS_H
-#if 0
-#ifndef __ASSEMBLY__
-
-typedef void (*e_vector)(void);
-
-extern e_vector vectors[];
-
-#endif
-
-#define VEC_BUSERR (2)
-#define VEC_ADDRERR (3)
-#define VEC_ILLEGAL (4)
-#define VEC_ZERODIV (5)
-#define VEC_CHK (6)
-#define VEC_TRAP (7)
-#define VEC_PRIV (8)
-#define VEC_TRACE (9)
-#define VEC_LINE10 (10)
-#define VEC_LINE11 (11)
-#define VEC_RESV1 (12)
-#define VEC_COPROC (13)
-#define VEC_FORMAT (14)
-#define VEC_UNINT (15)
-#define VEC_SPUR (24)
-#define VEC_INT1 (25)
-#define VEC_INT2 (26)
-#define VEC_INT3 (27)
-#define VEC_INT4 (28)
-#define VEC_INT5 (29)
-#define VEC_INT6 (30)
-#define VEC_INT7 (31)
-#define VEC_SYS (32)
-#define VEC_TRAP1 (33)
-#define VEC_TRAP2 (34)
-#define VEC_TRAP3 (35)
-#define VEC_TRAP4 (36)
-#define VEC_TRAP5 (37)
-#define VEC_TRAP6 (38)
-#define VEC_TRAP7 (39)
-#define VEC_TRAP8 (40)
-#define VEC_TRAP9 (41)
-#define VEC_TRAP10 (42)
-#define VEC_TRAP11 (43)
-#define VEC_TRAP12 (44)
-#define VEC_TRAP13 (45)
-#define VEC_TRAP14 (46)
-#define VEC_TRAP15 (47)
-#define VEC_FPBRUC (48)
-#define VEC_FPIR (49)
-#define VEC_FPDIVZ (50)
-#define VEC_FPUNDER (51)
-#define VEC_FPOE (52)
-#define VEC_FPOVER (53)
-#define VEC_FPNAN (54)
-#define VEC_FPUNSUP (55)
-#define VEC_UNIMPEA (60)
-#define VEC_UNIMPII (61)
-#define VEC_USER (64)
-
-#define VECOFF(vec) ((vec)<<2)
-
-#ifndef __ASSEMBLY__
-
-/* Status register bits */
-#define PS_T (0x8000)
-#define PS_S (0x2000)
-#define PS_M (0x1000)
-#define PS_C (0x0001)
-
-/* bits for 68020/68030 special status word */
-
-#define FC (0x8000)
-#define FB (0x4000)
-#define RC (0x2000)
-#define RB (0x1000)
-#define DF (0x0100)
-#define RM (0x0080)
-#define RW (0x0040)
-#define SZ (0x0030)
-#define DFC (0x0007)
-
-/* bits for 68030 MMU status register (mmusr,psr) */
-
-#define MMU_B (0x8000) /* bus error */
-#define MMU_L (0x4000) /* limit violation */
-#define MMU_S (0x2000) /* supervisor violation */
-#define MMU_WP (0x0800) /* write-protected */
-#define MMU_I (0x0400) /* invalid descriptor */
-#define MMU_M (0x0200) /* ATC entry modified */
-#define MMU_T (0x0040) /* transparent translation */
-#define MMU_NUM (0x0007) /* number of levels traversed */
-
-
-/* bits for 68040 special status word */
-#define CP_040 (0x8000)
-#define CU_040 (0x4000)
-#define CT_040 (0x2000)
-#define CM_040 (0x1000)
-#define MA_040 (0x0800)
-#define ATC_040 (0x0400)
-#define LK_040 (0x0200)
-#define RW_040 (0x0100)
-#define SIZ_040 (0x0060)
-#define TT_040 (0x0018)
-#define TM_040 (0x0007)
-
-/* bits for 68040 write back status word */
-#define WBV_040 (0x80)
-#define WBSIZ_040 (0x60)
-#define WBBYT_040 (0x20)
-#define WBWRD_040 (0x40)
-#define WBLNG_040 (0x00)
-#define WBTT_040 (0x18)
-#define WBTM_040 (0x07)
-
-/* bus access size codes */
-#define BA_SIZE_BYTE (0x20)
-#define BA_SIZE_WORD (0x40)
-#define BA_SIZE_LONG (0x00)
-#define BA_SIZE_LINE (0x60)
-
-/* bus access transfer type codes */
-#define BA_TT_MOVE16 (0x08)
-
-/* structure for stack frames */
-
-struct frame {
- struct pt_regs ptregs;
- union {
- struct {
- unsigned long iaddr; /* instruction address */
- } fmt2;
- struct {
- unsigned long effaddr; /* effective address */
- } fmt3;
- struct {
- unsigned long effaddr; /* effective address */
- unsigned long pc; /* pc of faulted instr */
- } fmt4;
- struct {
- unsigned long effaddr; /* effective address */
- unsigned short ssw; /* special status word */
- unsigned short wb3s; /* write back 3 status */
- unsigned short wb2s; /* write back 2 status */
- unsigned short wb1s; /* write back 1 status */
- unsigned long faddr; /* fault address */
- unsigned long wb3a; /* write back 3 address */
- unsigned long wb3d; /* write back 3 data */
- unsigned long wb2a; /* write back 2 address */
- unsigned long wb2d; /* write back 2 data */
- unsigned long wb1a; /* write back 1 address */
- unsigned long wb1dpd0; /* write back 1 data/push data 0*/
- unsigned long pd1; /* push data 1*/
- unsigned long pd2; /* push data 2*/
- unsigned long pd3; /* push data 3*/
- } fmt7;
- struct {
- unsigned long iaddr; /* instruction address */
- unsigned short int1[4]; /* internal registers */
- } fmt9;
- struct {
- unsigned short int1;
- unsigned short ssw; /* special status word */
- unsigned short isc; /* instruction stage c */
- unsigned short isb; /* instruction stage b */
- unsigned long daddr; /* data cycle fault address */
- unsigned short int2[2];
- unsigned long dobuf; /* data cycle output buffer */
- unsigned short int3[2];
- } fmta;
- struct {
- unsigned short int1;
- unsigned short ssw; /* special status word */
- unsigned short isc; /* instruction stage c */
- unsigned short isb; /* instruction stage b */
- unsigned long daddr; /* data cycle fault address */
- unsigned short int2[2];
- unsigned long dobuf; /* data cycle output buffer */
- unsigned short int3[4];
- unsigned long baddr; /* stage B address */
- unsigned short int4[2];
- unsigned long dibuf; /* data cycle input buffer */
- unsigned short int5[3];
- unsigned ver : 4; /* stack frame version # */
- unsigned int6:12;
- unsigned short int7[18];
- } fmtb;
- } un;
-};
-
-#endif /* __ASSEMBLY__ */
-#endif
+extern void system_call(void);
+extern void interrupt_entry(void);
+extern void trace_break(void);
+
+#define JMP_OP 0x5a000000
+#define JSR_OP 0x5e000000
+#define VECTOR(address) ((JMP_OP)|((unsigned long)address))
+#define REDIRECT(address) ((JSR_OP)|((unsigned long)address))
+
+#define TRAP0_VEC 8
+#define TRAP1_VEC 9
+#define TRAP2_VEC 10
+#define TRAP3_VEC 11
#endif /* _H8300_TRAPS_H */
diff -Nru a/include/asm-h8300/types.h b/include/asm-h8300/types.h
--- a/include/asm-h8300/types.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-h8300/types.h Sun Aug 3 13:14:49 2003
@@ -1,6 +1,8 @@
#ifndef _H8300_TYPES_H
#define _H8300_TYPES_H
+#if !defined(__ASSEMBLY__)
+
/*
* This file is never included by application software unless
* explicitly requested (e.g., via linux/types.h) in which case the
@@ -53,6 +55,11 @@
typedef u32 dma_addr_t;
+#define HAVE_SECTOR_T
+typedef u64 sector_t;
+
#endif /* __KERNEL__ */
+
+#endif /* __ASSEMBLY__ */
#endif /* _H8300_TYPES_H */
diff -Nru a/include/asm-h8300/uaccess.h b/include/asm-h8300/uaccess.h
--- a/include/asm-h8300/uaccess.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-h8300/uaccess.h Sun Aug 3 13:14:47 2003
@@ -14,16 +14,17 @@
#define VERIFY_WRITE 1
/* We let the MMU do all checking */
-extern inline int access_ok(int type, const void * addr, unsigned long size)
+#define access_ok(type, addr, size) __access_ok((unsigned long)addr,size)
+static inline int __access_ok(unsigned long addr, unsigned long size)
{
#define RANGE_CHECK_OK(addr, size, lower, upper) \
(((addr) >= (lower)) && (((addr) + (size)) < (upper)))
extern unsigned long _ramend;
- return(RANGE_CHECK_OK((unsigned long) addr, size, 0L, (unsigned long)&_ramend));
+ return(RANGE_CHECK_OK(addr, size, 0L, (unsigned long)&_ramend));
}
-extern inline int verify_area(int type, const void * addr, unsigned long size)
+static inline int verify_area(int type, const void *addr, unsigned long size)
{
return access_ok(type,addr,size)?0:-EFAULT;
}
diff -Nru a/include/asm-h8300/unistd.h b/include/asm-h8300/unistd.h
--- a/include/asm-h8300/unistd.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-h8300/unistd.h Sun Aug 3 13:14:48 2003
@@ -405,8 +405,39 @@
"g" ((long)b), \
"g" ((long)c), \
"g" ((long)d), \
- "g" ((long)e) \
- : "cc", "er1", "er2", "er3", "er4"); \
+ "m" ((long)e) \
+ : "cc", "er1", "er2", "er3", "er4", "er5"); \
+ if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
+ errno = -__res; \
+ __res = -1; \
+ } \
+ return (type)__res; \
+}
+
+#define _syscall6(type, name, atype, a, btype, b, ctype, c, dtype, d, \
+ etype, e, ftype, f) \
+type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
+{ \
+ register long __res __asm__("er0"); \
+ __asm__ __volatile__ ("mov.l er6,@-sp\n\t" \
+ "mov.l %7, er6\n\t" \
+ "mov.l %6, er5\n\t" \
+ "mov.l %5, er4\n\t" \
+ "mov.l %4, er3\n\t" \
+ "mov.l %3, er2\n\t" \
+ "mov.l %2, er1\n\t" \
+ "mov.l %1, er0\n\t" \
+ "trapa #0\n\t" \
+ "mov.l @sp+,er6" \
+ : "=r" (__res) \
+ : "ir" (__NR_##name), \
+ "g" ((long)a), \
+ "g" ((long)b), \
+ "g" ((long)c), \
+ "g" ((long)d), \
+ "m" ((long)e), \
+ "m" ((long)e) \
+ : "cc", "er1", "er2", "er3", "er4", "er5"); \
if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
errno = -__res; \
__res = -1; \
diff -Nru a/include/asm-i386/msr.h b/include/asm-i386/msr.h
--- a/include/asm-i386/msr.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-i386/msr.h Sun Aug 3 13:14:44 2003
@@ -8,15 +8,30 @@
*/
#define rdmsr(msr,val1,val2) \
- __asm__ __volatile__("rdmsr" \
+ __asm__ __volatile__("rdmsr" \
: "=a" (val1), "=d" (val2) \
: "c" (msr))
#define wrmsr(msr,val1,val2) \
- __asm__ __volatile__("wrmsr" \
+ __asm__ __volatile__("wrmsr" \
: /* no outputs */ \
: "c" (msr), "a" (val1), "d" (val2))
+#define rdmsrl(msr,val) do { \
+ unsigned long l__,h__; \
+ rdmsr (msr, l__, h__); \
+ val = l__; \
+ val |= ((u64)h__<<32); \
+} while(0)
+
+static inline void wrmsrl (unsigned long msr, unsigned long long val)
+{
+ unsigned long lo, hi;
+ lo = (unsigned long) val;
+ hi = val >> 32;
+ wrmsr (msr, lo, hi);
+}
+
#define rdtsc(low,high) \
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
@@ -200,7 +215,7 @@
#define MSR_K7_HWCR 0xC0010015
#define MSR_K7_CLK_CTL 0xC001001b
#define MSR_K7_FID_VID_CTL 0xC0010041
-#define MSR_K7_VID_STATUS 0xC0010042
+#define MSR_K7_FID_VID_STATUS 0xC0010042
/* Centaur-Hauls/IDT defined MSRs. */
#define MSR_IDT_FCR1 0x107
diff -Nru a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
--- a/include/asm-i386/pgtable-3level.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-i386/pgtable-3level.h Sun Aug 3 13:14:51 2003
@@ -123,6 +123,4 @@
#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
#define PTE_FILE_MAX_BITS 32
-extern struct kmem_cache_s *pae_pgd_cachep;
-
#endif /* _I386_PGTABLE_3LEVEL_H */
diff -Nru a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
--- a/include/asm-i386/pgtable.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-i386/pgtable.h Sun Aug 3 13:14:50 2003
@@ -21,15 +21,27 @@
#include <asm/bitops.h>
#endif
-extern pgd_t swapper_pg_dir[1024];
-extern void paging_init(void);
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/spinlock.h>
/*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc..
*/
-extern unsigned long empty_zero_page[1024];
#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+extern unsigned long empty_zero_page[1024];
+extern pgd_t swapper_pg_dir[1024];
+extern kmem_cache_t *pgd_cache;
+extern kmem_cache_t *pmd_cache;
+extern spinlock_t pgd_lock;
+extern struct list_head pgd_list;
+
+void pmd_ctor(void *, kmem_cache_t *, unsigned long);
+void pgd_ctor(void *, kmem_cache_t *, unsigned long);
+void pgd_dtor(void *, kmem_cache_t *, unsigned long);
+void pgtable_cache_init(void);
+void paging_init(void);
#endif /* !__ASSEMBLY__ */
@@ -41,20 +53,8 @@
#ifndef __ASSEMBLY__
#ifdef CONFIG_X86_PAE
# include <asm/pgtable-3level.h>
-
-/*
- * Need to initialise the X86 PAE caches
- */
-extern void pgtable_cache_init(void);
-
#else
# include <asm/pgtable-2level.h>
-
-/*
- * No page table caches to initialise
- */
-#define pgtable_cache_init() do { } while (0)
-
#endif
#endif
diff -Nru a/include/asm-ia64/io.h b/include/asm-ia64/io.h
--- a/include/asm-ia64/io.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-ia64/io.h Sun Aug 3 13:14:45 2003
@@ -420,6 +420,7 @@
* SPECweb-like workloads on zx1-based machines. Thus, for now we favor I/O MMU bypassing
* over BIO-level virtual merging.
*/
+extern unsigned long ia64_max_iommu_merge_mask;
#if 1
#define BIO_VMERGE_BOUNDARY 0
#else
@@ -433,7 +434,6 @@
*
* which is precisely what we want.
*/
-extern unsigned long ia64_max_iommu_merge_mask;
#define BIO_VMERGE_BOUNDARY (ia64_max_iommu_merge_mask + 1)
#endif
diff -Nru a/include/asm-ia64/sections.h b/include/asm-ia64/sections.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-ia64/sections.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,23 @@
+#ifndef _ASM_IA64_SECTIONS_H
+#define _ASM_IA64_SECTIONS_H
+
+/*
+ * Copyright (C) 1998-2003 Hewlett-Packard Co
+ * David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+
+#include <asm-generic/sections.h>
+
+extern char __per_cpu_start[], __per_cpu_end[], __phys_per_cpu_start[];
+extern char __start___vtop_patchlist[], __end___vtop_patchlist[];
+extern char __start___mckinley_e9_bundles[], __end___mckinley_e9_bundles[];
+extern char __start_gate_section[];
+extern char __start_gate_mckinley_e9_patchlist[], __end_gate_mckinley_e9_patchlist[];
+extern char __start_gate_vtop_patchlist[], __end_gate_vtop_patchlist[];
+extern char __start_gate_fsyscall_patchlist[], __end_gate_fsyscall_patchlist[];
+extern char __start_gate_brl_fsys_bubble_down_patchlist[], __end_gate_brl_fsys_bubble_down_patchlist[];
+extern char __start_unwind[], __end_unwind[];
+extern char _end[]; /* end of kernel image */
+
+#endif /* _ASM_IA64_SECTIONS_H */
+
diff -Nru a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
--- a/include/asm-mips/a.out.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/a.out.h Sun Aug 3 13:14:47 2003
@@ -1,16 +1,32 @@
-#ifndef __ASM_MIPS_A_OUT_H
-#define __ASM_MIPS_A_OUT_H
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2003 by Ralf Baechle
+ */
+#ifndef _ASM_A_OUT_H
+#define _ASM_A_OUT_H
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+
+#endif
struct exec
{
- unsigned long a_info; /* Use macros N_MAGIC, etc for access */
- unsigned a_text; /* length of text, in bytes */
- unsigned a_data; /* length of data, in bytes */
- unsigned a_bss; /* length of uninitialized data area for file, in bytes */
- unsigned a_syms; /* length of symbol table data in file, in bytes */
- unsigned a_entry; /* start address */
- unsigned a_trsize; /* length of relocation info for text, in bytes */
- unsigned a_drsize; /* length of relocation info for data, in bytes */
+ unsigned long a_info; /* Use macros N_MAGIC, etc for access */
+ unsigned a_text; /* length of text, in bytes */
+ unsigned a_data; /* length of data, in bytes */
+ unsigned a_bss; /* length of uninitialized data area for
+ file, in bytes */
+ unsigned a_syms; /* length of symbol table data in file,
+ in bytes */
+ unsigned a_entry; /* start address */
+ unsigned a_trsize; /* length of relocation info for text, in
+ bytes */
+ unsigned a_drsize; /* length of relocation info for data, in bytes */
};
#define N_TRSIZE(a) ((a).a_trsize)
@@ -19,8 +35,13 @@
#ifdef __KERNEL__
+#ifdef CONFIG_MIPS32
#define STACK_TOP TASK_SIZE
+#endif
+#ifdef CONFIG_MIPS64
+#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE)
+#endif
#endif
-#endif /* __ASM_MIPS_A_OUT_H */
+#endif /* _ASM_A_OUT_H */
diff -Nru a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
--- a/include/asm-mips/addrspace.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/addrspace.h Sun Aug 3 13:14:44 2003
@@ -3,13 +3,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996 by Ralf Baechle
+ * Copyright (C) 1996, 99 Ralf Baechle
* Copyright (C) 2000, 2002 Maciej W. Rozycki
- *
- * Definitions for the address spaces of the MIPS CPUs.
+ * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
*/
-#ifndef __ASM_ADDRSPACE_H
-#define __ASM_ADDRSPACE_H
+#ifndef _ASM_ADDRSPACE_H
+#define _ASM_ADDRSPACE_H
+
+#include <linux/config.h>
/*
* Configure language
@@ -37,6 +38,7 @@
/*
* Memory segments (32bit kernel mode addresses)
+ * These are the traditional names used in the 32-bit universe.
*/
#define KUSEG 0x00000000
#define KSEG0 0x80000000
@@ -44,7 +46,7 @@
#define KSEG2 0xc0000000
#define KSEG3 0xe0000000
-#define K0BASE KSEG0
+//#define K0BASE KSEG0
/*
* Returns the kernel segment base of a given address
@@ -52,11 +54,10 @@
#define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000)
/*
- * Returns the physical address of a KSEG0/KSEG1 address
+ * Returns the physical address of a CKSEGx / XKPHYS address
*/
#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
-
-#define PHYSADDR(a) CPHYSADDR(a)
+#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
/*
* Map an address to a certain kernel segment
@@ -66,8 +67,15 @@
#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
+#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
+#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
+#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
+#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
+
/*
* Memory segments (64bit kernel mode addresses)
+ * The compatibility segments use the full 64-bit sign extended value. Note
+ * the R8000 doesn't have them so don't reference these in generic MIPS code.
*/
#define XKUSEG 0x0000000000000000
#define XKSSEG 0x4000000000000000
@@ -90,8 +98,6 @@
#define K_CALG_NOTUSED 6
#define K_CALG_UNCACHED_ACCEL 7
-#define TO_PHYS_MASK 0xfffffffffULL /* 36 bit */
-
/*
* 64-bit address conversions
*/
@@ -100,4 +106,67 @@
#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
#define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a))
-#endif /* __ASM_ADDRSPACE_H */
+#if defined (CONFIG_CPU_R4300) \
+ || defined (CONFIG_CPU_R4X00) \
+ || defined (CONFIG_CPU_R5000) \
+ || defined (CONFIG_CPU_NEVADA) \
+ || defined (CONFIG_CPU_MIPS64)
+#define KUSIZE 0x0000010000000000 /* 2^^40 */
+#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
+#define K0SIZE 0x0000001000000000 /* 2^^36 */
+#define K1SIZE 0x0000001000000000 /* 2^^36 */
+#define K2SIZE 0x000000ff80000000
+#define KSEGSIZE 0x000000ff80000000 /* max syssegsz */
+#define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */
+#endif
+
+#if defined (CONFIG_CPU_R8000)
+/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
+#define KUSIZE 0x0000010000000000 /* 2^^40 */
+#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
+#define K0SIZE 0x0000010000000000 /* 2^^40 */
+#define K1SIZE 0x0000010000000000 /* 2^^40 */
+#define K2SIZE 0x0001000000000000
+#define KSEGSIZE 0x0000010000000000 /* max syssegsz */
+#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
+#endif
+
+#if defined (CONFIG_CPU_R10000)
+#define KUSIZE 0x0000010000000000 /* 2^^40 */
+#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
+#define K0SIZE 0x0000010000000000 /* 2^^40 */
+#define K1SIZE 0x0000010000000000 /* 2^^40 */
+#define K2SIZE 0x00000fff80000000
+#define KSEGSIZE 0x00000fff80000000 /* max syssegsz */
+#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
+#endif
+
+/*
+ * Further names for SGI source compatibility. These are stolen from
+ * IRIX's <sys/mips_addrspace.h>.
+ */
+#define KUBASE 0
+#define KUSIZE_32 0x0000000080000000 /* KUSIZE
+ for a 32 bit proc */
+//#define K0BASE 0xa800000000000000
+#define K0BASE_EXL_WR K0BASE /* exclusive on write */
+#define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */
+#define K0BASE_EXL 0xa000000000000000 /* exclusive */
+
+#ifdef CONFIG_SGI_IP27
+#define K1BASE 0x9600000000000000 /* uncached attr 3,
+ uncac */
+#else
+#define K1BASE 0x9000000000000000
+#endif
+#define K2BASE 0xc000000000000000
+
+#if !defined (CONFIG_CPU_R8000)
+#define COMPAT_K1BASE32 0xffffffffa0000000
+#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
+#endif
+
+#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
+#define PHYS_TO_K0(x) (_ACAST64_ (x) | K0BASE)
+
+#endif /* _ASM_ADDRSPACE_H */
diff -Nru a/include/asm-mips/arc/hinv.h b/include/asm-mips/arc/hinv.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/arc/hinv.h Sun Aug 3 13:14:48 2003
@@ -0,0 +1,174 @@
+/*
+ * ARCS hardware/memory inventory/configuration and system ID definitions.
+ */
+#ifndef _ASM_ARC_HINV_H
+#define _ASM_ARC_HINV_H
+
+#include <asm/arc/types.h>
+
+/* configuration query defines */
+typedef enum configclass {
+ SystemClass,
+ ProcessorClass,
+ CacheClass,
+#ifndef _NT_PROM
+ MemoryClass,
+ AdapterClass,
+ ControllerClass,
+ PeripheralClass
+#else /* _NT_PROM */
+ AdapterClass,
+ ControllerClass,
+ PeripheralClass,
+ MemoryClass
+#endif /* _NT_PROM */
+} CONFIGCLASS;
+
+typedef enum configtype {
+ ARC,
+ CPU,
+ FPU,
+ PrimaryICache,
+ PrimaryDCache,
+ SecondaryICache,
+ SecondaryDCache,
+ SecondaryCache,
+#ifndef _NT_PROM
+ Memory,
+#endif
+ EISAAdapter,
+ TCAdapter,
+ SCSIAdapter,
+ DTIAdapter,
+ MultiFunctionAdapter,
+ DiskController,
+ TapeController,
+ CDROMController,
+ WORMController,
+ SerialController,
+ NetworkController,
+ DisplayController,
+ ParallelController,
+ PointerController,
+ KeyboardController,
+ AudioController,
+ OtherController,
+ DiskPeripheral,
+ FloppyDiskPeripheral,
+ TapePeripheral,
+ ModemPeripheral,
+ MonitorPeripheral,
+ PrinterPeripheral,
+ PointerPeripheral,
+ KeyboardPeripheral,
+ TerminalPeripheral,
+ LinePeripheral,
+ NetworkPeripheral,
+#ifdef _NT_PROM
+ Memory,
+#endif
+ OtherPeripheral,
+
+ /* new stuff for IP30 */
+ /* added without moving anything */
+ /* except ANONYMOUS. */
+
+ XTalkAdapter,
+ PCIAdapter,
+ GIOAdapter,
+ TPUAdapter,
+
+ Anonymous
+} CONFIGTYPE;
+
+typedef enum {
+ Failed = 1,
+ ReadOnly = 2,
+ Removable = 4,
+ ConsoleIn = 8,
+ ConsoleOut = 16,
+ Input = 32,
+ Output = 64
+} IDENTIFIERFLAG;
+
+#ifndef NULL /* for GetChild(NULL); */
+#define NULL 0
+#endif
+
+union key_u {
+ struct {
+#ifdef _MIPSEB
+ unsigned char c_bsize; /* block size in lines */
+ unsigned char c_lsize; /* line size in bytes/tag */
+ unsigned short c_size; /* cache size in 4K pages */
+#else /* _MIPSEL */
+ unsigned short c_size; /* cache size in 4K pages */
+ unsigned char c_lsize; /* line size in bytes/tag */
+ unsigned char c_bsize; /* block size in lines */
+#endif /* _MIPSEL */
+ } cache;
+ ULONG FullKey;
+};
+
+#if _MIPS_SIM == _ABI64
+#define SGI_ARCS_VERS 64 /* sgi 64-bit version */
+#define SGI_ARCS_REV 0 /* rev .00 */
+#else
+#define SGI_ARCS_VERS 1 /* first version */
+#define SGI_ARCS_REV 10 /* rev .10, 3/04/92 */
+#endif
+
+typedef struct component {
+ CONFIGCLASS Class;
+ CONFIGTYPE Type;
+ IDENTIFIERFLAG Flags;
+ USHORT Version;
+ USHORT Revision;
+ ULONG Key;
+ ULONG AffinityMask;
+ ULONG ConfigurationDataSize;
+ ULONG IdentifierLength;
+ char *Identifier;
+} COMPONENT;
+
+/* internal structure that holds pathname parsing data */
+struct cfgdata {
+ char *name; /* full name */
+ int minlen; /* minimum length to match */
+ CONFIGTYPE type; /* type of token */
+};
+
+/* System ID */
+typedef struct systemid {
+ CHAR VendorId[8];
+ CHAR ProductId[8];
+} SYSTEMID;
+
+/* memory query functions */
+typedef enum memorytype {
+ ExceptionBlock,
+ SPBPage, /* ARCS == SystemParameterBlock */
+#ifndef _NT_PROM
+ FreeContiguous,
+ FreeMemory,
+ BadMemory,
+ LoadedProgram,
+ FirmwareTemporary,
+ FirmwarePermanent
+#else /* _NT_PROM */
+ FreeMemory,
+ BadMemory,
+ LoadedProgram,
+ FirmwareTemporary,
+ FirmwarePermanent,
+ FreeContiguous
+#endif /* _NT_PROM */
+} MEMORYTYPE;
+
+typedef struct memorydescriptor {
+ MEMORYTYPE Type;
+ LONG BasePage;
+ LONG PageCount;
+} MEMORYDESCRIPTOR;
+
+#endif /* _ASM_ARC_HINV_H */
diff -Nru a/include/asm-mips/asm.h b/include/asm-mips/asm.h
--- a/include/asm-mips/asm.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/asm.h Sun Aug 3 13:14:44 2003
@@ -3,8 +3,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
- * Copyright (C) 2002 Maciej W. Rozycki
+ * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
+ * Copyright (C) 1999 by Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
*
* Some useful macros for MIPS assembler code
*
@@ -12,8 +13,8 @@
* away by gas in -O mode. These nops are however required to fill delay
* slots in noreorder mode.
*/
-#ifndef __ASM_ASM_H
-#define __ASM_ASM_H
+#ifndef _ASM_ASM_H
+#define _ASM_ASM_H
#include <linux/config.h>
#include <asm/sgidefs.h>
@@ -136,7 +137,7 @@
* MIPS IV implementations are free to treat this as a nop. The R5000
* is one of them. So we should have an option not to use this instruction.
*/
-#if CONFIG_CPU_HAS_PREFETCH
+#ifdef CONFIG_CPU_HAS_PREFETCH
#define PREF(hint,addr) \
.set push; \
@@ -301,6 +302,11 @@
#define LONG_SRLV srlv
#define LONG_SRA sra
#define LONG_SRAV srav
+
+#define LONG .word
+#define LONGSIZE 4
+#define LONGMASK 3
+#define LONGLOG 2
#endif
#if (_MIPS_SZLONG == 64)
@@ -318,6 +324,11 @@
#define LONG_SRLV dsrlv
#define LONG_SRA dsra
#define LONG_SRAV dsrav
+
+#define LONG .dword
+#define LONGSIZE 8
+#define LONGMASK 7
+#define LONGLOG 3
#endif
/*
@@ -387,4 +398,4 @@
#define SSNOP sll zero,zero,1
-#endif /* __ASM_ASM_H */
+#endif /* _ASM_ASM_H */
diff -Nru a/include/asm-mips/asmmacro-32.h b/include/asm-mips/asmmacro-32.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/asmmacro-32.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,159 @@
+/*
+ * asmmacro.h: Assembler macros to make things easier to read.
+ *
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1998, 1999, 2003 Ralf Baechle
+ */
+#ifndef _ASM_ASMMACRO_32_H
+#define _ASM_ASMMACRO_32_H
+
+#include <linux/config.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/fpregdef.h>
+#include <asm/mipsregs.h>
+
+ .macro fpu_save_double thread tmp=t0
+ cfc1 \tmp, fcr31
+ sdc1 $f0, THREAD_FPR0(\thread)
+ sdc1 $f2, THREAD_FPR2(\thread)
+ sdc1 $f4, THREAD_FPR4(\thread)
+ sdc1 $f6, THREAD_FPR6(\thread)
+ sdc1 $f8, THREAD_FPR8(\thread)
+ sdc1 $f10, THREAD_FPR10(\thread)
+ sdc1 $f12, THREAD_FPR12(\thread)
+ sdc1 $f14, THREAD_FPR14(\thread)
+ sdc1 $f16, THREAD_FPR16(\thread)
+ sdc1 $f18, THREAD_FPR18(\thread)
+ sdc1 $f20, THREAD_FPR20(\thread)
+ sdc1 $f22, THREAD_FPR22(\thread)
+ sdc1 $f24, THREAD_FPR24(\thread)
+ sdc1 $f26, THREAD_FPR26(\thread)
+ sdc1 $f28, THREAD_FPR28(\thread)
+ sdc1 $f30, THREAD_FPR30(\thread)
+ sw \tmp, THREAD_FCR31(\thread)
+ .endm
+
+ .macro fpu_save_single thread tmp=t0
+ cfc1 \tmp, fcr31
+ swc1 $f0, THREAD_FPR0(\thread)
+ swc1 $f1, THREAD_FPR1(\thread)
+ swc1 $f2, THREAD_FPR2(\thread)
+ swc1 $f3, THREAD_FPR3(\thread)
+ swc1 $f4, THREAD_FPR4(\thread)
+ swc1 $f5, THREAD_FPR5(\thread)
+ swc1 $f6, THREAD_FPR6(\thread)
+ swc1 $f7, THREAD_FPR7(\thread)
+ swc1 $f8, THREAD_FPR8(\thread)
+ swc1 $f9, THREAD_FPR9(\thread)
+ swc1 $f10, THREAD_FPR10(\thread)
+ swc1 $f11, THREAD_FPR11(\thread)
+ swc1 $f12, THREAD_FPR12(\thread)
+ swc1 $f13, THREAD_FPR13(\thread)
+ swc1 $f14, THREAD_FPR14(\thread)
+ swc1 $f15, THREAD_FPR15(\thread)
+ swc1 $f16, THREAD_FPR16(\thread)
+ swc1 $f17, THREAD_FPR17(\thread)
+ swc1 $f18, THREAD_FPR18(\thread)
+ swc1 $f19, THREAD_FPR19(\thread)
+ swc1 $f20, THREAD_FPR20(\thread)
+ swc1 $f21, THREAD_FPR21(\thread)
+ swc1 $f22, THREAD_FPR22(\thread)
+ swc1 $f23, THREAD_FPR23(\thread)
+ swc1 $f24, THREAD_FPR24(\thread)
+ swc1 $f25, THREAD_FPR25(\thread)
+ swc1 $f26, THREAD_FPR26(\thread)
+ swc1 $f27, THREAD_FPR27(\thread)
+ swc1 $f28, THREAD_FPR28(\thread)
+ swc1 $f29, THREAD_FPR29(\thread)
+ swc1 $f30, THREAD_FPR30(\thread)
+ swc1 $f31, THREAD_FPR31(\thread)
+ sw \tmp, THREAD_FCR31(\thread)
+ .endm
+
+ .macro fpu_restore_double thread tmp=t0
+ lw \tmp, THREAD_FCR31(\thread)
+ ldc1 $f0, THREAD_FPR0(\thread)
+ ldc1 $f2, THREAD_FPR2(\thread)
+ ldc1 $f4, THREAD_FPR4(\thread)
+ ldc1 $f6, THREAD_FPR6(\thread)
+ ldc1 $f8, THREAD_FPR8(\thread)
+ ldc1 $f10, THREAD_FPR10(\thread)
+ ldc1 $f12, THREAD_FPR12(\thread)
+ ldc1 $f14, THREAD_FPR14(\thread)
+ ldc1 $f16, THREAD_FPR16(\thread)
+ ldc1 $f18, THREAD_FPR18(\thread)
+ ldc1 $f20, THREAD_FPR20(\thread)
+ ldc1 $f22, THREAD_FPR22(\thread)
+ ldc1 $f24, THREAD_FPR24(\thread)
+ ldc1 $f26, THREAD_FPR26(\thread)
+ ldc1 $f28, THREAD_FPR28(\thread)
+ ldc1 $f30, THREAD_FPR30(\thread)
+ ctc1 \tmp, fcr31
+ .endm
+
+ .macro fpu_restore_single thread tmp=t0
+ lw \tmp, THREAD_FCR31(\thread)
+ lwc1 $f0, THREAD_FPR0(\thread)
+ lwc1 $f1, THREAD_FPR1(\thread)
+ lwc1 $f2, THREAD_FPR2(\thread)
+ lwc1 $f3, THREAD_FPR3(\thread)
+ lwc1 $f4, THREAD_FPR4(\thread)
+ lwc1 $f5, THREAD_FPR5(\thread)
+ lwc1 $f6, THREAD_FPR6(\thread)
+ lwc1 $f7, THREAD_FPR7(\thread)
+ lwc1 $f8, THREAD_FPR8(\thread)
+ lwc1 $f9, THREAD_FPR9(\thread)
+ lwc1 $f10, THREAD_FPR10(\thread)
+ lwc1 $f11, THREAD_FPR11(\thread)
+ lwc1 $f12, THREAD_FPR12(\thread)
+ lwc1 $f13, THREAD_FPR13(\thread)
+ lwc1 $f14, THREAD_FPR14(\thread)
+ lwc1 $f15, THREAD_FPR15(\thread)
+ lwc1 $f16, THREAD_FPR16(\thread)
+ lwc1 $f17, THREAD_FPR17(\thread)
+ lwc1 $f18, THREAD_FPR18(\thread)
+ lwc1 $f19, THREAD_FPR19(\thread)
+ lwc1 $f20, THREAD_FPR20(\thread)
+ lwc1 $f21, THREAD_FPR21(\thread)
+ lwc1 $f22, THREAD_FPR22(\thread)
+ lwc1 $f23, THREAD_FPR23(\thread)
+ lwc1 $f24, THREAD_FPR24(\thread)
+ lwc1 $f25, THREAD_FPR25(\thread)
+ lwc1 $f26, THREAD_FPR26(\thread)
+ lwc1 $f27, THREAD_FPR27(\thread)
+ lwc1 $f28, THREAD_FPR28(\thread)
+ lwc1 $f29, THREAD_FPR29(\thread)
+ lwc1 $f30, THREAD_FPR30(\thread)
+ lwc1 $f31, THREAD_FPR31(\thread)
+ ctc1 \tmp, fcr31
+ .endm
+
+ .macro cpu_save_nonscratch thread
+ LONG_S s0, THREAD_REG16(\thread)
+ LONG_S s1, THREAD_REG17(\thread)
+ LONG_S s2, THREAD_REG18(\thread)
+ LONG_S s3, THREAD_REG19(\thread)
+ LONG_S s4, THREAD_REG20(\thread)
+ LONG_S s5, THREAD_REG21(\thread)
+ LONG_S s6, THREAD_REG22(\thread)
+ LONG_S s7, THREAD_REG23(\thread)
+ LONG_S sp, THREAD_REG29(\thread)
+ LONG_S fp, THREAD_REG30(\thread)
+ .endm
+
+ .macro cpu_restore_nonscratch thread
+ LONG_L s0, THREAD_REG16(\thread)
+ LONG_L s1, THREAD_REG17(\thread)
+ LONG_L s2, THREAD_REG18(\thread)
+ LONG_L s3, THREAD_REG19(\thread)
+ LONG_L s4, THREAD_REG20(\thread)
+ LONG_L s5, THREAD_REG21(\thread)
+ LONG_L s6, THREAD_REG22(\thread)
+ LONG_L s7, THREAD_REG23(\thread)
+ LONG_L sp, THREAD_REG29(\thread)
+ LONG_L fp, THREAD_REG30(\thread)
+ LONG_L ra, THREAD_REG31(\thread)
+ .endm
+
+#endif /* _ASM_ASMMACRO_32_H */
diff -Nru a/include/asm-mips/asmmacro-64.h b/include/asm-mips/asmmacro-64.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/asmmacro-64.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,123 @@
+/*
+ * asmmacro.h: Assembler macros to make things easier to read.
+ *
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_ASMMACRO_64_H
+#define _ASM_ASMMACRO_64_H
+
+#include <linux/config.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/fpregdef.h>
+#include <asm/mipsregs.h>
+
+ .macro fpu_save_16even thread tmp=t0
+ cfc1 \tmp, fcr31
+ sdc1 $f2, THREAD_FPR2(\thread)
+ sdc1 $f4, THREAD_FPR4(\thread)
+ sdc1 $f6, THREAD_FPR6(\thread)
+ sdc1 $f8, THREAD_FPR8(\thread)
+ sdc1 $f10, THREAD_FPR10(\thread)
+ sdc1 $f12, THREAD_FPR12(\thread)
+ sdc1 $f14, THREAD_FPR14(\thread)
+ sdc1 $f16, THREAD_FPR16(\thread)
+ sdc1 $f18, THREAD_FPR18(\thread)
+ sdc1 $f20, THREAD_FPR20(\thread)
+ sdc1 $f22, THREAD_FPR22(\thread)
+ sdc1 $f24, THREAD_FPR24(\thread)
+ sdc1 $f26, THREAD_FPR26(\thread)
+ sdc1 $f28, THREAD_FPR28(\thread)
+ sdc1 $f30, THREAD_FPR30(\thread)
+ sw \tmp, THREAD_FCR31(\thread)
+ .endm
+
+ .macro fpu_save_16odd thread
+ sdc1 $f1, THREAD_FPR1(\thread)
+ sdc1 $f3, THREAD_FPR3(\thread)
+ sdc1 $f5, THREAD_FPR5(\thread)
+ sdc1 $f7, THREAD_FPR7(\thread)
+ sdc1 $f9, THREAD_FPR9(\thread)
+ sdc1 $f11, THREAD_FPR11(\thread)
+ sdc1 $f13, THREAD_FPR13(\thread)
+ sdc1 $f15, THREAD_FPR15(\thread)
+ sdc1 $f17, THREAD_FPR17(\thread)
+ sdc1 $f19, THREAD_FPR19(\thread)
+ sdc1 $f21, THREAD_FPR21(\thread)
+ sdc1 $f23, THREAD_FPR23(\thread)
+ sdc1 $f25, THREAD_FPR25(\thread)
+ sdc1 $f27, THREAD_FPR27(\thread)
+ sdc1 $f29, THREAD_FPR29(\thread)
+ sdc1 $f31, THREAD_FPR31(\thread)
+ .endm
+
+ .macro fpu_restore_16even thread tmp=t0
+ lw \tmp, THREAD_FCR31(\thread)
+ ldc1 $f0, THREAD_FPR0(\thread)
+ ldc1 $f2, THREAD_FPR2(\thread)
+ ldc1 $f4, THREAD_FPR4(\thread)
+ ldc1 $f6, THREAD_FPR6(\thread)
+ ldc1 $f8, THREAD_FPR8(\thread)
+ ldc1 $f10, THREAD_FPR10(\thread)
+ ldc1 $f12, THREAD_FPR12(\thread)
+ ldc1 $f14, THREAD_FPR14(\thread)
+ ldc1 $f16, THREAD_FPR16(\thread)
+ ldc1 $f18, THREAD_FPR18(\thread)
+ ldc1 $f20, THREAD_FPR20(\thread)
+ ldc1 $f22, THREAD_FPR22(\thread)
+ ldc1 $f24, THREAD_FPR24(\thread)
+ ldc1 $f26, THREAD_FPR26(\thread)
+ ldc1 $f28, THREAD_FPR28(\thread)
+ ldc1 $f30, THREAD_FPR30(\thread)
+ ctc1 \tmp, fcr31
+ .endm
+
+ .macro fpu_restore_16odd thread
+ ldc1 $f1, THREAD_FPR1(\thread)
+ ldc1 $f3, THREAD_FPR3(\thread)
+ ldc1 $f5, THREAD_FPR5(\thread)
+ ldc1 $f7, THREAD_FPR7(\thread)
+ ldc1 $f9, THREAD_FPR9(\thread)
+ ldc1 $f11, THREAD_FPR11(\thread)
+ ldc1 $f13, THREAD_FPR13(\thread)
+ ldc1 $f15, THREAD_FPR15(\thread)
+ ldc1 $f17, THREAD_FPR17(\thread)
+ ldc1 $f19, THREAD_FPR19(\thread)
+ ldc1 $f21, THREAD_FPR21(\thread)
+ ldc1 $f23, THREAD_FPR23(\thread)
+ ldc1 $f25, THREAD_FPR25(\thread)
+ ldc1 $f27, THREAD_FPR27(\thread)
+ ldc1 $f29, THREAD_FPR29(\thread)
+ ldc1 $f31, THREAD_FPR31(\thread)
+ .endm
+
+ .macro cpu_save_nonscratch thread
+ LONG_S s0, THREAD_REG16(\thread)
+ LONG_S s1, THREAD_REG17(\thread)
+ LONG_S s2, THREAD_REG18(\thread)
+ LONG_S s3, THREAD_REG19(\thread)
+ LONG_S s4, THREAD_REG20(\thread)
+ LONG_S s5, THREAD_REG21(\thread)
+ LONG_S s6, THREAD_REG22(\thread)
+ LONG_S s7, THREAD_REG23(\thread)
+ LONG_S sp, THREAD_REG29(\thread)
+ LONG_S fp, THREAD_REG30(\thread)
+ .endm
+
+ .macro cpu_restore_nonscratch thread
+ LONG_L s0, THREAD_REG16(\thread)
+ LONG_L s1, THREAD_REG17(\thread)
+ LONG_L s2, THREAD_REG18(\thread)
+ LONG_L s3, THREAD_REG19(\thread)
+ LONG_L s4, THREAD_REG20(\thread)
+ LONG_L s5, THREAD_REG21(\thread)
+ LONG_L s6, THREAD_REG22(\thread)
+ LONG_L s7, THREAD_REG23(\thread)
+ LONG_L sp, THREAD_REG29(\thread)
+ LONG_L fp, THREAD_REG30(\thread)
+ LONG_L ra, THREAD_REG31(\thread)
+ .endm
+
+#endif /* _ASM_ASMMACRO_64_H */
diff -Nru a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
--- a/include/asm-mips/asmmacro.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/asmmacro.h Sun Aug 3 13:14:51 2003
@@ -1,243 +1,49 @@
/*
- * asmmacro.h: Assembler macros to make things easier to read.
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1998 Ralf Baechle
+ * Copyright (C) 2003 Ralf Baechle
*/
#ifndef _ASM_ASMMACRO_H
#define _ASM_ASMMACRO_H
-
+
#include <linux/config.h>
-#include <asm/offset.h>
-
-#ifdef CONFIG_CPU_SB1
-#define FPU_ENABLE_HAZARD \
- .set push; \
- .set noreorder; \
- .set mips2; \
- SSNOP; \
- bnezl $0, .+4; \
- SSNOP; \
- .set pop
-#else
-#define FPU_ENABLE_HAZARD
+
+#ifdef CONFIG_MIPS32
+#include <asm/asmmacro-32.h>
#endif
-
-#define FPU_SAVE_DOUBLE(thread, tmp) \
- cfc1 tmp, fcr31; \
- sdc1 $f0, (THREAD_FPU + 0x000)(thread); \
- sdc1 $f2, (THREAD_FPU + 0x010)(thread); \
- sdc1 $f4, (THREAD_FPU + 0x020)(thread); \
- sdc1 $f6, (THREAD_FPU + 0x030)(thread); \
- sdc1 $f8, (THREAD_FPU + 0x040)(thread); \
- sdc1 $f10, (THREAD_FPU + 0x050)(thread); \
- sdc1 $f12, (THREAD_FPU + 0x060)(thread); \
- sdc1 $f14, (THREAD_FPU + 0x070)(thread); \
- sdc1 $f16, (THREAD_FPU + 0x080)(thread); \
- sdc1 $f18, (THREAD_FPU + 0x090)(thread); \
- sdc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
- sdc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
- sdc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
- sdc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
- sdc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
- sdc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
- sw tmp, (THREAD_FPU + 0x100)(thread)
-
-#if defined (__MIPSEL__)
-#define FPU_SAVE_SINGLE(thread,tmp) \
- cfc1 tmp, fcr31; \
- swc1 $f0, (THREAD_FPU + 0x000)(thread); \
- swc1 $f1, (THREAD_FPU + 0x004)(thread); \
- swc1 $f2, (THREAD_FPU + 0x010)(thread); \
- swc1 $f3, (THREAD_FPU + 0x014)(thread); \
- swc1 $f4, (THREAD_FPU + 0x020)(thread); \
- swc1 $f5, (THREAD_FPU + 0x024)(thread); \
- swc1 $f6, (THREAD_FPU + 0x030)(thread); \
- swc1 $f7, (THREAD_FPU + 0x034)(thread); \
- swc1 $f8, (THREAD_FPU + 0x040)(thread); \
- swc1 $f9, (THREAD_FPU + 0x044)(thread); \
- swc1 $f10, (THREAD_FPU + 0x050)(thread); \
- swc1 $f11, (THREAD_FPU + 0x054)(thread); \
- swc1 $f12, (THREAD_FPU + 0x060)(thread); \
- swc1 $f13, (THREAD_FPU + 0x064)(thread); \
- swc1 $f14, (THREAD_FPU + 0x070)(thread); \
- swc1 $f15, (THREAD_FPU + 0x074)(thread); \
- swc1 $f16, (THREAD_FPU + 0x080)(thread); \
- swc1 $f17, (THREAD_FPU + 0x084)(thread); \
- swc1 $f18, (THREAD_FPU + 0x090)(thread); \
- swc1 $f19, (THREAD_FPU + 0x094)(thread); \
- swc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
- swc1 $f21, (THREAD_FPU + 0x0a4)(thread); \
- swc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
- swc1 $f23, (THREAD_FPU + 0x0b4)(thread); \
- swc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
- swc1 $f25, (THREAD_FPU + 0x0c4)(thread); \
- swc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
- swc1 $f27, (THREAD_FPU + 0x0d4)(thread); \
- swc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
- swc1 $f29, (THREAD_FPU + 0x0e4)(thread); \
- swc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
- swc1 $f31, (THREAD_FPU + 0x0f4)(thread); \
- sw tmp, (THREAD_FPU + 0x100)(thread)
-#elif defined (__MIPSEB__)
-#define FPU_SAVE_SINGLE(thread,tmp) \
- cfc1 tmp, fcr31; \
- swc1 $f0, (THREAD_FPU + 0x004)(thread); \
- swc1 $f1, (THREAD_FPU + 0x000)(thread); \
- swc1 $f2, (THREAD_FPU + 0x014)(thread); \
- swc1 $f3, (THREAD_FPU + 0x010)(thread); \
- swc1 $f4, (THREAD_FPU + 0x024)(thread); \
- swc1 $f5, (THREAD_FPU + 0x020)(thread); \
- swc1 $f6, (THREAD_FPU + 0x034)(thread); \
- swc1 $f7, (THREAD_FPU + 0x030)(thread); \
- swc1 $f8, (THREAD_FPU + 0x044)(thread); \
- swc1 $f9, (THREAD_FPU + 0x040)(thread); \
- swc1 $f10, (THREAD_FPU + 0x054)(thread); \
- swc1 $f11, (THREAD_FPU + 0x050)(thread); \
- swc1 $f12, (THREAD_FPU + 0x064)(thread); \
- swc1 $f13, (THREAD_FPU + 0x060)(thread); \
- swc1 $f14, (THREAD_FPU + 0x074)(thread); \
- swc1 $f15, (THREAD_FPU + 0x070)(thread); \
- swc1 $f16, (THREAD_FPU + 0x084)(thread); \
- swc1 $f17, (THREAD_FPU + 0x080)(thread); \
- swc1 $f18, (THREAD_FPU + 0x094)(thread); \
- swc1 $f19, (THREAD_FPU + 0x090)(thread); \
- swc1 $f20, (THREAD_FPU + 0x0a4)(thread); \
- swc1 $f21, (THREAD_FPU + 0x0a0)(thread); \
- swc1 $f22, (THREAD_FPU + 0x0b4)(thread); \
- swc1 $f23, (THREAD_FPU + 0x0b0)(thread); \
- swc1 $f24, (THREAD_FPU + 0x0c4)(thread); \
- swc1 $f25, (THREAD_FPU + 0x0c0)(thread); \
- swc1 $f26, (THREAD_FPU + 0x0d4)(thread); \
- swc1 $f27, (THREAD_FPU + 0x0d0)(thread); \
- swc1 $f28, (THREAD_FPU + 0x0e4)(thread); \
- swc1 $f29, (THREAD_FPU + 0x0e0)(thread); \
- swc1 $f30, (THREAD_FPU + 0x0f4)(thread); \
- swc1 $f31, (THREAD_FPU + 0x0f0)(thread); \
- sw tmp, (THREAD_FPU + 0x100)(thread)
-#else
-#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
+#ifdef CONFIG_MIPS64
+#include <asm/asmmacro-64.h>
#endif
-#define FPU_RESTORE_DOUBLE(thread, tmp) \
- lw tmp, (THREAD_FPU + 0x100)(thread); \
- ldc1 $f0, (THREAD_FPU + 0x000)(thread); \
- ldc1 $f2, (THREAD_FPU + 0x010)(thread); \
- ldc1 $f4, (THREAD_FPU + 0x020)(thread); \
- ldc1 $f6, (THREAD_FPU + 0x030)(thread); \
- ldc1 $f8, (THREAD_FPU + 0x040)(thread); \
- ldc1 $f10, (THREAD_FPU + 0x050)(thread); \
- ldc1 $f12, (THREAD_FPU + 0x060)(thread); \
- ldc1 $f14, (THREAD_FPU + 0x070)(thread); \
- ldc1 $f16, (THREAD_FPU + 0x080)(thread); \
- ldc1 $f18, (THREAD_FPU + 0x090)(thread); \
- ldc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
- ldc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
- ldc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
- ldc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
- ldc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
- ldc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
- ctc1 tmp, fcr31
+ .macro local_irq_enable reg=t0
+ mfc0 \reg, CP0_STATUS
+ ori \reg, \reg, 1
+ mtc0 \reg, CP0_STATUS
+ .endm
+
+ .macro local_irq_disable reg=t0
+ mfc0 \reg, CP0_STATUS
+ ori \reg, \reg, 1
+ xori \reg, \reg, 1
+ mtc0 \reg, CP0_STATUS
+ SSNOP; SSNOP; SSNOP
+ .endm
-#if defined (__MIPSEL__)
-#define FPU_RESTORE_SINGLE(thread,tmp) \
- lw tmp, (THREAD_FPU + 0x100)(thread); \
- lwc1 $f0, (THREAD_FPU + 0x000)(thread); \
- lwc1 $f1, (THREAD_FPU + 0x004)(thread); \
- lwc1 $f2, (THREAD_FPU + 0x010)(thread); \
- lwc1 $f3, (THREAD_FPU + 0x014)(thread); \
- lwc1 $f4, (THREAD_FPU + 0x020)(thread); \
- lwc1 $f5, (THREAD_FPU + 0x024)(thread); \
- lwc1 $f6, (THREAD_FPU + 0x030)(thread); \
- lwc1 $f7, (THREAD_FPU + 0x034)(thread); \
- lwc1 $f8, (THREAD_FPU + 0x040)(thread); \
- lwc1 $f9, (THREAD_FPU + 0x044)(thread); \
- lwc1 $f10, (THREAD_FPU + 0x050)(thread); \
- lwc1 $f11, (THREAD_FPU + 0x054)(thread); \
- lwc1 $f12, (THREAD_FPU + 0x060)(thread); \
- lwc1 $f13, (THREAD_FPU + 0x064)(thread); \
- lwc1 $f14, (THREAD_FPU + 0x070)(thread); \
- lwc1 $f15, (THREAD_FPU + 0x074)(thread); \
- lwc1 $f16, (THREAD_FPU + 0x080)(thread); \
- lwc1 $f17, (THREAD_FPU + 0x084)(thread); \
- lwc1 $f18, (THREAD_FPU + 0x090)(thread); \
- lwc1 $f19, (THREAD_FPU + 0x094)(thread); \
- lwc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
- lwc1 $f21, (THREAD_FPU + 0x0a4)(thread); \
- lwc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
- lwc1 $f23, (THREAD_FPU + 0x0b4)(thread); \
- lwc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
- lwc1 $f25, (THREAD_FPU + 0x0c4)(thread); \
- lwc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
- lwc1 $f27, (THREAD_FPU + 0x0d4)(thread); \
- lwc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
- lwc1 $f29, (THREAD_FPU + 0x0e4)(thread); \
- lwc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
- lwc1 $f31, (THREAD_FPU + 0x0f4)(thread); \
- ctc1 tmp, fcr31
-#elif defined (__MIPSEB__)
-#define FPU_RESTORE_SINGLE(thread,tmp) \
- lw tmp, (THREAD_FPU + 0x100)(thread); \
- lwc1 $f0, (THREAD_FPU + 0x004)(thread); \
- lwc1 $f1, (THREAD_FPU + 0x000)(thread); \
- lwc1 $f2, (THREAD_FPU + 0x014)(thread); \
- lwc1 $f3, (THREAD_FPU + 0x010)(thread); \
- lwc1 $f4, (THREAD_FPU + 0x024)(thread); \
- lwc1 $f5, (THREAD_FPU + 0x020)(thread); \
- lwc1 $f6, (THREAD_FPU + 0x034)(thread); \
- lwc1 $f7, (THREAD_FPU + 0x030)(thread); \
- lwc1 $f8, (THREAD_FPU + 0x044)(thread); \
- lwc1 $f9, (THREAD_FPU + 0x040)(thread); \
- lwc1 $f10, (THREAD_FPU + 0x054)(thread); \
- lwc1 $f11, (THREAD_FPU + 0x050)(thread); \
- lwc1 $f12, (THREAD_FPU + 0x064)(thread); \
- lwc1 $f13, (THREAD_FPU + 0x060)(thread); \
- lwc1 $f14, (THREAD_FPU + 0x074)(thread); \
- lwc1 $f15, (THREAD_FPU + 0x070)(thread); \
- lwc1 $f16, (THREAD_FPU + 0x084)(thread); \
- lwc1 $f17, (THREAD_FPU + 0x080)(thread); \
- lwc1 $f18, (THREAD_FPU + 0x094)(thread); \
- lwc1 $f19, (THREAD_FPU + 0x090)(thread); \
- lwc1 $f20, (THREAD_FPU + 0x0a4)(thread); \
- lwc1 $f21, (THREAD_FPU + 0x0a0)(thread); \
- lwc1 $f22, (THREAD_FPU + 0x0b4)(thread); \
- lwc1 $f23, (THREAD_FPU + 0x0b0)(thread); \
- lwc1 $f24, (THREAD_FPU + 0x0c4)(thread); \
- lwc1 $f25, (THREAD_FPU + 0x0c0)(thread); \
- lwc1 $f26, (THREAD_FPU + 0x0d4)(thread); \
- lwc1 $f27, (THREAD_FPU + 0x0d0)(thread); \
- lwc1 $f28, (THREAD_FPU + 0x0e4)(thread); \
- lwc1 $f29, (THREAD_FPU + 0x0e0)(thread); \
- lwc1 $f30, (THREAD_FPU + 0x0f4)(thread); \
- lwc1 $f31, (THREAD_FPU + 0x0f0)(thread); \
- ctc1 tmp, fcr31
+#ifdef CONFIG_CPU_SB1
+ .macro fpu_enable_hazard
+ .set push
+ .set noreorder
+ .set mips2
+ SSNOP
+ bnezl $0, .+4
+ SSNOP
+ .set pop
+ .endm
#else
-#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
+ .macro fpu_enable_hazard
+ .endm
#endif
-
-#define CPU_SAVE_NONSCRATCH(thread) \
- sw s0, THREAD_REG16(thread); \
- sw s1, THREAD_REG17(thread); \
- sw s2, THREAD_REG18(thread); \
- sw s3, THREAD_REG19(thread); \
- sw s4, THREAD_REG20(thread); \
- sw s5, THREAD_REG21(thread); \
- sw s6, THREAD_REG22(thread); \
- sw s7, THREAD_REG23(thread); \
- sw sp, THREAD_REG29(thread); \
- sw fp, THREAD_REG30(thread)
-
-#define CPU_RESTORE_NONSCRATCH(thread) \
- lw s0, THREAD_REG16(thread); \
- lw s1, THREAD_REG17(thread); \
- lw s2, THREAD_REG18(thread); \
- lw s3, THREAD_REG19(thread); \
- lw s4, THREAD_REG20(thread); \
- lw s5, THREAD_REG21(thread); \
- lw s6, THREAD_REG22(thread); \
- lw s7, THREAD_REG23(thread); \
- lw sp, THREAD_REG29(thread); \
- lw fp, THREAD_REG30(thread); \
- lw ra, THREAD_REG31(thread)
#endif /* _ASM_ASMMACRO_H */
diff -Nru a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
--- a/include/asm-mips/atomic.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/atomic.h Sun Aug 3 13:14:44 2003
@@ -9,17 +9,21 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 97, 99, 2000, 03 by Ralf Baechle
*/
-#ifndef __ASM_ATOMIC_H
-#define __ASM_ATOMIC_H
+#ifndef _ASM_ATOMIC_H
+#define _ASM_ATOMIC_H
#include <linux/config.h>
+#include <asm/system.h>
+
typedef struct { volatile int counter; } atomic_t;
+typedef struct { volatile __s64 counter; } atomic64_t;
#ifdef __KERNEL__
#define ATOMIC_INIT(i) { (i) }
+#define ATOMIC64_INIT(i) { (i) }
/*
* atomic_read - read atomic variable
@@ -28,7 +32,14 @@
* Atomically reads the value of @v. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-#define atomic_read(v) ((v)->counter)
+#define atomic_read(v) ((v)->counter)
+
+/*
+ * atomic64_read - read atomic variable
+ * @v: pointer of type atomic64_t
+ *
+ */
+#define atomic64_read(v) ((v)->counter)
/*
* atomic_set - set atomic variable
@@ -38,11 +49,16 @@
* Atomically sets the value of @v to @i. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-#define atomic_set(v,i) ((v)->counter = (i))
+#define atomic_set(v,i) ((v)->counter = (i))
-#ifndef CONFIG_CPU_HAS_LLSC
+/*
+ * atomic64_set - set atomic variable
+ * @v: pointer of type atomic64_t
+ * @i: required value
+ */
+#define atomic64_set(v,i) ((v)->counter = (i))
-#include <asm/system.h>
+#ifndef CONFIG_CPU_HAS_LLSC
/*
* The MIPS I implementation is only atomic with respect to
@@ -55,7 +71,7 @@
* Atomically adds @i to @v. Note that the guaranteed useful range
* of an atomic_t is only 24 bits.
*/
-extern __inline__ void atomic_add(int i, atomic_t * v)
+static __inline__ void atomic_add(int i, atomic_t * v)
{
unsigned long flags;
@@ -72,7 +88,7 @@
* Atomically subtracts @i from @v. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-extern __inline__ void atomic_sub(int i, atomic_t * v)
+static __inline__ void atomic_sub(int i, atomic_t * v)
{
unsigned long flags;
@@ -81,7 +97,7 @@
local_irq_restore(flags);
}
-extern __inline__ int atomic_add_return(int i, atomic_t * v)
+static __inline__ int atomic_add_return(int i, atomic_t * v)
{
unsigned long flags;
int temp;
@@ -95,7 +111,7 @@
return temp;
}
-extern __inline__ int atomic_sub_return(int i, atomic_t * v)
+static __inline__ int atomic_sub_return(int i, atomic_t * v)
{
unsigned long flags;
int temp;
@@ -124,17 +140,17 @@
* Atomically adds @i to @v. Note that the guaranteed useful range
* of an atomic_t is only 24 bits.
*/
-extern __inline__ void atomic_add(int i, atomic_t * v)
+static __inline__ void atomic_add(int i, atomic_t * v)
{
unsigned long temp;
__asm__ __volatile__(
- "1: ll %0, %1 # atomic_add\n"
- " addu %0, %2 \n"
- " sc %0, %1 \n"
- " beqz %0, 1b \n"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
+ "1: ll %0, %1 # atomic_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
}
/*
@@ -145,67 +161,227 @@
* Atomically subtracts @i from @v. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-extern __inline__ void atomic_sub(int i, atomic_t * v)
+static __inline__ void atomic_sub(int i, atomic_t * v)
+{
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ " .set noreorder # atomic_sub \n"
+ "1: ll %0, %1 \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ " .set reorder \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+}
+
+/*
+ * Same as above, but return the result value
+ */
+static __inline__ int atomic_add_return(int i, atomic_t * v)
+{
+ unsigned long temp, result;
+
+ __asm__ __volatile__(
+ " .set noreorder # atomic_add_return \n"
+ "1: ll %1, %2 \n"
+ " addu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+
+ return result;
+}
+
+static __inline__ int atomic_sub_return(int i, atomic_t * v)
+{
+ unsigned long temp, result;
+
+ __asm__ __volatile__(
+ " .set noreorder # atomic_sub_return \n"
+ "1: ll %1, %2 \n"
+ " subu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+
+ return result;
+}
+#endif
+
+#ifndef CONFIG_CPU_HAS_LLDSCD
+
+/*
+ * This implementation is only atomic with respect to interrupts. It can't
+ * be used on SMP
+ *
+ * atomic64_add - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically adds @i to @v.
+ */
+static __inline__ void atomic64_add(int i, atomic64_t * v)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+/*
+ * atomic64_sub - subtract the atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically subtracts @i from @v.
+ */
+static __inline__ void atomic64_sub(int i, atomic64_t * v)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+
+static __inline__ int atomic64_add_return(int i, atomic64_t * v)
+{
+ unsigned long flags;
+ int temp;
+
+ local_irq_save(flags);
+ temp = v->counter;
+ temp += i;
+ v->counter = temp;
+ local_irq_restore(flags);
+
+ return temp;
+}
+
+static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
+{
+ unsigned long flags;
+ int temp;
+
+ local_irq_save(flags);
+ temp = v->counter;
+ temp -= i;
+ v->counter = temp;
+ local_irq_restore(flags);
+
+ return temp;
+}
+
+#else
+
+/*
+ * ... while for MIPS III and better we can use ll/sc instruction. This
+ * implementation is SMP safe ...
+ */
+
+/*
+ * atomic64_add - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically adds @i to @v.
+ */
+static __inline__ void atomic64_add(int i, atomic64_t * v)
+{
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %0, %1 # atomic64_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+}
+
+/*
+ * atomic64_sub - subtract the atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically subtracts @i from @v.
+ */
+static __inline__ void atomic64_sub(int i, atomic64_t * v)
{
unsigned long temp;
__asm__ __volatile__(
- "1: ll %0, %1 # atomic_sub\n"
- " subu %0, %2 \n"
- " sc %0, %1 \n"
- " beqz %0, 1b \n"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
+ " .set noreorder # atomic64_sub \n"
+ "1: ll %0, %1 \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ " .set reorder \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
}
/*
* Same as above, but return the result value
*/
-extern __inline__ int atomic_add_return(int i, atomic_t * v)
+static __inline__ int atomic64_add_return(int i, atomic64_t * v)
{
unsigned long temp, result;
__asm__ __volatile__(
- ".set push # atomic_add_return\n"
- ".set noreorder \n"
- "1: ll %1, %2 \n"
- " addu %0, %1, %3 \n"
- " sc %0, %2 \n"
- " beqz %0, 1b \n"
- " addu %0, %1, %3 \n"
- " sync \n"
- ".set pop \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ " .set noreorder # atomic64_add_return \n"
+ "1: ll %1, %2 \n"
+ " addu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
return result;
}
-extern __inline__ int atomic_sub_return(int i, atomic_t * v)
+static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
{
unsigned long temp, result;
__asm__ __volatile__(
- ".set push \n"
- ".set noreorder # atomic_sub_return\n"
- "1: ll %1, %2 \n"
- " subu %0, %1, %3 \n"
- " sc %0, %2 \n"
- " beqz %0, 1b \n"
- " subu %0, %1, %3 \n"
- " sync \n"
- ".set pop \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ " .set noreorder # atomic64_sub_return \n"
+ "1: ll %1, %2 \n"
+ " subu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
return result;
}
#endif
#define atomic_dec_return(v) atomic_sub_return(1,(v))
+#define atomic64_dec_return(v) atomic64_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
+#define atomic64_inc_return(v) atomic64_add_return(1,(v))
/*
* atomic_sub_and_test - subtract value from variable and test result
@@ -220,6 +396,17 @@
#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
/*
+ * atomic64_sub_and_test - subtract value from variable and test result
+ * @i: integer value to subtract
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically subtracts @i from @v and returns
+ * true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0)
+
+/*
* atomic_inc_and_test - increment and test
* @v: pointer of type atomic_t
*
@@ -231,6 +418,16 @@
#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
/*
+ * atomic64_inc_and_test - increment and test
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
+
+/*
* atomic_dec_and_test - decrement by 1 and test
* @v: pointer of type atomic_t
*
@@ -242,6 +439,16 @@
#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
/*
+ * atomic64_dec_and_test - decrement by 1 and test
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically decrements @v by 1 and
+ * returns true if the result is 0, or false for all other
+ * cases.
+ */
+#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
+
+/*
* atomic_inc - increment atomic variable
* @v: pointer of type atomic_t
*
@@ -251,6 +458,14 @@
#define atomic_inc(v) atomic_add(1,(v))
/*
+ * atomic64_inc - increment atomic variable
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically increments @v by 1.
+ */
+#define atomic64_inc(v) atomic64_add(1,(v))
+
+/*
* atomic_dec - decrement and test
* @v: pointer of type atomic_t
*
@@ -260,6 +475,14 @@
#define atomic_dec(v) atomic_sub(1,(v))
/*
+ * atomic64_dec - decrement and test
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically decrements @v by 1.
+ */
+#define atomic64_dec(v) atomic64_sub(1,(v))
+
+/*
* atomic_add_negative - add and test if negative
* @v: pointer of type atomic_t
* @i: integer value to add
@@ -271,6 +494,17 @@
*/
#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
+/*
+ * atomic64_add_negative - add and test if negative
+ * @v: pointer of type atomic64_t
+ * @i: integer value to add
+ *
+ * Atomically adds @i to @v and returns true
+ * if the result is negative, or false when
+ * result is greater than or equal to zero.
+ */
+#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0)
+
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() smp_mb()
#define smp_mb__after_atomic_dec() smp_mb()
@@ -279,4 +513,4 @@
#endif /* defined(__KERNEL__) */
-#endif /* __ASM_ATOMIC_H */
+#endif /* _ASM_ATOMIC_H */
diff -Nru a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
--- a/include/asm-mips/bitops.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/bitops.h Sun Aug 3 13:14:45 2003
@@ -4,7 +4,7 @@
* for more details.
*
* Copyright (c) 1994 - 1997, 1999, 2000 Ralf Baechle (ralf@gnu.org)
- * Copyright (c) 2000 Silicon Graphics, Inc.
+ * Copyright (c) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_BITOPS_H
#define _ASM_BITOPS_H
@@ -17,9 +17,13 @@
#if (_MIPS_SZLONG == 32)
#define SZLONG_LOG 5
#define SZLONG_MASK 31UL
+#define __LL "ll"
+#define __SC "sc"
#elif (_MIPS_SZLONG == 64)
#define SZLONG_LOG 6
-#define SZLONG_MASK 63UL
+#define SZLONG_MASK 63UL
+#define __LL "lld"
+#define __SC "scd"
#endif
#ifdef __KERNEL__
@@ -67,18 +71,18 @@
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-static __inline__ void set_bit(int nr, volatile unsigned long *addr)
+static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp;
__asm__ __volatile__(
- "1:\tll\t%0, %1\t\t# set_bit\n\t"
+ "1:\t" __LL "\t%0, %1\t\t# set_bit\n\t"
"or\t%0, %2\n\t"
- "sc\t%0, %1\n\t"
+ __SC "\t%0, %1\n\t"
"beqz\t%0, 1b"
: "=&r" (temp), "=m" (*m)
- : "ir" (1UL << (nr & 0x1f)), "m" (*m));
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
}
/*
@@ -90,11 +94,11 @@
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static __inline__ void __set_bit(int nr, volatile unsigned long * addr)
+static inline void __set_bit(unsigned long nr, volatile unsigned long * addr)
{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- *m |= 1UL << (nr & 31);
+ *m |= 1UL << (nr & SZLONG_MASK);
}
/*
@@ -107,18 +111,18 @@
* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
* in order to ensure changes are visible on other processors.
*/
-static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
+static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp;
__asm__ __volatile__(
- "1:\tll\t%0, %1\t\t# clear_bit\n\t"
+ "1:\t" __LL "\t%0, %1\t\t# clear_bit\n\t"
"and\t%0, %2\n\t"
- "sc\t%0, %1\n\t"
+ __SC "\t%0, %1\n\t"
"beqz\t%0, 1b\n\t"
: "=&r" (temp), "=m" (*m)
- : "ir" (~(1UL << (nr & 0x1f))), "m" (*m));
+ : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
}
/*
@@ -130,34 +134,34 @@
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static __inline__ void __clear_bit(int nr, volatile unsigned long * addr)
+static inline void __clear_bit(unsigned long nr, volatile unsigned long * addr)
{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- *m &= ~(1UL << (nr & 31));
+ *m &= ~(1UL << (nr & SZLONG_MASK));
}
/*
* change_bit - Toggle a bit in memory
- * @nr: Bit to clear
+ * @nr: Bit to change
* @addr: Address to start counting from
*
* change_bit() is atomic and may not be reordered.
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-static __inline__ void change_bit(int nr, volatile unsigned long *addr)
+static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp;
__asm__ __volatile__(
- "1:\tll\t%0, %1\t\t# change_bit\n\t"
+ "1:\t" __LL "\t%0, %1\t\t# change_bit\n\t"
"xor\t%0, %2\n\t"
- "sc\t%0, %1\n\t"
+ __SC "\t%0, %1\n\t"
"beqz\t%0, 1b"
: "=&r" (temp), "=m" (*m)
- : "ir" (1UL << (nr & 0x1f)), "m" (*m));
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
}
/*
@@ -169,11 +173,11 @@
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static __inline__ void __change_bit(int nr, volatile unsigned long * addr)
+static inline void __change_bit(unsigned long nr, volatile unsigned long * addr)
{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- *m ^= 1UL << (nr & 31);
+ *m ^= 1UL << (nr & SZLONG_MASK);
}
/*
@@ -184,17 +188,17 @@
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr)
+static inline int test_and_set_bit(unsigned long nr,
+ volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
- unsigned long temp;
- int res;
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
__asm__ __volatile__(
".set\tnoreorder\t\t# test_and_set_bit\n"
- "1:\tll\t%0, %1\n\t"
+ "1:\t" __LL "\t%0, %1\n\t"
"or\t%2, %0, %3\n\t"
- "sc\t%2, %1\n\t"
+ __SC "\t%2, %1\n\t"
"beqz\t%2, 1b\n\t"
" and\t%2, %0, %3\n\t"
#ifdef CONFIG_SMP
@@ -202,7 +206,7 @@
#endif
".set\treorder"
: "=&r" (temp), "=m" (*m), "=&r" (res)
- : "r" (1UL << (nr & 0x1f)), "m" (*m)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
: "memory");
return res != 0;
@@ -217,14 +221,15 @@
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * addr)
+static inline int __test_and_set_bit(unsigned long nr,
+ volatile unsigned long *addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
retval = (mask & *a) != 0;
*a |= mask;
@@ -239,17 +244,18 @@
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
+static inline int test_and_clear_bit(unsigned long nr,
+ volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp, res;
__asm__ __volatile__(
".set\tnoreorder\t\t# test_and_clear_bit\n"
- "1:\tll\t%0, %1\n\t"
+ "1:\t" __LL "\t%0, %1\n\t"
"or\t%2, %0, %3\n\t"
"xor\t%2, %3\n\t"
- "sc\t%2, %1\n\t"
+ __SC "\t%2, %1\n\t"
"beqz\t%2, 1b\n\t"
" and\t%2, %0, %3\n\t"
#ifdef CONFIG_SMP
@@ -257,7 +263,7 @@
#endif
".set\treorder"
: "=&r" (temp), "=m" (*m), "=&r" (res)
- : "r" (1UL << (nr & 0x1f)), "m" (*m)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
: "memory");
return res != 0;
@@ -272,15 +278,16 @@
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static __inline__ int __test_and_clear_bit(int nr,
+static inline int __test_and_clear_bit(unsigned long nr,
volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
- unsigned long mask, retval;
+ unsigned long mask;
+ int retval;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
- retval = (mask & *a) != 0;
+ a += (nr >> SZLONG_LOG);
+ mask = 1UL << (nr & SZLONG_MASK);
+ retval = ((mask & *a) != 0);
*a &= ~mask;
return retval;
@@ -294,16 +301,17 @@
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
+static inline int test_and_change_bit(unsigned long nr,
+ volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp, res;
__asm__ __volatile__(
".set\tnoreorder\t\t# test_and_change_bit\n"
- "1:\tll\t%0, %1\n\t"
+ "1:\t" __LL "\t%0, %1\n\t"
"xor\t%2, %0, %3\n\t"
- "sc\t%2, %1\n\t"
+ __SC "\t%2, %1\n\t"
"beqz\t%2, 1b\n\t"
" and\t%2, %0, %3\n\t"
#ifdef CONFIG_SMP
@@ -311,7 +319,7 @@
#endif
".set\treorder"
: "=&r" (temp), "=m" (*m), "=&r" (res)
- : "r" (1UL << (nr & 0x1f)), "m" (*m)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
: "memory");
return res != 0;
@@ -326,16 +334,16 @@
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static __inline__ int __test_and_change_bit(int nr,
+static inline int __test_and_change_bit(unsigned long nr,
volatile unsigned long *addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
- retval = (mask & *a) != 0;
+ a += (nr >> SZLONG_LOG);
+ mask = 1UL << (nr & SZLONG_MASK);
+ retval = ((mask & *a) != 0);
*a ^= mask;
return retval;
@@ -353,14 +361,14 @@
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-static __inline__ void set_bit(int nr, volatile unsigned long * addr)
+static inline void set_bit(unsigned long nr, volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
__bi_flags;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
__bi_local_irq_save(flags);
*a |= mask;
__bi_local_irq_restore(flags);
@@ -375,13 +383,13 @@
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static __inline__ void __set_bit(int nr, volatile unsigned long * addr)
+static inline void __set_bit(unsigned long nr, volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
*a |= mask;
}
@@ -395,26 +403,26 @@
* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
* in order to ensure changes are visible on other processors.
*/
-static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
+static inline void clear_bit(unsigned long nr, volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
__bi_flags;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
__bi_local_irq_save(flags);
*a &= ~mask;
__bi_local_irq_restore(flags);
}
-static __inline__ void __clear_bit(int nr, volatile unsigned long * addr)
+static inline void __clear_bit(unsigned long nr, volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
*a &= ~mask;
}
@@ -427,14 +435,14 @@
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-static __inline__ void change_bit(int nr, volatile unsigned long * addr)
+static inline void change_bit(unsigned long nr, volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
__bi_flags;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
__bi_local_irq_save(flags);
*a ^= mask;
__bi_local_irq_restore(flags);
@@ -449,11 +457,11 @@
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static __inline__ void __change_bit(int nr, volatile unsigned long * addr)
+static inline void __change_bit(unsigned long nr, volatile unsigned long * addr)
{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
+ unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- *m ^= 1UL << (nr & 31);
+ *m ^= 1UL << (nr & SZLONG_MASK);
}
/*
@@ -464,15 +472,16 @@
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
+static inline int test_and_set_bit(unsigned long nr,
+ volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
__bi_flags;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
__bi_local_irq_save(flags);
retval = (mask & *a) != 0;
*a |= mask;
@@ -490,14 +499,15 @@
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * addr)
+static inline int __test_and_set_bit(unsigned long nr,
+ volatile unsigned long *addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
retval = (mask & *a) != 0;
*a |= mask;
@@ -512,15 +522,16 @@
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
+static inline int test_and_clear_bit(unsigned long nr,
+ volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
__bi_flags;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
__bi_local_irq_save(flags);
retval = (mask & *a) != 0;
*a &= ~mask;
@@ -538,16 +549,16 @@
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static __inline__ int __test_and_clear_bit(int nr,
+static inline int __test_and_clear_bit(unsigned long nr,
volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
- retval = (mask & *a) != 0;
+ a += (nr >> SZLONG_LOG);
+ mask = 1UL << (nr & SZLONG_MASK);
+ retval = ((mask & *a) != 0);
*a &= ~mask;
return retval;
@@ -561,14 +572,15 @@
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
+static inline int test_and_change_bit(unsigned long nr,
+ volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask, retval;
__bi_flags;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
__bi_local_irq_save(flags);
retval = (mask & *a) != 0;
*a ^= mask;
@@ -586,15 +598,15 @@
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static __inline__ int __test_and_change_bit(int nr,
+static inline int __test_and_change_bit(unsigned long nr,
volatile unsigned long * addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
+ a += (nr >> SZLONG_LOG);
+ mask = 1 << (nr & SZLONG_MASK);
retval = (mask & *a) != 0;
*a ^= mask;
@@ -613,7 +625,7 @@
* @nr: bit number to test
* @addr: Address to start counting from
*/
-static inline int test_bit(int nr, const volatile unsigned long *addr)
+static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
{
return 1UL & (((const volatile unsigned long *) addr)[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
}
@@ -624,16 +636,26 @@
*
* Undefined if no zero exists, so code should check against ~0UL first.
*/
-static __inline__ unsigned long ffz(unsigned long word)
+static inline unsigned long ffz(unsigned long word)
{
int b = 0, s;
word = ~word;
+#ifdef CONFIG_MIPS32
s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
s = 1; if (word << 31 != 0) s = 0; b += s;
+#endif
+#ifdef CONFIG_MIPS64
+ s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
+ s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
+ s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
+ s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
+ s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
+ s = 1; if (word << 63 != 0) s = 0; b += s;
+#endif
return b;
}
@@ -644,7 +666,7 @@
*
* Undefined if no bit exists, so code should check against 0 first.
*/
-static __inline__ unsigned long __ffs(unsigned long word)
+static inline unsigned long __ffs(unsigned long word)
{
return ffz(~word);
}
@@ -763,23 +785,30 @@
/*
* Every architecture must define this function. It's the fastest
- * way of searching a 168-bit bitmap where the first 128 bits are
- * unlikely to be set. It's guaranteed that at least one of the 168
+ * way of searching a 140-bit bitmap where the first 100 bits are
+ * unlikely to be set. It's guaranteed that at least one of the 140
* bits is cleared.
*/
static inline int sched_find_first_bit(unsigned long *b)
{
+#ifdef CONFIG_MIPS32
if (unlikely(b[0]))
return __ffs(b[0]);
if (unlikely(b[1]))
return __ffs(b[1]) + 32;
if (unlikely(b[2]))
return __ffs(b[2]) + 64;
- if (unlikely(b[3]))
+ if (b[3])
return __ffs(b[3]) + 96;
- if (b[4])
- return __ffs(b[4]) + 128;
- return __ffs(b[5]) + 32 + 128;
+ return __ffs(b[4]) + 128;
+#endif
+#ifdef CONFIG_MIPS64
+ if (unlikely(b[0]))
+ return __ffs(b[0]);
+ if (unlikely(b[1]))
+ return __ffs(b[1]) + 64;
+ return __ffs(b[2]) + 128;
+#endif
}
/*
@@ -800,9 +829,9 @@
* The Hamming Weight of a number is the total number of bits set in it.
*/
-#define hweight32(x) generic_hweight32(x)
-#define hweight16(x) generic_hweight16(x)
-#define hweight8(x) generic_hweight8(x)
+#define hweight32(x) generic_hweight32(x)
+#define hweight16(x) generic_hweight16(x)
+#define hweight8(x) generic_hweight8(x)
static inline int __test_and_set_le_bit(unsigned long nr, unsigned long *addr)
{
@@ -858,15 +887,15 @@
static inline unsigned long find_next_zero_le_bit(unsigned long *addr,
unsigned long size, unsigned long offset)
{
- unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
- unsigned int result = offset & ~31;
+ unsigned int *p = ((unsigned int *) addr) + (offset >> SZLONG_LOG);
+ unsigned int result = offset & ~SZLONG_MASK;
unsigned int tmp;
if (offset >= size)
return size;
size -= result;
- offset &= 31;
+ offset &= SZLONG_MASK;
if (offset) {
tmp = cpu_to_le32p(p++);
tmp |= ~0U >> (32-offset); /* bug or feature ? */
diff -Nru a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
--- a/include/asm-mips/bugs.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/bugs.h Sun Aug 3 13:14:50 2003
@@ -4,9 +4,20 @@
* Needs:
* void check_bugs(void);
*/
-#ifndef __ASM_BUGS_H
-#define __ASM_BUGS_H
+#ifndef _ASM_BUGS_H
+#define _ASM_BUGS_H
-extern void check_bugs(void);
+#include <linux/config.h>
-#endif /* __ASM_BUGS_H */
+extern void check_bugs32(void);
+extern void check_bugs64(void);
+
+static inline void check_bugs(void)
+{
+ check_bugs32();
+#ifdef CONFIG_MIPS64
+ check_bugs64();
+#endif
+}
+
+#endif /* _ASM_BUGS_H */
diff -Nru a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
--- a/include/asm-mips/byteorder.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-mips/byteorder.h Sun Aug 3 13:14:49 2003
@@ -3,10 +3,10 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) by Ralf Baechle
+ * Copyright (C) 1996, 99, 2003 by Ralf Baechle
*/
-#ifndef _MIPS_BYTEORDER_H
-#define _MIPS_BYTEORDER_H
+#ifndef _ASM_BYTEORDER_H
+#define _ASM_BYTEORDER_H
#include <asm/types.h>
@@ -27,4 +27,4 @@
# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
#endif
-#endif /* _MIPS_BYTEORDER_H */
+#endif /* _ASM_BYTEORDER_H */
diff -Nru a/include/asm-mips/cachectl.h b/include/asm-mips/cachectl.h
--- a/include/asm-mips/cachectl.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/cachectl.h Sun Aug 3 13:14:50 2003
@@ -1,10 +1,12 @@
/*
- * cachectl.h -- defines for MIPS cache control system calls
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle
*/
-#ifndef __ASM_MIPS_CACHECTL
-#define __ASM_MIPS_CACHECTL
+#ifndef _ASM_CACHECTL
+#define _ASM_CACHECTL
/*
* Options for cacheflush system call
@@ -21,4 +23,4 @@
#define CACHEABLE 0 /* make pages cacheable */
#define UNCACHEABLE 1 /* make pages uncacheable */
-#endif /* __ASM_MIPS_CACHECTL */
+#endif /* _ASM_CACHECTL */
diff -Nru a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h
--- a/include/asm-mips/cacheflush.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/cacheflush.h Sun Aug 3 13:14:51 2003
@@ -6,8 +6,8 @@
* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
* Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
*/
-#ifndef __ASM_CACHEFLUSH_H
-#define __ASM_CACHEFLUSH_H
+#ifndef _ASM_CACHEFLUSH_H
+#define _ASM_CACHEFLUSH_H
#include <linux/config.h>
@@ -62,4 +62,4 @@
#define ClearPageDcacheDirty(page) \
clear_bit(PG_dcache_dirty, &(page)->flags)
-#endif /* __ASM_CACHEFLUSH_H */
+#endif /* _ASM_CACHEFLUSH_H */
diff -Nru a/include/asm-mips/cacheops.h b/include/asm-mips/cacheops.h
--- a/include/asm-mips/cacheops.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/cacheops.h Sun Aug 3 13:14:46 2003
@@ -23,14 +23,14 @@
#define Hit_Invalidate_I 0x10
#define Hit_Invalidate_D 0x11
#define Hit_Writeback_Inv_D 0x15
-#define Hit_Writeback_I 0x18
-#define Hit_Writeback_D 0x19
/*
* R4000-specific cacheops
*/
#define Create_Dirty_Excl_D 0x0d
#define Fill 0x14
+#define Hit_Writeback_I 0x18
+#define Hit_Writeback_D 0x19
/*
* R4000SC and R4400SC-specific cacheops
diff -Nru a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
--- a/include/asm-mips/checksum.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/checksum.h Sun Aug 3 13:14:45 2003
@@ -3,14 +3,19 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997, 1998, 2001 by Ralf Baechle
+ * Copyright (C) 1995, 96, 97, 98, 99, 2001 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2001 Thiemo Seufer.
+ * Copyright (C) 2002 Maciej W. Rozycki
*/
#ifndef _ASM_CHECKSUM_H
#define _ASM_CHECKSUM_H
-#include <asm/uaccess.h>
+#include <linux/config.h>
#include <linux/in6.h>
+#include <asm/uaccess.h>
+
/*
* computes the checksum of a memory block at buff, length len,
* and adds in "sum" (32-bit)
@@ -87,19 +92,18 @@
static inline unsigned short ip_fast_csum(unsigned char *iph,
unsigned int ihl)
{
- unsigned int sum;
- unsigned long dummy;
+ unsigned int dummy, sum;
/*
- * This is for 32-bit MIPS processors.
+ * This is for 32-bit processors ... but works just fine for 64-bit
+ * processors for now ... XXX
*/
__asm__ __volatile__(
".set\tnoreorder\t\t\t# ip_fast_csum\n\t"
".set\tnoat\n\t"
"lw\t%0, (%1)\n\t"
"subu\t%2, 4\n\t"
- "#blez\t%2, 2f\n\t"
- " sll\t%2, 2\n\t"
+ "sll\t%2, 2\n\t"
"lw\t%3, 4(%1)\n\t"
"addu\t%2, %1\n\t"
"addu\t%0, %3\n\t"
@@ -133,14 +137,13 @@
* computes the checksum of the TCP/UDP pseudo-header
* returns a 16-bit checksum, already complemented
*/
-static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
- unsigned long daddr,
- unsigned short len,
- unsigned short proto,
- unsigned int sum)
+static inline unsigned int csum_tcpudp_nofold(unsigned int saddr,
+ unsigned int daddr, unsigned short len, unsigned short proto,
+ unsigned int sum)
{
__asm__(
".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t"
+#ifdef CONFIG_MIPS32
"addu\t%0, %2\n\t"
"sltu\t$1, %0, %2\n\t"
"addu\t%0, $1\n\t"
@@ -152,6 +155,15 @@
"addu\t%0, %4\n\t"
"sltu\t$1, %0, %4\n\t"
"addu\t%0, $1\n\t"
+#endif
+#ifdef CONFIG_MIPS64
+ "daddu\t%0, %2\n\t"
+ "daddu\t%0, %3\n\t"
+ "daddu\t%0, %4\n\t"
+ "dsll32\t$1, %0, 0\n\t"
+ "daddu\t%0, $1\n\t"
+ "dsrl32\t%0, %0, 0\n\t"
+#endif
".set\tat"
: "=r" (sum)
: "0" (daddr), "r"(saddr),
diff -Nru a/include/asm-mips/compat.h b/include/asm-mips/compat.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/compat.h Sun Aug 3 13:14:50 2003
@@ -0,0 +1,141 @@
+#ifndef _ASM_COMPAT_H
+#define _ASM_COMPAT_H
+/*
+ * Architecture specific compatibility types
+ */
+#include <linux/types.h>
+#include <asm/page.h>
+
+#define COMPAT_USER_HZ 100
+
+typedef u32 compat_size_t;
+typedef s32 compat_ssize_t;
+typedef s32 compat_time_t;
+typedef s32 compat_clock_t;
+typedef s32 compat_suseconds_t;
+
+typedef s32 compat_pid_t;
+typedef s32 compat_uid_t;
+typedef s32 compat_gid_t;
+typedef u32 compat_mode_t;
+typedef u32 compat_ino_t;
+typedef u32 compat_dev_t;
+typedef s32 compat_off_t;
+typedef s64 compat_loff_t;
+typedef u32 compat_nlink_t;
+typedef s32 compat_ipc_pid_t;
+typedef s32 compat_daddr_t;
+typedef s32 compat_caddr_t;
+typedef struct {
+ s32 val[2];
+} compat_fsid_t;
+
+typedef s32 compat_int_t;
+typedef s32 compat_long_t;
+typedef u32 compat_uint_t;
+typedef u32 compat_ulong_t;
+
+struct compat_timespec {
+ compat_time_t tv_sec;
+ s32 tv_nsec;
+};
+
+struct compat_timeval {
+ compat_time_t tv_sec;
+ s32 tv_usec;
+};
+
+struct compat_stat {
+ compat_dev_t st_dev;
+ s32 st_pad1[3];
+ compat_ino_t st_ino;
+ compat_mode_t st_mode;
+ compat_nlink_t st_nlink;
+ compat_uid_t st_uid;
+ compat_gid_t st_gid;
+ compat_dev_t st_rdev;
+ s32 st_pad2[2];
+ compat_off_t st_size;
+ s32 st_pad3;
+ compat_time_t st_atime;
+ s32 st_atime_nsec;
+ compat_time_t st_mtime;
+ s32 st_mtime_nsec;
+ compat_time_t st_ctime;
+ s32 st_ctime_nsec;
+ s32 st_blksize;
+ s32 st_blocks;
+ s32 st_pad4[14];
+};
+
+struct compat_flock {
+ short l_type;
+ short l_whence;
+ compat_off_t l_start;
+ compat_off_t l_len;
+ s32 l_sysid;
+ compat_pid_t l_pid;
+ short __unused;
+ s32 pad[4];
+};
+
+#define F_GETLK64 33
+#define F_SETLK64 34
+#define F_SETLKW64 35
+
+struct compat_flock64 {
+ short l_type;
+ short l_whence;
+ compat_loff_t l_start;
+ compat_loff_t l_len;
+ compat_pid_t l_pid;
+};
+
+struct compat_statfs {
+ int f_type;
+ int f_bsize;
+ int f_frsize;
+ int f_blocks;
+ int f_bfree;
+ int f_files;
+ int f_ffree;
+ int f_bavail;
+ compat_fsid_t f_fsid;
+ int f_namelen;
+ int f_spare[6];
+};
+
+#define COMPAT_RLIM_INFINITY 0x7fffffffUL
+
+typedef u32 compat_old_sigset_t; /* at least 32 bits */
+
+#define _COMPAT_NSIG 128 /* Don't ask !$@#% ... */
+#define _COMPAT_NSIG_BPW 32
+
+typedef u32 compat_sigset_word;
+
+#define COMPAT_OFF_T_MAX 0x7fffffff
+#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
+
+/*
+ * A pointer passed in from user mode. This should not
+ * be used for syscall parameters, just declare them
+ * as pointers because the syscall entry code will have
+ * appropriately comverted them already.
+ */
+typedef u32 compat_uptr_t;
+
+static inline void *compat_ptr(compat_uptr_t uptr)
+{
+ return (void *)(long)uptr;
+}
+
+static inline void *compat_alloc_user_space(long len)
+{
+ unsigned long sp = (unsigned long) current_thread_info() +
+ THREAD_SIZE - 32;
+
+ return (void *) (sp - len);
+}
+
+#endif /* _ASM_COMPAT_H */
diff -Nru a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h
--- a/include/asm-mips/dec/prom.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/dec/prom.h Sun Aug 3 13:14:47 2003
@@ -12,8 +12,8 @@
*
* Based on arch/mips/dec/prom/prom.h by the Anonymous.
*/
-#ifndef __ASM_MIPS_DEC_PROM_H
-#define __ASM_MIPS_DEC_PROM_H
+#ifndef _ASM_DEC_PROM_H
+#define _ASM_DEC_PROM_H
#include <linux/types.h>
@@ -166,4 +166,4 @@
extern void prom_identify_arch(u32);
extern void prom_init_cmdline(s32, s32 *, u32);
-#endif /* __ASM_MIPS_DEC_PROM_H */
+#endif /* _ASM_DEC_PROM_H */
diff -Nru a/include/asm-mips/delay.h b/include/asm-mips/delay.h
--- a/include/asm-mips/delay.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/delay.h Sun Aug 3 13:14:52 2003
@@ -4,7 +4,8 @@
* for more details.
*
* Copyright (C) 1994 by Waldorf Electronics
- * Copyright (C) 1995 - 1998, 2001 by Ralf Baechle
+ * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_DELAY_H
#define _ASM_DELAY_H
@@ -14,18 +15,27 @@
extern unsigned long loops_per_jiffy;
-extern __inline__ void
-__delay(unsigned long loops)
+static inline void __delay(unsigned long loops)
{
- __asm__ __volatile__ (
+ if (sizeof(long) == 4)
+ __asm__ __volatile__ (
".set\tnoreorder\n"
"1:\tbnez\t%0,1b\n\t"
"subu\t%0,1\n\t"
".set\treorder"
+ : "=r" (loops)
+ : "0" (loops));
+ else if (sizeof(long) == 8)
+ __asm__ __volatile__ (
+ ".set\tnoreorder\n"
+ "1:\tbnez\t%0,1b\n\t"
+ "dsubu\t%0,1\n\t"
+ ".set\treorder"
:"=r" (loops)
:"0" (loops));
}
+
/*
* Division by multiplication: you don't have to worry about
* loss of precision.
@@ -36,18 +46,35 @@
* first constant multiplications gets optimized away if the delay is
* a constant)
*/
-extern __inline__ void __udelay(unsigned long usecs, unsigned long lpj)
+
+static inline void __udelay(unsigned long usecs, unsigned long lpj)
{
unsigned long lo;
/*
- * Excessive precission? Probably ...
+ * The common rates of 1000 and 128 are rounded wrongly by the
+ * catchall case for 64-bit. Excessive precission? Probably ...
*/
+#if defined(CONFIG_MIPS64) && (HZ == 128)
+ usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
+#elif defined(CONFIG_MIPS64) && (HZ == 1000)
+ usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */
+#elif defined(CONFIG_MIPS64)
+ usecs *= (0x8000000000000000UL / (500000 / HZ));
+#else /* 32-bit junk follows here */
usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
0x80000000ULL) >> 32);
- __asm__("multu\t%2,%3"
- :"=h" (usecs), "=l" (lo)
- :"r" (usecs),"r" (lpj));
+#endif
+
+ if (sizeof(long) == 4)
+ __asm__("multu\t%2, %3"
+ : "=h" (usecs), "=l" (lo)
+ : "r" (usecs),"r" (lpj));
+ else if (sizeof(long) == 8)
+ __asm__("dmultu\t%2, %3"
+ : "=h" (usecs), "=l" (lo)
+ : "r" (usecs),"r" (lpj));
+
__delay(usecs);
}
diff -Nru a/include/asm-mips/div64.h b/include/asm-mips/div64.h
--- a/include/asm-mips/div64.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/div64.h Sun Aug 3 13:14:50 2003
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2000 Maciej W. Rozycki
+ * Copyright (C) 2000 Maciej W. Rozycki
+ * Copyright (C) 2003 Ralf Baechle
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -8,6 +9,8 @@
#ifndef _ASM_DIV64_H
#define _ASM_DIV64_H
+#if (_MIPS_SZLONG == 32)
+
/*
* No traps on overflows for any of these...
*/
@@ -72,5 +75,50 @@
__quot = __quot << 32 | __low; \
(n) = __quot; \
__mod; })
+#endif /* (_MIPS_SZLONG == 32) */
+
+#if (_MIPS_SZLONG == 64)
+
+/*
+ * Don't use this one in new code
+ */
+#define do_div64_32(res, high, low, base) ({ \
+ unsigned int __quot, __mod; \
+ unsigned long __div; \
+ unsigned int __low, __high, __base; \
+ \
+ __high = (high); \
+ __low = (low); \
+ __div = __high; \
+ __div = __div << 32 | __low; \
+ __base = (base); \
+ \
+ __mod = __div % __base; \
+ __div = __div / __base; \
+ \
+ __quot = __div; \
+ (res) = __quot; \
+ __mod; })
+
+/*
+ * Hey, we're already 64-bit, no
+ * need to play games..
+ */
+#define do_div(n, base) ({ \
+ unsigned long __quot; \
+ unsigned int __mod; \
+ unsigned long __div; \
+ unsigned int __base; \
+ \
+ __div = (n); \
+ __base = (base); \
+ \
+ __mod = __div % __base; \
+ __quot = __div / __base; \
+ \
+ (n) = __quot; \
+ __mod; })
+
+#endif /* (_MIPS_SZLONG == 64) */
#endif /* _ASM_DIV64_H */
diff -Nru a/include/asm-mips/dma-mapping.h b/include/asm-mips/dma-mapping.h
--- a/include/asm-mips/dma-mapping.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-mips/dma-mapping.h Sun Aug 3 13:14:49 2003
@@ -1 +1,228 @@
-#include <asm-generic/dma-mapping.h>
+#ifndef _ASM_DMA_MAPPING_H
+#define _ASM_DMA_MAPPING_H
+
+#include <asm/cache.h>
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, int flag);
+
+void dma_free_coherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle);
+
+#ifdef CONFIG_MAPPED_DMA_IO
+
+extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+ enum dma_data_direction direction);
+extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
+ size_t size, enum dma_data_direction direction);
+extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction direction);
+extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size, enum dma_data_direction direction);
+extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
+ size_t size, enum dma_data_direction direction);
+extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+ int nhwentries, enum dma_data_direction direction);
+extern void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
+ size_t size, enum dma_data_direction direction);
+extern void dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size, enum dma_data_direction direction);
+extern void dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
+ enum dma_data_direction direction);
+
+#else
+
+static inline dma_addr_t
+dma_map_single(struct device *dev, void *ptr, size_t size,
+ enum dma_data_direction direction)
+{
+ unsigned long addr = (unsigned long) ptr;
+
+ BUG_ON(direction == DMA_NONE);
+
+ dma_cache_wback_inv(addr, size);
+
+ return bus_to_baddr(hwdev->bus, __pa(ptr));
+}
+
+static inline void
+dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ if (direction != DMA_TO_DEVICE) {
+ unsigned long addr;
+
+ addr = baddr_to_bus(hwdev->bus, dma_addr) + PAGE_OFFSET;
+ dma_cache_wback_inv(addr, size);
+ }
+}
+
+static inline int
+dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction direction)
+{
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ for (i = 0; i < nents; i++, sg++) {
+ unsigned long addr;
+
+ addr = (unsigned long) page_address(sg->page);
+ if (addr)
+ dma_cache_wback_inv(addr + sg->offset, sg->length);
+ sg->dma_address = (dma_addr_t) bus_to_baddr(hwdev->bus,
+ page_to_phys(sg->page) + sg->offset);
+ }
+
+ return nents;
+}
+
+static inline dma_addr_t
+dma_map_page(struct device *dev, struct page *page, unsigned long offset,
+ size_t size, enum dma_data_direction direction)
+{
+ unsigned long addr;
+
+ BUG_ON(direction == DMA_NONE);
+ addr = (unsigned long) page_address(page) + offset;
+ dma_cache_wback_inv(addr, size);
+
+ return bus_to_baddr(hwdev->bus, page_to_phys(page) + offset);
+}
+
+static inline void
+dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ if (direction != DMA_TO_DEVICE) {
+ unsigned long addr;
+
+ addr = baddr_to_bus(hwdev->bus, dma_address) + PAGE_OFFSET;
+ dma_cache_wback_inv(addr, size);
+ }
+}
+
+static inline void
+dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+ enum dma_data_direction direction)
+{
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ if (direction == DMA_TO_DEVICE)
+ return;
+
+ for (i = 0; i < nhwentries; i++, sg++) {
+ unsigned long addr;
+
+ if (!sg->page)
+ BUG();
+
+ addr = (unsigned long) page_address(sg->page);
+ if (addr)
+ dma_cache_wback_inv(addr + sg->offset, sg->length);
+ }
+}
+
+static inline void
+dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
+ enum dma_data_direction direction)
+{
+ unsigned long addr;
+
+ if (direction == DMA_NONE)
+ BUG();
+
+ addr = baddr_to_bus(hwdev->bus, dma_handle) + PAGE_OFFSET;
+ dma_cache_wback_inv(addr, size);
+}
+
+static inline void
+dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+ unsigned long addr;
+
+ if (direction == DMA_NONE)
+ BUG();
+
+ addr = baddr_to_bus(hwdev->bus, dma_handle) + PAGE_OFFSET;
+ dma_cache_wback_inv(addr, size);
+}
+
+static inline void
+dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
+ enum dma_data_direction direction)
+{
+#ifdef CONFIG_NONCOHERENT_IO
+ int i;
+#endif
+
+ if (direction == DMA_NONE)
+ BUG();
+
+ /* Make sure that gcc doesn't leave the empty loop body. */
+#ifdef CONFIG_NONCOHERENT_IO
+ for (i = 0; i < nelems; i++, sg++)
+ dma_cache_wback_inv((unsigned long)page_address(sg->page),
+ sg->length);
+#endif
+}
+#endif /* CONFIG_MAPPED_DMA_IO */
+
+static inline int
+dma_supported(struct device *dev, u64 mask)
+{
+ /*
+ * we fall back to GFP_DMA when the mask isn't all 1s,
+ * so we can't guarantee allocations that must be
+ * within a tighter range than GFP_DMA..
+ */
+ if (mask < 0x00ffffff)
+ return 0;
+
+ return 1;
+}
+
+static inline int
+dma_set_mask(struct device *dev, u64 mask)
+{
+ if(!dev->dma_mask || !dma_supported(dev, mask))
+ return -EIO;
+
+ *dev->dma_mask = mask;
+
+ return 0;
+}
+
+static inline int
+dma_get_cache_alignment(void)
+{
+ /* XXX Largest on any MIPS */
+ return 128;
+}
+
+#ifdef CONFIG_NONCOHERENT_IO
+#define dma_is_consistent(d) (0)
+#else
+#define dma_is_consistent(d) (1)
+#endif
+
+static inline void
+dma_cache_sync(void *vaddr, size_t size,
+ enum dma_data_direction direction)
+{
+ dma_cache_wback_inv((unsigned long)vaddr, size);
+}
+
+#endif /* _ASM_DMA_MAPPING_H */
diff -Nru a/include/asm-mips/dma.h b/include/asm-mips/dma.h
--- a/include/asm-mips/dma.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/dma.h Sun Aug 3 13:14:44 2003
@@ -9,8 +9,8 @@
* as the R4030 on Jazz boards behave totally different!
*/
-#ifndef __ASM_MIPS_DMA_H
-#define __ASM_MIPS_DMA_H
+#ifndef _ASM_DMA_H
+#define _ASM_DMA_H
#include <linux/config.h>
#include <asm/io.h> /* need byte IO */
@@ -302,10 +302,12 @@
extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
extern void free_dma(unsigned int dmanr); /* release it again */
+/* From PCI */
+
#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
-#define isa_dma_bridge_buggy (0)
+#define isa_dma_bridge_buggy (0)
#endif
-#endif /* __ASM_MIPS_DMA_H */
+#endif /* _ASM_DMA_H */
diff -Nru a/include/asm-mips/elf.h b/include/asm-mips/elf.h
--- a/include/asm-mips/elf.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/elf.h Sun Aug 3 13:14:47 2003
@@ -3,8 +3,10 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
-#ifndef __ASM_ELF_H
-#define __ASM_ELF_H
+#ifndef _ASM_ELF_H
+#define _ASM_ELF_H
+
+#include <linux/config.h>
/* ELF header e_flags defines. */
/* MIPS architecture level. */
@@ -110,6 +112,7 @@
#define SHF_MIPS_GPREL 0x10000000
+#ifndef ELF_ARCH
/* ELF register definitions */
#define ELF_NGREG 45
#define ELF_NFPREG 33
@@ -120,6 +123,32 @@
typedef double elf_fpreg_t;
typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+#ifdef CONFIG_MIPS32
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(hdr) \
+({ \
+ int __res = 1; \
+ struct elfhdr *__h = (hdr); \
+ \
+ if (__h->e_machine != EM_MIPS) \
+ __res = 0; \
+ if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
+ __res = 0; \
+ \
+ __res; \
+})
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS ELFCLASS32
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
@@ -141,13 +170,16 @@
__res; \
})
-/* This one accepts IRIX binaries. */
-#define irix_elf_check_arch(hdr) ((hdr)->e_machine == EM_MIPS)
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS ELFCLASS64
+
+#endif /* CONFIG_MIPS64 */
/*
* These are used to set parameters in the core dumps.
*/
-#define ELF_CLASS ELFCLASS32
#ifdef __MIPSEB__
#define ELF_DATA ELFDATA2MSB
#elif __MIPSEL__
@@ -155,6 +187,46 @@
#endif
#define ELF_ARCH EM_MIPS
+#endif /* !defined(ELF_ARCH) */
+
+#ifdef __KERNEL__
+
+#ifdef CONFIG_MIPS32
+
+#define SET_PERSONALITY(ex, ibcs2) \
+do { \
+ if (ibcs2) \
+ set_personality(PER_SVR4); \
+ set_personality(PER_LINUX); \
+} while (0)
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+
+#define SET_PERSONALITY(ex, ibcs2) \
+do { current->thread.mflags &= ~MF_ABI_MASK; \
+ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \
+ if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
+ ((ex).e_flags & EF_MIPS_ABI) == 0) \
+ current->thread.mflags |= MF_N32; \
+ else \
+ current->thread.mflags |= MF_O32; \
+ } else \
+ current->thread.mflags |= MF_N64; \
+ if (ibcs2) \
+ set_personality(PER_SVR4); \
+ else if (current->personality != PER_LINUX32) \
+ set_personality(PER_LINUX); \
+} while (0)
+
+#endif /* CONFIG_MIPS64 */
+
+#endif /* __KERNEL__ */
+
+/* This one accepts IRIX binaries. */
+#define irix_elf_check_arch(hdr) ((hdr)->e_machine == EM_MIPS)
+
#define USE_ELF_CORE_DUMP
#define ELF_EXEC_PAGESIZE 4096
@@ -197,10 +269,8 @@
the loader. We need to make sure that it is out of the way of the program
that it will "exec", and that there is sufficient room for the brk. */
+#ifndef ELF_ET_DYN_BASE
#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
-
-#ifdef __KERNEL__
-#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
#endif
-#endif /* __ASM_ELF_H */
+#endif /* _ASM_ELF_H */
diff -Nru a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h
--- a/include/asm-mips/fcntl.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/fcntl.h Sun Aug 3 13:14:51 2003
@@ -3,10 +3,10 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (C) 1995, 96, 97, 98, 99, 2003 Ralf Baechle
*/
-#ifndef __ASM_FCNTL_H
-#define __ASM_FCNTL_H
+#ifndef _ASM_FCNTL_H
+#define _ASM_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
located on an ext2 file system */
@@ -43,9 +43,11 @@
#define F_SETSIG 10 /* for sockets. */
#define F_GETSIG 11 /* for sockets. */
+#ifndef __mips64
#define F_GETLK64 33 /* using 'struct flock64' */
#define F_SETLK64 34
#define F_SETLKW64 35
+#endif
/* for F_[GET|SET]FL */
#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
@@ -81,6 +83,8 @@
* contain all the same fields as struct flock.
*/
+#ifndef __mips64
+
typedef struct flock {
short l_type;
short l_whence;
@@ -99,6 +103,22 @@
pid_t l_pid;
} flock64_t;
+#else /* 64-bit definitions */
+
+typedef struct flock {
+ short l_type;
+ short l_whence;
+ __kernel_off_t l_start;
+ __kernel_off_t l_len;
+ __kernel_pid_t l_pid;
+} flock_t;
+
+#ifdef __KERNEL__
+#define flock64 flock
+#endif
+
+#endif
+
#define F_LINUX_SPECIFIC_BASE 1024
-#endif /* __ASM_FCNTL_H */
+#endif /* _ASM_FCNTL_H */
diff -Nru a/include/asm-mips/fpregdef.h b/include/asm-mips/fpregdef.h
--- a/include/asm-mips/fpregdef.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/fpregdef.h Sun Aug 3 13:14:45 2003
@@ -5,10 +5,16 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995 by Ralf Baechle
+ * Copyright (C) 1995, 1999 Ralf Baechle
+ * Copyright (C) 1985 MIPS Computer Systems, Inc.
+ * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
*/
-#ifndef __ASM_MIPS_FPREGDEF_H
-#define __ASM_MIPS_FPREGDEF_H
+#ifndef _ASM_FPREGDEF_H
+#define _ASM_FPREGDEF_H
+
+#include <asm/sgidefs.h>
+
+#if _MIPS_SIM == _MIPS_SIM_ABI32
/*
* These definitions only cover the R3000-ish 16/32 register model.
@@ -49,4 +55,45 @@
#define fcr31 $31 /* FPU status register */
-#endif /* !defined (__ASM_MIPS_FPREGDEF_H) */
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
+
+#define fv0 $f0 /* return value */
+#define fv1 $f2
+#define fa0 $f12 /* argument registers */
+#define fa1 $f13
+#define fa2 $f14
+#define fa3 $f15
+#define fa4 $f16
+#define fa5 $f17
+#define fa6 $f18
+#define fa7 $f19
+#define ft0 $f4 /* caller saved */
+#define ft1 $f5
+#define ft2 $f6
+#define ft3 $f7
+#define ft4 $f8
+#define ft5 $f9
+#define ft6 $f10
+#define ft7 $f11
+#define ft8 $f20
+#define ft9 $f21
+#define ft10 $f22
+#define ft11 $f23
+#define ft12 $f1
+#define ft13 $f3
+#define fs0 $f24 /* callee saved */
+#define fs1 $f25
+#define fs2 $f26
+#define fs3 $f27
+#define fs4 $f28
+#define fs5 $f29
+#define fs6 $f30
+#define fs7 $f31
+
+#define fcr31 $31
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+#endif /* _ASM_FPREGDEF_H */
diff -Nru a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
--- a/include/asm-mips/fpu.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/fpu.h Sun Aug 3 13:14:47 2003
@@ -21,10 +21,14 @@
#include <asm/current.h>
struct sigcontext;
+struct sigcontext32;
extern asmlinkage int (*save_fp_context)(struct sigcontext *sc);
extern asmlinkage int (*restore_fp_context)(struct sigcontext *sc);
+extern asmlinkage int (*save_fp_context32)(struct sigcontext32 *sc);
+extern asmlinkage int (*restore_fp_context32)(struct sigcontext32 *sc);
+
extern void fpu_emulator_init_fpu(void);
extern void _init_fpu(void);
extern void _save_fp(struct task_struct *);
@@ -89,7 +93,7 @@
}
}
-static inline void loose_fpu(void)
+static inline void lose_fpu(void)
{
if (cpu_has_fpu) {
KSTK_STATUS(current) &= ~ST0_CU1;
@@ -119,15 +123,15 @@
_restore_fp(tsk);
}
-static inline unsigned long long *get_fpu_regs(struct task_struct *tsk)
+static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
{
if (cpu_has_fpu) {
if ((tsk == current) && is_fpu_owner())
_save_fp(current);
- return (unsigned long long *)&tsk->thread.fpu.hard.fp_regs[0];
- } else {
- return (unsigned long long *)tsk->thread.fpu.soft.regs;
+ return tsk->thread.fpu.hard.fpr;
}
+
+ return tsk->thread.fpu.soft.fpr;
}
#endif /* _ASM_FPU_H */
diff -Nru a/include/asm-mips/gdb-stub.h b/include/asm-mips/gdb-stub.h
--- a/include/asm-mips/gdb-stub.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/gdb-stub.h Sun Aug 3 13:14:48 2003
@@ -4,9 +4,10 @@
* for more details.
*
* Copyright (C) 1995 Andreas Busse
+ * Copyright (C) 2003 Ralf Baechle
*/
-#ifndef __ASM_MIPS_GDB_STUB_H
-#define __ASM_MIPS_GDB_STUB_H
+#ifndef _ASM_GDB_STUB_H
+#define _ASM_GDB_STUB_H
/*
@@ -26,111 +27,111 @@
#define NUMREGS 90
#define GDB_FR_REG0 (PTRSIZE*5) /* 0 */
-#define GDB_FR_REG1 ((GDB_FR_REG0) + 4) /* 1 */
-#define GDB_FR_REG2 ((GDB_FR_REG1) + 4) /* 2 */
-#define GDB_FR_REG3 ((GDB_FR_REG2) + 4) /* 3 */
-#define GDB_FR_REG4 ((GDB_FR_REG3) + 4) /* 4 */
-#define GDB_FR_REG5 ((GDB_FR_REG4) + 4) /* 5 */
-#define GDB_FR_REG6 ((GDB_FR_REG5) + 4) /* 6 */
-#define GDB_FR_REG7 ((GDB_FR_REG6) + 4) /* 7 */
-#define GDB_FR_REG8 ((GDB_FR_REG7) + 4) /* 8 */
-#define GDB_FR_REG9 ((GDB_FR_REG8) + 4) /* 9 */
-#define GDB_FR_REG10 ((GDB_FR_REG9) + 4) /* 10 */
-#define GDB_FR_REG11 ((GDB_FR_REG10) + 4) /* 11 */
-#define GDB_FR_REG12 ((GDB_FR_REG11) + 4) /* 12 */
-#define GDB_FR_REG13 ((GDB_FR_REG12) + 4) /* 13 */
-#define GDB_FR_REG14 ((GDB_FR_REG13) + 4) /* 14 */
-#define GDB_FR_REG15 ((GDB_FR_REG14) + 4) /* 15 */
-#define GDB_FR_REG16 ((GDB_FR_REG15) + 4) /* 16 */
-#define GDB_FR_REG17 ((GDB_FR_REG16) + 4) /* 17 */
-#define GDB_FR_REG18 ((GDB_FR_REG17) + 4) /* 18 */
-#define GDB_FR_REG19 ((GDB_FR_REG18) + 4) /* 19 */
-#define GDB_FR_REG20 ((GDB_FR_REG19) + 4) /* 20 */
-#define GDB_FR_REG21 ((GDB_FR_REG20) + 4) /* 21 */
-#define GDB_FR_REG22 ((GDB_FR_REG21) + 4) /* 22 */
-#define GDB_FR_REG23 ((GDB_FR_REG22) + 4) /* 23 */
-#define GDB_FR_REG24 ((GDB_FR_REG23) + 4) /* 24 */
-#define GDB_FR_REG25 ((GDB_FR_REG24) + 4) /* 25 */
-#define GDB_FR_REG26 ((GDB_FR_REG25) + 4) /* 26 */
-#define GDB_FR_REG27 ((GDB_FR_REG26) + 4) /* 27 */
-#define GDB_FR_REG28 ((GDB_FR_REG27) + 4) /* 28 */
-#define GDB_FR_REG29 ((GDB_FR_REG28) + 4) /* 29 */
-#define GDB_FR_REG30 ((GDB_FR_REG29) + 4) /* 30 */
-#define GDB_FR_REG31 ((GDB_FR_REG30) + 4) /* 31 */
+#define GDB_FR_REG1 ((GDB_FR_REG0) + LONGSIZE) /* 1 */
+#define GDB_FR_REG2 ((GDB_FR_REG1) + LONGSIZE) /* 2 */
+#define GDB_FR_REG3 ((GDB_FR_REG2) + LONGSIZE) /* 3 */
+#define GDB_FR_REG4 ((GDB_FR_REG3) + LONGSIZE) /* 4 */
+#define GDB_FR_REG5 ((GDB_FR_REG4) + LONGSIZE) /* 5 */
+#define GDB_FR_REG6 ((GDB_FR_REG5) + LONGSIZE) /* 6 */
+#define GDB_FR_REG7 ((GDB_FR_REG6) + LONGSIZE) /* 7 */
+#define GDB_FR_REG8 ((GDB_FR_REG7) + LONGSIZE) /* 8 */
+#define GDB_FR_REG9 ((GDB_FR_REG8) + LONGSIZE) /* 9 */
+#define GDB_FR_REG10 ((GDB_FR_REG9) + LONGSIZE) /* 10 */
+#define GDB_FR_REG11 ((GDB_FR_REG10) + LONGSIZE) /* 11 */
+#define GDB_FR_REG12 ((GDB_FR_REG11) + LONGSIZE) /* 12 */
+#define GDB_FR_REG13 ((GDB_FR_REG12) + LONGSIZE) /* 13 */
+#define GDB_FR_REG14 ((GDB_FR_REG13) + LONGSIZE) /* 14 */
+#define GDB_FR_REG15 ((GDB_FR_REG14) + LONGSIZE) /* 15 */
+#define GDB_FR_REG16 ((GDB_FR_REG15) + LONGSIZE) /* 16 */
+#define GDB_FR_REG17 ((GDB_FR_REG16) + LONGSIZE) /* 17 */
+#define GDB_FR_REG18 ((GDB_FR_REG17) + LONGSIZE) /* 18 */
+#define GDB_FR_REG19 ((GDB_FR_REG18) + LONGSIZE) /* 19 */
+#define GDB_FR_REG20 ((GDB_FR_REG19) + LONGSIZE) /* 20 */
+#define GDB_FR_REG21 ((GDB_FR_REG20) + LONGSIZE) /* 21 */
+#define GDB_FR_REG22 ((GDB_FR_REG21) + LONGSIZE) /* 22 */
+#define GDB_FR_REG23 ((GDB_FR_REG22) + LONGSIZE) /* 23 */
+#define GDB_FR_REG24 ((GDB_FR_REG23) + LONGSIZE) /* 24 */
+#define GDB_FR_REG25 ((GDB_FR_REG24) + LONGSIZE) /* 25 */
+#define GDB_FR_REG26 ((GDB_FR_REG25) + LONGSIZE) /* 26 */
+#define GDB_FR_REG27 ((GDB_FR_REG26) + LONGSIZE) /* 27 */
+#define GDB_FR_REG28 ((GDB_FR_REG27) + LONGSIZE) /* 28 */
+#define GDB_FR_REG29 ((GDB_FR_REG28) + LONGSIZE) /* 29 */
+#define GDB_FR_REG30 ((GDB_FR_REG29) + LONGSIZE) /* 30 */
+#define GDB_FR_REG31 ((GDB_FR_REG30) + LONGSIZE) /* 31 */
/*
* Saved special registers
*/
-#define GDB_FR_STATUS ((GDB_FR_REG31) + 4) /* 32 */
-#define GDB_FR_LO ((GDB_FR_STATUS) + 4) /* 33 */
-#define GDB_FR_HI ((GDB_FR_LO) + 4) /* 34 */
-#define GDB_FR_BADVADDR ((GDB_FR_HI) + 4) /* 35 */
-#define GDB_FR_CAUSE ((GDB_FR_BADVADDR) + 4) /* 36 */
-#define GDB_FR_EPC ((GDB_FR_CAUSE) + 4) /* 37 */
+#define GDB_FR_STATUS ((GDB_FR_REG31) + LONGSIZE) /* 32 */
+#define GDB_FR_LO ((GDB_FR_STATUS) + LONGSIZE) /* 33 */
+#define GDB_FR_HI ((GDB_FR_LO) + LONGSIZE) /* 34 */
+#define GDB_FR_BADVADDR ((GDB_FR_HI) + LONGSIZE) /* 35 */
+#define GDB_FR_CAUSE ((GDB_FR_BADVADDR) + LONGSIZE) /* 36 */
+#define GDB_FR_EPC ((GDB_FR_CAUSE) + LONGSIZE) /* 37 */
/*
* Saved floating point registers
*/
-#define GDB_FR_FPR0 ((GDB_FR_EPC) + 4) /* 38 */
-#define GDB_FR_FPR1 ((GDB_FR_FPR0) + 4) /* 39 */
-#define GDB_FR_FPR2 ((GDB_FR_FPR1) + 4) /* 40 */
-#define GDB_FR_FPR3 ((GDB_FR_FPR2) + 4) /* 41 */
-#define GDB_FR_FPR4 ((GDB_FR_FPR3) + 4) /* 42 */
-#define GDB_FR_FPR5 ((GDB_FR_FPR4) + 4) /* 43 */
-#define GDB_FR_FPR6 ((GDB_FR_FPR5) + 4) /* 44 */
-#define GDB_FR_FPR7 ((GDB_FR_FPR6) + 4) /* 45 */
-#define GDB_FR_FPR8 ((GDB_FR_FPR7) + 4) /* 46 */
-#define GDB_FR_FPR9 ((GDB_FR_FPR8) + 4) /* 47 */
-#define GDB_FR_FPR10 ((GDB_FR_FPR9) + 4) /* 48 */
-#define GDB_FR_FPR11 ((GDB_FR_FPR10) + 4) /* 49 */
-#define GDB_FR_FPR12 ((GDB_FR_FPR11) + 4) /* 50 */
-#define GDB_FR_FPR13 ((GDB_FR_FPR12) + 4) /* 51 */
-#define GDB_FR_FPR14 ((GDB_FR_FPR13) + 4) /* 52 */
-#define GDB_FR_FPR15 ((GDB_FR_FPR14) + 4) /* 53 */
-#define GDB_FR_FPR16 ((GDB_FR_FPR15) + 4) /* 54 */
-#define GDB_FR_FPR17 ((GDB_FR_FPR16) + 4) /* 55 */
-#define GDB_FR_FPR18 ((GDB_FR_FPR17) + 4) /* 56 */
-#define GDB_FR_FPR19 ((GDB_FR_FPR18) + 4) /* 57 */
-#define GDB_FR_FPR20 ((GDB_FR_FPR19) + 4) /* 58 */
-#define GDB_FR_FPR21 ((GDB_FR_FPR20) + 4) /* 59 */
-#define GDB_FR_FPR22 ((GDB_FR_FPR21) + 4) /* 60 */
-#define GDB_FR_FPR23 ((GDB_FR_FPR22) + 4) /* 61 */
-#define GDB_FR_FPR24 ((GDB_FR_FPR23) + 4) /* 62 */
-#define GDB_FR_FPR25 ((GDB_FR_FPR24) + 4) /* 63 */
-#define GDB_FR_FPR26 ((GDB_FR_FPR25) + 4) /* 64 */
-#define GDB_FR_FPR27 ((GDB_FR_FPR26) + 4) /* 65 */
-#define GDB_FR_FPR28 ((GDB_FR_FPR27) + 4) /* 66 */
-#define GDB_FR_FPR29 ((GDB_FR_FPR28) + 4) /* 67 */
-#define GDB_FR_FPR30 ((GDB_FR_FPR29) + 4) /* 68 */
-#define GDB_FR_FPR31 ((GDB_FR_FPR30) + 4) /* 69 */
-
-#define GDB_FR_FSR ((GDB_FR_FPR31) + 4) /* 70 */
-#define GDB_FR_FIR ((GDB_FR_FSR) + 4) /* 71 */
-#define GDB_FR_FRP ((GDB_FR_FIR) + 4) /* 72 */
+#define GDB_FR_FPR0 ((GDB_FR_EPC) + LONGSIZE) /* 38 */
+#define GDB_FR_FPR1 ((GDB_FR_FPR0) + LONGSIZE) /* 39 */
+#define GDB_FR_FPR2 ((GDB_FR_FPR1) + LONGSIZE) /* 40 */
+#define GDB_FR_FPR3 ((GDB_FR_FPR2) + LONGSIZE) /* 41 */
+#define GDB_FR_FPR4 ((GDB_FR_FPR3) + LONGSIZE) /* 42 */
+#define GDB_FR_FPR5 ((GDB_FR_FPR4) + LONGSIZE) /* 43 */
+#define GDB_FR_FPR6 ((GDB_FR_FPR5) + LONGSIZE) /* 44 */
+#define GDB_FR_FPR7 ((GDB_FR_FPR6) + LONGSIZE) /* 45 */
+#define GDB_FR_FPR8 ((GDB_FR_FPR7) + LONGSIZE) /* 46 */
+#define GDB_FR_FPR9 ((GDB_FR_FPR8) + LONGSIZE) /* 47 */
+#define GDB_FR_FPR10 ((GDB_FR_FPR9) + LONGSIZE) /* 48 */
+#define GDB_FR_FPR11 ((GDB_FR_FPR10) + LONGSIZE) /* 49 */
+#define GDB_FR_FPR12 ((GDB_FR_FPR11) + LONGSIZE) /* 50 */
+#define GDB_FR_FPR13 ((GDB_FR_FPR12) + LONGSIZE) /* 51 */
+#define GDB_FR_FPR14 ((GDB_FR_FPR13) + LONGSIZE) /* 52 */
+#define GDB_FR_FPR15 ((GDB_FR_FPR14) + LONGSIZE) /* 53 */
+#define GDB_FR_FPR16 ((GDB_FR_FPR15) + LONGSIZE) /* 54 */
+#define GDB_FR_FPR17 ((GDB_FR_FPR16) + LONGSIZE) /* 55 */
+#define GDB_FR_FPR18 ((GDB_FR_FPR17) + LONGSIZE) /* 56 */
+#define GDB_FR_FPR19 ((GDB_FR_FPR18) + LONGSIZE) /* 57 */
+#define GDB_FR_FPR20 ((GDB_FR_FPR19) + LONGSIZE) /* 58 */
+#define GDB_FR_FPR21 ((GDB_FR_FPR20) + LONGSIZE) /* 59 */
+#define GDB_FR_FPR22 ((GDB_FR_FPR21) + LONGSIZE) /* 60 */
+#define GDB_FR_FPR23 ((GDB_FR_FPR22) + LONGSIZE) /* 61 */
+#define GDB_FR_FPR24 ((GDB_FR_FPR23) + LONGSIZE) /* 62 */
+#define GDB_FR_FPR25 ((GDB_FR_FPR24) + LONGSIZE) /* 63 */
+#define GDB_FR_FPR26 ((GDB_FR_FPR25) + LONGSIZE) /* 64 */
+#define GDB_FR_FPR27 ((GDB_FR_FPR26) + LONGSIZE) /* 65 */
+#define GDB_FR_FPR28 ((GDB_FR_FPR27) + LONGSIZE) /* 66 */
+#define GDB_FR_FPR29 ((GDB_FR_FPR28) + LONGSIZE) /* 67 */
+#define GDB_FR_FPR30 ((GDB_FR_FPR29) + LONGSIZE) /* 68 */
+#define GDB_FR_FPR31 ((GDB_FR_FPR30) + LONGSIZE) /* 69 */
+
+#define GDB_FR_FSR ((GDB_FR_FPR31) + LONGSIZE) /* 70 */
+#define GDB_FR_FIR ((GDB_FR_FSR) + LONGSIZE) /* 71 */
+#define GDB_FR_FRP ((GDB_FR_FIR) + LONGSIZE) /* 72 */
-#define GDB_FR_DUMMY ((GDB_FR_FRP) + 4) /* 73, unused ??? */
+#define GDB_FR_DUMMY ((GDB_FR_FRP) + LONGSIZE) /* 73, unused ??? */
/*
* Again, CP0 registers
*/
-#define GDB_FR_CP0_INDEX ((GDB_FR_DUMMY) + 4) /* 74 */
-#define GDB_FR_CP0_RANDOM ((GDB_FR_CP0_INDEX) + 4) /* 75 */
-#define GDB_FR_CP0_ENTRYLO0 ((GDB_FR_CP0_RANDOM) + 4) /* 76 */
-#define GDB_FR_CP0_ENTRYLO1 ((GDB_FR_CP0_ENTRYLO0) + 4) /* 77 */
-#define GDB_FR_CP0_CONTEXT ((GDB_FR_CP0_ENTRYLO1) + 4) /* 78 */
-#define GDB_FR_CP0_PAGEMASK ((GDB_FR_CP0_CONTEXT) + 4) /* 79 */
-#define GDB_FR_CP0_WIRED ((GDB_FR_CP0_PAGEMASK) + 4) /* 80 */
-#define GDB_FR_CP0_REG7 ((GDB_FR_CP0_WIRED) + 4) /* 81 */
-#define GDB_FR_CP0_REG8 ((GDB_FR_CP0_REG7) + 4) /* 82 */
-#define GDB_FR_CP0_REG9 ((GDB_FR_CP0_REG8) + 4) /* 83 */
-#define GDB_FR_CP0_ENTRYHI ((GDB_FR_CP0_REG9) + 4) /* 84 */
-#define GDB_FR_CP0_REG11 ((GDB_FR_CP0_ENTRYHI) + 4) /* 85 */
-#define GDB_FR_CP0_REG12 ((GDB_FR_CP0_REG11) + 4) /* 86 */
-#define GDB_FR_CP0_REG13 ((GDB_FR_CP0_REG12) + 4) /* 87 */
-#define GDB_FR_CP0_REG14 ((GDB_FR_CP0_REG13) + 4) /* 88 */
-#define GDB_FR_CP0_PRID ((GDB_FR_CP0_REG14) + 4) /* 89 */
+#define GDB_FR_CP0_INDEX ((GDB_FR_DUMMY) + LONGSIZE) /* 74 */
+#define GDB_FR_CP0_RANDOM ((GDB_FR_CP0_INDEX) + LONGSIZE) /* 75 */
+#define GDB_FR_CP0_ENTRYLO0 ((GDB_FR_CP0_RANDOM) + LONGSIZE)/* 76 */
+#define GDB_FR_CP0_ENTRYLO1 ((GDB_FR_CP0_ENTRYLO0) + LONGSIZE)/* 77 */
+#define GDB_FR_CP0_CONTEXT ((GDB_FR_CP0_ENTRYLO1) + LONGSIZE)/* 78 */
+#define GDB_FR_CP0_PAGEMASK ((GDB_FR_CP0_CONTEXT) + LONGSIZE)/* 79 */
+#define GDB_FR_CP0_WIRED ((GDB_FR_CP0_PAGEMASK) + LONGSIZE)/* 80 */
+#define GDB_FR_CP0_REG7 ((GDB_FR_CP0_WIRED) + LONGSIZE) /* 81 */
+#define GDB_FR_CP0_REG8 ((GDB_FR_CP0_REG7) + LONGSIZE) /* 82 */
+#define GDB_FR_CP0_REG9 ((GDB_FR_CP0_REG8) + LONGSIZE) /* 83 */
+#define GDB_FR_CP0_ENTRYHI ((GDB_FR_CP0_REG9) + LONGSIZE) /* 84 */
+#define GDB_FR_CP0_REG11 ((GDB_FR_CP0_ENTRYHI) + LONGSIZE)/* 85 */
+#define GDB_FR_CP0_REG12 ((GDB_FR_CP0_REG11) + LONGSIZE) /* 86 */
+#define GDB_FR_CP0_REG13 ((GDB_FR_CP0_REG12) + LONGSIZE) /* 87 */
+#define GDB_FR_CP0_REG14 ((GDB_FR_CP0_REG13) + LONGSIZE) /* 88 */
+#define GDB_FR_CP0_PRID ((GDB_FR_CP0_REG14) + LONGSIZE) /* 89 */
-#define GDB_FR_SIZE ((((GDB_FR_CP0_PRID) + 4) + (PTRSIZE-1)) & ~(PTRSIZE-1))
+#define GDB_FR_SIZE ((((GDB_FR_CP0_PRID) + LONGSIZE) + (PTRSIZE-1)) & ~(PTRSIZE-1))
#ifndef __ASSEMBLY__
@@ -207,6 +208,7 @@
*/
void set_debug_traps(void);
+void set_async_breakpoint(unsigned long *epc);
#endif /* !__ASSEMBLY__ */
-#endif /* __ASM_MIPS_GDB_STUB_H */
+#endif /* _ASM_GDB_STUB_H */
diff -Nru a/include/asm-mips/gt64120/gt64120.h b/include/asm-mips/gt64120/gt64120.h
--- a/include/asm-mips/gt64120/gt64120.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/gt64120/gt64120.h Sun Aug 3 13:14:48 2003
@@ -18,8 +18,8 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
-#ifndef _ASM_GT64120_GT64120_H
-#define _ASM_GT64120_GT64120_H
+#ifndef __ASM_GT64120_GT64120_H
+#define __ASM_GT64120_GT64120_H
#define MSK(n) ((1 << (n)) - 1)
@@ -63,7 +63,7 @@
#define GT_PCI1M0REMAP_OFS 0x110
#define GT_PCI1M1REMAP_OFS 0x118
-#define GT_SCS0LD_OFS 0x400
+#define GT_SCS0LD_OFS 0x400
#define GT_SCS0HD_OFS 0x404
#define GT_SCS1LD_OFS 0x408
#define GT_SCS1HD_OFS 0x40c
@@ -327,7 +327,7 @@
#define GT_PCI0_BARE_SWSCS32DIS_SHF 1
#define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
#define GT_PCI0_BARE_SWSCS32DIS_BIT GT_PCI0_BARE_SWSCS32DIS_MSK
-
+
#define GT_PCI0_BARE_SWSCS10DIS_SHF 2
#define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
#define GT_PCI0_BARE_SWSCS10DIS_BIT GT_PCI0_BARE_SWSCS10DIS_MSK
@@ -410,12 +410,13 @@
***********************************************************************
*/
-/*
+/*
* include asm/gt64120/<board>/gt64120_dep.h file
*/
#include <linux/config.h>
#include <linux/init.h>
+#include <linux/pci.h>
#if defined(CONFIG_MOMENCO_OCELOT)
#include <asm/gt64120/momenco_ocelot/gt64120_dep.h>
@@ -432,7 +433,7 @@
*/
/*
- * Board-dependent functions, which must be defined in
+ * Board-dependent functions, which must be defined in
* arch/mips/gt64120/<board>/pci.c file.
*
* This function is called by pcibios_fixup_bus(bus), which in turn is
@@ -440,4 +441,4 @@
*/
extern void __init gt64120_board_pcibios_fixup_bus(struct pci_bus *bus);
-#endif /* _ASM_GT64120_GT64120_H */
+#endif /* __ASM_GT64120_GT64120_H */
diff -Nru a/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h b/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h
--- a/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h Sun Aug 3 13:14:50 2003
@@ -19,7 +19,7 @@
#include <asm/byteorder.h> /* for cpu_to_le32() */
/*
- * PCI address allocation
+ * PCI address allocation
*/
#define GT_PCI_MEM_BASE (0x22000000)
#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE
diff -Nru a/include/asm-mips/hardirq.h b/include/asm-mips/hardirq.h
--- a/include/asm-mips/hardirq.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/hardirq.h Sun Aug 3 13:14:46 2003
@@ -16,8 +16,6 @@
typedef struct {
unsigned int __softirq_pending;
- unsigned int __syscall_count;
- struct task_struct * __ksoftirqd_task; /* waitqueue is too large */
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
diff -Nru a/include/asm-mips/hdreg.h b/include/asm-mips/hdreg.h
--- a/include/asm-mips/hdreg.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/hdreg.h Sun Aug 3 13:14:52 2003
@@ -1,12 +1,13 @@
/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * This file contains the MIPS architecture specific IDE code.
+ *
* Copyright (C) 1994-1996 Linus Torvalds & authors
* Copyright (C) 2001 Ralf Baechle
*/
-
-/*
- * This file contains the MIPS architecture specific IDE code.
- */
-
#ifndef _ASM_HDREG_H
#define _ASM_HDREG_H
diff -Nru a/include/asm-mips/hp-lj/asic.h b/include/asm-mips/hp-lj/asic.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/hp-lj/asic.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,7 @@
+
+typedef enum { IllegalAsic, UnknownAsic, AndrosAsic, HarmonyAsic } AsicId;
+
+AsicId GetAsicId(void);
+
+const char* const GetAsicName(void);
+
diff -Nru a/include/asm-mips/hw_irq.h b/include/asm-mips/hw_irq.h
--- a/include/asm-mips/hw_irq.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/hw_irq.h Sun Aug 3 13:14:52 2003
@@ -19,6 +19,8 @@
extern void make_8259A_irq(unsigned int irq);
extern void init_8259A(int aeoi);
+#include <asm/atomic.h>
+
extern atomic_t irq_err_count;
/* This may not be apropriate for all machines, we'll see ... */
diff -Nru a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h
--- a/include/asm-mips/i8259.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/i8259.h Sun Aug 3 13:14:46 2003
@@ -10,8 +10,8 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-#ifndef __ASM_MIPS_I8259_H
-#define __ASM_MIPS_I8259_H
+#ifndef _ASM_I8259_H
+#define _ASM_I8259_H
#include <linux/spinlock.h>
@@ -20,4 +20,4 @@
extern void init_i8259_irqs(void);
-#endif /* __ASM_MIPS_I8259_H */
+#endif /* _ASM_I8259_H */
diff -Nru a/include/asm-mips/io.h b/include/asm-mips/io.h
--- a/include/asm-mips/io.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/io.h Sun Aug 3 13:14:47 2003
@@ -6,7 +6,6 @@
* Copyright (C) 1994, 1995 Waldorf GmbH
* Copyright (C) 1994 - 2000 Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2000 FSMLabs, Inc.
*/
#ifndef _ASM_IO_H
#define _ASM_IO_H
@@ -15,9 +14,9 @@
#include <linux/types.h>
#include <asm/addrspace.h>
+#include <asm/page.h>
#include <asm/pgtable-bits.h>
#include <asm/byteorder.h>
-#include <asm/mipsregs.h>
#ifdef CONFIG_SGI_IP27
extern unsigned long bus_to_baddr[256];
@@ -41,33 +40,28 @@
#if defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__)
#define __ioswab8(x) (x)
+
#ifdef CONFIG_SGI_IP22
-/* IP22 seems braindead enough to swap 16bits values in hardware, but
- not 32bits. Go figure... Can't tell without documentation. */
+/*
+ * IP22 seems braindead enough to swap 16bits values in hardware, but
+ * not 32bits. Go figure... Can't tell without documentation.
+ */
#define __ioswab16(x) (x)
#else
#define __ioswab16(x) swab16(x)
#endif
#define __ioswab32(x) swab32(x)
+#define __ioswab64(x) swab64(x)
#else
#define __ioswab8(x) (x)
#define __ioswab16(x) (x)
#define __ioswab32(x) (x)
+#define __ioswab64(x) (x)
#endif
-/*
- * <Bacchus> Historically I wrote this stuff the same way as Linus did
- * because I was young and clueless. And now it's so jucky that I
- * don't want to put my eyes on it again to get rid of it :-)
- *
- * I'll do it then, because this code offends both me and my compiler
- * - particularly the bits of inline asm which end up doing crap like
- * 'lb $2,$2($5)' -- dwmw2
- */
-
#define IO_SPACE_LIMIT 0xffff
/*
@@ -124,7 +118,7 @@
*/
static inline unsigned long virt_to_phys(volatile void * address)
{
- return PHYSADDR(address);
+ return (unsigned long)address - PAGE_OFFSET;
}
/*
@@ -141,7 +135,7 @@
*/
static inline void * phys_to_virt(unsigned long address)
{
- return (void *)KSEG0ADDR(address);
+ return (void *)(address + PAGE_OFFSET);
}
/*
@@ -149,12 +143,12 @@
*/
static inline unsigned long isa_virt_to_bus(volatile void * address)
{
- return PHYSADDR(address);
+ return (unsigned long)address - PAGE_OFFSET;
}
static inline void * isa_bus_to_virt(unsigned long address)
{
- return (void *)KSEG0ADDR(address);
+ return (void *)(address + PAGE_OFFSET);
}
#define isa_page_to_bus page_to_phys
@@ -170,7 +164,8 @@
/*
* isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor.
+ * for the processor. This implies the assumption that there is only
+ * one of these busses.
*/
extern unsigned long isa_slot_offset;
@@ -180,7 +175,7 @@
#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags);
-
+extern void __iounmap(void *addr);
/*
* ioremap - map bus memory into CPU space
@@ -229,21 +224,84 @@
* 24-31 on SNI.
* XXX more SNI hacks.
*/
-#define readb(addr) (*(volatile unsigned char *)(addr))
-#define readw(addr) __ioswab16((*(volatile unsigned short *)(addr)))
-#define readl(addr) __ioswab32((*(volatile unsigned int *)(addr)))
-
#define __raw_readb(addr) (*(volatile unsigned char *)(addr))
#define __raw_readw(addr) (*(volatile unsigned short *)(addr))
#define __raw_readl(addr) (*(volatile unsigned int *)(addr))
+#ifdef CONFIG_MIPS32
+#define ____raw_readq(addr) \
+({ \
+ u64 __res; \
+ \
+ __asm__ __volatile__ ( \
+ " .set mips3 # ____raw_readq \n" \
+ " ld %L0, (%1) \n" \
+ " dsra32 %M0, %L0, 0 \n" \
+ " sll %L0, %L0, 0 \n" \
+ " .set mips0 \n" \
+ : "=r" (__res) \
+ : "r" (addr)); \
+ \
+ __res; \
+})
+#endif
+#ifdef CONFIG_MIPS64
+#define ____raw_readq(addr) (*(volatile unsigned long *)(addr))
+#endif
-#define writeb(b,addr) ((*(volatile unsigned char *)(addr)) = (__ioswab8(b)))
-#define writew(b,addr) ((*(volatile unsigned short *)(addr)) = (__ioswab16(b)))
-#define writel(b,addr) ((*(volatile unsigned int *)(addr)) = (__ioswab32(b)))
+#define __raw_readq(addr) \
+({ \
+ unsigned long __flags; \
+ u64 __res; \
+ \
+ local_irq_save(__flags); \
+ __res = ____raw_readq(addr); \
+ local_irq_restore(__flags); \
+ \
+ __res; \
+})
+
+#define readb(addr) __ioswab8(__raw_readb(addr))
+#define readw(addr) __ioswab16(__raw_readw(addr))
+#define readl(addr) __ioswab32(__raw_readl(addr))
+#define readq(addr) __ioswab64(__raw_readq(addr))
#define __raw_writeb(b,addr) ((*(volatile unsigned char *)(addr)) = (b))
#define __raw_writew(w,addr) ((*(volatile unsigned short *)(addr)) = (w))
#define __raw_writel(l,addr) ((*(volatile unsigned int *)(addr)) = (l))
+#ifdef CONFIG_MIPS32
+#define ____raw_writeq(val,addr) \
+({ \
+ u64 __tmp; \
+ \
+ __asm__ __volatile__ ( \
+ " .set mips3 \n" \
+ " dsll32 %L0, %L0, 0 # ____raw_writeq\n" \
+ " dsrl32 %L0, %L0, 0 \n" \
+ " dsll32 %M0, %M0, 0 \n" \
+ " or %L0, %L0, %M0 \n" \
+ " sd %L0, (%2) \n" \
+ " .set mips0 \n" \
+ : "=r" (__tmp) \
+ : "0" ((unsigned long long)val), "r" (addr)); \
+})
+#endif
+#ifdef CONFIG_MIPS64
+#define ____raw_writeq(l,addr) ((*(volatile unsigned long *)(addr)) = (l))
+#endif
+
+#define __raw_writeq(val,addr) \
+({ \
+ unsigned long __flags; \
+ \
+ local_irq_save(__flags); \
+ ____raw_writeq(val, addr); \
+ local_irq_restore(__flags); \
+})
+
+#define writeb(b,addr) __raw_writeb(__ioswab8(b),(addr))
+#define writew(w,addr) __raw_writew(__ioswab16(w),(addr))
+#define writel(l,addr) __raw_writel(__ioswab32(l),(addr))
+#define writeq(q,addr) __raw_writeq(__ioswab64(q),(addr))
#define memset_io(a,b,c) memset((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
@@ -259,15 +317,17 @@
*/
#define __ISA_IO_base ((char *)(isa_slot_offset))
-#define isa_readb(a) readb(__ISA_IO_base + (a))
-#define isa_readw(a) readw(__ISA_IO_base + (a))
-#define isa_readl(a) readl(__ISA_IO_base + (a))
-#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
-#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
-#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
-#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
-#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
-#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
+#define isa_readb(a) readb(__ISA_IO_base + (a))
+#define isa_readw(a) readw(__ISA_IO_base + (a))
+#define isa_readl(a) readl(__ISA_IO_base + (a))
+#define isa_readq(a) readq(__ISA_IO_base + (a))
+#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
+#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
+#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
+#define isa_writeq(q,a) writeq(q,__ISA_IO_base + (a))
+#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
+#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
+#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
/*
* We don't have csum_partial_copy_fromio() yet, so we cheat here and
@@ -287,7 +347,7 @@
* Returns 1 on a match.
*/
static inline int check_signature(unsigned long io_addr,
- const unsigned char *signature, int length)
+ const unsigned char *signature, int length)
{
int retval = 0;
do {
@@ -314,8 +374,7 @@
* This function is deprecated. New drivers should use ioremap and
* check_signature.
*/
-#define isa_check_signature(io, s, l) check_signature(i,s,l)
-
+#define isa_check_signature(io, s, l) check_signature(i,s,l)
#define outb(val,port) \
do { \
@@ -324,7 +383,7 @@
#define outw(val,port) \
do { \
- *(volatile u16 *)(mips_io_port_base + (port)) = __ioswab16(val); \
+ *(volatile u16 *)(mips_io_port_base + (port)) = __ioswab16(val);\
} while(0)
#define outl(val,port) \
@@ -350,13 +409,6 @@
SLOW_DOWN_IO; \
} while(0)
-#define inb(port) __inb(port)
-#define inw(port) __inw(port)
-#define inl(port) __inl(port)
-#define inb_p(port) __inb_p(port)
-#define inw_p(port) __inw_p(port)
-#define inl_p(port) __inl_p(port)
-
static inline unsigned char __inb(unsigned long port)
{
return __ioswab8(*(volatile u8 *)(mips_io_port_base + port));
@@ -401,12 +453,12 @@
return __ioswab32(__val);
}
-#define outsb(port, addr, count) __outsb(port, addr, count)
-#define insb(port, addr, count) __insb(port, addr, count)
-#define outsw(port, addr, count) __outsw(port, addr, count)
-#define insw(port, addr, count) __insw(port, addr, count)
-#define outsl(port, addr, count) __outsl(port, addr, count)
-#define insl(port, addr, count) __insl(port, addr, count)
+#define inb(port) __inb(port)
+#define inw(port) __inw(port)
+#define inl(port) __inl(port)
+#define inb_p(port) __inb_p(port)
+#define inw_p(port) __inw_p(port)
+#define inl_p(port) __inl_p(port)
static inline void __outsb(unsigned long port, void *addr, unsigned int count)
{
@@ -456,6 +508,13 @@
}
}
+#define outsb(port, addr, count) __outsb(port, addr, count)
+#define insb(port, addr, count) __insb(port, addr, count)
+#define outsw(port, addr, count) __outsw(port, addr, count)
+#define insw(port, addr, count) __insw(port, addr, count)
+#define outsl(port, addr, count) __outsl(port, addr, count)
+#define insl(port, addr, count) __insl(port, addr, count)
+
/*
* The caches on some architectures aren't dma-coherent and have need to
* handle this in software. There are three types of operations that
@@ -480,9 +539,9 @@
extern void (*_dma_cache_wback)(unsigned long start, unsigned long size);
extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-#define dma_cache_wback_inv(start, size)_dma_cache_wback_inv(start,size)
-#define dma_cache_wback(start, size) _dma_cache_wback(start,size)
-#define dma_cache_inv(start, size) _dma_cache_inv(start,size)
+#define dma_cache_wback_inv(start, size) _dma_cache_wback_inv(start,size)
+#define dma_cache_wback(start, size) _dma_cache_wback(start,size)
+#define dma_cache_inv(start, size) _dma_cache_inv(start,size)
#else /* Sane hardware */
@@ -494,5 +553,19 @@
do { (void) (start); (void) (size); } while (0)
#endif /* CONFIG_NONCOHERENT_IO */
+
+/*
+ * Read a 32-bit register that requires a 64-bit read cycle on the bus.
+ * Avoid interrupt mucking, just adjust the address for 4-byte access.
+ * Assume the addresses are 8-byte aligned.
+ */
+#ifdef __MIPSEB__
+#define __CSR_32_ADJUST 4
+#else
+#define __CSR_32_ADJUST 0
+#endif
+
+#define csr_out32(v,a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
+#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
#endif /* _ASM_IO_H */
diff -Nru a/include/asm-mips/ioctl.h b/include/asm-mips/ioctl.h
--- a/include/asm-mips/ioctl.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/ioctl.h Sun Aug 3 13:14:45 2003
@@ -1,14 +1,12 @@
/*
- * Linux ioctl() stuff.
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 2001 by Ralf Baechle
+ * Copyright (C) 1995, 96, 99, 2001 Ralf Baechle
*/
-#ifndef __ASM_MIPS_IOCTL_H
-#define __ASM_MIPS_IOCTL_H
+#ifndef _ASM_IOCTL_H
+#define _ASM_IOCTL_H
/*
* The original linux ioctl numbering scheme was just a general
@@ -40,6 +38,11 @@
#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
/*
+ * We to additionally limit parameters to a maximum 255 bytes.
+ */
+#define _IOC_SLMASK 0xff
+
+/*
* Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit.
* And this turns out useful to catch old ioctl numbers in header
* files for us.
@@ -82,4 +85,4 @@
#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
-#endif /* __ASM_MIPS_IOCTL_H */
+#endif /* _ASM_IOCTL_H */
diff -Nru a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/ip32/crime.h Sun Aug 3 13:14:51 2003
@@ -0,0 +1,228 @@
+/*
+ * Definitions for the SGI O2 Crime chip.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ */
+
+#ifndef __ASM_CRIME_H__
+#define __ASM_CRIME_H__
+
+#include <asm/types.h>
+#include <asm/addrspace.h>
+
+/*
+ * Address map
+ */
+#ifndef __ASSEMBLY__
+#define CRIME_BASE KSEG1ADDR(0x14000000)
+#else
+#define CRIME_BASE 0xffffffffb4000000
+#endif
+
+#ifndef __ASSEMBLY__
+static inline u64 crime_read_64 (unsigned long __offset) {
+ return *((volatile u64 *) (CRIME_BASE + __offset));
+}
+static inline void crime_write_64 (unsigned long __offset, u64 __val) {
+ *((volatile u64 *) (CRIME_BASE + __offset)) = __val;
+}
+#endif
+
+#undef BIT
+#define BIT(x) (1UL << (x))
+
+/* All CRIME registers are 64 bits */
+#define CRIME_ID 0
+
+#define CRIME_ID_MASK 0xff
+#define CRIME_ID_IDBITS 0xf0
+#define CRIME_ID_IDVALUE 0xa0
+#define CRIME_ID_REV 0x0f
+
+#define CRIME_REV_PETTY 0x00
+#define CRIME_REV_11 0x11
+#define CRIME_REV_13 0x13
+#define CRIME_REV_14 0x14
+
+#define CRIME_CONTROL (0x00000008)
+#define CRIME_CONTROL_MASK 0x3fff /* 14-bit registers */
+
+/* CRIME_CONTROL register bits */
+#define CRIME_CONTROL_TRITON_SYSADC 0x2000
+#define CRIME_CONTROL_CRIME_SYSADC 0x1000
+#define CRIME_CONTROL_HARD_RESET 0x0800
+#define CRIME_CONTROL_SOFT_RESET 0x0400
+#define CRIME_CONTROL_DOG_ENA 0x0200
+#define CRIME_CONTROL_ENDIANESS 0x0100
+
+#define CRIME_CONTROL_ENDIAN_BIG 0x0100
+#define CRIME_CONTROL_ENDIAN_LITTLE 0x0000
+
+#define CRIME_CONTROL_CQUEUE_HWM 0x000f
+#define CRIME_CONTROL_CQUEUE_SHFT 0
+#define CRIME_CONTROL_WBUF_HWM 0x00f0
+#define CRIME_CONTROL_WBUF_SHFT 8
+
+#define CRIME_INT_STAT (0x00000010)
+#define CRIME_INT_MASK (0x00000018)
+#define CRIME_SOFT_INT (0x00000020)
+#define CRIME_HARD_INT (0x00000028)
+
+/* Bits in CRIME_INT_XXX and CRIME_HARD_INT */
+#define MACE_VID_IN1_INT BIT (0)
+#define MACE_VID_IN2_INT BIT (1)
+#define MACE_VID_OUT_INT BIT (2)
+#define MACE_ETHERNET_INT BIT (3)
+#define MACE_SUPERIO_INT BIT (4)
+#define MACE_MISC_INT BIT (5)
+#define MACE_AUDIO_INT BIT (6)
+#define MACE_PCI_BRIDGE_INT BIT (7)
+#define MACEPCI_SCSI0_INT BIT (8)
+#define MACEPCI_SCSI1_INT BIT (9)
+#define MACEPCI_SLOT0_INT BIT (10)
+#define MACEPCI_SLOT1_INT BIT (11)
+#define MACEPCI_SLOT2_INT BIT (12)
+#define MACEPCI_SHARED0_INT BIT (13)
+#define MACEPCI_SHARED1_INT BIT (14)
+#define MACEPCI_SHARED2_INT BIT (15)
+#define CRIME_GBE0_INT BIT (16)
+#define CRIME_GBE1_INT BIT (17)
+#define CRIME_GBE2_INT BIT (18)
+#define CRIME_GBE3_INT BIT (19)
+#define CRIME_CPUERR_INT BIT (20)
+#define CRIME_MEMERR_INT BIT (21)
+#define CRIME_RE_EMPTY_E_INT BIT (22)
+#define CRIME_RE_FULL_E_INT BIT (23)
+#define CRIME_RE_IDLE_E_INT BIT (24)
+#define CRIME_RE_EMPTY_L_INT BIT (25)
+#define CRIME_RE_FULL_L_INT BIT (26)
+#define CRIME_RE_IDLE_L_INT BIT (27)
+#define CRIME_SOFT0_INT BIT (28)
+#define CRIME_SOFT1_INT BIT (29)
+#define CRIME_SOFT2_INT BIT (30)
+#define CRIME_SYSCORERR_INT CRIME_SOFT2_INT
+#define CRIME_VICE_INT BIT (31)
+
+/* Masks for deciding who handles the interrupt */
+#define CRIME_MACE_INT_MASK 0x8f
+#define CRIME_MACEISA_INT_MASK 0x70
+#define CRIME_MACEPCI_INT_MASK 0xff00
+#define CRIME_CRIME_INT_MASK 0xffff0000
+
+/*
+ * XXX Todo
+ */
+#define CRIME_DOG (0x00000030)
+/* We are word-play compatible but not misspelling compatible */
+#define MC_GRUFF CRIME_DOG
+#define CRIME_DOG_MASK (0x001fffff)
+
+/* CRIME_DOG register bits */
+#define CRIME_DOG_POWER_ON_RESET (0x00010000)
+#define CRIME_DOG_WARM_RESET (0x00080000)
+#define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET)
+#define CRIME_DOG_VALUE (0x00007fff) /* ??? */
+
+#define CRIME_TIME (0x00000038)
+#define CRIME_TIME_MASK (0x0000ffffffffffff)
+
+#ifdef MASTER_FREQ
+#undef MASTER_FREQ
+#endif
+#define CRIME_MASTER_FREQ 66666500 /* Crime upcounter frequency */
+#define CRIME_NS_PER_TICK 15 /* for delay_calibrate */
+
+#define CRIME_CPU_ERROR_ADDR (0x00000040)
+#define CRIME_CPU_ERROR_ADDR_MASK (0x3ffffffff)
+
+#define CRIME_CPU_ERROR_STAT (0x00000048)
+/* REV_PETTY only! */
+#define CRIME_CPU_ERROR_ENA (0x00000050)
+
+/*
+ * bit definitions for CRIME/VICE error status and enable registers
+ */
+#define CRIME_CPU_ERROR_MASK 0x7UL /* cpu error stat is 3 bits */
+#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4
+#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2
+#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1
+
+/*
+ * these are the definitions for the error status/enable register in
+ * petty crime. Note that the enable register does not exist in crime
+ * rev 1 and above.
+ */
+#define CRIME_CPU_ERROR_MASK_REV0 0x3ff /* cpu error stat is 9 bits */
+#define CRIME_CPU_ERROR_CPU_INV_ADDR_RD 0x200
+#define CRIME_CPU_ERROR_VICE_II 0x100
+#define CRIME_CPU_ERROR_VICE_SYSAD 0x80
+#define CRIME_CPU_ERROR_VICE_SYSCMD 0x40
+#define CRIME_CPU_ERROR_VICE_INV_ADDR 0x20
+#define CRIME_CPU_ERROR_CPU_II 0x10
+#define CRIME_CPU_ERROR_CPU_SYSAD 0x8
+#define CRIME_CPU_ERROR_CPU_SYSCMD 0x4
+#define CRIME_CPU_ERROR_CPU_INV_ADDR_WR 0x2
+#define CRIME_CPU_ERROR_CPU_INV_REG_ADDR 0x1
+
+#define CRIME_VICE_ERROR_ADDR (0x00000058)
+#define CRIME_VICE_ERROR_ADDR_MASK (0x3fffffff)
+
+#define CRIME_MEM_CONTROL (0x00000200)
+#define CRIME_MEM_CONTROL_MASK 0x3 /* 25 cent register */
+#define CRIME_MEM_CONTROL_ECC_ENA 0x1
+#define CRIME_MEM_CONTROL_USE_ECC_REPL 0x2
+
+/*
+ * macros for CRIME memory bank control registers.
+ */
+#define CRIME_MEM_BANK_CONTROL(__bank) (0x00000208 + ((__bank) << 3))
+#define CRIME_MEM_BANK_CONTROL_MASK 0x11f /* 9 bits 7:5 reserved */
+#define CRIME_MEM_BANK_CONTROL_ADDR 0x01f
+#define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100
+
+#define CRIME_MEM_REFRESH_COUNTER (0x00000248)
+#define CRIME_MEM_REFRESH_COUNTER_MASK 0x7ff /* 11-bit register */
+
+#define CRIME_MAXBANKS 8
+
+/*
+ * CRIME Memory error status register bit definitions
+ */
+#define CRIME_MEM_ERROR_STAT (0x00000250)
+#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */
+#define CRIME_MEM_ERROR_MACE_ID 0x0000007f
+#define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080
+#define CRIME_MEM_ERROR_RE_ID 0x00007f00
+#define CRIME_MEM_ERROR_RE_ACCESS 0x00008000
+#define CRIME_MEM_ERROR_GBE_ACCESS 0x00010000
+#define CRIME_MEM_ERROR_VICE_ACCESS 0x00020000
+#define CRIME_MEM_ERROR_CPU_ACCESS 0x00040000
+#define CRIME_MEM_ERROR_RESERVED 0x00080000
+#define CRIME_MEM_ERROR_SOFT_ERR 0x00100000
+#define CRIME_MEM_ERROR_HARD_ERR 0x00200000
+#define CRIME_MEM_ERROR_MULTIPLE 0x00400000
+#define CRIME_MEM_ERROR_ECC 0x01800000
+#define CRIME_MEM_ERROR_MEM_ECC_RD 0x00800000
+#define CRIME_MEM_ERROR_MEM_ECC_RMW 0x01000000
+#define CRIME_MEM_ERROR_INV 0x0e000000
+#define CRIME_MEM_ERROR_INV_MEM_ADDR_RD 0x02000000
+#define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000
+#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000
+
+#define CRIME_MEM_ERROR_ADDR (0x00000258)
+#define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff
+
+#define CRIME_MEM_ERROR_ECC_SYN (0x00000260)
+#define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff
+
+#define CRIME_MEM_ERROR_ECC_CHK (0x00000268)
+#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff
+
+#define CRIME_MEM_ERROR_ECC_REPL (0x00000270)
+#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
+
+#endif /* __ASM_CRIME_H__ */
diff -Nru a/include/asm-mips/ip32/ip32_ints.h b/include/asm-mips/ip32/ip32_ints.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/ip32/ip32_ints.h Sun Aug 3 13:14:52 2003
@@ -0,0 +1,94 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ */
+
+#ifndef __ASM_IP32_INTS_H
+#define __ASM_IP32_INTS_H
+
+/*
+ * This list reflects the assignment of interrupt numbers to
+ * interrupting events. Order is fairly irrelevant to handling
+ * priority. This differs from irix.
+ */
+
+/* CPU */
+#define CLOCK_IRQ 0
+
+/* MACE */
+#define MACE_VID_IN1_IRQ 1
+#define MACE_VID_IN2_IRQ 2
+#define MACE_VID_OUT_IRQ 3
+#define MACE_ETHERNET_IRQ 4
+/* SUPERIO, MISC, and AUDIO are MACEISA */
+#define MACE_PCI_BRIDGE_IRQ 8
+
+/* MACEPCI */
+#define MACEPCI_SCSI0_IRQ 9
+#define MACEPCI_SCSI1_IRQ 10
+#define MACEPCI_SLOT0_IRQ 11
+#define MACEPCI_SLOT1_IRQ 12
+#define MACEPCI_SLOT2_IRQ 13
+#define MACEPCI_SHARED0_IRQ 14
+#define MACEPCI_SHARED1_IRQ 15
+#define MACEPCI_SHARED2_IRQ 16
+
+/* CRIME */
+#define CRIME_GBE0_IRQ 17
+#define CRIME_GBE1_IRQ 18
+#define CRIME_GBE2_IRQ 19
+#define CRIME_GBE3_IRQ 20
+#define CRIME_CPUERR_IRQ 21
+#define CRIME_MEMERR_IRQ 22
+#define CRIME_RE_EMPTY_E_IRQ 23
+#define CRIME_RE_FULL_E_IRQ 24
+#define CRIME_RE_IDLE_E_IRQ 25
+#define CRIME_RE_EMPTY_L_IRQ 26
+#define CRIME_RE_FULL_L_IRQ 27
+#define CRIME_RE_IDLE_L_IRQ 28
+#define CRIME_SOFT0_IRQ 29
+#define CRIME_SOFT1_IRQ 30
+#define CRIME_SOFT2_IRQ 31
+#define CRIME_SYSCORERR_IRQ CRIME_SOFT2_IRQ
+#define CRIME_VICE_IRQ 32
+
+/* MACEISA */
+#define MACEISA_AUDIO_SW_IRQ 33
+#define MACEISA_AUDIO_SC_IRQ 34
+#define MACEISA_AUDIO1_DMAT_IRQ 35
+#define MACEISA_AUDIO1_OF_IRQ 36
+#define MACEISA_AUDIO2_DMAT_IRQ 37
+#define MACEISA_AUDIO2_MERR_IRQ 38
+#define MACEISA_AUDIO3_DMAT_IRQ 39
+#define MACEISA_AUDIO3_MERR_IRQ 40
+#define MACEISA_RTC_IRQ 41
+#define MACEISA_KEYB_IRQ 42
+/* MACEISA_KEYB_POLL is not an IRQ */
+#define MACEISA_MOUSE_IRQ 44
+/* MACEISA_MOUSE_POLL is not an IRQ */
+#define MACEISA_TIMER0_IRQ 46
+#define MACEISA_TIMER1_IRQ 47
+#define MACEISA_TIMER2_IRQ 48
+#define MACEISA_PARALLEL_IRQ 49
+#define MACEISA_PAR_CTXA_IRQ 50
+#define MACEISA_PAR_CTXB_IRQ 51
+#define MACEISA_PAR_MERR_IRQ 52
+#define MACEISA_SERIAL1_IRQ 53
+#define MACEISA_SERIAL1_TDMAT_IRQ 54
+#define MACEISA_SERIAL1_TDMAPR_IRQ 55
+#define MACEISA_SERIAL1_TDMAME_IRQ 56
+#define MACEISA_SERIAL1_RDMAT_IRQ 57
+#define MACEISA_SERIAL1_RDMAOR_IRQ 58
+#define MACEISA_SERIAL2_IRQ 59
+#define MACEISA_SERIAL2_TDMAT_IRQ 60
+#define MACEISA_SERIAL2_TDMAPR_IRQ 61
+#define MACEISA_SERIAL2_TDMAME_IRQ 62
+#define MACEISA_SERIAL2_RDMAT_IRQ 63
+#define MACEISA_SERIAL2_RDMAOR_IRQ 64
+
+#define IP32_IRQ_MAX MACEISA_SERIAL2_RDMAOR_IRQ
+
+#endif /* __ASM_IP32_INTS_H */
diff -Nru a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/ip32/mace.h Sun Aug 3 13:14:47 2003
@@ -0,0 +1,313 @@
+/*
+ * Definitions for the SGI O2 Mace chip.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Harald Koerfgen
+ */
+
+#ifndef __ASM_MACE_H__
+#define __ASM_MACE_H__
+
+#include <asm/addrspace.h>
+#include <asm/system.h>
+/*
+ * Address map
+ */
+#define MACE_BASE KSEG1ADDR(0x1f000000)
+#define MACE_PCI (0x00080000)
+#define MACE_VIN1 (0x00100000)
+#define MACE_VIN2 (0x00180000)
+#define MACE_VOUT (0x00200000)
+#define MACE_ENET (0x00280000)
+#define MACE_PERIF (0x00300000)
+#define MACE_ISA_EXT (0x00380000)
+
+#define MACE_AUDIO_BASE (MACE_PERIF )
+#define MACE_ISA_BASE (MACE_PERIF + 0x00010000)
+#define MACE_KBDMS_BASE (MACE_PERIF + 0x00020000)
+#define MACE_I2C_BASE (MACE_PERIF + 0x00030000)
+#define MACE_UST_BASE (MACE_PERIF + 0x00040000)
+
+
+#undef BIT
+#define BIT(__bit_offset) (1UL << (__bit_offset))
+
+/*
+ * Mace MACEPCI interface, 32 bit regs
+ */
+#define MACEPCI_ERROR_ADDR (MACE_PCI )
+#define MACEPCI_ERROR_FLAGS (MACE_PCI + 0x00000004)
+#define MACEPCI_CONTROL (MACE_PCI + 0x00000008)
+#define MACEPCI_REV (MACE_PCI + 0x0000000c)
+#define MACEPCI_WFLUSH (MACE_PCI + 0x0000000c) /* ??? --IV !!! It's for flushing read buffers on PCI MEMORY accesses!!! */
+#define MACEPCI_CONFIG_ADDR (MACE_PCI + 0x00000cf8)
+#define MACEPCI_CONFIG_DATA (MACE_PCI + 0x00000cfc)
+#define MACEPCI_LOW_MEMORY 0x1a000000
+#define MACEPCI_LOW_IO 0x18000000
+#define MACEPCI_SWAPPED_VIEW 0
+#define MACEPCI_NATIVE_VIEW 0x40000000
+#define MACEPCI_IO 0x80000000
+/*#define MACEPCI_HI_MEMORY 0x0000000280000000UL * This mipght be just 0x0000000200000000UL 2G more :) (or maybe it is different between 1.1 & 1.5 */
+#define MACEPCI_HI_MEMORY 0x0000000200000000UL /* This mipght be just 0x0000000200000000UL 2G more :) (or maybe it is different between 1.1 & 1.5 */
+#define MACEPCI_HI_IO 0x0000000100000000UL
+
+/*
+ * Bits in the MACEPCI_CONTROL register
+ */
+#define MACEPCI_CONTROL_INT(x) BIT(x)
+#define MACEPCI_CONTROL_INT_MASK 0xff
+#define MACEPCI_CONTROL_SERR_ENA BIT(8)
+#define MACEPCI_CONTROL_ARB_N6 BIT(9)
+#define MACEPCI_CONTROL_PARITY_ERR BIT(10)
+#define MACEPCI_CONTROL_MRMRA_ENA BIT(11)
+#define MACEPCI_CONTROL_ARB_N3 BIT(12)
+#define MACEPCI_CONTROL_ARB_N4 BIT(13)
+#define MACEPCI_CONTROL_ARB_N5 BIT(14)
+#define MACEPCI_CONTROL_PARK_LIU BIT(15)
+#define MACEPCI_CONTROL_INV_INT(x) BIT(16+x)
+#define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
+#define MACEPCI_CONTROL_OVERRUN_INT BIT(24)
+#define MACEPCI_CONTROL_PARITY_INT BIT(25)
+#define MACEPCI_CONTROL_SERR_INT BIT(26)
+#define MACEPCI_CONTROL_IT_INT BIT(27)
+#define MACEPCI_CONTROL_RE_INT BIT(28)
+#define MACEPCI_CONTROL_DPED_INT BIT(29)
+#define MACEPCI_CONTROL_TAR_INT BIT(30)
+#define MACEPCI_CONTROL_MAR_INT BIT(31)
+
+/*
+ * Bits in the MACE_PCI error register
+ */
+#define MACEPCI_ERROR_MASTER_ABORT BIT(31)
+#define MACEPCI_ERROR_TARGET_ABORT BIT(30)
+#define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29)
+#define MACEPCI_ERROR_RETRY_ERR BIT(28)
+#define MACEPCI_ERROR_ILLEGAL_CMD BIT(27)
+#define MACEPCI_ERROR_SYSTEM_ERR BIT(26)
+#define MACEPCI_ERROR_INTERRUPT_TEST BIT(25)
+#define MACEPCI_ERROR_PARITY_ERR BIT(24)
+#define MACEPCI_ERROR_OVERRUN BIT(23)
+#define MACEPCI_ERROR_RSVD BIT(22)
+#define MACEPCI_ERROR_MEMORY_ADDR BIT(21)
+#define MACEPCI_ERROR_CONFIG_ADDR BIT(20)
+#define MACEPCI_ERROR_MASTER_ABORT_ADDR_VALID BIT(19)
+#define MACEPCI_ERROR_TARGET_ABORT_ADDR_VALID BIT(18)
+#define MACEPCI_ERROR_DATA_PARITY_ADDR_VALID BIT(17)
+#define MACEPCI_ERROR_RETRY_ADDR_VALID BIT(16)
+#define MACEPCI_ERROR_SIG_TABORT BIT(4)
+#define MACEPCI_ERROR_DEVSEL_MASK 0xc0
+#define MACEPCI_ERROR_DEVSEL_FAST 0
+#define MACEPCI_ERROR_DEVSEL_MED 0x40
+#define MACEPCI_ERROR_DEVSEL_SLOW 0x80
+#define MACEPCI_ERROR_FBB BIT(1)
+#define MACEPCI_ERROR_66MHZ BIT(0)
+
+/*
+ * Mace timer registers - 64 bit regs (63:32 are UST, 31:0 are MSC)
+ */
+#define MSC_PART(__reg) ((__reg) & 0x00000000ffffffff)
+#define UST_PART(__reg) (((__reg) & 0xffffffff00000000) >> 32)
+
+#define MACE_UST_UST (MACE_UST_BASE ) /* Universial system time */
+#define MACE_UST_COMPARE1 (MACE_UST_BASE + 0x00000008) /* Interrupt compare reg 1 */
+#define MACE_UST_COMPARE2 (MACE_UST_BASE + 0x00000010) /* Interrupt compare reg 2 */
+#define MACE_UST_COMPARE3 (MACE_UST_BASE + 0x00000018) /* Interrupt compare reg 3 */
+#define MACE_UST_PERIOD_NS 960 /* UST Period in ns */
+
+#define MACE_UST_AIN_MSC (MACE_UST_BASE + 0x00000020) /* Audio in MSC/UST pair */
+#define MACE_UST_AOUT1_MSC (MACE_UST_BASE + 0x00000028) /* Audio out 1 MSC/UST pair */
+#define MACE_UST_AOUT2_MSC (MACE_UST_BASE + 0x00000030) /* Audio out 2 MSC/UST pair */
+#define MACE_VIN1_MSC_UST (MACE_UST_BASE + 0x00000038) /* Video In 1 MSC/UST pair */
+#define MACE_VIN2_MSC_UST (MACE_UST_BASE + 0x00000040) /* Video In 2 MSC/UST pair */
+#define MACE_VOUT_MSC_UST (MACE_UST_BASE + 0x00000048) /* Video out MSC/UST pair */
+
+/*
+ * Mace "ISA" peripherals
+ */
+#define MACEISA_EPP_BASE (MACE_ISA_EXT )
+#define MACEISA_ECP_BASE (MACE_ISA_EXT + 0x00008000)
+#define MACEISA_SER1_BASE (MACE_ISA_EXT + 0x00010000)
+#define MACEISA_SER1_REGS (MACE_ISA_BASE + 0x00020000)
+#define MACEISA_SER2_BASE (MACE_ISA_EXT + 0x00018000)
+#define MACEISA_SER2_REGS (MACE_ISA_BASE + 0x00030000)
+#define MACEISA_RTC_BASE (MACE_ISA_EXT + 0x00020000)
+#define MACEISA_GAME_BASE (MACE_ISA_EXT + 0x00030000)
+
+/*
+ * Ringbase address and reset register - 64 bits
+ */
+#define MACEISA_RINGBASE MACE_ISA_BASE
+/* Ring buffers occupy 8 4K buffers */
+#define MACEISA_RINGBUFFERS_SIZE 8*4*1024
+
+/*
+ * Flash-ROM/LED/DP-RAM/NIC Controller Register - 64 bits (?)
+ */
+#define MACEISA_FLASH_NIC_REG (MACE_ISA_BASE + 0x00000008)
+
+/*
+ * Bit definitions for that
+ */
+#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
+#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
+#define MACEISA_NIC_DEASSERT BIT(2)
+#define MACEISA_NIC_DATA BIT(3)
+#define MACEISA_LED_RED BIT(4) /* 0=> Illuminate RED LED */
+#define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate GREEN LED */
+#define MACEISA_DP_RAM_ENABLE BIT(6)
+
+/*
+ * ISA interrupt and status registers - 32 bit
+ */
+#define MACEISA_INT_STAT (MACE_ISA_BASE + 0x00000014)
+#define MACEISA_INT_MASK (MACE_ISA_BASE + 0x0000001c)
+
+/*
+ * Bits in the status/mask registers
+ */
+#define MACEISA_AUDIO_SW_INT BIT (0)
+#define MACEISA_AUDIO_SC_INT BIT (1)
+#define MACEISA_AUDIO1_DMAT_INT BIT (2)
+#define MACEISA_AUDIO1_OF_INT BIT (3)
+#define MACEISA_AUDIO2_DMAT_INT BIT (4)
+#define MACEISA_AUDIO2_MERR_INT BIT (5)
+#define MACEISA_AUDIO3_DMAT_INT BIT (6)
+#define MACEISA_AUDIO3_MERR_INT BIT (7)
+#define MACEISA_RTC_INT BIT (8)
+#define MACEISA_KEYB_INT BIT (9)
+#define MACEISA_KEYB_POLL_INT BIT (10)
+#define MACEISA_MOUSE_INT BIT (11)
+#define MACEISA_MOUSE_POLL_INT BIT (12)
+#define MACEISA_TIMER0_INT BIT (13)
+#define MACEISA_TIMER1_INT BIT (14)
+#define MACEISA_TIMER2_INT BIT (15)
+#define MACEISA_PARALLEL_INT BIT (16)
+#define MACEISA_PAR_CTXA_INT BIT (17)
+#define MACEISA_PAR_CTXB_INT BIT (18)
+#define MACEISA_PAR_MERR_INT BIT (19)
+#define MACEISA_SERIAL1_INT BIT (20)
+#define MACEISA_SERIAL1_TDMAT_INT BIT (21)
+#define MACEISA_SERIAL1_TDMAPR_INT BIT (22)
+#define MACEISA_SERIAL1_TDMAME_INT BIT (23)
+#define MACEISA_SERIAL1_RDMAT_INT BIT (24)
+#define MACEISA_SERIAL1_RDMAOR_INT BIT (25)
+#define MACEISA_SERIAL2_INT BIT (26)
+#define MACEISA_SERIAL2_TDMAT_INT BIT (27)
+#define MACEISA_SERIAL2_TDMAPR_INT BIT (28)
+#define MACEISA_SERIAL2_TDMAME_INT BIT (29)
+#define MACEISA_SERIAL2_RDMAT_INT BIT (30)
+#define MACEISA_SERIAL2_RDMAOR_INT BIT (31)
+
+#define MACEI2C_CONFIG MACE_I2C_BASE
+#define MACEI2C_CONTROL (MACE_I2C_BASE|0x10)
+#define MACEI2C_DATA (MACE_I2C_BASE|0x18)
+
+/* Bits for I2C_CONFIG */
+#define MACEI2C_RESET BIT(0)
+#define MACEI2C_FAST BIT(1)
+#define MACEI2C_DATA_OVERRIDE BIT(2)
+#define MACEI2C_CLOCK_OVERRIDE BIT(3)
+#define MACEI2C_DATA_STATUS BIT(4)
+#define MACEI2C_CLOCK_STATUS BIT(5)
+
+/* Bits for I2C_CONTROL */
+#define MACEI2C_NOT_IDLE BIT(0) /* write: 0=force idle
+ * read: 0=idle 1=not idle */
+#define MACEI2C_DIR BIT(1) /* 0=write 1=read */
+#define MACEI2C_MORE_BYTES BIT(2) /* 0=last byte 1=more bytes */
+#define MACEI2C_TRANS_BUSY BIT(4) /* 0=trans done 1=trans busy */
+#define MACEI2C_NACK BIT(5) /* 0=ack received 1=ack not */
+#define MACEI2C_BUS_ERROR BIT(7) /* 0=no bus err 1=bus err */
+
+
+#define MACEISA_AUDIO_INT (MACEISA_AUDIO_SW_INT | \
+ MACEISA_AUDIO_SC_INT | \
+ MACEISA_AUDIO1_DMAT_INT | \
+ MACEISA_AUDIO1_OF_INT | \
+ MACEISA_AUDIO2_DMAT_INT | \
+ MACEISA_AUDIO2_MERR_INT | \
+ MACEISA_AUDIO3_DMAT_INT | \
+ MACEISA_AUDIO3_MERR_INT)
+#define MACEISA_MISC_INT (MACEISA_RTC_INT | \
+ MACEISA_KEYB_INT | \
+ MACEISA_KEYB_POLL_INT | \
+ MACEISA_MOUSE_INT | \
+ MACEISA_MOUSE_POLL_INT | \
+ MACEISA_TIMER0_INT | \
+ MACEISA_TIMER1_INT | \
+ MACEISA_TIMER2_INT)
+#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \
+ MACEISA_PAR_CTXA_INT | \
+ MACEISA_PAR_CTXB_INT | \
+ MACEISA_PAR_MERR_INT | \
+ MACEISA_SERIAL1_INT | \
+ MACEISA_SERIAL1_TDMAT_INT | \
+ MACEISA_SERIAL1_TDMAPR_INT | \
+ MACEISA_SERIAL1_TDMAME_INT | \
+ MACEISA_SERIAL1_RDMAT_INT | \
+ MACEISA_SERIAL1_RDMAOR_INT | \
+ MACEISA_SERIAL2_INT | \
+ MACEISA_SERIAL2_TDMAT_INT | \
+ MACEISA_SERIAL2_TDMAPR_INT | \
+ MACEISA_SERIAL2_TDMAME_INT | \
+ MACEISA_SERIAL2_RDMAT_INT | \
+ MACEISA_SERIAL2_RDMAOR_INT)
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+
+/*
+ * XXX Some of these are probably not needed (or even legal?)
+ */
+static inline u8 mace_read_8 (unsigned long __offset)
+{
+ return *((volatile u8 *) (MACE_BASE + __offset));
+}
+
+static inline u16 mace_read_16 (unsigned long __offset)
+{
+ return *((volatile u16 *) (MACE_BASE + __offset));
+}
+
+static inline u32 mace_read_32 (unsigned long __offset)
+{
+ return *((volatile u32 *) (MACE_BASE + __offset));
+}
+
+static inline u64 mace_read_64 (unsigned long __offset)
+{
+ return *((volatile u64 *) (MACE_BASE + __offset));
+}
+
+static inline void mace_write_8 (unsigned long __offset, u8 __val)
+{
+ *((volatile u8 *) (MACE_BASE + __offset)) = __val;
+}
+
+static inline void mace_write_16 (unsigned long __offset, u16 __val)
+{
+ *((volatile u16 *) (MACE_BASE + __offset)) = __val;
+}
+
+static inline void mace_write_32 (unsigned long __offset, u32 __val)
+{
+ *((volatile u32 *) (MACE_BASE + __offset)) = __val;
+}
+
+static inline void mace_write_64 (unsigned long __offset, u64 __val)
+{
+ *((volatile u64 *) (MACE_BASE + __offset)) = __val;
+}
+
+/* Call it whenever device needs to read data from main memory coherently */
+static inline void mace_inv_read_buffers(void)
+{
+/* mace_write_32(MACEPCI_WFLUSH,0xffffffff);*/
+}
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __ASM_MACE_H__ */
diff -Nru a/include/asm-mips/ip32/machine.h b/include/asm-mips/ip32/machine.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/ip32/machine.h Sun Aug 3 13:14:51 2003
@@ -0,0 +1,21 @@
+/*
+ * machine.h -- Machine/group probing for ip32
+ *
+ * Copyright (C) 2001 Keith M Wesolowski
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+#ifndef _ASM_IP32_MACHINE_H
+#define _ASM_IP32_MACHINE_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SGI_IP32
+
+#define SGI_MACH_O2 0x3201
+
+#endif /* CONFIG_SGI_IP32 */
+
+#endif /* _ASM_SGI_MACHINE_H */
diff -Nru a/include/asm-mips/ipc.h b/include/asm-mips/ipc.h
--- a/include/asm-mips/ipc.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/ipc.h Sun Aug 3 13:14:53 2003
@@ -1,5 +1,5 @@
-#ifndef __ASM_MIPS_IPC_H
-#define __ASM_MIPS_IPC_H
+#ifndef _ASM_IPC_H
+#define _ASM_IPC_H
/*
* These are used to wrap system calls on MIPS.
@@ -30,4 +30,4 @@
#define IPCCALL(version,op) ((version)<<16 | (op))
-#endif /* __ASM_MIPS_IPC_H */
+#endif /* _ASM_IPC_H */
diff -Nru a/include/asm-mips/irq.h b/include/asm-mips/irq.h
--- a/include/asm-mips/irq.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/irq.h Sun Aug 3 13:14:45 2003
@@ -13,8 +13,37 @@
#include <linux/config.h>
#include <linux/linkage.h>
+#include <asm/sn/arch.h>
-#define NR_IRQS 128 /* Largest number of ints of all machines. */
+#ifdef CONFIG_SGI_IP27
+
+#define NR_IRQS 256
+
+/*
+ * Number of levels in INT_PEND0. Can be set to 128 if we also
+ * consider INT_PEND1.
+ */
+#define PERNODE_LEVELS 64
+
+extern int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];
+
+/*
+ * we need to map irq's up to at least bit 7 of the INT_MASK0_A register
+ * since bits 0-6 are pre-allocated for other purposes.
+ */
+#define LEAST_LEVEL 7
+#define FAST_IRQ_TO_LEVEL(i) ((i) + LEAST_LEVEL)
+#define LEVEL_TO_IRQ(c, l) \
+ (node_level_to_irq[CPUID_TO_COMPACT_NODEID(c)][(l)])
+
+#else
+
+/*
+ * Largest number of ints of all machines except IP27
+ */
+#define NR_IRQS 128
+
+#endif
#ifdef CONFIG_I8259
static inline int irq_canonicalize(int irq)
diff -Nru a/include/asm-mips/irq_cpu.h b/include/asm-mips/irq_cpu.h
--- a/include/asm-mips/irq_cpu.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/irq_cpu.h Sun Aug 3 13:14:47 2003
@@ -10,9 +10,9 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-#ifndef __ASM_MIPS_IRQ_CPU_H
-#define __ASM_MIPS_IRQ_CPU_H
+#ifndef _ASM_IRQ_CPU_H
+#define _ASM_IRQ_CPU_H
extern void mips_cpu_irq_init(int irq_base);
-#endif /* __ASM_MIPS_IRQ_CPU_H */
+#endif /* _ASM_IRQ_CPU_H */
diff -Nru a/include/asm-mips/it8172/it8172.h b/include/asm-mips/it8172/it8172.h
--- a/include/asm-mips/it8172/it8172.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/it8172/it8172.h Sun Aug 3 13:14:50 2003
@@ -33,7 +33,7 @@
#include <asm/addrspace.h>
-#define IT8172_BASE 0x18000000
+#define IT8172_BASE 0x18000000
#define IT8172_PCI_IO_BASE 0x14000000
#define IT8172_PCI_MEM_BASE 0x10000000
@@ -99,18 +99,18 @@
// PCI to Internal/LPC Bus Bridge configuration header register offset
#define IT_P2I_BCR 0x4C
-#define IT_P2I_D0IOSC 0x50
+#define IT_P2I_D0IOSC 0x50
#define IT_P2I_D1IOSC 0x54
-#define IT_P2I_D2IOSC 0x58
-#define IT_P2I_D3IOSC 0x5C
-#define IT_P2I_D4IOSC 0x60
-#define IT_P2I_D5IOSC 0x64
-#define IT_P2I_D6IOSC 0x68
-#define IT_P2I_D7IOSC 0x6C
-#define IT_P2I_D8IOSC 0x70
-#define IT_P2I_D9IOSC 0x74
-#define IT_P2I_D10IOSC 0x78
-#define IT_P2I_D11IOSC 0x7C
+#define IT_P2I_D2IOSC 0x58
+#define IT_P2I_D3IOSC 0x5C
+#define IT_P2I_D4IOSC 0x60
+#define IT_P2I_D5IOSC 0x64
+#define IT_P2I_D6IOSC 0x68
+#define IT_P2I_D7IOSC 0x6C
+#define IT_P2I_D8IOSC 0x70
+#define IT_P2I_D9IOSC 0x74
+#define IT_P2I_D10IOSC 0x78
+#define IT_P2I_D11IOSC 0x7C
// Memory controller register offsets from IT8172_BASE
#define IT_MC_SDRMR 0x1000
@@ -134,10 +134,10 @@
#define IT_M68K_BSR 0x5D
#define IT_M68K_DTR 0x5F
-// Register offset from IT8172_PCI_IO_BASE
+// Register offset from IT8172_PCI_IO_BASE
// These registers are accessible through 8172 PCI IO window.
-// INTC
+// INTC
#define IT_INTC_BASE 0x10000
#define IT_INTC_LBDNIRR 0x10000
#define IT_INTC_LBDNIMR 0x10002
@@ -193,6 +193,8 @@
// IT8172 RTC
#define IT_RTC_BASE 0x14800
+#define IT_RTC_CENTURY 0x14808
+
#define IT_RTC_RIR0 0x00
#define IT_RTC_RTR0 0x01
#define IT_RTC_RIR1 0x02
diff -Nru a/include/asm-mips/it8172/it8172_cir.h b/include/asm-mips/it8172/it8172_cir.h
--- a/include/asm-mips/it8172/it8172_cir.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/it8172/it8172_cir.h Sun Aug 3 13:14:44 2003
@@ -54,7 +54,7 @@
#define CFQ_38_480 0xB /* 38 KHz low, 480 KHz high */
#define CIR_HCFS 0x20
#define CIR_SET_HS(x) (((x)&0x1)<<5)
-
+
/* Receiver Control Register */
#define CIR_SET_RXDCR(x) ((x)&0x7)
diff -Nru a/include/asm-mips/it8172/it8172_dbg.h b/include/asm-mips/it8172/it8172_dbg.h
--- a/include/asm-mips/it8172/it8172_dbg.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/it8172/it8172_dbg.h Sun Aug 3 13:14:46 2003
@@ -1,7 +1,7 @@
/*
*
* BRIEF MODULE DESCRIPTION
- * Function prototypes for low level uart routines to
+ * Function prototypes for low level uart routines to
* directly access a 16550 uart.
*
* Copyright 2000 MontaVista Software Inc.
diff -Nru a/include/asm-mips/it8172/it8172_int.h b/include/asm-mips/it8172/it8172_int.h
--- a/include/asm-mips/it8172/it8172_int.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/it8172/it8172_int.h Sun Aug 3 13:14:50 2003
@@ -102,14 +102,12 @@
#define IT8172_PMER_NMI_IRQ (IT8172_NMI_IRQ_BASE + 4)
#define IT8172_POWER_NMI_IRQ (IT8172_NMI_IRQ_BASE + 5)
+#define IT8172_LAST_IRQ (IT8172_POWER_NMI_IRQ)
/* Finally, let's move over here the mips cpu timer interrupt.
- * This is more or less strictly for statistics.
*/
-#define MIPS_CPU_TIMER_IRQ (IT8172_NMI_IRQ_BASE + 6)
+#define MIPS_CPU_TIMER_IRQ (NR_IRQS-1)
-#define IT8172_INT_END MIPS_CPU_TIMER_IRQ
-
-/*
+/*
* IT8172 Interrupt Controller Registers
*/
struct it8172_intc_regs {
diff -Nru a/include/asm-mips/it8712.h b/include/asm-mips/it8712.h
--- a/include/asm-mips/it8712.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/it8712.h Sun Aug 3 13:14:47 2003
@@ -4,7 +4,7 @@
#define LPC_BASE_ADDR 0x14000000
-// MB PnP configuration register
+// MB PnP configuration register
#define LPC_KEY_ADDR 0x1400002E
#define LPC_DATA_ADDR 0x1400002F
diff -Nru a/include/asm-mips/jazz.h b/include/asm-mips/jazz.h
--- a/include/asm-mips/jazz.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/jazz.h Sun Aug 3 13:14:47 2003
@@ -1,13 +1,12 @@
-/* $Id: jazz.h,v 1.9 1998/09/19 19:19:37 ralf Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1995 - 1998 by Andreas Busse and Ralf Baechle
*/
-#ifndef __ASM_MIPS_JAZZ_H
-#define __ASM_MIPS_JAZZ_H
+#ifndef __ASM_JAZZ_H
+#define __ASM_JAZZ_H
/*
* The addresses below are virtual address. The mappings are
@@ -71,16 +70,16 @@
#define LED_E 0x9e
#define LED_F 0x8e
-#ifndef _LANGUAGE_ASSEMBLY
+#ifndef __ASSEMBLY__
-extern __inline__ void pica_set_led(unsigned int bits)
+static __inline__ void pica_set_led(unsigned int bits)
{
volatile unsigned int *led_register = (unsigned int *) PICA_LED;
*led_register = bits;
}
-#endif
+#endif /* !__ASSEMBLY__ */
/*
* Base address of the Sonic Ethernet adapter in Jazz machines.
@@ -101,7 +100,7 @@
#define JAZZ_KEYBOARD_DATA 0xe0005000
#define JAZZ_KEYBOARD_COMMAND 0xe0005001
-#ifndef _LANGUAGE_ASSEMBLY
+#ifndef __ASSEMBLY__
typedef struct {
unsigned char data;
@@ -120,7 +119,7 @@
*/
#define keyboard_hardware jazz_keyboard_hardware
-#endif
+#endif /* !__ASSEMBLY__ */
/*
* i8042 keyboard controller for most other Mips machines.
@@ -140,7 +139,7 @@
* Dummy Device Address. Used in jazzdma.c
*/
#define JAZZ_DUMMY_DEVICE 0xe000d000
-
+
/*
* JAZZ timer registers and interrupt no.
* Note that the hardware timer interrupt is actually on
@@ -153,7 +152,7 @@
/*
* DRAM configuration register
*/
-#ifndef _LANGUAGE_ASSEMBLY
+#ifndef __ASSEMBLY__
#ifdef __MIPSEL__
typedef struct {
unsigned int bank2 : 3;
@@ -173,7 +172,7 @@
unsigned int bank2 : 3;
} dram_configuration;
#endif
-#endif /* _LANGUAGE_ASSEMBLY */
+#endif /* !__ASSEMBLY__ */
#define PICA_DRAM_CONFIG 0xe00fffe0
@@ -249,7 +248,7 @@
#define JAZZ_R4030_CACHE_BWIN 0xE0000060 /* I/O Cache Buffer Window */
/*
- * Remote Speed Registers.
+ * Remote Speed Registers.
*
* 0: free, 1: Ethernet, 2: SCSI, 3: Floppy,
* 4: RTC, 5: Kb./Mouse 6: serial 1, 7: serial 2,
@@ -271,9 +270,9 @@
/*
* Access the R4030 DMA and I/O Controller
*/
-#ifndef _LANGUAGE_ASSEMBLY
+#ifndef __ASSEMBLY__
-extern inline void r4030_delay(void)
+static inline void r4030_delay(void)
{
__asm__ __volatile__(
".set\tnoreorder\n\t"
@@ -284,33 +283,33 @@
".set\treorder");
}
-extern inline unsigned short r4030_read_reg16(unsigned addr)
+static inline unsigned short r4030_read_reg16(unsigned addr)
{
unsigned short ret = *((volatile unsigned short *)addr);
r4030_delay();
return ret;
}
-extern inline unsigned int r4030_read_reg32(unsigned addr)
+static inline unsigned int r4030_read_reg32(unsigned addr)
{
unsigned int ret = *((volatile unsigned int *)addr);
r4030_delay();
return ret;
}
-extern inline void r4030_write_reg16(unsigned addr, unsigned val)
+static inline void r4030_write_reg16(unsigned addr, unsigned val)
{
*((volatile unsigned short *)addr) = val;
r4030_delay();
}
-extern inline void r4030_write_reg32(unsigned addr, unsigned val)
+static inline void r4030_write_reg32(unsigned addr, unsigned val)
{
*((volatile unsigned int *)addr) = val;
r4030_delay();
}
-#endif /* !LANGUAGE_ASSEMBLY__ */
+#endif /* !__ASSEMBLY__ */
#define JAZZ_FDC_BASE 0xe0003000
#define JAZZ_RTC_BASE 0xe0004000
@@ -318,4 +317,4 @@
#define JAZZ_EISA_BASE 0xe3000000
-#endif /* __ASM_MIPS_JAZZ_H */
+#endif /* __ASM_JAZZ_H */
diff -Nru a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
--- a/include/asm-mips/jmr3927/jmr3927.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/jmr3927/jmr3927.h Sun Aug 3 13:14:48 2003
@@ -161,7 +161,7 @@
#define jmr3927_isac_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d))
#define jmr3927_isac_reg_in(a) (*(volatile unsigned char *)(a))
-extern inline int jmr3927_have_isac(void)
+static inline int jmr3927_have_isac(void)
{
unsigned char idt;
unsigned long flags;
diff -Nru a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
--- a/include/asm-mips/lasat/serial.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/lasat/serial.h Sun Aug 3 13:14:53 2003
@@ -11,18 +11,3 @@
#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
#define LASAT_UART_REGS_SHIFT_200 3
#define LASATINT_UART_200 13
-
-#if defined(CONFIG_LASAT_100)
-#define LASAT_BASE_BAUD LASAT_BASE_BAUD_200
-#define LASAT_UART_REGS_BASE LASAT_UART_REGS_BASE_200
-#define LASAT_UART_REGS_SHIFT LASAT_UART_REGS_SHIFT_200
-#define LASATINT_UART LASAT_UART_REGS_SHIFT_200
-#elif defined(CONFIG_LASAT_200)
-#define LASAT_BASE_BAUD LASAT_BASE_BAUD_200
-#define LASAT_UART_REGS_BASE LASAT_UART_REGS_BASE_200
-#define LASAT_UART_REGS_SHIFT LASAT_UART_REGS_SHIFT_200
-#define LASATINT_UART LASAT_UART_REGS_SHIFT_200
-#else
-#error Select a Lasat board in the configuration menu
-#endif
-
diff -Nru a/include/asm-mips/local.h b/include/asm-mips/local.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/local.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,61 @@
+#ifndef _ASM_LOCAL_H
+#define _ASM_LOCAL_H
+
+#include <linux/config.h>
+#include <linux/percpu.h>
+#include <asm/atomic.h>
+
+#ifdef CONFIG_MIPS32
+
+typedef atomic_t local_t;
+
+#define LOCAL_INIT(i) ATOMIC_INIT(i)
+#define local_read(v) atomic_read(v)
+#define local_set(v,i) atomic_set(v,i)
+
+#define local_inc(v) atomic_inc(v)
+#define local_dec(v) atomic_inc(v)
+#define local_add(i, v) atomic_add(i, v)
+#define local_sub(i, v) atomic_sub(i, v)
+
+#endif
+
+#ifdef CONFIG_MIPS64
+
+typedef atomic64_t local_t;
+
+#define LOCAL_INIT(i) ATOMIC64_INIT(i)
+#define local_read(v) atomic64_read(v)
+#define local_set(v,i) atomic64_set(v,i)
+
+#define local_inc(v) atomic64_inc(v)
+#define local_dec(v) atomic64_inc(v)
+#define local_add(i, v) atomic64_add(i, v)
+#define local_sub(i, v) atomic64_sub(i, v)
+
+#endif
+
+#define __local_inc(v) ((v)->counter++)
+#define __local_dec(v) ((v)->counter++)
+#define __local_add(i,v) ((v)->counter+=(i))
+#define __local_sub(i,v) ((v)->counter-=(i))
+
+/*
+ * Use these for per-cpu local_t variables: on some archs they are
+ * much more efficient than these naive implementations. Note they take
+ * a variable, not an address.
+ */
+#define cpu_local_read(v) local_read(&__get_cpu_var(v))
+#define cpu_local_set(v, i) local_set(&__get_cpu_var(v), (i))
+
+#define cpu_local_inc(v) local_inc(&__get_cpu_var(v))
+#define cpu_local_dec(v) local_dec(&__get_cpu_var(v))
+#define cpu_local_add(i, v) local_add((i), &__get_cpu_var(v))
+#define cpu_local_sub(i, v) local_sub((i), &__get_cpu_var(v))
+
+#define __cpu_local_inc(v) __local_inc(&__get_cpu_var(v))
+#define __cpu_local_dec(v) __local_dec(&__get_cpu_var(v))
+#define __cpu_local_add(i, v) __local_add((i), &__get_cpu_var(v))
+#define __cpu_local_sub(i, v) __local_sub((i), &__get_cpu_var(v))
+
+#endif /* _ASM_LOCAL_H */
diff -Nru a/include/asm-mips/m48t35.h b/include/asm-mips/m48t35.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/m48t35.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,27 @@
+/*
+ * Registers for the SGS-Thomson M48T35 Timekeeper RAM chip
+ */
+#ifndef _ASM_M48T35_H
+#define _ASM_M48T35_H
+
+#include <linux/spinlock.h>
+
+extern spinlock_t rtc_lock;
+
+struct m48t35_rtc {
+ volatile u8 pad[0x7ff8]; /* starts at 0x7ff8 */
+ volatile u8 control;
+ volatile u8 sec;
+ volatile u8 min;
+ volatile u8 hour;
+ volatile u8 day;
+ volatile u8 date;
+ volatile u8 month;
+ volatile u8 year;
+};
+
+#define M48T35_RTC_SET 0x80
+#define M48T35_RTC_STOPPED 0x80
+#define M48T35_RTC_READ 0x40
+
+#endif /* _ASM_M48T35_H */
diff -Nru a/include/asm-mips/mips-boards/prom.h b/include/asm-mips/mips-boards/prom.h
--- a/include/asm-mips/mips-boards/prom.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/mips-boards/prom.h Sun Aug 3 13:14:47 2003
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,14 +15,10 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* MIPS boards bootprom interface for the Linux kernel.
- *
*/
-
-#ifndef _MIPS_PROM_H
-#define _MIPS_PROM_H
+#ifndef _ASM_MIPS_BOARDS_PROM_H
+#define _ASM_MIPS_BOARDS_PROM_H
extern char *prom_getcmdline(void);
extern char *prom_getenv(char *name);
@@ -41,9 +35,9 @@
/* Memory descriptor management. */
#define PROM_MAX_PMEMBLOCKS 32
struct prom_pmemblock {
- unsigned long base; /* Within KSEG0. */
+ unsigned long base; /* Phys addr. */
unsigned int size; /* In bytes. */
unsigned int type; /* free or prom memory */
};
-#endif /* !(_MIPS_PROM_H) */
+#endif /* _ASM_MIPS_BOARDS_PROM_H */
diff -Nru a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
--- a/include/asm-mips/mipsregs.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/mipsregs.h Sun Aug 3 13:14:48 2003
@@ -718,6 +718,9 @@
#define read_c0_cause() __read_32bit_c0_register($13, 0)
#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val)
+#define read_c0_epc() __read_ulong_c0_register($14, 0)
+#define write_c0_epc(val) __write_ulong_c0_register($14, 0, val)
+
#define read_c0_prid() __read_32bit_c0_register($15, 0)
#define read_c0_config() __read_32bit_c0_register($16, 0)
diff -Nru a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
--- a/include/asm-mips/mmu_context.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/mmu_context.h Sun Aug 3 13:14:48 2003
@@ -28,9 +28,16 @@
*/
#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
pgd_current[smp_processor_id()] = (unsigned long)(pgd)
+#ifdef CONFIG_MIPS32
#define TLBMISS_HANDLER_SETUP() \
write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
+#endif
+#ifdef CONFIG_MIPS64
+#define TLBMISS_HANDLER_SETUP() \
+ write_c0_context((unsigned long) smp_processor_id() << 23); \
+ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
+#endif
extern unsigned long pgd_current[];
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
@@ -94,8 +101,8 @@
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *tsk)
{
+ unsigned int cpu = smp_processor_id();
unsigned long flags;
- unsigned cpu = smp_processor_id();
local_irq_save(flags);
@@ -144,7 +151,7 @@
write_c0_entryhi(cpu_context(cpu, next));
TLBMISS_HANDLER_SETUP_PGD(next->pgd);
- /* mark mmu ownership change */
+ /* mark mmu ownership change */
clear_bit(cpu, &prev->cpu_vm_mask);
set_bit(cpu, &next->cpu_vm_mask);
diff -Nru a/include/asm-mips/mmzone.h b/include/asm-mips/mmzone.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/mmzone.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,95 @@
+/*
+ * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99
+ */
+#ifndef _ASM_MMZONE_H_
+#define _ASM_MMZONE_H_
+
+#include <linux/config.h>
+#include <asm/sn/types.h>
+#include <asm/sn/addrs.h>
+#include <asm/sn/arch.h>
+#include <asm/sn/klkernvars.h>
+
+typedef struct plat_pglist_data {
+ pg_data_t gendata;
+ kern_vars_t kern_vars;
+} plat_pg_data_t;
+
+/*
+ * Following are macros that are specific to this numa platform.
+ */
+
+extern int numa_debug(void);
+extern plat_pg_data_t *plat_node_data[];
+
+#define PHYSADDR_TO_NID(pa) NASID_TO_COMPACT_NODEID(NASID_GET(pa))
+#define PLAT_NODE_DATA(n) (plat_node_data[n])
+#define PLAT_NODE_DATA_SIZE(n) (PLAT_NODE_DATA(n)->gendata.node_spanned_pages)
+#define PLAT_NODE_DATA_LOCALNR(p, n) \
+ (((p) >> PAGE_SHIFT) - PLAT_NODE_DATA(n)->gendata.node_start_pfn)
+
+#ifdef CONFIG_DISCONTIGMEM
+
+/*
+ * Following are macros that each numa implmentation must define.
+ */
+
+/*
+ * Given a kernel address, find the home node of the underlying memory.
+ */
+#define KVADDR_TO_NID(kaddr) \
+ ((NASID_TO_COMPACT_NODEID(NASID_GET(__pa(kaddr))) != -1) ? \
+ (NASID_TO_COMPACT_NODEID(NASID_GET(__pa(kaddr)))) : \
+ (printk("NUMABUG: %s line %d addr 0x%lx", __FILE__, __LINE__, kaddr), \
+ numa_debug(), -1))
+
+/*
+ * Return a pointer to the node data for node n.
+ */
+#define NODE_DATA(n) (&((PLAT_NODE_DATA(n))->gendata))
+
+/*
+ * NODE_MEM_MAP gives the kaddr for the mem_map of the node.
+ */
+#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map)
+
+/*
+ * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
+ * and returns the mem_map of that node.
+ */
+#define ADDR_TO_MAPBASE(kaddr) \
+ NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
+
+/*
+ * Given a kaddr, LOCAL_BASE_ADDR finds the owning node of the memory
+ * and returns the kaddr corresponding to first physical page in the
+ * node's mem_map.
+ */
+#define LOCAL_BASE_ADDR(kaddr) ((unsigned long)(kaddr) & ~(NODE_MAX_MEM_SIZE-1))
+
+#define LOCAL_MAP_NR(kvaddr) \
+ (((unsigned long)(kvaddr)-LOCAL_BASE_ADDR((kvaddr))) >> PAGE_SHIFT)
+
+#define MIPS64_NR(kaddr) (((unsigned long)(kaddr) > (unsigned long)high_memory)\
+ ? (max_mapnr + 1) : (LOCAL_MAP_NR((kaddr)) + \
+ (((unsigned long)ADDR_TO_MAPBASE((kaddr)) - PAGE_OFFSET) / \
+ sizeof(struct page))))
+
+#define kern_addr_valid(addr) ((KVADDR_TO_NID((unsigned long)addr) > \
+ -1) ? 0 : (test_bit(LOCAL_MAP_NR((addr)), \
+ NODE_DATA(KVADDR_TO_NID((unsigned long)addr))->valid_addr_bitmap)))
+
+#define pfn_to_page(pfn) (mem_map + (pfn))
+#define page_to_pfn(page) \
+ ((((page)-(page)->zone->zone_mem_map) + (page)->zone->zone_start_pfn) \
+ << PAGE_SHIFT)
+#define virt_to_page(kaddr) pfn_to_page(MIPS64_NR(kaddr))
+
+#define pfn_valid(pfn) ((pfn) < max_mapnr)
+#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
+#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+
+#endif /* CONFIG_DISCONTIGMEM */
+
+#endif /* _ASM_MMZONE_H_ */
diff -Nru a/include/asm-mips/namei.h b/include/asm-mips/namei.h
--- a/include/asm-mips/namei.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/namei.h Sun Aug 3 13:14:48 2003
@@ -1,10 +1,8 @@
/*
- * linux/include/asm-mips/namei.h
- *
* Included from linux/fs/namei.c
*/
-#ifndef __ASM_NAMEI_H
-#define __ASM_NAMEI_H
+#ifndef _ASM_NAMEI_H
+#define _ASM_NAMEI_H
#include <linux/config.h>
@@ -26,4 +24,4 @@
#endif /* !defined(CONFIG_BINFMT_IRIX) */
-#endif /* __ASM_NAMEI_H */
+#endif /* _ASM_NAMEI_H */
diff -Nru a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h
--- a/include/asm-mips/paccess.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/paccess.h Sun Aug 3 13:14:47 2003
@@ -13,8 +13,16 @@
#ifndef _ASM_PACCESS_H
#define _ASM_PACCESS_H
+#include <linux/config.h>
#include <linux/errno.h>
+#ifdef CONFIG_MIPS32
+#define __PA_ADDR ".word"
+#endif
+#ifdef CONFIG_MIPS64
+#define __PA_ADDR ".dword"
+#endif
+
extern asmlinkage void handle_ibe(void);
extern asmlinkage void handle_dbe(void);
@@ -24,76 +32,79 @@
struct __large_pstruct { unsigned long buf[100]; };
#define __mp(x) (*(struct __large_pstruct *)(x))
-#define __get_dbe(x,ptr,size) ({ \
-int __gu_err; \
-__typeof(*(ptr)) __gu_val; \
-unsigned long __gu_addr; \
-__asm__("":"=r" (__gu_val)); \
-__gu_addr = (unsigned long) (ptr); \
-__asm__("":"=r" (__gu_err)); \
-switch (size) { \
-case 1: __get_dbe_asm("lb"); break; \
-case 2: __get_dbe_asm("lh"); break; \
-case 4: __get_dbe_asm("lw"); break; \
-case 8: __get_dbe_asm("ld"); break; \
-default: __get_dbe_unknown(); break; \
-} x = (__typeof__(*(ptr))) __gu_val; __gu_err; })
-
-#define __get_dbe_asm(insn) \
-({ \
-__asm__ __volatile__( \
- ".set\tpush\n\t" \
- ".set\tnoreorder\n\t" \
- insn "\t%1,%2\n\t" \
- "1:\tmove\t%0,$0\n" \
- ".set\tpop\n\t" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "move\t%1,$0\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__dbe_table,\"a\"\n\t" \
- ".word\t1b-4,3b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__mp(__gu_addr)), "i" (-EFAULT)); })
+#define __get_dbe(x,ptr,size) \
+({ \
+ long __gu_err; \
+ __typeof(*(ptr)) __gu_val; \
+ unsigned long __gu_addr; \
+ __asm__("":"=r" (__gu_val)); \
+ __gu_addr = (unsigned long) (ptr); \
+ __asm__("":"=r" (__gu_err)); \
+ switch (size) { \
+ case 1: __get_dbe_asm("lb"); break; \
+ case 2: __get_dbe_asm("lh"); break; \
+ case 4: __get_dbe_asm("lw"); break; \
+ case 8: __get_dbe_asm("ld"); break; \
+ default: __get_dbe_unknown(); break; \
+ } \
+ x = (__typeof__(*(ptr))) __gu_val; \
+ __gu_err; \
+})
+
+#define __get_dbe_asm(insn) \
+({ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%1,%2\n\t" \
+ "move\t%0,$0\n" \
+ "2:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "3:\tli\t%0,%3\n\t" \
+ "move\t%1,$0\n\t" \
+ "j\t2b\n\t" \
+ ".previous\n\t" \
+ ".section\t__dbe_table,\"a\"\n\t" \
+ __PA_ADDR "\t1b, 3b\n\t" \
+ ".previous" \
+ :"=r" (__gu_err), "=r" (__gu_val) \
+ :"o" (__mp(__gu_addr)), "i" (-EFAULT)); \
+})
extern void __get_dbe_unknown(void);
-#define __put_dbe(x,ptr,size) ({ \
-int __pu_err; \
-__typeof__(*(ptr)) __pu_val; \
-unsigned long __pu_addr; \
-__pu_val = (x); \
-__pu_addr = (unsigned long) (ptr); \
-__asm__("":"=r" (__pu_err)); \
-switch (size) { \
-case 1: __put_dbe_asm("sb"); break; \
-case 2: __put_dbe_asm("sh"); break; \
-case 4: __put_dbe_asm("sw"); break; \
-case 8: __put_dbe_asm("sd"); break; \
-default: __put_dbe_unknown(); break; \
-} __pu_err; })
-
-#define __put_dbe_asm(insn) \
-({ \
-__asm__ __volatile__( \
- ".set\tpush\n\t" \
- ".set\tnoreorder\n\t" \
- insn "\t%1,%2\n\t" \
- "1:\tmove\t%0,$0\n" \
- ".set\tpop\n\t" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__dbe_table,\"a\"\n\t" \
- ".word\t1b-4,3b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); })
+#define __put_dbe(x,ptr,size) \
+({ \
+ long __pu_err; \
+ __typeof__(*(ptr)) __pu_val; \
+ long __pu_addr; \
+ __pu_val = (x); \
+ __pu_addr = (long) (ptr); \
+ __asm__("":"=r" (__pu_err)); \
+ switch (size) { \
+ case 1: __put_dbe_asm("sb"); break; \
+ case 2: __put_dbe_asm("sh"); break; \
+ case 4: __put_dbe_asm("sw"); break; \
+ case 8: __put_dbe_asm("sd"); break; \
+ default: __put_dbe_unknown(); break; \
+ } \
+ __pu_err; \
+})
+
+#define __put_dbe_asm(insn) \
+({ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%1,%2\n\t" \
+ "move\t%0,$0\n" \
+ "2:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "3:\tli\t%0,%3\n\t" \
+ "j\t2b\n\t" \
+ ".previous\n\t" \
+ ".section\t__dbe_table,\"a\"\n\t" \
+ __PA_ADDR "\t1b, 3b\n\t" \
+ ".previous" \
+ : "=r" (__pu_err) \
+ : "r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); \
+})
extern void __put_dbe_unknown(void);
diff -Nru a/include/asm-mips/page-32.h b/include/asm-mips/page-32.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/page-32.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_PAGE_32_H
+#define _ASM_PAGE_32_H
+
+#include <linux/config.h>
+
+/*
+ * This handles the memory map.
+ * We handle pages at KSEG0 for kernels with 32 bit address space.
+ */
+#define PAGE_OFFSET 0x80000000UL
+#define UNCAC_BASE 0xa0000000UL
+
+/*
+ * Memory above this physical address will be considered highmem.
+ */
+#define HIGHMEM_START 0x20000000UL
+
+#endif /* _ASM_PAGE_32_H */
diff -Nru a/include/asm-mips/page-64.h b/include/asm-mips/page-64.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/page-64.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,31 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_PAGE_64_H
+#define _ASM_PAGE_64_H
+
+#include <linux/config.h>
+
+/*
+ * This handles the memory map.
+ */
+#ifdef CONFIG_NONCOHERENT_IO
+#define PAGE_OFFSET 0x9800000000000000UL
+#else
+#define PAGE_OFFSET 0xa800000000000000UL
+#endif
+
+
+/*
+ * Memory above this physical address will be considered highmem.
+ * Fixme: 59 bits is a fictive number and makes assumptions about processors
+ * in the distant future. Nobody will care for a few years :-)
+ */
+#define HIGHMEM_START (1UL << 59UL)
+
+#endif /* _ASM_PAGE_64_H */
diff -Nru a/include/asm-mips/page.h b/include/asm-mips/page.h
--- a/include/asm-mips/page.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/page.h Sun Aug 3 13:14:47 2003
@@ -1,17 +1,23 @@
/*
- * Definitions for page handling
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994 - 1999 by Ralf Baechle
+ * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_PAGE_H
#define _ASM_PAGE_H
#include <linux/config.h>
+#ifdef CONFIG_MIPS32
+#include <asm/page-32.h>
+#endif
+#ifdef CONFIG_MIPS64
+#include <asm/page-64.h>
+#endif
+
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
@@ -82,7 +88,7 @@
#define __pgprot(x) ((pgprot_t) { (x) } )
/* Pure 2^n version of get_order */
-extern __inline__ int get_order(unsigned long size)
+static __inline__ int get_order(unsigned long size)
{
int order;
@@ -100,34 +106,25 @@
/* to align the pointer to the (next) page boundary */
#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
-/*
- * This handles the memory map.
- * We handle pages at KSEG0 for kernels with 32 bit address space.
- */
-#define PAGE_OFFSET 0x80000000UL
-#define UNCAC_BASE 0xa0000000UL
-
#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
+
+#ifndef CONFIG_DISCONTIGMEM
#define pfn_to_page(pfn) (mem_map + (pfn))
#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define pfn_valid(pfn) ((pfn) < max_mapnr)
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+#endif
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
-
-/*
- * Memory above this physical address will be considered highmem.
- */
-#define HIGHMEM_START 0x20000000UL
#endif /* defined (__KERNEL__) */
diff -Nru a/include/asm-mips/pci/bridge.h b/include/asm-mips/pci/bridge.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/pci/bridge.h Sun Aug 3 13:14:47 2003
@@ -0,0 +1,837 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * bridge.h - bridge chip header file, derived from IRIX <sys/PCI/bridge.h>,
+ * revision 1.76.
+ *
+ * Copyright (C) 1996, 1999 Silcon Graphics, Inc.
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_PCI_BRIDGE_H
+#define _ASM_PCI_BRIDGE_H
+
+#include <linux/types.h>
+#include <asm/xtalk/xwidget.h> /* generic widget header */
+
+/* I/O page size */
+
+#define IOPFNSHIFT 12 /* 4K per mapped page */
+
+#define IOPGSIZE (1 << IOPFNSHIFT)
+#define IOPG(x) ((x) >> IOPFNSHIFT)
+#define IOPGOFF(x) ((x) & (IOPGSIZE-1))
+
+/* Bridge RAM sizes */
+
+#define BRIDGE_ATE_RAM_SIZE 0x00000400 /* 1kB ATE RAM */
+
+#define BRIDGE_CONFIG_BASE 0x20000
+#define BRIDGE_CONFIG1_BASE 0x28000
+#define BRIDGE_CONFIG_END 0x30000
+#define BRIDGE_CONFIG_SLOT_SIZE 0x1000
+
+#define BRIDGE_SSRAM_512K 0x00080000 /* 512kB */
+#define BRIDGE_SSRAM_128K 0x00020000 /* 128kB */
+#define BRIDGE_SSRAM_64K 0x00010000 /* 64kB */
+#define BRIDGE_SSRAM_0K 0x00000000 /* 0kB */
+
+/* ========================================================================
+ * Bridge address map
+ */
+
+#ifndef __ASSEMBLY__
+
+/*
+ * All accesses to bridge hardware registers must be done
+ * using 32-bit loads and stores.
+ */
+typedef u32 bridgereg_t;
+
+typedef u64 bridge_ate_t;
+
+/* pointers to bridge ATEs
+ * are always "pointer to volatile"
+ */
+typedef volatile bridge_ate_t *bridge_ate_p;
+
+/*
+ * It is generally preferred that hardware registers on the bridge
+ * are located from C code via this structure.
+ *
+ * Generated from Bridge spec dated 04oct95
+ */
+
+typedef volatile struct bridge_s {
+ /* Local Registers 0x000000-0x00FFFF */
+
+ /* standard widget configuration 0x000000-0x000057 */
+ widget_cfg_t b_widget; /* 0x000000 */
+
+ /* helper fieldnames for accessing bridge widget */
+
+#define b_wid_id b_widget.w_id
+#define b_wid_stat b_widget.w_status
+#define b_wid_err_upper b_widget.w_err_upper_addr
+#define b_wid_err_lower b_widget.w_err_lower_addr
+#define b_wid_control b_widget.w_control
+#define b_wid_req_timeout b_widget.w_req_timeout
+#define b_wid_int_upper b_widget.w_intdest_upper_addr
+#define b_wid_int_lower b_widget.w_intdest_lower_addr
+#define b_wid_err_cmdword b_widget.w_err_cmd_word
+#define b_wid_llp b_widget.w_llp_cfg
+#define b_wid_tflush b_widget.w_tflush
+
+ /* bridge-specific widget configuration 0x000058-0x00007F */
+ bridgereg_t _pad_000058;
+ bridgereg_t b_wid_aux_err; /* 0x00005C */
+ bridgereg_t _pad_000060;
+ bridgereg_t b_wid_resp_upper; /* 0x000064 */
+ bridgereg_t _pad_000068;
+ bridgereg_t b_wid_resp_lower; /* 0x00006C */
+ bridgereg_t _pad_000070;
+ bridgereg_t b_wid_tst_pin_ctrl; /* 0x000074 */
+ bridgereg_t _pad_000078[2];
+
+ /* PMU & Map 0x000080-0x00008F */
+ bridgereg_t _pad_000080;
+ bridgereg_t b_dir_map; /* 0x000084 */
+ bridgereg_t _pad_000088[2];
+
+ /* SSRAM 0x000090-0x00009F */
+ bridgereg_t _pad_000090;
+ bridgereg_t b_ram_perr; /* 0x000094 */
+ bridgereg_t _pad_000098[2];
+
+ /* Arbitration 0x0000A0-0x0000AF */
+ bridgereg_t _pad_0000A0;
+ bridgereg_t b_arb; /* 0x0000A4 */
+ bridgereg_t _pad_0000A8[2];
+
+ /* Number In A Can 0x0000B0-0x0000BF */
+ bridgereg_t _pad_0000B0;
+ bridgereg_t b_nic; /* 0x0000B4 */
+ bridgereg_t _pad_0000B8[2];
+
+ /* PCI/GIO 0x0000C0-0x0000FF */
+ bridgereg_t _pad_0000C0;
+ bridgereg_t b_bus_timeout; /* 0x0000C4 */
+#define b_pci_bus_timeout b_bus_timeout
+
+ bridgereg_t _pad_0000C8;
+ bridgereg_t b_pci_cfg; /* 0x0000CC */
+ bridgereg_t _pad_0000D0;
+ bridgereg_t b_pci_err_upper; /* 0x0000D4 */
+ bridgereg_t _pad_0000D8;
+ bridgereg_t b_pci_err_lower; /* 0x0000DC */
+ bridgereg_t _pad_0000E0[8];
+#define b_gio_err_lower b_pci_err_lower
+#define b_gio_err_upper b_pci_err_upper
+
+ /* Interrupt 0x000100-0x0001FF */
+ bridgereg_t _pad_000100;
+ bridgereg_t b_int_status; /* 0x000104 */
+ bridgereg_t _pad_000108;
+ bridgereg_t b_int_enable; /* 0x00010C */
+ bridgereg_t _pad_000110;
+ bridgereg_t b_int_rst_stat; /* 0x000114 */
+ bridgereg_t _pad_000118;
+ bridgereg_t b_int_mode; /* 0x00011C */
+ bridgereg_t _pad_000120;
+ bridgereg_t b_int_device; /* 0x000124 */
+ bridgereg_t _pad_000128;
+ bridgereg_t b_int_host_err; /* 0x00012C */
+
+ struct {
+ bridgereg_t __pad; /* 0x0001{30,,,68} */
+ bridgereg_t addr; /* 0x0001{34,,,6C} */
+ } b_int_addr[8]; /* 0x000130 */
+
+ bridgereg_t _pad_000170[36];
+
+ /* Device 0x000200-0x0003FF */
+ struct {
+ bridgereg_t __pad; /* 0x0002{00,,,38} */
+ bridgereg_t reg; /* 0x0002{04,,,3C} */
+ } b_device[8]; /* 0x000200 */
+
+ struct {
+ bridgereg_t __pad; /* 0x0002{40,,,78} */
+ bridgereg_t reg; /* 0x0002{44,,,7C} */
+ } b_wr_req_buf[8]; /* 0x000240 */
+
+ struct {
+ bridgereg_t __pad; /* 0x0002{80,,,88} */
+ bridgereg_t reg; /* 0x0002{84,,,8C} */
+ } b_rrb_map[2]; /* 0x000280 */
+#define b_even_resp b_rrb_map[0].reg /* 0x000284 */
+#define b_odd_resp b_rrb_map[1].reg /* 0x00028C */
+
+ bridgereg_t _pad_000290;
+ bridgereg_t b_resp_status; /* 0x000294 */
+ bridgereg_t _pad_000298;
+ bridgereg_t b_resp_clear; /* 0x00029C */
+
+ bridgereg_t _pad_0002A0[24];
+
+ char _pad_000300[0x10000 - 0x000300];
+
+ /* Internal Address Translation Entry RAM 0x010000-0x0103FF */
+ union {
+ bridge_ate_t wr; /* write-only */
+ struct {
+ bridgereg_t _p_pad;
+ bridgereg_t rd; /* read-only */
+ } hi;
+ } b_int_ate_ram[128];
+
+ char _pad_010400[0x11000 - 0x010400];
+
+ /* Internal Address Translation Entry RAM LOW 0x011000-0x0113FF */
+ struct {
+ bridgereg_t _p_pad;
+ bridgereg_t rd; /* read-only */
+ } b_int_ate_ram_lo[128];
+
+ char _pad_011400[0x20000 - 0x011400];
+
+ /* PCI Device Configuration Spaces 0x020000-0x027FFF */
+ union { /* make all access sizes available. */
+ u8 c[0x1000 / 1];
+ u16 s[0x1000 / 2];
+ u32 l[0x1000 / 4];
+ u64 d[0x1000 / 8];
+ union {
+ u8 c[0x100 / 1];
+ u16 s[0x100 / 2];
+ u32 l[0x100 / 4];
+ u64 d[0x100 / 8];
+ } f[8];
+ } b_type0_cfg_dev[8]; /* 0x020000 */
+
+ /* PCI Type 1 Configuration Space 0x028000-0x028FFF */
+ union { /* make all access sizes available. */
+ u8 c[0x1000 / 1];
+ u16 s[0x1000 / 2];
+ u32 l[0x1000 / 4];
+ u64 d[0x1000 / 8];
+ } b_type1_cfg; /* 0x028000-0x029000 */
+
+ char _pad_029000[0x007000]; /* 0x029000-0x030000 */
+
+ /* PCI Interrupt Acknowledge Cycle 0x030000 */
+ union {
+ u8 c[8 / 1];
+ u16 s[8 / 2];
+ u32 l[8 / 4];
+ u64 d[8 / 8];
+ } b_pci_iack; /* 0x030000 */
+
+ u8 _pad_030007[0x04fff8]; /* 0x030008-0x07FFFF */
+
+ /* External Address Translation Entry RAM 0x080000-0x0FFFFF */
+ bridge_ate_t b_ext_ate_ram[0x10000];
+
+ /* Reserved 0x100000-0x1FFFFF */
+ char _pad_100000[0x200000-0x100000];
+
+ /* PCI/GIO Device Spaces 0x200000-0xBFFFFF */
+ union { /* make all access sizes available. */
+ u8 c[0x100000 / 1];
+ u16 s[0x100000 / 2];
+ u32 l[0x100000 / 4];
+ u64 d[0x100000 / 8];
+ } b_devio_raw[10]; /* 0x200000 */
+
+ /* b_devio macro is a bit strange; it reflects the
+ * fact that the Bridge ASIC provides 2M for the
+ * first two DevIO windows and 1M for the other six.
+ */
+#define b_devio(n) b_devio_raw[((n)<2)?(n*2):(n+2)]
+
+ /* External Flash Proms 1,0 0xC00000-0xFFFFFF */
+ union { /* make all access sizes available. */
+ u8 c[0x400000 / 1]; /* read-only */
+ u16 s[0x400000 / 2]; /* read-write */
+ u32 l[0x400000 / 4]; /* read-only */
+ u64 d[0x400000 / 8]; /* read-only */
+ } b_external_flash; /* 0xC00000 */
+} bridge_t;
+
+/*
+ * Field formats for Error Command Word and Auxillary Error Command Word
+ * of bridge.
+ */
+typedef struct bridge_err_cmdword_s {
+ union {
+ u32 cmd_word;
+ struct {
+ u32 didn:4, /* Destination ID */
+ sidn:4, /* Source ID */
+ pactyp:4, /* Packet type */
+ tnum:5, /* Trans Number */
+ coh:1, /* Coh Transacti */
+ ds:2, /* Data size */
+ gbr:1, /* GBR enable */
+ vbpm:1, /* VBPM message */
+ error:1, /* Error occurred */
+ barr:1, /* Barrier op */
+ rsvd:8;
+ } berr_st;
+ } berr_un;
+} bridge_err_cmdword_t;
+
+#define berr_field berr_un.berr_st
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * The values of these macros can and should be crosschecked
+ * regularly against the offsets of the like-named fields
+ * within the "bridge_t" structure above.
+ */
+
+/* Byte offset macros for Bridge internal registers */
+
+#define BRIDGE_WID_ID WIDGET_ID
+#define BRIDGE_WID_STAT WIDGET_STATUS
+#define BRIDGE_WID_ERR_UPPER WIDGET_ERR_UPPER_ADDR
+#define BRIDGE_WID_ERR_LOWER WIDGET_ERR_LOWER_ADDR
+#define BRIDGE_WID_CONTROL WIDGET_CONTROL
+#define BRIDGE_WID_REQ_TIMEOUT WIDGET_REQ_TIMEOUT
+#define BRIDGE_WID_INT_UPPER WIDGET_INTDEST_UPPER_ADDR
+#define BRIDGE_WID_INT_LOWER WIDGET_INTDEST_LOWER_ADDR
+#define BRIDGE_WID_ERR_CMDWORD WIDGET_ERR_CMD_WORD
+#define BRIDGE_WID_LLP WIDGET_LLP_CFG
+#define BRIDGE_WID_TFLUSH WIDGET_TFLUSH
+
+#define BRIDGE_WID_AUX_ERR 0x00005C /* Aux Error Command Word */
+#define BRIDGE_WID_RESP_UPPER 0x000064 /* Response Buf Upper Addr */
+#define BRIDGE_WID_RESP_LOWER 0x00006C /* Response Buf Lower Addr */
+#define BRIDGE_WID_TST_PIN_CTRL 0x000074 /* Test pin control */
+
+#define BRIDGE_DIR_MAP 0x000084 /* Direct Map reg */
+
+#define BRIDGE_RAM_PERR 0x000094 /* SSRAM Parity Error */
+
+#define BRIDGE_ARB 0x0000A4 /* Arbitration Priority reg */
+
+#define BRIDGE_NIC 0x0000B4 /* Number In A Can */
+
+#define BRIDGE_BUS_TIMEOUT 0x0000C4 /* Bus Timeout Register */
+#define BRIDGE_PCI_BUS_TIMEOUT BRIDGE_BUS_TIMEOUT
+#define BRIDGE_PCI_CFG 0x0000CC /* PCI Type 1 Config reg */
+#define BRIDGE_PCI_ERR_UPPER 0x0000D4 /* PCI error Upper Addr */
+#define BRIDGE_PCI_ERR_LOWER 0x0000DC /* PCI error Lower Addr */
+
+#define BRIDGE_INT_STATUS 0x000104 /* Interrupt Status */
+#define BRIDGE_INT_ENABLE 0x00010C /* Interrupt Enables */
+#define BRIDGE_INT_RST_STAT 0x000114 /* Reset Intr Status */
+#define BRIDGE_INT_MODE 0x00011C /* Interrupt Mode */
+#define BRIDGE_INT_DEVICE 0x000124 /* Interrupt Device */
+#define BRIDGE_INT_HOST_ERR 0x00012C /* Host Error Field */
+
+#define BRIDGE_INT_ADDR0 0x000134 /* Host Address Reg */
+#define BRIDGE_INT_ADDR_OFF 0x000008 /* Host Addr offset (1..7) */
+#define BRIDGE_INT_ADDR(x) (BRIDGE_INT_ADDR0+(x)*BRIDGE_INT_ADDR_OFF)
+
+#define BRIDGE_DEVICE0 0x000204 /* Device 0 */
+#define BRIDGE_DEVICE_OFF 0x000008 /* Device offset (1..7) */
+#define BRIDGE_DEVICE(x) (BRIDGE_DEVICE0+(x)*BRIDGE_DEVICE_OFF)
+
+#define BRIDGE_WR_REQ_BUF0 0x000244 /* Write Request Buffer 0 */
+#define BRIDGE_WR_REQ_BUF_OFF 0x000008 /* Buffer Offset (1..7) */
+#define BRIDGE_WR_REQ_BUF(x) (BRIDGE_WR_REQ_BUF0+(x)*BRIDGE_WR_REQ_BUF_OFF)
+
+#define BRIDGE_EVEN_RESP 0x000284 /* Even Device Response Buf */
+#define BRIDGE_ODD_RESP 0x00028C /* Odd Device Response Buf */
+
+#define BRIDGE_RESP_STATUS 0x000294 /* Read Response Status reg */
+#define BRIDGE_RESP_CLEAR 0x00029C /* Read Response Clear reg */
+
+/* Byte offset macros for Bridge I/O space */
+
+#define BRIDGE_ATE_RAM 0x00010000 /* Internal Addr Xlat Ram */
+
+#define BRIDGE_TYPE0_CFG_DEV0 0x00020000 /* Type 0 Cfg, Device 0 */
+#define BRIDGE_TYPE0_CFG_SLOT_OFF 0x00001000 /* Type 0 Cfg Slot Offset (1..7) */
+#define BRIDGE_TYPE0_CFG_FUNC_OFF 0x00000100 /* Type 0 Cfg Func Offset (1..7) */
+#define BRIDGE_TYPE0_CFG_DEV(s) (BRIDGE_TYPE0_CFG_DEV0+\
+ (s)*BRIDGE_TYPE0_CFG_SLOT_OFF)
+#define BRIDGE_TYPE0_CFG_DEVF(s,f) (BRIDGE_TYPE0_CFG_DEV0+\
+ (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+\
+ (f)*BRIDGE_TYPE0_CFG_FUNC_OFF)
+
+#define BRIDGE_TYPE1_CFG 0x00028000 /* Type 1 Cfg space */
+
+#define BRIDGE_PCI_IACK 0x00030000 /* PCI Interrupt Ack */
+#define BRIDGE_EXT_SSRAM 0x00080000 /* Extern SSRAM (ATE) */
+
+/* Byte offset macros for Bridge device IO spaces */
+
+#define BRIDGE_DEV_CNT 8 /* Up to 8 devices per bridge */
+#define BRIDGE_DEVIO0 0x00200000 /* Device IO 0 Addr */
+#define BRIDGE_DEVIO1 0x00400000 /* Device IO 1 Addr */
+#define BRIDGE_DEVIO2 0x00600000 /* Device IO 2 Addr */
+#define BRIDGE_DEVIO_OFF 0x00100000 /* Device IO Offset (3..7) */
+
+#define BRIDGE_DEVIO_2MB 0x00200000 /* Device IO Offset (0..1) */
+#define BRIDGE_DEVIO_1MB 0x00100000 /* Device IO Offset (2..7) */
+
+#define BRIDGE_DEVIO(x) ((x)<=1 ? BRIDGE_DEVIO0+(x)*BRIDGE_DEVIO_2MB : BRIDGE_DEVIO2+((x)-2)*BRIDGE_DEVIO_1MB)
+
+#define BRIDGE_EXTERNAL_FLASH 0x00C00000 /* External Flash PROMS */
+
+/* ========================================================================
+ * Bridge register bit field definitions
+ */
+
+/* Widget part number of bridge */
+#define BRIDGE_WIDGET_PART_NUM 0xc002
+
+/* Manufacturer of bridge */
+#define BRIDGE_WIDGET_MFGR_NUM 0x036
+
+/* Revision numbers for known Bridge revisions */
+#define BRIDGE_REV_A 0x1
+#define BRIDGE_REV_B 0x2
+#define BRIDGE_REV_C 0x3
+#define BRIDGE_REV_D 0x4
+
+/* Bridge widget status register bits definition */
+
+#define BRIDGE_STAT_LLP_REC_CNT (0xFFu << 24)
+#define BRIDGE_STAT_LLP_TX_CNT (0xFF << 16)
+#define BRIDGE_STAT_FLASH_SELECT (0x1 << 6)
+#define BRIDGE_STAT_PCI_GIO_N (0x1 << 5)
+#define BRIDGE_STAT_PENDING (0x1F << 0)
+
+/* Bridge widget control register bits definition */
+#define BRIDGE_CTRL_FLASH_WR_EN (0x1ul << 31)
+#define BRIDGE_CTRL_EN_CLK50 (0x1 << 30)
+#define BRIDGE_CTRL_EN_CLK40 (0x1 << 29)
+#define BRIDGE_CTRL_EN_CLK33 (0x1 << 28)
+#define BRIDGE_CTRL_RST(n) ((n) << 24)
+#define BRIDGE_CTRL_RST_MASK (BRIDGE_CTRL_RST(0xF))
+#define BRIDGE_CTRL_RST_PIN(x) (BRIDGE_CTRL_RST(0x1 << (x)))
+#define BRIDGE_CTRL_IO_SWAP (0x1 << 23)
+#define BRIDGE_CTRL_MEM_SWAP (0x1 << 22)
+#define BRIDGE_CTRL_PAGE_SIZE (0x1 << 21)
+#define BRIDGE_CTRL_SS_PAR_BAD (0x1 << 20)
+#define BRIDGE_CTRL_SS_PAR_EN (0x1 << 19)
+#define BRIDGE_CTRL_SSRAM_SIZE(n) ((n) << 17)
+#define BRIDGE_CTRL_SSRAM_SIZE_MASK (BRIDGE_CTRL_SSRAM_SIZE(0x3))
+#define BRIDGE_CTRL_SSRAM_512K (BRIDGE_CTRL_SSRAM_SIZE(0x3))
+#define BRIDGE_CTRL_SSRAM_128K (BRIDGE_CTRL_SSRAM_SIZE(0x2))
+#define BRIDGE_CTRL_SSRAM_64K (BRIDGE_CTRL_SSRAM_SIZE(0x1))
+#define BRIDGE_CTRL_SSRAM_1K (BRIDGE_CTRL_SSRAM_SIZE(0x0))
+#define BRIDGE_CTRL_F_BAD_PKT (0x1 << 16)
+#define BRIDGE_CTRL_LLP_XBAR_CRD(n) ((n) << 12)
+#define BRIDGE_CTRL_LLP_XBAR_CRD_MASK (BRIDGE_CTRL_LLP_XBAR_CRD(0xf))
+#define BRIDGE_CTRL_CLR_RLLP_CNT (0x1 << 11)
+#define BRIDGE_CTRL_CLR_TLLP_CNT (0x1 << 10)
+#define BRIDGE_CTRL_SYS_END (0x1 << 9)
+#define BRIDGE_CTRL_MAX_TRANS(n) ((n) << 4)
+#define BRIDGE_CTRL_MAX_TRANS_MASK (BRIDGE_CTRL_MAX_TRANS(0x1f))
+#define BRIDGE_CTRL_WIDGET_ID(n) ((n) << 0)
+#define BRIDGE_CTRL_WIDGET_ID_MASK (BRIDGE_CTRL_WIDGET_ID(0xf))
+
+/* Bridge Response buffer Error Upper Register bit fields definition */
+#define BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT (20)
+#define BRIDGE_RESP_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT)
+#define BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT (16)
+#define BRIDGE_RESP_ERRUPPR_BUFNUM_MASK (0xF << BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT)
+#define BRIDGE_RESP_ERRRUPPR_BUFMASK (0xFFFF)
+
+#define BRIDGE_RESP_ERRUPPR_BUFNUM(x) \
+ (((x) & BRIDGE_RESP_ERRUPPR_BUFNUM_MASK) >> \
+ BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT)
+
+#define BRIDGE_RESP_ERRUPPR_DEVICE(x) \
+ (((x) & BRIDGE_RESP_ERRUPPR_DEVNUM_MASK) >> \
+ BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT)
+
+/* Bridge direct mapping register bits definition */
+#define BRIDGE_DIRMAP_W_ID_SHFT 20
+#define BRIDGE_DIRMAP_W_ID (0xf << BRIDGE_DIRMAP_W_ID_SHFT)
+#define BRIDGE_DIRMAP_RMF_64 (0x1 << 18)
+#define BRIDGE_DIRMAP_ADD512 (0x1 << 17)
+#define BRIDGE_DIRMAP_OFF (0x1ffff << 0)
+#define BRIDGE_DIRMAP_OFF_ADDRSHFT (31) /* lsbit of DIRMAP_OFF is xtalk address bit 31 */
+
+/* Bridge Arbitration register bits definition */
+#define BRIDGE_ARB_REQ_WAIT_TICK(x) ((x) << 16)
+#define BRIDGE_ARB_REQ_WAIT_TICK_MASK BRIDGE_ARB_REQ_WAIT_TICK(0x3)
+#define BRIDGE_ARB_REQ_WAIT_EN(x) ((x) << 8)
+#define BRIDGE_ARB_REQ_WAIT_EN_MASK BRIDGE_ARB_REQ_WAIT_EN(0xff)
+#define BRIDGE_ARB_FREEZE_GNT (1 << 6)
+#define BRIDGE_ARB_HPRI_RING_B2 (1 << 5)
+#define BRIDGE_ARB_HPRI_RING_B1 (1 << 4)
+#define BRIDGE_ARB_HPRI_RING_B0 (1 << 3)
+#define BRIDGE_ARB_LPRI_RING_B2 (1 << 2)
+#define BRIDGE_ARB_LPRI_RING_B1 (1 << 1)
+#define BRIDGE_ARB_LPRI_RING_B0 (1 << 0)
+
+/* Bridge Bus time-out register bits definition */
+#define BRIDGE_BUS_PCI_RETRY_HLD(x) ((x) << 16)
+#define BRIDGE_BUS_PCI_RETRY_HLD_MASK BRIDGE_BUS_PCI_RETRY_HLD(0x1f)
+#define BRIDGE_BUS_GIO_TIMEOUT (1 << 12)
+#define BRIDGE_BUS_PCI_RETRY_CNT(x) ((x) << 0)
+#define BRIDGE_BUS_PCI_RETRY_MASK BRIDGE_BUS_PCI_RETRY_CNT(0x3ff)
+
+/* Bridge interrupt status register bits definition */
+#define BRIDGE_ISR_MULTI_ERR (0x1u << 31)
+#define BRIDGE_ISR_PMU_ESIZE_FAULT (0x1 << 30)
+#define BRIDGE_ISR_UNEXP_RESP (0x1 << 29)
+#define BRIDGE_ISR_BAD_XRESP_PKT (0x1 << 28)
+#define BRIDGE_ISR_BAD_XREQ_PKT (0x1 << 27)
+#define BRIDGE_ISR_RESP_XTLK_ERR (0x1 << 26)
+#define BRIDGE_ISR_REQ_XTLK_ERR (0x1 << 25)
+#define BRIDGE_ISR_INVLD_ADDR (0x1 << 24)
+#define BRIDGE_ISR_UNSUPPORTED_XOP (0x1 << 23)
+#define BRIDGE_ISR_XREQ_FIFO_OFLOW (0x1 << 22)
+#define BRIDGE_ISR_LLP_REC_SNERR (0x1 << 21)
+#define BRIDGE_ISR_LLP_REC_CBERR (0x1 << 20)
+#define BRIDGE_ISR_LLP_RCTY (0x1 << 19)
+#define BRIDGE_ISR_LLP_TX_RETRY (0x1 << 18)
+#define BRIDGE_ISR_LLP_TCTY (0x1 << 17)
+#define BRIDGE_ISR_SSRAM_PERR (0x1 << 16)
+#define BRIDGE_ISR_PCI_ABORT (0x1 << 15)
+#define BRIDGE_ISR_PCI_PARITY (0x1 << 14)
+#define BRIDGE_ISR_PCI_SERR (0x1 << 13)
+#define BRIDGE_ISR_PCI_PERR (0x1 << 12)
+#define BRIDGE_ISR_PCI_MST_TIMEOUT (0x1 << 11)
+#define BRIDGE_ISR_GIO_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
+#define BRIDGE_ISR_PCI_RETRY_CNT (0x1 << 10)
+#define BRIDGE_ISR_XREAD_REQ_TIMEOUT (0x1 << 9)
+#define BRIDGE_ISR_GIO_B_ENBL_ERR (0x1 << 8)
+#define BRIDGE_ISR_INT_MSK (0xff << 0)
+#define BRIDGE_ISR_INT(x) (0x1 << (x))
+
+#define BRIDGE_ISR_LINK_ERROR \
+ (BRIDGE_ISR_LLP_REC_SNERR|BRIDGE_ISR_LLP_REC_CBERR| \
+ BRIDGE_ISR_LLP_RCTY|BRIDGE_ISR_LLP_TX_RETRY| \
+ BRIDGE_ISR_LLP_TCTY)
+
+#define BRIDGE_ISR_PCIBUS_PIOERR \
+ (BRIDGE_ISR_PCI_MST_TIMEOUT|BRIDGE_ISR_PCI_ABORT)
+
+#define BRIDGE_ISR_PCIBUS_ERROR \
+ (BRIDGE_ISR_PCIBUS_PIOERR|BRIDGE_ISR_PCI_PERR| \
+ BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_RETRY_CNT| \
+ BRIDGE_ISR_PCI_PARITY)
+
+#define BRIDGE_ISR_XTALK_ERROR \
+ (BRIDGE_ISR_XREAD_REQ_TIMEOUT|BRIDGE_ISR_XREQ_FIFO_OFLOW|\
+ BRIDGE_ISR_UNSUPPORTED_XOP|BRIDGE_ISR_INVLD_ADDR| \
+ BRIDGE_ISR_REQ_XTLK_ERR|BRIDGE_ISR_RESP_XTLK_ERR| \
+ BRIDGE_ISR_BAD_XREQ_PKT|BRIDGE_ISR_BAD_XRESP_PKT| \
+ BRIDGE_ISR_UNEXP_RESP)
+
+#define BRIDGE_ISR_ERRORS \
+ (BRIDGE_ISR_LINK_ERROR|BRIDGE_ISR_PCIBUS_ERROR| \
+ BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR| \
+ BRIDGE_ISR_PMU_ESIZE_FAULT)
+
+/*
+ * List of Errors which are fatal and kill the sytem
+ */
+#define BRIDGE_ISR_ERROR_FATAL \
+ ((BRIDGE_ISR_XTALK_ERROR & ~BRIDGE_ISR_XREAD_REQ_TIMEOUT)|\
+ BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_PARITY )
+
+#define BRIDGE_ISR_ERROR_DUMP \
+ (BRIDGE_ISR_PCIBUS_ERROR|BRIDGE_ISR_PMU_ESIZE_FAULT| \
+ BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR)
+
+/* Bridge interrupt enable register bits definition */
+#define BRIDGE_IMR_UNEXP_RESP BRIDGE_ISR_UNEXP_RESP
+#define BRIDGE_IMR_PMU_ESIZE_FAULT BRIDGE_ISR_PMU_ESIZE_FAULT
+#define BRIDGE_IMR_BAD_XRESP_PKT BRIDGE_ISR_BAD_XRESP_PKT
+#define BRIDGE_IMR_BAD_XREQ_PKT BRIDGE_ISR_BAD_XREQ_PKT
+#define BRIDGE_IMR_RESP_XTLK_ERR BRIDGE_ISR_RESP_XTLK_ERR
+#define BRIDGE_IMR_REQ_XTLK_ERR BRIDGE_ISR_REQ_XTLK_ERR
+#define BRIDGE_IMR_INVLD_ADDR BRIDGE_ISR_INVLD_ADDR
+#define BRIDGE_IMR_UNSUPPORTED_XOP BRIDGE_ISR_UNSUPPORTED_XOP
+#define BRIDGE_IMR_XREQ_FIFO_OFLOW BRIDGE_ISR_XREQ_FIFO_OFLOW
+#define BRIDGE_IMR_LLP_REC_SNERR BRIDGE_ISR_LLP_REC_SNERR
+#define BRIDGE_IMR_LLP_REC_CBERR BRIDGE_ISR_LLP_REC_CBERR
+#define BRIDGE_IMR_LLP_RCTY BRIDGE_ISR_LLP_RCTY
+#define BRIDGE_IMR_LLP_TX_RETRY BRIDGE_ISR_LLP_TX_RETRY
+#define BRIDGE_IMR_LLP_TCTY BRIDGE_ISR_LLP_TCTY
+#define BRIDGE_IMR_SSRAM_PERR BRIDGE_ISR_SSRAM_PERR
+#define BRIDGE_IMR_PCI_ABORT BRIDGE_ISR_PCI_ABORT
+#define BRIDGE_IMR_PCI_PARITY BRIDGE_ISR_PCI_PARITY
+#define BRIDGE_IMR_PCI_SERR BRIDGE_ISR_PCI_SERR
+#define BRIDGE_IMR_PCI_PERR BRIDGE_ISR_PCI_PERR
+#define BRIDGE_IMR_PCI_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
+#define BRIDGE_IMR_GIO_MST_TIMEOUT BRIDGE_ISR_GIO_MST_TIMEOUT
+#define BRIDGE_IMR_PCI_RETRY_CNT BRIDGE_ISR_PCI_RETRY_CNT
+#define BRIDGE_IMR_XREAD_REQ_TIMEOUT BRIDGE_ISR_XREAD_REQ_TIMEOUT
+#define BRIDGE_IMR_GIO_B_ENBL_ERR BRIDGE_ISR_GIO_B_ENBL_ERR
+#define BRIDGE_IMR_INT_MSK BRIDGE_ISR_INT_MSK
+#define BRIDGE_IMR_INT(x) BRIDGE_ISR_INT(x)
+
+/* Bridge interrupt reset register bits definition */
+#define BRIDGE_IRR_MULTI_CLR (0x1 << 6)
+#define BRIDGE_IRR_CRP_GRP_CLR (0x1 << 5)
+#define BRIDGE_IRR_RESP_BUF_GRP_CLR (0x1 << 4)
+#define BRIDGE_IRR_REQ_DSP_GRP_CLR (0x1 << 3)
+#define BRIDGE_IRR_LLP_GRP_CLR (0x1 << 2)
+#define BRIDGE_IRR_SSRAM_GRP_CLR (0x1 << 1)
+#define BRIDGE_IRR_PCI_GRP_CLR (0x1 << 0)
+#define BRIDGE_IRR_GIO_GRP_CLR (0x1 << 0)
+#define BRIDGE_IRR_ALL_CLR 0x7f
+
+#define BRIDGE_IRR_CRP_GRP (BRIDGE_ISR_UNEXP_RESP | \
+ BRIDGE_ISR_XREQ_FIFO_OFLOW)
+#define BRIDGE_IRR_RESP_BUF_GRP (BRIDGE_ISR_BAD_XRESP_PKT | \
+ BRIDGE_ISR_RESP_XTLK_ERR | \
+ BRIDGE_ISR_XREAD_REQ_TIMEOUT)
+#define BRIDGE_IRR_REQ_DSP_GRP (BRIDGE_ISR_UNSUPPORTED_XOP | \
+ BRIDGE_ISR_BAD_XREQ_PKT | \
+ BRIDGE_ISR_REQ_XTLK_ERR | \
+ BRIDGE_ISR_INVLD_ADDR)
+#define BRIDGE_IRR_LLP_GRP (BRIDGE_ISR_LLP_REC_SNERR | \
+ BRIDGE_ISR_LLP_REC_CBERR | \
+ BRIDGE_ISR_LLP_RCTY | \
+ BRIDGE_ISR_LLP_TX_RETRY | \
+ BRIDGE_ISR_LLP_TCTY)
+#define BRIDGE_IRR_SSRAM_GRP (BRIDGE_ISR_SSRAM_PERR | \
+ BRIDGE_ISR_PMU_ESIZE_FAULT)
+#define BRIDGE_IRR_PCI_GRP (BRIDGE_ISR_PCI_ABORT | \
+ BRIDGE_ISR_PCI_PARITY | \
+ BRIDGE_ISR_PCI_SERR | \
+ BRIDGE_ISR_PCI_PERR | \
+ BRIDGE_ISR_PCI_MST_TIMEOUT | \
+ BRIDGE_ISR_PCI_RETRY_CNT)
+
+#define BRIDGE_IRR_GIO_GRP (BRIDGE_ISR_GIO_B_ENBL_ERR | \
+ BRIDGE_ISR_GIO_MST_TIMEOUT)
+
+/* Bridge INT_DEV register bits definition */
+#define BRIDGE_INT_DEV_SHFT(n) ((n)*3)
+#define BRIDGE_INT_DEV_MASK(n) (0x7 << BRIDGE_INT_DEV_SHFT(n))
+#define BRIDGE_INT_DEV_SET(_dev, _line) (_dev << BRIDGE_INT_DEV_SHFT(_line))
+
+/* Bridge interrupt(x) register bits definition */
+#define BRIDGE_INT_ADDR_HOST 0x0003FF00
+#define BRIDGE_INT_ADDR_FLD 0x000000FF
+
+#define BRIDGE_TMO_PCI_RETRY_HLD_MASK 0x1f0000
+#define BRIDGE_TMO_GIO_TIMEOUT_MASK 0x001000
+#define BRIDGE_TMO_PCI_RETRY_CNT_MASK 0x0003ff
+
+#define BRIDGE_TMO_PCI_RETRY_CNT_MAX 0x3ff
+
+/*
+ * The NASID should be shifted by this amount and stored into the
+ * interrupt(x) register.
+ */
+#define BRIDGE_INT_ADDR_NASID_SHFT 8
+
+/*
+ * The BRIDGE_INT_ADDR_DEST_IO bit should be set to send an interrupt to
+ * memory.
+ */
+#define BRIDGE_INT_ADDR_DEST_IO (1 << 17)
+#define BRIDGE_INT_ADDR_DEST_MEM 0
+#define BRIDGE_INT_ADDR_MASK (1 << 17)
+
+/* Bridge device(x) register bits definition */
+#define BRIDGE_DEV_ERR_LOCK_EN 0x10000000
+#define BRIDGE_DEV_PAGE_CHK_DIS 0x08000000
+#define BRIDGE_DEV_FORCE_PCI_PAR 0x04000000
+#define BRIDGE_DEV_VIRTUAL_EN 0x02000000
+#define BRIDGE_DEV_PMU_WRGA_EN 0x01000000
+#define BRIDGE_DEV_DIR_WRGA_EN 0x00800000
+#define BRIDGE_DEV_DEV_SIZE 0x00400000
+#define BRIDGE_DEV_RT 0x00200000
+#define BRIDGE_DEV_SWAP_PMU 0x00100000
+#define BRIDGE_DEV_SWAP_DIR 0x00080000
+#define BRIDGE_DEV_PREF 0x00040000
+#define BRIDGE_DEV_PRECISE 0x00020000
+#define BRIDGE_DEV_COH 0x00010000
+#define BRIDGE_DEV_BARRIER 0x00008000
+#define BRIDGE_DEV_GBR 0x00004000
+#define BRIDGE_DEV_DEV_SWAP 0x00002000
+#define BRIDGE_DEV_DEV_IO_MEM 0x00001000
+#define BRIDGE_DEV_OFF_MASK 0x00000fff
+#define BRIDGE_DEV_OFF_ADDR_SHFT 20
+
+#define BRIDGE_DEV_PMU_BITS (BRIDGE_DEV_PMU_WRGA_EN | \
+ BRIDGE_DEV_SWAP_PMU)
+#define BRIDGE_DEV_D32_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
+ BRIDGE_DEV_SWAP_DIR | \
+ BRIDGE_DEV_PREF | \
+ BRIDGE_DEV_PRECISE | \
+ BRIDGE_DEV_COH | \
+ BRIDGE_DEV_BARRIER)
+#define BRIDGE_DEV_D64_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
+ BRIDGE_DEV_SWAP_DIR | \
+ BRIDGE_DEV_COH | \
+ BRIDGE_DEV_BARRIER)
+
+/* Bridge Error Upper register bit field definition */
+#define BRIDGE_ERRUPPR_DEVMASTER (0x1 << 20) /* Device was master */
+#define BRIDGE_ERRUPPR_PCIVDEV (0x1 << 19) /* Virtual Req value */
+#define BRIDGE_ERRUPPR_DEVNUM_SHFT (16)
+#define BRIDGE_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_ERRUPPR_DEVNUM_SHFT)
+#define BRIDGE_ERRUPPR_DEVICE(err) (((err) >> BRIDGE_ERRUPPR_DEVNUM_SHFT) & 0x7)
+#define BRIDGE_ERRUPPR_ADDRMASK (0xFFFF)
+
+/* Bridge interrupt mode register bits definition */
+#define BRIDGE_INTMODE_CLR_PKT_EN(x) (0x1 << (x))
+
+/* this should be written to the xbow's link_control(x) register */
+#define BRIDGE_CREDIT 3
+
+/* RRB assignment register */
+#define BRIDGE_RRB_EN 0x8 /* after shifting down */
+#define BRIDGE_RRB_DEV 0x7 /* after shifting down */
+#define BRIDGE_RRB_VDEV 0x4 /* after shifting down */
+#define BRIDGE_RRB_PDEV 0x3 /* after shifting down */
+
+/* RRB status register */
+#define BRIDGE_RRB_VALID(r) (0x00010000<<(r))
+#define BRIDGE_RRB_INUSE(r) (0x00000001<<(r))
+
+/* RRB clear register */
+#define BRIDGE_RRB_CLEAR(r) (0x00000001<<(r))
+
+/* xbox system controller declarations */
+#define XBOX_BRIDGE_WID 8
+#define FLASH_PROM1_BASE 0xE00000 /* To read the xbox sysctlr status */
+#define XBOX_RPS_EXISTS 1 << 6 /* RPS bit in status register */
+#define XBOX_RPS_FAIL 1 << 4 /* RPS status bit in register */
+
+/* ========================================================================
+ */
+/*
+ * Macros for Xtalk to Bridge bus (PCI/GIO) PIO
+ * refer to section 4.2.1 of Bridge Spec for xtalk to PCI/GIO PIO mappings
+ */
+/* XTALK addresses that map into Bridge Bus addr space */
+#define BRIDGE_PIO32_XTALK_ALIAS_BASE 0x000040000000L
+#define BRIDGE_PIO32_XTALK_ALIAS_LIMIT 0x00007FFFFFFFL
+#define BRIDGE_PIO64_XTALK_ALIAS_BASE 0x000080000000L
+#define BRIDGE_PIO64_XTALK_ALIAS_LIMIT 0x0000BFFFFFFFL
+#define BRIDGE_PCIIO_XTALK_ALIAS_BASE 0x000100000000L
+#define BRIDGE_PCIIO_XTALK_ALIAS_LIMIT 0x0001FFFFFFFFL
+
+/* Ranges of PCI bus space that can be accessed via PIO from xtalk */
+#define BRIDGE_MIN_PIO_ADDR_MEM 0x00000000 /* 1G PCI memory space */
+#define BRIDGE_MAX_PIO_ADDR_MEM 0x3fffffff
+#define BRIDGE_MIN_PIO_ADDR_IO 0x00000000 /* 4G PCI IO space */
+#define BRIDGE_MAX_PIO_ADDR_IO 0xffffffff
+
+/* XTALK addresses that map into PCI addresses */
+#define BRIDGE_PCI_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE
+#define BRIDGE_PCI_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT
+#define BRIDGE_PCI_MEM64_BASE BRIDGE_PIO64_XTALK_ALIAS_BASE
+#define BRIDGE_PCI_MEM64_LIMIT BRIDGE_PIO64_XTALK_ALIAS_LIMIT
+#define BRIDGE_PCI_IO_BASE BRIDGE_PCIIO_XTALK_ALIAS_BASE
+#define BRIDGE_PCI_IO_LIMIT BRIDGE_PCIIO_XTALK_ALIAS_LIMIT
+
+/*
+ * Macros for Bridge bus (PCI/GIO) to Xtalk DMA
+ */
+/* Bridge Bus DMA addresses */
+#define BRIDGE_LOCAL_BASE 0
+#define BRIDGE_DMA_MAPPED_BASE 0x40000000
+#define BRIDGE_DMA_MAPPED_SIZE 0x40000000 /* 1G Bytes */
+#define BRIDGE_DMA_DIRECT_BASE 0x80000000
+#define BRIDGE_DMA_DIRECT_SIZE 0x80000000 /* 2G Bytes */
+
+#define PCI32_LOCAL_BASE BRIDGE_LOCAL_BASE
+
+/* PCI addresses of regions decoded by Bridge for DMA */
+#define PCI32_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE
+#define PCI32_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE
+
+#define IS_PCI32_LOCAL(x) ((ulong_t)(x) < PCI32_MAPPED_BASE)
+#define IS_PCI32_MAPPED(x) ((ulong_t)(x) < PCI32_DIRECT_BASE && \
+ (ulong_t)(x) >= PCI32_MAPPED_BASE)
+#define IS_PCI32_DIRECT(x) ((ulong_t)(x) >= PCI32_MAPPED_BASE)
+#define IS_PCI64(x) ((ulong_t)(x) >= PCI64_BASE)
+
+/*
+ * The GIO address space.
+ */
+/* Xtalk to GIO PIO */
+#define BRIDGE_GIO_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE
+#define BRIDGE_GIO_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT
+
+#define GIO_LOCAL_BASE BRIDGE_LOCAL_BASE
+
+/* GIO addresses of regions decoded by Bridge for DMA */
+#define GIO_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE
+#define GIO_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE
+
+#define IS_GIO_LOCAL(x) ((ulong_t)(x) < GIO_MAPPED_BASE)
+#define IS_GIO_MAPPED(x) ((ulong_t)(x) < GIO_DIRECT_BASE && \
+ (ulong_t)(x) >= GIO_MAPPED_BASE)
+#define IS_GIO_DIRECT(x) ((ulong_t)(x) >= GIO_MAPPED_BASE)
+
+/* PCI to xtalk mapping */
+
+/* given a DIR_OFF value and a pci/gio 32 bits direct address, determine
+ * which xtalk address is accessed
+ */
+#define BRIDGE_DIRECT_32_SEG_SIZE BRIDGE_DMA_DIRECT_SIZE
+#define BRIDGE_DIRECT_32_TO_XTALK(dir_off,adr) \
+ ((dir_off) * BRIDGE_DIRECT_32_SEG_SIZE + \
+ ((adr) & (BRIDGE_DIRECT_32_SEG_SIZE - 1)) + PHYS_RAMBASE)
+
+/* 64-bit address attribute masks */
+#define PCI64_ATTR_TARG_MASK 0xf000000000000000
+#define PCI64_ATTR_TARG_SHFT 60
+#define PCI64_ATTR_PREF 0x0800000000000000
+#define PCI64_ATTR_PREC 0x0400000000000000
+#define PCI64_ATTR_VIRTUAL 0x0200000000000000
+#define PCI64_ATTR_BAR 0x0100000000000000
+#define PCI64_ATTR_RMF_MASK 0x00ff000000000000
+#define PCI64_ATTR_RMF_SHFT 48
+
+#ifndef __ASSEMBLY__
+/* Address translation entry for mapped pci32 accesses */
+typedef union ate_u {
+ u64 ent;
+ struct ate_s {
+ u64 rmf:16;
+ u64 addr:36;
+ u64 targ:4;
+ u64 reserved:3;
+ u64 barrier:1;
+ u64 prefetch:1;
+ u64 precise:1;
+ u64 coherent:1;
+ u64 valid:1;
+ } field;
+} ate_t;
+#endif /* !__ASSEMBLY__ */
+
+#define ATE_V 0x01
+#define ATE_CO 0x02
+#define ATE_PREC 0x04
+#define ATE_PREF 0x08
+#define ATE_BAR 0x10
+
+#define ATE_PFNSHIFT 12
+#define ATE_TIDSHIFT 8
+#define ATE_RMFSHIFT 48
+
+#define mkate(xaddr, xid, attr) ((xaddr) & 0x0000fffffffff000ULL) | \
+ ((xid)<<ATE_TIDSHIFT) | \
+ (attr)
+
+#define BRIDGE_INTERNAL_ATES 128
+
+/*
+ * Linux pci bus mappings to sn physical id's
+ */
+extern unsigned char bus_to_wid[]; /* widget id for linux pci bus */
+extern unsigned char bus_to_nid[]; /* nasid for linux pci bus */
+extern unsigned char num_bridges; /* number of bridges in the system */
+
+#endif /* _ASM_PCI_BRIDGE_H */
diff -Nru a/include/asm-mips/pci.h b/include/asm-mips/pci.h
--- a/include/asm-mips/pci.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/pci.h Sun Aug 3 13:14:50 2003
@@ -61,44 +61,7 @@
*/
#define PCI_DMA_BUS_IS_PHYS (1)
-/*
- * Allocate and map kernel buffer using consistent mode DMA for a device.
- * hwdev should be valid struct pci_dev pointer for PCI devices,
- * NULL for PCI-like buses (ISA, EISA).
- * Returns non-NULL cpu-view pointer to the buffer if successful and
- * sets *dma_addrp to the pci side dma address as well, else *dma_addrp
- * is undefined.
- */
-extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
- dma_addr_t *dma_handle);
-
-/*
- * Free and unmap a consistent DMA buffer.
- * cpu_addr is what was returned from pci_alloc_consistent,
- * size must be the same as what as passed into pci_alloc_consistent,
- * and likewise dma_addr must be the same as what *dma_addrp was set to.
- *
- * References to the memory and mappings associated with cpu_addr/dma_addr
- * past this call are illegal.
- */
-extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
- void *vaddr, dma_addr_t dma_handle);
-
-
-#ifdef CONFIG_MAPPED_PCI_IO
-
-extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
- int direction);
-extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
- size_t size, int direction);
-extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
- int direction);
-extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, int direction);
-extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
- size_t size, int direction);
-extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nelems, int direction);
+#ifdef CONFIG_MAPPED_DMA_IO
/* pci_unmap_{single,page} is not a nop, thus... */
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
@@ -108,49 +71,7 @@
#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
-#else /* CONFIG_MAPPED_PCI_IO */
-
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
-static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
- size_t size, int direction)
-{
- unsigned long addr = (unsigned long) ptr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- dma_cache_wback_inv(addr, size);
-
- return bus_to_baddr(hwdev->bus, __pa(ptr));
-}
-
-/*
- * Unmap a single streaming mode DMA translation. The dma_addr and size
- * must match what was provided for in a previous pci_map_single call. All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guaranteed to see
- * whatever the device wrote there.
- */
-static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
- size_t size, int direction)
-{
- if (direction == PCI_DMA_NONE)
- BUG();
-
- if (direction != PCI_DMA_TODEVICE) {
- unsigned long addr;
-
- addr = baddr_to_bus(hwdev->bus, dma_addr) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
- }
-}
+#else /* CONFIG_MAPPED_DMA_IO */
/* pci_unmap_{page,single} is a nop so... */
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
@@ -160,174 +81,7 @@
#define pci_unmap_len(PTR, LEN_NAME) (0)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
-/*
- * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
- * to pci_map_single, but takes a struct page instead of a virtual address
- */
-static inline dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page,
- unsigned long offset, size_t size,
- int direction)
-{
- unsigned long addr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- addr = (unsigned long) page_address(page) + offset;
- dma_cache_wback_inv(addr, size);
-
- return bus_to_baddr(hwdev->bus, page_to_phys(page) + offset);
-}
-
-static inline void pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
- size_t size, int direction)
-{
- if (direction == PCI_DMA_NONE)
- BUG();
-
- if (direction != PCI_DMA_TODEVICE) {
- unsigned long addr;
-
- addr = baddr_to_bus(hwdev->bus, dma_address) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
- }
-}
-
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA. This is the scather-gather version of the
- * above pci_map_single interface. Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length. They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- * DMA address/length pairs than there are SG table elements.
- * (for example via virtual mapping capabilities)
- * The routine returns the number of addr/length pairs actually
- * used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
-static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, int direction)
-{
- int i;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- for (i = 0; i < nents; i++, sg++) {
- unsigned long addr;
-
- addr = (unsigned long) page_address(sg->page);
- if (addr)
- dma_cache_wback_inv(addr + sg->offset, sg->length);
- sg->dma_address = (dma_addr_t) bus_to_baddr(hwdev->bus,
- page_to_phys(sg->page) + sg->offset);
- }
-
- return nents;
-}
-
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
-static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, int direction)
-{
- int i;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- if (direction == PCI_DMA_TODEVICE)
- return;
-
- for (i = 0; i < nents; i++, sg++) {
- unsigned long addr;
-
- if (!sg->page)
- BUG();
-
- addr = (unsigned long) page_address(sg->page);
- if (addr)
- dma_cache_wback_inv(addr + sg->offset, sg->length);
- }
-}
-
-/*
- * Make physical memory consistent for a single
- * streaming mode DMA translation after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the
- * buffer using the cpu, yet do not wish to teardown the PCI dma
- * mapping, you must call this function before doing so. At the
- * next point you give the PCI dma address back to the card, the
- * device again owns the buffer.
- */
-static inline void pci_dma_sync_single(struct pci_dev *hwdev,
- dma_addr_t dma_handle,
- size_t size, int direction)
-{
- unsigned long addr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- addr = baddr_to_bus(hwdev->bus, dma_handle) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
-}
-
-/*
- * Make physical memory consistent for a set of streaming
- * mode DMA translations after a transfer.
- *
- * The same as pci_dma_sync_single but for a scatter-gather list,
- * same rules and usage.
- */
-static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
- struct scatterlist *sg,
- int nelems, int direction)
-{
-#ifdef CONFIG_NONCOHERENT_IO
- int i;
-#endif
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- /* Make sure that gcc doesn't leave the empty loop body. */
-#ifdef CONFIG_NONCOHERENT_IO
- for (i = 0; i < nelems; i++, sg++)
- dma_cache_wback_inv((unsigned long)page_address(sg->page),
- sg->length);
-#endif
-}
-#endif /* CONFIG_MAPPED_PCI_IO */
-
-/*
- * Return whether the given PCI device DMA address mask can
- * be supported properly. For example, if your device can
- * only drive the low 24-bits during PCI bus mastering, then
- * you would pass 0x00ffffff as the mask to this function.
- */
-static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
-{
- /*
- * we fall back to GFP_DMA when the mask isn't all 1s,
- * so we can't guarantee allocations that must be
- * within a tighter range than GFP_DMA..
- */
-#ifdef CONFIG_ISA
- if (mask < 0x00ffffff)
- return 0;
-#endif
-
- return 1;
-}
+#endif /* CONFIG_MAPPED_DMA_IO */
/* This is always fine. */
#define pci_dac_dma_supported(pci_dev, mask) (1)
@@ -366,17 +120,10 @@
dma_cache_wback_inv(addr, len);
}
-/*
- * These macros should be used after a pci_map_sg call has been done
- * to get bus addresses of each of the SG entries and their lengths.
- * You should only work with the number of sg entries pci_map_sg
- * returns, or alternatively stop on the first sg_dma_len(sg) which
- * is 0.
- */
-#define sg_dma_address(sg) ((sg)->dma_address)
-#define sg_dma_len(sg) ((sg)->length)
-
#endif /* __KERNEL__ */
+
+/* implement the pci_ DMA API in terms of the generic device dma_ one */
+#include <asm-generic/pci-dma-compat.h>
/* generic pci stuff */
#include <asm-generic/pci.h>
diff -Nru a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
--- a/include/asm-mips/pgalloc.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/pgalloc.h Sun Aug 3 13:14:48 2003
@@ -3,47 +3,46 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994 - 2001 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1994 - 2001, 2003 by Ralf Baechle
+ * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
*/
#ifndef _ASM_PGALLOC_H
#define _ASM_PGALLOC_H
#include <linux/config.h>
-#include <linux/mm.h>
#include <linux/highmem.h>
-#include <asm/fixmap.h>
+#include <linux/mm.h>
static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
pte_t *pte)
{
- set_pmd(pmd, __pmd(__pa(pte)));
+ set_pmd(pmd, __pmd((unsigned long)pte));
}
static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
struct page *pte)
{
- set_pmd(pmd, __pmd(((unsigned long long)page_to_pfn(pte) <<
- (unsigned long long) PAGE_SHIFT)));
+ set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
}
-#define pgd_populate(mm, pmd, pte) BUG()
-
/*
- * Initialize new page directory with pointers to invalid ptes
+ * Initialize a new pgd / pmd table with invalid pointers.
*/
extern void pgd_init(unsigned long page);
+extern void pmd_init(unsigned long page, unsigned long pagetable);
static inline pgd_t *pgd_alloc(struct mm_struct *mm)
{
- pgd_t *ret = (pgd_t *)__get_free_pages(GFP_KERNEL, PGD_ORDER), *init;
+ pgd_t *ret, *init;
+ ret = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_ORDER);
if (ret) {
init = pgd_offset(&init_mm, 0);
pgd_init((unsigned long)ret);
- memcpy (ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
- (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
+ memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
+ (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
}
+
return ret;
}
@@ -57,7 +56,7 @@
{
pte_t *pte;
- pte = (pte_t *) __get_free_page(GFP_KERNEL|__GFP_REPEAT);
+ pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT, PTE_ORDER);
if (pte)
clear_page(pte);
@@ -69,11 +68,7 @@
{
struct page *pte;
-#if CONFIG_HIGHPTE
- pte = alloc_pages(GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT, 0);
-#else
- pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, 0);
-#endif
+ pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER);
if (pte)
clear_highpage(pte);
@@ -82,15 +77,19 @@
static inline void pte_free_kernel(pte_t *pte)
{
- free_page((unsigned long)pte);
+ free_pages((unsigned long)pte, PTE_ORDER);
}
static inline void pte_free(struct page *pte)
{
- __free_page(pte);
+ __free_pages(pte, PTE_ORDER);
}
#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
+#define __pmd_free_tlb(tlb,x) do { } while (0)
+
+#ifdef CONFIG_MIPS32
+#define pgd_populate(mm, pmd, pte) BUG()
/*
* allocating and freeing a pmd is trivial: the 1-entry pmd is
@@ -98,7 +97,34 @@
*/
#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
#define pmd_free(x) do { } while (0)
-#define __pmd_free_tlb(tlb,x) do { } while (0)
+#endif
+
+#ifdef CONFIG_MIPS64
+
+#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
+
+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
+{
+ pmd_t *pmd;
+
+ pmd = (pmd_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT, PMD_ORDER);
+ if (pmd)
+ pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table);
+ return pmd;
+}
+
+static inline void pmd_free(pmd_t *pmd)
+{
+ free_pages((unsigned long)pmd, PMD_ORDER);
+}
+
+#endif
+
+/*
+ * Used for the b0rked handling of kernel pagetables on the 64-bit kernel.
+ */
+extern pte_t kptbl[(PAGE_SIZE << PGD_ORDER)/sizeof(pte_t)];
+extern pmd_t kpmdtbl[PTRS_PER_PMD];
#define check_pgt_cache() do { } while (0)
diff -Nru a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/pgtable-32.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,224 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
+ * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_PGTABLE_32_H
+#define _ASM_PGTABLE_32_H
+
+#include <linux/config.h>
+#include <asm/addrspace.h>
+#include <asm/page.h>
+
+#include <linux/linkage.h>
+#include <asm/cachectl.h>
+#include <asm/fixmap.h>
+
+/*
+ * - add_wired_entry() add a fixed TLB entry, and move wired register
+ */
+extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+ unsigned long entryhi, unsigned long pagemask);
+
+/*
+ * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
+ * starting at the top and working down. This is for populating the
+ * TLB before trap_init() puts the TLB miss handler in place. It
+ * should be used only for entries matching the actual page tables,
+ * to prevent inconsistencies.
+ */
+extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
+ unsigned long entryhi, unsigned long pagemask);
+
+
+/* Basically we have the same two-level (which is the logical three level
+ * Linux page table layout folded) page tables as the i386. Some day
+ * when we have proper page coloring support we can have a 1% quicker
+ * tlb refill handling mechanism, but for now it is a bit slower but
+ * works even with the cache aliasing problem the R4k and above have.
+ */
+
+/* PMD_SHIFT determines the size of the area a second-level page table can map */
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define PMD_SHIFT 21
+#else
+#define PMD_SHIFT 22
+#endif
+#define PMD_SIZE (1UL << PMD_SHIFT)
+#define PMD_MASK (~(PMD_SIZE-1))
+
+/* PGDIR_SHIFT determines what a third-level page table entry can map */
+#define PGDIR_SHIFT PMD_SHIFT
+#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+/*
+ * Entries per page directory level: we use two-level, so
+ * we don't really have any PMD directory physically.
+ */
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define PTRS_PER_PTE 512
+#define PTRS_PER_PMD 1
+#define PTRS_PER_PGD 2048
+#define PGD_ORDER 1
+#define PMD_ORDER 0
+#define PTE_ORDER 0
+#else
+#define PTRS_PER_PTE 1024
+#define PTRS_PER_PMD 1
+#define PTRS_PER_PGD 1024
+#define PGD_ORDER 0
+#define PMD_ORDER 0
+#define PTE_ORDER 0
+#endif
+
+#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
+#define FIRST_USER_PGD_NR 0
+
+#define VMALLOC_START KSEG2
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+
+#if CONFIG_HIGHMEM
+# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
+#else
+# define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
+#endif
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define pte_ERROR(e) \
+ printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
+#else
+#define pte_ERROR(e) \
+ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
+#endif
+#define pmd_ERROR(e) \
+ printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
+#define pgd_ERROR(e) \
+ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
+
+extern void load_pgd(unsigned long pg_dir);
+
+extern pmd_t invalid_pte_table[PAGE_SIZE/sizeof(pmd_t)];
+
+/*
+ * Empty pgd/pmd entries point to the invalid_pte_table.
+ */
+static inline int pmd_none(pmd_t pmd)
+{
+ return pmd_val(pmd) == (unsigned long) invalid_pte_table;
+}
+
+#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
+
+static inline int pmd_present(pmd_t pmd)
+{
+ return pmd_val(pmd) != (unsigned long) invalid_pte_table;
+}
+
+static inline void pmd_clear(pmd_t *pmdp)
+{
+ pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
+}
+
+/*
+ * The "pgd_xxx()" functions here are trivial for a folded two-level
+ * setup: the pgd is never bad, and a pmd always exists (as it's folded
+ * into the pgd entry)
+ */
+static inline int pgd_none(pgd_t pgd) { return 0; }
+static inline int pgd_bad(pgd_t pgd) { return 0; }
+static inline int pgd_present(pgd_t pgd) { return 1; }
+static inline void pgd_clear(pgd_t *pgdp) { }
+
+#define pte_page(x) pfn_to_page(pte_pfn(x))
+#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
+#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+
+#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+
+/*
+ * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset
+ * into this range:
+ */
+#define pte_to_pgoff(_pte) \
+ ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 ))
+
+#define pgoff_to_pte(off) \
+ ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE })
+
+#else
+
+/*
+ * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
+ * into this range:
+ */
+#define pte_to_pgoff(_pte) \
+ ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
+
+#define pgoff_to_pte(off) \
+ ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+
+#endif
+
+#define __pgd_offset(address) pgd_index(address)
+#define __pmd_offset(address) \
+ (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+#define pgd_index(address) ((address) >> PGDIR_SHIFT)
+
+/* to find an entry in a page-table-directory */
+#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
+
+/* Find an entry in the second-level page table.. */
+static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
+{
+ return (pmd_t *) dir;
+}
+
+/* Find an entry in the third-level page table.. */
+#define __pte_offset(address) \
+ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset(dir, address) \
+ ((pte_t *) (pmd_page_kernel(*dir)) + __pte_offset(address))
+#define pte_offset_kernel(dir, address) \
+ ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address))
+
+#define pte_offset_map(dir, address) \
+ ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_offset_map_nested(dir, address) \
+ ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_unmap(pte) ((void)(pte))
+#define pte_unmap_nested(pte) ((void)(pte))
+
+extern pgd_t swapper_pg_dir[1024];
+extern void paging_init(void);
+
+/* Swap entries must have VALID and GLOBAL bits cleared. */
+#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+
+#define __swp_type(x) (((x).val >> 1) & 0x7f)
+#define __swp_offset(x) ((x).val >> 10)
+#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 10) })
+#else
+
+#define __swp_type(x) (((x).val >> 1) & 0x1f)
+#define __swp_offset(x) ((x).val >> 8)
+#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+#endif
+
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+typedef u64 pte_addr_t;
+#else
+typedef pte_t *pte_addr_t;
+#endif
+
+#endif /* _ASM_PGTABLE_32_H */
diff -Nru a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/pgtable-64.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,209 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
+ * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_PGTABLE_64_H
+#define _ASM_PGTABLE_64_H
+
+#include <linux/config.h>
+#include <asm/addrspace.h>
+#include <asm/page.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/linkage.h>
+#include <linux/mmzone.h>
+#include <asm/cachectl.h>
+
+/*
+ * Each address space has 2 4K pages as its page directory, giving 1024
+ * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
+ * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to
+ * page tables. Each page table is a single 4K page, giving 512 (==
+ * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to
+ * invalid_pmd_table, each pmde is initialized to point to
+ * invalid_pte_table, each pte is initialized to 0. When memory is low,
+ * and a pmd table or a page table allocation fails, empty_bad_pmd_table
+ * and empty_bad_page_table is returned back to higher layer code, so
+ * that the failure is recognized later on. Linux does not seem to
+ * handle these failures very well though. The empty_bad_page_table has
+ * invalid pte entries in it, to force page faults.
+ * Vmalloc handling: vmalloc uses swapper_pg_dir[0] (returned by
+ * pgd_offset_k), which is initalized to point to kpmdtbl. kpmdtbl is
+ * the only single page pmd in the system. kpmdtbl entries point into
+ * kptbl[] array. We reserve 1 << PGD_ORDER pages to hold the
+ * vmalloc range translations, which the fault handler looks at.
+ */
+
+#endif /* !__ASSEMBLY__ */
+
+/* PMD_SHIFT determines the size of the area a second-level page table can map */
+#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
+#define PMD_SIZE (1UL << PMD_SHIFT)
+#define PMD_MASK (~(PMD_SIZE-1))
+
+/* PGDIR_SHIFT determines what a third-level page table entry can map */
+#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3))
+#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+/* Entries per page directory level: we use two-level, so we don't really
+ have any PMD directory physically. */
+#define PTRS_PER_PGD 1024
+#define PTRS_PER_PMD 1024
+#define PTRS_PER_PTE 512
+#define PGD_ORDER 1
+#define PMD_ORDER 1
+#define PTE_ORDER 0
+
+#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
+#define FIRST_USER_PGD_NR 0
+
+#define VMALLOC_START XKSEG
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+#define VMALLOC_END \
+ (VMALLOC_START + ((1 << PGD_ORDER) * PTRS_PER_PTE * PAGE_SIZE))
+
+#ifndef __ASSEMBLY__
+
+#define pte_ERROR(e) \
+ printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
+#define pmd_ERROR(e) \
+ printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
+#define pgd_ERROR(e) \
+ printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
+
+extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];
+extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)];
+extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
+extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
+
+/*
+ * Empty pmd entries point to the invalid_pte_table.
+ */
+static inline int pmd_none(pmd_t pmd)
+{
+ return pmd_val(pmd) == (unsigned long) invalid_pte_table;
+}
+
+#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
+
+static inline int pmd_present(pmd_t pmd)
+{
+ return pmd_val(pmd) != (unsigned long) invalid_pte_table;
+}
+
+static inline void pmd_clear(pmd_t *pmdp)
+{
+ pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
+}
+
+/*
+ * Empty pgd entries point to the invalid_pmd_table.
+ */
+static inline int pgd_none(pgd_t pgd)
+{
+ return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
+}
+
+#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK)
+
+static inline int pgd_present(pgd_t pgd)
+{
+ return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
+}
+
+static inline void pgd_clear(pgd_t *pgdp)
+{
+ pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
+}
+
+#ifdef CONFIG_DISCONTIGMEM
+
+#define pte_page(x) (NODE_MEM_MAP(PHYSADDR_TO_NID(pte_val(x))) + \
+ PLAT_NODE_DATA_LOCALNR(pte_val(x), PHYSADDR_TO_NID(pte_val(x))))
+
+#else
+#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT)))
+#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
+#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+#endif
+
+/*
+ * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
+ * into this range:
+ */
+#define pte_to_pgoff(_pte) \
+ ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
+
+#define pgoff_to_pte(off) \
+ ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+
+#define __pgd_offset(address) pgd_index(address)
+#define page_pte(page) page_pte_prot(page, __pgprot(0))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address) pgd_offset(&init_mm, 0)
+
+#define pgd_index(address) ((address) >> PGDIR_SHIFT)
+
+/* to find an entry in a page-table-directory */
+#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
+
+static inline unsigned long pgd_page(pgd_t pgd)
+{
+ return pgd_val(pgd);
+}
+
+/* Find an entry in the second-level page table.. */
+static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
+{
+ return (pmd_t *) pgd_page(*dir) +
+ ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
+}
+
+/* Find an entry in the third-level page table.. */
+#define __pte_offset(address) \
+ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset(dir, address) \
+ ((pte_t *) (pmd_page_kernel(*dir)) + __pte_offset(address))
+#define pte_offset_kernel(dir, address) \
+ ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address))
+#define pte_offset_map(dir, address) \
+ ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_offset_map_nested(dir, address) \
+ ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_unmap(pte) ((void)(pte))
+#define pte_unmap_nested(pte) ((void)(pte))
+
+/*
+ * Initialize a new pgd / pmd table with invalid pointers.
+ */
+extern void pgd_init(unsigned long page);
+extern void pmd_init(unsigned long page, unsigned long pagetable);
+
+extern pgd_t swapper_pg_dir[1024];
+extern void paging_init(void);
+
+/*
+ * Non-present pages: high 24 bits are offset, next 8 bits type,
+ * low 32 bits zero.
+ */
+static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
+{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
+
+#define __swp_type(x) (((x).val >> 32) & 0xff)
+#define __swp_offset(x) ((x).val >> 40)
+#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
+
+typedef pte_t *pte_addr_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_PGTABLE_64_H */
diff -Nru a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
--- a/include/asm-mips/pgtable.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/pgtable.h Sun Aug 3 13:14:46 2003
@@ -3,98 +3,32 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle at alii
- * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2003 Ralf Baechle
*/
#ifndef _ASM_PGTABLE_H
#define _ASM_PGTABLE_H
#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-#include <linux/linkage.h>
-#include <asm/cachectl.h>
-#include <asm/fixmap.h>
-
-/*
- * - add_wired_entry() add a fixed TLB entry, and move wired register
- */
-extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask);
-
-/*
- * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
- * starting at the top and working down. This is for populating the
- * TLB before trap_init() puts the TLB miss handler in place. It
- * should be used only for entries matching the actual page tables,
- * to prevent inconsistencies.
- */
-extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask);
-
-
-/* Basically we have the same two-level (which is the logical three level
- * Linux page table layout folded) page tables as the i386. Some day
- * when we have proper page coloring support we can have a 1% quicker
- * tlb refill handling mechanism, but for now it is a bit slower but
- * works even with the cache aliasing problem the R4k and above have.
- */
-
-/* PMD_SHIFT determines the size of the area a second-level page table can map */
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PMD_SHIFT 21
-#else
-#define PMD_SHIFT 22
-#endif
-#define PMD_SIZE (1UL << PMD_SHIFT)
-#define PMD_MASK (~(PMD_SIZE-1))
-
-/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define PGDIR_SHIFT PMD_SHIFT
-#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK (~(PGDIR_SIZE-1))
-
-/*
- * Entries per page directory level: we use two-level, so
- * we don't really have any PMD directory physically.
- */
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PTRS_PER_PTE 512
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD 2048
-#define PGD_ORDER 1
-#else
-#define PTRS_PER_PTE 1024
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD 1024
-#define PGD_ORDER 0
+#ifdef CONFIG_MIPS32
+#include <asm/pgtable-32.h>
#endif
-
-#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
-#define FIRST_USER_PGD_NR 0
-
-#define VMALLOC_START KSEG2
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
-
-#if CONFIG_HIGHMEM
-# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
-#else
-# define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
+#ifdef CONFIG_MIPS64
+#include <asm/pgtable-64.h>
#endif
#include <asm/pgtable-bits.h>
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
-#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
+#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
PAGE_CACHABLE_DEFAULT)
-#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
+#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
PAGE_CACHABLE_DEFAULT)
-#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
+#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
PAGE_CACHABLE_DEFAULT)
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
_PAGE_GLOBAL | PAGE_CACHABLE_DEFAULT)
-#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
+#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
PAGE_CACHABLE_DEFAULT)
#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
@@ -122,18 +56,6 @@
#define __S110 PAGE_SHARED
#define __S111 PAGE_SHARED
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
-#else
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
-#endif
-#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
-#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-
/*
* ZERO_PAGE is a global shared page that is always zero; used
* for zero-mapped memory areas etc..
@@ -145,10 +67,6 @@
#define ZERO_PAGE(vaddr) \
(virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))
-extern void load_pgd(unsigned long pg_dir);
-
-extern pmd_t invalid_pte_table[PAGE_SIZE/sizeof(pmd_t)];
-
/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
@@ -161,7 +79,8 @@
#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
-/* Certain architectures need to do special things when pte's
+/*
+ * Certain architectures need to do special things when pte's
* within a page table are directly modified. Thus, the following
* hook is made available.
*/
@@ -199,67 +118,8 @@
#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0)
-/*
- * Empty pgd/pmd entries point to the invalid_pte_table.
- */
-static inline int pmd_none(pmd_t pmd)
-{
- return pmd_val(pmd) == (unsigned long) invalid_pte_table;
-}
-
-#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
-static inline int pmd_present(pmd_t pmd)
-{
- return (pmd_val(pmd) != (unsigned long) invalid_pte_table);
-}
-
-static inline void pmd_clear(pmd_t *pmdp)
-{
- pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
-}
-
-/*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
- */
-static inline int pgd_none(pgd_t pgd) { return 0; }
-static inline int pgd_bad(pgd_t pgd) { return 0; }
-static inline int pgd_present(pgd_t pgd) { return 1; }
-static inline void pgd_clear(pgd_t *pgdp) { }
-
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
-#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
-#define PTE_FILE_MAX_BITS 27
-
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
-
-/*
- * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset
- * into this range:
- */
-#define pte_to_pgoff(_pte) \
- ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 ))
-
-#define pgoff_to_pte(off) \
- ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE })
-
-#else
-
-/*
- * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
- * into this range:
- */
-#define pte_to_pgoff(_pte) \
- ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
-
-#define pgoff_to_pte(off) \
- ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
-
-#endif
+#define PTE_FILE_MAX_BITS 27
/*
* The following only work if pte_present() is true.
@@ -356,50 +216,6 @@
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
}
-#define __pgd_offset(address) pgd_index(address)
-#define __pmd_offset(address) \
- (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
-
-/* to find an entry in a page-table-directory */
-#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
-
-/* Find an entry in the second-level page table.. */
-static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
-{
- return (pmd_t *) dir;
-}
-
-/* Find an entry in the third-level page table.. */
-#define __pte_offset(address) \
- (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset(dir, address) \
- ((pte_t *) (pmd_page_kernel(*dir)) + __pte_offset(address))
-#define pte_offset_kernel(dir, address) \
- ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address))
-
-#ifdef CONFIG_HIGHPTE
-#define pte_offset_map(dir, address) \
- ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + __pte_offset(address))
-#define pte_offset_map_nested(dir, address) \
- ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + __pte_offset(address))
-#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
-#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
-#else
-#define pte_offset_map(dir, address) \
- ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
-#define pte_offset_map_nested(dir, address) \
- ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
-#define pte_unmap(pte) ((void)(pte))
-#define pte_unmap_nested(pte) ((void)(pte))
-#endif
-
-extern pgd_t swapper_pg_dir[1024];
-extern void paging_init(void);
extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
pte_t pte);
@@ -413,33 +229,11 @@
__update_cache(vma, address, pte);
}
-/* Swap entries must have VALID and GLOBAL bits cleared. */
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
-
-#define __swp_type(x) (((x).val >> 1) & 0x7f)
-#define __swp_offset(x) ((x).val >> 10)
-#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 10) })
-#else
-
-#define __swp_type(x) (((x).val >> 1) & 0x1f)
-#define __swp_offset(x) ((x).val >> 8)
-#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
-#endif
-
-#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-
-
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
+#ifndef CONFIG_DISCONTIGMEM
#define kern_addr_valid(addr) (1)
+#endif
#include <asm-generic/pgtable.h>
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-typedef u64 pte_addr_t;
-#else
-typedef pte_t *pte_addr_t;
-#endif
/*
* We provide our own get_unmapped area to cope with the virtual aliasing
diff -Nru a/include/asm-mips/posix_types.h b/include/asm-mips/posix_types.h
--- a/include/asm-mips/posix_types.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-mips/posix_types.h Sun Aug 3 13:14:49 2003
@@ -3,11 +3,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 1998, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_POSIX_TYPES_H
#define _ASM_POSIX_TYPES_H
+#include <asm/sgidefs.h>
+
/*
* This file is generally used by user-level software, so you need to
* be a little careful about namespace pollution etc. Also, we cannot
@@ -17,15 +20,27 @@
typedef unsigned int __kernel_dev_t;
typedef unsigned long __kernel_ino_t;
typedef unsigned int __kernel_mode_t;
+#if (_MIPS_SZLONG == 32)
typedef unsigned long __kernel_nlink_t;
+#endif
+#if (_MIPS_SZLONG == 64)
+typedef unsigned int __kernel_nlink_t;
+#endif
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef int __kernel_ipc_pid_t;
typedef int __kernel_uid_t;
typedef int __kernel_gid_t;
+#if (_MIPS_SZLONG == 32)
typedef unsigned int __kernel_size_t;
typedef int __kernel_ssize_t;
typedef int __kernel_ptrdiff_t;
+#endif
+#if (_MIPS_SZLONG == 64)
+typedef unsigned long __kernel_size_t;
+typedef long __kernel_ssize_t;
+typedef long __kernel_ptrdiff_t;
+#endif
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
@@ -47,7 +62,12 @@
#endif
typedef struct {
- long val[2];
+#if (_MIPS_SZLONG == 32)
+ long val[2];
+#endif
+#if (_MIPS_SZLONG == 64)
+ int val[2];
+#endif
} __kernel_fsid_t;
#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
diff -Nru a/include/asm-mips/processor.h b/include/asm-mips/processor.h
--- a/include/asm-mips/processor.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/processor.h Sun Aug 3 13:14:44 2003
@@ -6,19 +6,15 @@
* Copyright (C) 1994 Waldorf GMBH
* Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
* Copyright (C) 1996 Paul M. Antoine
- * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_PROCESSOR_H
#define _ASM_PROCESSOR_H
#include <linux/config.h>
-#include <linux/threads.h>
-#include <asm/isadep.h>
-#include <asm/page.h>
/*
- * Default implementation of macro that returns current
- * instruction pointer ("program counter").
+ * Return current * instruction pointer ("program counter").
*/
#define current_text_addr() ({ __label__ _l; _l: &&_l;})
@@ -28,18 +24,23 @@
#include <asm/cachectl.h>
#include <asm/mipsregs.h>
-#include <asm/reg.h>
#include <asm/system.h>
+#if defined(CONFIG_SGI_IP27)
+#include <asm/sn/types.h>
+#include <asm/sn/intr_public.h>
+#endif
+
/*
* Descriptor for a cache
*/
struct cache_desc {
- unsigned short linesz;
- unsigned short ways;
- unsigned int sets;
+ unsigned short linesz; /* Size of line in bytes */
+ unsigned short ways; /* Number of ways */
+ unsigned short sets; /* Number of lines per set */
+ unsigned int waysize; /* Bytes per way */
unsigned int waybit; /* Bits to select in a cache set */
- unsigned int flags; /* Flags describingcache properties */
+ unsigned int flags; /* Flags describing cache properties */
};
/*
@@ -51,23 +52,38 @@
#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
struct cpuinfo_mips {
- unsigned long udelay_val;
- unsigned long asid_cache;
+ unsigned long udelay_val;
+ unsigned long asid_cache;
+#if defined(CONFIG_SGI_IP27)
+ cpuid_t p_cpuid; /* PROM assigned cpuid */
+ cnodeid_t p_nodeid; /* my node ID in compact-id-space */
+ nasid_t p_nasid; /* my node ID in numa-as-id-space */
+ unsigned char p_slice; /* Physical position on node board */
+ hub_intmasks_t p_intmasks; /* SN0 per-CPU interrupt masks */
+#endif
+#if 0
+ unsigned long loops_per_sec;
+ unsigned long ipi_count;
+ unsigned long irq_attempt[NR_IRQS];
+ unsigned long smp_local_irq_count;
+ unsigned long prof_multiplier;
+ unsigned long prof_counter;
+#endif
/*
* Capability and feature descriptor structure for MIPS CPU
*/
- unsigned long options;
- unsigned int processor_id;
- unsigned int fpu_id;
- unsigned int cputype;
- int isa_level;
- int tlbsize;
- struct cache_desc icache; /* Primary I-cache */
- struct cache_desc dcache; /* Primary D or combined I/D cache */
- struct cache_desc scache; /* Secondary cache */
- struct cache_desc tcache; /* Tertiary/split secondary cache */
-} __attribute__((__aligned__(SMP_CACHE_BYTES)));
+ unsigned long options;
+ unsigned int processor_id;
+ unsigned int fpu_id;
+ unsigned int cputype;
+ int isa_level;
+ int tlbsize;
+ struct cache_desc icache; /* Primary I-cache */
+ struct cache_desc dcache; /* Primary D or combined I/D cache */
+ struct cache_desc scache; /* Secondary cache */
+ struct cache_desc tcache; /* Tertiary/split secondary cache */
+} __attribute__((aligned(SMP_CACHE_BYTES)));
/*
* Assumption: Options of CPU 0 are a superset of all processors.
@@ -86,12 +102,21 @@
#define cpu_has_cache_cdex (cpu_data[0].options & MIPS_CPU_CACHE_CDEX)
#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
+/* no FPU exception; never set on 64-bit */
+#ifdef CONFIG_MIPS64
+#define cpu_has_nofpuex 0
+#else
#define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
+#endif
#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
#define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
+#ifdef CONFIG_MIPS64
+#define cpu_has_64bits 1
+#else
#define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
+#endif
#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
extern struct cpuinfo_mips cpu_data[];
@@ -119,18 +144,38 @@
#define MCA_bus 0
#define MCA_bus__is_a_macro /* for versions in ksyms.c */
+#ifdef CONFIG_MIPS32
/*
* User space process size: 2GB. This is hardcoded into a few places,
- * so don't change it unless you know what you are doing. TASK_SIZE
- * for a 64 bit kernel expandable to 8192EB, of which the current MIPS
- * implementations will "only" be able to use 1TB ...
+ * so don't change it unless you know what you are doing.
*/
-#define TASK_SIZE (0x7fff8000UL)
+#define TASK_SIZE 0x7fff8000UL
-/* This decides where the kernel will search for a free chunk of vm
+/*
+ * This decides where the kernel will search for a free chunk of vm
* space during mmap's.
*/
#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
+#endif
+
+#ifdef CONFIG_MIPS64
+/*
+ * User space process size: 1TB. This is hardcoded into a few places,
+ * so don't change it unless you know what you are doing. TASK_SIZE
+ * is limited to 1TB by the R4000 architecture; R10000 and better can
+ * support 16TB; the architectural reserve for future expansion is
+ * 8192EB ...
+ */
+#define TASK_SIZE32 0x7fff8000UL
+#define TASK_SIZE 0x10000000000UL
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
+ PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
+#endif
/*
* Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
@@ -139,9 +184,11 @@
#define NUM_FPU_REGS 32
+typedef u64 fpureg_t;
+
struct mips_fpu_hard_struct {
- double fp_regs[NUM_FPU_REGS];
- unsigned int control;
+ fpureg_t fpr[NUM_FPU_REGS];
+ unsigned int fcr31;
};
/*
@@ -150,10 +197,10 @@
* be recalculated by hand. So the additional information will be private to
* the FPU emulator for now. See asm-mips/fpu_emulator.h.
*/
-typedef u64 fpureg_t;
+
struct mips_fpu_soft_struct {
- fpureg_t regs[NUM_FPU_REGS];
- unsigned int sr;
+ fpureg_t fpr[NUM_FPU_REGS];
+ unsigned int fcr31;
};
union mips_fpu_union {
@@ -189,13 +236,20 @@
unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
unsigned long error_code;
unsigned long trap_no;
-#define MF_FIXADE 1 /* Fix address errors in software */
-#define MF_LOGADE 2 /* Log address errors to syslog */
+#define MF_FIXADE 1 /* Fix address errors in software */
+#define MF_LOGADE 2 /* Log address errors to syslog */
+#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
+#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
unsigned long mflags;
unsigned long irix_trampoline; /* Wheee... */
unsigned long irix_oldctx;
};
+#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
+#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
+#define MF_N32 MF_32BIT_ADDR
+#define MF_N64 0
+
#endif /* !__ASSEMBLY__ */
#define INIT_THREAD { \
@@ -223,31 +277,29 @@
}
#ifdef __KERNEL__
-
-#define KERNEL_STACK_SIZE 8192
-
#ifndef __ASSEMBLY__
+struct task_struct;
+
/* Free all resources held by a thread. */
#define release_thread(thread) do { } while(0)
/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk) do { } while (0)
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-extern unsigned long thread_saved_pc(struct thread_struct *t);
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
/*
* Do necessary setup to start up a newly executed thread.
*/
extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
-struct task_struct;
unsigned long get_wchan(struct task_struct *p);
#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
-#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + KERNEL_STACK_SIZE - 32)
+#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + THREAD_SIZE - 32)
#define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
#define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
#define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))
diff -Nru a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
--- a/include/asm-mips/ptrace.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-mips/ptrace.h Sun Aug 3 13:14:49 2003
@@ -3,14 +3,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
- *
- * Machine dependent structs and defines to help the user use
- * the ptrace system call.
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_PTRACE_H
#define _ASM_PTRACE_H
+#include <linux/config.h>
+
#include <asm/isadep.h>
/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
@@ -24,13 +24,16 @@
#define FPC_EIR 70
#ifndef __ASSEMBLY__
+
/*
* This struct defines the way the registers are stored on the stack during a
* system call/exception. As usual the registers k0/k1 aren't being saved.
*/
struct pt_regs {
+#ifdef CONFIG_MIPS32
/* Pad bytes for argument save space on the stack. */
unsigned long pad0[6];
+#endif
/* Saved main processor registers. */
unsigned long regs[32];
@@ -47,33 +50,6 @@
unsigned long cp0_status;
unsigned long cp0_cause;
};
-
-#define __str2(x) #x
-#define __str(x) __str2(x)
-
-#define save_static_function(symbol) \
-__asm__ ( \
- ".text\n\t" \
- ".globl\t" #symbol "\n\t" \
- ".align\t2\n\t" \
- ".type\t" #symbol ", @function\n\t" \
- ".ent\t" #symbol ", 0\n" \
- #symbol":\n\t" \
- ".frame\t$29, 0, $31\n\t" \
- "sw\t$16,"__str(PT_R16)"($29)\t\t\t# save_static_function\n\t" \
- "sw\t$17,"__str(PT_R17)"($29)\n\t" \
- "sw\t$18,"__str(PT_R18)"($29)\n\t" \
- "sw\t$19,"__str(PT_R19)"($29)\n\t" \
- "sw\t$20,"__str(PT_R20)"($29)\n\t" \
- "sw\t$21,"__str(PT_R21)"($29)\n\t" \
- "sw\t$22,"__str(PT_R22)"($29)\n\t" \
- "sw\t$23,"__str(PT_R23)"($29)\n\t" \
- "sw\t$30,"__str(PT_R30)"($29)\n\t" \
- ".end\t" #symbol "\n\t" \
- ".size\t" #symbol",. - " #symbol)
-
-/* Used in declaration of save_static functions. */
-#define static_unused static __attribute__((unused))
#endif /* !__ASSEMBLY__ */
diff -Nru a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
--- a/include/asm-mips/r4kcache.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/r4kcache.h Sun Aug 3 13:14:45 2003
@@ -140,7 +140,7 @@
static inline void blast_dcache16(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + dcache_way_size;
+ unsigned long end = start + current_cpu_data.dcache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
unsigned long ws_end = current_cpu_data.dcache.ways <<
current_cpu_data.dcache.waybit;
@@ -179,7 +179,7 @@
static inline void blast_icache16(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + icache_way_size;
+ unsigned long end = start + current_cpu_data.icache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<
current_cpu_data.icache.waybit;
@@ -218,7 +218,7 @@
static inline void blast_scache16(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
+ unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
current_cpu_data.scache.waybit;
@@ -283,7 +283,7 @@
static inline void blast_dcache32(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + dcache_way_size;
+ unsigned long end = start + current_cpu_data.dcache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
unsigned long ws_end = current_cpu_data.dcache.ways <<
current_cpu_data.dcache.waybit;
@@ -322,7 +322,7 @@
static inline void blast_icache32(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + icache_way_size;
+ unsigned long end = start + current_cpu_data.icache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<
current_cpu_data.icache.waybit;
@@ -361,7 +361,7 @@
static inline void blast_scache32(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
+ unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
current_cpu_data.scache.waybit;
@@ -426,7 +426,7 @@
static inline void blast_icache64(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + icache_way_size;
+ unsigned long end = start + current_cpu_data.icache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<
current_cpu_data.icache.waybit;
@@ -465,7 +465,7 @@
static inline void blast_scache64(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
+ unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
current_cpu_data.scache.waybit;
@@ -530,7 +530,7 @@
static inline void blast_scache128(void)
{
unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
+ unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
current_cpu_data.scache.waybit;
diff -Nru a/include/asm-mips/reg.h b/include/asm-mips/reg.h
--- a/include/asm-mips/reg.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,66 +0,0 @@
-/*
- * Various register offset definitions for debuggers, core file
- * examiners and whatnot.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999 by Ralf Baechle
- */
-#ifndef __ASM_MIPS_REG_H
-#define __ASM_MIPS_REG_H
-
-/*
- * This defines/structures correspond to the register layout on stack -
- * if the order here is changed, it needs to be updated in
- * include/asm-mips/stackframe.h
- */
-#define EF_REG0 6
-#define EF_REG1 7
-#define EF_REG2 8
-#define EF_REG3 9
-#define EF_REG4 10
-#define EF_REG5 11
-#define EF_REG6 12
-#define EF_REG7 13
-#define EF_REG8 14
-#define EF_REG9 15
-#define EF_REG10 16
-#define EF_REG11 17
-#define EF_REG12 18
-#define EF_REG13 19
-#define EF_REG14 20
-#define EF_REG15 21
-#define EF_REG16 22
-#define EF_REG17 23
-#define EF_REG18 24
-#define EF_REG19 25
-#define EF_REG20 26
-#define EF_REG21 27
-#define EF_REG22 28
-#define EF_REG23 29
-#define EF_REG24 30
-#define EF_REG25 31
-/*
- * k0/k1 unsaved
- */
-#define EF_REG28 34
-#define EF_REG29 35
-#define EF_REG30 36
-#define EF_REG31 37
-
-/*
- * Saved special registers
- */
-#define EF_LO 38
-#define EF_HI 39
-
-#define EF_CP0_EPC 40
-#define EF_CP0_BADVADDR 41
-#define EF_CP0_STATUS 42
-#define EF_CP0_CAUSE 43
-
-#define EF_SIZE 180 /* size in bytes */
-
-#endif /* __ASM_MIPS_REG_H */
diff -Nru a/include/asm-mips/regdef.h b/include/asm-mips/regdef.h
--- a/include/asm-mips/regdef.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/regdef.h Sun Aug 3 13:14:45 2003
@@ -1,15 +1,18 @@
/*
- * include/asm-mips/regdefs.h
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994, 1995 by Ralf Baechle
+ * Copyright (C) 1985 MIPS Computer Systems, Inc.
+ * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
+ * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
*/
+#ifndef _ASM_REGDEF_H
+#define _ASM_REGDEF_H
+
+#include <asm/sgidefs.h>
-#ifndef __ASM_MIPS_REGDEF_H
-#define __ASM_MIPS_REGDEF_H
+#if _MIPS_SIM == _MIPS_SIM_ABI32
/*
* Symbolic register names for 32 bit ABI
@@ -49,4 +52,49 @@
#define s8 $30 /* same like fp! */
#define ra $31 /* return address */
-#endif /* __ASM_MIPS_REGDEF_H */
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
+
+#define zero $0 /* wired zero */
+#define AT $at /* assembler temp - uppercase because of ".set at" */
+#define v0 $2 /* return value - caller saved */
+#define v1 $3
+#define a0 $4 /* argument registers */
+#define a1 $5
+#define a2 $6
+#define a3 $7
+#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
+#define ta0 $8
+#define a5 $9
+#define ta1 $9
+#define a6 $10
+#define ta2 $10
+#define a7 $11
+#define ta3 $11
+#define t0 $12 /* caller saved */
+#define t1 $13
+#define t2 $14
+#define t3 $15
+#define s0 $16 /* callee saved */
+#define s1 $17
+#define s2 $18
+#define s3 $19
+#define s4 $20
+#define s5 $21
+#define s6 $22
+#define s7 $23
+#define t8 $24 /* caller saved */
+#define t9 $25 /* callee address for PIC/temp */
+#define jp $25 /* PIC jump register */
+#define k0 $26 /* kernel temporary */
+#define k1 $27
+#define gp $28 /* global pointer - caller saved for PIC */
+#define sp $29 /* stack pointer */
+#define fp $30 /* frame pointer */
+#define s8 $30 /* callee saved */
+#define ra $31 /* return address */
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+#endif /* _ASM_REGDEF_H */
diff -Nru a/include/asm-mips/resource.h b/include/asm-mips/resource.h
--- a/include/asm-mips/resource.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/resource.h Sun Aug 3 13:14:51 2003
@@ -3,7 +3,8 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 96, 98, 2000 by Ralf Baechle
+ * Copyright (C) 1995, 96, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
*/
#ifndef _ASM_RESOURCE_H
#define _ASM_RESOURCE_H
@@ -21,17 +22,24 @@
#define RLIMIT_RSS 7 /* max resident set size */
#define RLIMIT_NPROC 8 /* max number of processes */
#define RLIMIT_MEMLOCK 9 /* max locked-in-memory address space */
-#define RLIMIT_LOCKS 10 /* maximum file locks held */
+#define RLIMIT_LOCKS 10 /* maximum file locks held */
#define RLIM_NLIMITS 11 /* Number of limit flavors. */
#ifdef __KERNEL__
+#include <linux/config.h>
+
/*
* SuS says limits have to be unsigned.
* Which makes a ton more sense anyway.
*/
+#ifdef CONFIG_MIPS32
#define RLIM_INFINITY 0x7fffffffUL
+#endif
+#ifdef CONFIG_MIPS64
+#define RLIM_INFINITY (~0UL)
+#endif
#define INIT_RLIMITS \
{ \
diff -Nru a/include/asm-mips/scatterlist.h b/include/asm-mips/scatterlist.h
--- a/include/asm-mips/scatterlist.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/scatterlist.h Sun Aug 3 13:14:50 2003
@@ -8,6 +8,16 @@
unsigned int length;
};
+/*
+ * These macros should be used after a pci_map_sg call has been done
+ * to get bus addresses of each of the SG entries and their lengths.
+ * You should only work with the number of sg entries pci_map_sg
+ * returns, or alternatively stop on the first sg_dma_len(sg) which
+ * is 0.
+ */
+#define sg_dma_address(sg) ((sg)->dma_address)
+#define sg_dma_len(sg) ((sg)->length)
+
#define ISA_DMA_THRESHOLD (0x00ffffffUL)
#endif /* __ASM_SCATTERLIST_H */
diff -Nru a/include/asm-mips/sections.h b/include/asm-mips/sections.h
--- a/include/asm-mips/sections.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/sections.h Sun Aug 3 13:14:53 2003
@@ -1,9 +1,9 @@
-#ifndef __ASM_SECTIONS_H
-#define __ASM_SECTIONS_H
+#ifndef _ASM_SECTIONS_H
+#define _ASM_SECTIONS_H
#include <asm-generic/sections.h>
-extern char _stext, _etext;
+extern char _fdata;
extern char _end;
-#endif /* __ASM_SECTIONS_H */
+#endif /* _ASM_SECTIONS_H */
diff -Nru a/include/asm-mips/serial.h b/include/asm-mips/serial.h
--- a/include/asm-mips/serial.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/serial.h Sun Aug 3 13:14:53 2003
@@ -6,6 +6,9 @@
* Copyright (C) 1999 by Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
+#ifndef _ASM_SERIAL_H
+#define _ASM_SERIAL_H
+
#include <linux/config.h>
#include <asm/jazz.h>
@@ -16,7 +19,7 @@
* clock, since the 16550A is capable of handling a top speed of 1.5
* megabits/second; but this requires the faster clock.
*/
-#define BASE_BAUD ( 1843200 / 16 )
+#define BASE_BAUD (1843200 / 16)
#ifndef CONFIG_OLIVETTI_M700
/* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
@@ -156,13 +159,11 @@
#endif
#ifdef CONFIG_LASAT
-#include <asm/lasat/serial.h>
-#define LASAT_SERIAL_PORT_DEFNS \
- { .baud_base = LASAT_BASE_BAUD, .irq = LASATINT_UART, \
- .flags = STD_COM_FLAGS, \
- .port = LASAT_UART_REGS_BASE, /* Only for display */ \
- .iomem_base = (u8 *)KSEG1ADDR(LASAT_UART_REGS_BASE), \
- .iomem_reg_shift = LASAT_UART_REGS_SHIFT, .io_type = SERIAL_IO_MEM },
+/* This dummy definition allocates one element in the SERIAL_PORT_DFNS
+ * list below. This element is filled out by the the code in serial_init()
+ * in arch/mips/lasat/setup.c which autoselects the configuration based
+ * on machine type. */
+#define LASAT_SERIAL_PORT_DEFNS { },
#else
#define LASAT_SERIAL_PORT_DEFNS
#endif
@@ -325,10 +326,14 @@
#define OCELOT_C_SERIAL2_IRQ 81
#define OCELOT_C_SERIAL2_BASE 0xfd000000
-#define _OCELOT_C_SERIAL_INIT(int, base) \
- { baud_base: OCELOT_C_BASE_BAUD, irq: int, flags: STD_COM_FLAGS,\
- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM }
+#define _OCELOT_C_SERIAL_INIT(int, base) \
+ { .baud_base = OCELOT_C_BASE_BAUD, \
+ .irq = (int), \
+ .flags = STD_COM_FLAGS, \
+ .iomem_base = (u8 *) base, \
+ .iomem_reg_shift = 2, \
+ .io_type = SERIAL_IO_MEM \
+ }
#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
_OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \
_OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE)
@@ -349,21 +354,95 @@
#define DDB5477_SERIAL_PORT_DEFNS
#endif
-#define SERIAL_PORT_DFNS \
- IVR_SERIAL_PORT_DEFNS \
- ITE_SERIAL_PORT_DEFNS \
- ATLAS_SERIAL_PORT_DEFNS \
- SEAD_SERIAL_PORT_DEFNS \
- COBALT_SERIAL_PORT_DEFNS \
- LASAT_SERIAL_PORT_DEFNS \
- EV96100_SERIAL_PORT_DEFNS \
- JAZZ_SERIAL_PORT_DEFNS \
- STD_SERIAL_PORT_DEFNS \
- EXTRA_SERIAL_PORT_DEFNS \
- HUB6_SERIAL_PORT_DFNS \
- MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
- MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
- MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
- AU1X00_SERIAL_PORT_DEFNS \
- TXX927_SERIAL_PORT_DEFNS \
+#ifdef CONFIG_SGI_IP27
+
+/*
+ * Note about serial ports and consoles:
+ * For console output, everyone uses the IOC3 UARTA (offset 0x178)
+ * connected to the master node (look in ip27_setup_console() and
+ * ip27prom_console_write()).
+ *
+ * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port
+ * addresses on a partitioned machine. Since we currently use the ioc3
+ * serial ports, we use dynamic serial port discovery that the serial.c
+ * driver uses for pci/pnp ports (there is an entry for the SGI ioc3
+ * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater
+ * than UARTB's, although UARTA on o200s has traditionally been known as
+ * port 0. So, we just use one serial port from each ioc3 (since the
+ * serial driver adds addresses to get to higher ports).
+ *
+ * The first one to do a register_console becomes the preferred console
+ * (if there is no kernel command line console= directive). /dev/console
+ * (ie 5, 1) is then "aliased" into the device number returned by the
+ * "device" routine referred to in this console structure
+ * (ip27prom_console_dev).
+ *
+ * Also look in ip27-pci.c:pci_fixuop_ioc3() for some comments on working
+ * around ioc3 oddities in this respect.
+ *
+ * The IOC3 serials use a 22MHz clock rate with an additional divider by 3.
+ * (IOC3_BAUD = (22000000 / (3*16)))
+ *
+ * At the moment this is only a skeleton definition as we register all serials
+ * at runtime.
+ */
+
+#define IP27_SERIAL_PORT_DEFNS
+#else
+#define IP27_SERIAL_PORT_DEFNS
+#endif /* CONFIG_SGI_IP27 */
+
+#ifdef CONFIG_SGI_IP32
+
+#include <asm/ip32/ip32_ints.h>
+
+/*
+ * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
+ */
+
+/* Standard COM flags (except for COM4, because of the 8514 problem) */
+#ifdef CONFIG_SERIAL_DETECT_IRQ
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
+#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
+#else
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF/* | ASYNC_SKIP_TEST*/)
+#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
+#endif
+
+#define IP32_SERIAL_PORT_DEFNS \
+ { .baud_base = BASE_BAUD, \
+ .irq = MACEISA_SERIAL1_IRQ, \
+ .flags = STD_COM_FLAGS, \
+ .iomem_base = (u8*)MACE_BASE+MACEISA_SER1_BASE, \
+ .iomem_reg_shift = 8, \
+ .io_type = SERIAL_IO_MEM}, \
+ { .baud_base = BASE_BAUD, \
+ .irq = MACEISA_SERIAL2_IRQ, \
+ .flags = STD_COM_FLAGS, \
+ .iomem_base = (u8*)MACE_BASE+MACEISA_SER2_BASE, \
+ .iomem_reg_shift = 8, \
+ .io_type = SERIAL_IO_MEM},
+#else
+#define IP32_SERIAL_PORT_DEFNS
+#endif /* CONFIG_SGI_IP31 */
+
+#define SERIAL_PORT_DFNS \
+ IVR_SERIAL_PORT_DEFNS \
+ ITE_SERIAL_PORT_DEFNS \
+ ATLAS_SERIAL_PORT_DEFNS \
+ SEAD_SERIAL_PORT_DEFNS \
+ COBALT_SERIAL_PORT_DEFNS \
+ LASAT_SERIAL_PORT_DEFNS \
+ EV96100_SERIAL_PORT_DEFNS \
+ JAZZ_SERIAL_PORT_DEFNS \
+ STD_SERIAL_PORT_DEFNS \
+ EXTRA_SERIAL_PORT_DEFNS \
+ HUB6_SERIAL_PORT_DFNS \
+ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
+ MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
+ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
+ AU1X00_SERIAL_PORT_DEFNS \
+ TXX927_SERIAL_PORT_DEFNS \
DDB5477_SERIAL_PORT_DEFNS
+
+#endif /* _ASM_SERIAL_H */
diff -Nru a/include/asm-mips/sfp-machine.h b/include/asm-mips/sfp-machine.h
--- a/include/asm-mips/sfp-machine.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-#define _FP_W_TYPE_SIZE 32
-#define _FP_W_TYPE unsigned long
-#define _FP_WS_TYPE signed long
-#define _FP_I_TYPE long
-
-#define _FP_MUL_MEAT_S(R,X,Y) \
- _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
-#define _FP_MUL_MEAT_D(R,X,Y) \
- _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
-#define _FP_MUL_MEAT_Q(R,X,Y) \
- _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
-
-#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
-#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
-#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
-
-#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
-#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
-#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
-#define _FP_NANSIGN_S 0
-#define _FP_NANSIGN_D 0
-#define _FP_NANSIGN_Q 0
-
-#define _FP_KEEPNANFRACP 1
-/* From my experiments it seems X is chosen unless one of the
- NaNs is sNaN, in which case the result is NANSIGN/NANFRAC. */
-#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
- do { \
- if ((_FP_FRAC_HIGH_RAW_##fs(X) | \
- _FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs) \
- { \
- R##_s = _FP_NANSIGN_##fs; \
- _FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs); \
- } \
- else \
- { \
- R##_s = X##_s; \
- _FP_FRAC_COPY_##wc(R,X); \
- } \
- R##_c = FP_CLS_NAN; \
- } while (0)
-
-#define FP_EX_INVALID (1 << 4)
-#define FP_EX_DIVZERO (1 << 3)
-#define FP_EX_OVERFLOW (1 << 2)
-#define FP_EX_UNDERFLOW (1 << 1)
-#define FP_EX_INEXACT (1 << 0)
diff -Nru a/include/asm-mips/sgi/hpc3.h b/include/asm-mips/sgi/hpc3.h
--- a/include/asm-mips/sgi/hpc3.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/sgi/hpc3.h Sun Aug 3 13:14:47 2003
@@ -214,10 +214,11 @@
#define HPC3_EEPROM_DATI 0x10 /* Data in */
volatile u32 istat1; /* Irq status, only bits <9:5> reliable. */
- volatile u32 gio_estat; /* GIO error interrupt status reg. */
-#define HPC3_GIOESTAT_BLMASK 0x000ff /* Bus lane where bad parity occurred */
-#define HPC3_GIOESTAT_CTYPE 0x00100 /* Bus cycle type, 0=PIO 1=DMA */
-#define HPC3_GIOESTAT_PIDMSK 0x3f700 /* DMA channel parity identifier */
+ volatile u32 bestat; /* Bus error interrupt status reg. */
+#define HPC3_BESTAT_BLMASK 0x000ff /* Bus lane where bad parity occurred */
+#define HPC3_BESTAT_CTYPE 0x00100 /* Bus cycle type, 0=PIO 1=DMA */
+#define HPC3_BESTAT_PIDSHIFT 9
+#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
u32 _unused1[0x14000/4 - 5]; /* padding */
diff -Nru a/include/asm-mips/sgi/ioc.h b/include/asm-mips/sgi/ioc.h
--- a/include/asm-mips/sgi/ioc.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/sgi/ioc.h Sun Aug 3 13:14:47 2003
@@ -139,7 +139,15 @@
#define SGINT_TCWORD_CRBCK 0xc0 /* Readback command */
};
-#define SGINT_TCSAMP_COUNTER 10255
+/*
+ * The timer is the good old 8254. Unlike in PCs it's clocked at exactly 1MHz
+ */
+#define SGINT_TIMER_CLOCK 1000000
+
+/*
+ * This is the constant we're using for calibrating the counter.
+ */
+#define SGINT_TCSAMP_COUNTER ((SGINT_TIMER_CLOCK / HZ) + 255)
/* We need software copies of these because they are write only. */
extern u8 sgi_ioc_reset, sgi_ioc_write;
@@ -201,6 +209,24 @@
#define SGIOC_WRITE_MHI 0x80 /* 1=5.25V 0=+5V */
u32 _unused6;
struct sgint_regs int3;
+ u32 _unused7[16];
+ volatile u32 extio; /* FullHouse only */
+#define EXTIO_S0_IRQ_3 0x8000 /* S0: vid.vsync */
+#define EXTIO_S0_IRQ_2 0x4000 /* S0: gfx.fifofull */
+#define EXTIO_S0_IRQ_1 0x2000 /* S0: gfx.int */
+#define EXTIO_S0_RETRACE 0x1000
+#define EXTIO_SG_IRQ_3 0x0800 /* SG: vid.vsync */
+#define EXTIO_SG_IRQ_2 0x0400 /* SG: gfx.fifofull */
+#define EXTIO_SG_IRQ_1 0x0200 /* SG: gfx.int */
+#define EXTIO_SG_RETRACE 0x0100
+#define EXTIO_GIO_33MHZ 0x0080
+#define EXTIO_EISA_BUSERR 0x0040
+#define EXTIO_MC_BUSERR 0x0020
+#define EXTIO_HPC3_BUSERR 0x0010
+#define EXTIO_S0_STAT_1 0x0008
+#define EXTIO_S0_STAT_0 0x0004
+#define EXTIO_SG_STAT_1 0x0002
+#define EXTIO_SG_STAT_0 0x0001
};
extern struct sgioc_regs *sgioc;
diff -Nru a/include/asm-mips/sgi/ip22.h b/include/asm-mips/sgi/ip22.h
--- a/include/asm-mips/sgi/ip22.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/sgi/ip22.h Sun Aug 3 13:14:53 2003
@@ -23,12 +23,12 @@
#include <asm/sgi/ioc.h>
-#define SGINT_EISA 0 /* INDIGO 2 has 16 EISA irq levels */
+#define SGINT_EISA 0 /* 16 EISA irq levels (Indigo2) */
#define SGINT_CPU 16 /* MIPS CPU define 8 interrupt sources */
-#define SGINT_LOCAL0 24 /* INDY has 8 local0 irq levels */
-#define SGINT_LOCAL1 32 /* INDY has 8 local1 irq levels */
-#define SGINT_LOCAL2 40 /* INDY has 8 local2 vectored irq levels */
-#define SGINT_LOCAL3 48 /* INDY has 8 local3 vectored irq levels */
+#define SGINT_LOCAL0 24 /* 8 local0 irq levels */
+#define SGINT_LOCAL1 32 /* 8 local1 irq levels */
+#define SGINT_LOCAL2 40 /* 8 local2 vectored irq levels */
+#define SGINT_LOCAL3 48 /* 8 local3 vectored irq levels */
#define SGINT_END 56 /* End of 'spaces' */
/*
diff -Nru a/include/asm-mips/sgialib.h b/include/asm-mips/sgialib.h
--- a/include/asm-mips/sgialib.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/sgialib.h Sun Aug 3 13:14:50 2003
@@ -41,8 +41,8 @@
#define PROM_MAX_PMEMBLOCKS 32
struct prom_pmemblock {
LONG base; /* Within KSEG0 or XKPHYS. */
- ULONG size; /* In bytes. */
- ULONG type; /* free or prom memory */
+ ULONG size; /* In bytes. */
+ ULONG type; /* free or prom memory */
};
/* Get next memory descriptor after CURR, returns first descriptor
diff -Nru a/include/asm-mips/shmbuf.h b/include/asm-mips/shmbuf.h
--- a/include/asm-mips/shmbuf.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/shmbuf.h Sun Aug 3 13:14:48 2003
@@ -7,7 +7,7 @@
* between kernel and user space.
*
* Pad space is left for:
- * - 2 miscellaneous 32-bit values
+ * - 2 miscellaneous 32-bit rsp. 64-bit values
*/
struct shmid64_ds {
diff -Nru a/include/asm-mips/shmiq.h b/include/asm-mips/shmiq.h
--- a/include/asm-mips/shmiq.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,225 +0,0 @@
-/*
- * Please note that the comments on this file may be out of date
- * and that they represent what I have figured about the shmiq device
- * so far in IRIX.
- *
- * This also contains some streams and idev bits.
- *
- * They may contain errors, please, refer to the source code of the Linux
- * kernel for a definitive answer on what we have implemented
- *
- * Miguel.
- */
-
-/* STREAMs ioctls */
-#define STRIOC ('S' << 8)
-#define I_STR (STRIOC | 010)
-#define I_PUSH (STRIOC | 02)
-#define I_LINK (STRIOC | 014)
-#define I_UNLINK (STRIOC | 015)
-
-/* Data structure passed on I_STR ioctls */
-struct strioctl {
- int ic_cmd; /* streams ioctl command */
- int ic_timout; /* timeout */
- int ic_len; /* lenght of data */
- void *ic_dp; /* data */
-};
-
-/*
- * For mapping the shared memory input queue, you have to:
- *
- * 1. Map /dev/zero for the number of bytes you want to use
- * for your shared memory input queue plus the size of the
- * sharedMemoryInputQueue structure + 4 (I still have not figured
- * what this one is for
- *
- * 2. Open /dev/shmiq
- *
- * 3. Open /dev/qcntlN N is [0..Nshmiqs]
- *
- * 4. Fill a shmiqreq structure. user_vaddr should point to the return
- * address from the /dev/zero mmap. Arg is the number of shmqevents
- * that fit into the /dev/zero region (remember that at the beginning there
- * is a sharedMemoryInputQueue header).
- *
- * 5. Issue the ioctl (qcntlfd, QIOCATTACH, &your_shmiqreq);
- */
-
-struct shmiqreq {
- char *user_vaddr;
- int arg;
-};
-
-/* map the shmiq into the process address space */
-#define QIOCATTACH _IOW('Q',1,struct shmiqreq)
-
-/* remove mappings */
-#define QIOCDETACH _IO('Q',2)
-
-/*
- * A shared memory input queue event.
- */
-struct shmqdata {
- unsigned char device; /* device major */
- unsigned char which; /* device minor */
- unsigned char type; /* event type */
- unsigned char flags; /* little event data */
- union {
- int pos; /* big event data */
- short ptraxis [2]; /* event data for PTR events */
- } un;
-};
-
-/* indetifies the shmiq and the device */
-struct shmiqlinkid {
- short int devminor;
- short int index;
-};
-
-struct shmqevent {
- union {
- int time;
- struct shmiqlinkid id;
- } un ;
- struct shmqdata data ;
-};
-
-/*
- * sharedMemoryInputQueue: this describes the shared memory input queue.
- *
- * head is the user index into the events, user can modify this one.
- * tail is managed by the kernel.
- * flags is one of SHMIQ_OVERFLOW or SHMIQ_CORRUPTED
- * if OVERFLOW is set it seems ioctl QUIOCSERVICED should be called
- * to notify the kernel.
- * events where the kernel sticks the events.
- */
-struct sharedMemoryInputQueue {
- volatile int head; /* user's index into events */
- volatile int tail; /* kernel's index into events */
- volatile unsigned int flags; /* place for out-of-band data */
-#define SHMIQ_OVERFLOW 1
-#define SHMIQ_CORRUPTED 2
- struct shmqevent events[1]; /* input event buffer */
-};
-
-/* have to figure this one out */
-#define QIOCGETINDX _IOWR('Q', 8, int)
-
-
-/* acknowledge shmiq overflow */
-#define QIOCSERVICED _IO('Q', 3)
-
-/* Double indirect I_STR ioctl, yeah, fun fun fun */
-
-struct muxioctl {
- int index; /* lower stream index */
- int realcmd; /* the actual command for the subdevice */
-};
-/* Double indirect ioctl */
-#define QIOCIISTR _IOW('Q', 7, struct muxioctl)
-
-/* Cursor ioclts: */
-
-/* set cursor tracking mode */
-#define QIOCURSTRK _IOW('Q', 4, int)
-
-/* set cursor filter box */
-#define QIOCURSIGN _IOW('Q', 5, int [4])
-
-/* set cursor axes */
-struct shmiqsetcurs {
- short index;
- short axes;
-};
-
-#define QIOCSETCURS _IOWR('Q', 9, struct shmiqsetcurs)
-
-/* set cursor position */
-struct shmiqsetcpos {
- short x;
- short y;
-};
-#define QIOCSETCPOS _IOWR('Q', 10, struct shmiqsetcpos)
-
-/* get time since last event */
-#define QIOCGETITIME _IOR('Q', 11, time_t)
-
-/* set current screen */
-#define QIOCSETSCRN _IOW('Q',6,int)
-
-
-/* -------------------- iDev stuff -------------------- */
-
-#define IDEV_MAX_NAME_LEN 15
-#define IDEV_MAX_TYPE_LEN 15
-
-typedef struct {
- char devName[IDEV_MAX_NAME_LEN+1];
- char devType[IDEV_MAX_TYPE_LEN+1];
- unsigned short nButtons;
- unsigned short nValuators;
- unsigned short nLEDs;
- unsigned short nStrDpys;
- unsigned short nIntDpys;
- unsigned char nBells;
- unsigned char flags;
-#define IDEV_HAS_KEYMAP 0x01
-#define IDEV_HAS_PROXIMITY 0x02
-#define IDEV_HAS_PCKBD 0x04
-} idevDesc;
-
-typedef struct {
- char *nothing_for_now;
-} idevInfo;
-
-#define IDEV_KEYMAP_NAME_LEN 15
-
-typedef struct {
- char name[IDEV_KEYMAP_NAME_LEN+1];
-} idevKeymapDesc;
-
-/* The valuator definition */
-typedef struct {
- unsigned hwMinRes;
- unsigned hwMaxRes;
- int hwMinVal;
- int hwMaxVal;
-
- unsigned char possibleModes;
-#define IDEV_ABSOLUTE 0x0
-#define IDEV_RELATIVE 0x1
-#define IDEV_EITHER 0x2
-
- unsigned char mode; /* One of: IDEV_ABSOLUTE, IDEV_RELATIVE */
-
- unsigned short resolution;
- int minVal;
- int maxVal;
-} idevValuatorDesc;
-
-/* This is used to query a specific valuator with the IDEVGETVALUATORDESC ioctl */
-typedef struct {
- short valNum;
- unsigned short flags;
- idevValuatorDesc desc;
-} idevGetSetValDesc;
-
-#define IDEVGETDEVICEDESC _IOWR('i', 0, idevDesc)
-#define IDEVGETVALUATORDESC _IOWR('i', 1, idevGetSetValDesc)
-#define IDEVGETKEYMAPDESC _IOWR('i', 2, idevKeymapDesc)
-#define IDEVINITDEVICE _IOW ('i', 51, unsigned int)
-
-
-#ifdef __KERNEL__
-
-/* These are only interpreted by SHMIQ-attacheable devices and are internal
- * to the kernel
- */
-#define SHMIQ_OFF _IO('Q',1)
-#define SHMIQ_ON _IO('Q',2)
-
-void shmiq_push_event (struct shmqevent *e);
-int get_sioc (struct strioctl *sioc, unsigned long arg);
-#endif
diff -Nru a/include/asm-mips/sibyte/64bit.h b/include/asm-mips/sibyte/64bit.h
--- a/include/asm-mips/sibyte/64bit.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,125 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- * Copyright (C) 2002 Ralf Baechle
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef __ASM_SIBYTE_64BIT_H
-#define __ASM_SIBYTE_64BIT_H
-
-#include <linux/config.h>
-#include <linux/types.h>
-
-#ifdef CONFIG_MIPS32
-
-#include <asm/system.h>
-
-/*
- * This is annoying...we can't actually write the 64-bit IO register properly
- * without having access to 64-bit registers... which doesn't work by default
- * in o32 format...grrr...
- */
-static inline void __out64(u64 val, unsigned long addr)
-{
- u64 tmp;
-
- __asm__ __volatile__ (
- " .set mips3 \n"
- " dsll32 %L0, %L0, 0 # __out64 \n"
- " dsrl32 %L0, %L0, 0 \n"
- " dsll32 %M0, %M0, 0 \n"
- " or %L0, %L0, %M0 \n"
- " sd %L0, (%2) \n"
- " .set mips0 \n"
- : "=r" (tmp)
- : "0" (val), "r" (addr));
-}
-
-static inline void out64(u64 val, unsigned long addr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- __out64(val, addr);
- local_irq_restore(flags);
-}
-
-static inline u64 __in64(unsigned long addr)
-{
- u64 res;
-
- __asm__ __volatile__ (
- " .set mips3 # __in64 \n"
- " ld %L0, (%1) \n"
- " dsra32 %M0, %L0, 0 \n"
- " sll %L0, %L0, 0 \n"
- " .set mips0 \n"
- : "=r" (res)
- : "r" (addr));
-
- return res;
-}
-
-static inline u64 in64(unsigned long addr)
-{
- unsigned long flags;
- u64 res;
-
- local_irq_save(flags);
- res = __in64(addr);
- local_irq_restore(flags);
-
- return res;
-}
-
-#endif /* CONFIG_MIPS32 */
-
-#ifdef CONFIG_MIPS64
-
-/*
- * These are provided so as to be able to use common
- * driver code for the 32-bit and 64-bit trees
- */
-extern inline void out64(u64 val, unsigned long addr)
-{
- *(volatile unsigned long *)addr = val;
-}
-
-extern inline u64 in64(unsigned long addr)
-{
- return *(volatile unsigned long *)addr;
-}
-
-#define __in64(a) in64(a)
-#define __out64(v,a) out64(v,a)
-
-#endif /* CONFIG_MIPS64 */
-
-/*
- * Avoid interrupt mucking, just adjust the address for 4-byte access.
- * Assume the addresses are 8-byte aligned.
- */
-
-#ifdef __MIPSEB__
-#define __CSR_32_ADJUST 4
-#else
-#define __CSR_32_ADJUST 0
-#endif
-
-#define csr_out32(v,a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
-#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
-
-#endif /* __ASM_SIBYTE_64BIT_H */
diff -Nru a/include/asm-mips/sibyte/sb1250.h b/include/asm-mips/sibyte/sb1250.h
--- a/include/asm-mips/sibyte/sb1250.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/sibyte/sb1250.h Sun Aug 3 13:14:51 2003
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -19,8 +19,16 @@
#ifndef _ASM_SIBYTE_SB1250_H
#define _ASM_SIBYTE_SB1250_H
+/*
+ * yymmddpp: year, month, day, patch.
+ * should sync with Makefile EXTRAVERSION
+ */
+#define SIBYTE_RELEASE 0x02111403
+
#define SB1250_NR_IRQS 64
+#define SB1250_DUART_MINOR_BASE 64
+
#ifndef __ASSEMBLY__
#include <asm/addrspace.h>
@@ -31,6 +39,7 @@
extern unsigned int soc_pass;
extern unsigned int soc_type;
extern unsigned int periph_rev;
+extern unsigned int zbbus_mhz;
extern void sb1250_time_init(void);
extern unsigned long sb1250_gettimeoffset(void);
diff -Nru a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h
--- a/include/asm-mips/sibyte/sb1250_defs.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/sibyte/sb1250_defs.h Sun Aug 3 13:14:50 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -100,10 +100,10 @@
#define SIBYTE_HDR_FMASK_1250_ALL 0x00000ff
#define SIBYTE_HDR_FMASK_1250_PASS1 0x0000001
#define SIBYTE_HDR_FMASK_1250_PASS2 0x0000002
+#define SIBYTE_HDR_FMASK_1250_PASS3 0x0000004
#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00
#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100
-#define SIBYTE_HDR_FMASK_112x_PASS3 0x0000200
/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
#define SIBYTE_HDR_FMASK(chip, pass) \
@@ -234,7 +234,7 @@
*/
-#if !defined(__ASSEMBLER__)
+#if defined(__mips64) && !defined(__ASSEMBLER__)
#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
#endif /* __ASSEMBLER__ */
diff -Nru a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h
--- a/include/asm-mips/sibyte/sb1250_dma.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/sibyte/sb1250_dma.h Sun Aug 3 13:14:44 2003
@@ -9,7 +9,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -65,10 +65,10 @@
#define K_DMA_DESC_TYPE_RING_AL 0
#define K_DMA_DESC_TYPE_CHAIN_AL 1
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define K_DMA_DESC_TYPE_RING_UAL_WI 2
#define K_DMA_DESC_TYPE_RING_UAL_RMW 3
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3)
#define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4)
@@ -111,11 +111,11 @@
#define M_DMA_NO_DSCR_UPDT _SB_MAKEMASK1(4)
#define M_DMA_L2CA _SB_MAKEMASK1(5)
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_DMA_RX_XTRA_STATUS _SB_MAKEMASK1(6)
#define M_DMA_TX_CPU_PAUSE _SB_MAKEMASK1(6)
#define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define M_DMA_MBZ1 _SB_MAKEMASK(6,15)
@@ -165,14 +165,14 @@
#define S_DMA_CURDSCR_COUNT _SB_MAKE64(40)
#define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT)
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
/*
* Receive Packet Drop Registers
*/
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_DMA_OODLOST_RX _SB_MAKE64(0)
#define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX)
#define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX)
@@ -180,7 +180,7 @@
#define S_DMA_EOP_COUNT_RX _SB_MAKE64(16)
#define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX)
#define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
/* *********************************************************************
* DMA Descriptors
@@ -201,21 +201,21 @@
#define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR)
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0)
#define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40)
#define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE)
#define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE)
#define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE)
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40)
#define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT)
#define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49)
#define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50)
@@ -235,12 +235,12 @@
#define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS)
#define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS)
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8)
#define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE)
#define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE)
#define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10)
@@ -255,12 +255,12 @@
#define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49)
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48)
#define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB)
#define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB)
#define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50)
#define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE)
@@ -287,10 +287,10 @@
#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0)
#endif /* 1250 PASS2 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_DMA_ETH_VLAN_FLAG _SB_MAKEMASK1(1)
#define M_DMA_ETH_CRC_FLAG _SB_MAKEMASK1(2)
-#endif
+#endif /* 1250 PASS3 || 112x PASS1 */
#define S_DMA_ETHRX_RXCH 53
#define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH)
@@ -438,7 +438,7 @@
M_DM_CUR_DSCR_DSCR_COUNT)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
/*
* Data Mover Channel Partial Result Registers
* Register: DM_PARTIAL_0
@@ -459,10 +459,10 @@
M_DM_PARTIAL_TCPCS_PARTIAL)
#define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
/*
* Data Mover CRC Definition Registers
* Register: CRC_DEF_0
@@ -479,10 +479,10 @@
#define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY)
#define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\
M_CRC_DEF_CRC_POLY)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
/*
* Data Mover CRC/Checksum Definition Registers
* Register: CTCP_DEF_0
@@ -511,7 +511,7 @@
#define K_CTCP_DEF_CRC_WIDTH_1 2
#define M_CTCP_DEF_CRC_BIT_ORDER _SB_MAKEMASK1(50)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
/*
@@ -565,7 +565,7 @@
#define M_DM_DSCRA_WR_BKOFF _SB_MAKEMASK1(53)
#endif /* 1250 PASS2 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_DM_DSCRA_TCPCS_EN _SB_MAKEMASK1(54)
#define M_DM_DSCRA_TCPCS_RES _SB_MAKEMASK1(55)
#define M_DM_DSCRA_TCPCS_AP _SB_MAKEMASK1(56)
@@ -574,7 +574,7 @@
#define M_DM_DSCRA_CRC_AP _SB_MAKEMASK1(59)
#define M_DM_DSCRA_CRC_DFN _SB_MAKEMASK1(60)
#define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61)
diff -Nru a/include/asm-mips/sibyte/sb1250_genbus.h b/include/asm-mips/sibyte/sb1250_genbus.h
--- a/include/asm-mips/sibyte/sb1250_genbus.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/sibyte/sb1250_genbus.h Sun Aug 3 13:14:52 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
diff -Nru a/include/asm-mips/sibyte/sb1250_int.h b/include/asm-mips/sibyte/sb1250_int.h
--- a/include/asm-mips/sibyte/sb1250_int.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/sibyte/sb1250_int.h Sun Aug 3 13:14:44 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
diff -Nru a/include/asm-mips/sibyte/sb1250_l2c.h b/include/asm-mips/sibyte/sb1250_l2c.h
--- a/include/asm-mips/sibyte/sb1250_l2c.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/sibyte/sb1250_l2c.h Sun Aug 3 13:14:48 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -103,7 +103,7 @@
#define L2C_NUM_WAYS 4
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
/*
* L2 Read Misc. register (A_L2_READ_MISC)
*/
@@ -122,7 +122,7 @@
#define M_L2C_MISC_SCACHE_DISABLE_B _SB_MAKEMASK1(2)
#define M_L2C_MISC_SCACHE_DISABLE_R _SB_MAKEMASK1(1)
#define M_L2C_MISC_SCACHE_DISABLE_L _SB_MAKEMASK1(0)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#endif
diff -Nru a/include/asm-mips/sibyte/sb1250_ldt.h b/include/asm-mips/sibyte/sb1250_ldt.h
--- a/include/asm-mips/sibyte/sb1250_ldt.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/sibyte/sb1250_ldt.h Sun Aug 3 13:14:52 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
diff -Nru a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
--- a/include/asm-mips/sibyte/sb1250_mac.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/sibyte/sb1250_mac.h Sun Aug 3 13:14:51 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -132,9 +132,9 @@
#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44)
#endif /* 1250 PASS2 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#define S_MAC_BYPASS_IFG _SB_MAKE64(46)
#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
@@ -267,12 +267,12 @@
#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX)
#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_MAC_PRE_LEN _SB_MAKE64(0)
#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN)
#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN)
#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#define S_MAC_IFG_TX _SB_MAKE64(6)
#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX)
@@ -368,7 +368,7 @@
#define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x,S_MAC_VLAN_TAG)
#define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32)
#define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET)
#define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET)
@@ -380,7 +380,7 @@
#define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET)
#define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
/*
* MAC Status Registers (Table 9-17)
@@ -458,9 +458,9 @@
#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR)
#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
/*
* MAC Fifo Pointer Registers (Table 9-19) [Debug register]
@@ -594,7 +594,7 @@
#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET)
#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16)
#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET)
#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET)
@@ -612,7 +612,7 @@
#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL)
#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL)
#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
/*
* MAC Receive Channel Select Registers (Table 9-25)
diff -Nru a/include/asm-mips/sibyte/sb1250_mc.h b/include/asm-mips/sibyte/sb1250_mc.h
--- a/include/asm-mips/sibyte/sb1250_mc.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/sibyte/sb1250_mc.h Sun Aug 3 13:14:51 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -191,9 +191,9 @@
#define G_MC_ADDR_DRIVE(x) _SB_GETVALUE(x,S_MC_ADDR_DRIVE,M_MC_ADDR_DRIVE)
#define V_MC_ADDR_DRIVE_DEFAULT V_MC_ADDR_DRIVE(0x0)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_MC_REF_DISABLE _SB_MAKEMASK1(30)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#define M_MC_DLL_BYPASS _SB_MAKEMASK1(31)
@@ -295,10 +295,10 @@
#define M_MC_EXTERNALDECODE _SB_MAKEMASK1(35)
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define M_MC_PRE_ON_A8 _SB_MAKEMASK1(36)
#define M_MC_RAM_WITH_A13 _SB_MAKEMASK1(38)
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
diff -Nru a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
--- a/include/asm-mips/sibyte/sb1250_regs.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/sibyte/sb1250_regs.h Sun Aug 3 13:14:46 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: 01/02/2002
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -107,9 +107,9 @@
#define A_L2_READ_TAG 0x0010040018
#define A_L2_ECC_TAG 0x0010040038
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define A_L2_READ_MISC 0x0010040058
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#define A_L2_WAY_DISABLE 0x0010041000
#define A_L2_MAKEDISABLE(x) (A_L2_WAY_DISABLE | (((~(x))&0x0F) << 8))
#define A_L2_MGMT_TAG_BASE 0x00D0000000
@@ -195,9 +195,9 @@
#define R_MAC_DMA_CUR_DSCRA 0x00000020
#define R_MAC_DMA_CUR_DSCRB 0x00000028
#define R_MAC_DMA_CUR_DSCRADDR 0x00000030
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define R_MAC_DMA_OODPKTLOST_RX 0x00000038 /* rx only */
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
/*
* RMON Counters
@@ -236,10 +236,10 @@
#define R_MAC_ADFILTER_CFG 0x00000200
#define R_MAC_ETHERNET_ADDR 0x00000208
#define R_MAC_PKT_TYPE 0x00000210
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define R_MAC_ADMASK0 0x00000218
#define R_MAC_ADMASK1 0x00000220
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
#define R_MAC_HASH_BASE 0x00000240
#define R_MAC_ADDR_BASE 0x00000280
#define R_MAC_CHLO0_BASE 0x00000300
@@ -647,6 +647,7 @@
#define A_SCD_SYSTEM_REVISION 0x0010020000
#define A_SCD_SYSTEM_CFG 0x0010020008
+#define A_SCD_SYSTEM_MANUF 0x0010038000
/* *********************************************************************
* System Address Trap Registers
@@ -772,16 +773,16 @@
#define R_DM_CUR_DSCR_ADDR 0x0000000010
#define R_DM_DSCR_BASE_DEBUG 0x0000000018
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define A_DM_PARTIAL_0 0x0010020ba0
#define A_DM_PARTIAL_1 0x0010020ba8
#define A_DM_PARTIAL_2 0x0010020bb0
#define A_DM_PARTIAL_3 0x0010020bb8
#define DM_PARTIAL_REGISTER_SPACING 0x8
#define A_DM_PARTIAL(idx) (A_DM_PARTIAL_0 + ((idx) * DM_PARTIAL_REGISTER_SPACING))
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
#define A_DM_CRC_0 0x0010020b80
#define A_DM_CRC_1 0x0010020b90
#define DM_CRC_REGISTER_SPACING 0x10
@@ -791,7 +792,7 @@
#define R_CRC_DEF_0 0x00
#define R_CTCP_DEF_0 0x08
-#endif /* 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 */
/* *********************************************************************
* Physical Address Map
diff -Nru a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
--- a/include/asm-mips/sibyte/sb1250_scd.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/sibyte/sb1250_scd.h Sun Aug 3 13:14:50 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
@@ -58,6 +58,7 @@
#define K_SYS_REVISION_BCM1250_PASS2_2 16
#define K_SYS_REVISION_BCM1250_B2 17
#define K_SYS_REVISION_BCM1250_PASS3 32
+#define K_SYS_REVISION_BCM1250_C1 33
/* XXX: discourage people from using these constants. */
#define K_SYS_REVISION_PASS1 K_SYS_REVISION_BCM1250_PASS1
@@ -126,6 +127,43 @@
#define V_SYS_WID(x) _SB_MAKEVALUE(x,S_SYS_WID)
#define G_SYS_WID(x) _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID)
+/* System Manufacturing Register
+* Register: SCD_SYSTEM_MANUF
+*/
+
+/* Wafer ID: bits 31:0 */
+#define S_SYS_WAFERID1_200 _SB_MAKE64(0)
+#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200)
+#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200)
+#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200)
+
+#define S_SYS_BIN _SB_MAKE64(32)
+#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN)
+#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN)
+#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN)
+
+/* Wafer ID: bits 39:36 */
+#define S_SYS_WAFERID2_200 _SB_MAKE64(36)
+#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200)
+#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200)
+#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200)
+
+/* Wafer ID: bits 39:0 */
+#define S_SYS_WAFERID_300 _SB_MAKE64(0)
+#define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300)
+#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300)
+#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300)
+
+#define S_SYS_XPOS _SB_MAKE64(40)
+#define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS)
+#define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS)
+#define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS)
+
+#define S_SYS_YPOS _SB_MAKE64(46)
+#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS)
+#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS)
+#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS)
+
/*
* System Config Register (Table 4-2)
* Register: SCD_SYSTEM_CFG
@@ -243,7 +281,26 @@
#define S_SCD_WDOG_CNT 0
#define M_SCD_WDOG_CNT _SB_MAKEMASK(23,S_SCD_WDOG_CNT)
-#define M_SCD_WDOG_ENABLE _SB_MAKEMASK1(0)
+#define S_SCD_WDOG_ENABLE 0
+#define M_SCD_WDOG_ENABLE _SB_MAKEMASK1(S_SCD_WDOG_ENABLE)
+
+#define S_SCD_WDOG_RESET_TYPE 2
+#define M_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(3,S_SCD_WDOG_RESET_TYPE)
+#define V_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x,S_SCD_WDOG_RESET_TYPE)
+#define G_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x,S_SCD_WDOG_RESET_TYPE,M_SCD_WDOG_RESET_TYPE)
+
+#define K_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */
+#define K_SCD_WDOG_RESET_SOFT 1
+#define K_SCD_WDOG_RESET_CPU0 3
+#define K_SCD_WDOG_RESET_CPU1 5
+#define K_SCD_WDOG_RESET_BOTH_CPUS 7
+
+/* This feature is present in 1250 C0 and later, but *not* in 112x A revs. */
+#if SIBYTE_HDR_FEATURE(1250, PASS3)
+#define S_SCD_WDOG_HAS_RESET 8
+#define M_SCD_WDOG_HAS_RESET _SB_MAKEMASK1(S_SCD_WDOG_HAS_RESET)
+#endif
+
/*
* Timer Registers (Table 4-11) (Table 4-12) (Table 4-13)
diff -Nru a/include/asm-mips/sibyte/sb1250_smbus.h b/include/asm-mips/sibyte/sb1250_smbus.h
--- a/include/asm-mips/sibyte/sb1250_smbus.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/sibyte/sb1250_smbus.h Sun Aug 3 13:14:44 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: 01/02/2002
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
diff -Nru a/include/asm-mips/sibyte/sb1250_syncser.h b/include/asm-mips/sibyte/sb1250_syncser.h
--- a/include/asm-mips/sibyte/sb1250_syncser.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-mips/sibyte/sb1250_syncser.h Sun Aug 3 13:14:49 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
diff -Nru a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h
--- a/include/asm-mips/sibyte/sb1250_uart.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/sibyte/sb1250_uart.h Sun Aug 3 13:14:52 2003
@@ -8,7 +8,7 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
+ * Author: Mitch Lichtenberg
*
*********************************************************************
*
diff -Nru a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
--- a/include/asm-mips/sigcontext.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/sigcontext.h Sun Aug 3 13:14:53 2003
@@ -3,33 +3,88 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1999 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
*/
#ifndef _ASM_SIGCONTEXT_H
#define _ASM_SIGCONTEXT_H
+#include <asm/sgidefs.h>
+
+#if _MIPS_SIM == _MIPS_SIM_ABI32
+
/*
* Keep this struct definition in sync with the sigcontext fragment
* in arch/mips/tools/offset.c
*/
struct sigcontext {
- unsigned int sc_regmask; /* Unused */
- unsigned int sc_status;
- unsigned long long sc_pc;
- unsigned long long sc_regs[32];
- unsigned long long sc_fpregs[32];
- unsigned int sc_ownedfp; /* Unused */
- unsigned int sc_fpc_csr;
- unsigned int sc_fpc_eir; /* Unused */
- unsigned int sc_used_math;
- unsigned int sc_ssflags; /* Unused */
- unsigned long long sc_mdhi;
- unsigned long long sc_mdlo;
+ unsigned int sc_regmask; /* Unused */
+ unsigned int sc_status;
+ unsigned long long sc_pc;
+ unsigned long long sc_regs[32];
+ unsigned long long sc_fpregs[32];
+ unsigned int sc_ownedfp; /* Unused */
+ unsigned int sc_fpc_csr;
+ unsigned int sc_fpc_eir; /* Unused */
+ unsigned int sc_used_math;
+ unsigned int sc_ssflags; /* Unused */
+ unsigned long long sc_mdhi;
+ unsigned long long sc_mdlo;
- unsigned int sc_cause; /* Unused */
- unsigned int sc_badvaddr; /* Unused */
+ unsigned int sc_cause; /* Unused */
+ unsigned int sc_badvaddr; /* Unused */
- unsigned long sc_sigset[4]; /* kernel's sigset_t */
+ unsigned long sc_sigset[4]; /* kernel's sigset_t */
};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
+
+#include <linux/types.h>
+
+/*
+ * Keep this struct definition in sync with the sigcontext fragment
+ * in arch/mips/tools/offset.c
+ *
+ * Warning: this structure illdefined with sc_badvaddr being just an unsigned
+ * int so it was changed to unsigned long in 2.6.0-test1. This may break
+ * binary compatibility - no prisoners.
+ */
+struct sigcontext {
+ unsigned long sc_regs[32];
+ unsigned long sc_fpregs[32];
+ unsigned long sc_mdhi;
+ unsigned long sc_mdlo;
+ unsigned long sc_pc;
+ unsigned long sc_badvaddr;
+ unsigned int sc_status;
+ unsigned int sc_fpc_csr;
+ unsigned int sc_fpc_eir;
+ unsigned int sc_used_math;
+ unsigned int sc_cause;
+};
+
+struct sigcontext32 {
+ __u32 sc_regmask; /* Unused */
+ __u32 sc_status;
+ __u64 sc_pc;
+ __u64 sc_regs[32];
+ __u64 sc_fpregs[32];
+ __u32 sc_ownedfp; /* Unused */
+ __u32 sc_fpc_csr;
+ __u32 sc_fpc_eir; /* Unused */
+ __u32 sc_used_math;
+ __u32 sc_ssflags; /* Unused */
+ __u64 sc_mdhi;
+ __u64 sc_mdlo;
+
+ __u32 sc_cause; /* Unused */
+ __u32 sc_badvaddr; /* Unused */
+
+ __u32 sc_sigset[4]; /* kernel's sigset_t */
+};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
#endif /* _ASM_SIGCONTEXT_H */
diff -Nru a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h
--- a/include/asm-mips/siginfo.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-mips/siginfo.h Sun Aug 3 13:14:48 2003
@@ -3,12 +3,16 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1998, 1999, 2001 Ralf Baechle
+ * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
*/
#ifndef _ASM_SIGINFO_H
#define _ASM_SIGINFO_H
+#include <linux/config.h>
+
#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 4)
+#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 4)
#define HAVE_ARCH_SIGINFO_T
#define HAVE_ARCH_SIGEVENT_T
@@ -22,9 +26,7 @@
#include <asm-generic/siginfo.h>
-/* The sigval union matches IRIX 32/n32 ABIs for binary compatibility. */
-
-/* This structure matches IRIX 32/n32 ABIs for binary compatibility but
+/* This structure matches the 32/n32 ABIs for source compatibility but
has Linux extensions. */
typedef struct siginfo {
@@ -65,7 +67,12 @@
/* SIGPOLL, SIGXFSZ (To do ...) */
struct {
+#ifdef CONFIG_MIPS32
int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
+#endif
+#ifdef CONFIG_MIPS64
+ long _band; /* POLL_IN, POLL_OUT, POLL_MSG */
+#endif
int _fd;
} _sigpoll;
@@ -87,6 +94,77 @@
} _sifields;
} siginfo_t;
+
+#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
+
+#include <linux/compat.h>
+
+#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
+
+typedef union sigval32 {
+ int sival_int;
+ s32 sival_ptr;
+} sigval_t32;
+
+typedef struct siginfo32 {
+ int si_signo;
+ int si_code;
+ int si_errno;
+
+ union {
+ int _pad[SI_PAD_SIZE32];
+
+ /* kill() */
+ struct {
+ compat_pid_t _pid; /* sender's pid */
+ compat_uid_t _uid; /* sender's uid */
+ } _kill;
+
+ /* SIGCHLD */
+ struct {
+ compat_pid_t _pid; /* which child */
+ compat_uid_t _uid; /* sender's uid */
+ compat_clock_t _utime;
+ int _status; /* exit code */
+ compat_clock_t _stime;
+ } _sigchld;
+
+ /* IRIX SIGCHLD */
+ struct {
+ compat_pid_t _pid; /* which child */
+ compat_clock_t _utime;
+ int _status; /* exit code */
+ compat_clock_t _stime;
+ } _irix_sigchld;
+
+ /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+ struct {
+ s32 _addr; /* faulting insn/memory ref. */
+ } _sigfault;
+
+ /* SIGPOLL, SIGXFSZ (To do ...) */
+ struct {
+ int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
+ int _fd;
+ } _sigpoll;
+
+ /* POSIX.1b timers */
+ struct {
+ unsigned int _timer1;
+ unsigned int _timer2;
+ } _timer;
+
+ /* POSIX.1b signals */
+ struct {
+ compat_pid_t _pid; /* sender's pid */
+ compat_uid_t _uid; /* sender's uid */
+ sigval_t32 _sigval;
+ } _rt;
+
+ } _sifields;
+} siginfo_t32;
+
+#endif /* defined(__KERNEL__) && defined(CONFIG_COMPAT) */
/*
* si_code values
diff -Nru a/include/asm-mips/signal.h b/include/asm-mips/signal.h
--- a/include/asm-mips/signal.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/signal.h Sun Aug 3 13:14:47 2003
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997, 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1995, 96, 97, 98, 99, 2003 by Ralf Baechle
* Copyright (C) 1999 Silicon Graphics, Inc.
*/
#ifndef _ASM_SIGNAL_H
@@ -13,7 +13,7 @@
#include <linux/types.h>
#define _NSIG 128
-#define _NSIG_BPW 32
+#define _NSIG_BPW (sizeof(unsigned long) * 8)
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
typedef struct {
@@ -87,7 +87,7 @@
#define SA_ONESHOT SA_RESETHAND
#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
-#define SA_RESTORER 0x04000000
+#define SA_RESTORER 0x04000000 /* Only for o32 */
/*
* sigaltstack controls
diff -Nru a/include/asm-mips/sim.h b/include/asm-mips/sim.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sim.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,97 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999, 2000, 2003 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_SIM_H
+#define _ASM_SIM_H
+
+#include <linux/config.h>
+
+#include <asm/offset.h>
+
+#ifdef CONFIG_MIPS32
+
+/* Used in declaration of save_static functions. */
+#define static_unused static __attribute__((unused))
+
+#define __str2(x) #x
+#define __str(x) __str2(x)
+
+#define save_static_function(symbol) \
+__asm__ ( \
+ ".text\n\t" \
+ ".globl\t" #symbol "\n\t" \
+ ".align\t2\n\t" \
+ ".type\t" #symbol ", @function\n\t" \
+ ".ent\t" #symbol ", 0\n" \
+ #symbol":\n\t" \
+ ".frame\t$29, 0, $31\n\t" \
+ "sw\t$16,"__str(PT_R16)"($29)\t\t\t# save_static_function\n\t" \
+ "sw\t$17,"__str(PT_R17)"($29)\n\t" \
+ "sw\t$18,"__str(PT_R18)"($29)\n\t" \
+ "sw\t$19,"__str(PT_R19)"($29)\n\t" \
+ "sw\t$20,"__str(PT_R20)"($29)\n\t" \
+ "sw\t$21,"__str(PT_R21)"($29)\n\t" \
+ "sw\t$22,"__str(PT_R22)"($29)\n\t" \
+ "sw\t$23,"__str(PT_R23)"($29)\n\t" \
+ "sw\t$30,"__str(PT_R30)"($29)\n\t" \
+ ".end\t" #symbol "\n\t" \
+ ".size\t" #symbol",. - " #symbol)
+
+#define save_static(frame) do { } while (0)
+
+#define nabi_no_regargs
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+
+/* Used in declaration of save_static functions. */
+#define static_unused static __attribute__((unused))
+
+#define __str2(x) #x
+#define __str(x) __str2(x)
+
+#define save_static_function(symbol) \
+__asm__ ( \
+ ".text\n\t" \
+ ".globl\t" #symbol "\n\t" \
+ ".align\t2\n\t" \
+ ".type\t" #symbol ", @function\n\t" \
+ ".ent\t" #symbol ", 0\n" \
+ #symbol":\n\t" \
+ ".frame\t$29, 0, $31\n\t" \
+ ".end\t" #symbol "\n\t" \
+ ".size\t" #symbol",. - " #symbol)
+
+#define save_static(frame) \
+ __asm__ __volatile__( \
+ "sd\t$16,"__str(PT_R16)"(%0)\n\t" \
+ "sd\t$17,"__str(PT_R17)"(%0)\n\t" \
+ "sd\t$18,"__str(PT_R18)"(%0)\n\t" \
+ "sd\t$19,"__str(PT_R19)"(%0)\n\t" \
+ "sd\t$20,"__str(PT_R20)"(%0)\n\t" \
+ "sd\t$21,"__str(PT_R21)"(%0)\n\t" \
+ "sd\t$22,"__str(PT_R22)"(%0)\n\t" \
+ "sd\t$23,"__str(PT_R23)"(%0)\n\t" \
+ "sd\t$30,"__str(PT_R30)"(%0)\n\t" \
+ : /* No outputs */ \
+ : "r" (frame))
+
+#define nabi_no_regargs \
+ unsigned long __dummy0, \
+ unsigned long __dummy1, \
+ unsigned long __dummy2, \
+ unsigned long __dummy3, \
+ unsigned long __dummy4, \
+ unsigned long __dummy5, \
+ unsigned long __dummy6, \
+ unsigned long __dummy7,
+
+#endif /* CONFIG_MIPS64 */
+
+#endif /* _ASM_SIM_H */
diff -Nru a/include/asm-mips/smp.h b/include/asm-mips/smp.h
--- a/include/asm-mips/smp.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/smp.h Sun Aug 3 13:14:46 2003
@@ -85,7 +85,7 @@
#define cpu_possible(cpu) (phys_cpu_present_map & (1<<(cpu)))
#define cpu_online(cpu) (cpu_online_map & (1<<(cpu)))
-extern inline unsigned int num_online_cpus(void)
+static inline unsigned int num_online_cpus(void)
{
return hweight32(cpu_online_map);
}
diff -Nru a/include/asm-mips/sn/addrs.h b/include/asm-mips/sn/addrs.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/addrs.h Sun Aug 3 13:14:49 2003
@@ -0,0 +1,459 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1999, 2000 by Ralf Baechle
+ */
+#ifndef _ASM_SN_ADDRS_H
+#define _ASM_SN_ADDRS_H
+
+#include <linux/config.h>
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+#endif /* !__ASSEMBLY__ */
+
+#include <asm/addrspace.h>
+#include <asm/reg.h>
+#include <asm/sn/kldir.h>
+
+#if defined(CONFIG_SGI_IP27)
+#include <asm/sn/sn0/addrs.h>
+#elif defined(CONFIG_SGI_IP35)
+#include <asm/sn/sn1/addrs.h>
+#endif
+
+
+#ifndef __ASSEMBLY__
+
+#if defined(CONFIG_SGI_IO) /* FIXME */
+#define PS_UINT_CAST (__psunsigned_t)
+#define UINT64_CAST (__uint64_t)
+#else /* CONFIG_SGI_IO */
+#define PS_UINT_CAST (unsigned long)
+#define UINT64_CAST (unsigned long)
+#endif /* CONFIG_SGI_IO */
+
+#define HUBREG_CAST (volatile hubreg_t *)
+
+#else /* __ASSEMBLY__ */
+
+#define PS_UINT_CAST
+#define UINT64_CAST
+#define HUBREG_CAST
+
+#endif /* __ASSEMBLY__ */
+
+
+#define NASID_GET_META(_n) ((_n) >> NASID_LOCAL_BITS)
+#ifdef CONFIG_SGI_IP27
+#define NASID_GET_LOCAL(_n) ((_n) & 0xf)
+#endif
+#define NASID_MAKE(_m, _l) (((_m) << NASID_LOCAL_BITS) | (_l))
+
+#define NODE_ADDRSPACE_MASK (NODE_ADDRSPACE_SIZE - 1)
+#define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK)
+
+#define CHANGE_ADDR_NASID(_pa, _nasid) \
+ ((UINT64_CAST (_pa) & ~NASID_MASK) | \
+ (UINT64_CAST(_nasid) << NASID_SHFT))
+
+
+/*
+ * The following macros are used to index to the beginning of a specific
+ * node's address space.
+ */
+
+#define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS)
+
+#define NODE_CAC_BASE(_n) (CAC_BASE + NODE_OFFSET(_n))
+#define NODE_HSPEC_BASE(_n) (HSPEC_BASE + NODE_OFFSET(_n))
+#define NODE_IO_BASE(_n) (IO_BASE + NODE_OFFSET(_n))
+#define NODE_MSPEC_BASE(_n) (MSPEC_BASE + NODE_OFFSET(_n))
+#define NODE_UNCAC_BASE(_n) (UNCAC_BASE + NODE_OFFSET(_n))
+
+#define TO_NODE(_n, _x) (NODE_OFFSET(_n) | ((_x) ))
+#define TO_NODE_CAC(_n, _x) (NODE_CAC_BASE(_n) | ((_x) & TO_PHYS_MASK))
+#define TO_NODE_UNCAC(_n, _x) (NODE_UNCAC_BASE(_n) | ((_x) & TO_PHYS_MASK))
+#define TO_NODE_MSPEC(_n, _x) (NODE_MSPEC_BASE(_n) | ((_x) & TO_PHYS_MASK))
+#define TO_NODE_HSPEC(_n, _x) (NODE_HSPEC_BASE(_n) | ((_x) & TO_PHYS_MASK))
+
+
+#define RAW_NODE_SWIN_BASE(nasid, widget) \
+ (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
+
+#define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff))
+
+/*
+ * The following definitions pertain to the IO special address
+ * space. They define the location of the big and little windows
+ * of any given node.
+ */
+
+#define SWIN_SIZE_BITS 24
+#define SWIN_SIZE (UINT64_CAST 1 << 24)
+#define SWIN_SIZEMASK (SWIN_SIZE - 1)
+#define SWIN_WIDGET_MASK 0xF
+
+/*
+ * Convert smallwindow address to xtalk address.
+ *
+ * 'addr' can be physical or virtual address, but will be converted
+ * to Xtalk address in the range 0 -> SWINZ_SIZEMASK
+ */
+#define SWIN_WIDGETADDR(addr) ((addr) & SWIN_SIZEMASK)
+#define SWIN_WIDGETNUM(addr) (((addr) >> SWIN_SIZE_BITS) & SWIN_WIDGET_MASK)
+/*
+ * Verify if addr belongs to small window address on node with "nasid"
+ *
+ *
+ * NOTE: "addr" is expected to be XKPHYS address, and NOT physical
+ * address
+ *
+ *
+ */
+#define NODE_SWIN_ADDR(nasid, addr) \
+ (((addr) >= NODE_SWIN_BASE(nasid, 0)) && \
+ ((addr) < (NODE_SWIN_BASE(nasid, HUB_NUM_WIDGET) + SWIN_SIZE)\
+ ))
+
+/*
+ * The following define the major position-independent aliases used
+ * in SN.
+ * UALIAS -- 256MB in size, reads in the UALIAS result in
+ * uncached references to the memory of the reader's node.
+ * CPU_UALIAS -- 128kb in size, the bottom part of UALIAS is flipped
+ * depending on which CPU does the access to provide
+ * all CPUs with unique uncached memory at low addresses.
+ * LBOOT -- 256MB in size, reads in the LBOOT area result in
+ * uncached references to the local hub's boot prom and
+ * other directory-bus connected devices.
+ * IALIAS -- 8MB in size, reads in the IALIAS result in uncached
+ * references to the local hub's registers.
+ */
+
+#define UALIAS_BASE HSPEC_BASE
+#define UALIAS_SIZE 0x10000000 /* 256 Megabytes */
+#define UALIAS_LIMIT (UALIAS_BASE + UALIAS_SIZE)
+
+/*
+ * The bottom of ualias space is flipped depending on whether you're
+ * processor 0 or 1 within a node.
+ */
+#ifdef CONFIG_SGI_IP27
+#define UALIAS_FLIP_BASE UALIAS_BASE
+#define UALIAS_FLIP_SIZE 0x20000
+#define UALIAS_FLIP_BIT 0x10000
+#define UALIAS_FLIP_ADDR(_x) (cputoslice(smp_processor_id()) ? \
+ (_x) ^ UALIAS_FLIP_BIT : (_x))
+
+#define LBOOT_BASE (HSPEC_BASE + 0x10000000)
+#define LBOOT_SIZE 0x10000000
+#define LBOOT_LIMIT (LBOOT_BASE + LBOOT_SIZE)
+#define LBOOT_STRIDE 0 /* IP27 has only one CPU PROM */
+
+#endif
+
+#define HUB_REGISTER_WIDGET 1
+#define IALIAS_BASE NODE_SWIN_BASE(0, HUB_REGISTER_WIDGET)
+#define IALIAS_SIZE 0x800000 /* 8 Megabytes */
+#define IS_IALIAS(_a) (((_a) >= IALIAS_BASE) && \
+ ((_a) < (IALIAS_BASE + IALIAS_SIZE)))
+
+/*
+ * Macro for referring to Hub's RBOOT space
+ */
+
+#ifdef CONFIG_SGI_IP27
+#define RBOOT_SIZE 0x10000000 /* 256 Megabytes */
+#define NODE_RBOOT_BASE(_n) (NODE_HSPEC_BASE(_n) + 0x30000000)
+#define NODE_RBOOT_LIMIT(_n) (NODE_RBOOT_BASE(_n) + RBOOT_SIZE)
+
+#endif
+
+/*
+ * Macros for referring the Hub's back door space
+ *
+ * These macros correctly process addresses in any node's space.
+ * WARNING: They won't work in assembler.
+ *
+ * BDDIR_ENTRY_LO returns the address of the low double-word of the dir
+ * entry corresponding to a physical (Cac or Uncac) address.
+ * BDDIR_ENTRY_HI returns the address of the high double-word of the entry.
+ * BDPRT_ENTRY returns the address of the double-word protection entry
+ * corresponding to the page containing the physical address.
+ * BDPRT_ENTRY_S Stores the value into the protection entry.
+ * BDPRT_ENTRY_L Load the value from the protection entry.
+ * BDECC_ENTRY returns the address of the ECC byte corresponding to a
+ * double-word at a specified physical address.
+ * BDECC_ENTRY_H returns the address of the two ECC bytes corresponding to a
+ * quad-word at a specified physical address.
+ */
+#define NODE_BDOOR_BASE(_n) (NODE_HSPEC_BASE(_n) + (NODE_ADDRSPACE_SIZE/2))
+
+#define NODE_BDECC_BASE(_n) (NODE_BDOOR_BASE(_n))
+#define NODE_BDDIR_BASE(_n) (NODE_BDOOR_BASE(_n) + (NODE_ADDRSPACE_SIZE/4))
+#ifdef CONFIG_SGI_IP27
+#define BDDIR_ENTRY_LO(_pa) ((HSPEC_BASE + \
+ NODE_ADDRSPACE_SIZE * 3 / 4 + \
+ 0x200) | \
+ UINT64_CAST (_pa) & NASID_MASK | \
+ UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \
+ UINT64_CAST (_pa) >> 3 & 0x1f << 4)
+
+#define BDDIR_ENTRY_HI(_pa) ((HSPEC_BASE + \
+ NODE_ADDRSPACE_SIZE * 3 / 4 + \
+ 0x208) | \
+ UINT64_CAST (_pa) & NASID_MASK | \
+ UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \
+ UINT64_CAST (_pa) >> 3 & 0x1f << 4)
+
+#define BDPRT_ENTRY(_pa, _rgn) ((HSPEC_BASE + \
+ NODE_ADDRSPACE_SIZE * 3 / 4) | \
+ UINT64_CAST (_pa) & NASID_MASK | \
+ UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \
+ (_rgn) << 3)
+#define BDPRT_ENTRY_ADDR(_pa,_rgn) (BDPRT_ENTRY((_pa),(_rgn)))
+#define BDPRT_ENTRY_S(_pa,_rgn,_val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn))=(_val))
+#define BDPRT_ENTRY_L(_pa,_rgn) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn)))
+
+#define BDECC_ENTRY(_pa) ((HSPEC_BASE + \
+ NODE_ADDRSPACE_SIZE / 2) | \
+ UINT64_CAST (_pa) & NASID_MASK | \
+ UINT64_CAST (_pa) >> 2 & BDECC_UPPER_MASK | \
+ UINT64_CAST (_pa) >> 3 & 3)
+
+/*
+ * Macro to convert a back door directory or protection address into the
+ * raw physical address of the associated cache line or protection page.
+ */
+#define BDADDR_IS_DIR(_ba) ((UINT64_CAST (_ba) & 0x200) != 0)
+#define BDADDR_IS_PRT(_ba) ((UINT64_CAST (_ba) & 0x200) == 0)
+
+#define BDDIR_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
+ (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2 | \
+ (UINT64_CAST (_ba) & 0x1f << 4) << 3)
+
+#define BDPRT_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
+ (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2)
+
+#define BDECC_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
+ (UINT64_CAST (_ba) & BDECC_UPPER_MASK)<<2 | \
+ (UINT64_CAST (_ba) & 3) << 3)
+#endif /* CONFIG_SGI_IP27 */
+
+
+/*
+ * The following macros produce the correct base virtual address for
+ * the hub registers. The LOCAL_HUB_* macros produce the appropriate
+ * address for the local registers. The REMOTE_HUB_* macro produce
+ * the address for the specified hub's registers. The intent is
+ * that the appropriate PI, MD, NI, or II register would be substituted
+ * for _x.
+ */
+
+#ifdef _STANDALONE
+
+/* DO NOT USE THESE DIRECTLY IN THE KERNEL. SEE BELOW. */
+#define LOCAL_HUB(_x) (HUBREG_CAST (IALIAS_BASE + (_x)))
+#define REMOTE_HUB(_n, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
+ 0x800000 + (_x)))
+#endif /* _STANDALONE */
+
+/*
+ * WARNING:
+ * When certain Hub chip workaround are defined, it's not sufficient
+ * to dereference the *_HUB_ADDR() macros. You should instead use
+ * HUB_L() and HUB_S() if you must deal with pointers to hub registers.
+ * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S().
+ * They're always safe.
+ */
+#define LOCAL_HUB_ADDR(_x) (HUBREG_CAST (IALIAS_BASE + (_x)))
+#define REMOTE_HUB_ADDR(_n, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
+ 0x800000 + (_x)))
+#ifdef CONFIG_SGI_IP27
+#define REMOTE_HUB_PI_ADDR(_n, _sn, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
+ 0x800000 + (_x)))
+#endif /* CONFIG_SGI_IP27 */
+
+#ifndef __ASSEMBLY__
+
+#define HUB_L(_a) *(_a)
+#define HUB_S(_a, _d) *(_a) = (_d)
+
+#define LOCAL_HUB_L(_r) HUB_L(LOCAL_HUB_ADDR(_r))
+#define LOCAL_HUB_S(_r, _d) HUB_S(LOCAL_HUB_ADDR(_r), (_d))
+#define REMOTE_HUB_L(_n, _r) HUB_L(REMOTE_HUB_ADDR((_n), (_r)))
+#define REMOTE_HUB_S(_n, _r, _d) HUB_S(REMOTE_HUB_ADDR((_n), (_r)), (_d))
+#define REMOTE_HUB_PI_L(_n, _sn, _r) HUB_L(REMOTE_HUB_PI_ADDR((_n), (_sn), (_r)))
+#define REMOTE_HUB_PI_S(_n, _sn, _r, _d) HUB_S(REMOTE_HUB_PI_ADDR((_n), (_sn), (_r)), (_d))
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * The following macros are used to get to a hub/bridge register, given
+ * the base of the register space.
+ */
+#define HUB_REG_PTR(_base, _off) \
+ (HUBREG_CAST ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
+
+#define HUB_REG_PTR_L(_base, _off) \
+ HUB_L(HUB_REG_PTR((_base), (_off)))
+
+#define HUB_REG_PTR_S(_base, _off, _data) \
+ HUB_S(HUB_REG_PTR((_base), (_off)), (_data))
+
+/*
+ * Software structure locations -- permanently fixed
+ * See diagram in kldir.h
+ */
+
+#define PHYS_RAMBASE 0x0
+#define K0_RAMBASE PHYS_TO_K0(PHYS_RAMBASE)
+
+#define EX_HANDLER_OFFSET(slice) ((slice) << 16)
+#define EX_HANDLER_ADDR(nasid, slice) \
+ PHYS_TO_K0(NODE_OFFSET(nasid) | EX_HANDLER_OFFSET(slice))
+#define EX_HANDLER_SIZE 0x0400
+
+#define EX_FRAME_OFFSET(slice) ((slice) << 16 | 0x400)
+#define EX_FRAME_ADDR(nasid, slice) \
+ PHYS_TO_K0(NODE_OFFSET(nasid) | EX_FRAME_OFFSET(slice))
+#define EX_FRAME_SIZE 0x0c00
+
+#define ARCS_SPB_OFFSET 0x1000
+#define ARCS_SPB_ADDR(nasid) \
+ PHYS_TO_K0(NODE_OFFSET(nasid) | ARCS_SPB_OFFSET)
+#define ARCS_SPB_SIZE 0x0400
+
+#ifdef _STANDALONE
+
+#define ARCS_TVECTOR_OFFSET 0x2800
+#define ARCS_PVECTOR_OFFSET 0x2c00
+
+/*
+ * These addresses are used by the master CPU to install the transfer
+ * and private vectors. All others use the SPB to find them.
+ */
+#define TVADDR (NODE_CAC_BASE(get_nasid()) + ARCS_TVECTOR_OFFSET)
+#define PVADDR (NODE_CAC_BASE(get_nasid()) + ARCS_PVECTOR_OFFSET)
+
+#endif /* _STANDALONE */
+
+#define KLDIR_OFFSET 0x2000
+#define KLDIR_ADDR(nasid) \
+ TO_NODE_UNCAC((nasid), KLDIR_OFFSET)
+#define KLDIR_SIZE 0x0400
+
+
+/*
+ * Software structure locations -- indirected through KLDIR
+ * See diagram in kldir.h
+ *
+ * Important: All low memory structures must only be accessed
+ * uncached, except for the symmon stacks.
+ */
+
+#define KLI_LAUNCH 0 /* Dir. entries */
+#define KLI_KLCONFIG 1
+#define KLI_NMI 2
+#define KLI_GDA 3
+#define KLI_FREEMEM 4
+#define KLI_SYMMON_STK 5
+#define KLI_PI_ERROR 6
+#define KLI_KERN_VARS 7
+#define KLI_KERN_XP 8
+#define KLI_KERN_PARTID 9
+
+#ifndef __ASSEMBLY__
+
+#define KLD_BASE(nasid) ((kldir_ent_t *) KLDIR_ADDR(nasid))
+#define KLD_LAUNCH(nasid) (KLD_BASE(nasid) + KLI_LAUNCH)
+#define KLD_NMI(nasid) (KLD_BASE(nasid) + KLI_NMI)
+#define KLD_KLCONFIG(nasid) (KLD_BASE(nasid) + KLI_KLCONFIG)
+#define KLD_PI_ERROR(nasid) (KLD_BASE(nasid) + KLI_PI_ERROR)
+#define KLD_GDA(nasid) (KLD_BASE(nasid) + KLI_GDA)
+#define KLD_SYMMON_STK(nasid) (KLD_BASE(nasid) + KLI_SYMMON_STK)
+#define KLD_FREEMEM(nasid) (KLD_BASE(nasid) + KLI_FREEMEM)
+#define KLD_KERN_VARS(nasid) (KLD_BASE(nasid) + KLI_KERN_VARS)
+#define KLD_KERN_XP(nasid) (KLD_BASE(nasid) + KLI_KERN_XP)
+#define KLD_KERN_PARTID(nasid) (KLD_BASE(nasid) + KLI_KERN_PARTID)
+
+#define LAUNCH_OFFSET(nasid, slice) \
+ (KLD_LAUNCH(nasid)->offset + \
+ KLD_LAUNCH(nasid)->stride * (slice))
+#define LAUNCH_ADDR(nasid, slice) \
+ TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice))
+#define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size
+
+#define NMI_OFFSET(nasid, slice) \
+ (KLD_NMI(nasid)->offset + \
+ KLD_NMI(nasid)->stride * (slice))
+#define NMI_ADDR(nasid, slice) \
+ TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice))
+#define NMI_SIZE(nasid) KLD_NMI(nasid)->size
+
+#define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset
+#define KLCONFIG_ADDR(nasid) \
+ TO_NODE_UNCAC((nasid), KLCONFIG_OFFSET(nasid))
+#define KLCONFIG_SIZE(nasid) KLD_KLCONFIG(nasid)->size
+
+#define GDA_ADDR(nasid) KLD_GDA(nasid)->pointer
+#define GDA_SIZE(nasid) KLD_GDA(nasid)->size
+
+#define SYMMON_STK_OFFSET(nasid, slice) \
+ (KLD_SYMMON_STK(nasid)->offset + \
+ KLD_SYMMON_STK(nasid)->stride * (slice))
+#define SYMMON_STK_STRIDE(nasid) KLD_SYMMON_STK(nasid)->stride
+
+#define SYMMON_STK_ADDR(nasid, slice) \
+ TO_NODE_CAC((nasid), SYMMON_STK_OFFSET(nasid, slice))
+
+#define SYMMON_STK_SIZE(nasid) KLD_SYMMON_STK(nasid)->stride
+
+#define SYMMON_STK_END(nasid) (SYMMON_STK_ADDR(nasid, 0) + KLD_SYMMON_STK(nasid)->size)
+
+/* loading symmon 4k below UNIX. the arcs loader needs the topaddr for a
+ * relocatable program
+ */
+#define UNIX_DEBUG_LOADADDR 0x300000
+#define SYMMON_LOADADDR(nasid) \
+ TO_NODE(nasid, PHYS_TO_K0(UNIX_DEBUG_LOADADDR - 0x1000))
+
+#define FREEMEM_OFFSET(nasid) KLD_FREEMEM(nasid)->offset
+#define FREEMEM_ADDR(nasid) SYMMON_STK_END(nasid)
+/*
+ * XXX
+ * Fix this. FREEMEM_ADDR should be aware of if symmon is loaded.
+ * Also, it should take into account what prom thinks to be a safe
+ * address
+ PHYS_TO_K0(NODE_OFFSET(nasid) + FREEMEM_OFFSET(nasid))
+ */
+#define FREEMEM_SIZE(nasid) KLD_FREEMEM(nasid)->size
+
+#define PI_ERROR_OFFSET(nasid) KLD_PI_ERROR(nasid)->offset
+#define PI_ERROR_ADDR(nasid) \
+ TO_NODE_UNCAC((nasid), PI_ERROR_OFFSET(nasid))
+#define PI_ERROR_SIZE(nasid) KLD_PI_ERROR(nasid)->size
+
+#define NODE_OFFSET_TO_K0(_nasid, _off) \
+ PHYS_TO_K0((NODE_OFFSET(_nasid) + (_off)) | K0BASE)
+#define NODE_OFFSET_TO_K1(_nasid, _off) \
+ TO_UNCAC((NODE_OFFSET(_nasid) + (_off)) | K1BASE)
+#define K0_TO_NODE_OFFSET(_k0addr) \
+ ((__psunsigned_t)(_k0addr) & NODE_ADDRSPACE_MASK)
+
+#define KERN_VARS_ADDR(nasid) KLD_KERN_VARS(nasid)->pointer
+#define KERN_VARS_SIZE(nasid) KLD_KERN_VARS(nasid)->size
+
+#define KERN_XP_ADDR(nasid) KLD_KERN_XP(nasid)->pointer
+#define KERN_XP_SIZE(nasid) KLD_KERN_XP(nasid)->size
+
+#define GPDA_ADDR(nasid) TO_NODE_CAC(nasid, GPDA_OFFSET)
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* _ASM_SN_ADDRS_H */
diff -Nru a/include/asm-mips/sn/agent.h b/include/asm-mips/sn/agent.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/agent.h Sun Aug 3 13:14:51 2003
@@ -0,0 +1,47 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * This file has definitions for the hub and snac interfaces.
+ *
+ * Copyright (C) 1992 - 1997, 1999, 2000 Silcon Graphics, Inc.
+ * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_SGI_SN_AGENT_H
+#define _ASM_SGI_SN_AGENT_H
+
+#include <linux/config.h>
+#include <asm/sn/addrs.h>
+#include <asm/sn/arch.h>
+//#include <asm/sn/io.h>
+
+#if defined(CONFIG_SGI_IP27)
+#include <asm/sn/sn0/hub.h>
+#elif defined(CONFIG_SGI_IP35)
+#include <asm/sn/sn1/hub.h>
+#endif /* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
+
+/*
+ * NIC register macros
+ */
+
+#if defined(CONFIG_SGI_IP27)
+#define HUB_NIC_ADDR(_cpuid) \
+ REMOTE_HUB_ADDR(COMPACT_TO_NASID_NODEID(cputocnode(_cpuid)), \
+ MD_MLAN_CTL)
+#endif
+
+#define SET_HUB_NIC(_my_cpuid, _val) \
+ (HUB_S(HUB_NIC_ADDR(_my_cpuid), (_val)))
+
+#define SET_MY_HUB_NIC(_v) \
+ SET_HUB_NIC(cpuid(), (_v))
+
+#define GET_HUB_NIC(_my_cpuid) \
+ (HUB_L(HUB_NIC_ADDR(_my_cpuid)))
+
+#define GET_MY_HUB_NIC() \
+ GET_HUB_NIC(cpuid())
+
+#endif /* _ASM_SGI_SN_AGENT_H */
diff -Nru a/include/asm-mips/sn/arch.h b/include/asm-mips/sn/arch.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/arch.h Sun Aug 3 13:14:46 2003
@@ -0,0 +1,121 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SGI specific setup.
+ *
+ * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_SN_ARCH_H
+#define _ASM_SN_ARCH_H
+
+#include <linux/types.h>
+#include <linux/config.h>
+
+#if !defined(CONFIG_SGI_IO)
+#include <asm/sn/types.h>
+#include <asm/sn/sn0/arch.h>
+#endif
+
+
+#ifndef __ASSEMBLY__
+#if !defined(CONFIG_SGI_IO)
+typedef u64 hubreg_t;
+typedef u64 nic_t;
+#endif
+#endif
+
+#ifdef CONFIG_SGI_IP27
+#define CPUS_PER_NODE 2 /* CPUs on a single hub */
+#define CPUS_PER_NODE_SHFT 1 /* Bits to shift in the node number */
+#define CPUS_PER_SUBNODE 2 /* CPUs on a single hub PI */
+#endif
+#define CNODE_NUM_CPUS(_cnode) (NODEPDA(_cnode)->node_num_cpus)
+
+#define CNODE_TO_CPU_BASE(_cnode) (NODEPDA(_cnode)->node_first_cpu)
+#define cputocnode(cpu) \
+ (cpu_data[(cpu)].p_nodeid)
+#define cputonasid(cpu) \
+ (cpu_data[(cpu)].p_nasid)
+#define cputoslice(cpu) \
+ (cpu_data[(cpu)].p_slice)
+#define makespnum(_nasid, _slice) \
+ (((_nasid) << CPUS_PER_NODE_SHFT) | (_slice))
+
+#ifndef __ASSEMBLY__
+
+#define INVALID_NASID (nasid_t)-1
+#define INVALID_CNODEID (cnodeid_t)-1
+#define INVALID_PNODEID (pnodeid_t)-1
+#define INVALID_MODULE (moduleid_t)-1
+#define INVALID_PARTID (partid_t)-1
+
+extern nasid_t get_nasid(void);
+extern cnodeid_t get_cpu_cnode(cpuid_t);
+extern int get_cpu_slice(cpuid_t);
+
+/*
+ * NO ONE should access these arrays directly. The only reason we refer to
+ * them here is to avoid the procedure call that would be required in the
+ * macros below. (Really want private data members here :-)
+ */
+extern cnodeid_t nasid_to_compact_node[MAX_NASIDS];
+extern nasid_t compact_to_nasid_node[MAX_COMPACT_NODES];
+
+/*
+ * These macros are used by various parts of the kernel to convert
+ * between the three different kinds of node numbering. At least some
+ * of them may change to procedure calls in the future, but the macros
+ * will continue to work. Don't use the arrays above directly.
+ */
+
+#define NASID_TO_REGION(nnode) \
+ ((nnode) >> \
+ (is_fine_dirmode() ? NASID_TO_FINEREG_SHFT : NASID_TO_COARSEREG_SHFT))
+
+#if !defined(_STANDALONE)
+extern cnodeid_t nasid_to_compact_node[MAX_NASIDS];
+extern nasid_t compact_to_nasid_node[MAX_COMPACT_NODES];
+extern cnodeid_t cpuid_to_compact_node[MAXCPUS];
+#endif
+
+#if !defined(DEBUG) && (!defined(SABLE) || defined(_STANDALONE))
+
+#define NASID_TO_COMPACT_NODEID(nnode) (nasid_to_compact_node[nnode])
+#define COMPACT_TO_NASID_NODEID(cnode) (compact_to_nasid_node[cnode])
+#define CPUID_TO_COMPACT_NODEID(cpu) (cpuid_to_compact_node[(cpu)])
+#else
+
+/*
+ * These functions can do type checking and fail if they need to return
+ * a bad nodeid, but they're not as fast so just use 'em for debug kernels.
+ */
+cnodeid_t nasid_to_compact_nodeid(nasid_t nasid);
+nasid_t compact_to_nasid_nodeid(cnodeid_t cnode);
+
+#define NASID_TO_COMPACT_NODEID(nnode) nasid_to_compact_nodeid(nnode)
+#define COMPACT_TO_NASID_NODEID(cnode) compact_to_nasid_nodeid(cnode)
+#define CPUID_TO_COMPACT_NODEID(cpu) (cpuid_to_compact_node[(cpu)])
+#endif
+
+extern int node_getlastslot(cnodeid_t);
+
+#endif /* !__ASSEMBLY__ */
+
+#define SLOT_BITMASK (MAX_MEM_SLOTS - 1)
+#define SLOT_SIZE (1LL<<SLOT_SHIFT)
+
+#define node_getnumslots(node) (MAX_MEM_SLOTS)
+#define NODE_MAX_MEM_SIZE SLOT_SIZE * MAX_MEM_SLOTS
+
+/*
+ * New stuff in here from Irix sys/pfdat.h.
+ */
+#define SLOT_PFNSHIFT (SLOT_SHIFT - PAGE_SHIFT)
+#define PFN_NASIDSHFT (NASID_SHFT - PAGE_SHIFT)
+#define mkpfn(nasid, off) (((pfn_t)(nasid) << PFN_NASIDSHFT) | (off))
+#define slot_getbasepfn(node,slot) \
+ (mkpfn(COMPACT_TO_NASID_NODEID(node), slot<<SLOT_PFNSHIFT))
+#endif /* _ASM_SN_ARCH_H */
diff -Nru a/include/asm-mips/sn/gda.h b/include/asm-mips/sn/gda.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/gda.h Sun Aug 3 13:14:47 2003
@@ -0,0 +1,107 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/gda.h>.
+ *
+ * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
+ *
+ * gda.h -- Contains the data structure for the global data area,
+ * The GDA contains information communicated between the
+ * PROM, SYMMON, and the kernel.
+ */
+#ifndef _ASM_SN_GDA_H
+#define _ASM_SN_GDA_H
+
+#include <asm/sn/addrs.h>
+
+#define GDA_MAGIC 0x58464552
+
+/*
+ * GDA Version History
+ *
+ * Version # | Change
+ * -------------+-------------------------------------------------------
+ * 1 | Initial SN0 version
+ * 2 | Prom sets g_partid field to the partition number. 0 IS
+ * | a valid partition #.
+ */
+
+#define GDA_VERSION 2 /* Current GDA version # */
+
+#define G_MAGICOFF 0
+#define G_VERSIONOFF 4
+#define G_PROMOPOFF 6
+#define G_MASTEROFF 8
+#define G_VDSOFF 12
+#define G_HKDNORMOFF 16
+#define G_HKDUTLBOFF 24
+#define G_HKDXUTLBOFF 32
+#define G_PARTIDOFF 40
+#define G_TABLEOFF 128
+
+#ifndef __ASSEMBLY__
+
+typedef struct gda {
+ u32 g_magic; /* GDA magic number */
+ u16 g_version; /* Version of this structure */
+ u16 g_masterid; /* The NASID:CPUNUM of the master cpu */
+ u32 g_promop; /* Passes requests from the kernel to prom */
+ u32 g_vds; /* Store the virtual dipswitches here */
+ void **g_hooked_norm;/* ptr to pda loc for norm hndlr */
+ void **g_hooked_utlb;/* ptr to pda loc for utlb hndlr */
+ void **g_hooked_xtlb;/* ptr to pda loc for xtlb hndlr */
+ int g_partid; /* partition id */
+ int g_symmax; /* Max symbols in name table. */
+ void *g_dbstab; /* Address of idbg symbol table */
+ char *g_nametab; /* Address of idbg name table */
+ void *g_ktext_repmask;
+ /* Pointer to a mask of nodes with copies
+ * of the kernel. */
+ char g_padding[56]; /* pad out to 128 bytes */
+ nasid_t g_nasidtable[MAX_COMPACT_NODES]; /* NASID of each node,
+ * indexed by cnodeid.
+ */
+} gda_t;
+
+#define GDA ((gda_t*) GDA_ADDR(get_nasid()))
+
+#endif /* !__ASSEMBLY__ */
+/*
+ * Define: PART_GDA_VERSION
+ * Purpose: Define the minimum version of the GDA required, lower
+ * revisions assume GDA is NOT set up, and read partition
+ * information from the board info.
+ */
+#define PART_GDA_VERSION 2
+
+/*
+ * The following requests can be sent to the PROM during startup.
+ */
+
+#define PROMOP_MAGIC 0x0ead0000
+#define PROMOP_MAGIC_MASK 0x0fff0000
+
+#define PROMOP_BIST_SHIFT 11
+#define PROMOP_BIST_MASK (0x3 << 11)
+
+#define PROMOP_REG PI_ERR_STACK_ADDR_A
+
+#define PROMOP_INVALID (PROMOP_MAGIC | 0x00)
+#define PROMOP_HALT (PROMOP_MAGIC | 0x10)
+#define PROMOP_POWERDOWN (PROMOP_MAGIC | 0x20)
+#define PROMOP_RESTART (PROMOP_MAGIC | 0x30)
+#define PROMOP_REBOOT (PROMOP_MAGIC | 0x40)
+#define PROMOP_IMODE (PROMOP_MAGIC | 0x50)
+
+#define PROMOP_CMD_MASK 0x00f0
+#define PROMOP_OPTIONS_MASK 0xfff0
+
+#define PROMOP_SKIP_DIAGS 0x0100 /* don't bother running diags */
+#define PROMOP_SKIP_MEMINIT 0x0200 /* don't bother initing memory */
+#define PROMOP_SKIP_DEVINIT 0x0400 /* don't bother initing devices */
+#define PROMOP_BIST1 0x0800 /* keep track of which BIST ran */
+#define PROMOP_BIST2 0x1000 /* keep track of which BIST ran */
+
+#endif /* _ASM_SN_GDA_H */
diff -Nru a/include/asm-mips/sn/intr.h b/include/asm-mips/sn/intr.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/intr.h Sun Aug 3 13:14:44 2003
@@ -0,0 +1,122 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_SN_INTR_H
+#define __ASM_SN_INTR_H
+
+/* Number of interrupt levels associated with each interrupt register. */
+#define N_INTPEND_BITS 64
+
+#define INT_PEND0_BASELVL 0
+#define INT_PEND1_BASELVL 64
+
+#define N_INTPENDJUNK_BITS 8
+#define INTPENDJUNK_CLRBIT 0x80
+
+#include <asm/sn/intr_public.h>
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Macros to manipulate the interrupt register on the calling hub chip.
+ */
+
+#define LOCAL_HUB_SEND_INTR(_level) LOCAL_HUB_S(PI_INT_PEND_MOD, \
+ (0x100|(_level)))
+#define REMOTE_HUB_SEND_INTR(_hub, _level) \
+ REMOTE_HUB_S((_hub), PI_INT_PEND_MOD, (0x100|(_level)))
+
+/*
+ * When clearing the interrupt, make sure this clear does make it
+ * to the hub. Otherwise we could end up losing interrupts.
+ * We do an uncached load of the int_pend0 register to ensure this.
+ */
+
+#define LOCAL_HUB_CLR_INTR(_level) \
+ LOCAL_HUB_S(PI_INT_PEND_MOD, (_level)), \
+ LOCAL_HUB_L(PI_INT_PEND0)
+#define REMOTE_HUB_CLR_INTR(_hub, _level) \
+ REMOTE_HUB_S((_hub), PI_INT_PEND_MOD, (_level)), \
+ REMOTE_HUB_L((_hub), PI_INT_PEND0)
+
+#else /* __ASSEMBLY__ */
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * Hard-coded interrupt levels:
+ */
+
+/*
+ * L0 = SW1
+ * L1 = SW2
+ * L2 = INT_PEND0
+ * L3 = INT_PEND1
+ * L4 = RTC
+ * L5 = Profiling Timer
+ * L6 = Hub Errors
+ * L7 = Count/Compare (T5 counters)
+ */
+
+
+/* INT_PEND0 hard-coded bits. */
+#ifdef SABLE
+#define SDISK_INTR 63
+#endif
+#ifdef DEBUG_INTR_TSTAMP
+/* hard coded interrupt level for interrupt latency test interrupt */
+#define CPU_INTRLAT_B 62
+#define CPU_INTRLAT_A 61
+#endif
+
+/* Hardcoded bits required by software. */
+#define MSC_MESG_INTR 13
+#define CPU_ACTION_B 11
+#define CPU_ACTION_A 10
+
+/* These are determined by hardware: */
+#define CC_PEND_B 6
+#define CC_PEND_A 5
+#define UART_INTR 4
+#define PG_MIG_INTR 3
+#define GFX_INTR_B 2
+#define GFX_INTR_A 1
+#define RESERVED_INTR 0
+
+/* INT_PEND1 hard-coded bits: */
+#define MSC_PANIC_INTR 63
+#define NI_ERROR_INTR 62
+#define MD_COR_ERR_INTR 61
+#define COR_ERR_INTR_B 60
+#define COR_ERR_INTR_A 59
+#define CLK_ERR_INTR 58
+#define IO_ERROR_INTR 57 /* set up by prom */
+
+#define DEBUG_INTR_B 55 /* used by symmon to stop all cpus */
+#define DEBUG_INTR_A 54
+
+#define BRIDGE_ERROR_INTR 53 /* Setup by PROM to catch Bridge Errors */
+
+#define IP27_INTR_0 52 /* Reserved for PROM use */
+#define IP27_INTR_1 51 /* (do not use in Kernel) */
+#define IP27_INTR_2 50
+#define IP27_INTR_3 49
+#define IP27_INTR_4 48
+#define IP27_INTR_5 47
+#define IP27_INTR_6 46
+#define IP27_INTR_7 45
+
+#define TLB_INTR_B 44 /* used for tlb flush random */
+#define TLB_INTR_A 43
+
+#define LLP_PFAIL_INTR_B 42 /* see ml/SN/SN0/sysctlr.c */
+#define LLP_PFAIL_INTR_A 41
+
+#define NI_BRDCAST_ERR_B 40
+#define NI_BRDCAST_ERR_A 39
+
+#endif /* __ASM_SN_INTR_H */
diff -Nru a/include/asm-mips/sn/intr_public.h b/include/asm-mips/sn/intr_public.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/intr_public.h Sun Aug 3 13:14:47 2003
@@ -0,0 +1,53 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_SN_INTR_PUBLIC_H
+#define __ASM_SN_INTR_PUBLIC_H
+
+
+/* REMEMBER: If you change these, the whole world needs to be recompiled.
+ * It would also require changing the hubspl.s code and SN0/intr.c
+ * Currently, the spl code has no support for multiple INTPEND1 masks.
+ */
+
+#define N_INTPEND0_MASKS 1
+#define N_INTPEND1_MASKS 1
+
+#define INTPEND0_MAXMASK (N_INTPEND0_MASKS - 1)
+#define INTPEND1_MAXMASK (N_INTPEND1_MASKS - 1)
+
+#ifndef __ASSEMBLY__
+#include <asm/sn/arch.h>
+
+struct intr_vecblk_s; /* defined in asm/sn/intr.h */
+
+/*
+ * The following are necessary to create the illusion of a CEL
+ * on the SN0 hub. We'll add more priority levels soon, but for
+ * now, any interrupt in a particular band effectively does an spl.
+ * These must be in the PDA since they're different for each processor.
+ * Users of this structure must hold the vector_lock in the appropriate vector
+ * block before modifying the mask arrays. There's only one vector block
+ * for each Hub so a lock in the PDA wouldn't be adequate.
+ */
+typedef struct hub_intmasks_s {
+ /*
+ * The masks are stored with the lowest-priority (most inclusive)
+ * in the lowest-numbered masks (i.e., 0, 1, 2...).
+ */
+ /* INT_PEND0: */
+ hubreg_t intpend0_masks[N_INTPEND0_MASKS];
+ /* INT_PEND1: */
+ hubreg_t intpend1_masks[N_INTPEND1_MASKS];
+ /* INT_PEND0: */
+ struct intr_vecblk_s *dispatch0;
+ /* INT_PEND1: */
+ struct intr_vecblk_s *dispatch1;
+} hub_intmasks_t;
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __ASM_SN_INTR_PUBLIC_H */
diff -Nru a/include/asm-mips/sn/io.h b/include/asm-mips/sn/io.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/io.h Sun Aug 3 13:14:47 2003
@@ -0,0 +1,68 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000, 2003 Ralf Baechle
+ * Copyright (C) 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_SN_IO_H
+#define _ASM_SN_IO_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SGI_IO
+
+#define IIO_ITTE_BASE 0x400160 /* base of translation table entries */
+#define IIO_ITTE(bigwin) (IIO_ITTE_BASE + 8*(bigwin))
+
+#define IIO_ITTE_OFFSET_BITS 5 /* size of offset field */
+#define IIO_ITTE_OFFSET_MASK ((1<<IIO_ITTE_OFFSET_BITS)-1)
+#define IIO_ITTE_OFFSET_SHIFT 0
+
+#define IIO_ITTE_WIDGET_BITS 4 /* size of widget field */
+#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
+#define IIO_ITTE_WIDGET_SHIFT 8
+
+#define IIO_ITTE_IOSP 1 /* I/O Space bit */
+#define IIO_ITTE_IOSP_MASK 1
+#define IIO_ITTE_IOSP_SHIFT 12
+#define HUB_PIO_MAP_TO_MEM 0
+#define HUB_PIO_MAP_TO_IO 1
+
+#define IIO_ITTE_INVALID_WIDGET 3 /* an invalid widget */
+
+#define IIO_ITTE_PUT(nasid, bigwin, io_or_mem, widget, addr) \
+ REMOTE_HUB_S((nasid), IIO_ITTE(bigwin), \
+ (((((addr) >> BWIN_SIZE_BITS) & \
+ IIO_ITTE_OFFSET_MASK) << IIO_ITTE_OFFSET_SHIFT) | \
+ (io_or_mem << IIO_ITTE_IOSP_SHIFT) | \
+ (((widget) & IIO_ITTE_WIDGET_MASK) << IIO_ITTE_WIDGET_SHIFT)))
+
+#define IIO_ITTE_DISABLE(nasid, bigwin) \
+ IIO_ITTE_PUT((nasid), HUB_PIO_MAP_TO_MEM, \
+ (bigwin), IIO_ITTE_INVALID_WIDGET, 0)
+
+#define IIO_ITTE_GET(nasid, bigwin) REMOTE_HUB_ADDR((nasid), IIO_ITTE(bigwin))
+
+/*
+ * Macro which takes the widget number, and returns the
+ * IO PRB address of that widget.
+ * value _x is expected to be a widget number in the range
+ * 0, 8 - 0xF
+ */
+#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
+ (_x) : \
+ (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
+
+#if defined (CONFIG_SGI_IP27)
+#include <asm/sn/sn0/hubio.h>
+#endif
+
+#else /* CONFIG_SGI_IO */
+
+#include <asm/sn/sn0/addrs.h>
+
+#endif /* CONFIG_SGI_IO */
+
+#endif /* _ASM_SN_IO_H */
diff -Nru a/include/asm-mips/sn/ioc3.h b/include/asm-mips/sn/ioc3.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/ioc3.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,661 @@
+/*
+ * Copyright (C) 1999, 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _IOC3_H
+#define _IOC3_H
+
+/* SUPERIO uart register map */
+typedef volatile struct ioc3_uartregs {
+ union {
+ volatile u8 rbr; /* read only, DLAB == 0 */
+ volatile u8 thr; /* write only, DLAB == 0 */
+ volatile u8 dll; /* DLAB == 1 */
+ } u1;
+ union {
+ volatile u8 ier; /* DLAB == 0 */
+ volatile u8 dlm; /* DLAB == 1 */
+ } u2;
+ union {
+ volatile u8 iir; /* read only */
+ volatile u8 fcr; /* write only */
+ } u3;
+ volatile u8 iu_lcr;
+ volatile u8 iu_mcr;
+ volatile u8 iu_lsr;
+ volatile u8 iu_msr;
+ volatile u8 iu_scr;
+} ioc3_uregs_t;
+
+#define iu_rbr u1.rbr
+#define iu_thr u1.thr
+#define iu_dll u1.dll
+#define iu_ier u2.ier
+#define iu_dlm u2.dlm
+#define iu_iir u3.iir
+#define iu_fcr u3.fcr
+
+struct ioc3_sioregs {
+ volatile u8 fill[0x141]; /* starts at 0x141 */
+
+ volatile u8 uartc;
+ volatile u8 kbdcg;
+
+ volatile u8 fill0[0x150 - 0x142 - 1];
+
+ volatile u8 pp_data;
+ volatile u8 pp_dsr;
+ volatile u8 pp_dcr;
+
+ volatile u8 fill1[0x158 - 0x152 - 1];
+
+ volatile u8 pp_fifa;
+ volatile u8 pp_cfgb;
+ volatile u8 pp_ecr;
+
+ volatile u8 fill2[0x168 - 0x15a - 1];
+
+ volatile u8 rtcad;
+ volatile u8 rtcdat;
+
+ volatile u8 fill3[0x170 - 0x169 - 1];
+
+ struct ioc3_uartregs uartb; /* 0x20170 */
+ struct ioc3_uartregs uarta; /* 0x20178 */
+};
+
+/* Register layout of IOC3 in configuration space. */
+struct ioc3 {
+ volatile u32 pad0[7]; /* 0x00000 */
+ volatile u32 sio_ir; /* 0x0001c */
+ volatile u32 sio_ies; /* 0x00020 */
+ volatile u32 sio_iec; /* 0x00024 */
+ volatile u32 sio_cr; /* 0x00028 */
+ volatile u32 int_out; /* 0x0002c */
+ volatile u32 mcr; /* 0x00030 */
+
+ /* General Purpose I/O registers */
+ volatile u32 gpcr_s; /* 0x00034 */
+ volatile u32 gpcr_c; /* 0x00038 */
+ volatile u32 gpdr; /* 0x0003c */
+ volatile u32 gppr_0; /* 0x00040 */
+ volatile u32 gppr_1; /* 0x00044 */
+ volatile u32 gppr_2; /* 0x00048 */
+ volatile u32 gppr_3; /* 0x0004c */
+ volatile u32 gppr_4; /* 0x00050 */
+ volatile u32 gppr_5; /* 0x00054 */
+ volatile u32 gppr_6; /* 0x00058 */
+ volatile u32 gppr_7; /* 0x0005c */
+ volatile u32 gppr_8; /* 0x00060 */
+ volatile u32 gppr_9; /* 0x00064 */
+ volatile u32 gppr_10; /* 0x00068 */
+ volatile u32 gppr_11; /* 0x0006c */
+ volatile u32 gppr_12; /* 0x00070 */
+ volatile u32 gppr_13; /* 0x00074 */
+ volatile u32 gppr_14; /* 0x00078 */
+ volatile u32 gppr_15; /* 0x0007c */
+
+ /* Parallel Port Registers */
+ volatile u32 ppbr_h_a; /* 0x00080 */
+ volatile u32 ppbr_l_a; /* 0x00084 */
+ volatile u32 ppcr_a; /* 0x00088 */
+ volatile u32 ppcr; /* 0x0008c */
+ volatile u32 ppbr_h_b; /* 0x00090 */
+ volatile u32 ppbr_l_b; /* 0x00094 */
+ volatile u32 ppcr_b; /* 0x00098 */
+
+ /* Keyboard and Mouse Registers */
+ volatile u32 km_csr; /* 0x0009c */
+ volatile u32 k_rd; /* 0x000a0 */
+ volatile u32 m_rd; /* 0x000a4 */
+ volatile u32 k_wd; /* 0x000a8 */
+ volatile u32 m_wd; /* 0x000ac */
+
+ /* Serial Port Registers */
+ volatile u32 sbbr_h; /* 0x000b0 */
+ volatile u32 sbbr_l; /* 0x000b4 */
+ volatile u32 sscr_a; /* 0x000b8 */
+ volatile u32 stpir_a; /* 0x000bc */
+ volatile u32 stcir_a; /* 0x000c0 */
+ volatile u32 srpir_a; /* 0x000c4 */
+ volatile u32 srcir_a; /* 0x000c8 */
+ volatile u32 srtr_a; /* 0x000cc */
+ volatile u32 shadow_a; /* 0x000d0 */
+ volatile u32 sscr_b; /* 0x000d4 */
+ volatile u32 stpir_b; /* 0x000d8 */
+ volatile u32 stcir_b; /* 0x000dc */
+ volatile u32 srpir_b; /* 0x000e0 */
+ volatile u32 srcir_b; /* 0x000e4 */
+ volatile u32 srtr_b; /* 0x000e8 */
+ volatile u32 shadow_b; /* 0x000ec */
+
+ /* Ethernet Registers */
+ volatile u32 emcr; /* 0x000f0 */
+ volatile u32 eisr; /* 0x000f4 */
+ volatile u32 eier; /* 0x000f8 */
+ volatile u32 ercsr; /* 0x000fc */
+ volatile u32 erbr_h; /* 0x00100 */
+ volatile u32 erbr_l; /* 0x00104 */
+ volatile u32 erbar; /* 0x00108 */
+ volatile u32 ercir; /* 0x0010c */
+ volatile u32 erpir; /* 0x00110 */
+ volatile u32 ertr; /* 0x00114 */
+ volatile u32 etcsr; /* 0x00118 */
+ volatile u32 ersr; /* 0x0011c */
+ volatile u32 etcdc; /* 0x00120 */
+ volatile u32 ebir; /* 0x00124 */
+ volatile u32 etbr_h; /* 0x00128 */
+ volatile u32 etbr_l; /* 0x0012c */
+ volatile u32 etcir; /* 0x00130 */
+ volatile u32 etpir; /* 0x00134 */
+ volatile u32 emar_h; /* 0x00138 */
+ volatile u32 emar_l; /* 0x0013c */
+ volatile u32 ehar_h; /* 0x00140 */
+ volatile u32 ehar_l; /* 0x00144 */
+ volatile u32 micr; /* 0x00148 */
+ volatile u32 midr_r; /* 0x0014c */
+ volatile u32 midr_w; /* 0x00150 */
+ volatile u32 pad1[(0x20000 - 0x00154) / 4];
+
+ /* SuperIO Registers XXX */
+ struct ioc3_sioregs sregs; /* 0x20000 */
+ volatile u32 pad2[(0x40000 - 0x20180) / 4];
+
+ /* SSRAM Diagnostic Access */
+ volatile u32 ssram[(0x80000 - 0x40000) / 4];
+
+ /* Bytebus device offsets
+ 0x80000 - Access to the generic devices selected with DEV0
+ 0x9FFFF bytebus DEV_SEL_0
+ 0xA0000 - Access to the generic devices selected with DEV1
+ 0xBFFFF bytebus DEV_SEL_1
+ 0xC0000 - Access to the generic devices selected with DEV2
+ 0xDFFFF bytebus DEV_SEL_2
+ 0xE0000 - Access to the generic devices selected with DEV3
+ 0xFFFFF bytebus DEV_SEL_3 */
+};
+
+/*
+ * Ethernet RX Buffer
+ */
+struct ioc3_erxbuf {
+ u32 w0; /* first word (valid,bcnt,cksum) */
+ u32 err; /* second word various errors */
+ /* next comes n bytes of padding */
+ /* then the received ethernet frame itself */
+};
+
+#define ERXBUF_IPCKSUM_MASK 0x0000ffff
+#define ERXBUF_BYTECNT_MASK 0x07ff0000
+#define ERXBUF_BYTECNT_SHIFT 16
+#define ERXBUF_V 0x80000000
+
+#define ERXBUF_CRCERR 0x00000001 /* aka RSV15 */
+#define ERXBUF_FRAMERR 0x00000002 /* aka RSV14 */
+#define ERXBUF_CODERR 0x00000004 /* aka RSV13 */
+#define ERXBUF_INVPREAMB 0x00000008 /* aka RSV18 */
+#define ERXBUF_LOLEN 0x00007000 /* aka RSV2_0 */
+#define ERXBUF_HILEN 0x03ff0000 /* aka RSV12_3 */
+#define ERXBUF_MULTICAST 0x04000000 /* aka RSV16 */
+#define ERXBUF_BROADCAST 0x08000000 /* aka RSV17 */
+#define ERXBUF_LONGEVENT 0x10000000 /* aka RSV19 */
+#define ERXBUF_BADPKT 0x20000000 /* aka RSV20 */
+#define ERXBUF_GOODPKT 0x40000000 /* aka RSV21 */
+#define ERXBUF_CARRIER 0x80000000 /* aka RSV22 */
+
+/*
+ * Ethernet TX Descriptor
+ */
+#define ETXD_DATALEN 104
+struct ioc3_etxd {
+ u32 cmd; /* command field */
+ u32 bufcnt; /* buffer counts field */
+ u64 p1; /* buffer pointer 1 */
+ u64 p2; /* buffer pointer 2 */
+ u8 data[ETXD_DATALEN]; /* opt. tx data */
+};
+
+#define ETXD_BYTECNT_MASK 0x000007ff /* total byte count */
+#define ETXD_INTWHENDONE 0x00001000 /* intr when done */
+#define ETXD_D0V 0x00010000 /* data 0 valid */
+#define ETXD_B1V 0x00020000 /* buf 1 valid */
+#define ETXD_B2V 0x00040000 /* buf 2 valid */
+#define ETXD_DOCHECKSUM 0x00080000 /* insert ip cksum */
+#define ETXD_CHKOFF_MASK 0x07f00000 /* cksum byte offset */
+#define ETXD_CHKOFF_SHIFT 20
+
+#define ETXD_D0CNT_MASK 0x0000007f
+#define ETXD_B1CNT_MASK 0x0007ff00
+#define ETXD_B1CNT_SHIFT 8
+#define ETXD_B2CNT_MASK 0x7ff00000
+#define ETXD_B2CNT_SHIFT 20
+
+/*
+ * Bytebus device space
+ */
+#define IOC3_BYTEBUS_DEV0 0x80000L
+#define IOC3_BYTEBUS_DEV1 0xa0000L
+#define IOC3_BYTEBUS_DEV2 0xc0000L
+#define IOC3_BYTEBUS_DEV3 0xe0000L
+
+/* ------------------------------------------------------------------------- */
+
+/* Superio Registers (PIO Access) */
+#define IOC3_SIO_BASE 0x20000
+#define IOC3_SIO_UARTC (IOC3_SIO_BASE+0x141) /* UART Config */
+#define IOC3_SIO_KBDCG (IOC3_SIO_BASE+0x142) /* KBD Config */
+#define IOC3_SIO_PP_BASE (IOC3_SIO_BASE+PP_BASE) /* Parallel Port */
+#define IOC3_SIO_RTC_BASE (IOC3_SIO_BASE+0x168) /* Real Time Clock */
+#define IOC3_SIO_UB_BASE (IOC3_SIO_BASE+UARTB_BASE) /* UART B */
+#define IOC3_SIO_UA_BASE (IOC3_SIO_BASE+UARTA_BASE) /* UART A */
+
+/* SSRAM Diagnostic Access */
+#define IOC3_SSRAM IOC3_RAM_OFF /* base of SSRAM diagnostic access */
+#define IOC3_SSRAM_LEN 0x40000 /* 256kb (address space size, may not be fully populated) */
+#define IOC3_SSRAM_DM 0x0000ffff /* data mask */
+#define IOC3_SSRAM_PM 0x00010000 /* parity mask */
+
+/* bitmasks for PCI_SCR */
+#define PCI_SCR_PAR_RESP_EN 0x00000040 /* enb PCI parity checking */
+#define PCI_SCR_SERR_EN 0x00000100 /* enable the SERR# driver */
+#define PCI_SCR_DROP_MODE_EN 0x00008000 /* drop pios on parity err */
+#define PCI_SCR_RX_SERR (0x1 << 16)
+#define PCI_SCR_DROP_MODE (0x1 << 17)
+#define PCI_SCR_SIG_PAR_ERR (0x1 << 24)
+#define PCI_SCR_SIG_TAR_ABRT (0x1 << 27)
+#define PCI_SCR_RX_TAR_ABRT (0x1 << 28)
+#define PCI_SCR_SIG_MST_ABRT (0x1 << 29)
+#define PCI_SCR_SIG_SERR (0x1 << 30)
+#define PCI_SCR_PAR_ERR (0x1 << 31)
+
+/* bitmasks for IOC3_KM_CSR */
+#define KM_CSR_K_WRT_PEND 0x00000001 /* kbd port xmitting or resetting */
+#define KM_CSR_M_WRT_PEND 0x00000002 /* mouse port xmitting or resetting */
+#define KM_CSR_K_LCB 0x00000004 /* Line Cntrl Bit for last KBD write */
+#define KM_CSR_M_LCB 0x00000008 /* same for mouse */
+#define KM_CSR_K_DATA 0x00000010 /* state of kbd data line */
+#define KM_CSR_K_CLK 0x00000020 /* state of kbd clock line */
+#define KM_CSR_K_PULL_DATA 0x00000040 /* pull kbd data line low */
+#define KM_CSR_K_PULL_CLK 0x00000080 /* pull kbd clock line low */
+#define KM_CSR_M_DATA 0x00000100 /* state of ms data line */
+#define KM_CSR_M_CLK 0x00000200 /* state of ms clock line */
+#define KM_CSR_M_PULL_DATA 0x00000400 /* pull ms data line low */
+#define KM_CSR_M_PULL_CLK 0x00000800 /* pull ms clock line low */
+#define KM_CSR_EMM_MODE 0x00001000 /* emulation mode */
+#define KM_CSR_SIM_MODE 0x00002000 /* clock X8 */
+#define KM_CSR_K_SM_IDLE 0x00004000 /* Keyboard is idle */
+#define KM_CSR_M_SM_IDLE 0x00008000 /* Mouse is idle */
+#define KM_CSR_K_TO 0x00010000 /* Keyboard trying to send/receive */
+#define KM_CSR_M_TO 0x00020000 /* Mouse trying to send/receive */
+#define KM_CSR_K_TO_EN 0x00040000 /* KM_CSR_K_TO + KM_CSR_K_TO_EN = cause
+ SIO_IR to assert */
+#define KM_CSR_M_TO_EN 0x00080000 /* KM_CSR_M_TO + KM_CSR_M_TO_EN = cause
+ SIO_IR to assert */
+#define KM_CSR_K_CLAMP_ONE 0x00100000 /* Pull K_CLK low after rec. one char */
+#define KM_CSR_M_CLAMP_ONE 0x00200000 /* Pull M_CLK low after rec. one char */
+#define KM_CSR_K_CLAMP_THREE 0x00400000 /* Pull K_CLK low after rec. three chars */
+#define KM_CSR_M_CLAMP_THREE 0x00800000 /* Pull M_CLK low after rec. three char */
+
+/* bitmasks for IOC3_K_RD and IOC3_M_RD */
+#define KM_RD_DATA_2 0x000000ff /* 3rd char recvd since last read */
+#define KM_RD_DATA_2_SHIFT 0
+#define KM_RD_DATA_1 0x0000ff00 /* 2nd char recvd since last read */
+#define KM_RD_DATA_1_SHIFT 8
+#define KM_RD_DATA_0 0x00ff0000 /* 1st char recvd since last read */
+#define KM_RD_DATA_0_SHIFT 16
+#define KM_RD_FRAME_ERR_2 0x01000000 /* framing or parity error in byte 2 */
+#define KM_RD_FRAME_ERR_1 0x02000000 /* same for byte 1 */
+#define KM_RD_FRAME_ERR_0 0x04000000 /* same for byte 0 */
+
+#define KM_RD_KBD_MSE 0x08000000 /* 0 if from kbd, 1 if from mouse */
+#define KM_RD_OFLO 0x10000000 /* 4th char recvd before this read */
+#define KM_RD_VALID_2 0x20000000 /* DATA_2 valid */
+#define KM_RD_VALID_1 0x40000000 /* DATA_1 valid */
+#define KM_RD_VALID_0 0x80000000 /* DATA_0 valid */
+#define KM_RD_VALID_ALL (KM_RD_VALID_0|KM_RD_VALID_1|KM_RD_VALID_2)
+
+/* bitmasks for IOC3_K_WD & IOC3_M_WD */
+#define KM_WD_WRT_DATA 0x000000ff /* write to keyboard/mouse port */
+#define KM_WD_WRT_DATA_SHIFT 0
+
+/* bitmasks for serial RX status byte */
+#define RXSB_OVERRUN 0x01 /* char(s) lost */
+#define RXSB_PAR_ERR 0x02 /* parity error */
+#define RXSB_FRAME_ERR 0x04 /* framing error */
+#define RXSB_BREAK 0x08 /* break character */
+#define RXSB_CTS 0x10 /* state of CTS */
+#define RXSB_DCD 0x20 /* state of DCD */
+#define RXSB_MODEM_VALID 0x40 /* DCD, CTS and OVERRUN are valid */
+#define RXSB_DATA_VALID 0x80 /* data byte, FRAME_ERR PAR_ERR & BREAK valid */
+
+/* bitmasks for serial TX control byte */
+#define TXCB_INT_WHEN_DONE 0x20 /* interrupt after this byte is sent */
+#define TXCB_INVALID 0x00 /* byte is invalid */
+#define TXCB_VALID 0x40 /* byte is valid */
+#define TXCB_MCR 0x80 /* data<7:0> to modem control register */
+#define TXCB_DELAY 0xc0 /* delay data<7:0> mSec */
+
+/* bitmasks for IOC3_SBBR_L */
+#define SBBR_L_SIZE 0x00000001 /* 0 == 1KB rings, 1 == 4KB rings */
+#define SBBR_L_BASE 0xfffff000 /* lower serial ring base addr */
+
+/* bitmasks for IOC3_SSCR_<A:B> */
+#define SSCR_RX_THRESHOLD 0x000001ff /* hiwater mark */
+#define SSCR_TX_TIMER_BUSY 0x00010000 /* TX timer in progress */
+#define SSCR_HFC_EN 0x00020000 /* hardware flow control enabled */
+#define SSCR_RX_RING_DCD 0x00040000 /* post RX record on delta-DCD */
+#define SSCR_RX_RING_CTS 0x00080000 /* post RX record on delta-CTS */
+#define SSCR_HIGH_SPD 0x00100000 /* 4X speed */
+#define SSCR_DIAG 0x00200000 /* bypass clock divider for sim */
+#define SSCR_RX_DRAIN 0x08000000 /* drain RX buffer to memory */
+#define SSCR_DMA_EN 0x10000000 /* enable ring buffer DMA */
+#define SSCR_DMA_PAUSE 0x20000000 /* pause DMA */
+#define SSCR_PAUSE_STATE 0x40000000 /* sets when PAUSE takes effect */
+#define SSCR_RESET 0x80000000 /* reset DMA channels */
+
+/* all producer/comsumer pointers are the same bitfield */
+#define PROD_CONS_PTR_4K 0x00000ff8 /* for 4K buffers */
+#define PROD_CONS_PTR_1K 0x000003f8 /* for 1K buffers */
+#define PROD_CONS_PTR_OFF 3
+
+/* bitmasks for IOC3_SRCIR_<A:B> */
+#define SRCIR_ARM 0x80000000 /* arm RX timer */
+
+/* bitmasks for IOC3_SRPIR_<A:B> */
+#define SRPIR_BYTE_CNT 0x07000000 /* bytes in packer */
+#define SRPIR_BYTE_CNT_SHIFT 24
+
+/* bitmasks for IOC3_STCIR_<A:B> */
+#define STCIR_BYTE_CNT 0x0f000000 /* bytes in unpacker */
+#define STCIR_BYTE_CNT_SHIFT 24
+
+/* bitmasks for IOC3_SHADOW_<A:B> */
+#define SHADOW_DR 0x00000001 /* data ready */
+#define SHADOW_OE 0x00000002 /* overrun error */
+#define SHADOW_PE 0x00000004 /* parity error */
+#define SHADOW_FE 0x00000008 /* framing error */
+#define SHADOW_BI 0x00000010 /* break interrupt */
+#define SHADOW_THRE 0x00000020 /* transmit holding register empty */
+#define SHADOW_TEMT 0x00000040 /* transmit shift register empty */
+#define SHADOW_RFCE 0x00000080 /* char in RX fifo has an error */
+#define SHADOW_DCTS 0x00010000 /* delta clear to send */
+#define SHADOW_DDCD 0x00080000 /* delta data carrier detect */
+#define SHADOW_CTS 0x00100000 /* clear to send */
+#define SHADOW_DCD 0x00800000 /* data carrier detect */
+#define SHADOW_DTR 0x01000000 /* data terminal ready */
+#define SHADOW_RTS 0x02000000 /* request to send */
+#define SHADOW_OUT1 0x04000000 /* 16550 OUT1 bit */
+#define SHADOW_OUT2 0x08000000 /* 16550 OUT2 bit */
+#define SHADOW_LOOP 0x10000000 /* loopback enabled */
+
+/* bitmasks for IOC3_SRTR_<A:B> */
+#define SRTR_CNT 0x00000fff /* reload value for RX timer */
+#define SRTR_CNT_VAL 0x0fff0000 /* current value of RX timer */
+#define SRTR_CNT_VAL_SHIFT 16
+#define SRTR_HZ 16000 /* SRTR clock frequency */
+
+/* bitmasks for IOC3_SIO_IR, IOC3_SIO_IEC and IOC3_SIO_IES */
+#define SIO_IR_SA_TX_MT 0x00000001 /* Serial port A TX empty */
+#define SIO_IR_SA_RX_FULL 0x00000002 /* port A RX buf full */
+#define SIO_IR_SA_RX_HIGH 0x00000004 /* port A RX hiwat */
+#define SIO_IR_SA_RX_TIMER 0x00000008 /* port A RX timeout */
+#define SIO_IR_SA_DELTA_DCD 0x00000010 /* port A delta DCD */
+#define SIO_IR_SA_DELTA_CTS 0x00000020 /* port A delta CTS */
+#define SIO_IR_SA_INT 0x00000040 /* port A pass-thru intr */
+#define SIO_IR_SA_TX_EXPLICIT 0x00000080 /* port A explicit TX thru */
+#define SIO_IR_SA_MEMERR 0x00000100 /* port A PCI error */
+#define SIO_IR_SB_TX_MT 0x00000200 /* */
+#define SIO_IR_SB_RX_FULL 0x00000400 /* */
+#define SIO_IR_SB_RX_HIGH 0x00000800 /* */
+#define SIO_IR_SB_RX_TIMER 0x00001000 /* */
+#define SIO_IR_SB_DELTA_DCD 0x00002000 /* */
+#define SIO_IR_SB_DELTA_CTS 0x00004000 /* */
+#define SIO_IR_SB_INT 0x00008000 /* */
+#define SIO_IR_SB_TX_EXPLICIT 0x00010000 /* */
+#define SIO_IR_SB_MEMERR 0x00020000 /* */
+#define SIO_IR_PP_INT 0x00040000 /* P port pass-thru intr */
+#define SIO_IR_PP_INTA 0x00080000 /* PP context A thru */
+#define SIO_IR_PP_INTB 0x00100000 /* PP context B thru */
+#define SIO_IR_PP_MEMERR 0x00200000 /* PP PCI error */
+#define SIO_IR_KBD_INT 0x00400000 /* kbd/mouse intr */
+#define SIO_IR_RT_INT 0x08000000 /* RT output pulse */
+#define SIO_IR_GEN_INT1 0x10000000 /* RT input pulse */
+#define SIO_IR_GEN_INT_SHIFT 28
+
+/* per device interrupt masks */
+#define SIO_IR_SA (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL | \
+ SIO_IR_SA_RX_HIGH | SIO_IR_SA_RX_TIMER | \
+ SIO_IR_SA_DELTA_DCD | SIO_IR_SA_DELTA_CTS | \
+ SIO_IR_SA_INT | SIO_IR_SA_TX_EXPLICIT | \
+ SIO_IR_SA_MEMERR)
+#define SIO_IR_SB (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL | \
+ SIO_IR_SB_RX_HIGH | SIO_IR_SB_RX_TIMER | \
+ SIO_IR_SB_DELTA_DCD | SIO_IR_SB_DELTA_CTS | \
+ SIO_IR_SB_INT | SIO_IR_SB_TX_EXPLICIT | \
+ SIO_IR_SB_MEMERR)
+#define SIO_IR_PP (SIO_IR_PP_INT | SIO_IR_PP_INTA | \
+ SIO_IR_PP_INTB | SIO_IR_PP_MEMERR)
+#define SIO_IR_RT (SIO_IR_RT_INT | SIO_IR_GEN_INT1)
+
+/* macro to load pending interrupts */
+#define IOC3_PENDING_INTRS(mem) (PCI_INW(&((mem)->sio_ir)) & \
+ PCI_INW(&((mem)->sio_ies_ro)))
+
+/* bitmasks for SIO_CR */
+#define SIO_CR_SIO_RESET 0x00000001 /* reset the SIO */
+#define SIO_CR_SER_A_BASE 0x000000fe /* DMA poll addr port A */
+#define SIO_CR_SER_A_BASE_SHIFT 1
+#define SIO_CR_SER_B_BASE 0x00007f00 /* DMA poll addr port B */
+#define SIO_CR_SER_B_BASE_SHIFT 8
+#define SIO_SR_CMD_PULSE 0x00078000 /* byte bus strobe length */
+#define SIO_CR_CMD_PULSE_SHIFT 15
+#define SIO_CR_ARB_DIAG 0x00380000 /* cur !enet PCI requet (ro) */
+#define SIO_CR_ARB_DIAG_TXA 0x00000000
+#define SIO_CR_ARB_DIAG_RXA 0x00080000
+#define SIO_CR_ARB_DIAG_TXB 0x00100000
+#define SIO_CR_ARB_DIAG_RXB 0x00180000
+#define SIO_CR_ARB_DIAG_PP 0x00200000
+#define SIO_CR_ARB_DIAG_IDLE 0x00400000 /* 0 -> active request (ro) */
+
+/* bitmasks for INT_OUT */
+#define INT_OUT_COUNT 0x0000ffff /* pulse interval timer */
+#define INT_OUT_MODE 0x00070000 /* mode mask */
+#define INT_OUT_MODE_0 0x00000000 /* set output to 0 */
+#define INT_OUT_MODE_1 0x00040000 /* set output to 1 */
+#define INT_OUT_MODE_1PULSE 0x00050000 /* send 1 pulse */
+#define INT_OUT_MODE_PULSES 0x00060000 /* send 1 pulse every interval */
+#define INT_OUT_MODE_SQW 0x00070000 /* toggle output every interval */
+#define INT_OUT_DIAG 0x40000000 /* diag mode */
+#define INT_OUT_INT_OUT 0x80000000 /* current state of INT_OUT */
+
+/* time constants for INT_OUT */
+#define INT_OUT_NS_PER_TICK (30 * 260) /* 30 ns PCI clock, divisor=260 */
+#define INT_OUT_TICKS_PER_PULSE 3 /* outgoing pulse lasts 3 ticks */
+#define INT_OUT_US_TO_COUNT(x) /* convert uS to a count value */ \
+ (((x) * 10 + INT_OUT_NS_PER_TICK / 200) * \
+ 100 / INT_OUT_NS_PER_TICK - 1)
+#define INT_OUT_COUNT_TO_US(x) /* convert count value to uS */ \
+ (((x) + 1) * INT_OUT_NS_PER_TICK / 1000)
+#define INT_OUT_MIN_TICKS 3 /* min period is width of pulse in "ticks" */
+#define INT_OUT_MAX_TICKS INT_OUT_COUNT /* largest possible count */
+
+/* bitmasks for GPCR */
+#define GPCR_DIR 0x000000ff /* tristate pin input or output */
+#define GPCR_DIR_PIN(x) (1<<(x)) /* access one of the DIR bits */
+#define GPCR_EDGE 0x000f0000 /* extint edge or level sensitive */
+#define GPCR_EDGE_PIN(x) (1<<((x)+15)) /* access one of the EDGE bits */
+
+/* values for GPCR */
+#define GPCR_INT_OUT_EN 0x00100000 /* enable INT_OUT to pin 0 */
+#define GPCR_MLAN_EN 0x00200000 /* enable MCR to pin 8 */
+#define GPCR_DIR_SERA_XCVR 0x00000080 /* Port A Transceiver select enable */
+#define GPCR_DIR_SERB_XCVR 0x00000040 /* Port B Transceiver select enable */
+#define GPCR_DIR_PHY_RST 0x00000020 /* ethernet PHY reset enable */
+
+/* defs for some of the generic I/O pins */
+#define GPCR_PHY_RESET 0x20 /* pin is output to PHY reset */
+#define GPCR_UARTB_MODESEL 0x40 /* pin is output to port B mode sel */
+#define GPCR_UARTA_MODESEL 0x80 /* pin is output to port A mode sel */
+
+#define GPPR_PHY_RESET_PIN 5 /* GIO pin controlling phy reset */
+#define GPPR_UARTB_MODESEL_PIN 6 /* GIO pin controlling uart b mode select */
+#define GPPR_UARTA_MODESEL_PIN 7 /* GIO pin controlling uart a mode select */
+
+#define EMCR_DUPLEX 0x00000001
+#define EMCR_PROMISC 0x00000002
+#define EMCR_PADEN 0x00000004
+#define EMCR_RXOFF_MASK 0x000001f8
+#define EMCR_RXOFF_SHIFT 3
+#define EMCR_RAMPAR 0x00000200
+#define EMCR_BADPAR 0x00000800
+#define EMCR_BUFSIZ 0x00001000
+#define EMCR_TXDMAEN 0x00002000
+#define EMCR_TXEN 0x00004000
+#define EMCR_RXDMAEN 0x00008000
+#define EMCR_RXEN 0x00010000
+#define EMCR_LOOPBACK 0x00020000
+#define EMCR_ARB_DIAG 0x001c0000
+#define EMCR_ARB_DIAG_IDLE 0x00200000
+#define EMCR_RST 0x80000000
+
+#define EISR_RXTIMERINT 0x00000001
+#define EISR_RXTHRESHINT 0x00000002
+#define EISR_RXOFLO 0x00000004
+#define EISR_RXBUFOFLO 0x00000008
+#define EISR_RXMEMERR 0x00000010
+#define EISR_RXPARERR 0x00000020
+#define EISR_TXEMPTY 0x00010000
+#define EISR_TXRTRY 0x00020000
+#define EISR_TXEXDEF 0x00040000
+#define EISR_TXLCOL 0x00080000
+#define EISR_TXGIANT 0x00100000
+#define EISR_TXBUFUFLO 0x00200000
+#define EISR_TXEXPLICIT 0x00400000
+#define EISR_TXCOLLWRAP 0x00800000
+#define EISR_TXDEFERWRAP 0x01000000
+#define EISR_TXMEMERR 0x02000000
+#define EISR_TXPARERR 0x04000000
+
+#define ERCSR_THRESH_MASK 0x000001ff /* enet RX threshold */
+#define ERCSR_RX_TMR 0x40000000 /* simulation only */
+#define ERCSR_DIAG_OFLO 0x80000000 /* simulation only */
+
+#define ERBR_ALIGNMENT 4096
+#define ERBR_L_RXRINGBASE_MASK 0xfffff000
+
+#define ERBAR_BARRIER_BIT 0x0100
+#define ERBAR_RXBARR_MASK 0xffff0000
+#define ERBAR_RXBARR_SHIFT 16
+
+#define ERCIR_RXCONSUME_MASK 0x00000fff
+
+#define ERPIR_RXPRODUCE_MASK 0x00000fff
+#define ERPIR_ARM 0x80000000
+
+#define ERTR_CNT_MASK 0x000007ff
+
+#define ETCSR_IPGT_MASK 0x0000007f
+#define ETCSR_IPGR1_MASK 0x00007f00
+#define ETCSR_IPGR1_SHIFT 8
+#define ETCSR_IPGR2_MASK 0x007f0000
+#define ETCSR_IPGR2_SHIFT 16
+#define ETCSR_NOTXCLK 0x80000000
+
+#define ETCDC_COLLCNT_MASK 0x0000ffff
+#define ETCDC_DEFERCNT_MASK 0xffff0000
+#define ETCDC_DEFERCNT_SHIFT 16
+
+#define ETBR_ALIGNMENT (64*1024)
+#define ETBR_L_RINGSZ_MASK 0x00000001
+#define ETBR_L_RINGSZ128 0
+#define ETBR_L_RINGSZ512 1
+#define ETBR_L_TXRINGBASE_MASK 0xffffc000
+
+#define ETCIR_TXCONSUME_MASK 0x0000ffff
+#define ETCIR_IDLE 0x80000000
+
+#define ETPIR_TXPRODUCE_MASK 0x0000ffff
+
+#define EBIR_TXBUFPROD_MASK 0x0000001f
+#define EBIR_TXBUFCONS_MASK 0x00001f00
+#define EBIR_TXBUFCONS_SHIFT 8
+#define EBIR_RXBUFPROD_MASK 0x007fc000
+#define EBIR_RXBUFPROD_SHIFT 14
+#define EBIR_RXBUFCONS_MASK 0xff800000
+#define EBIR_RXBUFCONS_SHIFT 23
+
+#define MICR_REGADDR_MASK 0x0000001f
+#define MICR_PHYADDR_MASK 0x000003e0
+#define MICR_PHYADDR_SHIFT 5
+#define MICR_READTRIG 0x00000400
+#define MICR_BUSY 0x00000800
+
+#define MIDR_DATA_MASK 0x0000ffff
+
+#define ERXBUF_IPCKSUM_MASK 0x0000ffff
+#define ERXBUF_BYTECNT_MASK 0x07ff0000
+#define ERXBUF_BYTECNT_SHIFT 16
+#define ERXBUF_V 0x80000000
+
+#define ERXBUF_CRCERR 0x00000001 /* aka RSV15 */
+#define ERXBUF_FRAMERR 0x00000002 /* aka RSV14 */
+#define ERXBUF_CODERR 0x00000004 /* aka RSV13 */
+#define ERXBUF_INVPREAMB 0x00000008 /* aka RSV18 */
+#define ERXBUF_LOLEN 0x00007000 /* aka RSV2_0 */
+#define ERXBUF_HILEN 0x03ff0000 /* aka RSV12_3 */
+#define ERXBUF_MULTICAST 0x04000000 /* aka RSV16 */
+#define ERXBUF_BROADCAST 0x08000000 /* aka RSV17 */
+#define ERXBUF_LONGEVENT 0x10000000 /* aka RSV19 */
+#define ERXBUF_BADPKT 0x20000000 /* aka RSV20 */
+#define ERXBUF_GOODPKT 0x40000000 /* aka RSV21 */
+#define ERXBUF_CARRIER 0x80000000 /* aka RSV22 */
+
+#define ETXD_BYTECNT_MASK 0x000007ff /* total byte count */
+#define ETXD_INTWHENDONE 0x00001000 /* intr when done */
+#define ETXD_D0V 0x00010000 /* data 0 valid */
+#define ETXD_B1V 0x00020000 /* buf 1 valid */
+#define ETXD_B2V 0x00040000 /* buf 2 valid */
+#define ETXD_DOCHECKSUM 0x00080000 /* insert ip cksum */
+#define ETXD_CHKOFF_MASK 0x07f00000 /* cksum byte offset */
+#define ETXD_CHKOFF_SHIFT 20
+
+#define ETXD_D0CNT_MASK 0x0000007f
+#define ETXD_B1CNT_MASK 0x0007ff00
+#define ETXD_B1CNT_SHIFT 8
+#define ETXD_B2CNT_MASK 0x7ff00000
+#define ETXD_B2CNT_SHIFT 20
+
+typedef enum ioc3_subdevs_e {
+ ioc3_subdev_ether,
+ ioc3_subdev_generic,
+ ioc3_subdev_nic,
+ ioc3_subdev_kbms,
+ ioc3_subdev_ttya,
+ ioc3_subdev_ttyb,
+ ioc3_subdev_ecpp,
+ ioc3_subdev_rt,
+ ioc3_nsubdevs
+} ioc3_subdev_t;
+
+/* subdevice disable bits,
+ * from the standard INFO_LBL_SUBDEVS
+ */
+#define IOC3_SDB_ETHER (1<<ioc3_subdev_ether)
+#define IOC3_SDB_GENERIC (1<<ioc3_subdev_generic)
+#define IOC3_SDB_NIC (1<<ioc3_subdev_nic)
+#define IOC3_SDB_KBMS (1<<ioc3_subdev_kbms)
+#define IOC3_SDB_TTYA (1<<ioc3_subdev_ttya)
+#define IOC3_SDB_TTYB (1<<ioc3_subdev_ttyb)
+#define IOC3_SDB_ECPP (1<<ioc3_subdev_ecpp)
+#define IOC3_SDB_RT (1<<ioc3_subdev_rt)
+
+#define IOC3_ALL_SUBDEVS ((1<<ioc3_nsubdevs)-1)
+
+#define IOC3_SDB_SERIAL (IOC3_SDB_TTYA|IOC3_SDB_TTYB)
+
+#define IOC3_STD_SUBDEVS IOC3_ALL_SUBDEVS
+
+#define IOC3_INTA_SUBDEVS IOC3_SDB_ETHER
+#define IOC3_INTB_SUBDEVS (IOC3_SDB_GENERIC|IOC3_SDB_KBMS|IOC3_SDB_SERIAL|IOC3_SDB_ECPP|IOC3_SDB_RT)
+
+#endif /* _IOC3_H */
diff -Nru a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/klconfig.h Sun Aug 3 13:14:49 2003
@@ -0,0 +1,974 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/klconfig.h>.
+ *
+ * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1999, 2000 by Ralf Baechle
+ */
+#ifndef _ASM_SN_KLCONFIG_H
+#define _ASM_SN_KLCONFIG_H
+
+/*
+ * The KLCONFIG structures store info about the various BOARDs found
+ * during Hardware Discovery. In addition, it stores info about the
+ * components found on the BOARDs.
+ */
+
+/*
+ * WARNING:
+ * Certain assembly language routines (notably xxxxx.s) in the IP27PROM
+ * will depend on the format of the data structures in this file. In
+ * most cases, rearranging the fields can seriously break things.
+ * Adding fields in the beginning or middle can also break things.
+ * Add fields if necessary, to the end of a struct in such a way
+ * that offsets of existing fields do not change.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <asm/sn/types.h>
+#if defined(CONFIG_SGI_IP27)
+#include <asm/sn/sn0/addrs.h>
+//#include <sys/SN/router.h>
+// XXX Stolen from <sys/SN/router.h>:
+#define MAX_ROUTER_PORTS (6) /* Max. number of ports on a router */
+#include <asm/sn/sn0/sn0_fru.h>
+//#include <sys/graph.h>
+//#include <sys/xtalk/xbow.h>
+#elif defined(CONFIG_SGI_IP35)
+#include <asm/sn/sn1/addrs.h>
+#include <sys/sn/router.h>
+#include <sys/graph.h>
+#include <asm/xtalk/xbow.h>
+#endif /* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
+#if defined(CONFIG_SGI_IP27) || defined(CONFIG_SGI_IP35)
+#include <asm/sn/agent.h>
+#include <asm/arc/types.h>
+#include <asm/arc/hinv.h>
+#if defined(CONFIG_SGI_IO) || defined(CONFIG_SGI_IP35)
+// The hack file has to be before vector and after sn0_fru....
+#include <asm/hack.h>
+#include <asm/sn/vector.h>
+#include <asm/xtalk/xtalk.h>
+#endif /* CONFIG_SGI_IO || CONFIG_SGI_IP35 */
+#endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */
+
+#define KLCFGINFO_MAGIC 0xbeedbabe
+
+#ifdef FRUTEST
+typedef u64 klconf_off_t;
+#else
+typedef s32 klconf_off_t;
+#endif
+
+/*
+ * Some IMPORTANT OFFSETS. These are the offsets on all NODES.
+ */
+#if 0
+#define RAMBASE 0
+#define ARCSSPB_OFF 0x1000 /* shift it to sys/arcs/spb.h */
+
+#define OFF_HWGRAPH 0
+#endif
+
+#define MAX_MODULE_ID 255
+#define SIZE_PAD 4096 /* 4k padding for structures */
+/*
+ * 1 NODE brd, 2 Router brd (1 8p, 1 meta), 6 Widgets,
+ * 2 Midplanes assuming no pci card cages
+ */
+#define MAX_SLOTS_PER_NODE (1 + 2 + 6 + 2)
+
+/* XXX if each node is guranteed to have some memory */
+
+#define MAX_PCI_DEVS 8
+
+/* lboard_t->brd_flags fields */
+/* All bits in this field are currently used. Try the pad fields if
+ you need more flag bits */
+
+#define ENABLE_BOARD 0x01
+#define FAILED_BOARD 0x02
+#define DUPLICATE_BOARD 0x04 /* Boards like midplanes/routers which
+ are discovered twice. Use one of them */
+#define VISITED_BOARD 0x08 /* Used for compact hub numbering. */
+#define LOCAL_MASTER_IO6 0x10 /* master io6 for that node */
+#define GLOBAL_MASTER_IO6 0x20
+#define THIRD_NIC_PRESENT 0x40 /* for future use */
+#define SECOND_NIC_PRESENT 0x80 /* addons like MIO are present */
+
+/* klinfo->flags fields */
+
+#define KLINFO_ENABLE 0x01 /* This component is enabled */
+#define KLINFO_FAILED 0x02 /* This component failed */
+#define KLINFO_DEVICE 0x04 /* This component is a device */
+#define KLINFO_VISITED 0x08 /* This component has been visited */
+#define KLINFO_CONTROLLER 0x10 /* This component is a device controller */
+#define KLINFO_INSTALL 0x20 /* Install a driver */
+#define KLINFO_HEADLESS 0x40 /* Headless (or hubless) component */
+#define IS_CONSOLE_IOC3(i) ((((klinfo_t *)i)->flags) & KLINFO_INSTALL)
+
+#define GB2 0x80000000
+
+#define MAX_RSV_PTRS 32
+
+/* Structures to manage various data storage areas */
+/* The numbers must be contiguous since the array index i
+ is used in the code to allocate various areas.
+*/
+
+#define BOARD_STRUCT 0
+#define COMPONENT_STRUCT 1
+#define ERRINFO_STRUCT 2
+#define KLMALLOC_TYPE_MAX (ERRINFO_STRUCT + 1)
+#define DEVICE_STRUCT 3
+
+
+typedef struct console_s {
+#if defined(CONFIG_SGI_IO) /* FIXME */
+ __psunsigned_t uart_base;
+ __psunsigned_t config_base;
+ __psunsigned_t memory_base;
+#else
+ unsigned long uart_base;
+ unsigned long config_base;
+ unsigned long memory_base;
+#endif
+ short baud;
+ short flag;
+ int type;
+ nasid_t nasid;
+ char wid;
+ char npci;
+ nic_t baseio_nic;
+} console_t;
+
+typedef struct klc_malloc_hdr {
+ klconf_off_t km_base;
+ klconf_off_t km_limit;
+ klconf_off_t km_current;
+} klc_malloc_hdr_t;
+
+/* Functions/macros needed to use this structure */
+
+typedef struct kl_config_hdr {
+ u64 ch_magic; /* set this to KLCFGINFO_MAGIC */
+ u32 ch_version; /* structure version number */
+ klconf_off_t ch_malloc_hdr_off; /* offset of ch_malloc_hdr */
+ klconf_off_t ch_cons_off; /* offset of ch_cons */
+ klconf_off_t ch_board_info; /* the link list of boards */
+ console_t ch_cons_info; /* address info of the console */
+ klc_malloc_hdr_t ch_malloc_hdr[KLMALLOC_TYPE_MAX];
+ confidence_t ch_sw_belief; /* confidence that software is bad*/
+ confidence_t ch_sn0net_belief; /* confidence that sn0net is bad */
+} kl_config_hdr_t;
+
+
+#define KL_CONFIG_HDR(_nasid) ((kl_config_hdr_t *)(KLCONFIG_ADDR(_nasid)))
+#if 0
+#define KL_CONFIG_MALLOC_HDR(_nasid) \
+ (KL_CONFIG_HDR(_nasid)->ch_malloc_hdr)
+#endif
+#define KL_CONFIG_INFO_OFFSET(_nasid) \
+ (KL_CONFIG_HDR(_nasid)->ch_board_info)
+#define KL_CONFIG_INFO_SET_OFFSET(_nasid, _off) \
+ (KL_CONFIG_HDR(_nasid)->ch_board_info = (_off))
+
+#define KL_CONFIG_INFO(_nasid) \
+ (lboard_t *)((KL_CONFIG_HDR(_nasid)->ch_board_info) ? \
+ NODE_OFFSET_TO_K1((_nasid), KL_CONFIG_HDR(_nasid)->ch_board_info) : \
+ 0)
+#define KL_CONFIG_MAGIC(_nasid) (KL_CONFIG_HDR(_nasid)->ch_magic)
+
+#define KL_CONFIG_CHECK_MAGIC(_nasid) \
+ (KL_CONFIG_HDR(_nasid)->ch_magic == KLCFGINFO_MAGIC)
+
+#define KL_CONFIG_HDR_INIT_MAGIC(_nasid) \
+ (KL_CONFIG_HDR(_nasid)->ch_magic = KLCFGINFO_MAGIC)
+
+/* --- New Macros for the changed kl_config_hdr_t structure --- */
+
+#if defined(CONFIG_SGI_IO)
+#define PTR_CH_MALLOC_HDR(_k) ((klc_malloc_hdr_t *)\
+ ((__psunsigned_t)_k + (_k->ch_malloc_hdr_off)))
+#else
+#define PTR_CH_MALLOC_HDR(_k) ((klc_malloc_hdr_t *)\
+ (unsigned long)_k + (_k->ch_malloc_hdr_off)))
+#endif
+
+#define KL_CONFIG_CH_MALLOC_HDR(_n) PTR_CH_MALLOC_HDR(KL_CONFIG_HDR(_n))
+
+#if defined(CONFIG_SGI_IO)
+#define PTR_CH_CONS_INFO(_k) ((console_t *)\
+ ((__psunsigned_t)_k + (_k->ch_cons_off)))
+#else
+#define PTR_CH_CONS_INFO(_k) ((console_t *)\
+ ((unsigned long)_k + (_k->ch_cons_off)))
+#endif
+
+#define KL_CONFIG_CH_CONS_INFO(_n) PTR_CH_CONS_INFO(KL_CONFIG_HDR(_n))
+
+/* ------------------------------------------------------------- */
+
+#define KL_CONFIG_INFO_START(_nasid) \
+ (klconf_off_t)(KLCONFIG_OFFSET(_nasid) + sizeof(kl_config_hdr_t))
+
+#define KL_CONFIG_BOARD_NASID(_brd) ((_brd)->brd_nasid)
+#define KL_CONFIG_BOARD_SET_NEXT(_brd, _off) ((_brd)->brd_next = (_off))
+
+#define KL_CONFIG_DUPLICATE_BOARD(_brd) ((_brd)->brd_flags & DUPLICATE_BOARD)
+
+#define XBOW_PORT_TYPE_HUB(_xbowp, _link) \
+ ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_flag & XBOW_PORT_HUB)
+#define XBOW_PORT_TYPE_IO(_xbowp, _link) \
+ ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_flag & XBOW_PORT_IO)
+
+#define XBOW_PORT_IS_ENABLED(_xbowp, _link) \
+ ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_flag & XBOW_PORT_ENABLE)
+#define XBOW_PORT_NASID(_xbowp, _link) \
+ ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_nasid)
+
+#define XBOW_PORT_IO 0x1
+#define XBOW_PORT_HUB 0x2
+#define XBOW_PORT_ENABLE 0x4
+
+#define SN0_PORT_FENCE_SHFT 0
+#define SN0_PORT_FENCE_MASK (1 << SN0_PORT_FENCE_SHFT)
+
+/*
+ * The KLCONFIG area is organized as a LINKED LIST of BOARDs. A BOARD
+ * can be either 'LOCAL' or 'REMOTE'. LOCAL means it is attached to
+ * the LOCAL/current NODE. REMOTE means it is attached to a different
+ * node.(TBD - Need a way to treat ROUTER boards.)
+ *
+ * There are 2 different structures to represent these boards -
+ * lboard - Local board, rboard - remote board. These 2 structures
+ * can be arbitrarily mixed in the LINKED LIST of BOARDs. (Refer
+ * Figure below). The first byte of the rboard or lboard structure
+ * is used to find out its type - no unions are used.
+ * If it is a lboard, then the config info of this board will be found
+ * on the local node. (LOCAL NODE BASE + offset value gives pointer to
+ * the structure.
+ * If it is a rboard, the local structure contains the node number
+ * and the offset of the beginning of the LINKED LIST on the remote node.
+ * The details of the hardware on a remote node can be built locally,
+ * if required, by reading the LINKED LIST on the remote node and
+ * ignoring all the rboards on that node.
+ *
+ * The local node uses the REMOTE NODE NUMBER + OFFSET to point to the
+ * First board info on the remote node. The remote node list is
+ * traversed as the local list, using the REMOTE BASE ADDRESS and not
+ * the local base address and ignoring all rboard values.
+ *
+ *
+ KLCONFIG
+
+ +------------+ +------------+ +------------+ +------------+
+ | lboard | +-->| lboard | +-->| rboard | +-->| lboard |
+ +------------+ | +------------+ | +------------+ | +------------+
+ | board info | | | board info | | |errinfo,bptr| | | board info |
+ +------------+ | +------------+ | +------------+ | +------------+
+ | offset |--+ | offset |--+ | offset |--+ |offset=NULL |
+ +------------+ +------------+ +------------+ +------------+
+
+
+ +------------+
+ | board info |
+ +------------+ +--------------------------------+
+ | compt 1 |------>| type, rev, diaginfo, size ... | (CPU)
+ +------------+ +--------------------------------+
+ | compt 2 |--+
+ +------------+ | +--------------------------------+
+ | ... | +--->| type, rev, diaginfo, size ... | (MEM_BANK)
+ +------------+ +--------------------------------+
+ | errinfo |--+
+ +------------+ | +--------------------------------+
+ +--->|r/l brd errinfo,compt err flags |
+ +--------------------------------+
+
+ *
+ * Each BOARD consists of COMPONENTs and the BOARD structure has
+ * pointers (offsets) to its COMPONENT structure.
+ * The COMPONENT structure has version info, size and speed info, revision,
+ * error info and the NIC info. This structure can accommodate any
+ * BOARD with arbitrary COMPONENT composition.
+ *
+ * The ERRORINFO part of each BOARD has error information
+ * that describes errors about the BOARD itself. It also has flags to
+ * indicate the COMPONENT(s) on the board that have errors. The error
+ * information specific to the COMPONENT is present in the respective
+ * COMPONENT structure.
+ *
+ * The ERRORINFO structure is also treated like a COMPONENT, ie. the
+ * BOARD has pointers(offset) to the ERRORINFO structure. The rboard
+ * structure also has a pointer to the ERRORINFO structure. This is
+ * the place to store ERRORINFO about a REMOTE NODE, if the HUB on
+ * that NODE is not working or if the REMOTE MEMORY is BAD. In cases where
+ * only the CPU of the REMOTE NODE is disabled, the ERRORINFO pointer can
+ * be a NODE NUMBER, REMOTE OFFSET combination, pointing to error info
+ * which is present on the REMOTE NODE.(TBD)
+ * REMOTE ERRINFO can be stored on any of the nearest nodes
+ * or on all the nearest nodes.(TBD)
+ * Like BOARD structures, REMOTE ERRINFO structures can be built locally
+ * using the rboard errinfo pointer.
+ *
+ * In order to get useful information from this Data organization, a set of
+ * interface routines are provided (TBD). The important thing to remember while
+ * manipulating the structures, is that, the NODE number information should
+ * be used. If the NODE is non-zero (remote) then each offset should
+ * be added to the REMOTE BASE ADDR else it should be added to the LOCAL BASE ADDR.
+ * This includes offsets for BOARDS, COMPONENTS and ERRORINFO.
+ *
+ * Note that these structures do not provide much info about connectivity.
+ * That info will be part of HWGRAPH, which is an extension of the cfg_t
+ * data structure. (ref IP27prom/cfg.h) It has to be extended to include
+ * the IO part of the Network(TBD).
+ *
+ * The data structures below define the above concepts.
+ */
+
+/*
+ * Values for CPU types
+ */
+#define KL_CPU_R4000 0x1 /* Standard R4000 */
+#define KL_CPU_TFP 0x2 /* TFP processor */
+#define KL_CPU_R10000 0x3 /* R10000 (T5) */
+#define KL_CPU_NONE (-1) /* no cpu present in slot */
+
+/*
+ * IP27 BOARD classes
+ */
+
+#define KLCLASS_MASK 0xf0
+#define KLCLASS_NONE 0x00
+#define KLCLASS_NODE 0x10 /* CPU, Memory and HUB board */
+#define KLCLASS_CPU KLCLASS_NODE
+#define KLCLASS_IO 0x20 /* BaseIO, 4 ch SCSI, ethernet, FDDI
+ and the non-graphics widget boards */
+#define KLCLASS_ROUTER 0x30 /* Router board */
+#define KLCLASS_MIDPLANE 0x40 /* We need to treat this as a board
+ so that we can record error info */
+#define KLCLASS_GFX 0x50 /* graphics boards */
+
+#define KLCLASS_PSEUDO_GFX 0x60 /* HDTV type cards that use a gfx
+ * hw ifc to xtalk and are not gfx
+ * class for sw purposes */
+
+#define KLCLASS_MAX 7 /* Bump this if a new CLASS is added */
+#define KLTYPE_MAX 10 /* Bump this if a new CLASS is added */
+
+#define KLCLASS_UNKNOWN 0xf0
+
+#define KLCLASS(_x) ((_x) & KLCLASS_MASK)
+
+/*
+ * IP27 board types
+ */
+
+#define KLTYPE_MASK 0x0f
+#define KLTYPE_NONE 0x00
+#define KLTYPE_EMPTY 0x00
+
+#define KLTYPE_WEIRDCPU (KLCLASS_CPU | 0x0)
+#define KLTYPE_IP27 (KLCLASS_CPU | 0x1) /* 2 CPUs(R10K) per board */
+
+#define KLTYPE_WEIRDIO (KLCLASS_IO | 0x0)
+#define KLTYPE_BASEIO (KLCLASS_IO | 0x1) /* IOC3, SuperIO, Bridge, SCSI */
+#define KLTYPE_IO6 KLTYPE_BASEIO /* Additional name */
+#define KLTYPE_4CHSCSI (KLCLASS_IO | 0x2)
+#define KLTYPE_MSCSI KLTYPE_4CHSCSI /* Additional name */
+#define KLTYPE_ETHERNET (KLCLASS_IO | 0x3)
+#define KLTYPE_MENET KLTYPE_ETHERNET /* Additional name */
+#define KLTYPE_FDDI (KLCLASS_IO | 0x4)
+#define KLTYPE_UNUSED (KLCLASS_IO | 0x5) /* XXX UNUSED */
+#define KLTYPE_HAROLD (KLCLASS_IO | 0x6) /* PCI SHOE BOX */
+#define KLTYPE_PCI KLTYPE_HAROLD
+#define KLTYPE_VME (KLCLASS_IO | 0x7) /* Any 3rd party VME card */
+#define KLTYPE_MIO (KLCLASS_IO | 0x8)
+#define KLTYPE_FC (KLCLASS_IO | 0x9)
+#define KLTYPE_LINC (KLCLASS_IO | 0xA)
+#define KLTYPE_TPU (KLCLASS_IO | 0xB) /* Tensor Processing Unit */
+#define KLTYPE_GSN_A (KLCLASS_IO | 0xC) /* Main GSN board */
+#define KLTYPE_GSN_B (KLCLASS_IO | 0xD) /* Auxiliary GSN board */
+
+#define KLTYPE_GFX (KLCLASS_GFX | 0x0) /* unknown graphics type */
+#define KLTYPE_GFX_KONA (KLCLASS_GFX | 0x1) /* KONA graphics on IP27 */
+#define KLTYPE_GFX_MGRA (KLCLASS_GFX | 0x3) /* MGRAS graphics on IP27 */
+
+#define KLTYPE_WEIRDROUTER (KLCLASS_ROUTER | 0x0)
+#define KLTYPE_ROUTER (KLCLASS_ROUTER | 0x1)
+#define KLTYPE_ROUTER2 KLTYPE_ROUTER /* Obsolete! */
+#define KLTYPE_NULL_ROUTER (KLCLASS_ROUTER | 0x2)
+#define KLTYPE_META_ROUTER (KLCLASS_ROUTER | 0x3)
+
+#define KLTYPE_WEIRDMIDPLANE (KLCLASS_MIDPLANE | 0x0)
+#define KLTYPE_MIDPLANE8 (KLCLASS_MIDPLANE | 0x1) /* 8 slot backplane */
+#define KLTYPE_MIDPLANE KLTYPE_MIDPLANE8
+#define KLTYPE_PBRICK_XBOW (KLCLASS_MIDPLANE | 0x2)
+
+#define KLTYPE_IOBRICK (KLCLASS_IOBRICK | 0x0)
+#define KLTYPE_IBRICK (KLCLASS_IOBRICK | 0x1)
+#define KLTYPE_PBRICK (KLCLASS_IOBRICK | 0x2)
+#define KLTYPE_XBRICK (KLCLASS_IOBRICK | 0x3)
+
+#define KLTYPE_PBRICK_BRIDGE KLTYPE_PBRICK
+
+/* The value of type should be more than 8 so that hinv prints
+ * out the board name from the NIC string. For values less than
+ * 8 the name of the board needs to be hard coded in a few places.
+ * When bringup started nic names had not standardized and so we
+ * had to hard code. (For people interested in history.)
+ */
+#define KLTYPE_XTHD (KLCLASS_PSEUDO_GFX | 0x9)
+
+#define KLTYPE_UNKNOWN (KLCLASS_UNKNOWN | 0xf)
+
+#define KLTYPE(_x) ((_x) & KLTYPE_MASK)
+#define IS_MIO_PRESENT(l) ((l->brd_type == KLTYPE_BASEIO) && \
+ (l->brd_flags & SECOND_NIC_PRESENT))
+#define IS_MIO_IOC3(l,n) (IS_MIO_PRESENT(l) && (n > 2))
+
+/*
+ * board structures
+ */
+
+#define MAX_COMPTS_PER_BRD 24
+
+#define LOCAL_BOARD 1
+#define REMOTE_BOARD 2
+
+#define LBOARD_STRUCT_VERSION 2
+
+typedef struct lboard_s {
+ klconf_off_t brd_next; /* Next BOARD */
+ unsigned char struct_type; /* type of structure, local or remote */
+ unsigned char brd_type; /* type+class */
+ unsigned char brd_sversion; /* version of this structure */
+ unsigned char brd_brevision; /* board revision */
+ unsigned char brd_promver; /* board prom version, if any */
+ unsigned char brd_flags; /* Enabled, Disabled etc */
+ unsigned char brd_slot; /* slot number */
+ unsigned short brd_debugsw; /* Debug switches */
+ moduleid_t brd_module; /* module to which it belongs */
+ partid_t brd_partition; /* Partition number */
+ unsigned short brd_diagval; /* diagnostic value */
+ unsigned short brd_diagparm; /* diagnostic parameter */
+ unsigned char brd_inventory; /* inventory history */
+ unsigned char brd_numcompts; /* Number of components */
+ nic_t brd_nic; /* Number in CAN */
+ nasid_t brd_nasid; /* passed parameter */
+ klconf_off_t brd_compts[MAX_COMPTS_PER_BRD]; /* pointers to COMPONENTS */
+ klconf_off_t brd_errinfo; /* Board's error information */
+ struct lboard_s *brd_parent; /* Logical parent for this brd */
+ vertex_hdl_t brd_graph_link; /* vertex hdl to connect extern compts */
+ confidence_t brd_confidence; /* confidence that the board is bad */
+ nasid_t brd_owner; /* who owns this board */
+ unsigned char brd_nic_flags; /* To handle 8 more NICs */
+ char brd_name[32];
+} lboard_t;
+
+
+/*
+ * Make sure we pass back the calias space address for local boards.
+ * klconfig board traversal and error structure extraction defines.
+ */
+
+#define BOARD_SLOT(_brd) ((_brd)->brd_slot)
+
+#define KLCF_CLASS(_brd) KLCLASS((_brd)->brd_type)
+#define KLCF_TYPE(_brd) KLTYPE((_brd)->brd_type)
+#define KLCF_REMOTE(_brd) (((_brd)->struct_type & LOCAL_BOARD) ? 0 : 1)
+#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts)
+#define KLCF_MODULE_ID(_brd) ((_brd)->brd_module)
+
+#ifdef FRUTEST
+
+#define KLCF_NEXT(_brd) ((_brd)->brd_next ? (lboard_t *)((_brd)->brd_next): NULL)
+#define KLCF_COMP(_brd, _ndx) (klinfo_t *)((_brd)->brd_compts[(_ndx)])
+#define KLCF_COMP_ERROR(_brd, _comp) (_brd = _brd , (_comp)->errinfo)
+
+#else
+
+#define KLCF_NEXT(_brd) \
+ ((_brd)->brd_next ? \
+ (lboard_t *)(NODE_OFFSET_TO_K1(NASID_GET(_brd), (_brd)->brd_next)):\
+ NULL)
+#define KLCF_COMP(_brd, _ndx) \
+ (klinfo_t *)(NODE_OFFSET_TO_K1(NASID_GET(_brd), \
+ (_brd)->brd_compts[(_ndx)]))
+
+#define KLCF_COMP_ERROR(_brd, _comp) \
+ (NODE_OFFSET_TO_K1(NASID_GET(_brd), (_comp)->errinfo))
+
+#endif
+
+#define KLCF_COMP_TYPE(_comp) ((_comp)->struct_type)
+#define KLCF_BRIDGE_W_ID(_comp) ((_comp)->physid) /* Widget ID */
+
+
+
+/*
+ * Generic info structure. This stores common info about a
+ * component.
+ */
+
+typedef struct klinfo_s { /* Generic info */
+ unsigned char struct_type; /* type of this structure */
+ unsigned char struct_version; /* version of this structure */
+ unsigned char flags; /* Enabled, disabled etc */
+ unsigned char revision; /* component revision */
+ unsigned short diagval; /* result of diagnostics */
+ unsigned short diagparm; /* diagnostic parameter */
+ unsigned char inventory; /* previous inventory status */
+ nic_t nic; /* MUst be aligned properly */
+ unsigned char physid; /* physical id of component */
+ unsigned int virtid; /* virtual id as seen by system */
+ unsigned char widid; /* Widget id - if applicable */
+ nasid_t nasid; /* node number - from parent */
+ char pad1; /* pad out structure. */
+ char pad2; /* pad out structure. */
+ COMPONENT *arcs_compt; /* ptr to the arcs struct for ease*/
+ klconf_off_t errinfo; /* component specific errors */
+ unsigned short pad3; /* pci fields have moved over to */
+ unsigned short pad4; /* klbri_t */
+} klinfo_t ;
+
+#define KLCONFIG_INFO_ENABLED(_i) ((_i)->flags & KLINFO_ENABLE)
+/*
+ * Component structures.
+ * Following are the currently identified components:
+ * CPU, HUB, MEM_BANK,
+ * XBOW(consists of 16 WIDGETs, each of which can be HUB or GRAPHICS or BRIDGE)
+ * BRIDGE, IOC3, SuperIO, SCSI, FDDI
+ * ROUTER
+ * GRAPHICS
+ */
+#define KLSTRUCT_UNKNOWN 0
+#define KLSTRUCT_CPU 1
+#define KLSTRUCT_HUB 2
+#define KLSTRUCT_MEMBNK 3
+#define KLSTRUCT_XBOW 4
+#define KLSTRUCT_BRI 5
+#define KLSTRUCT_IOC3 6
+#define KLSTRUCT_PCI 7
+#define KLSTRUCT_VME 8
+#define KLSTRUCT_ROU 9
+#define KLSTRUCT_GFX 10
+#define KLSTRUCT_SCSI 11
+#define KLSTRUCT_FDDI 12
+#define KLSTRUCT_MIO 13
+#define KLSTRUCT_DISK 14
+#define KLSTRUCT_TAPE 15
+#define KLSTRUCT_CDROM 16
+#define KLSTRUCT_HUB_UART 17
+#define KLSTRUCT_IOC3ENET 18
+#define KLSTRUCT_IOC3UART 19
+#define KLSTRUCT_UNUSED 20 /* XXX UNUSED */
+#define KLSTRUCT_IOC3PCKM 21
+#define KLSTRUCT_RAD 22
+#define KLSTRUCT_HUB_TTY 23
+#define KLSTRUCT_IOC3_TTY 24
+
+/* Early Access IO proms are compatible
+ only with KLSTRUCT values upto 24. */
+
+#define KLSTRUCT_FIBERCHANNEL 25
+#define KLSTRUCT_MOD_SERIAL_NUM 26
+#define KLSTRUCT_IOC3MS 27
+#define KLSTRUCT_TPU 28
+#define KLSTRUCT_GSN_A 29
+#define KLSTRUCT_GSN_B 30
+#define KLSTRUCT_XTHD 31
+
+/*
+ * These are the indices of various components within a lboard structure.
+ */
+
+#define IP27_CPU0_INDEX 0
+#define IP27_CPU1_INDEX 1
+#define IP27_HUB_INDEX 2
+#define IP27_MEM_INDEX 3
+
+#define BASEIO_BRIDGE_INDEX 0
+#define BASEIO_IOC3_INDEX 1
+#define BASEIO_SCSI1_INDEX 2
+#define BASEIO_SCSI2_INDEX 3
+
+#define MIDPLANE_XBOW_INDEX 0
+#define ROUTER_COMPONENT_INDEX 0
+
+#define CH4SCSI_BRIDGE_INDEX 0
+
+/* Info holders for various hardware components */
+
+typedef u64 *pci_t;
+typedef u64 *vmeb_t;
+typedef u64 *vmed_t;
+typedef u64 *fddi_t;
+typedef u64 *scsi_t;
+typedef u64 *mio_t;
+typedef u64 *graphics_t;
+typedef u64 *router_t;
+
+/*
+ * The port info in ip27_cfg area translates to a lboart_t in the
+ * KLCONFIG area. But since KLCONFIG does not use pointers, lboart_t
+ * is stored in terms of a nasid and a offset from start of KLCONFIG
+ * area on that nasid.
+ */
+typedef struct klport_s {
+ nasid_t port_nasid;
+ unsigned char port_flag;
+ klconf_off_t port_offset;
+} klport_t;
+
+#if 0
+/*
+ * This is very similar to the klport_s but instead of having a componant
+ * offset it has a board offset.
+ */
+typedef struct klxbow_port_s {
+ nasid_t port_nasid;
+ unsigned char port_flag;
+ klconf_off_t board_offset;
+} klxbow_port_t;
+#endif
+
+typedef struct klcpu_s { /* CPU */
+ klinfo_t cpu_info;
+ unsigned short cpu_prid; /* Processor PRID value */
+ unsigned short cpu_fpirr; /* FPU IRR value */
+ unsigned short cpu_speed; /* Speed in MHZ */
+ unsigned short cpu_scachesz; /* secondary cache size in MB */
+ unsigned short cpu_scachespeed;/* secondary cache speed in MHz */
+} klcpu_t ;
+
+#define CPU_STRUCT_VERSION 2
+
+typedef struct klhub_s { /* HUB */
+ klinfo_t hub_info;
+ uint hub_flags; /* PCFG_HUB_xxx flags */
+ klport_t hub_port; /* hub is connected to this */
+ nic_t hub_box_nic; /* nic of containing box */
+ klconf_off_t hub_mfg_nic; /* MFG NIC string */
+ u64 hub_speed; /* Speed of hub in HZ */
+} klhub_t ;
+
+typedef struct klhub_uart_s { /* HUB */
+ klinfo_t hubuart_info;
+ uint hubuart_flags; /* PCFG_HUB_xxx flags */
+ nic_t hubuart_box_nic; /* nic of containing box */
+} klhub_uart_t ;
+
+#define MEMORY_STRUCT_VERSION 2
+
+typedef struct klmembnk_s { /* MEMORY BANK */
+ klinfo_t membnk_info;
+ short membnk_memsz; /* Total memory in megabytes */
+ short membnk_dimm_select; /* bank to physical addr mapping*/
+ short membnk_bnksz[MD_MEM_BANKS]; /* Memory bank sizes */
+ short membnk_attr;
+} klmembnk_t ;
+
+#define KLCONFIG_MEMBNK_SIZE(_info, _bank) \
+ ((_info)->membnk_bnksz[(_bank)])
+
+
+#define MEMBNK_PREMIUM 1
+#define KLCONFIG_MEMBNK_PREMIUM(_info, _bank) \
+ ((_info)->membnk_attr & (MEMBNK_PREMIUM << (_bank)))
+
+#define MAX_SERIAL_NUM_SIZE 10
+
+typedef struct klmod_serial_num_s {
+ klinfo_t snum_info;
+ union {
+ char snum_str[MAX_SERIAL_NUM_SIZE];
+ unsigned long long snum_int;
+ } snum;
+} klmod_serial_num_t;
+
+/* Macros needed to access serial number structure in lboard_t.
+ Hard coded values are necessary since we cannot treat
+ serial number struct as a component without losing compatibility
+ between prom versions. */
+
+#define GET_SNUM_COMP(_l) ((klmod_serial_num_t *)\
+ KLCF_COMP(_l, _l->brd_numcompts))
+
+#define MAX_XBOW_LINKS 16
+
+typedef struct klxbow_s { /* XBOW */
+ klinfo_t xbow_info ;
+ klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */
+ int xbow_master_hub_link;
+ /* type of brd connected+component struct ptr+flags */
+} klxbow_t ;
+
+#define MAX_PCI_SLOTS 8
+
+typedef struct klpci_device_s {
+ s32 pci_device_id; /* 32 bits of vendor/device ID. */
+ s32 pci_device_pad; /* 32 bits of padding. */
+} klpci_device_t;
+
+#define BRIDGE_STRUCT_VERSION 2
+
+typedef struct klbri_s { /* BRIDGE */
+ klinfo_t bri_info ;
+ unsigned char bri_eprominfo ; /* IO6prom connected to bridge */
+ unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */
+ pci_t pci_specific ; /* PCI Board config info */
+ klpci_device_t bri_devices[MAX_PCI_DEVS] ; /* PCI IDs */
+ klconf_off_t bri_mfg_nic ;
+} klbri_t ;
+
+#define MAX_IOC3_TTY 2
+
+typedef struct klioc3_s { /* IOC3 */
+ klinfo_t ioc3_info ;
+ unsigned char ioc3_ssram ; /* Info about ssram */
+ unsigned char ioc3_nvram ; /* Info about nvram */
+ klinfo_t ioc3_superio ; /* Info about superio */
+ klconf_off_t ioc3_tty_off ;
+ klinfo_t ioc3_enet ;
+ klconf_off_t ioc3_enet_off ;
+ klconf_off_t ioc3_kbd_off ;
+} klioc3_t ;
+
+#define MAX_VME_SLOTS 8
+
+typedef struct klvmeb_s { /* VME BRIDGE - PCI CTLR */
+ klinfo_t vmeb_info ;
+ vmeb_t vmeb_specific ;
+ klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
+} klvmeb_t ;
+
+typedef struct klvmed_s { /* VME DEVICE - VME BOARD */
+ klinfo_t vmed_info ;
+ vmed_t vmed_specific ;
+ klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
+} klvmed_t ;
+
+#define ROUTER_VECTOR_VERS 2
+
+/* XXX - Don't we need the number of ports here?!? */
+typedef struct klrou_s { /* ROUTER */
+ klinfo_t rou_info ;
+ uint rou_flags ; /* PCFG_ROUTER_xxx flags */
+ nic_t rou_box_nic ; /* nic of the containing module */
+ klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */
+ klconf_off_t rou_mfg_nic ; /* MFG NIC string */
+ u64 rou_vector; /* vector from master node */
+} klrou_t ;
+
+/*
+ * Graphics Controller/Device
+ *
+ * (IP27/IO6) Prom versions 6.13 (and 6.5.1 kernels) and earlier
+ * used a couple different structures to store graphics information.
+ * For compatibility reasons, the newer data structure preserves some
+ * of the layout so that fields that are used in the old versions remain
+ * in the same place (with the same info). Determination of what version
+ * of this structure we have is done by checking the cookie field.
+ */
+#define KLGFX_COOKIE 0x0c0de000
+
+typedef struct klgfx_s { /* GRAPHICS Device */
+ klinfo_t gfx_info;
+ klconf_off_t old_gndevs; /* for compatibility with older proms */
+ klconf_off_t old_gdoff0; /* for compatibility with older proms */
+ uint cookie; /* for compatibility with older proms */
+ uint moduleslot;
+ struct klgfx_s *gfx_next_pipe;
+ graphics_t gfx_specific;
+ klconf_off_t pad0; /* for compatibility with older proms */
+ klconf_off_t gfx_mfg_nic;
+} klgfx_t;
+
+typedef struct klxthd_s {
+ klinfo_t xthd_info ;
+ klconf_off_t xthd_mfg_nic ; /* MFG NIC string */
+} klxthd_t ;
+
+typedef struct kltpu_s { /* TPU board */
+ klinfo_t tpu_info ;
+ klconf_off_t tpu_mfg_nic ; /* MFG NIC string */
+} kltpu_t ;
+
+typedef struct klgsn_s { /* GSN board */
+ klinfo_t gsn_info ;
+ klconf_off_t gsn_mfg_nic ; /* MFG NIC string */
+} klgsn_t ;
+
+#define MAX_SCSI_DEVS 16
+
+/*
+ * NOTE: THis is the max sized kl* structure and is used in klmalloc.c
+ * to allocate space of type COMPONENT. Make sure that if the size of
+ * any other component struct becomes more than this, then redefine
+ * that as the size to be klmalloced.
+ */
+
+typedef struct klscsi_s { /* SCSI Controller */
+ klinfo_t scsi_info ;
+ scsi_t scsi_specific ;
+ unsigned char scsi_numdevs ;
+ klconf_off_t scsi_devinfo[MAX_SCSI_DEVS] ;
+} klscsi_t ;
+
+typedef struct klscdev_s { /* SCSI device */
+ klinfo_t scdev_info ;
+ struct scsidisk_data *scdev_cfg ; /* driver fills up this */
+} klscdev_t ;
+
+typedef struct klttydev_s { /* TTY device */
+ klinfo_t ttydev_info ;
+ struct terminal_data *ttydev_cfg ; /* driver fills up this */
+} klttydev_t ;
+
+typedef struct klenetdev_s { /* ENET device */
+ klinfo_t enetdev_info ;
+ struct net_data *enetdev_cfg ; /* driver fills up this */
+} klenetdev_t ;
+
+typedef struct klkbddev_s { /* KBD device */
+ klinfo_t kbddev_info ;
+ struct keyboard_data *kbddev_cfg ; /* driver fills up this */
+} klkbddev_t ;
+
+typedef struct klmsdev_s { /* mouse device */
+ klinfo_t msdev_info ;
+ void *msdev_cfg ;
+} klmsdev_t ;
+
+#define MAX_FDDI_DEVS 10 /* XXX Is this true */
+
+typedef struct klfddi_s { /* FDDI */
+ klinfo_t fddi_info ;
+ fddi_t fddi_specific ;
+ klconf_off_t fddi_devinfo[MAX_FDDI_DEVS] ;
+} klfddi_t ;
+
+typedef struct klmio_s { /* MIO */
+ klinfo_t mio_info ;
+ mio_t mio_specific ;
+} klmio_t ;
+
+
+typedef union klcomp_s {
+ klcpu_t kc_cpu;
+ klhub_t kc_hub;
+ klmembnk_t kc_mem;
+ klxbow_t kc_xbow;
+ klbri_t kc_bri;
+ klioc3_t kc_ioc3;
+ klvmeb_t kc_vmeb;
+ klvmed_t kc_vmed;
+ klrou_t kc_rou;
+ klgfx_t kc_gfx;
+ klscsi_t kc_scsi;
+ klscdev_t kc_scsi_dev;
+ klfddi_t kc_fddi;
+ klmio_t kc_mio;
+ klmod_serial_num_t kc_snum ;
+} klcomp_t;
+
+typedef union kldev_s { /* for device structure allocation */
+ klscdev_t kc_scsi_dev ;
+ klttydev_t kc_tty_dev ;
+ klenetdev_t kc_enet_dev ;
+ klkbddev_t kc_kbd_dev ;
+} kldev_t ;
+
+/* Data structure interface routines. TBD */
+
+/* Include launch info in this file itself? TBD */
+
+/*
+ * TBD - Can the ARCS and device driver related info also be included in the
+ * KLCONFIG area. On the IO4PROM, prom device driver info is part of cfgnode_t
+ * structure, viz private to the IO4prom.
+ */
+
+/*
+ * TBD - Allocation issues.
+ *
+ * Do we need to Mark off sepatate heaps for lboard_t, rboard_t, component,
+ * errinfo and allocate from them, or have a single heap and allocate all
+ * structures from it. Debug is easier in the former method since we can
+ * dump all similar structs in one command, but there will be lots of holes,
+ * in memory and max limits are needed for number of structures.
+ * Another way to make it organized, is to have a union of all components
+ * and allocate a aligned chunk of memory greater than the biggest
+ * component.
+ */
+
+typedef union {
+ lboard_t *lbinfo ;
+} biptr_t ;
+
+
+#define BRI_PER_XBOW 6
+#define PCI_PER_BRI 8
+#define DEV_PER_PCI 16
+
+
+/* Virtual dipswitch values (starting from switch "7"): */
+
+#define VDS_NOGFX 0x8000 /* Don't enable gfx and autoboot */
+#define VDS_NOMP 0x100 /* Don't start slave processors */
+#define VDS_MANUMODE 0x80 /* Manufacturing mode */
+#define VDS_NOARB 0x40 /* No bootmaster arbitration */
+#define VDS_PODMODE 0x20 /* Go straight to POD mode */
+#define VDS_NO_DIAGS 0x10 /* Don't run any diags after BM arb */
+#define VDS_DEFAULTS 0x08 /* Use default environment values */
+#define VDS_NOMEMCLEAR 0x04 /* Don't run mem cfg code */
+#define VDS_2ND_IO4 0x02 /* Boot from the second IO4 */
+#define VDS_DEBUG_PROM 0x01 /* Print PROM debugging messages */
+
+/* external declarations of Linux kernel functions. */
+
+extern lboard_t *find_lboard(lboard_t *start, unsigned char type);
+extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
+extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
+extern klcpu_t *nasid_slice_to_cpuinfo(nasid_t, int);
+extern lboard_t *find_lboard_class(lboard_t *start, unsigned char brd_class);
+
+
+#if defined(CONFIG_SGI_IO)
+extern xwidgetnum_t nodevertex_widgetnum_get(vertex_hdl_t node_vtx);
+extern vertex_hdl_t nodevertex_xbow_peer_get(vertex_hdl_t node_vtx);
+extern lboard_t *find_gfxpipe(int pipenum);
+extern void setup_gfxpipe_link(vertex_hdl_t vhdl,int pipenum);
+extern lboard_t *find_lboard_module_class(lboard_t *start, moduleid_t mod,
+ unsigned char brd_class);
+extern lboard_t *find_nic_lboard(lboard_t *, nic_t);
+extern lboard_t *find_nic_type_lboard(nasid_t, unsigned char, nic_t);
+extern lboard_t *find_lboard_modslot(lboard_t *start, moduleid_t mod, slotid_t slot);
+extern lboard_t *find_lboard_module(lboard_t *start, moduleid_t mod);
+extern lboard_t *get_board_name(nasid_t nasid, moduleid_t mod, slotid_t slot, char *name);
+extern int config_find_nic_router(nasid_t, nic_t, lboard_t **, klrou_t**);
+extern int config_find_nic_hub(nasid_t, nic_t, lboard_t **, klhub_t**);
+extern int config_find_xbow(nasid_t, lboard_t **, klxbow_t**);
+extern klcpu_t *get_cpuinfo(cpuid_t cpu);
+extern int update_klcfg_cpuinfo(nasid_t, int);
+extern void board_to_path(lboard_t *brd, char *path);
+extern moduleid_t get_module_id(nasid_t nasid);
+extern void nic_name_convert(char *old_name, char *new_name);
+extern int module_brds(nasid_t nasid, lboard_t **module_brds, int n);
+extern lboard_t *brd_from_key(ulong_t key);
+extern void device_component_canonical_name_get(lboard_t *,klinfo_t *,
+ char *);
+extern int board_serial_number_get(lboard_t *,char *);
+extern int is_master_baseio(nasid_t,moduleid_t,slotid_t);
+extern nasid_t get_actual_nasid(lboard_t *brd) ;
+extern net_vec_t klcfg_discover_route(lboard_t *, lboard_t *, int);
+#else /* CONFIG_SGI_IO */
+extern klcpu_t *sn_get_cpuinfo(cpuid_t cpu);
+#endif /* CONFIG_SGI_IO */
+
+#endif /* _ASM_SN_KLCONFIG_H */
diff -Nru a/include/asm-mips/sn/kldir.h b/include/asm-mips/sn/kldir.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/kldir.h Sun Aug 3 13:14:47 2003
@@ -0,0 +1,248 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/kldir.h>, revision 1.21.
+ *
+ * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1999, 2000 by Ralf Baechle
+ */
+#ifndef _ASM_SN_KLDIR_H
+#define _ASM_SN_KLDIR_H
+
+#include <linux/config.h>
+
+#if defined(CONFIG_SGI_IO)
+#include <asm/hack.h>
+#endif
+
+/*
+ * The kldir memory area resides at a fixed place in each node's memory and
+ * provides pointers to most other IP27 memory areas. This allows us to
+ * resize and/or relocate memory areas at a later time without breaking all
+ * firmware and kernels that use them. Indices in the array are
+ * permanently dedicated to areas listed below. Some memory areas (marked
+ * below) reside at a permanently fixed location, but are included in the
+ * directory for completeness.
+ */
+
+#define KLDIR_MAGIC 0x434d5f53505f5357
+
+/*
+ * The upper portion of the memory map applies during boot
+ * only and is overwritten by IRIX/SYMMON.
+ *
+ * MEMORY MAP PER NODE
+ *
+ * 0x2000000 (32M) +-----------------------------------------+
+ * | IO6 BUFFERS FOR FLASH ENET IOC3 |
+ * 0x1F80000 (31.5M) +-----------------------------------------+
+ * | IO6 TEXT/DATA/BSS/stack |
+ * 0x1C00000 (30M) +-----------------------------------------+
+ * | IO6 PROM DEBUG TEXT/DATA/BSS/stack |
+ * 0x0800000 (28M) +-----------------------------------------+
+ * | IP27 PROM TEXT/DATA/BSS/stack |
+ * 0x1B00000 (27M) +-----------------------------------------+
+ * | IP27 CFG |
+ * 0x1A00000 (26M) +-----------------------------------------+
+ * | Graphics PROM |
+ * 0x1800000 (24M) +-----------------------------------------+
+ * | 3rd Party PROM drivers |
+ * 0x1600000 (22M) +-----------------------------------------+
+ * | |
+ * | Free |
+ * | |
+ * +-----------------------------------------+
+ * | UNIX DEBUG Version |
+ * 0x190000 (2M--) +-----------------------------------------+
+ * | SYMMON |
+ * | (For UNIX Debug only) |
+ * 0x34000 (208K) +-----------------------------------------+
+ * | SYMMON STACK [NUM_CPU_PER_NODE] |
+ * | (For UNIX Debug only) |
+ * 0x25000 (148K) +-----------------------------------------+
+ * | KLCONFIG - II (temp) |
+ * | |
+ * | ---------------------------- |
+ * | |
+ * | UNIX NON-DEBUG Version |
+ * 0x19000 (100K) +-----------------------------------------+
+ *
+ *
+ * The lower portion of the memory map contains information that is
+ * permanent and is used by the IP27PROM, IO6PROM and IRIX.
+ *
+ * 0x19000 (100K) +-----------------------------------------+
+ * | |
+ * | PI Error Spools (32K) |
+ * | |
+ * 0x12000 (72K) +-----------------------------------------+
+ * | Unused |
+ * 0x11c00 (71K) +-----------------------------------------+
+ * | CPU 1 NMI Eframe area |
+ * 0x11a00 (70.5K) +-----------------------------------------+
+ * | CPU 0 NMI Eframe area |
+ * 0x11800 (70K) +-----------------------------------------+
+ * | CPU 1 NMI Register save area |
+ * 0x11600 (69.5K) +-----------------------------------------+
+ * | CPU 0 NMI Register save area |
+ * 0x11400 (69K) +-----------------------------------------+
+ * | GDA (1k) |
+ * 0x11000 (68K) +-----------------------------------------+
+ * | Early cache Exception stack |
+ * | and/or |
+ * | kernel/io6prom nmi registers |
+ * 0x10800 (66k) +-----------------------------------------+
+ * | cache error eframe |
+ * 0x10400 (65K) +-----------------------------------------+
+ * | Exception Handlers (UALIAS copy) |
+ * 0x10000 (64K) +-----------------------------------------+
+ * | |
+ * | |
+ * | KLCONFIG - I (permanent) (48K) |
+ * | |
+ * | |
+ * | |
+ * 0x4000 (16K) +-----------------------------------------+
+ * | NMI Handler (Protected Page) |
+ * 0x3000 (12K) +-----------------------------------------+
+ * | ARCS PVECTORS (master node only) |
+ * 0x2c00 (11K) +-----------------------------------------+
+ * | ARCS TVECTORS (master node only) |
+ * 0x2800 (10K) +-----------------------------------------+
+ * | LAUNCH [NUM_CPU] |
+ * 0x2400 (9K) +-----------------------------------------+
+ * | Low memory directory (KLDIR) |
+ * 0x2000 (8K) +-----------------------------------------+
+ * | ARCS SPB (1K) |
+ * 0x1000 (4K) +-----------------------------------------+
+ * | Early cache Exception stack |
+ * | and/or |
+ * | kernel/io6prom nmi registers |
+ * 0x800 (2k) +-----------------------------------------+
+ * | cache error eframe |
+ * 0x400 (1K) +-----------------------------------------+
+ * | Exception Handlers |
+ * 0x0 (0K) +-----------------------------------------+
+ */
+
+#ifdef __ASSEMBLY__
+#define KLDIR_OFF_MAGIC 0x00
+#define KLDIR_OFF_OFFSET 0x08
+#define KLDIR_OFF_POINTER 0x10
+#define KLDIR_OFF_SIZE 0x18
+#define KLDIR_OFF_COUNT 0x20
+#define KLDIR_OFF_STRIDE 0x28
+#endif /* __ASSEMBLY__ */
+
+#if !defined(CONFIG_SGI_IO)
+
+/*
+ * This is defined here because IP27_SYMMON_STK_SIZE must be at least what
+ * we define here. Since it's set up in the prom. We can't redefine it later
+ * and expect more space to be allocated. The way to find out the true size
+ * of the symmon stacks is to divide SYMMON_STK_SIZE by SYMMON_STK_STRIDE
+ * for a particular node.
+ */
+#define SYMMON_STACK_SIZE 0x8000
+
+#if defined (PROM) || defined (SABLE)
+
+/*
+ * These defines are prom version dependent. No code other than the IP27
+ * prom should attempt to use these values.
+ */
+#define IP27_LAUNCH_OFFSET 0x2400
+#define IP27_LAUNCH_SIZE 0x400
+#define IP27_LAUNCH_COUNT 2
+#define IP27_LAUNCH_STRIDE 0x200
+
+#define IP27_KLCONFIG_OFFSET 0x4000
+#define IP27_KLCONFIG_SIZE 0xc000
+#define IP27_KLCONFIG_COUNT 1
+#define IP27_KLCONFIG_STRIDE 0
+
+#define IP27_NMI_OFFSET 0x3000
+#define IP27_NMI_SIZE 0x40
+#define IP27_NMI_COUNT 2
+#define IP27_NMI_STRIDE 0x40
+
+#define IP27_PI_ERROR_OFFSET 0x12000
+#define IP27_PI_ERROR_SIZE 0x4000
+#define IP27_PI_ERROR_COUNT 1
+#define IP27_PI_ERROR_STRIDE 0
+
+#define IP27_SYMMON_STK_OFFSET 0x25000
+#define IP27_SYMMON_STK_SIZE 0xe000
+#define IP27_SYMMON_STK_COUNT 2
+/* IP27_SYMMON_STK_STRIDE must be >= SYMMON_STACK_SIZE */
+#define IP27_SYMMON_STK_STRIDE 0x7000
+
+#define IP27_FREEMEM_OFFSET 0x19000
+#define IP27_FREEMEM_SIZE -1
+#define IP27_FREEMEM_COUNT 1
+#define IP27_FREEMEM_STRIDE 0
+
+#endif /* PROM || SABLE*/
+/*
+ * There will be only one of these in a partition so the IO6 must set it up.
+ */
+#define IO6_GDA_OFFSET 0x11000
+#define IO6_GDA_SIZE 0x400
+#define IO6_GDA_COUNT 1
+#define IO6_GDA_STRIDE 0
+
+/*
+ * save area of kernel nmi regs in the prom format
+ */
+#define IP27_NMI_KREGS_OFFSET 0x11400
+#define IP27_NMI_KREGS_CPU_SIZE 0x200
+/*
+ * save area of kernel nmi regs in eframe format
+ */
+#define IP27_NMI_EFRAME_OFFSET 0x11800
+#define IP27_NMI_EFRAME_SIZE 0x200
+
+#define KLDIR_ENT_SIZE 0x40
+#define KLDIR_MAX_ENTRIES (0x400 / 0x40)
+
+#endif /* !CONFIG_SGI_IO */
+
+#ifndef __ASSEMBLY__
+typedef struct kldir_ent_s {
+ u64 magic; /* Indicates validity of entry */
+ off_t offset; /* Offset from start of node space */
+#if defined(CONFIG_SGI_IO) /* FIXME */
+ __psunsigned_t pointer; /* Pointer to area in some cases */
+#else
+ unsigned long pointer; /* Pointer to area in some cases */
+#endif
+ size_t size; /* Size in bytes */
+ u64 count; /* Repeat count if array, 1 if not */
+ size_t stride; /* Stride if array, 0 if not */
+ char rsvd[16]; /* Pad entry to 0x40 bytes */
+ /* NOTE: These 16 bytes are used in the Partition KLDIR
+ entry to store partition info. Refer to klpart.h for this. */
+} kldir_ent_t;
+#endif /* !__ASSEMBLY__ */
+
+#if defined(CONFIG_SGI_IO)
+
+#define KLDIR_ENT_SIZE 0x40
+#define KLDIR_MAX_ENTRIES (0x400 / 0x40)
+
+/*
+ * The actual offsets of each memory area are machine-dependent
+ */
+#ifdef CONFIG_SGI_IP27
+// Not yet #include <asm/sn/sn0/kldir.h>
+#elif defined(CONFIG_SGI_IP35)
+#include <asm/sn/sn1/kldir.h>
+#else
+#error "kldir.h is currently defined for IP27 and IP35 platforms only"
+#endif
+
+#endif /* CONFIG_SGI_IO */
+
+#endif /* _ASM_SN_KLDIR_H */
diff -Nru a/include/asm-mips/sn/klkernvars.h b/include/asm-mips/sn/klkernvars.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/klkernvars.h Sun Aug 3 13:14:48 2003
@@ -0,0 +1,29 @@
+/*
+ * File ported from IRIX to Linux by Kanoj Sarcar, 06/08/00.
+ * Copyright 2000 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_SN_KLKERNVARS_H
+#define __ASM_SN_KLKERNVARS_H
+
+#define KV_MAGIC_OFFSET 0x0
+#define KV_RO_NASID_OFFSET 0x4
+#define KV_RW_NASID_OFFSET 0x6
+
+#define KV_MAGIC 0x5f4b565f
+
+#ifndef __ASSEMBLY__
+
+#include <asm/sn/types.h>
+
+typedef struct kern_vars_s {
+ int kv_magic;
+ nasid_t kv_ro_nasid;
+ nasid_t kv_rw_nasid;
+ unsigned long kv_ro_baseaddr;
+ unsigned long kv_rw_baseaddr;
+} kern_vars_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_SN_KLKERNVARS_H */
+
diff -Nru a/include/asm-mips/sn/launch.h b/include/asm-mips/sn/launch.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/launch.h Sun Aug 3 13:14:52 2003
@@ -0,0 +1,107 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2000 by Colin Ngam
+ */
+#ifndef _ASM_SN_LAUNCH_H
+#define _ASM_SN_LAUNCH_H
+
+#include <linux/config.h>
+#include <asm/sn/types.h>
+#include <asm/sn/addrs.h>
+
+/*
+ * The launch data structure resides at a fixed place in each node's memory
+ * and is used to communicate between the master processor and the slave
+ * processors.
+ *
+ * The master stores launch parameters in the launch structure
+ * corresponding to a target processor that is in a slave loop, then sends
+ * an interrupt to the slave processor. The slave calls the desired
+ * function, then returns to the slave loop. The master may poll or wait
+ * for the slaves to finish.
+ *
+ * There is an array of launch structures, one per CPU on the node. One
+ * interrupt level is used per local CPU.
+ */
+
+#define LAUNCH_MAGIC 0xaddbead2addbead3
+#ifdef CONFIG_SGI_IP27
+#define LAUNCH_SIZEOF 0x100
+#define LAUNCH_PADSZ 0xa0
+#endif
+
+#define LAUNCH_OFF_MAGIC 0x00 /* Struct offsets for assembly */
+#define LAUNCH_OFF_BUSY 0x08
+#define LAUNCH_OFF_CALL 0x10
+#define LAUNCH_OFF_CALLC 0x18
+#define LAUNCH_OFF_CALLPARM 0x20
+#define LAUNCH_OFF_STACK 0x28
+#define LAUNCH_OFF_GP 0x30
+#define LAUNCH_OFF_BEVUTLB 0x38
+#define LAUNCH_OFF_BEVNORMAL 0x40
+#define LAUNCH_OFF_BEVECC 0x48
+
+#define LAUNCH_STATE_DONE 0 /* Return value of LAUNCH_POLL */
+#define LAUNCH_STATE_SENT 1
+#define LAUNCH_STATE_RECD 2
+
+/*
+ * The launch routine is called only if the complement address is correct.
+ *
+ * Before control is transferred to a routine, the complement address
+ * is zeroed (invalidated) to prevent an accidental call from a spurious
+ * interrupt.
+ *
+ * The slave_launch routine turns on the BUSY flag, and the slave loop
+ * clears the BUSY flag after control is returned to it.
+ */
+
+#ifndef __ASSEMBLY__
+
+typedef int launch_state_t;
+typedef void (*launch_proc_t)(u64 call_parm);
+
+typedef struct launch_s {
+ volatile u64 magic; /* Magic number */
+ volatile u64 busy; /* Slave currently active */
+ volatile launch_proc_t call_addr; /* Func. for slave to call */
+ volatile u64 call_addr_c; /* 1's complement of call_addr*/
+ volatile u64 call_parm; /* Single parm passed to call*/
+ volatile void *stack_addr; /* Stack pointer for slave function */
+ volatile void *gp_addr; /* Global pointer for slave func. */
+ volatile char *bevutlb;/* Address of bev utlb ex handler */
+ volatile char *bevnormal;/*Address of bev normal ex handler */
+ volatile char *bevecc;/* Address of bev cache err handler */
+ volatile char pad[160]; /* Pad to LAUNCH_SIZEOF */
+} launch_t;
+
+/*
+ * PROM entry points for launch routines are determined by IPxxprom/start.s
+ */
+
+#define LAUNCH_SLAVE (*(void (*)(int nasid, int cpu, \
+ launch_proc_t call_addr, \
+ u64 call_parm, \
+ void *stack_addr, \
+ void *gp_addr)) \
+ IP27PROM_LAUNCHSLAVE)
+
+#define LAUNCH_WAIT (*(void (*)(int nasid, int cpu, int timeout_msec)) \
+ IP27PROM_WAITSLAVE)
+
+#define LAUNCH_POLL (*(launch_state_t (*)(int nasid, int cpu)) \
+ IP27PROM_POLLSLAVE)
+
+#define LAUNCH_LOOP (*(void (*)(void)) \
+ IP27PROM_SLAVELOOP)
+
+#define LAUNCH_FLASH (*(void (*)(void)) \
+ IP27PROM_FLASHLEDS)
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_SN_LAUNCH_H */
diff -Nru a/include/asm-mips/sn/mapped_kernel.h b/include/asm-mips/sn/mapped_kernel.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/mapped_kernel.h Sun Aug 3 13:14:48 2003
@@ -0,0 +1,55 @@
+/*
+ * File created by Kanoj Sarcar 06/06/00.
+ * Copyright 2000 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_SN_MAPPED_KERNEL_H
+#define __ASM_SN_MAPPED_KERNEL_H
+
+/*
+ * Note on how mapped kernels work: the text and data section is
+ * compiled at cksseg segment (LOADADDR = 0xc001c000), and the
+ * init/setup/data section gets a 16M virtual address bump in the
+ * ld.script file (so that tlblo0 and tlblo1 maps the sections).
+ * The vmlinux.64 section addresses are put in the xkseg range
+ * using the change-addresses makefile option. Use elfdump -of
+ * on IRIX to see where the sections go. The Origin loader loads
+ * the two sections contiguously in physical memory. The loader
+ * sets the entry point into kernel_entry using a xkphys address,
+ * but instead of using 0xa800000001160000, it uses the address
+ * 0xa800000000160000, which is where it physically loaded that
+ * code. So no jumps can be done before we have switched to using
+ * cksseg addresses.
+ */
+#include <linux/config.h>
+#include <asm/addrspace.h>
+
+#ifdef CONFIG_MAPPED_KERNEL
+
+#define MAPPED_ADDR_RO_TO_PHYS(x) (x - CKSSEG)
+#define MAPPED_ADDR_RW_TO_PHYS(x) (x - CKSSEG - 16777216)
+
+#define MAPPED_KERN_RO_PHYSBASE(n) \
+ (PLAT_NODE_DATA(n)->kern_vars.kv_ro_baseaddr)
+#define MAPPED_KERN_RW_PHYSBASE(n) \
+ (PLAT_NODE_DATA(n)->kern_vars.kv_rw_baseaddr)
+
+#define MAPPED_KERN_RO_TO_PHYS(x) \
+ ((unsigned long)MAPPED_ADDR_RO_TO_PHYS(x) | \
+ MAPPED_KERN_RO_PHYSBASE(get_compact_nodeid()))
+#define MAPPED_KERN_RW_TO_PHYS(x) \
+ ((unsigned long)MAPPED_ADDR_RW_TO_PHYS(x) | \
+ MAPPED_KERN_RW_PHYSBASE(get_compact_nodeid()))
+#define MAPPED_OFFSET 16777216
+
+#else /* CONFIG_MAPPED_KERNEL */
+
+#define MAPPED_KERN_RO_TO_PHYS(x) (x - CKSEG0)
+#define MAPPED_KERN_RW_TO_PHYS(x) (x - CKSEG0)
+#define MAPPED_OFFSET 0
+
+#endif /* CONFIG_MAPPED_KERNEL */
+
+#define MAPPED_KERN_RO_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RO_TO_PHYS(x))
+#define MAPPED_KERN_RW_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RW_TO_PHYS(x))
+
+#endif /* __ASM_SN_MAPPED_KERNEL_H */
diff -Nru a/include/asm-mips/sn/nmi.h b/include/asm-mips/sn/nmi.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/nmi.h Sun Aug 3 13:14:48 2003
@@ -0,0 +1,125 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_SN_NMI_H
+#define __ASM_SN_NMI_H
+
+#ident "$Revision: 1.5 $"
+
+#include <asm/sn/addrs.h>
+
+/*
+ * The launch data structure resides at a fixed place in each node's memory
+ * and is used to communicate between the master processor and the slave
+ * processors.
+ *
+ * The master stores launch parameters in the launch structure
+ * corresponding to a target processor that is in a slave loop, then sends
+ * an interrupt to the slave processor. The slave calls the desired
+ * function, followed by an optional rendezvous function, then returns to
+ * the slave loop. The master does not wait for the slaves before
+ * returning.
+ *
+ * There is an array of launch structures, one per CPU on the node. One
+ * interrupt level is used per CPU.
+ */
+
+#define NMI_MAGIC 0x48414d4d455201
+#define NMI_SIZEOF 0x40
+
+#define NMI_OFF_MAGIC 0x00 /* Struct offsets for assembly */
+#define NMI_OFF_FLAGS 0x08
+#define NMI_OFF_CALL 0x10
+#define NMI_OFF_CALLC 0x18
+#define NMI_OFF_CALLPARM 0x20
+#define NMI_OFF_GMASTER 0x28
+
+/*
+ * The NMI routine is called only if the complement address is
+ * correct.
+ *
+ * Before control is transferred to a routine, the complement address
+ * is zeroed (invalidated) to prevent an accidental call from a spurious
+ * interrupt.
+ *
+ */
+
+#ifndef __ASSEMBLY__
+
+typedef struct nmi_s {
+ volatile unsigned long magic; /* Magic number */
+ volatile unsigned long flags; /* Combination of flags above */
+ volatile void *call_addr; /* Routine for slave to call */
+ volatile void *call_addr_c; /* 1's complement of address */
+ volatile void *call_parm; /* Single parm passed to call */
+ volatile unsigned long gmaster; /* Flag true only on global master*/
+} nmi_t;
+
+#endif /* !__ASSEMBLY__ */
+
+/* Following definitions are needed both in the prom & the kernel
+ * to identify the format of the nmi cpu register save area in the
+ * low memory on each node.
+ */
+#ifndef __ASSEMBLY__
+
+struct reg_struct {
+ unsigned long gpr[32];
+ unsigned long sr;
+ unsigned long cause;
+ unsigned long epc;
+ unsigned long badva;
+ unsigned long error_epc;
+ unsigned long cache_err;
+ unsigned long nmi_sr;
+};
+
+#endif /* !__ASSEMBLY__ */
+
+/* These are the assembly language offsets into the reg_struct structure */
+
+#define R0_OFF 0x0
+#define R1_OFF 0x8
+#define R2_OFF 0x10
+#define R3_OFF 0x18
+#define R4_OFF 0x20
+#define R5_OFF 0x28
+#define R6_OFF 0x30
+#define R7_OFF 0x38
+#define R8_OFF 0x40
+#define R9_OFF 0x48
+#define R10_OFF 0x50
+#define R11_OFF 0x58
+#define R12_OFF 0x60
+#define R13_OFF 0x68
+#define R14_OFF 0x70
+#define R15_OFF 0x78
+#define R16_OFF 0x80
+#define R17_OFF 0x88
+#define R18_OFF 0x90
+#define R19_OFF 0x98
+#define R20_OFF 0xa0
+#define R21_OFF 0xa8
+#define R22_OFF 0xb0
+#define R23_OFF 0xb8
+#define R24_OFF 0xc0
+#define R25_OFF 0xc8
+#define R26_OFF 0xd0
+#define R27_OFF 0xd8
+#define R28_OFF 0xe0
+#define R29_OFF 0xe8
+#define R30_OFF 0xf0
+#define R31_OFF 0xf8
+#define SR_OFF 0x100
+#define CAUSE_OFF 0x108
+#define EPC_OFF 0x110
+#define BADVA_OFF 0x118
+#define ERROR_EPC_OFF 0x120
+#define CACHE_ERR_OFF 0x128
+#define NMISR_OFF 0x130
+
+#endif /* __ASM_SN_NMI_H */
diff -Nru a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/addrs.h Sun Aug 3 13:14:44 2003
@@ -0,0 +1,378 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/addrs.h>, revision 1.126.
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SN_SN0_ADDRS_H
+#define _ASM_SN_SN0_ADDRS_H
+
+#include <linux/config.h>
+
+/*
+ * SN0 (on a T5) Address map
+ *
+ * This file contains a set of definitions and macros which are used
+ * to reference into the major address spaces (CAC, HSPEC, IO, MSPEC,
+ * and UNCAC) used by the SN0 architecture. It also contains addresses
+ * for "major" statically locatable PROM/Kernel data structures, such as
+ * the partition table, the configuration data structure, etc.
+ * We make an implicit assumption that the processor using this file
+ * follows the R10K's provisions for specifying uncached attributes;
+ * should this change, the base registers may very well become processor-
+ * dependent.
+ *
+ * For more information on the address spaces, see the "Local Resources"
+ * chapter of the Hub specification.
+ *
+ * NOTE: This header file is included both by C and by assembler source
+ * files. Please bracket any language-dependent definitions
+ * appropriately.
+ */
+
+/*
+ * Some of the macros here need to be casted to appropriate types when used
+ * from C. They definitely must not be casted from assembly language so we
+ * use some new ANSI preprocessor stuff to paste these on where needed.
+ */
+
+#define CAC_BASE 0xa800000000000000
+
+#define HSPEC_BASE 0x9000000000000000
+#define IO_BASE 0x9200000000000000
+#define MSPEC_BASE 0x9400000000000000
+#define UNCAC_BASE 0x9600000000000000
+
+#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK))
+
+
+/*
+ * The following couple of definitions will eventually need to be variables,
+ * since the amount of address space assigned to each node depends on
+ * whether the system is running in N-mode (more nodes with less memory)
+ * or M-mode (fewer nodes with more memory). We expect that it will
+ * be a while before we need to make this decision dynamically, though,
+ * so for now we just use defines bracketed by an ifdef.
+ */
+
+#ifdef CONFIG_SGI_SN0_N_MODE
+
+#define NODE_SIZE_BITS 31
+#define BWIN_SIZE_BITS 28
+
+#define NASID_BITS 9
+#define NASID_BITMASK (0x1ffLL)
+#define NASID_SHFT 31
+#define NASID_META_BITS 5
+#define NASID_LOCAL_BITS 4
+
+#define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10)
+#define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3)
+
+#else /* !defined(CONFIG_SGI_SN0_N_MODE), assume that M-mode is desired */
+
+#define NODE_SIZE_BITS 32
+#define BWIN_SIZE_BITS 29
+
+#define NASID_BITMASK (0xffLL)
+#define NASID_BITS 8
+#define NASID_SHFT 32
+#define NASID_META_BITS 4
+#define NASID_LOCAL_BITS 4
+
+#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
+#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
+
+#endif /* !defined(CONFIG_SGI_SN0_N_MODE) */
+
+#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
+
+#define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT)
+#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \
+ NASID_SHFT) & NASID_BITMASK)
+
+#if !defined(__ASSEMBLY__) && !defined(_STANDALONE)
+
+#define NODE_SWIN_BASE(nasid, widget) \
+ ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \
+ : RAW_NODE_SWIN_BASE(nasid, widget))
+#else /* __ASSEMBLY__ || _STANDALONE */
+#define NODE_SWIN_BASE(nasid, widget) \
+ (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
+#endif /* __ASSEMBLY__ || _STANDALONE */
+
+/*
+ * The following definitions pertain to the IO special address
+ * space. They define the location of the big and little windows
+ * of any given node.
+ */
+
+#define BWIN_INDEX_BITS 3
+#define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS)
+#define BWIN_SIZEMASK (BWIN_SIZE - 1)
+#define BWIN_WIDGET_MASK 0x7
+#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE)
+#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \
+ (UINT64_CAST (bigwin) << BWIN_SIZE_BITS))
+
+#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK)
+#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
+/*
+ * Verify if addr belongs to large window address of node with "nasid"
+ *
+ *
+ * NOTE: "addr" is expected to be XKPHYS address, and NOT physical
+ * address
+ *
+ *
+ */
+
+#define NODE_BWIN_ADDR(nasid, addr) \
+ (((addr) >= NODE_BWIN_BASE0(nasid)) && \
+ ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \
+ BWIN_SIZE)))
+
+/*
+ * The following define the major position-independent aliases used
+ * in SN0.
+ * CALIAS -- Varies in size, points to the first n bytes of memory
+ * on the reader's node.
+ */
+
+#define CALIAS_BASE CAC_BASE
+
+
+
+#define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) \
+ ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
+
+#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid)))
+
+/* Turn on sable logging for the processors whose bits are set. */
+#ifdef SABLE
+#define SABLE_LOG_TRIGGER(_map) \
+ *((volatile hubreg_t *)(IO_BASE + 0x17ffff0)) = (_map)
+#else
+#define SABLE_LOG_TRIGGER(_map)
+#endif /* SABLE */
+
+#ifndef __ASSEMBLY__
+#define KERN_NMI_ADDR(nasid, slice) \
+ TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + \
+ (IP27_NMI_KREGS_CPU_SIZE * (slice)))
+#endif /* !__ASSEMBLY__ */
+
+#ifdef PROM
+
+#define MISC_PROM_BASE PHYS_TO_K0(0x01300000)
+#define MISC_PROM_SIZE 0x200000
+
+#define DIAG_BASE PHYS_TO_K0(0x01500000)
+#define DIAG_SIZE 0x300000
+
+#define ROUTE_BASE PHYS_TO_K0(0x01800000)
+#define ROUTE_SIZE 0x200000
+
+#define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000)
+#define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000)
+#define IP27PROM_CORP_MAX 32
+#define IP27PROM_CORP PHYS_TO_K0(0x01800000)
+#define IP27PROM_CORP_SIZE 0x10000
+#define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000)
+#define IP27PROM_CORP_STKSIZE 0x2000
+#define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000)
+#define IP27PROM_DECOMP_SIZE 0xfff00
+
+#define IP27PROM_BASE PHYS_TO_K0(0x01a00000)
+#define IP27PROM_BASE_MAPPED (K2BASE | 0x1fc00000)
+#define IP27PROM_SIZE_MAX 0x100000
+
+#define IP27PROM_PCFG PHYS_TO_K0(0x01b00000)
+#define IP27PROM_PCFG_SIZE 0xd0000
+#define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000)
+#define IP27PROM_ERRDMP_SIZE 0xf000
+
+#define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000)
+#define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000)
+#define IP27PROM_CONSOLE_SIZE 0x200
+#define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200)
+#define IP27PROM_NETUART_SIZE 0x100
+#define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300)
+#define IP27PROM_UNUSED1_SIZE 0x500
+#define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800)
+#define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00)
+#define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000)
+#define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000)
+#define IP27PROM_STACK_SHFT 16
+#define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT)
+#define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000)
+
+#define SLAVESTACK_BASE PHYS_TO_K0(0x01580000)
+#define SLAVESTACK_SIZE 0x40000
+
+#define ENETBUFS_BASE PHYS_TO_K0(0x01f80000)
+#define ENETBUFS_SIZE 0x20000
+
+#define IO6PROM_BASE PHYS_TO_K0(0x01c00000)
+#define IO6PROM_SIZE 0x400000
+#define IO6PROM_BASE_MAPPED (K2BASE | 0x11c00000)
+#define IO6DPROM_BASE PHYS_TO_K0(0x01c00000)
+#define IO6DPROM_SIZE 0x200000
+
+#define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000)
+#define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000)
+
+#define IP27PROM_INT_LAUNCH 10 /* and 11 */
+#define IP27PROM_INT_NETUART 12 /* through 17 */
+
+#endif /* PROM */
+
+/*
+ * needed by symmon so it needs to be outside #if PROM
+ */
+#define IP27PROM_ELSC_SHFT 10
+#define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT)
+
+/*
+ * This address is used by IO6PROM to build MemoryDescriptors of
+ * free memory. This address is important since unix gets loaded
+ * at this address, and this memory has to be FREE if unix is to
+ * be loaded.
+ */
+
+#define FREEMEM_BASE PHYS_TO_K0(0x2000000)
+
+#define IO6PROM_STACK_SHFT 14 /* stack per cpu */
+#define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT)
+
+/*
+ * IP27 PROM vectors
+ */
+
+#define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000)
+#define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008)
+#define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010)
+#define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018)
+#define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020)
+#define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028)
+#define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030)
+#define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038)
+#define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040)
+#define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048)
+
+#define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) /* base of UART regs */
+#define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) /* UART command reg */
+#define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) /* UART data reg */
+#define KL_I2C_REG MD_UREG0_0 /* I2C reg */
+
+#ifndef __ASSEMBLY__
+
+/* Address 0x400 to 0x1000 ualias points to cache error eframe + misc
+ * CACHE_ERR_SP_PTR could either contain an address to the stack, or
+ * the stack could start at CACHE_ERR_SP_PTR
+ */
+#if defined (HUB_ERR_STS_WAR)
+#define CACHE_ERR_EFRAME 0x480
+#else /* HUB_ERR_STS_WAR */
+#define CACHE_ERR_EFRAME 0x400
+#endif /* HUB_ERR_STS_WAR */
+
+#define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE)
+#define CACHE_ERR_SP_PTR (0x1000 - 32) /* why -32? TBD */
+#define CACHE_ERR_IBASE_PTR (0x1000 - 40)
+#define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16)
+#define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME)
+
+#endif /* !__ASSEMBLY__ */
+
+#define _ARCSPROM
+
+#ifdef _STANDALONE
+
+/*
+ * The PROM needs to pass the device base address and the
+ * device pci cfg space address to the device drivers during
+ * install. The COMPONENT->Key field is used for this purpose.
+ * Macros needed by SN0 device drivers to convert the
+ * COMPONENT->Key field to the respective base address.
+ * Key field looks as follows:
+ *
+ * +----------------------------------------------------+
+ * |devnasid | widget |pciid |hubwidid|hstnasid | adap |
+ * | 2 | 1 | 1 | 1 | 2 | 1 |
+ * +----------------------------------------------------+
+ * | | | | | | |
+ * 64 48 40 32 24 8 0
+ *
+ * These are used by standalone drivers till the io infrastructure
+ * is in place.
+ */
+
+#ifndef __ASSEMBLY__
+
+#define uchar unsigned char
+
+#define KEY_DEVNASID_SHFT 48
+#define KEY_WIDID_SHFT 40
+#define KEY_PCIID_SHFT 32
+#define KEY_HUBWID_SHFT 24
+#define KEY_HSTNASID_SHFT 8
+
+#define MK_SN0_KEY(nasid, widid, pciid) \
+ ((((__psunsigned_t)nasid)<< KEY_DEVNASID_SHFT |\
+ ((__psunsigned_t)widid) << KEY_WIDID_SHFT) |\
+ ((__psunsigned_t)pciid) << KEY_PCIID_SHFT)
+
+#define ADD_HUBWID_KEY(key,hubwid)\
+ (key|=((__psunsigned_t)hubwid << KEY_HUBWID_SHFT))
+
+#define ADD_HSTNASID_KEY(key,hstnasid)\
+ (key|=((__psunsigned_t)hstnasid << KEY_HSTNASID_SHFT))
+
+#define GET_DEVNASID_FROM_KEY(key) ((short)(key >> KEY_DEVNASID_SHFT))
+#define GET_WIDID_FROM_KEY(key) ((uchar)(key >> KEY_WIDID_SHFT))
+#define GET_PCIID_FROM_KEY(key) ((uchar)(key >> KEY_PCIID_SHFT))
+#define GET_HUBWID_FROM_KEY(key) ((uchar)(key >> KEY_HUBWID_SHFT))
+#define GET_HSTNASID_FROM_KEY(key) ((short)(key >> KEY_HSTNASID_SHFT))
+
+#define PCI_64_TARGID_SHFT 60
+
+#define GET_PCIBASE_FROM_KEY(key) (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
+ GET_WIDID_FROM_KEY(key))\
+ | BRIDGE_DEVIO(GET_PCIID_FROM_KEY(key)))
+
+#define GET_PCICFGBASE_FROM_KEY(key) \
+ (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
+ GET_WIDID_FROM_KEY(key))\
+ | BRIDGE_TYPE0_CFG_DEV(GET_PCIID_FROM_KEY(key)))
+
+#define GET_WIDBASE_FROM_KEY(key) \
+ (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
+ GET_WIDID_FROM_KEY(key)))
+
+#define PUT_INSTALL_STATUS(c,s) c->Revision = s
+#define GET_INSTALL_STATUS(c) c->Revision
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _STANDALONE */
+
+#if defined (HUB_ERR_STS_WAR)
+
+#define ERR_STS_WAR_REGISTER IIO_IIBUSERR
+#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR)
+#define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR)
+ /* Used to match addr in error reg. */
+#define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100)
+
+#endif /* HUB_ERR_STS_WAR */
+
+#endif /* _ASM_SN_SN0_ADDRS_H */
diff -Nru a/include/asm-mips/sn/sn0/arch.h b/include/asm-mips/sn/sn0/arch.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/arch.h Sun Aug 3 13:14:48 2003
@@ -0,0 +1,85 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SGI IP27 specific setup.
+ *
+ * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_SN_SN0_ARCH_H
+#define _ASM_SN_SN0_ARCH_H
+
+#include <linux/config.h>
+
+#ifndef SABLE
+
+#ifndef SN0XXL /* 128 cpu SMP max */
+/*
+ * This is the maximum number of nodes that can be part of a kernel.
+ * Effectively, it's the maximum number of compact node ids (cnodeid_t).
+ */
+#define MAX_COMPACT_NODES 64
+
+/*
+ * MAXCPUS refers to the maximum number of CPUs in a single kernel.
+ * This is not necessarily the same as MAXNODES * CPUS_PER_NODE
+ */
+#define MAXCPUS 128
+
+#else /* SN0XXL system */
+
+#define MAX_COMPACT_NODES 128
+#define MAXCPUS 256
+
+#endif /* SN0XXL */
+
+/*
+ * This is the maximum number of NASIDS that can be present in a system.
+ * (Highest NASID plus one.)
+ */
+#define MAX_NASIDS 256
+
+/*
+ * MAX_REGIONS refers to the maximum number of hardware partitioned regions.
+ */
+#define MAX_REGIONS 64
+#define MAX_NONPREMIUM_REGIONS 16
+#define MAX_PREMIUM_REGIONS MAX_REGIONS
+
+/*
+ * MAX_PARITIONS refers to the maximum number of logically defined
+ * partitions the system can support.
+ */
+#define MAX_PARTITIONS MAX_REGIONS
+
+
+#else
+
+#define MAX_COMPACT_NODES 4
+#define MAX_NASIDS 4
+#define MAXCPUS 8
+
+#endif
+
+#define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8)
+
+/*
+ * Slot constants for SN0
+ */
+#ifdef CONFIG_SGI_SN0_N_MODE
+#define MAX_MEM_SLOTS 16 /* max slots per node */
+#else /* !CONFIG_SGI_SN0_N_MODE, assume M_MODE */
+#define MAX_MEM_SLOTS 32 /* max slots per node */
+#endif /* defined(N_MODE) */
+
+#if SABLE_RTL
+#define SLOT_SHIFT (28)
+#define SLOT_MIN_MEM_SIZE (16*1024*1024)
+#else
+#define SLOT_SHIFT (27)
+#define SLOT_MIN_MEM_SIZE (32*1024*1024)
+#endif
+
+#endif /* _ASM_SN_SN0_ARCH_H */
diff -Nru a/include/asm-mips/sn/sn0/hub.h b/include/asm-mips/sn/sn0/hub.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/hub.h Sun Aug 3 13:14:50 2003
@@ -0,0 +1,44 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SN_SN0_HUB_H
+#define _ASM_SN_SN0_HUB_H
+
+/* The secret password; used to release protection */
+#define HUB_PASSWORD 0x53474972756c6573ull
+
+#define CHIPID_HUB 0
+#define CHIPID_ROUTER 1
+
+#define HUB_REV_1_0 1
+#define HUB_REV_2_0 2
+#define HUB_REV_2_1 3
+#define HUB_REV_2_2 4
+#define HUB_REV_2_3 5
+#define HUB_REV_2_4 6
+
+#define MAX_HUB_PATH 80
+
+#include <asm/sn/sn0/addrs.h>
+#include <asm/sn/sn0/hubpi.h>
+#include <asm/sn/sn0/hubmd.h>
+#include <asm/sn/sn0/hubio.h>
+#include <asm/sn/sn0/hubni.h>
+//#include <asm/sn/sn0/hubcore.h>
+
+#ifdef SABLE
+#define IP27_NO_HUBUART_INT 1
+#endif
+
+/* Translation of uncached attributes */
+#define UATTR_HSPEC 0
+#define UATTR_IO 1
+#define UATTR_MSPEC 2
+#define UATTR_UNCAC 3
+
+#endif /* _ASM_SN_SN0_HUB_H */
diff -Nru a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/hubio.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,986 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/hubio.h>, Revision 1.80.
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SGI_SN_SN0_HUBIO_H
+#define _ASM_SGI_SN_SN0_HUBIO_H
+
+/*
+ * Hub I/O interface registers
+ *
+ * All registers in this file are subject to change until Hub chip tapeout.
+ * In general, the longer software name should be used when available.
+ */
+
+/*
+ * Slightly friendlier names for some common registers.
+ * The hardware definitions follow.
+ */
+#define IIO_WIDGET IIO_WID /* Widget identification */
+#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
+#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
+#define IIO_WIDGET_TOUT IIO_WRTO /* Widget request timeout */
+#define IIO_WIDGET_FLUSH IIO_WTFR /* Widget target flush */
+#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
+#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
+#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
+#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
+#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
+#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
+#define IIO_LLP_LOG IIO_ILLR /* LLP log */
+#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/
+#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
+#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
+#define IIO_BTE_CRB_CNT IIO_IBCN /* IO BTE CRB count */
+
+#define IIO_LLP_CSR_IS_UP 0x00002000
+#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
+#define IIO_LLP_CSR_LLP_STAT_SHFT 12
+
+/* key to IIO_PROTECT_OVRRD */
+#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
+
+/* BTE register names */
+#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
+#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
+#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
+#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
+#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
+#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
+#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
+#define IIO_BTE_OFF_1 IIO_IBLS_1 - IIO_IBLS_0 /* Offset from base to BTE 1 */
+
+/* BTE register offsets from base */
+#define BTEOFF_STAT 0
+#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
+#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
+#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
+#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
+#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
+
+
+/*
+ * The following definitions use the names defined in the IO interface
+ * document for ease of reference. When possible, software should
+ * generally use the longer but clearer names defined above.
+ */
+
+#define IIO_BASE 0x400000
+#define IIO_BASE_BTE0 0x410000
+#define IIO_BASE_BTE1 0x420000
+#define IIO_BASE_PERF 0x430000
+#define IIO_PERF_CNT 0x430008
+
+#define IO_PERF_SETS 32
+
+#define IIO_WID 0x400000 /* Widget identification */
+#define IIO_WSTAT 0x400008 /* Widget status */
+#define IIO_WCR 0x400020 /* Widget control */
+
+#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
+#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
+#define IIO_WSTAT_TXRETRY_MASK (0x7F)
+#define IIO_WSTAT_TXRETRY_SHFT (16)
+#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
+ IIO_WSTAT_TXRETRY_MASK)
+
+#define IIO_ILAPR 0x400100 /* Local Access Protection */
+#define IIO_ILAPO 0x400108 /* Protection override */
+#define IIO_IOWA 0x400110 /* outbound widget access */
+#define IIO_IIWA 0x400118 /* inbound widget access */
+#define IIO_IIDEM 0x400120 /* Inbound Device Error Mask */
+#define IIO_ILCSR 0x400128 /* LLP control and status */
+#define IIO_ILLR 0x400130 /* LLP Log */
+#define IIO_IIDSR 0x400138 /* Interrupt destination */
+
+#define IIO_IIBUSERR 0x1400208 /* Reads here cause a bus error. */
+
+/* IO Interrupt Destination Register */
+#define IIO_IIDSR_SENT_SHIFT 28
+#define IIO_IIDSR_SENT_MASK 0x10000000
+#define IIO_IIDSR_ENB_SHIFT 24
+#define IIO_IIDSR_ENB_MASK 0x01000000
+#define IIO_IIDSR_NODE_SHIFT 8
+#define IIO_IIDSR_NODE_MASK 0x0000ff00
+#define IIO_IIDSR_LVL_SHIFT 0
+#define IIO_IIDSR_LVL_MASK 0x0000003f
+
+
+/* GFX Flow Control Node/Widget Register */
+#define IIO_IGFX_0 0x400140 /* gfx node/widget register 0 */
+#define IIO_IGFX_1 0x400148 /* gfx node/widget register 1 */
+#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */
+#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1)
+#define IIO_IGFX_W_NUM_SHIFT 0
+#define IIO_IGFX_N_NUM_BITS 9 /* size of node num field */
+#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1)
+#define IIO_IGFX_N_NUM_SHIFT 4
+#define IIO_IGFX_P_NUM_BITS 1 /* size of processor num field */
+#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1)
+#define IIO_IGFX_P_NUM_SHIFT 16
+#define IIO_IGFX_VLD_BITS 1 /* size of valid field */
+#define IIO_IGFX_VLD_MASK ((1<<IIO_IGFX_VLD_BITS)-1)
+#define IIO_IGFX_VLD_SHIFT 20
+#define IIO_IGFX_INIT(widget, node, cpu, valid) (\
+ (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | \
+ (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | \
+ (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT) | \
+ (((valid) & IIO_IGFX_VLD_MASK) << IIO_IGFX_VLD_SHIFT) )
+
+/* Scratch registers (not all bits available) */
+#define IIO_SCRATCH_REG0 0x400150
+#define IIO_SCRATCH_REG1 0x400158
+#define IIO_SCRATCH_MASK 0x0000000f00f11fff
+
+#define IIO_SCRATCH_BIT0_0 0x0000000800000000
+#define IIO_SCRATCH_BIT0_1 0x0000000400000000
+#define IIO_SCRATCH_BIT0_2 0x0000000200000000
+#define IIO_SCRATCH_BIT0_3 0x0000000100000000
+#define IIO_SCRATCH_BIT0_4 0x0000000000800000
+#define IIO_SCRATCH_BIT0_5 0x0000000000400000
+#define IIO_SCRATCH_BIT0_6 0x0000000000200000
+#define IIO_SCRATCH_BIT0_7 0x0000000000100000
+#define IIO_SCRATCH_BIT0_8 0x0000000000010000
+#define IIO_SCRATCH_BIT0_9 0x0000000000001000
+#define IIO_SCRATCH_BIT0_R 0x0000000000000fff
+
+/* IO Translation Table Entries */
+#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
+ /* Hw manuals number them 1..7! */
+
+/*
+ * As a permanent workaround for a bug in the PI side of the hub, we've
+ * redefined big window 7 as small window 0.
+ */
+#define HUB_NUM_BIG_WINDOW IIO_NUM_ITTES - 1
+
+/*
+ * Use the top big window as a surrogate for the first small window
+ */
+#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW
+
+#define ILCSR_WARM_RESET 0x100
+/*
+ * The IO LLP control status register and widget control register
+ */
+#ifndef __ASSEMBLY__
+
+typedef union hubii_wid_u {
+ u64 wid_reg_value;
+ struct {
+ u64 wid_rsvd: 32, /* unused */
+ wid_rev_num: 4, /* revision number */
+ wid_part_num: 16, /* the widget type: hub=c101 */
+ wid_mfg_num: 11, /* Manufacturer id (IBM) */
+ wid_rsvd1: 1; /* Reserved */
+ } wid_fields_s;
+} hubii_wid_t;
+
+
+typedef union hubii_wcr_u {
+ u64 wcr_reg_value;
+ struct {
+ u64 wcr_rsvd: 41, /* unused */
+ wcr_e_thresh: 5, /* elasticity threshold */
+ wcr_dir_con: 1, /* widget direct connect */
+ wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
+ wcr_xbar_crd: 3, /* LLP crossbar credit */
+ wcr_rsvd1: 8, /* Reserved */
+ wcr_tag_mode: 1, /* Tag mode */
+ wcr_widget_id: 4; /* LLP crossbar credit */
+ } wcr_fields_s;
+} hubii_wcr_t;
+
+#define iwcr_dir_con wcr_fields_s.wcr_dir_con
+
+typedef union hubii_wstat_u {
+ u64 reg_value;
+ struct {
+ u64 rsvd1: 31,
+ crazy: 1, /* Crazy bit */
+ rsvd2: 8,
+ llp_tx_cnt: 8, /* LLP Xmit retry counter */
+ rsvd3: 6,
+ tx_max_rtry: 1, /* LLP Retry Timeout Signal */
+ rsvd4: 2,
+ xt_tail_to: 1, /* Xtalk Tail Timeout */
+ xt_crd_to: 1, /* Xtalk Credit Timeout */
+ pending: 4; /* Pending Requests */
+ } wstat_fields_s;
+} hubii_wstat_t;
+
+
+typedef union hubii_ilcsr_u {
+ u64 icsr_reg_value;
+ struct {
+ u64 icsr_rsvd: 22, /* unused */
+ icsr_max_burst: 10, /* max burst */
+ icsr_rsvd4: 6, /* reserved */
+ icsr_max_retry: 10, /* max retry */
+ icsr_rsvd3: 2, /* reserved */
+ icsr_lnk_stat: 2, /* link status */
+ icsr_bm8: 1, /* Bit mode 8 */
+ icsr_llp_en: 1, /* LLP enable bit */
+ icsr_rsvd2: 1, /* reserver */
+ icsr_wrm_reset: 1, /* Warm reset bit */
+ icsr_rsvd1: 2, /* Data ready offset */
+ icsr_null_to: 6; /* Null timeout */
+
+ } icsr_fields_s;
+} hubii_ilcsr_t;
+
+
+typedef union hubii_iowa_u {
+ u64 iowa_reg_value;
+ struct {
+ u64 iowa_rsvd: 48, /* unused */
+ iowa_wxoac: 8, /* xtalk widget access bits */
+ iowa_rsvd1: 7, /* xtalk widget access bits */
+ iowa_w0oac: 1; /* xtalk widget access bits */
+ } iowa_fields_s;
+} hubii_iowa_t;
+
+typedef union hubii_iiwa_u {
+ u64 iiwa_reg_value;
+ struct {
+ u64 iiwa_rsvd: 48, /* unused */
+ iiwa_wxiac: 8, /* hub wid access bits */
+ iiwa_rsvd1: 7, /* reserved */
+ iiwa_w0iac: 1; /* hub wid0 access */
+ } iiwa_fields_s;
+} hubii_iiwa_t;
+
+typedef union hubii_illr_u {
+ u64 illr_reg_value;
+ struct {
+ u64 illr_rsvd: 32, /* unused */
+ illr_cb_cnt: 16, /* checkbit error count */
+ illr_sn_cnt: 16; /* sequence number count */
+ } illr_fields_s;
+} hubii_illr_t;
+
+/* The structures below are defined to extract and modify the ii
+performance registers */
+
+/* io_perf_sel allows the caller to specify what tests will be
+ performed */
+typedef union io_perf_sel {
+ u64 perf_sel_reg;
+ struct {
+ u64 perf_rsvd : 48,
+ perf_icct : 8,
+ perf_ippr1 : 4,
+ perf_ippr0 : 4;
+ } perf_sel_bits;
+} io_perf_sel_t;
+
+/* io_perf_cnt is to extract the count from the hub registers. Due to
+ hardware problems there is only one counter, not two. */
+
+typedef union io_perf_cnt {
+ u64 perf_cnt;
+ struct {
+ u64 perf_rsvd1 : 32,
+ perf_rsvd2 : 12,
+ perf_cnt : 20;
+ } perf_cnt_bits;
+} io_perf_cnt_t;
+
+#endif /* !__ASSEMBLY__ */
+
+
+#define LNK_STAT_WORKING 0x2
+
+#define IIO_LLP_CB_MAX 0xffff
+#define IIO_LLP_SN_MAX 0xffff
+
+/* IO PRB Entries */
+#define IIO_NUM_IPRBS (9)
+#define IIO_IOPRB_0 0x400198 /* PRB entry 0 */
+#define IIO_IOPRB_8 0x4001a0 /* PRB entry 8 */
+#define IIO_IOPRB_9 0x4001a8 /* PRB entry 9 */
+#define IIO_IOPRB_A 0x4001b0 /* PRB entry a */
+#define IIO_IOPRB_B 0x4001b8 /* PRB entry b */
+#define IIO_IOPRB_C 0x4001c0 /* PRB entry c */
+#define IIO_IOPRB_D 0x4001c8 /* PRB entry d */
+#define IIO_IOPRB_E 0x4001d0 /* PRB entry e */
+#define IIO_IOPRB_F 0x4001d8 /* PRB entry f */
+
+
+#define IIO_IXCC 0x4001e0 /* Crosstalk credit count timeout */
+#define IIO_IXTCC IIO_IXCC
+#define IIO_IMEM 0x4001e8 /* Miscellaneous Enable Mask */
+#define IIO_IXTT 0x4001f0 /* Crosstalk tail timeout */
+#define IIO_IECLR 0x4001f8 /* IO error clear */
+#define IIO_IBCN 0x400200 /* IO BTE CRB count */
+
+/*
+ * IIO_IMEM Register fields.
+ */
+#define IIO_IMEM_W0ESD 0x1 /* Widget 0 shut down due to error */
+#define IIO_IMEM_B0ESD (1 << 4) /* BTE 0 shut down due to error */
+#define IIO_IMEM_B1ESD (1 << 8) /* BTE 1 Shut down due to error */
+
+/* PIO Read address Table Entries */
+#define IIO_IPCA 0x400300 /* PRB Counter adjust */
+#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */
+#define IIO_PRTE_0 0x400308 /* PIO Read address table entry 0 */
+#define IIO_PRTE(_x) (IIO_PRTE_0 + (8 * (_x)))
+#define IIO_WIDPRTE(x) IIO_PRTE(((x) - 8)) /* widget ID to its PRTE num */
+#define IIO_IPDR 0x400388 /* PIO table entry deallocation */
+#define IIO_ICDR 0x400390 /* CRB Entry Deallocation */
+#define IIO_IFDR 0x400398 /* IOQ FIFO Depth */
+#define IIO_IIAP 0x4003a0 /* IIQ Arbitration Parameters */
+#define IIO_IMMR IIO_IIAP
+#define IIO_ICMR 0x4003a8 /* CRB Managment Register */
+#define IIO_ICCR 0x4003b0 /* CRB Control Register */
+#define IIO_ICTO 0x4003b8 /* CRB Time Out Register */
+#define IIO_ICTP 0x4003c0 /* CRB Time Out Prescalar */
+
+
+/*
+ * ICMR register fields
+ */
+#define IIO_ICMR_PC_VLD_SHFT 36
+#define IIO_ICMR_PC_VLD_MASK (0x7fffUL << IIO_ICMR_PC_VLD_SHFT)
+
+#define IIO_ICMR_CRB_VLD_SHFT 20
+#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
+
+#define IIO_ICMR_FC_CNT_SHFT 16
+#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
+
+#define IIO_ICMR_C_CNT_SHFT 4
+#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
+
+#define IIO_ICMR_P_CNT_SHFT 0
+#define IIO_ICMR_P_CNT_MASK (0xf << IIO_ICMR_P_CNT_SHFT)
+
+#define IIO_ICMR_PRECISE (1UL << 52)
+#define IIO_ICMR_CLR_RPPD (1UL << 13)
+#define IIO_ICMR_CLR_RQPD (1UL << 12)
+
+/*
+ * IIO PIO Deallocation register field masks : (IIO_IPDR)
+ */
+#define IIO_IPDR_PND (1 << 4)
+
+/*
+ * IIO CRB deallocation register field masks: (IIO_ICDR)
+ */
+#define IIO_ICDR_PND (1 << 4)
+
+/*
+ * IIO CRB control register Fields: IIO_ICCR
+ */
+#define IIO_ICCR_PENDING (0x10000)
+#define IIO_ICCR_CMD_MASK (0xFF)
+#define IIO_ICCR_CMD_SHFT (7)
+#define IIO_ICCR_CMD_NOP (0x0) /* No Op */
+#define IIO_ICCR_CMD_WAKE (0x100) /* Reactivate CRB entry and process */
+#define IIO_ICCR_CMD_TIMEOUT (0x200) /* Make CRB timeout & mark invalid */
+#define IIO_ICCR_CMD_EJECT (0x400) /* Contents of entry written to memory
+ * via a WB
+ */
+#define IIO_ICCR_CMD_FLUSH (0x800)
+
+/*
+ * CRB manipulation macros
+ * The CRB macros are slightly complicated, since there are up to
+ * four registers associated with each CRB entry.
+ */
+#define IIO_NUM_CRBS 15 /* Number of CRBs */
+#define IIO_NUM_NORMAL_CRBS 12 /* Number of regular CRB entries */
+#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
+#define IIO_ICRB_OFFSET 8
+#define IIO_ICRB_0 0x400400
+/* XXX - This is now tuneable:
+ #define IIO_FIRST_PC_ENTRY 12
+ */
+
+#define IIO_ICRB_A(_x) (IIO_ICRB_0 + (4 * IIO_ICRB_OFFSET * (_x)))
+#define IIO_ICRB_B(_x) (IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET)
+#define IIO_ICRB_C(_x) (IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET)
+#define IIO_ICRB_D(_x) (IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET)
+
+/* XXX - IBUE register coming for Hub 2 */
+
+/*
+ *
+ * CRB Register description.
+ *
+ * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
+ * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
+ * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
+ * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
+ * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
+ *
+ * Many of the fields in CRB are status bits used by hardware
+ * for implementation of the protocol. It's very dangerous to
+ * mess around with the CRB registers.
+ *
+ * It's OK to read the CRB registers and try to make sense out of the
+ * fields in CRB.
+ *
+ * Updating CRB requires all activities in Hub IIO to be quiesced.
+ * otherwise, a write to CRB could corrupt other CRB entries.
+ * CRBs are here only as a back door peek to hub IIO's status.
+ * Quiescing implies no dmas no PIOs
+ * either directly from the cpu or from sn0net.
+ * this is not something that can be done easily. So, AVOID updating
+ * CRBs.
+ */
+
+/*
+ * Fields in CRB Register A
+ */
+#ifndef __ASSEMBLY__
+typedef union icrba_u {
+ u64 reg_value;
+ struct {
+ u64 resvd: 6,
+ stall_bte0: 1, /* Stall BTE 0 */
+ stall_bte1: 1, /* Stall BTE 1 */
+ error: 1, /* CRB has an error */
+ ecode: 3, /* Error Code */
+ lnetuce: 1, /* SN0net Uncorrectable error */
+ mark: 1, /* CRB Has been marked */
+ xerr: 1, /* Error bit set in xtalk header */
+ sidn: 4, /* SIDN field from xtalk */
+ tnum: 5, /* TNUM field in xtalk */
+ addr: 38, /* Address of request */
+ valid: 1, /* Valid status */
+ iow: 1; /* IO Write operation */
+ } icrba_fields_s;
+} icrba_t;
+
+/* This is an alternate typedef for the HUB1 CRB A in order to allow
+ runtime selection of the format based on the REV_ID field of the
+ NI_STATUS_REV_ID register. */
+typedef union h1_icrba_u {
+ u64 reg_value;
+
+ struct {
+ u64 resvd: 6,
+ unused: 1, /* Unused but RW!! */
+ error: 1, /* CRB has an error */
+ ecode: 4, /* Error Code */
+ lnetuce: 1, /* SN0net Uncorrectable error */
+ mark: 1, /* CRB Has been marked */
+ xerr: 1, /* Error bit set in xtalk header */
+ sidn: 4, /* SIDN field from xtalk */
+ tnum: 5, /* TNUM field in xtalk */
+ addr: 38, /* Address of request */
+ valid: 1, /* Valid status */
+ iow: 1; /* IO Write operation */
+ } h1_icrba_fields_s;
+} h1_icrba_t;
+
+/* XXX - Is this still right? Check the spec. */
+#define ICRBN_A_CERR_SHFT 54
+#define ICRBN_A_ERR_MASK 0x3ff
+
+/*
+ * Easy access macros.
+ */
+#define a_error icrba_fields_s.error
+#define a_ecode icrba_fields_s.ecode
+#define a_lnetuce icrba_fields_s.lnetuce
+#define a_mark icrba_fields_s.mark
+#define a_xerr icrba_fields_s.xerr
+#define a_sidn icrba_fields_s.sidn
+#define a_tnum icrba_fields_s.tnum
+#define a_addr icrba_fields_s.addr
+#define a_valid icrba_fields_s.valid
+#define a_iow icrba_fields_s.iow
+
+#endif /* !__ASSEMBLY__ */
+
+#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
+
+/*
+ * values for "ecode" field
+ */
+#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
+#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
+#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
+ * e.g. WINV to a Read only line.
+ */
+#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
+#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
+#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
+#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
+#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
+
+
+
+/*
+ * Fields in CRB Register B
+ */
+#ifndef __ASSEMBLY__
+typedef union icrbb_u {
+ u64 reg_value;
+ struct {
+ u64 rsvd1: 5,
+ btenum: 1, /* BTE to which entry belongs to */
+ cohtrans: 1, /* Coherent transaction */
+ xtsize: 2, /* Xtalk operation size
+ * 0: Double Word
+ * 1: 32 Bytes.
+ * 2: 128 Bytes,
+ * 3: Reserved.
+ */
+ srcnode: 9, /* Source Node ID */
+ srcinit: 2, /* Source Initiator:
+ * See below for field values.
+ */
+ useold: 1, /* Use OLD command for processing */
+ imsgtype: 2, /* Incoming message type
+ * see below for field values
+ */
+ imsg: 8, /* Incoming message */
+ initator: 3, /* Initiator of original request
+ * See below for field values.
+ */
+ reqtype: 5, /* Identifies type of request
+ * See below for field values.
+ */
+ rsvd2: 7,
+ ackcnt: 11, /* Invalidate ack count */
+ resp: 1, /* data response given to processor */
+ ack: 1, /* indicates data ack received */
+ hold: 1, /* entry is gathering inval acks */
+ wb_pend:1, /* waiting for writeback to complete */
+ intvn: 1, /* Intervention */
+ stall_ib: 1, /* Stall Ibuf (from crosstalk) */
+ stall_intr: 1; /* Stall internal interrupts */
+ } icrbb_field_s;
+} icrbb_t;
+
+/* This is an alternate typedef for the HUB1 CRB B in order to allow
+ runtime selection of the format based on the REV_ID field of the
+ NI_STATUS_REV_ID register. */
+typedef union h1_icrbb_u {
+ u64 reg_value;
+ struct {
+ u64 rsvd1: 5,
+ btenum: 1, /* BTE to which entry belongs to */
+ cohtrans: 1, /* Coherent transaction */
+ xtsize: 2, /* Xtalk operation size
+ * 0: Double Word
+ * 1: 32 Bytes.
+ * 2: 128 Bytes,
+ * 3: Reserved.
+ */
+ srcnode: 9, /* Source Node ID */
+ srcinit: 2, /* Source Initiator:
+ * See below for field values.
+ */
+ useold: 1, /* Use OLD command for processing */
+ imsgtype: 2, /* Incoming message type
+ * see below for field values
+ */
+ imsg: 8, /* Incoming message */
+ initator: 3, /* Initiator of original request
+ * See below for field values.
+ */
+ rsvd2: 1,
+ pcache: 1, /* entry belongs to partial cache */
+ reqtype: 5, /* Identifies type of request
+ * See below for field values.
+ */
+ stl_ib: 1, /* stall Ibus coming from xtalk */
+ stl_intr: 1, /* Stall internal interrupts */
+ stl_bte0: 1, /* Stall BTE 0 */
+ stl_bte1: 1, /* Stall BTE 1 */
+ intrvn: 1, /* Req was target of intervention */
+ ackcnt: 11, /* Invalidate ack count */
+ resp: 1, /* data response given to processor */
+ ack: 1, /* indicates data ack received */
+ hold: 1, /* entry is gathering inval acks */
+ wb_pend:1, /* waiting for writeback to complete */
+ sleep: 1, /* xtalk req sleeping till IO-sync */
+ pnd_reply: 1, /* replies not issed due to IOQ full */
+ pnd_req: 1; /* reqs not issued due to IOQ full */
+ } h1_icrbb_field_s;
+} h1_icrbb_t;
+
+
+#define b_imsgtype icrbb_field_s.imsgtype
+#define b_btenum icrbb_field_s.btenum
+#define b_cohtrans icrbb_field_s.cohtrans
+#define b_xtsize icrbb_field_s.xtsize
+#define b_srcnode icrbb_field_s.srcnode
+#define b_srcinit icrbb_field_s.srcinit
+#define b_imsgtype icrbb_field_s.imsgtype
+#define b_imsg icrbb_field_s.imsg
+#define b_initiator icrbb_field_s.initiator
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * values for field xtsize
+ */
+#define IIO_ICRB_XTSIZE_DW 0 /* Xtalk operation size is 8 bytes */
+#define IIO_ICRB_XTSIZE_32 1 /* Xtalk operation size is 32 bytes */
+#define IIO_ICRB_XTSIZE_128 2 /* Xtalk operation size is 128 bytes */
+
+/*
+ * values for field srcinit
+ */
+#define IIO_ICRB_PROC0 0 /* Source of request is Proc 0 */
+#define IIO_ICRB_PROC1 1 /* Source of request is Proc 1 */
+#define IIO_ICRB_GB_REQ 2 /* Source is Guranteed BW request */
+#define IIO_ICRB_IO_REQ 3 /* Source is Normal IO request */
+
+/*
+ * Values for field imsgtype
+ */
+#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
+#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
+#define IIO_ICRB_IMSGT_SN0NET 2 /* Incoming message from SN0 net */
+#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
+
+/*
+ * values for field initiator.
+ */
+#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
+#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
+#define IIO_ICRB_INIT_SN0NET 0x2 /* Message originated in SN0net */
+#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
+#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
+
+/*
+ * Values for field reqtype.
+ */
+/* XXX - Need to fix this for Hub 2 */
+#define IIO_ICRB_REQ_DWRD 0 /* Request type double word */
+#define IIO_ICRB_REQ_QCLRD 1 /* Request is Qrtr Caceh line Rd */
+#define IIO_ICRB_REQ_BLKRD 2 /* Request is block read */
+#define IIO_ICRB_REQ_RSHU 6 /* Request is BTE block read */
+#define IIO_ICRB_REQ_REXU 7 /* request is BTE Excl Read */
+#define IIO_ICRB_REQ_RDEX 8 /* Request is Read Exclusive */
+#define IIO_ICRB_REQ_WINC 9 /* Request is Write Invalidate */
+#define IIO_ICRB_REQ_BWINV 10 /* Request is BTE Winv */
+#define IIO_ICRB_REQ_PIORD 11 /* Request is PIO read */
+#define IIO_ICRB_REQ_PIOWR 12 /* Request is PIO Write */
+#define IIO_ICRB_REQ_PRDM 13 /* Request is Fetch&Op */
+#define IIO_ICRB_REQ_PWRM 14 /* Request is Store &Op */
+#define IIO_ICRB_REQ_PTPWR 15 /* Request is Peer to peer */
+#define IIO_ICRB_REQ_WB 16 /* Request is Write back */
+#define IIO_ICRB_REQ_DEX 17 /* Retained DEX Cache line */
+
+/*
+ * Fields in CRB Register C
+ */
+
+#ifndef __ASSEMBLY__
+
+typedef union icrbc_s {
+ u64 reg_value;
+ struct {
+ u64 rsvd: 6,
+ sleep: 1,
+ pricnt: 4, /* Priority count sent with Read req */
+ pripsc: 4, /* Priority Pre scalar */
+ bteop: 1, /* BTE Operation */
+ push_be: 34, /* Push address Byte enable
+ * Holds push addr, if CRB is for BTE
+ * If CRB belongs to Partial cache,
+ * this contains byte enables bits
+ * ([47:46] = 0)
+ */
+ suppl: 11, /* Supplemental field */
+ barrop: 1, /* Barrier Op bit set in xtalk req */
+ doresp: 1, /* Xtalk req needs a response */
+ gbr: 1; /* GBR bit set in xtalk packet */
+ } icrbc_field_s;
+} icrbc_t;
+
+#define c_pricnt icrbc_field_s.pricnt
+#define c_pripsc icrbc_field_s.pripsc
+#define c_bteop icrbc_field_s.bteop
+#define c_bteaddr icrbc_field_s.push_be /* push_be field has 2 names */
+#define c_benable icrbc_field_s.push_be /* push_be field has 2 names */
+#define c_suppl icrbc_field_s.suppl
+#define c_barrop icrbc_field_s.barrop
+#define c_doresp icrbc_field_s.doresp
+#define c_gbr icrbc_field_s.gbr
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Fields in CRB Register D
+ */
+
+#ifndef __ASSEMBLY__
+typedef union icrbd_s {
+ u64 reg_value;
+ struct {
+ u64 rsvd: 38,
+ toutvld: 1, /* Timeout in progress for this CRB */
+ ctxtvld: 1, /* Context field below is valid */
+ rsvd2: 1,
+ context: 15, /* Bit vector:
+ * Has a bit set for each CRB entry
+ * which needs to be deallocated
+ * before this CRB entry is processed.
+ * Set only for barrier operations.
+ */
+ timeout: 8; /* Timeout Upper 8 bits */
+ } icrbd_field_s;
+} icrbd_t;
+
+#define icrbd_toutvld icrbd_field_s.toutvld
+#define icrbd_ctxtvld icrbd_field_s.ctxtvld
+#define icrbd_context icrbd_field_s.context
+
+
+typedef union hubii_ifdr_u {
+ u64 hi_ifdr_value;
+ struct {
+ u64 ifdr_rsvd: 49,
+ ifdr_maxrp: 7,
+ ifdr_rsvd1: 1,
+ ifdr_maxrq: 7;
+ } hi_ifdr_fields;
+} hubii_ifdr_t;
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Hardware designed names for the BTE control registers.
+ */
+#define IIO_IBLS_0 0x410000 /* BTE length/status 0 */
+#define IIO_IBSA_0 0x410008 /* BTE source address 0 */
+#define IIO_IBDA_0 0x410010 /* BTE destination address 0 */
+#define IIO_IBCT_0 0x410018 /* BTE control/terminate 0 */
+#define IIO_IBNA_0 0x410020 /* BTE notification address 0 */
+#define IIO_IBNR_0 IIO_IBNA_0
+#define IIO_IBIA_0 0x410028 /* BTE interrupt address 0 */
+
+#define IIO_IBLS_1 0x420000 /* BTE length/status 1 */
+#define IIO_IBSA_1 0x420008 /* BTE source address 1 */
+#define IIO_IBDA_1 0x420010 /* BTE destination address 1 */
+#define IIO_IBCT_1 0x420018 /* BTE control/terminate 1 */
+#define IIO_IBNA_1 0x420020 /* BTE notification address 1 */
+#define IIO_IBNR_1 IIO_IBNA_1
+#define IIO_IBIA_1 0x420028 /* BTE interrupt address 1 */
+
+/*
+ * More miscellaneous registers
+ */
+#define IIO_IPCR 0x430000 /* Performance Control */
+#define IIO_IPPR 0x430008 /* Performance Profiling */
+
+/*
+ * IO Error Clear register bit field definitions
+ */
+#define IECLR_BTE1 (1 << 18) /* clear bte error 1 ??? */
+#define IECLR_BTE0 (1 << 17) /* clear bte error 0 ??? */
+#define IECLR_CRAZY (1 << 16) /* clear crazy bit in wstat reg */
+#define IECLR_PRB_F (1 << 15) /* clear err bit in PRB_F reg */
+#define IECLR_PRB_E (1 << 14) /* clear err bit in PRB_E reg */
+#define IECLR_PRB_D (1 << 13) /* clear err bit in PRB_D reg */
+#define IECLR_PRB_C (1 << 12) /* clear err bit in PRB_C reg */
+#define IECLR_PRB_B (1 << 11) /* clear err bit in PRB_B reg */
+#define IECLR_PRB_A (1 << 10) /* clear err bit in PRB_A reg */
+#define IECLR_PRB_9 (1 << 9) /* clear err bit in PRB_9 reg */
+#define IECLR_PRB_8 (1 << 8) /* clear err bit in PRB_8 reg */
+#define IECLR_PRB_0 (1 << 0) /* clear err bit in PRB_0 reg */
+
+/*
+ * IO PIO Read Table Entry format
+ */
+
+#ifndef __ASSEMBLY__
+
+typedef union iprte_a {
+ u64 entry;
+ struct {
+ u64 rsvd1 : 7, /* Reserved field */
+ valid : 1, /* Maps to a timeout entry */
+ rsvd2 : 1,
+ srcnode : 9, /* Node which did this PIO */
+ initiator : 2, /* If T5A or T5B or IO */
+ rsvd3 : 3,
+ addr : 38, /* Physical address of PIO */
+ rsvd4 : 3;
+ } iprte_fields;
+} iprte_a_t;
+
+#define iprte_valid iprte_fields.valid
+#define iprte_timeout iprte_fields.timeout
+#define iprte_srcnode iprte_fields.srcnode
+#define iprte_init iprte_fields.initiator
+#define iprte_addr iprte_fields.addr
+
+#endif /* !__ASSEMBLY__ */
+
+#define IPRTE_ADDRSHFT 3
+
+/*
+ * Hub IIO PRB Register format.
+ */
+
+#ifndef __ASSEMBLY__
+/*
+ * Note: Fields bnakctr, anakctr, xtalkctrmode, ovflow fields are
+ * "Status" fields, and should only be used in case of clean up after errors.
+ */
+
+typedef union iprb_u {
+ u64 reg_value;
+ struct {
+ u64 rsvd1: 15,
+ error: 1, /* Widget rcvd wr resp pkt w/ error */
+ ovflow: 5, /* Over flow count. perf measurement */
+ fire_and_forget: 1, /* Launch Write without response */
+ mode: 2, /* Widget operation Mode */
+ rsvd2: 2,
+ bnakctr: 14,
+ rsvd3: 2,
+ anakctr: 14,
+ xtalkctr: 8;
+ } iprb_fields_s;
+} iprb_t;
+
+#define iprb_regval reg_value
+
+#define iprb_error iprb_fields_s.error
+#define iprb_ovflow iprb_fields_s.ovflow
+#define iprb_ff iprb_fields_s.fire_and_forget
+#define iprb_mode iprb_fields_s.mode
+#define iprb_bnakctr iprb_fields_s.bnakctr
+#define iprb_anakctr iprb_fields_s.anakctr
+#define iprb_xtalkctr iprb_fields_s.xtalkctr
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * values for mode field in iprb_t.
+ * For details of the meanings of NAK and Accept, refer the PIO flow
+ * document
+ */
+#define IPRB_MODE_NORMAL (0)
+#define IPRB_MODE_COLLECT_A (1) /* PRB in collect A mode */
+#define IPRB_MODE_SERVICE_A (2) /* NAK B and Accept A */
+#define IPRB_MODE_SERVICE_B (3) /* NAK A and Accept B */
+
+/*
+ * IO CRB entry C_A to E_A : Partial (cache) CRBS
+ */
+#ifndef __ASSEMBLY__
+typedef union icrbp_a {
+ u64 ip_reg; /* the entire register value */
+ struct {
+ u64 error: 1, /* 63, error occurred */
+ ln_uce: 1, /* 62: uncorrectable memory */
+ ln_ae: 1, /* 61: protection violation */
+ ln_werr:1, /* 60: write access error */
+ ln_aerr:1, /* 59: sn0net: Address error */
+ ln_perr:1, /* 58: sn0net: poison error */
+ timeout:1, /* 57: CRB timed out */
+ l_bdpkt:1, /* 56: truncated pkt on sn0net */
+ c_bdpkt:1, /* 55: truncated pkt on xtalk */
+ c_err: 1, /* 54: incoming xtalk req, err set*/
+ rsvd1: 12, /* 53-42: reserved */
+ valid: 1, /* 41: Valid status */
+ sidn: 4, /* 40-37: SIDN field of xtalk rqst */
+ tnum: 5, /* 36-32: TNUM of xtalk request */
+ bo: 1, /* 31: barrier op set in xtalk rqst*/
+ resprqd:1, /* 30: xtalk rqst requires response*/
+ gbr: 1, /* 29: gbr bit set in xtalk rqst */
+ size: 2, /* 28-27: size of xtalk request */
+ excl: 4, /* 26-23: exclusive bit(s) */
+ stall: 3, /* 22-20: stall (xtalk, bte 0/1) */
+ intvn: 1, /* 19: rqst target of intervention*/
+ resp: 1, /* 18: Data response given to t5 */
+ ack: 1, /* 17: Data ack received. */
+ hold: 1, /* 16: crb gathering invalidate acks*/
+ wb: 1, /* 15: writeback pending. */
+ ack_cnt:11, /* 14-04: counter of invalidate acks*/
+ tscaler:4; /* 03-00: Timeout prescaler */
+ } ip_fmt;
+} icrbp_a_t;
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * A couple of defines to go with the above structure.
+ */
+#define ICRBP_A_CERR_SHFT 54
+#define ICRBP_A_ERR_MASK 0x3ff
+
+#ifndef __ASSEMBLY__
+typedef union hubii_idsr {
+ u64 iin_reg;
+ struct {
+ u64 rsvd1 : 35,
+ isent : 1,
+ rsvd2 : 3,
+ ienable: 1,
+ rsvd : 7,
+ node : 9,
+ rsvd4 : 1,
+ level : 7;
+ } iin_fmt;
+} hubii_idsr_t;
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * IO BTE Length/Status (IIO_IBLS) register bit field definitions
+ */
+#define IBLS_BUSY (0x1 << 20)
+#define IBLS_ERROR_SHFT 16
+#define IBLS_ERROR (0x1 << IBLS_ERROR_SHFT)
+#define IBLS_LENGTH_MASK 0xffff
+
+/*
+ * IO BTE Control/Terminate register (IBCT) register bit field definitions
+ */
+#define IBCT_POISON (0x1 << 8)
+#define IBCT_NOTIFY (0x1 << 4)
+#define IBCT_ZFIL_MODE (0x1 << 0)
+
+/*
+ * IO BTE Interrupt Address Register (IBIA) register bit field definitions
+ */
+#define IBIA_LEVEL_SHFT 16
+#define IBIA_LEVEL_MASK (0x7f << IBIA_LEVEL_SHFT)
+#define IBIA_NODE_ID_SHFT 0
+#define IBIA_NODE_ID_MASK (0x1ff)
+
+/*
+ * Miscellaneous hub constants
+ */
+
+/* Number of widgets supported by hub */
+#define HUB_NUM_WIDGET 9
+#define HUB_WIDGET_ID_MIN 0x8
+#define HUB_WIDGET_ID_MAX 0xf
+
+#define HUB_WIDGET_PART_NUM 0xc101
+#define MAX_HUBS_PER_XBOW 2
+
+/*
+ * Get a hub's widget id from widget control register
+ */
+#define IIO_WCR_WID_GET(nasid) (REMOTE_HUB_L(nasid, III_WCR) & 0xf)
+#define IIO_WST_ERROR_MASK (UINT64_CAST 1 << 32) /* Widget status error */
+
+/*
+ * Number of credits Hub widget has while sending req/response to
+ * xbow.
+ * Value of 3 is required by Xbow 1.1
+ * We may be able to increase this to 4 with Xbow 1.2.
+ */
+#define HUBII_XBOW_CREDIT 3
+#define HUBII_XBOW_REV2_CREDIT 4
+
+#endif /* _ASM_SGI_SN_SN0_HUBIO_H */
diff -Nru a/include/asm-mips/sn/sn0/hubmd.h b/include/asm-mips/sn/sn0/hubmd.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/hubmd.h Sun Aug 3 13:14:52 2003
@@ -0,0 +1,790 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/hubmd.h>, revision 1.59.
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SN_SN0_HUBMD_H
+#define _ASM_SN_SN0_HUBMD_H
+
+#include <linux/config.h>
+
+/*
+ * Hub Memory/Directory interface registers
+ */
+#define CACHE_SLINE_SIZE 128 /* Secondary cache line size on SN0 */
+
+#define MAX_REGIONS 64
+
+/* Hardware page size and shift */
+
+#define MD_PAGE_SIZE 4096 /* Page size in bytes */
+#define MD_PAGE_NUM_SHFT 12 /* Address to page number shift */
+
+/* Register offsets from LOCAL_HUB or REMOTE_HUB */
+
+#define MD_BASE 0x200000
+#define MD_BASE_PERF 0x210000
+#define MD_BASE_JUNK 0x220000
+
+#define MD_IO_PROTECT 0x200000 /* MD and core register protection */
+#define MD_IO_PROT_OVRRD 0x200008 /* Clear my bit in MD_IO_PROTECT */
+#define MD_HSPEC_PROTECT 0x200010 /* BDDIR, LBOOT, RBOOT protection */
+#define MD_MEMORY_CONFIG 0x200018 /* Memory/Directory DIMM control */
+#define MD_REFRESH_CONTROL 0x200020 /* Memory/Directory refresh ctrl */
+#define MD_FANDOP_CAC_STAT 0x200028 /* Fetch-and-op cache status */
+#define MD_MIG_DIFF_THRESH 0x200030 /* Page migr. count diff thresh. */
+#define MD_MIG_VALUE_THRESH 0x200038 /* Page migr. count abs. thresh. */
+#define MD_MIG_CANDIDATE 0x200040 /* Latest page migration candidate */
+#define MD_MIG_CANDIDATE_CLR 0x200048 /* Clear page migration candidate */
+#define MD_DIR_ERROR 0x200050 /* Directory DIMM error */
+#define MD_DIR_ERROR_CLR 0x200058 /* Directory DIMM error clear */
+#define MD_PROTOCOL_ERROR 0x200060 /* Directory protocol error */
+#define MD_PROTOCOL_ERROR_CLR 0x200068 /* Directory protocol error clear */
+#define MD_MEM_ERROR 0x200070 /* Memory DIMM error */
+#define MD_MEM_ERROR_CLR 0x200078 /* Memory DIMM error clear */
+#define MD_MISC_ERROR 0x200080 /* Miscellaneous MD error */
+#define MD_MISC_ERROR_CLR 0x200088 /* Miscellaneous MD error clear */
+#define MD_MEM_DIMM_INIT 0x200090 /* Memory DIMM mode initization. */
+#define MD_DIR_DIMM_INIT 0x200098 /* Directory DIMM mode init. */
+#define MD_MOQ_SIZE 0x2000a0 /* MD outgoing queue size */
+#define MD_MLAN_CTL 0x2000a8 /* NIC (Microlan) control register */
+
+#define MD_PERF_SEL 0x210000 /* Select perf monitor events */
+#define MD_PERF_CNT0 0x210010 /* Performance counter 0 */
+#define MD_PERF_CNT1 0x210018 /* Performance counter 1 */
+#define MD_PERF_CNT2 0x210020 /* Performance counter 2 */
+#define MD_PERF_CNT3 0x210028 /* Performance counter 3 */
+#define MD_PERF_CNT4 0x210030 /* Performance counter 4 */
+#define MD_PERF_CNT5 0x210038 /* Performance counter 5 */
+
+#define MD_UREG0_0 0x220000 /* uController/UART 0 register */
+#define MD_UREG0_1 0x220008 /* uController/UART 0 register */
+#define MD_UREG0_2 0x220010 /* uController/UART 0 register */
+#define MD_UREG0_3 0x220018 /* uController/UART 0 register */
+#define MD_UREG0_4 0x220020 /* uController/UART 0 register */
+#define MD_UREG0_5 0x220028 /* uController/UART 0 register */
+#define MD_UREG0_6 0x220030 /* uController/UART 0 register */
+#define MD_UREG0_7 0x220038 /* uController/UART 0 register */
+
+#define MD_SLOTID_USTAT 0x220048 /* Hub slot ID & UART/uCtlr status */
+#define MD_LED0 0x220050 /* Eight-bit LED for CPU A */
+#define MD_LED1 0x220058 /* Eight-bit LED for CPU B */
+
+#define MD_UREG1_0 0x220080 /* uController/UART 1 register */
+#define MD_UREG1_1 0x220088 /* uController/UART 1 register */
+#define MD_UREG1_2 0x220090 /* uController/UART 1 register */
+#define MD_UREG1_3 0x220098 /* uController/UART 1 register */
+#define MD_UREG1_4 0x2200a0 /* uController/UART 1 register */
+#define MD_UREG1_5 0x2200a8 /* uController/UART 1 register */
+#define MD_UREG1_6 0x2200b0 /* uController/UART 1 register */
+#define MD_UREG1_7 0x2200b8 /* uController/UART 1 register */
+#define MD_UREG1_8 0x2200c0 /* uController/UART 1 register */
+#define MD_UREG1_9 0x2200c8 /* uController/UART 1 register */
+#define MD_UREG1_10 0x2200d0 /* uController/UART 1 register */
+#define MD_UREG1_11 0x2200d8 /* uController/UART 1 register */
+#define MD_UREG1_12 0x2200e0 /* uController/UART 1 register */
+#define MD_UREG1_13 0x2200e8 /* uController/UART 1 register */
+#define MD_UREG1_14 0x2200f0 /* uController/UART 1 register */
+#define MD_UREG1_15 0x2200f8 /* uController/UART 1 register */
+
+#ifdef CONFIG_SGI_SN0_N_MODE
+#define MD_MEM_BANKS 4 /* 4 banks of memory max in N mode */
+#else
+#define MD_MEM_BANKS 8 /* 8 banks of memory max in M mode */
+#endif
+
+/*
+ * MD_MEMORY_CONFIG fields
+ *
+ * MD_SIZE_xxx are useful for representing the size of a SIMM or bank
+ * (SIMM pair). They correspond to the values needed for the bit
+ * triplets (MMC_BANK_MASK) in the MD_MEMORY_CONFIG register for bank size.
+ * Bits not used by the MD are used by software.
+ */
+
+#define MD_SIZE_EMPTY 0 /* Valid in MEMORY_CONFIG */
+#define MD_SIZE_8MB 1
+#define MD_SIZE_16MB 2
+#define MD_SIZE_32MB 3 /* Broken in Hub 1 */
+#define MD_SIZE_64MB 4 /* Valid in MEMORY_CONFIG */
+#define MD_SIZE_128MB 5 /* Valid in MEMORY_CONFIG */
+#define MD_SIZE_256MB 6
+#define MD_SIZE_512MB 7 /* Valid in MEMORY_CONFIG */
+#define MD_SIZE_1GB 8
+#define MD_SIZE_2GB 9
+#define MD_SIZE_4GB 10
+
+#define MD_SIZE_BYTES(size) ((size) == 0 ? 0 : 0x400000L << (size))
+#define MD_SIZE_MBYTES(size) ((size) == 0 ? 0 : 4 << (size))
+
+#define MMC_FPROM_CYC_SHFT 49 /* Have to use UINT64_CAST, instead */
+#define MMC_FPROM_CYC_MASK (UINT64_CAST 31 << 49) /* of 'L' suffix, */
+#define MMC_FPROM_WR_SHFT 44 /* for assembler */
+#define MMC_FPROM_WR_MASK (UINT64_CAST 31 << 44)
+#define MMC_UCTLR_CYC_SHFT 39
+#define MMC_UCTLR_CYC_MASK (UINT64_CAST 31 << 39)
+#define MMC_UCTLR_WR_SHFT 34
+#define MMC_UCTLR_WR_MASK (UINT64_CAST 31 << 34)
+#define MMC_DIMM0_SEL_SHFT 32
+#define MMC_DIMM0_SEL_MASK (UINT64_CAST 3 << 32)
+#define MMC_IO_PROT_EN_SHFT 31
+#define MMC_IO_PROT_EN_MASK (UINT64_CAST 1 << 31)
+#define MMC_IO_PROT (UINT64_CAST 1 << 31)
+#define MMC_ARB_MLSS_SHFT 30
+#define MMC_ARB_MLSS_MASK (UINT64_CAST 1 << 30)
+#define MMC_ARB_MLSS (UINT64_CAST 1 << 30)
+#define MMC_IGNORE_ECC_SHFT 29
+#define MMC_IGNORE_ECC_MASK (UINT64_CAST 1 << 29)
+#define MMC_IGNORE_ECC (UINT64_CAST 1 << 29)
+#define MMC_DIR_PREMIUM_SHFT 28
+#define MMC_DIR_PREMIUM_MASK (UINT64_CAST 1 << 28)
+#define MMC_DIR_PREMIUM (UINT64_CAST 1 << 28)
+#define MMC_REPLY_GUAR_SHFT 24
+#define MMC_REPLY_GUAR_MASK (UINT64_CAST 15 << 24)
+#define MMC_BANK_SHFT(_b) ((_b) * 3)
+#define MMC_BANK_MASK(_b) (UINT64_CAST 7 << MMC_BANK_SHFT(_b))
+#define MMC_BANK_ALL_MASK 0xffffff
+#define MMC_RESET_DEFAULTS (UINT64_CAST 0x0f << MMC_FPROM_CYC_SHFT | \
+ UINT64_CAST 0x07 << MMC_FPROM_WR_SHFT | \
+ UINT64_CAST 0x1f << MMC_UCTLR_CYC_SHFT | \
+ UINT64_CAST 0x0f << MMC_UCTLR_WR_SHFT | \
+ MMC_IGNORE_ECC | MMC_DIR_PREMIUM | \
+ UINT64_CAST 0x0f << MMC_REPLY_GUAR_SHFT | \
+ MMC_BANK_ALL_MASK)
+
+/* MD_REFRESH_CONTROL fields */
+
+#define MRC_ENABLE_SHFT 63
+#define MRC_ENABLE_MASK (UINT64_CAST 1 << 63)
+#define MRC_ENABLE (UINT64_CAST 1 << 63)
+#define MRC_COUNTER_SHFT 12
+#define MRC_COUNTER_MASK (UINT64_CAST 0xfff << 12)
+#define MRC_CNT_THRESH_MASK 0xfff
+#define MRC_RESET_DEFAULTS (UINT64_CAST 0x400)
+
+/* MD_MEM_DIMM_INIT and MD_DIR_DIMM_INIT fields */
+
+#define MDI_SELECT_SHFT 32
+#define MDI_SELECT_MASK (UINT64_CAST 0x0f << 32)
+#define MDI_DIMM_MODE_MASK (UINT64_CAST 0xfff)
+
+/* MD_MOQ_SIZE fields */
+
+#define MMS_RP_SIZE_SHFT 8
+#define MMS_RP_SIZE_MASK (UINT64_CAST 0x3f << 8)
+#define MMS_RQ_SIZE_SHFT 0
+#define MMS_RQ_SIZE_MASK (UINT64_CAST 0x1f)
+#define MMS_RESET_DEFAULTS (0x32 << 8 | 0x12)
+
+/* MD_FANDOP_CAC_STAT fields */
+
+#define MFC_VALID_SHFT 63
+#define MFC_VALID_MASK (UINT64_CAST 1 << 63)
+#define MFC_VALID (UINT64_CAST 1 << 63)
+#define MFC_ADDR_SHFT 6
+#define MFC_ADDR_MASK (UINT64_CAST 0x3ffffff)
+
+/* MD_MLAN_CTL fields */
+
+#define MLAN_PHI1_SHFT 27
+#define MLAN_PHI1_MASK (UINT64_CAST 0x7f << 27)
+#define MLAN_PHI0_SHFT 20
+#define MLAN_PHI0_MASK (UINT64_CAST 0x7f << 27)
+#define MLAN_PULSE_SHFT 10
+#define MLAN_PULSE_MASK (UINT64_CAST 0x3ff << 10)
+#define MLAN_SAMPLE_SHFT 2
+#define MLAN_SAMPLE_MASK (UINT64_CAST 0xff << 2)
+#define MLAN_DONE_SHFT 1
+#define MLAN_DONE_MASK 2
+#define MLAN_DONE (UINT64_CAST 0x02)
+#define MLAN_RD_DATA (UINT64_CAST 0x01)
+#define MLAN_RESET_DEFAULTS (UINT64_CAST 0x31 << MLAN_PHI1_SHFT | \
+ UINT64_CAST 0x31 << MLAN_PHI0_SHFT)
+
+/* MD_SLOTID_USTAT bit definitions */
+
+#define MSU_CORECLK_TST_SHFT 7 /* You don't wanna know */
+#define MSU_CORECLK_TST_MASK (UINT64_CAST 1 << 7)
+#define MSU_CORECLK_TST (UINT64_CAST 1 << 7)
+#define MSU_CORECLK_SHFT 6 /* You don't wanna know */
+#define MSU_CORECLK_MASK (UINT64_CAST 1 << 6)
+#define MSU_CORECLK (UINT64_CAST 1 << 6)
+#define MSU_NETSYNC_SHFT 5 /* You don't wanna know */
+#define MSU_NETSYNC_MASK (UINT64_CAST 1 << 5)
+#define MSU_NETSYNC (UINT64_CAST 1 << 5)
+#define MSU_FPROMRDY_SHFT 4 /* Flash PROM ready bit */
+#define MSU_FPROMRDY_MASK (UINT64_CAST 1 << 4)
+#define MSU_FPROMRDY (UINT64_CAST 1 << 4)
+#define MSU_I2CINTR_SHFT 3 /* I2C interrupt bit */
+#define MSU_I2CINTR_MASK (UINT64_CAST 1 << 3)
+#define MSU_I2CINTR (UINT64_CAST 1 << 3)
+#define MSU_SLOTID_MASK 0xff
+#define MSU_SN0_SLOTID_SHFT 0 /* Slot ID */
+#define MSU_SN0_SLOTID_MASK (UINT64_CAST 7)
+#define MSU_SN00_SLOTID_SHFT 7
+#define MSU_SN00_SLOTID_MASK (UINT64_CAST 0x80)
+
+#define MSU_PIMM_PSC_SHFT 4
+#define MSU_PIMM_PSC_MASK (0xf << MSU_PIMM_PSC_SHFT)
+
+/* MD_MIG_DIFF_THRESH bit definitions */
+
+#define MD_MIG_DIFF_THRES_VALID_MASK (UINT64_CAST 0x1 << 63)
+#define MD_MIG_DIFF_THRES_VALID_SHFT 63
+#define MD_MIG_DIFF_THRES_VALUE_MASK (UINT64_CAST 0xfffff)
+
+/* MD_MIG_VALUE_THRESH bit definitions */
+
+#define MD_MIG_VALUE_THRES_VALID_MASK (UINT64_CAST 0x1 << 63)
+#define MD_MIG_VALUE_THRES_VALID_SHFT 63
+#define MD_MIG_VALUE_THRES_VALUE_MASK (UINT64_CAST 0xfffff)
+
+/* MD_MIG_CANDIDATE bit definitions */
+
+#define MD_MIG_CANDIDATE_VALID_MASK (UINT64_CAST 0x1 << 63)
+#define MD_MIG_CANDIDATE_VALID_SHFT 63
+#define MD_MIG_CANDIDATE_TYPE_MASK (UINT64_CAST 0x1 << 30)
+#define MD_MIG_CANDIDATE_TYPE_SHFT 30
+#define MD_MIG_CANDIDATE_OVERRUN_MASK (UINT64_CAST 0x1 << 29)
+#define MD_MIG_CANDIDATE_OVERRUN_SHFT 29
+#define MD_MIG_CANDIDATE_INITIATOR_MASK (UINT64_CAST 0x7ff << 18)
+#define MD_MIG_CANDIDATE_INITIATOR_SHFT 18
+#define MD_MIG_CANDIDATE_NODEID_MASK (UINT64_CAST 0x1ff << 20)
+#define MD_MIG_CANDIDATE_NODEID_SHFT 20
+#define MD_MIG_CANDIDATE_ADDR_MASK (UINT64_CAST 0x3ffff)
+#define MD_MIG_CANDIDATE_ADDR_SHFT 14 /* The address starts at bit 14 */
+
+/* Other MD definitions */
+
+#define MD_BANK_SHFT 29 /* log2(512 MB) */
+#define MD_BANK_MASK (UINT64_CAST 7 << 29)
+#define MD_BANK_SIZE (UINT64_CAST 1 << MD_BANK_SHFT) /* 512 MB */
+#define MD_BANK_OFFSET(_b) (UINT64_CAST (_b) << MD_BANK_SHFT)
+
+/*
+ * The following definitions cover the bit field definitions for the
+ * various MD registers. For multi-bit registers, we define both
+ * a shift amount and a mask value. By convention, if you want to
+ * isolate a field, you should mask the field and then shift it down,
+ * since this makes the masks useful without a shift.
+ */
+
+/* Directory entry states for both premium and standard SIMMs. */
+
+#define MD_DIR_SHARED (UINT64_CAST 0x0) /* 000 */
+#define MD_DIR_POISONED (UINT64_CAST 0x1) /* 001 */
+#define MD_DIR_EXCLUSIVE (UINT64_CAST 0x2) /* 010 */
+#define MD_DIR_BUSY_SHARED (UINT64_CAST 0x3) /* 011 */
+#define MD_DIR_BUSY_EXCL (UINT64_CAST 0x4) /* 100 */
+#define MD_DIR_WAIT (UINT64_CAST 0x5) /* 101 */
+#define MD_DIR_UNOWNED (UINT64_CAST 0x7) /* 111 */
+
+/*
+ * The MD_DIR_FORCE_ECC bit can be added directory entry write data
+ * to forcing the ECC to be written as-is instead of recalculated.
+ */
+
+#define MD_DIR_FORCE_ECC (UINT64_CAST 1 << 63)
+
+/*
+ * Premium SIMM directory entry shifts and masks. Each is valid only in the
+ * context(s) indicated, where A, B, and C indicate the directory entry format
+ * as shown, and low and/or high indicates which double-word of the entry.
+ *
+ * Format A: STATE = shared, FINE = 1
+ * Format B: STATE = shared, FINE = 0
+ * Format C: STATE != shared (FINE must be 0)
+ */
+
+#define MD_PDIR_MASK 0xffffffffffff /* Whole entry */
+#define MD_PDIR_ECC_SHFT 0 /* ABC low or high */
+#define MD_PDIR_ECC_MASK 0x7f
+#define MD_PDIR_PRIO_SHFT 8 /* ABC low */
+#define MD_PDIR_PRIO_MASK (0xf << 8)
+#define MD_PDIR_AX_SHFT 7 /* ABC low */
+#define MD_PDIR_AX_MASK (1 << 7)
+#define MD_PDIR_AX (1 << 7)
+#define MD_PDIR_FINE_SHFT 12 /* ABC low */
+#define MD_PDIR_FINE_MASK (1 << 12)
+#define MD_PDIR_FINE (1 << 12)
+#define MD_PDIR_OCT_SHFT 13 /* A low */
+#define MD_PDIR_OCT_MASK (7 << 13)
+#define MD_PDIR_STATE_SHFT 13 /* BC low */
+#define MD_PDIR_STATE_MASK (7 << 13)
+#define MD_PDIR_ONECNT_SHFT 16 /* BC low */
+#define MD_PDIR_ONECNT_MASK (0x3f << 16)
+#define MD_PDIR_PTR_SHFT 22 /* C low */
+#define MD_PDIR_PTR_MASK (UINT64_CAST 0x7ff << 22)
+#define MD_PDIR_VECMSB_SHFT 22 /* AB low */
+#define MD_PDIR_VECMSB_BITMASK 0x3ffffff
+#define MD_PDIR_VECMSB_BITSHFT 27
+#define MD_PDIR_VECMSB_MASK (UINT64_CAST MD_PDIR_VECMSB_BITMASK << 22)
+#define MD_PDIR_CWOFF_SHFT 7 /* C high */
+#define MD_PDIR_CWOFF_MASK (7 << 7)
+#define MD_PDIR_VECLSB_SHFT 10 /* AB high */
+#define MD_PDIR_VECLSB_BITMASK (UINT64_CAST 0x3fffffffff)
+#define MD_PDIR_VECLSB_BITSHFT 0
+#define MD_PDIR_VECLSB_MASK (MD_PDIR_VECLSB_BITMASK << 10)
+
+/*
+ * Directory initialization values
+ */
+
+#define MD_PDIR_INIT_LO (MD_DIR_UNOWNED << MD_PDIR_STATE_SHFT | \
+ MD_PDIR_AX)
+#define MD_PDIR_INIT_HI 0
+#define MD_PDIR_INIT_PROT (MD_PROT_RW << MD_PPROT_IO_SHFT | \
+ MD_PROT_RW << MD_PPROT_SHFT)
+
+/*
+ * Standard SIMM directory entry shifts and masks. Each is valid only in the
+ * context(s) indicated, where A and C indicate the directory entry format
+ * as shown, and low and/or high indicates which double-word of the entry.
+ *
+ * Format A: STATE == shared
+ * Format C: STATE != shared
+ */
+
+#define MD_SDIR_MASK 0xffff /* Whole entry */
+#define MD_SDIR_ECC_SHFT 0 /* AC low or high */
+#define MD_SDIR_ECC_MASK 0x1f
+#define MD_SDIR_PRIO_SHFT 6 /* AC low */
+#define MD_SDIR_PRIO_MASK (1 << 6)
+#define MD_SDIR_AX_SHFT 5 /* AC low */
+#define MD_SDIR_AX_MASK (1 << 5)
+#define MD_SDIR_AX (1 << 5)
+#define MD_SDIR_STATE_SHFT 7 /* AC low */
+#define MD_SDIR_STATE_MASK (7 << 7)
+#define MD_SDIR_PTR_SHFT 10 /* C low */
+#define MD_SDIR_PTR_MASK (0x3f << 10)
+#define MD_SDIR_CWOFF_SHFT 5 /* C high */
+#define MD_SDIR_CWOFF_MASK (7 << 5)
+#define MD_SDIR_VECMSB_SHFT 11 /* A low */
+#define MD_SDIR_VECMSB_BITMASK 0x1f
+#define MD_SDIR_VECMSB_BITSHFT 7
+#define MD_SDIR_VECMSB_MASK (MD_SDIR_VECMSB_BITMASK << 11)
+#define MD_SDIR_VECLSB_SHFT 5 /* A high */
+#define MD_SDIR_VECLSB_BITMASK 0x7ff
+#define MD_SDIR_VECLSB_BITSHFT 0
+#define MD_SDIR_VECLSB_MASK (MD_SDIR_VECLSB_BITMASK << 5)
+
+/*
+ * Directory initialization values
+ */
+
+#define MD_SDIR_INIT_LO (MD_DIR_UNOWNED << MD_SDIR_STATE_SHFT | \
+ MD_SDIR_AX)
+#define MD_SDIR_INIT_HI 0
+#define MD_SDIR_INIT_PROT (MD_PROT_RW << MD_SPROT_SHFT)
+
+/* Protection and migration field values */
+
+#define MD_PROT_RW (UINT64_CAST 0x6)
+#define MD_PROT_RO (UINT64_CAST 0x3)
+#define MD_PROT_NO (UINT64_CAST 0x0)
+#define MD_PROT_BAD (UINT64_CAST 0x5)
+
+/* Premium SIMM protection entry shifts and masks. */
+
+#define MD_PPROT_SHFT 0 /* Prot. field */
+#define MD_PPROT_MASK 7
+#define MD_PPROT_MIGMD_SHFT 3 /* Migration mode */
+#define MD_PPROT_MIGMD_MASK (3 << 3)
+#define MD_PPROT_REFCNT_SHFT 5 /* Reference count */
+#define MD_PPROT_REFCNT_WIDTH 0x7ffff
+#define MD_PPROT_REFCNT_MASK (MD_PPROT_REFCNT_WIDTH << 5)
+
+#define MD_PPROT_IO_SHFT 45 /* I/O Prot field */
+#define MD_PPROT_IO_MASK (UINT64_CAST 7 << 45)
+
+/* Standard SIMM protection entry shifts and masks. */
+
+#define MD_SPROT_SHFT 0 /* Prot. field */
+#define MD_SPROT_MASK 7
+#define MD_SPROT_MIGMD_SHFT 3 /* Migration mode */
+#define MD_SPROT_MIGMD_MASK (3 << 3)
+#define MD_SPROT_REFCNT_SHFT 5 /* Reference count */
+#define MD_SPROT_REFCNT_WIDTH 0x7ff
+#define MD_SPROT_REFCNT_MASK (MD_SPROT_REFCNT_WIDTH << 5)
+
+/* Migration modes used in protection entries */
+
+#define MD_PROT_MIGMD_IREL (UINT64_CAST 0x3 << 3)
+#define MD_PROT_MIGMD_IABS (UINT64_CAST 0x2 << 3)
+#define MD_PROT_MIGMD_PREL (UINT64_CAST 0x1 << 3)
+#define MD_PROT_MIGMD_OFF (UINT64_CAST 0x0 << 3)
+
+
+/*
+ * Operations on page migration threshold register
+ */
+
+#ifndef __ASSEMBLY__
+
+/*
+ * LED register macros
+ */
+
+#define CPU_LED_ADDR(_nasid, _slice) \
+ (private.p_sn00 ? \
+ REMOTE_HUB_ADDR((_nasid), MD_UREG1_0 + ((_slice) << 5)) : \
+ REMOTE_HUB_ADDR((_nasid), MD_LED0 + ((_slice) << 3)))
+
+#define SET_CPU_LEDS(_nasid, _slice, _val) \
+ (HUB_S(CPU_LED_ADDR(_nasid, _slice), (_val)))
+
+#define SET_MY_LEDS(_v) \
+ SET_CPU_LEDS(get_nasid(), get_slice(), (_v))
+
+/*
+ * Operations on Memory/Directory DIMM control register
+ */
+
+#define DIRTYPE_PREMIUM 1
+#define DIRTYPE_STANDARD 0
+#define MD_MEMORY_CONFIG_DIR_TYPE_GET(region) (\
+ (REMOTE_HUB_L(region, MD_MEMORY_CONFIG) & MMC_DIR_PREMIUM_MASK) >> \
+ MMC_DIR_PREMIUM_SHFT)
+
+
+/*
+ * Operations on page migration count difference and absolute threshold
+ * registers
+ */
+
+#define MD_MIG_DIFF_THRESH_GET(region) ( \
+ REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & \
+ MD_MIG_DIFF_THRES_VALUE_MASK)
+
+#define MD_MIG_DIFF_THRESH_SET(region, value) ( \
+ REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, \
+ MD_MIG_DIFF_THRES_VALID_MASK | (value)))
+
+#define MD_MIG_DIFF_THRESH_DISABLE(region) ( \
+ REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, \
+ REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) \
+ & ~MD_MIG_DIFF_THRES_VALID_MASK))
+
+#define MD_MIG_DIFF_THRESH_ENABLE(region) ( \
+ REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, \
+ REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) \
+ | MD_MIG_DIFF_THRES_VALID_MASK))
+
+#define MD_MIG_DIFF_THRESH_IS_ENABLED(region) ( \
+ REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & \
+ MD_MIG_DIFF_THRES_VALID_MASK)
+
+#define MD_MIG_VALUE_THRESH_GET(region) ( \
+ REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & \
+ MD_MIG_VALUE_THRES_VALUE_MASK)
+
+#define MD_MIG_VALUE_THRESH_SET(region, value) ( \
+ REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, \
+ MD_MIG_VALUE_THRES_VALID_MASK | (value)))
+
+#define MD_MIG_VALUE_THRESH_DISABLE(region) ( \
+ REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, \
+ REMOTE_HUB_L(region, MD_MIG_VALUE_THRESH) \
+ & ~MD_MIG_VALUE_THRES_VALID_MASK))
+
+#define MD_MIG_VALUE_THRESH_ENABLE(region) ( \
+ REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, \
+ REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) \
+ | MD_MIG_VALUE_THRES_VALID_MASK))
+
+#define MD_MIG_VALUE_THRESH_IS_ENABLED(region) ( \
+ REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & \
+ MD_MIG_VALUE_THRES_VALID_MASK)
+
+/*
+ * Operations on page migration candidate register
+ */
+
+#define MD_MIG_CANDIDATE_GET(my_region_id) ( \
+ REMOTE_HUB_L((my_region_id), MD_MIG_CANDIDATE_CLR))
+
+#define MD_MIG_CANDIDATE_HWPFN(value) ((value) & MD_MIG_CANDIDATE_ADDR_MASK)
+
+#define MD_MIG_CANDIDATE_NODEID(value) ( \
+ ((value) & MD_MIG_CANDIDATE_NODEID_MASK) >> MD_MIG_CANDIDATE_NODEID_SHFT)
+
+#define MD_MIG_CANDIDATE_TYPE(value) ( \
+ ((value) & MD_MIG_CANDIDATE_TYPE_MASK) >> MD_MIG_CANDIDATE_TYPE_SHFT)
+
+#define MD_MIG_CANDIDATE_VALID(value) ( \
+ ((value) & MD_MIG_CANDIDATE_VALID_MASK) >> MD_MIG_CANDIDATE_VALID_SHFT)
+
+/*
+ * Macros to retrieve fields in the protection entry
+ */
+
+/* for Premium SIMM */
+#define MD_PPROT_REFCNT_GET(value) ( \
+ ((value) & MD_PPROT_REFCNT_MASK) >> MD_PPROT_REFCNT_SHFT)
+
+#define MD_PPROT_MIGMD_GET(value) ( \
+ ((value) & MD_PPROT_MIGMD_MASK) >> MD_PPROT_MIGMD_SHFT)
+
+/* for Standard SIMM */
+#define MD_SPROT_REFCNT_GET(value) ( \
+ ((value) & MD_SPROT_REFCNT_MASK) >> MD_SPROT_REFCNT_SHFT)
+
+#define MD_SPROT_MIGMD_GET(value) ( \
+ ((value) & MD_SPROT_MIGMD_MASK) >> MD_SPROT_MIGMD_SHFT)
+
+/*
+ * Format of dir_error, mem_error, protocol_error and misc_error registers
+ */
+
+struct dir_error_reg {
+ u64 uce_vld: 1, /* 63: valid directory uce */
+ ae_vld: 1, /* 62: valid dir prot ecc error */
+ ce_vld: 1, /* 61: valid correctable ECC err*/
+ rsvd1: 19, /* 60-42: reserved */
+ bad_prot: 3, /* 41-39: encoding, bad access rights*/
+ bad_syn: 7, /* 38-32: bad dir syndrome */
+ rsvd2: 2, /* 31-30: reserved */
+ hspec_addr:27, /* 29-03: bddir space bad entry */
+ uce_ovr: 1, /* 2: multiple dir uce's */
+ ae_ovr: 1, /* 1: multiple prot ecc errs*/
+ ce_ovr: 1; /* 0: multiple correctable errs */
+};
+
+typedef union md_dir_error {
+ u64 derr_reg; /* the entire register */
+ struct dir_error_reg derr_fmt; /* the register format */
+} md_dir_error_t;
+
+
+struct mem_error_reg {
+ u64 uce_vld: 1, /* 63: valid memory uce */
+ ce_vld: 1, /* 62: valid correctable ECC err*/
+ rsvd1: 22, /* 61-40: reserved */
+ bad_syn: 8, /* 39-32: bad mem ecc syndrome */
+ address: 29, /* 31-03: bad entry pointer */
+ rsvd2: 1, /* 2: reserved */
+ uce_ovr: 1, /* 1: multiple mem uce's */
+ ce_ovr: 1; /* 0: multiple correctable errs */
+};
+
+
+typedef union md_mem_error {
+ u64 merr_reg; /* the entire register */
+ struct mem_error_reg merr_fmt; /* format of the mem_error reg */
+} md_mem_error_t;
+
+
+struct proto_error_reg {
+ u64 valid: 1, /* 63: valid protocol error */
+ rsvd1: 2, /* 62-61: reserved */
+ initiator:11, /* 60-50: id of request initiator*/
+ backoff: 2, /* 49-48: backoff control */
+ msg_type: 8, /* 47-40: type of request */
+ access: 2, /* 39-38: access rights of initiator*/
+ priority: 1, /* 37: priority level of requestor*/
+ dir_state: 4, /* 36-33: state of directory */
+ pointer_me:1, /* 32: initiator same as dir ptr */
+ address: 29, /* 31-03: request address */
+ rsvd2: 2, /* 02-01: reserved */
+ overrun: 1; /* 0: multiple protocol errs */
+};
+
+typedef union md_proto_error {
+ u64 perr_reg; /* the entire register */
+ struct proto_error_reg perr_fmt; /* format of the register */
+} md_proto_error_t;
+
+
+struct md_sdir_high_fmt {
+ unsigned short sd_hi_bvec : 11,
+ sd_hi_ecc : 5;
+};
+
+
+typedef union md_sdir_high {
+ /* The 16 bits of standard directory, upper word */
+ unsigned short sd_hi_val;
+ struct md_sdir_high_fmt sd_hi_fmt;
+}md_sdir_high_t;
+
+
+struct md_sdir_low_shared_fmt {
+ /* The meaning of lower directory, shared */
+ unsigned short sds_lo_bvec : 5,
+ sds_lo_unused: 1,
+ sds_lo_state : 3,
+ sds_lo_prio : 1,
+ sds_lo_ax : 1,
+ sds_lo_ecc : 5;
+};
+
+struct md_sdir_low_exclusive_fmt {
+ /* The meaning of lower directory, exclusive */
+ unsigned short sde_lo_ptr : 6,
+ sde_lo_state : 3,
+ sde_lo_prio : 1,
+ sde_lo_ax : 1,
+ sde_lo_ecc : 5;
+};
+
+
+typedef union md_sdir_low {
+ /* The 16 bits of standard directory, lower word */
+ unsigned short sd_lo_val;
+ struct md_sdir_low_exclusive_fmt sde_lo_fmt;
+ struct md_sdir_low_shared_fmt sds_lo_fmt;
+}md_sdir_low_t;
+
+
+
+struct md_pdir_high_fmt {
+ u64 pd_hi_unused : 16,
+ pd_hi_bvec : 38,
+ pd_hi_unused1 : 3,
+ pd_hi_ecc : 7;
+};
+
+
+typedef union md_pdir_high {
+ /* The 48 bits of standard directory, upper word */
+ u64 pd_hi_val;
+ struct md_pdir_high_fmt pd_hi_fmt;
+}md_pdir_high_t;
+
+
+struct md_pdir_low_shared_fmt {
+ /* The meaning of lower directory, shared */
+ u64 pds_lo_unused : 16,
+ pds_lo_bvec : 26,
+ pds_lo_cnt : 6,
+ pds_lo_state : 3,
+ pds_lo_ste : 1,
+ pds_lo_prio : 4,
+ pds_lo_ax : 1,
+ pds_lo_ecc : 7;
+};
+
+struct md_pdir_low_exclusive_fmt {
+ /* The meaning of lower directory, exclusive */
+ u64 pde_lo_unused : 31,
+ pde_lo_ptr : 11,
+ pde_lo_unused1 : 6,
+ pde_lo_state : 3,
+ pde_lo_ste : 1,
+ pde_lo_prio : 4,
+ pde_lo_ax : 1,
+ pde_lo_ecc : 7;
+};
+
+
+typedef union md_pdir_loent {
+ /* The 48 bits of premium directory, lower word */
+ u64 pd_lo_val;
+ struct md_pdir_low_exclusive_fmt pde_lo_fmt;
+ struct md_pdir_low_shared_fmt pds_lo_fmt;
+}md_pdir_low_t;
+
+
+/*
+ * the following two "union" definitions and two
+ * "struct" definitions are used in vmdump.c to
+ * represent directory memory information.
+ */
+
+typedef union md_dir_high {
+ md_sdir_high_t md_sdir_high;
+ md_pdir_high_t md_pdir_high;
+} md_dir_high_t;
+
+typedef union md_dir_low {
+ md_sdir_low_t md_sdir_low;
+ md_pdir_low_t md_pdir_low;
+} md_dir_low_t;
+
+typedef struct bddir_entry {
+ md_dir_low_t md_dir_low;
+ md_dir_high_t md_dir_high;
+} bddir_entry_t;
+
+typedef struct dir_mem_entry {
+ u64 prcpf[MAX_REGIONS];
+ bddir_entry_t directory_words[MD_PAGE_SIZE/CACHE_SLINE_SIZE];
+} dir_mem_entry_t;
+
+
+
+typedef union md_perf_sel {
+ u64 perf_sel_reg;
+ struct {
+ u64 perf_rsvd : 60,
+ perf_en : 1,
+ perf_sel : 3;
+ } perf_sel_bits;
+} md_perf_sel_t;
+
+typedef union md_perf_cnt {
+ u64 perf_cnt;
+ struct {
+ u64 perf_rsvd : 44,
+ perf_cnt : 20;
+ } perf_cnt_bits;
+} md_perf_cnt_t;
+
+
+#endif /* !__ASSEMBLY__ */
+
+
+#define DIR_ERROR_VALID_MASK 0xe000000000000000
+#define DIR_ERROR_VALID_SHFT 61
+#define DIR_ERROR_VALID_UCE 0x8000000000000000
+#define DIR_ERROR_VALID_AE 0x4000000000000000
+#define DIR_ERROR_VALID_CE 0x2000000000000000
+
+#define MEM_ERROR_VALID_MASK 0xc000000000000000
+#define MEM_ERROR_VALID_SHFT 62
+#define MEM_ERROR_VALID_UCE 0x8000000000000000
+#define MEM_ERROR_VALID_CE 0x4000000000000000
+
+#define PROTO_ERROR_VALID_MASK 0x8000000000000000
+
+#define MISC_ERROR_VALID_MASK 0x3ff
+
+/*
+ * Mask for hspec address that is stored in the dir error register.
+ * This represents bits 29 through 3.
+ */
+#define DIR_ERR_HSPEC_MASK 0x3ffffff8
+#define ERROR_HSPEC_MASK 0x3ffffff8
+#define ERROR_HSPEC_SHFT 3
+#define ERROR_ADDR_MASK 0xfffffff8
+#define ERROR_ADDR_SHFT 3
+
+/*
+ * MD_MISC_ERROR register defines.
+ */
+
+#define MMCE_VALID_MASK 0x3ff
+#define MMCE_ILL_MSG_SHFT 8
+#define MMCE_ILL_MSG_MASK (UINT64_CAST 0x03 << MMCE_ILL_MSG_SHFT)
+#define MMCE_ILL_REV_SHFT 6
+#define MMCE_ILL_REV_MASK (UINT64_CAST 0x03 << MMCE_ILL_REV_SHFT)
+#define MMCE_LONG_PACK_SHFT 4
+#define MMCE_LONG_PACK_MASK (UINT64_CAST 0x03 << MMCE_lONG_PACK_SHFT)
+#define MMCE_SHORT_PACK_SHFT 2
+#define MMCE_SHORT_PACK_MASK (UINT64_CAST 0x03 << MMCE_SHORT_PACK_SHFT)
+#define MMCE_BAD_DATA_SHFT 0
+#define MMCE_BAD_DATA_MASK (UINT64_CAST 0x03 << MMCE_BAD_DATA_SHFT)
+
+
+#define MD_PERF_COUNTERS 6
+#define MD_PERF_SETS 6
+
+#define MEM_DIMM_MASK 0xe0000000
+#define MEM_DIMM_SHFT 29
+
+#endif /* _ASM_SN_SN0_HUBMD_H */
diff -Nru a/include/asm-mips/sn/sn0/hubni.h b/include/asm-mips/sn/sn0/hubni.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/hubni.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,255 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/hubni.h>, Revision 1.27.
+ *
+ * Copyright (C) 1992-1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SGI_SN0_HUBNI_H
+#define _ASM_SGI_SN0_HUBNI_H
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+#endif
+
+/*
+ * Hub Network Interface registers
+ *
+ * All registers in this file are subject to change until Hub chip tapeout.
+ */
+
+#define NI_BASE 0x600000
+#define NI_BASE_TABLES 0x630000
+
+#define NI_STATUS_REV_ID 0x600000 /* Hub network status, rev, and ID */
+#define NI_PORT_RESET 0x600008 /* Reset the network interface */
+#define NI_PROTECTION 0x600010 /* NI register access permissions */
+#define NI_GLOBAL_PARMS 0x600018 /* LLP parameters */
+#define NI_SCRATCH_REG0 0x600100 /* Scratch register 0 (64 bits) */
+#define NI_SCRATCH_REG1 0x600108 /* Scratch register 1 (64 bits) */
+#define NI_DIAG_PARMS 0x600110 /* Parameters for diags */
+
+#define NI_VECTOR_PARMS 0x600200 /* Vector PIO routing parameters */
+#define NI_VECTOR 0x600208 /* Vector PIO route */
+#define NI_VECTOR_DATA 0x600210 /* Vector PIO data */
+#define NI_VECTOR_STATUS 0x600300 /* Vector PIO return status */
+#define NI_RETURN_VECTOR 0x600308 /* Vector PIO return vector */
+#define NI_VECTOR_READ_DATA 0x600310 /* Vector PIO read data */
+#define NI_VECTOR_CLEAR 0x600380 /* Vector PIO read & clear status */
+
+#define NI_IO_PROTECT 0x600400 /* PIO protection bits */
+#define NI_IO_PROT_OVRRD 0x600408 /* PIO protection bit override */
+
+#define NI_AGE_CPU0_MEMORY 0x600500 /* CPU 0 memory age control */
+#define NI_AGE_CPU0_PIO 0x600508 /* CPU 0 PIO age control */
+#define NI_AGE_CPU1_MEMORY 0x600510 /* CPU 1 memory age control */
+#define NI_AGE_CPU1_PIO 0x600518 /* CPU 1 PIO age control */
+#define NI_AGE_GBR_MEMORY 0x600520 /* GBR memory age control */
+#define NI_AGE_GBR_PIO 0x600528 /* GBR PIO age control */
+#define NI_AGE_IO_MEMORY 0x600530 /* IO memory age control */
+#define NI_AGE_IO_PIO 0x600538 /* IO PIO age control */
+#define NI_AGE_REG_MIN NI_AGE_CPU0_MEMORY
+#define NI_AGE_REG_MAX NI_AGE_IO_PIO
+
+#define NI_PORT_PARMS 0x608000 /* LLP Parameters */
+#define NI_PORT_ERROR 0x608008 /* LLP Errors */
+#define NI_PORT_ERROR_CLEAR 0x608088 /* Clear the error bits */
+
+#define NI_META_TABLE0 0x638000 /* First meta routing table entry */
+#define NI_META_TABLE(_x) (NI_META_TABLE0 + (8 * (_x)))
+#define NI_META_ENTRIES 32
+
+#define NI_LOCAL_TABLE0 0x638100 /* First local routing table entry */
+#define NI_LOCAL_TABLE(_x) (NI_LOCAL_TABLE0 + (8 * (_x)))
+#define NI_LOCAL_ENTRIES 16
+
+/*
+ * NI_STATUS_REV_ID mask and shift definitions
+ * Have to use UINT64_CAST instead of 'L' suffix, for assembler.
+ */
+
+#define NSRI_8BITMODE_SHFT 30
+#define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30)
+#define NSRI_LINKUP_SHFT 29
+#define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29)
+#define NSRI_DOWNREASON_SHFT 28 /* 0=failed, 1=never came */
+#define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28) /* out of reset. */
+#define NSRI_MORENODES_SHFT 18
+#define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18) /* Max. # of nodes */
+#define MORE_MEMORY 0
+#define MORE_NODES 1
+#define NSRI_REGIONSIZE_SHFT 17
+#define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17) /* Granularity */
+#define REGIONSIZE_FINE 1
+#define REGIONSIZE_COARSE 0
+#define NSRI_NODEID_SHFT 8
+#define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8)/* Node (Hub) ID */
+#define NSRI_REV_SHFT 4
+#define NSRI_REV_MASK (UINT64_CAST 0xf << 4) /* Chip Revision */
+#define NSRI_CHIPID_SHFT 0
+#define NSRI_CHIPID_MASK (UINT64_CAST 0xf) /* Chip type ID */
+
+/*
+ * In fine mode, each node is a region. In coarse mode, there are
+ * eight nodes per region.
+ */
+#define NASID_TO_FINEREG_SHFT 0
+#define NASID_TO_COARSEREG_SHFT 3
+
+/* NI_PORT_RESET mask definitions */
+
+#define NPR_PORTRESET (UINT64_CAST 1 << 7) /* Send warm reset */
+#define NPR_LINKRESET (UINT64_CAST 1 << 1) /* Send link reset */
+#define NPR_LOCALRESET (UINT64_CAST 1) /* Reset entire hub */
+
+/* NI_PROTECTION mask and shift definitions */
+
+#define NPROT_RESETOK (UINT64_CAST 1)
+
+/* NI_GLOBAL_PARMS mask and shift definitions */
+
+#define NGP_MAXRETRY_SHFT 48 /* Maximum retries */
+#define NGP_MAXRETRY_MASK (UINT64_CAST 0x3ff << 48)
+#define NGP_TAILTOWRAP_SHFT 32 /* Tail timeout wrap */
+#define NGP_TAILTOWRAP_MASK (UINT64_CAST 0xffff << 32)
+
+#define NGP_CREDITTOVAL_SHFT 16 /* Tail timeout wrap */
+#define NGP_CREDITTOVAL_MASK (UINT64_CAST 0xf << 16)
+#define NGP_TAILTOVAL_SHFT 4 /* Tail timeout value */
+#define NGP_TAILTOVAL_MASK (UINT64_CAST 0xf << 4)
+
+/* NI_DIAG_PARMS mask and shift definitions */
+
+#define NDP_PORTTORESET (UINT64_CAST 1 << 18) /* Port tmout reset */
+#define NDP_LLP8BITMODE (UINT64_CAST 1 << 12) /* LLP 8-bit mode */
+#define NDP_PORTDISABLE (UINT64_CAST 1 << 6) /* Port disable */
+#define NDP_SENDERROR (UINT64_CAST 1) /* Send data error */
+
+/*
+ * NI_VECTOR_PARMS mask and shift definitions.
+ * TYPE may be any of the first four PIOTYPEs defined under NI_VECTOR_STATUS.
+ */
+
+#define NVP_PIOID_SHFT 40
+#define NVP_PIOID_MASK (UINT64_CAST 0x3ff << 40)
+#define NVP_WRITEID_SHFT 32
+#define NVP_WRITEID_MASK (UINT64_CAST 0xff << 32)
+#define NVP_ADDRESS_MASK (UINT64_CAST 0xffff8) /* Bits 19:3 */
+#define NVP_TYPE_SHFT 0
+#define NVP_TYPE_MASK (UINT64_CAST 0x3)
+
+/* NI_VECTOR_STATUS mask and shift definitions */
+
+#define NVS_VALID (UINT64_CAST 1 << 63)
+#define NVS_OVERRUN (UINT64_CAST 1 << 62)
+#define NVS_TARGET_SHFT 51
+#define NVS_TARGET_MASK (UINT64_CAST 0x3ff << 51)
+#define NVS_PIOID_SHFT 40
+#define NVS_PIOID_MASK (UINT64_CAST 0x3ff << 40)
+#define NVS_WRITEID_SHFT 32
+#define NVS_WRITEID_MASK (UINT64_CAST 0xff << 32)
+#define NVS_ADDRESS_MASK (UINT64_CAST 0xfffffff8) /* Bits 31:3 */
+#define NVS_TYPE_SHFT 0
+#define NVS_TYPE_MASK (UINT64_CAST 0x7)
+#define NVS_ERROR_MASK (UINT64_CAST 0x4) /* bit set means error */
+
+
+#define PIOTYPE_READ 0 /* VECTOR_PARMS and VECTOR_STATUS */
+#define PIOTYPE_WRITE 1 /* VECTOR_PARMS and VECTOR_STATUS */
+#define PIOTYPE_UNDEFINED 2 /* VECTOR_PARMS and VECTOR_STATUS */
+#define PIOTYPE_EXCHANGE 3 /* VECTOR_PARMS and VECTOR_STATUS */
+#define PIOTYPE_ADDR_ERR 4 /* VECTOR_STATUS only */
+#define PIOTYPE_CMD_ERR 5 /* VECTOR_STATUS only */
+#define PIOTYPE_PROT_ERR 6 /* VECTOR_STATUS only */
+#define PIOTYPE_UNKNOWN 7 /* VECTOR_STATUS only */
+
+/* NI_AGE_XXX mask and shift definitions */
+
+#define NAGE_VCH_SHFT 10
+#define NAGE_VCH_MASK (UINT64_CAST 3 << 10)
+#define NAGE_CC_SHFT 8
+#define NAGE_CC_MASK (UINT64_CAST 3 << 8)
+#define NAGE_AGE_SHFT 0
+#define NAGE_AGE_MASK (UINT64_CAST 0xff)
+#define NAGE_MASK (NAGE_VCH_MASK | NAGE_CC_MASK | NAGE_AGE_MASK)
+
+#define VCHANNEL_A 0
+#define VCHANNEL_B 1
+#define VCHANNEL_ANY 2
+
+/* NI_PORT_PARMS mask and shift definitions */
+
+#define NPP_NULLTO_SHFT 10
+#define NPP_NULLTO_MASK (UINT64_CAST 0x3f << 16)
+#define NPP_MAXBURST_SHFT 0
+#define NPP_MAXBURST_MASK (UINT64_CAST 0x3ff)
+#define NPP_RESET_DFLT_HUB20 ((UINT64_CAST 1 << NPP_NULLTO_SHFT) | \
+ (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
+#define NPP_RESET_DEFAULTS ((UINT64_CAST 6 << NPP_NULLTO_SHFT) | \
+ (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
+
+
+/* NI_PORT_ERROR mask and shift definitions */
+
+#define NPE_LINKRESET (UINT64_CAST 1 << 37)
+#define NPE_INTERNALERROR (UINT64_CAST 1 << 36)
+#define NPE_BADMESSAGE (UINT64_CAST 1 << 35)
+#define NPE_BADDEST (UINT64_CAST 1 << 34)
+#define NPE_FIFOOVERFLOW (UINT64_CAST 1 << 33)
+#define NPE_CREDITTO_SHFT 28
+#define NPE_CREDITTO_MASK (UINT64_CAST 0xf << 28)
+#define NPE_TAILTO_SHFT 24
+#define NPE_TAILTO_MASK (UINT64_CAST 0xf << 24)
+#define NPE_RETRYCOUNT_SHFT 16
+#define NPE_RETRYCOUNT_MASK (UINT64_CAST 0xff << 16)
+#define NPE_CBERRCOUNT_SHFT 8
+#define NPE_CBERRCOUNT_MASK (UINT64_CAST 0xff << 8)
+#define NPE_SNERRCOUNT_SHFT 0
+#define NPE_SNERRCOUNT_MASK (UINT64_CAST 0xff << 0)
+#define NPE_MASK 0x3effffffff
+
+#define NPE_COUNT_MAX 0xff
+
+#define NPE_FATAL_ERRORS (NPE_LINKRESET | NPE_INTERNALERROR | \
+ NPE_BADMESSAGE | NPE_BADDEST | \
+ NPE_FIFOOVERFLOW | NPE_CREDITTO_MASK | \
+ NPE_TAILTO_MASK)
+
+/* NI_META_TABLE mask and shift definitions */
+
+#define NMT_EXIT_PORT_MASK (UINT64_CAST 0xf)
+
+/* NI_LOCAL_TABLE mask and shift definitions */
+
+#define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf)
+
+#ifndef __ASSEMBLY__
+
+typedef union hubni_port_error_u {
+ u64 nipe_reg_value;
+ struct {
+ u64 nipe_rsvd: 26, /* unused */
+ nipe_lnk_reset: 1, /* link reset */
+ nipe_intl_err: 1, /* internal error */
+ nipe_bad_msg: 1, /* bad message */
+ nipe_bad_dest: 1, /* bad dest */
+ nipe_fifo_ovfl: 1, /* fifo overflow */
+ nipe_rsvd1: 1, /* unused */
+ nipe_credit_to: 4, /* credit timeout */
+ nipe_tail_to: 4, /* tail timeout */
+ nipe_retry_cnt: 8, /* retry error count */
+ nipe_cb_cnt: 8, /* checkbit error count */
+ nipe_sn_cnt: 8; /* sequence number count */
+ } nipe_fields_s;
+} hubni_port_error_t;
+
+#define NI_LLP_RETRY_MAX 0xff
+#define NI_LLP_CB_MAX 0xff
+#define NI_LLP_SN_MAX 0xff
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_SGI_SN0_HUBNI_H */
diff -Nru a/include/asm-mips/sn/sn0/hubpi.h b/include/asm-mips/sn/sn0/hubpi.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/hubpi.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,427 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/hubpi.h>, revision 1.28.
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SN_SN0_HUBPI_H
+#define _ASM_SN_SN0_HUBPI_H
+
+#include <linux/types.h>
+
+/*
+ * Hub I/O interface registers
+ *
+ * All registers in this file are subject to change until Hub chip tapeout.
+ * All register "addresses" are actually offsets. Use the LOCAL_HUB
+ * or REMOTE_HUB macros to synthesize an actual address
+ */
+
+#define PI_BASE 0x000000
+
+/* General protection and control registers */
+
+#define PI_CPU_PROTECT 0x000000 /* CPU Protection */
+#define PI_PROT_OVERRD 0x000008 /* Clear CPU Protection bit */
+#define PI_IO_PROTECT 0x000010 /* Interrupt Pending Protection */
+#define PI_REGION_PRESENT 0x000018 /* Indicates whether region exists */
+#define PI_CPU_NUM 0x000020 /* CPU Number ID */
+#define PI_CALIAS_SIZE 0x000028 /* Cached Alias Size */
+#define PI_MAX_CRB_TIMEOUT 0x000030 /* Maximum Timeout for CRB */
+#define PI_CRB_SFACTOR 0x000038 /* Scale factor for CRB timeout */
+
+/* CALIAS values */
+#define PI_CALIAS_SIZE_0 0
+#define PI_CALIAS_SIZE_4K 1
+#define PI_CALIAS_SIZE_8K 2
+#define PI_CALIAS_SIZE_16K 3
+#define PI_CALIAS_SIZE_32K 4
+#define PI_CALIAS_SIZE_64K 5
+#define PI_CALIAS_SIZE_128K 6
+#define PI_CALIAS_SIZE_256K 7
+#define PI_CALIAS_SIZE_512K 8
+#define PI_CALIAS_SIZE_1M 9
+#define PI_CALIAS_SIZE_2M 10
+#define PI_CALIAS_SIZE_4M 11
+#define PI_CALIAS_SIZE_8M 12
+#define PI_CALIAS_SIZE_16M 13
+#define PI_CALIAS_SIZE_32M 14
+#define PI_CALIAS_SIZE_64M 15
+
+/* Processor control and status checking */
+
+#define PI_CPU_PRESENT_A 0x000040 /* CPU Present A */
+#define PI_CPU_PRESENT_B 0x000048 /* CPU Present B */
+#define PI_CPU_ENABLE_A 0x000050 /* CPU Enable A */
+#define PI_CPU_ENABLE_B 0x000058 /* CPU Enable B */
+#define PI_REPLY_LEVEL 0x000060 /* Reply Level */
+#define PI_HARDRESET_BIT 0x020068 /* Bit cleared by s/w on SR */
+#define PI_NMI_A 0x000070 /* NMI to CPU A */
+#define PI_NMI_B 0x000078 /* NMI to CPU B */
+#define PI_NMI_OFFSET (PI_NMI_B - PI_NMI_A)
+#define PI_SOFTRESET 0x000080 /* Softreset (to both CPUs) */
+
+/* Regular Interrupt register checking. */
+
+#define PI_INT_PEND_MOD 0x000090 /* Write to set pending ints */
+#define PI_INT_PEND0 0x000098 /* Read to get pending ints */
+#define PI_INT_PEND1 0x0000a0 /* Read to get pending ints */
+#define PI_INT_MASK0_A 0x0000a8 /* Interrupt Mask 0 for CPU A */
+#define PI_INT_MASK1_A 0x0000b0 /* Interrupt Mask 1 for CPU A */
+#define PI_INT_MASK0_B 0x0000b8 /* Interrupt Mask 0 for CPU B */
+#define PI_INT_MASK1_B 0x0000c0 /* Interrupt Mask 1 for CPU B */
+
+#define PI_INT_MASK_OFFSET 0x10 /* Offset from A to B */
+
+/* Crosscall interrupts */
+
+#define PI_CC_PEND_SET_A 0x0000c8 /* CC Interrupt Pending Set, CPU A */
+#define PI_CC_PEND_SET_B 0x0000d0 /* CC Interrupt Pending Set, CPU B */
+#define PI_CC_PEND_CLR_A 0x0000d8 /* CC Interrupt Pending Clr, CPU A */
+#define PI_CC_PEND_CLR_B 0x0000e0 /* CC Interrupt Pending Clr, CPU B */
+#define PI_CC_MASK 0x0000e8 /* CC Interrupt mask */
+
+#define PI_INT_SET_OFFSET 0x08 /* Offset from A to B */
+
+/* Realtime Counter and Profiler control registers */
+
+#define PI_RT_COUNT 0x030100 /* Real Time Counter */
+#define PI_RT_COMPARE_A 0x000108 /* Real Time Compare A */
+#define PI_RT_COMPARE_B 0x000110 /* Real Time Compare B */
+#define PI_PROFILE_COMPARE 0x000118 /* L5 int to both cpus when == RTC */
+#define PI_RT_PEND_A 0x000120 /* Set if RT int for A pending */
+#define PI_RT_PEND_B 0x000128 /* Set if RT int for B pending */
+#define PI_PROF_PEND_A 0x000130 /* Set if Prof int for A pending */
+#define PI_PROF_PEND_B 0x000138 /* Set if Prof int for B pending */
+#define PI_RT_EN_A 0x000140 /* RT int for CPU A enable */
+#define PI_RT_EN_B 0x000148 /* RT int for CPU B enable */
+#define PI_PROF_EN_A 0x000150 /* PROF int for CPU A enable */
+#define PI_PROF_EN_B 0x000158 /* PROF int for CPU B enable */
+#define PI_RT_LOCAL_CTRL 0x000160 /* RT control register */
+#define PI_RT_FILTER_CTRL 0x000168 /* GCLK Filter control register */
+
+#define PI_COUNT_OFFSET 0x08 /* A to B offset for all counts */
+
+/* Built-In Self Test support */
+
+#define PI_BIST_WRITE_DATA 0x000200 /* BIST write data */
+#define PI_BIST_READ_DATA 0x000208 /* BIST read data */
+#define PI_BIST_COUNT_TARG 0x000210 /* BIST Count and Target */
+#define PI_BIST_READY 0x000218 /* BIST Ready indicator */
+#define PI_BIST_SHIFT_LOAD 0x000220 /* BIST control */
+#define PI_BIST_SHIFT_UNLOAD 0x000228 /* BIST control */
+#define PI_BIST_ENTER_RUN 0x000230 /* BIST control */
+
+/* Graphics control registers */
+
+#define PI_GFX_PAGE_A 0x000300 /* Graphics page A */
+#define PI_GFX_CREDIT_CNTR_A 0x000308 /* Graphics credit counter A */
+#define PI_GFX_BIAS_A 0x000310 /* Graphics bias A */
+#define PI_GFX_INT_CNTR_A 0x000318 /* Graphics interrupt counter A */
+#define PI_GFX_INT_CMP_A 0x000320 /* Graphics interrupt comparator A */
+#define PI_GFX_PAGE_B 0x000328 /* Graphics page B */
+#define PI_GFX_CREDIT_CNTR_B 0x000330 /* Graphics credit counter B */
+#define PI_GFX_BIAS_B 0x000338 /* Graphics bias B */
+#define PI_GFX_INT_CNTR_B 0x000340 /* Graphics interrupt counter B */
+#define PI_GFX_INT_CMP_B 0x000348 /* Graphics interrupt comparator B */
+
+#define PI_GFX_OFFSET (PI_GFX_PAGE_B - PI_GFX_PAGE_A)
+#define PI_GFX_PAGE_ENABLE 0x0000010000000000LL
+
+/* Error and timeout registers */
+#define PI_ERR_INT_PEND 0x000400 /* Error Interrupt Pending */
+#define PI_ERR_INT_MASK_A 0x000408 /* Error Interrupt mask for CPU A */
+#define PI_ERR_INT_MASK_B 0x000410 /* Error Interrupt mask for CPU B */
+#define PI_ERR_STACK_ADDR_A 0x000418 /* Error stack address for CPU A */
+#define PI_ERR_STACK_ADDR_B 0x000420 /* Error stack address for CPU B */
+#define PI_ERR_STACK_SIZE 0x000428 /* Error Stack Size */
+#define PI_ERR_STATUS0_A 0x000430 /* Error Status 0A */
+#define PI_ERR_STATUS0_A_RCLR 0x000438 /* Error Status 0A clear on read */
+#define PI_ERR_STATUS1_A 0x000440 /* Error Status 1A */
+#define PI_ERR_STATUS1_A_RCLR 0x000448 /* Error Status 1A clear on read */
+#define PI_ERR_STATUS0_B 0x000450 /* Error Status 0B */
+#define PI_ERR_STATUS0_B_RCLR 0x000458 /* Error Status 0B clear on read */
+#define PI_ERR_STATUS1_B 0x000460 /* Error Status 1B */
+#define PI_ERR_STATUS1_B_RCLR 0x000468 /* Error Status 1B clear on read */
+#define PI_SPOOL_CMP_A 0x000470 /* Spool compare for CPU A */
+#define PI_SPOOL_CMP_B 0x000478 /* Spool compare for CPU B */
+#define PI_CRB_TIMEOUT_A 0x000480 /* Timed out CRB entries for A */
+#define PI_CRB_TIMEOUT_B 0x000488 /* Timed out CRB entries for B */
+#define PI_SYSAD_ERRCHK_EN 0x000490 /* Enables SYSAD error checking */
+#define PI_BAD_CHECK_BIT_A 0x000498 /* Force SYSAD check bit error */
+#define PI_BAD_CHECK_BIT_B 0x0004a0 /* Force SYSAD check bit error */
+#define PI_NACK_CNT_A 0x0004a8 /* Consecutive NACK counter */
+#define PI_NACK_CNT_B 0x0004b0 /* " " for CPU B */
+#define PI_NACK_CMP 0x0004b8 /* NACK count compare */
+#define PI_STACKADDR_OFFSET (PI_ERR_STACK_ADDR_B - PI_ERR_STACK_ADDR_A)
+#define PI_ERRSTAT_OFFSET (PI_ERR_STATUS0_B - PI_ERR_STATUS0_A)
+#define PI_RDCLR_OFFSET (PI_ERR_STATUS0_A_RCLR - PI_ERR_STATUS0_A)
+
+/* Bits in PI_ERR_INT_PEND */
+#define PI_ERR_SPOOL_CMP_B 0x00000001 /* Spool end hit high water */
+#define PI_ERR_SPOOL_CMP_A 0x00000002
+#define PI_ERR_SPUR_MSG_B 0x00000004 /* Spurious message intr. */
+#define PI_ERR_SPUR_MSG_A 0x00000008
+#define PI_ERR_WRB_TERR_B 0x00000010 /* WRB TERR */
+#define PI_ERR_WRB_TERR_A 0x00000020
+#define PI_ERR_WRB_WERR_B 0x00000040 /* WRB WERR */
+#define PI_ERR_WRB_WERR_A 0x00000080
+#define PI_ERR_SYSSTATE_B 0x00000100 /* SysState parity error */
+#define PI_ERR_SYSSTATE_A 0x00000200
+#define PI_ERR_SYSAD_DATA_B 0x00000400 /* SysAD data parity error */
+#define PI_ERR_SYSAD_DATA_A 0x00000800
+#define PI_ERR_SYSAD_ADDR_B 0x00001000 /* SysAD addr parity error */
+#define PI_ERR_SYSAD_ADDR_A 0x00002000
+#define PI_ERR_SYSCMD_DATA_B 0x00004000 /* SysCmd data parity error */
+#define PI_ERR_SYSCMD_DATA_A 0x00008000
+#define PI_ERR_SYSCMD_ADDR_B 0x00010000 /* SysCmd addr parity error */
+#define PI_ERR_SYSCMD_ADDR_A 0x00020000
+#define PI_ERR_BAD_SPOOL_B 0x00040000 /* Error spooling to memory */
+#define PI_ERR_BAD_SPOOL_A 0x00080000
+#define PI_ERR_UNCAC_UNCORR_B 0x00100000 /* Uncached uncorrectable */
+#define PI_ERR_UNCAC_UNCORR_A 0x00200000
+#define PI_ERR_SYSSTATE_TAG_B 0x00400000 /* SysState tag parity error */
+#define PI_ERR_SYSSTATE_TAG_A 0x00800000
+#define PI_ERR_MD_UNCORR 0x01000000 /* Must be cleared in MD */
+
+#define PI_ERR_CLEAR_ALL_A 0x00aaaaaa
+#define PI_ERR_CLEAR_ALL_B 0x00555555
+
+
+/*
+ * The following three macros define all possible error int pends.
+ */
+
+#define PI_FATAL_ERR_CPU_A (PI_ERR_SYSSTATE_TAG_A | \
+ PI_ERR_BAD_SPOOL_A | \
+ PI_ERR_SYSCMD_ADDR_A | \
+ PI_ERR_SYSCMD_DATA_A | \
+ PI_ERR_SYSAD_ADDR_A | \
+ PI_ERR_SYSAD_DATA_A | \
+ PI_ERR_SYSSTATE_A)
+
+#define PI_MISC_ERR_CPU_A (PI_ERR_UNCAC_UNCORR_A | \
+ PI_ERR_WRB_WERR_A | \
+ PI_ERR_WRB_TERR_A | \
+ PI_ERR_SPUR_MSG_A | \
+ PI_ERR_SPOOL_CMP_A)
+
+#define PI_FATAL_ERR_CPU_B (PI_ERR_SYSSTATE_TAG_B | \
+ PI_ERR_BAD_SPOOL_B | \
+ PI_ERR_SYSCMD_ADDR_B | \
+ PI_ERR_SYSCMD_DATA_B | \
+ PI_ERR_SYSAD_ADDR_B | \
+ PI_ERR_SYSAD_DATA_B | \
+ PI_ERR_SYSSTATE_B)
+
+#define PI_MISC_ERR_CPU_B (PI_ERR_UNCAC_UNCORR_B | \
+ PI_ERR_WRB_WERR_B | \
+ PI_ERR_WRB_TERR_B | \
+ PI_ERR_SPUR_MSG_B | \
+ PI_ERR_SPOOL_CMP_B)
+
+#define PI_ERR_GENERIC (PI_ERR_MD_UNCORR)
+
+/*
+ * Error types for PI_ERR_STATUS0_[AB] and error stack:
+ * Use the write types if WRBRRB is 1 else use the read types
+ */
+
+/* Fields in PI_ERR_STATUS0_[AB] */
+#define PI_ERR_ST0_TYPE_MASK 0x0000000000000007
+#define PI_ERR_ST0_TYPE_SHFT 0
+#define PI_ERR_ST0_REQNUM_MASK 0x0000000000000038
+#define PI_ERR_ST0_REQNUM_SHFT 3
+#define PI_ERR_ST0_SUPPL_MASK 0x000000000001ffc0
+#define PI_ERR_ST0_SUPPL_SHFT 6
+#define PI_ERR_ST0_CMD_MASK 0x0000000001fe0000
+#define PI_ERR_ST0_CMD_SHFT 17
+#define PI_ERR_ST0_ADDR_MASK 0x3ffffffffe000000
+#define PI_ERR_ST0_ADDR_SHFT 25
+#define PI_ERR_ST0_OVERRUN_MASK 0x4000000000000000
+#define PI_ERR_ST0_OVERRUN_SHFT 62
+#define PI_ERR_ST0_VALID_MASK 0x8000000000000000
+#define PI_ERR_ST0_VALID_SHFT 63
+
+/* Fields in PI_ERR_STATUS1_[AB] */
+#define PI_ERR_ST1_SPOOL_MASK 0x00000000001fffff
+#define PI_ERR_ST1_SPOOL_SHFT 0
+#define PI_ERR_ST1_TOUTCNT_MASK 0x000000001fe00000
+#define PI_ERR_ST1_TOUTCNT_SHFT 21
+#define PI_ERR_ST1_INVCNT_MASK 0x0000007fe0000000
+#define PI_ERR_ST1_INVCNT_SHFT 29
+#define PI_ERR_ST1_CRBNUM_MASK 0x0000038000000000
+#define PI_ERR_ST1_CRBNUM_SHFT 39
+#define PI_ERR_ST1_WRBRRB_MASK 0x0000040000000000
+#define PI_ERR_ST1_WRBRRB_SHFT 42
+#define PI_ERR_ST1_CRBSTAT_MASK 0x001ff80000000000
+#define PI_ERR_ST1_CRBSTAT_SHFT 43
+#define PI_ERR_ST1_MSGSRC_MASK 0xffe0000000000000
+#define PI_ERR_ST1_MSGSRC_SHFT 53
+
+/* Fields in the error stack */
+#define PI_ERR_STK_TYPE_MASK 0x0000000000000003
+#define PI_ERR_STK_TYPE_SHFT 0
+#define PI_ERR_STK_SUPPL_MASK 0x0000000000000038
+#define PI_ERR_STK_SUPPL_SHFT 3
+#define PI_ERR_STK_REQNUM_MASK 0x00000000000001c0
+#define PI_ERR_STK_REQNUM_SHFT 6
+#define PI_ERR_STK_CRBNUM_MASK 0x0000000000000e00
+#define PI_ERR_STK_CRBNUM_SHFT 9
+#define PI_ERR_STK_WRBRRB_MASK 0x0000000000001000
+#define PI_ERR_STK_WRBRRB_SHFT 12
+#define PI_ERR_STK_CRBSTAT_MASK 0x00000000007fe000
+#define PI_ERR_STK_CRBSTAT_SHFT 13
+#define PI_ERR_STK_CMD_MASK 0x000000007f800000
+#define PI_ERR_STK_CMD_SHFT 23
+#define PI_ERR_STK_ADDR_MASK 0xffffffff80000000
+#define PI_ERR_STK_ADDR_SHFT 31
+
+/* Error type in the error status or stack on Read CRBs */
+#define PI_ERR_RD_PRERR 1
+#define PI_ERR_RD_DERR 2
+#define PI_ERR_RD_TERR 3
+
+/* Error type in the error status or stack on Write CRBs */
+#define PI_ERR_WR_WERR 0
+#define PI_ERR_WR_PWERR 1
+#define PI_ERR_WR_TERR 3
+
+/* Read or Write CRB in error status or stack */
+#define PI_ERR_RRB 0
+#define PI_ERR_WRB 1
+#define PI_ERR_ANY_CRB 2
+
+/* Address masks in the error status and error stack are not the same */
+#define ERR_STK_ADDR_SHFT 7
+#define ERR_STAT0_ADDR_SHFT 3
+
+#define PI_MIN_STACK_SIZE 4096 /* For figuring out the size to set */
+#define PI_STACK_SIZE_SHFT 12 /* 4k */
+
+#define ERR_STACK_SIZE_BYTES(_sz) \
+ ((_sz) ? (PI_MIN_STACK_SIZE << ((_sz) - 1)) : 0)
+
+#ifndef __ASSEMBLY__
+/*
+ * format of error stack and error status registers.
+ */
+
+struct err_stack_format {
+ u64 sk_addr : 33, /* address */
+ sk_cmd : 8, /* message command */
+ sk_crb_sts : 10, /* status from RRB or WRB */
+ sk_rw_rb : 1, /* RRB == 0, WRB == 1 */
+ sk_crb_num : 3, /* WRB (0 to 7) or RRB (0 to 4) */
+ sk_t5_req : 3, /* RRB T5 request number */
+ sk_suppl : 3, /* lowest 3 bit of supplemental */
+ sk_err_type: 3; /* error type */
+};
+
+typedef union pi_err_stack {
+ u64 pi_stk_word;
+ struct err_stack_format pi_stk_fmt;
+} pi_err_stack_t;
+
+struct err_status0_format {
+ u64 s0_valid : 1, /* Valid */
+ s0_ovr_run : 1, /* Overrun, spooled to memory */
+ s0_addr : 37, /* address */
+ s0_cmd : 8, /* message command */
+ s0_supl : 11, /* message supplemental field */
+ s0_t5_req : 3, /* RRB T5 request number */
+ s0_err_type: 3; /* error type */
+};
+
+typedef union pi_err_stat0 {
+ u64 pi_stat0_word;
+ struct err_status0_format pi_stat0_fmt;
+} pi_err_stat0_t;
+
+struct err_status1_format {
+ u64 s1_src : 11, /* message source */
+ s1_crb_sts : 10, /* status from RRB or WRB */
+ s1_rw_rb : 1, /* RRB == 0, WRB == 1 */
+ s1_crb_num : 3, /* WRB (0 to 7) or RRB (0 to 4) */
+ s1_inval_cnt:10, /* signed invalidate counter RRB */
+ s1_to_cnt : 8, /* crb timeout counter */
+ s1_spl_cnt : 21; /* number spooled to memory */
+};
+
+typedef union pi_err_stat1 {
+ u64 pi_stat1_word;
+ struct err_status1_format pi_stat1_fmt;
+} pi_err_stat1_t;
+
+typedef u64 rtc_time_t;
+
+#endif /* !__ASSEMBLY__ */
+
+
+/* Bits in PI_SYSAD_ERRCHK_EN */
+#define PI_SYSAD_ERRCHK_ECCGEN 0x01 /* Enable ECC generation */
+#define PI_SYSAD_ERRCHK_QUALGEN 0x02 /* Enable data quality signal gen. */
+#define PI_SYSAD_ERRCHK_SADP 0x04 /* Enable SysAD parity checking */
+#define PI_SYSAD_ERRCHK_CMDP 0x08 /* Enable SysCmd parity checking */
+#define PI_SYSAD_ERRCHK_STATE 0x10 /* Enable SysState parity checking */
+#define PI_SYSAD_ERRCHK_QUAL 0x20 /* Enable data quality checking */
+#define PI_SYSAD_CHECK_ALL 0x3f /* Generate and check all signals. */
+
+/* Interrupt pending bits on R10000 */
+
+#define HUB_IP_PEND0 0x0400
+#define HUB_IP_PEND1_CC 0x0800
+#define HUB_IP_RT 0x1000
+#define HUB_IP_PROF 0x2000
+#define HUB_IP_ERROR 0x4000
+#define HUB_IP_MASK 0x7c00
+
+/* PI_RT_LOCAL_CTRL mask and shift definitions */
+
+#define PRLC_USE_INT_SHFT 16
+#define PRLC_USE_INT_MASK (UINT64_CAST 1 << 16)
+#define PRLC_USE_INT (UINT64_CAST 1 << 16)
+#define PRLC_GCLK_SHFT 15
+#define PRLC_GCLK_MASK (UINT64_CAST 1 << 15)
+#define PRLC_GCLK (UINT64_CAST 1 << 15)
+#define PRLC_GCLK_COUNT_SHFT 8
+#define PRLC_GCLK_COUNT_MASK (UINT64_CAST 0x7f << 8)
+#define PRLC_MAX_COUNT_SHFT 1
+#define PRLC_MAX_COUNT_MASK (UINT64_CAST 0x7f << 1)
+#define PRLC_GCLK_EN_SHFT 0
+#define PRLC_GCLK_EN_MASK (UINT64_CAST 1)
+#define PRLC_GCLK_EN (UINT64_CAST 1)
+
+/* PI_RT_FILTER_CTRL mask and shift definitions */
+
+#if 0
+/*
+ * XXX - This register's definition has changed, but it's only implemented
+ * in Hub 2.
+ */
+#define PRFC_DROP_COUNT_SHFT 27
+#define PRFC_DROP_COUNT_MASK (UINT64_CAST 0x3ff << 27)
+#define PRFC_DROP_CTR_SHFT 18
+#define PRFC_DROP_CTR_MASK (UINT64_CAST 0x1ff << 18)
+#define PRFC_MASK_ENABLE_SHFT 10
+#define PRFC_MASK_ENABLE_MASK (UINT64_CAST 0x7f << 10)
+#define PRFC_MASK_CTR_SHFT 2
+#define PRFC_MASK_CTR_MASK (UINT64_CAST 0xff << 2)
+#define PRFC_OFFSET_SHFT 0
+#define PRFC_OFFSET_MASK (UINT64_CAST 3)
+#endif /* 0 */
+
+
+/*
+ * Bits for NACK_CNT_A/B and NACK_CMP
+ */
+#define PI_NACK_CNT_EN_SHFT 20
+#define PI_NACK_CNT_EN_MASK 0x100000
+#define PI_NACK_CNT_MASK 0x0fffff
+#define PI_NACK_CNT_MAX 0x0fffff
+
+#endif /* _ASM_SN_SN0_HUBPI_H */
diff -Nru a/include/asm-mips/sn/sn0/ip27.h b/include/asm-mips/sn/sn0/ip27.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/ip27.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,97 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/IP27.h>.
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SN_SN0_IP27_H
+#define _ASM_SN_SN0_IP27_H
+
+#include <asm/mipsregs.h>
+
+/*
+ * Simple definitions for the masks which remove SW bits from pte.
+ */
+
+#define TLBLO_HWBITSHIFT 0 /* Shift value, for masking */
+
+#ifndef __ASSEMBLY__
+
+#define CAUSE_BERRINTR IE_IRQ5
+
+#define ECCF_CACHE_ERR 0
+#define ECCF_TAGLO 1
+#define ECCF_ECC 2
+#define ECCF_ERROREPC 3
+#define ECCF_PADDR 4
+#define ECCF_SIZE (5 * sizeof(long))
+
+#endif /* !__ASSEMBLY__ */
+
+#ifdef __ASSEMBLY__
+
+/*
+ * KL_GET_CPUNUM (similar to EV_GET_SPNUM for EVEREST platform) reads
+ * the processor number of the calling processor. The proc parameters
+ * must be a register.
+ */
+#define KL_GET_CPUNUM(proc) \
+ dli proc, LOCAL_HUB(0); \
+ ld proc, PI_CPU_NUM(proc)
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * R10000 status register interrupt bit mask usage for IP27.
+ */
+#define SRB_SWTIMO IE_SW0 /* 0x0100 */
+#define SRB_NET IE_SW1 /* 0x0200 */
+#define SRB_DEV0 IE_IRQ0 /* 0x0400 */
+#define SRB_DEV1 IE_IRQ1 /* 0x0800 */
+#define SRB_TIMOCLK IE_IRQ2 /* 0x1000 */
+#define SRB_PROFCLK IE_IRQ3 /* 0x2000 */
+#define SRB_ERR IE_IRQ4 /* 0x4000 */
+#define SRB_SCHEDCLK IE_IRQ5 /* 0x8000 */
+
+#define SR_IBIT_HI SRB_DEV0
+#define SR_IBIT_PROF SRB_PROFCLK
+
+#define SRB_SWTIMO_IDX 0
+#define SRB_NET_IDX 1
+#define SRB_DEV0_IDX 2
+#define SRB_DEV1_IDX 3
+#define SRB_TIMOCLK_IDX 4
+#define SRB_PROFCLK_IDX 5
+#define SRB_ERR_IDX 6
+#define SRB_SCHEDCLK_IDX 7
+
+#define NUM_CAUSE_INTRS 8
+
+#define SCACHE_LINESIZE 128
+#define SCACHE_LINEMASK (SCACHE_LINESIZE - 1)
+
+#include <asm/sn/addrs.h>
+
+#define LED_CYCLE_MASK 0x0f
+#define LED_CYCLE_SHFT 4
+
+#define SEND_NMI(_nasid, _slice) \
+ REMOTE_HUB_S((_nasid), (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
+
+/* Sanity hazzard ... Below all the Origin hacks are following. */
+
+#define CPU_RESCHED_A_IRQ 0
+#define CPU_RESCHED_B_IRQ 1
+#define CPU_CALL_A_IRQ 2
+#define CPU_CALL_B_IRQ 3
+#define BASE_PCI_IRQ 4
+
+#define SN00_BRIDGE 0x9200000008000000
+#define SN00I_BRIDGE0 0x920000000b000000
+#define SN00I_BRIDGE1 0x920000000e000000
+#define SN00I_BRIDGE2 0x920000000f000000
+#endif /* _ASM_SN_SN0_IP27_H */
diff -Nru a/include/asm-mips/sn/sn0/sn0_fru.h b/include/asm-mips/sn/sn0/sn0_fru.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn0/sn0_fru.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,44 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Derived from IRIX <sys/SN/SN0/sn0_fru.h>
+ *
+ * Copyright (C) 1992 - 1997, 1999 Silcon Graphics, Inc.
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_SN_SN0_SN0_FRU_H
+#define _ASM_SN_SN0_SN0_FRU_H
+
+#define MAX_DIMMS 8 /* max # of dimm banks */
+#define MAX_PCIDEV 8 /* max # of pci devices on a pci bus */
+
+typedef unsigned char confidence_t;
+
+typedef struct kf_mem_s {
+ confidence_t km_confidence; /* confidence level that the memory is bad
+ * is this necessary ?
+ */
+ confidence_t km_dimm[MAX_DIMMS];
+ /* confidence level that dimm[i] is bad
+ *I think this is the right number
+ */
+
+} kf_mem_t;
+
+typedef struct kf_cpu_s {
+ confidence_t kc_confidence; /* confidence level that cpu is bad */
+ confidence_t kc_icache; /* confidence level that instr. cache is bad */
+ confidence_t kc_dcache; /* confidence level that data cache is bad */
+ confidence_t kc_scache; /* confidence level that sec. cache is bad */
+ confidence_t kc_sysbus; /* confidence level that sysad/cmd/state bus is bad */
+} kf_cpu_t;
+
+typedef struct kf_pci_bus_s {
+ confidence_t kpb_belief; /* confidence level that the pci bus is bad */
+ confidence_t kpb_pcidev_belief[MAX_PCIDEV];
+ /* confidence level that the pci dev is bad */
+} kf_pci_bus_t;
+
+#endif /* _ASM_SN_SN0_SN0_FRU_H */
diff -Nru a/include/asm-mips/sn/sn_private.h b/include/asm-mips/sn/sn_private.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/sn_private.h Sun Aug 3 13:14:50 2003
@@ -0,0 +1,11 @@
+extern nasid_t master_nasid;
+
+extern cnodeid_t get_compact_nodeid(void);
+extern void hub_rtc_init(cnodeid_t);
+extern void cpu_time_init(void);
+extern void per_cpu_init(void);
+extern void install_cpuintr(int cpu);
+extern void install_tlbintr(int cpu);
+extern void setup_replication_mask(int);
+extern void replicate_kernel_text(int);
+extern pfn_t node_getfirstfree(cnodeid_t);
diff -Nru a/include/asm-mips/sn/types.h b/include/asm-mips/sn/types.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/sn/types.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999 by Ralf Baechle
+ */
+#ifndef _ASM_SN_TYPES_H
+#define _ASM_SN_TYPES_H
+
+#include <linux/types.h>
+
+typedef unsigned long cpuid_t;
+typedef unsigned long cnodemask_t;
+typedef signed short nasid_t; /* node id in numa-as-id space */
+typedef signed short cnodeid_t; /* node id in compact-id space */
+typedef signed char partid_t; /* partition ID type */
+typedef signed short moduleid_t; /* user-visible module number type */
+typedef signed short cmoduleid_t; /* kernel compact module id type */
+typedef unsigned char clusterid_t; /* Clusterid of the cell */
+typedef unsigned long pfn_t;
+
+typedef dev_t vertex_hdl_t; /* hardware graph vertex handle */
+
+#endif /* _ASM_SN_TYPES_H */
diff -Nru a/include/asm-mips/sni.h b/include/asm-mips/sni.h
--- a/include/asm-mips/sni.h Sun Aug 3 13:14:49 2003
+++ b/include/asm-mips/sni.h Sun Aug 3 13:14:49 2003
@@ -1,5 +1,4 @@
-/* $Id: sni.h,v 1.2 1998/09/19 19:19:39 ralf Exp $
- *
+/*
* SNI specific definitions
*
* This file is subject to the terms and conditions of the GNU General Public
@@ -8,10 +7,10 @@
*
* Copyright (C) 1997, 1998 by Ralf Baechle
*/
-#ifndef __ASM_MIPS_SNI_H
-#define __ASM_MIPS_SNI_H
+#ifndef __ASM_SNI_H
+#define __ASM_SNI_H
-#define SNI_PORT_BASE 0xb4000000
+#define SNI_PORT_BASE 0xb4000000
/*
* ASIC PCI registers for little endian configuration.
@@ -102,4 +101,4 @@
/* PCI EISA Interrupt acknowledge */
#define PCIMT_INT_ACKNOWLEDGE 0xba000000
-#endif /* __ASM_MIPS_SNI_H */
+#endif /* __ASM_SNI_H */
diff -Nru a/include/asm-mips/socket.h b/include/asm-mips/socket.h
--- a/include/asm-mips/socket.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/socket.h Sun Aug 3 13:14:51 2003
@@ -1,3 +1,11 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997, 1999, 2000, 2001 Ralf Baechle
+ * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
+ */
#ifndef _ASM_SOCKET_H
#define _ASM_SOCKET_H
diff -Nru a/include/asm-mips/sockios.h b/include/asm-mips/sockios.h
--- a/include/asm-mips/sockios.h Sun Aug 3 13:14:51 2003
+++ b/include/asm-mips/sockios.h Sun Aug 3 13:14:51 2003
@@ -7,8 +7,8 @@
*
* Copyright (C) 1995 by Ralf Baechle
*/
-#ifndef __ASM_MIPS_SOCKIOS_H
-#define __ASM_MIPS_SOCKIOS_H
+#ifndef _ASM_SOCKIOS_H
+#define _ASM_SOCKIOS_H
#include <asm/ioctl.h>
@@ -22,4 +22,4 @@
#define SIOCGSTAMP 0x8906 /* Get stamp - linux-specific */
-#endif /* __ASM_MIPS_SOCKIOS_H */
+#endif /* _ASM_SOCKIOS_H */
diff -Nru a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
--- a/include/asm-mips/stackframe.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/stackframe.h Sun Aug 3 13:14:44 2003
@@ -3,79 +3,111 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994, 1995, 1996, 2001 Ralf Baechle
- * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
+ * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
+ * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
+ * Copyright (C) 1999 Silicon Graphics, Inc.
*/
-#ifndef __ASM_STACKFRAME_H
-#define __ASM_STACKFRAME_H
+#ifndef _ASM_STACKFRAME_H
+#define _ASM_STACKFRAME_H
#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/mipsregs.h>
-#include <asm/processor.h>
+#include <linux/threads.h>
+
#include <asm/asm.h>
+#include <asm/mipsregs.h>
#include <asm/offset.h>
.macro SAVE_AT
.set push
.set noat
- sw $1, PT_R1(sp)
+ LONG_S $1, PT_R1(sp)
.set pop
.endm
.macro SAVE_TEMP
mfhi v1
- sw $8, PT_R8(sp)
- sw $9, PT_R9(sp)
- sw v1, PT_HI(sp)
+ LONG_S $8, PT_R8(sp)
+ LONG_S $9, PT_R9(sp)
+ LONG_S v1, PT_HI(sp)
mflo v1
- sw $10,PT_R10(sp)
- sw $11, PT_R11(sp)
- sw v1, PT_LO(sp)
- sw $12, PT_R12(sp)
- sw $13, PT_R13(sp)
- sw $14, PT_R14(sp)
- sw $15, PT_R15(sp)
- sw $24, PT_R24(sp)
+ LONG_S $10, PT_R10(sp)
+ LONG_S $11, PT_R11(sp)
+ LONG_S v1, PT_LO(sp)
+ LONG_S $12, PT_R12(sp)
+ LONG_S $13, PT_R13(sp)
+ LONG_S $14, PT_R14(sp)
+ LONG_S $15, PT_R15(sp)
+ LONG_S $24, PT_R24(sp)
.endm
.macro SAVE_STATIC
- sw $16, PT_R16(sp)
- sw $17, PT_R17(sp)
- sw $18, PT_R18(sp)
- sw $19, PT_R19(sp)
- sw $20, PT_R20(sp)
- sw $21, PT_R21(sp)
- sw $22, PT_R22(sp)
- sw $23, PT_R23(sp)
- sw $30, PT_R30(sp)
+ LONG_S $16, PT_R16(sp)
+ LONG_S $17, PT_R17(sp)
+ LONG_S $18, PT_R18(sp)
+ LONG_S $19, PT_R19(sp)
+ LONG_S $20, PT_R20(sp)
+ LONG_S $21, PT_R21(sp)
+ LONG_S $22, PT_R22(sp)
+ LONG_S $23, PT_R23(sp)
+ LONG_S $30, PT_R30(sp)
.endm
#ifdef CONFIG_SMP
- .macro GET_SAVED_SP
- mfc0 k0, CP0_CONTEXT
- lui k1, %hi(kernelsp)
- srl k0, k0, 23
- sll k0, k0, 2
- addu k1, k0
- lw k1, %lo(kernelsp)(k1)
+ .macro get_saved_sp /* SMP variation */
+#ifdef CONFIG_MIPS32
+ mfc0 k0, CP0_CONTEXT
+ lui k1, %hi(kernelsp)
+ srl k0, k0, 23
+ sll k0, k0, 2
+ addu k1, k0
+ LONG_L k1, %lo(kernelsp)(k1)
+#endif
+#ifdef CONFIG_MIPS64
+ MFC0 k1, CP0_CONTEXT
+ dsra k1, 23
+ lui k0, %hi(pgd_current)
+ daddiu k0, %lo(pgd_current)
+ dsubu k1, k0
+ lui k0, %hi(kernelsp)
+ daddu k1, k0
+ LONG_L k1, %lo(kernelsp)(k1)
+#endif
.endm
+ .macro set_saved_sp stackp temp temp2
+#ifdef CONFIG_MIPS32
+ mfc0 \temp, CP0_CONTEXT
+ srl \temp, 23
+ sll \temp, 2
+ LONG_S \stackp, kernelsp(temp)
+#endif
+#ifdef CONFIG_MIPS64
+ lw \temp, TI_CPU(gp)
+ dsll \temp, 3
+ lui \temp2, %hi(kernelsp)
+ daddu \temp, \temp2
+ LONG_S \stackp, %lo(kernelsp)(\temp)
+#endif
+ .endm
#else
- .macro GET_SAVED_SP
+ .macro get_saved_sp /* Uniprocessor variation */
lui k1, %hi(kernelsp)
- lw k1, %lo(kernelsp)(k1)
+ LONG_L k1, %lo(kernelsp)(k1)
+ .endm
+
+ .macro set_saved_sp stackp temp temp2
+ LONG_S \stackp, kernelsp
.endm
#endif
#ifdef CONFIG_PREEMPT
- .macro BUMP_LOCK_COUNT
+ .macro bump_lock_count
lw t0, TI_PRE_COUNT($28)
addiu t0, t0, 1
sw t0, TI_PRE_COUNT($28)
.endm
#else
- .macro BUMP_LOCK_COUNT
+ .macro bump_lock_count
.endm
#endif
@@ -89,30 +121,29 @@
move k1, sp
.set reorder
/* Called from user mode, new stack. */
- GET_SAVED_SP
-8:
- move k0, sp
- subu sp, k1, PT_SIZE
- sw k0, PT_R29(sp)
- sw $3, PT_R3(sp)
- sw $0, PT_R0(sp)
+ get_saved_sp
+8: move k0, sp
+ PTR_SUBU sp, k1, PT_SIZE
+ LONG_S k0, PT_R29(sp)
+ LONG_S $3, PT_R3(sp)
+ LONG_S $0, PT_R0(sp)
mfc0 v1, CP0_STATUS
- sw $2, PT_R2(sp)
- sw v1, PT_STATUS(sp)
- sw $4, PT_R4(sp)
+ LONG_S $2, PT_R2(sp)
+ LONG_S v1, PT_STATUS(sp)
+ LONG_S $4, PT_R4(sp)
mfc0 v1, CP0_CAUSE
- sw $5, PT_R5(sp)
- sw v1, PT_CAUSE(sp)
- sw $6, PT_R6(sp)
- mfc0 v1, CP0_EPC
- sw $7, PT_R7(sp)
- sw v1, PT_EPC(sp)
- sw $25, PT_R25(sp)
- sw $28, PT_R28(sp)
- sw $31, PT_R31(sp)
- ori $28, sp, 0x1fff
- xori $28, 0x1fff
- BUMP_LOCK_COUNT
+ LONG_S $5, PT_R5(sp)
+ LONG_S v1, PT_CAUSE(sp)
+ LONG_S $6, PT_R6(sp)
+ MFC0 v1, CP0_EPC
+ LONG_S $7, PT_R7(sp)
+ LONG_S v1, PT_EPC(sp)
+ LONG_S $25, PT_R25(sp)
+ LONG_S $28, PT_R28(sp)
+ LONG_S $31, PT_R31(sp)
+ ori $28, sp, _THREAD_MASK
+ xori $28, _THREAD_MASK
+ bump_lock_count
.set pop
.endm
@@ -126,36 +157,36 @@
.macro RESTORE_AT
.set push
.set noat
- lw $1, PT_R1(sp)
+ LONG_L $1, PT_R1(sp)
.set pop
.endm
.macro RESTORE_TEMP
- lw $24, PT_LO(sp)
- lw $8, PT_R8(sp)
- lw $9, PT_R9(sp)
+ LONG_L $24, PT_LO(sp)
+ LONG_L $8, PT_R8(sp)
+ LONG_L $9, PT_R9(sp)
mtlo $24
- lw $24, PT_HI(sp)
- lw $10,PT_R10(sp)
- lw $11, PT_R11(sp)
+ LONG_L $24, PT_HI(sp)
+ LONG_L $10, PT_R10(sp)
+ LONG_L $11, PT_R11(sp)
mthi $24
- lw $12, PT_R12(sp)
- lw $13, PT_R13(sp)
- lw $14, PT_R14(sp)
- lw $15, PT_R15(sp)
- lw $24, PT_R24(sp)
+ LONG_L $12, PT_R12(sp)
+ LONG_L $13, PT_R13(sp)
+ LONG_L $14, PT_R14(sp)
+ LONG_L $15, PT_R15(sp)
+ LONG_L $24, PT_R24(sp)
.endm
.macro RESTORE_STATIC
- lw $16, PT_R16(sp)
- lw $17, PT_R17(sp)
- lw $18, PT_R18(sp)
- lw $19, PT_R19(sp)
- lw $20, PT_R20(sp)
- lw $21, PT_R21(sp)
- lw $22, PT_R22(sp)
- lw $23, PT_R23(sp)
- lw $30, PT_R30(sp)
+ LONG_L $16, PT_R16(sp)
+ LONG_L $17, PT_R17(sp)
+ LONG_L $18, PT_R18(sp)
+ LONG_L $19, PT_R19(sp)
+ LONG_L $20, PT_R20(sp)
+ LONG_L $21, PT_R21(sp)
+ LONG_L $22, PT_R22(sp)
+ LONG_L $23, PT_R23(sp)
+ LONG_L $30, PT_R30(sp)
.endm
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
@@ -170,27 +201,27 @@
mtc0 t0, CP0_STATUS
li v1, 0xff00
and t0, v1
- lw v0, PT_STATUS(sp)
+ LONG_L v0, PT_STATUS(sp)
nor v1, $0, v1
and v0, v1
or v0, t0
mtc0 v0, CP0_STATUS
- lw $31, PT_R31(sp)
- lw $28, PT_R28(sp)
- lw $25, PT_R25(sp)
- lw $7, PT_R7(sp)
- lw $6, PT_R6(sp)
- lw $5, PT_R5(sp)
- lw $4, PT_R4(sp)
- lw $3, PT_R3(sp)
- lw $2, PT_R2(sp)
+ LONG_L $31, PT_R31(sp)
+ LONG_L $28, PT_R28(sp)
+ LONG_L $25, PT_R25(sp)
+ LONG_L $7, PT_R7(sp)
+ LONG_L $6, PT_R6(sp)
+ LONG_L $5, PT_R5(sp)
+ LONG_L $4, PT_R4(sp)
+ LONG_L $3, PT_R3(sp)
+ LONG_L $2, PT_R2(sp)
.endm
.macro RESTORE_SP_AND_RET
.set push
.set noreorder
- lw k0, PT_EPC(sp)
- lw sp, PT_R29(sp)
+ LONG_L k0, PT_EPC(sp)
+ LONG_L sp, PT_R29(sp)
jr k0
rfe
.set pop
@@ -208,26 +239,26 @@
mtc0 t0, CP0_STATUS
li v1, 0xff00
and t0, v1
- lw v0, PT_STATUS(sp)
+ LONG_L v0, PT_STATUS(sp)
nor v1, $0, v1
and v0, v1
or v0, t0
mtc0 v0, CP0_STATUS
- lw v1, PT_EPC(sp)
- mtc0 v1, CP0_EPC
- lw $31, PT_R31(sp)
- lw $28, PT_R28(sp)
- lw $25, PT_R25(sp)
- lw $7, PT_R7(sp)
- lw $6, PT_R6(sp)
- lw $5, PT_R5(sp)
- lw $4, PT_R4(sp)
- lw $3, PT_R3(sp)
- lw $2, PT_R2(sp)
+ LONG_L v1, PT_EPC(sp)
+ MTC0 v1, CP0_EPC
+ LONG_L $31, PT_R31(sp)
+ LONG_L $28, PT_R28(sp)
+ LONG_L $25, PT_R25(sp)
+ LONG_L $7, PT_R7(sp)
+ LONG_L $6, PT_R6(sp)
+ LONG_L $5, PT_R5(sp)
+ LONG_L $4, PT_R4(sp)
+ LONG_L $3, PT_R3(sp)
+ LONG_L $2, PT_R2(sp)
.endm
.macro RESTORE_SP_AND_RET
- lw sp, PT_R29(sp)
+ LONG_L sp, PT_R29(sp)
.set mips3
eret
.set mips0
@@ -236,7 +267,7 @@
#endif
.macro RESTORE_SP
- lw sp, PT_R29(sp)
+ LONG_L sp, PT_R29(sp)
.endm
.macro RESTORE_ALL
@@ -255,17 +286,16 @@
RESTORE_SP_AND_RET
.endm
-
/*
* Move to kernel mode and disable interrupts.
* Set cp0 enable bit as sign that we're running on the kernel stack
*/
.macro CLI
- mfc0 t0,CP0_STATUS
- li t1,ST0_CU0|0x1f
- or t0,t1
- xori t0,0x1f
- mtc0 t0,CP0_STATUS
+ mfc0 t0, CP0_STATUS
+ li t1, ST0_CU0 | 0x1f
+ or t0, t1
+ xori t0, 0x1f
+ mtc0 t0, CP0_STATUS
.endm
/*
@@ -273,11 +303,11 @@
* Set cp0 enable bit as sign that we're running on the kernel stack
*/
.macro STI
- mfc0 t0,CP0_STATUS
- li t1,ST0_CU0|0x1f
- or t0,t1
- xori t0,0x1e
- mtc0 t0,CP0_STATUS
+ mfc0 t0, CP0_STATUS
+ li t1, ST0_CU0 | 0x1f
+ or t0, t1
+ xori t0, 0x1e
+ mtc0 t0, CP0_STATUS
.endm
/*
@@ -285,11 +315,11 @@
* Set cp0 enable bit as sign that we're running on the kernel stack
*/
.macro KMODE
- mfc0 t0,CP0_STATUS
- li t1,ST0_CU0|0x1e
- or t0,t1
- xori t0,0x1e
- mtc0 t0,CP0_STATUS
+ mfc0 t0, CP0_STATUS
+ li t1, ST0_CU0 | 0x1e
+ or t0, t1
+ xori t0, 0x1e
+ mtc0 t0, CP0_STATUS
.endm
-#endif /* __ASM_STACKFRAME_H */
+#endif /* _ASM_STACKFRAME_H */
diff -Nru a/include/asm-mips/stat.h b/include/asm-mips/stat.h
--- a/include/asm-mips/stat.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/stat.h Sun Aug 3 13:14:53 2003
@@ -1,8 +1,20 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1999, 2000 Ralf Baechle
+ * Copyright (C) 2000 Silicon Graphics, Inc.
+ */
#ifndef _ASM_STAT_H
#define _ASM_STAT_H
#include <linux/types.h>
+#include <asm/sgidefs.h>
+
+#if (_MIPS_SIM == _MIPS_SIM_ABI32) || (_MIPS_SIM == _MIPS_SIM_NABI32)
+
struct stat {
dev_t st_dev;
long st_pad1[3]; /* Reserved for network id */
@@ -71,5 +83,50 @@
long long st_blocks;
};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64
+
+/* The memory layout is the same as of struct stat64 of the 32-bit kernel. */
+struct stat {
+ dev_t st_dev;
+ unsigned int st_pad0[3]; /* Reserved for st_dev expansion */
+
+ unsigned long st_ino;
+
+ mode_t st_mode;
+ nlink_t st_nlink;
+
+ uid_t st_uid;
+ gid_t st_gid;
+
+ dev_t st_rdev;
+ unsigned int st_pad1[3]; /* Reserved for st_rdev expansion */
+
+ off_t st_size;
+
+ /*
+ * Actually this should be timestruc_t st_atime, st_mtime and st_ctime
+ * but we don't have it under Linux.
+ */
+ unsigned int st_atime;
+ unsigned int st_atime_nsec;
+
+ unsigned int st_mtime;
+ unsigned int st_mtime_nsec;
+
+ unsigned int st_ctime;
+ unsigned int st_ctime_nsec;
+
+ unsigned int st_blksize;
+ unsigned int st_pad2;
+
+ unsigned long st_blocks;
+};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
+
+#define STAT_HAVE_NSEC 1
#endif /* _ASM_STAT_H */
diff -Nru a/include/asm-mips/statfs.h b/include/asm-mips/statfs.h
--- a/include/asm-mips/statfs.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/statfs.h Sun Aug 3 13:14:50 2003
@@ -9,6 +9,7 @@
#define _ASM_STATFS_H
#include <linux/posix_types.h>
+#include <asm/sgidefs.h>
#ifndef __KERNEL_STRICT_NAMES
@@ -35,8 +36,10 @@
long f_spare[6];
};
+#if (_MIPS_SIM == _MIPS_SIM_ABI32) || (_MIPS_SIM == _MIPS_SIM_NABI32)
+
/*
- * Unlike the 32-bit version the 64-bit version has none of the ABI baggage.
+ * Unlike the traditional version the LFAPI version has none of the ABI junk
*/
struct statfs64 {
__u32 f_type;
@@ -51,5 +54,27 @@
__u32 f_frsize;
__u32 f_spare[5];
};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64
+
+struct statfs64 { /* Same as struct statfs */
+ long f_type;
+ long f_bsize;
+ long f_frsize; /* Fragment size - unsupported */
+ long f_blocks;
+ long f_bfree;
+ long f_files;
+ long f_ffree;
+
+ /* Linux specials */
+ long f_bavail;
+ __kernel_fsid_t f_fsid;
+ long f_namelen;
+ long f_spare[6];
+};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#endif /* _ASM_STATFS_H */
diff -Nru a/include/asm-mips/string.h b/include/asm-mips/string.h
--- a/include/asm-mips/string.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/string.h Sun Aug 3 13:14:44 2003
@@ -3,16 +3,23 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 1994, 1995, 1996, 1997, 1998, 2001 Ralf Baechle
+ * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle
+ * Copyright (c) 2000 by Silicon Graphics, Inc.
* Copyright (c) 2001 MIPS Technologies, Inc.
*/
-#ifndef __ASM_STRING_H
-#define __ASM_STRING_H
+#ifndef _ASM_STRING_H
+#define _ASM_STRING_H
#include <linux/config.h>
+/*
+ * Most of the inline functions are rather naive implementations so I just
+ * didn't bother updating them for 64-bit ...
+ */
+#ifdef CONFIG_MIPS32
+
#define __HAVE_ARCH_STRCPY
-extern __inline__ char *strcpy(char *__dest, __const__ char *__src)
+static __inline__ char *strcpy(char *__dest, __const__ char *__src)
{
char *__xdest = __dest;
@@ -34,7 +41,7 @@
}
#define __HAVE_ARCH_STRNCPY
-extern __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n)
+static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n)
{
char *__xdest = __dest;
@@ -62,7 +69,7 @@
}
#define __HAVE_ARCH_STRCMP
-extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
+static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
{
int __res;
@@ -90,7 +97,7 @@
}
#define __HAVE_ARCH_STRNCMP
-extern __inline__ int
+static __inline__ int
strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
{
int __res;
@@ -119,6 +126,7 @@
return __res;
}
+#endif /* CONFIG_MIPS32 */
#define __HAVE_ARCH_MEMSET
extern void *memset(void *__s, int __c, size_t __count);
@@ -132,8 +140,9 @@
/* Don't build bcopy at all ... */
#define __HAVE_ARCH_BCOPY
+#ifdef CONFIG_MIPS32
#define __HAVE_ARCH_MEMSCAN
-extern __inline__ void *memscan(void *__addr, int __c, size_t __size)
+static __inline__ void *memscan(void *__addr, int __c, size_t __size)
{
char *__end = (char *)__addr + __size;
unsigned char __uc = (unsigned char) __c;
@@ -151,5 +160,6 @@
return __addr;
}
+#endif /* CONFIG_MIPS32 */
-#endif /* __ASM_STRING_H */
+#endif /* _ASM_STRING_H */
diff -Nru a/include/asm-mips/sysmips.h b/include/asm-mips/sysmips.h
--- a/include/asm-mips/sysmips.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/sysmips.h Sun Aug 3 13:14:47 2003
@@ -7,8 +7,8 @@
*
* Copyright (C) 1995 by Ralf Baechle
*/
-#ifndef __ASM_MIPS_SYSMIPS_H
-#define __ASM_MIPS_SYSMIPS_H
+#ifndef _ASM_SYSMIPS_H
+#define _ASM_SYSMIPS_H
/*
* Commands for the sysmips(2) call
@@ -22,4 +22,4 @@
#define MIPS_RDNVRAM 10 /* read NVRAM */
#define MIPS_ATOMIC_SET 2001 /* atomically set variable */
-#endif /* __ASM_MIPS_SYSMIPS_H */
+#endif /* _ASM_SYSMIPS_H */
diff -Nru a/include/asm-mips/system.h b/include/asm-mips/system.h
--- a/include/asm-mips/system.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/system.h Sun Aug 3 13:14:47 2003
@@ -3,13 +3,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1994 - 1999 by Ralf Baechle
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
* Copyright (C) 1996 by Paul M. Antoine
- * Copyright (C) 1994 - 1999 by Ralf Baechle
- *
- * Changed set_except_vector declaration to allow return of previous
- * vector address value - necessary for "borrowing" vectors.
- *
+ * Copyright (C) 1999 Silicon Graphics
* Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc.
*/
@@ -36,7 +32,7 @@
".set\tpop\n\t"
".endm");
-extern inline void local_irq_enable(void)
+static inline void local_irq_enable(void)
{
__asm__ __volatile__(
"local_irq_enable"
@@ -67,7 +63,7 @@
".set\tpop\n\t"
".endm");
-extern inline void local_irq_disable(void)
+static inline void local_irq_disable(void)
{
__asm__ __volatile__(
"local_irq_disable"
@@ -284,12 +280,10 @@
(last) = resume(prev, next, next->thread_info); \
} while(0)
-/*
- * For 32 and 64 bit operands we can take advantage of ll and sc.
- * FIXME: This doesn't work for R3000 machines.
- */
-extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
+static inline unsigned long xchg_u32(volatile int * m, unsigned int val)
{
+ __u32 retval;
+
#ifdef CONFIG_CPU_HAS_LLSC
unsigned long dummy;
@@ -304,31 +298,69 @@
" ll\t%0, %3\n\t"
"sync\n\t"
".set\tpop"
- : "=&r" (val), "=m" (*m), "=&r" (dummy)
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
: "R" (*m), "Jr" (val)
: "memory");
+#else
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ *m = val;
+ local_irq_restore(flags); /* implies memory barrier */
+#endif
+
+ return retval;
+}
+
+#ifdef CONFIG_MIPS64
+static inline __u64 xchg_u64(volatile __u64 * m, __u64 long val)
+{
+ __u64 retval;
+
+#ifdef CONFIG_CPU_HAS_LLDSCD
+ unsigned long dummy;
- return val;
+ __asm__ __volatile__(
+ ".set\tpush\t\t\t\t# xchg_u64\n\t"
+ ".set\tnoreorder\n\t"
+ ".set\tnomacro\n\t"
+ "lld\t%0, %3\n"
+ "1:\tmove\t%2, %z4\n\t"
+ "scd\t%2, %1\n\t"
+ "beqzl\t%2, 1b\n\t"
+ " lld\t%0, %3\n\t"
+ "sync\n\t"
+ ".set\tpop"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
#else
- unsigned long flags, retval;
+ unsigned long flags;
local_irq_save(flags);
retval = *m;
*m = val;
local_irq_restore(flags); /* implies memory barrier */
+#endif
+
return retval;
-#endif /* Processor-dependent optimization */
}
+#else
+extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val);
+#define xchg_u64 __xchg_u64_unsupported_on_32bit_kernels
+#endif
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
#define tas(ptr) (xchg((ptr),1))
-static __inline__ unsigned long
-__xchg(unsigned long x, volatile void * ptr, int size)
+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
{
switch (size) {
case 4:
return xchg_u32(ptr, x);
+ case 8:
+ return xchg_u64(ptr, x);
}
return x;
}
diff -Nru a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
--- a/include/asm-mips/termbits.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/termbits.h Sun Aug 3 13:14:45 2003
@@ -1,12 +1,11 @@
/*
- * termbits stuff for Linux/MIPS.
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 2001 Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
+ * Copyright (C) 1995, 1996, 1999, 2001 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
*/
#ifndef _ASM_TERMBITS_H
#define _ASM_TERMBITS_H
@@ -14,8 +13,14 @@
#include <linux/posix_types.h>
typedef unsigned char cc_t;
+#if (_MIPS_SZLONG == 32)
typedef unsigned long speed_t;
typedef unsigned long tcflag_t;
+#endif
+#if (_MIPS_SZLONG == 64)
+typedef __u32 speed_t;
+typedef __u32 tcflag_t;
+#endif
/*
* The ABI says nothing about NCC but seems to use NCCS as
@@ -27,9 +32,6 @@
tcflag_t c_oflag; /* output mode flags */
tcflag_t c_cflag; /* control mode flags */
tcflag_t c_lflag; /* local mode flags */
- /*
- * Seems nonexistent in the ABI, but Linux assumes existence ...
- */
cc_t c_line; /* line discipline */
cc_t c_cc[NCCS]; /* control characters */
};
diff -Nru a/include/asm-mips/termios.h b/include/asm-mips/termios.h
--- a/include/asm-mips/termios.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/termios.h Sun Aug 3 13:14:46 2003
@@ -3,7 +3,8 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 2001 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 2000, 2001 by Ralf Baechle
+ * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
*/
#ifndef _ASM_TERMIOS_H
#define _ASM_TERMIOS_H
diff -Nru a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
--- a/include/asm-mips/thread_info.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/thread_info.h Sun Aug 3 13:14:44 2003
@@ -1,4 +1,4 @@
-/* thread_info.h: i386 low-level thread information
+/* thread_info.h: MIPS low-level thread information
*
* Copyright (C) 2002 David Howells (dhowells@redhat.com)
* - Incorporating suggestions made by Linus Torvalds and Dave Miller
@@ -9,6 +9,8 @@
#ifdef __KERNEL__
+#include <linux/config.h>
+
#ifndef __ASSEMBLY__
#include <asm/processor.h>
@@ -62,11 +64,17 @@
#define current_thread_info() __current_thread_info
/* thread information allocation */
+#ifdef CONFIG_MIPS32
+#define THREAD_SIZE_ORDER (1)
+#endif
+#ifdef CONFIG_MIPS64
#define THREAD_SIZE_ORDER (1)
+#endif
#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
-#define alloc_thread_info(tsk) ((struct thread_info *) \
- __get_free_pages(GFP_KERNEL,THREAD_SIZE_ORDER))
-#define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_SIZE_ORDER)
+#define THREAD_MASK (THREAD_SIZE - 1UL)
+#define alloc_thread_info(task) \
+ ((struct thread_info *)kmalloc(THREAD_SIZE, GFP_KERNEL))
+#define free_thread_info(info) kfree(info)
#define get_thread_info(ti) get_task_struct((ti)->task)
#define put_thread_info(ti) put_task_struct((ti)->task)
diff -Nru a/include/asm-mips/time.h b/include/asm-mips/time.h
--- a/include/asm-mips/time.h Sun Aug 3 13:14:46 2003
+++ b/include/asm-mips/time.h Sun Aug 3 13:14:46 2003
@@ -1,6 +1,7 @@
/*
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright (C) 2001, 2002, MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ * Copyright (c) 2003 Maciej W. Rozycki
*
* include/asm-mips/time.h
* header file for the new style time.c file and time services.
@@ -21,24 +22,27 @@
#include <linux/rtc.h>
/*
- * RTC ops. By default, they point a no-RTC functions.
+ * RTC ops. By default, they point to no-RTC functions.
* rtc_get_time - mktime(year, mon, day, hour, min, sec) in seconds.
* rtc_set_time - reverse the above translation and set time to RTC.
+ * rtc_set_mmss - similar to rtc_set_time, but only min and sec need
+ * to be set. Used by RTC sync-up.
*/
extern unsigned long (*rtc_get_time)(void);
extern int (*rtc_set_time)(unsigned long);
+extern int (*rtc_set_mmss)(unsigned long);
/*
* to_tm() converts system time back to (year, mon, day, hour, min, sec).
* It is intended to help implement rtc_set_time() functions.
* Copied from PPC implementation.
*/
-extern void to_tm(unsigned long tim, struct rtc_time * tm);
+extern void to_tm(unsigned long tim, struct rtc_time *tm);
/*
* do_gettimeoffset(). By default, this func pointer points to
* do_null_gettimeoffset(), which leads to the same resolution as HZ.
- * Higher resolution versions are vailable, which gives ~1us resolution.
+ * Higher resolution versions are available, which give ~1us resolution.
*/
extern unsigned long (*do_gettimeoffset)(void);
@@ -55,11 +59,17 @@
/*
* the corresponding low-level timer interrupt routine.
*/
-asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs);
+extern asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs);
+
+/*
+ * profiling and process accouting is done separately in local_timer_interrupt
+ */
+extern void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
/*
* board specific routines required by time_init().
- * board_time_init is defaulted to NULL and can remains so.
+ * board_time_init is defaulted to NULL and can remain so.
* board_timer_setup must be setup properly in machine setup routine.
*/
struct irqaction;
diff -Nru a/include/asm-mips/timex.h b/include/asm-mips/timex.h
--- a/include/asm-mips/timex.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/timex.h Sun Aug 3 13:14:52 2003
@@ -3,20 +3,38 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1998, 1999 by Ralf Baechle
- *
- * FIXME: For some of the supported machines this is dead wrong.
+ * Copyright (C) 1998, 1999, 2003 by Ralf Baechle
*/
#ifndef _ASM_TIMEX_H
#define _ASM_TIMEX_H
+#include <linux/config.h>
#include <asm/mipsregs.h>
-#define CLOCK_TICK_RATE 1193182 /* Underlying HZ */
-#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
-#define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
- (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \
- << (SHIFT_SCALE-SHIFT_HZ)) / HZ)
+/*
+ * This is the frequency of the timer used for Linux's timer interrupt.
+ * The value should be defined as accurate as possible or under certain
+ * circumstances Linux timekeeping might become inaccurate or fail.
+ *
+ * For IP22 we cheat and pretend to have a 1MHz timer whic isn't strictly
+ * true - we only use the 8259 timer to calibrate the actual interrupt
+ * timer, so after all it's the master clock source of the system.
+ *
+ * The obscure number 1193182 is the same as used by the original i8254
+ * time in legacy PC hardware; the chip unfortunately also found in a
+ * bunch of MIPS systems.
+ */
+#ifdef CONFIG_ACER_PICA_61
+#define CLOCK_TICK_RATE 1193182
+#elif defined(CONFIG_MIPS_MAGNUM_4000)
+#define CLOCK_TICK_RATE 1193182
+#elif defined(CONFIG_OLIVETTI_M700)
+#define CLOCK_TICK_RATE 1193182
+#elif defined(CONFIG_SGI_IP22)
+#define CLOCK_TICK_RATE 1000000
+#elif defined(CONFIG_SNI_RM200_PCI)
+#define CLOCK_TICK_RATE 1193182
+#endif
/*
* Standard way to access the cycle counter.
diff -Nru a/include/asm-mips/tlbflush.h b/include/asm-mips/tlbflush.h
--- a/include/asm-mips/tlbflush.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/tlbflush.h Sun Aug 3 13:14:53 2003
@@ -7,8 +7,8 @@
/*
* TLB flushing:
*
- * - flush_tlb_all() flushes all processes TLBs
- * - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ * - flush_tlb_all() flushes all processes TLB entries
+ * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
* - flush_tlb_page(vma, vmaddr) flushes one page
* - flush_tlb_range(vma, start, end) flushes a range of pages
* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
diff -Nru a/include/asm-mips/topology.h b/include/asm-mips/topology.h
--- a/include/asm-mips/topology.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/topology.h Sun Aug 3 13:14:53 2003
@@ -1,6 +1,13 @@
#ifndef __ASM_TOPOLOGY_H
#define __ASM_TOPOLOGY_H
+#if CONFIG_SGI_IP27
+
+#include <asm/mmzone.h>
+
+#define cpu_to_node(cpu) (cputocnode(cpu))
+#endif
+
#include <asm-generic/topology.h>
#endif /* __ASM_TOPOLOGY_H */
diff -Nru a/include/asm-mips/traps.h b/include/asm-mips/traps.h
--- a/include/asm-mips/traps.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/traps.h Sun Aug 3 13:14:47 2003
@@ -1,6 +1,4 @@
/*
- * include/asm-mips/traps.h
- *
* Trap handling definitions.
*
* Copyright (C) 2002, 2003 Maciej W. Rozycki
@@ -10,8 +8,8 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-#ifndef __ASM_MIPS_TRAPS_H
-#define __ASM_MIPS_TRAPS_H
+#ifndef _ASM_TRAPS_H
+#define _ASM_TRAPS_H
/*
* Possible status responses for a board_be_handler backend.
@@ -23,4 +21,4 @@
extern void (*board_be_init)(void);
extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
-#endif /* __ASM_MIPS_TRAPS_H */
+#endif /* _ASM_TRAPS_H */
diff -Nru a/include/asm-mips/types.h b/include/asm-mips/types.h
--- a/include/asm-mips/types.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-mips/types.h Sun Aug 3 13:14:45 2003
@@ -13,7 +13,12 @@
#ifndef __ASSEMBLY__
+#ifdef CONFIG_MIPS32
typedef unsigned short umode_t;
+#endif
+#ifdef CONFIG_MIPS64
+typedef unsigned int umode_t;
+#endif
/*
* __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
@@ -77,13 +82,17 @@
#endif
-#if defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)
+#if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \
+ || defined(CONFIG_MIPS64)
typedef u64 dma_addr_t;
#else
typedef u32 dma_addr_t;
#endif
typedef u64 dma64_addr_t;
+/*
+ * Don't use phys_t. You've been warned.
+ */
#ifdef CONFIG_64BIT_PHYS_ADDR
typedef unsigned long long phys_t;
#else
diff -Nru a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
--- a/include/asm-mips/uaccess.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/uaccess.h Sun Aug 3 13:14:44 2003
@@ -12,9 +12,6 @@
#include <linux/errno.h>
#include <linux/thread_info.h>
-#define STR(x) __STR(x)
-#define __STR(x) #x
-
/*
* The fs value determines whether argument validity checking should be
* performed or not. If get_fs() == USER_DS, checking is performed, with
@@ -22,15 +19,51 @@
*
* For historical reasons, these macros are grossly misnamed.
*/
+#ifdef CONFIG_MIPS32
+#define __UA_ADDR ".word"
+#define __UA_LA "la"
+#define __UA_ADDU "addu"
+
#define KERNEL_DS ((mm_segment_t) { (unsigned long) 0L })
#define USER_DS ((mm_segment_t) { (unsigned long) -1L })
#define VERIFY_READ 0
#define VERIFY_WRITE 1
+#define __access_ok(addr, size, mask) \
+ (((signed long)((mask)&(addr | ((addr) + (size)) | __ua_size(size)))) >= 0)
+
+#define __access_mask ((long)(get_fs().seg))
+
+#define access_ok(type, addr, size) \
+ __access_ok(((unsigned long)(addr)),(size),__access_mask)
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+#define __UA_ADDR ".dword"
+#define __UA_LA "dla"
+#define __UA_ADDU "daddu"
+
+#define KERNEL_DS ((mm_segment_t) { 0UL })
+#define USER_DS ((mm_segment_t) { -TASK_SIZE })
+
+#define VERIFY_READ 0
+#define VERIFY_WRITE 1
+
+#define __access_ok(addr, size, mask) \
+ (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0)
+
+#define __access_mask get_fs().seg
+
+#define access_ok(type, addr, size) \
+ __access_ok((unsigned long)(addr), (size), __access_mask)
+
+#endif /* CONFIG_MIPS64 */
+
#define get_ds() (KERNEL_DS)
-#define get_fs() (current_thread_info()->addr_limit)
-#define set_fs(x) (current_thread_info()->addr_limit = (x))
+#define get_fs() (current_thread_info()->addr_limit)
+#define set_fs(x) (current_thread_info()->addr_limit = (x))
#define segment_eq(a,b) ((a).seg == (b).seg)
@@ -44,21 +77,16 @@
* - AND "size" doesn't have any high-bits set
* - AND "addr+size" doesn't have any high-bits set
* - OR we are in kernel mode.
+ *
+ * __ua_size() is a trick to avoid runtime checking of positive constant
+ * sizes; for those we already know at compile time that the size is ok.
*/
#define __ua_size(size) \
- (__builtin_constant_p(size) && (signed long) (size) > 0 ? 0 : (size))
-
-#define __access_ok(addr,size,mask) \
- (((signed long)((mask)&(addr | (addr + size) | __ua_size(size)))) >= 0)
-
-#define __access_mask ((long)(get_fs().seg))
-
-#define access_ok(type,addr,size) \
-__access_ok(((unsigned long)(addr)),(size),__access_mask)
+ ((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size))
static inline int verify_area(int type, const void * addr, unsigned long size)
{
- return access_ok(type,addr,size) ? 0 : -EFAULT;
+ return access_ok(type, addr, size) ? 0 : -EFAULT;
}
/*
@@ -101,76 +129,83 @@
#define __GET_USER_DW __get_user_asm_ll32
#endif
-#define __get_user_nocheck(x,ptr,size) ({ \
-long __gu_err; \
-__typeof(*(ptr)) __gu_val; \
-long __gu_addr; \
-__asm__("":"=r" (__gu_val)); \
-__gu_addr = (long) (ptr); \
-__asm__("":"=r" (__gu_err)); \
-switch (size) { \
-case 1: __get_user_asm("lb"); break; \
-case 2: __get_user_asm("lh"); break; \
-case 4: __get_user_asm("lw"); break; \
-case 8: __GET_USER_DW; break; \
-default: __get_user_unknown(); break; \
-} x = (__typeof__(*(ptr))) __gu_val; __gu_err; })
-
-#define __get_user_check(x,ptr,size) ({ \
-long __gu_err; \
-__typeof__(*(ptr)) __gu_val; \
-long __gu_addr; \
-__asm__("":"=r" (__gu_val)); \
-__gu_addr = (long) (ptr); \
-__asm__("":"=r" (__gu_err)); \
-if (__access_ok(__gu_addr,size,__access_mask)) { \
-switch (size) { \
-case 1: __get_user_asm("lb"); break; \
-case 2: __get_user_asm("lh"); break; \
-case 4: __get_user_asm("lw"); break; \
-case 8: __GET_USER_DW; break; \
-default: __get_user_unknown(); break; \
-} } x = (__typeof__(*(ptr))) __gu_val; __gu_err; })
-
-#define __get_user_asm(insn) \
-({ \
-__asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "move\t%1,$0\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- ".word\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__m(__gu_addr)), "i" (-EFAULT)); })
+#define __get_user_nocheck(x,ptr,size) \
+({ \
+ long __gu_err; \
+ __typeof(*(ptr)) __gu_val; \
+ long __gu_addr; \
+ __asm__("":"=r" (__gu_val)); \
+ __gu_addr = (long) (ptr); \
+ __asm__("":"=r" (__gu_err)); \
+ switch (size) { \
+ case 1: __get_user_asm("lb"); break; \
+ case 2: __get_user_asm("lh"); break; \
+ case 4: __get_user_asm("lw"); break; \
+ case 8: __GET_USER_DW; break; \
+ default: __get_user_unknown(); break; \
+ } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
+})
+
+#define __get_user_check(x,ptr,size) \
+({ \
+ long __gu_err; \
+ __typeof__(*(ptr)) __gu_val; \
+ long __gu_addr; \
+ __asm__("":"=r" (__gu_val)); \
+ __gu_addr = (long) (ptr); \
+ __asm__("":"=r" (__gu_err)); \
+ if (__access_ok(__gu_addr,size,__access_mask)) { \
+ switch (size) { \
+ case 1: __get_user_asm("lb"); break; \
+ case 2: __get_user_asm("lh"); break; \
+ case 4: __get_user_asm("lw"); break; \
+ case 8: __GET_USER_DW; break; \
+ default: __get_user_unknown(); break; \
+ } \
+ } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
+})
+
+#define __get_user_asm(insn) \
+({ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%1,%2\n\t" \
+ "move\t%0,$0\n" \
+ "2:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "3:\tli\t%0,%3\n\t" \
+ "move\t%1,$0\n\t" \
+ "j\t2b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,3b\n\t" \
+ ".previous" \
+ :"=r" (__gu_err), "=r" (__gu_val) \
+ :"o" (__m(__gu_addr)), "i" (-EFAULT)); \
+})
/*
* Get a long long 64 using 32 bit registers.
*/
-#define __get_user_asm_ll32 \
-({ \
-__asm__ __volatile__( \
- "1:\tlw\t%1,%2\n" \
- "2:\tlw\t%D1,%3\n\t" \
- "move\t%0,$0\n" \
- "3:\t.section\t.fixup,\"ax\"\n" \
- "4:\tli\t%0,%4\n\t" \
- "move\t%1,$0\n\t" \
- "move\t%D1,$0\n\t" \
- "j\t3b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- ".word\t1b,4b\n\t" \
- ".word\t2b,4b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=&r" (__gu_val) \
- :"o" (__m(__gu_addr)), "o" (__m(__gu_addr + 4)), \
- "i" (-EFAULT)); })
+#define __get_user_asm_ll32 \
+({ \
+ __asm__ __volatile__( \
+ "1:\tlw\t%1,%2\n" \
+ "2:\tlw\t%D1,%3\n\t" \
+ "move\t%0,$0\n" \
+ "3:\t.section\t.fixup,\"ax\"\n" \
+ "4:\tli\t%0,%4\n\t" \
+ "move\t%1,$0\n\t" \
+ "move\t%D1,$0\n\t" \
+ "j\t3b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,4b\n\t" \
+ __UA_ADDR "\t2b,4b\n\t" \
+ ".previous" \
+ :"=r" (__gu_err), "=&r" (__gu_val) \
+ :"o" (__m(__gu_addr)), "o" (__m(__gu_addr + 4)), \
+ "i" (-EFAULT)); \
+})
extern void __get_user_unknown(void);
@@ -184,71 +219,80 @@
#define __PUT_USER_DW __put_user_asm_ll32
#endif
-#define __put_user_nocheck(x,ptr,size) ({ \
-long __pu_err; \
-__typeof__(*(ptr)) __pu_val; \
-long __pu_addr; \
-__pu_val = (x); \
-__pu_addr = (long) (ptr); \
-__asm__("":"=r" (__pu_err)); \
-switch (size) { \
-case 1: __put_user_asm("sb"); break; \
-case 2: __put_user_asm("sh"); break; \
-case 4: __put_user_asm("sw"); break; \
-case 8: __PUT_USER_DW; break; \
-default: __put_user_unknown(); break; \
-} __pu_err; })
-
-#define __put_user_check(x,ptr,size) ({ \
-long __pu_err; \
-__typeof__(*(ptr)) __pu_val; \
-long __pu_addr; \
-__pu_val = (x); \
-__pu_addr = (long) (ptr); \
-__asm__("":"=r" (__pu_err)); \
-if (__access_ok(__pu_addr,size,__access_mask)) { \
-switch (size) { \
-case 1: __put_user_asm("sb"); break; \
-case 2: __put_user_asm("sh"); break; \
-case 4: __put_user_asm("sw"); break; \
-case 8: __PUT_USER_DW; break; \
-default: __put_user_unknown(); break; \
-} } __pu_err; })
-
-#define __put_user_asm(insn) \
-({ \
-__asm__ __volatile__( \
- "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
- "move\t%0, $0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- ".word\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); })
-
-#define __put_user_asm_ll32 \
-({ \
-__asm__ __volatile__( \
- "1:\tsw\t%1, %2\t\t\t# __put_user_asm_ll32\n\t" \
- "2:\tsw\t%D1, %3\n" \
- "move\t%0, $0\n" \
- "3:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "4:\tli\t%0,%4\n\t" \
- "j\t3b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- ".word\t1b,4b\n\t" \
- ".word\t2b,4b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"r" (__pu_val), "o" (__m(__pu_addr)), "o" (__m(__pu_addr + 4)), \
- "i" (-EFAULT)); })
+#define __put_user_nocheck(x,ptr,size) \
+({ \
+ long __pu_err; \
+ __typeof__(*(ptr)) __pu_val; \
+ long __pu_addr; \
+ __pu_val = (x); \
+ __pu_addr = (long) (ptr); \
+ __asm__("":"=r" (__pu_err)); \
+ switch (size) { \
+ case 1: __put_user_asm("sb"); break; \
+ case 2: __put_user_asm("sh"); break; \
+ case 4: __put_user_asm("sw"); break; \
+ case 8: __PUT_USER_DW; break; \
+ default: __put_user_unknown(); break; \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_check(x,ptr,size) \
+({ \
+ long __pu_err; \
+ __typeof__(*(ptr)) __pu_val; \
+ long __pu_addr; \
+ __pu_val = (x); \
+ __pu_addr = (long) (ptr); \
+ __asm__("":"=r" (__pu_err)); \
+ if (__access_ok(__pu_addr,size,__access_mask)) { \
+ switch (size) { \
+ case 1: __put_user_asm("sb"); break; \
+ case 2: __put_user_asm("sh"); break; \
+ case 4: __put_user_asm("sw"); break; \
+ case 8: __PUT_USER_DW; break; \
+ default: __put_user_unknown(); break; \
+ } \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_asm(insn) \
+({ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
+ "move\t%0, $0\n" \
+ "2:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "3:\tli\t%0,%3\n\t" \
+ "j\t2b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,3b\n\t" \
+ ".previous" \
+ :"=r" (__pu_err) \
+ :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \
+})
+
+#define __put_user_asm_ll32 \
+({ \
+ __asm__ __volatile__( \
+ "1:\tsw\t%1, %2\t\t\t# __put_user_asm_ll32\n\t" \
+ "2:\tsw\t%D1, %3\n" \
+ "move\t%0, $0\n" \
+ "3:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "4:\tli\t%0,%4\n\t" \
+ "j\t3b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,4b\n\t" \
+ __UA_ADDR "\t2b,4b\n\t" \
+ ".previous" \
+ :"=r" (__pu_err) \
+ :"r" (__pu_val), "o" (__m(__pu_addr)), \
+ "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \
+})
extern void __put_user_unknown(void);
@@ -257,19 +301,20 @@
* jump instructions
*/
#ifdef MODULE
-#define __MODULE_JAL(destination) \
- ".set\tnoat\n\t" \
- "la\t$1, " #destination "\n\t" \
- "jalr\t$1\n\t" \
+#define __MODULE_JAL(destination) \
+ ".set\tnoat\n\t" \
+ __UA_LA "\t$1, " #destination "\n\t" \
+ "jalr\t$1\n\t" \
".set\tat\n\t"
#else
-#define __MODULE_JAL(destination) \
+#define __MODULE_JAL(destination) \
"jal\t" #destination "\n\t"
#endif
extern size_t __copy_user(void *__to, const void *__from, size_t __n);
-#define __invoke_copy_to_user(to,from,n) ({ \
+#define __invoke_copy_to_user(to,from,n) \
+({ \
register void *__cu_to_r __asm__ ("$4"); \
register const void *__cu_from_r __asm__ ("$5"); \
register long __cu_len_r __asm__ ("$6"); \
@@ -278,7 +323,7 @@
__cu_from_r = (from); \
__cu_len_r = (n); \
__asm__ __volatile__( \
- __MODULE_JAL(__copy_user) \
+ __MODULE_JAL(__copy_user) \
: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \
: \
: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
@@ -286,7 +331,8 @@
__cu_len_r; \
})
-#define __copy_to_user(to,from,n) ({ \
+#define __copy_to_user(to,from,n) \
+({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
@@ -298,7 +344,8 @@
__cu_len; \
})
-#define copy_to_user(to,from,n) ({ \
+#define copy_to_user(to,from,n) \
+({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
@@ -312,7 +359,8 @@
__cu_len; \
})
-#define __invoke_copy_from_user(to,from,n) ({ \
+#define __invoke_copy_from_user(to,from,n) \
+({ \
register void *__cu_to_r __asm__ ("$4"); \
register const void *__cu_from_r __asm__ ("$5"); \
register long __cu_len_r __asm__ ("$6"); \
@@ -321,12 +369,13 @@
__cu_from_r = (from); \
__cu_len_r = (n); \
__asm__ __volatile__( \
- ".set\tnoreorder\n\t" \
- __MODULE_JAL(__copy_user) \
- ".set\tnoat\n\t" \
- "addu\t$1, %1, %2\n\t" \
- ".set\tat\n\t" \
- ".set\treorder\n\t" \
+ ".set\tnoreorder\n\t" \
+ __MODULE_JAL(__copy_user) \
+ ".set\tnoat\n\t" \
+ __UA_ADDU "\t$1, %1, %2\n\t" \
+ ".set\tat\n\t" \
+ ".set\treorder\n\t" \
+ "move\t%0, $6" /* XXX */ \
: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \
: \
: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
@@ -334,7 +383,8 @@
__cu_len_r; \
})
-#define __copy_from_user(to,from,n) ({ \
+#define __copy_from_user(to,from,n) \
+({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
@@ -347,7 +397,8 @@
__cu_len; \
})
-#define copy_from_user(to,from,n) ({ \
+#define copy_from_user(to,from,n) \
+({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
@@ -379,12 +430,15 @@
return res;
}
-#define clear_user(addr,n) ({ \
-void * __cl_addr = (addr); \
-unsigned long __cl_size = (n); \
-if (__cl_size && access_ok(VERIFY_WRITE, ((unsigned long)(__cl_addr)), __cl_size)) \
-__cl_size = __clear_user(__cl_addr, __cl_size); \
-__cl_size; })
+#define clear_user(addr,n) \
+({ \
+ void * __cl_addr = (addr); \
+ unsigned long __cl_size = (n); \
+ if (__cl_size && access_ok(VERIFY_WRITE, \
+ ((unsigned long)(__cl_addr)), __cl_size)) \
+ __cl_size = __clear_user(__cl_addr, __cl_size); \
+ __cl_size; \
+})
/*
* Returns: -EFAULT if exception before terminator, N if the entire
diff -Nru a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h
--- a/include/asm-mips/unaligned.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-mips/unaligned.h Sun Aug 3 13:14:52 2003
@@ -3,157 +3,142 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1996, 1999, 2000, 2001, 2003 by Ralf Baechle
+ * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
*/
#ifndef _ASM_UNALIGNED_H
#define _ASM_UNALIGNED_H
-extern void __get_unaligned_bad_length(void);
-extern void __put_unaligned_bad_length(void);
+#include <linux/types.h>
/*
- * Load double unaligned.
+ * get_unaligned - get value from possibly mis-aligned location
+ * @ptr: pointer to value
+ *
+ * This macro should be used for accessing values larger in size than
+ * single bytes at locations that are expected to be improperly aligned,
+ * e.g. retrieving a u16 value from a location not u16-aligned.
*
- * This could have been implemented in plain C like IA64 but egcs 1.0.3a
- * inflates this to 23 instructions ...
+ * Note that unaligned accesses can be very expensive on some architectures.
*/
-static inline unsigned long long __ldq_u(const unsigned long long * __addr)
-{
- unsigned long long __res;
+#define get_unaligned(ptr) \
+ ((__typeof__(*(ptr)))__get_unaligned((ptr), sizeof(*(ptr))))
- __asm__("ulw\t%0, %1\n\t"
- "ulw\t%D0, 4+%1"
- : "=&r" (__res)
- : "m" (*__addr));
-
- return __res;
-}
+/*
+ * put_unaligned - put value to a possibly mis-aligned location
+ * @val: value to place
+ * @ptr: pointer to location
+ *
+ * This macro should be used for placing values larger in size than
+ * single bytes at locations that are expected to be improperly aligned,
+ * e.g. writing a u16 value to a location not u16-aligned.
+ *
+ * Note that unaligned accesses can be very expensive on some architectures.
+ */
+#define put_unaligned(x,ptr) \
+ __put_unaligned((__u64)(x), (ptr), sizeof(*(ptr)))
/*
- * Load word unaligned.
+ * This is a silly but good way to make sure that
+ * the get/put functions are indeed always optimized,
+ * and that we use the correct sizes.
*/
-static inline unsigned long __ldl_u(const unsigned int * __addr)
-{
- unsigned long __res;
+extern void bad_unaligned_access_length(void);
- __asm__("ulw\t%0,%1"
- : "=&r" (__res)
- : "m" (*__addr));
+/*
+ * EGCS 1.1 knows about arbitrary unaligned loads. Define some
+ * packed structures to talk about such things with.
+ */
- return __res;
-}
+struct __una_u64 { __u64 x __attribute__((packed)); };
+struct __una_u32 { __u32 x __attribute__((packed)); };
+struct __una_u16 { __u16 x __attribute__((packed)); };
/*
- * Load halfword unaligned.
+ * Elemental unaligned loads
*/
-static inline unsigned long __ldw_u(const unsigned short * __addr)
+
+extern inline __u64 __uldq(const __u64 * r11)
{
- unsigned long __res;
+ const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
+ return ptr->x;
+}
- __asm__("ulh\t%0,%1"
- : "=&r" (__res)
- : "m" (*__addr));
+extern inline __u32 __uldl(const __u32 * r11)
+{
+ const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
+ return ptr->x;
+}
- return __res;
+extern inline __u16 __uldw(const __u16 * r11)
+{
+ const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
+ return ptr->x;
}
/*
- * Store doubleword ununaligned.
+ * Elemental unaligned stores
*/
-static inline void __stq_u(unsigned long __val, unsigned long long * __addr)
+
+extern inline void __ustq(__u64 r5, __u64 * r11)
{
- __asm__("usw\t%1, %0\n\t"
- "usw\t%D1, 4+%0"
- : "=m" (*__addr)
- : "r" (__val));
+ struct __una_u64 *ptr = (struct __una_u64 *) r11;
+ ptr->x = r5;
}
-/*
- * Store long ununaligned.
- */
-static inline void __stl_u(unsigned long __val, unsigned int * __addr)
+extern inline void __ustl(__u32 r5, __u32 * r11)
{
- __asm__("usw\t%1, %0"
- : "=m" (*__addr)
- : "r" (__val));
+ struct __una_u32 *ptr = (struct __una_u32 *) r11;
+ ptr->x = r5;
}
-/*
- * Store word ununaligned.
- */
-static inline void __stw_u(unsigned long __val, unsigned short * __addr)
+extern inline void __ustw(__u16 r5, __u16 * r11)
{
- __asm__("ush\t%1, %0"
- : "=m" (*__addr)
- : "r" (__val));
+ struct __una_u16 *ptr = (struct __una_u16 *) r11;
+ ptr->x = r5;
}
-/*
- * get_unaligned - get value from possibly mis-aligned location
- * @ptr: pointer to value
- *
- * This macro should be used for accessing values larger in size than
- * single bytes at locations that are expected to be improperly aligned,
- * e.g. retrieving a u16 value from a location not u16-aligned.
- *
- * Note that unaligned accesses can be very expensive on some architectures.
- */
-#define get_unaligned(ptr) \
-({ \
- __typeof__(*(ptr)) __val; \
- \
- switch (sizeof(*(ptr))) { \
- case 1: \
- __val = *(const unsigned char *)ptr; \
- break; \
- case 2: \
- __val = __ldw_u((const unsigned short *)ptr); \
- break; \
- case 4: \
- __val = __ldl_u((const unsigned int *)ptr); \
- break; \
- case 8: \
- __val = __ldq_u((const unsigned long long *)ptr); \
- break; \
- default: \
- __get_unaligned_bad_length(); \
- break; \
- } \
- \
- __val; \
-})
+extern inline __u64 __get_unaligned(const void *ptr, size_t size)
+{
+ __u64 val;
-/*
- * put_unaligned - put value to a possibly mis-aligned location
- * @val: value to place
- * @ptr: pointer to location
- *
- * This macro should be used for placing values larger in size than
- * single bytes at locations that are expected to be improperly aligned,
- * e.g. writing a u16 value to a location not u16-aligned.
- *
- * Note that unaligned accesses can be very expensive on some architectures.
- */
-#define put_unaligned(val,ptr) \
-do { \
- switch (sizeof(*(ptr))) { \
- case 1: \
- *(unsigned char *)(ptr) = (val); \
- break; \
- case 2: \
- __stw_u(val, (unsigned short *)(ptr)); \
- break; \
- case 4: \
- __stl_u(val, (unsigned int *)(ptr)); \
- break; \
- case 8: \
- __stq_u(val, (unsigned long long *)(ptr)); \
- break; \
- default: \
- __put_unaligned_bad_length(); \
- break; \
- } \
-} while(0)
+ switch (size) {
+ case 1:
+ val = *(const __u8 *)ptr;
+ break;
+ case 2:
+ val = __uldw((const __u16 *)ptr);
+ break;
+ case 4:
+ val = __uldl((const __u32 *)ptr);
+ break;
+ case 8:
+ val = __uldq((const __u64 *)ptr);
+ break;
+ default:
+ bad_unaligned_access_length();
+ }
+ return val;
+}
+
+extern inline void __put_unaligned(__u64 val, void *ptr, size_t size)
+{
+ switch (size) {
+ case 1:
+ *(__u8 *)ptr = (val);
+ break;
+ case 2:
+ __ustw(val, (__u16 *)ptr);
+ break;
+ case 4:
+ __ustl(val, (__u32 *)ptr);
+ break;
+ case 8:
+ __ustq(val, (__u64 *)ptr);
+ break;
+ default:
+ bad_unaligned_access_length();
+ }
+}
#endif /* _ASM_UNALIGNED_H */
diff -Nru a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
--- a/include/asm-mips/unistd.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-mips/unistd.h Sun Aug 3 13:14:44 2003
@@ -4,10 +4,21 @@
* for more details.
*
* Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ *
+ * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
+ * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
*/
#ifndef _ASM_UNISTD_H
#define _ASM_UNISTD_H
+#include <asm/sgidefs.h>
+
+#if _MIPS_SIM == _MIPS_SIM_ABI32
+
+/*
+ * Linux o32 style syscalls are in the range from 4000 to 4999.
+ */
#define __NR_Linux 4000
#define __NR_syscall (__NR_Linux + 0)
#define __NR_exit (__NR_Linux + 1)
@@ -266,11 +277,519 @@
#define __NR_fadvise64 (__NR_Linux + 254)
#define __NR_statfs64 (__NR_Linux + 255)
#define __NR_fstatfs64 (__NR_Linux + 256)
+#define __NR_timer_create (__NR_Linux + 257)
+#define __NR_timer_settime (__NR_Linux + 258)
+#define __NR_timer_gettime (__NR_Linux + 259)
+#define __NR_timer_getoverrun (__NR_Linux + 260)
+#define __NR_timer_delete (__NR_Linux + 261)
+#define __NR_clock_settime (__NR_Linux + 262)
+#define __NR_clock_gettime (__NR_Linux + 263)
+#define __NR_clock_getres (__NR_Linux + 264)
+#define __NR_clock_nanosleep (__NR_Linux + 265)
+#define __NR_tgkill (__NR_Linux + 266)
+#define __NR_utimes (__NR_Linux + 267)
+
+/*
+ * Offset of the last Linux o32 flavoured syscall
+ */
+#define __NR_Linux_syscalls 267
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#define __NR_O32_Linux 4000
+#define __NR_O32_Linux_syscalls 267
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64
+
+/*
+ * Linux 64-bit syscalls are in the range from 5000 to 5999.
+ */
+#define __NR_Linux 5000
+#define __NR_read (__NR_Linux + 0)
+#define __NR_write (__NR_Linux + 1)
+#define __NR_open (__NR_Linux + 2)
+#define __NR_close (__NR_Linux + 3)
+#define __NR_stat (__NR_Linux + 4)
+#define __NR_fstat (__NR_Linux + 5)
+#define __NR_lstat (__NR_Linux + 6)
+#define __NR_poll (__NR_Linux + 7)
+#define __NR_lseek (__NR_Linux + 8)
+#define __NR_mmap (__NR_Linux + 9)
+#define __NR_mprotect (__NR_Linux + 10)
+#define __NR_munmap (__NR_Linux + 11)
+#define __NR_brk (__NR_Linux + 12)
+#define __NR_rt_sigaction (__NR_Linux + 13)
+#define __NR_rt_sigprocmask (__NR_Linux + 14)
+#define __NR_ioctl (__NR_Linux + 15)
+#define __NR_pread64 (__NR_Linux + 16)
+#define __NR_pwrite64 (__NR_Linux + 17)
+#define __NR_readv (__NR_Linux + 18)
+#define __NR_writev (__NR_Linux + 19)
+#define __NR_access (__NR_Linux + 20)
+#define __NR_pipe (__NR_Linux + 21)
+#define __NR__newselect (__NR_Linux + 22)
+#define __NR_sched_yield (__NR_Linux + 23)
+#define __NR_mremap (__NR_Linux + 24)
+#define __NR_msync (__NR_Linux + 25)
+#define __NR_mincore (__NR_Linux + 26)
+#define __NR_madvise (__NR_Linux + 27)
+#define __NR_shmget (__NR_Linux + 28)
+#define __NR_shmat (__NR_Linux + 29)
+#define __NR_shmctl (__NR_Linux + 30)
+#define __NR_dup (__NR_Linux + 31)
+#define __NR_dup2 (__NR_Linux + 32)
+#define __NR_pause (__NR_Linux + 33)
+#define __NR_nanosleep (__NR_Linux + 34)
+#define __NR_getitimer (__NR_Linux + 35)
+#define __NR_setitimer (__NR_Linux + 36)
+#define __NR_alarm (__NR_Linux + 37)
+#define __NR_getpid (__NR_Linux + 38)
+#define __NR_sendfile (__NR_Linux + 39)
+#define __NR_socket (__NR_Linux + 40)
+#define __NR_connect (__NR_Linux + 41)
+#define __NR_accept (__NR_Linux + 42)
+#define __NR_sendto (__NR_Linux + 43)
+#define __NR_recvfrom (__NR_Linux + 44)
+#define __NR_sendmsg (__NR_Linux + 45)
+#define __NR_recvmsg (__NR_Linux + 46)
+#define __NR_shutdown (__NR_Linux + 47)
+#define __NR_bind (__NR_Linux + 48)
+#define __NR_listen (__NR_Linux + 49)
+#define __NR_getsockname (__NR_Linux + 50)
+#define __NR_getpeername (__NR_Linux + 51)
+#define __NR_socketpair (__NR_Linux + 52)
+#define __NR_setsockopt (__NR_Linux + 53)
+#define __NR_getsockopt (__NR_Linux + 54)
+#define __NR_clone (__NR_Linux + 55)
+#define __NR_fork (__NR_Linux + 56)
+#define __NR_execve (__NR_Linux + 57)
+#define __NR_exit (__NR_Linux + 58)
+#define __NR_wait4 (__NR_Linux + 59)
+#define __NR_kill (__NR_Linux + 60)
+#define __NR_uname (__NR_Linux + 61)
+#define __NR_semget (__NR_Linux + 62)
+#define __NR_semop (__NR_Linux + 63)
+#define __NR_semctl (__NR_Linux + 64)
+#define __NR_shmdt (__NR_Linux + 65)
+#define __NR_msgget (__NR_Linux + 66)
+#define __NR_msgsnd (__NR_Linux + 67)
+#define __NR_msgrcv (__NR_Linux + 68)
+#define __NR_msgctl (__NR_Linux + 69)
+#define __NR_fcntl (__NR_Linux + 70)
+#define __NR_flock (__NR_Linux + 71)
+#define __NR_fsync (__NR_Linux + 72)
+#define __NR_fdatasync (__NR_Linux + 73)
+#define __NR_truncate (__NR_Linux + 74)
+#define __NR_ftruncate (__NR_Linux + 75)
+#define __NR_getdents (__NR_Linux + 76)
+#define __NR_getcwd (__NR_Linux + 77)
+#define __NR_chdir (__NR_Linux + 78)
+#define __NR_fchdir (__NR_Linux + 79)
+#define __NR_rename (__NR_Linux + 80)
+#define __NR_mkdir (__NR_Linux + 81)
+#define __NR_rmdir (__NR_Linux + 82)
+#define __NR_creat (__NR_Linux + 83)
+#define __NR_link (__NR_Linux + 84)
+#define __NR_unlink (__NR_Linux + 85)
+#define __NR_symlink (__NR_Linux + 86)
+#define __NR_readlink (__NR_Linux + 87)
+#define __NR_chmod (__NR_Linux + 88)
+#define __NR_fchmod (__NR_Linux + 89)
+#define __NR_chown (__NR_Linux + 90)
+#define __NR_fchown (__NR_Linux + 91)
+#define __NR_lchown (__NR_Linux + 92)
+#define __NR_umask (__NR_Linux + 93)
+#define __NR_gettimeofday (__NR_Linux + 94)
+#define __NR_getrlimit (__NR_Linux + 95)
+#define __NR_getrusage (__NR_Linux + 96)
+#define __NR_sysinfo (__NR_Linux + 97)
+#define __NR_times (__NR_Linux + 98)
+#define __NR_ptrace (__NR_Linux + 99)
+#define __NR_getuid (__NR_Linux + 100)
+#define __NR_syslog (__NR_Linux + 101)
+#define __NR_getgid (__NR_Linux + 102)
+#define __NR_setuid (__NR_Linux + 103)
+#define __NR_setgid (__NR_Linux + 104)
+#define __NR_geteuid (__NR_Linux + 105)
+#define __NR_getegid (__NR_Linux + 106)
+#define __NR_setpgid (__NR_Linux + 107)
+#define __NR_getppid (__NR_Linux + 108)
+#define __NR_getpgrp (__NR_Linux + 109)
+#define __NR_setsid (__NR_Linux + 110)
+#define __NR_setreuid (__NR_Linux + 111)
+#define __NR_setregid (__NR_Linux + 112)
+#define __NR_getgroups (__NR_Linux + 113)
+#define __NR_setgroups (__NR_Linux + 114)
+#define __NR_setresuid (__NR_Linux + 115)
+#define __NR_getresuid (__NR_Linux + 116)
+#define __NR_setresgid (__NR_Linux + 117)
+#define __NR_getresgid (__NR_Linux + 118)
+#define __NR_getpgid (__NR_Linux + 119)
+#define __NR_setfsuid (__NR_Linux + 120)
+#define __NR_setfsgid (__NR_Linux + 121)
+#define __NR_getsid (__NR_Linux + 122)
+#define __NR_capget (__NR_Linux + 123)
+#define __NR_capset (__NR_Linux + 124)
+#define __NR_rt_sigpending (__NR_Linux + 125)
+#define __NR_rt_sigtimedwait (__NR_Linux + 126)
+#define __NR_rt_sigqueueinfo (__NR_Linux + 127)
+#define __NR_rt_sigsuspend (__NR_Linux + 128)
+#define __NR_sigaltstack (__NR_Linux + 129)
+#define __NR_utime (__NR_Linux + 130)
+#define __NR_mknod (__NR_Linux + 131)
+#define __NR_personality (__NR_Linux + 132)
+#define __NR_ustat (__NR_Linux + 133)
+#define __NR_statfs (__NR_Linux + 134)
+#define __NR_fstatfs (__NR_Linux + 135)
+#define __NR_sysfs (__NR_Linux + 136)
+#define __NR_getpriority (__NR_Linux + 137)
+#define __NR_setpriority (__NR_Linux + 138)
+#define __NR_sched_setparam (__NR_Linux + 139)
+#define __NR_sched_getparam (__NR_Linux + 140)
+#define __NR_sched_setscheduler (__NR_Linux + 141)
+#define __NR_sched_getscheduler (__NR_Linux + 142)
+#define __NR_sched_get_priority_max (__NR_Linux + 143)
+#define __NR_sched_get_priority_min (__NR_Linux + 144)
+#define __NR_sched_rr_get_interval (__NR_Linux + 145)
+#define __NR_mlock (__NR_Linux + 146)
+#define __NR_munlock (__NR_Linux + 147)
+#define __NR_mlockall (__NR_Linux + 148)
+#define __NR_munlockall (__NR_Linux + 149)
+#define __NR_vhangup (__NR_Linux + 150)
+#define __NR_pivot_root (__NR_Linux + 151)
+#define __NR__sysctl (__NR_Linux + 152)
+#define __NR_prctl (__NR_Linux + 153)
+#define __NR_adjtimex (__NR_Linux + 154)
+#define __NR_setrlimit (__NR_Linux + 155)
+#define __NR_chroot (__NR_Linux + 156)
+#define __NR_sync (__NR_Linux + 157)
+#define __NR_acct (__NR_Linux + 158)
+#define __NR_settimeofday (__NR_Linux + 159)
+#define __NR_mount (__NR_Linux + 160)
+#define __NR_umount2 (__NR_Linux + 161)
+#define __NR_swapon (__NR_Linux + 162)
+#define __NR_swapoff (__NR_Linux + 163)
+#define __NR_reboot (__NR_Linux + 164)
+#define __NR_sethostname (__NR_Linux + 165)
+#define __NR_setdomainname (__NR_Linux + 166)
+#define __NR_create_module (__NR_Linux + 167)
+#define __NR_init_module (__NR_Linux + 168)
+#define __NR_delete_module (__NR_Linux + 169)
+#define __NR_get_kernel_syms (__NR_Linux + 170)
+#define __NR_query_module (__NR_Linux + 171)
+#define __NR_quotactl (__NR_Linux + 172)
+#define __NR_nfsservctl (__NR_Linux + 173)
+#define __NR_getpmsg (__NR_Linux + 174)
+#define __NR_putpmsg (__NR_Linux + 175)
+#define __NR_afs_syscall (__NR_Linux + 176)
+#define __NR_reserved177 (__NR_Linux + 177)
+#define __NR_gettid (__NR_Linux + 178)
+#define __NR_readahead (__NR_Linux + 179)
+#define __NR_setxattr (__NR_Linux + 180)
+#define __NR_lsetxattr (__NR_Linux + 181)
+#define __NR_fsetxattr (__NR_Linux + 182)
+#define __NR_getxattr (__NR_Linux + 183)
+#define __NR_lgetxattr (__NR_Linux + 184)
+#define __NR_fgetxattr (__NR_Linux + 185)
+#define __NR_listxattr (__NR_Linux + 186)
+#define __NR_llistxattr (__NR_Linux + 187)
+#define __NR_flistxattr (__NR_Linux + 188)
+#define __NR_removexattr (__NR_Linux + 189)
+#define __NR_lremovexattr (__NR_Linux + 190)
+#define __NR_fremovexattr (__NR_Linux + 191)
+#define __NR_tkill (__NR_Linux + 192)
+#define __NR_time (__NR_Linux + 193)
+#define __NR_futex (__NR_Linux + 194)
+#define __NR_sched_setaffinity (__NR_Linux + 195)
+#define __NR_sched_getaffinity (__NR_Linux + 196)
+#define __NR_cacheflush (__NR_Linux + 197)
+#define __NR_cachectl (__NR_Linux + 198)
+#define __NR_sysmips (__NR_Linux + 199)
+#define __NR_io_setup (__NR_Linux + 200)
+#define __NR_io_destroy (__NR_Linux + 201)
+#define __NR_io_getevents (__NR_Linux + 202)
+#define __NR_io_submit (__NR_Linux + 203)
+#define __NR_io_cancel (__NR_Linux + 204)
+#define __NR_exit_group (__NR_Linux + 205)
+#define __NR_lookup_dcookie (__NR_Linux + 206)
+#define __NR_epoll_create (__NR_Linux + 207)
+#define __NR_epoll_ctl (__NR_Linux + 208)
+#define __NR_epoll_wait (__NR_Linux + 209)
+#define __NR_remap_file_pages (__NR_Linux + 210)
+#define __NR_rt_sigreturn (__NR_Linux + 211)
+#define __NR_set_tid_address (__NR_Linux + 212)
+#define __NR_restart_syscall (__NR_Linux + 213)
+#define __NR_semtimedop (__NR_Linux + 214)
+#define __NR_fadvise64 (__NR_Linux + 215)
+#define __NR_timer_create (__NR_Linux + 216)
+#define __NR_timer_settime (__NR_Linux + 217)
+#define __NR_timer_gettime (__NR_Linux + 218)
+#define __NR_timer_getoverrun (__NR_Linux + 219)
+#define __NR_timer_delete (__NR_Linux + 220)
+#define __NR_clock_settime (__NR_Linux + 221)
+#define __NR_clock_gettime (__NR_Linux + 222)
+#define __NR_clock_getres (__NR_Linux + 223)
+#define __NR_clock_nanosleep (__NR_Linux + 224)
+#define __NR_tgkill (__NR_Linux + 225)
+#define __NR_utimes (__NR_Linux + 226)
/*
* Offset of the last Linux flavoured syscall
*/
-#define __NR_Linux_syscalls 256
+#define __NR_Linux_syscalls 226
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
+
+#define __NR_64_Linux 5000
+#define __NR_64_Linux_syscalls 226
+
+#if _MIPS_SIM == _MIPS_SIM_NABI32
+
+/*
+ * Linux N32 syscalls are in the range from 6000 to 6999.
+ */
+#define __NR_Linux 6000
+#define __NR_read (__NR_Linux + 0)
+#define __NR_write (__NR_Linux + 1)
+#define __NR_open (__NR_Linux + 2)
+#define __NR_close (__NR_Linux + 3)
+#define __NR_stat (__NR_Linux + 4)
+#define __NR_fstat (__NR_Linux + 5)
+#define __NR_lstat (__NR_Linux + 6)
+#define __NR_poll (__NR_Linux + 7)
+#define __NR_lseek (__NR_Linux + 8)
+#define __NR_mmap (__NR_Linux + 9)
+#define __NR_mprotect (__NR_Linux + 10)
+#define __NR_munmap (__NR_Linux + 11)
+#define __NR_brk (__NR_Linux + 12)
+#define __NR_rt_sigaction (__NR_Linux + 13)
+#define __NR_rt_sigprocmask (__NR_Linux + 14)
+#define __NR_ioctl (__NR_Linux + 15)
+#define __NR_pread64 (__NR_Linux + 16)
+#define __NR_pwrite64 (__NR_Linux + 17)
+#define __NR_readv (__NR_Linux + 18)
+#define __NR_writev (__NR_Linux + 19)
+#define __NR_access (__NR_Linux + 20)
+#define __NR_pipe (__NR_Linux + 21)
+#define __NR__newselect (__NR_Linux + 22)
+#define __NR_sched_yield (__NR_Linux + 23)
+#define __NR_mremap (__NR_Linux + 24)
+#define __NR_msync (__NR_Linux + 25)
+#define __NR_mincore (__NR_Linux + 26)
+#define __NR_madvise (__NR_Linux + 27)
+#define __NR_shmget (__NR_Linux + 28)
+#define __NR_shmat (__NR_Linux + 29)
+#define __NR_shmctl (__NR_Linux + 30)
+#define __NR_dup (__NR_Linux + 31)
+#define __NR_dup2 (__NR_Linux + 32)
+#define __NR_pause (__NR_Linux + 33)
+#define __NR_nanosleep (__NR_Linux + 34)
+#define __NR_getitimer (__NR_Linux + 35)
+#define __NR_setitimer (__NR_Linux + 36)
+#define __NR_alarm (__NR_Linux + 37)
+#define __NR_getpid (__NR_Linux + 38)
+#define __NR_sendfile (__NR_Linux + 39)
+#define __NR_socket (__NR_Linux + 40)
+#define __NR_connect (__NR_Linux + 41)
+#define __NR_accept (__NR_Linux + 42)
+#define __NR_sendto (__NR_Linux + 43)
+#define __NR_recvfrom (__NR_Linux + 44)
+#define __NR_sendmsg (__NR_Linux + 45)
+#define __NR_recvmsg (__NR_Linux + 46)
+#define __NR_shutdown (__NR_Linux + 47)
+#define __NR_bind (__NR_Linux + 48)
+#define __NR_listen (__NR_Linux + 49)
+#define __NR_getsockname (__NR_Linux + 50)
+#define __NR_getpeername (__NR_Linux + 51)
+#define __NR_socketpair (__NR_Linux + 52)
+#define __NR_setsockopt (__NR_Linux + 53)
+#define __NR_getsockopt (__NR_Linux + 54)
+#define __NR_clone (__NR_Linux + 55)
+#define __NR_fork (__NR_Linux + 56)
+#define __NR_execve (__NR_Linux + 57)
+#define __NR_exit (__NR_Linux + 58)
+#define __NR_wait4 (__NR_Linux + 59)
+#define __NR_kill (__NR_Linux + 60)
+#define __NR_uname (__NR_Linux + 61)
+#define __NR_semget (__NR_Linux + 62)
+#define __NR_semop (__NR_Linux + 63)
+#define __NR_semctl (__NR_Linux + 64)
+#define __NR_shmdt (__NR_Linux + 65)
+#define __NR_msgget (__NR_Linux + 66)
+#define __NR_msgsnd (__NR_Linux + 67)
+#define __NR_msgrcv (__NR_Linux + 68)
+#define __NR_msgctl (__NR_Linux + 69)
+#define __NR_fcntl (__NR_Linux + 70)
+#define __NR_flock (__NR_Linux + 71)
+#define __NR_fsync (__NR_Linux + 72)
+#define __NR_fdatasync (__NR_Linux + 73)
+#define __NR_truncate (__NR_Linux + 74)
+#define __NR_ftruncate (__NR_Linux + 75)
+#define __NR_getdents (__NR_Linux + 76)
+#define __NR_getcwd (__NR_Linux + 77)
+#define __NR_chdir (__NR_Linux + 78)
+#define __NR_fchdir (__NR_Linux + 79)
+#define __NR_rename (__NR_Linux + 80)
+#define __NR_mkdir (__NR_Linux + 81)
+#define __NR_rmdir (__NR_Linux + 82)
+#define __NR_creat (__NR_Linux + 83)
+#define __NR_link (__NR_Linux + 84)
+#define __NR_unlink (__NR_Linux + 85)
+#define __NR_symlink (__NR_Linux + 86)
+#define __NR_readlink (__NR_Linux + 87)
+#define __NR_chmod (__NR_Linux + 88)
+#define __NR_fchmod (__NR_Linux + 89)
+#define __NR_chown (__NR_Linux + 90)
+#define __NR_fchown (__NR_Linux + 91)
+#define __NR_lchown (__NR_Linux + 92)
+#define __NR_umask (__NR_Linux + 93)
+#define __NR_gettimeofday (__NR_Linux + 94)
+#define __NR_getrlimit (__NR_Linux + 95)
+#define __NR_getrusage (__NR_Linux + 96)
+#define __NR_sysinfo (__NR_Linux + 97)
+#define __NR_times (__NR_Linux + 98)
+#define __NR_ptrace (__NR_Linux + 99)
+#define __NR_getuid (__NR_Linux + 100)
+#define __NR_syslog (__NR_Linux + 101)
+#define __NR_getgid (__NR_Linux + 102)
+#define __NR_setuid (__NR_Linux + 103)
+#define __NR_setgid (__NR_Linux + 104)
+#define __NR_geteuid (__NR_Linux + 105)
+#define __NR_getegid (__NR_Linux + 106)
+#define __NR_setpgid (__NR_Linux + 107)
+#define __NR_getppid (__NR_Linux + 108)
+#define __NR_getpgrp (__NR_Linux + 109)
+#define __NR_setsid (__NR_Linux + 110)
+#define __NR_setreuid (__NR_Linux + 111)
+#define __NR_setregid (__NR_Linux + 112)
+#define __NR_getgroups (__NR_Linux + 113)
+#define __NR_setgroups (__NR_Linux + 114)
+#define __NR_setresuid (__NR_Linux + 115)
+#define __NR_getresuid (__NR_Linux + 116)
+#define __NR_setresgid (__NR_Linux + 117)
+#define __NR_getresgid (__NR_Linux + 118)
+#define __NR_getpgid (__NR_Linux + 119)
+#define __NR_setfsuid (__NR_Linux + 120)
+#define __NR_setfsgid (__NR_Linux + 121)
+#define __NR_getsid (__NR_Linux + 122)
+#define __NR_capget (__NR_Linux + 123)
+#define __NR_capset (__NR_Linux + 124)
+#define __NR_rt_sigpending (__NR_Linux + 125)
+#define __NR_rt_sigtimedwait (__NR_Linux + 126)
+#define __NR_rt_sigqueueinfo (__NR_Linux + 127)
+#define __NR_rt_sigsuspend (__NR_Linux + 128)
+#define __NR_sigaltstack (__NR_Linux + 129)
+#define __NR_utime (__NR_Linux + 130)
+#define __NR_mknod (__NR_Linux + 131)
+#define __NR_personality (__NR_Linux + 132)
+#define __NR_ustat (__NR_Linux + 133)
+#define __NR_statfs (__NR_Linux + 134)
+#define __NR_fstatfs (__NR_Linux + 135)
+#define __NR_sysfs (__NR_Linux + 136)
+#define __NR_getpriority (__NR_Linux + 137)
+#define __NR_setpriority (__NR_Linux + 138)
+#define __NR_sched_setparam (__NR_Linux + 139)
+#define __NR_sched_getparam (__NR_Linux + 140)
+#define __NR_sched_setscheduler (__NR_Linux + 141)
+#define __NR_sched_getscheduler (__NR_Linux + 142)
+#define __NR_sched_get_priority_max (__NR_Linux + 143)
+#define __NR_sched_get_priority_min (__NR_Linux + 144)
+#define __NR_sched_rr_get_interval (__NR_Linux + 145)
+#define __NR_mlock (__NR_Linux + 146)
+#define __NR_munlock (__NR_Linux + 147)
+#define __NR_mlockall (__NR_Linux + 148)
+#define __NR_munlockall (__NR_Linux + 149)
+#define __NR_vhangup (__NR_Linux + 150)
+#define __NR_pivot_root (__NR_Linux + 151)
+#define __NR__sysctl (__NR_Linux + 152)
+#define __NR_prctl (__NR_Linux + 153)
+#define __NR_adjtimex (__NR_Linux + 154)
+#define __NR_setrlimit (__NR_Linux + 155)
+#define __NR_chroot (__NR_Linux + 156)
+#define __NR_sync (__NR_Linux + 157)
+#define __NR_acct (__NR_Linux + 158)
+#define __NR_settimeofday (__NR_Linux + 159)
+#define __NR_mount (__NR_Linux + 160)
+#define __NR_umount2 (__NR_Linux + 161)
+#define __NR_swapon (__NR_Linux + 162)
+#define __NR_swapoff (__NR_Linux + 163)
+#define __NR_reboot (__NR_Linux + 164)
+#define __NR_sethostname (__NR_Linux + 165)
+#define __NR_setdomainname (__NR_Linux + 166)
+#define __NR_create_module (__NR_Linux + 167)
+#define __NR_init_module (__NR_Linux + 168)
+#define __NR_delete_module (__NR_Linux + 169)
+#define __NR_get_kernel_syms (__NR_Linux + 170)
+#define __NR_query_module (__NR_Linux + 171)
+#define __NR_quotactl (__NR_Linux + 172)
+#define __NR_nfsservctl (__NR_Linux + 173)
+#define __NR_getpmsg (__NR_Linux + 174)
+#define __NR_putpmsg (__NR_Linux + 175)
+#define __NR_afs_syscall (__NR_Linux + 176)
+#define __NR_reserved177 (__NR_Linux + 177)
+#define __NR_gettid (__NR_Linux + 178)
+#define __NR_readahead (__NR_Linux + 179)
+#define __NR_setxattr (__NR_Linux + 180)
+#define __NR_lsetxattr (__NR_Linux + 181)
+#define __NR_fsetxattr (__NR_Linux + 182)
+#define __NR_getxattr (__NR_Linux + 183)
+#define __NR_lgetxattr (__NR_Linux + 184)
+#define __NR_fgetxattr (__NR_Linux + 185)
+#define __NR_listxattr (__NR_Linux + 186)
+#define __NR_llistxattr (__NR_Linux + 187)
+#define __NR_flistxattr (__NR_Linux + 188)
+#define __NR_removexattr (__NR_Linux + 189)
+#define __NR_lremovexattr (__NR_Linux + 190)
+#define __NR_fremovexattr (__NR_Linux + 191)
+#define __NR_tkill (__NR_Linux + 192)
+#define __NR_time (__NR_Linux + 193)
+#define __NR_futex (__NR_Linux + 194)
+#define __NR_sched_setaffinity (__NR_Linux + 195)
+#define __NR_sched_getaffinity (__NR_Linux + 196)
+#define __NR_cacheflush (__NR_Linux + 197)
+#define __NR_cachectl (__NR_Linux + 198)
+#define __NR_sysmips (__NR_Linux + 199)
+#define __NR_io_setup (__NR_Linux + 200)
+#define __NR_io_destroy (__NR_Linux + 201)
+#define __NR_io_getevents (__NR_Linux + 202)
+#define __NR_io_submit (__NR_Linux + 203)
+#define __NR_io_cancel (__NR_Linux + 204)
+#define __NR_exit_group (__NR_Linux + 205)
+#define __NR_lookup_dcookie (__NR_Linux + 206)
+#define __NR_epoll_create (__NR_Linux + 207)
+#define __NR_epoll_ctl (__NR_Linux + 208)
+#define __NR_epoll_wait (__NR_Linux + 209)
+#define __NR_remap_file_pages (__NR_Linux + 210)
+#define __NR_rt_sigreturn (__NR_Linux + 211)
+#define __NR_fcntl64 (__NR_Linux + 212)
+#define __NR_set_tid_address (__NR_Linux + 213)
+#define __NR_restart_syscall (__NR_Linux + 214)
+#define __NR_semtimedop (__NR_Linux + 215)
+#define __NR_fadvise64 (__NR_Linux + 216)
+#define __NR_statfs64 (__NR_Linux + 217)
+#define __NR_fstatfs64 (__NR_Linux + 218)
+#define __NR_sendfile64 (__NR_Linux + 219)
+#define __NR_timer_create (__NR_Linux + 221)
+#define __NR_timer_settime (__NR_Linux + 222)
+#define __NR_timer_gettime (__NR_Linux + 223)
+#define __NR_timer_getoverrun (__NR_Linux + 224)
+#define __NR_timer_delete (__NR_Linux + 225)
+#define __NR_clock_settime (__NR_Linux + 226)
+#define __NR_clock_gettime (__NR_Linux + 227)
+#define __NR_clock_getres (__NR_Linux + 228)
+#define __NR_clock_nanosleep (__NR_Linux + 229)
+#define __NR_tgkill (__NR_Linux + 230)
+#define __NR_utimes (__NR_Linux + 231)
+
+/*
+ * Offset of the last N32 flavoured syscall
+ */
+#define __NR_Linux_syscalls 231
+
+#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+#define __NR_N32_Linux 6000
+#define __NR_N32_Linux_syscalls 231
#ifndef __ASSEMBLY__
@@ -278,17 +797,18 @@
#define _syscall0(type,name) \
type name(void) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
"li\t$2, %2\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -303,18 +823,19 @@
#define _syscall1(type,name,atype,a) \
type name(atype a) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
"li\t$2, %3\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "r" (__a0), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -325,19 +846,20 @@
#define _syscall2(type,name,atype,a,btype,b) \
type name(atype a, btype b) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a1 asm("$5") = (unsigned long) b; \
register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
"li\t$2, %4\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "r" (__a0), "r" (__a1), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -348,20 +870,21 @@
#define _syscall3(type,name,atype,a,btype,b,ctype,c) \
type name(atype a, btype b, ctype c) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a1 asm("$5") = (unsigned long) b; \
register unsigned long __a2 asm("$6") = (unsigned long) c; \
register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
"li\t$2, %5\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -372,20 +895,21 @@
#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
type name(atype a, btype b, ctype c, dtype d) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a1 asm("$5") = (unsigned long) b; \
register unsigned long __a2 asm("$6") = (unsigned long) c; \
register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
"li\t$2, %5\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
".set\treorder" \
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -393,6 +917,8 @@
return -1; \
}
+#if (_MIPS_SIM == _MIPS_SIM_ABIN32)
+
/*
* Using those means your brain needs more than an oil change ;-)
*/
@@ -400,11 +926,11 @@
#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
type name(atype a, btype b, ctype c, dtype d, etype e) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a1 asm("$5") = (unsigned long) b; \
register unsigned long __a2 asm("$6") = (unsigned long) c; \
register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
@@ -413,12 +939,13 @@
"sw\t$2, 16($29)\n\t" \
"li\t$2, %5\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
"addiu\t$29, 32\n\t" \
".set\treorder" \
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
"m" ((unsigned long)e) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -429,11 +956,11 @@
#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a1 asm("$5") = (unsigned long) b; \
register unsigned long __a2 asm("$6") = (unsigned long) c; \
register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
@@ -444,12 +971,43 @@
"sw\t$8, 20($29)\n\t" \
"li\t$2, %5\t\t\t# " #name "\n\t" \
"syscall\n\t" \
+ "move\t%0, $2\n\t" \
"addiu\t$29, 32\n\t" \
".set\treorder" \
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
"m" ((unsigned long)e), "m" ((unsigned long)f) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ errno = __v0; \
+ return -1; \
+}
+
+#endif /* (_MIPS_SIM == _MIPS_SIM_ABIN32) */
+
+#if (_MIPS_SIM == _MIPS_SIM_NABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
+
+#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
+type name (atype a,btype b,ctype c,dtype d,etype e) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ register unsigned long __a4 asm("$8") = (unsigned long) e; \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "li\t$2, %6\t\t\t# " #name "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
+ : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -457,33 +1015,27 @@
return -1; \
}
-#define _syscall7(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f,gtype,g) \
-type name(atype a, btype b, ctype c, dtype d, etype e, ftype f, gtype g) \
+#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
+type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
register unsigned long __a0 asm("$4") = (unsigned long) a; \
register unsigned long __a1 asm("$5") = (unsigned long) b; \
register unsigned long __a2 asm("$6") = (unsigned long) c; \
register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ register unsigned long __a4 asm("$8") = (unsigned long) e; \
+ register unsigned long __a5 asm("$9") = (unsigned long) f; \
+ unsigned long __v0; \
\
__asm__ volatile ( \
".set\tnoreorder\n\t" \
- "lw\t$2, %6\n\t" \
- "lw\t$8, %7\n\t" \
- "lw\t$9, %8\n\t" \
- "subu\t$29, 32\n\t" \
- "sw\t$2, 16($29)\n\t" \
- "sw\t$8, 20($29)\n\t" \
- "sw\t$9, 24($29)\n\t" \
- "li\t$2, %5\t\t\t# " #name "\n\t" \
+ "li\t$2, %7\t\t\t# " #name "\n\t" \
"syscall\n\t" \
- "addiu\t$29, 32\n\t" \
+ "move\t%0, $2\n\t" \
".set\treorder" \
: "=&r" (__v0), "+r" (__a3) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
- "m" ((unsigned long)e), "m" ((unsigned long)f), \
- "m" ((unsigned long)g), \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \
+ "i" (__NR_##name) \
+ : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
\
if (__a3 == 0) \
return (type) __v0; \
@@ -491,6 +1043,7 @@
return -1; \
}
+#endif /* (_MIPS_SIM == _MIPS_SIM_NABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
#ifdef __KERNEL_SYSCALLS__
@@ -516,7 +1069,13 @@
static inline _syscall3(int,open,const char *,file,int,flag,int,mode)
static inline _syscall1(int,close,int,fd)
static inline _syscall1(int,_exit,int,exitcode)
-static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
+struct rusage;
+static inline _syscall4(pid_t,wait4,pid_t,pid,int *,stat_addr,int,options,struct rusage *,ru)
+
+static inline pid_t waitpid(int pid, int * wait_stat, int flags)
+{
+ return wait4(pid, wait_stat, flags, NULL);
+}
#endif /* __KERNEL_SYSCALLS__ */
#endif /* !__ASSEMBLY__ */
diff -Nru a/include/asm-mips/user.h b/include/asm-mips/user.h
--- a/include/asm-mips/user.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-mips/user.h Sun Aug 3 13:14:47 2003
@@ -1,5 +1,12 @@
-#ifndef __ASM_MIPS_USER_H
-#define __ASM_MIPS_USER_H
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
+ */
+#ifndef _ASM_USER_H
+#define _ASM_USER_H
#include <asm/page.h>
#include <asm/reg.h>
@@ -28,7 +35,8 @@
* to write an integer number of pages.
*/
struct user {
- unsigned long regs[EF_SIZE/4+64]; /* integer and fp regs */
+ unsigned long regs[EF_SIZE / /* integer and fp regs */
+ sizeof(unsigned long) + 64];
size_t u_tsize; /* text size (pages) */
size_t u_dsize; /* data size (pages) */
size_t u_ssize; /* stack size (pages) */
@@ -47,4 +55,4 @@
#define HOST_DATA_START_ADDR (u.start_data)
#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
-#endif /* __ASM_MIPS_USER_H */
+#endif /* _ASM_USER_H */
diff -Nru a/include/asm-mips/usioctl.h b/include/asm-mips/usioctl.h
--- a/include/asm-mips/usioctl.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,25 +0,0 @@
-/*
- * usema/usemaclone-related stuff.
- *
- * `Inspired' by IRIX's sys/usioctl.h
- *
- * Mike.
- */
-
-/* ioctls */
-#define UIOC ('u' << 16 | 's' << 8)
-
-#define UIOCATTACHSEMA (UIOC|2) /* attach to sema */
-#define UIOCBLOCK (UIOC|3) /* block sync "intr"? */
-#define UIOCABLOCK (UIOC|4) /* block async */
-#define UIOCNOIBLOCK (UIOC|5) /* IRIX: block sync intr
- Linux: block sync nointr */
-#define UIOCUNBLOCK (UIOC|6) /* unblock sync */
-#define UIOCAUNBLOCK (UIOC|7) /* unblock async */
-#define UIOCINIT (UIOC|8) /* init sema (async) */
-
-typedef struct usattach_s {
- dev_t us_dev; /* attach dev */
- void *us_handle; /* userland semaphore handle */
-} usattach_t;
-
diff -Nru a/include/asm-mips/vr4181/irq.h b/include/asm-mips/vr4181/irq.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/vr4181/irq.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,122 @@
+/*
+ * Macros for vr4181 IRQ numbers.
+ *
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+/*
+ * Strategy:
+ *
+ * Vr4181 has conceptually three levels of interrupt controllers:
+ * 1. the CPU itself with 8 intr level.
+ * 2. system interrupt controller, cascaded from int0 pin in CPU, 32 intrs
+ * 3. GPIO interrupts : forwarding external interrupts to sys intr controller
+ */
+
+/* decide the irq block assignment */
+#define VR4181_NUM_CPU_IRQ 8
+#define VR4181_NUM_SYS_IRQ 32
+#define VR4181_NUM_GPIO_IRQ 16
+
+#define VR4181_IRQ_BASE 0
+
+#define VR4181_CPU_IRQ_BASE VR4181_IRQ_BASE
+#define VR4181_SYS_IRQ_BASE (VR4181_CPU_IRQ_BASE + VR4181_NUM_CPU_IRQ)
+#define VR4181_GPIO_IRQ_BASE (VR4181_SYS_IRQ_BASE + VR4181_NUM_SYS_IRQ)
+
+/* CPU interrupts */
+
+/*
+ IP0 - Software interrupt
+ IP1 - Software interrupt
+ IP2 - All but battery, high speed modem, and real time clock
+ IP3 - RTC Long1 (system timer)
+ IP4 - RTC Long2
+ IP5 - High Speed Modem (unused on VR4181)
+ IP6 - Unused
+ IP7 - Timer interrupt from CPO_COMPARE
+*/
+
+#define VR4181_IRQ_SW1 (VR4181_CPU_IRQ_BASE + 0)
+#define VR4181_IRQ_SW2 (VR4181_CPU_IRQ_BASE + 1)
+#define VR4181_IRQ_INT0 (VR4181_CPU_IRQ_BASE + 2)
+#define VR4181_IRQ_INT1 (VR4181_CPU_IRQ_BASE + 3)
+#define VR4181_IRQ_INT2 (VR4181_CPU_IRQ_BASE + 4)
+#define VR4181_IRQ_INT3 (VR4181_CPU_IRQ_BASE + 5)
+#define VR4181_IRQ_INT4 (VR4181_CPU_IRQ_BASE + 6)
+#define VR4181_IRQ_TIMER (VR4181_CPU_IRQ_BASE + 7)
+
+
+/* Cascaded from VR4181_IRQ_INT0 (ICU mapped interrupts) */
+
+/*
+ IP2 - same as VR4181_IRQ_INT1
+ IP8 - This is a cascade to GPIO IRQ's. Do not use.
+ IP16 - same as VR4181_IRQ_INT2
+ IP18 - CompactFlash
+*/
+
+#define VR4181_IRQ_BATTERY (VR4181_SYS_IRQ_BASE + 0)
+#define VR4181_IRQ_POWER (VR4181_SYS_IRQ_BASE + 1)
+#define VR4181_IRQ_RTCL1 (VR4181_SYS_IRQ_BASE + 2)
+#define VR4181_IRQ_ETIMER (VR4181_SYS_IRQ_BASE + 3)
+#define VR4181_IRQ_RFU12 (VR4181_SYS_IRQ_BASE + 4)
+#define VR4181_IRQ_PIU (VR4181_SYS_IRQ_BASE + 5)
+#define VR4181_IRQ_AIU (VR4181_SYS_IRQ_BASE + 6)
+#define VR4181_IRQ_KIU (VR4181_SYS_IRQ_BASE + 7)
+#define VR4181_IRQ_GIU (VR4181_SYS_IRQ_BASE + 8)
+#define VR4181_IRQ_SIU (VR4181_SYS_IRQ_BASE + 9)
+#define VR4181_IRQ_RFU18 (VR4181_SYS_IRQ_BASE + 10)
+#define VR4181_IRQ_SOFT (VR4181_SYS_IRQ_BASE + 11)
+#define VR4181_IRQ_RFU20 (VR4181_SYS_IRQ_BASE + 12)
+#define VR4181_IRQ_DOZEPIU (VR4181_SYS_IRQ_BASE + 13)
+#define VR4181_IRQ_RFU22 (VR4181_SYS_IRQ_BASE + 14)
+#define VR4181_IRQ_RFU23 (VR4181_SYS_IRQ_BASE + 15)
+#define VR4181_IRQ_RTCL2 (VR4181_SYS_IRQ_BASE + 16)
+#define VR4181_IRQ_LED (VR4181_SYS_IRQ_BASE + 17)
+#define VR4181_IRQ_ECU (VR4181_SYS_IRQ_BASE + 18)
+#define VR4181_IRQ_CSU (VR4181_SYS_IRQ_BASE + 19)
+#define VR4181_IRQ_USB (VR4181_SYS_IRQ_BASE + 20)
+#define VR4181_IRQ_DMA (VR4181_SYS_IRQ_BASE + 21)
+#define VR4181_IRQ_LCD (VR4181_SYS_IRQ_BASE + 22)
+#define VR4181_IRQ_RFU31 (VR4181_SYS_IRQ_BASE + 23)
+#define VR4181_IRQ_RFU32 (VR4181_SYS_IRQ_BASE + 24)
+#define VR4181_IRQ_RFU33 (VR4181_SYS_IRQ_BASE + 25)
+#define VR4181_IRQ_RFU34 (VR4181_SYS_IRQ_BASE + 26)
+#define VR4181_IRQ_RFU35 (VR4181_SYS_IRQ_BASE + 27)
+#define VR4181_IRQ_RFU36 (VR4181_SYS_IRQ_BASE + 28)
+#define VR4181_IRQ_RFU37 (VR4181_SYS_IRQ_BASE + 29)
+#define VR4181_IRQ_RFU38 (VR4181_SYS_IRQ_BASE + 30)
+#define VR4181_IRQ_RFU39 (VR4181_SYS_IRQ_BASE + 31)
+
+/* Cascaded from VR4181_IRQ_GIU */
+#define VR4181_IRQ_GPIO0 (VR4181_GPIO_IRQ_BASE + 0)
+#define VR4181_IRQ_GPIO1 (VR4181_GPIO_IRQ_BASE + 1)
+#define VR4181_IRQ_GPIO2 (VR4181_GPIO_IRQ_BASE + 2)
+#define VR4181_IRQ_GPIO3 (VR4181_GPIO_IRQ_BASE + 3)
+#define VR4181_IRQ_GPIO4 (VR4181_GPIO_IRQ_BASE + 4)
+#define VR4181_IRQ_GPIO5 (VR4181_GPIO_IRQ_BASE + 5)
+#define VR4181_IRQ_GPIO6 (VR4181_GPIO_IRQ_BASE + 6)
+#define VR4181_IRQ_GPIO7 (VR4181_GPIO_IRQ_BASE + 7)
+#define VR4181_IRQ_GPIO8 (VR4181_GPIO_IRQ_BASE + 8)
+#define VR4181_IRQ_GPIO9 (VR4181_GPIO_IRQ_BASE + 9)
+#define VR4181_IRQ_GPIO10 (VR4181_GPIO_IRQ_BASE + 10)
+#define VR4181_IRQ_GPIO11 (VR4181_GPIO_IRQ_BASE + 11)
+#define VR4181_IRQ_GPIO12 (VR4181_GPIO_IRQ_BASE + 12)
+#define VR4181_IRQ_GPIO13 (VR4181_GPIO_IRQ_BASE + 13)
+#define VR4181_IRQ_GPIO14 (VR4181_GPIO_IRQ_BASE + 14)
+#define VR4181_IRQ_GPIO15 (VR4181_GPIO_IRQ_BASE + 15)
+
+
+// Alternative to above GPIO IRQ defines
+#define VR4181_IRQ_GPIO(pin) ((VR4181_IRQ_GPIO0) + (pin))
+
+#define VR4181_IRQ_MAX (VR4181_IRQ_BASE + VR4181_NUM_CPU_IRQ + \
+ VR4181_NUM_SYS_IRQ + VR4181_NUM_GPIO_IRQ)
diff -Nru a/include/asm-mips/vr4181/vr4181.h b/include/asm-mips/vr4181/vr4181.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/vr4181/vr4181.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,413 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999 by Michael Klar
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ */
+#ifndef __ASM_VR4181_VR4181_H
+#define __ASM_VR4181_VR4181_H
+
+#include <asm/addrspace.h>
+
+#include <asm/vr4181/irq.h>
+
+#ifndef __ASSEMBLY__
+#define __preg8 (volatile unsigned char*)
+#define __preg16 (volatile unsigned short*)
+#define __preg32 (volatile unsigned int*)
+#else
+#define __preg8
+#define __preg16
+#define __preg32
+#endif
+
+// Embedded CPU peripheral registers
+// Note that many of the registers have different physical address for VR4181
+
+// Bus Control Unit (BCU)
+#define VR4181_BCUCNTREG1 __preg16(KSEG1 + 0x0A000000) /* BCU control register 1 (R/W) */
+#define VR4181_CMUCLKMSK __preg16(KSEG1 + 0x0A000004) /* Clock mask register (R/W) */
+#define VR4181_CMUCLKMSK_MSKCSUPCLK 0x0040
+#define VR4181_CMUCLKMSK_MSKAIUPCLK 0x0020
+#define VR4181_CMUCLKMSK_MSKPIUPCLK 0x0010
+#define VR4181_CMUCLKMSK_MSKADUPCLK 0x0008
+#define VR4181_CMUCLKMSK_MSKSIU18M 0x0004
+#define VR4181_CMUCLKMSK_MSKADU18M 0x0002
+#define VR4181_CMUCLKMSK_MSKUSB 0x0001
+#define VR4181_CMUCLKMSK_MSKSIU VR4181_CMUCLKMSK_MSKSIU18M
+#define VR4181_BCUSPEEDREG __preg16(KSEG1 + 0x0A00000C) /* BCU access time parameter (R/W) */
+#define VR4181_BCURFCNTREG __preg16(KSEG1 + 0x0A000010) /* BCU refresh control register (R/W) */
+#define VR4181_REVIDREG __preg16(KSEG1 + 0x0A000014) /* Revision ID register (R) */
+#define VR4181_CLKSPEEDREG __preg16(KSEG1 + 0x0A000018) /* Clock speed register (R) */
+#define VR4181_EDOMCYTREG __preg16(KSEG1 + 0x0A000300) /* Memory cycle timing register (R/W) */
+#define VR4181_MEMCFG_REG __preg16(KSEG1 + 0x0A000304) /* Memory configuration register (R/W) */
+#define VR4181_MODE_REG __preg16(KSEG1 + 0x0A000308) /* SDRAM mode register (R/W) */
+#define VR4181_SDTIMINGREG __preg16(KSEG1 + 0x0A00030C) /* SDRAM timing register (R/W) */
+
+// DMA Control Unit (DCU)
+#define VR4181_MICDEST1REG1 __preg16(KSEG1 + 0x0A000020) /* Microphone destination 1 address register 1 (R/W) */
+#define VR4181_MICDEST1REG2 __preg16(KSEG1 + 0x0A000022) /* Microphone destination 1 address register 2 (R/W) */
+#define VR4181_MICDEST2REG1 __preg16(KSEG1 + 0x0A000024) /* Microphone destination 2 address register 1 (R/W) */
+#define VR4181_MICDEST2REG2 __preg16(KSEG1 + 0x0A000026) /* Microphone destination 2 address register 2 (R/W) */
+#define VR4181_SPKRRC1REG1 __preg16(KSEG1 + 0x0A000028) /* Speaker Source 1 address register 1 (R/W) */
+#define VR4181_SPKRRC1REG2 __preg16(KSEG1 + 0x0A00002A) /* Speaker Source 1 address register 2 (R/W) */
+#define VR4181_SPKRRC2REG1 __preg16(KSEG1 + 0x0A00002C) /* Speaker Source 2 address register 1 (R/W) */
+#define VR4181_SPKRRC2REG2 __preg16(KSEG1 + 0x0A00002E) /* Speaker Source 2 address register 2 (R/W) */
+#define VR4181_DMARSTREG __preg16(KSEG1 + 0x0A000040) /* DMA Reset register (R/W) */
+#define VR4181_AIUDMAMSKREG __preg16(KSEG1 + 0x0A000046) /* Audio DMA mask register (R/W) */
+#define VR4181_USBDMAMSKREG __preg16(KSEG1 + 0x0A000600) /* USB DMA Mask register (R/W) */
+#define VR4181_USBRXS1AREG1 __preg16(KSEG1 + 0x0A000602) /* USB Rx source 1 address register 1 (R/W) */
+#define VR4181_USBRXS1AREG2 __preg16(KSEG1 + 0x0A000604) /* USB Rx source 1 address register 2 (R/W) */
+#define VR4181_USBRXS2AREG1 __preg16(KSEG1 + 0x0A000606) /* USB Rx source 2 address register 1 (R/W) */
+#define VR4181_USBRXS2AREG2 __preg16(KSEG1 + 0x0A000608) /* USB Rx source 2 address register 2 (R/W) */
+#define VR4181_USBTXS1AREG1 __preg16(KSEG1 + 0x0A00060A) /* USB Tx source 1 address register 1 (R/W) */
+#define VR4181_USBTXS1AREG2 __preg16(KSEG1 + 0x0A00060C) /* USB Tx source 1 address register 2 (R/W) */
+#define VR4181_USBTXS2AREG1 __preg16(KSEG1 + 0x0A00060E) /* USB Tx source 2 address register 1 (R/W) */
+#define VR4181_USBTXS2AREG2 __preg16(KSEG1 + 0x0A000610) /* USB Tx source 2 address register 2 (R/W) */
+#define VR4181_USBRXD1AREG1 __preg16(KSEG1 + 0x0A00062A) /* USB Rx destination 1 address register 1 (R/W) */
+#define VR4181_USBRXD1AREG2 __preg16(KSEG1 + 0x0A00062C) /* USB Rx destination 1 address register 2 (R/W) */
+#define VR4181_USBRXD2AREG1 __preg16(KSEG1 + 0x0A00062E) /* USB Rx destination 2 address register 1 (R/W) */
+#define VR4181_USBRXD2AREG2 __preg16(KSEG1 + 0x0A000630) /* USB Rx destination 2 address register 2 (R/W) */
+#define VR4181_USBTXD1AREG1 __preg16(KSEG1 + 0x0A000632) /* USB Tx destination 1 address register 1 (R/W) */
+#define VR4181_USBTXD1AREG2 __preg16(KSEG1 + 0x0A000634) /* USB Tx destination 1 address register 2 (R/W) */
+#define VR4181_USBTXD2AREG1 __preg16(KSEG1 + 0x0A000636) /* USB Tx destination 2 address register 1 (R/W) */
+#define VR4181_USBTXD2AREG2 __preg16(KSEG1 + 0x0A000638) /* USB Tx destination 2 address register 2 (R/W) */
+#define VR4181_RxRCLENREG __preg16(KSEG1 + 0x0A000652) /* USB Rx record length register (R/W) */
+#define VR4181_TxRCLENREG __preg16(KSEG1 + 0x0A000654) /* USB Tx record length register (R/W) */
+#define VR4181_MICRCLENREG __preg16(KSEG1 + 0x0A000658) /* Microphone record length register (R/W) */
+#define VR4181_SPKRCLENREG __preg16(KSEG1 + 0x0A00065A) /* Speaker record length register (R/W) */
+#define VR4181_USBCFGREG __preg16(KSEG1 + 0x0A00065C) /* USB configuration register (R/W) */
+#define VR4181_MICDMACFGREG __preg16(KSEG1 + 0x0A00065E) /* Microphone DMA configuration register (R/W) */
+#define VR4181_SPKDMACFGREG __preg16(KSEG1 + 0x0A000660) /* Speaker DMA configuration register (R/W) */
+#define VR4181_DMAITRQREG __preg16(KSEG1 + 0x0A000662) /* DMA interrupt request register (R/W) */
+#define VR4181_DMACLTREG __preg16(KSEG1 + 0x0A000664) /* DMA control register (R/W) */
+#define VR4181_DMAITMKREG __preg16(KSEG1 + 0x0A000666) /* DMA interrupt mask register (R/W) */
+
+// ISA Bridge
+#define VR4181_ISABRGCTL __preg16(KSEG1 + 0x0B0002C0) /* ISA Bridge Control Register (R/W) */
+#define VR4181_ISABRGSTS __preg16(KSEG1 + 0x0B0002C2) /* ISA Bridge Status Register (R/W) */
+#define VR4181_XISACTL __preg16(KSEG1 + 0x0B0002C4) /* External ISA Control Register (R/W) */
+
+// Clocked Serial Interface (CSI)
+#define VR4181_CSIMODE __preg16(KSEG1 + 0x0B000900) /* CSI Mode Register (R/W) */
+#define VR4181_CSIRXDATA __preg16(KSEG1 + 0x0B000902) /* CSI Receive Data Register (R) */
+#define VR4181_CSITXDATA __preg16(KSEG1 + 0x0B000904) /* CSI Transmit Data Register (R/W) */
+#define VR4181_CSILSTAT __preg16(KSEG1 + 0x0B000906) /* CSI Line Status Register (R/W) */
+#define VR4181_CSIINTMSK __preg16(KSEG1 + 0x0B000908) /* CSI Interrupt Mask Register (R/W) */
+#define VR4181_CSIINTSTAT __preg16(KSEG1 + 0x0B00090a) /* CSI Interrupt Status Register (R/W) */
+#define VR4181_CSITXBLEN __preg16(KSEG1 + 0x0B00090c) /* CSI Transmit Burst Length Register (R/W) */
+#define VR4181_CSIRXBLEN __preg16(KSEG1 + 0x0B00090e) /* CSI Receive Burst Length Register (R/W) */
+
+// Interrupt Control Unit (ICU)
+#define VR4181_SYSINT1REG __preg16(KSEG1 + 0x0A000080) /* Level 1 System interrupt register 1 (R) */
+#define VR4181_MSYSINT1REG __preg16(KSEG1 + 0x0A00008C) /* Level 1 mask system interrupt register 1 (R/W) */
+#define VR4181_NMIREG __preg16(KSEG1 + 0x0A000098) /* NMI register (R/W) */
+#define VR4181_SOFTINTREG __preg16(KSEG1 + 0x0A00009A) /* Software interrupt register (R/W) */
+#define VR4181_SYSINT2REG __preg16(KSEG1 + 0x0A000200) /* Level 1 System interrupt register 2 (R) */
+#define VR4181_MSYSINT2REG __preg16(KSEG1 + 0x0A000206) /* Level 1 mask system interrupt register 2 (R/W) */
+#define VR4181_PIUINTREGro __preg16(KSEG1 + 0x0B000082) /* Level 2 PIU interrupt register (R) */
+#define VR4181_AIUINTREG __preg16(KSEG1 + 0x0B000084) /* Level 2 AIU interrupt register (R) */
+#define VR4181_MPIUINTREG __preg16(KSEG1 + 0x0B00008E) /* Level 2 mask PIU interrupt register (R/W) */
+#define VR4181_MAIUINTREG __preg16(KSEG1 + 0x0B000090) /* Level 2 mask AIU interrupt register (R/W) */
+#define VR4181_MKIUINTREG __preg16(KSEG1 + 0x0B000092) /* Level 2 mask KIU interrupt register (R/W) */
+#define VR4181_KIUINTREG __preg16(KSEG1 + 0x0B000198) /* Level 2 KIU interrupt register (R) */
+
+// Power Management Unit (PMU)
+#define VR4181_PMUINTREG __preg16(KSEG1 + 0x0B0000A0) /* PMU Status Register (R/W) */
+#define VR4181_PMUINT_POWERSW 0x1 /* Power switch */
+#define VR4181_PMUINT_BATT 0x2 /* Low batt during normal operation */
+#define VR4181_PMUINT_DEADMAN 0x4 /* Deadman's switch */
+#define VR4181_PMUINT_RESET 0x8 /* Reset switch */
+#define VR4181_PMUINT_RTCRESET 0x10 /* RTC Reset */
+#define VR4181_PMUINT_TIMEOUT 0x20 /* HAL Timer Reset */
+#define VR4181_PMUINT_BATTLOW 0x100 /* Battery low */
+#define VR4181_PMUINT_RTC 0x200 /* RTC Alarm */
+#define VR4181_PMUINT_DCD 0x400 /* DCD# */
+#define VR4181_PMUINT_GPIO0 0x1000 /* GPIO0 */
+#define VR4181_PMUINT_GPIO1 0x2000 /* GPIO1 */
+#define VR4181_PMUINT_GPIO2 0x4000 /* GPIO2 */
+#define VR4181_PMUINT_GPIO3 0x8000 /* GPIO3 */
+
+#define VR4181_PMUCNTREG __preg16(KSEG1 + 0x0B0000A2) /* PMU Control Register (R/W) */
+#define VR4181_PMUWAITREG __preg16(KSEG1 + 0x0B0000A8) /* PMU Wait Counter Register (R/W) */
+#define VR4181_PMUDIVREG __preg16(KSEG1 + 0x0B0000AC) /* PMU Divide Mode Register (R/W) */
+#define VR4181_DRAMHIBCTL __preg16(KSEG1 + 0x0B0000B2) /* DRAM Hibernate Control Register (R/W) */
+
+// Real Time Clock Unit (RTC)
+#define VR4181_ETIMELREG __preg16(KSEG1 + 0x0B0000C0) /* Elapsed Time L Register (R/W) */
+#define VR4181_ETIMEMREG __preg16(KSEG1 + 0x0B0000C2) /* Elapsed Time M Register (R/W) */
+#define VR4181_ETIMEHREG __preg16(KSEG1 + 0x0B0000C4) /* Elapsed Time H Register (R/W) */
+#define VR4181_ECMPLREG __preg16(KSEG1 + 0x0B0000C8) /* Elapsed Compare L Register (R/W) */
+#define VR4181_ECMPMREG __preg16(KSEG1 + 0x0B0000CA) /* Elapsed Compare M Register (R/W) */
+#define VR4181_ECMPHREG __preg16(KSEG1 + 0x0B0000CC) /* Elapsed Compare H Register (R/W) */
+#define VR4181_RTCL1LREG __preg16(KSEG1 + 0x0B0000D0) /* RTC Long 1 L Register (R/W) */
+#define VR4181_RTCL1HREG __preg16(KSEG1 + 0x0B0000D2) /* RTC Long 1 H Register (R/W) */
+#define VR4181_RTCL1CNTLREG __preg16(KSEG1 + 0x0B0000D4) /* RTC Long 1 Count L Register (R) */
+#define VR4181_RTCL1CNTHREG __preg16(KSEG1 + 0x0B0000D6) /* RTC Long 1 Count H Register (R) */
+#define VR4181_RTCL2LREG __preg16(KSEG1 + 0x0B0000D8) /* RTC Long 2 L Register (R/W) */
+#define VR4181_RTCL2HREG __preg16(KSEG1 + 0x0B0000DA) /* RTC Long 2 H Register (R/W) */
+#define VR4181_RTCL2CNTLREG __preg16(KSEG1 + 0x0B0000DC) /* RTC Long 2 Count L Register (R) */
+#define VR4181_RTCL2CNTHREG __preg16(KSEG1 + 0x0B0000DE) /* RTC Long 2 Count H Register (R) */
+#define VR4181_RTCINTREG __preg16(KSEG1 + 0x0B0001DE) /* RTC Interrupt Register (R/W) */
+
+// Deadman's Switch Unit (DSU)
+#define VR4181_DSUCNTREG __preg16(KSEG1 + 0x0B0000E0) /* DSU Control Register (R/W) */
+#define VR4181_DSUSETREG __preg16(KSEG1 + 0x0B0000E2) /* DSU Dead Time Set Register (R/W) */
+#define VR4181_DSUCLRREG __preg16(KSEG1 + 0x0B0000E4) /* DSU Clear Register (W) */
+#define VR4181_DSUTIMREG __preg16(KSEG1 + 0x0B0000E6) /* DSU Elapsed Time Register (R/W) */
+
+// General Purpose I/O Unit (GIU)
+#define VR4181_GPMD0REG __preg16(KSEG1 + 0x0B000300) /* GPIO Mode 0 Register (R/W) */
+#define VR4181_GPMD1REG __preg16(KSEG1 + 0x0B000302) /* GPIO Mode 1 Register (R/W) */
+#define VR4181_GPMD2REG __preg16(KSEG1 + 0x0B000304) /* GPIO Mode 2 Register (R/W) */
+#define VR4181_GPMD3REG __preg16(KSEG1 + 0x0B000306) /* GPIO Mode 3 Register (R/W) */
+#define VR4181_GPDATHREG __preg16(KSEG1 + 0x0B000308) /* GPIO Data High Register (R/W) */
+#define VR4181_GPDATHREG_GPIO16 0x0001
+#define VR4181_GPDATHREG_GPIO17 0x0002
+#define VR4181_GPDATHREG_GPIO18 0x0004
+#define VR4181_GPDATHREG_GPIO19 0x0008
+#define VR4181_GPDATHREG_GPIO20 0x0010
+#define VR4181_GPDATHREG_GPIO21 0x0020
+#define VR4181_GPDATHREG_GPIO22 0x0040
+#define VR4181_GPDATHREG_GPIO23 0x0080
+#define VR4181_GPDATHREG_GPIO24 0x0100
+#define VR4181_GPDATHREG_GPIO25 0x0200
+#define VR4181_GPDATHREG_GPIO26 0x0400
+#define VR4181_GPDATHREG_GPIO27 0x0800
+#define VR4181_GPDATHREG_GPIO28 0x1000
+#define VR4181_GPDATHREG_GPIO29 0x2000
+#define VR4181_GPDATHREG_GPIO30 0x4000
+#define VR4181_GPDATHREG_GPIO31 0x8000
+#define VR4181_GPDATLREG __preg16(KSEG1 + 0x0B00030A) /* GPIO Data Low Register (R/W) */
+#define VR4181_GPDATLREG_GPIO0 0x0001
+#define VR4181_GPDATLREG_GPIO1 0x0002
+#define VR4181_GPDATLREG_GPIO2 0x0004
+#define VR4181_GPDATLREG_GPIO3 0x0008
+#define VR4181_GPDATLREG_GPIO4 0x0010
+#define VR4181_GPDATLREG_GPIO5 0x0020
+#define VR4181_GPDATLREG_GPIO6 0x0040
+#define VR4181_GPDATLREG_GPIO7 0x0080
+#define VR4181_GPDATLREG_GPIO8 0x0100
+#define VR4181_GPDATLREG_GPIO9 0x0200
+#define VR4181_GPDATLREG_GPIO10 0x0400
+#define VR4181_GPDATLREG_GPIO11 0x0800
+#define VR4181_GPDATLREG_GPIO12 0x1000
+#define VR4181_GPDATLREG_GPIO13 0x2000
+#define VR4181_GPDATLREG_GPIO14 0x4000
+#define VR4181_GPDATLREG_GPIO15 0x8000
+#define VR4181_GPINTEN __preg16(KSEG1 + 0x0B00030C) /* GPIO Interrupt Enable Register (R/W) */
+#define VR4181_GPINTMSK __preg16(KSEG1 + 0x0B00030E) /* GPIO Interrupt Mask Register (R/W) */
+#define VR4181_GPINTTYPH __preg16(KSEG1 + 0x0B000310) /* GPIO Interrupt Type High Register (R/W) */
+#define VR4181_GPINTTYPL __preg16(KSEG1 + 0x0B000312) /* GPIO Interrupt Type Low Register (R/W) */
+#define VR4181_GPINTSTAT __preg16(KSEG1 + 0x0B000314) /* GPIO Interrupt Status Register (R/W) */
+#define VR4181_GPHIBSTH __preg16(KSEG1 + 0x0B000316) /* GPIO Hibernate Pin State High Register (R/W) */
+#define VR4181_GPHIBSTL __preg16(KSEG1 + 0x0B000318) /* GPIO Hibernate Pin State Low Register (R/W) */
+#define VR4181_GPSICTL __preg16(KSEG1 + 0x0B00031A) /* GPIO Serial Interface Control Register (R/W) */
+#define VR4181_KEYEN __preg16(KSEG1 + 0x0B00031C) /* Keyboard Scan Pin Enable Register (R/W) */
+#define VR4181_PCS0STRA __preg16(KSEG1 + 0x0B000320) /* Programmable Chip Select [0] Start Address Register (R/W) */
+#define VR4181_PCS0STPA __preg16(KSEG1 + 0x0B000322) /* Programmable Chip Select [0] Stop Address Register (R/W) */
+#define VR4181_PCS0HIA __preg16(KSEG1 + 0x0B000324) /* Programmable Chip Select [0] High Address Register (R/W) */
+#define VR4181_PCS1STRA __preg16(KSEG1 + 0x0B000326) /* Programmable Chip Select [1] Start Address Register (R/W) */
+#define VR4181_PCS1STPA __preg16(KSEG1 + 0x0B000328) /* Programmable Chip Select [1] Stop Address Register (R/W) */
+#define VR4181_PCS1HIA __preg16(KSEG1 + 0x0B00032A) /* Programmable Chip Select [1] High Address Register (R/W) */
+#define VR4181_PCSMODE __preg16(KSEG1 + 0x0B00032C) /* Programmable Chip Select Mode Register (R/W) */
+#define VR4181_LCDGPMODE __preg16(KSEG1 + 0x0B00032E) /* LCD General Purpose Mode Register (R/W) */
+#define VR4181_MISCREG0 __preg16(KSEG1 + 0x0B000330) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG1 __preg16(KSEG1 + 0x0B000332) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG2 __preg16(KSEG1 + 0x0B000334) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG3 __preg16(KSEG1 + 0x0B000336) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG4 __preg16(KSEG1 + 0x0B000338) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG5 __preg16(KSEG1 + 0x0B00033A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG6 __preg16(KSEG1 + 0x0B00033C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG7 __preg16(KSEG1 + 0x0B00033D) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG8 __preg16(KSEG1 + 0x0B000340) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG9 __preg16(KSEG1 + 0x0B000342) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG10 __preg16(KSEG1 + 0x0B000344) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG11 __preg16(KSEG1 + 0x0B000346) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG12 __preg16(KSEG1 + 0x0B000348) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG13 __preg16(KSEG1 + 0x0B00034A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG14 __preg16(KSEG1 + 0x0B00034C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_MISCREG15 __preg16(KSEG1 + 0x0B00034E) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+#define VR4181_SECIRQMASKL VR4181_GPINTEN
+// No SECIRQMASKH for VR4181
+
+// Touch Panel Interface Unit (PIU)
+#define VR4181_PIUCNTREG __preg16(KSEG1 + 0x0B000122) /* PIU Control register (R/W) */
+#define VR4181_PIUCNTREG_PIUSEQEN 0x0004
+#define VR4181_PIUCNTREG_PIUPWR 0x0002
+#define VR4181_PIUCNTREG_PADRST 0x0001
+
+#define VR4181_PIUINTREG __preg16(KSEG1 + 0x0B000124) /* PIU Interrupt cause register (R/W) */
+#define VR4181_PIUINTREG_OVP 0x8000
+#define VR4181_PIUINTREG_PADCMD 0x0040
+#define VR4181_PIUINTREG_PADADP 0x0020
+#define VR4181_PIUINTREG_PADPAGE1 0x0010
+#define VR4181_PIUINTREG_PADPAGE0 0x0008
+#define VR4181_PIUINTREG_PADDLOST 0x0004
+#define VR4181_PIUINTREG_PENCHG 0x0001
+
+#define VR4181_PIUSIVLREG __preg16(KSEG1 + 0x0B000126) /* PIU Data sampling interval register (R/W) */
+#define VR4181_PIUSTBLREG __preg16(KSEG1 + 0x0B000128) /* PIU A/D converter start delay register (R/W) */
+#define VR4181_PIUCMDREG __preg16(KSEG1 + 0x0B00012A) /* PIU A/D command register (R/W) */
+#define VR4181_PIUASCNREG __preg16(KSEG1 + 0x0B000130) /* PIU A/D port scan register (R/W) */
+#define VR4181_PIUAMSKREG __preg16(KSEG1 + 0x0B000132) /* PIU A/D scan mask register (R/W) */
+#define VR4181_PIUCIVLREG __preg16(KSEG1 + 0x0B00013E) /* PIU Check interval register (R) */
+#define VR4181_PIUPB00REG __preg16(KSEG1 + 0x0B0002A0) /* PIU Page 0 Buffer 0 register (R/W) */
+#define VR4181_PIUPB01REG __preg16(KSEG1 + 0x0B0002A2) /* PIU Page 0 Buffer 1 register (R/W) */
+#define VR4181_PIUPB02REG __preg16(KSEG1 + 0x0B0002A4) /* PIU Page 0 Buffer 2 register (R/W) */
+#define VR4181_PIUPB03REG __preg16(KSEG1 + 0x0B0002A6) /* PIU Page 0 Buffer 3 register (R/W) */
+#define VR4181_PIUPB10REG __preg16(KSEG1 + 0x0B0002A8) /* PIU Page 1 Buffer 0 register (R/W) */
+#define VR4181_PIUPB11REG __preg16(KSEG1 + 0x0B0002AA) /* PIU Page 1 Buffer 1 register (R/W) */
+#define VR4181_PIUPB12REG __preg16(KSEG1 + 0x0B0002AC) /* PIU Page 1 Buffer 2 register (R/W) */
+#define VR4181_PIUPB13REG __preg16(KSEG1 + 0x0B0002AE) /* PIU Page 1 Buffer 3 register (R/W) */
+#define VR4181_PIUAB0REG __preg16(KSEG1 + 0x0B0002B0) /* PIU A/D scan Buffer 0 register (R/W) */
+#define VR4181_PIUAB1REG __preg16(KSEG1 + 0x0B0002B2) /* PIU A/D scan Buffer 1 register (R/W) */
+#define VR4181_PIUAB2REG __preg16(KSEG1 + 0x0B0002B4) /* PIU A/D scan Buffer 2 register (R/W) */
+#define VR4181_PIUAB3REG __preg16(KSEG1 + 0x0B0002B6) /* PIU A/D scan Buffer 3 register (R/W) */
+#define VR4181_PIUPB04REG __preg16(KSEG1 + 0x0B0002BC) /* PIU Page 0 Buffer 4 register (R/W) */
+#define VR4181_PIUPB14REG __preg16(KSEG1 + 0x0B0002BE) /* PIU Page 1 Buffer 4 register (R/W) */
+
+// Audio Interface Unit (AIU)
+#define VR4181_SODATREG __preg16(KSEG1 + 0x0B000166) /* Speaker Output Data Register (R/W) */
+#define VR4181_SCNTREG __preg16(KSEG1 + 0x0B000168) /* Speaker Output Control Register (R/W) */
+#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Mike Input Data Register (R/W) */
+#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Mike Input Control Register (R/W) */
+#define VR4181_DVALIDREG __preg16(KSEG1 + 0x0B000178) /* Data Valid Register (R/W) */
+#define VR4181_SEQREG __preg16(KSEG1 + 0x0B00017A) /* Sequential Register (R/W) */
+#define VR4181_INTREG __preg16(KSEG1 + 0x0B00017C) /* Interrupt Register (R/W) */
+#define VR4181_SDMADATREG __preg16(KSEG1 + 0x0B000160) /* Speaker DMA Data Register (R/W) */
+#define VR4181_MDMADATREG __preg16(KSEG1 + 0x0B000162) /* Microphone DMA Data Register (R/W) */
+#define VR4181_DAVREF_SETUP __preg16(KSEG1 + 0x0B000164) /* DAC Vref setup register (R/W) */
+#define VR4181_SCNVC_END __preg16(KSEG1 + 0x0B00016E) /* Speaker sample rate control (R/W) */
+#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Microphone Input Data Register (R/W) */
+#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Microphone Input Control Register (R/W) */
+#define VR4181_MCNVC_END __preg16(KSEG1 + 0x0B00017E) /* Microphone sample rate control (R/W) */
+
+// Keyboard Interface Unit (KIU)
+#define VR4181_KIUDAT0 __preg16(KSEG1 + 0x0B000180) /* KIU Data0 Register (R/W) */
+#define VR4181_KIUDAT1 __preg16(KSEG1 + 0x0B000182) /* KIU Data1 Register (R/W) */
+#define VR4181_KIUDAT2 __preg16(KSEG1 + 0x0B000184) /* KIU Data2 Register (R/W) */
+#define VR4181_KIUDAT3 __preg16(KSEG1 + 0x0B000186) /* KIU Data3 Register (R/W) */
+#define VR4181_KIUDAT4 __preg16(KSEG1 + 0x0B000188) /* KIU Data4 Register (R/W) */
+#define VR4181_KIUDAT5 __preg16(KSEG1 + 0x0B00018A) /* KIU Data5 Register (R/W) */
+#define VR4181_KIUSCANREP __preg16(KSEG1 + 0x0B000190) /* KIU Scan/Repeat Register (R/W) */
+#define VR4181_KIUSCANREP_KEYEN 0x8000
+#define VR4181_KIUSCANREP_SCANSTP 0x0008
+#define VR4181_KIUSCANREP_SCANSTART 0x0004
+#define VR4181_KIUSCANREP_ATSTP 0x0002
+#define VR4181_KIUSCANREP_ATSCAN 0x0001
+#define VR4181_KIUSCANS __preg16(KSEG1 + 0x0B000192) /* KIU Scan Status Register (R) */
+#define VR4181_KIUWKS __preg16(KSEG1 + 0x0B000194) /* KIU Wait Keyscan Stable Register (R/W) */
+#define VR4181_KIUWKI __preg16(KSEG1 + 0x0B000196) /* KIU Wait Keyscan Interval Register (R/W) */
+#define VR4181_KIUINT __preg16(KSEG1 + 0x0B000198) /* KIU Interrupt Register (R/W) */
+#define VR4181_KIUINT_KDATLOST 0x0004
+#define VR4181_KIUINT_KDATRDY 0x0002
+#define VR4181_KIUINT_SCANINT 0x0001
+#define VR4181_KIUDAT6 __preg16(KSEG1 + 0x0B00018C) /* Scan Line 6 Key Data Register (R) */
+#define VR4181_KIUDAT7 __preg16(KSEG1 + 0x0B00018E) /* Scan Line 7 Key Data Register (R) */
+
+// CompactFlash Controller
+#define VR4181_PCCARDINDEX __preg8(KSEG1 + 0x0B0008E0) /* PC Card Controller Index Register */
+#define VR4181_PCCARDDATA __preg8(KSEG1 + 0x0B0008E1) /* PC Card Controller Data Register */
+#define VR4181_INTSTATREG __preg16(KSEG1 + 0x0B0008F8) /* Interrupt Status Register (R/W) */
+#define VR4181_INTMSKREG __preg16(KSEG1 + 0x0B0008FA) /* Interrupt Mask Register (R/W) */
+#define VR4181_CFG_REG_1 __preg16(KSEG1 + 0x0B0008FE) /* Configuration Register 1 */
+
+// LED Control Unit (LED)
+#define VR4181_LEDHTSREG __preg16(KSEG1 + 0x0B000240) /* LED H Time Set register (R/W) */
+#define VR4181_LEDLTSREG __preg16(KSEG1 + 0x0B000242) /* LED L Time Set register (R/W) */
+#define VR4181_LEDCNTREG __preg16(KSEG1 + 0x0B000248) /* LED Control register (R/W) */
+#define VR4181_LEDASTCREG __preg16(KSEG1 + 0x0B00024A) /* LED Auto Stop Time Count register (R/W) */
+#define VR4181_LEDINTREG __preg16(KSEG1 + 0x0B00024C) /* LED Interrupt register (R/W) */
+
+// Serial Interface Unit (SIU / SIU1 and SIU2)
+#define VR4181_SIURB __preg8(KSEG1 + 0x0C000010) /* Receiver Buffer Register (Read) DLAB = 0 (R) */
+#define VR4181_SIUTH __preg8(KSEG1 + 0x0C000010) /* Transmitter Holding Register (Write) DLAB = 0 (W) */
+#define VR4181_SIUDLL __preg8(KSEG1 + 0x0C000010) /* Divisor Latch (Least Significant Byte) DLAB = 1 (R/W) */
+#define VR4181_SIUIE __preg8(KSEG1 + 0x0C000011) /* Interrupt Enable DLAB = 0 (R/W) */
+#define VR4181_SIUDLM __preg8(KSEG1 + 0x0C000011) /* Divisor Latch (Most Significant Byte) DLAB = 1 (R/W) */
+#define VR4181_SIUIID __preg8(KSEG1 + 0x0C000012) /* Interrupt Identification Register (Read) (R) */
+#define VR4181_SIUFC __preg8(KSEG1 + 0x0C000012) /* FIFO Control Register (Write) (W) */
+#define VR4181_SIULC __preg8(KSEG1 + 0x0C000013) /* Line Control Register (R/W) */
+#define VR4181_SIUMC __preg8(KSEG1 + 0x0C000014) /* MODEM Control Register (R/W) */
+#define VR4181_SIULS __preg8(KSEG1 + 0x0C000015) /* Line Status Register (R/W) */
+#define VR4181_SIUMS __preg8(KSEG1 + 0x0C000016) /* MODEM Status Register (R/W) */
+#define VR4181_SIUSC __preg8(KSEG1 + 0x0C000017) /* Scratch Register (R/W) */
+#define VR4181_SIURESET __preg8(KSEG1 + 0x0C000019) /* SIU Reset Register (R/W) */
+#define VR4181_SIUACTMSK __preg8(KSEG1 + 0x0C00001C) /* SIU Activity Mask (R/W) */
+#define VR4181_SIUACTTMR __preg8(KSEG1 + 0x0C00001E) /* SIU Activity Timer (R/W) */
+#define VR4181_SIURB_2 __preg8(KSEG1 + 0x0C000000) /* Receive Buffer Register (Read) (R) */
+#define VR4181_SIUTH_2 __preg8(KSEG1 + 0x0C000000) /* Transmitter Holding Register (Write) (W) */
+#define VR4181_SIUDLL_2 __preg8(KSEG1 + 0x0C000000) /* Divisor Latch (Least Significant Byte) (R/W) */
+#define VR4181_SIUIE_2 __preg8(KSEG1 + 0x0C000001) /* Interrupt Enable (DLAB = 0) (R/W) */
+#define VR4181_SIUDLM_2 __preg8(KSEG1 + 0x0C000001) /* Divisor Latch (Most Significant Byte) (DLAB = 1) (R/W) */
+#define VR4181_SIUIID_2 __preg8(KSEG1 + 0x0C000002) /* Interrupt Identification Register (Read) (R) */
+#define VR4181_SIUFC_2 __preg8(KSEG1 + 0x0C000002) /* FIFO Control Register (Write) (W) */
+#define VR4181_SIULC_2 __preg8(KSEG1 + 0x0C000003) /* Line Control Register (R/W) */
+#define VR4181_SIUMC_2 __preg8(KSEG1 + 0x0C000004) /* Modem Control Register (R/W) */
+#define VR4181_SIULS_2 __preg8(KSEG1 + 0x0C000005) /* Line Status Register (R/W) */
+#define VR4181_SIUMS_2 __preg8(KSEG1 + 0x0C000006) /* Modem Status Register (R/W) */
+#define VR4181_SIUSC_2 __preg8(KSEG1 + 0x0C000007) /* Scratch Register (R/W) */
+#define VR4181_SIUIRSEL_2 __preg8(KSEG1 + 0x0C000008) /* SIU IrDA Selectot (R/W) */
+#define VR4181_SIURESET_2 __preg8(KSEG1 + 0x0C000009) /* SIU Reset Register (R/W) */
+#define VR4181_SIUCSEL_2 __preg8(KSEG1 + 0x0C00000A) /* IrDA Echo-back Control (R/W) */
+#define VR4181_SIUACTMSK_2 __preg8(KSEG1 + 0x0C00000C) /* SIU Activity Mask Register (R/W) */
+#define VR4181_SIUACTTMR_2 __preg8(KSEG1 + 0x0C00000E) /* SIU Activity Timer Register (R/W) */
+
+
+// USB Module
+#define VR4181_USBINFIFO __preg16(KSEG1 + 0x0B000780) /* USB Bulk Input FIFO (Bulk In End Point) (W) */
+#define VR4181_USBOUTFIFO __preg16(KSEG1 + 0x0B000782) /* USB Bulk Output FIFO (Bulk Out End Point) (R) */
+#define VR4181_USBCTLFIFO __preg16(KSEG1 + 0x0B000784) /* USB Control FIFO (Control End Point) (W) */
+#define VR4181_USBSTAT __preg16(KSEG1 + 0x0B000786) /* Interrupt Status Register (R/W) */
+#define VR4181_USBINTMSK __preg16(KSEG1 + 0x0B000788) /* Interrupt Mask Register (R/W) */
+#define VR4181_USBCTLREG __preg16(KSEG1 + 0x0B00078A) /* Control Register (R/W) */
+#define VR4181_USBSTPREG __preg16(KSEG1 + 0x0B00078C) /* USB Transfer Stop Register (R/W) */
+
+// LCD Controller
+#define VR4181_HRTOTALREG __preg16(KSEG1 + 0x0A000400) /* Horizontal total Register (R/W) */
+#define VR4181_HRVISIBREG __preg16(KSEG1 + 0x0A000402) /* Horizontal Visible Register (R/W) */
+#define VR4181_LDCLKSTREG __preg16(KSEG1 + 0x0A000404) /* Load clock start Register (R/W) */
+#define VR4181_LDCLKNDREG __preg16(KSEG1 + 0x0A000406) /* Load clock end Register (R/W) */
+#define VR4181_VRTOTALREG __preg16(KSEG1 + 0x0A000408) /* Vertical Total Register (R/W) */
+#define VR4181_VRVISIBREG __preg16(KSEG1 + 0x0A00040A) /* Vertical Visible Register (R/W) */
+#define VR4181_FVSTARTREG __preg16(KSEG1 + 0x0A00040C) /* FLM vertical start Register (R/W) */
+#define VR4181_FVENDREG __preg16(KSEG1 + 0x0A00040E) /* FLM vertical end Register (R/W) */
+#define VR4181_LCDCTRLREG __preg16(KSEG1 + 0x0A000410) /* LCD control Register (R/W) */
+#define VR4181_LCDINRQREG __preg16(KSEG1 + 0x0A000412) /* LCD Interrupt request Register (R/W) */
+#define VR4181_LCDCFGREG0 __preg16(KSEG1 + 0x0A000414) /* LCD Configuration Register 0 (R/W) */
+#define VR4181_LCDCFGREG1 __preg16(KSEG1 + 0x0A000416) /* LCD Configuration Register 1 (R/W) */
+#define VR4181_FBSTAD1REG __preg16(KSEG1 + 0x0A000418) /* Frame Buffer Start Address 1 Register (R/W) */
+#define VR4181_FBSTAD2REG __preg16(KSEG1 + 0x0A00041A) /* Frame Buffer Start Address 2 Register (R/W) */
+#define VR4181_FBNDAD1REG __preg16(KSEG1 + 0x0A000420) /* Frame Buffer End Address 1 Register (R/W) */
+#define VR4181_FBNDAD2REG __preg16(KSEG1 + 0x0A000422) /* Frame Buffer End Address 2 register (R/W) */
+#define VR4181_FHSTARTREG __preg16(KSEG1 + 0x0A000424) /* FLM horizontal Start Register (R/W) */
+#define VR4181_FHENDREG __preg16(KSEG1 + 0x0A000426) /* FLM horizontal End Register (R/W) */
+#define VR4181_PWRCONREG1 __preg16(KSEG1 + 0x0A000430) /* Power Control register 1 (R/W) */
+#define VR4181_PWRCONREG2 __preg16(KSEG1 + 0x0A000432) /* Power Control register 2 (R/W) */
+#define VR4181_LCDIMSKREG __preg16(KSEG1 + 0x0A000434) /* LCD Interrupt Mask register (R/W) */
+#define VR4181_CPINDCTREG __preg16(KSEG1 + 0x0A00047E) /* Color palette Index and control Register (R/W) */
+#define VR4181_CPALDATREG __preg32(KSEG1 + 0x0A000480) /* Color palette data register (32bits Register) (R/W) */
+
+// physical address spaces
+#define VR4181_LCD 0x0a000000
+#define VR4181_INTERNAL_IO_2 0x0b000000
+#define VR4181_INTERNAL_IO_1 0x0c000000
+#define VR4181_ISA_MEM 0x10000000
+#define VR4181_ISA_IO 0x14000000
+#define VR4181_ROM 0x18000000
+
+// This is the base address for IO port decoding to which the 16 bit IO port address
+// is added. Defining it to 0 will usually cause a kernel oops any time port IO is
+// attempted, which can be handy for turning up parts of the kernel that make
+// incorrect architecture assumptions (by assuming that everything acts like a PC),
+// but we need it correctly defined to use the PCMCIA/CF controller:
+#define VR4181_PORT_BASE (KSEG1 + VR4181_ISA_IO)
+#define VR4181_ISAMEM_BASE (KSEG1 + VR4181_ISA_MEM)
+
+#endif /* __ASM_VR4181_VR4181_H */
diff -Nru a/include/asm-mips/watch.h b/include/asm-mips/watch.h
--- a/include/asm-mips/watch.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-mips/watch.h Sun Aug 3 13:14:53 2003
@@ -5,8 +5,8 @@
*
* Copyright (C) 1996, 1997, 1998, 2000, 2001 by Ralf Baechle
*/
-#ifndef __ASM_WATCH_H
-#define __ASM_WATCH_H
+#ifndef _ASM_WATCH_H
+#define _ASM_WATCH_H
#include <linux/linkage.h>
@@ -32,4 +32,4 @@
if (cpu_has_watch) \
__watch_reenable()
-#endif /* __ASM_WATCH_H */
+#endif /* _ASM_WATCH_H */
diff -Nru a/include/asm-mips/wbflush.h b/include/asm-mips/wbflush.h
--- a/include/asm-mips/wbflush.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-mips/wbflush.h Sun Aug 3 13:14:50 2003
@@ -8,8 +8,8 @@
* Copyright (c) 1998 Harald Koerfgen
* Copyright (C) 2002 Maciej W. Rozycki
*/
-#ifndef __ASM_MIPS_WBFLUSH_H
-#define __ASM_MIPS_WBFLUSH_H
+#ifndef _ASM_WBFLUSH_H
+#define _ASM_WBFLUSH_H
#include <linux/config.h>
@@ -32,4 +32,4 @@
#endif /* !CONFIG_CPU_HAS_WB */
-#endif /* __ASM_MIPS_WBFLUSH_H */
+#endif /* _ASM_WBFLUSH_H */
diff -Nru a/include/asm-mips/xtalk/xtalk.h b/include/asm-mips/xtalk/xtalk.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/xtalk/xtalk.h Sun Aug 3 13:14:44 2003
@@ -0,0 +1,52 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * xtalk.h -- platform-independent crosstalk interface, derived from
+ * IRIX <sys/PCI/bridge.h>, revision 1.38.
+ *
+ * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_XTALK_XTALK_H
+#define _ASM_XTALK_XTALK_H
+
+#ifndef __ASSEMBLY__
+/*
+ * User-level device driver visible types
+ */
+typedef char xwidgetnum_t; /* xtalk widget number (0..15) */
+
+#define XWIDGET_NONE -1
+
+typedef int xwidget_part_num_t; /* xtalk widget part number */
+
+#define XWIDGET_PART_NUM_NONE -1
+
+typedef int xwidget_rev_num_t; /* xtalk widget revision number */
+
+#define XWIDGET_REV_NUM_NONE -1
+
+typedef int xwidget_mfg_num_t; /* xtalk widget manufacturing ID */
+
+#define XWIDGET_MFG_NUM_NONE -1
+
+typedef struct xtalk_piomap_s *xtalk_piomap_t;
+
+/* It is often convenient to fold the XIO target port
+ * number into the XIO address.
+ */
+#define XIO_NOWHERE (0xFFFFFFFFFFFFFFFFull)
+#define XIO_ADDR_BITS (0x0000FFFFFFFFFFFFull)
+#define XIO_PORT_BITS (0xF000000000000000ull)
+#define XIO_PORT_SHIFT (60)
+
+#define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0)
+#define XIO_ADDR(x) ((x)&XIO_ADDR_BITS)
+#define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT))
+#define XIO_PACK(p,o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS))
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_XTALK_XTALK_H */
diff -Nru a/include/asm-mips/xtalk/xwidget.h b/include/asm-mips/xtalk/xwidget.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-mips/xtalk/xwidget.h Sun Aug 3 13:14:45 2003
@@ -0,0 +1,167 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * xwidget.h - generic crosstalk widget header file, derived from IRIX
+ * <sys/xtalk/xtalkwidget.h>, revision 1.32.
+ *
+ * Copyright (C) 1996, 1999 Silcon Graphics, Inc.
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ */
+#ifndef _ASM_XTALK_XWIDGET_H
+#define _ASM_XTALK_XWIDGET_H
+
+#include <linux/types.h>
+#include <asm/xtalk/xtalk.h>
+
+#define WIDGET_ID 0x04
+#define WIDGET_STATUS 0x0c
+#define WIDGET_ERR_UPPER_ADDR 0x14
+#define WIDGET_ERR_LOWER_ADDR 0x1c
+#define WIDGET_CONTROL 0x24
+#define WIDGET_REQ_TIMEOUT 0x2c
+#define WIDGET_INTDEST_UPPER_ADDR 0x34
+#define WIDGET_INTDEST_LOWER_ADDR 0x3c
+#define WIDGET_ERR_CMD_WORD 0x44
+#define WIDGET_LLP_CFG 0x4c
+#define WIDGET_TFLUSH 0x54
+
+/* WIDGET_ID */
+#define WIDGET_REV_NUM 0xf0000000
+#define WIDGET_PART_NUM 0x0ffff000
+#define WIDGET_MFG_NUM 0x00000ffe
+#define WIDGET_REV_NUM_SHFT 28
+#define WIDGET_PART_NUM_SHFT 12
+#define WIDGET_MFG_NUM_SHFT 1
+
+#define XWIDGET_PART_NUM(widgetid) (((widgetid) & WIDGET_PART_NUM) >> WIDGET_PART_NUM_SHFT)
+#define XWIDGET_REV_NUM(widgetid) (((widgetid) & WIDGET_REV_NUM) >> WIDGET_REV_NUM_SHFT)
+#define XWIDGET_MFG_NUM(widgetid) (((widgetid) & WIDGET_MFG_NUM) >> WIDGET_MFG_NUM_SHFT)
+
+/* WIDGET_STATUS */
+#define WIDGET_LLP_REC_CNT 0xff000000
+#define WIDGET_LLP_TX_CNT 0x00ff0000
+#define WIDGET_PENDING 0x0000001f
+
+/* WIDGET_ERR_UPPER_ADDR */
+#define WIDGET_ERR_UPPER_ADDR_ONLY 0x0000ffff
+
+/* WIDGET_CONTROL */
+#define WIDGET_F_BAD_PKT 0x00010000
+#define WIDGET_LLP_XBAR_CRD 0x0000f000
+#define WIDGET_LLP_XBAR_CRD_SHFT 12
+#define WIDGET_CLR_RLLP_CNT 0x00000800
+#define WIDGET_CLR_TLLP_CNT 0x00000400
+#define WIDGET_SYS_END 0x00000200
+#define WIDGET_MAX_TRANS 0x000001f0
+#define WIDGET_WIDGET_ID 0x0000000f
+
+/* WIDGET_INTDEST_UPPER_ADDR */
+#define WIDGET_INT_VECTOR 0xff000000
+#define WIDGET_INT_VECTOR_SHFT 24
+#define WIDGET_TARGET_ID 0x000f0000
+#define WIDGET_TARGET_ID_SHFT 16
+#define WIDGET_UPP_ADDR 0x0000ffff
+
+/* WIDGET_ERR_CMD_WORD */
+#define WIDGET_DIDN 0xf0000000
+#define WIDGET_SIDN 0x0f000000
+#define WIDGET_PACTYP 0x00f00000
+#define WIDGET_TNUM 0x000f8000
+#define WIDGET_COHERENT 0x00004000
+#define WIDGET_DS 0x00003000
+#define WIDGET_GBR 0x00000800
+#define WIDGET_VBPM 0x00000400
+#define WIDGET_ERROR 0x00000200
+#define WIDGET_BARRIER 0x00000100
+
+/* WIDGET_LLP_CFG */
+#define WIDGET_LLP_MAXRETRY 0x03ff0000
+#define WIDGET_LLP_MAXRETRY_SHFT 16
+#define WIDGET_LLP_NULLTIMEOUT 0x0000fc00
+#define WIDGET_LLP_NULLTIMEOUT_SHFT 10
+#define WIDGET_LLP_MAXBURST 0x000003ff
+#define WIDGET_LLP_MAXBURST_SHFT 0
+
+/*
+ * according to the crosstalk spec, only 32-bits access to the widget
+ * configuration registers is allowed. some widgets may allow 64-bits
+ * access but software should not depend on it. registers beyond the
+ * widget target flush register are widget dependent thus will not be
+ * defined here
+ */
+#ifndef __ASSEMBLY__
+typedef u32 widgetreg_t;
+
+/* widget configuration registers */
+typedef volatile struct widget_cfg {
+ widgetreg_t w_pad_0; /* 0x00 */
+ widgetreg_t w_id; /* 0x04 */
+ widgetreg_t w_pad_1; /* 0x08 */
+ widgetreg_t w_status; /* 0x0c */
+ widgetreg_t w_pad_2; /* 0x10 */
+ widgetreg_t w_err_upper_addr; /* 0x14 */
+ widgetreg_t w_pad_3; /* 0x18 */
+ widgetreg_t w_err_lower_addr; /* 0x1c */
+ widgetreg_t w_pad_4; /* 0x20 */
+ widgetreg_t w_control; /* 0x24 */
+ widgetreg_t w_pad_5; /* 0x28 */
+ widgetreg_t w_req_timeout; /* 0x2c */
+ widgetreg_t w_pad_6; /* 0x30 */
+ widgetreg_t w_intdest_upper_addr; /* 0x34 */
+ widgetreg_t w_pad_7; /* 0x38 */
+ widgetreg_t w_intdest_lower_addr; /* 0x3c */
+ widgetreg_t w_pad_8; /* 0x40 */
+ widgetreg_t w_err_cmd_word; /* 0x44 */
+ widgetreg_t w_pad_9; /* 0x48 */
+ widgetreg_t w_llp_cfg; /* 0x4c */
+ widgetreg_t w_pad_10; /* 0x50 */
+ widgetreg_t w_tflush; /* 0x54 */
+} widget_cfg_t;
+
+typedef struct {
+ unsigned didn:4;
+ unsigned sidn:4;
+ unsigned pactyp:4;
+ unsigned tnum:5;
+ unsigned ct:1;
+ unsigned ds:2;
+ unsigned gbr:1;
+ unsigned vbpm:1;
+ unsigned error:1;
+ unsigned bo:1;
+ unsigned other:8;
+} w_err_cmd_word_f;
+
+typedef union {
+ widgetreg_t r;
+ w_err_cmd_word_f f;
+} w_err_cmd_word_u;
+
+typedef struct xwidget_info_s *xwidget_info_t;
+
+/*
+ * Crosstalk Widget Hardware Identification, as defined in the Crosstalk spec.
+ */
+typedef struct xwidget_hwid_s {
+ xwidget_part_num_t part_num;
+ xwidget_rev_num_t rev_num;
+ xwidget_mfg_num_t mfg_num;
+} *xwidget_hwid_t;
+
+
+/*
+ * Returns 1 if a driver that handles devices described by hwid1 is able
+ * to manage a device with hardwareid hwid2. NOTE: We don't check rev
+ * numbers at all.
+ */
+#define XWIDGET_HARDWARE_ID_MATCH(hwid1, hwid2) \
+ (((hwid1)->part_num == (hwid2)->part_num) && \
+ (((hwid1)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
+ ((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
+ ((hwid1)->mfg_num == (hwid2)->mfg_num)))
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_XTALK_XWIDGET_H */
diff -Nru a/include/asm-mips64/a.out.h b/include/asm-mips64/a.out.h
--- a/include/asm-mips64/a.out.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,33 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999 by Ralf Baechle
- */
-#ifndef _ASM_A_OUT_H
-#define _ASM_A_OUT_H
-
-struct exec
-{
- unsigned long a_info; /* Use macros N_MAGIC, etc for access */
- unsigned a_text; /* length of text, in bytes */
- unsigned a_data; /* length of data, in bytes */
- unsigned a_bss; /* length of uninitialized data area for file, in bytes */
- unsigned a_syms; /* length of symbol table data in file, in bytes */
- unsigned a_entry; /* start address */
- unsigned a_trsize; /* length of relocation info for text, in bytes */
- unsigned a_drsize; /* length of relocation info for data, in bytes */
-};
-
-#define N_TRSIZE(a) ((a).a_trsize)
-#define N_DRSIZE(a) ((a).a_drsize)
-#define N_SYMSIZE(a) ((a).a_syms)
-
-#ifdef __KERNEL__
-
-#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE)
-
-#endif
-
-#endif /* _ASM_A_OUT_H */
diff -Nru a/include/asm-mips64/addrspace.h b/include/asm-mips64/addrspace.h
--- a/include/asm-mips64/addrspace.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,146 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1999 by Ralf Baechle
- * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#ifndef __ASM_ADDRSPACE_H
-#define __ASM_ADDRSPACE_H
-
-#include <linux/config.h>
-
-/*
- * Configure language
- */
-#ifdef __ASSEMBLY__
-#define _ATYPE_
-#define _ATYPE32_
-#define _ATYPE64_
-#else
-#define _ATYPE_ __PTRDIFF_TYPE__
-#define _ATYPE32_ int
-#define _ATYPE64_ long long
-#endif
-
-/*
- * 32-bit MIPS address spaces
- */
-#ifdef __ASSEMBLY__
-#define _ACAST32_
-#define _ACAST64_
-#else
-#define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */
-#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
-#endif
-
-/*
- * Memory segments (32bit kernel mode addresses)
- */
-#define KUSEG 0x0000000000000000
-#define KSEG0 0xffffffff80000000
-#define KSEG1 0xffffffffa0000000
-#define KSEG2 0xffffffffc0000000
-#define KSEG3 0xffffffffe0000000
-
-/*
- * Returns the kernel segment base of a given address
- */
-#define KSEGX(a) ((_ACAST64_ (a)) & 0xffffffffe0000000)
-
-/*
- * Returns the physical address of a KSEG0/KSEG1 address
- */
-#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
-#define CPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000001fffffff)
-
-#define PHYSADDR(a) ({ \
- const _ATYPE64_ _a = _ACAST64_ (a); \
- _a == _ACAST32_ _a ? CPHYSADDR(_a) : XPHYSADDR(_a); })
-
-/*
- * Map an address to a certain kernel segment
- */
-#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
-#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
-#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
-#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
-
-/*
- * Memory segments (64bit kernel mode addresses)
- */
-#define XKUSEG 0x0000000000000000
-#define XKSSEG 0x4000000000000000
-#define XKPHYS 0x8000000000000000
-#define XKSEG 0xc000000000000000
-#define CKSEG0 0xffffffff80000000
-#define CKSEG1 0xffffffffa0000000
-#define CKSSEG 0xffffffffc0000000
-#define CKSEG3 0xffffffffe0000000
-
-#if defined (CONFIG_CPU_R4300) \
- || defined (CONFIG_CPU_R4X00) \
- || defined (CONFIG_CPU_R5000) \
- || defined (CONFIG_CPU_NEVADA) \
- || defined (CONFIG_CPU_MIPS64)
-#define KUSIZE 0x0000010000000000 /* 2^^40 */
-#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
-#define K0SIZE 0x0000001000000000 /* 2^^36 */
-#define K1SIZE 0x0000001000000000 /* 2^^36 */
-#define K2SIZE 0x000000ff80000000
-#define KSEGSIZE 0x000000ff80000000 /* max syssegsz */
-#define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */
-#endif
-
-#if defined (CONFIG_CPU_R8000)
-/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
-#define KUSIZE 0x0000010000000000 /* 2^^40 */
-#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
-#define K0SIZE 0x0000010000000000 /* 2^^40 */
-#define K1SIZE 0x0000010000000000 /* 2^^40 */
-#define K2SIZE 0x0001000000000000
-#define KSEGSIZE 0x0000010000000000 /* max syssegsz */
-#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
-#endif
-
-#if defined (CONFIG_CPU_R10000)
-#define KUSIZE 0x0000010000000000 /* 2^^40 */
-#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
-#define K0SIZE 0x0000010000000000 /* 2^^40 */
-#define K1SIZE 0x0000010000000000 /* 2^^40 */
-#define K2SIZE 0x00000fff80000000
-#define KSEGSIZE 0x00000fff80000000 /* max syssegsz */
-#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
-#endif
-
-/*
- * Further names for SGI source compatibility. These are stolen from
- * IRIX's <sys/mips_addrspace.h>.
- */
-#define KUBASE 0
-#define KUSIZE_32 0x0000000080000000 /* KUSIZE
- for a 32 bit proc */
-#define K0BASE 0xa800000000000000
-#define K0BASE_EXL_WR K0BASE /* exclusive on write */
-#define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */
-#define K0BASE_EXL 0xa000000000000000 /* exclusive */
-
-#ifdef CONFIG_SGI_IP27
-#define K1BASE 0x9600000000000000 /* uncached attr 3,
- uncac */
-#else
-#define K1BASE 0x9000000000000000
-#endif
-#define K2BASE 0xc000000000000000
-
-#if !defined (CONFIG_CPU_R8000)
-#define COMPAT_K1BASE32 0xffffffffa0000000
-#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
-#endif
-
-#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
-#define PHYS_TO_K0(x) (_ACAST64_ (x) | K0BASE)
-
-#endif /* __ASM_ADDRSPACE_H */
diff -Nru a/include/asm-mips64/arc/hinv.h b/include/asm-mips64/arc/hinv.h
--- a/include/asm-mips64/arc/hinv.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,174 +0,0 @@
-/*
- * ARCS hardware/memory inventory/configuration and system ID definitions.
- */
-#ifndef _ASM_ARC_HINV_H
-#define _ASM_ARC_HINV_H
-
-#include <asm/arc/types.h>
-
-/* configuration query defines */
-typedef enum configclass {
- SystemClass,
- ProcessorClass,
- CacheClass,
-#ifndef _NT_PROM
- MemoryClass,
- AdapterClass,
- ControllerClass,
- PeripheralClass
-#else /* _NT_PROM */
- AdapterClass,
- ControllerClass,
- PeripheralClass,
- MemoryClass
-#endif /* _NT_PROM */
-} CONFIGCLASS;
-
-typedef enum configtype {
- ARC,
- CPU,
- FPU,
- PrimaryICache,
- PrimaryDCache,
- SecondaryICache,
- SecondaryDCache,
- SecondaryCache,
-#ifndef _NT_PROM
- Memory,
-#endif
- EISAAdapter,
- TCAdapter,
- SCSIAdapter,
- DTIAdapter,
- MultiFunctionAdapter,
- DiskController,
- TapeController,
- CDROMController,
- WORMController,
- SerialController,
- NetworkController,
- DisplayController,
- ParallelController,
- PointerController,
- KeyboardController,
- AudioController,
- OtherController,
- DiskPeripheral,
- FloppyDiskPeripheral,
- TapePeripheral,
- ModemPeripheral,
- MonitorPeripheral,
- PrinterPeripheral,
- PointerPeripheral,
- KeyboardPeripheral,
- TerminalPeripheral,
- LinePeripheral,
- NetworkPeripheral,
-#ifdef _NT_PROM
- Memory,
-#endif
- OtherPeripheral,
-
- /* new stuff for IP30 */
- /* added without moving anything */
- /* except ANONYMOUS. */
-
- XTalkAdapter,
- PCIAdapter,
- GIOAdapter,
- TPUAdapter,
-
- Anonymous
-} CONFIGTYPE;
-
-typedef enum {
- Failed = 1,
- ReadOnly = 2,
- Removable = 4,
- ConsoleIn = 8,
- ConsoleOut = 16,
- Input = 32,
- Output = 64
-} IDENTIFIERFLAG;
-
-#ifndef NULL /* for GetChild(NULL); */
-#define NULL 0
-#endif
-
-union key_u {
- struct {
-#ifdef _MIPSEB
- unsigned char c_bsize; /* block size in lines */
- unsigned char c_lsize; /* line size in bytes/tag */
- unsigned short c_size; /* cache size in 4K pages */
-#else /* _MIPSEL */
- unsigned short c_size; /* cache size in 4K pages */
- unsigned char c_lsize; /* line size in bytes/tag */
- unsigned char c_bsize; /* block size in lines */
-#endif /* _MIPSEL */
- } cache;
- ULONG FullKey;
-};
-
-#if _MIPS_SIM == _ABI64
-#define SGI_ARCS_VERS 64 /* sgi 64-bit version */
-#define SGI_ARCS_REV 0 /* rev .00 */
-#else
-#define SGI_ARCS_VERS 1 /* first version */
-#define SGI_ARCS_REV 10 /* rev .10, 3/04/92 */
-#endif
-
-typedef struct component {
- CONFIGCLASS Class;
- CONFIGTYPE Type;
- IDENTIFIERFLAG Flags;
- USHORT Version;
- USHORT Revision;
- ULONG Key;
- ULONG AffinityMask;
- ULONG ConfigurationDataSize;
- ULONG IdentifierLength;
- char *Identifier;
-} COMPONENT;
-
-/* internal structure that holds pathname parsing data */
-struct cfgdata {
- char *name; /* full name */
- int minlen; /* minimum length to match */
- CONFIGTYPE type; /* type of token */
-};
-
-/* System ID */
-typedef struct systemid {
- CHAR VendorId[8];
- CHAR ProductId[8];
-} SYSTEMID;
-
-/* memory query functions */
-typedef enum memorytype {
- ExceptionBlock,
- SPBPage, /* ARCS == SystemParameterBlock */
-#ifndef _NT_PROM
- FreeContiguous,
- FreeMemory,
- BadMemory,
- LoadedProgram,
- FirmwareTemporary,
- FirmwarePermanent
-#else /* _NT_PROM */
- FreeMemory,
- BadMemory,
- LoadedProgram,
- FirmwareTemporary,
- FirmwarePermanent,
- FreeContiguous
-#endif /* _NT_PROM */
-} MEMORYTYPE;
-
-typedef struct memorydescriptor {
- MEMORYTYPE Type;
- LONG BasePage;
- LONG PageCount;
-} MEMORYDESCRIPTOR;
-
-#endif /* _ASM_ARC_HINV_H */
diff -Nru a/include/asm-mips64/arc/types.h b/include/asm-mips64/arc/types.h
--- a/include/asm-mips64/arc/types.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,72 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright 1999 Ralf Baechle (ralf@gnu.org)
- * Copyright 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_ARC_TYPES_H
-#define _ASM_ARC_TYPES_H
-
-#include <linux/config.h>
-
-#ifdef CONFIG_ARC32
-
-typedef char CHAR;
-typedef short SHORT;
-typedef long LARGE_INTEGER __attribute__ ((__mode__ (__DI__)));
-typedef long LONG __attribute__ ((__mode__ (__SI__)));
-typedef unsigned char UCHAR;
-typedef unsigned short USHORT;
-typedef unsigned long ULONG __attribute__ ((__mode__ (__SI__)));
-typedef void VOID;
-
-/* The pointer types. Note that we're using a 64-bit compiler but all
- pointer in the ARC structures are only 32-bit, so we need some disgusting
- workarounds. Keep your vomit bag handy. */
-typedef LONG _PCHAR;
-typedef LONG _PSHORT;
-typedef LONG _PLARGE_INTEGER;
-typedef LONG _PLONG;
-typedef LONG _PUCHAR;
-typedef LONG _PUSHORT;
-typedef LONG _PULONG;
-typedef LONG _PVOID;
-
-#endif /* CONFIG_ARC32 */
-
-#ifdef CONFIG_ARC64
-
-typedef char CHAR;
-typedef short SHORT;
-typedef long LARGE_INTEGER __attribute__ ((__mode__ (__DI__)));
-typedef long LONG __attribute__ ((__mode__ (__DI__)));
-typedef unsigned char UCHAR;
-typedef unsigned short USHORT;
-typedef unsigned long ULONG __attribute__ ((__mode__ (__DI__)));
-typedef void VOID;
-
-/* The pointer types. We're 64-bit and the firmware is also 64-bit, so
- live is sane ... */
-typedef CHAR *_PCHAR;
-typedef SHORT *_PSHORT;
-typedef LARGE_INTEGER *_PLARGE_INTEGER;
-typedef LONG *_PLONG;
-typedef UCHAR *_PUCHAR;
-typedef USHORT *_PUSHORT;
-typedef ULONG *_PULONG;
-typedef VOID *_PVOID;
-
-#endif /* CONFIG_ARC64 */
-
-typedef CHAR *PCHAR;
-typedef SHORT *PSHORT;
-typedef LARGE_INTEGER *PLARGE_INTEGER;
-typedef LONG *PLONG;
-typedef UCHAR *PUCHAR;
-typedef USHORT *PUSHORT;
-typedef ULONG *PULONG;
-typedef VOID *PVOID;
-
-#endif /* _ASM_ARC_TYPES_H */
diff -Nru a/include/asm-mips64/asm.h b/include/asm-mips64/asm.h
--- a/include/asm-mips64/asm.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,376 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
- * Copyright (C) 1999 by Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * Some useful macros for MIPS assembler code
- *
- * Some of the routines below contain useless nops that will be optimized
- * away by gas in -O mode. These nops are however required to fill delay
- * slots in noreorder mode.
- */
-#ifndef __ASM_ASM_H
-#define __ASM_ASM_H
-
-#include <asm/sgidefs.h>
-
-/*
- * PIC specific declarations
- * Not used for the kernel but here seems to be the right place.
- */
-#ifdef __PIC__
-#define CPRESTORE(register) \
- .cprestore register
-#define CPADD(register) \
- .cpadd register
-#define CPLOAD(register) \
- .cpload register
-#else
-#define CPRESTORE(register)
-#define CPADD(register)
-#define CPLOAD(register)
-#endif
-
-/*
- * LEAF - declare leaf routine
- */
-#define LEAF(symbol) \
- .globl symbol; \
- .align 2; \
- .type symbol,@function; \
- .ent symbol,0; \
-symbol: .frame sp,0,ra
-
-/*
- * NESTED - declare nested routine entry point
- */
-#define NESTED(symbol, framesize, rpc) \
- .globl symbol; \
- .align 2; \
- .type symbol,@function; \
- .ent symbol,0; \
-symbol: .frame sp, framesize, rpc
-
-/*
- * END - mark end of function
- */
-#define END(function) \
- .end function; \
- .size function,.-function
-
-/*
- * EXPORT - export definition of symbol
- */
-#define EXPORT(symbol) \
- .globl symbol; \
-symbol:
-
-/*
- * FEXPORT - export definition of a function symbol
- */
-#define FEXPORT(symbol) \
- .globl symbol; \
- .type symbol,@function; \
-symbol:
-
-/*
- * ABS - export absolute symbol
- */
-#define ABS(symbol,value) \
- .globl symbol; \
-symbol = value
-
-#define PANIC(msg) \
- .set push; \
- .set reorder; \
- PTR_LA a0,8f; \
- jal panic; \
-9: b 9b; \
- .set pop; \
- TEXT(msg)
-
-/*
- * Print formatted string
- */
-#define PRINT(string) \
- .set push; \
- .set reorder; \
- PTR_LA a0,8f; \
- jal printk; \
- .set pop; \
- TEXT(string)
-
-#define TEXT(msg) \
- .pushsection .data; \
-8: .asciiz msg; \
- .popsection;
-
-/*
- * Build text tables
- */
-#define TTABLE(string) \
- .pushsection .text; \
- .word 1f; \
- .popsection \
- .pushsection .data; \
-1: .asciiz string; \
- .popsection
-
-/*
- * MIPS IV pref instruction.
- * Use with .set noreorder only!
- *
- * MIPS IV implementations are free to treat this as a nop. The R5000
- * is one of them. So we should have an option not to use this instruction.
- */
-#ifdef CONFIG_CPU_HAS_PREFETCH
-
-#define PREF(hint,addr) \
- pref hint,addr
-
-#define PREFX(hint,addr) \
- prefx hint,addr
-
-#else /* !CONFIG_CPU_HAS_PREFETCH */
-
-#define PREF(hint,addr)
-#define PREFX(hint,addr)
-
-#endif /* !CONFIG_CPU_HAS_PREFETCH */
-
-/*
- * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
-#define MOVN(rd,rs,rt) \
- .set push; \
- .set reorder; \
- beqz rt,9f; \
- move rd,rs; \
- .set pop; \
-9:
-#define MOVZ(rd,rs,rt) \
- .set push; \
- .set reorder; \
- bnez rt,9f; \
- move rd,rs; \
- .set pop; \
-9:
-#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
-#define MOVN(rd,rs,rt) \
- .set push; \
- .set noreorder; \
- bnezl rt,9f; \
- move rd,rs; \
- .set pop; \
-9:
-#define MOVZ(rd,rs,rt) \
- .set push; \
- .set noreorder; \
- beqzl rt,9f; \
- move rd,rs; \
- .set pop; \
-9:
-#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
-#define MOVN(rd,rs,rt) \
- movn rd,rs,rt
-#define MOVZ(rd,rs,rt) \
- movz rd,rs,rt
-#endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */
-
-/*
- * Stack alignment
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32)
-#define ALSZ 7
-#define ALMASK ~7
-#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
-#define ALSZ 15
-#define ALMASK ~15
-#endif
-
-/*
- * Macros to handle different pointer/register sizes for 32/64-bit code
- */
-
-/*
- * Size of a register
- */
-#ifdef __mips64
-#define SZREG 8
-#else
-#define SZREG 4
-#endif
-
-/*
- * Use the following macros in assemblercode to load/store registers,
- * pointers etc.
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32)
-#define REG_S sw
-#define REG_L lw
-#define REG_SUBU subu
-#define REG_ADDU addu
-#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
-#define REG_S sd
-#define REG_L ld
-#define REG_SUBU dsubu
-#define REG_ADDU daddu
-#endif
-
-/*
- * How to add/sub/load/store/shift C int variables.
- */
-#if (_MIPS_SZINT == 32)
-#define INT_ADD add
-#define INT_ADDU addu
-#define INT_ADDI addi
-#define INT_ADDIU addiu
-#define INT_SUB sub
-#define INT_SUBU subu
-#define INT_L lw
-#define INT_S sw
-#define INT_SLL sll
-#define INT_SLLV sllv
-#define INT_SRL srl
-#define INT_SRLV srlv
-#define INT_SRA sra
-#define INT_SRAV srav
-#endif
-
-#if (_MIPS_SZINT == 64)
-#define INT_ADD dadd
-#define INT_ADDU daddu
-#define INT_ADDI daddi
-#define INT_ADDIU daddiu
-#define INT_SUB dsub
-#define INT_SUBU dsubu
-#define INT_L ld
-#define INT_S sd
-#define INT_SLL dsll
-#define INT_SLLV dsllv
-#define INT_SRL dsrl
-#define INT_SRLV dsrlv
-#define INT_SRA dsra
-#define INT_SRAV dsrav
-#endif
-
-/*
- * How to add/sub/load/store/shift C long variables.
- */
-#if (_MIPS_SZLONG == 32)
-#define LONG_ADD add
-#define LONG_ADDU addu
-#define LONG_ADDI addi
-#define LONG_ADDIU addiu
-#define LONG_SUB sub
-#define LONG_SUBU subu
-#define LONG_L lw
-#define LONG_S sw
-#define LONG_SLL sll
-#define LONG_SLLV sllv
-#define LONG_SRL srl
-#define LONG_SRLV srlv
-#define LONG_SRA sra
-#define LONG_SRAV srav
-#endif
-
-#if (_MIPS_SZLONG == 64)
-#define LONG_ADD dadd
-#define LONG_ADDU daddu
-#define LONG_ADDI daddi
-#define LONG_ADDIU daddiu
-#define LONG_SUB dsub
-#define LONG_SUBU dsubu
-#define LONG_L ld
-#define LONG_S sd
-#define LONG_SLL dsll
-#define LONG_SLLV dsllv
-#define LONG_SRL dsrl
-#define LONG_SRLV dsrlv
-#define LONG_SRA dsra
-#define LONG_SRAV dsrav
-#endif
-
-/*
- * How to add/sub/load/store/shift pointers.
- */
-#if (_MIPS_SZPTR == 32)
-#define PTR_ADD add
-#define PTR_ADDU addu
-#define PTR_ADDI addi
-#define PTR_ADDIU addiu
-#define PTR_SUB sub
-#define PTR_SUBU subu
-#define PTR_L lw
-#define PTR_S sw
-#define PTR_LA la
-#define PTR_SLL sll
-#define PTR_SLLV sllv
-#define PTR_SRL srl
-#define PTR_SRLV srlv
-#define PTR_SRA sra
-#define PTR_SRAV srav
-
-#define PTR_SCALESHIFT 2
-
-#define PTR .word
-#define PTRSIZE 4
-#define PTRLOG 2
-#endif
-
-#if (_MIPS_SZPTR == 64)
-#define PTR_ADD dadd
-#define PTR_ADDU daddu
-#define PTR_ADDI daddi
-#define PTR_ADDIU daddiu
-#define PTR_SUB dsub
-#define PTR_SUBU dsubu
-#define PTR_L ld
-#define PTR_S sd
-#define PTR_LA dla
-#define PTR_SLL dsll
-#define PTR_SLLV dsllv
-#define PTR_SRL dsrl
-#define PTR_SRLV dsrlv
-#define PTR_SRA dsra
-#define PTR_SRAV dsrav
-
-#define PTR_SCALESHIFT 3
-
-#define PTR .dword
-#define PTRSIZE 8
-#define PTRLOG 3
-#endif
-
-/*
- * Some cp0 registers were extended to 64bit for MIPS III.
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32)
-#define MFC0 mfc0
-#define MTC0 mtc0
-#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
-#define MFC0 dmfc0
-#define MTC0 dmtc0
-#endif
-
-#define SSNOP sll zero,zero,1
-
-#endif /* __ASM_ASM_H */
diff -Nru a/include/asm-mips64/asmmacro.h b/include/asm-mips64/asmmacro.h
--- a/include/asm-mips64/asmmacro.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,206 +0,0 @@
-/*
- * asmmacro.h: Assembler macros to make things easier to read.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1998, 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_ASMMACRO_H
-#define _ASM_ASMMACRO_H
-
-#include <linux/config.h>
-#include <asm/offset.h>
-
-#ifdef CONFIG_CPU_SB1
-#define FPU_ENABLE_HAZARD \
- .set push; \
- .set noreorder; \
- .set mips2; \
- SSNOP; \
- bnezl $0, .+4; \
- SSNOP; \
- .set pop
-#else
-#define FPU_ENABLE_HAZARD
-#endif
-
- .macro fpu_save_16even thread tmp
- cfc1 \tmp, fcr31
- sdc1 $f2, (THREAD_FPU + 0x010)(\thread)
- sdc1 $f4, (THREAD_FPU + 0x020)(\thread)
- sdc1 $f6, (THREAD_FPU + 0x030)(\thread)
- sdc1 $f8, (THREAD_FPU + 0x040)(\thread)
- sdc1 $f10, (THREAD_FPU + 0x050)(\thread)
- sdc1 $f12, (THREAD_FPU + 0x060)(\thread)
- sdc1 $f14, (THREAD_FPU + 0x070)(\thread)
- sdc1 $f16, (THREAD_FPU + 0x080)(\thread)
- sdc1 $f18, (THREAD_FPU + 0x090)(\thread)
- sdc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
- sdc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
- sdc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
- sdc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
- sdc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
- sdc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
- sw \tmp, (THREAD_FPU + 0x100)(\thread)
- .endm
-
- .macro fpu_save_16odd thread
- sdc1 $f1, (THREAD_FPU + 0x08)(\thread)
- sdc1 $f3, (THREAD_FPU + 0x18)(\thread)
- sdc1 $f5, (THREAD_FPU + 0x28)(\thread)
- sdc1 $f7, (THREAD_FPU + 0x38)(\thread)
- sdc1 $f9, (THREAD_FPU + 0x48)(\thread)
- sdc1 $f11, (THREAD_FPU + 0x58)(\thread)
- sdc1 $f13, (THREAD_FPU + 0x68)(\thread)
- sdc1 $f15, (THREAD_FPU + 0x78)(\thread)
- sdc1 $f17, (THREAD_FPU + 0x88)(\thread)
- sdc1 $f19, (THREAD_FPU + 0x98)(\thread)
- sdc1 $f21, (THREAD_FPU + 0xa8)(\thread)
- sdc1 $f23, (THREAD_FPU + 0xb8)(\thread)
- sdc1 $f25, (THREAD_FPU + 0xc8)(\thread)
- sdc1 $f27, (THREAD_FPU + 0xd8)(\thread)
- sdc1 $f29, (THREAD_FPU + 0xe8)(\thread)
- sdc1 $f31, (THREAD_FPU + 0xf8)(\thread)
- .endm
-
- .macro fpu_save thread tmp
- cfc1 \tmp, fcr31
- swc1 $f0, (THREAD_FPU + 0x000)(\thread)
- swc1 $f1, (THREAD_FPU + 0x008)(\thread)
- swc1 $f2, (THREAD_FPU + 0x010)(\thread)
- swc1 $f3, (THREAD_FPU + 0x018)(\thread)
- swc1 $f4, (THREAD_FPU + 0x020)(\thread)
- swc1 $f5, (THREAD_FPU + 0x028)(\thread)
- swc1 $f6, (THREAD_FPU + 0x030)(\thread)
- swc1 $f7, (THREAD_FPU + 0x038)(\thread)
- swc1 $f8, (THREAD_FPU + 0x040)(\thread)
- swc1 $f9, (THREAD_FPU + 0x048)(\thread)
- swc1 $f10, (THREAD_FPU + 0x050)(\thread)
- swc1 $f11, (THREAD_FPU + 0x058)(\thread)
- swc1 $f12, (THREAD_FPU + 0x060)(\thread)
- swc1 $f13, (THREAD_FPU + 0x068)(\thread)
- swc1 $f14, (THREAD_FPU + 0x070)(\thread)
- swc1 $f15, (THREAD_FPU + 0x078)(\thread)
- swc1 $f16, (THREAD_FPU + 0x080)(\thread)
- swc1 $f17, (THREAD_FPU + 0x088)(\thread)
- swc1 $f18, (THREAD_FPU + 0x090)(\thread)
- swc1 $f19, (THREAD_FPU + 0x098)(\thread)
- swc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
- swc1 $f21, (THREAD_FPU + 0x0a8)(\thread)
- swc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
- swc1 $f23, (THREAD_FPU + 0x0b8)(\thread)
- swc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
- swc1 $f25, (THREAD_FPU + 0x0c8)(\thread)
- swc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
- swc1 $f27, (THREAD_FPU + 0x0d8)(\thread)
- swc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
- swc1 $f29, (THREAD_FPU + 0x0e8)(\thread)
- swc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
- swc1 $f31, (THREAD_FPU + 0x0f8)(\thread)
- sw \tmp, (THREAD_FPU + 0x100)(\thread)
- .endm
-
- .macro fpu_restore_16even thread tmp
- lw \tmp, (THREAD_FPU + 0x100)(\thread)
- ldc1 $f2, (THREAD_FPU + 0x010)(\thread)
- ldc1 $f4, (THREAD_FPU + 0x020)(\thread)
- ldc1 $f6, (THREAD_FPU + 0x030)(\thread)
- ldc1 $f8, (THREAD_FPU + 0x040)(\thread)
- ldc1 $f10, (THREAD_FPU + 0x050)(\thread)
- ldc1 $f12, (THREAD_FPU + 0x060)(\thread)
- ldc1 $f14, (THREAD_FPU + 0x070)(\thread)
- ldc1 $f16, (THREAD_FPU + 0x080)(\thread)
- ldc1 $f18, (THREAD_FPU + 0x090)(\thread)
- ldc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
- ldc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
- ldc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
- ldc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
- ldc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
- ldc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
- ctc1 \tmp, fcr31
- .endm
-
- .macro fpu_restore_16odd thread
- ldc1 $f1, (THREAD_FPU + 0x08)(\thread)
- ldc1 $f3, (THREAD_FPU + 0x18)(\thread)
- ldc1 $f5, (THREAD_FPU + 0x28)(\thread)
- ldc1 $f7, (THREAD_FPU + 0x38)(\thread)
- ldc1 $f9, (THREAD_FPU + 0x48)(\thread)
- ldc1 $f11, (THREAD_FPU + 0x58)(\thread)
- ldc1 $f13, (THREAD_FPU + 0x68)(\thread)
- ldc1 $f15, (THREAD_FPU + 0x78)(\thread)
- ldc1 $f17, (THREAD_FPU + 0x88)(\thread)
- ldc1 $f19, (THREAD_FPU + 0x98)(\thread)
- ldc1 $f21, (THREAD_FPU + 0xa8)(\thread)
- ldc1 $f23, (THREAD_FPU + 0xb8)(\thread)
- ldc1 $f25, (THREAD_FPU + 0xc8)(\thread)
- ldc1 $f27, (THREAD_FPU + 0xd8)(\thread)
- ldc1 $f29, (THREAD_FPU + 0xe8)(\thread)
- ldc1 $f31, (THREAD_FPU + 0xf8)(\thread)
- .endm
-
- .macro fpu_restore thread tmp
- lw \tmp, (THREAD_FPU + 0x100)(\thread)
- lwc1 $f0, (THREAD_FPU + 0x000)(\thread)
- lwc1 $f1, (THREAD_FPU + 0x008)(\thread)
- lwc1 $f2, (THREAD_FPU + 0x010)(\thread)
- lwc1 $f3, (THREAD_FPU + 0x018)(\thread)
- lwc1 $f4, (THREAD_FPU + 0x020)(\thread)
- lwc1 $f5, (THREAD_FPU + 0x028)(\thread)
- lwc1 $f6, (THREAD_FPU + 0x030)(\thread)
- lwc1 $f7, (THREAD_FPU + 0x038)(\thread)
- lwc1 $f8, (THREAD_FPU + 0x040)(\thread)
- lwc1 $f9, (THREAD_FPU + 0x048)(\thread)
- lwc1 $f10, (THREAD_FPU + 0x050)(\thread)
- lwc1 $f11, (THREAD_FPU + 0x058)(\thread)
- lwc1 $f12, (THREAD_FPU + 0x060)(\thread)
- lwc1 $f13, (THREAD_FPU + 0x068)(\thread)
- lwc1 $f14, (THREAD_FPU + 0x070)(\thread)
- lwc1 $f15, (THREAD_FPU + 0x078)(\thread)
- lwc1 $f16, (THREAD_FPU + 0x080)(\thread)
- lwc1 $f17, (THREAD_FPU + 0x088)(\thread)
- lwc1 $f18, (THREAD_FPU + 0x090)(\thread)
- lwc1 $f19, (THREAD_FPU + 0x098)(\thread)
- lwc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
- lwc1 $f21, (THREAD_FPU + 0x0a8)(\thread)
- lwc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
- lwc1 $f23, (THREAD_FPU + 0x0b8)(\thread)
- lwc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
- lwc1 $f25, (THREAD_FPU + 0x0c8)(\thread)
- lwc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
- lwc1 $f27, (THREAD_FPU + 0x0d8)(\thread)
- lwc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
- lwc1 $f29, (THREAD_FPU + 0x0e8)(\thread)
- lwc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
- lwc1 $f31, (THREAD_FPU + 0x0f8)(\thread)
- ctc1 \tmp, fcr31
- .endm
-
- .macro cpu_save_nonscratch thread
- sd s0, THREAD_REG16(\thread)
- sd s1, THREAD_REG17(\thread)
- sd s2, THREAD_REG18(\thread)
- sd s3, THREAD_REG19(\thread)
- sd s4, THREAD_REG20(\thread)
- sd s5, THREAD_REG21(\thread)
- sd s6, THREAD_REG22(\thread)
- sd s7, THREAD_REG23(\thread)
- sd sp, THREAD_REG29(\thread)
- sd fp, THREAD_REG30(\thread)
- .endm
-
- .macro cpu_restore_nonscratch thread
- ld s0, THREAD_REG16(\thread)
- ld s1, THREAD_REG17(\thread)
- ld s2, THREAD_REG18(\thread)
- ld s3, THREAD_REG19(\thread)
- ld s4, THREAD_REG20(\thread)
- ld s5, THREAD_REG21(\thread)
- ld s6, THREAD_REG22(\thread)
- ld s7, THREAD_REG23(\thread)
- ld sp, THREAD_REG29(\thread)
- ld fp, THREAD_REG30(\thread)
- ld ra, THREAD_REG31(\thread)
- .endm
-
-#endif /* !(_ASM_ASMMACRO_H) */
diff -Nru a/include/asm-mips64/atomic.h b/include/asm-mips64/atomic.h
--- a/include/asm-mips64/atomic.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,195 +0,0 @@
-/*
- * Atomic operations that C can't guarantee us. Useful for
- * resource counting etc..
- *
- * But use these as seldom as possible since they are much more slower
- * than regular operations.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1999, 2000 by Ralf Baechle
- */
-#ifndef _ASM_ATOMIC_H
-#define _ASM_ATOMIC_H
-
-#include <asm/sgidefs.h>
-
-typedef struct { volatile int counter; } atomic_t;
-
-#ifdef __KERNEL__
-#define ATOMIC_INIT(i) { (i) }
-
-/*
- * atomic_read - read atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically reads the value of @v. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_read(v) ((v)->counter)
-
-/*
- * atomic_set - set atomic variable
- * @v: pointer of type atomic_t
- * @i: required value
- *
- * Atomically sets the value of @v to @i. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_set(v,i) ((v)->counter = (i))
-
-extern __inline__ void atomic_add(int i, volatile atomic_t * v)
-{
- unsigned long temp;
-
- __asm__ __volatile__(
- "1:\tll\t%0,%1\t\t\t# atomic_add\n\t"
- "addu\t%0,%2\n\t"
- "sc\t%0,%1\n\t"
- "beqz\t%0,1b"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
-}
-
-/*
- * atomic_sub - subtract the atomic variable
- * @i: integer value to subtract
- * @v: pointer of type atomic_t
- *
- * Atomically subtracts @i from @v. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-extern __inline__ void atomic_sub(int i, volatile atomic_t * v)
-{
- unsigned long temp;
-
- __asm__ __volatile__(
- "1:\tll\t%0,%1\t\t\t# atomic_sub\n\t"
- "subu\t%0,%2\n\t"
- "sc\t%0,%1\n\t"
- "beqz\t%0,1b"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
-}
-
-/*
- * Same as above, but return the result value
- */
-extern __inline__ int atomic_add_return(int i, atomic_t * v)
-{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# atomic_add_return\n"
- "1:\tll\t%1,%2\n\t"
- "addu\t%0,%1,%3\n\t"
- "sc\t%0,%2\n\t"
- "beqz\t%0,1b\n\t"
- "addu\t%0,%1,%3\n\t"
- "sync\n\t"
- ".set\treorder"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
-
- return result;
-}
-
-extern __inline__ int atomic_sub_return(int i, atomic_t * v)
-{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# atomic_sub_return\n"
- "1:\tll\t%1,%2\n\t"
- "subu\t%0,%1,%3\n\t"
- "sc\t%0,%2\n\t"
- "beqz\t%0,1b\n\t"
- "subu\t%0,%1,%3\n\t"
- "sync\n\t"
- ".set\treorder"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
-
- return result;
-}
-
-#define atomic_dec_return(v) atomic_sub_return(1,(v))
-#define atomic_inc_return(v) atomic_add_return(1,(v))
-
-/*
- * atomic_sub_and_test - subtract value from variable and test result
- * @i: integer value to subtract
- * @v: pointer of type atomic_t
- *
- * Atomically subtracts @i from @v and returns
- * true if the result is zero, or false for all
- * other cases. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
-
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-/*
- * atomic_dec_and_test - decrement by 1 and test
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1 and
- * returns true if the result is 0, or false for all other
- * cases. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
-
-/*
- * atomic_inc - increment atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_inc(v) atomic_add(1,(v))
-
-/*
- * atomic_dec - decrement and test
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_dec(v) atomic_sub(1,(v))
-
-/*
- * atomic_add_negative - add and test if negative
- * @v: pointer of type atomic_t
- * @i: integer value to add
- *
- * Atomically adds @i to @v and returns true
- * if the result is negative, or false when
- * result is greater than or equal to zero. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
-
-/* Atomic operations are already serializing */
-#define smp_mb__before_atomic_dec() smp_mb()
-#define smp_mb__after_atomic_dec() smp_mb()
-#define smp_mb__before_atomic_inc() smp_mb()
-#define smp_mb__after_atomic_inc() smp_mb()
-
-#endif /* defined(__KERNEL__) */
-
-#endif /* _ASM_ATOMIC_H */
diff -Nru a/include/asm-mips64/bcache.h b/include/asm-mips64/bcache.h
--- a/include/asm-mips64/bcache.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,62 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1997, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_BCACHE_H
-#define _ASM_BCACHE_H
-
-#include <linux/config.h>
-
-/* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent,
- chipset implemented caches. On machines with other CPUs the CPU does the
- cache thing itself. */
-struct bcache_ops {
- void (*bc_enable)(void);
- void (*bc_disable)(void);
- void (*bc_wback_inv)(unsigned long page, unsigned long size);
- void (*bc_inv)(unsigned long page, unsigned long size);
-};
-
-extern void indy_sc_init(void);
-extern void sni_pcimt_sc_init(void);
-
-#ifdef CONFIG_BOARD_SCACHE
-
-extern struct bcache_ops *bcops;
-
-static inline void bc_enable(void)
-{
- bcops->bc_enable();
-}
-
-static inline void bc_disable(void)
-{
- bcops->bc_disable();
-}
-
-static inline void bc_wback_inv(unsigned long page, unsigned long size)
-{
- bcops->bc_wback_inv(page, size);
-}
-
-static inline void bc_inv(unsigned long page, unsigned long size)
-{
- bcops->bc_inv(page, size);
-}
-
-#else /* !defined(CONFIG_BOARD_SCACHE) */
-
-/* Not R4000 / R4400 / R4600 / R5000. */
-
-#define bc_enable() do { } while (0)
-#define bc_disable() do { } while (0)
-#define bc_wback_inv(page, size) do { } while (0)
-#define bc_inv(page, size) do { } while (0)
-
-#endif /* !defined(CONFIG_BOARD_SCACHE) */
-
-#endif /* _ASM_BCACHE_H */
diff -Nru a/include/asm-mips64/bitops.h b/include/asm-mips64/bitops.h
--- a/include/asm-mips64/bitops.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,647 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1994, 95, 96, 97, 98, 99, 2000 Ralf Baechle
- * Copyright (c) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_BITOPS_H
-#define _ASM_BITOPS_H
-
-#include <linux/config.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <asm/byteorder.h> /* sigh ... */
-
-#if (_MIPS_SZLONG == 32)
-#define SZLONG_LOG 5
-#define SZLONG_MASK 31UL
-#elif (_MIPS_SZLONG == 64)
-#define SZLONG_LOG 6
-#define SZLONG_MASK 63UL
-#endif
-
-#ifndef __KERNEL__
-#error "Don't do this, sucker ..."
-#endif
-
-#include <asm/system.h>
-#include <asm/sgidefs.h>
-
-/*
- * clear_bit() doesn't provide any barrier for the compiler.
- */
-#define smp_mb__before_clear_bit() smp_mb()
-#define smp_mb__after_clear_bit() smp_mb()
-
-/*
- * set_bit - Atomically set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * This function is atomic and may not be reordered. See __set_bit()
- * if you do not require the atomic guarantees.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
-{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
- unsigned long temp;
-
- __asm__ __volatile__(
- "1:\tlld\t%0, %1\t\t# set_bit\n\t"
- "or\t%0, %2\n\t"
- "scd\t%0, %1\n\t"
- "beqz\t%0, 1b"
- : "=&r" (temp), "=m" (*m)
- : "ir" (1UL << (nr & 0x3f)), "m" (*m)
- : "memory");
-}
-
-/*
- * __set_bit - Set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * Unlike set_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __set_bit(int nr, volatile unsigned long * addr)
-{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-
- *m |= 1UL << (nr & 0x3f);
-}
-
-/*
- * clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * clear_bit() is atomic and may not be reordered. However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
- * in order to ensure changes are visible on other processors.
- */
-static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
-{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
- unsigned long temp;
-
- __asm__ __volatile__(
- "1:\tlld\t%0, %1\t\t# clear_bit\n\t"
- "and\t%0, %2\n\t"
- "scd\t%0, %1\n\t"
- "beqz\t%0, 1b\n\t"
- : "=&r" (temp), "=m" (*m)
- : "ir" (~(1UL << (nr & 0x3f))), "m" (*m));
-}
-
-/*
- * __clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * Unlike clear_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __clear_bit(int nr, volatile unsigned long * addr)
-{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-
- *m &= ~(1UL << (nr & 0x3f));
-}
-
-/*
- * change_bit - Toggle a bit in memory
- * @nr: Bit to change
- * @addr: Address to start counting from
- *
- * change_bit() is atomic and may not be reordered.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
-{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
- unsigned long temp;
-
- __asm__ __volatile__(
- "1:\tlld\t%0, %1\t\t# change_bit\n\t"
- "xor\t%0, %2\n\t"
- "scd\t%0, %1\n\t"
- "beqz\t%0, 1b"
- :"=&r" (temp), "=m" (*m)
- :"ir" (1UL << (nr & 0x3f)), "m" (*m));
-}
-
-/*
- * __change_bit - Toggle a bit in memory
- * @nr: the bit to change
- * @addr: the address to start counting from
- *
- * Unlike change_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __change_bit(int nr, volatile unsigned long * addr)
-{
- unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-
- *m ^= 1UL << (nr & 0x3f);
-}
-
-/*
- * test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static inline unsigned long test_and_set_bit(unsigned long nr,
- volatile unsigned long *addr)
-{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
- unsigned long temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t# test_and_set_bit\n"
- "1:\tlld\t%0, %1\n\t"
- "or\t%2, %0, %3\n\t"
- "scd\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " and\t%2, %0, %3\n\t"
-#ifdef CONFIG_SMP
- "sync\n\t"
-#endif
- ".set\treorder"
- : "=&r" (temp), "=m" (*m), "=&r" (res)
- : "r" (1UL << (nr & 0x3f)), "m" (*m)
- : "memory");
-
- return res != 0;
-}
-
-/*
- * __test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
-static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
-{
- unsigned long mask, retval;
- long *a = (unsigned long *) addr;
-
- a += (nr >> 6);
- mask = 1UL << (nr & 0x3f);
- retval = ((mask & *a) != 0);
- *a |= mask;
-
- return retval;
-}
-
-/*
- * test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to clear
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static inline unsigned long test_and_clear_bit(unsigned long nr,
- volatile unsigned long *addr)
-{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
- unsigned long temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t# test_and_clear_bit\n"
- "1:\tlld\t%0, %1\n\t"
- "or\t%2, %0, %3\n\t"
- "xor\t%2, %3\n\t"
- "scd\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " and\t%2, %0, %3\n\t"
-#ifdef CONFIG_SMP
- "sync\n\t"
-#endif
- ".set\treorder"
- : "=&r" (temp), "=m" (*m), "=&r" (res)
- : "r" (1UL << (nr & 0x3f)), "m" (*m)
- : "memory");
-
- return res != 0;
-}
-
-/*
- * __test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to clear
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
-static inline int __test_and_clear_bit(int nr, volatile unsigned long * addr)
-{
- unsigned long mask, retval;
- unsigned long *a = (unsigned long *) addr;
-
- a += (nr >> 6);
- mask = 1UL << (nr & 0x3f);
- retval = ((mask & *a) != 0);
- *a &= ~mask;
-
- return retval;
-}
-
-/*
- * test_and_change_bit - Change a bit and return its new value
- * @nr: Bit to change
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static inline unsigned long test_and_change_bit(unsigned long nr,
- volatile unsigned long *addr)
-{
- unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
- unsigned long temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t# test_and_change_bit\n"
- "1:\tlld\t%0, %1\n\t"
- "xor\t%2, %0, %3\n\t"
- "scd\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " and\t%2, %0, %3\n\t"
-#ifdef CONFIG_SMP
- "sync\n\t"
-#endif
- ".set\treorder"
- : "=&r" (temp), "=m" (*m), "=&r" (res)
- : "r" (1UL << (nr & 0x3f)), "m" (*m)
- : "memory");
-
- return res != 0;
-}
-
-/*
- * __test_and_change_bit - Change a bit and return its old value
- * @nr: Bit to change
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
-static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
-{
- unsigned long mask, retval;
- unsigned long *a = (unsigned long *) addr;
-
- a += (nr >> 6);
- mask = 1UL << (nr & 0x3f);
- retval = ((mask & *a) != 0);
- *a ^= mask;
-
- return retval;
-}
-/*
- * test_bit - Determine whether a bit is set
- * @nr: bit number to test
- * @addr: Address to start counting from
- */
-static inline int test_bit(int nr, const volatile unsigned long * addr)
-{
- return 1UL & (((const volatile unsigned long *) addr)[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
-}
-
-/*
- * ffz - find first zero in word.
- * @word: The word to search
- *
- * Undefined if no zero exists, so code should check against ~0UL first.
- */
-static __inline__ unsigned long ffz(unsigned long word)
-{
- int b = 0, s;
-
- word = ~word;
- s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
- s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
- s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
- s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
- s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
- s = 1; if (word << 63 != 0) s = 0; b += s;
-
- return b;
-}
-
-/*
- * __ffs - find first bit in word.
- * @word: The word to search
- *
- * Undefined if no bit exists, so code should check against 0 first.
- */
-static __inline__ unsigned long __ffs(unsigned long word)
-{
- return ffz(~word);
-}
-
-/*
- * fls: find last bit set.
- */
-
-#define fls(x) generic_fls(x)
-
-/*
- * find_next_zero_bit - find the first zero bit in a memory region
- * @addr: The address to base the search on
- * @offset: The bitnumber to start searching at
- * @size: The maximum size to search
- */
-static inline unsigned long find_next_zero_bit(unsigned long *addr,
- unsigned long size, unsigned long offset)
-{
- unsigned long *p = ((unsigned long *) addr) + (offset >> SZLONG_LOG);
- unsigned long result = offset & ~SZLONG_MASK;
- unsigned long tmp;
-
- if (offset >= size)
- return size;
- size -= result;
- offset &= SZLONG_MASK;
- if (offset) {
- tmp = *(p++);
- tmp |= ~0UL >> (_MIPS_SZLONG-offset);
- if (size < _MIPS_SZLONG)
- goto found_first;
- if (~tmp)
- goto found_middle;
- size -= _MIPS_SZLONG;
- result += _MIPS_SZLONG;
- }
- while (size & ~SZLONG_MASK) {
- if (~(tmp = *(p++)))
- goto found_middle;
- result += _MIPS_SZLONG;
- size -= _MIPS_SZLONG;
- }
- if (!size)
- return result;
- tmp = *p;
-
-found_first:
- tmp |= ~0UL << size;
- if (tmp == ~0UL) /* Are any bits zero? */
- return result + size; /* Nope. */
-found_middle:
- return result + ffz(tmp);
-}
-
-#define find_first_zero_bit(addr, size) \
- find_next_zero_bit((addr), (size), 0)
-
-/*
- * find_next_bit - find the next set bit in a memory region
- * @addr: The address to base the search on
- * @offset: The bitnumber to start searching at
- * @size: The maximum size to search
- */
-static inline unsigned long find_next_bit(unsigned long *addr,
- unsigned long size, unsigned long offset)
-{
- unsigned long *p = addr + (offset >> SZLONG_LOG);
- unsigned long result = offset & ~SZLONG_MASK;
- unsigned long tmp;
-
- if (offset >= size)
- return size;
- size -= result;
- offset &= SZLONG_MASK;
- if (offset) {
- tmp = *(p++);
- tmp &= ~0UL << offset;
- if (size < _MIPS_SZLONG)
- goto found_first;
- if (tmp)
- goto found_middle;
- size -= _MIPS_SZLONG;
- result += _MIPS_SZLONG;
- }
- while (size & ~SZLONG_MASK) {
- if ((tmp = *(p++)))
- goto found_middle;
- result += _MIPS_SZLONG;
- size -= _MIPS_SZLONG;
- }
- if (!size)
- return result;
- tmp = *p;
-
-found_first:
- tmp &= ~0UL >> (_MIPS_SZLONG - size);
- if (tmp == 0UL) /* Are any bits set? */
- return result + size; /* Nope. */
-found_middle:
- return result + __ffs(tmp);
-}
-
-/*
- * find_first_bit - find the first set bit in a memory region
- * @addr: The address to start the search at
- * @size: The maximum size to search
- *
- * Returns the bit-number of the first set bit, not the number of the byte
- * containing a bit.
- */
-#define find_first_bit(addr, size) \
- find_next_bit((addr), (size), 0)
-
-#ifdef __KERNEL__
-
-/*
- * Every architecture must define this function. It's the fastest
- * way of searching a 168-bit bitmap where the first 128 bits are
- * unlikely to be set. It's guaranteed that at least one of the 168
- * bits is cleared.
- */
-static inline int sched_find_first_bit(unsigned long *b)
-{
- if (unlikely(b[0]))
- return __ffs(b[0]);
- if (unlikely(b[1]))
- return __ffs(b[1]) + 64;
- return __ffs(b[2]) + 128;
-}
-
-/*
- * ffs - find first bit set
- * @x: the word to search
- *
- * This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
-
-#define ffs(x) generic_ffs(x)
-
-/*
- * hweightN - returns the hamming weight of a N-bit word
- * @x: the word to weigh
- *
- * The Hamming Weight of a number is the total number of bits set in it.
- */
-
-#define hweight32(x) generic_hweight32(x)
-#define hweight16(x) generic_hweight16(x)
-#define hweight8(x) generic_hweight8(x)
-
-static inline int __test_and_set_le_bit(unsigned long nr, unsigned long *addr)
-{
- unsigned char *ADDR = (unsigned char *) addr;
- int mask, retval;
-
- ADDR += nr >> 3;
- mask = 1 << (nr & 0x07);
- retval = (mask & *ADDR) != 0;
- *ADDR |= mask;
-
- return retval;
-}
-
-static inline int __test_and_clear_le_bit(unsigned long nr, unsigned long *addr)
-{
- unsigned char *ADDR = (unsigned char *) addr;
- int mask, retval;
-
- ADDR += nr >> 3;
- mask = 1 << (nr & 0x07);
- retval = (mask & *ADDR) != 0;
- *ADDR &= ~mask;
-
- return retval;
-}
-
-static inline int test_le_bit(unsigned long nr, const unsigned long * addr)
-{
- const unsigned char *ADDR = (const unsigned char *) addr;
- int mask;
-
- ADDR += nr >> 3;
- mask = 1 << (nr & 0x07);
-
- return ((mask & *ADDR) != 0);
-}
-
-static inline unsigned long ext2_ffz(unsigned int word)
-{
- int b = 0, s;
-
- word = ~word;
- s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
- s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
- s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
- s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
- s = 1; if (word << 31 != 0) s = 0; b += s;
-
- return b;
-}
-
-static inline unsigned long find_next_zero_le_bit(unsigned long *addr,
- unsigned long size, unsigned long offset)
-{
- unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
- unsigned int result = offset & ~31;
- unsigned int tmp;
-
- if (offset >= size)
- return size;
-
- size -= result;
- offset &= 31;
- if (offset) {
- tmp = cpu_to_le32p(p++);
- tmp |= ~0U >> (32-offset); /* bug or feature ? */
- if (size < 32)
- goto found_first;
- if (tmp != ~0U)
- goto found_middle;
- size -= 32;
- result += 32;
- }
- while (size >= 32) {
- if ((tmp = cpu_to_le32p(p++)) != ~0U)
- goto found_middle;
- result += 32;
- size -= 32;
- }
- if (!size)
- return result;
-
- tmp = cpu_to_le32p(p);
-found_first:
- tmp |= ~0 << size;
- if (tmp == ~0U) /* Are any bits zero? */
- return result + size; /* Nope. */
-
-found_middle:
- return result + ext2_ffz(tmp);
-}
-
-#define find_first_zero_le_bit(addr, size) \
- find_next_zero_le_bit((addr), (size), 0)
-
-#define ext2_set_bit(nr,addr) \
- __test_and_set_le_bit((nr),(unsigned long*)addr)
-#define ext2_clear_bit(nr, addr) \
- __test_and_clear_le_bit((nr),(unsigned long*)addr)
- #define ext2_set_bit_atomic(lock, nr, addr) \
-({ \
- int ret; \
- spin_lock(lock); \
- ret = ext2_set_bit((nr), (addr)); \
- spin_unlock(lock); \
- ret; \
-})
-
-#define ext2_clear_bit_atomic(lock, nr, addr) \
-({ \
- int ret; \
- spin_lock(lock); \
- ret = ext2_clear_bit((nr), (addr)); \
- spin_unlock(lock); \
- ret; \
-})
-#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
-#define ext2_find_first_zero_bit(addr, size) \
- find_first_zero_le_bit((unsigned long*)addr, size)
-#define ext2_find_next_zero_bit(addr, size, off) \
- find_next_zero_le_bit((unsigned long*)addr, size, off)
-
-/*
- * Bitmap functions for the minix filesystem.
- *
- * FIXME: These assume that Minix uses the native byte/bitorder.
- * This limits the Minix filesystem's value for data exchange very much.
- */
-#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
-#define minix_set_bit(nr,addr) set_bit(nr,addr)
-#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
-#define minix_test_bit(nr,addr) test_bit(nr,addr)
-#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_BITOPS_H */
diff -Nru a/include/asm-mips64/bootinfo.h b/include/asm-mips64/bootinfo.h
--- a/include/asm-mips64/bootinfo.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,219 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996 by Ralf Baechle, Andreas Busse,
- * Stoned Elipot and Paul M. Antoine.
- */
-#ifndef _ASM_BOOTINFO_H
-#define _ASM_BOOTINFO_H
-
-#include <linux/types.h>
-
-/*
- * Values for machgroup
- */
-#define MACH_GROUP_UNKNOWN 0 /* whatever... */
-#define MACH_GROUP_JAZZ 1 /* Jazz */
-#define MACH_GROUP_DEC 2 /* Digital Equipment */
-#define MACH_GROUP_ARC 3 /* Wreckstation Tyne, rPC44, possibly other */
-#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */
-#define MACH_GROUP_ACN 5
-#define MACH_GROUP_SGI 6 /* Silicon Graphics */
-#define MACH_GROUP_COBALT 7 /* Cobalt servers */
-#define MACH_GROUP_NEC_DDB 8 /* NEC DDB */
-#define MACH_GROUP_BAGET 9 /* Baget */
-#define MACH_GROUP_COSINE 10 /* CoSine Orion */
-#define MACH_GROUP_GALILEO 11 /* Galileo Eval Boards */
-#define MACH_GROUP_MOMENCO 12 /* Momentum Boards */
-#define MACH_GROUP_ITE 13 /* ITE Semi Eval Boards */
-#define MACH_GROUP_PHILIPS 14
-#define MACH_GROUP_GLOBESPAN 15 /* Globespan PVR Referrence Board */
-#define MACH_GROUP_SIBYTE 16 /* Sibyte Eval Boards */
-#define MACH_GROUP_TOSHIBA 17 /* Toshiba Reference Systems TSBREF */
-#define MACH_GROUP_ALCHEMY 18 /* Alchemy Semi Eval Boards */
-#define MACH_GROUP_NEC_VR41XX 19 /* NEC Vr41xx based boards/gadgets */
-#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
-#define MACH_GROUP_LASAT 21
-
-/*
- * Valid machtype values for group unknown (low order halfword of mips_machtype)
- */
-#define MACH_UNKNOWN 0 /* whatever... */
-
-/*
- * Valid machtype values for group JAZZ
- */
-#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
-#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
-#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
-
-/*
- * Valid machtype for group DEC
- */
-#define MACH_DSUNKNOWN 0
-#define MACH_DS23100 1 /* DECstation 2100 or 3100 */
-#define MACH_DS5100 2 /* DECsystem 5100 */
-#define MACH_DS5000_200 3 /* DECstation 5000/200 */
-#define MACH_DS5000_1XX 4 /* DECstation 5000/120, 125, 133, 150 */
-#define MACH_DS5000_XX 5 /* DECstation 5000/20, 25, 33, 50 */
-#define MACH_DS5000_2X0 6 /* DECstation 5000/240, 260 */
-#define MACH_DS5400 7 /* DECsystem 5400 */
-#define MACH_DS5500 8 /* DECsystem 5500 */
-#define MACH_DS5800 9 /* DECsystem 5800 */
-#define MACH_DS5900 10 /* DECsystem 5900 */
-
-/*
- * Valid machtype for group ARC
- */
-#define MACH_DESKSTATION_RPC44 0 /* Deskstation rPC44 */
-#define MACH_DESKSTATION_TYNE 1 /* Deskstation Tyne */
-
-/*
- * Valid machtype for group SNI_RM
- */
-#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
-
-/*
- * Valid machtype for group ACN
- */
-#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */
-
-/*
- * Valid machtype for group SGI
- */
-#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
-#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
-#define MACH_SGI_IP28 2 /* Indigo2 Impact */
-#define MACH_SGI_IP32 3 /* O2 */
-
-/*
- * Valid machtype for group COBALT
- */
-#define MACH_COBALT_27 0 /* Proto "27" hardware */
-
-/*
- * Valid machtype for group NEC DDB
- */
-#define MACH_NEC_DDB5074 0 /* NEC DDB Vrc-5074 */
-#define MACH_NEC_DDB5476 1 /* NEC DDB Vrc-5476 */
-#define MACH_NEC_DDB5477 2 /* NEC DDB Vrc-5477 */
-#define MACH_NEC_ROCKHOPPER 3 /* Rockhopper base board */
-#define MACH_NEC_ROCKHOPPERII 4 /* Rockhopper II base board */
-
-/*
- * Valid machtype for group BAGET
- */
-#define MACH_BAGET201 0 /* BT23-201 */
-#define MACH_BAGET202 1 /* BT23-202 */
-
-/*
- * Cosine boards.
- */
-#define MACH_COSINE_ORION 0
-
-/*
- * Valid machtype for group GALILEO
- */
-#define MACH_EV96100 0 /* EV96100 */
-#define MACH_EV64120A 1 /* EV64120A */
-
-/*
- * Valid machtype for group MOMENCO
- */
-#define MACH_MOMENCO_OCELOT 0
-#define MACH_MOMENCO_OCELOT_G 1
-#define MACH_MOMENCO_OCELOT_C 2
-
-/*
- * Valid machtype for group ITE
- */
-#define MACH_QED_4N_S01B 0 /* ITE8172 based eval board */
-
-/*
- * Valid machtype for group Globespan
- */
-#define MACH_IVR 0 /* IVR eval board */
-
-/*
- * Valid machtype for group PHILIPS
- */
-#define MACH_PHILIPS_NINO 0 /* Nino */
-#define MACH_PHILIPS_VELO 1 /* Velo */
-
-/*
- * Valid machtype for group SIBYTE
- */
-#define MACH_SWARM 0
-
-/*
- * Valid machtypes for group Toshiba
- */
-#define MACH_PALLAS 0
-#define MACH_TOPAS 1
-#define MACH_JMR 2
-#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
-#define MACH_TOSHIBA_RBTX4927 4
-#define MACH_TOSHIBA_RBTX4937 5
-#define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927", \
- "RBTX4927", "RBTX4937" }
-
-/*
- * Valid machtype for group LASAT
- */
-#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
-#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
-
-/*
- * Valid machtype for group Alchemy
- */
-#define MACH_PB1000 0 /* Au1000-based eval board */
-#define MACH_PB1100 1 /* Au1100-based eval board */
-#define MACH_PB1500 2 /* Au1500-based eval board */
-#define MACH_DB1000 3 /* Au1000-based eval board */
-#define MACH_DB1100 4 /* Au1100-based eval board */
-#define MACH_DB1500 5 /* Au1500-based eval board */
-
-/*
- * Valid machtype for group NEC_VR41XX
- */
-#define MACH_NEC_OSPREY 0 /* Osprey eval board */
-#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */
-#define MACH_ZAO_CAPCELLA 2 /* ZAO Networks Capcella */
-#define MACH_VICTOR_MPC30X 3 /* Victor MP-C303/304 */
-#define MACH_IBM_WORKPAD 4 /* IBM WorkPad z50 */
-#define MACH_CASIO_E55 5 /* CASIO CASSIOPEIA E-10/15/55/65 */
-#define MACH_TANBAC_TB0226 6 /* TANBAC TB0226 (Mbase) */
-#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */
-
-#define CL_SIZE (256)
-
-const char *get_system_type(void);
-
-extern unsigned long mips_machtype;
-extern unsigned long mips_machgroup;
-
-#define BOOT_MEM_MAP_MAX 32
-#define BOOT_MEM_RAM 1
-#define BOOT_MEM_ROM_DATA 2
-#define BOOT_MEM_RESERVED 3
-
-/*
- * A memory map that's built upon what was determined
- * or specified on the command line.
- */
-struct boot_mem_map {
- int nr_map;
- struct {
- phys_t addr; /* start of memory segment */
- phys_t size; /* size of memory segment */
- long type; /* type of memory segment */
- } map[BOOT_MEM_MAP_MAX];
-};
-
-extern struct boot_mem_map boot_mem_map;
-
-extern void add_memory_region(phys_t start, phys_t size, long type);
-
-#endif /* _ASM_BOOTINFO_H */
diff -Nru a/include/asm-mips64/branch.h b/include/asm-mips64/branch.h
--- a/include/asm-mips64/branch.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,38 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle
- */
-#ifndef _ASM_BRANCH_H
-#define _ASM_BRANCH_H
-
-#include <asm/ptrace.h>
-
-static inline int delay_slot(struct pt_regs *regs)
-{
- return regs->cp0_cause & CAUSEF_BD;
-}
-
-static inline unsigned long exception_epc(struct pt_regs *regs)
-{
- if (!delay_slot(regs))
- return regs->cp0_epc;
-
- return regs->cp0_epc + 4;
-}
-
-extern int __compute_return_epc(struct pt_regs *regs);
-
-static inline int compute_return_epc(struct pt_regs *regs)
-{
- if (!delay_slot(regs)) {
- regs->cp0_epc += 4;
- return 0;
- }
-
- return __compute_return_epc(regs);
-}
-
-#endif /* _ASM_BRANCH_H */
diff -Nru a/include/asm-mips64/break.h b/include/asm-mips64/break.h
--- a/include/asm-mips64/break.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,33 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 2003 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef __ASM_BREAK_H
-#define __ASM_BREAK_H
-
-/*
- * The following break codes are or were in use for specific purposes in
- * other MIPS operating systems. Linux/MIPS doesn't use all of them. The
- * unused ones are here as placeholders; we might encounter them in
- * non-Linux/MIPS object files or make use of them in the future.
- */
-#define BRK_USERBP 0 /* User bp (used by debuggers) */
-#define BRK_KERNELBP 1 /* Break in the kernel */
-#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */
-#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */
-#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */
-#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */
-#define BRK_OVERFLOW 6 /* Overflow check */
-#define BRK_DIVZERO 7 /* Divide by zero check */
-#define BRK_RANGE 8 /* Range error check */
-#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */
-#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
-#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
-#define BRK_MULOVF 1023 /* Multiply overflow */
-#define BRK_BUG 512 /* Used by BUG() */
-
-#endif /* __ASM_BREAK_H */
diff -Nru a/include/asm-mips64/bug.h b/include/asm-mips64/bug.h
--- a/include/asm-mips64/bug.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,21 +0,0 @@
-#ifndef __ASM_BUG_H
-#define __ASM_BUG_H
-
-#include <asm/break.h>
-
-#define BUG() \
-do { \
- printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
- __asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \
-} while (0)
-#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
-#define PAGE_BUG(page) do { BUG(); } while (0)
-
-#define WARN_ON(condition) do { \
- if (unlikely((condition)!=0)) { \
- printk("Badness in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \
- dump_stack(); \
- } \
-} while (0)
-
-#endif
diff -Nru a/include/asm-mips64/bugs.h b/include/asm-mips64/bugs.h
--- a/include/asm-mips64/bugs.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,12 +0,0 @@
-/*
- * This is included by init/main.c to check for architecture-dependent bugs.
- *
- * Needs:
- * void check_bugs(void);
- */
-#ifndef __ASM_BUGS_H
-#define __ASM_BUGS_H
-
-extern void check_bugs(void);
-
-#endif /* __ASM_BUGS_H */
diff -Nru a/include/asm-mips64/byteorder.h b/include/asm-mips64/byteorder.h
--- a/include/asm-mips64/byteorder.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,29 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1999 by Ralf Baechle
- */
-#ifndef _ASM_BYTEORDER_H
-#define _ASM_BYTEORDER_H
-
-#include <asm/types.h>
-
-#ifdef __GNUC__
-
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-# define __BYTEORDER_HAS_U64__
-#endif
-
-#endif /* __GNUC__ */
-
-#if defined (__MIPSEB__)
-# include <linux/byteorder/big_endian.h>
-#elif defined (__MIPSEL__)
-# include <linux/byteorder/little_endian.h>
-#else
-# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
-#endif
-
-#endif /* _ASM_BYTEORDER_H */
diff -Nru a/include/asm-mips64/cache.h b/include/asm-mips64/cache.h
--- a/include/asm-mips64/cache.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,25 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 98, 99, 2000, 2003 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_CACHE_H
-#define _ASM_CACHE_H
-
-#include <linux/config.h>
-
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_R6000) || \
- defined(CONFIG_CPU_TX39XX)
-#define L1_CACHE_BYTES 16
-#define L1_CACHE_SHIFT_MAX 4 /* largest L1 which this arch supports */
-#else
-#define L1_CACHE_BYTES 32 /* A guess */
-#define L1_CACHE_SHIFT_MAX 6 /* largest L1 which this arch supports */
-#endif
-
-#define SMP_CACHE_BYTES L1_CACHE_BYTES
-
-#endif /* _ASM_CACHE_H */
diff -Nru a/include/asm-mips64/cachectl.h b/include/asm-mips64/cachectl.h
--- a/include/asm-mips64/cachectl.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_CACHECTL
-#define _ASM_CACHECTL
-
-/*
- * Options for cacheflush system call
- */
-#define ICACHE (1<<0) /* flush instruction cache */
-#define DCACHE (1<<1) /* writeback and flush data cache */
-#define BCACHE (ICACHE|DCACHE) /* flush both caches */
-
-/*
- * Caching modes for the cachectl(2) call
- *
- * cachectl(2) is currently not supported and returns ENOSYS.
- */
-#define CACHEABLE 0 /* make pages cacheable */
-#define UNCACHEABLE 1 /* make pages uncacheable */
-
-#endif /* _ASM_CACHECTL */
diff -Nru a/include/asm-mips64/cacheflush.h b/include/asm-mips64/cacheflush.h
--- a/include/asm-mips64/cacheflush.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,65 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
- * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef __ASM_CACHEFLUSH_H
-#define __ASM_CACHEFLUSH_H
-
-#include <linux/config.h>
-
-/* Keep includes the same across arches. */
-#include <linux/mm.h>
-
-/* Cache flushing:
- *
- * - flush_cache_all() flushes entire cache
- * - flush_cache_mm(mm) flushes the specified mm context's cache lines
- * - flush_cache_page(mm, vmaddr) flushes a single page
- * - flush_cache_range(vma, start, end) flushes a range of pages
- * - flush_icache_range(start, end) flush a range of instructions
- * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
- * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
- *
- * MIPS specific flush operations:
- *
- * - flush_cache_sigtramp() flush signal trampoline
- * - flush_icache_all() flush the entire instruction cache
- * - flush_data_cache_page() flushes a page from the data cache
- */
-extern void (*flush_cache_all)(void);
-extern void (*__flush_cache_all)(void);
-extern void (*flush_cache_mm)(struct mm_struct *mm);
-extern void (*flush_cache_range)(struct vm_area_struct *vma,
- unsigned long start, unsigned long end);
-extern void (*flush_cache_page)(struct vm_area_struct *vma,
- unsigned long page);
-extern void flush_dcache_page(struct page *page);
-extern void (*flush_icache_page)(struct vm_area_struct *vma,
- struct page *page);
-extern void (*flush_icache_range)(unsigned long start, unsigned long end);
-#define flush_icache_user_range(vma, page, addr, len) \
- flush_icache_page(vma, page)
-
-
-extern void (*flush_cache_sigtramp)(unsigned long addr);
-extern void (*flush_icache_all)(void);
-extern void (*flush_data_cache_page)(unsigned long addr);
-
-/*
- * This flag is used to indicate that the page pointed to by a pte
- * is dirty and requires cleaning before returning it to the user.
- */
-#define PG_dcache_dirty PG_arch_1
-
-#define Page_dcache_dirty(page) \
- test_bit(PG_dcache_dirty, &(page)->flags)
-#define SetPageDcacheDirty(page) \
- set_bit(PG_dcache_dirty, &(page)->flags)
-#define ClearPageDcacheDirty(page) \
- clear_bit(PG_dcache_dirty, &(page)->flags)
-
-#endif /* __ASM_CACHEFLUSH_H */
diff -Nru a/include/asm-mips64/cacheops.h b/include/asm-mips64/cacheops.h
--- a/include/asm-mips64/cacheops.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,81 +0,0 @@
-/*
- * Cache operations for the cache instruction.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
- * (C) Copyright 1999 Silicon Graphics, Inc.
- */
-#ifndef __ASM_CACHEOPS_H
-#define __ASM_CACHEOPS_H
-
-/*
- * Cache Operations available on all MIPS processors with R4000-style caches
- */
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-#define Index_Load_Tag_I 0x04
-#define Index_Load_Tag_D 0x05
-#define Index_Store_Tag_I 0x08
-#define Index_Store_Tag_D 0x09
-#define Hit_Invalidate_I 0x10
-#define Hit_Invalidate_D 0x11
-#define Hit_Writeback_Inv_D 0x15
-
-/*
- * R4000-specific cacheops
- */
-#define Create_Dirty_Excl_D 0x0d
-#define Fill 0x14
-#define Hit_Writeback_I 0x18
-#define Hit_Writeback_D 0x19
-
-/*
- * R4000SC and R4400SC-specific cacheops
- */
-#define Index_Invalidate_SI 0x02
-#define Index_Writeback_Inv_SD 0x03
-#define Index_Load_Tag_SI 0x06
-#define Index_Load_Tag_SD 0x07
-#define Index_Store_Tag_SI 0x0A
-#define Index_Store_Tag_SD 0x0B
-#define Create_Dirty_Excl_SD 0x0f
-#define Hit_Invalidate_SI 0x12
-#define Hit_Invalidate_SD 0x13
-#define Hit_Writeback_Inv_SD 0x17
-#define Hit_Writeback_SD 0x1b
-#define Hit_Set_Virtual_SI 0x1e
-#define Hit_Set_Virtual_SD 0x1f
-
-/*
- * R5000-specific cacheops
- */
-#define R5K_Page_Invalidate_S 0x17
-
-/*
- * RM7000-specific cacheops
- */
-#define Page_Invalidate_T 0x16
-
-/*
- * R1000-specific cacheops
- *
- * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
- * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
- */
-#define Index_Writeback_Inv_S 0x03
-#define Index_Load_Tag_S 0x07
-#define Index_Store_Tag_S 0x0B
-#define Hit_Invalidate_S 0x13
-#define Cache_Barrier 0x14
-#define Hit_Writeback_Inv_S 0x17
-#define Index_Load_Data_I 0x18
-#define Index_Load_Data_D 0x19
-#define Index_Load_Data_S 0x1b
-#define Index_Store_Data_I 0x1c
-#define Index_Store_Data_D 0x1d
-#define Index_Store_Data_S 0x1f
-
-#endif /* __ASM_CACHEOPS_H */
diff -Nru a/include/asm-mips64/checksum.h b/include/asm-mips64/checksum.h
--- a/include/asm-mips64/checksum.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,258 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 1998, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Copyright (C) 2001 Thiemo Seufer.
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#ifndef _ASM_CHECKSUM_H
-#define _ASM_CHECKSUM_H
-
-#include <asm/uaccess.h>
-#include <linux/in6.h>
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum);
-
-/*
- * this is a new version of the above that records errors it finds in *errp,
- * but continues and zeros the rest of the buffer.
- */
-unsigned int csum_partial_copy_from_user(const char *src, char *dst, int len,
- unsigned int sum, int *errp);
-
-/*
- * Copy and checksum to user
- */
-#define HAVE_CSUM_COPY_USER
-static inline unsigned int csum_and_copy_to_user (const char *src, char *dst,
- int len, int sum,
- int *err_ptr)
-{
- sum = csum_partial(src, len, sum);
-
- if (copy_to_user(dst, src, len)) {
- *err_ptr = -EFAULT;
- return -1;
- }
-
- return sum;
-}
-
-/*
- * the same as csum_partial, but copies from user space (but on MIPS
- * we have just one address space, so this is identical to the above)
- */
-unsigned int csum_partial_copy_nocheck(const char *src, char *dst, int len,
- unsigned int sum);
-
-/*
- * Fold a partial checksum without adding pseudo headers
- */
-static inline unsigned short int csum_fold(unsigned int sum)
-{
- __asm__(
- ".set\tnoat\t\t\t# csum_fold\n\t"
- "sll\t$1,%0,16\n\t"
- "addu\t%0,$1\n\t"
- "sltu\t$1,%0,$1\n\t"
- "srl\t%0,%0,16\n\t"
- "addu\t%0,$1\n\t"
- "xori\t%0,0xffff\n\t"
- ".set\tat"
- : "=r" (sum)
- : "0" (sum));
-
- return sum;
-}
-
-/*
- * This is a version of ip_compute_csum() optimized for IP headers,
- * which always checksum on 4 octet boundaries.
- *
- * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by
- * Arnt Gulbrandsen.
- */
-static inline unsigned short ip_fast_csum(unsigned char *iph,
- unsigned int ihl)
-{
- unsigned int sum;
- unsigned long dummy;
-
- /*
- * This is for 32-bit processors ... but works just fine for 64-bit
- * processors for now ... XXX
- */
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# ip_fast_csum\n\t"
- ".set\tnoat\n\t"
- "lw\t%0, (%1)\n\t"
- "subu\t%2, 4\n\t"
- "dsll\t%2, 2\n\t"
- "lw\t%3, 4(%1)\n\t"
- "daddu\t%2, %1\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "lw\t%3, 8(%1)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "lw\t%3, 12(%1)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "addu\t%0, $1\n"
-
- "1:\tlw\t%3, 16(%1)\n\t"
- "daddiu\t%1, 4\n"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "bne\t%2, %1, 1b\n\t"
- " addu\t%0, $1\n"
-
- "2:\t.set\tat\n\t"
- ".set\treorder"
- : "=&r" (sum), "=&r" (iph), "=&r" (ihl), "=&r" (dummy)
- : "1" (iph), "2" (ihl));
-
- return csum_fold(sum);
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- *
- * Cast unsigned short expressions to unsigned long explicitly
- * to avoid surprises resulting from implicit promotions to
- * signed int. --macro
- */
-static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
- unsigned long daddr,
- unsigned short len,
- unsigned short proto,
- unsigned int sum)
-{
- __asm__(
- ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t"
- "daddu\t%0, %2\n\t"
- "daddu\t%0, %3\n\t"
- "daddu\t%0, %4\n\t"
- "dsll32\t$1, %0, 0\n\t"
- "daddu\t%0, $1\n\t"
- "dsrl32\t%0, %0, 0\n\t"
- ".set\tat"
- : "=&r" (sum)
- : "0" (daddr), "r"(saddr),
-#ifdef __MIPSEL__
- "r" (((unsigned long)ntohs(len)<<16)+proto*256),
-#else
- "r" (((unsigned long)(proto)<<16)+len),
-#endif
- "r" (sum));
-
- return sum;
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline unsigned short int csum_tcpudp_magic(unsigned long saddr,
- unsigned long daddr,
- unsigned short len,
- unsigned short proto,
- unsigned int sum)
-{
- return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-static inline unsigned short ip_compute_csum(unsigned char * buff, int len)
-{
- return csum_fold(csum_partial(buff, len, 0));
-}
-
-#define _HAVE_ARCH_IPV6_CSUM
-static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
- struct in6_addr *daddr,
- __u32 len,
- unsigned short proto,
- unsigned int sum)
-{
- __asm__(
- ".set\tpush\t\t\t# csum_ipv6_magic\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t"
- "sltu\t$1, %0, %5\n\t"
- "addu\t%0, $1\n\t"
-
- "addu\t%0, %6\t\t\t# csum\n\t"
- "sltu\t$1, %0, %6\n\t"
- "lw\t%1, 0(%2)\t\t\t# four words source address\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 4(%2)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 8(%2)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 12(%2)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 0(%3)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 4(%3)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 8(%3)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "lw\t%1, 12(%3)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %1\n\t"
- "sltu\t$1, %0, %1\n\t"
-
- "addu\t%0, $1\t\t\t# Add final carry\n\t"
- ".set\tpop"
- : "=&r" (sum), "=&r" (proto)
- : "r" (saddr), "r" (daddr),
- "0" (htonl(len)), "1" (htonl(proto)), "r" (sum));
-
- return csum_fold(sum);
-}
-
-#endif /* _ASM_CHECKSUM_H */
diff -Nru a/include/asm-mips64/compat.h b/include/asm-mips64/compat.h
--- a/include/asm-mips64/compat.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,140 +0,0 @@
-#ifndef _ASM_COMPAT_H
-#define _ASM_COMPAT_H
-/*
- * Architecture specific compatibility types
- */
-#include <linux/types.h>
-
-#define COMPAT_USER_HZ 100
-
-typedef u32 compat_size_t;
-typedef s32 compat_ssize_t;
-typedef s32 compat_time_t;
-typedef s32 compat_clock_t;
-typedef s32 compat_suseconds_t;
-
-typedef s32 compat_pid_t;
-typedef s32 compat_uid_t;
-typedef s32 compat_gid_t;
-typedef u32 compat_mode_t;
-typedef u32 compat_ino_t;
-typedef u32 compat_dev_t;
-typedef s32 compat_off_t;
-typedef s64 compat_loff_t;
-typedef u32 compat_nlink_t;
-typedef s32 compat_ipc_pid_t;
-typedef s32 compat_daddr_t;
-typedef s32 compat_caddr_t;
-typedef struct {
- s32 val[2];
-} compat_fsid_t;
-
-typedef s32 compat_int_t;
-typedef s32 compat_long_t;
-typedef u32 compat_uint_t;
-typedef u32 compat_ulong_t;
-
-struct compat_timespec {
- compat_time_t tv_sec;
- s32 tv_nsec;
-};
-
-struct compat_timeval {
- compat_time_t tv_sec;
- s32 tv_usec;
-};
-
-struct compat_stat {
- compat_dev_t st_dev;
- s32 st_pad1[3];
- compat_ino_t st_ino;
- compat_mode_t st_mode;
- compat_nlink_t st_nlink;
- compat_uid_t st_uid;
- compat_gid_t st_gid;
- compat_dev_t st_rdev;
- s32 st_pad2[2];
- compat_off_t st_size;
- s32 st_pad3;
- compat_time_t st_atime;
- s32 st_atime_nsec;
- compat_time_t st_mtime;
- s32 st_mtime_nsec;
- compat_time_t st_ctime;
- s32 st_ctime_nsec;
- s32 st_blksize;
- s32 st_blocks;
- s32 st_pad4[14];
-};
-
-struct compat_flock {
- short l_type;
- short l_whence;
- compat_off_t l_start;
- compat_off_t l_len;
- s32 l_sysid;
- compat_pid_t l_pid;
- short __unused;
- s32 pad[4];
-};
-
-#define F_GETLK64 33
-#define F_SETLK64 34
-#define F_SETLKW64 35
-
-struct compat_flock64 {
- short l_type;
- short l_whence;
- compat_loff_t l_start;
- compat_loff_t l_len;
- compat_pid_t l_pid;
-};
-
-struct compat_statfs {
- int f_type;
- int f_bsize;
- int f_frsize;
- int f_blocks;
- int f_bfree;
- int f_files;
- int f_ffree;
- int f_bavail;
- compat_fsid_t f_fsid;
- int f_namelen;
- int f_spare[6];
-};
-
-#define COMPAT_RLIM_INFINITY 0x7fffffffUL
-
-typedef u32 compat_old_sigset_t; /* at least 32 bits */
-
-#define _COMPAT_NSIG 128 /* Don't ask !$@#% ... */
-#define _COMPAT_NSIG_BPW 32
-
-typedef u32 compat_sigset_word;
-
-#define COMPAT_OFF_T_MAX 0x7fffffff
-#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
-
-/*
- * A pointer passed in from user mode. This should not
- * be used for syscall parameters, just declare them
- * as pointers because the syscall entry code will have
- * appropriately comverted them already.
- */
-typedef u32 compat_uptr_t;
-
-static inline void *compat_ptr(compat_uptr_t uptr)
-{
- return (void *)(long)uptr;
-}
-
-static inline void *compat_alloc_user_space(long len)
-{
- unsigned long sp = (unsigned long) current_thread_info() +
- KERNEL_STACK_SIZE - 32;
-
- return (void *) (sp - len);
-}
-
-#endif /* _ASM_COMPAT_H */
diff -Nru a/include/asm-mips64/cpu.h b/include/asm-mips64/cpu.h
--- a/include/asm-mips64/cpu.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,211 +0,0 @@
-/*
- * cpu.h: Values of the PRId register used to match up
- * various MIPS cpu types.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- */
-#ifndef _ASM_CPU_H
-#define _ASM_CPU_H
-
-#include <linux/cpu.h>
-
-/* Assigned Company values for bits 23:16 of the PRId Register
- (CP0 register 15, select 0). As of the MIPS32 and MIPS64 specs from
- MTI, the PRId register is defined in this (backwards compatible)
- way:
-
- +----------------+----------------+----------------+----------------+
- | Company Options| Company ID | Processor ID | Revision |
- +----------------+----------------+----------------+----------------+
- 31 24 23 16 15 8 7
-
- I don't have docs for all the previous processors, but my impression is
- that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
- spec.
-*/
-
-#define PRID_COMP_LEGACY 0x000000
-#define PRID_COMP_MIPS 0x010000
-#define PRID_COMP_BROADCOM 0x020000
-#define PRID_COMP_ALCHEMY 0x030000
-#define PRID_COMP_SIBYTE 0x040000
-#define PRID_COMP_SANDCRAFT 0x050000
-
-/*
- * Assigned values for the product ID register. In order to detect a
- * certain CPU type exactly eventually additional registers may need to
- * be examined. These are valid when 23:16 == PRID_COMP_LEGACY
- */
-#define PRID_IMP_R2000 0x0100
-#define PRID_IMP_AU1_REV1 0x0100
-#define PRID_IMP_AU1_REV2 0x0200
-#define PRID_IMP_R3000 0x0200 /* Same as R2000A */
-#define PRID_IMP_R6000 0x0300 /* Same as R3000A */
-#define PRID_IMP_R4000 0x0400
-#define PRID_IMP_R6000A 0x0600
-#define PRID_IMP_R10000 0x0900
-#define PRID_IMP_R4300 0x0b00
-#define PRID_IMP_VR41XX 0x0c00
-#define PRID_IMP_R12000 0x0e00
-#define PRID_IMP_R8000 0x1000
-#define PRID_IMP_R4600 0x2000
-#define PRID_IMP_R4700 0x2100
-#define PRID_IMP_TX39 0x2200
-#define PRID_IMP_R4640 0x2200
-#define PRID_IMP_R4650 0x2200 /* Same as R4640 */
-#define PRID_IMP_R5000 0x2300
-#define PRID_IMP_TX49 0x2d00
-#define PRID_IMP_SONIC 0x2400
-#define PRID_IMP_MAGIC 0x2500
-#define PRID_IMP_RM7000 0x2700
-#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
-#define PRID_IMP_R5432 0x5400
-#define PRID_IMP_R5500 0x5500
-#define PRID_IMP_4KC 0x8000
-#define PRID_IMP_5KC 0x8100
-#define PRID_IMP_20KC 0x8200
-#define PRID_IMP_4KEC 0x8400
-#define PRID_IMP_4KSC 0x8600
-
-
-#define PRID_IMP_UNKNOWN 0xff00
-
-/*
- * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
- */
-
-#define PRID_IMP_SB1 0x0100
-
-/*
- * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
- */
-
-#define PRID_IMP_SR71000 0x0400
-
-/*
- * Definitions for 7:0 on legacy processors
- */
-
-
-#define PRID_REV_TX4927 0x0022
-#define PRID_REV_TX4937 0x0030
-#define PRID_REV_R4400 0x0040
-#define PRID_REV_R3000A 0x0030
-#define PRID_REV_R3000 0x0020
-#define PRID_REV_R2000A 0x0010
-#define PRID_REV_TX3912 0x0010
-#define PRID_REV_TX3922 0x0030
-#define PRID_REV_TX3927 0x0040
-#define PRID_REV_VR4111 0x0050
-#define PRID_REV_VR4181 0x0050 /* Same as VR4111 */
-#define PRID_REV_VR4121 0x0060
-#define PRID_REV_VR4122 0x0070
-#define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */
-#define PRID_REV_VR4131 0x0080
-
-/*
- * FPU implementation/revision register (CP1 control register 0).
- *
- * +---------------------------------+----------------+----------------+
- * | 0 | Implementation | Revision |
- * +---------------------------------+----------------+----------------+
- * 31 16 15 8 7 0
- */
-
-#define FPIR_IMP_NONE 0x0000
-
-#define CPU_UNKNOWN 0
-#define CPU_R2000 1
-#define CPU_R3000 2
-#define CPU_R3000A 3
-#define CPU_R3041 4
-#define CPU_R3051 5
-#define CPU_R3052 6
-#define CPU_R3081 7
-#define CPU_R3081E 8
-#define CPU_R4000PC 9
-#define CPU_R4000SC 10
-#define CPU_R4000MC 11
-#define CPU_R4200 12
-#define CPU_R4400PC 13
-#define CPU_R4400SC 14
-#define CPU_R4400MC 15
-#define CPU_R4600 16
-#define CPU_R6000 17
-#define CPU_R6000A 18
-#define CPU_R8000 19
-#define CPU_R10000 20
-#define CPU_R12000 21
-#define CPU_R4300 22
-#define CPU_R4650 23
-#define CPU_R4700 24
-#define CPU_R5000 25
-#define CPU_R5000A 26
-#define CPU_R4640 27
-#define CPU_NEVADA 28
-#define CPU_RM7000 29
-#define CPU_R5432 30
-#define CPU_4KC 31
-#define CPU_5KC 32
-#define CPU_R4310 33
-#define CPU_SB1 34
-#define CPU_TX3912 35
-#define CPU_TX3922 36
-#define CPU_TX3927 37
-#define CPU_AU1000 38
-#define CPU_4KEC 39
-#define CPU_4KSC 40
-#define CPU_VR41XX 41
-#define CPU_R5500 42
-#define CPU_TX49XX 43
-#define CPU_AU1500 44
-#define CPU_20KC 45
-#define CPU_VR4111 46
-#define CPU_VR4121 47
-#define CPU_VR4122 48
-#define CPU_VR4131 49
-#define CPU_VR4181 50
-#define CPU_VR4181A 51
-#define CPU_AU1100 52
-#define CPU_SR71000 53
-#define CPU_LAST 53
-
-/*
- * ISA Level encodings
- *
- */
-#define MIPS_CPU_ISA_I 0x00000001
-#define MIPS_CPU_ISA_II 0x00000002
-#define MIPS_CPU_ISA_III 0x00008003
-#define MIPS_CPU_ISA_IV 0x00008004
-#define MIPS_CPU_ISA_V 0x00008005
-#define MIPS_CPU_ISA_M32 0x00000020
-#define MIPS_CPU_ISA_M64 0x00008040
-
-/*
- * Bit 15 encodes if an ISA level supports 64-bit operations.
- */
-#define MIPS_CPU_ISA_64BIT 0x00008000
-
-/*
- * CPU Option encodings
- */
-#define MIPS_CPU_TLB 0x00000001 /* CPU has TLB */
-/* Leave a spare bit for variant MMU types... */
-#define MIPS_CPU_4KEX 0x00000004 /* "R4K" exception model */
-#define MIPS_CPU_4KTLB 0x00000008 /* "R4K" TLB handler */
-#define MIPS_CPU_FPU 0x00000010 /* CPU has FPU */
-#define MIPS_CPU_32FPR 0x00000020 /* 32 dbl. prec. FP registers */
-#define MIPS_CPU_COUNTER 0x00000040 /* Cycle count/compare */
-#define MIPS_CPU_WATCH 0x00000080 /* watchpoint registers */
-#define MIPS_CPU_MIPS16 0x00000100 /* code compression */
-#define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */
-#define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */
-#define MIPS_CPU_CACHE_CDEX 0x00000800 /* Create_Dirty_Exclusive CACHE op */
-#define MIPS_CPU_MCHECK 0x00001000 /* Machine check exception */
-#define MIPS_CPU_EJTAG 0x00002000 /* EJTAG exception */
-#define MIPS_CPU_NOFPUEX 0x00000000 /* no FPU exception; never set */
-#define MIPS_CPU_LLSC 0x00008000 /* CPU has ll/sc instructions */
-#define MIPS_CPU_SUBSET_CACHES 0x00010000 /* P-cache subset enforced */
-
-#endif /* _ASM_CPU_H */
diff -Nru a/include/asm-mips64/current.h b/include/asm-mips64/current.h
--- a/include/asm-mips64/current.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,23 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 2002 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_CURRENT_H
-#define _ASM_CURRENT_H
-
-#include <linux/thread_info.h>
-
-struct task_struct;
-
-static inline struct task_struct * get_current(void)
-{
- return current_thread_info()->task;
-}
-
-#define current get_current()
-
-#endif /* _ASM_CURRENT_H */
diff -Nru a/include/asm-mips64/dec/ecc.h b/include/asm-mips64/dec/ecc.h
--- a/include/asm-mips64/dec/ecc.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,51 +0,0 @@
-/*
- * include/asm-mips/dec/ecc.h
- *
- * ECC handling logic definitions common to DECstation/DECsystem
- * 5000/200 (KN02), 5000/240 (KN03), 5000/260 (KN05) and
- * DECsystem 5900 (KN03), 5900/260 (KN05) systems.
- *
- * Copyright (C) 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS_DEC_ECC_H
-#define __ASM_MIPS_DEC_ECC_H
-
-/*
- * Error Address Register bits.
- * The register is r/wc -- any write clears it.
- */
-#define KN0X_EAR_VALID (1<<31) /* error data valid, bus IRQ */
-#define KN0X_EAR_CPU (1<<30) /* CPU/DMA transaction */
-#define KN0X_EAR_WRITE (1<<29) /* write/read transaction */
-#define KN0X_EAR_ECCERR (1<<28) /* ECC/timeout or overrun */
-#define KN0X_EAR_RES_27 (1<<27) /* unused */
-#define KN0X_EAR_ADDRESS (0x7ffffff<<0) /* address involved */
-
-/*
- * Error Syndrome Register bits.
- * The register is frozen when EAR.VALID is set, otherwise it records bits
- * from the last memory read. The register is r/wc -- any write clears it.
- */
-#define KN0X_ESR_VLDHI (1<<31) /* error data valid hi word */
-#define KN0X_ESR_CHKHI (0x7f<<24) /* check bits read from mem */
-#define KN0X_ESR_SNGHI (1<<23) /* single/double bit error */
-#define KN0X_ESR_SYNHI (0x7f<<16) /* syndrome from ECC logic */
-#define KN0X_ESR_VLDLO (1<<15) /* error data valid lo word */
-#define KN0X_ESR_CHKLO (0x7f<<8) /* check bits read from mem */
-#define KN0X_ESR_SNGLO (1<<7) /* single/double bit error */
-#define KN0X_ESR_SYNLO (0x7f<<0) /* syndrome from ECC logic */
-
-
-#ifndef __ASSEMBLY__
-struct pt_regs;
-extern void dec_ecc_be_init(void);
-extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
-extern void dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-#endif
-
-#endif /* __ASM_MIPS_DEC_ECC_H */
diff -Nru a/include/asm-mips64/dec/interrupts.h b/include/asm-mips64/dec/interrupts.h
--- a/include/asm-mips64/dec/interrupts.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,125 +0,0 @@
-/*
- * Miscellaneous definitions used to initialise the interrupt vector table
- * with the machine-specific interrupt routines.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997 by Paul M. Antoine.
- * reworked 1998 by Harald Koerfgen.
- * Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki
- */
-
-#ifndef __ASM_DEC_INTERRUPTS_H
-#define __ASM_DEC_INTERRUPTS_H
-
-#include <asm/mipsregs.h>
-
-
-/*
- * The list of possible system devices which provide an
- * interrupt. Not all devices exist on a given system.
- */
-#define DEC_IRQ_CASCADE 0 /* cascade from CSR or I/O ASIC */
-
-/* Ordinary interrupts */
-#define DEC_IRQ_AB_RECV 1 /* ACCESS.bus receive */
-#define DEC_IRQ_AB_XMIT 2 /* ACCESS.bus transmit */
-#define DEC_IRQ_DZ11 3 /* DZ11 (DC7085) serial */
-#define DEC_IRQ_ASC 4 /* ASC (NCR53C94) SCSI */
-#define DEC_IRQ_FLOPPY 5 /* 82077 FDC */
-#define DEC_IRQ_FPU 6 /* R3k FPU */
-#define DEC_IRQ_HALT 7 /* HALT button or from ACCESS.Bus */
-#define DEC_IRQ_ISDN 8 /* Am79C30A ISDN */
-#define DEC_IRQ_LANCE 9 /* LANCE (Am7990) Ethernet */
-#define DEC_IRQ_BUS 10 /* memory, I/O bus read/write errors */
-#define DEC_IRQ_PSU 11 /* power supply unit warning */
-#define DEC_IRQ_RTC 12 /* DS1287 RTC */
-#define DEC_IRQ_SCC0 13 /* SCC (Z85C30) serial #0 */
-#define DEC_IRQ_SCC1 14 /* SCC (Z85C30) serial #1 */
-#define DEC_IRQ_SII 15 /* SII (DC7061) SCSI */
-#define DEC_IRQ_TC0 16 /* TURBOchannel slot #0 */
-#define DEC_IRQ_TC1 17 /* TURBOchannel slot #1 */
-#define DEC_IRQ_TC2 18 /* TURBOchannel slot #2 */
-#define DEC_IRQ_TIMER 19 /* ARC periodic timer */
-#define DEC_IRQ_VIDEO 20 /* framebuffer */
-
-/* I/O ASIC DMA interrupts */
-#define DEC_IRQ_ASC_MERR 21 /* ASC memory read error */
-#define DEC_IRQ_ASC_ERR 22 /* ASC page overrun */
-#define DEC_IRQ_ASC_DMA 23 /* ASC buffer pointer loaded */
-#define DEC_IRQ_FLOPPY_ERR 24 /* FDC error */
-#define DEC_IRQ_ISDN_ERR 25 /* ISDN memory read/overrun error */
-#define DEC_IRQ_ISDN_RXDMA 26 /* ISDN recv buffer pointer loaded */
-#define DEC_IRQ_ISDN_TXDMA 27 /* ISDN xmit buffer pointer loaded */
-#define DEC_IRQ_LANCE_MERR 28 /* LANCE memory read error */
-#define DEC_IRQ_SCC0A_RXERR 29 /* SCC0A (printer) receive overrun */
-#define DEC_IRQ_SCC0A_RXDMA 30 /* SCC0A receive half page */
-#define DEC_IRQ_SCC0A_TXERR 31 /* SCC0A xmit memory read/overrun */
-#define DEC_IRQ_SCC0A_TXDMA 32 /* SCC0A transmit page end */
-#define DEC_IRQ_AB_RXERR 33 /* ACCESS.bus receive overrun */
-#define DEC_IRQ_AB_RXDMA 34 /* ACCESS.bus receive half page */
-#define DEC_IRQ_AB_TXERR 35 /* ACCESS.bus xmit memory read/ovrn */
-#define DEC_IRQ_AB_TXDMA 36 /* ACCESS.bus transmit page end */
-#define DEC_IRQ_SCC1A_RXERR 37 /* SCC1A (modem) receive overrun */
-#define DEC_IRQ_SCC1A_RXDMA 38 /* SCC1A receive half page */
-#define DEC_IRQ_SCC1A_TXERR 39 /* SCC1A xmit memory read/overrun */
-#define DEC_IRQ_SCC1A_TXDMA 40 /* SCC1A transmit page end */
-
-/* TC5 & TC6 are virtual slots for KN02's onboard devices */
-#define DEC_IRQ_TC5 DEC_IRQ_ASC /* virtual PMAZ-AA */
-#define DEC_IRQ_TC6 DEC_IRQ_LANCE /* virtual PMAD-AA */
-
-#define DEC_NR_INTS 41
-
-
-/* Largest of cpu mask_nr tables. */
-#define DEC_MAX_CPU_INTS 6
-/* Largest of asic mask_nr tables. */
-#define DEC_MAX_ASIC_INTS 9
-
-
-/*
- * CPU interrupt bits common to all systems.
- */
-#define DEC_CPU_INR_FPU 7 /* R3k FPU */
-#define DEC_CPU_INR_SW1 1 /* software #1 */
-#define DEC_CPU_INR_SW0 0 /* software #0 */
-
-#define DEC_CPU_IRQ_BASE 0 /* first IRQ assigned to CPU */
-
-#define DEC_CPU_IRQ_NR(n) ((n) + DEC_CPU_IRQ_BASE)
-#define DEC_CPU_IRQ_MASK(n) (1 << ((n) + CAUSEB_IP))
-#define DEC_CPU_IRQ_ALL (0xff << CAUSEB_IP)
-
-
-#ifndef __ASSEMBLY__
-
-/*
- * Interrupt table structures to hide differences between systems.
- */
-typedef union { int i; void *p; } int_ptr;
-extern int dec_interrupt[DEC_NR_INTS];
-extern int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2];
-extern int_ptr asic_mask_nr_tbl[DEC_MAX_ASIC_INTS][2];
-extern int cpu_fpu_mask;
-
-
-/*
- * Common interrupt routine prototypes for all DECStations
- */
-extern void kn02_io_int(void);
-extern void kn02xa_io_int(void);
-extern void kn03_io_int(void);
-extern void asic_dma_int(void);
-extern void asic_all_int(void);
-extern void kn02_all_int(void);
-extern void cpu_all_int(void);
-
-extern void dec_intr_unimplemented(void);
-extern void asic_intr_unimplemented(void);
-
-#endif /* __ASSEMBLY__ */
-
-#endif
diff -Nru a/include/asm-mips64/dec/io.h b/include/asm-mips64/dec/io.h
--- a/include/asm-mips64/dec/io.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,20 +0,0 @@
-/*
- * include/asm-mips64/dec/io.h
- *
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS64_DEC_IO_H
-#define __ASM_MIPS64_DEC_IO_H
-
-#include <asm/addrspace.h>
-
-#define IO_SPACE_BASE K1BASE
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#endif /* __ASM_MIPS64_DEC_IO_H */
diff -Nru a/include/asm-mips64/dec/ioasic.h b/include/asm-mips64/dec/ioasic.h
--- a/include/asm-mips64/dec/ioasic.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,36 +0,0 @@
-/*
- * include/asm-mips/dec/ioasic.h
- *
- * DEC I/O ASIC access operations.
- *
- * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef __ASM_DEC_IOASIC_H
-#define __ASM_DEC_IOASIC_H
-
-#include <linux/spinlock.h>
-#include <linux/types.h>
-
-extern spinlock_t ioasic_ssr_lock;
-
-extern volatile u32 *ioasic_base;
-
-static inline void ioasic_write(unsigned int reg, u32 v)
-{
- ioasic_base[reg / 4] = v;
-}
-
-static inline u32 ioasic_read(unsigned int reg)
-{
- return ioasic_base[reg / 4];
-}
-
-extern void init_ioasic_irqs(int base);
-
-#endif /* __ASM_DEC_IOASIC_H */
diff -Nru a/include/asm-mips64/dec/ioasic_addrs.h b/include/asm-mips64/dec/ioasic_addrs.h
--- a/include/asm-mips64/dec/ioasic_addrs.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,151 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Definitions for the address map in the JUNKIO Asic
- *
- * Created with Information from:
- *
- * "DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual"
- *
- * and the Mach Sources
- *
- * Copyright (C) 199x the Anonymous
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- */
-
-#ifndef __ASM_MIPS_DEC_IOASIC_ADDRS_H
-#define __ASM_MIPS_DEC_IOASIC_ADDRS_H
-
-#define IOASIC_SLOT_SIZE 0x00040000
-
-/*
- * Address ranges decoded by the I/O ASIC for onboard devices.
- */
-#define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE) /* system board ROM */
-#define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
-#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
-#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
-#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE) /* SCC #0 */
-#define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE) /* VDAC (maxine) */
-#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE) /* SCC #1 (3min, 3max+) */
-#define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE) /* VDAC (maxine) */
-#define IOASIC_TOY (8*IOASIC_SLOT_SIZE) /* RTC */
-#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE) /* ISDN (maxine) */
-#define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE) /* bus error address (3max+) */
-#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE) /* ECC syndrome (3max+) */
-#define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE) /* ACCESS.bus (maxine) */
-#define IOASIC_MCR (11*IOASIC_SLOT_SIZE) /* memory control (3max+) */
-#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE) /* FDC (maxine) */
-#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */
-#define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE) /* FDC DMA (maxine) */
-#define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE) /* ??? */
-#define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */
-
-
-/*
- * Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)).
- */
- /* all systems */
-#define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */
-#define IO_REG_SCSI_DMA_BP 0x10 /* SCSI DMA Buffer Pointer */
-#define IO_REG_LANCE_DMA_P 0x20 /* LANCE DMA Pointer */
-#define IO_REG_SCC0A_T_DMA_P 0x30 /* SCC0A Transmit DMA Pointer */
-#define IO_REG_SCC0A_R_DMA_P 0x40 /* SCC0A Receive DMA Pointer */
-
- /* except Maxine */
-#define IO_REG_SCC1A_T_DMA_P 0x50 /* SCC1A Transmit DMA Pointer */
-#define IO_REG_SCC1A_R_DMA_P 0x60 /* SCC1A Receive DMA Pointer */
-
- /* Maxine */
-#define IO_REG_AB_T_DMA_P 0x50 /* ACCESS.bus Transmit DMA Pointer */
-#define IO_REG_AB_R_DMA_P 0x60 /* ACCESS.bus Receive DMA Pointer */
-#define IO_REG_FLOPPY_DMA_P 0x70 /* Floppy DMA Pointer */
-#define IO_REG_ISDN_T_DMA_P 0x80 /* ISDN Transmit DMA Pointer */
-#define IO_REG_ISDN_T_DMA_BP 0x90 /* ISDN Transmit DMA Buffer Pointer */
-#define IO_REG_ISDN_R_DMA_P 0xa0 /* ISDN Receive DMA Pointer */
-#define IO_REG_ISDN_R_DMA_BP 0xb0 /* ISDN Receive DMA Buffer Pointer */
-
- /* all systems */
-#define IO_REG_DATA_0 0xc0 /* System Data Buffer 0 */
-#define IO_REG_DATA_1 0xd0 /* System Data Buffer 1 */
-#define IO_REG_DATA_2 0xe0 /* System Data Buffer 2 */
-#define IO_REG_DATA_3 0xf0 /* System Data Buffer 3 */
-
- /* all systems */
-#define IO_REG_SSR 0x100 /* System Support Register */
-#define IO_REG_SIR 0x110 /* System Interrupt Register */
-#define IO_REG_SIMR 0x120 /* System Interrupt Mask Reg. */
-#define IO_REG_SAR 0x130 /* System Address Register */
-
- /* Maxine */
-#define IO_REG_ISDN_T_DATA 0x140 /* ISDN Xmit Data Register */
-#define IO_REG_ISDN_R_DATA 0x150 /* ISDN Receive Data Register */
-
- /* all systems */
-#define IO_REG_LANCE_SLOT 0x160 /* LANCE I/O Slot Register */
-#define IO_REG_SCSI_SLOT 0x170 /* SCSI Slot Register */
-#define IO_REG_SCC0A_SLOT 0x180 /* SCC0A DMA Slot Register */
-
- /* except Maxine */
-#define IO_REG_SCC1A_SLOT 0x190 /* SCC1A DMA Slot Register */
-
- /* Maxine */
-#define IO_REG_AB_SLOT 0x190 /* ACCESS.bus DMA Slot Register */
-#define IO_REG_FLOPPY_SLOT 0x1a0 /* Floppy Slot Register */
-
- /* all systems */
-#define IO_REG_SCSI_SCR 0x1b0 /* SCSI Partial-Word DMA Control */
-#define IO_REG_SCSI_SDR0 0x1c0 /* SCSI DMA Partial Word 0 */
-#define IO_REG_SCSI_SDR1 0x1d0 /* SCSI DMA Partial Word 1 */
-#define IO_REG_FCTR 0x1e0 /* Free-Running Counter */
-#define IO_REG_RES_31 0x1f0 /* unused */
-
-
-/*
- * The upper 16 bits of the System Support Register are a part of the
- * I/O ASIC's internal DMA engine and thus are common to all I/O ASIC
- * machines. The exception is the Maxine, which makes use of the
- * FLOPPY and ISDN bits (otherwise unused) and has a different SCC
- * wiring.
- */
- /* all systems */
-#define IO_SSR_SCC0A_TX_DMA_EN (1<<31) /* SCC0A transmit DMA enable */
-#define IO_SSR_SCC0A_RX_DMA_EN (1<<30) /* SCC0A receive DMA enable */
-#define IO_SSR_RES_27 (1<<27) /* unused */
-#define IO_SSR_RES_26 (1<<26) /* unused */
-#define IO_SSR_RES_25 (1<<25) /* unused */
-#define IO_SSR_RES_24 (1<<24) /* unused */
-#define IO_SSR_RES_23 (1<<23) /* unused */
-#define IO_SSR_SCSI_DMA_DIR (1<<18) /* SCSI DMA direction */
-#define IO_SSR_SCSI_DMA_EN (1<<17) /* SCSI DMA enable */
-#define IO_SSR_LANCE_DMA_EN (1<<16) /* LANCE DMA enable */
-
- /* except Maxine */
-#define IO_SSR_SCC1A_TX_DMA_EN (1<<29) /* SCC1A transmit DMA enable */
-#define IO_SSR_SCC1A_RX_DMA_EN (1<<28) /* SCC1A receive DMA enable */
-#define IO_SSR_RES_22 (1<<22) /* unused */
-#define IO_SSR_RES_21 (1<<21) /* unused */
-#define IO_SSR_RES_20 (1<<20) /* unused */
-#define IO_SSR_RES_19 (1<<19) /* unused */
-
- /* Maxine */
-#define IO_SSR_AB_TX_DMA_EN (1<<29) /* ACCESS.bus xmit DMA enable */
-#define IO_SSR_AB_RX_DMA_EN (1<<28) /* ACCESS.bus recv DMA enable */
-#define IO_SSR_FLOPPY_DMA_DIR (1<<22) /* Floppy DMA direction */
-#define IO_SSR_FLOPPY_DMA_EN (1<<21) /* Floppy DMA enable */
-#define IO_SSR_ISDN_TX_DMA_EN (1<<20) /* ISDN transmit DMA enable */
-#define IO_SSR_ISDN_RX_DMA_EN (1<<19) /* ISDN receive DMA enable */
-
-/*
- * The lower 16 bits are system-specific. Bits 15,11:8 are common and
- * defined here. The rest is defined in system-specific headers.
- */
-#define KN0X_IO_SSR_DIAGDN (1<<15) /* diagnostic jumper */
-#define KN0X_IO_SSR_SCC_RST (1<<11) /* ~SCC0,1 (Z85C30) reset */
-#define KN0X_IO_SSR_RTC_RST (1<<10) /* ~RTC (DS1287) reset */
-#define KN0X_IO_SSR_ASC_RST (1<<9) /* ~ASC (NCR53C94) reset */
-#define KN0X_IO_SSR_LANCE_RST (1<<8) /* ~LANCE (Am7990) reset */
-
-#endif /* __ASM_MIPS_DEC_IOASIC_ADDRS_H */
diff -Nru a/include/asm-mips64/dec/ioasic_ints.h b/include/asm-mips64/dec/ioasic_ints.h
--- a/include/asm-mips64/dec/ioasic_ints.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,74 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Definitions for the interrupt related bits in the I/O ASIC
- * interrupt status register (and the interrupt mask register, of course)
- *
- * Created with Information from:
- *
- * "DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual"
- *
- * and the Mach Sources
- *
- * Copyright (C) 199x the Anonymous
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-
-#ifndef __ASM_DEC_IOASIC_INTS_H
-#define __ASM_DEC_IOASIC_INTS_H
-
-/*
- * The upper 16 bits are a part of the I/O ASIC's internal DMA engine
- * and thus are common to all I/O ASIC machines. The exception is
- * the Maxine, which makes use of the FLOPPY and ISDN bits (otherwise
- * unused) and has a different SCC wiring.
- */
- /* all systems */
-#define IO_INR_SCC0A_TXDMA 31 /* SCC0A transmit page end */
-#define IO_INR_SCC0A_TXERR 30 /* SCC0A transmit memory read error */
-#define IO_INR_SCC0A_RXDMA 29 /* SCC0A receive half page */
-#define IO_INR_SCC0A_RXERR 28 /* SCC0A receive overrun */
-#define IO_INR_ASC_DMA 19 /* ASC buffer pointer loaded */
-#define IO_INR_ASC_ERR 18 /* ASC page overrun */
-#define IO_INR_ASC_MERR 17 /* ASC memory read error */
-#define IO_INR_LANCE_MERR 16 /* LANCE memory read error */
-
- /* except Maxine */
-#define IO_INR_SCC1A_TXDMA 27 /* SCC1A transmit page end */
-#define IO_INR_SCC1A_TXERR 26 /* SCC1A transmit memory read error */
-#define IO_INR_SCC1A_RXDMA 25 /* SCC1A receive half page */
-#define IO_INR_SCC1A_RXERR 24 /* SCC1A receive overrun */
-#define IO_INR_RES_23 23 /* unused */
-#define IO_INR_RES_22 22 /* unused */
-#define IO_INR_RES_21 21 /* unused */
-#define IO_INR_RES_20 20 /* unused */
-
- /* Maxine */
-#define IO_INR_AB_TXDMA 27 /* ACCESS.bus transmit page end */
-#define IO_INR_AB_TXERR 26 /* ACCESS.bus xmit memory read error */
-#define IO_INR_AB_RXDMA 25 /* ACCESS.bus receive half page */
-#define IO_INR_AB_RXERR 24 /* ACCESS.bus receive overrun */
-#define IO_INR_FLOPPY_ERR 23 /* FDC error */
-#define IO_INR_ISDN_TXDMA 22 /* ISDN xmit buffer pointer loaded */
-#define IO_INR_ISDN_RXDMA 21 /* ISDN recv buffer pointer loaded */
-#define IO_INR_ISDN_ERR 20 /* ISDN memory read/overrun error */
-
-#define IO_INR_DMA 16 /* first DMA IRQ */
-
-/*
- * The lower 16 bits are system-specific and thus defined in
- * system-specific headers.
- */
-
-
-#define IO_IRQ_BASE 8 /* first IRQ assigned to I/O ASIC */
-#define IO_IRQ_LINES 32 /* number of I/O ASIC interrupts */
-
-#define IO_IRQ_NR(n) ((n) + IO_IRQ_BASE)
-#define IO_IRQ_MASK(n) (1 << (n))
-#define IO_IRQ_ALL 0x0000ffff
-#define IO_IRQ_DMA 0xffff0000
-
-#endif /* __ASM_DEC_IOASIC_INTS_H */
diff -Nru a/include/asm-mips64/dec/kn01.h b/include/asm-mips64/dec/kn01.h
--- a/include/asm-mips64/dec/kn01.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,83 +0,0 @@
-/*
- * Hardware info about DECstation DS2100/3100 systems (otherwise known as
- * pmin/pmax or KN01).
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
- * are by courtesy of Chris Fraser.
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- */
-#ifndef __ASM_MIPS_DEC_KN01_H
-#define __ASM_MIPS_DEC_KN01_H
-
-#include <asm/addrspace.h>
-
-#define KN01_SLOT_BASE KSEG1ADDR(0x10000000)
-#define KN01_SLOT_SIZE 0x01000000
-
-/*
- * Address ranges for devices.
- */
-#define KN01_PMASK (0*KN01_SLOT_SIZE) /* color plane mask */
-#define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */
-#define KN01_VDAC (2*KN01_SLOT_SIZE) /* color map */
-#define KN01_RES_3 (3*KN01_SLOT_SIZE) /* unused */
-#define KN01_RES_4 (4*KN01_SLOT_SIZE) /* unused */
-#define KN01_RES_5 (5*KN01_SLOT_SIZE) /* unused */
-#define KN01_RES_6 (6*KN01_SLOT_SIZE) /* unused */
-#define KN01_ERRADDR (7*KN01_SLOT_SIZE) /* write error address */
-#define KN01_LANCE (8*KN01_SLOT_SIZE) /* LANCE (Am7990) Ethernet */
-#define KN01_LANCE_MEM (9*KN01_SLOT_SIZE) /* LANCE buffer memory */
-#define KN01_SII (10*KN01_SLOT_SIZE) /* SII (DC7061) SCSI */
-#define KN01_SII_MEM (11*KN01_SLOT_SIZE) /* SII buffer memory */
-#define KN01_DZ11 (12*KN01_SLOT_SIZE) /* DZ11 (DC7085) serial */
-#define KN01_RTC (13*KN01_SLOT_SIZE) /* DS1287 RTC (bytes #0) */
-#define KN01_ESAR (13*KN01_SLOT_SIZE) /* MAC address (bytes #1) */
-#define KN01_CSR (14*KN01_SLOT_SIZE) /* system ctrl & status reg */
-#define KN01_SYS_ROM (15*KN01_SLOT_SIZE) /* system board ROM */
-
-
-/*
- * Some port addresses...
- */
-#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */
-#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */
-#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */
-
-
-/*
- * Frame buffer memory address.
- */
-#define KN01_VFB_MEM KSEG1ADDR(0x0fc00000)
-
-/*
- * CPU interrupt bits.
- */
-#define KN01_CPU_INR_BUS 6 /* memory, I/O bus read/write errors */
-#define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */
-#define KN01_CPU_INR_RTC 5 /* DS1287 RTC */
-#define KN01_CPU_INR_DZ11 4 /* DZ11 (DC7085) serial */
-#define KN01_CPU_INR_LANCE 3 /* LANCE (Am7990) Ethernet */
-#define KN01_CPU_INR_SII 2 /* SII (DC7061) SCSI */
-
-
-/*
- * System Control & Status Register bits.
- */
-#define KN01_CSR_MNFMOD (1<<15) /* MNFMOD manufacturing jumper */
-#define KN01_CSR_STATUS (1<<14) /* self-test result status output */
-#define KN01_CSR_PARDIS (1<<13) /* parity error disable */
-#define KN01_CSR_CRSRTST (1<<12) /* PCC test output */
-#define KN01_CSR_MONO (1<<11) /* mono/color fb SIMM installed */
-#define KN01_CSR_MEMERR (1<<10) /* write timeout error status & ack*/
-#define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */
-#define KN01_CSR_TXDIS (1<<8) /* DZ11 transmit disable */
-#define KN01_CSR_VBGTRG (1<<2) /* blue DAC voltage over green (r/o) */
-#define KN01_CSR_VRGTRG (1<<1) /* red DAC voltage over green (r/o) */
-#define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */
-#define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
-
-#endif /* __ASM_MIPS_DEC_KN01_H */
diff -Nru a/include/asm-mips64/dec/kn02.h b/include/asm-mips64/dec/kn02.h
--- a/include/asm-mips64/dec/kn02.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,106 +0,0 @@
-/*
- * Hardware info about DECstation 5000/200 systems (otherwise known as
- * 3max or KN02).
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
- * are by courtesy of Chris Fraser.
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- */
-#ifndef __ASM_MIPS_DEC_KN02_H
-#define __ASM_MIPS_DEC_KN02_H
-
-#ifndef __ASSEMBLY__
-#include <linux/spinlock.h>
-#include <linux/types.h>
-#endif
-
-#include <asm/addrspace.h>
-#include <asm/dec/ecc.h>
-
-
-#define KN02_SLOT_BASE KSEG1ADDR(0x1fc00000)
-#define KN02_SLOT_SIZE 0x00080000
-
-/*
- * Address ranges decoded by the "system slot" logic for onboard devices.
- */
-#define KN02_SYS_ROM (0*KN02_SLOT_SIZE) /* system board ROM */
-#define KN02_RES_1 (1*KN02_SLOT_SIZE) /* unused */
-#define KN02_CHKSYN (2*KN02_SLOT_SIZE) /* ECC syndrome */
-#define KN02_ERRADDR (3*KN02_SLOT_SIZE) /* bus error address */
-#define KN02_DZ11 (4*KN02_SLOT_SIZE) /* DZ11 (DC7085) serial */
-#define KN02_RTC (5*KN02_SLOT_SIZE) /* DS1287 RTC */
-#define KN02_CSR (6*KN02_SLOT_SIZE) /* system ctrl & status reg */
-#define KN02_SYS_ROM_7 (7*KN02_SLOT_SIZE) /* system board ROM (alias) */
-
-
-/*
- * Some port addresses...
- */
-#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */
-#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */
-#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */
-
-
-/*
- * System Control & Status Register bits.
- */
-#define KN02_CSR_RES_28 (0xf<<28) /* unused */
-#define KN02_CSR_PSU (1<<27) /* power supply unit warning */
-#define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */
-#define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */
-#define KN03_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */
-#define KN03_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */
-#define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */
-#define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */
-#define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */
-#define KN02_CSR_LEDIAG (1<<12) /* ECC diagn. latch strobe */
-#define KN02_CSR_TXDIS (1<<11) /* DZ11 transmit disable */
-#define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */
-#define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */
-#define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */
-#define KN03_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */
-#define KN03_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
-
-
-/*
- * CPU interrupt bits.
- */
-#define KN02_CPU_INR_RES_6 6 /* unused */
-#define KN02_CPU_INR_BUS 5 /* memory, I/O bus read/write errors */
-#define KN02_CPU_INR_RES_4 4 /* unused */
-#define KN02_CPU_INR_RTC 3 /* DS1287 RTC */
-#define KN02_CPU_INR_CASCADE 2 /* CSR cascade */
-
-/*
- * CSR interrupt bits.
- */
-#define KN02_CSR_INR_DZ11 7 /* DZ11 (DC7085) serial */
-#define KN02_CSR_INR_LANCE 6 /* LANCE (Am7990) Ethernet */
-#define KN02_CSR_INR_ASC 5 /* ASC (NCR53C94) SCSI */
-#define KN02_CSR_INR_RES_4 4 /* unused */
-#define KN02_CSR_INR_RES_3 3 /* unused */
-#define KN02_CSR_INR_TC2 2 /* TURBOchannel slot #2 */
-#define KN02_CSR_INR_TC1 1 /* TURBOchannel slot #1 */
-#define KN02_CSR_INR_TC0 0 /* TURBOchannel slot #0 */
-
-
-#define KN02_IRQ_BASE 8 /* first IRQ assigned to CSR */
-#define KN02_IRQ_LINES 8 /* number of CSR interrupts */
-
-#define KN02_IRQ_NR(n) ((n) + KN02_IRQ_BASE)
-#define KN02_IRQ_MASK(n) (1 << (n))
-#define KN02_IRQ_ALL 0xff
-
-
-#ifndef __ASSEMBLY__
-extern u32 cached_kn02_csr;
-extern spinlock_t kn02_lock;
-extern void init_kn02_irqs(int base);
-#endif
-
-#endif /* __ASM_MIPS_DEC_KN02_H */
diff -Nru a/include/asm-mips64/dec/kn02ba.h b/include/asm-mips64/dec/kn02ba.h
--- a/include/asm-mips64/dec/kn02ba.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,67 +0,0 @@
-/*
- * include/asm-mips/dec/kn02ba.h
- *
- * DECstation 5000/1xx (3min or KN02-BA) definitions.
- *
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS_DEC_KN02BA_H
-#define __ASM_MIPS_DEC_KN02BA_H
-
-#include <asm/dec/kn02xa.h> /* For common definitions. */
-
-/*
- * CPU interrupt bits.
- */
-#define KN02BA_CPU_INR_HALT 6 /* HALT button */
-#define KN02BA_CPU_INR_CASCADE 5 /* I/O ASIC cascade */
-#define KN02BA_CPU_INR_TC2 4 /* TURBOchannel slot #2 */
-#define KN02BA_CPU_INR_TC1 3 /* TURBOchannel slot #1 */
-#define KN02BA_CPU_INR_TC0 2 /* TURBOchannel slot #0 */
-
-/*
- * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits.
- */
-#define KN02BA_IO_INR_RES_15 15 /* unused */
-#define KN02BA_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */
-#define KN02BA_IO_INR_RES_13 13 /* unused */
-#define KN02BA_IO_INR_BUS 12 /* memory, I/O bus read/write errors */
-#define KN02BA_IO_INR_RES_11 11 /* unused */
-#define KN02BA_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */
-#define KN02BA_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */
-#define KN02BA_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */
-#define KN02BA_IO_INR_SCC1 7 /* SCC (Z85C30) serial #1 */
-#define KN02BA_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */
-#define KN02BA_IO_INR_RTC 5 /* DS1287 RTC */
-#define KN02BA_IO_INR_PSU 4 /* power supply unit warning */
-#define KN02BA_IO_INR_RES_3 3 /* unused */
-#define KN02BA_IO_INR_ASC_DATA 2 /* SCSI data ready (for PIO) */
-#define KN02BA_IO_INR_PBNC 1 /* ~HALT button debouncer */
-#define KN02BA_IO_INR_PBNO 0 /* HALT button debouncer */
-
-
-/*
- * Memory Error Register bits.
- */
-#define KN02BA_MER_RES_27 (1<<27) /* unused */
-
-/*
- * Memory Size Register bits.
- */
-#define KN02BA_MSR_RES_17 (0x3ff<<17) /* unused */
-
-/*
- * I/O ASIC System Support Register bits.
- */
-#define KN02BA_IO_SSR_TXDIS1 (1<<14) /* SCC1 transmit disable */
-#define KN02BA_IO_SSR_TXDIS0 (1<<13) /* SCC0 transmit disable */
-#define KN02BA_IO_SSR_RES_12 (1<<12) /* unused */
-
-#define KN02BA_IO_SSR_LEDS (0xff<<0) /* ~diagnostic LEDs */
-
-#endif /* __ASM_MIPS_DEC_KN02BA_H */
diff -Nru a/include/asm-mips64/dec/kn02ca.h b/include/asm-mips64/dec/kn02ca.h
--- a/include/asm-mips64/dec/kn02ca.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,79 +0,0 @@
-/*
- * include/asm-mips/dec/kn02ca.h
- *
- * Personal DECstation 5000/xx (Maxine or KN02-CA) definitions.
- *
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS_DEC_KN02CA_H
-#define __ASM_MIPS_DEC_KN02CA_H
-
-#include <asm/dec/kn02xa.h> /* For common definitions. */
-
-/*
- * CPU interrupt bits.
- */
-#define KN02CA_CPU_INR_HALT 6 /* HALT from ACCESS.Bus */
-#define KN02CA_CPU_INR_CASCADE 5 /* I/O ASIC cascade */
-#define KN02CA_CPU_INR_BUS 4 /* memory, I/O bus read/write errors */
-#define KN02CA_CPU_INR_RTC 3 /* DS1287 RTC */
-#define KN02CA_CPU_INR_TIMER 2 /* ARC periodic timer */
-
-/*
- * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits.
- */
-#define KN02CA_IO_INR_FLOPPY 15 /* 82077 FDC */
-#define KN02CA_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */
-#define KN02CA_IO_INR_POWERON 13 /* (*) ACCESS.Bus/power-on reset */
-#define KN02CA_IO_INR_TC0 12 /* TURBOchannel slot #0 */
-#define KN02CA_IO_INR_TIMER 12 /* ARC periodic timer (?) */
-#define KN02CA_IO_INR_ISDN 11 /* Am79C30A ISDN */
-#define KN02CA_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */
-#define KN02CA_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */
-#define KN02CA_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */
-#define KN02CA_IO_INR_HDFLOPPY 7 /* (*) HD (1.44MB) floppy status */
-#define KN02CA_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */
-#define KN02CA_IO_INR_TC1 5 /* TURBOchannel slot #1 */
-#define KN02CA_IO_INR_XDFLOPPY 4 /* (*) XD (2.88MB) floppy status */
-#define KN02CA_IO_INR_VIDEO 3 /* framebuffer */
-#define KN02CA_IO_INR_XVIDEO 2 /* ~framebuffer */
-#define KN02CA_IO_INR_AB_XMIT 1 /* ACCESS.bus transmit */
-#define KN02CA_IO_INR_AB_RECV 0 /* ACCESS.bus receive */
-
-
-/*
- * Memory Error Register bits.
- */
-#define KN02CA_MER_INTR (1<<27) /* ARC IRQ status & ack */
-
-/*
- * Memory Size Register bits.
- */
-#define KN02CA_MSR_INTREN (1<<26) /* ARC periodic IRQ enable */
-#define KN02CA_MSR_MS10EN (1<<25) /* 10/1ms IRQ period select */
-#define KN02CA_MSR_PFORCE (0xf<<21) /* byte lane error force */
-#define KN02CA_MSR_MABEN (1<<20) /* A side VFB address enable */
-#define KN02CA_MSR_LASTBANK (0x7<<17) /* onboard RAM bank # */
-
-/*
- * I/O ASIC System Support Register bits.
- */
-#define KN03CA_IO_SSR_RES_14 (1<<14) /* unused */
-#define KN03CA_IO_SSR_RES_13 (1<<13) /* unused */
-#define KN03CA_IO_SSR_ISDN_RST (1<<12) /* ~ISDN (Am79C30A) reset */
-
-#define KN03CA_IO_SSR_FLOPPY_RST (1<<7) /* ~FDC (82077) reset */
-#define KN03CA_IO_SSR_VIDEO_RST (1<<6) /* ~framebuffer reset */
-#define KN03CA_IO_SSR_AB_RST (1<<5) /* ACCESS.bus reset */
-#define KN03CA_IO_SSR_RES_4 (1<<4) /* unused */
-#define KN03CA_IO_SSR_RES_3 (1<<4) /* unused */
-#define KN03CA_IO_SSR_RES_2 (1<<2) /* unused */
-#define KN03CA_IO_SSR_RES_1 (1<<1) /* unused */
-#define KN03CA_IO_SSR_LED (1<<0) /* power LED */
-
-#endif /* __ASM_MIPS_DEC_KN02CA_H */
diff -Nru a/include/asm-mips64/dec/kn02xa.h b/include/asm-mips64/dec/kn02xa.h
--- a/include/asm-mips64/dec/kn02xa.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,75 +0,0 @@
-/*
- * Hardware info common to DECstation 5000/1xx systems (otherwise
- * known as 3min or kn02ba) and Personal DECstations 5000/xx ones
- * (otherwise known as maxine or kn02ca).
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
- * are by courtesy of Chris Fraser.
- * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
- *
- * These are addresses which have to be known early in the boot process.
- * For other addresses refer to tc.h, ioasic_addrs.h and friends.
- */
-#ifndef __ASM_MIPS_DEC_KN02XA_H
-#define __ASM_MIPS_DEC_KN02XA_H
-
-#include <asm/addrspace.h>
-#include <asm/dec/ioasic_addrs.h>
-
-#define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000)
-
-/*
- * Some port addresses...
- */
-#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
-#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */
-
-
-/*
- * Memory control ASIC registers.
- */
-#define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */
-#define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */
-
-/*
- * CPU control ASIC registers.
- */
-#define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */
-#define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */
-#define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */
-#define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */
-
-/*
- * Memory Error Register bits, common definitions.
- * The rest is defined in system-specific headers.
- */
-#define KN02XA_MER_RES_28 (0xf<<28) /* unused */
-#define KN02XA_MER_RES_17 (0x3ff<<17) /* unused */
-#define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */
-#define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */
-#define KN02XA_MER_PARDIS (1<<14) /* parity error disable */
-#define KN02XA_MER_RES_12 (0x3<<12) /* unused */
-#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask */
-#define KN02XA_MER_RES_0 (0xff<<0) /* unused */
-
-/*
- * Memory Size Register bits, common definitions.
- * The rest is defined in system-specific headers.
- */
-#define KN02XA_MSR_RES_27 (0x1f<<27) /* unused */
-#define KN02XA_MSR_RES_14 (0x7<<14) /* unused */
-#define KN02XA_MSR_SIZE (1<<13) /* 16M/4M stride */
-#define KN02XA_MSR_RES_0 (0x1fff<<0) /* unused */
-
-/*
- * Error Address Register bits.
- */
-#define KN02XA_EAR_RES_29 (0x7<<29) /* unused */
-#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */
-#define KN02XA_EAR_RES_0 (0x3<<0) /* unused */
-
-#endif /* __ASM_MIPS_DEC_KN02XA_H */
diff -Nru a/include/asm-mips64/dec/kn03.h b/include/asm-mips64/dec/kn03.h
--- a/include/asm-mips64/dec/kn03.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,83 +0,0 @@
-/*
- * Hardware info about DECstation 5000/2x0 systems (otherwise known as
- * 3max+) and DECsystem 5900 systems (otherwise known as bigmax) which
- * differ mechanically but are otherwise identical (both are known as
- * KN03).
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
- * are by courtesy of Chris Fraser.
- * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
- */
-#ifndef __ASM_MIPS_DEC_KN03_H
-#define __ASM_MIPS_DEC_KN03_H
-
-#include <asm/addrspace.h>
-#include <asm/dec/ecc.h>
-#include <asm/dec/ioasic_addrs.h>
-
-#define KN03_SLOT_BASE KSEG1ADDR(0x1f800000)
-
-/*
- * Some port addresses...
- */
-#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
-#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */
-#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */
-
-
-/*
- * CPU interrupt bits.
- */
-#define KN03_CPU_INR_HALT 6 /* HALT button */
-#define KN03_CPU_INR_BUS 5 /* memory, I/O bus read/write errors */
-#define KN03_CPU_INR_RES_4 4 /* unused */
-#define KN03_CPU_INR_RTC 3 /* DS1287 RTC */
-#define KN03_CPU_INR_CASCADE 2 /* I/O ASIC cascade */
-
-/*
- * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits.
- */
-#define KN03_IO_INR_3MAXP 15 /* (*) 3max+/bigmax ID */
-#define KN03_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */
-#define KN03_IO_INR_TC2 13 /* TURBOchannel slot #2 */
-#define KN03_IO_INR_TC1 12 /* TURBOchannel slot #1 */
-#define KN03_IO_INR_TC0 11 /* TURBOchannel slot #0 */
-#define KN03_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */
-#define KN03_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */
-#define KN03_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */
-#define KN03_IO_INR_SCC1 7 /* SCC (Z85C30) serial #1 */
-#define KN03_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */
-#define KN03_IO_INR_RTC 5 /* DS1287 RTC */
-#define KN03_IO_INR_PSU 4 /* power supply unit warning */
-#define KN03_IO_INR_RES_3 3 /* unused */
-#define KN03_IO_INR_ASC_DATA 2 /* SCSI data ready (for PIO) */
-#define KN03_IO_INR_PBNC 1 /* ~HALT button debouncer */
-#define KN03_IO_INR_PBNO 0 /* HALT button debouncer */
-
-
-/*
- * Memory Control Register bits.
- */
-#define KN03_MCR_RES_16 (0xffff<<16) /* unused */
-#define KN03_MCR_DIAGCHK (1<<15) /* diagn/norml ECC reads */
-#define KN03_MCR_DIAGGEN (1<<14) /* diagn/norml ECC writes */
-#define KN03_MCR_CORRECT (1<<13) /* ECC correct/check */
-#define KN03_MCR_RES_11 (0x3<<12) /* unused */
-#define KN03_MCR_BNK32M (1<<10) /* 32M/8M stride */
-#define KN03_MCR_RES_7 (0x7<<7) /* unused */
-#define KN03_MCR_CHECK (0x7f<<0) /* diagnostic check bits */
-
-/*
- * I/O ASIC System Support Register bits.
- */
-#define KN03_IO_SSR_TXDIS1 (1<<14) /* SCC1 transmit disable */
-#define KN03_IO_SSR_TXDIS0 (1<<13) /* SCC0 transmit disable */
-#define KN03_IO_SSR_RES_12 (1<<12) /* unused */
-
-#define KN03_IO_SSR_LEDS (0xff<<0) /* ~diagnostic LEDs */
-
-#endif /* __ASM_MIPS_DEC_KN03_H */
diff -Nru a/include/asm-mips64/dec/kn05.h b/include/asm-mips64/dec/kn05.h
--- a/include/asm-mips64/dec/kn05.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,70 +0,0 @@
-/*
- * include/asm-mips/dec/kn05.h
- *
- * DECstation 5000/260 (4max+ or KN05) and DECsystem 5900/260
- * definitions.
- *
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * WARNING! All this information is pure guesswork based on the
- * ROM. It is provided here in hope it will give someone some
- * food for thought. No documentation for the KN05 module has
- * been located so far.
- */
-#ifndef __ASM_MIPS_DEC_KN05_H
-#define __ASM_MIPS_DEC_KN05_H
-
-#include <asm/dec/ioasic_addrs.h>
-
-/*
- * The oncard MB (Memory Buffer) ASIC provides an additional address
- * decoder. Certain address ranges within the "high" 16 slots are
- * passed to the I/O ASIC's decoder like with the KN03. Others are
- * handled locally. "Low" slots are always passed.
- */
-#define KN05_MB_ROM (16*IOASIC_SLOT_SIZE) /* KN05 card ROM */
-#define KN05_IOCTL (17*IOASIC_SLOT_SIZE) /* I/O ASIC */
-#define KN05_ESAR (18*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
-#define KN05_LANCE (19*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
-#define KN05_MB_INT (20*IOASIC_SLOT_SIZE) /* MB interrupt register */
-#define KN05_MB_EA (21*IOASIC_SLOT_SIZE) /* MB error address? */
-#define KN05_MB_EC (22*IOASIC_SLOT_SIZE) /* MB error ??? */
-#define KN05_MB_CSR (23*IOASIC_SLOT_SIZE) /* MB control & status */
-#define KN05_RES_24 (24*IOASIC_SLOT_SIZE) /* unused? */
-#define KN05_RES_25 (25*IOASIC_SLOT_SIZE) /* unused? */
-#define KN05_RES_26 (26*IOASIC_SLOT_SIZE) /* unused? */
-#define KN05_RES_27 (27*IOASIC_SLOT_SIZE) /* unused? */
-#define KN05_SCSI (28*IOASIC_SLOT_SIZE) /* ASC SCSI */
-#define KN05_RES_29 (29*IOASIC_SLOT_SIZE) /* unused? */
-#define KN05_RES_30 (30*IOASIC_SLOT_SIZE) /* unused? */
-#define KN05_RES_31 (31*IOASIC_SLOT_SIZE) /* unused? */
-
-/*
- * Bits for the MB interrupt register.
- * The register appears read-only.
- */
-#define KN05_MB_INT_TC (1<<0) /* TURBOchannel? */
-#define KN05_MB_INT_RTC (1<<1) /* RTC? */
-
-/*
- * Bits for the MB control & status register.
- * Set to 0x00bf8001 on my system by the ROM.
- */
-#define KN05_MB_CSR_PF (1<<0) /* PreFetching enable? */
-#define KN05_MB_CSR_F (1<<1) /* ??? */
-#define KN05_MB_CSR_ECC (0xff<<2) /* ??? */
-#define KN05_MB_CSR_OD (1<<10) /* ??? */
-#define KN05_MB_CSR_CP (1<<11) /* ??? */
-#define KN05_MB_CSR_UNC (1<<12) /* ??? */
-#define KN05_MB_CSR_IM (1<<13) /* ??? */
-#define KN05_MB_CSR_NC (1<<14) /* ??? */
-#define KN05_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
-#define KN05_MB_CSR_MSK (0x1f<<16) /* ??? */
-#define KN05_MB_CSR_FW (1<<21) /* ??? */
-
-#endif /* __ASM_MIPS_DEC_KN05_H */
diff -Nru a/include/asm-mips64/dec/kn230.h b/include/asm-mips64/dec/kn230.h
--- a/include/asm-mips64/dec/kn230.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,26 +0,0 @@
-/*
- * include/asm-mips/dec/kn230.h
- *
- * DECsystem 5100 (MIPSmate or KN230) definitions.
- *
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS_DEC_KN230_H
-#define __ASM_MIPS_DEC_KN230_H
-
-/*
- * CPU interrupt bits.
- */
-#define KN230_CPU_INR_HALT 6 /* HALT button */
-#define KN230_CPU_INR_BUS 5 /* memory, I/O bus read/write errors */
-#define KN230_CPU_INR_RTC 4 /* DS1287 RTC */
-#define KN230_CPU_INR_SII 3 /* SII (DC7061) SCSI */
-#define KN230_CPU_INR_LANCE 3 /* LANCE (Am7990) Ethernet */
-#define KN230_CPU_INR_DZ11 2 /* DZ11 (DC7085) serial */
-
-#endif /* __ASM_MIPS_DEC_KN230_H */
diff -Nru a/include/asm-mips64/dec/machtype.h b/include/asm-mips64/dec/machtype.h
--- a/include/asm-mips64/dec/machtype.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-/*
- * Various machine type macros
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1998, 2000 Harald Koerfgen
- */
-
-#ifndef __ASM_DEC_MACHTYPE_H
-#define __ASM_DEC_MACHTYPE_H
-
-#include <asm/bootinfo.h>
-
-#define TURBOCHANNEL (mips_machtype == MACH_DS5000_200 || \
- mips_machtype == MACH_DS5000_1XX || \
- mips_machtype == MACH_DS5000_XX || \
- mips_machtype == MACH_DS5000_2X0 || \
- mips_machtype == MACH_DS5900)
-
-#define IOASIC (mips_machtype == MACH_DS5000_1XX || \
- mips_machtype == MACH_DS5000_XX || \
- mips_machtype == MACH_DS5000_2X0 || \
- mips_machtype == MACH_DS5900)
-
-#endif
diff -Nru a/include/asm-mips64/dec/prom.h b/include/asm-mips64/dec/prom.h
--- a/include/asm-mips64/dec/prom.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,169 +0,0 @@
-/*
- * include/asm-mips64/dec/prom.h
- *
- * DECstation PROM interface.
- *
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Based on arch/mips/dec/prom/prom.h by the Anonymous.
- */
-#ifndef __ASM_MIPS64_DEC_PROM_H
-#define __ASM_MIPS64_DEC_PROM_H
-
-#include <linux/types.h>
-
-#include <asm/addrspace.h>
-
-/*
- * PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's.
- * Many of these will work for MIPSen as well!
- */
-#define VEC_RESET (u64 *)KSEG1ADDR(0x1fc00000)
- /* Prom base address */
-
-#define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */
-
-#define PMAX_PROM_HALT PMAX_PROM_ENTRY(2) /* valid on MIPSen */
-#define PMAX_PROM_AUTOBOOT PMAX_PROM_ENTRY(5) /* valid on MIPSen */
-#define PMAX_PROM_OPEN PMAX_PROM_ENTRY(6)
-#define PMAX_PROM_READ PMAX_PROM_ENTRY(7)
-#define PMAX_PROM_CLOSE PMAX_PROM_ENTRY(10)
-#define PMAX_PROM_LSEEK PMAX_PROM_ENTRY(11)
-#define PMAX_PROM_GETCHAR PMAX_PROM_ENTRY(12)
-#define PMAX_PROM_PUTCHAR PMAX_PROM_ENTRY(13) /* 12 on MIPSen */
-#define PMAX_PROM_GETS PMAX_PROM_ENTRY(15)
-#define PMAX_PROM_PRINTF PMAX_PROM_ENTRY(17)
-#define PMAX_PROM_GETENV PMAX_PROM_ENTRY(33) /* valid on MIPSen */
-
-
-/*
- * Magic number indicating REX PROM available on DECstation. Found in
- * register a2 on transfer of control to program from PROM.
- */
-#define REX_PROM_MAGIC 0x30464354
-
-#ifdef CONFIG_MIPS64
-
-#define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */
-
-#else /* !CONFIG_MIPS64 */
-
-#define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC)
-
-#endif /* !CONFIG_MIPS64 */
-
-
-/*
- * 3MIN/MAXINE PROM entry points for DS5000/1xx's, DS5000/xx's and
- * DS5000/2x0.
- */
-#define REX_PROM_GETBITMAP 0x84/4 /* get mem bitmap */
-#define REX_PROM_GETCHAR 0x24/4 /* getch() */
-#define REX_PROM_GETENV 0x64/4 /* get env. variable */
-#define REX_PROM_GETSYSID 0x80/4 /* get system id */
-#define REX_PROM_GETTCINFO 0xa4/4
-#define REX_PROM_PRINTF 0x30/4 /* printf() */
-#define REX_PROM_SLOTADDR 0x6c/4 /* slotaddr */
-#define REX_PROM_BOOTINIT 0x54/4 /* open() */
-#define REX_PROM_BOOTREAD 0x58/4 /* read() */
-#define REX_PROM_CLEARCACHE 0x7c/4
-
-
-/*
- * Used by rex_getbitmap().
- */
-typedef struct {
- int pagesize;
- unsigned char bitmap[0];
-} memmap;
-
-
-/*
- * Function pointers as read from a PROM's callback vector.
- */
-extern int (*__rex_bootinit)(void);
-extern int (*__rex_bootread)(void);
-extern int (*__rex_getbitmap)(memmap *);
-extern unsigned long *(*__rex_slot_address)(int);
-extern void *(*__rex_gettcinfo)(void);
-extern int (*__rex_getsysid)(void);
-extern void (*__rex_clear_cache)(void);
-
-extern int (*__prom_getchar)(void);
-extern char *(*__prom_getenv)(char *);
-extern int (*__prom_printf)(char *, ...);
-
-extern int (*__pmax_open)(char*, int);
-extern int (*__pmax_lseek)(int, long, int);
-extern int (*__pmax_read)(int, void *, int);
-extern int (*__pmax_close)(int);
-
-
-#ifdef CONFIG_MIPS64
-
-/*
- * On MIPS64 we have to call PROM functions via a helper
- * dispatcher to accomodate ABI incompatibilities.
- */
-#define __DEC_PROM_O32 __attribute__((alias("call_o32")))
-
-int _rex_bootinit(int (*)(void)) __DEC_PROM_O32;
-int _rex_bootread(int (*)(void)) __DEC_PROM_O32;
-int _rex_getbitmap(int (*)(memmap *), memmap *) __DEC_PROM_O32;
-unsigned long *_rex_slot_address(unsigned long *(*)(int), int) __DEC_PROM_O32;
-void *_rex_gettcinfo(void *(*)(void)) __DEC_PROM_O32;
-int _rex_getsysid(int (*)(void)) __DEC_PROM_O32;
-void _rex_clear_cache(void (*)(void)) __DEC_PROM_O32;
-
-int _prom_getchar(int (*)(void)) __DEC_PROM_O32;
-char *_prom_getenv(char *(*)(char *), char *) __DEC_PROM_O32;
-int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32;
-
-
-#define rex_bootinit() _rex_bootinit(__rex_bootinit)
-#define rex_bootread() _rex_bootread(__rex_bootread)
-#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, x)
-#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, x)
-#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo)
-#define rex_getsysid() _rex_getsysid(__rex_getsysid)
-#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache)
-
-#define prom_getchar() _prom_getchar(__prom_getchar)
-#define prom_getenv(x) _prom_getenv(__prom_getenv, x)
-#define prom_printf(x...) _prom_printf(__prom_printf, x)
-
-#else /* !CONFIG_MIPS64 */
-
-/*
- * On plain MIPS we just call PROM functions directly.
- */
-#define rex_bootinit __rex_bootinit
-#define rex_bootread __rex_bootread
-#define rex_getbitmap __rex_getbitmap
-#define rex_slot_address __rex_slot_address
-#define rex_gettcinfo __rex_gettcinfo
-#define rex_getsysid __rex_getsysid
-#define rex_clear_cache __rex_clear_cache
-
-#define prom_getchar __prom_getchar
-#define prom_getenv __prom_getenv
-#define prom_printf __prom_printf
-
-#define pmax_open __pmax_open
-#define pmax_lseek __pmax_lseek
-#define pmax_read __pmax_read
-#define pmax_close __pmax_close
-
-#endif /* !CONFIG_MIPS64 */
-
-
-extern void prom_meminit(u32);
-extern void prom_identify_arch(u32);
-extern void prom_init_cmdline(s32, s32 *, u32);
-
-#endif /* __ASM_MIPS64_DEC_PROM_H */
diff -Nru a/include/asm-mips64/dec/rtc-dec.h b/include/asm-mips64/dec/rtc-dec.h
--- a/include/asm-mips64/dec/rtc-dec.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,32 +0,0 @@
-/*
- * include/asm-mips/dec/rtc-dec.h
- *
- * RTC definitions for DECstation style attached Dallas DS1287 chip.
- *
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS_DEC_RTC_DEC_H
-#define __ASM_MIPS_DEC_RTC_DEC_H
-
-#include <linux/types.h>
-
-#include <asm/addrspace.h>
-
-extern volatile u8 *dec_rtc_base;
-extern unsigned long dec_kn_slot_size;
-
-extern struct rtc_ops dec_rtc_ops;
-
-#define RTC_PORT(x) CPHYSADDR(dec_rtc_base)
-#define RTC_IO_EXTENT dec_kn_slot_size
-#define RTC_IOMAPPED 0
-#define RTC_IRQ 0
-
-#define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */
-
-#endif /* __ASM_MIPS_DEC_RTC_DEC_H */
diff -Nru a/include/asm-mips64/dec/tc.h b/include/asm-mips64/dec/tc.h
--- a/include/asm-mips64/dec/tc.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,43 +0,0 @@
-/*
- * Interface to the TURBOchannel related routines
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1998 Harald Koerfgen
- */
-#ifndef ASM_TC_H
-#define ASM_TC_H
-
-extern unsigned long system_base;
-
-/*
- * Search for a TURBOchannel Option Module
- * with a certain name. Returns slot number
- * of the first card not in use or -ENODEV
- * if none found.
- */
-extern int search_tc_card(const char *);
-/*
- * Marks the card in slot as used
- */
-extern void claim_tc_card(int);
-/*
- * Marks the card in slot as free
- */
-extern void release_tc_card(int);
-/*
- * Return base address of card in slot
- */
-extern unsigned long get_tc_base_addr(int);
-/*
- * Return interrupt number of slot
- */
-extern unsigned long get_tc_irq_nr(int);
-/*
- * Return TURBOchannel clock frequency in hz
- */
-extern unsigned long get_tc_speed(void);
-
-#endif
diff -Nru a/include/asm-mips64/dec/tcinfo.h b/include/asm-mips64/dec/tcinfo.h
--- a/include/asm-mips64/dec/tcinfo.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-/*
- * Various TURBOchannel related stuff
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Information obtained through the get_tcinfo prom call
- * created from:
- *
- * TURBOchannel Firmware Specification
- *
- * EK-TCAAD-FS-004
- * from Digital Equipment Corporation
- *
- * Copyright (c) 1998 Harald Koerfgen
- */
-
-typedef struct {
- int revision;
- int clk_period;
- int slot_size;
- int io_timeout;
- int dma_range;
- int max_dma_burst;
- int parity;
- int reserved[4];
-} tcinfo;
-
-#define MAX_SLOT 7
-
-typedef struct {
- unsigned long base_addr;
- unsigned char name[9];
- unsigned char vendor[9];
- unsigned char firmware[9];
- int interrupt;
- int flags;
-} slot_info;
-
-/*
- * Values for flags
- */
-#define FREE 1<<0
-#define IN_USE 1<<1
-
-
diff -Nru a/include/asm-mips64/dec/tcmodule.h b/include/asm-mips64/dec/tcmodule.h
--- a/include/asm-mips64/dec/tcmodule.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,39 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Offsets for the ROM header locations for
- * TURBOchannel cards
- *
- * created from:
- *
- * TURBOchannel Firmware Specification
- *
- * EK-TCAAD-FS-004
- * from Digital Equipment Corporation
- *
- * Jan.1998 Harald Koerfgen
- */
-#ifndef __ASM_DEC_TCMODULE_H
-#define __ASM_DEC_TCMODULE_H
-
-#define OLDCARD 0x3c0000
-#define NEWCARD 0x000000
-
-#define TC_ROM_WIDTH 0x3e0
-#define TC_ROM_STRIDE 0x3e4
-#define TC_ROM_SIZE 0x3e8
-#define TC_SLOT_SIZE 0x3ec
-#define TC_PATTERN0 0x3f0
-#define TC_PATTERN1 0x3f4
-#define TC_PATTERN2 0x3f8
-#define TC_PATTERN3 0x3fc
-#define TC_FIRM_VER 0x400
-#define TC_VENDOR 0x420
-#define TC_MODULE 0x440
-#define TC_FIRM_TYPE 0x460
-#define TC_FLAGS 0x470
-#define TC_ROM_OBJECTS 0x480
-
-#endif /* __ASM_DEC_TCMODULE_H */
diff -Nru a/include/asm-mips64/delay.h b/include/asm-mips64/delay.h
--- a/include/asm-mips64/delay.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,69 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 by Waldorf Electronics
- * Copyright (C) 1995 - 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_DELAY_H
-#define _ASM_DELAY_H
-
-#include <linux/config.h>
-#include <linux/param.h>
-
-extern unsigned long loops_per_jiffy;
-
-extern __inline__ void
-__delay(unsigned long loops)
-{
- __asm__ __volatile__ (
- ".set\tnoreorder\n"
- "1:\tbnez\t%0,1b\n\t"
- "dsubu\t%0,1\n\t"
- ".set\treorder"
- :"=r" (loops)
- :"0" (loops));
-}
-
-/*
- * Division by multiplication: you don't have to worry about
- * loss of precision.
- *
- * Use only for very small delays ( < 1 msec). Should probably use a
- * lookup table, really, as the multiplications take much too long with
- * short delays. This is a "reasonable" implementation, though (and the
- * first constant multiplications gets optimized away if the delay is
- * a constant)
- */
-extern __inline__ void __udelay(unsigned long usecs, unsigned long lpj)
-{
- unsigned long lo;
-
- /*
- * The common rates of 1000 and 128 are rounded wrongly by the
- * catchall case. Excessive precission? Probably ...
- */
-#if (HZ == 128)
- usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
-#elif (HZ == 1000)
- usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */
-#else
- usecs *= (0x8000000000000000UL / (500000 / HZ));
-#endif
- __asm__("dmultu\t%2,%3"
- :"=h" (usecs), "=l" (lo)
- :"r" (usecs),"r" (lpj));
- __delay(usecs);
-}
-
-#ifdef CONFIG_SMP
-#define __udelay_val cpu_data[smp_processor_id()].udelay_val
-#else
-#define __udelay_val loops_per_jiffy
-#endif
-
-#define udelay(usecs) __udelay((usecs),__udelay_val)
-
-#endif /* _ASM_DELAY_H */
diff -Nru a/include/asm-mips64/div64.h b/include/asm-mips64/div64.h
--- a/include/asm-mips64/div64.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,32 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_DIV64_H
-#define _ASM_DIV64_H
-
-/*
- * Don't use this one in new code
- */
-#define do_div64_32(res, high, low, base) ({ \
- unsigned int __quot, __mod; \
- unsigned long __div; \
- unsigned int __low, __high, __base; \
- \
- __high = (high); \
- __low = (low); \
- __div = __high; \
- __div = __div << 32 | __low; \
- __base = (base); \
- \
- __mod = __div % __base; \
- __div = __div / __base; \
- \
- __quot = __div; \
- (res) = __quot; \
- __mod; })
-
-#include <asm-generic.h>
-
-#endif /* _ASM_DIV64_H */
diff -Nru a/include/asm-mips64/dma-mapping.h b/include/asm-mips64/dma-mapping.h
--- a/include/asm-mips64/dma-mapping.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1 +0,0 @@
-#include <asm-generic/dma-mapping.h>
diff -Nru a/include/asm-mips64/dma.h b/include/asm-mips64/dma.h
--- a/include/asm-mips64/dma.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,313 +0,0 @@
-/*
- * linux/include/asm/dma.h: Defines for using and allocating dma channels.
- * Written by Hennus Bergman, 1992.
- * High DMA channel support & info by Hannu Savolainen
- * and John Boyd, Nov. 1992.
- *
- * NOTE: all this is true *only* for ISA/EISA expansions on Mips boards
- * and can only be used for expansion cards. Onboard DMA controllers, such
- * as the R4030 on Jazz boards behave totally different!
- */
-
-#ifndef _ASM_DMA_H
-#define _ASM_DMA_H
-
-#include <linux/config.h>
-#include <asm/io.h> /* need byte IO */
-#include <linux/spinlock.h> /* And spinlocks */
-#include <linux/delay.h>
-#include <asm/system.h>
-
-
-#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
-#define dma_outb outb_p
-#else
-#define dma_outb outb
-#endif
-
-#define dma_inb inb
-
-/*
- * NOTES about DMA transfers:
- *
- * controller 1: channels 0-3, byte operations, ports 00-1F
- * controller 2: channels 4-7, word operations, ports C0-DF
- *
- * - ALL registers are 8 bits only, regardless of transfer size
- * - channel 4 is not used - cascades 1 into 2.
- * - channels 0-3 are byte - addresses/counts are for physical bytes
- * - channels 5-7 are word - addresses/counts are for physical words
- * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
- * - transfer count loaded to registers is 1 less than actual count
- * - controller 2 offsets are all even (2x offsets for controller 1)
- * - page registers for 5-7 don't use data bit 0, represent 128K pages
- * - page registers for 0-3 use bit 0, represent 64K pages
- *
- * DMA transfers are limited to the lower 16MB of _physical_ memory.
- * Note that addresses loaded into registers must be _physical_ addresses,
- * not logical addresses (which may differ if paging is active).
- *
- * Address mapping for channels 0-3:
- *
- * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
- * | ... | | ... | | ... |
- * | ... | | ... | | ... |
- * | ... | | ... | | ... |
- * P7 ... P0 A7 ... A0 A7 ... A0
- * | Page | Addr MSB | Addr LSB | (DMA registers)
- *
- * Address mapping for channels 5-7:
- *
- * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
- * | ... | \ \ ... \ \ \ ... \ \
- * | ... | \ \ ... \ \ \ ... \ (not used)
- * | ... | \ \ ... \ \ \ ... \
- * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
- * | Page | Addr MSB | Addr LSB | (DMA registers)
- *
- * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
- * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
- * the hardware level, so odd-byte transfers aren't possible).
- *
- * Transfer count (_not # bytes_) is limited to 64K, represented as actual
- * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
- * and up to 128K bytes may be transferred on channels 5-7 in one operation.
- *
- */
-
-#define MAX_DMA_CHANNELS 8
-
-/*
- * The maximum address in KSEG0 that we can perform a DMA transfer to on this
- * platform. This describes only the PC style part of the DMA logic like on
- * Deskstations or Acer PICA but not the much more versatile DMA logic used
- * for the local devices on Acer PICA or Magnums.
- */
-#ifdef CONFIG_SGI_IP22
-/* Horrible hack to have a correct DMA window on IP22 */
-#include <asm/sgi/mc.h>
-#define MAX_DMA_ADDRESS (PAGE_OFFSET + SGIMC_SEG0_BADDR + 0x01000000)
-#else
-#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000)
-#endif
-
-/* 8237 DMA controllers */
-#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
-#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
-
-/* DMA controller registers */
-#define DMA1_CMD_REG 0x08 /* command register (w) */
-#define DMA1_STAT_REG 0x08 /* status register (r) */
-#define DMA1_REQ_REG 0x09 /* request register (w) */
-#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
-#define DMA1_MODE_REG 0x0B /* mode register (w) */
-#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
-#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
-#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
-#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
-#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
-
-#define DMA2_CMD_REG 0xD0 /* command register (w) */
-#define DMA2_STAT_REG 0xD0 /* status register (r) */
-#define DMA2_REQ_REG 0xD2 /* request register (w) */
-#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
-#define DMA2_MODE_REG 0xD6 /* mode register (w) */
-#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
-#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
-#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
-#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
-#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
-
-#define DMA_ADDR_0 0x00 /* DMA address registers */
-#define DMA_ADDR_1 0x02
-#define DMA_ADDR_2 0x04
-#define DMA_ADDR_3 0x06
-#define DMA_ADDR_4 0xC0
-#define DMA_ADDR_5 0xC4
-#define DMA_ADDR_6 0xC8
-#define DMA_ADDR_7 0xCC
-
-#define DMA_CNT_0 0x01 /* DMA count registers */
-#define DMA_CNT_1 0x03
-#define DMA_CNT_2 0x05
-#define DMA_CNT_3 0x07
-#define DMA_CNT_4 0xC2
-#define DMA_CNT_5 0xC6
-#define DMA_CNT_6 0xCA
-#define DMA_CNT_7 0xCE
-
-#define DMA_PAGE_0 0x87 /* DMA page registers */
-#define DMA_PAGE_1 0x83
-#define DMA_PAGE_2 0x81
-#define DMA_PAGE_3 0x82
-#define DMA_PAGE_5 0x8B
-#define DMA_PAGE_6 0x89
-#define DMA_PAGE_7 0x8A
-
-#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
-#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
-#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
-
-#define DMA_AUTOINIT 0x10
-
-extern spinlock_t dma_spin_lock;
-
-static __inline__ unsigned long claim_dma_lock(void)
-{
- unsigned long flags;
- spin_lock_irqsave(&dma_spin_lock, flags);
- return flags;
-}
-
-static __inline__ void release_dma_lock(unsigned long flags)
-{
- spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
- if (dmanr<=3)
- dma_outb(dmanr, DMA1_MASK_REG);
- else
- dma_outb(dmanr & 3, DMA2_MASK_REG);
-}
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
- if (dmanr<=3)
- dma_outb(dmanr | 4, DMA1_MASK_REG);
- else
- dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
-}
-
-/* Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while holding the DMA lock ! ---
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
- if (dmanr<=3)
- dma_outb(0, DMA1_CLEAR_FF_REG);
- else
- dma_outb(0, DMA2_CLEAR_FF_REG);
-}
-
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
- if (dmanr<=3)
- dma_outb(mode | dmanr, DMA1_MODE_REG);
- else
- dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
-}
-
-/* Set only the page register bits of the transfer address.
- * This is used for successive transfers when we know the contents of
- * the lower 16 bits of the DMA current address register, but a 64k boundary
- * may have been crossed.
- */
-static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
-{
- switch(dmanr) {
- case 0:
- dma_outb(pagenr, DMA_PAGE_0);
- break;
- case 1:
- dma_outb(pagenr, DMA_PAGE_1);
- break;
- case 2:
- dma_outb(pagenr, DMA_PAGE_2);
- break;
- case 3:
- dma_outb(pagenr, DMA_PAGE_3);
- break;
- case 5:
- dma_outb(pagenr & 0xfe, DMA_PAGE_5);
- break;
- case 6:
- dma_outb(pagenr & 0xfe, DMA_PAGE_6);
- break;
- case 7:
- dma_outb(pagenr & 0xfe, DMA_PAGE_7);
- break;
- }
-}
-
-
-/* Set transfer address & page bits for specific DMA channel.
- * Assumes dma flipflop is clear.
- */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
-{
- set_dma_page(dmanr, a>>16);
- if (dmanr <= 3) {
- dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
- dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
- } else {
- dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
- dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
- }
-}
-
-
-/* Set transfer size (max 64k for DMA0..3, 128k for DMA5..7) for
- * a specific DMA channel.
- * You must ensure the parameters are valid.
- * NOTE: from a manual: "the number of transfers is one more
- * than the initial word count"! This is taken into account.
- * Assumes dma flip-flop is clear.
- * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
- count--;
- if (dmanr <= 3) {
- dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
- dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
- } else {
- dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
- dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
- }
-}
-
-
-/* Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * If called before the channel has been used, it may return 1.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- *
- * Assumes DMA flip-flop is clear.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
- unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
- : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
-
- /* using short to get 16-bit wrap around */
- unsigned short count;
-
- count = 1 + dma_inb(io_port);
- count += dma_inb(io_port) << 8;
-
- return (dmanr<=3)? count : (count<<1);
-}
-
-
-/* These are in kernel/dma.c: */
-extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
-extern void free_dma(unsigned int dmanr); /* release it again */
-
-/* From PCI */
-
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;
-#else
-#define isa_dma_bridge_buggy (0)
-#endif
-
-#endif /* _ASM_DMA_H */
diff -Nru a/include/asm-mips64/ds1286.h b/include/asm-mips64/ds1286.h
--- a/include/asm-mips64/ds1286.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,59 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
- * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
- * derived from Data Sheet, Copyright Motorola 1984 (!).
- * It was written to be part of the Linux operating system.
- *
- * Copyright (C) 1998, 1999 Ralf Baechle
- */
-#ifndef _ASM_DS1286_h
-#define _ASM_DS1286_h
-
-#include <asm/mc146818rtc.h>
-
-/**********************************************************************
- * register summary
- **********************************************************************/
-#define RTC_HUNDREDTH_SECOND 0
-#define RTC_SECONDS 1
-#define RTC_MINUTES 2
-#define RTC_MINUTES_ALARM 3
-#define RTC_HOURS 4
-#define RTC_HOURS_ALARM 5
-#define RTC_DAY 6
-#define RTC_DAY_ALARM 7
-#define RTC_DATE 8
-#define RTC_MONTH 9
-#define RTC_YEAR 10
-#define RTC_CMD 11
-#define RTC_WHSEC 12
-#define RTC_WSEC 13
-#define RTC_UNUSED 14
-
-/* RTC_*_alarm is always true if 2 MSBs are set */
-# define RTC_ALARM_DONT_CARE 0xC0
-
-
-/*
- * Bits in the month register
- */
-#define RTC_EOSC 0x80
-#define RTC_ESQW 0x40
-
-/*
- * Bits in the Command register
- */
-#define RTC_TDF 0x01
-#define RTC_WAF 0x02
-#define RTC_TDM 0x04
-#define RTC_WAM 0x08
-#define RTC_PU_LVL 0x10
-#define RTC_IBH_LO 0x20
-#define RTC_IPSW 0x40
-#define RTC_TE 0x80
-
-#endif /* _ASM_DS1286_h */
diff -Nru a/include/asm-mips64/elf.h b/include/asm-mips64/elf.h
--- a/include/asm-mips64/elf.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,219 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_ELF_H
-#define __ASM_ELF_H
-
-#include <asm/ptrace.h>
-#include <asm/user.h>
-
-/* ELF header e_flags defines. */
-/* MIPS architecture level. */
-#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
-#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
-#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
-#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
-#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
-#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
-#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
-
-/* The ABI of a file. */
-#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
-#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
-
-#define PT_MIPS_REGINFO 0x70000000
-#define PT_MIPS_OPTIONS 0x70000001
-
-/* Flags in the e_flags field of the header */
-#define EF_MIPS_NOREORDER 0x00000001
-#define EF_MIPS_PIC 0x00000002
-#define EF_MIPS_CPIC 0x00000004
-#define EF_MIPS_ABI2 0x00000020
-#define EF_MIPS_OPTIONS_FIRST 0x00000080
-#define EF_MIPS_32BITMODE 0x00000100
-#define EF_MIPS_ABI 0x0000f000
-#define EF_MIPS_ARCH 0xf0000000
-
-#define DT_MIPS_RLD_VERSION 0x70000001
-#define DT_MIPS_TIME_STAMP 0x70000002
-#define DT_MIPS_ICHECKSUM 0x70000003
-#define DT_MIPS_IVERSION 0x70000004
-#define DT_MIPS_FLAGS 0x70000005
- #define RHF_NONE 0
- #define RHF_HARDWAY 1
- #define RHF_NOTPOT 2
-#define DT_MIPS_BASE_ADDRESS 0x70000006
-#define DT_MIPS_CONFLICT 0x70000008
-#define DT_MIPS_LIBLIST 0x70000009
-#define DT_MIPS_LOCAL_GOTNO 0x7000000a
-#define DT_MIPS_CONFLICTNO 0x7000000b
-#define DT_MIPS_LIBLISTNO 0x70000010
-#define DT_MIPS_SYMTABNO 0x70000011
-#define DT_MIPS_UNREFEXTNO 0x70000012
-#define DT_MIPS_GOTSYM 0x70000013
-#define DT_MIPS_HIPAGENO 0x70000014
-#define DT_MIPS_RLD_MAP 0x70000016
-
-#define R_MIPS_NONE 0
-#define R_MIPS_16 1
-#define R_MIPS_32 2
-#define R_MIPS_REL32 3
-#define R_MIPS_26 4
-#define R_MIPS_HI16 5
-#define R_MIPS_LO16 6
-#define R_MIPS_GPREL16 7
-#define R_MIPS_LITERAL 8
-#define R_MIPS_GOT16 9
-#define R_MIPS_PC16 10
-#define R_MIPS_CALL16 11
-#define R_MIPS_GPREL32 12
-/* The remaining relocs are defined on Irix, although they are not
- in the MIPS ELF ABI. */
-#define R_MIPS_UNUSED1 13
-#define R_MIPS_UNUSED2 14
-#define R_MIPS_UNUSED3 15
-#define R_MIPS_SHIFT5 16
-#define R_MIPS_SHIFT6 17
-#define R_MIPS_64 18
-#define R_MIPS_GOT_DISP 19
-#define R_MIPS_GOT_PAGE 20
-#define R_MIPS_GOT_OFST 21
-/*
- * The following two relocation types are specified in the MIPS ABI
- * conformance guide version 1.2 but not yet in the psABI.
- */
-#define R_MIPS_GOTHI16 22
-#define R_MIPS_GOTLO16 23
-#define R_MIPS_SUB 24
-#define R_MIPS_INSERT_A 25
-#define R_MIPS_INSERT_B 26
-#define R_MIPS_DELETE 27
-#define R_MIPS_HIGHER 28
-#define R_MIPS_HIGHEST 29
-/*
- * The following two relocation types are specified in the MIPS ABI
- * conformance guide version 1.2 but not yet in the psABI.
- */
-#define R_MIPS_CALLHI16 30
-#define R_MIPS_CALLLO16 31
-/*
- * This range is reserved for vendor specific relocations.
- */
-#define R_MIPS_LOVENDOR 100
-#define R_MIPS_HIVENDOR 127
-
-#define SHN_MIPS_ACCOMON 0xff00
-
-#define SHT_MIPS_LIST 0x70000000
-#define SHT_MIPS_CONFLICT 0x70000002
-#define SHT_MIPS_GPTAB 0x70000003
-#define SHT_MIPS_UCODE 0x70000004
-
-#define SHF_MIPS_GPREL 0x10000000
-
-#ifndef ELF_ARCH
-/* ELF register definitions */
-#define ELF_NGREG 45
-#define ELF_NFPREG 33
-
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(hdr) \
-({ \
- int __res = 1; \
- struct elfhdr *__h = (hdr); \
- \
- if (__h->e_machine != EM_MIPS) \
- __res = 0; \
- if (__h->e_ident[EI_CLASS] == ELFCLASS32) \
- __res = 0; \
- \
- __res; \
-})
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_CLASS ELFCLASS64
-#ifdef __MIPSEB__
-#define ELF_DATA ELFDATA2MSB
-#elif __MIPSEL__
-#define ELF_DATA ELFDATA2LSB
-#endif
-#define ELF_ARCH EM_MIPS
-#endif /* !defined(ELF_ARCH) */
-
-#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE 4096
-
-#define ELF_CORE_COPY_REGS(_dest,_regs) \
- memcpy((char *) &_dest, (char *) _regs, \
- sizeof(struct pt_regs));
-
-/* This yields a mask that user programs can use to figure out what
- instruction set this cpu supports. This could be done in userspace,
- but it's not easy, and we've already done it here. */
-
-#define ELF_HWCAP (0)
-
-/* This yields a string that ld.so will use to load implementation
- specific libraries for optimization. This is more specific in
- intent than poking at uname or /proc/cpuinfo.
-
- For the moment, we have only optimizations for the Intel generations,
- but that could change... */
-
-#define ELF_PLATFORM (NULL)
-
-/*
- * See comments in asm-alpha/elf.h, this is the same thing
- * on the MIPS.
- */
-#define ELF_PLAT_INIT(_r, load_addr) do { \
- _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
- _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
- _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
- _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
- _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
- _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
- _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
- _r->regs[30] = _r->regs[31] = 0; \
-} while (0)
-
-/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
- use of this is to invoke "./ld.so someprog" to test out a new version of
- the loader. We need to make sure that it is out of the way of the program
- that it will "exec", and that there is sufficient room for the brk. */
-
-#ifndef ELF_ET_DYN_BASE
-#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
-#endif
-
-#ifdef __KERNEL__
-#define SET_PERSONALITY(ex, ibcs2) \
-do { current->thread.mflags &= ~MF_ABI_MASK; \
- if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \
- if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
- ((ex).e_flags & EF_MIPS_ABI) == 0) \
- current->thread.mflags |= MF_N32; \
- else \
- current->thread.mflags |= MF_O32; \
- } else \
- current->thread.mflags |= MF_N64; \
- if (ibcs2) \
- set_personality(PER_SVR4); \
- else if (current->personality != PER_LINUX32) \
- set_personality(PER_LINUX); \
-} while (0)
-#endif
-
-#endif /* __ASM_ELF_H */
diff -Nru a/include/asm-mips64/errno.h b/include/asm-mips64/errno.h
--- a/include/asm-mips64/errno.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,123 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999, 2001, 2002 by Ralf Baechle
- */
-#ifndef _ASM_ERRNO_H
-#define _ASM_ERRNO_H
-
-/*
- * These error numbers are intended to be MIPS ABI compatible
- */
-
-#include <asm-generic/errno-base.h>
-
-#define ENOMSG 35 /* No message of desired type */
-#define EIDRM 36 /* Identifier removed */
-#define ECHRNG 37 /* Channel number out of range */
-#define EL2NSYNC 38 /* Level 2 not synchronized */
-#define EL3HLT 39 /* Level 3 halted */
-#define EL3RST 40 /* Level 3 reset */
-#define ELNRNG 41 /* Link number out of range */
-#define EUNATCH 42 /* Protocol driver not attached */
-#define ENOCSI 43 /* No CSI structure available */
-#define EL2HLT 44 /* Level 2 halted */
-#define EDEADLK 45 /* Resource deadlock would occur */
-#define ENOLCK 46 /* No record locks available */
-#define EBADE 50 /* Invalid exchange */
-#define EBADR 51 /* Invalid request descriptor */
-#define EXFULL 52 /* Exchange full */
-#define ENOANO 53 /* No anode */
-#define EBADRQC 54 /* Invalid request code */
-#define EBADSLT 55 /* Invalid slot */
-#define EDEADLOCK 56 /* File locking deadlock error */
-#define EBFONT 59 /* Bad font file format */
-#define ENOSTR 60 /* Device not a stream */
-#define ENODATA 61 /* No data available */
-#define ETIME 62 /* Timer expired */
-#define ENOSR 63 /* Out of streams resources */
-#define ENONET 64 /* Machine is not on the network */
-#define ENOPKG 65 /* Package not installed */
-#define EREMOTE 66 /* Object is remote */
-#define ENOLINK 67 /* Link has been severed */
-#define EADV 68 /* Advertise error */
-#define ESRMNT 69 /* Srmount error */
-#define ECOMM 70 /* Communication error on send */
-#define EPROTO 71 /* Protocol error */
-#define EDOTDOT 73 /* RFS specific error */
-#define EMULTIHOP 74 /* Multihop attempted */
-#define EBADMSG 77 /* Not a data message */
-#define ENAMETOOLONG 78 /* File name too long */
-#define EOVERFLOW 79 /* Value too large for defined data type */
-#define ENOTUNIQ 80 /* Name not unique on network */
-#define EBADFD 81 /* File descriptor in bad state */
-#define EREMCHG 82 /* Remote address changed */
-#define ELIBACC 83 /* Can not access a needed shared library */
-#define ELIBBAD 84 /* Accessing a corrupted shared library */
-#define ELIBSCN 85 /* .lib section in a.out corrupted */
-#define ELIBMAX 86 /* Attempting to link in too many shared libraries */
-#define ELIBEXEC 87 /* Cannot exec a shared library directly */
-#define EILSEQ 88 /* Illegal byte sequence */
-#define ENOSYS 89 /* Function not implemented */
-#define ELOOP 90 /* Too many symbolic links encountered */
-#define ERESTART 91 /* Interrupted system call should be restarted */
-#define ESTRPIPE 92 /* Streams pipe error */
-#define ENOTEMPTY 93 /* Directory not empty */
-#define EUSERS 94 /* Too many users */
-#define ENOTSOCK 95 /* Socket operation on non-socket */
-#define EDESTADDRREQ 96 /* Destination address required */
-#define EMSGSIZE 97 /* Message too long */
-#define EPROTOTYPE 98 /* Protocol wrong type for socket */
-#define ENOPROTOOPT 99 /* Protocol not available */
-#define EPROTONOSUPPORT 120 /* Protocol not supported */
-#define ESOCKTNOSUPPORT 121 /* Socket type not supported */
-#define EOPNOTSUPP 122 /* Operation not supported on transport endpoint */
-#define EPFNOSUPPORT 123 /* Protocol family not supported */
-#define EAFNOSUPPORT 124 /* Address family not supported by protocol */
-#define EADDRINUSE 125 /* Address already in use */
-#define EADDRNOTAVAIL 126 /* Cannot assign requested address */
-#define ENETDOWN 127 /* Network is down */
-#define ENETUNREACH 128 /* Network is unreachable */
-#define ENETRESET 129 /* Network dropped connection because of reset */
-#define ECONNABORTED 130 /* Software caused connection abort */
-#define ECONNRESET 131 /* Connection reset by peer */
-#define ENOBUFS 132 /* No buffer space available */
-#define EISCONN 133 /* Transport endpoint is already connected */
-#define ENOTCONN 134 /* Transport endpoint is not connected */
-#define EUCLEAN 135 /* Structure needs cleaning */
-#define ENOTNAM 137 /* Not a XENIX named type file */
-#define ENAVAIL 138 /* No XENIX semaphores available */
-#define EISNAM 139 /* Is a named type file */
-#define EREMOTEIO 140 /* Remote I/O error */
-#define EINIT 141 /* Reserved */
-#define EREMDEV 142 /* Error 142 */
-#define ESHUTDOWN 143 /* Cannot send after transport endpoint shutdown */
-#define ETOOMANYREFS 144 /* Too many references: cannot splice */
-#define ETIMEDOUT 145 /* Connection timed out */
-#define ECONNREFUSED 146 /* Connection refused */
-#define EHOSTDOWN 147 /* Host is down */
-#define EHOSTUNREACH 148 /* No route to host */
-#define EWOULDBLOCK EAGAIN /* Operation would block */
-#define EALREADY 149 /* Operation already in progress */
-#define EINPROGRESS 150 /* Operation now in progress */
-#define ESTALE 151 /* Stale NFS file handle */
-#define ECANCELED 158 /* AIO operation canceled */
-
-/*
- * These error are Linux extensions.
- */
-#define ENOMEDIUM 159 /* No medium found */
-#define EMEDIUMTYPE 160 /* Wrong medium type */
-
-#define EDQUOT 1133 /* Quota exceeded */
-
-#ifdef __KERNEL__
-
-/* The biggest error number defined here or in <linux/errno.h>. */
-#define EMAXERRNO 1133
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_ERRNO_H */
diff -Nru a/include/asm-mips64/exception.h b/include/asm-mips64/exception.h
--- a/include/asm-mips64/exception.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,76 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics
- *
- * Low level exception handling
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-
- .macro __build_clear_none
- .endm
-
- .macro __build_clear_sti
- STI
- .endm
-
- .macro __build_clear_cli
- CLI
- .endm
-
- .macro __build_clear_fpe
- cfc1 a1, fcr31
- li a2, ~(0x3f << 12)
- and a2, a1
- ctc1 a2, fcr31
- STI
- .endm
-
- .macro __build_clear_ade
- dmfc0 t0, CP0_BADVADDR
- sd t0, PT_BVADDR(sp)
- KMODE
- .endm
-
- .macro __BUILD_silent exception
- .endm
-
- /* Gas tries to parse the PRINT argument as a string containing
- string escapes and emits bogus warnings if it believes to
- recognize an unknown escape code. So make the arguments
- start with an n and gas will believe \n is ok ... */
- .macro __BUILD_verbose nexception
- ld a1, PT_EPC(sp)
- PRINT("Got \nexception at %016lx\012")
- .endm
-
- .macro __BUILD_count exception
- .set reorder
- ld t0,exception_count_\exception
- daddiu t0, 1
- sd t0,exception_count_\exception
- .set noreorder
- .comm exception_count\exception, 8, 8
- .endm
-
- .macro BUILD_HANDLER exception handler clear verbose
- .align 5
- NESTED(handle_\exception, PT_SIZE, sp)
- .set noat
- SAVE_ALL
- __BUILD_clear_\clear
- .set at
- __BUILD_\verbose \exception
- move a0, sp
- jal do_\handler
- j ret_from_exception
- nop
- END(handle_\exception)
- .endm
diff -Nru a/include/asm-mips64/fcntl.h b/include/asm-mips64/fcntl.h
--- a/include/asm-mips64/fcntl.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,93 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_FCNTL_H
-#define _ASM_FCNTL_H
-
-/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
- located on an ext2 file system */
-#define O_ACCMODE 0x0003
-#define O_RDONLY 0x0000
-#define O_WRONLY 0x0001
-#define O_RDWR 0x0002
-#define O_APPEND 0x0008
-#define O_SYNC 0x0010
-#define O_NONBLOCK 0x0080
-#define O_CREAT 0x0100 /* not fcntl */
-#define O_TRUNC 0x0200 /* not fcntl */
-#define O_EXCL 0x0400 /* not fcntl */
-#define O_NOCTTY 0x0800 /* not fcntl */
-#define FASYNC 0x1000 /* fcntl, for BSD compatibility */
-#define O_LARGEFILE 0x2000 /* allow large file opens */
-#define O_DIRECT 0x8000 /* direct disk access hint */
-#define O_DIRECTORY 0x10000 /* must be a directory */
-#define O_NOFOLLOW 0x20000 /* don't follow links */
-
-#define O_NDELAY O_NONBLOCK
-
-#define F_DUPFD 0 /* dup */
-#define F_GETFD 1 /* get close_on_exec */
-#define F_SETFD 2 /* set/clear close_on_exec */
-#define F_GETFL 3 /* get file->f_flags */
-#define F_SETFL 4 /* set file->f_flags */
-#define F_GETLK 14
-#define F_SETLK 6
-#define F_SETLKW 7
-
-#define F_SETOWN 24 /* for sockets. */
-#define F_GETOWN 23 /* for sockets. */
-#define F_SETSIG 10 /* for sockets. */
-#define F_GETSIG 11 /* for sockets. */
-
-#ifdef __KERNEL__
-#define F_GETLK64 33 /* using 'struct flock64' */
-#define F_SETLK64 34
-#define F_SETLKW64 35
-#endif
-
-/* for F_[GET|SET]FL */
-#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
-
-/* for posix fcntl() and lockf() */
-#define F_RDLCK 0
-#define F_WRLCK 1
-#define F_UNLCK 2
-
-/* for old implementation of bsd flock () */
-#define F_EXLCK 4 /* or 3 */
-#define F_SHLCK 8 /* or 4 */
-
-/* for leases */
-#define F_INPROGRESS 16
-
-/* operations for bsd flock(), also used by the kernel implementation */
-#define LOCK_SH 1 /* shared lock */
-#define LOCK_EX 2 /* exclusive lock */
-#define LOCK_NB 4 /* or'd with one of the above to prevent
- blocking */
-#define LOCK_UN 8 /* remove lock */
-
-#define LOCK_MAND 32 /* This is a mandatory flock */
-#define LOCK_READ 64 /* ... Which allows concurrent read operations */
-#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
-#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
-
-typedef struct flock {
- short l_type;
- short l_whence;
- __kernel_off_t l_start;
- __kernel_off_t l_len;
- __kernel_pid_t l_pid;
-} flock_t;
-
-#ifdef __KERNEL__
-#define flock64 flock
-#endif
-
-#define F_LINUX_SPECIFIC_BASE 1024
-
-#endif /* _ASM_FCNTL_H */
diff -Nru a/include/asm-mips64/floppy.h b/include/asm-mips64/floppy.h
--- a/include/asm-mips64/floppy.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,101 +0,0 @@
-/*
- * Architecture specific parts of the Floppy driver
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 - 2000 Ralf Baechle
- */
-#ifndef _ASM_FLOPPY_H
-#define _ASM_FLOPPY_H
-
-struct fd_ops {
- unsigned char (*fd_inb)(unsigned int port);
- void (*fd_outb)(unsigned char value, unsigned int port);
-
- /*
- * How to access the floppy DMA functions.
- */
- void (*fd_enable_dma)(int channel);
- void (*fd_disable_dma)(int channel);
- int (*fd_request_dma)(int channel);
- void (*fd_free_dma)(int channel);
- void (*fd_clear_dma_ff)(int channel);
- void (*fd_set_dma_mode)(int channel, char mode);
- void (*fd_set_dma_addr)(int channel, unsigned int a);
- void (*fd_set_dma_count)(int channel, unsigned int count);
- int (*fd_get_dma_residue)(int channel);
- void (*fd_enable_irq)(int irq);
- void (*fd_disable_irq)(int irq);
- unsigned long (*fd_getfdaddr1)(void);
- unsigned long (*fd_dma_mem_alloc)(unsigned long size);
- void (*fd_dma_mem_free)(unsigned long addr, unsigned long size);
- unsigned long (*fd_drive_type)(unsigned long);
-};
-
-extern struct fd_ops *fd_ops;
-
-#define fd_inb(port) fd_ops->fd_inb(port)
-#define fd_outb(value,port) fd_ops->fd_outb(value,port)
-
-#define fd_enable_dma() fd_ops->fd_enable_dma(FLOPPY_DMA)
-#define fd_disable_dma() fd_ops->fd_disable_dma(FLOPPY_DMA)
-#define fd_request_dma() fd_ops->fd_request_dma(FLOPPY_DMA)
-#define fd_free_dma() fd_ops->fd_free_dma(FLOPPY_DMA)
-#define fd_clear_dma_ff() fd_ops->fd_clear_dma_ff(FLOPPY_DMA)
-#define fd_set_dma_mode(mode) fd_ops->fd_set_dma_mode(FLOPPY_DMA, mode)
-#define fd_set_dma_addr(addr) fd_ops->fd_set_dma_addr(FLOPPY_DMA, \
- isa_virt_to_bus(addr))
-#define fd_set_dma_count(count) fd_ops->fd_set_dma_count(FLOPPY_DMA,count)
-#define fd_get_dma_residue() fd_ops->fd_get_dma_residue(FLOPPY_DMA)
-
-#define fd_enable_irq() fd_ops->fd_enable_irq(FLOPPY_IRQ)
-#define fd_disable_irq() fd_ops->fd_disable_irq(FLOPPY_IRQ)
-#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT | SA_SAMPLE_RANDOM, \
- "floppy", NULL)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
-#define fd_dma_mem_alloc(size) fd_ops->fd_dma_mem_alloc(size)
-#define fd_dma_mem_free(mem,size) fd_ops->fd_dma_mem_free(mem,size)
-#define fd_drive_type(n) fd_ops->fd_drive_type(n)
-#define fd_cacheflush(addr,size) \
- dma_cache_wback_inv((unsigned long)(addr),(size))
-
-#define MAX_BUFFER_SECTORS 24
-
-
-/*
- * And on Mips's the CMOS info fails also ...
- *
- * FIXME: This information should come from the ARC configuration tree
- * or whereever a particular machine has stored this ...
- */
-#define FLOPPY0_TYPE fd_drive_type(0)
-#define FLOPPY1_TYPE fd_drive_type(1)
-
-#define FDC1 fd_ops->fd_getfdaddr1();
-
-#define N_FDC 1 /* do you *really* want a second controller? */
-#define N_DRIVE 8
-
-#define FLOPPY_MOTOR_MASK 0xf0
-
-/*
- * The DMA channel used by the floppy controller cannot access data at
- * addresses >= 16MB
- *
- * Went back to the 1MB limit, as some people had problems with the floppy
- * driver otherwise. It doesn't matter much for performance anyway, as most
- * floppy accesses go through the track buffer.
- *
- * On MIPSes using vdma, this actually means that *all* transfers go thru
- * the * track buffer since 0x1000000 is always smaller than KSEG0/1.
- * Actually this needs to be a bit more complicated since the so much different
- * hardware available with MIPS CPUs ...
- */
-#define CROSS_64KB(a,s) ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64)
-
-#define EXTRA_FLOPPY_PARAMS
-
-#endif /* _ASM_FLOPPY_H */
diff -Nru a/include/asm-mips64/fpregdef.h b/include/asm-mips64/fpregdef.h
--- a/include/asm-mips64/fpregdef.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,50 +0,0 @@
-/*
- * Definitions for the FPU register names
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999 Ralf Baechle
- * Copyright (C) 1985 MIPS Computer Systems, Inc.
- * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_FPREGDEF_H
-#define _ASM_FPREGDEF_H
-
-#define fv0 $f0 /* return value */
-#define fv1 $f2
-#define fa0 $f12 /* argument registers */
-#define fa1 $f13
-#define fa2 $f14
-#define fa3 $f15
-#define fa4 $f16
-#define fa5 $f17
-#define fa6 $f18
-#define fa7 $f19
-#define ft0 $f4 /* caller saved */
-#define ft1 $f5
-#define ft2 $f6
-#define ft3 $f7
-#define ft4 $f8
-#define ft5 $f9
-#define ft6 $f10
-#define ft7 $f11
-#define ft8 $f20
-#define ft9 $f21
-#define ft10 $f22
-#define ft11 $f23
-#define ft12 $f1
-#define ft13 $f3
-#define fs0 $f24 /* callee saved */
-#define fs1 $f25
-#define fs2 $f26
-#define fs3 $f27
-#define fs4 $f28
-#define fs5 $f29
-#define fs6 $f30
-#define fs7 $f31
-
-#define fcr31 $31
-
-#endif /* _ASM_FPREGDEF_H */
diff -Nru a/include/asm-mips64/fpu.h b/include/asm-mips64/fpu.h
--- a/include/asm-mips64/fpu.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,133 +0,0 @@
-/*
- * Copyright (C) 2002 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#ifndef _ASM_FPU_H
-#define _ASM_FPU_H
-
-#include <linux/config.h>
-#include <linux/sched.h>
-#include <linux/thread_info.h>
-
-#include <asm/mipsregs.h>
-#include <asm/cpu.h>
-#include <asm/bitops.h>
-#include <asm/processor.h>
-#include <asm/current.h>
-
-struct sigcontext;
-
-extern asmlinkage int (*save_fp_context)(struct sigcontext *sc);
-extern asmlinkage int (*restore_fp_context)(struct sigcontext *sc);
-
-extern void fpu_emulator_init_fpu(void);
-extern void _init_fpu(void);
-extern void _save_fp(struct task_struct *);
-extern void _restore_fp(struct task_struct *);
-
-#if defined(CONFIG_CPU_SB1)
-#define __enable_fpu_hazard() \
-do { \
- asm(".set push \n\t" \
- ".set mips64 \n\t" \
- ".set noreorder \n\t" \
- "ssnop \n\t" \
- "bnezl $0, .+4 \n\t" \
- "ssnop \n\t" \
- ".set pop"); \
-} while (0)
-#else
-#define __enable_fpu_hazard() \
-do { \
- asm("nop;nop;nop;nop"); /* max. hazard */ \
-} while (0)
-#endif
-
-#define __enable_fpu() \
-do { \
- set_c0_status(ST0_CU1); \
- __enable_fpu_hazard(); \
-} while (0)
-
-#define __disable_fpu() \
-do { \
- clear_c0_status(ST0_CU1); \
- /* We don't care about the c0 hazard here */ \
-} while (0)
-
-#define enable_fpu() \
-do { \
- if (cpu_has_fpu) \
- __enable_fpu(); \
-} while (0)
-
-#define disable_fpu() \
-do { \
- if (cpu_has_fpu) \
- __disable_fpu(); \
-} while (0)
-
-
-#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
-
-static inline int is_fpu_owner(void)
-{
- return cpu_has_fpu && test_thread_flag(TIF_USEDFPU);
-}
-
-static inline void own_fpu(void)
-{
- if (cpu_has_fpu) {
- __enable_fpu();
- KSTK_STATUS(current) |= ST0_CU1;
- set_thread_flag(TIF_USEDFPU);
- }
-}
-
-static inline void loose_fpu(void)
-{
- if (cpu_has_fpu) {
- KSTK_STATUS(current) &= ~ST0_CU1;
- clear_thread_flag(TIF_USEDFPU);
- __disable_fpu();
- }
-}
-
-static inline void init_fpu(void)
-{
- if (cpu_has_fpu) {
- _init_fpu();
- } else {
- fpu_emulator_init_fpu();
- }
-}
-
-static inline void save_fp(struct task_struct *tsk)
-{
- if (cpu_has_fpu)
- _save_fp(tsk);
-}
-
-static inline void restore_fp(struct task_struct *tsk)
-{
- if (cpu_has_fpu)
- _restore_fp(tsk);
-}
-
-static inline unsigned long *get_fpu_regs(struct task_struct *tsk)
-{
- if (cpu_has_fpu) {
- if ((tsk == current) && is_fpu_owner())
- _save_fp(current);
- return (unsigned long *)&tsk->thread.fpu.hard.fp_regs[0];
- } else {
- return (unsigned long *)tsk->thread.fpu.soft.regs;
- }
-}
-
-#endif /* _ASM_FPU_H */
diff -Nru a/include/asm-mips64/fpu_emulator.h b/include/asm-mips64/fpu_emulator.h
--- a/include/asm-mips64/fpu_emulator.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,38 +0,0 @@
-/*
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Further private data for which no space exists in mips_fpu_soft_struct.
- * This should be subsumed into the mips_fpu_soft_struct structure as
- * defined in processor.h as soon as the absurd wired absolute assembler
- * offsets become dynamic at compile time.
- *
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#ifndef _ASM_FPU_EMULATOR_H
-#define _ASM_FPU_EMULATOR_H
-
-struct mips_fpu_emulator_private {
- unsigned int eir;
- struct {
- unsigned int emulated;
- unsigned int loads;
- unsigned int stores;
- unsigned int cp1ops;
- unsigned int cp1xops;
- unsigned int errors;
- } stats;
-};
-
-#endif /* _ASM_FPU_EMULATOR_H */
diff -Nru a/include/asm-mips64/gcc/sgidefs.h b/include/asm-mips64/gcc/sgidefs.h
--- a/include/asm-mips64/gcc/sgidefs.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,17 +0,0 @@
-/*
- * include/sgidefs.h
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 by Ralf Baechle
- *
- * This file is here to satisfy GCC's expectations.
- */
-#ifndef __SGIDEFS_H
-#define __SGIDEFS_H
-
-#include <asm/sgidefs.h>
-
-#endif /* __SGIDEFS_H */
diff -Nru a/include/asm-mips64/gdb-stub.h b/include/asm-mips64/gdb-stub.h
--- a/include/asm-mips64/gdb-stub.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,212 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 Andreas Busse
- */
-#ifndef __ASM_MIPS_GDB_STUB_H
-#define __ASM_MIPS_GDB_STUB_H
-
-
-/*
- * important register numbers
- */
-
-#define REG_EPC 37
-#define REG_FP 72
-#define REG_SP 29
-
-/*
- * Stack layout for the GDB exception handler
- * Derived from the stack layout described in asm-mips/stackframe.h
- *
- * The first PTRSIZE*5 bytes are argument save space for C subroutines.
- */
-#define NUMREGS 90
-
-#define GDB_FR_REG0 (PTRSIZE*5) /* 0 */
-#define GDB_FR_REG1 ((GDB_FR_REG0) + 4) /* 1 */
-#define GDB_FR_REG2 ((GDB_FR_REG1) + 4) /* 2 */
-#define GDB_FR_REG3 ((GDB_FR_REG2) + 4) /* 3 */
-#define GDB_FR_REG4 ((GDB_FR_REG3) + 4) /* 4 */
-#define GDB_FR_REG5 ((GDB_FR_REG4) + 4) /* 5 */
-#define GDB_FR_REG6 ((GDB_FR_REG5) + 4) /* 6 */
-#define GDB_FR_REG7 ((GDB_FR_REG6) + 4) /* 7 */
-#define GDB_FR_REG8 ((GDB_FR_REG7) + 4) /* 8 */
-#define GDB_FR_REG9 ((GDB_FR_REG8) + 4) /* 9 */
-#define GDB_FR_REG10 ((GDB_FR_REG9) + 4) /* 10 */
-#define GDB_FR_REG11 ((GDB_FR_REG10) + 4) /* 11 */
-#define GDB_FR_REG12 ((GDB_FR_REG11) + 4) /* 12 */
-#define GDB_FR_REG13 ((GDB_FR_REG12) + 4) /* 13 */
-#define GDB_FR_REG14 ((GDB_FR_REG13) + 4) /* 14 */
-#define GDB_FR_REG15 ((GDB_FR_REG14) + 4) /* 15 */
-#define GDB_FR_REG16 ((GDB_FR_REG15) + 4) /* 16 */
-#define GDB_FR_REG17 ((GDB_FR_REG16) + 4) /* 17 */
-#define GDB_FR_REG18 ((GDB_FR_REG17) + 4) /* 18 */
-#define GDB_FR_REG19 ((GDB_FR_REG18) + 4) /* 19 */
-#define GDB_FR_REG20 ((GDB_FR_REG19) + 4) /* 20 */
-#define GDB_FR_REG21 ((GDB_FR_REG20) + 4) /* 21 */
-#define GDB_FR_REG22 ((GDB_FR_REG21) + 4) /* 22 */
-#define GDB_FR_REG23 ((GDB_FR_REG22) + 4) /* 23 */
-#define GDB_FR_REG24 ((GDB_FR_REG23) + 4) /* 24 */
-#define GDB_FR_REG25 ((GDB_FR_REG24) + 4) /* 25 */
-#define GDB_FR_REG26 ((GDB_FR_REG25) + 4) /* 26 */
-#define GDB_FR_REG27 ((GDB_FR_REG26) + 4) /* 27 */
-#define GDB_FR_REG28 ((GDB_FR_REG27) + 4) /* 28 */
-#define GDB_FR_REG29 ((GDB_FR_REG28) + 4) /* 29 */
-#define GDB_FR_REG30 ((GDB_FR_REG29) + 4) /* 30 */
-#define GDB_FR_REG31 ((GDB_FR_REG30) + 4) /* 31 */
-
-/*
- * Saved special registers
- */
-#define GDB_FR_STATUS ((GDB_FR_REG31) + 4) /* 32 */
-#define GDB_FR_LO ((GDB_FR_STATUS) + 4) /* 33 */
-#define GDB_FR_HI ((GDB_FR_LO) + 4) /* 34 */
-#define GDB_FR_BADVADDR ((GDB_FR_HI) + 4) /* 35 */
-#define GDB_FR_CAUSE ((GDB_FR_BADVADDR) + 4) /* 36 */
-#define GDB_FR_EPC ((GDB_FR_CAUSE) + 4) /* 37 */
-
-/*
- * Saved floating point registers
- */
-#define GDB_FR_FPR0 ((GDB_FR_EPC) + 4) /* 38 */
-#define GDB_FR_FPR1 ((GDB_FR_FPR0) + 4) /* 39 */
-#define GDB_FR_FPR2 ((GDB_FR_FPR1) + 4) /* 40 */
-#define GDB_FR_FPR3 ((GDB_FR_FPR2) + 4) /* 41 */
-#define GDB_FR_FPR4 ((GDB_FR_FPR3) + 4) /* 42 */
-#define GDB_FR_FPR5 ((GDB_FR_FPR4) + 4) /* 43 */
-#define GDB_FR_FPR6 ((GDB_FR_FPR5) + 4) /* 44 */
-#define GDB_FR_FPR7 ((GDB_FR_FPR6) + 4) /* 45 */
-#define GDB_FR_FPR8 ((GDB_FR_FPR7) + 4) /* 46 */
-#define GDB_FR_FPR9 ((GDB_FR_FPR8) + 4) /* 47 */
-#define GDB_FR_FPR10 ((GDB_FR_FPR9) + 4) /* 48 */
-#define GDB_FR_FPR11 ((GDB_FR_FPR10) + 4) /* 49 */
-#define GDB_FR_FPR12 ((GDB_FR_FPR11) + 4) /* 50 */
-#define GDB_FR_FPR13 ((GDB_FR_FPR12) + 4) /* 51 */
-#define GDB_FR_FPR14 ((GDB_FR_FPR13) + 4) /* 52 */
-#define GDB_FR_FPR15 ((GDB_FR_FPR14) + 4) /* 53 */
-#define GDB_FR_FPR16 ((GDB_FR_FPR15) + 4) /* 54 */
-#define GDB_FR_FPR17 ((GDB_FR_FPR16) + 4) /* 55 */
-#define GDB_FR_FPR18 ((GDB_FR_FPR17) + 4) /* 56 */
-#define GDB_FR_FPR19 ((GDB_FR_FPR18) + 4) /* 57 */
-#define GDB_FR_FPR20 ((GDB_FR_FPR19) + 4) /* 58 */
-#define GDB_FR_FPR21 ((GDB_FR_FPR20) + 4) /* 59 */
-#define GDB_FR_FPR22 ((GDB_FR_FPR21) + 4) /* 60 */
-#define GDB_FR_FPR23 ((GDB_FR_FPR22) + 4) /* 61 */
-#define GDB_FR_FPR24 ((GDB_FR_FPR23) + 4) /* 62 */
-#define GDB_FR_FPR25 ((GDB_FR_FPR24) + 4) /* 63 */
-#define GDB_FR_FPR26 ((GDB_FR_FPR25) + 4) /* 64 */
-#define GDB_FR_FPR27 ((GDB_FR_FPR26) + 4) /* 65 */
-#define GDB_FR_FPR28 ((GDB_FR_FPR27) + 4) /* 66 */
-#define GDB_FR_FPR29 ((GDB_FR_FPR28) + 4) /* 67 */
-#define GDB_FR_FPR30 ((GDB_FR_FPR29) + 4) /* 68 */
-#define GDB_FR_FPR31 ((GDB_FR_FPR30) + 4) /* 69 */
-
-#define GDB_FR_FSR ((GDB_FR_FPR31) + 4) /* 70 */
-#define GDB_FR_FIR ((GDB_FR_FSR) + 4) /* 71 */
-#define GDB_FR_FRP ((GDB_FR_FIR) + 4) /* 72 */
-
-#define GDB_FR_DUMMY ((GDB_FR_FRP) + 4) /* 73, unused ??? */
-
-/*
- * Again, CP0 registers
- */
-#define GDB_FR_CP0_INDEX ((GDB_FR_DUMMY) + 4) /* 74 */
-#define GDB_FR_CP0_RANDOM ((GDB_FR_CP0_INDEX) + 4) /* 75 */
-#define GDB_FR_CP0_ENTRYLO0 ((GDB_FR_CP0_RANDOM) + 4) /* 76 */
-#define GDB_FR_CP0_ENTRYLO1 ((GDB_FR_CP0_ENTRYLO0) + 4) /* 77 */
-#define GDB_FR_CP0_CONTEXT ((GDB_FR_CP0_ENTRYLO1) + 4) /* 78 */
-#define GDB_FR_CP0_PAGEMASK ((GDB_FR_CP0_CONTEXT) + 4) /* 79 */
-#define GDB_FR_CP0_WIRED ((GDB_FR_CP0_PAGEMASK) + 4) /* 80 */
-#define GDB_FR_CP0_REG7 ((GDB_FR_CP0_WIRED) + 4) /* 81 */
-#define GDB_FR_CP0_REG8 ((GDB_FR_CP0_REG7) + 4) /* 82 */
-#define GDB_FR_CP0_REG9 ((GDB_FR_CP0_REG8) + 4) /* 83 */
-#define GDB_FR_CP0_ENTRYHI ((GDB_FR_CP0_REG9) + 4) /* 84 */
-#define GDB_FR_CP0_REG11 ((GDB_FR_CP0_ENTRYHI) + 4) /* 85 */
-#define GDB_FR_CP0_REG12 ((GDB_FR_CP0_REG11) + 4) /* 86 */
-#define GDB_FR_CP0_REG13 ((GDB_FR_CP0_REG12) + 4) /* 87 */
-#define GDB_FR_CP0_REG14 ((GDB_FR_CP0_REG13) + 4) /* 88 */
-#define GDB_FR_CP0_PRID ((GDB_FR_CP0_REG14) + 4) /* 89 */
-
-#define GDB_FR_SIZE ((((GDB_FR_CP0_PRID) + 4) + (PTRSIZE-1)) & ~(PTRSIZE-1))
-
-#ifndef __ASSEMBLY__
-
-/*
- * This is the same as above, but for the high-level
- * part of the GDB stub.
- */
-
-struct gdb_regs {
- /*
- * Pad bytes for argument save space on the stack
- * 20/40 Bytes for 32/64 bit code
- */
- unsigned long pad0[5];
-
- /*
- * saved main processor registers
- */
- long reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7;
- long reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15;
- long reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23;
- long reg24, reg25, reg26, reg27, reg28, reg29, reg30, reg31;
-
- /*
- * Saved special registers
- */
- long cp0_status;
- long lo;
- long hi;
- long cp0_badvaddr;
- long cp0_cause;
- long cp0_epc;
-
- /*
- * Saved floating point registers
- */
- long fpr0, fpr1, fpr2, fpr3, fpr4, fpr5, fpr6, fpr7;
- long fpr8, fpr9, fpr10, fpr11, fpr12, fpr13, fpr14, fpr15;
- long fpr16, fpr17, fpr18, fpr19, fpr20, fpr21, fpr22, fpr23;
- long fpr24, fpr25, fpr26, fpr27, fpr28, fpr29, fpr30, fpr31;
-
- long cp1_fsr;
- long cp1_fir;
-
- /*
- * Frame pointer
- */
- long frame_ptr;
- long dummy; /* unused */
-
- /*
- * saved cp0 registers
- */
- long cp0_index;
- long cp0_random;
- long cp0_entrylo0;
- long cp0_entrylo1;
- long cp0_context;
- long cp0_pagemask;
- long cp0_wired;
- long cp0_reg7;
- long cp0_reg8;
- long cp0_reg9;
- long cp0_entryhi;
- long cp0_reg11;
- long cp0_reg12;
- long cp0_reg13;
- long cp0_reg14;
- long cp0_prid;
-};
-
-/*
- * Prototypes
- */
-
-void set_debug_traps(void);
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __ASM_MIPS_GDB_STUB_H */
diff -Nru a/include/asm-mips64/gfx.h b/include/asm-mips64/gfx.h
--- a/include/asm-mips64/gfx.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,55 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This is the user-visible SGI GFX interface.
- *
- * This must be used verbatim into the GNU libc. It does not include
- * any kernel-only bits on it.
- *
- * miguel@nuclecu.unam.mx
- */
-#ifndef _ASM_GFX_H
-#define _ASM_GFX_H
-
-/* The iocls, yes, they do not make sense, but such is life */
-#define GFX_BASE 100
-#define GFX_GETNUM_BOARDS (GFX_BASE + 1)
-#define GFX_GETBOARD_INFO (GFX_BASE + 2)
-#define GFX_ATTACH_BOARD (GFX_BASE + 3)
-#define GFX_DETACH_BOARD (GFX_BASE + 4)
-#define GFX_IS_MANAGED (GFX_BASE + 5)
-
-#define GFX_MAPALL (GFX_BASE + 10)
-#define GFX_LABEL (GFX_BASE + 11)
-
-#define GFX_INFO_NAME_SIZE 16
-#define GFX_INFO_LABEL_SIZE 16
-
-struct gfx_info {
- char name [GFX_INFO_NAME_SIZE]; /* board name */
- char label [GFX_INFO_LABEL_SIZE]; /* label name */
- unsigned short int xpmax, ypmax; /* screen resolution */
- unsigned int lenght; /* size of a complete gfx_info for this board */
-};
-
-struct gfx_getboardinfo_args {
- unsigned int board; /* board number. starting from zero */
- void *buf; /* pointer to gfx_info */
- unsigned int len; /* buffer size of buf */
-};
-
-struct gfx_attach_board_args {
- unsigned int board; /* board number, starting from zero */
- void *vaddr; /* address where the board registers should be mapped */
-};
-
-#ifdef __KERNEL__
-/* umap.c */
-extern void remove_mapping (struct vm_area_struct *vma, struct task_struct *, unsigned long, unsigned long);
-extern void *vmalloc_uncached (unsigned long size);
-extern int vmap_page_range (struct vm_area_struct *vma, unsigned long from, unsigned long size, unsigned long vaddr);
-#endif
-
-#endif /* _ASM_GFX_H */
diff -Nru a/include/asm-mips64/gt64120.h b/include/asm-mips64/gt64120.h
--- a/include/asm-mips64/gt64120.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,399 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#ifndef _ASM_GT64120_H
-#define _ASM_GT64120_H
-
-#define MSK(n) ((1 << (n)) - 1)
-
-/*
- * Register offset addresses
- */
-#define GT_CPU_OFS 0x000
-
-/*
- * Interrupt Registers
- */
-#define GT_SCS10LD_OFS 0x008
-#define GT_SCS10HD_OFS 0x010
-#define GT_SCS32LD_OFS 0x018
-#define GT_SCS32HD_OFS 0x020
-#define GT_CS20LD_OFS 0x028
-#define GT_CS20HD_OFS 0x030
-#define GT_CS3BOOTLD_OFS 0x038
-#define GT_CS3BOOTHD_OFS 0x040
-#define GT_PCI0IOLD_OFS 0x048
-#define GT_PCI0IOHD_OFS 0x050
-#define GT_PCI0M0LD_OFS 0x058
-#define GT_PCI0M0HD_OFS 0x060
-#define GT_ISD_OFS 0x068
-#define GT_PCI0M1LD_OFS 0x080
-#define GT_PCI0M1HD_OFS 0x088
-#define GT_PCI1IOLD_OFS 0x090
-#define GT_PCI1IOHD_OFS 0x098
-#define GT_PCI1M0LD_OFS 0x0a0
-#define GT_PCI1M0HD_OFS 0x0a8
-#define GT_PCI1M1LD_OFS 0x0b0
-#define GT_PCI1M1HD_OFS 0x0b8
-
-/*
- * GT64120A only
- */
-#define GT_PCI0IOREMAP_OFS 0x0f0
-#define GT_PCI0M0REMAP_OFS 0x0f8
-#define GT_PCI0M1REMAP_OFS 0x100
-#define GT_PCI1IOREMAP_OFS 0x108
-#define GT_PCI1M0REMAP_OFS 0x110
-#define GT_PCI1M1REMAP_OFS 0x118
-
-#define GT_SCS0LD_OFS 0x400
-#define GT_SCS0HD_OFS 0x404
-#define GT_SCS1LD_OFS 0x408
-#define GT_SCS1HD_OFS 0x40c
-#define GT_SCS2LD_OFS 0x410
-#define GT_SCS2HD_OFS 0x414
-#define GT_SCS3LD_OFS 0x418
-#define GT_SCS3HD_OFS 0x41c
-#define GT_CS0LD_OFS 0x420
-#define GT_CS0HD_OFS 0x424
-#define GT_CS1LD_OFS 0x428
-#define GT_CS1HD_OFS 0x42c
-#define GT_CS2LD_OFS 0x430
-#define GT_CS2HD_OFS 0x434
-#define GT_CS3LD_OFS 0x438
-#define GT_CS3HD_OFS 0x43c
-#define GT_BOOTLD_OFS 0x440
-#define GT_BOOTHD_OFS 0x444
-
-#define GT_SDRAM_B0_OFS 0x44c
-#define GT_SDRAM_CFG_OFS 0x448
-#define GT_SDRAM_B2_OFS 0x454
-#define GT_SDRAM_OPMODE_OFS 0x474
-#define GT_SDRAM_BM_OFS 0x478
-#define GT_SDRAM_ADDRDECODE_OFS 0x47c
-
-#define GT_PCI0_CMD_OFS 0xc00 /* GT64120A only */
-#define GT_PCI0_TOR_OFS 0xc04
-#define GT_PCI0_BS_SCS10_OFS 0xc08
-#define GT_PCI0_BS_SCS32_OFS 0xc0c
-#define GT_INTRCAUSE_OFS 0xc18
-#define GT_INTRMASK_OFS 0xc1c /* GT64120A only */
-#define GT_PCI0_IACK_OFS 0xc34
-#define GT_PCI0_BARE_OFS 0xc3c
-#define GT_HINTRCAUSE_OFS 0xc98 /* GT64120A only */
-#define GT_HINTRMASK_OFS 0xc9c /* GT64120A only */
-#define GT_PCI1_CFGADDR_OFS 0xcf0 /* GT64120A only */
-#define GT_PCI1_CFGDATA_OFS 0xcf4 /* GT64120A only */
-#define GT_PCI0_CFGADDR_OFS 0xcf8
-#define GT_PCI0_CFGDATA_OFS 0xcfc
-
-
-/*
- * Timer/Counter. GT64120A only.
- */
-#define GT_TC0_OFS 0x850
-#define GT_TC1_OFS 0x854
-#define GT_TC2_OFS 0x858
-#define GT_TC3_OFS 0x85C
-#define GT_TC_CONTROL_OFS 0x864
-
-/*
- * I2O Support Registers
- */
-#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x010
-#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x014
-#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x018
-#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x01c
-#define INBOUND_DOORBELL_REGISTER_PCI_SIDE 0x020
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x024
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x028
-#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE 0x02c
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x030
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x034
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x040
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x044
-#define QUEUE_CONTROL_REGISTER_PCI_SIDE 0x050
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE 0x054
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x060
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x064
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x068
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x06c
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x070
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x074
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x078
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x07c
-
-#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c10
-#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c14
-#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c18
-#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c1c
-#define INBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c20
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c24
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c28
-#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c2c
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c30
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c34
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c40
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c44
-#define QUEUE_CONTROL_REGISTER_CPU_SIDE 0x1c50
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE 0x1c54
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c60
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c64
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c68
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c6c
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c70
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c74
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c78
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c7c
-
-/*
- * Register encodings
- */
-#define GT_CPU_ENDIAN_SHF 12
-#define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF)
-#define GT_CPU_ENDIAN_BIT GT_CPU_ENDIAN_MSK
-#define GT_CPU_WR_SHF 16
-#define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF)
-#define GT_CPU_WR_BIT GT_CPU_WR_MSK
-#define GT_CPU_WR_DXDXDXDX 0
-#define GT_CPU_WR_DDDD 1
-
-
-#define GT_CFGADDR_CFGEN_SHF 31
-#define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF)
-#define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK
-
-#define GT_CFGADDR_BUSNUM_SHF 16
-#define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF)
-
-#define GT_CFGADDR_DEVNUM_SHF 11
-#define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF)
-
-#define GT_CFGADDR_FUNCNUM_SHF 8
-#define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF)
-
-#define GT_CFGADDR_REGNUM_SHF 2
-#define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF)
-
-
-#define GT_SDRAM_BM_ORDER_SHF 2
-#define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF)
-#define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK
-#define GT_SDRAM_BM_ORDER_SUB 1
-#define GT_SDRAM_BM_ORDER_LIN 0
-
-#define GT_SDRAM_BM_RSVD_ALL1 0xffb
-
-
-#define GT_SDRAM_ADDRDECODE_ADDR_SHF 0
-#define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
-#define GT_SDRAM_ADDRDECODE_ADDR_0 0
-#define GT_SDRAM_ADDRDECODE_ADDR_1 1
-#define GT_SDRAM_ADDRDECODE_ADDR_2 2
-#define GT_SDRAM_ADDRDECODE_ADDR_3 3
-#define GT_SDRAM_ADDRDECODE_ADDR_4 4
-#define GT_SDRAM_ADDRDECODE_ADDR_5 5
-#define GT_SDRAM_ADDRDECODE_ADDR_6 6
-#define GT_SDRAM_ADDRDECODE_ADDR_7 7
-
-
-#define GT_SDRAM_B0_CASLAT_SHF 0
-#define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF)
-#define GT_SDRAM_B0_CASLAT_2 1
-#define GT_SDRAM_B0_CASLAT_3 2
-
-#define GT_SDRAM_B0_FTDIS_SHF 2
-#define GT_SDRAM_B0_FTDIS_MSK (MSK(1) << GT_SDRAM_B0_FTDIS_SHF)
-#define GT_SDRAM_B0_FTDIS_BIT GT_SDRAM_B0_FTDIS_MSK
-
-#define GT_SDRAM_B0_SRASPRCHG_SHF 3
-#define GT_SDRAM_B0_SRASPRCHG_MSK (MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF)
-#define GT_SDRAM_B0_SRASPRCHG_BIT GT_SDRAM_B0_SRASPRCHG_MSK
-#define GT_SDRAM_B0_SRASPRCHG_2 0
-#define GT_SDRAM_B0_SRASPRCHG_3 1
-
-#define GT_SDRAM_B0_B0COMPAB_SHF 4
-#define GT_SDRAM_B0_B0COMPAB_MSK (MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF)
-#define GT_SDRAM_B0_B0COMPAB_BIT GT_SDRAM_B0_B0COMPAB_MSK
-
-#define GT_SDRAM_B0_64BITINT_SHF 5
-#define GT_SDRAM_B0_64BITINT_MSK (MSK(1) << GT_SDRAM_B0_64BITINT_SHF)
-#define GT_SDRAM_B0_64BITINT_BIT GT_SDRAM_B0_64BITINT_MSK
-#define GT_SDRAM_B0_64BITINT_2 0
-#define GT_SDRAM_B0_64BITINT_4 1
-
-#define GT_SDRAM_B0_BW_SHF 6
-#define GT_SDRAM_B0_BW_MSK (MSK(1) << GT_SDRAM_B0_BW_SHF)
-#define GT_SDRAM_B0_BW_BIT GT_SDRAM_B0_BW_MSK
-#define GT_SDRAM_B0_BW_32 0
-#define GT_SDRAM_B0_BW_64 1
-
-#define GT_SDRAM_B0_BLODD_SHF 7
-#define GT_SDRAM_B0_BLODD_MSK (MSK(1) << GT_SDRAM_B0_BLODD_SHF)
-#define GT_SDRAM_B0_BLODD_BIT GT_SDRAM_B0_BLODD_MSK
-
-#define GT_SDRAM_B0_PAR_SHF 8
-#define GT_SDRAM_B0_PAR_MSK (MSK(1) << GT_SDRAM_B0_PAR_SHF)
-#define GT_SDRAM_B0_PAR_BIT GT_SDRAM_B0_PAR_MSK
-
-#define GT_SDRAM_B0_BYPASS_SHF 9
-#define GT_SDRAM_B0_BYPASS_MSK (MSK(1) << GT_SDRAM_B0_BYPASS_SHF)
-#define GT_SDRAM_B0_BYPASS_BIT GT_SDRAM_B0_BYPASS_MSK
-
-#define GT_SDRAM_B0_SRAS2SCAS_SHF 10
-#define GT_SDRAM_B0_SRAS2SCAS_MSK (MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF)
-#define GT_SDRAM_B0_SRAS2SCAS_BIT GT_SDRAM_B0_SRAS2SCAS_MSK
-#define GT_SDRAM_B0_SRAS2SCAS_2 0
-#define GT_SDRAM_B0_SRAS2SCAS_3 1
-
-#define GT_SDRAM_B0_SIZE_SHF 11
-#define GT_SDRAM_B0_SIZE_MSK (MSK(1) << GT_SDRAM_B0_SIZE_SHF)
-#define GT_SDRAM_B0_SIZE_BIT GT_SDRAM_B0_SIZE_MSK
-#define GT_SDRAM_B0_SIZE_16M 0
-#define GT_SDRAM_B0_SIZE_64M 1
-
-#define GT_SDRAM_B0_EXTPAR_SHF 12
-#define GT_SDRAM_B0_EXTPAR_MSK (MSK(1) << GT_SDRAM_B0_EXTPAR_SHF)
-#define GT_SDRAM_B0_EXTPAR_BIT GT_SDRAM_B0_EXTPAR_MSK
-
-#define GT_SDRAM_B0_BLEN_SHF 13
-#define GT_SDRAM_B0_BLEN_MSK (MSK(1) << GT_SDRAM_B0_BLEN_SHF)
-#define GT_SDRAM_B0_BLEN_BIT GT_SDRAM_B0_BLEN_MSK
-#define GT_SDRAM_B0_BLEN_8 0
-#define GT_SDRAM_B0_BLEN_4 1
-
-
-#define GT_SDRAM_CFG_REFINT_SHF 0
-#define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
-
-#define GT_SDRAM_CFG_NINTERLEAVE_SHF 14
-#define GT_SDRAM_CFG_NINTERLEAVE_MSK (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF)
-#define GT_SDRAM_CFG_NINTERLEAVE_BIT GT_SDRAM_CFG_NINTERLEAVE_MSK
-
-#define GT_SDRAM_CFG_RMW_SHF 15
-#define GT_SDRAM_CFG_RMW_MSK (MSK(1) << GT_SDRAM_CFG_RMW_SHF)
-#define GT_SDRAM_CFG_RMW_BIT GT_SDRAM_CFG_RMW_MSK
-
-#define GT_SDRAM_CFG_NONSTAGREF_SHF 16
-#define GT_SDRAM_CFG_NONSTAGREF_MSK (MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF)
-#define GT_SDRAM_CFG_NONSTAGREF_BIT GT_SDRAM_CFG_NONSTAGREF_MSK
-
-#define GT_SDRAM_CFG_DUPCNTL_SHF 19
-#define GT_SDRAM_CFG_DUPCNTL_MSK (MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF)
-#define GT_SDRAM_CFG_DUPCNTL_BIT GT_SDRAM_CFG_DUPCNTL_MSK
-
-#define GT_SDRAM_CFG_DUPBA_SHF 20
-#define GT_SDRAM_CFG_DUPBA_MSK (MSK(1) << GT_SDRAM_CFG_DUPBA_SHF)
-#define GT_SDRAM_CFG_DUPBA_BIT GT_SDRAM_CFG_DUPBA_MSK
-
-#define GT_SDRAM_CFG_DUPEOT0_SHF 21
-#define GT_SDRAM_CFG_DUPEOT0_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF)
-#define GT_SDRAM_CFG_DUPEOT0_BIT GT_SDRAM_CFG_DUPEOT0_MSK
-
-#define GT_SDRAM_CFG_DUPEOT1_SHF 22
-#define GT_SDRAM_CFG_DUPEOT1_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF)
-#define GT_SDRAM_CFG_DUPEOT1_BIT GT_SDRAM_CFG_DUPEOT1_MSK
-
-#define GT_SDRAM_OPMODE_OP_SHF 0
-#define GT_SDRAM_OPMODE_OP_MSK (MSK(3) << GT_SDRAM_OPMODE_OP_SHF)
-#define GT_SDRAM_OPMODE_OP_NORMAL 0
-#define GT_SDRAM_OPMODE_OP_NOP 1
-#define GT_SDRAM_OPMODE_OP_PRCHG 2
-#define GT_SDRAM_OPMODE_OP_MODE 3
-#define GT_SDRAM_OPMODE_OP_CBR 4
-
-
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT GT_PCI0_BARE_SWSCS3BOOTDIS_MSK
-
-#define GT_PCI0_BARE_SWSCS32DIS_SHF 1
-#define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
-#define GT_PCI0_BARE_SWSCS32DIS_BIT GT_PCI0_BARE_SWSCS32DIS_MSK
-
-#define GT_PCI0_BARE_SWSCS10DIS_SHF 2
-#define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
-#define GT_PCI0_BARE_SWSCS10DIS_BIT GT_PCI0_BARE_SWSCS10DIS_MSK
-
-#define GT_PCI0_BARE_INTIODIS_SHF 3
-#define GT_PCI0_BARE_INTIODIS_MSK (MSK(1) << GT_PCI0_BARE_INTIODIS_SHF)
-#define GT_PCI0_BARE_INTIODIS_BIT GT_PCI0_BARE_INTIODIS_MSK
-
-#define GT_PCI0_BARE_INTMEMDIS_SHF 4
-#define GT_PCI0_BARE_INTMEMDIS_MSK (MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF)
-#define GT_PCI0_BARE_INTMEMDIS_BIT GT_PCI0_BARE_INTMEMDIS_MSK
-
-#define GT_PCI0_BARE_CS3BOOTDIS_SHF 5
-#define GT_PCI0_BARE_CS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF)
-#define GT_PCI0_BARE_CS3BOOTDIS_BIT GT_PCI0_BARE_CS3BOOTDIS_MSK
-
-#define GT_PCI0_BARE_CS20DIS_SHF 6
-#define GT_PCI0_BARE_CS20DIS_MSK (MSK(1) << GT_PCI0_BARE_CS20DIS_SHF)
-#define GT_PCI0_BARE_CS20DIS_BIT GT_PCI0_BARE_CS20DIS_MSK
-
-#define GT_PCI0_BARE_SCS32DIS_SHF 7
-#define GT_PCI0_BARE_SCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF)
-#define GT_PCI0_BARE_SCS32DIS_BIT GT_PCI0_BARE_SCS32DIS_MSK
-
-#define GT_PCI0_BARE_SCS10DIS_SHF 8
-#define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
-#define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK
-
-
-#define GT_INTRCAUSE_MASABORT0_SHF 18
-#define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
-#define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK
-
-#define GT_INTRCAUSE_TARABORT0_SHF 19
-#define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
-#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
-
-
-#define GT_PCI0_CFGADDR_REGNUM_SHF 2
-#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
-#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8
-#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
-#define GT_PCI0_CFGADDR_DEVNUM_SHF 11
-#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
-#define GT_PCI0_CFGADDR_BUSNUM_SHF 16
-#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31
-#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
-
-#define GT_PCI0_CMD_MBYTESWAP_SHF 0
-#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
-#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK
-#define GT_PCI0_CMD_MWORDSWAP_SHF 10
-#define GT_PCI0_CMD_MWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF)
-#define GT_PCI0_CMD_MWORDSWAP_BIT GT_PCI0_CMD_MWORDSWAP_MSK
-#define GT_PCI0_CMD_SBYTESWAP_SHF 16
-#define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
-#define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK
-#define GT_PCI0_CMD_SWORDSWAP_SHF 11
-#define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
-#define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK
-
-/*
- * Misc
- */
-#define GT_DEF_BASE 0x14000000
-#define GT_DEF_PCI0_MEM0_BASE 0x12000000
-#define GT_MAX_BANKSIZE (256 * 1024 * 1024) /* Max 256MB bank */
-#define GT_LATTIM_MIN 6 /* Minimum lat */
-
-#endif /* _ASM_GT64120_H */
diff -Nru a/include/asm-mips64/hardirq.h b/include/asm-mips64/hardirq.h
--- a/include/asm-mips64/hardirq.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,105 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#ifndef _ASM_HARDIRQ_H
-#define _ASM_HARDIRQ_H
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-typedef struct {
- unsigned int __softirq_pending;
- unsigned int __syscall_count;
- struct task_struct * __ksoftirqd_task; /* waitqueue is too large */
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-
-/*
- * We put the hardirq and softirq counter into the preemption
- * counter. The bitmask has the following meaning:
- *
- * - bits 0-7 are the preemption count (max preemption depth: 256)
- * - bits 8-15 are the softirq count (max # of softirqs: 256)
- * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
- *
- * - ( bit 26 is the PREEMPT_ACTIVE flag. )
- *
- * PREEMPT_MASK: 0x000000ff
- * SOFTIRQ_MASK: 0x0000ff00
- * HARDIRQ_MASK: 0x00ff0000
- */
-
-#define PREEMPT_BITS 8
-#define SOFTIRQ_BITS 8
-#define HARDIRQ_BITS 8
-
-#define PREEMPT_SHIFT 0
-#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
-#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
-
-#define __MASK(x) ((1UL << (x))-1)
-
-#define PREEMPT_MASK (__MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
-#define HARDIRQ_MASK (__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
-#define SOFTIRQ_MASK (__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
-
-#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
-#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
-#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
-
-#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
-#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
-#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
-
-/*
- * The hardirq mask has to be large enough to have
- * space for potentially all IRQ sources in the system
- * nesting on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
-/*
- * Are we doing bottom half or hardware interrupt processing?
- * Are we in a softirq context? Interrupt context?
- */
-#define in_irq() (hardirq_count())
-#define in_softirq() (softirq_count())
-#define in_interrupt() (irq_count())
-
-#define hardirq_trylock() (!in_interrupt())
-#define hardirq_endlock() do { } while (0)
-
-#define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
-
-#if CONFIG_PREEMPT
-# define in_atomic() (preempt_count() != kernel_locked())
-# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
-#else
-# define in_atomic() (preempt_count() != 0)
-# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
-#endif
-#define irq_exit() \
-do { \
- preempt_count() -= IRQ_EXIT_OFFSET; \
- if (!in_interrupt() && softirq_pending(smp_processor_id())) \
- do_softirq(); \
- preempt_enable_no_resched(); \
-} while (0)
-
-#ifndef CONFIG_SMP
-# define synchronize_irq(irq) barrier()
-#else
- extern void synchronize_irq(unsigned int irq);
-#endif /* CONFIG_SMP */
-
-#endif /* _ASM_HARDIRQ_H */
diff -Nru a/include/asm-mips64/hdreg.h b/include/asm-mips64/hdreg.h
--- a/include/asm-mips64/hdreg.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,18 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This file contains the MIPS architecture specific IDE code.
- *
- * Copyright (C) 1994-1996 Linus Torvalds & authors
- * Copyright (C) 2001 Ralf Baechle
- */
-
-#ifndef _ASM_HDREG_H
-#define _ASM_HDREG_H
-
-typedef unsigned long ide_ioreg_t;
-
-#endif /* _ASM_HDREG_H */
-
diff -Nru a/include/asm-mips64/hw_irq.h b/include/asm-mips64/hw_irq.h
--- a/include/asm-mips64/hw_irq.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,31 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000, 2001, 2002 by Ralf Baechle
- */
-#ifndef __ASM_HW_IRQ_H
-#define __ASM_HW_IRQ_H
-
-#include <linux/profile.h>
-#include <asm/atomic.h>
-
-extern void mask_irq(unsigned int irq);
-extern void unmask_irq(unsigned int irq);
-extern void disable_8259A_irq(unsigned int irq);
-extern void enable_8259A_irq(unsigned int irq);
-extern int i8259A_irq_pending(unsigned int irq);
-extern void make_8259A_irq(unsigned int irq);
-extern void init_8259A(int aeoi);
-
-#include <asm/atomic.h>
-
-extern atomic_t irq_err_count;
-
-/* This may not be apropriate for all machines, we'll see ... */
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
-{
-}
-
-#endif /* __ASM_HW_IRQ_H */
diff -Nru a/include/asm-mips64/i8259.h b/include/asm-mips64/i8259.h
--- a/include/asm-mips64/i8259.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,23 +0,0 @@
-/*
- * include/asm-mips/i8259.h
- *
- * i8259A interrupt definitions.
- *
- * Copyright (C) 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS64_I8259_H
-#define __ASM_MIPS64_I8259_H
-
-#include <linux/spinlock.h>
-
-#include <asm/io.h>
-#include <asm/system.h>
-
-extern void init_i8259_irqs(void);
-
-#endif /* __ASM_MIPS64_I8259_H */
diff -Nru a/include/asm-mips64/ide.h b/include/asm-mips64/ide.h
--- a/include/asm-mips64/ide.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,74 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This file contains the MIPS architecture specific IDE code.
- *
- * Copyright (C) 1994-1996 Linus Torvalds & authors
- */
-
-#ifndef __ASM_IDE_H
-#define __ASM_IDE_H
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-#include <asm/byteorder.h>
-#include <asm/io.h>
-
-#ifndef MAX_HWIFS
-# ifdef CONFIG_PCI
-#define MAX_HWIFS 10
-# else
-#define MAX_HWIFS 6
-# endif
-#endif
-
-struct ide_ops {
- int (*ide_default_irq)(ide_ioreg_t base);
- ide_ioreg_t (*ide_default_io_base)(int index);
- void (*ide_init_hwif_ports)(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq);
-};
-
-extern struct ide_ops *ide_ops;
-
-static __inline__ int ide_default_irq(ide_ioreg_t base)
-{
- return ide_ops->ide_default_irq(base);
-}
-
-static __inline__ ide_ioreg_t ide_default_io_base(int index)
-{
- return ide_ops->ide_default_io_base(index);
-}
-
-static inline void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
-}
-
-static __inline__ void ide_init_default_hwifs(void)
-{
-#ifndef CONFIG_PCI
- hw_regs_t hw;
- int index;
-
- for(index = 0; index < MAX_HWIFS; index++) {
- ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
- hw.irq = ide_default_irq(ide_default_io_base(index));
- ide_register_hw(&hw, NULL);
- }
-#endif
-}
-
-#define __ide_mm_insw ide_insw
-#define __ide_mm_insl ide_insl
-#define __ide_mm_outsw ide_outsw
-#define __ide_mm_outsl ide_outsl
-
-#endif /* __KERNEL__ */
-
-#endif /* __ASM_IDE_H */
diff -Nru a/include/asm-mips64/init.h b/include/asm-mips64/init.h
--- a/include/asm-mips64/init.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1 +0,0 @@
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
diff -Nru a/include/asm-mips64/inst.h b/include/asm-mips64/inst.h
--- a/include/asm-mips64/inst.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,371 +0,0 @@
-/*
- * Format of an instruction in memory.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 2000 by Ralf Baechle
- */
-#ifndef _ASM_INST_H
-#define _ASM_INST_H
-
-/*
- * Major opcodes; before MIPS IV cop1x was called cop3.
- */
-enum major_op {
- spec_op, bcond_op, j_op, jal_op,
- beq_op, bne_op, blez_op, bgtz_op,
- addi_op, addiu_op, slti_op, sltiu_op,
- andi_op, ori_op, xori_op, lui_op,
- cop0_op, cop1_op, cop2_op, cop1x_op,
- beql_op, bnel_op, blezl_op, bgtzl_op,
- daddi_op, daddiu_op, ldl_op, ldr_op,
- major_1c_op, jalx_op, major_1e_op, major_1f_op,
- lb_op, lh_op, lwl_op, lw_op,
- lbu_op, lhu_op, lwr_op, lwu_op,
- sb_op, sh_op, swl_op, sw_op,
- sdl_op, sdr_op, swr_op, cache_op,
- ll_op, lwc1_op, lwc2_op, pref_op,
- lld_op, ldc1_op, ldc2_op, ld_op,
- sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */
- scd_op, sdc1_op, sdc2_op, sd_op
-};
-
-/*
- * func field of spec opcode.
- */
-enum spec_op {
- sll_op, movc_op, srl_op, sra_op,
- sllv_op, srlv_op, srav_op, spec1_unused_op, /* Opcode 0x07 is unused */
- jr_op, jalr_op, movz_op, movn_op,
- syscall_op, break_op, spim_op, sync_op,
- mfhi_op, mthi_op, mflo_op, mtlo_op,
- dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op,
- mult_op, multu_op, div_op, divu_op,
- dmult_op, dmultu_op, ddiv_op, ddivu_op,
- add_op, addu_op, sub_op, subu_op,
- and_op, or_op, xor_op, nor_op,
- spec3_unused_op, spec4_unused_op, slt_op, sltu_op,
- dadd_op, daddu_op, dsub_op, dsubu_op,
- tge_op, tgeu_op, tlt_op, tltu_op,
- teq_op, spec5_unused_op, tne_op, spec6_unused_op,
- dsll_op, spec7_unused_op, dsrl_op, dsra_op,
- dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op
-};
-
-/*
- * rt field of bcond opcodes.
- */
-enum rt_op {
- bltz_op, bgez_op, bltzl_op, bgezl_op,
- spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
- tgei_op, tgeiu_op, tlti_op, tltiu_op,
- teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
- bltzal_op, bgezal_op, bltzall_op, bgezall_op
- /*
- * The others (0x14 - 0x1f) are unused.
- */
-};
-
-/*
- * rs field of cop opcodes.
- */
-enum cop_op {
- mfc_op = 0x00, dmfc_op = 0x01,
- cfc_op = 0x02, mtc_op = 0x04,
- dmtc_op = 0x05, ctc_op = 0x06,
- bc_op = 0x08, cop_op = 0x10,
- copm_op = 0x18
-};
-
-/*
- * rt field of cop.bc_op opcodes
- */
-enum bcop_op {
- bcf_op, bct_op, bcfl_op, bctl_op
-};
-
-/*
- * func field of cop0 coi opcodes.
- */
-enum cop0_coi_func {
- tlbr_op = 0x01, tlbwi_op = 0x02,
- tlbwr_op = 0x06, tlbp_op = 0x08,
- rfe_op = 0x10, eret_op = 0x18
-};
-
-/*
- * func field of cop0 com opcodes.
- */
-enum cop0_com_func {
- tlbr1_op = 0x01, tlbw_op = 0x02,
- tlbp1_op = 0x08, dctr_op = 0x09,
- dctw_op = 0x0a
-};
-
-/*
- * fmt field of cop1 opcodes.
- */
-enum cop1_fmt {
- s_fmt, d_fmt, e_fmt, q_fmt,
- w_fmt, l_fmt
-};
-
-/*
- * func field of cop1 instructions using d, s or w format.
- */
-enum cop1_sdw_func {
- fadd_op = 0x00, fsub_op = 0x01,
- fmul_op = 0x02, fdiv_op = 0x03,
- fsqrt_op = 0x04, fabs_op = 0x05,
- fmov_op = 0x06, fneg_op = 0x07,
- froundl_op = 0x08, ftruncl_op = 0x09,
- fceill_op = 0x0a, ffloorl_op = 0x0b,
- fround_op = 0x0c, ftrunc_op = 0x0d,
- fceil_op = 0x0e, ffloor_op = 0x0f,
- fmovc_op = 0x11, fmovz_op = 0x12,
- fmovn_op = 0x13, frecip_op = 0x15,
- frsqrt_op = 0x16, fcvts_op = 0x20,
- fcvtd_op = 0x21, fcvte_op = 0x22,
- fcvtw_op = 0x24, fcvtl_op = 0x25,
- fcmp_op = 0x30
-};
-
-/*
- * func field of cop1x opcodes (MIPS IV).
- */
-enum cop1x_func {
- lwxc1_op = 0x00, ldxc1_op = 0x01,
- pfetch_op = 0x07, swxc1_op = 0x08,
- sdxc1_op = 0x09, madd_s_op = 0x20,
- madd_d_op = 0x21, madd_e_op = 0x22,
- msub_s_op = 0x28, msub_d_op = 0x29,
- msub_e_op = 0x2a, nmadd_s_op = 0x30,
- nmadd_d_op = 0x31, nmadd_e_op = 0x32,
- nmsub_s_op = 0x38, nmsub_d_op = 0x39,
- nmsub_e_op = 0x3a
-};
-
-/*
- * func field for mad opcodes (MIPS IV).
- */
-enum mad_func {
- madd_op = 0x08, msub_op = 0x0a,
- nmadd_op = 0x0c, nmsub_op = 0x0e
-};
-
-/*
- * Damn ... bitfields depend from byteorder :-(
- */
-#ifdef __MIPSEB__
-struct j_format { /* Jump format */
- unsigned int opcode : 6;
- unsigned int target : 26;
-};
-
-struct i_format { /* Immediate format (addi, lw, ...) */
- unsigned int opcode : 6;
- unsigned int rs : 5;
- unsigned int rt : 5;
- signed int simmediate : 16;
-};
-
-struct u_format { /* Unsigned immediate format (ori, xori, ...) */
- unsigned int opcode : 6;
- unsigned int rs : 5;
- unsigned int rt : 5;
- unsigned int uimmediate : 16;
-};
-
-struct c_format { /* Cache (>= R6000) format */
- unsigned int opcode : 6;
- unsigned int rs : 5;
- unsigned int c_op : 3;
- unsigned int cache : 2;
- unsigned int simmediate : 16;
-};
-
-struct r_format { /* Register format */
- unsigned int opcode : 6;
- unsigned int rs : 5;
- unsigned int rt : 5;
- unsigned int rd : 5;
- unsigned int re : 5;
- unsigned int func : 6;
-};
-
-struct p_format { /* Performance counter format (R10000) */
- unsigned int opcode : 6;
- unsigned int rs : 5;
- unsigned int rt : 5;
- unsigned int rd : 5;
- unsigned int re : 5;
- unsigned int func : 6;
-};
-
-struct f_format { /* FPU register format */
- unsigned int opcode : 6;
- unsigned int : 1;
- unsigned int fmt : 4;
- unsigned int rt : 5;
- unsigned int rd : 5;
- unsigned int re : 5;
- unsigned int func : 6;
-};
-
-struct ma_format { /* FPU multipy and add format (MIPS IV) */
- unsigned int opcode : 6;
- unsigned int fr : 5;
- unsigned int ft : 5;
- unsigned int fs : 5;
- unsigned int fd : 5;
- unsigned int func : 4;
- unsigned int fmt : 2;
-};
-
-#elif defined(__MIPSEL__)
-
-struct j_format { /* Jump format */
- unsigned int target : 26;
- unsigned int opcode : 6;
-};
-
-struct i_format { /* Immediate format */
- signed int simmediate : 16;
- unsigned int rt : 5;
- unsigned int rs : 5;
- unsigned int opcode : 6;
-};
-
-struct u_format { /* Unsigned immediate format */
- unsigned int uimmediate : 16;
- unsigned int rt : 5;
- unsigned int rs : 5;
- unsigned int opcode : 6;
-};
-
-struct c_format { /* Cache (>= R6000) format */
- unsigned int simmediate : 16;
- unsigned int cache : 2;
- unsigned int c_op : 3;
- unsigned int rs : 5;
- unsigned int opcode : 6;
-};
-
-struct r_format { /* Register format */
- unsigned int func : 6;
- unsigned int re : 5;
- unsigned int rd : 5;
- unsigned int rt : 5;
- unsigned int rs : 5;
- unsigned int opcode : 6;
-};
-
-struct p_format { /* Performance counter format (R10000) */
- unsigned int func : 6;
- unsigned int re : 5;
- unsigned int rd : 5;
- unsigned int rt : 5;
- unsigned int rs : 5;
- unsigned int opcode : 6;
-};
-
-struct f_format { /* FPU register format */
- unsigned int func : 6;
- unsigned int re : 5;
- unsigned int rd : 5;
- unsigned int rt : 5;
- unsigned int fmt : 4;
- unsigned int : 1;
- unsigned int opcode : 6;
-};
-
-struct ma_format { /* FPU multipy and add format (MIPS IV) */
- unsigned int fmt : 2;
- unsigned int func : 4;
- unsigned int fd : 5;
- unsigned int fs : 5;
- unsigned int ft : 5;
- unsigned int fr : 5;
- unsigned int opcode : 6;
-};
-
-#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
-#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
-#endif
-
-union mips_instruction {
- unsigned int word;
- unsigned short halfword[2];
- unsigned char byte[4];
- struct j_format j_format;
- struct i_format i_format;
- struct u_format u_format;
- struct c_format c_format;
- struct r_format r_format;
- struct f_format f_format;
- struct ma_format ma_format;
-};
-
-/* HACHACHAHCAHC ... */
-
-/* In case some other massaging is needed, keep MIPSInst as wrapper */
-
-#define MIPSInst(x) x
-
-#define I_OPCODE_SFT 26
-#define MIPSInst_OPCODE(x) (MIPSInst(x) >> I_OPCODE_SFT)
-
-#define I_JTARGET_SFT 0
-#define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff)
-
-#define I_RS_SFT 21
-#define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT)
-
-#define I_RT_SFT 16
-#define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT)
-
-#define I_IMM_SFT 0
-#define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff)))
-#define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff)
-
-#define I_CACHEOP_SFT 18
-#define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT)
-
-#define I_CACHESEL_SFT 16
-#define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT)
-
-#define I_RD_SFT 11
-#define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT)
-
-#define I_RE_SFT 6
-#define MIPSInst_RE(x) ((MIPSInst(x) & 0x000007c0) >> I_RE_SFT)
-
-#define I_FUNC_SFT 0
-#define MIPSInst_FUNC(x) (MIPSInst(x) & 0x0000003f)
-
-#define I_FFMT_SFT 21
-#define MIPSInst_FFMT(x) ((MIPSInst(x) & 0x01e00000) >> I_FFMT_SFT)
-
-#define I_FT_SFT 16
-#define MIPSInst_FT(x) ((MIPSInst(x) & 0x001f0000) >> I_FT_SFT)
-
-#define I_FS_SFT 11
-#define MIPSInst_FS(x) ((MIPSInst(x) & 0x0000f800) >> I_FS_SFT)
-
-#define I_FD_SFT 6
-#define MIPSInst_FD(x) ((MIPSInst(x) & 0x000007c0) >> I_FD_SFT)
-
-#define I_FR_SFT 21
-#define MIPSInst_FR(x) ((MIPSInst(x) & 0x03e00000) >> I_FR_SFT)
-
-#define I_FMA_FUNC_SFT 2
-#define MIPSInst_FMA_FUNC(x) ((MIPSInst(x) & 0x0000003c) >> I_FMA_FUNC_SFT)
-
-#define I_FMA_FFMT_SFT 0
-#define MIPSInst_FMA_FFMT(x) (MIPSInst(x) & 0x00000003)
-
-typedef unsigned int mips_instruction;
-
-#endif /* _ASM_INST_H */
diff -Nru a/include/asm-mips64/io.h b/include/asm-mips64/io.h
--- a/include/asm-mips64/io.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,491 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995 Waldorf GmbH
- * Copyright (C) 1994 - 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_IO_H
-#define _ASM_IO_H
-
-#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-#include <asm/byteorder.h>
-
-#ifdef CONFIG_DECSTATION
-#include <asm/dec/io.h>
-#endif
-
-#ifdef CONFIG_MIPS_ATLAS
-#include <asm/mips-boards/io.h>
-#endif
-
-#ifdef CONFIG_MIPS_MALTA
-#include <asm/mips-boards/io.h>
-#endif
-
-#ifdef CONFIG_MIPS_SEAD
-#include <asm/mips-boards/io.h>
-#endif
-
-#ifdef CONFIG_SGI_IP22
-#include <asm/sgi/io.h>
-#endif
-
-#ifdef CONFIG_SGI_IP27
-#include <asm/sn/io.h>
-#endif
-
-#ifdef CONFIG_SGI_IP32
-#include <asm/ip32/io.h>
-#endif
-
-#ifdef CONFIG_SIBYTE_SB1xxx_SOC
-#include <asm/sibyte/io.h>
-#endif
-
-#ifdef CONFIG_SNI_RM200_PCI
-#include <asm/sni.h>
-#endif
-
-#ifdef CONFIG_SGI_IP27
-extern unsigned long bus_to_baddr[256];
-
-#define bus_to_baddr(bus, addr) (bus_to_baddr[(bus)->number] + (addr))
-#define baddr_to_bus(bus, addr) ((addr) - bus_to_baddr[(bus)->number])
-#else
-#define bus_to_baddr(bus, addr) (addr)
-#define baddr_to_bus(bus, addr) (addr)
-#endif
-
-/*
- * Slowdown I/O port space accesses for antique hardware.
- */
-#undef CONF_SLOWDOWN_IO
-
-/*
- * Sane hardware offers swapping of I/O space accesses in hardware; less
- * sane hardware forces software to fiddle with this ...
- */
-#if defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__)
-
-#define __ioswab8(x) (x)
-
-#ifdef CONFIG_SGI_IP22
-/*
- * IP22 seems braindead enough to swap 16bits values in hardware, but
- * not 32bits. Go figure... Can't tell without documentation.
- */
-#define __ioswab16(x) (x)
-#else
-#define __ioswab16(x) swab16(x)
-#endif
-#define __ioswab32(x) swab32(x)
-
-#else
-
-#define __ioswab8(x) (x)
-#define __ioswab16(x) (x)
-#define __ioswab32(x) (x)
-
-#endif
-
-/*
- * Change "struct page" to physical address.
- */
-#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
-
-/*
- * ioremap - map bus memory into CPU space
- * @offset: bus address of the memory
- * @size: size of the resource to map
- *
- * ioremap performs a platform specific sequence of operations to
- * make bus memory CPU accessible via the readb/readw/readl/writeb/
- * writew/writel functions and the other mmio helpers. The returned
- * address is not guaranteed to be usable directly as a virtual
- * address.
- */
-static inline void * ioremap(unsigned long offset, unsigned long size)
-{
- return (void *) (IO_SPACE_BASE | offset);
-}
-
-/*
- * ioremap_nocache - map bus memory into CPU space
- * @offset: bus address of the memory
- * @size: size of the resource to map
- *
- * ioremap_nocache performs a platform specific sequence of operations to
- * make bus memory CPU accessible via the readb/readw/readl/writeb/
- * writew/writel functions and the other mmio helpers. The returned
- * address is not guaranteed to be usable directly as a virtual
- * address.
- *
- * This version of ioremap ensures that the memory is marked uncachable
- * on the CPU as well as honouring existing caching rules from things like
- * the PCI bus. Note that there are other caches and buffers on many
- * busses. In paticular driver authors should read up on PCI writes
- *
- * It's useful if some control registers are in such an area and
- * write combining or read caching is not desirable:
- */
-static inline void * ioremap_nocache (unsigned long offset, unsigned long size)
-{
- return (void *) (IO_SPACE_BASE | offset);
-}
-
-static inline void iounmap(void *addr)
-{
-}
-
-#define readb(addr) (*(volatile unsigned char *)(addr))
-#define readw(addr) __ioswab16((*(volatile unsigned short *)(addr)))
-#define readl(addr) __ioswab32((*(volatile unsigned int *)(addr)))
-
-#define __raw_readb(addr) (*(volatile unsigned char *)(addr))
-#define __raw_readw(addr) (*(volatile unsigned short *)(addr))
-#define __raw_readl(addr) (*(volatile unsigned int *)(addr))
-
-#define writeb(b,addr) ((*(volatile unsigned char *)(addr)) = (__ioswab8(b)))
-#define writew(b,addr) ((*(volatile unsigned short *)(addr)) = (__ioswab16(b)))
-#define writel(b,addr) ((*(volatile unsigned int *)(addr)) = (__ioswab32(b)))
-
-#define __raw_writeb(b,addr) ((*(volatile unsigned char *)(addr)) = (b))
-#define __raw_writew(w,addr) ((*(volatile unsigned short *)(addr)) = (w))
-#define __raw_writel(l,addr) ((*(volatile unsigned int *)(addr)) = (l))
-
-#define memset_io(a,b,c) memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
-
-/* The ISA versions are supplied by system specific code */
-
-/*
- * On MIPS I/O ports are memory mapped, so we access them using normal
- * load/store instructions. mips_io_port_base is the virtual address to
- * which all ports are being mapped. For sake of efficiency some code
- * assumes that this is an address that can be loaded with a single lui
- * instruction, so the lower 16 bits must be zero. Should be true on
- * on any sane architecture; generic code does not use this assumption.
- */
-extern const unsigned long mips_io_port_base;
-
-#define set_io_port_base(base) \
- do { * (unsigned long *) &mips_io_port_base = (base); } while (0)
-
-#define __SLOW_DOWN_IO \
- __asm__ __volatile__( \
- "sb\t$0,0x80(%0)" \
- : : "r" (mips_io_port_base));
-
-#ifdef CONF_SLOWDOWN_IO
-#ifdef REALLY_SLOW_IO
-#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; }
-#else
-#define SLOW_DOWN_IO __SLOW_DOWN_IO
-#endif
-#else
-#define SLOW_DOWN_IO
-#endif
-
-/*
- * virt_to_phys - map virtual addresses to physical
- * @address: address to remap
- *
- * The returned physical address is the physical (CPU) mapping for
- * the memory address given. It is only valid to use this function on
- * addresses directly mapped or allocated via kmalloc.
- *
- * This function does not give bus mappings for DMA transfers. In
- * almost all conceivable cases a device driver should not be using
- * this function
- */
-static inline unsigned long virt_to_phys(volatile void * address)
-{
- return (unsigned long)address - PAGE_OFFSET;
-}
-
-/*
- * phys_to_virt - map physical address to virtual
- * @address: address to remap
- *
- * The returned virtual address is a current CPU mapping for
- * the memory address given. It is only valid to use this function on
- * addresses that have a kernel mapping
- *
- * This function does not handle bus mappings for DMA transfers. In
- * almost all conceivable cases a device driver should not be using
- * this function
- */
-static inline void * phys_to_virt(unsigned long address)
-{
- return (void *)(address + PAGE_OFFSET);
-}
-
-/*
- * ISA I/O bus memory addresses are 1:1 with the physical address.
- */
-static inline unsigned long isa_virt_to_bus(volatile void * address)
-{
- return PHYSADDR(address);
-}
-
-static inline void * isa_bus_to_virt(unsigned long address)
-{
- return (void *)KSEG0ADDR(address);
-}
-
-/*
- * However PCI ones are not necessarily 1:1 and therefore these interfaces
- * are forbidden in portable PCI drivers.
- *
- * Allow them for x86 for legacy drivers, though.
- */
-#define virt_to_bus virt_to_phys
-#define bus_to_virt phys_to_virt
-
-/* This is too simpleminded for more sophisticated than dumb hardware ... */
-#define page_to_bus page_to_phys
-
-/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor. This implies the assumption that there is only
- * one of these busses.
- */
-extern unsigned long isa_slot_offset;
-
-/*
- * ISA space is 'always mapped' on currently supported MIPS systems, no need
- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
- * are physical addresses. The following constant pointer can be
- * used as the IO-area pointer (it can be iounmapped as well, so the
- * analogy with PCI is quite large):
- */
-#define __ISA_IO_base ((char *)(isa_slot_offset))
-
-#define isa_readb(a) readb(__ISA_IO_base + (a))
-#define isa_readw(a) readw(__ISA_IO_base + (a))
-#define isa_readl(a) readl(__ISA_IO_base + (a))
-#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
-#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
-#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
-#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
-#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
-#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
-
-/*
- * We don't have csum_partial_copy_fromio() yet, so we cheat here and
- * just copy it. The net code will then do the checksum later.
- */
-#define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len))
-
-/**
- * check_signature - find BIOS signatures
- * @io_addr: mmio address to check
- * @signature: signature block
- * @length: length of signature
- *
- * Perform a signature comparison with the mmio address io_addr. This
- * address should have been obtained by ioremap.
- * Returns 1 on a match.
- */
-static inline int check_signature(unsigned long io_addr,
- const unsigned char *signature, int length)
-{
- int retval = 0;
- do {
- if (readb(io_addr) != *signature)
- goto out;
- io_addr++;
- signature++;
- length--;
- } while (length);
- retval = 1;
-out:
- return retval;
-}
-
-/*
- * isa_check_signature - find BIOS signatures
- * @io_addr: mmio address to check
- * @signature: signature block
- * @length: length of signature
- *
- * Perform a signature comparison with the ISA mmio address io_addr.
- * Returns 1 on a match.
- *
- * This function is deprecated. New drivers should use ioremap and
- * check_signature.
- */
-#define isa_check_signature(io, s, l) check_signature(i,s,l)
-
-#define outb(val,port) \
-do { \
- *(volatile u8 *)(mips_io_port_base + (port)) = __ioswab8(val); \
-} while(0)
-
-#define outw(val,port) \
-do { \
- *(volatile u16 *)(mips_io_port_base + (port)) = __ioswab16(val);\
-} while(0)
-
-#define outl(val,port) \
-do { \
- *(volatile u32 *)(mips_io_port_base + (port)) = __ioswab32(val);\
-} while(0)
-
-#define outb_p(val,port) \
-do { \
- *(volatile u8 *)(mips_io_port_base + (port)) = __ioswab8(val); \
- SLOW_DOWN_IO; \
-} while(0)
-
-#define outw_p(val,port) \
-do { \
- *(volatile u16 *)(mips_io_port_base + (port)) = __ioswab16(val);\
- SLOW_DOWN_IO; \
-} while(0)
-
-#define outl_p(val,port) \
-do { \
- *(volatile u32 *)(mips_io_port_base + (port)) = __ioswab32(val);\
- SLOW_DOWN_IO; \
-} while(0)
-
-static inline unsigned char inb(unsigned long port)
-{
- return __ioswab8(*(volatile u8 *)(mips_io_port_base + port));
-}
-
-static inline unsigned short inw(unsigned long port)
-{
- return __ioswab16(*(volatile u16 *)(mips_io_port_base + port));
-}
-
-static inline unsigned int inl(unsigned long port)
-{
- return __ioswab32(*(volatile u32 *)(mips_io_port_base + port));
-}
-
-static inline unsigned char inb_p(unsigned long port)
-{
- u8 __val;
-
- __val = *(volatile u8 *)(mips_io_port_base + port);
- SLOW_DOWN_IO;
-
- return __ioswab8(__val);
-}
-
-static inline unsigned short inw_p(unsigned long port)
-{
- u16 __val;
-
- __val = *(volatile u16 *)(mips_io_port_base + port);
- SLOW_DOWN_IO;
-
- return __ioswab16(__val);
-}
-
-static inline unsigned int inl_p(unsigned long port)
-{
- u32 __val;
-
- __val = *(volatile u32 *)(mips_io_port_base + port);
- SLOW_DOWN_IO;
- return __ioswab32(__val);
-}
-
-static inline void outsb(unsigned long port, void *addr, unsigned int count)
-{
- while (count--) {
- outb(*(u8 *)addr, port);
- addr++;
- }
-}
-
-static inline void insb(unsigned long port, void *addr, unsigned int count)
-{
- while (count--) {
- *(u8 *)addr = inb(port);
- addr++;
- }
-}
-
-static inline void outsw(unsigned long port, void *addr, unsigned int count)
-{
- while (count--) {
- outw(*(u16 *)addr, port);
- addr += 2;
- }
-}
-
-static inline void insw(unsigned long port, void *addr, unsigned int count)
-{
- while (count--) {
- *(u16 *)addr = inw(port);
- addr += 2;
- }
-}
-
-static inline void outsl(unsigned long port, void *addr, unsigned int count)
-{
- while (count--) {
- outl(*(u32 *)addr, port);
- addr += 4;
- }
-}
-
-static inline void insl(unsigned long port, void *addr, unsigned int count)
-{
- while (count--) {
- *(u32 *)addr = inl(port);
- addr += 4;
- }
-}
-
-/*
- * The caches on some architectures aren't dma-coherent and have need to
- * handle this in software. There are three types of operations that
- * can be applied to dma buffers.
- *
- * - dma_cache_wback_inv(start, size) makes caches and coherent by
- * writing the content of the caches back to memory, if necessary.
- * The function also invalidates the affected part of the caches as
- * necessary before DMA transfers from outside to memory.
- * - dma_cache_wback(start, size) makes caches and coherent by
- * writing the content of the caches back to memory, if necessary.
- * The function also invalidates the affected part of the caches as
- * necessary before DMA transfers from outside to memory.
- * - dma_cache_inv(start, size) invalidates the affected parts of the
- * caches. Dirty lines of the caches may be written back or simply
- * be discarded. This operation is necessary before dma operations
- * to the memory.
- */
-#ifdef CONFIG_NONCOHERENT_IO
-
-extern void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
-extern void (*_dma_cache_wback)(unsigned long start, unsigned long size);
-extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-
-#define dma_cache_wback_inv(start,size) _dma_cache_wback_inv(start,size)
-#define dma_cache_wback(start,size) _dma_cache_wback(start,size)
-#define dma_cache_inv(start,size) _dma_cache_inv(start,size)
-
-#else /* Sane hardware */
-
-#define dma_cache_wback_inv(start,size) \
- do { (void) (start); (void) (size); } while (0)
-#define dma_cache_wback(start,size) \
- do { (void) (start); (void) (size); } while (0)
-#define dma_cache_inv(start,size) \
- do { (void) (start); (void) (size); } while (0)
-
-#endif /* CONFIG_NONCOHERENT_IO */
-
-#endif /* _ASM_IO_H */
diff -Nru a/include/asm-mips64/ioctl.h b/include/asm-mips64/ioctl.h
--- a/include/asm-mips64/ioctl.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,88 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle
- */
-#ifndef _ASM_IOCTL_H
-#define _ASM_IOCTL_H
-
-/*
- * The original linux ioctl numbering scheme was just a general
- * "anything goes" setup, where more or less random numbers were
- * assigned. Sorry, I was clueless when I started out on this.
- *
- * On the alpha, we'll try to clean it up a bit, using a more sane
- * ioctl numbering, and also trying to be compatible with OSF/1 in
- * the process. I'd like to clean it up for the i386 as well, but
- * it's so painful recognizing both the new and the old numbers..
- *
- * The same applies for for the MIPS ABI; in fact even the macros
- * from Linux/Alpha fit almost perfectly.
- */
-
-#define _IOC_NRBITS 8
-#define _IOC_TYPEBITS 8
-#define _IOC_SIZEBITS 13
-#define _IOC_DIRBITS 3
-
-#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
-#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
-#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
-#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
-
-#define _IOC_NRSHIFT 0
-#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
-#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
-#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
-
-/*
- * We to additionally limit parameters to a maximum 255 bytes.
- */
-#define _IOC_SLMASK 0xff
-
-/*
- * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit.
- * And this turns out useful to catch old ioctl numbers in header
- * files for us.
- */
-#define _IOC_NONE 1U
-#define _IOC_READ 2U
-#define _IOC_WRITE 4U
-
-/*
- * The following are included for compatibility
- */
-#define _IOC_VOID 0x20000000
-#define _IOC_OUT 0x40000000
-#define _IOC_IN 0x80000000
-#define _IOC_INOUT (IOC_IN|IOC_OUT)
-
-#define _IOC(dir,type,nr,size) \
- (((dir) << _IOC_DIRSHIFT) | \
- ((type) << _IOC_TYPESHIFT) | \
- ((nr) << _IOC_NRSHIFT) | \
- ((size) << _IOC_SIZESHIFT))
-
-/* used to create numbers */
-#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
-#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
-#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
-#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
-
-/* used to decode them.. */
-#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
-#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
-#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
-#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
-
-/* ...and for the drivers/sound files... */
-
-#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
-#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
-#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
-#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
-#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
-
-#endif /* _ASM_IOCTL_H */
diff -Nru a/include/asm-mips64/ioctls.h b/include/asm-mips64/ioctls.h
--- a/include/asm-mips64/ioctls.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,105 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 2001 Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#ifndef __ASM_IOCTLS_H
-#define __ASM_IOCTLS_H
-
-#include <asm/ioctl.h>
-
-#define TCGETA 0x5401
-#define TCSETA 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
-#define TCSETAW 0x5403
-#define TCSETAF 0x5404
-
-#define TCSBRK 0x5405
-#define TCXONC 0x5406
-#define TCFLSH 0x5407
-
-#define TCGETS 0x540d
-#define TCSETS 0x540e
-#define TCSETSW 0x540f
-#define TCSETSF 0x5410
-
-#define TIOCEXCL 0x740d /* set exclusive use of tty */
-#define TIOCNXCL 0x740e /* reset exclusive use of tty */
-#define TIOCOUTQ 0x7472 /* output queue size */
-#define TIOCSTI 0x5472 /* simulate terminal input */
-#define TIOCMGET 0x741d /* get all modem bits */
-#define TIOCMBIS 0x741b /* bis modem bits */
-#define TIOCMBIC 0x741c /* bic modem bits */
-#define TIOCMSET 0x741a /* set all modem bits */
-#define TIOCPKT 0x5470 /* pty: set/clear packet mode */
-#define TIOCPKT_DATA 0x00 /* data packet */
-#define TIOCPKT_FLUSHREAD 0x01 /* flush packet */
-#define TIOCPKT_FLUSHWRITE 0x02 /* flush packet */
-#define TIOCPKT_STOP 0x04 /* stop output */
-#define TIOCPKT_START 0x08 /* start output */
-#define TIOCPKT_NOSTOP 0x10 /* no more ^S, ^Q */
-#define TIOCPKT_DOSTOP 0x20 /* now do ^S ^Q */
-/* #define TIOCPKT_IOCTL 0x40 state change of pty driver */
-#define TIOCSWINSZ _IOW('t', 103, struct winsize) /* set window size */
-#define TIOCGWINSZ _IOR('t', 104, struct winsize) /* get window size */
-#define TIOCNOTTY 0x5471 /* void tty association */
-#define TIOCSETD 0x7401
-#define TIOCGETD 0x7400
-
-#define FIOCLEX 0x6601
-#define FIONCLEX 0x6602
-#define FIOASYNC 0x667d
-#define FIONBIO 0x667e
-#define FIOQSIZE 0x667f
-
-#define TIOCGLTC 0x7474 /* get special local chars */
-#define TIOCSLTC 0x7475 /* set special local chars */
-#define TIOCSPGRP _IOW('t', 118, int) /* set pgrp of tty */
-#define TIOCGPGRP _IOR('t', 119, int) /* get pgrp of tty */
-#define TIOCCONS _IOW('t', 120, int) /* become virtual console */
-
-#define FIONREAD 0x467f
-#define TIOCINQ FIONREAD
-
-#define TIOCGETP 0x7408
-#define TIOCSETP 0x7409
-#define TIOCSETN 0x740a /* TIOCSETP wo flush */
-
-/* #define TIOCSETA _IOW('t', 20, struct termios) set termios struct */
-/* #define TIOCSETAW _IOW('t', 21, struct termios) drain output, set */
-/* #define TIOCSETAF _IOW('t', 22, struct termios) drn out, fls in, set */
-/* #define TIOCGETD _IOR('t', 26, int) get line discipline */
-/* #define TIOCSETD _IOW('t', 27, int) set line discipline */
- /* 127-124 compat */
-
-#define TIOCSBRK 0x5427 /* BSD compatibility */
-#define TIOCCBRK 0x5428 /* BSD compatibility */
-#define TIOCGSID 0x7416 /* Return the session ID of FD */
-#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
-#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
-
-/* I hope the range from 0x5480 on is free ... */
-#define TIOCSCTTY 0x5480 /* become controlling tty */
-#define TIOCGSOFTCAR 0x5481
-#define TIOCSSOFTCAR 0x5482
-#define TIOCLINUX 0x5483
-#define TIOCGSERIAL 0x5484
-#define TIOCSSERIAL 0x5485
-#define TCSBRKP 0x5486 /* Needed for POSIX tcsendbreak() */
-#define TIOCSERCONFIG 0x5488
-#define TIOCSERGWILD 0x5489
-#define TIOCSERSWILD 0x548a
-#define TIOCGLCKTRMIOS 0x548b
-#define TIOCSLCKTRMIOS 0x548c
-#define TIOCSERGSTRUCT 0x548d /* For debugging only */
-#define TIOCSERGETLSR 0x548e /* Get line status register */
-#define TIOCSERGETMULTI 0x548f /* Get multiport config */
-#define TIOCSERSETMULTI 0x5490 /* Set multiport config */
-#define TIOCMIWAIT 0x5491 /* wait for a change on serial input line(s) */
-#define TIOCGICOUNT 0x5492 /* read serial port inline interrupt counts */
-#define TIOCGHAYESESP 0x5493 /* Get Hayes ESP configuration */
-#define TIOCSHAYESESP 0x5494 /* Set Hayes ESP configuration */
-
-#endif /* __ASM_IOCTLS_H */
diff -Nru a/include/asm-mips64/ip32/crime.h b/include/asm-mips64/ip32/crime.h
--- a/include/asm-mips64/ip32/crime.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,227 +0,0 @@
-/*
- * Definitions for the SGI O2 Crime chip.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Harald Koerfgen
- */
-
-#ifndef __ASM_CRIME_H__
-#define __ASM_CRIME_H__
-
-#include <asm/addrspace.h>
-
-/*
- * Address map
- */
-#ifndef __ASSEMBLY__
-#define CRIME_BASE KSEG1ADDR(0x14000000)
-#else
-#define CRIME_BASE 0xffffffffb4000000
-#endif
-
-#ifndef __ASSEMBLY__
-static inline u64 crime_read_64 (unsigned long __offset) {
- return *((volatile u64 *) (CRIME_BASE + __offset));
-}
-static inline void crime_write_64 (unsigned long __offset, u64 __val) {
- *((volatile u64 *) (CRIME_BASE + __offset)) = __val;
-}
-#endif
-
-#undef BIT
-#define BIT(x) (1UL << (x))
-
-/* All CRIME registers are 64 bits */
-#define CRIME_ID 0
-
-#define CRIME_ID_MASK 0xff
-#define CRIME_ID_IDBITS 0xf0
-#define CRIME_ID_IDVALUE 0xa0
-#define CRIME_ID_REV 0x0f
-
-#define CRIME_REV_PETTY 0x00
-#define CRIME_REV_11 0x11
-#define CRIME_REV_13 0x13
-#define CRIME_REV_14 0x14
-
-#define CRIME_CONTROL (0x00000008)
-#define CRIME_CONTROL_MASK 0x3fff /* 14-bit registers */
-
-/* CRIME_CONTROL register bits */
-#define CRIME_CONTROL_TRITON_SYSADC 0x2000
-#define CRIME_CONTROL_CRIME_SYSADC 0x1000
-#define CRIME_CONTROL_HARD_RESET 0x0800
-#define CRIME_CONTROL_SOFT_RESET 0x0400
-#define CRIME_CONTROL_DOG_ENA 0x0200
-#define CRIME_CONTROL_ENDIANESS 0x0100
-
-#define CRIME_CONTROL_ENDIAN_BIG 0x0100
-#define CRIME_CONTROL_ENDIAN_LITTLE 0x0000
-
-#define CRIME_CONTROL_CQUEUE_HWM 0x000f
-#define CRIME_CONTROL_CQUEUE_SHFT 0
-#define CRIME_CONTROL_WBUF_HWM 0x00f0
-#define CRIME_CONTROL_WBUF_SHFT 8
-
-#define CRIME_INT_STAT (0x00000010)
-#define CRIME_INT_MASK (0x00000018)
-#define CRIME_SOFT_INT (0x00000020)
-#define CRIME_HARD_INT (0x00000028)
-
-/* Bits in CRIME_INT_XXX and CRIME_HARD_INT */
-#define MACE_VID_IN1_INT BIT (0)
-#define MACE_VID_IN2_INT BIT (1)
-#define MACE_VID_OUT_INT BIT (2)
-#define MACE_ETHERNET_INT BIT (3)
-#define MACE_SUPERIO_INT BIT (4)
-#define MACE_MISC_INT BIT (5)
-#define MACE_AUDIO_INT BIT (6)
-#define MACE_PCI_BRIDGE_INT BIT (7)
-#define MACEPCI_SCSI0_INT BIT (8)
-#define MACEPCI_SCSI1_INT BIT (9)
-#define MACEPCI_SLOT0_INT BIT (10)
-#define MACEPCI_SLOT1_INT BIT (11)
-#define MACEPCI_SLOT2_INT BIT (12)
-#define MACEPCI_SHARED0_INT BIT (13)
-#define MACEPCI_SHARED1_INT BIT (14)
-#define MACEPCI_SHARED2_INT BIT (15)
-#define CRIME_GBE0_INT BIT (16)
-#define CRIME_GBE1_INT BIT (17)
-#define CRIME_GBE2_INT BIT (18)
-#define CRIME_GBE3_INT BIT (19)
-#define CRIME_CPUERR_INT BIT (20)
-#define CRIME_MEMERR_INT BIT (21)
-#define CRIME_RE_EMPTY_E_INT BIT (22)
-#define CRIME_RE_FULL_E_INT BIT (23)
-#define CRIME_RE_IDLE_E_INT BIT (24)
-#define CRIME_RE_EMPTY_L_INT BIT (25)
-#define CRIME_RE_FULL_L_INT BIT (26)
-#define CRIME_RE_IDLE_L_INT BIT (27)
-#define CRIME_SOFT0_INT BIT (28)
-#define CRIME_SOFT1_INT BIT (29)
-#define CRIME_SOFT2_INT BIT (30)
-#define CRIME_SYSCORERR_INT CRIME_SOFT2_INT
-#define CRIME_VICE_INT BIT (31)
-
-/* Masks for deciding who handles the interrupt */
-#define CRIME_MACE_INT_MASK 0x8f
-#define CRIME_MACEISA_INT_MASK 0x70
-#define CRIME_MACEPCI_INT_MASK 0xff00
-#define CRIME_CRIME_INT_MASK 0xffff0000
-
-/*
- * XXX Todo
- */
-#define CRIME_DOG (0x00000030)
-/* We are word-play compatible but not misspelling compatible */
-#define MC_GRUFF CRIME_DOG
-#define CRIME_DOG_MASK (0x001fffff)
-
-/* CRIME_DOG register bits */
-#define CRIME_DOG_POWER_ON_RESET (0x00010000)
-#define CRIME_DOG_WARM_RESET (0x00080000)
-#define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET)
-#define CRIME_DOG_VALUE (0x00007fff) /* ??? */
-
-#define CRIME_TIME (0x00000038)
-#define CRIME_TIME_MASK (0x0000ffffffffffff)
-
-#ifdef MASTER_FREQ
-#undef MASTER_FREQ
-#endif
-#define CRIME_MASTER_FREQ 66666500 /* Crime upcounter frequency */
-#define CRIME_NS_PER_TICK 15 /* for delay_calibrate */
-
-#define CRIME_CPU_ERROR_ADDR (0x00000040)
-#define CRIME_CPU_ERROR_ADDR_MASK (0x3ffffffff)
-
-#define CRIME_CPU_ERROR_STAT (0x00000048)
-/* REV_PETTY only! */
-#define CRIME_CPU_ERROR_ENA (0x00000050)
-
-/*
- * bit definitions for CRIME/VICE error status and enable registers
- */
-#define CRIME_CPU_ERROR_MASK 0x7UL /* cpu error stat is 3 bits */
-#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4
-#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2
-#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1
-
-/*
- * these are the definitions for the error status/enable register in
- * petty crime. Note that the enable register does not exist in crime
- * rev 1 and above.
- */
-#define CRIME_CPU_ERROR_MASK_REV0 0x3ff /* cpu error stat is 9 bits */
-#define CRIME_CPU_ERROR_CPU_INV_ADDR_RD 0x200
-#define CRIME_CPU_ERROR_VICE_II 0x100
-#define CRIME_CPU_ERROR_VICE_SYSAD 0x80
-#define CRIME_CPU_ERROR_VICE_SYSCMD 0x40
-#define CRIME_CPU_ERROR_VICE_INV_ADDR 0x20
-#define CRIME_CPU_ERROR_CPU_II 0x10
-#define CRIME_CPU_ERROR_CPU_SYSAD 0x8
-#define CRIME_CPU_ERROR_CPU_SYSCMD 0x4
-#define CRIME_CPU_ERROR_CPU_INV_ADDR_WR 0x2
-#define CRIME_CPU_ERROR_CPU_INV_REG_ADDR 0x1
-
-#define CRIME_VICE_ERROR_ADDR (0x00000058)
-#define CRIME_VICE_ERROR_ADDR_MASK (0x3fffffff)
-
-#define CRIME_MEM_CONTROL (0x00000200)
-#define CRIME_MEM_CONTROL_MASK 0x3 /* 25 cent register */
-#define CRIME_MEM_CONTROL_ECC_ENA 0x1
-#define CRIME_MEM_CONTROL_USE_ECC_REPL 0x2
-
-/*
- * macros for CRIME memory bank control registers.
- */
-#define CRIME_MEM_BANK_CONTROL(__bank) (0x00000208 + ((__bank) << 3))
-#define CRIME_MEM_BANK_CONTROL_MSK 0x11f /* 9 bits 7:5 reserved */
-#define CRIME_MEM_BANK_CONTROL_ADDR 0x01f
-#define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100
-#define CRIME_MEM_BANK_CONTROL_BANK_TO_ADDR(__bank) \
- (((__bank) & CRIME_MEM_BANK_CONTROL_ADDR) << 25)
-
-#define CRIME_MEM_REFRESH_COUNTER (0x00000248)
-#define CRIME_MEM_REFRESH_COUNTER_MASK 0x7ff /* 11-bit register */
-
-#define CRIME_MAXBANKS 8
-
-/*
- * CRIME Memory error status register bit definitions
- */
-#define CRIME_MEM_ERROR_STAT (0x00000250)
-#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */
-#define CRIME_MEM_ERROR_MACE_ID 0x0000007f
-#define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080
-#define CRIME_MEM_ERROR_RE_ID 0x00007f00
-#define CRIME_MEM_ERROR_RE_ACCESS 0x00008000
-#define CRIME_MEM_ERROR_GBE_ACCESS 0x00010000
-#define CRIME_MEM_ERROR_VICE_ACCESS 0x00020000
-#define CRIME_MEM_ERROR_CPU_ACCESS 0x00040000
-#define CRIME_MEM_ERROR_RESERVED 0x00080000
-#define CRIME_MEM_ERROR_SOFT_ERR 0x00100000
-#define CRIME_MEM_ERROR_HARD_ERR 0x00200000
-#define CRIME_MEM_ERROR_MULTIPLE 0x00400000
-#define CRIME_MEM_ERROR_MEM_ECC_RD 0x00800000
-#define CRIME_MEM_ERROR_MEM_ECC_RMW 0x01000000
-#define CRIME_MEM_ERROR_INV_MEM_ADDR_RD 0x02000000
-#define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000
-#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000
-
-#define CRIME_MEM_ERROR_ADDR (0x00000258)
-#define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff
-
-#define CRIME_MEM_ERROR_ECC_SYN (0x00000260)
-#define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff
-
-#define CRIME_MEM_ERROR_ECC_CHK (0x00000268)
-#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff
-
-#define CRIME_MEM_ERROR_ECC_REPL (0x00000270)
-#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
-
-#endif /* __ASM_CRIME_H__ */
diff -Nru a/include/asm-mips64/ip32/io.h b/include/asm-mips64/ip32/io.h
--- a/include/asm-mips64/ip32/io.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,15 +0,0 @@
-#ifndef __ASM_IP32_IO_H__
-#define __ASM_IP32_IO_H__
-
-#include <asm/ip32/mace.h>
-
-/*#ifdef CONFIG_MIPS_UNCACHED*/
-#define UNCACHEDADDR(x) (0x9000000000000000UL | (u64)(x))
-/*#else
-#define UNCACHEDADDR(x) (x)
-#endif*/
-/*#define UNCACHEDADDR(x) (KSEG1ADDR (x)) */
-#define IO_SPACE_BASE UNCACHEDADDR (MACEPCI_HI_MEMORY)
-#define IO_SPACE_LIMIT 0xffffffffUL
-
-#endif
diff -Nru a/include/asm-mips64/ip32/ip32_ints.h b/include/asm-mips64/ip32/ip32_ints.h
--- a/include/asm-mips64/ip32/ip32_ints.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,94 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Harald Koerfgen
- */
-
-#ifndef __ASM_IP32_INTS_H
-#define __ASM_IP32_INTS_H
-
-/*
- * This list reflects the assignment of interrupt numbers to
- * interrupting events. Order is fairly irrelevant to handling
- * priority. This differs from irix.
- */
-
-/* CPU */
-#define CLOCK_IRQ 0
-
-/* MACE */
-#define MACE_VID_IN1_IRQ 1
-#define MACE_VID_IN2_IRQ 2
-#define MACE_VID_OUT_IRQ 3
-#define MACE_ETHERNET_IRQ 4
-/* SUPERIO, MISC, and AUDIO are MACEISA */
-#define MACE_PCI_BRIDGE_IRQ 8
-
-/* MACEPCI */
-#define MACEPCI_SCSI0_IRQ 9
-#define MACEPCI_SCSI1_IRQ 10
-#define MACEPCI_SLOT0_IRQ 11
-#define MACEPCI_SLOT1_IRQ 12
-#define MACEPCI_SLOT2_IRQ 13
-#define MACEPCI_SHARED0_IRQ 14
-#define MACEPCI_SHARED1_IRQ 15
-#define MACEPCI_SHARED2_IRQ 16
-
-/* CRIME */
-#define CRIME_GBE0_IRQ 17
-#define CRIME_GBE1_IRQ 18
-#define CRIME_GBE2_IRQ 19
-#define CRIME_GBE3_IRQ 20
-#define CRIME_CPUERR_IRQ 21
-#define CRIME_MEMERR_IRQ 22
-#define CRIME_RE_EMPTY_E_IRQ 23
-#define CRIME_RE_FULL_E_IRQ 24
-#define CRIME_RE_IDLE_E_IRQ 25
-#define CRIME_RE_EMPTY_L_IRQ 26
-#define CRIME_RE_FULL_L_IRQ 27
-#define CRIME_RE_IDLE_L_IRQ 28
-#define CRIME_SOFT0_IRQ 29
-#define CRIME_SOFT1_IRQ 30
-#define CRIME_SOFT2_IRQ 31
-#define CRIME_SYSCORERR_IRQ CRIME_SOFT2_IRQ
-#define CRIME_VICE_IRQ 32
-
-/* MACEISA */
-#define MACEISA_AUDIO_SW_IRQ 33
-#define MACEISA_AUDIO_SC_IRQ 34
-#define MACEISA_AUDIO1_DMAT_IRQ 35
-#define MACEISA_AUDIO1_OF_IRQ 36
-#define MACEISA_AUDIO2_DMAT_IRQ 37
-#define MACEISA_AUDIO2_MERR_IRQ 38
-#define MACEISA_AUDIO3_DMAT_IRQ 39
-#define MACEISA_AUDIO3_MERR_IRQ 40
-#define MACEISA_RTC_IRQ 41
-#define MACEISA_KEYB_IRQ 42
-/* MACEISA_KEYB_POLL is not an IRQ */
-#define MACEISA_MOUSE_IRQ 44
-/* MACEISA_MOUSE_POLL is not an IRQ */
-#define MACEISA_TIMER0_IRQ 46
-#define MACEISA_TIMER1_IRQ 47
-#define MACEISA_TIMER2_IRQ 48
-#define MACEISA_PARALLEL_IRQ 49
-#define MACEISA_PAR_CTXA_IRQ 50
-#define MACEISA_PAR_CTXB_IRQ 51
-#define MACEISA_PAR_MERR_IRQ 52
-#define MACEISA_SERIAL1_IRQ 53
-#define MACEISA_SERIAL1_TDMAT_IRQ 54
-#define MACEISA_SERIAL1_TDMAPR_IRQ 55
-#define MACEISA_SERIAL1_TDMAME_IRQ 56
-#define MACEISA_SERIAL1_RDMAT_IRQ 57
-#define MACEISA_SERIAL1_RDMAOR_IRQ 58
-#define MACEISA_SERIAL2_IRQ 59
-#define MACEISA_SERIAL2_TDMAT_IRQ 60
-#define MACEISA_SERIAL2_TDMAPR_IRQ 61
-#define MACEISA_SERIAL2_TDMAME_IRQ 62
-#define MACEISA_SERIAL2_RDMAT_IRQ 63
-#define MACEISA_SERIAL2_RDMAOR_IRQ 64
-
-#define IP32_IRQ_MAX MACEISA_SERIAL2_RDMAOR_IRQ
-
-#endif /* __ASM_IP32_INTS_H */
diff -Nru a/include/asm-mips64/ip32/mace.h b/include/asm-mips64/ip32/mace.h
--- a/include/asm-mips64/ip32/mace.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,254 +0,0 @@
-/*
- * Definitions for the SGI O2 Mace chip.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Harald Koerfgen
- */
-
-#ifndef __ASM_MACE_H__
-#define __ASM_MACE_H__
-
-#include <asm/addrspace.h>
-
-/*
- * Address map
- */
-#define MACE_BASE KSEG1ADDR(0x1f000000)
-#define MACE_PCI (0x00080000)
-#define MACE_VIN1 (0x00100000)
-#define MACE_VIN2 (0x00180000)
-#define MACE_VOUT (0x00200000)
-#define MACE_ENET (0x00280000)
-#define MACE_PERIF (0x00300000)
-#define MACE_ISA_EXT (0x00380000)
-
-#define MACE_AUDIO_BASE (MACE_PERIF )
-#define MACE_ISA_BASE (MACE_PERIF + 0x00010000)
-#define MACE_KBDMS_BASE (MACE_PERIF + 0x00020000)
-#define MACE_I2C_BASE (MACE_PERIF + 0x00030000)
-#define MACE_UST_BASE (MACE_PERIF + 0x00040000)
-
-
-#undef BIT
-#define BIT(__bit_offset) (1UL << (__bit_offset))
-
-/*
- * Mace MACEPCI interface, 32 bit regs
- */
-#define MACEPCI_ERROR_ADDR (MACE_PCI )
-#define MACEPCI_ERROR_FLAGS (MACE_PCI + 0x00000004)
-#define MACEPCI_CONTROL (MACE_PCI + 0x00000008)
-#define MACEPCI_REV (MACE_PCI + 0x0000000c)
-#define MACEPCI_WFLUSH (MACE_PCI + 0x0000000c) /* ??? --IV !!! It's for flushing read buffers on PCI MEMORY accesses!!! */
-#define MACEPCI_CONFIG_ADDR (MACE_PCI + 0x00000cf8)
-#define MACEPCI_CONFIG_DATA (MACE_PCI + 0x00000cfc)
-#define MACEPCI_LOW_MEMORY 0x1a000000
-#define MACEPCI_LOW_IO 0x18000000
-#define MACEPCI_SWAPPED_VIEW 0
-#define MACEPCI_NATIVE_VIEW 0x40000000
-#define MACEPCI_IO 0x80000000
-/*#define MACEPCI_HI_MEMORY 0x0000000280000000UL * This mipght be just 0x0000000200000000UL 2G more :) (or maybe it is different between 1.1 & 1.5 */
-#define MACEPCI_HI_MEMORY 0x0000000200000000UL /* This mipght be just 0x0000000200000000UL 2G more :) (or maybe it is different between 1.1 & 1.5 */
-#define MACEPCI_HI_IO 0x0000000100000000UL
-
-/*
- * Bits in the MACEPCI_CONTROL register
- */
-#define MACEPCI_CONTROL_INT(x) BIT(x)
-#define MACEPCI_CONTROL_INT_MASK 0xff
-#define MACEPCI_CONTROL_SERR_ENA BIT(8)
-#define MACEPCI_CONTROL_ARB_N6 BIT(9)
-#define MACEPCI_CONTROL_PARITY_ERR BIT(10)
-#define MACEPCI_CONTROL_MRMRA_ENA BIT(11)
-#define MACEPCI_CONTROL_ARB_N3 BIT(12)
-#define MACEPCI_CONTROL_ARB_N4 BIT(13)
-#define MACEPCI_CONTROL_ARB_N5 BIT(14)
-#define MACEPCI_CONTROL_PARK_LIU BIT(15)
-#define MACEPCI_CONTROL_INV_INT(x) BIT(16+x)
-#define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
-#define MACEPCI_CONTROL_OVERRUN_INT BIT(24)
-#define MACEPCI_CONTROL_PARITY_INT BIT(25)
-#define MACEPCI_CONTROL_SERR_INT BIT(26)
-#define MACEPCI_CONTROL_IT_INT BIT(27)
-#define MACEPCI_CONTROL_RE_INT BIT(28)
-#define MACEPCI_CONTROL_DPED_INT BIT(29)
-#define MACEPCI_CONTROL_TAR_INT BIT(30)
-#define MACEPCI_CONTROL_MAR_INT BIT(31)
-
-/*
- * Bits in the MACE_PCI error register
- */
-#define MACEPCI_ERROR_MASTER_ABORT BIT(31)
-#define MACEPCI_ERROR_TARGET_ABORT BIT(30)
-#define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29)
-#define MACEPCI_ERROR_RETRY_ERR BIT(28)
-#define MACEPCI_ERROR_ILLEGAL_CMD BIT(27)
-#define MACEPCI_ERROR_SYSTEM_ERR BIT(26)
-#define MACEPCI_ERROR_INTERRUPT_TEST BIT(25)
-#define MACEPCI_ERROR_PARITY_ERR BIT(24)
-#define MACEPCI_ERROR_OVERRUN BIT(23)
-#define MACEPCI_ERROR_RSVD BIT(22)
-#define MACEPCI_ERROR_MEMORY_ADDR BIT(21)
-#define MACEPCI_ERROR_CONFIG_ADDR BIT(20)
-#define MACEPCI_ERROR_MASTER_ABORT_ADDR_VALID BIT(19)
-#define MACEPCI_ERROR_TARGET_ABORT_ADDR_VALID BIT(18)
-#define MACEPCI_ERROR_DATA_PARITY_ADDR_VALID BIT(17)
-#define MACEPCI_ERROR_RETRY_ADDR_VALID BIT(16)
-#define MACEPCI_ERROR_SIG_TABORT BIT(4)
-#define MACEPCI_ERROR_DEVSEL_MASK 0xc0
-#define MACEPCI_ERROR_DEVSEL_FAST 0
-#define MACEPCI_ERROR_DEVSEL_MED 0x40
-#define MACEPCI_ERROR_DEVSEL_SLOW 0x80
-#define MACEPCI_ERROR_FBB BIT(1)
-#define MACEPCI_ERROR_66MHZ BIT(0)
-
-/*
- * Mace timer registers - 64 bit regs (63:32 are UST, 31:0 are MSC)
- */
-#define MSC_PART(__reg) ((__reg) & 0x00000000ffffffff)
-#define UST_PART(__reg) (((__reg) & 0xffffffff00000000) >> 32)
-
-#define MACE_UST_UST (MACE_UST_BASE ) /* Universial system time */
-#define MACE_UST_COMPARE1 (MACE_UST_BASE + 0x00000008) /* Interrupt compare reg 1 */
-#define MACE_UST_COMPARE2 (MACE_UST_BASE + 0x00000010) /* Interrupt compare reg 2 */
-#define MACE_UST_COMPARE3 (MACE_UST_BASE + 0x00000018) /* Interrupt compare reg 3 */
-#define MACE_UST_PERIOD_NS 960 /* UST Period in ns */
-
-#define MACE_UST_AIN_MSC (MACE_UST_BASE + 0x00000020) /* Audio in MSC/UST pair */
-#define MACE_UST_AOUT1_MSC (MACE_UST_BASE + 0x00000028) /* Audio out 1 MSC/UST pair */
-#define MACE_UST_AOUT2_MSC (MACE_UST_BASE + 0x00000030) /* Audio out 2 MSC/UST pair */
-#define MACE_VIN1_MSC_UST (MACE_UST_BASE + 0x00000038) /* Video In 1 MSC/UST pair */
-#define MACE_VIN2_MSC_UST (MACE_UST_BASE + 0x00000040) /* Video In 2 MSC/UST pair */
-#define MACE_VOUT_MSC_UST (MACE_UST_BASE + 0x00000048) /* Video out MSC/UST pair */
-
-/*
- * Mace "ISA" peripherals
- */
-#define MACEISA_EPP_BASE (MACE_ISA_EXT )
-#define MACEISA_ECP_BASE (MACE_ISA_EXT + 0x00008000)
-#define MACEISA_SER1_BASE (MACE_ISA_EXT + 0x00010000)
-#define MACEISA_SER2_BASE (MACE_ISA_EXT + 0x00018000)
-#define MACEISA_RTC_BASE (MACE_ISA_EXT + 0x00020000)
-#define MACEISA_GAME_BASE (MACE_ISA_EXT + 0x00030000)
-
-/*
- * Ringbase address and reset register - 64 bits
- */
-#define MACEISA_RINGBASE MACE_ISA_BASE
-
-/*
- * Flash-ROM/LED/DP-RAM/NIC Controller Register - 64 bits (?)
- */
-#define MACEISA_FLASH_NIC_REG (MACE_ISA_BASE + 0x00000008)
-
-/*
- * Bit definitions for that
- */
-#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
-#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
-#define MACEISA_NIC_DEASSERT BIT(2)
-#define MACEISA_NIC_DATA BIT(3)
-#define MACEISA_LED_RED BIT(4) /* 0=> Illuminate RED LED */
-#define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate GREEN LED */
-#define MACEISA_DP_RAM_ENABLE BIT(6)
-
-/*
- * ISA interrupt and status registers - 32 bit
- */
-#define MACEISA_INT_STAT (MACE_ISA_BASE + 0x00000014)
-#define MACEISA_INT_MASK (MACE_ISA_BASE + 0x0000001c)
-
-/*
- * Bits in the status/mask registers
- */
-#define MACEISA_AUDIO_SW_INT BIT (0)
-#define MACEISA_AUDIO_SC_INT BIT (1)
-#define MACEISA_AUDIO1_DMAT_INT BIT (2)
-#define MACEISA_AUDIO1_OF_INT BIT (3)
-#define MACEISA_AUDIO2_DMAT_INT BIT (4)
-#define MACEISA_AUDIO2_MERR_INT BIT (5)
-#define MACEISA_AUDIO3_DMAT_INT BIT (6)
-#define MACEISA_AUDIO3_MERR_INT BIT (7)
-#define MACEISA_RTC_INT BIT (8)
-#define MACEISA_KEYB_INT BIT (9)
-#define MACEISA_KEYB_POLL_INT BIT (10)
-#define MACEISA_MOUSE_INT BIT (11)
-#define MACEISA_MOUSE_POLL_INT BIT (12)
-#define MACEISA_TIMER0_INT BIT (13)
-#define MACEISA_TIMER1_INT BIT (14)
-#define MACEISA_TIMER2_INT BIT (15)
-#define MACEISA_PARALLEL_INT BIT (16)
-#define MACEISA_PAR_CTXA_INT BIT (17)
-#define MACEISA_PAR_CTXB_INT BIT (18)
-#define MACEISA_PAR_MERR_INT BIT (19)
-#define MACEISA_SERIAL1_INT BIT (20)
-#define MACEISA_SERIAL1_TDMAT_INT BIT (21)
-#define MACEISA_SERIAL1_TDMAPR_INT BIT (22)
-#define MACEISA_SERIAL1_TDMAME_INT BIT (23)
-#define MACEISA_SERIAL1_RDMAT_INT BIT (24)
-#define MACEISA_SERIAL1_RDMAOR_INT BIT (25)
-#define MACEISA_SERIAL2_INT BIT (26)
-#define MACEISA_SERIAL2_TDMAT_INT BIT (27)
-#define MACEISA_SERIAL2_TDMAPR_INT BIT (28)
-#define MACEISA_SERIAL2_TDMAME_INT BIT (29)
-#define MACEISA_SERIAL2_RDMAT_INT BIT (30)
-#define MACEISA_SERIAL2_RDMAOR_INT BIT (31)
-
-#ifndef __ASSEMBLY__
-#include <asm/types.h>
-
-/*
- * XXX Some of these are probably not needed (or even legal?)
- */
-static inline u8 mace_read_8 (unsigned long __offset)
-{
- return *((volatile u8 *) (MACE_BASE + __offset));
-}
-
-static inline u16 mace_read_16 (unsigned long __offset)
-{
- return *((volatile u16 *) (MACE_BASE + __offset));
-}
-
-static inline u32 mace_read_32 (unsigned long __offset)
-{
- return *((volatile u32 *) (MACE_BASE + __offset));
-}
-
-static inline u64 mace_read_64 (unsigned long __offset)
-{
- return *((volatile u64 *) (MACE_BASE + __offset));
-}
-
-static inline void mace_write_8 (unsigned long __offset, u8 __val)
-{
- *((volatile u8 *) (MACE_BASE + __offset)) = __val;
-}
-
-static inline void mace_write_16 (unsigned long __offset, u16 __val)
-{
- *((volatile u16 *) (MACE_BASE + __offset)) = __val;
-}
-
-static inline void mace_write_32 (unsigned long __offset, u32 __val)
-{
- *((volatile u32 *) (MACE_BASE + __offset)) = __val;
-}
-
-static inline void mace_write_64 (unsigned long __offset, u64 __val)
-{
- *((volatile u64 *) (MACE_BASE + __offset)) = __val;
-}
-
-/* Call it whenever device needs to read data from main memory coherently */
-static inline void mace_inv_read_buffers(void)
-{
-/* mace_write_32(MACEPCI_WFLUSH,0xffffffff);*/
-}
-#endif /* !__ASSEMBLY__ */
-
-
-#endif /* __ASM_MACE_H__ */
diff -Nru a/include/asm-mips64/ip32/machine.h b/include/asm-mips64/ip32/machine.h
--- a/include/asm-mips64/ip32/machine.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,21 +0,0 @@
-/*
- * machine.h -- Machine/group probing for ip32
- *
- * Copyright (C) 2001 Keith M Wesolowski
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_IP32_MACHINE_H
-#define _ASM_IP32_MACHINE_H
-
-#include <linux/config.h>
-
-#ifdef CONFIG_SGI_IP32
-
-#define SGI_MACH_O2 0x3201
-
-#endif /* CONFIG_SGI_IP32 */
-
-#endif /* _ASM_SGI_MACHINE_H */
diff -Nru a/include/asm-mips64/ipc.h b/include/asm-mips64/ipc.h
--- a/include/asm-mips64/ipc.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,33 +0,0 @@
-#ifndef _ASM_IPC_H
-#define _ASM_IPC_H
-
-/*
- * These are used to wrap system calls on MIPS32.
- *
- * See arch/mips/kernel/sysmips.c for ugly details..
- * FIXME: split up into ordinary syscalls ...
- */
-struct ipc_kludge {
- struct msgbuf *msgp;
- long msgtyp;
-};
-
-#define SEMOP 1
-#define SEMGET 2
-#define SEMCTL 3
-#define SEMTIMEDOP 4
-#define MSGSND 11
-#define MSGRCV 12
-#define MSGGET 13
-#define MSGCTL 14
-#define SHMAT 21
-#define SHMDT 22
-#define SHMGET 23
-#define SHMCTL 24
-
-/* Used by the DIPC package, try and avoid reusing it */
-#define DIPC 25
-
-#define IPCCALL(version,op) ((version)<<16 | (op))
-
-#endif /* _ASM_IPC_H */
diff -Nru a/include/asm-mips64/ipcbuf.h b/include/asm-mips64/ipcbuf.h
--- a/include/asm-mips64/ipcbuf.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,28 +0,0 @@
-#ifndef _ASM_IPCBUF_H
-#define _ASM_IPCBUF_H
-
-/*
- * The ipc64_perm structure for alpha architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values
- */
-
-struct ipc64_perm
-{
- __kernel_key_t key;
- __kernel_uid_t uid;
- __kernel_gid_t gid;
- __kernel_uid_t cuid;
- __kernel_gid_t cgid;
- __kernel_mode_t mode;
- unsigned short seq;
- unsigned short __pad1;
- unsigned long __unused1;
- unsigned long __unused2;
-};
-
-#endif /* _ASM_IPCBUF_H */
diff -Nru a/include/asm-mips64/irq.h b/include/asm-mips64/irq.h
--- a/include/asm-mips64/irq.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,58 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
- * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 Kanoj Sarcar
- */
-#ifndef _ASM_IRQ_H
-#define _ASM_IRQ_H
-
-#include <linux/config.h>
-#include <linux/linkage.h>
-#include <asm/sn/arch.h>
-
-#define NR_IRQS 256
-
-/*
- * Number of levels in INT_PEND0. Can be set to 128 if we also
- * consider INT_PEND1.
- */
-#define PERNODE_LEVELS 64
-
-extern int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];
-
-/*
- * we need to map irq's up to at least bit 7 of the INT_MASK0_A register
- * since bits 0-6 are pre-allocated for other purposes.
- */
-#define LEAST_LEVEL 7
-#define FAST_IRQ_TO_LEVEL(i) ((i) + LEAST_LEVEL)
-#define LEVEL_TO_IRQ(c, l) \
- (node_level_to_irq[CPUID_TO_COMPACT_NODEID(c)][(l)])
-
-#ifdef CONFIG_I8259
-static inline int irq_canonicalize(int irq)
-{
- return ((irq == 2) ? 9 : irq);
-}
-#else
-#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
-#endif
-
-extern void disable_irq(unsigned int);
-extern void disable_irq_nosync(unsigned int);
-extern void enable_irq(unsigned int);
-
-struct pt_regs;
-extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
-
-/* Machine specific interrupt initialization */
-extern void (*irq_setup)(void);
-
-extern void init_generic_irq(void);
-
-#endif /* _ASM_IRQ_H */
diff -Nru a/include/asm-mips64/irq_cpu.h b/include/asm-mips64/irq_cpu.h
--- a/include/asm-mips64/irq_cpu.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,18 +0,0 @@
-/*
- * include/asm-mips/irq_cpu.h
- *
- * MIPS CPU interrupt definitions.
- *
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS64_IRQ_CPU_H
-#define __ASM_MIPS64_IRQ_CPU_H
-
-extern void mips_cpu_irq_init(int irq_base);
-
-#endif /* __ASM_MIPS64_IRQ_CPU_H */
diff -Nru a/include/asm-mips64/keyboard.h b/include/asm-mips64/keyboard.h
--- a/include/asm-mips64/keyboard.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,96 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999 Ralf Baechle
- */
-#ifndef _ASM_KEYBOARD_H
-#define _ASM_KEYBOARD_H
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/kd.h>
-#include <linux/pm.h>
-
-#define DISABLE_KBD_DURING_INTERRUPTS 0
-
-#ifdef CONFIG_PC_KEYB
-
-extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int pckbd_getkeycode(unsigned int scancode);
-extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-extern char pckbd_unexpected_up(unsigned char keycode);
-extern void pckbd_leds(unsigned char leds);
-extern void pckbd_init_hw(void);
-extern int pckbd_pm_resume(struct pm_dev *, pm_request_t, void *);
-extern pm_callback pm_kbd_request_override;
-extern unsigned char pckbd_sysrq_xlate[128];
-extern void kbd_forward_char (int ch);
-
-#define kbd_setkeycode pckbd_setkeycode
-#define kbd_getkeycode pckbd_getkeycode
-#define kbd_translate pckbd_translate
-#define kbd_unexpected_up pckbd_unexpected_up
-#define kbd_leds pckbd_leds
-#define kbd_init_hw pckbd_init_hw
-#define kbd_sysrq_xlate pckbd_sysrq_xlate
-
-#define SYSRQ_KEY 0x54
-
-/* Some stoneage hardware needs delays after some operations. */
-#define kbd_pause() do { } while(0)
-
-struct kbd_ops {
- /* Keyboard driver resource allocation */
- void (*kbd_request_region)(void);
- int (*kbd_request_irq)(void (*handler)(int, void *, struct pt_regs *));
-
- /* PSaux driver resource management */
- int (*aux_request_irq)(void (*handler)(int, void *, struct pt_regs *));
- void (*aux_free_irq)(void);
-
- /* Methods to access the keyboard processor's I/O registers */
- unsigned char (*kbd_read_input)(void);
- void (*kbd_write_output)(unsigned char val);
- void (*kbd_write_command)(unsigned char val);
- unsigned char (*kbd_read_status)(void);
-};
-
-extern struct kbd_ops *kbd_ops;
-
-/* Do the actual calls via kbd_ops vector */
-#define kbd_request_region() kbd_ops->kbd_request_region()
-#define kbd_request_irq(handler) kbd_ops->kbd_request_irq(handler)
-
-#define aux_request_irq(hand, dev_id) kbd_ops->aux_request_irq(hand)
-#define aux_free_irq(dev_id) kbd_ops->aux_free_irq()
-
-#define kbd_read_input() kbd_ops->kbd_read_input()
-#define kbd_write_output(val) kbd_ops->kbd_write_output(val)
-#define kbd_write_command(val) kbd_ops->kbd_write_command(val)
-#define kbd_read_status() kbd_ops->kbd_read_status()
-
-#else
-
-extern int kbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int kbd_getkeycode(unsigned int scancode);
-extern int kbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-extern char kbd_unexpected_up(unsigned char keycode);
-extern void kbd_leds(unsigned char leds);
-extern void kbd_init_hw(void);
-extern unsigned char *kbd_sysrq_xlate;
-
-extern unsigned char kbd_sysrq_key;
-#define SYSRQ_KEY kbd_sysrq_key
-
-#endif
-
-#endif /* __KERNEL */
-
-#endif /* _ASM_KEYBOARD_H */
diff -Nru a/include/asm-mips64/kmap_types.h b/include/asm-mips64/kmap_types.h
--- a/include/asm-mips64/kmap_types.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,35 +0,0 @@
-/*
- * Copy of the 32-bit kmap_types.h file just to keep things building ...
- */
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
-
-#include <linux/config.h>
-
-#ifdef CONFIG_DEBUG_HIGHMEM
-# define D(n) __KM_FENCE_##n ,
-#else
-# define D(n)
-#endif
-
-enum km_type {
-D(0) KM_BOUNCE_READ,
-D(1) KM_SKB_SUNRPC_DATA,
-D(2) KM_SKB_DATA_SOFTIRQ,
-D(3) KM_USER0,
-D(4) KM_USER1,
-D(5) KM_BIO_SRC_IRQ,
-D(6) KM_BIO_DST_IRQ,
-D(7) KM_PTE0,
-D(8) KM_PTE1,
-D(9) KM_PTE2,
-D(10) KM_IRQ0,
-D(11) KM_IRQ1,
-D(12) KM_SOFTIRQ0,
-D(13) KM_SOFTIRQ1,
-D(14) KM_TYPE_NR
-};
-
-#undef D
-
-#endif
diff -Nru a/include/asm-mips64/linkage.h b/include/asm-mips64/linkage.h
--- a/include/asm-mips64/linkage.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,6 +0,0 @@
-#ifndef __ASM_LINKAGE_H
-#define __ASM_LINKAGE_H
-
-/* Nothing to see here... */
-
-#endif
diff -Nru a/include/asm-mips64/m48t35.h b/include/asm-mips64/m48t35.h
--- a/include/asm-mips64/m48t35.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-/*
- * Registers for the SGS-Thomson M48T35 Timekeeper RAM chip
- */
-#ifndef _ASM_M48T35_H
-#define _ASM_M48T35_H
-
-#include <linux/spinlock.h>
-
-extern spinlock_t rtc_lock;
-
-struct m48t35_rtc {
- volatile u8 pad[0x7ff8]; /* starts at 0x7ff8 */
- volatile u8 control;
- volatile u8 sec;
- volatile u8 min;
- volatile u8 hour;
- volatile u8 day;
- volatile u8 date;
- volatile u8 month;
- volatile u8 year;
-};
-
-#define M48T35_RTC_SET 0x80
-#define M48T35_RTC_STOPPED 0x80
-#define M48T35_RTC_READ 0x40
-
-#endif /* _ASM_M48T35_H */
diff -Nru a/include/asm-mips64/mc146818rtc.h b/include/asm-mips64/mc146818rtc.h
--- a/include/asm-mips64/mc146818rtc.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,60 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Machine dependent access functions for RTC registers.
- *
- * Copyright (C) 1996, 1997, 1998 Ralf Baechle
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#ifndef _ASM_MC146818RTC_H
-#define _ASM_MC146818RTC_H
-
-#include <linux/config.h>
-
-#include <asm/io.h>
-
-
-/*
- * This structure defines how to access various features of
- * different machine types and how to access them.
- */
-struct rtc_ops {
- /* How to access the RTC register in a DS1287. */
- unsigned char (*rtc_read_data)(unsigned long addr);
- void (*rtc_write_data)(unsigned char data, unsigned long addr);
- int (*rtc_bcd_mode)(void);
-};
-
-extern struct rtc_ops *rtc_ops;
-
-/*
- * Most supported machines access the RTC index register via an ISA
- * port access but the way to access the date register differs ...
- * The DECstation directly maps the RTC memory in the CPU's address
- * space with the chipset generating necessary index write/data access
- * cycles automagically.
- */
-#define CMOS_READ(addr) ({ \
-rtc_ops->rtc_read_data(addr); \
-})
-#define CMOS_WRITE(val, addr) ({ \
-rtc_ops->rtc_write_data(val, addr); \
-})
-#define RTC_ALWAYS_BCD \
-rtc_ops->rtc_bcd_mode()
-
-
-#ifdef CONFIG_DECSTATION
-
-#include <asm/dec/rtc-dec.h>
-
-#else
-
-#define RTC_PORT(x) (0x70 + (x))
-#define RTC_IRQ 8
-
-#endif
-
-#endif /* _ASM_MC146818RTC_H */
diff -Nru a/include/asm-mips64/mips-boards/atlas.h b/include/asm-mips64/mips-boards/atlas.h
--- a/include/asm-mips64/mips-boards/atlas.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,62 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the Atlas board specific address-MAP, registers, etc.
- *
- */
-#ifndef _MIPS_ATLAS_H
-#define _MIPS_ATLAS_H
-
-#include <asm/addrspace.h>
-
-/*
- * Atlas RTC-device indirect register access.
- */
-#define ATLAS_RTC_ADR_REG (KSEG1ADDR(0x1f000800))
-#define ATLAS_RTC_DAT_REG (KSEG1ADDR(0x1f000808))
-
-
-/*
- * Atlas interrupt controller register base.
- */
-#define ATLAS_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
-
-/*
- * Atlas UART register base.
- */
-#define ATLAS_UART_REGS_BASE (0x1f000900)
-#define ATLAS_BASE_BAUD ( 3686400 / 16 )
-
-/*
- * Atlas PSU standby register.
- */
-#define ATLAS_PSUSTBY_REG (KSEG1ADDR(0x1f000600))
-#define ATLAS_GOSTBY 0x4d
-
-/*
- * We make a universal assumption about the way the bootloader (YAMON)
- * have located the Philips SAA9730 chip.
- * This is not ideal, but is needed for setting up remote debugging as
- * soon as possible.
- */
-#define ATLAS_SAA9730_REG (KSEG1ADDR(0x08800000))
-
-#endif /* !(_MIPS_ATLAS_H) */
diff -Nru a/include/asm-mips64/mips-boards/atlasint.h b/include/asm-mips64/mips-boards/atlasint.h
--- a/include/asm-mips64/mips-boards/atlasint.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,51 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines for the Atlas interrupt controller.
- *
- */
-#ifndef _MIPS_ATLASINT_H
-#define _MIPS_ATLASINT_H
-
-/* Number of IRQ supported on hw interrupt 0. */
-#define ATLASINT_UART 0
-#define ATLASINT_END 32
-
-/*
- * Atlas registers are memory mapped on 64-bit aligned boundaries and
- * only word access are allowed.
- */
-struct atlas_ictrl_regs {
- volatile unsigned long intraw;
- long dummy1;
- volatile unsigned long intseten;
- long dummy2;
- volatile unsigned long intrsten;
- long dummy3;
- volatile unsigned long intenable;
- long dummy4;
- volatile unsigned long intstatus;
- long dummy5;
-};
-
-extern void atlasint_init(void);
-
-#endif /* !(_MIPS_ATLASINT_H) */
diff -Nru a/include/asm-mips64/mips-boards/bonito64.h b/include/asm-mips64/mips-boards/bonito64.h
--- a/include/asm-mips64/mips-boards/bonito64.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,432 +0,0 @@
-/*
- * bonito.h
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2001 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This file is the original bonito.h from Algorithmics with minor changes
- * to fit into linux.
- */
-
-/*
- * Bonito Register Map
- * Copyright (c) 1999 Algorithmics Ltd
- *
- * Algorithmics gives permission for anyone to use and modify this file
- * without any obligation or license condition except that you retain
- * this copyright message in any source redistribution in whole or part.
- *
- * Updated copies of this and other files can be found at
- * ftp://ftp.algor.co.uk/pub/bonito/
- *
- * Users of the Bonito controller are warmly recommended to contribute
- * any useful changes back to Algorithmics (mail to bonito@algor.co.uk).
- */
-
-/* Revision 1.48 autogenerated on 08/17/99 15:20:01 */
-/* This bonito64 version editted from bonito.h Revision 1.48 on 11/09/00 */
-
-#ifndef _ASM_MIPS_BOARDS_BONITO64_H
-#define _ASM_MIPS_BOARDS_BONITO64_H
-
-#ifdef __ASSEMBLY__
-
-/* offsets from base register */
-#define BONITO(x) (x)
-
-#else /* !__ASSEMBLY__ */
-
-/* offsets from base pointer, this construct allows optimisation */
-/* static char * const _bonito = PA_TO_KVA1(BONITO_BASE); */
-#define BONITO(x) *(volatile u32 *)(_bonito + (x))
-
-#endif /* __ASSEMBLY__ */
-
-
-#define BONITO_BOOT_BASE 0x1fc00000
-#define BONITO_BOOT_SIZE 0x00100000
-#define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1)
-#define BONITO_FLASH_BASE 0x1c000000
-#define BONITO_FLASH_SIZE 0x03000000
-#define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1)
-#define BONITO_SOCKET_BASE 0x1f800000
-#define BONITO_SOCKET_SIZE 0x00400000
-#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1)
-#define BONITO_REG_BASE 0x1fe00000
-#define BONITO_REG_SIZE 0x00040000
-#define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1)
-#define BONITO_DEV_BASE 0x1ff00000
-#define BONITO_DEV_SIZE 0x00100000
-#define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1)
-#define BONITO_PCILO_BASE 0x10000000
-#define BONITO_PCILO_SIZE 0x0c000000
-#define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1)
-#define BONITO_PCILO0_BASE 0x10000000
-#define BONITO_PCILO1_BASE 0x14000000
-#define BONITO_PCILO2_BASE 0x18000000
-#define BONITO_PCIHI_BASE 0x20000000
-#define BONITO_PCIHI_SIZE 0x20000000
-#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1)
-#define BONITO_PCIIO_BASE 0x1fd00000
-#define BONITO_PCIIO_SIZE 0x00100000
-#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1)
-#define BONITO_PCICFG_BASE 0x1fe80000
-#define BONITO_PCICFG_SIZE 0x00080000
-#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1)
-
-
-/* Bonito Register Bases */
-
-#define BONITO_PCICONFIGBASE 0x00
-#define BONITO_REGBASE 0x100
-
-
-/* PCI Configuration Registers */
-
-#define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x))
-#define BONITO_PCIDID BONITO_PCI_REG(0x00)
-#define BONITO_PCICMD BONITO_PCI_REG(0x04)
-#define BONITO_PCICLASS BONITO_PCI_REG(0x08)
-#define BONITO_PCILTIMER BONITO_PCI_REG(0x0c)
-#define BONITO_PCIBASE0 BONITO_PCI_REG(0x10)
-#define BONITO_PCIBASE1 BONITO_PCI_REG(0x14)
-#define BONITO_PCIBASE2 BONITO_PCI_REG(0x18)
-#define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30)
-#define BONITO_PCIINT BONITO_PCI_REG(0x3c)
-
-#define BONITO_PCICMD_PERR_CLR 0x80000000
-#define BONITO_PCICMD_SERR_CLR 0x40000000
-#define BONITO_PCICMD_MABORT_CLR 0x20000000
-#define BONITO_PCICMD_MTABORT_CLR 0x10000000
-#define BONITO_PCICMD_TABORT_CLR 0x08000000
-#define BONITO_PCICMD_MPERR_CLR 0x01000000
-#define BONITO_PCICMD_PERRRESPEN 0x00000040
-#define BONITO_PCICMD_ASTEPEN 0x00000080
-#define BONITO_PCICMD_SERREN 0x00000100
-#define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00
-#define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8
-
-
-
-
-/* 1. Bonito h/w Configuration */
-/* Power on register */
-
-#define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00)
-
-#define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000
-#define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000
-#define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000
-#define BONITO_BONPONCFG_CPUBIGEND 0x00004000
-/* Added by RPF 11-9-00 */
-#define BONITO_BONPONCFG_BURSTORDER 0x00001000
-/* --- */
-#define BONITO_BONPONCFG_CPUPARITY 0x00002000
-#define BONITO_BONPONCFG_CPUTYPE 0x00000007
-#define BONITO_BONPONCFG_CPUTYPE_SHIFT 0
-#define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008
-#define BONITO_BONPONCFG_IS_ARBITER 0x00000010
-#define BONITO_BONPONCFG_ROMBOOT 0x000000c0
-#define BONITO_BONPONCFG_ROMBOOT_SHIFT 6
-
-#define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
-#define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
-#define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
-#define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
-
-#define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100
-#define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200
-#define BONITO_BONPONCFG_ROMCS0FAST 0x00000400
-#define BONITO_BONPONCFG_ROMCS1FAST 0x00000800
-#define BONITO_BONPONCFG_CONFIG_DIS 0x00000020
-
-
-/* Other Bonito configuration */
-
-#define BONITO_BONGENCFG_OFFSET 0x4
-#define BONITO_BONGENCFG BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET)
-
-#define BONITO_BONGENCFG_DEBUGMODE 0x00000001
-#define BONITO_BONGENCFG_SNOOPEN 0x00000002
-#define BONITO_BONGENCFG_CPUSELFRESET 0x00000004
-
-#define BONITO_BONGENCFG_FORCE_IRQA 0x00000008
-#define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010
-#define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020
-#define BONITO_BONGENCFG_BYTESWAP 0x00000040
-
-#define BONITO_BONGENCFG_UNCACHED 0x00000080
-#define BONITO_BONGENCFG_PREFETCHEN 0x00000100
-#define BONITO_BONGENCFG_WBEHINDEN 0x00000200
-#define BONITO_BONGENCFG_CACHEALG 0x00000c00
-#define BONITO_BONGENCFG_CACHEALG_SHIFT 10
-#define BONITO_BONGENCFG_PCIQUEUE 0x00001000
-#define BONITO_BONGENCFG_CACHESTOP 0x00002000
-#define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000
-#define BONITO_BONGENCFG_BUSERREN 0x00008000
-#define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000
-#define BONITO_BONGENCFG_SHORTCOPYTIMEOUT 0x00020000
-
-/* 2. IO & IDE configuration */
-
-#define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08)
-
-/* 3. IO & IDE configuration */
-
-#define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c)
-
-/* 4. PCI address map control */
-
-#define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10)
-#define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14)
-#define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18)
-
-/* 5. ICU & GPIO regs */
-
-/* GPIO Regs - r/w */
-
-#define BONITO_GPIODATA_OFFSET 0x1c
-#define BONITO_GPIODATA BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET)
-#define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20)
-
-/* ICU Configuration Regs - r/w */
-
-#define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24)
-#define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28)
-#define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c)
-
-/* ICU Enable Regs - IntEn & IntISR are r/o. */
-
-#define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30)
-#define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34)
-#define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38)
-#define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c)
-
-/* PCI mail boxes */
-
-#define BONITO_PCIMAIL0_OFFSET 0x40
-#define BONITO_PCIMAIL1_OFFSET 0x44
-#define BONITO_PCIMAIL2_OFFSET 0x48
-#define BONITO_PCIMAIL3_OFFSET 0x4c
-#define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40)
-#define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44)
-#define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48)
-#define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c)
-
-
-/* 6. PCI cache */
-
-#define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50)
-#define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54)
-
-#define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58)
-#define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c)
-
-
-/*
-#define BONITO_PCIRDPOST BONITO(BONITO_REGBASE + 0x60)
-#define BONITO_PCIDATA BONITO(BONITO_REGBASE + 0x64)
-*/
-
-/* 7. IDE DMA & Copier */
-
-#define BONITO_CONFIGBASE 0x000
-#define BONITO_BONITOBASE 0x100
-#define BONITO_LDMABASE 0x200
-#define BONITO_COPBASE 0x300
-#define BONITO_REG_BLOCKMASK 0x300
-
-#define BONITO_LDMACTRL BONITO(BONITO_LDMABASE + 0x0)
-#define BONITO_LDMASTAT BONITO(BONITO_LDMABASE + 0x0)
-#define BONITO_LDMAADDR BONITO(BONITO_LDMABASE + 0x4)
-#define BONITO_LDMAGO BONITO(BONITO_LDMABASE + 0x8)
-#define BONITO_LDMADATA BONITO(BONITO_LDMABASE + 0xc)
-
-#define BONITO_COPCTRL BONITO(BONITO_COPBASE + 0x0)
-#define BONITO_COPSTAT BONITO(BONITO_COPBASE + 0x0)
-#define BONITO_COPPADDR BONITO(BONITO_COPBASE + 0x4)
-#define BONITO_COPDADDR BONITO(BONITO_COPBASE + 0x8)
-#define BONITO_COPGO BONITO(BONITO_COPBASE + 0xc)
-
-
-/* ###### Bit Definitions for individual Registers #### */
-
-/* Gen DMA. */
-
-#define BONITO_IDECOPDADDR_DMA_DADDR 0x0ffffffc
-#define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT 2
-#define BONITO_IDECOPPADDR_DMA_PADDR 0xfffffffc
-#define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT 2
-#define BONITO_IDECOPGO_DMA_SIZE 0x0000fffe
-#define BONITO_IDECOPGO_DMA_SIZE_SHIFT 0
-#define BONITO_IDECOPGO_DMA_WRITE 0x00010000
-#define BONITO_IDECOPGO_DMAWCOUNT 0x000f0000
-#define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16
-
-#define BONITO_IDECOPCTRL_DMA_STARTBIT 0x80000000
-#define BONITO_IDECOPCTRL_DMA_RSTBIT 0x40000000
-
-/* DRAM - sdCfg */
-
-#define BONITO_SDCFG_AROWBITS 0x00000003
-#define BONITO_SDCFG_AROWBITS_SHIFT 0
-#define BONITO_SDCFG_ACOLBITS 0x0000000c
-#define BONITO_SDCFG_ACOLBITS_SHIFT 2
-#define BONITO_SDCFG_ABANKBIT 0x00000010
-#define BONITO_SDCFG_ASIDES 0x00000020
-#define BONITO_SDCFG_AABSENT 0x00000040
-#define BONITO_SDCFG_AWIDTH64 0x00000080
-
-#define BONITO_SDCFG_BROWBITS 0x00000300
-#define BONITO_SDCFG_BROWBITS_SHIFT 8
-#define BONITO_SDCFG_BCOLBITS 0x00000c00
-#define BONITO_SDCFG_BCOLBITS_SHIFT 10
-#define BONITO_SDCFG_BBANKBIT 0x00001000
-#define BONITO_SDCFG_BSIDES 0x00002000
-#define BONITO_SDCFG_BABSENT 0x00004000
-#define BONITO_SDCFG_BWIDTH64 0x00008000
-
-#define BONITO_SDCFG_EXTRDDATA 0x00010000
-#define BONITO_SDCFG_EXTRASCAS 0x00020000
-#define BONITO_SDCFG_EXTPRECH 0x00040000
-#define BONITO_SDCFG_EXTRASWIDTH 0x00180000
-#define BONITO_SDCFG_EXTRASWIDTH_SHIFT 19
-/* Changed by RPF 11-9-00 */
-#define BONITO_SDCFG_DRAMMODESET 0x00200000
-/* --- */
-#define BONITO_SDCFG_DRAMEXTREGS 0x00400000
-#define BONITO_SDCFG_DRAMPARITY 0x00800000
-/* Added by RPF 11-9-00 */
-#define BONITO_SDCFG_DRAMBURSTLEN 0x03000000
-#define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24
-#define BONITO_SDCFG_DRAMMODESET_DONE 0x80000000
-/* --- */
-
-/* PCI Cache - pciCacheCtrl */
-
-#define BONITO_PCICACHECTRL_CACHECMD 0x00000007
-#define BONITO_PCICACHECTRL_CACHECMD_SHIFT 0
-#define BONITO_PCICACHECTRL_CACHECMDLINE 0x00000018
-#define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3
-#define BONITO_PCICACHECTRL_CMDEXEC 0x00000020
-
-#define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001
-#define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002
-#define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004
-
-#define BONITO_IODEVCFG_BUFFBIT_CS1 0x00000008
-#define BONITO_IODEVCFG_SPEEDBIT_CS1 0x00000010
-#define BONITO_IODEVCFG_MOREABITS_CS1 0x00000020
-
-#define BONITO_IODEVCFG_BUFFBIT_CS2 0x00000040
-#define BONITO_IODEVCFG_SPEEDBIT_CS2 0x00000080
-#define BONITO_IODEVCFG_MOREABITS_CS2 0x00000100
-
-#define BONITO_IODEVCFG_BUFFBIT_CS3 0x00000200
-#define BONITO_IODEVCFG_SPEEDBIT_CS3 0x00000400
-#define BONITO_IODEVCFG_MOREABITS_CS3 0x00000800
-
-#define BONITO_IODEVCFG_BUFFBIT_IDE 0x00001000
-#define BONITO_IODEVCFG_SPEEDBIT_IDE 0x00002000
-#define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000
-#define BONITO_IODEVCFG_MODEBIT_IDE 0x00008000
-#define BONITO_IODEVCFG_DMAON_IDE 0x001f0000
-#define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16
-#define BONITO_IODEVCFG_DMAOFF_IDE 0x01e00000
-#define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT 21
-#define BONITO_IODEVCFG_EPROMSPLIT 0x02000000
-/* Added by RPF 11-9-00 */
-#define BONITO_IODEVCFG_CPUCLOCKPERIOD 0xfc000000
-#define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26
-/* --- */
-
-/* gpio */
-#define BONITO_GPIO_GPIOW 0x000003ff
-#define BONITO_GPIO_GPIOW_SHIFT 0
-#define BONITO_GPIO_GPIOR 0x01ff0000
-#define BONITO_GPIO_GPIOR_SHIFT 16
-#define BONITO_GPIO_GPINR 0xfe000000
-#define BONITO_GPIO_GPINR_SHIFT 25
-#define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N)))
-#define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N)))
-#define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N)))
-
-/* ICU */
-#define BONITO_ICU_MBOXES 0x0000000f
-#define BONITO_ICU_MBOXES_SHIFT 0
-#define BONITO_ICU_DMARDY 0x00000010
-#define BONITO_ICU_DMAEMPTY 0x00000020
-#define BONITO_ICU_COPYRDY 0x00000040
-#define BONITO_ICU_COPYEMPTY 0x00000080
-#define BONITO_ICU_COPYERR 0x00000100
-#define BONITO_ICU_PCIIRQ 0x00000200
-#define BONITO_ICU_MASTERERR 0x00000400
-#define BONITO_ICU_SYSTEMERR 0x00000800
-#define BONITO_ICU_DRAMPERR 0x00001000
-#define BONITO_ICU_RETRYERR 0x00002000
-#define BONITO_ICU_GPIOS 0x01ff0000
-#define BONITO_ICU_GPIOS_SHIFT 16
-#define BONITO_ICU_GPINS 0x7e000000
-#define BONITO_ICU_GPINS_SHIFT 25
-#define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N)))
-#define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N)))
-#define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N)))
-
-/* pcimap */
-
-#define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f
-#define BONITO_PCIMAP_PCIMAP_LO0_SHIFT 0
-#define BONITO_PCIMAP_PCIMAP_LO1 0x00000fc0
-#define BONITO_PCIMAP_PCIMAP_LO1_SHIFT 6
-#define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000
-#define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12
-#define BONITO_PCIMAP_PCIMAP_2 0x00040000
-#define BONITO_PCIMAP_WIN(WIN,ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
-
-#define BONITO_PCIMAP_WINSIZE (1<<26)
-#define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1))
-#define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26)
-
-/* pcimembaseCfg */
-
-#define BONITO_PCIMEMBASECFG_MASK 0xf0000000
-#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f
-#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0
-#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0
-#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5
-#define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400
-#define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800
-
-#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000
-#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12
-#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000
-#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17
-#define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000
-#define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000
-
-#define BONITO_PCIMEMBASECFG_ASHIFT 23
-#define BONITO_PCIMEMBASECFG_AMASK 0x007fffff
-#define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)
-#define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS)
-
-#define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK)
-
-
-#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
-#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
-#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
-
-#define BONITO_PCITOPHYS(WIN,ADDR,CFG) ( \
- (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \
- (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \
- )
-
-/* PCICmd */
-
-#define BONITO_PCICMD_MEMEN 0x00000002
-#define BONITO_PCICMD_MSTREN 0x00000004
-
-
-#endif /* _ASM_MIPS_BOARDS_BONITO64_H */
diff -Nru a/include/asm-mips64/mips-boards/generic.h b/include/asm-mips64/mips-boards/generic.h
--- a/include/asm-mips64/mips-boards/generic.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,111 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the MIPS boards specific address-MAP, registers, etc.
- *
- */
-#ifndef _MIPS_GENERIC_H
-#define _MIPS_GENERIC_H
-
-#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/byteorder.h>
-#include <asm/mips-boards/bonito64.h>
-
-/*
- * Display register base.
- */
-#if defined(CONFIG_MIPS_SEAD)
-#define ASCII_DISPLAY_POS_BASE (KSEG1ADDR(0x1f0005c0))
-#else
-#define ASCII_DISPLAY_WORD_BASE (KSEG1ADDR(0x1f000410))
-#define ASCII_DISPLAY_POS_BASE (KSEG1ADDR(0x1f000418))
-#endif
-
-
-/*
- * Yamon Prom print address.
- */
-#define YAMON_PROM_PRINT_ADDR (KSEG1ADDR(0x1fc00504))
-
-
-/*
- * Reset register.
- */
-#if defined(CONFIG_MIPS_SEAD)
-#define SOFTRES_REG (KSEG1ADDR(0x1e800050))
-#define GORESET 0x4d
-#else
-#define SOFTRES_REG (KSEG1ADDR(0x1f000500))
-#define GORESET 0x42
-#endif
-
-/*
- * Revision register.
- */
-#define MIPS_REVISION_REG (KSEG1ADDR(0x1fc00010))
-#define MIPS_REVISION_CORID_QED_RM5261 0
-#define MIPS_REVISION_CORID_CORE_LV 1
-#define MIPS_REVISION_CORID_BONITO64 2
-#define MIPS_REVISION_CORID_CORE_20K 3
-#define MIPS_REVISION_CORID_CORE_FPGA 4
-#define MIPS_REVISION_CORID_CORE_MSC 5
-
-#define MIPS_REVISION_CORID (((*(volatile u32 *)(MIPS_REVISION_REG)) >> 10) & 0x3f)
-
-extern unsigned int mips_revision_corid;
-
-
-/*
- * Galileo GT64120 system controller register base.
- */
-#define MIPS_GT_BASE (KSEG1ADDR(0x1be00000))
-
-/*
- * Because of the way the internal register works on the Galileo chip,
- * we need to swap the bytes when running bigendian.
- */
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
-
-#define GT_PCI_WRITE(ofs, data) \
- *(volatile u32 *)(MIPS_GT_BASE+ofs) = data
-#define GT_PCI_READ(ofs, data) \
- data = *(volatile u32 *)(MIPS_GT_BASE+ofs)
-
-/*
- * Algorithmics Bonito64 system controller register base.
- */
-static char * const _bonito = (char *)KSEG1ADDR(BONITO_REG_BASE);
-
-/*
- * MIPS System controller PCI register base.
- */
-#define MSC01_PCI_REG_BASE (KSEG1ADDR(0x1bd00000))
-
-#define MSC_WRITE(reg, data) \
- *(volatile u32 *)(reg) = data
-#define MSC_READ(reg, data) \
- data = *(volatile u32 *)(reg)
-
-#endif /* !(_MIPS_GENERIC_H) */
diff -Nru a/include/asm-mips64/mips-boards/gt64120.h b/include/asm-mips64/mips-boards/gt64120.h
--- a/include/asm-mips64/mips-boards/gt64120.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,337 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Register definitions for Galileo 64120 system controller.
- *
- */
-#ifndef GT64120_H
-#define GT64120_H
-
-#define MSK(n) ((1 << (n)) - 1)
-
-/************************************************************************
- * Register offset addresses
- ************************************************************************/
-
-#define GT_CPU_OFS 0x000
-
-#define GT_CPU_OFS 0x000
-#define GT_SCS10LD_OFS 0x008
-#define GT_SCS10HD_OFS 0x010
-#define GT_SCS32LD_OFS 0x018
-#define GT_SCS32HD_OFS 0x020
-#define GT_CS20LD_OFS 0x028
-#define GT_CS20HD_OFS 0x030
-#define GT_CS3BOOTLD_OFS 0x038
-#define GT_CS3BOOTHD_OFS 0x040
-#define GT_PCI0IOLD_OFS 0x048
-#define GT_PCI0IOHD_OFS 0x050
-#define GT_PCI0M0LD_OFS 0x058
-#define GT_PCI0M0HD_OFS 0x060
-#define GT_ISD_OFS 0x068
-#define GT_PCI0M1LD_OFS 0x080
-#define GT_PCI0M1HD_OFS 0x088
-#define GT_PCI1IOLD_OFS 0x090
-#define GT_PCI1IOHD_OFS 0x098
-#define GT_PCI1M0LD_OFS 0x0a0
-#define GT_PCI1M0HD_OFS 0x0a8
-#define GT_PCI1M1LD_OFS 0x0b0
-#define GT_PCI1M1HD_OFS 0x0b8
-
-#define GT_SCS0LD_OFS 0x400
-#define GT_SCS0HD_OFS 0x404
-#define GT_SCS1LD_OFS 0x408
-#define GT_SCS1HD_OFS 0x40c
-#define GT_SCS2LD_OFS 0x410
-#define GT_SCS2HD_OFS 0x414
-#define GT_SCS3LD_OFS 0x418
-#define GT_SCS3HD_OFS 0x41c
-#define GT_CS0LD_OFS 0x420
-#define GT_CS0HD_OFS 0x424
-#define GT_CS1LD_OFS 0x428
-#define GT_CS1HD_OFS 0x42c
-#define GT_CS2LD_OFS 0x430
-#define GT_CS2HD_OFS 0x434
-#define GT_CS3LD_OFS 0x438
-#define GT_CS3HD_OFS 0x43c
-#define GT_BOOTLD_OFS 0x440
-#define GT_BOOTHD_OFS 0x444
-
-#define GT_SDRAM_B0_OFS 0x44c
-#define GT_SDRAM_CFG_OFS 0x448
-#define GT_SDRAM_B2_OFS 0x454
-#define GT_SDRAM_OPMODE_OFS 0x474
-#define GT_SDRAM_BM_OFS 0x478
-#define GT_SDRAM_ADDRDECODE_OFS 0x47c
-
-#define GT_PCI0_CMD_OFS 0xc00
-#define GT_PCI0_TOR_OFS 0xc04
-#define GT_PCI0_BS_SCS10_OFS 0xc08
-#define GT_PCI0_BS_SCS32_OFS 0xc0c
-#define GT_INTRCAUSE_OFS 0xc18
-#define GT_PCI0_IACK_OFS 0xc34
-#define GT_PCI0_BARE_OFS 0xc3c
-#define GT_PCI0_CFGADDR_OFS 0xcf8
-#define GT_PCI0_CFGDATA_OFS 0xcfc
-
-
-
-
-/************************************************************************
- * Register encodings
- ************************************************************************/
-
-#define GT_CPU_ENDIAN_SHF 12
-#define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF)
-#define GT_CPU_ENDIAN_BIT GT_CPU_ENDIAN_MSK
-#define GT_CPU_WR_SHF 16
-#define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF)
-#define GT_CPU_WR_BIT GT_CPU_WR_MSK
-#define GT_CPU_WR_DXDXDXDX 0
-#define GT_CPU_WR_DDDD 1
-
-
-#define GT_CFGADDR_CFGEN_SHF 31
-#define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF)
-#define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK
-
-#define GT_CFGADDR_BUSNUM_SHF 16
-#define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF)
-
-#define GT_CFGADDR_DEVNUM_SHF 11
-#define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF)
-
-#define GT_CFGADDR_FUNCNUM_SHF 8
-#define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF)
-
-#define GT_CFGADDR_REGNUM_SHF 2
-#define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF)
-
-
-#define GT_SDRAM_BM_ORDER_SHF 2
-#define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF)
-#define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK
-#define GT_SDRAM_BM_ORDER_SUB 1
-#define GT_SDRAM_BM_ORDER_LIN 0
-
-#define GT_SDRAM_BM_RSVD_ALL1 0xFFB
-
-
-#define GT_SDRAM_ADDRDECODE_ADDR_SHF 0
-#define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
-#define GT_SDRAM_ADDRDECODE_ADDR_0 0
-#define GT_SDRAM_ADDRDECODE_ADDR_1 1
-#define GT_SDRAM_ADDRDECODE_ADDR_2 2
-#define GT_SDRAM_ADDRDECODE_ADDR_3 3
-#define GT_SDRAM_ADDRDECODE_ADDR_4 4
-#define GT_SDRAM_ADDRDECODE_ADDR_5 5
-#define GT_SDRAM_ADDRDECODE_ADDR_6 6
-#define GT_SDRAM_ADDRDECODE_ADDR_7 7
-
-
-#define GT_SDRAM_B0_CASLAT_SHF 0
-#define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF)
-#define GT_SDRAM_B0_CASLAT_2 1
-#define GT_SDRAM_B0_CASLAT_3 2
-
-#define GT_SDRAM_B0_FTDIS_SHF 2
-#define GT_SDRAM_B0_FTDIS_MSK (MSK(1) << GT_SDRAM_B0_FTDIS_SHF)
-#define GT_SDRAM_B0_FTDIS_BIT GT_SDRAM_B0_FTDIS_MSK
-
-#define GT_SDRAM_B0_SRASPRCHG_SHF 3
-#define GT_SDRAM_B0_SRASPRCHG_MSK (MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF)
-#define GT_SDRAM_B0_SRASPRCHG_BIT GT_SDRAM_B0_SRASPRCHG_MSK
-#define GT_SDRAM_B0_SRASPRCHG_2 0
-#define GT_SDRAM_B0_SRASPRCHG_3 1
-
-#define GT_SDRAM_B0_B0COMPAB_SHF 4
-#define GT_SDRAM_B0_B0COMPAB_MSK (MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF)
-#define GT_SDRAM_B0_B0COMPAB_BIT GT_SDRAM_B0_B0COMPAB_MSK
-
-#define GT_SDRAM_B0_64BITINT_SHF 5
-#define GT_SDRAM_B0_64BITINT_MSK (MSK(1) << GT_SDRAM_B0_64BITINT_SHF)
-#define GT_SDRAM_B0_64BITINT_BIT GT_SDRAM_B0_64BITINT_MSK
-#define GT_SDRAM_B0_64BITINT_2 0
-#define GT_SDRAM_B0_64BITINT_4 1
-
-#define GT_SDRAM_B0_BW_SHF 6
-#define GT_SDRAM_B0_BW_MSK (MSK(1) << GT_SDRAM_B0_BW_SHF)
-#define GT_SDRAM_B0_BW_BIT GT_SDRAM_B0_BW_MSK
-#define GT_SDRAM_B0_BW_32 0
-#define GT_SDRAM_B0_BW_64 1
-
-#define GT_SDRAM_B0_BLODD_SHF 7
-#define GT_SDRAM_B0_BLODD_MSK (MSK(1) << GT_SDRAM_B0_BLODD_SHF)
-#define GT_SDRAM_B0_BLODD_BIT GT_SDRAM_B0_BLODD_MSK
-
-#define GT_SDRAM_B0_PAR_SHF 8
-#define GT_SDRAM_B0_PAR_MSK (MSK(1) << GT_SDRAM_B0_PAR_SHF)
-#define GT_SDRAM_B0_PAR_BIT GT_SDRAM_B0_PAR_MSK
-
-#define GT_SDRAM_B0_BYPASS_SHF 9
-#define GT_SDRAM_B0_BYPASS_MSK (MSK(1) << GT_SDRAM_B0_BYPASS_SHF)
-#define GT_SDRAM_B0_BYPASS_BIT GT_SDRAM_B0_BYPASS_MSK
-
-#define GT_SDRAM_B0_SRAS2SCAS_SHF 10
-#define GT_SDRAM_B0_SRAS2SCAS_MSK (MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF)
-#define GT_SDRAM_B0_SRAS2SCAS_BIT GT_SDRAM_B0_SRAS2SCAS_MSK
-#define GT_SDRAM_B0_SRAS2SCAS_2 0
-#define GT_SDRAM_B0_SRAS2SCAS_3 1
-
-#define GT_SDRAM_B0_SIZE_SHF 11
-#define GT_SDRAM_B0_SIZE_MSK (MSK(1) << GT_SDRAM_B0_SIZE_SHF)
-#define GT_SDRAM_B0_SIZE_BIT GT_SDRAM_B0_SIZE_MSK
-#define GT_SDRAM_B0_SIZE_16M 0
-#define GT_SDRAM_B0_SIZE_64M 1
-
-#define GT_SDRAM_B0_EXTPAR_SHF 12
-#define GT_SDRAM_B0_EXTPAR_MSK (MSK(1) << GT_SDRAM_B0_EXTPAR_SHF)
-#define GT_SDRAM_B0_EXTPAR_BIT GT_SDRAM_B0_EXTPAR_MSK
-
-#define GT_SDRAM_B0_BLEN_SHF 13
-#define GT_SDRAM_B0_BLEN_MSK (MSK(1) << GT_SDRAM_B0_BLEN_SHF)
-#define GT_SDRAM_B0_BLEN_BIT GT_SDRAM_B0_BLEN_MSK
-#define GT_SDRAM_B0_BLEN_8 0
-#define GT_SDRAM_B0_BLEN_4 1
-
-
-#define GT_SDRAM_CFG_REFINT_SHF 0
-#define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
-
-#define GT_SDRAM_CFG_NINTERLEAVE_SHF 14
-#define GT_SDRAM_CFG_NINTERLEAVE_MSK (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF)
-#define GT_SDRAM_CFG_NINTERLEAVE_BIT GT_SDRAM_CFG_NINTERLEAVE_MSK
-
-#define GT_SDRAM_CFG_RMW_SHF 15
-#define GT_SDRAM_CFG_RMW_MSK (MSK(1) << GT_SDRAM_CFG_RMW_SHF)
-#define GT_SDRAM_CFG_RMW_BIT GT_SDRAM_CFG_RMW_MSK
-
-#define GT_SDRAM_CFG_NONSTAGREF_SHF 16
-#define GT_SDRAM_CFG_NONSTAGREF_MSK (MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF)
-#define GT_SDRAM_CFG_NONSTAGREF_BIT GT_SDRAM_CFG_NONSTAGREF_MSK
-
-#define GT_SDRAM_CFG_DUPCNTL_SHF 19
-#define GT_SDRAM_CFG_DUPCNTL_MSK (MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF)
-#define GT_SDRAM_CFG_DUPCNTL_BIT GT_SDRAM_CFG_DUPCNTL_MSK
-
-#define GT_SDRAM_CFG_DUPBA_SHF 20
-#define GT_SDRAM_CFG_DUPBA_MSK (MSK(1) << GT_SDRAM_CFG_DUPBA_SHF)
-#define GT_SDRAM_CFG_DUPBA_BIT GT_SDRAM_CFG_DUPBA_MSK
-
-#define GT_SDRAM_CFG_DUPEOT0_SHF 21
-#define GT_SDRAM_CFG_DUPEOT0_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF)
-#define GT_SDRAM_CFG_DUPEOT0_BIT GT_SDRAM_CFG_DUPEOT0_MSK
-
-#define GT_SDRAM_CFG_DUPEOT1_SHF 22
-#define GT_SDRAM_CFG_DUPEOT1_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF)
-#define GT_SDRAM_CFG_DUPEOT1_BIT GT_SDRAM_CFG_DUPEOT1_MSK
-
-#define GT_SDRAM_OPMODE_OP_SHF 0
-#define GT_SDRAM_OPMODE_OP_MSK (MSK(3) << GT_SDRAM_OPMODE_OP_SHF)
-#define GT_SDRAM_OPMODE_OP_NORMAL 0
-#define GT_SDRAM_OPMODE_OP_NOP 1
-#define GT_SDRAM_OPMODE_OP_PRCHG 2
-#define GT_SDRAM_OPMODE_OP_MODE 3
-#define GT_SDRAM_OPMODE_OP_CBR 4
-
-
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT GT_PCI0_BARE_SWSCS3BOOTDIS_MSK
-
-#define GT_PCI0_BARE_SWSCS32DIS_SHF 1
-#define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
-#define GT_PCI0_BARE_SWSCS32DIS_BIT GT_PCI0_BARE_SWSCS32DIS_MSK
-
-#define GT_PCI0_BARE_SWSCS10DIS_SHF 2
-#define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
-#define GT_PCI0_BARE_SWSCS10DIS_BIT GT_PCI0_BARE_SWSCS10DIS_MSK
-
-#define GT_PCI0_BARE_INTIODIS_SHF 3
-#define GT_PCI0_BARE_INTIODIS_MSK (MSK(1) << GT_PCI0_BARE_INTIODIS_SHF)
-#define GT_PCI0_BARE_INTIODIS_BIT GT_PCI0_BARE_INTIODIS_MSK
-
-#define GT_PCI0_BARE_INTMEMDIS_SHF 4
-#define GT_PCI0_BARE_INTMEMDIS_MSK (MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF)
-#define GT_PCI0_BARE_INTMEMDIS_BIT GT_PCI0_BARE_INTMEMDIS_MSK
-
-#define GT_PCI0_BARE_CS3BOOTDIS_SHF 5
-#define GT_PCI0_BARE_CS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF)
-#define GT_PCI0_BARE_CS3BOOTDIS_BIT GT_PCI0_BARE_CS3BOOTDIS_MSK
-
-#define GT_PCI0_BARE_CS20DIS_SHF 6
-#define GT_PCI0_BARE_CS20DIS_MSK (MSK(1) << GT_PCI0_BARE_CS20DIS_SHF)
-#define GT_PCI0_BARE_CS20DIS_BIT GT_PCI0_BARE_CS20DIS_MSK
-
-#define GT_PCI0_BARE_SCS32DIS_SHF 7
-#define GT_PCI0_BARE_SCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF)
-#define GT_PCI0_BARE_SCS32DIS_BIT GT_PCI0_BARE_SCS32DIS_MSK
-
-#define GT_PCI0_BARE_SCS10DIS_SHF 8
-#define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
-#define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK
-
-
-#define GT_INTRCAUSE_MASABORT0_SHF 18
-#define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
-#define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK
-
-#define GT_INTRCAUSE_TARABORT0_SHF 19
-#define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
-#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
-
-
-#define GT_PCI0_CFGADDR_REGNUM_SHF 2
-#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
-#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8
-#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
-#define GT_PCI0_CFGADDR_DEVNUM_SHF 11
-#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
-#define GT_PCI0_CFGADDR_BUSNUM_SHF 16
-#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31
-#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
-
-#define GT_PCI0_CMD_MBYTESWAP_SHF 0
-#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
-#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK
-#define GT_PCI0_CMD_MWORDSWAP_SHF 10
-#define GT_PCI0_CMD_MWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF)
-#define GT_PCI0_CMD_MWORDSWAP_BIT GT_PCI0_CMD_MWORDSWAP_MSK
-#define GT_PCI0_CMD_SBYTESWAP_SHF 16
-#define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
-#define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK
-#define GT_PCI0_CMD_SWORDSWAP_SHF 11
-#define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
-#define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK
-
-
-/************************************************************************
- * Misc
- ************************************************************************/
-
-#define GT_DEF_BASE 0x14000000
-#define GT_DEF_PCI0_MEM0_BASE 0x12000000
-#define GT_MAX_BANKSIZE (256 * 1024 * 1024) /* Max 256MB bank */
-#define GT_LATTIM_MIN 6 /* Minimum lat */
-
-#endif /* #ifndef GT64120_H */
diff -Nru a/include/asm-mips64/mips-boards/io.h b/include/asm-mips64/mips-boards/io.h
--- a/include/asm-mips64/mips-boards/io.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,34 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the MIPS boards specific IO address-MAP.
- *
- */
-#ifndef _ASM_MIPS_BOARDS_IO_H
-#define _ASM_MIPS_BOARDS_IO_H
-
-#include <asm/addrspace.h>
-
-#define IO_SPACE_BASE K1BASE
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#endif /* _ASM_MIPS_BOARDS_IO_H */
diff -Nru a/include/asm-mips64/mips-boards/malta.h b/include/asm-mips64/mips-boards/malta.h
--- a/include/asm-mips64/mips-boards/malta.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,78 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the Malta board specific address-MAP, registers, etc.
- *
- */
-#ifndef _MIPS_MALTA_H
-#define _MIPS_MALTA_H
-
-#include <asm/addrspace.h>
-#include <asm/io.h>
-
-/*
- * Malta I/O ports base address for the Galileo GT64120 and Algorithmics
- * Bonito system controllers.
- */
-#define MALTA_GT_PORT_BASE get_gt_port_base(GT_PCI0IOLD_OFS)
-#define MALTA_BONITO_PORT_BASE (KSEG1ADDR(0x1fd00000))
-#define MALTA_MSC_PORT_BASE get_msc_port_base(MSC01_PCI_SC2PIOBASL)
-
-static inline unsigned long get_gt_port_base(unsigned long reg)
-{
- unsigned long addr;
- GT_READ(reg, addr);
- return KSEG1ADDR((addr & 0xffff) << 21);
-}
-
-static inline unsigned long get_msc_port_base(unsigned long reg)
-{
- unsigned long addr;
- MSC_READ(reg, addr);
- return KSEG1ADDR(addr);
-}
-
-/*
- * Malta RTC-device indirect register access.
- */
-#define MALTA_RTC_ADR_REG 0x70
-#define MALTA_RTC_DAT_REG 0x71
-
-/*
- * Malta SMSC FDC37M817 Super I/O Controller register.
- */
-#define SMSC_CONFIG_REG 0x3f0
-#define SMSC_DATA_REG 0x3f1
-
-#define SMSC_CONFIG_DEVNUM 0x7
-#define SMSC_CONFIG_ACTIVATE 0x30
-#define SMSC_CONFIG_ENTER 0x55
-#define SMSC_CONFIG_EXIT 0xaa
-
-#define SMSC_CONFIG_DEVNUM_FLOPPY 0
-
-#define SMSC_CONFIG_ACTIVATE_ENABLE 1
-
-#define SMSC_WRITE(x,a) outb(x,a)
-
-#define MALTA_JMPRS_REG (KSEG1ADDR(0x1f000210))
-
-#endif /* !(_MIPS_MALTA_H) */
diff -Nru a/include/asm-mips64/mips-boards/maltaint.h b/include/asm-mips64/mips-boards/maltaint.h
--- a/include/asm-mips64/mips-boards/maltaint.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,33 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines for the Malta interrupt controller.
- *
- */
-#ifndef _MIPS_MALTAINT_H
-#define _MIPS_MALTAINT_H
-
-/* Number of IRQ supported on hw interrupt 0. */
-#define MALTAINT_END 16
-
-extern void maltaint_init(void);
-
-#endif /* !(_MIPS_MALTAINT_H) */
diff -Nru a/include/asm-mips64/mips-boards/msc01_pci.h b/include/asm-mips64/mips-boards/msc01_pci.h
--- a/include/asm-mips64/mips-boards/msc01_pci.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,244 +0,0 @@
-/*
- * mcs01_pci.h
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * PCI Register definitions for the MIPS System Controller.
- */
-#ifndef MSC01_PCI_H
-#define MSC01_PCI_H
-
-/*****************************************************************************
- * Register offset addresses
- ****************************************************************************/
-
-#define MSC01_PCI_ID_OFS 0x0000
-#define MSC01_PCI_SC2PMBASL_OFS 0x0208
-#define MSC01_PCI_SC2PMMSKL_OFS 0x0218
-#define MSC01_PCI_SC2PMMAPL_OFS 0x0228
-#define MSC01_PCI_SC2PIOBASL_OFS 0x0248
-#define MSC01_PCI_SC2PIOMSKL_OFS 0x0258
-#define MSC01_PCI_SC2PIOMAPL_OFS 0x0268
-#define MSC01_PCI_P2SCMSKL_OFS 0x0308
-#define MSC01_PCI_P2SCMAPL_OFS 0x0318
-#define MSC01_PCI_INTCFG_OFS 0x0600
-#define MSC01_PCI_INTSTAT_OFS 0x0608
-#define MSC01_PCI_CFGADDR_OFS 0x0610
-#define MSC01_PCI_CFGDATA_OFS 0x0618
-#define MSC01_PCI_IACK_OFS 0x0620
-#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */
-#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */
-#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */
-#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */
-#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */
-#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */
-#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */
-#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */
-#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */
-#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */
-#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */
-#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */
-#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */
-#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */
-#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */
-#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */
-#define MSC01_PCI_BAR0_OFS 0x2220
-#define MSC01_PCI_CFG_OFS 0x2380
-#define MSC01_PCI_SWAP_OFS 0x2388
-
-
-/*****************************************************************************
- * Register encodings
- ****************************************************************************/
-
-#define MSC01_PCI_ID_ID_SHF 16
-#define MSC01_PCI_ID_ID_MSK 0x00ff0000
-#define MSC01_PCI_ID_ID_HOSTBRIDGE 82
-#define MSC01_PCI_ID_MAR_SHF 8
-#define MSC01_PCI_ID_MAR_MSK 0x0000ff00
-#define MSC01_PCI_ID_MIR_SHF 0
-#define MSC01_PCI_ID_MIR_MSK 0x000000ff
-
-#define MSC01_PCI_SC2PMBASL_BAS_SHF 24
-#define MSC01_PCI_SC2PMBASL_BAS_MSK 0xff000000
-
-#define MSC01_PCI_SC2PMMSKL_MSK_SHF 24
-#define MSC01_PCI_SC2PMMSKL_MSK_MSK 0xff000000
-
-#define MSC01_PCI_SC2PMMAPL_MAP_SHF 24
-#define MSC01_PCI_SC2PMMAPL_MAP_MSK 0xff000000
-
-#define MSC01_PCI_SC2PIOBASL_BAS_SHF 24
-#define MSC01_PCI_SC2PIOBASL_BAS_MSK 0xff000000
-
-#define MSC01_PCI_SC2PIOMSKL_MSK_SHF 24
-#define MSC01_PCI_SC2PIOMSKL_MSK_MSK 0xff000000
-
-#define MSC01_PCI_SC2PIOMAPL_MAP_SHF 24
-#define MSC01_PCI_SC2PIOMAPL_MAP_MSK 0xff000000
-
-#define MSC01_PCI_P2SCMSKL_MSK_SHF 24
-#define MSC01_PCI_P2SCMSKL_MSK_MSK 0xff000000
-
-#define MSC01_PCI_P2SCMAPL_MAP_SHF 24
-#define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000
-
-#define MSC01_PCI_INTCFG_RST_SHF 10
-#define MSC01_PCI_INTCFG_RST_MSK 0x00000400
-#define MSC01_PCI_INTCFG_RST_BIT 0x00000400
-#define MSC01_PCI_INTCFG_MWE_SHF 9
-#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200
-#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200
-#define MSC01_PCI_INTCFG_DTO_SHF 8
-#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100
-#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100
-#define MSC01_PCI_INTCFG_MA_SHF 7
-#define MSC01_PCI_INTCFG_MA_MSK 0x00000080
-#define MSC01_PCI_INTCFG_MA_BIT 0x00000080
-#define MSC01_PCI_INTCFG_TA_SHF 6
-#define MSC01_PCI_INTCFG_TA_MSK 0x00000040
-#define MSC01_PCI_INTCFG_TA_BIT 0x00000040
-#define MSC01_PCI_INTCFG_RTY_SHF 5
-#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020
-#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020
-#define MSC01_PCI_INTCFG_MWP_SHF 4
-#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010
-#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010
-#define MSC01_PCI_INTCFG_MRP_SHF 3
-#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008
-#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008
-#define MSC01_PCI_INTCFG_SWP_SHF 2
-#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004
-#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004
-#define MSC01_PCI_INTCFG_SRP_SHF 1
-#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002
-#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002
-#define MSC01_PCI_INTCFG_SE_SHF 0
-#define MSC01_PCI_INTCFG_SE_MSK 0x00000001
-#define MSC01_PCI_INTCFG_SE_BIT 0x00000001
-
-#define MSC01_PCI_INTSTAT_RST_SHF 10
-#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400
-#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400
-#define MSC01_PCI_INTSTAT_MWE_SHF 9
-#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200
-#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200
-#define MSC01_PCI_INTSTAT_DTO_SHF 8
-#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100
-#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100
-#define MSC01_PCI_INTSTAT_MA_SHF 7
-#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080
-#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080
-#define MSC01_PCI_INTSTAT_TA_SHF 6
-#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040
-#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040
-#define MSC01_PCI_INTSTAT_RTY_SHF 5
-#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020
-#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020
-#define MSC01_PCI_INTSTAT_MWP_SHF 4
-#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010
-#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010
-#define MSC01_PCI_INTSTAT_MRP_SHF 3
-#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008
-#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008
-#define MSC01_PCI_INTSTAT_SWP_SHF 2
-#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004
-#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004
-#define MSC01_PCI_INTSTAT_SRP_SHF 1
-#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002
-#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002
-#define MSC01_PCI_INTSTAT_SE_SHF 0
-#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001
-#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001
-
-#define MSC01_PCI_CFGADDR_BNUM_SHF 16
-#define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000
-#define MSC01_PCI_CFGADDR_DNUM_SHF 11
-#define MSC01_PCI_CFGADDR_DNUM_MSK 0x0000f800
-#define MSC01_PCI_CFGADDR_FNUM_SHF 8
-#define MSC01_PCI_CFGADDR_FNUM_MSK 0x00000700
-#define MSC01_PCI_CFGADDR_RNUM_SHF 2
-#define MSC01_PCI_CFGADDR_RNUM_MSK 0x000000fc
-
-#define MSC01_PCI_CFGDATA_DATA_SHF 0
-#define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff
-
-/* The defines below are ONLY valid for a MEM bar! */
-#define MSC01_PCI_BAR0_SIZE_SHF 4
-#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0
-#define MSC01_PCI_BAR0_P_SHF 3
-#define MSC01_PCI_BAR0_P_MSK 0x00000008
-#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK
-#define MSC01_PCI_BAR0_D_SHF 1
-#define MSC01_PCI_BAR0_D_MSK 0x00000006
-#define MSC01_PCI_BAR0_T_SHF 0
-#define MSC01_PCI_BAR0_T_MSK 0x00000001
-#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK
-
-
-#define MSC01_PCI_CFG_RA_SHF 17
-#define MSC01_PCI_CFG_RA_MSK 0x00020000
-#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK
-#define MSC01_PCI_CFG_G_SHF 16
-#define MSC01_PCI_CFG_G_MSK 0x00010000
-#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK
-#define MSC01_PCI_CFG_EN_SHF 15
-#define MSC01_PCI_CFG_EN_MSK 0x00008000
-#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK
-#define MSC01_PCI_CFG_MAXRTRY_SHF 0
-#define MSC01_PCI_CFG_MAXRTRY_MSK 0x000000ff
-
-#define MSC01_PCI_SWAP_IO_SHF 18
-#define MSC01_PCI_SWAP_IO_MSK 0x000c0000
-#define MSC01_PCI_SWAP_MEM_SHF 16
-#define MSC01_PCI_SWAP_MEM_MSK 0x00030000
-#define MSC01_PCI_SWAP_BAR0_SHF 0
-#define MSC01_PCI_SWAP_BAR0_MSK 0x00000003
-#define MSC01_PCI_SWAP_NOSWAP 0
-#define MSC01_PCI_SWAP_BYTESWAP 1
-
-/*****************************************************************************
- * Registers absolute addresses
- ****************************************************************************/
-
-#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS)
-#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS)
-#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS)
-#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS)
-#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS)
-#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS)
-#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS)
-#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS)
-#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS)
-#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS)
-#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS)
-#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS)
-#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS)
-#define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS)
-#define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS)
-#define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS)
-#define MSC01_PCI_HEAD2 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD2_OFS)
-#define MSC01_PCI_HEAD3 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD3_OFS)
-#define MSC01_PCI_HEAD4 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD4_OFS)
-#define MSC01_PCI_HEAD5 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD5_OFS)
-#define MSC01_PCI_HEAD6 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD6_OFS)
-#define MSC01_PCI_HEAD7 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD7_OFS)
-#define MSC01_PCI_HEAD8 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD8_OFS)
-#define MSC01_PCI_HEAD9 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD9_OFS)
-#define MSC01_PCI_HEAD10 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD10_OFS)
-#define MSC01_PCI_HEAD11 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
-#define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
-#define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
-#define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
-#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
-#define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS)
-#define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS)
-#define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS)
-
-#endif
-/*****************************************************************************
- * End of msc01_pci.h
- *****************************************************************************/
diff -Nru a/include/asm-mips64/mips-boards/piix4.h b/include/asm-mips64/mips-boards/piix4.h
--- a/include/asm-mips64/mips-boards/piix4.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,86 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Register definitions for Intel PIIX4 South Bridge Device.
- *
- */
-
-#ifndef PIIX4_H
-#define PIIX4_H
-
-/************************************************************************
- * IO register offsets
- ************************************************************************/
-#define PIIX4_ICTLR1_ICW1 0x20
-#define PIIX4_ICTLR1_ICW2 0x21
-#define PIIX4_ICTLR1_ICW3 0x21
-#define PIIX4_ICTLR1_ICW4 0x21
-#define PIIX4_ICTLR2_ICW1 0xa0
-#define PIIX4_ICTLR2_ICW2 0xa1
-#define PIIX4_ICTLR2_ICW3 0xa1
-#define PIIX4_ICTLR2_ICW4 0xa1
-#define PIIX4_ICTLR1_OCW1 0x21
-#define PIIX4_ICTLR1_OCW2 0x20
-#define PIIX4_ICTLR1_OCW3 0x20
-#define PIIX4_ICTLR1_OCW4 0x20
-#define PIIX4_ICTLR2_OCW1 0xa1
-#define PIIX4_ICTLR2_OCW2 0xa0
-#define PIIX4_ICTLR2_OCW3 0xa0
-#define PIIX4_ICTLR2_OCW4 0xa0
-
-
-/************************************************************************
- * Register encodings.
- ************************************************************************/
-#define PIIX4_OCW2_NSEOI (0x1 << 5)
-#define PIIX4_OCW2_SEOI (0x3 << 5)
-#define PIIX4_OCW2_RNSEOI (0x5 << 5)
-#define PIIX4_OCW2_RAEOIS (0x4 << 5)
-#define PIIX4_OCW2_RAEOIC (0x0 << 5)
-#define PIIX4_OCW2_RSEOI (0x7 << 5)
-#define PIIX4_OCW2_SP (0x6 << 5)
-#define PIIX4_OCW2_NOP (0x2 << 5)
-
-#define PIIX4_OCW2_SEL (0x0 << 3)
-
-#define PIIX4_OCW2_ILS_0 0
-#define PIIX4_OCW2_ILS_1 1
-#define PIIX4_OCW2_ILS_2 2
-#define PIIX4_OCW2_ILS_3 3
-#define PIIX4_OCW2_ILS_4 4
-#define PIIX4_OCW2_ILS_5 5
-#define PIIX4_OCW2_ILS_6 6
-#define PIIX4_OCW2_ILS_7 7
-#define PIIX4_OCW2_ILS_8 0
-#define PIIX4_OCW2_ILS_9 1
-#define PIIX4_OCW2_ILS_10 2
-#define PIIX4_OCW2_ILS_11 3
-#define PIIX4_OCW2_ILS_12 4
-#define PIIX4_OCW2_ILS_13 5
-#define PIIX4_OCW2_ILS_14 6
-#define PIIX4_OCW2_ILS_15 7
-
-#define PIIX4_OCW3_SEL (0x1 << 3)
-
-#define PIIX4_OCW3_IRR 0x2
-#define PIIX4_OCW3_ISR 0x3
-
-#endif /* !(PIIX4_H) */
diff -Nru a/include/asm-mips64/mips-boards/prom.h b/include/asm-mips64/mips-boards/prom.h
--- a/include/asm-mips64/mips-boards/prom.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,49 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * MIPS boards bootprom interface for the Linux kernel.
- *
- */
-
-#ifndef _MIPS_PROM_H
-#define _MIPS_PROM_H
-
-extern char *prom_getcmdline(void);
-extern char *prom_getenv(char *name);
-extern void setup_prom_printf(int tty_no);
-extern void prom_printf(char *fmt, ...);
-extern void prom_init_cmdline(void);
-extern void prom_meminit(void);
-extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
-extern void prom_free_prom_memory (void);
-extern void mips_display_message(const char *str);
-extern void mips_display_word(unsigned int num);
-extern int get_ethernet_addr(char *ethernet_addr);
-
-/* Memory descriptor management. */
-#define PROM_MAX_PMEMBLOCKS 32
-struct prom_pmemblock {
- unsigned int base; /* Phys addr. */
- unsigned int size; /* In bytes. */
- unsigned int type; /* free or prom memory */
-};
-
-#endif /* !(_MIPS_PROM_H) */
diff -Nru a/include/asm-mips64/mips-boards/saa9730_uart.h b/include/asm-mips64/mips-boards/saa9730_uart.h
--- a/include/asm-mips64/mips-boards/saa9730_uart.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,69 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Register definitions for the UART part of the Philips SAA9730 chip.
- *
- */
-
-#ifndef SAA9730_UART_H
-#define SAA9730_UART_H
-
-/* The SAA9730 UART register map, as seen via the PCI bus */
-
-#define SAA9730_UART_REGS_ADDR 0x21800
-
-struct uart_saa9730_regmap {
- volatile unsigned char Thr_Rbr;
- volatile unsigned char Ier;
- volatile unsigned char Iir_Fcr;
- volatile unsigned char Lcr;
- volatile unsigned char Mcr;
- volatile unsigned char Lsr;
- volatile unsigned char Msr;
- volatile unsigned char Scr;
- volatile unsigned char BaudDivLsb;
- volatile unsigned char BaudDivMsb;
- volatile unsigned char Junk0;
- volatile unsigned char Junk1;
- volatile unsigned int Config; /* 0x2180c */
- volatile unsigned int TxStart; /* 0x21810 */
- volatile unsigned int TxLength; /* 0x21814 */
- volatile unsigned int TxCounter; /* 0x21818 */
- volatile unsigned int RxStart; /* 0x2181c */
- volatile unsigned int RxLength; /* 0x21820 */
- volatile unsigned int RxCounter; /* 0x21824 */
-};
-typedef volatile struct uart_saa9730_regmap t_uart_saa9730_regmap;
-
-/*
- * Only a subset of the UART control bits are defined here,
- * enough to make the serial debug port work.
- */
-
-#define SAA9730_LCR_DATA8 0x03
-
-#define SAA9730_MCR_DTR 0x01
-#define SAA9730_MCR_RTS 0x02
-
-#define SAA9730_LSR_DR 0x01
-#define SAA9730_LSR_THRE 0x20
-
-#endif /* !(SAA9730_UART_H) */
diff -Nru a/include/asm-mips64/mips-boards/sead.h b/include/asm-mips64/mips-boards/sead.h
--- a/include/asm-mips64/mips-boards/sead.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,36 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the SEAD board specific address-MAP, registers, etc.
- *
- */
-#ifndef _MIPS_SEAD_H
-#define _MIPS_SEAD_H
-
-#include <asm/addrspace.h>
-
-/*
- * SEAD UART register base.
- */
-#define SEAD_UART0_REGS_BASE (0x1f000800)
-#define SEAD_BASE_BAUD ( 3686400 / 16 )
-
-#endif /* !(_MIPS_SEAD_H) */
diff -Nru a/include/asm-mips64/mips-boards/seadint.h b/include/asm-mips64/mips-boards/seadint.h
--- a/include/asm-mips64/mips-boards/seadint.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,35 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines for the SEAD interrupt controller.
- *
- */
-#ifndef _MIPS_SEADINT_H
-#define _MIPS_SEADINT_H
-
-/* Number of IRQ supported */
-#define SEADINT_UART0 0
-#define SEADINT_UART1 1
-#define SEADINT_END 2
-
-extern void seadint_init(void);
-
-#endif /* !(_MIPS_SEADINT_H) */
diff -Nru a/include/asm-mips64/mipsregs.h b/include/asm-mips64/mipsregs.h
--- a/include/asm-mips64/mipsregs.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,901 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Modified for further R[236]000 support by Paul M. Antoine, 1996.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- * Copyright (C) 2003 Maciej W. Rozycki
- */
-#ifndef _ASM_MIPSREGS_H
-#define _ASM_MIPSREGS_H
-
-#include <linux/config.h>
-#include <linux/linkage.h>
-
-/*
- * The following macros are especially useful for __asm__
- * inline assembler.
- */
-#ifndef __STR
-#define __STR(x) #x
-#endif
-#ifndef STR
-#define STR(x) __STR(x)
-#endif
-
-/*
- * Configure language
- */
-#ifdef __ASSEMBLY__
-#define _ULCAST_
-#else
-#define _ULCAST_ (unsigned long)
-#endif
-
-/*
- * Coprocessor 0 register names
- */
-#define CP0_INDEX $0
-#define CP0_RANDOM $1
-#define CP0_ENTRYLO0 $2
-#define CP0_ENTRYLO1 $3
-#define CP0_CONF $3
-#define CP0_CONTEXT $4
-#define CP0_PAGEMASK $5
-#define CP0_WIRED $6
-#define CP0_INFO $7
-#define CP0_BADVADDR $8
-#define CP0_COUNT $9
-#define CP0_ENTRYHI $10
-#define CP0_COMPARE $11
-#define CP0_STATUS $12
-#define CP0_CAUSE $13
-#define CP0_EPC $14
-#define CP0_PRID $15
-#define CP0_CONFIG $16
-#define CP0_LLADDR $17
-#define CP0_WATCHLO $18
-#define CP0_WATCHHI $19
-#define CP0_XCONTEXT $20
-#define CP0_FRAMEMASK $21
-#define CP0_DIAGNOSTIC $22
-#define CP0_DEBUG $23
-#define CP0_DEPC $24
-#define CP0_PERFORMANCE $25
-#define CP0_ECC $26
-#define CP0_CACHEERR $27
-#define CP0_TAGLO $28
-#define CP0_TAGHI $29
-#define CP0_ERROREPC $30
-#define CP0_DESAVE $31
-
-/*
- * R4640/R4650 cp0 register names. These registers are listed
- * here only for completeness; without MMU these CPUs are not useable
- * by Linux. A future ELKS port might take make Linux run on them
- * though ...
- */
-#define CP0_IBASE $0
-#define CP0_IBOUND $1
-#define CP0_DBASE $2
-#define CP0_DBOUND $3
-#define CP0_CALG $17
-#define CP0_IWATCH $18
-#define CP0_DWATCH $19
-
-/*
- * Coprocessor 0 Set 1 register names
- */
-#define CP0_S1_DERRADDR0 $26
-#define CP0_S1_DERRADDR1 $27
-#define CP0_S1_INTCONTROL $20
-
-/*
- * TX39 Series
- */
-#define CP0_TX39_CACHE $7
-
-/*
- * Coprocessor 1 (FPU) register names
- */
-#define CP1_REVISION $0
-#define CP1_STATUS $31
-
-/*
- * FPU Status Register Values
- */
-/*
- * Status Register Values
- */
-
-#define FPU_CSR_FLUSH 0x01000000 /* flush denormalised results to 0 */
-#define FPU_CSR_COND 0x00800000 /* $fcc0 */
-#define FPU_CSR_COND0 0x00800000 /* $fcc0 */
-#define FPU_CSR_COND1 0x02000000 /* $fcc1 */
-#define FPU_CSR_COND2 0x04000000 /* $fcc2 */
-#define FPU_CSR_COND3 0x08000000 /* $fcc3 */
-#define FPU_CSR_COND4 0x10000000 /* $fcc4 */
-#define FPU_CSR_COND5 0x20000000 /* $fcc5 */
-#define FPU_CSR_COND6 0x40000000 /* $fcc6 */
-#define FPU_CSR_COND7 0x80000000 /* $fcc7 */
-
-/*
- * X the exception cause indicator
- * E the exception enable
- * S the sticky/flag bit
-*/
-#define FPU_CSR_ALL_X 0x0003f000
-#define FPU_CSR_UNI_X 0x00020000
-#define FPU_CSR_INV_X 0x00010000
-#define FPU_CSR_DIV_X 0x00008000
-#define FPU_CSR_OVF_X 0x00004000
-#define FPU_CSR_UDF_X 0x00002000
-#define FPU_CSR_INE_X 0x00001000
-
-#define FPU_CSR_ALL_E 0x00000f80
-#define FPU_CSR_INV_E 0x00000800
-#define FPU_CSR_DIV_E 0x00000400
-#define FPU_CSR_OVF_E 0x00000200
-#define FPU_CSR_UDF_E 0x00000100
-#define FPU_CSR_INE_E 0x00000080
-
-#define FPU_CSR_ALL_S 0x0000007c
-#define FPU_CSR_INV_S 0x00000040
-#define FPU_CSR_DIV_S 0x00000020
-#define FPU_CSR_OVF_S 0x00000010
-#define FPU_CSR_UDF_S 0x00000008
-#define FPU_CSR_INE_S 0x00000004
-
-/* rounding mode */
-#define FPU_CSR_RN 0x0 /* nearest */
-#define FPU_CSR_RZ 0x1 /* towards zero */
-#define FPU_CSR_RU 0x2 /* towards +Infinity */
-#define FPU_CSR_RD 0x3 /* towards -Infinity */
-
-
-/*
- * Values for PageMask register
- */
-#ifdef CONFIG_CPU_VR41XX
-
-/* Why doesn't stupidity hurt ... */
-
-#define PM_1K 0x00000000
-#define PM_4K 0x00001800
-#define PM_16K 0x00007800
-#define PM_64K 0x0001f800
-#define PM_256K 0x0007f800
-
-#else
-
-#define PM_4K 0x00000000
-#define PM_16K 0x00006000
-#define PM_64K 0x0001e000
-#define PM_256K 0x0007e000
-#define PM_1M 0x001fe000
-#define PM_4M 0x007fe000
-#define PM_16M 0x01ffe000
-#define PM_64M 0x07ffe000
-#define PM_256M 0x1fffe000
-
-#endif
-
-/*
- * Values used for computation of new tlb entries
- */
-#define PL_4K 12
-#define PL_16K 14
-#define PL_64K 16
-#define PL_256K 18
-#define PL_1M 20
-#define PL_4M 22
-#define PL_16M 24
-#define PL_64M 26
-#define PL_256M 28
-
-/*
- * R4x00 interrupt enable / cause bits
- */
-#define IE_SW0 (_ULCAST_(1) << 8)
-#define IE_SW1 (_ULCAST_(1) << 9)
-#define IE_IRQ0 (_ULCAST_(1) << 10)
-#define IE_IRQ1 (_ULCAST_(1) << 11)
-#define IE_IRQ2 (_ULCAST_(1) << 12)
-#define IE_IRQ3 (_ULCAST_(1) << 13)
-#define IE_IRQ4 (_ULCAST_(1) << 14)
-#define IE_IRQ5 (_ULCAST_(1) << 15)
-
-/*
- * R4x00 interrupt cause bits
- */
-#define C_SW0 (_ULCAST_(1) << 8)
-#define C_SW1 (_ULCAST_(1) << 9)
-#define C_IRQ0 (_ULCAST_(1) << 10)
-#define C_IRQ1 (_ULCAST_(1) << 11)
-#define C_IRQ2 (_ULCAST_(1) << 12)
-#define C_IRQ3 (_ULCAST_(1) << 13)
-#define C_IRQ4 (_ULCAST_(1) << 14)
-#define C_IRQ5 (_ULCAST_(1) << 15)
-
-/*
- * Bitfields in the R4xx0 cp0 status register
- */
-#define ST0_IE 0x00000001
-#define ST0_EXL 0x00000002
-#define ST0_ERL 0x00000004
-#define ST0_KSU 0x00000018
-# define KSU_USER 0x00000010
-# define KSU_SUPERVISOR 0x00000008
-# define KSU_KERNEL 0x00000000
-#define ST0_UX 0x00000020
-#define ST0_SX 0x00000040
-#define ST0_KX 0x00000080
-#define ST0_DE 0x00010000
-#define ST0_CE 0x00020000
-
-/*
- * Bitfields in the R[23]000 cp0 status register.
- */
-#define ST0_IEC 0x00000001
-#define ST0_KUC 0x00000002
-#define ST0_IEP 0x00000004
-#define ST0_KUP 0x00000008
-#define ST0_IEO 0x00000010
-#define ST0_KUO 0x00000020
-/* bits 6 & 7 are reserved on R[23]000 */
-#define ST0_ISC 0x00010000
-#define ST0_SWC 0x00020000
-#define ST0_CM 0x00080000
-
-/*
- * Bits specific to the R4640/R4650
- */
-#define ST0_UM (_ULCAST_(1) << 4)
-#define ST0_IL (_ULCAST_(1) << 23)
-#define ST0_DL (_ULCAST_(1) << 24)
-
-/*
- * Bitfields in the TX39 family CP0 Configuration Register 3
- */
-#define TX39_CONF_ICS_SHIFT 19
-#define TX39_CONF_ICS_MASK 0x00380000
-#define TX39_CONF_ICS_1KB 0x00000000
-#define TX39_CONF_ICS_2KB 0x00080000
-#define TX39_CONF_ICS_4KB 0x00100000
-#define TX39_CONF_ICS_8KB 0x00180000
-#define TX39_CONF_ICS_16KB 0x00200000
-
-#define TX39_CONF_DCS_SHIFT 16
-#define TX39_CONF_DCS_MASK 0x00070000
-#define TX39_CONF_DCS_1KB 0x00000000
-#define TX39_CONF_DCS_2KB 0x00010000
-#define TX39_CONF_DCS_4KB 0x00020000
-#define TX39_CONF_DCS_8KB 0x00030000
-#define TX39_CONF_DCS_16KB 0x00040000
-
-#define TX39_CONF_CWFON 0x00004000
-#define TX39_CONF_WBON 0x00002000
-#define TX39_CONF_RF_SHIFT 10
-#define TX39_CONF_RF_MASK 0x00000c00
-#define TX39_CONF_DOZE 0x00000200
-#define TX39_CONF_HALT 0x00000100
-#define TX39_CONF_LOCK 0x00000080
-#define TX39_CONF_ICE 0x00000020
-#define TX39_CONF_DCE 0x00000010
-#define TX39_CONF_IRSIZE_SHIFT 2
-#define TX39_CONF_IRSIZE_MASK 0x0000000c
-#define TX39_CONF_DRSIZE_SHIFT 0
-#define TX39_CONF_DRSIZE_MASK 0x00000003
-
-/*
- * Status register bits available in all MIPS CPUs.
- */
-#define ST0_IM 0x0000ff00
-#define STATUSB_IP0 8
-#define STATUSF_IP0 (_ULCAST_(1) << 8)
-#define STATUSB_IP1 9
-#define STATUSF_IP1 (_ULCAST_(1) << 9)
-#define STATUSB_IP2 10
-#define STATUSF_IP2 (_ULCAST_(1) << 10)
-#define STATUSB_IP3 11
-#define STATUSF_IP3 (_ULCAST_(1) << 11)
-#define STATUSB_IP4 12
-#define STATUSF_IP4 (_ULCAST_(1) << 12)
-#define STATUSB_IP5 13
-#define STATUSF_IP5 (_ULCAST_(1) << 13)
-#define STATUSB_IP6 14
-#define STATUSF_IP6 (_ULCAST_(1) << 14)
-#define STATUSB_IP7 15
-#define STATUSF_IP7 (_ULCAST_(1) << 15)
-#define STATUSB_IP8 0
-#define STATUSF_IP8 (_ULCAST_(1) << 0)
-#define STATUSB_IP9 1
-#define STATUSF_IP9 (_ULCAST_(1) << 1)
-#define STATUSB_IP10 2
-#define STATUSF_IP10 (_ULCAST_(1) << 2)
-#define STATUSB_IP11 3
-#define STATUSF_IP11 (_ULCAST_(1) << 3)
-#define STATUSB_IP12 4
-#define STATUSF_IP12 (_ULCAST_(1) << 4)
-#define STATUSB_IP13 5
-#define STATUSF_IP13 (_ULCAST_(1) << 5)
-#define STATUSB_IP14 6
-#define STATUSF_IP14 (_ULCAST_(1) << 6)
-#define STATUSB_IP15 7
-#define STATUSF_IP15 (_ULCAST_(1) << 7)
-#define ST0_CH 0x00040000
-#define ST0_SR 0x00100000
-#define ST0_TS 0x00200000
-#define ST0_BEV 0x00400000
-#define ST0_RE 0x02000000
-#define ST0_FR 0x04000000
-#define ST0_CU 0xf0000000
-#define ST0_CU0 0x10000000
-#define ST0_CU1 0x20000000
-#define ST0_CU2 0x40000000
-#define ST0_CU3 0x80000000
-#define ST0_XX 0x80000000 /* MIPS IV naming */
-
-/*
- * Bitfields and bit numbers in the coprocessor 0 cause register.
- *
- * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
- */
-#define CAUSEB_EXCCODE 2
-#define CAUSEF_EXCCODE (_ULCAST_(31) << 2)
-#define CAUSEB_IP 8
-#define CAUSEF_IP (_ULCAST_(255) << 8)
-#define CAUSEB_IP0 8
-#define CAUSEF_IP0 (_ULCAST_(1) << 8)
-#define CAUSEB_IP1 9
-#define CAUSEF_IP1 (_ULCAST_(1) << 9)
-#define CAUSEB_IP2 10
-#define CAUSEF_IP2 (_ULCAST_(1) << 10)
-#define CAUSEB_IP3 11
-#define CAUSEF_IP3 (_ULCAST_(1) << 11)
-#define CAUSEB_IP4 12
-#define CAUSEF_IP4 (_ULCAST_(1) << 12)
-#define CAUSEB_IP5 13
-#define CAUSEF_IP5 (_ULCAST_(1) << 13)
-#define CAUSEB_IP6 14
-#define CAUSEF_IP6 (_ULCAST_(1) << 14)
-#define CAUSEB_IP7 15
-#define CAUSEF_IP7 (_ULCAST_(1) << 15)
-#define CAUSEB_IV 23
-#define CAUSEF_IV (_ULCAST_(1) << 23)
-#define CAUSEB_CE 28
-#define CAUSEF_CE (_ULCAST_(3) << 28)
-#define CAUSEB_BD 31
-#define CAUSEF_BD (_ULCAST_(1) << 31)
-
-/*
- * Bits in the coprocessor 0 config register.
- */
-/* Generic bits. */
-#define CONF_CM_CACHABLE_NO_WA 0
-#define CONF_CM_CACHABLE_WA 1
-#define CONF_CM_UNCACHED 2
-#define CONF_CM_CACHABLE_NONCOHERENT 3
-#define CONF_CM_CACHABLE_CE 4
-#define CONF_CM_CACHABLE_COW 5
-#define CONF_CM_CACHABLE_CUW 6
-#define CONF_CM_CACHABLE_ACCELERATED 7
-#define CONF_CM_CMASK 7
-#define CONF_BE (_ULCAST_(1) << 15)
-
-/* Bits common to various processors. */
-#define CONF_CU (_ULCAST_(1) << 3)
-#define CONF_DB (_ULCAST_(1) << 4)
-#define CONF_IB (_ULCAST_(1) << 5)
-#define CONF_DC (_ULCAST_(7) << 6)
-#define CONF_IC (_ULCAST_(7) << 9)
-#define CONF_EB (_ULCAST_(1) << 13)
-#define CONF_EM (_ULCAST_(1) << 14)
-#define CONF_SM (_ULCAST_(1) << 16)
-#define CONF_SC (_ULCAST_(1) << 17)
-#define CONF_EW (_ULCAST_(3) << 18)
-#define CONF_EP (_ULCAST_(15)<< 24)
-#define CONF_EC (_ULCAST_(7) << 28)
-#define CONF_CM (_ULCAST_(1) << 31)
-
-/* Bits specific to the R4xx0. */
-#define R4K_CONF_SW (_ULCAST_(1) << 20)
-#define R4K_CONF_SS (_ULCAST_(1) << 21)
-#define R4K_CONF_SB (_ULCAST_(3) << 22)
-
-/* Bits specific to the R5000. */
-#define R5K_CONF_SE (_ULCAST_(1) << 12)
-#define R5K_CONF_SS (_ULCAST_(3) << 20)
-
-/* Bits specific to the R10000. */
-#define R10K_CONF_DN (_ULCAST_(3) << 3)
-#define R10K_CONF_CT (_ULCAST_(1) << 5)
-#define R10K_CONF_PE (_ULCAST_(1) << 6)
-#define R10K_CONF_PM (_ULCAST_(3) << 7)
-#define R10K_CONF_EC (_ULCAST_(15)<< 9)
-#define R10K_CONF_SB (_ULCAST_(1) << 13)
-#define R10K_CONF_SK (_ULCAST_(1) << 14)
-#define R10K_CONF_SS (_ULCAST_(7) << 16)
-#define R10K_CONF_SC (_ULCAST_(7) << 19)
-#define R10K_CONF_DC (_ULCAST_(7) << 26)
-#define R10K_CONF_IC (_ULCAST_(7) << 29)
-
-/* Bits specific to the VR41xx. */
-#define VR41_CONF_CS (_ULCAST_(1) << 12)
-#define VR41_CONF_M16 (_ULCAST_(1) << 20)
-#define VR41_CONF_AD (_ULCAST_(1) << 23)
-
-/* Bits specific to the R30xx. */
-#define R30XX_CONF_FDM (_ULCAST_(1) << 19)
-#define R30XX_CONF_REV (_ULCAST_(1) << 22)
-#define R30XX_CONF_AC (_ULCAST_(1) << 23)
-#define R30XX_CONF_RF (_ULCAST_(1) << 24)
-#define R30XX_CONF_HALT (_ULCAST_(1) << 25)
-#define R30XX_CONF_FPINT (_ULCAST_(7) << 26)
-#define R30XX_CONF_DBR (_ULCAST_(1) << 29)
-#define R30XX_CONF_SB (_ULCAST_(1) << 30)
-#define R30XX_CONF_LOCK (_ULCAST_(1) << 31)
-
-/* Bits specific to the TX49. */
-#define TX49_CONF_DC (_ULCAST_(1) << 16)
-#define TX49_CONF_IC (_ULCAST_(1) << 17) /* conflict with CONF_SC */
-#define TX49_CONF_HALT (_ULCAST_(1) << 18)
-#define TX49_CONF_CWFON (_ULCAST_(1) << 27)
-
-/* Bits specific to the MIPS32/64 PRA. */
-#define MIPS_CONF_MT (_ULCAST_(7) << 7)
-#define MIPS_CONF_AR (_ULCAST_(7) << 10)
-#define MIPS_CONF_AT (_ULCAST_(3) << 13)
-#define MIPS_CONF_M (_ULCAST_(1) << 31)
-
-/*
- * R10000 performance counter definitions.
- *
- * FIXME: The R10000 performance counter opens a nice way to implement CPU
- * time accounting with a precission of one cycle. I don't have
- * R10000 silicon but just a manual, so ...
- */
-
-/*
- * Events counted by counter #0
- */
-#define CE0_CYCLES 0
-#define CE0_INSN_ISSUED 1
-#define CE0_LPSC_ISSUED 2
-#define CE0_S_ISSUED 3
-#define CE0_SC_ISSUED 4
-#define CE0_SC_FAILED 5
-#define CE0_BRANCH_DECODED 6
-#define CE0_QW_WB_SECONDARY 7
-#define CE0_CORRECTED_ECC_ERRORS 8
-#define CE0_ICACHE_MISSES 9
-#define CE0_SCACHE_I_MISSES 10
-#define CE0_SCACHE_I_WAY_MISSPREDICTED 11
-#define CE0_EXT_INTERVENTIONS_REQ 12
-#define CE0_EXT_INVALIDATE_REQ 13
-#define CE0_VIRTUAL_COHERENCY_COND 14
-#define CE0_INSN_GRADUATED 15
-
-/*
- * Events counted by counter #1
- */
-#define CE1_CYCLES 0
-#define CE1_INSN_GRADUATED 1
-#define CE1_LPSC_GRADUATED 2
-#define CE1_S_GRADUATED 3
-#define CE1_SC_GRADUATED 4
-#define CE1_FP_INSN_GRADUATED 5
-#define CE1_QW_WB_PRIMARY 6
-#define CE1_TLB_REFILL 7
-#define CE1_BRANCH_MISSPREDICTED 8
-#define CE1_DCACHE_MISS 9
-#define CE1_SCACHE_D_MISSES 10
-#define CE1_SCACHE_D_WAY_MISSPREDICTED 11
-#define CE1_EXT_INTERVENTION_HITS 12
-#define CE1_EXT_INVALIDATE_REQ 13
-#define CE1_SP_HINT_TO_CEXCL_SC_BLOCKS 14
-#define CE1_SP_HINT_TO_SHARED_SC_BLOCKS 15
-
-/*
- * These flags define in which privilege mode the counters count events
- */
-#define CEB_USER 8 /* Count events in user mode, EXL = ERL = 0 */
-#define CEB_SUPERVISOR 4 /* Count events in supvervisor mode EXL = ERL = 0 */
-#define CEB_KERNEL 2 /* Count events in kernel mode EXL = ERL = 0 */
-#define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */
-
-#ifndef __ASSEMBLY__
-
-/*
- * Functions to access the r10k performance counter and control registers
- */
-#define read_r10k_perf_cntr(counter) \
-({ unsigned int __res; \
- __asm__ __volatile__( \
- "mfpc\t%0, "STR(counter) \
- : "=r" (__res)); \
- __res;})
-
-#define write_r10k_perf_cntr(counter,val) \
- __asm__ __volatile__( \
- "mtpc\t%0, "STR(counter) \
- : : "r" (val));
-
-#define read_r10k_perf_cntl(counter) \
-({ unsigned int __res; \
- __asm__ __volatile__( \
- "mfps\t%0, "STR(counter) \
- : "=r" (__res)); \
- __res;})
-
-#define write_r10k_perf_cntl(counter,val) \
- __asm__ __volatile__( \
- "mtps\t%0, "STR(counter) \
- : : "r" (val));
-
-/*
- * Macros to access the system control coprocessor
- */
-
-#define __read_32bit_c0_register(source, sel) \
-({ int __res; \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mfc0\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mfc0\t%0, " #source ", " #sel "\n\t" \
- ".set\tmips0\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#define __read_64bit_c0_register(source, sel) \
-({ unsigned long __res; \
- if (sel == 0) \
- __asm__ __volatile__( \
- ".set\tmips3\n\t" \
- "dmfc0\t%0, " #source "\n\t" \
- ".set\tmips0" \
- : "=r" (__res)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips64\n\t" \
- "dmfc0\t%0, " #source ", " #sel "\n\t" \
- ".set\tmips0" \
- : "=r" (__res)); \
- __res; \
-})
-
-#define __write_32bit_c0_register(register, sel, value) \
-do { \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mtc0\t%z0, " #register "\n\t" \
- : : "Jr" (value)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mtc0\t%z0, " #register ", " #sel "\n\t" \
- ".set\tmips0" \
- : : "Jr" (value)); \
-} while (0)
-
-#define __write_64bit_c0_register(register, sel, value) \
-do { \
- if (sel == 0) \
- __asm__ __volatile__( \
- ".set\tmips3\n\t" \
- "dmtc0\t%z0, " #register "\n\t" \
- ".set\tmips0" \
- : : "Jr" (value)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips64\n\t" \
- "dmtc0\t%z0, " #register ", " #sel "\n\t" \
- ".set\tmips0" \
- : : "Jr" (value)); \
-} while (0)
-
-#define __read_ulong_c0_register(reg, sel) \
- ((sizeof(unsigned long) == 4) ? \
- __read_32bit_c0_register(reg, sel) : \
- __read_64bit_c0_register(reg, sel))
-
-#define __write_ulong_c0_register(reg, sel, val) \
-do { \
- if (sizeof(unsigned long) == 4) \
- __write_32bit_c0_register(reg, sel, val); \
- else \
- __write_64bit_c0_register(reg, sel, val); \
-} while (0)
-
-/*
- * These versions are only needed for systems with more than 38 bits of
- * physical address space running the 32-bit kernel. That's none atm :-)
- */
-#define __read_64bit_c0_split(source, sel) \
-({ \
- unsigned long long val; \
- unsigned long flags; \
- \
- local_irq_save(flags); \
- if (sel == 0) \
- __asm__ __volatile__( \
- ".set\tmips64\n\t" \
- "dmfc0\t%M0, " #source "\n\t" \
- "dsll\t%L0, %M0, 32\n\t" \
- "dsrl\t%M0, %M0, 32\n\t" \
- "dsrl\t%L0, %L0, 32\n\t" \
- ".set\tmips0" \
- : "=r" (val)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips64\n\t" \
- "dmfc0\t%M0, " #source ", " #sel "\n\t" \
- "dsll\t%L0, %M0, 32\n\t" \
- "dsrl\t%M0, %M0, 32\n\t" \
- "dsrl\t%L0, %L0, 32\n\t" \
- ".set\tmips0" \
- : "=r" (val)); \
- local_irq_restore(flags); \
- \
- val; \
-})
-
-#define __write_64bit_c0_split(source, sel, val) \
-do { \
- unsigned long flags; \
- \
- local_irq_save(flags); \
- if (sel == 0) \
- __asm__ __volatile__( \
- ".set\tmips64\n\t" \
- "dsll\t%L0, %L0, 32\n\t" \
- "dsrl\t%L0, %L0, 32\n\t" \
- "dsll\t%M0, %M0, 32\n\t" \
- "or\t%L0, %L0, %M0\n\t" \
- "dmtc0\t%L0, " #source "\n\t" \
- ".set\tmips0" \
- : : "r" (val)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips64\n\t" \
- "dsll\t%L0, %L0, 32\n\t" \
- "dsrl\t%L0, %L0, 32\n\t" \
- "dsll\t%M0, %M0, 32\n\t" \
- "or\t%L0, %L0, %M0\n\t" \
- "dmtc0\t%L0, " #source ", " #sel "\n\t" \
- ".set\tmips0" \
- : : "r" (val)); \
- local_irq_restore(flags); \
-} while (0)
-
-#define read_c0_index() __read_32bit_c0_register($0, 0)
-#define write_c0_index(val) __write_32bit_c0_register($0, 0, val)
-
-#define read_c0_entrylo0() __read_ulong_c0_register($2, 0)
-#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val)
-
-#define read_c0_entrylo1() __read_ulong_c0_register($3, 0)
-#define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val)
-
-#define read_c0_conf() __read_32bit_c0_register($3, 0)
-#define write_c0_conf(val) __write_32bit_c0_register($3, 0, val)
-
-#define read_c0_context() __read_ulong_c0_register($4, 0)
-#define write_c0_context(val) __write_ulong_c0_register($4, 0, val)
-
-#define read_c0_pagemask() __read_32bit_c0_register($5, 0)
-#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val)
-
-#define read_c0_wired() __read_32bit_c0_register($6, 0)
-#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val)
-
-#define read_c0_info() __read_32bit_c0_register($7, 0)
-
-#define read_c0_cache() __read_32bit_c0_register($7, 0) /* TX39xx */
-#define write_c0_cache(val) __write_32bit_c0_register($7, 0, val)
-
-#define read_c0_count() __read_32bit_c0_register($9, 0)
-#define write_c0_count(val) __write_32bit_c0_register($9, 0, val)
-
-#define read_c0_entryhi() __read_ulong_c0_register($10, 0)
-#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val)
-
-#define read_c0_compare() __read_32bit_c0_register($11, 0)
-#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val)
-
-#define read_c0_status() __read_32bit_c0_register($12, 0)
-#define write_c0_status(val) __write_32bit_c0_register($12, 0, val)
-
-#define read_c0_cause() __read_32bit_c0_register($13, 0)
-#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val)
-
-#define read_c0_prid() __read_32bit_c0_register($15, 0)
-
-#define read_c0_config() __read_32bit_c0_register($16, 0)
-#define read_c0_config1() __read_32bit_c0_register($16, 1)
-#define read_c0_config2() __read_32bit_c0_register($16, 2)
-#define read_c0_config3() __read_32bit_c0_register($16, 3)
-#define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
-#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
-#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
-#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
-
-/*
- * The WatchLo register. There may be upto 8 of them.
- */
-#define read_c0_watchlo0() __read_ulong_c0_register($18, 0)
-#define read_c0_watchlo1() __read_ulong_c0_register($18, 1)
-#define read_c0_watchlo2() __read_ulong_c0_register($18, 2)
-#define read_c0_watchlo3() __read_ulong_c0_register($18, 3)
-#define read_c0_watchlo4() __read_ulong_c0_register($18, 4)
-#define read_c0_watchlo5() __read_ulong_c0_register($18, 5)
-#define read_c0_watchlo6() __read_ulong_c0_register($18, 6)
-#define read_c0_watchlo7() __read_ulong_c0_register($18, 7)
-#define write_c0_watchlo0(val) __write_ulong_c0_register($18, 0, val)
-#define write_c0_watchlo1(val) __write_ulong_c0_register($18, 1, val)
-#define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val)
-#define write_c0_watchlo3(val) __write_ulong_c0_register($18, 3, val)
-#define write_c0_watchlo4(val) __write_ulong_c0_register($18, 4, val)
-#define write_c0_watchlo5(val) __write_ulong_c0_register($18, 5, val)
-#define write_c0_watchlo6(val) __write_ulong_c0_register($18, 6, val)
-#define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val)
-
-/*
- * The WatchHi register. There may be upto 8 of them.
- */
-#define read_c0_watchhi0() __read_32bit_c0_register($19, 0)
-#define read_c0_watchhi1() __read_32bit_c0_register($19, 1)
-#define read_c0_watchhi2() __read_32bit_c0_register($19, 2)
-#define read_c0_watchhi3() __read_32bit_c0_register($19, 3)
-#define read_c0_watchhi4() __read_32bit_c0_register($19, 4)
-#define read_c0_watchhi5() __read_32bit_c0_register($19, 5)
-#define read_c0_watchhi6() __read_32bit_c0_register($19, 6)
-#define read_c0_watchhi7() __read_32bit_c0_register($19, 7)
-
-#define write_c0_watchhi0(val) __write_32bit_c0_register($19, 0, val)
-#define write_c0_watchhi1(val) __write_32bit_c0_register($19, 1, val)
-#define write_c0_watchhi2(val) __write_32bit_c0_register($19, 2, val)
-#define write_c0_watchhi3(val) __write_32bit_c0_register($19, 3, val)
-#define write_c0_watchhi4(val) __write_32bit_c0_register($19, 4, val)
-#define write_c0_watchhi5(val) __write_32bit_c0_register($19, 5, val)
-#define write_c0_watchhi6(val) __write_32bit_c0_register($19, 6, val)
-#define write_c0_watchhi7(val) __write_32bit_c0_register($19, 7, val)
-
-#define read_c0_xcontext() __read_ulong_c0_register($20, 0)
-#define write_c0_xcontext(val) __write_ulong_c0_register($20, 0, val)
-
-#define read_c0_intcontrol() __read_32bit_c0_register($20, 1)
-#define write_c0_intcontrol(val) __write_32bit_c0_register($20, 1, val)
-
-#define read_c0_framemask() __read_32bit_c0_register($21, 0)
-#define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val)
-
-#define read_c0_debug() __read_32bit_c0_register($23, 0)
-#define write_c0_debug(val) __write_32bit_c0_register($23, 0, val)
-
-#define read_c0_depc() __read_ulong_c0_register($24, 0)
-#define write_c0_depc(val) __write_ulong_c0_register($24, 0, val)
-
-#define read_c0_ecc() __read_32bit_c0_register($26, 0)
-#define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val)
-
-#define read_c0_derraddr0() __read_ulong_c0_register($26, 1)
-#define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)
-
-#define read_c0_cacheerr() __read_32bit_c0_register($27, 0)
-
-#define read_c0_derraddr1() __read_ulong_c0_register($27, 1)
-#define write_c0_derraddr1(val) __write_ulong_c0_register($27, 1, val)
-
-#define read_c0_taglo() __read_32bit_c0_register($28, 0)
-#define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val)
-
-#define read_c0_taghi() __read_32bit_c0_register($29, 0)
-#define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val)
-
-#define read_c0_errorepc() __read_ulong_c0_register($30, 0)
-#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val)
-
-/*
- * Macros to access the floating point coprocessor control registers
- */
-#define read_32bit_cp1_register(source) \
-({ int __res; \
- __asm__ __volatile__( \
- ".set\tpush\n\t" \
- ".set\treorder\n\t" \
- "cfc1\t%0,"STR(source)"\n\t" \
- ".set\tpop" \
- : "=r" (__res)); \
- __res;})
-
-/* TLB operations. */
-static inline void tlb_probe(void)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- "tlbp\n\t"
- ".set reorder");
-}
-
-static inline void tlb_read(void)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- "tlbr\n\t"
- ".set reorder");
-}
-
-static inline void tlb_write_indexed(void)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- "tlbwi\n\t"
- ".set reorder");
-}
-
-static inline void tlb_write_random(void)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- "tlbwr\n\t"
- ".set reorder");
-}
-
-/*
- * Manipulate bits in a c0 register.
- */
-#define __BUILD_SET_C0(name,register) \
-static inline unsigned int \
-set_c0_##name(unsigned int set) \
-{ \
- unsigned int res; \
- \
- res = read_c0_##name(); \
- res |= set; \
- write_c0_##name(res); \
- \
- return res; \
-} \
- \
-static inline unsigned int \
-clear_c0_##name(unsigned int clear) \
-{ \
- unsigned int res; \
- \
- res = read_c0_##name(); \
- res &= ~clear; \
- write_c0_##name(res); \
- \
- return res; \
-} \
- \
-static inline unsigned int \
-change_c0_##name(unsigned int change, unsigned int new) \
-{ \
- unsigned int res; \
- \
- res = read_c0_##name(); \
- res &= ~change; \
- res |= (new & change); \
- write_c0_##name(res); \
- \
- return res; \
-}
-
-__BUILD_SET_C0(status,CP0_STATUS)
-__BUILD_SET_C0(cause,CP0_CAUSE)
-__BUILD_SET_C0(config,CP0_CONFIG)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_MIPSREGS_H */
diff -Nru a/include/asm-mips64/mman.h b/include/asm-mips64/mman.h
--- a/include/asm-mips64/mman.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,71 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999, 2002 by Ralf Baechle
- */
-#ifndef _ASM_MMAN_H
-#define _ASM_MMAN_H
-
-/*
- * Protections are chosen from these bits, OR'd together. The
- * implementation does not necessarily support PROT_EXEC or PROT_WRITE
- * without PROT_READ. The only guarantees are that no writing will be
- * allowed without PROT_WRITE and no access will be allowed for PROT_NONE.
- */
-#define PROT_NONE 0x00 /* page can not be accessed */
-#define PROT_READ 0x01 /* page can be read */
-#define PROT_WRITE 0x02 /* page can be written */
-#define PROT_EXEC 0x04 /* page can be executed */
-/* 0x08 reserved for PROT_EXEC_NOFLUSH */
-#define PROT_SEM 0x10 /* page may be used for atomic ops */
-
-/*
- * Flags for mmap
- */
-#define MAP_SHARED 0x001 /* Share changes */
-#define MAP_PRIVATE 0x002 /* Changes are private */
-#define MAP_TYPE 0x00f /* Mask for type of mapping */
-#define MAP_FIXED 0x010 /* Interpret addr exactly */
-
-/* not used by linux, but here to make sure we don't clash with ABI defines */
-#define MAP_RENAME 0x020 /* Assign page to file */
-#define MAP_AUTOGROW 0x040 /* File may grow by writing */
-#define MAP_LOCAL 0x080 /* Copy on fork/sproc */
-#define MAP_AUTORSRV 0x100 /* Logical swap reserved on demand */
-
-/* These are linux-specific */
-#define MAP_NORESERVE 0x0400 /* don't check for reservations */
-#define MAP_ANONYMOUS 0x0800 /* don't use a file */
-#define MAP_GROWSDOWN 0x1000 /* stack-like segment */
-#define MAP_DENYWRITE 0x2000 /* ETXTBSY */
-#define MAP_EXECUTABLE 0x4000 /* mark it as an executable */
-#define MAP_LOCKED 0x8000 /* pages are locked */
-#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */
-#define MAP_NONBLOCK 0x20000 /* do not block on IO */
-
-/*
- * Flags for msync
- */
-#define MS_ASYNC 0x0001 /* sync memory asynchronously */
-#define MS_INVALIDATE 0x0002 /* invalidate mappings & caches */
-#define MS_SYNC 0x0004 /* synchronous memory sync */
-
-/*
- * Flags for mlockall
- */
-#define MCL_CURRENT 1 /* lock all current mappings */
-#define MCL_FUTURE 2 /* lock all future mappings */
-
-#define MADV_NORMAL 0x0 /* default page-in behavior */
-#define MADV_RANDOM 0x1 /* page-in minimum required */
-#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
-#define MADV_WILLNEED 0x3 /* pre-fault pages */
-#define MADV_DONTNEED 0x4 /* discard these pages */
-
-/* compatibility flags */
-#define MAP_ANON MAP_ANONYMOUS
-#define MAP_FILE 0
-
-#endif /* _ASM_MMAN_H */
diff -Nru a/include/asm-mips64/mmu.h b/include/asm-mips64/mmu.h
--- a/include/asm-mips64/mmu.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,6 +0,0 @@
-#ifndef __ASM_MMU_H
-#define __ASM_MMU_H
-
-typedef unsigned long mm_context_t[NR_CPUS];
-
-#endif /* __ASM_MMU_H */
diff -Nru a/include/asm-mips64/mmu_context.h b/include/asm-mips64/mmu_context.h
--- a/include/asm-mips64/mmu_context.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,166 +0,0 @@
-/*
- * Switch a MMU context.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_MMU_CONTEXT_H
-#define _ASM_MMU_CONTEXT_H
-
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <asm/cacheflush.h>
-#include <asm/tlbflush.h>
-
-/*
- * For the fast tlb miss handlers, we currently keep a per cpu array
- * of pointers to the current pgd for each processor. Also, the proc.
- * id is stuffed into the context register. This should be changed to
- * use the processor id via current->processor, where current is stored
- * in watchhi/lo. The context register should be used to contiguously
- * map the page tables.
- */
-#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
- pgd_current[smp_processor_id()] = (unsigned long)(pgd)
-#define TLBMISS_HANDLER_SETUP() \
- write_c0_context(((long)(&pgd_current[smp_processor_id()])) << 23); \
- TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
-extern unsigned long pgd_current[];
-
-#define ASID_INC 0x1
-#define ASID_MASK 0xff
-
-#define cpu_context(cpu, mm) ((mm)->context[cpu])
-#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
-#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-}
-
-/*
- * All unused by hardware upper bits will be considered
- * as a software asid extension.
- */
-#define ASID_VERSION_MASK ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
-#define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
-
-static inline void
-get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
-{
- unsigned long asid = asid_cache(cpu);
-
- if (! ((asid += ASID_INC) & ASID_MASK) ) {
-#ifdef CONFIG_VTAG_ICACHE
- flush_icache_all();
-#endif
- local_flush_tlb_all(); /* start new asid cycle */
- if (!asid) /* fix version if needed */
- asid = ASID_FIRST_VERSION;
- }
- cpu_context(cpu, mm) = asid_cache(cpu) = asid;
-}
-
-/*
- * Initialize the context related info for a new mm_struct
- * instance.
- */
-static inline int
-init_new_context(struct task_struct *tsk, struct mm_struct *mm)
-{
- int i;
-
- for (i = 0; i < num_online_cpus(); i++)
- cpu_context(i, mm) = 0;
-
- return 0;
-}
-
-static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
- struct task_struct *tsk, unsigned cpu)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- /* Check if our ASID is of an older version and thus invalid */
- if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
- get_new_mmu_context(next, cpu);
-
- write_c0_entryhi(cpu_context(cpu, next));
- TLBMISS_HANDLER_SETUP_PGD(next->pgd);
-
- /*
- * Mark current->active_mm as not "active" anymore.
- * We don't want to mislead possible IPI tlb flush routines.
- */
- clear_bit(cpu, &prev->cpu_vm_mask);
- set_bit(cpu, &next->cpu_vm_mask);
-
- local_irq_restore(flags);
-}
-
-/*
- * Destroy context related info for an mm_struct that is about
- * to be put to rest.
- */
-static inline void destroy_context(struct mm_struct *mm)
-{
-}
-
-#define deactivate_mm(tsk,mm) do { } while (0)
-
-/*
- * After we have set current->mm to a new value, this activates
- * the context for the new mm so we see the new mappings.
- */
-static inline void
-activate_mm(struct mm_struct *prev, struct mm_struct *next)
-{
- unsigned long flags;
- int cpu = smp_processor_id();
-
- local_irq_save(flags);
-
- /* Unconditionally get a new ASID. */
- get_new_mmu_context(next, cpu);
-
- write_c0_entryhi(cpu_context(cpu, next));
- TLBMISS_HANDLER_SETUP_PGD(next->pgd);
-
- /* mark mmu ownership change */
- clear_bit(cpu, &prev->cpu_vm_mask);
- set_bit(cpu, &next->cpu_vm_mask);
-
- local_irq_restore(flags);
-}
-
-/*
- * If mm is currently active_mm, we can't really drop it. Instead,
- * we will get a new one for it.
- */
-static inline void
-drop_mmu_context(struct mm_struct *mm, unsigned cpu)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- if (test_bit(cpu, &mm->cpu_vm_mask)) {
- get_new_mmu_context(mm, cpu);
- write_c0_entryhi(cpu_asid(cpu, mm));
- } else {
- /* will get a new context next time */
- cpu_context(cpu, mm) = 0;
- }
-
- local_irq_restore(flags);
-}
-
-#endif /* _ASM_MMU_CONTEXT_H */
diff -Nru a/include/asm-mips64/mmzone.h b/include/asm-mips64/mmzone.h
--- a/include/asm-mips64/mmzone.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,95 +0,0 @@
-/*
- * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99
- */
-#ifndef _ASM_MMZONE_H_
-#define _ASM_MMZONE_H_
-
-#include <linux/config.h>
-#include <asm/sn/types.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/arch.h>
-#include <asm/sn/klkernvars.h>
-
-typedef struct plat_pglist_data {
- pg_data_t gendata;
- kern_vars_t kern_vars;
-} plat_pg_data_t;
-
-/*
- * Following are macros that are specific to this numa platform.
- */
-
-extern int numa_debug(void);
-extern plat_pg_data_t *plat_node_data[];
-
-#define PHYSADDR_TO_NID(pa) NASID_TO_COMPACT_NODEID(NASID_GET(pa))
-#define PLAT_NODE_DATA(n) (plat_node_data[n])
-#define PLAT_NODE_DATA_SIZE(n) (PLAT_NODE_DATA(n)->gendata.node_spanned_pages)
-#define PLAT_NODE_DATA_LOCALNR(p, n) \
- (((p) >> PAGE_SHIFT) - PLAT_NODE_DATA(n)->gendata.node_start_pfn)
-
-#ifdef CONFIG_DISCONTIGMEM
-
-/*
- * Following are macros that each numa implmentation must define.
- */
-
-/*
- * Given a kernel address, find the home node of the underlying memory.
- */
-#define KVADDR_TO_NID(kaddr) \
- ((NASID_TO_COMPACT_NODEID(NASID_GET(__pa(kaddr))) != -1) ? \
- (NASID_TO_COMPACT_NODEID(NASID_GET(__pa(kaddr)))) : \
- (printk("NUMABUG: %s line %d addr 0x%lx", __FILE__, __LINE__, kaddr), \
- numa_debug(), -1))
-
-/*
- * Return a pointer to the node data for node n.
- */
-#define NODE_DATA(n) (&((PLAT_NODE_DATA(n))->gendata))
-
-/*
- * NODE_MEM_MAP gives the kaddr for the mem_map of the node.
- */
-#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map)
-
-/*
- * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
- * and returns the mem_map of that node.
- */
-#define ADDR_TO_MAPBASE(kaddr) \
- NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
-
-/*
- * Given a kaddr, LOCAL_BASE_ADDR finds the owning node of the memory
- * and returns the kaddr corresponding to first physical page in the
- * node's mem_map.
- */
-#define LOCAL_BASE_ADDR(kaddr) ((unsigned long)(kaddr) & ~(NODE_MAX_MEM_SIZE-1))
-
-#define LOCAL_MAP_NR(kvaddr) \
- (((unsigned long)(kvaddr)-LOCAL_BASE_ADDR((kvaddr))) >> PAGE_SHIFT)
-
-#define MIPS64_NR(kaddr) (((unsigned long)(kaddr) > (unsigned long)high_memory)\
- ? (max_mapnr + 1) : (LOCAL_MAP_NR((kaddr)) + \
- (((unsigned long)ADDR_TO_MAPBASE((kaddr)) - PAGE_OFFSET) / \
- sizeof(struct page))))
-
-#define kern_addr_valid(addr) ((KVADDR_TO_NID((unsigned long)addr) > \
- -1) ? 0 : (test_bit(LOCAL_MAP_NR((addr)), \
- NODE_DATA(KVADDR_TO_NID((unsigned long)addr))->valid_addr_bitmap)))
-
-#define pfn_to_page(pfn) (mem_map + (pfn))
-#define page_to_pfn(page) \
- ((((page)-(page)->zone->zone_mem_map) + (page)->zone->zone_start_pfn) \
- << PAGE_SHIFT)
-#define virt_to_page(kaddr) pfn_to_page(MIPS64_NR(kaddr))
-
-#define pfn_valid(pfn) ((pfn) < max_mapnr)
-#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
-#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
-#endif /* CONFIG_DISCONTIGMEM */
-
-#endif /* _ASM_MMZONE_H_ */
diff -Nru a/include/asm-mips64/module.h b/include/asm-mips64/module.h
--- a/include/asm-mips64/module.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,14 +0,0 @@
-#ifndef _ASM_MODULE_H
-#define _ASM_MODULE_H
-
-struct mod_arch_specific {
- /* Data Bus Error exception tables */
- const struct exception_table_entry *dbe_table_start;
- const struct exception_table_entry *dbe_table_end;
-};
-
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-
-#endif /* _ASM_MODULE_H */
diff -Nru a/include/asm-mips64/msgbuf.h b/include/asm-mips64/msgbuf.h
--- a/include/asm-mips64/msgbuf.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,30 +0,0 @@
-#ifndef _ASM_MSGBUF_H
-#define _ASM_MSGBUF_H
-
-/*
- * The msqid64_ds structure for alpha architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 2 miscellaneous 64-bit values
- */
-
-struct msqid64_ds {
- struct ipc64_perm msg_perm;
- __kernel_time_t msg_stime; /* last msgsnd time */
- unsigned long __unused1;
- __kernel_time_t msg_rtime; /* last msgrcv time */
- unsigned long __unused2;
- __kernel_time_t msg_ctime; /* last change time */
- unsigned long __unused3;
- unsigned long msg_cbytes; /* current number of bytes on queue */
- unsigned long msg_qnum; /* number of messages in queue */
- unsigned long msg_qbytes; /* max number of bytes on queue */
- __kernel_pid_t msg_lspid; /* pid of last msgsnd */
- __kernel_pid_t msg_lrpid; /* last receive pid */
- unsigned long __unused4;
- unsigned long __unused5;
-};
-
-#endif /* _ASM_MSGBUF_H */
diff -Nru a/include/asm-mips64/mv64340.h b/include/asm-mips64/mv64340.h
--- a/include/asm-mips64/mv64340.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1037 +0,0 @@
-/*******************************************************************************
-* mv64340.h - MV-64340 Internal registers definition file.
-*
-* Copyright 2002 Momentum Computer, Inc.
-* Copyright 2002 GALILEO TECHNOLOGY, LTD.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*******************************************************************************/
-
-#ifndef __MV64340_H__
-#define __MV64340_H__
-
-#include <asm/mv64340_dep.h>
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-
-/* DDR SDRAM BAR and size registers */
-
-#define MV64340_CS_0_BASE_ADDR 0x008
-#define MV64340_CS_0_SIZE 0x010
-#define MV64340_CS_1_BASE_ADDR 0x208
-#define MV64340_CS_1_SIZE 0x210
-#define MV64340_CS_2_BASE_ADDR 0x018
-#define MV64340_CS_2_SIZE 0x020
-#define MV64340_CS_3_BASE_ADDR 0x218
-#define MV64340_CS_3_SIZE 0x220
-
-/* Devices BAR and size registers */
-
-#define MV64340_DEV_CS0_BASE_ADDR 0x028
-#define MV64340_DEV_CS0_SIZE 0x030
-#define MV64340_DEV_CS1_BASE_ADDR 0x228
-#define MV64340_DEV_CS1_SIZE 0x230
-#define MV64340_DEV_CS2_BASE_ADDR 0x248
-#define MV64340_DEV_CS2_SIZE 0x250
-#define MV64340_DEV_CS3_BASE_ADDR 0x038
-#define MV64340_DEV_CS3_SIZE 0x040
-#define MV64340_BOOTCS_BASE_ADDR 0x238
-#define MV64340_BOOTCS_SIZE 0x240
-
-/* PCI 0 BAR and size registers */
-
-#define MV64340_PCI_0_IO_BASE_ADDR 0x048
-#define MV64340_PCI_0_IO_SIZE 0x050
-#define MV64340_PCI_0_MEMORY0_BASE_ADDR 0x058
-#define MV64340_PCI_0_MEMORY0_SIZE 0x060
-#define MV64340_PCI_0_MEMORY1_BASE_ADDR 0x080
-#define MV64340_PCI_0_MEMORY1_SIZE 0x088
-#define MV64340_PCI_0_MEMORY2_BASE_ADDR 0x258
-#define MV64340_PCI_0_MEMORY2_SIZE 0x260
-#define MV64340_PCI_0_MEMORY3_BASE_ADDR 0x280
-#define MV64340_PCI_0_MEMORY3_SIZE 0x288
-
-/* PCI 1 BAR and size registers */
-#define MV64340_PCI_1_IO_BASE_ADDR 0x090
-#define MV64340_PCI_1_IO_SIZE 0x098
-#define MV64340_PCI_1_MEMORY0_BASE_ADDR 0x0a0
-#define MV64340_PCI_1_MEMORY0_SIZE 0x0a8
-#define MV64340_PCI_1_MEMORY1_BASE_ADDR 0x0b0
-#define MV64340_PCI_1_MEMORY1_SIZE 0x0b8
-#define MV64340_PCI_1_MEMORY2_BASE_ADDR 0x2a0
-#define MV64340_PCI_1_MEMORY2_SIZE 0x2a8
-#define MV64340_PCI_1_MEMORY3_BASE_ADDR 0x2b0
-#define MV64340_PCI_1_MEMORY3_SIZE 0x2b8
-
-/* SRAM base address */
-#define MV64340_INTEGRATED_SRAM_BASE_ADDR 0x268
-
-/* internal registers space base address */
-#define MV64340_INTERNAL_SPACE_BASE_ADDR 0x068
-
-/* Enables the CS , DEV_CS , PCI 0 and PCI 1
- windows above */
-#define MV64340_BASE_ADDR_ENABLE 0x278
-
-/****************************************/
-/* PCI remap registers */
-/****************************************/
- /* PCI 0 */
-#define MV64340_PCI_0_IO_ADDR_REMAP 0x0f0
-#define MV64340_PCI_0_MEMORY0_LOW_ADDR_REMAP 0x0f8
-#define MV64340_PCI_0_MEMORY0_HIGH_ADDR_REMAP 0x320
-#define MV64340_PCI_0_MEMORY1_LOW_ADDR_REMAP 0x100
-#define MV64340_PCI_0_MEMORY1_HIGH_ADDR_REMAP 0x328
-#define MV64340_PCI_0_MEMORY2_LOW_ADDR_REMAP 0x2f8
-#define MV64340_PCI_0_MEMORY2_HIGH_ADDR_REMAP 0x330
-#define MV64340_PCI_0_MEMORY3_LOW_ADDR_REMAP 0x300
-#define MV64340_PCI_0_MEMORY3_HIGH_ADDR_REMAP 0x338
- /* PCI 1 */
-#define MV64340_PCI_1_IO_ADDR_REMAP 0x108
-#define MV64340_PCI_1_MEMORY0_LOW_ADDR_REMAP 0x110
-#define MV64340_PCI_1_MEMORY0_HIGH_ADDR_REMAP 0x340
-#define MV64340_PCI_1_MEMORY1_LOW_ADDR_REMAP 0x118
-#define MV64340_PCI_1_MEMORY1_HIGH_ADDR_REMAP 0x348
-#define MV64340_PCI_1_MEMORY2_LOW_ADDR_REMAP 0x310
-#define MV64340_PCI_1_MEMORY2_HIGH_ADDR_REMAP 0x350
-#define MV64340_PCI_1_MEMORY3_LOW_ADDR_REMAP 0x318
-#define MV64340_PCI_1_MEMORY3_HIGH_ADDR_REMAP 0x358
-
-#define MV64340_CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0
-#define MV64340_CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8
-#define MV64340_CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0
-#define MV64340_CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8
-#define MV64340_CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0
-#define MV64340_CPU_GE_HEADERS_RETARGET_BASE 0x3d8
-#define MV64340_CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e0
-#define MV64340_CPU_IDMA_HEADERS_RETARGET_BASE 0x3e8
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-
-#define MV64340_CPU_CONFIG 0x000
-#define MV64340_CPU_MODE 0x120
-#define MV64340_CPU_MASTER_CONTROL 0x160
-#define MV64340_CPU_CROSS_BAR_CONTROL_LOW 0x150
-#define MV64340_CPU_CROSS_BAR_CONTROL_HIGH 0x158
-#define MV64340_CPU_CROSS_BAR_TIMEOUT 0x168
-
-/****************************************/
-/* SMP RegisterS */
-/****************************************/
-
-#define MV64340_SMP_WHO_AM_I 0x200
-#define MV64340_SMP_CPU0_DOORBELL 0x214
-#define MV64340_SMP_CPU0_DOORBELL_CLEAR 0x21C
-#define MV64340_SMP_CPU1_DOORBELL 0x224
-#define MV64340_SMP_CPU1_DOORBELL_CLEAR 0x22C
-#define MV64340_SMP_CPU0_DOORBELL_MASK 0x234
-#define MV64340_SMP_CPU1_DOORBELL_MASK 0x23C
-#define MV64340_SMP_SEMAPHOR0 0x244
-#define MV64340_SMP_SEMAPHOR1 0x24c
-#define MV64340_SMP_SEMAPHOR2 0x254
-#define MV64340_SMP_SEMAPHOR3 0x25c
-#define MV64340_SMP_SEMAPHOR4 0x264
-#define MV64340_SMP_SEMAPHOR5 0x26c
-#define MV64340_SMP_SEMAPHOR6 0x274
-#define MV64340_SMP_SEMAPHOR7 0x27c
-
-/****************************************/
-/* CPU Sync Barrier Register */
-/****************************************/
-
-#define MV64340_CPU_0_SYNC_BARRIER_TRIGGER 0x0c0
-#define MV64340_CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8
-#define MV64340_CPU_1_SYNC_BARRIER_TRIGGER 0x0d0
-#define MV64340_CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define MV64340_CPU_PROTECT_WINDOW_0_BASE_ADDR 0x180
-#define MV64340_CPU_PROTECT_WINDOW_0_SIZE 0x188
-#define MV64340_CPU_PROTECT_WINDOW_1_BASE_ADDR 0x190
-#define MV64340_CPU_PROTECT_WINDOW_1_SIZE 0x198
-#define MV64340_CPU_PROTECT_WINDOW_2_BASE_ADDR 0x1a0
-#define MV64340_CPU_PROTECT_WINDOW_2_SIZE 0x1a8
-#define MV64340_CPU_PROTECT_WINDOW_3_BASE_ADDR 0x1b0
-#define MV64340_CPU_PROTECT_WINDOW_3_SIZE 0x1b8
-
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define MV64340_CPU_ERROR_ADDR_LOW 0x070
-#define MV64340_CPU_ERROR_ADDR_HIGH 0x078
-#define MV64340_CPU_ERROR_DATA_LOW 0x128
-#define MV64340_CPU_ERROR_DATA_HIGH 0x130
-#define MV64340_CPU_ERROR_PARITY 0x138
-#define MV64340_CPU_ERROR_CAUSE 0x140
-#define MV64340_CPU_ERROR_MASK 0x148
-
-/****************************************/
-/* CPU Interface Debug Registers */
-/****************************************/
-
-#define MV64340_PUNIT_SLAVE_DEBUG_LOW 0x360
-#define MV64340_PUNIT_SLAVE_DEBUG_HIGH 0x368
-#define MV64340_PUNIT_MASTER_DEBUG_LOW 0x370
-#define MV64340_PUNIT_MASTER_DEBUG_HIGH 0x378
-#define MV64340_PUNIT_MMASK 0x3e4
-
-/****************************************/
-/* Integrated SRAM Registers */
-/****************************************/
-
-#define MV64340_SRAM_CONFIG 0x380
-#define MV64340_SRAM_TEST_MODE 0X3F4
-#define MV64340_SRAM_ERROR_CAUSE 0x388
-#define MV64340_SRAM_ERROR_ADDR 0x390
-#define MV64340_SRAM_ERROR_ADDR_HIGH 0X3F8
-#define MV64340_SRAM_ERROR_DATA_LOW 0x398
-#define MV64340_SRAM_ERROR_DATA_HIGH 0x3a0
-#define MV64340_SRAM_ERROR_DATA_PARITY 0x3a8
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-
-#define MV64340_SDRAM_CONFIG 0x1400
-#define MV64340_D_UNIT_CONTROL_LOW 0x1404
-#define MV64340_D_UNIT_CONTROL_HIGH 0x1424
-#define MV64340_SDRAM_TIMING_CONTROL_LOW 0x1408
-#define MV64340_SDRAM_TIMING_CONTROL_HIGH 0x140c
-#define MV64340_SDRAM_ADDR_CONTROL 0x1410
-#define MV64340_SDRAM_OPEN_PAGES_CONTROL 0x1414
-#define MV64340_SDRAM_OPERATION 0x1418
-#define MV64340_SDRAM_MODE 0x141c
-#define MV64340_EXTENDED_DRAM_MODE 0x1420
-#define MV64340_SDRAM_CROSS_BAR_CONTROL_LOW 0x1430
-#define MV64340_SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434
-#define MV64340_SDRAM_CROSS_BAR_TIMEOUT 0x1438
-#define MV64340_SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0
-#define MV64340_SDRAM_DATA_PADS_CALIBRATION 0x14c4
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-
-#define MV64340_SDRAM_ERROR_DATA_LOW 0x1444
-#define MV64340_SDRAM_ERROR_DATA_HIGH 0x1440
-#define MV64340_SDRAM_ERROR_ADDR 0x1450
-#define MV64340_SDRAM_RECEIVED_ECC 0x1448
-#define MV64340_SDRAM_CALCULATED_ECC 0x144c
-#define MV64340_SDRAM_ECC_CONTROL 0x1454
-#define MV64340_SDRAM_ECC_ERROR_COUNTER 0x1458
-
-/******************************************/
-/* Controlled Delay Line (CDL) Registers */
-/******************************************/
-
-#define MV64340_DFCDL_CONFIG0 0x1480
-#define MV64340_DFCDL_CONFIG1 0x1484
-#define MV64340_DLL_WRITE 0x1488
-#define MV64340_DLL_READ 0x148c
-#define MV64340_SRAM_ADDR 0x1490
-#define MV64340_SRAM_DATA0 0x1494
-#define MV64340_SRAM_DATA1 0x1498
-#define MV64340_SRAM_DATA2 0x149c
-#define MV64340_DFCL_PROBE 0x14a0
-
-/******************************************/
-/* Debug Registers */
-/******************************************/
-
-#define MV64340_DUNIT_DEBUG_LOW 0x1460
-#define MV64340_DUNIT_DEBUG_HIGH 0x1464
-#define MV64340_DUNIT_MMASK 0X1b40
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define MV64340_DEVICE_BANK0_PARAMETERS 0x45c
-#define MV64340_DEVICE_BANK1_PARAMETERS 0x460
-#define MV64340_DEVICE_BANK2_PARAMETERS 0x464
-#define MV64340_DEVICE_BANK3_PARAMETERS 0x468
-#define MV64340_DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define MV64340_DEVICE_INTERFACE_CONTROL 0x4c0
-#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define MV64340_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT 0x4c4
-
-/****************************************/
-/* Device interrupt registers */
-/****************************************/
-
-#define MV64340_DEVICE_INTERRUPT_CAUSE 0x4d0
-#define MV64340_DEVICE_INTERRUPT_MASK 0x4d4
-#define MV64340_DEVICE_ERROR_ADDR 0x4d8
-#define MV64340_DEVICE_ERROR_DATA 0x4dc
-#define MV64340_DEVICE_ERROR_PARITY 0x4e0
-
-/****************************************/
-/* Device debug registers */
-/****************************************/
-
-#define MV64340_DEVICE_DEBUG_LOW 0x4e4
-#define MV64340_DEVICE_DEBUG_HIGH 0x4e8
-#define MV64340_RUNIT_MMASK 0x4f0
-
-/****************************************/
-/* PCI Slave Address Decoding registers */
-/****************************************/
-
-#define MV64340_PCI_0_CS_0_BANK_SIZE 0xc08
-#define MV64340_PCI_1_CS_0_BANK_SIZE 0xc88
-#define MV64340_PCI_0_CS_1_BANK_SIZE 0xd08
-#define MV64340_PCI_1_CS_1_BANK_SIZE 0xd88
-#define MV64340_PCI_0_CS_2_BANK_SIZE 0xc0c
-#define MV64340_PCI_1_CS_2_BANK_SIZE 0xc8c
-#define MV64340_PCI_0_CS_3_BANK_SIZE 0xd0c
-#define MV64340_PCI_1_CS_3_BANK_SIZE 0xd8c
-#define MV64340_PCI_0_DEVCS_0_BANK_SIZE 0xc10
-#define MV64340_PCI_1_DEVCS_0_BANK_SIZE 0xc90
-#define MV64340_PCI_0_DEVCS_1_BANK_SIZE 0xd10
-#define MV64340_PCI_1_DEVCS_1_BANK_SIZE 0xd90
-#define MV64340_PCI_0_DEVCS_2_BANK_SIZE 0xd18
-#define MV64340_PCI_1_DEVCS_2_BANK_SIZE 0xd98
-#define MV64340_PCI_0_DEVCS_3_BANK_SIZE 0xc14
-#define MV64340_PCI_1_DEVCS_3_BANK_SIZE 0xc94
-#define MV64340_PCI_0_DEVCS_BOOT_BANK_SIZE 0xd14
-#define MV64340_PCI_1_DEVCS_BOOT_BANK_SIZE 0xd94
-#define MV64340_PCI_0_P2P_MEM0_BAR_SIZE 0xd1c
-#define MV64340_PCI_1_P2P_MEM0_BAR_SIZE 0xd9c
-#define MV64340_PCI_0_P2P_MEM1_BAR_SIZE 0xd20
-#define MV64340_PCI_1_P2P_MEM1_BAR_SIZE 0xda0
-#define MV64340_PCI_0_P2P_I_O_BAR_SIZE 0xd24
-#define MV64340_PCI_1_P2P_I_O_BAR_SIZE 0xda4
-#define MV64340_PCI_0_CPU_BAR_SIZE 0xd28
-#define MV64340_PCI_1_CPU_BAR_SIZE 0xda8
-#define MV64340_PCI_0_INTERNAL_SRAM_BAR_SIZE 0xe00
-#define MV64340_PCI_1_INTERNAL_SRAM_BAR_SIZE 0xe80
-#define MV64340_PCI_0_EXPANSION_ROM_BAR_SIZE 0xd2c
-#define MV64340_PCI_1_EXPANSION_ROM_BAR_SIZE 0xd9c
-#define MV64340_PCI_0_BASE_ADDR_REG_ENABLE 0xc3c
-#define MV64340_PCI_1_BASE_ADDR_REG_ENABLE 0xcbc
-#define MV64340_PCI_0_CS_0_BASE_ADDR_REMAP 0xc48
-#define MV64340_PCI_1_CS_0_BASE_ADDR_REMAP 0xcc8
-#define MV64340_PCI_0_CS_1_BASE_ADDR_REMAP 0xd48
-#define MV64340_PCI_1_CS_1_BASE_ADDR_REMAP 0xdc8
-#define MV64340_PCI_0_CS_2_BASE_ADDR_REMAP 0xc4c
-#define MV64340_PCI_1_CS_2_BASE_ADDR_REMAP 0xccc
-#define MV64340_PCI_0_CS_3_BASE_ADDR_REMAP 0xd4c
-#define MV64340_PCI_1_CS_3_BASE_ADDR_REMAP 0xdcc
-#define MV64340_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP 0xF04
-#define MV64340_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP 0xF84
-#define MV64340_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP 0xF08
-#define MV64340_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP 0xF88
-#define MV64340_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP 0xF0C
-#define MV64340_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP 0xF8C
-#define MV64340_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP 0xF10
-#define MV64340_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP 0xF90
-#define MV64340_PCI_0_DEVCS_0_BASE_ADDR_REMAP 0xc50
-#define MV64340_PCI_1_DEVCS_0_BASE_ADDR_REMAP 0xcd0
-#define MV64340_PCI_0_DEVCS_1_BASE_ADDR_REMAP 0xd50
-#define MV64340_PCI_1_DEVCS_1_BASE_ADDR_REMAP 0xdd0
-#define MV64340_PCI_0_DEVCS_2_BASE_ADDR_REMAP 0xd58
-#define MV64340_PCI_1_DEVCS_2_BASE_ADDR_REMAP 0xdd8
-#define MV64340_PCI_0_DEVCS_3_BASE_ADDR_REMAP 0xc54
-#define MV64340_PCI_1_DEVCS_3_BASE_ADDR_REMAP 0xcd4
-#define MV64340_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xd54
-#define MV64340_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xdd4
-#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xd5c
-#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xddc
-#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xd60
-#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xde0
-#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xd64
-#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xde4
-#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xd68
-#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xde8
-#define MV64340_PCI_0_P2P_I_O_BASE_ADDR_REMAP 0xd6c
-#define MV64340_PCI_1_P2P_I_O_BASE_ADDR_REMAP 0xdec
-#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_LOW 0xd70
-#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_LOW 0xdf0
-#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74
-#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4
-#define MV64340_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf00
-#define MV64340_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80
-#define MV64340_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP 0xf38
-#define MV64340_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP 0xfb8
-#define MV64340_PCI_0_ADDR_DECODE_CONTROL 0xd3c
-#define MV64340_PCI_1_ADDR_DECODE_CONTROL 0xdbc
-#define MV64340_PCI_0_HEADERS_RETARGET_CONTROL 0xF40
-#define MV64340_PCI_1_HEADERS_RETARGET_CONTROL 0xFc0
-#define MV64340_PCI_0_HEADERS_RETARGET_BASE 0xF44
-#define MV64340_PCI_1_HEADERS_RETARGET_BASE 0xFc4
-#define MV64340_PCI_0_HEADERS_RETARGET_HIGH 0xF48
-#define MV64340_PCI_1_HEADERS_RETARGET_HIGH 0xFc8
-
-/***********************************/
-/* PCI Control Register Map */
-/***********************************/
-
-#define MV64340_PCI_0_DLL_STATUS_AND_COMMAND 0x1d20
-#define MV64340_PCI_1_DLL_STATUS_AND_COMMAND 0x1da0
-#define MV64340_PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C
-#define MV64340_PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C
-#define MV64340_PCI_0_COMMAND 0xc00
-#define MV64340_PCI_1_COMMAND 0xc80
-#define MV64340_PCI_0_MODE 0xd00
-#define MV64340_PCI_1_MODE 0xd80
-#define MV64340_PCI_0_RETRY 0xc04
-#define MV64340_PCI_1_RETRY 0xc84
-#define MV64340_PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04
-#define MV64340_PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84
-#define MV64340_PCI_0_MSI_TRIGGER_TIMER 0xc38
-#define MV64340_PCI_1_MSI_TRIGGER_TIMER 0xcb8
-#define MV64340_PCI_0_ARBITER_CONTROL 0x1d00
-#define MV64340_PCI_1_ARBITER_CONTROL 0x1d80
-#define MV64340_PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08
-#define MV64340_PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88
-#define MV64340_PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define MV64340_PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define MV64340_PCI_0_CROSS_BAR_TIMEOUT 0x1d04
-#define MV64340_PCI_1_CROSS_BAR_TIMEOUT 0x1d84
-#define MV64340_PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18
-#define MV64340_PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98
-#define MV64340_PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10
-#define MV64340_PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90
-#define MV64340_PCI_0_P2P_CONFIG 0x1d14
-#define MV64340_PCI_1_P2P_CONFIG 0x1d94
-
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58
-
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8
-
-/****************************************/
-/* PCI Configuration Access Registers */
-/****************************************/
-
-#define MV64340_PCI_0_CONFIG_ADDR 0xcf8
-#define MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc
-#define MV64340_PCI_1_CONFIG_ADDR 0xc78
-#define MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c
-#define MV64340_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34
-#define MV64340_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4
-
-/****************************************/
-/* PCI Error Report Registers */
-/****************************************/
-
-#define MV64340_PCI_0_SERR_MASK 0xc28
-#define MV64340_PCI_1_SERR_MASK 0xca8
-#define MV64340_PCI_0_ERROR_ADDR_LOW 0x1d40
-#define MV64340_PCI_1_ERROR_ADDR_LOW 0x1dc0
-#define MV64340_PCI_0_ERROR_ADDR_HIGH 0x1d44
-#define MV64340_PCI_1_ERROR_ADDR_HIGH 0x1dc4
-#define MV64340_PCI_0_ERROR_ATTRIBUTE 0x1d48
-#define MV64340_PCI_1_ERROR_ATTRIBUTE 0x1dc8
-#define MV64340_PCI_0_ERROR_COMMAND 0x1d50
-#define MV64340_PCI_1_ERROR_COMMAND 0x1dd0
-#define MV64340_PCI_0_ERROR_CAUSE 0x1d58
-#define MV64340_PCI_1_ERROR_CAUSE 0x1dd8
-#define MV64340_PCI_0_ERROR_MASK 0x1d5c
-#define MV64340_PCI_1_ERROR_MASK 0x1ddc
-
-/****************************************/
-/* PCI Debug Registers */
-/****************************************/
-
-#define MV64340_PCI_0_MMASK 0X1D24
-#define MV64340_PCI_1_MMASK 0X1DA4
-
-/*********************************************/
-/* PCI Configuration, Function 0, Registers */
-/*********************************************/
-
-#define MV64340_PCI_DEVICE_AND_VENDOR_ID 0x000
-#define MV64340_PCI_STATUS_AND_COMMAND 0x004
-#define MV64340_PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define MV64340_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-
-#define MV64340_PCI_SCS_0_BASE_ADDR_LOW 0x010
-#define MV64340_PCI_SCS_0_BASE_ADDR_HIGH 0x014
-#define MV64340_PCI_SCS_1_BASE_ADDR_LOW 0x018
-#define MV64340_PCI_SCS_1_BASE_ADDR_HIGH 0x01C
-#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020
-#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024
-#define MV64340_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c
-#define MV64340_PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030
-#define MV64340_PCI_CAPABILTY_LIST_POINTER 0x034
-#define MV64340_PCI_INTERRUPT_PIN_AND_LINE 0x03C
- /* capability list */
-#define MV64340_PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define MV64340_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define MV64340_PCI_VPD_ADDR 0x048
-#define MV64340_PCI_VPD_DATA 0x04c
-#define MV64340_PCI_MSI_MESSAGE_CONTROL 0x050
-#define MV64340_PCI_MSI_MESSAGE_ADDR 0x054
-#define MV64340_PCI_MSI_MESSAGE_UPPER_ADDR 0x058
-#define MV64340_PCI_MSI_MESSAGE_DATA 0x05c
-#define MV64340_PCI_X_COMMAND 0x060
-#define MV64340_PCI_X_STATUS 0x064
-#define MV64340_PCI_COMPACT_PCI_HOT_SWAP 0x068
-
-/***********************************************/
-/* PCI Configuration, Function 1, Registers */
-/***********************************************/
-
-#define MV64340_PCI_SCS_2_BASE_ADDR_LOW 0x110
-#define MV64340_PCI_SCS_2_BASE_ADDR_HIGH 0x114
-#define MV64340_PCI_SCS_3_BASE_ADDR_LOW 0x118
-#define MV64340_PCI_SCS_3_BASE_ADDR_HIGH 0x11c
-#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120
-#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124
-
-/***********************************************/
-/* PCI Configuration, Function 2, Registers */
-/***********************************************/
-
-#define MV64340_PCI_DEVCS_0_BASE_ADDR_LOW 0x210
-#define MV64340_PCI_DEVCS_0_BASE_ADDR_HIGH 0x214
-#define MV64340_PCI_DEVCS_1_BASE_ADDR_LOW 0x218
-#define MV64340_PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c
-#define MV64340_PCI_DEVCS_2_BASE_ADDR_LOW 0x220
-#define MV64340_PCI_DEVCS_2_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 3, Registers */
-/***********************************************/
-
-#define MV64340_PCI_DEVCS_3_BASE_ADDR_LOW 0x310
-#define MV64340_PCI_DEVCS_3_BASE_ADDR_HIGH 0x314
-#define MV64340_PCI_BOOT_CS_BASE_ADDR_LOW 0x318
-#define MV64340_PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c
-#define MV64340_PCI_CPU_BASE_ADDR_LOW 0x220
-#define MV64340_PCI_CPU_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 4, Registers */
-/***********************************************/
-
-#define MV64340_PCI_P2P_MEM0_BASE_ADDR_LOW 0x410
-#define MV64340_PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414
-#define MV64340_PCI_P2P_MEM1_BASE_ADDR_LOW 0x418
-#define MV64340_PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c
-#define MV64340_PCI_P2P_I_O_BASE_ADDR 0x420
-#define MV64340_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424
-
-/****************************************/
-/* Messaging Unit Registers (I20) */
-/****************************************/
-
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044
-#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC
-
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4
-#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C
-
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44
-#define MV64340_I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4
-#define MV64340_I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define MV64340_ETH_PHY_ADDR_REG 0x2000
-#define MV64340_ETH_SMI_REG 0x2004
-#define MV64340_ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define MV64340_ETH_UNIT_DEFAULTID_REG 0x200c
-#define MV64340_ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define MV64340_ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define MV64340_ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define MV64340_ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define MV64340_ETH_BAR_0 0x2200
-#define MV64340_ETH_BAR_1 0x2208
-#define MV64340_ETH_BAR_2 0x2210
-#define MV64340_ETH_BAR_3 0x2218
-#define MV64340_ETH_BAR_4 0x2220
-#define MV64340_ETH_BAR_5 0x2228
-#define MV64340_ETH_SIZE_REG_0 0x2204
-#define MV64340_ETH_SIZE_REG_1 0x220c
-#define MV64340_ETH_SIZE_REG_2 0x2214
-#define MV64340_ETH_SIZE_REG_3 0x221c
-#define MV64340_ETH_SIZE_REG_4 0x2224
-#define MV64340_ETH_SIZE_REG_5 0x222c
-#define MV64340_ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define MV64340_ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define MV64340_ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define MV64340_ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define MV64340_ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define MV64340_ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define MV64340_ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define MV64340_ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define MV64340_ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define MV64340_ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define MV64340_ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define MV64340_ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define MV64340_ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define MV64340_ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define MV64340_ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define MV64340_ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define MV64340_ETH_DSCP_3(port) (0x242c + (port<<10))
-#define MV64340_ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define MV64340_ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define MV64340_ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define MV64340_ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define MV64340_ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define MV64340_ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define MV64340_ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define MV64340_ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define MV64340_ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define MV64340_ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define MV64340_ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define MV64340_ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define MV64340_ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define MV64340_ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define MV64340_ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define MV64340_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define MV64340_ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define MV64340_ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define MV64340_ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define MV64340_ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define MV64340_ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define MV64340_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define MV64340_ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define MV64340_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define MV64340_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-/*******************************************/
-/* CUNIT Registers */
-/*******************************************/
-
- /* Address Decoding Register Map */
-
-#define MV64340_CUNIT_BASE_ADDR_REG0 0xf200
-#define MV64340_CUNIT_BASE_ADDR_REG1 0xf208
-#define MV64340_CUNIT_BASE_ADDR_REG2 0xf210
-#define MV64340_CUNIT_BASE_ADDR_REG3 0xf218
-#define MV64340_CUNIT_SIZE0 0xf204
-#define MV64340_CUNIT_SIZE1 0xf20c
-#define MV64340_CUNIT_SIZE2 0xf214
-#define MV64340_CUNIT_SIZE3 0xf21c
-#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG0 0xf240
-#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG1 0xf244
-#define MV64340_CUNIT_BASE_ADDR_ENABLE_REG 0xf250
-#define MV64340_MPSC0_ACCESS_PROTECTION_REG 0xf254
-#define MV64340_MPSC1_ACCESS_PROTECTION_REG 0xf258
-#define MV64340_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C
-
- /* Error Report Registers */
-
-#define MV64340_CUNIT_INTERRUPT_CAUSE_REG 0xf310
-#define MV64340_CUNIT_INTERRUPT_MASK_REG 0xf314
-#define MV64340_CUNIT_ERROR_ADDR 0xf318
-
- /* Cunit Control Registers */
-
-#define MV64340_CUNIT_ARBITER_CONTROL_REG 0xf300
-#define MV64340_CUNIT_CONFIG_REG 0xb40c
-#define MV64340_CUNIT_CRROSBAR_TIMEOUT_REG 0xf304
-
- /* Cunit Debug Registers */
-
-#define MV64340_CUNIT_DEBUG_LOW 0xf340
-#define MV64340_CUNIT_DEBUG_HIGH 0xf344
-#define MV64340_CUNIT_MMASK 0xf380
-
- /* MPSCs Clocks Routing Registers */
-
-#define MV64340_MPSC_ROUTING_REG 0xb400
-#define MV64340_MPSC_RX_CLOCK_ROUTING_REG 0xb404
-#define MV64340_MPSC_TX_CLOCK_ROUTING_REG 0xb408
-
- /* MPSCs Interrupts Registers */
-
-#define MV64340_MPSC_CAUSE_REG(port) (0xb804 + (port<<3))
-#define MV64340_MPSC_MASK_REG(port) (0xb884 + (port<<3))
-
-#define MV64340_MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12))
-#define MV64340_MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12))
-#define MV64340_MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG1(port) (0x800c + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG5(port) (0x801c + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG9(port) (0x802c + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12))
-
- /* MPSC0 Registers */
-
-
-/***************************************/
-/* SDMA Registers */
-/***************************************/
-
-#define MV64340_SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13))
-#define MV64340_SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13))
-#define MV64340_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13))
-#define MV64340_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13))
-#define MV64340_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13))
-
-#define MV64340_SDMA_CAUSE_REG 0xb800
-#define MV64340_SDMA_MASK_REG 0xb880
-
-/* BRG Interrupts */
-
-#define MV64340_BRG_CONFIG_REG(brg) (0xb200 + (brg<<3))
-#define MV64340_BRG_BAUDE_TUNING_REG(brg) (0xb208 + (brg<<3))
-#define MV64340_BRG_CAUSE_REG 0xb834
-#define MV64340_BRG_MASK_REG 0xb8b4
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define MV64340_DMA_CHANNEL0_CONTROL 0x840
-#define MV64340_DMA_CHANNEL0_CONTROL_HIGH 0x880
-#define MV64340_DMA_CHANNEL1_CONTROL 0x844
-#define MV64340_DMA_CHANNEL1_CONTROL_HIGH 0x884
-#define MV64340_DMA_CHANNEL2_CONTROL 0x848
-#define MV64340_DMA_CHANNEL2_CONTROL_HIGH 0x888
-#define MV64340_DMA_CHANNEL3_CONTROL 0x84C
-#define MV64340_DMA_CHANNEL3_CONTROL_HIGH 0x88C
-
-
-/****************************************/
-/* IDMA Registers */
-/****************************************/
-
-#define MV64340_DMA_CHANNEL0_BYTE_COUNT 0x800
-#define MV64340_DMA_CHANNEL1_BYTE_COUNT 0x804
-#define MV64340_DMA_CHANNEL2_BYTE_COUNT 0x808
-#define MV64340_DMA_CHANNEL3_BYTE_COUNT 0x80C
-#define MV64340_DMA_CHANNEL0_SOURCE_ADDR 0x810
-#define MV64340_DMA_CHANNEL1_SOURCE_ADDR 0x814
-#define MV64340_DMA_CHANNEL2_SOURCE_ADDR 0x818
-#define MV64340_DMA_CHANNEL3_SOURCE_ADDR 0x81c
-#define MV64340_DMA_CHANNEL0_DESTINATION_ADDR 0x820
-#define MV64340_DMA_CHANNEL1_DESTINATION_ADDR 0x824
-#define MV64340_DMA_CHANNEL2_DESTINATION_ADDR 0x828
-#define MV64340_DMA_CHANNEL3_DESTINATION_ADDR 0x82C
-#define MV64340_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER 0x830
-#define MV64340_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER 0x834
-#define MV64340_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER 0x838
-#define MV64340_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER 0x83C
-#define MV64340_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER 0x870
-#define MV64340_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER 0x874
-#define MV64340_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER 0x878
-#define MV64340_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER 0x87C
-
- /* IDMA Address Decoding Base Address Registers */
-
-#define MV64340_DMA_BASE_ADDR_REG0 0xa00
-#define MV64340_DMA_BASE_ADDR_REG1 0xa08
-#define MV64340_DMA_BASE_ADDR_REG2 0xa10
-#define MV64340_DMA_BASE_ADDR_REG3 0xa18
-#define MV64340_DMA_BASE_ADDR_REG4 0xa20
-#define MV64340_DMA_BASE_ADDR_REG5 0xa28
-#define MV64340_DMA_BASE_ADDR_REG6 0xa30
-#define MV64340_DMA_BASE_ADDR_REG7 0xa38
-
- /* IDMA Address Decoding Size Address Register */
-
-#define MV64340_DMA_SIZE_REG0 0xa04
-#define MV64340_DMA_SIZE_REG1 0xa0c
-#define MV64340_DMA_SIZE_REG2 0xa14
-#define MV64340_DMA_SIZE_REG3 0xa1c
-#define MV64340_DMA_SIZE_REG4 0xa24
-#define MV64340_DMA_SIZE_REG5 0xa2c
-#define MV64340_DMA_SIZE_REG6 0xa34
-#define MV64340_DMA_SIZE_REG7 0xa3C
-
- /* IDMA Address Decoding High Address Remap and Access
- Protection Registers */
-
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG0 0xa60
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG1 0xa64
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG2 0xa68
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG3 0xa6C
-#define MV64340_DMA_BASE_ADDR_ENABLE_REG 0xa80
-#define MV64340_DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70
-#define MV64340_DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74
-#define MV64340_DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78
-#define MV64340_DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c
-#define MV64340_DMA_ARBITER_CONTROL 0x860
-#define MV64340_DMA_CROSS_BAR_TIMEOUT 0x8d0
-
- /* IDMA Headers Retarget Registers */
-
-#define MV64340_DMA_HEADERS_RETARGET_CONTROL 0xa84
-#define MV64340_DMA_HEADERS_RETARGET_BASE 0xa88
-
- /* IDMA Interrupt Register */
-
-#define MV64340_DMA_INTERRUPT_CAUSE_REG 0x8c0
-#define MV64340_DMA_INTERRUPT_CAUSE_MASK 0x8c4
-#define MV64340_DMA_ERROR_ADDR 0x8c8
-#define MV64340_DMA_ERROR_SELECT 0x8cc
-
- /* IDMA Debug Register ( for internal use ) */
-
-#define MV64340_DMA_DEBUG_LOW 0x8e0
-#define MV64340_DMA_DEBUG_HIGH 0x8e4
-#define MV64340_DMA_SPARE 0xA8C
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define MV64340_TIMER_COUNTER0 0x850
-#define MV64340_TIMER_COUNTER1 0x854
-#define MV64340_TIMER_COUNTER2 0x858
-#define MV64340_TIMER_COUNTER3 0x85C
-#define MV64340_TIMER_COUNTER_0_3_CONTROL 0x864
-#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-
-/****************************************/
-/* Watchdog registers */
-/****************************************/
-
-#define MV64340_WATCHDOG_CONFIG_REG 0xb410
-#define MV64340_WATCHDOG_VALUE_REG 0xb414
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define MV64340_I2C_SLAVE_ADDR 0xc000
-#define MV64340_I2C_EXTENDED_SLAVE_ADDR 0xc010
-#define MV64340_I2C_DATA 0xc004
-#define MV64340_I2C_CONTROL 0xc008
-#define MV64340_I2C_STATUS_BAUDE_RATE 0xc00C
-#define MV64340_I2C_SOFT_RESET 0xc01c
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define MV64340_GPP_IO_CONTROL 0xf100
-#define MV64340_GPP_LEVEL_CONTROL 0xf110
-#define MV64340_GPP_VALUE 0xf104
-#define MV64340_GPP_INTERRUPT_CAUSE 0xf108
-#define MV64340_GPP_INTERRUPT_MASK0 0xf10c
-#define MV64340_GPP_INTERRUPT_MASK1 0xf114
-#define MV64340_GPP_VALUE_SET 0xf118
-#define MV64340_GPP_VALUE_CLEAR 0xf11c
-
-/****************************************/
-/* Interrupt Controller Registers */
-/****************************************/
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-
-#define MV64340_MAIN_INTERRUPT_CAUSE_LOW 0x004
-#define MV64340_MAIN_INTERRUPT_CAUSE_HIGH 0x00c
-#define MV64340_CPU_INTERRUPT0_MASK_LOW 0x014
-#define MV64340_CPU_INTERRUPT0_MASK_HIGH 0x01c
-#define MV64340_CPU_INTERRUPT0_SELECT_CAUSE 0x024
-#define MV64340_CPU_INTERRUPT1_MASK_LOW 0x034
-#define MV64340_CPU_INTERRUPT1_MASK_HIGH 0x03c
-#define MV64340_CPU_INTERRUPT1_SELECT_CAUSE 0x044
-#define MV64340_INTERRUPT0_MASK_0_LOW 0x054
-#define MV64340_INTERRUPT0_MASK_0_HIGH 0x05c
-#define MV64340_INTERRUPT0_SELECT_CAUSE 0x064
-#define MV64340_INTERRUPT1_MASK_0_LOW 0x074
-#define MV64340_INTERRUPT1_MASK_0_HIGH 0x07c
-#define MV64340_INTERRUPT1_SELECT_CAUSE 0x084
-
-/****************************************/
-/* MPP Interface Registers */
-/****************************************/
-
-#define MV64340_MPP_CONTROL0 0xf000
-#define MV64340_MPP_CONTROL1 0xf004
-#define MV64340_MPP_CONTROL2 0xf008
-#define MV64340_MPP_CONTROL3 0xf00c
-
-/****************************************/
-/* Serial Initialization registers */
-/****************************************/
-
-#define MV64340_SERIAL_INIT_LAST_DATA 0xf324
-#define MV64340_SERIAL_INIT_CONTROL 0xf328
-#define MV64340_SERIAL_INIT_STATUS 0xf32c
-
-#endif
diff -Nru a/include/asm-mips64/mv64340_dep.h b/include/asm-mips64/mv64340_dep.h
--- a/include/asm-mips64/mv64340_dep.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,51 +0,0 @@
-/*
- * Copyright 2002 Momentum Computer Inc.
- * Author: Matthew Dharm <mdharm@momenco.com>
- *
- * include/asm-mips/mv64340-dep.h
- * Board-dependent definitions for MV-64340 chip.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __MV64340_DEP_H__
-#define __MV64340_DEP_H__
-
-#include <asm/addrspace.h> /* for KSEG1ADDR() */
-#include <asm/byteorder.h> /* for cpu_to_le32() */
-
-extern unsigned long mv64340_base;
-
-#define MV64340_BASE (mv64340_base)
-
-/*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the
- * bytes when running bigendian.
- */
-
-#define MV_WRITE(ofs, data) \
- *(volatile u32 *)(MV64340_BASE+(ofs)) = cpu_to_le32(data)
-#define MV_READ(ofs, data) \
- *(data) = le32_to_cpu(*(volatile u32 *)(MV64340_BASE+(ofs)))
-#define MV_READ_DATA(ofs) \
- le32_to_cpu(*(volatile u32 *)(MV64340_BASE+(ofs)))
-
-#define MV_WRITE_16(ofs, data) \
- *(volatile u16 *)(MV64340_BASE+(ofs)) = cpu_to_le16(data)
-#define MV_READ_16(ofs, data) \
- *(data) = le16_to_cpu(*(volatile u16 *)(MV64340_BASE+(ofs)))
-
-#define MV_WRITE_8(ofs, data) \
- *(volatile u8 *)(MV64340_BASE+(ofs)) = data
-#define MV_READ_8(ofs, data) \
- *(data) = *(volatile u8 *)(MV64340_BASE+(ofs))
-
-#define MV_SET_REG_BITS(ofs,bits) \
- (*((volatile u32 *)(MV64340_BASE+(ofs)))) |= ((u32)cpu_to_le32(bits))
-#define MV_RESET_REG_BITS(ofs,bits) \
- (*((volatile u32 *)(MV64340_BASE+(ofs)))) &= ~((u32)cpu_to_le32(bits))
-
-#endif
diff -Nru a/include/asm-mips64/namei.h b/include/asm-mips64/namei.h
--- a/include/asm-mips64/namei.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,17 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_NAMEI_H
-#define _ASM_NAMEI_H
-
-/*
- * This dummy routine maybe changed to something useful
- * for /usr/gnemul/ emulation stuff.
- * Look at asm-sparc/namei.h for details.
- */
-
-#define __emul_prefix() NULL
-
-#endif /* _ASM_NAMEI_H */
diff -Nru a/include/asm-mips64/ng1.h b/include/asm-mips64/ng1.h
--- a/include/asm-mips64/ng1.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,55 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI/Newport video card ioctl definitions
- */
-#ifndef _ASM_NG1_H
-#define _ASM_NG1_H
-
-typedef struct {
- int flags;
- __u16 w, h;
- __u16 fields_sec;
-} ng1_vof_info_t;
-
-struct ng1_info {
- struct gfx_info gfx_info;
- __u8 boardrev;
- __u8 rex3rev;
- __u8 vc2rev;
- __u8 monitortype;
- __u8 videoinstalled;
- __u8 mcrev;
- __u8 bitplanes;
- __u8 xmap9rev;
- __u8 cmaprev;
- ng1_vof_info_t ng1_vof_info;
- __u8 bt445rev;
- __u8 paneltype;
-};
-
-#define GFX_NAME_NEWPORT "NG1"
-
-/* ioctls */
-#define NG1_SET_CURSOR_HOTSPOT 21001
-struct ng1_set_cursor_hotspot {
- unsigned short xhot;
- unsigned short yhot;
-};
-
-#define NG1_SETDISPLAYMODE 21006
-struct ng1_setdisplaymode_args {
- int wid;
- unsigned int mode;
-};
-
-#define NG1_SETGAMMARAMP0 21007
-struct ng1_setgammaramp_args {
- unsigned char red [256];
- unsigned char green [256];
- unsigned char blue [256];
-};
-
-#endif /* _ASM_NG1_H */
diff -Nru a/include/asm-mips64/paccess.h b/include/asm-mips64/paccess.h
--- a/include/asm-mips64/paccess.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,99 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- *
- * Protected memory access. Used for everything that might take revenge
- * by sending a DBE error like accessing possibly non-existant memory or
- * devices.
- */
-#ifndef _ASM_PACCESS_H
-#define _ASM_PACCESS_H
-
-#include <linux/errno.h>
-
-extern asmlinkage void handle_ibe(void);
-extern asmlinkage void handle_dbe(void);
-
-#define put_dbe(x,ptr) __put_dbe((x),(ptr),sizeof(*(ptr)))
-#define get_dbe(x,ptr) __get_dbe((x),(ptr),sizeof(*(ptr)))
-
-struct __large_pstruct { unsigned long buf[100]; };
-#define __mp(x) (*(struct __large_pstruct *)(x))
-
-#define __get_dbe(x,ptr,size) ({ \
-long __gu_err; \
-__typeof(*(ptr)) __gu_val; \
-long __gu_addr; \
-__asm__("":"=r" (__gu_val)); \
-__gu_addr = (long) (ptr); \
-__asm__("":"=r" (__gu_err)); \
-switch (size) { \
-case 1: __get_dbe_asm("lb"); break; \
-case 2: __get_dbe_asm("lh"); break; \
-case 4: __get_dbe_asm("lw"); break; \
-case 8: __get_dbe_asm("ld"); break; \
-default: __get_dbe_unknown(); break; \
-} x = (__typeof__(*(ptr))) __gu_val; __gu_err; })
-
-#define __get_dbe_asm(insn) \
-({ \
-__asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "move\t%1,$0\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__dbe_table,\"a\"\n\t" \
- ".dword\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__mp(__gu_addr)), "i" (-EFAULT)); })
-
-extern void __get_dbe_unknown(void);
-
-#define __put_dbe(x,ptr,size) ({ \
-long __pu_err; \
-__typeof__(*(ptr)) __pu_val; \
-long __pu_addr; \
-__pu_val = (x); \
-__pu_addr = (long) (ptr); \
-__asm__("":"=r" (__pu_err)); \
-switch (size) { \
-case 1: __put_dbe_asm("sb"); break; \
-case 2: __put_dbe_asm("sh"); break; \
-case 4: __put_dbe_asm("sw"); break; \
-case 8: __put_dbe_asm("sd"); break; \
-default: __put_dbe_unknown(); break; \
-} __pu_err; })
-
-#define __put_dbe_asm(insn) \
-({ \
-__asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__dbe_table,\"a\"\n\t" \
- ".dword\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); })
-
-extern void __put_dbe_unknown(void);
-
-extern asmlinkage void handle_ibe(void);
-extern asmlinkage void handle_dbe(void);
-
-extern unsigned long search_dbe_table(unsigned long addr);
-
-#endif /* _ASM_PACCESS_H */
diff -Nru a/include/asm-mips64/page.h b/include/asm-mips64/page.h
--- a/include/asm-mips64/page.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,129 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_PAGE_H
-#define _ASM_PAGE_H
-
-#include <linux/config.h>
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT 12
-#define PAGE_SIZE (1UL << PAGE_SHIFT)
-#define PAGE_MASK (~(PAGE_SIZE-1))
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-
-extern void (*_clear_page)(void * page);
-extern void (*_copy_page)(void * to, void * from);
-
-#define clear_page(page) _clear_page((void *)(page))
-#define copy_page(to, from) _copy_page((void *)(to), (void *)(from))
-
-extern unsigned long shm_align_mask;
-
-static inline unsigned long pages_do_alias(unsigned long addr1,
- unsigned long addr2)
-{
- return (addr1 ^ addr2) & shm_align_mask;
-}
-
-struct page;
-
-static inline void clear_user_page(void *addr, unsigned long vaddr,
- struct page *page)
-{
- extern void (*flush_data_cache_page)(unsigned long addr);
-
- clear_page(addr);
- if (pages_do_alias((unsigned long) addr, vaddr))
- flush_data_cache_page((unsigned long)addr);
-}
-
-static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
- struct page *to)
-{
- extern void (*flush_data_cache_page)(unsigned long addr);
-
- copy_page(vto, vfrom);
- if (pages_do_alias((unsigned long)vto, vaddr))
- flush_data_cache_page((unsigned long)vto);
-}
-
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-
-#define pte_val(x) ((x).pte)
-#define pmd_val(x) ((x).pmd)
-#define pgd_val(x) ((x).pgd)
-#define pgprot_val(x) ((x).pgprot)
-
-#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
-
-#define __pte(x) ((pte_t) { (x) } )
-#define __pmd(x) ((pmd_t) { (x) } )
-#define __pgd(x) ((pgd_t) { (x) } )
-#define __pgprot(x) ((pgprot_t) { (x) } )
-
-/* Pure 2^n version of get_order */
-extern __inline__ int get_order(unsigned long size)
-{
- int order;
-
- size = (size-1) >> (PAGE_SHIFT-1);
- order = -1;
- do {
- size >>= 1;
- order++;
- } while (size);
- return order;
-}
-
-#endif /* !__ASSEMBLY__ */
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
-
-/*
- * This handles the memory map.
- */
-#ifdef CONFIG_NONCOHERENT_IO
-#define PAGE_OFFSET 0x9800000000000000UL
-#else
-#define PAGE_OFFSET 0xa800000000000000UL
-#endif
-
-#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
-#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
-
-#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
-
-#ifndef CONFIG_DISCONTIGMEM
-#define pfn_to_page(pfn) (mem_map + (pfn))
-#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
-#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-
-#define pfn_valid(pfn) ((pfn) < max_mapnr)
-#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-#endif
-
-#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
- VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
-
-#endif /* defined (__KERNEL__) */
-
-#endif /* _ASM_PAGE_H */
diff -Nru a/include/asm-mips64/param.h b/include/asm-mips64/param.h
--- a/include/asm-mips64/param.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,46 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright 1994 - 2000, 2002 Ralf Baechle (ralf@gnu.org)
- * Copyright 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_PARAM_H
-#define _ASM_PARAM_H
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-
-#ifdef CONFIG_DECSTATION
- /*
- * log2(HZ), change this here if you want another HZ value. This is also
- * used in dec_time_init. Minimum is 1, Maximum is 15.
- */
-# define LOG_2_HZ 7
-# define HZ (1 << LOG_2_HZ)
-#else
-# define HZ 1000 /* Internal kernel timer frequency */
-#endif
-# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
-# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE 4096
-
-#ifndef NGROUPS
-#define NGROUPS 32
-#endif
-
-#ifndef NOGROUP
-#define NOGROUP (-1)
-#endif
-
-#define MAXHOSTNAMELEN 64 /* max length of hostname */
-
-#endif /* _ASM_PARAM_H */
diff -Nru a/include/asm-mips64/parport.h b/include/asm-mips64/parport.h
--- a/include/asm-mips64/parport.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
- *
- * This file should only be included by drivers/parport/parport_pc.c.
- */
-#ifndef _ASM_PARPORT_H
-#define _ASM_PARPORT_H
-
-static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
-static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
-{
- return parport_pc_find_isa_ports (autoirq, autodma);
-}
-
-#endif /* _ASM_PARPORT_H */
diff -Nru a/include/asm-mips64/pci/bridge.h b/include/asm-mips64/pci/bridge.h
--- a/include/asm-mips64/pci/bridge.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,837 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * bridge.h - bridge chip header file, derived from IRIX <sys/PCI/bridge.h>,
- * revision 1.76.
- *
- * Copyright (C) 1996, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_PCI_BRIDGE_H
-#define _ASM_PCI_BRIDGE_H
-
-#include <linux/types.h>
-#include <asm/xtalk/xwidget.h> /* generic widget header */
-
-/* I/O page size */
-
-#define IOPFNSHIFT 12 /* 4K per mapped page */
-
-#define IOPGSIZE (1 << IOPFNSHIFT)
-#define IOPG(x) ((x) >> IOPFNSHIFT)
-#define IOPGOFF(x) ((x) & (IOPGSIZE-1))
-
-/* Bridge RAM sizes */
-
-#define BRIDGE_ATE_RAM_SIZE 0x00000400 /* 1kB ATE RAM */
-
-#define BRIDGE_CONFIG_BASE 0x20000
-#define BRIDGE_CONFIG1_BASE 0x28000
-#define BRIDGE_CONFIG_END 0x30000
-#define BRIDGE_CONFIG_SLOT_SIZE 0x1000
-
-#define BRIDGE_SSRAM_512K 0x00080000 /* 512kB */
-#define BRIDGE_SSRAM_128K 0x00020000 /* 128kB */
-#define BRIDGE_SSRAM_64K 0x00010000 /* 64kB */
-#define BRIDGE_SSRAM_0K 0x00000000 /* 0kB */
-
-/* ========================================================================
- * Bridge address map
- */
-
-#ifndef __ASSEMBLY__
-
-/*
- * All accesses to bridge hardware registers must be done
- * using 32-bit loads and stores.
- */
-typedef u32 bridgereg_t;
-
-typedef u64 bridge_ate_t;
-
-/* pointers to bridge ATEs
- * are always "pointer to volatile"
- */
-typedef volatile bridge_ate_t *bridge_ate_p;
-
-/*
- * It is generally preferred that hardware registers on the bridge
- * are located from C code via this structure.
- *
- * Generated from Bridge spec dated 04oct95
- */
-
-typedef volatile struct bridge_s {
- /* Local Registers 0x000000-0x00FFFF */
-
- /* standard widget configuration 0x000000-0x000057 */
- widget_cfg_t b_widget; /* 0x000000 */
-
- /* helper fieldnames for accessing bridge widget */
-
-#define b_wid_id b_widget.w_id
-#define b_wid_stat b_widget.w_status
-#define b_wid_err_upper b_widget.w_err_upper_addr
-#define b_wid_err_lower b_widget.w_err_lower_addr
-#define b_wid_control b_widget.w_control
-#define b_wid_req_timeout b_widget.w_req_timeout
-#define b_wid_int_upper b_widget.w_intdest_upper_addr
-#define b_wid_int_lower b_widget.w_intdest_lower_addr
-#define b_wid_err_cmdword b_widget.w_err_cmd_word
-#define b_wid_llp b_widget.w_llp_cfg
-#define b_wid_tflush b_widget.w_tflush
-
- /* bridge-specific widget configuration 0x000058-0x00007F */
- bridgereg_t _pad_000058;
- bridgereg_t b_wid_aux_err; /* 0x00005C */
- bridgereg_t _pad_000060;
- bridgereg_t b_wid_resp_upper; /* 0x000064 */
- bridgereg_t _pad_000068;
- bridgereg_t b_wid_resp_lower; /* 0x00006C */
- bridgereg_t _pad_000070;
- bridgereg_t b_wid_tst_pin_ctrl; /* 0x000074 */
- bridgereg_t _pad_000078[2];
-
- /* PMU & Map 0x000080-0x00008F */
- bridgereg_t _pad_000080;
- bridgereg_t b_dir_map; /* 0x000084 */
- bridgereg_t _pad_000088[2];
-
- /* SSRAM 0x000090-0x00009F */
- bridgereg_t _pad_000090;
- bridgereg_t b_ram_perr; /* 0x000094 */
- bridgereg_t _pad_000098[2];
-
- /* Arbitration 0x0000A0-0x0000AF */
- bridgereg_t _pad_0000A0;
- bridgereg_t b_arb; /* 0x0000A4 */
- bridgereg_t _pad_0000A8[2];
-
- /* Number In A Can 0x0000B0-0x0000BF */
- bridgereg_t _pad_0000B0;
- bridgereg_t b_nic; /* 0x0000B4 */
- bridgereg_t _pad_0000B8[2];
-
- /* PCI/GIO 0x0000C0-0x0000FF */
- bridgereg_t _pad_0000C0;
- bridgereg_t b_bus_timeout; /* 0x0000C4 */
-#define b_pci_bus_timeout b_bus_timeout
-
- bridgereg_t _pad_0000C8;
- bridgereg_t b_pci_cfg; /* 0x0000CC */
- bridgereg_t _pad_0000D0;
- bridgereg_t b_pci_err_upper; /* 0x0000D4 */
- bridgereg_t _pad_0000D8;
- bridgereg_t b_pci_err_lower; /* 0x0000DC */
- bridgereg_t _pad_0000E0[8];
-#define b_gio_err_lower b_pci_err_lower
-#define b_gio_err_upper b_pci_err_upper
-
- /* Interrupt 0x000100-0x0001FF */
- bridgereg_t _pad_000100;
- bridgereg_t b_int_status; /* 0x000104 */
- bridgereg_t _pad_000108;
- bridgereg_t b_int_enable; /* 0x00010C */
- bridgereg_t _pad_000110;
- bridgereg_t b_int_rst_stat; /* 0x000114 */
- bridgereg_t _pad_000118;
- bridgereg_t b_int_mode; /* 0x00011C */
- bridgereg_t _pad_000120;
- bridgereg_t b_int_device; /* 0x000124 */
- bridgereg_t _pad_000128;
- bridgereg_t b_int_host_err; /* 0x00012C */
-
- struct {
- bridgereg_t __pad; /* 0x0001{30,,,68} */
- bridgereg_t addr; /* 0x0001{34,,,6C} */
- } b_int_addr[8]; /* 0x000130 */
-
- bridgereg_t _pad_000170[36];
-
- /* Device 0x000200-0x0003FF */
- struct {
- bridgereg_t __pad; /* 0x0002{00,,,38} */
- bridgereg_t reg; /* 0x0002{04,,,3C} */
- } b_device[8]; /* 0x000200 */
-
- struct {
- bridgereg_t __pad; /* 0x0002{40,,,78} */
- bridgereg_t reg; /* 0x0002{44,,,7C} */
- } b_wr_req_buf[8]; /* 0x000240 */
-
- struct {
- bridgereg_t __pad; /* 0x0002{80,,,88} */
- bridgereg_t reg; /* 0x0002{84,,,8C} */
- } b_rrb_map[2]; /* 0x000280 */
-#define b_even_resp b_rrb_map[0].reg /* 0x000284 */
-#define b_odd_resp b_rrb_map[1].reg /* 0x00028C */
-
- bridgereg_t _pad_000290;
- bridgereg_t b_resp_status; /* 0x000294 */
- bridgereg_t _pad_000298;
- bridgereg_t b_resp_clear; /* 0x00029C */
-
- bridgereg_t _pad_0002A0[24];
-
- char _pad_000300[0x10000 - 0x000300];
-
- /* Internal Address Translation Entry RAM 0x010000-0x0103FF */
- union {
- bridge_ate_t wr; /* write-only */
- struct {
- bridgereg_t _p_pad;
- bridgereg_t rd; /* read-only */
- } hi;
- } b_int_ate_ram[128];
-
- char _pad_010400[0x11000 - 0x010400];
-
- /* Internal Address Translation Entry RAM LOW 0x011000-0x0113FF */
- struct {
- bridgereg_t _p_pad;
- bridgereg_t rd; /* read-only */
- } b_int_ate_ram_lo[128];
-
- char _pad_011400[0x20000 - 0x011400];
-
- /* PCI Device Configuration Spaces 0x020000-0x027FFF */
- union { /* make all access sizes available. */
- u8 c[0x1000 / 1];
- u16 s[0x1000 / 2];
- u32 l[0x1000 / 4];
- u64 d[0x1000 / 8];
- union {
- u8 c[0x100 / 1];
- u16 s[0x100 / 2];
- u32 l[0x100 / 4];
- u64 d[0x100 / 8];
- } f[8];
- } b_type0_cfg_dev[8]; /* 0x020000 */
-
- /* PCI Type 1 Configuration Space 0x028000-0x028FFF */
- union { /* make all access sizes available. */
- u8 c[0x1000 / 1];
- u16 s[0x1000 / 2];
- u32 l[0x1000 / 4];
- u64 d[0x1000 / 8];
- } b_type1_cfg; /* 0x028000-0x029000 */
-
- char _pad_029000[0x007000]; /* 0x029000-0x030000 */
-
- /* PCI Interrupt Acknowledge Cycle 0x030000 */
- union {
- u8 c[8 / 1];
- u16 s[8 / 2];
- u32 l[8 / 4];
- u64 d[8 / 8];
- } b_pci_iack; /* 0x030000 */
-
- u8 _pad_030007[0x04fff8]; /* 0x030008-0x07FFFF */
-
- /* External Address Translation Entry RAM 0x080000-0x0FFFFF */
- bridge_ate_t b_ext_ate_ram[0x10000];
-
- /* Reserved 0x100000-0x1FFFFF */
- char _pad_100000[0x200000-0x100000];
-
- /* PCI/GIO Device Spaces 0x200000-0xBFFFFF */
- union { /* make all access sizes available. */
- u8 c[0x100000 / 1];
- u16 s[0x100000 / 2];
- u32 l[0x100000 / 4];
- u64 d[0x100000 / 8];
- } b_devio_raw[10]; /* 0x200000 */
-
- /* b_devio macro is a bit strange; it reflects the
- * fact that the Bridge ASIC provides 2M for the
- * first two DevIO windows and 1M for the other six.
- */
-#define b_devio(n) b_devio_raw[((n)<2)?(n*2):(n+2)]
-
- /* External Flash Proms 1,0 0xC00000-0xFFFFFF */
- union { /* make all access sizes available. */
- u8 c[0x400000 / 1]; /* read-only */
- u16 s[0x400000 / 2]; /* read-write */
- u32 l[0x400000 / 4]; /* read-only */
- u64 d[0x400000 / 8]; /* read-only */
- } b_external_flash; /* 0xC00000 */
-} bridge_t;
-
-/*
- * Field formats for Error Command Word and Auxillary Error Command Word
- * of bridge.
- */
-typedef struct bridge_err_cmdword_s {
- union {
- u32 cmd_word;
- struct {
- u32 didn:4, /* Destination ID */
- sidn:4, /* Source ID */
- pactyp:4, /* Packet type */
- tnum:5, /* Trans Number */
- coh:1, /* Coh Transacti */
- ds:2, /* Data size */
- gbr:1, /* GBR enable */
- vbpm:1, /* VBPM message */
- error:1, /* Error occurred */
- barr:1, /* Barrier op */
- rsvd:8;
- } berr_st;
- } berr_un;
-} bridge_err_cmdword_t;
-
-#define berr_field berr_un.berr_st
-#endif /* !__ASSEMBLY__ */
-
-/*
- * The values of these macros can and should be crosschecked
- * regularly against the offsets of the like-named fields
- * within the "bridge_t" structure above.
- */
-
-/* Byte offset macros for Bridge internal registers */
-
-#define BRIDGE_WID_ID WIDGET_ID
-#define BRIDGE_WID_STAT WIDGET_STATUS
-#define BRIDGE_WID_ERR_UPPER WIDGET_ERR_UPPER_ADDR
-#define BRIDGE_WID_ERR_LOWER WIDGET_ERR_LOWER_ADDR
-#define BRIDGE_WID_CONTROL WIDGET_CONTROL
-#define BRIDGE_WID_REQ_TIMEOUT WIDGET_REQ_TIMEOUT
-#define BRIDGE_WID_INT_UPPER WIDGET_INTDEST_UPPER_ADDR
-#define BRIDGE_WID_INT_LOWER WIDGET_INTDEST_LOWER_ADDR
-#define BRIDGE_WID_ERR_CMDWORD WIDGET_ERR_CMD_WORD
-#define BRIDGE_WID_LLP WIDGET_LLP_CFG
-#define BRIDGE_WID_TFLUSH WIDGET_TFLUSH
-
-#define BRIDGE_WID_AUX_ERR 0x00005C /* Aux Error Command Word */
-#define BRIDGE_WID_RESP_UPPER 0x000064 /* Response Buf Upper Addr */
-#define BRIDGE_WID_RESP_LOWER 0x00006C /* Response Buf Lower Addr */
-#define BRIDGE_WID_TST_PIN_CTRL 0x000074 /* Test pin control */
-
-#define BRIDGE_DIR_MAP 0x000084 /* Direct Map reg */
-
-#define BRIDGE_RAM_PERR 0x000094 /* SSRAM Parity Error */
-
-#define BRIDGE_ARB 0x0000A4 /* Arbitration Priority reg */
-
-#define BRIDGE_NIC 0x0000B4 /* Number In A Can */
-
-#define BRIDGE_BUS_TIMEOUT 0x0000C4 /* Bus Timeout Register */
-#define BRIDGE_PCI_BUS_TIMEOUT BRIDGE_BUS_TIMEOUT
-#define BRIDGE_PCI_CFG 0x0000CC /* PCI Type 1 Config reg */
-#define BRIDGE_PCI_ERR_UPPER 0x0000D4 /* PCI error Upper Addr */
-#define BRIDGE_PCI_ERR_LOWER 0x0000DC /* PCI error Lower Addr */
-
-#define BRIDGE_INT_STATUS 0x000104 /* Interrupt Status */
-#define BRIDGE_INT_ENABLE 0x00010C /* Interrupt Enables */
-#define BRIDGE_INT_RST_STAT 0x000114 /* Reset Intr Status */
-#define BRIDGE_INT_MODE 0x00011C /* Interrupt Mode */
-#define BRIDGE_INT_DEVICE 0x000124 /* Interrupt Device */
-#define BRIDGE_INT_HOST_ERR 0x00012C /* Host Error Field */
-
-#define BRIDGE_INT_ADDR0 0x000134 /* Host Address Reg */
-#define BRIDGE_INT_ADDR_OFF 0x000008 /* Host Addr offset (1..7) */
-#define BRIDGE_INT_ADDR(x) (BRIDGE_INT_ADDR0+(x)*BRIDGE_INT_ADDR_OFF)
-
-#define BRIDGE_DEVICE0 0x000204 /* Device 0 */
-#define BRIDGE_DEVICE_OFF 0x000008 /* Device offset (1..7) */
-#define BRIDGE_DEVICE(x) (BRIDGE_DEVICE0+(x)*BRIDGE_DEVICE_OFF)
-
-#define BRIDGE_WR_REQ_BUF0 0x000244 /* Write Request Buffer 0 */
-#define BRIDGE_WR_REQ_BUF_OFF 0x000008 /* Buffer Offset (1..7) */
-#define BRIDGE_WR_REQ_BUF(x) (BRIDGE_WR_REQ_BUF0+(x)*BRIDGE_WR_REQ_BUF_OFF)
-
-#define BRIDGE_EVEN_RESP 0x000284 /* Even Device Response Buf */
-#define BRIDGE_ODD_RESP 0x00028C /* Odd Device Response Buf */
-
-#define BRIDGE_RESP_STATUS 0x000294 /* Read Response Status reg */
-#define BRIDGE_RESP_CLEAR 0x00029C /* Read Response Clear reg */
-
-/* Byte offset macros for Bridge I/O space */
-
-#define BRIDGE_ATE_RAM 0x00010000 /* Internal Addr Xlat Ram */
-
-#define BRIDGE_TYPE0_CFG_DEV0 0x00020000 /* Type 0 Cfg, Device 0 */
-#define BRIDGE_TYPE0_CFG_SLOT_OFF 0x00001000 /* Type 0 Cfg Slot Offset (1..7) */
-#define BRIDGE_TYPE0_CFG_FUNC_OFF 0x00000100 /* Type 0 Cfg Func Offset (1..7) */
-#define BRIDGE_TYPE0_CFG_DEV(s) (BRIDGE_TYPE0_CFG_DEV0+\
- (s)*BRIDGE_TYPE0_CFG_SLOT_OFF)
-#define BRIDGE_TYPE0_CFG_DEVF(s,f) (BRIDGE_TYPE0_CFG_DEV0+\
- (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+\
- (f)*BRIDGE_TYPE0_CFG_FUNC_OFF)
-
-#define BRIDGE_TYPE1_CFG 0x00028000 /* Type 1 Cfg space */
-
-#define BRIDGE_PCI_IACK 0x00030000 /* PCI Interrupt Ack */
-#define BRIDGE_EXT_SSRAM 0x00080000 /* Extern SSRAM (ATE) */
-
-/* Byte offset macros for Bridge device IO spaces */
-
-#define BRIDGE_DEV_CNT 8 /* Up to 8 devices per bridge */
-#define BRIDGE_DEVIO0 0x00200000 /* Device IO 0 Addr */
-#define BRIDGE_DEVIO1 0x00400000 /* Device IO 1 Addr */
-#define BRIDGE_DEVIO2 0x00600000 /* Device IO 2 Addr */
-#define BRIDGE_DEVIO_OFF 0x00100000 /* Device IO Offset (3..7) */
-
-#define BRIDGE_DEVIO_2MB 0x00200000 /* Device IO Offset (0..1) */
-#define BRIDGE_DEVIO_1MB 0x00100000 /* Device IO Offset (2..7) */
-
-#define BRIDGE_DEVIO(x) ((x)<=1 ? BRIDGE_DEVIO0+(x)*BRIDGE_DEVIO_2MB : BRIDGE_DEVIO2+((x)-2)*BRIDGE_DEVIO_1MB)
-
-#define BRIDGE_EXTERNAL_FLASH 0x00C00000 /* External Flash PROMS */
-
-/* ========================================================================
- * Bridge register bit field definitions
- */
-
-/* Widget part number of bridge */
-#define BRIDGE_WIDGET_PART_NUM 0xc002
-
-/* Manufacturer of bridge */
-#define BRIDGE_WIDGET_MFGR_NUM 0x036
-
-/* Revision numbers for known Bridge revisions */
-#define BRIDGE_REV_A 0x1
-#define BRIDGE_REV_B 0x2
-#define BRIDGE_REV_C 0x3
-#define BRIDGE_REV_D 0x4
-
-/* Bridge widget status register bits definition */
-
-#define BRIDGE_STAT_LLP_REC_CNT (0xFFu << 24)
-#define BRIDGE_STAT_LLP_TX_CNT (0xFF << 16)
-#define BRIDGE_STAT_FLASH_SELECT (0x1 << 6)
-#define BRIDGE_STAT_PCI_GIO_N (0x1 << 5)
-#define BRIDGE_STAT_PENDING (0x1F << 0)
-
-/* Bridge widget control register bits definition */
-#define BRIDGE_CTRL_FLASH_WR_EN (0x1ul << 31)
-#define BRIDGE_CTRL_EN_CLK50 (0x1 << 30)
-#define BRIDGE_CTRL_EN_CLK40 (0x1 << 29)
-#define BRIDGE_CTRL_EN_CLK33 (0x1 << 28)
-#define BRIDGE_CTRL_RST(n) ((n) << 24)
-#define BRIDGE_CTRL_RST_MASK (BRIDGE_CTRL_RST(0xF))
-#define BRIDGE_CTRL_RST_PIN(x) (BRIDGE_CTRL_RST(0x1 << (x)))
-#define BRIDGE_CTRL_IO_SWAP (0x1 << 23)
-#define BRIDGE_CTRL_MEM_SWAP (0x1 << 22)
-#define BRIDGE_CTRL_PAGE_SIZE (0x1 << 21)
-#define BRIDGE_CTRL_SS_PAR_BAD (0x1 << 20)
-#define BRIDGE_CTRL_SS_PAR_EN (0x1 << 19)
-#define BRIDGE_CTRL_SSRAM_SIZE(n) ((n) << 17)
-#define BRIDGE_CTRL_SSRAM_SIZE_MASK (BRIDGE_CTRL_SSRAM_SIZE(0x3))
-#define BRIDGE_CTRL_SSRAM_512K (BRIDGE_CTRL_SSRAM_SIZE(0x3))
-#define BRIDGE_CTRL_SSRAM_128K (BRIDGE_CTRL_SSRAM_SIZE(0x2))
-#define BRIDGE_CTRL_SSRAM_64K (BRIDGE_CTRL_SSRAM_SIZE(0x1))
-#define BRIDGE_CTRL_SSRAM_1K (BRIDGE_CTRL_SSRAM_SIZE(0x0))
-#define BRIDGE_CTRL_F_BAD_PKT (0x1 << 16)
-#define BRIDGE_CTRL_LLP_XBAR_CRD(n) ((n) << 12)
-#define BRIDGE_CTRL_LLP_XBAR_CRD_MASK (BRIDGE_CTRL_LLP_XBAR_CRD(0xf))
-#define BRIDGE_CTRL_CLR_RLLP_CNT (0x1 << 11)
-#define BRIDGE_CTRL_CLR_TLLP_CNT (0x1 << 10)
-#define BRIDGE_CTRL_SYS_END (0x1 << 9)
-#define BRIDGE_CTRL_MAX_TRANS(n) ((n) << 4)
-#define BRIDGE_CTRL_MAX_TRANS_MASK (BRIDGE_CTRL_MAX_TRANS(0x1f))
-#define BRIDGE_CTRL_WIDGET_ID(n) ((n) << 0)
-#define BRIDGE_CTRL_WIDGET_ID_MASK (BRIDGE_CTRL_WIDGET_ID(0xf))
-
-/* Bridge Response buffer Error Upper Register bit fields definition */
-#define BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT (20)
-#define BRIDGE_RESP_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT)
-#define BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT (16)
-#define BRIDGE_RESP_ERRUPPR_BUFNUM_MASK (0xF << BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT)
-#define BRIDGE_RESP_ERRRUPPR_BUFMASK (0xFFFF)
-
-#define BRIDGE_RESP_ERRUPPR_BUFNUM(x) \
- (((x) & BRIDGE_RESP_ERRUPPR_BUFNUM_MASK) >> \
- BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT)
-
-#define BRIDGE_RESP_ERRUPPR_DEVICE(x) \
- (((x) & BRIDGE_RESP_ERRUPPR_DEVNUM_MASK) >> \
- BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT)
-
-/* Bridge direct mapping register bits definition */
-#define BRIDGE_DIRMAP_W_ID_SHFT 20
-#define BRIDGE_DIRMAP_W_ID (0xf << BRIDGE_DIRMAP_W_ID_SHFT)
-#define BRIDGE_DIRMAP_RMF_64 (0x1 << 18)
-#define BRIDGE_DIRMAP_ADD512 (0x1 << 17)
-#define BRIDGE_DIRMAP_OFF (0x1ffff << 0)
-#define BRIDGE_DIRMAP_OFF_ADDRSHFT (31) /* lsbit of DIRMAP_OFF is xtalk address bit 31 */
-
-/* Bridge Arbitration register bits definition */
-#define BRIDGE_ARB_REQ_WAIT_TICK(x) ((x) << 16)
-#define BRIDGE_ARB_REQ_WAIT_TICK_MASK BRIDGE_ARB_REQ_WAIT_TICK(0x3)
-#define BRIDGE_ARB_REQ_WAIT_EN(x) ((x) << 8)
-#define BRIDGE_ARB_REQ_WAIT_EN_MASK BRIDGE_ARB_REQ_WAIT_EN(0xff)
-#define BRIDGE_ARB_FREEZE_GNT (1 << 6)
-#define BRIDGE_ARB_HPRI_RING_B2 (1 << 5)
-#define BRIDGE_ARB_HPRI_RING_B1 (1 << 4)
-#define BRIDGE_ARB_HPRI_RING_B0 (1 << 3)
-#define BRIDGE_ARB_LPRI_RING_B2 (1 << 2)
-#define BRIDGE_ARB_LPRI_RING_B1 (1 << 1)
-#define BRIDGE_ARB_LPRI_RING_B0 (1 << 0)
-
-/* Bridge Bus time-out register bits definition */
-#define BRIDGE_BUS_PCI_RETRY_HLD(x) ((x) << 16)
-#define BRIDGE_BUS_PCI_RETRY_HLD_MASK BRIDGE_BUS_PCI_RETRY_HLD(0x1f)
-#define BRIDGE_BUS_GIO_TIMEOUT (1 << 12)
-#define BRIDGE_BUS_PCI_RETRY_CNT(x) ((x) << 0)
-#define BRIDGE_BUS_PCI_RETRY_MASK BRIDGE_BUS_PCI_RETRY_CNT(0x3ff)
-
-/* Bridge interrupt status register bits definition */
-#define BRIDGE_ISR_MULTI_ERR (0x1u << 31)
-#define BRIDGE_ISR_PMU_ESIZE_FAULT (0x1 << 30)
-#define BRIDGE_ISR_UNEXP_RESP (0x1 << 29)
-#define BRIDGE_ISR_BAD_XRESP_PKT (0x1 << 28)
-#define BRIDGE_ISR_BAD_XREQ_PKT (0x1 << 27)
-#define BRIDGE_ISR_RESP_XTLK_ERR (0x1 << 26)
-#define BRIDGE_ISR_REQ_XTLK_ERR (0x1 << 25)
-#define BRIDGE_ISR_INVLD_ADDR (0x1 << 24)
-#define BRIDGE_ISR_UNSUPPORTED_XOP (0x1 << 23)
-#define BRIDGE_ISR_XREQ_FIFO_OFLOW (0x1 << 22)
-#define BRIDGE_ISR_LLP_REC_SNERR (0x1 << 21)
-#define BRIDGE_ISR_LLP_REC_CBERR (0x1 << 20)
-#define BRIDGE_ISR_LLP_RCTY (0x1 << 19)
-#define BRIDGE_ISR_LLP_TX_RETRY (0x1 << 18)
-#define BRIDGE_ISR_LLP_TCTY (0x1 << 17)
-#define BRIDGE_ISR_SSRAM_PERR (0x1 << 16)
-#define BRIDGE_ISR_PCI_ABORT (0x1 << 15)
-#define BRIDGE_ISR_PCI_PARITY (0x1 << 14)
-#define BRIDGE_ISR_PCI_SERR (0x1 << 13)
-#define BRIDGE_ISR_PCI_PERR (0x1 << 12)
-#define BRIDGE_ISR_PCI_MST_TIMEOUT (0x1 << 11)
-#define BRIDGE_ISR_GIO_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
-#define BRIDGE_ISR_PCI_RETRY_CNT (0x1 << 10)
-#define BRIDGE_ISR_XREAD_REQ_TIMEOUT (0x1 << 9)
-#define BRIDGE_ISR_GIO_B_ENBL_ERR (0x1 << 8)
-#define BRIDGE_ISR_INT_MSK (0xff << 0)
-#define BRIDGE_ISR_INT(x) (0x1 << (x))
-
-#define BRIDGE_ISR_LINK_ERROR \
- (BRIDGE_ISR_LLP_REC_SNERR|BRIDGE_ISR_LLP_REC_CBERR| \
- BRIDGE_ISR_LLP_RCTY|BRIDGE_ISR_LLP_TX_RETRY| \
- BRIDGE_ISR_LLP_TCTY)
-
-#define BRIDGE_ISR_PCIBUS_PIOERR \
- (BRIDGE_ISR_PCI_MST_TIMEOUT|BRIDGE_ISR_PCI_ABORT)
-
-#define BRIDGE_ISR_PCIBUS_ERROR \
- (BRIDGE_ISR_PCIBUS_PIOERR|BRIDGE_ISR_PCI_PERR| \
- BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_RETRY_CNT| \
- BRIDGE_ISR_PCI_PARITY)
-
-#define BRIDGE_ISR_XTALK_ERROR \
- (BRIDGE_ISR_XREAD_REQ_TIMEOUT|BRIDGE_ISR_XREQ_FIFO_OFLOW|\
- BRIDGE_ISR_UNSUPPORTED_XOP|BRIDGE_ISR_INVLD_ADDR| \
- BRIDGE_ISR_REQ_XTLK_ERR|BRIDGE_ISR_RESP_XTLK_ERR| \
- BRIDGE_ISR_BAD_XREQ_PKT|BRIDGE_ISR_BAD_XRESP_PKT| \
- BRIDGE_ISR_UNEXP_RESP)
-
-#define BRIDGE_ISR_ERRORS \
- (BRIDGE_ISR_LINK_ERROR|BRIDGE_ISR_PCIBUS_ERROR| \
- BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR| \
- BRIDGE_ISR_PMU_ESIZE_FAULT)
-
-/*
- * List of Errors which are fatal and kill the sytem
- */
-#define BRIDGE_ISR_ERROR_FATAL \
- ((BRIDGE_ISR_XTALK_ERROR & ~BRIDGE_ISR_XREAD_REQ_TIMEOUT)|\
- BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_PARITY )
-
-#define BRIDGE_ISR_ERROR_DUMP \
- (BRIDGE_ISR_PCIBUS_ERROR|BRIDGE_ISR_PMU_ESIZE_FAULT| \
- BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR)
-
-/* Bridge interrupt enable register bits definition */
-#define BRIDGE_IMR_UNEXP_RESP BRIDGE_ISR_UNEXP_RESP
-#define BRIDGE_IMR_PMU_ESIZE_FAULT BRIDGE_ISR_PMU_ESIZE_FAULT
-#define BRIDGE_IMR_BAD_XRESP_PKT BRIDGE_ISR_BAD_XRESP_PKT
-#define BRIDGE_IMR_BAD_XREQ_PKT BRIDGE_ISR_BAD_XREQ_PKT
-#define BRIDGE_IMR_RESP_XTLK_ERR BRIDGE_ISR_RESP_XTLK_ERR
-#define BRIDGE_IMR_REQ_XTLK_ERR BRIDGE_ISR_REQ_XTLK_ERR
-#define BRIDGE_IMR_INVLD_ADDR BRIDGE_ISR_INVLD_ADDR
-#define BRIDGE_IMR_UNSUPPORTED_XOP BRIDGE_ISR_UNSUPPORTED_XOP
-#define BRIDGE_IMR_XREQ_FIFO_OFLOW BRIDGE_ISR_XREQ_FIFO_OFLOW
-#define BRIDGE_IMR_LLP_REC_SNERR BRIDGE_ISR_LLP_REC_SNERR
-#define BRIDGE_IMR_LLP_REC_CBERR BRIDGE_ISR_LLP_REC_CBERR
-#define BRIDGE_IMR_LLP_RCTY BRIDGE_ISR_LLP_RCTY
-#define BRIDGE_IMR_LLP_TX_RETRY BRIDGE_ISR_LLP_TX_RETRY
-#define BRIDGE_IMR_LLP_TCTY BRIDGE_ISR_LLP_TCTY
-#define BRIDGE_IMR_SSRAM_PERR BRIDGE_ISR_SSRAM_PERR
-#define BRIDGE_IMR_PCI_ABORT BRIDGE_ISR_PCI_ABORT
-#define BRIDGE_IMR_PCI_PARITY BRIDGE_ISR_PCI_PARITY
-#define BRIDGE_IMR_PCI_SERR BRIDGE_ISR_PCI_SERR
-#define BRIDGE_IMR_PCI_PERR BRIDGE_ISR_PCI_PERR
-#define BRIDGE_IMR_PCI_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
-#define BRIDGE_IMR_GIO_MST_TIMEOUT BRIDGE_ISR_GIO_MST_TIMEOUT
-#define BRIDGE_IMR_PCI_RETRY_CNT BRIDGE_ISR_PCI_RETRY_CNT
-#define BRIDGE_IMR_XREAD_REQ_TIMEOUT BRIDGE_ISR_XREAD_REQ_TIMEOUT
-#define BRIDGE_IMR_GIO_B_ENBL_ERR BRIDGE_ISR_GIO_B_ENBL_ERR
-#define BRIDGE_IMR_INT_MSK BRIDGE_ISR_INT_MSK
-#define BRIDGE_IMR_INT(x) BRIDGE_ISR_INT(x)
-
-/* Bridge interrupt reset register bits definition */
-#define BRIDGE_IRR_MULTI_CLR (0x1 << 6)
-#define BRIDGE_IRR_CRP_GRP_CLR (0x1 << 5)
-#define BRIDGE_IRR_RESP_BUF_GRP_CLR (0x1 << 4)
-#define BRIDGE_IRR_REQ_DSP_GRP_CLR (0x1 << 3)
-#define BRIDGE_IRR_LLP_GRP_CLR (0x1 << 2)
-#define BRIDGE_IRR_SSRAM_GRP_CLR (0x1 << 1)
-#define BRIDGE_IRR_PCI_GRP_CLR (0x1 << 0)
-#define BRIDGE_IRR_GIO_GRP_CLR (0x1 << 0)
-#define BRIDGE_IRR_ALL_CLR 0x7f
-
-#define BRIDGE_IRR_CRP_GRP (BRIDGE_ISR_UNEXP_RESP | \
- BRIDGE_ISR_XREQ_FIFO_OFLOW)
-#define BRIDGE_IRR_RESP_BUF_GRP (BRIDGE_ISR_BAD_XRESP_PKT | \
- BRIDGE_ISR_RESP_XTLK_ERR | \
- BRIDGE_ISR_XREAD_REQ_TIMEOUT)
-#define BRIDGE_IRR_REQ_DSP_GRP (BRIDGE_ISR_UNSUPPORTED_XOP | \
- BRIDGE_ISR_BAD_XREQ_PKT | \
- BRIDGE_ISR_REQ_XTLK_ERR | \
- BRIDGE_ISR_INVLD_ADDR)
-#define BRIDGE_IRR_LLP_GRP (BRIDGE_ISR_LLP_REC_SNERR | \
- BRIDGE_ISR_LLP_REC_CBERR | \
- BRIDGE_ISR_LLP_RCTY | \
- BRIDGE_ISR_LLP_TX_RETRY | \
- BRIDGE_ISR_LLP_TCTY)
-#define BRIDGE_IRR_SSRAM_GRP (BRIDGE_ISR_SSRAM_PERR | \
- BRIDGE_ISR_PMU_ESIZE_FAULT)
-#define BRIDGE_IRR_PCI_GRP (BRIDGE_ISR_PCI_ABORT | \
- BRIDGE_ISR_PCI_PARITY | \
- BRIDGE_ISR_PCI_SERR | \
- BRIDGE_ISR_PCI_PERR | \
- BRIDGE_ISR_PCI_MST_TIMEOUT | \
- BRIDGE_ISR_PCI_RETRY_CNT)
-
-#define BRIDGE_IRR_GIO_GRP (BRIDGE_ISR_GIO_B_ENBL_ERR | \
- BRIDGE_ISR_GIO_MST_TIMEOUT)
-
-/* Bridge INT_DEV register bits definition */
-#define BRIDGE_INT_DEV_SHFT(n) ((n)*3)
-#define BRIDGE_INT_DEV_MASK(n) (0x7 << BRIDGE_INT_DEV_SHFT(n))
-#define BRIDGE_INT_DEV_SET(_dev, _line) (_dev << BRIDGE_INT_DEV_SHFT(_line))
-
-/* Bridge interrupt(x) register bits definition */
-#define BRIDGE_INT_ADDR_HOST 0x0003FF00
-#define BRIDGE_INT_ADDR_FLD 0x000000FF
-
-#define BRIDGE_TMO_PCI_RETRY_HLD_MASK 0x1f0000
-#define BRIDGE_TMO_GIO_TIMEOUT_MASK 0x001000
-#define BRIDGE_TMO_PCI_RETRY_CNT_MASK 0x0003ff
-
-#define BRIDGE_TMO_PCI_RETRY_CNT_MAX 0x3ff
-
-/*
- * The NASID should be shifted by this amount and stored into the
- * interrupt(x) register.
- */
-#define BRIDGE_INT_ADDR_NASID_SHFT 8
-
-/*
- * The BRIDGE_INT_ADDR_DEST_IO bit should be set to send an interrupt to
- * memory.
- */
-#define BRIDGE_INT_ADDR_DEST_IO (1 << 17)
-#define BRIDGE_INT_ADDR_DEST_MEM 0
-#define BRIDGE_INT_ADDR_MASK (1 << 17)
-
-/* Bridge device(x) register bits definition */
-#define BRIDGE_DEV_ERR_LOCK_EN 0x10000000
-#define BRIDGE_DEV_PAGE_CHK_DIS 0x08000000
-#define BRIDGE_DEV_FORCE_PCI_PAR 0x04000000
-#define BRIDGE_DEV_VIRTUAL_EN 0x02000000
-#define BRIDGE_DEV_PMU_WRGA_EN 0x01000000
-#define BRIDGE_DEV_DIR_WRGA_EN 0x00800000
-#define BRIDGE_DEV_DEV_SIZE 0x00400000
-#define BRIDGE_DEV_RT 0x00200000
-#define BRIDGE_DEV_SWAP_PMU 0x00100000
-#define BRIDGE_DEV_SWAP_DIR 0x00080000
-#define BRIDGE_DEV_PREF 0x00040000
-#define BRIDGE_DEV_PRECISE 0x00020000
-#define BRIDGE_DEV_COH 0x00010000
-#define BRIDGE_DEV_BARRIER 0x00008000
-#define BRIDGE_DEV_GBR 0x00004000
-#define BRIDGE_DEV_DEV_SWAP 0x00002000
-#define BRIDGE_DEV_DEV_IO_MEM 0x00001000
-#define BRIDGE_DEV_OFF_MASK 0x00000fff
-#define BRIDGE_DEV_OFF_ADDR_SHFT 20
-
-#define BRIDGE_DEV_PMU_BITS (BRIDGE_DEV_PMU_WRGA_EN | \
- BRIDGE_DEV_SWAP_PMU)
-#define BRIDGE_DEV_D32_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
- BRIDGE_DEV_SWAP_DIR | \
- BRIDGE_DEV_PREF | \
- BRIDGE_DEV_PRECISE | \
- BRIDGE_DEV_COH | \
- BRIDGE_DEV_BARRIER)
-#define BRIDGE_DEV_D64_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
- BRIDGE_DEV_SWAP_DIR | \
- BRIDGE_DEV_COH | \
- BRIDGE_DEV_BARRIER)
-
-/* Bridge Error Upper register bit field definition */
-#define BRIDGE_ERRUPPR_DEVMASTER (0x1 << 20) /* Device was master */
-#define BRIDGE_ERRUPPR_PCIVDEV (0x1 << 19) /* Virtual Req value */
-#define BRIDGE_ERRUPPR_DEVNUM_SHFT (16)
-#define BRIDGE_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_ERRUPPR_DEVNUM_SHFT)
-#define BRIDGE_ERRUPPR_DEVICE(err) (((err) >> BRIDGE_ERRUPPR_DEVNUM_SHFT) & 0x7)
-#define BRIDGE_ERRUPPR_ADDRMASK (0xFFFF)
-
-/* Bridge interrupt mode register bits definition */
-#define BRIDGE_INTMODE_CLR_PKT_EN(x) (0x1 << (x))
-
-/* this should be written to the xbow's link_control(x) register */
-#define BRIDGE_CREDIT 3
-
-/* RRB assignment register */
-#define BRIDGE_RRB_EN 0x8 /* after shifting down */
-#define BRIDGE_RRB_DEV 0x7 /* after shifting down */
-#define BRIDGE_RRB_VDEV 0x4 /* after shifting down */
-#define BRIDGE_RRB_PDEV 0x3 /* after shifting down */
-
-/* RRB status register */
-#define BRIDGE_RRB_VALID(r) (0x00010000<<(r))
-#define BRIDGE_RRB_INUSE(r) (0x00000001<<(r))
-
-/* RRB clear register */
-#define BRIDGE_RRB_CLEAR(r) (0x00000001<<(r))
-
-/* xbox system controller declarations */
-#define XBOX_BRIDGE_WID 8
-#define FLASH_PROM1_BASE 0xE00000 /* To read the xbox sysctlr status */
-#define XBOX_RPS_EXISTS 1 << 6 /* RPS bit in status register */
-#define XBOX_RPS_FAIL 1 << 4 /* RPS status bit in register */
-
-/* ========================================================================
- */
-/*
- * Macros for Xtalk to Bridge bus (PCI/GIO) PIO
- * refer to section 4.2.1 of Bridge Spec for xtalk to PCI/GIO PIO mappings
- */
-/* XTALK addresses that map into Bridge Bus addr space */
-#define BRIDGE_PIO32_XTALK_ALIAS_BASE 0x000040000000L
-#define BRIDGE_PIO32_XTALK_ALIAS_LIMIT 0x00007FFFFFFFL
-#define BRIDGE_PIO64_XTALK_ALIAS_BASE 0x000080000000L
-#define BRIDGE_PIO64_XTALK_ALIAS_LIMIT 0x0000BFFFFFFFL
-#define BRIDGE_PCIIO_XTALK_ALIAS_BASE 0x000100000000L
-#define BRIDGE_PCIIO_XTALK_ALIAS_LIMIT 0x0001FFFFFFFFL
-
-/* Ranges of PCI bus space that can be accessed via PIO from xtalk */
-#define BRIDGE_MIN_PIO_ADDR_MEM 0x00000000 /* 1G PCI memory space */
-#define BRIDGE_MAX_PIO_ADDR_MEM 0x3fffffff
-#define BRIDGE_MIN_PIO_ADDR_IO 0x00000000 /* 4G PCI IO space */
-#define BRIDGE_MAX_PIO_ADDR_IO 0xffffffff
-
-/* XTALK addresses that map into PCI addresses */
-#define BRIDGE_PCI_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE
-#define BRIDGE_PCI_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT
-#define BRIDGE_PCI_MEM64_BASE BRIDGE_PIO64_XTALK_ALIAS_BASE
-#define BRIDGE_PCI_MEM64_LIMIT BRIDGE_PIO64_XTALK_ALIAS_LIMIT
-#define BRIDGE_PCI_IO_BASE BRIDGE_PCIIO_XTALK_ALIAS_BASE
-#define BRIDGE_PCI_IO_LIMIT BRIDGE_PCIIO_XTALK_ALIAS_LIMIT
-
-/*
- * Macros for Bridge bus (PCI/GIO) to Xtalk DMA
- */
-/* Bridge Bus DMA addresses */
-#define BRIDGE_LOCAL_BASE 0
-#define BRIDGE_DMA_MAPPED_BASE 0x40000000
-#define BRIDGE_DMA_MAPPED_SIZE 0x40000000 /* 1G Bytes */
-#define BRIDGE_DMA_DIRECT_BASE 0x80000000
-#define BRIDGE_DMA_DIRECT_SIZE 0x80000000 /* 2G Bytes */
-
-#define PCI32_LOCAL_BASE BRIDGE_LOCAL_BASE
-
-/* PCI addresses of regions decoded by Bridge for DMA */
-#define PCI32_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE
-#define PCI32_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE
-
-#define IS_PCI32_LOCAL(x) ((ulong_t)(x) < PCI32_MAPPED_BASE)
-#define IS_PCI32_MAPPED(x) ((ulong_t)(x) < PCI32_DIRECT_BASE && \
- (ulong_t)(x) >= PCI32_MAPPED_BASE)
-#define IS_PCI32_DIRECT(x) ((ulong_t)(x) >= PCI32_MAPPED_BASE)
-#define IS_PCI64(x) ((ulong_t)(x) >= PCI64_BASE)
-
-/*
- * The GIO address space.
- */
-/* Xtalk to GIO PIO */
-#define BRIDGE_GIO_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE
-#define BRIDGE_GIO_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT
-
-#define GIO_LOCAL_BASE BRIDGE_LOCAL_BASE
-
-/* GIO addresses of regions decoded by Bridge for DMA */
-#define GIO_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE
-#define GIO_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE
-
-#define IS_GIO_LOCAL(x) ((ulong_t)(x) < GIO_MAPPED_BASE)
-#define IS_GIO_MAPPED(x) ((ulong_t)(x) < GIO_DIRECT_BASE && \
- (ulong_t)(x) >= GIO_MAPPED_BASE)
-#define IS_GIO_DIRECT(x) ((ulong_t)(x) >= GIO_MAPPED_BASE)
-
-/* PCI to xtalk mapping */
-
-/* given a DIR_OFF value and a pci/gio 32 bits direct address, determine
- * which xtalk address is accessed
- */
-#define BRIDGE_DIRECT_32_SEG_SIZE BRIDGE_DMA_DIRECT_SIZE
-#define BRIDGE_DIRECT_32_TO_XTALK(dir_off,adr) \
- ((dir_off) * BRIDGE_DIRECT_32_SEG_SIZE + \
- ((adr) & (BRIDGE_DIRECT_32_SEG_SIZE - 1)) + PHYS_RAMBASE)
-
-/* 64-bit address attribute masks */
-#define PCI64_ATTR_TARG_MASK 0xf000000000000000
-#define PCI64_ATTR_TARG_SHFT 60
-#define PCI64_ATTR_PREF 0x0800000000000000
-#define PCI64_ATTR_PREC 0x0400000000000000
-#define PCI64_ATTR_VIRTUAL 0x0200000000000000
-#define PCI64_ATTR_BAR 0x0100000000000000
-#define PCI64_ATTR_RMF_MASK 0x00ff000000000000
-#define PCI64_ATTR_RMF_SHFT 48
-
-#ifndef __ASSEMBLY__
-/* Address translation entry for mapped pci32 accesses */
-typedef union ate_u {
- u64 ent;
- struct ate_s {
- u64 rmf:16;
- u64 addr:36;
- u64 targ:4;
- u64 reserved:3;
- u64 barrier:1;
- u64 prefetch:1;
- u64 precise:1;
- u64 coherent:1;
- u64 valid:1;
- } field;
-} ate_t;
-#endif /* !__ASSEMBLY__ */
-
-#define ATE_V 0x01
-#define ATE_CO 0x02
-#define ATE_PREC 0x04
-#define ATE_PREF 0x08
-#define ATE_BAR 0x10
-
-#define ATE_PFNSHIFT 12
-#define ATE_TIDSHIFT 8
-#define ATE_RMFSHIFT 48
-
-#define mkate(xaddr, xid, attr) ((xaddr) & 0x0000fffffffff000ULL) | \
- ((xid)<<ATE_TIDSHIFT) | \
- (attr)
-
-#define BRIDGE_INTERNAL_ATES 128
-
-/*
- * Linux pci bus mappings to sn physical id's
- */
-extern unsigned char bus_to_wid[]; /* widget id for linux pci bus */
-extern unsigned char bus_to_nid[]; /* nasid for linux pci bus */
-extern unsigned char num_bridges; /* number of bridges in the system */
-
-#endif /* _ASM_PCI_BRIDGE_H */
diff -Nru a/include/asm-mips64/pci.h b/include/asm-mips64/pci.h
--- a/include/asm-mips64/pci.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,385 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_PCI_H
-#define _ASM_PCI_H
-
-#include <linux/config.h>
-#include <linux/mm.h>
-
-#ifdef __KERNEL__
-
-/* Can be used to override the logic in pci_scan_bus for skipping
- already-configured bus numbers - to be used for buggy BIOSes
- or architectures with incomplete PCI setup by the loader */
-
-#ifdef CONFIG_PCI
-extern unsigned int pcibios_assign_all_busses(void);
-#else
-#define pcibios_assign_all_busses() 0
-#endif
-
-#define PCIBIOS_MIN_IO 0x1000
-#define PCIBIOS_MIN_MEM 0x10000000
-
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
- /* No special bus mastering setup handling */
-}
-
-static inline void pcibios_penalize_isa_irq(int irq)
-{
- /* We don't do dynamic PCI IRQ allocation */
-}
-
-/*
- * Dynamic DMA mapping stuff.
- * MIPS has everything mapped statically.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/scatterlist.h>
-#include <linux/string.h>
-#include <asm/io.h>
-
-#if defined(CONFIG_DDB5074) || defined(CONFIG_DDB5476)
-#undef PCIBIOS_MIN_IO
-#undef PCIBIOS_MIN_MEM
-#define PCIBIOS_MIN_IO 0x0100000
-#define PCIBIOS_MIN_MEM 0x1000000
-#endif
-
-struct pci_dev;
-
-/*
- * The PCI address space does equal the physical memory address space. The
- * networking and block device layers use this boolean for bounce buffer
- * decisions.
- */
-#define PCI_DMA_BUS_IS_PHYS (1)
-
-/*
- * Allocate and map kernel buffer using consistent mode DMA for a device.
- * hwdev should be valid struct pci_dev pointer for PCI devices,
- * NULL for PCI-like buses (ISA, EISA).
- * Returns non-NULL cpu-view pointer to the buffer if successful and
- * sets *dma_addrp to the pci side dma address as well, else *dma_addrp
- * is undefined.
- */
-extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
- dma_addr_t *dma_handle);
-
-/*
- * Free and unmap a consistent DMA buffer.
- * cpu_addr is what was returned from pci_alloc_consistent,
- * size must be the same as what as passed into pci_alloc_consistent,
- * and likewise dma_addr must be the same as what *dma_addrp was set to.
- *
- * References to the memory and mappings associated with cpu_addr/dma_addr
- * past this call are illegal.
- */
-extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
- void *vaddr, dma_addr_t dma_handle);
-
-
-#ifdef CONFIG_MAPPED_PCI_IO
-
-extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
- int direction);
-extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
- size_t size, int direction);
-extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
- int direction);
-extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, int direction);
-extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
- size_t size, int direction);
-extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nelems, int direction);
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
-
-#else /* CONFIG_MAPPED_PCI_IO */
-
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
-static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
- size_t size, int direction)
-{
- unsigned long addr = (unsigned long) ptr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- dma_cache_wback_inv(addr, size);
-
- return bus_to_baddr(hwdev->bus, __pa(ptr));
-}
-
-/*
- * Unmap a single streaming mode DMA translation. The dma_addr and size
- * must match what was provided for in a previous pci_map_single call. All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guaranteed to see
- * whatever the device wrote there.
- */
-static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
- size_t size, int direction)
-{
- if (direction == PCI_DMA_NONE)
- BUG();
-
- if (direction != PCI_DMA_TODEVICE) {
- unsigned long addr;
-
- addr = baddr_to_bus(hwdev->bus, dma_addr) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
- }
-}
-
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME) (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME) (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
-
-/*
- * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
- * to pci_map_single, but takes a struct page instead of a virtual address
- */
-static inline dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page,
- unsigned long offset, size_t size,
- int direction)
-{
- unsigned long addr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- addr = (unsigned long) page_address(page) + offset;
- dma_cache_wback_inv(addr, size);
-
- return bus_to_baddr(hwdev->bus, page_to_phys(page) + offset);
-}
-
-static inline void pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
- size_t size, int direction)
-{
- if (direction == PCI_DMA_NONE)
- BUG();
-
- if (direction != PCI_DMA_TODEVICE) {
- unsigned long addr;
-
- addr = baddr_to_bus(hwdev->bus, dma_address) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
- }
-}
-
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA. This is the scather-gather version of the
- * above pci_map_single interface. Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length. They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- * DMA address/length pairs than there are SG table elements.
- * (for example via virtual mapping capabilities)
- * The routine returns the number of addr/length pairs actually
- * used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
-static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, int direction)
-{
- int i;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- for (i = 0; i < nents; i++, sg++) {
- unsigned long addr;
-
- addr = (unsigned long) page_address(sg->page);
- if (addr)
- dma_cache_wback_inv(addr + sg->offset, sg->length);
- sg->dma_address = (dma_addr_t) bus_to_baddr(hwdev->bus,
- page_to_phys(sg->page) + sg->offset);
- }
-
- return nents;
-}
-
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
-static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, int direction)
-{
- int i;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- if (direction == PCI_DMA_TODEVICE)
- return;
-
- for (i = 0; i < nents; i++, sg++) {
- unsigned long addr;
-
- if (!sg->page)
- BUG();
-
- addr = (unsigned long) page_address(sg->page);
- if (addr)
- dma_cache_wback_inv(addr + sg->offset, sg->length);
- }
-}
-
-/*
- * Make physical memory consistent for a single
- * streaming mode DMA translation after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the
- * buffer using the cpu, yet do not wish to teardown the PCI dma
- * mapping, you must call this function before doing so. At the
- * next point you give the PCI dma address back to the card, the
- * device again owns the buffer.
- */
-static inline void pci_dma_sync_single(struct pci_dev *hwdev,
- dma_addr_t dma_handle,
- size_t size, int direction)
-{
- unsigned long addr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- addr = baddr_to_bus(hwdev->bus, dma_handle) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
-}
-
-/*
- * Make physical memory consistent for a set of streaming
- * mode DMA translations after a transfer.
- *
- * The same as pci_dma_sync_single but for a scatter-gather list,
- * same rules and usage.
- */
-static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
- struct scatterlist *sg,
- int nelems, int direction)
-{
-#ifdef CONFIG_NONCOHERENT_IO
- int i;
-#endif
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- /* Make sure that gcc doesn't leave the empty loop body. */
-#ifdef CONFIG_NONCOHERENT_IO
- for (i = 0; i < nelems; i++, sg++)
- dma_cache_wback_inv((unsigned long)page_address(sg->page),
- sg->length);
-#endif
-}
-#endif /* CONFIG_MAPPED_PCI_IO */
-
-/*
- * Return whether the given PCI device DMA address mask can
- * be supported properly. For example, if your device can
- * only drive the low 24-bits during PCI bus mastering, then
- * you would pass 0x00ffffff as the mask to this function.
- */
-static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
-{
- /*
- * we fall back to GFP_DMA when the mask isn't all 1s,
- * so we can't guarantee allocations that must be
- * within a tighter range than GFP_DMA..
- */
-#ifdef CONFIG_ISA
- if (mask < 0x00ffffff)
- return 0;
-#endif
-
- return 1;
-}
-
-/* This is always fine. */
-#define pci_dac_dma_supported(pci_dev, mask) (1)
-
-static inline dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
- struct page *page, unsigned long offset, int direction)
-{
- dma64_addr_t addr = page_to_phys(page) + offset;
-
- return (dma64_addr_t) bus_to_baddr(pdev->bus, addr);
-}
-
-static inline struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
- dma64_addr_t dma_addr)
-{
- unsigned long poff = baddr_to_bus(pdev->bus, dma_addr) >> PAGE_SHIFT;
-
- return mem_map + poff;
-}
-
-static inline unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
- dma64_addr_t dma_addr)
-{
- return dma_addr & ~PAGE_MASK;
-}
-
-static inline void pci_dac_dma_sync_single(struct pci_dev *pdev,
- dma64_addr_t dma_addr, size_t len, int direction)
-{
- unsigned long addr;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- addr = baddr_to_bus(pdev->bus, dma_addr) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, len);
-}
-
-/*
- * These macros should be used after a pci_map_sg call has been done
- * to get bus addresses of each of the SG entries and their lengths.
- * You should only work with the number of sg entries pci_map_sg
- * returns, or alternatively stop on the first sg_dma_len(sg) which
- * is 0.
- */
-#define sg_dma_address(sg) ((sg)->dma_address)
-#define sg_dma_len(sg) ((sg)->length)
-
-#endif /* __KERNEL__ */
-
-/* generic pci stuff */
-#include <asm-generic/pci.h>
-
-#endif /* _ASM_PCI_H */
-
diff -Nru a/include/asm-mips64/percpu.h b/include/asm-mips64/percpu.h
--- a/include/asm-mips64/percpu.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,6 +0,0 @@
-#ifndef __ASM_PERCPU_H
-#define __ASM_PERCPU_H
-
-#include <asm-generic/percpu.h>
-
-#endif /* __ASM_PERCPU_H */
diff -Nru a/include/asm-mips64/pgalloc.h b/include/asm-mips64/pgalloc.h
--- a/include/asm-mips64/pgalloc.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,109 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2001 by Ralf Baechle at alii
- * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef _ASM_PGALLOC_H
-#define _ASM_PGALLOC_H
-
-#include <linux/config.h>
-#include <linux/highmem.h>
-#include <linux/mm.h>
-#include <asm/page.h>
-
-#define check_pgt_cache() do { } while (0)
-
-static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
- pte_t *pte)
-{
- set_pmd(pmd, __pmd(__pa(pte)));
-}
-
-static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
- struct page *pte)
-{
- set_pmd(pmd, __pmd((PAGE_OFFSET + page_to_pfn(pte)) << PAGE_SHIFT));
-}
-
-#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
-
-static inline pgd_t *pgd_alloc(struct mm_struct *mm)
-{
- pgd_t *ret, *init;
-
- ret = (pgd_t *) __get_free_pages(GFP_KERNEL, 1);
- if (ret) {
- init = pgd_offset(&init_mm, 0);
- pgd_init((unsigned long)ret);
- memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
- (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
- }
-
- return ret;
-}
-
-static inline void pgd_free(pgd_t *pgd)
-{
- free_pages((unsigned long)pgd, PGD_ORDER);
-}
-
-static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
- unsigned long address)
-{
- pte_t *pte;
-
- pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT,
- PTE_ORDER);
- if (pte)
- clear_page(pte);
-
- return pte;
-}
-
-static inline struct page *pte_alloc_one(struct mm_struct *mm,
- unsigned long address)
-{
- struct page *pte;
-
- pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER);
- if (pte)
- clear_highpage(pte);
-
- return pte;
-}
-
-static inline void pte_free_kernel(pte_t *pte)
-{
- free_pages((unsigned long)pte, PTE_ORDER);
-}
-
-static inline void pte_free(struct page *pte)
-{
- __free_pages(pte, PTE_ORDER);
-}
-
-#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
-#define __pmd_free_tlb(tlb,x) do { } while (0)
-
-static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
-{
- pmd_t *pmd;
-
- pmd = (pmd_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT, PMD_ORDER);
- if (pmd)
- pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table);
- return pmd;
-}
-
-static inline void pmd_free(pmd_t *pmd)
-{
- free_pages((unsigned long)pmd, PMD_ORDER);
-}
-
-extern pte_t kptbl[(PAGE_SIZE << PGD_ORDER)/sizeof(pte_t)];
-extern pmd_t kpmdtbl[PTRS_PER_PMD];
-
-#endif /* _ASM_PGALLOC_H */
diff -Nru a/include/asm-mips64/pgtable-bits.h b/include/asm-mips64/pgtable-bits.h
--- a/include/asm-mips64/pgtable-bits.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,102 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2002 by Ralf Baechle
- * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#ifndef _ASM_PGTABLE_BITS_H
-#define _ASM_PGTABLE_BITS_H
-
-#include <linux/config.h>
-
-/*
- * Note that we shift the lower 32bits of each EntryLo[01] entry
- * 6 bits to the left. That way we can convert the PFN into the
- * physical address by a single 'and' operation and gain 6 additional
- * bits for storing information which isn't present in a normal
- * MIPS page table.
- *
- * Similar to the Alpha port, we need to keep track of the ref
- * and mod bits in software. We have a software "yeah you can read
- * from this page" bit, and a hardware one which actually lets the
- * process read from the page. On the same token we have a software
- * writable bit and the real hardware one which actually lets the
- * process write to the page, this keeps a mod bit via the hardware
- * dirty bit.
- *
- * Certain revisions of the R4000 and R5000 have a bug where if a
- * certain sequence occurs in the last 3 instructions of an executable
- * page, and the following page is not mapped, the cpu can do
- * unpredictable things. The code (when it is written) to deal with
- * this problem will be in the update_mmu_cache() code for the r4k.
- */
-#define _PAGE_PRESENT (1<<0) /* implemented in software */
-#define _PAGE_READ (1<<1) /* implemented in software */
-#define _PAGE_WRITE (1<<2) /* implemented in software */
-#define _PAGE_ACCESSED (1<<3) /* implemented in software */
-#define _PAGE_MODIFIED (1<<4) /* implemented in software */
-#define _PAGE_FILE (1<<4) /* set:pagecache unset:swap */
-
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
-
-#define _PAGE_GLOBAL (1<<8)
-#define _PAGE_VALID (1<<9)
-#define _PAGE_SILENT_READ (1<<9) /* synonym */
-#define _PAGE_DIRTY (1<<10) /* The MIPS dirty bit */
-#define _PAGE_SILENT_WRITE (1<<10)
-#define _CACHE_UNCACHED (1<<11)
-#define _CACHE_MASK (1<<11)
-#define _CACHE_CACHABLE_NONCOHERENT 0
-
-#else
-#define _PAGE_R4KBUG (1<<5) /* workaround for r4k bug */
-#define _PAGE_GLOBAL (1<<6)
-#define _PAGE_VALID (1<<7)
-#define _PAGE_SILENT_READ (1<<7) /* synonym */
-#define _PAGE_DIRTY (1<<8) /* The MIPS dirty bit */
-#define _PAGE_SILENT_WRITE (1<<8)
-#define _CACHE_MASK (7<<9)
-
-#if defined(CONFIG_CPU_SB1)
-
-/* No penalty for being coherent on the SB1, so just
- use it for "noncoherent" spaces, too. Shouldn't hurt. */
-
-#define _CACHE_UNCACHED (2<<9)
-#define _CACHE_CACHABLE_COW (5<<9)
-#define _CACHE_CACHABLE_NONCOHERENT (5<<9)
-#define _CACHE_UNCACHED_ACCELERATED (7<<9)
-
-#else
-
-#define _CACHE_CACHABLE_NO_WA (0<<9) /* R4600 only */
-#define _CACHE_CACHABLE_WA (1<<9) /* R4600 only */
-#define _CACHE_UNCACHED (2<<9) /* R4[0246]00 */
-#define _CACHE_CACHABLE_NONCOHERENT (3<<9) /* R4[0246]00 */
-#define _CACHE_CACHABLE_CE (4<<9) /* R4[04]00MC only */
-#define _CACHE_CACHABLE_COW (5<<9) /* R4[04]00MC only */
-#define _CACHE_CACHABLE_CUW (6<<9) /* R4[04]00MC only */
-#define _CACHE_UNCACHED_ACCELERATED (7<<9) /* R10000 only */
-
-#endif
-#endif
-
-#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
-#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
-
-#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
-
-#ifdef CONFIG_MIPS_UNCACHED
-#define PAGE_CACHABLE_DEFAULT _CACHE_UNCACHED
-#elif defined(CONFIG_NONCOHERENT_IO)
-#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_NONCOHERENT
-#else
-#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW
-#endif
-
-#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9)
-
-#endif /* _ASM_PGTABLE_BITS_H */
diff -Nru a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h
--- a/include/asm-mips64/pgtable.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,475 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2001 by Ralf Baechle at alii
- * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef _ASM_PGTABLE_H
-#define _ASM_PGTABLE_H
-
-#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/linkage.h>
-#include <linux/mmzone.h>
-#include <asm/cachectl.h>
-
-/*
- * This flag is used to indicate that the page pointed to by a pte
- * is dirty and requires cleaning before returning it to the user.
- */
-#define PG_dcache_dirty PG_arch_1
-
-#define Page_dcache_dirty(page) \
- test_bit(PG_dcache_dirty, &(page)->flags)
-#define SetPageDcacheDirty(page) \
- set_bit(PG_dcache_dirty, &(page)->flags)
-#define ClearPageDcacheDirty(page) \
- clear_bit(PG_dcache_dirty, &(page)->flags)
-
-
-/*
- * Each address space has 2 4K pages as its page directory, giving 1024
- * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
- * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to
- * page tables. Each page table is a single 4K page, giving 512 (==
- * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to
- * invalid_pmd_table, each pmde is initialized to point to
- * invalid_pte_table, each pte is initialized to 0. When memory is low,
- * and a pmd table or a page table allocation fails, empty_bad_pmd_table
- * and empty_bad_page_table is returned back to higher layer code, so
- * that the failure is recognized later on. Linux does not seem to
- * handle these failures very well though. The empty_bad_page_table has
- * invalid pte entries in it, to force page faults.
- * Vmalloc handling: vmalloc uses swapper_pg_dir[0] (returned by
- * pgd_offset_k), which is initalized to point to kpmdtbl. kpmdtbl is
- * the only single page pmd in the system. kpmdtbl entries point into
- * kptbl[] array. We reserve 1 << PGD_ORDER pages to hold the
- * vmalloc range translations, which the fault handler looks at.
- */
-
-#endif /* !__ASSEMBLY__ */
-
-/* PMD_SHIFT determines the size of the area a second-level page table can map */
-#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
-#define PMD_SIZE (1UL << PMD_SHIFT)
-#define PMD_MASK (~(PMD_SIZE-1))
-
-/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3))
-#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK (~(PGDIR_SIZE-1))
-
-/* Entries per page directory level: we use two-level, so we don't really
- have any PMD directory physically. */
-#define PTRS_PER_PGD 1024
-#define PTRS_PER_PMD 1024
-#define PTRS_PER_PTE 512
-#define PGD_ORDER 1
-#define PMD_ORDER 1
-#define PTE_ORDER 0
-
-#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
-#define FIRST_USER_PGD_NR 0
-
-#define VMALLOC_START XKSEG
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
-#define VMALLOC_END \
- (VMALLOC_START + ((1 << PGD_ORDER) * PTRS_PER_PTE * PAGE_SIZE))
-
-#include <asm/pgtable-bits.h>
-
-#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
-#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
- PAGE_CACHABLE_DEFAULT)
-#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
- PAGE_CACHABLE_DEFAULT)
-#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
- PAGE_CACHABLE_DEFAULT)
-#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
- _PAGE_GLOBAL | PAGE_CACHABLE_DEFAULT)
-#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
- PAGE_CACHABLE_DEFAULT)
-#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
- __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
-
-/*
- * MIPS can't do page protection for execute, and considers that the same like
- * read. Also, write permissions imply read permissions. This is the closest
- * we can get by reasonable means..
- */
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY
-#define __P100 PAGE_READONLY
-#define __P101 PAGE_READONLY
-#define __P110 PAGE_COPY
-#define __P111 PAGE_COPY
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED
-#define __S100 PAGE_READONLY
-#define __S101 PAGE_READONLY
-#define __S110 PAGE_SHARED
-#define __S111 PAGE_SHARED
-
-#ifndef __ASSEMBLY__
-
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
-#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
-#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
-
-/*
- * ZERO_PAGE is a global shared page that is always zero; used
- * for zero-mapped memory areas etc..
- */
-
-extern unsigned long empty_zero_page;
-extern unsigned long zero_page_mask;
-
-#define ZERO_PAGE(vaddr) \
- (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))
-
-extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];
-extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)];
-extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
-extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
-
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-#define page_pte(page) page_pte_prot(page, __pgprot(0))
-#define pmd_phys(pmd) (pmd_val(pmd) - PAGE_OFFSET)
-#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
-#define pmd_page_kernel(pmd) pmd_val(pmd)
-
-static inline unsigned long pgd_page(pgd_t pgd)
-{
- return pgd_val(pgd);
-}
-
-static inline int pte_none(pte_t pte)
-{
- return !(pte_val(pte) & ~_PAGE_GLOBAL);
-}
-
-static inline int pte_present(pte_t pte)
-{
- return pte_val(pte) & _PAGE_PRESENT;
-}
-
-/*
- * Certain architectures need to do special things when pte's
- * within a page table are directly modified. Thus, the following
- * hook is made available.
- */
-static inline void set_pte(pte_t *ptep, pte_t pteval)
-{
- *ptep = pteval;
-#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
- if (pte_val(pteval) & _PAGE_GLOBAL) {
- pte_t *buddy = ptep_buddy(ptep);
- /*
- * Make sure the buddy is global too (if it's !none,
- * it better already be global)
- */
- if (pte_none(*buddy))
- pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
- }
-#endif
-}
-
-static inline void pte_clear(pte_t *ptep)
-{
-#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
- /* Preserve global status for the pair */
- if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
- set_pte(ptep, __pte(_PAGE_GLOBAL));
- else
-#endif
- set_pte(ptep, __pte(0));
-}
-
-/*
- * (pmds are folded into pgds so this doesn't get actually called,
- * but the define is needed for a generic inline function.)
- */
-#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
-#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0)
-
-/*
- * Empty pmd entries point to the invalid_pte_table.
- */
-static inline int pmd_none(pmd_t pmd)
-{
- return pmd_val(pmd) == (unsigned long) invalid_pte_table;
-}
-
-#define pmd_bad(pmd) (pmd_val(pmd) &~ PAGE_MASK)
-
-static inline int pmd_present(pmd_t pmd)
-{
- return pmd_val(pmd) != (unsigned long) invalid_pte_table;
-}
-
-static inline void pmd_clear(pmd_t *pmdp)
-{
- pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
-}
-
-/*
- * Empty pgd entries point to the invalid_pmd_table.
- */
-static inline int pgd_none(pgd_t pgd)
-{
- return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
-}
-
-#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK)
-
-static inline int pgd_present(pgd_t pgd)
-{
- return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
-}
-
-static inline void pgd_clear(pgd_t *pgdp)
-{
- pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
-}
-
-#ifdef CONFIG_DISCONTIGMEM
-
-#define pte_page(x) (NODE_MEM_MAP(PHYSADDR_TO_NID(pte_val(x))) + \
- PLAT_NODE_DATA_LOCALNR(pte_val(x), PHYSADDR_TO_NID(pte_val(x))))
-
-#else
-#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT)))
-#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
-#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-#endif
-
-#define PTE_FILE_MAX_BITS 27
-
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
-
-/*
- * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset
- * into this range:
- */
-
-#define pte_to_pgoff(_pte) \
- ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 ))
-
-#define pgoff_to_pte(off) \
- ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE })
-
-#else
-
-/*
- * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
- * into this range:
- */
-#define pte_to_pgoff(_pte) \
- ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
-
-#define pgoff_to_pte(off) \
- ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
-
-#endif
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_user(pte_t pte) { BUG(); return 0; }
-static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
-static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
-static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
-
-static inline pte_t pte_wrprotect(pte_t pte)
-{
- pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
- return pte;
-}
-
-static inline pte_t pte_rdprotect(pte_t pte)
-{
- pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
- return pte;
-}
-
-static inline pte_t pte_mkclean(pte_t pte)
-{
- pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
- return pte;
-}
-
-static inline pte_t pte_mkold(pte_t pte)
-{
- pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
- return pte;
-}
-
-static inline pte_t pte_mkwrite(pte_t pte)
-{
- pte_val(pte) |= _PAGE_WRITE;
- if (pte_val(pte) & _PAGE_MODIFIED)
- pte_val(pte) |= _PAGE_SILENT_WRITE;
- return pte;
-}
-
-static inline pte_t pte_mkread(pte_t pte)
-{
- pte_val(pte) |= _PAGE_READ;
- if (pte_val(pte) & _PAGE_ACCESSED)
- pte_val(pte) |= _PAGE_SILENT_READ;
- return pte;
-}
-
-static inline pte_t pte_mkdirty(pte_t pte)
-{
- pte_val(pte) |= _PAGE_MODIFIED;
- if (pte_val(pte) & _PAGE_WRITE)
- pte_val(pte) |= _PAGE_SILENT_WRITE;
- return pte;
-}
-
-static inline pte_t pte_mkyoung(pte_t pte)
-{
- pte_val(pte) |= _PAGE_ACCESSED;
- if (pte_val(pte) & _PAGE_READ)
- pte_val(pte) |= _PAGE_SILENT_READ;
- return pte;
-}
-
-/*
- * Macro to make mark a page protection value as "uncacheable". Note
- * that "protection" is really a misnomer here as the protection value
- * contains the memory attribute bits, dirty bits, and various other
- * bits as well.
- */
-#define pgprot_noncached pgprot_noncached
-
-static inline pgprot_t pgprot_noncached(pgprot_t _prot)
-{
- unsigned long prot = pgprot_val(_prot);
-
- prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
-
- return __pgprot(prot);
-}
-
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
- return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
-}
-
-#define page_pte(page) page_pte_prot(page, __pgprot(0))
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, 0)
-
-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
-
-/* to find an entry in a page-table-directory */
-#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
-
-/* Find an entry in the second-level page table.. */
-static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
-{
- return (pmd_t *) pgd_page(*dir) +
- ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
-}
-
-/* Find an entry in the third-level page table.. */
-#define __pte_offset(address) \
- (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset(dir, address) \
- ((pte_t *) (pmd_page_kernel(*dir)) + __pte_offset(address))
-#define pte_offset_kernel(dir, address) \
- ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address))
-#define pte_offset_map(dir, address) \
- ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
-#define pte_offset_map_nested(dir, address) \
- ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
-#define pte_unmap(pte) ((void)(pte))
-#define pte_unmap_nested(pte) ((void)(pte))
-
-/*
- * Initialize a new pgd / pmd table with invalid pointers.
- */
-extern void pgd_init(unsigned long page);
-extern void pmd_init(unsigned long page, unsigned long pagetable);
-
-extern pgd_t swapper_pg_dir[1024];
-extern void paging_init(void);
-
-extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
- pte_t pte);
-extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
- pte_t pte);
-
-static inline void update_mmu_cache(struct vm_area_struct *vma,
- unsigned long address, pte_t pte)
-{
- __update_tlb(vma, address, pte);
- __update_cache(vma, address, pte);
-}
-
-/*
- * Non-present pages: high 24 bits are offset, next 8 bits type,
- * low 32 bits zero.
- */
-static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
-{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
-
-#define __swp_type(x) (((x).val >> 32) & 0xff)
-#define __swp_offset(x) ((x).val >> 40)
-#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
-#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-
-#ifndef CONFIG_DISCONTIGMEM
-#define kern_addr_valid(addr) (1)
-#endif
-
-/*
- * No page table caches to initialise
- */
-#define pgtable_cache_init() do { } while (0)
-
-#include <asm-generic/pgtable.h>
-
-typedef pte_t *pte_addr_t;
-
-/*
- * We provide our own get_unmapped area to cope with the virtual aliasing
- * constraints placed on us by the cache architecture.
- */
-#define HAVE_ARCH_UNMAPPED_AREA
-
-#define io_remap_page_range remap_page_range
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_PGTABLE_H */
diff -Nru a/include/asm-mips64/poll.h b/include/asm-mips64/poll.h
--- a/include/asm-mips64/poll.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-#ifndef __ASM_POLL_H
-#define __ASM_POLL_H
-
-#define POLLIN 0x0001
-#define POLLPRI 0x0002
-#define POLLOUT 0x0004
-
-#define POLLERR 0x0008
-#define POLLHUP 0x0010
-#define POLLNVAL 0x0020
-
-#define POLLRDNORM 0x0040
-#define POLLRDBAND 0x0080
-#define POLLWRNORM POLLOUT
-#define POLLWRBAND 0x0100
-
-/* These seem to be more or less nonstandard ... */
-#define POLLMSG 0x0400
-#define POLLREMOVE 0x1000
-
-struct pollfd {
- int fd;
- short events;
- short revents;
-};
-
-#endif /* __ASM_POLL_H */
diff -Nru a/include/asm-mips64/posix_types.h b/include/asm-mips64/posix_types.h
--- a/include/asm-mips64/posix_types.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,143 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_POSIX_TYPES_H
-#define _ASM_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc. Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned int __kernel_dev_t;
-typedef unsigned long __kernel_ino_t;
-typedef unsigned int __kernel_mode_t;
-typedef unsigned int __kernel_nlink_t;
-typedef long __kernel_off_t;
-typedef int __kernel_pid_t;
-typedef int __kernel_ipc_pid_t;
-typedef int __kernel_uid_t;
-typedef int __kernel_gid_t;
-typedef unsigned long __kernel_size_t;
-typedef long __kernel_ssize_t;
-typedef long __kernel_ptrdiff_t;
-typedef long __kernel_time_t;
-typedef long __kernel_suseconds_t;
-typedef long __kernel_clock_t;
-typedef int __kernel_timer_t;
-typedef int __kernel_clockid_t;
-typedef long __kernel_daddr_t;
-typedef char * __kernel_caddr_t;
-
-typedef unsigned short __kernel_uid16_t;
-typedef unsigned short __kernel_gid16_t;
-typedef int __kernel_uid32_t;
-typedef int __kernel_gid32_t;
-typedef __kernel_uid_t __kernel_old_uid_t;
-typedef __kernel_gid_t __kernel_old_gid_t;
-typedef unsigned int __kernel_old_dev_t;
-
-#ifdef __GNUC__
-typedef long long __kernel_loff_t;
-#endif
-
-typedef struct {
- int val[2];
-} __kernel_fsid_t;
-
-/* Now 32bit compatibility types */
-typedef unsigned int __kernel_dev_t32;
-typedef unsigned int __kernel_ino_t32;
-typedef unsigned int __kernel_mode_t32;
-typedef unsigned int __kernel_nlink_t32;
-typedef int __kernel_off_t32;
-typedef int __kernel_pid_t32;
-typedef int __kernel_ipc_pid_t32;
-typedef int __kernel_uid_t32;
-typedef int __kernel_gid_t32;
-typedef int __kernel_ptrdiff_t32;
-typedef int __kernel_suseconds_t32;
-typedef int __kernel_clock_t32;
-typedef int __kernel_daddr_t32;
-typedef unsigned int __kernel_caddr_t32;
-typedef __kernel_fsid_t __kernel_fsid_t32;
-
-#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
-
-#undef __FD_SET
-static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
-{
- unsigned long __tmp = __fd / __NFDBITS;
- unsigned long __rem = __fd % __NFDBITS;
- __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
-}
-
-#undef __FD_CLR
-static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
-{
- unsigned long __tmp = __fd / __NFDBITS;
- unsigned long __rem = __fd % __NFDBITS;
- __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
-}
-
-#undef __FD_ISSET
-static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
-{
- unsigned long __tmp = __fd / __NFDBITS;
- unsigned long __rem = __fd % __NFDBITS;
- return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant case (8 ints,
- * for a 256-bit fd_set)
- */
-#undef __FD_ZERO
-static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
-{
- unsigned long *__tmp = __p->fds_bits;
- int __i;
-
- if (__builtin_constant_p(__FDSET_LONGS)) {
- switch (__FDSET_LONGS) {
- case 16:
- __tmp[ 0] = 0; __tmp[ 1] = 0;
- __tmp[ 2] = 0; __tmp[ 3] = 0;
- __tmp[ 4] = 0; __tmp[ 5] = 0;
- __tmp[ 6] = 0; __tmp[ 7] = 0;
- __tmp[ 8] = 0; __tmp[ 9] = 0;
- __tmp[10] = 0; __tmp[11] = 0;
- __tmp[12] = 0; __tmp[13] = 0;
- __tmp[14] = 0; __tmp[15] = 0;
- return;
-
- case 8:
- __tmp[ 0] = 0; __tmp[ 1] = 0;
- __tmp[ 2] = 0; __tmp[ 3] = 0;
- __tmp[ 4] = 0; __tmp[ 5] = 0;
- __tmp[ 6] = 0; __tmp[ 7] = 0;
- return;
-
- case 4:
- __tmp[ 0] = 0; __tmp[ 1] = 0;
- __tmp[ 2] = 0; __tmp[ 3] = 0;
- return;
- }
- }
- __i = __FDSET_LONGS;
- while (__i) {
- __i--;
- *__tmp = 0;
- __tmp++;
- }
-}
-
-#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
-
-#endif /* _ASM_POSIX_TYPES_H */
diff -Nru a/include/asm-mips64/processor.h b/include/asm-mips64/processor.h
--- a/include/asm-mips64/processor.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,313 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 Waldorf GMBH
- * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
- * Modified further for R[236]000 compatibility by Paul M. Antoine
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_PROCESSOR_H
-#define _ASM_PROCESSOR_H
-
-#include <linux/config.h>
-
-/*
- * Return current * instruction pointer ("program counter").
- */
-#define current_text_addr() \
-({ \
- void *_a; \
- \
- __asm__ ("bal\t1f\t\t\t# current_text_addr\n" \
- "1:\tmove\t%0, $31" \
- : "=r" (_a) \
- : \
- : "$31"); \
- \
- _a; \
-})
-
-#ifndef __ASSEMBLY__
-#include <linux/cache.h>
-#include <linux/threads.h>
-
-#include <asm/cachectl.h>
-#include <asm/mipsregs.h>
-#include <asm/reg.h>
-#include <asm/system.h>
-
-#if defined(CONFIG_SGI_IP27)
-#include <asm/sn/types.h>
-#include <asm/sn/intr_public.h>
-#endif
-
-/*
- * Descriptor for a cache
- */
-struct cache_desc {
- unsigned short linesz;
- unsigned short ways;
- unsigned int sets;
- unsigned int waybit; /* Bits to select in a cache set */
- unsigned int flags; /* Flags describingcache properties */
-};
-
-/*
- * Flag definitions
- */
-#define MIPS_CACHE_NOT_PRESENT 0x00000001
-#define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
-#define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
-#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
-
-struct cpuinfo_mips {
- unsigned long udelay_val;
- unsigned long asid_cache;
-#if defined(CONFIG_SGI_IP27)
- cpuid_t p_cpuid; /* PROM assigned cpuid */
- cnodeid_t p_nodeid; /* my node ID in compact-id-space */
- nasid_t p_nasid; /* my node ID in numa-as-id-space */
- unsigned char p_slice; /* Physical position on node board */
- hub_intmasks_t p_intmasks; /* SN0 per-CPU interrupt masks */
-#endif
-#if 0
- unsigned long loops_per_sec;
- unsigned long ipi_count;
- unsigned long irq_attempt[NR_IRQS];
- unsigned long smp_local_irq_count;
- unsigned long prof_multiplier;
- unsigned long prof_counter;
-#endif
-
- /*
- * Capability and feature descriptor structure for MIPS CPU
- */
- unsigned long options;
- unsigned int processor_id;
- unsigned int fpu_id;
- unsigned int cputype;
- int isa_level;
- int tlbsize;
- struct cache_desc icache; /* Primary I-cache */
- struct cache_desc dcache; /* Primary D or combined I/D cache */
- struct cache_desc scache; /* Secondary cache */
- struct cache_desc tcache; /* Tertiary/split secondary cache */
-} __attribute__((aligned(SMP_CACHE_BYTES)));
-
-/*
- * Assumption: Options of CPU 0 are a superset of all processors.
- * This is true for all known MIPS systems.
- */
-#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
-#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
-#define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB)
-#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU)
-#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
-#define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
-#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
-#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
-#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
-#define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
-#define cpu_has_cache_cdex (cpu_data[0].options & MIPS_CPU_CACHE_CDEX)
-#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
-#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
-#define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
-#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
-#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
-#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
-#define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
-#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
-
-extern struct cpuinfo_mips cpu_data[];
-#define current_cpu_data cpu_data[smp_processor_id()]
-
-extern void cpu_probe(void);
-extern void cpu_report(void);
-
-/*
- * System setup and hardware flags..
- */
-extern void (*cpu_wait)(void);
-
-extern unsigned int vced_count, vcei_count;
-
-/*
- * Bus types (default is ISA, but people can check others with these..)
- */
-#ifdef CONFIG_EISA
-extern int EISA_bus;
-#else
-#define EISA_bus (0)
-#endif
-
-#define MCA_bus 0
-#define MCA_bus__is_a_macro /* for versions in ksyms.c */
-
-/*
- * User space process size: 1TB. This is hardcoded into a few places,
- * so don't change it unless you know what you are doing. TASK_SIZE
- * is limited to 1TB by the R4000 architecture; R10000 and better can
- * support 16TB.
- */
-#define TASK_SIZE32 0x7fff8000UL
-#define TASK_SIZE 0x10000000000UL
-
-/* This decides where the kernel will search for a free chunk of vm
- * space during mmap's.
- */
-#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
- PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
-
-/*
- * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
- */
-#define IO_BITMAP_SIZE 32
-
-#define NUM_FPU_REGS 32
-
-struct mips_fpu_hard_struct {
- unsigned long fp_regs[NUM_FPU_REGS];
- unsigned int control;
-};
-
-/*
- * It would be nice to add some more fields for emulator statistics, but there
- * are a number of fixed offsets in offset.h and elsewhere that would have to
- * be recalculated by hand. So the additional information will be private to
- * the FPU emulator for now. See asm-mips/fpu_emulator.h.
- */
-typedef u64 fpureg_t;
-struct mips_fpu_soft_struct {
- fpureg_t regs[NUM_FPU_REGS];
- unsigned int sr;
-};
-
-
-union mips_fpu_union {
- struct mips_fpu_hard_struct hard;
- struct mips_fpu_soft_struct soft;
-};
-
-#define INIT_FPU { \
- {{0,},} \
-}
-
-typedef struct {
- unsigned long seg;
-} mm_segment_t;
-
-/*
- * If you change thread_struct remember to change the #defines below too!
- */
-struct thread_struct {
- /* Saved main processor registers. */
- unsigned long reg16;
- unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
- unsigned long reg29, reg30, reg31;
-
- /* Saved cp0 stuff. */
- unsigned long cp0_status;
-
- /* Saved fpu/fpu emulator stuff. */
- union mips_fpu_union fpu;
-
- /* Other stuff associated with the thread. */
- unsigned long cp0_badvaddr; /* Last user fault */
- unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
- unsigned long error_code;
- unsigned long trap_no;
-#define MF_FIXADE 1 /* Fix address errors in software */
-#define MF_LOGADE 2 /* Log address errors to syslog */
-#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
-#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
- unsigned long mflags;
- unsigned long irix_trampoline; /* Wheee... */
- unsigned long irix_oldctx;
-};
-
-#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
-#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
-#define MF_N32 MF_32BIT_ADDR
-#define MF_N64 0
-
-#endif /* !__ASSEMBLY__ */
-
-#define INIT_THREAD { \
- /* \
- * saved main processor registers \
- */ \
- 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, \
- /* \
- * saved cp0 stuff \
- */ \
- 0, \
- /* \
- * saved fpu/fpu emulator stuff \
- */ \
- INIT_FPU, \
- /* \
- * Other stuff associated with the process \
- */ \
- 0, 0, 0, 0, \
- /* \
- * For now the default is to fix address errors \
- */ \
- MF_FIXADE, 0, 0 \
-}
-
-#ifdef __KERNEL__
-
-#define KERNEL_STACK_SIZE 0x4000
-
-#ifndef __ASSEMBLY__
-
-/* Free all resources held by a thread. */
-#define release_thread(thread) do { } while(0)
-
-/* Prepare to copy thread state - unlazy all lazy status */
-#define prepare_to_copy(tsk) do { } while (0)
-
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
-extern unsigned long thread_saved_pc(struct thread_struct *t);
-
-#define user_mode(regs) (((regs)->cp0_status & ST0_KSU) == KSU_USER)
-
-/*
- * Do necessary setup to start up a newly executed thread.
- */
-extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
-
-struct task_struct;
-unsigned long get_wchan(struct task_struct *p);
-
-#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
-#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + KERNEL_STACK_SIZE - 32)
-#define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
-#define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
-#define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))
-
-#define cpu_relax() barrier()
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __KERNEL__ */
-
-/*
- * Return_address is a replacement for __builtin_return_address(count)
- * which on certain architectures cannot reasonably be implemented in GCC
- * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
- * Note that __builtin_return_address(x>=1) is forbidden because GCC
- * aborts compilation on some CPUs. It's simply not possible to unwind
- * some CPU's stackframes.
- *
- * In gcc 2.8 and newer __builtin_return_address works only for non-leaf
- * functions. We avoid the overhead of a function call by forcing the
- * compiler to save the return address register on the stack.
- */
-#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
-
-#endif /* _ASM_PROCESSOR_H */
diff -Nru a/include/asm-mips64/ptrace.h b/include/asm-mips64/ptrace.h
--- a/include/asm-mips64/ptrace.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,84 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_PTRACE_H
-#define _ASM_PTRACE_H
-
-/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
-#define FPR_BASE 32
-#define PC 64
-#define CAUSE 65
-#define BADVADDR 66
-#define MMHI 67
-#define MMLO 68
-#define FPC_CSR 69
-#define FPC_EIR 70
-
-#ifndef __ASSEMBLY__
-
-#define abi64_no_regargs \
- unsigned long __dummy0, \
- unsigned long __dummy1, \
- unsigned long __dummy2, \
- unsigned long __dummy3, \
- unsigned long __dummy4, \
- unsigned long __dummy5, \
- unsigned long __dummy6, \
- unsigned long __dummy7
-
-/*
- * This struct defines the way the registers are stored on the stack during a
- * system call/exception. As usual the registers k0/k1 aren't being saved.
- */
-struct pt_regs {
- /* Saved main processor registers. */
- unsigned long regs[32];
-
- /* Other saved registers. */
- unsigned long lo;
- unsigned long hi;
-
- /*
- * saved cp0 registers
- */
- unsigned long cp0_epc;
- unsigned long cp0_badvaddr;
- unsigned long cp0_status;
- unsigned long cp0_cause;
-};
-
-#endif /* !__ASSEMBLY__ */
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-/* #define PTRACE_GETREGS 12 */
-/* #define PTRACE_SETREGS 13 */
-/* #define PTRACE_GETFPREGS 14 */
-/* #define PTRACE_SETFPREGS 15 */
-/* #define PTRACE_GETFPXREGS 18 */
-/* #define PTRACE_SETFPXREGS 19 */
-
-#define PTRACE_OLDSETOPTIONS 21
-
-#define PTRACE_GET_THREAD_AREA 25
-#define PTRACE_SET_THREAD_AREA 26
-
-#ifdef __ASSEMBLY__
-#include <asm/offset.h>
-#endif /* !__ASSEMBLY__ */
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-#define instruction_pointer(regs) ((regs)->cp0_epc)
-
-extern void show_regs(struct pt_regs *);
-#endif /* !__ASSEMBLY__ */
-
-#endif
-
-#endif /* _ASM_PTRACE_H */
diff -Nru a/include/asm-mips64/r4kcache.h b/include/asm-mips64/r4kcache.h
--- a/include/asm-mips64/r4kcache.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,569 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Inline assembly cache operations.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997 - 2002 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef __ASM_R4KCACHE_H
-#define __ASM_R4KCACHE_H
-
-#include <asm/asm.h>
-#include <asm/cacheops.h>
-
-#define cache_op(op,addr) \
- __asm__ __volatile__( \
- " .set noreorder \n" \
- " .set mips3\n\t \n" \
- " cache %0, %1 \n" \
- " .set mips0 \n" \
- " .set reorder" \
- : \
- : "i" (op), "m" (*(unsigned char *)(addr)))
-
-static inline void flush_icache_line_indexed(unsigned long addr)
-{
- cache_op(Index_Invalidate_I, addr);
-}
-
-static inline void flush_dcache_line_indexed(unsigned long addr)
-{
- cache_op(Index_Writeback_Inv_D, addr);
-}
-
-static inline void flush_scache_line_indexed(unsigned long addr)
-{
- cache_op(Index_Writeback_Inv_SD, addr);
-}
-
-static inline void flush_icache_line(unsigned long addr)
-{
- cache_op(Hit_Invalidate_I, addr);
-}
-
-static inline void flush_dcache_line(unsigned long addr)
-{
- cache_op(Hit_Writeback_Inv_D, addr);
-}
-
-static inline void invalidate_dcache_line(unsigned long addr)
-{
- cache_op(Hit_Invalidate_D, addr);
-}
-
-static inline void invalidate_scache_line(unsigned long addr)
-{
- cache_op(Hit_Invalidate_SD, addr);
-}
-
-static inline void flush_scache_line(unsigned long addr)
-{
- cache_op(Hit_Writeback_Inv_SD, addr);
-}
-
-/*
- * The next two are for badland addresses like signal trampolines.
- */
-static inline void protected_flush_icache_line(unsigned long addr)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- ".set mips3\n"
- "1:\tcache %0,(%1)\n"
- "2:\t.set mips0\n\t"
- ".set reorder\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b,2b\n\t"
- ".previous"
- :
- : "i" (Hit_Invalidate_I), "r" (addr));
-}
-
-/*
- * R10000 / R12000 hazard - these processors don't support the Hit_Writeback_D
- * cacheop so we use Hit_Writeback_Inv_D which is supported by all R4000-style
- * caches. We're talking about one cacheline unnecessarily getting invalidated
- * here so the penaltiy isn't overly hard.
- */
-static inline void protected_writeback_dcache_line(unsigned long addr)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- ".set mips3\n"
- "1:\tcache %0,(%1)\n"
- "2:\t.set mips0\n\t"
- ".set reorder\n\t"
- ".section\t__ex_table,\"a\"\n\t"
- STR(PTR)"\t1b,2b\n\t"
- ".previous"
- :
- : "i" (Hit_Writeback_Inv_D), "r" (addr));
-}
-
-/*
- * This one is RM7000-specific
- */
-static inline void invalidate_tcache_page(unsigned long addr)
-{
- cache_op(Page_Invalidate_T, addr);
-}
-
-#define cache16_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x010(%0); \
- cache %1, 0x020(%0); cache %1, 0x030(%0); \
- cache %1, 0x040(%0); cache %1, 0x050(%0); \
- cache %1, 0x060(%0); cache %1, 0x070(%0); \
- cache %1, 0x080(%0); cache %1, 0x090(%0); \
- cache %1, 0x0a0(%0); cache %1, 0x0b0(%0); \
- cache %1, 0x0c0(%0); cache %1, 0x0d0(%0); \
- cache %1, 0x0e0(%0); cache %1, 0x0f0(%0); \
- cache %1, 0x100(%0); cache %1, 0x110(%0); \
- cache %1, 0x120(%0); cache %1, 0x130(%0); \
- cache %1, 0x140(%0); cache %1, 0x150(%0); \
- cache %1, 0x160(%0); cache %1, 0x170(%0); \
- cache %1, 0x180(%0); cache %1, 0x190(%0); \
- cache %1, 0x1a0(%0); cache %1, 0x1b0(%0); \
- cache %1, 0x1c0(%0); cache %1, 0x1d0(%0); \
- cache %1, 0x1e0(%0); cache %1, 0x1f0(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
-static inline void blast_dcache16(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + dcache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
- unsigned long ws_end = current_cpu_data.dcache.ways <<
- current_cpu_data.dcache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x200)
- cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
-}
-
-static inline void blast_dcache16_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
-
- while (start < end) {
- cache16_unroll32(start,Hit_Writeback_Inv_D);
- start += 0x200;
- }
-}
-
-static inline void blast_dcache16_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
- unsigned long ws_end = current_cpu_data.dcache.ways <<
- current_cpu_data.dcache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x200)
- cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
-}
-
-static inline void blast_icache16(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + icache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x200)
- cache16_unroll32(addr|ws,Index_Invalidate_I);
-}
-
-static inline void blast_icache16_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
-
- while (start < end) {
- cache16_unroll32(start,Hit_Invalidate_I);
- start += 0x200;
- }
-}
-
-static inline void blast_icache16_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x200)
- cache16_unroll32(addr|ws,Index_Invalidate_I);
-}
-
-static inline void blast_scache16(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x200)
- cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-static inline void blast_scache16_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = page + PAGE_SIZE;
-
- while (start < end) {
- cache16_unroll32(start,Hit_Writeback_Inv_SD);
- start += 0x200;
- }
-}
-
-static inline void blast_scache16_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x200)
- cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-#define cache32_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x020(%0); \
- cache %1, 0x040(%0); cache %1, 0x060(%0); \
- cache %1, 0x080(%0); cache %1, 0x0a0(%0); \
- cache %1, 0x0c0(%0); cache %1, 0x0e0(%0); \
- cache %1, 0x100(%0); cache %1, 0x120(%0); \
- cache %1, 0x140(%0); cache %1, 0x160(%0); \
- cache %1, 0x180(%0); cache %1, 0x1a0(%0); \
- cache %1, 0x1c0(%0); cache %1, 0x1e0(%0); \
- cache %1, 0x200(%0); cache %1, 0x220(%0); \
- cache %1, 0x240(%0); cache %1, 0x260(%0); \
- cache %1, 0x280(%0); cache %1, 0x2a0(%0); \
- cache %1, 0x2c0(%0); cache %1, 0x2e0(%0); \
- cache %1, 0x300(%0); cache %1, 0x320(%0); \
- cache %1, 0x340(%0); cache %1, 0x360(%0); \
- cache %1, 0x380(%0); cache %1, 0x3a0(%0); \
- cache %1, 0x3c0(%0); cache %1, 0x3e0(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
-static inline void blast_dcache32(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + dcache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
- unsigned long ws_end = current_cpu_data.dcache.ways <<
- current_cpu_data.dcache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400)
- cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
-}
-
-static inline void blast_dcache32_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
-
- while (start < end) {
- cache32_unroll32(start,Hit_Writeback_Inv_D);
- start += 0x400;
- }
-}
-
-static inline void blast_dcache32_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
- unsigned long ws_end = current_cpu_data.dcache.ways <<
- current_cpu_data.dcache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400)
- cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
-}
-
-static inline void blast_icache32(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + icache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400)
- cache32_unroll32(addr|ws,Index_Invalidate_I);
-}
-
-static inline void blast_icache32_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
-
- while (start < end) {
- cache32_unroll32(start,Hit_Invalidate_I);
- start += 0x400;
- }
-}
-
-static inline void blast_icache32_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400)
- cache32_unroll32(addr|ws,Index_Invalidate_I);
-}
-
-static inline void blast_scache32(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400)
- cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-static inline void blast_scache32_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = page + PAGE_SIZE;
-
- while (start < end) {
- cache32_unroll32(start,Hit_Writeback_Inv_SD);
- start += 0x400;
- }
-}
-
-static inline void blast_scache32_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400)
- cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-#define cache64_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x040(%0); \
- cache %1, 0x080(%0); cache %1, 0x0c0(%0); \
- cache %1, 0x100(%0); cache %1, 0x140(%0); \
- cache %1, 0x180(%0); cache %1, 0x1c0(%0); \
- cache %1, 0x200(%0); cache %1, 0x240(%0); \
- cache %1, 0x280(%0); cache %1, 0x2c0(%0); \
- cache %1, 0x300(%0); cache %1, 0x340(%0); \
- cache %1, 0x380(%0); cache %1, 0x3c0(%0); \
- cache %1, 0x400(%0); cache %1, 0x440(%0); \
- cache %1, 0x480(%0); cache %1, 0x4c0(%0); \
- cache %1, 0x500(%0); cache %1, 0x540(%0); \
- cache %1, 0x580(%0); cache %1, 0x5c0(%0); \
- cache %1, 0x600(%0); cache %1, 0x640(%0); \
- cache %1, 0x680(%0); cache %1, 0x6c0(%0); \
- cache %1, 0x700(%0); cache %1, 0x740(%0); \
- cache %1, 0x780(%0); cache %1, 0x7c0(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
-static inline void blast_icache64(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + icache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x800)
- cache64_unroll32(addr|ws,Index_Invalidate_I);
-}
-
-static inline void blast_icache64_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
-
- while (start < end) {
- cache64_unroll32(start,Hit_Invalidate_I);
- start += 0x800;
- }
-}
-
-static inline void blast_icache64_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x800)
- cache64_unroll32(addr|ws,Index_Invalidate_I);
-}
-
-static inline void blast_scache64(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x800)
- cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-static inline void blast_scache64_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = page + PAGE_SIZE;
-
- while (start < end) {
- cache64_unroll32(start,Hit_Writeback_Inv_SD);
- start += 0x800;
- }
-}
-
-static inline void blast_scache64_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x800)
- cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-#define cache128_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x080(%0); \
- cache %1, 0x100(%0); cache %1, 0x180(%0); \
- cache %1, 0x200(%0); cache %1, 0x280(%0); \
- cache %1, 0x300(%0); cache %1, 0x380(%0); \
- cache %1, 0x400(%0); cache %1, 0x480(%0); \
- cache %1, 0x500(%0); cache %1, 0x580(%0); \
- cache %1, 0x600(%0); cache %1, 0x680(%0); \
- cache %1, 0x700(%0); cache %1, 0x780(%0); \
- cache %1, 0x800(%0); cache %1, 0x880(%0); \
- cache %1, 0x900(%0); cache %1, 0x980(%0); \
- cache %1, 0xa00(%0); cache %1, 0xa80(%0); \
- cache %1, 0xb00(%0); cache %1, 0xb80(%0); \
- cache %1, 0xc00(%0); cache %1, 0xc80(%0); \
- cache %1, 0xd00(%0); cache %1, 0xd80(%0); \
- cache %1, 0xe00(%0); cache %1, 0xe80(%0); \
- cache %1, 0xf00(%0); cache %1, 0xf80(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
-static inline void blast_scache128(void)
-{
- unsigned long start = KSEG0;
- unsigned long end = start + scache_way_size;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x1000)
- cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-static inline void blast_scache128_page(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = page + PAGE_SIZE;
-
- while (start < end) {
- cache128_unroll32(start,Hit_Writeback_Inv_SD);
- start += 0x1000;
- }
-}
-
-static inline void blast_scache128_page_indexed(unsigned long page)
-{
- unsigned long start = page;
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
- unsigned long ws_end = current_cpu_data.scache.ways <<
- current_cpu_data.scache.waybit;
- unsigned long ws, addr;
-
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x1000)
- cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
-}
-
-#endif /* __ASM_R4KCACHE_H */
diff -Nru a/include/asm-mips64/reboot.h b/include/asm-mips64/reboot.h
--- a/include/asm-mips64/reboot.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,16 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 1999, 2001 by Ralf Baechle
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#ifndef _ASM_REBOOT_H
-#define _ASM_REBOOT_H
-
-extern void (*_machine_restart)(char *command);
-extern void (*_machine_halt)(void);
-extern void (*_machine_power_off)(void);
-
-#endif /* _ASM_REBOOT_H */
diff -Nru a/include/asm-mips64/reg.h b/include/asm-mips64/reg.h
--- a/include/asm-mips64/reg.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,67 +0,0 @@
-/*
- * Various register offset definitions for debuggers, core file
- * examiners and whatnot.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999 Ralf Baechle
- * Copyright (C) 1995, 1999 Silicon Graphics
- */
-#ifndef _ASM_REG_H
-#define _ASM_REG_H
-
-/*
- * This defines/structures correspond to the register layout on stack -
- * if the order here is changed, it needs to be updated in
- * include/asm-mips/stackframe.h
- */
-#define EF_REG0 0
-#define EF_REG1 1
-#define EF_REG2 2
-#define EF_REG3 3
-#define EF_REG4 4
-#define EF_REG5 5
-#define EF_REG6 6
-#define EF_REG7 7
-#define EF_REG8 8
-#define EF_REG9 9
-#define EF_REG10 10
-#define EF_REG11 11
-#define EF_REG12 12
-#define EF_REG13 13
-#define EF_REG14 14
-#define EF_REG15 15
-#define EF_REG16 16
-#define EF_REG17 17
-#define EF_REG18 18
-#define EF_REG19 19
-#define EF_REG20 20
-#define EF_REG21 21
-#define EF_REG22 22
-#define EF_REG23 23
-#define EF_REG24 24
-#define EF_REG25 25
-/*
- * k0/k1 unsaved
- */
-#define EF_REG28 28
-#define EF_REG29 29
-#define EF_REG30 30
-#define EF_REG31 31
-
-/*
- * Saved special registers
- */
-#define EF_LO 32
-#define EF_HI 33
-
-#define EF_CP0_EPC 34
-#define EF_CP0_BADVADDR 35
-#define EF_CP0_STATUS 36
-#define EF_CP0_CAUSE 37
-
-#define EF_SIZE 304 /* size in bytes */
-
-#endif /* _ASM_REG_H */
diff -Nru a/include/asm-mips64/regdef.h b/include/asm-mips64/regdef.h
--- a/include/asm-mips64/regdef.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,52 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1985 MIPS Computer Systems, Inc.
- * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle
- */
-#ifndef _ASM_REGDEF_H
-#define _ASM_REGDEF_H
-
-#define zero $0 /* wired zero */
-#define AT $at /* assembler temp - uppercase because of ".set at" */
-#define v0 $2 /* return value - caller saved */
-#define v1 $3
-#define a0 $4 /* argument registers */
-#define a1 $5
-#define a2 $6
-#define a3 $7
-#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
-#define ta0 $8
-#define a5 $9
-#define ta1 $9
-#define a6 $10
-#define ta2 $10
-#define a7 $11
-#define ta3 $11
-#define t0 $12 /* caller saved */
-#define t1 $13
-#define t2 $14
-#define t3 $15
-#define s0 $16 /* callee saved */
-#define s1 $17
-#define s2 $18
-#define s3 $19
-#define s4 $20
-#define s5 $21
-#define s6 $22
-#define s7 $23
-#define t8 $24 /* caller saved */
-#define t9 $25 /* callee address for PIC/temp */
-#define jp $25 /* PIC jump register */
-#define k0 $26 /* kernel temporary */
-#define k1 $27
-#define gp $28 /* global pointer - caller saved for PIC */
-#define sp $29 /* stack pointer */
-#define fp $30 /* frame pointer */
-#define s8 $30 /* callee saved */
-#define ra $31 /* return address */
-
-#endif /* _ASM_REGDEF_H */
diff -Nru a/include/asm-mips64/resource.h b/include/asm-mips64/resource.h
--- a/include/asm-mips64/resource.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,54 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1998, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_RESOURCE_H
-#define _ASM_RESOURCE_H
-
-/*
- * Resource limits
- */
-#define RLIMIT_CPU 0 /* CPU time in ms */
-#define RLIMIT_FSIZE 1 /* Maximum filesize */
-#define RLIMIT_DATA 2 /* max data size */
-#define RLIMIT_STACK 3 /* max stack size */
-#define RLIMIT_CORE 4 /* max core file size */
-#define RLIMIT_NOFILE 5 /* max number of open files */
-#define RLIMIT_AS 6 /* mapped memory */
-#define RLIMIT_RSS 7 /* max resident set size */
-#define RLIMIT_NPROC 8 /* max number of processes */
-#define RLIMIT_MEMLOCK 9 /* max locked-in-memory address space */
-#define RLIMIT_LOCKS 10 /* maximum file locks held */
-
-#define RLIM_NLIMITS 11 /* Number of limit flavors. */
-
-#ifdef __KERNEL__
-
-/*
- * SuS says limits have to be unsigned.
- * Which makes a ton more sense anyway.
- */
-#define RLIM_INFINITY (~0UL)
-
-#define INIT_RLIMITS \
-{ \
- { RLIM_INFINITY, RLIM_INFINITY }, \
- { RLIM_INFINITY, RLIM_INFINITY }, \
- { RLIM_INFINITY, RLIM_INFINITY }, \
- { _STK_LIM, RLIM_INFINITY }, \
- { 0, RLIM_INFINITY }, \
- { INR_OPEN, INR_OPEN }, \
- { RLIM_INFINITY, RLIM_INFINITY }, \
- { RLIM_INFINITY, RLIM_INFINITY }, \
- { 0, 0 }, \
- { RLIM_INFINITY, RLIM_INFINITY }, \
- { RLIM_INFINITY, RLIM_INFINITY }, \
-}
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_RESOURCE_H */
diff -Nru a/include/asm-mips64/riscos-syscall.h b/include/asm-mips64/riscos-syscall.h
--- a/include/asm-mips64/riscos-syscall.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,979 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
- */
-#ifndef _ASM_RISCOS_SYSCALL_H
-#define _ASM_RISCOS_SYSCALL_H
-
-/*
- * The syscalls 0 - 3999 are reserved for a down to the root syscall
- * compatibility with RISC/os and IRIX. We'll see how to deal with the
- * various "real" BSD variants like Ultrix, NetBSD ...
- */
-
-/*
- * SVR4 syscalls are in the range from 1 to 999
- */
-#define __NR_SVR4 0
-#define __NR_SVR4_syscall (__NR_SVR4 + 0)
-#define __NR_SVR4_exit (__NR_SVR4 + 1)
-#define __NR_SVR4_fork (__NR_SVR4 + 2)
-#define __NR_SVR4_read (__NR_SVR4 + 3)
-#define __NR_SVR4_write (__NR_SVR4 + 4)
-#define __NR_SVR4_open (__NR_SVR4 + 5)
-#define __NR_SVR4_close (__NR_SVR4 + 6)
-#define __NR_SVR4_wait (__NR_SVR4 + 7)
-#define __NR_SVR4_creat (__NR_SVR4 + 8)
-#define __NR_SVR4_link (__NR_SVR4 + 9)
-#define __NR_SVR4_unlink (__NR_SVR4 + 10)
-#define __NR_SVR4_exec (__NR_SVR4 + 11)
-#define __NR_SVR4_chdir (__NR_SVR4 + 12)
-#define __NR_SVR4_gtime (__NR_SVR4 + 13)
-#define __NR_SVR4_mknod (__NR_SVR4 + 14)
-#define __NR_SVR4_chmod (__NR_SVR4 + 15)
-#define __NR_SVR4_chown (__NR_SVR4 + 16)
-#define __NR_SVR4_sbreak (__NR_SVR4 + 17)
-#define __NR_SVR4_stat (__NR_SVR4 + 18)
-#define __NR_SVR4_lseek (__NR_SVR4 + 19)
-#define __NR_SVR4_getpid (__NR_SVR4 + 20)
-#define __NR_SVR4_mount (__NR_SVR4 + 21)
-#define __NR_SVR4_umount (__NR_SVR4 + 22)
-#define __NR_SVR4_setuid (__NR_SVR4 + 23)
-#define __NR_SVR4_getuid (__NR_SVR4 + 24)
-#define __NR_SVR4_stime (__NR_SVR4 + 25)
-#define __NR_SVR4_ptrace (__NR_SVR4 + 26)
-#define __NR_SVR4_alarm (__NR_SVR4 + 27)
-#define __NR_SVR4_fstat (__NR_SVR4 + 28)
-#define __NR_SVR4_pause (__NR_SVR4 + 29)
-#define __NR_SVR4_utime (__NR_SVR4 + 30)
-#define __NR_SVR4_stty (__NR_SVR4 + 31)
-#define __NR_SVR4_gtty (__NR_SVR4 + 32)
-#define __NR_SVR4_access (__NR_SVR4 + 33)
-#define __NR_SVR4_nice (__NR_SVR4 + 34)
-#define __NR_SVR4_statfs (__NR_SVR4 + 35)
-#define __NR_SVR4_sync (__NR_SVR4 + 36)
-#define __NR_SVR4_kill (__NR_SVR4 + 37)
-#define __NR_SVR4_fstatfs (__NR_SVR4 + 38)
-#define __NR_SVR4_setpgrp (__NR_SVR4 + 39)
-#define __NR_SVR4_cxenix (__NR_SVR4 + 40)
-#define __NR_SVR4_dup (__NR_SVR4 + 41)
-#define __NR_SVR4_pipe (__NR_SVR4 + 42)
-#define __NR_SVR4_times (__NR_SVR4 + 43)
-#define __NR_SVR4_profil (__NR_SVR4 + 44)
-#define __NR_SVR4_plock (__NR_SVR4 + 45)
-#define __NR_SVR4_setgid (__NR_SVR4 + 46)
-#define __NR_SVR4_getgid (__NR_SVR4 + 47)
-#define __NR_SVR4_sig (__NR_SVR4 + 48)
-#define __NR_SVR4_msgsys (__NR_SVR4 + 49)
-#define __NR_SVR4_sysmips (__NR_SVR4 + 50)
-#define __NR_SVR4_sysacct (__NR_SVR4 + 51)
-#define __NR_SVR4_shmsys (__NR_SVR4 + 52)
-#define __NR_SVR4_semsys (__NR_SVR4 + 53)
-#define __NR_SVR4_ioctl (__NR_SVR4 + 54)
-#define __NR_SVR4_uadmin (__NR_SVR4 + 55)
-#define __NR_SVR4_exch (__NR_SVR4 + 56)
-#define __NR_SVR4_utssys (__NR_SVR4 + 57)
-#define __NR_SVR4_fsync (__NR_SVR4 + 58)
-#define __NR_SVR4_exece (__NR_SVR4 + 59)
-#define __NR_SVR4_umask (__NR_SVR4 + 60)
-#define __NR_SVR4_chroot (__NR_SVR4 + 61)
-#define __NR_SVR4_fcntl (__NR_SVR4 + 62)
-#define __NR_SVR4_ulimit (__NR_SVR4 + 63)
-#define __NR_SVR4_reserved1 (__NR_SVR4 + 64)
-#define __NR_SVR4_reserved2 (__NR_SVR4 + 65)
-#define __NR_SVR4_reserved3 (__NR_SVR4 + 66)
-#define __NR_SVR4_reserved4 (__NR_SVR4 + 67)
-#define __NR_SVR4_reserved5 (__NR_SVR4 + 68)
-#define __NR_SVR4_reserved6 (__NR_SVR4 + 69)
-#define __NR_SVR4_advfs (__NR_SVR4 + 70)
-#define __NR_SVR4_unadvfs (__NR_SVR4 + 71)
-#define __NR_SVR4_unused1 (__NR_SVR4 + 72)
-#define __NR_SVR4_unused2 (__NR_SVR4 + 73)
-#define __NR_SVR4_rfstart (__NR_SVR4 + 74)
-#define __NR_SVR4_unused3 (__NR_SVR4 + 75)
-#define __NR_SVR4_rdebug (__NR_SVR4 + 76)
-#define __NR_SVR4_rfstop (__NR_SVR4 + 77)
-#define __NR_SVR4_rfsys (__NR_SVR4 + 78)
-#define __NR_SVR4_rmdir (__NR_SVR4 + 79)
-#define __NR_SVR4_mkdir (__NR_SVR4 + 80)
-#define __NR_SVR4_getdents (__NR_SVR4 + 81)
-#define __NR_SVR4_libattach (__NR_SVR4 + 82)
-#define __NR_SVR4_libdetach (__NR_SVR4 + 83)
-#define __NR_SVR4_sysfs (__NR_SVR4 + 84)
-#define __NR_SVR4_getmsg (__NR_SVR4 + 85)
-#define __NR_SVR4_putmsg (__NR_SVR4 + 86)
-#define __NR_SVR4_poll (__NR_SVR4 + 87)
-#define __NR_SVR4_lstat (__NR_SVR4 + 88)
-#define __NR_SVR4_symlink (__NR_SVR4 + 89)
-#define __NR_SVR4_readlink (__NR_SVR4 + 90)
-#define __NR_SVR4_setgroups (__NR_SVR4 + 91)
-#define __NR_SVR4_getgroups (__NR_SVR4 + 92)
-#define __NR_SVR4_fchmod (__NR_SVR4 + 93)
-#define __NR_SVR4_fchown (__NR_SVR4 + 94)
-#define __NR_SVR4_sigprocmask (__NR_SVR4 + 95)
-#define __NR_SVR4_sigsuspend (__NR_SVR4 + 96)
-#define __NR_SVR4_sigaltstack (__NR_SVR4 + 97)
-#define __NR_SVR4_sigaction (__NR_SVR4 + 98)
-#define __NR_SVR4_sigpending (__NR_SVR4 + 99)
-#define __NR_SVR4_setcontext (__NR_SVR4 + 100)
-#define __NR_SVR4_evsys (__NR_SVR4 + 101)
-#define __NR_SVR4_evtrapret (__NR_SVR4 + 102)
-#define __NR_SVR4_statvfs (__NR_SVR4 + 103)
-#define __NR_SVR4_fstatvfs (__NR_SVR4 + 104)
-#define __NR_SVR4_reserved7 (__NR_SVR4 + 105)
-#define __NR_SVR4_nfssys (__NR_SVR4 + 106)
-#define __NR_SVR4_waitid (__NR_SVR4 + 107)
-#define __NR_SVR4_sigsendset (__NR_SVR4 + 108)
-#define __NR_SVR4_hrtsys (__NR_SVR4 + 109)
-#define __NR_SVR4_acancel (__NR_SVR4 + 110)
-#define __NR_SVR4_async (__NR_SVR4 + 111)
-#define __NR_SVR4_priocntlset (__NR_SVR4 + 112)
-#define __NR_SVR4_pathconf (__NR_SVR4 + 113)
-#define __NR_SVR4_mincore (__NR_SVR4 + 114)
-#define __NR_SVR4_mmap (__NR_SVR4 + 115)
-#define __NR_SVR4_mprotect (__NR_SVR4 + 116)
-#define __NR_SVR4_munmap (__NR_SVR4 + 117)
-#define __NR_SVR4_fpathconf (__NR_SVR4 + 118)
-#define __NR_SVR4_vfork (__NR_SVR4 + 119)
-#define __NR_SVR4_fchdir (__NR_SVR4 + 120)
-#define __NR_SVR4_readv (__NR_SVR4 + 121)
-#define __NR_SVR4_writev (__NR_SVR4 + 122)
-#define __NR_SVR4_xstat (__NR_SVR4 + 123)
-#define __NR_SVR4_lxstat (__NR_SVR4 + 124)
-#define __NR_SVR4_fxstat (__NR_SVR4 + 125)
-#define __NR_SVR4_xmknod (__NR_SVR4 + 126)
-#define __NR_SVR4_clocal (__NR_SVR4 + 127)
-#define __NR_SVR4_setrlimit (__NR_SVR4 + 128)
-#define __NR_SVR4_getrlimit (__NR_SVR4 + 129)
-#define __NR_SVR4_lchown (__NR_SVR4 + 130)
-#define __NR_SVR4_memcntl (__NR_SVR4 + 131)
-#define __NR_SVR4_getpmsg (__NR_SVR4 + 132)
-#define __NR_SVR4_putpmsg (__NR_SVR4 + 133)
-#define __NR_SVR4_rename (__NR_SVR4 + 134)
-#define __NR_SVR4_nuname (__NR_SVR4 + 135)
-#define __NR_SVR4_setegid (__NR_SVR4 + 136)
-#define __NR_SVR4_sysconf (__NR_SVR4 + 137)
-#define __NR_SVR4_adjtime (__NR_SVR4 + 138)
-#define __NR_SVR4_sysinfo (__NR_SVR4 + 139)
-#define __NR_SVR4_reserved8 (__NR_SVR4 + 140)
-#define __NR_SVR4_seteuid (__NR_SVR4 + 141)
-#define __NR_SVR4_PYRAMID_statis (__NR_SVR4 + 142)
-#define __NR_SVR4_PYRAMID_tuning (__NR_SVR4 + 143)
-#define __NR_SVR4_PYRAMID_forcerr (__NR_SVR4 + 144)
-#define __NR_SVR4_PYRAMID_mpcntl (__NR_SVR4 + 145)
-#define __NR_SVR4_reserved9 (__NR_SVR4 + 146)
-#define __NR_SVR4_reserved10 (__NR_SVR4 + 147)
-#define __NR_SVR4_reserved11 (__NR_SVR4 + 148)
-#define __NR_SVR4_reserved12 (__NR_SVR4 + 149)
-#define __NR_SVR4_reserved13 (__NR_SVR4 + 150)
-#define __NR_SVR4_reserved14 (__NR_SVR4 + 151)
-#define __NR_SVR4_reserved15 (__NR_SVR4 + 152)
-#define __NR_SVR4_reserved16 (__NR_SVR4 + 153)
-#define __NR_SVR4_reserved17 (__NR_SVR4 + 154)
-#define __NR_SVR4_reserved18 (__NR_SVR4 + 155)
-#define __NR_SVR4_reserved19 (__NR_SVR4 + 156)
-#define __NR_SVR4_reserved20 (__NR_SVR4 + 157)
-#define __NR_SVR4_reserved21 (__NR_SVR4 + 158)
-#define __NR_SVR4_reserved22 (__NR_SVR4 + 159)
-#define __NR_SVR4_reserved23 (__NR_SVR4 + 160)
-#define __NR_SVR4_reserved24 (__NR_SVR4 + 161)
-#define __NR_SVR4_reserved25 (__NR_SVR4 + 162)
-#define __NR_SVR4_reserved26 (__NR_SVR4 + 163)
-#define __NR_SVR4_reserved27 (__NR_SVR4 + 164)
-#define __NR_SVR4_reserved28 (__NR_SVR4 + 165)
-#define __NR_SVR4_reserved29 (__NR_SVR4 + 166)
-#define __NR_SVR4_reserved30 (__NR_SVR4 + 167)
-#define __NR_SVR4_reserved31 (__NR_SVR4 + 168)
-#define __NR_SVR4_reserved32 (__NR_SVR4 + 169)
-#define __NR_SVR4_reserved33 (__NR_SVR4 + 170)
-#define __NR_SVR4_reserved34 (__NR_SVR4 + 171)
-#define __NR_SVR4_reserved35 (__NR_SVR4 + 172)
-#define __NR_SVR4_reserved36 (__NR_SVR4 + 173)
-#define __NR_SVR4_reserved37 (__NR_SVR4 + 174)
-#define __NR_SVR4_reserved38 (__NR_SVR4 + 175)
-#define __NR_SVR4_reserved39 (__NR_SVR4 + 176)
-#define __NR_SVR4_reserved40 (__NR_SVR4 + 177)
-#define __NR_SVR4_reserved41 (__NR_SVR4 + 178)
-#define __NR_SVR4_reserved42 (__NR_SVR4 + 179)
-#define __NR_SVR4_reserved43 (__NR_SVR4 + 180)
-#define __NR_SVR4_reserved44 (__NR_SVR4 + 181)
-#define __NR_SVR4_reserved45 (__NR_SVR4 + 182)
-#define __NR_SVR4_reserved46 (__NR_SVR4 + 183)
-#define __NR_SVR4_reserved47 (__NR_SVR4 + 184)
-#define __NR_SVR4_reserved48 (__NR_SVR4 + 185)
-#define __NR_SVR4_reserved49 (__NR_SVR4 + 186)
-#define __NR_SVR4_reserved50 (__NR_SVR4 + 187)
-#define __NR_SVR4_reserved51 (__NR_SVR4 + 188)
-#define __NR_SVR4_reserved52 (__NR_SVR4 + 189)
-#define __NR_SVR4_reserved53 (__NR_SVR4 + 190)
-#define __NR_SVR4_reserved54 (__NR_SVR4 + 191)
-#define __NR_SVR4_reserved55 (__NR_SVR4 + 192)
-#define __NR_SVR4_reserved56 (__NR_SVR4 + 193)
-#define __NR_SVR4_reserved57 (__NR_SVR4 + 194)
-#define __NR_SVR4_reserved58 (__NR_SVR4 + 195)
-#define __NR_SVR4_reserved59 (__NR_SVR4 + 196)
-#define __NR_SVR4_reserved60 (__NR_SVR4 + 197)
-#define __NR_SVR4_reserved61 (__NR_SVR4 + 198)
-#define __NR_SVR4_reserved62 (__NR_SVR4 + 199)
-#define __NR_SVR4_reserved63 (__NR_SVR4 + 200)
-#define __NR_SVR4_aread (__NR_SVR4 + 201)
-#define __NR_SVR4_awrite (__NR_SVR4 + 202)
-#define __NR_SVR4_listio (__NR_SVR4 + 203)
-#define __NR_SVR4_mips_acancel (__NR_SVR4 + 204)
-#define __NR_SVR4_astatus (__NR_SVR4 + 205)
-#define __NR_SVR4_await (__NR_SVR4 + 206)
-#define __NR_SVR4_areadv (__NR_SVR4 + 207)
-#define __NR_SVR4_awritev (__NR_SVR4 + 208)
-#define __NR_SVR4_MIPS_reserved1 (__NR_SVR4 + 209)
-#define __NR_SVR4_MIPS_reserved2 (__NR_SVR4 + 210)
-#define __NR_SVR4_MIPS_reserved3 (__NR_SVR4 + 211)
-#define __NR_SVR4_MIPS_reserved4 (__NR_SVR4 + 212)
-#define __NR_SVR4_MIPS_reserved5 (__NR_SVR4 + 213)
-#define __NR_SVR4_MIPS_reserved6 (__NR_SVR4 + 214)
-#define __NR_SVR4_MIPS_reserved7 (__NR_SVR4 + 215)
-#define __NR_SVR4_MIPS_reserved8 (__NR_SVR4 + 216)
-#define __NR_SVR4_MIPS_reserved9 (__NR_SVR4 + 217)
-#define __NR_SVR4_MIPS_reserved10 (__NR_SVR4 + 218)
-#define __NR_SVR4_MIPS_reserved11 (__NR_SVR4 + 219)
-#define __NR_SVR4_MIPS_reserved12 (__NR_SVR4 + 220)
-#define __NR_SVR4_CDC_reserved1 (__NR_SVR4 + 221)
-#define __NR_SVR4_CDC_reserved2 (__NR_SVR4 + 222)
-#define __NR_SVR4_CDC_reserved3 (__NR_SVR4 + 223)
-#define __NR_SVR4_CDC_reserved4 (__NR_SVR4 + 224)
-#define __NR_SVR4_CDC_reserved5 (__NR_SVR4 + 225)
-#define __NR_SVR4_CDC_reserved6 (__NR_SVR4 + 226)
-#define __NR_SVR4_CDC_reserved7 (__NR_SVR4 + 227)
-#define __NR_SVR4_CDC_reserved8 (__NR_SVR4 + 228)
-#define __NR_SVR4_CDC_reserved9 (__NR_SVR4 + 229)
-#define __NR_SVR4_CDC_reserved10 (__NR_SVR4 + 230)
-#define __NR_SVR4_CDC_reserved11 (__NR_SVR4 + 231)
-#define __NR_SVR4_CDC_reserved12 (__NR_SVR4 + 232)
-#define __NR_SVR4_CDC_reserved13 (__NR_SVR4 + 233)
-#define __NR_SVR4_CDC_reserved14 (__NR_SVR4 + 234)
-#define __NR_SVR4_CDC_reserved15 (__NR_SVR4 + 235)
-#define __NR_SVR4_CDC_reserved16 (__NR_SVR4 + 236)
-#define __NR_SVR4_CDC_reserved17 (__NR_SVR4 + 237)
-#define __NR_SVR4_CDC_reserved18 (__NR_SVR4 + 238)
-#define __NR_SVR4_CDC_reserved19 (__NR_SVR4 + 239)
-#define __NR_SVR4_CDC_reserved20 (__NR_SVR4 + 240)
-
-/*
- * SYS V syscalls are in the range from 1000 to 1999
- */
-#define __NR_SYSV 1000
-#define __NR_SYSV_syscall (__NR_SYSV + 0)
-#define __NR_SYSV_exit (__NR_SYSV + 1)
-#define __NR_SYSV_fork (__NR_SYSV + 2)
-#define __NR_SYSV_read (__NR_SYSV + 3)
-#define __NR_SYSV_write (__NR_SYSV + 4)
-#define __NR_SYSV_open (__NR_SYSV + 5)
-#define __NR_SYSV_close (__NR_SYSV + 6)
-#define __NR_SYSV_wait (__NR_SYSV + 7)
-#define __NR_SYSV_creat (__NR_SYSV + 8)
-#define __NR_SYSV_link (__NR_SYSV + 9)
-#define __NR_SYSV_unlink (__NR_SYSV + 10)
-#define __NR_SYSV_execv (__NR_SYSV + 11)
-#define __NR_SYSV_chdir (__NR_SYSV + 12)
-#define __NR_SYSV_time (__NR_SYSV + 13)
-#define __NR_SYSV_mknod (__NR_SYSV + 14)
-#define __NR_SYSV_chmod (__NR_SYSV + 15)
-#define __NR_SYSV_chown (__NR_SYSV + 16)
-#define __NR_SYSV_brk (__NR_SYSV + 17)
-#define __NR_SYSV_stat (__NR_SYSV + 18)
-#define __NR_SYSV_lseek (__NR_SYSV + 19)
-#define __NR_SYSV_getpid (__NR_SYSV + 20)
-#define __NR_SYSV_mount (__NR_SYSV + 21)
-#define __NR_SYSV_umount (__NR_SYSV + 22)
-#define __NR_SYSV_setuid (__NR_SYSV + 23)
-#define __NR_SYSV_getuid (__NR_SYSV + 24)
-#define __NR_SYSV_stime (__NR_SYSV + 25)
-#define __NR_SYSV_ptrace (__NR_SYSV + 26)
-#define __NR_SYSV_alarm (__NR_SYSV + 27)
-#define __NR_SYSV_fstat (__NR_SYSV + 28)
-#define __NR_SYSV_pause (__NR_SYSV + 29)
-#define __NR_SYSV_utime (__NR_SYSV + 30)
-#define __NR_SYSV_stty (__NR_SYSV + 31)
-#define __NR_SYSV_gtty (__NR_SYSV + 32)
-#define __NR_SYSV_access (__NR_SYSV + 33)
-#define __NR_SYSV_nice (__NR_SYSV + 34)
-#define __NR_SYSV_statfs (__NR_SYSV + 35)
-#define __NR_SYSV_sync (__NR_SYSV + 36)
-#define __NR_SYSV_kill (__NR_SYSV + 37)
-#define __NR_SYSV_fstatfs (__NR_SYSV + 38)
-#define __NR_SYSV_setpgrp (__NR_SYSV + 39)
-#define __NR_SYSV_syssgi (__NR_SYSV + 40)
-#define __NR_SYSV_dup (__NR_SYSV + 41)
-#define __NR_SYSV_pipe (__NR_SYSV + 42)
-#define __NR_SYSV_times (__NR_SYSV + 43)
-#define __NR_SYSV_profil (__NR_SYSV + 44)
-#define __NR_SYSV_plock (__NR_SYSV + 45)
-#define __NR_SYSV_setgid (__NR_SYSV + 46)
-#define __NR_SYSV_getgid (__NR_SYSV + 47)
-#define __NR_SYSV_sig (__NR_SYSV + 48)
-#define __NR_SYSV_msgsys (__NR_SYSV + 49)
-#define __NR_SYSV_sysmips (__NR_SYSV + 50)
-#define __NR_SYSV_acct (__NR_SYSV + 51)
-#define __NR_SYSV_shmsys (__NR_SYSV + 52)
-#define __NR_SYSV_semsys (__NR_SYSV + 53)
-#define __NR_SYSV_ioctl (__NR_SYSV + 54)
-#define __NR_SYSV_uadmin (__NR_SYSV + 55)
-#define __NR_SYSV_sysmp (__NR_SYSV + 56)
-#define __NR_SYSV_utssys (__NR_SYSV + 57)
-#define __NR_SYSV_USG_reserved1 (__NR_SYSV + 58)
-#define __NR_SYSV_execve (__NR_SYSV + 59)
-#define __NR_SYSV_umask (__NR_SYSV + 60)
-#define __NR_SYSV_chroot (__NR_SYSV + 61)
-#define __NR_SYSV_fcntl (__NR_SYSV + 62)
-#define __NR_SYSV_ulimit (__NR_SYSV + 63)
-#define __NR_SYSV_SAFARI4_reserved1 (__NR_SYSV + 64)
-#define __NR_SYSV_SAFARI4_reserved2 (__NR_SYSV + 65)
-#define __NR_SYSV_SAFARI4_reserved3 (__NR_SYSV + 66)
-#define __NR_SYSV_SAFARI4_reserved4 (__NR_SYSV + 67)
-#define __NR_SYSV_SAFARI4_reserved5 (__NR_SYSV + 68)
-#define __NR_SYSV_SAFARI4_reserved6 (__NR_SYSV + 69)
-#define __NR_SYSV_advfs (__NR_SYSV + 70)
-#define __NR_SYSV_unadvfs (__NR_SYSV + 71)
-#define __NR_SYSV_rmount (__NR_SYSV + 72)
-#define __NR_SYSV_rumount (__NR_SYSV + 73)
-#define __NR_SYSV_rfstart (__NR_SYSV + 74)
-#define __NR_SYSV_getrlimit64 (__NR_SYSV + 75)
-#define __NR_SYSV_setrlimit64 (__NR_SYSV + 76)
-#define __NR_SYSV_nanosleep (__NR_SYSV + 77)
-#define __NR_SYSV_lseek64 (__NR_SYSV + 78)
-#define __NR_SYSV_rmdir (__NR_SYSV + 79)
-#define __NR_SYSV_mkdir (__NR_SYSV + 80)
-#define __NR_SYSV_getdents (__NR_SYSV + 81)
-#define __NR_SYSV_sginap (__NR_SYSV + 82)
-#define __NR_SYSV_sgikopt (__NR_SYSV + 83)
-#define __NR_SYSV_sysfs (__NR_SYSV + 84)
-#define __NR_SYSV_getmsg (__NR_SYSV + 85)
-#define __NR_SYSV_putmsg (__NR_SYSV + 86)
-#define __NR_SYSV_poll (__NR_SYSV + 87)
-#define __NR_SYSV_sigreturn (__NR_SYSV + 88)
-#define __NR_SYSV_accept (__NR_SYSV + 89)
-#define __NR_SYSV_bind (__NR_SYSV + 90)
-#define __NR_SYSV_connect (__NR_SYSV + 91)
-#define __NR_SYSV_gethostid (__NR_SYSV + 92)
-#define __NR_SYSV_getpeername (__NR_SYSV + 93)
-#define __NR_SYSV_getsockname (__NR_SYSV + 94)
-#define __NR_SYSV_getsockopt (__NR_SYSV + 95)
-#define __NR_SYSV_listen (__NR_SYSV + 96)
-#define __NR_SYSV_recv (__NR_SYSV + 97)
-#define __NR_SYSV_recvfrom (__NR_SYSV + 98)
-#define __NR_SYSV_recvmsg (__NR_SYSV + 99)
-#define __NR_SYSV_select (__NR_SYSV + 100)
-#define __NR_SYSV_send (__NR_SYSV + 101)
-#define __NR_SYSV_sendmsg (__NR_SYSV + 102)
-#define __NR_SYSV_sendto (__NR_SYSV + 103)
-#define __NR_SYSV_sethostid (__NR_SYSV + 104)
-#define __NR_SYSV_setsockopt (__NR_SYSV + 105)
-#define __NR_SYSV_shutdown (__NR_SYSV + 106)
-#define __NR_SYSV_socket (__NR_SYSV + 107)
-#define __NR_SYSV_gethostname (__NR_SYSV + 108)
-#define __NR_SYSV_sethostname (__NR_SYSV + 109)
-#define __NR_SYSV_getdomainname (__NR_SYSV + 110)
-#define __NR_SYSV_setdomainname (__NR_SYSV + 111)
-#define __NR_SYSV_truncate (__NR_SYSV + 112)
-#define __NR_SYSV_ftruncate (__NR_SYSV + 113)
-#define __NR_SYSV_rename (__NR_SYSV + 114)
-#define __NR_SYSV_symlink (__NR_SYSV + 115)
-#define __NR_SYSV_readlink (__NR_SYSV + 116)
-#define __NR_SYSV_lstat (__NR_SYSV + 117)
-#define __NR_SYSV_nfsmount (__NR_SYSV + 118)
-#define __NR_SYSV_nfssvc (__NR_SYSV + 119)
-#define __NR_SYSV_getfh (__NR_SYSV + 120)
-#define __NR_SYSV_async_daemon (__NR_SYSV + 121)
-#define __NR_SYSV_exportfs (__NR_SYSV + 122)
-#define __NR_SYSV_setregid (__NR_SYSV + 123)
-#define __NR_SYSV_setreuid (__NR_SYSV + 124)
-#define __NR_SYSV_getitimer (__NR_SYSV + 125)
-#define __NR_SYSV_setitimer (__NR_SYSV + 126)
-#define __NR_SYSV_adjtime (__NR_SYSV + 127)
-#define __NR_SYSV_BSD_getime (__NR_SYSV + 128)
-#define __NR_SYSV_sproc (__NR_SYSV + 129)
-#define __NR_SYSV_prctl (__NR_SYSV + 130)
-#define __NR_SYSV_procblk (__NR_SYSV + 131)
-#define __NR_SYSV_sprocsp (__NR_SYSV + 132)
-#define __NR_SYSV_sgigsc (__NR_SYSV + 133)
-#define __NR_SYSV_mmap (__NR_SYSV + 134)
-#define __NR_SYSV_munmap (__NR_SYSV + 135)
-#define __NR_SYSV_mprotect (__NR_SYSV + 136)
-#define __NR_SYSV_msync (__NR_SYSV + 137)
-#define __NR_SYSV_madvise (__NR_SYSV + 138)
-#define __NR_SYSV_pagelock (__NR_SYSV + 139)
-#define __NR_SYSV_getpagesize (__NR_SYSV + 140)
-#define __NR_SYSV_quotactl (__NR_SYSV + 141)
-#define __NR_SYSV_libdetach (__NR_SYSV + 142)
-#define __NR_SYSV_BSDgetpgrp (__NR_SYSV + 143)
-#define __NR_SYSV_BSDsetpgrp (__NR_SYSV + 144)
-#define __NR_SYSV_vhangup (__NR_SYSV + 145)
-#define __NR_SYSV_fsync (__NR_SYSV + 146)
-#define __NR_SYSV_fchdir (__NR_SYSV + 147)
-#define __NR_SYSV_getrlimit (__NR_SYSV + 148)
-#define __NR_SYSV_setrlimit (__NR_SYSV + 149)
-#define __NR_SYSV_cacheflush (__NR_SYSV + 150)
-#define __NR_SYSV_cachectl (__NR_SYSV + 151)
-#define __NR_SYSV_fchown (__NR_SYSV + 152)
-#define __NR_SYSV_fchmod (__NR_SYSV + 153)
-#define __NR_SYSV_wait3 (__NR_SYSV + 154)
-#define __NR_SYSV_socketpair (__NR_SYSV + 155)
-#define __NR_SYSV_sysinfo (__NR_SYSV + 156)
-#define __NR_SYSV_nuname (__NR_SYSV + 157)
-#define __NR_SYSV_xstat (__NR_SYSV + 158)
-#define __NR_SYSV_lxstat (__NR_SYSV + 159)
-#define __NR_SYSV_fxstat (__NR_SYSV + 160)
-#define __NR_SYSV_xmknod (__NR_SYSV + 161)
-#define __NR_SYSV_ksigaction (__NR_SYSV + 162)
-#define __NR_SYSV_sigpending (__NR_SYSV + 163)
-#define __NR_SYSV_sigprocmask (__NR_SYSV + 164)
-#define __NR_SYSV_sigsuspend (__NR_SYSV + 165)
-#define __NR_SYSV_sigpoll (__NR_SYSV + 166)
-#define __NR_SYSV_swapctl (__NR_SYSV + 167)
-#define __NR_SYSV_getcontext (__NR_SYSV + 168)
-#define __NR_SYSV_setcontext (__NR_SYSV + 169)
-#define __NR_SYSV_waitsys (__NR_SYSV + 170)
-#define __NR_SYSV_sigstack (__NR_SYSV + 171)
-#define __NR_SYSV_sigaltstack (__NR_SYSV + 172)
-#define __NR_SYSV_sigsendset (__NR_SYSV + 173)
-#define __NR_SYSV_statvfs (__NR_SYSV + 174)
-#define __NR_SYSV_fstatvfs (__NR_SYSV + 175)
-#define __NR_SYSV_getpmsg (__NR_SYSV + 176)
-#define __NR_SYSV_putpmsg (__NR_SYSV + 177)
-#define __NR_SYSV_lchown (__NR_SYSV + 178)
-#define __NR_SYSV_priocntl (__NR_SYSV + 179)
-#define __NR_SYSV_ksigqueue (__NR_SYSV + 180)
-#define __NR_SYSV_readv (__NR_SYSV + 181)
-#define __NR_SYSV_writev (__NR_SYSV + 182)
-#define __NR_SYSV_truncate64 (__NR_SYSV + 183)
-#define __NR_SYSV_ftruncate64 (__NR_SYSV + 184)
-#define __NR_SYSV_mmap64 (__NR_SYSV + 185)
-#define __NR_SYSV_dmi (__NR_SYSV + 186)
-#define __NR_SYSV_pread (__NR_SYSV + 187)
-#define __NR_SYSV_pwrite (__NR_SYSV + 188)
-
-/*
- * BSD 4.3 syscalls are in the range from 2000 to 2999
- */
-#define __NR_BSD43 2000
-#define __NR_BSD43_syscall (__NR_BSD43 + 0)
-#define __NR_BSD43_exit (__NR_BSD43 + 1)
-#define __NR_BSD43_fork (__NR_BSD43 + 2)
-#define __NR_BSD43_read (__NR_BSD43 + 3)
-#define __NR_BSD43_write (__NR_BSD43 + 4)
-#define __NR_BSD43_open (__NR_BSD43 + 5)
-#define __NR_BSD43_close (__NR_BSD43 + 6)
-#define __NR_BSD43_wait (__NR_BSD43 + 7)
-#define __NR_BSD43_creat (__NR_BSD43 + 8)
-#define __NR_BSD43_link (__NR_BSD43 + 9)
-#define __NR_BSD43_unlink (__NR_BSD43 + 10)
-#define __NR_BSD43_exec (__NR_BSD43 + 11)
-#define __NR_BSD43_chdir (__NR_BSD43 + 12)
-#define __NR_BSD43_time (__NR_BSD43 + 13)
-#define __NR_BSD43_mknod (__NR_BSD43 + 14)
-#define __NR_BSD43_chmod (__NR_BSD43 + 15)
-#define __NR_BSD43_chown (__NR_BSD43 + 16)
-#define __NR_BSD43_sbreak (__NR_BSD43 + 17)
-#define __NR_BSD43_oldstat (__NR_BSD43 + 18)
-#define __NR_BSD43_lseek (__NR_BSD43 + 19)
-#define __NR_BSD43_getpid (__NR_BSD43 + 20)
-#define __NR_BSD43_oldmount (__NR_BSD43 + 21)
-#define __NR_BSD43_umount (__NR_BSD43 + 22)
-#define __NR_BSD43_setuid (__NR_BSD43 + 23)
-#define __NR_BSD43_getuid (__NR_BSD43 + 24)
-#define __NR_BSD43_stime (__NR_BSD43 + 25)
-#define __NR_BSD43_ptrace (__NR_BSD43 + 26)
-#define __NR_BSD43_alarm (__NR_BSD43 + 27)
-#define __NR_BSD43_oldfstat (__NR_BSD43 + 28)
-#define __NR_BSD43_pause (__NR_BSD43 + 29)
-#define __NR_BSD43_utime (__NR_BSD43 + 30)
-#define __NR_BSD43_stty (__NR_BSD43 + 31)
-#define __NR_BSD43_gtty (__NR_BSD43 + 32)
-#define __NR_BSD43_access (__NR_BSD43 + 33)
-#define __NR_BSD43_nice (__NR_BSD43 + 34)
-#define __NR_BSD43_ftime (__NR_BSD43 + 35)
-#define __NR_BSD43_sync (__NR_BSD43 + 36)
-#define __NR_BSD43_kill (__NR_BSD43 + 37)
-#define __NR_BSD43_stat (__NR_BSD43 + 38)
-#define __NR_BSD43_oldsetpgrp (__NR_BSD43 + 39)
-#define __NR_BSD43_lstat (__NR_BSD43 + 40)
-#define __NR_BSD43_dup (__NR_BSD43 + 41)
-#define __NR_BSD43_pipe (__NR_BSD43 + 42)
-#define __NR_BSD43_times (__NR_BSD43 + 43)
-#define __NR_BSD43_profil (__NR_BSD43 + 44)
-#define __NR_BSD43_msgsys (__NR_BSD43 + 45)
-#define __NR_BSD43_setgid (__NR_BSD43 + 46)
-#define __NR_BSD43_getgid (__NR_BSD43 + 47)
-#define __NR_BSD43_ssig (__NR_BSD43 + 48)
-#define __NR_BSD43_reserved1 (__NR_BSD43 + 49)
-#define __NR_BSD43_reserved2 (__NR_BSD43 + 50)
-#define __NR_BSD43_sysacct (__NR_BSD43 + 51)
-#define __NR_BSD43_phys (__NR_BSD43 + 52)
-#define __NR_BSD43_lock (__NR_BSD43 + 53)
-#define __NR_BSD43_ioctl (__NR_BSD43 + 54)
-#define __NR_BSD43_reboot (__NR_BSD43 + 55)
-#define __NR_BSD43_mpxchan (__NR_BSD43 + 56)
-#define __NR_BSD43_symlink (__NR_BSD43 + 57)
-#define __NR_BSD43_readlink (__NR_BSD43 + 58)
-#define __NR_BSD43_execve (__NR_BSD43 + 59)
-#define __NR_BSD43_umask (__NR_BSD43 + 60)
-#define __NR_BSD43_chroot (__NR_BSD43 + 61)
-#define __NR_BSD43_fstat (__NR_BSD43 + 62)
-#define __NR_BSD43_reserved3 (__NR_BSD43 + 63)
-#define __NR_BSD43_getpagesize (__NR_BSD43 + 64)
-#define __NR_BSD43_mremap (__NR_BSD43 + 65)
-#define __NR_BSD43_vfork (__NR_BSD43 + 66)
-#define __NR_BSD43_vread (__NR_BSD43 + 67)
-#define __NR_BSD43_vwrite (__NR_BSD43 + 68)
-#define __NR_BSD43_sbrk (__NR_BSD43 + 69)
-#define __NR_BSD43_sstk (__NR_BSD43 + 70)
-#define __NR_BSD43_mmap (__NR_BSD43 + 71)
-#define __NR_BSD43_vadvise (__NR_BSD43 + 72)
-#define __NR_BSD43_munmap (__NR_BSD43 + 73)
-#define __NR_BSD43_mprotect (__NR_BSD43 + 74)
-#define __NR_BSD43_madvise (__NR_BSD43 + 75)
-#define __NR_BSD43_vhangup (__NR_BSD43 + 76)
-#define __NR_BSD43_vlimit (__NR_BSD43 + 77)
-#define __NR_BSD43_mincore (__NR_BSD43 + 78)
-#define __NR_BSD43_getgroups (__NR_BSD43 + 79)
-#define __NR_BSD43_setgroups (__NR_BSD43 + 80)
-#define __NR_BSD43_getpgrp (__NR_BSD43 + 81)
-#define __NR_BSD43_setpgrp (__NR_BSD43 + 82)
-#define __NR_BSD43_setitimer (__NR_BSD43 + 83)
-#define __NR_BSD43_wait3 (__NR_BSD43 + 84)
-#define __NR_BSD43_swapon (__NR_BSD43 + 85)
-#define __NR_BSD43_getitimer (__NR_BSD43 + 86)
-#define __NR_BSD43_gethostname (__NR_BSD43 + 87)
-#define __NR_BSD43_sethostname (__NR_BSD43 + 88)
-#define __NR_BSD43_getdtablesize (__NR_BSD43 + 89)
-#define __NR_BSD43_dup2 (__NR_BSD43 + 90)
-#define __NR_BSD43_getdopt (__NR_BSD43 + 91)
-#define __NR_BSD43_fcntl (__NR_BSD43 + 92)
-#define __NR_BSD43_select (__NR_BSD43 + 93)
-#define __NR_BSD43_setdopt (__NR_BSD43 + 94)
-#define __NR_BSD43_fsync (__NR_BSD43 + 95)
-#define __NR_BSD43_setpriority (__NR_BSD43 + 96)
-#define __NR_BSD43_socket (__NR_BSD43 + 97)
-#define __NR_BSD43_connect (__NR_BSD43 + 98)
-#define __NR_BSD43_oldaccept (__NR_BSD43 + 99)
-#define __NR_BSD43_getpriority (__NR_BSD43 + 100)
-#define __NR_BSD43_send (__NR_BSD43 + 101)
-#define __NR_BSD43_recv (__NR_BSD43 + 102)
-#define __NR_BSD43_sigreturn (__NR_BSD43 + 103)
-#define __NR_BSD43_bind (__NR_BSD43 + 104)
-#define __NR_BSD43_setsockopt (__NR_BSD43 + 105)
-#define __NR_BSD43_listen (__NR_BSD43 + 106)
-#define __NR_BSD43_vtimes (__NR_BSD43 + 107)
-#define __NR_BSD43_sigvec (__NR_BSD43 + 108)
-#define __NR_BSD43_sigblock (__NR_BSD43 + 109)
-#define __NR_BSD43_sigsetmask (__NR_BSD43 + 110)
-#define __NR_BSD43_sigpause (__NR_BSD43 + 111)
-#define __NR_BSD43_sigstack (__NR_BSD43 + 112)
-#define __NR_BSD43_oldrecvmsg (__NR_BSD43 + 113)
-#define __NR_BSD43_oldsendmsg (__NR_BSD43 + 114)
-#define __NR_BSD43_vtrace (__NR_BSD43 + 115)
-#define __NR_BSD43_gettimeofday (__NR_BSD43 + 116)
-#define __NR_BSD43_getrusage (__NR_BSD43 + 117)
-#define __NR_BSD43_getsockopt (__NR_BSD43 + 118)
-#define __NR_BSD43_reserved4 (__NR_BSD43 + 119)
-#define __NR_BSD43_readv (__NR_BSD43 + 120)
-#define __NR_BSD43_writev (__NR_BSD43 + 121)
-#define __NR_BSD43_settimeofday (__NR_BSD43 + 122)
-#define __NR_BSD43_fchown (__NR_BSD43 + 123)
-#define __NR_BSD43_fchmod (__NR_BSD43 + 124)
-#define __NR_BSD43_oldrecvfrom (__NR_BSD43 + 125)
-#define __NR_BSD43_setreuid (__NR_BSD43 + 126)
-#define __NR_BSD43_setregid (__NR_BSD43 + 127)
-#define __NR_BSD43_rename (__NR_BSD43 + 128)
-#define __NR_BSD43_truncate (__NR_BSD43 + 129)
-#define __NR_BSD43_ftruncate (__NR_BSD43 + 130)
-#define __NR_BSD43_flock (__NR_BSD43 + 131)
-#define __NR_BSD43_semsys (__NR_BSD43 + 132)
-#define __NR_BSD43_sendto (__NR_BSD43 + 133)
-#define __NR_BSD43_shutdown (__NR_BSD43 + 134)
-#define __NR_BSD43_socketpair (__NR_BSD43 + 135)
-#define __NR_BSD43_mkdir (__NR_BSD43 + 136)
-#define __NR_BSD43_rmdir (__NR_BSD43 + 137)
-#define __NR_BSD43_utimes (__NR_BSD43 + 138)
-#define __NR_BSD43_sigcleanup (__NR_BSD43 + 139)
-#define __NR_BSD43_adjtime (__NR_BSD43 + 140)
-#define __NR_BSD43_oldgetpeername (__NR_BSD43 + 141)
-#define __NR_BSD43_gethostid (__NR_BSD43 + 142)
-#define __NR_BSD43_sethostid (__NR_BSD43 + 143)
-#define __NR_BSD43_getrlimit (__NR_BSD43 + 144)
-#define __NR_BSD43_setrlimit (__NR_BSD43 + 145)
-#define __NR_BSD43_killpg (__NR_BSD43 + 146)
-#define __NR_BSD43_shmsys (__NR_BSD43 + 147)
-#define __NR_BSD43_quota (__NR_BSD43 + 148)
-#define __NR_BSD43_qquota (__NR_BSD43 + 149)
-#define __NR_BSD43_oldgetsockname (__NR_BSD43 + 150)
-#define __NR_BSD43_sysmips (__NR_BSD43 + 151)
-#define __NR_BSD43_cacheflush (__NR_BSD43 + 152)
-#define __NR_BSD43_cachectl (__NR_BSD43 + 153)
-#define __NR_BSD43_debug (__NR_BSD43 + 154)
-#define __NR_BSD43_reserved5 (__NR_BSD43 + 155)
-#define __NR_BSD43_reserved6 (__NR_BSD43 + 156)
-#define __NR_BSD43_nfs_mount (__NR_BSD43 + 157)
-#define __NR_BSD43_nfs_svc (__NR_BSD43 + 158)
-#define __NR_BSD43_getdirentries (__NR_BSD43 + 159)
-#define __NR_BSD43_statfs (__NR_BSD43 + 160)
-#define __NR_BSD43_fstatfs (__NR_BSD43 + 161)
-#define __NR_BSD43_unmount (__NR_BSD43 + 162)
-#define __NR_BSD43_async_daemon (__NR_BSD43 + 163)
-#define __NR_BSD43_nfs_getfh (__NR_BSD43 + 164)
-#define __NR_BSD43_getdomainname (__NR_BSD43 + 165)
-#define __NR_BSD43_setdomainname (__NR_BSD43 + 166)
-#define __NR_BSD43_pcfs_mount (__NR_BSD43 + 167)
-#define __NR_BSD43_quotactl (__NR_BSD43 + 168)
-#define __NR_BSD43_oldexportfs (__NR_BSD43 + 169)
-#define __NR_BSD43_smount (__NR_BSD43 + 170)
-#define __NR_BSD43_mipshwconf (__NR_BSD43 + 171)
-#define __NR_BSD43_exportfs (__NR_BSD43 + 172)
-#define __NR_BSD43_nfsfh_open (__NR_BSD43 + 173)
-#define __NR_BSD43_libattach (__NR_BSD43 + 174)
-#define __NR_BSD43_libdetach (__NR_BSD43 + 175)
-#define __NR_BSD43_accept (__NR_BSD43 + 176)
-#define __NR_BSD43_reserved7 (__NR_BSD43 + 177)
-#define __NR_BSD43_reserved8 (__NR_BSD43 + 178)
-#define __NR_BSD43_recvmsg (__NR_BSD43 + 179)
-#define __NR_BSD43_recvfrom (__NR_BSD43 + 180)
-#define __NR_BSD43_sendmsg (__NR_BSD43 + 181)
-#define __NR_BSD43_getpeername (__NR_BSD43 + 182)
-#define __NR_BSD43_getsockname (__NR_BSD43 + 183)
-#define __NR_BSD43_aread (__NR_BSD43 + 184)
-#define __NR_BSD43_awrite (__NR_BSD43 + 185)
-#define __NR_BSD43_listio (__NR_BSD43 + 186)
-#define __NR_BSD43_acancel (__NR_BSD43 + 187)
-#define __NR_BSD43_astatus (__NR_BSD43 + 188)
-#define __NR_BSD43_await (__NR_BSD43 + 189)
-#define __NR_BSD43_areadv (__NR_BSD43 + 190)
-#define __NR_BSD43_awritev (__NR_BSD43 + 191)
-
-/*
- * POSIX syscalls are in the range from 3000 to 3999
- */
-#define __NR_POSIX 3000
-#define __NR_POSIX_syscall (__NR_POSIX + 0)
-#define __NR_POSIX_exit (__NR_POSIX + 1)
-#define __NR_POSIX_fork (__NR_POSIX + 2)
-#define __NR_POSIX_read (__NR_POSIX + 3)
-#define __NR_POSIX_write (__NR_POSIX + 4)
-#define __NR_POSIX_open (__NR_POSIX + 5)
-#define __NR_POSIX_close (__NR_POSIX + 6)
-#define __NR_POSIX_wait (__NR_POSIX + 7)
-#define __NR_POSIX_creat (__NR_POSIX + 8)
-#define __NR_POSIX_link (__NR_POSIX + 9)
-#define __NR_POSIX_unlink (__NR_POSIX + 10)
-#define __NR_POSIX_exec (__NR_POSIX + 11)
-#define __NR_POSIX_chdir (__NR_POSIX + 12)
-#define __NR_POSIX_gtime (__NR_POSIX + 13)
-#define __NR_POSIX_mknod (__NR_POSIX + 14)
-#define __NR_POSIX_chmod (__NR_POSIX + 15)
-#define __NR_POSIX_chown (__NR_POSIX + 16)
-#define __NR_POSIX_sbreak (__NR_POSIX + 17)
-#define __NR_POSIX_stat (__NR_POSIX + 18)
-#define __NR_POSIX_lseek (__NR_POSIX + 19)
-#define __NR_POSIX_getpid (__NR_POSIX + 20)
-#define __NR_POSIX_mount (__NR_POSIX + 21)
-#define __NR_POSIX_umount (__NR_POSIX + 22)
-#define __NR_POSIX_setuid (__NR_POSIX + 23)
-#define __NR_POSIX_getuid (__NR_POSIX + 24)
-#define __NR_POSIX_stime (__NR_POSIX + 25)
-#define __NR_POSIX_ptrace (__NR_POSIX + 26)
-#define __NR_POSIX_alarm (__NR_POSIX + 27)
-#define __NR_POSIX_fstat (__NR_POSIX + 28)
-#define __NR_POSIX_pause (__NR_POSIX + 29)
-#define __NR_POSIX_utime (__NR_POSIX + 30)
-#define __NR_POSIX_stty (__NR_POSIX + 31)
-#define __NR_POSIX_gtty (__NR_POSIX + 32)
-#define __NR_POSIX_access (__NR_POSIX + 33)
-#define __NR_POSIX_nice (__NR_POSIX + 34)
-#define __NR_POSIX_statfs (__NR_POSIX + 35)
-#define __NR_POSIX_sync (__NR_POSIX + 36)
-#define __NR_POSIX_kill (__NR_POSIX + 37)
-#define __NR_POSIX_fstatfs (__NR_POSIX + 38)
-#define __NR_POSIX_getpgrp (__NR_POSIX + 39)
-#define __NR_POSIX_syssgi (__NR_POSIX + 40)
-#define __NR_POSIX_dup (__NR_POSIX + 41)
-#define __NR_POSIX_pipe (__NR_POSIX + 42)
-#define __NR_POSIX_times (__NR_POSIX + 43)
-#define __NR_POSIX_profil (__NR_POSIX + 44)
-#define __NR_POSIX_lock (__NR_POSIX + 45)
-#define __NR_POSIX_setgid (__NR_POSIX + 46)
-#define __NR_POSIX_getgid (__NR_POSIX + 47)
-#define __NR_POSIX_sig (__NR_POSIX + 48)
-#define __NR_POSIX_msgsys (__NR_POSIX + 49)
-#define __NR_POSIX_sysmips (__NR_POSIX + 50)
-#define __NR_POSIX_sysacct (__NR_POSIX + 51)
-#define __NR_POSIX_shmsys (__NR_POSIX + 52)
-#define __NR_POSIX_semsys (__NR_POSIX + 53)
-#define __NR_POSIX_ioctl (__NR_POSIX + 54)
-#define __NR_POSIX_uadmin (__NR_POSIX + 55)
-#define __NR_POSIX_exch (__NR_POSIX + 56)
-#define __NR_POSIX_utssys (__NR_POSIX + 57)
-#define __NR_POSIX_USG_reserved1 (__NR_POSIX + 58)
-#define __NR_POSIX_exece (__NR_POSIX + 59)
-#define __NR_POSIX_umask (__NR_POSIX + 60)
-#define __NR_POSIX_chroot (__NR_POSIX + 61)
-#define __NR_POSIX_fcntl (__NR_POSIX + 62)
-#define __NR_POSIX_ulimit (__NR_POSIX + 63)
-#define __NR_POSIX_SAFARI4_reserved1 (__NR_POSIX + 64)
-#define __NR_POSIX_SAFARI4_reserved2 (__NR_POSIX + 65)
-#define __NR_POSIX_SAFARI4_reserved3 (__NR_POSIX + 66)
-#define __NR_POSIX_SAFARI4_reserved4 (__NR_POSIX + 67)
-#define __NR_POSIX_SAFARI4_reserved5 (__NR_POSIX + 68)
-#define __NR_POSIX_SAFARI4_reserved6 (__NR_POSIX + 69)
-#define __NR_POSIX_advfs (__NR_POSIX + 70)
-#define __NR_POSIX_unadvfs (__NR_POSIX + 71)
-#define __NR_POSIX_rmount (__NR_POSIX + 72)
-#define __NR_POSIX_rumount (__NR_POSIX + 73)
-#define __NR_POSIX_rfstart (__NR_POSIX + 74)
-#define __NR_POSIX_reserved1 (__NR_POSIX + 75)
-#define __NR_POSIX_rdebug (__NR_POSIX + 76)
-#define __NR_POSIX_rfstop (__NR_POSIX + 77)
-#define __NR_POSIX_rfsys (__NR_POSIX + 78)
-#define __NR_POSIX_rmdir (__NR_POSIX + 79)
-#define __NR_POSIX_mkdir (__NR_POSIX + 80)
-#define __NR_POSIX_getdents (__NR_POSIX + 81)
-#define __NR_POSIX_sginap (__NR_POSIX + 82)
-#define __NR_POSIX_sgikopt (__NR_POSIX + 83)
-#define __NR_POSIX_sysfs (__NR_POSIX + 84)
-#define __NR_POSIX_getmsg (__NR_POSIX + 85)
-#define __NR_POSIX_putmsg (__NR_POSIX + 86)
-#define __NR_POSIX_poll (__NR_POSIX + 87)
-#define __NR_POSIX_sigreturn (__NR_POSIX + 88)
-#define __NR_POSIX_accept (__NR_POSIX + 89)
-#define __NR_POSIX_bind (__NR_POSIX + 90)
-#define __NR_POSIX_connect (__NR_POSIX + 91)
-#define __NR_POSIX_gethostid (__NR_POSIX + 92)
-#define __NR_POSIX_getpeername (__NR_POSIX + 93)
-#define __NR_POSIX_getsockname (__NR_POSIX + 94)
-#define __NR_POSIX_getsockopt (__NR_POSIX + 95)
-#define __NR_POSIX_listen (__NR_POSIX + 96)
-#define __NR_POSIX_recv (__NR_POSIX + 97)
-#define __NR_POSIX_recvfrom (__NR_POSIX + 98)
-#define __NR_POSIX_recvmsg (__NR_POSIX + 99)
-#define __NR_POSIX_select (__NR_POSIX + 100)
-#define __NR_POSIX_send (__NR_POSIX + 101)
-#define __NR_POSIX_sendmsg (__NR_POSIX + 102)
-#define __NR_POSIX_sendto (__NR_POSIX + 103)
-#define __NR_POSIX_sethostid (__NR_POSIX + 104)
-#define __NR_POSIX_setsockopt (__NR_POSIX + 105)
-#define __NR_POSIX_shutdown (__NR_POSIX + 106)
-#define __NR_POSIX_socket (__NR_POSIX + 107)
-#define __NR_POSIX_gethostname (__NR_POSIX + 108)
-#define __NR_POSIX_sethostname (__NR_POSIX + 109)
-#define __NR_POSIX_getdomainname (__NR_POSIX + 110)
-#define __NR_POSIX_setdomainname (__NR_POSIX + 111)
-#define __NR_POSIX_truncate (__NR_POSIX + 112)
-#define __NR_POSIX_ftruncate (__NR_POSIX + 113)
-#define __NR_POSIX_rename (__NR_POSIX + 114)
-#define __NR_POSIX_symlink (__NR_POSIX + 115)
-#define __NR_POSIX_readlink (__NR_POSIX + 116)
-#define __NR_POSIX_lstat (__NR_POSIX + 117)
-#define __NR_POSIX_nfs_mount (__NR_POSIX + 118)
-#define __NR_POSIX_nfs_svc (__NR_POSIX + 119)
-#define __NR_POSIX_nfs_getfh (__NR_POSIX + 120)
-#define __NR_POSIX_async_daemon (__NR_POSIX + 121)
-#define __NR_POSIX_exportfs (__NR_POSIX + 122)
-#define __NR_POSIX_SGI_setregid (__NR_POSIX + 123)
-#define __NR_POSIX_SGI_setreuid (__NR_POSIX + 124)
-#define __NR_POSIX_getitimer (__NR_POSIX + 125)
-#define __NR_POSIX_setitimer (__NR_POSIX + 126)
-#define __NR_POSIX_adjtime (__NR_POSIX + 127)
-#define __NR_POSIX_SGI_bsdgettime (__NR_POSIX + 128)
-#define __NR_POSIX_SGI_sproc (__NR_POSIX + 129)
-#define __NR_POSIX_SGI_prctl (__NR_POSIX + 130)
-#define __NR_POSIX_SGI_blkproc (__NR_POSIX + 131)
-#define __NR_POSIX_SGI_reserved1 (__NR_POSIX + 132)
-#define __NR_POSIX_SGI_sgigsc (__NR_POSIX + 133)
-#define __NR_POSIX_SGI_mmap (__NR_POSIX + 134)
-#define __NR_POSIX_SGI_munmap (__NR_POSIX + 135)
-#define __NR_POSIX_SGI_mprotect (__NR_POSIX + 136)
-#define __NR_POSIX_SGI_msync (__NR_POSIX + 137)
-#define __NR_POSIX_SGI_madvise (__NR_POSIX + 138)
-#define __NR_POSIX_SGI_mpin (__NR_POSIX + 139)
-#define __NR_POSIX_SGI_getpagesize (__NR_POSIX + 140)
-#define __NR_POSIX_SGI_libattach (__NR_POSIX + 141)
-#define __NR_POSIX_SGI_libdetach (__NR_POSIX + 142)
-#define __NR_POSIX_SGI_getpgrp (__NR_POSIX + 143)
-#define __NR_POSIX_SGI_setpgrp (__NR_POSIX + 144)
-#define __NR_POSIX_SGI_reserved2 (__NR_POSIX + 145)
-#define __NR_POSIX_SGI_reserved3 (__NR_POSIX + 146)
-#define __NR_POSIX_SGI_reserved4 (__NR_POSIX + 147)
-#define __NR_POSIX_SGI_reserved5 (__NR_POSIX + 148)
-#define __NR_POSIX_SGI_reserved6 (__NR_POSIX + 149)
-#define __NR_POSIX_cacheflush (__NR_POSIX + 150)
-#define __NR_POSIX_cachectl (__NR_POSIX + 151)
-#define __NR_POSIX_fchown (__NR_POSIX + 152)
-#define __NR_POSIX_fchmod (__NR_POSIX + 153)
-#define __NR_POSIX_wait3 (__NR_POSIX + 154)
-#define __NR_POSIX_mmap (__NR_POSIX + 155)
-#define __NR_POSIX_munmap (__NR_POSIX + 156)
-#define __NR_POSIX_madvise (__NR_POSIX + 157)
-#define __NR_POSIX_BSD_getpagesize (__NR_POSIX + 158)
-#define __NR_POSIX_setreuid (__NR_POSIX + 159)
-#define __NR_POSIX_setregid (__NR_POSIX + 160)
-#define __NR_POSIX_setpgid (__NR_POSIX + 161)
-#define __NR_POSIX_getgroups (__NR_POSIX + 162)
-#define __NR_POSIX_setgroups (__NR_POSIX + 163)
-#define __NR_POSIX_gettimeofday (__NR_POSIX + 164)
-#define __NR_POSIX_getrusage (__NR_POSIX + 165)
-#define __NR_POSIX_getrlimit (__NR_POSIX + 166)
-#define __NR_POSIX_setrlimit (__NR_POSIX + 167)
-#define __NR_POSIX_waitpid (__NR_POSIX + 168)
-#define __NR_POSIX_dup2 (__NR_POSIX + 169)
-#define __NR_POSIX_reserved2 (__NR_POSIX + 170)
-#define __NR_POSIX_reserved3 (__NR_POSIX + 171)
-#define __NR_POSIX_reserved4 (__NR_POSIX + 172)
-#define __NR_POSIX_reserved5 (__NR_POSIX + 173)
-#define __NR_POSIX_reserved6 (__NR_POSIX + 174)
-#define __NR_POSIX_reserved7 (__NR_POSIX + 175)
-#define __NR_POSIX_reserved8 (__NR_POSIX + 176)
-#define __NR_POSIX_reserved9 (__NR_POSIX + 177)
-#define __NR_POSIX_reserved10 (__NR_POSIX + 178)
-#define __NR_POSIX_reserved11 (__NR_POSIX + 179)
-#define __NR_POSIX_reserved12 (__NR_POSIX + 180)
-#define __NR_POSIX_reserved13 (__NR_POSIX + 181)
-#define __NR_POSIX_reserved14 (__NR_POSIX + 182)
-#define __NR_POSIX_reserved15 (__NR_POSIX + 183)
-#define __NR_POSIX_reserved16 (__NR_POSIX + 184)
-#define __NR_POSIX_reserved17 (__NR_POSIX + 185)
-#define __NR_POSIX_reserved18 (__NR_POSIX + 186)
-#define __NR_POSIX_reserved19 (__NR_POSIX + 187)
-#define __NR_POSIX_reserved20 (__NR_POSIX + 188)
-#define __NR_POSIX_reserved21 (__NR_POSIX + 189)
-#define __NR_POSIX_reserved22 (__NR_POSIX + 190)
-#define __NR_POSIX_reserved23 (__NR_POSIX + 191)
-#define __NR_POSIX_reserved24 (__NR_POSIX + 192)
-#define __NR_POSIX_reserved25 (__NR_POSIX + 193)
-#define __NR_POSIX_reserved26 (__NR_POSIX + 194)
-#define __NR_POSIX_reserved27 (__NR_POSIX + 195)
-#define __NR_POSIX_reserved28 (__NR_POSIX + 196)
-#define __NR_POSIX_reserved29 (__NR_POSIX + 197)
-#define __NR_POSIX_reserved30 (__NR_POSIX + 198)
-#define __NR_POSIX_reserved31 (__NR_POSIX + 199)
-#define __NR_POSIX_reserved32 (__NR_POSIX + 200)
-#define __NR_POSIX_reserved33 (__NR_POSIX + 201)
-#define __NR_POSIX_reserved34 (__NR_POSIX + 202)
-#define __NR_POSIX_reserved35 (__NR_POSIX + 203)
-#define __NR_POSIX_reserved36 (__NR_POSIX + 204)
-#define __NR_POSIX_reserved37 (__NR_POSIX + 205)
-#define __NR_POSIX_reserved38 (__NR_POSIX + 206)
-#define __NR_POSIX_reserved39 (__NR_POSIX + 207)
-#define __NR_POSIX_reserved40 (__NR_POSIX + 208)
-#define __NR_POSIX_reserved41 (__NR_POSIX + 209)
-#define __NR_POSIX_reserved42 (__NR_POSIX + 210)
-#define __NR_POSIX_reserved43 (__NR_POSIX + 211)
-#define __NR_POSIX_reserved44 (__NR_POSIX + 212)
-#define __NR_POSIX_reserved45 (__NR_POSIX + 213)
-#define __NR_POSIX_reserved46 (__NR_POSIX + 214)
-#define __NR_POSIX_reserved47 (__NR_POSIX + 215)
-#define __NR_POSIX_reserved48 (__NR_POSIX + 216)
-#define __NR_POSIX_reserved49 (__NR_POSIX + 217)
-#define __NR_POSIX_reserved50 (__NR_POSIX + 218)
-#define __NR_POSIX_reserved51 (__NR_POSIX + 219)
-#define __NR_POSIX_reserved52 (__NR_POSIX + 220)
-#define __NR_POSIX_reserved53 (__NR_POSIX + 221)
-#define __NR_POSIX_reserved54 (__NR_POSIX + 222)
-#define __NR_POSIX_reserved55 (__NR_POSIX + 223)
-#define __NR_POSIX_reserved56 (__NR_POSIX + 224)
-#define __NR_POSIX_reserved57 (__NR_POSIX + 225)
-#define __NR_POSIX_reserved58 (__NR_POSIX + 226)
-#define __NR_POSIX_reserved59 (__NR_POSIX + 227)
-#define __NR_POSIX_reserved60 (__NR_POSIX + 228)
-#define __NR_POSIX_reserved61 (__NR_POSIX + 229)
-#define __NR_POSIX_reserved62 (__NR_POSIX + 230)
-#define __NR_POSIX_reserved63 (__NR_POSIX + 231)
-#define __NR_POSIX_reserved64 (__NR_POSIX + 232)
-#define __NR_POSIX_reserved65 (__NR_POSIX + 233)
-#define __NR_POSIX_reserved66 (__NR_POSIX + 234)
-#define __NR_POSIX_reserved67 (__NR_POSIX + 235)
-#define __NR_POSIX_reserved68 (__NR_POSIX + 236)
-#define __NR_POSIX_reserved69 (__NR_POSIX + 237)
-#define __NR_POSIX_reserved70 (__NR_POSIX + 238)
-#define __NR_POSIX_reserved71 (__NR_POSIX + 239)
-#define __NR_POSIX_reserved72 (__NR_POSIX + 240)
-#define __NR_POSIX_reserved73 (__NR_POSIX + 241)
-#define __NR_POSIX_reserved74 (__NR_POSIX + 242)
-#define __NR_POSIX_reserved75 (__NR_POSIX + 243)
-#define __NR_POSIX_reserved76 (__NR_POSIX + 244)
-#define __NR_POSIX_reserved77 (__NR_POSIX + 245)
-#define __NR_POSIX_reserved78 (__NR_POSIX + 246)
-#define __NR_POSIX_reserved79 (__NR_POSIX + 247)
-#define __NR_POSIX_reserved80 (__NR_POSIX + 248)
-#define __NR_POSIX_reserved81 (__NR_POSIX + 249)
-#define __NR_POSIX_reserved82 (__NR_POSIX + 250)
-#define __NR_POSIX_reserved83 (__NR_POSIX + 251)
-#define __NR_POSIX_reserved84 (__NR_POSIX + 252)
-#define __NR_POSIX_reserved85 (__NR_POSIX + 253)
-#define __NR_POSIX_reserved86 (__NR_POSIX + 254)
-#define __NR_POSIX_reserved87 (__NR_POSIX + 255)
-#define __NR_POSIX_reserved88 (__NR_POSIX + 256)
-#define __NR_POSIX_reserved89 (__NR_POSIX + 257)
-#define __NR_POSIX_reserved90 (__NR_POSIX + 258)
-#define __NR_POSIX_reserved91 (__NR_POSIX + 259)
-#define __NR_POSIX_netboot (__NR_POSIX + 260)
-#define __NR_POSIX_netunboot (__NR_POSIX + 261)
-#define __NR_POSIX_rdump (__NR_POSIX + 262)
-#define __NR_POSIX_setsid (__NR_POSIX + 263)
-#define __NR_POSIX_getmaxsig (__NR_POSIX + 264)
-#define __NR_POSIX_sigpending (__NR_POSIX + 265)
-#define __NR_POSIX_sigprocmask (__NR_POSIX + 266)
-#define __NR_POSIX_sigsuspend (__NR_POSIX + 267)
-#define __NR_POSIX_sigaction (__NR_POSIX + 268)
-#define __NR_POSIX_MIPS_reserved1 (__NR_POSIX + 269)
-#define __NR_POSIX_MIPS_reserved2 (__NR_POSIX + 270)
-#define __NR_POSIX_MIPS_reserved3 (__NR_POSIX + 271)
-#define __NR_POSIX_MIPS_reserved4 (__NR_POSIX + 272)
-#define __NR_POSIX_MIPS_reserved5 (__NR_POSIX + 273)
-#define __NR_POSIX_MIPS_reserved6 (__NR_POSIX + 274)
-#define __NR_POSIX_MIPS_reserved7 (__NR_POSIX + 275)
-#define __NR_POSIX_MIPS_reserved8 (__NR_POSIX + 276)
-#define __NR_POSIX_MIPS_reserved9 (__NR_POSIX + 277)
-#define __NR_POSIX_MIPS_reserved10 (__NR_POSIX + 278)
-#define __NR_POSIX_MIPS_reserved11 (__NR_POSIX + 279)
-#define __NR_POSIX_TANDEM_reserved1 (__NR_POSIX + 280)
-#define __NR_POSIX_TANDEM_reserved2 (__NR_POSIX + 281)
-#define __NR_POSIX_TANDEM_reserved3 (__NR_POSIX + 282)
-#define __NR_POSIX_TANDEM_reserved4 (__NR_POSIX + 283)
-#define __NR_POSIX_TANDEM_reserved5 (__NR_POSIX + 284)
-#define __NR_POSIX_TANDEM_reserved6 (__NR_POSIX + 285)
-#define __NR_POSIX_TANDEM_reserved7 (__NR_POSIX + 286)
-#define __NR_POSIX_TANDEM_reserved8 (__NR_POSIX + 287)
-#define __NR_POSIX_TANDEM_reserved9 (__NR_POSIX + 288)
-#define __NR_POSIX_TANDEM_reserved10 (__NR_POSIX + 289)
-#define __NR_POSIX_TANDEM_reserved11 (__NR_POSIX + 290)
-#define __NR_POSIX_TANDEM_reserved12 (__NR_POSIX + 291)
-#define __NR_POSIX_TANDEM_reserved13 (__NR_POSIX + 292)
-#define __NR_POSIX_TANDEM_reserved14 (__NR_POSIX + 293)
-#define __NR_POSIX_TANDEM_reserved15 (__NR_POSIX + 294)
-#define __NR_POSIX_TANDEM_reserved16 (__NR_POSIX + 295)
-#define __NR_POSIX_TANDEM_reserved17 (__NR_POSIX + 296)
-#define __NR_POSIX_TANDEM_reserved18 (__NR_POSIX + 297)
-#define __NR_POSIX_TANDEM_reserved19 (__NR_POSIX + 298)
-#define __NR_POSIX_TANDEM_reserved20 (__NR_POSIX + 299)
-#define __NR_POSIX_SGI_reserved7 (__NR_POSIX + 300)
-#define __NR_POSIX_SGI_reserved8 (__NR_POSIX + 301)
-#define __NR_POSIX_SGI_reserved9 (__NR_POSIX + 302)
-#define __NR_POSIX_SGI_reserved10 (__NR_POSIX + 303)
-#define __NR_POSIX_SGI_reserved11 (__NR_POSIX + 304)
-#define __NR_POSIX_SGI_reserved12 (__NR_POSIX + 305)
-#define __NR_POSIX_SGI_reserved13 (__NR_POSIX + 306)
-#define __NR_POSIX_SGI_reserved14 (__NR_POSIX + 307)
-#define __NR_POSIX_SGI_reserved15 (__NR_POSIX + 308)
-#define __NR_POSIX_SGI_reserved16 (__NR_POSIX + 309)
-#define __NR_POSIX_SGI_reserved17 (__NR_POSIX + 310)
-#define __NR_POSIX_SGI_reserved18 (__NR_POSIX + 311)
-#define __NR_POSIX_SGI_reserved19 (__NR_POSIX + 312)
-#define __NR_POSIX_SGI_reserved20 (__NR_POSIX + 313)
-#define __NR_POSIX_SGI_reserved21 (__NR_POSIX + 314)
-#define __NR_POSIX_SGI_reserved22 (__NR_POSIX + 315)
-#define __NR_POSIX_SGI_reserved23 (__NR_POSIX + 316)
-#define __NR_POSIX_SGI_reserved24 (__NR_POSIX + 317)
-#define __NR_POSIX_SGI_reserved25 (__NR_POSIX + 318)
-#define __NR_POSIX_SGI_reserved26 (__NR_POSIX + 319)
-
-#endif /* _ASM_RISCOS_SYSCALL_H */
diff -Nru a/include/asm-mips64/rmap.h b/include/asm-mips64/rmap.h
--- a/include/asm-mips64/rmap.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,7 +0,0 @@
-#ifndef __ASM_RMAP_H
-#define __ASM_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif /* __ASM_RMAP_H */
diff -Nru a/include/asm-mips64/rtc.h b/include/asm-mips64/rtc.h
--- a/include/asm-mips64/rtc.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,10 +0,0 @@
-#ifndef _I386_RTC_H
-#define _I386_RTC_H
-
-/*
- * x86 uses the default access methods for the RTC.
- */
-
-#include <asm-generic/rtc.h>
-
-#endif
diff -Nru a/include/asm-mips64/scatterlist.h b/include/asm-mips64/scatterlist.h
--- a/include/asm-mips64/scatterlist.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,13 +0,0 @@
-#ifndef __ASM_SCATTERLIST_H
-#define __ASM_SCATTERLIST_H
-
-struct scatterlist {
- struct page * page;
- unsigned int offset;
- dma_addr_t dma_address;
- unsigned int length;
-};
-
-#define ISA_DMA_THRESHOLD (0x00ffffffUL)
-
-#endif /* __ASM_SCATTERLIST_H */
diff -Nru a/include/asm-mips64/sections.h b/include/asm-mips64/sections.h
--- a/include/asm-mips64/sections.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,9 +0,0 @@
-#ifndef __ASM_SECTIONS_H
-#define __ASM_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-extern char _stext, _etext;
-extern char _end;
-
-#endif /* __ASM_SECTIONS_H */
diff -Nru a/include/asm-mips64/segment.h b/include/asm-mips64/segment.h
--- a/include/asm-mips64/segment.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,6 +0,0 @@
-#ifndef _ASM_SEGMENT_H
-#define _ASM_SEGMENT_H
-
-/* Only here because we have some old header files that expect it.. */
-
-#endif /* _ASM_SEGMENT_H */
diff -Nru a/include/asm-mips64/semaphore-helper.h b/include/asm-mips64/semaphore-helper.h
--- a/include/asm-mips64/semaphore-helper.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,182 +0,0 @@
-/*
- * SMP- and interrupt-safe semaphores helper functions.
- *
- * Copyright (C) 1996 Linus Torvalds
- * Copyright (C) 1999 Andrea Arcangeli
- * Copyright (C) 1999, 2001, 2002 Ralf Baechle
- * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
- * Copyright (C) 2000 MIPS Technologies, Inc.
- */
-#ifndef _ASM_SEMAPHORE_HELPER_H
-#define _ASM_SEMAPHORE_HELPER_H
-
-#include <linux/config.h>
-#include <linux/errno.h>
-
-#define sem_read(a) ((a)->counter)
-#define sem_inc(a) (((a)->counter)++)
-#define sem_dec(a) (((a)->counter)--)
-/*
- * These two _must_ execute atomically wrt each other.
- */
-static inline void wake_one_more(struct semaphore * sem)
-{
- atomic_inc(&sem->waking);
-}
-
-#ifdef CONFIG_CPU_HAS_LLSC
-
-static inline int waking_non_zero(struct semaphore *sem)
-{
- int ret, tmp;
-
- __asm__ __volatile__(
- "1:\tll\t%1, %2\t\t\t# waking_non_zero\n\t"
- "blez\t%1, 2f\n\t"
- "subu\t%0, %1, 1\n\t"
- "sc\t%0, %2\n\t"
- "beqz\t%0, 1b\n"
- "2:"
- : "=r" (ret), "=r" (tmp), "+m" (sem->waking)
- : "0" (0));
-
- return ret;
-}
-
-#else /* !CONFIG_CPU_HAS_LLSC */
-
-/*
- * It doesn't make sense, IMHO, to endlessly turn interrupts off and on again.
- * Do it once and that's it. ll/sc *has* it's advantages. HK
- */
-
-static inline int waking_non_zero(struct semaphore *sem)
-{
- unsigned long flags;
- int ret = 0;
-
- local_irq_save(flags);
- if (sem_read(&sem->waking) > 0) {
- sem_dec(&sem->waking);
- ret = 1;
- }
- local_irq_restore(flags);
- return ret;
-}
-#endif /* !CONFIG_CPU_HAS_LLSC */
-
-#ifdef CONFIG_CPU_HAS_LLDSCD
-
-/*
- * waking_non_zero_interruptible:
- * 1 got the lock
- * 0 go to sleep
- * -EINTR interrupted
- *
- * We must undo the sem->count down_interruptible decrement
- * simultaneously and atomically with the sem->waking adjustment,
- * otherwise we can race with wake_one_more.
- *
- * This is accomplished by doing a 64-bit lld/scd on the 2 32-bit words.
- *
- * This is crazy. Normally it's strictly forbidden to use 64-bit operations
- * in the 32-bit MIPS kernel. In this case it's however ok because if an
- * interrupt has destroyed the upper half of registers sc will fail.
- * Note also that this will not work for MIPS32 CPUs!
- *
- * Pseudocode:
- *
- * If(sem->waking > 0) {
- * Decrement(sem->waking)
- * Return(SUCCESS)
- * } else If(signal_pending(tsk)) {
- * Increment(sem->count)
- * Return(-EINTR)
- * } else {
- * Return(SLEEP)
- * }
- */
-
-static inline int
-waking_non_zero_interruptible(struct semaphore *sem, struct task_struct *tsk)
-{
- long ret, tmp;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t# waking_non_zero_interruptible\n\t"
- ".set\tmips3\n\t"
- ".set\tnoat\n"
- "0:\tlld\t%1, %2\n\t"
- "li\t%0, 0\n\t"
- "sll\t$1, %1, 0\n\t"
- "blez\t$1, 1f\n\t"
- "daddiu\t%1, %1, -1\n\t"
- "li\t%0, 1\n\t"
- "b\t2f\n"
- "1:\tbeqz\t%3, 2f\n\t"
- "li\t%0, %4\n\t"
- "dli\t$1, 0x0000000100000000\n\t"
- "daddu\t%1, %1, $1\n"
- "2:\tscd\t%1, %2\n\t"
- "beqz\t%1, 0b\n\t"
- ".set\tpop"
- : "=&r" (ret), "=&r" (tmp), "=m" (*sem)
- : "r" (signal_pending(tsk)), "i" (-EINTR));
-
- return ret;
-}
-
-/*
- * waking_non_zero_trylock is unused. we do everything in
- * down_trylock and let non-ll/sc hosts bounce around.
- */
-
-static inline int waking_non_zero_trylock(struct semaphore *sem)
-{
-#if WAITQUEUE_DEBUG
- CHECK_MAGIC(sem->__magic);
-#endif
-
- return 0;
-}
-
-#else /* !CONFIG_CPU_HAS_LLDSCD */
-
-static inline int waking_non_zero_interruptible(struct semaphore *sem,
- struct task_struct *tsk)
-{
- int ret = 0;
- unsigned long flags;
-
- local_irq_save(flags);
- if (sem_read(&sem->waking) > 0) {
- sem_dec(&sem->waking);
- ret = 1;
- } else if (signal_pending(tsk)) {
- sem_inc(&sem->count);
- ret = -EINTR;
- }
- local_irq_restore(flags);
- return ret;
-}
-
-static inline int waking_non_zero_trylock(struct semaphore *sem)
-{
- int ret = 1;
- unsigned long flags;
-
- local_irq_save(flags);
- if (sem_read(&sem->waking) <= 0)
- sem_inc(&sem->count);
- else {
- sem_dec(&sem->waking);
- ret = 0;
- }
- local_irq_restore(flags);
-
- return ret;
-}
-
-#endif /* !CONFIG_CPU_HAS_LLDSCD */
-
-#endif /* _ASM_SEMAPHORE_HELPER_H */
diff -Nru a/include/asm-mips64/semaphore.h b/include/asm-mips64/semaphore.h
--- a/include/asm-mips64/semaphore.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,194 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 Linus Torvalds
- * Copyright (C) 1998, 99, 2000, 01 Ralf Baechle
- * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc.
- * Copyright (C) 2000, 01 MIPS Technologies, Inc.
- */
-#ifndef _ASM_SEMAPHORE_H
-#define _ASM_SEMAPHORE_H
-
-#include <linux/config.h>
-#include <asm/system.h>
-#include <asm/atomic.h>
-#include <linux/spinlock.h>
-#include <linux/wait.h>
-#include <linux/rwsem.h>
-
-struct semaphore {
-#ifdef __MIPSEB__
- atomic_t count;
- atomic_t waking;
-#else
- atomic_t waking;
- atomic_t count;
-#endif
- wait_queue_head_t wait;
-#if WAITQUEUE_DEBUG
- long __magic;
-#endif
-} __attribute__((aligned(8)));
-
-#if WAITQUEUE_DEBUG
-# define __SEM_DEBUG_INIT(name) \
- , (long)&(name).__magic
-#else
-# define __SEM_DEBUG_INIT(name)
-#endif
-
-#ifdef __MIPSEB__
-#define __SEMAPHORE_INITIALIZER(name,count) \
-{ ATOMIC_INIT(count), ATOMIC_INIT(0), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
- __SEM_DEBUG_INIT(name) }
-#else
-#define __SEMAPHORE_INITIALIZER(name,count) \
-{ ATOMIC_INIT(0), ATOMIC_INIT(count), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
- __SEM_DEBUG_INIT(name) }
-#endif
-
-#define __MUTEX_INITIALIZER(name) \
- __SEMAPHORE_INITIALIZER(name,1)
-
-#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
- struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
-
-#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
-#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
-
-static inline void sema_init (struct semaphore *sem, int val)
-{
- atomic_set(&sem->count, val);
- atomic_set(&sem->waking, 0);
- init_waitqueue_head(&sem->wait);
-#if WAITQUEUE_DEBUG
- sem->__magic = (long)&sem->__magic;
-#endif
-}
-
-static inline void init_MUTEX (struct semaphore *sem)
-{
- sema_init(sem, 1);
-}
-
-static inline void init_MUTEX_LOCKED (struct semaphore *sem)
-{
- sema_init(sem, 0);
-}
-
-asmlinkage void __down(struct semaphore * sem);
-asmlinkage int __down_interruptible(struct semaphore * sem);
-asmlinkage int __down_trylock(struct semaphore * sem);
-asmlinkage void __up(struct semaphore * sem);
-
-static inline void down(struct semaphore * sem)
-{
-#if WAITQUEUE_DEBUG
- CHECK_MAGIC(sem->__magic);
-#endif
- if (atomic_dec_return(&sem->count) < 0)
- __down(sem);
-}
-
-/*
- * Interruptible try to acquire a semaphore. If we obtained
- * it, return zero. If we were interrupted, returns -EINTR
- */
-static inline int down_interruptible(struct semaphore * sem)
-{
- int ret = 0;
-
-#if WAITQUEUE_DEBUG
- CHECK_MAGIC(sem->__magic);
-#endif
- if (atomic_dec_return(&sem->count) < 0)
- ret = __down_interruptible(sem);
- return ret;
-}
-
-#ifndef CONFIG_CPU_HAS_LLDSCD
-
-/*
- * Non-blockingly attempt to down() a semaphore.
- * Returns zero if we acquired it
- */
-static inline int down_trylock(struct semaphore * sem)
-{
- int ret = 0;
- if (atomic_dec_return(&sem->count) < 0)
- ret = __down_trylock(sem);
- return ret;
-}
-
-#else
-
-/*
- * down_trylock returns 0 on success, 1 if we failed to get the lock.
- *
- * We must manipulate count and waking simultaneously and atomically.
- * Here, we do this by using lld/scd on the pair of 32-bit words.
- *
- * Pseudocode:
- *
- * Decrement(sem->count)
- * If(sem->count >=0) {
- * Return(SUCCESS) // resource is free
- * } else {
- * If(sem->waking <= 0) { // if no wakeup pending
- * Increment(sem->count) // undo decrement
- * Return(FAILURE)
- * } else {
- * Decrement(sem->waking) // otherwise "steal" wakeup
- * Return(SUCCESS)
- * }
- * }
- */
-static inline int down_trylock(struct semaphore * sem)
-{
- long ret, tmp, tmp2, sub;
-
-#if WAITQUEUE_DEBUG
- CHECK_MAGIC(sem->__magic);
-#endif
-
- __asm__ __volatile__(
- ".set\tmips3\t\t\t# down_trylock\n"
- "0:\tlld\t%1, %4\n\t"
- "dli\t%3, 0x0000000100000000\n\t"
- "dsubu\t%1, %3\n\t"
- "li\t%0, 0\n\t"
- "bgez\t%1, 2f\n\t"
- "sll\t%2, %1, 0\n\t"
- "blez\t%2, 1f\n\t"
- "daddiu\t%1, %1, -1\n\t"
- "b\t2f\n"
- "1:\tdaddu\t%1, %1, %3\n\t"
- "li\t%0, 1\n"
- "2:\tscd\t%1, %4\n\t"
- "beqz\t%1, 0b\n\t"
- ".set\tmips0"
- : "=&r"(ret), "=&r"(tmp), "=&r"(tmp2), "=&r"(sub)
- : "m"(*sem)
- : "memory");
-
- return ret;
-}
-
-#endif /* CONFIG_CPU_HAS_LLDSCD */
-
-/*
- * Note! This is subtle. We jump to wake people up only if
- * the semaphore was negative (== somebody was waiting on it).
- */
-static inline void up(struct semaphore * sem)
-{
-#if WAITQUEUE_DEBUG
- CHECK_MAGIC(sem->__magic);
-#endif
- if (atomic_inc_return(&sem->count) <= 0)
- __up(sem);
-}
-
-#endif /* _ASM_SEMAPHORE_H */
diff -Nru a/include/asm-mips64/sembuf.h b/include/asm-mips64/sembuf.h
--- a/include/asm-mips64/sembuf.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,22 +0,0 @@
-#ifndef _ASM_SEMBUF_H
-#define _ASM_SEMBUF_H
-
-/*
- * The semid64_ds structure for the MIPS architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 2 miscellaneous 64-bit values
- */
-
-struct semid64_ds {
- struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
- __kernel_time_t sem_otime; /* last semop time */
- __kernel_time_t sem_ctime; /* last change time */
- unsigned long sem_nsems; /* no. of semaphores in array */
- unsigned long __unused1;
- unsigned long __unused2;
-};
-
-#endif /* _ASM_SEMBUF_H */
diff -Nru a/include/asm-mips64/serial.h b/include/asm-mips64/serial.h
--- a/include/asm-mips64/serial.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,161 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SERIAL_H
-#define _ASM_SERIAL_H
-
-#include <linux/config.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
-
-/* Standard COM flags (except for COM4, because of the 8514 problem) */
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
-#endif
-
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
- { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
-
-#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
-#define STD_SERIAL_PORT_DEFNS
-#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
-
-#ifdef CONFIG_MIPS_SEAD
-#include <asm/mips-boards/sead.h>
-#include <asm/mips-boards/seadint.h>
-#define SEAD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, SEAD_BASE_BAUD, SEAD_UART0_REGS_BASE, SEADINT_UART0, STD_COM_FLAGS }, /* ttyS0 */
-#else
-#define SEAD_SERIAL_PORT_DEFNS
-#endif
-
-#ifdef CONFIG_MOMENCO_OCELOT_C
-/* Ordinary NS16552 duart with a 20MHz crystal. */
-#define OCELOT_C_BASE_BAUD ( 20000000 / 16 )
-
-#define OCELOT_C_SERIAL1_IRQ 80
-#define OCELOT_C_SERIAL1_BASE 0xfd000020
-
-#define OCELOT_C_SERIAL2_IRQ 81
-#define OCELOT_C_SERIAL2_BASE 0xfd000000
-
-#define _OCELOT_C_SERIAL_INIT(int, base) \
- { .baud_base = OCELOT_C_BASE_BAUD, \
- .irq = (int), \
- .flags = STD_COM_FLAGS, \
- .iomem_base = (u8 *) base, \
- .iomem_reg_shift = 2, \
- .io_type = SERIAL_IO_MEM \
- }
-#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
- _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \
- _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE)
-#else
-#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
-#endif
-
-#ifdef CONFIG_SGI_IP27
-
-/*
- * Note about serial ports and consoles:
- * For console output, everyone uses the IOC3 UARTA (offset 0x178)
- * connected to the master node (look in ip27_setup_console() and
- * ip27prom_console_write()).
- *
- * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port
- * addresses on a partitioned machine. Since we currently use the ioc3
- * serial ports, we use dynamic serial port discovery that the serial.c
- * driver uses for pci/pnp ports (there is an entry for the SGI ioc3
- * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater
- * than UARTB's, although UARTA on o200s has traditionally been known as
- * port 0. So, we just use one serial port from each ioc3 (since the
- * serial driver adds addresses to get to higher ports).
- *
- * The first one to do a register_console becomes the preferred console
- * (if there is no kernel command line console= directive). /dev/console
- * (ie 5, 1) is then "aliased" into the device number returned by the
- * "device" routine referred to in this console structure
- * (ip27prom_console_dev).
- *
- * Also look in ip27-pci.c:pci_fixuop_ioc3() for some comments on working
- * around ioc3 oddities in this respect.
- *
- * The IOC3 serials use a 22MHz clock rate with an additional divider by 3.
- * (IOC3_BAUD = (22000000 / (3*16)))
- *
- * At the moment this is only a skeleton definition as we register all serials
- * at runtime.
- */
-
-#define IP27_SERIAL_PORT_DEFNS
-#else
-#define IP27_SERIAL_PORT_DEFNS
-#endif /* CONFIG_SGI_IP27 */
-
-#ifdef CONFIG_SGI_IP32
-
-#include <asm/ip32/ip32_ints.h>
-
-/*
- * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
- */
-
-/* Standard COM flags (except for COM4, because of the 8514 problem) */
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF/* | ASYNC_SKIP_TEST*/)
-#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
-#endif
-
-#define IP32_SERIAL_PORT_DEFNS \
- { .baud_base = BASE_BAUD, \
- .irq = MACEISA_SERIAL1_IRQ, \
- .flags = STD_COM_FLAGS, \
- .iomem_base = (u8*)MACE_BASE+MACEISA_SER1_BASE, \
- .iomem_reg_shift = 8, \
- .io_type = SERIAL_IO_MEM}, \
- { .baud_base = BASE_BAUD, \
- .irq = MACEISA_SERIAL2_IRQ, \
- .flags = STD_COM_FLAGS, \
- .iomem_base = (u8*)MACE_BASE+MACEISA_SER2_BASE, \
- .iomem_reg_shift = 8, \
- .io_type = SERIAL_IO_MEM},
-#else
-#define IP32_SERIAL_PORT_DEFNS
-#endif /* CONFIG_SGI_IP31 */
-
-#define SERIAL_PORT_DFNS \
- IP27_SERIAL_PORT_DEFNS \
- IP32_SERIAL_PORT_DEFNS \
- MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
- SEAD_SERIAL_PORT_DEFNS \
- STD_SERIAL_PORT_DEFNS
-
-#define RS_TABLE_SIZE 64
-
-#endif /* _ASM_SERIAL_H */
diff -Nru a/include/asm-mips64/sfp-machine.h b/include/asm-mips64/sfp-machine.h
--- a/include/asm-mips64/sfp-machine.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-#define _FP_W_TYPE_SIZE 64
-#define _FP_W_TYPE unsigned long
-#define _FP_WS_TYPE signed long
-#define _FP_I_TYPE long
-
-#define _FP_MUL_MEAT_S(R,X,Y) \
- _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
-#define _FP_MUL_MEAT_D(R,X,Y) \
- _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
-#define _FP_MUL_MEAT_Q(R,X,Y) \
- _FP_MUL_MEAT_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
-
-#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
-#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
-#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
-
-#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
-#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
-#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
-#define _FP_NANSIGN_S 0
-#define _FP_NANSIGN_D 0
-#define _FP_NANSIGN_Q 0
-
-#define _FP_KEEPNANFRACP 1
-/* From my experiments it seems X is chosen unless one of the
- NaNs is sNaN, in which case the result is NANSIGN/NANFRAC. */
-#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
- do { \
- if ((_FP_FRAC_HIGH_RAW_##fs(X) | \
- _FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs) \
- { \
- R##_s = _FP_NANSIGN_##fs; \
- _FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs); \
- } \
- else \
- { \
- R##_s = X##_s; \
- _FP_FRAC_COPY_##wc(R,X); \
- } \
- R##_c = FP_CLS_NAN; \
- } while (0)
-
-#define FP_EX_INVALID (1 << 4)
-#define FP_EX_DIVZERO (1 << 3)
-#define FP_EX_OVERFLOW (1 << 2)
-#define FP_EX_UNDERFLOW (1 << 1)
-#define FP_EX_INEXACT (1 << 0)
diff -Nru a/include/asm-mips64/sgi/gio.h b/include/asm-mips64/sgi/gio.h
--- a/include/asm-mips64/sgi/gio.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,86 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * gio.h: Definitions for SGI GIO bus
- *
- * Copyright (C) 2002 Ladislav Michl
- */
-
-#ifndef _SGI_GIO_H
-#define _SGI_GIO_H
-
-/*
- * GIO bus addresses
- *
- * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have
- * three physical connectors, but only two slots, GFX and EXP0.
- *
- * There is 10MB of GIO address space for GIO64 slot devices
- * slot# slot type address range size
- * ----- --------- ----------------------- -----
- * 0 GFX 0x1f000000 - 0x1f3fffff 4MB
- * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB
- * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB
- *
- * There are un-slotted devices, HPC, I/O and misc devices, which are grouped
- * into the HPC address space.
- * - MISC 0x1fb00000 - 0x1fbfffff 1MB
- *
- * Following space is reserved and unused
- * - RESERVED 0x18000000 - 0x1effffff 112MB
- *
- * GIO bus IDs
- *
- * Each GIO bus device identifies itself to the system by answering a
- * read with an "ID" value. IDs are either 8 or 32 bits long. IDs less
- * than 128 are 8 bits long, with the most significant 24 bits read from
- * the slot undefined.
- *
- * 32-bit IDs are divided into
- * bits 0:6 the product ID; ranges from 0x00 to 0x7F.
- * bit 7 0=GIO Product ID is 8 bits wide
- * 1=GIO Product ID is 32 bits wide.
- * bits 8:15 manufacturer version for the product.
- * bit 16 0=GIO32 and GIO32-bis, 1=GIO64.
- * bit 17 0=no ROM present
- * 1=ROM present on this board AND next three words
- * space define the ROM.
- * bits 18:31 up to manufacturer.
- *
- * IDs above 0x50/0xd0 are of 3rd party boards.
- *
- * 8-bit IDs
- * 0x01 XPI low cost FDDI
- * 0x02 GTR TokenRing
- * 0x04 Synchronous ISDN
- * 0x05 ATM board [*]
- * 0x06 Canon Interface
- * 0x07 16 bit SCSI Card [*]
- * 0x08 JPEG (Double Wide)
- * 0x09 JPEG (Single Wide)
- * 0x0a XPI mez. FDDI device 0
- * 0x0b XPI mez. FDDI device 1
- * 0x0c SMPTE 259M Video [*]
- * 0x0d Babblefish Compression [*]
- * 0x0e E-Plex 8-port Ethernet
- * 0x30 Lyon Lamb IVAS
- * 0xb8 GIO 100BaseTX Fast Ethernet (gfe)
- *
- * [*] Device provide 32-bit ID.
- *
- */
-
-#define GIO_ID(x) (x & 0x7f)
-#define GIO_32BIT_ID 0x80
-#define GIO_REV(x) ((x >> 8) & 0xff)
-#define GIO_64BIT_IFACE 0x10000
-#define GIO_ROM_PRESENT 0x20000
-#define GIO_VENDOR_CODE(x) ((x >> 18) & 0x3fff)
-
-#define GIO_SLOT_GFX_BASE 0x1f000000
-#define GIO_SLOT_EXP0_BASE 0x1f400000
-#define GIO_SLOT_EXP1_BASE 0x1f600000
-
-#endif /* _SGI_GIO_H */
diff -Nru a/include/asm-mips64/sgi/hpc3.h b/include/asm-mips64/sgi/hpc3.h
--- a/include/asm-mips64/sgi/hpc3.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,316 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * hpc3.h: Definitions for SGI HPC3 controller
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1998 Ralf Baechle
- */
-
-#ifndef _SGI_HPC3_H
-#define _SGI_HPC3_H
-
-#include <linux/types.h>
-#include <asm/page.h>
-
-/* An HPC DMA descriptor. */
-struct hpc_dma_desc {
- u32 pbuf; /* physical address of data buffer */
- u32 cntinfo; /* counter and info bits */
-#define HPCDMA_EOX 0x80000000 /* last desc in chain for tx */
-#define HPCDMA_EOR 0x80000000 /* last desc in chain for rx */
-#define HPCDMA_EOXP 0x40000000 /* end of packet for tx */
-#define HPCDMA_EORP 0x40000000 /* end of packet for rx */
-#define HPCDMA_XIE 0x20000000 /* irq generated when at end of this desc */
-#define HPCDMA_XIU 0x01000000 /* Tx buffer in use by CPU. */
-#define HPCDMA_EIPC 0x00ff0000 /* SEEQ ethernet special xternal bytecount */
-#define HPCDMA_ETXD 0x00008000 /* set to one by HPC when packet tx'd */
-#define HPCDMA_OWN 0x00004000 /* Denotes ring buffer ownership on rx */
-#define HPCDMA_BCNT 0x00003fff /* size in bytes of this dma buffer */
-
- u32 pnext; /* paddr of next hpc_dma_desc if any */
-};
-
-/* The set of regs for each HPC3 PBUS DMA channel. */
-struct hpc3_pbus_dmacregs {
- volatile u32 pbdma_bptr; /* pbus dma channel buffer ptr */
- volatile u32 pbdma_dptr; /* pbus dma channel desc ptr */
- u32 _unused0[0x1000/4 - 2]; /* padding */
- volatile u32 pbdma_ctrl; /* pbus dma channel control register has
- * copletely different meaning for read
- * compared with write */
- /* read */
-#define HPC3_PDMACTRL_INT 0x00000001 /* interrupt (cleared after read) */
-#define HPC3_PDMACTRL_ISACT 0x00000002 /* channel active */
- /* write */
-#define HPC3_PDMACTRL_SEL 0x00000002 /* little endian transfer */
-#define HPC3_PDMACTRL_RCV 0x00000004 /* direction is receive */
-#define HPC3_PDMACTRL_FLSH 0x00000008 /* enable flush for receive DMA */
-#define HPC3_PDMACTRL_ACT 0x00000010 /* start dma transfer */
-#define HPC3_PDMACTRL_LD 0x00000020 /* load enable for ACT */
-#define HPC3_PDMACTRL_RT 0x00000040 /* Use realtime GIO bus servicing */
-#define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
-#define HPC3_PDMACTRL_FB 0x003f0000 /* Ptr to beginning of fifo */
-#define HPC3_PDMACTRL_FE 0x3f000000 /* Ptr to end of fifo */
-
- u32 _unused1[0x1000/4 - 1]; /* padding */
-};
-
-/* The HPC3 SCSI registers, this does not include external ones. */
-struct hpc3_scsiregs {
- volatile u32 cbptr; /* current dma buffer ptr, diagnostic use only */
- volatile u32 ndptr; /* next dma descriptor ptr */
- u32 _unused0[0x1000/4 - 2]; /* padding */
- volatile u32 bcd; /* byte count info */
-#define HPC3_SBCD_BCNTMSK 0x00003fff /* bytes to transfer from/to memory */
-#define HPC3_SBCD_XIE 0x00004000 /* Send IRQ when done with cur buf */
-#define HPC3_SBCD_EOX 0x00008000 /* Indicates this is last buf in chain */
-
- volatile u32 ctrl; /* control register */
-#define HPC3_SCTRL_IRQ 0x01 /* IRQ asserted, either dma done or parity */
-#define HPC3_SCTRL_ENDIAN 0x02 /* DMA endian mode, 0=big 1=little */
-#define HPC3_SCTRL_DIR 0x04 /* DMA direction, 1=dev2mem 0=mem2dev */
-#define HPC3_SCTRL_FLUSH 0x08 /* Tells HPC3 to flush scsi fifos */
-#define HPC3_SCTRL_ACTIVE 0x10 /* SCSI DMA channel is active */
-#define HPC3_SCTRL_AMASK 0x20 /* DMA active inhibits PIO */
-#define HPC3_SCTRL_CRESET 0x40 /* Resets dma channel and external controller */
-#define HPC3_SCTRL_PERR 0x80 /* Bad parity on HPC3 iface to scsi controller */
-
- volatile u32 gfptr; /* current GIO fifo ptr */
- volatile u32 dfptr; /* current device fifo ptr */
- volatile u32 dconfig; /* DMA configuration register */
-#define HPC3_SDCFG_HCLK 0x00001 /* Enable DMA half clock mode */
-#define HPC3_SDCFG_D1 0x00006 /* Cycles to spend in D1 state */
-#define HPC3_SDCFG_D2 0x00038 /* Cycles to spend in D2 state */
-#define HPC3_SDCFG_D3 0x001c0 /* Cycles to spend in D3 state */
-#define HPC3_SDCFG_HWAT 0x00e00 /* DMA high water mark */
-#define HPC3_SDCFG_HW 0x01000 /* Enable 16-bit halfword DMA accesses to scsi */
-#define HPC3_SDCFG_SWAP 0x02000 /* Byte swap all DMA accesses */
-#define HPC3_SDCFG_EPAR 0x04000 /* Enable parity checking for DMA */
-#define HPC3_SDCFG_POLL 0x08000 /* hd_dreq polarity control */
-#define HPC3_SDCFG_ERLY 0x30000 /* hd_dreq behavior control bits */
-
- volatile u32 pconfig; /* PIO configuration register */
-#define HPC3_SPCFG_P3 0x0003 /* Cycles to spend in P3 state */
-#define HPC3_SPCFG_P2W 0x001c /* Cycles to spend in P2 state for writes */
-#define HPC3_SPCFG_P2R 0x01e0 /* Cycles to spend in P2 state for reads */
-#define HPC3_SPCFG_P1 0x0e00 /* Cycles to spend in P1 state */
-#define HPC3_SPCFG_HW 0x1000 /* Enable 16-bit halfword PIO accesses to scsi */
-#define HPC3_SPCFG_SWAP 0x2000 /* Byte swap all PIO accesses */
-#define HPC3_SPCFG_EPAR 0x4000 /* Enable parity checking for PIO */
-#define HPC3_SPCFG_FUJI 0x8000 /* Fujitsu scsi controller mode for faster dma/pio */
-
- u32 _unused1[0x1000/4 - 6]; /* padding */
-};
-
-/* SEEQ ethernet HPC3 registers, only one seeq per HPC3. */
-struct hpc3_ethregs {
- /* Receiver registers. */
- volatile u32 rx_cbptr; /* current dma buffer ptr, diagnostic use only */
- volatile u32 rx_ndptr; /* next dma descriptor ptr */
- u32 _unused0[0x1000/4 - 2]; /* padding */
- volatile u32 rx_bcd; /* byte count info */
-#define HPC3_ERXBCD_BCNTMSK 0x00003fff /* bytes to be sent to memory */
-#define HPC3_ERXBCD_XIE 0x20000000 /* HPC3 interrupts cpu at end of this buf */
-#define HPC3_ERXBCD_EOX 0x80000000 /* flags this as end of descriptor chain */
-
- volatile u32 rx_ctrl; /* control register */
-#define HPC3_ERXCTRL_STAT50 0x0000003f /* Receive status reg bits of Seeq8003 */
-#define HPC3_ERXCTRL_STAT6 0x00000040 /* Rdonly irq status */
-#define HPC3_ERXCTRL_STAT7 0x00000080 /* Rdonlt old/new status bit from Seeq */
-#define HPC3_ERXCTRL_ENDIAN 0x00000100 /* Endian for dma channel, little=1 big=0 */
-#define HPC3_ERXCTRL_ACTIVE 0x00000200 /* Tells if DMA transfer is in progress */
-#define HPC3_ERXCTRL_AMASK 0x00000400 /* Tells if ACTIVE inhibits PIO's to hpc3 */
-#define HPC3_ERXCTRL_RBO 0x00000800 /* Receive buffer overflow if set to 1 */
-
- volatile u32 rx_gfptr; /* current GIO fifo ptr */
- volatile u32 rx_dfptr; /* current device fifo ptr */
- u32 _unused1; /* padding */
- volatile u32 rx_reset; /* reset register */
-#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */
-#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */
-#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
-
- volatile u32 rx_dconfig; /* DMA configuration register */
-#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
-#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
-#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
-#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
-#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
-#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
-#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
-#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */
-
- volatile u32 rx_pconfig; /* PIO configuration register */
-#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
-#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
-#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
-#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
-
- u32 _unused2[0x1000/4 - 8]; /* padding */
-
- /* Transmitter registers. */
- volatile u32 tx_cbptr; /* current dma buffer ptr, diagnostic use only */
- volatile u32 tx_ndptr; /* next dma descriptor ptr */
- u32 _unused3[0x1000/4 - 2]; /* padding */
- volatile u32 tx_bcd; /* byte count info */
-#define HPC3_ETXBCD_BCNTMSK 0x00003fff /* bytes to be read from memory */
-#define HPC3_ETXBCD_ESAMP 0x10000000 /* if set, too late to add descriptor */
-#define HPC3_ETXBCD_XIE 0x20000000 /* Interrupt cpu at end of cur desc */
-#define HPC3_ETXBCD_EOP 0x40000000 /* Last byte of cur buf is end of packet */
-#define HPC3_ETXBCD_EOX 0x80000000 /* This buf is the end of desc chain */
-
- volatile u32 tx_ctrl; /* control register */
-#define HPC3_ETXCTRL_STAT30 0x0000000f /* Rdonly copy of seeq tx stat reg */
-#define HPC3_ETXCTRL_STAT4 0x00000010 /* Indicate late collision occurred */
-#define HPC3_ETXCTRL_STAT75 0x000000e0 /* Rdonly irq status from seeq */
-#define HPC3_ETXCTRL_ENDIAN 0x00000100 /* DMA channel endian mode, 1=little 0=big */
-#define HPC3_ETXCTRL_ACTIVE 0x00000200 /* DMA tx channel is active */
-#define HPC3_ETXCTRL_AMASK 0x00000400 /* Indicates ACTIVE inhibits PIO's */
-
- volatile u32 tx_gfptr; /* current GIO fifo ptr */
- volatile u32 tx_dfptr; /* current device fifo ptr */
- u32 _unused4[0x1000/4 - 4]; /* padding */
-};
-
-struct hpc3_regs {
- /* First regs for the PBUS 8 dma channels. */
- struct hpc3_pbus_dmacregs pbdma[8];
-
- /* Now the HPC scsi registers, we get two scsi reg sets. */
- struct hpc3_scsiregs scsi_chan0, scsi_chan1;
-
- /* The SEEQ hpc3 ethernet dma/control registers. */
- struct hpc3_ethregs ethregs;
-
- /* Here are where the hpc3 fifo's can be directly accessed
- * via PIO accesses. Under normal operation we never stick
- * our grubby paws in here so it's just padding. */
- u32 _unused0[0x18000/4];
-
- /* HPC3 irq status regs. Due to a peculiar bug you need to
- * look at two different register addresses to get at all of
- * the status bits. The first reg can only reliably report
- * bits 4:0 of the status, and the second reg can only
- * reliably report bits 9:5 of the hpc3 irq status. I told
- * you it was a peculiar bug. ;-)
- */
- volatile u32 istat0; /* Irq status, only bits <4:0> reliable. */
-#define HPC3_ISTAT_PBIMASK 0x0ff /* irq bits for pbus devs 0 --> 7 */
-#define HPC3_ISTAT_SC0MASK 0x100 /* irq bit for scsi channel 0 */
-#define HPC3_ISTAT_SC1MASK 0x200 /* irq bit for scsi channel 1 */
-
- volatile u32 gio_misc; /* GIO misc control bits. */
-#define HPC3_GIOMISC_ERTIME 0x1 /* Enable external timer real time. */
-#define HPC3_GIOMISC_DENDIAN 0x2 /* dma descriptor endian, 1=lit 0=big */
-
- volatile u32 eeprom; /* EEPROM data reg. */
-#define HPC3_EEPROM_EPROT 0x01 /* Protect register enable */
-#define HPC3_EEPROM_CSEL 0x02 /* Chip select */
-#define HPC3_EEPROM_ECLK 0x04 /* EEPROM clock */
-#define HPC3_EEPROM_DATO 0x08 /* Data out */
-#define HPC3_EEPROM_DATI 0x10 /* Data in */
-
- volatile u32 istat1; /* Irq status, only bits <9:5> reliable. */
- volatile u32 gio_estat; /* GIO error interrupt status reg. */
-#define HPC3_GIOESTAT_BLMASK 0x000ff /* Bus lane where bad parity occurred */
-#define HPC3_GIOESTAT_CTYPE 0x00100 /* Bus cycle type, 0=PIO 1=DMA */
-#define HPC3_GIOESTAT_PIDMSK 0x3f700 /* DMA channel parity identifier */
-
- u32 _unused1[0x14000/4 - 5]; /* padding */
-
- /* Now direct PIO per-HPC3 peripheral access to external regs. */
- volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
- u32 _unused2[0x7c00/4];
- volatile u32 scsi1_ext[256]; /* SCSI channel 1 external regs */
- u32 _unused3[0x7c00/4];
- volatile u32 eth_ext[320]; /* Ethernet external registers */
- u32 _unused4[0x3b00/4];
-
- /* Per-peripheral device external registers and DMA/PIO control. */
- volatile u32 pbus_extregs[16][256];
- volatile u32 pbus_dmacfg[8][128];
- /* Cycles to spend in D3 for reads */
-#define HPC3_DMACFG_D3R_MASK 0x00000001
-#define HPC3_DMACFG_D3R_SHIFT 0
- /* Cycles to spend in D4 for reads */
-#define HPC3_DMACFG_D4R_MASK 0x0000001e
-#define HPC3_DMACFG_D4R_SHIFT 1
- /* Cycles to spend in D5 for reads */
-#define HPC3_DMACFG_D5R_MASK 0x000001e0
-#define HPC3_DMACFG_D5R_SHIFT 5
- /* Cycles to spend in D3 for writes */
-#define HPC3_DMACFG_D3W_MASK 0x00000200
-#define HPC3_DMACFG_D3W_SHIFT 9
- /* Cycles to spend in D4 for writes */
-#define HPC3_DMACFG_D4W_MASK 0x00003c00
-#define HPC3_DMACFG_D4W_SHIFT 10
- /* Cycles to spend in D5 for writes */
-#define HPC3_DMACFG_D5W_MASK 0x0003c000
-#define HPC3_DMACFG_D5W_SHIFT 14
- /* Enable 16-bit DMA access mode */
-#define HPC3_DMACFG_DS16 0x00040000
- /* Places halfwords on high 16 bits of bus */
-#define HPC3_DMACFG_EVENHI 0x00080000
- /* Make this device real time */
-#define HPC3_DMACFG_RTIME 0x00200000
- /* 5 bit burst count for DMA device */
-#define HPC3_DMACFG_BURST_MASK 0x07c00000
-#define HPC3_DMACFG_BURST_SHIFT 22
- /* Use live pbus_dreq unsynchronized signal */
-#define HPC3_DMACFG_DRQLIVE 0x08000000
- volatile u32 pbus_piocfg[16][64];
- /* Cycles to spend in P2 state for reads */
-#define HPC3_PIOCFG_P2R_MASK 0x00001
-#define HPC3_PIOCFG_P2R_SHIFT 0
- /* Cycles to spend in P3 state for reads */
-#define HPC3_PIOCFG_P3R_MASK 0x0001e
-#define HPC3_PIOCFG_P3R_SHIFT 1
- /* Cycles to spend in P4 state for reads */
-#define HPC3_PIOCFG_P4R_MASK 0x001e0
-#define HPC3_PIOCFG_P4R_SHIFT 5
- /* Cycles to spend in P2 state for writes */
-#define HPC3_PIOCFG_P2W_MASK 0x00200
-#define HPC3_PIOCFG_P2W_SHIFT 9
- /* Cycles to spend in P3 state for writes */
-#define HPC3_PIOCFG_P3W_MASK 0x03c00
-#define HPC3_PIOCFG_P3W_SHIFT 10
- /* Cycles to spend in P4 state for writes */
-#define HPC3_PIOCFG_P4W_MASK 0x3c000
-#define HPC3_PIOCFG_P4W_SHIFT 14
- /* Enable 16-bit PIO accesses */
-#define HPC3_PIOCFG_DS16 0x40000
- /* Place even address bits in bits <15:8> */
-#define HPC3_PIOCFG_EVENHI 0x80000
-
- /* PBUS PROM control regs. */
- volatile u32 pbus_promwe; /* PROM write enable register */
-#define HPC3_PROM_WENAB 0x1 /* Enable writes to the PROM */
-
- u32 _unused5[0x0800/4 - 1];
- volatile u32 pbus_promswap; /* Chip select swap reg */
-#define HPC3_PROM_SWAP 0x1 /* invert GIO addr bit to select prom0 or prom1 */
-
- u32 _unused6[0x0800/4 - 1];
- volatile u32 pbus_gout; /* PROM general purpose output reg */
-#define HPC3_PROM_STAT 0x1 /* General purpose status bit in gout */
-
- u32 _unused7[0x1000/4 - 1];
- volatile u32 rtcregs[14]; /* Dallas clock registers */
- u32 _unused8[50];
- volatile u32 bbram[8192-50-14]; /* Battery backed ram */
-};
-
-/*
- * It is possible to have two HPC3's within the address space on
- * one machine, though only having one is more likely on an Indy.
- */
-extern struct hpc3_regs *hpc3c0, *hpc3c1;
-#define HPC3_CHIP0_BASE 0x1fb80000 /* physical */
-#define HPC3_CHIP1_BASE 0x1fb00000 /* physical */
-
-extern void sgihpc_init(void);
-
-#endif /* _SGI_HPC3_H */
diff -Nru a/include/asm-mips64/sgi/io.h b/include/asm-mips64/sgi/io.h
--- a/include/asm-mips64/sgi/io.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,21 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SGI_IO_H
-#define _ASM_SGI_IO_H
-
-#include <asm/addrspace.h>
-
-#define IO_SPACE_BASE K1BASE
-
-/* For Indigo2. */
-#define IO_SPACE_LIMIT 0xffff
-
-/* XXX ISA specific functions go here here. */
-
-#endif /* _ASM_SGI_IO_H */
diff -Nru a/include/asm-mips64/sgi/ioc.h b/include/asm-mips64/sgi/ioc.h
--- a/include/asm-mips64/sgi/ioc.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,209 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * ioc.h: Definitions for SGI I/O Controller
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle
- * Copyright (C) 2001, 2003 Ladislav Michl
- */
-
-#ifndef _SGI_IOC_H
-#define _SGI_IOC_H
-
-#include <linux/types.h>
-
-/*
- * All registers are 8-bit wide alligned on 32-bit boundary. Bad things
- * happen if you try word access them. You have been warned.
- */
-
-struct sgioc_pport_regs {
- u8 _data[3];
- volatile u8 data;
- u8 _ctrl[3];
- volatile u8 ctrl;
-#define SGIOC_PCTRL_STROBE 0x01
-#define SGIOC_PCTRL_AFD 0x02
-#define SGIOC_PCTRL_INIT 0x04
-#define SGIOC_PCTRL_SLIN 0x08
-#define SGIOC_PCTRL_DIRECTION 0x20
-#define SGIOC_PCTRL_SEL 0x40
- u8 _status[3];
- volatile u8 status;
-#define SGIOC_PSTAT_DEVID 0x03
-#define SGIOC_PSTAT_NOINK 0x04
-#define SGIOC_PSTAT_ERROR 0x08
-#define SGIOC_PSTAT_ONLINE 0x10
-#define SGIOC_PSTAT_PE 0x20
-#define SGIOC_PSTAT_ACK 0x40
-#define SGIOC_PSTAT_BUSY 0x80
- u8 _dmactrl[3];
- volatile u8 dmactrl;
- u8 _intrstat[3];
- volatile u8 intrstat;
- u8 _intrmask[3];
- volatile u8 intrmask;
- u8 _timer1[3];
- volatile u8 timer1;
- u8 _timer2[3];
- volatile u8 timer2;
- u8 _timer3[3];
- volatile u8 timer3;
- u8 _timer4[3];
- volatile u8 timer4;
-};
-
-struct sgioc_uart_regs {
- u8 _ctrl1[3];
- volatile u8 ctrl1;
- u8 _data1[3];
- volatile u8 data1;
- u8 _ctrl2[3];
- volatile u8 ctrl2;
- u8 _data2[3];
- volatile u8 data2;
-};
-
-struct sgioc_keyb_regs {
- u8 _data[3];
- volatile u8 data;
- u8 _command[3];
- volatile u8 command;
-};
-
-struct sgint_regs {
- u8 _istat0[3];
- volatile u8 istat0; /* Interrupt status zero */
-#define SGINT_ISTAT0_FFULL 0x01
-#define SGINT_ISTAT0_SCSI0 0x02
-#define SGINT_ISTAT0_SCSI1 0x04
-#define SGINT_ISTAT0_ENET 0x08
-#define SGINT_ISTAT0_GFXDMA 0x10
-#define SGINT_ISTAT0_PPORT 0x20
-#define SGINT_ISTAT0_HPC2 0x40
-#define SGINT_ISTAT0_LIO2 0x80
- u8 _imask0[3];
- volatile u8 imask0; /* Interrupt mask zero */
- u8 _istat1[3];
- volatile u8 istat1; /* Interrupt status one */
-#define SGINT_ISTAT1_ISDNI 0x01
-#define SGINT_ISTAT1_PWR 0x02
-#define SGINT_ISTAT1_ISDNH 0x04
-#define SGINT_ISTAT1_LIO3 0x08
-#define SGINT_ISTAT1_HPC3 0x10
-#define SGINT_ISTAT1_AFAIL 0x20
-#define SGINT_ISTAT1_VIDEO 0x40
-#define SGINT_ISTAT1_GIO2 0x80
- u8 _imask1[3];
- volatile u8 imask1; /* Interrupt mask one */
- u8 _vmeistat[3];
- volatile u8 vmeistat; /* VME interrupt status */
- u8 _cmeimask0[3];
- volatile u8 cmeimask0; /* VME interrupt mask zero */
- u8 _cmeimask1[3];
- volatile u8 cmeimask1; /* VME interrupt mask one */
- u8 _cmepol[3];
- volatile u8 cmepol; /* VME polarity */
- u8 _tclear[3];
- volatile u8 tclear;
- u8 _errstat[3];
- volatile u8 errstat; /* Error status reg, reserved on INT2 */
- u32 _unused0[2];
- u8 _tcnt0[3];
- volatile u8 tcnt0; /* counter 0 */
- u8 _tcnt1[3];
- volatile u8 tcnt1; /* counter 1 */
- u8 _tcnt2[3];
- volatile u8 tcnt2; /* counter 2 */
- u8 _tcword[3];
- volatile u8 tcword; /* control word */
-#define SGINT_TCWORD_BCD 0x01 /* Use BCD mode for counters */
-#define SGINT_TCWORD_MMASK 0x0e /* Mode bitmask. */
-#define SGINT_TCWORD_MITC 0x00 /* IRQ on terminal count (doesn't work) */
-#define SGINT_TCWORD_MOS 0x02 /* One-shot IRQ mode. */
-#define SGINT_TCWORD_MRGEN 0x04 /* Normal rate generation */
-#define SGINT_TCWORD_MSWGEN 0x06 /* Square wave generator mode */
-#define SGINT_TCWORD_MSWST 0x08 /* Software strobe */
-#define SGINT_TCWORD_MHWST 0x0a /* Hardware strobe */
-#define SGINT_TCWORD_CMASK 0x30 /* Command mask */
-#define SGINT_TCWORD_CLAT 0x00 /* Latch command */
-#define SGINT_TCWORD_CLSB 0x10 /* LSB read/write */
-#define SGINT_TCWORD_CMSB 0x20 /* MSB read/write */
-#define SGINT_TCWORD_CALL 0x30 /* Full counter read/write */
-#define SGINT_TCWORD_CNT0 0x00 /* Select counter zero */
-#define SGINT_TCWORD_CNT1 0x40 /* Select counter one */
-#define SGINT_TCWORD_CNT2 0x80 /* Select counter two */
-#define SGINT_TCWORD_CRBCK 0xc0 /* Readback command */
-};
-
-#define SGINT_TCSAMP_COUNTER 10255
-
-/* We need software copies of these because they are write only. */
-extern u8 sgi_ioc_reset, sgi_ioc_write;
-
-struct sgioc_regs {
- struct sgioc_pport_regs pport;
- u32 _unused0[2];
- struct sgioc_uart_regs serport;
- struct sgioc_keyb_regs kbdmouse;
- u8 _gcsel[3];
- volatile u8 gcsel;
- u8 _genctrl[3];
- volatile u8 genctrl;
- u8 _panel[3];
- volatile u8 panel;
-#define SGIOC_PANEL_POWERON 0x01
-#define SGIOC_PANEL_POWERINTR 0x02
-#define SGIOC_PANEL_VOLDNINTR 0x10
-#define SGIOC_PANEL_VOLDNHOLD 0x20
-#define SGIOC_PANEL_VOLUPINTR 0x40
-#define SGIOC_PANEL_VOLUPHOLD 0x80
- u32 _unused1;
- u8 _sysid[3];
- volatile u8 sysid;
-#define SGIOC_SYSID_FULLHOUSE 0x01
-#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5)
-#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1)
- u32 _unused2;
- u8 _read[3];
- volatile u8 read;
- u32 _unused3;
- u8 _dmasel[3];
- volatile u8 dmasel;
-#define SGIOC_DMASEL_SCLK10MHZ 0x00 /* use 10MHZ serial clock */
-#define SGIOC_DMASEL_ISDNB 0x01 /* enable isdn B */
-#define SGIOC_DMASEL_ISDNA 0x02 /* enable isdn A */
-#define SGIOC_DMASEL_PPORT 0x04 /* use parallel DMA */
-#define SGIOC_DMASEL_SCLK667MHZ 0x10 /* use 6.67MHZ serial clock */
-#define SGIOC_DMASEL_SCLKEXT 0x20 /* use external serial clock */
- u32 _unused4;
- u8 _reset[3];
- volatile u8 reset;
-#define SGIOC_RESET_PPORT 0x01 /* 0=parport reset, 1=nornal */
-#define SGIOC_RESET_KBDMOUSE 0x02 /* 0=kbdmouse reset, 1=normal */
-#define SGIOC_RESET_EISA 0x04 /* 0=eisa reset, 1=normal */
-#define SGIOC_RESET_ISDN 0x08 /* 0=isdn reset, 1=normal */
-#define SGIOC_RESET_LC0OFF 0x10 /* guiness: turn led off (red, else green) */
-#define SGIOC_RESET_LC1OFF 0x20 /* guiness: turn led off (green, else amber) */
- u32 _unused5;
- u8 _write[3];
- volatile u8 write;
-#define SGIOC_WRITE_NTHRESH 0x01 /* use 4.5db threshhold */
-#define SGIOC_WRITE_TPSPEED 0x02 /* use 100ohm TP speed */
-#define SGIOC_WRITE_EPSEL 0x04 /* force cable mode: 1=AUI 0=TP */
-#define SGIOC_WRITE_EASEL 0x08 /* 1=autoselect 0=manual cable selection */
-#define SGIOC_WRITE_U1AMODE 0x10 /* 1=PC 0=MAC UART mode */
-#define SGIOC_WRITE_U0AMODE 0x20 /* 1=PC 0=MAC UART mode */
-#define SGIOC_WRITE_MLO 0x40 /* 1=4.75V 0=+5V */
-#define SGIOC_WRITE_MHI 0x80 /* 1=5.25V 0=+5V */
- u32 _unused6;
- struct sgint_regs int3;
-};
-
-extern struct sgioc_regs *sgioc;
-extern struct sgint_regs *sgint;
-
-#endif
diff -Nru a/include/asm-mips64/sgi/ip22.h b/include/asm-mips64/sgi/ip22.h
--- a/include/asm-mips64/sgi/ip22.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,77 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * ip22.h: Definitions for SGI IP22 machines
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle
- */
-
-#ifndef _SGI_IP22_H
-#define _SGI_IP22_H
-
-/*
- * These are the virtual IRQ numbers, we divide all IRQ's into
- * 'spaces', the 'space' determines where and how to enable/disable
- * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups
- * are not supported this way. Driver is supposed to allocate HPC/MC
- * interrupt as shareable and then look to proper status bit (see
- * HAL2 driver). This will prevent many complications, trust me ;-)
- */
-
-#include <asm/sgi/ioc.h>
-
-#define SGINT_EISA 0 /* INDIGO 2 has 16 EISA irq levels */
-#define SGINT_CPU 16 /* MIPS CPU define 8 interrupt sources */
-#define SGINT_LOCAL0 24 /* INDY has 8 local0 irq levels */
-#define SGINT_LOCAL1 32 /* INDY has 8 local1 irq levels */
-#define SGINT_LOCAL2 40 /* INDY has 8 local2 vectored irq levels */
-#define SGINT_LOCAL3 48 /* INDY has 8 local3 vectored irq levels */
-#define SGINT_END 56 /* End of 'spaces' */
-
-/*
- * Individual interrupt definitions for the Indy and Indigo2
- */
-
-#define SGI_SOFT_0_IRQ SGINT_CPU + 0
-#define SGI_SOFT_1_IRQ SGINT_CPU + 1
-#define SGI_LOCAL_0_IRQ SGINT_CPU + 2
-#define SGI_LOCAL_1_IRQ SGINT_CPU + 3
-#define SGI_8254_0_IRQ SGINT_CPU + 4
-#define SGI_8254_1_IRQ SGINT_CPU + 5
-#define SGI_BUSERR_IRQ SGINT_CPU + 6
-#define SGI_TIMER_IRQ SGINT_CPU + 7
-
-#define SGI_FIFO_IRQ SGINT_LOCAL0 + 0 /* FIFO full */
-#define SGI_GIO_0_IRQ SGI_FIFO_IRQ /* GIO-0 */
-#define SGI_WD93_0_IRQ SGINT_LOCAL0 + 1 /* 1st onboard WD93 */
-#define SGI_WD93_1_IRQ SGINT_LOCAL0 + 2 /* 2nd onboard WD93 */
-#define SGI_ENET_IRQ SGINT_LOCAL0 + 3 /* onboard ethernet */
-#define SGI_MCDMA_IRQ SGINT_LOCAL0 + 4 /* MC DMA done */
-#define SGI_PARPORT_IRQ SGINT_LOCAL0 + 5 /* Parallel port */
-#define SGI_GIO_1_IRQ SGINT_LOCAL0 + 6 /* GE / GIO-1 / 2nd-HPC */
-#define SGI_MAP_0_IRQ SGINT_LOCAL0 + 7 /* Mappable interrupt 0 */
-
-#define SGI_GPL0_IRQ SGINT_LOCAL1 + 0 /* General Purpose LOCAL1_N<0> */
-#define SGI_PANEL_IRQ SGINT_LOCAL1 + 1 /* front panel */
-#define SGI_GPL2_IRQ SGINT_LOCAL1 + 2 /* General Purpose LOCAL1_N<2> */
-#define SGI_MAP_1_IRQ SGINT_LOCAL1 + 3 /* Mappable interrupt 1 */
-#define SGI_HPCDMA_IRQ SGINT_LOCAL1 + 4 /* HPC DMA done */
-#define SGI_ACFAIL_IRQ SGINT_LOCAL1 + 5 /* AC fail */
-#define SGI_VINO_IRQ SGINT_LOCAL1 + 6 /* Indy VINO */
-#define SGI_GIO_2_IRQ SGINT_LOCAL1 + 7 /* Vert retrace / GIO-2 */
-
-/* Mapped interrupts. These interrupts may be mapped to either 0, or 1 */
-#define SGI_VERT_IRQ SGINT_LOCAL2 + 0 /* INT3: newport vertical status */
-#define SGI_EISA_IRQ SGINT_LOCAL2 + 3 /* EISA interrupts */
-#define SGI_KEYBD_IRQ SGINT_LOCAL2 + 4 /* keyboard */
-#define SGI_SERIAL_IRQ SGINT_LOCAL2 + 5 /* onboard serial */
-
-#define ip22_is_fullhouse() (sgioc->sysid & SGIOC_SYSID_FULLHOUSE)
-
-extern unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg);
-extern unsigned short ip22_nvram_read(int reg);
-
-#endif
diff -Nru a/include/asm-mips64/sgi/mc.h b/include/asm-mips64/sgi/mc.h
--- a/include/asm-mips64/sgi/mc.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,231 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * mc.h: Definitions for SGI Memory Controller
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-
-#ifndef _SGI_MC_H
-#define _SGI_MC_H
-
-struct sgimc_regs {
- u32 _unused0;
- volatile u32 cpuctrl0; /* CPU control register 0, readwrite */
-#define SGIMC_CCTRL0_REFS 0x0000000f /* REFS mask */
-#define SGIMC_CCTRL0_EREFRESH 0x00000010 /* Memory refresh enable */
-#define SGIMC_CCTRL0_EPERRGIO 0x00000020 /* GIO parity error enable */
-#define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */
-#define SGIMC_CCTRL0_EPERRCPU 0x00000080 /* CPU bus parity error enable */
-#define SGIMC_CCTRL0_WDOG 0x00000100 /* Watchdog timer enable */
-#define SGIMC_CCTRL0_SYSINIT 0x00000200 /* System init bit */
-#define SGIMC_CCTRL0_GFXRESET 0x00000400 /* Graphics interface reset */
-#define SGIMC_CCTRL0_EISALOCK 0x00000800 /* Lock CPU from memory for EISA */
-#define SGIMC_CCTRL0_EPERRSCMD 0x00001000 /* SysCMD bus parity error enable */
-#define SGIMC_CCTRL0_IENAB 0x00002000 /* Allow interrupts from MC */
-#define SGIMC_CCTRL0_ESNOOP 0x00004000 /* Snooping I/O enable */
-#define SGIMC_CCTRL0_EPROMWR 0x00008000 /* Prom writes from cpu enable */
-#define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */
-#define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */
-#define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */
-#define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */
-#define SGIMC_CCTRL0_R4KNOCHKPARR 0x04000000 /* Don't chk parity on mem data reads */
-#define SGIMC_CCTRL0_GIOBTOB 0x08000000 /* Allow GIO back to back writes */
- u32 _unused1;
- volatile u32 cpuctrl1; /* CPU control register 1, readwrite */
-#define SGIMC_CCTRL1_EGIOTIMEO 0x00000010 /* GIO bus timeout enable */
-#define SGIMC_CCTRL1_FIXEDEHPC 0x00001000 /* Fixed HPC endianness */
-#define SGIMC_CCTRL1_LITTLEHPC 0x00002000 /* Little endian HPC */
-#define SGIMC_CCTRL1_FIXEDEEXP0 0x00004000 /* Fixed EXP0 endianness */
-#define SGIMC_CCTRL1_LITTLEEXP0 0x00008000 /* Little endian EXP0 */
-#define SGIMC_CCTRL1_FIXEDEEXP1 0x00010000 /* Fixed EXP1 endianness */
-#define SGIMC_CCTRL1_LITTLEEXP1 0x00020000 /* Little endian EXP1 */
-
- u32 _unused2;
- volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */
-
- u32 _unused3;
- volatile u32 systemid; /* MC system ID register, readonly */
-#define SGIMC_SYSID_MASKREV 0x0000000f /* Revision of MC controller */
-#define SGIMC_SYSID_EPRESENT 0x00000010 /* Indicates presence of EISA bus */
-
- u32 _unused4[3];
- volatile u32 divider; /* Divider reg for RPSS */
-
- u32 _unused5;
- volatile u32 eeprom; /* EEPROM byte reg for r4k */
-#define SGIMC_EEPROM_PRE 0x00000001 /* eeprom chip PRE pin assertion */
-#define SGIMC_EEPROM_CSEL 0x00000002 /* Active high, eeprom chip select */
-#define SGIMC_EEPROM_SECLOCK 0x00000004 /* EEPROM serial clock */
-#define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */
-#define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */
-
- u32 _unused6[3];
- volatile u32 rcntpre; /* Preload refresh counter */
-
- u32 _unused7;
- volatile u32 rcounter; /* Readonly refresh counter */
-
- u32 _unused8[13];
- volatile u32 giopar; /* Parameter word for GIO64 */
-#define SGIMC_GIOPAR_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */
-#define SGIMC_GIOPAR_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */
-#define SGIMC_GIOPAR_EXP064 0x00000004 /* EXP(slot0) talks using 64-bits */
-#define SGIMC_GIOPAR_EXP164 0x00000008 /* EXP(slot1) talks using 64-bits */
-#define SGIMC_GIOPAR_EISA64 0x00000010 /* EISA bus talks 64-bits to GIO */
-#define SGIMC_GIOPAR_HPC264 0x00000020 /* 2nd HPX talks 64-bits to GIO */
-#define SGIMC_GIOPAR_RTIMEGFX 0x00000040 /* GFX device has realtime attr */
-#define SGIMC_GIOPAR_RTIMEEXP0 0x00000080 /* EXP(slot0) has realtime attr */
-#define SGIMC_GIOPAR_RTIMEEXP1 0x00000100 /* EXP(slot1) has realtime attr */
-#define SGIMC_GIOPAR_MASTEREISA 0x00000200 /* EISA bus can act as bus master */
-#define SGIMC_GIOPAR_ONEBUS 0x00000400 /* Exists one GIO64 pipelined bus */
-#define SGIMC_GIOPAR_MASTERGFX 0x00000800 /* GFX can act as a bus master */
-#define SGIMC_GIOPAR_MASTEREXP0 0x00001000 /* EXP(slot0) can bus master */
-#define SGIMC_GIOPAR_MASTEREXP1 0x00002000 /* EXP(slot1) can bus master */
-#define SGIMC_GIOPAR_PLINEEXP0 0x00004000 /* EXP(slot0) has pipeline attr */
-#define SGIMC_GIOPAR_PLINEEXP1 0x00008000 /* EXP(slot1) has pipeline attr */
-
- u32 _unused9;
- volatile u32 cputp; /* CPU bus arb time period */
-
- u32 _unused10[3];
- volatile u32 lbursttp; /* Time period for long bursts */
-
- /* MC chip can drive up to 4 bank 4 SIMMs each. All SIMMs in bank must
- * be the same size. The size encoding for supported SIMMs is bellow */
- u32 _unused11[9];
- volatile u32 mconfig0; /* Memory config register zero */
- u32 _unused12;
- volatile u32 mconfig1; /* Memory config register one */
-#define SGIMC_MCONFIG_BASEADDR 0x000000ff /* Base address of bank*/
-#define SGIMC_MCONFIG_RMASK 0x00001f00 /* Ram config bitmask */
-#define SGIMC_MCONFIG_BVALID 0x00002000 /* Bank is valid */
-#define SGIMC_MCONFIG_SBANKS 0x00004000 /* Number of subbanks */
-
- u32 _unused13;
- volatile u32 cmacc; /* Mem access config for CPU */
- u32 _unused14;
- volatile u32 gmacc; /* Mem access config for GIO */
-
- /* This define applies to both cmacc and gmacc registers above. */
-#define SGIMC_MACC_ALIASBIG 0x20000000 /* 512MB home for alias */
-
- /* Error address/status regs from GIO and CPU perspectives. */
- u32 _unused15;
- volatile u32 cerr; /* Error address reg for CPU */
- u32 _unused16;
- volatile u32 cstat; /* Status reg for CPU */
-#define SGIMC_CSTAT_RD 0x00000100 /* read parity error */
-#define SGIMC_CSTAT_PAR 0x00000200 /* CPU parity error */
-#define SGIMC_CSTAT_ADDR 0x00000400 /* memory bus error bad addr */
-#define SGIMC_CSTAT_SYSAD_PAR 0x00000800 /* sysad parity error */
-#define SGIMC_CSTAT_SYSCMD_PAR 0x00001000 /* syscmd parity error */
-#define SGIMC_CSTAT_BAD_DATA 0x00002000 /* bad data identifier */
-#define SGIMC_CSTAT_PAR_MASK 0x00001f00 /* parity error mask */
-#define SGIMC_CSTAT_RD_PAR (SGIMC_CSTAT_RD | SGIMC_CSTAT_PAR)
-
- u32 _unused17;
- volatile u32 gerr; /* Error address reg for GIO */
- u32 _unused18;
- volatile u32 gstat; /* Status reg for GIO */
-#define SGIMC_GSTAT_RD 0x00000100 /* read parity error */
-#define SGIMC_GSTAT_WR 0x00000200 /* write parity error */
-#define SGIMC_GSTAT_TIME 0x00000400 /* GIO bus timed out */
-#define SGIMC_GSTAT_PROM 0x00000800 /* write to PROM when PROM_EN not set */
-#define SGIMC_GSTAT_ADDR 0x00001000 /* parity error on addr cycle */
-#define SGIMC_GSTAT_BC 0x00002000 /* parity error on byte count cycle */
-#define SGIMC_GSTAT_PIO_RD 0x00004000 /* read data parity on pio */
-#define SGIMC_GSTAT_PIO_WR 0x00008000 /* write data parity on pio */
-
- /* Special hard bus locking registers. */
- u32 _unused19;
- volatile u32 syssembit; /* Uni-bit system semaphore */
- u32 _unused20;
- volatile u32 mlock; /* Global GIO memory access lock */
- u32 _unused21;
- volatile u32 elock; /* Locks EISA from GIO accesses */
-
- /* GIO dma control registers. */
- u32 _unused22[15];
- volatile u32 gio_dma_trans; /* DMA mask to translation GIO addrs */
- u32 _unused23;
- volatile u32 gio_dma_sbits; /* DMA GIO addr substitution bits */
- u32 _unused24;
- volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */
- u32 _unused25;
- volatile u32 dma_ctrl; /* Main DMA control reg */
-
- /* DMA TLB entry 0 */
- u32 _unused26[5];
- volatile u32 dtlb_hi0;
- u32 _unused27;
- volatile u32 dtlb_lo0;
-
- /* DMA TLB entry 1 */
- u32 _unused28;
- volatile u32 dtlb_hi1;
- u32 _unused29;
- volatile u32 dtlb_lo1;
-
- /* DMA TLB entry 2 */
- u32 _unused30;
- volatile u32 dtlb_hi2;
- u32 _unused31;
- volatile u32 dtlb_lo2;
-
- /* DMA TLB entry 3 */
- u32 _unused32;
- volatile u32 dtlb_hi3;
- u32 _unused33;
- volatile u32 dtlb_lo3;
-
- u32 _unused34[0x0392];
-
- u32 _unused35;
- volatile u32 rpsscounter; /* Chirps at 100ns */
-
- u32 _unused36[0x1000/4-2*4];
-
- u32 _unused37;
- volatile u32 maddronly; /* Address DMA goes at */
- u32 _unused38;
- volatile u32 maddrpdeflts; /* Same as above, plus set defaults */
- u32 _unused39;
- volatile u32 dmasz; /* DMA count */
- u32 _unused40;
- volatile u32 ssize; /* DMA stride size */
- u32 _unused41;
- volatile u32 gmaddronly; /* Set GIO DMA but don't start trans */
- u32 _unused42;
- volatile u32 dmaddnpgo; /* Set GIO DMA addr + start transfer */
- u32 _unused43;
- volatile u32 dmamode; /* DMA mode config bit settings */
- u32 _unused44;
- volatile u32 dmaccount; /* Zoom and byte count for DMA */
- u32 _unused45;
- volatile u32 dmastart; /* Pedal to the metal. */
- u32 _unused46;
- volatile u32 dmarunning; /* DMA op is in progress */
- u32 _unused47;
- volatile u32 maddrdefstart; /* Set dma addr, defaults, and kick it */
-};
-
-extern struct sgimc_regs *sgimc;
-#define SGIMC_BASE 0x1fa00000 /* physical */
-
-/* Base location of the two ram banks found in IP2[0268] machines. */
-#define SGIMC_SEG0_BADDR 0x08000000
-#define SGIMC_SEG1_BADDR 0x20000000
-
-/* Maximum size of the above banks are per machine. */
-#define SGIMC_SEG0_SIZE_ALL 0x10000000 /* 256MB */
-#define SGIMC_SEG1_SIZE_IP20_IP22 0x08000000 /* 128MB */
-#define SGIMC_SEG1_SIZE_IP26_IP28 0x20000000 /* 512MB */
-
-extern void sgimc_init(void);
-
-#endif /* _SGI_MC_H */
diff -Nru a/include/asm-mips64/sgi/sgi.h b/include/asm-mips64/sgi/sgi.h
--- a/include/asm-mips64/sgi/sgi.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * sgi.h: Definitions specific to SGI machines.
- *
- * Copyright (C) 1996 David S. Miller (dm@sgi.com)
- */
-#ifndef _ASM_SGI_SGI_H
-#define _ASM_SGI_SGI_H
-
-/* UP=UniProcessor MP=MultiProcessor(capable) */
-enum sgi_mach {
- ip4, /* R2k UP */
- ip5, /* R2k MP */
- ip6, /* R3k UP */
- ip7, /* R3k MP */
- ip9, /* R3k UP */
- ip12, /* R3kA UP, Indigo */
- ip15, /* R3kA MP */
- ip17, /* R4K UP */
- ip19, /* R4K MP */
- ip20, /* R4K UP, Indigo */
- ip21, /* TFP MP */
- ip22, /* R4x00 UP, Indigo2 */
- ip25, /* R10k MP */
- ip26, /* TFP UP, Indigo2 */
- ip27, /* R10k MP, R12k MP, Origin */
- ip28, /* R10k UP, Indigo2 */
- ip30,
- ip32,
-};
-
-extern enum sgi_mach sgimach;
-extern void sgi_sysinit(void);
-
-/* Many I/O space registers are byte sized and are contained within
- * one byte per word, specifically the MSB, this macro helps out.
- */
-#ifdef __MIPSEL__
-#define SGI_MSB(regaddr) (regaddr)
-#else
-#define SGI_MSB(regaddr) ((regaddr) | 0x3)
-#endif
-
-#endif /* _ASM_SGI_SGI_H */
diff -Nru a/include/asm-mips64/sgialib.h b/include/asm-mips64/sgialib.h
--- a/include/asm-mips64/sgialib.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,127 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI ARCS firmware interface library for the Linux kernel.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 2001, 2002 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_SGIALIB_H
-#define _ASM_SGIALIB_H
-
-#include <asm/sgiarcs.h>
-
-extern struct linux_romvec *romvec;
-extern int prom_argc;
-
-extern LONG *_prom_argv, *_prom_envp;
-
-/* A 32-bit ARC PROM pass arguments and environment as 32-bit pointer.
- These macros take care of sign extension. */
-#define prom_argv(index) ((char *) (long) _prom_argv[(index)])
-#define prom_argc(index) ((char *) (long) _prom_argc[(index)])
-
-extern int prom_flags;
-#define PROM_FLAG_ARCS 1
-#define PROM_FLAG_USE_AS_CONSOLE 2
-
-/* Init the PROM library and it's internal data structures. */
-extern void prom_init(int argc, char **argv, char **envp, int *prom_vec);
-
-/* Simple char-by-char console I/O. */
-extern void prom_putchar(char c);
-extern char prom_getchar(void);
-
-/* Generic printf() using ARCS console I/O. */
-extern void prom_printf(char *fmt, ...);
-
-/* Memory descriptor management. */
-#define PROM_MAX_PMEMBLOCKS 32
-struct prom_pmemblock {
- LONG base; /* Within KSEG0 or XKPHYS. */
- ULONG size; /* In bytes. */
- ULONG type; /* free or prom memory */
-};
-
-/* Get next memory descriptor after CURR, returns first descriptor
- * in chain is CURR is NULL.
- */
-extern struct linux_mdesc *prom_getmdesc(struct linux_mdesc *curr);
-#define PROM_NULL_MDESC ((struct linux_mdesc *) 0)
-
-/* Called by prom_init to setup the physical memory pmemblock
- * array.
- */
-extern void prom_meminit(void);
-extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
-
-/* PROM device tree library routines. */
-#define PROM_NULL_COMPONENT ((pcomponent *) 0)
-
-/* Get sibling component of THIS. */
-extern pcomponent *ArcGetPeer(pcomponent *this);
-
-/* Get child component of THIS. */
-extern pcomponent *ArcGetChild(pcomponent *this);
-
-/* Get parent component of CHILD. */
-extern pcomponent *prom_getparent(pcomponent *child);
-
-/* Copy component opaque data of component THIS into BUFFER
- * if component THIS has opaque data. Returns success or
- * failure status.
- */
-extern long prom_getcdata(void *buffer, pcomponent *this);
-
-/* Other misc. component routines. */
-extern pcomponent *prom_childadd(pcomponent *this, pcomponent *tmp, void *data);
-extern long prom_delcomponent(pcomponent *this);
-extern pcomponent *prom_componentbypath(char *path);
-
-/* This is called at prom_init time to identify the
- * ARC architecture we are running on
- */
-extern void prom_identify_arch(void);
-
-/* Environment variable routines. */
-extern PCHAR ArcGetEnvironmentVariable(PCHAR name);
-extern LONG ArcSetEnvironmentVariable(PCHAR name, PCHAR value);
-
-/* ARCS command line acquisition and parsing. */
-extern char *prom_getcmdline(void);
-extern void prom_init_cmdline(void);
-
-/* Acquiring info about the current time, etc. */
-extern struct linux_tinfo *prom_gettinfo(void);
-extern unsigned long prom_getrtime(void);
-
-/* File operations. */
-extern long prom_getvdirent(unsigned long fd, struct linux_vdirent *ent, unsigned long num, unsigned long *cnt);
-extern long prom_open(char *name, enum linux_omode md, unsigned long *fd);
-extern long prom_close(unsigned long fd);
-extern LONG ArcRead(ULONG fd, PVOID buf, ULONG num, PULONG cnt);
-extern long prom_getrstatus(unsigned long fd);
-extern LONG ArcWrite(ULONG fd, PVOID buf, ULONG num, PULONG cnt);
-extern long prom_seek(unsigned long fd, struct linux_bigint *off, enum linux_seekmode sm);
-extern long prom_mount(char *name, enum linux_mountops op);
-extern long prom_getfinfo(unsigned long fd, struct linux_finfo *buf);
-extern long prom_setfinfo(unsigned long fd, unsigned long flags, unsigned long msk);
-
-/* Running stand-along programs. */
-extern long prom_load(char *name, unsigned long end, unsigned long *pc, unsigned long *eaddr);
-extern long prom_invoke(unsigned long pc, unsigned long sp, long argc, char **argv, char **envp);
-extern long prom_exec(char *name, long argc, char **argv, char **envp);
-
-/* Misc. routines. */
-extern VOID prom_halt(VOID) __attribute__((noreturn));
-extern VOID prom_powerdown(VOID) __attribute__((noreturn));
-extern VOID prom_restart(VOID) __attribute__((noreturn));
-extern VOID ArcReboot(VOID) __attribute__((noreturn));
-extern VOID ArcEnterInteractiveMode(VOID) __attribute__((noreturn));
-extern long prom_cfgsave(VOID);
-extern struct linux_sysid *prom_getsysid(VOID);
-extern VOID ArcFlushAllCaches(VOID);
-
-#endif /* _ASM_SGIALIB_H */
diff -Nru a/include/asm-mips64/sgiarcs.h b/include/asm-mips64/sgiarcs.h
--- a/include/asm-mips64/sgiarcs.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,547 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * ARC firmware interface defines.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1999, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SGIARCS_H
-#define _ASM_SGIARCS_H
-
-#include <linux/config.h>
-#include <asm/types.h>
-#include <asm/arc/types.h>
-
-/* Various ARCS error codes. */
-#define PROM_ESUCCESS 0x00
-#define PROM_E2BIG 0x01
-#define PROM_EACCESS 0x02
-#define PROM_EAGAIN 0x03
-#define PROM_EBADF 0x04
-#define PROM_EBUSY 0x05
-#define PROM_EFAULT 0x06
-#define PROM_EINVAL 0x07
-#define PROM_EIO 0x08
-#define PROM_EISDIR 0x09
-#define PROM_EMFILE 0x0a
-#define PROM_EMLINK 0x0b
-#define PROM_ENAMETOOLONG 0x0c
-#define PROM_ENODEV 0x0d
-#define PROM_ENOENT 0x0e
-#define PROM_ENOEXEC 0x0f
-#define PROM_ENOMEM 0x10
-#define PROM_ENOSPC 0x11
-#define PROM_ENOTDIR 0x12
-#define PROM_ENOTTY 0x13
-#define PROM_ENXIO 0x14
-#define PROM_EROFS 0x15
-/* SGI ARCS specific errno's. */
-#define PROM_EADDRNOTAVAIL 0x1f
-#define PROM_ETIMEDOUT 0x20
-#define PROM_ECONNABORTED 0x21
-#define PROM_ENOCONNECT 0x22
-
-/* Device classes, types, and identifiers for prom
- * device inventory queries.
- */
-enum linux_devclass {
- system, processor, cache, adapter, controller, peripheral, memory
-};
-
-enum linux_devtypes {
- /* Generic stuff. */
- Arc, Cpu, Fpu,
-
- /* Primary insn and data caches. */
- picache, pdcache,
-
- /* Secondary insn, data, and combined caches. */
- sicache, sdcache, sccache,
-
- memdev, eisa_adapter, tc_adapter, scsi_adapter, dti_adapter,
- multifunc_adapter, dsk_controller, tp_controller, cdrom_controller,
- worm_controller, serial_controller, net_controller, disp_controller,
- parallel_controller, ptr_controller, kbd_controller, audio_controller,
- misc_controller, disk_peripheral, flpy_peripheral, tp_peripheral,
- modem_peripheral, monitor_peripheral, printer_peripheral,
- ptr_peripheral, kbd_peripheral, term_peripheral, line_peripheral,
- net_peripheral, misc_peripheral, anon
-};
-
-enum linux_identifier {
- bogus, ronly, removable, consin, consout, input, output
-};
-
-/* A prom device tree component. */
-struct linux_component {
- enum linux_devclass class; /* node class */
- enum linux_devtypes type; /* node type */
- enum linux_identifier iflags; /* node flags */
- USHORT vers; /* node version */
- USHORT rev; /* node revision */
- ULONG key; /* completely magic */
- ULONG amask; /* XXX affinity mask??? */
- ULONG cdsize; /* size of configuration data */
- ULONG ilen; /* length of string identifier */
- _PULONG iname; /* string identifier */
-};
-typedef struct linux_component pcomponent;
-
-struct linux_sysid {
- char vend[8], prod[8];
-};
-
-/* ARCS prom memory descriptors. */
-enum arcs_memtypes {
- arcs_eblock, /* exception block */
- arcs_rvpage, /* ARCS romvec page */
- arcs_fcontig, /* Contiguous and free */
- arcs_free, /* Generic free memory */
- arcs_bmem, /* Borken memory, don't use */
- arcs_prog, /* A loaded program resides here */
- arcs_atmp, /* ARCS temporary storage area, wish Sparc OpenBoot told this */
- arcs_aperm, /* ARCS permanent storage... */
-};
-
-/* ARC has slightly different types than ARCS */
-enum arc_memtypes {
- arc_eblock, /* exception block */
- arc_rvpage, /* romvec page */
- arc_free, /* Generic free memory */
- arc_bmem, /* Borken memory, don't use */
- arc_prog, /* A loaded program resides here */
- arc_atmp, /* temporary storage area */
- arc_aperm, /* permanent storage */
- arc_fcontig, /* Contiguous and free */
-};
-
-union linux_memtypes {
- enum arcs_memtypes arcs;
- enum arc_memtypes arc;
-};
-
-struct linux_mdesc {
- union linux_memtypes type;
- ULONG base;
- ULONG pages;
-};
-
-/* Time of day descriptor. */
-struct linux_tinfo {
- unsigned short yr;
- unsigned short mnth;
- unsigned short day;
- unsigned short hr;
- unsigned short min;
- unsigned short sec;
- unsigned short msec;
-};
-
-/* ARCS virtual dirents. */
-struct linux_vdirent {
- ULONG namelen;
- unsigned char attr;
- char fname[32]; /* XXX imperical, should be a define */
-};
-
-/* Other stuff for files. */
-enum linux_omode {
- rdonly, wronly, rdwr, wronly_creat, rdwr_creat,
- wronly_ssede, rdwr_ssede, dirent, dirent_creat
-};
-
-enum linux_seekmode {
- absolute, relative
-};
-
-enum linux_mountops {
- media_load, media_unload
-};
-
-/* This prom has a bolixed design. */
-struct linux_bigint {
-#ifdef __MIPSEL__
- u32 lo;
- s32 hi;
-#else /* !(__MIPSEL__) */
- s32 hi;
- u32 lo;
-#endif
-};
-
-struct linux_finfo {
- struct linux_bigint begin;
- struct linux_bigint end;
- struct linux_bigint cur;
- enum linux_devtypes dtype;
- unsigned long namelen;
- unsigned char attr;
- char name[32]; /* XXX imperical, should be define */
-};
-
-/* This describes the vector containing function pointers to the ARC
- firmware functions. */
-struct linux_romvec {
- LONG load; /* Load an executable image. */
- LONG invoke; /* Invoke a standalong image. */
- LONG exec; /* Load and begin execution of a
- standalone image. */
- LONG halt; /* Halt the machine. */
- LONG pdown; /* Power down the machine. */
- LONG restart; /* XXX soft reset??? */
- LONG reboot; /* Reboot the machine. */
- LONG imode; /* Enter PROM interactive mode. */
- LONG _unused1; /* Was ReturnFromMain(). */
-
- /* PROM device tree interface. */
- LONG next_component;
- LONG child_component;
- LONG parent_component;
- LONG component_data;
- LONG child_add;
- LONG comp_del;
- LONG component_by_path;
-
- /* Misc. stuff. */
- LONG cfg_save;
- LONG get_sysid;
-
- /* Probing for memory. */
- LONG get_mdesc;
- LONG _unused2; /* was Signal() */
-
- LONG get_tinfo;
- LONG get_rtime;
-
- /* File type operations. */
- LONG get_vdirent;
- LONG open;
- LONG close;
- LONG read;
- LONG get_rstatus;
- LONG write;
- LONG seek;
- LONG mount;
-
- /* Dealing with firmware environment variables. */
- LONG get_evar;
- LONG set_evar;
-
- LONG get_finfo;
- LONG set_finfo;
-
- /* Miscellaneous. */
- LONG cache_flush;
-};
-
-/* The SGI ARCS parameter block is in a fixed location for standalone
- * programs to access PROM facilities easily.
- */
-typedef struct _SYSTEM_PARAMETER_BLOCK {
- ULONG magic; /* magic cookie */
-#define PROMBLOCK_MAGIC 0x53435241
-
- ULONG len; /* length of parm block */
- USHORT ver; /* ARCS firmware version */
- USHORT rev; /* ARCS firmware revision */
- _PLONG rs_block; /* Restart block. */
- _PLONG dbg_block; /* Debug block. */
- _PLONG gevect; /* XXX General vector??? */
- _PLONG utlbvect; /* XXX UTLB vector??? */
- ULONG rveclen; /* Size of romvec struct. */
- _PVOID romvec; /* Function interface. */
- ULONG pveclen; /* Length of private vector. */
- _PVOID pvector; /* Private vector. */
- ULONG adap_cnt; /* Adapter count. */
- ULONG adap_typ0; /* First adapter type. */
- ULONG adap_vcnt0; /* Adapter 0 vector count. */
- _PVOID adap_vector; /* Adapter 0 vector ptr. */
- ULONG adap_typ1; /* Second adapter type. */
- ULONG adap_vcnt1; /* Adapter 1 vector count. */
- _PVOID adap_vector1; /* Adapter 1 vector ptr. */
- /* More adapter vectors go here... */
-} SYSTEM_PARAMETER_BLOCK, *PSYSTEM_PARAMETER_BLOCK;
-
-#define PROMBLOCK ((PSYSTEM_PARAMETER_BLOCK) (int)0xA0001000)
-#define ROMVECTOR ((struct linux_romvec *) (long)(PROMBLOCK)->romvec)
-
-/* Cache layout parameter block. */
-union linux_cache_key {
- struct param {
-#ifdef __MIPSEL__
- unsigned short size;
- unsigned char lsize;
- unsigned char bsize;
-#else /* !(__MIPSEL__) */
- unsigned char bsize;
- unsigned char lsize;
- unsigned short size;
-#endif
- } info;
- unsigned long allinfo;
-};
-
-/* Configuration data. */
-struct linux_cdata {
- char *name;
- int mlen;
- enum linux_devtypes type;
-};
-
-/* Common SGI ARCS firmware file descriptors. */
-#define SGIPROM_STDIN 0
-#define SGIPROM_STDOUT 1
-
-/* Common SGI ARCS firmware file types. */
-#define SGIPROM_ROFILE 0x01 /* read-only file */
-#define SGIPROM_HFILE 0x02 /* hidden file */
-#define SGIPROM_SFILE 0x04 /* System file */
-#define SGIPROM_AFILE 0x08 /* Archive file */
-#define SGIPROM_DFILE 0x10 /* Directory file */
-#define SGIPROM_DELFILE 0x20 /* Deleted file */
-
-/* SGI ARCS boot record information. */
-struct sgi_partition {
- unsigned char flag;
-#define SGIPART_UNUSED 0x00
-#define SGIPART_ACTIVE 0x80
-
- unsigned char shead, ssect, scyl; /* unused */
- unsigned char systype; /* OS type, Irix or NT */
- unsigned char ehead, esect, ecyl; /* unused */
- unsigned char rsect0, rsect1, rsect2, rsect3;
- unsigned char tsect0, tsect1, tsect2, tsect3;
-};
-
-#define SGIBBLOCK_MAGIC 0xaa55
-#define SGIBBLOCK_MAXPART 0x0004
-
-struct sgi_bootblock {
- unsigned char _unused[446];
- struct sgi_partition partitions[SGIBBLOCK_MAXPART];
- unsigned short magic;
-};
-
-/* BIOS parameter block. */
-struct sgi_bparm_block {
- unsigned short bytes_sect; /* bytes per sector */
- unsigned char sect_clust; /* sectors per cluster */
- unsigned short sect_resv; /* reserved sectors */
- unsigned char nfats; /* # of allocation tables */
- unsigned short nroot_dirents; /* # of root directory entries */
- unsigned short sect_volume; /* sectors in volume */
- unsigned char media_type; /* media descriptor */
- unsigned short sect_fat; /* sectors per allocation table */
- unsigned short sect_track; /* sectors per track */
- unsigned short nheads; /* # of heads */
- unsigned short nhsects; /* # of hidden sectors */
-};
-
-struct sgi_bsector {
- unsigned char jmpinfo[3];
- unsigned char manuf_name[8];
- struct sgi_bparm_block info;
-};
-
-/* Debugging block used with SGI symmon symbolic debugger. */
-#define SMB_DEBUG_MAGIC 0xfeeddead
-struct linux_smonblock {
- unsigned long magic;
- void (*handler)(void); /* Breakpoint routine. */
- unsigned long dtable_base; /* Base addr of dbg table. */
- int (*printf)(const char *fmt, ...);
- unsigned long btable_base; /* Breakpoint table. */
- unsigned long mpflushreqs; /* SMP cache flush request list. */
- unsigned long ntab; /* Name table. */
- unsigned long stab; /* Symbol table. */
- int smax; /* Max # of symbols. */
-};
-
-/*
- * Macros for calling a 32-bit ARC implementation from 64-bit code
- */
-
-#if defined(CONFIG_MIPS64) && defined(CONFIG_ARC32)
-
-#define __arc_clobbers \
- "$2","$3" /* ... */, "$8","$9","$10","$11", \
- "$12","$13","$14","$15","$16","$24","25","$31"
-
-#define ARC_CALL0(dest) \
-({ long __res; \
- long __vec = (long) romvec->dest; \
- __asm__ __volatile__( \
- "dsubu\t$29, 32\n\t" \
- "jalr\t%1\n\t" \
- "daddu\t$29, 32\n\t" \
- "move\t%0, $2" \
- : "=r" (__res), "=r" (__vec) \
- : "1" (__vec) \
- : __arc_clobbers, "$4","$5","$6","$7"); \
- (unsigned long) __res; \
-})
-
-#define ARC_CALL1(dest,a1) \
-({ long __res; \
- register signed int __a1 __asm__("$4") = (int) (long) (a1); \
- long __vec = (long) romvec->dest; \
- __asm__ __volatile__( \
- "dsubu\t$29, 32\n\t" \
- "jalr\t%1\n\t" \
- "daddu\t$29, 32\n\t" \
- "move\t%0, $2" \
- : "=r" (__res), "=r" (__vec) \
- : "1" (__vec), "r" (__a1) \
- : __arc_clobbers, "$5","$6","$7"); \
- (unsigned long) __res; \
-})
-
-#define ARC_CALL2(dest,a1,a2) \
-({ long __res; \
- register signed int __a1 __asm__("$4") = (int) (long) (a1); \
- register signed int __a2 __asm__("$5") = (int) (long) (a2); \
- long __vec = (long) romvec->dest; \
- __asm__ __volatile__( \
- "dsubu\t$29, 32\n\t" \
- "jalr\t%1\n\t" \
- "daddu\t$29, 32\n\t" \
- "move\t%0, $2" \
- : "=r" (__res), "=r" (__vec) \
- : "1" (__vec), "r" (__a1), "r" (__a2) \
- : __arc_clobbers, "$6","$7"); \
- __res; \
-})
-
-#define ARC_CALL3(dest,a1,a2,a3) \
-({ long __res; \
- register signed int __a1 __asm__("$4") = (int) (long) (a1); \
- register signed int __a2 __asm__("$5") = (int) (long) (a2); \
- register signed int __a3 __asm__("$6") = (int) (long) (a3); \
- long __vec = (long) romvec->dest; \
- __asm__ __volatile__( \
- "dsubu\t$29, 32\n\t" \
- "jalr\t%1\n\t" \
- "daddu\t$29, 32\n\t" \
- "move\t%0, $2" \
- : "=r" (__res), "=r" (__vec) \
- : "1" (__vec), "r" (__a1), "r" (__a2), "r" (__a3) \
- : __arc_clobbers, "$7"); \
- __res; \
-})
-
-#define ARC_CALL4(dest,a1,a2,a3,a4) \
-({ long __res; \
- register signed int __a1 __asm__("$4") = (int) (long) (a1); \
- register signed int __a2 __asm__("$5") = (int) (long) (a2); \
- register signed int __a3 __asm__("$6") = (int) (long) (a3); \
- register signed int __a4 __asm__("$7") = (int) (long) (a4); \
- long __vec = (long) romvec->dest; \
- __asm__ __volatile__( \
- "dsubu\t$29, 32\n\t" \
- "jalr\t%1\n\t" \
- "daddu\t$29, 32\n\t" \
- "move\t%0, $2" \
- : "=r" (__res), "=r" (__vec) \
- : "1" (__vec), "r" (__a1), "r" (__a2), "r" (__a3), \
- "r" (__a4) \
- : __arc_clobbers); \
- __res; \
-})
-
-#define ARC_CALL5(dest,a1,a2,a3,a4,a5) \
-({ long __res; \
- register signed int __a1 __asm__("$4") = (int) (long) (a1); \
- register signed int __a2 __asm__("$5") = (int) (long) (a2); \
- register signed int __a3 __asm__("$6") = (int) (long) (a3); \
- register signed int __a4 __asm__("$7") = (int) (long) (a4); \
- register signed int __a5 = (a5); \
- long __vec = (long) romvec->dest; \
- __asm__ __volatile__( \
- "dsubu\t$29, 32\n\t" \
- "sw\t%6, 16($29)\n\t" \
- "jalr\t%1\n\t" \
- "daddu\t$29, 32\n\t" \
- "move\t%0, $2" \
- : "=r" (__res), "=r" (__vec) \
- : "1" (__vec), \
- "r" (__a1), "r" (__a2), "r" (__a3), "r" (__a4), \
- "r" (__a5) \
- : __arc_clobbers); \
- __res; \
-})
-
-#endif /* defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) */
-
-#if (defined(CONFIG_MIPS32) && defined(CONFIG_ARC32)) || \
- (defined(CONFIG_MIPS64) && defined(CONFIG_ARC64))
-
-#define ARC_CALL0(dest) \
-({ long __res; \
- long (*__vec)(void) = (void *) romvec->dest; \
- \
- __res = __vec(); \
- __res; \
-})
-
-#define ARC_CALL1(dest,a1) \
-({ long __res; \
- long __a1 = (long) (a1); \
- long (*__vec)(long) = (void *) romvec->dest; \
- \
- __res = __vec(__a1); \
- __res; \
-})
-
-#define ARC_CALL2(dest,a1,a2) \
-({ long __res; \
- long __a1 = (long) (a1); \
- long __a2 = (long) (a2); \
- long (*__vec)(long, long) = (void *) romvec->dest; \
- \
- __res = __vec(__a1, __a2); \
- __res; \
-})
-
-#define ARC_CALL3(dest,a1,a2,a3) \
-({ long __res; \
- long __a1 = (long) (a1); \
- long __a2 = (long) (a2); \
- long __a3 = (long) (a3); \
- long (*__vec)(long, long, long) = (void *) romvec->dest; \
- \
- __res = __vec(__a1, __a2, __a3); \
- __res; \
-})
-
-#define ARC_CALL4(dest,a1,a2,a3,a4) \
-({ long __res; \
- long __a1 = (long) (a1); \
- long __a2 = (long) (a2); \
- long __a3 = (long) (a3); \
- long __a4 = (long) (a4); \
- long (*__vec)(long, long, long, long) = (void *) romvec->dest; \
- \
- __res = __vec(__a1, __a2, __a3, __a4); \
- __res; \
-})
-
-#define ARC_CALL5(dest,a1,a2,a3,a4,a5) \
-({ long __res; \
- long __a1 = (long) (a1); \
- long __a2 = (long) (a2); \
- long __a3 = (long) (a3); \
- long __a4 = (long) (a4); \
- long __a5 = (long) (a5); \
- long (*__vec)(long, long, long, long, long); \
- __vec = (void *) romvec->dest; \
- \
- __res = __vec(__a1, __a2, __a3, __a4, __a5); \
- __res; \
-})
-#endif /* both kernel and ARC either 32-bit or 64-bit */
-
-#endif /* _ASM_SGIARCS_H */
diff -Nru a/include/asm-mips64/sgidefs.h b/include/asm-mips64/sgidefs.h
--- a/include/asm-mips64/sgidefs.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,44 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1999, 2001 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#ifndef __ASM_SGIDEFS_H
-#define __ASM_SGIDEFS_H
-
-/*
- * Using a Linux compiler for building Linux seems logic but not to
- * everybody.
- */
-#ifndef __linux__
-#error Use a Linux compiler or give up.
-#endif
-
-/*
- * Definitions for the ISA levels
- *
- * With the introduction of MIPS32 / MIPS64 instruction sets definitions
- * MIPS ISAs are no longer subsets of each other. Therefore comparisons
- * on these symbols except with == may result in unexpected results and
- * are forbidden!
- */
-#define _MIPS_ISA_MIPS1 1
-#define _MIPS_ISA_MIPS2 2
-#define _MIPS_ISA_MIPS3 3
-#define _MIPS_ISA_MIPS4 4
-#define _MIPS_ISA_MIPS5 5
-#define _MIPS_ISA_MIPS32 6
-#define _MIPS_ISA_MIPS64 7
-
-/*
- * Subprogram calling convention
- */
-#define _MIPS_SIM_ABI32 1
-#define _MIPS_SIM_NABI32 2
-#define _MIPS_SIM_ABI64 3
-
-#endif /* __ASM_SGIDEFS_H */
diff -Nru a/include/asm-mips64/shmbuf.h b/include/asm-mips64/shmbuf.h
--- a/include/asm-mips64/shmbuf.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,38 +0,0 @@
-#ifndef _ASM_SHMBUF_H
-#define _ASM_SHMBUF_H
-
-/*
- * The shmid64_ds structure for the MIPS architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 2 miscellaneous 64-bit values
- */
-
-struct shmid64_ds {
- struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
- __kernel_time_t shm_atime; /* last attach time */
- __kernel_time_t shm_dtime; /* last detach time */
- __kernel_time_t shm_ctime; /* last change time */
- __kernel_pid_t shm_cpid; /* pid of creator */
- __kernel_pid_t shm_lpid; /* pid of last operator */
- unsigned long shm_nattch; /* no. of current attaches */
- unsigned long __unused1;
- unsigned long __unused2;
-};
-
-struct shminfo64 {
- unsigned long shmmax;
- unsigned long shmmin;
- unsigned long shmmni;
- unsigned long shmseg;
- unsigned long shmall;
- unsigned long __unused1;
- unsigned long __unused2;
- unsigned long __unused3;
- unsigned long __unused4;
-};
-
-#endif /* _ASM_SHMBUF_H */
diff -Nru a/include/asm-mips64/shmiq.h b/include/asm-mips64/shmiq.h
--- a/include/asm-mips64/shmiq.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,233 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Please note that the comments on this file may be out of date
- * and that they represent what I have figured about the shmiq device
- * so far in IRIX.
- *
- * This also contains some streams and idev bits.
- *
- * They may contain errors, please, refer to the source code of the Linux
- * kernel for a definitive answer on what we have implemented
- *
- * Miguel.
- */
-#ifndef _ASM_SHMIQ_H
-#define _ASM_SHMIQ_H
-
-/* STREAMs ioctls */
-#define STRIOC ('S' << 8)
-#define I_STR (STRIOC | 010)
-#define I_PUSH (STRIOC | 02)
-#define I_LINK (STRIOC | 014)
-#define I_UNLINK (STRIOC | 015)
-
-/* Data structure passed on I_STR ioctls */
-struct strioctl {
- int ic_cmd; /* streams ioctl command */
- int ic_timout; /* timeout */
- int ic_len; /* lenght of data */
- void *ic_dp; /* data */
-};
-
-/*
- * For mapping the shared memory input queue, you have to:
- *
- * 1. Map /dev/zero for the number of bytes you want to use
- * for your shared memory input queue plus the size of the
- * sharedMemoryInputQueue structure + 4 (I still have not figured
- * what this one is for
- *
- * 2. Open /dev/shmiq
- *
- * 3. Open /dev/qcntlN N is [0..Nshmiqs]
- *
- * 4. Fill a shmiqreq structure. user_vaddr should point to the return
- * address from the /dev/zero mmap. Arg is the number of shmqevents
- * that fit into the /dev/zero region (remember that at the beginning there
- * is a sharedMemoryInputQueue header).
- *
- * 5. Issue the ioctl (qcntlfd, QIOCATTACH, &your_shmiqreq);
- */
-
-struct shmiqreq {
- char *user_vaddr;
- int arg;
-};
-
-/* map the shmiq into the process address space */
-#define QIOCATTACH _IOW('Q',1,struct shmiqreq)
-
-/* remove mappings */
-#define QIOCDETACH _IO('Q',2)
-
-/*
- * A shared memory input queue event.
- */
-struct shmqdata {
- unsigned char device; /* device major */
- unsigned char which; /* device minor */
- unsigned char type; /* event type */
- unsigned char flags; /* little event data */
- union {
- int pos; /* big event data */
- short ptraxis [2]; /* event data for PTR events */
- } un;
-};
-
-/* indetifies the shmiq and the device */
-struct shmiqlinkid {
- short int devminor;
- short int index;
-};
-
-struct shmqevent {
- union {
- int time;
- struct shmiqlinkid id;
- } un ;
- struct shmqdata data ;
-};
-
-/*
- * sharedMemoryInputQueue: this describes the shared memory input queue.
- *
- * head is the user index into the events, user can modify this one.
- * tail is managed by the kernel.
- * flags is one of SHMIQ_OVERFLOW or SHMIQ_CORRUPTED
- * if OVERFLOW is set it seems ioctl QUIOCSERVICED should be called
- * to notify the kernel.
- * events where the kernel sticks the events.
- */
-struct sharedMemoryInputQueue {
- volatile int head; /* user's index into events */
- volatile int tail; /* kernel's index into events */
- volatile unsigned int flags; /* place for out-of-band data */
-#define SHMIQ_OVERFLOW 1
-#define SHMIQ_CORRUPTED 2
- struct shmqevent events[1]; /* input event buffer */
-};
-
-/* have to figure this one out */
-#define QIOCGETINDX _IOWR('Q', 8, int)
-
-
-/* acknowledge shmiq overflow */
-#define QIOCSERVICED _IO('Q', 3)
-
-/* Double indirect I_STR ioctl, yeah, fun fun fun */
-
-struct muxioctl {
- int index; /* lower stream index */
- int realcmd; /* the actual command for the subdevice */
-};
-/* Double indirect ioctl */
-#define QIOCIISTR _IOW('Q', 7, struct muxioctl)
-
-/* Cursor ioclts: */
-
-/* set cursor tracking mode */
-#define QIOCURSTRK _IOW('Q', 4, int)
-
-/* set cursor filter box */
-#define QIOCURSIGN _IOW('Q', 5, int [4])
-
-/* set cursor axes */
-struct shmiqsetcurs {
- short index;
- short axes;
-};
-
-#define QIOCSETCURS _IOWR('Q', 9, struct shmiqsetcurs)
-
-/* set cursor position */
-struct shmiqsetcpos {
- short x;
- short y;
-};
-#define QIOCSETCPOS _IOWR('Q', 10, struct shmiqsetcpos)
-
-/* get time since last event */
-#define QIOCGETITIME _IOR('Q', 11, time_t)
-
-/* set current screen */
-#define QIOCSETSCRN _IOW('Q',6,int)
-
-
-/* -------------------- iDev stuff -------------------- */
-
-#define IDEV_MAX_NAME_LEN 15
-#define IDEV_MAX_TYPE_LEN 15
-
-typedef struct {
- char devName[IDEV_MAX_NAME_LEN+1];
- char devType[IDEV_MAX_TYPE_LEN+1];
- unsigned short nButtons;
- unsigned short nValuators;
- unsigned short nLEDs;
- unsigned short nStrDpys;
- unsigned short nIntDpys;
- unsigned char nBells;
- unsigned char flags;
-#define IDEV_HAS_KEYMAP 0x01
-#define IDEV_HAS_PROXIMITY 0x02
-#define IDEV_HAS_PCKBD 0x04
-} idevDesc;
-
-typedef struct {
- char *nothing_for_now;
-} idevInfo;
-
-#define IDEV_KEYMAP_NAME_LEN 15
-
-typedef struct {
- char name[IDEV_KEYMAP_NAME_LEN+1];
-} idevKeymapDesc;
-
-/* The valuator definition */
-typedef struct {
- unsigned hwMinRes;
- unsigned hwMaxRes;
- int hwMinVal;
- int hwMaxVal;
-
- unsigned char possibleModes;
-#define IDEV_ABSOLUTE 0x0
-#define IDEV_RELATIVE 0x1
-#define IDEV_EITHER 0x2
-
- unsigned char mode; /* One of: IDEV_ABSOLUTE, IDEV_RELATIVE */
-
- unsigned short resolution;
- int minVal;
- int maxVal;
-} idevValuatorDesc;
-
-/* This is used to query a specific valuator with the IDEVGETVALUATORDESC ioctl */
-typedef struct {
- short valNum;
- unsigned short flags;
- idevValuatorDesc desc;
-} idevGetSetValDesc;
-
-#define IDEVGETDEVICEDESC _IOWR('i', 0, idevDesc)
-#define IDEVGETVALUATORDESC _IOWR('i', 1, idevGetSetValDesc)
-#define IDEVGETKEYMAPDESC _IOWR('i', 2, idevKeymapDesc)
-#define IDEVINITDEVICE _IOW ('i', 51, unsigned int)
-
-
-#ifdef __KERNEL__
-
-/* These are only interpreted by SHMIQ-attacheable devices and are internal
- * to the kernel
- */
-#define SHMIQ_OFF _IO('Q',1)
-#define SHMIQ_ON _IO('Q',2)
-
-void shmiq_push_event (struct shmqevent *e);
-int get_sioc (struct strioctl *sioc, unsigned long arg);
-#endif
-
-#endif /* _ASM_SHMIQ_H */
diff -Nru a/include/asm-mips64/shmparam.h b/include/asm-mips64/shmparam.h
--- a/include/asm-mips64/shmparam.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,11 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_SHMPARAM_H
-#define _ASM_SHMPARAM_H
-
-#define SHMLBA 0x40000 /* attach addr a multiple of this */
-
-#endif /* _ASM_SHMPARAM_H */
diff -Nru a/include/asm-mips64/sibyte/64bit.h b/include/asm-mips64/sibyte/64bit.h
--- a/include/asm-mips64/sibyte/64bit.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,125 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- * Copyright (C) 2002 Ralf Baechle
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef __ASM_SIBYTE_64BIT_H
-#define __ASM_SIBYTE_64BIT_H
-
-#include <linux/config.h>
-#include <linux/types.h>
-
-#ifdef CONFIG_MIPS32
-
-#include <asm/system.h>
-
-/*
- * This is annoying...we can't actually write the 64-bit IO register properly
- * without having access to 64-bit registers... which doesn't work by default
- * in o32 format...grrr...
- */
-static inline void __out64(u64 val, unsigned long addr)
-{
- u64 tmp;
-
- __asm__ __volatile__ (
- " .set mips3 \n"
- " dsll32 %L0, %L0, 0 # __out64 \n"
- " dsrl32 %L0, %L0, 0 \n"
- " dsll32 %M0, %M0, 0 \n"
- " or %L0, %L0, %M0 \n"
- " sd %L0, (%2) \n"
- " .set mips0 \n"
- : "=r" (tmp)
- : "0" (val), "r" (addr));
-}
-
-static inline void out64(u64 val, unsigned long addr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- __out64(val, addr);
- local_irq_restore(flags);
-}
-
-static inline u64 __in64(unsigned long addr)
-{
- u64 res;
-
- __asm__ __volatile__ (
- " .set mips3 # __in64 \n"
- " ld %L0, (%1) \n"
- " dsra32 %M0, %L0, 0 \n"
- " sll %L0, %L0, 0 \n"
- " .set mips0 \n"
- : "=r" (res)
- : "r" (addr));
-
- return res;
-}
-
-static inline u64 in64(unsigned long addr)
-{
- unsigned long flags;
- u64 res;
-
- local_irq_save(flags);
- res = __in64(addr);
- local_irq_restore(flags);
-
- return res;
-}
-
-#endif /* CONFIG_MIPS32 */
-
-#ifdef CONFIG_MIPS64
-
-/*
- * These are provided so as to be able to use common
- * driver code for the 32-bit and 64-bit trees
- */
-extern inline void out64(u64 val, unsigned long addr)
-{
- *(volatile unsigned long *)addr = val;
-}
-
-extern inline u64 in64(unsigned long addr)
-{
- return *(volatile unsigned long *)addr;
-}
-
-#define __in64(a) in64(a)
-#define __out64(v,a) out64(v,a)
-
-#endif /* CONFIG_MIPS64 */
-
-/*
- * Avoid interrupt mucking, just adjust the address for 4-byte access.
- * Assume the addresses are 8-byte aligned.
- */
-
-#ifdef __MIPSEB__
-#define __CSR_32_ADJUST 4
-#else
-#define __CSR_32_ADJUST 0
-#endif
-
-#define csr_out32(v,a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
-#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
-
-#endif /* __ASM_SIBYTE_64BIT_H */
diff -Nru a/include/asm-mips64/sibyte/board.h b/include/asm-mips64/sibyte/board.h
--- a/include/asm-mips64/sibyte/board.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,68 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef _SIBYTE_BOARD_H
-#define _SIBYTE_BOARD_H
-
-#ifdef CONFIG_SIBYTE_BOARD
-
-#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
- defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE)
-#include <asm/sibyte/swarm.h>
-#endif
-
-#if defined(CONFIG_SIBYTE_SENTOSA) || defined(CONFIG_SIBYTE_RHONE)
-#include <asm/sibyte/sentosa.h>
-#endif
-
-#ifdef CONFIG_SIBYTE_CARMEL
-#include <asm/sibyte/carmel.h>
-#endif
-
-#ifdef __ASSEMBLY__
-
-#ifdef LEDS_PHYS
-#define setleds(t0,t1,c0,c1,c2,c3) \
- li t0, (LEDS_PHYS|0xa0000000); \
- li t1, c0; \
- sb t1, 0x18(t0); \
- li t1, c1; \
- sb t1, 0x10(t0); \
- li t1, c2; \
- sb t1, 0x08(t0); \
- li t1, c3; \
- sb t1, 0x00(t0)
-#else
-#define setleds(t0,t1,c0,c1,c2,c3)
-#endif /* LEDS_PHYS */
-
-#else
-
-void swarm_setup(void);
-
-#ifdef LEDS_PHYS
-extern void setleds(char *str);
-#else
-#define setleds(s) do { } while (0)
-#endif /* LEDS_PHYS */
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* CONFIG_SIBYTE_BOARD */
-
-#endif /* _SIBYTE_BOARD_H */
diff -Nru a/include/asm-mips64/sibyte/carmel.h b/include/asm-mips64/sibyte/carmel.h
--- a/include/asm-mips64/sibyte/carmel.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2002 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#ifndef __ASM_SIBYTE_CARMEL_H
-#define __ASM_SIBYTE_CARMEL_H
-
-#include <asm/sibyte/sb1250.h>
-#include <asm/sibyte/sb1250_int.h>
-
-#define SIBYTE_BOARD_NAME "Carmel"
-
-#define GPIO_PHY_INTERRUPT 2
-#define GPIO_NONMASKABLE_INT 3
-#define GPIO_CF_INSERTED 6
-#define GPIO_MONTEREY_RESET 7
-#define GPIO_QUADUART_INT 8
-#define GPIO_CF_INT 9
-#define GPIO_FPGA_CCLK 10
-#define GPIO_FPGA_DOUT 11
-#define GPIO_FPGA_DIN 12
-#define GPIO_FPGA_PGM 13
-#define GPIO_FPGA_DONE 14
-#define GPIO_FPGA_INIT 15
-
-#define LEDS_CS 2
-#define LEDS_PHYS 0x100C0000
-#define MLEDS_CS 3
-#define MLEDS_PHYS 0x100A0000
-#define UART_CS 4
-#define UART_PHYS 0x100D0000
-#define ARAVALI_CS 5
-#define ARAVALI_PHYS 0x11000000
-#define IDE_CS 6
-#define IDE_PHYS 0x100B0000
-#define ARAVALI2_CS 7
-#define ARAVALI2_PHYS 0x100E0000
-
-#if defined(CONFIG_SIBYTE_CARMEL)
-#define K_GPIO_GB_IDE 9
-#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)
-#endif
-
-
-#endif /* __ASM_SIBYTE_CARMEL_H */
diff -Nru a/include/asm-mips64/sibyte/io.h b/include/asm-mips64/sibyte/io.h
--- a/include/asm-mips64/sibyte/io.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,21 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SIBYTE_IO_H
-#define _ASM_SIBYTE_IO_H
-
-#include <asm/addrspace.h>
-
-#define IO_SPACE_BASE K1BASE
-
-/* For Indigo2. */
-#define IO_SPACE_LIMIT 0xffff
-
-/* XXX ISA specific functions go here here. */
-
-#endif /* _ASM_SIBYTE_IO_H */
diff -Nru a/include/asm-mips64/sibyte/sb1250.h b/include/asm-mips64/sibyte/sb1250.h
--- a/include/asm-mips64/sibyte/sb1250.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,52 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef _ASM_SIBYTE_SB1250_H
-#define _ASM_SIBYTE_SB1250_H
-
-#define SB1250_NR_IRQS 64
-
-#ifndef __ASSEMBLY__
-
-#include <asm/addrspace.h>
-
-/* For revision/pass information */
-#include <asm/sibyte/sb1250_scd.h>
-extern unsigned int sb1_pass;
-extern unsigned int soc_pass;
-extern unsigned int soc_type;
-extern unsigned int periph_rev;
-
-extern void sb1250_time_init(void);
-extern unsigned long sb1250_gettimeoffset(void);
-extern void sb1250_mask_irq(int cpu, int irq);
-extern void sb1250_unmask_irq(int cpu, int irq);
-extern void sb1250_smp_finish(void);
-extern void prom_printf(char *fmt, ...);
-
-#define AT_spin \
- __asm__ __volatile__ ( \
- ".set noat\n" \
- "li $at, 0\n" \
- "1: beqz $at, 1b\n" \
- ".set at\n" \
- )
-
-#endif
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_defs.h b/include/asm-mips64/sibyte/sb1250_defs.h
--- a/include/asm-mips64/sibyte/sb1250_defs.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,242 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * Global constants and macros File: sb1250_defs.h
- *
- * This file contains macros and definitions used by the other
- * include files.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-#ifndef _SB1250_DEFS_H
-#define _SB1250_DEFS_H
-
-/*
- * These headers require ANSI C89 string concatenation, and GCC or other
- * 'long long' (64-bit integer) support.
- */
-#if !defined(__STDC__) && !defined(_MSC_VER)
-#error SiByte headers require ANSI C89 support
-#endif
-
-
-/* *********************************************************************
- * Macros for feature tests, used to enable include file features
- * for chip features only present in certain chip revisions.
- *
- * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
- * which is to be exposed by the headers. If undefined, it defaults to
- * "all features."
- *
- * Use like:
- *
- * #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1
- *
- * Generate defines only for that revision of chip.
- *
- * #if SIBYTE_HDR_FEATURE(chip,pass)
- *
- * True if header features for that revision or later of
- * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
- * (Use this to bracket #defines for features present in a given
- * revision and later.)
- *
- * Note that there is no implied ordering between chip types.
- *
- * Note also that 'chip' and 'pass' must textually exactly
- * match the defines below. So, for example,
- * SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
- * SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
- *
- * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
- *
- * Same as SIBYTE_HDR_FEATURE, but true for the named revision
- * and earlier revisions of the named chip type.
- *
- * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
- *
- * Same as SIBYTE_HDR_FEATURE, but only true for the named
- * revision of the named chip type. (Note that this CANNOT
- * be used to verify that you're compiling only for that
- * particular chip/revision. It will be true any time this
- * chip/revision is included in SIBYTE_HDR_FEATURES.)
- *
- * #if SIBYTE_HDR_FEATURE_CHIP(chip)
- *
- * True if header features for (any revision of) that chip type
- * are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket
- * #defines for features specific to a given chip type.)
- *
- * Mask values currently include room for additional revisions of each
- * chip type, but can be renumbered at will. Note that they MUST fit
- * into 31 bits and may not include C type constructs, for safe use in
- * CPP conditionals. Bit positions within chip types DO indicate
- * ordering, so be careful when adding support for new minor revs.
- ********************************************************************* */
-
-#define SIBYTE_HDR_FMASK_1250_ALL 0x00000ff
-#define SIBYTE_HDR_FMASK_1250_PASS1 0x0000001
-#define SIBYTE_HDR_FMASK_1250_PASS2 0x0000002
-
-#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00
-#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100
-#define SIBYTE_HDR_FMASK_112x_PASS3 0x0000200
-
-/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
-#define SIBYTE_HDR_FMASK(chip, pass) \
- (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
-#define SIBYTE_HDR_FMASK_ALLREVS(chip) \
- (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
-
-#define SIBYTE_HDR_FMASK_ALL \
- (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
-
-#ifndef SIBYTE_HDR_FEATURES
-#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL
-#endif
-
-
-/* Bit mask for revisions of chip exclusively before the named revision. */
-#define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \
- ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
-
-/* Bit mask for revisions of chip exclusively after the named revision. */
-#define SIBYTE_HDR_FMASK_AFTER(chip, pass) \
- (~(SIBYTE_HDR_FMASK(chip, pass) \
- | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
-
-
-/* True if header features enabled for (any revision of) that chip type. */
-#define SIBYTE_HDR_FEATURE_CHIP(chip) \
- (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
-
-/* True if header features enabled for that rev or later, inclusive. */
-#define SIBYTE_HDR_FEATURE(chip, pass) \
- (!! ((SIBYTE_HDR_FMASK(chip, pass) \
- | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
-
-/* True if header features enabled for exactly that rev. */
-#define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \
- (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
-
-/* True if header features enabled for that rev or before, inclusive. */
-#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \
- (!! ((SIBYTE_HDR_FMASK(chip, pass) \
- | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
-
-
-/* *********************************************************************
- * Naming schemes for constants in these files:
- *
- * M_xxx MASK constant (identifies bits in a register).
- * For multi-bit fields, all bits in the field will
- * be set.
- *
- * K_xxx "Code" constant (value for data in a multi-bit
- * field). The value is right justified.
- *
- * V_xxx "Value" constant. This is the same as the
- * corresponding "K_xxx" constant, except it is
- * shifted to the correct position in the register.
- *
- * S_xxx SHIFT constant. This is the number of bits that
- * a field value (code) needs to be shifted
- * (towards the left) to put the value in the right
- * position for the register.
- *
- * A_xxx ADDRESS constant. This will be a physical
- * address. Use the PHYS_TO_K1 macro to generate
- * a K1SEG address.
- *
- * R_xxx RELATIVE offset constant. This is an offset from
- * an A_xxx constant (usually the first register in
- * a group).
- *
- * G_xxx(X) GET value. This macro obtains a multi-bit field
- * from a register, masks it, and shifts it to
- * the bottom of the register (retrieving a K_xxx
- * value, for example).
- *
- * V_xxx(X) VALUE. This macro computes the value of a
- * K_xxx constant shifted to the correct position
- * in the register.
- ********************************************************************* */
-
-
-
-
-/*
- * Cast to 64-bit number. Presumably the syntax is different in
- * assembly language.
- *
- * Note: you'll need to define uint32_t and uint64_t in your headers.
- */
-
-#if !defined(__ASSEMBLER__)
-#define _SB_MAKE64(x) ((uint64_t)(x))
-#define _SB_MAKE32(x) ((uint32_t)(x))
-#else
-#define _SB_MAKE64(x) (x)
-#define _SB_MAKE32(x) (x)
-#endif
-
-
-/*
- * Make a mask for 1 bit at position 'n'
- */
-
-#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
-#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
-
-/*
- * Make a mask for 'v' bits at position 'n'
- */
-
-#define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
-#define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
-
-/*
- * Make a value at 'v' at bit position 'n'
- */
-
-#define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n))
-#define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n))
-
-#define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
-#define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
-
-/*
- * Macros to read/write on-chip registers
- * XXX should we do the PHYS_TO_K1 here?
- */
-
-
-#if !defined(__ASSEMBLER__)
-#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
-#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
-#endif /* __ASSEMBLER__ */
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_dma.h b/include/asm-mips64/sibyte/sb1250_dma.h
--- a/include/asm-mips64/sibyte/sb1250_dma.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,594 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * DMA definitions File: sb1250_dma.h
- *
- * This module contains constants and macros useful for
- * programming the SB1250's DMA controllers, both the data mover
- * and the Ethernet DMA.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_DMA_H
-#define _SB1250_DMA_H
-
-
-#include "sb1250_defs.h"
-
-/* *********************************************************************
- * DMA Registers
- ********************************************************************* */
-
-/*
- * Ethernet and Serial DMA Configuration Register 0 (Table 7-4)
- * Registers: DMA_CONFIG0_MAC_x_RX_CH_0
- * Registers: DMA_CONFIG0_MAC_x_TX_CH_0
- * Registers: DMA_CONFIG0_SER_x_RX
- * Registers: DMA_CONFIG0_SER_x_TX
- */
-
-
-#define M_DMA_DROP _SB_MAKEMASK1(0)
-
-#define M_DMA_CHAIN_SEL _SB_MAKEMASK1(1)
-#define M_DMA_RESERVED1 _SB_MAKEMASK1(2)
-
-#define S_DMA_DESC_TYPE _SB_MAKE64(1)
-#define M_DMA_DESC_TYPE _SB_MAKE64(2,S_DMA_DESC_TYPE)
-#define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x,S_DMA_DESC_TYPE)
-#define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x,S_DMA_DESC_TYPE,M_DMA_DESC_TYPE)
-
-#define K_DMA_DESC_TYPE_RING_AL 0
-#define K_DMA_DESC_TYPE_CHAIN_AL 1
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define K_DMA_DESC_TYPE_RING_UAL_WI 2
-#define K_DMA_DESC_TYPE_RING_UAL_RMW 3
-#endif
-
-#define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3)
-#define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4)
-#define M_DMA_LWM_INT_EN _SB_MAKEMASK1(5)
-#define M_DMA_TBX_EN _SB_MAKEMASK1(6)
-#define M_DMA_TDX_EN _SB_MAKEMASK1(7)
-
-#define S_DMA_INT_PKTCNT _SB_MAKE64(8)
-#define M_DMA_INT_PKTCNT _SB_MAKEMASK(8,S_DMA_INT_PKTCNT)
-#define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x,S_DMA_INT_PKTCNT)
-#define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x,S_DMA_INT_PKTCNT,M_DMA_INT_PKTCNT)
-
-#define S_DMA_RINGSZ _SB_MAKE64(16)
-#define M_DMA_RINGSZ _SB_MAKEMASK(16,S_DMA_RINGSZ)
-#define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x,S_DMA_RINGSZ)
-#define G_DMA_RINGSZ(x) _SB_GETVALUE(x,S_DMA_RINGSZ,M_DMA_RINGSZ)
-
-#define S_DMA_HIGH_WATERMARK _SB_MAKE64(32)
-#define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16,S_DMA_HIGH_WATERMARK)
-#define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_HIGH_WATERMARK)
-#define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x,S_DMA_HIGH_WATERMARK,M_DMA_HIGH_WATERMARK)
-
-#define S_DMA_LOW_WATERMARK _SB_MAKE64(48)
-#define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16,S_DMA_LOW_WATERMARK)
-#define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_LOW_WATERMARK)
-#define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x,S_DMA_LOW_WATERMARK,M_DMA_LOW_WATERMARK)
-
-/*
- * Ethernet and Serial DMA Configuration Register 1 (Table 7-5)
- * Registers: DMA_CONFIG1_MAC_x_RX_CH_0
- * Registers: DMA_CONFIG1_DMA_x_TX_CH_0
- * Registers: DMA_CONFIG1_SER_x_RX
- * Registers: DMA_CONFIG1_SER_x_TX
- */
-
-#define M_DMA_HDR_CF_EN _SB_MAKEMASK1(0)
-#define M_DMA_ASIC_XFR_EN _SB_MAKEMASK1(1)
-#define M_DMA_PRE_ADDR_EN _SB_MAKEMASK1(2)
-#define M_DMA_FLOW_CTL_EN _SB_MAKEMASK1(3)
-#define M_DMA_NO_DSCR_UPDT _SB_MAKEMASK1(4)
-#define M_DMA_L2CA _SB_MAKEMASK1(5)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define M_DMA_RX_XTRA_STATUS _SB_MAKEMASK1(6)
-#define M_DMA_TX_CPU_PAUSE _SB_MAKEMASK1(6)
-#define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7)
-#endif
-
-#define M_DMA_MBZ1 _SB_MAKEMASK(6,15)
-
-#define S_DMA_HDR_SIZE _SB_MAKE64(21)
-#define M_DMA_HDR_SIZE _SB_MAKEMASK(9,S_DMA_HDR_SIZE)
-#define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_HDR_SIZE)
-#define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x,S_DMA_HDR_SIZE,M_DMA_HDR_SIZE)
-
-#define M_DMA_MBZ2 _SB_MAKEMASK(5,32)
-
-#define S_DMA_ASICXFR_SIZE _SB_MAKE64(37)
-#define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9,S_DMA_ASICXFR_SIZE)
-#define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_ASICXFR_SIZE)
-#define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x,S_DMA_ASICXFR_SIZE,M_DMA_ASICXFR_SIZE)
-
-#define S_DMA_INT_TIMEOUT _SB_MAKE64(48)
-#define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16,S_DMA_INT_TIMEOUT)
-#define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x,S_DMA_INT_TIMEOUT)
-#define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x,S_DMA_INT_TIMEOUT,M_DMA_INT_TIMEOUT)
-
-/*
- * Ethernet and Serial DMA Descriptor base address (Table 7-6)
- */
-
-#define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK(4,0)
-
-
-/*
- * ASIC Mode Base Address (Table 7-7)
- */
-
-#define M_DMA_ASIC_BASE_MBZ _SB_MAKEMASK(20,0)
-
-/*
- * DMA Descriptor Count Registers (Table 7-8)
- */
-
-/* No bitfields */
-
-
-/*
- * Current Descriptor Address Register (Table 7-11)
- */
-
-#define S_DMA_CURDSCR_ADDR _SB_MAKE64(0)
-#define M_DMA_CURDSCR_ADDR _SB_MAKEMASK(40,S_DMA_CURDSCR_ADDR)
-#define S_DMA_CURDSCR_COUNT _SB_MAKE64(40)
-#define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56)
-#endif
-
-/*
- * Receive Packet Drop Registers
- */
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define S_DMA_OODLOST_RX _SB_MAKE64(0)
-#define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX)
-#define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX)
-
-#define S_DMA_EOP_COUNT_RX _SB_MAKE64(16)
-#define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX)
-#define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX)
-#endif
-
-/* *********************************************************************
- * DMA Descriptors
- ********************************************************************* */
-
-/*
- * Descriptor doubleword "A" (Table 7-12)
- */
-
-#define S_DMA_DSCRA_OFFSET _SB_MAKE64(0)
-#define M_DMA_DSCRA_OFFSET _SB_MAKEMASK(5,S_DMA_DSCRA_OFFSET)
-#define V_DMA_DSCRA_OFFSET(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_OFFSET)
-#define G_DMA_DSCRA_OFFSET(x) _SB_GETVALUE(x,S_DMA_DSCRA_OFFSET,M_DMA_DSCRA_OFFSET)
-
-/* Note: Don't shift the address over, just mask it with the mask below */
-#define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5)
-#define M_DMA_DSCRA_A_ADDR _SB_MAKEMASK(35,S_DMA_DSCRA_A_ADDR)
-
-#define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0)
-#define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA)
-#endif
-
-#define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40)
-#define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE)
-#define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE)
-#define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40)
-#define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT)
-#define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT)
-#endif
-
-#define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49)
-#define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50)
-
-#define S_DMA_DSCRA_STATUS _SB_MAKE64(51)
-#define M_DMA_DSCRA_STATUS _SB_MAKEMASK(13,S_DMA_DSCRA_STATUS)
-#define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_STATUS)
-#define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRA_STATUS,M_DMA_DSCRA_STATUS)
-
-/*
- * Descriptor doubleword "B" (Table 7-13)
- */
-
-
-#define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0)
-#define M_DMA_DSCRB_OPTIONS _SB_MAKEMASK(4,S_DMA_DSCRB_OPTIONS)
-#define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS)
-#define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8)
-#define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE)
-#define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE)
-#define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE)
-#endif
-
-#define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10)
-
-/* Note: Don't shift the address over, just mask it with the mask below */
-#define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5)
-#define M_DMA_DSCRB_B_ADDR _SB_MAKEMASK(35,S_DMA_DSCRB_B_ADDR)
-
-#define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40)
-#define M_DMA_DSCRB_B_SIZE _SB_MAKEMASK(9,S_DMA_DSCRB_B_SIZE)
-#define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_B_SIZE)
-#define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_B_SIZE,M_DMA_DSCRB_B_SIZE)
-
-#define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48)
-#define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB)
-#define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB)
-#define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB)
-#endif
-
-#define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50)
-#define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE)
-#define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE)
-#define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE,M_DMA_DSCRB_PKT_SIZE)
-
-/*
- * from pass2 some bits in dscr_b are also used for rx status
- */
-#define S_DMA_DSCRB_STATUS _SB_MAKE64(0)
-#define M_DMA_DSCRB_STATUS _SB_MAKEMASK(1,S_DMA_DSCRB_STATUS)
-#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS)
-#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS)
-
-/*
- * Ethernet Descriptor Status Bits (Table 7-15)
- */
-
-#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51)
-#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-/* Note: BADTCPCS is actually in DSCR_B options field */
-#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#if SIBYTE_HDR_FEATURE(112x, PASS3)
-#define M_DMA_ETH_VLAN_FLAG _SB_MAKEMASK1(1)
-#define M_DMA_ETH_CRC_FLAG _SB_MAKEMASK1(2)
-#endif
-
-#define S_DMA_ETHRX_RXCH 53
-#define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH)
-#define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_RXCH)
-#define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x,S_DMA_ETHRX_RXCH,M_DMA_ETHRX_RXCH)
-
-#define S_DMA_ETHRX_PKTTYPE 55
-#define M_DMA_ETHRX_PKTTYPE _SB_MAKEMASK(3,S_DMA_ETHRX_PKTTYPE)
-#define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_PKTTYPE)
-#define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x,S_DMA_ETHRX_PKTTYPE,M_DMA_ETHRX_PKTTYPE)
-
-#define K_DMA_ETHRX_PKTTYPE_IPV4 0
-#define K_DMA_ETHRX_PKTTYPE_ARPV4 1
-#define K_DMA_ETHRX_PKTTYPE_802 2
-#define K_DMA_ETHRX_PKTTYPE_OTHER 3
-#define K_DMA_ETHRX_PKTTYPE_USER0 4
-#define K_DMA_ETHRX_PKTTYPE_USER1 5
-#define K_DMA_ETHRX_PKTTYPE_USER2 6
-#define K_DMA_ETHRX_PKTTYPE_USER3 7
-
-#define M_DMA_ETHRX_MATCH_HASH _SB_MAKEMASK1(58)
-#define M_DMA_ETHRX_MATCH_EXACT _SB_MAKEMASK1(59)
-#define M_DMA_ETHRX_BCAST _SB_MAKEMASK1(60)
-#define M_DMA_ETHRX_MCAST _SB_MAKEMASK1(61)
-#define M_DMA_ETHRX_BAD _SB_MAKEMASK1(62)
-#define M_DMA_ETHRX_SOP _SB_MAKEMASK1(63)
-
-/*
- * Ethernet Transmit Status Bits (Table 7-16)
- */
-
-#define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63)
-
-/*
- * Ethernet Transmit Options (Table 7-17)
- */
-
-#define K_DMA_ETHTX_NOTSOP _SB_MAKE64(0x00)
-#define K_DMA_ETHTX_APPENDCRC _SB_MAKE64(0x01)
-#define K_DMA_ETHTX_REPLACECRC _SB_MAKE64(0x02)
-#define K_DMA_ETHTX_APPENDCRC_APPENDPAD _SB_MAKE64(0x03)
-#define K_DMA_ETHTX_APPENDVLAN_REPLACECRC _SB_MAKE64(0x04)
-#define K_DMA_ETHTX_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x05)
-#define K_DMA_ETHTX_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x6)
-#define K_DMA_ETHTX_NOMODS _SB_MAKE64(0x07)
-#define K_DMA_ETHTX_RESERVED1 _SB_MAKE64(0x08)
-#define K_DMA_ETHTX_REPLACESADDR_APPENDCRC _SB_MAKE64(0x09)
-#define K_DMA_ETHTX_REPLACESADDR_REPLACECRC _SB_MAKE64(0x0A)
-#define K_DMA_ETHTX_REPLACESADDR_APPENDCRC_APPENDPAD _SB_MAKE64(0x0B)
-#define K_DMA_ETHTX_REPLACESADDR_APPENDVLAN_REPLACECRC _SB_MAKE64(0x0C)
-#define K_DMA_ETHTX_REPLACESADDR_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x0D)
-#define K_DMA_ETHTX_REPLACESADDR_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x0E)
-#define K_DMA_ETHTX_RESERVED2 _SB_MAKE64(0x0F)
-
-/*
- * Serial Receive Options (Table 7-18)
- */
-#define M_DMA_SERRX_CRC_ERROR _SB_MAKEMASK1(56)
-#define M_DMA_SERRX_ABORT _SB_MAKEMASK1(57)
-#define M_DMA_SERRX_OCTET_ERROR _SB_MAKEMASK1(58)
-#define M_DMA_SERRX_LONGFRAME_ERROR _SB_MAKEMASK1(59)
-#define M_DMA_SERRX_SHORTFRAME_ERROR _SB_MAKEMASK1(60)
-#define M_DMA_SERRX_OVERRUN_ERROR _SB_MAKEMASK1(61)
-#define M_DMA_SERRX_GOOD _SB_MAKEMASK1(62)
-#define M_DMA_SERRX_SOP _SB_MAKEMASK1(63)
-
-/*
- * Serial Transmit Status Bits (Table 7-20)
- */
-
-#define M_DMA_SERTX_FLAG _SB_MAKEMASK1(63)
-
-/*
- * Serial Transmit Options (Table 7-21)
- */
-
-#define K_DMA_SERTX_RESERVED _SB_MAKEMASK1(0)
-#define K_DMA_SERTX_APPENDCRC _SB_MAKEMASK1(1)
-#define K_DMA_SERTX_APPENDPAD _SB_MAKEMASK1(2)
-#define K_DMA_SERTX_ABORT _SB_MAKEMASK1(3)
-
-
-/* *********************************************************************
- * Data Mover Registers
- ********************************************************************* */
-
-/*
- * Data Mover Descriptor Base Address Register (Table 7-22)
- * Register: DM_DSCR_BASE_0
- * Register: DM_DSCR_BASE_1
- * Register: DM_DSCR_BASE_2
- * Register: DM_DSCR_BASE_3
- */
-
-#define M_DM_DSCR_BASE_MBZ _SB_MAKEMASK(4,0)
-
-/* Note: Just mask the base address and then OR it in. */
-#define S_DM_DSCR_BASE_ADDR _SB_MAKE64(4)
-#define M_DM_DSCR_BASE_ADDR _SB_MAKEMASK(36,S_DM_DSCR_BASE_ADDR)
-
-#define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40)
-#define M_DM_DSCR_BASE_RINGSZ _SB_MAKEMASK(16,S_DM_DSCR_BASE_RINGSZ)
-#define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_RINGSZ)
-#define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_RINGSZ,M_DM_DSCR_BASE_RINGSZ)
-
-#define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56)
-#define M_DM_DSCR_BASE_PRIORITY _SB_MAKEMASK(3,S_DM_DSCR_BASE_PRIORITY)
-#define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_PRIORITY)
-#define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_PRIORITY,M_DM_DSCR_BASE_PRIORITY)
-
-#define K_DM_DSCR_BASE_PRIORITY_1 0
-#define K_DM_DSCR_BASE_PRIORITY_2 1
-#define K_DM_DSCR_BASE_PRIORITY_4 2
-#define K_DM_DSCR_BASE_PRIORITY_8 3
-#define K_DM_DSCR_BASE_PRIORITY_16 4
-
-#define M_DM_DSCR_BASE_ACTIVE _SB_MAKEMASK1(59)
-#define M_DM_DSCR_BASE_INTERRUPT _SB_MAKEMASK1(60)
-#define M_DM_DSCR_BASE_RESET _SB_MAKEMASK1(61) /* write register */
-#define M_DM_DSCR_BASE_ERROR _SB_MAKEMASK1(61) /* read register */
-#define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62)
-#define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63)
-
-/*
- * Data Mover Descriptor Count Register (Table 7-25)
- */
-
-/* no bitfields */
-
-/*
- * Data Mover Current Descriptor Address (Table 7-24)
- * Register: DM_CUR_DSCR_ADDR_0
- * Register: DM_CUR_DSCR_ADDR_1
- * Register: DM_CUR_DSCR_ADDR_2
- * Register: DM_CUR_DSCR_ADDR_3
- */
-
-#define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0)
-#define M_DM_CUR_DSCR_DSCR_ADDR _SB_MAKEMASK(40,S_DM_CUR_DSCR_DSCR_ADDR)
-
-#define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48)
-#define M_DM_CUR_DSCR_DSCR_COUNT _SB_MAKEMASK(16,S_DM_CUR_DSCR_DSCR_COUNT)
-#define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT)
-#define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT,\
- M_DM_CUR_DSCR_DSCR_COUNT)
-
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-/*
- * Data Mover Channel Partial Result Registers
- * Register: DM_PARTIAL_0
- * Register: DM_PARTIAL_1
- * Register: DM_PARTIAL_2
- * Register: DM_PARTIAL_3
- */
-#define S_DM_PARTIAL_CRC_PARTIAL _SB_MAKE64(0)
-#define M_DM_PARTIAL_CRC_PARTIAL _SB_MAKEMASK(32,S_DM_PARTIAL_CRC_PARTIAL)
-#define V_DM_PARTIAL_CRC_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_CRC_PARTIAL)
-#define G_DM_PARTIAL_CRC_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_CRC_PARTIAL,\
- M_DM_PARTIAL_CRC_PARTIAL)
-
-#define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32)
-#define M_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKEMASK(16,S_DM_PARTIAL_TCPCS_PARTIAL)
-#define V_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL)
-#define G_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL,\
- M_DM_PARTIAL_TCPCS_PARTIAL)
-
-#define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48)
-#endif /* 112x PASS1 */
-
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-/*
- * Data Mover CRC Definition Registers
- * Register: CRC_DEF_0
- * Register: CRC_DEF_1
- */
-#define S_CRC_DEF_CRC_INIT _SB_MAKE64(0)
-#define M_CRC_DEF_CRC_INIT _SB_MAKEMASK(32,S_CRC_DEF_CRC_INIT)
-#define V_CRC_DEF_CRC_INIT(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_INIT)
-#define G_CRC_DEF_CRC_INIT(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_INIT,\
- M_CRC_DEF_CRC_INIT)
-
-#define S_CRC_DEF_CRC_POLY _SB_MAKE64(32)
-#define M_CRC_DEF_CRC_POLY _SB_MAKEMASK(32,S_CRC_DEF_CRC_POLY)
-#define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY)
-#define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\
- M_CRC_DEF_CRC_POLY)
-#endif /* 112x PASS1 */
-
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-/*
- * Data Mover CRC/Checksum Definition Registers
- * Register: CTCP_DEF_0
- * Register: CTCP_DEF_1
- */
-#define S_CTCP_DEF_CRC_TXOR _SB_MAKE64(0)
-#define M_CTCP_DEF_CRC_TXOR _SB_MAKEMASK(32,S_CTCP_DEF_CRC_TXOR)
-#define V_CTCP_DEF_CRC_TXOR(r) _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_TXOR)
-#define G_CTCP_DEF_CRC_TXOR(r) _SB_GETVALUE(r,S_CTCP_DEF_CRC_TXOR,\
- M_CTCP_DEF_CRC_TXOR)
-
-#define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32)
-#define M_CTCP_DEF_TCPCS_INIT _SB_MAKEMASK(16,S_CTCP_DEF_TCPCS_INIT)
-#define V_CTCP_DEF_TCPCS_INIT(r) _SB_MAKEVALUE(r,S_CTCP_DEF_TCPCS_INIT)
-#define G_CTCP_DEF_TCPCS_INIT(r) _SB_GETVALUE(r,S_CTCP_DEF_TCPCS_INIT,\
- M_CTCP_DEF_TCPCS_INIT)
-
-#define S_CTCP_DEF_CRC_WIDTH _SB_MAKE64(48)
-#define M_CTCP_DEF_CRC_WIDTH _SB_MAKEMASK(2,S_CTCP_DEF_CRC_WIDTH)
-#define V_CTCP_DEF_CRC_WIDTH(r) _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_WIDTH)
-#define G_CTCP_DEF_CRC_WIDTH(r) _SB_GETVALUE(r,S_CTCP_DEF_CRC_WIDTH,\
- M_CTCP_DEF_CRC_WIDTH)
-
-#define K_CTCP_DEF_CRC_WIDTH_4 0
-#define K_CTCP_DEF_CRC_WIDTH_2 1
-#define K_CTCP_DEF_CRC_WIDTH_1 2
-
-#define M_CTCP_DEF_CRC_BIT_ORDER _SB_MAKEMASK1(50)
-#endif /* 112x PASS1 */
-
-
-/*
- * Data Mover Descriptor Doubleword "A" (Table 7-26)
- */
-
-#define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0)
-#define M_DM_DSCRA_DST_ADDR _SB_MAKEMASK(40,S_DM_DSCRA_DST_ADDR)
-
-#define M_DM_DSCRA_UN_DEST _SB_MAKEMASK1(40)
-#define M_DM_DSCRA_UN_SRC _SB_MAKEMASK1(41)
-#define M_DM_DSCRA_INTERRUPT _SB_MAKEMASK1(42)
-#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
-#define M_DM_DSCRA_THROTTLE _SB_MAKEMASK1(43)
-#endif /* up to 1250 PASS1 */
-
-#define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44)
-#define M_DM_DSCRA_DIR_DEST _SB_MAKEMASK(2,S_DM_DSCRA_DIR_DEST)
-#define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_DEST)
-#define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_DEST,M_DM_DSCRA_DIR_DEST)
-
-#define K_DM_DSCRA_DIR_DEST_INCR 0
-#define K_DM_DSCRA_DIR_DEST_DECR 1
-#define K_DM_DSCRA_DIR_DEST_CONST 2
-
-#define V_DM_DSCRA_DIR_DEST_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR,S_DM_DSCRA_DIR_DEST)
-#define V_DM_DSCRA_DIR_DEST_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR,S_DM_DSCRA_DIR_DEST)
-#define V_DM_DSCRA_DIR_DEST_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST,S_DM_DSCRA_DIR_DEST)
-
-#define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46)
-#define M_DM_DSCRA_DIR_SRC _SB_MAKEMASK(2,S_DM_DSCRA_DIR_SRC)
-#define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_SRC)
-#define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_SRC,M_DM_DSCRA_DIR_SRC)
-
-#define K_DM_DSCRA_DIR_SRC_INCR 0
-#define K_DM_DSCRA_DIR_SRC_DECR 1
-#define K_DM_DSCRA_DIR_SRC_CONST 2
-
-#define V_DM_DSCRA_DIR_SRC_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR,S_DM_DSCRA_DIR_SRC)
-#define V_DM_DSCRA_DIR_SRC_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR,S_DM_DSCRA_DIR_SRC)
-#define V_DM_DSCRA_DIR_SRC_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST,S_DM_DSCRA_DIR_SRC)
-
-
-#define M_DM_DSCRA_ZERO_MEM _SB_MAKEMASK1(48)
-#define M_DM_DSCRA_PREFETCH _SB_MAKEMASK1(49)
-#define M_DM_DSCRA_L2C_DEST _SB_MAKEMASK1(50)
-#define M_DM_DSCRA_L2C_SRC _SB_MAKEMASK1(51)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_DM_DSCRA_RD_BKOFF _SB_MAKEMASK1(52)
-#define M_DM_DSCRA_WR_BKOFF _SB_MAKEMASK1(53)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_DM_DSCRA_TCPCS_EN _SB_MAKEMASK1(54)
-#define M_DM_DSCRA_TCPCS_RES _SB_MAKEMASK1(55)
-#define M_DM_DSCRA_TCPCS_AP _SB_MAKEMASK1(56)
-#define M_DM_DSCRA_CRC_EN _SB_MAKEMASK1(57)
-#define M_DM_DSCRA_CRC_RES _SB_MAKEMASK1(58)
-#define M_DM_DSCRA_CRC_AP _SB_MAKEMASK1(59)
-#define M_DM_DSCRA_CRC_DFN _SB_MAKEMASK1(60)
-#define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61)
-#endif /* 112x PASS1 */
-
-#define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61)
-
-/*
- * Data Mover Descriptor Doubleword "B" (Table 7-25)
- */
-
-#define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0)
-#define M_DM_DSCRB_SRC_ADDR _SB_MAKEMASK(40,S_DM_DSCRB_SRC_ADDR)
-
-#define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40)
-#define M_DM_DSCRB_SRC_LENGTH _SB_MAKEMASK(20,S_DM_DSCRB_SRC_LENGTH)
-#define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x,S_DM_DSCRB_SRC_LENGTH)
-#define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x,S_DM_DSCRB_SRC_LENGTH,M_DM_DSCRB_SRC_LENGTH)
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_genbus.h b/include/asm-mips64/sibyte/sb1250_genbus.h
--- a/include/asm-mips64/sibyte/sb1250_genbus.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,276 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * Generic Bus Constants File: sb1250_genbus.h
- *
- * This module contains constants and macros useful for
- * manipulating the SB1250's Generic Bus interface
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_GENBUS_H
-#define _SB1250_GENBUS_H
-
-#include "sb1250_defs.h"
-
-/*
- * Generic Bus Region Configuration Registers (Table 11-4)
- */
-
-#define S_IO_RDY_ACTIVE 0
-#define M_IO_RDY_ACTIVE _SB_MAKEMASK1(S_IO_RDY_ACTIVE)
-
-#define S_IO_ENA_RDY 1
-#define M_IO_ENA_RDY _SB_MAKEMASK1(S_IO_ENA_RDY)
-
-#define S_IO_WIDTH_SEL 2
-#define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL)
-#define K_IO_WIDTH_SEL_1 0
-#define K_IO_WIDTH_SEL_2 1
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define K_IO_WIDTH_SEL_1L 2
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define K_IO_WIDTH_SEL_4 3
-#define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x,S_IO_WIDTH_SEL)
-#define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x,S_IO_WIDTH_SEL,M_IO_WIDTH_SEL)
-
-#define S_IO_PARITY_ENA 4
-#define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define S_IO_BURST_EN 5
-#define M_IO_BURST_EN _SB_MAKEMASK1(S_IO_BURST_EN)
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define S_IO_PARITY_ODD 6
-#define M_IO_PARITY_ODD _SB_MAKEMASK1(S_IO_PARITY_ODD)
-#define S_IO_NONMUX 7
-#define M_IO_NONMUX _SB_MAKEMASK1(S_IO_NONMUX)
-
-#define S_IO_TIMEOUT 8
-#define M_IO_TIMEOUT _SB_MAKEMASK(8,S_IO_TIMEOUT)
-#define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x,S_IO_TIMEOUT)
-#define G_IO_TIMEOUT(x) _SB_GETVALUE(x,S_IO_TIMEOUT,M_IO_TIMEOUT)
-
-/*
- * Generic Bus Region Size register (Table 11-5)
- */
-
-#define S_IO_MULT_SIZE 0
-#define M_IO_MULT_SIZE _SB_MAKEMASK(12,S_IO_MULT_SIZE)
-#define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x,S_IO_MULT_SIZE)
-#define G_IO_MULT_SIZE(x) _SB_GETVALUE(x,S_IO_MULT_SIZE,M_IO_MULT_SIZE)
-
-#define S_IO_REGSIZE 16 /* # bits to shift size for this reg */
-
-/*
- * Generic Bus Region Address (Table 11-6)
- */
-
-#define S_IO_START_ADDR 0
-#define M_IO_START_ADDR _SB_MAKEMASK(14,S_IO_START_ADDR)
-#define V_IO_START_ADDR(x) _SB_MAKEVALUE(x,S_IO_START_ADDR)
-#define G_IO_START_ADDR(x) _SB_GETVALUE(x,S_IO_START_ADDR,M_IO_START_ADDR)
-
-#define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */
-
-/*
- * Generic Bus Region 0 Timing Registers (Table 11-7)
- */
-
-#define S_IO_ALE_WIDTH 0
-#define M_IO_ALE_WIDTH _SB_MAKEMASK(3,S_IO_ALE_WIDTH)
-#define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_ALE_WIDTH)
-#define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x,S_IO_ALE_WIDTH,M_IO_ALE_WIDTH)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_IO_EARLY_CS _SB_MAKEMASK1(3)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_IO_ALE_TO_CS 4
-#define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS)
-#define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_CS)
-#define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x,S_IO_ALE_TO_CS,M_IO_ALE_TO_CS)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define S_IO_BURST_WIDTH _SB_MAKE64(6)
-#define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH)
-#define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x,S_IO_BURST_WIDTH)
-#define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x,S_IO_BURST_WIDTH,M_IO_BURST_WIDTH)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_IO_CS_WIDTH 8
-#define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH)
-#define V_IO_CS_WIDTH(x) _SB_MAKEVALUE(x,S_IO_CS_WIDTH)
-#define G_IO_CS_WIDTH(x) _SB_GETVALUE(x,S_IO_CS_WIDTH,M_IO_CS_WIDTH)
-
-#define S_IO_RDY_SMPLE 13
-#define M_IO_RDY_SMPLE _SB_MAKEMASK(3,S_IO_RDY_SMPLE)
-#define V_IO_RDY_SMPLE(x) _SB_MAKEVALUE(x,S_IO_RDY_SMPLE)
-#define G_IO_RDY_SMPLE(x) _SB_GETVALUE(x,S_IO_RDY_SMPLE,M_IO_RDY_SMPLE)
-
-
-/*
- * Generic Bus Timing 1 Registers (Table 11-8)
- */
-
-#define S_IO_ALE_TO_WRITE 0
-#define M_IO_ALE_TO_WRITE _SB_MAKEMASK(3,S_IO_ALE_TO_WRITE)
-#define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_WRITE)
-#define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x,S_IO_ALE_TO_WRITE,M_IO_ALE_TO_WRITE)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_IO_RDY_SYNC _SB_MAKEMASK1(3)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_IO_WRITE_WIDTH 4
-#define M_IO_WRITE_WIDTH _SB_MAKEMASK(4,S_IO_WRITE_WIDTH)
-#define V_IO_WRITE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_WRITE_WIDTH)
-#define G_IO_WRITE_WIDTH(x) _SB_GETVALUE(x,S_IO_WRITE_WIDTH,M_IO_WRITE_WIDTH)
-
-#define S_IO_IDLE_CYCLE 8
-#define M_IO_IDLE_CYCLE _SB_MAKEMASK(4,S_IO_IDLE_CYCLE)
-#define V_IO_IDLE_CYCLE(x) _SB_MAKEVALUE(x,S_IO_IDLE_CYCLE)
-#define G_IO_IDLE_CYCLE(x) _SB_GETVALUE(x,S_IO_IDLE_CYCLE,M_IO_IDLE_CYCLE)
-
-#define S_IO_OE_TO_CS 12
-#define M_IO_OE_TO_CS _SB_MAKEMASK(2,S_IO_OE_TO_CS)
-#define V_IO_OE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_OE_TO_CS)
-#define G_IO_OE_TO_CS(x) _SB_GETVALUE(x,S_IO_OE_TO_CS,M_IO_OE_TO_CS)
-
-#define S_IO_CS_TO_OE 14
-#define M_IO_CS_TO_OE _SB_MAKEMASK(2,S_IO_CS_TO_OE)
-#define V_IO_CS_TO_OE(x) _SB_MAKEVALUE(x,S_IO_CS_TO_OE)
-#define G_IO_CS_TO_OE(x) _SB_GETVALUE(x,S_IO_CS_TO_OE,M_IO_CS_TO_OE)
-
-/*
- * Generic Bus Interrupt Status Register (Table 11-9)
- */
-
-#define M_IO_CS_ERR_INT _SB_MAKEMASK(0,8)
-#define M_IO_CS0_ERR_INT _SB_MAKEMASK1(0)
-#define M_IO_CS1_ERR_INT _SB_MAKEMASK1(1)
-#define M_IO_CS2_ERR_INT _SB_MAKEMASK1(2)
-#define M_IO_CS3_ERR_INT _SB_MAKEMASK1(3)
-#define M_IO_CS4_ERR_INT _SB_MAKEMASK1(4)
-#define M_IO_CS5_ERR_INT _SB_MAKEMASK1(5)
-#define M_IO_CS6_ERR_INT _SB_MAKEMASK1(6)
-#define M_IO_CS7_ERR_INT _SB_MAKEMASK1(7)
-
-#define M_IO_RD_PAR_INT _SB_MAKEMASK1(9)
-#define M_IO_TIMEOUT_INT _SB_MAKEMASK1(10)
-#define M_IO_ILL_ADDR_INT _SB_MAKEMASK1(11)
-#define M_IO_MULT_CS_INT _SB_MAKEMASK1(12)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_IO_COH_ERR _SB_MAKEMASK1(14)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/*
- * PCMCIA configuration register (Table 12-6)
- */
-
-#define M_PCMCIA_CFG_ATTRMEM _SB_MAKEMASK1(0)
-#define M_PCMCIA_CFG_3VEN _SB_MAKEMASK1(1)
-#define M_PCMCIA_CFG_5VEN _SB_MAKEMASK1(2)
-#define M_PCMCIA_CFG_VPPEN _SB_MAKEMASK1(3)
-#define M_PCMCIA_CFG_RESET _SB_MAKEMASK1(4)
-#define M_PCMCIA_CFG_APWRONEN _SB_MAKEMASK1(5)
-#define M_PCMCIA_CFG_CDMASK _SB_MAKEMASK1(6)
-#define M_PCMCIA_CFG_WPMASK _SB_MAKEMASK1(7)
-#define M_PCMCIA_CFG_RDYMASK _SB_MAKEMASK1(8)
-#define M_PCMCIA_CFG_PWRCTL _SB_MAKEMASK1(9)
-
-/*
- * PCMCIA status register (Table 12-7)
- */
-
-#define M_PCMCIA_STATUS_CD1 _SB_MAKEMASK1(0)
-#define M_PCMCIA_STATUS_CD2 _SB_MAKEMASK1(1)
-#define M_PCMCIA_STATUS_VS1 _SB_MAKEMASK1(2)
-#define M_PCMCIA_STATUS_VS2 _SB_MAKEMASK1(3)
-#define M_PCMCIA_STATUS_WP _SB_MAKEMASK1(4)
-#define M_PCMCIA_STATUS_RDY _SB_MAKEMASK1(5)
-#define M_PCMCIA_STATUS_3VEN _SB_MAKEMASK1(6)
-#define M_PCMCIA_STATUS_5VEN _SB_MAKEMASK1(7)
-#define M_PCMCIA_STATUS_CDCHG _SB_MAKEMASK1(8)
-#define M_PCMCIA_STATUS_WPCHG _SB_MAKEMASK1(9)
-#define M_PCMCIA_STATUS_RDYCHG _SB_MAKEMASK1(10)
-
-/*
- * GPIO Interrupt Type Register (table 13-3)
- */
-
-#define K_GPIO_INTR_DISABLE 0
-#define K_GPIO_INTR_EDGE 1
-#define K_GPIO_INTR_LEVEL 2
-#define K_GPIO_INTR_SPLIT 3
-
-#define S_GPIO_INTR_TYPEX(n) (((n)/2)*2)
-#define M_GPIO_INTR_TYPEX(n) _SB_MAKEMASK(2,S_GPIO_INTR_TYPEX(n))
-#define V_GPIO_INTR_TYPEX(n,x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPEX(n))
-#define G_GPIO_INTR_TYPEX(n,x) _SB_GETVALUE(x,S_GPIO_INTR_TYPEX(n),M_GPIO_INTR_TYPEX(n))
-
-#define S_GPIO_INTR_TYPE0 0
-#define M_GPIO_INTR_TYPE0 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE0)
-#define V_GPIO_INTR_TYPE0(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE0)
-#define G_GPIO_INTR_TYPE0(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE0,M_GPIO_INTR_TYPE0)
-
-#define S_GPIO_INTR_TYPE2 2
-#define M_GPIO_INTR_TYPE2 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE2)
-#define V_GPIO_INTR_TYPE2(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE2)
-#define G_GPIO_INTR_TYPE2(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE2,M_GPIO_INTR_TYPE2)
-
-#define S_GPIO_INTR_TYPE4 4
-#define M_GPIO_INTR_TYPE4 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE4)
-#define V_GPIO_INTR_TYPE4(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE4)
-#define G_GPIO_INTR_TYPE4(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE4,M_GPIO_INTR_TYPE4)
-
-#define S_GPIO_INTR_TYPE6 6
-#define M_GPIO_INTR_TYPE6 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE6)
-#define V_GPIO_INTR_TYPE6(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE6)
-#define G_GPIO_INTR_TYPE6(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE6,M_GPIO_INTR_TYPE6)
-
-#define S_GPIO_INTR_TYPE8 8
-#define M_GPIO_INTR_TYPE8 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE8)
-#define V_GPIO_INTR_TYPE8(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE8)
-#define G_GPIO_INTR_TYPE8(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE8,M_GPIO_INTR_TYPE8)
-
-#define S_GPIO_INTR_TYPE10 10
-#define M_GPIO_INTR_TYPE10 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE10)
-#define V_GPIO_INTR_TYPE10(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE10)
-#define G_GPIO_INTR_TYPE10(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE10,M_GPIO_INTR_TYPE10)
-
-#define S_GPIO_INTR_TYPE12 12
-#define M_GPIO_INTR_TYPE12 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE12)
-#define V_GPIO_INTR_TYPE12(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE12)
-#define G_GPIO_INTR_TYPE12(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE12,M_GPIO_INTR_TYPE12)
-
-#define S_GPIO_INTR_TYPE14 14
-#define M_GPIO_INTR_TYPE14 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE14)
-#define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE14)
-#define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE14,M_GPIO_INTR_TYPE14)
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_int.h b/include/asm-mips64/sibyte/sb1250_int.h
--- a/include/asm-mips64/sibyte/sb1250_int.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,247 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * Interrupt Mapper definitions File: sb1250_int.h
- *
- * This module contains constants for manipulating the SB1250's
- * interrupt mapper and definitions for the interrupt sources.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_INT_H
-#define _SB1250_INT_H
-
-#include "sb1250_defs.h"
-
-/* *********************************************************************
- * Interrupt Mapper Constants
- ********************************************************************* */
-
-/*
- * Interrupt sources (Table 4-8, UM 0.2)
- *
- * First, the interrupt numbers.
- */
-
-#define K_INT_WATCHDOG_TIMER_0 0
-#define K_INT_WATCHDOG_TIMER_1 1
-#define K_INT_TIMER_0 2
-#define K_INT_TIMER_1 3
-#define K_INT_TIMER_2 4
-#define K_INT_TIMER_3 5
-#define K_INT_SMB_0 6
-#define K_INT_SMB_1 7
-#define K_INT_UART_0 8
-#define K_INT_UART_1 9
-#define K_INT_SER_0 10
-#define K_INT_SER_1 11
-#define K_INT_PCMCIA 12
-#define K_INT_ADDR_TRAP 13
-#define K_INT_PERF_CNT 14
-#define K_INT_TRACE_FREEZE 15
-#define K_INT_BAD_ECC 16
-#define K_INT_COR_ECC 17
-#define K_INT_IO_BUS 18
-#define K_INT_MAC_0 19
-#define K_INT_MAC_1 20
-#define K_INT_MAC_2 21
-#define K_INT_DM_CH_0 22
-#define K_INT_DM_CH_1 23
-#define K_INT_DM_CH_2 24
-#define K_INT_DM_CH_3 25
-#define K_INT_MBOX_0 26
-#define K_INT_MBOX_1 27
-#define K_INT_MBOX_2 28
-#define K_INT_MBOX_3 29
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define K_INT_CYCLE_CP0_INT 30
-#define K_INT_CYCLE_CP1_INT 31
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define K_INT_GPIO_0 32
-#define K_INT_GPIO_1 33
-#define K_INT_GPIO_2 34
-#define K_INT_GPIO_3 35
-#define K_INT_GPIO_4 36
-#define K_INT_GPIO_5 37
-#define K_INT_GPIO_6 38
-#define K_INT_GPIO_7 39
-#define K_INT_GPIO_8 40
-#define K_INT_GPIO_9 41
-#define K_INT_GPIO_10 42
-#define K_INT_GPIO_11 43
-#define K_INT_GPIO_12 44
-#define K_INT_GPIO_13 45
-#define K_INT_GPIO_14 46
-#define K_INT_GPIO_15 47
-#define K_INT_LDT_FATAL 48
-#define K_INT_LDT_NONFATAL 49
-#define K_INT_LDT_SMI 50
-#define K_INT_LDT_NMI 51
-#define K_INT_LDT_INIT 52
-#define K_INT_LDT_STARTUP 53
-#define K_INT_LDT_EXT 54
-#define K_INT_PCI_ERROR 55
-#define K_INT_PCI_INTA 56
-#define K_INT_PCI_INTB 57
-#define K_INT_PCI_INTC 58
-#define K_INT_PCI_INTD 59
-#define K_INT_SPARE_2 60
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define K_INT_MAC_0_CH1 61
-#define K_INT_MAC_1_CH1 62
-#define K_INT_MAC_2_CH1 63
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/*
- * Mask values for each interrupt
- */
-
-#define M_INT_WATCHDOG_TIMER_0 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_0)
-#define M_INT_WATCHDOG_TIMER_1 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_1)
-#define M_INT_TIMER_0 _SB_MAKEMASK1(K_INT_TIMER_0)
-#define M_INT_TIMER_1 _SB_MAKEMASK1(K_INT_TIMER_1)
-#define M_INT_TIMER_2 _SB_MAKEMASK1(K_INT_TIMER_2)
-#define M_INT_TIMER_3 _SB_MAKEMASK1(K_INT_TIMER_3)
-#define M_INT_SMB_0 _SB_MAKEMASK1(K_INT_SMB_0)
-#define M_INT_SMB_1 _SB_MAKEMASK1(K_INT_SMB_1)
-#define M_INT_UART_0 _SB_MAKEMASK1(K_INT_UART_0)
-#define M_INT_UART_1 _SB_MAKEMASK1(K_INT_UART_1)
-#define M_INT_SER_0 _SB_MAKEMASK1(K_INT_SER_0)
-#define M_INT_SER_1 _SB_MAKEMASK1(K_INT_SER_1)
-#define M_INT_PCMCIA _SB_MAKEMASK1(K_INT_PCMCIA)
-#define M_INT_ADDR_TRAP _SB_MAKEMASK1(K_INT_ADDR_TRAP)
-#define M_INT_PERF_CNT _SB_MAKEMASK1(K_INT_PERF_CNT)
-#define M_INT_TRACE_FREEZE _SB_MAKEMASK1(K_INT_TRACE_FREEZE)
-#define M_INT_BAD_ECC _SB_MAKEMASK1(K_INT_BAD_ECC)
-#define M_INT_COR_ECC _SB_MAKEMASK1(K_INT_COR_ECC)
-#define M_INT_IO_BUS _SB_MAKEMASK1(K_INT_IO_BUS)
-#define M_INT_MAC_0 _SB_MAKEMASK1(K_INT_MAC_0)
-#define M_INT_MAC_1 _SB_MAKEMASK1(K_INT_MAC_1)
-#define M_INT_MAC_2 _SB_MAKEMASK1(K_INT_MAC_2)
-#define M_INT_DM_CH_0 _SB_MAKEMASK1(K_INT_DM_CH_0)
-#define M_INT_DM_CH_1 _SB_MAKEMASK1(K_INT_DM_CH_1)
-#define M_INT_DM_CH_2 _SB_MAKEMASK1(K_INT_DM_CH_2)
-#define M_INT_DM_CH_3 _SB_MAKEMASK1(K_INT_DM_CH_3)
-#define M_INT_MBOX_0 _SB_MAKEMASK1(K_INT_MBOX_0)
-#define M_INT_MBOX_1 _SB_MAKEMASK1(K_INT_MBOX_1)
-#define M_INT_MBOX_2 _SB_MAKEMASK1(K_INT_MBOX_2)
-#define M_INT_MBOX_3 _SB_MAKEMASK1(K_INT_MBOX_3)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_INT_CYCLE_CP0_INT _SB_MAKEMASK1(K_INT_CYCLE_CP0_INT)
-#define M_INT_CYCLE_CP1_INT _SB_MAKEMASK1(K_INT_CYCLE_CP1_INT)
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define M_INT_GPIO_0 _SB_MAKEMASK1(K_INT_GPIO_0)
-#define M_INT_GPIO_1 _SB_MAKEMASK1(K_INT_GPIO_1)
-#define M_INT_GPIO_2 _SB_MAKEMASK1(K_INT_GPIO_2)
-#define M_INT_GPIO_3 _SB_MAKEMASK1(K_INT_GPIO_3)
-#define M_INT_GPIO_4 _SB_MAKEMASK1(K_INT_GPIO_4)
-#define M_INT_GPIO_5 _SB_MAKEMASK1(K_INT_GPIO_5)
-#define M_INT_GPIO_6 _SB_MAKEMASK1(K_INT_GPIO_6)
-#define M_INT_GPIO_7 _SB_MAKEMASK1(K_INT_GPIO_7)
-#define M_INT_GPIO_8 _SB_MAKEMASK1(K_INT_GPIO_8)
-#define M_INT_GPIO_9 _SB_MAKEMASK1(K_INT_GPIO_9)
-#define M_INT_GPIO_10 _SB_MAKEMASK1(K_INT_GPIO_10)
-#define M_INT_GPIO_11 _SB_MAKEMASK1(K_INT_GPIO_11)
-#define M_INT_GPIO_12 _SB_MAKEMASK1(K_INT_GPIO_12)
-#define M_INT_GPIO_13 _SB_MAKEMASK1(K_INT_GPIO_13)
-#define M_INT_GPIO_14 _SB_MAKEMASK1(K_INT_GPIO_14)
-#define M_INT_GPIO_15 _SB_MAKEMASK1(K_INT_GPIO_15)
-#define M_INT_LDT_FATAL _SB_MAKEMASK1(K_INT_LDT_FATAL)
-#define M_INT_LDT_NONFATAL _SB_MAKEMASK1(K_INT_LDT_NONFATAL)
-#define M_INT_LDT_SMI _SB_MAKEMASK1(K_INT_LDT_SMI)
-#define M_INT_LDT_NMI _SB_MAKEMASK1(K_INT_LDT_NMI)
-#define M_INT_LDT_INIT _SB_MAKEMASK1(K_INT_LDT_INIT)
-#define M_INT_LDT_STARTUP _SB_MAKEMASK1(K_INT_LDT_STARTUP)
-#define M_INT_LDT_EXT _SB_MAKEMASK1(K_INT_LDT_EXT)
-#define M_INT_PCI_ERROR _SB_MAKEMASK1(K_INT_PCI_ERROR)
-#define M_INT_PCI_INTA _SB_MAKEMASK1(K_INT_PCI_INTA)
-#define M_INT_PCI_INTB _SB_MAKEMASK1(K_INT_PCI_INTB)
-#define M_INT_PCI_INTC _SB_MAKEMASK1(K_INT_PCI_INTC)
-#define M_INT_PCI_INTD _SB_MAKEMASK1(K_INT_PCI_INTD)
-#define M_INT_SPARE_2 _SB_MAKEMASK1(K_INT_SPARE_2)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_INT_MAC_0_CH1 _SB_MAKEMASK1(K_INT_MAC_0_CH1)
-#define M_INT_MAC_1_CH1 _SB_MAKEMASK1(K_INT_MAC_1_CH1)
-#define M_INT_MAC_2_CH1 _SB_MAKEMASK1(K_INT_MAC_2_CH1)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/*
- * Interrupt mappings
- */
-
-#define K_INT_MAP_I0 0 /* interrupt pins on processor */
-#define K_INT_MAP_I1 1
-#define K_INT_MAP_I2 2
-#define K_INT_MAP_I3 3
-#define K_INT_MAP_I4 4
-#define K_INT_MAP_I5 5
-#define K_INT_MAP_NMI 6 /* nonmaskable */
-#define K_INT_MAP_DINT 7 /* debug interrupt */
-
-/*
- * LDT Interrupt Set Register (table 4-5)
- */
-
-#define S_INT_LDT_INTMSG 0
-#define M_INT_LDT_INTMSG _SB_MAKEMASK(3,S_INT_LDT_INTMSG)
-#define V_INT_LDT_INTMSG(x) _SB_MAKEVALUE(x,S_INT_LDT_INTMSG)
-#define G_INT_LDT_INTMSG(x) _SB_GETVALUE(x,S_INT_LDT_INTMSG,M_INT_LDT_INTMSG)
-
-#define K_INT_LDT_INTMSG_FIXED 0
-#define K_INT_LDT_INTMSG_ARBITRATED 1
-#define K_INT_LDT_INTMSG_SMI 2
-#define K_INT_LDT_INTMSG_NMI 3
-#define K_INT_LDT_INTMSG_INIT 4
-#define K_INT_LDT_INTMSG_STARTUP 5
-#define K_INT_LDT_INTMSG_EXTINT 6
-#define K_INT_LDT_INTMSG_RESERVED 7
-
-#define M_INT_LDT_EDGETRIGGER 0
-#define M_INT_LDT_LEVELTRIGGER _SB_MAKEMASK1(3)
-
-#define M_INT_LDT_PHYSICALDEST 0
-#define M_INT_LDT_LOGICALDEST _SB_MAKEMASK1(4)
-
-#define S_INT_LDT_INTDEST 5
-#define M_INT_LDT_INTDEST _SB_MAKEMASK(10,S_INT_LDT_INTDEST)
-#define V_INT_LDT_INTDEST(x) _SB_MAKEVALUE(x,S_INT_LDT_INTDEST)
-#define G_INT_LDT_INTDEST(x) _SB_GETVALUE(x,S_INT_LDT_INTDEST,M_INT_LDT_INTDEST)
-
-#define S_INT_LDT_VECTOR 13
-#define M_INT_LDT_VECTOR _SB_MAKEMASK(8,S_INT_LDT_VECTOR)
-#define V_INT_LDT_VECTOR(x) _SB_MAKEVALUE(x,S_INT_LDT_VECTOR)
-#define G_INT_LDT_VECTOR(x) _SB_GETVALUE(x,S_INT_LDT_VECTOR,M_INT_LDT_VECTOR)
-
-/*
- * Vector format (Table 4-6)
- */
-
-#define M_LDTVECT_RAISEINT 0x00
-#define M_LDTVECT_RAISEMBOX 0x40
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_l2c.h b/include/asm-mips64/sibyte/sb1250_l2c.h
--- a/include/asm-mips64/sibyte/sb1250_l2c.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,128 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * L2 Cache constants and macros File: sb1250_l2c.h
- *
- * This module contains constants useful for manipulating the
- * level 2 cache.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_L2C_H
-#define _SB1250_L2C_H
-
-#include "sb1250_defs.h"
-
-/*
- * Level 2 Cache Tag register (Table 5-3)
- */
-
-#define S_L2C_TAG_MBZ 0
-#define M_L2C_TAG_MBZ _SB_MAKEMASK(5,S_L2C_TAG_MBZ)
-
-#define S_L2C_TAG_INDEX 5
-#define M_L2C_TAG_INDEX _SB_MAKEMASK(12,S_L2C_TAG_INDEX)
-#define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x,S_L2C_TAG_INDEX)
-#define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x,S_L2C_TAG_INDEX,M_L2C_TAG_INDEX)
-
-#define S_L2C_TAG_TAG 17
-#define M_L2C_TAG_TAG _SB_MAKEMASK(23,S_L2C_TAG_TAG)
-#define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x,S_L2C_TAG_TAG)
-#define G_L2C_TAG_TAG(x) _SB_GETVALUE(x,S_L2C_TAG_TAG,M_L2C_TAG_TAG)
-
-#define S_L2C_TAG_ECC 40
-#define M_L2C_TAG_ECC _SB_MAKEMASK(6,S_L2C_TAG_ECC)
-#define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x,S_L2C_TAG_ECC)
-#define G_L2C_TAG_ECC(x) _SB_GETVALUE(x,S_L2C_TAG_ECC,M_L2C_TAG_ECC)
-
-#define S_L2C_TAG_WAY 46
-#define M_L2C_TAG_WAY _SB_MAKEMASK(2,S_L2C_TAG_WAY)
-#define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x,S_L2C_TAG_WAY)
-#define G_L2C_TAG_WAY(x) _SB_GETVALUE(x,S_L2C_TAG_WAY,M_L2C_TAG_WAY)
-
-#define M_L2C_TAG_DIRTY _SB_MAKEMASK1(48)
-#define M_L2C_TAG_VALID _SB_MAKEMASK1(49)
-
-/*
- * Format of level 2 cache management address (table 5-2)
- */
-
-#define S_L2C_MGMT_INDEX 5
-#define M_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_L2C_MGMT_INDEX)
-#define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x,S_L2C_MGMT_INDEX)
-#define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x,S_L2C_MGMT_INDEX,M_L2C_MGMT_INDEX)
-
-#define S_L2C_MGMT_QUADRANT 15
-#define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2,S_L2C_MGMT_QUADRANT)
-#define V_L2C_MGMT_QUADRANT(x) _SB_MAKEVALUE(x,S_L2C_MGMT_QUADRANT)
-#define G_L2C_MGMT_QUADRANT(x) _SB_GETVALUE(x,S_L2C_MGMT_QUADRANT,M_L2C_MGMT_QUADRANT)
-
-#define S_L2C_MGMT_HALF 16
-#define M_L2C_MGMT_HALF _SB_MAKEMASK(1,S_L2C_MGMT_HALF)
-
-#define S_L2C_MGMT_WAY 17
-#define M_L2C_MGMT_WAY _SB_MAKEMASK(2,S_L2C_MGMT_WAY)
-#define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_L2C_MGMT_WAY)
-#define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_L2C_MGMT_WAY,M_L2C_MGMT_WAY)
-
-#define S_L2C_MGMT_TAG 21
-#define M_L2C_MGMT_TAG _SB_MAKEMASK(6,S_L2C_MGMT_TAG)
-#define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_TAG)
-#define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x,S_L2C_MGMT_TAG,M_L2C_MGMT_TAG)
-
-#define M_L2C_MGMT_DIRTY _SB_MAKEMASK1(19)
-#define M_L2C_MGMT_VALID _SB_MAKEMASK1(20)
-
-#define A_L2C_MGMT_TAG_BASE 0x00D0000000
-
-#define L2C_ENTRIES_PER_WAY 4096
-#define L2C_NUM_WAYS 4
-
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-/*
- * L2 Read Misc. register (A_L2_READ_MISC)
- */
-#define S_L2C_MISC_NO_WAY 10
-#define M_L2C_MISC_NO_WAY _SB_MAKEMASK(4,S_L2C_MISC_NO_WAY)
-#define V_L2C_MISC_NO_WAY(x) _SB_MAKEVALUE(x,S_L2C_MISC_NO_WAY)
-#define G_L2C_MISC_NO_WAY(x) _SB_GETVALUE(x,S_L2C_MISC_NO_WAY,M_L2C_MISC_NO_WAY)
-
-#define M_L2C_MISC_ECC_CLEANUP_DIS _SB_MAKEMASK1(9)
-#define M_L2C_MISC_MC_PRIO_LOW _SB_MAKEMASK1(8)
-#define M_L2C_MISC_SOFT_DISABLE_T _SB_MAKEMASK1(7)
-#define M_L2C_MISC_SOFT_DISABLE_B _SB_MAKEMASK1(6)
-#define M_L2C_MISC_SOFT_DISABLE_R _SB_MAKEMASK1(5)
-#define M_L2C_MISC_SOFT_DISABLE_L _SB_MAKEMASK1(4)
-#define M_L2C_MISC_SCACHE_DISABLE_T _SB_MAKEMASK1(3)
-#define M_L2C_MISC_SCACHE_DISABLE_B _SB_MAKEMASK1(2)
-#define M_L2C_MISC_SCACHE_DISABLE_R _SB_MAKEMASK1(1)
-#define M_L2C_MISC_SCACHE_DISABLE_L _SB_MAKEMASK1(0)
-#endif /* 112x PASS1 */
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_ldt.h b/include/asm-mips64/sibyte/sb1250_ldt.h
--- a/include/asm-mips64/sibyte/sb1250_ldt.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,425 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * LDT constants File: sb1250_ldt.h
- *
- * This module contains constants and macros to describe
- * the LDT interface on the SB1250.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_LDT_H
-#define _SB1250_LDT_H
-
-#include "sb1250_defs.h"
-
-#define K_LDT_VENDOR_SIBYTE 0x166D
-#define K_LDT_DEVICE_SB1250 0x0002
-
-/*
- * LDT Interface Type 1 (bridge) configuration header
- */
-
-#define R_LDT_TYPE1_DEVICEID 0x0000
-#define R_LDT_TYPE1_CMDSTATUS 0x0004
-#define R_LDT_TYPE1_CLASSREV 0x0008
-#define R_LDT_TYPE1_DEVHDR 0x000C
-#define R_LDT_TYPE1_BAR0 0x0010 /* not used */
-#define R_LDT_TYPE1_BAR1 0x0014 /* not used */
-
-#define R_LDT_TYPE1_BUSID 0x0018 /* bus ID register */
-#define R_LDT_TYPE1_SECSTATUS 0x001C /* secondary status / I/O base/limit */
-#define R_LDT_TYPE1_MEMLIMIT 0x0020
-#define R_LDT_TYPE1_PREFETCH 0x0024
-#define R_LDT_TYPE1_PREF_BASE 0x0028
-#define R_LDT_TYPE1_PREF_LIMIT 0x002C
-#define R_LDT_TYPE1_IOLIMIT 0x0030
-#define R_LDT_TYPE1_CAPPTR 0x0034
-#define R_LDT_TYPE1_ROMADDR 0x0038
-#define R_LDT_TYPE1_BRCTL 0x003C
-#define R_LDT_TYPE1_CMD 0x0040
-#define R_LDT_TYPE1_LINKCTRL 0x0044
-#define R_LDT_TYPE1_LINKFREQ 0x0048
-#define R_LDT_TYPE1_RESERVED1 0x004C
-#define R_LDT_TYPE1_SRICMD 0x0050
-#define R_LDT_TYPE1_SRITXNUM 0x0054
-#define R_LDT_TYPE1_SRIRXNUM 0x0058
-#define R_LDT_TYPE1_ERRSTATUS 0x0068
-#define R_LDT_TYPE1_SRICTRL 0x006C
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define R_LDT_TYPE1_ADDSTATUS 0x0070
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define R_LDT_TYPE1_TXBUFCNT 0x00C8
-#define R_LDT_TYPE1_EXPCRC 0x00DC
-#define R_LDT_TYPE1_RXCRC 0x00F0
-
-
-/*
- * LDT Device ID register
- */
-
-#define S_LDT_DEVICEID_VENDOR 0
-#define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR)
-#define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR)
-#define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR)
-
-#define S_LDT_DEVICEID_DEVICEID 16
-#define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID)
-#define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID)
-#define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID)
-
-
-/*
- * LDT Command Register (Table 8-13)
- */
-
-#define M_LDT_CMD_IOSPACE_EN _SB_MAKEMASK1_32(0)
-#define M_LDT_CMD_MEMSPACE_EN _SB_MAKEMASK1_32(1)
-#define M_LDT_CMD_MASTER_EN _SB_MAKEMASK1_32(2)
-#define M_LDT_CMD_SPECCYC_EN _SB_MAKEMASK1_32(3)
-#define M_LDT_CMD_MEMWRINV_EN _SB_MAKEMASK1_32(4)
-#define M_LDT_CMD_VGAPALSNP_EN _SB_MAKEMASK1_32(5)
-#define M_LDT_CMD_PARERRRESP _SB_MAKEMASK1_32(6)
-#define M_LDT_CMD_WAITCYCCTRL _SB_MAKEMASK1_32(7)
-#define M_LDT_CMD_SERR_EN _SB_MAKEMASK1_32(8)
-#define M_LDT_CMD_FASTB2B_EN _SB_MAKEMASK1_32(9)
-
-/*
- * LDT class and revision registers
- */
-
-#define S_LDT_CLASSREV_REV 0
-#define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV)
-#define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV)
-#define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV)
-
-#define S_LDT_CLASSREV_CLASS 8
-#define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS)
-#define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS)
-#define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS)
-
-#define K_LDT_REV 0x01
-#define K_LDT_CLASS 0x060000
-
-/*
- * Device Header (offset 0x0C)
- */
-
-#define S_LDT_DEVHDR_CLINESZ 0
-#define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ)
-#define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ)
-#define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ)
-
-#define S_LDT_DEVHDR_LATTMR 8
-#define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR)
-#define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR)
-#define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR)
-
-#define S_LDT_DEVHDR_HDRTYPE 16
-#define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE)
-#define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE)
-#define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE)
-
-#define K_LDT_DEVHDR_HDRTYPE_TYPE1 1
-
-#define S_LDT_DEVHDR_BIST 24
-#define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST)
-#define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST)
-#define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST)
-
-
-
-/*
- * LDT Status Register (Table 8-14). Note that these constants
- * assume you've read the command and status register
- * together (32-bit read at offset 0x04)
- *
- * These bits also apply to the secondary status
- * register (Table 8-15), offset 0x1C
- */
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_LDT_STATUS_VGAEN _SB_MAKEMASK1_32(3)
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define M_LDT_STATUS_CAPLIST _SB_MAKEMASK1_32(20)
-#define M_LDT_STATUS_66MHZCAP _SB_MAKEMASK1_32(21)
-#define M_LDT_STATUS_RESERVED2 _SB_MAKEMASK1_32(22)
-#define M_LDT_STATUS_FASTB2BCAP _SB_MAKEMASK1_32(23)
-#define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24)
-
-#define S_LDT_STATUS_DEVSELTIMING 25
-#define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING)
-#define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING)
-#define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING)
-
-#define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27)
-#define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28)
-#define M_LDT_STATUS_RCVDMSTRABORT _SB_MAKEMASK1_32(29)
-#define M_LDT_STATUS_SIGDSERR _SB_MAKEMASK1_32(30)
-#define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
-
-/*
- * Bridge Control Register (Table 8-16). Note that these
- * constants assume you've read the register as a 32-bit
- * read (offset 0x3C)
- */
-
-#define M_LDT_BRCTL_PARERRRESP_EN _SB_MAKEMASK1_32(16)
-#define M_LDT_BRCTL_SERR_EN _SB_MAKEMASK1_32(17)
-#define M_LDT_BRCTL_ISA_EN _SB_MAKEMASK1_32(18)
-#define M_LDT_BRCTL_VGA_EN _SB_MAKEMASK1_32(19)
-#define M_LDT_BRCTL_MSTRABORTMODE _SB_MAKEMASK1_32(21)
-#define M_LDT_BRCTL_SECBUSRESET _SB_MAKEMASK1_32(22)
-#define M_LDT_BRCTL_FASTB2B_EN _SB_MAKEMASK1_32(23)
-#define M_LDT_BRCTL_PRIDISCARD _SB_MAKEMASK1_32(24)
-#define M_LDT_BRCTL_SECDISCARD _SB_MAKEMASK1_32(25)
-#define M_LDT_BRCTL_DISCARDSTAT _SB_MAKEMASK1_32(26)
-#define M_LDT_BRCTL_DISCARDSERR_EN _SB_MAKEMASK1_32(27)
-
-/*
- * LDT Command Register (Table 8-17). Note that these constants
- * assume you've read the command and status register together
- * 32-bit read at offset 0x40
- */
-
-#define M_LDT_CMD_WARMRESET _SB_MAKEMASK1_32(16)
-#define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17)
-
-#define S_LDT_CMD_CAPTYPE 29
-#define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE)
-#define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE)
-#define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE)
-
-/*
- * LDT link control register (Table 8-18), and (Table 8-19)
- */
-
-#define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN _SB_MAKEMASK1_32(1)
-#define M_LDT_LINKCTRL_CRCSTARTTEST _SB_MAKEMASK1_32(2)
-#define M_LDT_LINKCTRL_CRCFORCEERR _SB_MAKEMASK1_32(3)
-#define M_LDT_LINKCTRL_LINKFAIL _SB_MAKEMASK1_32(4)
-#define M_LDT_LINKCTRL_INITDONE _SB_MAKEMASK1_32(5)
-#define M_LDT_LINKCTRL_EOC _SB_MAKEMASK1_32(6)
-#define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7)
-
-#define S_LDT_LINKCTRL_CRCERR 8
-#define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR)
-#define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR)
-#define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR)
-
-#define S_LDT_LINKCTRL_MAXIN 16
-#define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN)
-#define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN)
-#define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN)
-
-#define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19)
-
-#define S_LDT_LINKCTRL_MAXOUT 20
-#define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT)
-#define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT)
-#define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT)
-
-#define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23)
-
-#define S_LDT_LINKCTRL_WIDTHIN 24
-#define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN)
-#define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN)
-#define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN)
-
-#define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27)
-
-#define S_LDT_LINKCTRL_WIDTHOUT 28
-#define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT)
-#define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT)
-#define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT)
-
-#define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31)
-
-/*
- * LDT Link frequency register (Table 8-20) offset 0x48
- */
-
-#define S_LDT_LINKFREQ_FREQ 8
-#define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ)
-#define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ)
-#define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ)
-
-#define K_LDT_LINKFREQ_200MHZ 0
-#define K_LDT_LINKFREQ_300MHZ 1
-#define K_LDT_LINKFREQ_400MHZ 2
-#define K_LDT_LINKFREQ_500MHZ 3
-#define K_LDT_LINKFREQ_600MHZ 4
-#define K_LDT_LINKFREQ_800MHZ 5
-#define K_LDT_LINKFREQ_1000MHZ 6
-
-/*
- * LDT SRI Command Register (Table 8-21). Note that these constants
- * assume you've read the command and status register together
- * 32-bit read at offset 0x50
- */
-
-#define M_LDT_SRICMD_SIPREADY _SB_MAKEMASK1_32(16)
-#define M_LDT_SRICMD_SYNCPTRCTL _SB_MAKEMASK1_32(17)
-#define M_LDT_SRICMD_REDUCESYNCZERO _SB_MAKEMASK1_32(18)
-#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
-#define M_LDT_SRICMD_DISSTARVATIONCNT _SB_MAKEMASK1_32(19) /* PASS1 */
-#endif /* up to 1250 PASS1 */
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_LDT_SRICMD_DISMULTTXVLD _SB_MAKEMASK1_32(19)
-#define M_LDT_SRICMD_EXPENDIAN _SB_MAKEMASK1_32(26)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-#define S_LDT_SRICMD_RXMARGIN 20
-#define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN)
-#define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN)
-#define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN)
-
-#define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25)
-
-#define S_LDT_SRICMD_TXINITIALOFFSET 28
-#define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET)
-#define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET)
-#define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET)
-
-#define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31)
-
-/*
- * LDT Error control and status register (Table 8-22) (Table 8-23)
- */
-
-#define M_LDT_ERRCTL_PROTFATAL_EN _SB_MAKEMASK1_32(0)
-#define M_LDT_ERRCTL_PROTNONFATAL_EN _SB_MAKEMASK1_32(1)
-#define M_LDT_ERRCTL_PROTSYNCFLOOD_EN _SB_MAKEMASK1_32(2)
-#define M_LDT_ERRCTL_OVFFATAL_EN _SB_MAKEMASK1_32(3)
-#define M_LDT_ERRCTL_OVFNONFATAL_EN _SB_MAKEMASK1_32(4)
-#define M_LDT_ERRCTL_OVFSYNCFLOOD_EN _SB_MAKEMASK1_32(5)
-#define M_LDT_ERRCTL_EOCNXAFATAL_EN _SB_MAKEMASK1_32(6)
-#define M_LDT_ERRCTL_EOCNXANONFATAL_EN _SB_MAKEMASK1_32(7)
-#define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN _SB_MAKEMASK1_32(8)
-#define M_LDT_ERRCTL_CRCFATAL_EN _SB_MAKEMASK1_32(9)
-#define M_LDT_ERRCTL_CRCNONFATAL_EN _SB_MAKEMASK1_32(10)
-#define M_LDT_ERRCTL_SERRFATAL_EN _SB_MAKEMASK1_32(11)
-#define M_LDT_ERRCTL_SRCTAGFATAL_EN _SB_MAKEMASK1_32(12)
-#define M_LDT_ERRCTL_SRCTAGNONFATAL_EN _SB_MAKEMASK1_32(13)
-#define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN _SB_MAKEMASK1_32(14)
-#define M_LDT_ERRCTL_MAPNXAFATAL_EN _SB_MAKEMASK1_32(15)
-#define M_LDT_ERRCTL_MAPNXANONFATAL_EN _SB_MAKEMASK1_32(16)
-#define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN _SB_MAKEMASK1_32(17)
-
-#define M_LDT_ERRCTL_PROTOERR _SB_MAKEMASK1_32(24)
-#define M_LDT_ERRCTL_OVFERR _SB_MAKEMASK1_32(25)
-#define M_LDT_ERRCTL_EOCNXAERR _SB_MAKEMASK1_32(26)
-#define M_LDT_ERRCTL_SRCTAGERR _SB_MAKEMASK1_32(27)
-#define M_LDT_ERRCTL_MAPNXAERR _SB_MAKEMASK1_32(28)
-
-/*
- * SRI Control register (Table 8-24, 8-25) Offset 0x6C
- */
-
-#define S_LDT_SRICTRL_NEEDRESP 0
-#define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP)
-#define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP)
-#define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP)
-
-#define S_LDT_SRICTRL_NEEDNPREQ 2
-#define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ)
-#define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ)
-#define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ)
-
-#define S_LDT_SRICTRL_NEEDPREQ 4
-#define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ)
-#define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ)
-#define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ)
-
-#define S_LDT_SRICTRL_WANTRESP 8
-#define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP)
-#define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP)
-#define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP)
-
-#define S_LDT_SRICTRL_WANTNPREQ 10
-#define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ)
-#define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ)
-#define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ)
-
-#define S_LDT_SRICTRL_WANTPREQ 12
-#define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ)
-#define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ)
-#define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ)
-
-#define S_LDT_SRICTRL_BUFRELSPACE 16
-#define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE)
-#define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE)
-#define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE)
-
-/*
- * LDT SRI Transmit Buffer Count register (Table 8-26)
- */
-
-#define S_LDT_TXBUFCNT_PCMD 0
-#define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD)
-#define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD)
-#define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD)
-
-#define S_LDT_TXBUFCNT_PDATA 4
-#define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA)
-#define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA)
-#define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA)
-
-#define S_LDT_TXBUFCNT_NPCMD 8
-#define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD)
-#define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD)
-#define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD)
-
-#define S_LDT_TXBUFCNT_NPDATA 12
-#define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA)
-#define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA)
-#define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA)
-
-#define S_LDT_TXBUFCNT_RCMD 16
-#define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD)
-#define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD)
-#define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD)
-
-#define S_LDT_TXBUFCNT_RDATA 20
-#define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA)
-#define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA)
-#define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-/*
- * Additional Status Register
- */
-
-#define S_LDT_ADDSTATUS_TGTDONE 0
-#define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE)
-#define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE)
-#define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#endif
-
diff -Nru a/include/asm-mips64/sibyte/sb1250_mac.h b/include/asm-mips64/sibyte/sb1250_mac.h
--- a/include/asm-mips64/sibyte/sb1250_mac.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,643 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * MAC constants and macros File: sb1250_mac.h
- *
- * This module contains constants and macros for the SB1250's
- * ethernet controllers.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_MAC_H
-#define _SB1250_MAC_H
-
-#include "sb1250_defs.h"
-
-/* *********************************************************************
- * Ethernet MAC Registers
- ********************************************************************* */
-
-/*
- * MAC Configuration Register (Table 9-13)
- * Register: MAC_CFG_0
- * Register: MAC_CFG_1
- * Register: MAC_CFG_2
- */
-
-
-#define M_MAC_RESERVED0 _SB_MAKEMASK1(0)
-#define M_MAC_TX_HOLD_SOP_EN _SB_MAKEMASK1(1)
-#define M_MAC_RETRY_EN _SB_MAKEMASK1(2)
-#define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3)
-#define M_MAC_RET_UFL_EN _SB_MAKEMASK1(4)
-#define M_MAC_BURST_EN _SB_MAKEMASK1(5)
-
-#define S_MAC_TX_PAUSE _SB_MAKE64(6)
-#define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3,S_MAC_TX_PAUSE)
-#define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x,S_MAC_TX_PAUSE)
-
-#define K_MAC_TX_PAUSE_CNT_512 0
-#define K_MAC_TX_PAUSE_CNT_1K 1
-#define K_MAC_TX_PAUSE_CNT_2K 2
-#define K_MAC_TX_PAUSE_CNT_4K 3
-#define K_MAC_TX_PAUSE_CNT_8K 4
-#define K_MAC_TX_PAUSE_CNT_16K 5
-#define K_MAC_TX_PAUSE_CNT_32K 6
-#define K_MAC_TX_PAUSE_CNT_64K 7
-
-#define V_MAC_TX_PAUSE_CNT_512 V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_512)
-#define V_MAC_TX_PAUSE_CNT_1K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_1K)
-#define V_MAC_TX_PAUSE_CNT_2K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_2K)
-#define V_MAC_TX_PAUSE_CNT_4K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_4K)
-#define V_MAC_TX_PAUSE_CNT_8K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_8K)
-#define V_MAC_TX_PAUSE_CNT_16K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_16K)
-#define V_MAC_TX_PAUSE_CNT_32K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K)
-#define V_MAC_TX_PAUSE_CNT_64K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K)
-
-#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9)
-
-#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
-#define M_MAC_RESERVED2 _SB_MAKEMASK1(18)
-#define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19)
-#define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20)
-#define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21)
-#define M_MAC_DRP_DRBLERRPKT_EN _SB_MAKEMASK1(22)
-#define M_MAC_DRP_RNTPKT_EN _SB_MAKEMASK1(23)
-#define M_MAC_DRP_OSZPKT_EN _SB_MAKEMASK1(24)
-#define M_MAC_DRP_LENERRPKT_EN _SB_MAKEMASK1(25)
-
-#define M_MAC_RESERVED3 _SB_MAKEMASK(6,26)
-
-#define M_MAC_BYPASS_SEL _SB_MAKEMASK1(32)
-#define M_MAC_HDX_EN _SB_MAKEMASK1(33)
-
-#define S_MAC_SPEED_SEL _SB_MAKE64(34)
-#define M_MAC_SPEED_SEL _SB_MAKEMASK(2,S_MAC_SPEED_SEL)
-#define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x,S_MAC_SPEED_SEL)
-#define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x,S_MAC_SPEED_SEL,M_MAC_SPEED_SEL)
-
-#define K_MAC_SPEED_SEL_10MBPS 0
-#define K_MAC_SPEED_SEL_100MBPS 1
-#define K_MAC_SPEED_SEL_1000MBPS 2
-#define K_MAC_SPEED_SEL_RESERVED 3
-
-#define V_MAC_SPEED_SEL_10MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_10MBPS)
-#define V_MAC_SPEED_SEL_100MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_100MBPS)
-#define V_MAC_SPEED_SEL_1000MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_1000MBPS)
-#define V_MAC_SPEED_SEL_RESERVED V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_RESERVED)
-
-#define M_MAC_TX_CLK_EDGE_SEL _SB_MAKEMASK1(36)
-#define M_MAC_LOOPBACK_SEL _SB_MAKEMASK1(37)
-#define M_MAC_FAST_SYNC _SB_MAKEMASK1(38)
-#define M_MAC_SS_EN _SB_MAKEMASK1(39)
-
-#define S_MAC_BYPASS_CFG _SB_MAKE64(40)
-#define M_MAC_BYPASS_CFG _SB_MAKEMASK(2,S_MAC_BYPASS_CFG)
-#define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_CFG)
-#define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_CFG,M_MAC_BYPASS_CFG)
-
-#define K_MAC_BYPASS_GMII 0
-#define K_MAC_BYPASS_ENCODED 1
-#define K_MAC_BYPASS_SOP 2
-#define K_MAC_BYPASS_EOP 3
-
-#define M_MAC_BYPASS_16 _SB_MAKEMASK1(42)
-#define M_MAC_BYPASS_FCS_CHK _SB_MAKEMASK1(43)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45)
-#endif /* 112x PASS1 */
-
-#define S_MAC_BYPASS_IFG _SB_MAKE64(46)
-#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
-#define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_IFG)
-#define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_IFG,M_MAC_BYPASS_IFG)
-
-#define K_MAC_FC_CMD_DISABLED 0
-#define K_MAC_FC_CMD_ENABLED 1
-#define K_MAC_FC_CMD_ENAB_FALSECARR 2
-
-#define V_MAC_FC_CMD_DISABLED V_MAC_FC_CMD(K_MAC_FC_CMD_DISABLED)
-#define V_MAC_FC_CMD_ENABLED V_MAC_FC_CMD(K_MAC_FC_CMD_ENABLED)
-#define V_MAC_FC_CMD_ENAB_FALSECARR V_MAC_FC_CMD(K_MAC_FC_CMD_ENAB_FALSECARR)
-
-#define M_MAC_FC_SEL _SB_MAKEMASK1(54)
-
-#define S_MAC_FC_CMD _SB_MAKE64(55)
-#define M_MAC_FC_CMD _SB_MAKEMASK(2,S_MAC_FC_CMD)
-#define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x,S_MAC_FC_CMD)
-#define G_MAC_FC_CMD(x) _SB_GETVALUE(x,S_MAC_FC_CMD,M_MAC_FC_CMD)
-
-#define S_MAC_RX_CH_SEL _SB_MAKE64(57)
-#define M_MAC_RX_CH_SEL _SB_MAKEMASK(7,S_MAC_RX_CH_SEL)
-#define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_SEL)
-#define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_SEL,M_MAC_RX_CH_SEL)
-
-
-/*
- * MAC Enable Registers
- * Register: MAC_ENABLE_0
- * Register: MAC_ENABLE_1
- * Register: MAC_ENABLE_2
- */
-
-#define M_MAC_RXDMA_EN0 _SB_MAKEMASK1(0)
-#define M_MAC_RXDMA_EN1 _SB_MAKEMASK1(1)
-#define M_MAC_TXDMA_EN0 _SB_MAKEMASK1(4)
-#define M_MAC_TXDMA_EN1 _SB_MAKEMASK1(5)
-
-#define M_MAC_PORT_RESET _SB_MAKEMASK1(8)
-
-#define M_MAC_RX_ENABLE _SB_MAKEMASK1(10)
-#define M_MAC_TX_ENABLE _SB_MAKEMASK1(11)
-#define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12)
-#define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13)
-
-/*
- * MAC DMA Control Register
- * Register: MAC_TXD_CTL_0
- * Register: MAC_TXD_CTL_1
- * Register: MAC_TXD_CTL_2
- */
-
-#define S_MAC_TXD_WEIGHT0 _SB_MAKE64(0)
-#define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0)
-#define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT0)
-#define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT0,M_MAC_TXD_WEIGHT0)
-
-#define S_MAC_TXD_WEIGHT1 _SB_MAKE64(4)
-#define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1)
-#define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT1)
-#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT1,M_MAC_TXD_WEIGHT1)
-
-/*
- * MAC Fifo Threshhold registers (Table 9-14)
- * Register: MAC_THRSH_CFG_0
- * Register: MAC_THRSH_CFG_1
- * Register: MAC_THRSH_CFG_2
- */
-
-#define S_MAC_TX_WR_THRSH _SB_MAKE64(0)
-#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
-/* XXX: Can't enable, as it has the same name as a pass2+ define below. */
-/* #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(6,S_MAC_TX_WR_THRSH) */
-#endif /* up to 1250 PASS1 */
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_TX_WR_THRSH _SB_MAKEMASK(7,S_MAC_TX_WR_THRSH)
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_WR_THRSH)
-#define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_WR_THRSH,M_MAC_TX_WR_THRSH)
-
-#define S_MAC_TX_RD_THRSH _SB_MAKE64(8)
-#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
-/* XXX: Can't enable, as it has the same name as a pass2+ define below. */
-/* #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(6,S_MAC_TX_RD_THRSH) */
-#endif /* up to 1250 PASS1 */
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_TX_RD_THRSH _SB_MAKEMASK(7,S_MAC_TX_RD_THRSH)
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RD_THRSH)
-#define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RD_THRSH,M_MAC_TX_RD_THRSH)
-
-#define S_MAC_TX_RL_THRSH _SB_MAKE64(16)
-#define M_MAC_TX_RL_THRSH _SB_MAKEMASK(4,S_MAC_TX_RL_THRSH)
-#define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RL_THRSH)
-#define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RL_THRSH,M_MAC_TX_RL_THRSH)
-
-#define S_MAC_RX_PL_THRSH _SB_MAKE64(24)
-#define M_MAC_RX_PL_THRSH _SB_MAKEMASK(6,S_MAC_RX_PL_THRSH)
-#define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_PL_THRSH)
-#define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_PL_THRSH,M_MAC_RX_PL_THRSH)
-
-#define S_MAC_RX_RD_THRSH _SB_MAKE64(32)
-#define M_MAC_RX_RD_THRSH _SB_MAKEMASK(6,S_MAC_RX_RD_THRSH)
-#define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RD_THRSH)
-#define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RD_THRSH,M_MAC_RX_RD_THRSH)
-
-#define S_MAC_RX_RL_THRSH _SB_MAKE64(40)
-#define M_MAC_RX_RL_THRSH _SB_MAKEMASK(6,S_MAC_RX_RL_THRSH)
-#define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RL_THRSH)
-#define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RL_THRSH,M_MAC_RX_RL_THRSH)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define S_MAC_ENC_FC_THRSH _SB_MAKE64(56)
-#define M_MAC_ENC_FC_THRSH _SB_MAKEMASK(6,S_MAC_ENC_FC_THRSH)
-#define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x,S_MAC_ENC_FC_THRSH)
-#define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x,S_MAC_ENC_FC_THRSH,M_MAC_ENC_FC_THRSH)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/*
- * MAC Frame Configuration Registers (Table 9-15)
- * Register: MAC_FRAME_CFG_0
- * Register: MAC_FRAME_CFG_1
- * Register: MAC_FRAME_CFG_2
- */
-
-/* XXXCGD: ??? Unused in pass2? */
-#define S_MAC_IFG_RX _SB_MAKE64(0)
-#define M_MAC_IFG_RX _SB_MAKEMASK(6,S_MAC_IFG_RX)
-#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX)
-#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define S_MAC_PRE_LEN _SB_MAKE64(0)
-#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN)
-#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN)
-#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN)
-#endif /* 112x PASS1 */
-
-#define S_MAC_IFG_TX _SB_MAKE64(6)
-#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX)
-#define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x,S_MAC_IFG_TX)
-#define G_MAC_IFG_TX(x) _SB_GETVALUE(x,S_MAC_IFG_TX,M_MAC_IFG_TX)
-
-#define S_MAC_IFG_THRSH _SB_MAKE64(12)
-#define M_MAC_IFG_THRSH _SB_MAKEMASK(6,S_MAC_IFG_THRSH)
-#define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x,S_MAC_IFG_THRSH)
-#define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x,S_MAC_IFG_THRSH,M_MAC_IFG_THRSH)
-
-#define S_MAC_BACKOFF_SEL _SB_MAKE64(18)
-#define M_MAC_BACKOFF_SEL _SB_MAKEMASK(4,S_MAC_BACKOFF_SEL)
-#define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x,S_MAC_BACKOFF_SEL)
-#define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x,S_MAC_BACKOFF_SEL,M_MAC_BACKOFF_SEL)
-
-#define S_MAC_LFSR_SEED _SB_MAKE64(22)
-#define M_MAC_LFSR_SEED _SB_MAKEMASK(8,S_MAC_LFSR_SEED)
-#define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x,S_MAC_LFSR_SEED)
-#define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x,S_MAC_LFSR_SEED,M_MAC_LFSR_SEED)
-
-#define S_MAC_SLOT_SIZE _SB_MAKE64(30)
-#define M_MAC_SLOT_SIZE _SB_MAKEMASK(10,S_MAC_SLOT_SIZE)
-#define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x,S_MAC_SLOT_SIZE)
-#define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x,S_MAC_SLOT_SIZE,M_MAC_SLOT_SIZE)
-
-#define S_MAC_MIN_FRAMESZ _SB_MAKE64(40)
-#define M_MAC_MIN_FRAMESZ _SB_MAKEMASK(8,S_MAC_MIN_FRAMESZ)
-#define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MIN_FRAMESZ)
-#define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MIN_FRAMESZ,M_MAC_MIN_FRAMESZ)
-
-#define S_MAC_MAX_FRAMESZ _SB_MAKE64(48)
-#define M_MAC_MAX_FRAMESZ _SB_MAKEMASK(16,S_MAC_MAX_FRAMESZ)
-#define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MAX_FRAMESZ)
-#define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MAX_FRAMESZ,M_MAC_MAX_FRAMESZ)
-
-/*
- * These constants are used to configure the fields within the Frame
- * Configuration Register.
- */
-
-#define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */
-#define K_MAC_IFG_RX_100 _SB_MAKE64(0)
-#define K_MAC_IFG_RX_1000 _SB_MAKE64(0)
-
-#define K_MAC_IFG_TX_10 _SB_MAKE64(20)
-#define K_MAC_IFG_TX_100 _SB_MAKE64(20)
-#define K_MAC_IFG_TX_1000 _SB_MAKE64(8)
-
-#define K_MAC_IFG_THRSH_10 _SB_MAKE64(4)
-#define K_MAC_IFG_THRSH_100 _SB_MAKE64(4)
-#define K_MAC_IFG_THRSH_1000 _SB_MAKE64(0)
-
-#define K_MAC_SLOT_SIZE_10 _SB_MAKE64(0)
-#define K_MAC_SLOT_SIZE_100 _SB_MAKE64(0)
-#define K_MAC_SLOT_SIZE_1000 _SB_MAKE64(0)
-
-#define V_MAC_IFG_RX_10 V_MAC_IFG_RX(K_MAC_IFG_RX_10)
-#define V_MAC_IFG_RX_100 V_MAC_IFG_RX(K_MAC_IFG_RX_100)
-#define V_MAC_IFG_RX_1000 V_MAC_IFG_RX(K_MAC_IFG_RX_1000)
-
-#define V_MAC_IFG_TX_10 V_MAC_IFG_TX(K_MAC_IFG_TX_10)
-#define V_MAC_IFG_TX_100 V_MAC_IFG_TX(K_MAC_IFG_TX_100)
-#define V_MAC_IFG_TX_1000 V_MAC_IFG_TX(K_MAC_IFG_TX_1000)
-
-#define V_MAC_IFG_THRSH_10 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_10)
-#define V_MAC_IFG_THRSH_100 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_100)
-#define V_MAC_IFG_THRSH_1000 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_1000)
-
-#define V_MAC_SLOT_SIZE_10 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_10)
-#define V_MAC_SLOT_SIZE_100 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_100)
-#define V_MAC_SLOT_SIZE_1000 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_1000)
-
-#define K_MAC_MIN_FRAMESZ_FIFO _SB_MAKE64(9)
-#define K_MAC_MIN_FRAMESZ_DEFAULT _SB_MAKE64(64)
-#define K_MAC_MAX_FRAMESZ_DEFAULT _SB_MAKE64(1518)
-#define K_MAC_MAX_FRAMESZ_JUMBO _SB_MAKE64(9216)
-
-#define V_MAC_MIN_FRAMESZ_FIFO V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_FIFO)
-#define V_MAC_MIN_FRAMESZ_DEFAULT V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_DEFAULT)
-#define V_MAC_MAX_FRAMESZ_DEFAULT V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_DEFAULT)
-#define V_MAC_MAX_FRAMESZ_JUMBO V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_JUMBO)
-
-/*
- * MAC VLAN Tag Registers (Table 9-16)
- * Register: MAC_VLANTAG_0
- * Register: MAC_VLANTAG_1
- * Register: MAC_VLANTAG_2
- */
-
-#define S_MAC_VLAN_TAG _SB_MAKE64(0)
-#define M_MAC_VLAN_TAG _SB_MAKEMASK(32,S_MAC_VLAN_TAG)
-#define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x,S_MAC_VLAN_TAG)
-#define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32)
-#define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET)
-#define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET)
-#define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_PKT_OFFSET,M_MAC_TX_PKT_OFFSET)
-
-#define S_MAC_TX_CRC_OFFSET _SB_MAKE64(40)
-#define M_MAC_TX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_TX_CRC_OFFSET)
-#define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_CRC_OFFSET)
-#define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET)
-
-#define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48)
-#endif /* 112x PASS1 */
-
-/*
- * MAC Status Registers (Table 9-17)
- * Also used for the MAC Interrupt Mask Register (Table 9-18)
- * Register: MAC_STATUS_0
- * Register: MAC_STATUS_1
- * Register: MAC_STATUS_2
- * Register: MAC_INT_MASK_0
- * Register: MAC_INT_MASK_1
- * Register: MAC_INT_MASK_2
- */
-
-/*
- * Use these constants to shift the appropriate channel
- * into the CH0 position so the same tests can be used
- * on each channel.
- */
-
-#define S_MAC_RX_CH0 _SB_MAKE64(0)
-#define S_MAC_RX_CH1 _SB_MAKE64(8)
-#define S_MAC_TX_CH0 _SB_MAKE64(16)
-#define S_MAC_TX_CH1 _SB_MAKE64(24)
-
-#define S_MAC_TXCHANNELS _SB_MAKE64(16) /* this is 1st TX chan */
-#define S_MAC_CHANWIDTH _SB_MAKE64(8) /* bits between channels */
-
-/*
- * These are the same as RX channel 0. The idea here
- * is that you'll use one of the "S_" things above
- * and pass just the six bits to a DMA-channel-specific ISR
- */
-#define M_MAC_INT_CHANNEL _SB_MAKEMASK(8,0)
-#define M_MAC_INT_EOP_COUNT _SB_MAKEMASK1(0)
-#define M_MAC_INT_EOP_TIMER _SB_MAKEMASK1(1)
-#define M_MAC_INT_EOP_SEEN _SB_MAKEMASK1(2)
-#define M_MAC_INT_HWM _SB_MAKEMASK1(3)
-#define M_MAC_INT_LWM _SB_MAKEMASK1(4)
-#define M_MAC_INT_DSCR _SB_MAKEMASK1(5)
-#define M_MAC_INT_ERR _SB_MAKEMASK1(6)
-#define M_MAC_INT_DZERO _SB_MAKEMASK1(7) /* only for TX channels */
-#define M_MAC_INT_DROP _SB_MAKEMASK1(7) /* only for RX channels */
-
-/*
- * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see
- * also DMA_TX/DMA_RX in sb_regs.h).
- */
-#define S_MAC_STATUS_CH_OFFSET(ch,txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH)
-
-#define M_MAC_STATUS_CHANNEL(ch,txrx) _SB_MAKEVALUE(_SB_MAKEMASK(8,0),S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_EOP_COUNT(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_EOP_TIMER(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_EOP_SEEN(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_HWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_HWM,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_LWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_LWM,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_DSCR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DSCR,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_ERR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_ERR,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_DZERO(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DZERO,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_DROP(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DROP,S_MAC_STATUS_CH_OFFSET(ch,txrx))
-#define M_MAC_STATUS_OTHER_ERR _SB_MAKEVALUE(_SB_MAKEMASK(7,0),40)
-
-
-#define M_MAC_RX_UNDRFL _SB_MAKEMASK1(40)
-#define M_MAC_RX_OVRFL _SB_MAKEMASK1(41)
-#define M_MAC_TX_UNDRFL _SB_MAKEMASK1(42)
-#define M_MAC_TX_OVRFL _SB_MAKEMASK1(43)
-#define M_MAC_LTCOL_ERR _SB_MAKEMASK1(44)
-#define M_MAC_EXCOL_ERR _SB_MAKEMASK1(45)
-#define M_MAC_CNTR_OVRFL_ERR _SB_MAKEMASK1(46)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_SPLIT_EN _SB_MAKEMASK1(47) /* interrupt mask only */
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_MAC_COUNTER_ADDR _SB_MAKE64(47)
-#define M_MAC_COUNTER_ADDR _SB_MAKEMASK(5,S_MAC_COUNTER_ADDR)
-#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR)
-#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52)
-#endif /* 112x PASS1 */
-
-/*
- * MAC Fifo Pointer Registers (Table 9-19) [Debug register]
- * Register: MAC_FIFO_PTRS_0
- * Register: MAC_FIFO_PTRS_1
- * Register: MAC_FIFO_PTRS_2
- */
-
-#define S_MAC_TX_WRPTR _SB_MAKE64(0)
-#define M_MAC_TX_WRPTR _SB_MAKEMASK(6,S_MAC_TX_WRPTR)
-#define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_WRPTR)
-#define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x,S_MAC_TX_WRPTR,M_MAC_TX_WRPTR)
-
-#define S_MAC_TX_RDPTR _SB_MAKE64(8)
-#define M_MAC_TX_RDPTR _SB_MAKEMASK(6,S_MAC_TX_RDPTR)
-#define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_RDPTR)
-#define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x,S_MAC_TX_RDPTR,M_MAC_TX_RDPTR)
-
-#define S_MAC_RX_WRPTR _SB_MAKE64(16)
-#define M_MAC_RX_WRPTR _SB_MAKEMASK(6,S_MAC_RX_WRPTR)
-#define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_WRPTR)
-#define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x,S_MAC_RX_WRPTR,M_MAC_TX_WRPTR)
-
-#define S_MAC_RX_RDPTR _SB_MAKE64(24)
-#define M_MAC_RX_RDPTR _SB_MAKEMASK(6,S_MAC_RX_RDPTR)
-#define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_RDPTR)
-#define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x,S_MAC_RX_RDPTR,M_MAC_TX_RDPTR)
-
-/*
- * MAC Fifo End Of Packet Count Registers (Table 9-20) [Debug register]
- * Register: MAC_EOPCNT_0
- * Register: MAC_EOPCNT_1
- * Register: MAC_EOPCNT_2
- */
-
-#define S_MAC_TX_EOP_COUNTER _SB_MAKE64(0)
-#define M_MAC_TX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_TX_EOP_COUNTER)
-#define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_TX_EOP_COUNTER)
-#define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_TX_EOP_COUNTER,M_MAC_TX_EOP_COUNTER)
-
-#define S_MAC_RX_EOP_COUNTER _SB_MAKE64(8)
-#define M_MAC_RX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_RX_EOP_COUNTER)
-#define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_RX_EOP_COUNTER)
-#define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_RX_EOP_COUNTER,M_MAC_RX_EOP_COUNTER)
-
-/*
- * MAC Recieve Address Filter Exact Match Registers (Table 9-21)
- * Registers: MAC_ADDR0_0 through MAC_ADDR7_0
- * Registers: MAC_ADDR0_1 through MAC_ADDR7_1
- * Registers: MAC_ADDR0_2 through MAC_ADDR7_2
- */
-
-/* No bitfields */
-
-/*
- * MAC Receive Address Filter Mask Registers
- * Registers: MAC_ADDRMASK0_0 and MAC_ADDRMASK0_1
- * Registers: MAC_ADDRMASK1_0 and MAC_ADDRMASK1_1
- * Registers: MAC_ADDRMASK2_0 and MAC_ADDRMASK2_1
- */
-
-/* No bitfields */
-
-/*
- * MAC Recieve Address Filter Hash Match Registers (Table 9-22)
- * Registers: MAC_HASH0_0 through MAC_HASH7_0
- * Registers: MAC_HASH0_1 through MAC_HASH7_1
- * Registers: MAC_HASH0_2 through MAC_HASH7_2
- */
-
-/* No bitfields */
-
-/*
- * MAC Transmit Source Address Registers (Table 9-23)
- * Register: MAC_ETHERNET_ADDR_0
- * Register: MAC_ETHERNET_ADDR_1
- * Register: MAC_ETHERNET_ADDR_2
- */
-
-/* No bitfields */
-
-/*
- * MAC Packet Type Configuration Register
- * Register: MAC_TYPE_CFG_0
- * Register: MAC_TYPE_CFG_1
- * Register: MAC_TYPE_CFG_2
- */
-
-#define S_TYPECFG_TYPESIZE _SB_MAKE64(16)
-
-#define S_TYPECFG_TYPE0 _SB_MAKE64(0)
-#define M_TYPECFG_TYPE0 _SB_MAKEMASK(16,S_TYPECFG_TYPE0)
-#define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE0)
-#define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x,S_TYPECFG_TYPE0,M_TYPECFG_TYPE0)
-
-#define S_TYPECFG_TYPE1 _SB_MAKE64(0)
-#define M_TYPECFG_TYPE1 _SB_MAKEMASK(16,S_TYPECFG_TYPE1)
-#define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE1)
-#define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x,S_TYPECFG_TYPE1,M_TYPECFG_TYPE1)
-
-#define S_TYPECFG_TYPE2 _SB_MAKE64(0)
-#define M_TYPECFG_TYPE2 _SB_MAKEMASK(16,S_TYPECFG_TYPE2)
-#define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE2)
-#define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x,S_TYPECFG_TYPE2,M_TYPECFG_TYPE2)
-
-#define S_TYPECFG_TYPE3 _SB_MAKE64(0)
-#define M_TYPECFG_TYPE3 _SB_MAKEMASK(16,S_TYPECFG_TYPE3)
-#define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE3)
-#define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x,S_TYPECFG_TYPE3,M_TYPECFG_TYPE3)
-
-/*
- * MAC Receive Address Filter Control Registers (Table 9-24)
- * Register: MAC_ADFILTER_CFG_0
- * Register: MAC_ADFILTER_CFG_1
- * Register: MAC_ADFILTER_CFG_2
- */
-
-#define M_MAC_ALLPKT_EN _SB_MAKEMASK1(0)
-#define M_MAC_UCAST_EN _SB_MAKEMASK1(1)
-#define M_MAC_UCAST_INV _SB_MAKEMASK1(2)
-#define M_MAC_MCAST_EN _SB_MAKEMASK1(3)
-#define M_MAC_MCAST_INV _SB_MAKEMASK1(4)
-#define M_MAC_BCAST_EN _SB_MAKEMASK1(5)
-#define M_MAC_DIRECT_INV _SB_MAKEMASK1(6)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MAC_ALLMCAST_EN _SB_MAKEMASK1(7)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_MAC_IPHDR_OFFSET _SB_MAKE64(8)
-#define M_MAC_IPHDR_OFFSET _SB_MAKEMASK(8,S_MAC_IPHDR_OFFSET)
-#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET)
-#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16)
-#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET)
-#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET)
-#define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_CRC_OFFSET,M_MAC_RX_CRC_OFFSET)
-
-#define S_MAC_RX_PKT_OFFSET _SB_MAKE64(24)
-#define M_MAC_RX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_RX_PKT_OFFSET)
-#define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_PKT_OFFSET)
-#define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_PKT_OFFSET,M_MAC_RX_PKT_OFFSET)
-
-#define M_MAC_FWDPAUSE_EN _SB_MAKEMASK1(32)
-#define M_MAC_VLAN_DET_EN _SB_MAKEMASK1(33)
-
-#define S_MAC_RX_CH_MSN_SEL _SB_MAKE64(34)
-#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL)
-#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL)
-#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL)
-#endif /* 112x PASS1 */
-
-/*
- * MAC Receive Channel Select Registers (Table 9-25)
- */
-
-/* no bitfields */
-
-/*
- * MAC MII Management Interface Registers (Table 9-26)
- * Register: MAC_MDIO_0
- * Register: MAC_MDIO_1
- * Register: MAC_MDIO_2
- */
-
-#define S_MAC_MDC 0
-#define S_MAC_MDIO_DIR 1
-#define S_MAC_MDIO_OUT 2
-#define S_MAC_GENC 3
-#define S_MAC_MDIO_IN 4
-
-#define M_MAC_MDC _SB_MAKEMASK1(S_MAC_MDC)
-#define M_MAC_MDIO_DIR _SB_MAKEMASK1(S_MAC_MDIO_DIR)
-#define M_MAC_MDIO_DIR_INPUT _SB_MAKEMASK1(S_MAC_MDIO_DIR)
-#define M_MAC_MDIO_OUT _SB_MAKEMASK1(S_MAC_MDIO_OUT)
-#define M_MAC_GENC _SB_MAKEMASK1(S_MAC_GENC)
-#define M_MAC_MDIO_IN _SB_MAKEMASK1(S_MAC_MDIO_IN)
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_mc.h b/include/asm-mips64/sibyte/sb1250_mc.h
--- a/include/asm-mips64/sibyte/sb1250_mc.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,548 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * Memory Controller constants File: sb1250_mc.h
- *
- * This module contains constants and macros useful for
- * programming the memory controller.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_MC_H
-#define _SB1250_MC_H
-
-#include "sb1250_defs.h"
-
-/*
- * Memory Channel Config Register (table 6-14)
- */
-
-#define S_MC_RESERVED0 0
-#define M_MC_RESERVED0 _SB_MAKEMASK(8,S_MC_RESERVED0)
-
-#define S_MC_CHANNEL_SEL 8
-#define M_MC_CHANNEL_SEL _SB_MAKEMASK(8,S_MC_CHANNEL_SEL)
-#define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x,S_MC_CHANNEL_SEL)
-#define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x,S_MC_CHANNEL_SEL,M_MC_CHANNEL_SEL)
-
-#define S_MC_BANK0_MAP 16
-#define M_MC_BANK0_MAP _SB_MAKEMASK(4,S_MC_BANK0_MAP)
-#define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK0_MAP)
-#define G_MC_BANK0_MAP(x) _SB_GETVALUE(x,S_MC_BANK0_MAP,M_MC_BANK0_MAP)
-
-#define K_MC_BANK0_MAP_DEFAULT 0x00
-#define V_MC_BANK0_MAP_DEFAULT V_MC_BANK0_MAP(K_MC_BANK0_MAP_DEFAULT)
-
-#define S_MC_BANK1_MAP 20
-#define M_MC_BANK1_MAP _SB_MAKEMASK(4,S_MC_BANK1_MAP)
-#define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK1_MAP)
-#define G_MC_BANK1_MAP(x) _SB_GETVALUE(x,S_MC_BANK1_MAP,M_MC_BANK1_MAP)
-
-#define K_MC_BANK1_MAP_DEFAULT 0x08
-#define V_MC_BANK1_MAP_DEFAULT V_MC_BANK1_MAP(K_MC_BANK1_MAP_DEFAULT)
-
-#define S_MC_BANK2_MAP 24
-#define M_MC_BANK2_MAP _SB_MAKEMASK(4,S_MC_BANK2_MAP)
-#define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK2_MAP)
-#define G_MC_BANK2_MAP(x) _SB_GETVALUE(x,S_MC_BANK2_MAP,M_MC_BANK2_MAP)
-
-#define K_MC_BANK2_MAP_DEFAULT 0x09
-#define V_MC_BANK2_MAP_DEFAULT V_MC_BANK2_MAP(K_MC_BANK2_MAP_DEFAULT)
-
-#define S_MC_BANK3_MAP 28
-#define M_MC_BANK3_MAP _SB_MAKEMASK(4,S_MC_BANK3_MAP)
-#define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK3_MAP)
-#define G_MC_BANK3_MAP(x) _SB_GETVALUE(x,S_MC_BANK3_MAP,M_MC_BANK3_MAP)
-
-#define K_MC_BANK3_MAP_DEFAULT 0x0C
-#define V_MC_BANK3_MAP_DEFAULT V_MC_BANK3_MAP(K_MC_BANK3_MAP_DEFAULT)
-
-#define M_MC_RESERVED1 _SB_MAKEMASK(8,32)
-
-#define S_MC_QUEUE_SIZE 40
-#define M_MC_QUEUE_SIZE _SB_MAKEMASK(4,S_MC_QUEUE_SIZE)
-#define V_MC_QUEUE_SIZE(x) _SB_MAKEVALUE(x,S_MC_QUEUE_SIZE)
-#define G_MC_QUEUE_SIZE(x) _SB_GETVALUE(x,S_MC_QUEUE_SIZE,M_MC_QUEUE_SIZE)
-#define V_MC_QUEUE_SIZE_DEFAULT V_MC_QUEUE_SIZE(0x0A)
-
-#define S_MC_AGE_LIMIT 44
-#define M_MC_AGE_LIMIT _SB_MAKEMASK(4,S_MC_AGE_LIMIT)
-#define V_MC_AGE_LIMIT(x) _SB_MAKEVALUE(x,S_MC_AGE_LIMIT)
-#define G_MC_AGE_LIMIT(x) _SB_GETVALUE(x,S_MC_AGE_LIMIT,M_MC_AGE_LIMIT)
-#define V_MC_AGE_LIMIT_DEFAULT V_MC_AGE_LIMIT(8)
-
-#define S_MC_WR_LIMIT 48
-#define M_MC_WR_LIMIT _SB_MAKEMASK(4,S_MC_WR_LIMIT)
-#define V_MC_WR_LIMIT(x) _SB_MAKEVALUE(x,S_MC_WR_LIMIT)
-#define G_MC_WR_LIMIT(x) _SB_GETVALUE(x,S_MC_WR_LIMIT,M_MC_WR_LIMIT)
-#define V_MC_WR_LIMIT_DEFAULT V_MC_WR_LIMIT(5)
-
-#define M_MC_IOB1HIGHPRIORITY _SB_MAKEMASK1(52)
-
-#define M_MC_RESERVED2 _SB_MAKEMASK(3,53)
-
-#define S_MC_CS_MODE 56
-#define M_MC_CS_MODE _SB_MAKEMASK(4,S_MC_CS_MODE)
-#define V_MC_CS_MODE(x) _SB_MAKEVALUE(x,S_MC_CS_MODE)
-#define G_MC_CS_MODE(x) _SB_GETVALUE(x,S_MC_CS_MODE,M_MC_CS_MODE)
-
-#define K_MC_CS_MODE_MSB_CS 0
-#define K_MC_CS_MODE_INTLV_CS 15
-#define K_MC_CS_MODE_MIXED_CS_10 12
-#define K_MC_CS_MODE_MIXED_CS_30 6
-#define K_MC_CS_MODE_MIXED_CS_32 3
-
-#define V_MC_CS_MODE_MSB_CS V_MC_CS_MODE(K_MC_CS_MODE_MSB_CS)
-#define V_MC_CS_MODE_INTLV_CS V_MC_CS_MODE(K_MC_CS_MODE_INTLV_CS)
-#define V_MC_CS_MODE_MIXED_CS_10 V_MC_CS_MODE(K_MC_CS_MODE_MIXED_CS_10)
-#define V_MC_CS_MODE_MIXED_CS_30 V_MC_CS_MODE(K_MC_CS_MODE_MIXED_CS_30)
-#define V_MC_CS_MODE_MIXED_CS_32 V_MC_CS_MODE(K_MC_CS_MODE_MIXED_CS_32)
-
-#define M_MC_ECC_DISABLE _SB_MAKEMASK1(60)
-#define M_MC_BERR_DISABLE _SB_MAKEMASK1(61)
-#define M_MC_FORCE_SEQ _SB_MAKEMASK1(62)
-#define M_MC_DEBUG _SB_MAKEMASK1(63)
-
-#define V_MC_CONFIG_DEFAULT V_MC_WR_LIMIT_DEFAULT | V_MC_AGE_LIMIT_DEFAULT | \
- V_MC_BANK0_MAP_DEFAULT | V_MC_BANK1_MAP_DEFAULT | \
- V_MC_BANK2_MAP_DEFAULT | V_MC_BANK3_MAP_DEFAULT | V_MC_CHANNEL_SEL(0) | \
- M_MC_IOB1HIGHPRIORITY | V_MC_QUEUE_SIZE_DEFAULT
-
-
-/*
- * Memory clock config register (Table 6-15)
- *
- * Note: this field has been updated to be consistent with the errata to 0.2
- */
-
-#define S_MC_CLK_RATIO 0
-#define M_MC_CLK_RATIO _SB_MAKEMASK(4,S_MC_CLK_RATIO)
-#define V_MC_CLK_RATIO(x) _SB_MAKEVALUE(x,S_MC_CLK_RATIO)
-#define G_MC_CLK_RATIO(x) _SB_GETVALUE(x,S_MC_CLK_RATIO,M_MC_CLK_RATIO)
-
-#define K_MC_CLK_RATIO_2X 4
-#define K_MC_CLK_RATIO_25X 5
-#define K_MC_CLK_RATIO_3X 6
-#define K_MC_CLK_RATIO_35X 7
-#define K_MC_CLK_RATIO_4X 8
-#define K_MC_CLK_RATIO_45X 9
-
-#define V_MC_CLK_RATIO_2X V_MC_CLK_RATIO(K_MC_CLK_RATIO_2X)
-#define V_MC_CLK_RATIO_25X V_MC_CLK_RATIO(K_MC_CLK_RATIO_25X)
-#define V_MC_CLK_RATIO_3X V_MC_CLK_RATIO(K_MC_CLK_RATIO_3X)
-#define V_MC_CLK_RATIO_35X V_MC_CLK_RATIO(K_MC_CLK_RATIO_35X)
-#define V_MC_CLK_RATIO_4X V_MC_CLK_RATIO(K_MC_CLK_RATIO_4X)
-#define V_MC_CLK_RATIO_45X V_MC_CLK_RATIO(K_MC_CLK_RATIO_45X)
-#define V_MC_CLK_RATIO_DEFAULT V_MC_CLK_RATIO_25X
-
-#define S_MC_REF_RATE 8
-#define M_MC_REF_RATE _SB_MAKEMASK(8,S_MC_REF_RATE)
-#define V_MC_REF_RATE(x) _SB_MAKEVALUE(x,S_MC_REF_RATE)
-#define G_MC_REF_RATE(x) _SB_GETVALUE(x,S_MC_REF_RATE,M_MC_REF_RATE)
-
-#define K_MC_REF_RATE_100MHz 0x62
-#define K_MC_REF_RATE_133MHz 0x81
-#define K_MC_REF_RATE_200MHz 0xC4
-
-#define V_MC_REF_RATE_100MHz V_MC_REF_RATE(K_MC_REF_RATE_100MHz)
-#define V_MC_REF_RATE_133MHz V_MC_REF_RATE(K_MC_REF_RATE_133MHz)
-#define V_MC_REF_RATE_200MHz V_MC_REF_RATE(K_MC_REF_RATE_200MHz)
-#define V_MC_REF_RATE_DEFAULT V_MC_REF_RATE_100MHz
-
-#define S_MC_CLOCK_DRIVE 16
-#define M_MC_CLOCK_DRIVE _SB_MAKEMASK(4,S_MC_CLOCK_DRIVE)
-#define V_MC_CLOCK_DRIVE(x) _SB_MAKEVALUE(x,S_MC_CLOCK_DRIVE)
-#define G_MC_CLOCK_DRIVE(x) _SB_GETVALUE(x,S_MC_CLOCK_DRIVE,M_MC_CLOCK_DRIVE)
-#define V_MC_CLOCK_DRIVE_DEFAULT V_MC_CLOCK_DRIVE(0xF)
-
-#define S_MC_DATA_DRIVE 20
-#define M_MC_DATA_DRIVE _SB_MAKEMASK(4,S_MC_DATA_DRIVE)
-#define V_MC_DATA_DRIVE(x) _SB_MAKEVALUE(x,S_MC_DATA_DRIVE)
-#define G_MC_DATA_DRIVE(x) _SB_GETVALUE(x,S_MC_DATA_DRIVE,M_MC_DATA_DRIVE)
-#define V_MC_DATA_DRIVE_DEFAULT V_MC_DATA_DRIVE(0x0)
-
-#define S_MC_ADDR_DRIVE 24
-#define M_MC_ADDR_DRIVE _SB_MAKEMASK(4,S_MC_ADDR_DRIVE)
-#define V_MC_ADDR_DRIVE(x) _SB_MAKEVALUE(x,S_MC_ADDR_DRIVE)
-#define G_MC_ADDR_DRIVE(x) _SB_GETVALUE(x,S_MC_ADDR_DRIVE,M_MC_ADDR_DRIVE)
-#define V_MC_ADDR_DRIVE_DEFAULT V_MC_ADDR_DRIVE(0x0)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MC_REF_DISABLE _SB_MAKEMASK1(30)
-#endif /* 112x PASS1 */
-
-#define M_MC_DLL_BYPASS _SB_MAKEMASK1(31)
-
-#define S_MC_DQI_SKEW 32
-#define M_MC_DQI_SKEW _SB_MAKEMASK(8,S_MC_DQI_SKEW)
-#define V_MC_DQI_SKEW(x) _SB_MAKEVALUE(x,S_MC_DQI_SKEW)
-#define G_MC_DQI_SKEW(x) _SB_GETVALUE(x,S_MC_DQI_SKEW,M_MC_DQI_SKEW)
-#define V_MC_DQI_SKEW_DEFAULT V_MC_DQI_SKEW(0)
-
-#define S_MC_DQO_SKEW 40
-#define M_MC_DQO_SKEW _SB_MAKEMASK(8,S_MC_DQO_SKEW)
-#define V_MC_DQO_SKEW(x) _SB_MAKEVALUE(x,S_MC_DQO_SKEW)
-#define G_MC_DQO_SKEW(x) _SB_GETVALUE(x,S_MC_DQO_SKEW,M_MC_DQO_SKEW)
-#define V_MC_DQO_SKEW_DEFAULT V_MC_DQO_SKEW(0)
-
-#define S_MC_ADDR_SKEW 48
-#define M_MC_ADDR_SKEW _SB_MAKEMASK(8,S_MC_ADDR_SKEW)
-#define V_MC_ADDR_SKEW(x) _SB_MAKEVALUE(x,S_MC_ADDR_SKEW)
-#define G_MC_ADDR_SKEW(x) _SB_GETVALUE(x,S_MC_ADDR_SKEW,M_MC_ADDR_SKEW)
-#define V_MC_ADDR_SKEW_DEFAULT V_MC_ADDR_SKEW(0x0F)
-
-#define S_MC_DLL_DEFAULT 56
-#define M_MC_DLL_DEFAULT _SB_MAKEMASK(8,S_MC_DLL_DEFAULT)
-#define V_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x,S_MC_DLL_DEFAULT)
-#define G_MC_DLL_DEFAULT(x) _SB_GETVALUE(x,S_MC_DLL_DEFAULT,M_MC_DLL_DEFAULT)
-#define V_MC_DLL_DEFAULT_DEFAULT V_MC_DLL_DEFAULT(0x10)
-
-#define V_MC_CLKCONFIG_DEFAULT V_MC_DLL_DEFAULT_DEFAULT | \
- V_MC_ADDR_SKEW_DEFAULT | \
- V_MC_DQO_SKEW_DEFAULT | \
- V_MC_DQI_SKEW_DEFAULT | \
- V_MC_ADDR_DRIVE_DEFAULT | \
- V_MC_DATA_DRIVE_DEFAULT | \
- V_MC_CLOCK_DRIVE_DEFAULT | \
- V_MC_REF_RATE_DEFAULT
-
-
-
-/*
- * DRAM Command Register (Table 6-13)
- */
-
-#define S_MC_COMMAND 0
-#define M_MC_COMMAND _SB_MAKEMASK(4,S_MC_COMMAND)
-#define V_MC_COMMAND(x) _SB_MAKEVALUE(x,S_MC_COMMAND)
-#define G_MC_COMMAND(x) _SB_GETVALUE(x,S_MC_COMMAND,M_MC_COMMAND)
-
-#define K_MC_COMMAND_EMRS 0
-#define K_MC_COMMAND_MRS 1
-#define K_MC_COMMAND_PRE 2
-#define K_MC_COMMAND_AR 3
-#define K_MC_COMMAND_SETRFSH 4
-#define K_MC_COMMAND_CLRRFSH 5
-#define K_MC_COMMAND_SETPWRDN 6
-#define K_MC_COMMAND_CLRPWRDN 7
-
-#define V_MC_COMMAND_EMRS V_MC_COMMAND(K_MC_COMMAND_EMRS)
-#define V_MC_COMMAND_MRS V_MC_COMMAND(K_MC_COMMAND_MRS)
-#define V_MC_COMMAND_PRE V_MC_COMMAND(K_MC_COMMAND_PRE)
-#define V_MC_COMMAND_AR V_MC_COMMAND(K_MC_COMMAND_AR)
-#define V_MC_COMMAND_SETRFSH V_MC_COMMAND(K_MC_COMMAND_SETRFSH)
-#define V_MC_COMMAND_CLRRFSH V_MC_COMMAND(K_MC_COMMAND_CLRRFSH)
-#define V_MC_COMMAND_SETPWRDN V_MC_COMMAND(K_MC_COMMAND_SETPWRDN)
-#define V_MC_COMMAND_CLRPWRDN V_MC_COMMAND(K_MC_COMMAND_CLRPWRDN)
-
-#define M_MC_CS0 _SB_MAKEMASK1(4)
-#define M_MC_CS1 _SB_MAKEMASK1(5)
-#define M_MC_CS2 _SB_MAKEMASK1(6)
-#define M_MC_CS3 _SB_MAKEMASK1(7)
-
-/*
- * DRAM Mode Register (Table 6-14)
- */
-
-#define S_MC_EMODE 0
-#define M_MC_EMODE _SB_MAKEMASK(15,S_MC_EMODE)
-#define V_MC_EMODE(x) _SB_MAKEVALUE(x,S_MC_EMODE)
-#define G_MC_EMODE(x) _SB_GETVALUE(x,S_MC_EMODE,M_MC_EMODE)
-#define V_MC_EMODE_DEFAULT V_MC_EMODE(0)
-
-#define S_MC_MODE 16
-#define M_MC_MODE _SB_MAKEMASK(15,S_MC_MODE)
-#define V_MC_MODE(x) _SB_MAKEVALUE(x,S_MC_MODE)
-#define G_MC_MODE(x) _SB_GETVALUE(x,S_MC_MODE,M_MC_MODE)
-#define V_MC_MODE_DEFAULT V_MC_MODE(0x22)
-
-#define S_MC_DRAM_TYPE 32
-#define M_MC_DRAM_TYPE _SB_MAKEMASK(3,S_MC_DRAM_TYPE)
-#define V_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x,S_MC_DRAM_TYPE)
-#define G_MC_DRAM_TYPE(x) _SB_GETVALUE(x,S_MC_DRAM_TYPE,M_MC_DRAM_TYPE)
-
-#define K_MC_DRAM_TYPE_JEDEC 0
-#define K_MC_DRAM_TYPE_FCRAM 1
-#define K_MC_DRAM_TYPE_SGRAM 2
-
-#define V_MC_DRAM_TYPE_JEDEC V_MC_DRAM_TYPE(K_MC_DRAM_TYPE_JEDEC)
-#define V_MC_DRAM_TYPE_FCRAM V_MC_DRAM_TYPE(K_MC_DRAM_TYPE_FCRAM)
-#define V_MC_DRAM_TYPE_SGRAM V_MC_DRAM_TYPE(K_MC_DRAM_TYPE_SGRAM)
-
-#define M_MC_EXTERNALDECODE _SB_MAKEMASK1(35)
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_MC_PRE_ON_A8 _SB_MAKEMASK1(36)
-#define M_MC_RAM_WITH_A13 _SB_MAKEMASK1(38)
-#endif /* 112x PASS1 */
-
-
-
-/*
- * SDRAM Timing Register (Table 6-15)
- */
-
-#define M_MC_w2rIDLE_TWOCYCLES _SB_MAKEMASK1(60)
-#define M_MC_r2wIDLE_TWOCYCLES _SB_MAKEMASK1(61)
-#define M_MC_r2rIDLE_TWOCYCLES _SB_MAKEMASK1(62)
-
-#define S_MC_tFIFO 56
-#define M_MC_tFIFO _SB_MAKEMASK(4,S_MC_tFIFO)
-#define V_MC_tFIFO(x) _SB_MAKEVALUE(x,S_MC_tFIFO)
-#define G_MC_tFIFO(x) _SB_GETVALUE(x,S_MC_tFIFO,M_MC_tFIFO)
-#define K_MC_tFIFO_DEFAULT 1
-#define V_MC_tFIFO_DEFAULT V_MC_tFIFO(K_MC_tFIFO_DEFAULT)
-
-#define S_MC_tRFC 52
-#define M_MC_tRFC _SB_MAKEMASK(4,S_MC_tRFC)
-#define V_MC_tRFC(x) _SB_MAKEVALUE(x,S_MC_tRFC)
-#define G_MC_tRFC(x) _SB_GETVALUE(x,S_MC_tRFC,M_MC_tRFC)
-#define K_MC_tRFC_DEFAULT 12
-#define V_MC_tRFC_DEFAULT V_MC_tRFC(K_MC_tRFC_DEFAULT)
-
-#define S_MC_tCwCr 40
-#define M_MC_tCwCr _SB_MAKEMASK(4,S_MC_tCwCr)
-#define V_MC_tCwCr(x) _SB_MAKEVALUE(x,S_MC_tCwCr)
-#define G_MC_tCwCr(x) _SB_GETVALUE(x,S_MC_tCwCr,M_MC_tCwCr)
-#define K_MC_tCwCr_DEFAULT 4
-#define V_MC_tCwCr_DEFAULT V_MC_tCwCr(K_MC_tCwCr_DEFAULT)
-
-#define S_MC_tRCr 28
-#define M_MC_tRCr _SB_MAKEMASK(4,S_MC_tRCr)
-#define V_MC_tRCr(x) _SB_MAKEVALUE(x,S_MC_tRCr)
-#define G_MC_tRCr(x) _SB_GETVALUE(x,S_MC_tRCr,M_MC_tRCr)
-#define K_MC_tRCr_DEFAULT 9
-#define V_MC_tRCr_DEFAULT V_MC_tRCr(K_MC_tRCr_DEFAULT)
-
-#define S_MC_tRCw 24
-#define M_MC_tRCw _SB_MAKEMASK(4,S_MC_tRCw)
-#define V_MC_tRCw(x) _SB_MAKEVALUE(x,S_MC_tRCw)
-#define G_MC_tRCw(x) _SB_GETVALUE(x,S_MC_tRCw,M_MC_tRCw)
-#define K_MC_tRCw_DEFAULT 10
-#define V_MC_tRCw_DEFAULT V_MC_tRCw(K_MC_tRCw_DEFAULT)
-
-#define S_MC_tRRD 20
-#define M_MC_tRRD _SB_MAKEMASK(4,S_MC_tRRD)
-#define V_MC_tRRD(x) _SB_MAKEVALUE(x,S_MC_tRRD)
-#define G_MC_tRRD(x) _SB_GETVALUE(x,S_MC_tRRD,M_MC_tRRD)
-#define K_MC_tRRD_DEFAULT 2
-#define V_MC_tRRD_DEFAULT V_MC_tRRD(K_MC_tRRD_DEFAULT)
-
-#define S_MC_tRP 16
-#define M_MC_tRP _SB_MAKEMASK(4,S_MC_tRP)
-#define V_MC_tRP(x) _SB_MAKEVALUE(x,S_MC_tRP)
-#define G_MC_tRP(x) _SB_GETVALUE(x,S_MC_tRP,M_MC_tRP)
-#define K_MC_tRP_DEFAULT 4
-#define V_MC_tRP_DEFAULT V_MC_tRP(K_MC_tRP_DEFAULT)
-
-#define S_MC_tCwD 8
-#define M_MC_tCwD _SB_MAKEMASK(4,S_MC_tCwD)
-#define V_MC_tCwD(x) _SB_MAKEVALUE(x,S_MC_tCwD)
-#define G_MC_tCwD(x) _SB_GETVALUE(x,S_MC_tCwD,M_MC_tCwD)
-#define K_MC_tCwD_DEFAULT 1
-#define V_MC_tCwD_DEFAULT V_MC_tCwD(K_MC_tCwD_DEFAULT)
-
-#define M_tCrDh _SB_MAKEMASK1(7)
-#define M_MC_tCrDh M_tCrDh
-
-#define S_MC_tCrD 4
-#define M_MC_tCrD _SB_MAKEMASK(3,S_MC_tCrD)
-#define V_MC_tCrD(x) _SB_MAKEVALUE(x,S_MC_tCrD)
-#define G_MC_tCrD(x) _SB_GETVALUE(x,S_MC_tCrD,M_MC_tCrD)
-#define K_MC_tCrD_DEFAULT 2
-#define V_MC_tCrD_DEFAULT V_MC_tCrD(K_MC_tCrD_DEFAULT)
-
-#define S_MC_tRCD 0
-#define M_MC_tRCD _SB_MAKEMASK(4,S_MC_tRCD)
-#define V_MC_tRCD(x) _SB_MAKEVALUE(x,S_MC_tRCD)
-#define G_MC_tRCD(x) _SB_GETVALUE(x,S_MC_tRCD,M_MC_tRCD)
-#define K_MC_tRCD_DEFAULT 3
-#define V_MC_tRCD_DEFAULT V_MC_tRCD(K_MC_tRCD_DEFAULT)
-
-#define V_MC_TIMING_DEFAULT V_MC_tFIFO(K_MC_tFIFO_DEFAULT) | \
- V_MC_tRFC(K_MC_tRFC_DEFAULT) | \
- V_MC_tCwCr(K_MC_tCwCr_DEFAULT) | \
- V_MC_tRCr(K_MC_tRCr_DEFAULT) | \
- V_MC_tRCw(K_MC_tRCw_DEFAULT) | \
- V_MC_tRRD(K_MC_tRRD_DEFAULT) | \
- V_MC_tRP(K_MC_tRP_DEFAULT) | \
- V_MC_tCwD(K_MC_tCwD_DEFAULT) | \
- V_MC_tCrD(K_MC_tCrD_DEFAULT) | \
- V_MC_tRCD(K_MC_tRCD_DEFAULT) | \
- M_MC_r2rIDLE_TWOCYCLES
-
-/*
- * Errata says these are not the default
- * M_MC_w2rIDLE_TWOCYCLES | \
- * M_MC_r2wIDLE_TWOCYCLES | \
- */
-
-
-/*
- * Chip Select Start Address Register (Table 6-17)
- */
-
-#define S_MC_CS0_START 0
-#define M_MC_CS0_START _SB_MAKEMASK(16,S_MC_CS0_START)
-#define V_MC_CS0_START(x) _SB_MAKEVALUE(x,S_MC_CS0_START)
-#define G_MC_CS0_START(x) _SB_GETVALUE(x,S_MC_CS0_START,M_MC_CS0_START)
-
-#define S_MC_CS1_START 16
-#define M_MC_CS1_START _SB_MAKEMASK(16,S_MC_CS1_START)
-#define V_MC_CS1_START(x) _SB_MAKEVALUE(x,S_MC_CS1_START)
-#define G_MC_CS1_START(x) _SB_GETVALUE(x,S_MC_CS1_START,M_MC_CS1_START)
-
-#define S_MC_CS2_START 32
-#define M_MC_CS2_START _SB_MAKEMASK(16,S_MC_CS2_START)
-#define V_MC_CS2_START(x) _SB_MAKEVALUE(x,S_MC_CS2_START)
-#define G_MC_CS2_START(x) _SB_GETVALUE(x,S_MC_CS2_START,M_MC_CS2_START)
-
-#define S_MC_CS3_START 48
-#define M_MC_CS3_START _SB_MAKEMASK(16,S_MC_CS3_START)
-#define V_MC_CS3_START(x) _SB_MAKEVALUE(x,S_MC_CS3_START)
-#define G_MC_CS3_START(x) _SB_GETVALUE(x,S_MC_CS3_START,M_MC_CS3_START)
-
-/*
- * Chip Select End Address Register (Table 6-18)
- */
-
-#define S_MC_CS0_END 0
-#define M_MC_CS0_END _SB_MAKEMASK(16,S_MC_CS0_END)
-#define V_MC_CS0_END(x) _SB_MAKEVALUE(x,S_MC_CS0_END)
-#define G_MC_CS0_END(x) _SB_GETVALUE(x,S_MC_CS0_END,M_MC_CS0_END)
-
-#define S_MC_CS1_END 16
-#define M_MC_CS1_END _SB_MAKEMASK(16,S_MC_CS1_END)
-#define V_MC_CS1_END(x) _SB_MAKEVALUE(x,S_MC_CS1_END)
-#define G_MC_CS1_END(x) _SB_GETVALUE(x,S_MC_CS1_END,M_MC_CS1_END)
-
-#define S_MC_CS2_END 32
-#define M_MC_CS2_END _SB_MAKEMASK(16,S_MC_CS2_END)
-#define V_MC_CS2_END(x) _SB_MAKEVALUE(x,S_MC_CS2_END)
-#define G_MC_CS2_END(x) _SB_GETVALUE(x,S_MC_CS2_END,M_MC_CS2_END)
-
-#define S_MC_CS3_END 48
-#define M_MC_CS3_END _SB_MAKEMASK(16,S_MC_CS3_END)
-#define V_MC_CS3_END(x) _SB_MAKEVALUE(x,S_MC_CS3_END)
-#define G_MC_CS3_END(x) _SB_GETVALUE(x,S_MC_CS3_END,M_MC_CS3_END)
-
-/*
- * Chip Select Interleave Register (Table 6-19)
- */
-
-#define S_MC_INTLV_RESERVED 0
-#define M_MC_INTLV_RESERVED _SB_MAKEMASK(5,S_MC_INTLV_RESERVED)
-
-#define S_MC_INTERLEAVE 7
-#define M_MC_INTERLEAVE _SB_MAKEMASK(18,S_MC_INTERLEAVE)
-#define V_MC_INTERLEAVE(x) _SB_MAKEVALUE(x,S_MC_INTERLEAVE)
-
-#define S_MC_INTLV_MBZ 25
-#define M_MC_INTLV_MBZ _SB_MAKEMASK(39,S_MC_INTLV_MBZ)
-
-/*
- * Row Address Bits Register (Table 6-20)
- */
-
-#define S_MC_RAS_RESERVED 0
-#define M_MC_RAS_RESERVED _SB_MAKEMASK(5,S_MC_RAS_RESERVED)
-
-#define S_MC_RAS_SELECT 12
-#define M_MC_RAS_SELECT _SB_MAKEMASK(25,S_MC_RAS_SELECT)
-#define V_MC_RAS_SELECT(x) _SB_MAKEVALUE(x,S_MC_RAS_SELECT)
-
-#define S_MC_RAS_MBZ 37
-#define M_MC_RAS_MBZ _SB_MAKEMASK(27,S_MC_RAS_MBZ)
-
-
-/*
- * Column Address Bits Register (Table 6-21)
- */
-
-#define S_MC_CAS_RESERVED 0
-#define M_MC_CAS_RESERVED _SB_MAKEMASK(5,S_MC_CAS_RESERVED)
-
-#define S_MC_CAS_SELECT 5
-#define M_MC_CAS_SELECT _SB_MAKEMASK(18,S_MC_CAS_SELECT)
-#define V_MC_CAS_SELECT(x) _SB_MAKEVALUE(x,S_MC_CAS_SELECT)
-
-#define S_MC_CAS_MBZ 23
-#define M_MC_CAS_MBZ _SB_MAKEMASK(41,S_MC_CAS_MBZ)
-
-
-/*
- * Bank Address Address Bits Register (Table 6-22)
- */
-
-#define S_MC_BA_RESERVED 0
-#define M_MC_BA_RESERVED _SB_MAKEMASK(5,S_MC_BA_RESERVED)
-
-#define S_MC_BA_SELECT 5
-#define M_MC_BA_SELECT _SB_MAKEMASK(20,S_MC_BA_SELECT)
-#define V_MC_BA_SELECT(x) _SB_MAKEVALUE(x,S_MC_BA_SELECT)
-
-#define S_MC_BA_MBZ 25
-#define M_MC_BA_MBZ _SB_MAKEMASK(39,S_MC_BA_MBZ)
-
-/*
- * Chip Select Attribute Register (Table 6-23)
- */
-
-#define K_MC_CS_ATTR_CLOSED 0
-#define K_MC_CS_ATTR_CASCHECK 1
-#define K_MC_CS_ATTR_HINT 2
-#define K_MC_CS_ATTR_OPEN 3
-
-#define S_MC_CS0_PAGE 0
-#define M_MC_CS0_PAGE _SB_MAKEMASK(2,S_MC_CS0_PAGE)
-#define V_MC_CS0_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS0_PAGE)
-#define G_MC_CS0_PAGE(x) _SB_GETVALUE(x,S_MC_CS0_PAGE,M_MC_CS0_PAGE)
-
-#define S_MC_CS1_PAGE 16
-#define M_MC_CS1_PAGE _SB_MAKEMASK(2,S_MC_CS1_PAGE)
-#define V_MC_CS1_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS1_PAGE)
-#define G_MC_CS1_PAGE(x) _SB_GETVALUE(x,S_MC_CS1_PAGE,M_MC_CS1_PAGE)
-
-#define S_MC_CS2_PAGE 32
-#define M_MC_CS2_PAGE _SB_MAKEMASK(2,S_MC_CS2_PAGE)
-#define V_MC_CS2_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS2_PAGE)
-#define G_MC_CS2_PAGE(x) _SB_GETVALUE(x,S_MC_CS2_PAGE,M_MC_CS2_PAGE)
-
-#define S_MC_CS3_PAGE 48
-#define M_MC_CS3_PAGE _SB_MAKEMASK(2,S_MC_CS3_PAGE)
-#define V_MC_CS3_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS3_PAGE)
-#define G_MC_CS3_PAGE(x) _SB_GETVALUE(x,S_MC_CS3_PAGE,M_MC_CS3_PAGE)
-
-/*
- * ECC Test ECC Register (Table 6-25)
- */
-
-#define S_MC_ECC_INVERT 0
-#define M_MC_ECC_INVERT _SB_MAKEMASK(8,S_MC_ECC_INVERT)
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_regs.h b/include/asm-mips64/sibyte/sb1250_regs.h
--- a/include/asm-mips64/sibyte/sb1250_regs.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,835 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * Register Definitions File: sb1250_regs.h
- *
- * This module contains the addresses of the on-chip peripherals
- * on the SB1250.
- *
- * SB1250 specification level: 01/02/2002
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_REGS_H
-#define _SB1250_REGS_H
-
-#include "sb1250_defs.h"
-
-
-/* *********************************************************************
- * Some general notes:
- *
- * For the most part, when there is more than one peripheral
- * of the same type on the SOC, the constants below will be
- * offsets from the base of each peripheral. For example,
- * the MAC registers are described as offsets from the first
- * MAC register, and there will be a MAC_REGISTER() macro
- * to calculate the base address of a given MAC.
- *
- * The information in this file is based on the SB1250 SOC
- * manual version 0.2, July 2000.
- ********************************************************************* */
-
-
-/* *********************************************************************
- * Memory Controller Registers
- ********************************************************************* */
-
-/*
- * XXX: can't remove MC base 0 if 112x, since it's used by other macros,
- * since there is one reg there (but it could get its addr/offset constant).
- */
-#define A_MC_BASE_0 0x0010051000
-#define A_MC_BASE_1 0x0010052000
-#define MC_REGISTER_SPACING 0x1000
-
-#define A_MC_BASE(ctlid) ((ctlid)*MC_REGISTER_SPACING+A_MC_BASE_0)
-#define A_MC_REGISTER(ctlid,reg) (A_MC_BASE(ctlid)+(reg))
-
-#define R_MC_CONFIG 0x0000000100
-#define R_MC_DRAMCMD 0x0000000120
-#define R_MC_DRAMMODE 0x0000000140
-#define R_MC_TIMING1 0x0000000160
-#define R_MC_TIMING2 0x0000000180
-#define R_MC_CS_START 0x00000001A0
-#define R_MC_CS_END 0x00000001C0
-#define R_MC_CS_INTERLEAVE 0x00000001E0
-#define S_MC_CS_STARTEND 16
-
-#define R_MC_CSX_BASE 0x0000000200
-#define R_MC_CSX_ROW 0x0000000000 /* relative to CSX_BASE, above */
-#define R_MC_CSX_COL 0x0000000020 /* relative to CSX_BASE, above */
-#define R_MC_CSX_BA 0x0000000040 /* relative to CSX_BASE, above */
-#define MC_CSX_SPACING 0x0000000060 /* relative to CSX_BASE, above */
-
-#define R_MC_CS0_ROW 0x0000000200
-#define R_MC_CS0_COL 0x0000000220
-#define R_MC_CS0_BA 0x0000000240
-#define R_MC_CS1_ROW 0x0000000260
-#define R_MC_CS1_COL 0x0000000280
-#define R_MC_CS1_BA 0x00000002A0
-#define R_MC_CS2_ROW 0x00000002C0
-#define R_MC_CS2_COL 0x00000002E0
-#define R_MC_CS2_BA 0x0000000300
-#define R_MC_CS3_ROW 0x0000000320
-#define R_MC_CS3_COL 0x0000000340
-#define R_MC_CS3_BA 0x0000000360
-#define R_MC_CS_ATTR 0x0000000380
-#define R_MC_TEST_DATA 0x0000000400
-#define R_MC_TEST_ECC 0x0000000420
-#define R_MC_MCLK_CFG 0x0000000500
-
-/* *********************************************************************
- * L2 Cache Control Registers
- ********************************************************************* */
-
-#define A_L2_READ_TAG 0x0010040018
-#define A_L2_ECC_TAG 0x0010040038
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_L2_READ_MISC 0x0010040058
-#endif /* 112x PASS1 */
-#define A_L2_WAY_DISABLE 0x0010041000
-#define A_L2_MAKEDISABLE(x) (A_L2_WAY_DISABLE | (((~(x))&0x0F) << 8))
-#define A_L2_MGMT_TAG_BASE 0x00D0000000
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_L2_CACHE_DISABLE 0x0010042000
-#define A_L2_MAKECACHEDISABLE(x) (A_L2_CACHE_DISABLE | (((x)&0x0F) << 8))
-#define A_L2_MISC_CONFIG 0x0010043000
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/* Backward-compatibility definitions. */
-/* XXX: discourage people from using these constants. */
-#define A_L2_READ_ADDRESS A_L2_READ_TAG
-#define A_L2_EEC_ADDRESS A_L2_ECC_TAG
-
-
-/* *********************************************************************
- * PCI Interface Registers
- ********************************************************************* */
-
-#define A_PCI_TYPE00_HEADER 0x00DE000000
-#define A_PCI_TYPE01_HEADER 0x00DE000800
-
-
-/* *********************************************************************
- * Ethernet DMA and MACs
- ********************************************************************* */
-
-#define A_MAC_BASE_0 0x0010064000
-#define A_MAC_BASE_1 0x0010065000
-#if SIBYTE_HDR_FEATURE_CHIP(1250)
-#define A_MAC_BASE_2 0x0010066000
-#endif /* 1250 */
-
-#define MAC_SPACING 0x1000
-#define MAC_DMA_TXRX_SPACING 0x0400
-#define MAC_DMA_CHANNEL_SPACING 0x0100
-#define DMA_RX 0
-#define DMA_TX 1
-#define MAC_NUM_DMACHAN 2 /* channels per direction */
-
-/* XXX: not correct; depends on SOC type. */
-#define MAC_NUM_PORTS 3
-
-#define A_MAC_CHANNEL_BASE(macnum) \
- (A_MAC_BASE_0 + \
- MAC_SPACING*(macnum))
-
-#define A_MAC_REGISTER(macnum,reg) \
- (A_MAC_BASE_0 + \
- MAC_SPACING*(macnum) + (reg))
-
-
-#define R_MAC_DMA_CHANNELS 0x800 /* Relative to A_MAC_CHANNEL_BASE */
-
-#define A_MAC_DMA_CHANNEL_BASE(macnum,txrx,chan) \
- ((A_MAC_CHANNEL_BASE(macnum)) + \
- R_MAC_DMA_CHANNELS + \
- (MAC_DMA_TXRX_SPACING*(txrx)) + \
- (MAC_DMA_CHANNEL_SPACING*(chan)))
-
-#define R_MAC_DMA_CHANNEL_BASE(txrx,chan) \
- (R_MAC_DMA_CHANNELS + \
- (MAC_DMA_TXRX_SPACING*(txrx)) + \
- (MAC_DMA_CHANNEL_SPACING*(chan)))
-
-#define A_MAC_DMA_REGISTER(macnum,txrx,chan,reg) \
- (A_MAC_DMA_CHANNEL_BASE(macnum,txrx,chan) + \
- (reg))
-
-#define R_MAC_DMA_REGISTER(txrx,chan,reg) \
- (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \
- (reg))
-
-/*
- * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE
- */
-
-#define R_MAC_DMA_CONFIG0 0x00000000
-#define R_MAC_DMA_CONFIG1 0x00000008
-#define R_MAC_DMA_DSCR_BASE 0x00000010
-#define R_MAC_DMA_DSCR_CNT 0x00000018
-#define R_MAC_DMA_CUR_DSCRA 0x00000020
-#define R_MAC_DMA_CUR_DSCRB 0x00000028
-#define R_MAC_DMA_CUR_DSCRADDR 0x00000030
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define R_MAC_DMA_OODPKTLOST_RX 0x00000038 /* rx only */
-#endif /* 112x PASS1 */
-
-/*
- * RMON Counters
- */
-
-#define R_MAC_RMON_TX_BYTES 0x00000000
-#define R_MAC_RMON_COLLISIONS 0x00000008
-#define R_MAC_RMON_LATE_COL 0x00000010
-#define R_MAC_RMON_EX_COL 0x00000018
-#define R_MAC_RMON_FCS_ERROR 0x00000020
-#define R_MAC_RMON_TX_ABORT 0x00000028
-/* Counter #6 (0x30) now reserved */
-#define R_MAC_RMON_TX_BAD 0x00000038
-#define R_MAC_RMON_TX_GOOD 0x00000040
-#define R_MAC_RMON_TX_RUNT 0x00000048
-#define R_MAC_RMON_TX_OVERSIZE 0x00000050
-#define R_MAC_RMON_RX_BYTES 0x00000080
-#define R_MAC_RMON_RX_MCAST 0x00000088
-#define R_MAC_RMON_RX_BCAST 0x00000090
-#define R_MAC_RMON_RX_BAD 0x00000098
-#define R_MAC_RMON_RX_GOOD 0x000000A0
-#define R_MAC_RMON_RX_RUNT 0x000000A8
-#define R_MAC_RMON_RX_OVERSIZE 0x000000B0
-#define R_MAC_RMON_RX_FCS_ERROR 0x000000B8
-#define R_MAC_RMON_RX_LENGTH_ERROR 0x000000C0
-#define R_MAC_RMON_RX_CODE_ERROR 0x000000C8
-#define R_MAC_RMON_RX_ALIGN_ERROR 0x000000D0
-
-/* Updated to spec 0.2 */
-#define R_MAC_CFG 0x00000100
-#define R_MAC_THRSH_CFG 0x00000108
-#define R_MAC_VLANTAG 0x00000110
-#define R_MAC_FRAMECFG 0x00000118
-#define R_MAC_EOPCNT 0x00000120
-#define R_MAC_FIFO_PTRS 0x00000130
-#define R_MAC_ADFILTER_CFG 0x00000200
-#define R_MAC_ETHERNET_ADDR 0x00000208
-#define R_MAC_PKT_TYPE 0x00000210
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define R_MAC_ADMASK0 0x00000218
-#define R_MAC_ADMASK1 0x00000220
-#endif /* 112x PASS1 */
-#define R_MAC_HASH_BASE 0x00000240
-#define R_MAC_ADDR_BASE 0x00000280
-#define R_MAC_CHLO0_BASE 0x00000300
-#define R_MAC_CHUP0_BASE 0x00000320
-#define R_MAC_ENABLE 0x00000400
-#define R_MAC_STATUS 0x00000408
-#define R_MAC_INT_MASK 0x00000410
-#define R_MAC_TXD_CTL 0x00000420
-#define R_MAC_MDIO 0x00000428
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define R_MAC_STATUS1 0x00000430
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define R_MAC_DEBUG_STATUS 0x00000448
-
-#define MAC_HASH_COUNT 8
-#define MAC_ADDR_COUNT 8
-#define MAC_CHMAP_COUNT 4
-
-
-/* *********************************************************************
- * DUART Registers
- ********************************************************************* */
-
-
-#define R_DUART_NUM_PORTS 2
-
-#define A_DUART 0x0010060000
-
-#define A_DUART_REG(r)
-
-#define DUART_CHANREG_SPACING 0x100
-#define A_DUART_CHANREG(chan,reg) (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg))
-#define R_DUART_CHANREG(chan,reg) (DUART_CHANREG_SPACING*(chan) + (reg))
-
-#define R_DUART_MODE_REG_1 0x100
-#define R_DUART_MODE_REG_2 0x110
-#define R_DUART_STATUS 0x120
-#define R_DUART_CLK_SEL 0x130
-#define R_DUART_CMD 0x150
-#define R_DUART_RX_HOLD 0x160
-#define R_DUART_TX_HOLD 0x170
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define R_DUART_FULL_CTL 0x140
-#define R_DUART_OPCR_X 0x180
-#define R_DUART_AUXCTL_X 0x190
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/*
- * The IMR and ISR can't be addressed with A_DUART_CHANREG,
- * so use this macro instead.
- */
-
-#define R_DUART_AUX_CTRL 0x310
-#define R_DUART_ISR_A 0x320
-#define R_DUART_IMR_A 0x330
-#define R_DUART_ISR_B 0x340
-#define R_DUART_IMR_B 0x350
-#define R_DUART_OUT_PORT 0x360
-#define R_DUART_OPCR 0x370
-
-#define R_DUART_SET_OPR 0x3B0
-#define R_DUART_CLEAR_OPR 0x3C0
-
-#define DUART_IMRISR_SPACING 0x20
-
-#define R_DUART_IMRREG(chan) (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING)
-#define R_DUART_ISRREG(chan) (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING)
-
-#define A_DUART_IMRREG(chan) (A_DUART + R_DUART_IMRREG(chan))
-#define A_DUART_ISRREG(chan) (A_DUART + R_DUART_ISRREG(chan))
-
-
-
-
-/*
- * These constants are the absolute addresses.
- */
-
-#define A_DUART_MODE_REG_1_A 0x0010060100
-#define A_DUART_MODE_REG_2_A 0x0010060110
-#define A_DUART_STATUS_A 0x0010060120
-#define A_DUART_CLK_SEL_A 0x0010060130
-#define A_DUART_CMD_A 0x0010060150
-#define A_DUART_RX_HOLD_A 0x0010060160
-#define A_DUART_TX_HOLD_A 0x0010060170
-
-#define A_DUART_MODE_REG_1_B 0x0010060200
-#define A_DUART_MODE_REG_2_B 0x0010060210
-#define A_DUART_STATUS_B 0x0010060220
-#define A_DUART_CLK_SEL_B 0x0010060230
-#define A_DUART_CMD_B 0x0010060250
-#define A_DUART_RX_HOLD_B 0x0010060260
-#define A_DUART_TX_HOLD_B 0x0010060270
-
-#define A_DUART_INPORT_CHNG 0x0010060300
-#define A_DUART_AUX_CTRL 0x0010060310
-#define A_DUART_ISR_A 0x0010060320
-#define A_DUART_IMR_A 0x0010060330
-#define A_DUART_ISR_B 0x0010060340
-#define A_DUART_IMR_B 0x0010060350
-#define A_DUART_OUT_PORT 0x0010060360
-#define A_DUART_OPCR 0x0010060370
-#define A_DUART_IN_PORT 0x0010060380
-#define A_DUART_ISR 0x0010060390
-#define A_DUART_IMR 0x00100603A0
-#define A_DUART_SET_OPR 0x00100603B0
-#define A_DUART_CLEAR_OPR 0x00100603C0
-#define A_DUART_INPORT_CHNG_A 0x00100603D0
-#define A_DUART_INPORT_CHNG_B 0x00100603E0
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_DUART_FULL_CTL_A 0x0010060140
-#define A_DUART_FULL_CTL_B 0x0010060240
-
-#define A_DUART_OPCR_A 0x0010060180
-#define A_DUART_OPCR_B 0x0010060280
-
-#define A_DUART_INPORT_CHNG_DEBUG 0x00100603F0
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/* *********************************************************************
- * Synchronous Serial Registers
- ********************************************************************* */
-
-
-#define A_SER_BASE_0 0x0010060400
-#define A_SER_BASE_1 0x0010060800
-#define SER_SPACING 0x400
-
-#define SER_DMA_TXRX_SPACING 0x80
-
-#define SER_NUM_PORTS 2
-
-#define A_SER_CHANNEL_BASE(sernum) \
- (A_SER_BASE_0 + \
- SER_SPACING*(sernum))
-
-#define A_SER_REGISTER(sernum,reg) \
- (A_SER_BASE_0 + \
- SER_SPACING*(sernum) + (reg))
-
-
-#define R_SER_DMA_CHANNELS 0 /* Relative to A_SER_BASE_x */
-
-#define A_SER_DMA_CHANNEL_BASE(sernum,txrx) \
- ((A_SER_CHANNEL_BASE(sernum)) + \
- R_SER_DMA_CHANNELS + \
- (SER_DMA_TXRX_SPACING*(txrx)))
-
-#define A_SER_DMA_REGISTER(sernum,txrx,reg) \
- (A_SER_DMA_CHANNEL_BASE(sernum,txrx) + \
- (reg))
-
-
-/*
- * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE
- */
-
-#define R_SER_DMA_CONFIG0 0x00000000
-#define R_SER_DMA_CONFIG1 0x00000008
-#define R_SER_DMA_DSCR_BASE 0x00000010
-#define R_SER_DMA_DSCR_CNT 0x00000018
-#define R_SER_DMA_CUR_DSCRA 0x00000020
-#define R_SER_DMA_CUR_DSCRB 0x00000028
-#define R_SER_DMA_CUR_DSCRADDR 0x00000030
-
-#define R_SER_DMA_CONFIG0_RX 0x00000000
-#define R_SER_DMA_CONFIG1_RX 0x00000008
-#define R_SER_DMA_DSCR_BASE_RX 0x00000010
-#define R_SER_DMA_DSCR_COUNT_RX 0x00000018
-#define R_SER_DMA_CUR_DSCR_A_RX 0x00000020
-#define R_SER_DMA_CUR_DSCR_B_RX 0x00000028
-#define R_SER_DMA_CUR_DSCR_ADDR_RX 0x00000030
-
-#define R_SER_DMA_CONFIG0_TX 0x00000080
-#define R_SER_DMA_CONFIG1_TX 0x00000088
-#define R_SER_DMA_DSCR_BASE_TX 0x00000090
-#define R_SER_DMA_DSCR_COUNT_TX 0x00000098
-#define R_SER_DMA_CUR_DSCR_A_TX 0x000000A0
-#define R_SER_DMA_CUR_DSCR_B_TX 0x000000A8
-#define R_SER_DMA_CUR_DSCR_ADDR_TX 0x000000B0
-
-#define R_SER_MODE 0x00000100
-#define R_SER_MINFRM_SZ 0x00000108
-#define R_SER_MAXFRM_SZ 0x00000110
-#define R_SER_ADDR 0x00000118
-#define R_SER_USR0_ADDR 0x00000120
-#define R_SER_USR1_ADDR 0x00000128
-#define R_SER_USR2_ADDR 0x00000130
-#define R_SER_USR3_ADDR 0x00000138
-#define R_SER_CMD 0x00000140
-#define R_SER_TX_RD_THRSH 0x00000160
-#define R_SER_TX_WR_THRSH 0x00000168
-#define R_SER_RX_RD_THRSH 0x00000170
-#define R_SER_LINE_MODE 0x00000178
-#define R_SER_DMA_ENABLE 0x00000180
-#define R_SER_INT_MASK 0x00000190
-#define R_SER_STATUS 0x00000188
-#define R_SER_STATUS_DEBUG 0x000001A8
-#define R_SER_RX_TABLE_BASE 0x00000200
-#define SER_RX_TABLE_COUNT 16
-#define R_SER_TX_TABLE_BASE 0x00000300
-#define SER_TX_TABLE_COUNT 16
-
-/* RMON Counters */
-#define R_SER_RMON_TX_BYTE_LO 0x000001C0
-#define R_SER_RMON_TX_BYTE_HI 0x000001C8
-#define R_SER_RMON_RX_BYTE_LO 0x000001D0
-#define R_SER_RMON_RX_BYTE_HI 0x000001D8
-#define R_SER_RMON_TX_UNDERRUN 0x000001E0
-#define R_SER_RMON_RX_OVERFLOW 0x000001E8
-#define R_SER_RMON_RX_ERRORS 0x000001F0
-#define R_SER_RMON_RX_BADADDR 0x000001F8
-
-/* *********************************************************************
- * Generic Bus Registers
- ********************************************************************* */
-
-#define IO_EXT_CFG_COUNT 8
-
-#define A_IO_EXT_BASE 0x0010061000
-#define A_IO_EXT_REG(r) (A_IO_EXT_BASE + (r))
-
-#define A_IO_EXT_CFG_BASE 0x0010061000
-#define A_IO_EXT_MULT_SIZE_BASE 0x0010061100
-#define A_IO_EXT_START_ADDR_BASE 0x0010061200
-#define A_IO_EXT_TIME_CFG0_BASE 0x0010061600
-#define A_IO_EXT_TIME_CFG1_BASE 0x0010061700
-
-#define IO_EXT_REGISTER_SPACING 8
-#define A_IO_EXT_CS_BASE(cs) (A_IO_EXT_CFG_BASE+IO_EXT_REGISTER_SPACING*(cs))
-#define R_IO_EXT_REG(reg,cs) ((cs)*IO_EXT_REGISTER_SPACING + (reg))
-
-#define R_IO_EXT_CFG 0x0000
-#define R_IO_EXT_MULT_SIZE 0x0100
-#define R_IO_EXT_START_ADDR 0x0200
-#define R_IO_EXT_TIME_CFG0 0x0600
-#define R_IO_EXT_TIME_CFG1 0x0700
-
-
-#define A_IO_INTERRUPT_STATUS 0x0010061A00
-#define A_IO_INTERRUPT_DATA0 0x0010061A10
-#define A_IO_INTERRUPT_DATA1 0x0010061A18
-#define A_IO_INTERRUPT_DATA2 0x0010061A20
-#define A_IO_INTERRUPT_DATA3 0x0010061A28
-#define A_IO_INTERRUPT_ADDR0 0x0010061A30
-#define A_IO_INTERRUPT_ADDR1 0x0010061A40
-#define A_IO_INTERRUPT_PARITY 0x0010061A50
-#define A_IO_PCMCIA_CFG 0x0010061A60
-#define A_IO_PCMCIA_STATUS 0x0010061A70
-#define A_IO_DRIVE_0 0x0010061300
-#define A_IO_DRIVE_1 0x0010061308
-#define A_IO_DRIVE_2 0x0010061310
-#define A_IO_DRIVE_3 0x0010061318
-#define A_IO_DRIVE_BASE A_IO_DRIVE_0
-#define IO_DRIVE_REGISTER_SPACING 8
-#define R_IO_DRIVE(x) ((x)*IO_DRIVE_REGISTER_SPACING)
-#define A_IO_DRIVE(x) (A_IO_DRIVE_BASE + R_IO_DRIVE(x))
-
-#define R_IO_INTERRUPT_STATUS 0x0A00
-#define R_IO_INTERRUPT_DATA0 0x0A10
-#define R_IO_INTERRUPT_DATA1 0x0A18
-#define R_IO_INTERRUPT_DATA2 0x0A20
-#define R_IO_INTERRUPT_DATA3 0x0A28
-#define R_IO_INTERRUPT_ADDR0 0x0A30
-#define R_IO_INTERRUPT_ADDR1 0x0A40
-#define R_IO_INTERRUPT_PARITY 0x0A50
-#define R_IO_PCMCIA_CFG 0x0A60
-#define R_IO_PCMCIA_STATUS 0x0A70
-
-/* *********************************************************************
- * GPIO Registers
- ********************************************************************* */
-
-#define A_GPIO_CLR_EDGE 0x0010061A80
-#define A_GPIO_INT_TYPE 0x0010061A88
-#define A_GPIO_INPUT_INVERT 0x0010061A90
-#define A_GPIO_GLITCH 0x0010061A98
-#define A_GPIO_READ 0x0010061AA0
-#define A_GPIO_DIRECTION 0x0010061AA8
-#define A_GPIO_PIN_CLR 0x0010061AB0
-#define A_GPIO_PIN_SET 0x0010061AB8
-
-#define A_GPIO_BASE 0x0010061A80
-
-#define R_GPIO_CLR_EDGE 0x00
-#define R_GPIO_INT_TYPE 0x08
-#define R_GPIO_INPUT_INVERT 0x10
-#define R_GPIO_GLITCH 0x18
-#define R_GPIO_READ 0x20
-#define R_GPIO_DIRECTION 0x28
-#define R_GPIO_PIN_CLR 0x30
-#define R_GPIO_PIN_SET 0x38
-
-/* *********************************************************************
- * SMBus Registers
- ********************************************************************* */
-
-#define A_SMB_XTRA_0 0x0010060000
-#define A_SMB_XTRA_1 0x0010060008
-#define A_SMB_FREQ_0 0x0010060010
-#define A_SMB_FREQ_1 0x0010060018
-#define A_SMB_STATUS_0 0x0010060020
-#define A_SMB_STATUS_1 0x0010060028
-#define A_SMB_CMD_0 0x0010060030
-#define A_SMB_CMD_1 0x0010060038
-#define A_SMB_START_0 0x0010060040
-#define A_SMB_START_1 0x0010060048
-#define A_SMB_DATA_0 0x0010060050
-#define A_SMB_DATA_1 0x0010060058
-#define A_SMB_CONTROL_0 0x0010060060
-#define A_SMB_CONTROL_1 0x0010060068
-#define A_SMB_PEC_0 0x0010060070
-#define A_SMB_PEC_1 0x0010060078
-
-#define A_SMB_0 0x0010060000
-#define A_SMB_1 0x0010060008
-#define SMB_REGISTER_SPACING 0x8
-#define A_SMB_BASE(idx) (A_SMB_0+(idx)*SMB_REGISTER_SPACING)
-#define A_SMB_REGISTER(idx,reg) (A_SMB_BASE(idx)+(reg))
-
-#define R_SMB_XTRA 0x0000000000
-#define R_SMB_FREQ 0x0000000010
-#define R_SMB_STATUS 0x0000000020
-#define R_SMB_CMD 0x0000000030
-#define R_SMB_START 0x0000000040
-#define R_SMB_DATA 0x0000000050
-#define R_SMB_CONTROL 0x0000000060
-#define R_SMB_PEC 0x0000000070
-
-/* *********************************************************************
- * Timer Registers
- ********************************************************************* */
-
-/*
- * Watchdog timers
- */
-
-#define A_SCD_WDOG_0 0x0010020050
-#define A_SCD_WDOG_1 0x0010020150
-#define SCD_WDOG_SPACING 0x100
-#define SCD_NUM_WDOGS 2
-#define A_SCD_WDOG_BASE(w) (A_SCD_WDOG_0+SCD_WDOG_SPACING*(w))
-#define A_SCD_WDOG_REGISTER(w,r) (A_SCD_WDOG_BASE(w) + (r))
-
-#define R_SCD_WDOG_INIT 0x0000000000
-#define R_SCD_WDOG_CNT 0x0000000008
-#define R_SCD_WDOG_CFG 0x0000000010
-
-#define A_SCD_WDOG_INIT_0 0x0010020050
-#define A_SCD_WDOG_CNT_0 0x0010020058
-#define A_SCD_WDOG_CFG_0 0x0010020060
-
-#define A_SCD_WDOG_INIT_1 0x0010020150
-#define A_SCD_WDOG_CNT_1 0x0010020158
-#define A_SCD_WDOG_CFG_1 0x0010020160
-
-/*
- * Generic timers
- */
-
-#define A_SCD_TIMER_0 0x0010020070
-#define A_SCD_TIMER_1 0x0010020078
-#define A_SCD_TIMER_2 0x0010020170
-#define A_SCD_TIMER_3 0x0010020178
-#define SCD_NUM_TIMERS 4
-#define A_SCD_TIMER_BASE(w) (A_SCD_TIMER_0+0x08*((w)&1)+0x100*(((w)&2)>>1))
-#define A_SCD_TIMER_REGISTER(w,r) (A_SCD_TIMER_BASE(w) + (r))
-
-#define R_SCD_TIMER_INIT 0x0000000000
-#define R_SCD_TIMER_CNT 0x0000000010
-#define R_SCD_TIMER_CFG 0x0000000020
-
-#define A_SCD_TIMER_INIT_0 0x0010020070
-#define A_SCD_TIMER_CNT_0 0x0010020080
-#define A_SCD_TIMER_CFG_0 0x0010020090
-
-#define A_SCD_TIMER_INIT_1 0x0010020078
-#define A_SCD_TIMER_CNT_1 0x0010020088
-#define A_SCD_TIMER_CFG_1 0x0010020098
-
-#define A_SCD_TIMER_INIT_2 0x0010020170
-#define A_SCD_TIMER_CNT_2 0x0010020180
-#define A_SCD_TIMER_CFG_2 0x0010020190
-
-#define A_SCD_TIMER_INIT_3 0x0010020178
-#define A_SCD_TIMER_CNT_3 0x0010020188
-#define A_SCD_TIMER_CFG_3 0x0010020198
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_SCD_SCRATCH 0x0010020C10
-
-#define A_SCD_ZBBUS_CYCLE_COUNT 0x0010030000
-#define A_SCD_ZBBUS_CYCLE_CP0 0x0010020C00
-#define A_SCD_ZBBUS_CYCLE_CP1 0x0010020C08
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/* *********************************************************************
- * System Control Registers
- ********************************************************************* */
-
-#define A_SCD_SYSTEM_REVISION 0x0010020000
-#define A_SCD_SYSTEM_CFG 0x0010020008
-
-/* *********************************************************************
- * System Address Trap Registers
- ********************************************************************* */
-
-#define A_ADDR_TRAP_INDEX 0x00100200B0
-#define A_ADDR_TRAP_REG 0x00100200B8
-#define A_ADDR_TRAP_UP_0 0x0010020400
-#define A_ADDR_TRAP_UP_1 0x0010020408
-#define A_ADDR_TRAP_UP_2 0x0010020410
-#define A_ADDR_TRAP_UP_3 0x0010020418
-#define A_ADDR_TRAP_DOWN_0 0x0010020420
-#define A_ADDR_TRAP_DOWN_1 0x0010020428
-#define A_ADDR_TRAP_DOWN_2 0x0010020430
-#define A_ADDR_TRAP_DOWN_3 0x0010020438
-#define A_ADDR_TRAP_CFG_0 0x0010020440
-#define A_ADDR_TRAP_CFG_1 0x0010020448
-#define A_ADDR_TRAP_CFG_2 0x0010020450
-#define A_ADDR_TRAP_CFG_3 0x0010020458
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_ADDR_TRAP_REG_DEBUG 0x0010020460
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/* *********************************************************************
- * System Interrupt Mapper Registers
- ********************************************************************* */
-
-#define A_IMR_CPU0_BASE 0x0010020000
-#define A_IMR_CPU1_BASE 0x0010022000
-#define IMR_REGISTER_SPACING 0x2000
-#define IMR_REGISTER_SPACING_SHIFT 13
-
-#define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE+(cpu)*IMR_REGISTER_SPACING)
-#define A_IMR_REGISTER(cpu,reg) (A_IMR_MAPPER(cpu)+(reg))
-
-#define R_IMR_INTERRUPT_DIAG 0x0010
-#define R_IMR_INTERRUPT_MASK 0x0028
-#define R_IMR_INTERRUPT_TRACE 0x0038
-#define R_IMR_INTERRUPT_SOURCE_STATUS 0x0040
-#define R_IMR_LDT_INTERRUPT_SET 0x0048
-#define R_IMR_LDT_INTERRUPT 0x0018
-#define R_IMR_LDT_INTERRUPT_CLR 0x0020
-#define R_IMR_MAILBOX_CPU 0x00c0
-#define R_IMR_ALIAS_MAILBOX_CPU 0x1000
-#define R_IMR_MAILBOX_SET_CPU 0x00C8
-#define R_IMR_ALIAS_MAILBOX_SET_CPU 0x1008
-#define R_IMR_MAILBOX_CLR_CPU 0x00D0
-#define R_IMR_INTERRUPT_STATUS_BASE 0x0100
-#define R_IMR_INTERRUPT_STATUS_COUNT 7
-#define R_IMR_INTERRUPT_MAP_BASE 0x0200
-#define R_IMR_INTERRUPT_MAP_COUNT 64
-
-/* *********************************************************************
- * System Performance Counter Registers
- ********************************************************************* */
-
-#define A_SCD_PERF_CNT_CFG 0x00100204C0
-#define A_SCD_PERF_CNT_0 0x00100204D0
-#define A_SCD_PERF_CNT_1 0x00100204D8
-#define A_SCD_PERF_CNT_2 0x00100204E0
-#define A_SCD_PERF_CNT_3 0x00100204E8
-
-/* *********************************************************************
- * System Bus Watcher Registers
- ********************************************************************* */
-
-#define A_SCD_BUS_ERR_STATUS 0x0010020880
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_SCD_BUS_ERR_STATUS_DEBUG 0x00100208D0
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define A_BUS_ERR_DATA_0 0x00100208A0
-#define A_BUS_ERR_DATA_1 0x00100208A8
-#define A_BUS_ERR_DATA_2 0x00100208B0
-#define A_BUS_ERR_DATA_3 0x00100208B8
-#define A_BUS_L2_ERRORS 0x00100208C0
-#define A_BUS_MEM_IO_ERRORS 0x00100208C8
-
-/* *********************************************************************
- * System Debug Controller Registers
- ********************************************************************* */
-
-#define A_SCD_JTAG_BASE 0x0010000000
-
-/* *********************************************************************
- * System Trace Buffer Registers
- ********************************************************************* */
-
-#define A_SCD_TRACE_CFG 0x0010020A00
-#define A_SCD_TRACE_READ 0x0010020A08
-#define A_SCD_TRACE_EVENT_0 0x0010020A20
-#define A_SCD_TRACE_EVENT_1 0x0010020A28
-#define A_SCD_TRACE_EVENT_2 0x0010020A30
-#define A_SCD_TRACE_EVENT_3 0x0010020A38
-#define A_SCD_TRACE_SEQUENCE_0 0x0010020A40
-#define A_SCD_TRACE_SEQUENCE_1 0x0010020A48
-#define A_SCD_TRACE_SEQUENCE_2 0x0010020A50
-#define A_SCD_TRACE_SEQUENCE_3 0x0010020A58
-#define A_SCD_TRACE_EVENT_4 0x0010020A60
-#define A_SCD_TRACE_EVENT_5 0x0010020A68
-#define A_SCD_TRACE_EVENT_6 0x0010020A70
-#define A_SCD_TRACE_EVENT_7 0x0010020A78
-#define A_SCD_TRACE_SEQUENCE_4 0x0010020A80
-#define A_SCD_TRACE_SEQUENCE_5 0x0010020A88
-#define A_SCD_TRACE_SEQUENCE_6 0x0010020A90
-#define A_SCD_TRACE_SEQUENCE_7 0x0010020A98
-
-/* *********************************************************************
- * System Generic DMA Registers
- ********************************************************************* */
-
-#define A_DM_0 0x0010020B00
-#define A_DM_1 0x0010020B20
-#define A_DM_2 0x0010020B40
-#define A_DM_3 0x0010020B60
-#define DM_REGISTER_SPACING 0x20
-#define DM_NUM_CHANNELS 4
-#define A_DM_BASE(idx) (A_DM_0 + ((idx) * DM_REGISTER_SPACING))
-#define A_DM_REGISTER(idx,reg) (A_DM_BASE(idx) + (reg))
-
-#define R_DM_DSCR_BASE 0x0000000000
-#define R_DM_DSCR_COUNT 0x0000000008
-#define R_DM_CUR_DSCR_ADDR 0x0000000010
-#define R_DM_DSCR_BASE_DEBUG 0x0000000018
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_DM_PARTIAL_0 0x0010020ba0
-#define A_DM_PARTIAL_1 0x0010020ba8
-#define A_DM_PARTIAL_2 0x0010020bb0
-#define A_DM_PARTIAL_3 0x0010020bb8
-#define DM_PARTIAL_REGISTER_SPACING 0x8
-#define A_DM_PARTIAL(idx) (A_DM_PARTIAL_0 + ((idx) * DM_PARTIAL_REGISTER_SPACING))
-#endif /* 112x PASS1 */
-
-#if SIBYTE_HDR_FEATURE(112x, PASS1)
-#define A_DM_CRC_0 0x0010020b80
-#define A_DM_CRC_1 0x0010020b90
-#define DM_CRC_REGISTER_SPACING 0x10
-#define DM_CRC_NUM_CHANNELS 2
-#define A_DM_CRC_BASE(idx) (A_DM_CRC_0 + ((idx) * DM_CRC_REGISTER_SPACING))
-#define A_DM_CRC_REGISTER(idx,reg) (A_DM_CRC_BASE(idx) + (reg))
-
-#define R_CRC_DEF_0 0x00
-#define R_CTCP_DEF_0 0x08
-#endif /* 112x PASS1 */
-
-/* *********************************************************************
- * Physical Address Map
- ********************************************************************* */
-
-#define A_PHYS_MEMORY_0 _SB_MAKE64(0x0000000000)
-#define A_PHYS_MEMORY_SIZE _SB_MAKE64((256*1024*1024))
-#define A_PHYS_SYSTEM_CTL _SB_MAKE64(0x0010000000)
-#define A_PHYS_IO_SYSTEM _SB_MAKE64(0x0010060000)
-#define A_PHYS_GENBUS _SB_MAKE64(0x0010090000)
-#define A_PHYS_GENBUS_END _SB_MAKE64(0x0040000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BYTES_32 _SB_MAKE64(0x0040000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BITS_32 _SB_MAKE64(0x0060000000)
-#define A_PHYS_MEMORY_1 _SB_MAKE64(0x0080000000)
-#define A_PHYS_MEMORY_2 _SB_MAKE64(0x0090000000)
-#define A_PHYS_MEMORY_3 _SB_MAKE64(0x00C0000000)
-#define A_PHYS_L2_CACHE_TEST _SB_MAKE64(0x00D0000000)
-#define A_PHYS_LDT_SPECIAL_MATCH_BYTES _SB_MAKE64(0x00D8000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BYTES _SB_MAKE64(0x00DC000000)
-#define A_PHYS_LDTPCI_CFG_MATCH_BYTES _SB_MAKE64(0x00DE000000)
-#define A_PHYS_LDT_SPECIAL_MATCH_BITS _SB_MAKE64(0x00F8000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BITS _SB_MAKE64(0x00FC000000)
-#define A_PHYS_LDTPCI_CFG_MATCH_BITS _SB_MAKE64(0x00FE000000)
-#define A_PHYS_MEMORY_EXP _SB_MAKE64(0x0100000000)
-#define A_PHYS_MEMORY_EXP_SIZE _SB_MAKE64((508*1024*1024*1024))
-#define A_PHYS_LDT_EXP _SB_MAKE64(0x8000000000)
-#define A_PHYS_PCI_FULLACCESS_BYTES _SB_MAKE64(0xF000000000)
-#define A_PHYS_PCI_FULLACCESS_BITS _SB_MAKE64(0xF100000000)
-#define A_PHYS_RESERVED _SB_MAKE64(0xF200000000)
-#define A_PHYS_RESERVED_SPECIAL_LDT _SB_MAKE64(0xFD00000000)
-
-#define A_PHYS_L2CACHE_WAY_SIZE _SB_MAKE64(0x0000020000)
-#define PHYS_L2CACHE_NUM_WAYS 4
-#define A_PHYS_L2CACHE_TOTAL_SIZE _SB_MAKE64(0x0000080000)
-#define A_PHYS_L2CACHE_WAY0 _SB_MAKE64(0x00D0180000)
-#define A_PHYS_L2CACHE_WAY1 _SB_MAKE64(0x00D01A0000)
-#define A_PHYS_L2CACHE_WAY2 _SB_MAKE64(0x00D01C0000)
-#define A_PHYS_L2CACHE_WAY3 _SB_MAKE64(0x00D01E0000)
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_scd.h b/include/asm-mips64/sibyte/sb1250_scd.h
--- a/include/asm-mips64/sibyte/sb1250_scd.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,525 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * SCD Constants and Macros File: sb1250_scd.h
- *
- * This module contains constants and macros useful for
- * manipulating the System Control and Debug module on the 1250.
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-#ifndef _SB1250_SCD_H
-#define _SB1250_SCD_H
-
-#include "sb1250_defs.h"
-
-/* *********************************************************************
- * System control/debug registers
- ********************************************************************* */
-
-/*
- * System Revision Register (Table 4-1)
- */
-
-#define M_SYS_RESERVED _SB_MAKEMASK(8,0)
-
-#define S_SYS_REVISION _SB_MAKE64(8)
-#define M_SYS_REVISION _SB_MAKEMASK(8,S_SYS_REVISION)
-#define V_SYS_REVISION(x) _SB_MAKEVALUE(x,S_SYS_REVISION)
-#define G_SYS_REVISION(x) _SB_GETVALUE(x,S_SYS_REVISION,M_SYS_REVISION)
-
-#if SIBYTE_HDR_FEATURE_CHIP(1250)
-#define K_SYS_REVISION_BCM1250_PASS1 1
-#define K_SYS_REVISION_BCM1250_PASS2 3
-#define K_SYS_REVISION_BCM1250_A10 11
-#define K_SYS_REVISION_BCM1250_PASS2_2 16
-#define K_SYS_REVISION_BCM1250_B2 17
-#define K_SYS_REVISION_BCM1250_PASS3 32
-
-/* XXX: discourage people from using these constants. */
-#define K_SYS_REVISION_PASS1 K_SYS_REVISION_BCM1250_PASS1
-#define K_SYS_REVISION_PASS2 K_SYS_REVISION_BCM1250_PASS2
-#define K_SYS_REVISION_PASS2_2 K_SYS_REVISION_BCM1250_PASS2_2
-#define K_SYS_REVISION_PASS3 K_SYS_REVISION_BCM1250_PASS3
-#endif /* 1250 */
-
-#if SIBYTE_HDR_FEATURE_CHIP(112x)
-#define K_SYS_REVISION_BCM112x_A1 32
-#define K_SYS_REVISION_BCM112x_A2 33
-#endif /* 112x */
-
-/* XXX: discourage people from using these constants. */
-#define S_SYS_PART _SB_MAKE64(16)
-#define M_SYS_PART _SB_MAKEMASK(16,S_SYS_PART)
-#define V_SYS_PART(x) _SB_MAKEVALUE(x,S_SYS_PART)
-#define G_SYS_PART(x) _SB_GETVALUE(x,S_SYS_PART,M_SYS_PART)
-
-/* XXX: discourage people from using these constants. */
-#define K_SYS_PART_SB1250 0x1250
-#define K_SYS_PART_BCM1120 0x1121
-#define K_SYS_PART_BCM1125 0x1123
-#define K_SYS_PART_BCM1125H 0x1124
-
-/* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */
-#define S_SYS_SOC_TYPE _SB_MAKE64(16)
-#define M_SYS_SOC_TYPE _SB_MAKEMASK(4,S_SYS_SOC_TYPE)
-#define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x,S_SYS_SOC_TYPE)
-#define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x,S_SYS_SOC_TYPE,M_SYS_SOC_TYPE)
-
-#define K_SYS_SOC_TYPE_BCM1250 0x0
-#define K_SYS_SOC_TYPE_BCM1120 0x1
-#define K_SYS_SOC_TYPE_BCM1250_ALT 0x2 /* 1250pass2 w/ 1/4 L2. */
-#define K_SYS_SOC_TYPE_BCM1125 0x3
-#define K_SYS_SOC_TYPE_BCM1125H 0x4
-#define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 /* 1250pass2 w/ 1/2 L2. */
-
-/*
- * Calculate correct SOC type given a copy of system revision register.
- *
- * (For the assembler version, sysrev and dest may be the same register.
- * Also, it clobbers AT.)
- */
-#ifdef __ASSEMBLER__
-#define SYS_SOC_TYPE(dest, sysrev) \
- .set push ; \
- .set reorder ; \
- dsrl dest, sysrev, S_SYS_SOC_TYPE ; \
- andi dest, dest, (M_SYS_SOC_TYPE >> S_SYS_SOC_TYPE); \
- beq dest, K_SYS_SOC_TYPE_BCM1250_ALT, 991f ; \
- beq dest, K_SYS_SOC_TYPE_BCM1250_ALT2, 991f ; \
- b 992f ; \
-991: li dest, K_SYS_SOC_TYPE_BCM1250 ; \
-992: \
- .set pop
-#else
-#define SYS_SOC_TYPE(sysrev) \
- ((G_SYS_SOC_TYPE(sysrev) == K_SYS_SOC_TYPE_BCM1250_ALT \
- || G_SYS_SOC_TYPE(sysrev) == K_SYS_SOC_TYPE_BCM1250_ALT2) \
- ? K_SYS_SOC_TYPE_BCM1250 : G_SYS_SOC_TYPE(sysrev))
-#endif
-
-#define S_SYS_WID _SB_MAKE64(32)
-#define M_SYS_WID _SB_MAKEMASK(32,S_SYS_WID)
-#define V_SYS_WID(x) _SB_MAKEVALUE(x,S_SYS_WID)
-#define G_SYS_WID(x) _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID)
-
-/*
- * System Config Register (Table 4-2)
- * Register: SCD_SYSTEM_CFG
- */
-
-#define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3)
-#define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4)
-#define M_SYS_IOB0_DIV _SB_MAKEMASK1(5)
-#define M_SYS_IOB1_DIV _SB_MAKEMASK1(6)
-
-#define S_SYS_PLL_DIV _SB_MAKE64(7)
-#define M_SYS_PLL_DIV _SB_MAKEMASK(5,S_SYS_PLL_DIV)
-#define V_SYS_PLL_DIV(x) _SB_MAKEVALUE(x,S_SYS_PLL_DIV)
-#define G_SYS_PLL_DIV(x) _SB_GETVALUE(x,S_SYS_PLL_DIV,M_SYS_PLL_DIV)
-
-#define M_SYS_SER0_ENABLE _SB_MAKEMASK1(12)
-#define M_SYS_SER0_RSTB_EN _SB_MAKEMASK1(13)
-#define M_SYS_SER1_ENABLE _SB_MAKEMASK1(14)
-#define M_SYS_SER1_RSTB_EN _SB_MAKEMASK1(15)
-#define M_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16)
-
-#define S_SYS_BOOT_MODE _SB_MAKE64(17)
-#define M_SYS_BOOT_MODE _SB_MAKEMASK(2,S_SYS_BOOT_MODE)
-#define V_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x,S_SYS_BOOT_MODE)
-#define G_SYS_BOOT_MODE(x) _SB_GETVALUE(x,S_SYS_BOOT_MODE,M_SYS_BOOT_MODE)
-#define K_SYS_BOOT_MODE_ROM32 0
-#define K_SYS_BOOT_MODE_ROM8 1
-#define K_SYS_BOOT_MODE_SMBUS_SMALL 2
-#define K_SYS_BOOT_MODE_SMBUS_BIG 3
-
-#define M_SYS_PCI_HOST _SB_MAKEMASK1(19)
-#define M_SYS_PCI_ARBITER _SB_MAKEMASK1(20)
-#define M_SYS_SOUTH_ON_LDT _SB_MAKEMASK1(21)
-#define M_SYS_BIG_ENDIAN _SB_MAKEMASK1(22)
-#define M_SYS_GENCLK_EN _SB_MAKEMASK1(23)
-#define M_SYS_LDT_TEST_EN _SB_MAKEMASK1(24)
-#define M_SYS_GEN_PARITY_EN _SB_MAKEMASK1(25)
-
-#define S_SYS_CONFIG 26
-#define M_SYS_CONFIG _SB_MAKEMASK(6,S_SYS_CONFIG)
-#define V_SYS_CONFIG(x) _SB_MAKEVALUE(x,S_SYS_CONFIG)
-#define G_SYS_CONFIG(x) _SB_GETVALUE(x,S_SYS_CONFIG,M_SYS_CONFIG)
-
-/* The following bits are writeable by JTAG only. */
-
-#define M_SYS_CLKSTOP _SB_MAKEMASK1(32)
-#define M_SYS_CLKSTEP _SB_MAKEMASK1(33)
-
-#define S_SYS_CLKCOUNT 34
-#define M_SYS_CLKCOUNT _SB_MAKEMASK(8,S_SYS_CLKCOUNT)
-#define V_SYS_CLKCOUNT(x) _SB_MAKEVALUE(x,S_SYS_CLKCOUNT)
-#define G_SYS_CLKCOUNT(x) _SB_GETVALUE(x,S_SYS_CLKCOUNT,M_SYS_CLKCOUNT)
-
-#define M_SYS_PLL_BYPASS _SB_MAKEMASK1(42)
-
-#define S_SYS_PLL_IREF 43
-#define M_SYS_PLL_IREF _SB_MAKEMASK(2,S_SYS_PLL_IREF)
-
-#define S_SYS_PLL_VCO 45
-#define M_SYS_PLL_VCO _SB_MAKEMASK(2,S_SYS_PLL_VCO)
-
-#define S_SYS_PLL_VREG 47
-#define M_SYS_PLL_VREG _SB_MAKEMASK(2,S_SYS_PLL_VREG)
-
-#define M_SYS_MEM_RESET _SB_MAKEMASK1(49)
-#define M_SYS_L2C_RESET _SB_MAKEMASK1(50)
-#define M_SYS_IO_RESET_0 _SB_MAKEMASK1(51)
-#define M_SYS_IO_RESET_1 _SB_MAKEMASK1(52)
-#define M_SYS_SCD_RESET _SB_MAKEMASK1(53)
-
-/* End of bits writable by JTAG only. */
-
-#define M_SYS_CPU_RESET_0 _SB_MAKEMASK1(54)
-#define M_SYS_CPU_RESET_1 _SB_MAKEMASK1(55)
-
-#define M_SYS_UNICPU0 _SB_MAKEMASK1(56)
-#define M_SYS_UNICPU1 _SB_MAKEMASK1(57)
-
-#define M_SYS_SB_SOFTRES _SB_MAKEMASK1(58)
-#define M_SYS_EXT_RESET _SB_MAKEMASK1(59)
-#define M_SYS_SYSTEM_RESET _SB_MAKEMASK1(60)
-
-#define M_SYS_MISR_MODE _SB_MAKEMASK1(61)
-#define M_SYS_MISR_RESET _SB_MAKEMASK1(62)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_SYS_SW_FLAG _SB_MAKEMASK1(63)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/*
- * Mailbox Registers (Table 4-3)
- * Registers: SCD_MBOX_CPU_x
- */
-
-#define S_MBOX_INT_3 0
-#define M_MBOX_INT_3 _SB_MAKEMASK(16,S_MBOX_INT_3)
-#define S_MBOX_INT_2 16
-#define M_MBOX_INT_2 _SB_MAKEMASK(16,S_MBOX_INT_2)
-#define S_MBOX_INT_1 32
-#define M_MBOX_INT_1 _SB_MAKEMASK(16,S_MBOX_INT_1)
-#define S_MBOX_INT_0 48
-#define M_MBOX_INT_0 _SB_MAKEMASK(16,S_MBOX_INT_0)
-
-/*
- * Watchdog Registers (Table 4-8) (Table 4-9) (Table 4-10)
- * Registers: SCD_WDOG_INIT_CNT_x
- */
-
-#define V_SCD_WDOG_FREQ 1000000
-
-#define S_SCD_WDOG_INIT 0
-#define M_SCD_WDOG_INIT _SB_MAKEMASK(23,S_SCD_WDOG_INIT)
-
-#define S_SCD_WDOG_CNT 0
-#define M_SCD_WDOG_CNT _SB_MAKEMASK(23,S_SCD_WDOG_CNT)
-
-#define M_SCD_WDOG_ENABLE _SB_MAKEMASK1(0)
-
-/*
- * Timer Registers (Table 4-11) (Table 4-12) (Table 4-13)
- */
-
-#define V_SCD_TIMER_FREQ 1000000
-
-#define S_SCD_TIMER_INIT 0
-#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT)
-#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT)
-#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT)
-
-#define S_SCD_TIMER_CNT 0
-#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT)
-#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT)
-#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT)
-
-#define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0)
-#define M_SCD_TIMER_MODE _SB_MAKEMASK1(1)
-#define M_SCD_TIMER_MODE_CONTINUOUS M_SCD_TIMER_MODE
-
-/*
- * System Performance Counters
- */
-
-#define S_SPC_CFG_SRC0 0
-#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0)
-#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC0)
-#define G_SPC_CFG_SRC0(x) _SB_GETVALUE(x,S_SPC_CFG_SRC0,M_SPC_CFG_SRC0)
-
-#define S_SPC_CFG_SRC1 8
-#define M_SPC_CFG_SRC1 _SB_MAKEMASK(8,S_SPC_CFG_SRC1)
-#define V_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC1)
-#define G_SPC_CFG_SRC1(x) _SB_GETVALUE(x,S_SPC_CFG_SRC1,M_SPC_CFG_SRC1)
-
-#define S_SPC_CFG_SRC2 16
-#define M_SPC_CFG_SRC2 _SB_MAKEMASK(8,S_SPC_CFG_SRC2)
-#define V_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC2)
-#define G_SPC_CFG_SRC2(x) _SB_GETVALUE(x,S_SPC_CFG_SRC2,M_SPC_CFG_SRC2)
-
-#define S_SPC_CFG_SRC3 24
-#define M_SPC_CFG_SRC3 _SB_MAKEMASK(8,S_SPC_CFG_SRC3)
-#define V_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC3)
-#define G_SPC_CFG_SRC3(x) _SB_GETVALUE(x,S_SPC_CFG_SRC3,M_SPC_CFG_SRC3)
-
-#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32)
-#define M_SPC_CFG_ENABLE _SB_MAKEMASK1(33)
-
-
-/*
- * Bus Watcher
- */
-
-#define S_SCD_BERR_TID 8
-#define M_SCD_BERR_TID _SB_MAKEMASK(10,S_SCD_BERR_TID)
-#define V_SCD_BERR_TID(x) _SB_MAKEVALUE(x,S_SCD_BERR_TID)
-#define G_SCD_BERR_TID(x) _SB_GETVALUE(x,S_SCD_BERR_TID,M_SCD_BERR_TID)
-
-#define S_SCD_BERR_RID 18
-#define M_SCD_BERR_RID _SB_MAKEMASK(4,S_SCD_BERR_RID)
-#define V_SCD_BERR_RID(x) _SB_MAKEVALUE(x,S_SCD_BERR_RID)
-#define G_SCD_BERR_RID(x) _SB_GETVALUE(x,S_SCD_BERR_RID,M_SCD_BERR_RID)
-
-#define S_SCD_BERR_DCODE 22
-#define M_SCD_BERR_DCODE _SB_MAKEMASK(3,S_SCD_BERR_DCODE)
-#define V_SCD_BERR_DCODE(x) _SB_MAKEVALUE(x,S_SCD_BERR_DCODE)
-#define G_SCD_BERR_DCODE(x) _SB_GETVALUE(x,S_SCD_BERR_DCODE,M_SCD_BERR_DCODE)
-
-#define M_SCD_BERR_MULTERRS _SB_MAKEMASK1(30)
-
-
-#define S_SCD_L2ECC_CORR_D 0
-#define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_D)
-#define V_SCD_L2ECC_CORR_D(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_D)
-#define G_SCD_L2ECC_CORR_D(x) _SB_GETVALUE(x,S_SCD_L2ECC_CORR_D,M_SCD_L2ECC_CORR_D)
-
-#define S_SCD_L2ECC_BAD_D 8
-#define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_D)
-#define V_SCD_L2ECC_BAD_D(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_D)
-#define G_SCD_L2ECC_BAD_D(x) _SB_GETVALUE(x,S_SCD_L2ECC_BAD_D,M_SCD_L2ECC_BAD_D)
-
-#define S_SCD_L2ECC_CORR_T 16
-#define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_T)
-#define V_SCD_L2ECC_CORR_T(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_T)
-#define G_SCD_L2ECC_CORR_T(x) _SB_GETVALUE(x,S_SCD_L2ECC_CORR_T,M_SCD_L2ECC_CORR_T)
-
-#define S_SCD_L2ECC_BAD_T 24
-#define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_T)
-#define V_SCD_L2ECC_BAD_T(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_T)
-#define G_SCD_L2ECC_BAD_T(x) _SB_GETVALUE(x,S_SCD_L2ECC_BAD_T,M_SCD_L2ECC_BAD_T)
-
-#define S_SCD_MEM_ECC_CORR 0
-#define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8,S_SCD_MEM_ECC_CORR)
-#define V_SCD_MEM_ECC_CORR(x) _SB_MAKEVALUE(x,S_SCD_MEM_ECC_CORR)
-#define G_SCD_MEM_ECC_CORR(x) _SB_GETVALUE(x,S_SCD_MEM_ECC_CORR,M_SCD_MEM_ECC_CORR)
-
-#define S_SCD_MEM_ECC_BAD 8
-#define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8,S_SCD_MEM_ECC_BAD)
-#define V_SCD_MEM_ECC_BAD(x) _SB_MAKEVALUE(x,S_SCD_MEM_ECC_BAD)
-#define G_SCD_MEM_ECC_BAD(x) _SB_GETVALUE(x,S_SCD_MEM_ECC_BAD,M_SCD_MEM_ECC_BAD)
-
-#define S_SCD_MEM_BUSERR 16
-#define M_SCD_MEM_BUSERR _SB_MAKEMASK(8,S_SCD_MEM_BUSERR)
-#define V_SCD_MEM_BUSERR(x) _SB_MAKEVALUE(x,S_SCD_MEM_BUSERR)
-#define G_SCD_MEM_BUSERR(x) _SB_GETVALUE(x,S_SCD_MEM_BUSERR,M_SCD_MEM_BUSERR)
-
-
-/*
- * Address Trap Registers
- */
-
-#define M_ATRAP_INDEX _SB_MAKEMASK(4,0)
-#define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0)
-
-#define S_ATRAP_CFG_CNT 0
-#define M_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_ATRAP_CFG_CNT)
-#define V_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_CNT)
-#define G_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_ATRAP_CFG_CNT,M_ATRAP_CFG_CNT)
-
-#define M_ATRAP_CFG_WRITE _SB_MAKEMASK1(3)
-#define M_ATRAP_CFG_ALL _SB_MAKEMASK1(4)
-#define M_ATRAP_CFG_INV _SB_MAKEMASK1(5)
-#define M_ATRAP_CFG_USESRC _SB_MAKEMASK1(6)
-#define M_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7)
-
-#define S_ATRAP_CFG_AGENTID 8
-#define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_ATRAP_CFG_AGENTID)
-#define V_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_AGENTID)
-#define G_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_ATRAP_CFG_AGENTID,M_ATRAP_CFG_AGENTID)
-
-#define K_BUS_AGENT_CPU0 0
-#define K_BUS_AGENT_CPU1 1
-#define K_BUS_AGENT_IOB0 2
-#define K_BUS_AGENT_IOB1 3
-#define K_BUS_AGENT_SCD 4
-#define K_BUS_AGENT_RESERVED 5
-#define K_BUS_AGENT_L2C 6
-#define K_BUS_AGENT_MC 7
-
-#define S_ATRAP_CFG_CATTR 12
-#define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3,S_ATRAP_CFG_CATTR)
-#define V_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_CATTR)
-#define G_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_ATRAP_CFG_CATTR,M_ATRAP_CFG_CATTR)
-
-#define K_ATRAP_CFG_CATTR_IGNORE 0
-#define K_ATRAP_CFG_CATTR_UNC 1
-#define K_ATRAP_CFG_CATTR_CACHEABLE 2
-#define K_ATRAP_CFG_CATTR_NONCOH 3
-#define K_ATRAP_CFG_CATTR_COHERENT 4
-#define K_ATRAP_CFG_CATTR_NOTUNC 5
-#define K_ATRAP_CFG_CATTR_NOTNONCOH 6
-#define K_ATRAP_CFG_CATTR_NOTCOHERENT 7
-
-/*
- * Trace Buffer Config register
- */
-
-#define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0)
-#define M_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1)
-#define M_SCD_TRACE_CFG_START _SB_MAKEMASK1(2)
-#define M_SCD_TRACE_CFG_STOP _SB_MAKEMASK1(3)
-#define M_SCD_TRACE_CFG_FREEZE _SB_MAKEMASK1(4)
-#define M_SCD_TRACE_CFG_FREEZE_FULL _SB_MAKEMASK1(5)
-#define M_SCD_TRACE_CFG_DEBUG_FULL _SB_MAKEMASK1(6)
-#define M_SCD_TRACE_CFG_FULL _SB_MAKEMASK1(7)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_SCD_TRACE_CFG_FORCECNT _SB_MAKEMASK1(8)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_SCD_TRACE_CFG_CUR_ADDR 10
-#define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8,S_SCD_TRACE_CFG_CUR_ADDR)
-#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR)
-#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR)
-
-/*
- * Trace Event registers
- */
-
-#define S_SCD_TREVT_ADDR_MATCH 0
-#define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4,S_SCD_TREVT_ADDR_MATCH)
-#define V_SCD_TREVT_ADDR_MATCH(x) _SB_MAKEVALUE(x,S_SCD_TREVT_ADDR_MATCH)
-#define G_SCD_TREVT_ADDR_MATCH(x) _SB_GETVALUE(x,S_SCD_TREVT_ADDR_MATCH,M_SCD_TREVT_ADDR_MATCH)
-
-#define M_SCD_TREVT_REQID_MATCH _SB_MAKEMASK1(4)
-#define M_SCD_TREVT_DATAID_MATCH _SB_MAKEMASK1(5)
-#define M_SCD_TREVT_RESPID_MATCH _SB_MAKEMASK1(6)
-#define M_SCD_TREVT_INTERRUPT _SB_MAKEMASK1(7)
-#define M_SCD_TREVT_DEBUG_PIN _SB_MAKEMASK1(9)
-#define M_SCD_TREVT_WRITE _SB_MAKEMASK1(10)
-#define M_SCD_TREVT_READ _SB_MAKEMASK1(11)
-
-#define S_SCD_TREVT_REQID 12
-#define M_SCD_TREVT_REQID _SB_MAKEMASK(4,S_SCD_TREVT_REQID)
-#define V_SCD_TREVT_REQID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_REQID)
-#define G_SCD_TREVT_REQID(x) _SB_GETVALUE(x,S_SCD_TREVT_REQID,M_SCD_TREVT_REQID)
-
-#define S_SCD_TREVT_RESPID 16
-#define M_SCD_TREVT_RESPID _SB_MAKEMASK(4,S_SCD_TREVT_RESPID)
-#define V_SCD_TREVT_RESPID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_RESPID)
-#define G_SCD_TREVT_RESPID(x) _SB_GETVALUE(x,S_SCD_TREVT_RESPID,M_SCD_TREVT_RESPID)
-
-#define S_SCD_TREVT_DATAID 20
-#define M_SCD_TREVT_DATAID _SB_MAKEMASK(4,S_SCD_TREVT_DATAID)
-#define V_SCD_TREVT_DATAID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_DATAID)
-#define G_SCD_TREVT_DATAID(x) _SB_GETVALUE(x,S_SCD_TREVT_DATAID,M_SCD_TREVT_DATID)
-
-#define S_SCD_TREVT_COUNT 24
-#define M_SCD_TREVT_COUNT _SB_MAKEMASK(8,S_SCD_TREVT_COUNT)
-#define V_SCD_TREVT_COUNT(x) _SB_MAKEVALUE(x,S_SCD_TREVT_COUNT)
-#define G_SCD_TREVT_COUNT(x) _SB_GETVALUE(x,S_SCD_TREVT_COUNT,M_SCD_TREVT_COUNT)
-
-/*
- * Trace Sequence registers
- */
-
-#define S_SCD_TRSEQ_EVENT4 0
-#define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT4)
-#define V_SCD_TRSEQ_EVENT4(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT4)
-#define G_SCD_TRSEQ_EVENT4(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT4,M_SCD_TRSEQ_EVENT4)
-
-#define S_SCD_TRSEQ_EVENT3 4
-#define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT3)
-#define V_SCD_TRSEQ_EVENT3(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT3)
-#define G_SCD_TRSEQ_EVENT3(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT3,M_SCD_TRSEQ_EVENT3)
-
-#define S_SCD_TRSEQ_EVENT2 8
-#define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT2)
-#define V_SCD_TRSEQ_EVENT2(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT2)
-#define G_SCD_TRSEQ_EVENT2(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT2,M_SCD_TRSEQ_EVENT2)
-
-#define S_SCD_TRSEQ_EVENT1 12
-#define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT1)
-#define V_SCD_TRSEQ_EVENT1(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT1)
-#define G_SCD_TRSEQ_EVENT1(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT1,M_SCD_TRSEQ_EVENT1)
-
-#define K_SCD_TRSEQ_E0 0
-#define K_SCD_TRSEQ_E1 1
-#define K_SCD_TRSEQ_E2 2
-#define K_SCD_TRSEQ_E3 3
-#define K_SCD_TRSEQ_E0_E1 4
-#define K_SCD_TRSEQ_E1_E2 5
-#define K_SCD_TRSEQ_E2_E3 6
-#define K_SCD_TRSEQ_E0_E1_E2 7
-#define K_SCD_TRSEQ_E0_E1_E2_E3 8
-#define K_SCD_TRSEQ_E0E1 9
-#define K_SCD_TRSEQ_E0E1E2 10
-#define K_SCD_TRSEQ_E0E1E2E3 11
-#define K_SCD_TRSEQ_E0E1_E2 12
-#define K_SCD_TRSEQ_E0E1_E2E3 13
-#define K_SCD_TRSEQ_E0E1_E2_E3 14
-#define K_SCD_TRSEQ_IGNORED 15
-
-#define K_SCD_TRSEQ_TRIGGER_ALL (V_SCD_TRSEQ_EVENT1(K_SCD_TRSEQ_IGNORED) | \
- V_SCD_TRSEQ_EVENT2(K_SCD_TRSEQ_IGNORED) | \
- V_SCD_TRSEQ_EVENT3(K_SCD_TRSEQ_IGNORED) | \
- V_SCD_TRSEQ_EVENT4(K_SCD_TRSEQ_IGNORED))
-
-#define S_SCD_TRSEQ_FUNCTION 16
-#define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4,S_SCD_TRSEQ_FUNCTION)
-#define V_SCD_TRSEQ_FUNCTION(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_FUNCTION)
-#define G_SCD_TRSEQ_FUNCTION(x) _SB_GETVALUE(x,S_SCD_TRSEQ_FUNCTION,M_SCD_TRSEQ_FUNCTION)
-
-#define K_SCD_TRSEQ_FUNC_NOP 0
-#define K_SCD_TRSEQ_FUNC_START 1
-#define K_SCD_TRSEQ_FUNC_STOP 2
-#define K_SCD_TRSEQ_FUNC_FREEZE 3
-
-#define V_SCD_TRSEQ_FUNC_NOP V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_NOP)
-#define V_SCD_TRSEQ_FUNC_START V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_START)
-#define V_SCD_TRSEQ_FUNC_STOP V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_STOP)
-#define V_SCD_TRSEQ_FUNC_FREEZE V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_FREEZE)
-
-#define M_SCD_TRSEQ_ASAMPLE _SB_MAKEMASK1(18)
-#define M_SCD_TRSEQ_DSAMPLE _SB_MAKEMASK1(19)
-#define M_SCD_TRSEQ_DEBUGPIN _SB_MAKEMASK1(20)
-#define M_SCD_TRSEQ_DEBUGCPU _SB_MAKEMASK1(21)
-#define M_SCD_TRSEQ_CLEARUSE _SB_MAKEMASK1(22)
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_smbus.h b/include/asm-mips64/sibyte/sb1250_smbus.h
--- a/include/asm-mips64/sibyte/sb1250_smbus.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,170 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * SMBUS Constants File: sb1250_smbus.h
- *
- * This module contains constants and macros useful for
- * manipulating the SB1250's SMbus devices.
- *
- * SB1250 specification level: 01/02/2002
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_SMBUS_H
-#define _SB1250_SMBUS_H
-
-#include "sb1250_defs.h"
-
-/*
- * SMBus Clock Frequency Register (Table 14-2)
- */
-
-#define S_SMB_FREQ_DIV 0
-#define M_SMB_FREQ_DIV _SB_MAKEMASK(13,S_SMB_FREQ_DIV)
-#define V_SMB_FREQ_DIV(x) _SB_MAKEVALUE(x,S_SMB_FREQ_DIV)
-
-#define K_SMB_FREQ_400KHZ 0x1F
-#define K_SMB_FREQ_100KHZ 0x7D
-
-#define S_SMB_CMD 0
-#define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD)
-#define V_SMB_CMD(x) _SB_MAKEVALUE(x,S_SMB_CMD)
-
-/*
- * SMBus control register (Table 14-4)
- */
-
-#define M_SMB_ERR_INTR _SB_MAKEMASK1(0)
-#define M_SMB_FINISH_INTR _SB_MAKEMASK1(1)
-#define M_SMB_DATA_OUT _SB_MAKEMASK1(4)
-#define M_SMB_DATA_DIR _SB_MAKEMASK1(5)
-#define M_SMB_DATA_DIR_OUTPUT M_SMB_DATA_DIR
-#define M_SMB_CLK_OUT _SB_MAKEMASK1(6)
-#define M_SMB_DIRECT_ENABLE _SB_MAKEMASK1(7)
-
-/*
- * SMBus status registers (Table 14-5)
- */
-
-#define M_SMB_BUSY _SB_MAKEMASK1(0)
-#define M_SMB_ERROR _SB_MAKEMASK1(1)
-#define M_SMB_ERROR_TYPE _SB_MAKEMASK1(2)
-#define M_SMB_REF _SB_MAKEMASK1(6)
-#define M_SMB_DATA_IN _SB_MAKEMASK1(7)
-
-/*
- * SMBus Start/Command registers (Table 14-9)
- */
-
-#define S_SMB_ADDR 0
-#define M_SMB_ADDR _SB_MAKEMASK(7,S_SMB_ADDR)
-#define V_SMB_ADDR(x) _SB_MAKEVALUE(x,S_SMB_ADDR)
-#define G_SMB_ADDR(x) _SB_GETVALUE(x,S_SMB_ADDR,M_SMB_ADDR)
-
-#define M_SMB_QDATA _SB_MAKEMASK1(7)
-
-#define S_SMB_TT 8
-#define M_SMB_TT _SB_MAKEMASK(3,S_SMB_TT)
-#define V_SMB_TT(x) _SB_MAKEVALUE(x,S_SMB_TT)
-#define G_SMB_TT(x) _SB_GETVALUE(x,S_SMB_TT,M_SMB_TT)
-
-#define K_SMB_TT_WR1BYTE 0
-#define K_SMB_TT_WR2BYTE 1
-#define K_SMB_TT_WR3BYTE 2
-#define K_SMB_TT_CMD_RD1BYTE 3
-#define K_SMB_TT_CMD_RD2BYTE 4
-#define K_SMB_TT_RD1BYTE 5
-#define K_SMB_TT_QUICKCMD 6
-#define K_SMB_TT_EEPROMREAD 7
-
-#define V_SMB_TT_WR1BYTE V_SMB_TT(K_SMB_TT_WR1BYTE)
-#define V_SMB_TT_WR2BYTE V_SMB_TT(K_SMB_TT_WR2BYTE)
-#define V_SMB_TT_WR3BYTE V_SMB_TT(K_SMB_TT_WR3BYTE)
-#define V_SMB_TT_CMD_RD1BYTE V_SMB_TT(K_SMB_TT_CMD_RD1BYTE)
-#define V_SMB_TT_CMD_RD2BYTE V_SMB_TT(K_SMB_TT_CMD_RD2BYTE)
-#define V_SMB_TT_RD1BYTE V_SMB_TT(K_SMB_TT_RD1BYTE)
-#define V_SMB_TT_QUICKCMD V_SMB_TT(K_SMB_TT_QUICKCMD)
-#define V_SMB_TT_EEPROMREAD V_SMB_TT(K_SMB_TT_EEPROMREAD)
-
-#define M_SMB_PEC _SB_MAKEMASK1(15)
-
-/*
- * SMBus Data Register (Table 14-6) and SMBus Extra Register (Table 14-7)
- */
-
-#define S_SMB_LB 0
-#define M_SMB_LB _SB_MAKEMASK(8,S_SMB_LB)
-#define V_SMB_LB(x) _SB_MAKEVALUE(x,S_SMB_LB)
-
-#define S_SMB_MB 8
-#define M_SMB_MB _SB_MAKEMASK(8,S_SMB_MB)
-#define V_SMB_MB(x) _SB_MAKEVALUE(x,S_SMB_MB)
-
-
-/*
- * SMBus Packet Error Check register (Table 14-8)
- */
-
-#define S_SPEC_PEC 0
-#define M_SPEC_PEC _SB_MAKEMASK(8,S_SPEC_PEC)
-#define V_SPEC_MB(x) _SB_MAKEVALUE(x,S_SPEC_PEC)
-
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-
-#define S_SMB_CMDH 8
-#define M_SMB_CMDH _SB_MAKEMASK(8,S_SMBH_CMD)
-#define V_SMB_CMDH(x) _SB_MAKEVALUE(x,S_SMBH_CMD)
-
-#define M_SMB_EXTEND _SB_MAKEMASK1(14)
-
-#define M_SMB_DIR _SB_MAKEMASK1(13)
-
-#define S_SMB_DFMT 8
-#define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT)
-#define V_SMB_DFMT(x) _SB_MAKEVALUE(x,S_SMB_DFMT)
-#define G_SMB_DFMT(x) _SB_GETVALUE(x,S_SMB_DFMT,M_SMB_DFMT)
-
-#define K_SMB_DFMT_1BYTE 0
-#define K_SMB_DFMT_2BYTE 1
-#define K_SMB_DFMT_3BYTE 2
-#define K_SMB_DFMT_4BYTE 3
-#define K_SMB_DFMT_NODATA 4
-#define K_SMB_DFMT_CMD4BYTE 5
-#define K_SMB_DFMT_CMD5BYTE 6
-#define K_SMB_DFMT_RESERVED 7
-
-#define V_SMB_DFMT_1BYTE V_SMB_DFMT(K_SMB_DFMT_1BYTE)
-#define V_SMB_DFMT_2BYTE V_SMB_DFMT(K_SMB_DFMT_2BYTE)
-#define V_SMB_DFMT_3BYTE V_SMB_DFMT(K_SMB_DFMT_3BYTE)
-#define V_SMB_DFMT_4BYTE V_SMB_DFMT(K_SMB_DFMT_4BYTE)
-#define V_SMB_DFMT_NODATA V_SMB_DFMT(K_SMB_DFMT_NODATA)
-#define V_SMB_DFMT_CMD4BYTE V_SMB_DFMT(K_SMB_DFMT_CMD4BYTE)
-#define V_SMB_DFMT_CMD5BYTE V_SMB_DFMT(K_SMB_DFMT_CMD5BYTE)
-#define V_SMB_DFMT_RESERVED V_SMB_DFMT(K_SMB_DFMT_RESERVED)
-
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_syncser.h b/include/asm-mips64/sibyte/sb1250_syncser.h
--- a/include/asm-mips64/sibyte/sb1250_syncser.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,148 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * Synchronous Serial Constants File: sb1250_syncser.h
- *
- * This module contains constants and macros useful for
- * manipulating the SB1250's Synchronous Serial
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_SYNCSER_H
-#define _SB1250_SYNCSER_H
-
-#include "sb1250_defs.h"
-
-/*
- * Serial Mode Configuration Register
- */
-
-#define M_SYNCSER_CRC_MODE _SB_MAKEMASK1(0)
-#define M_SYNCSER_MSB_FIRST _SB_MAKEMASK1(1)
-
-#define S_SYNCSER_FLAG_NUM 2
-#define M_SYNCSER_FLAG_NUM _SB_MAKEMASK(4,S_SYNCSER_FLAG_NUM)
-#define V_SYNCSER_FLAG_NUM _SB_MAKEVALUE(x,S_SYNCSER_FLAG_NUM)
-
-#define M_SYNCSER_FLAG_EN _SB_MAKEMASK1(6)
-#define M_SYNCSER_HDLC_EN _SB_MAKEMASK1(7)
-#define M_SYNCSER_LOOP_MODE _SB_MAKEMASK1(8)
-#define M_SYNCSER_LOOPBACK _SB_MAKEMASK1(9)
-
-/*
- * Serial Clock Source and Line Interface Mode Register
- */
-
-#define M_SYNCSER_RXCLK_INV _SB_MAKEMASK1(0)
-#define M_SYNCSER_RXCLK_EXT _SB_MAKEMASK1(1)
-
-#define S_SYNCSER_RXSYNC_DLY 2
-#define M_SYNCSER_RXSYNC_DLY _SB_MAKEMASK(2,S_SYNCSER_RXSYNC_DLY)
-#define V_SYNCSER_RXSYNC_DLY(x) _SB_MAKEVALUE(x,S_SYNCSER_RXSYNC_DLY)
-
-#define M_SYNCSER_RXSYNC_LOW _SB_MAKEMASK1(4)
-#define M_SYNCSER_RXSTRB_LOW _SB_MAKEMASK1(5)
-
-#define M_SYNCSER_RXSYNC_EDGE _SB_MAKEMASK1(6)
-#define M_SYNCSER_RXSYNC_INT _SB_MAKEMASK1(7)
-
-#define M_SYNCSER_TXCLK_INV _SB_MAKEMASK1(8)
-#define M_SYNCSER_TXCLK_EXT _SB_MAKEMASK1(9)
-
-#define S_SYNCSER_TXSYNC_DLY 10
-#define M_SYNCSER_TXSYNC_DLY _SB_MAKEMASK(2,S_SYNCSER_TXSYNC_DLY)
-#define V_SYNCSER_TXSYNC_DLY(x) _SB_MAKEVALUE(x,S_SYNCSER_TXSYNC_DLY)
-
-#define M_SYNCSER_TXSYNC_LOW _SB_MAKEMASK1(12)
-#define M_SYNCSER_TXSTRB_LOW _SB_MAKEMASK1(13)
-
-#define M_SYNCSER_TXSYNC_EDGE _SB_MAKEMASK1(14)
-#define M_SYNCSER_TXSYNC_INT _SB_MAKEMASK1(15)
-
-/*
- * Serial Command Register
- */
-
-#define M_SYNCSER_CMD_RX_EN _SB_MAKEMASK1(0)
-#define M_SYNCSER_CMD_TX_EN _SB_MAKEMASK1(1)
-#define M_SYNCSER_CMD_RX_RESET _SB_MAKEMASK1(2)
-#define M_SYNCSER_CMD_TX_RESET _SB_MAKEMASK1(3)
-#define M_SYNCSER_CMD_TX_PAUSE _SB_MAKEMASK1(5)
-
-/*
- * Serial DMA Enable Register
- */
-
-#define M_SYNCSER_DMA_RX_EN _SB_MAKEMASK1(0)
-#define M_SYNCSER_DMA_TX_EN _SB_MAKEMASK1(4)
-
-/*
- * Serial Status Register
- */
-
-#define M_SYNCSER_RX_CRCERR _SB_MAKEMASK1(0)
-#define M_SYNCSER_RX_ABORT _SB_MAKEMASK1(1)
-#define M_SYNCSER_RX_OCTET _SB_MAKEMASK1(2)
-#define M_SYNCSER_RX_LONGFRM _SB_MAKEMASK1(3)
-#define M_SYNCSER_RX_SHORTFRM _SB_MAKEMASK1(4)
-#define M_SYNCSER_RX_OVERRUN _SB_MAKEMASK1(5)
-#define M_SYNCSER_RX_SYNC_ERR _SB_MAKEMASK1(6)
-#define M_SYNCSER_TX_CRCERR _SB_MAKEMASK1(8)
-#define M_SYNCSER_TX_UNDERRUN _SB_MAKEMASK1(9)
-#define M_SYNCSER_TX_SYNC_ERR _SB_MAKEMASK1(10)
-#define M_SYNCSER_TX_PAUSE_COMPLETE _SB_MAKEMASK1(11)
-#define M_SYNCSER_RX_EOP_COUNT _SB_MAKEMASK1(16)
-#define M_SYNCSER_RX_EOP_TIMER _SB_MAKEMASK1(17)
-#define M_SYNCSER_RX_EOP_SEEN _SB_MAKEMASK1(18)
-#define M_SYNCSER_RX_HWM _SB_MAKEMASK1(19)
-#define M_SYNCSER_RX_LWM _SB_MAKEMASK1(20)
-#define M_SYNCSER_RX_DSCR _SB_MAKEMASK1(21)
-#define M_SYNCSER_RX_DERR _SB_MAKEMASK1(22)
-#define M_SYNCSER_TX_EOP_COUNT _SB_MAKEMASK1(24)
-#define M_SYNCSER_TX_EOP_TIMER _SB_MAKEMASK1(25)
-#define M_SYNCSER_TX_EOP_SEEN _SB_MAKEMASK1(26)
-#define M_SYNCSER_TX_HWM _SB_MAKEMASK1(27)
-#define M_SYNCSER_TX_LWM _SB_MAKEMASK1(28)
-#define M_SYNCSER_TX_DSCR _SB_MAKEMASK1(29)
-#define M_SYNCSER_TX_DERR _SB_MAKEMASK1(30)
-#define M_SYNCSER_TX_DZERO _SB_MAKEMASK1(31)
-
-/*
- * Sequencer Table Entry format
- */
-
-#define M_SYNCSER_SEQ_LAST _SB_MAKEMASK1(0)
-#define M_SYNCSER_SEQ_BYTE _SB_MAKEMASK1(1)
-
-#define S_SYNCSER_SEQ_COUNT 2
-#define M_SYNCSER_SEQ_COUNT _SB_MAKEMASK(4,S_SYNCSER_SEQ_COUNT)
-#define V_SYNCSER_SEQ_COUNT(x) _SB_MAKEVALUE(x,S_SYNCSER_SEQ_COUNT)
-
-#define M_SYNCSER_SEQ_ENABLE _SB_MAKEMASK1(6)
-#define M_SYNCSER_SEQ_STROBE _SB_MAKEMASK1(7)
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sb1250_uart.h b/include/asm-mips64/sibyte/sb1250_uart.h
--- a/include/asm-mips64/sibyte/sb1250_uart.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,354 +0,0 @@
-/* *********************************************************************
- * SB1250 Board Support Package
- *
- * UART Constants File: sb1250_uart.h
- *
- * This module contains constants and macros useful for
- * manipulating the SB1250's UARTs
- *
- * SB1250 specification level: User's manual 1/02/02
- *
- * Author: Mitch Lichtenberg (mpl@broadcom.com)
- *
- *********************************************************************
- *
- * Copyright 2000,2001,2002,2003
- * Broadcom Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ********************************************************************* */
-
-
-#ifndef _SB1250_UART_H
-#define _SB1250_UART_H
-
-#include "sb1250_defs.h"
-
-/* **********************************************************************
- * DUART Registers
- ********************************************************************** */
-
-/*
- * DUART Mode Register #1 (Table 10-3)
- * Register: DUART_MODE_REG_1_A
- * Register: DUART_MODE_REG_1_B
- */
-
-#define S_DUART_BITS_PER_CHAR 0
-#define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR)
-#define V_DUART_BITS_PER_CHAR(x) _SB_MAKEVALUE(x,S_DUART_BITS_PER_CHAR)
-
-#define K_DUART_BITS_PER_CHAR_RSV0 0
-#define K_DUART_BITS_PER_CHAR_RSV1 1
-#define K_DUART_BITS_PER_CHAR_7 2
-#define K_DUART_BITS_PER_CHAR_8 3
-
-#define V_DUART_BITS_PER_CHAR_RSV0 V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV0)
-#define V_DUART_BITS_PER_CHAR_RSV1 V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV1)
-#define V_DUART_BITS_PER_CHAR_7 V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_7)
-#define V_DUART_BITS_PER_CHAR_8 V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_8)
-
-
-#define M_DUART_PARITY_TYPE_EVEN 0x00
-#define M_DUART_PARITY_TYPE_ODD _SB_MAKEMASK1(2)
-
-#define S_DUART_PARITY_MODE 3
-#define M_DUART_PARITY_MODE _SB_MAKEMASK(2,S_DUART_PARITY_MODE)
-#define V_DUART_PARITY_MODE(x) _SB_MAKEVALUE(x,S_DUART_PARITY_MODE)
-
-#define K_DUART_PARITY_MODE_ADD 0
-#define K_DUART_PARITY_MODE_ADD_FIXED 1
-#define K_DUART_PARITY_MODE_NONE 2
-
-#define V_DUART_PARITY_MODE_ADD V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD)
-#define V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED)
-#define V_DUART_PARITY_MODE_NONE V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE)
-
-#define M_DUART_ERR_MODE _SB_MAKEMASK1(5) /* must be zero */
-
-#define M_DUART_RX_IRQ_SEL_RXRDY 0
-#define M_DUART_RX_IRQ_SEL_RXFULL _SB_MAKEMASK1(6)
-
-#define M_DUART_RX_RTS_ENA _SB_MAKEMASK1(7)
-
-/*
- * DUART Mode Register #2 (Table 10-4)
- * Register: DUART_MODE_REG_2_A
- * Register: DUART_MODE_REG_2_B
- */
-
-#define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3,0) /* ignored */
-
-#define M_DUART_STOP_BIT_LEN_2 _SB_MAKEMASK1(3)
-#define M_DUART_STOP_BIT_LEN_1 0
-
-#define M_DUART_TX_CTS_ENA _SB_MAKEMASK1(4)
-
-
-#define M_DUART_MODE_RESERVED2 _SB_MAKEMASK1(5) /* must be zero */
-
-#define S_DUART_CHAN_MODE 6
-#define M_DUART_CHAN_MODE _SB_MAKEMASK(2,S_DUART_CHAN_MODE)
-#define V_DUART_CHAN_MODE(x) _SB_MAKEVALUE(x,S_DUART_CHAN_MODE)
-
-#define K_DUART_CHAN_MODE_NORMAL 0
-#define K_DUART_CHAN_MODE_LCL_LOOP 2
-#define K_DUART_CHAN_MODE_REM_LOOP 3
-
-#define V_DUART_CHAN_MODE_NORMAL V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_NORMAL)
-#define V_DUART_CHAN_MODE_LCL_LOOP V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_LCL_LOOP)
-#define V_DUART_CHAN_MODE_REM_LOOP V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_REM_LOOP)
-
-/*
- * DUART Command Register (Table 10-5)
- * Register: DUART_CMD_A
- * Register: DUART_CMD_B
- */
-
-#define M_DUART_RX_EN _SB_MAKEMASK1(0)
-#define M_DUART_RX_DIS _SB_MAKEMASK1(1)
-#define M_DUART_TX_EN _SB_MAKEMASK1(2)
-#define M_DUART_TX_DIS _SB_MAKEMASK1(3)
-
-#define S_DUART_MISC_CMD 4
-#define M_DUART_MISC_CMD _SB_MAKEMASK(3,S_DUART_MISC_CMD)
-#define V_DUART_MISC_CMD(x) _SB_MAKEVALUE(x,S_DUART_MISC_CMD)
-
-#define K_DUART_MISC_CMD_NOACTION0 0
-#define K_DUART_MISC_CMD_NOACTION1 1
-#define K_DUART_MISC_CMD_RESET_RX 2
-#define K_DUART_MISC_CMD_RESET_TX 3
-#define K_DUART_MISC_CMD_NOACTION4 4
-#define K_DUART_MISC_CMD_RESET_BREAK_INT 5
-#define K_DUART_MISC_CMD_START_BREAK 6
-#define K_DUART_MISC_CMD_STOP_BREAK 7
-
-#define V_DUART_MISC_CMD_NOACTION0 V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION0)
-#define V_DUART_MISC_CMD_NOACTION1 V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION1)
-#define V_DUART_MISC_CMD_RESET_RX V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_RX)
-#define V_DUART_MISC_CMD_RESET_TX V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_TX)
-#define V_DUART_MISC_CMD_NOACTION4 V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION4)
-#define V_DUART_MISC_CMD_RESET_BREAK_INT V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_BREAK_INT)
-#define V_DUART_MISC_CMD_START_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
-#define V_DUART_MISC_CMD_STOP_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
-
-#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7)
-
-/*
- * DUART Status Register (Table 10-6)
- * Register: DUART_STATUS_A
- * Register: DUART_STATUS_B
- * READ-ONLY
- */
-
-#define M_DUART_RX_RDY _SB_MAKEMASK1(0)
-#define M_DUART_RX_FFUL _SB_MAKEMASK1(1)
-#define M_DUART_TX_RDY _SB_MAKEMASK1(2)
-#define M_DUART_TX_EMT _SB_MAKEMASK1(3)
-#define M_DUART_OVRUN_ERR _SB_MAKEMASK1(4)
-#define M_DUART_PARITY_ERR _SB_MAKEMASK1(5)
-#define M_DUART_FRM_ERR _SB_MAKEMASK1(6)
-#define M_DUART_RCVD_BRK _SB_MAKEMASK1(7)
-
-/*
- * DUART Baud Rate Register (Table 10-7)
- * Register: DUART_CLK_SEL_A
- * Register: DUART_CLK_SEL_B
- */
-
-#define M_DUART_CLK_COUNTER _SB_MAKEMASK(12,0)
-#define V_DUART_BAUD_RATE(x) (100000000/((x)*20)-1)
-
-/*
- * DUART Data Registers (Table 10-8 and 10-9)
- * Register: DUART_RX_HOLD_A
- * Register: DUART_RX_HOLD_B
- * Register: DUART_TX_HOLD_A
- * Register: DUART_TX_HOLD_B
- */
-
-#define M_DUART_RX_DATA _SB_MAKEMASK(8,0)
-#define M_DUART_TX_DATA _SB_MAKEMASK(8,0)
-
-/*
- * DUART Input Port Register (Table 10-10)
- * Register: DUART_IN_PORT
- */
-
-#define M_DUART_IN_PIN0_VAL _SB_MAKEMASK1(0)
-#define M_DUART_IN_PIN1_VAL _SB_MAKEMASK1(1)
-#define M_DUART_IN_PIN2_VAL _SB_MAKEMASK1(2)
-#define M_DUART_IN_PIN3_VAL _SB_MAKEMASK1(3)
-#define M_DUART_IN_PIN4_VAL _SB_MAKEMASK1(4)
-#define M_DUART_IN_PIN5_VAL _SB_MAKEMASK1(5)
-#define M_DUART_RIN0_PIN _SB_MAKEMASK1(6)
-#define M_DUART_RIN1_PIN _SB_MAKEMASK1(7)
-
-/*
- * DUART Input Port Change Status Register (Tables 10-11, 10-12, and 10-13)
- * Register: DUART_INPORT_CHNG
- */
-
-#define S_DUART_IN_PIN_VAL 0
-#define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL)
-
-#define S_DUART_IN_PIN_CHNG 4
-#define M_DUART_IN_PIN_CHNG _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG)
-
-
-/*
- * DUART Output port control register (Table 10-14)
- * Register: DUART_OPCR
- */
-
-#define M_DUART_OPCR_RESERVED0 _SB_MAKEMASK1(0) /* must be zero */
-#define M_DUART_OPC2_SEL _SB_MAKEMASK1(1)
-#define M_DUART_OPCR_RESERVED1 _SB_MAKEMASK1(2) /* must be zero */
-#define M_DUART_OPC3_SEL _SB_MAKEMASK1(3)
-#define M_DUART_OPCR_RESERVED2 _SB_MAKEMASK(4,4) /* must be zero */
-
-/*
- * DUART Aux Control Register (Table 10-15)
- * Register: DUART_AUX_CTRL
- */
-
-#define M_DUART_IP0_CHNG_ENA _SB_MAKEMASK1(0)
-#define M_DUART_IP1_CHNG_ENA _SB_MAKEMASK1(1)
-#define M_DUART_IP2_CHNG_ENA _SB_MAKEMASK1(2)
-#define M_DUART_IP3_CHNG_ENA _SB_MAKEMASK1(3)
-#define M_DUART_ACR_RESERVED _SB_MAKEMASK(4,4)
-
-#define M_DUART_CTS_CHNG_ENA _SB_MAKEMASK1(0)
-#define M_DUART_CIN_CHNG_ENA _SB_MAKEMASK1(2)
-
-/*
- * DUART Interrupt Status Register (Table 10-16)
- * Register: DUART_ISR
- */
-
-#define M_DUART_ISR_TX_A _SB_MAKEMASK1(0)
-#define M_DUART_ISR_RX_A _SB_MAKEMASK1(1)
-#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2)
-#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3)
-#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4)
-#define M_DUART_ISR_RX_B _SB_MAKEMASK1(5)
-#define M_DUART_ISR_BRK_B _SB_MAKEMASK1(6)
-#define M_DUART_ISR_IN_B _SB_MAKEMASK1(7)
-
-/*
- * DUART Channel A Interrupt Status Register (Table 10-17)
- * DUART Channel B Interrupt Status Register (Table 10-18)
- * Register: DUART_ISR_A
- * Register: DUART_ISR_B
- */
-
-#define M_DUART_ISR_TX _SB_MAKEMASK1(0)
-#define M_DUART_ISR_RX _SB_MAKEMASK1(1)
-#define M_DUART_ISR_BRK _SB_MAKEMASK1(2)
-#define M_DUART_ISR_IN _SB_MAKEMASK1(3)
-#define M_DUART_ISR_RESERVED _SB_MAKEMASK(4,4)
-
-/*
- * DUART Interrupt Mask Register (Table 10-19)
- * Register: DUART_IMR
- */
-
-#define M_DUART_IMR_TX_A _SB_MAKEMASK1(0)
-#define M_DUART_IMR_RX_A _SB_MAKEMASK1(1)
-#define M_DUART_IMR_BRK_A _SB_MAKEMASK1(2)
-#define M_DUART_IMR_IN_A _SB_MAKEMASK1(3)
-#define M_DUART_IMR_ALL_A _SB_MAKEMASK(4,0)
-
-#define M_DUART_IMR_TX_B _SB_MAKEMASK1(4)
-#define M_DUART_IMR_RX_B _SB_MAKEMASK1(5)
-#define M_DUART_IMR_BRK_B _SB_MAKEMASK1(6)
-#define M_DUART_IMR_IN_B _SB_MAKEMASK1(7)
-#define M_DUART_IMR_ALL_B _SB_MAKEMASK(4,4)
-
-/*
- * DUART Channel A Interrupt Mask Register (Table 10-20)
- * DUART Channel B Interrupt Mask Register (Table 10-21)
- * Register: DUART_IMR_A
- * Register: DUART_IMR_B
- */
-
-#define M_DUART_IMR_TX _SB_MAKEMASK1(0)
-#define M_DUART_IMR_RX _SB_MAKEMASK1(1)
-#define M_DUART_IMR_BRK _SB_MAKEMASK1(2)
-#define M_DUART_IMR_IN _SB_MAKEMASK1(3)
-#define M_DUART_IMR_ALL _SB_MAKEMASK(4,0)
-#define M_DUART_IMR_RESERVED _SB_MAKEMASK(4,4)
-
-
-/*
- * DUART Output Port Set Register (Table 10-22)
- * Register: DUART_SET_OPR
- */
-
-#define M_DUART_SET_OPR0 _SB_MAKEMASK1(0)
-#define M_DUART_SET_OPR1 _SB_MAKEMASK1(1)
-#define M_DUART_SET_OPR2 _SB_MAKEMASK1(2)
-#define M_DUART_SET_OPR3 _SB_MAKEMASK1(3)
-#define M_DUART_OPSR_RESERVED _SB_MAKEMASK(4,4)
-
-/*
- * DUART Output Port Clear Register (Table 10-23)
- * Register: DUART_CLEAR_OPR
- */
-
-#define M_DUART_CLR_OPR0 _SB_MAKEMASK1(0)
-#define M_DUART_CLR_OPR1 _SB_MAKEMASK1(1)
-#define M_DUART_CLR_OPR2 _SB_MAKEMASK1(2)
-#define M_DUART_CLR_OPR3 _SB_MAKEMASK1(3)
-#define M_DUART_OPCR_RESERVED _SB_MAKEMASK(4,4)
-
-/*
- * DUART Output Port RTS Register (Table 10-24)
- * Register: DUART_OUT_PORT
- */
-
-#define M_DUART_OUT_PIN_SET0 _SB_MAKEMASK1(0)
-#define M_DUART_OUT_PIN_SET1 _SB_MAKEMASK1(1)
-#define M_DUART_OUT_PIN_CLR0 _SB_MAKEMASK1(2)
-#define M_DUART_OUT_PIN_CLR1 _SB_MAKEMASK1(3)
-#define M_DUART_OPRR_RESERVED _SB_MAKEMASK(4,4)
-
-#define M_DUART_OUT_PIN_SET(chan) \
- (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1)
-#define M_DUART_OUT_PIN_CLR(chan) \
- (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-/*
- * Full Interrupt Control Register
- */
-
-#define S_DUART_SIG_FULL _SB_MAKE64(0)
-#define M_DUART_SIG_FULL _SB_MAKEMASK(4,S_DUART_SIG_FULL)
-#define V_DUART_SIG_FULL(x) _SB_MAKEVALUE(x,S_DUART_SIG_FULL)
-#define G_DUART_SIG_FULL(x) _SB_GETVALUE(x,S_DUART_SIG_FULL,M_DUART_SIG_FULL)
-
-#define S_DUART_INT_TIME _SB_MAKE64(4)
-#define M_DUART_INT_TIME _SB_MAKEMASK(4,S_DUART_INT_TIME)
-#define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x,S_DUART_INT_TIME)
-#define G_DUART_INT_TIME(x) _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/* ********************************************************************** */
-
-
-#endif
diff -Nru a/include/asm-mips64/sibyte/sentosa.h b/include/asm-mips64/sibyte/sentosa.h
--- a/include/asm-mips64/sibyte/sentosa.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,40 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#ifndef __ASM_SIBYTE_SENTOSA_H
-#define __ASM_SIBYTE_SENTOSA_H
-
-#include <asm/sibyte/sb1250.h>
-#include <asm/sibyte/sb1250_int.h>
-
-#ifdef CONFIG_SIBYTE_SENTOSA
-#define SIBYTE_BOARD_NAME "BCM91250E (Sentosa)"
-#endif
-#ifdef CONFIG_SIBYTE_RHONE
-#define SIBYTE_BOARD_NAME "BCM91125E (Rhone)"
-#endif
-
-/* Generic bus chip selects */
-#ifdef CONFIG_SIBYTE_RHONE
-#define LEDS_CS 6
-#define LEDS_PHYS 0x1d0a0000
-#endif
-
-/* GPIOs */
-#define K_GPIO_DBG_LED 0
-
-#endif /* __ASM_SIBYTE_SENTOSA_H */
diff -Nru a/include/asm-mips64/sibyte/swarm.h b/include/asm-mips64/sibyte/swarm.h
--- a/include/asm-mips64/sibyte/swarm.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,55 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#ifndef __ASM_SIBYTE_SWARM_H
-#define __ASM_SIBYTE_SWARM_H
-
-#include <asm/sibyte/sb1250.h>
-#include <asm/sibyte/sb1250_int.h>
-
-#ifdef CONFIG_SIBYTE_SWARM
-#define SIBYTE_BOARD_NAME "BCM91250A (SWARM)"
-#endif
-#ifdef CONFIG_SIBYTE_PTSWARM
-#define SIBYTE_BOARD_NAME "PTSWARM"
-#endif
-#ifdef CONFIG_SIBYTE_CRHONE
-#define SIBYTE_BOARD_NAME "BCM91125C (CRhone)"
-#endif
-#ifdef CONFIG_SIBYTE_CRHINE
-#define SIBYTE_BOARD_NAME "BCM91120C (CRhine)"
-#endif
-
-/* Generic bus chip selects */
-#define LEDS_CS 3
-#define LEDS_PHYS 0x100a0000
-#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM)
-#define IDE_CS 4
-#define IDE_PHYS 0x100b0000
-#define PCMCIA_CS 6
-#define PCMCIA_PHYS 0x11000000
-#endif
-
-/* GPIOs */
-#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM)
-#define K_GPIO_GB_IDE 4
-#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)
-#define K_GPIO_PC_READY 9
-#define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)
-#endif
-
-#endif /* __ASM_SIBYTE_SWARM_H */
diff -Nru a/include/asm-mips64/sibyte/trace_prof.h b/include/asm-mips64/sibyte/trace_prof.h
--- a/include/asm-mips64/sibyte/trace_prof.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,109 +0,0 @@
-/*
- * Copyright (C) 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef __ASM_SIBYTE_TRACE_PROF_H
-#define __ASM_SIBYTE_TRACE_PROF_H
-
-#if SBPROF_TB_DEBUG
-#define DBG(a) a
-#else
-#define DBG(a)
-#endif
-
-#define SBPROF_TB_MAJOR 240
-#define DEVNAME "bcm1250_tbprof"
-
-typedef u_int64_t tb_sample_t[6*256];
-
-struct sbprof_tb {
- int open;
- tb_sample_t *sbprof_tbbuf;
- int next_tb_sample;
-
- volatile int tb_enable;
- volatile int tb_armed;
-
- wait_queue_head_t tb_sync;
- wait_queue_head_t tb_read;
-};
-
-#define MAX_SAMPLE_BYTES (24*1024*1024)
-#define MAX_TBSAMPLE_BYTES (12*1024*1024)
-
-#define MAX_SAMPLES (MAX_SAMPLE_BYTES/sizeof(u_int32_t))
-#define TB_SAMPLE_SIZE (sizeof(tb_sample_t))
-#define MAX_TB_SAMPLES (MAX_TBSAMPLE_BYTES/TB_SAMPLE_SIZE)
-
-/* IOCTLs */
-#define SBPROF_ZBSTART _IOW('s', 0, int)
-#define SBPROF_ZBSTOP _IOW('s', 1, int)
-#define SBPROF_ZBWAITFULL _IOW('s', 2, int)
-
-/***************************************************************************
- * Routines for gathering ZBbus profiles using trace buffer
- ***************************************************************************/
-
-/* Requires: Already called zclk_timer_init with a value that won't
- saturate 40 bits. No subsequent use of SCD performance counters
- or trace buffer.
- Effect: Starts gathering random ZBbus profiles using trace buffer. */
-static int sbprof_zbprof_start(struct file *filp);
-
-/* Effect: Stops collection of ZBbus profiles */
-static int sbprof_zbprof_stop(void);
-
-
-/***************************************************************************
- * Routines for using 40-bit SCD cycle counter
- *
- * Client responsible for either handling interrupts or making sure
- * the cycles counter never saturates, e.g., by doing
- * zclk_timer_init(0) at least every 2^40 - 1 ZCLKs.
- ***************************************************************************/
-
-/* Configures SCD counter 0 to count ZCLKs starting from val;
- Configures SCD counters1,2,3 to count nothing.
- Must not be called while gathering ZBbus profiles.
-
-unsigned long long val; */
-#define zclk_timer_init(val) \
- __asm__ __volatile__ (".set push;" \
- ".set mips64;" \
- "la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \
- "sd %0, 0x10($8);" /* write val to counter0 */ \
- "sd %1, 0($8);" /* config counter0 for zclks*/ \
- ".set pop" \
- : /* no outputs */ \
- /* enable, counter0 */ \
- : /* inputs */ "r"(val), "r" ((1ULL << 33) | 1ULL) \
- : /* modifies */ "$8" )
-
-
-/* Reads SCD counter 0 and puts result in value
- unsigned long long val; */
-#define zclk_get(val) \
- __asm__ __volatile__ (".set push;" \
- ".set mips64;" \
- "la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \
- "ld %0, 0x10($8);" /* write val to counter0 */ \
- ".set pop" \
- : /* outputs */ "=r"(val) \
- : /* inputs */ \
- : /* modifies */ "$8" )
-
-#endif /* __ASM_SIBYTE_TRACE_PROF_H */
diff -Nru a/include/asm-mips64/sigcontext.h b/include/asm-mips64/sigcontext.h
--- a/include/asm-mips64/sigcontext.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,30 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SIGCONTEXT_H
-#define _ASM_SIGCONTEXT_H
-
-/*
- * Keep this struct definition in sync with the sigcontext fragment
- * in arch/mips/tools/offset.c
- */
-struct sigcontext {
- unsigned long long sc_regs[32];
- unsigned long long sc_fpregs[32];
- unsigned long long sc_mdhi;
- unsigned long long sc_mdlo;
- unsigned long long sc_pc;
- unsigned int sc_status;
- unsigned int sc_fpc_csr;
- unsigned int sc_fpc_eir;
- unsigned int sc_used_math;
- unsigned int sc_cause;
- unsigned int sc_badvaddr;
-};
-
-#endif /* _ASM_SIGCONTEXT_H */
diff -Nru a/include/asm-mips64/siginfo.h b/include/asm-mips64/siginfo.h
--- a/include/asm-mips64/siginfo.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,220 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 1999, 2001 Ralf Baechle
- * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SIGINFO_H
-#define _ASM_SIGINFO_H
-
-/* This structure matches IRIX 32/n32 ABIs for binary compatibility but
- has Linux extensions. */
-
-#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 4)
-#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 4)
-#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
-
-#define HAVE_ARCH_SIGINFO_T
-#define HAVE_ARCH_SIGEVENT_T
-
-/*
- * We duplicate the generic versions - <asm-generic/siginfo.h> is just borked
- * by design ...
- */
-#define HAVE_ARCH_COPY_SIGINFO
-struct siginfo;
-
-#include <asm-generic/siginfo.h>
-
-typedef struct siginfo {
- int si_signo;
- int si_code;
- int si_errno;
-
- union {
- int _pad[SI_PAD_SIZE];
-
- /* kill() */
- struct {
- pid_t _pid; /* sender's pid */
- uid_t _uid; /* sender's uid */
- } _kill;
-
- /* SIGCHLD */
- struct {
- pid_t _pid; /* which child */
- uid_t _uid; /* sender's uid */
- clock_t _utime;
- int _status; /* exit code */
- clock_t _stime;
- } _sigchld;
-
- /* IRIX SIGCHLD */
- struct {
- pid_t _pid; /* which child */
- clock_t _utime;
- int _status; /* exit code */
- clock_t _stime;
- } _irix_sigchld;
-
- /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
- struct {
- void *_addr; /* faulting insn/memory ref. */
- } _sigfault;
-
- /* SIGPOLL, SIGXFSZ (To do ...) */
- struct {
- long _band; /* POLL_IN, POLL_OUT, POLL_MSG */
- int _fd;
- } _sigpoll;
-
- /* POSIX.1b timers */
- struct {
- timer_t _tid; /* timer id */
- int _overrun; /* overrun count */
- char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
- sigval_t _sigval; /* same as below */
- int _sys_private; /* not to be passed to user */
- } _timer;
-
- /* POSIX.1b signals */
- struct {
- pid_t _pid; /* sender's pid */
- uid_t _uid; /* sender's uid */
- sigval_t _sigval;
- } _rt;
-
- } _sifields;
-} siginfo_t;
-
-#ifdef __KERNEL__
-
-typedef union sigval32 {
- int sival_int;
- s32 sival_ptr;
-} sigval_t32;
-
-typedef struct siginfo32 {
- int si_signo;
- int si_code;
- int si_errno;
-
- union {
- int _pad[SI_PAD_SIZE32];
-
- /* kill() */
- struct {
- __kernel_pid_t32 _pid; /* sender's pid */
- __kernel_uid_t32 _uid; /* sender's uid */
- } _kill;
-
- /* SIGCHLD */
- struct {
- __kernel_pid_t32 _pid; /* which child */
- __kernel_uid_t32 _uid; /* sender's uid */
- __kernel_clock_t32 _utime;
- int _status; /* exit code */
- __kernel_clock_t32 _stime;
- } _sigchld;
-
- /* IRIX SIGCHLD */
- struct {
- __kernel_pid_t32 _pid; /* which child */
- __kernel_clock_t32 _utime;
- int _status; /* exit code */
- __kernel_clock_t32 _stime;
- } _irix_sigchld;
-
- /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
- struct {
- s32 _addr; /* faulting insn/memory ref. */
- } _sigfault;
-
- /* SIGPOLL, SIGXFSZ (To do ...) */
- struct {
- int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
- int _fd;
- } _sigpoll;
-
- /* POSIX.1b timers */
- struct {
- unsigned int _timer1;
- unsigned int _timer2;
- } _timer;
-
- /* POSIX.1b signals */
- struct {
- __kernel_pid_t32 _pid; /* sender's pid */
- __kernel_uid_t32 _uid; /* sender's uid */
- sigval_t32 _sigval;
- } _rt;
-
- } _sifields;
-} siginfo_t32;
-
-#endif /* __KERNEL__ */
-
-/*
- * si_code values
- * Again these have been choosen to be IRIX compatible.
- */
-#undef SI_ASYNCIO
-#undef SI_TIMER
-#undef SI_MESGQ
-#define SI_ASYNCIO -2 /* sent by AIO completion */
-#define SI_TIMER __SI_CODE(__SI_TIMER,-3) /* sent by timer expiration */
-#define SI_MESGQ -4 /* sent by real time mesq state change */
-
-/*
- * sigevent definitions
- *
- * It seems likely that SIGEV_THREAD will have to be handled from
- * userspace, libpthread transmuting it to SIGEV_SIGNAL, which the
- * thread manager then catches and does the appropriate nonsense.
- * However, everything is written out here so as to not get lost.
- */
-#undef SIGEV_NONE
-#undef SIGEV_SIGNAL
-#undef SIGEV_THREAD
-#define SIGEV_NONE 128 /* other notification: meaningless */
-#define SIGEV_SIGNAL 129 /* notify via signal */
-#define SIGEV_CALLBACK 130 /* ??? */
-#define SIGEV_THREAD 131 /* deliver via thread creation */
-
-/* XXX This one isn't yet IRIX / ABI compatible. */
-typedef struct sigevent {
- int sigev_notify;
- sigval_t sigev_value;
- int sigev_signo;
- union {
- int _pad[SIGEV_PAD_SIZE];
- int _tid;
-
- struct {
- void (*_function)(sigval_t);
- void *_attribute; /* really pthread_attr_t */
- } _sigev_thread;
- } _sigev_un;
-} sigevent_t;
-
-#ifdef __KERNEL__
-
-/*
- * Duplicated here because of <asm-generic/siginfo.h> braindamage ...
- */
-#include <linux/string.h>
-
-static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
-{
- if (from->si_code < 0)
- memcpy(to, from, sizeof(*to));
- else
- /* _sigchld is currently the largest know union member */
- memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
-}
-
-#endif
-
-#endif /* _ASM_SIGINFO_H */
diff -Nru a/include/asm-mips64/signal.h b/include/asm-mips64/signal.h
--- a/include/asm-mips64/signal.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,153 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995 - 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SIGNAL_H
-#define _ASM_SIGNAL_H
-
-#include <linux/types.h>
-
-#define _NSIG 128
-#define _NSIG_BPW 64
-#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
-
-typedef struct {
- unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-typedef unsigned long old_sigset_t; /* at least 32 bits */
-
-#define SIGHUP 1 /* Hangup (POSIX). */
-#define SIGINT 2 /* Interrupt (ANSI). */
-#define SIGQUIT 3 /* Quit (POSIX). */
-#define SIGILL 4 /* Illegal instruction (ANSI). */
-#define SIGTRAP 5 /* Trace trap (POSIX). */
-#define SIGIOT 6 /* IOT trap (4.2 BSD). */
-#define SIGABRT SIGIOT /* Abort (ANSI). */
-#define SIGEMT 7
-#define SIGFPE 8 /* Floating-point exception (ANSI). */
-#define SIGKILL 9 /* Kill, unblockable (POSIX). */
-#define SIGBUS 10 /* BUS error (4.2 BSD). */
-#define SIGSEGV 11 /* Segmentation violation (ANSI). */
-#define SIGSYS 12
-#define SIGPIPE 13 /* Broken pipe (POSIX). */
-#define SIGALRM 14 /* Alarm clock (POSIX). */
-#define SIGTERM 15 /* Termination (ANSI). */
-#define SIGUSR1 16 /* User-defined signal 1 (POSIX). */
-#define SIGUSR2 17 /* User-defined signal 2 (POSIX). */
-#define SIGCHLD 18 /* Child status has changed (POSIX). */
-#define SIGCLD SIGCHLD /* Same as SIGCHLD (System V). */
-#define SIGPWR 19 /* Power failure restart (System V). */
-#define SIGWINCH 20 /* Window size change (4.3 BSD, Sun). */
-#define SIGURG 21 /* Urgent condition on socket (4.2 BSD). */
-#define SIGIO 22 /* I/O now possible (4.2 BSD). */
-#define SIGPOLL SIGIO /* Pollable event occurred (System V). */
-#define SIGSTOP 23 /* Stop, unblockable (POSIX). */
-#define SIGTSTP 24 /* Keyboard stop (POSIX). */
-#define SIGCONT 25 /* Continue (POSIX). */
-#define SIGTTIN 26 /* Background read from tty (POSIX). */
-#define SIGTTOU 27 /* Background write to tty (POSIX). */
-#define SIGVTALRM 28 /* Virtual alarm clock (4.2 BSD). */
-#define SIGPROF 29 /* Profiling alarm clock (4.2 BSD). */
-#define SIGXCPU 30 /* CPU limit exceeded (4.2 BSD). */
-#define SIGXFSZ 31 /* File size limit exceeded (4.2 BSD). */
-
-/* These should not be considered constants from userland. */
-#define SIGRTMIN 32
-#define SIGRTMAX (_NSIG-1)
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_ONSTACK 0x08000000
-#define SA_RESETHAND 0x80000000
-#define SA_RESTART 0x10000000
-#define SA_SIGINFO 0x00000008
-#define SA_NODEFER 0x40000000
-#define SA_NOCLDWAIT 0x00010000
-#define SA_NOCLDSTOP 0x00000001
-
-#define SA_NOMASK SA_NODEFER
-#define SA_ONESHOT SA_RESETHAND
-#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
-
-#define SA_RESTORER 0x04000000 /* Only for o32 compat code */
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK 1
-#define SS_DISABLE 2
-
-#define MINSIGSTKSZ 2048
-#define SIGSTKSZ 8192
-
-#ifdef __KERNEL__
-
-/*
- * These values of sa_flags are used only by the kernel as part of the
- * irq handling routines.
- *
- * SA_INTERRUPT is also used by the irq handling routines.
- * SA_SHIRQ flag is for shared interrupt support on PCI and EISA.
- */
-#define SA_PROBE SA_ONESHOT
-#define SA_SAMPLE_RANDOM SA_RESTART
-#define SA_SHIRQ 0x02000000
-
-#endif /* __KERNEL__ */
-
-#define SIG_BLOCK 1 /* for blocking signals */
-#define SIG_UNBLOCK 2 /* for unblocking signals */
-#define SIG_SETMASK 3 /* for setting the signal mask */
-#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
- set only the low 32 bit of the sigset. */
-
-/* Type of a signal handler. */
-typedef void (*__sighandler_t)(int);
-
-/* Fake signal functions */
-#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
-#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
-#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
-
-struct sigaction {
- unsigned int sa_flags;
- __sighandler_t sa_handler;
- sigset_t sa_mask;
-};
-
-struct k_sigaction {
- struct sigaction sa;
-};
-
-/* IRIX compatible stack_t */
-typedef struct sigaltstack {
- void *ss_sp;
- size_t ss_size;
- int ss_flags;
-} stack_t;
-
-#ifdef __KERNEL__
-#include <asm/sigcontext.h>
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* __KERNEL__ */
-
-#endif /* !defined (_ASM_SIGNAL_H) */
diff -Nru a/include/asm-mips64/smp.h b/include/asm-mips64/smp.h
--- a/include/asm-mips64/smp.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,102 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of this
- * archive for more details.
- *
- * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
- * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
- * Copyright (C) 2000, 2001, 2002 Ralf Baechle
- * Copyright (C) 2000, 2001 Broadcom Corporation
- */
-#ifndef __ASM_SMP_H
-#define __ASM_SMP_H
-
-#include <linux/config.h>
-
-#ifdef CONFIG_SMP
-
-#include <linux/bitops.h>
-#include <linux/threads.h>
-#include <asm/atomic.h>
-
-#define smp_processor_id() (current_thread_info()->cpu)
-
-/* Map from cpu id to sequential logical cpu number. This will only
- not be idempotent when cpus failed to come on-line. */
-extern int __cpu_number_map[NR_CPUS];
-#define cpu_number_map(cpu) __cpu_number_map[cpu]
-
-/* The reverse map from sequential logical cpu number to cpu id. */
-extern int __cpu_logical_map[NR_CPUS];
-#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
-
-#define NO_PROC_ID (-1)
-
-struct call_data_struct {
- void (*func)(void *);
- void *info;
- atomic_t started;
- atomic_t finished;
- int wait;
-};
-
-extern struct call_data_struct *call_data;
-
-#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
-#define SMP_CALL_FUNCTION 0x2
-
-#if (NR_CPUS <= _MIPS_SZLONG)
-
-typedef unsigned long cpumask_t;
-
-#define CPUMASK_CLRALL(p) (p) = 0
-#define CPUMASK_SETB(p, bit) (p) |= 1UL << (bit)
-#define CPUMASK_CLRB(p, bit) (p) &= ~(1UL << (bit))
-#define CPUMASK_TSTB(p, bit) ((p) & (1UL << (bit)))
-
-#elif (NR_CPUS <= 128)
-
-/*
- * The foll should work till 128 cpus.
- */
-#define CPUMASK_SIZE (NR_CPUS/_MIPS_SZLONG)
-#define CPUMASK_INDEX(bit) ((bit) >> 6)
-#define CPUMASK_SHFT(bit) ((bit) & 0x3f)
-
-typedef struct {
- unsigned long _bits[CPUMASK_SIZE];
-} cpumask_t;
-
-#define CPUMASK_CLRALL(p) (p)._bits[0] = 0, (p)._bits[1] = 0
-#define CPUMASK_SETB(p, bit) (p)._bits[CPUMASK_INDEX(bit)] |= \
- (1UL << CPUMASK_SHFT(bit))
-#define CPUMASK_CLRB(p, bit) (p)._bits[CPUMASK_INDEX(bit)] &= \
- ~(1UL << CPUMASK_SHFT(bit))
-#define CPUMASK_TSTB(p, bit) ((p)._bits[CPUMASK_INDEX(bit)] & \
- (1UL << CPUMASK_SHFT(bit)))
-
-#else
-#error cpumask macros only defined for 128p kernels
-#endif
-
-extern cpumask_t phys_cpu_present_map;
-extern cpumask_t cpu_online_map;
-
-#define cpu_possible(cpu) (phys_cpu_present_map & (1<<(cpu)))
-#define cpu_online(cpu) (cpu_online_map & (1<<(cpu)))
-
-extern inline unsigned int num_online_cpus(void)
-{
- return hweight32(cpu_online_map);
-}
-
-extern volatile unsigned long cpu_callout_map;
-/* We don't mark CPUs online until __cpu_up(), so we need another measure */
-static inline int num_booting_cpus(void)
-{
- return hweight32(cpu_callout_map);
-}
-
-#endif /* CONFIG_SMP */
-
-#endif /* __ASM_SMP_H */
diff -Nru a/include/asm-mips64/smplock.h b/include/asm-mips64/smplock.h
--- a/include/asm-mips64/smplock.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,67 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Default SMP lock implementation
- */
-#include <linux/config.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-
-extern spinlock_t kernel_flag;
-
-#ifdef CONFIG_SMP
-#define kernel_locked() spin_is_locked(&kernel_flag)
-#else
-#ifdef CONFIG_PREEMPT
-#define kernel_locked() preempt_count()
-#else
-#define kernel_locked() 1
-#endif
-#endif
-
-/*
- * Release global kernel lock and global interrupt lock
- */
-#define release_kernel_lock(task) \
-do { \
- if (unlikely(task->lock_depth >= 0)) \
- spin_unlock(&kernel_flag); \
-} while (0)
-
-/*
- * Re-acquire the kernel lock
- */
-#define reacquire_kernel_lock(task) \
-do { \
- if (unlikely(task->lock_depth >= 0)) \
- spin_lock(&kernel_flag); \
-} while (0)
-
-
-/*
- * Getting the big kernel lock.
- *
- * This cannot happen asynchronously,
- * so we only need to worry about other
- * CPU's.
- */
-static __inline__ void lock_kernel(void)
-{
-#ifdef CONFIG_PREEMPT
- if (current->lock_depth == -1)
- spin_lock(&kernel_flag);
- ++current->lock_depth;
-#else
-
- if (!++current->lock_depth)
- spin_lock(&kernel_flag);
-#endif
-}
-
-static __inline__ void unlock_kernel(void)
-{
- if (--current->lock_depth < 0)
- spin_unlock(&kernel_flag);
-}
diff -Nru a/include/asm-mips64/sn/addrs.h b/include/asm-mips64/sn/addrs.h
--- a/include/asm-mips64/sn/addrs.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,459 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 1999, 2000 by Ralf Baechle
- */
-#ifndef _ASM_SN_ADDRS_H
-#define _ASM_SN_ADDRS_H
-
-#include <linux/config.h>
-
-#ifndef __ASSEMBLY__
-#include <linux/types.h>
-#endif /* !__ASSEMBLY__ */
-
-#include <asm/addrspace.h>
-#include <asm/reg.h>
-#include <asm/sn/kldir.h>
-
-#if defined(CONFIG_SGI_IP27)
-#include <asm/sn/sn0/addrs.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/addrs.h>
-#endif
-
-
-#ifndef __ASSEMBLY__
-
-#if defined(CONFIG_SGI_IO) /* FIXME */
-#define PS_UINT_CAST (__psunsigned_t)
-#define UINT64_CAST (__uint64_t)
-#else /* CONFIG_SGI_IO */
-#define PS_UINT_CAST (unsigned long)
-#define UINT64_CAST (unsigned long)
-#endif /* CONFIG_SGI_IO */
-
-#define HUBREG_CAST (volatile hubreg_t *)
-
-#else /* __ASSEMBLY__ */
-
-#define PS_UINT_CAST
-#define UINT64_CAST
-#define HUBREG_CAST
-
-#endif /* __ASSEMBLY__ */
-
-
-#define NASID_GET_META(_n) ((_n) >> NASID_LOCAL_BITS)
-#ifdef CONFIG_SGI_IP27
-#define NASID_GET_LOCAL(_n) ((_n) & 0xf)
-#endif
-#define NASID_MAKE(_m, _l) (((_m) << NASID_LOCAL_BITS) | (_l))
-
-#define NODE_ADDRSPACE_MASK (NODE_ADDRSPACE_SIZE - 1)
-#define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK)
-
-#define CHANGE_ADDR_NASID(_pa, _nasid) \
- ((UINT64_CAST (_pa) & ~NASID_MASK) | \
- (UINT64_CAST(_nasid) << NASID_SHFT))
-
-
-/*
- * The following macros are used to index to the beginning of a specific
- * node's address space.
- */
-
-#define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS)
-
-#define NODE_CAC_BASE(_n) (CAC_BASE + NODE_OFFSET(_n))
-#define NODE_HSPEC_BASE(_n) (HSPEC_BASE + NODE_OFFSET(_n))
-#define NODE_IO_BASE(_n) (IO_BASE + NODE_OFFSET(_n))
-#define NODE_MSPEC_BASE(_n) (MSPEC_BASE + NODE_OFFSET(_n))
-#define NODE_UNCAC_BASE(_n) (UNCAC_BASE + NODE_OFFSET(_n))
-
-#define TO_NODE(_n, _x) (NODE_OFFSET(_n) | ((_x) ))
-#define TO_NODE_CAC(_n, _x) (NODE_CAC_BASE(_n) | ((_x) & TO_PHYS_MASK))
-#define TO_NODE_UNCAC(_n, _x) (NODE_UNCAC_BASE(_n) | ((_x) & TO_PHYS_MASK))
-#define TO_NODE_MSPEC(_n, _x) (NODE_MSPEC_BASE(_n) | ((_x) & TO_PHYS_MASK))
-#define TO_NODE_HSPEC(_n, _x) (NODE_HSPEC_BASE(_n) | ((_x) & TO_PHYS_MASK))
-
-
-#define RAW_NODE_SWIN_BASE(nasid, widget) \
- (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
-
-#define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff))
-
-/*
- * The following definitions pertain to the IO special address
- * space. They define the location of the big and little windows
- * of any given node.
- */
-
-#define SWIN_SIZE_BITS 24
-#define SWIN_SIZE (UINT64_CAST 1 << 24)
-#define SWIN_SIZEMASK (SWIN_SIZE - 1)
-#define SWIN_WIDGET_MASK 0xF
-
-/*
- * Convert smallwindow address to xtalk address.
- *
- * 'addr' can be physical or virtual address, but will be converted
- * to Xtalk address in the range 0 -> SWINZ_SIZEMASK
- */
-#define SWIN_WIDGETADDR(addr) ((addr) & SWIN_SIZEMASK)
-#define SWIN_WIDGETNUM(addr) (((addr) >> SWIN_SIZE_BITS) & SWIN_WIDGET_MASK)
-/*
- * Verify if addr belongs to small window address on node with "nasid"
- *
- *
- * NOTE: "addr" is expected to be XKPHYS address, and NOT physical
- * address
- *
- *
- */
-#define NODE_SWIN_ADDR(nasid, addr) \
- (((addr) >= NODE_SWIN_BASE(nasid, 0)) && \
- ((addr) < (NODE_SWIN_BASE(nasid, HUB_NUM_WIDGET) + SWIN_SIZE)\
- ))
-
-/*
- * The following define the major position-independent aliases used
- * in SN.
- * UALIAS -- 256MB in size, reads in the UALIAS result in
- * uncached references to the memory of the reader's node.
- * CPU_UALIAS -- 128kb in size, the bottom part of UALIAS is flipped
- * depending on which CPU does the access to provide
- * all CPUs with unique uncached memory at low addresses.
- * LBOOT -- 256MB in size, reads in the LBOOT area result in
- * uncached references to the local hub's boot prom and
- * other directory-bus connected devices.
- * IALIAS -- 8MB in size, reads in the IALIAS result in uncached
- * references to the local hub's registers.
- */
-
-#define UALIAS_BASE HSPEC_BASE
-#define UALIAS_SIZE 0x10000000 /* 256 Megabytes */
-#define UALIAS_LIMIT (UALIAS_BASE + UALIAS_SIZE)
-
-/*
- * The bottom of ualias space is flipped depending on whether you're
- * processor 0 or 1 within a node.
- */
-#ifdef CONFIG_SGI_IP27
-#define UALIAS_FLIP_BASE UALIAS_BASE
-#define UALIAS_FLIP_SIZE 0x20000
-#define UALIAS_FLIP_BIT 0x10000
-#define UALIAS_FLIP_ADDR(_x) (cputoslice(smp_processor_id()) ? \
- (_x) ^ UALIAS_FLIP_BIT : (_x))
-
-#define LBOOT_BASE (HSPEC_BASE + 0x10000000)
-#define LBOOT_SIZE 0x10000000
-#define LBOOT_LIMIT (LBOOT_BASE + LBOOT_SIZE)
-#define LBOOT_STRIDE 0 /* IP27 has only one CPU PROM */
-
-#endif
-
-#define HUB_REGISTER_WIDGET 1
-#define IALIAS_BASE NODE_SWIN_BASE(0, HUB_REGISTER_WIDGET)
-#define IALIAS_SIZE 0x800000 /* 8 Megabytes */
-#define IS_IALIAS(_a) (((_a) >= IALIAS_BASE) && \
- ((_a) < (IALIAS_BASE + IALIAS_SIZE)))
-
-/*
- * Macro for referring to Hub's RBOOT space
- */
-
-#ifdef CONFIG_SGI_IP27
-#define RBOOT_SIZE 0x10000000 /* 256 Megabytes */
-#define NODE_RBOOT_BASE(_n) (NODE_HSPEC_BASE(_n) + 0x30000000)
-#define NODE_RBOOT_LIMIT(_n) (NODE_RBOOT_BASE(_n) + RBOOT_SIZE)
-
-#endif
-
-/*
- * Macros for referring the Hub's back door space
- *
- * These macros correctly process addresses in any node's space.
- * WARNING: They won't work in assembler.
- *
- * BDDIR_ENTRY_LO returns the address of the low double-word of the dir
- * entry corresponding to a physical (Cac or Uncac) address.
- * BDDIR_ENTRY_HI returns the address of the high double-word of the entry.
- * BDPRT_ENTRY returns the address of the double-word protection entry
- * corresponding to the page containing the physical address.
- * BDPRT_ENTRY_S Stores the value into the protection entry.
- * BDPRT_ENTRY_L Load the value from the protection entry.
- * BDECC_ENTRY returns the address of the ECC byte corresponding to a
- * double-word at a specified physical address.
- * BDECC_ENTRY_H returns the address of the two ECC bytes corresponding to a
- * quad-word at a specified physical address.
- */
-#define NODE_BDOOR_BASE(_n) (NODE_HSPEC_BASE(_n) + (NODE_ADDRSPACE_SIZE/2))
-
-#define NODE_BDECC_BASE(_n) (NODE_BDOOR_BASE(_n))
-#define NODE_BDDIR_BASE(_n) (NODE_BDOOR_BASE(_n) + (NODE_ADDRSPACE_SIZE/4))
-#ifdef CONFIG_SGI_IP27
-#define BDDIR_ENTRY_LO(_pa) ((HSPEC_BASE + \
- NODE_ADDRSPACE_SIZE * 3 / 4 + \
- 0x200) | \
- UINT64_CAST (_pa) & NASID_MASK | \
- UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \
- UINT64_CAST (_pa) >> 3 & 0x1f << 4)
-
-#define BDDIR_ENTRY_HI(_pa) ((HSPEC_BASE + \
- NODE_ADDRSPACE_SIZE * 3 / 4 + \
- 0x208) | \
- UINT64_CAST (_pa) & NASID_MASK | \
- UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \
- UINT64_CAST (_pa) >> 3 & 0x1f << 4)
-
-#define BDPRT_ENTRY(_pa, _rgn) ((HSPEC_BASE + \
- NODE_ADDRSPACE_SIZE * 3 / 4) | \
- UINT64_CAST (_pa) & NASID_MASK | \
- UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \
- (_rgn) << 3)
-#define BDPRT_ENTRY_ADDR(_pa,_rgn) (BDPRT_ENTRY((_pa),(_rgn)))
-#define BDPRT_ENTRY_S(_pa,_rgn,_val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn))=(_val))
-#define BDPRT_ENTRY_L(_pa,_rgn) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn)))
-
-#define BDECC_ENTRY(_pa) ((HSPEC_BASE + \
- NODE_ADDRSPACE_SIZE / 2) | \
- UINT64_CAST (_pa) & NASID_MASK | \
- UINT64_CAST (_pa) >> 2 & BDECC_UPPER_MASK | \
- UINT64_CAST (_pa) >> 3 & 3)
-
-/*
- * Macro to convert a back door directory or protection address into the
- * raw physical address of the associated cache line or protection page.
- */
-#define BDADDR_IS_DIR(_ba) ((UINT64_CAST (_ba) & 0x200) != 0)
-#define BDADDR_IS_PRT(_ba) ((UINT64_CAST (_ba) & 0x200) == 0)
-
-#define BDDIR_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
- (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2 | \
- (UINT64_CAST (_ba) & 0x1f << 4) << 3)
-
-#define BDPRT_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
- (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2)
-
-#define BDECC_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
- (UINT64_CAST (_ba) & BDECC_UPPER_MASK)<<2 | \
- (UINT64_CAST (_ba) & 3) << 3)
-#endif /* CONFIG_SGI_IP27 */
-
-
-/*
- * The following macros produce the correct base virtual address for
- * the hub registers. The LOCAL_HUB_* macros produce the appropriate
- * address for the local registers. The REMOTE_HUB_* macro produce
- * the address for the specified hub's registers. The intent is
- * that the appropriate PI, MD, NI, or II register would be substituted
- * for _x.
- */
-
-#ifdef _STANDALONE
-
-/* DO NOT USE THESE DIRECTLY IN THE KERNEL. SEE BELOW. */
-#define LOCAL_HUB(_x) (HUBREG_CAST (IALIAS_BASE + (_x)))
-#define REMOTE_HUB(_n, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
- 0x800000 + (_x)))
-#endif /* _STANDALONE */
-
-/*
- * WARNING:
- * When certain Hub chip workaround are defined, it's not sufficient
- * to dereference the *_HUB_ADDR() macros. You should instead use
- * HUB_L() and HUB_S() if you must deal with pointers to hub registers.
- * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S().
- * They're always safe.
- */
-#define LOCAL_HUB_ADDR(_x) (HUBREG_CAST (IALIAS_BASE + (_x)))
-#define REMOTE_HUB_ADDR(_n, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
- 0x800000 + (_x)))
-#ifdef CONFIG_SGI_IP27
-#define REMOTE_HUB_PI_ADDR(_n, _sn, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
- 0x800000 + (_x)))
-#endif /* CONFIG_SGI_IP27 */
-
-#ifndef __ASSEMBLY__
-
-#define HUB_L(_a) *(_a)
-#define HUB_S(_a, _d) *(_a) = (_d)
-
-#define LOCAL_HUB_L(_r) HUB_L(LOCAL_HUB_ADDR(_r))
-#define LOCAL_HUB_S(_r, _d) HUB_S(LOCAL_HUB_ADDR(_r), (_d))
-#define REMOTE_HUB_L(_n, _r) HUB_L(REMOTE_HUB_ADDR((_n), (_r)))
-#define REMOTE_HUB_S(_n, _r, _d) HUB_S(REMOTE_HUB_ADDR((_n), (_r)), (_d))
-#define REMOTE_HUB_PI_L(_n, _sn, _r) HUB_L(REMOTE_HUB_PI_ADDR((_n), (_sn), (_r)))
-#define REMOTE_HUB_PI_S(_n, _sn, _r, _d) HUB_S(REMOTE_HUB_PI_ADDR((_n), (_sn), (_r)), (_d))
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * The following macros are used to get to a hub/bridge register, given
- * the base of the register space.
- */
-#define HUB_REG_PTR(_base, _off) \
- (HUBREG_CAST ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
-
-#define HUB_REG_PTR_L(_base, _off) \
- HUB_L(HUB_REG_PTR((_base), (_off)))
-
-#define HUB_REG_PTR_S(_base, _off, _data) \
- HUB_S(HUB_REG_PTR((_base), (_off)), (_data))
-
-/*
- * Software structure locations -- permanently fixed
- * See diagram in kldir.h
- */
-
-#define PHYS_RAMBASE 0x0
-#define K0_RAMBASE PHYS_TO_K0(PHYS_RAMBASE)
-
-#define EX_HANDLER_OFFSET(slice) ((slice) << 16)
-#define EX_HANDLER_ADDR(nasid, slice) \
- PHYS_TO_K0(NODE_OFFSET(nasid) | EX_HANDLER_OFFSET(slice))
-#define EX_HANDLER_SIZE 0x0400
-
-#define EX_FRAME_OFFSET(slice) ((slice) << 16 | 0x400)
-#define EX_FRAME_ADDR(nasid, slice) \
- PHYS_TO_K0(NODE_OFFSET(nasid) | EX_FRAME_OFFSET(slice))
-#define EX_FRAME_SIZE 0x0c00
-
-#define ARCS_SPB_OFFSET 0x1000
-#define ARCS_SPB_ADDR(nasid) \
- PHYS_TO_K0(NODE_OFFSET(nasid) | ARCS_SPB_OFFSET)
-#define ARCS_SPB_SIZE 0x0400
-
-#ifdef _STANDALONE
-
-#define ARCS_TVECTOR_OFFSET 0x2800
-#define ARCS_PVECTOR_OFFSET 0x2c00
-
-/*
- * These addresses are used by the master CPU to install the transfer
- * and private vectors. All others use the SPB to find them.
- */
-#define TVADDR (NODE_CAC_BASE(get_nasid()) + ARCS_TVECTOR_OFFSET)
-#define PVADDR (NODE_CAC_BASE(get_nasid()) + ARCS_PVECTOR_OFFSET)
-
-#endif /* _STANDALONE */
-
-#define KLDIR_OFFSET 0x2000
-#define KLDIR_ADDR(nasid) \
- TO_NODE_UNCAC((nasid), KLDIR_OFFSET)
-#define KLDIR_SIZE 0x0400
-
-
-/*
- * Software structure locations -- indirected through KLDIR
- * See diagram in kldir.h
- *
- * Important: All low memory structures must only be accessed
- * uncached, except for the symmon stacks.
- */
-
-#define KLI_LAUNCH 0 /* Dir. entries */
-#define KLI_KLCONFIG 1
-#define KLI_NMI 2
-#define KLI_GDA 3
-#define KLI_FREEMEM 4
-#define KLI_SYMMON_STK 5
-#define KLI_PI_ERROR 6
-#define KLI_KERN_VARS 7
-#define KLI_KERN_XP 8
-#define KLI_KERN_PARTID 9
-
-#ifndef __ASSEMBLY__
-
-#define KLD_BASE(nasid) ((kldir_ent_t *) KLDIR_ADDR(nasid))
-#define KLD_LAUNCH(nasid) (KLD_BASE(nasid) + KLI_LAUNCH)
-#define KLD_NMI(nasid) (KLD_BASE(nasid) + KLI_NMI)
-#define KLD_KLCONFIG(nasid) (KLD_BASE(nasid) + KLI_KLCONFIG)
-#define KLD_PI_ERROR(nasid) (KLD_BASE(nasid) + KLI_PI_ERROR)
-#define KLD_GDA(nasid) (KLD_BASE(nasid) + KLI_GDA)
-#define KLD_SYMMON_STK(nasid) (KLD_BASE(nasid) + KLI_SYMMON_STK)
-#define KLD_FREEMEM(nasid) (KLD_BASE(nasid) + KLI_FREEMEM)
-#define KLD_KERN_VARS(nasid) (KLD_BASE(nasid) + KLI_KERN_VARS)
-#define KLD_KERN_XP(nasid) (KLD_BASE(nasid) + KLI_KERN_XP)
-#define KLD_KERN_PARTID(nasid) (KLD_BASE(nasid) + KLI_KERN_PARTID)
-
-#define LAUNCH_OFFSET(nasid, slice) \
- (KLD_LAUNCH(nasid)->offset + \
- KLD_LAUNCH(nasid)->stride * (slice))
-#define LAUNCH_ADDR(nasid, slice) \
- TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice))
-#define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size
-
-#define NMI_OFFSET(nasid, slice) \
- (KLD_NMI(nasid)->offset + \
- KLD_NMI(nasid)->stride * (slice))
-#define NMI_ADDR(nasid, slice) \
- TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice))
-#define NMI_SIZE(nasid) KLD_NMI(nasid)->size
-
-#define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset
-#define KLCONFIG_ADDR(nasid) \
- TO_NODE_UNCAC((nasid), KLCONFIG_OFFSET(nasid))
-#define KLCONFIG_SIZE(nasid) KLD_KLCONFIG(nasid)->size
-
-#define GDA_ADDR(nasid) KLD_GDA(nasid)->pointer
-#define GDA_SIZE(nasid) KLD_GDA(nasid)->size
-
-#define SYMMON_STK_OFFSET(nasid, slice) \
- (KLD_SYMMON_STK(nasid)->offset + \
- KLD_SYMMON_STK(nasid)->stride * (slice))
-#define SYMMON_STK_STRIDE(nasid) KLD_SYMMON_STK(nasid)->stride
-
-#define SYMMON_STK_ADDR(nasid, slice) \
- TO_NODE_CAC((nasid), SYMMON_STK_OFFSET(nasid, slice))
-
-#define SYMMON_STK_SIZE(nasid) KLD_SYMMON_STK(nasid)->stride
-
-#define SYMMON_STK_END(nasid) (SYMMON_STK_ADDR(nasid, 0) + KLD_SYMMON_STK(nasid)->size)
-
-/* loading symmon 4k below UNIX. the arcs loader needs the topaddr for a
- * relocatable program
- */
-#define UNIX_DEBUG_LOADADDR 0x300000
-#define SYMMON_LOADADDR(nasid) \
- TO_NODE(nasid, PHYS_TO_K0(UNIX_DEBUG_LOADADDR - 0x1000))
-
-#define FREEMEM_OFFSET(nasid) KLD_FREEMEM(nasid)->offset
-#define FREEMEM_ADDR(nasid) SYMMON_STK_END(nasid)
-/*
- * XXX
- * Fix this. FREEMEM_ADDR should be aware of if symmon is loaded.
- * Also, it should take into account what prom thinks to be a safe
- * address
- PHYS_TO_K0(NODE_OFFSET(nasid) + FREEMEM_OFFSET(nasid))
- */
-#define FREEMEM_SIZE(nasid) KLD_FREEMEM(nasid)->size
-
-#define PI_ERROR_OFFSET(nasid) KLD_PI_ERROR(nasid)->offset
-#define PI_ERROR_ADDR(nasid) \
- TO_NODE_UNCAC((nasid), PI_ERROR_OFFSET(nasid))
-#define PI_ERROR_SIZE(nasid) KLD_PI_ERROR(nasid)->size
-
-#define NODE_OFFSET_TO_K0(_nasid, _off) \
- PHYS_TO_K0((NODE_OFFSET(_nasid) + (_off)) | K0BASE)
-#define NODE_OFFSET_TO_K1(_nasid, _off) \
- TO_UNCAC((NODE_OFFSET(_nasid) + (_off)) | K1BASE)
-#define K0_TO_NODE_OFFSET(_k0addr) \
- ((__psunsigned_t)(_k0addr) & NODE_ADDRSPACE_MASK)
-
-#define KERN_VARS_ADDR(nasid) KLD_KERN_VARS(nasid)->pointer
-#define KERN_VARS_SIZE(nasid) KLD_KERN_VARS(nasid)->size
-
-#define KERN_XP_ADDR(nasid) KLD_KERN_XP(nasid)->pointer
-#define KERN_XP_SIZE(nasid) KLD_KERN_XP(nasid)->size
-
-#define GPDA_ADDR(nasid) TO_NODE_CAC(nasid, GPDA_OFFSET)
-
-#endif /* !__ASSEMBLY__ */
-
-
-#endif /* _ASM_SN_ADDRS_H */
diff -Nru a/include/asm-mips64/sn/agent.h b/include/asm-mips64/sn/agent.h
--- a/include/asm-mips64/sn/agent.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,47 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This file has definitions for the hub and snac interfaces.
- *
- * Copyright (C) 1992 - 1997, 1999, 2000 Silcon Graphics, Inc.
- * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_SGI_SN_AGENT_H
-#define _ASM_SGI_SN_AGENT_H
-
-#include <linux/config.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/arch.h>
-//#include <asm/sn/io.h>
-
-#if defined(CONFIG_SGI_IP27)
-#include <asm/sn/sn0/hub.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/hub.h>
-#endif /* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
-
-/*
- * NIC register macros
- */
-
-#if defined(CONFIG_SGI_IP27)
-#define HUB_NIC_ADDR(_cpuid) \
- REMOTE_HUB_ADDR(COMPACT_TO_NASID_NODEID(cputocnode(_cpuid)), \
- MD_MLAN_CTL)
-#endif
-
-#define SET_HUB_NIC(_my_cpuid, _val) \
- (HUB_S(HUB_NIC_ADDR(_my_cpuid), (_val)))
-
-#define SET_MY_HUB_NIC(_v) \
- SET_HUB_NIC(cpuid(), (_v))
-
-#define GET_HUB_NIC(_my_cpuid) \
- (HUB_L(HUB_NIC_ADDR(_my_cpuid)))
-
-#define GET_MY_HUB_NIC() \
- GET_HUB_NIC(cpuid())
-
-#endif /* _ASM_SGI_SN_AGENT_H */
diff -Nru a/include/asm-mips64/sn/arch.h b/include/asm-mips64/sn/arch.h
--- a/include/asm-mips64/sn/arch.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,121 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI specific setup.
- *
- * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_SN_ARCH_H
-#define _ASM_SN_ARCH_H
-
-#include <linux/types.h>
-#include <linux/config.h>
-
-#if !defined(CONFIG_SGI_IO)
-#include <asm/sn/types.h>
-#include <asm/sn/sn0/arch.h>
-#endif
-
-
-#ifndef __ASSEMBLY__
-#if !defined(CONFIG_SGI_IO)
-typedef u64 hubreg_t;
-typedef u64 nic_t;
-#endif
-#endif
-
-#ifdef CONFIG_SGI_IP27
-#define CPUS_PER_NODE 2 /* CPUs on a single hub */
-#define CPUS_PER_NODE_SHFT 1 /* Bits to shift in the node number */
-#define CPUS_PER_SUBNODE 2 /* CPUs on a single hub PI */
-#endif
-#define CNODE_NUM_CPUS(_cnode) (NODEPDA(_cnode)->node_num_cpus)
-
-#define CNODE_TO_CPU_BASE(_cnode) (NODEPDA(_cnode)->node_first_cpu)
-#define cputocnode(cpu) \
- (cpu_data[(cpu)].p_nodeid)
-#define cputonasid(cpu) \
- (cpu_data[(cpu)].p_nasid)
-#define cputoslice(cpu) \
- (cpu_data[(cpu)].p_slice)
-#define makespnum(_nasid, _slice) \
- (((_nasid) << CPUS_PER_NODE_SHFT) | (_slice))
-
-#ifndef __ASSEMBLY__
-
-#define INVALID_NASID (nasid_t)-1
-#define INVALID_CNODEID (cnodeid_t)-1
-#define INVALID_PNODEID (pnodeid_t)-1
-#define INVALID_MODULE (moduleid_t)-1
-#define INVALID_PARTID (partid_t)-1
-
-extern nasid_t get_nasid(void);
-extern cnodeid_t get_cpu_cnode(cpuid_t);
-extern int get_cpu_slice(cpuid_t);
-
-/*
- * NO ONE should access these arrays directly. The only reason we refer to
- * them here is to avoid the procedure call that would be required in the
- * macros below. (Really want private data members here :-)
- */
-extern cnodeid_t nasid_to_compact_node[MAX_NASIDS];
-extern nasid_t compact_to_nasid_node[MAX_COMPACT_NODES];
-
-/*
- * These macros are used by various parts of the kernel to convert
- * between the three different kinds of node numbering. At least some
- * of them may change to procedure calls in the future, but the macros
- * will continue to work. Don't use the arrays above directly.
- */
-
-#define NASID_TO_REGION(nnode) \
- ((nnode) >> \
- (is_fine_dirmode() ? NASID_TO_FINEREG_SHFT : NASID_TO_COARSEREG_SHFT))
-
-#if !defined(_STANDALONE)
-extern cnodeid_t nasid_to_compact_node[MAX_NASIDS];
-extern nasid_t compact_to_nasid_node[MAX_COMPACT_NODES];
-extern cnodeid_t cpuid_to_compact_node[MAXCPUS];
-#endif
-
-#if !defined(DEBUG) && (!defined(SABLE) || defined(_STANDALONE))
-
-#define NASID_TO_COMPACT_NODEID(nnode) (nasid_to_compact_node[nnode])
-#define COMPACT_TO_NASID_NODEID(cnode) (compact_to_nasid_node[cnode])
-#define CPUID_TO_COMPACT_NODEID(cpu) (cpuid_to_compact_node[(cpu)])
-#else
-
-/*
- * These functions can do type checking and fail if they need to return
- * a bad nodeid, but they're not as fast so just use 'em for debug kernels.
- */
-cnodeid_t nasid_to_compact_nodeid(nasid_t nasid);
-nasid_t compact_to_nasid_nodeid(cnodeid_t cnode);
-
-#define NASID_TO_COMPACT_NODEID(nnode) nasid_to_compact_nodeid(nnode)
-#define COMPACT_TO_NASID_NODEID(cnode) compact_to_nasid_nodeid(cnode)
-#define CPUID_TO_COMPACT_NODEID(cpu) (cpuid_to_compact_node[(cpu)])
-#endif
-
-extern int node_getlastslot(cnodeid_t);
-
-#endif /* !__ASSEMBLY__ */
-
-#define SLOT_BITMASK (MAX_MEM_SLOTS - 1)
-#define SLOT_SIZE (1LL<<SLOT_SHIFT)
-
-#define node_getnumslots(node) (MAX_MEM_SLOTS)
-#define NODE_MAX_MEM_SIZE SLOT_SIZE * MAX_MEM_SLOTS
-
-/*
- * New stuff in here from Irix sys/pfdat.h.
- */
-#define SLOT_PFNSHIFT (SLOT_SHIFT - PAGE_SHIFT)
-#define PFN_NASIDSHFT (NASID_SHFT - PAGE_SHIFT)
-#define mkpfn(nasid, off) (((pfn_t)(nasid) << PFN_NASIDSHFT) | (off))
-#define slot_getbasepfn(node,slot) \
- (mkpfn(COMPACT_TO_NASID_NODEID(node), slot<<SLOT_PFNSHIFT))
-#endif /* _ASM_SN_ARCH_H */
diff -Nru a/include/asm-mips64/sn/gda.h b/include/asm-mips64/sn/gda.h
--- a/include/asm-mips64/sn/gda.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,107 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/gda.h>.
- *
- * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
- *
- * gda.h -- Contains the data structure for the global data area,
- * The GDA contains information communicated between the
- * PROM, SYMMON, and the kernel.
- */
-#ifndef _ASM_SN_GDA_H
-#define _ASM_SN_GDA_H
-
-#include <asm/sn/addrs.h>
-
-#define GDA_MAGIC 0x58464552
-
-/*
- * GDA Version History
- *
- * Version # | Change
- * -------------+-------------------------------------------------------
- * 1 | Initial SN0 version
- * 2 | Prom sets g_partid field to the partition number. 0 IS
- * | a valid partition #.
- */
-
-#define GDA_VERSION 2 /* Current GDA version # */
-
-#define G_MAGICOFF 0
-#define G_VERSIONOFF 4
-#define G_PROMOPOFF 6
-#define G_MASTEROFF 8
-#define G_VDSOFF 12
-#define G_HKDNORMOFF 16
-#define G_HKDUTLBOFF 24
-#define G_HKDXUTLBOFF 32
-#define G_PARTIDOFF 40
-#define G_TABLEOFF 128
-
-#ifndef __ASSEMBLY__
-
-typedef struct gda {
- u32 g_magic; /* GDA magic number */
- u16 g_version; /* Version of this structure */
- u16 g_masterid; /* The NASID:CPUNUM of the master cpu */
- u32 g_promop; /* Passes requests from the kernel to prom */
- u32 g_vds; /* Store the virtual dipswitches here */
- void **g_hooked_norm;/* ptr to pda loc for norm hndlr */
- void **g_hooked_utlb;/* ptr to pda loc for utlb hndlr */
- void **g_hooked_xtlb;/* ptr to pda loc for xtlb hndlr */
- int g_partid; /* partition id */
- int g_symmax; /* Max symbols in name table. */
- void *g_dbstab; /* Address of idbg symbol table */
- char *g_nametab; /* Address of idbg name table */
- void *g_ktext_repmask;
- /* Pointer to a mask of nodes with copies
- * of the kernel. */
- char g_padding[56]; /* pad out to 128 bytes */
- nasid_t g_nasidtable[MAX_COMPACT_NODES]; /* NASID of each node,
- * indexed by cnodeid.
- */
-} gda_t;
-
-#define GDA ((gda_t*) GDA_ADDR(get_nasid()))
-
-#endif /* !__ASSEMBLY__ */
-/*
- * Define: PART_GDA_VERSION
- * Purpose: Define the minimum version of the GDA required, lower
- * revisions assume GDA is NOT set up, and read partition
- * information from the board info.
- */
-#define PART_GDA_VERSION 2
-
-/*
- * The following requests can be sent to the PROM during startup.
- */
-
-#define PROMOP_MAGIC 0x0ead0000
-#define PROMOP_MAGIC_MASK 0x0fff0000
-
-#define PROMOP_BIST_SHIFT 11
-#define PROMOP_BIST_MASK (0x3 << 11)
-
-#define PROMOP_REG PI_ERR_STACK_ADDR_A
-
-#define PROMOP_INVALID (PROMOP_MAGIC | 0x00)
-#define PROMOP_HALT (PROMOP_MAGIC | 0x10)
-#define PROMOP_POWERDOWN (PROMOP_MAGIC | 0x20)
-#define PROMOP_RESTART (PROMOP_MAGIC | 0x30)
-#define PROMOP_REBOOT (PROMOP_MAGIC | 0x40)
-#define PROMOP_IMODE (PROMOP_MAGIC | 0x50)
-
-#define PROMOP_CMD_MASK 0x00f0
-#define PROMOP_OPTIONS_MASK 0xfff0
-
-#define PROMOP_SKIP_DIAGS 0x0100 /* don't bother running diags */
-#define PROMOP_SKIP_MEMINIT 0x0200 /* don't bother initing memory */
-#define PROMOP_SKIP_DEVINIT 0x0400 /* don't bother initing devices */
-#define PROMOP_BIST1 0x0800 /* keep track of which BIST ran */
-#define PROMOP_BIST2 0x1000 /* keep track of which BIST ran */
-
-#endif /* _ASM_SN_GDA_H */
diff -Nru a/include/asm-mips64/sn/intr.h b/include/asm-mips64/sn/intr.h
--- a/include/asm-mips64/sn/intr.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,122 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
- */
-#ifndef __ASM_SN_INTR_H
-#define __ASM_SN_INTR_H
-
-/* Number of interrupt levels associated with each interrupt register. */
-#define N_INTPEND_BITS 64
-
-#define INT_PEND0_BASELVL 0
-#define INT_PEND1_BASELVL 64
-
-#define N_INTPENDJUNK_BITS 8
-#define INTPENDJUNK_CLRBIT 0x80
-
-#include <asm/sn/intr_public.h>
-
-#ifndef __ASSEMBLY__
-
-/*
- * Macros to manipulate the interrupt register on the calling hub chip.
- */
-
-#define LOCAL_HUB_SEND_INTR(_level) LOCAL_HUB_S(PI_INT_PEND_MOD, \
- (0x100|(_level)))
-#define REMOTE_HUB_SEND_INTR(_hub, _level) \
- REMOTE_HUB_S((_hub), PI_INT_PEND_MOD, (0x100|(_level)))
-
-/*
- * When clearing the interrupt, make sure this clear does make it
- * to the hub. Otherwise we could end up losing interrupts.
- * We do an uncached load of the int_pend0 register to ensure this.
- */
-
-#define LOCAL_HUB_CLR_INTR(_level) \
- LOCAL_HUB_S(PI_INT_PEND_MOD, (_level)), \
- LOCAL_HUB_L(PI_INT_PEND0)
-#define REMOTE_HUB_CLR_INTR(_hub, _level) \
- REMOTE_HUB_S((_hub), PI_INT_PEND_MOD, (_level)), \
- REMOTE_HUB_L((_hub), PI_INT_PEND0)
-
-#else /* __ASSEMBLY__ */
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * Hard-coded interrupt levels:
- */
-
-/*
- * L0 = SW1
- * L1 = SW2
- * L2 = INT_PEND0
- * L3 = INT_PEND1
- * L4 = RTC
- * L5 = Profiling Timer
- * L6 = Hub Errors
- * L7 = Count/Compare (T5 counters)
- */
-
-
-/* INT_PEND0 hard-coded bits. */
-#ifdef SABLE
-#define SDISK_INTR 63
-#endif
-#ifdef DEBUG_INTR_TSTAMP
-/* hard coded interrupt level for interrupt latency test interrupt */
-#define CPU_INTRLAT_B 62
-#define CPU_INTRLAT_A 61
-#endif
-
-/* Hardcoded bits required by software. */
-#define MSC_MESG_INTR 13
-#define CPU_ACTION_B 11
-#define CPU_ACTION_A 10
-
-/* These are determined by hardware: */
-#define CC_PEND_B 6
-#define CC_PEND_A 5
-#define UART_INTR 4
-#define PG_MIG_INTR 3
-#define GFX_INTR_B 2
-#define GFX_INTR_A 1
-#define RESERVED_INTR 0
-
-/* INT_PEND1 hard-coded bits: */
-#define MSC_PANIC_INTR 63
-#define NI_ERROR_INTR 62
-#define MD_COR_ERR_INTR 61
-#define COR_ERR_INTR_B 60
-#define COR_ERR_INTR_A 59
-#define CLK_ERR_INTR 58
-#define IO_ERROR_INTR 57 /* set up by prom */
-
-#define DEBUG_INTR_B 55 /* used by symmon to stop all cpus */
-#define DEBUG_INTR_A 54
-
-#define BRIDGE_ERROR_INTR 53 /* Setup by PROM to catch Bridge Errors */
-
-#define IP27_INTR_0 52 /* Reserved for PROM use */
-#define IP27_INTR_1 51 /* (do not use in Kernel) */
-#define IP27_INTR_2 50
-#define IP27_INTR_3 49
-#define IP27_INTR_4 48
-#define IP27_INTR_5 47
-#define IP27_INTR_6 46
-#define IP27_INTR_7 45
-
-#define TLB_INTR_B 44 /* used for tlb flush random */
-#define TLB_INTR_A 43
-
-#define LLP_PFAIL_INTR_B 42 /* see ml/SN/SN0/sysctlr.c */
-#define LLP_PFAIL_INTR_A 41
-
-#define NI_BRDCAST_ERR_B 40
-#define NI_BRDCAST_ERR_A 39
-
-#endif /* __ASM_SN_INTR_H */
diff -Nru a/include/asm-mips64/sn/intr_public.h b/include/asm-mips64/sn/intr_public.h
--- a/include/asm-mips64/sn/intr_public.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,53 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
- */
-#ifndef __ASM_SN_INTR_PUBLIC_H
-#define __ASM_SN_INTR_PUBLIC_H
-
-
-/* REMEMBER: If you change these, the whole world needs to be recompiled.
- * It would also require changing the hubspl.s code and SN0/intr.c
- * Currently, the spl code has no support for multiple INTPEND1 masks.
- */
-
-#define N_INTPEND0_MASKS 1
-#define N_INTPEND1_MASKS 1
-
-#define INTPEND0_MAXMASK (N_INTPEND0_MASKS - 1)
-#define INTPEND1_MAXMASK (N_INTPEND1_MASKS - 1)
-
-#ifndef __ASSEMBLY__
-#include <asm/sn/arch.h>
-
-struct intr_vecblk_s; /* defined in asm/sn/intr.h */
-
-/*
- * The following are necessary to create the illusion of a CEL
- * on the SN0 hub. We'll add more priority levels soon, but for
- * now, any interrupt in a particular band effectively does an spl.
- * These must be in the PDA since they're different for each processor.
- * Users of this structure must hold the vector_lock in the appropriate vector
- * block before modifying the mask arrays. There's only one vector block
- * for each Hub so a lock in the PDA wouldn't be adequate.
- */
-typedef struct hub_intmasks_s {
- /*
- * The masks are stored with the lowest-priority (most inclusive)
- * in the lowest-numbered masks (i.e., 0, 1, 2...).
- */
- /* INT_PEND0: */
- hubreg_t intpend0_masks[N_INTPEND0_MASKS];
- /* INT_PEND1: */
- hubreg_t intpend1_masks[N_INTPEND1_MASKS];
- /* INT_PEND0: */
- struct intr_vecblk_s *dispatch0;
- /* INT_PEND1: */
- struct intr_vecblk_s *dispatch1;
-} hub_intmasks_t;
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __ASM_SN_INTR_PUBLIC_H */
diff -Nru a/include/asm-mips64/sn/io.h b/include/asm-mips64/sn/io.h
--- a/include/asm-mips64/sn/io.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,75 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SN_IO_H
-#define _ASM_SN_IO_H
-
-#include <linux/config.h>
-
-#ifdef CONFIG_SGI_IO
-
-#define IIO_ITTE_BASE 0x400160 /* base of translation table entries */
-#define IIO_ITTE(bigwin) (IIO_ITTE_BASE + 8*(bigwin))
-
-#define IIO_ITTE_OFFSET_BITS 5 /* size of offset field */
-#define IIO_ITTE_OFFSET_MASK ((1<<IIO_ITTE_OFFSET_BITS)-1)
-#define IIO_ITTE_OFFSET_SHIFT 0
-
-#define IIO_ITTE_WIDGET_BITS 4 /* size of widget field */
-#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
-#define IIO_ITTE_WIDGET_SHIFT 8
-
-#define IIO_ITTE_IOSP 1 /* I/O Space bit */
-#define IIO_ITTE_IOSP_MASK 1
-#define IIO_ITTE_IOSP_SHIFT 12
-#define HUB_PIO_MAP_TO_MEM 0
-#define HUB_PIO_MAP_TO_IO 1
-
-#define IIO_ITTE_INVALID_WIDGET 3 /* an invalid widget */
-
-#define IIO_ITTE_PUT(nasid, bigwin, io_or_mem, widget, addr) \
- REMOTE_HUB_S((nasid), IIO_ITTE(bigwin), \
- (((((addr) >> BWIN_SIZE_BITS) & \
- IIO_ITTE_OFFSET_MASK) << IIO_ITTE_OFFSET_SHIFT) | \
- (io_or_mem << IIO_ITTE_IOSP_SHIFT) | \
- (((widget) & IIO_ITTE_WIDGET_MASK) << IIO_ITTE_WIDGET_SHIFT)))
-
-#define IIO_ITTE_DISABLE(nasid, bigwin) \
- IIO_ITTE_PUT((nasid), HUB_PIO_MAP_TO_MEM, \
- (bigwin), IIO_ITTE_INVALID_WIDGET, 0)
-
-#define IIO_ITTE_GET(nasid, bigwin) REMOTE_HUB_ADDR((nasid), IIO_ITTE(bigwin))
-
-/*
- * Macro which takes the widget number, and returns the
- * IO PRB address of that widget.
- * value _x is expected to be a widget number in the range
- * 0, 8 - 0xF
- */
-#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
- (_x) : \
- (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
-
-#if defined (CONFIG_SGI_IP27)
-#include <asm/sn/sn0/hubio.h>
-#endif
-
-#else /* CONFIG_SGI_IO */
-
-#include <asm/sn/sn0/addrs.h>
-
-#define IO_SPACE_BASE IO_BASE
-
-/* Because we only have PCI I/O ports. */
-#define IO_SPACE_LIMIT 0xffffffff
-
-/* No isa_* versions, the Origin doesn't have ISA / EISA bridges. */
-
-#endif /* CONFIG_SGI_IO */
-
-#endif /* _ASM_SN_IO_H */
diff -Nru a/include/asm-mips64/sn/ioc3.h b/include/asm-mips64/sn/ioc3.h
--- a/include/asm-mips64/sn/ioc3.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,661 +0,0 @@
-/*
- * Copyright (C) 1999, 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _IOC3_H
-#define _IOC3_H
-
-/* SUPERIO uart register map */
-typedef volatile struct ioc3_uartregs {
- union {
- volatile u8 rbr; /* read only, DLAB == 0 */
- volatile u8 thr; /* write only, DLAB == 0 */
- volatile u8 dll; /* DLAB == 1 */
- } u1;
- union {
- volatile u8 ier; /* DLAB == 0 */
- volatile u8 dlm; /* DLAB == 1 */
- } u2;
- union {
- volatile u8 iir; /* read only */
- volatile u8 fcr; /* write only */
- } u3;
- volatile u8 iu_lcr;
- volatile u8 iu_mcr;
- volatile u8 iu_lsr;
- volatile u8 iu_msr;
- volatile u8 iu_scr;
-} ioc3_uregs_t;
-
-#define iu_rbr u1.rbr
-#define iu_thr u1.thr
-#define iu_dll u1.dll
-#define iu_ier u2.ier
-#define iu_dlm u2.dlm
-#define iu_iir u3.iir
-#define iu_fcr u3.fcr
-
-struct ioc3_sioregs {
- volatile u8 fill[0x141]; /* starts at 0x141 */
-
- volatile u8 uartc;
- volatile u8 kbdcg;
-
- volatile u8 fill0[0x150 - 0x142 - 1];
-
- volatile u8 pp_data;
- volatile u8 pp_dsr;
- volatile u8 pp_dcr;
-
- volatile u8 fill1[0x158 - 0x152 - 1];
-
- volatile u8 pp_fifa;
- volatile u8 pp_cfgb;
- volatile u8 pp_ecr;
-
- volatile u8 fill2[0x168 - 0x15a - 1];
-
- volatile u8 rtcad;
- volatile u8 rtcdat;
-
- volatile u8 fill3[0x170 - 0x169 - 1];
-
- struct ioc3_uartregs uartb; /* 0x20170 */
- struct ioc3_uartregs uarta; /* 0x20178 */
-};
-
-/* Register layout of IOC3 in configuration space. */
-struct ioc3 {
- volatile u32 pad0[7]; /* 0x00000 */
- volatile u32 sio_ir; /* 0x0001c */
- volatile u32 sio_ies; /* 0x00020 */
- volatile u32 sio_iec; /* 0x00024 */
- volatile u32 sio_cr; /* 0x00028 */
- volatile u32 int_out; /* 0x0002c */
- volatile u32 mcr; /* 0x00030 */
-
- /* General Purpose I/O registers */
- volatile u32 gpcr_s; /* 0x00034 */
- volatile u32 gpcr_c; /* 0x00038 */
- volatile u32 gpdr; /* 0x0003c */
- volatile u32 gppr_0; /* 0x00040 */
- volatile u32 gppr_1; /* 0x00044 */
- volatile u32 gppr_2; /* 0x00048 */
- volatile u32 gppr_3; /* 0x0004c */
- volatile u32 gppr_4; /* 0x00050 */
- volatile u32 gppr_5; /* 0x00054 */
- volatile u32 gppr_6; /* 0x00058 */
- volatile u32 gppr_7; /* 0x0005c */
- volatile u32 gppr_8; /* 0x00060 */
- volatile u32 gppr_9; /* 0x00064 */
- volatile u32 gppr_10; /* 0x00068 */
- volatile u32 gppr_11; /* 0x0006c */
- volatile u32 gppr_12; /* 0x00070 */
- volatile u32 gppr_13; /* 0x00074 */
- volatile u32 gppr_14; /* 0x00078 */
- volatile u32 gppr_15; /* 0x0007c */
-
- /* Parallel Port Registers */
- volatile u32 ppbr_h_a; /* 0x00080 */
- volatile u32 ppbr_l_a; /* 0x00084 */
- volatile u32 ppcr_a; /* 0x00088 */
- volatile u32 ppcr; /* 0x0008c */
- volatile u32 ppbr_h_b; /* 0x00090 */
- volatile u32 ppbr_l_b; /* 0x00094 */
- volatile u32 ppcr_b; /* 0x00098 */
-
- /* Keyboard and Mouse Registers */
- volatile u32 km_csr; /* 0x0009c */
- volatile u32 k_rd; /* 0x000a0 */
- volatile u32 m_rd; /* 0x000a4 */
- volatile u32 k_wd; /* 0x000a8 */
- volatile u32 m_wd; /* 0x000ac */
-
- /* Serial Port Registers */
- volatile u32 sbbr_h; /* 0x000b0 */
- volatile u32 sbbr_l; /* 0x000b4 */
- volatile u32 sscr_a; /* 0x000b8 */
- volatile u32 stpir_a; /* 0x000bc */
- volatile u32 stcir_a; /* 0x000c0 */
- volatile u32 srpir_a; /* 0x000c4 */
- volatile u32 srcir_a; /* 0x000c8 */
- volatile u32 srtr_a; /* 0x000cc */
- volatile u32 shadow_a; /* 0x000d0 */
- volatile u32 sscr_b; /* 0x000d4 */
- volatile u32 stpir_b; /* 0x000d8 */
- volatile u32 stcir_b; /* 0x000dc */
- volatile u32 srpir_b; /* 0x000e0 */
- volatile u32 srcir_b; /* 0x000e4 */
- volatile u32 srtr_b; /* 0x000e8 */
- volatile u32 shadow_b; /* 0x000ec */
-
- /* Ethernet Registers */
- volatile u32 emcr; /* 0x000f0 */
- volatile u32 eisr; /* 0x000f4 */
- volatile u32 eier; /* 0x000f8 */
- volatile u32 ercsr; /* 0x000fc */
- volatile u32 erbr_h; /* 0x00100 */
- volatile u32 erbr_l; /* 0x00104 */
- volatile u32 erbar; /* 0x00108 */
- volatile u32 ercir; /* 0x0010c */
- volatile u32 erpir; /* 0x00110 */
- volatile u32 ertr; /* 0x00114 */
- volatile u32 etcsr; /* 0x00118 */
- volatile u32 ersr; /* 0x0011c */
- volatile u32 etcdc; /* 0x00120 */
- volatile u32 ebir; /* 0x00124 */
- volatile u32 etbr_h; /* 0x00128 */
- volatile u32 etbr_l; /* 0x0012c */
- volatile u32 etcir; /* 0x00130 */
- volatile u32 etpir; /* 0x00134 */
- volatile u32 emar_h; /* 0x00138 */
- volatile u32 emar_l; /* 0x0013c */
- volatile u32 ehar_h; /* 0x00140 */
- volatile u32 ehar_l; /* 0x00144 */
- volatile u32 micr; /* 0x00148 */
- volatile u32 midr_r; /* 0x0014c */
- volatile u32 midr_w; /* 0x00150 */
- volatile u32 pad1[(0x20000 - 0x00154) / 4];
-
- /* SuperIO Registers XXX */
- struct ioc3_sioregs sregs; /* 0x20000 */
- volatile u32 pad2[(0x40000 - 0x20180) / 4];
-
- /* SSRAM Diagnostic Access */
- volatile u32 ssram[(0x80000 - 0x40000) / 4];
-
- /* Bytebus device offsets
- 0x80000 - Access to the generic devices selected with DEV0
- 0x9FFFF bytebus DEV_SEL_0
- 0xA0000 - Access to the generic devices selected with DEV1
- 0xBFFFF bytebus DEV_SEL_1
- 0xC0000 - Access to the generic devices selected with DEV2
- 0xDFFFF bytebus DEV_SEL_2
- 0xE0000 - Access to the generic devices selected with DEV3
- 0xFFFFF bytebus DEV_SEL_3 */
-};
-
-/*
- * Ethernet RX Buffer
- */
-struct ioc3_erxbuf {
- u32 w0; /* first word (valid,bcnt,cksum) */
- u32 err; /* second word various errors */
- /* next comes n bytes of padding */
- /* then the received ethernet frame itself */
-};
-
-#define ERXBUF_IPCKSUM_MASK 0x0000ffff
-#define ERXBUF_BYTECNT_MASK 0x07ff0000
-#define ERXBUF_BYTECNT_SHIFT 16
-#define ERXBUF_V 0x80000000
-
-#define ERXBUF_CRCERR 0x00000001 /* aka RSV15 */
-#define ERXBUF_FRAMERR 0x00000002 /* aka RSV14 */
-#define ERXBUF_CODERR 0x00000004 /* aka RSV13 */
-#define ERXBUF_INVPREAMB 0x00000008 /* aka RSV18 */
-#define ERXBUF_LOLEN 0x00007000 /* aka RSV2_0 */
-#define ERXBUF_HILEN 0x03ff0000 /* aka RSV12_3 */
-#define ERXBUF_MULTICAST 0x04000000 /* aka RSV16 */
-#define ERXBUF_BROADCAST 0x08000000 /* aka RSV17 */
-#define ERXBUF_LONGEVENT 0x10000000 /* aka RSV19 */
-#define ERXBUF_BADPKT 0x20000000 /* aka RSV20 */
-#define ERXBUF_GOODPKT 0x40000000 /* aka RSV21 */
-#define ERXBUF_CARRIER 0x80000000 /* aka RSV22 */
-
-/*
- * Ethernet TX Descriptor
- */
-#define ETXD_DATALEN 104
-struct ioc3_etxd {
- u32 cmd; /* command field */
- u32 bufcnt; /* buffer counts field */
- u64 p1; /* buffer pointer 1 */
- u64 p2; /* buffer pointer 2 */
- u8 data[ETXD_DATALEN]; /* opt. tx data */
-};
-
-#define ETXD_BYTECNT_MASK 0x000007ff /* total byte count */
-#define ETXD_INTWHENDONE 0x00001000 /* intr when done */
-#define ETXD_D0V 0x00010000 /* data 0 valid */
-#define ETXD_B1V 0x00020000 /* buf 1 valid */
-#define ETXD_B2V 0x00040000 /* buf 2 valid */
-#define ETXD_DOCHECKSUM 0x00080000 /* insert ip cksum */
-#define ETXD_CHKOFF_MASK 0x07f00000 /* cksum byte offset */
-#define ETXD_CHKOFF_SHIFT 20
-
-#define ETXD_D0CNT_MASK 0x0000007f
-#define ETXD_B1CNT_MASK 0x0007ff00
-#define ETXD_B1CNT_SHIFT 8
-#define ETXD_B2CNT_MASK 0x7ff00000
-#define ETXD_B2CNT_SHIFT 20
-
-/*
- * Bytebus device space
- */
-#define IOC3_BYTEBUS_DEV0 0x80000L
-#define IOC3_BYTEBUS_DEV1 0xa0000L
-#define IOC3_BYTEBUS_DEV2 0xc0000L
-#define IOC3_BYTEBUS_DEV3 0xe0000L
-
-/* ------------------------------------------------------------------------- */
-
-/* Superio Registers (PIO Access) */
-#define IOC3_SIO_BASE 0x20000
-#define IOC3_SIO_UARTC (IOC3_SIO_BASE+0x141) /* UART Config */
-#define IOC3_SIO_KBDCG (IOC3_SIO_BASE+0x142) /* KBD Config */
-#define IOC3_SIO_PP_BASE (IOC3_SIO_BASE+PP_BASE) /* Parallel Port */
-#define IOC3_SIO_RTC_BASE (IOC3_SIO_BASE+0x168) /* Real Time Clock */
-#define IOC3_SIO_UB_BASE (IOC3_SIO_BASE+UARTB_BASE) /* UART B */
-#define IOC3_SIO_UA_BASE (IOC3_SIO_BASE+UARTA_BASE) /* UART A */
-
-/* SSRAM Diagnostic Access */
-#define IOC3_SSRAM IOC3_RAM_OFF /* base of SSRAM diagnostic access */
-#define IOC3_SSRAM_LEN 0x40000 /* 256kb (address space size, may not be fully populated) */
-#define IOC3_SSRAM_DM 0x0000ffff /* data mask */
-#define IOC3_SSRAM_PM 0x00010000 /* parity mask */
-
-/* bitmasks for PCI_SCR */
-#define PCI_SCR_PAR_RESP_EN 0x00000040 /* enb PCI parity checking */
-#define PCI_SCR_SERR_EN 0x00000100 /* enable the SERR# driver */
-#define PCI_SCR_DROP_MODE_EN 0x00008000 /* drop pios on parity err */
-#define PCI_SCR_RX_SERR (0x1 << 16)
-#define PCI_SCR_DROP_MODE (0x1 << 17)
-#define PCI_SCR_SIG_PAR_ERR (0x1 << 24)
-#define PCI_SCR_SIG_TAR_ABRT (0x1 << 27)
-#define PCI_SCR_RX_TAR_ABRT (0x1 << 28)
-#define PCI_SCR_SIG_MST_ABRT (0x1 << 29)
-#define PCI_SCR_SIG_SERR (0x1 << 30)
-#define PCI_SCR_PAR_ERR (0x1 << 31)
-
-/* bitmasks for IOC3_KM_CSR */
-#define KM_CSR_K_WRT_PEND 0x00000001 /* kbd port xmitting or resetting */
-#define KM_CSR_M_WRT_PEND 0x00000002 /* mouse port xmitting or resetting */
-#define KM_CSR_K_LCB 0x00000004 /* Line Cntrl Bit for last KBD write */
-#define KM_CSR_M_LCB 0x00000008 /* same for mouse */
-#define KM_CSR_K_DATA 0x00000010 /* state of kbd data line */
-#define KM_CSR_K_CLK 0x00000020 /* state of kbd clock line */
-#define KM_CSR_K_PULL_DATA 0x00000040 /* pull kbd data line low */
-#define KM_CSR_K_PULL_CLK 0x00000080 /* pull kbd clock line low */
-#define KM_CSR_M_DATA 0x00000100 /* state of ms data line */
-#define KM_CSR_M_CLK 0x00000200 /* state of ms clock line */
-#define KM_CSR_M_PULL_DATA 0x00000400 /* pull ms data line low */
-#define KM_CSR_M_PULL_CLK 0x00000800 /* pull ms clock line low */
-#define KM_CSR_EMM_MODE 0x00001000 /* emulation mode */
-#define KM_CSR_SIM_MODE 0x00002000 /* clock X8 */
-#define KM_CSR_K_SM_IDLE 0x00004000 /* Keyboard is idle */
-#define KM_CSR_M_SM_IDLE 0x00008000 /* Mouse is idle */
-#define KM_CSR_K_TO 0x00010000 /* Keyboard trying to send/receive */
-#define KM_CSR_M_TO 0x00020000 /* Mouse trying to send/receive */
-#define KM_CSR_K_TO_EN 0x00040000 /* KM_CSR_K_TO + KM_CSR_K_TO_EN = cause
- SIO_IR to assert */
-#define KM_CSR_M_TO_EN 0x00080000 /* KM_CSR_M_TO + KM_CSR_M_TO_EN = cause
- SIO_IR to assert */
-#define KM_CSR_K_CLAMP_ONE 0x00100000 /* Pull K_CLK low after rec. one char */
-#define KM_CSR_M_CLAMP_ONE 0x00200000 /* Pull M_CLK low after rec. one char */
-#define KM_CSR_K_CLAMP_THREE 0x00400000 /* Pull K_CLK low after rec. three chars */
-#define KM_CSR_M_CLAMP_THREE 0x00800000 /* Pull M_CLK low after rec. three char */
-
-/* bitmasks for IOC3_K_RD and IOC3_M_RD */
-#define KM_RD_DATA_2 0x000000ff /* 3rd char recvd since last read */
-#define KM_RD_DATA_2_SHIFT 0
-#define KM_RD_DATA_1 0x0000ff00 /* 2nd char recvd since last read */
-#define KM_RD_DATA_1_SHIFT 8
-#define KM_RD_DATA_0 0x00ff0000 /* 1st char recvd since last read */
-#define KM_RD_DATA_0_SHIFT 16
-#define KM_RD_FRAME_ERR_2 0x01000000 /* framing or parity error in byte 2 */
-#define KM_RD_FRAME_ERR_1 0x02000000 /* same for byte 1 */
-#define KM_RD_FRAME_ERR_0 0x04000000 /* same for byte 0 */
-
-#define KM_RD_KBD_MSE 0x08000000 /* 0 if from kbd, 1 if from mouse */
-#define KM_RD_OFLO 0x10000000 /* 4th char recvd before this read */
-#define KM_RD_VALID_2 0x20000000 /* DATA_2 valid */
-#define KM_RD_VALID_1 0x40000000 /* DATA_1 valid */
-#define KM_RD_VALID_0 0x80000000 /* DATA_0 valid */
-#define KM_RD_VALID_ALL (KM_RD_VALID_0|KM_RD_VALID_1|KM_RD_VALID_2)
-
-/* bitmasks for IOC3_K_WD & IOC3_M_WD */
-#define KM_WD_WRT_DATA 0x000000ff /* write to keyboard/mouse port */
-#define KM_WD_WRT_DATA_SHIFT 0
-
-/* bitmasks for serial RX status byte */
-#define RXSB_OVERRUN 0x01 /* char(s) lost */
-#define RXSB_PAR_ERR 0x02 /* parity error */
-#define RXSB_FRAME_ERR 0x04 /* framing error */
-#define RXSB_BREAK 0x08 /* break character */
-#define RXSB_CTS 0x10 /* state of CTS */
-#define RXSB_DCD 0x20 /* state of DCD */
-#define RXSB_MODEM_VALID 0x40 /* DCD, CTS and OVERRUN are valid */
-#define RXSB_DATA_VALID 0x80 /* data byte, FRAME_ERR PAR_ERR & BREAK valid */
-
-/* bitmasks for serial TX control byte */
-#define TXCB_INT_WHEN_DONE 0x20 /* interrupt after this byte is sent */
-#define TXCB_INVALID 0x00 /* byte is invalid */
-#define TXCB_VALID 0x40 /* byte is valid */
-#define TXCB_MCR 0x80 /* data<7:0> to modem control register */
-#define TXCB_DELAY 0xc0 /* delay data<7:0> mSec */
-
-/* bitmasks for IOC3_SBBR_L */
-#define SBBR_L_SIZE 0x00000001 /* 0 == 1KB rings, 1 == 4KB rings */
-#define SBBR_L_BASE 0xfffff000 /* lower serial ring base addr */
-
-/* bitmasks for IOC3_SSCR_<A:B> */
-#define SSCR_RX_THRESHOLD 0x000001ff /* hiwater mark */
-#define SSCR_TX_TIMER_BUSY 0x00010000 /* TX timer in progress */
-#define SSCR_HFC_EN 0x00020000 /* hardware flow control enabled */
-#define SSCR_RX_RING_DCD 0x00040000 /* post RX record on delta-DCD */
-#define SSCR_RX_RING_CTS 0x00080000 /* post RX record on delta-CTS */
-#define SSCR_HIGH_SPD 0x00100000 /* 4X speed */
-#define SSCR_DIAG 0x00200000 /* bypass clock divider for sim */
-#define SSCR_RX_DRAIN 0x08000000 /* drain RX buffer to memory */
-#define SSCR_DMA_EN 0x10000000 /* enable ring buffer DMA */
-#define SSCR_DMA_PAUSE 0x20000000 /* pause DMA */
-#define SSCR_PAUSE_STATE 0x40000000 /* sets when PAUSE takes effect */
-#define SSCR_RESET 0x80000000 /* reset DMA channels */
-
-/* all producer/comsumer pointers are the same bitfield */
-#define PROD_CONS_PTR_4K 0x00000ff8 /* for 4K buffers */
-#define PROD_CONS_PTR_1K 0x000003f8 /* for 1K buffers */
-#define PROD_CONS_PTR_OFF 3
-
-/* bitmasks for IOC3_SRCIR_<A:B> */
-#define SRCIR_ARM 0x80000000 /* arm RX timer */
-
-/* bitmasks for IOC3_SRPIR_<A:B> */
-#define SRPIR_BYTE_CNT 0x07000000 /* bytes in packer */
-#define SRPIR_BYTE_CNT_SHIFT 24
-
-/* bitmasks for IOC3_STCIR_<A:B> */
-#define STCIR_BYTE_CNT 0x0f000000 /* bytes in unpacker */
-#define STCIR_BYTE_CNT_SHIFT 24
-
-/* bitmasks for IOC3_SHADOW_<A:B> */
-#define SHADOW_DR 0x00000001 /* data ready */
-#define SHADOW_OE 0x00000002 /* overrun error */
-#define SHADOW_PE 0x00000004 /* parity error */
-#define SHADOW_FE 0x00000008 /* framing error */
-#define SHADOW_BI 0x00000010 /* break interrupt */
-#define SHADOW_THRE 0x00000020 /* transmit holding register empty */
-#define SHADOW_TEMT 0x00000040 /* transmit shift register empty */
-#define SHADOW_RFCE 0x00000080 /* char in RX fifo has an error */
-#define SHADOW_DCTS 0x00010000 /* delta clear to send */
-#define SHADOW_DDCD 0x00080000 /* delta data carrier detect */
-#define SHADOW_CTS 0x00100000 /* clear to send */
-#define SHADOW_DCD 0x00800000 /* data carrier detect */
-#define SHADOW_DTR 0x01000000 /* data terminal ready */
-#define SHADOW_RTS 0x02000000 /* request to send */
-#define SHADOW_OUT1 0x04000000 /* 16550 OUT1 bit */
-#define SHADOW_OUT2 0x08000000 /* 16550 OUT2 bit */
-#define SHADOW_LOOP 0x10000000 /* loopback enabled */
-
-/* bitmasks for IOC3_SRTR_<A:B> */
-#define SRTR_CNT 0x00000fff /* reload value for RX timer */
-#define SRTR_CNT_VAL 0x0fff0000 /* current value of RX timer */
-#define SRTR_CNT_VAL_SHIFT 16
-#define SRTR_HZ 16000 /* SRTR clock frequency */
-
-/* bitmasks for IOC3_SIO_IR, IOC3_SIO_IEC and IOC3_SIO_IES */
-#define SIO_IR_SA_TX_MT 0x00000001 /* Serial port A TX empty */
-#define SIO_IR_SA_RX_FULL 0x00000002 /* port A RX buf full */
-#define SIO_IR_SA_RX_HIGH 0x00000004 /* port A RX hiwat */
-#define SIO_IR_SA_RX_TIMER 0x00000008 /* port A RX timeout */
-#define SIO_IR_SA_DELTA_DCD 0x00000010 /* port A delta DCD */
-#define SIO_IR_SA_DELTA_CTS 0x00000020 /* port A delta CTS */
-#define SIO_IR_SA_INT 0x00000040 /* port A pass-thru intr */
-#define SIO_IR_SA_TX_EXPLICIT 0x00000080 /* port A explicit TX thru */
-#define SIO_IR_SA_MEMERR 0x00000100 /* port A PCI error */
-#define SIO_IR_SB_TX_MT 0x00000200 /* */
-#define SIO_IR_SB_RX_FULL 0x00000400 /* */
-#define SIO_IR_SB_RX_HIGH 0x00000800 /* */
-#define SIO_IR_SB_RX_TIMER 0x00001000 /* */
-#define SIO_IR_SB_DELTA_DCD 0x00002000 /* */
-#define SIO_IR_SB_DELTA_CTS 0x00004000 /* */
-#define SIO_IR_SB_INT 0x00008000 /* */
-#define SIO_IR_SB_TX_EXPLICIT 0x00010000 /* */
-#define SIO_IR_SB_MEMERR 0x00020000 /* */
-#define SIO_IR_PP_INT 0x00040000 /* P port pass-thru intr */
-#define SIO_IR_PP_INTA 0x00080000 /* PP context A thru */
-#define SIO_IR_PP_INTB 0x00100000 /* PP context B thru */
-#define SIO_IR_PP_MEMERR 0x00200000 /* PP PCI error */
-#define SIO_IR_KBD_INT 0x00400000 /* kbd/mouse intr */
-#define SIO_IR_RT_INT 0x08000000 /* RT output pulse */
-#define SIO_IR_GEN_INT1 0x10000000 /* RT input pulse */
-#define SIO_IR_GEN_INT_SHIFT 28
-
-/* per device interrupt masks */
-#define SIO_IR_SA (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL | \
- SIO_IR_SA_RX_HIGH | SIO_IR_SA_RX_TIMER | \
- SIO_IR_SA_DELTA_DCD | SIO_IR_SA_DELTA_CTS | \
- SIO_IR_SA_INT | SIO_IR_SA_TX_EXPLICIT | \
- SIO_IR_SA_MEMERR)
-#define SIO_IR_SB (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL | \
- SIO_IR_SB_RX_HIGH | SIO_IR_SB_RX_TIMER | \
- SIO_IR_SB_DELTA_DCD | SIO_IR_SB_DELTA_CTS | \
- SIO_IR_SB_INT | SIO_IR_SB_TX_EXPLICIT | \
- SIO_IR_SB_MEMERR)
-#define SIO_IR_PP (SIO_IR_PP_INT | SIO_IR_PP_INTA | \
- SIO_IR_PP_INTB | SIO_IR_PP_MEMERR)
-#define SIO_IR_RT (SIO_IR_RT_INT | SIO_IR_GEN_INT1)
-
-/* macro to load pending interrupts */
-#define IOC3_PENDING_INTRS(mem) (PCI_INW(&((mem)->sio_ir)) & \
- PCI_INW(&((mem)->sio_ies_ro)))
-
-/* bitmasks for SIO_CR */
-#define SIO_CR_SIO_RESET 0x00000001 /* reset the SIO */
-#define SIO_CR_SER_A_BASE 0x000000fe /* DMA poll addr port A */
-#define SIO_CR_SER_A_BASE_SHIFT 1
-#define SIO_CR_SER_B_BASE 0x00007f00 /* DMA poll addr port B */
-#define SIO_CR_SER_B_BASE_SHIFT 8
-#define SIO_SR_CMD_PULSE 0x00078000 /* byte bus strobe length */
-#define SIO_CR_CMD_PULSE_SHIFT 15
-#define SIO_CR_ARB_DIAG 0x00380000 /* cur !enet PCI requet (ro) */
-#define SIO_CR_ARB_DIAG_TXA 0x00000000
-#define SIO_CR_ARB_DIAG_RXA 0x00080000
-#define SIO_CR_ARB_DIAG_TXB 0x00100000
-#define SIO_CR_ARB_DIAG_RXB 0x00180000
-#define SIO_CR_ARB_DIAG_PP 0x00200000
-#define SIO_CR_ARB_DIAG_IDLE 0x00400000 /* 0 -> active request (ro) */
-
-/* bitmasks for INT_OUT */
-#define INT_OUT_COUNT 0x0000ffff /* pulse interval timer */
-#define INT_OUT_MODE 0x00070000 /* mode mask */
-#define INT_OUT_MODE_0 0x00000000 /* set output to 0 */
-#define INT_OUT_MODE_1 0x00040000 /* set output to 1 */
-#define INT_OUT_MODE_1PULSE 0x00050000 /* send 1 pulse */
-#define INT_OUT_MODE_PULSES 0x00060000 /* send 1 pulse every interval */
-#define INT_OUT_MODE_SQW 0x00070000 /* toggle output every interval */
-#define INT_OUT_DIAG 0x40000000 /* diag mode */
-#define INT_OUT_INT_OUT 0x80000000 /* current state of INT_OUT */
-
-/* time constants for INT_OUT */
-#define INT_OUT_NS_PER_TICK (30 * 260) /* 30 ns PCI clock, divisor=260 */
-#define INT_OUT_TICKS_PER_PULSE 3 /* outgoing pulse lasts 3 ticks */
-#define INT_OUT_US_TO_COUNT(x) /* convert uS to a count value */ \
- (((x) * 10 + INT_OUT_NS_PER_TICK / 200) * \
- 100 / INT_OUT_NS_PER_TICK - 1)
-#define INT_OUT_COUNT_TO_US(x) /* convert count value to uS */ \
- (((x) + 1) * INT_OUT_NS_PER_TICK / 1000)
-#define INT_OUT_MIN_TICKS 3 /* min period is width of pulse in "ticks" */
-#define INT_OUT_MAX_TICKS INT_OUT_COUNT /* largest possible count */
-
-/* bitmasks for GPCR */
-#define GPCR_DIR 0x000000ff /* tristate pin input or output */
-#define GPCR_DIR_PIN(x) (1<<(x)) /* access one of the DIR bits */
-#define GPCR_EDGE 0x000f0000 /* extint edge or level sensitive */
-#define GPCR_EDGE_PIN(x) (1<<((x)+15)) /* access one of the EDGE bits */
-
-/* values for GPCR */
-#define GPCR_INT_OUT_EN 0x00100000 /* enable INT_OUT to pin 0 */
-#define GPCR_MLAN_EN 0x00200000 /* enable MCR to pin 8 */
-#define GPCR_DIR_SERA_XCVR 0x00000080 /* Port A Transceiver select enable */
-#define GPCR_DIR_SERB_XCVR 0x00000040 /* Port B Transceiver select enable */
-#define GPCR_DIR_PHY_RST 0x00000020 /* ethernet PHY reset enable */
-
-/* defs for some of the generic I/O pins */
-#define GPCR_PHY_RESET 0x20 /* pin is output to PHY reset */
-#define GPCR_UARTB_MODESEL 0x40 /* pin is output to port B mode sel */
-#define GPCR_UARTA_MODESEL 0x80 /* pin is output to port A mode sel */
-
-#define GPPR_PHY_RESET_PIN 5 /* GIO pin controlling phy reset */
-#define GPPR_UARTB_MODESEL_PIN 6 /* GIO pin controlling uart b mode select */
-#define GPPR_UARTA_MODESEL_PIN 7 /* GIO pin controlling uart a mode select */
-
-#define EMCR_DUPLEX 0x00000001
-#define EMCR_PROMISC 0x00000002
-#define EMCR_PADEN 0x00000004
-#define EMCR_RXOFF_MASK 0x000001f8
-#define EMCR_RXOFF_SHIFT 3
-#define EMCR_RAMPAR 0x00000200
-#define EMCR_BADPAR 0x00000800
-#define EMCR_BUFSIZ 0x00001000
-#define EMCR_TXDMAEN 0x00002000
-#define EMCR_TXEN 0x00004000
-#define EMCR_RXDMAEN 0x00008000
-#define EMCR_RXEN 0x00010000
-#define EMCR_LOOPBACK 0x00020000
-#define EMCR_ARB_DIAG 0x001c0000
-#define EMCR_ARB_DIAG_IDLE 0x00200000
-#define EMCR_RST 0x80000000
-
-#define EISR_RXTIMERINT 0x00000001
-#define EISR_RXTHRESHINT 0x00000002
-#define EISR_RXOFLO 0x00000004
-#define EISR_RXBUFOFLO 0x00000008
-#define EISR_RXMEMERR 0x00000010
-#define EISR_RXPARERR 0x00000020
-#define EISR_TXEMPTY 0x00010000
-#define EISR_TXRTRY 0x00020000
-#define EISR_TXEXDEF 0x00040000
-#define EISR_TXLCOL 0x00080000
-#define EISR_TXGIANT 0x00100000
-#define EISR_TXBUFUFLO 0x00200000
-#define EISR_TXEXPLICIT 0x00400000
-#define EISR_TXCOLLWRAP 0x00800000
-#define EISR_TXDEFERWRAP 0x01000000
-#define EISR_TXMEMERR 0x02000000
-#define EISR_TXPARERR 0x04000000
-
-#define ERCSR_THRESH_MASK 0x000001ff /* enet RX threshold */
-#define ERCSR_RX_TMR 0x40000000 /* simulation only */
-#define ERCSR_DIAG_OFLO 0x80000000 /* simulation only */
-
-#define ERBR_ALIGNMENT 4096
-#define ERBR_L_RXRINGBASE_MASK 0xfffff000
-
-#define ERBAR_BARRIER_BIT 0x0100
-#define ERBAR_RXBARR_MASK 0xffff0000
-#define ERBAR_RXBARR_SHIFT 16
-
-#define ERCIR_RXCONSUME_MASK 0x00000fff
-
-#define ERPIR_RXPRODUCE_MASK 0x00000fff
-#define ERPIR_ARM 0x80000000
-
-#define ERTR_CNT_MASK 0x000007ff
-
-#define ETCSR_IPGT_MASK 0x0000007f
-#define ETCSR_IPGR1_MASK 0x00007f00
-#define ETCSR_IPGR1_SHIFT 8
-#define ETCSR_IPGR2_MASK 0x007f0000
-#define ETCSR_IPGR2_SHIFT 16
-#define ETCSR_NOTXCLK 0x80000000
-
-#define ETCDC_COLLCNT_MASK 0x0000ffff
-#define ETCDC_DEFERCNT_MASK 0xffff0000
-#define ETCDC_DEFERCNT_SHIFT 16
-
-#define ETBR_ALIGNMENT (64*1024)
-#define ETBR_L_RINGSZ_MASK 0x00000001
-#define ETBR_L_RINGSZ128 0
-#define ETBR_L_RINGSZ512 1
-#define ETBR_L_TXRINGBASE_MASK 0xffffc000
-
-#define ETCIR_TXCONSUME_MASK 0x0000ffff
-#define ETCIR_IDLE 0x80000000
-
-#define ETPIR_TXPRODUCE_MASK 0x0000ffff
-
-#define EBIR_TXBUFPROD_MASK 0x0000001f
-#define EBIR_TXBUFCONS_MASK 0x00001f00
-#define EBIR_TXBUFCONS_SHIFT 8
-#define EBIR_RXBUFPROD_MASK 0x007fc000
-#define EBIR_RXBUFPROD_SHIFT 14
-#define EBIR_RXBUFCONS_MASK 0xff800000
-#define EBIR_RXBUFCONS_SHIFT 23
-
-#define MICR_REGADDR_MASK 0x0000001f
-#define MICR_PHYADDR_MASK 0x000003e0
-#define MICR_PHYADDR_SHIFT 5
-#define MICR_READTRIG 0x00000400
-#define MICR_BUSY 0x00000800
-
-#define MIDR_DATA_MASK 0x0000ffff
-
-#define ERXBUF_IPCKSUM_MASK 0x0000ffff
-#define ERXBUF_BYTECNT_MASK 0x07ff0000
-#define ERXBUF_BYTECNT_SHIFT 16
-#define ERXBUF_V 0x80000000
-
-#define ERXBUF_CRCERR 0x00000001 /* aka RSV15 */
-#define ERXBUF_FRAMERR 0x00000002 /* aka RSV14 */
-#define ERXBUF_CODERR 0x00000004 /* aka RSV13 */
-#define ERXBUF_INVPREAMB 0x00000008 /* aka RSV18 */
-#define ERXBUF_LOLEN 0x00007000 /* aka RSV2_0 */
-#define ERXBUF_HILEN 0x03ff0000 /* aka RSV12_3 */
-#define ERXBUF_MULTICAST 0x04000000 /* aka RSV16 */
-#define ERXBUF_BROADCAST 0x08000000 /* aka RSV17 */
-#define ERXBUF_LONGEVENT 0x10000000 /* aka RSV19 */
-#define ERXBUF_BADPKT 0x20000000 /* aka RSV20 */
-#define ERXBUF_GOODPKT 0x40000000 /* aka RSV21 */
-#define ERXBUF_CARRIER 0x80000000 /* aka RSV22 */
-
-#define ETXD_BYTECNT_MASK 0x000007ff /* total byte count */
-#define ETXD_INTWHENDONE 0x00001000 /* intr when done */
-#define ETXD_D0V 0x00010000 /* data 0 valid */
-#define ETXD_B1V 0x00020000 /* buf 1 valid */
-#define ETXD_B2V 0x00040000 /* buf 2 valid */
-#define ETXD_DOCHECKSUM 0x00080000 /* insert ip cksum */
-#define ETXD_CHKOFF_MASK 0x07f00000 /* cksum byte offset */
-#define ETXD_CHKOFF_SHIFT 20
-
-#define ETXD_D0CNT_MASK 0x0000007f
-#define ETXD_B1CNT_MASK 0x0007ff00
-#define ETXD_B1CNT_SHIFT 8
-#define ETXD_B2CNT_MASK 0x7ff00000
-#define ETXD_B2CNT_SHIFT 20
-
-typedef enum ioc3_subdevs_e {
- ioc3_subdev_ether,
- ioc3_subdev_generic,
- ioc3_subdev_nic,
- ioc3_subdev_kbms,
- ioc3_subdev_ttya,
- ioc3_subdev_ttyb,
- ioc3_subdev_ecpp,
- ioc3_subdev_rt,
- ioc3_nsubdevs
-} ioc3_subdev_t;
-
-/* subdevice disable bits,
- * from the standard INFO_LBL_SUBDEVS
- */
-#define IOC3_SDB_ETHER (1<<ioc3_subdev_ether)
-#define IOC3_SDB_GENERIC (1<<ioc3_subdev_generic)
-#define IOC3_SDB_NIC (1<<ioc3_subdev_nic)
-#define IOC3_SDB_KBMS (1<<ioc3_subdev_kbms)
-#define IOC3_SDB_TTYA (1<<ioc3_subdev_ttya)
-#define IOC3_SDB_TTYB (1<<ioc3_subdev_ttyb)
-#define IOC3_SDB_ECPP (1<<ioc3_subdev_ecpp)
-#define IOC3_SDB_RT (1<<ioc3_subdev_rt)
-
-#define IOC3_ALL_SUBDEVS ((1<<ioc3_nsubdevs)-1)
-
-#define IOC3_SDB_SERIAL (IOC3_SDB_TTYA|IOC3_SDB_TTYB)
-
-#define IOC3_STD_SUBDEVS IOC3_ALL_SUBDEVS
-
-#define IOC3_INTA_SUBDEVS IOC3_SDB_ETHER
-#define IOC3_INTB_SUBDEVS (IOC3_SDB_GENERIC|IOC3_SDB_KBMS|IOC3_SDB_SERIAL|IOC3_SDB_ECPP|IOC3_SDB_RT)
-
-#endif /* _IOC3_H */
diff -Nru a/include/asm-mips64/sn/klconfig.h b/include/asm-mips64/sn/klconfig.h
--- a/include/asm-mips64/sn/klconfig.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,974 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/klconfig.h>.
- *
- * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 1999, 2000 by Ralf Baechle
- */
-#ifndef _ASM_SN_KLCONFIG_H
-#define _ASM_SN_KLCONFIG_H
-
-/*
- * The KLCONFIG structures store info about the various BOARDs found
- * during Hardware Discovery. In addition, it stores info about the
- * components found on the BOARDs.
- */
-
-/*
- * WARNING:
- * Certain assembly language routines (notably xxxxx.s) in the IP27PROM
- * will depend on the format of the data structures in this file. In
- * most cases, rearranging the fields can seriously break things.
- * Adding fields in the beginning or middle can also break things.
- * Add fields if necessary, to the end of a struct in such a way
- * that offsets of existing fields do not change.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <asm/sn/types.h>
-#if defined(CONFIG_SGI_IP27)
-#include <asm/sn/sn0/addrs.h>
-//#include <sys/SN/router.h>
-// XXX Stolen from <sys/SN/router.h>:
-#define MAX_ROUTER_PORTS (6) /* Max. number of ports on a router */
-#include <asm/sn/sn0/sn0_fru.h>
-//#include <sys/graph.h>
-//#include <sys/xtalk/xbow.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/addrs.h>
-#include <sys/sn/router.h>
-#include <sys/graph.h>
-#include <asm/xtalk/xbow.h>
-#endif /* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
-#if defined(CONFIG_SGI_IP27) || defined(CONFIG_SGI_IP35)
-#include <asm/sn/agent.h>
-#include <asm/arc/types.h>
-#include <asm/arc/hinv.h>
-#if defined(CONFIG_SGI_IO) || defined(CONFIG_SGI_IP35)
-// The hack file has to be before vector and after sn0_fru....
-#include <asm/hack.h>
-#include <asm/sn/vector.h>
-#include <asm/xtalk/xtalk.h>
-#endif /* CONFIG_SGI_IO || CONFIG_SGI_IP35 */
-#endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */
-
-#define KLCFGINFO_MAGIC 0xbeedbabe
-
-#ifdef FRUTEST
-typedef u64 klconf_off_t;
-#else
-typedef s32 klconf_off_t;
-#endif
-
-/*
- * Some IMPORTANT OFFSETS. These are the offsets on all NODES.
- */
-#if 0
-#define RAMBASE 0
-#define ARCSSPB_OFF 0x1000 /* shift it to sys/arcs/spb.h */
-
-#define OFF_HWGRAPH 0
-#endif
-
-#define MAX_MODULE_ID 255
-#define SIZE_PAD 4096 /* 4k padding for structures */
-/*
- * 1 NODE brd, 2 Router brd (1 8p, 1 meta), 6 Widgets,
- * 2 Midplanes assuming no pci card cages
- */
-#define MAX_SLOTS_PER_NODE (1 + 2 + 6 + 2)
-
-/* XXX if each node is guranteed to have some memory */
-
-#define MAX_PCI_DEVS 8
-
-/* lboard_t->brd_flags fields */
-/* All bits in this field are currently used. Try the pad fields if
- you need more flag bits */
-
-#define ENABLE_BOARD 0x01
-#define FAILED_BOARD 0x02
-#define DUPLICATE_BOARD 0x04 /* Boards like midplanes/routers which
- are discovered twice. Use one of them */
-#define VISITED_BOARD 0x08 /* Used for compact hub numbering. */
-#define LOCAL_MASTER_IO6 0x10 /* master io6 for that node */
-#define GLOBAL_MASTER_IO6 0x20
-#define THIRD_NIC_PRESENT 0x40 /* for future use */
-#define SECOND_NIC_PRESENT 0x80 /* addons like MIO are present */
-
-/* klinfo->flags fields */
-
-#define KLINFO_ENABLE 0x01 /* This component is enabled */
-#define KLINFO_FAILED 0x02 /* This component failed */
-#define KLINFO_DEVICE 0x04 /* This component is a device */
-#define KLINFO_VISITED 0x08 /* This component has been visited */
-#define KLINFO_CONTROLLER 0x10 /* This component is a device controller */
-#define KLINFO_INSTALL 0x20 /* Install a driver */
-#define KLINFO_HEADLESS 0x40 /* Headless (or hubless) component */
-#define IS_CONSOLE_IOC3(i) ((((klinfo_t *)i)->flags) & KLINFO_INSTALL)
-
-#define GB2 0x80000000
-
-#define MAX_RSV_PTRS 32
-
-/* Structures to manage various data storage areas */
-/* The numbers must be contiguous since the array index i
- is used in the code to allocate various areas.
-*/
-
-#define BOARD_STRUCT 0
-#define COMPONENT_STRUCT 1
-#define ERRINFO_STRUCT 2
-#define KLMALLOC_TYPE_MAX (ERRINFO_STRUCT + 1)
-#define DEVICE_STRUCT 3
-
-
-typedef struct console_s {
-#if defined(CONFIG_SGI_IO) /* FIXME */
- __psunsigned_t uart_base;
- __psunsigned_t config_base;
- __psunsigned_t memory_base;
-#else
- unsigned long uart_base;
- unsigned long config_base;
- unsigned long memory_base;
-#endif
- short baud;
- short flag;
- int type;
- nasid_t nasid;
- char wid;
- char npci;
- nic_t baseio_nic;
-} console_t;
-
-typedef struct klc_malloc_hdr {
- klconf_off_t km_base;
- klconf_off_t km_limit;
- klconf_off_t km_current;
-} klc_malloc_hdr_t;
-
-/* Functions/macros needed to use this structure */
-
-typedef struct kl_config_hdr {
- u64 ch_magic; /* set this to KLCFGINFO_MAGIC */
- u32 ch_version; /* structure version number */
- klconf_off_t ch_malloc_hdr_off; /* offset of ch_malloc_hdr */
- klconf_off_t ch_cons_off; /* offset of ch_cons */
- klconf_off_t ch_board_info; /* the link list of boards */
- console_t ch_cons_info; /* address info of the console */
- klc_malloc_hdr_t ch_malloc_hdr[KLMALLOC_TYPE_MAX];
- confidence_t ch_sw_belief; /* confidence that software is bad*/
- confidence_t ch_sn0net_belief; /* confidence that sn0net is bad */
-} kl_config_hdr_t;
-
-
-#define KL_CONFIG_HDR(_nasid) ((kl_config_hdr_t *)(KLCONFIG_ADDR(_nasid)))
-#if 0
-#define KL_CONFIG_MALLOC_HDR(_nasid) \
- (KL_CONFIG_HDR(_nasid)->ch_malloc_hdr)
-#endif
-#define KL_CONFIG_INFO_OFFSET(_nasid) \
- (KL_CONFIG_HDR(_nasid)->ch_board_info)
-#define KL_CONFIG_INFO_SET_OFFSET(_nasid, _off) \
- (KL_CONFIG_HDR(_nasid)->ch_board_info = (_off))
-
-#define KL_CONFIG_INFO(_nasid) \
- (lboard_t *)((KL_CONFIG_HDR(_nasid)->ch_board_info) ? \
- NODE_OFFSET_TO_K1((_nasid), KL_CONFIG_HDR(_nasid)->ch_board_info) : \
- 0)
-#define KL_CONFIG_MAGIC(_nasid) (KL_CONFIG_HDR(_nasid)->ch_magic)
-
-#define KL_CONFIG_CHECK_MAGIC(_nasid) \
- (KL_CONFIG_HDR(_nasid)->ch_magic == KLCFGINFO_MAGIC)
-
-#define KL_CONFIG_HDR_INIT_MAGIC(_nasid) \
- (KL_CONFIG_HDR(_nasid)->ch_magic = KLCFGINFO_MAGIC)
-
-/* --- New Macros for the changed kl_config_hdr_t structure --- */
-
-#if defined(CONFIG_SGI_IO)
-#define PTR_CH_MALLOC_HDR(_k) ((klc_malloc_hdr_t *)\
- ((__psunsigned_t)_k + (_k->ch_malloc_hdr_off)))
-#else
-#define PTR_CH_MALLOC_HDR(_k) ((klc_malloc_hdr_t *)\
- (unsigned long)_k + (_k->ch_malloc_hdr_off)))
-#endif
-
-#define KL_CONFIG_CH_MALLOC_HDR(_n) PTR_CH_MALLOC_HDR(KL_CONFIG_HDR(_n))
-
-#if defined(CONFIG_SGI_IO)
-#define PTR_CH_CONS_INFO(_k) ((console_t *)\
- ((__psunsigned_t)_k + (_k->ch_cons_off)))
-#else
-#define PTR_CH_CONS_INFO(_k) ((console_t *)\
- ((unsigned long)_k + (_k->ch_cons_off)))
-#endif
-
-#define KL_CONFIG_CH_CONS_INFO(_n) PTR_CH_CONS_INFO(KL_CONFIG_HDR(_n))
-
-/* ------------------------------------------------------------- */
-
-#define KL_CONFIG_INFO_START(_nasid) \
- (klconf_off_t)(KLCONFIG_OFFSET(_nasid) + sizeof(kl_config_hdr_t))
-
-#define KL_CONFIG_BOARD_NASID(_brd) ((_brd)->brd_nasid)
-#define KL_CONFIG_BOARD_SET_NEXT(_brd, _off) ((_brd)->brd_next = (_off))
-
-#define KL_CONFIG_DUPLICATE_BOARD(_brd) ((_brd)->brd_flags & DUPLICATE_BOARD)
-
-#define XBOW_PORT_TYPE_HUB(_xbowp, _link) \
- ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_flag & XBOW_PORT_HUB)
-#define XBOW_PORT_TYPE_IO(_xbowp, _link) \
- ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_flag & XBOW_PORT_IO)
-
-#define XBOW_PORT_IS_ENABLED(_xbowp, _link) \
- ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_flag & XBOW_PORT_ENABLE)
-#define XBOW_PORT_NASID(_xbowp, _link) \
- ((_xbowp)->xbow_port_info[(_link) - BASE_XBOW_PORT].port_nasid)
-
-#define XBOW_PORT_IO 0x1
-#define XBOW_PORT_HUB 0x2
-#define XBOW_PORT_ENABLE 0x4
-
-#define SN0_PORT_FENCE_SHFT 0
-#define SN0_PORT_FENCE_MASK (1 << SN0_PORT_FENCE_SHFT)
-
-/*
- * The KLCONFIG area is organized as a LINKED LIST of BOARDs. A BOARD
- * can be either 'LOCAL' or 'REMOTE'. LOCAL means it is attached to
- * the LOCAL/current NODE. REMOTE means it is attached to a different
- * node.(TBD - Need a way to treat ROUTER boards.)
- *
- * There are 2 different structures to represent these boards -
- * lboard - Local board, rboard - remote board. These 2 structures
- * can be arbitrarily mixed in the LINKED LIST of BOARDs. (Refer
- * Figure below). The first byte of the rboard or lboard structure
- * is used to find out its type - no unions are used.
- * If it is a lboard, then the config info of this board will be found
- * on the local node. (LOCAL NODE BASE + offset value gives pointer to
- * the structure.
- * If it is a rboard, the local structure contains the node number
- * and the offset of the beginning of the LINKED LIST on the remote node.
- * The details of the hardware on a remote node can be built locally,
- * if required, by reading the LINKED LIST on the remote node and
- * ignoring all the rboards on that node.
- *
- * The local node uses the REMOTE NODE NUMBER + OFFSET to point to the
- * First board info on the remote node. The remote node list is
- * traversed as the local list, using the REMOTE BASE ADDRESS and not
- * the local base address and ignoring all rboard values.
- *
- *
- KLCONFIG
-
- +------------+ +------------+ +------------+ +------------+
- | lboard | +-->| lboard | +-->| rboard | +-->| lboard |
- +------------+ | +------------+ | +------------+ | +------------+
- | board info | | | board info | | |errinfo,bptr| | | board info |
- +------------+ | +------------+ | +------------+ | +------------+
- | offset |--+ | offset |--+ | offset |--+ |offset=NULL |
- +------------+ +------------+ +------------+ +------------+
-
-
- +------------+
- | board info |
- +------------+ +--------------------------------+
- | compt 1 |------>| type, rev, diaginfo, size ... | (CPU)
- +------------+ +--------------------------------+
- | compt 2 |--+
- +------------+ | +--------------------------------+
- | ... | +--->| type, rev, diaginfo, size ... | (MEM_BANK)
- +------------+ +--------------------------------+
- | errinfo |--+
- +------------+ | +--------------------------------+
- +--->|r/l brd errinfo,compt err flags |
- +--------------------------------+
-
- *
- * Each BOARD consists of COMPONENTs and the BOARD structure has
- * pointers (offsets) to its COMPONENT structure.
- * The COMPONENT structure has version info, size and speed info, revision,
- * error info and the NIC info. This structure can accommodate any
- * BOARD with arbitrary COMPONENT composition.
- *
- * The ERRORINFO part of each BOARD has error information
- * that describes errors about the BOARD itself. It also has flags to
- * indicate the COMPONENT(s) on the board that have errors. The error
- * information specific to the COMPONENT is present in the respective
- * COMPONENT structure.
- *
- * The ERRORINFO structure is also treated like a COMPONENT, ie. the
- * BOARD has pointers(offset) to the ERRORINFO structure. The rboard
- * structure also has a pointer to the ERRORINFO structure. This is
- * the place to store ERRORINFO about a REMOTE NODE, if the HUB on
- * that NODE is not working or if the REMOTE MEMORY is BAD. In cases where
- * only the CPU of the REMOTE NODE is disabled, the ERRORINFO pointer can
- * be a NODE NUMBER, REMOTE OFFSET combination, pointing to error info
- * which is present on the REMOTE NODE.(TBD)
- * REMOTE ERRINFO can be stored on any of the nearest nodes
- * or on all the nearest nodes.(TBD)
- * Like BOARD structures, REMOTE ERRINFO structures can be built locally
- * using the rboard errinfo pointer.
- *
- * In order to get useful information from this Data organization, a set of
- * interface routines are provided (TBD). The important thing to remember while
- * manipulating the structures, is that, the NODE number information should
- * be used. If the NODE is non-zero (remote) then each offset should
- * be added to the REMOTE BASE ADDR else it should be added to the LOCAL BASE ADDR.
- * This includes offsets for BOARDS, COMPONENTS and ERRORINFO.
- *
- * Note that these structures do not provide much info about connectivity.
- * That info will be part of HWGRAPH, which is an extension of the cfg_t
- * data structure. (ref IP27prom/cfg.h) It has to be extended to include
- * the IO part of the Network(TBD).
- *
- * The data structures below define the above concepts.
- */
-
-/*
- * Values for CPU types
- */
-#define KL_CPU_R4000 0x1 /* Standard R4000 */
-#define KL_CPU_TFP 0x2 /* TFP processor */
-#define KL_CPU_R10000 0x3 /* R10000 (T5) */
-#define KL_CPU_NONE (-1) /* no cpu present in slot */
-
-/*
- * IP27 BOARD classes
- */
-
-#define KLCLASS_MASK 0xf0
-#define KLCLASS_NONE 0x00
-#define KLCLASS_NODE 0x10 /* CPU, Memory and HUB board */
-#define KLCLASS_CPU KLCLASS_NODE
-#define KLCLASS_IO 0x20 /* BaseIO, 4 ch SCSI, ethernet, FDDI
- and the non-graphics widget boards */
-#define KLCLASS_ROUTER 0x30 /* Router board */
-#define KLCLASS_MIDPLANE 0x40 /* We need to treat this as a board
- so that we can record error info */
-#define KLCLASS_GFX 0x50 /* graphics boards */
-
-#define KLCLASS_PSEUDO_GFX 0x60 /* HDTV type cards that use a gfx
- * hw ifc to xtalk and are not gfx
- * class for sw purposes */
-
-#define KLCLASS_MAX 7 /* Bump this if a new CLASS is added */
-#define KLTYPE_MAX 10 /* Bump this if a new CLASS is added */
-
-#define KLCLASS_UNKNOWN 0xf0
-
-#define KLCLASS(_x) ((_x) & KLCLASS_MASK)
-
-/*
- * IP27 board types
- */
-
-#define KLTYPE_MASK 0x0f
-#define KLTYPE_NONE 0x00
-#define KLTYPE_EMPTY 0x00
-
-#define KLTYPE_WEIRDCPU (KLCLASS_CPU | 0x0)
-#define KLTYPE_IP27 (KLCLASS_CPU | 0x1) /* 2 CPUs(R10K) per board */
-
-#define KLTYPE_WEIRDIO (KLCLASS_IO | 0x0)
-#define KLTYPE_BASEIO (KLCLASS_IO | 0x1) /* IOC3, SuperIO, Bridge, SCSI */
-#define KLTYPE_IO6 KLTYPE_BASEIO /* Additional name */
-#define KLTYPE_4CHSCSI (KLCLASS_IO | 0x2)
-#define KLTYPE_MSCSI KLTYPE_4CHSCSI /* Additional name */
-#define KLTYPE_ETHERNET (KLCLASS_IO | 0x3)
-#define KLTYPE_MENET KLTYPE_ETHERNET /* Additional name */
-#define KLTYPE_FDDI (KLCLASS_IO | 0x4)
-#define KLTYPE_UNUSED (KLCLASS_IO | 0x5) /* XXX UNUSED */
-#define KLTYPE_HAROLD (KLCLASS_IO | 0x6) /* PCI SHOE BOX */
-#define KLTYPE_PCI KLTYPE_HAROLD
-#define KLTYPE_VME (KLCLASS_IO | 0x7) /* Any 3rd party VME card */
-#define KLTYPE_MIO (KLCLASS_IO | 0x8)
-#define KLTYPE_FC (KLCLASS_IO | 0x9)
-#define KLTYPE_LINC (KLCLASS_IO | 0xA)
-#define KLTYPE_TPU (KLCLASS_IO | 0xB) /* Tensor Processing Unit */
-#define KLTYPE_GSN_A (KLCLASS_IO | 0xC) /* Main GSN board */
-#define KLTYPE_GSN_B (KLCLASS_IO | 0xD) /* Auxiliary GSN board */
-
-#define KLTYPE_GFX (KLCLASS_GFX | 0x0) /* unknown graphics type */
-#define KLTYPE_GFX_KONA (KLCLASS_GFX | 0x1) /* KONA graphics on IP27 */
-#define KLTYPE_GFX_MGRA (KLCLASS_GFX | 0x3) /* MGRAS graphics on IP27 */
-
-#define KLTYPE_WEIRDROUTER (KLCLASS_ROUTER | 0x0)
-#define KLTYPE_ROUTER (KLCLASS_ROUTER | 0x1)
-#define KLTYPE_ROUTER2 KLTYPE_ROUTER /* Obsolete! */
-#define KLTYPE_NULL_ROUTER (KLCLASS_ROUTER | 0x2)
-#define KLTYPE_META_ROUTER (KLCLASS_ROUTER | 0x3)
-
-#define KLTYPE_WEIRDMIDPLANE (KLCLASS_MIDPLANE | 0x0)
-#define KLTYPE_MIDPLANE8 (KLCLASS_MIDPLANE | 0x1) /* 8 slot backplane */
-#define KLTYPE_MIDPLANE KLTYPE_MIDPLANE8
-#define KLTYPE_PBRICK_XBOW (KLCLASS_MIDPLANE | 0x2)
-
-#define KLTYPE_IOBRICK (KLCLASS_IOBRICK | 0x0)
-#define KLTYPE_IBRICK (KLCLASS_IOBRICK | 0x1)
-#define KLTYPE_PBRICK (KLCLASS_IOBRICK | 0x2)
-#define KLTYPE_XBRICK (KLCLASS_IOBRICK | 0x3)
-
-#define KLTYPE_PBRICK_BRIDGE KLTYPE_PBRICK
-
-/* The value of type should be more than 8 so that hinv prints
- * out the board name from the NIC string. For values less than
- * 8 the name of the board needs to be hard coded in a few places.
- * When bringup started nic names had not standardized and so we
- * had to hard code. (For people interested in history.)
- */
-#define KLTYPE_XTHD (KLCLASS_PSEUDO_GFX | 0x9)
-
-#define KLTYPE_UNKNOWN (KLCLASS_UNKNOWN | 0xf)
-
-#define KLTYPE(_x) ((_x) & KLTYPE_MASK)
-#define IS_MIO_PRESENT(l) ((l->brd_type == KLTYPE_BASEIO) && \
- (l->brd_flags & SECOND_NIC_PRESENT))
-#define IS_MIO_IOC3(l,n) (IS_MIO_PRESENT(l) && (n > 2))
-
-/*
- * board structures
- */
-
-#define MAX_COMPTS_PER_BRD 24
-
-#define LOCAL_BOARD 1
-#define REMOTE_BOARD 2
-
-#define LBOARD_STRUCT_VERSION 2
-
-typedef struct lboard_s {
- klconf_off_t brd_next; /* Next BOARD */
- unsigned char struct_type; /* type of structure, local or remote */
- unsigned char brd_type; /* type+class */
- unsigned char brd_sversion; /* version of this structure */
- unsigned char brd_brevision; /* board revision */
- unsigned char brd_promver; /* board prom version, if any */
- unsigned char brd_flags; /* Enabled, Disabled etc */
- unsigned char brd_slot; /* slot number */
- unsigned short brd_debugsw; /* Debug switches */
- moduleid_t brd_module; /* module to which it belongs */
- partid_t brd_partition; /* Partition number */
- unsigned short brd_diagval; /* diagnostic value */
- unsigned short brd_diagparm; /* diagnostic parameter */
- unsigned char brd_inventory; /* inventory history */
- unsigned char brd_numcompts; /* Number of components */
- nic_t brd_nic; /* Number in CAN */
- nasid_t brd_nasid; /* passed parameter */
- klconf_off_t brd_compts[MAX_COMPTS_PER_BRD]; /* pointers to COMPONENTS */
- klconf_off_t brd_errinfo; /* Board's error information */
- struct lboard_s *brd_parent; /* Logical parent for this brd */
- vertex_hdl_t brd_graph_link; /* vertex hdl to connect extern compts */
- confidence_t brd_confidence; /* confidence that the board is bad */
- nasid_t brd_owner; /* who owns this board */
- unsigned char brd_nic_flags; /* To handle 8 more NICs */
- char brd_name[32];
-} lboard_t;
-
-
-/*
- * Make sure we pass back the calias space address for local boards.
- * klconfig board traversal and error structure extraction defines.
- */
-
-#define BOARD_SLOT(_brd) ((_brd)->brd_slot)
-
-#define KLCF_CLASS(_brd) KLCLASS((_brd)->brd_type)
-#define KLCF_TYPE(_brd) KLTYPE((_brd)->brd_type)
-#define KLCF_REMOTE(_brd) (((_brd)->struct_type & LOCAL_BOARD) ? 0 : 1)
-#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts)
-#define KLCF_MODULE_ID(_brd) ((_brd)->brd_module)
-
-#ifdef FRUTEST
-
-#define KLCF_NEXT(_brd) ((_brd)->brd_next ? (lboard_t *)((_brd)->brd_next): NULL)
-#define KLCF_COMP(_brd, _ndx) (klinfo_t *)((_brd)->brd_compts[(_ndx)])
-#define KLCF_COMP_ERROR(_brd, _comp) (_brd = _brd , (_comp)->errinfo)
-
-#else
-
-#define KLCF_NEXT(_brd) \
- ((_brd)->brd_next ? \
- (lboard_t *)(NODE_OFFSET_TO_K1(NASID_GET(_brd), (_brd)->brd_next)):\
- NULL)
-#define KLCF_COMP(_brd, _ndx) \
- (klinfo_t *)(NODE_OFFSET_TO_K1(NASID_GET(_brd), \
- (_brd)->brd_compts[(_ndx)]))
-
-#define KLCF_COMP_ERROR(_brd, _comp) \
- (NODE_OFFSET_TO_K1(NASID_GET(_brd), (_comp)->errinfo))
-
-#endif
-
-#define KLCF_COMP_TYPE(_comp) ((_comp)->struct_type)
-#define KLCF_BRIDGE_W_ID(_comp) ((_comp)->physid) /* Widget ID */
-
-
-
-/*
- * Generic info structure. This stores common info about a
- * component.
- */
-
-typedef struct klinfo_s { /* Generic info */
- unsigned char struct_type; /* type of this structure */
- unsigned char struct_version; /* version of this structure */
- unsigned char flags; /* Enabled, disabled etc */
- unsigned char revision; /* component revision */
- unsigned short diagval; /* result of diagnostics */
- unsigned short diagparm; /* diagnostic parameter */
- unsigned char inventory; /* previous inventory status */
- nic_t nic; /* MUst be aligned properly */
- unsigned char physid; /* physical id of component */
- unsigned int virtid; /* virtual id as seen by system */
- unsigned char widid; /* Widget id - if applicable */
- nasid_t nasid; /* node number - from parent */
- char pad1; /* pad out structure. */
- char pad2; /* pad out structure. */
- COMPONENT *arcs_compt; /* ptr to the arcs struct for ease*/
- klconf_off_t errinfo; /* component specific errors */
- unsigned short pad3; /* pci fields have moved over to */
- unsigned short pad4; /* klbri_t */
-} klinfo_t ;
-
-#define KLCONFIG_INFO_ENABLED(_i) ((_i)->flags & KLINFO_ENABLE)
-/*
- * Component structures.
- * Following are the currently identified components:
- * CPU, HUB, MEM_BANK,
- * XBOW(consists of 16 WIDGETs, each of which can be HUB or GRAPHICS or BRIDGE)
- * BRIDGE, IOC3, SuperIO, SCSI, FDDI
- * ROUTER
- * GRAPHICS
- */
-#define KLSTRUCT_UNKNOWN 0
-#define KLSTRUCT_CPU 1
-#define KLSTRUCT_HUB 2
-#define KLSTRUCT_MEMBNK 3
-#define KLSTRUCT_XBOW 4
-#define KLSTRUCT_BRI 5
-#define KLSTRUCT_IOC3 6
-#define KLSTRUCT_PCI 7
-#define KLSTRUCT_VME 8
-#define KLSTRUCT_ROU 9
-#define KLSTRUCT_GFX 10
-#define KLSTRUCT_SCSI 11
-#define KLSTRUCT_FDDI 12
-#define KLSTRUCT_MIO 13
-#define KLSTRUCT_DISK 14
-#define KLSTRUCT_TAPE 15
-#define KLSTRUCT_CDROM 16
-#define KLSTRUCT_HUB_UART 17
-#define KLSTRUCT_IOC3ENET 18
-#define KLSTRUCT_IOC3UART 19
-#define KLSTRUCT_UNUSED 20 /* XXX UNUSED */
-#define KLSTRUCT_IOC3PCKM 21
-#define KLSTRUCT_RAD 22
-#define KLSTRUCT_HUB_TTY 23
-#define KLSTRUCT_IOC3_TTY 24
-
-/* Early Access IO proms are compatible
- only with KLSTRUCT values upto 24. */
-
-#define KLSTRUCT_FIBERCHANNEL 25
-#define KLSTRUCT_MOD_SERIAL_NUM 26
-#define KLSTRUCT_IOC3MS 27
-#define KLSTRUCT_TPU 28
-#define KLSTRUCT_GSN_A 29
-#define KLSTRUCT_GSN_B 30
-#define KLSTRUCT_XTHD 31
-
-/*
- * These are the indices of various components within a lboard structure.
- */
-
-#define IP27_CPU0_INDEX 0
-#define IP27_CPU1_INDEX 1
-#define IP27_HUB_INDEX 2
-#define IP27_MEM_INDEX 3
-
-#define BASEIO_BRIDGE_INDEX 0
-#define BASEIO_IOC3_INDEX 1
-#define BASEIO_SCSI1_INDEX 2
-#define BASEIO_SCSI2_INDEX 3
-
-#define MIDPLANE_XBOW_INDEX 0
-#define ROUTER_COMPONENT_INDEX 0
-
-#define CH4SCSI_BRIDGE_INDEX 0
-
-/* Info holders for various hardware components */
-
-typedef u64 *pci_t;
-typedef u64 *vmeb_t;
-typedef u64 *vmed_t;
-typedef u64 *fddi_t;
-typedef u64 *scsi_t;
-typedef u64 *mio_t;
-typedef u64 *graphics_t;
-typedef u64 *router_t;
-
-/*
- * The port info in ip27_cfg area translates to a lboart_t in the
- * KLCONFIG area. But since KLCONFIG does not use pointers, lboart_t
- * is stored in terms of a nasid and a offset from start of KLCONFIG
- * area on that nasid.
- */
-typedef struct klport_s {
- nasid_t port_nasid;
- unsigned char port_flag;
- klconf_off_t port_offset;
-} klport_t;
-
-#if 0
-/*
- * This is very similar to the klport_s but instead of having a componant
- * offset it has a board offset.
- */
-typedef struct klxbow_port_s {
- nasid_t port_nasid;
- unsigned char port_flag;
- klconf_off_t board_offset;
-} klxbow_port_t;
-#endif
-
-typedef struct klcpu_s { /* CPU */
- klinfo_t cpu_info;
- unsigned short cpu_prid; /* Processor PRID value */
- unsigned short cpu_fpirr; /* FPU IRR value */
- unsigned short cpu_speed; /* Speed in MHZ */
- unsigned short cpu_scachesz; /* secondary cache size in MB */
- unsigned short cpu_scachespeed;/* secondary cache speed in MHz */
-} klcpu_t ;
-
-#define CPU_STRUCT_VERSION 2
-
-typedef struct klhub_s { /* HUB */
- klinfo_t hub_info;
- uint hub_flags; /* PCFG_HUB_xxx flags */
- klport_t hub_port; /* hub is connected to this */
- nic_t hub_box_nic; /* nic of containing box */
- klconf_off_t hub_mfg_nic; /* MFG NIC string */
- u64 hub_speed; /* Speed of hub in HZ */
-} klhub_t ;
-
-typedef struct klhub_uart_s { /* HUB */
- klinfo_t hubuart_info;
- uint hubuart_flags; /* PCFG_HUB_xxx flags */
- nic_t hubuart_box_nic; /* nic of containing box */
-} klhub_uart_t ;
-
-#define MEMORY_STRUCT_VERSION 2
-
-typedef struct klmembnk_s { /* MEMORY BANK */
- klinfo_t membnk_info;
- short membnk_memsz; /* Total memory in megabytes */
- short membnk_dimm_select; /* bank to physical addr mapping*/
- short membnk_bnksz[MD_MEM_BANKS]; /* Memory bank sizes */
- short membnk_attr;
-} klmembnk_t ;
-
-#define KLCONFIG_MEMBNK_SIZE(_info, _bank) \
- ((_info)->membnk_bnksz[(_bank)])
-
-
-#define MEMBNK_PREMIUM 1
-#define KLCONFIG_MEMBNK_PREMIUM(_info, _bank) \
- ((_info)->membnk_attr & (MEMBNK_PREMIUM << (_bank)))
-
-#define MAX_SERIAL_NUM_SIZE 10
-
-typedef struct klmod_serial_num_s {
- klinfo_t snum_info;
- union {
- char snum_str[MAX_SERIAL_NUM_SIZE];
- unsigned long long snum_int;
- } snum;
-} klmod_serial_num_t;
-
-/* Macros needed to access serial number structure in lboard_t.
- Hard coded values are necessary since we cannot treat
- serial number struct as a component without losing compatibility
- between prom versions. */
-
-#define GET_SNUM_COMP(_l) ((klmod_serial_num_t *)\
- KLCF_COMP(_l, _l->brd_numcompts))
-
-#define MAX_XBOW_LINKS 16
-
-typedef struct klxbow_s { /* XBOW */
- klinfo_t xbow_info ;
- klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */
- int xbow_master_hub_link;
- /* type of brd connected+component struct ptr+flags */
-} klxbow_t ;
-
-#define MAX_PCI_SLOTS 8
-
-typedef struct klpci_device_s {
- s32 pci_device_id; /* 32 bits of vendor/device ID. */
- s32 pci_device_pad; /* 32 bits of padding. */
-} klpci_device_t;
-
-#define BRIDGE_STRUCT_VERSION 2
-
-typedef struct klbri_s { /* BRIDGE */
- klinfo_t bri_info ;
- unsigned char bri_eprominfo ; /* IO6prom connected to bridge */
- unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */
- pci_t pci_specific ; /* PCI Board config info */
- klpci_device_t bri_devices[MAX_PCI_DEVS] ; /* PCI IDs */
- klconf_off_t bri_mfg_nic ;
-} klbri_t ;
-
-#define MAX_IOC3_TTY 2
-
-typedef struct klioc3_s { /* IOC3 */
- klinfo_t ioc3_info ;
- unsigned char ioc3_ssram ; /* Info about ssram */
- unsigned char ioc3_nvram ; /* Info about nvram */
- klinfo_t ioc3_superio ; /* Info about superio */
- klconf_off_t ioc3_tty_off ;
- klinfo_t ioc3_enet ;
- klconf_off_t ioc3_enet_off ;
- klconf_off_t ioc3_kbd_off ;
-} klioc3_t ;
-
-#define MAX_VME_SLOTS 8
-
-typedef struct klvmeb_s { /* VME BRIDGE - PCI CTLR */
- klinfo_t vmeb_info ;
- vmeb_t vmeb_specific ;
- klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
-} klvmeb_t ;
-
-typedef struct klvmed_s { /* VME DEVICE - VME BOARD */
- klinfo_t vmed_info ;
- vmed_t vmed_specific ;
- klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
-} klvmed_t ;
-
-#define ROUTER_VECTOR_VERS 2
-
-/* XXX - Don't we need the number of ports here?!? */
-typedef struct klrou_s { /* ROUTER */
- klinfo_t rou_info ;
- uint rou_flags ; /* PCFG_ROUTER_xxx flags */
- nic_t rou_box_nic ; /* nic of the containing module */
- klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */
- klconf_off_t rou_mfg_nic ; /* MFG NIC string */
- u64 rou_vector; /* vector from master node */
-} klrou_t ;
-
-/*
- * Graphics Controller/Device
- *
- * (IP27/IO6) Prom versions 6.13 (and 6.5.1 kernels) and earlier
- * used a couple different structures to store graphics information.
- * For compatibility reasons, the newer data structure preserves some
- * of the layout so that fields that are used in the old versions remain
- * in the same place (with the same info). Determination of what version
- * of this structure we have is done by checking the cookie field.
- */
-#define KLGFX_COOKIE 0x0c0de000
-
-typedef struct klgfx_s { /* GRAPHICS Device */
- klinfo_t gfx_info;
- klconf_off_t old_gndevs; /* for compatibility with older proms */
- klconf_off_t old_gdoff0; /* for compatibility with older proms */
- uint cookie; /* for compatibility with older proms */
- uint moduleslot;
- struct klgfx_s *gfx_next_pipe;
- graphics_t gfx_specific;
- klconf_off_t pad0; /* for compatibility with older proms */
- klconf_off_t gfx_mfg_nic;
-} klgfx_t;
-
-typedef struct klxthd_s {
- klinfo_t xthd_info ;
- klconf_off_t xthd_mfg_nic ; /* MFG NIC string */
-} klxthd_t ;
-
-typedef struct kltpu_s { /* TPU board */
- klinfo_t tpu_info ;
- klconf_off_t tpu_mfg_nic ; /* MFG NIC string */
-} kltpu_t ;
-
-typedef struct klgsn_s { /* GSN board */
- klinfo_t gsn_info ;
- klconf_off_t gsn_mfg_nic ; /* MFG NIC string */
-} klgsn_t ;
-
-#define MAX_SCSI_DEVS 16
-
-/*
- * NOTE: THis is the max sized kl* structure and is used in klmalloc.c
- * to allocate space of type COMPONENT. Make sure that if the size of
- * any other component struct becomes more than this, then redefine
- * that as the size to be klmalloced.
- */
-
-typedef struct klscsi_s { /* SCSI Controller */
- klinfo_t scsi_info ;
- scsi_t scsi_specific ;
- unsigned char scsi_numdevs ;
- klconf_off_t scsi_devinfo[MAX_SCSI_DEVS] ;
-} klscsi_t ;
-
-typedef struct klscdev_s { /* SCSI device */
- klinfo_t scdev_info ;
- struct scsidisk_data *scdev_cfg ; /* driver fills up this */
-} klscdev_t ;
-
-typedef struct klttydev_s { /* TTY device */
- klinfo_t ttydev_info ;
- struct terminal_data *ttydev_cfg ; /* driver fills up this */
-} klttydev_t ;
-
-typedef struct klenetdev_s { /* ENET device */
- klinfo_t enetdev_info ;
- struct net_data *enetdev_cfg ; /* driver fills up this */
-} klenetdev_t ;
-
-typedef struct klkbddev_s { /* KBD device */
- klinfo_t kbddev_info ;
- struct keyboard_data *kbddev_cfg ; /* driver fills up this */
-} klkbddev_t ;
-
-typedef struct klmsdev_s { /* mouse device */
- klinfo_t msdev_info ;
- void *msdev_cfg ;
-} klmsdev_t ;
-
-#define MAX_FDDI_DEVS 10 /* XXX Is this true */
-
-typedef struct klfddi_s { /* FDDI */
- klinfo_t fddi_info ;
- fddi_t fddi_specific ;
- klconf_off_t fddi_devinfo[MAX_FDDI_DEVS] ;
-} klfddi_t ;
-
-typedef struct klmio_s { /* MIO */
- klinfo_t mio_info ;
- mio_t mio_specific ;
-} klmio_t ;
-
-
-typedef union klcomp_s {
- klcpu_t kc_cpu;
- klhub_t kc_hub;
- klmembnk_t kc_mem;
- klxbow_t kc_xbow;
- klbri_t kc_bri;
- klioc3_t kc_ioc3;
- klvmeb_t kc_vmeb;
- klvmed_t kc_vmed;
- klrou_t kc_rou;
- klgfx_t kc_gfx;
- klscsi_t kc_scsi;
- klscdev_t kc_scsi_dev;
- klfddi_t kc_fddi;
- klmio_t kc_mio;
- klmod_serial_num_t kc_snum ;
-} klcomp_t;
-
-typedef union kldev_s { /* for device structure allocation */
- klscdev_t kc_scsi_dev ;
- klttydev_t kc_tty_dev ;
- klenetdev_t kc_enet_dev ;
- klkbddev_t kc_kbd_dev ;
-} kldev_t ;
-
-/* Data structure interface routines. TBD */
-
-/* Include launch info in this file itself? TBD */
-
-/*
- * TBD - Can the ARCS and device driver related info also be included in the
- * KLCONFIG area. On the IO4PROM, prom device driver info is part of cfgnode_t
- * structure, viz private to the IO4prom.
- */
-
-/*
- * TBD - Allocation issues.
- *
- * Do we need to Mark off sepatate heaps for lboard_t, rboard_t, component,
- * errinfo and allocate from them, or have a single heap and allocate all
- * structures from it. Debug is easier in the former method since we can
- * dump all similar structs in one command, but there will be lots of holes,
- * in memory and max limits are needed for number of structures.
- * Another way to make it organized, is to have a union of all components
- * and allocate a aligned chunk of memory greater than the biggest
- * component.
- */
-
-typedef union {
- lboard_t *lbinfo ;
-} biptr_t ;
-
-
-#define BRI_PER_XBOW 6
-#define PCI_PER_BRI 8
-#define DEV_PER_PCI 16
-
-
-/* Virtual dipswitch values (starting from switch "7"): */
-
-#define VDS_NOGFX 0x8000 /* Don't enable gfx and autoboot */
-#define VDS_NOMP 0x100 /* Don't start slave processors */
-#define VDS_MANUMODE 0x80 /* Manufacturing mode */
-#define VDS_NOARB 0x40 /* No bootmaster arbitration */
-#define VDS_PODMODE 0x20 /* Go straight to POD mode */
-#define VDS_NO_DIAGS 0x10 /* Don't run any diags after BM arb */
-#define VDS_DEFAULTS 0x08 /* Use default environment values */
-#define VDS_NOMEMCLEAR 0x04 /* Don't run mem cfg code */
-#define VDS_2ND_IO4 0x02 /* Boot from the second IO4 */
-#define VDS_DEBUG_PROM 0x01 /* Print PROM debugging messages */
-
-/* external declarations of Linux kernel functions. */
-
-extern lboard_t *find_lboard(lboard_t *start, unsigned char type);
-extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
-extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
-extern klcpu_t *nasid_slice_to_cpuinfo(nasid_t, int);
-extern lboard_t *find_lboard_class(lboard_t *start, unsigned char brd_class);
-
-
-#if defined(CONFIG_SGI_IO)
-extern xwidgetnum_t nodevertex_widgetnum_get(vertex_hdl_t node_vtx);
-extern vertex_hdl_t nodevertex_xbow_peer_get(vertex_hdl_t node_vtx);
-extern lboard_t *find_gfxpipe(int pipenum);
-extern void setup_gfxpipe_link(vertex_hdl_t vhdl,int pipenum);
-extern lboard_t *find_lboard_module_class(lboard_t *start, moduleid_t mod,
- unsigned char brd_class);
-extern lboard_t *find_nic_lboard(lboard_t *, nic_t);
-extern lboard_t *find_nic_type_lboard(nasid_t, unsigned char, nic_t);
-extern lboard_t *find_lboard_modslot(lboard_t *start, moduleid_t mod, slotid_t slot);
-extern lboard_t *find_lboard_module(lboard_t *start, moduleid_t mod);
-extern lboard_t *get_board_name(nasid_t nasid, moduleid_t mod, slotid_t slot, char *name);
-extern int config_find_nic_router(nasid_t, nic_t, lboard_t **, klrou_t**);
-extern int config_find_nic_hub(nasid_t, nic_t, lboard_t **, klhub_t**);
-extern int config_find_xbow(nasid_t, lboard_t **, klxbow_t**);
-extern klcpu_t *get_cpuinfo(cpuid_t cpu);
-extern int update_klcfg_cpuinfo(nasid_t, int);
-extern void board_to_path(lboard_t *brd, char *path);
-extern moduleid_t get_module_id(nasid_t nasid);
-extern void nic_name_convert(char *old_name, char *new_name);
-extern int module_brds(nasid_t nasid, lboard_t **module_brds, int n);
-extern lboard_t *brd_from_key(ulong_t key);
-extern void device_component_canonical_name_get(lboard_t *,klinfo_t *,
- char *);
-extern int board_serial_number_get(lboard_t *,char *);
-extern int is_master_baseio(nasid_t,moduleid_t,slotid_t);
-extern nasid_t get_actual_nasid(lboard_t *brd) ;
-extern net_vec_t klcfg_discover_route(lboard_t *, lboard_t *, int);
-#else /* CONFIG_SGI_IO */
-extern klcpu_t *sn_get_cpuinfo(cpuid_t cpu);
-#endif /* CONFIG_SGI_IO */
-
-#endif /* _ASM_SN_KLCONFIG_H */
diff -Nru a/include/asm-mips64/sn/kldir.h b/include/asm-mips64/sn/kldir.h
--- a/include/asm-mips64/sn/kldir.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,248 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/kldir.h>, revision 1.21.
- *
- * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 1999, 2000 by Ralf Baechle
- */
-#ifndef _ASM_SN_KLDIR_H
-#define _ASM_SN_KLDIR_H
-
-#include <linux/config.h>
-
-#if defined(CONFIG_SGI_IO)
-#include <asm/hack.h>
-#endif
-
-/*
- * The kldir memory area resides at a fixed place in each node's memory and
- * provides pointers to most other IP27 memory areas. This allows us to
- * resize and/or relocate memory areas at a later time without breaking all
- * firmware and kernels that use them. Indices in the array are
- * permanently dedicated to areas listed below. Some memory areas (marked
- * below) reside at a permanently fixed location, but are included in the
- * directory for completeness.
- */
-
-#define KLDIR_MAGIC 0x434d5f53505f5357
-
-/*
- * The upper portion of the memory map applies during boot
- * only and is overwritten by IRIX/SYMMON.
- *
- * MEMORY MAP PER NODE
- *
- * 0x2000000 (32M) +-----------------------------------------+
- * | IO6 BUFFERS FOR FLASH ENET IOC3 |
- * 0x1F80000 (31.5M) +-----------------------------------------+
- * | IO6 TEXT/DATA/BSS/stack |
- * 0x1C00000 (30M) +-----------------------------------------+
- * | IO6 PROM DEBUG TEXT/DATA/BSS/stack |
- * 0x0800000 (28M) +-----------------------------------------+
- * | IP27 PROM TEXT/DATA/BSS/stack |
- * 0x1B00000 (27M) +-----------------------------------------+
- * | IP27 CFG |
- * 0x1A00000 (26M) +-----------------------------------------+
- * | Graphics PROM |
- * 0x1800000 (24M) +-----------------------------------------+
- * | 3rd Party PROM drivers |
- * 0x1600000 (22M) +-----------------------------------------+
- * | |
- * | Free |
- * | |
- * +-----------------------------------------+
- * | UNIX DEBUG Version |
- * 0x190000 (2M--) +-----------------------------------------+
- * | SYMMON |
- * | (For UNIX Debug only) |
- * 0x34000 (208K) +-----------------------------------------+
- * | SYMMON STACK [NUM_CPU_PER_NODE] |
- * | (For UNIX Debug only) |
- * 0x25000 (148K) +-----------------------------------------+
- * | KLCONFIG - II (temp) |
- * | |
- * | ---------------------------- |
- * | |
- * | UNIX NON-DEBUG Version |
- * 0x19000 (100K) +-----------------------------------------+
- *
- *
- * The lower portion of the memory map contains information that is
- * permanent and is used by the IP27PROM, IO6PROM and IRIX.
- *
- * 0x19000 (100K) +-----------------------------------------+
- * | |
- * | PI Error Spools (32K) |
- * | |
- * 0x12000 (72K) +-----------------------------------------+
- * | Unused |
- * 0x11c00 (71K) +-----------------------------------------+
- * | CPU 1 NMI Eframe area |
- * 0x11a00 (70.5K) +-----------------------------------------+
- * | CPU 0 NMI Eframe area |
- * 0x11800 (70K) +-----------------------------------------+
- * | CPU 1 NMI Register save area |
- * 0x11600 (69.5K) +-----------------------------------------+
- * | CPU 0 NMI Register save area |
- * 0x11400 (69K) +-----------------------------------------+
- * | GDA (1k) |
- * 0x11000 (68K) +-----------------------------------------+
- * | Early cache Exception stack |
- * | and/or |
- * | kernel/io6prom nmi registers |
- * 0x10800 (66k) +-----------------------------------------+
- * | cache error eframe |
- * 0x10400 (65K) +-----------------------------------------+
- * | Exception Handlers (UALIAS copy) |
- * 0x10000 (64K) +-----------------------------------------+
- * | |
- * | |
- * | KLCONFIG - I (permanent) (48K) |
- * | |
- * | |
- * | |
- * 0x4000 (16K) +-----------------------------------------+
- * | NMI Handler (Protected Page) |
- * 0x3000 (12K) +-----------------------------------------+
- * | ARCS PVECTORS (master node only) |
- * 0x2c00 (11K) +-----------------------------------------+
- * | ARCS TVECTORS (master node only) |
- * 0x2800 (10K) +-----------------------------------------+
- * | LAUNCH [NUM_CPU] |
- * 0x2400 (9K) +-----------------------------------------+
- * | Low memory directory (KLDIR) |
- * 0x2000 (8K) +-----------------------------------------+
- * | ARCS SPB (1K) |
- * 0x1000 (4K) +-----------------------------------------+
- * | Early cache Exception stack |
- * | and/or |
- * | kernel/io6prom nmi registers |
- * 0x800 (2k) +-----------------------------------------+
- * | cache error eframe |
- * 0x400 (1K) +-----------------------------------------+
- * | Exception Handlers |
- * 0x0 (0K) +-----------------------------------------+
- */
-
-#ifdef __ASSEMBLY__
-#define KLDIR_OFF_MAGIC 0x00
-#define KLDIR_OFF_OFFSET 0x08
-#define KLDIR_OFF_POINTER 0x10
-#define KLDIR_OFF_SIZE 0x18
-#define KLDIR_OFF_COUNT 0x20
-#define KLDIR_OFF_STRIDE 0x28
-#endif /* __ASSEMBLY__ */
-
-#if !defined(CONFIG_SGI_IO)
-
-/*
- * This is defined here because IP27_SYMMON_STK_SIZE must be at least what
- * we define here. Since it's set up in the prom. We can't redefine it later
- * and expect more space to be allocated. The way to find out the true size
- * of the symmon stacks is to divide SYMMON_STK_SIZE by SYMMON_STK_STRIDE
- * for a particular node.
- */
-#define SYMMON_STACK_SIZE 0x8000
-
-#if defined (PROM) || defined (SABLE)
-
-/*
- * These defines are prom version dependent. No code other than the IP27
- * prom should attempt to use these values.
- */
-#define IP27_LAUNCH_OFFSET 0x2400
-#define IP27_LAUNCH_SIZE 0x400
-#define IP27_LAUNCH_COUNT 2
-#define IP27_LAUNCH_STRIDE 0x200
-
-#define IP27_KLCONFIG_OFFSET 0x4000
-#define IP27_KLCONFIG_SIZE 0xc000
-#define IP27_KLCONFIG_COUNT 1
-#define IP27_KLCONFIG_STRIDE 0
-
-#define IP27_NMI_OFFSET 0x3000
-#define IP27_NMI_SIZE 0x40
-#define IP27_NMI_COUNT 2
-#define IP27_NMI_STRIDE 0x40
-
-#define IP27_PI_ERROR_OFFSET 0x12000
-#define IP27_PI_ERROR_SIZE 0x4000
-#define IP27_PI_ERROR_COUNT 1
-#define IP27_PI_ERROR_STRIDE 0
-
-#define IP27_SYMMON_STK_OFFSET 0x25000
-#define IP27_SYMMON_STK_SIZE 0xe000
-#define IP27_SYMMON_STK_COUNT 2
-/* IP27_SYMMON_STK_STRIDE must be >= SYMMON_STACK_SIZE */
-#define IP27_SYMMON_STK_STRIDE 0x7000
-
-#define IP27_FREEMEM_OFFSET 0x19000
-#define IP27_FREEMEM_SIZE -1
-#define IP27_FREEMEM_COUNT 1
-#define IP27_FREEMEM_STRIDE 0
-
-#endif /* PROM || SABLE*/
-/*
- * There will be only one of these in a partition so the IO6 must set it up.
- */
-#define IO6_GDA_OFFSET 0x11000
-#define IO6_GDA_SIZE 0x400
-#define IO6_GDA_COUNT 1
-#define IO6_GDA_STRIDE 0
-
-/*
- * save area of kernel nmi regs in the prom format
- */
-#define IP27_NMI_KREGS_OFFSET 0x11400
-#define IP27_NMI_KREGS_CPU_SIZE 0x200
-/*
- * save area of kernel nmi regs in eframe format
- */
-#define IP27_NMI_EFRAME_OFFSET 0x11800
-#define IP27_NMI_EFRAME_SIZE 0x200
-
-#define KLDIR_ENT_SIZE 0x40
-#define KLDIR_MAX_ENTRIES (0x400 / 0x40)
-
-#endif /* !CONFIG_SGI_IO */
-
-#ifndef __ASSEMBLY__
-typedef struct kldir_ent_s {
- u64 magic; /* Indicates validity of entry */
- off_t offset; /* Offset from start of node space */
-#if defined(CONFIG_SGI_IO) /* FIXME */
- __psunsigned_t pointer; /* Pointer to area in some cases */
-#else
- unsigned long pointer; /* Pointer to area in some cases */
-#endif
- size_t size; /* Size in bytes */
- u64 count; /* Repeat count if array, 1 if not */
- size_t stride; /* Stride if array, 0 if not */
- char rsvd[16]; /* Pad entry to 0x40 bytes */
- /* NOTE: These 16 bytes are used in the Partition KLDIR
- entry to store partition info. Refer to klpart.h for this. */
-} kldir_ent_t;
-#endif /* !__ASSEMBLY__ */
-
-#if defined(CONFIG_SGI_IO)
-
-#define KLDIR_ENT_SIZE 0x40
-#define KLDIR_MAX_ENTRIES (0x400 / 0x40)
-
-/*
- * The actual offsets of each memory area are machine-dependent
- */
-#ifdef CONFIG_SGI_IP27
-// Not yet #include <asm/sn/sn0/kldir.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/kldir.h>
-#else
-#error "kldir.h is currently defined for IP27 and IP35 platforms only"
-#endif
-
-#endif /* CONFIG_SGI_IO */
-
-#endif /* _ASM_SN_KLDIR_H */
diff -Nru a/include/asm-mips64/sn/klkernvars.h b/include/asm-mips64/sn/klkernvars.h
--- a/include/asm-mips64/sn/klkernvars.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,29 +0,0 @@
-/*
- * File ported from IRIX to Linux by Kanoj Sarcar, 06/08/00.
- * Copyright 2000 Silicon Graphics, Inc.
- */
-#ifndef __ASM_SN_KLKERNVARS_H
-#define __ASM_SN_KLKERNVARS_H
-
-#define KV_MAGIC_OFFSET 0x0
-#define KV_RO_NASID_OFFSET 0x4
-#define KV_RW_NASID_OFFSET 0x6
-
-#define KV_MAGIC 0x5f4b565f
-
-#ifndef __ASSEMBLY__
-
-#include <asm/sn/types.h>
-
-typedef struct kern_vars_s {
- int kv_magic;
- nasid_t kv_ro_nasid;
- nasid_t kv_rw_nasid;
- unsigned long kv_ro_baseaddr;
- unsigned long kv_rw_baseaddr;
-} kern_vars_t;
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* __ASM_SN_KLKERNVARS_H */
-
diff -Nru a/include/asm-mips64/sn/launch.h b/include/asm-mips64/sn/launch.h
--- a/include/asm-mips64/sn/launch.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,107 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2000 by Colin Ngam
- */
-#ifndef _ASM_SN_LAUNCH_H
-#define _ASM_SN_LAUNCH_H
-
-#include <linux/config.h>
-#include <asm/sn/types.h>
-#include <asm/sn/addrs.h>
-
-/*
- * The launch data structure resides at a fixed place in each node's memory
- * and is used to communicate between the master processor and the slave
- * processors.
- *
- * The master stores launch parameters in the launch structure
- * corresponding to a target processor that is in a slave loop, then sends
- * an interrupt to the slave processor. The slave calls the desired
- * function, then returns to the slave loop. The master may poll or wait
- * for the slaves to finish.
- *
- * There is an array of launch structures, one per CPU on the node. One
- * interrupt level is used per local CPU.
- */
-
-#define LAUNCH_MAGIC 0xaddbead2addbead3
-#ifdef CONFIG_SGI_IP27
-#define LAUNCH_SIZEOF 0x100
-#define LAUNCH_PADSZ 0xa0
-#endif
-
-#define LAUNCH_OFF_MAGIC 0x00 /* Struct offsets for assembly */
-#define LAUNCH_OFF_BUSY 0x08
-#define LAUNCH_OFF_CALL 0x10
-#define LAUNCH_OFF_CALLC 0x18
-#define LAUNCH_OFF_CALLPARM 0x20
-#define LAUNCH_OFF_STACK 0x28
-#define LAUNCH_OFF_GP 0x30
-#define LAUNCH_OFF_BEVUTLB 0x38
-#define LAUNCH_OFF_BEVNORMAL 0x40
-#define LAUNCH_OFF_BEVECC 0x48
-
-#define LAUNCH_STATE_DONE 0 /* Return value of LAUNCH_POLL */
-#define LAUNCH_STATE_SENT 1
-#define LAUNCH_STATE_RECD 2
-
-/*
- * The launch routine is called only if the complement address is correct.
- *
- * Before control is transferred to a routine, the complement address
- * is zeroed (invalidated) to prevent an accidental call from a spurious
- * interrupt.
- *
- * The slave_launch routine turns on the BUSY flag, and the slave loop
- * clears the BUSY flag after control is returned to it.
- */
-
-#ifndef __ASSEMBLY__
-
-typedef int launch_state_t;
-typedef void (*launch_proc_t)(u64 call_parm);
-
-typedef struct launch_s {
- volatile u64 magic; /* Magic number */
- volatile u64 busy; /* Slave currently active */
- volatile launch_proc_t call_addr; /* Func. for slave to call */
- volatile u64 call_addr_c; /* 1's complement of call_addr*/
- volatile u64 call_parm; /* Single parm passed to call*/
- volatile void *stack_addr; /* Stack pointer for slave function */
- volatile void *gp_addr; /* Global pointer for slave func. */
- volatile char *bevutlb;/* Address of bev utlb ex handler */
- volatile char *bevnormal;/*Address of bev normal ex handler */
- volatile char *bevecc;/* Address of bev cache err handler */
- volatile char pad[160]; /* Pad to LAUNCH_SIZEOF */
-} launch_t;
-
-/*
- * PROM entry points for launch routines are determined by IPxxprom/start.s
- */
-
-#define LAUNCH_SLAVE (*(void (*)(int nasid, int cpu, \
- launch_proc_t call_addr, \
- u64 call_parm, \
- void *stack_addr, \
- void *gp_addr)) \
- IP27PROM_LAUNCHSLAVE)
-
-#define LAUNCH_WAIT (*(void (*)(int nasid, int cpu, int timeout_msec)) \
- IP27PROM_WAITSLAVE)
-
-#define LAUNCH_POLL (*(launch_state_t (*)(int nasid, int cpu)) \
- IP27PROM_POLLSLAVE)
-
-#define LAUNCH_LOOP (*(void (*)(void)) \
- IP27PROM_SLAVELOOP)
-
-#define LAUNCH_FLASH (*(void (*)(void)) \
- IP27PROM_FLASHLEDS)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_SN_LAUNCH_H */
diff -Nru a/include/asm-mips64/sn/mapped_kernel.h b/include/asm-mips64/sn/mapped_kernel.h
--- a/include/asm-mips64/sn/mapped_kernel.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,55 +0,0 @@
-/*
- * File created by Kanoj Sarcar 06/06/00.
- * Copyright 2000 Silicon Graphics, Inc.
- */
-#ifndef __ASM_SN_MAPPED_KERNEL_H
-#define __ASM_SN_MAPPED_KERNEL_H
-
-/*
- * Note on how mapped kernels work: the text and data section is
- * compiled at cksseg segment (LOADADDR = 0xc001c000), and the
- * init/setup/data section gets a 16M virtual address bump in the
- * ld.script file (so that tlblo0 and tlblo1 maps the sections).
- * The vmlinux.64 section addresses are put in the xkseg range
- * using the change-addresses makefile option. Use elfdump -of
- * on IRIX to see where the sections go. The Origin loader loads
- * the two sections contiguously in physical memory. The loader
- * sets the entry point into kernel_entry using a xkphys address,
- * but instead of using 0xa800000001160000, it uses the address
- * 0xa800000000160000, which is where it physically loaded that
- * code. So no jumps can be done before we have switched to using
- * cksseg addresses.
- */
-#include <linux/config.h>
-#include <asm/addrspace.h>
-
-#ifdef CONFIG_MAPPED_KERNEL
-
-#define MAPPED_ADDR_RO_TO_PHYS(x) (x - CKSSEG)
-#define MAPPED_ADDR_RW_TO_PHYS(x) (x - CKSSEG - 16777216)
-
-#define MAPPED_KERN_RO_PHYSBASE(n) \
- (PLAT_NODE_DATA(n)->kern_vars.kv_ro_baseaddr)
-#define MAPPED_KERN_RW_PHYSBASE(n) \
- (PLAT_NODE_DATA(n)->kern_vars.kv_rw_baseaddr)
-
-#define MAPPED_KERN_RO_TO_PHYS(x) \
- ((unsigned long)MAPPED_ADDR_RO_TO_PHYS(x) | \
- MAPPED_KERN_RO_PHYSBASE(get_compact_nodeid()))
-#define MAPPED_KERN_RW_TO_PHYS(x) \
- ((unsigned long)MAPPED_ADDR_RW_TO_PHYS(x) | \
- MAPPED_KERN_RW_PHYSBASE(get_compact_nodeid()))
-#define MAPPED_OFFSET 16777216
-
-#else /* CONFIG_MAPPED_KERNEL */
-
-#define MAPPED_KERN_RO_TO_PHYS(x) (x - CKSEG0)
-#define MAPPED_KERN_RW_TO_PHYS(x) (x - CKSEG0)
-#define MAPPED_OFFSET 0
-
-#endif /* CONFIG_MAPPED_KERNEL */
-
-#define MAPPED_KERN_RO_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RO_TO_PHYS(x))
-#define MAPPED_KERN_RW_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RW_TO_PHYS(x))
-
-#endif /* __ASM_SN_MAPPED_KERNEL_H */
diff -Nru a/include/asm-mips64/sn/nmi.h b/include/asm-mips64/sn/nmi.h
--- a/include/asm-mips64/sn/nmi.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,125 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
- */
-#ifndef __ASM_SN_NMI_H
-#define __ASM_SN_NMI_H
-
-#ident "$Revision: 1.5 $"
-
-#include <asm/sn/addrs.h>
-
-/*
- * The launch data structure resides at a fixed place in each node's memory
- * and is used to communicate between the master processor and the slave
- * processors.
- *
- * The master stores launch parameters in the launch structure
- * corresponding to a target processor that is in a slave loop, then sends
- * an interrupt to the slave processor. The slave calls the desired
- * function, followed by an optional rendezvous function, then returns to
- * the slave loop. The master does not wait for the slaves before
- * returning.
- *
- * There is an array of launch structures, one per CPU on the node. One
- * interrupt level is used per CPU.
- */
-
-#define NMI_MAGIC 0x48414d4d455201
-#define NMI_SIZEOF 0x40
-
-#define NMI_OFF_MAGIC 0x00 /* Struct offsets for assembly */
-#define NMI_OFF_FLAGS 0x08
-#define NMI_OFF_CALL 0x10
-#define NMI_OFF_CALLC 0x18
-#define NMI_OFF_CALLPARM 0x20
-#define NMI_OFF_GMASTER 0x28
-
-/*
- * The NMI routine is called only if the complement address is
- * correct.
- *
- * Before control is transferred to a routine, the complement address
- * is zeroed (invalidated) to prevent an accidental call from a spurious
- * interrupt.
- *
- */
-
-#ifndef __ASSEMBLY__
-
-typedef struct nmi_s {
- volatile unsigned long magic; /* Magic number */
- volatile unsigned long flags; /* Combination of flags above */
- volatile void *call_addr; /* Routine for slave to call */
- volatile void *call_addr_c; /* 1's complement of address */
- volatile void *call_parm; /* Single parm passed to call */
- volatile unsigned long gmaster; /* Flag true only on global master*/
-} nmi_t;
-
-#endif /* !__ASSEMBLY__ */
-
-/* Following definitions are needed both in the prom & the kernel
- * to identify the format of the nmi cpu register save area in the
- * low memory on each node.
- */
-#ifndef __ASSEMBLY__
-
-struct reg_struct {
- unsigned long gpr[32];
- unsigned long sr;
- unsigned long cause;
- unsigned long epc;
- unsigned long badva;
- unsigned long error_epc;
- unsigned long cache_err;
- unsigned long nmi_sr;
-};
-
-#endif /* !__ASSEMBLY__ */
-
-/* These are the assembly language offsets into the reg_struct structure */
-
-#define R0_OFF 0x0
-#define R1_OFF 0x8
-#define R2_OFF 0x10
-#define R3_OFF 0x18
-#define R4_OFF 0x20
-#define R5_OFF 0x28
-#define R6_OFF 0x30
-#define R7_OFF 0x38
-#define R8_OFF 0x40
-#define R9_OFF 0x48
-#define R10_OFF 0x50
-#define R11_OFF 0x58
-#define R12_OFF 0x60
-#define R13_OFF 0x68
-#define R14_OFF 0x70
-#define R15_OFF 0x78
-#define R16_OFF 0x80
-#define R17_OFF 0x88
-#define R18_OFF 0x90
-#define R19_OFF 0x98
-#define R20_OFF 0xa0
-#define R21_OFF 0xa8
-#define R22_OFF 0xb0
-#define R23_OFF 0xb8
-#define R24_OFF 0xc0
-#define R25_OFF 0xc8
-#define R26_OFF 0xd0
-#define R27_OFF 0xd8
-#define R28_OFF 0xe0
-#define R29_OFF 0xe8
-#define R30_OFF 0xf0
-#define R31_OFF 0xf8
-#define SR_OFF 0x100
-#define CAUSE_OFF 0x108
-#define EPC_OFF 0x110
-#define BADVA_OFF 0x118
-#define ERROR_EPC_OFF 0x120
-#define CACHE_ERR_OFF 0x128
-#define NMISR_OFF 0x130
-
-#endif /* __ASM_SN_NMI_H */
diff -Nru a/include/asm-mips64/sn/sn0/addrs.h b/include/asm-mips64/sn/sn0/addrs.h
--- a/include/asm-mips64/sn/sn0/addrs.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,378 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/addrs.h>, revision 1.126.
- *
- * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SN_SN0_ADDRS_H
-#define _ASM_SN_SN0_ADDRS_H
-
-#include <linux/config.h>
-
-/*
- * SN0 (on a T5) Address map
- *
- * This file contains a set of definitions and macros which are used
- * to reference into the major address spaces (CAC, HSPEC, IO, MSPEC,
- * and UNCAC) used by the SN0 architecture. It also contains addresses
- * for "major" statically locatable PROM/Kernel data structures, such as
- * the partition table, the configuration data structure, etc.
- * We make an implicit assumption that the processor using this file
- * follows the R10K's provisions for specifying uncached attributes;
- * should this change, the base registers may very well become processor-
- * dependent.
- *
- * For more information on the address spaces, see the "Local Resources"
- * chapter of the Hub specification.
- *
- * NOTE: This header file is included both by C and by assembler source
- * files. Please bracket any language-dependent definitions
- * appropriately.
- */
-
-/*
- * Some of the macros here need to be casted to appropriate types when used
- * from C. They definitely must not be casted from assembly language so we
- * use some new ANSI preprocessor stuff to paste these on where needed.
- */
-
-#define CAC_BASE 0xa800000000000000
-
-#define HSPEC_BASE 0x9000000000000000
-#define IO_BASE 0x9200000000000000
-#define MSPEC_BASE 0x9400000000000000
-#define UNCAC_BASE 0x9600000000000000
-
-#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
-#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK))
-
-
-/*
- * The following couple of definitions will eventually need to be variables,
- * since the amount of address space assigned to each node depends on
- * whether the system is running in N-mode (more nodes with less memory)
- * or M-mode (fewer nodes with more memory). We expect that it will
- * be a while before we need to make this decision dynamically, though,
- * so for now we just use defines bracketed by an ifdef.
- */
-
-#ifdef CONFIG_SGI_SN0_N_MODE
-
-#define NODE_SIZE_BITS 31
-#define BWIN_SIZE_BITS 28
-
-#define NASID_BITS 9
-#define NASID_BITMASK (0x1ffLL)
-#define NASID_SHFT 31
-#define NASID_META_BITS 5
-#define NASID_LOCAL_BITS 4
-
-#define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10)
-#define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3)
-
-#else /* !defined(CONFIG_SGI_SN0_N_MODE), assume that M-mode is desired */
-
-#define NODE_SIZE_BITS 32
-#define BWIN_SIZE_BITS 29
-
-#define NASID_BITMASK (0xffLL)
-#define NASID_BITS 8
-#define NASID_SHFT 32
-#define NASID_META_BITS 4
-#define NASID_LOCAL_BITS 4
-
-#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
-#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
-
-#endif /* !defined(CONFIG_SGI_SN0_N_MODE) */
-
-#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
-
-#define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT)
-#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \
- NASID_SHFT) & NASID_BITMASK)
-
-#if !defined(__ASSEMBLY__) && !defined(_STANDALONE)
-
-#define NODE_SWIN_BASE(nasid, widget) \
- ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \
- : RAW_NODE_SWIN_BASE(nasid, widget))
-#else /* __ASSEMBLY__ || _STANDALONE */
-#define NODE_SWIN_BASE(nasid, widget) \
- (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
-#endif /* __ASSEMBLY__ || _STANDALONE */
-
-/*
- * The following definitions pertain to the IO special address
- * space. They define the location of the big and little windows
- * of any given node.
- */
-
-#define BWIN_INDEX_BITS 3
-#define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS)
-#define BWIN_SIZEMASK (BWIN_SIZE - 1)
-#define BWIN_WIDGET_MASK 0x7
-#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE)
-#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \
- (UINT64_CAST (bigwin) << BWIN_SIZE_BITS))
-
-#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK)
-#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
-/*
- * Verify if addr belongs to large window address of node with "nasid"
- *
- *
- * NOTE: "addr" is expected to be XKPHYS address, and NOT physical
- * address
- *
- *
- */
-
-#define NODE_BWIN_ADDR(nasid, addr) \
- (((addr) >= NODE_BWIN_BASE0(nasid)) && \
- ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \
- BWIN_SIZE)))
-
-/*
- * The following define the major position-independent aliases used
- * in SN0.
- * CALIAS -- Varies in size, points to the first n bytes of memory
- * on the reader's node.
- */
-
-#define CALIAS_BASE CAC_BASE
-
-
-
-#define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) \
- ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
-
-#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid)))
-
-/* Turn on sable logging for the processors whose bits are set. */
-#ifdef SABLE
-#define SABLE_LOG_TRIGGER(_map) \
- *((volatile hubreg_t *)(IO_BASE + 0x17ffff0)) = (_map)
-#else
-#define SABLE_LOG_TRIGGER(_map)
-#endif /* SABLE */
-
-#ifndef __ASSEMBLY__
-#define KERN_NMI_ADDR(nasid, slice) \
- TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + \
- (IP27_NMI_KREGS_CPU_SIZE * (slice)))
-#endif /* !__ASSEMBLY__ */
-
-#ifdef PROM
-
-#define MISC_PROM_BASE PHYS_TO_K0(0x01300000)
-#define MISC_PROM_SIZE 0x200000
-
-#define DIAG_BASE PHYS_TO_K0(0x01500000)
-#define DIAG_SIZE 0x300000
-
-#define ROUTE_BASE PHYS_TO_K0(0x01800000)
-#define ROUTE_SIZE 0x200000
-
-#define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000)
-#define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000)
-#define IP27PROM_CORP_MAX 32
-#define IP27PROM_CORP PHYS_TO_K0(0x01800000)
-#define IP27PROM_CORP_SIZE 0x10000
-#define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000)
-#define IP27PROM_CORP_STKSIZE 0x2000
-#define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000)
-#define IP27PROM_DECOMP_SIZE 0xfff00
-
-#define IP27PROM_BASE PHYS_TO_K0(0x01a00000)
-#define IP27PROM_BASE_MAPPED (K2BASE | 0x1fc00000)
-#define IP27PROM_SIZE_MAX 0x100000
-
-#define IP27PROM_PCFG PHYS_TO_K0(0x01b00000)
-#define IP27PROM_PCFG_SIZE 0xd0000
-#define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000)
-#define IP27PROM_ERRDMP_SIZE 0xf000
-
-#define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000)
-#define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000)
-#define IP27PROM_CONSOLE_SIZE 0x200
-#define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200)
-#define IP27PROM_NETUART_SIZE 0x100
-#define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300)
-#define IP27PROM_UNUSED1_SIZE 0x500
-#define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800)
-#define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00)
-#define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000)
-#define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000)
-#define IP27PROM_STACK_SHFT 16
-#define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT)
-#define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000)
-
-#define SLAVESTACK_BASE PHYS_TO_K0(0x01580000)
-#define SLAVESTACK_SIZE 0x40000
-
-#define ENETBUFS_BASE PHYS_TO_K0(0x01f80000)
-#define ENETBUFS_SIZE 0x20000
-
-#define IO6PROM_BASE PHYS_TO_K0(0x01c00000)
-#define IO6PROM_SIZE 0x400000
-#define IO6PROM_BASE_MAPPED (K2BASE | 0x11c00000)
-#define IO6DPROM_BASE PHYS_TO_K0(0x01c00000)
-#define IO6DPROM_SIZE 0x200000
-
-#define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000)
-#define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000)
-
-#define IP27PROM_INT_LAUNCH 10 /* and 11 */
-#define IP27PROM_INT_NETUART 12 /* through 17 */
-
-#endif /* PROM */
-
-/*
- * needed by symmon so it needs to be outside #if PROM
- */
-#define IP27PROM_ELSC_SHFT 10
-#define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT)
-
-/*
- * This address is used by IO6PROM to build MemoryDescriptors of
- * free memory. This address is important since unix gets loaded
- * at this address, and this memory has to be FREE if unix is to
- * be loaded.
- */
-
-#define FREEMEM_BASE PHYS_TO_K0(0x2000000)
-
-#define IO6PROM_STACK_SHFT 14 /* stack per cpu */
-#define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT)
-
-/*
- * IP27 PROM vectors
- */
-
-#define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000)
-#define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008)
-#define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010)
-#define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018)
-#define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020)
-#define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028)
-#define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030)
-#define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038)
-#define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040)
-#define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048)
-
-#define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) /* base of UART regs */
-#define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) /* UART command reg */
-#define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) /* UART data reg */
-#define KL_I2C_REG MD_UREG0_0 /* I2C reg */
-
-#ifndef __ASSEMBLY__
-
-/* Address 0x400 to 0x1000 ualias points to cache error eframe + misc
- * CACHE_ERR_SP_PTR could either contain an address to the stack, or
- * the stack could start at CACHE_ERR_SP_PTR
- */
-#if defined (HUB_ERR_STS_WAR)
-#define CACHE_ERR_EFRAME 0x480
-#else /* HUB_ERR_STS_WAR */
-#define CACHE_ERR_EFRAME 0x400
-#endif /* HUB_ERR_STS_WAR */
-
-#define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE)
-#define CACHE_ERR_SP_PTR (0x1000 - 32) /* why -32? TBD */
-#define CACHE_ERR_IBASE_PTR (0x1000 - 40)
-#define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16)
-#define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME)
-
-#endif /* !__ASSEMBLY__ */
-
-#define _ARCSPROM
-
-#ifdef _STANDALONE
-
-/*
- * The PROM needs to pass the device base address and the
- * device pci cfg space address to the device drivers during
- * install. The COMPONENT->Key field is used for this purpose.
- * Macros needed by SN0 device drivers to convert the
- * COMPONENT->Key field to the respective base address.
- * Key field looks as follows:
- *
- * +----------------------------------------------------+
- * |devnasid | widget |pciid |hubwidid|hstnasid | adap |
- * | 2 | 1 | 1 | 1 | 2 | 1 |
- * +----------------------------------------------------+
- * | | | | | | |
- * 64 48 40 32 24 8 0
- *
- * These are used by standalone drivers till the io infrastructure
- * is in place.
- */
-
-#ifndef __ASSEMBLY__
-
-#define uchar unsigned char
-
-#define KEY_DEVNASID_SHFT 48
-#define KEY_WIDID_SHFT 40
-#define KEY_PCIID_SHFT 32
-#define KEY_HUBWID_SHFT 24
-#define KEY_HSTNASID_SHFT 8
-
-#define MK_SN0_KEY(nasid, widid, pciid) \
- ((((__psunsigned_t)nasid)<< KEY_DEVNASID_SHFT |\
- ((__psunsigned_t)widid) << KEY_WIDID_SHFT) |\
- ((__psunsigned_t)pciid) << KEY_PCIID_SHFT)
-
-#define ADD_HUBWID_KEY(key,hubwid)\
- (key|=((__psunsigned_t)hubwid << KEY_HUBWID_SHFT))
-
-#define ADD_HSTNASID_KEY(key,hstnasid)\
- (key|=((__psunsigned_t)hstnasid << KEY_HSTNASID_SHFT))
-
-#define GET_DEVNASID_FROM_KEY(key) ((short)(key >> KEY_DEVNASID_SHFT))
-#define GET_WIDID_FROM_KEY(key) ((uchar)(key >> KEY_WIDID_SHFT))
-#define GET_PCIID_FROM_KEY(key) ((uchar)(key >> KEY_PCIID_SHFT))
-#define GET_HUBWID_FROM_KEY(key) ((uchar)(key >> KEY_HUBWID_SHFT))
-#define GET_HSTNASID_FROM_KEY(key) ((short)(key >> KEY_HSTNASID_SHFT))
-
-#define PCI_64_TARGID_SHFT 60
-
-#define GET_PCIBASE_FROM_KEY(key) (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
- GET_WIDID_FROM_KEY(key))\
- | BRIDGE_DEVIO(GET_PCIID_FROM_KEY(key)))
-
-#define GET_PCICFGBASE_FROM_KEY(key) \
- (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
- GET_WIDID_FROM_KEY(key))\
- | BRIDGE_TYPE0_CFG_DEV(GET_PCIID_FROM_KEY(key)))
-
-#define GET_WIDBASE_FROM_KEY(key) \
- (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
- GET_WIDID_FROM_KEY(key)))
-
-#define PUT_INSTALL_STATUS(c,s) c->Revision = s
-#define GET_INSTALL_STATUS(c) c->Revision
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _STANDALONE */
-
-#if defined (HUB_ERR_STS_WAR)
-
-#define ERR_STS_WAR_REGISTER IIO_IIBUSERR
-#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR)
-#define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR)
- /* Used to match addr in error reg. */
-#define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100)
-
-#endif /* HUB_ERR_STS_WAR */
-
-#endif /* _ASM_SN_SN0_ADDRS_H */
diff -Nru a/include/asm-mips64/sn/sn0/arch.h b/include/asm-mips64/sn/sn0/arch.h
--- a/include/asm-mips64/sn/sn0/arch.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,85 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI IP27 specific setup.
- *
- * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_SN_SN0_ARCH_H
-#define _ASM_SN_SN0_ARCH_H
-
-#include <linux/config.h>
-
-#ifndef SABLE
-
-#ifndef SN0XXL /* 128 cpu SMP max */
-/*
- * This is the maximum number of nodes that can be part of a kernel.
- * Effectively, it's the maximum number of compact node ids (cnodeid_t).
- */
-#define MAX_COMPACT_NODES 64
-
-/*
- * MAXCPUS refers to the maximum number of CPUs in a single kernel.
- * This is not necessarily the same as MAXNODES * CPUS_PER_NODE
- */
-#define MAXCPUS 128
-
-#else /* SN0XXL system */
-
-#define MAX_COMPACT_NODES 128
-#define MAXCPUS 256
-
-#endif /* SN0XXL */
-
-/*
- * This is the maximum number of NASIDS that can be present in a system.
- * (Highest NASID plus one.)
- */
-#define MAX_NASIDS 256
-
-/*
- * MAX_REGIONS refers to the maximum number of hardware partitioned regions.
- */
-#define MAX_REGIONS 64
-#define MAX_NONPREMIUM_REGIONS 16
-#define MAX_PREMIUM_REGIONS MAX_REGIONS
-
-/*
- * MAX_PARITIONS refers to the maximum number of logically defined
- * partitions the system can support.
- */
-#define MAX_PARTITIONS MAX_REGIONS
-
-
-#else
-
-#define MAX_COMPACT_NODES 4
-#define MAX_NASIDS 4
-#define MAXCPUS 8
-
-#endif
-
-#define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8)
-
-/*
- * Slot constants for SN0
- */
-#ifdef CONFIG_SGI_SN0_N_MODE
-#define MAX_MEM_SLOTS 16 /* max slots per node */
-#else /* !CONFIG_SGI_SN0_N_MODE, assume M_MODE */
-#define MAX_MEM_SLOTS 32 /* max slots per node */
-#endif /* defined(N_MODE) */
-
-#if SABLE_RTL
-#define SLOT_SHIFT (28)
-#define SLOT_MIN_MEM_SIZE (16*1024*1024)
-#else
-#define SLOT_SHIFT (27)
-#define SLOT_MIN_MEM_SIZE (32*1024*1024)
-#endif
-
-#endif /* _ASM_SN_SN0_ARCH_H */
diff -Nru a/include/asm-mips64/sn/sn0/hub.h b/include/asm-mips64/sn/sn0/hub.h
--- a/include/asm-mips64/sn/sn0/hub.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,44 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SN_SN0_HUB_H
-#define _ASM_SN_SN0_HUB_H
-
-/* The secret password; used to release protection */
-#define HUB_PASSWORD 0x53474972756c6573ull
-
-#define CHIPID_HUB 0
-#define CHIPID_ROUTER 1
-
-#define HUB_REV_1_0 1
-#define HUB_REV_2_0 2
-#define HUB_REV_2_1 3
-#define HUB_REV_2_2 4
-#define HUB_REV_2_3 5
-#define HUB_REV_2_4 6
-
-#define MAX_HUB_PATH 80
-
-#include <asm/sn/sn0/addrs.h>
-#include <asm/sn/sn0/hubpi.h>
-#include <asm/sn/sn0/hubmd.h>
-#include <asm/sn/sn0/hubio.h>
-#include <asm/sn/sn0/hubni.h>
-//#include <asm/sn/sn0/hubcore.h>
-
-#ifdef SABLE
-#define IP27_NO_HUBUART_INT 1
-#endif
-
-/* Translation of uncached attributes */
-#define UATTR_HSPEC 0
-#define UATTR_IO 1
-#define UATTR_MSPEC 2
-#define UATTR_UNCAC 3
-
-#endif /* _ASM_SN_SN0_HUB_H */
diff -Nru a/include/asm-mips64/sn/sn0/hubio.h b/include/asm-mips64/sn/sn0/hubio.h
--- a/include/asm-mips64/sn/sn0/hubio.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,986 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/hubio.h>, Revision 1.80.
- *
- * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SGI_SN_SN0_HUBIO_H
-#define _ASM_SGI_SN_SN0_HUBIO_H
-
-/*
- * Hub I/O interface registers
- *
- * All registers in this file are subject to change until Hub chip tapeout.
- * In general, the longer software name should be used when available.
- */
-
-/*
- * Slightly friendlier names for some common registers.
- * The hardware definitions follow.
- */
-#define IIO_WIDGET IIO_WID /* Widget identification */
-#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
-#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
-#define IIO_WIDGET_TOUT IIO_WRTO /* Widget request timeout */
-#define IIO_WIDGET_FLUSH IIO_WTFR /* Widget target flush */
-#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
-#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
-#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
-#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
-#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
-#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
-#define IIO_LLP_LOG IIO_ILLR /* LLP log */
-#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/
-#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
-#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
-#define IIO_BTE_CRB_CNT IIO_IBCN /* IO BTE CRB count */
-
-#define IIO_LLP_CSR_IS_UP 0x00002000
-#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
-#define IIO_LLP_CSR_LLP_STAT_SHFT 12
-
-/* key to IIO_PROTECT_OVRRD */
-#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
-
-/* BTE register names */
-#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
-#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
-#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
-#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
-#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
-#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
-#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
-#define IIO_BTE_OFF_1 IIO_IBLS_1 - IIO_IBLS_0 /* Offset from base to BTE 1 */
-
-/* BTE register offsets from base */
-#define BTEOFF_STAT 0
-#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
-#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
-#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
-#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
-#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
-
-
-/*
- * The following definitions use the names defined in the IO interface
- * document for ease of reference. When possible, software should
- * generally use the longer but clearer names defined above.
- */
-
-#define IIO_BASE 0x400000
-#define IIO_BASE_BTE0 0x410000
-#define IIO_BASE_BTE1 0x420000
-#define IIO_BASE_PERF 0x430000
-#define IIO_PERF_CNT 0x430008
-
-#define IO_PERF_SETS 32
-
-#define IIO_WID 0x400000 /* Widget identification */
-#define IIO_WSTAT 0x400008 /* Widget status */
-#define IIO_WCR 0x400020 /* Widget control */
-
-#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
-#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
-#define IIO_WSTAT_TXRETRY_MASK (0x7F)
-#define IIO_WSTAT_TXRETRY_SHFT (16)
-#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
- IIO_WSTAT_TXRETRY_MASK)
-
-#define IIO_ILAPR 0x400100 /* Local Access Protection */
-#define IIO_ILAPO 0x400108 /* Protection override */
-#define IIO_IOWA 0x400110 /* outbound widget access */
-#define IIO_IIWA 0x400118 /* inbound widget access */
-#define IIO_IIDEM 0x400120 /* Inbound Device Error Mask */
-#define IIO_ILCSR 0x400128 /* LLP control and status */
-#define IIO_ILLR 0x400130 /* LLP Log */
-#define IIO_IIDSR 0x400138 /* Interrupt destination */
-
-#define IIO_IIBUSERR 0x1400208 /* Reads here cause a bus error. */
-
-/* IO Interrupt Destination Register */
-#define IIO_IIDSR_SENT_SHIFT 28
-#define IIO_IIDSR_SENT_MASK 0x10000000
-#define IIO_IIDSR_ENB_SHIFT 24
-#define IIO_IIDSR_ENB_MASK 0x01000000
-#define IIO_IIDSR_NODE_SHIFT 8
-#define IIO_IIDSR_NODE_MASK 0x0000ff00
-#define IIO_IIDSR_LVL_SHIFT 0
-#define IIO_IIDSR_LVL_MASK 0x0000003f
-
-
-/* GFX Flow Control Node/Widget Register */
-#define IIO_IGFX_0 0x400140 /* gfx node/widget register 0 */
-#define IIO_IGFX_1 0x400148 /* gfx node/widget register 1 */
-#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */
-#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1)
-#define IIO_IGFX_W_NUM_SHIFT 0
-#define IIO_IGFX_N_NUM_BITS 9 /* size of node num field */
-#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1)
-#define IIO_IGFX_N_NUM_SHIFT 4
-#define IIO_IGFX_P_NUM_BITS 1 /* size of processor num field */
-#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1)
-#define IIO_IGFX_P_NUM_SHIFT 16
-#define IIO_IGFX_VLD_BITS 1 /* size of valid field */
-#define IIO_IGFX_VLD_MASK ((1<<IIO_IGFX_VLD_BITS)-1)
-#define IIO_IGFX_VLD_SHIFT 20
-#define IIO_IGFX_INIT(widget, node, cpu, valid) (\
- (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | \
- (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | \
- (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT) | \
- (((valid) & IIO_IGFX_VLD_MASK) << IIO_IGFX_VLD_SHIFT) )
-
-/* Scratch registers (not all bits available) */
-#define IIO_SCRATCH_REG0 0x400150
-#define IIO_SCRATCH_REG1 0x400158
-#define IIO_SCRATCH_MASK 0x0000000f00f11fff
-
-#define IIO_SCRATCH_BIT0_0 0x0000000800000000
-#define IIO_SCRATCH_BIT0_1 0x0000000400000000
-#define IIO_SCRATCH_BIT0_2 0x0000000200000000
-#define IIO_SCRATCH_BIT0_3 0x0000000100000000
-#define IIO_SCRATCH_BIT0_4 0x0000000000800000
-#define IIO_SCRATCH_BIT0_5 0x0000000000400000
-#define IIO_SCRATCH_BIT0_6 0x0000000000200000
-#define IIO_SCRATCH_BIT0_7 0x0000000000100000
-#define IIO_SCRATCH_BIT0_8 0x0000000000010000
-#define IIO_SCRATCH_BIT0_9 0x0000000000001000
-#define IIO_SCRATCH_BIT0_R 0x0000000000000fff
-
-/* IO Translation Table Entries */
-#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
- /* Hw manuals number them 1..7! */
-
-/*
- * As a permanent workaround for a bug in the PI side of the hub, we've
- * redefined big window 7 as small window 0.
- */
-#define HUB_NUM_BIG_WINDOW IIO_NUM_ITTES - 1
-
-/*
- * Use the top big window as a surrogate for the first small window
- */
-#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW
-
-#define ILCSR_WARM_RESET 0x100
-/*
- * The IO LLP control status register and widget control register
- */
-#ifndef __ASSEMBLY__
-
-typedef union hubii_wid_u {
- u64 wid_reg_value;
- struct {
- u64 wid_rsvd: 32, /* unused */
- wid_rev_num: 4, /* revision number */
- wid_part_num: 16, /* the widget type: hub=c101 */
- wid_mfg_num: 11, /* Manufacturer id (IBM) */
- wid_rsvd1: 1; /* Reserved */
- } wid_fields_s;
-} hubii_wid_t;
-
-
-typedef union hubii_wcr_u {
- u64 wcr_reg_value;
- struct {
- u64 wcr_rsvd: 41, /* unused */
- wcr_e_thresh: 5, /* elasticity threshold */
- wcr_dir_con: 1, /* widget direct connect */
- wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
- wcr_xbar_crd: 3, /* LLP crossbar credit */
- wcr_rsvd1: 8, /* Reserved */
- wcr_tag_mode: 1, /* Tag mode */
- wcr_widget_id: 4; /* LLP crossbar credit */
- } wcr_fields_s;
-} hubii_wcr_t;
-
-#define iwcr_dir_con wcr_fields_s.wcr_dir_con
-
-typedef union hubii_wstat_u {
- u64 reg_value;
- struct {
- u64 rsvd1: 31,
- crazy: 1, /* Crazy bit */
- rsvd2: 8,
- llp_tx_cnt: 8, /* LLP Xmit retry counter */
- rsvd3: 6,
- tx_max_rtry: 1, /* LLP Retry Timeout Signal */
- rsvd4: 2,
- xt_tail_to: 1, /* Xtalk Tail Timeout */
- xt_crd_to: 1, /* Xtalk Credit Timeout */
- pending: 4; /* Pending Requests */
- } wstat_fields_s;
-} hubii_wstat_t;
-
-
-typedef union hubii_ilcsr_u {
- u64 icsr_reg_value;
- struct {
- u64 icsr_rsvd: 22, /* unused */
- icsr_max_burst: 10, /* max burst */
- icsr_rsvd4: 6, /* reserved */
- icsr_max_retry: 10, /* max retry */
- icsr_rsvd3: 2, /* reserved */
- icsr_lnk_stat: 2, /* link status */
- icsr_bm8: 1, /* Bit mode 8 */
- icsr_llp_en: 1, /* LLP enable bit */
- icsr_rsvd2: 1, /* reserver */
- icsr_wrm_reset: 1, /* Warm reset bit */
- icsr_rsvd1: 2, /* Data ready offset */
- icsr_null_to: 6; /* Null timeout */
-
- } icsr_fields_s;
-} hubii_ilcsr_t;
-
-
-typedef union hubii_iowa_u {
- u64 iowa_reg_value;
- struct {
- u64 iowa_rsvd: 48, /* unused */
- iowa_wxoac: 8, /* xtalk widget access bits */
- iowa_rsvd1: 7, /* xtalk widget access bits */
- iowa_w0oac: 1; /* xtalk widget access bits */
- } iowa_fields_s;
-} hubii_iowa_t;
-
-typedef union hubii_iiwa_u {
- u64 iiwa_reg_value;
- struct {
- u64 iiwa_rsvd: 48, /* unused */
- iiwa_wxiac: 8, /* hub wid access bits */
- iiwa_rsvd1: 7, /* reserved */
- iiwa_w0iac: 1; /* hub wid0 access */
- } iiwa_fields_s;
-} hubii_iiwa_t;
-
-typedef union hubii_illr_u {
- u64 illr_reg_value;
- struct {
- u64 illr_rsvd: 32, /* unused */
- illr_cb_cnt: 16, /* checkbit error count */
- illr_sn_cnt: 16; /* sequence number count */
- } illr_fields_s;
-} hubii_illr_t;
-
-/* The structures below are defined to extract and modify the ii
-performance registers */
-
-/* io_perf_sel allows the caller to specify what tests will be
- performed */
-typedef union io_perf_sel {
- u64 perf_sel_reg;
- struct {
- u64 perf_rsvd : 48,
- perf_icct : 8,
- perf_ippr1 : 4,
- perf_ippr0 : 4;
- } perf_sel_bits;
-} io_perf_sel_t;
-
-/* io_perf_cnt is to extract the count from the hub registers. Due to
- hardware problems there is only one counter, not two. */
-
-typedef union io_perf_cnt {
- u64 perf_cnt;
- struct {
- u64 perf_rsvd1 : 32,
- perf_rsvd2 : 12,
- perf_cnt : 20;
- } perf_cnt_bits;
-} io_perf_cnt_t;
-
-#endif /* !__ASSEMBLY__ */
-
-
-#define LNK_STAT_WORKING 0x2
-
-#define IIO_LLP_CB_MAX 0xffff
-#define IIO_LLP_SN_MAX 0xffff
-
-/* IO PRB Entries */
-#define IIO_NUM_IPRBS (9)
-#define IIO_IOPRB_0 0x400198 /* PRB entry 0 */
-#define IIO_IOPRB_8 0x4001a0 /* PRB entry 8 */
-#define IIO_IOPRB_9 0x4001a8 /* PRB entry 9 */
-#define IIO_IOPRB_A 0x4001b0 /* PRB entry a */
-#define IIO_IOPRB_B 0x4001b8 /* PRB entry b */
-#define IIO_IOPRB_C 0x4001c0 /* PRB entry c */
-#define IIO_IOPRB_D 0x4001c8 /* PRB entry d */
-#define IIO_IOPRB_E 0x4001d0 /* PRB entry e */
-#define IIO_IOPRB_F 0x4001d8 /* PRB entry f */
-
-
-#define IIO_IXCC 0x4001e0 /* Crosstalk credit count timeout */
-#define IIO_IXTCC IIO_IXCC
-#define IIO_IMEM 0x4001e8 /* Miscellaneous Enable Mask */
-#define IIO_IXTT 0x4001f0 /* Crosstalk tail timeout */
-#define IIO_IECLR 0x4001f8 /* IO error clear */
-#define IIO_IBCN 0x400200 /* IO BTE CRB count */
-
-/*
- * IIO_IMEM Register fields.
- */
-#define IIO_IMEM_W0ESD 0x1 /* Widget 0 shut down due to error */
-#define IIO_IMEM_B0ESD (1 << 4) /* BTE 0 shut down due to error */
-#define IIO_IMEM_B1ESD (1 << 8) /* BTE 1 Shut down due to error */
-
-/* PIO Read address Table Entries */
-#define IIO_IPCA 0x400300 /* PRB Counter adjust */
-#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */
-#define IIO_PRTE_0 0x400308 /* PIO Read address table entry 0 */
-#define IIO_PRTE(_x) (IIO_PRTE_0 + (8 * (_x)))
-#define IIO_WIDPRTE(x) IIO_PRTE(((x) - 8)) /* widget ID to its PRTE num */
-#define IIO_IPDR 0x400388 /* PIO table entry deallocation */
-#define IIO_ICDR 0x400390 /* CRB Entry Deallocation */
-#define IIO_IFDR 0x400398 /* IOQ FIFO Depth */
-#define IIO_IIAP 0x4003a0 /* IIQ Arbitration Parameters */
-#define IIO_IMMR IIO_IIAP
-#define IIO_ICMR 0x4003a8 /* CRB Managment Register */
-#define IIO_ICCR 0x4003b0 /* CRB Control Register */
-#define IIO_ICTO 0x4003b8 /* CRB Time Out Register */
-#define IIO_ICTP 0x4003c0 /* CRB Time Out Prescalar */
-
-
-/*
- * ICMR register fields
- */
-#define IIO_ICMR_PC_VLD_SHFT 36
-#define IIO_ICMR_PC_VLD_MASK (0x7fffUL << IIO_ICMR_PC_VLD_SHFT)
-
-#define IIO_ICMR_CRB_VLD_SHFT 20
-#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
-
-#define IIO_ICMR_FC_CNT_SHFT 16
-#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
-
-#define IIO_ICMR_C_CNT_SHFT 4
-#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
-
-#define IIO_ICMR_P_CNT_SHFT 0
-#define IIO_ICMR_P_CNT_MASK (0xf << IIO_ICMR_P_CNT_SHFT)
-
-#define IIO_ICMR_PRECISE (1UL << 52)
-#define IIO_ICMR_CLR_RPPD (1UL << 13)
-#define IIO_ICMR_CLR_RQPD (1UL << 12)
-
-/*
- * IIO PIO Deallocation register field masks : (IIO_IPDR)
- */
-#define IIO_IPDR_PND (1 << 4)
-
-/*
- * IIO CRB deallocation register field masks: (IIO_ICDR)
- */
-#define IIO_ICDR_PND (1 << 4)
-
-/*
- * IIO CRB control register Fields: IIO_ICCR
- */
-#define IIO_ICCR_PENDING (0x10000)
-#define IIO_ICCR_CMD_MASK (0xFF)
-#define IIO_ICCR_CMD_SHFT (7)
-#define IIO_ICCR_CMD_NOP (0x0) /* No Op */
-#define IIO_ICCR_CMD_WAKE (0x100) /* Reactivate CRB entry and process */
-#define IIO_ICCR_CMD_TIMEOUT (0x200) /* Make CRB timeout & mark invalid */
-#define IIO_ICCR_CMD_EJECT (0x400) /* Contents of entry written to memory
- * via a WB
- */
-#define IIO_ICCR_CMD_FLUSH (0x800)
-
-/*
- * CRB manipulation macros
- * The CRB macros are slightly complicated, since there are up to
- * four registers associated with each CRB entry.
- */
-#define IIO_NUM_CRBS 15 /* Number of CRBs */
-#define IIO_NUM_NORMAL_CRBS 12 /* Number of regular CRB entries */
-#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
-#define IIO_ICRB_OFFSET 8
-#define IIO_ICRB_0 0x400400
-/* XXX - This is now tuneable:
- #define IIO_FIRST_PC_ENTRY 12
- */
-
-#define IIO_ICRB_A(_x) (IIO_ICRB_0 + (4 * IIO_ICRB_OFFSET * (_x)))
-#define IIO_ICRB_B(_x) (IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET)
-#define IIO_ICRB_C(_x) (IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET)
-#define IIO_ICRB_D(_x) (IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET)
-
-/* XXX - IBUE register coming for Hub 2 */
-
-/*
- *
- * CRB Register description.
- *
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- *
- * Many of the fields in CRB are status bits used by hardware
- * for implementation of the protocol. It's very dangerous to
- * mess around with the CRB registers.
- *
- * It's OK to read the CRB registers and try to make sense out of the
- * fields in CRB.
- *
- * Updating CRB requires all activities in Hub IIO to be quiesced.
- * otherwise, a write to CRB could corrupt other CRB entries.
- * CRBs are here only as a back door peek to hub IIO's status.
- * Quiescing implies no dmas no PIOs
- * either directly from the cpu or from sn0net.
- * this is not something that can be done easily. So, AVOID updating
- * CRBs.
- */
-
-/*
- * Fields in CRB Register A
- */
-#ifndef __ASSEMBLY__
-typedef union icrba_u {
- u64 reg_value;
- struct {
- u64 resvd: 6,
- stall_bte0: 1, /* Stall BTE 0 */
- stall_bte1: 1, /* Stall BTE 1 */
- error: 1, /* CRB has an error */
- ecode: 3, /* Error Code */
- lnetuce: 1, /* SN0net Uncorrectable error */
- mark: 1, /* CRB Has been marked */
- xerr: 1, /* Error bit set in xtalk header */
- sidn: 4, /* SIDN field from xtalk */
- tnum: 5, /* TNUM field in xtalk */
- addr: 38, /* Address of request */
- valid: 1, /* Valid status */
- iow: 1; /* IO Write operation */
- } icrba_fields_s;
-} icrba_t;
-
-/* This is an alternate typedef for the HUB1 CRB A in order to allow
- runtime selection of the format based on the REV_ID field of the
- NI_STATUS_REV_ID register. */
-typedef union h1_icrba_u {
- u64 reg_value;
-
- struct {
- u64 resvd: 6,
- unused: 1, /* Unused but RW!! */
- error: 1, /* CRB has an error */
- ecode: 4, /* Error Code */
- lnetuce: 1, /* SN0net Uncorrectable error */
- mark: 1, /* CRB Has been marked */
- xerr: 1, /* Error bit set in xtalk header */
- sidn: 4, /* SIDN field from xtalk */
- tnum: 5, /* TNUM field in xtalk */
- addr: 38, /* Address of request */
- valid: 1, /* Valid status */
- iow: 1; /* IO Write operation */
- } h1_icrba_fields_s;
-} h1_icrba_t;
-
-/* XXX - Is this still right? Check the spec. */
-#define ICRBN_A_CERR_SHFT 54
-#define ICRBN_A_ERR_MASK 0x3ff
-
-/*
- * Easy access macros.
- */
-#define a_error icrba_fields_s.error
-#define a_ecode icrba_fields_s.ecode
-#define a_lnetuce icrba_fields_s.lnetuce
-#define a_mark icrba_fields_s.mark
-#define a_xerr icrba_fields_s.xerr
-#define a_sidn icrba_fields_s.sidn
-#define a_tnum icrba_fields_s.tnum
-#define a_addr icrba_fields_s.addr
-#define a_valid icrba_fields_s.valid
-#define a_iow icrba_fields_s.iow
-
-#endif /* !__ASSEMBLY__ */
-
-#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
-
-/*
- * values for "ecode" field
- */
-#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
-#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
-#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
- * e.g. WINV to a Read only line.
- */
-#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
-#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
-#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
-#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
-#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
-
-
-
-/*
- * Fields in CRB Register B
- */
-#ifndef __ASSEMBLY__
-typedef union icrbb_u {
- u64 reg_value;
- struct {
- u64 rsvd1: 5,
- btenum: 1, /* BTE to which entry belongs to */
- cohtrans: 1, /* Coherent transaction */
- xtsize: 2, /* Xtalk operation size
- * 0: Double Word
- * 1: 32 Bytes.
- * 2: 128 Bytes,
- * 3: Reserved.
- */
- srcnode: 9, /* Source Node ID */
- srcinit: 2, /* Source Initiator:
- * See below for field values.
- */
- useold: 1, /* Use OLD command for processing */
- imsgtype: 2, /* Incoming message type
- * see below for field values
- */
- imsg: 8, /* Incoming message */
- initator: 3, /* Initiator of original request
- * See below for field values.
- */
- reqtype: 5, /* Identifies type of request
- * See below for field values.
- */
- rsvd2: 7,
- ackcnt: 11, /* Invalidate ack count */
- resp: 1, /* data response given to processor */
- ack: 1, /* indicates data ack received */
- hold: 1, /* entry is gathering inval acks */
- wb_pend:1, /* waiting for writeback to complete */
- intvn: 1, /* Intervention */
- stall_ib: 1, /* Stall Ibuf (from crosstalk) */
- stall_intr: 1; /* Stall internal interrupts */
- } icrbb_field_s;
-} icrbb_t;
-
-/* This is an alternate typedef for the HUB1 CRB B in order to allow
- runtime selection of the format based on the REV_ID field of the
- NI_STATUS_REV_ID register. */
-typedef union h1_icrbb_u {
- u64 reg_value;
- struct {
- u64 rsvd1: 5,
- btenum: 1, /* BTE to which entry belongs to */
- cohtrans: 1, /* Coherent transaction */
- xtsize: 2, /* Xtalk operation size
- * 0: Double Word
- * 1: 32 Bytes.
- * 2: 128 Bytes,
- * 3: Reserved.
- */
- srcnode: 9, /* Source Node ID */
- srcinit: 2, /* Source Initiator:
- * See below for field values.
- */
- useold: 1, /* Use OLD command for processing */
- imsgtype: 2, /* Incoming message type
- * see below for field values
- */
- imsg: 8, /* Incoming message */
- initator: 3, /* Initiator of original request
- * See below for field values.
- */
- rsvd2: 1,
- pcache: 1, /* entry belongs to partial cache */
- reqtype: 5, /* Identifies type of request
- * See below for field values.
- */
- stl_ib: 1, /* stall Ibus coming from xtalk */
- stl_intr: 1, /* Stall internal interrupts */
- stl_bte0: 1, /* Stall BTE 0 */
- stl_bte1: 1, /* Stall BTE 1 */
- intrvn: 1, /* Req was target of intervention */
- ackcnt: 11, /* Invalidate ack count */
- resp: 1, /* data response given to processor */
- ack: 1, /* indicates data ack received */
- hold: 1, /* entry is gathering inval acks */
- wb_pend:1, /* waiting for writeback to complete */
- sleep: 1, /* xtalk req sleeping till IO-sync */
- pnd_reply: 1, /* replies not issed due to IOQ full */
- pnd_req: 1; /* reqs not issued due to IOQ full */
- } h1_icrbb_field_s;
-} h1_icrbb_t;
-
-
-#define b_imsgtype icrbb_field_s.imsgtype
-#define b_btenum icrbb_field_s.btenum
-#define b_cohtrans icrbb_field_s.cohtrans
-#define b_xtsize icrbb_field_s.xtsize
-#define b_srcnode icrbb_field_s.srcnode
-#define b_srcinit icrbb_field_s.srcinit
-#define b_imsgtype icrbb_field_s.imsgtype
-#define b_imsg icrbb_field_s.imsg
-#define b_initiator icrbb_field_s.initiator
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * values for field xtsize
- */
-#define IIO_ICRB_XTSIZE_DW 0 /* Xtalk operation size is 8 bytes */
-#define IIO_ICRB_XTSIZE_32 1 /* Xtalk operation size is 32 bytes */
-#define IIO_ICRB_XTSIZE_128 2 /* Xtalk operation size is 128 bytes */
-
-/*
- * values for field srcinit
- */
-#define IIO_ICRB_PROC0 0 /* Source of request is Proc 0 */
-#define IIO_ICRB_PROC1 1 /* Source of request is Proc 1 */
-#define IIO_ICRB_GB_REQ 2 /* Source is Guranteed BW request */
-#define IIO_ICRB_IO_REQ 3 /* Source is Normal IO request */
-
-/*
- * Values for field imsgtype
- */
-#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
-#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
-#define IIO_ICRB_IMSGT_SN0NET 2 /* Incoming message from SN0 net */
-#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
-
-/*
- * values for field initiator.
- */
-#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
-#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
-#define IIO_ICRB_INIT_SN0NET 0x2 /* Message originated in SN0net */
-#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
-#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
-
-/*
- * Values for field reqtype.
- */
-/* XXX - Need to fix this for Hub 2 */
-#define IIO_ICRB_REQ_DWRD 0 /* Request type double word */
-#define IIO_ICRB_REQ_QCLRD 1 /* Request is Qrtr Caceh line Rd */
-#define IIO_ICRB_REQ_BLKRD 2 /* Request is block read */
-#define IIO_ICRB_REQ_RSHU 6 /* Request is BTE block read */
-#define IIO_ICRB_REQ_REXU 7 /* request is BTE Excl Read */
-#define IIO_ICRB_REQ_RDEX 8 /* Request is Read Exclusive */
-#define IIO_ICRB_REQ_WINC 9 /* Request is Write Invalidate */
-#define IIO_ICRB_REQ_BWINV 10 /* Request is BTE Winv */
-#define IIO_ICRB_REQ_PIORD 11 /* Request is PIO read */
-#define IIO_ICRB_REQ_PIOWR 12 /* Request is PIO Write */
-#define IIO_ICRB_REQ_PRDM 13 /* Request is Fetch&Op */
-#define IIO_ICRB_REQ_PWRM 14 /* Request is Store &Op */
-#define IIO_ICRB_REQ_PTPWR 15 /* Request is Peer to peer */
-#define IIO_ICRB_REQ_WB 16 /* Request is Write back */
-#define IIO_ICRB_REQ_DEX 17 /* Retained DEX Cache line */
-
-/*
- * Fields in CRB Register C
- */
-
-#ifndef __ASSEMBLY__
-
-typedef union icrbc_s {
- u64 reg_value;
- struct {
- u64 rsvd: 6,
- sleep: 1,
- pricnt: 4, /* Priority count sent with Read req */
- pripsc: 4, /* Priority Pre scalar */
- bteop: 1, /* BTE Operation */
- push_be: 34, /* Push address Byte enable
- * Holds push addr, if CRB is for BTE
- * If CRB belongs to Partial cache,
- * this contains byte enables bits
- * ([47:46] = 0)
- */
- suppl: 11, /* Supplemental field */
- barrop: 1, /* Barrier Op bit set in xtalk req */
- doresp: 1, /* Xtalk req needs a response */
- gbr: 1; /* GBR bit set in xtalk packet */
- } icrbc_field_s;
-} icrbc_t;
-
-#define c_pricnt icrbc_field_s.pricnt
-#define c_pripsc icrbc_field_s.pripsc
-#define c_bteop icrbc_field_s.bteop
-#define c_bteaddr icrbc_field_s.push_be /* push_be field has 2 names */
-#define c_benable icrbc_field_s.push_be /* push_be field has 2 names */
-#define c_suppl icrbc_field_s.suppl
-#define c_barrop icrbc_field_s.barrop
-#define c_doresp icrbc_field_s.doresp
-#define c_gbr icrbc_field_s.gbr
-#endif /* !__ASSEMBLY__ */
-
-/*
- * Fields in CRB Register D
- */
-
-#ifndef __ASSEMBLY__
-typedef union icrbd_s {
- u64 reg_value;
- struct {
- u64 rsvd: 38,
- toutvld: 1, /* Timeout in progress for this CRB */
- ctxtvld: 1, /* Context field below is valid */
- rsvd2: 1,
- context: 15, /* Bit vector:
- * Has a bit set for each CRB entry
- * which needs to be deallocated
- * before this CRB entry is processed.
- * Set only for barrier operations.
- */
- timeout: 8; /* Timeout Upper 8 bits */
- } icrbd_field_s;
-} icrbd_t;
-
-#define icrbd_toutvld icrbd_field_s.toutvld
-#define icrbd_ctxtvld icrbd_field_s.ctxtvld
-#define icrbd_context icrbd_field_s.context
-
-
-typedef union hubii_ifdr_u {
- u64 hi_ifdr_value;
- struct {
- u64 ifdr_rsvd: 49,
- ifdr_maxrp: 7,
- ifdr_rsvd1: 1,
- ifdr_maxrq: 7;
- } hi_ifdr_fields;
-} hubii_ifdr_t;
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * Hardware designed names for the BTE control registers.
- */
-#define IIO_IBLS_0 0x410000 /* BTE length/status 0 */
-#define IIO_IBSA_0 0x410008 /* BTE source address 0 */
-#define IIO_IBDA_0 0x410010 /* BTE destination address 0 */
-#define IIO_IBCT_0 0x410018 /* BTE control/terminate 0 */
-#define IIO_IBNA_0 0x410020 /* BTE notification address 0 */
-#define IIO_IBNR_0 IIO_IBNA_0
-#define IIO_IBIA_0 0x410028 /* BTE interrupt address 0 */
-
-#define IIO_IBLS_1 0x420000 /* BTE length/status 1 */
-#define IIO_IBSA_1 0x420008 /* BTE source address 1 */
-#define IIO_IBDA_1 0x420010 /* BTE destination address 1 */
-#define IIO_IBCT_1 0x420018 /* BTE control/terminate 1 */
-#define IIO_IBNA_1 0x420020 /* BTE notification address 1 */
-#define IIO_IBNR_1 IIO_IBNA_1
-#define IIO_IBIA_1 0x420028 /* BTE interrupt address 1 */
-
-/*
- * More miscellaneous registers
- */
-#define IIO_IPCR 0x430000 /* Performance Control */
-#define IIO_IPPR 0x430008 /* Performance Profiling */
-
-/*
- * IO Error Clear register bit field definitions
- */
-#define IECLR_BTE1 (1 << 18) /* clear bte error 1 ??? */
-#define IECLR_BTE0 (1 << 17) /* clear bte error 0 ??? */
-#define IECLR_CRAZY (1 << 16) /* clear crazy bit in wstat reg */
-#define IECLR_PRB_F (1 << 15) /* clear err bit in PRB_F reg */
-#define IECLR_PRB_E (1 << 14) /* clear err bit in PRB_E reg */
-#define IECLR_PRB_D (1 << 13) /* clear err bit in PRB_D reg */
-#define IECLR_PRB_C (1 << 12) /* clear err bit in PRB_C reg */
-#define IECLR_PRB_B (1 << 11) /* clear err bit in PRB_B reg */
-#define IECLR_PRB_A (1 << 10) /* clear err bit in PRB_A reg */
-#define IECLR_PRB_9 (1 << 9) /* clear err bit in PRB_9 reg */
-#define IECLR_PRB_8 (1 << 8) /* clear err bit in PRB_8 reg */
-#define IECLR_PRB_0 (1 << 0) /* clear err bit in PRB_0 reg */
-
-/*
- * IO PIO Read Table Entry format
- */
-
-#ifndef __ASSEMBLY__
-
-typedef union iprte_a {
- u64 entry;
- struct {
- u64 rsvd1 : 7, /* Reserved field */
- valid : 1, /* Maps to a timeout entry */
- rsvd2 : 1,
- srcnode : 9, /* Node which did this PIO */
- initiator : 2, /* If T5A or T5B or IO */
- rsvd3 : 3,
- addr : 38, /* Physical address of PIO */
- rsvd4 : 3;
- } iprte_fields;
-} iprte_a_t;
-
-#define iprte_valid iprte_fields.valid
-#define iprte_timeout iprte_fields.timeout
-#define iprte_srcnode iprte_fields.srcnode
-#define iprte_init iprte_fields.initiator
-#define iprte_addr iprte_fields.addr
-
-#endif /* !__ASSEMBLY__ */
-
-#define IPRTE_ADDRSHFT 3
-
-/*
- * Hub IIO PRB Register format.
- */
-
-#ifndef __ASSEMBLY__
-/*
- * Note: Fields bnakctr, anakctr, xtalkctrmode, ovflow fields are
- * "Status" fields, and should only be used in case of clean up after errors.
- */
-
-typedef union iprb_u {
- u64 reg_value;
- struct {
- u64 rsvd1: 15,
- error: 1, /* Widget rcvd wr resp pkt w/ error */
- ovflow: 5, /* Over flow count. perf measurement */
- fire_and_forget: 1, /* Launch Write without response */
- mode: 2, /* Widget operation Mode */
- rsvd2: 2,
- bnakctr: 14,
- rsvd3: 2,
- anakctr: 14,
- xtalkctr: 8;
- } iprb_fields_s;
-} iprb_t;
-
-#define iprb_regval reg_value
-
-#define iprb_error iprb_fields_s.error
-#define iprb_ovflow iprb_fields_s.ovflow
-#define iprb_ff iprb_fields_s.fire_and_forget
-#define iprb_mode iprb_fields_s.mode
-#define iprb_bnakctr iprb_fields_s.bnakctr
-#define iprb_anakctr iprb_fields_s.anakctr
-#define iprb_xtalkctr iprb_fields_s.xtalkctr
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * values for mode field in iprb_t.
- * For details of the meanings of NAK and Accept, refer the PIO flow
- * document
- */
-#define IPRB_MODE_NORMAL (0)
-#define IPRB_MODE_COLLECT_A (1) /* PRB in collect A mode */
-#define IPRB_MODE_SERVICE_A (2) /* NAK B and Accept A */
-#define IPRB_MODE_SERVICE_B (3) /* NAK A and Accept B */
-
-/*
- * IO CRB entry C_A to E_A : Partial (cache) CRBS
- */
-#ifndef __ASSEMBLY__
-typedef union icrbp_a {
- u64 ip_reg; /* the entire register value */
- struct {
- u64 error: 1, /* 63, error occurred */
- ln_uce: 1, /* 62: uncorrectable memory */
- ln_ae: 1, /* 61: protection violation */
- ln_werr:1, /* 60: write access error */
- ln_aerr:1, /* 59: sn0net: Address error */
- ln_perr:1, /* 58: sn0net: poison error */
- timeout:1, /* 57: CRB timed out */
- l_bdpkt:1, /* 56: truncated pkt on sn0net */
- c_bdpkt:1, /* 55: truncated pkt on xtalk */
- c_err: 1, /* 54: incoming xtalk req, err set*/
- rsvd1: 12, /* 53-42: reserved */
- valid: 1, /* 41: Valid status */
- sidn: 4, /* 40-37: SIDN field of xtalk rqst */
- tnum: 5, /* 36-32: TNUM of xtalk request */
- bo: 1, /* 31: barrier op set in xtalk rqst*/
- resprqd:1, /* 30: xtalk rqst requires response*/
- gbr: 1, /* 29: gbr bit set in xtalk rqst */
- size: 2, /* 28-27: size of xtalk request */
- excl: 4, /* 26-23: exclusive bit(s) */
- stall: 3, /* 22-20: stall (xtalk, bte 0/1) */
- intvn: 1, /* 19: rqst target of intervention*/
- resp: 1, /* 18: Data response given to t5 */
- ack: 1, /* 17: Data ack received. */
- hold: 1, /* 16: crb gathering invalidate acks*/
- wb: 1, /* 15: writeback pending. */
- ack_cnt:11, /* 14-04: counter of invalidate acks*/
- tscaler:4; /* 03-00: Timeout prescaler */
- } ip_fmt;
-} icrbp_a_t;
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * A couple of defines to go with the above structure.
- */
-#define ICRBP_A_CERR_SHFT 54
-#define ICRBP_A_ERR_MASK 0x3ff
-
-#ifndef __ASSEMBLY__
-typedef union hubii_idsr {
- u64 iin_reg;
- struct {
- u64 rsvd1 : 35,
- isent : 1,
- rsvd2 : 3,
- ienable: 1,
- rsvd : 7,
- node : 9,
- rsvd4 : 1,
- level : 7;
- } iin_fmt;
-} hubii_idsr_t;
-#endif /* !__ASSEMBLY__ */
-
-/*
- * IO BTE Length/Status (IIO_IBLS) register bit field definitions
- */
-#define IBLS_BUSY (0x1 << 20)
-#define IBLS_ERROR_SHFT 16
-#define IBLS_ERROR (0x1 << IBLS_ERROR_SHFT)
-#define IBLS_LENGTH_MASK 0xffff
-
-/*
- * IO BTE Control/Terminate register (IBCT) register bit field definitions
- */
-#define IBCT_POISON (0x1 << 8)
-#define IBCT_NOTIFY (0x1 << 4)
-#define IBCT_ZFIL_MODE (0x1 << 0)
-
-/*
- * IO BTE Interrupt Address Register (IBIA) register bit field definitions
- */
-#define IBIA_LEVEL_SHFT 16
-#define IBIA_LEVEL_MASK (0x7f << IBIA_LEVEL_SHFT)
-#define IBIA_NODE_ID_SHFT 0
-#define IBIA_NODE_ID_MASK (0x1ff)
-
-/*
- * Miscellaneous hub constants
- */
-
-/* Number of widgets supported by hub */
-#define HUB_NUM_WIDGET 9
-#define HUB_WIDGET_ID_MIN 0x8
-#define HUB_WIDGET_ID_MAX 0xf
-
-#define HUB_WIDGET_PART_NUM 0xc101
-#define MAX_HUBS_PER_XBOW 2
-
-/*
- * Get a hub's widget id from widget control register
- */
-#define IIO_WCR_WID_GET(nasid) (REMOTE_HUB_L(nasid, III_WCR) & 0xf)
-#define IIO_WST_ERROR_MASK (UINT64_CAST 1 << 32) /* Widget status error */
-
-/*
- * Number of credits Hub widget has while sending req/response to
- * xbow.
- * Value of 3 is required by Xbow 1.1
- * We may be able to increase this to 4 with Xbow 1.2.
- */
-#define HUBII_XBOW_CREDIT 3
-#define HUBII_XBOW_REV2_CREDIT 4
-
-#endif /* _ASM_SGI_SN_SN0_HUBIO_H */
diff -Nru a/include/asm-mips64/sn/sn0/hubmd.h b/include/asm-mips64/sn/sn0/hubmd.h
--- a/include/asm-mips64/sn/sn0/hubmd.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,790 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/hubmd.h>, revision 1.59.
- *
- * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SN_SN0_HUBMD_H
-#define _ASM_SN_SN0_HUBMD_H
-
-#include <linux/config.h>
-
-/*
- * Hub Memory/Directory interface registers
- */
-#define CACHE_SLINE_SIZE 128 /* Secondary cache line size on SN0 */
-
-#define MAX_REGIONS 64
-
-/* Hardware page size and shift */
-
-#define MD_PAGE_SIZE 4096 /* Page size in bytes */
-#define MD_PAGE_NUM_SHFT 12 /* Address to page number shift */
-
-/* Register offsets from LOCAL_HUB or REMOTE_HUB */
-
-#define MD_BASE 0x200000
-#define MD_BASE_PERF 0x210000
-#define MD_BASE_JUNK 0x220000
-
-#define MD_IO_PROTECT 0x200000 /* MD and core register protection */
-#define MD_IO_PROT_OVRRD 0x200008 /* Clear my bit in MD_IO_PROTECT */
-#define MD_HSPEC_PROTECT 0x200010 /* BDDIR, LBOOT, RBOOT protection */
-#define MD_MEMORY_CONFIG 0x200018 /* Memory/Directory DIMM control */
-#define MD_REFRESH_CONTROL 0x200020 /* Memory/Directory refresh ctrl */
-#define MD_FANDOP_CAC_STAT 0x200028 /* Fetch-and-op cache status */
-#define MD_MIG_DIFF_THRESH 0x200030 /* Page migr. count diff thresh. */
-#define MD_MIG_VALUE_THRESH 0x200038 /* Page migr. count abs. thresh. */
-#define MD_MIG_CANDIDATE 0x200040 /* Latest page migration candidate */
-#define MD_MIG_CANDIDATE_CLR 0x200048 /* Clear page migration candidate */
-#define MD_DIR_ERROR 0x200050 /* Directory DIMM error */
-#define MD_DIR_ERROR_CLR 0x200058 /* Directory DIMM error clear */
-#define MD_PROTOCOL_ERROR 0x200060 /* Directory protocol error */
-#define MD_PROTOCOL_ERROR_CLR 0x200068 /* Directory protocol error clear */
-#define MD_MEM_ERROR 0x200070 /* Memory DIMM error */
-#define MD_MEM_ERROR_CLR 0x200078 /* Memory DIMM error clear */
-#define MD_MISC_ERROR 0x200080 /* Miscellaneous MD error */
-#define MD_MISC_ERROR_CLR 0x200088 /* Miscellaneous MD error clear */
-#define MD_MEM_DIMM_INIT 0x200090 /* Memory DIMM mode initization. */
-#define MD_DIR_DIMM_INIT 0x200098 /* Directory DIMM mode init. */
-#define MD_MOQ_SIZE 0x2000a0 /* MD outgoing queue size */
-#define MD_MLAN_CTL 0x2000a8 /* NIC (Microlan) control register */
-
-#define MD_PERF_SEL 0x210000 /* Select perf monitor events */
-#define MD_PERF_CNT0 0x210010 /* Performance counter 0 */
-#define MD_PERF_CNT1 0x210018 /* Performance counter 1 */
-#define MD_PERF_CNT2 0x210020 /* Performance counter 2 */
-#define MD_PERF_CNT3 0x210028 /* Performance counter 3 */
-#define MD_PERF_CNT4 0x210030 /* Performance counter 4 */
-#define MD_PERF_CNT5 0x210038 /* Performance counter 5 */
-
-#define MD_UREG0_0 0x220000 /* uController/UART 0 register */
-#define MD_UREG0_1 0x220008 /* uController/UART 0 register */
-#define MD_UREG0_2 0x220010 /* uController/UART 0 register */
-#define MD_UREG0_3 0x220018 /* uController/UART 0 register */
-#define MD_UREG0_4 0x220020 /* uController/UART 0 register */
-#define MD_UREG0_5 0x220028 /* uController/UART 0 register */
-#define MD_UREG0_6 0x220030 /* uController/UART 0 register */
-#define MD_UREG0_7 0x220038 /* uController/UART 0 register */
-
-#define MD_SLOTID_USTAT 0x220048 /* Hub slot ID & UART/uCtlr status */
-#define MD_LED0 0x220050 /* Eight-bit LED for CPU A */
-#define MD_LED1 0x220058 /* Eight-bit LED for CPU B */
-
-#define MD_UREG1_0 0x220080 /* uController/UART 1 register */
-#define MD_UREG1_1 0x220088 /* uController/UART 1 register */
-#define MD_UREG1_2 0x220090 /* uController/UART 1 register */
-#define MD_UREG1_3 0x220098 /* uController/UART 1 register */
-#define MD_UREG1_4 0x2200a0 /* uController/UART 1 register */
-#define MD_UREG1_5 0x2200a8 /* uController/UART 1 register */
-#define MD_UREG1_6 0x2200b0 /* uController/UART 1 register */
-#define MD_UREG1_7 0x2200b8 /* uController/UART 1 register */
-#define MD_UREG1_8 0x2200c0 /* uController/UART 1 register */
-#define MD_UREG1_9 0x2200c8 /* uController/UART 1 register */
-#define MD_UREG1_10 0x2200d0 /* uController/UART 1 register */
-#define MD_UREG1_11 0x2200d8 /* uController/UART 1 register */
-#define MD_UREG1_12 0x2200e0 /* uController/UART 1 register */
-#define MD_UREG1_13 0x2200e8 /* uController/UART 1 register */
-#define MD_UREG1_14 0x2200f0 /* uController/UART 1 register */
-#define MD_UREG1_15 0x2200f8 /* uController/UART 1 register */
-
-#ifdef CONFIG_SGI_SN0_N_MODE
-#define MD_MEM_BANKS 4 /* 4 banks of memory max in N mode */
-#else
-#define MD_MEM_BANKS 8 /* 8 banks of memory max in M mode */
-#endif
-
-/*
- * MD_MEMORY_CONFIG fields
- *
- * MD_SIZE_xxx are useful for representing the size of a SIMM or bank
- * (SIMM pair). They correspond to the values needed for the bit
- * triplets (MMC_BANK_MASK) in the MD_MEMORY_CONFIG register for bank size.
- * Bits not used by the MD are used by software.
- */
-
-#define MD_SIZE_EMPTY 0 /* Valid in MEMORY_CONFIG */
-#define MD_SIZE_8MB 1
-#define MD_SIZE_16MB 2
-#define MD_SIZE_32MB 3 /* Broken in Hub 1 */
-#define MD_SIZE_64MB 4 /* Valid in MEMORY_CONFIG */
-#define MD_SIZE_128MB 5 /* Valid in MEMORY_CONFIG */
-#define MD_SIZE_256MB 6
-#define MD_SIZE_512MB 7 /* Valid in MEMORY_CONFIG */
-#define MD_SIZE_1GB 8
-#define MD_SIZE_2GB 9
-#define MD_SIZE_4GB 10
-
-#define MD_SIZE_BYTES(size) ((size) == 0 ? 0 : 0x400000L << (size))
-#define MD_SIZE_MBYTES(size) ((size) == 0 ? 0 : 4 << (size))
-
-#define MMC_FPROM_CYC_SHFT 49 /* Have to use UINT64_CAST, instead */
-#define MMC_FPROM_CYC_MASK (UINT64_CAST 31 << 49) /* of 'L' suffix, */
-#define MMC_FPROM_WR_SHFT 44 /* for assembler */
-#define MMC_FPROM_WR_MASK (UINT64_CAST 31 << 44)
-#define MMC_UCTLR_CYC_SHFT 39
-#define MMC_UCTLR_CYC_MASK (UINT64_CAST 31 << 39)
-#define MMC_UCTLR_WR_SHFT 34
-#define MMC_UCTLR_WR_MASK (UINT64_CAST 31 << 34)
-#define MMC_DIMM0_SEL_SHFT 32
-#define MMC_DIMM0_SEL_MASK (UINT64_CAST 3 << 32)
-#define MMC_IO_PROT_EN_SHFT 31
-#define MMC_IO_PROT_EN_MASK (UINT64_CAST 1 << 31)
-#define MMC_IO_PROT (UINT64_CAST 1 << 31)
-#define MMC_ARB_MLSS_SHFT 30
-#define MMC_ARB_MLSS_MASK (UINT64_CAST 1 << 30)
-#define MMC_ARB_MLSS (UINT64_CAST 1 << 30)
-#define MMC_IGNORE_ECC_SHFT 29
-#define MMC_IGNORE_ECC_MASK (UINT64_CAST 1 << 29)
-#define MMC_IGNORE_ECC (UINT64_CAST 1 << 29)
-#define MMC_DIR_PREMIUM_SHFT 28
-#define MMC_DIR_PREMIUM_MASK (UINT64_CAST 1 << 28)
-#define MMC_DIR_PREMIUM (UINT64_CAST 1 << 28)
-#define MMC_REPLY_GUAR_SHFT 24
-#define MMC_REPLY_GUAR_MASK (UINT64_CAST 15 << 24)
-#define MMC_BANK_SHFT(_b) ((_b) * 3)
-#define MMC_BANK_MASK(_b) (UINT64_CAST 7 << MMC_BANK_SHFT(_b))
-#define MMC_BANK_ALL_MASK 0xffffff
-#define MMC_RESET_DEFAULTS (UINT64_CAST 0x0f << MMC_FPROM_CYC_SHFT | \
- UINT64_CAST 0x07 << MMC_FPROM_WR_SHFT | \
- UINT64_CAST 0x1f << MMC_UCTLR_CYC_SHFT | \
- UINT64_CAST 0x0f << MMC_UCTLR_WR_SHFT | \
- MMC_IGNORE_ECC | MMC_DIR_PREMIUM | \
- UINT64_CAST 0x0f << MMC_REPLY_GUAR_SHFT | \
- MMC_BANK_ALL_MASK)
-
-/* MD_REFRESH_CONTROL fields */
-
-#define MRC_ENABLE_SHFT 63
-#define MRC_ENABLE_MASK (UINT64_CAST 1 << 63)
-#define MRC_ENABLE (UINT64_CAST 1 << 63)
-#define MRC_COUNTER_SHFT 12
-#define MRC_COUNTER_MASK (UINT64_CAST 0xfff << 12)
-#define MRC_CNT_THRESH_MASK 0xfff
-#define MRC_RESET_DEFAULTS (UINT64_CAST 0x400)
-
-/* MD_MEM_DIMM_INIT and MD_DIR_DIMM_INIT fields */
-
-#define MDI_SELECT_SHFT 32
-#define MDI_SELECT_MASK (UINT64_CAST 0x0f << 32)
-#define MDI_DIMM_MODE_MASK (UINT64_CAST 0xfff)
-
-/* MD_MOQ_SIZE fields */
-
-#define MMS_RP_SIZE_SHFT 8
-#define MMS_RP_SIZE_MASK (UINT64_CAST 0x3f << 8)
-#define MMS_RQ_SIZE_SHFT 0
-#define MMS_RQ_SIZE_MASK (UINT64_CAST 0x1f)
-#define MMS_RESET_DEFAULTS (0x32 << 8 | 0x12)
-
-/* MD_FANDOP_CAC_STAT fields */
-
-#define MFC_VALID_SHFT 63
-#define MFC_VALID_MASK (UINT64_CAST 1 << 63)
-#define MFC_VALID (UINT64_CAST 1 << 63)
-#define MFC_ADDR_SHFT 6
-#define MFC_ADDR_MASK (UINT64_CAST 0x3ffffff)
-
-/* MD_MLAN_CTL fields */
-
-#define MLAN_PHI1_SHFT 27
-#define MLAN_PHI1_MASK (UINT64_CAST 0x7f << 27)
-#define MLAN_PHI0_SHFT 20
-#define MLAN_PHI0_MASK (UINT64_CAST 0x7f << 27)
-#define MLAN_PULSE_SHFT 10
-#define MLAN_PULSE_MASK (UINT64_CAST 0x3ff << 10)
-#define MLAN_SAMPLE_SHFT 2
-#define MLAN_SAMPLE_MASK (UINT64_CAST 0xff << 2)
-#define MLAN_DONE_SHFT 1
-#define MLAN_DONE_MASK 2
-#define MLAN_DONE (UINT64_CAST 0x02)
-#define MLAN_RD_DATA (UINT64_CAST 0x01)
-#define MLAN_RESET_DEFAULTS (UINT64_CAST 0x31 << MLAN_PHI1_SHFT | \
- UINT64_CAST 0x31 << MLAN_PHI0_SHFT)
-
-/* MD_SLOTID_USTAT bit definitions */
-
-#define MSU_CORECLK_TST_SHFT 7 /* You don't wanna know */
-#define MSU_CORECLK_TST_MASK (UINT64_CAST 1 << 7)
-#define MSU_CORECLK_TST (UINT64_CAST 1 << 7)
-#define MSU_CORECLK_SHFT 6 /* You don't wanna know */
-#define MSU_CORECLK_MASK (UINT64_CAST 1 << 6)
-#define MSU_CORECLK (UINT64_CAST 1 << 6)
-#define MSU_NETSYNC_SHFT 5 /* You don't wanna know */
-#define MSU_NETSYNC_MASK (UINT64_CAST 1 << 5)
-#define MSU_NETSYNC (UINT64_CAST 1 << 5)
-#define MSU_FPROMRDY_SHFT 4 /* Flash PROM ready bit */
-#define MSU_FPROMRDY_MASK (UINT64_CAST 1 << 4)
-#define MSU_FPROMRDY (UINT64_CAST 1 << 4)
-#define MSU_I2CINTR_SHFT 3 /* I2C interrupt bit */
-#define MSU_I2CINTR_MASK (UINT64_CAST 1 << 3)
-#define MSU_I2CINTR (UINT64_CAST 1 << 3)
-#define MSU_SLOTID_MASK 0xff
-#define MSU_SN0_SLOTID_SHFT 0 /* Slot ID */
-#define MSU_SN0_SLOTID_MASK (UINT64_CAST 7)
-#define MSU_SN00_SLOTID_SHFT 7
-#define MSU_SN00_SLOTID_MASK (UINT64_CAST 0x80)
-
-#define MSU_PIMM_PSC_SHFT 4
-#define MSU_PIMM_PSC_MASK (0xf << MSU_PIMM_PSC_SHFT)
-
-/* MD_MIG_DIFF_THRESH bit definitions */
-
-#define MD_MIG_DIFF_THRES_VALID_MASK (UINT64_CAST 0x1 << 63)
-#define MD_MIG_DIFF_THRES_VALID_SHFT 63
-#define MD_MIG_DIFF_THRES_VALUE_MASK (UINT64_CAST 0xfffff)
-
-/* MD_MIG_VALUE_THRESH bit definitions */
-
-#define MD_MIG_VALUE_THRES_VALID_MASK (UINT64_CAST 0x1 << 63)
-#define MD_MIG_VALUE_THRES_VALID_SHFT 63
-#define MD_MIG_VALUE_THRES_VALUE_MASK (UINT64_CAST 0xfffff)
-
-/* MD_MIG_CANDIDATE bit definitions */
-
-#define MD_MIG_CANDIDATE_VALID_MASK (UINT64_CAST 0x1 << 63)
-#define MD_MIG_CANDIDATE_VALID_SHFT 63
-#define MD_MIG_CANDIDATE_TYPE_MASK (UINT64_CAST 0x1 << 30)
-#define MD_MIG_CANDIDATE_TYPE_SHFT 30
-#define MD_MIG_CANDIDATE_OVERRUN_MASK (UINT64_CAST 0x1 << 29)
-#define MD_MIG_CANDIDATE_OVERRUN_SHFT 29
-#define MD_MIG_CANDIDATE_INITIATOR_MASK (UINT64_CAST 0x7ff << 18)
-#define MD_MIG_CANDIDATE_INITIATOR_SHFT 18
-#define MD_MIG_CANDIDATE_NODEID_MASK (UINT64_CAST 0x1ff << 20)
-#define MD_MIG_CANDIDATE_NODEID_SHFT 20
-#define MD_MIG_CANDIDATE_ADDR_MASK (UINT64_CAST 0x3ffff)
-#define MD_MIG_CANDIDATE_ADDR_SHFT 14 /* The address starts at bit 14 */
-
-/* Other MD definitions */
-
-#define MD_BANK_SHFT 29 /* log2(512 MB) */
-#define MD_BANK_MASK (UINT64_CAST 7 << 29)
-#define MD_BANK_SIZE (UINT64_CAST 1 << MD_BANK_SHFT) /* 512 MB */
-#define MD_BANK_OFFSET(_b) (UINT64_CAST (_b) << MD_BANK_SHFT)
-
-/*
- * The following definitions cover the bit field definitions for the
- * various MD registers. For multi-bit registers, we define both
- * a shift amount and a mask value. By convention, if you want to
- * isolate a field, you should mask the field and then shift it down,
- * since this makes the masks useful without a shift.
- */
-
-/* Directory entry states for both premium and standard SIMMs. */
-
-#define MD_DIR_SHARED (UINT64_CAST 0x0) /* 000 */
-#define MD_DIR_POISONED (UINT64_CAST 0x1) /* 001 */
-#define MD_DIR_EXCLUSIVE (UINT64_CAST 0x2) /* 010 */
-#define MD_DIR_BUSY_SHARED (UINT64_CAST 0x3) /* 011 */
-#define MD_DIR_BUSY_EXCL (UINT64_CAST 0x4) /* 100 */
-#define MD_DIR_WAIT (UINT64_CAST 0x5) /* 101 */
-#define MD_DIR_UNOWNED (UINT64_CAST 0x7) /* 111 */
-
-/*
- * The MD_DIR_FORCE_ECC bit can be added directory entry write data
- * to forcing the ECC to be written as-is instead of recalculated.
- */
-
-#define MD_DIR_FORCE_ECC (UINT64_CAST 1 << 63)
-
-/*
- * Premium SIMM directory entry shifts and masks. Each is valid only in the
- * context(s) indicated, where A, B, and C indicate the directory entry format
- * as shown, and low and/or high indicates which double-word of the entry.
- *
- * Format A: STATE = shared, FINE = 1
- * Format B: STATE = shared, FINE = 0
- * Format C: STATE != shared (FINE must be 0)
- */
-
-#define MD_PDIR_MASK 0xffffffffffff /* Whole entry */
-#define MD_PDIR_ECC_SHFT 0 /* ABC low or high */
-#define MD_PDIR_ECC_MASK 0x7f
-#define MD_PDIR_PRIO_SHFT 8 /* ABC low */
-#define MD_PDIR_PRIO_MASK (0xf << 8)
-#define MD_PDIR_AX_SHFT 7 /* ABC low */
-#define MD_PDIR_AX_MASK (1 << 7)
-#define MD_PDIR_AX (1 << 7)
-#define MD_PDIR_FINE_SHFT 12 /* ABC low */
-#define MD_PDIR_FINE_MASK (1 << 12)
-#define MD_PDIR_FINE (1 << 12)
-#define MD_PDIR_OCT_SHFT 13 /* A low */
-#define MD_PDIR_OCT_MASK (7 << 13)
-#define MD_PDIR_STATE_SHFT 13 /* BC low */
-#define MD_PDIR_STATE_MASK (7 << 13)
-#define MD_PDIR_ONECNT_SHFT 16 /* BC low */
-#define MD_PDIR_ONECNT_MASK (0x3f << 16)
-#define MD_PDIR_PTR_SHFT 22 /* C low */
-#define MD_PDIR_PTR_MASK (UINT64_CAST 0x7ff << 22)
-#define MD_PDIR_VECMSB_SHFT 22 /* AB low */
-#define MD_PDIR_VECMSB_BITMASK 0x3ffffff
-#define MD_PDIR_VECMSB_BITSHFT 27
-#define MD_PDIR_VECMSB_MASK (UINT64_CAST MD_PDIR_VECMSB_BITMASK << 22)
-#define MD_PDIR_CWOFF_SHFT 7 /* C high */
-#define MD_PDIR_CWOFF_MASK (7 << 7)
-#define MD_PDIR_VECLSB_SHFT 10 /* AB high */
-#define MD_PDIR_VECLSB_BITMASK (UINT64_CAST 0x3fffffffff)
-#define MD_PDIR_VECLSB_BITSHFT 0
-#define MD_PDIR_VECLSB_MASK (MD_PDIR_VECLSB_BITMASK << 10)
-
-/*
- * Directory initialization values
- */
-
-#define MD_PDIR_INIT_LO (MD_DIR_UNOWNED << MD_PDIR_STATE_SHFT | \
- MD_PDIR_AX)
-#define MD_PDIR_INIT_HI 0
-#define MD_PDIR_INIT_PROT (MD_PROT_RW << MD_PPROT_IO_SHFT | \
- MD_PROT_RW << MD_PPROT_SHFT)
-
-/*
- * Standard SIMM directory entry shifts and masks. Each is valid only in the
- * context(s) indicated, where A and C indicate the directory entry format
- * as shown, and low and/or high indicates which double-word of the entry.
- *
- * Format A: STATE == shared
- * Format C: STATE != shared
- */
-
-#define MD_SDIR_MASK 0xffff /* Whole entry */
-#define MD_SDIR_ECC_SHFT 0 /* AC low or high */
-#define MD_SDIR_ECC_MASK 0x1f
-#define MD_SDIR_PRIO_SHFT 6 /* AC low */
-#define MD_SDIR_PRIO_MASK (1 << 6)
-#define MD_SDIR_AX_SHFT 5 /* AC low */
-#define MD_SDIR_AX_MASK (1 << 5)
-#define MD_SDIR_AX (1 << 5)
-#define MD_SDIR_STATE_SHFT 7 /* AC low */
-#define MD_SDIR_STATE_MASK (7 << 7)
-#define MD_SDIR_PTR_SHFT 10 /* C low */
-#define MD_SDIR_PTR_MASK (0x3f << 10)
-#define MD_SDIR_CWOFF_SHFT 5 /* C high */
-#define MD_SDIR_CWOFF_MASK (7 << 5)
-#define MD_SDIR_VECMSB_SHFT 11 /* A low */
-#define MD_SDIR_VECMSB_BITMASK 0x1f
-#define MD_SDIR_VECMSB_BITSHFT 7
-#define MD_SDIR_VECMSB_MASK (MD_SDIR_VECMSB_BITMASK << 11)
-#define MD_SDIR_VECLSB_SHFT 5 /* A high */
-#define MD_SDIR_VECLSB_BITMASK 0x7ff
-#define MD_SDIR_VECLSB_BITSHFT 0
-#define MD_SDIR_VECLSB_MASK (MD_SDIR_VECLSB_BITMASK << 5)
-
-/*
- * Directory initialization values
- */
-
-#define MD_SDIR_INIT_LO (MD_DIR_UNOWNED << MD_SDIR_STATE_SHFT | \
- MD_SDIR_AX)
-#define MD_SDIR_INIT_HI 0
-#define MD_SDIR_INIT_PROT (MD_PROT_RW << MD_SPROT_SHFT)
-
-/* Protection and migration field values */
-
-#define MD_PROT_RW (UINT64_CAST 0x6)
-#define MD_PROT_RO (UINT64_CAST 0x3)
-#define MD_PROT_NO (UINT64_CAST 0x0)
-#define MD_PROT_BAD (UINT64_CAST 0x5)
-
-/* Premium SIMM protection entry shifts and masks. */
-
-#define MD_PPROT_SHFT 0 /* Prot. field */
-#define MD_PPROT_MASK 7
-#define MD_PPROT_MIGMD_SHFT 3 /* Migration mode */
-#define MD_PPROT_MIGMD_MASK (3 << 3)
-#define MD_PPROT_REFCNT_SHFT 5 /* Reference count */
-#define MD_PPROT_REFCNT_WIDTH 0x7ffff
-#define MD_PPROT_REFCNT_MASK (MD_PPROT_REFCNT_WIDTH << 5)
-
-#define MD_PPROT_IO_SHFT 45 /* I/O Prot field */
-#define MD_PPROT_IO_MASK (UINT64_CAST 7 << 45)
-
-/* Standard SIMM protection entry shifts and masks. */
-
-#define MD_SPROT_SHFT 0 /* Prot. field */
-#define MD_SPROT_MASK 7
-#define MD_SPROT_MIGMD_SHFT 3 /* Migration mode */
-#define MD_SPROT_MIGMD_MASK (3 << 3)
-#define MD_SPROT_REFCNT_SHFT 5 /* Reference count */
-#define MD_SPROT_REFCNT_WIDTH 0x7ff
-#define MD_SPROT_REFCNT_MASK (MD_SPROT_REFCNT_WIDTH << 5)
-
-/* Migration modes used in protection entries */
-
-#define MD_PROT_MIGMD_IREL (UINT64_CAST 0x3 << 3)
-#define MD_PROT_MIGMD_IABS (UINT64_CAST 0x2 << 3)
-#define MD_PROT_MIGMD_PREL (UINT64_CAST 0x1 << 3)
-#define MD_PROT_MIGMD_OFF (UINT64_CAST 0x0 << 3)
-
-
-/*
- * Operations on page migration threshold register
- */
-
-#ifndef __ASSEMBLY__
-
-/*
- * LED register macros
- */
-
-#define CPU_LED_ADDR(_nasid, _slice) \
- (private.p_sn00 ? \
- REMOTE_HUB_ADDR((_nasid), MD_UREG1_0 + ((_slice) << 5)) : \
- REMOTE_HUB_ADDR((_nasid), MD_LED0 + ((_slice) << 3)))
-
-#define SET_CPU_LEDS(_nasid, _slice, _val) \
- (HUB_S(CPU_LED_ADDR(_nasid, _slice), (_val)))
-
-#define SET_MY_LEDS(_v) \
- SET_CPU_LEDS(get_nasid(), get_slice(), (_v))
-
-/*
- * Operations on Memory/Directory DIMM control register
- */
-
-#define DIRTYPE_PREMIUM 1
-#define DIRTYPE_STANDARD 0
-#define MD_MEMORY_CONFIG_DIR_TYPE_GET(region) (\
- (REMOTE_HUB_L(region, MD_MEMORY_CONFIG) & MMC_DIR_PREMIUM_MASK) >> \
- MMC_DIR_PREMIUM_SHFT)
-
-
-/*
- * Operations on page migration count difference and absolute threshold
- * registers
- */
-
-#define MD_MIG_DIFF_THRESH_GET(region) ( \
- REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & \
- MD_MIG_DIFF_THRES_VALUE_MASK)
-
-#define MD_MIG_DIFF_THRESH_SET(region, value) ( \
- REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, \
- MD_MIG_DIFF_THRES_VALID_MASK | (value)))
-
-#define MD_MIG_DIFF_THRESH_DISABLE(region) ( \
- REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, \
- REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) \
- & ~MD_MIG_DIFF_THRES_VALID_MASK))
-
-#define MD_MIG_DIFF_THRESH_ENABLE(region) ( \
- REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, \
- REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) \
- | MD_MIG_DIFF_THRES_VALID_MASK))
-
-#define MD_MIG_DIFF_THRESH_IS_ENABLED(region) ( \
- REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & \
- MD_MIG_DIFF_THRES_VALID_MASK)
-
-#define MD_MIG_VALUE_THRESH_GET(region) ( \
- REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & \
- MD_MIG_VALUE_THRES_VALUE_MASK)
-
-#define MD_MIG_VALUE_THRESH_SET(region, value) ( \
- REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, \
- MD_MIG_VALUE_THRES_VALID_MASK | (value)))
-
-#define MD_MIG_VALUE_THRESH_DISABLE(region) ( \
- REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, \
- REMOTE_HUB_L(region, MD_MIG_VALUE_THRESH) \
- & ~MD_MIG_VALUE_THRES_VALID_MASK))
-
-#define MD_MIG_VALUE_THRESH_ENABLE(region) ( \
- REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, \
- REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) \
- | MD_MIG_VALUE_THRES_VALID_MASK))
-
-#define MD_MIG_VALUE_THRESH_IS_ENABLED(region) ( \
- REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & \
- MD_MIG_VALUE_THRES_VALID_MASK)
-
-/*
- * Operations on page migration candidate register
- */
-
-#define MD_MIG_CANDIDATE_GET(my_region_id) ( \
- REMOTE_HUB_L((my_region_id), MD_MIG_CANDIDATE_CLR))
-
-#define MD_MIG_CANDIDATE_HWPFN(value) ((value) & MD_MIG_CANDIDATE_ADDR_MASK)
-
-#define MD_MIG_CANDIDATE_NODEID(value) ( \
- ((value) & MD_MIG_CANDIDATE_NODEID_MASK) >> MD_MIG_CANDIDATE_NODEID_SHFT)
-
-#define MD_MIG_CANDIDATE_TYPE(value) ( \
- ((value) & MD_MIG_CANDIDATE_TYPE_MASK) >> MD_MIG_CANDIDATE_TYPE_SHFT)
-
-#define MD_MIG_CANDIDATE_VALID(value) ( \
- ((value) & MD_MIG_CANDIDATE_VALID_MASK) >> MD_MIG_CANDIDATE_VALID_SHFT)
-
-/*
- * Macros to retrieve fields in the protection entry
- */
-
-/* for Premium SIMM */
-#define MD_PPROT_REFCNT_GET(value) ( \
- ((value) & MD_PPROT_REFCNT_MASK) >> MD_PPROT_REFCNT_SHFT)
-
-#define MD_PPROT_MIGMD_GET(value) ( \
- ((value) & MD_PPROT_MIGMD_MASK) >> MD_PPROT_MIGMD_SHFT)
-
-/* for Standard SIMM */
-#define MD_SPROT_REFCNT_GET(value) ( \
- ((value) & MD_SPROT_REFCNT_MASK) >> MD_SPROT_REFCNT_SHFT)
-
-#define MD_SPROT_MIGMD_GET(value) ( \
- ((value) & MD_SPROT_MIGMD_MASK) >> MD_SPROT_MIGMD_SHFT)
-
-/*
- * Format of dir_error, mem_error, protocol_error and misc_error registers
- */
-
-struct dir_error_reg {
- u64 uce_vld: 1, /* 63: valid directory uce */
- ae_vld: 1, /* 62: valid dir prot ecc error */
- ce_vld: 1, /* 61: valid correctable ECC err*/
- rsvd1: 19, /* 60-42: reserved */
- bad_prot: 3, /* 41-39: encoding, bad access rights*/
- bad_syn: 7, /* 38-32: bad dir syndrome */
- rsvd2: 2, /* 31-30: reserved */
- hspec_addr:27, /* 29-03: bddir space bad entry */
- uce_ovr: 1, /* 2: multiple dir uce's */
- ae_ovr: 1, /* 1: multiple prot ecc errs*/
- ce_ovr: 1; /* 0: multiple correctable errs */
-};
-
-typedef union md_dir_error {
- u64 derr_reg; /* the entire register */
- struct dir_error_reg derr_fmt; /* the register format */
-} md_dir_error_t;
-
-
-struct mem_error_reg {
- u64 uce_vld: 1, /* 63: valid memory uce */
- ce_vld: 1, /* 62: valid correctable ECC err*/
- rsvd1: 22, /* 61-40: reserved */
- bad_syn: 8, /* 39-32: bad mem ecc syndrome */
- address: 29, /* 31-03: bad entry pointer */
- rsvd2: 1, /* 2: reserved */
- uce_ovr: 1, /* 1: multiple mem uce's */
- ce_ovr: 1; /* 0: multiple correctable errs */
-};
-
-
-typedef union md_mem_error {
- u64 merr_reg; /* the entire register */
- struct mem_error_reg merr_fmt; /* format of the mem_error reg */
-} md_mem_error_t;
-
-
-struct proto_error_reg {
- u64 valid: 1, /* 63: valid protocol error */
- rsvd1: 2, /* 62-61: reserved */
- initiator:11, /* 60-50: id of request initiator*/
- backoff: 2, /* 49-48: backoff control */
- msg_type: 8, /* 47-40: type of request */
- access: 2, /* 39-38: access rights of initiator*/
- priority: 1, /* 37: priority level of requestor*/
- dir_state: 4, /* 36-33: state of directory */
- pointer_me:1, /* 32: initiator same as dir ptr */
- address: 29, /* 31-03: request address */
- rsvd2: 2, /* 02-01: reserved */
- overrun: 1; /* 0: multiple protocol errs */
-};
-
-typedef union md_proto_error {
- u64 perr_reg; /* the entire register */
- struct proto_error_reg perr_fmt; /* format of the register */
-} md_proto_error_t;
-
-
-struct md_sdir_high_fmt {
- unsigned short sd_hi_bvec : 11,
- sd_hi_ecc : 5;
-};
-
-
-typedef union md_sdir_high {
- /* The 16 bits of standard directory, upper word */
- unsigned short sd_hi_val;
- struct md_sdir_high_fmt sd_hi_fmt;
-}md_sdir_high_t;
-
-
-struct md_sdir_low_shared_fmt {
- /* The meaning of lower directory, shared */
- unsigned short sds_lo_bvec : 5,
- sds_lo_unused: 1,
- sds_lo_state : 3,
- sds_lo_prio : 1,
- sds_lo_ax : 1,
- sds_lo_ecc : 5;
-};
-
-struct md_sdir_low_exclusive_fmt {
- /* The meaning of lower directory, exclusive */
- unsigned short sde_lo_ptr : 6,
- sde_lo_state : 3,
- sde_lo_prio : 1,
- sde_lo_ax : 1,
- sde_lo_ecc : 5;
-};
-
-
-typedef union md_sdir_low {
- /* The 16 bits of standard directory, lower word */
- unsigned short sd_lo_val;
- struct md_sdir_low_exclusive_fmt sde_lo_fmt;
- struct md_sdir_low_shared_fmt sds_lo_fmt;
-}md_sdir_low_t;
-
-
-
-struct md_pdir_high_fmt {
- u64 pd_hi_unused : 16,
- pd_hi_bvec : 38,
- pd_hi_unused1 : 3,
- pd_hi_ecc : 7;
-};
-
-
-typedef union md_pdir_high {
- /* The 48 bits of standard directory, upper word */
- u64 pd_hi_val;
- struct md_pdir_high_fmt pd_hi_fmt;
-}md_pdir_high_t;
-
-
-struct md_pdir_low_shared_fmt {
- /* The meaning of lower directory, shared */
- u64 pds_lo_unused : 16,
- pds_lo_bvec : 26,
- pds_lo_cnt : 6,
- pds_lo_state : 3,
- pds_lo_ste : 1,
- pds_lo_prio : 4,
- pds_lo_ax : 1,
- pds_lo_ecc : 7;
-};
-
-struct md_pdir_low_exclusive_fmt {
- /* The meaning of lower directory, exclusive */
- u64 pde_lo_unused : 31,
- pde_lo_ptr : 11,
- pde_lo_unused1 : 6,
- pde_lo_state : 3,
- pde_lo_ste : 1,
- pde_lo_prio : 4,
- pde_lo_ax : 1,
- pde_lo_ecc : 7;
-};
-
-
-typedef union md_pdir_loent {
- /* The 48 bits of premium directory, lower word */
- u64 pd_lo_val;
- struct md_pdir_low_exclusive_fmt pde_lo_fmt;
- struct md_pdir_low_shared_fmt pds_lo_fmt;
-}md_pdir_low_t;
-
-
-/*
- * the following two "union" definitions and two
- * "struct" definitions are used in vmdump.c to
- * represent directory memory information.
- */
-
-typedef union md_dir_high {
- md_sdir_high_t md_sdir_high;
- md_pdir_high_t md_pdir_high;
-} md_dir_high_t;
-
-typedef union md_dir_low {
- md_sdir_low_t md_sdir_low;
- md_pdir_low_t md_pdir_low;
-} md_dir_low_t;
-
-typedef struct bddir_entry {
- md_dir_low_t md_dir_low;
- md_dir_high_t md_dir_high;
-} bddir_entry_t;
-
-typedef struct dir_mem_entry {
- u64 prcpf[MAX_REGIONS];
- bddir_entry_t directory_words[MD_PAGE_SIZE/CACHE_SLINE_SIZE];
-} dir_mem_entry_t;
-
-
-
-typedef union md_perf_sel {
- u64 perf_sel_reg;
- struct {
- u64 perf_rsvd : 60,
- perf_en : 1,
- perf_sel : 3;
- } perf_sel_bits;
-} md_perf_sel_t;
-
-typedef union md_perf_cnt {
- u64 perf_cnt;
- struct {
- u64 perf_rsvd : 44,
- perf_cnt : 20;
- } perf_cnt_bits;
-} md_perf_cnt_t;
-
-
-#endif /* !__ASSEMBLY__ */
-
-
-#define DIR_ERROR_VALID_MASK 0xe000000000000000
-#define DIR_ERROR_VALID_SHFT 61
-#define DIR_ERROR_VALID_UCE 0x8000000000000000
-#define DIR_ERROR_VALID_AE 0x4000000000000000
-#define DIR_ERROR_VALID_CE 0x2000000000000000
-
-#define MEM_ERROR_VALID_MASK 0xc000000000000000
-#define MEM_ERROR_VALID_SHFT 62
-#define MEM_ERROR_VALID_UCE 0x8000000000000000
-#define MEM_ERROR_VALID_CE 0x4000000000000000
-
-#define PROTO_ERROR_VALID_MASK 0x8000000000000000
-
-#define MISC_ERROR_VALID_MASK 0x3ff
-
-/*
- * Mask for hspec address that is stored in the dir error register.
- * This represents bits 29 through 3.
- */
-#define DIR_ERR_HSPEC_MASK 0x3ffffff8
-#define ERROR_HSPEC_MASK 0x3ffffff8
-#define ERROR_HSPEC_SHFT 3
-#define ERROR_ADDR_MASK 0xfffffff8
-#define ERROR_ADDR_SHFT 3
-
-/*
- * MD_MISC_ERROR register defines.
- */
-
-#define MMCE_VALID_MASK 0x3ff
-#define MMCE_ILL_MSG_SHFT 8
-#define MMCE_ILL_MSG_MASK (UINT64_CAST 0x03 << MMCE_ILL_MSG_SHFT)
-#define MMCE_ILL_REV_SHFT 6
-#define MMCE_ILL_REV_MASK (UINT64_CAST 0x03 << MMCE_ILL_REV_SHFT)
-#define MMCE_LONG_PACK_SHFT 4
-#define MMCE_LONG_PACK_MASK (UINT64_CAST 0x03 << MMCE_lONG_PACK_SHFT)
-#define MMCE_SHORT_PACK_SHFT 2
-#define MMCE_SHORT_PACK_MASK (UINT64_CAST 0x03 << MMCE_SHORT_PACK_SHFT)
-#define MMCE_BAD_DATA_SHFT 0
-#define MMCE_BAD_DATA_MASK (UINT64_CAST 0x03 << MMCE_BAD_DATA_SHFT)
-
-
-#define MD_PERF_COUNTERS 6
-#define MD_PERF_SETS 6
-
-#define MEM_DIMM_MASK 0xe0000000
-#define MEM_DIMM_SHFT 29
-
-#endif /* _ASM_SN_SN0_HUBMD_H */
diff -Nru a/include/asm-mips64/sn/sn0/hubni.h b/include/asm-mips64/sn/sn0/hubni.h
--- a/include/asm-mips64/sn/sn0/hubni.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,255 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/hubni.h>, Revision 1.27.
- *
- * Copyright (C) 1992-1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SGI_SN0_HUBNI_H
-#define _ASM_SGI_SN0_HUBNI_H
-
-#ifndef __ASSEMBLY__
-#include <linux/types.h>
-#endif
-
-/*
- * Hub Network Interface registers
- *
- * All registers in this file are subject to change until Hub chip tapeout.
- */
-
-#define NI_BASE 0x600000
-#define NI_BASE_TABLES 0x630000
-
-#define NI_STATUS_REV_ID 0x600000 /* Hub network status, rev, and ID */
-#define NI_PORT_RESET 0x600008 /* Reset the network interface */
-#define NI_PROTECTION 0x600010 /* NI register access permissions */
-#define NI_GLOBAL_PARMS 0x600018 /* LLP parameters */
-#define NI_SCRATCH_REG0 0x600100 /* Scratch register 0 (64 bits) */
-#define NI_SCRATCH_REG1 0x600108 /* Scratch register 1 (64 bits) */
-#define NI_DIAG_PARMS 0x600110 /* Parameters for diags */
-
-#define NI_VECTOR_PARMS 0x600200 /* Vector PIO routing parameters */
-#define NI_VECTOR 0x600208 /* Vector PIO route */
-#define NI_VECTOR_DATA 0x600210 /* Vector PIO data */
-#define NI_VECTOR_STATUS 0x600300 /* Vector PIO return status */
-#define NI_RETURN_VECTOR 0x600308 /* Vector PIO return vector */
-#define NI_VECTOR_READ_DATA 0x600310 /* Vector PIO read data */
-#define NI_VECTOR_CLEAR 0x600380 /* Vector PIO read & clear status */
-
-#define NI_IO_PROTECT 0x600400 /* PIO protection bits */
-#define NI_IO_PROT_OVRRD 0x600408 /* PIO protection bit override */
-
-#define NI_AGE_CPU0_MEMORY 0x600500 /* CPU 0 memory age control */
-#define NI_AGE_CPU0_PIO 0x600508 /* CPU 0 PIO age control */
-#define NI_AGE_CPU1_MEMORY 0x600510 /* CPU 1 memory age control */
-#define NI_AGE_CPU1_PIO 0x600518 /* CPU 1 PIO age control */
-#define NI_AGE_GBR_MEMORY 0x600520 /* GBR memory age control */
-#define NI_AGE_GBR_PIO 0x600528 /* GBR PIO age control */
-#define NI_AGE_IO_MEMORY 0x600530 /* IO memory age control */
-#define NI_AGE_IO_PIO 0x600538 /* IO PIO age control */
-#define NI_AGE_REG_MIN NI_AGE_CPU0_MEMORY
-#define NI_AGE_REG_MAX NI_AGE_IO_PIO
-
-#define NI_PORT_PARMS 0x608000 /* LLP Parameters */
-#define NI_PORT_ERROR 0x608008 /* LLP Errors */
-#define NI_PORT_ERROR_CLEAR 0x608088 /* Clear the error bits */
-
-#define NI_META_TABLE0 0x638000 /* First meta routing table entry */
-#define NI_META_TABLE(_x) (NI_META_TABLE0 + (8 * (_x)))
-#define NI_META_ENTRIES 32
-
-#define NI_LOCAL_TABLE0 0x638100 /* First local routing table entry */
-#define NI_LOCAL_TABLE(_x) (NI_LOCAL_TABLE0 + (8 * (_x)))
-#define NI_LOCAL_ENTRIES 16
-
-/*
- * NI_STATUS_REV_ID mask and shift definitions
- * Have to use UINT64_CAST instead of 'L' suffix, for assembler.
- */
-
-#define NSRI_8BITMODE_SHFT 30
-#define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30)
-#define NSRI_LINKUP_SHFT 29
-#define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29)
-#define NSRI_DOWNREASON_SHFT 28 /* 0=failed, 1=never came */
-#define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28) /* out of reset. */
-#define NSRI_MORENODES_SHFT 18
-#define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18) /* Max. # of nodes */
-#define MORE_MEMORY 0
-#define MORE_NODES 1
-#define NSRI_REGIONSIZE_SHFT 17
-#define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17) /* Granularity */
-#define REGIONSIZE_FINE 1
-#define REGIONSIZE_COARSE 0
-#define NSRI_NODEID_SHFT 8
-#define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8)/* Node (Hub) ID */
-#define NSRI_REV_SHFT 4
-#define NSRI_REV_MASK (UINT64_CAST 0xf << 4) /* Chip Revision */
-#define NSRI_CHIPID_SHFT 0
-#define NSRI_CHIPID_MASK (UINT64_CAST 0xf) /* Chip type ID */
-
-/*
- * In fine mode, each node is a region. In coarse mode, there are
- * eight nodes per region.
- */
-#define NASID_TO_FINEREG_SHFT 0
-#define NASID_TO_COARSEREG_SHFT 3
-
-/* NI_PORT_RESET mask definitions */
-
-#define NPR_PORTRESET (UINT64_CAST 1 << 7) /* Send warm reset */
-#define NPR_LINKRESET (UINT64_CAST 1 << 1) /* Send link reset */
-#define NPR_LOCALRESET (UINT64_CAST 1) /* Reset entire hub */
-
-/* NI_PROTECTION mask and shift definitions */
-
-#define NPROT_RESETOK (UINT64_CAST 1)
-
-/* NI_GLOBAL_PARMS mask and shift definitions */
-
-#define NGP_MAXRETRY_SHFT 48 /* Maximum retries */
-#define NGP_MAXRETRY_MASK (UINT64_CAST 0x3ff << 48)
-#define NGP_TAILTOWRAP_SHFT 32 /* Tail timeout wrap */
-#define NGP_TAILTOWRAP_MASK (UINT64_CAST 0xffff << 32)
-
-#define NGP_CREDITTOVAL_SHFT 16 /* Tail timeout wrap */
-#define NGP_CREDITTOVAL_MASK (UINT64_CAST 0xf << 16)
-#define NGP_TAILTOVAL_SHFT 4 /* Tail timeout value */
-#define NGP_TAILTOVAL_MASK (UINT64_CAST 0xf << 4)
-
-/* NI_DIAG_PARMS mask and shift definitions */
-
-#define NDP_PORTTORESET (UINT64_CAST 1 << 18) /* Port tmout reset */
-#define NDP_LLP8BITMODE (UINT64_CAST 1 << 12) /* LLP 8-bit mode */
-#define NDP_PORTDISABLE (UINT64_CAST 1 << 6) /* Port disable */
-#define NDP_SENDERROR (UINT64_CAST 1) /* Send data error */
-
-/*
- * NI_VECTOR_PARMS mask and shift definitions.
- * TYPE may be any of the first four PIOTYPEs defined under NI_VECTOR_STATUS.
- */
-
-#define NVP_PIOID_SHFT 40
-#define NVP_PIOID_MASK (UINT64_CAST 0x3ff << 40)
-#define NVP_WRITEID_SHFT 32
-#define NVP_WRITEID_MASK (UINT64_CAST 0xff << 32)
-#define NVP_ADDRESS_MASK (UINT64_CAST 0xffff8) /* Bits 19:3 */
-#define NVP_TYPE_SHFT 0
-#define NVP_TYPE_MASK (UINT64_CAST 0x3)
-
-/* NI_VECTOR_STATUS mask and shift definitions */
-
-#define NVS_VALID (UINT64_CAST 1 << 63)
-#define NVS_OVERRUN (UINT64_CAST 1 << 62)
-#define NVS_TARGET_SHFT 51
-#define NVS_TARGET_MASK (UINT64_CAST 0x3ff << 51)
-#define NVS_PIOID_SHFT 40
-#define NVS_PIOID_MASK (UINT64_CAST 0x3ff << 40)
-#define NVS_WRITEID_SHFT 32
-#define NVS_WRITEID_MASK (UINT64_CAST 0xff << 32)
-#define NVS_ADDRESS_MASK (UINT64_CAST 0xfffffff8) /* Bits 31:3 */
-#define NVS_TYPE_SHFT 0
-#define NVS_TYPE_MASK (UINT64_CAST 0x7)
-#define NVS_ERROR_MASK (UINT64_CAST 0x4) /* bit set means error */
-
-
-#define PIOTYPE_READ 0 /* VECTOR_PARMS and VECTOR_STATUS */
-#define PIOTYPE_WRITE 1 /* VECTOR_PARMS and VECTOR_STATUS */
-#define PIOTYPE_UNDEFINED 2 /* VECTOR_PARMS and VECTOR_STATUS */
-#define PIOTYPE_EXCHANGE 3 /* VECTOR_PARMS and VECTOR_STATUS */
-#define PIOTYPE_ADDR_ERR 4 /* VECTOR_STATUS only */
-#define PIOTYPE_CMD_ERR 5 /* VECTOR_STATUS only */
-#define PIOTYPE_PROT_ERR 6 /* VECTOR_STATUS only */
-#define PIOTYPE_UNKNOWN 7 /* VECTOR_STATUS only */
-
-/* NI_AGE_XXX mask and shift definitions */
-
-#define NAGE_VCH_SHFT 10
-#define NAGE_VCH_MASK (UINT64_CAST 3 << 10)
-#define NAGE_CC_SHFT 8
-#define NAGE_CC_MASK (UINT64_CAST 3 << 8)
-#define NAGE_AGE_SHFT 0
-#define NAGE_AGE_MASK (UINT64_CAST 0xff)
-#define NAGE_MASK (NAGE_VCH_MASK | NAGE_CC_MASK | NAGE_AGE_MASK)
-
-#define VCHANNEL_A 0
-#define VCHANNEL_B 1
-#define VCHANNEL_ANY 2
-
-/* NI_PORT_PARMS mask and shift definitions */
-
-#define NPP_NULLTO_SHFT 10
-#define NPP_NULLTO_MASK (UINT64_CAST 0x3f << 16)
-#define NPP_MAXBURST_SHFT 0
-#define NPP_MAXBURST_MASK (UINT64_CAST 0x3ff)
-#define NPP_RESET_DFLT_HUB20 ((UINT64_CAST 1 << NPP_NULLTO_SHFT) | \
- (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
-#define NPP_RESET_DEFAULTS ((UINT64_CAST 6 << NPP_NULLTO_SHFT) | \
- (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
-
-
-/* NI_PORT_ERROR mask and shift definitions */
-
-#define NPE_LINKRESET (UINT64_CAST 1 << 37)
-#define NPE_INTERNALERROR (UINT64_CAST 1 << 36)
-#define NPE_BADMESSAGE (UINT64_CAST 1 << 35)
-#define NPE_BADDEST (UINT64_CAST 1 << 34)
-#define NPE_FIFOOVERFLOW (UINT64_CAST 1 << 33)
-#define NPE_CREDITTO_SHFT 28
-#define NPE_CREDITTO_MASK (UINT64_CAST 0xf << 28)
-#define NPE_TAILTO_SHFT 24
-#define NPE_TAILTO_MASK (UINT64_CAST 0xf << 24)
-#define NPE_RETRYCOUNT_SHFT 16
-#define NPE_RETRYCOUNT_MASK (UINT64_CAST 0xff << 16)
-#define NPE_CBERRCOUNT_SHFT 8
-#define NPE_CBERRCOUNT_MASK (UINT64_CAST 0xff << 8)
-#define NPE_SNERRCOUNT_SHFT 0
-#define NPE_SNERRCOUNT_MASK (UINT64_CAST 0xff << 0)
-#define NPE_MASK 0x3effffffff
-
-#define NPE_COUNT_MAX 0xff
-
-#define NPE_FATAL_ERRORS (NPE_LINKRESET | NPE_INTERNALERROR | \
- NPE_BADMESSAGE | NPE_BADDEST | \
- NPE_FIFOOVERFLOW | NPE_CREDITTO_MASK | \
- NPE_TAILTO_MASK)
-
-/* NI_META_TABLE mask and shift definitions */
-
-#define NMT_EXIT_PORT_MASK (UINT64_CAST 0xf)
-
-/* NI_LOCAL_TABLE mask and shift definitions */
-
-#define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf)
-
-#ifndef __ASSEMBLY__
-
-typedef union hubni_port_error_u {
- u64 nipe_reg_value;
- struct {
- u64 nipe_rsvd: 26, /* unused */
- nipe_lnk_reset: 1, /* link reset */
- nipe_intl_err: 1, /* internal error */
- nipe_bad_msg: 1, /* bad message */
- nipe_bad_dest: 1, /* bad dest */
- nipe_fifo_ovfl: 1, /* fifo overflow */
- nipe_rsvd1: 1, /* unused */
- nipe_credit_to: 4, /* credit timeout */
- nipe_tail_to: 4, /* tail timeout */
- nipe_retry_cnt: 8, /* retry error count */
- nipe_cb_cnt: 8, /* checkbit error count */
- nipe_sn_cnt: 8; /* sequence number count */
- } nipe_fields_s;
-} hubni_port_error_t;
-
-#define NI_LLP_RETRY_MAX 0xff
-#define NI_LLP_CB_MAX 0xff
-#define NI_LLP_SN_MAX 0xff
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_SGI_SN0_HUBNI_H */
diff -Nru a/include/asm-mips64/sn/sn0/hubpi.h b/include/asm-mips64/sn/sn0/hubpi.h
--- a/include/asm-mips64/sn/sn0/hubpi.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,427 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/hubpi.h>, revision 1.28.
- *
- * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SN_SN0_HUBPI_H
-#define _ASM_SN_SN0_HUBPI_H
-
-#include <linux/types.h>
-
-/*
- * Hub I/O interface registers
- *
- * All registers in this file are subject to change until Hub chip tapeout.
- * All register "addresses" are actually offsets. Use the LOCAL_HUB
- * or REMOTE_HUB macros to synthesize an actual address
- */
-
-#define PI_BASE 0x000000
-
-/* General protection and control registers */
-
-#define PI_CPU_PROTECT 0x000000 /* CPU Protection */
-#define PI_PROT_OVERRD 0x000008 /* Clear CPU Protection bit */
-#define PI_IO_PROTECT 0x000010 /* Interrupt Pending Protection */
-#define PI_REGION_PRESENT 0x000018 /* Indicates whether region exists */
-#define PI_CPU_NUM 0x000020 /* CPU Number ID */
-#define PI_CALIAS_SIZE 0x000028 /* Cached Alias Size */
-#define PI_MAX_CRB_TIMEOUT 0x000030 /* Maximum Timeout for CRB */
-#define PI_CRB_SFACTOR 0x000038 /* Scale factor for CRB timeout */
-
-/* CALIAS values */
-#define PI_CALIAS_SIZE_0 0
-#define PI_CALIAS_SIZE_4K 1
-#define PI_CALIAS_SIZE_8K 2
-#define PI_CALIAS_SIZE_16K 3
-#define PI_CALIAS_SIZE_32K 4
-#define PI_CALIAS_SIZE_64K 5
-#define PI_CALIAS_SIZE_128K 6
-#define PI_CALIAS_SIZE_256K 7
-#define PI_CALIAS_SIZE_512K 8
-#define PI_CALIAS_SIZE_1M 9
-#define PI_CALIAS_SIZE_2M 10
-#define PI_CALIAS_SIZE_4M 11
-#define PI_CALIAS_SIZE_8M 12
-#define PI_CALIAS_SIZE_16M 13
-#define PI_CALIAS_SIZE_32M 14
-#define PI_CALIAS_SIZE_64M 15
-
-/* Processor control and status checking */
-
-#define PI_CPU_PRESENT_A 0x000040 /* CPU Present A */
-#define PI_CPU_PRESENT_B 0x000048 /* CPU Present B */
-#define PI_CPU_ENABLE_A 0x000050 /* CPU Enable A */
-#define PI_CPU_ENABLE_B 0x000058 /* CPU Enable B */
-#define PI_REPLY_LEVEL 0x000060 /* Reply Level */
-#define PI_HARDRESET_BIT 0x020068 /* Bit cleared by s/w on SR */
-#define PI_NMI_A 0x000070 /* NMI to CPU A */
-#define PI_NMI_B 0x000078 /* NMI to CPU B */
-#define PI_NMI_OFFSET (PI_NMI_B - PI_NMI_A)
-#define PI_SOFTRESET 0x000080 /* Softreset (to both CPUs) */
-
-/* Regular Interrupt register checking. */
-
-#define PI_INT_PEND_MOD 0x000090 /* Write to set pending ints */
-#define PI_INT_PEND0 0x000098 /* Read to get pending ints */
-#define PI_INT_PEND1 0x0000a0 /* Read to get pending ints */
-#define PI_INT_MASK0_A 0x0000a8 /* Interrupt Mask 0 for CPU A */
-#define PI_INT_MASK1_A 0x0000b0 /* Interrupt Mask 1 for CPU A */
-#define PI_INT_MASK0_B 0x0000b8 /* Interrupt Mask 0 for CPU B */
-#define PI_INT_MASK1_B 0x0000c0 /* Interrupt Mask 1 for CPU B */
-
-#define PI_INT_MASK_OFFSET 0x10 /* Offset from A to B */
-
-/* Crosscall interrupts */
-
-#define PI_CC_PEND_SET_A 0x0000c8 /* CC Interrupt Pending Set, CPU A */
-#define PI_CC_PEND_SET_B 0x0000d0 /* CC Interrupt Pending Set, CPU B */
-#define PI_CC_PEND_CLR_A 0x0000d8 /* CC Interrupt Pending Clr, CPU A */
-#define PI_CC_PEND_CLR_B 0x0000e0 /* CC Interrupt Pending Clr, CPU B */
-#define PI_CC_MASK 0x0000e8 /* CC Interrupt mask */
-
-#define PI_INT_SET_OFFSET 0x08 /* Offset from A to B */
-
-/* Realtime Counter and Profiler control registers */
-
-#define PI_RT_COUNT 0x030100 /* Real Time Counter */
-#define PI_RT_COMPARE_A 0x000108 /* Real Time Compare A */
-#define PI_RT_COMPARE_B 0x000110 /* Real Time Compare B */
-#define PI_PROFILE_COMPARE 0x000118 /* L5 int to both cpus when == RTC */
-#define PI_RT_PEND_A 0x000120 /* Set if RT int for A pending */
-#define PI_RT_PEND_B 0x000128 /* Set if RT int for B pending */
-#define PI_PROF_PEND_A 0x000130 /* Set if Prof int for A pending */
-#define PI_PROF_PEND_B 0x000138 /* Set if Prof int for B pending */
-#define PI_RT_EN_A 0x000140 /* RT int for CPU A enable */
-#define PI_RT_EN_B 0x000148 /* RT int for CPU B enable */
-#define PI_PROF_EN_A 0x000150 /* PROF int for CPU A enable */
-#define PI_PROF_EN_B 0x000158 /* PROF int for CPU B enable */
-#define PI_RT_LOCAL_CTRL 0x000160 /* RT control register */
-#define PI_RT_FILTER_CTRL 0x000168 /* GCLK Filter control register */
-
-#define PI_COUNT_OFFSET 0x08 /* A to B offset for all counts */
-
-/* Built-In Self Test support */
-
-#define PI_BIST_WRITE_DATA 0x000200 /* BIST write data */
-#define PI_BIST_READ_DATA 0x000208 /* BIST read data */
-#define PI_BIST_COUNT_TARG 0x000210 /* BIST Count and Target */
-#define PI_BIST_READY 0x000218 /* BIST Ready indicator */
-#define PI_BIST_SHIFT_LOAD 0x000220 /* BIST control */
-#define PI_BIST_SHIFT_UNLOAD 0x000228 /* BIST control */
-#define PI_BIST_ENTER_RUN 0x000230 /* BIST control */
-
-/* Graphics control registers */
-
-#define PI_GFX_PAGE_A 0x000300 /* Graphics page A */
-#define PI_GFX_CREDIT_CNTR_A 0x000308 /* Graphics credit counter A */
-#define PI_GFX_BIAS_A 0x000310 /* Graphics bias A */
-#define PI_GFX_INT_CNTR_A 0x000318 /* Graphics interrupt counter A */
-#define PI_GFX_INT_CMP_A 0x000320 /* Graphics interrupt comparator A */
-#define PI_GFX_PAGE_B 0x000328 /* Graphics page B */
-#define PI_GFX_CREDIT_CNTR_B 0x000330 /* Graphics credit counter B */
-#define PI_GFX_BIAS_B 0x000338 /* Graphics bias B */
-#define PI_GFX_INT_CNTR_B 0x000340 /* Graphics interrupt counter B */
-#define PI_GFX_INT_CMP_B 0x000348 /* Graphics interrupt comparator B */
-
-#define PI_GFX_OFFSET (PI_GFX_PAGE_B - PI_GFX_PAGE_A)
-#define PI_GFX_PAGE_ENABLE 0x0000010000000000LL
-
-/* Error and timeout registers */
-#define PI_ERR_INT_PEND 0x000400 /* Error Interrupt Pending */
-#define PI_ERR_INT_MASK_A 0x000408 /* Error Interrupt mask for CPU A */
-#define PI_ERR_INT_MASK_B 0x000410 /* Error Interrupt mask for CPU B */
-#define PI_ERR_STACK_ADDR_A 0x000418 /* Error stack address for CPU A */
-#define PI_ERR_STACK_ADDR_B 0x000420 /* Error stack address for CPU B */
-#define PI_ERR_STACK_SIZE 0x000428 /* Error Stack Size */
-#define PI_ERR_STATUS0_A 0x000430 /* Error Status 0A */
-#define PI_ERR_STATUS0_A_RCLR 0x000438 /* Error Status 0A clear on read */
-#define PI_ERR_STATUS1_A 0x000440 /* Error Status 1A */
-#define PI_ERR_STATUS1_A_RCLR 0x000448 /* Error Status 1A clear on read */
-#define PI_ERR_STATUS0_B 0x000450 /* Error Status 0B */
-#define PI_ERR_STATUS0_B_RCLR 0x000458 /* Error Status 0B clear on read */
-#define PI_ERR_STATUS1_B 0x000460 /* Error Status 1B */
-#define PI_ERR_STATUS1_B_RCLR 0x000468 /* Error Status 1B clear on read */
-#define PI_SPOOL_CMP_A 0x000470 /* Spool compare for CPU A */
-#define PI_SPOOL_CMP_B 0x000478 /* Spool compare for CPU B */
-#define PI_CRB_TIMEOUT_A 0x000480 /* Timed out CRB entries for A */
-#define PI_CRB_TIMEOUT_B 0x000488 /* Timed out CRB entries for B */
-#define PI_SYSAD_ERRCHK_EN 0x000490 /* Enables SYSAD error checking */
-#define PI_BAD_CHECK_BIT_A 0x000498 /* Force SYSAD check bit error */
-#define PI_BAD_CHECK_BIT_B 0x0004a0 /* Force SYSAD check bit error */
-#define PI_NACK_CNT_A 0x0004a8 /* Consecutive NACK counter */
-#define PI_NACK_CNT_B 0x0004b0 /* " " for CPU B */
-#define PI_NACK_CMP 0x0004b8 /* NACK count compare */
-#define PI_STACKADDR_OFFSET (PI_ERR_STACK_ADDR_B - PI_ERR_STACK_ADDR_A)
-#define PI_ERRSTAT_OFFSET (PI_ERR_STATUS0_B - PI_ERR_STATUS0_A)
-#define PI_RDCLR_OFFSET (PI_ERR_STATUS0_A_RCLR - PI_ERR_STATUS0_A)
-
-/* Bits in PI_ERR_INT_PEND */
-#define PI_ERR_SPOOL_CMP_B 0x00000001 /* Spool end hit high water */
-#define PI_ERR_SPOOL_CMP_A 0x00000002
-#define PI_ERR_SPUR_MSG_B 0x00000004 /* Spurious message intr. */
-#define PI_ERR_SPUR_MSG_A 0x00000008
-#define PI_ERR_WRB_TERR_B 0x00000010 /* WRB TERR */
-#define PI_ERR_WRB_TERR_A 0x00000020
-#define PI_ERR_WRB_WERR_B 0x00000040 /* WRB WERR */
-#define PI_ERR_WRB_WERR_A 0x00000080
-#define PI_ERR_SYSSTATE_B 0x00000100 /* SysState parity error */
-#define PI_ERR_SYSSTATE_A 0x00000200
-#define PI_ERR_SYSAD_DATA_B 0x00000400 /* SysAD data parity error */
-#define PI_ERR_SYSAD_DATA_A 0x00000800
-#define PI_ERR_SYSAD_ADDR_B 0x00001000 /* SysAD addr parity error */
-#define PI_ERR_SYSAD_ADDR_A 0x00002000
-#define PI_ERR_SYSCMD_DATA_B 0x00004000 /* SysCmd data parity error */
-#define PI_ERR_SYSCMD_DATA_A 0x00008000
-#define PI_ERR_SYSCMD_ADDR_B 0x00010000 /* SysCmd addr parity error */
-#define PI_ERR_SYSCMD_ADDR_A 0x00020000
-#define PI_ERR_BAD_SPOOL_B 0x00040000 /* Error spooling to memory */
-#define PI_ERR_BAD_SPOOL_A 0x00080000
-#define PI_ERR_UNCAC_UNCORR_B 0x00100000 /* Uncached uncorrectable */
-#define PI_ERR_UNCAC_UNCORR_A 0x00200000
-#define PI_ERR_SYSSTATE_TAG_B 0x00400000 /* SysState tag parity error */
-#define PI_ERR_SYSSTATE_TAG_A 0x00800000
-#define PI_ERR_MD_UNCORR 0x01000000 /* Must be cleared in MD */
-
-#define PI_ERR_CLEAR_ALL_A 0x00aaaaaa
-#define PI_ERR_CLEAR_ALL_B 0x00555555
-
-
-/*
- * The following three macros define all possible error int pends.
- */
-
-#define PI_FATAL_ERR_CPU_A (PI_ERR_SYSSTATE_TAG_A | \
- PI_ERR_BAD_SPOOL_A | \
- PI_ERR_SYSCMD_ADDR_A | \
- PI_ERR_SYSCMD_DATA_A | \
- PI_ERR_SYSAD_ADDR_A | \
- PI_ERR_SYSAD_DATA_A | \
- PI_ERR_SYSSTATE_A)
-
-#define PI_MISC_ERR_CPU_A (PI_ERR_UNCAC_UNCORR_A | \
- PI_ERR_WRB_WERR_A | \
- PI_ERR_WRB_TERR_A | \
- PI_ERR_SPUR_MSG_A | \
- PI_ERR_SPOOL_CMP_A)
-
-#define PI_FATAL_ERR_CPU_B (PI_ERR_SYSSTATE_TAG_B | \
- PI_ERR_BAD_SPOOL_B | \
- PI_ERR_SYSCMD_ADDR_B | \
- PI_ERR_SYSCMD_DATA_B | \
- PI_ERR_SYSAD_ADDR_B | \
- PI_ERR_SYSAD_DATA_B | \
- PI_ERR_SYSSTATE_B)
-
-#define PI_MISC_ERR_CPU_B (PI_ERR_UNCAC_UNCORR_B | \
- PI_ERR_WRB_WERR_B | \
- PI_ERR_WRB_TERR_B | \
- PI_ERR_SPUR_MSG_B | \
- PI_ERR_SPOOL_CMP_B)
-
-#define PI_ERR_GENERIC (PI_ERR_MD_UNCORR)
-
-/*
- * Error types for PI_ERR_STATUS0_[AB] and error stack:
- * Use the write types if WRBRRB is 1 else use the read types
- */
-
-/* Fields in PI_ERR_STATUS0_[AB] */
-#define PI_ERR_ST0_TYPE_MASK 0x0000000000000007
-#define PI_ERR_ST0_TYPE_SHFT 0
-#define PI_ERR_ST0_REQNUM_MASK 0x0000000000000038
-#define PI_ERR_ST0_REQNUM_SHFT 3
-#define PI_ERR_ST0_SUPPL_MASK 0x000000000001ffc0
-#define PI_ERR_ST0_SUPPL_SHFT 6
-#define PI_ERR_ST0_CMD_MASK 0x0000000001fe0000
-#define PI_ERR_ST0_CMD_SHFT 17
-#define PI_ERR_ST0_ADDR_MASK 0x3ffffffffe000000
-#define PI_ERR_ST0_ADDR_SHFT 25
-#define PI_ERR_ST0_OVERRUN_MASK 0x4000000000000000
-#define PI_ERR_ST0_OVERRUN_SHFT 62
-#define PI_ERR_ST0_VALID_MASK 0x8000000000000000
-#define PI_ERR_ST0_VALID_SHFT 63
-
-/* Fields in PI_ERR_STATUS1_[AB] */
-#define PI_ERR_ST1_SPOOL_MASK 0x00000000001fffff
-#define PI_ERR_ST1_SPOOL_SHFT 0
-#define PI_ERR_ST1_TOUTCNT_MASK 0x000000001fe00000
-#define PI_ERR_ST1_TOUTCNT_SHFT 21
-#define PI_ERR_ST1_INVCNT_MASK 0x0000007fe0000000
-#define PI_ERR_ST1_INVCNT_SHFT 29
-#define PI_ERR_ST1_CRBNUM_MASK 0x0000038000000000
-#define PI_ERR_ST1_CRBNUM_SHFT 39
-#define PI_ERR_ST1_WRBRRB_MASK 0x0000040000000000
-#define PI_ERR_ST1_WRBRRB_SHFT 42
-#define PI_ERR_ST1_CRBSTAT_MASK 0x001ff80000000000
-#define PI_ERR_ST1_CRBSTAT_SHFT 43
-#define PI_ERR_ST1_MSGSRC_MASK 0xffe0000000000000
-#define PI_ERR_ST1_MSGSRC_SHFT 53
-
-/* Fields in the error stack */
-#define PI_ERR_STK_TYPE_MASK 0x0000000000000003
-#define PI_ERR_STK_TYPE_SHFT 0
-#define PI_ERR_STK_SUPPL_MASK 0x0000000000000038
-#define PI_ERR_STK_SUPPL_SHFT 3
-#define PI_ERR_STK_REQNUM_MASK 0x00000000000001c0
-#define PI_ERR_STK_REQNUM_SHFT 6
-#define PI_ERR_STK_CRBNUM_MASK 0x0000000000000e00
-#define PI_ERR_STK_CRBNUM_SHFT 9
-#define PI_ERR_STK_WRBRRB_MASK 0x0000000000001000
-#define PI_ERR_STK_WRBRRB_SHFT 12
-#define PI_ERR_STK_CRBSTAT_MASK 0x00000000007fe000
-#define PI_ERR_STK_CRBSTAT_SHFT 13
-#define PI_ERR_STK_CMD_MASK 0x000000007f800000
-#define PI_ERR_STK_CMD_SHFT 23
-#define PI_ERR_STK_ADDR_MASK 0xffffffff80000000
-#define PI_ERR_STK_ADDR_SHFT 31
-
-/* Error type in the error status or stack on Read CRBs */
-#define PI_ERR_RD_PRERR 1
-#define PI_ERR_RD_DERR 2
-#define PI_ERR_RD_TERR 3
-
-/* Error type in the error status or stack on Write CRBs */
-#define PI_ERR_WR_WERR 0
-#define PI_ERR_WR_PWERR 1
-#define PI_ERR_WR_TERR 3
-
-/* Read or Write CRB in error status or stack */
-#define PI_ERR_RRB 0
-#define PI_ERR_WRB 1
-#define PI_ERR_ANY_CRB 2
-
-/* Address masks in the error status and error stack are not the same */
-#define ERR_STK_ADDR_SHFT 7
-#define ERR_STAT0_ADDR_SHFT 3
-
-#define PI_MIN_STACK_SIZE 4096 /* For figuring out the size to set */
-#define PI_STACK_SIZE_SHFT 12 /* 4k */
-
-#define ERR_STACK_SIZE_BYTES(_sz) \
- ((_sz) ? (PI_MIN_STACK_SIZE << ((_sz) - 1)) : 0)
-
-#ifndef __ASSEMBLY__
-/*
- * format of error stack and error status registers.
- */
-
-struct err_stack_format {
- u64 sk_addr : 33, /* address */
- sk_cmd : 8, /* message command */
- sk_crb_sts : 10, /* status from RRB or WRB */
- sk_rw_rb : 1, /* RRB == 0, WRB == 1 */
- sk_crb_num : 3, /* WRB (0 to 7) or RRB (0 to 4) */
- sk_t5_req : 3, /* RRB T5 request number */
- sk_suppl : 3, /* lowest 3 bit of supplemental */
- sk_err_type: 3; /* error type */
-};
-
-typedef union pi_err_stack {
- u64 pi_stk_word;
- struct err_stack_format pi_stk_fmt;
-} pi_err_stack_t;
-
-struct err_status0_format {
- u64 s0_valid : 1, /* Valid */
- s0_ovr_run : 1, /* Overrun, spooled to memory */
- s0_addr : 37, /* address */
- s0_cmd : 8, /* message command */
- s0_supl : 11, /* message supplemental field */
- s0_t5_req : 3, /* RRB T5 request number */
- s0_err_type: 3; /* error type */
-};
-
-typedef union pi_err_stat0 {
- u64 pi_stat0_word;
- struct err_status0_format pi_stat0_fmt;
-} pi_err_stat0_t;
-
-struct err_status1_format {
- u64 s1_src : 11, /* message source */
- s1_crb_sts : 10, /* status from RRB or WRB */
- s1_rw_rb : 1, /* RRB == 0, WRB == 1 */
- s1_crb_num : 3, /* WRB (0 to 7) or RRB (0 to 4) */
- s1_inval_cnt:10, /* signed invalidate counter RRB */
- s1_to_cnt : 8, /* crb timeout counter */
- s1_spl_cnt : 21; /* number spooled to memory */
-};
-
-typedef union pi_err_stat1 {
- u64 pi_stat1_word;
- struct err_status1_format pi_stat1_fmt;
-} pi_err_stat1_t;
-
-typedef u64 rtc_time_t;
-
-#endif /* !__ASSEMBLY__ */
-
-
-/* Bits in PI_SYSAD_ERRCHK_EN */
-#define PI_SYSAD_ERRCHK_ECCGEN 0x01 /* Enable ECC generation */
-#define PI_SYSAD_ERRCHK_QUALGEN 0x02 /* Enable data quality signal gen. */
-#define PI_SYSAD_ERRCHK_SADP 0x04 /* Enable SysAD parity checking */
-#define PI_SYSAD_ERRCHK_CMDP 0x08 /* Enable SysCmd parity checking */
-#define PI_SYSAD_ERRCHK_STATE 0x10 /* Enable SysState parity checking */
-#define PI_SYSAD_ERRCHK_QUAL 0x20 /* Enable data quality checking */
-#define PI_SYSAD_CHECK_ALL 0x3f /* Generate and check all signals. */
-
-/* Interrupt pending bits on R10000 */
-
-#define HUB_IP_PEND0 0x0400
-#define HUB_IP_PEND1_CC 0x0800
-#define HUB_IP_RT 0x1000
-#define HUB_IP_PROF 0x2000
-#define HUB_IP_ERROR 0x4000
-#define HUB_IP_MASK 0x7c00
-
-/* PI_RT_LOCAL_CTRL mask and shift definitions */
-
-#define PRLC_USE_INT_SHFT 16
-#define PRLC_USE_INT_MASK (UINT64_CAST 1 << 16)
-#define PRLC_USE_INT (UINT64_CAST 1 << 16)
-#define PRLC_GCLK_SHFT 15
-#define PRLC_GCLK_MASK (UINT64_CAST 1 << 15)
-#define PRLC_GCLK (UINT64_CAST 1 << 15)
-#define PRLC_GCLK_COUNT_SHFT 8
-#define PRLC_GCLK_COUNT_MASK (UINT64_CAST 0x7f << 8)
-#define PRLC_MAX_COUNT_SHFT 1
-#define PRLC_MAX_COUNT_MASK (UINT64_CAST 0x7f << 1)
-#define PRLC_GCLK_EN_SHFT 0
-#define PRLC_GCLK_EN_MASK (UINT64_CAST 1)
-#define PRLC_GCLK_EN (UINT64_CAST 1)
-
-/* PI_RT_FILTER_CTRL mask and shift definitions */
-
-#if 0
-/*
- * XXX - This register's definition has changed, but it's only implemented
- * in Hub 2.
- */
-#define PRFC_DROP_COUNT_SHFT 27
-#define PRFC_DROP_COUNT_MASK (UINT64_CAST 0x3ff << 27)
-#define PRFC_DROP_CTR_SHFT 18
-#define PRFC_DROP_CTR_MASK (UINT64_CAST 0x1ff << 18)
-#define PRFC_MASK_ENABLE_SHFT 10
-#define PRFC_MASK_ENABLE_MASK (UINT64_CAST 0x7f << 10)
-#define PRFC_MASK_CTR_SHFT 2
-#define PRFC_MASK_CTR_MASK (UINT64_CAST 0xff << 2)
-#define PRFC_OFFSET_SHFT 0
-#define PRFC_OFFSET_MASK (UINT64_CAST 3)
-#endif /* 0 */
-
-
-/*
- * Bits for NACK_CNT_A/B and NACK_CMP
- */
-#define PI_NACK_CNT_EN_SHFT 20
-#define PI_NACK_CNT_EN_MASK 0x100000
-#define PI_NACK_CNT_MASK 0x0fffff
-#define PI_NACK_CNT_MAX 0x0fffff
-
-#endif /* _ASM_SN_SN0_HUBPI_H */
diff -Nru a/include/asm-mips64/sn/sn0/ip27.h b/include/asm-mips64/sn/sn0/ip27.h
--- a/include/asm-mips64/sn/sn0/ip27.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,97 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/IP27.h>.
- *
- * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SN_SN0_IP27_H
-#define _ASM_SN_SN0_IP27_H
-
-#include <asm/mipsregs.h>
-
-/*
- * Simple definitions for the masks which remove SW bits from pte.
- */
-
-#define TLBLO_HWBITSHIFT 0 /* Shift value, for masking */
-
-#ifndef __ASSEMBLY__
-
-#define CAUSE_BERRINTR IE_IRQ5
-
-#define ECCF_CACHE_ERR 0
-#define ECCF_TAGLO 1
-#define ECCF_ECC 2
-#define ECCF_ERROREPC 3
-#define ECCF_PADDR 4
-#define ECCF_SIZE (5 * sizeof(long))
-
-#endif /* !__ASSEMBLY__ */
-
-#ifdef __ASSEMBLY__
-
-/*
- * KL_GET_CPUNUM (similar to EV_GET_SPNUM for EVEREST platform) reads
- * the processor number of the calling processor. The proc parameters
- * must be a register.
- */
-#define KL_GET_CPUNUM(proc) \
- dli proc, LOCAL_HUB(0); \
- ld proc, PI_CPU_NUM(proc)
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * R10000 status register interrupt bit mask usage for IP27.
- */
-#define SRB_SWTIMO IE_SW0 /* 0x0100 */
-#define SRB_NET IE_SW1 /* 0x0200 */
-#define SRB_DEV0 IE_IRQ0 /* 0x0400 */
-#define SRB_DEV1 IE_IRQ1 /* 0x0800 */
-#define SRB_TIMOCLK IE_IRQ2 /* 0x1000 */
-#define SRB_PROFCLK IE_IRQ3 /* 0x2000 */
-#define SRB_ERR IE_IRQ4 /* 0x4000 */
-#define SRB_SCHEDCLK IE_IRQ5 /* 0x8000 */
-
-#define SR_IBIT_HI SRB_DEV0
-#define SR_IBIT_PROF SRB_PROFCLK
-
-#define SRB_SWTIMO_IDX 0
-#define SRB_NET_IDX 1
-#define SRB_DEV0_IDX 2
-#define SRB_DEV1_IDX 3
-#define SRB_TIMOCLK_IDX 4
-#define SRB_PROFCLK_IDX 5
-#define SRB_ERR_IDX 6
-#define SRB_SCHEDCLK_IDX 7
-
-#define NUM_CAUSE_INTRS 8
-
-#define SCACHE_LINESIZE 128
-#define SCACHE_LINEMASK (SCACHE_LINESIZE - 1)
-
-#include <asm/sn/addrs.h>
-
-#define LED_CYCLE_MASK 0x0f
-#define LED_CYCLE_SHFT 4
-
-#define SEND_NMI(_nasid, _slice) \
- REMOTE_HUB_S((_nasid), (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
-
-/* Sanity hazzard ... Below all the Origin hacks are following. */
-
-#define CPU_RESCHED_A_IRQ 0
-#define CPU_RESCHED_B_IRQ 1
-#define CPU_CALL_A_IRQ 2
-#define CPU_CALL_B_IRQ 3
-#define BASE_PCI_IRQ 4
-
-#define SN00_BRIDGE 0x9200000008000000
-#define SN00I_BRIDGE0 0x920000000b000000
-#define SN00I_BRIDGE1 0x920000000e000000
-#define SN00I_BRIDGE2 0x920000000f000000
-#endif /* _ASM_SN_SN0_IP27_H */
diff -Nru a/include/asm-mips64/sn/sn0/sn0_fru.h b/include/asm-mips64/sn/sn0/sn0_fru.h
--- a/include/asm-mips64/sn/sn0/sn0_fru.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,44 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/SN0/sn0_fru.h>
- *
- * Copyright (C) 1992 - 1997, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_SN_SN0_SN0_FRU_H
-#define _ASM_SN_SN0_SN0_FRU_H
-
-#define MAX_DIMMS 8 /* max # of dimm banks */
-#define MAX_PCIDEV 8 /* max # of pci devices on a pci bus */
-
-typedef unsigned char confidence_t;
-
-typedef struct kf_mem_s {
- confidence_t km_confidence; /* confidence level that the memory is bad
- * is this necessary ?
- */
- confidence_t km_dimm[MAX_DIMMS];
- /* confidence level that dimm[i] is bad
- *I think this is the right number
- */
-
-} kf_mem_t;
-
-typedef struct kf_cpu_s {
- confidence_t kc_confidence; /* confidence level that cpu is bad */
- confidence_t kc_icache; /* confidence level that instr. cache is bad */
- confidence_t kc_dcache; /* confidence level that data cache is bad */
- confidence_t kc_scache; /* confidence level that sec. cache is bad */
- confidence_t kc_sysbus; /* confidence level that sysad/cmd/state bus is bad */
-} kf_cpu_t;
-
-typedef struct kf_pci_bus_s {
- confidence_t kpb_belief; /* confidence level that the pci bus is bad */
- confidence_t kpb_pcidev_belief[MAX_PCIDEV];
- /* confidence level that the pci dev is bad */
-} kf_pci_bus_t;
-
-#endif /* _ASM_SN_SN0_SN0_FRU_H */
diff -Nru a/include/asm-mips64/sn/sn_private.h b/include/asm-mips64/sn/sn_private.h
--- a/include/asm-mips64/sn/sn_private.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,11 +0,0 @@
-extern nasid_t master_nasid;
-
-extern cnodeid_t get_compact_nodeid(void);
-extern void hub_rtc_init(cnodeid_t);
-extern void cpu_time_init(void);
-extern void per_cpu_init(void);
-extern void install_cpuintr(int cpu);
-extern void install_tlbintr(int cpu);
-extern void setup_replication_mask(int);
-extern void replicate_kernel_text(int);
-extern pfn_t node_getfirstfree(cnodeid_t);
diff -Nru a/include/asm-mips64/sn/types.h b/include/asm-mips64/sn/types.h
--- a/include/asm-mips64/sn/types.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,26 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_SN_TYPES_H
-#define _ASM_SN_TYPES_H
-
-#include <linux/types.h>
-
-typedef unsigned long cpuid_t;
-typedef unsigned long cnodemask_t;
-typedef signed short nasid_t; /* node id in numa-as-id space */
-typedef signed short cnodeid_t; /* node id in compact-id space */
-typedef signed char partid_t; /* partition ID type */
-typedef signed short moduleid_t; /* user-visible module number type */
-typedef signed short cmoduleid_t; /* kernel compact module id type */
-typedef unsigned char clusterid_t; /* Clusterid of the cell */
-typedef unsigned long pfn_t;
-
-typedef dev_t vertex_hdl_t; /* hardware graph vertex handle */
-
-#endif /* _ASM_SN_TYPES_H */
diff -Nru a/include/asm-mips64/socket.h b/include/asm-mips64/socket.h
--- a/include/asm-mips64/socket.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,85 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 1999, 2000, 2001 Ralf Baechle
- * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SOCKET_H
-#define _ASM_SOCKET_H
-
-#include <asm/sockios.h>
-
-/*
- * For setsockopt(2)
- *
- * This defines are ABI conformant as far as Linux supports these ...
- */
-#define SOL_SOCKET 0xffff
-
-#define SO_DEBUG 0x0001 /* Record debugging information. */
-#define SO_REUSEADDR 0x0004 /* Allow reuse of local addresses. */
-#define SO_KEEPALIVE 0x0008 /* Keep connections alive and send
- SIGPIPE when they die. */
-#define SO_DONTROUTE 0x0010 /* Don't do local routing. */
-#define SO_BROADCAST 0x0020 /* Allow transmission of
- broadcast messages. */
-#define SO_LINGER 0x0080 /* Block on close of a reliable
- socket to transmit pending data. */
-#define SO_OOBINLINE 0x0100 /* Receive out-of-band data in-band. */
-#if 0
-To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */
-#endif
-
-#define SO_TYPE 0x1008 /* Compatible name for SO_STYLE. */
-#define SO_STYLE SO_TYPE /* Synonym */
-#define SO_ERROR 0x1007 /* get error status and clear */
-#define SO_SNDBUF 0x1001 /* Send buffer size. */
-#define SO_RCVBUF 0x1002 /* Receive buffer. */
-#define SO_SNDLOWAT 0x1003 /* send low-water mark */
-#define SO_RCVLOWAT 0x1004 /* receive low-water mark */
-#define SO_SNDTIMEO 0x1005 /* send timeout */
-#define SO_RCVTIMEO 0x1006 /* receive timeout */
-#define SO_ACCEPTCONN 0x1009
-
-/* linux-specific, might as well be the same as on i386 */
-#define SO_NO_CHECK 11
-#define SO_PRIORITY 12
-#define SO_BSDCOMPAT 14
-
-#define SO_PASSCRED 17
-#define SO_PEERCRED 18
-
-/* Security levels - as per NRL IPv6 - don't actually do anything */
-#define SO_SECURITY_AUTHENTICATION 22
-#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
-#define SO_SECURITY_ENCRYPTION_NETWORK 24
-
-#define SO_BINDTODEVICE 25
-
-/* Socket filtering */
-#define SO_ATTACH_FILTER 26
-#define SO_DETACH_FILTER 27
-
-#define SO_PEERNAME 28
-#define SO_TIMESTAMP 29
-#define SCM_TIMESTAMP SO_TIMESTAMP
-
-/* Nast libc5 fixup - bletch */
-#if defined(__KERNEL__)
-/* Socket types. */
-#define SOCK_DGRAM 1 /* datagram (conn.less) socket */
-#define SOCK_STREAM 2 /* stream (connection) socket */
-#define SOCK_RAW 3 /* raw socket */
-#define SOCK_RDM 4 /* reliably-delivered message */
-#define SOCK_SEQPACKET 5 /* sequential packet socket */
-#define SOCK_PACKET 10 /* linux specific way of */
- /* getting packets at the dev */
- /* level. For writing rarp and */
- /* other similar things on the */
- /* user level. */
-#define SOCK_MAX (SOCK_PACKET+1)
-#endif
-
-#endif /* _ASM_SOCKET_H */
diff -Nru a/include/asm-mips64/sockios.h b/include/asm-mips64/sockios.h
--- a/include/asm-mips64/sockios.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,23 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999 by Ralf Baechle
- */
-#ifndef _ASM_SOCKIOS_H
-#define _ASM_SOCKIOS_H
-
-#include <asm/ioctl.h>
-
-/* Socket-level I/O control calls. */
-#define FIOGETOWN _IOR('f', 123, int)
-#define FIOSETOWN _IOW('f', 124, int)
-
-#define SIOCATMARK _IOR('s', 7, int)
-#define SIOCSPGRP _IOW('s', 8, pid_t)
-#define SIOCGPGRP _IOR('s', 9, pid_t)
-
-#define SIOCGSTAMP 0x8906 /* Get stamp - linux-specific */
-
-#endif /* _ASM_SOCKIOS_H */
diff -Nru a/include/asm-mips64/softirq.h b/include/asm-mips64/softirq.h
--- a/include/asm-mips64/softirq.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,20 +0,0 @@
-#ifndef __ASM_SOFTIRQ_H
-#define __ASM_SOFTIRQ_H
-
-#include <linux/preempt.h>
-#include <asm/hardirq.h>
-
-#define local_bh_disable() \
- do { preempt_count() += SOFTIRQ_OFFSET; barrier(); } while (0)
-#define __local_bh_enable() \
- do { barrier(); preempt_count() -= SOFTIRQ_OFFSET; } while (0)
-
-#define local_bh_enable() \
-do { \
- __local_bh_enable(); \
- if (unlikely(!in_interrupt() && softirq_pending(smp_processor_id()))) \
- do_softirq(); \
- preempt_check_resched(); \
-} while (0)
-
-#endif /* __ASM_SOFTIRQ_H */
diff -Nru a/include/asm-mips64/spinlock.h b/include/asm-mips64/spinlock.h
--- a/include/asm-mips64/spinlock.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,170 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SPINLOCK_H
-#define _ASM_SPINLOCK_H
-
-/*
- * Your basic SMP spinlocks, allowing only a single CPU anywhere
- */
-
-typedef struct {
- volatile unsigned int lock;
-} spinlock_t;
-
-#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
-
-#define spin_lock_init(x) do { (x)->lock = 0; } while(0)
-
-#define spin_is_locked(x) ((x)->lock != 0)
-#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock)
-
-/*
- * Simple spin lock operations. There are two variants, one clears IRQ's
- * on the local processor, one does not.
- *
- * We make no fairness assumptions. They have a cost.
- */
-
-static inline void _raw_spin_lock(spinlock_t *lock)
-{
- unsigned int tmp;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# spin_lock\n"
- "1:\tll\t%1, %2\n\t"
- "bnez\t%1, 1b\n\t"
- " li\t%1, 1\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (lock->lock), "=&r" (tmp)
- : "m" (lock->lock)
- : "memory");
-}
-
-static inline void _raw_spin_unlock(spinlock_t *lock)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# spin_unlock\n\t"
- "sync\n\t"
- "sw\t$0, %0\n\t"
- ".set\treorder"
- : "=m" (lock->lock)
- : "m" (lock->lock)
- : "memory");
-}
-
-static inline unsigned int _raw_spin_trylock(spinlock_t *lock)
-{
- unsigned int temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# spin_trylock\n\t"
- "1:\tll\t%0, %3\n\t"
- "ori\t%2, %0, 1\n\t"
- "sc\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " andi\t%2, %0, 1\n\t"
- ".set\treorder"
- : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
- : "m" (lock->lock)
- : "memory");
-
- return res == 0;
-}
-
-/*
- * Read-write spinlocks, allowing multiple readers but only one writer.
- *
- * NOTE! it is quite common to have readers in interrupts but no interrupt
- * writers. For those circumstances we can "mix" irq-safe locks - any writer
- * needs to get a irq-safe write-lock, but readers can get non-irqsafe
- * read-locks.
- */
-
-typedef struct {
- volatile unsigned int lock;
-} rwlock_t;
-
-#define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
-
-#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
-
-#define rwlock_is_locked(x) ((x)->lock)
-
-static inline void _raw_read_lock(rwlock_t *rw)
-{
- unsigned int tmp;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# read_lock\n"
- "1:\tll\t%1, %2\n\t"
- "bltz\t%1, 1b\n\t"
- " addu\t%1, 1\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (rw->lock), "=&r" (tmp)
- : "m" (rw->lock)
- : "memory");
-}
-
-/* Note the use of sub, not subu which will make the kernel die with an
- overflow exception if we ever try to unlock an rwlock that is already
- unlocked or is being held by a writer. */
-static inline void _raw_read_unlock(rwlock_t *rw)
-{
- unsigned int tmp;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# read_unlock\n"
- "1:\tll\t%1, %2\n\t"
- "sub\t%1, 1\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (rw->lock), "=&r" (tmp)
- : "m" (rw->lock)
- : "memory");
-}
-
-static inline void _raw_write_lock(rwlock_t *rw)
-{
- unsigned int tmp;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# write_lock\n"
- "1:\tll\t%1, %2\n\t"
- "bnez\t%1, 1b\n\t"
- " lui\t%1, 0x8000\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (rw->lock), "=&r" (tmp)
- : "m" (rw->lock)
- : "memory");
-}
-
-static inline void _raw_write_unlock(rwlock_t *rw)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# write_unlock\n\t"
- "sync\n\t"
- "sw\t$0, %0\n\t"
- ".set\treorder"
- : "=m" (rw->lock)
- : "m" (rw->lock)
- : "memory");
-}
-
-#endif /* _ASM_SPINLOCK_H */
diff -Nru a/include/asm-mips64/stackframe.h b/include/asm-mips64/stackframe.h
--- a/include/asm-mips64/stackframe.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,267 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1999 Ralf Baechle
- * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef __ASM_STACKFRAME_H
-#define __ASM_STACKFRAME_H
-
-#include <linux/config.h>
-#include <linux/threads.h>
-
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/processor.h>
-#include <asm/addrspace.h>
-
-#ifndef __ASSEMBLY__
-
-#define __str2(x) #x
-#define __str(x) __str2(x)
-
-#define save_static(frame) \
- __asm__ __volatile__( \
- "sd\t$16,"__str(PT_R16)"(%0)\n\t" \
- "sd\t$17,"__str(PT_R17)"(%0)\n\t" \
- "sd\t$18,"__str(PT_R18)"(%0)\n\t" \
- "sd\t$19,"__str(PT_R19)"(%0)\n\t" \
- "sd\t$20,"__str(PT_R20)"(%0)\n\t" \
- "sd\t$21,"__str(PT_R21)"(%0)\n\t" \
- "sd\t$22,"__str(PT_R22)"(%0)\n\t" \
- "sd\t$23,"__str(PT_R23)"(%0)\n\t" \
- "sd\t$30,"__str(PT_R30)"(%0)\n\t" \
- : /* No outputs */ \
- : "r" (frame))
-
-#endif /* !__ASSEMBLY__ */
-
-#ifdef __ASSEMBLY__
-
- .macro SAVE_AT
- .set push
- .set noat
- sd $1, PT_R1(sp)
- .set pop
- .endm
-
- .macro SAVE_TEMP
- mfhi v1
- sd $8, PT_R8(sp)
- sd $9, PT_R9(sp)
- sd v1, PT_HI(sp)
- mflo v1
- sd $10, PT_R10(sp)
- sd $11, PT_R11(sp)
- sd v1, PT_LO(sp)
- sd $12, PT_R12(sp)
- sd $13, PT_R13(sp)
- sd $14, PT_R14(sp)
- sd $15, PT_R15(sp)
- sd $24, PT_R24(sp)
- .endm
-
- .macro SAVE_STATIC
- sd $16, PT_R16(sp)
- sd $17, PT_R17(sp)
- sd $18, PT_R18(sp)
- sd $19, PT_R19(sp)
- sd $20, PT_R20(sp)
- sd $21, PT_R21(sp)
- sd $22, PT_R22(sp)
- sd $23, PT_R23(sp)
- sd $30, PT_R30(sp)
- .endm
-
-#ifdef CONFIG_SMP
- .macro get_saved_sp /* SMP variation */
- dmfc0 k1, CP0_CONTEXT
- dsra k1, 23
- lui k0, %hi(pgd_current)
- daddiu k0, %lo(pgd_current)
- dsubu k1, k0
- lui k0, %hi(kernelsp)
- daddu k1, k0
- ld k1, %lo(kernelsp)(k1)
- .endm
-
- .macro set_saved_sp stackp temp temp2
- lw \temp, TI_CPU(gp)
- dsll \temp, 3
- lui \temp2, %hi(kernelsp)
- daddu \temp, \temp2
- sd \stackp, %lo(kernelsp)(\temp)
- .endm
-#else
- .macro get_saved_sp /* Uniprocessor variation */
- lui k1, %hi(kernelsp)
- ld k1, %lo(kernelsp)(k1)
- .endm
-
- .macro set_saved_sp stackp temp temp2
- sd \stackp, kernelsp
- .endm
-#endif
- .macro declare_saved_sp
- .comm kernelsp, NR_CPUS * 8, 8
- .endm
-
- .macro SAVE_SOME
- .set push
- .set reorder
- mfc0 k0, CP0_STATUS
- sll k0, 3 /* extract cu0 bit */
- .set noreorder
- bltz k0, 8f
- move k1, sp
- .set reorder
- /* Called from user mode, new stack. */
- get_saved_sp
-8: move k0, sp
- dsubu sp, k1, PT_SIZE
- sd k0, PT_R29(sp)
- sd $3, PT_R3(sp)
- sd $0, PT_R0(sp)
- mfc0 v1, CP0_STATUS
- sd $2, PT_R2(sp)
- sd v1, PT_STATUS(sp)
- sd $4, PT_R4(sp)
- mfc0 v1, CP0_CAUSE
- sd $5, PT_R5(sp)
- sd v1, PT_CAUSE(sp)
- sd $6, PT_R6(sp)
- dmfc0 v1, CP0_EPC
- sd $7, PT_R7(sp)
- sd v1, PT_EPC(sp)
- sd $25, PT_R25(sp)
- sd $28, PT_R28(sp)
- sd $31, PT_R31(sp)
- ori $28, sp, 0x3fff
- xori $28, 0x3fff
- .set pop
- .endm
-
- .macro SAVE_ALL
- SAVE_SOME
- SAVE_AT
- SAVE_TEMP
- SAVE_STATIC
- .endm
-
- .macro RESTORE_AT
- .set push
- .set noat
- ld $1, PT_R1(sp)
- .set pop
- .endm
-
- .macro RESTORE_SP
- ld sp, PT_R29(sp)
- .endm
-
- .macro RESTORE_TEMP
- ld $24, PT_LO(sp)
- ld $8, PT_R8(sp)
- ld $9, PT_R9(sp)
- mtlo $24
- ld $24, PT_HI(sp)
- ld $10, PT_R10(sp)
- ld $11, PT_R11(sp)
- mthi $24
- ld $12, PT_R12(sp)
- ld $13, PT_R13(sp)
- ld $14, PT_R14(sp)
- ld $15, PT_R15(sp)
- ld $24, PT_R24(sp)
- .endm
-
- .macro RESTORE_STATIC
- ld $16, PT_R16(sp)
- ld $17, PT_R17(sp)
- ld $18, PT_R18(sp)
- ld $19, PT_R19(sp)
- ld $20, PT_R20(sp)
- ld $21, PT_R21(sp)
- ld $22, PT_R22(sp)
- ld $23, PT_R23(sp)
- ld $30, PT_R30(sp)
- .endm
-
- .macro RESTORE_SOME
- .set push
- .set reorder
- mfc0 t0, CP0_STATUS
- .set pop
- ori t0, 0x1f
- xori t0, 0x1f
- mtc0 t0, CP0_STATUS
- li v1, 0xff00
- and t0, v1
- ld v0, PT_STATUS(sp)
- nor v1, $0, v1
- and v0, v1
- or v0, t0
- mtc0 v0, CP0_STATUS
- ld v1, PT_EPC(sp)
- dmtc0 v1, CP0_EPC
- ld $31, PT_R31(sp)
- ld $28, PT_R28(sp)
- ld $25, PT_R25(sp)
- ld $7, PT_R7(sp)
- ld $6, PT_R6(sp)
- ld $5, PT_R5(sp)
- ld $4, PT_R4(sp)
- ld $3, PT_R3(sp)
- ld $2, PT_R2(sp)
- .endm
-
- .macro RESTORE_ALL
- RESTORE_SOME
- RESTORE_AT
- RESTORE_TEMP
- RESTORE_STATIC
- RESTORE_SP
- .endm
-
-/*
- * Move to kernel mode and disable interrupts.
- * Set cp0 enable bit as sign that we're running on the kernel stack
- */
- .macro CLI
- mfc0 t0, CP0_STATUS
- li t1, ST0_CU0|0x1f
- or t0, t1
- xori t0, 0x1f
- mtc0 t0, CP0_STATUS
- .endm
-
-/*
- * Move to kernel mode and enable interrupts.
- * Set cp0 enable bit as sign that we're running on the kernel stack
- */
- .macro STI
- mfc0 t0, CP0_STATUS
- li t1, ST0_CU0 | 0x1f
- or t0, t1
- xori t0, 0x1e
- mtc0 t0, CP0_STATUS
- .endm
-
-/*
- * Just move to kernel mode and leave interrupts as they are.
- * Set cp0 enable bit as sign that we're running on the kernel stack
- */
- .macro KMODE
- mfc0 t0, CP0_STATUS
- li t1, ST0_CU0 | 0x1e
- or t0, t1
- xori t0, 0x1e
- mtc0 t0, CP0_STATUS
- .endm
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __ASM_STACKFRAME_H */
diff -Nru a/include/asm-mips64/stat.h b/include/asm-mips64/stat.h
--- a/include/asm-mips64/stat.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,53 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999, 2000 Ralf Baechle
- * Copyright (C) 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_STAT_H
-#define _ASM_STAT_H
-
-#include <linux/types.h>
-
-/* The memory layout is the same as of struct stat64 of the 32-bit kernel. */
-struct stat {
- dev_t st_dev;
- unsigned int st_pad0[3]; /* Reserved for st_dev expansion */
-
- unsigned long st_ino;
-
- mode_t st_mode;
- nlink_t st_nlink;
-
- uid_t st_uid;
- gid_t st_gid;
-
- dev_t st_rdev;
- unsigned int st_pad1[3]; /* Reserved for st_rdev expansion */
-
- off_t st_size;
-
- /*
- * Actually this should be timestruc_t st_atime, st_mtime and st_ctime
- * but we don't have it under Linux.
- */
- unsigned int st_atime;
- unsigned int st_atime_nsec;
-
- unsigned int st_mtime;
- unsigned int st_mtime_nsec;
-
- unsigned int st_ctime;
- unsigned int st_ctime_nsec;
-
- unsigned int st_blksize;
- unsigned int st_pad2;
-
- unsigned long st_blocks;
-};
-
-#define STAT_HAVE_NSEC 1
-
-#endif /* _ASM_STAT_H */
diff -Nru a/include/asm-mips64/statfs.h b/include/asm-mips64/statfs.h
--- a/include/asm-mips64/statfs.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,54 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999 by Ralf Baechle
- */
-#ifndef _ASM_STATFS_H
-#define _ASM_STATFS_H
-
-#include <linux/posix_types.h>
-
-#ifndef __KERNEL_STRICT_NAMES
-
-#include <linux/types.h>
-
-typedef __kernel_fsid_t fsid_t;
-
-#endif
-
-struct statfs {
- long f_type;
-#define f_fstyp f_type
- long f_bsize;
- long f_frsize; /* Fragment size - unsupported */
- long f_blocks;
- long f_bfree;
- long f_files;
- long f_ffree;
-
- /* Linux specials */
- long f_bavail;
- __kernel_fsid_t f_fsid;
- long f_namelen;
- long f_spare[6];
-};
-
-struct statfs64 { /* Same as struct statfs */
- long f_type;
- long f_bsize;
- long f_frsize; /* Fragment size - unsupported */
- long f_blocks;
- long f_bfree;
- long f_files;
- long f_ffree;
-
- /* Linux specials */
- long f_bavail;
- __kernel_fsid_t f_fsid;
- long f_namelen;
- long f_spare[6];
-};
-
-#endif /* _ASM_STATFS_H */
diff -Nru a/include/asm-mips64/string.h b/include/asm-mips64/string.h
--- a/include/asm-mips64/string.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,24 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1994 - 2000 by Ralf Baechle
- * Copyright (c) 2000 by Silicon Graphics, Inc.
- */
-#ifndef _ASM_STRING_H
-#define _ASM_STRING_H
-
-#define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
-
-#define __HAVE_ARCH_MEMCPY
-extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
-
-#define __HAVE_ARCH_MEMMOVE
-extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
-
-/* Don't build bcopy at all ... */
-#define __HAVE_ARCH_BCOPY
-
-#endif /* _ASM_STRING_H */
diff -Nru a/include/asm-mips64/suspend.h b/include/asm-mips64/suspend.h
--- a/include/asm-mips64/suspend.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,6 +0,0 @@
-#ifndef __ASM_SUSPEND_H
-#define __ASM_SUSPEND_H
-
-/* Somewhen... Maybe :-) */
-
-#endif /* __ASM_SUSPEND_H */
diff -Nru a/include/asm-mips64/sysmips.h b/include/asm-mips64/sysmips.h
--- a/include/asm-mips64/sysmips.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,24 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1999 by Ralf Baechle
- * Copyright 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_SYSMIPS_H
-#define _ASM_SYSMIPS_H
-
-/*
- * Commands for the sysmips(2) call
- *
- * sysmips(2) is deprecated - though some existing software uses it.
- * We only support the following commands.
- */
-#define SETNAME 1 /* set hostname */
-#define FLUSH_CACHE 3 /* writeback and invalidate caches */
-#define MIPS_FIXADE 7 /* control address error fixing */
-#define MIPS_RDNVRAM 10 /* read NVRAM */
-#define MIPS_ATOMIC_SET 2001 /* atomically set variable */
-
-#endif /* _ASM_SYSMIPS_H */
diff -Nru a/include/asm-mips64/system.h b/include/asm-mips64/system.h
--- a/include/asm-mips64/system.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,356 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 by Ralf Baechle
- * Modified further for R[236]000 by Paul M. Antoine, 1996
- * Copyright (C) 1999 Silicon Graphics
- */
-#ifndef _ASM_SYSTEM_H
-#define _ASM_SYSTEM_H
-
-#include <linux/config.h>
-#include <asm/sgidefs.h>
-
-#include <linux/kernel.h>
-
-#include <asm/addrspace.h>
-#include <asm/ptrace.h>
-
-__asm__ (
- ".macro\tlocal_irq_enable\n\t"
- ".set\tpush\n\t"
- ".set\treorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1,$12\n\t"
- "ori\t$1,0x1f\n\t"
- "xori\t$1,0x1e\n\t"
- "mtc0\t$1,$12\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-extern inline void local_irq_enable(void)
-{
- __asm__ __volatile__(
- "local_irq_enable"
- : /* no outputs */
- : /* no inputs */
- : "memory");
-}
-
-/*
- * For cli() we have to insert nops to make sure that the new value
- * has actually arrived in the status register before the end of this
- * macro.
- * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
- * no nops at all.
- */
-__asm__ (
- ".macro\tlocal_irq_disable\n\t"
- ".set\tpush\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1,$12\n\t"
- "ori\t$1,1\n\t"
- "xori\t$1,1\n\t"
- ".set\tnoreorder\n\t"
- "mtc0\t$1,$12\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-extern inline void local_irq_disable(void)
-{
- __asm__ __volatile__(
- "local_irq_disable"
- : /* no outputs */
- : /* no inputs */
- : "memory");
-}
-
-__asm__ (
- ".macro\tlocal_save_flags flags\n\t"
- ".set\tpush\n\t"
- ".set\treorder\n\t"
- "mfc0\t\\flags, $12\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-#define local_save_flags(x) \
-__asm__ __volatile__( \
- "local_save_flags %0" \
- : "=r" (x))
-
-__asm__ (
- ".macro\tlocal_irq_save result\n\t"
- ".set\tpush\n\t"
- ".set\treorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t\\result, $12\n\t"
- "ori\t$1, \\result, 1\n\t"
- "xori\t$1, 1\n\t"
- ".set\tnoreorder\n\t"
- "mtc0\t$1, $12\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-#define local_irq_save(x) \
-__asm__ __volatile__( \
- "local_irq_save\t%0" \
- : "=r" (x) \
- : /* no inputs */ \
- : "memory")
-
-__asm__(".macro\tlocal_irq_restore flags\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1, $12\n\t"
- "andi\t\\flags, 1\n\t"
- "ori\t$1, 1\n\t"
- "xori\t$1, 1\n\t"
- "or\t\\flags, $1\n\t"
- "mtc0\t\\flags, $12\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- "sll\t$0, $0, 1\t\t\t# nop\n\t"
- ".set\tat\n\t"
- ".set\treorder\n\t"
- ".endm");
-
-#define local_irq_restore(flags) \
-do { \
- unsigned long __tmp1; \
- \
- __asm__ __volatile__( \
- "local_irq_restore\t%0" \
- : "=r" (__tmp1) \
- : "0" (flags) \
- : "memory"); \
-} while(0)
-
-#define irqs_disabled() \
-({ \
- unsigned long flags; \
- local_save_flags(flags); \
- !(flags & 1); \
-})
-
-/*
- * read_barrier_depends - Flush all pending reads that subsequents reads
- * depend on.
- *
- * No data-dependent reads from memory-like regions are ever reordered
- * over this barrier. All reads preceding this primitive are guaranteed
- * to access memory (but not necessarily other CPUs' caches) before any
- * reads following this primitive that depend on the data return by
- * any of the preceding reads. This primitive is much lighter weight than
- * rmb() on most CPUs, and is never heavier weight than is
- * rmb().
- *
- * These ordering constraints are respected by both the local CPU
- * and the compiler.
- *
- * Ordering is not guaranteed by anything other than these primitives,
- * not even by data dependencies. See the documentation for
- * memory_barrier() for examples and URLs to more information.
- *
- * For example, the following code would force ordering (the initial
- * value of "a" is zero, "b" is one, and "p" is "&a"):
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * b = 2;
- * memory_barrier();
- * p = &b; q = p;
- * read_barrier_depends();
- * d = *q;
- * </programlisting>
- *
- * because the read of "*q" depends on the read of "p" and these
- * two reads are separated by a read_barrier_depends(). However,
- * the following code, with the same initial values for "a" and "b":
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * a = 2;
- * memory_barrier();
- * b = 3; y = b;
- * read_barrier_depends();
- * x = a;
- * </programlisting>
- *
- * does not enforce ordering, since there is no data dependency between
- * the read of "a" and the read of "b". Therefore, on some CPUs, such
- * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
- * in cases like thiswhere there are no data dependencies.
- */
-
-#define read_barrier_depends() do { } while(0)
-
-#ifdef CONFIG_CPU_HAS_SYNC
-#define __sync() \
- __asm__ __volatile__( \
- ".set push\n\t" \
- ".set noreorder\n\t" \
- "sync\n\t" \
- ".set pop" \
- : /* no output */ \
- : /* no input */ \
- : "memory")
-#else
-#define __sync() do { } while(0)
-#endif
-
-#define __fast_iob() \
- __asm__ __volatile__( \
- ".set push\n\t" \
- ".set noreorder\n\t" \
- "lw $0,%0\n\t" \
- "nop\n\t" \
- ".set pop" \
- : /* no output */ \
- : "m" (*(int *)KSEG1) \
- : "memory")
-
-#define fast_wmb() __sync()
-#define fast_rmb() __sync()
-#define fast_mb() __sync()
-#define fast_iob() \
- do { \
- __sync(); \
- __asm__ __volatile__( \
- ".set push\n\t" \
- ".set noreorder\n\t" \
- "lw $0,%0\n\t" \
- "nop\n\t" \
- ".set pop" \
- : /* no output */ \
- : "m" (*(int *)KSEG1) \
- : "memory"); \
- } while (0)
-
-#define wmb() fast_wmb()
-#define rmb() fast_rmb()
-#define mb() fast_mb()
-#define iob() fast_iob()
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif
-
-#define set_mb(var, value) \
-do { var = value; mb(); } while (0)
-
-#define set_wmb(var, value) \
-do { var = value; wmb(); } while (0)
-
-/*
- * switch_to(n) should switch tasks to task nr n, first
- * checking that n isn't the current task, in which case it does nothing.
- */
-extern asmlinkage void *resume(void *last, void *next, void *next_ti);
-
-struct task_struct;
-
-#define switch_to(prev,next,last) \
-do { \
- (last) = resume(prev, next, next->thread_info); \
-} while(0)
-
-extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
-{
- unsigned long dummy;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t\t# xchg_u32\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnomacro\n\t"
- "ll\t%0, %3\n"
- "1:\tmove\t%2, %z4\n\t"
- "sc\t%2, %1\n\t"
- "beqzl\t%2, 1b\n\t"
- " ll\t%0, %3\n\t"
- "sync\n\t"
- ".set\tpop"
- : "=&r" (val), "=m" (*m), "=&r" (dummy)
- : "R" (*m), "Jr" (val)
- : "memory");
-
- return val;
-}
-
-extern __inline__ unsigned long xchg_u64(volatile int * m, unsigned long val)
-{
- unsigned long dummy;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t\t# xchg_u64\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnomacro\n\t"
- "lld\t%0, %3\n"
- "1:\tmove\t%2, %z4\n\t"
- "scd\t%2, %1\n\t"
- "beqzl\t%2, 1b\n\t"
- " lld\t%0, %3\n\t"
- "sync\n\t"
- ".set\tpop"
- : "=&r" (val), "=m" (*m), "=&r" (dummy)
- : "R" (*m), "Jr" (val)
- : "memory");
-
- return val;
-}
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-#define tas(ptr) (xchg((ptr),1))
-
-
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr,
- int size)
-{
- switch (size) {
- case 4:
- return xchg_u32(ptr, x);
- case 8:
- return xchg_u64(ptr, x);
- }
- return x;
-}
-
-extern void *set_except_vector(int n, void *addr);
-extern void per_cpu_trap_init(void);
-
-extern void __die(const char *, struct pt_regs *, const char *file,
- const char *func, unsigned long line) __attribute__((noreturn));
-extern void __die_if_kernel(const char *, struct pt_regs *, const char *file,
- const char *func, unsigned long line);
-
-#define die(msg, regs) \
- __die(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__)
-#define die_if_kernel(msg, regs) \
- __die_if_kernel(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__)
-
-extern int serial_console;
-extern int stop_a_enabled;
-
-static __inline__ int con_is_present(void)
-{
- return serial_console ? 0 : 1;
-}
-
-#endif /* _ASM_SYSTEM_H */
diff -Nru a/include/asm-mips64/termbits.h b/include/asm-mips64/termbits.h
--- a/include/asm-mips64/termbits.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,206 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1999, 2001 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Copyright (C) 2001 MIPS Technologies, Inc.
- */
-#ifndef _ASM_TERMBITS_H
-#define _ASM_TERMBITS_H
-
-#include <linux/posix_types.h>
-
-typedef unsigned char cc_t;
-#if (_MIPS_SZLONG == 32)
-typedef unsigned long speed_t;
-typedef unsigned long tcflag_t;
-#endif
-#if (_MIPS_SZLONG == 64)
-typedef __u32 speed_t;
-typedef __u32 tcflag_t;
-#endif
-
-/*
- * The ABI says nothing about NCC but seems to use NCCS as
- * replacement for it in struct termio
- */
-#define NCCS 23
-struct termios {
- tcflag_t c_iflag; /* input mode flags */
- tcflag_t c_oflag; /* output mode flags */
- tcflag_t c_cflag; /* control mode flags */
- tcflag_t c_lflag; /* local mode flags */
- cc_t c_line; /* line discipline */
- cc_t c_cc[NCCS]; /* control characters */
-};
-
-/* c_cc characters */
-#define VINTR 0 /* Interrupt character [ISIG]. */
-#define VQUIT 1 /* Quit character [ISIG]. */
-#define VERASE 2 /* Erase character [ICANON]. */
-#define VKILL 3 /* Kill-line character [ICANON]. */
-#define VMIN 4 /* Minimum number of bytes read at once [!ICANON]. */
-#define VTIME 5 /* Time-out value (tenths of a second) [!ICANON]. */
-#define VEOL2 6 /* Second EOL character [ICANON]. */
-#define VSWTC 7 /* ??? */
-#define VSWTCH VSWTC
-#define VSTART 8 /* Start (X-ON) character [IXON, IXOFF]. */
-#define VSTOP 9 /* Stop (X-OFF) character [IXON, IXOFF]. */
-#define VSUSP 10 /* Suspend character [ISIG]. */
-#if 0
-/*
- * VDSUSP is not supported
- */
-#define VDSUSP 11 /* Delayed suspend character [ISIG]. */
-#endif
-#define VREPRINT 12 /* Reprint-line character [ICANON]. */
-#define VDISCARD 13 /* Discard character [IEXTEN]. */
-#define VWERASE 14 /* Word-erase character [ICANON]. */
-#define VLNEXT 15 /* Literal-next character [IEXTEN]. */
-#define VEOF 16 /* End-of-file character [ICANON]. */
-#define VEOL 17 /* End-of-line character [ICANON]. */
-
-/* c_iflag bits */
-#define IGNBRK 0000001 /* Ignore break condition. */
-#define BRKINT 0000002 /* Signal interrupt on break. */
-#define IGNPAR 0000004 /* Ignore characters with parity errors. */
-#define PARMRK 0000010 /* Mark parity and framing errors. */
-#define INPCK 0000020 /* Enable input parity check. */
-#define ISTRIP 0000040 /* Strip 8th bit off characters. */
-#define INLCR 0000100 /* Map NL to CR on input. */
-#define IGNCR 0000200 /* Ignore CR. */
-#define ICRNL 0000400 /* Map CR to NL on input. */
-#define IUCLC 0001000 /* Map upper case to lower case on input. */
-#define IXON 0002000 /* Enable start/stop output control. */
-#define IXANY 0004000 /* Any character will restart after stop. */
-#define IXOFF 0010000 /* Enable start/stop input control. */
-#define IMAXBEL 0020000 /* Ring bell when input queue is full. */
-
-/* c_oflag bits */
-#define OPOST 0000001 /* Perform output processing. */
-#define OLCUC 0000002 /* Map lower case to upper case on output. */
-#define ONLCR 0000004 /* Map NL to CR-NL on output. */
-#define OCRNL 0000010
-#define ONOCR 0000020
-#define ONLRET 0000040
-#define OFILL 0000100
-#define OFDEL 0000200
-#define NLDLY 0000400
-#define NL0 0000000
-#define NL1 0000400
-#define CRDLY 0003000
-#define CR0 0000000
-#define CR1 0001000
-#define CR2 0002000
-#define CR3 0003000
-#define TABDLY 0014000
-#define TAB0 0000000
-#define TAB1 0004000
-#define TAB2 0010000
-#define TAB3 0014000
-#define XTABS 0014000
-#define BSDLY 0020000
-#define BS0 0000000
-#define BS1 0020000
-#define VTDLY 0040000
-#define VT0 0000000
-#define VT1 0040000
-#define FFDLY 0100000
-#define FF0 0000000
-#define FF1 0100000
-/*
-#define PAGEOUT ???
-#define WRAP ???
- */
-
-/* c_cflag bit meaning */
-#define CBAUD 0010017
-#define B0 0000000 /* hang up */
-#define B50 0000001
-#define B75 0000002
-#define B110 0000003
-#define B134 0000004
-#define B150 0000005
-#define B200 0000006
-#define B300 0000007
-#define B600 0000010
-#define B1200 0000011
-#define B1800 0000012
-#define B2400 0000013
-#define B4800 0000014
-#define B9600 0000015
-#define B19200 0000016
-#define B38400 0000017
-#define EXTA B19200
-#define EXTB B38400
-#define CSIZE 0000060 /* Number of bits per byte (mask). */
-#define CS5 0000000 /* 5 bits per byte. */
-#define CS6 0000020 /* 6 bits per byte. */
-#define CS7 0000040 /* 7 bits per byte. */
-#define CS8 0000060 /* 8 bits per byte. */
-#define CSTOPB 0000100 /* Two stop bits instead of one. */
-#define CREAD 0000200 /* Enable receiver. */
-#define PARENB 0000400 /* Parity enable. */
-#define PARODD 0001000 /* Odd parity instead of even. */
-#define HUPCL 0002000 /* Hang up on last close. */
-#define CLOCAL 0004000 /* Ignore modem status lines. */
-#define CBAUDEX 0010000
-#define B57600 0010001
-#define B115200 0010002
-#define B230400 0010003
-#define B460800 0010004
-#define B500000 0010005
-#define B576000 0010006
-#define B921600 0010007
-#define B1000000 0010010
-#define B1152000 0010011
-#define B1500000 0010012
-#define B2000000 0010013
-#define B2500000 0010014
-#define B3000000 0010015
-#define B3500000 0010016
-#define B4000000 0010017
-#define CIBAUD 002003600000 /* input baud rate (not used) */
-#define CMSPAR 010000000000 /* mark or space (stick) parity */
-#define CRTSCTS 020000000000 /* flow control */
-
-/* c_lflag bits */
-#define ISIG 0000001 /* Enable signals. */
-#define ICANON 0000002 /* Do erase and kill processing. */
-#define XCASE 0000004
-#define ECHO 0000010 /* Enable echo. */
-#define ECHOE 0000020 /* Visual erase for ERASE. */
-#define ECHOK 0000040 /* Echo NL after KILL. */
-#define ECHONL 0000100 /* Echo NL even if ECHO is off. */
-#define NOFLSH 0000200 /* Disable flush after interrupt. */
-#define IEXTEN 0000400 /* Enable DISCARD and LNEXT. */
-#define ECHOCTL 0001000 /* Echo control characters as ^X. */
-#define ECHOPRT 0002000 /* Hardcopy visual erase. */
-#define ECHOKE 0004000 /* Visual erase for KILL. */
-#define FLUSHO 0020000
-#define PENDIN 0040000 /* Retype pending input (state). */
-#define TOSTOP 0100000 /* Send SIGTTOU for background output. */
-#define ITOSTOP TOSTOP
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
-
-/* tcflow() and TCXONC use these */
-#define TCOOFF 0 /* Suspend output. */
-#define TCOON 1 /* Restart suspended output. */
-#define TCIOFF 2 /* Send a STOP character. */
-#define TCION 3 /* Send a START character. */
-
-/* tcflush() and TCFLSH use these */
-#define TCIFLUSH 0 /* Discard data received but not yet read. */
-#define TCOFLUSH 1 /* Discard data written but not yet sent. */
-#define TCIOFLUSH 2 /* Discard all pending data. */
-
-/* tcsetattr uses these */
-#define TCSANOW TCSETS /* Change immediately. */
-#define TCSADRAIN TCSETSW /* Change when pending output is written. */
-#define TCSAFLUSH TCSETSF /* Flush pending input before changing. */
-
-#endif /* _ASM_TERMBITS_H */
diff -Nru a/include/asm-mips64/termios.h b/include/asm-mips64/termios.h
--- a/include/asm-mips64/termios.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,146 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 2000, 2001 by Ralf Baechle
- * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef _ASM_TERMIOS_H
-#define _ASM_TERMIOS_H
-
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct sgttyb {
- char sg_ispeed;
- char sg_ospeed;
- char sg_erase;
- char sg_kill;
- int sg_flags; /* SGI special - int, not short */
-};
-
-struct tchars {
- char t_intrc;
- char t_quitc;
- char t_startc;
- char t_stopc;
- char t_eofc;
- char t_brkc;
-};
-
-struct ltchars {
- char t_suspc; /* stop process signal */
- char t_dsuspc; /* delayed stop process signal */
- char t_rprntc; /* reprint line */
- char t_flushc; /* flush output (toggles) */
- char t_werasc; /* word erase */
- char t_lnextc; /* literal next character */
-};
-
-/* TIOCGSIZE, TIOCSSIZE not defined yet. Only needed for SunOS source
- compatibility anyway ... */
-
-struct winsize {
- unsigned short ws_row;
- unsigned short ws_col;
- unsigned short ws_xpixel;
- unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
- unsigned short c_iflag; /* input mode flags */
- unsigned short c_oflag; /* output mode flags */
- unsigned short c_cflag; /* control mode flags */
- unsigned short c_lflag; /* local mode flags */
- char c_line; /* line discipline */
- unsigned char c_cc[NCCS]; /* control characters */
-};
-
-#ifdef __KERNEL__
-/*
- * intr=^C quit=^\ erase=del kill=^U
- * vmin=\1 vtime=\0 eol2=\0 swtc=\0
- * start=^Q stop=^S susp=^Z vdsusp=
- * reprint=^R discard=^U werase=^W lnext=^V
- * eof=^D eol=\0
- */
-#define INIT_C_CC "\003\034\177\025\1\0\0\0\021\023\032\0\022\017\027\026\004\0"
-#endif
-
-/* modem lines */
-#define TIOCM_LE 0x001 /* line enable */
-#define TIOCM_DTR 0x002 /* data terminal ready */
-#define TIOCM_RTS 0x004 /* request to send */
-#define TIOCM_ST 0x010 /* secondary transmit */
-#define TIOCM_SR 0x020 /* secondary receive */
-#define TIOCM_CTS 0x040 /* clear to send */
-#define TIOCM_CAR 0x100 /* carrier detect */
-#define TIOCM_CD TIOCM_CAR
-#define TIOCM_RNG 0x200 /* ring */
-#define TIOCM_RI TIOCM_RNG
-#define TIOCM_DSR 0x400 /* data set ready */
-#define TIOCM_OUT1 0x2000
-#define TIOCM_OUT2 0x4000
-#define TIOCM_LOOP 0x8000
-
-/* line disciplines */
-#define N_TTY 0
-#define N_SLIP 1
-#define N_MOUSE 2
-#define N_PPP 3
-#define N_STRIP 4
-#define N_AX25 5
-#define N_X25 6 /* X.25 async */
-#define N_6PACK 7
-#define N_MASC 8 /* Reserved fo Mobitex module <kaz@cafe.net> */
-#define N_R3964 9 /* Reserved for Simatic R3964 module */
-#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
-#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */
-#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
-#define N_HDLC 13 /* synchronous HDLC */
-#define N_SYNC_PPP 14 /* synchronous PPP */
-#define N_HCI 15 /* Bluetooth HCI UART */
-
-#ifdef __KERNEL__
-
-#include <linux/string.h>
-
-/*
- * Translate a "termio" structure into a "termios". Ugh.
- */
-#define user_termio_to_kernel_termios(termios, termio) \
-({ \
- unsigned short tmp; \
- get_user(tmp, &(termio)->c_iflag); \
- (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \
- get_user(tmp, &(termio)->c_oflag); \
- (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \
- get_user(tmp, &(termio)->c_cflag); \
- (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \
- get_user(tmp, &(termio)->c_lflag); \
- (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \
- get_user((termios)->c_line, &(termio)->c_line); \
- copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
-})
-
-/*
- * Translate a "termios" structure into a "termio". Ugh.
- */
-#define kernel_termios_to_user_termio(termio, termios) \
-({ \
- put_user((termios)->c_iflag, &(termio)->c_iflag); \
- put_user((termios)->c_oflag, &(termio)->c_oflag); \
- put_user((termios)->c_cflag, &(termio)->c_cflag); \
- put_user((termios)->c_lflag, &(termio)->c_lflag); \
- put_user((termios)->c_line, &(termio)->c_line); \
- copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
-})
-
-#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
-#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
-
-#endif /* defined(__KERNEL__) */
-
-#endif /* _ASM_TERMIOS_H */
diff -Nru a/include/asm-mips64/thread_info.h b/include/asm-mips64/thread_info.h
--- a/include/asm-mips64/thread_info.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,103 +0,0 @@
-/* thread_info.h: i386 low-level thread information
- *
- * Copyright (C) 2002 David Howells (dhowells@redhat.com)
- * - Incorporating suggestions made by Linus Torvalds and Dave Miller
- */
-
-#ifndef _ASM_THREAD_INFO_H
-#define _ASM_THREAD_INFO_H
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-
-#include <asm/processor.h>
-
-/*
- * low level task data that entry.S needs immediate access to
- * - this struct should fit entirely inside of one cache line
- * - this struct shares the supervisor stack pages
- * - if the contents of this structure are changed, the assembly constants
- * must also be changed
- */
-struct thread_info {
- struct task_struct *task; /* main task structure */
- struct exec_domain *exec_domain; /* execution domain */
- unsigned long flags; /* low level flags */
- __u32 cpu; /* current CPU */
- __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
-
- mm_segment_t addr_limit; /* thread address space:
- 0-0xBFFFFFFF for user-thead
- 0-0xFFFFFFFF for kernel-thread
- */
- struct restart_block restart_block;
-};
-
-#define PREEMPT_ACTIVE 0x4000000
-
-/*
- * macros/functions for gaining access to the thread information structure
- *
- * preempt_count needs to be 1 initially, until the scheduler is functional.
- */
-#define INIT_THREAD_INFO(tsk) \
-{ \
- .task = &tsk, \
- .exec_domain = &default_exec_domain, \
- .flags = 0, \
- .cpu = 0, \
- .preempt_count = 1, \
- .addr_limit = KERNEL_DS, \
- .restart_block = { \
- .fn = do_no_restart_syscall, \
- }, \
-}
-
-#define init_thread_info (init_thread_union.thread_info)
-#define init_stack (init_thread_union.stack)
-
-/* How to get the thread information struct from C. */
-register struct thread_info *__current_thread_info __asm__("$28");
-#define current_thread_info() __current_thread_info
-
-/* thread information allocation */
-#define THREAD_SIZE_ORDER (2)
-#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
-#define alloc_thread_info(tsk) ((struct thread_info *) \
- __get_free_pages(GFP_KERNEL,THREAD_SIZE_ORDER))
-#define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_SIZE_ORDER)
-#define get_thread_info(ti) get_task_struct((ti)->task)
-#define put_thread_info(ti) put_task_struct((ti)->task)
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * thread information flags
- * - these are process state flags that various assembly files may need to
- * access
- * - pending work-to-be-done flags are in LSW
- * - other flags in MSW
- */
-#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
-#define TIF_SIGPENDING 2 /* signal pending */
-#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
-#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
-#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
-#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
-
-#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
-#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
-#define _TIF_USEDFPU (1<<TIF_USEDFPU)
-#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
-
-#define _TIF_WORK_MASK 0x0000fffe /* work to do on
- interrupt/exception return */
-#define _TIF_ALLWORK_MASK 0x8000fffe /* work to do on any return to
- u-space */
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_THREAD_INFO_H */
diff -Nru a/include/asm-mips64/time.h b/include/asm-mips64/time.h
--- a/include/asm-mips64/time.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2001, 2002, MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * include/asm-mips/time.h
- * header file for the new style time.c file and time services.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * Please refer to Documentation/mips/time.README.
- */
-#ifndef _ASM_TIME_H
-#define _ASM_TIME_H
-
-#include <linux/interrupt.h>
-#include <linux/linkage.h>
-#include <linux/ptrace.h>
-#include <linux/rtc.h>
-
-/*
- * RTC ops. By default, they point a no-RTC functions.
- * rtc_get_time - mktime(year, mon, day, hour, min, sec) in seconds.
- * rtc_set_time - reverse the above translation and set time to RTC.
- */
-extern unsigned long (*rtc_get_time)(void);
-extern int (*rtc_set_time)(unsigned long);
-
-/*
- * to_tm() converts system time back to (year, mon, day, hour, min, sec).
- * It is intended to help implement rtc_set_time() functions.
- * Copied from PPC implementation.
- */
-extern void to_tm(unsigned long tim, struct rtc_time * tm);
-
-/*
- * do_gettimeoffset(). By default, this func pointer points to
- * do_null_gettimeoffset(), which leads to the same resolution as HZ.
- * Higher resolution versions are vailable, which gives ~1us resolution.
- */
-extern unsigned long (*do_gettimeoffset)(void);
-
-extern unsigned long null_gettimeoffset(void);
-extern unsigned long fixed_rate_gettimeoffset(void);
-extern unsigned long calibrate_div32_gettimeoffset(void);
-extern unsigned long calibrate_div64_gettimeoffset(void);
-
-/*
- * high-level timer interrupt routines.
- */
-extern irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-
-/*
- * the corresponding low-level timer interrupt routine.
- */
-asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs);
-
-/*
- * profiling and process accouting is done separately in local_timer_interrupt
- */
-void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
-
-/*
- * board specific routines required by time_init().
- * board_time_init is defaulted to NULL and can remains so.
- * board_timer_setup must be setup properly in machine setup routine.
- */
-struct irqaction;
-extern void (*board_time_init)(void);
-extern void (*board_timer_setup)(struct irqaction *irq);
-
-/*
- * mips_counter_frequency - must be set if you intend to use
- * counter as timer interrupt source or use fixed_rate_gettimeoffset.
- */
-extern unsigned int mips_counter_frequency;
-
-#endif /* _ASM_TIME_H */
diff -Nru a/include/asm-mips64/timex.h b/include/asm-mips64/timex.h
--- a/include/asm-mips64/timex.h Sun Aug 3 13:14:52 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,40 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 1999 by Ralf Baechle
- *
- * FIXME: For some of the supported machines this is dead wrong.
- */
-#ifndef _ASM_TIMEX_H
-#define _ASM_TIMEX_H
-
-#include <asm/mipsregs.h>
-
-#define CLOCK_TICK_RATE 1193182 /* Underlying HZ */
-#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
-#define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
- (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \
- << (SHIFT_SCALE-SHIFT_HZ)) / HZ)
-
-/*
- * Standard way to access the cycle counter.
- * Currently only used on SMP for scheduling.
- *
- * Only the low 32 bits are available as a continuously counting entity.
- * But this only means we'll force a reschedule every 8 seconds or so,
- * which isn't an evil thing.
- *
- * We know that all SMP capable CPUs have cycle counters.
- */
-
-typedef unsigned int cycles_t;
-extern cycles_t cacheflush_time;
-
-static inline cycles_t get_cycles (void)
-{
- return read_c0_count();
-}
-
-#endif /* _ASM_TIMEX_H */
diff -Nru a/include/asm-mips64/tlb.h b/include/asm-mips64/tlb.h
--- a/include/asm-mips64/tlb.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,18 +0,0 @@
-#ifndef __ASM_TLB_H
-#define __ASM_TLB_H
-
-/*
- * MIPS doesn't need any special per-pte or per-vma handling..
- */
-#define tlb_start_vma(tlb, vma) do { } while (0)
-#define tlb_end_vma(tlb, vma) do { } while (0)
-#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
-
-/*
- * .. because we flush the whole mm when it fills up.
- */
-#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
-
-#include <asm-generic/tlb.h>
-
-#endif /* __ASM_TLB_H */
diff -Nru a/include/asm-mips64/tlbdebug.h b/include/asm-mips64/tlbdebug.h
--- a/include/asm-mips64/tlbdebug.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,20 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2002 by Ralf Baechle
- */
-#ifndef __ASM_TLBDEBUG_H
-#define __ASM_TLBDEBUG_H
-
-/*
- * TLB debugging functions:
- */
-extern void dump_tlb(int first, int last);
-extern void dump_tlb_all(void);
-extern void dump_tlb_wired(void);
-extern void dump_tlb_addr(unsigned long addr);
-extern void dump_tlb_nonwired(void);
-
-#endif /* __ASM_TLBDEBUG_H */
diff -Nru a/include/asm-mips64/tlbflush.h b/include/asm-mips64/tlbflush.h
--- a/include/asm-mips64/tlbflush.h Sun Aug 3 13:14:46 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,52 +0,0 @@
-#ifndef __ASM_TLBFLUSH_H
-#define __ASM_TLBFLUSH_H
-
-#include <linux/config.h>
-#include <linux/mm.h>
-
-/*
- * TLB flushing:
- *
- * - flush_tlb_all() flushes all processes TLB entries
- * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
- * - flush_tlb_page(vma, vmaddr) flushes a single page
- * - flush_tlb_range(vma, start, end) flushes a range of pages
- * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
- * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
- */
-extern void local_flush_tlb_all(void);
-extern void local_flush_tlb_mm(struct mm_struct *mm);
-extern void local_flush_tlb_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end);
-extern void local_flush_tlb_kernel_range(unsigned long start,
- unsigned long end);
-extern void local_flush_tlb_page(struct vm_area_struct *vma,
- unsigned long page);
-
-#ifdef CONFIG_SMP
-
-extern void flush_tlb_all(void);
-extern void flush_tlb_mm(struct mm_struct *mm);
-extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end);
-extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
-extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long);
-
-#else /* CONFIG_SMP */
-
-#define flush_tlb_all() local_flush_tlb_all()
-#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
-#define flush_tlb_range(vma,vmaddr,end) local_flush_tlb_range(vma, vmaddr, end)
-#define flush_tlb_kernel_range(vmaddr,end) \
- local_flush_tlb_kernel_range(vmaddr, end)
-#define flush_tlb_page(vma,page) local_flush_tlb_page(vma, page)
-
-#endif /* CONFIG_SMP */
-
-static inline void flush_tlb_pgtables(struct mm_struct *mm,
- unsigned long start, unsigned long end)
-{
- /* Nothing to do on MIPS. */
-}
-
-#endif /* __ASM_TLBFLUSH_H */
diff -Nru a/include/asm-mips64/topology.h b/include/asm-mips64/topology.h
--- a/include/asm-mips64/topology.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,13 +0,0 @@
-#ifndef __ASM_TOPOLOGY_H
-#define __ASM_TOPOLOGY_H
-
-#if CONFIG_SGI_IP27
-
-#include <asm/mmzone.h>
-
-#define cpu_to_node(cpu) (cputocnode(cpu))
-#endif
-
-#include <asm-generic/topology.h>
-
-#endif /* __ASM_TOPOLOGY_H */
diff -Nru a/include/asm-mips64/traps.h b/include/asm-mips64/traps.h
--- a/include/asm-mips64/traps.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,26 +0,0 @@
-/*
- * include/asm-mips64/traps.h
- *
- * Trap handling definitions.
- *
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS64_TRAPS_H
-#define __ASM_MIPS64_TRAPS_H
-
-/*
- * Possible status responses for a board_be_handler backend.
- */
-#define MIPS_BE_DISCARD 0 /* return with no action */
-#define MIPS_BE_FIXUP 1 /* return to the fixup code */
-#define MIPS_BE_FATAL 2 /* treat as an unrecoverable error */
-
-extern void (*board_be_init)(void);
-extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
-
-#endif /* __ASM_MIPS64_TRAPS_H */
diff -Nru a/include/asm-mips64/types.h b/include/asm-mips64/types.h
--- a/include/asm-mips64/types.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,87 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#ifndef _ASM_TYPES_H
-#define _ASM_TYPES_H
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned int umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if (_MIPS_SZLONG == 64)
-
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-
-#else
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#endif
-
-#endif
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#ifdef __KERNEL__
-
-#define BITS_PER_LONG _MIPS_SZLONG
-
-#ifndef __ASSEMBLY__
-
-typedef __signed char s8;
-typedef unsigned char u8;
-
-typedef __signed short s16;
-typedef unsigned short u16;
-
-typedef __signed int s32;
-typedef unsigned int u32;
-
-#if (_MIPS_SZLONG == 64)
-
-typedef __signed__ long s64;
-typedef unsigned long u64;
-
-#else
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long s64;
-typedef unsigned long long u64;
-#endif
-
-#endif
-
-typedef u64 dma_addr_t;
-typedef u64 dma64_addr_t;
-
-typedef unsigned long phys_t;
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_TYPES_H */
diff -Nru a/include/asm-mips64/uaccess.h b/include/asm-mips64/uaccess.h
--- a/include/asm-mips64/uaccess.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,468 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_UACCESS_H
-#define _ASM_UACCESS_H
-
-#include <linux/errno.h>
-#include <linux/thread_info.h>
-
-#define STR(x) __STR(x)
-#define __STR(x) #x
-
-/*
- * The fs value determines whether argument validity checking should be
- * performed or not. If get_fs() == USER_DS, checking is performed, with
- * get_fs() == KERNEL_DS, checking is bypassed.
- *
- * For historical reasons, these macros are grossly misnamed.
- */
-#define KERNEL_DS ((mm_segment_t) { 0UL })
-#define USER_DS ((mm_segment_t) { -TASK_SIZE })
-
-#define VERIFY_READ 0
-#define VERIFY_WRITE 1
-
-#define get_ds() (KERNEL_DS)
-#define get_fs() (current_thread_info()->addr_limit)
-#define set_fs(x) (current_thread_info()->addr_limit = (x))
-
-#define segment_eq(a,b) ((a).seg == (b).seg)
-
-
-/*
- * Is a address valid? This does a straighforward calculation rather
- * than tests.
- *
- * Address valid if:
- * - "addr" doesn't have any high-bits set
- * - AND "size" doesn't have any high-bits set
- * - AND "addr+size" doesn't have any high-bits set
- * - OR we are in kernel mode.
- */
-#define __ua_size(size) \
- ((__builtin_constant_p(size) && (size)) > 0 ? 0 : (size))
-
-#define __access_ok(addr, size, mask) \
- (((mask) & ((addr) | ((addr) + (size)) | __ua_size(size))) == 0)
-
-#define __access_mask get_fs().seg
-
-#define access_ok(type, addr, size) \
- __access_ok((unsigned long)(addr), (size), __access_mask)
-
-static inline int verify_area(int type, const void * addr, unsigned long size)
-{
- return access_ok(type, addr, size) ? 0 : -EFAULT;
-}
-
-/*
- * Uh, these should become the main single-value transfer routines ...
- * They automatically use the right size if we just have the right
- * pointer type ...
- *
- * As MIPS uses the same address space for kernel and user data, we
- * can just do these as direct assignments.
- *
- * Careful to not
- * (a) re-use the arguments for side effects (sizeof is ok)
- * (b) require any knowledge of processes at this stage
- */
-#define put_user(x,ptr) \
- __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-#define get_user(x,ptr) \
- __get_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-
-/*
- * The "__xxx" versions do not do address space checking, useful when
- * doing multiple accesses to the same area (the user has to do the
- * checks by hand with "access_ok()")
- */
-#define __put_user(x,ptr) \
- __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-#define __get_user(x,ptr) \
- __get_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-
-struct __large_struct { unsigned long buf[100]; };
-#define __m(x) (*(struct __large_struct *)(x))
-
-#define __get_user_nocheck(x,ptr,size) \
-({ \
- long __gu_err; \
- __typeof(*(ptr)) __gu_val; \
- long __gu_addr; \
- __asm__("":"=r" (__gu_val)); \
- __gu_addr = (long) (ptr); \
- __asm__("":"=r" (__gu_err)); \
- switch (size) { \
- case 1: __get_user_asm("lb"); break; \
- case 2: __get_user_asm("lh"); break; \
- case 4: __get_user_asm("lw"); break; \
- case 8: __get_user_asm("ld"); break; \
- default: __get_user_unknown(); break; \
- } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
-})
-
-#define __get_user_check(x,ptr,size) \
-({ \
- long __gu_err; \
- __typeof__(*(ptr)) __gu_val; \
- long __gu_addr; \
- __asm__("":"=r" (__gu_val)); \
- __gu_addr = (long) (ptr); \
- __asm__("":"=r" (__gu_err)); \
- if (__access_ok(__gu_addr,size,__access_mask)) { \
- switch (size) { \
- case 1: __get_user_asm("lb"); break; \
- case 2: __get_user_asm("lh"); break; \
- case 4: __get_user_asm("lw"); break; \
- case 8: __get_user_asm("ld"); break; \
- default: __get_user_unknown(); break; \
- } \
- } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
-})
-
-#define __get_user_asm(insn) \
-({ \
- __asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "move\t%1,$0\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- ".dword\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__m(__gu_addr)), "i" (-EFAULT)); \
-})
-
-extern void __get_user_unknown(void);
-
-#define __put_user_nocheck(x,ptr,size) \
-({ \
- long __pu_err; \
- __typeof__(*(ptr)) __pu_val; \
- long __pu_addr; \
- __pu_val = (x); \
- __pu_addr = (long) (ptr); \
- __asm__("":"=r" (__pu_err)); \
- switch (size) { \
- case 1: __put_user_asm("sb"); break; \
- case 2: __put_user_asm("sh"); break; \
- case 4: __put_user_asm("sw"); break; \
- case 8: __put_user_asm("sd"); break; \
- default: __put_user_unknown(); break; \
- } __pu_err; \
-})
-
-#define __put_user_check(x,ptr,size) \
-({ \
- long __pu_err; \
- __typeof__(*(ptr)) __pu_val; \
- long __pu_addr; \
- __pu_val = (x); \
- __pu_addr = (long) (ptr); \
- __asm__("":"=r" (__pu_err)); \
- if (__access_ok(__pu_addr,size,__access_mask)) { \
- switch (size) { \
- case 1: __put_user_asm("sb"); break; \
- case 2: __put_user_asm("sh"); break; \
- case 4: __put_user_asm("sw"); break; \
- case 8: __put_user_asm("sd"); break; \
- default: __put_user_unknown(); break; \
- } \
- } __pu_err; \
-})
-
-#define __put_user_asm(insn) \
-({ \
- __asm__ __volatile__( \
- "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- ".dword\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \
-})
-
-extern void __put_user_unknown(void);
-
-/*
- * We're generating jump to subroutines which will be outside the range of
- * jump instructions
- */
-#ifdef MODULE
-#define __MODULE_JAL(destination) \
- ".set\tnoat\n\t" \
- "dla\t$1, " #destination "\n\t" \
- "jalr\t$1\n\t" \
- ".set\tat\n\t"
-#else
-#define __MODULE_JAL(destination) \
- "jal\t" #destination "\n\t"
-#endif
-
-extern size_t __copy_user(void *__to, const void *__from, size_t __n);
-
-#define __invoke_copy_to_user(to,from,n) \
-({ \
- register void *__cu_to_r __asm__ ("$4"); \
- register const void *__cu_from_r __asm__ ("$5"); \
- register long __cu_len_r __asm__ ("$6"); \
- \
- __cu_to_r = (to); \
- __cu_from_r = (from); \
- __cu_len_r = (n); \
- __asm__ __volatile__( \
- __MODULE_JAL(__copy_user) \
- : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \
- : \
- : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
- "memory"); \
- __cu_len_r; \
-})
-
-#define __copy_to_user(to,from,n) \
-({ \
- void *__cu_to; \
- const void *__cu_from; \
- long __cu_len; \
- \
- __cu_to = (to); \
- __cu_from = (from); \
- __cu_len = (n); \
- __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \
- __cu_len; \
-})
-
-#define copy_to_user(to,from,n) \
-({ \
- void *__cu_to; \
- const void *__cu_from; \
- long __cu_len; \
- \
- __cu_to = (to); \
- __cu_from = (from); \
- __cu_len = (n); \
- if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \
- __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, \
- __cu_len); \
- __cu_len; \
-})
-
-#define __invoke_copy_from_user(to,from,n) \
-({ \
- register void *__cu_to_r __asm__ ("$4"); \
- register const void *__cu_from_r __asm__ ("$5"); \
- register long __cu_len_r __asm__ ("$6"); \
- \
- __cu_to_r = (to); \
- __cu_from_r = (from); \
- __cu_len_r = (n); \
- __asm__ __volatile__( \
- ".set\tnoreorder\n\t" \
- __MODULE_JAL(__copy_user) \
- ".set\tnoat\n\t" \
- "daddu\t$1, %1, %2\n\t" \
- ".set\tat\n\t" \
- ".set\treorder\n\t" \
- "move\t%0, $6" \
- : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \
- : \
- : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
- "memory"); \
- __cu_len_r; \
-})
-
-#define __copy_from_user(to,from,n) \
-({ \
- void *__cu_to; \
- const void *__cu_from; \
- long __cu_len; \
- \
- __cu_to = (to); \
- __cu_from = (from); \
- __cu_len = (n); \
- __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
- __cu_len); \
- __cu_len; \
-})
-
-#define copy_from_user(to,from,n) \
-({ \
- void *__cu_to; \
- const void *__cu_from; \
- long __cu_len; \
- \
- __cu_to = (to); \
- __cu_from = (from); \
- __cu_len = (n); \
- if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \
- __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
- __cu_len); \
- __cu_len; \
-})
-
-static inline __kernel_size_t
-__clear_user(void *addr, __kernel_size_t size)
-{
- __kernel_size_t res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- "move\t$5, $0\n\t"
- "move\t$6, %2\n\t"
- __MODULE_JAL(__bzero)
- "move\t%0, $6"
- : "=r" (res)
- : "r" (addr), "r" (size)
- : "$4", "$5", "$6", "$8", "$9", "$31");
-
- return res;
-}
-
-#define clear_user(addr,n) \
-({ \
- void * __cl_addr = (addr); \
- unsigned long __cl_size = (n); \
- if (__cl_size && access_ok(VERIFY_WRITE, \
- ((unsigned long)(__cl_addr)), __cl_size)) \
- __cl_size = __clear_user(__cl_addr, __cl_size); \
- __cl_size; \
-})
-
-/*
- * Returns: -EFAULT if exception before terminator, N if the entire
- * buffer filled, else strlen.
- */
-static inline long
-__strncpy_from_user(char *__to, const char *__from, long __len)
-{
- long res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- "move\t$5, %2\n\t"
- "move\t$6, %3\n\t"
- __MODULE_JAL(__strncpy_from_user_nocheck_asm)
- "move\t%0, $2"
- : "=r" (res)
- : "r" (__to), "r" (__from), "r" (__len)
- : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory");
-
- return res;
-}
-
-static inline long
-strncpy_from_user(char *__to, const char *__from, long __len)
-{
- long res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- "move\t$5, %2\n\t"
- "move\t$6, %3\n\t"
- __MODULE_JAL(__strncpy_from_user_asm)
- "move\t%0, $2"
- : "=r" (res)
- : "r" (__to), "r" (__from), "r" (__len)
- : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory");
-
- return res;
-}
-
-/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
-static inline long __strlen_user(const char *s)
-{
- long res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- __MODULE_JAL(__strlen_user_nocheck_asm)
- "move\t%0, $2"
- : "=r" (res)
- : "r" (s)
- : "$2", "$4", "$8", "$31");
-
- return res;
-}
-
-static inline long strlen_user(const char *s)
-{
- long res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- __MODULE_JAL(__strlen_user_asm)
- "move\t%0, $2"
- : "=r" (res)
- : "r" (s)
- : "$2", "$4", "$8", "$31");
-
- return res;
-}
-
-/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
-static inline long __strnlen_user(const char *s, long n)
-{
- long res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- "move\t$5, %2\n\t"
- __MODULE_JAL(__strnlen_user_nocheck_asm)
- "move\t%0, $2"
- : "=r" (res)
- : "r" (s), "r" (n)
- : "$2", "$4", "$5", "$8", "$31");
-
- return res;
-}
-
-static inline long strnlen_user(const char *s, long n)
-{
- long res;
-
- __asm__ __volatile__(
- "move\t$4, %1\n\t"
- "move\t$5, %2\n\t"
- __MODULE_JAL(__strnlen_user_asm)
- "move\t%0, $2"
- : "=r" (res)
- : "r" (s), "r" (n)
- : "$2", "$4", "$5", "$8", "$31");
-
- return res;
-}
-
-struct exception_table_entry
-{
- unsigned long insn;
- unsigned long nextinsn;
-};
-
-/* Returns 0 if exception not found and fixup.unit otherwise. */
-extern unsigned long search_exception_table(unsigned long addr);
-
-/* Returns the new pc */
-#define fixup_exception(map_reg, fixup_unit, pc) \
-({ \
- fixup_unit; \
-})
-
-#endif /* _ASM_UACCESS_H */
diff -Nru a/include/asm-mips64/ucontext.h b/include/asm-mips64/ucontext.h
--- a/include/asm-mips64/ucontext.h Sun Aug 3 13:14:48 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,21 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Low level exception handling
- *
- * Copyright (C) 1998, 1999 by Ralf Baechle
- */
-#ifndef _ASM_UCONTEXT_H
-#define _ASM_UCONTEXT_H
-
-struct ucontext {
- unsigned long uc_flags;
- struct ucontext *uc_link;
- stack_t uc_stack;
- struct sigcontext uc_mcontext;
- sigset_t uc_sigmask; /* mask last for extensibility */
-};
-
-#endif /* _ASM_UCONTEXT_H */
diff -Nru a/include/asm-mips64/unaligned.h b/include/asm-mips64/unaligned.h
--- a/include/asm-mips64/unaligned.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,154 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1999, 2000, 2001 by Ralf Baechle
- * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
- */
-#ifndef _ASM_UNALIGNED_H
-#define _ASM_UNALIGNED_H
-
-extern void __get_unaligned_bad_length(void);
-extern void __put_unaligned_bad_length(void);
-
-/*
- * Load quad unaligned.
- */
-static inline unsigned long __ldq_u(const unsigned long * __addr)
-{
- unsigned long __res;
-
- __asm__("uld\t%0,%1"
- : "=&r" (__res)
- : "m" (*__addr));
-
- return __res;
-}
-
-/*
- * Load long unaligned.
- */
-static inline unsigned long __ldl_u(const unsigned int * __addr)
-{
- unsigned long __res;
-
- __asm__("ulw\t%0,%1"
- : "=&r" (__res)
- : "m" (*__addr));
-
- return __res;
-}
-
-/*
- * Load word unaligned.
- */
-static inline unsigned long __ldw_u(const unsigned short * __addr)
-{
- unsigned long __res;
-
- __asm__("ulh\t%0,%1"
- : "=&r" (__res)
- : "m" (*__addr));
-
- return __res;
-}
-
-/*
- * Store quad unaligned.
- */
-static inline void __stq_u(unsigned long __val, unsigned long * __addr)
-{
- __asm__("usd\t%1, %0"
- : "=m" (*__addr)
- : "r" (__val));
-}
-
-/*
- * Store long unaligned.
- */
-static inline void __stl_u(unsigned long __val, unsigned int * __addr)
-{
- __asm__("usw\t%1, %0"
- : "=m" (*__addr)
- : "r" (__val));
-}
-
-/*
- * Store word unaligned.
- */
-static inline void __stw_u(unsigned long __val, unsigned short * __addr)
-{
- __asm__("ush\t%1, %0"
- : "=m" (*__addr)
- : "r" (__val));
-}
-
-/*
- * get_unaligned - get value from possibly mis-aligned location
- * @ptr: pointer to value
- *
- * This macro should be used for accessing values larger in size than
- * single bytes at locations that are expected to be improperly aligned,
- * e.g. retrieving a u16 value from a location not u16-aligned.
- *
- * Note that unaligned accesses can be very expensive on some architectures.
- */
-#define get_unaligned(ptr) \
-({ \
- __typeof__(*(ptr)) __val; \
- \
- switch (sizeof(*(ptr))) { \
- case 1: \
- __val = *(const unsigned char *)(ptr); \
- break; \
- case 2: \
- __val = __ldw_u((const unsigned short *)(ptr)); \
- break; \
- case 4: \
- __val = __ldl_u((const unsigned int *)(ptr)); \
- break; \
- case 8: \
- __val = __ldq_u((const unsigned long *)(ptr)); \
- break; \
- default: \
- __get_unaligned_bad_length(); \
- break; \
- } \
- \
- __val; \
-})
-
-/*
- * put_unaligned - put value to a possibly mis-aligned location
- * @val: value to place
- * @ptr: pointer to location
- *
- * This macro should be used for placing values larger in size than
- * single bytes at locations that are expected to be improperly aligned,
- * e.g. writing a u16 value to a location not u16-aligned.
- *
- * Note that unaligned accesses can be very expensive on some architectures.
- */
-#define put_unaligned(val,ptr) \
-do { \
- switch (sizeof(*(ptr))) { \
- case 1: \
- *(unsigned char *)(ptr) = (val); \
- break; \
- case 2: \
- __stw_u((val), (unsigned short *)(ptr)); \
- break; \
- case 4: \
- __stl_u((val), (unsigned int *)(ptr)); \
- break; \
- case 8: \
- __stq_u((val), (unsigned long long *)(ptr)); \
- break; \
- default: \
- __put_unaligned_bad_length(); \
- break; \
- } \
-} while(0)
-
-#endif /* _ASM_UNALIGNED_H */
diff -Nru a/include/asm-mips64/unistd.h b/include/asm-mips64/unistd.h
--- a/include/asm-mips64/unistd.h Sun Aug 3 13:14:51 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,1094 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- *
- * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
- * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
- */
-#ifndef _ASM_UNISTD_H
-#define _ASM_UNISTD_H
-
-/*
- * Linux o32 style syscalls are in the range from 4000 to 4999.
- */
-#define __NR_O32_Linux 4000
-#define __NR_O32_syscall (__NR_O32_Linux + 0)
-#define __NR_O32_exit (__NR_O32_Linux + 1)
-#define __NR_O32_fork (__NR_O32_Linux + 2)
-#define __NR_O32_read (__NR_O32_Linux + 3)
-#define __NR_O32_write (__NR_O32_Linux + 4)
-#define __NR_O32_open (__NR_O32_Linux + 5)
-#define __NR_O32_close (__NR_O32_Linux + 6)
-#define __NR_O32_waitpid (__NR_O32_Linux + 7)
-#define __NR_O32_creat (__NR_O32_Linux + 8)
-#define __NR_O32_link (__NR_O32_Linux + 9)
-#define __NR_O32_unlink (__NR_O32_Linux + 10)
-#define __NR_O32_execve (__NR_O32_Linux + 11)
-#define __NR_O32_chdir (__NR_O32_Linux + 12)
-#define __NR_O32_time (__NR_O32_Linux + 13)
-#define __NR_O32_mknod (__NR_O32_Linux + 14)
-#define __NR_O32_chmod (__NR_O32_Linux + 15)
-#define __NR_O32_lchown (__NR_O32_Linux + 16)
-#define __NR_O32_break (__NR_O32_Linux + 17)
-#define __NR_O32_unused18 (__NR_O32_Linux + 18)
-#define __NR_O32_lseek (__NR_O32_Linux + 19)
-#define __NR_O32_getpid (__NR_O32_Linux + 20)
-#define __NR_O32_mount (__NR_O32_Linux + 21)
-#define __NR_O32_umount (__NR_O32_Linux + 22)
-#define __NR_O32_setuid (__NR_O32_Linux + 23)
-#define __NR_O32_getuid (__NR_O32_Linux + 24)
-#define __NR_O32_stime (__NR_O32_Linux + 25)
-#define __NR_O32_ptrace (__NR_O32_Linux + 26)
-#define __NR_O32_alarm (__NR_O32_Linux + 27)
-#define __NR_O32_unused28 (__NR_O32_Linux + 28)
-#define __NR_O32_pause (__NR_O32_Linux + 29)
-#define __NR_O32_utime (__NR_O32_Linux + 30)
-#define __NR_O32_stty (__NR_O32_Linux + 31)
-#define __NR_O32_gtty (__NR_O32_Linux + 32)
-#define __NR_O32_access (__NR_O32_Linux + 33)
-#define __NR_O32_nice (__NR_O32_Linux + 34)
-#define __NR_O32_ftime (__NR_O32_Linux + 35)
-#define __NR_O32_sync (__NR_O32_Linux + 36)
-#define __NR_O32_kill (__NR_O32_Linux + 37)
-#define __NR_O32_rename (__NR_O32_Linux + 38)
-#define __NR_O32_mkdir (__NR_O32_Linux + 39)
-#define __NR_O32_rmdir (__NR_O32_Linux + 40)
-#define __NR_O32_dup (__NR_O32_Linux + 41)
-#define __NR_O32_pipe (__NR_O32_Linux + 42)
-#define __NR_O32_times (__NR_O32_Linux + 43)
-#define __NR_O32_prof (__NR_O32_Linux + 44)
-#define __NR_O32_brk (__NR_O32_Linux + 45)
-#define __NR_O32_setgid (__NR_O32_Linux + 46)
-#define __NR_O32_getgid (__NR_O32_Linux + 47)
-#define __NR_O32_signal (__NR_O32_Linux + 48)
-#define __NR_O32_geteuid (__NR_O32_Linux + 49)
-#define __NR_O32_getegid (__NR_O32_Linux + 50)
-#define __NR_O32_acct (__NR_O32_Linux + 51)
-#define __NR_O32_umount2 (__NR_O32_Linux + 52)
-#define __NR_O32_lock (__NR_O32_Linux + 53)
-#define __NR_O32_ioctl (__NR_O32_Linux + 54)
-#define __NR_O32_fcntl (__NR_O32_Linux + 55)
-#define __NR_O32_mpx (__NR_O32_Linux + 56)
-#define __NR_O32_setpgid (__NR_O32_Linux + 57)
-#define __NR_O32_ulimit (__NR_O32_Linux + 58)
-#define __NR_O32_unused59 (__NR_O32_Linux + 59)
-#define __NR_O32_umask (__NR_O32_Linux + 60)
-#define __NR_O32_chroot (__NR_O32_Linux + 61)
-#define __NR_O32_ustat (__NR_O32_Linux + 62)
-#define __NR_O32_dup2 (__NR_O32_Linux + 63)
-#define __NR_O32_getppid (__NR_O32_Linux + 64)
-#define __NR_O32_getpgrp (__NR_O32_Linux + 65)
-#define __NR_O32_setsid (__NR_O32_Linux + 66)
-#define __NR_O32_sigaction (__NR_O32_Linux + 67)
-#define __NR_O32_sgetmask (__NR_O32_Linux + 68)
-#define __NR_O32_ssetmask (__NR_O32_Linux + 69)
-#define __NR_O32_setreuid (__NR_O32_Linux + 70)
-#define __NR_O32_setregid (__NR_O32_Linux + 71)
-#define __NR_O32_sigsuspend (__NR_O32_Linux + 72)
-#define __NR_O32_sigpending (__NR_O32_Linux + 73)
-#define __NR_O32_sethostname (__NR_O32_Linux + 74)
-#define __NR_O32_setrlimit (__NR_O32_Linux + 75)
-#define __NR_O32_getrlimit (__NR_O32_Linux + 76)
-#define __NR_O32_getrusage (__NR_O32_Linux + 77)
-#define __NR_O32_gettimeofday (__NR_O32_Linux + 78)
-#define __NR_O32_settimeofday (__NR_O32_Linux + 79)
-#define __NR_O32_getgroups (__NR_O32_Linux + 80)
-#define __NR_O32_setgroups (__NR_O32_Linux + 81)
-#define __NR_O32_reserved82 (__NR_O32_Linux + 82)
-#define __NR_O32_symlink (__NR_O32_Linux + 83)
-#define __NR_O32_unused84 (__NR_O32_Linux + 84)
-#define __NR_O32_readlink (__NR_O32_Linux + 85)
-#define __NR_O32_uselib (__NR_O32_Linux + 86)
-#define __NR_O32_swapon (__NR_O32_Linux + 87)
-#define __NR_O32_reboot (__NR_O32_Linux + 88)
-#define __NR_O32_readdir (__NR_O32_Linux + 89)
-#define __NR_O32_mmap (__NR_O32_Linux + 90)
-#define __NR_O32_munmap (__NR_O32_Linux + 91)
-#define __NR_O32_truncate (__NR_O32_Linux + 92)
-#define __NR_O32_ftruncate (__NR_O32_Linux + 93)
-#define __NR_O32_fchmod (__NR_O32_Linux + 94)
-#define __NR_O32_fchown (__NR_O32_Linux + 95)
-#define __NR_O32_getpriority (__NR_O32_Linux + 96)
-#define __NR_O32_setpriority (__NR_O32_Linux + 97)
-#define __NR_O32_profil (__NR_O32_Linux + 98)
-#define __NR_O32_statfs (__NR_O32_Linux + 99)
-#define __NR_O32_fstatfs (__NR_O32_Linux + 100)
-#define __NR_O32_ioperm (__NR_O32_Linux + 101)
-#define __NR_O32_socketcall (__NR_O32_Linux + 102)
-#define __NR_O32_syslog (__NR_O32_Linux + 103)
-#define __NR_O32_setitimer (__NR_O32_Linux + 104)
-#define __NR_O32_getitimer (__NR_O32_Linux + 105)
-#define __NR_O32_stat (__NR_O32_Linux + 106)
-#define __NR_O32_lstat (__NR_O32_Linux + 107)
-#define __NR_O32_fstat (__NR_O32_Linux + 108)
-#define __NR_O32_unused109 (__NR_O32_Linux + 109)
-#define __NR_O32_iopl (__NR_O32_Linux + 110)
-#define __NR_O32_vhangup (__NR_O32_Linux + 111)
-#define __NR_O32_idle (__NR_O32_Linux + 112)
-#define __NR_O32_vm86 (__NR_O32_Linux + 113)
-#define __NR_O32_wait4 (__NR_O32_Linux + 114)
-#define __NR_O32_swapoff (__NR_O32_Linux + 115)
-#define __NR_O32_sysinfo (__NR_O32_Linux + 116)
-#define __NR_O32_ipc (__NR_O32_Linux + 117)
-#define __NR_O32_fsync (__NR_O32_Linux + 118)
-#define __NR_O32_sigreturn (__NR_O32_Linux + 119)
-#define __NR_O32_clone (__NR_O32_Linux + 120)
-#define __NR_O32_setdomainname (__NR_O32_Linux + 121)
-#define __NR_O32_uname (__NR_O32_Linux + 122)
-#define __NR_O32_modify_ldt (__NR_O32_Linux + 123)
-#define __NR_O32_adjtimex (__NR_O32_Linux + 124)
-#define __NR_O32_mprotect (__NR_O32_Linux + 125)
-#define __NR_O32_sigprocmask (__NR_O32_Linux + 126)
-#define __NR_O32_create_module (__NR_O32_Linux + 127)
-#define __NR_O32_init_module (__NR_O32_Linux + 128)
-#define __NR_O32_delete_module (__NR_O32_Linux + 129)
-#define __NR_O32_get_kernel_syms (__NR_O32_Linux + 130)
-#define __NR_O32_quotactl (__NR_O32_Linux + 131)
-#define __NR_O32_getpgid (__NR_O32_Linux + 132)
-#define __NR_O32_fchdir (__NR_O32_Linux + 133)
-#define __NR_O32_bdflush (__NR_O32_Linux + 134)
-#define __NR_O32_sysfs (__NR_O32_Linux + 135)
-#define __NR_O32_personality (__NR_O32_Linux + 136)
-#define __NR_O32_afs_syscall (__NR_O32_Linux + 137) /* Syscall for Andrew File System */
-#define __NR_O32_setfsuid (__NR_O32_Linux + 138)
-#define __NR_O32_setfsgid (__NR_O32_Linux + 139)
-#define __NR_O32__llseek (__NR_O32_Linux + 140)
-#define __NR_O32_getdents (__NR_O32_Linux + 141)
-#define __NR_O32__newselect (__NR_O32_Linux + 142)
-#define __NR_O32_flock (__NR_O32_Linux + 143)
-#define __NR_O32_msync (__NR_O32_Linux + 144)
-#define __NR_O32_readv (__NR_O32_Linux + 145)
-#define __NR_O32_writev (__NR_O32_Linux + 146)
-#define __NR_O32_cacheflush (__NR_O32_Linux + 147)
-#define __NR_O32_cachectl (__NR_O32_Linux + 148)
-#define __NR_O32_sysmips (__NR_O32_Linux + 149)
-#define __NR_O32_unused150 (__NR_O32_Linux + 150)
-#define __NR_O32_getsid (__NR_O32_Linux + 151)
-#define __NR_O32_fdatasync (__NR_O32_Linux + 152)
-#define __NR_O32__sysctl (__NR_O32_Linux + 153)
-#define __NR_O32_mlock (__NR_O32_Linux + 154)
-#define __NR_O32_munlock (__NR_O32_Linux + 155)
-#define __NR_O32_mlockall (__NR_O32_Linux + 156)
-#define __NR_O32_munlockall (__NR_O32_Linux + 157)
-#define __NR_O32_sched_setparam (__NR_O32_Linux + 158)
-#define __NR_O32_sched_getparam (__NR_O32_Linux + 159)
-#define __NR_O32_sched_setscheduler (__NR_O32_Linux + 160)
-#define __NR_O32_sched_getscheduler (__NR_O32_Linux + 161)
-#define __NR_O32_sched_yield (__NR_O32_Linux + 162)
-#define __NR_O32_sched_get_priority_max (__NR_O32_Linux + 163)
-#define __NR_O32_sched_get_priority_min (__NR_O32_Linux + 164)
-#define __NR_O32_sched_rr_get_interval (__NR_O32_Linux + 165)
-#define __NR_O32_nanosleep (__NR_O32_Linux + 166)
-#define __NR_O32_mremap (__NR_O32_Linux + 167)
-#define __NR_O32_accept (__NR_O32_Linux + 168)
-#define __NR_O32_bind (__NR_O32_Linux + 169)
-#define __NR_O32_connect (__NR_O32_Linux + 170)
-#define __NR_O32_getpeername (__NR_O32_Linux + 171)
-#define __NR_O32_getsockname (__NR_O32_Linux + 172)
-#define __NR_O32_getsockopt (__NR_O32_Linux + 173)
-#define __NR_O32_listen (__NR_O32_Linux + 174)
-#define __NR_O32_recv (__NR_O32_Linux + 175)
-#define __NR_O32_recvfrom (__NR_O32_Linux + 176)
-#define __NR_O32_recvmsg (__NR_O32_Linux + 177)
-#define __NR_O32_send (__NR_O32_Linux + 178)
-#define __NR_O32_sendmsg (__NR_O32_Linux + 179)
-#define __NR_O32_sendto (__NR_O32_Linux + 180)
-#define __NR_O32_setsockopt (__NR_O32_Linux + 181)
-#define __NR_O32_shutdown (__NR_O32_Linux + 182)
-#define __NR_O32_socket (__NR_O32_Linux + 183)
-#define __NR_O32_socketpair (__NR_O32_Linux + 184)
-#define __NR_O32_setresuid (__NR_O32_Linux + 185)
-#define __NR_O32_getresuid (__NR_O32_Linux + 186)
-#define __NR_O32_query_module (__NR_O32_Linux + 187)
-#define __NR_O32_poll (__NR_O32_Linux + 188)
-#define __NR_O32_nfsservctl (__NR_O32_Linux + 189)
-#define __NR_O32_setresgid (__NR_O32_Linux + 190)
-#define __NR_O32_getresgid (__NR_O32_Linux + 191)
-#define __NR_O32_prctl (__NR_O32_Linux + 192)
-#define __NR_O32_rt_sigreturn (__NR_O32_Linux + 193)
-#define __NR_O32_rt_sigaction (__NR_O32_Linux + 194)
-#define __NR_O32_rt_sigprocmask (__NR_O32_Linux + 195)
-#define __NR_O32_rt_sigpending (__NR_O32_Linux + 196)
-#define __NR_O32_rt_sigtimedwait (__NR_O32_Linux + 197)
-#define __NR_O32_rt_sigqueueinfo (__NR_O32_Linux + 198)
-#define __NR_O32_rt_sigsuspend (__NR_O32_Linux + 199)
-#define __NR_O32_pread64 (__NR_O32_Linux + 200)
-#define __NR_O32_pwrite64 (__NR_O32_Linux + 201)
-#define __NR_O32_chown (__NR_O32_Linux + 202)
-#define __NR_O32_getcwd (__NR_O32_Linux + 203)
-#define __NR_O32_capget (__NR_O32_Linux + 204)
-#define __NR_O32_capset (__NR_O32_Linux + 205)
-#define __NR_O32_sigaltstack (__NR_O32_Linux + 206)
-#define __NR_O32_sendfile (__NR_O32_Linux + 207)
-#define __NR_O32_getpmsg (__NR_O32_Linux + 208)
-#define __NR_O32_putpmsg (__NR_O32_Linux + 209)
-#define __NR_O32_mmap2 (__NR_O32_Linux + 210)
-#define __NR_O32_truncate64 (__NR_O32_Linux + 211)
-#define __NR_O32_ftruncate64 (__NR_O32_Linux + 212)
-#define __NR_O32_stat64 (__NR_O32_Linux + 213)
-#define __NR_O32_lstat64 (__NR_O32_Linux + 214)
-#define __NR_O32_fstat64 (__NR_O32_Linux + 215)
-#define __NR_O32_root_pivot (__NR_O32_Linux + 216)
-#define __NR_O32_mincore (__NR_O32_Linux + 217)
-#define __NR_O32_madvise (__NR_O32_Linux + 218)
-#define __NR_O32_getdents64 (__NR_O32_Linux + 219)
-#define __NR_O32_fcntl64 (__NR_O32_Linux + 220)
-#define __NR_O32_reserved221 (__NR_O32_Linux + 221)
-#define __NR_O32_gettid (__NR_O32_Linux + 222)
-#define __NR_O32_readahead (__NR_O32_Linux + 223)
-#define __NR_O32_setxattr (__NR_O32_Linux + 224)
-#define __NR_O32_lsetxattr (__NR_O32_Linux + 225)
-#define __NR_O32_fsetxattr (__NR_O32_Linux + 226)
-#define __NR_O32_getxattr (__NR_O32_Linux + 227)
-#define __NR_O32_lgetxattr (__NR_O32_Linux + 228)
-#define __NR_O32_fgetxattr (__NR_O32_Linux + 229)
-#define __NR_O32_listxattr (__NR_O32_Linux + 230)
-#define __NR_O32_llistxattr (__NR_O32_Linux + 231)
-#define __NR_O32_flistxattr (__NR_O32_Linux + 232)
-#define __NR_O32_removexattr (__NR_O32_Linux + 233)
-#define __NR_O32_lremovexattr (__NR_O32_Linux + 234)
-#define __NR_O32_fremovexattr (__NR_O32_Linux + 235)
-#define __NR_O32_tkill (__NR_O32_Linux + 236)
-#define __NR_O32_sendfile64 (__NR_O32_Linux + 237)
-#define __NR_O32_futex (__NR_O32_Linux + 238)
-#define __NR_O32_sched_setaffinity (__NR_O32_Linux + 239)
-#define __NR_O32_sched_getaffinity (__NR_O32_Linux + 240)
-#define __NR_O32_io_setup (__NR_O32_Linux + 241)
-#define __NR_O32_io_destroy (__NR_O32_Linux + 242)
-#define __NR_O32_io_getevents (__NR_O32_Linux + 243)
-#define __NR_O32_io_submit (__NR_O32_Linux + 244)
-#define __NR_O32_io_cancel (__NR_O32_Linux + 245)
-#define __NR_O32_exit_group (__NR_O32_Linux + 246)
-#define __NR_O32_lookup_dcookie (__NR_O32_Linux + 247)
-#define __NR_O32_epoll_create (__NR_O32_Linux + 248)
-#define __NR_O32_epoll_ctl (__NR_O32_Linux + 249)
-#define __NR_O32_epoll_wait (__NR_O32_Linux + 250)
-#define __NR_O32_remap_file_page (__NR_O32_Linux + 251)
-#define __NR_O32_set_tid_address (__NR_O32_Linux + 252)
-#define __NR_O32_restart_syscall (__NR_O32_Linux + 253)
-#define __NR_O32_fadvise64 (__NR_O32_Linux + 254)
-#define __NR_O32_statfs64 (__NR_O32_Linux + 255)
-#define __NR_O32_fstatfs64 (__NR_O32_Linux + 256)
-
-/*
- * Offset of the last Linux o32 flavoured syscall
- */
-#define __NR_O32_Linux_syscalls 256
-
-
-/*
- * Linux 64-bit syscalls are in the range from 5000 to 5999.
- */
-#define __NR_Linux 5000
-#define __NR_read (__NR_Linux + 0)
-#define __NR_write (__NR_Linux + 1)
-#define __NR_open (__NR_Linux + 2)
-#define __NR_close (__NR_Linux + 3)
-#define __NR_stat (__NR_Linux + 4)
-#define __NR_fstat (__NR_Linux + 5)
-#define __NR_lstat (__NR_Linux + 6)
-#define __NR_poll (__NR_Linux + 7)
-#define __NR_lseek (__NR_Linux + 8)
-#define __NR_mmap (__NR_Linux + 9)
-#define __NR_mprotect (__NR_Linux + 10)
-#define __NR_munmap (__NR_Linux + 11)
-#define __NR_brk (__NR_Linux + 12)
-#define __NR_rt_sigaction (__NR_Linux + 13)
-#define __NR_rt_sigprocmask (__NR_Linux + 14)
-#define __NR_ioctl (__NR_Linux + 15)
-#define __NR_pread64 (__NR_Linux + 16)
-#define __NR_pwrite64 (__NR_Linux + 17)
-#define __NR_readv (__NR_Linux + 18)
-#define __NR_writev (__NR_Linux + 19)
-#define __NR_access (__NR_Linux + 20)
-#define __NR_pipe (__NR_Linux + 21)
-#define __NR__newselect (__NR_Linux + 22)
-#define __NR_sched_yield (__NR_Linux + 23)
-#define __NR_mremap (__NR_Linux + 24)
-#define __NR_msync (__NR_Linux + 25)
-#define __NR_mincore (__NR_Linux + 26)
-#define __NR_madvise (__NR_Linux + 27)
-#define __NR_shmget (__NR_Linux + 28)
-#define __NR_shmat (__NR_Linux + 29)
-#define __NR_shmctl (__NR_Linux + 30)
-#define __NR_dup (__NR_Linux + 31)
-#define __NR_dup2 (__NR_Linux + 32)
-#define __NR_pause (__NR_Linux + 33)
-#define __NR_nanosleep (__NR_Linux + 34)
-#define __NR_getitimer (__NR_Linux + 35)
-#define __NR_setitimer (__NR_Linux + 36)
-#define __NR_alarm (__NR_Linux + 37)
-#define __NR_getpid (__NR_Linux + 38)
-#define __NR_sendfile (__NR_Linux + 39)
-#define __NR_socket (__NR_Linux + 40)
-#define __NR_connect (__NR_Linux + 41)
-#define __NR_accept (__NR_Linux + 42)
-#define __NR_sendto (__NR_Linux + 43)
-#define __NR_recvfrom (__NR_Linux + 44)
-#define __NR_sendmsg (__NR_Linux + 45)
-#define __NR_recvmsg (__NR_Linux + 46)
-#define __NR_shutdown (__NR_Linux + 47)
-#define __NR_bind (__NR_Linux + 48)
-#define __NR_listen (__NR_Linux + 49)
-#define __NR_getsockname (__NR_Linux + 50)
-#define __NR_getpeername (__NR_Linux + 51)
-#define __NR_socketpair (__NR_Linux + 52)
-#define __NR_setsockopt (__NR_Linux + 53)
-#define __NR_getsockopt (__NR_Linux + 54)
-#define __NR_clone (__NR_Linux + 55)
-#define __NR_fork (__NR_Linux + 56)
-#define __NR_execve (__NR_Linux + 57)
-#define __NR_exit (__NR_Linux + 58)
-#define __NR_wait4 (__NR_Linux + 59)
-#define __NR_kill (__NR_Linux + 60)
-#define __NR_uname (__NR_Linux + 61)
-#define __NR_semget (__NR_Linux + 62)
-#define __NR_semop (__NR_Linux + 63)
-#define __NR_semctl (__NR_Linux + 64)
-#define __NR_shmdt (__NR_Linux + 65)
-#define __NR_msgget (__NR_Linux + 66)
-#define __NR_msgsnd (__NR_Linux + 67)
-#define __NR_msgrcv (__NR_Linux + 68)
-#define __NR_msgctl (__NR_Linux + 69)
-#define __NR_fcntl (__NR_Linux + 70)
-#define __NR_flock (__NR_Linux + 71)
-#define __NR_fsync (__NR_Linux + 72)
-#define __NR_fdatasync (__NR_Linux + 73)
-#define __NR_truncate (__NR_Linux + 74)
-#define __NR_ftruncate (__NR_Linux + 75)
-#define __NR_getdents (__NR_Linux + 76)
-#define __NR_getcwd (__NR_Linux + 77)
-#define __NR_chdir (__NR_Linux + 78)
-#define __NR_fchdir (__NR_Linux + 79)
-#define __NR_rename (__NR_Linux + 80)
-#define __NR_mkdir (__NR_Linux + 81)
-#define __NR_rmdir (__NR_Linux + 82)
-#define __NR_creat (__NR_Linux + 83)
-#define __NR_link (__NR_Linux + 84)
-#define __NR_unlink (__NR_Linux + 85)
-#define __NR_symlink (__NR_Linux + 86)
-#define __NR_readlink (__NR_Linux + 87)
-#define __NR_chmod (__NR_Linux + 88)
-#define __NR_fchmod (__NR_Linux + 89)
-#define __NR_chown (__NR_Linux + 90)
-#define __NR_fchown (__NR_Linux + 91)
-#define __NR_lchown (__NR_Linux + 92)
-#define __NR_umask (__NR_Linux + 93)
-#define __NR_gettimeofday (__NR_Linux + 94)
-#define __NR_getrlimit (__NR_Linux + 95)
-#define __NR_getrusage (__NR_Linux + 96)
-#define __NR_sysinfo (__NR_Linux + 97)
-#define __NR_times (__NR_Linux + 98)
-#define __NR_ptrace (__NR_Linux + 99)
-#define __NR_getuid (__NR_Linux + 100)
-#define __NR_syslog (__NR_Linux + 101)
-#define __NR_getgid (__NR_Linux + 102)
-#define __NR_setuid (__NR_Linux + 103)
-#define __NR_setgid (__NR_Linux + 104)
-#define __NR_geteuid (__NR_Linux + 105)
-#define __NR_getegid (__NR_Linux + 106)
-#define __NR_setpgid (__NR_Linux + 107)
-#define __NR_getppid (__NR_Linux + 108)
-#define __NR_getpgrp (__NR_Linux + 109)
-#define __NR_setsid (__NR_Linux + 110)
-#define __NR_setreuid (__NR_Linux + 111)
-#define __NR_setregid (__NR_Linux + 112)
-#define __NR_getgroups (__NR_Linux + 113)
-#define __NR_setgroups (__NR_Linux + 114)
-#define __NR_setresuid (__NR_Linux + 115)
-#define __NR_getresuid (__NR_Linux + 116)
-#define __NR_setresgid (__NR_Linux + 117)
-#define __NR_getresgid (__NR_Linux + 118)
-#define __NR_getpgid (__NR_Linux + 119)
-#define __NR_setfsuid (__NR_Linux + 120)
-#define __NR_setfsgid (__NR_Linux + 121)
-#define __NR_getsid (__NR_Linux + 122)
-#define __NR_capget (__NR_Linux + 123)
-#define __NR_capset (__NR_Linux + 124)
-#define __NR_rt_sigpending (__NR_Linux + 125)
-#define __NR_rt_sigtimedwait (__NR_Linux + 126)
-#define __NR_rt_sigqueueinfo (__NR_Linux + 127)
-#define __NR_rt_sigsuspend (__NR_Linux + 128)
-#define __NR_sigaltstack (__NR_Linux + 129)
-#define __NR_utime (__NR_Linux + 130)
-#define __NR_mknod (__NR_Linux + 131)
-#define __NR_personality (__NR_Linux + 132)
-#define __NR_ustat (__NR_Linux + 133)
-#define __NR_statfs (__NR_Linux + 134)
-#define __NR_fstatfs (__NR_Linux + 135)
-#define __NR_sysfs (__NR_Linux + 136)
-#define __NR_getpriority (__NR_Linux + 137)
-#define __NR_setpriority (__NR_Linux + 138)
-#define __NR_sched_setparam (__NR_Linux + 139)
-#define __NR_sched_getparam (__NR_Linux + 140)
-#define __NR_sched_setscheduler (__NR_Linux + 141)
-#define __NR_sched_getscheduler (__NR_Linux + 142)
-#define __NR_sched_get_priority_max (__NR_Linux + 143)
-#define __NR_sched_get_priority_min (__NR_Linux + 144)
-#define __NR_sched_rr_get_interval (__NR_Linux + 145)
-#define __NR_mlock (__NR_Linux + 146)
-#define __NR_munlock (__NR_Linux + 147)
-#define __NR_mlockall (__NR_Linux + 148)
-#define __NR_munlockall (__NR_Linux + 149)
-#define __NR_vhangup (__NR_Linux + 150)
-#define __NR_pivot_root (__NR_Linux + 151)
-#define __NR__sysctl (__NR_Linux + 152)
-#define __NR_prctl (__NR_Linux + 153)
-#define __NR_adjtimex (__NR_Linux + 154)
-#define __NR_setrlimit (__NR_Linux + 155)
-#define __NR_chroot (__NR_Linux + 156)
-#define __NR_sync (__NR_Linux + 157)
-#define __NR_acct (__NR_Linux + 158)
-#define __NR_settimeofday (__NR_Linux + 159)
-#define __NR_mount (__NR_Linux + 160)
-#define __NR_umount2 (__NR_Linux + 161)
-#define __NR_swapon (__NR_Linux + 162)
-#define __NR_swapoff (__NR_Linux + 163)
-#define __NR_reboot (__NR_Linux + 164)
-#define __NR_sethostname (__NR_Linux + 165)
-#define __NR_setdomainname (__NR_Linux + 166)
-#define __NR_create_module (__NR_Linux + 167)
-#define __NR_init_module (__NR_Linux + 168)
-#define __NR_delete_module (__NR_Linux + 169)
-#define __NR_get_kernel_syms (__NR_Linux + 170)
-#define __NR_query_module (__NR_Linux + 171)
-#define __NR_quotactl (__NR_Linux + 172)
-#define __NR_nfsservctl (__NR_Linux + 173)
-#define __NR_getpmsg (__NR_Linux + 174)
-#define __NR_putpmsg (__NR_Linux + 175)
-#define __NR_afs_syscall (__NR_Linux + 176)
-#define __NR_reserved177 (__NR_Linux + 177)
-#define __NR_gettid (__NR_Linux + 178)
-#define __NR_readahead (__NR_Linux + 179)
-#define __NR_setxattr (__NR_Linux + 180)
-#define __NR_lsetxattr (__NR_Linux + 181)
-#define __NR_fsetxattr (__NR_Linux + 182)
-#define __NR_getxattr (__NR_Linux + 183)
-#define __NR_lgetxattr (__NR_Linux + 184)
-#define __NR_fgetxattr (__NR_Linux + 185)
-#define __NR_listxattr (__NR_Linux + 186)
-#define __NR_llistxattr (__NR_Linux + 187)
-#define __NR_flistxattr (__NR_Linux + 188)
-#define __NR_removexattr (__NR_Linux + 189)
-#define __NR_lremovexattr (__NR_Linux + 190)
-#define __NR_fremovexattr (__NR_Linux + 191)
-#define __NR_tkill (__NR_Linux + 192)
-#define __NR_time (__NR_Linux + 193)
-#define __NR_futex (__NR_Linux + 194)
-#define __NR_sched_setaffinity (__NR_Linux + 195)
-#define __NR_sched_getaffinity (__NR_Linux + 196)
-#define __NR_cacheflush (__NR_Linux + 197)
-#define __NR_cachectl (__NR_Linux + 198)
-#define __NR_sysmips (__NR_Linux + 199)
-#define __NR_io_setup (__NR_Linux + 200)
-#define __NR_io_destroy (__NR_Linux + 201)
-#define __NR_io_getevents (__NR_Linux + 202)
-#define __NR_io_submit (__NR_Linux + 203)
-#define __NR_io_cancel (__NR_Linux + 204)
-#define __NR_exit_group (__NR_Linux + 205)
-#define __NR_lookup_dcookie (__NR_Linux + 206)
-#define __NR_epoll_create (__NR_Linux + 207)
-#define __NR_epoll_ctl (__NR_Linux + 208)
-#define __NR_epoll_wait (__NR_Linux + 209)
-#define __NR_remap_file_page (__NR_Linux + 210)
-#define __NR_rt_sigreturn (__NR_Linux + 211)
-#define __NR_set_tid_address (__NR_Linux + 212)
-#define __NR_restart_syscall (__NR_Linux + 213)
-#define __NR_semtimedop (__NR_Linux + 214)
-#define __NR_fadvise64 (__NR_Linux + 215)
-
-/*
- * Offset of the last Linux flavoured syscall
- */
-#define __NR_Linux_syscalls 215
-
-/*
- * Linux N32 syscalls are in the range from 6000 to 6999.
- */
-#define __NR_N32_Linux 6000
-#define __NR_N32_read (__NR_N32_Linux + 0)
-#define __NR_N32_write (__NR_N32_Linux + 1)
-#define __NR_N32_open (__NR_N32_Linux + 2)
-#define __NR_N32_close (__NR_N32_Linux + 3)
-#define __NR_N32_stat (__NR_N32_Linux + 4)
-#define __NR_N32_fstat (__NR_N32_Linux + 5)
-#define __NR_N32_lstat (__NR_N32_Linux + 6)
-#define __NR_N32_poll (__NR_N32_Linux + 7)
-#define __NR_N32_lseek (__NR_N32_Linux + 8)
-#define __NR_N32_mmap (__NR_N32_Linux + 9)
-#define __NR_N32_mprotect (__NR_N32_Linux + 10)
-#define __NR_N32_munmap (__NR_N32_Linux + 11)
-#define __NR_N32_brk (__NR_N32_Linux + 12)
-#define __NR_N32_rt_sigaction (__NR_N32_Linux + 13)
-#define __NR_N32_rt_sigprocmask (__NR_N32_Linux + 14)
-#define __NR_N32_ioctl (__NR_N32_Linux + 15)
-#define __NR_N32_pread64 (__NR_N32_Linux + 16)
-#define __NR_N32_pwrite64 (__NR_N32_Linux + 17)
-#define __NR_N32_readv (__NR_N32_Linux + 18)
-#define __NR_N32_writev (__NR_N32_Linux + 19)
-#define __NR_N32_access (__NR_N32_Linux + 20)
-#define __NR_N32_pipe (__NR_N32_Linux + 21)
-#define __NR_N32__newselect (__NR_N32_Linux + 22)
-#define __NR_N32_sched_yield (__NR_N32_Linux + 23)
-#define __NR_N32_mremap (__NR_N32_Linux + 24)
-#define __NR_N32_msync (__NR_N32_Linux + 25)
-#define __NR_N32_mincore (__NR_N32_Linux + 26)
-#define __NR_N32_madvise (__NR_N32_Linux + 27)
-#define __NR_N32_shmget (__NR_N32_Linux + 28)
-#define __NR_N32_shmat (__NR_N32_Linux + 29)
-#define __NR_N32_shmctl (__NR_N32_Linux + 30)
-#define __NR_N32_dup (__NR_N32_Linux + 31)
-#define __NR_N32_dup2 (__NR_N32_Linux + 32)
-#define __NR_N32_pause (__NR_N32_Linux + 33)
-#define __NR_N32_nanosleep (__NR_N32_Linux + 34)
-#define __NR_N32_getitimer (__NR_N32_Linux + 35)
-#define __NR_N32_setitimer (__NR_N32_Linux + 36)
-#define __NR_N32_alarm (__NR_N32_Linux + 37)
-#define __NR_N32_getpid (__NR_N32_Linux + 38)
-#define __NR_N32_sendfile (__NR_N32_Linux + 39)
-#define __NR_N32_socket (__NR_N32_Linux + 40)
-#define __NR_N32_connect (__NR_N32_Linux + 41)
-#define __NR_N32_accept (__NR_N32_Linux + 42)
-#define __NR_N32_sendto (__NR_N32_Linux + 43)
-#define __NR_N32_recvfrom (__NR_N32_Linux + 44)
-#define __NR_N32_sendmsg (__NR_N32_Linux + 45)
-#define __NR_N32_recvmsg (__NR_N32_Linux + 46)
-#define __NR_N32_shutdown (__NR_N32_Linux + 47)
-#define __NR_N32_bind (__NR_N32_Linux + 48)
-#define __NR_N32_listen (__NR_N32_Linux + 49)
-#define __NR_N32_getsockname (__NR_N32_Linux + 50)
-#define __NR_N32_getpeername (__NR_N32_Linux + 51)
-#define __NR_N32_socketpair (__NR_N32_Linux + 52)
-#define __NR_N32_setsockopt (__NR_N32_Linux + 53)
-#define __NR_N32_getsockopt (__NR_N32_Linux + 54)
-#define __NR_N32_clone (__NR_N32_Linux + 55)
-#define __NR_N32_fork (__NR_N32_Linux + 56)
-#define __NR_N32_execve (__NR_N32_Linux + 57)
-#define __NR_N32_exit (__NR_N32_Linux + 58)
-#define __NR_N32_wait4 (__NR_N32_Linux + 59)
-#define __NR_N32_kill (__NR_N32_Linux + 60)
-#define __NR_N32_uname (__NR_N32_Linux + 61)
-#define __NR_N32_semget (__NR_N32_Linux + 62)
-#define __NR_N32_semop (__NR_N32_Linux + 63)
-#define __NR_N32_semctl (__NR_N32_Linux + 64)
-#define __NR_N32_shmdt (__NR_N32_Linux + 65)
-#define __NR_N32_msgget (__NR_N32_Linux + 66)
-#define __NR_N32_msgsnd (__NR_N32_Linux + 67)
-#define __NR_N32_msgrcv (__NR_N32_Linux + 68)
-#define __NR_N32_msgctl (__NR_N32_Linux + 69)
-#define __NR_N32_fcntl (__NR_N32_Linux + 70)
-#define __NR_N32_flock (__NR_N32_Linux + 71)
-#define __NR_N32_fsync (__NR_N32_Linux + 72)
-#define __NR_N32_fdatasync (__NR_N32_Linux + 73)
-#define __NR_N32_truncate (__NR_N32_Linux + 74)
-#define __NR_N32_ftruncate (__NR_N32_Linux + 75)
-#define __NR_N32_getdents (__NR_N32_Linux + 76)
-#define __NR_N32_getcwd (__NR_N32_Linux + 77)
-#define __NR_N32_chdir (__NR_N32_Linux + 78)
-#define __NR_N32_fchdir (__NR_N32_Linux + 79)
-#define __NR_N32_rename (__NR_N32_Linux + 80)
-#define __NR_N32_mkdir (__NR_N32_Linux + 81)
-#define __NR_N32_rmdir (__NR_N32_Linux + 82)
-#define __NR_N32_creat (__NR_N32_Linux + 83)
-#define __NR_N32_link (__NR_N32_Linux + 84)
-#define __NR_N32_unlink (__NR_N32_Linux + 85)
-#define __NR_N32_symlink (__NR_N32_Linux + 86)
-#define __NR_N32_readlink (__NR_N32_Linux + 87)
-#define __NR_N32_chmod (__NR_N32_Linux + 88)
-#define __NR_N32_fchmod (__NR_N32_Linux + 89)
-#define __NR_N32_chown (__NR_N32_Linux + 90)
-#define __NR_N32_fchown (__NR_N32_Linux + 91)
-#define __NR_N32_lchown (__NR_N32_Linux + 92)
-#define __NR_N32_umask (__NR_N32_Linux + 93)
-#define __NR_N32_gettimeofday (__NR_N32_Linux + 94)
-#define __NR_N32_getrlimit (__NR_N32_Linux + 95)
-#define __NR_N32_getrusage (__NR_N32_Linux + 96)
-#define __NR_N32_sysinfo (__NR_N32_Linux + 97)
-#define __NR_N32_times (__NR_N32_Linux + 98)
-#define __NR_N32_ptrace (__NR_N32_Linux + 99)
-#define __NR_N32_getuid (__NR_N32_Linux + 100)
-#define __NR_N32_syslog (__NR_N32_Linux + 101)
-#define __NR_N32_getgid (__NR_N32_Linux + 102)
-#define __NR_N32_setuid (__NR_N32_Linux + 103)
-#define __NR_N32_setgid (__NR_N32_Linux + 104)
-#define __NR_N32_geteuid (__NR_N32_Linux + 105)
-#define __NR_N32_getegid (__NR_N32_Linux + 106)
-#define __NR_N32_setpgid (__NR_N32_Linux + 107)
-#define __NR_N32_getppid (__NR_N32_Linux + 108)
-#define __NR_N32_getpgrp (__NR_N32_Linux + 109)
-#define __NR_N32_setsid (__NR_N32_Linux + 110)
-#define __NR_N32_setreuid (__NR_N32_Linux + 111)
-#define __NR_N32_setregid (__NR_N32_Linux + 112)
-#define __NR_N32_getgroups (__NR_N32_Linux + 113)
-#define __NR_N32_setgroups (__NR_N32_Linux + 114)
-#define __NR_N32_setresuid (__NR_N32_Linux + 115)
-#define __NR_N32_getresuid (__NR_N32_Linux + 116)
-#define __NR_N32_setresgid (__NR_N32_Linux + 117)
-#define __NR_N32_getresgid (__NR_N32_Linux + 118)
-#define __NR_N32_getpgid (__NR_N32_Linux + 119)
-#define __NR_N32_setfsuid (__NR_N32_Linux + 120)
-#define __NR_N32_setfsgid (__NR_N32_Linux + 121)
-#define __NR_N32_getsid (__NR_N32_Linux + 122)
-#define __NR_N32_capget (__NR_N32_Linux + 123)
-#define __NR_N32_capset (__NR_N32_Linux + 124)
-#define __NR_N32_rt_sigpending (__NR_N32_Linux + 125)
-#define __NR_N32_rt_sigtimedwait (__NR_N32_Linux + 126)
-#define __NR_N32_rt_sigqueueinfo (__NR_N32_Linux + 127)
-#define __NR_N32_rt_sigsuspend (__NR_N32_Linux + 128)
-#define __NR_N32_sigaltstack (__NR_N32_Linux + 129)
-#define __NR_N32_utime (__NR_N32_Linux + 130)
-#define __NR_N32_mknod (__NR_N32_Linux + 131)
-#define __NR_N32_personality (__NR_N32_Linux + 132)
-#define __NR_N32_ustat (__NR_N32_Linux + 133)
-#define __NR_N32_statfs (__NR_N32_Linux + 134)
-#define __NR_N32_fstatfs (__NR_N32_Linux + 135)
-#define __NR_N32_sysfs (__NR_N32_Linux + 136)
-#define __NR_N32_getpriority (__NR_N32_Linux + 137)
-#define __NR_N32_setpriority (__NR_N32_Linux + 138)
-#define __NR_N32_sched_setparam (__NR_N32_Linux + 139)
-#define __NR_N32_sched_getparam (__NR_N32_Linux + 140)
-#define __NR_N32_sched_setscheduler (__NR_N32_Linux + 141)
-#define __NR_N32_sched_getscheduler (__NR_N32_Linux + 142)
-#define __NR_N32_sched_get_priority_max (__NR_N32_Linux + 143)
-#define __NR_N32_sched_get_priority_min (__NR_N32_Linux + 144)
-#define __NR_N32_sched_rr_get_interval (__NR_N32_Linux + 145)
-#define __NR_N32_mlock (__NR_N32_Linux + 146)
-#define __NR_N32_munlock (__NR_N32_Linux + 147)
-#define __NR_N32_mlockall (__NR_N32_Linux + 148)
-#define __NR_N32_munlockall (__NR_N32_Linux + 149)
-#define __NR_N32_vhangup (__NR_N32_Linux + 150)
-#define __NR_N32_pivot_root (__NR_N32_Linux + 151)
-#define __NR_N32__sysctl (__NR_N32_Linux + 152)
-#define __NR_N32_prctl (__NR_N32_Linux + 153)
-#define __NR_N32_adjtimex (__NR_N32_Linux + 154)
-#define __NR_N32_setrlimit (__NR_N32_Linux + 155)
-#define __NR_N32_chroot (__NR_N32_Linux + 156)
-#define __NR_N32_sync (__NR_N32_Linux + 157)
-#define __NR_N32_acct (__NR_N32_Linux + 158)
-#define __NR_N32_settimeofday (__NR_N32_Linux + 159)
-#define __NR_N32_mount (__NR_N32_Linux + 160)
-#define __NR_N32_umount2 (__NR_N32_Linux + 161)
-#define __NR_N32_swapon (__NR_N32_Linux + 162)
-#define __NR_N32_swapoff (__NR_N32_Linux + 163)
-#define __NR_N32_reboot (__NR_N32_Linux + 164)
-#define __NR_N32_sethostname (__NR_N32_Linux + 165)
-#define __NR_N32_setdomainname (__NR_N32_Linux + 166)
-#define __NR_N32_create_module (__NR_N32_Linux + 167)
-#define __NR_N32_init_module (__NR_N32_Linux + 168)
-#define __NR_N32_delete_module (__NR_N32_Linux + 169)
-#define __NR_N32_get_kernel_syms (__NR_N32_Linux + 170)
-#define __NR_N32_query_module (__NR_N32_Linux + 171)
-#define __NR_N32_quotactl (__NR_N32_Linux + 172)
-#define __NR_N32_nfsservctl (__NR_N32_Linux + 173)
-#define __NR_N32_getpmsg (__NR_N32_Linux + 174)
-#define __NR_N32_putpmsg (__NR_N32_Linux + 175)
-#define __NR_N32_afs_syscall (__NR_N32_Linux + 176)
-#define __NR_N32_reserved177 (__NR_N32_Linux + 177)
-#define __NR_N32_gettid (__NR_N32_Linux + 178)
-#define __NR_N32_readahead (__NR_N32_Linux + 179)
-#define __NR_N32_setxattr (__NR_N32_Linux + 180)
-#define __NR_N32_lsetxattr (__NR_N32_Linux + 181)
-#define __NR_N32_fsetxattr (__NR_N32_Linux + 182)
-#define __NR_N32_getxattr (__NR_N32_Linux + 183)
-#define __NR_N32_lgetxattr (__NR_N32_Linux + 184)
-#define __NR_N32_fgetxattr (__NR_N32_Linux + 185)
-#define __NR_N32_listxattr (__NR_N32_Linux + 186)
-#define __NR_N32_llistxattr (__NR_N32_Linux + 187)
-#define __NR_N32_flistxattr (__NR_N32_Linux + 188)
-#define __NR_N32_removexattr (__NR_N32_Linux + 189)
-#define __NR_N32_lremovexattr (__NR_N32_Linux + 190)
-#define __NR_N32_fremovexattr (__NR_N32_Linux + 191)
-#define __NR_N32_tkill (__NR_N32_Linux + 192)
-#define __NR_N32_time (__NR_N32_Linux + 193)
-#define __NR_N32_futex (__NR_N32_Linux + 194)
-#define __NR_N32_sched_setaffinity (__NR_N32_Linux + 195)
-#define __NR_N32_sched_getaffinity (__NR_N32_Linux + 196)
-#define __NR_N32_cacheflush (__NR_N32_Linux + 197)
-#define __NR_N32_cachectl (__NR_N32_Linux + 198)
-#define __NR_N32_sysmips (__NR_N32_Linux + 199)
-#define __NR_N32_io_setup (__NR_N32_Linux + 200)
-#define __NR_N32_io_destroy (__NR_N32_Linux + 201)
-#define __NR_N32_io_getevents (__NR_N32_Linux + 202)
-#define __NR_N32_io_submit (__NR_N32_Linux + 203)
-#define __NR_N32_io_cancel (__NR_N32_Linux + 204)
-#define __NR_N32_exit_group (__NR_N32_Linux + 205)
-#define __NR_N32_lookup_dcookie (__NR_N32_Linux + 206)
-#define __NR_N32_epoll_create (__NR_N32_Linux + 207)
-#define __NR_N32_epoll_ctl (__NR_N32_Linux + 208)
-#define __NR_N32_epoll_wait (__NR_N32_Linux + 209)
-#define __NR_N32_remap_file_page (__NR_N32_Linux + 210)
-#define __NR_N32_rt_sigreturn (__NR_N32_Linux + 211)
-#define __NR_N32_fcntl64 (__NR_N32_Linux + 212)
-#define __NR_N32_set_tid_address (__NR_N32_Linux + 213)
-#define __NR_N32_restart_syscall (__NR_N32_Linux + 214)
-#define __NR_N32_semtimedop (__NR_N32_Linux + 215)
-#define __NR_N32_fadvise64 (__NR_N32_Linux + 216)
-#define __NR_N32_statfs64 (__NR_N32_Linux + 217)
-#define __NR_N32_fstatfs64 (__NR_N32_Linux + 218)
-
-/*
- * Offset of the last N32 flavoured syscall
- */
-#define __NR_N32_Linux_syscalls 218
-
-#ifndef __ASSEMBLY__
-
-/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */
-#define _syscall0(type,name) \
-type name(void) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a3 asm("$7"); \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %2\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "=r" (__a3) \
- : "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-/*
- * DANGER: This macro isn't usable for the pipe(2) call
- * which has a unusual return convention.
- */
-#define _syscall1(type,name,atype,a) \
-type name(atype a) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a3 asm("$7"); \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %3\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "=r" (__a3) \
- : "r" (__a0), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall2(type,name,atype,a,btype,b) \
-type name(atype a, btype b) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a3 asm("$7"); \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %4\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "=r" (__a3) \
- : "r" (__a0), "r" (__a1), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall3(type,name,atype,a,btype,b,ctype,c) \
-type name(atype a, btype b, ctype c) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7"); \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %5\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "=r" (__a3) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
-type name(atype a, btype b, ctype c, dtype d) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %5\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#if (_MIPS_SIM == _ABIN32) || (_MIPS_SIM == _ABI64)
-
-#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
-type name (atype a,btype b,ctype c,dtype d,etype e) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- register unsigned long __a4 asm("$8") = (unsigned long) e; \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %6\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
-type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- register unsigned long __a4 asm("$8") = (unsigned long) e; \
- register unsigned long __a5 asm("$9") = (unsigned long) f; \
- \
- __asm__ volatile ( "" \
- : "+r" (__a5) \
- : \
- : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %6\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall7(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f,gtype,g) \
-type name (atype a,btype b,ctype c,dtype d,etype e,ftype f,gtype g) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- register unsigned long __a4 asm("$8") = (unsigned long) e; \
- register unsigned long __a5 asm("$9") = (unsigned long) f; \
- register unsigned long __a6 asm("$10") = (unsigned long) g; \
- \
- __asm__ volatile ( "" \
- : "+r" (__a5), "+r" (__a6) \
- : \
- : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "li\t$2, %6\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#else /* not N32 or 64 ABI */
-
-/*
- * Using those means your brain needs more than an oil change ;-)
- */
-
-#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
-type name(atype a, btype b, ctype c, dtype d, etype e) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "lw\t$2, %6\n\t" \
- "subu\t$29, 32\n\t" \
- "sw\t$2, 16($29)\n\t" \
- "li\t$2, %5\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- "addiu\t$29, 32\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
- "m" ((unsigned long)e) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
-type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "lw\t$2, %6\n\t" \
- "lw\t$8, %7\n\t" \
- "subu\t$29, 32\n\t" \
- "sw\t$2, 16($29)\n\t" \
- "sw\t$8, 20($29)\n\t" \
- "li\t$2, %5\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- "addiu\t$29, 32\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
- "m" ((unsigned long)e), "m" ((unsigned long)f) \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#define _syscall7(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f,gtype,g) \
-type name(atype a, btype b, ctype c, dtype d, etype e, ftype f, gtype g) \
-{ \
- register unsigned long __v0 asm("$2") = __NR_##name; \
- register unsigned long __a0 asm("$4") = (unsigned long) a; \
- register unsigned long __a1 asm("$5") = (unsigned long) b; \
- register unsigned long __a2 asm("$6") = (unsigned long) c; \
- register unsigned long __a3 asm("$7") = (unsigned long) d; \
- \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
- "lw\t$2, %6\n\t" \
- "lw\t$8, %7\n\t" \
- "lw\t$9, %8\n\t" \
- "subu\t$29, 32\n\t" \
- "sw\t$2, 16($29)\n\t" \
- "sw\t$8, 20($29)\n\t" \
- "sw\t$9, 24($29)\n\t" \
- "li\t$2, %5\t\t\t# " #name "\n\t" \
- "syscall\n\t" \
- "addiu\t$29, 32\n\t" \
- ".set\treorder" \
- : "=&r" (__v0), "+r" (__a3) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
- "m" ((unsigned long)e), "m" ((unsigned long)f), \
- "m" ((unsigned long)g), \
- : "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
- \
- if (__a3 == 0) \
- return (type) __v0; \
- errno = __v0; \
- return -1; \
-}
-
-#endif
-
-#ifdef __KERNEL_SYSCALLS__
-
-/*
- * we need this inline - forking from kernel space will result
- * in NO COPY ON WRITE (!!!), until an execve is executed. This
- * is no problem, but for the stack. This is handled by not letting
- * main() use the stack at all after fork(). Thus, no function
- * calls - which means inline code for fork too, as otherwise we
- * would use the stack upon exit from 'fork()'.
- *
- * Actually only pause and fork are needed inline, so that there
- * won't be any messing with the stack from main(), but we define
- * some others too.
- */
-#define __NR__exit __NR_exit
-static inline _syscall0(pid_t,setsid)
-static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
-static inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
-static inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
-static inline _syscall1(int,dup,int,fd)
-static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
-static inline _syscall3(int,open,const char *,file,int,flag,int,mode)
-static inline _syscall1(int,close,int,fd)
-static inline _syscall1(int,_exit,int,exitcode)
-struct rusage;
-static inline _syscall4(pid_t,wait4,pid_t,pid,int *,stat_addr,int,options,struct rusage *,ru)
-
-static inline pid_t waitpid(int pid, int * wait_stat, int flags)
-{
- return wait4(pid, wait_stat, flags, NULL);
-}
-
-#endif /* __KERNEL_SYSCALLS__ */
-#endif /* !__ASSEMBLY__ */
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall");
-
-#endif /* _ASM_UNISTD_H */
diff -Nru a/include/asm-mips64/user.h b/include/asm-mips64/user.h
--- a/include/asm-mips64/user.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,57 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
- */
-#ifndef _ASM_USER_H
-#define _ASM_USER_H
-
-#include <asm/page.h>
-#include <asm/reg.h>
-
-/*
- * Core file format: The core file is written in such a way that gdb
- * can understand it and provide useful information to the user (under
- * linux we use the `trad-core' bfd, NOT the irix-core). The file
- * contents are as follows:
- *
- * upage: 1 page consisting of a user struct that tells gdb
- * what is present in the file. Directly after this is a
- * copy of the task_struct, which is currently not used by gdb,
- * but it may come in handy at some point. All of the registers
- * are stored as part of the upage. The upage should always be
- * only one page long.
- * data: The data segment follows next. We use current->end_text to
- * current->brk to pick up all of the user variables, plus any memory
- * that may have been sbrk'ed. No attempt is made to determine if a
- * page is demand-zero or if a page is totally unused, we just cover
- * the entire range. All of the addresses are rounded in such a way
- * that an integral number of pages is written.
- * stack: We need the stack information in order to get a meaningful
- * backtrace. We need to write the data from usp to
- * current->start_stack, so we round each of these in order to be able
- * to write an integer number of pages.
- */
-struct user {
- unsigned long regs[EF_SIZE/8+64]; /* integer and fp regs */
- size_t u_tsize; /* text size (pages) */
- size_t u_dsize; /* data size (pages) */
- size_t u_ssize; /* stack size (pages) */
- unsigned long start_code; /* text starting address */
- unsigned long start_data; /* data starting address */
- unsigned long start_stack; /* stack starting address */
- long int signal; /* signal causing core dump */
- struct regs * u_ar0; /* help gdb find registers */
- unsigned long magic; /* identifies a core file */
- char u_comm[32]; /* user command name */
-};
-
-#define NBPG PAGE_SIZE
-#define UPAGES 1
-#define HOST_TEXT_START_ADDR (u.start_code)
-#define HOST_DATA_START_ADDR (u.start_data)
-#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
-
-#endif /* _ASM_USER_H */
diff -Nru a/include/asm-mips64/usioctl.h b/include/asm-mips64/usioctl.h
--- a/include/asm-mips64/usioctl.h Sun Aug 3 13:14:47 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,32 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * usema/usemaclone-related stuff.
- *
- * `Inspired' by IRIX's sys/usioctl.h
- *
- * Mike.
- */
-#ifndef _ASM_USIOCTL_H
-#define _ASM_USIOCTL_H
-
-/* ioctls */
-#define UIOC ('u' << 16 | 's' << 8)
-
-#define UIOCATTACHSEMA (UIOC|2) /* attach to sema */
-#define UIOCBLOCK (UIOC|3) /* block sync "intr"? */
-#define UIOCABLOCK (UIOC|4) /* block async */
-#define UIOCNOIBLOCK (UIOC|5) /* IRIX: block sync intr
- Linux: block sync nointr */
-#define UIOCUNBLOCK (UIOC|6) /* unblock sync */
-#define UIOCAUNBLOCK (UIOC|7) /* unblock async */
-#define UIOCINIT (UIOC|8) /* init sema (async) */
-
-typedef struct usattach_s {
- dev_t us_dev; /* attach dev */
- void *us_handle; /* userland semaphore handle */
-} usattach_t;
-
-#endif /* _ASM_USIOCTL_H */
diff -Nru a/include/asm-mips64/vga.h b/include/asm-mips64/vga.h
--- a/include/asm-mips64/vga.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,19 +0,0 @@
-/*
- * Access to VGA videoram
- *
- * (c) 1998 Martin Mares <mj@ucw.cz>
- */
-#ifndef _ASM_VGA_H
-#define _ASM_VGA_H
-
-/*
- * On the PC, we can just recalculate addresses and then
- * access the videoram directly without any black magic.
- */
-
-#define VGA_MAP_MEM(x) (0xb0000000L + (unsigned long)(x))
-
-#define vga_readb(x) (*(x))
-#define vga_writeb(x,y) (*(y) = (x))
-
-#endif /* _ASM_VGA_H */
diff -Nru a/include/asm-mips64/war.h b/include/asm-mips64/war.h
--- a/include/asm-mips64/war.h Sun Aug 3 13:14:50 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,132 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2002 by Ralf Baechle
- */
-#ifndef _ASM_WAR_H
-#define _ASM_WAR_H
-
-#include <linux/config.h>
-
-/*
- * Pleassures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
- *
- * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
- * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
- * executed if there is no other dcache activity. If the dcache is
- * accessed for another instruction immeidately preceding when these
- * cache instructions are executing, it is possible that the dcache
- * tag match outputs used by these cache instructions will be
- * incorrect. These cache instructions should be preceded by at least
- * four instructions that are not any kind of load or store
- * instruction.
- *
- * This is not allowed: lw
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- *
- * This is allowed: lw
- * nop
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- *
- * #define R4600_V1_HIT_CACHEOP_WAR 1
- */
-
-
-/*
- * Writeback and invalidate the primary cache dcache before DMA.
- *
- * R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
- * Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
- * operate correctly if the internal data cache refill buffer is empty. These
- * CACHE instructions should be separated from any potential data cache miss
- * by a load instruction to an uncached address to empty the response buffer."
- * (Revision 2.0 device errata from IDT available on http://www.idt.com/
- * in .pdf format.)
- *
- * #define R4600_V2_HIT_CACHEOP_WAR 1
- */
-
-/*
- * R4600 CPU modules for the Indy come with both V1.7 and V2.0 processors.
- */
-#ifdef CONFIG_SGI_IP22
-
-#define R4600_V1_HIT_CACHEOP_WAR 1
-#define R4600_V2_HIT_CACHEOP_WAR 1
-
-#endif
-
-/*
- * But the RM200C seems to have been shipped only with V2.0 R4600s
- */
-#ifdef CONFIG_SNI_RM200_PCI
-
-#define R4600_V2_HIT_CACHEOP_WAR 1
-
-#endif
-
-#ifdef CONFIG_CPU_R5432
-
-/*
- * When an interrupt happens on a CP0 register read instruction, CPU may
- * lock up or read corrupted values of CP0 registers after it enters
- * the exception handler.
- *
- * This workaround makes sure that we read a "safe" CP0 register as the
- * first thing in the exception handler, which breaks one of the
- * pre-conditions for this problem.
- */
-#define R5432_CP0_INTERRUPT_WAR 1
-
-#endif
-
-#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
- defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
-
-/*
- * Workaround for the Sibyte M3 errata the text of which can be found at
- *
- * http://sibyte.broadcom.com/hw/bcm1250/docs/pass2errata.txt
- *
- * This will enable the use of a special TLB refill handler which does a
- * consistency check on the information in c0_badvaddr and c0_entryhi and
- * will just return and take the exception again if the information was
- * found to be inconsistent.
- */
-#define BCM1250_M3_WAR 1
-
-/*
- * This is a DUART workaround related to glitches around register accesses
- */
-#define SIBYTE_1956_WAR 1
-
-#endif
-
-/*
- * Workarounds default to off
- */
-#ifndef R4600_V1_HIT_CACHEOP_WAR
-#define R4600_V1_HIT_CACHEOP_WAR 0
-#endif
-#ifndef R4600_V2_HIT_CACHEOP_WAR
-#define R4600_V2_HIT_CACHEOP_WAR 0
-#endif
-#ifndef R5432_CP0_INTERRUPT_WAR
-#define R5432_CP0_INTERRUPT_WAR 0
-#endif
-#ifndef BCM1250_M3_WAR
-#define BCM1250_M3_WAR 0
-#endif
-#ifndef SIBYTE_1956_WAR
-#define SIBYTE_1956_WAR 0
-#endif
-
-#endif /* _ASM_WAR_H */
diff -Nru a/include/asm-mips64/watch.h b/include/asm-mips64/watch.h
--- a/include/asm-mips64/watch.h Sun Aug 3 13:14:53 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,35 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
- */
-#ifndef _ASM_WATCH_H
-#define _ASM_WATCH_H
-
-#include <linux/linkage.h>
-
-/*
- * Types of reference for watch_set()
- */
-enum wref_type {
- wr_save = 1,
- wr_load = 2
-};
-
-extern asmlinkage void __watch_set(unsigned long addr, enum wref_type ref);
-extern asmlinkage void __watch_clear(void);
-extern asmlinkage void __watch_reenable(void);
-
-#define watch_set(addr, ref) \
- if (cpu_has_watch) \
- __watch_set(addr, ref)
-#define watch_clear() \
- if (cpu_has_watch) \
- __watch_clear()
-#define watch_reenable() \
- if (cpu_has_watch) \
- __watch_reenable()
-
-#endif /* _ASM_WATCH_H */
diff -Nru a/include/asm-mips64/wbflush.h b/include/asm-mips64/wbflush.h
--- a/include/asm-mips64/wbflush.h Sun Aug 3 13:14:49 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,18 +0,0 @@
-/*
- * Header file for using the wbflush routine
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1998 Harald Koerfgen
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#ifndef __ASM_MIPS64_WBFLUSH_H
-#define __ASM_MIPS64_WBFLUSH_H
-
-#define wbflush_setup() do { } while (0)
-
-#define wbflush() fast_iob()
-
-#endif /* __ASM_MIPS64_WBFLUSH_H */
diff -Nru a/include/asm-mips64/xor.h b/include/asm-mips64/xor.h
--- a/include/asm-mips64/xor.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1 +0,0 @@
-#include <asm-generic/xor.h>
diff -Nru a/include/asm-mips64/xtalk/xtalk.h b/include/asm-mips64/xtalk/xtalk.h
--- a/include/asm-mips64/xtalk/xtalk.h Sun Aug 3 13:14:44 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,52 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * xtalk.h -- platform-independent crosstalk interface, derived from
- * IRIX <sys/PCI/bridge.h>, revision 1.38.
- *
- * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_XTALK_XTALK_H
-#define _ASM_XTALK_XTALK_H
-
-#ifndef __ASSEMBLY__
-/*
- * User-level device driver visible types
- */
-typedef char xwidgetnum_t; /* xtalk widget number (0..15) */
-
-#define XWIDGET_NONE -1
-
-typedef int xwidget_part_num_t; /* xtalk widget part number */
-
-#define XWIDGET_PART_NUM_NONE -1
-
-typedef int xwidget_rev_num_t; /* xtalk widget revision number */
-
-#define XWIDGET_REV_NUM_NONE -1
-
-typedef int xwidget_mfg_num_t; /* xtalk widget manufacturing ID */
-
-#define XWIDGET_MFG_NUM_NONE -1
-
-typedef struct xtalk_piomap_s *xtalk_piomap_t;
-
-/* It is often convenient to fold the XIO target port
- * number into the XIO address.
- */
-#define XIO_NOWHERE (0xFFFFFFFFFFFFFFFFull)
-#define XIO_ADDR_BITS (0x0000FFFFFFFFFFFFull)
-#define XIO_PORT_BITS (0xF000000000000000ull)
-#define XIO_PORT_SHIFT (60)
-
-#define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0)
-#define XIO_ADDR(x) ((x)&XIO_ADDR_BITS)
-#define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT))
-#define XIO_PACK(p,o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS))
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_XTALK_XTALK_H */
diff -Nru a/include/asm-mips64/xtalk/xwidget.h b/include/asm-mips64/xtalk/xwidget.h
--- a/include/asm-mips64/xtalk/xwidget.h Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,167 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * xwidget.h - generic crosstalk widget header file, derived from IRIX
- * <sys/xtalk/xtalkwidget.h>, revision 1.32.
- *
- * Copyright (C) 1996, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
- */
-#ifndef _ASM_XTALK_XWIDGET_H
-#define _ASM_XTALK_XWIDGET_H
-
-#include <linux/types.h>
-#include <asm/xtalk/xtalk.h>
-
-#define WIDGET_ID 0x04
-#define WIDGET_STATUS 0x0c
-#define WIDGET_ERR_UPPER_ADDR 0x14
-#define WIDGET_ERR_LOWER_ADDR 0x1c
-#define WIDGET_CONTROL 0x24
-#define WIDGET_REQ_TIMEOUT 0x2c
-#define WIDGET_INTDEST_UPPER_ADDR 0x34
-#define WIDGET_INTDEST_LOWER_ADDR 0x3c
-#define WIDGET_ERR_CMD_WORD 0x44
-#define WIDGET_LLP_CFG 0x4c
-#define WIDGET_TFLUSH 0x54
-
-/* WIDGET_ID */
-#define WIDGET_REV_NUM 0xf0000000
-#define WIDGET_PART_NUM 0x0ffff000
-#define WIDGET_MFG_NUM 0x00000ffe
-#define WIDGET_REV_NUM_SHFT 28
-#define WIDGET_PART_NUM_SHFT 12
-#define WIDGET_MFG_NUM_SHFT 1
-
-#define XWIDGET_PART_NUM(widgetid) (((widgetid) & WIDGET_PART_NUM) >> WIDGET_PART_NUM_SHFT)
-#define XWIDGET_REV_NUM(widgetid) (((widgetid) & WIDGET_REV_NUM) >> WIDGET_REV_NUM_SHFT)
-#define XWIDGET_MFG_NUM(widgetid) (((widgetid) & WIDGET_MFG_NUM) >> WIDGET_MFG_NUM_SHFT)
-
-/* WIDGET_STATUS */
-#define WIDGET_LLP_REC_CNT 0xff000000
-#define WIDGET_LLP_TX_CNT 0x00ff0000
-#define WIDGET_PENDING 0x0000001f
-
-/* WIDGET_ERR_UPPER_ADDR */
-#define WIDGET_ERR_UPPER_ADDR_ONLY 0x0000ffff
-
-/* WIDGET_CONTROL */
-#define WIDGET_F_BAD_PKT 0x00010000
-#define WIDGET_LLP_XBAR_CRD 0x0000f000
-#define WIDGET_LLP_XBAR_CRD_SHFT 12
-#define WIDGET_CLR_RLLP_CNT 0x00000800
-#define WIDGET_CLR_TLLP_CNT 0x00000400
-#define WIDGET_SYS_END 0x00000200
-#define WIDGET_MAX_TRANS 0x000001f0
-#define WIDGET_WIDGET_ID 0x0000000f
-
-/* WIDGET_INTDEST_UPPER_ADDR */
-#define WIDGET_INT_VECTOR 0xff000000
-#define WIDGET_INT_VECTOR_SHFT 24
-#define WIDGET_TARGET_ID 0x000f0000
-#define WIDGET_TARGET_ID_SHFT 16
-#define WIDGET_UPP_ADDR 0x0000ffff
-
-/* WIDGET_ERR_CMD_WORD */
-#define WIDGET_DIDN 0xf0000000
-#define WIDGET_SIDN 0x0f000000
-#define WIDGET_PACTYP 0x00f00000
-#define WIDGET_TNUM 0x000f8000
-#define WIDGET_COHERENT 0x00004000
-#define WIDGET_DS 0x00003000
-#define WIDGET_GBR 0x00000800
-#define WIDGET_VBPM 0x00000400
-#define WIDGET_ERROR 0x00000200
-#define WIDGET_BARRIER 0x00000100
-
-/* WIDGET_LLP_CFG */
-#define WIDGET_LLP_MAXRETRY 0x03ff0000
-#define WIDGET_LLP_MAXRETRY_SHFT 16
-#define WIDGET_LLP_NULLTIMEOUT 0x0000fc00
-#define WIDGET_LLP_NULLTIMEOUT_SHFT 10
-#define WIDGET_LLP_MAXBURST 0x000003ff
-#define WIDGET_LLP_MAXBURST_SHFT 0
-
-/*
- * according to the crosstalk spec, only 32-bits access to the widget
- * configuration registers is allowed. some widgets may allow 64-bits
- * access but software should not depend on it. registers beyond the
- * widget target flush register are widget dependent thus will not be
- * defined here
- */
-#ifndef __ASSEMBLY__
-typedef u32 widgetreg_t;
-
-/* widget configuration registers */
-typedef volatile struct widget_cfg {
- widgetreg_t w_pad_0; /* 0x00 */
- widgetreg_t w_id; /* 0x04 */
- widgetreg_t w_pad_1; /* 0x08 */
- widgetreg_t w_status; /* 0x0c */
- widgetreg_t w_pad_2; /* 0x10 */
- widgetreg_t w_err_upper_addr; /* 0x14 */
- widgetreg_t w_pad_3; /* 0x18 */
- widgetreg_t w_err_lower_addr; /* 0x1c */
- widgetreg_t w_pad_4; /* 0x20 */
- widgetreg_t w_control; /* 0x24 */
- widgetreg_t w_pad_5; /* 0x28 */
- widgetreg_t w_req_timeout; /* 0x2c */
- widgetreg_t w_pad_6; /* 0x30 */
- widgetreg_t w_intdest_upper_addr; /* 0x34 */
- widgetreg_t w_pad_7; /* 0x38 */
- widgetreg_t w_intdest_lower_addr; /* 0x3c */
- widgetreg_t w_pad_8; /* 0x40 */
- widgetreg_t w_err_cmd_word; /* 0x44 */
- widgetreg_t w_pad_9; /* 0x48 */
- widgetreg_t w_llp_cfg; /* 0x4c */
- widgetreg_t w_pad_10; /* 0x50 */
- widgetreg_t w_tflush; /* 0x54 */
-} widget_cfg_t;
-
-typedef struct {
- unsigned didn:4;
- unsigned sidn:4;
- unsigned pactyp:4;
- unsigned tnum:5;
- unsigned ct:1;
- unsigned ds:2;
- unsigned gbr:1;
- unsigned vbpm:1;
- unsigned error:1;
- unsigned bo:1;
- unsigned other:8;
-} w_err_cmd_word_f;
-
-typedef union {
- widgetreg_t r;
- w_err_cmd_word_f f;
-} w_err_cmd_word_u;
-
-typedef struct xwidget_info_s *xwidget_info_t;
-
-/*
- * Crosstalk Widget Hardware Identification, as defined in the Crosstalk spec.
- */
-typedef struct xwidget_hwid_s {
- xwidget_part_num_t part_num;
- xwidget_rev_num_t rev_num;
- xwidget_mfg_num_t mfg_num;
-} *xwidget_hwid_t;
-
-
-/*
- * Returns 1 if a driver that handles devices described by hwid1 is able
- * to manage a device with hardwareid hwid2. NOTE: We don't check rev
- * numbers at all.
- */
-#define XWIDGET_HARDWARE_ID_MATCH(hwid1, hwid2) \
- (((hwid1)->part_num == (hwid2)->part_num) && \
- (((hwid1)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
- ((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
- ((hwid1)->mfg_num == (hwid2)->mfg_num)))
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_XTALK_XWIDGET_H */
diff -Nru a/include/asm-sparc/local.h b/include/asm-sparc/local.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-sparc/local.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,6 @@
+#ifndef _SPARC_LOCAL_H
+#define _SPARC_LOCAL_H
+
+#include <asm-generic/local.h>
+
+#endif
diff -Nru a/include/asm-sparc/sections.h b/include/asm-sparc/sections.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-sparc/sections.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,6 @@
+#ifndef _SPARC_SECTIONS_H
+#define _SPARC_SECTIONS_H
+
+#include <asm-generic/sections.h>
+
+#endif
diff -Nru a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
--- a/include/asm-sparc64/pbm.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-sparc64/pbm.h Sun Aug 3 13:14:53 2003
@@ -158,6 +158,7 @@
struct linux_prom_pci_intmap pbm_intmap[PROM_PCIIMAP_MAX];
int num_pbm_intmap;
struct linux_prom_pci_intmask pbm_intmask;
+ u64 ino_bitmap;
/* PBM I/O and Memory space resources. */
struct resource io_space;
diff -Nru a/include/asm-v850/local.h b/include/asm-v850/local.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-v850/local.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,6 @@
+#ifndef __V850_LOCAL_H__
+#define __V850_LOCAL_H__
+
+#include <asm-generic/local.h>
+
+#endif /* __V850_LOCAL_H__ */
diff -Nru a/include/asm-v850/sections.h b/include/asm-v850/sections.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-v850/sections.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,6 @@
+#ifndef __V850_SECTIONS_H__
+#define __V850_SECTIONS_H__
+
+#include <asm-generic/sections.h>
+
+#endif /* __V850_SECTIONS_H__ */
diff -Nru a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h
--- a/include/asm-x86_64/apic.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-x86_64/apic.h Sun Aug 3 13:14:52 2003
@@ -84,10 +84,6 @@
extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
-#ifdef CONFIG_PM
-extern struct sys_device device_lapic;
-#endif
-
extern int check_nmi_watchdog (void);
extern unsigned int nmi_watchdog;
diff -Nru a/include/asm-x86_64/desc.h b/include/asm-x86_64/desc.h
--- a/include/asm-x86_64/desc.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-x86_64/desc.h Sun Aug 3 13:14:53 2003
@@ -7,6 +7,7 @@
#ifndef __ASSEMBLY__
+#include <linux/string.h>
#include <asm/segment.h>
#include <asm/mmu.h>
diff -Nru a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h
--- a/include/asm-x86_64/hw_irq.h Sun Aug 3 13:14:52 2003
+++ b/include/asm-x86_64/hw_irq.h Sun Aug 3 13:14:52 2003
@@ -164,7 +164,7 @@
atomic_inc((atomic_t *)&prof_buffer[rip]);
}
-#ifdef CONFIG_SMP /*more of this file should probably be ifdefed SMP */
+#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP)
static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {
if (IO_APIC_IRQ(i))
send_IPI_self(IO_APIC_VECTOR(i));
diff -Nru a/include/asm-x86_64/local.h b/include/asm-x86_64/local.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/include/asm-x86_64/local.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,73 @@
+#ifndef _ARCH_X8664_LOCAL_H
+#define _ARCH_X8664_LOCAL_H
+
+#include <linux/percpu.h>
+
+typedef struct
+{
+ volatile unsigned int counter;
+} local_t;
+
+#define LOCAL_INIT(i) { (i) }
+
+#define local_read(v) ((v)->counter)
+#define local_set(v,i) (((v)->counter) = (i))
+
+static __inline__ void local_inc(local_t *v)
+{
+ __asm__ __volatile__(
+ "incl %0"
+ :"=m" (v->counter)
+ :"m" (v->counter));
+}
+
+static __inline__ void local_dec(local_t *v)
+{
+ __asm__ __volatile__(
+ "decl %0"
+ :"=m" (v->counter)
+ :"m" (v->counter));
+}
+
+static __inline__ void local_add(unsigned long i, local_t *v)
+{
+ __asm__ __volatile__(
+ "addl %1,%0"
+ :"=m" (v->counter)
+ :"ir" (i), "m" (v->counter));
+}
+
+static __inline__ void local_sub(unsigned long i, local_t *v)
+{
+ __asm__ __volatile__(
+ "subl %1,%0"
+ :"=m" (v->counter)
+ :"ir" (i), "m" (v->counter));
+}
+
+/* On x86, these are no better than the atomic variants. */
+#define __local_inc(l) local_inc(l)
+#define __local_dec(l) local_dec(l)
+#define __local_add(i,l) local_add((i),(l))
+#define __local_sub(i,l) local_sub((i),(l))
+
+/* Use these for per-cpu local_t variables: on some archs they are
+ * much more efficient than these naive implementations. Note they take
+ * a variable, not an address.
+ *
+ * This could be done better if we moved the per cpu data directly
+ * after GS.
+ */
+#define cpu_local_read(v) local_read(&__get_cpu_var(v))
+#define cpu_local_set(v, i) local_set(&__get_cpu_var(v), (i))
+#define cpu_local_inc(v) local_inc(&__get_cpu_var(v))
+#define cpu_local_dec(v) local_dec(&__get_cpu_var(v))
+#define cpu_local_add(i, v) local_add((i), &__get_cpu_var(v))
+#define cpu_local_sub(i, v) local_sub((i), &__get_cpu_var(v))
+
+#define __cpu_local_inc(v) cpu_local_inc(v)
+#define __cpu_local_dec(v) cpu_local_dec(v)
+#define __cpu_local_add(i, v) cpu_local_add((i), (v))
+#define __cpu_local_sub(i, v) cpu_local_sub((i), (v))
+
+#endif /* _ARCH_I386_LOCAL_H */
diff -Nru a/include/asm-x86_64/mpspec.h b/include/asm-x86_64/mpspec.h
--- a/include/asm-x86_64/mpspec.h Sun Aug 3 13:14:48 2003
+++ b/include/asm-x86_64/mpspec.h Sun Aug 3 13:14:48 2003
@@ -164,11 +164,9 @@
MP_BUS_PCI,
MP_BUS_MCA
};
-extern int mp_bus_id_to_type [MAX_MP_BUSSES];
-extern int mp_bus_id_to_node [MAX_MP_BUSSES];
-extern int mp_bus_id_to_local [MAX_MP_BUSSES];
-extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
+extern unsigned char mp_bus_id_to_type [MAX_MP_BUSSES];
extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
+extern unsigned long mp_bus_to_cpumask [MAX_MP_BUSSES];
extern unsigned int boot_cpu_physical_apicid;
extern unsigned long phys_cpu_present_map;
@@ -177,11 +175,9 @@
extern void get_smp_config (void);
extern int nr_ioapics;
extern int apic_version [MAX_APICS];
-extern int mp_bus_id_to_type [MAX_MP_BUSSES];
extern int mp_irq_entries;
extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
extern int mpc_default_type;
-extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
extern int mp_current_pci_id;
extern unsigned long mp_lapic_addr;
extern int pic_mode;
diff -Nru a/include/asm-x86_64/nmi.h b/include/asm-x86_64/nmi.h
--- a/include/asm-x86_64/nmi.h Sun Aug 3 13:14:45 2003
+++ b/include/asm-x86_64/nmi.h Sun Aug 3 13:14:45 2003
@@ -48,4 +48,6 @@
extern void default_do_nmi(struct pt_regs *);
+extern void default_do_nmi(struct pt_regs *);
+
#endif /* ASM_NMI_H */
diff -Nru a/include/asm-x86_64/pda.h b/include/asm-x86_64/pda.h
--- a/include/asm-x86_64/pda.h Sun Aug 3 13:14:47 2003
+++ b/include/asm-x86_64/pda.h Sun Aug 3 13:14:47 2003
@@ -9,7 +9,7 @@
/* Per processor datastructure. %gs points to it while the kernel runs */
struct x8664_pda {
struct task_struct *pcurrent; /* Current process */
- unsigned long cpudata_offset;
+ unsigned long data_offset; /* Per cpu data offset from linker address */
struct x8664_pda *me; /* Pointer to itself */
unsigned long kernelstack; /* TOS for current process */
unsigned long oldrsp; /* user rsp for system call */
diff -Nru a/include/asm-x86_64/percpu.h b/include/asm-x86_64/percpu.h
--- a/include/asm-x86_64/percpu.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-x86_64/percpu.h Sun Aug 3 13:14:50 2003
@@ -1,6 +1,53 @@
-#ifndef __ARCH_I386_PERCPU__
-#define __ARCH_I386_PERCPU__
+#ifndef _ASM_X8664_PERCPU_H_
+#define _ASM_X8664_PERCPU_H_
-#include <asm-generic/percpu.h>
+#include <asm/pda.h>
-#endif /* __ARCH_I386_PERCPU__ */
+#ifdef CONFIG_SMP
+
+/* Same as the generic code except that we cache the per cpu offset
+ in the pda. This gives an 3 instruction reference for per cpu data */
+
+#include <linux/compiler.h>
+#include <asm/pda.h>
+#define __my_cpu_offset() read_pda(data_offset)
+#define __per_cpu_offset(cpu) (cpu_pda[cpu].data_offset)
+
+/* Separate out the type, so (int[3], foo) works. */
+#define DEFINE_PER_CPU(type, name) \
+ __attribute__((__section__(".data.percpu"))) __typeof__(type) name##__per_cpu
+
+/* var is in discarded region: offset to particular copy we want */
+#define per_cpu(var, cpu) (*RELOC_HIDE(&var##__per_cpu, __per_cpu_offset(cpu)))
+#define __get_cpu_var(var) \
+ (*RELOC_HIDE(&var##__per_cpu, __my_cpu_offset()))
+
+static inline void percpu_modcopy(void *pcpudst, const void *src,
+ unsigned long size)
+{
+ unsigned int i;
+ for (i = 0; i < NR_CPUS; i++)
+ if (cpu_possible(i))
+ memcpy(pcpudst + __per_cpu_offset(i), src, size);
+}
+
+extern void setup_per_cpu_areas(void);
+
+#else /* ! SMP */
+
+#define DEFINE_PER_CPU(type, name) \
+ __typeof__(type) name##__per_cpu
+
+#define per_cpu(var, cpu) ((void)cpu, var##__per_cpu)
+#define __get_cpu_var(var) var##__per_cpu
+
+#endif /* SMP */
+
+#define DECLARE_PER_CPU(type, name) extern __typeof__(type) name##__per_cpu
+
+#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(var##__per_cpu)
+#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(var##__per_cpu)
+
+DECLARE_PER_CPU(struct x8664_pda, per_cpu_pda);
+
+#endif
diff -Nru a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
--- a/include/asm-x86_64/processor.h Sun Aug 3 13:14:53 2003
+++ b/include/asm-x86_64/processor.h Sun Aug 3 13:14:53 2003
@@ -181,6 +181,7 @@
* Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
*/
#define IO_BITMAP_SIZE 32
+#define IO_BITMAP_BYTES (IO_BITMAP_SIZE * 4)
#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
#define INVALID_IO_BITMAP_OFFSET 0x8000
diff -Nru a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h
--- a/include/asm-x86_64/smp.h Sun Aug 3 13:14:44 2003
+++ b/include/asm-x86_64/smp.h Sun Aug 3 13:14:44 2003
@@ -117,7 +117,7 @@
#ifndef CONFIG_SMP
#define stack_smp_processor_id() 0
#define safe_smp_processor_id() 0
-#define for_each_cpu(x) (x)=0;
+#define for_each_cpu(x,mask) (void)(mask), (x)=0;
#define cpu_logical_map(x) (x)
#else
#include <asm/thread_info.h>
diff -Nru a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h
--- a/include/asm-x86_64/topology.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-x86_64/topology.h Sun Aug 3 13:14:50 2003
@@ -5,6 +5,8 @@
#ifdef CONFIG_DISCONTIGMEM
+#include <asm/mpspec.h>
+
/* Map the K8 CPU local memory controllers to a simple 1:1 CPU:NODE topology */
extern int fake_node;
@@ -16,6 +18,11 @@
#define node_to_first_cpu(node) (fake_node ? 0 : (node))
#define node_to_cpu_mask(node) (fake_node ? cpu_online_map : (1UL << (node)))
#define node_to_memblk(node) (node)
+
+static inline unsigned long pcibus_to_cpumask(int bus)
+{
+ return mp_bus_to_cpumask[bus] & cpu_online_map;
+}
#define NODE_BALANCE_RATE 30 /* CHECKME */
diff -Nru a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
--- a/include/asm-x86_64/unistd.h Sun Aug 3 13:14:50 2003
+++ b/include/asm-x86_64/unistd.h Sun Aug 3 13:14:50 2003
@@ -526,8 +526,12 @@
__SYSCALL(__NR_epoll_wait, sys_epoll_wait)
#define __NR_epoll_ctl 233
__SYSCALL(__NR_epoll_ctl, sys_epoll_ctl)
+#define __NR_tgkill 234
+__SYSCALL(__NR_tgkill, sys_tgkill)
+#define __NR_utimes 235
+__SYSCALL(__NR_utimes, sys_utimes)
-#define __NR_syscall_max __NR_epoll_ctl
+#define __NR_syscall_max __NR_utimes
#ifndef __NO_STUBS
/* user-visible error numbers are in the range -1 - -4095 */
diff -Nru a/include/linux/atm_zatm.h b/include/linux/atm_zatm.h
--- a/include/linux/atm_zatm.h Sun Aug 3 13:14:50 2003
+++ b/include/linux/atm_zatm.h Sun Aug 3 13:14:50 2003
@@ -21,9 +21,6 @@
/* get statistics and zero */
#define ZATM_SETPOOL _IOW('a',ATMIOC_SARPRV+3,struct atmif_sioc)
/* set pool parameters */
-#define ZATM_GETTHIST _IOW('a',ATMIOC_SARPRV+4,struct atmif_sioc)
- /* get a history of timer
- differences */
struct zatm_pool_info {
int ref_count; /* free buffer pool usage counters */
diff -Nru a/include/linux/binfmts.h b/include/linux/binfmts.h
--- a/include/linux/binfmts.h Sun Aug 3 13:14:48 2003
+++ b/include/linux/binfmts.h Sun Aug 3 13:14:48 2003
@@ -31,7 +31,10 @@
kernel_cap_t cap_inheritable, cap_permitted, cap_effective;
void *security;
int argc, envc;
- char * filename; /* Name of binary */
+ char * filename; /* Name of binary as seen by procps */
+ char * interp; /* Name of the binary really executed. Most
+ of the time same as filename, but could be
+ different for binfmt_{misc,script} */
unsigned long loader, exec;
};
diff -Nru a/include/linux/blkdev.h b/include/linux/blkdev.h
--- a/include/linux/blkdev.h Sun Aug 3 13:14:46 2003
+++ b/include/linux/blkdev.h Sun Aug 3 13:14:46 2003
@@ -337,8 +337,6 @@
unsigned long seg_boundary_mask;
unsigned int dma_alignment;
- wait_queue_head_t queue_wait;
-
struct blk_queue_tag *queue_tags;
/*
diff -Nru a/include/linux/cpufreq.h b/include/linux/cpufreq.h
--- a/include/linux/cpufreq.h Sun Aug 3 13:14:49 2003
+++ b/include/linux/cpufreq.h Sun Aug 3 13:14:49 2003
@@ -137,9 +137,13 @@
/* pass a target to the cpufreq driver
*/
-inline int cpufreq_driver_target(struct cpufreq_policy *policy,
+extern int cpufreq_driver_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation);
+extern int __cpufreq_driver_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation);
+
/* pass an event to the cpufreq governor */
int cpufreq_governor(unsigned int cpu, unsigned int event);
@@ -159,8 +163,6 @@
struct cpufreq_driver {
struct module *owner;
char name[CPUFREQ_NAME_LEN];
-
- struct cpufreq_policy *policy;
/* needed by all drivers */
int (*init) (struct cpufreq_policy *policy);
diff -Nru a/include/linux/delay.h b/include/linux/delay.h
--- a/include/linux/delay.h Sun Aug 3 13:14:46 2003
+++ b/include/linux/delay.h Sun Aug 3 13:14:46 2003
@@ -27,11 +27,11 @@
#ifdef notdef
#define mdelay(n) (\
- {unsigned long msec=(n); while (msec--) udelay(1000);})
+ {unsigned long __ms=(n); while (__ms--) udelay(1000);})
#else
#define mdelay(n) (\
(__builtin_constant_p(n) && (n)<=MAX_UDELAY_MS) ? udelay((n)*1000) : \
- ({unsigned long msec=(n); while (msec--) udelay(1000);}))
+ ({unsigned long __ms=(n); while (__ms--) udelay(1000);}))
#endif
#ifndef ndelay
diff -Nru a/include/linux/ethtool.h b/include/linux/ethtool.h
--- a/include/linux/ethtool.h Sun Aug 3 13:14:46 2003
+++ b/include/linux/ethtool.h Sun Aug 3 13:14:46 2003
@@ -37,7 +37,7 @@
char version[32]; /* driver version string */
char fw_version[32]; /* firmware version string, if applicable */
char bus_info[ETHTOOL_BUSINFO_LEN]; /* Bus info for this IF. */
- /* For PCI devices, use pci_dev->slot_name. */
+ /* For PCI devices, use pci_name(pci_dev). */
char reserved1[32];
char reserved2[16];
u32 n_stats; /* number of u64's from ETHTOOL_GSTATS */
diff -Nru a/include/linux/ext3_fs.h b/include/linux/ext3_fs.h
--- a/include/linux/ext3_fs.h Sun Aug 3 13:14:49 2003
+++ b/include/linux/ext3_fs.h Sun Aug 3 13:14:49 2003
@@ -721,7 +721,6 @@
extern struct buffer_head * ext3_getblk (handle_t *, struct inode *, long, int, int *);
extern struct buffer_head * ext3_bread (handle_t *, struct inode *, int, int, int *);
-extern int ext3_get_inode_loc (struct inode *, struct ext3_iloc *);
extern void ext3_read_inode (struct inode *);
extern void ext3_write_inode (struct inode *, int);
extern int ext3_setattr (struct dentry *, struct iattr *);
diff -Nru a/include/linux/fs.h b/include/linux/fs.h
--- a/include/linux/fs.h Sun Aug 3 13:14:46 2003
+++ b/include/linux/fs.h Sun Aug 3 13:14:46 2003
@@ -219,6 +219,8 @@
typedef int (get_blocks_t)(struct inode *inode, sector_t iblock,
unsigned long max_blocks,
struct buffer_head *bh_result, int create);
+typedef void (dio_iodone_t)(struct inode *inode, loff_t offset,
+ ssize_t bytes, void *private);
/*
* Attribute flags. These should be or-ed together to figure out what
@@ -323,6 +325,7 @@
struct list_head i_mmap; /* list of private mappings */
struct list_head i_mmap_shared; /* list of shared mappings */
struct semaphore i_shared_sem; /* protect both above lists */
+ atomic_t truncate_count; /* Cover race condition with truncate */
unsigned long dirtied_when; /* jiffies of first page dirtying */
int gfp_mask; /* how to allocate the pages */
struct backing_dev_info *backing_dev_info; /* device readahead, etc */
@@ -1274,6 +1277,7 @@
loff_t *pos, size_t *count, int isblk);
extern ssize_t generic_file_write(struct file *, const char __user *, size_t, loff_t *);
extern ssize_t generic_file_aio_read(struct kiocb *, char __user *, size_t, loff_t);
+extern ssize_t __generic_file_aio_read(struct kiocb *, const struct iovec *, unsigned long, loff_t *);
extern ssize_t generic_file_aio_write(struct kiocb *, const char __user *, size_t, loff_t);
extern ssize_t generic_file_aio_write_nolock(struct kiocb *, const struct iovec *,
unsigned long, loff_t *);
@@ -1290,7 +1294,7 @@
const struct iovec *iov, loff_t offset, unsigned long nr_segs);
extern int blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
struct block_device *bdev, const struct iovec *iov, loff_t offset,
- unsigned long nr_segs, get_blocks_t *get_blocks);
+ unsigned long nr_segs, get_blocks_t *get_blocks, dio_iodone_t *end_io);
extern ssize_t generic_file_readv(struct file *filp, const struct iovec *iov,
unsigned long nr_segs, loff_t *ppos);
ssize_t generic_file_writev(struct file *filp, const struct iovec *iov,
@@ -1313,6 +1317,8 @@
}
extern struct file_operations generic_ro_fops;
+
+#define special_file(m) (S_ISCHR(m)||S_ISBLK(m)||S_ISFIFO(m)||S_ISSOCK(m))
extern int vfs_readlink(struct dentry *, char __user *, int, const char *);
extern int vfs_follow_link(struct nameidata *, const char *);
diff -Nru a/include/linux/hdlc.h b/include/linux/hdlc.h
--- a/include/linux/hdlc.h Sun Aug 3 13:14:53 2003
+++ b/include/linux/hdlc.h Sun Aug 3 13:14:53 2003
@@ -118,7 +118,7 @@
void (*stop)(struct hdlc_device_struct *hdlc);
void (*detach)(struct hdlc_device_struct *hdlc);
- void (*netif_rx)(struct sk_buff *skb);
+ int (*netif_rx)(struct sk_buff *skb);
unsigned short (*type_trans)(struct sk_buff *skb,
struct net_device *dev);
int id; /* IF_PROTO_HDLC/CISCO/FR/etc. */
diff -Nru a/include/linux/i2c.h b/include/linux/i2c.h
--- a/include/linux/i2c.h Sun Aug 3 13:14:46 2003
+++ b/include/linux/i2c.h Sun Aug 3 13:14:46 2003
@@ -594,4 +594,11 @@
#define i2c_is_isa_adapter(adapptr) \
((adapptr)->algo->id == I2C_ALGO_ISA)
+/* Tiny delay function used by the i2c bus drivers */
+static inline void i2c_delay(signed long timeout)
+{
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(timeout);
+}
+
#endif /* _LINUX_I2C_H */
diff -Nru a/include/linux/igmp.h b/include/linux/igmp.h
--- a/include/linux/igmp.h Sun Aug 3 13:14:48 2003
+++ b/include/linux/igmp.h Sun Aug 3 13:14:48 2003
@@ -16,6 +16,8 @@
#ifndef _LINUX_IGMP_H
#define _LINUX_IGMP_H
+#include <asm/byteorder.h>
+
/*
* IGMP protocol structures
*/
diff -Nru a/include/linux/ipv6.h b/include/linux/ipv6.h
--- a/include/linux/ipv6.h Sun Aug 3 13:14:50 2003
+++ b/include/linux/ipv6.h Sun Aug 3 13:14:50 2003
@@ -189,6 +189,7 @@
struct ipv6_txoptions *opt;
struct rt6_info *rt;
struct flowi *fl;
+ int hop_limit;
} cork;
};
diff -Nru a/include/linux/kdev_t.h b/include/linux/kdev_t.h
--- a/include/linux/kdev_t.h Sun Aug 3 13:14:51 2003
+++ b/include/linux/kdev_t.h Sun Aug 3 13:14:51 2003
@@ -133,6 +133,15 @@
return mk_kdev(MAJOR(dev),MINOR(dev));
}
+#define print_dev_t(buffer, dev) \
+ sprintf((buffer), "%u:%u\n", MAJOR(dev), MINOR(dev))
+
+#define format_dev_t(buffer, dev) \
+ ({ \
+ sprintf(buffer, "%u:%u", MAJOR(dev), MINOR(dev)); \
+ buffer; \
+ })
+
#else /* __KERNEL__ */
/*
diff -Nru a/include/linux/mm.h b/include/linux/mm.h
--- a/include/linux/mm.h Sun Aug 3 13:14:44 2003
+++ b/include/linux/mm.h Sun Aug 3 13:14:44 2003
@@ -421,6 +421,9 @@
int zeromap_page_range(struct vm_area_struct *vma, unsigned long from,
unsigned long size, pgprot_t prot);
+extern void invalidate_mmap_range(struct address_space *mapping,
+ loff_t const holebegin,
+ loff_t const holelen);
extern int vmtruncate(struct inode * inode, loff_t offset);
extern pmd_t *FASTCALL(__pmd_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address));
extern pte_t *FASTCALL(pte_alloc_kernel(struct mm_struct *mm, pmd_t *pmd, unsigned long address));
@@ -566,6 +569,8 @@
#define VM_MIN_READAHEAD 16 /* kbytes (includes current page) */
int do_page_cache_readahead(struct address_space *mapping, struct file *filp,
+ unsigned long offset, unsigned long nr_to_read);
+int force_page_cache_readahead(struct address_space *mapping, struct file *filp,
unsigned long offset, unsigned long nr_to_read);
void page_cache_readahead(struct address_space *mapping,
struct file_ra_state *ra,
diff -Nru a/include/linux/mmzone.h b/include/linux/mmzone.h
--- a/include/linux/mmzone.h Sun Aug 3 13:14:49 2003
+++ b/include/linux/mmzone.h Sun Aug 3 13:14:49 2003
@@ -89,6 +89,18 @@
ZONE_PADDING(_pad2_)
+ /*
+ * measure of scanning intensity for this zone. It is calculated
+ * as exponentially decaying average of the scanning priority
+ * required to free enough pages in this zone
+ * (zone_adj_pressure()).
+ *
+ * 0 --- low pressure
+ *
+ * (DEF_PRIORITY << 10) --- high pressure
+ */
+ int pressure;
+
/*
* free areas of different sizes
*/
diff -Nru a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h
--- a/include/linux/msdos_fs.h Sun Aug 3 13:14:51 2003
+++ b/include/linux/msdos_fs.h Sun Aug 3 13:14:51 2003
@@ -249,10 +249,14 @@
extern int fat_readdir(struct file *filp, void *dirent, filldir_t filldir);
extern int fat_dir_ioctl(struct inode * inode, struct file * filp,
unsigned int cmd, unsigned long arg);
-extern int fat_dir_empty(struct inode *dir);
extern int fat_add_entries(struct inode *dir, int slots, struct buffer_head **bh,
struct msdos_dir_entry **de, loff_t *i_pos);
extern int fat_new_dir(struct inode *dir, struct inode *parent, int is_vfat);
+extern int fat_dir_empty(struct inode *dir);
+extern int fat_subdirs(struct inode *dir);
+extern int fat_scan(struct inode *dir, const unsigned char *name,
+ struct buffer_head **res_bh,
+ struct msdos_dir_entry **res_de, loff_t *i_pos);
/* fat/file.c */
extern struct file_operations fat_file_operations;
@@ -304,10 +308,6 @@
}
return fat__get_entry(dir, pos, bh, de, i_pos);
}
-extern int fat_subdirs(struct inode *dir);
-extern int fat_scan(struct inode *dir, const unsigned char *name,
- struct buffer_head **res_bh,
- struct msdos_dir_entry **res_de, loff_t *i_pos);
/* msdos/namei.c - these are for Umsdos */
extern struct dentry *msdos_lookup(struct inode *dir, struct dentry *, struct nameidata *);
diff -Nru a/include/linux/netdevice.h b/include/linux/netdevice.h
--- a/include/linux/netdevice.h Sun Aug 3 13:14:52 2003
+++ b/include/linux/netdevice.h Sun Aug 3 13:14:52 2003
@@ -820,6 +820,7 @@
local_irq_save(flags);
if (!test_bit(__LINK_STATE_RX_SCHED, &dev->state)) BUG();
list_del(&dev->poll_list);
+ smp_mb__before_clear_bit();
clear_bit(__LINK_STATE_RX_SCHED, &dev->state);
local_irq_restore(flags);
}
diff -Nru a/include/linux/netfilter_ipv4/ip_conntrack_core.h b/include/linux/netfilter_ipv4/ip_conntrack_core.h
--- a/include/linux/netfilter_ipv4/ip_conntrack_core.h Sun Aug 3 13:14:53 2003
+++ b/include/linux/netfilter_ipv4/ip_conntrack_core.h Sun Aug 3 13:14:53 2003
@@ -1,5 +1,6 @@
#ifndef _IP_CONNTRACK_CORE_H
#define _IP_CONNTRACK_CORE_H
+#include <linux/netfilter.h>
#include <linux/netfilter_ipv4/lockhelp.h>
/* This header is used to share core functionality between the
diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h
--- a/include/linux/pci_ids.h Sun Aug 3 13:14:47 2003
+++ b/include/linux/pci_ids.h Sun Aug 3 13:14:47 2003
@@ -1205,6 +1205,8 @@
#define PCI_VENDOR_ID_EF 0x111a
#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000
#define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002
+#define PCI_VENDOR_ID_EF_ATM_LANAI2 0x0003
+#define PCI_VENDOR_ID_EF_ATM_LANAIHB 0x0005
#define PCI_VENDOR_ID_IDT 0x111d
#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
diff -Nru a/include/linux/pfkeyv2.h b/include/linux/pfkeyv2.h
--- a/include/linux/pfkeyv2.h Sun Aug 3 13:14:51 2003
+++ b/include/linux/pfkeyv2.h Sun Aug 3 13:14:51 2003
@@ -245,6 +245,7 @@
/* Security Association flags */
#define SADB_SAFLAGS_PFS 1
+#define SADB_SAFLAGS_NOECN 0x80000000
/* Security Association states */
#define SADB_SASTATE_LARVAL 0
diff -Nru a/include/linux/quota.h b/include/linux/quota.h
--- a/include/linux/quota.h Sun Aug 3 13:14:50 2003
+++ b/include/linux/quota.h Sun Aug 3 13:14:50 2003
@@ -172,7 +172,7 @@
#define DQF_INFO_DIRTY_B 16
#define DQF_ANY_DQUOT_DIRTY_B 17
#define DQF_INFO_DIRTY (1 << DQF_INFO_DIRTY_B) /* Is info dirty? */
-#define DQF_ANY_DQUOT_DIRTY (1 << DQF_ANY_DQUOT_DIRTY B) /* Is any dquot dirty? */
+#define DQF_ANY_DQUOT_DIRTY (1 << DQF_ANY_DQUOT_DIRTY_B) /* Is any dquot dirty? */
extern inline void mark_info_dirty(struct mem_dqinfo *info)
{
diff -Nru a/include/linux/sched.h b/include/linux/sched.h
--- a/include/linux/sched.h Sun Aug 3 13:14:45 2003
+++ b/include/linux/sched.h Sun Aug 3 13:14:45 2003
@@ -485,7 +485,7 @@
#define PF_FSTRANS 0x00020000 /* inside a filesystem transaction */
#define PF_KSWAPD 0x00040000 /* I am kswapd */
#define PF_SWAPOFF 0x00080000 /* I am in swapoff */
-#define PF_LESS_THROTTLE 0x01000000 /* Throttle me less: I clena memory */
+#define PF_LESS_THROTTLE 0x00100000 /* Throttle me less: I clean memory */
#define PF_SYNCWRITE 0x00200000 /* I am doing a sync write */
#define PF_READAHEAD 0x00400000 /* I am doing read-ahead */
diff -Nru a/include/linux/skbuff.h b/include/linux/skbuff.h
--- a/include/linux/skbuff.h Sun Aug 3 13:14:49 2003
+++ b/include/linux/skbuff.h Sun Aug 3 13:14:49 2003
@@ -904,9 +904,9 @@
static inline int pskb_may_pull(struct sk_buff *skb, unsigned int len)
{
- if (len <= skb_headlen(skb))
+ if (likely(len <= skb_headlen(skb)))
return 1;
- if (len > skb->len)
+ if (unlikely(len > skb->len))
return 0;
return __pskb_pull_tail(skb, len-skb_headlen(skb)) != NULL;
}
diff -Nru a/include/linux/time.h b/include/linux/time.h
--- a/include/linux/time.h Sun Aug 3 13:14:49 2003
+++ b/include/linux/time.h Sun Aug 3 13:14:49 2003
@@ -118,7 +118,7 @@
jiffies_to_timespec(unsigned long jiffies, struct timespec *value)
{
/*
- * Convert jiffies to nanoseconds and seperate with
+ * Convert jiffies to nanoseconds and separate with
* one divide.
*/
u64 nsec = (u64)jiffies * TICK_NSEC;
@@ -146,7 +146,7 @@
jiffies_to_timeval(unsigned long jiffies, struct timeval *value)
{
/*
- * Convert jiffies to nanoseconds and seperate with
+ * Convert jiffies to nanoseconds and separate with
* one divide.
*/
u64 nsec = (u64)jiffies * TICK_NSEC;
diff -Nru a/include/linux/usb.h b/include/linux/usb.h
--- a/include/linux/usb.h Sun Aug 3 13:14:47 2003
+++ b/include/linux/usb.h Sun Aug 3 13:14:47 2003
@@ -140,6 +140,9 @@
dev_set_drvdata(&intf->dev, data);
}
+/* this maximum is arbitrary */
+#define USB_MAXINTERFACES 32
+
/* USB_DT_CONFIG: Configuration descriptor information.
*
* USB_DT_OTHER_SPEED_CONFIG is the same descriptor, except that the
@@ -153,7 +156,7 @@
/* the interfaces associated with this configuration
* these will be in numeric order, 0..desc.bNumInterfaces
*/
- struct usb_interface *interface;
+ struct usb_interface *interface[USB_MAXINTERFACES];
unsigned char *extra; /* Extra descriptors */
int extralen;
@@ -484,8 +487,6 @@
extern void usb_deregister_dev(struct usb_interface *intf,
struct usb_class_driver *class_driver);
-extern int usb_device_probe(struct device *dev);
-extern int usb_device_remove(struct device *dev);
extern int usb_disabled(void);
/* -------------------------------------------------------------------------- */
diff -Nru a/include/linux/usb_gadget.h b/include/linux/usb_gadget.h
--- a/include/linux/usb_gadget.h Sun Aug 3 13:14:47 2003
+++ b/include/linux/usb_gadget.h Sun Aug 3 13:14:47 2003
@@ -301,9 +301,13 @@
* toggle differently.
*
* Control endpoints ... after getting a setup() callback, the driver queues
- * one response (optional if it would be zero length). That enables the
+ * one response (even if it would be zero length). That enables the
* status ack, after transfering data as specified in the response. Setup
* functions may return negative error codes to generate protocol stalls.
+ * (Note that some USB device controllers disallow protocol stall responses
+ * in some cases.) When control responses are deferred (the response is
+ * written after the setup callback returns), then usb_ep_set_halt() may be
+ * used on ep0 to trigger protocol stalls.
*
* For periodic endpoints, like interrupt or isochronous ones, the usb host
* arranges to poll once per interval, and the gadget driver usually will
diff -Nru a/include/linux/videodev2.h b/include/linux/videodev2.h
--- a/include/linux/videodev2.h Sun Aug 3 13:14:50 2003
+++ b/include/linux/videodev2.h Sun Aug 3 13:14:50 2003
@@ -130,7 +130,7 @@
{
__u8 driver[16]; /* i.e. "bttv" */
__u8 card[32]; /* i.e. "Hauppauge WinTV" */
- __u8 bus_info[32]; /* "PCI:" + pci_dev->slot_name */
+ __u8 bus_info[32]; /* "PCI:" + pci_name(pci_dev) */
__u32 version; /* should use KERNEL_VERSION() */
__u32 capabilities; /* Device capabilities */
__u32 reserved[4];
diff -Nru a/include/linux/xfrm.h b/include/linux/xfrm.h
--- a/include/linux/xfrm.h Sun Aug 3 13:14:46 2003
+++ b/include/linux/xfrm.h Sun Aug 3 13:14:46 2003
@@ -166,6 +166,8 @@
__u16 family;
__u8 mode; /* 0=transport,1=tunnel */
__u8 replay_window;
+ __u8 flags;
+#define XFRM_STATE_NOECN 1
};
struct xfrm_usersa_id {
diff -Nru a/include/net/inet_ecn.h b/include/net/inet_ecn.h
--- a/include/net/inet_ecn.h Sun Aug 3 13:14:52 2003
+++ b/include/net/inet_ecn.h Sun Aug 3 13:14:52 2003
@@ -1,6 +1,8 @@
#ifndef _INET_ECN_H_
#define _INET_ECN_H_
+#include <linux/ip.h>
+
static inline int INET_ECN_is_ce(__u8 dsfield)
{
return (dsfield&3) == 3;
@@ -44,11 +46,21 @@
iph->tos |= 1;
}
+static inline void IP_ECN_clear(struct iphdr *iph)
+{
+ iph->tos &= ~3;
+}
+
struct ipv6hdr;
static inline void IP6_ECN_set_ce(struct ipv6hdr *iph)
{
*(u32*)iph |= htonl(1<<20);
+}
+
+static inline void IP6_ECN_clear(struct ipv6hdr *iph)
+{
+ *(u32*)iph &= ~htonl(3<<20);
}
#define ip6_get_dsfield(iph) ((ntohs(*(u16*)(iph)) >> 4) & 0xFF)
diff -Nru a/include/net/pkt_sched.h b/include/net/pkt_sched.h
--- a/include/net/pkt_sched.h Sun Aug 3 13:14:46 2003
+++ b/include/net/pkt_sched.h Sun Aug 3 13:14:46 2003
@@ -216,12 +216,16 @@
#if PSCHED_CLOCK_SOURCE == PSCHED_JIFFIES
-#if HZ == 100
+#if HZ < 96
+#define PSCHED_JSCALE 14
+#elif HZ >= 96 && HZ < 192
#define PSCHED_JSCALE 13
-#elif HZ == 1024
+#elif HZ >= 192 && HZ < 384
+#define PSCHED_JSCALE 12
+#elif HZ >= 384 && HZ < 768
+#define PSCHED_JSCALE 11
+#elif HZ >= 768
#define PSCHED_JSCALE 10
-#else
-#define PSCHED_JSCALE 0
#endif
#define PSCHED_EXPORTLIST_2
diff -Nru a/include/net/xfrm.h b/include/net/xfrm.h
--- a/include/net/xfrm.h Sun Aug 3 13:14:51 2003
+++ b/include/net/xfrm.h Sun Aug 3 13:14:51 2003
@@ -9,7 +9,6 @@
#include <linux/crypto.h>
#include <linux/pfkeyv2.h>
#include <linux/in6.h>
-#include <linux/slab.h>
#include <net/sock.h>
#include <net/dst.h>
@@ -108,6 +107,7 @@
u8 mode;
u8 replay_window;
u8 aalgo, ealgo, calgo;
+ u8 flags;
u16 family;
xfrm_address_t saddr;
int header_len;
@@ -538,7 +538,6 @@
struct sec_path
{
- kmem_cache_t *pool;
atomic_t refcnt;
int len;
struct sec_decap_state x[XFRM_MAX_DEPTH];
@@ -561,6 +560,8 @@
__secpath_destroy(sp);
}
+extern struct sec_path *secpath_dup(struct sec_path *src);
+
static inline int
__xfrm4_state_addr_cmp(struct xfrm_tmpl *tmpl, struct xfrm_state *x)
{
@@ -817,8 +818,7 @@
extern int km_new_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, u16 sport);
extern void km_policy_expired(struct xfrm_policy *pol, int dir, int hard);
-extern void xfrm4_input_init(void);
-extern void xfrm6_input_init(void);
+extern void xfrm_input_init(void);
extern int xfrm_parse_spi(struct sk_buff *skb, u8 nexthdr, u32 *spi, u32 *seq);
extern void xfrm_probe_algs(void);
diff -Nru a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h
--- a/include/sound/ac97_codec.h Sun Aug 3 13:14:49 2003
+++ b/include/sound/ac97_codec.h Sun Aug 3 13:14:49 2003
@@ -229,6 +229,13 @@
#define AC97_CM9739_SPDIF_IN_STATUS 0x68 /* 32bit */
#define AC97_CM9739_SPDIF_CTRL 0x6c
+/* specific - wolfson */
+#define AC97_WM97XX_FMIXER_VOL 0x72
+#define AC97_WM9704_RMIXER_VOL 0x74
+#define AC97_WM9704_TEST 0x5a
+#define AC97_WM9704_RPCM_VOL 0x70
+#define AC97_WM9711_OUT3VOL 0x16
+
/* ac97->scaps */
#define AC97_SCAP_AUDIO (1<<0) /* audio AC'97 codec */
@@ -256,12 +263,20 @@
typedef struct _snd_ac97 ac97_t;
+struct snd_ac97_build_ops {
+ int (*build_3d) (ac97_t *ac97);
+ int (*build_specific) (ac97_t *ac97);
+ int (*build_spdif) (ac97_t *ac97);
+ int (*build_post_spdif) (ac97_t *ac97);
+};
+
struct _snd_ac97 {
void (*reset) (ac97_t *ac97);
void (*write) (ac97_t *ac97, unsigned short reg, unsigned short val);
unsigned short (*read) (ac97_t *ac97, unsigned short reg);
void (*wait) (ac97_t *ac97);
void (*init) (ac97_t *ac97);
+ struct snd_ac97_build_ops * build_ops;
void *private_data;
void (*private_free) (ac97_t *ac97);
/* --- */
diff -Nru a/include/sound/ad1848.h b/include/sound/ad1848.h
--- a/include/sound/ad1848.h Sun Aug 3 13:14:47 2003
+++ b/include/sound/ad1848.h Sun Aug 3 13:14:47 2003
@@ -120,6 +120,12 @@
#define AD1848_HW_AD1848 0x0002 /* AD1848 chip */
#define AD1848_HW_CS4248 0x0003 /* CS4248 chip */
#define AD1848_HW_CMI8330 0x0004 /* CMI8330 chip */
+#define AD1848_HW_THINKPAD 0x0005 /* Thinkpad 360/750/755 */
+
+/* IBM Thinkpad specific stuff */
+#define AD1848_THINKPAD_CTL_PORT1 0x15e8
+#define AD1848_THINKPAD_CTL_PORT2 0x15e9
+#define AD1848_THINKPAD_CS4248_ENABLE_BIT 0x02
struct _snd_ad1848 {
unsigned long port; /* i/o port */
@@ -140,6 +146,10 @@
int mce_bit;
int calibrate_mute;
int dma_size;
+ int thinkpad_flag; /* Thinkpad CS4248 needs some extra help */
+#ifdef CONFIG_PM
+ struct pm_dev *thinkpad_pmstate;
+#endif
spinlock_t reg_lock;
struct semaphore open_mutex;
diff -Nru a/include/sound/asequencer.h b/include/sound/asequencer.h
--- a/include/sound/asequencer.h Sun Aug 3 13:14:49 2003
+++ b/include/sound/asequencer.h Sun Aug 3 13:14:49 2003
@@ -29,7 +29,7 @@
#include <sound/asound.h>
/** version of the sequencer */
-#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION (1, 0, 0)
+#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION (1, 0, 1)
/**
* definition of sequencer event types
@@ -57,8 +57,8 @@
#define SNDRV_SEQ_EVENT_CHANPRESS 12
#define SNDRV_SEQ_EVENT_PITCHBEND 13 /**< from -8192 to 8191 */
#define SNDRV_SEQ_EVENT_CONTROL14 14 /**< 14 bit controller value */
-#define SNDRV_SEQ_EVENT_NONREGPARAM 15 /**< 14 bit NRPN */
-#define SNDRV_SEQ_EVENT_REGPARAM 16 /**< 14 bit RPN */
+#define SNDRV_SEQ_EVENT_NONREGPARAM 15 /**< 14 bit NRPN address + 14 bit unsigned value */
+#define SNDRV_SEQ_EVENT_REGPARAM 16 /**< 14 bit RPN address + 14 bit unsigned value */
/** synchronisation messages
* event data type = #sndrv_seq_ev_ctrl
@@ -604,6 +604,8 @@
/* misc. conditioning flags */
#define SNDRV_SEQ_PORT_FLG_GIVEN_PORT (1<<0)
+#define SNDRV_SEQ_PORT_FLG_TIMESTAMP (1<<1)
+#define SNDRV_SEQ_PORT_FLG_TIME_REAL (1<<1)
struct sndrv_seq_port_info {
struct sndrv_seq_addr addr; /* client/port numbers */
@@ -620,7 +622,8 @@
void *kernel; /* reserved for kernel use (must be NULL) */
unsigned int flags; /* misc. conditioning */
- char reserved[60]; /* for future use */
+ unsigned char time_queue; /* queue # for timestamping */
+ char reserved[59]; /* for future use */
};
diff -Nru a/include/sound/asound.h b/include/sound/asound.h
--- a/include/sound/asound.h Sun Aug 3 13:14:50 2003
+++ b/include/sound/asound.h Sun Aug 3 13:14:50 2003
@@ -105,9 +105,10 @@
SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
+ SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
/* Don't forget to change the following: */
- SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_VX,
+ SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_MIXART,
};
struct sndrv_hwdep_info {
diff -Nru a/include/sound/core.h b/include/sound/core.h
--- a/include/sound/core.h Sun Aug 3 13:14:53 2003
+++ b/include/sound/core.h Sun Aug 3 13:14:53 2003
@@ -222,9 +222,6 @@
/* sound.c */
extern int snd_ecards_limit;
-extern int device_mode;
-extern int device_gid;
-extern int device_uid;
void snd_request_card(int card);
diff -Nru a/include/sound/cs8427.h b/include/sound/cs8427.h
--- a/include/sound/cs8427.h Sun Aug 3 13:14:49 2003
+++ b/include/sound/cs8427.h Sun Aug 3 13:14:49 2003
@@ -189,6 +189,8 @@
int snd_cs8427_detect(snd_i2c_bus_t *bus, unsigned char addr);
int snd_cs8427_create(snd_i2c_bus_t *bus, unsigned char addr, snd_i2c_device_t **r_cs8427);
void snd_cs8427_reset(snd_i2c_device_t *cs8427);
+int snd_cs8427_reg_write(snd_i2c_device_t *device, unsigned char reg, unsigned char val);
+int snd_cs8427_reg_read(snd_i2c_device_t *device, unsigned char reg);
int snd_cs8427_iec958_build(snd_i2c_device_t *cs8427, snd_pcm_substream_t *playback_substream, snd_pcm_substream_t *capture_substream);
int snd_cs8427_iec958_active(snd_i2c_device_t *cs8427, int active);
int snd_cs8427_iec958_pcm(snd_i2c_device_t *cs8427, unsigned int rate);
diff -Nru a/include/sound/emu10k1.h b/include/sound/emu10k1.h
--- a/include/sound/emu10k1.h Sun Aug 3 13:14:46 2003
+++ b/include/sound/emu10k1.h Sun Aug 3 13:14:46 2003
@@ -931,6 +931,7 @@
unsigned long port; /* I/O port number */
struct resource *res_port;
int APS: 1, /* APS flag */
+ no_ac97: 1, /* no AC'97 */
tos_link: 1; /* tos link detected */
unsigned int audigy; /* is Audigy? */
unsigned int revision; /* chip revision */
@@ -1346,10 +1347,10 @@
#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, emu10k1_fx8010_info_t)
#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, emu10k1_fx8010_code_t)
-#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOW ('H', 0x12, emu10k1_fx8010_code_t)
+#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, emu10k1_fx8010_code_t)
#define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW ('H', 0x20, int)
#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, emu10k1_fx8010_tram_t)
-#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOR ('H', 0x22, emu10k1_fx8010_tram_t)
+#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, emu10k1_fx8010_tram_t)
#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, emu10k1_fx8010_pcm_t)
#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, emu10k1_fx8010_pcm_t)
#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80)
diff -Nru a/include/sound/hdsp.h b/include/sound/hdsp.h
--- a/include/sound/hdsp.h Sun Aug 3 13:14:52 2003
+++ b/include/sound/hdsp.h Sun Aug 3 13:14:52 2003
@@ -24,6 +24,7 @@
typedef enum {
Digiface,
Multiface,
+ H9652,
Undefined,
} HDSP_IO_Type;
diff -Nru a/include/sound/info.h b/include/sound/info.h
--- a/include/sound/info.h Sun Aug 3 13:14:51 2003
+++ b/include/sound/info.h Sun Aug 3 13:14:51 2003
@@ -38,7 +38,6 @@
#define SNDRV_INFO_CONTENT_TEXT 0
#define SNDRV_INFO_CONTENT_DATA 1
-#define SNDRV_INFO_CONTENT_DEVICE 2
struct snd_info_entry;
@@ -118,10 +117,6 @@
const char *name,
snd_info_entry_t * parent);
void snd_info_free_entry(snd_info_entry_t * entry);
-snd_info_entry_t *snd_info_create_device(const char *name,
- unsigned int number,
- unsigned int mode);
-void snd_info_free_device(snd_info_entry_t * entry);
int snd_info_store_text(snd_info_entry_t * entry);
int snd_info_restore_text(snd_info_entry_t * entry);
@@ -163,10 +158,6 @@
static inline snd_info_entry_t *snd_info_create_module_entry(struct module * module, const char *name, snd_info_entry_t * parent) { return NULL; }
static inline snd_info_entry_t *snd_info_create_card_entry(snd_card_t * card, const char *name, snd_info_entry_t * parent) { return NULL; }
static inline void snd_info_free_entry(snd_info_entry_t * entry) { ; }
-static inline snd_info_entry_t *snd_info_create_device(const char *name,
- unsigned int number,
- unsigned int mode) { return NULL; }
-static inline void snd_info_free_device(snd_info_entry_t * entry) { ; }
static inline int snd_info_card_create(snd_card_t * card) { return 0; }
static inline int snd_info_card_register(snd_card_t * card) { return 0; }
diff -Nru a/include/sound/pcm_oss.h b/include/sound/pcm_oss.h
--- a/include/sound/pcm_oss.h Sun Aug 3 13:14:50 2003
+++ b/include/sound/pcm_oss.h Sun Aug 3 13:14:50 2003
@@ -30,7 +30,9 @@
unsigned int disable:1,
direct:1,
block:1,
- nonblock:1;
+ nonblock:1,
+ wholefrag:1,
+ nosilence:1;
unsigned int periods;
unsigned int period_size;
snd_pcm_oss_setup_t *next;
diff -Nru a/include/sound/seq_midi_event.h b/include/sound/seq_midi_event.h
--- a/include/sound/seq_midi_event.h Sun Aug 3 13:14:47 2003
+++ b/include/sound/seq_midi_event.h Sun Aug 3 13:14:47 2003
@@ -30,17 +30,15 @@
/* midi status */
struct snd_midi_event_t {
- int qlen; /* queue length */
- int read; /* chars read */
- int type; /* current event type */
- unsigned char lastcmd;
- unsigned char nostat;
- int bufsize;
- unsigned char *buf; /* input buffer */
+ int qlen; /* queue length */
+ int read; /* chars read */
+ int type; /* current event type */
+ unsigned char lastcmd; /* last command (for MIDI state handling) */
+ unsigned char nostat; /* no state flag */
+ int bufsize; /* allocated buffer size */
+ unsigned char *buf; /* input buffer */
spinlock_t lock;
};
-
-#define SND_MIDI_EVENT_NOSTATUS (1<<0) /* don't encode MIDI status */
int snd_midi_event_new(int bufsize, snd_midi_event_t **rdev);
int snd_midi_event_resize_buffer(snd_midi_event_t *dev, int bufsize);
diff -Nru a/include/sound/soundfont.h b/include/sound/soundfont.h
--- a/include/sound/soundfont.h Sun Aug 3 13:14:53 2003
+++ b/include/sound/soundfont.h Sun Aug 3 13:14:53 2003
@@ -95,7 +95,6 @@
int zone_locked; /* locked time for zone */
int sample_locked; /* locked time for sample */
snd_sf_callback_t callback; /* callback functions */
- char sf_locked; /* font lock flag */
struct semaphore presets_mutex;
spinlock_t lock;
snd_util_memhdr_t *memhdr;
diff -Nru a/include/sound/version.h b/include/sound/version.h
--- a/include/sound/version.h Sun Aug 3 13:14:47 2003
+++ b/include/sound/version.h Sun Aug 3 13:14:47 2003
@@ -1,3 +1,3 @@
/* include/version.h. Generated by configure. */
-#define CONFIG_SND_VERSION "0.9.4"
-#define CONFIG_SND_DATE " (Mon Jun 09 12:01:18 2003 UTC)"
+#define CONFIG_SND_VERSION "0.9.6"
+#define CONFIG_SND_DATE " (Mon Jul 28 11:08:42 2003 UTC)"
diff -Nru a/include/sound/ymfpci.h b/include/sound/ymfpci.h
--- a/include/sound/ymfpci.h Sun Aug 3 13:14:47 2003
+++ b/include/sound/ymfpci.h Sun Aug 3 13:14:47 2003
@@ -25,6 +25,7 @@
#include "pcm.h"
#include "rawmidi.h"
#include "ac97_codec.h"
+#include <linux/gameport.h>
#ifndef PCI_VENDOR_ID_YAMAHA
#define PCI_VENDOR_ID_YAMAHA 0x1073
@@ -309,7 +310,12 @@
struct resource *mpu_res;
unsigned short old_legacy_ctrl;
+#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
unsigned int joystick_port;
+ struct semaphore joystick_mutex;
+ struct resource *joystick_res;
+ struct gameport gameport;
+#endif
void *work_ptr;
dma_addr_t work_ptr_addr;
@@ -383,7 +389,9 @@
int snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
int snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
int snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch);
+#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
int snd_ymfpci_joystick(ymfpci_t *chip);
+#endif
int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice);
int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice);
diff -Nru a/init/do_mounts.c b/init/do_mounts.c
--- a/init/do_mounts.c Sun Aug 3 13:14:47 2003
+++ b/init/do_mounts.c Sun Aug 3 13:14:47 2003
@@ -58,6 +58,7 @@
char *s;
int len;
int fd;
+ unsigned int maj, min;
/* read device number from .../dev */
@@ -70,8 +71,12 @@
if (len <= 0 || len == 32 || buf[len - 1] != '\n')
goto fail;
buf[len - 1] = '\0';
- res = (dev_t) simple_strtoul(buf, &s, 16);
- if (*s)
+ /*
+ * The format of dev is now %u:%u -- see print_dev_t()
+ */
+ if (sscanf(buf, "%u:%u", &maj, &min) == 2)
+ res = MKDEV(maj, min);
+ else
goto fail;
/* if it's there and we are not looking for a partition - that's it */
diff -Nru a/init/do_mounts_devfs.c b/init/do_mounts_devfs.c
--- a/init/do_mounts_devfs.c Sun Aug 3 13:14:50 2003
+++ b/init/do_mounts_devfs.c Sun Aug 3 13:14:50 2003
@@ -54,7 +54,7 @@
if (fd < 0)
return NULL;
- for (size = 1 << 9; size <= (1 << MAX_ORDER); size <<= 1) {
+ for (size = 1 << 9; size <= (PAGE_SIZE << MAX_ORDER); size <<= 1) {
void *p = kmalloc(size, GFP_KERNEL);
int n;
if (!p)
diff -Nru a/initramfs_data.S.tmp b/initramfs_data.S.tmp
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/initramfs_data.S.tmp Sun Aug 3 13:14:44 2003
@@ -0,0 +1,30 @@
+/*
+ initramfs_data includes the compressed binary that is the
+ filesystem used for early user space.
+ Note: Older versions of "as" (prior to binutils 2.11.90.0.23
+ released on 2001-07-14) dit not support .incbin.
+ If you are forced to use older binutils than that then the
+ following trick can be applied to create the resulting binary:
+
+
+ ld -m elf_i386 --format binary --oformat elf32-i386 -r \
+ -T initramfs_data.scr initramfs_data.cpio.gz -o initramfs_data.o
+ ld -m elf_i386 -r -o built-in.o initramfs_data.o
+
+ initramfs_data.scr looks like this:
+SECTIONS
+{
+ .init.ramfs : { *(.data) }
+}
+
+ The above example is for i386 - the parameters vary from architectures.
+ Eventually look up LDFLAGS_BLOB in an older version of the
+ arch/$(ARCH)/Makefile to see the flags used before .incbin was introduced.
+
+ Using .incbin has the advantage over ld that the correct flags are set
+ in the ELF header, as required by certain architectures.
+*/
+
+.section .init.ramfs,"a"
+.incbin "usr/initramfs_data.cpio.gz"
+
diff -Nru a/kernel/Makefile b/kernel/Makefile
--- a/kernel/Makefile Sun Aug 3 13:14:46 2003
+++ b/kernel/Makefile Sun Aug 3 13:14:46 2003
@@ -19,6 +19,10 @@
obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o
obj-$(CONFIG_SOFTWARE_SUSPEND) += suspend.o
obj-$(CONFIG_COMPAT) += compat.o
+obj-$(CONFIG_IKCONFIG) += configs.o
+
+# files to be removed upon make clean
+clean-files := ikconfig.h
ifneq ($(CONFIG_IA64),y)
# According to Alan Modra <alan@linuxcare.com.au>, the -fno-omit-frame-pointer is
@@ -28,3 +32,9 @@
# to get a correct value for the wait-channel (WCHAN in ps). --davidm
CFLAGS_sched.o := $(PROFILING) -fno-omit-frame-pointer
endif
+
+$(obj)/ikconfig.h: scripts/mkconfigs .config Makefile
+ $(CONFIG_SHELL) scripts/mkconfigs .config Makefile > $(obj)/ikconfig.h
+
+$(obj)/configs.o: $(obj)/ikconfig.h $(obj)/configs.c \
+ include/linux/version.h include/linux/compile.h
diff -Nru a/kernel/configs.c b/kernel/configs.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/kernel/configs.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,188 @@
+/*
+ * kernel/configs.c
+ * Echo the kernel .config file used to build the kernel
+ *
+ * Copyright (C) 2002 Khalid Aziz <khalid_aziz@hp.com>
+ * Copyright (C) 2002 Randy Dunlap <rddunlap@osdl.org>
+ * Copyright (C) 2002 Al Stone <ahs3@fc.hp.com>
+ * Copyright (C) 2002 Hewlett-Packard Company
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT. See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/compile.h>
+#include <linux/version.h>
+#include <asm/uaccess.h>
+
+/**************************************************/
+/* the actual current config file */
+
+#include "ikconfig.h"
+
+#ifdef CONFIG_IKCONFIG_PROC
+
+/**************************************************/
+/* globals and useful constants */
+
+static char *IKCONFIG_NAME = "ikconfig";
+static char *IKCONFIG_VERSION = "0.5";
+
+static int ikconfig_current_size = 0;
+static struct proc_dir_entry *ikconfig_dir, *current_config, *built_with;
+
+static int
+ikconfig_permission_current(struct inode *inode, int op, struct nameidata *nd)
+{
+ /* anyone can read the device, no one can write to it */
+ return (op == MAY_READ) ? 0 : -EACCES;
+}
+
+static ssize_t
+ikconfig_output_current(struct file *file, char *buf,
+ size_t len, loff_t * offset)
+{
+ int i, limit;
+ int cnt;
+
+ limit = (ikconfig_current_size > len) ? len : ikconfig_current_size;
+ for (i = file->f_pos, cnt = 0;
+ i < ikconfig_current_size && cnt < limit; i++, cnt++) {
+ put_user(ikconfig_config[i], buf + cnt);
+ }
+ file->f_pos = i;
+ return cnt;
+}
+
+static int
+ikconfig_open_current(struct inode *inode, struct file *file)
+{
+ if (file->f_mode & FMODE_READ) {
+ inode->i_size = ikconfig_current_size;
+ file->f_pos = 0;
+ }
+ return 0;
+}
+
+static int
+ikconfig_close_current(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+static struct file_operations ikconfig_file_ops = {
+ .read = ikconfig_output_current,
+ .open = ikconfig_open_current,
+ .release = ikconfig_close_current,
+};
+
+static struct inode_operations ikconfig_inode_ops = {
+ .permission = ikconfig_permission_current,
+};
+
+/***************************************************/
+/* proc_read_built_with: let people read the info */
+/* we have on the tools used to build this kernel */
+
+static int
+proc_read_built_with(char *page, char **start,
+ off_t off, int count, int *eof, void *data)
+{
+ *eof = 1;
+ return sprintf(page,
+ "Kernel: %s\nCompiler: %s\nVersion_in_Makefile: %s\n",
+ ikconfig_built_with, LINUX_COMPILER, UTS_RELEASE);
+}
+
+/***************************************************/
+/* ikconfig_init: start up everything we need to */
+
+int __init
+ikconfig_init(void)
+{
+ int result = 0;
+
+ printk(KERN_INFO "ikconfig %s with /proc/ikconfig\n",
+ IKCONFIG_VERSION);
+
+ /* create the ikconfig directory */
+ ikconfig_dir = proc_mkdir(IKCONFIG_NAME, NULL);
+ if (ikconfig_dir == NULL) {
+ result = -ENOMEM;
+ goto leave;
+ }
+ ikconfig_dir->owner = THIS_MODULE;
+
+ /* create the current config file */
+ current_config = create_proc_entry("config", S_IFREG | S_IRUGO,
+ ikconfig_dir);
+ if (current_config == NULL) {
+ result = -ENOMEM;
+ goto leave2;
+ }
+ current_config->proc_iops = &ikconfig_inode_ops;
+ current_config->proc_fops = &ikconfig_file_ops;
+ current_config->owner = THIS_MODULE;
+ ikconfig_current_size = strlen(ikconfig_config);
+ current_config->size = ikconfig_current_size;
+
+ /* create the "built with" file */
+ built_with = create_proc_read_entry("built_with", 0444, ikconfig_dir,
+ proc_read_built_with, NULL);
+ if (built_with == NULL) {
+ result = -ENOMEM;
+ goto leave3;
+ }
+ built_with->owner = THIS_MODULE;
+ goto leave;
+
+leave3:
+ /* remove the file from proc */
+ remove_proc_entry("config", ikconfig_dir);
+
+leave2:
+ /* remove the ikconfig directory */
+ remove_proc_entry(IKCONFIG_NAME, NULL);
+
+leave:
+ return result;
+}
+
+/***************************************************/
+/* cleanup_ikconfig: clean up our mess */
+
+static void
+cleanup_ikconfig(void)
+{
+ /* remove the files */
+ remove_proc_entry("config", ikconfig_dir);
+ remove_proc_entry("built_with", ikconfig_dir);
+
+ /* remove the ikconfig directory */
+ remove_proc_entry(IKCONFIG_NAME, NULL);
+}
+
+module_init(ikconfig_init);
+module_exit(cleanup_ikconfig);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Randy Dunlap");
+MODULE_DESCRIPTION("Echo the kernel .config file used to build the kernel");
+
+#endif /* CONFIG_IKCONFIG_PROC */
diff -Nru a/kernel/cpufreq.c b/kernel/cpufreq.c
--- a/kernel/cpufreq.c Sun Aug 3 13:14:46 2003
+++ b/kernel/cpufreq.c Sun Aug 3 13:14:46 2003
@@ -27,20 +27,23 @@
/**
* The "cpufreq driver" - the arch- or hardware-dependend low
- * level driver of CPUFreq support, and its locking mutex.
- * cpu_max_freq is in kHz.
+ * level driver of CPUFreq support, and its spinlock. This lock
+ * also protects the cpufreq_cpu_data array.
*/
static struct cpufreq_driver *cpufreq_driver;
-static DECLARE_MUTEX (cpufreq_driver_sem);
+static struct cpufreq_policy *cpufreq_cpu_data[NR_CPUS];
+static spinlock_t cpufreq_driver_lock = SPIN_LOCK_UNLOCKED;
+
+/* internal prototype */
+static int __cpufreq_governor(struct cpufreq_policy *policy, unsigned int event);
+
/**
* Two notifier lists: the "policy" list is involved in the
* validation process for a new CPU frequency policy; the
* "transition" list for kernel code that needs to handle
* changes to devices when the CPU clock speed changes.
- * The mutex locks both lists. If both cpufreq_driver_sem
- * and cpufreq_notifier_sem need to be hold, get cpufreq_driver_sem
- * first.
+ * The mutex locks both lists.
*/
static struct notifier_block *cpufreq_policy_notifier_list;
static struct notifier_block *cpufreq_transition_notifier_list;
@@ -50,28 +53,49 @@
static LIST_HEAD(cpufreq_governor_list);
static DECLARE_MUTEX (cpufreq_governor_sem);
-static int cpufreq_cpu_get(unsigned int cpu)
+static struct cpufreq_policy * cpufreq_cpu_get(unsigned int cpu)
{
+ struct cpufreq_policy *data;
+ unsigned long flags;
+
if (cpu >= NR_CPUS)
- return 0;
+ goto err_out;
+
+ /* get the cpufreq driver */
+ spin_lock_irqsave(&cpufreq_driver_lock, flags);
if (!cpufreq_driver)
- return 0;
+ goto err_out_unlock;
if (!try_module_get(cpufreq_driver->owner))
- return 0;
+ goto err_out_unlock;
- if (!kobject_get(&cpufreq_driver->policy[cpu].kobj)) {
- module_put(cpufreq_driver->owner);
- return 0;
- }
- return 1;
+ /* get the CPU */
+ data = cpufreq_cpu_data[cpu];
+
+ if (!data)
+ goto err_out_put_module;
+
+ if (!kobject_get(&data->kobj))
+ goto err_out_put_module;
+
+
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
+
+ return data;
+
+ err_out_put_module:
+ module_put(cpufreq_driver->owner);
+ err_out_unlock:
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
+ err_out:
+ return NULL;
}
-static void cpufreq_cpu_put(unsigned int cpu)
+static void cpufreq_cpu_put(struct cpufreq_policy *data)
{
- kobject_put(&cpufreq_driver->policy[cpu].kobj);
+ kobject_put(&data->kobj);
module_put(cpufreq_driver->owner);
}
@@ -278,10 +302,11 @@
struct cpufreq_policy * policy = to_policy(kobj);
struct freq_attr * fattr = to_attr(attr);
ssize_t ret;
- if (!cpufreq_cpu_get(policy->cpu))
+ policy = cpufreq_cpu_get(policy->cpu);
+ if (!policy)
return -EINVAL;
ret = fattr->show ? fattr->show(policy,buf) : 0;
- cpufreq_cpu_put(policy->cpu);
+ cpufreq_cpu_put(policy);
return ret;
}
@@ -291,10 +316,11 @@
struct cpufreq_policy * policy = to_policy(kobj);
struct freq_attr * fattr = to_attr(attr);
ssize_t ret;
- if (!cpufreq_cpu_get(policy->cpu))
+ policy = cpufreq_cpu_get(policy->cpu);
+ if (!policy)
return -EINVAL;
ret = fattr->store ? fattr->store(policy,buf,count) : 0;
- cpufreq_cpu_put(policy->cpu);
+ cpufreq_cpu_put(policy);
return ret;
}
@@ -328,28 +354,28 @@
struct cpufreq_policy new_policy;
struct cpufreq_policy *policy;
struct freq_attr **drv_attr;
+ unsigned long flags;
if (!try_module_get(cpufreq_driver->owner))
return -EINVAL;
+ policy = kmalloc(sizeof(struct cpufreq_policy), GFP_KERNEL);
+ if (!policy)
+ return -ENOMEM;
+ memset(policy, 0, sizeof(struct cpufreq_policy));
+
+ policy->cpu = cpu;
+ init_MUTEX_LOCKED(&policy->lock);
+ init_completion(&policy->kobj_unregister);
+
/* call driver. From then on the cpufreq must be able
* to accept all calls to ->verify and ->setpolicy for this CPU
*/
- policy = &cpufreq_driver->policy[cpu];
- policy->cpu = cpu;
ret = cpufreq_driver->init(policy);
if (ret)
- goto out;
-
- /* set default policy on this CPU */
- down(&cpufreq_driver_sem);
- memcpy(&new_policy,
- policy,
- sizeof(struct cpufreq_policy));
- up(&cpufreq_driver_sem);
+ goto err_out;
- init_MUTEX(&policy->lock);
- init_completion(&policy->kobj_unregister);
+ memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
/* prepare interface data */
policy->kobj.parent = &sys_dev->kobj;
@@ -358,7 +384,7 @@
ret = kobject_register(&policy->kobj);
if (ret)
- goto out;
+ goto err_out;
/* set up files for this cpu device */
drv_attr = cpufreq_driver->attr;
@@ -366,15 +392,32 @@
sysfs_create_file(&policy->kobj, &((*drv_attr)->attr));
drv_attr++;
}
+
+ spin_lock_irqsave(&cpufreq_driver_lock, flags);
+ cpufreq_cpu_data[cpu] = policy;
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
+
+ up(&policy->lock);
/* set default policy */
ret = cpufreq_set_policy(&new_policy);
- if (ret) {
- kobject_unregister(&policy->kobj);
- wait_for_completion(&policy->kobj_unregister);
- }
+ if (ret)
+ goto err_out_unregister;
- out:
+ module_put(cpufreq_driver->owner);
+ return 0;
+
+
+ err_out_unregister:
+ spin_lock_irqsave(&cpufreq_driver_lock, flags);
+ cpufreq_cpu_data[cpu] = NULL;
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
+
+ kobject_unregister(&policy->kobj);
+ wait_for_completion(&policy->kobj_unregister);
+
+ err_out:
+ kfree(policy);
module_put(cpufreq_driver->owner);
return ret;
}
@@ -388,34 +431,39 @@
static int cpufreq_remove_dev (struct sys_device * sys_dev)
{
unsigned int cpu = sys_dev->id;
+ unsigned long flags;
+ struct cpufreq_policy *data;
- if (!kobject_get(&cpufreq_driver->policy[cpu].kobj))
- return -EFAULT;
+ spin_lock_irqsave(&cpufreq_driver_lock, flags);
+ data = cpufreq_cpu_data[cpu];
- down(&cpufreq_driver_sem);
- if ((cpufreq_driver->target) &&
- (cpufreq_driver->policy[cpu].policy == CPUFREQ_POLICY_GOVERNOR)) {
- cpufreq_driver->policy[cpu].governor->governor(&cpufreq_driver->policy[cpu], CPUFREQ_GOV_STOP);
- module_put(cpufreq_driver->policy[cpu].governor->owner);
+ if (!data) {
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
+ return -EINVAL;
}
+ cpufreq_cpu_data[cpu] = NULL;
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
- /* we may call driver->exit here without checking for try_module_exit
- * as it's either the driver which wants to unload or we have a CPU
- * removal AND driver removal at the same time...
- */
- if (cpufreq_driver->exit)
- cpufreq_driver->exit(&cpufreq_driver->policy[cpu]);
+ if (!kobject_get(&data->kobj))
+ return -EFAULT;
- kobject_unregister(&cpufreq_driver->policy[cpu].kobj);
+ kobject_unregister(&data->kobj);
- up(&cpufreq_driver_sem);
- kobject_put(&cpufreq_driver->policy[cpu].kobj);
+ kobject_put(&data->kobj);
/* we need to make sure that the underlying kobj is actually
- * destroyed before we proceed e.g. with cpufreq driver module
- * unloading
+ * not referenced anymore by anybody before we proceed with
+ * unloading.
*/
- wait_for_completion(&cpufreq_driver->policy[cpu].kobj_unregister);
+ wait_for_completion(&data->kobj_unregister);
+
+ if (cpufreq_driver->target)
+ __cpufreq_governor(data, CPUFREQ_GOV_STOP);
+
+ if (cpufreq_driver->exit)
+ cpufreq_driver->exit(data);
+
+ kfree(data);
return 0;
}
@@ -431,15 +479,20 @@
int cpu = sysdev->id;
unsigned int ret = 0;
struct cpufreq_policy policy;
+ struct cpufreq_policy *cpu_policy;
- if (cpu_online(cpu) && cpufreq_cpu_get(cpu)) {
- down(&cpufreq_driver_sem);
- memcpy(&policy, &cpufreq_driver->policy[cpu],
- sizeof(struct cpufreq_policy));
- up(&cpufreq_driver_sem);
- ret = cpufreq_set_policy(&policy);
- cpufreq_cpu_put(cpu);
- }
+ if (!cpu_online(cpu))
+ return 0;
+
+ cpu_policy = cpufreq_cpu_get(cpu);
+
+ down(&cpu_policy->lock);
+ memcpy(&policy, cpu_policy, sizeof(struct cpufreq_policy));
+ up(&cpu_policy->lock);
+
+ ret = cpufreq_set_policy(&policy);
+
+ cpufreq_cpu_put(cpu_policy);
return ret;
}
@@ -526,68 +579,86 @@
* GOVERNORS *
*********************************************************************/
-inline int cpufreq_driver_target(struct cpufreq_policy *policy,
- unsigned int target_freq,
- unsigned int relation)
+
+int __cpufreq_driver_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
+{
+ return cpufreq_driver->target(policy, target_freq, relation);
+}
+EXPORT_SYMBOL_GPL(__cpufreq_driver_target);
+
+
+int cpufreq_driver_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
{
unsigned int ret;
- unsigned int cpu = policy->cpu;
- if (!cpufreq_cpu_get(cpu))
+ policy = cpufreq_cpu_get(policy->cpu);
+ if (!policy)
return -EINVAL;
- down(&cpufreq_driver->policy[cpu].lock);
+ down(&policy->lock);
- ret = cpufreq_driver->target(policy, target_freq, relation);
+ ret = __cpufreq_driver_target(policy, target_freq, relation);
- up(&cpufreq_driver->policy[cpu].lock);
+ up(&policy->lock);
- cpufreq_cpu_put(cpu);
+ cpufreq_cpu_put(policy);
return ret;
}
EXPORT_SYMBOL_GPL(cpufreq_driver_target);
-int cpufreq_governor(unsigned int cpu, unsigned int event)
+static int __cpufreq_governor(struct cpufreq_policy *policy, unsigned int event)
{
int ret = 0;
- struct cpufreq_policy *policy = &cpufreq_driver->policy[cpu];
-
- if (!cpufreq_cpu_get(cpu))
- return -EINVAL;
switch (policy->policy) {
case CPUFREQ_POLICY_POWERSAVE:
if ((event == CPUFREQ_GOV_LIMITS) || (event == CPUFREQ_GOV_START)) {
- down(&cpufreq_driver->policy[cpu].lock);
- ret = cpufreq_driver->target(policy, policy->min, CPUFREQ_RELATION_L);
- up(&cpufreq_driver->policy[cpu].lock);
+ ret = __cpufreq_driver_target(policy, policy->min, CPUFREQ_RELATION_L);
}
break;
case CPUFREQ_POLICY_PERFORMANCE:
if ((event == CPUFREQ_GOV_LIMITS) || (event == CPUFREQ_GOV_START)) {
- down(&cpufreq_driver->policy[cpu].lock);
- ret = cpufreq_driver->target(policy, policy->max, CPUFREQ_RELATION_H);
- up(&cpufreq_driver->policy[cpu].lock);
+ ret = __cpufreq_driver_target(policy, policy->max, CPUFREQ_RELATION_H);
}
break;
case CPUFREQ_POLICY_GOVERNOR:
ret = -EINVAL;
- if (!try_module_get(cpufreq_driver->policy[cpu].governor->owner))
+ if (!try_module_get(policy->governor->owner))
break;
- ret = cpufreq_driver->policy[cpu].governor->governor(policy, event);
+ ret = policy->governor->governor(policy, event);
/* we keep one module reference alive for each CPU governed by this CPU */
if ((event != CPUFREQ_GOV_START) || ret)
- module_put(cpufreq_driver->policy[cpu].governor->owner);
+ module_put(policy->governor->owner);
if ((event == CPUFREQ_GOV_STOP) && !ret)
- module_put(cpufreq_driver->policy[cpu].governor->owner);
+ module_put(policy->governor->owner);
break;
default:
ret = -EINVAL;
}
- cpufreq_cpu_put(cpu);
+ return ret;
+}
+
+
+int cpufreq_governor(unsigned int cpu, unsigned int event)
+{
+ int ret = 0;
+ struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+
+ if (!policy)
+ return -EINVAL;
+
+ down(&policy->lock);
+ ret = __cpufreq_governor(policy, event);
+ up(&policy->lock);
+
+ cpufreq_cpu_put(policy);
return ret;
}
@@ -649,16 +720,19 @@
*/
int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu)
{
- if (!policy || !cpufreq_cpu_get(cpu))
+ struct cpufreq_policy *cpu_policy;
+ if (!policy)
return -EINVAL;
- down(&cpufreq_driver_sem);
- memcpy(policy,
- &cpufreq_driver->policy[cpu],
- sizeof(struct cpufreq_policy));
- up(&cpufreq_driver_sem);
+ cpu_policy = cpufreq_cpu_get(cpu);
+ if (!cpu_policy)
+ return -EINVAL;
- cpufreq_cpu_put(cpu);
+ down(&cpu_policy->lock);
+ memcpy(policy, cpu_policy, sizeof(struct cpufreq_policy));
+ up(&cpu_policy->lock);
+
+ cpufreq_cpu_put(cpu_policy);
return 0;
}
@@ -674,15 +748,21 @@
int cpufreq_set_policy(struct cpufreq_policy *policy)
{
int ret = 0;
+ struct cpufreq_policy *data;
- if (!policy || !cpufreq_cpu_get(policy->cpu))
+ if (!policy)
return -EINVAL;
- down(&cpufreq_driver_sem);
+ data = cpufreq_cpu_get(policy->cpu);
+ if (!data)
+ return -EINVAL;
+
+ /* lock this CPU */
+ down(&data->lock);
+
memcpy(&policy->cpuinfo,
- &cpufreq_driver->policy[policy->cpu].cpuinfo,
+ &data->cpuinfo,
sizeof(struct cpufreq_cpuinfo));
- up(&cpufreq_driver_sem);
/* verify the cpu speed can be set within this limit */
ret = cpufreq_driver->verify(policy);
@@ -713,39 +793,39 @@
up_read(&cpufreq_notifier_rwsem);
- /* from here on we limit it to one limit and/or governor change running at the moment */
- down(&cpufreq_driver_sem);
- cpufreq_driver->policy[policy->cpu].min = policy->min;
- cpufreq_driver->policy[policy->cpu].max = policy->max;
+ data->min = policy->min;
+ data->max = policy->max;
if (cpufreq_driver->setpolicy) {
- cpufreq_driver->policy[policy->cpu].policy = policy->policy;
+ data->policy = policy->policy;
ret = cpufreq_driver->setpolicy(policy);
} else {
- if ((policy->policy != cpufreq_driver->policy[policy->cpu].policy) ||
- ((policy->policy == CPUFREQ_POLICY_GOVERNOR) && (policy->governor != cpufreq_driver->policy[policy->cpu].governor))) {
- unsigned int old_pol = cpufreq_driver->policy[policy->cpu].policy;
- struct cpufreq_governor *old_gov = cpufreq_driver->policy[policy->cpu].governor;
+ if ((policy->policy != data->policy) ||
+ ((policy->policy == CPUFREQ_POLICY_GOVERNOR) && (policy->governor != data->governor))) {
+ /* save old, working values */
+ unsigned int old_pol = data->policy;
+ struct cpufreq_governor *old_gov = data->governor;
+
/* end old governor */
- cpufreq_governor(policy->cpu, CPUFREQ_GOV_STOP);
- cpufreq_driver->policy[policy->cpu].policy = policy->policy;
- cpufreq_driver->policy[policy->cpu].governor = policy->governor;
+ __cpufreq_governor(data, CPUFREQ_GOV_STOP);
+
/* start new governor */
- if (cpufreq_governor(policy->cpu, CPUFREQ_GOV_START)) {
- cpufreq_driver->policy[policy->cpu].policy = old_pol;
- cpufreq_driver->policy[policy->cpu].governor = old_gov;
- cpufreq_governor(policy->cpu, CPUFREQ_GOV_START);
+ data->policy = policy->policy;
+ data->governor = policy->governor;
+ if (__cpufreq_governor(data, CPUFREQ_GOV_START)) {
+ /* new governor failed, so re-start old one */
+ data->policy = old_pol;
+ data->governor = old_gov;
+ __cpufreq_governor(data, CPUFREQ_GOV_START);
}
- /* might be a policy change, too */
- cpufreq_governor(policy->cpu, CPUFREQ_GOV_LIMITS);
- } else {
- cpufreq_governor(policy->cpu, CPUFREQ_GOV_LIMITS);
+ /* might be a policy change, too, so fall through */
}
+ __cpufreq_governor(data, CPUFREQ_GOV_LIMITS);
}
- up(&cpufreq_driver_sem);
- error_out:
- cpufreq_cpu_put(policy->cpu);
+ error_out:
+ up(&data->lock);
+ cpufreq_cpu_put(data);
return ret;
}
@@ -766,8 +846,8 @@
* per-CPU loops_per_jiffy value wherever possible.
*/
#ifndef CONFIG_SMP
-static unsigned long l_p_j_ref = 0;
-static unsigned int l_p_j_ref_freq = 0;
+static unsigned long l_p_j_ref;
+static unsigned int l_p_j_ref_freq;
static inline void adjust_jiffies(unsigned long val, struct cpufreq_freqs *ci)
{
@@ -801,7 +881,7 @@
case CPUFREQ_POSTCHANGE:
adjust_jiffies(CPUFREQ_POSTCHANGE, freqs);
notifier_call_chain(&cpufreq_transition_notifier_list, CPUFREQ_POSTCHANGE, freqs);
- cpufreq_driver->policy[freqs->cpu].cur = freqs->new;
+ cpufreq_cpu_data[freqs->cpu]->cur = freqs->new;
break;
}
up_read(&cpufreq_notifier_rwsem);
@@ -826,25 +906,19 @@
*/
int cpufreq_register_driver(struct cpufreq_driver *driver_data)
{
+ unsigned long flags;
+
if (!driver_data || !driver_data->verify || !driver_data->init ||
((!driver_data->setpolicy) && (!driver_data->target)))
return -EINVAL;
- down(&cpufreq_driver_sem);
+ spin_lock_irqsave(&cpufreq_driver_lock, flags);
if (cpufreq_driver) {
- up(&cpufreq_driver_sem);
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
return -EBUSY;
}
cpufreq_driver = driver_data;
- up(&cpufreq_driver_sem);
-
- cpufreq_driver->policy = kmalloc(NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL);
- if (!cpufreq_driver->policy) {
- cpufreq_driver = NULL;
- return -ENOMEM;
- }
-
- memset(cpufreq_driver->policy, 0, NR_CPUS * sizeof(struct cpufreq_policy));
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
return sysdev_driver_register(&cpu_sysdev_class,&cpufreq_sysdev_driver);
}
@@ -861,15 +935,16 @@
*/
int cpufreq_unregister_driver(struct cpufreq_driver *driver)
{
+ unsigned long flags;
+
if (!cpufreq_driver || (driver != cpufreq_driver))
return -EINVAL;
sysdev_driver_unregister(&cpu_sysdev_class, &cpufreq_sysdev_driver);
- down(&cpufreq_driver_sem);
- kfree(cpufreq_driver->policy);
+ spin_lock_irqsave(&cpufreq_driver_lock, flags);
cpufreq_driver = NULL;
- up(&cpufreq_driver_sem);
+ spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
return 0;
}
diff -Nru a/kernel/ksyms.c b/kernel/ksyms.c
--- a/kernel/ksyms.c Sun Aug 3 13:14:44 2003
+++ b/kernel/ksyms.c Sun Aug 3 13:14:44 2003
@@ -120,6 +120,7 @@
EXPORT_SYMBOL(max_mapnr);
#endif
EXPORT_SYMBOL(high_memory);
+EXPORT_SYMBOL_GPL(invalidate_mmap_range);
EXPORT_SYMBOL(vmtruncate);
EXPORT_SYMBOL(find_vma);
EXPORT_SYMBOL(get_unmapped_area);
@@ -195,6 +196,7 @@
EXPORT_SYMBOL(invalidate_inode_pages);
EXPORT_SYMBOL_GPL(invalidate_inode_pages2);
EXPORT_SYMBOL(truncate_inode_pages);
+EXPORT_SYMBOL(install_page);
EXPORT_SYMBOL(fsync_bdev);
EXPORT_SYMBOL(permission);
EXPORT_SYMBOL(vfs_permission);
diff -Nru a/kernel/resource.c b/kernel/resource.c
--- a/kernel/resource.c Sun Aug 3 13:14:50 2003
+++ b/kernel/resource.c Sun Aug 3 13:14:50 2003
@@ -347,7 +347,7 @@
#define MAXRESERVE 4
static int __init reserve_setup(char *str)
{
- static int reserved = 0;
+ static int reserved;
static struct resource reserve[MAXRESERVE];
for (;;) {
diff -Nru a/kernel/suspend.c b/kernel/suspend.c
--- a/kernel/suspend.c Sun Aug 3 13:14:46 2003
+++ b/kernel/suspend.c Sun Aug 3 13:14:46 2003
@@ -92,18 +92,18 @@
/* Variables to be preserved over suspend */
static int new_loglevel = 7;
-static int orig_loglevel = 0;
+static int orig_loglevel;
static int orig_fgconsole, orig_kmsg;
static int pagedir_order_check;
static int nr_copy_pages_check;
-static int resume_status = 0;
+static int resume_status;
static char resume_file[256] = ""; /* For resume= kernel option */
static dev_t resume_device;
/* Local variables that should not be affected by save */
unsigned int nr_copy_pages __nosavedata = 0;
-static int pm_suspend_state = 0;
+static int pm_suspend_state;
/* Suspend pagedir is allocated before final copy, therefore it
must be freed after resume
diff -Nru a/kernel/sysctl.c b/kernel/sysctl.c
--- a/kernel/sysctl.c Sun Aug 3 13:14:45 2003
+++ b/kernel/sysctl.c Sun Aug 3 13:14:45 2003
@@ -585,7 +585,7 @@
/* Constants for minimum and maximum testing in vm_table.
We use these as one-element integer vectors. */
-static int zero = 0;
+static int zero;
static int one_hundred = 100;
diff -Nru a/kernel/user.c b/kernel/user.c
--- a/kernel/user.c Sun Aug 3 13:14:47 2003
+++ b/kernel/user.c Sun Aug 3 13:14:47 2003
@@ -146,8 +146,11 @@
for(n = 0; n < UIDHASH_SZ; ++n)
INIT_LIST_HEAD(uidhash_table + n);
- /* Insert the root user immediately - init already runs with this */
+ /* Insert the root user immediately (init already runs as root) */
+ spin_lock(&uidhash_lock);
uid_hash_insert(&root_user, uidhashentry(0));
+ spin_unlock(&uidhash_lock);
+
return 0;
}
diff -Nru a/lib/string.c b/lib/string.c
--- a/lib/string.c Sun Aug 3 13:14:52 2003
+++ b/lib/string.c Sun Aug 3 13:14:52 2003
@@ -80,17 +80,19 @@
* @src: Where to copy the string from
* @count: The maximum number of bytes to copy
*
- * Note that unlike userspace strncpy, this does not %NUL-pad the buffer.
- * However, the result is not %NUL-terminated if the source exceeds
+ * The result is not %NUL-terminated if the source exceeds
* @count bytes.
*/
char * strncpy(char * dest,const char *src,size_t count)
{
char *tmp = dest;
- while (count-- && (*dest++ = *src++) != '\0')
- /* nothing */;
-
+ while (count && (*dest++ = *src++) != '\0')
+ count--;
+ while (count) {
+ *dest++ = 0;
+ count--;
+ }
return tmp;
}
#endif
diff -Nru a/lib/zlib_deflate/deftree.c b/lib/zlib_deflate/deftree.c
--- a/lib/zlib_deflate/deftree.c Sun Aug 3 13:14:46 2003
+++ b/lib/zlib_deflate/deftree.c Sun Aug 3 13:14:46 2003
@@ -228,7 +228,7 @@
*/
static void tr_static_init(void)
{
- static int static_init_done = 0;
+ static int static_init_done;
int n; /* iterates over tree elements */
int bits; /* bit counter */
int length; /* length value */
diff -Nru a/mm/bootmem.c b/mm/bootmem.c
--- a/mm/bootmem.c Sun Aug 3 13:14:47 2003
+++ b/mm/bootmem.c Sun Aug 3 13:14:47 2003
@@ -48,8 +48,24 @@
bootmem_data_t *bdata = pgdat->bdata;
unsigned long mapsize = ((end - start)+7)/8;
- pgdat->pgdat_next = pgdat_list;
- pgdat_list = pgdat;
+
+ /*
+ * sort pgdat_list so that the lowest one comes first,
+ * which makes alloc_bootmem_low_pages work as desired.
+ */
+ if (!pgdat_list || pgdat_list->node_start_pfn > pgdat->node_start_pfn) {
+ pgdat->pgdat_next = pgdat_list;
+ pgdat_list = pgdat;
+ } else {
+ pg_data_t *tmp = pgdat_list;
+ while (tmp->pgdat_next) {
+ if (tmp->pgdat_next->node_start_pfn > pgdat->node_start_pfn)
+ break;
+ tmp = tmp->pgdat_next;
+ }
+ pgdat->pgdat_next = tmp->pgdat_next;
+ tmp->pgdat_next = pgdat;
+ }
mapsize = (mapsize + (sizeof(long) - 1UL)) & ~(sizeof(long) - 1UL);
bdata->node_bootmem_map = phys_to_virt(mapstart << PAGE_SHIFT);
diff -Nru a/mm/fadvise.c b/mm/fadvise.c
--- a/mm/fadvise.c Sun Aug 3 13:14:47 2003
+++ b/mm/fadvise.c Sun Aug 3 13:14:47 2003
@@ -56,7 +56,7 @@
ret = -EINVAL;
break;
}
- ret = do_page_cache_readahead(mapping, file,
+ ret = force_page_cache_readahead(mapping, file,
offset >> PAGE_CACHE_SHIFT,
max_sane_readahead(len >> PAGE_CACHE_SHIFT));
if (ret > 0)
diff -Nru a/mm/filemap.c b/mm/filemap.c
--- a/mm/filemap.c Sun Aug 3 13:14:47 2003
+++ b/mm/filemap.c Sun Aug 3 13:14:47 2003
@@ -724,7 +724,7 @@
* This is the "read()" routine for all filesystems
* that can use the page cache directly.
*/
-static ssize_t
+ssize_t
__generic_file_aio_read(struct kiocb *iocb, const struct iovec *iov,
unsigned long nr_segs, loff_t *ppos)
{
@@ -809,6 +809,7 @@
return __generic_file_aio_read(iocb, &local_iov, 1, &iocb->ki_pos);
}
EXPORT_SYMBOL(generic_file_aio_read);
+EXPORT_SYMBOL(__generic_file_aio_read);
ssize_t
generic_file_read(struct file *filp, char __user *buf, size_t count, loff_t *ppos)
@@ -870,7 +871,8 @@
if (!mapping || !mapping->a_ops || !mapping->a_ops->readpage)
return -EINVAL;
- do_page_cache_readahead(mapping, filp, index, max_sane_readahead(nr));
+ force_page_cache_readahead(mapping, filp, index,
+ max_sane_readahead(nr));
return 0;
}
@@ -996,7 +998,8 @@
goto no_cached_page;
did_readaround = 1;
- do_page_cache_readahead(mapping, file, pgoff & ~(MMAP_READAROUND-1), MMAP_READAROUND);
+ do_page_cache_readahead(mapping, file,
+ pgoff & ~(MMAP_READAROUND-1), MMAP_READAROUND);
goto retry_find;
}
@@ -1230,7 +1233,7 @@
int err;
if (!nonblock)
- do_page_cache_readahead(mapping, vma->vm_file,
+ force_page_cache_readahead(mapping, vma->vm_file,
pgoff, len >> PAGE_CACHE_SHIFT);
repeat:
@@ -1769,10 +1772,8 @@
if (unlikely(copied != bytes))
if (status >= 0)
status = -EFAULT;
-
- if (!PageReferenced(page))
- SetPageReferenced(page);
unlock_page(page);
+ mark_page_accessed(page);
page_cache_release(page);
if (status < 0)
break;
diff -Nru a/mm/madvise.c b/mm/madvise.c
--- a/mm/madvise.c Sun Aug 3 13:14:46 2003
+++ b/mm/madvise.c Sun Aug 3 13:14:46 2003
@@ -65,7 +65,7 @@
end = vma->vm_end;
end = ((end - vma->vm_start) >> PAGE_SHIFT) + vma->vm_pgoff;
- do_page_cache_readahead(file->f_dentry->d_inode->i_mapping,
+ force_page_cache_readahead(file->f_dentry->d_inode->i_mapping,
file, start, max_sane_readahead(end - start));
return 0;
}
diff -Nru a/mm/memory.c b/mm/memory.c
--- a/mm/memory.c Sun Aug 3 13:14:48 2003
+++ b/mm/memory.c Sun Aug 3 13:14:48 2003
@@ -1062,35 +1062,77 @@
return ret;
}
-static void vmtruncate_list(struct list_head *head, unsigned long pgoff)
+/*
+ * Helper function for invalidate_mmap_range().
+ * Both hba and hlen are page numbers in PAGE_SIZE units.
+ * An hlen of zero blows away the entire portion file after hba.
+ */
+static void
+invalidate_mmap_range_list(struct list_head *head,
+ unsigned long const hba,
+ unsigned long const hlen)
{
- unsigned long start, end, len, diff;
- struct vm_area_struct *vma;
struct list_head *curr;
-
+ unsigned long hea; /* last page of hole. */
+ unsigned long vba;
+ unsigned long vea; /* last page of corresponding uva hole. */
+ struct vm_area_struct *vp;
+ unsigned long zba;
+ unsigned long zea;
+
+ hea = hba + hlen - 1; /* avoid overflow. */
+ if (hea < hba)
+ hea = ULONG_MAX;
list_for_each(curr, head) {
- vma = list_entry(curr, struct vm_area_struct, shared);
- start = vma->vm_start;
- end = vma->vm_end;
- len = end - start;
-
- /* mapping wholly truncated? */
- if (vma->vm_pgoff >= pgoff) {
- zap_page_range(vma, start, len);
- continue;
- }
+ vp = list_entry(curr, struct vm_area_struct, shared);
+ vba = vp->vm_pgoff;
+ vea = vba + ((vp->vm_end - vp->vm_start) >> PAGE_SHIFT) - 1;
+ if (hea < vba || vea < hba)
+ continue; /* Mapping disjoint from hole. */
+ zba = (hba <= vba) ? vba : hba;
+ zea = (vea <= hea) ? vea : hea;
+ zap_page_range(vp,
+ ((zba - vba) << PAGE_SHIFT) + vp->vm_start,
+ (zea - zba + 1) << PAGE_SHIFT);
+ }
+}
- /* mapping wholly unaffected? */
- len = len >> PAGE_SHIFT;
- diff = pgoff - vma->vm_pgoff;
- if (diff >= len)
- continue;
-
- /* Ok, partially affected.. */
- start += diff << PAGE_SHIFT;
- len = (len - diff) << PAGE_SHIFT;
- zap_page_range(vma, start, len);
+/**
+ * invalidate_mmap_range - invalidate the portion of all mmaps
+ * in the specified address_space corresponding to the specified
+ * page range in the underlying file.
+ * @address_space: the address space containing mmaps to be invalidated.
+ * @holebegin: byte in first page to invalidate, relative to the start of
+ * the underlying file. This will be rounded down to a PAGE_SIZE
+ * boundary. Note that this is different from vmtruncate(), which
+ * must keep the partial page. In contrast, we must get rid of
+ * partial pages.
+ * @holelen: size of prospective hole in bytes. This will be rounded
+ * up to a PAGE_SIZE boundary. A holelen of zero truncates to the
+ * end of the file.
+ */
+void invalidate_mmap_range(struct address_space *mapping,
+ loff_t const holebegin, loff_t const holelen)
+{
+ unsigned long hba = holebegin >> PAGE_SHIFT;
+ unsigned long hlen = (holelen + PAGE_SIZE - 1) >> PAGE_SHIFT;
+
+ /* Check for overflow. */
+ if (sizeof(holelen) > sizeof(hlen)) {
+ long long holeend =
+ (holebegin + holelen + PAGE_SIZE - 1) >> PAGE_SHIFT;
+
+ if (holeend & ~(long long)ULONG_MAX)
+ hlen = ULONG_MAX - hba + 1;
}
+ down(&mapping->i_shared_sem);
+ /* Protect against page fault */
+ atomic_inc(&mapping->truncate_count);
+ if (unlikely(!list_empty(&mapping->i_mmap)))
+ invalidate_mmap_range_list(&mapping->i_mmap, hba, hlen);
+ if (unlikely(!list_empty(&mapping->i_mmap_shared)))
+ invalidate_mmap_range_list(&mapping->i_mmap_shared, hba, hlen);
+ up(&mapping->i_shared_sem);
}
/*
@@ -1103,20 +1145,13 @@
*/
int vmtruncate(struct inode * inode, loff_t offset)
{
- unsigned long pgoff;
struct address_space *mapping = inode->i_mapping;
unsigned long limit;
if (inode->i_size < offset)
goto do_expand;
i_size_write(inode, offset);
- pgoff = (offset + PAGE_SIZE - 1) >> PAGE_SHIFT;
- down(&mapping->i_shared_sem);
- if (unlikely(!list_empty(&mapping->i_mmap)))
- vmtruncate_list(&mapping->i_mmap, pgoff);
- if (unlikely(!list_empty(&mapping->i_mmap_shared)))
- vmtruncate_list(&mapping->i_mmap_shared, pgoff);
- up(&mapping->i_shared_sem);
+ invalidate_mmap_range(mapping, offset + PAGE_SIZE - 1, 0);
truncate_inode_pages(mapping, offset);
goto out_truncate;
@@ -1345,8 +1380,10 @@
unsigned long address, int write_access, pte_t *page_table, pmd_t *pmd)
{
struct page * new_page;
+ struct address_space *mapping;
pte_t entry;
struct pte_chain *pte_chain;
+ int sequence;
int ret;
if (!vma->vm_ops || !vma->vm_ops->nopage)
@@ -1355,6 +1392,10 @@
pte_unmap(page_table);
spin_unlock(&mm->page_table_lock);
+ mapping = vma->vm_file->f_dentry->d_inode->i_mapping;
+ sequence = atomic_read(&mapping->truncate_count);
+ smp_rmb(); /* Prevent CPU from reordering lock-free ->nopage() */
+retry:
new_page = vma->vm_ops->nopage(vma, address & PAGE_MASK, 0);
/* no page was available -- either SIGBUS or OOM */
@@ -1383,6 +1424,17 @@
}
spin_lock(&mm->page_table_lock);
+ /*
+ * For a file-backed vma, someone could have truncated or otherwise
+ * invalidated this page. If invalidate_mmap_range got called,
+ * retry getting the page.
+ */
+ if (unlikely(sequence != atomic_read(&mapping->truncate_count))) {
+ sequence = atomic_read(&mapping->truncate_count);
+ spin_unlock(&mm->page_table_lock);
+ page_cache_release(new_page);
+ goto retry;
+ }
page_table = pte_offset_map(pmd, address);
/*
diff -Nru a/mm/readahead.c b/mm/readahead.c
--- a/mm/readahead.c Sun Aug 3 13:14:45 2003
+++ b/mm/readahead.c Sun Aug 3 13:14:45 2003
@@ -96,8 +96,6 @@
struct pagevec lru_pvec;
int ret = 0;
- current->flags |= PF_READAHEAD;
-
if (mapping->a_ops->readpages) {
ret = mapping->a_ops->readpages(filp, mapping, pages, nr_pages);
goto out;
@@ -118,7 +116,6 @@
}
pagevec_lru_add(&lru_pvec);
out:
- current->flags &= ~PF_READAHEAD;
return ret;
}
@@ -263,8 +260,8 @@
* Chunk the readahead into 2 megabyte units, so that we don't pin too much
* memory at once.
*/
-int do_page_cache_readahead(struct address_space *mapping, struct file *filp,
- unsigned long offset, unsigned long nr_to_read)
+int force_page_cache_readahead(struct address_space *mapping, struct file *filp,
+ unsigned long offset, unsigned long nr_to_read)
{
int ret = 0;
@@ -287,6 +284,27 @@
ret += err;
offset += this_chunk;
nr_to_read -= this_chunk;
+ }
+ return ret;
+}
+
+/*
+ * This version skips the IO if the queue is read-congested, and will tell the
+ * block layer to abandon the readahead if request allocation would block.
+ *
+ * force_page_cache_readahead() will ignore queue congestion and will block on
+ * request queues.
+ */
+int do_page_cache_readahead(struct address_space *mapping, struct file *filp,
+ unsigned long offset, unsigned long nr_to_read)
+{
+ int ret = 0;
+
+ if (!bdi_read_congested(mapping->backing_dev_info)) {
+ current->flags |= PF_READAHEAD;
+ ret = __do_page_cache_readahead(mapping, filp,
+ offset, nr_to_read);
+ current->flags &= ~PF_READAHEAD;
}
return ret;
}
diff -Nru a/mm/shmem.c b/mm/shmem.c
--- a/mm/shmem.c Sun Aug 3 13:14:47 2003
+++ b/mm/shmem.c Sun Aug 3 13:14:47 2003
@@ -296,7 +296,7 @@
struct shmem_sb_info *sbinfo = SHMEM_SB(inode->i_sb);
struct page *page = NULL;
swp_entry_t *entry;
- static const swp_entry_t unswapped = {0};
+ static const swp_entry_t unswapped;
if (sgp != SGP_WRITE &&
((loff_t) index << PAGE_CACHE_SHIFT) >= i_size_read(inode))
diff -Nru a/mm/slab.c b/mm/slab.c
--- a/mm/slab.c Sun Aug 3 13:14:51 2003
+++ b/mm/slab.c Sun Aug 3 13:14:51 2003
@@ -2492,7 +2492,7 @@
seq_puts(m, " : slabdata <active_slabs> <num_slabs> <sharedavail>");
#if STATS
seq_puts(m, " : globalstat <listallocs> <maxobjs> <grown> <reaped> <error> <maxfreeable> <freelimit>");
- seq_puts(m, " : cpustat <allochit> <allocmiss> <freehit <freemiss>");
+ seq_puts(m, " : cpustat <allochit> <allocmiss> <freehit> <freemiss>");
#endif
seq_putc(m, '\n');
}
diff -Nru a/mm/swap_state.c b/mm/swap_state.c
--- a/mm/swap_state.c Sun Aug 3 13:14:47 2003
+++ b/mm/swap_state.c Sun Aug 3 13:14:47 2003
@@ -35,6 +35,7 @@
.i_mmap = LIST_HEAD_INIT(swapper_space.i_mmap),
.i_mmap_shared = LIST_HEAD_INIT(swapper_space.i_mmap_shared),
.i_shared_sem = __MUTEX_INITIALIZER(swapper_space.i_shared_sem),
+ .truncate_count = ATOMIC_INIT(0),
.private_lock = SPIN_LOCK_UNLOCKED,
.private_list = LIST_HEAD_INIT(swapper_space.private_list),
};
diff -Nru a/mm/swapfile.c b/mm/swapfile.c
--- a/mm/swapfile.c Sun Aug 3 13:14:46 2003
+++ b/mm/swapfile.c Sun Aug 3 13:14:46 2003
@@ -1222,7 +1222,7 @@
unsigned int type;
int i, prev;
int error;
- static int least_priority = 0;
+ static int least_priority;
union swap_header *swap_header = 0;
int swap_header_version;
int nr_good_pages = 0;
diff -Nru a/mm/vmscan.c b/mm/vmscan.c
--- a/mm/vmscan.c Sun Aug 3 13:14:45 2003
+++ b/mm/vmscan.c Sun Aug 3 13:14:45 2003
@@ -80,6 +80,25 @@
#endif
/*
+ * exponentially decaying average
+ */
+static inline int expavg(int avg, int val)
+{
+ return ((val - avg) >> 1) + avg;
+}
+
+static void zone_adj_pressure(struct zone *zone, int priority)
+{
+ zone->pressure = expavg(zone->pressure,
+ (DEF_PRIORITY - priority) << 10);
+}
+
+static int pressure_to_priority(int pressure)
+{
+ return DEF_PRIORITY - (pressure >> 10);
+}
+
+/*
* The list of shrinker callbacks used by to apply pressure to
* ageable caches.
*/
@@ -597,7 +616,7 @@
* `distress' is a measure of how much trouble we're having reclaiming
* pages. 0 -> no problems. 100 -> great trouble.
*/
- distress = 100 >> priority;
+ distress = 100 >> pressure_to_priority(zone->pressure);
/*
* The point of this algorithm is to decide when to start reclaiming
@@ -794,8 +813,10 @@
ret += shrink_zone(zone, max_scan, gfp_mask,
to_reclaim, &nr_mapped, ps, priority);
*total_scanned += max_scan + nr_mapped;
- if (ret >= nr_pages)
+ if (ret >= nr_pages) {
+ zone_adj_pressure(zone, priority);
break;
+ }
}
return ret;
}
@@ -824,6 +845,7 @@
int ret = 0;
const int nr_pages = SWAP_CLUSTER_MAX;
int nr_reclaimed = 0;
+ struct zone *zone;
struct reclaim_state *reclaim_state = current->reclaim_state;
inc_page_state(allocstall);
@@ -860,6 +882,8 @@
}
if ((gfp_mask & __GFP_FS) && !(gfp_mask & __GFP_NORETRY))
out_of_memory();
+ for (zone = cz; zone >= cz->zone_pgdat->node_zones; -- zone)
+ zone_adj_pressure(zone, -1);
out:
return ret;
}
@@ -907,8 +931,10 @@
to_reclaim = min(to_free, SWAP_CLUSTER_MAX*8);
} else { /* Zone balancing */
to_reclaim = zone->pages_high-zone->free_pages;
- if (to_reclaim <= 0)
+ if (to_reclaim <= 0) {
+ zone_adj_pressure(zone, priority);
continue;
+ }
}
all_zones_ok = 0;
max_scan = zone->nr_inactive >> priority;
@@ -921,7 +947,7 @@
if (i < ZONE_HIGHMEM) {
reclaim_state->reclaimed_slab = 0;
shrink_slab(max_scan + nr_mapped, GFP_KERNEL);
- to_free += reclaim_state->reclaimed_slab;
+ to_free -= reclaim_state->reclaimed_slab;
}
if (zone->all_unreclaimable)
continue;
@@ -930,7 +956,16 @@
}
if (all_zones_ok)
break;
- blk_congestion_wait(WRITE, HZ/10);
+ if (to_free > 0)
+ blk_congestion_wait(WRITE, HZ/10);
+ }
+ if (priority < 0) {
+ for (i = 0; i < pgdat->nr_zones; i++) {
+ struct zone *zone = pgdat->node_zones + i;
+
+ if (zone->free_pages < zone->pages_high)
+ zone_adj_pressure(zone, -1);
+ }
}
return nr_pages - to_free;
}
diff -Nru a/net/8021q/Makefile b/net/8021q/Makefile
--- a/net/8021q/Makefile Sun Aug 3 13:14:53 2003
+++ b/net/8021q/Makefile Sun Aug 3 13:14:53 2003
@@ -4,4 +4,9 @@
obj-$(CONFIG_VLAN_8021Q) += 8021q.o
-8021q-objs := vlan.o vlanproc.o vlan_dev.o
+8021q-objs := vlan.o vlan_dev.o
+
+ifeq ($(CONFIG_PROC_FS),y)
+8021q-objs += vlanproc.o
+endif
+
diff -Nru a/net/8021q/vlan_dev.c b/net/8021q/vlan_dev.c
--- a/net/8021q/vlan_dev.c Sun Aug 3 13:14:52 2003
+++ b/net/8021q/vlan_dev.c Sun Aug 3 13:14:52 2003
@@ -170,7 +170,7 @@
#ifdef VLAN_DEBUG
printk(VLAN_DBG "%s: dropping skb: %p because came in on wrong device, dev: %s real_dev: %s, skb_dev: %s\n",
- __FUNCTION__ skb, dev->name,
+ __FUNCTION__, skb, dev->name,
VLAN_DEV_INFO(skb->dev)->real_dev->name,
skb->dev->name);
#endif
diff -Nru a/net/8021q/vlanproc.c b/net/8021q/vlanproc.c
--- a/net/8021q/vlanproc.c Sun Aug 3 13:14:47 2003
+++ b/net/8021q/vlanproc.c Sun Aug 3 13:14:47 2003
@@ -30,6 +30,7 @@
#include <asm/uaccess.h> /* copy_to_user */
#include <asm/io.h>
#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
#include <linux/fs.h>
#include <linux/netdevice.h>
#include <linux/if_vlan.h>
@@ -38,30 +39,28 @@
/****** Function Prototypes *************************************************/
-#ifdef CONFIG_PROC_FS
-
-/* Proc filesystem interface */
-static ssize_t vlan_proc_read(struct file *file, char *buf, size_t count,
- loff_t *ppos);
-
/* Methods for preparing data for reading proc entries */
-
-static int vlan_config_get_info(char *buf, char **start, off_t offs, int len);
-static int vlandev_get_info(char *buf, char **start, off_t offs, int len);
+static int vlan_seq_show(struct seq_file *seq, void *v);
+static void *vlan_seq_start(struct seq_file *seq, loff_t *pos);
+static void *vlan_seq_next(struct seq_file *seq, void *v, loff_t *pos);
+static void vlan_seq_stop(struct seq_file *seq, void *);
+static int vlandev_seq_show(struct seq_file *seq, void *v);
/* Miscellaneous */
+#define SEQ_START_TOKEN ((void *) 1)
+
/*
* Global Data
*/
+
/*
* Names of the proc directory entries
*/
-static char name_root[] = "vlan";
-static char name_conf[] = "config";
-static char term_msg[] = "***KERNEL: Out of buffer space!***\n";
+static const char name_root[] = "vlan";
+static const char name_conf[] = "config";
/*
* Structures for interfacing with the /proc filesystem.
@@ -75,20 +74,41 @@
* Generic /proc/net/vlan/<file> file and inode operations
*/
+static struct seq_operations vlan_seq_ops = {
+ .start = vlan_seq_start,
+ .next = vlan_seq_next,
+ .stop = vlan_seq_stop,
+ .show = vlan_seq_show,
+};
+
+static int vlan_seq_open(struct inode *inode, struct file *file)
+{
+ return seq_open(file, &vlan_seq_ops);
+}
+
static struct file_operations vlan_fops = {
- .owner = THIS_MODULE,
- .read = vlan_proc_read,
- .ioctl = NULL, /* vlan_proc_ioctl */
+ .owner = THIS_MODULE,
+ .open = vlan_seq_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = seq_release,
};
/*
* /proc/net/vlan/<device> file and inode operations
*/
+static int vlandev_seq_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, vlandev_seq_show, PDE(inode)->data);
+}
+
static struct file_operations vlandev_fops = {
.owner = THIS_MODULE,
- .read = vlan_proc_read,
- .ioctl =NULL, /* vlan_proc_ioctl */
+ .open = vlandev_seq_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
};
/*
@@ -108,8 +128,12 @@
static struct proc_dir_entry *proc_vlan_conf;
/* Strings */
-static char conf_hdr[] = "VLAN Dev name | VLAN ID\n";
-
+static const char *vlan_name_type_str[VLAN_NAME_TYPE_HIGHEST] = {
+ [VLAN_NAME_TYPE_RAW_PLUS_VID] = "VLAN_NAME_TYPE_RAW_PLUS_VID",
+ [VLAN_NAME_TYPE_PLUS_VID_NO_PAD] = "VLAN_NAME_TYPE_PLUS_VID_NO_PAD",
+ [VLAN_NAME_TYPE_RAW_PLUS_VID_NO_PAD]= "VLAN_NAME_TYPE_RAW_PLUS_VID_NO_PAD",
+ [VLAN_NAME_TYPE_PLUS_VID] = "VLAN_NAME_TYPE_PLUS_VID",
+};
/*
* Interface functions
*/
@@ -144,7 +168,6 @@
proc_vlan_dir);
if (proc_vlan_conf) {
proc_vlan_conf->proc_fops = &vlan_fops;
- proc_vlan_conf->get_info = vlan_config_get_info;
return 0;
}
}
@@ -174,7 +197,6 @@
return -ENOBUFS;
dev_info->dent->proc_fops = &vlandev_fops;
- dev_info->dent->get_info = &vlandev_get_info;
dev_info->dent->data = vlandev;
#ifdef VLAN_DEBUG
@@ -215,185 +237,103 @@
/****** Proc filesystem entry points ****************************************/
/*
- * Read VLAN proc directory entry.
- * This is universal routine for reading all entries in /proc/net/vlan
- * directory. Each directory entry contains a pointer to the 'method' for
- * preparing data for that entry.
- * o verify arguments
- * o allocate kernel buffer
- * o call get_info() to prepare data
- * o copy data to user space
- * o release kernel buffer
- *
- * Return: number of bytes copied to user space (0, if no data)
- * <0 error
- */
-static ssize_t vlan_proc_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
-{
- struct inode *inode = file->f_dentry->d_inode;
- struct proc_dir_entry *dent;
- char *page;
- int pos, offs, len;
+ * The following few functions build the content of /proc/net/vlan/config
+ */
- if (count <= 0)
- return 0;
+/* starting at dev, find a VLAN device */
+struct net_device *vlan_skip(struct net_device *dev)
+{
+ while (dev && !(dev->priv_flags & IFF_802_1Q_VLAN))
+ dev = dev->next;
- dent = PDE(inode);
- if ((dent == NULL) || (dent->get_info == NULL))
- return 0;
+ return dev;
+}
- page = kmalloc(VLAN_PROC_BUFSZ, GFP_KERNEL);
- VLAN_MEM_DBG("page malloc, addr: %p size: %i\n",
- page, VLAN_PROC_BUFSZ);
+/* start read of /proc/net/vlan/config */
+static void *vlan_seq_start(struct seq_file *seq, loff_t *pos)
+{
+ struct net_device *dev;
+ loff_t i = 1;
- if (page == NULL)
- return -ENOBUFS;
+ read_lock(&dev_base_lock);
- pos = dent->get_info(page, dent->data, 0, 0);
- offs = file->f_pos;
- if (offs < pos) {
- len = min_t(int, pos - offs, count);
- if (copy_to_user(buf, (page + offs), len)) {
- kfree(page);
- return -EFAULT;
- }
+ if (*pos == 0)
+ return SEQ_START_TOKEN;
+
+ for (dev = vlan_skip(dev_base); dev && i < *pos;
+ dev = vlan_skip(dev->next), ++i);
+
+ return (i == *pos) ? dev : NULL;
+}
- file->f_pos += len;
- } else {
- len = 0;
- }
+static void *vlan_seq_next(struct seq_file *seq, void *v, loff_t *pos)
+{
+ ++*pos;
- kfree(page);
- VLAN_FMEM_DBG("page free, addr: %p\n", page);
- return len;
+ return vlan_skip((v == SEQ_START_TOKEN)
+ ? dev_base
+ : ((struct net_device *)v)->next);
}
-/*
- * The following few functions build the content of /proc/net/vlan/config
- */
+static void vlan_seq_stop(struct seq_file *seq, void *v)
+{
+ read_unlock(&dev_base_lock);
+}
-static int vlan_proc_get_vlan_info(char* buf, unsigned int cnt)
+static int vlan_seq_show(struct seq_file *seq, void *v)
{
- struct net_device *vlandev = NULL;
- struct vlan_group *grp = NULL;
- int h, i;
- char *nm_type = NULL;
- struct vlan_dev_info *dev_info = NULL;
+ if (v == SEQ_START_TOKEN) {
+ const char *nmtype = NULL;
-#ifdef VLAN_DEBUG
- printk(VLAN_DBG __FUNCTION__ ": cnt == %i\n", cnt);
-#endif
+ seq_puts(seq, "VLAN Dev name | VLAN ID\n");
- if (vlan_name_type == VLAN_NAME_TYPE_RAW_PLUS_VID) {
- nm_type = "VLAN_NAME_TYPE_RAW_PLUS_VID";
- } else if (vlan_name_type == VLAN_NAME_TYPE_PLUS_VID_NO_PAD) {
- nm_type = "VLAN_NAME_TYPE_PLUS_VID_NO_PAD";
- } else if (vlan_name_type == VLAN_NAME_TYPE_RAW_PLUS_VID_NO_PAD) {
- nm_type = "VLAN_NAME_TYPE_RAW_PLUS_VID_NO_PAD";
- } else if (vlan_name_type == VLAN_NAME_TYPE_PLUS_VID) {
- nm_type = "VLAN_NAME_TYPE_PLUS_VID";
- } else {
- nm_type = "UNKNOWN";
- }
+ if (vlan_name_type < ARRAY_SIZE(vlan_name_type_str))
+ nmtype = vlan_name_type_str[vlan_name_type];
- cnt += sprintf(buf + cnt, "Name-Type: %s\n", nm_type);
+ seq_printf(seq, "Name-Type: %s\n",
+ nmtype ? nmtype : "UNKNOWN" );
+ } else {
+ const struct net_device *vlandev = v;
+ const struct vlan_dev_info *dev_info = VLAN_DEV_INFO(vlandev);
- spin_lock_bh(&vlan_group_lock);
- for (h = 0; h < VLAN_GRP_HASH_SIZE; h++) {
- for (grp = vlan_group_hash[h]; grp != NULL; grp = grp->next) {
- for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
- vlandev = grp->vlan_devices[i];
- if (!vlandev)
- continue;
-
- if ((cnt + 100) > VLAN_PROC_BUFSZ) {
- if ((cnt+strlen(term_msg)) < VLAN_PROC_BUFSZ)
- cnt += sprintf(buf+cnt, "%s", term_msg);
-
- goto out;
- }
-
- dev_info = VLAN_DEV_INFO(vlandev);
- cnt += sprintf(buf + cnt, "%-15s| %d | %s\n",
- vlandev->name,
- dev_info->vlan_id,
- dev_info->real_dev->name);
- }
- }
+ seq_printf(seq, "%-15s| %d | %s\n", vlandev->name,
+ dev_info->vlan_id, dev_info->real_dev->name);
}
-out:
- spin_unlock_bh(&vlan_group_lock);
-
- return cnt;
-}
-
-/*
- * Prepare data for reading 'Config' entry.
- * Return length of data.
- */
-
-static int vlan_config_get_info(char *buf, char **start,
- off_t offs, int len)
-{
- strcpy(buf, conf_hdr);
- return vlan_proc_get_vlan_info(buf, (unsigned int)(strlen(conf_hdr)));
+ return 0;
}
-/*
- * Prepare data for reading <device> entry.
- * Return length of data.
- *
- * On entry, the 'start' argument will contain a pointer to VLAN device
- * data space.
- */
-
-static int vlandev_get_info(char *buf, char **start,
- off_t offs, int len)
+static int vlandev_seq_show(struct seq_file *seq, void *offset)
{
- struct net_device *vlandev = (void *) start;
- struct net_device_stats *stats = NULL;
- struct vlan_dev_info *dev_info = NULL;
- struct vlan_priority_tci_mapping *mp;
- int cnt = 0;
+ struct net_device *vlandev = (struct net_device *) seq->private;
+ const struct vlan_dev_info *dev_info = VLAN_DEV_INFO(vlandev);
+ struct net_device_stats *stats;
+ static const char *fmt = "%30s %12lu\n";
int i;
if ((vlandev == NULL) || (!(vlandev->priv_flags & IFF_802_1Q_VLAN)))
return 0;
- dev_info = VLAN_DEV_INFO(vlandev);
-
- cnt += sprintf(buf + cnt, "%s VID: %d REORDER_HDR: %i dev->priv_flags: %hx\n",
+ seq_printf(seq, "%s VID: %d REORDER_HDR: %i dev->priv_flags: %hx\n",
vlandev->name, dev_info->vlan_id,
(int)(dev_info->flags & 1), vlandev->priv_flags);
- stats = vlan_dev_get_stats(vlandev);
-
- cnt += sprintf(buf + cnt, "%30s: %12lu\n",
- "total frames received", stats->rx_packets);
-
- cnt += sprintf(buf + cnt, "%30s: %12lu\n",
- "total bytes received", stats->rx_bytes);
-
- cnt += sprintf(buf + cnt, "%30s: %12lu\n",
- "Broadcast/Multicast Rcvd", stats->multicast);
- cnt += sprintf(buf + cnt, "\n%30s: %12lu\n",
- "total frames transmitted", stats->tx_packets);
-
- cnt += sprintf(buf + cnt, "%30s: %12lu\n",
- "total bytes transmitted", stats->tx_bytes);
-
- cnt += sprintf(buf + cnt, "%30s: %12lu\n",
- "total headroom inc", dev_info->cnt_inc_headroom_on_tx);
-
- cnt += sprintf(buf + cnt, "%30s: %12lu\n",
- "total encap on xmit", dev_info->cnt_encap_on_xmit);
-
- cnt += sprintf(buf + cnt, "Device: %s", dev_info->real_dev->name);
+ stats = vlan_dev_get_stats(vlandev);
+ seq_printf(seq, fmt, "total frames received", stats->rx_packets);
+ seq_printf(seq, fmt, "total bytes received", stats->rx_bytes);
+ seq_printf(seq, fmt, "Broadcast/Multicast Rcvd", stats->multicast);
+ seq_puts(seq, "\n");
+ seq_printf(seq, fmt, "total frames transmitted", stats->tx_packets);
+ seq_printf(seq, fmt, "total bytes transmitted", stats->tx_bytes);
+ seq_printf(seq, fmt, "total headroom inc",
+ dev_info->cnt_inc_headroom_on_tx);
+ seq_printf(seq, fmt, "total encap on xmit",
+ dev_info->cnt_encap_on_xmit);
+ seq_printf(seq, "Device: %s", dev_info->real_dev->name);
/* now show all PRIORITY mappings relating to this VLAN */
- cnt += sprintf(buf + cnt, "\nINGRESS priority mappings: 0:%lu 1:%lu 2:%lu 3:%lu 4:%lu 5:%lu 6:%lu 7:%lu\n",
+ seq_printf(seq,
+ "\nINGRESS priority mappings: 0:%lu 1:%lu 2:%lu 3:%lu 4:%lu 5:%lu 6:%lu 7:%lu\n",
dev_info->ingress_priority_map[0],
dev_info->ingress_priority_map[1],
dev_info->ingress_priority_map[2],
@@ -403,67 +343,17 @@
dev_info->ingress_priority_map[6],
dev_info->ingress_priority_map[7]);
- if ((cnt + 100) > VLAN_PROC_BUFSZ) {
- if ((cnt + strlen(term_msg)) >= VLAN_PROC_BUFSZ) {
- /* should never get here */
- return cnt;
- } else {
- cnt += sprintf(buf + cnt, "%s", term_msg);
- return cnt;
- }
- }
-
- cnt += sprintf(buf + cnt, "EGRESSS priority Mappings: ");
-
+ seq_printf(seq, "EGRESSS priority Mappings: ");
for (i = 0; i < 16; i++) {
- mp = dev_info->egress_priority_map[i];
+ const struct vlan_priority_tci_mapping *mp
+ = dev_info->egress_priority_map[i];
while (mp) {
- cnt += sprintf(buf + cnt, "%lu:%hu ",
- mp->priority, ((mp->vlan_qos >> 13) & 0x7));
-
- if ((cnt + 100) > VLAN_PROC_BUFSZ) {
- if ((cnt + strlen(term_msg)) >= VLAN_PROC_BUFSZ) {
- /* should never get here */
- return cnt;
- } else {
- cnt += sprintf(buf + cnt, "%s", term_msg);
- return cnt;
- }
- }
+ seq_printf(seq, "%lu:%hu ",
+ mp->priority, ((mp->vlan_qos >> 13) & 0x7));
mp = mp->next;
}
}
+ seq_puts(seq, "\n");
- cnt += sprintf(buf + cnt, "\n");
-
- return cnt;
-}
-
-#else /* No CONFIG_PROC_FS */
-
-/*
- * No /proc - output stubs
- */
-
-int __init vlan_proc_init (void)
-{
return 0;
}
-
-void vlan_proc_cleanup(void)
-{
- return;
-}
-
-
-int vlan_proc_add_dev(struct net_device *vlandev)
-{
- return 0;
-}
-
-int vlan_proc_rem_dev(struct net_device *vlandev)
-{
- return 0;
-}
-
-#endif /* No CONFIG_PROC_FS */
diff -Nru a/net/8021q/vlanproc.h b/net/8021q/vlanproc.h
--- a/net/8021q/vlanproc.h Sun Aug 3 13:14:53 2003
+++ b/net/8021q/vlanproc.h Sun Aug 3 13:14:53 2003
@@ -1,12 +1,19 @@
#ifndef __BEN_VLAN_PROC_INC__
#define __BEN_VLAN_PROC_INC__
+#ifdef CONFIG_PROC_FS
int vlan_proc_init(void);
-
int vlan_proc_rem_dev(struct net_device *vlandev);
int vlan_proc_add_dev (struct net_device *vlandev);
void vlan_proc_cleanup (void);
-#define VLAN_PROC_BUFSZ (4096) /* buffer size for printing proc info */
+#else /* No CONFIG_PROC_FS */
+
+#define vlan_proc_init() (0)
+#define vlan_proc_cleanup() do {} while(0)
+#define vlan_proc_add_dev(dev) ((void)(dev), 0)
+#define vlan_proc_rem_dev(dev) ((void)(dev), 0)
+
+#endif
#endif /* !(__BEN_VLAN_PROC_INC__) */
diff -Nru a/net/Kconfig b/net/Kconfig
--- a/net/Kconfig Sun Aug 3 13:14:45 2003
+++ b/net/Kconfig Sun Aug 3 13:14:45 2003
@@ -58,66 +58,6 @@
the real netlink socket.
This is a backward compatibility option, choose Y for now.
-config NETFILTER
- bool "Network packet filtering (replaces ipchains)"
- ---help---
- Netfilter is a framework for filtering and mangling network packets
- that pass through your Linux box.
-
- The most common use of packet filtering is to run your Linux box as
- a firewall protecting a local network from the Internet. The type of
- firewall provided by this kernel support is called a "packet
- filter", which means that it can reject individual network packets
- based on type, source, destination etc. The other kind of firewall,
- a "proxy-based" one, is more secure but more intrusive and more
- bothersome to set up; it inspects the network traffic much more
- closely, modifies it and has knowledge about the higher level
- protocols, which a packet filter lacks. Moreover, proxy-based
- firewalls often require changes to the programs running on the local
- clients. Proxy-based firewalls don't need support by the kernel, but
- they are often combined with a packet filter, which only works if
- you say Y here.
-
- You should also say Y here if you intend to use your Linux box as
- the gateway to the Internet for a local network of machines without
- globally valid IP addresses. This is called "masquerading": if one
- of the computers on your local network wants to send something to
- the outside, your box can "masquerade" as that computer, i.e. it
- forwards the traffic to the intended outside destination, but
- modifies the packets to make it look like they came from the
- firewall box itself. It works both ways: if the outside host
- replies, the Linux box will silently forward the traffic to the
- correct local computer. This way, the computers on your local net
- are completely invisible to the outside world, even though they can
- reach the outside and can receive replies. It is even possible to
- run globally visible servers from within a masqueraded local network
- using a mechanism called portforwarding. Masquerading is also often
- called NAT (Network Address Translation).
-
- Another use of Netfilter is in transparent proxying: if a machine on
- the local network tries to connect to an outside host, your Linux
- box can transparently forward the traffic to a local server,
- typically a caching proxy server.
-
- Various modules exist for netfilter which replace the previous
- masquerading (ipmasqadm), packet filtering (ipchains), transparent
- proxying, and portforwarding mechanisms. Please see
- <file:Documentation/Changes> under "iptables" for the location of
- these packages.
-
- Make sure to say N to "Fast switching" below if you intend to say Y
- here, as Fast switching currently bypasses netfilter.
-
- Chances are that you should say Y here if you compile a kernel which
- will run as a router and N for regular hosts. If unsure, say N.
-
-config NETFILTER_DEBUG
- bool "Network packet filtering debugging"
- depends on NETFILTER
- help
- You can say Y here if you want to get additional messages useful in
- debugging the netfilter code.
-
config UNIX
tristate "Unix domain sockets"
---help---
@@ -208,6 +148,129 @@
source "net/ipv6/Kconfig"
+config DECNET
+ tristate "DECnet Support"
+ ---help---
+ The DECnet networking protocol was used in many products made by
+ Digital (now Compaq). It provides reliable stream and sequenced
+ packet communications over which run a variety of services similar
+ to those which run over TCP/IP.
+
+ To find some tools to use with the kernel layer support, please
+ look at Patrick Caulfield's web site:
+ <http://linux.dreamtime.org/decnet/>.
+
+ More detailed documentation is available in
+ <file:Documentation/networking/decnet.txt>.
+
+ Be sure to say Y to "/proc file system support" and "Sysctl support"
+ below when using DECnet, since you will need sysctl support to aid
+ in configuration at run time.
+
+ The DECnet code is also available as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want).
+ The module is called decnet.
+
+source "net/decnet/Kconfig"
+
+config BRIDGE
+ tristate "802.1d Ethernet Bridging"
+ depends on INET
+ ---help---
+ If you say Y here, then your Linux box will be able to act as an
+ Ethernet bridge, which means that the different Ethernet segments it
+ is connected to will appear as one Ethernet to the participants.
+ Several such bridges can work together to create even larger
+ networks of Ethernets using the IEEE 802.1 spanning tree algorithm.
+ As this is a standard, Linux bridges will cooperate properly with
+ other third party bridge products.
+
+ In order to use the Ethernet bridge, you'll need the bridge
+ configuration tools; see <file:Documentation/networking/bridge.txt>
+ for location. Please read the Bridge mini-HOWTO for more
+ information.
+
+ If you enable iptables support along with the bridge support then you
+ turn your bridge into a bridging firewall.
+ iptables will then see the IP packets being bridged, so you need to
+ take this into account when setting up your firewall rules.
+
+ If you want to compile this code as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want),
+ say M here and read <file:Documentation/modules.txt>. The module
+ will be called bridge.
+
+ If unsure, say N.
+
+menuconfig NETFILTER
+ bool "Network packet filtering (replaces ipchains)"
+ ---help---
+ Netfilter is a framework for filtering and mangling network packets
+ that pass through your Linux box.
+
+ The most common use of packet filtering is to run your Linux box as
+ a firewall protecting a local network from the Internet. The type of
+ firewall provided by this kernel support is called a "packet
+ filter", which means that it can reject individual network packets
+ based on type, source, destination etc. The other kind of firewall,
+ a "proxy-based" one, is more secure but more intrusive and more
+ bothersome to set up; it inspects the network traffic much more
+ closely, modifies it and has knowledge about the higher level
+ protocols, which a packet filter lacks. Moreover, proxy-based
+ firewalls often require changes to the programs running on the local
+ clients. Proxy-based firewalls don't need support by the kernel, but
+ they are often combined with a packet filter, which only works if
+ you say Y here.
+
+ You should also say Y here if you intend to use your Linux box as
+ the gateway to the Internet for a local network of machines without
+ globally valid IP addresses. This is called "masquerading": if one
+ of the computers on your local network wants to send something to
+ the outside, your box can "masquerade" as that computer, i.e. it
+ forwards the traffic to the intended outside destination, but
+ modifies the packets to make it look like they came from the
+ firewall box itself. It works both ways: if the outside host
+ replies, the Linux box will silently forward the traffic to the
+ correct local computer. This way, the computers on your local net
+ are completely invisible to the outside world, even though they can
+ reach the outside and can receive replies. It is even possible to
+ run globally visible servers from within a masqueraded local network
+ using a mechanism called portforwarding. Masquerading is also often
+ called NAT (Network Address Translation).
+
+ Another use of Netfilter is in transparent proxying: if a machine on
+ the local network tries to connect to an outside host, your Linux
+ box can transparently forward the traffic to a local server,
+ typically a caching proxy server.
+
+ Various modules exist for netfilter which replace the previous
+ masquerading (ipmasqadm), packet filtering (ipchains), transparent
+ proxying, and portforwarding mechanisms. Please see
+ <file:Documentation/Changes> under "iptables" for the location of
+ these packages.
+
+ Make sure to say N to "Fast switching" below if you intend to say Y
+ here, as Fast switching currently bypasses netfilter.
+
+ Chances are that you should say Y here if you compile a kernel which
+ will run as a router and N for regular hosts. If unsure, say N.
+
+if NETFILTER
+
+config NETFILTER_DEBUG
+ bool "Network packet filtering debugging"
+ depends on NETFILTER
+ help
+ You can say Y here if you want to get additional messages useful in
+ debugging the netfilter code.
+
+source "net/ipv4/netfilter/Kconfig"
+source "net/ipv6/netfilter/Kconfig"
+source "net/decnet/netfilter/Kconfig"
+source "net/bridge/netfilter/Kconfig"
+
+endif
+
source "net/xfrm/Kconfig"
source "net/sctp/Kconfig"
@@ -369,62 +432,6 @@
are allowed to say Y here.
source "drivers/net/appletalk/Kconfig"
-
-config DECNET
- tristate "DECnet Support"
- ---help---
- The DECnet networking protocol was used in many products made by
- Digital (now Compaq). It provides reliable stream and sequenced
- packet communications over which run a variety of services similar
- to those which run over TCP/IP.
-
- To find some tools to use with the kernel layer support, please
- look at Patrick Caulfield's web site:
- <http://linux.dreamtime.org/decnet/>.
-
- More detailed documentation is available in
- <file:Documentation/networking/decnet.txt>.
-
- Be sure to say Y to "/proc file system support" and "Sysctl support"
- below when using DECnet, since you will need sysctl support to aid
- in configuration at run time.
-
- The DECnet code is also available as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want).
- The module is called decnet.
-
-source "net/decnet/Kconfig"
-
-config BRIDGE
- tristate "802.1d Ethernet Bridging"
- depends on INET
- ---help---
- If you say Y here, then your Linux box will be able to act as an
- Ethernet bridge, which means that the different Ethernet segments it
- is connected to will appear as one Ethernet to the participants.
- Several such bridges can work together to create even larger
- networks of Ethernets using the IEEE 802.1 spanning tree algorithm.
- As this is a standard, Linux bridges will cooperate properly with
- other third party bridge products.
-
- In order to use the Ethernet bridge, you'll need the bridge
- configuration tools; see <file:Documentation/networking/bridge.txt>
- for location. Please read the Bridge mini-HOWTO for more
- information.
-
- If you enable iptables support along with the bridge support then you
- turn your bridge into a bridging firewall.
- iptables will then see the IP packets being bridged, so you need to
- take this into account when setting up your firewall rules.
-
- If you want to compile this code as a module ( = code which can be
- inserted in and removed from the running kernel whenever you want),
- say M here and read <file:Documentation/modules.txt>. The module
- will be called bridge.
-
- If unsure, say N.
-
-source "net/bridge/netfilter/Kconfig"
config X25
tristate "CCITT X.25 Packet Layer (EXPERIMENTAL)"
diff -Nru a/net/atm/Makefile b/net/atm/Makefile
--- a/net/atm/Makefile Sun Aug 3 13:14:45 2003
+++ b/net/atm/Makefile Sun Aug 3 13:14:45 2003
@@ -10,7 +10,7 @@
atm-$(subst m,y,$(CONFIG_ATM_CLIP)) += ipcommon.o
obj-$(CONFIG_ATM_BR2684) += br2684.o
atm-$(subst m,y,$(CONFIG_ATM_BR2684)) += ipcommon.o
-atm-$(subst m,y,$CONFIG_NET_SCH_ATM)) += ipcommon.o
+atm-$(subst m,y,$(CONFIG_NET_SCH_ATM)) += ipcommon.o
atm-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_ATM_LANE) += lec.o
diff -Nru a/net/atm/atm_misc.c b/net/atm/atm_misc.c
--- a/net/atm/atm_misc.c Sun Aug 3 13:14:46 2003
+++ b/net/atm/atm_misc.c Sun Aug 3 13:14:46 2003
@@ -71,8 +71,8 @@
int atm_find_ci(struct atm_vcc *vcc,short *vpi,int *vci)
{
- static short p = 0; /* poor man's per-device cache */
- static int c = 0;
+ static short p; /* poor man's per-device cache */
+ static int c;
short old_p;
int old_c;
int err;
diff -Nru a/net/atm/mpc.c b/net/atm/mpc.c
--- a/net/atm/mpc.c Sun Aug 3 13:14:51 2003
+++ b/net/atm/mpc.c Sun Aug 3 13:14:51 2003
@@ -1379,8 +1379,8 @@
static void mpc_cache_check( unsigned long checking_time )
{
struct mpoa_client *mpc = mpcs;
- static unsigned long previous_resolving_check_time = 0;
- static unsigned long previous_refresh_time = 0;
+ static unsigned long previous_resolving_check_time;
+ static unsigned long previous_refresh_time;
while( mpc != NULL ){
mpc->in_ops->clear_count(mpc);
diff -Nru a/net/atm/signaling.c b/net/atm/signaling.c
--- a/net/atm/signaling.c Sun Aug 3 13:14:51 2003
+++ b/net/atm/signaling.c Sun Aug 3 13:14:51 2003
@@ -39,7 +39,7 @@
static void sigd_put_skb(struct sk_buff *skb)
{
#ifdef WAIT_FOR_DEMON
- static unsigned long silence = 0;
+ static unsigned long silence;
DECLARE_WAITQUEUE(wait,current);
add_wait_queue(&sigd_sleep,&wait);
diff -Nru a/net/ax25/af_ax25.c b/net/ax25/af_ax25.c
--- a/net/ax25/af_ax25.c Sun Aug 3 13:14:52 2003
+++ b/net/ax25/af_ax25.c Sun Aug 3 13:14:52 2003
@@ -1779,7 +1779,7 @@
/* old structure? */
if (cmd == SIOCAX25GETINFOOLD) {
- static int warned = 0;
+ static int warned;
if (!warned) {
printk(KERN_INFO "%s uses old SIOCAX25GETINFO\n",
current->comm);
diff -Nru a/net/ax25/sysctl_net_ax25.c b/net/ax25/sysctl_net_ax25.c
--- a/net/ax25/sysctl_net_ax25.c Sun Aug 3 13:14:52 2003
+++ b/net/ax25/sysctl_net_ax25.c Sun Aug 3 13:14:52 2003
@@ -12,20 +12,20 @@
#include <linux/spinlock.h>
#include <net/ax25.h>
-static int min_ipdefmode[] = {0}, max_ipdefmode[] = {1};
-static int min_axdefmode[] = {0}, max_axdefmode[] = {1};
-static int min_backoff[] = {0}, max_backoff[] = {2};
-static int min_conmode[] = {0}, max_conmode[] = {2};
+static int min_ipdefmode[1], max_ipdefmode[] = {1};
+static int min_axdefmode[1], max_axdefmode[] = {1};
+static int min_backoff[1], max_backoff[] = {2};
+static int min_conmode[1], max_conmode[] = {2};
static int min_window[] = {1}, max_window[] = {7};
static int min_ewindow[] = {1}, max_ewindow[] = {63};
static int min_t1[] = {1}, max_t1[] = {30 * HZ};
static int min_t2[] = {1}, max_t2[] = {20 * HZ};
-static int min_t3[] = {0}, max_t3[] = {3600 * HZ};
-static int min_idle[] = {0}, max_idle[] = {65535 * HZ};
+static int min_t3[1], max_t3[] = {3600 * HZ};
+static int min_idle[1], max_idle[] = {65535 * HZ};
static int min_n2[] = {1}, max_n2[] = {31};
static int min_paclen[] = {1}, max_paclen[] = {512};
-static int min_proto[] = {0}, max_proto[] = {3};
-static int min_ds_timeout[] = {0}, max_ds_timeout[] = {65535 * HZ};
+static int min_proto[1], max_proto[] = {3};
+static int min_ds_timeout[1], max_ds_timeout[] = {65535 * HZ};
static struct ctl_table_header *ax25_table_header;
diff -Nru a/net/bridge/br_netfilter.c b/net/bridge/br_netfilter.c
--- a/net/bridge/br_netfilter.c Sun Aug 3 13:14:52 2003
+++ b/net/bridge/br_netfilter.c Sun Aug 3 13:14:52 2003
@@ -70,7 +70,7 @@
/* PF_BRIDGE/PRE_ROUTING *********************************************/
static void __br_dnat_complain(void)
{
- static unsigned long last_complaint = 0;
+ static unsigned long last_complaint;
if (jiffies - last_complaint >= 5 * HZ) {
printk(KERN_WARNING "Performing cross-bridge DNAT requires IP "
diff -Nru a/net/bridge/br_notify.c b/net/bridge/br_notify.c
--- a/net/bridge/br_notify.c Sun Aug 3 13:14:44 2003
+++ b/net/bridge/br_notify.c Sun Aug 3 13:14:44 2003
@@ -43,15 +43,18 @@
{
case NETDEV_CHANGEADDR:
br_fdb_changeaddr(p, dev->dev_addr);
- br_stp_recalculate_bridge_id(br);
+ if (br->dev->flags & IFF_UP)
+ br_stp_recalculate_bridge_id(br);
break;
case NETDEV_DOWN:
- br_stp_disable_port(p);
+ if (br->dev->flags & IFF_UP)
+ br_stp_disable_port(p);
break;
case NETDEV_UP:
- br_stp_enable_port(p);
+ if (br->dev->flags & IFF_UP)
+ br_stp_enable_port(p);
break;
case NETDEV_UNREGISTER:
diff -Nru a/net/bridge/br_stp_if.c b/net/bridge/br_stp_if.c
--- a/net/bridge/br_stp_if.c Sun Aug 3 13:14:52 2003
+++ b/net/bridge/br_stp_if.c Sun Aug 3 13:14:52 2003
@@ -138,7 +138,7 @@
br_become_root_bridge(br);
}
-static unsigned char br_mac_zero[6] = {0,0,0,0,0,0};
+static unsigned char br_mac_zero[6];
/* called under bridge lock */
void br_stp_recalculate_bridge_id(struct net_bridge *br)
diff -Nru a/net/core/dev.c b/net/core/dev.c
--- a/net/core/dev.c Sun Aug 3 13:14:48 2003
+++ b/net/core/dev.c Sun Aug 3 13:14:48 2003
@@ -1657,6 +1657,7 @@
*budget -= work;
list_del(&backlog_dev->poll_list);
+ smp_mb__before_clear_bit();
clear_bit(__LINK_STATE_RX_SCHED, &backlog_dev->state);
if (queue->throttle) {
diff -Nru a/net/core/netfilter.c b/net/core/netfilter.c
--- a/net/core/netfilter.c Sun Aug 3 13:14:48 2003
+++ b/net/core/netfilter.c Sun Aug 3 13:14:48 2003
@@ -557,6 +557,18 @@
rcu_read_lock();
+ /* Release those devices we held, or Alexey will kill me. */
+ if (info->indev) dev_put(info->indev);
+ if (info->outdev) dev_put(info->outdev);
+#if defined(CONFIG_BRIDGE) || defined(CONFIG_BRIDGE_MODULE)
+ if (skb->nf_bridge) {
+ if (skb->nf_bridge->physindev)
+ dev_put(skb->nf_bridge->physindev);
+ if (skb->nf_bridge->physoutdev)
+ dev_put(skb->nf_bridge->physoutdev);
+ }
+#endif
+
/* Drop reference to owner of hook which queued us. */
module_put(info->elem->owner);
@@ -598,19 +610,6 @@
break;
}
rcu_read_unlock();
-
- /* Release those devices we held, or Alexey will kill me. */
- if (info->indev) dev_put(info->indev);
- if (info->outdev) dev_put(info->outdev);
-#if defined(CONFIG_BRIDGE) || defined(CONFIG_BRIDGE_MODULE)
- if (skb->nf_bridge) {
- if (skb->nf_bridge->physindev)
- dev_put(skb->nf_bridge->physindev);
- if (skb->nf_bridge->physoutdev)
- dev_put(skb->nf_bridge->physoutdev);
- }
-#endif
-
if (verdict == NF_DROP)
kfree_skb(skb);
diff -Nru a/net/decnet/Kconfig b/net/decnet/Kconfig
--- a/net/decnet/Kconfig Sun Aug 3 13:14:53 2003
+++ b/net/decnet/Kconfig Sun Aug 3 13:14:53 2003
@@ -35,5 +35,3 @@
packets with different FWMARK ("firewalling mark") values
(see ipchains(8), "-m" argument).
-source "net/decnet/netfilter/Kconfig"
-
diff -Nru a/net/decnet/dn_dev.c b/net/decnet/dn_dev.c
--- a/net/decnet/dn_dev.c Sun Aug 3 13:14:47 2003
+++ b/net/decnet/dn_dev.c Sun Aug 3 13:14:47 2003
@@ -1472,7 +1472,7 @@
};
#ifdef MODULE
-static int addr[2] = {0, 0};
+static int addr[2];
MODULE_PARM(addr, "2i");
MODULE_PARM_DESC(addr, "The DECnet address of this machine: area,node");
diff -Nru a/net/ipv4/Kconfig b/net/ipv4/Kconfig
--- a/net/ipv4/Kconfig Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/Kconfig Sun Aug 3 13:14:51 2003
@@ -374,6 +374,5 @@
If unsure, say Y.
-source "net/ipv4/netfilter/Kconfig"
source "net/ipv4/ipvs/Kconfig"
diff -Nru a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c
--- a/net/ipv4/af_inet.c Sun Aug 3 13:14:45 2003
+++ b/net/ipv4/af_inet.c Sun Aug 3 13:14:45 2003
@@ -1023,7 +1023,7 @@
out_illegal:
printk(KERN_ERR
- "Ignoring attempt to register illegal socket type %d.\n",
+ "Ignoring attempt to register invalid socket type %d.\n",
p->type);
goto out;
}
diff -Nru a/net/ipv4/ah4.c b/net/ipv4/ah4.c
--- a/net/ipv4/ah4.c Sun Aug 3 13:14:52 2003
+++ b/net/ipv4/ah4.c Sun Aug 3 13:14:52 2003
@@ -1,5 +1,6 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
#include <net/ah.h>
@@ -123,6 +124,8 @@
top_iph->tos = iph->tos;
top_iph->ttl = iph->ttl;
if (x->props.mode) {
+ if (x->props.flags & XFRM_STATE_NOECN)
+ IP_ECN_clear(top_iph);
top_iph->frag_off = iph->frag_off&~htons(IP_MF|IP_OFFSET);
memset(&(IPCB(skb)->opt), 0, sizeof(struct ip_options));
} else {
diff -Nru a/net/ipv4/esp4.c b/net/ipv4/esp4.c
--- a/net/ipv4/esp4.c Sun Aug 3 13:14:49 2003
+++ b/net/ipv4/esp4.c Sun Aug 3 13:14:49 2003
@@ -1,5 +1,6 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
#include <net/esp.h>
@@ -109,6 +110,8 @@
top_iph->ihl = 5;
top_iph->version = 4;
top_iph->tos = iph->tos; /* DS disclosed */
+ if (x->props.flags & XFRM_STATE_NOECN)
+ IP_ECN_clear(top_iph);
top_iph->tot_len = htons(skb->len + alen);
top_iph->frag_off = iph->frag_off&htons(IP_DF);
if (!(top_iph->frag_off))
diff -Nru a/net/ipv4/ipcomp.c b/net/ipv4/ipcomp.c
--- a/net/ipv4/ipcomp.c Sun Aug 3 13:14:52 2003
+++ b/net/ipv4/ipcomp.c Sun Aug 3 13:14:52 2003
@@ -18,6 +18,7 @@
#include <asm/scatterlist.h>
#include <linux/crypto.h>
#include <linux/pfkeyv2.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
#include <net/icmp.h>
@@ -210,6 +211,8 @@
top_iph = (struct iphdr *)skb_push(skb, sizeof(struct ip_comp_hdr));
memcpy(top_iph, &tmp_iph, iph->ihl * 4);
iph = top_iph;
+ if (x->props.mode && (x->props.flags & XFRM_STATE_NOECN))
+ IP_ECN_clear(iph);
iph->tot_len = htons(skb->len);
iph->protocol = IPPROTO_COMP;
iph->check = 0;
diff -Nru a/net/ipv4/ipmr.c b/net/ipv4/ipmr.c
--- a/net/ipv4/ipmr.c Sun Aug 3 13:14:48 2003
+++ b/net/ipv4/ipmr.c Sun Aug 3 13:14:48 2003
@@ -1100,6 +1100,7 @@
skb->h.ipiph = skb->nh.iph;
skb->nh.iph = iph;
+ memset(&(IPCB(skb)->opt), 0, sizeof(IPCB(skb)->opt));
#ifdef CONFIG_NETFILTER
nf_conntrack_put(skb->nfct);
skb->nfct = NULL;
@@ -1108,12 +1109,14 @@
static inline int ipmr_forward_finish(struct sk_buff *skb)
{
- struct dst_entry *dst = skb->dst;
+ struct ip_options * opt = &(IPCB(skb)->opt);
- if (skb->len <= dst_pmtu(dst))
- return dst_output(skb);
- else
- return ip_fragment(skb, dst_output);
+ IP_INC_STATS_BH(IpForwDatagrams);
+
+ if (unlikely(opt->optlen))
+ ip_forward_options(skb);
+
+ return dst_output(skb);
}
/*
diff -Nru a/net/ipv4/ipvs/Kconfig b/net/ipv4/ipvs/Kconfig
--- a/net/ipv4/ipvs/Kconfig Sun Aug 3 13:14:46 2003
+++ b/net/ipv4/ipvs/Kconfig Sun Aug 3 13:14:46 2003
@@ -11,7 +11,7 @@
IP Virtual Server support will let you build a high-performance
virtual server based on cluster of two or more real servers. This
option must be enabled for at least one of the clustered computers
- that will take care of intercepting incomming connections to a
+ that will take care of intercepting incoming connections to a
single IP address and scheduling them to real servers.
Three request dispatching techniques are implemented, they are
diff -Nru a/net/ipv4/ipvs/ip_vs_ctl.c b/net/ipv4/ipvs/ip_vs_ctl.c
--- a/net/ipv4/ipvs/ip_vs_ctl.c Sun Aug 3 13:14:52 2003
+++ b/net/ipv4/ipvs/ip_vs_ctl.c Sun Aug 3 13:14:52 2003
@@ -790,6 +790,12 @@
return -ERANGE;
}
+ if (udest->l_threshold > udest->u_threshold) {
+ IP_VS_ERR("ip_vs_add_dest(): lower threshold is higher than "
+ "upper threshold\n");
+ return -ERANGE;
+ }
+
/*
* Check if the dest already exists in the list
*/
@@ -885,7 +891,13 @@
EnterFunction(2);
if (udest->weight < 0) {
- IP_VS_ERR("ip_vs_add_dest(): server weight less than zero\n");
+ IP_VS_ERR("ip_vs_edit_dest(): server weight less than zero\n");
+ return -ERANGE;
+ }
+
+ if (udest->l_threshold > udest->u_threshold) {
+ IP_VS_ERR("ip_vs_edit_dest(): lower threshold is higher than "
+ "upper threshold\n");
return -ERANGE;
}
diff -Nru a/net/ipv4/ipvs/ip_vs_est.c b/net/ipv4/ipvs/ip_vs_est.c
--- a/net/ipv4/ipvs/ip_vs_est.c Sun Aug 3 13:14:44 2003
+++ b/net/ipv4/ipvs/ip_vs_est.c Sun Aug 3 13:14:44 2003
@@ -77,6 +77,8 @@
read_lock(&est_lock);
for (e = est_list; e; e = e->next) {
s = e->stats;
+
+ spin_lock(&s->lock);
n_conns = s->conns;
n_inpkts = s->inpkts;
n_outpkts = s->outpkts;
@@ -108,6 +110,7 @@
e->last_outbytes = n_outbytes;
e->outbps += ((long)rate - (long)e->outbps)>>2;
s->outbps = (e->outbps+0xF)>>5;
+ spin_unlock(&s->lock);
}
read_unlock(&est_lock);
mod_timer(&est_timer, jiffies + 2*HZ);
diff -Nru a/net/ipv4/netfilter/arp_tables.c b/net/ipv4/netfilter/arp_tables.c
--- a/net/ipv4/netfilter/arp_tables.c Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/netfilter/arp_tables.c Sun Aug 3 13:14:51 2003
@@ -246,7 +246,7 @@
struct arpt_table *table,
void *userdata)
{
- static const char nulldevname[IFNAMSIZ] = { 0 };
+ static const char nulldevname[IFNAMSIZ];
unsigned int verdict = NF_DROP;
struct arphdr *arp;
int hotdrop = 0;
diff -Nru a/net/ipv4/netfilter/ip_conntrack_core.c b/net/ipv4/netfilter/ip_conntrack_core.c
--- a/net/ipv4/netfilter/ip_conntrack_core.c Sun Aug 3 13:14:44 2003
+++ b/net/ipv4/netfilter/ip_conntrack_core.c Sun Aug 3 13:14:44 2003
@@ -60,7 +60,7 @@
LIST_HEAD(protocol_list);
static LIST_HEAD(helpers);
unsigned int ip_conntrack_htable_size = 0;
-static int ip_conntrack_max = 0;
+static int ip_conntrack_max;
static atomic_t ip_conntrack_count = ATOMIC_INIT(0);
struct list_head *ip_conntrack_hash;
static kmem_cache_t *ip_conntrack_cachep;
@@ -618,7 +618,7 @@
size_t hash;
struct ip_conntrack_expect *expected;
int i;
- static unsigned int drop_next = 0;
+ static unsigned int drop_next;
if (!ip_conntrack_hash_rnd_initted) {
get_random_bytes(&ip_conntrack_hash_rnd, 4);
@@ -1393,7 +1393,7 @@
nf_unregister_sockopt(&so_getorigdst);
}
-static int hashsize = 0;
+static int hashsize;
MODULE_PARM(hashsize, "i");
int __init ip_conntrack_init(void)
diff -Nru a/net/ipv4/netfilter/ip_conntrack_ftp.c b/net/ipv4/netfilter/ip_conntrack_ftp.c
--- a/net/ipv4/netfilter/ip_conntrack_ftp.c Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/netfilter/ip_conntrack_ftp.c Sun Aug 3 13:14:51 2003
@@ -19,12 +19,12 @@
#define MAX_PORTS 8
static int ports[MAX_PORTS];
-static int ports_c = 0;
+static int ports_c;
#ifdef MODULE_PARM
MODULE_PARM(ports, "1-" __MODULE_STRING(MAX_PORTS) "i");
#endif
-static int loose = 0;
+static int loose;
MODULE_PARM(loose, "i");
#if 0
diff -Nru a/net/ipv4/netfilter/ip_conntrack_irc.c b/net/ipv4/netfilter/ip_conntrack_irc.c
--- a/net/ipv4/netfilter/ip_conntrack_irc.c Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/netfilter/ip_conntrack_irc.c Sun Aug 3 13:14:51 2003
@@ -35,7 +35,7 @@
#define MAX_PORTS 8
static int ports[MAX_PORTS];
-static int ports_c = 0;
+static int ports_c;
static int max_dcc_channels = 8;
static unsigned int dcc_timeout = 300;
/* This is slow, but it's simple. --RR */
diff -Nru a/net/ipv4/netfilter/ip_conntrack_tftp.c b/net/ipv4/netfilter/ip_conntrack_tftp.c
--- a/net/ipv4/netfilter/ip_conntrack_tftp.c Sun Aug 3 13:14:47 2003
+++ b/net/ipv4/netfilter/ip_conntrack_tftp.c Sun Aug 3 13:14:47 2003
@@ -22,7 +22,7 @@
#define MAX_PORTS 8
static int ports[MAX_PORTS];
-static int ports_c = 0;
+static int ports_c;
#ifdef MODULE_PARM
MODULE_PARM(ports, "1-" __MODULE_STRING(MAX_PORTS) "i");
MODULE_PARM_DESC(ports, "port numbers of tftp servers");
diff -Nru a/net/ipv4/netfilter/ip_nat_core.c b/net/ipv4/netfilter/ip_nat_core.c
--- a/net/ipv4/netfilter/ip_nat_core.c Sun Aug 3 13:14:45 2003
+++ b/net/ipv4/netfilter/ip_nat_core.c Sun Aug 3 13:14:45 2003
@@ -278,7 +278,7 @@
struct ip_conntrack_tuple tuple;
} best = { NULL, 0xFFFFFFFF };
u_int32_t *var_ipp, *other_ipp, saved_ip, orig_dstip;
- static unsigned int randomness = 0;
+ static unsigned int randomness;
if (HOOK2MANIP(hooknum) == IP_NAT_MANIP_SRC) {
var_ipp = &tuple->src.ip;
diff -Nru a/net/ipv4/netfilter/ip_nat_ftp.c b/net/ipv4/netfilter/ip_nat_ftp.c
--- a/net/ipv4/netfilter/ip_nat_ftp.c Sun Aug 3 13:14:50 2003
+++ b/net/ipv4/netfilter/ip_nat_ftp.c Sun Aug 3 13:14:50 2003
@@ -18,7 +18,7 @@
#define MAX_PORTS 8
static int ports[MAX_PORTS];
-static int ports_c = 0;
+static int ports_c;
#ifdef MODULE_PARM
MODULE_PARM(ports, "1-" __MODULE_STRING(MAX_PORTS) "i");
diff -Nru a/net/ipv4/netfilter/ip_nat_irc.c b/net/ipv4/netfilter/ip_nat_irc.c
--- a/net/ipv4/netfilter/ip_nat_irc.c Sun Aug 3 13:14:53 2003
+++ b/net/ipv4/netfilter/ip_nat_irc.c Sun Aug 3 13:14:53 2003
@@ -36,7 +36,7 @@
#define MAX_PORTS 8
static int ports[MAX_PORTS];
-static int ports_c = 0;
+static int ports_c;
MODULE_AUTHOR("Harald Welte <laforge@gnumonks.org>");
MODULE_DESCRIPTION("IRC (DCC) network address translation module");
diff -Nru a/net/ipv4/netfilter/ip_nat_proto_icmp.c b/net/ipv4/netfilter/ip_nat_proto_icmp.c
--- a/net/ipv4/netfilter/ip_nat_proto_icmp.c Sun Aug 3 13:14:47 2003
+++ b/net/ipv4/netfilter/ip_nat_proto_icmp.c Sun Aug 3 13:14:47 2003
@@ -26,7 +26,7 @@
enum ip_nat_manip_type maniptype,
const struct ip_conntrack *conntrack)
{
- static u_int16_t id = 0;
+ static u_int16_t id;
unsigned int range_size
= (unsigned int)range->max.icmp.id - range->min.icmp.id + 1;
unsigned int i;
diff -Nru a/net/ipv4/netfilter/ip_nat_proto_tcp.c b/net/ipv4/netfilter/ip_nat_proto_tcp.c
--- a/net/ipv4/netfilter/ip_nat_proto_tcp.c Sun Aug 3 13:14:44 2003
+++ b/net/ipv4/netfilter/ip_nat_proto_tcp.c Sun Aug 3 13:14:44 2003
@@ -32,7 +32,7 @@
enum ip_nat_manip_type maniptype,
const struct ip_conntrack *conntrack)
{
- static u_int16_t port = 0, *portptr;
+ static u_int16_t port, *portptr;
unsigned int range_size, min, i;
if (maniptype == IP_NAT_MANIP_SRC)
diff -Nru a/net/ipv4/netfilter/ip_nat_proto_udp.c b/net/ipv4/netfilter/ip_nat_proto_udp.c
--- a/net/ipv4/netfilter/ip_nat_proto_udp.c Sun Aug 3 13:14:46 2003
+++ b/net/ipv4/netfilter/ip_nat_proto_udp.c Sun Aug 3 13:14:46 2003
@@ -33,7 +33,7 @@
enum ip_nat_manip_type maniptype,
const struct ip_conntrack *conntrack)
{
- static u_int16_t port = 0, *portptr;
+ static u_int16_t port, *portptr;
unsigned int range_size, min, i;
if (maniptype == IP_NAT_MANIP_SRC)
diff -Nru a/net/ipv4/netfilter/ip_nat_snmp_basic.c b/net/ipv4/netfilter/ip_nat_snmp_basic.c
--- a/net/ipv4/netfilter/ip_nat_snmp_basic.c Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/netfilter/ip_nat_snmp_basic.c Sun Aug 3 13:14:51 2003
@@ -62,7 +62,7 @@
#define SNMP_TRAP_PORT 162
#define NOCT1(n) (u_int8_t )((n) & 0xff)
-static int debug = 0;
+static int debug;
static spinlock_t snmp_lock = SPIN_LOCK_UNLOCKED;
/*
diff -Nru a/net/ipv4/netfilter/ip_tables.c b/net/ipv4/netfilter/ip_tables.c
--- a/net/ipv4/netfilter/ip_tables.c Sun Aug 3 13:14:46 2003
+++ b/net/ipv4/netfilter/ip_tables.c Sun Aug 3 13:14:46 2003
@@ -256,7 +256,7 @@
struct ipt_table *table,
void *userdata)
{
- static const char nulldevname[IFNAMSIZ] = { 0 };
+ static const char nulldevname[IFNAMSIZ];
u_int16_t offset;
struct iphdr *ip;
u_int16_t datalen;
diff -Nru a/net/ipv4/netfilter/ipt_LOG.c b/net/ipv4/netfilter/ipt_LOG.c
--- a/net/ipv4/netfilter/ipt_LOG.c Sun Aug 3 13:14:52 2003
+++ b/net/ipv4/netfilter/ipt_LOG.c Sun Aug 3 13:14:52 2003
@@ -2,16 +2,15 @@
* This is a module which is used for logging packets.
*/
#include <linux/module.h>
+#include <linux/spinlock.h>
#include <linux/skbuff.h>
#include <linux/ip.h>
-#include <linux/spinlock.h>
#include <net/icmp.h>
#include <net/udp.h>
#include <net/tcp.h>
-#include <linux/netfilter_ipv4/ip_tables.h>
-
-struct in_device;
#include <net/route.h>
+
+#include <linux/netfilter_ipv4/ip_tables.h>
#include <linux/netfilter_ipv4/ipt_LOG.h>
#if 0
@@ -20,10 +19,6 @@
#define DEBUGP(format, args...)
#endif
-struct esphdr {
- __u32 spi;
-}; /* FIXME evil kludge */
-
/* Use lock to serialize, so printks don't overlap */
static spinlock_t log_lock = SPIN_LOCK_UNLOCKED;
@@ -256,13 +251,31 @@
break;
}
/* Max Length */
- case IPPROTO_AH:
+ case IPPROTO_AH: {
+ struct ip_auth_hdr ah;
+
+ if (ntohs(iph.frag_off) & IP_OFFSET)
+ break;
+
+ /* Max length: 9 "PROTO=AH " */
+ printk("PROTO=AH ");
+
+ /* Max length: 25 "INCOMPLETE [65535 bytes] " */
+ if (skb_copy_bits(skb, iphoff+iph.ihl*4, &ah, sizeof(ah)) < 0) {
+ printk("INCOMPLETE [%u bytes] ",
+ skb->len - iphoff - iph.ihl*4);
+ break;
+ }
+
+ /* Length: 15 "SPI=0xF1234567 " */
+ printk("SPI=0x%x ", ntohl(ah.spi));
+ break;
+ }
case IPPROTO_ESP: {
- struct esphdr esph;
- int esp = (iph.protocol==IPPROTO_ESP);
+ struct ip_esp_hdr esph;
/* Max length: 10 "PROTO=ESP " */
- printk("PROTO=%s ",esp? "ESP" : "AH");
+ printk("PROTO=ESP ");
if (ntohs(iph.frag_off) & IP_OFFSET)
break;
diff -Nru a/net/ipv4/netfilter/ipt_REJECT.c b/net/ipv4/netfilter/ipt_REJECT.c
--- a/net/ipv4/netfilter/ipt_REJECT.c Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/netfilter/ipt_REJECT.c Sun Aug 3 13:14:51 2003
@@ -433,7 +433,7 @@
/* Must specify that it's a TCP packet */
if (e->ip.proto != IPPROTO_TCP
|| (e->ip.invflags & IPT_INV_PROTO)) {
- DEBUGP("REJECT: TCP_RESET illegal for non-tcp\n");
+ DEBUGP("REJECT: TCP_RESET invalid for non-tcp\n");
return 0;
}
}
diff -Nru a/net/ipv4/netfilter/ipt_ah.c b/net/ipv4/netfilter/ipt_ah.c
--- a/net/ipv4/netfilter/ipt_ah.c Sun Aug 3 13:14:50 2003
+++ b/net/ipv4/netfilter/ipt_ah.c Sun Aug 3 13:14:50 2003
@@ -1,6 +1,7 @@
/* Kernel module to match AH parameters. */
#include <linux/module.h>
#include <linux/skbuff.h>
+#include <linux/ip.h>
#include <linux/netfilter_ipv4/ipt_ah.h>
#include <linux/netfilter_ipv4/ip_tables.h>
@@ -13,10 +14,6 @@
#define duprintf(format, args...)
#endif
-struct ahhdr {
- __u32 spi;
-};
-
/* Returns 1 if the spi is matched by the range, 0 otherwise */
static inline int
spi_match(u_int32_t min, u_int32_t max, u_int32_t spi, int invert)
@@ -37,7 +34,7 @@
int offset,
int *hotdrop)
{
- struct ahhdr ah;
+ struct ip_auth_hdr ah;
const struct ipt_ah *ahinfo = matchinfo;
/* Must not be a fragment. */
diff -Nru a/net/ipv4/netfilter/ipt_esp.c b/net/ipv4/netfilter/ipt_esp.c
--- a/net/ipv4/netfilter/ipt_esp.c Sun Aug 3 13:14:48 2003
+++ b/net/ipv4/netfilter/ipt_esp.c Sun Aug 3 13:14:48 2003
@@ -1,6 +1,7 @@
/* Kernel module to match ESP parameters. */
#include <linux/module.h>
#include <linux/skbuff.h>
+#include <linux/ip.h>
#include <linux/netfilter_ipv4/ipt_esp.h>
#include <linux/netfilter_ipv4/ip_tables.h>
@@ -13,10 +14,6 @@
#define duprintf(format, args...)
#endif
-struct esphdr {
- __u32 spi;
-};
-
/* Returns 1 if the spi is matched by the range, 0 otherwise */
static inline int
spi_match(u_int32_t min, u_int32_t max, u_int32_t spi, int invert)
@@ -37,7 +34,7 @@
int offset,
int *hotdrop)
{
- struct esphdr esp;
+ struct ip_esp_hdr esp;
const struct ipt_esp *espinfo = matchinfo;
/* Must not be a fragment. */
diff -Nru a/net/ipv4/netfilter/ipt_helper.c b/net/ipv4/netfilter/ipt_helper.c
--- a/net/ipv4/netfilter/ipt_helper.c Sun Aug 3 13:14:50 2003
+++ b/net/ipv4/netfilter/ipt_helper.c Sun Aug 3 13:14:50 2003
@@ -9,6 +9,7 @@
*/
#include <linux/module.h>
#include <linux/skbuff.h>
+#include <linux/netfilter.h>
#include <linux/netfilter_ipv4/ip_conntrack.h>
#include <linux/netfilter_ipv4/ip_conntrack_core.h>
#include <linux/netfilter_ipv4/ip_conntrack_helper.h>
diff -Nru a/net/ipv4/netfilter/ipt_physdev.c b/net/ipv4/netfilter/ipt_physdev.c
--- a/net/ipv4/netfilter/ipt_physdev.c Sun Aug 3 13:14:46 2003
+++ b/net/ipv4/netfilter/ipt_physdev.c Sun Aug 3 13:14:46 2003
@@ -17,7 +17,7 @@
int *hotdrop)
{
int i;
- static const char nulldevname[IFNAMSIZ] = { 0 };
+ static const char nulldevname[IFNAMSIZ];
const struct ipt_physdev_info *info = matchinfo;
unsigned long ret;
const char *indev, *outdev;
diff -Nru a/net/ipv4/xfrm4_input.c b/net/ipv4/xfrm4_input.c
--- a/net/ipv4/xfrm4_input.c Sun Aug 3 13:14:45 2003
+++ b/net/ipv4/xfrm4_input.c Sun Aug 3 13:14:45 2003
@@ -9,17 +9,24 @@
*
*/
-#include <linux/slab.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
-static kmem_cache_t *secpath_cachep;
-
int xfrm4_rcv(struct sk_buff *skb)
{
return xfrm4_rcv_encap(skb, 0);
}
+static inline void ipip_ecn_decapsulate(struct iphdr *outer_iph, struct sk_buff *skb)
+{
+ struct iphdr *inner_iph = skb->nh.iph;
+
+ if (INET_ECN_is_ce(outer_iph->tos) &&
+ INET_ECN_is_not_ce(inner_iph->tos))
+ IP_ECN_set_ce(inner_iph);
+}
+
int xfrm4_rcv_encap(struct sk_buff *skb, __u16 encap_type)
{
int err;
@@ -75,6 +82,8 @@
if (iph->protocol != IPPROTO_IPIP)
goto drop;
skb->nh.raw = skb->data;
+ if (!(x->props.flags & XFRM_STATE_NOECN))
+ ipip_ecn_decapsulate(iph, skb);
iph = skb->nh.iph;
memset(&(IPCB(skb)->opt), 0, sizeof(struct ip_options));
decaps = 1;
@@ -88,19 +97,12 @@
/* Allocate new secpath or COW existing one. */
if (!skb->sp || atomic_read(&skb->sp->refcnt) != 1) {
- kmem_cache_t *pool = skb->sp ? skb->sp->pool : secpath_cachep;
struct sec_path *sp;
- sp = kmem_cache_alloc(pool, SLAB_ATOMIC);
+ sp = secpath_dup(skb->sp);
if (!sp)
goto drop;
- if (skb->sp) {
- memcpy(sp, skb->sp, sizeof(struct sec_path));
+ if (skb->sp)
secpath_put(skb->sp);
- } else {
- sp->pool = pool;
- sp->len = 0;
- }
- atomic_set(&sp->refcnt, 1);
skb->sp = sp;
}
if (xfrm_nr + skb->sp->len > XFRM_MAX_DEPTH)
@@ -130,16 +132,3 @@
kfree_skb(skb);
return 0;
}
-
-
-void __init xfrm4_input_init(void)
-{
- secpath_cachep = kmem_cache_create("secpath4_cache",
- sizeof(struct sec_path),
- 0, SLAB_HWCACHE_ALIGN,
- NULL, NULL);
-
- if (!secpath_cachep)
- panic("IP: failed to allocate secpath4_cache\n");
-}
-
diff -Nru a/net/ipv4/xfrm4_policy.c b/net/ipv4/xfrm4_policy.c
--- a/net/ipv4/xfrm4_policy.c Sun Aug 3 13:14:51 2003
+++ b/net/ipv4/xfrm4_policy.c Sun Aug 3 13:14:51 2003
@@ -271,7 +271,6 @@
{
xfrm4_state_init();
xfrm4_policy_init();
- xfrm4_input_init();
}
void __exit xfrm4_fini(void)
diff -Nru a/net/ipv6/Kconfig b/net/ipv6/Kconfig
--- a/net/ipv6/Kconfig Sun Aug 3 13:14:48 2003
+++ b/net/ipv6/Kconfig Sun Aug 3 13:14:48 2003
@@ -63,4 +63,3 @@
If unsure, say N.
-source "net/ipv6/netfilter/Kconfig"
diff -Nru a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c
--- a/net/ipv6/af_inet6.c Sun Aug 3 13:14:49 2003
+++ b/net/ipv6/af_inet6.c Sun Aug 3 13:14:49 2003
@@ -65,7 +65,7 @@
#include <asm/system.h>
#if 0 /*def MODULE*/
-static int unloadable = 0; /* XX: Turn to one when all is ok within the
+static int unloadable; /* XX: Turn to one when all is ok within the
module for allowing unload */
MODULE_PARM(unloadable, "i");
#endif
@@ -624,7 +624,7 @@
out_illegal:
printk(KERN_ERR
- "Ignoring attempt to register illegal socket type %d.\n",
+ "Ignoring attempt to register invalid socket type %d.\n",
p->type);
goto out;
}
diff -Nru a/net/ipv6/ah6.c b/net/ipv6/ah6.c
--- a/net/ipv6/ah6.c Sun Aug 3 13:14:50 2003
+++ b/net/ipv6/ah6.c Sun Aug 3 13:14:50 2003
@@ -26,6 +26,7 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
#include <net/ah.h>
@@ -220,6 +221,8 @@
skb->nh.ipv6h->flow_lbl[0] = iph->flow_lbl[0];
skb->nh.ipv6h->flow_lbl[1] = iph->flow_lbl[1];
skb->nh.ipv6h->flow_lbl[2] = iph->flow_lbl[2];
+ if (x->props.flags & XFRM_STATE_NOECN)
+ IP6_ECN_clear(skb->nh.ipv6h);
} else {
memcpy(skb->nh.ipv6h, iph, hdr_len);
skb->nh.raw[nh_offset] = IPPROTO_AH;
diff -Nru a/net/ipv6/esp6.c b/net/ipv6/esp6.c
--- a/net/ipv6/esp6.c Sun Aug 3 13:14:49 2003
+++ b/net/ipv6/esp6.c Sun Aug 3 13:14:49 2003
@@ -26,6 +26,7 @@
#include <linux/config.h>
#include <linux/module.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
#include <net/esp.h>
@@ -121,6 +122,8 @@
top_iph->flow_lbl[0] = iph->flow_lbl[0];
top_iph->flow_lbl[1] = iph->flow_lbl[1];
top_iph->flow_lbl[2] = iph->flow_lbl[2];
+ if (x->props.flags & XFRM_STATE_NOECN)
+ IP6_ECN_clear(top_iph);
top_iph->nexthdr = IPPROTO_ESP;
top_iph->payload_len = htons(skb->len + alen - sizeof(struct ipv6hdr));
top_iph->hop_limit = iph->hop_limit;
@@ -200,18 +203,24 @@
int hdr_len = skb->h.raw - skb->nh.raw;
int nfrags;
- u8 ret_nexthdr = 0;
unsigned char *tmp_hdr = NULL;
+ int ret = 0;
- if (!pskb_may_pull(skb, sizeof(struct ipv6_esp_hdr)))
- goto out;
+ if (!pskb_may_pull(skb, sizeof(struct ipv6_esp_hdr))) {
+ ret = -EINVAL;
+ goto out_nofree;
+ }
- if (elen <= 0 || (elen & (blksize-1)))
- goto out;
+ if (elen <= 0 || (elen & (blksize-1))) {
+ ret = -EINVAL;
+ goto out_nofree;
+ }
tmp_hdr = kmalloc(hdr_len, GFP_ATOMIC);
- if (!tmp_hdr)
- goto out;
+ if (!tmp_hdr) {
+ ret = -ENOMEM;
+ goto out_nofree;
+ }
memcpy(tmp_hdr, skb->nh.raw, hdr_len);
/* If integrity check is required, do this. */
@@ -226,12 +235,15 @@
if (unlikely(memcmp(sum, sum1, alen))) {
x->stats.integrity_failed++;
+ ret = -EINVAL;
goto out;
}
}
- if ((nfrags = skb_cow_data(skb, 0, &trailer)) < 0)
+ if ((nfrags = skb_cow_data(skb, 0, &trailer)) < 0) {
+ ret = -EINVAL;
goto out;
+ }
skb->ip_summed = CHECKSUM_NONE;
@@ -251,8 +263,10 @@
if (unlikely(nfrags > MAX_SG_ONSTACK)) {
sg = kmalloc(sizeof(struct scatterlist)*nfrags, GFP_ATOMIC);
- if (!sg)
+ if (!sg) {
+ ret = -ENOMEM;
goto out;
+ }
}
skb_to_sgvec(skb, sg, sizeof(struct ipv6_esp_hdr) + esp->conf.ivlen, elen);
crypto_cipher_decrypt(esp->conf.tfm, sg, sg, elen);
@@ -267,6 +281,7 @@
if (net_ratelimit()) {
printk(KERN_WARNING "ipsec esp packet is garbage padlen=%d, elen=%d\n", padlen+2, elen);
}
+ ret = -EINVAL;
goto out;
}
/* ... check padding bits here. Silly. :-) */
@@ -277,13 +292,13 @@
memcpy(skb->nh.raw, tmp_hdr, hdr_len);
skb->nh.ipv6h->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
ip6_find_1stfragopt(skb, &prevhdr);
- ret_nexthdr = *prevhdr = nexthdr[1];
+ ret = *prevhdr = nexthdr[1];
}
- kfree(tmp_hdr);
- return ret_nexthdr;
out:
- return -EINVAL;
+ kfree(tmp_hdr);
+out_nofree:
+ return ret;
}
static u32 esp6_get_max_size(struct xfrm_state *x, int mtu)
diff -Nru a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
--- a/net/ipv6/ip6_output.c Sun Aug 3 13:14:45 2003
+++ b/net/ipv6/ip6_output.c Sun Aug 3 13:14:45 2003
@@ -1243,6 +1243,7 @@
dst_hold(&rt->u.dst);
np->cork.rt = rt;
np->cork.fl = fl;
+ np->cork.hop_limit = hlimit;
inet->cork.fragsize = mtu = dst_pmtu(&rt->u.dst);
inet->cork.length = 0;
inet->sndmsg_page = NULL;
@@ -1465,7 +1466,7 @@
hdr->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
else
hdr->payload_len = 0;
- hdr->hop_limit = np->hop_limit;
+ hdr->hop_limit = np->cork.hop_limit;
hdr->nexthdr = proto;
ipv6_addr_copy(&hdr->saddr, &fl->fl6_src);
ipv6_addr_copy(&hdr->daddr, final_dst);
diff -Nru a/net/ipv6/ipcomp6.c b/net/ipv6/ipcomp6.c
--- a/net/ipv6/ipcomp6.c Sun Aug 3 13:14:48 2003
+++ b/net/ipv6/ipcomp6.c Sun Aug 3 13:14:48 2003
@@ -32,6 +32,7 @@
*/
#include <linux/config.h>
#include <linux/module.h>
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/xfrm.h>
#include <net/ipcomp.h>
@@ -201,6 +202,8 @@
memcpy(top_iph, tmp_iph, hdr_len);
kfree(tmp_iph);
+ if (x->props.mode && (x->props.flags & XFRM_STATE_NOECN))
+ IP6_ECN_clear(top_iph);
top_iph->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
skb->nh.raw = skb->data; /* top_iph */
ip6_find_1stfragopt(skb, &prevhdr);
diff -Nru a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c
--- a/net/ipv6/ndisc.c Sun Aug 3 13:14:49 2003
+++ b/net/ipv6/ndisc.c Sun Aug 3 13:14:49 2003
@@ -1161,7 +1161,7 @@
if (ndopts.nd_opts_tgt_lladdr || ndopts.nd_opts_rh) {
if (net_ratelimit())
ND_PRINTK0(KERN_WARNING
- "ICMP6 RA: got illegal option with RA");
+ "ICMP6 RA: got invalid option with RA");
}
out:
if (rt)
diff -Nru a/net/ipv6/netfilter/ip6_tables.c b/net/ipv6/netfilter/ip6_tables.c
--- a/net/ipv6/netfilter/ip6_tables.c Sun Aug 3 13:14:52 2003
+++ b/net/ipv6/netfilter/ip6_tables.c Sun Aug 3 13:14:52 2003
@@ -329,7 +329,7 @@
struct ip6t_table *table,
void *userdata)
{
- static const char nulldevname[IFNAMSIZ] = { 0 };
+ static const char nulldevname[IFNAMSIZ];
u_int16_t offset = 0;
struct ipv6hdr *ipv6;
void *protohdr;
diff -Nru a/net/ipv6/xfrm6_input.c b/net/ipv6/xfrm6_input.c
--- a/net/ipv6/xfrm6_input.c Sun Aug 3 13:14:53 2003
+++ b/net/ipv6/xfrm6_input.c Sun Aug 3 13:14:53 2003
@@ -9,11 +9,18 @@
* IPv6 support
*/
+#include <net/inet_ecn.h>
#include <net/ip.h>
#include <net/ipv6.h>
#include <net/xfrm.h>
-static kmem_cache_t *secpath_cachep;
+static inline void ipip6_ecn_decapsulate(struct ipv6hdr *iph,
+ struct sk_buff *skb)
+{
+ if (INET_ECN_is_ce(ip6_get_dsfield(iph)) &&
+ INET_ECN_is_not_ce(ip6_get_dsfield(skb->nh.ipv6h)))
+ IP6_ECN_set_ce(skb->nh.ipv6h);
+}
int xfrm6_rcv(struct sk_buff **pskb, unsigned int *nhoffp)
{
@@ -71,6 +78,8 @@
if (nexthdr != IPPROTO_IPV6)
goto drop;
skb->nh.raw = skb->data;
+ if (!(x->props.flags & XFRM_STATE_NOECN))
+ ipip6_ecn_decapsulate(iph, skb);
iph = skb->nh.ipv6h;
decaps = 1;
break;
@@ -82,19 +91,12 @@
/* Allocate new secpath or COW existing one. */
if (!skb->sp || atomic_read(&skb->sp->refcnt) != 1) {
- kmem_cache_t *pool = skb->sp ? skb->sp->pool : secpath_cachep;
struct sec_path *sp;
- sp = kmem_cache_alloc(pool, SLAB_ATOMIC);
+ sp = secpath_dup(skb->sp);
if (!sp)
goto drop;
- if (skb->sp) {
- memcpy(sp, skb->sp, sizeof(struct sec_path));
+ if (skb->sp)
secpath_put(skb->sp);
- } else {
- sp->pool = pool;
- sp->len = 0;
- }
- atomic_set(&sp->refcnt, 1);
skb->sp = sp;
}
@@ -125,15 +127,3 @@
kfree_skb(skb);
return -1;
}
-
-void __init xfrm6_input_init(void)
-{
- secpath_cachep = kmem_cache_create("secpath6_cache",
- sizeof(struct sec_path),
- 0, SLAB_HWCACHE_ALIGN,
- NULL, NULL);
-
- if (!secpath_cachep)
- panic("IPv6: failed to allocate secpath6_cache\n");
-}
-
diff -Nru a/net/ipv6/xfrm6_policy.c b/net/ipv6/xfrm6_policy.c
--- a/net/ipv6/xfrm6_policy.c Sun Aug 3 13:14:46 2003
+++ b/net/ipv6/xfrm6_policy.c Sun Aug 3 13:14:46 2003
@@ -274,7 +274,6 @@
{
xfrm6_policy_init();
xfrm6_state_init();
- xfrm6_input_init();
}
void __exit xfrm6_fini(void)
diff -Nru a/net/irda/irlan/irlan_common.c b/net/irda/irlan/irlan_common.c
--- a/net/irda/irlan/irlan_common.c Sun Aug 3 13:14:49 2003
+++ b/net/irda/irlan/irlan_common.c Sun Aug 3 13:14:49 2003
@@ -68,7 +68,7 @@
static void *skey;
/* Module parameters */
-static int eth = 0; /* Use "eth" or "irlan" name for devices */
+static int eth; /* Use "eth" or "irlan" name for devices */
static int access = ACCESS_PEER; /* PEER, DIRECT or HOSTED */
#ifdef CONFIG_PROC_FS
diff -Nru a/net/irda/irsysctl.c b/net/irda/irsysctl.c
--- a/net/irda/irsysctl.c Sun Aug 3 13:14:47 2003
+++ b/net/irda/irsysctl.c Sun Aug 3 13:14:47 2003
@@ -67,7 +67,7 @@
static int max_max_baud_rate = 16000000; /* See qos.c - IrLAP spec */
static int min_max_baud_rate = 2400;
static int max_min_tx_turn_time = 10000; /* See qos.c - IrLAP spec */
-static int min_min_tx_turn_time = 0;
+static int min_min_tx_turn_time;
static int max_max_tx_data_size = 2048; /* See qos.c - IrLAP spec */
static int min_max_tx_data_size = 64;
static int max_max_tx_window = 7; /* See qos.c - IrLAP spec */
diff -Nru a/net/key/af_key.c b/net/key/af_key.c
--- a/net/key/af_key.c Sun Aug 3 13:14:46 2003
+++ b/net/key/af_key.c Sun Aug 3 13:14:46 2003
@@ -681,6 +681,8 @@
}
sa->sadb_sa_flags = 0;
+ if (x->props.flags & XFRM_STATE_NOECN)
+ sa->sadb_sa_flags |= SADB_SAFLAGS_NOECN;
/* hard time */
if (hsc & 2) {
@@ -957,6 +959,8 @@
x->id.proto = proto;
x->id.spi = sa->sadb_sa_spi;
x->props.replay_window = sa->sadb_sa_replay;
+ if (sa->sadb_sa_flags & SADB_SAFLAGS_NOECN)
+ x->props.flags |= XFRM_STATE_NOECN;
lifetime = (struct sadb_lifetime*) ext_hdrs[SADB_EXT_LIFETIME_HARD-1];
if (lifetime != NULL) {
diff -Nru a/net/netrom/sysctl_net_netrom.c b/net/netrom/sysctl_net_netrom.c
--- a/net/netrom/sysctl_net_netrom.c Sun Aug 3 13:14:46 2003
+++ b/net/netrom/sysctl_net_netrom.c Sun Aug 3 13:14:46 2003
@@ -15,9 +15,9 @@
/*
* Values taken from NET/ROM documentation.
*/
-static int min_quality[] = {0}, max_quality[] = {255};
-static int min_obs[] = {0}, max_obs[] = {255};
-static int min_ttl[] = {0}, max_ttl[] = {255};
+static int min_quality[1], max_quality[] = {255};
+static int min_obs[1], max_obs[] = {255};
+static int min_ttl[1], max_ttl[] = {255};
static int min_t1[] = {5 * HZ};
static int max_t1[] = {600 * HZ};
static int min_n2[] = {2}, max_n2[] = {127};
@@ -28,7 +28,7 @@
static int min_window[] = {1}, max_window[] = {127};
static int min_idle[] = {0 * HZ};
static int max_idle[] = {65535 * HZ};
-static int min_route[] = {0}, max_route[] = {1};
+static int min_route[1], max_route[] = {1};
static int min_fails[] = {1}, max_fails[] = {10};
static struct ctl_table_header *nr_table_header;
diff -Nru a/net/netsyms.c b/net/netsyms.c
--- a/net/netsyms.c Sun Aug 3 13:14:47 2003
+++ b/net/netsyms.c Sun Aug 3 13:14:47 2003
@@ -322,6 +322,7 @@
EXPORT_SYMBOL(xfrm_check_selectors);
EXPORT_SYMBOL(xfrm_check_output);
EXPORT_SYMBOL(__secpath_destroy);
+EXPORT_SYMBOL(secpath_dup);
EXPORT_SYMBOL(xfrm_get_acqseq);
EXPORT_SYMBOL(xfrm_parse_spi);
EXPORT_SYMBOL(xfrm4_rcv);
@@ -513,20 +514,11 @@
#endif
EXPORT_SYMBOL(rtattr_parse);
-EXPORT_SYMBOL(rtnetlink_links);
EXPORT_SYMBOL(__rta_fill);
-EXPORT_SYMBOL(rtnetlink_dump_ifinfo);
-EXPORT_SYMBOL(rtnetlink_put_metrics);
-EXPORT_SYMBOL(rtnl);
EXPORT_SYMBOL(neigh_delete);
EXPORT_SYMBOL(neigh_add);
EXPORT_SYMBOL(neigh_dump_info);
-EXPORT_SYMBOL(dev_set_allmulti);
-EXPORT_SYMBOL(dev_set_promiscuity);
-EXPORT_SYMBOL(rtnl_sem);
-EXPORT_SYMBOL(rtnl_lock);
-EXPORT_SYMBOL(rtnl_unlock);
/* ABI emulation layers need this */
EXPORT_SYMBOL(move_addr_to_kernel);
@@ -534,7 +526,6 @@
/* Used by at least ipip.c. */
EXPORT_SYMBOL(ipv4_config);
-EXPORT_SYMBOL(dev_open);
/* Used by other modules */
EXPORT_SYMBOL(xrlim_allow);
@@ -610,11 +601,22 @@
#endif
EXPORT_SYMBOL(dev_base);
EXPORT_SYMBOL(dev_base_lock);
+EXPORT_SYMBOL(dev_open);
EXPORT_SYMBOL(dev_close);
EXPORT_SYMBOL(dev_mc_add);
EXPORT_SYMBOL(dev_mc_delete);
EXPORT_SYMBOL(dev_mc_upload);
+EXPORT_SYMBOL(dev_set_allmulti);
+EXPORT_SYMBOL(dev_set_promiscuity);
EXPORT_SYMBOL(__kill_fasync);
+
+EXPORT_SYMBOL(rtnl);
+EXPORT_SYMBOL(rtnetlink_links);
+EXPORT_SYMBOL(rtnetlink_dump_ifinfo);
+EXPORT_SYMBOL(rtnetlink_put_metrics);
+EXPORT_SYMBOL(rtnl_sem);
+EXPORT_SYMBOL(rtnl_lock);
+EXPORT_SYMBOL(rtnl_unlock);
#ifdef CONFIG_HIPPI
EXPORT_SYMBOL(hippi_type_trans);
diff -Nru a/net/rose/sysctl_net_rose.c b/net/rose/sysctl_net_rose.c
--- a/net/rose/sysctl_net_rose.c Sun Aug 3 13:14:44 2003
+++ b/net/rose/sysctl_net_rose.c Sun Aug 3 13:14:44 2003
@@ -16,7 +16,7 @@
static int max_timer[] = {300 * HZ};
static int min_idle[] = {0 * HZ};
static int max_idle[] = {65535 * HZ};
-static int min_route[] = {0}, max_route[] = {1};
+static int min_route[1], max_route[] = {1};
static int min_ftimer[] = {60 * HZ};
static int max_ftimer[] = {600 * HZ};
static int min_maxvcs[] = {1}, max_maxvcs[] = {254};
diff -Nru a/net/sched/sch_atm.c b/net/sched/sch_atm.c
--- a/net/sched/sch_atm.c Sun Aug 3 13:14:48 2003
+++ b/net/sched/sch_atm.c Sun Aug 3 13:14:48 2003
@@ -645,7 +645,7 @@
if (flow->excess)
RTA_PUT(skb,TCA_ATM_EXCESS,sizeof(u32),&flow->classid);
else {
- static u32 zero = 0;
+ static u32 zero;
RTA_PUT(skb,TCA_ATM_EXCESS,sizeof(zero),&zero);
}
diff -Nru a/net/sched/sch_htb.c b/net/sched/sch_htb.c
--- a/net/sched/sch_htb.c Sun Aug 3 13:14:49 2003
+++ b/net/sched/sch_htb.c Sun Aug 3 13:14:49 2003
@@ -19,9 +19,11 @@
* code review and helpful comments on shaping
* Tomasz Wrona, <tw@eter.tym.pl>
* created test case so that I was able to fix nasty bug
+ * Wilfried Weissmann
+ * spotted bug in dequeue code and helped with fix
* and many others. thanks.
*
- * $Id: sch_htb.c,v 1.20 2003/06/18 19:55:49 devik Exp devik $
+ * $Id: sch_htb.c,v 1.24 2003/07/28 15:25:23 devik Exp devik $
*/
#include <linux/config.h>
#include <linux/module.h>
@@ -73,7 +75,7 @@
#define HTB_HYSTERESIS 1/* whether to use mode hysteresis for speedup */
#define HTB_QLOCK(S) spin_lock_bh(&(S)->dev->queue_lock)
#define HTB_QUNLOCK(S) spin_unlock_bh(&(S)->dev->queue_lock)
-#define HTB_VER 0x3000c /* major must be matched with number suplied by TC as version */
+#define HTB_VER 0x3000d /* major must be matched with number suplied by TC as version */
#if HTB_VER >> 16 != TC_HTB_PROTOVER
#error "Mismatched sch_htb.c and pkt_sch.h"
@@ -98,7 +100,8 @@
from LSB
*/
#ifdef HTB_DEBUG
-#define HTB_DBG(S,L,FMT,ARG...) if (((q->debug>>(2*S))&3) >= L) \
+#define HTB_DBG_COND(S,L) (((q->debug>>(2*S))&3) >= L)
+#define HTB_DBG(S,L,FMT,ARG...) if (HTB_DBG_COND(S,L)) \
printk(KERN_DEBUG FMT,##ARG)
#define HTB_CHCL(cl) BUG_TRAP((cl)->magic == HTB_CMAGIC)
#define HTB_PASSQ q,
@@ -114,6 +117,7 @@
rb_erase(N,R); \
(N)->rb_color = -1; } while (0)
#else
+#define HTB_DBG_COND(S,L) (0)
#define HTB_DBG(S,L,FMT,ARG...)
#define HTB_PASSQ
#define HTB_ARGQ
@@ -901,6 +905,7 @@
struct rb_node **pptr;
} stk[TC_HTB_MAXDEPTH],*sp = stk;
+ BUG_TRAP(tree->rb_node);
sp->root = tree->rb_node;
sp->pptr = pptr;
@@ -934,15 +939,36 @@
htb_dequeue_tree(struct htb_sched *q,int prio,int level)
{
struct sk_buff *skb = NULL;
- //struct htb_sched *q = (struct htb_sched *)sch->data;
struct htb_class *cl,*start;
/* look initial class up in the row */
start = cl = htb_lookup_leaf (q->row[level]+prio,prio,q->ptr[level]+prio);
do {
- BUG_TRAP(cl && cl->un.leaf.q->q.qlen); if (!cl) return NULL;
+next:
+ BUG_TRAP(cl);
+ if (!cl) return NULL;
HTB_DBG(4,1,"htb_deq_tr prio=%d lev=%d cl=%X defic=%d\n",
prio,level,cl->classid,cl->un.leaf.deficit[level]);
+
+ /* class can be empty - it is unlikely but can be true if leaf
+ qdisc drops packets in enqueue routine or if someone used
+ graft operation on the leaf since last dequeue;
+ simply deactivate and skip such class */
+ if (unlikely(cl->un.leaf.q->q.qlen == 0)) {
+ struct htb_class *next;
+ htb_deactivate(q,cl);
+
+ /* row/level might become empty */
+ if ((q->row_mask[level] & (1 << prio)) == 0)
+ return NULL;
+
+ next = htb_lookup_leaf (q->row[level]+prio,
+ prio,q->ptr[level]+prio);
+ if (cl == start) /* fix start if we just deleted it */
+ start = next;
+ cl = next;
+ goto next;
+ }
if (likely((skb = cl->un.leaf.q->dequeue(cl->un.leaf.q)) != NULL))
break;
@@ -1189,7 +1215,8 @@
gopt.direct_pkts = q->direct_pkts;
#ifdef HTB_DEBUG
- htb_debug_dump(q);
+ if (HTB_DBG_COND(0,2))
+ htb_debug_dump(q);
#endif
gopt.version = HTB_VER;
gopt.rate2quantum = q->rate2quantum;
@@ -1270,6 +1297,9 @@
return -ENOBUFS;
sch_tree_lock(sch);
if ((*old = xchg(&cl->un.leaf.q, new)) != NULL) {
+ if (cl->prio_activity)
+ htb_deactivate ((struct htb_sched*)sch->data,cl);
+
/* TODO: is it correct ? Why CBQ doesn't do it ? */
sch->q.qlen -= (*old)->q.qlen;
qdisc_reset(*old);
diff -Nru a/net/sunrpc/svcauth_des.c b/net/sunrpc/svcauth_des.c
--- a/net/sunrpc/svcauth_des.c Sun Aug 3 13:14:50 2003
+++ b/net/sunrpc/svcauth_des.c Sun Aug 3 13:14:50 2003
@@ -45,7 +45,7 @@
* Make sure we don't place more than one call to the key server at
* a time.
*/
-static int in_keycall = 0;
+static int in_keycall;
#define FAIL(err) \
{ if (data) put_cred(data); \
@@ -202,7 +202,7 @@
static struct des_cred *
get_cred_byname(struct svc_rqst *rqstp, u32 *authp, char *fullname, u32 *cryptkey)
{
- static int in_keycall = 0;
+ static int in_keycall;
struct des_cred *cred;
if (in_keycall) {
diff -Nru a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c
--- a/net/sunrpc/xprt.c Sun Aug 3 13:14:50 2003
+++ b/net/sunrpc/xprt.c Sun Aug 3 13:14:50 2003
@@ -66,8 +66,6 @@
#include <net/udp.h>
#include <net/tcp.h>
-#include <asm/uaccess.h>
-
/*
* Local variables
*/
@@ -581,8 +579,8 @@
#ifdef RPC_PROFILE
/* Profile only reads for now */
if (copied > 1024) {
- static unsigned long nextstat = 0;
- static unsigned long pkt_rtt = 0, pkt_len = 0, pkt_cnt = 0;
+ static unsigned long nextstat;
+ static unsigned long pkt_rtt, pkt_len, pkt_cnt;
pkt_cnt++;
pkt_len += req->rq_slen + copied;
diff -Nru a/net/xfrm/xfrm_input.c b/net/xfrm/xfrm_input.c
--- a/net/xfrm/xfrm_input.c Sun Aug 3 13:14:44 2003
+++ b/net/xfrm/xfrm_input.c Sun Aug 3 13:14:44 2003
@@ -7,15 +7,38 @@
*
*/
+#include <linux/slab.h>
#include <net/ip.h>
#include <net/xfrm.h>
+static kmem_cache_t *secpath_cachep;
+
void __secpath_destroy(struct sec_path *sp)
{
int i;
for (i = 0; i < sp->len; i++)
xfrm_state_put(sp->x[i].xvec);
- kmem_cache_free(sp->pool, sp);
+ kmem_cache_free(secpath_cachep, sp);
+}
+
+struct sec_path *secpath_dup(struct sec_path *src)
+{
+ struct sec_path *sp;
+
+ sp = kmem_cache_alloc(secpath_cachep, SLAB_ATOMIC);
+ if (!sp)
+ return NULL;
+
+ sp->len = 0;
+ if (src) {
+ int i;
+
+ memcpy(sp, src, sizeof(*sp));
+ for (i = 0; i < sp->len; i++)
+ xfrm_state_hold(sp->x[i].xvec);
+ }
+ atomic_set(&sp->refcnt, 1);
+ return sp;
}
/* Fetch spi and seq from ipsec header */
@@ -49,4 +72,14 @@
*spi = *(u32*)(skb->h.raw + offset);
*seq = *(u32*)(skb->h.raw + offset_seq);
return 0;
+}
+
+void __init xfrm_input_init(void)
+{
+ secpath_cachep = kmem_cache_create("secpath_cache",
+ sizeof(struct sec_path),
+ 0, SLAB_HWCACHE_ALIGN,
+ NULL, NULL);
+ if (!secpath_cachep)
+ panic("XFRM: failed to allocate secpath_cache\n");
}
diff -Nru a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
--- a/net/xfrm/xfrm_policy.c Sun Aug 3 13:14:48 2003
+++ b/net/xfrm/xfrm_policy.c Sun Aug 3 13:14:48 2003
@@ -1218,5 +1218,6 @@
{
xfrm_state_init();
xfrm_policy_init();
+ xfrm_input_init();
}
diff -Nru a/net/xfrm/xfrm_state.c b/net/xfrm/xfrm_state.c
--- a/net/xfrm/xfrm_state.c Sun Aug 3 13:14:50 2003
+++ b/net/xfrm/xfrm_state.c Sun Aug 3 13:14:50 2003
@@ -485,7 +485,8 @@
err = -EINVAL;
spin_lock_bh(&x1->lock);
if (likely(x1->km.state == XFRM_STATE_VALID)) {
- memcpy(x1->encap, x->encap, sizeof(*x1->encap));
+ if (x->encap && x1->encap)
+ memcpy(x1->encap, x->encap, sizeof(*x1->encap));
memcpy(&x1->lft, &x->lft, sizeof(x1->lft));
x1->km.dying = 0;
err = 0;
diff -Nru a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
--- a/net/xfrm/xfrm_user.c Sun Aug 3 13:14:49 2003
+++ b/net/xfrm/xfrm_user.c Sun Aug 3 13:14:49 2003
@@ -201,6 +201,7 @@
x->props.reqid = p->reqid;
x->props.family = p->family;
x->props.saddr = p->saddr;
+ x->props.flags = p->flags;
}
static struct xfrm_state *xfrm_state_construct(struct xfrm_usersa_info *p,
@@ -305,6 +306,7 @@
p->replay_window = x->props.replay_window;
p->reqid = x->props.reqid;
p->family = x->props.family;
+ p->flags = x->props.flags;
p->seq = x->km.seq;
}
@@ -457,8 +459,8 @@
if (err)
goto out_noput;
x = xfrm_find_acq(p->info.mode, p->info.reqid, p->info.id.proto,
- &p->info.sel.daddr,
- &p->info.sel.saddr, 1,
+ &p->info.id.daddr,
+ &p->info.saddr, 1,
p->info.family);
err = -ENOENT;
if (x == NULL)
@@ -935,7 +937,7 @@
rlen = NLMSG_ALIGN(nlh->nlmsg_len);
if (rlen > skb->len)
rlen = skb->len;
- if (xfrm_user_rcv_msg(skb, nlh, &err)) {
+ if (xfrm_user_rcv_msg(skb, nlh, &err) < 0) {
if (err == 0)
return -1;
netlink_ack(skb, nlh, err);
diff -Nru a/scripts/MAKEDEV.snd b/scripts/MAKEDEV.snd
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/scripts/MAKEDEV.snd Sun Aug 3 13:14:53 2003
@@ -0,0 +1,161 @@
+#!/bin/bash
+#
+# This script creates the proper /dev/ entries for ALSA devices.
+# See ../Documentation/sound/alsa/ALSA-Configuration.txt for more
+# information.
+
+MAJOR=116
+OSSMAJOR=14
+MAX_CARDS=4
+PERM=666
+OWNER=root.root
+
+if [ "`grep -w -E "^audio" /etc/group`x" != x ]; then
+ PERM=660
+ OWNER=root.audio
+fi
+
+function create_odevice () {
+ rm -f $1
+ echo -n "Creating $1..."
+ mknod -m $PERM $1 c $OSSMAJOR $2
+ chown $OWNER $1
+ echo " done"
+}
+
+function create_odevices () {
+ tmp=0
+ tmp1=0
+ rm -f $1 $1?
+ echo -n "Creating $1?..."
+ while [ $tmp1 -lt $MAX_CARDS ]; do
+ minor=$[ $2 + $tmp ]
+ mknod -m $PERM $1$tmp1 c $OSSMAJOR $minor
+ chown $OWNER $1$tmp1
+ tmp=$[ $tmp + 16 ]
+ tmp1=$[ $tmp1 + 1 ]
+ done
+ echo " done"
+}
+
+function create_device1 () {
+ rm -f $1
+ minor=$2
+ echo -n "Creating $1..."
+ mknod -m $PERM $1 c $MAJOR $minor
+ chown $OWNER $1
+ echo " done"
+}
+
+function create_devices () {
+ tmp=0
+ rm -f $1 $1?
+ echo -n "Creating $1?..."
+ while [ $tmp -lt $MAX_CARDS ]; do
+ minor=$[ $tmp * 32 ]
+ minor=$[ $2 + $minor ]
+ mknod -m $PERM "${1}C${tmp}" c $MAJOR $minor
+ chown $OWNER "${1}C${tmp}"
+ tmp=$[ $tmp + 1 ]
+ done
+ echo " done"
+}
+
+function create_devices2 () {
+ tmp=0
+ rm -f $1 $1?
+ echo -n "Creating $1??..."
+ while [ $tmp -lt $MAX_CARDS ]; do
+ tmp1=0
+ while [ $tmp1 -lt $3 ]; do
+ minor=$[ $tmp * 32 ]
+ minor=$[ $2 + $minor + $tmp1 ]
+ mknod -m $PERM "${1}C${tmp}D${tmp1}" c $MAJOR $minor
+ chown $OWNER "${1}C${tmp}D${tmp1}"
+ tmp1=$[ $tmp1 + 1 ]
+ done
+ tmp=$[ $tmp + 1 ]
+ done
+ echo " done"
+}
+
+function create_devices3 () {
+ tmp=0
+ rm -f $1 $1?
+ echo -n "Creating $1??$4..."
+ while [ $tmp -lt $MAX_CARDS ]; do
+ tmp1=0
+ while [ $tmp1 -lt $3 ]; do
+ minor=$[ $tmp * 32 ]
+ minor=$[ $2 + $minor + $tmp1 ]
+ mknod -m $PERM "${1}C${tmp}D${tmp1}${4}" c $MAJOR $minor
+ chown $OWNER "${1}C${tmp}D${tmp1}${4}"
+ tmp1=$[ $tmp1 + 1 ]
+ done
+ tmp=$[ $tmp + 1 ]
+ done
+ echo " done"
+}
+
+if test "$1" = "-?" || test "$1" = "-h" || test "$1" = "--help"; then
+ echo "Usage: snddevices [max]"
+ exit
+fi
+
+if test "$1" = "max"; then
+ DSP_MINOR=19
+fi
+
+# OSS (Lite) compatible devices...
+
+if test $OSSMAJOR -eq 14; then
+ create_odevices /dev/mixer 0
+ create_odevice /dev/sequencer 1
+ create_odevices /dev/midi 2
+ create_odevices /dev/dsp 3
+ create_odevices /dev/audio 4
+ create_odevice /dev/sndstat 6
+ create_odevice /dev/music 8
+ create_odevices /dev/dmmidi 9
+ create_odevices /dev/dmfm 10
+ create_odevices /dev/amixer 11 # alternate mixer
+ create_odevices /dev/adsp 12 # alternate dsp
+ create_odevices /dev/amidi 13 # alternate midi
+ create_odevices /dev/admmidi 14 # alternate direct midi
+ # create symlinks
+ ln -svf /dev/mixer0 /dev/mixer
+ ln -svf /dev/midi0 /dev/midi
+ ln -svf /dev/dsp0 /dev/dsp
+ ln -svf /dev/audio0 /dev/audio
+ ln -svf /dev/music /dev/sequencer2
+ ln -svf /dev/adsp0 /dev/adsp
+ ln -svf /dev/amidi0 /dev/amidi
+fi
+
+# Remove old devices
+
+mv -f /dev/sndstat /dev/1sndstat
+rm -f /dev/snd*
+mv -f /dev/1sndstat /dev/sndstat
+if [ -d /dev/snd ]; then
+ rm -f /dev/snd/*
+ rmdir /dev/snd
+fi
+
+# Create new ones
+
+mkdir -p /dev/snd
+create_devices /dev/snd/control 0
+create_device1 /dev/snd/seq 1
+create_device1 /dev/snd/timer 33
+create_devices2 /dev/snd/hw 4 4
+create_devices2 /dev/snd/midi 8 8
+create_devices3 /dev/snd/pcm 16 8 p
+create_devices3 /dev/snd/pcm 24 8 c
+
+# Loader devices
+
+echo "ALSA loader devices"
+rm -f /dev/aload*
+create_devices /dev/aload 0
+create_device1 /dev/aloadSEQ 1
diff -Nru a/scripts/binoffset.c b/scripts/binoffset.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/scripts/binoffset.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,163 @@
+/***************************************************************************
+ * binoffset.c
+ * (C) 2002 Randy Dunlap <rddunlap@osdl.org>
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+# binoffset.c:
+# - searches a (binary) file for a specified (binary) pattern
+# - returns the offset of the located pattern or ~0 if not found
+# - exits with exit status 0 normally or non-0 if pattern is not found
+# or any other error occurs.
+
+****************************************************************/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+
+#define VERSION "0.1"
+#define BUF_SIZE (16 * 1024)
+#define PAT_SIZE 100
+
+char *progname;
+char *inputname;
+int inputfd;
+int bix; /* buf index */
+unsigned char patterns [PAT_SIZE] = {0}; /* byte-sized pattern array */
+int pat_len; /* actual number of pattern bytes */
+unsigned char *madr; /* mmap address */
+size_t filesize;
+int num_matches = 0;
+off_t firstloc = 0;
+
+void usage (void)
+{
+ fprintf (stderr, "%s ver. %s\n", progname, VERSION);
+ fprintf (stderr, "usage: %s filename pattern_bytes\n",
+ progname);
+ fprintf (stderr, " [prints location of pattern_bytes in file]\n");
+ exit (1);
+}
+
+int get_pattern (int pat_count, char *pats [])
+{
+ int ix, err, tmp;
+
+#ifdef DEBUG
+ fprintf (stderr,"get_pattern: count = %d\n", pat_count);
+ for (ix = 0; ix < pat_count; ix++)
+ fprintf (stderr, " pat # %d: [%s]\n", ix, pats[ix]);
+#endif
+
+ for (ix = 0; ix < pat_count; ix++) {
+ tmp = 0;
+ err = sscanf (pats[ix], "%5i", &tmp);
+ if (err != 1 || tmp > 0xff) {
+ fprintf (stderr, "pattern or value error in pattern # %d [%s]\n",
+ ix, pats[ix]);
+ usage ();
+ }
+ patterns [ix] = tmp;
+ }
+ pat_len = pat_count;
+}
+
+int search_pattern (void)
+{
+ for (bix = 0; bix < filesize; bix++) {
+ if (madr[bix] == patterns[0]) {
+ if (memcmp (&madr[bix], patterns, pat_len) == 0) {
+ if (num_matches == 0)
+ firstloc = bix;
+ num_matches++;
+ }
+ }
+ }
+}
+
+#ifdef NOTDEF
+size_t get_filesize (int fd)
+{
+ off_t end_off = lseek (fd, 0, SEEK_END);
+ lseek (fd, 0, SEEK_SET);
+ return (size_t) end_off;
+}
+#endif
+
+size_t get_filesize (int fd)
+{
+ int err;
+ struct stat stat;
+
+ err = fstat (fd, &stat);
+ fprintf (stderr, "filesize: %d\n", err < 0 ? err : stat.st_size);
+ if (err < 0)
+ return err;
+ return (size_t) stat.st_size;
+}
+
+int main (int argc, char *argv [])
+{
+ progname = argv[0];
+
+ if (argc < 3)
+ usage ();
+
+ get_pattern (argc - 2, argv + 2);
+
+ inputname = argv[1];
+
+ inputfd = open (inputname, O_RDONLY);
+ if (inputfd == -1) {
+ fprintf (stderr, "%s: cannot open '%s'\n",
+ progname, inputname);
+ exit (3);
+ }
+
+ filesize = get_filesize (inputfd);
+
+ madr = mmap (0, filesize, PROT_READ, MAP_PRIVATE, inputfd, 0);
+ if (madr == MAP_FAILED) {
+ fprintf (stderr, "mmap error = %d\n", errno);
+ close (inputfd);
+ exit (4);
+ }
+
+ search_pattern ();
+
+ if (munmap (madr, filesize))
+ fprintf (stderr, "munmap error = %d\n", errno);
+
+ if (close (inputfd))
+ fprintf (stderr, "%s: error %d closing '%s'\n",
+ progname, errno, inputname);
+
+ fprintf (stderr, "number of pattern matches = %d\n", num_matches);
+ if (num_matches == 0)
+ firstloc = ~0;
+ printf ("%d\n", firstloc);
+ fprintf (stderr, "%d\n", firstloc);
+
+ exit (num_matches ? 0 : 2);
+}
+
+/* end binoffset.c */
diff -Nru a/scripts/extract-ikconfig b/scripts/extract-ikconfig
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/scripts/extract-ikconfig Sun Aug 3 13:14:53 2003
@@ -0,0 +1,66 @@
+#! /bin/bash
+# extracts .config info from a [b]zImage file
+# uses: binoffset (new), dd, zcat, strings, grep
+# $arg1 is [b]zImage filename
+
+TMPFILE=""
+
+usage()
+{
+ echo " usage: extract-ikconfig [b]zImage_filename"
+}
+
+clean_up()
+{
+ if [ -z $ISCOMP ]
+ then
+ rm -f $TMPFILE
+ fi
+}
+
+if [ $# -lt 1 ]
+then
+ usage
+ exit
+fi
+
+image=$1
+
+# There are two gzip headers, as well as arches which don't compress their
+# kernel.
+GZHDR="0x1f 0x8b 0x08 0x00"
+if [ `binoffset $image $GZHDR >/dev/null 2>&1 ; echo $?` -ne 0 ]
+then
+ GZHDR="0x1f 0x8b 0x08 0x08"
+ if [ `binoffset $image $GZHDR >/dev/null 2>&1 ; echo $?` -ne 0 ]
+ then
+ ISCOMP=0
+ fi
+fi
+
+PID=$$
+
+# Extract and uncompress the kernel image if necessary
+if [ -z $ISCOMP ]
+then
+ TMPFILE="/tmp/`basename $image`.vmlin.$PID"
+ dd if=$image bs=1 skip=`binoffset $image $GZHDR` 2> /dev/null | zcat > $TMPFILE
+else
+ TMPFILE=$image
+fi
+
+# Look for strings.
+strings $TMPFILE | grep "CONFIG_BEGIN=n" > /dev/null
+if [ $? -eq 0 ]
+then
+ strings $TMPFILE | awk "/CONFIG_BEGIN=n/,/CONFIG_END=n/" > $image.oldconfig.$PID
+else
+ echo "ERROR: Unable to extract kernel configuration information."
+ echo " This kernel image may not have the config info."
+ clean_up
+ exit 1
+fi
+
+echo "Kernel configuration written to $image.oldconfig.$PID"
+clean_up
+exit 0
diff -Nru a/scripts/genksyms/lex.c_shipped b/scripts/genksyms/lex.c_shipped
--- a/scripts/genksyms/lex.c_shipped Sun Aug 3 13:14:51 2003
+++ b/scripts/genksyms/lex.c_shipped Sun Aug 3 13:14:51 2003
@@ -294,10 +294,10 @@
#define YY_END_OF_BUFFER 14
static yyconst short int yy_accept[76] =
{ 0,
- 0, 0, 0, 0, 14, 12, 4, 3, 12, 12,
- 12, 7, 7, 12, 12, 12, 12, 12, 9, 9,
- 12, 12, 12, 4, 0, 5, 0, 0, 6, 0,
- 0, 7, 0, 0, 0, 0, 2, 8, 10, 10,
+ 0, 0, 0, 0, 14, 12, 4, 3, 12, 7,
+ 12, 12, 7, 12, 12, 12, 12, 12, 9, 9,
+ 12, 12, 12, 4, 0, 5, 0, 7, 0, 6,
+ 0, 0, 0, 0, 0, 0, 2, 8, 10, 10,
9, 0, 0, 9, 9, 0, 9, 0, 0, 11,
0, 0, 0, 10, 0, 10, 9, 9, 0, 0,
0, 0, 0, 0, 0, 10, 10, 0, 0, 0,
@@ -309,17 +309,17 @@
1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
4, 4, 4, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 2, 1, 5, 6, 1, 7, 8, 9, 1,
- 1, 7, 10, 1, 11, 12, 7, 13, 14, 14,
- 14, 14, 14, 14, 14, 15, 15, 1, 1, 16,
- 17, 18, 1, 1, 19, 19, 19, 19, 20, 21,
- 22, 22, 22, 22, 22, 23, 22, 22, 22, 22,
- 22, 22, 22, 22, 24, 22, 22, 25, 22, 22,
- 1, 26, 1, 7, 22, 1, 19, 19, 19, 19,
-
- 20, 21, 22, 22, 22, 22, 22, 27, 22, 22,
- 22, 22, 22, 22, 22, 22, 24, 22, 22, 25,
- 22, 22, 1, 28, 1, 7, 1, 1, 1, 1,
+ 1, 2, 1, 5, 6, 7, 8, 9, 10, 1,
+ 1, 8, 11, 1, 12, 13, 8, 14, 15, 15,
+ 15, 15, 15, 15, 15, 16, 16, 1, 1, 17,
+ 18, 19, 1, 1, 20, 20, 20, 20, 21, 22,
+ 7, 7, 7, 7, 7, 23, 7, 7, 7, 7,
+ 7, 7, 7, 7, 24, 7, 7, 25, 7, 7,
+ 1, 26, 1, 8, 7, 1, 20, 20, 20, 20,
+
+ 21, 22, 7, 7, 7, 7, 7, 27, 7, 7,
+ 7, 7, 7, 7, 7, 7, 24, 7, 7, 25,
+ 7, 7, 1, 28, 1, 8, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
@@ -338,111 +338,113 @@
static yyconst int yy_meta[29] =
{ 0,
- 1, 1, 2, 1, 1, 1, 1, 1, 1, 3,
- 3, 4, 5, 5, 5, 1, 1, 1, 6, 7,
- 6, 8, 8, 8, 8, 1, 8, 1
+ 1, 1, 2, 1, 1, 1, 3, 1, 1, 1,
+ 4, 4, 5, 6, 6, 6, 1, 1, 1, 7,
+ 8, 7, 3, 3, 3, 1, 3, 1
} ;
static yyconst short int yy_base[88] =
{ 0,
- 0, 166, 22, 152, 151, 282, 39, 282, 26, 33,
- 138, 0, 39, 43, 124, 39, 36, 48, 52, 55,
- 41, 56, 54, 47, 73, 282, 0, 72, 282, 0,
- 116, 0, 78, 75, 122, 103, 282, 282, 106, 0,
- 97, 73, 76, 91, 65, 0, 0, 84, 81, 282,
- 132, 98, 84, 282, 117, 147, 282, 73, 134, 89,
- 100, 140, 172, 139, 134, 181, 282, 135, 106, 142,
- 168, 88, 52, 282, 282, 208, 216, 220, 228, 236,
- 244, 249, 254, 255, 260, 265, 273
+ 0, 147, 21, 140, 145, 284, 39, 284, 26, 0,
+ 32, 126, 40, 44, 115, 35, 36, 46, 50, 53,
+ 39, 61, 54, 79, 65, 284, 0, 0, 66, 284,
+ 0, 119, 79, 75, 123, 104, 284, 284, 107, 0,
+ 79, 73, 76, 76, 66, 0, 0, 85, 86, 284,
+ 133, 83, 91, 284, 99, 147, 284, 114, 122, 70,
+ 107, 141, 172, 151, 135, 181, 284, 137, 114, 157,
+ 149, 48, 45, 284, 284, 208, 214, 222, 230, 238,
+ 246, 250, 255, 256, 261, 267, 275
} ;
static yyconst short int yy_def[88] =
{ 0,
75, 1, 1, 3, 75, 75, 75, 75, 76, 77,
- 75, 78, 78, 79, 75, 75, 75, 75, 75, 19,
- 75, 75, 75, 75, 76, 75, 80, 77, 75, 81,
- 75, 78, 76, 77, 79, 79, 75, 75, 75, 39,
- 19, 82, 83, 75, 75, 84, 20, 76, 77, 75,
+ 78, 75, 77, 79, 75, 75, 75, 75, 75, 19,
+ 75, 75, 75, 75, 76, 75, 80, 77, 78, 75,
+ 81, 75, 76, 78, 79, 79, 75, 75, 75, 39,
+ 19, 82, 83, 75, 75, 84, 20, 76, 78, 75,
79, 51, 85, 75, 75, 75, 75, 84, 79, 51,
79, 79, 79, 51, 75, 75, 75, 86, 79, 63,
86, 87, 87, 75, 0, 75, 75, 75, 75, 75,
75, 75, 75, 75, 75, 75, 75
} ;
-static yyconst short int yy_nxt[311] =
+static yyconst short int yy_nxt[313] =
{ 0,
- 6, 7, 8, 7, 9, 6, 6, 6, 10, 6,
- 6, 11, 6, 6, 6, 6, 6, 6, 12, 12,
- 12, 12, 13, 12, 12, 6, 12, 6, 15, 16,
+ 6, 7, 8, 7, 9, 6, 10, 6, 6, 11,
+ 6, 6, 12, 6, 6, 6, 6, 6, 6, 10,
+ 10, 10, 13, 10, 10, 6, 10, 6, 15, 16,
26, 15, 17, 18, 19, 20, 20, 21, 15, 22,
- 24, 29, 24, 33, 36, 37, 38, 34, 24, 23,
- 24, 27, 38, 38, 74, 38, 38, 38, 30, 31,
- 39, 39, 39, 40, 41, 41, 42, 47, 47, 47,
- 38, 43, 38, 38, 44, 45, 46, 26, 44, 75,
- 29, 38, 26, 29, 40, 55, 55, 57, 26, 29,
- 74, 57, 43, 65, 65, 44, 45, 30, 27, 44,
-
- 30, 59, 37, 27, 36, 37, 30, 59, 37, 27,
- 64, 64, 64, 35, 57, 51, 52, 52, 39, 39,
- 39, 75, 35, 69, 37, 53, 54, 50, 54, 56,
- 56, 56, 54, 59, 37, 59, 37, 37, 68, 35,
- 38, 59, 37, 59, 60, 60, 66, 66, 66, 31,
- 75, 64, 64, 64, 61, 62, 63, 14, 61, 56,
- 56, 56, 69, 35, 61, 62, 69, 67, 61, 67,
- 37, 14, 72, 67, 37, 75, 75, 75, 75, 75,
- 75, 75, 75, 75, 70, 70, 70, 75, 75, 75,
- 70, 70, 70, 66, 66, 66, 75, 75, 75, 75,
-
- 75, 54, 75, 54, 75, 75, 75, 54, 25, 25,
- 25, 25, 25, 25, 25, 25, 28, 28, 28, 28,
- 28, 28, 28, 28, 32, 32, 32, 32, 35, 35,
- 35, 35, 35, 35, 35, 35, 48, 75, 48, 48,
- 48, 48, 48, 48, 49, 75, 49, 49, 49, 49,
- 49, 49, 42, 42, 75, 42, 56, 75, 56, 58,
- 58, 58, 66, 75, 66, 71, 71, 71, 71, 71,
- 71, 71, 71, 73, 73, 73, 73, 73, 73, 73,
- 73, 5, 75, 75, 75, 75, 75, 75, 75, 75,
+ 24, 30, 24, 38, 33, 36, 37, 74, 23, 34,
+ 74, 27, 38, 38, 38, 38, 38, 31, 32, 39,
+ 39, 39, 40, 41, 41, 42, 47, 47, 47, 26,
+ 43, 38, 44, 45, 46, 30, 44, 75, 38, 38,
+ 24, 38, 24, 26, 30, 40, 55, 55, 57, 26,
+ 27, 31, 57, 43, 35, 30, 64, 64, 64, 57,
+
+ 31, 65, 65, 75, 27, 36, 37, 35, 59, 37,
+ 27, 31, 56, 56, 56, 59, 37, 51, 52, 52,
+ 39, 39, 39, 59, 37, 37, 68, 53, 54, 54,
+ 69, 50, 38, 54, 59, 37, 44, 45, 32, 37,
+ 44, 35, 59, 37, 75, 14, 60, 60, 66, 66,
+ 66, 37, 14, 72, 75, 61, 62, 63, 59, 61,
+ 56, 56, 56, 69, 64, 64, 64, 69, 67, 67,
+ 75, 75, 75, 67, 37, 35, 75, 75, 75, 61,
+ 62, 75, 75, 61, 75, 70, 70, 70, 75, 75,
+ 75, 70, 70, 70, 66, 66, 66, 75, 75, 75,
+
+ 75, 75, 54, 54, 75, 75, 75, 54, 25, 25,
+ 25, 25, 25, 25, 25, 25, 28, 75, 75, 28,
+ 28, 28, 29, 29, 29, 29, 29, 29, 29, 29,
+ 35, 35, 35, 35, 35, 35, 35, 35, 48, 75,
+ 48, 48, 48, 48, 48, 48, 49, 75, 49, 49,
+ 49, 49, 49, 49, 42, 42, 75, 42, 56, 75,
+ 56, 58, 58, 58, 66, 75, 66, 71, 71, 71,
+ 71, 71, 71, 71, 71, 73, 73, 73, 73, 73,
+ 73, 73, 73, 5, 75, 75, 75, 75, 75, 75,
75, 75, 75, 75, 75, 75, 75, 75, 75, 75,
- 75, 75, 75, 75, 75, 75, 75, 75, 75, 75
+ 75, 75, 75, 75, 75, 75, 75, 75, 75, 75,
+ 75, 75
} ;
-static yyconst short int yy_chk[311] =
+static yyconst short int yy_chk[313] =
{ 0,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 3, 3,
9, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- 7, 10, 7, 13, 14, 14, 16, 13, 24, 3,
- 24, 9, 17, 17, 73, 16, 21, 21, 10, 18,
- 18, 18, 18, 19, 19, 19, 19, 20, 20, 20,
- 23, 19, 22, 22, 19, 19, 19, 25, 19, 20,
- 28, 23, 33, 34, 42, 43, 43, 45, 48, 49,
- 72, 45, 42, 53, 53, 58, 58, 28, 25, 58,
-
- 34, 61, 61, 33, 36, 36, 49, 69, 69, 48,
- 52, 52, 52, 60, 44, 36, 36, 36, 39, 39,
- 39, 41, 52, 61, 35, 39, 39, 31, 39, 55,
- 55, 55, 39, 51, 51, 59, 59, 68, 59, 68,
- 15, 62, 62, 70, 51, 51, 65, 65, 65, 11,
- 5, 64, 64, 64, 51, 51, 51, 4, 51, 56,
- 56, 56, 62, 64, 70, 70, 62, 56, 70, 56,
- 71, 2, 71, 56, 63, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 63, 63, 63, 0, 0, 0,
- 63, 63, 63, 66, 66, 66, 0, 0, 0, 0,
-
- 0, 66, 0, 66, 0, 0, 0, 66, 76, 76,
- 76, 76, 76, 76, 76, 76, 77, 77, 77, 77,
- 77, 77, 77, 77, 78, 78, 78, 78, 79, 79,
- 79, 79, 79, 79, 79, 79, 80, 0, 80, 80,
- 80, 80, 80, 80, 81, 0, 81, 81, 81, 81,
- 81, 81, 82, 82, 0, 82, 83, 0, 83, 84,
- 84, 84, 85, 0, 85, 86, 86, 86, 86, 86,
- 86, 86, 86, 87, 87, 87, 87, 87, 87, 87,
- 87, 75, 75, 75, 75, 75, 75, 75, 75, 75,
+ 7, 11, 7, 16, 13, 14, 14, 73, 3, 13,
+ 72, 9, 16, 17, 17, 21, 21, 11, 18, 18,
+ 18, 18, 19, 19, 19, 19, 20, 20, 20, 25,
+ 19, 23, 19, 19, 19, 29, 19, 20, 22, 22,
+ 24, 23, 24, 33, 34, 42, 43, 43, 45, 48,
+ 25, 29, 45, 42, 60, 49, 52, 52, 52, 44,
+
+ 34, 53, 53, 41, 33, 36, 36, 52, 61, 61,
+ 48, 49, 55, 55, 55, 69, 69, 36, 36, 36,
+ 39, 39, 39, 59, 59, 35, 59, 39, 39, 39,
+ 61, 32, 15, 39, 51, 51, 58, 58, 12, 68,
+ 58, 68, 62, 62, 5, 4, 51, 51, 65, 65,
+ 65, 71, 2, 71, 0, 51, 51, 51, 70, 51,
+ 56, 56, 56, 62, 64, 64, 64, 62, 56, 56,
+ 0, 0, 0, 56, 63, 64, 0, 0, 0, 70,
+ 70, 0, 0, 70, 0, 63, 63, 63, 0, 0,
+ 0, 63, 63, 63, 66, 66, 66, 0, 0, 0,
+
+ 0, 0, 66, 66, 0, 0, 0, 66, 76, 76,
+ 76, 76, 76, 76, 76, 76, 77, 0, 0, 77,
+ 77, 77, 78, 78, 78, 78, 78, 78, 78, 78,
+ 79, 79, 79, 79, 79, 79, 79, 79, 80, 0,
+ 80, 80, 80, 80, 80, 80, 81, 0, 81, 81,
+ 81, 81, 81, 81, 82, 82, 0, 82, 83, 0,
+ 83, 84, 84, 84, 85, 0, 85, 86, 86, 86,
+ 86, 86, 86, 86, 86, 87, 87, 87, 87, 87,
+ 87, 87, 87, 75, 75, 75, 75, 75, 75, 75,
75, 75, 75, 75, 75, 75, 75, 75, 75, 75,
- 75, 75, 75, 75, 75, 75, 75, 75, 75, 75
+ 75, 75, 75, 75, 75, 75, 75, 75, 75, 75,
+ 75, 75
} ;
static yy_state_type yy_last_accepting_state;
@@ -507,7 +509,7 @@
#define V2_TOKENS 1
/* We don't do multiple input files. */
-#line 511 "scripts/genksyms/lex.c"
+#line 513 "scripts/genksyms/lex.c"
/* Macros after this point can all be overridden by user definitions in
* section 1.
@@ -666,7 +668,7 @@
/* Keep track of our location in the original source files. */
-#line 670 "scripts/genksyms/lex.c"
+#line 672 "scripts/genksyms/lex.c"
if ( yy_init )
{
@@ -724,7 +726,7 @@
yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
++yy_cp;
}
- while ( yy_base[yy_current_state] != 282 );
+ while ( yy_base[yy_current_state] != 284 );
yy_find_action:
yy_act = yy_accept[yy_current_state];
@@ -836,7 +838,7 @@
#line 95 "scripts/genksyms/lex.l"
ECHO;
YY_BREAK
-#line 840 "scripts/genksyms/lex.c"
+#line 842 "scripts/genksyms/lex.c"
case YY_STATE_EOF(INITIAL):
case YY_STATE_EOF(V2_TOKENS):
yyterminate();
diff -Nru a/scripts/genksyms/lex.l b/scripts/genksyms/lex.l
--- a/scripts/genksyms/lex.l Sun Aug 3 13:14:50 2003
+++ b/scripts/genksyms/lex.l Sun Aug 3 13:14:50 2003
@@ -37,7 +37,7 @@
%}
-IDENT [A-Za-z_][A-Za-z0-9_]*
+IDENT [A-Za-z_\$][A-Za-z0-9_\$]*
O_INT 0[0-7]*
D_INT [1-9][0-9]*
diff -Nru a/scripts/kconfig/gconf.c b/scripts/kconfig/gconf.c
--- a/scripts/kconfig/gconf.c Sun Aug 3 13:14:52 2003
+++ b/scripts/kconfig/gconf.c Sun Aug 3 13:14:52 2003
@@ -56,7 +56,7 @@
GtkTreeStore *tree1, *tree2, *tree;
GtkTreeModel *model1, *model2;
-static GtkTreeIter *parents[256] = { 0 };
+static GtkTreeIter *parents[256];
static gint indent;
static struct menu *current; // current node for SINGLE view
@@ -110,7 +110,7 @@
const char *dbg_print_flags(int val)
{
- static char buf[256] = { 0 };
+ static char buf[256];
bzero(buf, 256);
@@ -577,7 +577,7 @@
on_window1_size_request(GtkWidget * widget,
GtkRequisition * requisition, gpointer user_data)
{
- static gint old_h = 0;
+ static gint old_h;
gint w, h;
if (widget->window == NULL)
@@ -1184,7 +1184,7 @@
/* Fill a row of strings */
static gchar **fill_row(struct menu *menu)
{
- static gchar *row[COL_NUMBER] = { 0 };
+ static gchar *row[COL_NUMBER];
struct symbol *sym = menu->sym;
const char *def;
int stype;
diff -Nru a/scripts/kconfig/mconf.c b/scripts/kconfig/mconf.c
--- a/scripts/kconfig/mconf.c Sun Aug 3 13:14:46 2003
+++ b/scripts/kconfig/mconf.c Sun Aug 3 13:14:46 2003
@@ -85,7 +85,7 @@
static char input_buf[4096];
static char filename[PATH_MAX+1] = ".config";
static char *args[1024], **argptr = args;
-static int indent = 0;
+static int indent;
static struct termios ios_org;
static int rows, cols;
static struct menu *current_menu;
diff -Nru a/scripts/lxdialog/textbox.c b/scripts/lxdialog/textbox.c
--- a/scripts/lxdialog/textbox.c Sun Aug 3 13:14:52 2003
+++ b/scripts/lxdialog/textbox.c Sun Aug 3 13:14:52 2003
@@ -27,8 +27,8 @@
static char *get_line (void);
static void print_position (WINDOW * win, int height, int width);
-static int hscroll = 0, fd, file_size, bytes_read;
-static int begin_reached = 1, end_reached = 0, page_length;
+static int hscroll, fd, file_size, bytes_read;
+static int begin_reached = 1, end_reached, page_length;
static char *buf, *page;
/*
diff -Nru a/scripts/makelst b/scripts/makelst
--- a/scripts/makelst Sun Aug 3 13:14:52 2003
+++ b/scripts/makelst Sun Aug 3 13:14:52 2003
@@ -28,4 +28,4 @@
else
t7=0
fi
-$3 --source --adjust-vma=$t7 $1
+$3 -r --source --adjust-vma=$t7 $1
diff -Nru a/scripts/makeman b/scripts/makeman
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/scripts/makeman Sun Aug 3 13:14:53 2003
@@ -0,0 +1,46 @@
+#!/usr/bin/perl
+
+use strict;
+
+## Copyright (C) Michael Still (mikal@stillhq.com)
+## Released under the terms of the GNU GPL
+##
+## A script to make or install the manpages extracted by split-man
+##
+## Arguements: $1 -- the word "convert" or "install"
+## $2 -- the directory containing the SGML files for the manpages
+## $3 -- the filename which contained the sgmldoc output
+## (I need this so I know which manpages to convert)
+
+my($LISTING);
+
+if($ARGV[0] eq ""){
+ die "Usage: makeman [convert | install] <dir> <file>\n";
+}
+
+if( ! -d "$ARGV[1]" ){
+ die "Output directory \"$ARGV[1]\" does not exist\n";
+}
+
+if($ARGV[0] eq "convert"){
+ open LISTING, "grep \"<refentrytitle>\" $ARGV[2] |";
+ while(<LISTING>){
+ s/<\/.*$//;
+ s/^.*>//;
+ s/\.sgml//;
+ s/struct //;
+ s/typedef //;
+
+ chomp;
+ print "Processing $_\n";
+ system("cd $ARGV[1]; docbook2man $_.sgml; gzip -f $_.9\n");
+ }
+}
+elsif($ARGV[0] eq "install"){
+ system("mkdir -p /usr/local/man/man9/; install $ARGV[1]/*.9.gz /usr/local/man/man9/");
+}
+else{
+ die "Usage: makeman [convert | install] <dir> <file>\n";
+}
+
+print "Done\n";
diff -Nru a/scripts/mkcompile_h b/scripts/mkcompile_h
--- a/scripts/mkcompile_h Sun Aug 3 13:14:53 2003
+++ b/scripts/mkcompile_h Sun Aug 3 13:14:53 2003
@@ -54,7 +54,7 @@
echo \#define LINUX_COMPILE_DOMAIN
fi
- echo \#define LINUX_COMPILER \"`$CC -v 2>&1 | tail -1`\"
+ echo \#define LINUX_COMPILER \"`$CC -v 2>&1 | tail -n 1`\"
) > .tmpcompile
# Only replace the real compile.h if the new one is different,
diff -Nru a/scripts/mkconfigs b/scripts/mkconfigs
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/scripts/mkconfigs Sun Aug 3 13:14:53 2003
@@ -0,0 +1,81 @@
+#!/bin/sh
+#
+# Copyright (C) 2002 Khalid Aziz <khalid_aziz@hp.com>
+# Copyright (C) 2002 Randy Dunlap <rddunlap@osdl.org>
+# Copyright (C) 2002 Al Stone <ahs3@fc.hp.com>
+# Copyright (C) 2002 Hewlett-Packard Company
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+#
+# Rules to generate ikconfig.h from linux/.config:
+# - Retain lines that begin with "CONFIG_"
+# - Retain lines that begin with "# CONFIG_"
+# - lines that use double-quotes must \\-escape-quote them
+
+
+kernel_version()
+{
+ KERNVER="`grep VERSION $1 | head -1 | cut -f3 -d' '`.`grep PATCHLEVEL $1 | head -1 | cut -f3 -d' '`.`grep SUBLEVEL $1 | head -1 | cut -f3 -d' '``grep EXTRAVERSION $1 | head -1 | cut -f3 -d' '`"
+}
+
+if [ $# -lt 2 ]
+then
+ echo "Usage: `basename $0` <configuration_file> <Makefile>"
+ exit 1
+fi
+
+config=$1
+makefile=$2
+
+echo "#ifndef _IKCONFIG_H"
+echo "#define _IKCONFIG_H"
+echo \
+"/*
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT. See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ *
+ * This file is generated automatically by scripts/mkconfigs. Do not edit.
+ *
+ */"
+
+echo "static char *ikconfig_built_with ="
+echo " \"`uname -s` `uname -r` `uname -v` `uname -m`\";"
+echo
+kernel_version $makefile
+echo "#ifdef CONFIG_IKCONFIG_PROC"
+echo "static char *ikconfig_config = "
+echo "#else"
+echo "static char *ikconfig_config __initdata __attribute__((unused)) = "
+echo "#endif"
+echo "\"CONFIG_BEGIN=n\\n\\"
+echo "`cat $config | sed 's/\"/\\\\\"/g' | grep "^#\? \?CONFIG_" | awk '{ print $0, "\\\\n\\\\" }' `"
+echo "CONFIG_END=n\";"
+echo "#endif /* _IKCONFIG_H */"
diff -Nru a/scripts/modpost.c b/scripts/modpost.c
--- a/scripts/modpost.c Sun Aug 3 13:14:46 2003
+++ b/scripts/modpost.c Sun Aug 3 13:14:46 2003
@@ -296,12 +296,14 @@
/* ignore global offset table */
if (strcmp(symname, "_GLOBAL_OFFSET_TABLE_") == 0)
break;
+#ifdef STT_REGISTER
if (info->hdr->e_machine == EM_SPARC ||
info->hdr->e_machine == EM_SPARCV9) {
/* Ignore register directives. */
if (ELF_ST_TYPE(sym->st_info) == STT_REGISTER)
break;
}
+#endif
if (memcmp(symname, MODULE_SYMBOL_PREFIX,
strlen(MODULE_SYMBOL_PREFIX)) == 0) {
diff -Nru a/scripts/pnmtologo.c b/scripts/pnmtologo.c
--- a/scripts/pnmtologo.c Sun Aug 3 13:14:44 2003
+++ b/scripts/pnmtologo.c Sun Aug 3 13:14:44 2003
@@ -73,7 +73,7 @@
static unsigned int logo_height;
static struct color **logo_data;
static struct color logo_clut[MAX_LINUX_LOGO_COLORS];
-static unsigned int logo_clutsize = 0;
+static unsigned int logo_clutsize;
static void die(const char *fmt, ...)
__attribute__ ((noreturn)) __attribute ((format (printf, 1, 2)));
@@ -259,7 +259,7 @@
fclose(out);
}
-static int write_hex_cnt = 0;
+static int write_hex_cnt;
static void write_hex(unsigned char byte)
{
diff -Nru a/scripts/split-man b/scripts/split-man
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/scripts/split-man Sun Aug 3 13:14:53 2003
@@ -0,0 +1,112 @@
+#!/usr/bin/perl
+
+use strict;
+
+## Copyright (C) Michael Still (mikal@stillhq.com)
+## Released under the terms of the GNU GPL
+##
+## Hoon through the specified DocBook SGML file, and split out the
+## man pages. These can then be processed into groff format, and
+## installed if desired...
+##
+## Arguements: $1 -- the name of the sgml file
+## $2 -- the directory to put the generated SGML files in
+## $3 -- kernel version
+
+my($SGML, $REF, $front, $refdata, $mode, $filename);
+
+if(($ARGV[0] eq "") || ($ARGV[1] eq "") || ($ARGV[2] eq "")){
+ die "Usage: split-man <sgml file> <output dir> <kernel version>\n";
+}
+
+open SGML, "< $ARGV[0]" or die "Could not open input file \"$ARGV[0]\"\n";
+if( ! -d "$ARGV[1]" ){
+ die "Output directory \"$ARGV[1]\" does not exist\n";
+}
+
+# Possible modes:
+# 0: Looking for input I care about
+# 1: Inside book front matter
+# 2: Inside a refentry
+# 3: Inside a refentry, and we know the filename
+
+$mode = 0;
+$refdata = "";
+$front = "";
+while(<SGML>){
+ # Starting modes
+ if(/<legalnotice>/){
+ $mode = 1;
+ }
+ elsif(/<refentry>/){
+ $mode = 2;
+ }
+ elsif(/<refentrytitle><phrase[^>]*>([^<]*)<.*$/){
+ $mode = 3;
+ $filename = $1;
+
+ $filename =~ s/struct //;
+ $filename =~ s/typedef //;
+
+ print "Found manpage for $filename\n";
+ open REF, "> $ARGV[1]/$filename.sgml" or
+ die "Couldn't open output file \"$ARGV[1]/$filename.sgml\": $!\n";
+ print REF "<!DOCTYPE refentry PUBLIC \"-//Davenport//DTD DocBook V3.0//EN\">\n\n";
+ print REF "$refdata";
+ $refdata = "";
+ }
+
+ # Extraction
+ if($mode == 1){
+ $front = "$front$_";
+ }
+ elsif($mode == 2){
+ $refdata = "$refdata$_";
+ }
+ elsif($mode == 3){
+ # There are some fixups which need to be applied
+ if(/<\/refmeta>/){
+ print REF "<manvolnum>9</manvolnum>\n";
+ }
+ if(/<\/refentry>/){
+ $front =~ s/<legalnotice>//;
+ $front =~ s/<\/legalnotice>//;
+ print REF <<EOF;
+<refsect1><title>About this document</title>
+$front
+<para>
+If you have comments on the formatting of this manpage, then please contact
+Michael Still (mikal\@stillhq.com).
+</para>
+
+<para>
+This documentation was generated with kernel version $ARGV[2].
+</para>
+</refsect1>
+EOF
+ }
+
+ # For some reason, we title the synopsis twice in the main DocBook
+ if(! /<title>Synopsis<\/title>/){
+ if(/<refentrytitle>/){
+ s/struct //;
+ s/typedef //;
+ }
+
+ print REF "$_";
+ }
+ }
+
+ # Ending modes
+ if(/<\/legalnotice>/){
+ $mode = 0;
+ }
+ elsif(/<\/refentry>/){
+ $mode = 0;
+ close REF;
+ }
+}
+
+# And make sure we don't process this unnessesarily
+$ARGV[0] =~ s/\.sgml/.9/;
+`touch $ARGV[0]`;
diff -Nru a/security/Kconfig b/security/Kconfig
--- a/security/Kconfig Sun Aug 3 13:14:50 2003
+++ b/security/Kconfig Sun Aug 3 13:14:50 2003
@@ -44,5 +44,7 @@
If you are unsure how to answer this question, answer N.
+source security/selinux/Kconfig
+
endmenu
diff -Nru a/security/Makefile b/security/Makefile
--- a/security/Makefile Sun Aug 3 13:14:50 2003
+++ b/security/Makefile Sun Aug 3 13:14:50 2003
@@ -2,6 +2,8 @@
# Makefile for the kernel security code
#
+subdir-$(CONFIG_SECURITY_SELINUX) += selinux
+
# if we don't select a security model, use the default capabilities
ifneq ($(CONFIG_SECURITY),y)
obj-y += capability.o
@@ -9,5 +11,9 @@
# Object file lists
obj-$(CONFIG_SECURITY) += security.o dummy.o
+# Must precede capability.o in order to stack properly.
+ifeq ($(CONFIG_SECURITY_SELINUX),y)
+ obj-$(CONFIG_SECURITY_SELINUX) += selinux/built-in.o
+endif
obj-$(CONFIG_SECURITY_CAPABILITIES) += capability.o
obj-$(CONFIG_SECURITY_ROOTPLUG) += root_plug.o
diff -Nru a/security/selinux/Kconfig b/security/selinux/Kconfig
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/Kconfig Sun Aug 3 13:14:53 2003
@@ -0,0 +1,34 @@
+config SECURITY_SELINUX
+ bool "NSA SELinux Support"
+ depends on SECURITY
+ default n
+ help
+ This enables NSA Security-Enhanced Linux (SELinux).
+ You will also need a policy configuration and a labeled filesystem.
+ You can obtain the policy compiler (checkpolicy), the utility for
+ labeling filesystems (setfiles), and an example policy configuration
+ from http://www.nsa.gov/selinux.
+ If you are unsure how to answer this question, answer N.
+
+config SECURITY_SELINUX_DEVELOP
+ bool "NSA SELinux Development Support"
+ depends on SECURITY_SELINUX
+ default y
+ help
+ This enables the development support option of NSA SELinux,
+ which is useful for experimenting with SELinux and developing
+ policies. If unsure, say Y. With this option enabled, the
+ kernel will start in permissive mode (log everything, deny nothing)
+ unless you specify enforcing=1 on the kernel command line. You
+ can interactively toggle the kernel between enforcing mode and
+ permissive mode (if permitted by the policy) via /selinux/enforce.
+
+config SECURITY_SELINUX_MLS
+ bool "NSA SELinux MLS policy (EXPERIMENTAL)"
+ depends on SECURITY_SELINUX && EXPERIMENTAL
+ default n
+ help
+ This enables the NSA SELinux Multi-Level Security (MLS) policy in
+ addition to the default RBAC/TE policy. This policy is
+ experimental and has not been configured for use. Unless you
+ specifically want to experiment with MLS, say N.
diff -Nru a/security/selinux/Makefile b/security/selinux/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,10 @@
+#
+# Makefile for building the SELinux module as part of the kernel tree.
+#
+
+obj-$(CONFIG_SECURITY_SELINUX) := selinux.o ss/
+
+selinux-objs := avc.o hooks.o selinuxfs.o
+
+EXTRA_CFLAGS += -Isecurity/selinux/include
+
diff -Nru a/security/selinux/avc.c b/security/selinux/avc.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/avc.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,1115 @@
+/*
+ * Implementation of the kernel access vector cache (AVC).
+ *
+ * Authors: Stephen Smalley, <sds@epoch.ncsc.mil>
+ * James Morris <jmorris@redhat.com>
+ *
+ * Copyright (C) 2003 Red Hat, Inc., James Morris <jmorris@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2,
+ * as published by the Free Software Foundation.
+ */
+#include <linux/types.h>
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/dcache.h>
+#include <linux/skbuff.h>
+#include <net/sock.h>
+#include <linux/un.h>
+#include <net/af_unix.h>
+#include <linux/ip.h>
+#include <linux/udp.h>
+#include <linux/tcp.h>
+#include "avc.h"
+#include "avc_ss.h"
+#include "class_to_string.h"
+#include "common_perm_to_string.h"
+#include "av_inherit.h"
+#include "av_perm_to_string.h"
+#include "objsec.h"
+
+#define AVC_CACHE_SLOTS 512
+#define AVC_CACHE_MAXNODES 410
+
+struct avc_entry {
+ u32 ssid;
+ u32 tsid;
+ u16 tclass;
+ struct av_decision avd;
+ int used; /* used recently */
+};
+
+struct avc_node {
+ struct avc_entry ae;
+ struct avc_node *next;
+};
+
+struct avc_cache {
+ struct avc_node *slots[AVC_CACHE_SLOTS];
+ u32 lru_hint; /* LRU hint for reclaim scan */
+ u32 active_nodes;
+ u32 latest_notif; /* latest revocation notification */
+};
+
+struct avc_callback_node {
+ int (*callback) (u32 event, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms,
+ u32 *out_retained);
+ u32 events;
+ u32 ssid;
+ u32 tsid;
+ u16 tclass;
+ u32 perms;
+ struct avc_callback_node *next;
+};
+
+static spinlock_t avc_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t avc_log_lock = SPIN_LOCK_UNLOCKED;
+static struct avc_node *avc_node_freelist = NULL;
+static struct avc_cache avc_cache;
+static char *avc_audit_buffer = NULL;
+static unsigned avc_cache_stats[AVC_NSTATS];
+static struct avc_callback_node *avc_callbacks = NULL;
+static unsigned int avc_log_level = 4; /* default: KERN_WARNING */
+static char avc_level_string[4] = "< >";
+
+static inline int avc_hash(u32 ssid, u32 tsid, u16 tclass)
+{
+ return (ssid ^ (tsid<<2) ^ (tclass<<4)) & (AVC_CACHE_SLOTS - 1);
+}
+
+/**
+ * avc_dump_av - Display an access vector in human-readable form.
+ * @tclass: target security class
+ * @av: access vector
+ */
+void avc_dump_av(u16 tclass, u32 av)
+{
+ char **common_pts = 0;
+ u32 common_base = 0;
+ int i, i2, perm;
+
+ if (av == 0) {
+ printk(" null");
+ return;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(av_inherit); i++) {
+ if (av_inherit[i].tclass == tclass) {
+ common_pts = av_inherit[i].common_pts;
+ common_base = av_inherit[i].common_base;
+ break;
+ }
+ }
+
+ printk(" {");
+ i = 0;
+ perm = 1;
+ while (perm < common_base) {
+ if (perm & av)
+ printk(" %s", common_pts[i]);
+ i++;
+ perm <<= 1;
+ }
+
+ while (i < sizeof(av) * 8) {
+ if (perm & av) {
+ for (i2 = 0; i2 < ARRAY_SIZE(av_perm_to_string); i2++) {
+ if ((av_perm_to_string[i2].tclass == tclass) &&
+ (av_perm_to_string[i2].value == perm))
+ break;
+ }
+ if (i2 < ARRAY_SIZE(av_perm_to_string))
+ printk(" %s", av_perm_to_string[i2].name);
+ }
+ i++;
+ perm <<= 1;
+ }
+
+ printk(" }");
+}
+
+/**
+ * avc_dump_query - Display a SID pair and a class in human-readable form.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ */
+void avc_dump_query(u32 ssid, u32 tsid, u16 tclass)
+{
+ int rc;
+ char *scontext;
+ u32 scontext_len;
+
+ rc = security_sid_to_context(ssid, &scontext, &scontext_len);
+ if (rc)
+ printk("ssid=%d", ssid);
+ else {
+ printk("scontext=%s", scontext);
+ kfree(scontext);
+ }
+
+ rc = security_sid_to_context(tsid, &scontext, &scontext_len);
+ if (rc)
+ printk(" tsid=%d", tsid);
+ else {
+ printk(" tcontext=%s", scontext);
+ kfree(scontext);
+ }
+ printk(" tclass=%s", class_to_string[tclass]);
+}
+
+/**
+ * avc_init - Initialize the AVC.
+ *
+ * Initialize the access vector cache.
+ */
+void avc_init(void)
+{
+ struct avc_node *new;
+ int i;
+
+ for (i = 0; i < AVC_NSTATS; i++)
+ avc_cache_stats[i] = 0;
+
+ for (i = 0; i < AVC_CACHE_SLOTS; i++)
+ avc_cache.slots[i] = 0;
+ avc_cache.lru_hint = 0;
+ avc_cache.active_nodes = 0;
+ avc_cache.latest_notif = 0;
+
+ for (i = 0; i < AVC_CACHE_MAXNODES; i++) {
+ new = kmalloc(sizeof(*new), GFP_ATOMIC);
+ if (!new) {
+ printk(KERN_WARNING "avc: only able to allocate "
+ "%d entries\n", i);
+ break;
+ }
+ memset(new, 0, sizeof(*new));
+ new->next = avc_node_freelist;
+ avc_node_freelist = new;
+ }
+
+ avc_audit_buffer = (char *)__get_free_page(GFP_ATOMIC);
+ if (!avc_audit_buffer)
+ panic("AVC: unable to allocate audit buffer\n");
+
+ avc_level_string[1] = '0' + avc_log_level;
+}
+
+#if 0
+static void avc_hash_eval(char *tag)
+{
+ int i, chain_len, max_chain_len, slots_used;
+ struct avc_node *node;
+ unsigned long flags;
+
+ spin_lock_irqsave(&avc_lock,flags);
+
+ slots_used = 0;
+ max_chain_len = 0;
+ for (i = 0; i < AVC_CACHE_SLOTS; i++) {
+ node = avc_cache.slots[i];
+ if (node) {
+ slots_used++;
+ chain_len = 0;
+ while (node) {
+ chain_len++;
+ node = node->next;
+ }
+ if (chain_len > max_chain_len)
+ max_chain_len = chain_len;
+ }
+ }
+
+ spin_unlock_irqrestore(&avc_lock,flags);
+
+ printk(KERN_INFO "\n");
+ printk(KERN_INFO "%s avc: %d entries and %d/%d buckets used, longest "
+ "chain length %d\n", tag, avc_cache.active_nodes, slots_used,
+ AVC_CACHE_SLOTS, max_chain_len);
+}
+#else
+static inline void avc_hash_eval(char *tag)
+{ }
+#endif
+
+static inline struct avc_node *avc_reclaim_node(void)
+{
+ struct avc_node *prev, *cur;
+ int hvalue, try;
+
+ hvalue = avc_cache.lru_hint;
+ for (try = 0; try < 2; try++) {
+ do {
+ prev = NULL;
+ cur = avc_cache.slots[hvalue];
+ while (cur) {
+ if (!cur->ae.used)
+ goto found;
+
+ cur->ae.used = 0;
+
+ prev = cur;
+ cur = cur->next;
+ }
+ hvalue = (hvalue + 1) & (AVC_CACHE_SLOTS - 1);
+ } while (hvalue != avc_cache.lru_hint);
+ }
+
+ panic("avc_reclaim_node");
+
+found:
+ avc_cache.lru_hint = hvalue;
+
+ if (prev == NULL)
+ avc_cache.slots[hvalue] = cur->next;
+ else
+ prev->next = cur->next;
+
+ return cur;
+}
+
+static inline struct avc_node *avc_claim_node(u32 ssid,
+ u32 tsid, u16 tclass)
+{
+ struct avc_node *new;
+ int hvalue;
+
+ hvalue = avc_hash(ssid, tsid, tclass);
+ if (avc_node_freelist) {
+ new = avc_node_freelist;
+ avc_node_freelist = avc_node_freelist->next;
+ avc_cache.active_nodes++;
+ } else {
+ new = avc_reclaim_node();
+ if (!new)
+ goto out;
+ }
+
+ new->ae.used = 1;
+ new->ae.ssid = ssid;
+ new->ae.tsid = tsid;
+ new->ae.tclass = tclass;
+ new->next = avc_cache.slots[hvalue];
+ avc_cache.slots[hvalue] = new;
+
+out:
+ return new;
+}
+
+static inline struct avc_node *avc_search_node(u32 ssid, u32 tsid,
+ u16 tclass, int *probes)
+{
+ struct avc_node *cur;
+ int hvalue;
+ int tprobes = 1;
+
+ hvalue = avc_hash(ssid, tsid, tclass);
+ cur = avc_cache.slots[hvalue];
+ while (cur != NULL &&
+ (ssid != cur->ae.ssid ||
+ tclass != cur->ae.tclass ||
+ tsid != cur->ae.tsid)) {
+ tprobes++;
+ cur = cur->next;
+ }
+
+ if (cur == NULL) {
+ /* cache miss */
+ goto out;
+ }
+
+ /* cache hit */
+ if (probes)
+ *probes = tprobes;
+
+ cur->ae.used = 1;
+
+out:
+ return cur;
+}
+
+/**
+ * avc_lookup - Look up an AVC entry.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @requested: requested permissions, interpreted based on @tclass
+ * @aeref: AVC entry reference
+ *
+ * Look up an AVC entry that is valid for the
+ * @requested permissions between the SID pair
+ * (@ssid, @tsid), interpreting the permissions
+ * based on @tclass. If a valid AVC entry exists,
+ * then this function updates @aeref to refer to the
+ * entry and returns %0. Otherwise, this function
+ * returns -%ENOENT.
+ */
+int avc_lookup(u32 ssid, u32 tsid, u16 tclass,
+ u32 requested, struct avc_entry_ref *aeref)
+{
+ struct avc_node *node;
+ int probes, rc = 0;
+
+ avc_cache_stats_incr(AVC_CAV_LOOKUPS);
+ node = avc_search_node(ssid, tsid, tclass,&probes);
+
+ if (node && ((node->ae.avd.decided & requested) == requested)) {
+ avc_cache_stats_incr(AVC_CAV_HITS);
+ avc_cache_stats_add(AVC_CAV_PROBES,probes);
+ aeref->ae = &node->ae;
+ goto out;
+ }
+
+ avc_cache_stats_incr(AVC_CAV_MISSES);
+ rc = -ENOENT;
+out:
+ return rc;
+}
+
+/**
+ * avc_insert - Insert an AVC entry.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @ae: AVC entry
+ * @aeref: AVC entry reference
+ *
+ * Insert an AVC entry for the SID pair
+ * (@ssid, @tsid) and class @tclass.
+ * The access vectors and the sequence number are
+ * normally provided by the security server in
+ * response to a security_compute_av() call. If the
+ * sequence number @ae->avd.seqno is not less than the latest
+ * revocation notification, then the function copies
+ * the access vectors into a cache entry, updates
+ * @aeref to refer to the entry, and returns %0.
+ * Otherwise, this function returns -%EAGAIN.
+ */
+int avc_insert(u32 ssid, u32 tsid, u16 tclass,
+ struct avc_entry *ae, struct avc_entry_ref *aeref)
+{
+ struct avc_node *node;
+ int rc = 0;
+
+ if (ae->avd.seqno < avc_cache.latest_notif) {
+ printk(KERN_WARNING "avc: seqno %d < latest_notif %d\n",
+ ae->avd.seqno, avc_cache.latest_notif);
+ rc = -EAGAIN;
+ goto out;
+ }
+
+ node = avc_claim_node(ssid, tsid, tclass);
+ if (!node) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ node->ae.avd.allowed = ae->avd.allowed;
+ node->ae.avd.decided = ae->avd.decided;
+ node->ae.avd.auditallow = ae->avd.auditallow;
+ node->ae.avd.auditdeny = ae->avd.auditdeny;
+ node->ae.avd.seqno = ae->avd.seqno;
+ aeref->ae = &node->ae;
+out:
+ return rc;
+}
+
+static inline void avc_print_ipv4_addr(u32 addr, u16 port, char *name1, char *name2)
+{
+ if (addr)
+ printk(" %s=%d.%d.%d.%d", name1, NIPQUAD(addr));
+ if (port)
+ printk(" %s=%d", name2, ntohs(port));
+}
+
+/*
+ * Copied from net/core/utils.c:net_ratelimit and modified for
+ * use by the AVC audit facility.
+ */
+#define AVC_MSG_COST 5*HZ
+#define AVC_MSG_BURST 10*5*HZ
+
+/*
+ * This enforces a rate limit: not more than one kernel message
+ * every 5secs to make a denial-of-service attack impossible.
+ */
+static int avc_ratelimit(void)
+{
+ static spinlock_t ratelimit_lock = SPIN_LOCK_UNLOCKED;
+ static unsigned long toks = 10*5*HZ;
+ static unsigned long last_msg;
+ static int missed, rc = 0;
+ unsigned long flags;
+ unsigned long now = jiffies;
+
+ spin_lock_irqsave(&ratelimit_lock, flags);
+ toks += now - last_msg;
+ last_msg = now;
+ if (toks > AVC_MSG_BURST)
+ toks = AVC_MSG_BURST;
+ if (toks >= AVC_MSG_COST) {
+ int lost = missed;
+ missed = 0;
+ toks -= AVC_MSG_COST;
+ spin_unlock_irqrestore(&ratelimit_lock, flags);
+ if (lost)
+ printk(KERN_WARNING "AVC: %d messages suppressed.\n",
+ lost);
+ rc = 1;
+ goto out;
+ }
+ missed++;
+ spin_unlock_irqrestore(&ratelimit_lock, flags);
+out:
+ return rc;
+}
+
+static inline int check_avc_ratelimit(void)
+{
+ if (selinux_enforcing)
+ return avc_ratelimit();
+ else {
+ /* If permissive, then never suppress messages. */
+ return 1;
+ }
+}
+
+/**
+ * avc_audit - Audit the granting or denial of permissions.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @requested: requested permissions
+ * @avd: access vector decisions
+ * @result: result from avc_has_perm_noaudit
+ * @a: auxiliary audit data
+ *
+ * Audit the granting or denial of permissions in accordance
+ * with the policy. This function is typically called by
+ * avc_has_perm() after a permission check, but can also be
+ * called directly by callers who use avc_has_perm_noaudit()
+ * in order to separate the permission check from the auditing.
+ * For example, this separation is useful when the permission check must
+ * be performed under a lock, to allow the lock to be released
+ * before calling the auditing code.
+ */
+void avc_audit(u32 ssid, u32 tsid,
+ u16 tclass, u32 requested,
+ struct av_decision *avd, int result, struct avc_audit_data *a)
+{
+ struct task_struct *tsk = current;
+ struct inode *inode = NULL;
+ char *p;
+ u32 denied, audited;
+
+ denied = requested & ~avd->allowed;
+ if (denied) {
+ audited = denied;
+ if (!(audited & avd->auditdeny))
+ return;
+ } else if (result) {
+ audited = denied = requested;
+ } else {
+ audited = requested;
+ if (!(audited & avd->auditallow))
+ return;
+ }
+
+ if (!check_avc_ratelimit())
+ return;
+
+ /* prevent overlapping printks */
+ spin_lock_irq(&avc_log_lock);
+
+ printk("%s\n", avc_level_string);
+ printk("%savc: %s ", avc_level_string, denied ? "denied" : "granted");
+ avc_dump_av(tclass,audited);
+ printk(" for ");
+ if (a && a->tsk)
+ tsk = a->tsk;
+ if (tsk && tsk->pid) {
+ struct mm_struct *mm;
+ struct vm_area_struct *vma;
+ printk(" pid=%d", tsk->pid);
+ if (tsk == current)
+ mm = current->mm;
+ else
+ mm = get_task_mm(tsk);
+ if (mm) {
+ if (down_read_trylock(&mm->mmap_sem)) {
+ vma = mm->mmap;
+ while (vma) {
+ if ((vma->vm_flags & VM_EXECUTABLE) &&
+ vma->vm_file) {
+ p = d_path(vma->vm_file->f_dentry,
+ vma->vm_file->f_vfsmnt,
+ avc_audit_buffer,
+ PAGE_SIZE);
+ printk(" exe=%s", p);
+ break;
+ }
+ vma = vma->vm_next;
+ }
+ up_read(&mm->mmap_sem);
+ }
+ if (tsk != current)
+ mmput(mm);
+ } else {
+ printk(" comm=%s", tsk->comm);
+ }
+ }
+ if (a) {
+ switch (a->type) {
+ case AVC_AUDIT_DATA_IPC:
+ printk(" key=%d", a->u.ipc_id);
+ break;
+ case AVC_AUDIT_DATA_CAP:
+ printk(" capability=%d", a->u.cap);
+ break;
+ case AVC_AUDIT_DATA_FS:
+ if (a->u.fs.dentry) {
+ if (a->u.fs.mnt) {
+ p = d_path(a->u.fs.dentry,
+ a->u.fs.mnt,
+ avc_audit_buffer,
+ PAGE_SIZE);
+ if (p)
+ printk(" path=%s", p);
+ }
+ inode = a->u.fs.dentry->d_inode;
+ } else if (a->u.fs.inode) {
+ inode = a->u.fs.inode;
+ }
+ if (inode)
+ printk(" dev=%s ino=%ld",
+ inode->i_sb->s_id, inode->i_ino);
+ break;
+ case AVC_AUDIT_DATA_NET:
+ if (a->u.net.sk) {
+ struct sock *sk = a->u.net.sk;
+ struct unix_sock *u;
+ struct inet_opt *inet;
+
+ switch (sk->sk_family) {
+ case AF_INET:
+ inet = inet_sk(sk);
+ avc_print_ipv4_addr(inet->rcv_saddr,
+ inet->sport,
+ "laddr", "lport");
+ avc_print_ipv4_addr(inet->daddr,
+ inet->dport,
+ "faddr", "fport");
+ break;
+ case AF_UNIX:
+ u = unix_sk(sk);
+ if (u->dentry) {
+ p = d_path(u->dentry,
+ u->mnt,
+ avc_audit_buffer,
+ PAGE_SIZE);
+ printk(" path=%s", p);
+ } else if (u->addr) {
+ p = avc_audit_buffer;
+ memcpy(p,
+ u->addr->name->sun_path,
+ u->addr->len-sizeof(short));
+ if (*p == 0) {
+ *p = '@';
+ p += u->addr->len-sizeof(short);
+ *p = 0;
+ }
+ printk(" path=%s",
+ avc_audit_buffer);
+ }
+ break;
+ }
+ }
+ if (a->u.net.daddr) {
+ printk(" daddr=%d.%d.%d.%d",
+ NIPQUAD(a->u.net.daddr));
+ if (a->u.net.port)
+ printk(" dest=%d", a->u.net.port);
+ } else if (a->u.net.port)
+ printk(" port=%d", a->u.net.port);
+ if (a->u.net.skb) {
+ struct sk_buff *skb = a->u.net.skb;
+
+ if ((skb->protocol == htons(ETH_P_IP)) &&
+ skb->nh.iph) {
+ u16 source = 0, dest = 0;
+ u8 protocol = skb->nh.iph->protocol;
+
+
+ if (protocol == IPPROTO_TCP &&
+ skb->h.th) {
+ source = skb->h.th->source;
+ dest = skb->h.th->dest;
+ }
+ if (protocol == IPPROTO_UDP &&
+ skb->h.uh) {
+ source = skb->h.uh->source;
+ dest = skb->h.uh->dest;
+ }
+
+ avc_print_ipv4_addr(skb->nh.iph->saddr,
+ source,
+ "saddr", "source");
+ avc_print_ipv4_addr(skb->nh.iph->daddr,
+ dest,
+ "daddr", "dest");
+ }
+ }
+ if (a->u.net.netif)
+ printk(" netif=%s", a->u.net.netif);
+ break;
+ }
+ }
+ printk(" ");
+ avc_dump_query(ssid, tsid, tclass);
+ printk("\n");
+
+ spin_unlock_irq(&avc_log_lock);
+}
+
+/**
+ * avc_add_callback - Register a callback for security events.
+ * @callback: callback function
+ * @events: security events
+ * @ssid: source security identifier or %SECSID_WILD
+ * @tsid: target security identifier or %SECSID_WILD
+ * @tclass: target security class
+ * @perms: permissions
+ *
+ * Register a callback function for events in the set @events
+ * related to the SID pair (@ssid, @tsid) and
+ * and the permissions @perms, interpreting
+ * @perms based on @tclass. Returns %0 on success or
+ * -%ENOMEM if insufficient memory exists to add the callback.
+ */
+int avc_add_callback(int (*callback)(u32 event, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms,
+ u32 *out_retained),
+ u32 events, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms)
+{
+ struct avc_callback_node *c;
+ int rc = 0;
+
+ c = kmalloc(sizeof(*c), GFP_ATOMIC);
+ if (!c) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ c->callback = callback;
+ c->events = events;
+ c->ssid = ssid;
+ c->tsid = tsid;
+ c->perms = perms;
+ c->next = avc_callbacks;
+ avc_callbacks = c;
+out:
+ return rc;
+}
+
+static inline int avc_sidcmp(u32 x, u32 y)
+{
+ return (x == y || x == SECSID_WILD || y == SECSID_WILD);
+}
+
+static inline void avc_update_node(u32 event, struct avc_node *node, u32 perms)
+{
+ switch (event) {
+ case AVC_CALLBACK_GRANT:
+ node->ae.avd.allowed |= perms;
+ break;
+ case AVC_CALLBACK_TRY_REVOKE:
+ case AVC_CALLBACK_REVOKE:
+ node->ae.avd.allowed &= ~perms;
+ break;
+ case AVC_CALLBACK_AUDITALLOW_ENABLE:
+ node->ae.avd.auditallow |= perms;
+ break;
+ case AVC_CALLBACK_AUDITALLOW_DISABLE:
+ node->ae.avd.auditallow &= ~perms;
+ break;
+ case AVC_CALLBACK_AUDITDENY_ENABLE:
+ node->ae.avd.auditdeny |= perms;
+ break;
+ case AVC_CALLBACK_AUDITDENY_DISABLE:
+ node->ae.avd.auditdeny &= ~perms;
+ break;
+ }
+}
+
+static int avc_update_cache(u32 event, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms)
+{
+ struct avc_node *node;
+ int i;
+ unsigned long flags;
+
+ spin_lock_irqsave(&avc_lock,flags);
+
+ if (ssid == SECSID_WILD || tsid == SECSID_WILD) {
+ /* apply to all matching nodes */
+ for (i = 0; i < AVC_CACHE_SLOTS; i++) {
+ for (node = avc_cache.slots[i]; node;
+ node = node->next) {
+ if (avc_sidcmp(ssid, node->ae.ssid) &&
+ avc_sidcmp(tsid, node->ae.tsid) &&
+ tclass == node->ae.tclass) {
+ avc_update_node(event,node,perms);
+ }
+ }
+ }
+ } else {
+ /* apply to one node */
+ node = avc_search_node(ssid, tsid, tclass, 0);
+ if (node) {
+ avc_update_node(event,node,perms);
+ }
+ }
+
+ spin_unlock_irqrestore(&avc_lock,flags);
+
+ return 0;
+}
+
+static int avc_control(u32 event, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms,
+ u32 seqno, u32 *out_retained)
+{
+ struct avc_callback_node *c;
+ u32 tretained = 0, cretained = 0;
+ int rc = 0;
+ unsigned long flags;
+
+ /*
+ * try_revoke only removes permissions from the cache
+ * state if they are not retained by the object manager.
+ * Hence, try_revoke must wait until after the callbacks have
+ * been invoked to update the cache state.
+ */
+ if (event != AVC_CALLBACK_TRY_REVOKE)
+ avc_update_cache(event,ssid,tsid,tclass,perms);
+
+ for (c = avc_callbacks; c; c = c->next)
+ {
+ if ((c->events & event) &&
+ avc_sidcmp(c->ssid, ssid) &&
+ avc_sidcmp(c->tsid, tsid) &&
+ c->tclass == tclass &&
+ (c->perms & perms)) {
+ cretained = 0;
+ rc = c->callback(event, ssid, tsid, tclass,
+ (c->perms & perms),
+ &cretained);
+ if (rc)
+ goto out;
+ tretained |= cretained;
+ }
+ }
+
+ if (event == AVC_CALLBACK_TRY_REVOKE) {
+ /* revoke any unretained permissions */
+ perms &= ~tretained;
+ avc_update_cache(event,ssid,tsid,tclass,perms);
+ *out_retained = tretained;
+ }
+
+ spin_lock_irqsave(&avc_lock,flags);
+ if (seqno > avc_cache.latest_notif)
+ avc_cache.latest_notif = seqno;
+ spin_unlock_irqrestore(&avc_lock,flags);
+
+out:
+ return rc;
+}
+
+/**
+ * avc_ss_grant - Grant previously denied permissions.
+ * @ssid: source security identifier or %SECSID_WILD
+ * @tsid: target security identifier or %SECSID_WILD
+ * @tclass: target security class
+ * @perms: permissions to grant
+ * @seqno: policy sequence number
+ */
+int avc_ss_grant(u32 ssid, u32 tsid, u16 tclass,
+ u32 perms, u32 seqno)
+{
+ return avc_control(AVC_CALLBACK_GRANT,
+ ssid, tsid, tclass, perms, seqno, 0);
+}
+
+/**
+ * avc_ss_try_revoke - Try to revoke previously granted permissions.
+ * @ssid: source security identifier or %SECSID_WILD
+ * @tsid: target security identifier or %SECSID_WILD
+ * @tclass: target security class
+ * @perms: permissions to grant
+ * @seqno: policy sequence number
+ * @out_retained: subset of @perms that are retained
+ *
+ * Try to revoke previously granted permissions, but
+ * only if they are not retained as migrated permissions.
+ * Return the subset of permissions that are retained via @out_retained.
+ */
+int avc_ss_try_revoke(u32 ssid, u32 tsid, u16 tclass,
+ u32 perms, u32 seqno, u32 *out_retained)
+{
+ return avc_control(AVC_CALLBACK_TRY_REVOKE,
+ ssid, tsid, tclass, perms, seqno, out_retained);
+}
+
+/**
+ * avc_ss_revoke - Revoke previously granted permissions.
+ * @ssid: source security identifier or %SECSID_WILD
+ * @tsid: target security identifier or %SECSID_WILD
+ * @tclass: target security class
+ * @perms: permissions to grant
+ * @seqno: policy sequence number
+ *
+ * Revoke previously granted permissions, even if
+ * they are retained as migrated permissions.
+ */
+int avc_ss_revoke(u32 ssid, u32 tsid, u16 tclass,
+ u32 perms, u32 seqno)
+{
+ return avc_control(AVC_CALLBACK_REVOKE,
+ ssid, tsid, tclass, perms, seqno, 0);
+}
+
+/**
+ * avc_ss_reset - Flush the cache and revalidate migrated permissions.
+ * @seqno: policy sequence number
+ */
+int avc_ss_reset(u32 seqno)
+{
+ struct avc_callback_node *c;
+ int i, rc = 0;
+ struct avc_node *node, *tmp;
+ unsigned long flags;
+
+ avc_hash_eval("reset");
+
+ spin_lock_irqsave(&avc_lock,flags);
+
+ for (i = 0; i < AVC_CACHE_SLOTS; i++) {
+ node = avc_cache.slots[i];
+ while (node) {
+ tmp = node;
+ node = node->next;
+ tmp->ae.ssid = tmp->ae.tsid = SECSID_NULL;
+ tmp->ae.tclass = SECCLASS_NULL;
+ tmp->ae.avd.allowed = tmp->ae.avd.decided = 0;
+ tmp->ae.avd.auditallow = tmp->ae.avd.auditdeny = 0;
+ tmp->ae.used = 0;
+ tmp->next = avc_node_freelist;
+ avc_node_freelist = tmp;
+ avc_cache.active_nodes--;
+ }
+ avc_cache.slots[i] = 0;
+ }
+ avc_cache.lru_hint = 0;
+
+ spin_unlock_irqrestore(&avc_lock,flags);
+
+ for (i = 0; i < AVC_NSTATS; i++)
+ avc_cache_stats[i] = 0;
+
+ for (c = avc_callbacks; c; c = c->next) {
+ if (c->events & AVC_CALLBACK_RESET) {
+ rc = c->callback(AVC_CALLBACK_RESET,
+ 0, 0, 0, 0, 0);
+ if (rc)
+ goto out;
+ }
+ }
+
+ spin_lock_irqsave(&avc_lock,flags);
+ if (seqno > avc_cache.latest_notif)
+ avc_cache.latest_notif = seqno;
+ spin_unlock_irqrestore(&avc_lock,flags);
+out:
+ return rc;
+}
+
+/**
+ * avc_ss_set_auditallow - Enable or disable auditing of granted permissions.
+ * @ssid: source security identifier or %SECSID_WILD
+ * @tsid: target security identifier or %SECSID_WILD
+ * @tclass: target security class
+ * @perms: permissions to grant
+ * @seqno: policy sequence number
+ * @enable: enable flag.
+ */
+int avc_ss_set_auditallow(u32 ssid, u32 tsid, u16 tclass,
+ u32 perms, u32 seqno, u32 enable)
+{
+ if (enable)
+ return avc_control(AVC_CALLBACK_AUDITALLOW_ENABLE,
+ ssid, tsid, tclass, perms, seqno, 0);
+ else
+ return avc_control(AVC_CALLBACK_AUDITALLOW_DISABLE,
+ ssid, tsid, tclass, perms, seqno, 0);
+}
+
+/**
+ * avc_ss_set_auditdeny - Enable or disable auditing of denied permissions.
+ * @ssid: source security identifier or %SECSID_WILD
+ * @tsid: target security identifier or %SECSID_WILD
+ * @tclass: target security class
+ * @perms: permissions to grant
+ * @seqno: policy sequence number
+ * @enable: enable flag.
+ */
+int avc_ss_set_auditdeny(u32 ssid, u32 tsid, u16 tclass,
+ u32 perms, u32 seqno, u32 enable)
+{
+ if (enable)
+ return avc_control(AVC_CALLBACK_AUDITDENY_ENABLE,
+ ssid, tsid, tclass, perms, seqno, 0);
+ else
+ return avc_control(AVC_CALLBACK_AUDITDENY_DISABLE,
+ ssid, tsid, tclass, perms, seqno, 0);
+}
+
+/**
+ * avc_has_perm_noaudit - Check permissions but perform no auditing.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @requested: requested permissions, interpreted based on @tclass
+ * @aeref: AVC entry reference
+ * @avd: access vector decisions
+ *
+ * Check the AVC to determine whether the @requested permissions are granted
+ * for the SID pair (@ssid, @tsid), interpreting the permissions
+ * based on @tclass, and call the security server on a cache miss to obtain
+ * a new decision and add it to the cache. Update @aeref to refer to an AVC
+ * entry with the resulting decisions, and return a copy of the decisions
+ * in @avd. Return %0 if all @requested permissions are granted,
+ * -%EACCES if any permissions are denied, or another -errno upon
+ * other errors. This function is typically called by avc_has_perm(),
+ * but may also be called directly to separate permission checking from
+ * auditing, e.g. in cases where a lock must be held for the check but
+ * should be released for the auditing.
+ */
+int avc_has_perm_noaudit(u32 ssid, u32 tsid,
+ u16 tclass, u32 requested,
+ struct avc_entry_ref *aeref, struct av_decision *avd)
+{
+ struct avc_entry *ae;
+ int rc = 0;
+ unsigned long flags;
+ struct avc_entry entry;
+ u32 denied;
+ struct avc_entry_ref ref;
+
+ if (!aeref) {
+ avc_entry_ref_init(&ref);
+ aeref = &ref;
+ }
+
+ spin_lock_irqsave(&avc_lock, flags);
+ avc_cache_stats_incr(AVC_ENTRY_LOOKUPS);
+ ae = aeref->ae;
+ if (ae) {
+ if (ae->ssid == ssid &&
+ ae->tsid == tsid &&
+ ae->tclass == tclass &&
+ ((ae->avd.decided & requested) == requested)) {
+ avc_cache_stats_incr(AVC_ENTRY_HITS);
+ ae->used = 1;
+ } else {
+ avc_cache_stats_incr(AVC_ENTRY_DISCARDS);
+ ae = 0;
+ }
+ }
+
+ if (!ae) {
+ avc_cache_stats_incr(AVC_ENTRY_MISSES);
+ rc = avc_lookup(ssid, tsid, tclass, requested, aeref);
+ if (rc) {
+ spin_unlock_irqrestore(&avc_lock,flags);
+ rc = security_compute_av(ssid,tsid,tclass,requested,&entry.avd);
+ if (rc)
+ goto out;
+ spin_lock_irqsave(&avc_lock, flags);
+ rc = avc_insert(ssid,tsid,tclass,&entry,aeref);
+ if (rc) {
+ spin_unlock_irqrestore(&avc_lock,flags);
+ goto out;
+ }
+ }
+ ae = aeref->ae;
+ }
+
+ if (avd)
+ memcpy(avd, &ae->avd, sizeof(*avd));
+
+ denied = requested & ~(ae->avd.allowed);
+
+ if (!requested || denied) {
+ if (selinux_enforcing) {
+ spin_unlock_irqrestore(&avc_lock,flags);
+ rc = -EACCES;
+ goto out;
+ } else {
+ ae->avd.allowed |= requested;
+ spin_unlock_irqrestore(&avc_lock,flags);
+ goto out;
+ }
+ }
+
+ spin_unlock_irqrestore(&avc_lock,flags);
+out:
+ return rc;
+}
+
+/**
+ * avc_has_perm - Check permissions and perform any appropriate auditing.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @requested: requested permissions, interpreted based on @tclass
+ * @aeref: AVC entry reference
+ * @auditdata: auxiliary audit data
+ *
+ * Check the AVC to determine whether the @requested permissions are granted
+ * for the SID pair (@ssid, @tsid), interpreting the permissions
+ * based on @tclass, and call the security server on a cache miss to obtain
+ * a new decision and add it to the cache. Update @aeref to refer to an AVC
+ * entry with the resulting decisions. Audit the granting or denial of
+ * permissions in accordance with the policy. Return %0 if all @requested
+ * permissions are granted, -%EACCES if any permissions are denied, or
+ * another -errno upon other errors.
+ */
+int avc_has_perm(u32 ssid, u32 tsid, u16 tclass,
+ u32 requested, struct avc_entry_ref *aeref,
+ struct avc_audit_data *auditdata)
+{
+ struct av_decision avd;
+ int rc;
+
+ rc = avc_has_perm_noaudit(ssid, tsid, tclass, requested, aeref, &avd);
+ avc_audit(ssid, tsid, tclass, requested, &avd, rc, auditdata);
+ return rc;
+}
+
+static int __init avc_log_level_setup(char *str)
+{
+ avc_log_level = simple_strtol(str, NULL, 0);
+ if (avc_log_level > 7)
+ avc_log_level = 7;
+ return 1;
+}
+
+__setup("avc_log_level=", avc_log_level_setup);
+
diff -Nru a/security/selinux/hooks.c b/security/selinux/hooks.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/hooks.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,3405 @@
+/*
+ * NSA Security-Enhanced Linux (SELinux) security module
+ *
+ * This file contains the SELinux hook function implementations.
+ *
+ * Authors: Stephen Smalley, <sds@epoch.ncsc.mil>
+ * Chris Vance, <cvance@nai.com>
+ * Wayne Salamon, <wsalamon@nai.com>
+ * James Morris <jmorris@redhat.com>
+ *
+ * Copyright (C) 2001,2002 Networks Associates Technology, Inc.
+ * Copyright (C) 2003 Red Hat, Inc., James Morris <jmorris@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2,
+ * as published by the Free Software Foundation.
+ */
+
+#define XATTR_SECURITY_PREFIX "security."
+#define XATTR_SELINUX_SUFFIX "selinux"
+#define XATTR_NAME_SELINUX XATTR_SECURITY_PREFIX XATTR_SELINUX_SUFFIX
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/ptrace.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/security.h>
+#include <linux/xattr.h>
+#include <linux/capability.h>
+#include <linux/unistd.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/slab.h>
+#include <linux/pagemap.h>
+#include <linux/swap.h>
+#include <linux/smp_lock.h>
+#include <linux/spinlock.h>
+#include <linux/file.h>
+#include <linux/namei.h>
+#include <linux/mount.h>
+#include <linux/ext2_fs.h>
+#include <linux/proc_fs.h>
+#include <linux/kd.h>
+#include <net/icmp.h>
+#include <net/ip.h> /* for sysctl_local_port_range[] */
+#include <net/tcp.h> /* struct or_callable used in sock_rcv_skb */
+#include <asm/uaccess.h>
+#include <asm/semaphore.h>
+#include <asm/ioctls.h>
+#include <linux/bitops.h>
+#include <linux/interrupt.h>
+#include <linux/netdevice.h> /* for network interface checks */
+#include <linux/netlink.h>
+#include <linux/tcp.h>
+#include <linux/quota.h>
+#include <linux/un.h> /* for Unix socket types */
+#include <net/af_unix.h> /* for Unix socket types */
+
+#include "avc.h"
+#include "objsec.h"
+
+#ifdef CONFIG_SECURITY_SELINUX_DEVELOP
+int selinux_enforcing = 0;
+
+static int __init enforcing_setup(char *str)
+{
+ selinux_enforcing = simple_strtol(str,NULL,0);
+ return 1;
+}
+__setup("enforcing=", enforcing_setup);
+#endif
+
+/* Original (dummy) security module. */
+static struct security_operations *original_ops = NULL;
+
+/* Minimal support for a secondary security module,
+ just to allow the use of the dummy or capability modules.
+ The owlsm module can alternatively be used as a secondary
+ module as long as CONFIG_OWLSM_FD is not enabled. */
+static struct security_operations *secondary_ops = NULL;
+
+/* Lists of inode and superblock security structures initialized
+ before the policy was loaded. */
+static LIST_HEAD(inode_security_head);
+static spinlock_t inode_security_lock = SPIN_LOCK_UNLOCKED;
+
+static LIST_HEAD(superblock_security_head);
+static spinlock_t sb_security_lock = SPIN_LOCK_UNLOCKED;
+
+/* Allocate and free functions for each kind of security blob. */
+
+static int task_alloc_security(struct task_struct *task)
+{
+ struct task_security_struct *tsec;
+
+ tsec = kmalloc(sizeof(struct task_security_struct), GFP_KERNEL);
+ if (!tsec)
+ return -ENOMEM;
+
+ memset(tsec, 0, sizeof(struct task_security_struct));
+ tsec->magic = SELINUX_MAGIC;
+ tsec->task = task;
+ tsec->osid = tsec->sid = SECINITSID_UNLABELED;
+ task->security = tsec;
+
+ return 0;
+}
+
+static void task_free_security(struct task_struct *task)
+{
+ struct task_security_struct *tsec = task->security;
+
+ if (!tsec || tsec->magic != SELINUX_MAGIC)
+ return;
+
+ task->security = NULL;
+ kfree(tsec);
+}
+
+static int inode_alloc_security(struct inode *inode)
+{
+ struct task_security_struct *tsec = current->security;
+ struct inode_security_struct *isec;
+
+ isec = kmalloc(sizeof(struct inode_security_struct), GFP_KERNEL);
+ if (!isec)
+ return -ENOMEM;
+
+ memset(isec, 0, sizeof(struct inode_security_struct));
+ init_MUTEX(&isec->sem);
+ INIT_LIST_HEAD(&isec->list);
+ isec->magic = SELINUX_MAGIC;
+ isec->inode = inode;
+ isec->sid = SECINITSID_UNLABELED;
+ isec->sclass = SECCLASS_FILE;
+ if (tsec && tsec->magic == SELINUX_MAGIC)
+ isec->task_sid = tsec->sid;
+ else
+ isec->task_sid = SECINITSID_UNLABELED;
+ inode->i_security = isec;
+
+ return 0;
+}
+
+static void inode_free_security(struct inode *inode)
+{
+ struct inode_security_struct *isec = inode->i_security;
+
+ if (!isec || isec->magic != SELINUX_MAGIC)
+ return;
+
+ spin_lock(&inode_security_lock);
+ if (!list_empty(&isec->list))
+ list_del_init(&isec->list);
+ spin_unlock(&inode_security_lock);
+
+ inode->i_security = NULL;
+ kfree(isec);
+}
+
+static int file_alloc_security(struct file *file)
+{
+ struct task_security_struct *tsec = current->security;
+ struct file_security_struct *fsec;
+
+ fsec = kmalloc(sizeof(struct file_security_struct), GFP_ATOMIC);
+ if (!fsec)
+ return -ENOMEM;
+
+ memset(fsec, 0, sizeof(struct file_security_struct));
+ fsec->magic = SELINUX_MAGIC;
+ fsec->file = file;
+ if (tsec && tsec->magic == SELINUX_MAGIC) {
+ fsec->sid = tsec->sid;
+ fsec->fown_sid = tsec->sid;
+ } else {
+ fsec->sid = SECINITSID_UNLABELED;
+ fsec->fown_sid = SECINITSID_UNLABELED;
+ }
+ file->f_security = fsec;
+
+ return 0;
+}
+
+static void file_free_security(struct file *file)
+{
+ struct file_security_struct *fsec = file->f_security;
+
+ if (!fsec || fsec->magic != SELINUX_MAGIC)
+ return;
+
+ file->f_security = NULL;
+ kfree(fsec);
+}
+
+static int superblock_alloc_security(struct super_block *sb)
+{
+ struct superblock_security_struct *sbsec;
+
+ sbsec = kmalloc(sizeof(struct superblock_security_struct), GFP_KERNEL);
+ if (!sbsec)
+ return -ENOMEM;
+
+ memset(sbsec, 0, sizeof(struct superblock_security_struct));
+ init_MUTEX(&sbsec->sem);
+ INIT_LIST_HEAD(&sbsec->list);
+ sbsec->magic = SELINUX_MAGIC;
+ sbsec->sb = sb;
+ sbsec->sid = SECINITSID_UNLABELED;
+ sb->s_security = sbsec;
+
+ return 0;
+}
+
+static void superblock_free_security(struct super_block *sb)
+{
+ struct superblock_security_struct *sbsec = sb->s_security;
+
+ if (!sbsec || sbsec->magic != SELINUX_MAGIC)
+ return;
+
+ spin_lock(&sb_security_lock);
+ if (!list_empty(&sbsec->list))
+ list_del_init(&sbsec->list);
+ spin_unlock(&sb_security_lock);
+
+ sb->s_security = NULL;
+ kfree(sbsec);
+}
+
+/* The security server must be initialized before
+ any labeling or access decisions can be provided. */
+extern int ss_initialized;
+
+/* The file system's label must be initialized prior to use. */
+
+static char *labeling_behaviors[5] = {
+ "uses xattr",
+ "uses transition SIDs",
+ "uses task SIDs",
+ "uses genfs_contexts",
+ "not configured for labeling"
+};
+
+static int inode_doinit_with_dentry(struct inode *inode, struct dentry *opt_dentry);
+
+static inline int inode_doinit(struct inode *inode)
+{
+ return inode_doinit_with_dentry(inode, NULL);
+}
+
+static int superblock_doinit(struct super_block *sb)
+{
+ struct superblock_security_struct *sbsec = sb->s_security;
+ struct dentry *root = sb->s_root;
+ struct inode *inode = root->d_inode;
+ int rc = 0;
+
+ down(&sbsec->sem);
+ if (sbsec->initialized)
+ goto out;
+
+ if (!ss_initialized) {
+ /* Defer initialization until selinux_complete_init,
+ after the initial policy is loaded and the security
+ server is ready to handle calls. */
+ spin_lock(&sb_security_lock);
+ if (list_empty(&sbsec->list))
+ list_add(&sbsec->list, &superblock_security_head);
+ spin_unlock(&sb_security_lock);
+ goto out;
+ }
+
+ /* Determine the labeling behavior to use for this filesystem type. */
+ rc = security_fs_use(sb->s_type->name, &sbsec->behavior, &sbsec->sid);
+ if (rc) {
+ printk(KERN_WARNING "%s: security_fs_use(%s) returned %d\n",
+ __FUNCTION__, sb->s_type->name, rc);
+ goto out;
+ }
+
+ if (sbsec->behavior == SECURITY_FS_USE_XATTR) {
+ /* Make sure that the xattr handler exists and that no
+ error other than -ENODATA is returned by getxattr on
+ the root directory. -ENODATA is ok, as this may be
+ the first boot of the SELinux kernel before we have
+ assigned xattr values to the filesystem. */
+ if (!inode->i_op->getxattr) {
+ printk(KERN_WARNING "SELinux: (dev %s, type %s) has no "
+ "xattr support\n", sb->s_id, sb->s_type->name);
+ rc = -EOPNOTSUPP;
+ goto out;
+ }
+ rc = inode->i_op->getxattr(root, XATTR_NAME_SELINUX, NULL, 0);
+ if (rc < 0 && rc != -ENODATA) {
+ if (rc == -EOPNOTSUPP)
+ printk(KERN_WARNING "SELinux: (dev %s, type "
+ "%s) has no security xattr handler\n",
+ sb->s_id, sb->s_type->name);
+ else
+ printk(KERN_WARNING "SELinux: (dev %s, type "
+ "%s) getxattr errno %d\n", sb->s_id,
+ sb->s_type->name, -rc);
+ goto out;
+ }
+ }
+
+ if (strcmp(sb->s_type->name, "proc") == 0)
+ sbsec->proc = 1;
+
+ sbsec->initialized = 1;
+
+ printk(KERN_INFO "SELinux: initialized (dev %s, type %s), %s\n",
+ sb->s_id, sb->s_type->name,
+ labeling_behaviors[sbsec->behavior-1]);
+
+ /* Initialize the root inode. */
+ rc = inode_doinit_with_dentry(sb->s_root->d_inode, sb->s_root);
+out:
+ up(&sbsec->sem);
+ return rc;
+}
+
+static inline u16 inode_mode_to_security_class(umode_t mode)
+{
+ switch (mode & S_IFMT) {
+ case S_IFSOCK:
+ return SECCLASS_SOCK_FILE;
+ case S_IFLNK:
+ return SECCLASS_LNK_FILE;
+ case S_IFREG:
+ return SECCLASS_FILE;
+ case S_IFBLK:
+ return SECCLASS_BLK_FILE;
+ case S_IFDIR:
+ return SECCLASS_DIR;
+ case S_IFCHR:
+ return SECCLASS_CHR_FILE;
+ case S_IFIFO:
+ return SECCLASS_FIFO_FILE;
+
+ }
+
+ return SECCLASS_FILE;
+}
+
+static inline u16 socket_type_to_security_class(int family, int type)
+{
+ switch (family) {
+ case PF_UNIX:
+ switch (type) {
+ case SOCK_STREAM:
+ return SECCLASS_UNIX_STREAM_SOCKET;
+ case SOCK_DGRAM:
+ return SECCLASS_UNIX_DGRAM_SOCKET;
+ }
+ case PF_INET:
+ case PF_INET6:
+ switch (type) {
+ case SOCK_STREAM:
+ return SECCLASS_TCP_SOCKET;
+ case SOCK_DGRAM:
+ return SECCLASS_UDP_SOCKET;
+ case SOCK_RAW:
+ return SECCLASS_RAWIP_SOCKET;
+ }
+ case PF_NETLINK:
+ return SECCLASS_NETLINK_SOCKET;
+ case PF_PACKET:
+ return SECCLASS_PACKET_SOCKET;
+ case PF_KEY:
+ return SECCLASS_KEY_SOCKET;
+ }
+
+ return SECCLASS_SOCKET;
+}
+
+#ifdef CONFIG_PROC_FS
+static int selinux_proc_get_sid(struct proc_dir_entry *de,
+ u16 tclass,
+ u32 *sid)
+{
+ int buflen, rc;
+ char *buffer, *path, *end;
+
+ buffer = (char*)__get_free_page(GFP_KERNEL);
+ if (!buffer)
+ return -ENOMEM;
+
+ buflen = PAGE_SIZE;
+ end = buffer+buflen;
+ *--end = '\0';
+ buflen--;
+ path = end-1;
+ *path = '/';
+ while (de && de != de->parent) {
+ buflen -= de->namelen + 1;
+ if (buflen < 0)
+ break;
+ end -= de->namelen;
+ memcpy(end, de->name, de->namelen);
+ *--end = '/';
+ path = end;
+ de = de->parent;
+ }
+ rc = security_genfs_sid("proc", path, tclass, sid);
+ free_page((unsigned long)buffer);
+ return rc;
+}
+#else
+static int selinux_proc_get_sid(struct proc_dir_entry *de,
+ u16 tclass,
+ u32 *sid)
+{
+ return -EINVAL;
+}
+#endif
+
+/* The inode's security attributes must be initialized before first use. */
+static int inode_doinit_with_dentry(struct inode *inode, struct dentry *opt_dentry)
+{
+ struct superblock_security_struct *sbsec = NULL;
+ struct inode_security_struct *isec = inode->i_security;
+ u32 sid;
+ struct dentry *dentry;
+#define INITCONTEXTLEN 255
+ char *context = NULL;
+ unsigned len = 0;
+ int rc = 0;
+ int hold_sem = 0;
+
+ if (isec->initialized)
+ goto out;
+
+ down(&isec->sem);
+ hold_sem = 1;
+ if (isec->initialized)
+ goto out;
+
+ sbsec = inode->i_sb->s_security;
+ if (!sbsec || !sbsec->initialized) {
+ /* Defer initialization until selinux_complete_init,
+ after the initial policy is loaded and the security
+ server is ready to handle calls. */
+ spin_lock(&inode_security_lock);
+ if (list_empty(&isec->list))
+ list_add(&isec->list, &inode_security_head);
+ spin_unlock(&inode_security_lock);
+ goto out;
+ }
+
+ switch (sbsec->behavior) {
+ case SECURITY_FS_USE_XATTR:
+ if (!inode->i_op->getxattr) {
+ isec->sid = SECINITSID_FILE;
+ break;
+ }
+
+ /* Need a dentry, since the xattr API requires one.
+ Life would be simpler if we could just pass the inode. */
+ if (opt_dentry) {
+ /* Called from d_instantiate or d_splice_alias. */
+ dentry = dget(opt_dentry);
+ } else {
+ /* Called from selinux_complete_init, try to find a dentry. */
+ dentry = d_find_alias(inode);
+ }
+ if (!dentry) {
+ printk(KERN_WARNING "%s: no dentry for dev=%s "
+ "ino=%ld\n", __FUNCTION__, inode->i_sb->s_id,
+ inode->i_ino);
+ goto out;
+ }
+
+ len = INITCONTEXTLEN;
+ context = kmalloc(len, GFP_KERNEL);
+ if (!context) {
+ rc = -ENOMEM;
+ dput(dentry);
+ goto out;
+ }
+ rc = inode->i_op->getxattr(dentry, XATTR_NAME_SELINUX,
+ context, len);
+ if (rc == -ERANGE) {
+ /* Need a larger buffer. Query for the right size. */
+ rc = inode->i_op->getxattr(dentry, XATTR_NAME_SELINUX,
+ NULL, 0);
+ if (rc < 0) {
+ dput(dentry);
+ goto out;
+ }
+ kfree(context);
+ len = rc;
+ context = kmalloc(len, GFP_KERNEL);
+ if (!context) {
+ rc = -ENOMEM;
+ dput(dentry);
+ goto out;
+ }
+ rc = inode->i_op->getxattr(dentry,
+ XATTR_NAME_SELINUX,
+ context, len);
+ }
+ dput(dentry);
+ if (rc < 0) {
+ if (rc != -ENODATA) {
+ printk(KERN_WARNING "%s: getxattr returned "
+ "%d for dev=%s ino=%ld\n", __FUNCTION__,
+ -rc, inode->i_sb->s_id, inode->i_ino);
+ kfree(context);
+ goto out;
+ }
+ /* Map ENODATA to the default file SID */
+ sid = SECINITSID_FILE;
+ rc = 0;
+ } else {
+ rc = security_context_to_sid(context, rc, &sid);
+ if (rc) {
+ printk(KERN_WARNING "%s: context_to_sid(%s) "
+ "returned %d for dev=%s ino=%ld\n",
+ __FUNCTION__, context, -rc,
+ inode->i_sb->s_id, inode->i_ino);
+ kfree(context);
+ goto out;
+ }
+ }
+ kfree(context);
+ isec->sid = sid;
+ break;
+ case SECURITY_FS_USE_TASK:
+ isec->sid = isec->task_sid;
+ break;
+ case SECURITY_FS_USE_TRANS:
+ /* Default to the fs SID. */
+ isec->sid = sbsec->sid;
+
+ /* Try to obtain a transition SID. */
+ isec->sclass = inode_mode_to_security_class(inode->i_mode);
+ rc = security_transition_sid(isec->task_sid,
+ sbsec->sid,
+ isec->sclass,
+ &sid);
+ if (rc)
+ goto out;
+ isec->sid = sid;
+ break;
+ default:
+ /* Default to the fs SID. */
+ isec->sid = sbsec->sid;
+
+ if (sbsec->proc) {
+ struct proc_inode *proci = PROC_I(inode);
+ if (proci->pde) {
+ isec->sclass = inode_mode_to_security_class(inode->i_mode);
+ rc = selinux_proc_get_sid(proci->pde,
+ isec->sclass,
+ &sid);
+ if (rc)
+ goto out;
+ isec->sid = sid;
+ }
+ }
+ break;
+ }
+
+ isec->initialized = 1;
+
+out:
+ if (inode->i_sock) {
+ struct socket *sock = SOCKET_I(inode);
+ if (sock->sk) {
+ isec->sclass = socket_type_to_security_class(sock->sk->sk_family,
+ sock->sk->sk_type);
+ } else {
+ isec->sclass = SECCLASS_SOCKET;
+ }
+ } else {
+ isec->sclass = inode_mode_to_security_class(inode->i_mode);
+ }
+
+ if (hold_sem)
+ up(&isec->sem);
+ return rc;
+}
+
+/* Convert a Linux signal to an access vector. */
+static inline u32 signal_to_av(int sig)
+{
+ u32 perm = 0;
+
+ switch (sig) {
+ case SIGCHLD:
+ /* Commonly granted from child to parent. */
+ perm = PROCESS__SIGCHLD;
+ break;
+ case SIGKILL:
+ /* Cannot be caught or ignored */
+ perm = PROCESS__SIGKILL;
+ break;
+ case SIGSTOP:
+ /* Cannot be caught or ignored */
+ perm = PROCESS__SIGSTOP;
+ break;
+ default:
+ /* All other signals. */
+ perm = PROCESS__SIGNAL;
+ break;
+ }
+
+ return perm;
+}
+
+/* Check permission betweeen a pair of tasks, e.g. signal checks,
+ fork check, ptrace check, etc. */
+int task_has_perm(struct task_struct *tsk1,
+ struct task_struct *tsk2,
+ u32 perms)
+{
+ struct task_security_struct *tsec1, *tsec2;
+
+ tsec1 = tsk1->security;
+ tsec2 = tsk2->security;
+ return avc_has_perm(tsec1->sid, tsec2->sid,
+ SECCLASS_PROCESS, perms, &tsec2->avcr, NULL);
+}
+
+/* Check whether a task is allowed to use a capability. */
+int task_has_capability(struct task_struct *tsk,
+ int cap)
+{
+ struct task_security_struct *tsec;
+ struct avc_audit_data ad;
+
+ tsec = tsk->security;
+
+ AVC_AUDIT_DATA_INIT(&ad,CAP);
+ ad.tsk = tsk;
+ ad.u.cap = cap;
+
+ return avc_has_perm(tsec->sid, tsec->sid,
+ SECCLASS_CAPABILITY, CAP_TO_MASK(cap), NULL, &ad);
+}
+
+/* Check whether a task is allowed to use a system operation. */
+int task_has_system(struct task_struct *tsk,
+ u32 perms)
+{
+ struct task_security_struct *tsec;
+
+ tsec = tsk->security;
+
+ return avc_has_perm(tsec->sid, SECINITSID_KERNEL,
+ SECCLASS_SYSTEM, perms, NULL, NULL);
+}
+
+/* Check whether a task has a particular permission to an inode.
+ The 'aeref' parameter is optional and allows other AVC
+ entry references to be passed (e.g. the one in the struct file).
+ The 'adp' parameter is optional and allows other audit
+ data to be passed (e.g. the dentry). */
+int inode_has_perm(struct task_struct *tsk,
+ struct inode *inode,
+ u32 perms,
+ struct avc_entry_ref *aeref,
+ struct avc_audit_data *adp)
+{
+ struct task_security_struct *tsec;
+ struct inode_security_struct *isec;
+ struct avc_audit_data ad;
+
+ tsec = tsk->security;
+ isec = inode->i_security;
+
+ if (!adp) {
+ adp = &ad;
+ AVC_AUDIT_DATA_INIT(&ad, FS);
+ ad.u.fs.inode = inode;
+ }
+
+ return avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ perms, aeref ? aeref : &isec->avcr, adp);
+}
+
+/* Same as inode_has_perm, but pass explicit audit data containing
+ the dentry to help the auditing code to more easily generate the
+ pathname if needed. */
+static inline int dentry_has_perm(struct task_struct *tsk,
+ struct vfsmount *mnt,
+ struct dentry *dentry,
+ u32 av)
+{
+ struct inode *inode = dentry->d_inode;
+ struct avc_audit_data ad;
+ AVC_AUDIT_DATA_INIT(&ad,FS);
+ ad.u.fs.mnt = mnt;
+ ad.u.fs.dentry = dentry;
+ return inode_has_perm(tsk, inode, av, NULL, &ad);
+}
+
+/* Check whether a task can use an open file descriptor to
+ access an inode in a given way. Check access to the
+ descriptor itself, and then use dentry_has_perm to
+ check a particular permission to the file.
+ Access to the descriptor is implicitly granted if it
+ has the same SID as the process. If av is zero, then
+ access to the file is not checked, e.g. for cases
+ where only the descriptor is affected like seek. */
+static inline int file_has_perm(struct task_struct *tsk,
+ struct file *file,
+ u32 av)
+{
+ struct task_security_struct *tsec = tsk->security;
+ struct file_security_struct *fsec = file->f_security;
+ struct vfsmount *mnt = file->f_vfsmnt;
+ struct dentry *dentry = file->f_dentry;
+ struct inode *inode = dentry->d_inode;
+ struct avc_audit_data ad;
+ int rc;
+
+ AVC_AUDIT_DATA_INIT(&ad, FS);
+ ad.u.fs.mnt = mnt;
+ ad.u.fs.dentry = dentry;
+
+ if (tsec->sid != fsec->sid) {
+ rc = avc_has_perm(tsec->sid, fsec->sid,
+ SECCLASS_FD,
+ FD__USE,
+ &fsec->avcr, &ad);
+ if (rc)
+ return rc;
+ }
+
+ /* av is zero if only checking access to the descriptor. */
+ if (av)
+ return inode_has_perm(tsk, inode, av, &fsec->inode_avcr, &ad);
+
+ return 0;
+}
+
+/* Check whether a task can create a file. */
+static int may_create(struct inode *dir,
+ struct dentry *dentry,
+ u16 tclass)
+{
+ struct task_security_struct *tsec;
+ struct inode_security_struct *dsec;
+ struct superblock_security_struct *sbsec;
+ u32 newsid;
+ struct avc_audit_data ad;
+ int rc;
+
+ tsec = current->security;
+ dsec = dir->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad, FS);
+ ad.u.fs.dentry = dentry;
+
+ rc = avc_has_perm(tsec->sid, dsec->sid, SECCLASS_DIR,
+ DIR__ADD_NAME | DIR__SEARCH,
+ &dsec->avcr, &ad);
+ if (rc)
+ return rc;
+
+ if (tsec->create_sid) {
+ newsid = tsec->create_sid;
+ } else {
+ rc = security_transition_sid(tsec->sid, dsec->sid, tclass,
+ &newsid);
+ if (rc)
+ return rc;
+ }
+
+ rc = avc_has_perm(tsec->sid, newsid, tclass, FILE__CREATE, NULL, &ad);
+ if (rc)
+ return rc;
+
+ sbsec = dir->i_sb->s_security;
+
+ return avc_has_perm(newsid, sbsec->sid,
+ SECCLASS_FILESYSTEM,
+ FILESYSTEM__ASSOCIATE, NULL, &ad);
+}
+
+#define MAY_LINK 0
+#define MAY_UNLINK 1
+#define MAY_RMDIR 2
+
+/* Check whether a task can link, unlink, or rmdir a file/directory. */
+static int may_link(struct inode *dir,
+ struct dentry *dentry,
+ int kind)
+
+{
+ struct task_security_struct *tsec;
+ struct inode_security_struct *dsec, *isec;
+ struct avc_audit_data ad;
+ u32 av;
+ int rc;
+
+ tsec = current->security;
+ dsec = dir->i_security;
+ isec = dentry->d_inode->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad, FS);
+ ad.u.fs.dentry = dentry;
+
+ av = DIR__SEARCH;
+ av |= (kind ? DIR__REMOVE_NAME : DIR__ADD_NAME);
+ rc = avc_has_perm(tsec->sid, dsec->sid, SECCLASS_DIR,
+ av, &dsec->avcr, &ad);
+ if (rc)
+ return rc;
+
+ switch (kind) {
+ case MAY_LINK:
+ av = FILE__LINK;
+ break;
+ case MAY_UNLINK:
+ av = FILE__UNLINK;
+ break;
+ case MAY_RMDIR:
+ av = DIR__RMDIR;
+ break;
+ default:
+ printk(KERN_WARNING "may_link: unrecognized kind %d\n", kind);
+ return 0;
+ }
+
+ rc = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ av, &isec->avcr, &ad);
+ return rc;
+}
+
+static inline int may_rename(struct inode *old_dir,
+ struct dentry *old_dentry,
+ struct inode *new_dir,
+ struct dentry *new_dentry)
+{
+ struct task_security_struct *tsec;
+ struct inode_security_struct *old_dsec, *new_dsec, *old_isec, *new_isec;
+ struct avc_audit_data ad;
+ u32 av;
+ int old_is_dir, new_is_dir;
+ int rc;
+
+ tsec = current->security;
+ old_dsec = old_dir->i_security;
+ old_isec = old_dentry->d_inode->i_security;
+ old_is_dir = S_ISDIR(old_dentry->d_inode->i_mode);
+ new_dsec = new_dir->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad, FS);
+
+ ad.u.fs.dentry = old_dentry;
+ rc = avc_has_perm(tsec->sid, old_dsec->sid, SECCLASS_DIR,
+ DIR__REMOVE_NAME | DIR__SEARCH,
+ &old_dsec->avcr, &ad);
+ if (rc)
+ return rc;
+ rc = avc_has_perm(tsec->sid, old_isec->sid,
+ old_isec->sclass,
+ FILE__RENAME,
+ &old_isec->avcr, &ad);
+ if (rc)
+ return rc;
+ if (old_is_dir && new_dir != old_dir) {
+ rc = avc_has_perm(tsec->sid, old_isec->sid,
+ old_isec->sclass,
+ DIR__REPARENT,
+ &old_isec->avcr, &ad);
+ if (rc)
+ return rc;
+ }
+
+ ad.u.fs.dentry = new_dentry;
+ av = DIR__ADD_NAME | DIR__SEARCH;
+ if (new_dentry->d_inode)
+ av |= DIR__REMOVE_NAME;
+ rc = avc_has_perm(tsec->sid, new_dsec->sid, SECCLASS_DIR,
+ av,&new_dsec->avcr, &ad);
+ if (rc)
+ return rc;
+ if (new_dentry->d_inode) {
+ new_isec = new_dentry->d_inode->i_security;
+ new_is_dir = S_ISDIR(new_dentry->d_inode->i_mode);
+ rc = avc_has_perm(tsec->sid, new_isec->sid,
+ new_isec->sclass,
+ (new_is_dir ? DIR__RMDIR : FILE__UNLINK),
+ &new_isec->avcr, &ad);
+ if (rc)
+ return rc;
+ }
+
+ return 0;
+}
+
+/* Check whether a task can perform a filesystem operation. */
+int superblock_has_perm(struct task_struct *tsk,
+ struct super_block *sb,
+ u32 perms,
+ struct avc_audit_data *ad)
+{
+ struct task_security_struct *tsec;
+ struct superblock_security_struct *sbsec;
+
+ tsec = tsk->security;
+ sbsec = sb->s_security;
+ return avc_has_perm(tsec->sid, sbsec->sid, SECCLASS_FILESYSTEM,
+ perms, NULL, ad);
+}
+
+/* Convert a Linux mode and permission mask to an access vector. */
+static inline u32 file_mask_to_av(int mode, int mask)
+{
+ u32 av = 0;
+
+ if ((mode & S_IFMT) != S_IFDIR) {
+ if (mask & MAY_EXEC)
+ av |= FILE__EXECUTE;
+ if (mask & MAY_READ)
+ av |= FILE__READ;
+
+ if (mask & MAY_APPEND)
+ av |= FILE__APPEND;
+ else if (mask & MAY_WRITE)
+ av |= FILE__WRITE;
+
+ } else {
+ if (mask & MAY_EXEC)
+ av |= DIR__SEARCH;
+ if (mask & MAY_WRITE)
+ av |= DIR__WRITE;
+ if (mask & MAY_READ)
+ av |= DIR__READ;
+ }
+
+ return av;
+}
+
+/* Convert a Linux file to an access vector. */
+static inline u32 file_to_av(struct file *file)
+{
+ u32 av = 0;
+
+ if (file->f_mode & FMODE_READ)
+ av |= FILE__READ;
+ if (file->f_mode & FMODE_WRITE) {
+ if (file->f_flags & O_APPEND)
+ av |= FILE__APPEND;
+ else
+ av |= FILE__WRITE;
+ }
+
+ return av;
+}
+
+/* Set an inode's SID to a specified value. */
+int inode_security_set_sid(struct inode *inode, u32 sid)
+{
+ struct inode_security_struct *isec = inode->i_security;
+
+ down(&isec->sem);
+ isec->sclass = inode_mode_to_security_class(inode->i_mode);
+ isec->sid = sid;
+ isec->initialized = 1;
+ up(&isec->sem);
+ return 0;
+}
+
+/* Set the security attributes on a newly created file. */
+static int post_create(struct inode *dir,
+ struct dentry *dentry)
+{
+
+ struct task_security_struct *tsec;
+ struct inode *inode;
+ struct inode_security_struct *dsec;
+ struct superblock_security_struct *sbsec;
+ u32 newsid;
+ char *context;
+ unsigned int len;
+ int rc;
+
+ tsec = current->security;
+ dsec = dir->i_security;
+
+ inode = dentry->d_inode;
+ if (!inode) {
+ /* Some file system types (e.g. NFS) may not instantiate
+ a dentry for all create operations (e.g. symlink),
+ so we have to check to see if the inode is non-NULL. */
+ printk(KERN_WARNING "post_create: no inode, dir (dev=%s, "
+ "ino=%ld)\n", dir->i_sb->s_id, dir->i_ino);
+ return 0;
+ }
+
+ if (tsec->create_sid) {
+ newsid = tsec->create_sid;
+ } else {
+ rc = security_transition_sid(tsec->sid, dsec->sid,
+ inode_mode_to_security_class(inode->i_mode),
+ &newsid);
+ if (rc) {
+ printk(KERN_WARNING "post_create: "
+ "security_transition_sid failed, rc=%d (dev=%s "
+ "ino=%ld)\n",
+ -rc, inode->i_sb->s_id, inode->i_ino);
+ return rc;
+ }
+ }
+
+ rc = inode_security_set_sid(inode, newsid);
+ if (rc) {
+ printk(KERN_WARNING "post_create: inode_security_set_sid "
+ "failed, rc=%d (dev=%s ino=%ld)\n",
+ -rc, inode->i_sb->s_id, inode->i_ino);
+ return rc;
+ }
+
+ sbsec = dir->i_sb->s_security;
+ if (!sbsec)
+ return 0;
+
+ if (sbsec->behavior == SECURITY_FS_USE_XATTR &&
+ inode->i_op->setxattr) {
+ /* Use extended attributes. */
+ rc = security_sid_to_context(newsid, &context, &len);
+ if (rc) {
+ printk(KERN_WARNING "post_create: sid_to_context "
+ "failed, rc=%d (dev=%s ino=%ld)\n",
+ -rc, inode->i_sb->s_id, inode->i_ino);
+ return rc;
+ }
+ down(&inode->i_sem);
+ rc = inode->i_op->setxattr(dentry,
+ XATTR_NAME_SELINUX,
+ context, len, 0);
+ up(&inode->i_sem);
+ kfree(context);
+ if (rc < 0) {
+ printk(KERN_WARNING "post_create: setxattr failed, "
+ "rc=%d (dev=%s ino=%ld)\n",
+ -rc, inode->i_sb->s_id, inode->i_ino);
+ return rc;
+ }
+ }
+
+ return 0;
+}
+
+
+/* Hook functions begin here. */
+
+static int selinux_ptrace(struct task_struct *parent, struct task_struct *child)
+{
+ int rc;
+
+ rc = secondary_ops->ptrace(parent,child);
+ if (rc)
+ return rc;
+
+ return task_has_perm(parent, child, PROCESS__PTRACE);
+}
+
+static int selinux_capget(struct task_struct *target, kernel_cap_t *effective,
+ kernel_cap_t *inheritable, kernel_cap_t *permitted)
+{
+ int error;
+
+ error = task_has_perm(current, target, PROCESS__GETCAP);
+ if (error)
+ return error;
+
+ return secondary_ops->capget(target, effective, inheritable, permitted);
+}
+
+static int selinux_capset_check(struct task_struct *target, kernel_cap_t *effective,
+ kernel_cap_t *inheritable, kernel_cap_t *permitted)
+{
+ int error;
+
+ error = task_has_perm(current, target, PROCESS__SETCAP);
+ if (error)
+ return error;
+
+ return secondary_ops->capset_check(target, effective, inheritable, permitted);
+}
+
+static void selinux_capset_set(struct task_struct *target, kernel_cap_t *effective,
+ kernel_cap_t *inheritable, kernel_cap_t *permitted)
+{
+ int error;
+
+ error = task_has_perm(current, target, PROCESS__SETCAP);
+ if (error)
+ return;
+
+ return secondary_ops->capset_set(target, effective, inheritable, permitted);
+}
+
+static int selinux_capable(struct task_struct *tsk, int cap)
+{
+ int rc;
+
+ rc = secondary_ops->capable(tsk, cap);
+ if (rc)
+ return rc;
+
+ return task_has_capability(tsk,cap);
+}
+
+static int selinux_sysctl(ctl_table *table, int op)
+{
+ int error = 0;
+ u32 av;
+ struct task_security_struct *tsec;
+ u32 tsid;
+ int rc;
+
+ tsec = current->security;
+
+ rc = selinux_proc_get_sid(table->de, (op == 001) ?
+ SECCLASS_DIR : SECCLASS_FILE, &tsid);
+ if (rc) {
+ /* Default to the well-defined sysctl SID. */
+ tsid = SECINITSID_SYSCTL;
+ }
+
+ /* The op values are "defined" in sysctl.c, thereby creating
+ * a bad coupling between this module and sysctl.c */
+ if(op == 001) {
+ error = avc_has_perm(tsec->sid, tsid,
+ SECCLASS_DIR, DIR__SEARCH, NULL, NULL);
+ } else {
+ av = 0;
+ if (op & 004)
+ av |= FILE__READ;
+ if (op & 002)
+ av |= FILE__WRITE;
+ if (av)
+ error = avc_has_perm(tsec->sid, tsid,
+ SECCLASS_FILE, av, NULL, NULL);
+ }
+
+ return error;
+}
+
+static int selinux_quotactl(int cmds, int type, int id, struct super_block *sb)
+{
+ int rc = 0;
+
+ if (!sb)
+ return 0;
+
+ switch (cmds) {
+ case Q_SYNC:
+ case Q_QUOTAON:
+ case Q_QUOTAOFF:
+ case Q_SETINFO:
+ case Q_SETQUOTA:
+ rc = superblock_has_perm(current,
+ sb,
+ FILESYSTEM__QUOTAMOD, NULL);
+ break;
+ case Q_GETFMT:
+ case Q_GETINFO:
+ case Q_GETQUOTA:
+ rc = superblock_has_perm(current,
+ sb,
+ FILESYSTEM__QUOTAGET, NULL);
+ break;
+ default:
+ rc = 0; /* let the kernel handle invalid cmds */
+ break;
+ }
+ return rc;
+}
+
+static int selinux_quota_on(struct file *f)
+{
+ return file_has_perm(current, f, FILE__QUOTAON);;
+}
+
+static int selinux_syslog(int type)
+{
+ int rc;
+
+ rc = secondary_ops->syslog(type);
+ if (rc)
+ return rc;
+
+ switch (type) {
+ case 3: /* Read last kernel messages */
+ rc = task_has_system(current, SYSTEM__SYSLOG_READ);
+ break;
+ case 6: /* Disable logging to console */
+ case 7: /* Enable logging to console */
+ case 8: /* Set level of messages printed to console */
+ rc = task_has_system(current, SYSTEM__SYSLOG_CONSOLE);
+ break;
+ case 0: /* Close log */
+ case 1: /* Open log */
+ case 2: /* Read from log */
+ case 4: /* Read/clear last kernel messages */
+ case 5: /* Clear ring buffer */
+ default:
+ rc = task_has_system(current, SYSTEM__SYSLOG_MOD);
+ break;
+ }
+ return rc;
+}
+
+/*
+ * Check that a process has enough memory to allocate a new virtual
+ * mapping. 0 means there is enough memory for the allocation to
+ * succeed and -ENOMEM implies there is not.
+ *
+ * We currently support three overcommit policies, which are set via the
+ * vm.overcommit_memory sysctl. See Documentation/vm/overcommit-acounting
+ *
+ * Strict overcommit modes added 2002 Feb 26 by Alan Cox.
+ * Additional code 2002 Jul 20 by Robert Love.
+ */
+static int selinux_vm_enough_memory(long pages)
+{
+ unsigned long free, allowed;
+ int rc;
+ struct task_security_struct *tsec = current->security;
+
+ vm_acct_memory(pages);
+
+ /*
+ * Sometimes we want to use more memory than we have
+ */
+ if (sysctl_overcommit_memory == 1)
+ return 0;
+
+ if (sysctl_overcommit_memory == 0) {
+ free = get_page_cache_size();
+ free += nr_free_pages();
+ free += nr_swap_pages;
+
+ /*
+ * Any slabs which are created with the
+ * SLAB_RECLAIM_ACCOUNT flag claim to have contents
+ * which are reclaimable, under pressure. The dentry
+ * cache and most inode caches should fall into this
+ */
+ free += atomic_read(&slab_reclaim_pages);
+
+ /*
+ * Leave the last 3% for privileged processes.
+ * Don't audit the check, as it is applied to all processes
+ * that allocate mappings.
+ */
+ rc = secondary_ops->capable(current, CAP_SYS_ADMIN);
+ if (!rc) {
+ rc = avc_has_perm_noaudit(tsec->sid, tsec->sid,
+ SECCLASS_CAPABILITY,
+ CAP_TO_MASK(CAP_SYS_ADMIN),
+ NULL, NULL);
+ }
+ if (rc)
+ free -= free / 32;
+
+ if (free > pages)
+ return 0;
+ vm_unacct_memory(pages);
+ return -ENOMEM;
+ }
+
+ allowed = totalram_pages * sysctl_overcommit_ratio / 100;
+ allowed += total_swap_pages;
+
+ if (atomic_read(&vm_committed_space) < allowed)
+ return 0;
+
+ vm_unacct_memory(pages);
+
+ return -ENOMEM;
+}
+
+static int selinux_netlink_send(struct sk_buff *skb)
+{
+ if (capable(CAP_NET_ADMIN))
+ cap_raise (NETLINK_CB (skb).eff_cap, CAP_NET_ADMIN);
+ else
+ NETLINK_CB(skb).eff_cap = 0;
+ return 0;
+}
+
+static int selinux_netlink_recv(struct sk_buff *skb)
+{
+ if (!cap_raised(NETLINK_CB(skb).eff_cap, CAP_NET_ADMIN))
+ return -EPERM;
+ return 0;
+}
+
+/* binprm security operations */
+
+static int selinux_bprm_alloc_security(struct linux_binprm *bprm)
+{
+ int rc;
+
+ /* Make sure that the secondary module doesn't use the
+ bprm->security field, since we do not yet support chaining
+ of multiple security structures on the field. Neither
+ the dummy nor the capability module use the field. The owlsm
+ module uses the field if CONFIG_OWLSM_FD is enabled. */
+ rc = secondary_ops->bprm_alloc_security(bprm);
+ if (rc)
+ return rc;
+ if (bprm->security) {
+ printk(KERN_WARNING "%s: no support yet for chaining on the "
+ "security field by secondary modules.\n", __FUNCTION__);
+ /* Release the secondary module's security object. */
+ secondary_ops->bprm_free_security(bprm);
+ /* Unregister the secondary module to prevent problems
+ with subsequent binprm hooks. This will revert to the
+ original (dummy) module for the secondary operations. */
+ rc = security_ops->unregister_security("unknown", secondary_ops);
+ if (rc)
+ return rc;
+ printk(KERN_WARNING "%s: Unregistered the secondary security "
+ "module.\n", __FUNCTION__);
+ }
+ bprm->security = NULL;
+ return 0;
+}
+
+static int selinux_bprm_set_security(struct linux_binprm *bprm)
+{
+ struct task_security_struct *tsec;
+ struct inode *inode = bprm->file->f_dentry->d_inode;
+ struct inode_security_struct *isec;
+ u32 newsid;
+ struct avc_audit_data ad;
+ int rc;
+
+ rc = secondary_ops->bprm_set_security(bprm);
+ if (rc)
+ return rc;
+
+ if (bprm->sh_bang || bprm->security)
+ /* The security field should already be set properly. */
+ return 0;
+
+ tsec = current->security;
+ isec = inode->i_security;
+
+ /* Default to the current task SID. */
+ bprm->security = (void *)tsec->sid;
+
+ /* Reset create SID on execve. */
+ tsec->create_sid = 0;
+
+ if (tsec->exec_sid) {
+ newsid = tsec->exec_sid;
+ /* Reset exec SID on execve. */
+ tsec->exec_sid = 0;
+ } else {
+ /* Check for a default transition on this program. */
+ rc = security_transition_sid(tsec->sid, isec->sid,
+ SECCLASS_PROCESS, &newsid);
+ if (rc)
+ return rc;
+ }
+
+ AVC_AUDIT_DATA_INIT(&ad, FS);
+ ad.u.fs.mnt = bprm->file->f_vfsmnt;
+ ad.u.fs.dentry = bprm->file->f_dentry;
+
+ if (bprm->file->f_vfsmnt->mnt_flags & MNT_NOSUID)
+ newsid = tsec->sid;
+
+ if (tsec->sid == newsid) {
+ rc = avc_has_perm(tsec->sid, isec->sid,
+ SECCLASS_FILE, FILE__EXECUTE_NO_TRANS,
+ &isec->avcr, &ad);
+ if (rc)
+ return rc;
+ } else {
+ /* Check permissions for the transition. */
+ rc = avc_has_perm(tsec->sid, newsid,
+ SECCLASS_PROCESS, PROCESS__TRANSITION,
+ NULL,
+ &ad);
+ if (rc)
+ return rc;
+
+ rc = avc_has_perm(newsid, isec->sid,
+ SECCLASS_FILE, FILE__ENTRYPOINT,
+ &isec->avcr, &ad);
+ if (rc)
+ return rc;
+
+ /* Set the security field to the new SID. */
+ bprm->security = (void*) newsid;
+ }
+
+ return 0;
+}
+
+static int selinux_bprm_check_security (struct linux_binprm *bprm)
+{
+ return 0;
+}
+
+
+static int selinux_bprm_secureexec (struct linux_binprm *bprm)
+{
+ struct task_security_struct *tsec = current->security;
+ int atsecure = 0;
+
+ if (tsec->osid != tsec->sid) {
+ /* Enable secure mode for SIDs transitions unless
+ the noatsecure permission is granted between
+ the two SIDs, i.e. ahp returns 0. */
+ atsecure = avc_has_perm(tsec->osid, tsec->sid,
+ SECCLASS_PROCESS,
+ PROCESS__NOATSECURE, NULL, NULL);
+ }
+
+ /* Note that we must include the legacy uid/gid test below
+ to retain it, as the new userland will simply use the
+ value passed by AT_SECURE to decide whether to enable
+ secure mode. */
+ return ( atsecure || current->euid != current->uid ||
+ current->egid != current->gid);
+}
+
+static void selinux_bprm_free_security(struct linux_binprm *bprm)
+{
+ /* Nothing to do - not dynamically allocated. */
+ return;
+}
+
+/* Derived from fs/exec.c:flush_old_files. */
+static inline void flush_unauthorized_files(struct files_struct * files)
+{
+ struct avc_audit_data ad;
+ struct file *file;
+ long j = -1;
+
+ AVC_AUDIT_DATA_INIT(&ad,FS);
+
+ spin_lock(&files->file_lock);
+ for (;;) {
+ unsigned long set, i;
+
+ j++;
+ i = j * __NFDBITS;
+ if (i >= files->max_fds || i >= files->max_fdset)
+ break;
+ set = files->open_fds->fds_bits[j];
+ if (!set)
+ continue;
+ spin_unlock(&files->file_lock);
+ for ( ; set ; i++,set >>= 1) {
+ if (set & 1) {
+ file = fget(i);
+ if (!file)
+ continue;
+ if (file_has_perm(current,
+ file,
+ file_to_av(file)))
+ sys_close(i);
+ fput(file);
+ }
+ }
+ spin_lock(&files->file_lock);
+
+ }
+ spin_unlock(&files->file_lock);
+}
+
+static void selinux_bprm_compute_creds(struct linux_binprm *bprm)
+{
+ struct task_security_struct *tsec, *psec;
+ u32 sid;
+ struct av_decision avd;
+ int rc;
+
+ secondary_ops->bprm_compute_creds(bprm);
+
+ tsec = current->security;
+
+ sid = (u32)bprm->security;
+ if (!sid)
+ sid = tsec->sid;
+
+ tsec->osid = tsec->sid;
+ if (tsec->sid != sid) {
+ /* Check for shared state. If not ok, leave SID
+ unchanged and kill. */
+ if ((atomic_read(¤t->fs->count) > 1 ||
+ atomic_read(¤t->files->count) > 1 ||
+ atomic_read(¤t->sighand->count) > 1)) {
+ rc = avc_has_perm(tsec->sid, sid,
+ SECCLASS_PROCESS, PROCESS__SHARE,
+ NULL, NULL);
+ if (rc) {
+ force_sig_specific(SIGKILL, current);
+ return;
+ }
+ }
+
+ /* Check for ptracing, and update the task SID if ok.
+ Otherwise, leave SID unchanged and kill. */
+ task_lock(current);
+ if (current->ptrace & PT_PTRACED) {
+ psec = current->parent->security;
+ rc = avc_has_perm_noaudit(psec->sid, sid,
+ SECCLASS_PROCESS, PROCESS__PTRACE,
+ NULL, &avd);
+ if (!rc)
+ tsec->sid = sid;
+ task_unlock(current);
+ avc_audit(psec->sid, sid, SECCLASS_PROCESS,
+ PROCESS__PTRACE, &avd, rc, NULL);
+ if (rc) {
+ force_sig_specific(SIGKILL, current);
+ return;
+ }
+ } else {
+ tsec->sid = sid;
+ task_unlock(current);
+ }
+
+ /* Close files for which the new task SID is not authorized. */
+ flush_unauthorized_files(current->files);
+
+ /* Wake up the parent if it is waiting so that it can
+ recheck wait permission to the new task SID. */
+ wake_up_interruptible(¤t->parent->wait_chldexit);
+ }
+}
+
+/* superblock security operations */
+
+static int selinux_sb_alloc_security(struct super_block *sb)
+{
+ return superblock_alloc_security(sb);
+}
+
+static void selinux_sb_free_security(struct super_block *sb)
+{
+ superblock_free_security(sb);
+}
+
+static int selinux_sb_kern_mount(struct super_block *sb)
+{
+ struct avc_audit_data ad;
+ int rc;
+
+ rc = superblock_doinit(sb);
+ if (rc)
+ return rc;
+
+ AVC_AUDIT_DATA_INIT(&ad,FS);
+ ad.u.fs.dentry = sb->s_root;
+ return superblock_has_perm(current, sb, FILESYSTEM__MOUNT, &ad);
+}
+
+static int selinux_sb_statfs(struct super_block *sb)
+{
+ struct avc_audit_data ad;
+
+ AVC_AUDIT_DATA_INIT(&ad,FS);
+ ad.u.fs.dentry = sb->s_root;
+ return superblock_has_perm(current, sb, FILESYSTEM__GETATTR, &ad);
+}
+
+static int selinux_mount(char * dev_name,
+ struct nameidata *nd,
+ char * type,
+ unsigned long flags,
+ void * data)
+{
+ if (flags & MS_REMOUNT)
+ return superblock_has_perm(current, nd->mnt->mnt_sb,
+ FILESYSTEM__REMOUNT, NULL);
+ else
+ return dentry_has_perm(current, nd->mnt, nd->dentry,
+ FILE__MOUNTON);
+}
+
+static int selinux_umount(struct vfsmount *mnt, int flags)
+{
+ return superblock_has_perm(current,mnt->mnt_sb,
+ FILESYSTEM__UNMOUNT,NULL);
+}
+
+/* inode security operations */
+
+static int selinux_inode_alloc_security(struct inode *inode)
+{
+ return inode_alloc_security(inode);
+}
+
+static void selinux_inode_free_security(struct inode *inode)
+{
+ inode_free_security(inode);
+}
+
+static int selinux_inode_create(struct inode *dir, struct dentry *dentry, int mask)
+{
+ return may_create(dir, dentry, SECCLASS_FILE);
+}
+
+static void selinux_inode_post_create(struct inode *dir, struct dentry *dentry, int mask)
+{
+ post_create(dir, dentry);
+}
+
+static int selinux_inode_link(struct dentry *old_dentry, struct inode *dir, struct dentry *new_dentry)
+{
+ int rc;
+
+ rc = secondary_ops->inode_link(old_dentry,dir,new_dentry);
+ if (rc)
+ return rc;
+ return may_link(dir, old_dentry, MAY_LINK);
+}
+
+static void selinux_inode_post_link(struct dentry *old_dentry, struct inode *inode, struct dentry *new_dentry)
+{
+ return;
+}
+
+static int selinux_inode_unlink(struct inode *dir, struct dentry *dentry)
+{
+ return may_link(dir, dentry, MAY_UNLINK);
+}
+
+static int selinux_inode_symlink(struct inode *dir, struct dentry *dentry, const char *name)
+{
+ return may_create(dir, dentry, SECCLASS_LNK_FILE);
+}
+
+static void selinux_inode_post_symlink(struct inode *dir, struct dentry *dentry, const char *name)
+{
+ post_create(dir, dentry);
+}
+
+static int selinux_inode_mkdir(struct inode *dir, struct dentry *dentry, int mask)
+{
+ return may_create(dir, dentry, SECCLASS_DIR);
+}
+
+static void selinux_inode_post_mkdir(struct inode *dir, struct dentry *dentry, int mask)
+{
+ post_create(dir, dentry);
+}
+
+static int selinux_inode_rmdir(struct inode *dir, struct dentry *dentry)
+{
+ return may_link(dir, dentry, MAY_RMDIR);
+}
+
+static int selinux_inode_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev)
+{
+ return may_create(dir, dentry, inode_mode_to_security_class(mode));
+}
+
+static void selinux_inode_post_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev)
+{
+ post_create(dir, dentry);
+}
+
+static int selinux_inode_rename(struct inode *old_inode, struct dentry *old_dentry,
+ struct inode *new_inode, struct dentry *new_dentry)
+{
+ return may_rename(old_inode, old_dentry, new_inode, new_dentry);
+}
+
+static void selinux_inode_post_rename(struct inode *old_inode, struct dentry *old_dentry,
+ struct inode *new_inode, struct dentry *new_dentry)
+{
+ return;
+}
+
+static int selinux_inode_readlink(struct dentry *dentry)
+{
+ return dentry_has_perm(current, NULL, dentry, FILE__READ);
+}
+
+static int selinux_inode_follow_link(struct dentry *dentry, struct nameidata *nameidata)
+{
+ int rc;
+
+ rc = secondary_ops->inode_follow_link(dentry,nameidata);
+ if (rc)
+ return rc;
+ return dentry_has_perm(current, NULL, dentry, FILE__READ);
+}
+
+static int selinux_inode_permission(struct inode *inode, int mask)
+{
+ if (!mask) {
+ /* No permission to check. Existence test. */
+ return 0;
+ }
+
+ return inode_has_perm(current, inode,
+ file_mask_to_av(inode->i_mode, mask), NULL, NULL);
+}
+
+static int selinux_inode_setattr(struct dentry *dentry, struct iattr *iattr)
+{
+ if (iattr->ia_valid & (ATTR_MODE | ATTR_UID | ATTR_GID |
+ ATTR_ATIME_SET | ATTR_MTIME_SET))
+ return dentry_has_perm(current, NULL, dentry, FILE__SETATTR);
+
+ return dentry_has_perm(current, NULL, dentry, FILE__WRITE);
+}
+
+static int selinux_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+{
+ return dentry_has_perm(current, mnt, dentry, FILE__GETATTR);
+}
+
+static int selinux_inode_setxattr(struct dentry *dentry, char *name, void *value, size_t size, int flags)
+{
+ struct task_security_struct *tsec = current->security;
+ struct inode *inode = dentry->d_inode;
+ struct inode_security_struct *isec = inode->i_security;
+ struct superblock_security_struct *sbsec;
+ struct avc_audit_data ad;
+ u32 newsid;
+ int rc = 0;
+
+ if (strcmp(name, XATTR_NAME_SELINUX)) {
+ if (!strncmp(name, XATTR_SECURITY_PREFIX,
+ sizeof XATTR_SECURITY_PREFIX - 1) &&
+ !capable(CAP_SYS_ADMIN)) {
+ /* A different attribute in the security namespace.
+ Restrict to administrator. */
+ return -EPERM;
+ }
+
+ /* Not an attribute we recognize, so just check the
+ ordinary setattr permission. */
+ return dentry_has_perm(current, NULL, dentry, FILE__SETATTR);
+ }
+
+ AVC_AUDIT_DATA_INIT(&ad,FS);
+ ad.u.fs.dentry = dentry;
+
+ rc = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ FILE__RELABELFROM,
+ &isec->avcr, &ad);
+ if (rc)
+ return rc;
+
+ rc = security_context_to_sid(value, size, &newsid);
+ if (rc)
+ return rc;
+
+ rc = avc_has_perm(tsec->sid, newsid, isec->sclass,
+ FILE__RELABELTO, NULL, &ad);
+ if (rc)
+ return rc;
+
+ sbsec = inode->i_sb->s_security;
+ if (!sbsec)
+ return 0;
+
+ return avc_has_perm(newsid,
+ sbsec->sid,
+ SECCLASS_FILESYSTEM,
+ FILESYSTEM__ASSOCIATE,
+ NULL,
+ &ad);
+}
+
+static void selinux_inode_post_setxattr(struct dentry *dentry, char *name,
+ void *value, size_t size, int flags)
+{
+ struct inode *inode = dentry->d_inode;
+ struct inode_security_struct *isec = inode->i_security;
+ u32 newsid;
+ int rc;
+
+ if (strcmp(name, XATTR_NAME_SELINUX)) {
+ /* Not an attribute we recognize, so nothing to do. */
+ return;
+ }
+
+ rc = security_context_to_sid(value, size, &newsid);
+ if (rc) {
+ printk(KERN_WARNING "%s: unable to obtain SID for context "
+ "%s, rc=%d\n", __FUNCTION__, (char*)value, -rc);
+ return;
+ }
+
+ isec->sid = newsid;
+ return;
+}
+
+static int selinux_inode_getxattr (struct dentry *dentry, char *name)
+{
+ return dentry_has_perm(current, NULL, dentry, FILE__GETATTR);
+}
+
+static int selinux_inode_listxattr (struct dentry *dentry)
+{
+ return dentry_has_perm(current, NULL, dentry, FILE__GETATTR);
+}
+
+static int selinux_inode_removexattr (struct dentry *dentry, char *name)
+{
+ if (strcmp(name, XATTR_NAME_SELINUX)) {
+ if (!strncmp(name, XATTR_SECURITY_PREFIX,
+ sizeof XATTR_SECURITY_PREFIX - 1) &&
+ !capable(CAP_SYS_ADMIN)) {
+ /* A different attribute in the security namespace.
+ Restrict to administrator. */
+ return -EPERM;
+ }
+
+ /* Not an attribute we recognize, so just check the
+ ordinary setattr permission. Might want a separate
+ permission for removexattr. */
+ return dentry_has_perm(current, NULL, dentry, FILE__SETATTR);
+ }
+
+ /* No one is allowed to remove a SELinux security label.
+ You can change the label, but all data must be labeled. */
+ return -EACCES;
+}
+
+static int selinux_inode_getsecurity(struct dentry *dentry, const char *name, void *buffer, size_t size)
+{
+ struct inode *inode = dentry->d_inode;
+ struct inode_security_struct *isec = inode->i_security;
+ char *context;
+ unsigned len;
+ int rc;
+
+ /* Permission check handled by selinux_inode_getxattr hook.*/
+
+ if (strcmp(name, XATTR_SELINUX_SUFFIX))
+ return -EOPNOTSUPP;
+
+ rc = security_sid_to_context(isec->sid, &context, &len);
+ if (rc)
+ return rc;
+
+ if (!buffer || !size) {
+ kfree(context);
+ return len;
+ }
+ if (size < len) {
+ kfree(context);
+ return -ERANGE;
+ }
+ memcpy(buffer, context, len);
+ kfree(context);
+ return len;
+}
+
+static int selinux_inode_setsecurity(struct dentry *dentry, const char *name,
+ const void *value, size_t size, int flags)
+{
+ struct inode *inode = dentry->d_inode;
+ struct inode_security_struct *isec = inode->i_security;
+ u32 newsid;
+ int rc;
+
+ if (strcmp(name, XATTR_SELINUX_SUFFIX))
+ return -EOPNOTSUPP;
+
+ if (!value || !size)
+ return -EACCES;
+
+ rc = security_context_to_sid((void*)value, size, &newsid);
+ if (rc)
+ return rc;
+
+ isec->sid = newsid;
+ return 0;
+}
+
+static int selinux_inode_listsecurity(struct dentry *dentry, char *buffer)
+{
+ const int len = sizeof(XATTR_NAME_SELINUX);
+ if (buffer)
+ memcpy(buffer, XATTR_NAME_SELINUX, len);
+ return len;
+}
+
+/* file security operations */
+
+static int selinux_file_permission(struct file *file, int mask)
+{
+ struct inode *inode = file->f_dentry->d_inode;
+
+ if (!mask) {
+ /* No permission to check. Existence test. */
+ return 0;
+ }
+
+ /* file_mask_to_av won't add FILE__WRITE if MAY_APPEND is set */
+ if ((file->f_flags & O_APPEND) && (mask & MAY_WRITE))
+ mask |= MAY_APPEND;
+
+ return file_has_perm(current, file,
+ file_mask_to_av(inode->i_mode, mask));
+}
+
+static int selinux_file_alloc_security(struct file *file)
+{
+ return file_alloc_security(file);
+}
+
+static void selinux_file_free_security(struct file *file)
+{
+ file_free_security(file);
+}
+
+static int selinux_file_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ int error = 0;
+
+ switch (cmd) {
+ case FIONREAD:
+ /* fall through */
+ case FIBMAP:
+ /* fall through */
+ case FIGETBSZ:
+ /* fall through */
+ case EXT2_IOC_GETFLAGS:
+ /* fall through */
+ case EXT2_IOC_GETVERSION:
+ error = file_has_perm(current, file, FILE__GETATTR);
+ break;
+
+ case EXT2_IOC_SETFLAGS:
+ /* fall through */
+ case EXT2_IOC_SETVERSION:
+ error = file_has_perm(current, file, FILE__SETATTR);
+ break;
+
+ /* sys_ioctl() checks */
+ case FIONBIO:
+ /* fall through */
+ case FIOASYNC:
+ error = file_has_perm(current, file, 0);
+ break;
+
+ case KDSKBENT:
+ case KDSKBSENT:
+ if (!capable(CAP_SYS_TTY_CONFIG))
+ error = -EPERM;
+ break;
+
+ /* default case assumes that the command will go
+ * to the file's ioctl() function.
+ */
+ default:
+ error = file_has_perm(current, file, FILE__IOCTL);
+
+ }
+ return error;
+}
+
+static int selinux_file_mmap(struct file *file, unsigned long prot, unsigned long flags)
+{
+ u32 av;
+
+ if (file) {
+ /* read access is always possible with a mapping */
+ av = FILE__READ;
+
+ /* write access only matters if the mapping is shared */
+ if ((flags & MAP_TYPE) == MAP_SHARED && (prot & PROT_WRITE))
+ av |= FILE__WRITE;
+
+ if (prot & PROT_EXEC)
+ av |= FILE__EXECUTE;
+
+ return file_has_perm(current, file, av);
+ }
+ return 0;
+}
+
+static int selinux_file_mprotect(struct vm_area_struct *vma,
+ unsigned long prot)
+{
+ return selinux_file_mmap(vma->vm_file, prot, vma->vm_flags);
+}
+
+static int selinux_file_lock(struct file *file, unsigned int cmd)
+{
+ return file_has_perm(current, file, FILE__LOCK);
+}
+
+static int selinux_file_fcntl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ int err = 0;
+
+ switch (cmd) {
+ case F_SETFL:
+ if (!file->f_dentry || !file->f_dentry->d_inode) {
+ err = -EINVAL;
+ break;
+ }
+
+ if ((file->f_flags & O_APPEND) && !(arg & O_APPEND)) {
+ err = file_has_perm(current, file,FILE__WRITE);
+ break;
+ }
+ /* fall through */
+ case F_SETOWN:
+ case F_SETSIG:
+ case F_GETFL:
+ case F_GETOWN:
+ case F_GETSIG:
+ /* Just check FD__USE permission */
+ err = file_has_perm(current, file, 0);
+ break;
+ case F_GETLK:
+ case F_SETLK:
+ case F_SETLKW:
+ case F_GETLK64:
+ case F_SETLK64:
+ case F_SETLKW64:
+ if (!file->f_dentry || !file->f_dentry->d_inode) {
+ err = -EINVAL;
+ break;
+ }
+ err = file_has_perm(current, file, FILE__LOCK);
+ break;
+ }
+
+ return err;
+}
+
+static int selinux_file_set_fowner(struct file *file)
+{
+ struct task_security_struct *tsec;
+ struct file_security_struct *fsec;
+
+ tsec = current->security;
+ fsec = file->f_security;
+ fsec->fown_sid = tsec->sid;
+
+ return 0;
+}
+
+static int selinux_file_send_sigiotask(struct task_struct *tsk,
+ struct fown_struct *fown,
+ int fd, int reason)
+{
+ struct file *file;
+ u32 perm;
+ struct task_security_struct *tsec;
+ struct file_security_struct *fsec;
+
+ /* struct fown_struct is never outside the context of a struct file */
+ file = (struct file *)((long)fown - offsetof(struct file,f_owner));
+
+ tsec = tsk->security;
+ fsec = file->f_security;
+
+ if (!fown->signum)
+ perm = signal_to_av(SIGIO); /* as per send_sigio_to_task */
+ else
+ perm = signal_to_av(fown->signum);
+
+ return avc_has_perm(fsec->fown_sid, tsec->sid,
+ SECCLASS_PROCESS, perm, NULL, NULL);
+}
+
+static int selinux_file_receive(struct file *file)
+{
+ return file_has_perm(current, file, file_to_av(file));
+}
+
+/* task security operations */
+
+static int selinux_task_create(unsigned long clone_flags)
+{
+ return task_has_perm(current, current, PROCESS__FORK);
+}
+
+static int selinux_task_alloc_security(struct task_struct *tsk)
+{
+ struct task_security_struct *tsec1, *tsec2;
+ int rc;
+
+ tsec1 = current->security;
+
+ rc = task_alloc_security(tsk);
+ if (rc)
+ return rc;
+ tsec2 = tsk->security;
+
+ tsec2->osid = tsec1->osid;
+ tsec2->sid = tsec1->sid;
+
+ /* Retain the exec and create SIDs across fork */
+ tsec2->exec_sid = tsec1->exec_sid;
+ tsec2->create_sid = tsec1->create_sid;
+
+ return 0;
+}
+
+static void selinux_task_free_security(struct task_struct *tsk)
+{
+ task_free_security(tsk);
+}
+
+static int selinux_task_setuid(uid_t id0, uid_t id1, uid_t id2, int flags)
+{
+ /* Since setuid only affects the current process, and
+ since the SELinux controls are not based on the Linux
+ identity attributes, SELinux does not need to control
+ this operation. However, SELinux does control the use
+ of the CAP_SETUID and CAP_SETGID capabilities using the
+ capable hook. */
+ return 0;
+}
+
+static int selinux_task_post_setuid(uid_t id0, uid_t id1, uid_t id2, int flags)
+{
+ return secondary_ops->task_post_setuid(id0,id1,id2,flags);
+}
+
+static int selinux_task_setgid(gid_t id0, gid_t id1, gid_t id2, int flags)
+{
+ /* See the comment for setuid above. */
+ return 0;
+}
+
+static int selinux_task_setpgid(struct task_struct *p, pid_t pgid)
+{
+ return task_has_perm(current, p, PROCESS__SETPGID);
+}
+
+static int selinux_task_getpgid(struct task_struct *p)
+{
+ return task_has_perm(current, p, PROCESS__GETPGID);
+}
+
+static int selinux_task_getsid(struct task_struct *p)
+{
+ return task_has_perm(current, p, PROCESS__GETSESSION);
+}
+
+static int selinux_task_setgroups(int gidsetsize, gid_t *grouplist)
+{
+ /* See the comment for setuid above. */
+ return 0;
+}
+
+static int selinux_task_setnice(struct task_struct *p, int nice)
+{
+ return task_has_perm(current,p, PROCESS__SETSCHED);
+}
+
+static int selinux_task_setrlimit(unsigned int resource, struct rlimit *new_rlim)
+{
+ /* SELinux does not currently provide a process
+ resource limit policy based on security contexts.
+ It does control the use of the CAP_SYS_RESOURCE capability
+ using the capable hook. */
+ return 0;
+}
+
+static int selinux_task_setscheduler(struct task_struct *p, int policy, struct sched_param *lp)
+{
+ struct task_security_struct *tsec1, *tsec2;
+
+ tsec1 = current->security;
+ tsec2 = p->security;
+
+ /* No auditing from the setscheduler hook, since the runqueue lock
+ is held and the system will deadlock if we try to log an audit
+ message. */
+ return avc_has_perm_noaudit(tsec1->sid, tsec2->sid,
+ SECCLASS_PROCESS, PROCESS__SETSCHED,
+ &tsec2->avcr, NULL);
+}
+
+static int selinux_task_getscheduler(struct task_struct *p)
+{
+ return task_has_perm(current, p, PROCESS__GETSCHED);
+}
+
+static int selinux_task_kill(struct task_struct *p, struct siginfo *info, int sig)
+{
+ u32 perm;
+
+ if (info && ((unsigned long)info == 1 ||
+ (unsigned long)info == 2 || SI_FROMKERNEL(info)))
+ return 0;
+
+ if (!sig)
+ perm = PROCESS__SIGNULL; /* null signal; existence test */
+ else
+ perm = signal_to_av(sig);
+
+ return task_has_perm(current, p, perm);
+}
+
+static int selinux_task_prctl(int option,
+ unsigned long arg2,
+ unsigned long arg3,
+ unsigned long arg4,
+ unsigned long arg5)
+{
+ /* The current prctl operations do not appear to require
+ any SELinux controls since they merely observe or modify
+ the state of the current process. */
+ return 0;
+}
+
+static int selinux_task_wait(struct task_struct *p)
+{
+ u32 perm;
+
+ perm = signal_to_av(p->exit_signal);
+
+ return task_has_perm(p, current, perm);
+}
+
+static void selinux_task_reparent_to_init(struct task_struct *p)
+{
+ struct task_security_struct *tsec;
+
+ secondary_ops->task_reparent_to_init(p);
+
+ tsec = p->security;
+ tsec->osid = tsec->sid;
+ tsec->sid = SECINITSID_KERNEL;
+ return;
+}
+
+static void selinux_task_to_inode(struct task_struct *p,
+ struct inode *inode)
+{
+ struct task_security_struct *tsec = p->security;
+ struct inode_security_struct *isec = inode->i_security;
+
+ isec->sid = tsec->sid;
+ isec->initialized = 1;
+ return;
+}
+
+#ifdef CONFIG_SECURITY_NETWORK
+
+/* socket security operations */
+static int socket_has_perm(struct task_struct *task, struct socket *sock,
+ u32 perms)
+{
+ struct inode_security_struct *isec;
+ struct task_security_struct *tsec;
+ struct avc_audit_data ad;
+ int err;
+
+ tsec = task->security;
+ isec = SOCK_INODE(sock)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.sk = sock->sk;
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ perms, &isec->avcr, &ad);
+
+ return err;
+}
+
+static int selinux_socket_create(int family, int type, int protocol)
+{
+ int err;
+ struct task_security_struct *tsec;
+
+ tsec = current->security;
+
+ err = avc_has_perm(tsec->sid, tsec->sid,
+ socket_type_to_security_class(family, type),
+ SOCKET__CREATE, NULL, NULL);
+
+ return err;
+}
+
+static void selinux_socket_post_create(struct socket *sock, int family, int type, int protocol)
+{
+ int err;
+ struct inode_security_struct *isec;
+ struct task_security_struct *tsec;
+
+ err = inode_doinit(SOCK_INODE(sock));
+ if (err < 0)
+ return;
+ isec = SOCK_INODE(sock)->i_security;
+
+ tsec = current->security;
+ isec->sclass = socket_type_to_security_class(family, type);
+ isec->sid = tsec->sid;
+
+ return;
+}
+
+/* Range of port numbers used to automatically bind.
+ Need to determine whether we should perform a name_bind
+ permission check between the socket and the port number. */
+#define ip_local_port_range_0 sysctl_local_port_range[0]
+#define ip_local_port_range_1 sysctl_local_port_range[1]
+
+static int selinux_socket_bind(struct socket *sock, struct sockaddr *address, int addrlen)
+{
+ int err;
+
+ err = socket_has_perm(current, sock, SOCKET__BIND);
+ if (err)
+ return err;
+
+ /*
+ * If PF_INET, check name_bind permission for the port.
+ */
+ if (sock->sk->sk_family == PF_INET) {
+ struct inode_security_struct *isec;
+ struct task_security_struct *tsec;
+ struct avc_audit_data ad;
+ struct sockaddr_in *addr = (struct sockaddr_in *)address;
+ unsigned short snum = ntohs(addr->sin_port);
+ struct sock *sk = sock->sk;
+ u32 sid;
+
+ tsec = current->security;
+ isec = SOCK_INODE(sock)->i_security;
+
+ if (snum&&(snum < max(PROT_SOCK,ip_local_port_range_0) ||
+ snum > ip_local_port_range_1)) {
+ err = security_port_sid(sk->sk_family, sk->sk_type,
+ sk->sk_protocol, snum, &sid);
+ if (err)
+ return err;
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.port = snum;
+ err = avc_has_perm(isec->sid, sid,
+ isec->sclass,
+ SOCKET__NAME_BIND, NULL, &ad);
+ if (err)
+ return err;
+ }
+ }
+
+ return 0;
+}
+
+static int selinux_socket_connect(struct socket *sock, struct sockaddr *address, int addrlen)
+{
+ int err;
+ struct sock *sk = sock->sk;
+ struct avc_audit_data ad;
+ struct task_security_struct *tsec;
+ struct inode_security_struct *isec;
+
+ isec = SOCK_INODE(sock)->i_security;
+
+ tsec = current->security;
+
+ AVC_AUDIT_DATA_INIT(&ad, NET);
+ ad.u.net.sk = sk;
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__CONNECT, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_listen(struct socket *sock, int backlog)
+{
+ int err;
+ struct task_security_struct *tsec;
+ struct inode_security_struct *isec;
+ struct avc_audit_data ad;
+
+ tsec = current->security;
+
+ isec = SOCK_INODE(sock)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad, NET);
+ ad.u.net.sk = sock->sk;
+
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__LISTEN, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_accept(struct socket *sock, struct socket *newsock)
+{
+ int err;
+ struct task_security_struct *tsec;
+ struct inode_security_struct *isec;
+ struct inode_security_struct *newisec;
+ struct avc_audit_data ad;
+
+ tsec = current->security;
+
+ isec = SOCK_INODE(sock)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad, NET);
+ ad.u.net.sk = sock->sk;
+
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__ACCEPT, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ err = inode_doinit(SOCK_INODE(newsock));
+ if (err < 0)
+ return err;
+ newisec = SOCK_INODE(newsock)->i_security;
+
+ newisec->sclass = isec->sclass;
+ newisec->sid = isec->sid;
+
+ return 0;
+}
+
+static int selinux_socket_sendmsg(struct socket *sock, struct msghdr *msg,
+ int size)
+{
+ struct task_security_struct *tsec;
+ struct inode_security_struct *isec;
+ struct avc_audit_data ad;
+ struct sock *sk;
+ int err;
+
+ isec = SOCK_INODE(sock)->i_security;
+
+ tsec = current->security;
+
+ sk = sock->sk;
+
+ AVC_AUDIT_DATA_INIT(&ad, NET);
+ ad.u.net.sk = sk;
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__WRITE, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_recvmsg(struct socket *sock, struct msghdr *msg,
+ int size, int flags)
+{
+ struct inode_security_struct *isec;
+ struct task_security_struct *tsec;
+ struct avc_audit_data ad;
+ int err;
+
+ isec = SOCK_INODE(sock)->i_security;
+ tsec = current->security;
+
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.sk = sock->sk;
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__READ, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_getsockname(struct socket *sock)
+{
+ struct inode_security_struct *isec;
+ struct task_security_struct *tsec;
+ struct avc_audit_data ad;
+ int err;
+
+ tsec = current->security;
+ isec = SOCK_INODE(sock)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.sk = sock->sk;
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__GETATTR, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_getpeername(struct socket *sock)
+{
+ struct inode_security_struct *isec;
+ struct task_security_struct *tsec;
+ struct avc_audit_data ad;
+ int err;
+
+ tsec = current->security;
+ isec = SOCK_INODE(sock)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.sk = sock->sk;
+ err = avc_has_perm(tsec->sid, isec->sid, isec->sclass,
+ SOCKET__GETATTR, &isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_setsockopt(struct socket *sock,int level,int optname)
+{
+ return socket_has_perm(current, sock, SOCKET__SETOPT);
+}
+
+static int selinux_socket_getsockopt(struct socket *sock, int level,
+ int optname)
+{
+ return socket_has_perm(current, sock, SOCKET__GETOPT);
+}
+
+static int selinux_socket_shutdown(struct socket *sock, int how)
+{
+ return socket_has_perm(current, sock, SOCKET__SHUTDOWN);
+}
+
+static int selinux_socket_unix_stream_connect(struct socket *sock,
+ struct socket *other,
+ struct sock *newsk)
+{
+ struct inode_security_struct *isec;
+ struct inode_security_struct *other_isec;
+ struct avc_audit_data ad;
+ int err;
+
+ isec = SOCK_INODE(sock)->i_security;
+ other_isec = SOCK_INODE(other)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.sk = other->sk;
+
+ err = avc_has_perm(isec->sid, other_isec->sid,
+ isec->sclass,
+ UNIX_STREAM_SOCKET__CONNECTTO,
+ &other_isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int selinux_socket_unix_may_send(struct socket *sock,
+ struct socket *other)
+{
+ struct inode_security_struct *isec;
+ struct inode_security_struct *other_isec;
+ struct avc_audit_data ad;
+ int err;
+
+ isec = SOCK_INODE(sock)->i_security;
+ other_isec = SOCK_INODE(other)->i_security;
+
+ AVC_AUDIT_DATA_INIT(&ad,NET);
+ ad.u.net.sk = other->sk;
+
+ err = avc_has_perm(isec->sid, other_isec->sid,
+ isec->sclass,
+ SOCKET__SENDTO,
+ &other_isec->avcr, &ad);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+#endif
+
+static int ipc_alloc_security(struct task_struct *task,
+ struct kern_ipc_perm *perm,
+ u16 sclass)
+{
+ struct task_security_struct *tsec = task->security;
+ struct ipc_security_struct *isec;
+
+ isec = kmalloc(sizeof(struct ipc_security_struct), GFP_KERNEL);
+ if (!isec)
+ return -ENOMEM;
+
+ memset(isec, 0, sizeof(struct ipc_security_struct));
+ isec->magic = SELINUX_MAGIC;
+ isec->sclass = sclass;
+ isec->ipc_perm = perm;
+ if (tsec) {
+ isec->sid = tsec->sid;
+ } else {
+ isec->sid = SECINITSID_UNLABELED;
+ }
+ perm->security = isec;
+
+ return 0;
+}
+
+static void ipc_free_security(struct kern_ipc_perm *perm)
+{
+ struct ipc_security_struct *isec = perm->security;
+ if (!isec || isec->magic != SELINUX_MAGIC)
+ return;
+
+ perm->security = NULL;
+ kfree(isec);
+}
+
+static int msg_msg_alloc_security(struct msg_msg *msg)
+{
+ struct msg_security_struct *msec;
+
+ msec = kmalloc(sizeof(struct msg_security_struct), GFP_KERNEL);
+ if (!msec)
+ return -ENOMEM;
+
+ memset(msec, 0, sizeof(struct msg_security_struct));
+ msec->magic = SELINUX_MAGIC;
+ msec->msg = msg;
+ msec->sid = SECINITSID_UNLABELED;
+ msg->security = msec;
+
+ return 0;
+}
+
+static void msg_msg_free_security(struct msg_msg *msg)
+{
+ struct msg_security_struct *msec = msg->security;
+ if (!msec || msec->magic != SELINUX_MAGIC)
+ return;
+
+ msg->security = NULL;
+ kfree(msec);
+}
+
+static int ipc_has_perm(struct kern_ipc_perm *ipc_perms,
+ u16 sclass, u32 perms)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+
+ tsec = current->security;
+ isec = ipc_perms->security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = ipc_perms->key;
+
+ return avc_has_perm(tsec->sid, isec->sid, sclass,
+ perms, &isec->avcr, &ad);
+}
+
+static int selinux_msg_msg_alloc_security(struct msg_msg *msg)
+{
+ return msg_msg_alloc_security(msg);
+}
+
+static void selinux_msg_msg_free_security(struct msg_msg *msg)
+{
+ return msg_msg_free_security(msg);
+}
+
+/* message queue security operations */
+static int selinux_msg_queue_alloc_security(struct msg_queue *msq)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+ int rc;
+
+ rc = ipc_alloc_security(current, &msq->q_perm, SECCLASS_MSGQ);
+ if (rc)
+ return rc;
+
+ tsec = current->security;
+ isec = msq->q_perm.security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = msq->q_perm.key;
+
+ rc = avc_has_perm(tsec->sid, isec->sid, SECCLASS_MSGQ,
+ MSGQ__CREATE, &isec->avcr, &ad);
+ if (rc) {
+ ipc_free_security(&msq->q_perm);
+ return rc;
+ }
+ return 0;
+}
+
+static void selinux_msg_queue_free_security(struct msg_queue *msq)
+{
+ ipc_free_security(&msq->q_perm);
+}
+
+static int selinux_msg_queue_associate(struct msg_queue *msq, int msqflg)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+
+ tsec = current->security;
+ isec = msq->q_perm.security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = msq->q_perm.key;
+
+ return avc_has_perm(tsec->sid, isec->sid, SECCLASS_MSGQ,
+ MSGQ__ASSOCIATE, &isec->avcr, &ad);
+}
+
+static int selinux_msg_queue_msgctl(struct msg_queue *msq, int cmd)
+{
+ int err;
+ int perms;
+
+ switch(cmd) {
+ case IPC_INFO:
+ case MSG_INFO:
+ /* No specific object, just general system-wide information. */
+ return task_has_system(current, SYSTEM__IPC_INFO);
+ case IPC_STAT:
+ case MSG_STAT:
+ perms = MSGQ__GETATTR | MSGQ__ASSOCIATE;
+ break;
+ case IPC_SET:
+ perms = MSGQ__SETATTR;
+ break;
+ case IPC_RMID:
+ perms = MSGQ__DESTROY;
+ break;
+ default:
+ return 0;
+ }
+
+ err = ipc_has_perm(&msq->q_perm, SECCLASS_MSGQ, perms);
+ return err;
+}
+
+static int selinux_msg_queue_msgsnd(struct msg_queue *msq, struct msg_msg *msg, int msqflg)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct msg_security_struct *msec;
+ struct avc_audit_data ad;
+ int rc;
+
+ tsec = current->security;
+ isec = msq->q_perm.security;
+ msec = msg->security;
+
+ /*
+ * First time through, need to assign label to the message
+ */
+ if (msec->sid == SECINITSID_UNLABELED) {
+ /*
+ * Compute new sid based on current process and
+ * message queue this message will be stored in
+ */
+ rc = security_transition_sid(tsec->sid,
+ isec->sid,
+ SECCLASS_MSG,
+ &msec->sid);
+ if (rc)
+ return rc;
+ }
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = msq->q_perm.key;
+
+ /* Can this process write to the queue? */
+ rc = avc_has_perm(tsec->sid, isec->sid, SECCLASS_MSGQ,
+ MSGQ__WRITE, &isec->avcr, &ad);
+ if (!rc)
+ /* Can this process send the message */
+ rc = avc_has_perm(tsec->sid, msec->sid,
+ SECCLASS_MSG, MSG__SEND,
+ &msec->avcr, &ad);
+ if (!rc)
+ /* Can the message be put in the queue? */
+ rc = avc_has_perm(msec->sid, isec->sid,
+ SECCLASS_MSGQ, MSGQ__ENQUEUE,
+ &isec->avcr, &ad);
+
+ return rc;
+}
+
+static int selinux_msg_queue_msgrcv(struct msg_queue *msq, struct msg_msg *msg,
+ struct task_struct *target,
+ long type, int mode)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct msg_security_struct *msec;
+ struct avc_audit_data ad;
+ int rc;
+
+ tsec = target->security;
+ isec = msq->q_perm.security;
+ msec = msg->security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = msq->q_perm.key;
+
+ rc = avc_has_perm(tsec->sid, isec->sid,
+ SECCLASS_MSGQ, MSGQ__READ,
+ &isec->avcr, &ad);
+ if (!rc)
+ rc = avc_has_perm(tsec->sid, msec->sid,
+ SECCLASS_MSG, MSG__RECEIVE,
+ &msec->avcr, &ad);
+ return rc;
+}
+
+/* Shared Memory security operations */
+static int selinux_shm_alloc_security(struct shmid_kernel *shp)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+ int rc;
+
+ rc = ipc_alloc_security(current, &shp->shm_perm, SECCLASS_SHM);
+ if (rc)
+ return rc;
+
+ tsec = current->security;
+ isec = shp->shm_perm.security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = shp->shm_perm.key;
+
+ rc = avc_has_perm(tsec->sid, isec->sid, SECCLASS_SHM,
+ SHM__CREATE, &isec->avcr, &ad);
+ if (rc) {
+ ipc_free_security(&shp->shm_perm);
+ return rc;
+ }
+ return 0;
+}
+
+static void selinux_shm_free_security(struct shmid_kernel *shp)
+{
+ ipc_free_security(&shp->shm_perm);
+}
+
+static int selinux_shm_associate(struct shmid_kernel *shp, int shmflg)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+
+ tsec = current->security;
+ isec = shp->shm_perm.security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = shp->shm_perm.key;
+
+ return avc_has_perm(tsec->sid, isec->sid, SECCLASS_SHM,
+ SHM__ASSOCIATE, &isec->avcr, &ad);
+}
+
+/* Note, at this point, shp is locked down */
+static int selinux_shm_shmctl(struct shmid_kernel *shp, int cmd)
+{
+ int perms;
+ int err;
+
+ switch(cmd) {
+ case IPC_INFO:
+ case SHM_INFO:
+ /* No specific object, just general system-wide information. */
+ return task_has_system(current, SYSTEM__IPC_INFO);
+ case IPC_STAT:
+ case SHM_STAT:
+ perms = SHM__GETATTR | SHM__ASSOCIATE;
+ break;
+ case IPC_SET:
+ perms = SHM__SETATTR;
+ break;
+ case SHM_LOCK:
+ case SHM_UNLOCK:
+ perms = SHM__LOCK;
+ break;
+ case IPC_RMID:
+ perms = SHM__DESTROY;
+ break;
+ default:
+ return 0;
+ }
+
+ err = ipc_has_perm(&shp->shm_perm, SECCLASS_SHM, perms);
+ return err;
+}
+
+static int selinux_shm_shmat(struct shmid_kernel *shp,
+ char *shmaddr, int shmflg)
+{
+ u32 perms;
+
+ if (shmflg & SHM_RDONLY)
+ perms = SHM__READ;
+ else
+ perms = SHM__READ | SHM__WRITE;
+
+ return ipc_has_perm(&shp->shm_perm, SECCLASS_SHM, perms);
+}
+
+/* Semaphore security operations */
+static int selinux_sem_alloc_security(struct sem_array *sma)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+ int rc;
+
+ rc = ipc_alloc_security(current, &sma->sem_perm, SECCLASS_SEM);
+ if (rc)
+ return rc;
+
+ tsec = current->security;
+ isec = sma->sem_perm.security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = sma->sem_perm.key;
+
+ rc = avc_has_perm(tsec->sid, isec->sid, SECCLASS_SEM,
+ SEM__CREATE, &isec->avcr, &ad);
+ if (rc) {
+ ipc_free_security(&sma->sem_perm);
+ return rc;
+ }
+ return 0;
+}
+
+static void selinux_sem_free_security(struct sem_array *sma)
+{
+ ipc_free_security(&sma->sem_perm);
+}
+
+static int selinux_sem_associate(struct sem_array *sma, int semflg)
+{
+ struct task_security_struct *tsec;
+ struct ipc_security_struct *isec;
+ struct avc_audit_data ad;
+
+ tsec = current->security;
+ isec = sma->sem_perm.security;
+
+ AVC_AUDIT_DATA_INIT(&ad, IPC);
+ ad.u.ipc_id = sma->sem_perm.key;
+
+ return avc_has_perm(tsec->sid, isec->sid, SECCLASS_SEM,
+ SEM__ASSOCIATE, &isec->avcr, &ad);
+}
+
+/* Note, at this point, sma is locked down */
+static int selinux_sem_semctl(struct sem_array *sma, int cmd)
+{
+ int err;
+ u32 perms;
+
+ switch(cmd) {
+ case IPC_INFO:
+ case SEM_INFO:
+ /* No specific object, just general system-wide information. */
+ return task_has_system(current, SYSTEM__IPC_INFO);
+ case GETPID:
+ case GETNCNT:
+ case GETZCNT:
+ perms = SEM__GETATTR;
+ break;
+ case GETVAL:
+ case GETALL:
+ perms = SEM__READ;
+ break;
+ case SETVAL:
+ case SETALL:
+ perms = SEM__WRITE;
+ break;
+ case IPC_RMID:
+ perms = SEM__DESTROY;
+ break;
+ case IPC_SET:
+ perms = SEM__SETATTR;
+ break;
+ case IPC_STAT:
+ case SEM_STAT:
+ perms = SEM__GETATTR | SEM__ASSOCIATE;
+ break;
+ default:
+ return 0;
+ }
+
+ err = ipc_has_perm(&sma->sem_perm, SECCLASS_SEM, perms);
+ return err;
+}
+
+static int selinux_sem_semop(struct sem_array *sma,
+ struct sembuf *sops, unsigned nsops, int alter)
+{
+ u32 perms;
+
+ if (alter)
+ perms = SEM__READ | SEM__WRITE;
+ else
+ perms = SEM__READ;
+
+ return ipc_has_perm(&sma->sem_perm, SECCLASS_SEM, perms);
+}
+
+static int selinux_ipc_permission(struct kern_ipc_perm *ipcp, short flag)
+{
+ struct ipc_security_struct *isec = ipcp->security;
+ u16 sclass = SECCLASS_IPC;
+ u32 av = 0;
+
+ if (isec && isec->magic == SELINUX_MAGIC)
+ sclass = isec->sclass;
+
+ av = 0;
+ if (flag & S_IRUGO)
+ av |= IPC__UNIX_READ;
+ if (flag & S_IWUGO)
+ av |= IPC__UNIX_WRITE;
+
+ if (av == 0)
+ return 0;
+
+ return ipc_has_perm(ipcp, sclass, av);
+}
+
+/* module stacking operations */
+int selinux_register_security (const char *name, struct security_operations *ops)
+{
+ if (secondary_ops != original_ops) {
+ printk(KERN_INFO "%s: There is already a secondary security "
+ "module registered.\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ secondary_ops = ops;
+
+ printk(KERN_INFO "%s: Registering secondary module %s\n",
+ __FUNCTION__,
+ name);
+
+ return 0;
+}
+
+int selinux_unregister_security (const char *name, struct security_operations *ops)
+{
+ if (ops != secondary_ops) {
+ printk (KERN_INFO "%s: trying to unregister a security module "
+ "that is not registered.\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ secondary_ops = original_ops;
+
+ return 0;
+}
+
+static void selinux_d_instantiate (struct dentry *dentry, struct inode *inode)
+{
+ if (inode)
+ inode_doinit_with_dentry(inode, dentry);
+}
+
+static int selinux_getprocattr(struct task_struct *p,
+ char *name, void *value, size_t size)
+{
+ struct task_security_struct *tsec;
+ u32 sid;
+ char *context;
+ size_t len;
+ int error;
+
+ if (current != p) {
+ error = task_has_perm(current, p, PROCESS__GETATTR);
+ if (error)
+ return error;
+ }
+
+ if (!size)
+ return -ERANGE;
+
+ tsec = p->security;
+
+ if (!strcmp(name, "current"))
+ sid = tsec->sid;
+ else if (!strcmp(name, "prev"))
+ sid = tsec->osid;
+ else if (!strcmp(name, "exec"))
+ sid = tsec->exec_sid;
+ else if (!strcmp(name, "fscreate"))
+ sid = tsec->create_sid;
+ else
+ return -EINVAL;
+
+ if (!sid)
+ return 0;
+
+ error = security_sid_to_context(sid, &context, &len);
+ if (error)
+ return error;
+ if (len > size) {
+ kfree(context);
+ return -ERANGE;
+ }
+ memcpy(value, context, len);
+ kfree(context);
+ return len;
+}
+
+static int selinux_setprocattr(struct task_struct *p,
+ char *name, void *value, size_t size)
+{
+ struct task_security_struct *tsec;
+ u32 sid = 0;
+ int error;
+
+ if (current != p || !strcmp(name, "current")) {
+ /* SELinux only allows a process to change its own
+ security attributes, and it only allows the process
+ current SID to change via exec. */
+ return -EACCES;
+ }
+
+ /*
+ * Basic control over ability to set these attributes at all.
+ * current == p, but we'll pass them separately in case the
+ * above restriction is ever removed.
+ */
+ if (!strcmp(name, "exec"))
+ error = task_has_perm(current, p, PROCESS__SETEXEC);
+ else if (!strcmp(name, "fscreate"))
+ error = task_has_perm(current, p, PROCESS__SETFSCREATE);
+ else
+ error = -EINVAL;
+ if (error)
+ return error;
+
+ /* Obtain a SID for the context, if one was specified. */
+ if (size) {
+ int error;
+ error = security_context_to_sid(value, size, &sid);
+ if (error)
+ return error;
+ }
+
+ /* Permission checking based on the specified context is
+ performed during the actual operation (execve,
+ open/mkdir/...), when we know the full context of the
+ operation. See selinux_bprm_set_security for the execve
+ checks and may_create for the file creation checks. The
+ operation will then fail if the context is not permitted. */
+ tsec = p->security;
+ if (!strcmp(name, "exec"))
+ tsec->exec_sid = sid;
+ else if (!strcmp(name, "fscreate"))
+ tsec->create_sid = sid;
+ else
+ return -EINVAL;
+
+ return size;
+}
+
+struct security_operations selinux_ops = {
+ .ptrace = selinux_ptrace,
+ .capget = selinux_capget,
+ .capset_check = selinux_capset_check,
+ .capset_set = selinux_capset_set,
+ .sysctl = selinux_sysctl,
+ .capable = selinux_capable,
+ .quotactl = selinux_quotactl,
+ .quota_on = selinux_quota_on,
+ .syslog = selinux_syslog,
+ .vm_enough_memory = selinux_vm_enough_memory,
+
+ .netlink_send = selinux_netlink_send,
+ .netlink_recv = selinux_netlink_recv,
+
+ .bprm_alloc_security = selinux_bprm_alloc_security,
+ .bprm_free_security = selinux_bprm_free_security,
+ .bprm_compute_creds = selinux_bprm_compute_creds,
+ .bprm_set_security = selinux_bprm_set_security,
+ .bprm_check_security = selinux_bprm_check_security,
+ .bprm_secureexec = selinux_bprm_secureexec,
+
+ .sb_alloc_security = selinux_sb_alloc_security,
+ .sb_free_security = selinux_sb_free_security,
+ .sb_kern_mount = selinux_sb_kern_mount,
+ .sb_statfs = selinux_sb_statfs,
+ .sb_mount = selinux_mount,
+ .sb_umount = selinux_umount,
+
+ .inode_alloc_security = selinux_inode_alloc_security,
+ .inode_free_security = selinux_inode_free_security,
+ .inode_create = selinux_inode_create,
+ .inode_post_create = selinux_inode_post_create,
+ .inode_link = selinux_inode_link,
+ .inode_post_link = selinux_inode_post_link,
+ .inode_unlink = selinux_inode_unlink,
+ .inode_symlink = selinux_inode_symlink,
+ .inode_post_symlink = selinux_inode_post_symlink,
+ .inode_mkdir = selinux_inode_mkdir,
+ .inode_post_mkdir = selinux_inode_post_mkdir,
+ .inode_rmdir = selinux_inode_rmdir,
+ .inode_mknod = selinux_inode_mknod,
+ .inode_post_mknod = selinux_inode_post_mknod,
+ .inode_rename = selinux_inode_rename,
+ .inode_post_rename = selinux_inode_post_rename,
+ .inode_readlink = selinux_inode_readlink,
+ .inode_follow_link = selinux_inode_follow_link,
+ .inode_permission = selinux_inode_permission,
+ .inode_setattr = selinux_inode_setattr,
+ .inode_getattr = selinux_inode_getattr,
+ .inode_setxattr = selinux_inode_setxattr,
+ .inode_post_setxattr = selinux_inode_post_setxattr,
+ .inode_getxattr = selinux_inode_getxattr,
+ .inode_listxattr = selinux_inode_listxattr,
+ .inode_removexattr = selinux_inode_removexattr,
+ .inode_getsecurity = selinux_inode_getsecurity,
+ .inode_setsecurity = selinux_inode_setsecurity,
+ .inode_listsecurity = selinux_inode_listsecurity,
+
+ .file_permission = selinux_file_permission,
+ .file_alloc_security = selinux_file_alloc_security,
+ .file_free_security = selinux_file_free_security,
+ .file_ioctl = selinux_file_ioctl,
+ .file_mmap = selinux_file_mmap,
+ .file_mprotect = selinux_file_mprotect,
+ .file_lock = selinux_file_lock,
+ .file_fcntl = selinux_file_fcntl,
+ .file_set_fowner = selinux_file_set_fowner,
+ .file_send_sigiotask = selinux_file_send_sigiotask,
+ .file_receive = selinux_file_receive,
+
+ .task_create = selinux_task_create,
+ .task_alloc_security = selinux_task_alloc_security,
+ .task_free_security = selinux_task_free_security,
+ .task_setuid = selinux_task_setuid,
+ .task_post_setuid = selinux_task_post_setuid,
+ .task_setgid = selinux_task_setgid,
+ .task_setpgid = selinux_task_setpgid,
+ .task_getpgid = selinux_task_getpgid,
+ .task_getsid = selinux_task_getsid,
+ .task_setgroups = selinux_task_setgroups,
+ .task_setnice = selinux_task_setnice,
+ .task_setrlimit = selinux_task_setrlimit,
+ .task_setscheduler = selinux_task_setscheduler,
+ .task_getscheduler = selinux_task_getscheduler,
+ .task_kill = selinux_task_kill,
+ .task_wait = selinux_task_wait,
+ .task_prctl = selinux_task_prctl,
+ .task_reparent_to_init = selinux_task_reparent_to_init,
+ .task_to_inode = selinux_task_to_inode,
+
+ .ipc_permission = selinux_ipc_permission,
+
+ .msg_msg_alloc_security = selinux_msg_msg_alloc_security,
+ .msg_msg_free_security = selinux_msg_msg_free_security,
+
+ .msg_queue_alloc_security = selinux_msg_queue_alloc_security,
+ .msg_queue_free_security = selinux_msg_queue_free_security,
+ .msg_queue_associate = selinux_msg_queue_associate,
+ .msg_queue_msgctl = selinux_msg_queue_msgctl,
+ .msg_queue_msgsnd = selinux_msg_queue_msgsnd,
+ .msg_queue_msgrcv = selinux_msg_queue_msgrcv,
+
+ .shm_alloc_security = selinux_shm_alloc_security,
+ .shm_free_security = selinux_shm_free_security,
+ .shm_associate = selinux_shm_associate,
+ .shm_shmctl = selinux_shm_shmctl,
+ .shm_shmat = selinux_shm_shmat,
+
+ .sem_alloc_security = selinux_sem_alloc_security,
+ .sem_free_security = selinux_sem_free_security,
+ .sem_associate = selinux_sem_associate,
+ .sem_semctl = selinux_sem_semctl,
+ .sem_semop = selinux_sem_semop,
+
+ .register_security = selinux_register_security,
+ .unregister_security = selinux_unregister_security,
+
+ .d_instantiate = selinux_d_instantiate,
+
+ .getprocattr = selinux_getprocattr,
+ .setprocattr = selinux_setprocattr,
+
+#ifdef CONFIG_SECURITY_NETWORK
+ .unix_stream_connect = selinux_socket_unix_stream_connect,
+ .unix_may_send = selinux_socket_unix_may_send,
+
+ .socket_create = selinux_socket_create,
+ .socket_post_create = selinux_socket_post_create,
+ .socket_bind = selinux_socket_bind,
+ .socket_connect = selinux_socket_connect,
+ .socket_listen = selinux_socket_listen,
+ .socket_accept = selinux_socket_accept,
+ .socket_sendmsg = selinux_socket_sendmsg,
+ .socket_recvmsg = selinux_socket_recvmsg,
+ .socket_getsockname = selinux_socket_getsockname,
+ .socket_getpeername = selinux_socket_getpeername,
+ .socket_getsockopt = selinux_socket_getsockopt,
+ .socket_setsockopt = selinux_socket_setsockopt,
+ .socket_shutdown = selinux_socket_shutdown,
+#endif
+};
+
+__init int selinux_init(void)
+{
+ struct task_security_struct *tsec;
+
+ printk(KERN_INFO "SELinux: Initializing.\n");
+
+ /* Set the security state for the initial task. */
+ if (task_alloc_security(current))
+ panic("SELinux: Failed to initialize initial task.\n");
+ tsec = current->security;
+ tsec->osid = tsec->sid = SECINITSID_KERNEL;
+
+ avc_init();
+
+ original_ops = secondary_ops = security_ops;
+ if (!secondary_ops)
+ panic ("SELinux: No initial security operations\n");
+ if (register_security (&selinux_ops))
+ panic("SELinux: Unable to register with kernel.\n");
+
+ if (selinux_enforcing) {
+ printk(KERN_INFO "SELinux: Starting in enforcing mode\n");
+ } else {
+ printk(KERN_INFO "SELinux: Starting in permissive mode\n");
+ }
+ return 0;
+}
+
+void selinux_complete_init(void)
+{
+ printk(KERN_INFO "SELinux: Completing initialization.\n");
+
+ /* Set up any superblocks initialized prior to the policy load. */
+ printk(KERN_INFO "SELinux: Setting up existing superblocks.\n");
+ spin_lock(&sb_security_lock);
+next_sb:
+ if (!list_empty(&superblock_security_head)) {
+ struct superblock_security_struct *sbsec =
+ list_entry(superblock_security_head.next,
+ struct superblock_security_struct,
+ list);
+ struct super_block *sb = sbsec->sb;
+ spin_lock(&sb_lock);
+ sb->s_count++;
+ spin_unlock(&sb_lock);
+ spin_unlock(&sb_security_lock);
+ down_read(&sb->s_umount);
+ if (sb->s_root)
+ superblock_doinit(sb);
+ drop_super(sb);
+ spin_lock(&sb_security_lock);
+ list_del_init(&sbsec->list);
+ goto next_sb;
+ }
+ spin_unlock(&sb_security_lock);
+
+ /* Set up any inodes initialized prior to the policy load. */
+ printk(KERN_INFO "SELinux: Setting up existing inodes.\n");
+ spin_lock(&inode_security_lock);
+next_inode:
+ if (!list_empty(&inode_security_head)) {
+ struct inode_security_struct *isec =
+ list_entry(inode_security_head.next,
+ struct inode_security_struct, list);
+ struct inode *inode = isec->inode;
+ spin_unlock(&inode_security_lock);
+ inode = igrab(inode);
+ if (inode) {
+ inode_doinit(inode);
+ iput(inode);
+ }
+ spin_lock(&inode_security_lock);
+ list_del_init(&isec->list);
+ goto next_inode;
+ }
+ spin_unlock(&inode_security_lock);
+}
+
+/* SELinux requires early initialization in order to label
+ all processes and objects when they are created. */
+security_initcall(selinux_init);
+
diff -Nru a/security/selinux/include/av_inherit.h b/security/selinux/include/av_inherit.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/av_inherit.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,35 @@
+/* This file is automatically generated. Do not edit. */
+/* FLASK */
+
+struct av_inherit
+{
+ u16 tclass;
+ char **common_pts;
+ u32 common_base;
+};
+
+static struct av_inherit av_inherit[] = {
+ { SECCLASS_DIR, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_FILE, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_LNK_FILE, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_CHR_FILE, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_BLK_FILE, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_SOCK_FILE, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_FIFO_FILE, common_file_perm_to_string, 0x00020000UL },
+ { SECCLASS_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_TCP_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_UDP_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_RAWIP_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_NETLINK_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_PACKET_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_KEY_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_UNIX_STREAM_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_UNIX_DGRAM_SOCKET, common_socket_perm_to_string, 0x00400000UL },
+ { SECCLASS_IPC, common_ipc_perm_to_string, 0x00000200UL },
+ { SECCLASS_SEM, common_ipc_perm_to_string, 0x00000200UL },
+ { SECCLASS_MSGQ, common_ipc_perm_to_string, 0x00000200UL },
+ { SECCLASS_SHM, common_ipc_perm_to_string, 0x00000200UL },
+};
+
+
+/* FLASK */
diff -Nru a/security/selinux/include/av_perm_to_string.h b/security/selinux/include/av_perm_to_string.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/av_perm_to_string.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,120 @@
+/* This file is automatically generated. Do not edit. */
+/* FLASK */
+
+struct av_perm_to_string
+{
+ u16 tclass;
+ u32 value;
+ char *name;
+};
+
+static struct av_perm_to_string av_perm_to_string[] = {
+ { SECCLASS_FILESYSTEM, FILESYSTEM__MOUNT, "mount" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__REMOUNT, "remount" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__UNMOUNT, "unmount" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__GETATTR, "getattr" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__RELABELFROM, "relabelfrom" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__RELABELTO, "relabelto" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__TRANSITION, "transition" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__ASSOCIATE, "associate" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__QUOTAMOD, "quotamod" },
+ { SECCLASS_FILESYSTEM, FILESYSTEM__QUOTAGET, "quotaget" },
+ { SECCLASS_DIR, DIR__ADD_NAME, "add_name" },
+ { SECCLASS_DIR, DIR__REMOVE_NAME, "remove_name" },
+ { SECCLASS_DIR, DIR__REPARENT, "reparent" },
+ { SECCLASS_DIR, DIR__SEARCH, "search" },
+ { SECCLASS_DIR, DIR__RMDIR, "rmdir" },
+ { SECCLASS_FILE, FILE__EXECUTE_NO_TRANS, "execute_no_trans" },
+ { SECCLASS_FILE, FILE__ENTRYPOINT, "entrypoint" },
+ { SECCLASS_FD, FD__USE, "use" },
+ { SECCLASS_TCP_SOCKET, TCP_SOCKET__CONNECTTO, "connectto" },
+ { SECCLASS_TCP_SOCKET, TCP_SOCKET__NEWCONN, "newconn" },
+ { SECCLASS_TCP_SOCKET, TCP_SOCKET__ACCEPTFROM, "acceptfrom" },
+ { SECCLASS_NODE, NODE__TCP_RECV, "tcp_recv" },
+ { SECCLASS_NODE, NODE__TCP_SEND, "tcp_send" },
+ { SECCLASS_NODE, NODE__UDP_RECV, "udp_recv" },
+ { SECCLASS_NODE, NODE__UDP_SEND, "udp_send" },
+ { SECCLASS_NODE, NODE__RAWIP_RECV, "rawip_recv" },
+ { SECCLASS_NODE, NODE__RAWIP_SEND, "rawip_send" },
+ { SECCLASS_NODE, NODE__ENFORCE_DEST, "enforce_dest" },
+ { SECCLASS_NETIF, NETIF__TCP_RECV, "tcp_recv" },
+ { SECCLASS_NETIF, NETIF__TCP_SEND, "tcp_send" },
+ { SECCLASS_NETIF, NETIF__UDP_RECV, "udp_recv" },
+ { SECCLASS_NETIF, NETIF__UDP_SEND, "udp_send" },
+ { SECCLASS_NETIF, NETIF__RAWIP_RECV, "rawip_recv" },
+ { SECCLASS_NETIF, NETIF__RAWIP_SEND, "rawip_send" },
+ { SECCLASS_UNIX_STREAM_SOCKET, UNIX_STREAM_SOCKET__CONNECTTO, "connectto" },
+ { SECCLASS_UNIX_STREAM_SOCKET, UNIX_STREAM_SOCKET__NEWCONN, "newconn" },
+ { SECCLASS_UNIX_STREAM_SOCKET, UNIX_STREAM_SOCKET__ACCEPTFROM, "acceptfrom" },
+ { SECCLASS_PROCESS, PROCESS__FORK, "fork" },
+ { SECCLASS_PROCESS, PROCESS__TRANSITION, "transition" },
+ { SECCLASS_PROCESS, PROCESS__SIGCHLD, "sigchld" },
+ { SECCLASS_PROCESS, PROCESS__SIGKILL, "sigkill" },
+ { SECCLASS_PROCESS, PROCESS__SIGSTOP, "sigstop" },
+ { SECCLASS_PROCESS, PROCESS__SIGNULL, "signull" },
+ { SECCLASS_PROCESS, PROCESS__SIGNAL, "signal" },
+ { SECCLASS_PROCESS, PROCESS__PTRACE, "ptrace" },
+ { SECCLASS_PROCESS, PROCESS__GETSCHED, "getsched" },
+ { SECCLASS_PROCESS, PROCESS__SETSCHED, "setsched" },
+ { SECCLASS_PROCESS, PROCESS__GETSESSION, "getsession" },
+ { SECCLASS_PROCESS, PROCESS__GETPGID, "getpgid" },
+ { SECCLASS_PROCESS, PROCESS__SETPGID, "setpgid" },
+ { SECCLASS_PROCESS, PROCESS__GETCAP, "getcap" },
+ { SECCLASS_PROCESS, PROCESS__SETCAP, "setcap" },
+ { SECCLASS_PROCESS, PROCESS__SHARE, "share" },
+ { SECCLASS_PROCESS, PROCESS__GETATTR, "getattr" },
+ { SECCLASS_PROCESS, PROCESS__SETEXEC, "setexec" },
+ { SECCLASS_PROCESS, PROCESS__SETFSCREATE, "setfscreate" },
+ { SECCLASS_PROCESS, PROCESS__NOATSECURE, "noatsecure" },
+ { SECCLASS_MSGQ, MSGQ__ENQUEUE, "enqueue" },
+ { SECCLASS_MSG, MSG__SEND, "send" },
+ { SECCLASS_MSG, MSG__RECEIVE, "receive" },
+ { SECCLASS_SHM, SHM__LOCK, "lock" },
+ { SECCLASS_SECURITY, SECURITY__COMPUTE_AV, "compute_av" },
+ { SECCLASS_SECURITY, SECURITY__COMPUTE_CREATE, "compute_create" },
+ { SECCLASS_SECURITY, SECURITY__COMPUTE_MEMBER, "compute_member" },
+ { SECCLASS_SECURITY, SECURITY__CHECK_CONTEXT, "check_context" },
+ { SECCLASS_SECURITY, SECURITY__LOAD_POLICY, "load_policy" },
+ { SECCLASS_SECURITY, SECURITY__COMPUTE_RELABEL, "compute_relabel" },
+ { SECCLASS_SECURITY, SECURITY__COMPUTE_USER, "compute_user" },
+ { SECCLASS_SECURITY, SECURITY__SETENFORCE, "setenforce" },
+ { SECCLASS_SYSTEM, SYSTEM__IPC_INFO, "ipc_info" },
+ { SECCLASS_SYSTEM, SYSTEM__SYSLOG_READ, "syslog_read" },
+ { SECCLASS_SYSTEM, SYSTEM__SYSLOG_MOD, "syslog_mod" },
+ { SECCLASS_SYSTEM, SYSTEM__SYSLOG_CONSOLE, "syslog_console" },
+ { SECCLASS_CAPABILITY, CAPABILITY__CHOWN, "chown" },
+ { SECCLASS_CAPABILITY, CAPABILITY__DAC_OVERRIDE, "dac_override" },
+ { SECCLASS_CAPABILITY, CAPABILITY__DAC_READ_SEARCH, "dac_read_search" },
+ { SECCLASS_CAPABILITY, CAPABILITY__FOWNER, "fowner" },
+ { SECCLASS_CAPABILITY, CAPABILITY__FSETID, "fsetid" },
+ { SECCLASS_CAPABILITY, CAPABILITY__KILL, "kill" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SETGID, "setgid" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SETUID, "setuid" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SETPCAP, "setpcap" },
+ { SECCLASS_CAPABILITY, CAPABILITY__LINUX_IMMUTABLE, "linux_immutable" },
+ { SECCLASS_CAPABILITY, CAPABILITY__NET_BIND_SERVICE, "net_bind_service" },
+ { SECCLASS_CAPABILITY, CAPABILITY__NET_BROADCAST, "net_broadcast" },
+ { SECCLASS_CAPABILITY, CAPABILITY__NET_ADMIN, "net_admin" },
+ { SECCLASS_CAPABILITY, CAPABILITY__NET_RAW, "net_raw" },
+ { SECCLASS_CAPABILITY, CAPABILITY__IPC_LOCK, "ipc_lock" },
+ { SECCLASS_CAPABILITY, CAPABILITY__IPC_OWNER, "ipc_owner" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_MODULE, "sys_module" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_RAWIO, "sys_rawio" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_CHROOT, "sys_chroot" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_PTRACE, "sys_ptrace" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_PACCT, "sys_pacct" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_ADMIN, "sys_admin" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_BOOT, "sys_boot" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_NICE, "sys_nice" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_RESOURCE, "sys_resource" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_TIME, "sys_time" },
+ { SECCLASS_CAPABILITY, CAPABILITY__SYS_TTY_CONFIG, "sys_tty_config" },
+ { SECCLASS_CAPABILITY, CAPABILITY__MKNOD, "mknod" },
+ { SECCLASS_CAPABILITY, CAPABILITY__LEASE, "lease" },
+ { SECCLASS_PASSWD, PASSWD__PASSWD, "passwd" },
+ { SECCLASS_PASSWD, PASSWD__CHFN, "chfn" },
+ { SECCLASS_PASSWD, PASSWD__CHSH, "chsh" },
+};
+
+
+/* FLASK */
diff -Nru a/security/selinux/include/av_permissions.h b/security/selinux/include/av_permissions.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/av_permissions.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,550 @@
+/* This file is automatically generated. Do not edit. */
+/* FLASK */
+
+#define COMMON_FILE__IOCTL 0x00000001UL
+#define COMMON_FILE__READ 0x00000002UL
+#define COMMON_FILE__WRITE 0x00000004UL
+#define COMMON_FILE__CREATE 0x00000008UL
+#define COMMON_FILE__GETATTR 0x00000010UL
+#define COMMON_FILE__SETATTR 0x00000020UL
+#define COMMON_FILE__LOCK 0x00000040UL
+#define COMMON_FILE__RELABELFROM 0x00000080UL
+#define COMMON_FILE__RELABELTO 0x00000100UL
+#define COMMON_FILE__APPEND 0x00000200UL
+#define COMMON_FILE__UNLINK 0x00000400UL
+#define COMMON_FILE__LINK 0x00000800UL
+#define COMMON_FILE__RENAME 0x00001000UL
+#define COMMON_FILE__EXECUTE 0x00002000UL
+#define COMMON_FILE__SWAPON 0x00004000UL
+#define COMMON_FILE__QUOTAON 0x00008000UL
+#define COMMON_FILE__MOUNTON 0x00010000UL
+
+#define COMMON_SOCKET__IOCTL 0x00000001UL
+#define COMMON_SOCKET__READ 0x00000002UL
+#define COMMON_SOCKET__WRITE 0x00000004UL
+#define COMMON_SOCKET__CREATE 0x00000008UL
+#define COMMON_SOCKET__GETATTR 0x00000010UL
+#define COMMON_SOCKET__SETATTR 0x00000020UL
+#define COMMON_SOCKET__LOCK 0x00000040UL
+#define COMMON_SOCKET__RELABELFROM 0x00000080UL
+#define COMMON_SOCKET__RELABELTO 0x00000100UL
+#define COMMON_SOCKET__APPEND 0x00000200UL
+#define COMMON_SOCKET__BIND 0x00000400UL
+#define COMMON_SOCKET__CONNECT 0x00000800UL
+#define COMMON_SOCKET__LISTEN 0x00001000UL
+#define COMMON_SOCKET__ACCEPT 0x00002000UL
+#define COMMON_SOCKET__GETOPT 0x00004000UL
+#define COMMON_SOCKET__SETOPT 0x00008000UL
+#define COMMON_SOCKET__SHUTDOWN 0x00010000UL
+#define COMMON_SOCKET__RECVFROM 0x00020000UL
+#define COMMON_SOCKET__SENDTO 0x00040000UL
+#define COMMON_SOCKET__RECV_MSG 0x00080000UL
+#define COMMON_SOCKET__SEND_MSG 0x00100000UL
+#define COMMON_SOCKET__NAME_BIND 0x00200000UL
+
+#define COMMON_IPC__CREATE 0x00000001UL
+#define COMMON_IPC__DESTROY 0x00000002UL
+#define COMMON_IPC__GETATTR 0x00000004UL
+#define COMMON_IPC__SETATTR 0x00000008UL
+#define COMMON_IPC__READ 0x00000010UL
+#define COMMON_IPC__WRITE 0x00000020UL
+#define COMMON_IPC__ASSOCIATE 0x00000040UL
+#define COMMON_IPC__UNIX_READ 0x00000080UL
+#define COMMON_IPC__UNIX_WRITE 0x00000100UL
+
+#define FILESYSTEM__MOUNT 0x00000001UL
+#define FILESYSTEM__REMOUNT 0x00000002UL
+#define FILESYSTEM__UNMOUNT 0x00000004UL
+#define FILESYSTEM__GETATTR 0x00000008UL
+#define FILESYSTEM__RELABELFROM 0x00000010UL
+#define FILESYSTEM__RELABELTO 0x00000020UL
+#define FILESYSTEM__TRANSITION 0x00000040UL
+#define FILESYSTEM__ASSOCIATE 0x00000080UL
+#define FILESYSTEM__QUOTAMOD 0x00000100UL
+#define FILESYSTEM__QUOTAGET 0x00000200UL
+
+#define DIR__EXECUTE 0x00002000UL
+#define DIR__UNLINK 0x00000400UL
+#define DIR__SETATTR 0x00000020UL
+#define DIR__QUOTAON 0x00008000UL
+#define DIR__RELABELFROM 0x00000080UL
+#define DIR__LINK 0x00000800UL
+#define DIR__WRITE 0x00000004UL
+#define DIR__IOCTL 0x00000001UL
+#define DIR__RELABELTO 0x00000100UL
+#define DIR__READ 0x00000002UL
+#define DIR__RENAME 0x00001000UL
+#define DIR__APPEND 0x00000200UL
+#define DIR__LOCK 0x00000040UL
+#define DIR__SWAPON 0x00004000UL
+#define DIR__GETATTR 0x00000010UL
+#define DIR__MOUNTON 0x00010000UL
+#define DIR__CREATE 0x00000008UL
+
+#define DIR__ADD_NAME 0x00020000UL
+#define DIR__REMOVE_NAME 0x00040000UL
+#define DIR__REPARENT 0x00080000UL
+#define DIR__SEARCH 0x00100000UL
+#define DIR__RMDIR 0x00200000UL
+
+#define FILE__EXECUTE 0x00002000UL
+#define FILE__UNLINK 0x00000400UL
+#define FILE__SETATTR 0x00000020UL
+#define FILE__QUOTAON 0x00008000UL
+#define FILE__RELABELFROM 0x00000080UL
+#define FILE__LINK 0x00000800UL
+#define FILE__WRITE 0x00000004UL
+#define FILE__IOCTL 0x00000001UL
+#define FILE__RELABELTO 0x00000100UL
+#define FILE__READ 0x00000002UL
+#define FILE__RENAME 0x00001000UL
+#define FILE__APPEND 0x00000200UL
+#define FILE__LOCK 0x00000040UL
+#define FILE__SWAPON 0x00004000UL
+#define FILE__GETATTR 0x00000010UL
+#define FILE__MOUNTON 0x00010000UL
+#define FILE__CREATE 0x00000008UL
+
+#define FILE__EXECUTE_NO_TRANS 0x00020000UL
+#define FILE__ENTRYPOINT 0x00040000UL
+
+#define LNK_FILE__EXECUTE 0x00002000UL
+#define LNK_FILE__UNLINK 0x00000400UL
+#define LNK_FILE__SETATTR 0x00000020UL
+#define LNK_FILE__QUOTAON 0x00008000UL
+#define LNK_FILE__RELABELFROM 0x00000080UL
+#define LNK_FILE__LINK 0x00000800UL
+#define LNK_FILE__WRITE 0x00000004UL
+#define LNK_FILE__IOCTL 0x00000001UL
+#define LNK_FILE__RELABELTO 0x00000100UL
+#define LNK_FILE__READ 0x00000002UL
+#define LNK_FILE__RENAME 0x00001000UL
+#define LNK_FILE__APPEND 0x00000200UL
+#define LNK_FILE__LOCK 0x00000040UL
+#define LNK_FILE__SWAPON 0x00004000UL
+#define LNK_FILE__GETATTR 0x00000010UL
+#define LNK_FILE__MOUNTON 0x00010000UL
+#define LNK_FILE__CREATE 0x00000008UL
+
+#define CHR_FILE__EXECUTE 0x00002000UL
+#define CHR_FILE__UNLINK 0x00000400UL
+#define CHR_FILE__SETATTR 0x00000020UL
+#define CHR_FILE__QUOTAON 0x00008000UL
+#define CHR_FILE__RELABELFROM 0x00000080UL
+#define CHR_FILE__LINK 0x00000800UL
+#define CHR_FILE__WRITE 0x00000004UL
+#define CHR_FILE__IOCTL 0x00000001UL
+#define CHR_FILE__RELABELTO 0x00000100UL
+#define CHR_FILE__READ 0x00000002UL
+#define CHR_FILE__RENAME 0x00001000UL
+#define CHR_FILE__APPEND 0x00000200UL
+#define CHR_FILE__LOCK 0x00000040UL
+#define CHR_FILE__SWAPON 0x00004000UL
+#define CHR_FILE__GETATTR 0x00000010UL
+#define CHR_FILE__MOUNTON 0x00010000UL
+#define CHR_FILE__CREATE 0x00000008UL
+
+#define BLK_FILE__EXECUTE 0x00002000UL
+#define BLK_FILE__UNLINK 0x00000400UL
+#define BLK_FILE__SETATTR 0x00000020UL
+#define BLK_FILE__QUOTAON 0x00008000UL
+#define BLK_FILE__RELABELFROM 0x00000080UL
+#define BLK_FILE__LINK 0x00000800UL
+#define BLK_FILE__WRITE 0x00000004UL
+#define BLK_FILE__IOCTL 0x00000001UL
+#define BLK_FILE__RELABELTO 0x00000100UL
+#define BLK_FILE__READ 0x00000002UL
+#define BLK_FILE__RENAME 0x00001000UL
+#define BLK_FILE__APPEND 0x00000200UL
+#define BLK_FILE__LOCK 0x00000040UL
+#define BLK_FILE__SWAPON 0x00004000UL
+#define BLK_FILE__GETATTR 0x00000010UL
+#define BLK_FILE__MOUNTON 0x00010000UL
+#define BLK_FILE__CREATE 0x00000008UL
+
+#define SOCK_FILE__EXECUTE 0x00002000UL
+#define SOCK_FILE__UNLINK 0x00000400UL
+#define SOCK_FILE__SETATTR 0x00000020UL
+#define SOCK_FILE__QUOTAON 0x00008000UL
+#define SOCK_FILE__RELABELFROM 0x00000080UL
+#define SOCK_FILE__LINK 0x00000800UL
+#define SOCK_FILE__WRITE 0x00000004UL
+#define SOCK_FILE__IOCTL 0x00000001UL
+#define SOCK_FILE__RELABELTO 0x00000100UL
+#define SOCK_FILE__READ 0x00000002UL
+#define SOCK_FILE__RENAME 0x00001000UL
+#define SOCK_FILE__APPEND 0x00000200UL
+#define SOCK_FILE__LOCK 0x00000040UL
+#define SOCK_FILE__SWAPON 0x00004000UL
+#define SOCK_FILE__GETATTR 0x00000010UL
+#define SOCK_FILE__MOUNTON 0x00010000UL
+#define SOCK_FILE__CREATE 0x00000008UL
+
+#define FIFO_FILE__EXECUTE 0x00002000UL
+#define FIFO_FILE__UNLINK 0x00000400UL
+#define FIFO_FILE__SETATTR 0x00000020UL
+#define FIFO_FILE__QUOTAON 0x00008000UL
+#define FIFO_FILE__RELABELFROM 0x00000080UL
+#define FIFO_FILE__LINK 0x00000800UL
+#define FIFO_FILE__WRITE 0x00000004UL
+#define FIFO_FILE__IOCTL 0x00000001UL
+#define FIFO_FILE__RELABELTO 0x00000100UL
+#define FIFO_FILE__READ 0x00000002UL
+#define FIFO_FILE__RENAME 0x00001000UL
+#define FIFO_FILE__APPEND 0x00000200UL
+#define FIFO_FILE__LOCK 0x00000040UL
+#define FIFO_FILE__SWAPON 0x00004000UL
+#define FIFO_FILE__GETATTR 0x00000010UL
+#define FIFO_FILE__MOUNTON 0x00010000UL
+#define FIFO_FILE__CREATE 0x00000008UL
+
+#define FD__USE 0x00000001UL
+
+#define SOCKET__RELABELTO 0x00000100UL
+#define SOCKET__RECV_MSG 0x00080000UL
+#define SOCKET__RELABELFROM 0x00000080UL
+#define SOCKET__SETOPT 0x00008000UL
+#define SOCKET__APPEND 0x00000200UL
+#define SOCKET__SETATTR 0x00000020UL
+#define SOCKET__SENDTO 0x00040000UL
+#define SOCKET__GETOPT 0x00004000UL
+#define SOCKET__READ 0x00000002UL
+#define SOCKET__SHUTDOWN 0x00010000UL
+#define SOCKET__LISTEN 0x00001000UL
+#define SOCKET__BIND 0x00000400UL
+#define SOCKET__WRITE 0x00000004UL
+#define SOCKET__ACCEPT 0x00002000UL
+#define SOCKET__CONNECT 0x00000800UL
+#define SOCKET__LOCK 0x00000040UL
+#define SOCKET__IOCTL 0x00000001UL
+#define SOCKET__CREATE 0x00000008UL
+#define SOCKET__NAME_BIND 0x00200000UL
+#define SOCKET__SEND_MSG 0x00100000UL
+#define SOCKET__RECVFROM 0x00020000UL
+#define SOCKET__GETATTR 0x00000010UL
+
+#define TCP_SOCKET__RELABELTO 0x00000100UL
+#define TCP_SOCKET__RECV_MSG 0x00080000UL
+#define TCP_SOCKET__RELABELFROM 0x00000080UL
+#define TCP_SOCKET__SETOPT 0x00008000UL
+#define TCP_SOCKET__APPEND 0x00000200UL
+#define TCP_SOCKET__SETATTR 0x00000020UL
+#define TCP_SOCKET__SENDTO 0x00040000UL
+#define TCP_SOCKET__GETOPT 0x00004000UL
+#define TCP_SOCKET__READ 0x00000002UL
+#define TCP_SOCKET__SHUTDOWN 0x00010000UL
+#define TCP_SOCKET__LISTEN 0x00001000UL
+#define TCP_SOCKET__BIND 0x00000400UL
+#define TCP_SOCKET__WRITE 0x00000004UL
+#define TCP_SOCKET__ACCEPT 0x00002000UL
+#define TCP_SOCKET__CONNECT 0x00000800UL
+#define TCP_SOCKET__LOCK 0x00000040UL
+#define TCP_SOCKET__IOCTL 0x00000001UL
+#define TCP_SOCKET__CREATE 0x00000008UL
+#define TCP_SOCKET__NAME_BIND 0x00200000UL
+#define TCP_SOCKET__SEND_MSG 0x00100000UL
+#define TCP_SOCKET__RECVFROM 0x00020000UL
+#define TCP_SOCKET__GETATTR 0x00000010UL
+
+#define TCP_SOCKET__CONNECTTO 0x00400000UL
+#define TCP_SOCKET__NEWCONN 0x00800000UL
+#define TCP_SOCKET__ACCEPTFROM 0x01000000UL
+
+#define UDP_SOCKET__RELABELTO 0x00000100UL
+#define UDP_SOCKET__RECV_MSG 0x00080000UL
+#define UDP_SOCKET__RELABELFROM 0x00000080UL
+#define UDP_SOCKET__SETOPT 0x00008000UL
+#define UDP_SOCKET__APPEND 0x00000200UL
+#define UDP_SOCKET__SETATTR 0x00000020UL
+#define UDP_SOCKET__SENDTO 0x00040000UL
+#define UDP_SOCKET__GETOPT 0x00004000UL
+#define UDP_SOCKET__READ 0x00000002UL
+#define UDP_SOCKET__SHUTDOWN 0x00010000UL
+#define UDP_SOCKET__LISTEN 0x00001000UL
+#define UDP_SOCKET__BIND 0x00000400UL
+#define UDP_SOCKET__WRITE 0x00000004UL
+#define UDP_SOCKET__ACCEPT 0x00002000UL
+#define UDP_SOCKET__CONNECT 0x00000800UL
+#define UDP_SOCKET__LOCK 0x00000040UL
+#define UDP_SOCKET__IOCTL 0x00000001UL
+#define UDP_SOCKET__CREATE 0x00000008UL
+#define UDP_SOCKET__NAME_BIND 0x00200000UL
+#define UDP_SOCKET__SEND_MSG 0x00100000UL
+#define UDP_SOCKET__RECVFROM 0x00020000UL
+#define UDP_SOCKET__GETATTR 0x00000010UL
+
+#define RAWIP_SOCKET__RELABELTO 0x00000100UL
+#define RAWIP_SOCKET__RECV_MSG 0x00080000UL
+#define RAWIP_SOCKET__RELABELFROM 0x00000080UL
+#define RAWIP_SOCKET__SETOPT 0x00008000UL
+#define RAWIP_SOCKET__APPEND 0x00000200UL
+#define RAWIP_SOCKET__SETATTR 0x00000020UL
+#define RAWIP_SOCKET__SENDTO 0x00040000UL
+#define RAWIP_SOCKET__GETOPT 0x00004000UL
+#define RAWIP_SOCKET__READ 0x00000002UL
+#define RAWIP_SOCKET__SHUTDOWN 0x00010000UL
+#define RAWIP_SOCKET__LISTEN 0x00001000UL
+#define RAWIP_SOCKET__BIND 0x00000400UL
+#define RAWIP_SOCKET__WRITE 0x00000004UL
+#define RAWIP_SOCKET__ACCEPT 0x00002000UL
+#define RAWIP_SOCKET__CONNECT 0x00000800UL
+#define RAWIP_SOCKET__LOCK 0x00000040UL
+#define RAWIP_SOCKET__IOCTL 0x00000001UL
+#define RAWIP_SOCKET__CREATE 0x00000008UL
+#define RAWIP_SOCKET__NAME_BIND 0x00200000UL
+#define RAWIP_SOCKET__SEND_MSG 0x00100000UL
+#define RAWIP_SOCKET__RECVFROM 0x00020000UL
+#define RAWIP_SOCKET__GETATTR 0x00000010UL
+
+#define NODE__TCP_RECV 0x00000001UL
+#define NODE__TCP_SEND 0x00000002UL
+#define NODE__UDP_RECV 0x00000004UL
+#define NODE__UDP_SEND 0x00000008UL
+#define NODE__RAWIP_RECV 0x00000010UL
+#define NODE__RAWIP_SEND 0x00000020UL
+#define NODE__ENFORCE_DEST 0x00000040UL
+
+#define NETIF__TCP_RECV 0x00000001UL
+#define NETIF__TCP_SEND 0x00000002UL
+#define NETIF__UDP_RECV 0x00000004UL
+#define NETIF__UDP_SEND 0x00000008UL
+#define NETIF__RAWIP_RECV 0x00000010UL
+#define NETIF__RAWIP_SEND 0x00000020UL
+
+#define NETLINK_SOCKET__RELABELTO 0x00000100UL
+#define NETLINK_SOCKET__RECV_MSG 0x00080000UL
+#define NETLINK_SOCKET__RELABELFROM 0x00000080UL
+#define NETLINK_SOCKET__SETOPT 0x00008000UL
+#define NETLINK_SOCKET__APPEND 0x00000200UL
+#define NETLINK_SOCKET__SETATTR 0x00000020UL
+#define NETLINK_SOCKET__SENDTO 0x00040000UL
+#define NETLINK_SOCKET__GETOPT 0x00004000UL
+#define NETLINK_SOCKET__READ 0x00000002UL
+#define NETLINK_SOCKET__SHUTDOWN 0x00010000UL
+#define NETLINK_SOCKET__LISTEN 0x00001000UL
+#define NETLINK_SOCKET__BIND 0x00000400UL
+#define NETLINK_SOCKET__WRITE 0x00000004UL
+#define NETLINK_SOCKET__ACCEPT 0x00002000UL
+#define NETLINK_SOCKET__CONNECT 0x00000800UL
+#define NETLINK_SOCKET__LOCK 0x00000040UL
+#define NETLINK_SOCKET__IOCTL 0x00000001UL
+#define NETLINK_SOCKET__CREATE 0x00000008UL
+#define NETLINK_SOCKET__NAME_BIND 0x00200000UL
+#define NETLINK_SOCKET__SEND_MSG 0x00100000UL
+#define NETLINK_SOCKET__RECVFROM 0x00020000UL
+#define NETLINK_SOCKET__GETATTR 0x00000010UL
+
+#define PACKET_SOCKET__RELABELTO 0x00000100UL
+#define PACKET_SOCKET__RECV_MSG 0x00080000UL
+#define PACKET_SOCKET__RELABELFROM 0x00000080UL
+#define PACKET_SOCKET__SETOPT 0x00008000UL
+#define PACKET_SOCKET__APPEND 0x00000200UL
+#define PACKET_SOCKET__SETATTR 0x00000020UL
+#define PACKET_SOCKET__SENDTO 0x00040000UL
+#define PACKET_SOCKET__GETOPT 0x00004000UL
+#define PACKET_SOCKET__READ 0x00000002UL
+#define PACKET_SOCKET__SHUTDOWN 0x00010000UL
+#define PACKET_SOCKET__LISTEN 0x00001000UL
+#define PACKET_SOCKET__BIND 0x00000400UL
+#define PACKET_SOCKET__WRITE 0x00000004UL
+#define PACKET_SOCKET__ACCEPT 0x00002000UL
+#define PACKET_SOCKET__CONNECT 0x00000800UL
+#define PACKET_SOCKET__LOCK 0x00000040UL
+#define PACKET_SOCKET__IOCTL 0x00000001UL
+#define PACKET_SOCKET__CREATE 0x00000008UL
+#define PACKET_SOCKET__NAME_BIND 0x00200000UL
+#define PACKET_SOCKET__SEND_MSG 0x00100000UL
+#define PACKET_SOCKET__RECVFROM 0x00020000UL
+#define PACKET_SOCKET__GETATTR 0x00000010UL
+
+#define KEY_SOCKET__RELABELTO 0x00000100UL
+#define KEY_SOCKET__RECV_MSG 0x00080000UL
+#define KEY_SOCKET__RELABELFROM 0x00000080UL
+#define KEY_SOCKET__SETOPT 0x00008000UL
+#define KEY_SOCKET__APPEND 0x00000200UL
+#define KEY_SOCKET__SETATTR 0x00000020UL
+#define KEY_SOCKET__SENDTO 0x00040000UL
+#define KEY_SOCKET__GETOPT 0x00004000UL
+#define KEY_SOCKET__READ 0x00000002UL
+#define KEY_SOCKET__SHUTDOWN 0x00010000UL
+#define KEY_SOCKET__LISTEN 0x00001000UL
+#define KEY_SOCKET__BIND 0x00000400UL
+#define KEY_SOCKET__WRITE 0x00000004UL
+#define KEY_SOCKET__ACCEPT 0x00002000UL
+#define KEY_SOCKET__CONNECT 0x00000800UL
+#define KEY_SOCKET__LOCK 0x00000040UL
+#define KEY_SOCKET__IOCTL 0x00000001UL
+#define KEY_SOCKET__CREATE 0x00000008UL
+#define KEY_SOCKET__NAME_BIND 0x00200000UL
+#define KEY_SOCKET__SEND_MSG 0x00100000UL
+#define KEY_SOCKET__RECVFROM 0x00020000UL
+#define KEY_SOCKET__GETATTR 0x00000010UL
+
+#define UNIX_STREAM_SOCKET__RELABELTO 0x00000100UL
+#define UNIX_STREAM_SOCKET__RECV_MSG 0x00080000UL
+#define UNIX_STREAM_SOCKET__RELABELFROM 0x00000080UL
+#define UNIX_STREAM_SOCKET__SETOPT 0x00008000UL
+#define UNIX_STREAM_SOCKET__APPEND 0x00000200UL
+#define UNIX_STREAM_SOCKET__SETATTR 0x00000020UL
+#define UNIX_STREAM_SOCKET__SENDTO 0x00040000UL
+#define UNIX_STREAM_SOCKET__GETOPT 0x00004000UL
+#define UNIX_STREAM_SOCKET__READ 0x00000002UL
+#define UNIX_STREAM_SOCKET__SHUTDOWN 0x00010000UL
+#define UNIX_STREAM_SOCKET__LISTEN 0x00001000UL
+#define UNIX_STREAM_SOCKET__BIND 0x00000400UL
+#define UNIX_STREAM_SOCKET__WRITE 0x00000004UL
+#define UNIX_STREAM_SOCKET__ACCEPT 0x00002000UL
+#define UNIX_STREAM_SOCKET__CONNECT 0x00000800UL
+#define UNIX_STREAM_SOCKET__LOCK 0x00000040UL
+#define UNIX_STREAM_SOCKET__IOCTL 0x00000001UL
+#define UNIX_STREAM_SOCKET__CREATE 0x00000008UL
+#define UNIX_STREAM_SOCKET__NAME_BIND 0x00200000UL
+#define UNIX_STREAM_SOCKET__SEND_MSG 0x00100000UL
+#define UNIX_STREAM_SOCKET__RECVFROM 0x00020000UL
+#define UNIX_STREAM_SOCKET__GETATTR 0x00000010UL
+
+#define UNIX_STREAM_SOCKET__CONNECTTO 0x00400000UL
+#define UNIX_STREAM_SOCKET__NEWCONN 0x00800000UL
+#define UNIX_STREAM_SOCKET__ACCEPTFROM 0x01000000UL
+
+#define UNIX_DGRAM_SOCKET__RELABELTO 0x00000100UL
+#define UNIX_DGRAM_SOCKET__RECV_MSG 0x00080000UL
+#define UNIX_DGRAM_SOCKET__RELABELFROM 0x00000080UL
+#define UNIX_DGRAM_SOCKET__SETOPT 0x00008000UL
+#define UNIX_DGRAM_SOCKET__APPEND 0x00000200UL
+#define UNIX_DGRAM_SOCKET__SETATTR 0x00000020UL
+#define UNIX_DGRAM_SOCKET__SENDTO 0x00040000UL
+#define UNIX_DGRAM_SOCKET__GETOPT 0x00004000UL
+#define UNIX_DGRAM_SOCKET__READ 0x00000002UL
+#define UNIX_DGRAM_SOCKET__SHUTDOWN 0x00010000UL
+#define UNIX_DGRAM_SOCKET__LISTEN 0x00001000UL
+#define UNIX_DGRAM_SOCKET__BIND 0x00000400UL
+#define UNIX_DGRAM_SOCKET__WRITE 0x00000004UL
+#define UNIX_DGRAM_SOCKET__ACCEPT 0x00002000UL
+#define UNIX_DGRAM_SOCKET__CONNECT 0x00000800UL
+#define UNIX_DGRAM_SOCKET__LOCK 0x00000040UL
+#define UNIX_DGRAM_SOCKET__IOCTL 0x00000001UL
+#define UNIX_DGRAM_SOCKET__CREATE 0x00000008UL
+#define UNIX_DGRAM_SOCKET__NAME_BIND 0x00200000UL
+#define UNIX_DGRAM_SOCKET__SEND_MSG 0x00100000UL
+#define UNIX_DGRAM_SOCKET__RECVFROM 0x00020000UL
+#define UNIX_DGRAM_SOCKET__GETATTR 0x00000010UL
+
+#define PROCESS__FORK 0x00000001UL
+#define PROCESS__TRANSITION 0x00000002UL
+#define PROCESS__SIGCHLD 0x00000004UL
+#define PROCESS__SIGKILL 0x00000008UL
+#define PROCESS__SIGSTOP 0x00000010UL
+#define PROCESS__SIGNULL 0x00000020UL
+#define PROCESS__SIGNAL 0x00000040UL
+#define PROCESS__PTRACE 0x00000080UL
+#define PROCESS__GETSCHED 0x00000100UL
+#define PROCESS__SETSCHED 0x00000200UL
+#define PROCESS__GETSESSION 0x00000400UL
+#define PROCESS__GETPGID 0x00000800UL
+#define PROCESS__SETPGID 0x00001000UL
+#define PROCESS__GETCAP 0x00002000UL
+#define PROCESS__SETCAP 0x00004000UL
+#define PROCESS__SHARE 0x00008000UL
+#define PROCESS__GETATTR 0x00010000UL
+#define PROCESS__SETEXEC 0x00020000UL
+#define PROCESS__SETFSCREATE 0x00040000UL
+#define PROCESS__NOATSECURE 0x00080000UL
+
+#define IPC__SETATTR 0x00000008UL
+#define IPC__READ 0x00000010UL
+#define IPC__ASSOCIATE 0x00000040UL
+#define IPC__DESTROY 0x00000002UL
+#define IPC__UNIX_WRITE 0x00000100UL
+#define IPC__CREATE 0x00000001UL
+#define IPC__UNIX_READ 0x00000080UL
+#define IPC__GETATTR 0x00000004UL
+#define IPC__WRITE 0x00000020UL
+
+#define SEM__SETATTR 0x00000008UL
+#define SEM__READ 0x00000010UL
+#define SEM__ASSOCIATE 0x00000040UL
+#define SEM__DESTROY 0x00000002UL
+#define SEM__UNIX_WRITE 0x00000100UL
+#define SEM__CREATE 0x00000001UL
+#define SEM__UNIX_READ 0x00000080UL
+#define SEM__GETATTR 0x00000004UL
+#define SEM__WRITE 0x00000020UL
+
+#define MSGQ__SETATTR 0x00000008UL
+#define MSGQ__READ 0x00000010UL
+#define MSGQ__ASSOCIATE 0x00000040UL
+#define MSGQ__DESTROY 0x00000002UL
+#define MSGQ__UNIX_WRITE 0x00000100UL
+#define MSGQ__CREATE 0x00000001UL
+#define MSGQ__UNIX_READ 0x00000080UL
+#define MSGQ__GETATTR 0x00000004UL
+#define MSGQ__WRITE 0x00000020UL
+
+#define MSGQ__ENQUEUE 0x00000200UL
+
+#define MSG__SEND 0x00000001UL
+#define MSG__RECEIVE 0x00000002UL
+
+#define SHM__SETATTR 0x00000008UL
+#define SHM__READ 0x00000010UL
+#define SHM__ASSOCIATE 0x00000040UL
+#define SHM__DESTROY 0x00000002UL
+#define SHM__UNIX_WRITE 0x00000100UL
+#define SHM__CREATE 0x00000001UL
+#define SHM__UNIX_READ 0x00000080UL
+#define SHM__GETATTR 0x00000004UL
+#define SHM__WRITE 0x00000020UL
+
+#define SHM__LOCK 0x00000200UL
+
+#define SECURITY__COMPUTE_AV 0x00000001UL
+#define SECURITY__COMPUTE_CREATE 0x00000002UL
+#define SECURITY__COMPUTE_MEMBER 0x00000004UL
+#define SECURITY__CHECK_CONTEXT 0x00000008UL
+#define SECURITY__LOAD_POLICY 0x00000010UL
+#define SECURITY__COMPUTE_RELABEL 0x00000020UL
+#define SECURITY__COMPUTE_USER 0x00000040UL
+#define SECURITY__SETENFORCE 0x00000080UL
+
+#define SYSTEM__IPC_INFO 0x00000001UL
+#define SYSTEM__SYSLOG_READ 0x00000002UL
+#define SYSTEM__SYSLOG_MOD 0x00000004UL
+#define SYSTEM__SYSLOG_CONSOLE 0x00000008UL
+
+#define CAPABILITY__CHOWN 0x00000001UL
+#define CAPABILITY__DAC_OVERRIDE 0x00000002UL
+#define CAPABILITY__DAC_READ_SEARCH 0x00000004UL
+#define CAPABILITY__FOWNER 0x00000008UL
+#define CAPABILITY__FSETID 0x00000010UL
+#define CAPABILITY__KILL 0x00000020UL
+#define CAPABILITY__SETGID 0x00000040UL
+#define CAPABILITY__SETUID 0x00000080UL
+#define CAPABILITY__SETPCAP 0x00000100UL
+#define CAPABILITY__LINUX_IMMUTABLE 0x00000200UL
+#define CAPABILITY__NET_BIND_SERVICE 0x00000400UL
+#define CAPABILITY__NET_BROADCAST 0x00000800UL
+#define CAPABILITY__NET_ADMIN 0x00001000UL
+#define CAPABILITY__NET_RAW 0x00002000UL
+#define CAPABILITY__IPC_LOCK 0x00004000UL
+#define CAPABILITY__IPC_OWNER 0x00008000UL
+#define CAPABILITY__SYS_MODULE 0x00010000UL
+#define CAPABILITY__SYS_RAWIO 0x00020000UL
+#define CAPABILITY__SYS_CHROOT 0x00040000UL
+#define CAPABILITY__SYS_PTRACE 0x00080000UL
+#define CAPABILITY__SYS_PACCT 0x00100000UL
+#define CAPABILITY__SYS_ADMIN 0x00200000UL
+#define CAPABILITY__SYS_BOOT 0x00400000UL
+#define CAPABILITY__SYS_NICE 0x00800000UL
+#define CAPABILITY__SYS_RESOURCE 0x01000000UL
+#define CAPABILITY__SYS_TIME 0x02000000UL
+#define CAPABILITY__SYS_TTY_CONFIG 0x04000000UL
+#define CAPABILITY__MKNOD 0x08000000UL
+#define CAPABILITY__LEASE 0x10000000UL
+
+#define PASSWD__PASSWD 0x00000001UL
+#define PASSWD__CHFN 0x00000002UL
+#define PASSWD__CHSH 0x00000004UL
+
+
+/* FLASK */
diff -Nru a/security/selinux/include/avc.h b/security/selinux/include/avc.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/avc.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,159 @@
+/*
+ * Access vector cache interface for object managers.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SELINUX_AVC_H_
+#define _SELINUX_AVC_H_
+
+#include <linux/stddef.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/kdev_t.h>
+#include <linux/spinlock.h>
+#include <asm/system.h>
+#include "flask.h"
+#include "av_permissions.h"
+#include "security.h"
+
+#ifdef CONFIG_SECURITY_SELINUX_DEVELOP
+extern int selinux_enforcing;
+#else
+#define selinux_enforcing 1
+#endif
+
+/*
+ * An entry in the AVC.
+ */
+struct avc_entry;
+
+/*
+ * A reference to an AVC entry.
+ */
+struct avc_entry_ref {
+ struct avc_entry *ae;
+};
+
+/* Initialize an AVC entry reference before first use. */
+static inline void avc_entry_ref_init(struct avc_entry_ref *h)
+{
+ h->ae = NULL;
+}
+
+struct task_struct;
+struct vfsmount;
+struct dentry;
+struct inode;
+struct sock;
+struct sk_buff;
+
+/* Auxiliary data to use in generating the audit record. */
+struct avc_audit_data {
+ char type;
+#define AVC_AUDIT_DATA_FS 1
+#define AVC_AUDIT_DATA_NET 2
+#define AVC_AUDIT_DATA_CAP 3
+#define AVC_AUDIT_DATA_IPC 4
+ struct task_struct *tsk;
+ union {
+ struct {
+ struct vfsmount *mnt;
+ struct dentry *dentry;
+ struct inode *inode;
+ } fs;
+ struct {
+ char *netif;
+ struct sk_buff *skb;
+ struct sock *sk;
+ u16 port;
+ u32 daddr;
+ } net;
+ int cap;
+ int ipc_id;
+ } u;
+};
+
+/* Initialize an AVC audit data structure. */
+#define AVC_AUDIT_DATA_INIT(_d,_t) \
+ { memset((_d), 0, sizeof(struct avc_audit_data)); (_d)->type = AVC_AUDIT_DATA_##_t; }
+
+/*
+ * AVC statistics
+ */
+#define AVC_ENTRY_LOOKUPS 0
+#define AVC_ENTRY_HITS 1
+#define AVC_ENTRY_MISSES 2
+#define AVC_ENTRY_DISCARDS 3
+#define AVC_CAV_LOOKUPS 4
+#define AVC_CAV_HITS 5
+#define AVC_CAV_PROBES 6
+#define AVC_CAV_MISSES 7
+#define AVC_NSTATS 8
+extern unsigned avc_cache_stats[AVC_NSTATS];
+
+#ifdef AVC_CACHE_STATS
+static inline void avc_cache_stats_incr(int type)
+{
+ avc_cache_stats[type]++;
+}
+
+static inline void avc_cache_stats_add(int type, unsigned val)
+{
+ avc_cache_stats[type] += val;
+}
+#else
+static inline void avc_cache_stats_incr(int type)
+{ }
+
+static inline void avc_cache_stats_add(int type, unsigned val)
+{ }
+#endif
+
+/*
+ * AVC display support
+ */
+void avc_dump_av(u16 tclass, u32 av);
+void avc_dump_query(u32 ssid, u32 tsid, u16 tclass);
+void avc_dump_cache(char *tag);
+
+/*
+ * AVC operations
+ */
+
+void avc_init(void);
+
+int avc_lookup(u32 ssid, u32 tsid, u16 tclass,
+ u32 requested, struct avc_entry_ref *aeref);
+
+int avc_insert(u32 ssid, u32 tsid, u16 tclass,
+ struct avc_entry *ae, struct avc_entry_ref *out_aeref);
+
+void avc_audit(u32 ssid, u32 tsid,
+ u16 tclass, u32 requested,
+ struct av_decision *avd, int result, struct avc_audit_data *auditdata);
+
+int avc_has_perm_noaudit(u32 ssid, u32 tsid,
+ u16 tclass, u32 requested,
+ struct avc_entry_ref *aeref, struct av_decision *avd);
+
+int avc_has_perm(u32 ssid, u32 tsid,
+ u16 tclass, u32 requested,
+ struct avc_entry_ref *aeref, struct avc_audit_data *auditdata);
+
+#define AVC_CALLBACK_GRANT 1
+#define AVC_CALLBACK_TRY_REVOKE 2
+#define AVC_CALLBACK_REVOKE 4
+#define AVC_CALLBACK_RESET 8
+#define AVC_CALLBACK_AUDITALLOW_ENABLE 16
+#define AVC_CALLBACK_AUDITALLOW_DISABLE 32
+#define AVC_CALLBACK_AUDITDENY_ENABLE 64
+#define AVC_CALLBACK_AUDITDENY_DISABLE 128
+
+int avc_add_callback(int (*callback)(u32 event, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms,
+ u32 *out_retained),
+ u32 events, u32 ssid, u32 tsid,
+ u16 tclass, u32 perms);
+
+#endif /* _SELINUX_AVC_H_ */
+
diff -Nru a/security/selinux/include/avc_ss.h b/security/selinux/include/avc_ss.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/avc_ss.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,27 @@
+/*
+ * Access vector cache interface for the security server.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SELINUX_AVC_SS_H_
+#define _SELINUX_AVC_SS_H_
+
+#include "flask.h"
+
+int avc_ss_grant(u32 ssid, u32 tsid, u16 tclass, u32 perms, u32 seqno);
+
+int avc_ss_try_revoke(u32 ssid, u32 tsid, u16 tclass, u32 perms, u32 seqno,
+ u32 *out_retained);
+
+int avc_ss_revoke(u32 ssid, u32 tsid, u16 tclass, u32 perms, u32 seqno);
+
+int avc_ss_reset(u32 seqno);
+
+int avc_ss_set_auditallow(u32 ssid, u32 tsid, u16 tclass, u32 perms,
+ u32 seqno, u32 enable);
+
+int avc_ss_set_auditdeny(u32 ssid, u32 tsid, u16 tclass, u32 perms,
+ u32 seqno, u32 enable);
+
+#endif /* _SELINUX_AVC_SS_H_ */
+
diff -Nru a/security/selinux/include/class_to_string.h b/security/selinux/include/class_to_string.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/class_to_string.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,39 @@
+/* This file is automatically generated. Do not edit. */
+/*
+ * Security object class definitions
+ */
+static char *class_to_string[] =
+{
+ "null",
+ "security",
+ "process",
+ "system",
+ "capability",
+ "filesystem",
+ "file",
+ "dir",
+ "fd",
+ "lnk_file",
+ "chr_file",
+ "blk_file",
+ "sock_file",
+ "fifo_file",
+ "socket",
+ "tcp_socket",
+ "udp_socket",
+ "rawip_socket",
+ "node",
+ "netif",
+ "netlink_socket",
+ "packet_socket",
+ "key_socket",
+ "unix_stream_socket",
+ "unix_dgram_socket",
+ "sem",
+ "msg",
+ "msgq",
+ "shm",
+ "ipc",
+ "passwd",
+};
+
diff -Nru a/security/selinux/include/common_perm_to_string.h b/security/selinux/include/common_perm_to_string.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/common_perm_to_string.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,65 @@
+/* This file is automatically generated. Do not edit. */
+/* FLASK */
+
+static char *common_file_perm_to_string[] =
+{
+ "ioctl",
+ "read",
+ "write",
+ "create",
+ "getattr",
+ "setattr",
+ "lock",
+ "relabelfrom",
+ "relabelto",
+ "append",
+ "unlink",
+ "link",
+ "rename",
+ "execute",
+ "swapon",
+ "quotaon",
+ "mounton",
+};
+
+static char *common_socket_perm_to_string[] =
+{
+ "ioctl",
+ "read",
+ "write",
+ "create",
+ "getattr",
+ "setattr",
+ "lock",
+ "relabelfrom",
+ "relabelto",
+ "append",
+ "bind",
+ "connect",
+ "listen",
+ "accept",
+ "getopt",
+ "setopt",
+ "shutdown",
+ "recvfrom",
+ "sendto",
+ "recv_msg",
+ "send_msg",
+ "name_bind",
+};
+
+static char *common_ipc_perm_to_string[] =
+{
+ "create",
+ "destroy",
+ "getattr",
+ "setattr",
+ "read",
+ "write",
+ "associate",
+ "unix_read",
+ "unix_write",
+};
+
+
+/* FLASK */
diff -Nru a/security/selinux/include/flask.h b/security/selinux/include/flask.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/flask.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,71 @@
+/* This file is automatically generated. Do not edit. */
+#ifndef _SELINUX_FLASK_H_
+#define _SELINUX_FLASK_H_
+
+/*
+ * Security object class definitions
+ */
+#define SECCLASS_SECURITY 1
+#define SECCLASS_PROCESS 2
+#define SECCLASS_SYSTEM 3
+#define SECCLASS_CAPABILITY 4
+#define SECCLASS_FILESYSTEM 5
+#define SECCLASS_FILE 6
+#define SECCLASS_DIR 7
+#define SECCLASS_FD 8
+#define SECCLASS_LNK_FILE 9
+#define SECCLASS_CHR_FILE 10
+#define SECCLASS_BLK_FILE 11
+#define SECCLASS_SOCK_FILE 12
+#define SECCLASS_FIFO_FILE 13
+#define SECCLASS_SOCKET 14
+#define SECCLASS_TCP_SOCKET 15
+#define SECCLASS_UDP_SOCKET 16
+#define SECCLASS_RAWIP_SOCKET 17
+#define SECCLASS_NODE 18
+#define SECCLASS_NETIF 19
+#define SECCLASS_NETLINK_SOCKET 20
+#define SECCLASS_PACKET_SOCKET 21
+#define SECCLASS_KEY_SOCKET 22
+#define SECCLASS_UNIX_STREAM_SOCKET 23
+#define SECCLASS_UNIX_DGRAM_SOCKET 24
+#define SECCLASS_SEM 25
+#define SECCLASS_MSG 26
+#define SECCLASS_MSGQ 27
+#define SECCLASS_SHM 28
+#define SECCLASS_IPC 29
+#define SECCLASS_PASSWD 30
+
+/*
+ * Security identifier indices for initial entities
+ */
+#define SECINITSID_KERNEL 1
+#define SECINITSID_SECURITY 2
+#define SECINITSID_UNLABELED 3
+#define SECINITSID_FS 4
+#define SECINITSID_FILE 5
+#define SECINITSID_FILE_LABELS 6
+#define SECINITSID_INIT 7
+#define SECINITSID_ANY_SOCKET 8
+#define SECINITSID_PORT 9
+#define SECINITSID_NETIF 10
+#define SECINITSID_NETMSG 11
+#define SECINITSID_NODE 12
+#define SECINITSID_IGMP_PACKET 13
+#define SECINITSID_ICMP_SOCKET 14
+#define SECINITSID_TCP_SOCKET 15
+#define SECINITSID_SYSCTL_MODPROBE 16
+#define SECINITSID_SYSCTL 17
+#define SECINITSID_SYSCTL_FS 18
+#define SECINITSID_SYSCTL_KERNEL 19
+#define SECINITSID_SYSCTL_NET 20
+#define SECINITSID_SYSCTL_NET_UNIX 21
+#define SECINITSID_SYSCTL_VM 22
+#define SECINITSID_SYSCTL_DEV 23
+#define SECINITSID_KMOD 24
+#define SECINITSID_POLICY 25
+#define SECINITSID_SCMP_PACKET 26
+
+#define SECINITSID_NUM 26
+
+#endif
diff -Nru a/security/selinux/include/initial_sid_to_string.h b/security/selinux/include/initial_sid_to_string.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/initial_sid_to_string.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,32 @@
+/* This file is automatically generated. Do not edit. */
+static char *initial_sid_to_string[] =
+{
+ "null",
+ "kernel",
+ "security",
+ "unlabeled",
+ "fs",
+ "file",
+ "file_labels",
+ "init",
+ "any_socket",
+ "port",
+ "netif",
+ "netmsg",
+ "node",
+ "igmp_packet",
+ "icmp_socket",
+ "tcp_socket",
+ "sysctl_modprobe",
+ "sysctl",
+ "sysctl_fs",
+ "sysctl_kernel",
+ "sysctl_net",
+ "sysctl_net_unix",
+ "sysctl_vm",
+ "sysctl_dev",
+ "kmod",
+ "policy",
+ "scmp_packet",
+};
+
diff -Nru a/security/selinux/include/objsec.h b/security/selinux/include/objsec.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/objsec.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,88 @@
+/*
+ * NSA Security-Enhanced Linux (SELinux) security module
+ *
+ * This file contains the SELinux security data structures for kernel objects.
+ *
+ * Author(s): Stephen Smalley, <sds@epoch.ncsc.mil>
+ * Chris Vance, <cvance@nai.com>
+ * Wayne Salamon, <wsalamon@nai.com>
+ * James Morris <jmorris@redhat.com>
+ *
+ * Copyright (C) 2001,2002 Networks Associates Technology, Inc.
+ * Copyright (C) 2003 Red Hat, Inc., James Morris <jmorris@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2,
+ * as published by the Free Software Foundation.
+ */
+#ifndef _SELINUX_OBJSEC_H_
+#define _SELINUX_OBJSEC_H_
+
+#include <linux/list.h>
+#include <linux/sched.h>
+#include <linux/fs.h>
+#include <linux/in.h>
+#include "flask.h"
+#include "avc.h"
+
+struct task_security_struct {
+ unsigned long magic; /* magic number for this module */
+ struct task_struct *task; /* back pointer to task object */
+ u32 osid; /* SID prior to last execve */
+ u32 sid; /* current SID */
+ u32 exec_sid; /* exec SID */
+ u32 create_sid; /* fscreate SID */
+ struct avc_entry_ref avcr; /* reference to process permissions */
+};
+
+struct inode_security_struct {
+ unsigned long magic; /* magic number for this module */
+ struct inode *inode; /* back pointer to inode object */
+ struct list_head list; /* list of inode_security_struct */
+ u32 task_sid; /* SID of creating task */
+ u32 sid; /* SID of this object */
+ u16 sclass; /* security class of this object */
+ struct avc_entry_ref avcr; /* reference to object permissions */
+ unsigned char initialized; /* initialization flag */
+ struct semaphore sem;
+ unsigned char inherit; /* inherit SID from parent entry */
+};
+
+struct file_security_struct {
+ unsigned long magic; /* magic number for this module */
+ struct file *file; /* back pointer to file object */
+ u32 sid; /* SID of open file description */
+ u32 fown_sid; /* SID of file owner (for SIGIO) */
+ struct avc_entry_ref avcr; /* reference to fd permissions */
+ struct avc_entry_ref inode_avcr; /* reference to object permissions */
+};
+
+struct superblock_security_struct {
+ unsigned long magic; /* magic number for this module */
+ struct super_block *sb; /* back pointer to sb object */
+ struct list_head list; /* list of superblock_security_struct */
+ u32 sid; /* SID of file system */
+ unsigned int behavior; /* labeling behavior */
+ unsigned char initialized; /* initialization flag */
+ unsigned char proc; /* proc fs */
+ struct semaphore sem;
+};
+
+struct msg_security_struct {
+ unsigned long magic; /* magic number for this module */
+ struct msg_msg *msg; /* back pointer */
+ u32 sid; /* SID of message */
+ struct avc_entry_ref avcr; /* reference to permissions */
+};
+
+struct ipc_security_struct {
+ unsigned long magic; /* magic number for this module */
+ struct kern_ipc_perm *ipc_perm; /* back pointer */
+ u16 sclass; /* security class of this object */
+ u32 sid; /* SID of IPC resource */
+ struct avc_entry_ref avcr; /* reference to permissions */
+};
+
+extern int inode_security_set_sid(struct inode *inode, u32 sid);
+
+#endif /* _SELINUX_OBJSEC_H_ */
diff -Nru a/security/selinux/include/security.h b/security/selinux/include/security.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/include/security.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,70 @@
+/*
+ * Security server interface.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SELINUX_SECURITY_H_
+#define _SELINUX_SECURITY_H_
+
+#include "flask.h"
+
+#define SECSID_NULL 0x00000000 /* unspecified SID */
+#define SECSID_WILD 0xffffffff /* wildcard SID */
+#define SECCLASS_NULL 0x0000 /* no class */
+
+#define SELINUX_MAGIC 0xf97cff8c
+
+int security_load_policy(void * data, size_t len);
+
+struct av_decision {
+ u32 allowed;
+ u32 decided;
+ u32 auditallow;
+ u32 auditdeny;
+ u32 seqno;
+};
+
+int security_compute_av(u32 ssid, u32 tsid,
+ u16 tclass, u32 requested,
+ struct av_decision *avd);
+
+int security_transition_sid(u32 ssid, u32 tsid,
+ u16 tclass, u32 *out_sid);
+
+int security_member_sid(u32 ssid, u32 tsid,
+ u16 tclass, u32 *out_sid);
+
+int security_change_sid(u32 ssid, u32 tsid,
+ u16 tclass, u32 *out_sid);
+
+int security_sid_to_context(u32 sid, char **scontext,
+ u32 *scontext_len);
+
+int security_context_to_sid(char *scontext, u32 scontext_len,
+ u32 *out_sid);
+
+int security_get_user_sids(u32 callsid, char *username,
+ u32 **sids, u32 *nel);
+
+int security_port_sid(u16 domain, u16 type, u8 protocol, u16 port,
+ u32 *out_sid);
+
+int security_netif_sid(char *name, u32 *if_sid,
+ u32 *msg_sid);
+
+int security_node_sid(u16 domain, void *addr, u32 addrlen,
+ u32 *out_sid);
+
+#define SECURITY_FS_USE_XATTR 1 /* use xattr */
+#define SECURITY_FS_USE_TRANS 2 /* use transition SIDs, e.g. devpts/tmpfs */
+#define SECURITY_FS_USE_TASK 3 /* use task SIDs, e.g. pipefs/sockfs */
+#define SECURITY_FS_USE_GENFS 4 /* use the genfs support */
+#define SECURITY_FS_USE_NONE 5 /* no labeling support */
+int security_fs_use(const char *fstype, unsigned int *behavior,
+ u32 *sid);
+
+int security_genfs_sid(const char *fstype, char *name, u16 sclass,
+ u32 *sid);
+
+#endif /* _SELINUX_SECURITY_H_ */
+
diff -Nru a/security/selinux/selinuxfs.c b/security/selinux/selinuxfs.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/selinuxfs.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,593 @@
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/security.h>
+#include <asm/uaccess.h>
+
+/* selinuxfs pseudo filesystem for exporting the security policy API.
+ Based on the proc code and the fs/nfsd/nfsctl.c code. */
+
+#include "flask.h"
+#include "avc.h"
+#include "avc_ss.h"
+#include "security.h"
+#include "objsec.h"
+
+/* Check whether a task is allowed to use a security operation. */
+int task_has_security(struct task_struct *tsk,
+ u32 perms)
+{
+ struct task_security_struct *tsec;
+
+ tsec = tsk->security;
+
+ return avc_has_perm(tsec->sid, SECINITSID_SECURITY,
+ SECCLASS_SECURITY, perms, NULL, NULL);
+}
+
+enum sel_inos {
+ SEL_ROOT_INO = 2,
+ SEL_LOAD, /* load policy */
+ SEL_ENFORCE, /* get or set enforcing status */
+ SEL_CONTEXT, /* validate context */
+ SEL_ACCESS, /* compute access decision */
+ SEL_CREATE, /* compute create labeling decision */
+ SEL_RELABEL, /* compute relabeling decision */
+ SEL_USER /* compute reachable user contexts */
+};
+
+static ssize_t sel_read_enforce(struct file *filp, char *buf,
+ size_t count, loff_t *ppos)
+{
+ char *page;
+ ssize_t length;
+ ssize_t end;
+
+ if (count < 0 || count > PAGE_SIZE)
+ return -EINVAL;
+ if (!(page = (char*)__get_free_page(GFP_KERNEL)))
+ return -ENOMEM;
+ memset(page, 0, PAGE_SIZE);
+
+ length = snprintf(page, PAGE_SIZE, "%d", selinux_enforcing);
+ if (length < 0) {
+ free_page((unsigned long)page);
+ return length;
+ }
+
+ if (*ppos >= length) {
+ free_page((unsigned long)page);
+ return 0;
+ }
+ if (count + *ppos > length)
+ count = length - *ppos;
+ end = count + *ppos;
+ if (copy_to_user(buf, (char *) page + *ppos, count)) {
+ count = -EFAULT;
+ goto out;
+ }
+ *ppos = end;
+out:
+ free_page((unsigned long)page);
+ return count;
+}
+
+#ifdef CONFIG_SECURITY_SELINUX_DEVELOP
+static ssize_t sel_write_enforce(struct file * file, const char * buf,
+ size_t count, loff_t *ppos)
+
+{
+ char *page;
+ ssize_t length;
+ int new_value;
+
+ if (count < 0 || count >= PAGE_SIZE)
+ return -ENOMEM;
+ if (*ppos != 0) {
+ /* No partial writes. */
+ return -EINVAL;
+ }
+ page = (char*)__get_free_page(GFP_KERNEL);
+ if (!page)
+ return -ENOMEM;
+ memset(page, 0, PAGE_SIZE);
+ length = -EFAULT;
+ if (copy_from_user(page, buf, count))
+ goto out;
+
+ length = -EINVAL;
+ if (sscanf(page, "%d", &new_value) != 1)
+ goto out;
+
+ if (new_value != selinux_enforcing) {
+ length = task_has_security(current, SECURITY__SETENFORCE);
+ if (length)
+ goto out;
+ selinux_enforcing = new_value;
+ if (selinux_enforcing)
+ avc_ss_reset(0);
+ }
+ length = count;
+out:
+ free_page((unsigned long) page);
+ return length;
+}
+#else
+#define sel_write_enforce NULL
+#endif
+
+static struct file_operations sel_enforce_ops = {
+ .read = sel_read_enforce,
+ .write = sel_write_enforce,
+};
+
+static ssize_t sel_write_load(struct file * file, const char * buf,
+ size_t count, loff_t *ppos)
+
+{
+ ssize_t length;
+ void *data;
+
+ length = task_has_security(current, SECURITY__LOAD_POLICY);
+ if (length)
+ return length;
+
+ if (*ppos != 0) {
+ /* No partial writes. */
+ return -EINVAL;
+ }
+
+ if ((count < 0) || (count > 64 * 1024 * 1024) || (data = vmalloc(count)) == NULL)
+ return -ENOMEM;
+
+ length = -EFAULT;
+ if (copy_from_user(data, buf, count) != 0)
+ goto out;
+
+ length = security_load_policy(data, count);
+ if (length)
+ goto out;
+
+ length = count;
+out:
+ vfree(data);
+ return length;
+}
+
+static struct file_operations sel_load_ops = {
+ .write = sel_write_load,
+};
+
+
+static ssize_t sel_write_context(struct file * file, const char * buf,
+ size_t count, loff_t *ppos)
+
+{
+ char *page;
+ u32 sid;
+ ssize_t length;
+
+ length = task_has_security(current, SECURITY__CHECK_CONTEXT);
+ if (length)
+ return length;
+
+ if (count < 0 || count >= PAGE_SIZE)
+ return -ENOMEM;
+ if (*ppos != 0) {
+ /* No partial writes. */
+ return -EINVAL;
+ }
+ page = (char*)__get_free_page(GFP_KERNEL);
+ if (!page)
+ return -ENOMEM;
+ memset(page, 0, PAGE_SIZE);
+ length = -EFAULT;
+ if (copy_from_user(page, buf, count))
+ goto out;
+
+ length = security_context_to_sid(page, count, &sid);
+ if (length < 0)
+ goto out;
+
+ length = count;
+out:
+ free_page((unsigned long) page);
+ return length;
+}
+
+static struct file_operations sel_context_ops = {
+ .write = sel_write_context,
+};
+
+
+/*
+ * Remaining nodes use transaction based IO methods like nfsd/nfsctl.c
+ */
+static ssize_t sel_write_access(struct file * file, char *buf, size_t size);
+static ssize_t sel_write_create(struct file * file, char *buf, size_t size);
+static ssize_t sel_write_relabel(struct file * file, char *buf, size_t size);
+static ssize_t sel_write_user(struct file * file, char *buf, size_t size);
+
+static ssize_t (*write_op[])(struct file *, char *, size_t) = {
+ [SEL_ACCESS] = sel_write_access,
+ [SEL_CREATE] = sel_write_create,
+ [SEL_RELABEL] = sel_write_relabel,
+ [SEL_USER] = sel_write_user,
+};
+
+/* an argresp is stored in an allocated page and holds the
+ * size of the argument or response, along with its content
+ */
+struct argresp {
+ ssize_t size;
+ char data[0];
+};
+
+#define PAYLOAD_SIZE (PAGE_SIZE - sizeof(struct argresp))
+
+/*
+ * transaction based IO methods.
+ * The file expects a single write which triggers the transaction, and then
+ * possibly a read which collects the result - which is stored in a
+ * file-local buffer.
+ */
+static ssize_t TA_write(struct file *file, const char *buf, size_t size, loff_t *pos)
+{
+ ino_t ino = file->f_dentry->d_inode->i_ino;
+ struct argresp *ar;
+ ssize_t rv = 0;
+
+ if (ino >= sizeof(write_op)/sizeof(write_op[0]) || !write_op[ino])
+ return -EINVAL;
+ if (file->private_data)
+ return -EINVAL; /* only one write allowed per open */
+ if (size > PAYLOAD_SIZE - 1) /* allow one byte for null terminator */
+ return -EFBIG;
+
+ ar = kmalloc(PAGE_SIZE, GFP_KERNEL);
+ if (!ar)
+ return -ENOMEM;
+ memset(ar, 0, PAGE_SIZE); /* clear buffer, particularly last byte */
+ ar->size = 0;
+ down(&file->f_dentry->d_inode->i_sem);
+ if (file->private_data)
+ rv = -EINVAL;
+ else
+ file->private_data = ar;
+ up(&file->f_dentry->d_inode->i_sem);
+ if (rv) {
+ kfree(ar);
+ return rv;
+ }
+ if (copy_from_user(ar->data, buf, size))
+ return -EFAULT;
+
+ rv = write_op[ino](file, ar->data, size);
+ if (rv>0) {
+ ar->size = rv;
+ rv = size;
+ }
+ return rv;
+}
+
+static ssize_t TA_read(struct file *file, char *buf, size_t size, loff_t *pos)
+{
+ struct argresp *ar;
+ ssize_t rv = 0;
+
+ if (file->private_data == NULL)
+ rv = TA_write(file, buf, 0, pos);
+ if (rv < 0)
+ return rv;
+
+ ar = file->private_data;
+ if (!ar)
+ return 0;
+ if (*pos >= ar->size)
+ return 0;
+ if (*pos + size > ar->size)
+ size = ar->size - *pos;
+ if (copy_to_user(buf, ar->data + *pos, size))
+ return -EFAULT;
+ *pos += size;
+ return size;
+}
+
+static int TA_open(struct inode *inode, struct file *file)
+{
+ file->private_data = NULL;
+ return 0;
+}
+
+static int TA_release(struct inode *inode, struct file *file)
+{
+ void *p = file->private_data;
+ file->private_data = NULL;
+ kfree(p);
+ return 0;
+}
+
+static struct file_operations transaction_ops = {
+ .write = TA_write,
+ .read = TA_read,
+ .open = TA_open,
+ .release = TA_release,
+};
+
+/*
+ * payload - write methods
+ * If the method has a response, the response should be put in buf,
+ * and the length returned. Otherwise return 0 or and -error.
+ */
+
+static ssize_t sel_write_access(struct file * file, char *buf, size_t size)
+{
+ char *scon, *tcon;
+ u32 ssid, tsid;
+ u16 tclass;
+ u32 req;
+ struct av_decision avd;
+ ssize_t length;
+
+ length = task_has_security(current, SECURITY__COMPUTE_AV);
+ if (length)
+ return length;
+
+ length = -ENOMEM;
+ scon = kmalloc(size+1, GFP_KERNEL);
+ if (!scon)
+ return length;
+ memset(scon, 0, size+1);
+
+ tcon = kmalloc(size+1, GFP_KERNEL);
+ if (!tcon)
+ goto out;
+ memset(tcon, 0, size+1);
+
+ length = -EINVAL;
+ if (sscanf(buf, "%s %s %hu %x", scon, tcon, &tclass, &req) != 4)
+ goto out2;
+
+ length = security_context_to_sid(scon, strlen(scon)+1, &ssid);
+ if (length < 0)
+ goto out2;
+ length = security_context_to_sid(tcon, strlen(tcon)+1, &tsid);
+ if (length < 0)
+ goto out2;
+
+ length = security_compute_av(ssid, tsid, tclass, req, &avd);
+ if (length < 0)
+ goto out2;
+
+ length = snprintf(buf, PAYLOAD_SIZE, "%x %x %x %x %u",
+ avd.allowed, avd.decided,
+ avd.auditallow, avd.auditdeny,
+ avd.seqno);
+out2:
+ kfree(tcon);
+out:
+ kfree(scon);
+ return length;
+}
+
+static ssize_t sel_write_create(struct file * file, char *buf, size_t size)
+{
+ char *scon, *tcon;
+ u32 ssid, tsid, newsid;
+ u16 tclass;
+ ssize_t length;
+ char *newcon;
+ u32 len;
+
+ length = task_has_security(current, SECURITY__COMPUTE_CREATE);
+ if (length)
+ return length;
+
+ length = -ENOMEM;
+ scon = kmalloc(size+1, GFP_KERNEL);
+ if (!scon)
+ return length;
+ memset(scon, 0, size+1);
+
+ tcon = kmalloc(size+1, GFP_KERNEL);
+ if (!tcon)
+ goto out;
+ memset(tcon, 0, size+1);
+
+ length = -EINVAL;
+ if (sscanf(buf, "%s %s %hu", scon, tcon, &tclass) != 3)
+ goto out2;
+
+ length = security_context_to_sid(scon, strlen(scon)+1, &ssid);
+ if (length < 0)
+ goto out2;
+ length = security_context_to_sid(tcon, strlen(tcon)+1, &tsid);
+ if (length < 0)
+ goto out2;
+
+ length = security_transition_sid(ssid, tsid, tclass, &newsid);
+ if (length < 0)
+ goto out2;
+
+ length = security_sid_to_context(newsid, &newcon, &len);
+ if (length < 0)
+ goto out2;
+
+ if (len > PAYLOAD_SIZE) {
+ printk(KERN_ERR "%s: context size (%u) exceeds payload "
+ "max\n", __FUNCTION__, len);
+ length = -ERANGE;
+ goto out3;
+ }
+
+ memcpy(buf, newcon, len);
+ length = len;
+out3:
+ kfree(newcon);
+out2:
+ kfree(tcon);
+out:
+ kfree(scon);
+ return length;
+}
+
+static ssize_t sel_write_relabel(struct file * file, char *buf, size_t size)
+{
+ char *scon, *tcon;
+ u32 ssid, tsid, newsid;
+ u16 tclass;
+ ssize_t length;
+ char *newcon;
+ u32 len;
+
+ length = task_has_security(current, SECURITY__COMPUTE_RELABEL);
+ if (length)
+ return length;
+
+ length = -ENOMEM;
+ scon = kmalloc(size+1, GFP_KERNEL);
+ if (!scon)
+ return length;
+ memset(scon, 0, size+1);
+
+ tcon = kmalloc(size+1, GFP_KERNEL);
+ if (!tcon)
+ goto out;
+ memset(tcon, 0, size+1);
+
+ length = -EINVAL;
+ if (sscanf(buf, "%s %s %hu", scon, tcon, &tclass) != 3)
+ goto out2;
+
+ length = security_context_to_sid(scon, strlen(scon)+1, &ssid);
+ if (length < 0)
+ goto out2;
+ length = security_context_to_sid(tcon, strlen(tcon)+1, &tsid);
+ if (length < 0)
+ goto out2;
+
+ length = security_change_sid(ssid, tsid, tclass, &newsid);
+ if (length < 0)
+ goto out2;
+
+ length = security_sid_to_context(newsid, &newcon, &len);
+ if (length < 0)
+ goto out2;
+
+ if (len > PAYLOAD_SIZE) {
+ length = -ERANGE;
+ goto out3;
+ }
+
+ memcpy(buf, newcon, len);
+ length = len;
+out3:
+ kfree(newcon);
+out2:
+ kfree(tcon);
+out:
+ kfree(scon);
+ return length;
+}
+
+static ssize_t sel_write_user(struct file * file, char *buf, size_t size)
+{
+ char *con, *user, *ptr;
+ u32 sid, *sids;
+ ssize_t length;
+ char *newcon;
+ int i, rc;
+ u32 len, nsids;
+
+ length = task_has_security(current, SECURITY__COMPUTE_USER);
+ if (length)
+ return length;
+
+ length = -ENOMEM;
+ con = kmalloc(size+1, GFP_KERNEL);
+ if (!con)
+ return length;
+ memset(con, 0, size+1);
+
+ user = kmalloc(size+1, GFP_KERNEL);
+ if (!user)
+ goto out;
+ memset(user, 0, size+1);
+
+ length = -EINVAL;
+ if (sscanf(buf, "%s %s", con, user) != 2)
+ goto out2;
+
+ length = security_context_to_sid(con, strlen(con)+1, &sid);
+ if (length < 0)
+ goto out2;
+
+ length = security_get_user_sids(sid, user, &sids, &nsids);
+ if (length < 0)
+ goto out2;
+
+ length = sprintf(buf, "%u", nsids) + 1;
+ ptr = buf + length;
+ for (i = 0; i < nsids; i++) {
+ rc = security_sid_to_context(sids[i], &newcon, &len);
+ if (rc) {
+ length = rc;
+ goto out3;
+ }
+ if ((length + len) >= PAYLOAD_SIZE) {
+ kfree(newcon);
+ length = -ERANGE;
+ goto out3;
+ }
+ memcpy(ptr, newcon, len);
+ kfree(newcon);
+ ptr += len;
+ length += len;
+ }
+out3:
+ kfree(sids);
+out2:
+ kfree(user);
+out:
+ kfree(con);
+ return length;
+}
+
+
+static int sel_fill_super(struct super_block * sb, void * data, int silent)
+{
+ static struct tree_descr selinux_files[] = {
+ [SEL_LOAD] = {"load", &sel_load_ops, S_IRUSR|S_IWUSR},
+ [SEL_ENFORCE] = {"enforce", &sel_enforce_ops, S_IRUSR|S_IWUSR},
+ [SEL_CONTEXT] = {"context", &sel_context_ops, S_IRUGO|S_IWUGO},
+ [SEL_ACCESS] = {"access", &transaction_ops, S_IRUGO|S_IWUGO},
+ [SEL_CREATE] = {"create", &transaction_ops, S_IRUGO|S_IWUGO},
+ [SEL_RELABEL] = {"relabel", &transaction_ops, S_IRUGO|S_IWUGO},
+ [SEL_USER] = {"user", &transaction_ops, S_IRUGO|S_IWUGO},
+ /* last one */ {""}
+ };
+ return simple_fill_super(sb, SELINUX_MAGIC, selinux_files);
+}
+
+static struct super_block *sel_get_sb(struct file_system_type *fs_type,
+ int flags, const char *dev_name, void *data)
+{
+ return get_sb_single(fs_type, flags, data, sel_fill_super);
+}
+
+static struct file_system_type sel_fs_type = {
+ .name = "selinuxfs",
+ .get_sb = sel_get_sb,
+ .kill_sb = kill_litter_super,
+};
+
+static int __init init_sel_fs(void)
+{
+ return register_filesystem(&sel_fs_type);
+}
+
+__initcall(init_sel_fs);
diff -Nru a/security/selinux/ss/Makefile b/security/selinux/ss/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/Makefile Sun Aug 3 13:14:53 2003
@@ -0,0 +1,14 @@
+#
+# Makefile for building the SELinux security server as part of the kernel tree.
+#
+
+EXTRA_CFLAGS += -Isecurity/selinux/include -include security/selinux/ss/global.h
+
+obj-y := ss.o
+
+ss-objs := ebitmap.o hashtab.o symtab.o sidtab.o avtab.o policydb.o services.o
+
+ifeq ($(CONFIG_SECURITY_SELINUX_MLS),y)
+ss-objs += mls.o
+endif
+
diff -Nru a/security/selinux/ss/avtab.c b/security/selinux/ss/avtab.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/avtab.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,264 @@
+/*
+ * Implementation of the access vector table type.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "avtab.h"
+#include "policydb.h"
+
+#define AVTAB_HASH(keyp) \
+((keyp->target_class + \
+ (keyp->target_type << 2) + \
+ (keyp->source_type << 9)) & \
+ AVTAB_HASH_MASK)
+
+int avtab_insert(struct avtab *h, struct avtab_key *key, struct avtab_datum *datum)
+{
+ int hvalue;
+ struct avtab_node *prev, *cur, *newnode;
+
+ if (!h)
+ return -EINVAL;
+
+ hvalue = AVTAB_HASH(key);
+ for (prev = NULL, cur = h->htable[hvalue];
+ cur;
+ prev = cur, cur = cur->next) {
+ if (key->source_type == cur->key.source_type &&
+ key->target_type == cur->key.target_type &&
+ key->target_class == cur->key.target_class &&
+ (datum->specified & cur->datum.specified))
+ return -EEXIST;
+ if (key->source_type < cur->key.source_type)
+ break;
+ if (key->source_type == cur->key.source_type &&
+ key->target_type < cur->key.target_type)
+ break;
+ if (key->source_type == cur->key.source_type &&
+ key->target_type == cur->key.target_type &&
+ key->target_class < cur->key.target_class)
+ break;
+ }
+
+ newnode = kmalloc(sizeof(*newnode), GFP_KERNEL);
+ if (newnode == NULL)
+ return -ENOMEM;
+ memset(newnode, 0, sizeof(*newnode));
+ newnode->key = *key;
+ newnode->datum = *datum;
+ if (prev) {
+ newnode->next = prev->next;
+ prev->next = newnode;
+ } else {
+ newnode->next = h->htable[hvalue];
+ h->htable[hvalue] = newnode;
+ }
+
+ h->nel++;
+ return 0;
+}
+
+
+struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *key, int specified)
+{
+ int hvalue;
+ struct avtab_node *cur;
+
+ if (!h)
+ return NULL;
+
+ hvalue = AVTAB_HASH(key);
+ for (cur = h->htable[hvalue]; cur; cur = cur->next) {
+ if (key->source_type == cur->key.source_type &&
+ key->target_type == cur->key.target_type &&
+ key->target_class == cur->key.target_class &&
+ (specified & cur->datum.specified))
+ return &cur->datum;
+
+ if (key->source_type < cur->key.source_type)
+ break;
+ if (key->source_type == cur->key.source_type &&
+ key->target_type < cur->key.target_type)
+ break;
+ if (key->source_type == cur->key.source_type &&
+ key->target_type == cur->key.target_type &&
+ key->target_class < cur->key.target_class)
+ break;
+ }
+
+ return NULL;
+}
+
+void avtab_destroy(struct avtab *h)
+{
+ int i;
+ struct avtab_node *cur, *temp;
+
+ if (!h)
+ return;
+
+ for (i = 0; i < AVTAB_SIZE; i++) {
+ cur = h->htable[i];
+ while (cur != NULL) {
+ temp = cur;
+ cur = cur->next;
+ kfree(temp);
+ }
+ h->htable[i] = NULL;
+ }
+ kfree(h->htable);
+}
+
+
+int avtab_map(struct avtab *h,
+ int (*apply) (struct avtab_key *k,
+ struct avtab_datum *d,
+ void *args),
+ void *args)
+{
+ int i, ret;
+ struct avtab_node *cur;
+
+ if (!h)
+ return 0;
+
+ for (i = 0; i < AVTAB_SIZE; i++) {
+ cur = h->htable[i];
+ while (cur != NULL) {
+ ret = apply(&cur->key, &cur->datum, args);
+ if (ret)
+ return ret;
+ cur = cur->next;
+ }
+ }
+ return 0;
+}
+
+int avtab_init(struct avtab *h)
+{
+ int i;
+
+ h->htable = kmalloc(sizeof(*(h->htable)) * AVTAB_SIZE, GFP_KERNEL);
+ if (!h->htable)
+ return -ENOMEM;
+ for (i = 0; i < AVTAB_SIZE; i++)
+ h->htable[i] = NULL;
+ h->nel = 0;
+ return 0;
+}
+
+void avtab_hash_eval(struct avtab *h, char *tag)
+{
+ int i, chain_len, slots_used, max_chain_len;
+ struct avtab_node *cur;
+
+ slots_used = 0;
+ max_chain_len = 0;
+ for (i = 0; i < AVTAB_SIZE; i++) {
+ cur = h->htable[i];
+ if (cur) {
+ slots_used++;
+ chain_len = 0;
+ while (cur) {
+ chain_len++;
+ cur = cur->next;
+ }
+
+ if (chain_len > max_chain_len)
+ max_chain_len = chain_len;
+ }
+ }
+
+ printk(KERN_INFO "%s: %d entries and %d/%d buckets used, longest "
+ "chain length %d\n", tag, h->nel, slots_used, AVTAB_SIZE,
+ max_chain_len);
+}
+
+int avtab_read(struct avtab *a, void *fp, u32 config)
+{
+ int i, rc = -EINVAL;
+ struct avtab_key avkey;
+ struct avtab_datum avdatum;
+ u32 *buf;
+ u32 nel, items, items2;
+
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ printk(KERN_ERR "security: avtab: truncated table\n");
+ goto bad;
+ }
+ nel = le32_to_cpu(buf[0]);
+ if (!nel) {
+ printk(KERN_ERR "security: avtab: table is empty\n");
+ goto bad;
+ }
+ for (i = 0; i < nel; i++) {
+ memset(&avkey, 0, sizeof(avkey));
+ memset(&avdatum, 0, sizeof(avdatum));
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ printk(KERN_ERR "security: avtab: truncated entry\n");
+ goto bad;
+ }
+ items2 = le32_to_cpu(buf[0]);
+ buf = next_entry(fp, sizeof(u32)*items2);
+ if (!buf) {
+ printk(KERN_ERR "security: avtab: truncated entry\n");
+ goto bad;
+ }
+ items = 0;
+ avkey.source_type = le32_to_cpu(buf[items++]);
+ avkey.target_type = le32_to_cpu(buf[items++]);
+ avkey.target_class = le32_to_cpu(buf[items++]);
+ avdatum.specified = le32_to_cpu(buf[items++]);
+ if (!(avdatum.specified & (AVTAB_AV | AVTAB_TYPE))) {
+ printk(KERN_ERR "security: avtab: null entry\n");
+ goto bad;
+ }
+ if ((avdatum.specified & AVTAB_AV) &&
+ (avdatum.specified & AVTAB_TYPE)) {
+ printk(KERN_ERR "security: avtab: entry has both "
+ "access vectors and types\n");
+ goto bad;
+ }
+ if (avdatum.specified & AVTAB_AV) {
+ if (avdatum.specified & AVTAB_ALLOWED)
+ avtab_allowed(&avdatum) = le32_to_cpu(buf[items++]);
+ if (avdatum.specified & AVTAB_AUDITDENY)
+ avtab_auditdeny(&avdatum) = le32_to_cpu(buf[items++]);
+ if (avdatum.specified & AVTAB_AUDITALLOW)
+ avtab_auditallow(&avdatum) = le32_to_cpu(buf[items++]);
+ } else {
+ if (avdatum.specified & AVTAB_TRANSITION)
+ avtab_transition(&avdatum) = le32_to_cpu(buf[items++]);
+ if (avdatum.specified & AVTAB_CHANGE)
+ avtab_change(&avdatum) = le32_to_cpu(buf[items++]);
+ if (avdatum.specified & AVTAB_MEMBER)
+ avtab_member(&avdatum) = le32_to_cpu(buf[items++]);
+ }
+ if (items != items2) {
+ printk(KERN_ERR "security: avtab: entry only had %d "
+ "items, expected %d\n", items2, items);
+ goto bad;
+ }
+ rc = avtab_insert(a, &avkey, &avdatum);
+ if (rc) {
+ if (rc == -ENOMEM)
+ printk(KERN_ERR "security: avtab: out of memory\n");
+ if (rc == -EEXIST)
+ printk(KERN_ERR "security: avtab: duplicate entry\n");
+ goto bad;
+ }
+ }
+
+ rc = 0;
+out:
+ return rc;
+
+bad:
+ avtab_destroy(a);
+ goto out;
+}
+
diff -Nru a/security/selinux/ss/avtab.h b/security/selinux/ss/avtab.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/avtab.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,68 @@
+/*
+ * An access vector table (avtab) is a hash table
+ * of access vectors and transition types indexed
+ * by a type pair and a class. An access vector
+ * table is used to represent the type enforcement
+ * tables.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_AVTAB_H_
+#define _SS_AVTAB_H_
+
+struct avtab_key {
+ u32 source_type; /* source type */
+ u32 target_type; /* target type */
+ u32 target_class; /* target object class */
+};
+
+struct avtab_datum {
+#define AVTAB_ALLOWED 1
+#define AVTAB_AUDITALLOW 2
+#define AVTAB_AUDITDENY 4
+#define AVTAB_AV (AVTAB_ALLOWED | AVTAB_AUDITALLOW | AVTAB_AUDITDENY)
+#define AVTAB_TRANSITION 16
+#define AVTAB_MEMBER 32
+#define AVTAB_CHANGE 64
+#define AVTAB_TYPE (AVTAB_TRANSITION | AVTAB_MEMBER | AVTAB_CHANGE)
+ u32 specified; /* what fields are specified */
+ u32 data[3]; /* access vectors or types */
+#define avtab_allowed(x) (x)->data[0]
+#define avtab_auditdeny(x) (x)->data[1]
+#define avtab_auditallow(x) (x)->data[2]
+#define avtab_transition(x) (x)->data[0]
+#define avtab_change(x) (x)->data[1]
+#define avtab_member(x) (x)->data[2]
+};
+
+struct avtab_node {
+ struct avtab_key key;
+ struct avtab_datum datum;
+ struct avtab_node *next;
+};
+
+struct avtab {
+ struct avtab_node **htable;
+ u32 nel; /* number of elements */
+};
+
+int avtab_init(struct avtab *);
+int avtab_insert(struct avtab *h, struct avtab_key *k, struct avtab_datum *d);
+struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *k, int specified);
+void avtab_destroy(struct avtab *h);
+int avtab_map(struct avtab *h,
+ int (*apply) (struct avtab_key *k,
+ struct avtab_datum *d,
+ void *args),
+ void *args);
+void avtab_hash_eval(struct avtab *h, char *tag);
+int avtab_read(struct avtab *a, void *fp, u32 config);
+
+#define AVTAB_HASH_BITS 15
+#define AVTAB_HASH_BUCKETS (1 << AVTAB_HASH_BITS)
+#define AVTAB_HASH_MASK (AVTAB_HASH_BUCKETS-1)
+
+#define AVTAB_SIZE AVTAB_HASH_BUCKETS
+
+#endif /* _SS_AVTAB_H_ */
+
diff -Nru a/security/selinux/ss/constraint.h b/security/selinux/ss/constraint.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/constraint.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,54 @@
+/*
+ * A constraint is a condition that must be satisfied in
+ * order for one or more permissions to be granted.
+ * Constraints are used to impose additional restrictions
+ * beyond the type-based rules in `te' or the role-based
+ * transition rules in `rbac'. Constraints are typically
+ * used to prevent a process from transitioning to a new user
+ * identity or role unless it is in a privileged type.
+ * Constraints are likewise typically used to prevent a
+ * process from labeling an object with a different user
+ * identity.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_CONSTRAINT_H_
+#define _SS_CONSTRAINT_H_
+
+#include "ebitmap.h"
+
+#define CEXPR_MAXDEPTH 5
+
+struct constraint_expr {
+#define CEXPR_NOT 1 /* not expr */
+#define CEXPR_AND 2 /* expr and expr */
+#define CEXPR_OR 3 /* expr or expr */
+#define CEXPR_ATTR 4 /* attr op attr */
+#define CEXPR_NAMES 5 /* attr op names */
+ u32 expr_type; /* expression type */
+
+#define CEXPR_USER 1 /* user */
+#define CEXPR_ROLE 2 /* role */
+#define CEXPR_TYPE 4 /* type */
+#define CEXPR_TARGET 8 /* target if set, source otherwise */
+ u32 attr; /* attribute */
+
+#define CEXPR_EQ 1 /* == or eq */
+#define CEXPR_NEQ 2 /* != */
+#define CEXPR_DOM 3 /* dom */
+#define CEXPR_DOMBY 4 /* domby */
+#define CEXPR_INCOMP 5 /* incomp */
+ u32 op; /* operator */
+
+ struct ebitmap names; /* names */
+
+ struct constraint_expr *next; /* next expression */
+};
+
+struct constraint_node {
+ u32 permissions; /* constrained permissions */
+ struct constraint_expr *expr; /* constraint on permissions */
+ struct constraint_node *next; /* next constraint */
+};
+
+#endif /* _SS_CONSTRAINT_H_ */
diff -Nru a/security/selinux/ss/context.h b/security/selinux/ss/context.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/context.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,117 @@
+/*
+ * A security context is a set of security attributes
+ * associated with each subject and object controlled
+ * by the security policy. Security contexts are
+ * externally represented as variable-length strings
+ * that can be interpreted by a user or application
+ * with an understanding of the security policy.
+ * Internally, the security server uses a simple
+ * structure. This structure is private to the
+ * security server and can be changed without affecting
+ * clients of the security server.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_CONTEXT_H_
+#define _SS_CONTEXT_H_
+
+#include "ebitmap.h"
+#include "mls_types.h"
+
+/*
+ * A security context consists of an authenticated user
+ * identity, a role, a type and a MLS range.
+ */
+struct context {
+ u32 user;
+ u32 role;
+ u32 type;
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+ struct mls_range range;
+#endif
+};
+
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+
+static inline void mls_context_init(struct context *c)
+{
+ memset(&c->range, 0, sizeof(c->range));
+}
+
+static inline int mls_context_cpy(struct context *dst, struct context *src)
+{
+ int rc;
+
+ dst->range.level[0].sens = src->range.level[0].sens;
+ rc = ebitmap_cpy(&dst->range.level[0].cat, &src->range.level[0].cat);
+ if (rc)
+ goto out;
+
+ dst->range.level[1].sens = src->range.level[1].sens;
+ rc = ebitmap_cpy(&dst->range.level[1].cat, &src->range.level[1].cat);
+ if (rc)
+ ebitmap_destroy(&dst->range.level[0].cat);
+out:
+ return rc;
+}
+
+static inline int mls_context_cmp(struct context *c1, struct context *c2)
+{
+ return ((c1->range.level[0].sens == c2->range.level[0].sens) &&
+ ebitmap_cmp(&c1->range.level[0].cat,&c2->range.level[0].cat) &&
+ (c1->range.level[1].sens == c2->range.level[1].sens) &&
+ ebitmap_cmp(&c1->range.level[1].cat,&c2->range.level[1].cat));
+}
+
+static inline void mls_context_destroy(struct context *c)
+{
+ ebitmap_destroy(&c->range.level[0].cat);
+ ebitmap_destroy(&c->range.level[1].cat);
+ mls_context_init(c);
+}
+
+#else
+
+static inline void mls_context_init(struct context *c)
+{ }
+
+static inline int mls_context_cpy(struct context *dst, struct context *src)
+{ return 0; }
+
+static inline int mls_context_cmp(struct context *c1, struct context *c2)
+{ return 1; }
+
+static inline void mls_context_destroy(struct context *c)
+{ }
+
+#endif
+
+static inline void context_init(struct context *c)
+{
+ memset(c, 0, sizeof(*c));
+}
+
+static inline int context_cpy(struct context *dst, struct context *src)
+{
+ dst->user = src->user;
+ dst->role = src->role;
+ dst->type = src->type;
+ return mls_context_cpy(dst, src);
+}
+
+static inline void context_destroy(struct context *c)
+{
+ c->user = c->role = c->type = 0;
+ mls_context_destroy(c);
+}
+
+static inline int context_cmp(struct context *c1, struct context *c2)
+{
+ return ((c1->user == c2->user) &&
+ (c1->role == c2->role) &&
+ (c1->type == c2->type) &&
+ mls_context_cmp(c1, c2));
+}
+
+#endif /* _SS_CONTEXT_H_ */
+
diff -Nru a/security/selinux/ss/ebitmap.c b/security/selinux/ss/ebitmap.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/ebitmap.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,332 @@
+/*
+ * Implementation of the extensible bitmap type.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "ebitmap.h"
+#include "policydb.h"
+
+int ebitmap_or(struct ebitmap *dst, struct ebitmap *e1, struct ebitmap *e2)
+{
+ struct ebitmap_node *n1, *n2, *new, *prev;
+
+ ebitmap_init(dst);
+
+ n1 = e1->node;
+ n2 = e2->node;
+ prev = 0;
+ while (n1 || n2) {
+ new = kmalloc(sizeof(*new), GFP_ATOMIC);
+ if (!new) {
+ ebitmap_destroy(dst);
+ return -ENOMEM;
+ }
+ memset(new, 0, sizeof(*new));
+ if (n1 && n2 && n1->startbit == n2->startbit) {
+ new->startbit = n1->startbit;
+ new->map = n1->map | n2->map;
+ n1 = n1->next;
+ n2 = n2->next;
+ } else if (!n2 || (n1 && n1->startbit < n2->startbit)) {
+ new->startbit = n1->startbit;
+ new->map = n1->map;
+ n1 = n1->next;
+ } else {
+ new->startbit = n2->startbit;
+ new->map = n2->map;
+ n2 = n2->next;
+ }
+
+ new->next = 0;
+ if (prev)
+ prev->next = new;
+ else
+ dst->node = new;
+ prev = new;
+ }
+
+ dst->highbit = (e1->highbit > e2->highbit) ? e1->highbit : e2->highbit;
+ return 0;
+}
+
+int ebitmap_cmp(struct ebitmap *e1, struct ebitmap *e2)
+{
+ struct ebitmap_node *n1, *n2;
+
+ if (e1->highbit != e2->highbit)
+ return 0;
+
+ n1 = e1->node;
+ n2 = e2->node;
+ while (n1 && n2 &&
+ (n1->startbit == n2->startbit) &&
+ (n1->map == n2->map)) {
+ n1 = n1->next;
+ n2 = n2->next;
+ }
+
+ if (n1 || n2)
+ return 0;
+
+ return 1;
+}
+
+int ebitmap_cpy(struct ebitmap *dst, struct ebitmap *src)
+{
+ struct ebitmap_node *n, *new, *prev;
+
+ ebitmap_init(dst);
+ n = src->node;
+ prev = 0;
+ while (n) {
+ new = kmalloc(sizeof(*new), GFP_ATOMIC);
+ if (!new) {
+ ebitmap_destroy(dst);
+ return -ENOMEM;
+ }
+ memset(new, 0, sizeof(*new));
+ new->startbit = n->startbit;
+ new->map = n->map;
+ new->next = 0;
+ if (prev)
+ prev->next = new;
+ else
+ dst->node = new;
+ prev = new;
+ n = n->next;
+ }
+
+ dst->highbit = src->highbit;
+ return 0;
+}
+
+int ebitmap_contains(struct ebitmap *e1, struct ebitmap *e2)
+{
+ struct ebitmap_node *n1, *n2;
+
+ if (e1->highbit < e2->highbit)
+ return 0;
+
+ n1 = e1->node;
+ n2 = e2->node;
+ while (n1 && n2 && (n1->startbit <= n2->startbit)) {
+ if (n1->startbit < n2->startbit) {
+ n1 = n1->next;
+ continue;
+ }
+ if ((n1->map & n2->map) != n2->map)
+ return 0;
+
+ n1 = n1->next;
+ n2 = n2->next;
+ }
+
+ if (n2)
+ return 0;
+
+ return 1;
+}
+
+int ebitmap_get_bit(struct ebitmap *e, unsigned long bit)
+{
+ struct ebitmap_node *n;
+
+ if (e->highbit < bit)
+ return 0;
+
+ n = e->node;
+ while (n && (n->startbit <= bit)) {
+ if ((n->startbit + MAPSIZE) > bit) {
+ if (n->map & (MAPBIT << (bit - n->startbit)))
+ return 1;
+ else
+ return 0;
+ }
+ n = n->next;
+ }
+
+ return 0;
+}
+
+int ebitmap_set_bit(struct ebitmap *e, unsigned long bit, int value)
+{
+ struct ebitmap_node *n, *prev, *new;
+
+ prev = 0;
+ n = e->node;
+ while (n && n->startbit <= bit) {
+ if ((n->startbit + MAPSIZE) > bit) {
+ if (value) {
+ n->map |= (MAPBIT << (bit - n->startbit));
+ } else {
+ n->map &= ~(MAPBIT << (bit - n->startbit));
+ if (!n->map) {
+ /* drop this node from the bitmap */
+
+ if (!n->next) {
+ /*
+ * this was the highest map
+ * within the bitmap
+ */
+ if (prev)
+ e->highbit = prev->startbit + MAPSIZE;
+ else
+ e->highbit = 0;
+ }
+ if (prev)
+ prev->next = n->next;
+ else
+ e->node = n->next;
+
+ kfree(n);
+ }
+ }
+ return 0;
+ }
+ prev = n;
+ n = n->next;
+ }
+
+ if (!value)
+ return 0;
+
+ new = kmalloc(sizeof(*new), GFP_ATOMIC);
+ if (!new)
+ return -ENOMEM;
+ memset(new, 0, sizeof(*new));
+
+ new->startbit = bit & ~(MAPSIZE - 1);
+ new->map = (MAPBIT << (bit - new->startbit));
+
+ if (!n)
+ /* this node will be the highest map within the bitmap */
+ e->highbit = new->startbit + MAPSIZE;
+
+ if (prev) {
+ new->next = prev->next;
+ prev->next = new;
+ } else {
+ new->next = e->node;
+ e->node = new;
+ }
+
+ return 0;
+}
+
+void ebitmap_destroy(struct ebitmap *e)
+{
+ struct ebitmap_node *n, *temp;
+
+ if (!e)
+ return;
+
+ n = e->node;
+ while (n) {
+ temp = n;
+ n = n->next;
+ kfree(temp);
+ }
+
+ e->highbit = 0;
+ e->node = 0;
+ return;
+}
+
+int ebitmap_read(struct ebitmap *e, void *fp)
+{
+ int rc = -EINVAL;
+ struct ebitmap_node *n, *l;
+ u32 *buf, mapsize, count, i;
+ u64 map;
+
+ ebitmap_init(e);
+
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf)
+ goto out;
+
+ mapsize = le32_to_cpu(buf[0]);
+ e->highbit = le32_to_cpu(buf[1]);
+ count = le32_to_cpu(buf[2]);
+
+ if (mapsize != MAPSIZE) {
+ printk(KERN_ERR "security: ebitmap: map size %d does not "
+ "match my size %d (high bit was %d)\n", mapsize,
+ MAPSIZE, e->highbit);
+ goto out;
+ }
+ if (!e->highbit) {
+ e->node = NULL;
+ goto ok;
+ }
+ if (e->highbit & (MAPSIZE - 1)) {
+ printk(KERN_ERR "security: ebitmap: high bit (%d) is not a "
+ "multiple of the map size (%d)\n", e->highbit, MAPSIZE);
+ goto bad;
+ }
+ l = NULL;
+ for (i = 0; i < count; i++) {
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ printk(KERN_ERR "security: ebitmap: truncated map\n");
+ goto bad;
+ }
+ n = kmalloc(sizeof(*n), GFP_KERNEL);
+ if (!n) {
+ printk(KERN_ERR "security: ebitmap: out of memory\n");
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(n, 0, sizeof(*n));
+
+ n->startbit = le32_to_cpu(buf[0]);
+
+ if (n->startbit & (MAPSIZE - 1)) {
+ printk(KERN_ERR "security: ebitmap start bit (%d) is "
+ "not a multiple of the map size (%d)\n",
+ n->startbit, MAPSIZE);
+ goto bad_free;
+ }
+ if (n->startbit > (e->highbit - MAPSIZE)) {
+ printk(KERN_ERR "security: ebitmap start bit (%d) is "
+ "beyond the end of the bitmap (%d)\n",
+ n->startbit, (e->highbit - MAPSIZE));
+ goto bad_free;
+ }
+ buf = next_entry(fp, sizeof(u64));
+ if (!buf) {
+ printk(KERN_ERR "security: ebitmap: truncated map\n");
+ goto bad_free;
+ }
+ memcpy(&map, buf, sizeof(u64));
+ n->map = le64_to_cpu(map);
+
+ if (!n->map) {
+ printk(KERN_ERR "security: ebitmap: null map in "
+ "ebitmap (startbit %d)\n", n->startbit);
+ goto bad_free;
+ }
+ if (l) {
+ if (n->startbit <= l->startbit) {
+ printk(KERN_ERR "security: ebitmap: start "
+ "bit %d comes after start bit %d\n",
+ n->startbit, l->startbit);
+ goto bad_free;
+ }
+ l->next = n;
+ } else
+ e->node = n;
+
+ l = n;
+ }
+
+ok:
+ rc = 0;
+out:
+ return rc;
+bad_free:
+ kfree(n);
+bad:
+ ebitmap_destroy(e);
+ goto out;
+}
diff -Nru a/security/selinux/ss/ebitmap.h b/security/selinux/ss/ebitmap.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/ebitmap.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,49 @@
+/*
+ * An extensible bitmap is a bitmap that supports an
+ * arbitrary number of bits. Extensible bitmaps are
+ * used to represent sets of values, such as types,
+ * roles, categories, and classes.
+ *
+ * Each extensible bitmap is implemented as a linked
+ * list of bitmap nodes, where each bitmap node has
+ * an explicitly specified starting bit position within
+ * the total bitmap.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_EBITMAP_H_
+#define _SS_EBITMAP_H_
+
+#define MAPTYPE u64 /* portion of bitmap in each node */
+#define MAPSIZE (sizeof(MAPTYPE) * 8) /* number of bits in node bitmap */
+#define MAPBIT 1ULL /* a bit in the node bitmap */
+
+struct ebitmap_node {
+ u32 startbit; /* starting position in the total bitmap */
+ MAPTYPE map; /* this node's portion of the bitmap */
+ struct ebitmap_node *next;
+};
+
+struct ebitmap {
+ struct ebitmap_node *node; /* first node in the bitmap */
+ u32 highbit; /* highest position in the total bitmap */
+};
+
+#define ebitmap_length(e) ((e)->highbit)
+#define ebitmap_startbit(e) ((e)->node ? (e)->node->startbit : 0)
+
+static inline void ebitmap_init(struct ebitmap *e)
+{
+ memset(e, 0, sizeof(*e));
+}
+
+int ebitmap_cmp(struct ebitmap *e1, struct ebitmap *e2);
+int ebitmap_or(struct ebitmap *dst, struct ebitmap *e1, struct ebitmap *e2);
+int ebitmap_cpy(struct ebitmap *dst, struct ebitmap *src);
+int ebitmap_contains(struct ebitmap *e1, struct ebitmap *e2);
+int ebitmap_get_bit(struct ebitmap *e, unsigned long bit);
+int ebitmap_set_bit(struct ebitmap *e, unsigned long bit, int value);
+void ebitmap_destroy(struct ebitmap *e);
+int ebitmap_read(struct ebitmap *e, void *fp);
+
+#endif /* _SS_EBITMAP_H_ */
diff -Nru a/security/selinux/ss/global.h b/security/selinux/ss/global.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/global.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,17 @@
+#ifndef _SS_GLOBAL_H_
+#define _SS_GLOBAL_H_
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+#include <linux/in.h>
+#include <linux/spinlock.h>
+#include <asm/semaphore.h>
+
+#include "flask.h"
+#include "avc.h"
+#include "avc_ss.h"
+#include "security.h"
+
+#endif /* _SS_GLOBAL_H_ */
diff -Nru a/security/selinux/ss/hashtab.c b/security/selinux/ss/hashtab.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/hashtab.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,277 @@
+/*
+ * Implementation of the hash table type.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "hashtab.h"
+
+struct hashtab *hashtab_create(u32 (*hash_value)(struct hashtab *h, void *key),
+ int (*keycmp)(struct hashtab *h, void *key1, void *key2),
+ u32 size)
+{
+ struct hashtab *p;
+ u32 i;
+
+ p = kmalloc(sizeof(*p), GFP_KERNEL);
+ if (p == NULL)
+ return p;
+
+ memset(p, 0, sizeof(*p));
+ p->size = size;
+ p->nel = 0;
+ p->hash_value = hash_value;
+ p->keycmp = keycmp;
+ p->htable = kmalloc(sizeof(*(p->htable)) * size, GFP_KERNEL);
+ if (p->htable == NULL) {
+ kfree(p);
+ return NULL;
+ }
+
+ for (i = 0; i < size; i++)
+ p->htable[i] = NULL;
+
+ return p;
+}
+
+int hashtab_insert(struct hashtab *h, void *key, void *datum)
+{
+ u32 hvalue;
+ struct hashtab_node *prev, *cur, *newnode;
+
+ if (!h || h->nel == HASHTAB_MAX_NODES)
+ return -EINVAL;
+
+ hvalue = h->hash_value(h, key);
+ prev = NULL;
+ cur = h->htable[hvalue];
+ while (cur && h->keycmp(h, key, cur->key) > 0) {
+ prev = cur;
+ cur = cur->next;
+ }
+
+ if (cur && (h->keycmp(h, key, cur->key) == 0))
+ return -EEXIST;
+
+ newnode = kmalloc(sizeof(*newnode), GFP_KERNEL);
+ if (newnode == NULL)
+ return -ENOMEM;
+ memset(newnode, 0, sizeof(*newnode));
+ newnode->key = key;
+ newnode->datum = datum;
+ if (prev) {
+ newnode->next = prev->next;
+ prev->next = newnode;
+ } else {
+ newnode->next = h->htable[hvalue];
+ h->htable[hvalue] = newnode;
+ }
+
+ h->nel++;
+ return 0;
+}
+
+int hashtab_remove(struct hashtab *h, void *key,
+ void (*destroy)(void *k, void *d, void *args),
+ void *args)
+{
+ u32 hvalue;
+ struct hashtab_node *cur, *last;
+
+ if (!h)
+ return -EINVAL;
+
+ hvalue = h->hash_value(h, key);
+ last = NULL;
+ cur = h->htable[hvalue];
+ while (cur != NULL && h->keycmp(h, key, cur->key) > 0) {
+ last = cur;
+ cur = cur->next;
+ }
+
+ if (cur == NULL || (h->keycmp(h, key, cur->key) != 0))
+ return -ENOENT;
+
+ if (last == NULL)
+ h->htable[hvalue] = cur->next;
+ else
+ last->next = cur->next;
+
+ if (destroy)
+ destroy(cur->key, cur->datum, args);
+ kfree(cur);
+ h->nel--;
+ return 0;
+}
+
+int hashtab_replace(struct hashtab *h, void *key, void *datum,
+ void (*destroy)(void *k, void *d, void *args),
+ void *args)
+{
+ u32 hvalue;
+ struct hashtab_node *prev, *cur, *newnode;
+
+ if (!h)
+ return -EINVAL;
+
+ hvalue = h->hash_value(h, key);
+ prev = NULL;
+ cur = h->htable[hvalue];
+ while (cur != NULL && h->keycmp(h, key, cur->key) > 0) {
+ prev = cur;
+ cur = cur->next;
+ }
+
+ if (cur && (h->keycmp(h, key, cur->key) == 0)) {
+ if (destroy)
+ destroy(cur->key, cur->datum, args);
+ cur->key = key;
+ cur->datum = datum;
+ } else {
+ newnode = kmalloc(sizeof(*newnode), GFP_KERNEL);
+ if (newnode == NULL)
+ return -ENOMEM;
+ memset(newnode, 0, sizeof(*newnode));
+ newnode->key = key;
+ newnode->datum = datum;
+ if (prev) {
+ newnode->next = prev->next;
+ prev->next = newnode;
+ } else {
+ newnode->next = h->htable[hvalue];
+ h->htable[hvalue] = newnode;
+ }
+ }
+
+ return 0;
+}
+
+void *hashtab_search(struct hashtab *h, void *key)
+{
+ u32 hvalue;
+ struct hashtab_node *cur;
+
+ if (!h)
+ return NULL;
+
+ hvalue = h->hash_value(h, key);
+ cur = h->htable[hvalue];
+ while (cur != NULL && h->keycmp(h, key, cur->key) > 0)
+ cur = cur->next;
+
+ if (cur == NULL || (h->keycmp(h, key, cur->key) != 0))
+ return NULL;
+
+ return cur->datum;
+}
+
+void hashtab_destroy(struct hashtab *h)
+{
+ u32 i;
+ struct hashtab_node *cur, *temp;
+
+ if (!h)
+ return;
+
+ for (i = 0; i < h->size; i++) {
+ cur = h->htable[i];
+ while (cur != NULL) {
+ temp = cur;
+ cur = cur->next;
+ kfree(temp);
+ }
+ h->htable[i] = NULL;
+ }
+
+ kfree(h->htable);
+ h->htable = NULL;
+
+ kfree(h);
+}
+
+int hashtab_map(struct hashtab *h,
+ int (*apply)(void *k, void *d, void *args),
+ void *args)
+{
+ u32 i;
+ int ret;
+ struct hashtab_node *cur;
+
+ if (!h)
+ return 0;
+
+ for (i = 0; i < h->size; i++) {
+ cur = h->htable[i];
+ while (cur != NULL) {
+ ret = apply(cur->key, cur->datum, args);
+ if (ret)
+ return ret;
+ cur = cur->next;
+ }
+ }
+ return 0;
+}
+
+
+void hashtab_map_remove_on_error(struct hashtab *h,
+ int (*apply)(void *k, void *d, void *args),
+ void (*destroy)(void *k, void *d, void *args),
+ void *args)
+{
+ u32 i;
+ int ret;
+ struct hashtab_node *last, *cur, *temp;
+
+ if (!h)
+ return;
+
+ for (i = 0; i < h->size; i++) {
+ last = NULL;
+ cur = h->htable[i];
+ while (cur != NULL) {
+ ret = apply(cur->key, cur->datum, args);
+ if (ret) {
+ if (last)
+ last->next = cur->next;
+ else
+ h->htable[i] = cur->next;
+
+ temp = cur;
+ cur = cur->next;
+ if (destroy)
+ destroy(temp->key, temp->datum, args);
+ kfree(temp);
+ h->nel--;
+ } else {
+ last = cur;
+ cur = cur->next;
+ }
+ }
+ }
+ return;
+}
+
+void hashtab_stat(struct hashtab *h, struct hashtab_info *info)
+{
+ u32 i, chain_len, slots_used, max_chain_len;
+ struct hashtab_node *cur;
+
+ slots_used = 0;
+ max_chain_len = 0;
+ for (slots_used = max_chain_len = i = 0; i < h->size; i++) {
+ cur = h->htable[i];
+ if (cur) {
+ slots_used++;
+ chain_len = 0;
+ while (cur) {
+ chain_len++;
+ cur = cur->next;
+ }
+
+ if (chain_len > max_chain_len)
+ max_chain_len = chain_len;
+ }
+ }
+
+ info->slots_used = slots_used;
+ info->max_chain_len = max_chain_len;
+}
diff -Nru a/security/selinux/ss/hashtab.h b/security/selinux/ss/hashtab.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/hashtab.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,125 @@
+/*
+ * A hash table (hashtab) maintains associations between
+ * key values and datum values. The type of the key values
+ * and the type of the datum values is arbitrary. The
+ * functions for hash computation and key comparison are
+ * provided by the creator of the table.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_HASHTAB_H_
+#define _SS_HASHTAB_H_
+
+#define HASHTAB_MAX_NODES 0xffffffff
+
+struct hashtab_node {
+ void *key;
+ void *datum;
+ struct hashtab_node *next;
+};
+
+struct hashtab {
+ struct hashtab_node **htable; /* hash table */
+ u32 size; /* number of slots in hash table */
+ u32 nel; /* number of elements in hash table */
+ u32 (*hash_value)(struct hashtab *h, void *key);
+ /* hash function */
+ int (*keycmp)(struct hashtab *h, void *key1, void *key2);
+ /* key comparison function */
+};
+
+struct hashtab_info {
+ u32 slots_used;
+ u32 max_chain_len;
+};
+
+/*
+ * Creates a new hash table with the specified characteristics.
+ *
+ * Returns NULL if insufficent space is available or
+ * the new hash table otherwise.
+ */
+struct hashtab *hashtab_create(u32 (*hash_value)(struct hashtab *h, void *key),
+ int (*keycmp)(struct hashtab *h, void *key1, void *key2),
+ u32 size);
+
+/*
+ * Inserts the specified (key, datum) pair into the specified hash table.
+ *
+ * Returns -ENOMEM on memory allocation error,
+ * -EEXIST if there is already an entry with the same key,
+ * -EINVAL for general errors or
+ * 0 otherwise.
+ */
+int hashtab_insert(struct hashtab *h, void *k, void *d);
+
+/*
+ * Removes the entry with the specified key from the hash table.
+ * Applies the specified destroy function to (key,datum,args) for
+ * the entry.
+ *
+ * Returns -ENOENT if no entry has the specified key,
+ * -EINVAL for general errors or
+ *0 otherwise.
+ */
+int hashtab_remove(struct hashtab *h, void *k,
+ void (*destroy)(void *k, void *d, void *args),
+ void *args);
+
+/*
+ * Insert or replace the specified (key, datum) pair in the specified
+ * hash table. If an entry for the specified key already exists,
+ * then the specified destroy function is applied to (key,datum,args)
+ * for the entry prior to replacing the entry's contents.
+ *
+ * Returns -ENOMEM if insufficient space is available,
+ * -EINVAL for general errors or
+ * 0 otherwise.
+ */
+int hashtab_replace(struct hashtab *h, void *k, void *d,
+ void (*destroy)(void *k, void *d, void *args),
+ void *args);
+
+/*
+ * Searches for the entry with the specified key in the hash table.
+ *
+ * Returns NULL if no entry has the specified key or
+ * the datum of the entry otherwise.
+ */
+void *hashtab_search(struct hashtab *h, void *k);
+
+/*
+ * Destroys the specified hash table.
+ */
+void hashtab_destroy(struct hashtab *h);
+
+/*
+ * Applies the specified apply function to (key,datum,args)
+ * for each entry in the specified hash table.
+ *
+ * The order in which the function is applied to the entries
+ * is dependent upon the internal structure of the hash table.
+ *
+ * If apply returns a non-zero status, then hashtab_map will cease
+ * iterating through the hash table and will propagate the error
+ * return to its caller.
+ */
+int hashtab_map(struct hashtab *h,
+ int (*apply)(void *k, void *d, void *args),
+ void *args);
+
+/*
+ * Same as hashtab_map, except that if apply returns a non-zero status,
+ * then the (key,datum) pair will be removed from the hashtab and the
+ * destroy function will be applied to (key,datum,args).
+ */
+void hashtab_map_remove_on_error(struct hashtab *h,
+ int (*apply)(void *k, void *d, void *args),
+ void (*destroy)(void *k, void *d, void *args),
+ void *args);
+
+
+/* Fill info with some hash table statistics */
+void hashtab_stat(struct hashtab *h, struct hashtab_info *info);
+
+#endif /* _SS_HASHTAB_H */
diff -Nru a/security/selinux/ss/mls.c b/security/selinux/ss/mls.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/mls.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,741 @@
+/*
+ * Implementation of the multi-level security (MLS) policy.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "mls.h"
+#include "policydb.h"
+#include "services.h"
+
+/*
+ * Remove any permissions from `allowed' that are
+ * denied by the MLS policy.
+ */
+void mls_compute_av(struct context *scontext,
+ struct context *tcontext,
+ struct class_datum *tclass,
+ u32 *allowed)
+{
+ unsigned int rel[2];
+ int l;
+
+ for (l = 0; l < 2; l++)
+ rel[l] = mls_level_relation(scontext->range.level[l],
+ tcontext->range.level[l]);
+
+ if (rel[1] != MLS_RELATION_EQ) {
+ if (rel[1] != MLS_RELATION_DOM &&
+ !ebitmap_get_bit(&policydb.trustedreaders, scontext->type - 1) &&
+ !ebitmap_get_bit(&policydb.trustedobjects, tcontext->type - 1)) {
+ /* read(s,t) = (s.high >= t.high) = False */
+ *allowed = (*allowed) & ~(tclass->mlsperms.read);
+ }
+ if (rel[1] != MLS_RELATION_DOMBY &&
+ !ebitmap_get_bit(&policydb.trustedreaders, tcontext->type - 1) &&
+ !ebitmap_get_bit(&policydb.trustedobjects, scontext->type - 1)) {
+ /* readby(s,t) = read(t,s) = False */
+ *allowed = (*allowed) & ~(tclass->mlsperms.readby);
+ }
+ }
+ if (((rel[0] != MLS_RELATION_DOMBY && rel[0] != MLS_RELATION_EQ) ||
+ ((!mls_level_eq(tcontext->range.level[0],
+ tcontext->range.level[1])) &&
+ (rel[1] != MLS_RELATION_DOM && rel[1] != MLS_RELATION_EQ))) &&
+ !ebitmap_get_bit(&policydb.trustedwriters, scontext->type - 1) &&
+ !ebitmap_get_bit(&policydb.trustedobjects, tcontext->type - 1)) {
+ /*
+ * write(s,t) = ((s.low <= t.low = t.high) or (s.low
+ * <= t.low <= t.high <= s.high)) = False
+ */
+ *allowed = (*allowed) & ~(tclass->mlsperms.write);
+ }
+
+ if (((rel[0] != MLS_RELATION_DOM && rel[0] != MLS_RELATION_EQ) ||
+ ((!mls_level_eq(scontext->range.level[0],
+ scontext->range.level[1])) &&
+ (rel[1] != MLS_RELATION_DOMBY && rel[1] != MLS_RELATION_EQ))) &&
+ !ebitmap_get_bit(&policydb.trustedwriters, tcontext->type - 1) &&
+ !ebitmap_get_bit(&policydb.trustedobjects, scontext->type - 1)) {
+ /* writeby(s,t) = write(t,s) = False */
+ *allowed = (*allowed) & ~(tclass->mlsperms.writeby);
+ }
+}
+
+/*
+ * Return the length in bytes for the MLS fields of the
+ * security context string representation of `context'.
+ */
+int mls_compute_context_len(struct context * context)
+{
+ int i, l, len;
+
+
+ len = 0;
+ for (l = 0; l < 2; l++) {
+ len += strlen(policydb.p_sens_val_to_name[context->range.level[l].sens - 1]) + 1;
+
+ for (i = 1; i <= ebitmap_length(&context->range.level[l].cat); i++)
+ if (ebitmap_get_bit(&context->range.level[l].cat, i - 1))
+ len += strlen(policydb.p_cat_val_to_name[i - 1]) + 1;
+
+ if (mls_level_relation(context->range.level[0], context->range.level[1])
+ == MLS_RELATION_EQ)
+ break;
+ }
+
+ return len;
+}
+
+/*
+ * Write the security context string representation of
+ * the MLS fields of `context' into the string `*scontext'.
+ * Update `*scontext' to point to the end of the MLS fields.
+ */
+int mls_sid_to_context(struct context *context,
+ char **scontext)
+{
+ char *scontextp;
+ int i, l;
+
+ scontextp = *scontext;
+
+ for (l = 0; l < 2; l++) {
+ strcpy(scontextp,
+ policydb.p_sens_val_to_name[context->range.level[l].sens - 1]);
+ scontextp += strlen(policydb.p_sens_val_to_name[context->range.level[l].sens - 1]);
+ *scontextp = ':';
+ scontextp++;
+ for (i = 1; i <= ebitmap_length(&context->range.level[l].cat); i++)
+ if (ebitmap_get_bit(&context->range.level[l].cat, i - 1)) {
+ strcpy(scontextp, policydb.p_cat_val_to_name[i - 1]);
+ scontextp += strlen(policydb.p_cat_val_to_name[i - 1]);
+ *scontextp = ',';
+ scontextp++;
+ }
+ if (mls_level_relation(context->range.level[0], context->range.level[1])
+ != MLS_RELATION_EQ) {
+ scontextp--;
+ sprintf(scontextp, "-");
+ scontextp++;
+
+ } else {
+ break;
+ }
+ }
+
+ *scontext = scontextp;
+ return 0;
+}
+
+/*
+ * Return 1 if the MLS fields in the security context
+ * structure `c' are valid. Return 0 otherwise.
+ */
+int mls_context_isvalid(struct policydb *p, struct context *c)
+{
+ unsigned int relation;
+ struct level_datum *levdatum;
+ struct user_datum *usrdatum;
+ struct mls_range_list *rnode;
+ int i, l;
+
+ /*
+ * MLS range validity checks: high must dominate low, low level must
+ * be valid (category set <-> sensitivity check), and high level must
+ * be valid (category set <-> sensitivity check)
+ */
+ relation = mls_level_relation(c->range.level[1],
+ c->range.level[0]);
+ if (!(relation & (MLS_RELATION_DOM | MLS_RELATION_EQ)))
+ /* High does not dominate low. */
+ return 0;
+
+ for (l = 0; l < 2; l++) {
+ if (!c->range.level[l].sens || c->range.level[l].sens > p->p_levels.nprim)
+ return 0;
+ levdatum = hashtab_search(p->p_levels.table,
+ p->p_sens_val_to_name[c->range.level[l].sens - 1]);
+ if (!levdatum)
+ return 0;
+
+ for (i = 1; i <= ebitmap_length(&c->range.level[l].cat); i++) {
+ if (ebitmap_get_bit(&c->range.level[l].cat, i - 1)) {
+ if (i > p->p_cats.nprim)
+ return 0;
+ if (!ebitmap_get_bit(&levdatum->level->cat, i - 1))
+ /*
+ * Category may not be associated with
+ * sensitivity in low level.
+ */
+ return 0;
+ }
+ }
+ }
+
+ if (c->role == OBJECT_R_VAL)
+ return 1;
+
+ /*
+ * User must be authorized for the MLS range.
+ */
+ if (!c->user || c->user > p->p_users.nprim)
+ return 0;
+ usrdatum = p->user_val_to_struct[c->user - 1];
+ for (rnode = usrdatum->ranges; rnode; rnode = rnode->next) {
+ if (mls_range_contains(rnode->range, c->range))
+ break;
+ }
+ if (!rnode)
+ /* user may not be associated with range */
+ return 0;
+
+ return 1;
+}
+
+
+/*
+ * Set the MLS fields in the security context structure
+ * `context' based on the string representation in
+ * the string `*scontext'. Update `*scontext' to
+ * point to the end of the string representation of
+ * the MLS fields.
+ *
+ * This function modifies the string in place, inserting
+ * NULL characters to terminate the MLS fields.
+ */
+int mls_context_to_sid(char oldc,
+ char **scontext,
+ struct context *context)
+{
+
+ char delim;
+ char *scontextp, *p;
+ struct level_datum *levdatum;
+ struct cat_datum *catdatum;
+ int l, rc = -EINVAL;
+
+ if (!oldc) {
+ /* No MLS component to the security context. Try
+ to use a default 'unclassified' value. */
+ levdatum = hashtab_search(policydb.p_levels.table,
+ "unclassified");
+ if (!levdatum)
+ goto out;
+ context->range.level[0].sens = levdatum->level->sens;
+ context->range.level[1].sens = context->range.level[0].sens;
+ rc = 0;
+ goto out;
+ }
+
+ /* Extract low sensitivity. */
+ scontextp = p = *scontext;
+ while (*p && *p != ':' && *p != '-')
+ p++;
+
+ delim = *p;
+ if (delim != 0)
+ *p++ = 0;
+
+ for (l = 0; l < 2; l++) {
+ levdatum = hashtab_search(policydb.p_levels.table, scontextp);
+ if (!levdatum)
+ goto out;
+
+ context->range.level[l].sens = levdatum->level->sens;
+
+ if (delim == ':') {
+ /* Extract low category set. */
+ while (1) {
+ scontextp = p;
+ while (*p && *p != ',' && *p != '-')
+ p++;
+ delim = *p;
+ if (delim != 0)
+ *p++ = 0;
+
+ catdatum = hashtab_search(policydb.p_cats.table,
+ scontextp);
+ if (!catdatum)
+ goto out;
+
+ rc = ebitmap_set_bit(&context->range.level[l].cat,
+ catdatum->value - 1, 1);
+ if (rc)
+ goto out;
+ if (delim != ',')
+ break;
+ }
+ }
+ if (delim == '-') {
+ /* Extract high sensitivity. */
+ scontextp = p;
+ while (*p && *p != ':')
+ p++;
+
+ delim = *p;
+ if (delim != 0)
+ *p++ = 0;
+ } else
+ break;
+ }
+
+ if (l == 0) {
+ context->range.level[1].sens = context->range.level[0].sens;
+ rc = ebitmap_cpy(&context->range.level[1].cat,
+ &context->range.level[0].cat);
+ if (rc)
+ goto out;
+ }
+ *scontext = p;
+ rc = 0;
+out:
+ return rc;
+}
+
+/*
+ * Copies the MLS range from `src' into `dst'.
+ */
+static inline int mls_copy_context(struct context *dst,
+ struct context *src)
+{
+ int l, rc = 0;
+
+ /* Copy the MLS range from the source context */
+ for (l = 0; l < 2; l++) {
+
+ dst->range.level[l].sens = src->range.level[l].sens;
+ rc = ebitmap_cpy(&dst->range.level[l].cat,
+ &src->range.level[l].cat);
+ if (rc)
+ break;
+ }
+
+ return rc;
+}
+
+/*
+ * Convert the MLS fields in the security context
+ * structure `c' from the values specified in the
+ * policy `oldp' to the values specified in the policy `newp'.
+ */
+int mls_convert_context(struct policydb *oldp,
+ struct policydb *newp,
+ struct context *c)
+{
+ struct level_datum *levdatum;
+ struct cat_datum *catdatum;
+ struct ebitmap bitmap;
+ int l, i;
+
+ for (l = 0; l < 2; l++) {
+ levdatum = hashtab_search(newp->p_levels.table,
+ oldp->p_sens_val_to_name[c->range.level[l].sens - 1]);
+
+ if (!levdatum)
+ return -EINVAL;
+ c->range.level[l].sens = levdatum->level->sens;
+
+ ebitmap_init(&bitmap);
+ for (i = 1; i <= ebitmap_length(&c->range.level[l].cat); i++) {
+ if (ebitmap_get_bit(&c->range.level[l].cat, i - 1)) {
+ int rc;
+
+ catdatum = hashtab_search(newp->p_cats.table,
+ oldp->p_cat_val_to_name[i - 1]);
+ if (!catdatum)
+ return -EINVAL;
+ rc = ebitmap_set_bit(&bitmap, catdatum->value - 1, 1);
+ if (rc)
+ return rc;
+ }
+ }
+ ebitmap_destroy(&c->range.level[l].cat);
+ c->range.level[l].cat = bitmap;
+ }
+
+ return 0;
+}
+
+int mls_compute_sid(struct context *scontext,
+ struct context *tcontext,
+ u16 tclass,
+ u32 specified,
+ struct context *newcontext)
+{
+ switch (specified) {
+ case AVTAB_TRANSITION:
+ case AVTAB_CHANGE:
+ /* Use the process MLS attributes. */
+ return mls_copy_context(newcontext, scontext);
+ case AVTAB_MEMBER:
+ /* Only polyinstantiate the MLS attributes if
+ the type is being polyinstantiated */
+ if (newcontext->type != tcontext->type) {
+ /* Use the process MLS attributes. */
+ return mls_copy_context(newcontext, scontext);
+ } else {
+ /* Use the related object MLS attributes. */
+ return mls_copy_context(newcontext, tcontext);
+ }
+ default:
+ return -EINVAL;
+ }
+ return -EINVAL;
+}
+
+void mls_user_destroy(struct user_datum *usrdatum)
+{
+ struct mls_range_list *rnode, *rtmp;
+ rnode = usrdatum->ranges;
+ while (rnode) {
+ rtmp = rnode;
+ rnode = rnode->next;
+ ebitmap_destroy(&rtmp->range.level[0].cat);
+ ebitmap_destroy(&rtmp->range.level[1].cat);
+ kfree(rtmp);
+ }
+}
+
+int mls_read_perm(struct perm_datum *perdatum, void *fp)
+{
+ u32 *buf;
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ return -EINVAL;
+ perdatum->base_perms = le32_to_cpu(buf[0]);
+ return 0;
+}
+
+/*
+ * Read a MLS level structure from a policydb binary
+ * representation file.
+ */
+struct mls_level *mls_read_level(void *fp)
+{
+ struct mls_level *l;
+ u32 *buf;
+
+ l = kmalloc(sizeof(*l), GFP_ATOMIC);
+ if (!l) {
+ printk(KERN_ERR "security: mls: out of memory\n");
+ return NULL;
+ }
+ memset(l, 0, sizeof(*l));
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ printk(KERN_ERR "security: mls: truncated level\n");
+ goto bad;
+ }
+ l->sens = cpu_to_le32(buf[0]);
+
+ if (ebitmap_read(&l->cat, fp)) {
+ printk(KERN_ERR "security: mls: error reading level "
+ "categories\n");
+ goto bad;
+ }
+ return l;
+
+bad:
+ kfree(l);
+ return NULL;
+}
+
+
+/*
+ * Read a MLS range structure from a policydb binary
+ * representation file.
+ */
+static int mls_read_range_helper(struct mls_range *r, void *fp)
+{
+ u32 *buf;
+ int items, rc = -EINVAL;
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto out;
+
+ items = le32_to_cpu(buf[0]);
+ buf = next_entry(fp, sizeof(u32) * items);
+ if (!buf) {
+ printk(KERN_ERR "security: mls: truncated range\n");
+ goto out;
+ }
+ r->level[0].sens = le32_to_cpu(buf[0]);
+ if (items > 1) {
+ r->level[1].sens = le32_to_cpu(buf[1]);
+ } else {
+ r->level[1].sens = r->level[0].sens;
+ }
+
+ rc = ebitmap_read(&r->level[0].cat, fp);
+ if (rc) {
+ printk(KERN_ERR "security: mls: error reading low "
+ "categories\n");
+ goto out;
+ }
+ if (items > 1) {
+ rc = ebitmap_read(&r->level[1].cat, fp);
+ if (rc) {
+ printk(KERN_ERR "security: mls: error reading high "
+ "categories\n");
+ goto bad_high;
+ }
+ } else {
+ rc = ebitmap_cpy(&r->level[1].cat, &r->level[0].cat);
+ if (rc) {
+ printk(KERN_ERR "security: mls: out of memory\n");
+ goto bad_high;
+ }
+ }
+
+ rc = 0;
+out:
+ return rc;
+bad_high:
+ ebitmap_destroy(&r->level[0].cat);
+ goto out;
+}
+
+int mls_read_range(struct context *c, void *fp)
+{
+ return mls_read_range_helper(&c->range, fp);
+}
+
+
+/*
+ * Read a MLS perms structure from a policydb binary
+ * representation file.
+ */
+int mls_read_class(struct class_datum *cladatum, void *fp)
+{
+ struct mls_perms *p = &cladatum->mlsperms;
+ u32 *buf;
+
+ buf = next_entry(fp, sizeof(u32)*4);
+ if (!buf) {
+ printk(KERN_ERR "security: mls: truncated mls permissions\n");
+ return -EINVAL;
+ }
+ p->read = le32_to_cpu(buf[0]);
+ p->readby = le32_to_cpu(buf[1]);
+ p->write = le32_to_cpu(buf[2]);
+ p->writeby = le32_to_cpu(buf[3]);
+ return 0;
+}
+
+int mls_read_user(struct user_datum *usrdatum, void *fp)
+{
+ struct mls_range_list *r, *l;
+ int rc = 0;
+ u32 nel, i;
+ u32 *buf;
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ rc = -EINVAL;
+ goto out;
+ }
+ nel = le32_to_cpu(buf[0]);
+ l = NULL;
+ for (i = 0; i < nel; i++) {
+ r = kmalloc(sizeof(*r), GFP_ATOMIC);
+ if (!r) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(r, 0, sizeof(*r));
+
+ rc = mls_read_range_helper(&r->range, fp);
+ if (rc)
+ goto out;
+
+ if (l)
+ l->next = r;
+ else
+ usrdatum->ranges = r;
+ l = r;
+ }
+out:
+ return rc;
+}
+
+int mls_read_nlevels(struct policydb *p, void *fp)
+{
+ u32 *buf;
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ return -EINVAL;
+ p->nlevels = le32_to_cpu(buf[0]);
+ return 0;
+}
+
+int mls_read_trusted(struct policydb *p, void *fp)
+{
+ int rc = 0;
+
+ rc = ebitmap_read(&p->trustedreaders, fp);
+ if (rc)
+ goto out;
+ rc = ebitmap_read(&p->trustedwriters, fp);
+ if (rc)
+ goto out;
+ rc = ebitmap_read(&p->trustedobjects, fp);
+out:
+ return rc;
+}
+
+int sens_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct level_datum *levdatum;
+
+
+ levdatum = datum;
+ p = datap;
+
+ if (!levdatum->isalias)
+ p->p_sens_val_to_name[levdatum->level->sens - 1] = key;
+
+ return 0;
+}
+
+int cat_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct cat_datum *catdatum;
+
+
+ catdatum = datum;
+ p = datap;
+
+
+ if (!catdatum->isalias)
+ p->p_cat_val_to_name[catdatum->value - 1] = key;
+
+ return 0;
+}
+
+int sens_destroy(void *key, void *datum, void *p)
+{
+ struct level_datum *levdatum;
+
+ kfree(key);
+ levdatum = datum;
+ if (!levdatum->isalias) {
+ ebitmap_destroy(&levdatum->level->cat);
+ kfree(levdatum->level);
+ }
+ kfree(datum);
+ return 0;
+}
+
+int cat_destroy(void *key, void *datum, void *p)
+{
+ kfree(key);
+ kfree(datum);
+ return 0;
+}
+
+int sens_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct level_datum *levdatum;
+ int rc;
+ u32 *buf, len;
+
+ levdatum = kmalloc(sizeof(*levdatum), GFP_ATOMIC);
+ if (!levdatum) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(levdatum, 0, sizeof(*levdatum));
+
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ levdatum->isalias = le32_to_cpu(buf[1]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_ATOMIC);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ levdatum->level = mls_read_level(fp);
+ if (!levdatum->level) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ rc = hashtab_insert(h, key, levdatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ sens_destroy(key, levdatum, NULL);
+ goto out;
+}
+
+
+int cat_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct cat_datum *catdatum;
+ int rc;
+ u32 *buf, len;
+
+ catdatum = kmalloc(sizeof(*catdatum), GFP_ATOMIC);
+ if (!catdatum) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(catdatum, 0, sizeof(*catdatum));
+
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ catdatum->value = le32_to_cpu(buf[1]);
+ catdatum->isalias = le32_to_cpu(buf[2]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_ATOMIC);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ rc = hashtab_insert(h, key, catdatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+
+bad:
+ cat_destroy(key, catdatum, NULL);
+ goto out;
+}
diff -Nru a/security/selinux/ss/mls.h b/security/selinux/ss/mls.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/mls.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,99 @@
+/*
+ * Multi-level security (MLS) policy operations.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_MLS_H_
+#define _SS_MLS_H_
+
+#include "context.h"
+#include "policydb.h"
+
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+
+void mls_compute_av(struct context *scontext,
+ struct context *tcontext,
+ struct class_datum *tclass,
+ u32 *allowed);
+
+int mls_compute_context_len(struct context *context);
+int mls_sid_to_context(struct context *context, char **scontext);
+int mls_context_isvalid(struct policydb *p, struct context *c);
+
+int mls_context_to_sid(char oldc,
+ char **scontext,
+ struct context *context);
+
+int mls_convert_context(struct policydb *oldp,
+ struct policydb *newp,
+ struct context *context);
+
+int mls_compute_sid(struct context *scontext,
+ struct context *tcontext,
+ u16 tclass,
+ u32 specified,
+ struct context *newcontext);
+
+int sens_index(void *key, void *datum, void *datap);
+int cat_index(void *key, void *datum, void *datap);
+int sens_destroy(void *key, void *datum, void *p);
+int cat_destroy(void *key, void *datum, void *p);
+int sens_read(struct policydb *p, struct hashtab *h, void *fp);
+int cat_read(struct policydb *p, struct hashtab *h, void *fp);
+
+#define mls_for_user_ranges(user, usercon) { \
+struct mls_range_list *__ranges; \
+for (__ranges = user->ranges; __ranges; __ranges = __ranges->next) { \
+usercon.range = __ranges->range;
+
+#define mls_end_user_ranges } }
+
+#define mls_symtab_names , "levels", "categories"
+#define mls_symtab_sizes , 16, 16
+#define mls_index_f ,sens_index, cat_index
+#define mls_destroy_f ,sens_destroy, cat_destroy
+#define mls_read_f ,sens_read, cat_read
+#define mls_write_f ,sens_write, cat_write
+#define mls_policydb_index_others(p) printk(", %d levels", p->nlevels);
+
+#define mls_set_config(config) config |= POLICYDB_CONFIG_MLS
+
+void mls_user_destroy(struct user_datum *usrdatum);
+int mls_read_range(struct context *c, void *fp);
+int mls_read_perm(struct perm_datum *perdatum, void *fp);
+int mls_read_class(struct class_datum *cladatum, void *fp);
+int mls_read_user(struct user_datum *usrdatum, void *fp);
+int mls_read_nlevels(struct policydb *p, void *fp);
+int mls_read_trusted(struct policydb *p, void *fp);
+
+#else
+
+#define mls_compute_av(scontext, tcontext, tclass_datum, allowed)
+#define mls_compute_context_len(context) 0
+#define mls_sid_to_context(context, scontextpp)
+#define mls_context_isvalid(p, c) 1
+#define mls_context_to_sid(oldc, context_str, context) 0
+#define mls_convert_context(oldp, newp, c) 0
+#define mls_compute_sid(scontext, tcontext, tclass, specified, newcontextp) 0
+#define mls_for_user_ranges(user, usercon)
+#define mls_end_user_ranges
+#define mls_symtab_names
+#define mls_symtab_sizes
+#define mls_index_f
+#define mls_destroy_f
+#define mls_read_f
+#define mls_write_f
+#define mls_policydb_index_others(p)
+#define mls_set_config(config)
+#define mls_user_destroy(usrdatum)
+#define mls_read_range(c, fp) 0
+#define mls_read_perm(p, fp) 0
+#define mls_read_class(c, fp) 0
+#define mls_read_user(u, fp) 0
+#define mls_read_nlevels(p, fp) 0
+#define mls_read_trusted(p, fp) 0
+
+#endif
+
+#endif /* _SS_MLS_H */
+
diff -Nru a/security/selinux/ss/mls_types.h b/security/selinux/ss/mls_types.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/mls_types.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,58 @@
+/*
+ * Type definitions for the multi-level security (MLS) policy.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_MLS_TYPES_H_
+#define _SS_MLS_TYPES_H_
+
+struct mls_level {
+ u32 sens; /* sensitivity */
+ struct ebitmap cat; /* category set */
+};
+
+struct mls_range {
+ struct mls_level level[2]; /* low == level[0], high == level[1] */
+};
+
+struct mls_range_list {
+ struct mls_range range;
+ struct mls_range_list *next;
+};
+
+#define MLS_RELATION_DOM 1 /* source dominates */
+#define MLS_RELATION_DOMBY 2 /* target dominates */
+#define MLS_RELATION_EQ 4 /* source and target are equivalent */
+#define MLS_RELATION_INCOMP 8 /* source and target are incomparable */
+
+#define mls_level_eq(l1,l2) \
+(((l1).sens == (l2).sens) && ebitmap_cmp(&(l1).cat,&(l2).cat))
+
+#define mls_level_relation(l1,l2) ( \
+(((l1).sens == (l2).sens) && ebitmap_cmp(&(l1).cat,&(l2).cat)) ? \
+ MLS_RELATION_EQ : \
+(((l1).sens >= (l2).sens) && ebitmap_contains(&(l1).cat, &(l2).cat)) ? \
+ MLS_RELATION_DOM : \
+(((l2).sens >= (l1).sens) && ebitmap_contains(&(l2).cat, &(l1).cat)) ? \
+ MLS_RELATION_DOMBY : \
+ MLS_RELATION_INCOMP )
+
+#define mls_range_contains(r1,r2) \
+((mls_level_relation((r1).level[0], (r2).level[0]) & \
+ (MLS_RELATION_EQ | MLS_RELATION_DOMBY)) && \
+ (mls_level_relation((r1).level[1], (r2).level[1]) & \
+ (MLS_RELATION_EQ | MLS_RELATION_DOM)))
+
+/*
+ * Every access vector permission is mapped to a set of MLS base
+ * permissions, based on the flow properties of the corresponding
+ * operation.
+ */
+struct mls_perms {
+ u32 read; /* permissions that map to `read' */
+ u32 readby; /* permissions that map to `readby' */
+ u32 write; /* permissions that map to `write' */
+ u32 writeby; /* permissions that map to `writeby' */
+};
+
+#endif /* _SS_MLS_TYPES_H_ */
diff -Nru a/security/selinux/ss/policydb.c b/security/selinux/ss/policydb.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/policydb.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,1429 @@
+/*
+ * Implementation of the policy database.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "policydb.h"
+#include "mls.h"
+
+#define _DEBUG_HASHES
+
+#ifdef DEBUG_HASHES
+static char *symtab_name[SYM_NUM] = {
+ "common prefixes",
+ "classes",
+ "roles",
+ "types",
+ "users"
+ mls_symtab_names
+};
+#endif
+
+static unsigned int symtab_sizes[SYM_NUM] = {
+ 2,
+ 32,
+ 16,
+ 512,
+ 128
+ mls_symtab_sizes
+};
+
+/*
+ * Initialize the role table.
+ */
+int roles_init(struct policydb *p)
+{
+ char *key = 0;
+ int rc;
+ struct role_datum *role;
+
+ role = kmalloc(sizeof(*role), GFP_KERNEL);
+ if (!role) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(role, 0, sizeof(*role));
+ role->value = ++p->p_roles.nprim;
+ if (role->value != OBJECT_R_VAL) {
+ rc = -EINVAL;
+ goto out_free_role;
+ }
+ key = kmalloc(strlen(OBJECT_R)+1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto out_free_role;
+ }
+ strcpy(key, OBJECT_R);
+ rc = hashtab_insert(p->p_roles.table, key, role);
+ if (rc)
+ goto out_free_key;
+out:
+ return rc;
+
+out_free_key:
+ kfree(key);
+out_free_role:
+ kfree(role);
+ goto out;
+}
+
+/*
+ * Initialize a policy database structure.
+ */
+int policydb_init(struct policydb *p)
+{
+ int i, rc;
+
+ memset(p, 0, sizeof(*p));
+
+ for (i = 0; i < SYM_NUM; i++) {
+ rc = symtab_init(&p->symtab[i], symtab_sizes[i]);
+ if (rc)
+ goto out_free_symtab;
+ }
+
+ rc = avtab_init(&p->te_avtab);
+ if (rc)
+ goto out_free_symtab;
+
+ rc = roles_init(p);
+ if (rc)
+ goto out_free_avtab;
+
+out:
+ return rc;
+
+out_free_avtab:
+ avtab_destroy(&p->te_avtab);
+
+out_free_symtab:
+ for (i = 0; i < SYM_NUM; i++)
+ hashtab_destroy(p->symtab[i].table);
+ goto out;
+}
+
+/*
+ * The following *_index functions are used to
+ * define the val_to_name and val_to_struct arrays
+ * in a policy database structure. The val_to_name
+ * arrays are used when converting security context
+ * structures into string representations. The
+ * val_to_struct arrays are used when the attributes
+ * of a class, role, or user are needed.
+ */
+
+static int common_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct common_datum *comdatum;
+
+ comdatum = datum;
+ p = datap;
+ p->p_common_val_to_name[comdatum->value - 1] = key;
+ return 0;
+}
+
+static int class_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct class_datum *cladatum;
+
+ cladatum = datum;
+ p = datap;
+ p->p_class_val_to_name[cladatum->value - 1] = key;
+ p->class_val_to_struct[cladatum->value - 1] = cladatum;
+ return 0;
+}
+
+static int role_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct role_datum *role;
+
+ role = datum;
+ p = datap;
+ p->p_role_val_to_name[role->value - 1] = key;
+ p->role_val_to_struct[role->value - 1] = role;
+ return 0;
+}
+
+static int type_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct type_datum *typdatum;
+
+ typdatum = datum;
+ p = datap;
+
+ if (typdatum->primary)
+ p->p_type_val_to_name[typdatum->value - 1] = key;
+
+ return 0;
+}
+
+static int user_index(void *key, void *datum, void *datap)
+{
+ struct policydb *p;
+ struct user_datum *usrdatum;
+
+ usrdatum = datum;
+ p = datap;
+ p->p_user_val_to_name[usrdatum->value - 1] = key;
+ p->user_val_to_struct[usrdatum->value - 1] = usrdatum;
+ return 0;
+}
+
+static int (*index_f[SYM_NUM]) (void *key, void *datum, void *datap) =
+{
+ common_index,
+ class_index,
+ role_index,
+ type_index,
+ user_index
+ mls_index_f
+};
+
+/*
+ * Define the common val_to_name array and the class
+ * val_to_name and val_to_struct arrays in a policy
+ * database structure.
+ *
+ * Caller must clean up upon failure.
+ */
+int policydb_index_classes(struct policydb *p)
+{
+ int rc;
+
+ p->p_common_val_to_name =
+ kmalloc(p->p_commons.nprim * sizeof(char *), GFP_KERNEL);
+ if (!p->p_common_val_to_name) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ rc = hashtab_map(p->p_commons.table, common_index, p);
+ if (rc)
+ goto out;
+
+ p->class_val_to_struct =
+ kmalloc(p->p_classes.nprim * sizeof(*(p->class_val_to_struct)), GFP_KERNEL);
+ if (!p->class_val_to_struct) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ p->p_class_val_to_name =
+ kmalloc(p->p_classes.nprim * sizeof(char *), GFP_KERNEL);
+ if (!p->p_class_val_to_name) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ rc = hashtab_map(p->p_classes.table, class_index, p);
+out:
+ return rc;
+}
+
+#ifdef DEBUG_HASHES
+static void symtab_hash_eval(struct symtab *s)
+{
+ int i;
+
+ for (i = 0; i < SYM_NUM; i++) {
+ struct hashtab *h = s[i].table;
+ struct hashtab_info info;
+
+ hashtab_stat(h, &info);
+ printk(KERN_INFO "%s: %d entries and %d/%d buckets used, "
+ "longest chain length %d\n", symtab_name[i], h->nel,
+ info.slots_used, h->size, info.max_chain_len);
+ }
+}
+#endif
+
+/*
+ * Define the other val_to_name and val_to_struct arrays
+ * in a policy database structure.
+ *
+ * Caller must clean up on failure.
+ */
+int policydb_index_others(struct policydb *p)
+{
+ int i, rc = 0;
+
+ printk(KERN_INFO "security: %d users, %d roles, %d types",
+ p->p_users.nprim, p->p_roles.nprim, p->p_types.nprim);
+ mls_policydb_index_others(p);
+ printk("\n");
+
+ printk(KERN_INFO "security: %d classes, %d rules\n",
+ p->p_classes.nprim, p->te_avtab.nel);
+
+#ifdef DEBUG_HASHES
+ avtab_hash_eval(&p->te_avtab, "rules");
+ symtab_hash_eval(p->symtab);
+#endif
+
+ p->role_val_to_struct =
+ kmalloc(p->p_roles.nprim * sizeof(*(p->role_val_to_struct)),
+ GFP_KERNEL);
+ if (!p->role_val_to_struct) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ p->user_val_to_struct =
+ kmalloc(p->p_users.nprim * sizeof(*(p->user_val_to_struct)),
+ GFP_KERNEL);
+ if (!p->user_val_to_struct) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ for (i = SYM_ROLES; i < SYM_NUM; i++) {
+ p->sym_val_to_name[i] =
+ kmalloc(p->symtab[i].nprim * sizeof(char *), GFP_KERNEL);
+ if (!p->sym_val_to_name[i]) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ rc = hashtab_map(p->symtab[i].table, index_f[i], p);
+ if (rc)
+ goto out;
+ }
+
+out:
+ return rc;
+}
+
+/*
+ * The following *_destroy functions are used to
+ * free any memory allocated for each kind of
+ * symbol data in the policy database.
+ */
+
+static int perm_destroy(void *key, void *datum, void *p)
+{
+ kfree(key);
+ kfree(datum);
+ return 0;
+}
+
+static int common_destroy(void *key, void *datum, void *p)
+{
+ struct common_datum *comdatum;
+
+ kfree(key);
+ comdatum = datum;
+ hashtab_map(comdatum->permissions.table, perm_destroy, 0);
+ hashtab_destroy(comdatum->permissions.table);
+ kfree(datum);
+ return 0;
+}
+
+static int class_destroy(void *key, void *datum, void *p)
+{
+ struct class_datum *cladatum;
+ struct constraint_node *constraint, *ctemp;
+ struct constraint_expr *e, *etmp;
+
+ kfree(key);
+ cladatum = datum;
+ hashtab_map(cladatum->permissions.table, perm_destroy, 0);
+ hashtab_destroy(cladatum->permissions.table);
+ constraint = cladatum->constraints;
+ while (constraint) {
+ e = constraint->expr;
+ while (e) {
+ ebitmap_destroy(&e->names);
+ etmp = e;
+ e = e->next;
+ kfree(etmp);
+ }
+ ctemp = constraint;
+ constraint = constraint->next;
+ kfree(ctemp);
+ }
+ kfree(cladatum->comkey);
+ kfree(datum);
+ return 0;
+}
+
+static int role_destroy(void *key, void *datum, void *p)
+{
+ struct role_datum *role;
+
+ kfree(key);
+ role = datum;
+ ebitmap_destroy(&role->dominates);
+ ebitmap_destroy(&role->types);
+ kfree(datum);
+ return 0;
+}
+
+static int type_destroy(void *key, void *datum, void *p)
+{
+ kfree(key);
+ kfree(datum);
+ return 0;
+}
+
+static int user_destroy(void *key, void *datum, void *p)
+{
+ struct user_datum *usrdatum;
+
+ kfree(key);
+ usrdatum = datum;
+ ebitmap_destroy(&usrdatum->roles);
+ mls_user_destroy(usrdatum);
+ kfree(datum);
+ return 0;
+}
+
+static int (*destroy_f[SYM_NUM]) (void *key, void *datum, void *datap) =
+{
+ common_destroy,
+ class_destroy,
+ role_destroy,
+ type_destroy,
+ user_destroy
+ mls_destroy_f
+};
+
+/*
+ * Free any memory allocated by a policy database structure.
+ */
+void policydb_destroy(struct policydb *p)
+{
+ struct ocontext *c, *ctmp;
+ struct genfs *g, *gtmp;
+ int i;
+
+ for (i = 0; i < SYM_NUM; i++) {
+ hashtab_map(p->symtab[i].table, destroy_f[i], 0);
+ hashtab_destroy(p->symtab[i].table);
+ }
+
+ for (i = 0; i < SYM_NUM; i++) {
+ if (p->sym_val_to_name[i])
+ kfree(p->sym_val_to_name[i]);
+ }
+
+ if (p->class_val_to_struct)
+ kfree(p->class_val_to_struct);
+ if (p->role_val_to_struct)
+ kfree(p->role_val_to_struct);
+ if (p->user_val_to_struct)
+ kfree(p->user_val_to_struct);
+
+ avtab_destroy(&p->te_avtab);
+
+ for (i = 0; i < OCON_NUM; i++) {
+ c = p->ocontexts[i];
+ while (c) {
+ ctmp = c;
+ c = c->next;
+ context_destroy(&ctmp->context[0]);
+ context_destroy(&ctmp->context[1]);
+ if (i == OCON_ISID || i == OCON_FS ||
+ i == OCON_NETIF || i == OCON_FSUSE)
+ kfree(ctmp->u.name);
+ kfree(ctmp);
+ }
+ }
+
+ g = p->genfs;
+ while (g) {
+ kfree(g->fstype);
+ c = g->head;
+ while (c) {
+ ctmp = c;
+ c = c->next;
+ context_destroy(&ctmp->context[0]);
+ kfree(ctmp->u.name);
+ kfree(ctmp);
+ }
+ gtmp = g;
+ g = g->next;
+ kfree(gtmp);
+ }
+
+ return;
+}
+
+/*
+ * Load the initial SIDs specified in a policy database
+ * structure into a SID table.
+ */
+int policydb_load_isids(struct policydb *p, struct sidtab *s)
+{
+ struct ocontext *head, *c;
+ int rc;
+
+ rc = sidtab_init(s);
+ if (rc) {
+ printk(KERN_ERR "security: out of memory on SID table init\n");
+ goto out;
+ }
+
+ head = p->ocontexts[OCON_ISID];
+ for (c = head; c; c = c->next) {
+ if (!c->context[0].user) {
+ printk(KERN_ERR "security: SID %s was never "
+ "defined.\n", c->u.name);
+ rc = -EINVAL;
+ goto out;
+ }
+ if (sidtab_insert(s, c->sid[0], &c->context[0])) {
+ printk(KERN_ERR "security: unable to load initial "
+ "SID %s.\n", c->u.name);
+ rc = -EINVAL;
+ goto out;
+ }
+ }
+out:
+ return rc;
+}
+
+/*
+ * Return 1 if the fields in the security context
+ * structure `c' are valid. Return 0 otherwise.
+ */
+int policydb_context_isvalid(struct policydb *p, struct context *c)
+{
+ struct role_datum *role;
+ struct user_datum *usrdatum;
+
+ /*
+ * Role must be authorized for the type.
+ */
+ if (!c->role || c->role > p->p_roles.nprim)
+ return 0;
+
+ if (c->role != OBJECT_R_VAL) {
+ role = p->role_val_to_struct[c->role - 1];
+ if (!ebitmap_get_bit(&role->types,
+ c->type - 1))
+ /* role may not be associated with type */
+ return 0;
+
+ /*
+ * User must be authorized for the role.
+ */
+ if (!c->user || c->user > p->p_users.nprim)
+ return 0;
+ usrdatum = p->user_val_to_struct[c->user - 1];
+ if (!usrdatum)
+ return 0;
+
+ if (!ebitmap_get_bit(&usrdatum->roles,
+ c->role - 1))
+ /* user may not be associated with role */
+ return 0;
+ }
+
+ if (!mls_context_isvalid(p, c))
+ return 0;
+
+ return 1;
+}
+
+/*
+ * Read and validate a security context structure
+ * from a policydb binary representation file.
+ */
+static int context_read_and_validate(struct context *c,
+ struct policydb *p,
+ void *fp)
+{
+ u32 *buf;
+ int rc = 0;
+
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf) {
+ printk(KERN_ERR "security: context truncated\n");
+ rc = -EINVAL;
+ goto out;
+ }
+ c->user = le32_to_cpu(buf[0]);
+ c->role = le32_to_cpu(buf[1]);
+ c->type = le32_to_cpu(buf[2]);
+ if (mls_read_range(c, fp)) {
+ printk(KERN_ERR "security: error reading MLS range of "
+ "context\n");
+ rc = -EINVAL;
+ goto out;
+ }
+
+ if (!policydb_context_isvalid(p, c)) {
+ printk(KERN_ERR "security: invalid security context\n");
+ context_destroy(c);
+ rc = -EINVAL;
+ }
+out:
+ return rc;
+}
+
+/*
+ * The following *_read functions are used to
+ * read the symbol data from a policy database
+ * binary representation file.
+ */
+
+static int perm_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct perm_datum *perdatum;
+ int rc;
+ u32 *buf, len;
+
+ perdatum = kmalloc(sizeof(*perdatum), GFP_KERNEL);
+ if (!perdatum) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(perdatum, 0, sizeof(*perdatum));
+
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ perdatum->value = le32_to_cpu(buf[1]);
+ rc = mls_read_perm(perdatum, fp);
+ if (rc)
+ goto bad;
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ rc = hashtab_insert(h, key, perdatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ perm_destroy(key, perdatum, NULL);
+ goto out;
+}
+
+static int common_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct common_datum *comdatum;
+ u32 *buf, len, nel;
+ int i, rc;
+
+ comdatum = kmalloc(sizeof(*comdatum), GFP_KERNEL);
+ if (!comdatum) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(comdatum, 0, sizeof(*comdatum));
+
+ buf = next_entry(fp, sizeof(u32)*4);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ comdatum->value = le32_to_cpu(buf[1]);
+
+ rc = symtab_init(&comdatum->permissions, PERM_SYMTAB_SIZE);
+ if (rc)
+ goto bad;
+ comdatum->permissions.nprim = le32_to_cpu(buf[2]);
+ nel = le32_to_cpu(buf[3]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ for (i = 0; i < nel; i++) {
+ rc = perm_read(p, comdatum->permissions.table, fp);
+ if (rc)
+ goto bad;
+ }
+
+ rc = hashtab_insert(h, key, comdatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ common_destroy(key, comdatum, NULL);
+ goto out;
+}
+
+static int class_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct class_datum *cladatum;
+ struct constraint_node *c, *lc;
+ struct constraint_expr *e, *le;
+ u32 *buf, len, len2, ncons, nexpr, nel;
+ int i, j, depth, rc;
+
+ cladatum = kmalloc(sizeof(*cladatum), GFP_KERNEL);
+ if (!cladatum) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(cladatum, 0, sizeof(*cladatum));
+
+ buf = next_entry(fp, sizeof(u32)*6);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ len2 = le32_to_cpu(buf[1]);
+ cladatum->value = le32_to_cpu(buf[2]);
+
+ rc = symtab_init(&cladatum->permissions, PERM_SYMTAB_SIZE);
+ if (rc)
+ goto bad;
+ cladatum->permissions.nprim = le32_to_cpu(buf[3]);
+ nel = le32_to_cpu(buf[4]);
+
+ ncons = le32_to_cpu(buf[5]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ if (len2) {
+ cladatum->comkey = kmalloc(len2 + 1,GFP_KERNEL);
+ if (!cladatum->comkey) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ buf = next_entry(fp, len2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ memcpy(cladatum->comkey, buf, len2);
+ cladatum->comkey[len2] = 0;
+
+ cladatum->comdatum = hashtab_search(p->p_commons.table,
+ cladatum->comkey);
+ if (!cladatum->comdatum) {
+ printk(KERN_ERR "security: unknown common %s\n",
+ cladatum->comkey);
+ rc = -EINVAL;
+ goto bad;
+ }
+ }
+ for (i = 0; i < nel; i++) {
+ rc = perm_read(p, cladatum->permissions.table, fp);
+ if (rc)
+ goto bad;
+ }
+
+ lc = NULL;
+ rc = -EINVAL;
+ for (i = 0; i < ncons; i++) {
+ c = kmalloc(sizeof(*c), GFP_KERNEL);
+ if (!c) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(c, 0, sizeof(*c));
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf)
+ goto bad;
+ c->permissions = le32_to_cpu(buf[0]);
+ nexpr = le32_to_cpu(buf[1]);
+ le = NULL;
+ depth = -1;
+ for (j = 0; j < nexpr; j++) {
+ e = kmalloc(sizeof(*e), GFP_KERNEL);
+ if (!e) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(e, 0, sizeof(*e));
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf) {
+ kfree(e);
+ goto bad;
+ }
+ e->expr_type = le32_to_cpu(buf[0]);
+ e->attr = le32_to_cpu(buf[1]);
+ e->op = le32_to_cpu(buf[2]);
+
+ switch (e->expr_type) {
+ case CEXPR_NOT:
+ if (depth < 0) {
+ kfree(e);
+ goto bad;
+ }
+ break;
+ case CEXPR_AND:
+ case CEXPR_OR:
+ if (depth < 1) {
+ kfree(e);
+ goto bad;
+ }
+ depth--;
+ break;
+ case CEXPR_ATTR:
+ if (depth == (CEXPR_MAXDEPTH-1)) {
+ kfree(e);
+ goto bad;
+ }
+ depth++;
+ break;
+ case CEXPR_NAMES:
+ if (depth == (CEXPR_MAXDEPTH-1)) {
+ kfree(e);
+ goto bad;
+ }
+ depth++;
+ if (ebitmap_read(&e->names, fp)) {
+ kfree(e);
+ goto bad;
+ }
+ break;
+ default:
+ kfree(e);
+ goto bad;
+ break;
+ }
+ if (le) {
+ le->next = e;
+ } else {
+ c->expr = e;
+ }
+ le = e;
+ }
+ if (depth != 0)
+ goto bad;
+ if (lc) {
+ lc->next = c;
+ } else {
+ cladatum->constraints = c;
+ }
+ lc = c;
+ }
+
+ rc = mls_read_class(cladatum, fp);
+ if (rc)
+ goto bad;
+
+ rc = hashtab_insert(h, key, cladatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ class_destroy(key, cladatum, NULL);
+ goto out;
+}
+
+static int role_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct role_datum *role;
+ int rc;
+ u32 *buf, len;
+
+ role = kmalloc(sizeof(*role), GFP_KERNEL);
+ if (!role) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(role, 0, sizeof(*role));
+
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ role->value = le32_to_cpu(buf[1]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ rc = ebitmap_read(&role->dominates, fp);
+ if (rc)
+ goto bad;
+
+ rc = ebitmap_read(&role->types, fp);
+ if (rc)
+ goto bad;
+
+ if (strcmp(key, OBJECT_R) == 0) {
+ if (role->value != OBJECT_R_VAL) {
+ printk(KERN_ERR "Role %s has wrong value %d\n",
+ OBJECT_R, role->value);
+ rc = -EINVAL;
+ goto bad;
+ }
+ rc = 0;
+ goto bad;
+ }
+
+ rc = hashtab_insert(h, key, role);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ role_destroy(key, role, NULL);
+ goto out;
+}
+
+static int type_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct type_datum *typdatum;
+ int rc;
+ u32 *buf, len;
+
+ typdatum = kmalloc(sizeof(*typdatum),GFP_KERNEL);
+ if (!typdatum) {
+ rc = -ENOMEM;
+ return rc;
+ }
+ memset(typdatum, 0, sizeof(*typdatum));
+
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ typdatum->value = le32_to_cpu(buf[1]);
+ typdatum->primary = le32_to_cpu(buf[2]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ rc = hashtab_insert(h, key, typdatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ type_destroy(key, typdatum, NULL);
+ goto out;
+}
+
+static int user_read(struct policydb *p, struct hashtab *h, void *fp)
+{
+ char *key = 0;
+ struct user_datum *usrdatum;
+ int rc;
+ u32 *buf, len;
+
+
+ usrdatum = kmalloc(sizeof(*usrdatum), GFP_KERNEL);
+ if (!usrdatum) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset(usrdatum, 0, sizeof(*usrdatum));
+
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+
+ len = le32_to_cpu(buf[0]);
+ usrdatum->value = le32_to_cpu(buf[1]);
+
+ buf = next_entry(fp, len);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ key = kmalloc(len + 1,GFP_KERNEL);
+ if (!key) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(key, buf, len);
+ key[len] = 0;
+
+ rc = ebitmap_read(&usrdatum->roles, fp);
+ if (rc)
+ goto bad;
+
+ rc = mls_read_user(usrdatum, fp);
+ if (rc)
+ goto bad;
+
+ rc = hashtab_insert(h, key, usrdatum);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ user_destroy(key, usrdatum, NULL);
+ goto out;
+}
+
+static int (*read_f[SYM_NUM]) (struct policydb *p, struct hashtab *h, void *fp) =
+{
+ common_read,
+ class_read,
+ role_read,
+ type_read,
+ user_read
+ mls_read_f
+};
+
+#define mls_config(x) \
+ ((x) & POLICYDB_CONFIG_MLS) ? "mls" : "no_mls"
+
+/*
+ * Read the configuration data from a policy database binary
+ * representation file into a policy database structure.
+ */
+int policydb_read(struct policydb *p, void *fp)
+{
+ struct role_allow *ra, *lra;
+ struct role_trans *tr, *ltr;
+ struct ocontext *l, *c, *newc;
+ struct genfs *genfs_p, *genfs, *newgenfs;
+ int i, j, rc;
+ u32 *buf, len, len2, config, nprim, nel, nel2;
+ char *policydb_str;
+
+ config = 0;
+ mls_set_config(config);
+
+ rc = policydb_init(p);
+ if (rc)
+ goto out;
+
+ rc = -EINVAL;
+ /* Read the magic number and string length. */
+ buf = next_entry(fp, sizeof(u32)* 2);
+ if (!buf)
+ goto bad;
+
+ for (i = 0; i < 2; i++)
+ buf[i] = le32_to_cpu(buf[i]);
+
+ if (buf[0] != POLICYDB_MAGIC) {
+ printk(KERN_ERR "security: policydb magic number 0x%x does "
+ "not match expected magic number 0x%x\n",
+ buf[0], POLICYDB_MAGIC);
+ goto bad;
+ }
+
+ len = buf[1];
+ if (len != strlen(POLICYDB_STRING)) {
+ printk(KERN_ERR "security: policydb string length %d does not "
+ "match expected length %d\n",
+ len, strlen(POLICYDB_STRING));
+ goto bad;
+ }
+ buf = next_entry(fp, len);
+ if (!buf) {
+ printk(KERN_ERR "security: truncated policydb string identifier\n");
+ goto bad;
+ }
+ policydb_str = kmalloc(len + 1,GFP_KERNEL);
+ if (!policydb_str) {
+ printk(KERN_ERR "security: unable to allocate memory for policydb "
+ "string of length %d\n", len);
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(policydb_str, buf, len);
+ policydb_str[len] = 0;
+ if (strcmp(policydb_str, POLICYDB_STRING)) {
+ printk(KERN_ERR "security: policydb string %s does not match "
+ "my string %s\n", policydb_str, POLICYDB_STRING);
+ kfree(policydb_str);
+ goto bad;
+ }
+ /* Done with policydb_str. */
+ kfree(policydb_str);
+ policydb_str = NULL;
+
+ /* Read the version, config, and table sizes. */
+ buf = next_entry(fp, sizeof(u32)*4);
+ if (!buf)
+ goto bad;
+ for (i = 0; i < 4; i++)
+ buf[i] = le32_to_cpu(buf[i]);
+
+ if (buf[0] != POLICYDB_VERSION) {
+ printk(KERN_ERR "security: policydb version %d does not match "
+ "my version %d\n", buf[0], POLICYDB_VERSION);
+ goto bad;
+ }
+ if (buf[1] != config) {
+ printk(KERN_ERR "security: policydb configuration (%s) does "
+ "not match my configuration (%s)\n",
+ mls_config(buf[1]),
+ mls_config(config));
+ goto bad;
+ }
+ if (buf[2] != SYM_NUM || buf[3] != OCON_NUM) {
+ printk(KERN_ERR "security: policydb table sizes (%d,%d) do "
+ "not match mine (%d,%d)\n",
+ buf[2], buf[3], SYM_NUM, OCON_NUM);
+ goto bad;
+ }
+
+ rc = mls_read_nlevels(p, fp);
+ if (rc)
+ goto bad;
+
+ for (i = 0; i < SYM_NUM; i++) {
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ nprim = le32_to_cpu(buf[0]);
+ nel = le32_to_cpu(buf[1]);
+ for (j = 0; j < nel; j++) {
+ rc = read_f[i](p, p->symtab[i].table, fp);
+ if (rc)
+ goto bad;
+ }
+
+ p->symtab[i].nprim = nprim;
+ }
+
+ rc = avtab_read(&p->te_avtab, fp, config);
+ if (rc)
+ goto bad;
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ nel = le32_to_cpu(buf[0]);
+ ltr = NULL;
+ for (i = 0; i < nel; i++) {
+ tr = kmalloc(sizeof(*tr), GFP_KERNEL);
+ if (!tr) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(tr, 0, sizeof(*tr));
+ if (ltr) {
+ ltr->next = tr;
+ } else {
+ p->role_tr = tr;
+ }
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ tr->role = le32_to_cpu(buf[0]);
+ tr->type = le32_to_cpu(buf[1]);
+ tr->new_role = le32_to_cpu(buf[2]);
+ ltr = tr;
+ }
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ nel = le32_to_cpu(buf[0]);
+ lra = NULL;
+ for (i = 0; i < nel; i++) {
+ ra = kmalloc(sizeof(*ra), GFP_KERNEL);
+ if (!ra) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(ra, 0, sizeof(*ra));
+ if (lra) {
+ lra->next = ra;
+ } else {
+ p->role_allow = ra;
+ }
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ ra->role = le32_to_cpu(buf[0]);
+ ra->new_role = le32_to_cpu(buf[1]);
+ lra = ra;
+ }
+
+ rc = policydb_index_classes(p);
+ if (rc)
+ goto bad;
+
+ rc = policydb_index_others(p);
+ if (rc)
+ goto bad;
+
+ for (i = 0; i < OCON_NUM; i++) {
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ nel = le32_to_cpu(buf[0]);
+ l = NULL;
+ for (j = 0; j < nel; j++) {
+ c = kmalloc(sizeof(*c), GFP_KERNEL);
+ if (!c) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(c, 0, sizeof(*c));
+ if (l) {
+ l->next = c;
+ } else {
+ p->ocontexts[i] = c;
+ }
+ l = c;
+ rc = -EINVAL;
+ switch (i) {
+ case OCON_ISID:
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto bad;
+ c->sid[0] = le32_to_cpu(buf[0]);
+ rc = context_read_and_validate(&c->context[0], p, fp);
+ if (rc)
+ goto bad;
+ break;
+ case OCON_FS:
+ case OCON_NETIF:
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto bad;
+ len = le32_to_cpu(buf[0]);
+ buf = next_entry(fp, len);
+ if (!buf)
+ goto bad;
+ c->u.name = kmalloc(len + 1,GFP_KERNEL);
+ if (!c->u.name) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(c->u.name, buf, len);
+ c->u.name[len] = 0;
+ rc = context_read_and_validate(&c->context[0], p, fp);
+ if (rc)
+ goto bad;
+ rc = context_read_and_validate(&c->context[1], p, fp);
+ if (rc)
+ goto bad;
+ break;
+ case OCON_PORT:
+ buf = next_entry(fp, sizeof(u32)*3);
+ if (!buf)
+ goto bad;
+ c->u.port.protocol = le32_to_cpu(buf[0]);
+ c->u.port.low_port = le32_to_cpu(buf[1]);
+ c->u.port.high_port = le32_to_cpu(buf[2]);
+ rc = context_read_and_validate(&c->context[0], p, fp);
+ if (rc)
+ goto bad;
+ break;
+ case OCON_NODE:
+ buf = next_entry(fp, sizeof(u32)* 2);
+ if (!buf)
+ goto bad;
+ c->u.node.addr = le32_to_cpu(buf[0]);
+ c->u.node.mask = le32_to_cpu(buf[1]);
+ rc = context_read_and_validate(&c->context[0], p, fp);
+ if (rc)
+ goto bad;
+ break;
+ case OCON_FSUSE:
+ buf = next_entry(fp, sizeof(u32)*2);
+ if (!buf)
+ goto bad;
+ c->v.behavior = le32_to_cpu(buf[0]);
+ len = le32_to_cpu(buf[1]);
+ buf = next_entry(fp, len);
+ if (!buf)
+ goto bad;
+ c->u.name = kmalloc(len + 1,GFP_KERNEL);
+ if (!c->u.name) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(c->u.name, buf, len);
+ c->u.name[len] = 0;
+ rc = context_read_and_validate(&c->context[0], p, fp);
+ if (rc)
+ goto bad;
+ break;
+ }
+ }
+ }
+
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf) {
+ rc = -EINVAL;
+ goto bad;
+ }
+ nel = le32_to_cpu(buf[0]);
+ genfs_p = NULL;
+ rc = -EINVAL;
+ for (i = 0; i < nel; i++) {
+ newgenfs = kmalloc(sizeof(*newgenfs), GFP_KERNEL);
+ if (!newgenfs) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(newgenfs, 0, sizeof(*newgenfs));
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto bad;
+ len = le32_to_cpu(buf[0]);
+ buf = next_entry(fp, len);
+ if (!buf)
+ goto bad;
+ newgenfs->fstype = kmalloc(len + 1,GFP_KERNEL);
+ if (!newgenfs->fstype) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(newgenfs->fstype, buf, len);
+ newgenfs->fstype[len] = 0;
+ for (genfs_p = NULL, genfs = p->genfs; genfs;
+ genfs_p = genfs, genfs = genfs->next) {
+ if (strcmp(newgenfs->fstype, genfs->fstype) == 0) {
+ printk(KERN_ERR "security: dup genfs "
+ "fstype %s\n", newgenfs->fstype);
+ goto bad;
+ }
+ if (strcmp(newgenfs->fstype, genfs->fstype) < 0)
+ break;
+ }
+ newgenfs->next = genfs;
+ if (genfs_p)
+ genfs_p->next = newgenfs;
+ else
+ p->genfs = newgenfs;
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto bad;
+ nel2 = le32_to_cpu(buf[0]);
+ for (j = 0; j < nel2; j++) {
+ newc = kmalloc(sizeof(*newc), GFP_KERNEL);
+ if (!newc) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memset(newc, 0, sizeof(*newc));
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto bad;
+ len = le32_to_cpu(buf[0]);
+ buf = next_entry(fp, len);
+ if (!buf)
+ goto bad;
+ newc->u.name = kmalloc(len + 1,GFP_KERNEL);
+ if (!newc->u.name) {
+ rc = -ENOMEM;
+ goto bad;
+ }
+ memcpy(newc->u.name, buf, len);
+ newc->u.name[len] = 0;
+ buf = next_entry(fp, sizeof(u32));
+ if (!buf)
+ goto bad;
+ newc->v.sclass = le32_to_cpu(buf[0]);
+ if (context_read_and_validate(&newc->context[0], p, fp))
+ goto bad;
+ for (l = NULL, c = newgenfs->head; c;
+ l = c, c = c->next) {
+ if (!strcmp(newc->u.name, c->u.name) &&
+ (!c->v.sclass || !newc->v.sclass ||
+ newc->v.sclass == c->v.sclass)) {
+ printk(KERN_ERR "security: dup genfs "
+ "entry (%s,%s)\n",
+ newgenfs->fstype, c->u.name);
+ goto bad;
+ }
+ len = strlen(newc->u.name);
+ len2 = strlen(c->u.name);
+ if (len > len2)
+ break;
+ }
+ newc->next = c;
+ if (l)
+ l->next = newc;
+ else
+ newgenfs->head = newc;
+ }
+ }
+
+ rc = mls_read_trusted(p, fp);
+ if (rc)
+ goto bad;
+out:
+ return rc;
+bad:
+ policydb_destroy(p);
+ goto out;
+}
diff -Nru a/security/selinux/ss/policydb.h b/security/selinux/ss/policydb.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/policydb.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,256 @@
+/*
+ * A policy database (policydb) specifies the
+ * configuration data for the security policy.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_POLICYDB_H_
+#define _SS_POLICYDB_H_
+
+#include "symtab.h"
+#include "avtab.h"
+#include "sidtab.h"
+#include "context.h"
+#include "constraint.h"
+
+/*
+ * A datum type is defined for each kind of symbol
+ * in the configuration data: individual permissions,
+ * common prefixes for access vectors, classes,
+ * users, roles, types, sensitivities, categories, etc.
+ */
+
+/* Permission attributes */
+struct perm_datum {
+ u32 value; /* permission bit + 1 */
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+#define MLS_BASE_READ 1 /* MLS base permission `read' */
+#define MLS_BASE_WRITE 2 /* MLS base permission `write' */
+#define MLS_BASE_READBY 4 /* MLS base permission `readby' */
+#define MLS_BASE_WRITEBY 8 /* MLS base permission `writeby' */
+ u32 base_perms; /* MLS base permission mask */
+#endif
+};
+
+/* Attributes of a common prefix for access vectors */
+struct common_datum {
+ u32 value; /* internal common value */
+ struct symtab permissions; /* common permissions */
+};
+
+/* Class attributes */
+struct class_datum {
+ u32 value; /* class value */
+ char *comkey; /* common name */
+ struct common_datum *comdatum; /* common datum */
+ struct symtab permissions; /* class-specific permission symbol table */
+ struct constraint_node *constraints; /* constraints on class permissions */
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+ struct mls_perms mlsperms; /* MLS base permission masks */
+#endif
+};
+
+/* Role attributes */
+struct role_datum {
+ u32 value; /* internal role value */
+ struct ebitmap dominates; /* set of roles dominated by this role */
+ struct ebitmap types; /* set of authorized types for role */
+};
+
+struct role_trans {
+ u32 role; /* current role */
+ u32 type; /* program executable type */
+ u32 new_role; /* new role */
+ struct role_trans *next;
+};
+
+struct role_allow {
+ u32 role; /* current role */
+ u32 new_role; /* new role */
+ struct role_allow *next;
+};
+
+/* Type attributes */
+struct type_datum {
+ u32 value; /* internal type value */
+ unsigned char primary; /* primary name? */
+};
+
+/* User attributes */
+struct user_datum {
+ u32 value; /* internal user value */
+ struct ebitmap roles; /* set of authorized roles for user */
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+ struct mls_range_list *ranges; /* list of authorized MLS ranges for user */
+#endif
+};
+
+
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+/* Sensitivity attributes */
+struct level_datum {
+ struct mls_level *level; /* sensitivity and associated categories */
+ unsigned char isalias; /* is this sensitivity an alias for another? */
+};
+
+/* Category attributes */
+struct cat_datum {
+ u32 value; /* internal category bit + 1 */
+ unsigned char isalias; /* is this category an alias for another? */
+};
+#endif
+
+
+/*
+ * The configuration data includes security contexts for
+ * initial SIDs, unlabeled file systems, TCP and UDP port numbers,
+ * network interfaces, and nodes. This structure stores the
+ * relevant data for one such entry. Entries of the same kind
+ * (e.g. all initial SIDs) are linked together into a list.
+ */
+struct ocontext {
+ union {
+ char *name; /* name of initial SID, fs, netif, fstype, path */
+ struct {
+ u8 protocol;
+ u16 low_port;
+ u16 high_port;
+ } port; /* TCP or UDP port information */
+ struct {
+ u32 addr;
+ u32 mask;
+ } node; /* node information */
+ } u;
+ union {
+ u32 sclass; /* security class for genfs */
+ u32 behavior; /* labeling behavior for fs_use */
+ } v;
+ struct context context[2]; /* security context(s) */
+ u32 sid[2]; /* SID(s) */
+ struct ocontext *next;
+};
+
+struct genfs {
+ char *fstype;
+ struct ocontext *head;
+ struct genfs *next;
+};
+
+/* symbol table array indices */
+#define SYM_COMMONS 0
+#define SYM_CLASSES 1
+#define SYM_ROLES 2
+#define SYM_TYPES 3
+#define SYM_USERS 4
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+#define SYM_LEVELS 5
+#define SYM_CATS 6
+#define SYM_NUM 7
+#else
+#define SYM_NUM 5
+#endif
+
+/* object context array indices */
+#define OCON_ISID 0 /* initial SIDs */
+#define OCON_FS 1 /* unlabeled file systems */
+#define OCON_PORT 2 /* TCP and UDP port numbers */
+#define OCON_NETIF 3 /* network interfaces */
+#define OCON_NODE 4 /* nodes */
+#define OCON_FSUSE 5 /* fs_use */
+#define OCON_NUM 6
+
+/* The policy database */
+struct policydb {
+ /* symbol tables */
+ struct symtab symtab[SYM_NUM];
+#define p_commons symtab[SYM_COMMONS]
+#define p_classes symtab[SYM_CLASSES]
+#define p_roles symtab[SYM_ROLES]
+#define p_types symtab[SYM_TYPES]
+#define p_users symtab[SYM_USERS]
+#define p_levels symtab[SYM_LEVELS]
+#define p_cats symtab[SYM_CATS]
+
+ /* symbol names indexed by (value - 1) */
+ char **sym_val_to_name[SYM_NUM];
+#define p_common_val_to_name sym_val_to_name[SYM_COMMONS]
+#define p_class_val_to_name sym_val_to_name[SYM_CLASSES]
+#define p_role_val_to_name sym_val_to_name[SYM_ROLES]
+#define p_type_val_to_name sym_val_to_name[SYM_TYPES]
+#define p_user_val_to_name sym_val_to_name[SYM_USERS]
+#define p_sens_val_to_name sym_val_to_name[SYM_LEVELS]
+#define p_cat_val_to_name sym_val_to_name[SYM_CATS]
+
+ /* class, role, and user attributes indexed by (value - 1) */
+ struct class_datum **class_val_to_struct;
+ struct role_datum **role_val_to_struct;
+ struct user_datum **user_val_to_struct;
+
+ /* type enforcement access vectors and transitions */
+ struct avtab te_avtab;
+
+ /* role transitions */
+ struct role_trans *role_tr;
+
+ /* role allows */
+ struct role_allow *role_allow;
+
+ /* security contexts of initial SIDs, unlabeled file systems,
+ TCP or UDP port numbers, network interfaces and nodes */
+ struct ocontext *ocontexts[OCON_NUM];
+
+ /* security contexts for files in filesystems that cannot support
+ a persistent label mapping or use another
+ fixed labeling behavior. */
+ struct genfs *genfs;
+
+#ifdef CONFIG_SECURITY_SELINUX_MLS
+ /* number of legitimate MLS levels */
+ u32 nlevels;
+
+ struct ebitmap trustedreaders;
+ struct ebitmap trustedwriters;
+ struct ebitmap trustedobjects;
+#endif
+};
+
+extern int policydb_init(struct policydb *p);
+extern int policydb_index_classes(struct policydb *p);
+extern int policydb_index_others(struct policydb *p);
+extern int constraint_expr_destroy(struct constraint_expr *expr);
+extern void policydb_destroy(struct policydb *p);
+extern int policydb_load_isids(struct policydb *p, struct sidtab *s);
+extern int policydb_context_isvalid(struct policydb *p, struct context *c);
+extern int policydb_read(struct policydb *p, void *fp);
+
+#define PERM_SYMTAB_SIZE 32
+
+#define POLICYDB_VERSION 15
+#define POLICYDB_CONFIG_MLS 1
+
+#define OBJECT_R "object_r"
+#define OBJECT_R_VAL 1
+
+#define POLICYDB_MAGIC SELINUX_MAGIC
+#define POLICYDB_STRING "SE Linux"
+
+struct policy_file {
+ char *data;
+ size_t len;
+};
+
+static inline void *next_entry(struct policy_file *fp, size_t bytes)
+{
+ void *buf;
+
+ if (bytes > fp->len)
+ return NULL;
+
+ buf = fp->data;
+ fp->data += bytes;
+ fp->len -= bytes;
+ return buf;
+}
+
+#endif /* _SS_POLICYDB_H_ */
+
diff -Nru a/security/selinux/ss/services.c b/security/selinux/ss/services.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/services.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,1413 @@
+/*
+ * Implementation of the security services.
+ *
+ * Authors : Stephen Smalley, <sds@epoch.ncsc.mil>
+ * James Morris <jmorris@redhat.com>
+ *
+ * Copyright (C) 2003 Red Hat, Inc., James Morris <jmorris@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2,
+ * as published by the Free Software Foundation.
+ */
+#include "context.h"
+#include "policydb.h"
+#include "sidtab.h"
+#include "services.h"
+#include "mls.h"
+
+static rwlock_t policy_rwlock = RW_LOCK_UNLOCKED;
+#define POLICY_RDLOCK read_lock(&policy_rwlock)
+#define POLICY_WRLOCK write_lock_irq(&policy_rwlock)
+#define POLICY_RDUNLOCK read_unlock(&policy_rwlock)
+#define POLICY_WRUNLOCK write_unlock_irq(&policy_rwlock)
+
+static DECLARE_MUTEX(load_sem);
+#define LOAD_LOCK down(&load_sem)
+#define LOAD_UNLOCK up(&load_sem)
+
+struct sidtab sidtab;
+struct policydb policydb;
+int ss_initialized = 0;
+
+/*
+ * The largest sequence number that has been used when
+ * providing an access decision to the access vector cache.
+ * The sequence number only changes when a policy change
+ * occurs.
+ */
+static u32 latest_granting = 0;
+
+/*
+ * Return the boolean value of a constraint expression
+ * when it is applied to the specified source and target
+ * security contexts.
+ */
+static int constraint_expr_eval(struct context *scontext,
+ struct context *tcontext,
+ struct constraint_expr *cexpr)
+{
+ u32 val1, val2;
+ struct context *c;
+ struct role_datum *r1, *r2;
+ struct constraint_expr *e;
+ int s[CEXPR_MAXDEPTH];
+ int sp = -1;
+
+ for (e = cexpr; e; e = e->next) {
+ switch (e->expr_type) {
+ case CEXPR_NOT:
+ BUG_ON(sp < 0);
+ s[sp] = !s[sp];
+ break;
+ case CEXPR_AND:
+ BUG_ON(sp < 1);
+ sp--;
+ s[sp] &= s[sp+1];
+ break;
+ case CEXPR_OR:
+ BUG_ON(sp < 1);
+ sp--;
+ s[sp] |= s[sp+1];
+ break;
+ case CEXPR_ATTR:
+ if (sp == (CEXPR_MAXDEPTH-1))
+ return 0;
+ switch (e->attr) {
+ case CEXPR_USER:
+ val1 = scontext->user;
+ val2 = tcontext->user;
+ break;
+ case CEXPR_TYPE:
+ val1 = scontext->type;
+ val2 = tcontext->type;
+ break;
+ case CEXPR_ROLE:
+ val1 = scontext->role;
+ val2 = tcontext->role;
+ r1 = policydb.role_val_to_struct[val1 - 1];
+ r2 = policydb.role_val_to_struct[val2 - 1];
+ switch (e->op) {
+ case CEXPR_DOM:
+ s[++sp] = ebitmap_get_bit(&r1->dominates,
+ val2 - 1);
+ continue;
+ case CEXPR_DOMBY:
+ s[++sp] = ebitmap_get_bit(&r2->dominates,
+ val1 - 1);
+ continue;
+ case CEXPR_INCOMP:
+ s[++sp] = ( !ebitmap_get_bit(&r1->dominates,
+ val2 - 1) &&
+ !ebitmap_get_bit(&r2->dominates,
+ val1 - 1) );
+ continue;
+ default:
+ break;
+ }
+ break;
+ default:
+ BUG();
+ return 0;
+ }
+
+ switch (e->op) {
+ case CEXPR_EQ:
+ s[++sp] = (val1 == val2);
+ break;
+ case CEXPR_NEQ:
+ s[++sp] = (val1 != val2);
+ break;
+ default:
+ BUG();
+ return 0;
+ }
+ break;
+ case CEXPR_NAMES:
+ if (sp == (CEXPR_MAXDEPTH-1))
+ return 0;
+ c = scontext;
+ if (e->attr & CEXPR_TARGET)
+ c = tcontext;
+ if (e->attr & CEXPR_USER)
+ val1 = c->user;
+ else if (e->attr & CEXPR_ROLE)
+ val1 = c->role;
+ else if (e->attr & CEXPR_TYPE)
+ val1 = c->type;
+ else {
+ BUG();
+ return 0;
+ }
+
+ switch (e->op) {
+ case CEXPR_EQ:
+ s[++sp] = ebitmap_get_bit(&e->names, val1 - 1);
+ break;
+ case CEXPR_NEQ:
+ s[++sp] = !ebitmap_get_bit(&e->names, val1 - 1);
+ break;
+ default:
+ BUG();
+ return 0;
+ }
+ break;
+ default:
+ BUG();
+ return 0;
+ }
+ }
+
+ BUG_ON(sp != 0);
+ return s[0];
+}
+
+/*
+ * Compute access vectors based on a context structure pair for
+ * the permissions in a particular class.
+ */
+static int context_struct_compute_av(struct context *scontext,
+ struct context *tcontext,
+ u16 tclass,
+ u32 requested,
+ struct av_decision *avd)
+{
+ struct constraint_node *constraint;
+ struct role_allow *ra;
+ struct avtab_key avkey;
+ struct avtab_datum *avdatum;
+ struct class_datum *tclass_datum;
+
+ if (!tclass || tclass > policydb.p_classes.nprim) {
+ printk(KERN_ERR "security_compute_av: unrecognized class %d\n",
+ tclass);
+ return -EINVAL;
+ }
+ tclass_datum = policydb.class_val_to_struct[tclass - 1];
+
+ /*
+ * Initialize the access vectors to the default values.
+ */
+ avd->allowed = 0;
+ avd->decided = 0xffffffff;
+ avd->auditallow = 0;
+ avd->auditdeny = 0xffffffff;
+ avd->seqno = latest_granting;
+
+ /*
+ * If a specific type enforcement rule was defined for
+ * this permission check, then use it.
+ */
+ avkey.source_type = scontext->type;
+ avkey.target_type = tcontext->type;
+ avkey.target_class = tclass;
+ avdatum = avtab_search(&policydb.te_avtab, &avkey, AVTAB_AV);
+ if (avdatum) {
+ if (avdatum->specified & AVTAB_ALLOWED)
+ avd->allowed = avtab_allowed(avdatum);
+ if (avdatum->specified & AVTAB_AUDITDENY)
+ avd->auditdeny = avtab_auditdeny(avdatum);
+ if (avdatum->specified & AVTAB_AUDITALLOW)
+ avd->auditallow = avtab_auditallow(avdatum);
+ }
+
+ /*
+ * Remove any permissions prohibited by the MLS policy.
+ */
+ mls_compute_av(scontext, tcontext, tclass_datum, &avd->allowed);
+
+ /*
+ * Remove any permissions prohibited by a constraint.
+ */
+ constraint = tclass_datum->constraints;
+ while (constraint) {
+ if ((constraint->permissions & (avd->allowed)) &&
+ !constraint_expr_eval(scontext, tcontext,
+ constraint->expr)) {
+ avd->allowed = (avd->allowed) & ~(constraint->permissions);
+ }
+ constraint = constraint->next;
+ }
+
+ /*
+ * If checking process transition permission and the
+ * role is changing, then check the (current_role, new_role)
+ * pair.
+ */
+ if (tclass == SECCLASS_PROCESS &&
+ avd->allowed && PROCESS__TRANSITION &&
+ scontext->role != tcontext->role) {
+ for (ra = policydb.role_allow; ra; ra = ra->next) {
+ if (scontext->role == ra->role &&
+ tcontext->role == ra->new_role)
+ break;
+ }
+ if (!ra)
+ avd->allowed = (avd->allowed) & ~(PROCESS__TRANSITION);
+ }
+
+ return 0;
+}
+
+/**
+ * security_compute_av - Compute access vector decisions.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @requested: requested permissions
+ * @avd: access vector decisions
+ *
+ * Compute a set of access vector decisions based on the
+ * SID pair (@ssid, @tsid) for the permissions in @tclass.
+ * Return -%EINVAL if any of the parameters are invalid or %0
+ * if the access vector decisions were computed successfully.
+ */
+int security_compute_av(u32 ssid,
+ u32 tsid,
+ u16 tclass,
+ u32 requested,
+ struct av_decision *avd)
+{
+ struct context *scontext = 0, *tcontext = 0;
+ int rc = 0;
+
+ if (!ss_initialized) {
+ avd->allowed = requested;
+ avd->decided = requested;
+ avd->auditallow = 0;
+ avd->auditdeny = 0xffffffff;
+ avd->seqno = latest_granting;
+ return 0;
+ }
+
+ POLICY_RDLOCK;
+
+ scontext = sidtab_search(&sidtab, ssid);
+ if (!scontext) {
+ printk(KERN_ERR "security_compute_av: unrecognized SID %d\n",
+ ssid);
+ rc = -EINVAL;
+ goto out;
+ }
+ tcontext = sidtab_search(&sidtab, tsid);
+ if (!tcontext) {
+ printk(KERN_ERR "security_compute_av: unrecognized SID %d\n",
+ tsid);
+ rc = -EINVAL;
+ goto out;
+ }
+
+ rc = context_struct_compute_av(scontext, tcontext, tclass,
+ requested, avd);
+out:
+ POLICY_RDUNLOCK;
+ return rc;
+}
+
+/*
+ * Write the security context string representation of
+ * the context structure `context' into a dynamically
+ * allocated string of the correct size. Set `*scontext'
+ * to point to this string and set `*scontext_len' to
+ * the length of the string.
+ */
+int context_struct_to_string(struct context *context, char **scontext, u32 *scontext_len)
+{
+ char *scontextp;
+
+ *scontext = 0;
+ *scontext_len = 0;
+
+ /* Compute the size of the context. */
+ *scontext_len += strlen(policydb.p_user_val_to_name[context->user - 1]) + 1;
+ *scontext_len += strlen(policydb.p_role_val_to_name[context->role - 1]) + 1;
+ *scontext_len += strlen(policydb.p_type_val_to_name[context->type - 1]) + 1;
+ *scontext_len += mls_compute_context_len(context);
+
+ /* Allocate space for the context; caller must free this space. */
+ scontextp = kmalloc(*scontext_len+1,GFP_ATOMIC);
+ if (!scontextp) {
+ return -ENOMEM;
+ }
+ *scontext = scontextp;
+
+ /*
+ * Copy the user name, role name and type name into the context.
+ */
+ sprintf(scontextp, "%s:%s:%s:",
+ policydb.p_user_val_to_name[context->user - 1],
+ policydb.p_role_val_to_name[context->role - 1],
+ policydb.p_type_val_to_name[context->type - 1]);
+ scontextp += strlen(policydb.p_user_val_to_name[context->user - 1]) +
+ 1 + strlen(policydb.p_role_val_to_name[context->role - 1]) +
+ 1 + strlen(policydb.p_type_val_to_name[context->type - 1]) + 1;
+
+ mls_sid_to_context(context, &scontextp);
+
+ scontextp--;
+ *scontextp = 0;
+
+ return 0;
+}
+
+#include "initial_sid_to_string.h"
+
+/**
+ * security_sid_to_context - Obtain a context for a given SID.
+ * @sid: security identifier, SID
+ * @scontext: security context
+ * @scontext_len: length in bytes
+ *
+ * Write the string representation of the context associated with @sid
+ * into a dynamically allocated string of the correct size. Set @scontext
+ * to point to this string and set @scontext_len to the length of the string.
+ */
+int security_sid_to_context(u32 sid, char **scontext, u32 *scontext_len)
+{
+ struct context *context;
+ int rc = 0;
+
+ if (!ss_initialized) {
+ if (sid <= SECINITSID_NUM) {
+ char *scontextp;
+
+ *scontext_len = strlen(initial_sid_to_string[sid]) + 1;
+ scontextp = kmalloc(*scontext_len,GFP_KERNEL);
+ strcpy(scontextp, initial_sid_to_string[sid]);
+ *scontext = scontextp;
+ goto out;
+ }
+ printk(KERN_ERR "security_sid_to_context: called before initial "
+ "load_policy on unknown SID %d\n", sid);
+ rc = -EINVAL;
+ goto out;
+ }
+ POLICY_RDLOCK;
+ context = sidtab_search(&sidtab, sid);
+ if (!context) {
+ printk(KERN_ERR "security_sid_to_context: unrecognized SID "
+ "%d\n", sid);
+ rc = -EINVAL;
+ goto out_unlock;
+ }
+ rc = context_struct_to_string(context, scontext, scontext_len);
+out_unlock:
+ POLICY_RDUNLOCK;
+out:
+ return rc;
+
+}
+
+/**
+ * security_context_to_sid - Obtain a SID for a given security context.
+ * @scontext: security context
+ * @scontext_len: length in bytes
+ * @sid: security identifier, SID
+ *
+ * Obtains a SID associated with the security context that
+ * has the string representation specified by @scontext.
+ * Returns -%EINVAL if the context is invalid, -%ENOMEM if insufficient
+ * memory is available, or 0 on success.
+ */
+int security_context_to_sid(char *scontext, u32 scontext_len, u32 *sid)
+{
+ char *scontext2;
+ struct context context;
+ struct role_datum *role;
+ struct type_datum *typdatum;
+ struct user_datum *usrdatum;
+ char *scontextp, *p, oldc;
+ int rc = 0;
+
+ if (!ss_initialized) {
+ int i;
+
+ for (i = 1; i < SECINITSID_NUM; i++) {
+ if (!strcmp(initial_sid_to_string[i], scontext)) {
+ *sid = i;
+ goto out;
+ }
+ }
+ printk(KERN_ERR "security_context_to_sid: called before "
+ "initial load_policy on unknown context %s\n", scontext);
+ rc = -EINVAL;
+ goto out;
+ }
+ *sid = SECSID_NULL;
+
+ /* Copy the string so that we can modify the copy as we parse it.
+ The string should already by null terminated, but we append a
+ null suffix to the copy to avoid problems with the existing
+ attr package, which doesn't view the null terminator as part
+ of the attribute value. */
+ scontext2 = kmalloc(scontext_len+1,GFP_KERNEL);
+ if (!scontext2) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memcpy(scontext2, scontext, scontext_len);
+ scontext2[scontext_len] = 0;
+
+ context_init(&context);
+ *sid = SECSID_NULL;
+
+ POLICY_RDLOCK;
+
+ /* Parse the security context. */
+
+ rc = -EINVAL;
+ scontextp = (char *) scontext2;
+
+ /* Extract the user. */
+ p = scontextp;
+ while (*p && *p != ':')
+ p++;
+
+ if (*p == 0)
+ goto out_unlock;
+
+ *p++ = 0;
+
+ usrdatum = hashtab_search(policydb.p_users.table, scontextp);
+ if (!usrdatum)
+ goto out_unlock;
+
+ context.user = usrdatum->value;
+
+ /* Extract role. */
+ scontextp = p;
+ while (*p && *p != ':')
+ p++;
+
+ if (*p == 0)
+ goto out_unlock;
+
+ *p++ = 0;
+
+ role = hashtab_search(policydb.p_roles.table, scontextp);
+ if (!role)
+ goto out_unlock;
+ context.role = role->value;
+
+ /* Extract type. */
+ scontextp = p;
+ while (*p && *p != ':')
+ p++;
+ oldc = *p;
+ *p++ = 0;
+
+ typdatum = hashtab_search(policydb.p_types.table, scontextp);
+ if (!typdatum)
+ goto out_unlock;
+
+ context.type = typdatum->value;
+
+ rc = mls_context_to_sid(oldc, &p, &context);
+ if (rc)
+ goto out_unlock;
+
+ /* Check the validity of the new context. */
+ if (!policydb_context_isvalid(&policydb, &context)) {
+ rc = -EINVAL;
+ goto out_unlock;
+ }
+ /* Obtain the new sid. */
+ rc = sidtab_context_to_sid(&sidtab, &context, sid);
+out_unlock:
+ POLICY_RDUNLOCK;
+ context_destroy(&context);
+ kfree(scontext2);
+out:
+ return rc;
+}
+
+static inline int compute_sid_handle_invalid_context(
+ struct context *scontext,
+ struct context *tcontext,
+ u16 tclass,
+ struct context *newcontext)
+{
+ int rc = 0;
+
+ if (selinux_enforcing) {
+ rc = -EACCES;
+ } else {
+ char *s, *t, *n;
+ u32 slen, tlen, nlen;
+
+ context_struct_to_string(scontext, &s, &slen);
+ context_struct_to_string(tcontext, &t, &tlen);
+ context_struct_to_string(newcontext, &n, &nlen);
+ printk(KERN_ERR "security_compute_sid: invalid context %s", n);
+ printk(" for scontext=%s", s);
+ printk(" tcontext=%s", t);
+ printk(" tclass=%s\n", policydb.p_class_val_to_name[tclass-1]);
+ kfree(s);
+ kfree(t);
+ kfree(n);
+ }
+ return rc;
+}
+
+static int security_compute_sid(u32 ssid,
+ u32 tsid,
+ u16 tclass,
+ u32 specified,
+ u32 *out_sid)
+{
+ struct context *scontext = 0, *tcontext = 0, newcontext;
+ struct role_trans *roletr = 0;
+ struct avtab_key avkey;
+ struct avtab_datum *avdatum;
+ unsigned int type_change = 0;
+ int rc = 0;
+
+ if (!ss_initialized) {
+ switch (tclass) {
+ case SECCLASS_PROCESS:
+ *out_sid = ssid;
+ break;
+ default:
+ *out_sid = tsid;
+ break;
+ }
+ goto out;
+ }
+
+ POLICY_RDLOCK;
+
+ scontext = sidtab_search(&sidtab, ssid);
+ if (!scontext) {
+ printk(KERN_ERR "security_compute_sid: unrecognized SID %d\n",
+ ssid);
+ rc = -EINVAL;
+ goto out_unlock;
+ }
+ tcontext = sidtab_search(&sidtab, tsid);
+ if (!tcontext) {
+ printk(KERN_ERR "security_compute_sid: unrecognized SID %d\n",
+ tsid);
+ rc = -EINVAL;
+ goto out_unlock;
+ }
+
+ context_init(&newcontext);
+
+ /* Set the user identity. */
+ switch (specified) {
+ case AVTAB_TRANSITION:
+ case AVTAB_CHANGE:
+ /* Use the process user identity. */
+ newcontext.user = scontext->user;
+ break;
+ case AVTAB_MEMBER:
+ /* Use the related object owner. */
+ newcontext.user = tcontext->user;
+ break;
+ }
+
+ /* Set the role and type to default values. */
+ switch (tclass) {
+ case SECCLASS_PROCESS:
+ /* Use the current role and type of process. */
+ newcontext.role = scontext->role;
+ newcontext.type = scontext->type;
+ break;
+ default:
+ /* Use the well-defined object role. */
+ newcontext.role = OBJECT_R_VAL;
+ /* Use the type of the related object. */
+ newcontext.type = tcontext->type;
+ }
+
+ /* Look for a type transition/member/change rule. */
+ avkey.source_type = scontext->type;
+ avkey.target_type = tcontext->type;
+ avkey.target_class = tclass;
+ avdatum = avtab_search(&policydb.te_avtab, &avkey, AVTAB_TYPE);
+ type_change = (avdatum && (avdatum->specified & specified));
+ if (type_change) {
+ /* Use the type from the type transition/member/change rule. */
+ switch (specified) {
+ case AVTAB_TRANSITION:
+ newcontext.type = avtab_transition(avdatum);
+ break;
+ case AVTAB_MEMBER:
+ newcontext.type = avtab_member(avdatum);
+ break;
+ case AVTAB_CHANGE:
+ newcontext.type = avtab_change(avdatum);
+ break;
+ }
+ }
+
+ /* Check for class-specific changes. */
+ switch (tclass) {
+ case SECCLASS_PROCESS:
+ if (specified & AVTAB_TRANSITION) {
+ /* Look for a role transition rule. */
+ for (roletr = policydb.role_tr; roletr;
+ roletr = roletr->next) {
+ if (roletr->role == scontext->role &&
+ roletr->type == tcontext->type) {
+ /* Use the role transition rule. */
+ newcontext.role = roletr->new_role;
+ break;
+ }
+ }
+ }
+
+ if (!type_change && !roletr) {
+ /* No change in process role or type. */
+ *out_sid = ssid;
+ goto out_unlock;
+
+ }
+ break;
+ default:
+ if (!type_change &&
+ (newcontext.user == tcontext->user) &&
+ mls_context_cmp(scontext, tcontext)) {
+ /* No change in object type, owner,
+ or MLS attributes. */
+ *out_sid = tsid;
+ goto out_unlock;
+ }
+ break;
+ }
+
+ /* Set the MLS attributes.
+ This is done last because it may allocate memory. */
+ rc = mls_compute_sid(scontext, tcontext, tclass, specified, &newcontext);
+ if (rc)
+ goto out_unlock;
+
+ /* Check the validity of the context. */
+ if (!policydb_context_isvalid(&policydb, &newcontext)) {
+ rc = compute_sid_handle_invalid_context(scontext,
+ tcontext,
+ tclass,
+ &newcontext);
+ if (rc)
+ goto out_unlock;
+ }
+ /* Obtain the sid for the context. */
+ rc = sidtab_context_to_sid(&sidtab, &newcontext, out_sid);
+out_unlock:
+ POLICY_RDUNLOCK;
+ context_destroy(&newcontext);
+out:
+ return rc;
+}
+
+/**
+ * security_transition_sid - Compute the SID for a new subject/object.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @out_sid: security identifier for new subject/object
+ *
+ * Compute a SID to use for labeling a new subject or object in the
+ * class @tclass based on a SID pair (@ssid, @tsid).
+ * Return -%EINVAL if any of the parameters are invalid, -%ENOMEM
+ * if insufficient memory is available, or %0 if the new SID was
+ * computed successfully.
+ */
+int security_transition_sid(u32 ssid,
+ u32 tsid,
+ u16 tclass,
+ u32 *out_sid)
+{
+ return security_compute_sid(ssid, tsid, tclass, AVTAB_TRANSITION, out_sid);
+}
+
+/**
+ * security_member_sid - Compute the SID for member selection.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @out_sid: security identifier for selected member
+ *
+ * Compute a SID to use when selecting a member of a polyinstantiated
+ * object of class @tclass based on a SID pair (@ssid, @tsid).
+ * Return -%EINVAL if any of the parameters are invalid, -%ENOMEM
+ * if insufficient memory is available, or %0 if the SID was
+ * computed successfully.
+ */
+int security_member_sid(u32 ssid,
+ u32 tsid,
+ u16 tclass,
+ u32 *out_sid)
+{
+ return security_compute_sid(ssid, tsid, tclass, AVTAB_MEMBER, out_sid);
+}
+
+/**
+ * security_change_sid - Compute the SID for object relabeling.
+ * @ssid: source security identifier
+ * @tsid: target security identifier
+ * @tclass: target security class
+ * @out_sid: security identifier for selected member
+ *
+ * Compute a SID to use for relabeling an object of class @tclass
+ * based on a SID pair (@ssid, @tsid).
+ * Return -%EINVAL if any of the parameters are invalid, -%ENOMEM
+ * if insufficient memory is available, or %0 if the SID was
+ * computed successfully.
+ */
+int security_change_sid(u32 ssid,
+ u32 tsid,
+ u16 tclass,
+ u32 *out_sid)
+{
+ return security_compute_sid(ssid, tsid, tclass, AVTAB_CHANGE, out_sid);
+}
+
+/*
+ * Verify that each permission that is defined under the
+ * existing policy is still defined with the same value
+ * in the new policy.
+ */
+static int validate_perm(void *key, void *datum, void *p)
+{
+ struct hashtab *h;
+ struct perm_datum *perdatum, *perdatum2;
+ int rc = 0;
+
+
+ h = p;
+ perdatum = datum;
+
+ perdatum2 = hashtab_search(h, key);
+ if (!perdatum2) {
+ printk(KERN_ERR "security: permission %s disappeared",
+ (char *)key);
+ rc = -ENOENT;
+ goto out;
+ }
+ if (perdatum->value != perdatum2->value) {
+ printk(KERN_ERR "security: the value of permission %s changed",
+ (char *)key);
+ rc = -EINVAL;
+ }
+out:
+ return rc;
+}
+
+/*
+ * Verify that each class that is defined under the
+ * existing policy is still defined with the same
+ * attributes in the new policy.
+ */
+static int validate_class(void *key, void *datum, void *p)
+{
+ struct policydb *newp;
+ struct class_datum *cladatum, *cladatum2;
+ int rc;
+
+ newp = p;
+ cladatum = datum;
+
+ cladatum2 = hashtab_search(newp->p_classes.table, key);
+ if (!cladatum2) {
+ printk(KERN_ERR "security: class %s disappeared\n",
+ (char *)key);
+ rc = -ENOENT;
+ goto out;
+ }
+ if (cladatum->value != cladatum2->value) {
+ printk(KERN_ERR "security: the value of class %s changed\n",
+ (char *)key);
+ rc = -EINVAL;
+ goto out;
+ }
+ if ((cladatum->comdatum && !cladatum2->comdatum) ||
+ (!cladatum->comdatum && cladatum2->comdatum)) {
+ printk(KERN_ERR "security: the inherits clause for the access "
+ "vector definition for class %s changed\n", (char *)key);
+ rc = -EINVAL;
+ goto out;
+ }
+ if (cladatum->comdatum) {
+ rc = hashtab_map(cladatum->comdatum->permissions.table, validate_perm,
+ cladatum2->comdatum->permissions.table);
+ if (rc) {
+ printk(" in the access vector definition for class "
+ "%s\n", (char *)key);
+ goto out;
+ }
+ }
+ rc = hashtab_map(cladatum->permissions.table, validate_perm,
+ cladatum2->permissions.table);
+ if (rc)
+ printk(" in access vector definition for class %s\n",
+ (char *)key);
+out:
+ return rc;
+}
+
+/* Clone the SID into the new SID table. */
+static int clone_sid(u32 sid,
+ struct context *context,
+ void *arg)
+{
+ struct sidtab *s = arg;
+
+ return sidtab_insert(s, sid, context);
+}
+
+static inline int convert_context_handle_invalid_context(struct context *context)
+{
+ int rc = 0;
+
+ if (selinux_enforcing) {
+ rc = -EINVAL;
+ } else {
+ char *s;
+ u32 len;
+
+ context_struct_to_string(context, &s, &len);
+ printk(KERN_ERR "security: context %s is invalid\n", s);
+ kfree(s);
+ }
+ return rc;
+}
+
+struct convert_context_args {
+ struct policydb *oldp;
+ struct policydb *newp;
+};
+
+/*
+ * Convert the values in the security context
+ * structure `c' from the values specified
+ * in the policy `p->oldp' to the values specified
+ * in the policy `p->newp'. Verify that the
+ * context is valid under the new policy.
+ */
+static int convert_context(u32 key,
+ struct context *c,
+ void *p)
+{
+ struct convert_context_args *args;
+ struct context oldc;
+ struct role_datum *role;
+ struct type_datum *typdatum;
+ struct user_datum *usrdatum;
+ char *s;
+ u32 len;
+ int rc = -EINVAL;
+
+ args = p;
+
+ rc = context_cpy(&oldc, c);
+ if (rc)
+ goto out;
+
+ /* Convert the user. */
+ usrdatum = hashtab_search(args->newp->p_users.table,
+ args->oldp->p_user_val_to_name[c->user - 1]);
+ if (!usrdatum) {
+ goto bad;
+ }
+ c->user = usrdatum->value;
+
+ /* Convert the role. */
+ role = hashtab_search(args->newp->p_roles.table,
+ args->oldp->p_role_val_to_name[c->role - 1]);
+ if (!role) {
+ goto bad;
+ }
+ c->role = role->value;
+
+ /* Convert the type. */
+ typdatum = hashtab_search(args->newp->p_types.table,
+ args->oldp->p_type_val_to_name[c->type - 1]);
+ if (!typdatum) {
+ goto bad;
+ }
+ c->type = typdatum->value;
+
+ rc = mls_convert_context(args->oldp, args->newp, c);
+ if (rc)
+ goto bad;
+
+ /* Check the validity of the new context. */
+ if (!policydb_context_isvalid(args->newp, c)) {
+ rc = convert_context_handle_invalid_context(&oldc);
+ if (rc)
+ goto bad;
+ }
+
+ context_destroy(&oldc);
+out:
+ return rc;
+bad:
+ context_struct_to_string(&oldc, &s, &len);
+ context_destroy(&oldc);
+ printk(KERN_ERR "security: invalidating context %s\n", s);
+ kfree(s);
+ goto out;
+}
+
+extern void selinux_complete_init(void);
+
+/**
+ * security_load_policy - Load a security policy configuration.
+ * @data: binary policy data
+ * @len: length of data in bytes
+ *
+ * Load a new set of security policy configuration data,
+ * validate it and convert the SID table as necessary.
+ * This function will flush the access vector cache after
+ * loading the new policy.
+ */
+int security_load_policy(void *data, size_t len)
+{
+ struct policydb oldpolicydb, newpolicydb;
+ struct sidtab oldsidtab, newsidtab;
+ struct convert_context_args args;
+ u32 seqno;
+ int rc = 0;
+ struct policy_file file = { data, len }, *fp = &file;
+
+ LOAD_LOCK;
+
+ if (!ss_initialized) {
+ if (policydb_read(&policydb, fp)) {
+ LOAD_UNLOCK;
+ return -EINVAL;
+ }
+ if (policydb_load_isids(&policydb, &sidtab)) {
+ LOAD_UNLOCK;
+ policydb_destroy(&policydb);
+ return -EINVAL;
+ }
+ ss_initialized = 1;
+ LOAD_UNLOCK;
+ selinux_complete_init();
+ return 0;
+ }
+
+#if 0
+ sidtab_hash_eval(&sidtab, "sids");
+#endif
+
+ if (policydb_read(&newpolicydb, fp)) {
+ LOAD_UNLOCK;
+ return -EINVAL;
+ }
+
+ sidtab_init(&newsidtab);
+
+ /* Verify that the existing classes did not change. */
+ if (hashtab_map(policydb.p_classes.table, validate_class, &newpolicydb)) {
+ printk(KERN_ERR "security: the definition of an existing "
+ "class changed\n");
+ rc = -EINVAL;
+ goto err;
+ }
+
+ /* Clone the SID table. */
+ sidtab_shutdown(&sidtab);
+ if (sidtab_map(&sidtab, clone_sid, &newsidtab)) {
+ rc = -ENOMEM;
+ goto err;
+ }
+
+ /* Convert the internal representations of contexts
+ in the new SID table and remove invalid SIDs. */
+ args.oldp = &policydb;
+ args.newp = &newpolicydb;
+ sidtab_map_remove_on_error(&newsidtab, convert_context, &args);
+
+ /* Save the old policydb and SID table to free later. */
+ memcpy(&oldpolicydb, &policydb, sizeof policydb);
+ sidtab_set(&oldsidtab, &sidtab);
+
+ /* Install the new policydb and SID table. */
+ POLICY_WRLOCK;
+ memcpy(&policydb, &newpolicydb, sizeof policydb);
+ sidtab_set(&sidtab, &newsidtab);
+ seqno = ++latest_granting;
+ POLICY_WRUNLOCK;
+ LOAD_UNLOCK;
+
+ /* Free the old policydb and SID table. */
+ policydb_destroy(&oldpolicydb);
+ sidtab_destroy(&oldsidtab);
+
+ avc_ss_reset(seqno);
+
+ return 0;
+
+err:
+ LOAD_UNLOCK;
+ sidtab_destroy(&newsidtab);
+ policydb_destroy(&newpolicydb);
+ return rc;
+
+}
+
+/**
+ * security_port_sid - Obtain the SID for a port.
+ * @domain: communication domain aka address family
+ * @type: socket type
+ * @protocol: protocol number
+ * @port: port number
+ * @out_sid: security identifier
+ */
+int security_port_sid(u16 domain,
+ u16 type,
+ u8 protocol,
+ u16 port,
+ u32 *out_sid)
+{
+ struct ocontext *c;
+ int rc = 0;
+
+ POLICY_RDLOCK;
+
+ c = policydb.ocontexts[OCON_PORT];
+ while (c) {
+ if (c->u.port.protocol == protocol &&
+ c->u.port.low_port <= port &&
+ c->u.port.high_port >= port)
+ break;
+ c = c->next;
+ }
+
+ if (c) {
+ if (!c->sid[0]) {
+ rc = sidtab_context_to_sid(&sidtab,
+ &c->context[0],
+ &c->sid[0]);
+ if (rc)
+ goto out;
+ }
+ *out_sid = c->sid[0];
+ } else {
+ *out_sid = SECINITSID_PORT;
+ }
+
+out:
+ POLICY_RDUNLOCK;
+ return rc;
+}
+
+/**
+ * security_netif_sid - Obtain the SID for a network interface.
+ * @name: interface name
+ * @if_sid: interface SID
+ * @msg_sid: default SID for received packets
+ */
+int security_netif_sid(char *name,
+ u32 *if_sid,
+ u32 *msg_sid)
+{
+ int rc = 0;
+ struct ocontext *c;
+
+ POLICY_RDLOCK;
+
+ c = policydb.ocontexts[OCON_NETIF];
+ while (c) {
+ if (strcmp(name, c->u.name) == 0)
+ break;
+ c = c->next;
+ }
+
+ if (c) {
+ if (!c->sid[0] || !c->sid[1]) {
+ rc = sidtab_context_to_sid(&sidtab,
+ &c->context[0],
+ &c->sid[0]);
+ if (rc)
+ goto out;
+ rc = sidtab_context_to_sid(&sidtab,
+ &c->context[1],
+ &c->sid[1]);
+ if (rc)
+ goto out;
+ }
+ *if_sid = c->sid[0];
+ *msg_sid = c->sid[1];
+ } else {
+ *if_sid = SECINITSID_NETIF;
+ *msg_sid = SECINITSID_NETMSG;
+ }
+
+out:
+ POLICY_RDUNLOCK;
+ return rc;
+}
+
+
+/**
+ * security_node_sid - Obtain the SID for a node (host).
+ * @domain: communication domain aka address family
+ * @addrp: address
+ * @addrlen: address length in bytes
+ * @out_sid: security identifier
+ */
+int security_node_sid(u16 domain,
+ void *addrp,
+ u32 addrlen,
+ u32 *out_sid)
+{
+ int rc = 0;
+ u32 addr;
+ struct ocontext *c;
+
+ POLICY_RDLOCK;
+
+ if (domain != AF_INET || addrlen != sizeof(u32)) {
+ *out_sid = SECINITSID_NODE;
+ goto out;
+ }
+ addr = *((u32 *)addrp);
+
+ c = policydb.ocontexts[OCON_NODE];
+ while (c) {
+ if (c->u.node.addr == (addr & c->u.node.mask))
+ break;
+ c = c->next;
+ }
+
+ if (c) {
+ if (!c->sid[0]) {
+ rc = sidtab_context_to_sid(&sidtab,
+ &c->context[0],
+ &c->sid[0]);
+ if (rc)
+ goto out;
+ }
+ *out_sid = c->sid[0];
+ } else {
+ *out_sid = SECINITSID_NODE;
+ }
+
+out:
+ POLICY_RDUNLOCK;
+ return rc;
+}
+
+#define SIDS_NEL 25
+
+/**
+ * security_get_user_sids - Obtain reachable SIDs for a user.
+ * @fromsid: starting SID
+ * @username: username
+ * @sids: array of reachable SIDs for user
+ * @nel: number of elements in @sids
+ *
+ * Generate the set of SIDs for legal security contexts
+ * for a given user that can be reached by @fromsid.
+ * Set *@sids to point to a dynamically allocated
+ * array containing the set of SIDs. Set *@nel to the
+ * number of elements in the array.
+ */
+
+int security_get_user_sids(u32 fromsid,
+ char *username,
+ u32 **sids,
+ u32 *nel)
+{
+ struct context *fromcon, usercon;
+ u32 *mysids, *mysids2, sid;
+ u32 mynel = 0, maxnel = SIDS_NEL;
+ struct user_datum *user;
+ struct role_datum *role;
+ struct av_decision avd;
+ int rc = 0, i, j;
+
+ if (!ss_initialized) {
+ *sids = NULL;
+ *nel = 0;
+ goto out;
+ }
+
+ POLICY_RDLOCK;
+
+ fromcon = sidtab_search(&sidtab, fromsid);
+ if (!fromcon) {
+ rc = -EINVAL;
+ goto out_unlock;
+ }
+
+ user = hashtab_search(policydb.p_users.table, username);
+ if (!user) {
+ rc = -EINVAL;
+ goto out_unlock;
+ }
+ usercon.user = user->value;
+
+ mysids = kmalloc(maxnel*sizeof(*mysids), GFP_ATOMIC);
+ if (!mysids) {
+ rc = -ENOMEM;
+ goto out_unlock;
+ }
+ memset(mysids, 0, maxnel*sizeof(*mysids));
+
+ for (i = ebitmap_startbit(&user->roles); i < ebitmap_length(&user->roles); i++) {
+ if (!ebitmap_get_bit(&user->roles, i))
+ continue;
+ role = policydb.role_val_to_struct[i];
+ usercon.role = i+1;
+ for (j = ebitmap_startbit(&role->types); j < ebitmap_length(&role->types); j++) {
+ if (!ebitmap_get_bit(&role->types, j))
+ continue;
+ usercon.type = j+1;
+ if (usercon.type == fromcon->type)
+ continue;
+ mls_for_user_ranges(user,usercon) {
+ rc = context_struct_compute_av(fromcon, &usercon,
+ SECCLASS_PROCESS,
+ PROCESS__TRANSITION,
+ &avd);
+ if (rc || !(avd.allowed & PROCESS__TRANSITION))
+ continue;
+ rc = sidtab_context_to_sid(&sidtab, &usercon, &sid);
+ if (rc) {
+ kfree(mysids);
+ goto out_unlock;
+ }
+ if (mynel < maxnel) {
+ mysids[mynel++] = sid;
+ } else {
+ maxnel += SIDS_NEL;
+ mysids2 = kmalloc(maxnel*sizeof(*mysids2), GFP_ATOMIC);
+ if (!mysids2) {
+ rc = -ENOMEM;
+ kfree(mysids);
+ goto out_unlock;
+ }
+ memset(mysids2, 0, maxnel*sizeof(*mysids2));
+ memcpy(mysids2, mysids, mynel * sizeof(*mysids2));
+ kfree(mysids);
+ mysids = mysids2;
+ mysids[mynel++] = sid;
+ }
+ }
+ mls_end_user_ranges;
+ }
+ }
+
+ *sids = mysids;
+ *nel = mynel;
+
+out_unlock:
+ POLICY_RDUNLOCK;
+out:
+ return rc;
+}
+
+/**
+ * security_genfs_sid - Obtain a SID for a file in a filesystem
+ * @fstype: filesystem type
+ * @path: path from root of mount
+ * @sclass: file security class
+ * @sid: SID for path
+ *
+ * Obtain a SID to use for a file in a filesystem that
+ * cannot support xattr or use a fixed labeling behavior like
+ * transition SIDs or task SIDs.
+ */
+int security_genfs_sid(const char *fstype,
+ char *path,
+ u16 sclass,
+ u32 *sid)
+{
+ int len;
+ struct genfs *genfs;
+ struct ocontext *c;
+ int rc = 0, cmp = 0;
+
+ POLICY_RDLOCK;
+
+ for (genfs = policydb.genfs; genfs; genfs = genfs->next) {
+ cmp = strcmp(fstype, genfs->fstype);
+ if (cmp <= 0)
+ break;
+ }
+
+ if (!genfs || cmp) {
+ *sid = SECINITSID_UNLABELED;
+ rc = -ENOENT;
+ goto out;
+ }
+
+ for (c = genfs->head; c; c = c->next) {
+ len = strlen(c->u.name);
+ if ((!c->v.sclass || sclass == c->v.sclass) &&
+ (strncmp(c->u.name, path, len) == 0))
+ break;
+ }
+
+ if (!c) {
+ *sid = SECINITSID_UNLABELED;
+ rc = -ENOENT;
+ goto out;
+ }
+
+ if (!c->sid[0]) {
+ rc = sidtab_context_to_sid(&sidtab,
+ &c->context[0],
+ &c->sid[0]);
+ if (rc)
+ goto out;
+ }
+
+ *sid = c->sid[0];
+out:
+ POLICY_RDUNLOCK;
+ return rc;
+}
+
+/**
+ * security_fs_use - Determine how to handle labeling for a filesystem.
+ * @fstype: filesystem type
+ * @behavior: labeling behavior
+ * @sid: SID for filesystem (superblock)
+ */
+int security_fs_use(
+ const char *fstype,
+ unsigned int *behavior,
+ u32 *sid)
+{
+ int rc = 0;
+ struct ocontext *c;
+
+ POLICY_RDLOCK;
+
+ c = policydb.ocontexts[OCON_FSUSE];
+ while (c) {
+ if (strcmp(fstype, c->u.name) == 0)
+ break;
+ c = c->next;
+ }
+
+ if (c) {
+ *behavior = c->v.behavior;
+ if (!c->sid[0]) {
+ rc = sidtab_context_to_sid(&sidtab,
+ &c->context[0],
+ &c->sid[0]);
+ if (rc)
+ goto out;
+ }
+ *sid = c->sid[0];
+ } else {
+ rc = security_genfs_sid(fstype, "/", SECCLASS_DIR, sid);
+ if (rc) {
+ *behavior = SECURITY_FS_USE_NONE;
+ rc = 0;
+ } else {
+ *behavior = SECURITY_FS_USE_GENFS;
+ }
+ }
+
+out:
+ POLICY_RDUNLOCK;
+ return rc;
+}
diff -Nru a/security/selinux/ss/services.h b/security/selinux/ss/services.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/services.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,21 @@
+/*
+ * Implementation of the security services.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_SERVICES_H_
+#define _SS_SERVICES_H_
+
+#include "policydb.h"
+#include "sidtab.h"
+
+/*
+ * The security server uses two global data structures
+ * when providing its services: the SID table (sidtab)
+ * and the policy database (policydb).
+ */
+extern struct sidtab sidtab;
+extern struct policydb policydb;
+
+#endif /* _SS_SERVICES_H_ */
+
diff -Nru a/security/selinux/ss/sidtab.c b/security/selinux/ss/sidtab.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/sidtab.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,329 @@
+/*
+ * Implementation of the SID table type.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "sidtab.h"
+
+#define SIDTAB_HASH(sid) \
+(sid & SIDTAB_HASH_MASK)
+
+#define INIT_SIDTAB_LOCK(s) spin_lock_init(&s->lock)
+#define SIDTAB_LOCK(s) spin_lock_irq(&s->lock)
+#define SIDTAB_UNLOCK(s) spin_unlock_irq(&s->lock)
+
+int sidtab_init(struct sidtab *s)
+{
+ int i;
+
+ s->htable = kmalloc(sizeof(*(s->htable)) * SIDTAB_SIZE, GFP_ATOMIC);
+ if (!s->htable)
+ return -ENOMEM;
+ for (i = 0; i < SIDTAB_SIZE; i++)
+ s->htable[i] = NULL;
+ s->nel = 0;
+ s->next_sid = 1;
+ s->shutdown = 0;
+ INIT_SIDTAB_LOCK(s);
+ return 0;
+}
+
+int sidtab_insert(struct sidtab *s, u32 sid, struct context *context)
+{
+ int hvalue, rc = 0;
+ struct sidtab_node *prev, *cur, *newnode;
+
+ if (!s) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ hvalue = SIDTAB_HASH(sid);
+ prev = NULL;
+ cur = s->htable[hvalue];
+ while (cur != NULL && sid > cur->sid) {
+ prev = cur;
+ cur = cur->next;
+ }
+
+ if (cur && sid == cur->sid) {
+ rc = -EEXIST;
+ goto out;
+ }
+
+ newnode = kmalloc(sizeof(*newnode), GFP_ATOMIC);
+ if (newnode == NULL) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ newnode->sid = sid;
+ if (context_cpy(&newnode->context, context)) {
+ kfree(newnode);
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ if (prev) {
+ newnode->next = prev->next;
+ wmb();
+ prev->next = newnode;
+ } else {
+ newnode->next = s->htable[hvalue];
+ wmb();
+ s->htable[hvalue] = newnode;
+ }
+
+ s->nel++;
+ if (sid >= s->next_sid)
+ s->next_sid = sid + 1;
+out:
+ return rc;
+}
+
+int sidtab_remove(struct sidtab *s, u32 sid)
+{
+ int hvalue, rc = 0;
+ struct sidtab_node *cur, *last;
+
+ if (!s) {
+ rc = -ENOENT;
+ goto out;
+ }
+
+ hvalue = SIDTAB_HASH(sid);
+ last = NULL;
+ cur = s->htable[hvalue];
+ while (cur != NULL && sid > cur->sid) {
+ last = cur;
+ cur = cur->next;
+ }
+
+ if (cur == NULL || sid != cur->sid) {
+ rc = -ENOENT;
+ goto out;
+ }
+
+ if (last == NULL)
+ s->htable[hvalue] = cur->next;
+ else
+ last->next = cur->next;
+
+ context_destroy(&cur->context);
+
+ kfree(cur);
+ s->nel--;
+out:
+ return rc;
+}
+
+struct context *sidtab_search(struct sidtab *s, u32 sid)
+{
+ int hvalue;
+ struct sidtab_node *cur;
+
+ if (!s)
+ return NULL;
+
+ hvalue = SIDTAB_HASH(sid);
+ cur = s->htable[hvalue];
+ while (cur != NULL && sid > cur->sid)
+ cur = cur->next;
+
+ if (cur == NULL || sid != cur->sid) {
+ /* Remap invalid SIDs to the unlabeled SID. */
+ sid = SECINITSID_UNLABELED;
+ hvalue = SIDTAB_HASH(sid);
+ cur = s->htable[hvalue];
+ while (cur != NULL && sid > cur->sid)
+ cur = cur->next;
+ if (!cur || sid != cur->sid)
+ return NULL;
+ }
+
+ return &cur->context;
+}
+
+int sidtab_map(struct sidtab *s,
+ int (*apply) (u32 sid,
+ struct context *context,
+ void *args),
+ void *args)
+{
+ int i, rc = 0;
+ struct sidtab_node *cur;
+
+ if (!s)
+ goto out;
+
+ for (i = 0; i < SIDTAB_SIZE; i++) {
+ cur = s->htable[i];
+ while (cur != NULL) {
+ rc = apply(cur->sid, &cur->context, args);
+ if (rc)
+ goto out;
+ cur = cur->next;
+ }
+ }
+out:
+ return rc;
+}
+
+void sidtab_map_remove_on_error(struct sidtab *s,
+ int (*apply) (u32 sid,
+ struct context *context,
+ void *args),
+ void *args)
+{
+ int i, ret;
+ struct sidtab_node *last, *cur, *temp;
+
+ if (!s)
+ return;
+
+ for (i = 0; i < SIDTAB_SIZE; i++) {
+ last = NULL;
+ cur = s->htable[i];
+ while (cur != NULL) {
+ ret = apply(cur->sid, &cur->context, args);
+ if (ret) {
+ if (last) {
+ last->next = cur->next;
+ } else {
+ s->htable[i] = cur->next;
+ }
+
+ temp = cur;
+ cur = cur->next;
+ context_destroy(&temp->context);
+ kfree(temp);
+ s->nel--;
+ } else {
+ last = cur;
+ cur = cur->next;
+ }
+ }
+ }
+
+ return;
+}
+
+static inline u32 sidtab_search_context(struct sidtab *s,
+ struct context *context)
+{
+ int i;
+ struct sidtab_node *cur;
+
+ for (i = 0; i < SIDTAB_SIZE; i++) {
+ cur = s->htable[i];
+ while (cur != NULL) {
+ if (context_cmp(&cur->context, context))
+ return cur->sid;
+ cur = cur->next;
+ }
+ }
+ return 0;
+}
+
+int sidtab_context_to_sid(struct sidtab *s,
+ struct context *context,
+ u32 *out_sid)
+{
+ u32 sid;
+ int ret = 0;
+
+ *out_sid = SECSID_NULL;
+
+ sid = sidtab_search_context(s, context);
+ if (!sid) {
+ SIDTAB_LOCK(s);
+ /* Rescan now that we hold the lock. */
+ sid = sidtab_search_context(s, context);
+ if (sid)
+ goto unlock_out;
+ /* No SID exists for the context. Allocate a new one. */
+ if (s->next_sid == UINT_MAX || s->shutdown) {
+ ret = -ENOMEM;
+ goto unlock_out;
+ }
+ sid = s->next_sid++;
+ ret = sidtab_insert(s, sid, context);
+ if (ret)
+ s->next_sid--;
+unlock_out:
+ SIDTAB_UNLOCK(s);
+ }
+
+ if (ret)
+ return ret;
+
+ *out_sid = sid;
+ return 0;
+}
+
+void sidtab_hash_eval(struct sidtab *h, char *tag)
+{
+ int i, chain_len, slots_used, max_chain_len;
+ struct sidtab_node *cur;
+
+ slots_used = 0;
+ max_chain_len = 0;
+ for (i = 0; i < SIDTAB_SIZE; i++) {
+ cur = h->htable[i];
+ if (cur) {
+ slots_used++;
+ chain_len = 0;
+ while (cur) {
+ chain_len++;
+ cur = cur->next;
+ }
+
+ if (chain_len > max_chain_len)
+ max_chain_len = chain_len;
+ }
+ }
+
+ printk(KERN_INFO "%s: %d entries and %d/%d buckets used, longest "
+ "chain length %d\n", tag, h->nel, slots_used, SIDTAB_SIZE,
+ max_chain_len);
+}
+
+void sidtab_destroy(struct sidtab *s)
+{
+ int i;
+ struct sidtab_node *cur, *temp;
+
+ if (!s)
+ return;
+
+ for (i = 0; i < SIDTAB_SIZE; i++) {
+ cur = s->htable[i];
+ while (cur != NULL) {
+ temp = cur;
+ cur = cur->next;
+ context_destroy(&temp->context);
+ kfree(temp);
+ }
+ s->htable[i] = NULL;
+ }
+ kfree(s->htable);
+ s->htable = NULL;
+ s->nel = 0;
+ s->next_sid = 1;
+}
+
+void sidtab_set(struct sidtab *dst, struct sidtab *src)
+{
+ SIDTAB_LOCK(src);
+ dst->htable = src->htable;
+ dst->nel = src->nel;
+ dst->next_sid = src->next_sid;
+ dst->shutdown = 0;
+ SIDTAB_UNLOCK(src);
+}
+
+void sidtab_shutdown(struct sidtab *s)
+{
+ SIDTAB_LOCK(s);
+ s->shutdown = 1;
+ SIDTAB_UNLOCK(s);
+}
diff -Nru a/security/selinux/ss/sidtab.h b/security/selinux/ss/sidtab.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/sidtab.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,59 @@
+/*
+ * A security identifier table (sidtab) is a hash table
+ * of security context structures indexed by SID value.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_SIDTAB_H_
+#define _SS_SIDTAB_H_
+
+#include "context.h"
+
+struct sidtab_node {
+ u32 sid; /* security identifier */
+ struct context context; /* security context structure */
+ struct sidtab_node *next;
+};
+
+#define SIDTAB_HASH_BITS 7
+#define SIDTAB_HASH_BUCKETS (1 << SIDTAB_HASH_BITS)
+#define SIDTAB_HASH_MASK (SIDTAB_HASH_BUCKETS-1)
+
+#define SIDTAB_SIZE SIDTAB_HASH_BUCKETS
+
+struct sidtab {
+ struct sidtab_node **htable;
+ unsigned int nel; /* number of elements */
+ unsigned int next_sid; /* next SID to allocate */
+ unsigned char shutdown;
+ spinlock_t lock;
+};
+
+int sidtab_init(struct sidtab *s);
+int sidtab_insert(struct sidtab *s, u32 sid, struct context *context);
+struct context *sidtab_search(struct sidtab *s, u32 sid);
+
+int sidtab_map(struct sidtab *s,
+ int (*apply) (u32 sid,
+ struct context *context,
+ void *args),
+ void *args);
+
+void sidtab_map_remove_on_error(struct sidtab *s,
+ int (*apply) (u32 sid,
+ struct context *context,
+ void *args),
+ void *args);
+
+int sidtab_context_to_sid(struct sidtab *s,
+ struct context *context,
+ u32 *sid);
+
+void sidtab_hash_eval(struct sidtab *h, char *tag);
+void sidtab_destroy(struct sidtab *s);
+void sidtab_set(struct sidtab *dst, struct sidtab *src);
+void sidtab_shutdown(struct sidtab *s);
+
+#endif /* _SS_SIDTAB_H_ */
+
+
diff -Nru a/security/selinux/ss/symtab.c b/security/selinux/ss/symtab.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/symtab.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,40 @@
+/*
+ * Implementation of the symbol table type.
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#include "symtab.h"
+
+static unsigned int symhash(struct hashtab *h, void *key)
+{
+ char *p, *keyp;
+ unsigned int size;
+ unsigned int val;
+
+ val = 0;
+ keyp = key;
+ size = strlen(keyp);
+ for (p = keyp; (p - keyp) < size; p++)
+ val = (val << 4 | (val >> (8*sizeof(unsigned int)-4))) ^ (*p);
+ return val & (h->size - 1);
+}
+
+static int symcmp(struct hashtab *h, void *key1, void *key2)
+{
+ char *keyp1, *keyp2;
+
+ keyp1 = key1;
+ keyp2 = key2;
+ return strcmp(keyp1, keyp2);
+}
+
+
+int symtab_init(struct symtab *s, unsigned int size)
+{
+ s->table = hashtab_create(symhash, symcmp, size);
+ if (!s->table)
+ return -1;
+ s->nprim = 0;
+ return 0;
+}
+
diff -Nru a/security/selinux/ss/symtab.h b/security/selinux/ss/symtab.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/security/selinux/ss/symtab.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,23 @@
+/*
+ * A symbol table (symtab) maintains associations between symbol
+ * strings and datum values. The type of the datum values
+ * is arbitrary. The symbol table type is implemented
+ * using the hash table type (hashtab).
+ *
+ * Author : Stephen Smalley, <sds@epoch.ncsc.mil>
+ */
+#ifndef _SS_SYMTAB_H_
+#define _SS_SYMTAB_H_
+
+#include "hashtab.h"
+
+struct symtab {
+ struct hashtab *table; /* hash table (keyed on a string) */
+ u32 nprim; /* number of primary names in table */
+};
+
+int symtab_init(struct symtab *s, unsigned int size);
+
+#endif /* _SS_SYMTAB_H_ */
+
+
diff -Nru a/sound/Kconfig b/sound/Kconfig
--- a/sound/Kconfig Sun Aug 3 13:14:52 2003
+++ b/sound/Kconfig Sun Aug 3 13:14:52 2003
@@ -1,6 +1,43 @@
# sound/Config.in
#
+menu "Sound"
+
+config SOUND
+ tristate "Sound card support"
+ help
+ If you have a sound card in your computer, i.e. if it can say more
+ than an occasional beep, say Y. Be sure to have all the information
+ about your sound card and its configuration down (I/O port,
+ interrupt and DMA channel), because you will be asked for it.
+
+ You want to read the Sound-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>. General information about
+ the modular sound system is contained in the files
+ <file:Documentation/sound/oss/Introduction>. The file
+ <file:Documentation/sound/oss/README.OSS> contains some slightly
+ outdated but still useful information as well. Newer sound
+ driver documentation is found in <file:Documentation/sound/alsa/*>.
+
+ If you have a PnP sound card and you want to configure it at boot
+ time using the ISA PnP tools (read
+ <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
+ compile the sound card support as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want)
+ and load that module after the PnP configuration is finished. To do
+ this, say M here and read <file:Documentation/modules.txt> as well
+ as <file:Documentation/sound/oss/README.modules>; the module will be
+ called soundcore.
+
+ I'm told that even without a sound card, you can make your computer
+ say more than an occasional beep, by programming the PC speaker.
+ Kernel patches and supporting utilities to do that are in the pcsp
+ package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
+
+source "sound/oss/dmasound/Kconfig"
+
+if !M68K
+
menu "Advanced Linux Sound Architecture"
depends on SOUND!=n
@@ -44,5 +81,9 @@
Say 'Y' or 'M' to enable Open Sound System drivers.
source "sound/oss/Kconfig"
+
+endmenu
+
+endif
endmenu
diff -Nru a/sound/core/control.c b/sound/core/control.c
--- a/sound/core/control.c Sun Aug 3 13:14:46 2003
+++ b/sound/core/control.c Sun Aug 3 13:14:46 2003
@@ -504,8 +504,10 @@
offset = 0;
}
up_read(&card->controls_rwsem);
- if (list.used > 0 && copy_to_user(list.pids, dst, list.used * sizeof(snd_ctl_elem_id_t)))
+ if (list.used > 0 && copy_to_user(list.pids, dst, list.used * sizeof(snd_ctl_elem_id_t))) {
+ vfree(dst);
return -EFAULT;
+ }
vfree(dst);
} else {
down_read(&card->controls_rwsem);
diff -Nru a/sound/core/info.c b/sound/core/info.c
--- a/sound/core/info.c Sun Aug 3 13:14:52 2003
+++ b/sound/core/info.c Sun Aug 3 13:14:52 2003
@@ -115,7 +115,7 @@
*/
-struct proc_dir_entry *snd_proc_root = NULL;
+static struct proc_dir_entry *snd_proc_root = NULL;
snd_info_entry_t *snd_seq_root = NULL;
#ifdef CONFIG_SND_OSSEMUL
snd_info_entry_t *snd_oss_root = NULL;
@@ -278,18 +278,16 @@
if ((entry->content == SNDRV_INFO_CONTENT_TEXT &&
!entry->c.text.read_size) ||
(entry->content == SNDRV_INFO_CONTENT_DATA &&
- entry->c.ops->read == NULL) ||
- entry->content == SNDRV_INFO_CONTENT_DEVICE) {
+ entry->c.ops->read == NULL)) {
err = -ENODEV;
goto __error;
}
}
if (mode == O_WRONLY || mode == O_RDWR) {
if ((entry->content == SNDRV_INFO_CONTENT_TEXT &&
- !entry->c.text.write_size) ||
+ !entry->c.text.write_size) ||
(entry->content == SNDRV_INFO_CONTENT_DATA &&
- entry->c.ops->write == NULL) ||
- entry->content == SNDRV_INFO_CONTENT_DEVICE) {
+ entry->c.ops->write == NULL)) {
err = -ENODEV;
goto __error;
}
diff -Nru a/sound/core/ioctl32/ioctl32.c b/sound/core/ioctl32/ioctl32.c
--- a/sound/core/ioctl32/ioctl32.c Sun Aug 3 13:14:45 2003
+++ b/sound/core/ioctl32/ioctl32.c Sun Aug 3 13:14:45 2003
@@ -419,13 +419,13 @@
extern struct ioctl32_mapper rawmidi_mappers[];
extern struct ioctl32_mapper timer_mappers[];
extern struct ioctl32_mapper hwdep_mappers[];
-#ifdef CONFIG_SND_SEQUENCER
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
extern struct ioctl32_mapper seq_mappers[];
#endif
static void snd_ioctl32_done(void)
{
-#ifdef CONFIG_SND_SEQUENCER
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
snd_ioctl32_unregister(seq_mappers);
#endif
snd_ioctl32_unregister(hwdep_mappers);
@@ -442,7 +442,7 @@
snd_ioctl32_register(rawmidi_mappers);
snd_ioctl32_register(timer_mappers);
snd_ioctl32_register(hwdep_mappers);
-#ifdef CONFIG_SND_SEQUENCER
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
snd_ioctl32_register(seq_mappers);
#endif
return 0;
diff -Nru a/sound/core/memalloc.c b/sound/core/memalloc.c
--- a/sound/core/memalloc.c Sun Aug 3 13:14:53 2003
+++ b/sound/core/memalloc.c Sun Aug 3 13:14:53 2003
@@ -37,18 +37,12 @@
MODULE_LICENSE("GPL");
-/* so far, pre-defined allocation is only for hammerfall cards... */
-/* #define ENABLE_PREALLOC */
-
-
-#ifdef ENABLE_PREALLOC
#ifndef SNDRV_CARDS
#define SNDRV_CARDS 8
#endif
static int enable[8] = {[0 ... (SNDRV_CARDS-1)] = 1};
MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
MODULE_PARM_DESC(enable, "Enable cards to allocate buffers.");
-#endif
/*
@@ -154,6 +148,7 @@
return a->dev.flags == b->dev.flags;
#ifdef CONFIG_PCI
case SNDRV_DMA_TYPE_PCI:
+ case SNDRV_DMA_TYPE_PCI_SG:
return a->dev.pci == b->dev.pci;
#endif
#ifdef CONFIG_SBUS
@@ -336,7 +331,7 @@
* and replaced with the new one.
*
* When NULL buffer pointer or zero buffer size is given, the existing
- * release buffer is released and the entry is removed.
+ * buffer is released and the entry is removed.
*
* Returns zero if successful, or a negative code at error.
*/
@@ -785,7 +780,6 @@
#endif /* CONFIG_SBUS */
-#ifdef ENABLE_PREALLOC
/*
* allocation of buffers for pre-defined devices
*/
@@ -861,7 +855,6 @@
}
}
}
-#endif
#ifdef CONFIG_PROC_FS
@@ -873,9 +866,56 @@
{
int len = 0;
long pages = snd_allocated_pages >> (PAGE_SHIFT-12);
+ struct list_head *p;
+ struct snd_mem_list *mem;
+ int devno;
+ down(&list_mutex);
len += sprintf(page + len, "pages : %li bytes (%li pages per %likB)\n",
pages * PAGE_SIZE, pages, PAGE_SIZE / 1024);
+ devno = 0;
+ list_for_each(p, &mem_list_head) {
+ mem = list_entry(p, struct snd_mem_list, list);
+ devno++;
+ len += sprintf(page + len, "buffer %d : ", devno);
+ if (mem->dev.id == SNDRV_DMA_DEVICE_UNUSED)
+ len += sprintf(page + len, "UNUSED");
+ else
+ len += sprintf(page + len, "ID %08x", mem->dev.id);
+ len += sprintf(page + len, " : type ");
+ switch (mem->dev.type) {
+ case SNDRV_DMA_TYPE_CONTINUOUS:
+ len += sprintf(page + len, "CONT [%x]", mem->dev.dev.flags);
+ break;
+#ifdef CONFIG_PCI
+ case SNDRV_DMA_TYPE_PCI:
+ case SNDRV_DMA_TYPE_PCI_SG:
+ if (mem->dev.dev.pci) {
+ len += sprintf(page + len, "PCI [%04x:%04x]",
+ mem->dev.dev.pci->vendor,
+ mem->dev.dev.pci->device);
+ }
+ break;
+#endif
+#ifdef CONFIG_ISA
+ case SNDRV_DMA_TYPE_ISA:
+ len += sprintf(page + len, "ISA [%x]", mem->dev.dev.flags);
+ break;
+#endif
+#ifdef CONFIG_SBUS
+ case SNDRV_DMA_TYPE_SBUS:
+ len += sprintf(page + len, "SBUS [%x]", mem->dev.dev.sbus->slot);
+ break;
+#endif
+ default:
+ len += sprintf(page + len, "UNKNOWN");
+ break;
+ }
+ len += sprintf(page + len, "\n addr = 0x%lx, size = %d bytes, used = %s\n",
+ (unsigned long)mem->buffer.addr, (int)mem->buffer.bytes,
+ mem->used ? "yes" : "no");
+ }
+ up(&list_mutex);
return len;
}
#endif /* CONFIG_PROC_FS */
@@ -886,10 +926,10 @@
static int __init snd_mem_init(void)
{
+#ifdef CONFIG_PROC_FS
create_proc_read_entry("driver/snd-page-alloc", 0, 0, snd_mem_proc_read, NULL);
-#ifdef ENABLE_PREALLOC
- preallocate_cards();
#endif
+ preallocate_cards();
return 0;
}
@@ -905,6 +945,25 @@
module_init(snd_mem_init)
module_exit(snd_mem_exit)
+
+#ifndef MODULE
+
+/* format is: snd-page-alloc=enable */
+
+static int __init snd_mem_setup(char *str)
+{
+ static unsigned __initdata nr_dev = 0;
+
+ if (nr_dev >= SNDRV_CARDS)
+ return 0;
+ (void)(get_option(&str,&enable[nr_dev]) == 2);
+ nr_dev++;
+ return 1;
+}
+
+__setup("snd-page-alloc=", snd_mem_setup);
+
+#endif
/*
* exports
diff -Nru a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c
--- a/sound/core/oss/pcm_oss.c Sun Aug 3 13:14:52 2003
+++ b/sound/core/oss/pcm_oss.c Sun Aug 3 13:14:52 2003
@@ -22,6 +22,9 @@
#if 0
#define PLUGIN_DEBUG
#endif
+#if 0
+#define OSS_DEBUG
+#endif
#include <sound/driver.h>
#include <linux/version.h>
@@ -442,7 +445,7 @@
} else {
sw_params->start_threshold = runtime->boundary;
}
- if (atomic_read(&runtime->mmap_count))
+ if (atomic_read(&runtime->mmap_count) || substream->stream == SNDRV_PCM_STREAM_CAPTURE)
sw_params->stop_threshold = runtime->boundary;
else
sw_params->stop_threshold = runtime->buffer_size;
@@ -451,8 +454,18 @@
sw_params->sleep_min = 0;
sw_params->avail_min = runtime->period_size;
sw_params->xfer_align = 1;
- sw_params->silence_threshold = 0;
- sw_params->silence_size = 0;
+ if (atomic_read(&runtime->mmap_count) ||
+ (substream->oss.setup && substream->oss.setup->nosilence)) {
+ sw_params->silence_threshold = 0;
+ sw_params->silence_size = 0;
+ } else {
+ snd_pcm_uframes_t frames;
+ frames = runtime->period_size + 16;
+ if (frames > runtime->buffer_size)
+ frames = runtime->buffer_size;
+ sw_params->silence_threshold = frames;
+ sw_params->silence_size = frames;
+ }
if ((err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_SW_PARAMS, sw_params)) < 0) {
snd_printd("SW_PARAMS failed: %i\n", err);
@@ -567,6 +580,31 @@
return 0;
}
+static int snd_pcm_oss_capture_position_fixup(snd_pcm_substream_t *substream, snd_pcm_sframes_t *delay)
+{
+ snd_pcm_runtime_t *runtime;
+ snd_pcm_uframes_t frames;
+ int err = 0;
+
+ while (1) {
+ err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DELAY, delay);
+ if (err < 0)
+ break;
+ runtime = substream->runtime;
+ if (*delay <= (snd_pcm_sframes_t)runtime->buffer_size)
+ break;
+ /* in case of overrun, skip whole periods like OSS/Linux driver does */
+ /* until avail(delay) <= buffer_size */
+ frames = (*delay - runtime->buffer_size) + runtime->period_size - 1;
+ frames /= runtime->period_size;
+ frames *= runtime->period_size;
+ err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_FORWARD, &frames);
+ if (err < 0)
+ break;
+ }
+ return err;
+}
+
snd_pcm_sframes_t snd_pcm_oss_write3(snd_pcm_substream_t *substream, const char *ptr, snd_pcm_uframes_t frames, int in_kernel)
{
snd_pcm_runtime_t *runtime = substream->runtime;
@@ -574,6 +612,12 @@
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
+#ifdef OSS_DEBUG
+ if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
+ printk("pcm_oss: write: recovering from XRUN\n");
+ else
+ printk("pcm_oss: write: recovering from SUSPEND\n");
+#endif
ret = snd_pcm_oss_prepare(substream);
if (ret < 0)
break;
@@ -599,10 +643,17 @@
snd_pcm_sframes_t snd_pcm_oss_read3(snd_pcm_substream_t *substream, char *ptr, snd_pcm_uframes_t frames, int in_kernel)
{
snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_pcm_sframes_t delay;
int ret;
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
+#ifdef OSS_DEBUG
+ if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
+ printk("pcm_oss: read: recovering from XRUN\n");
+ else
+ printk("pcm_oss: read: recovering from SUSPEND\n");
+#endif
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DRAIN, 0);
if (ret < 0)
break;
@@ -611,6 +662,9 @@
if (ret < 0)
break;
}
+ ret = snd_pcm_oss_capture_position_fixup(substream, &delay);
+ if (ret < 0)
+ break;
if (in_kernel) {
mm_segment_t fs;
fs = snd_enter_user();
@@ -640,6 +694,12 @@
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
+#ifdef OSS_DEBUG
+ if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
+ printk("pcm_oss: writev: recovering from XRUN\n");
+ else
+ printk("pcm_oss: writev: recovering from SUSPEND\n");
+#endif
ret = snd_pcm_oss_prepare(substream);
if (ret < 0)
break;
@@ -670,6 +730,12 @@
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
+#ifdef OSS_DEBUG
+ if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
+ printk("pcm_oss: readv: recovering from XRUN\n");
+ else
+ printk("pcm_oss: readv: recovering from SUSPEND\n");
+#endif
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DRAIN, 0);
if (ret < 0)
break;
@@ -746,8 +812,9 @@
buf += tmp;
bytes -= tmp;
xfer += tmp;
- if (runtime->oss.buffer_used == runtime->oss.period_bytes) {
- tmp = snd_pcm_oss_write2(substream, runtime->oss.buffer, runtime->oss.period_bytes, 1);
+ if (substream->oss.setup == NULL || !substream->oss.setup->wholefrag ||
+ runtime->oss.buffer_used == runtime->oss.period_bytes) {
+ tmp = snd_pcm_oss_write2(substream, runtime->oss.buffer, runtime->oss.buffer_used, 1);
if (tmp <= 0)
return xfer > 0 ? (snd_pcm_sframes_t)xfer : tmp;
runtime->oss.bytes += tmp;
@@ -855,6 +922,22 @@
return 0;
}
+static int snd_pcm_oss_post(snd_pcm_oss_file_t *pcm_oss_file)
+{
+ snd_pcm_substream_t *substream;
+ int err;
+
+ substream = pcm_oss_file->streams[SNDRV_PCM_STREAM_PLAYBACK];
+ if (substream != NULL) {
+ if ((err = snd_pcm_oss_make_ready(substream)) < 0)
+ return err;
+ snd_pcm_kernel_playback_ioctl(substream, SNDRV_PCM_IOCTL_START, 0);
+ }
+ /* note: all errors from the start action are ignored */
+ /* OSS apps do not know, how to handle them */
+ return 0;
+}
+
static int snd_pcm_oss_sync(snd_pcm_oss_file_t *pcm_oss_file)
{
int err = 0;
@@ -1188,6 +1271,10 @@
snd_pcm_runtime_t *runtime;
snd_pcm_substream_t *psubstream = NULL, *csubstream = NULL;
int err, cmd;
+
+#ifdef OSS_DEBUG
+ printk("pcm_oss: trigger = 0x%x\n", trigger);
+#endif
psubstream = pcm_oss_file->streams[SNDRV_PCM_STREAM_PLAYBACK];
csubstream = pcm_oss_file->streams[SNDRV_PCM_STREAM_CAPTURE];
@@ -1288,7 +1375,7 @@
{
snd_pcm_substream_t *substream;
snd_pcm_runtime_t *runtime;
- snd_pcm_status_t status;
+ snd_pcm_sframes_t delay;
struct count_info info;
int err;
@@ -1306,14 +1393,17 @@
return -EFAULT;
return 0;
}
- memset(&status, 0, sizeof(status));
- err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_STATUS, &status);
+ if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DELAY, &delay);
+ } else {
+ err = snd_pcm_oss_capture_position_fixup(substream, &delay);
+ }
if (err < 0)
return err;
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
- info.bytes = runtime->oss.bytes - snd_pcm_oss_bytes(substream, runtime->buffer_size - status.avail);
+ info.bytes = runtime->oss.bytes - snd_pcm_oss_bytes(substream, delay);
} else {
- info.bytes = runtime->oss.bytes + snd_pcm_oss_bytes(substream, status.avail);
+ info.bytes = runtime->oss.bytes + snd_pcm_oss_bytes(substream, delay);
}
info.ptr = snd_pcm_oss_bytes(substream, runtime->status->hw_ptr % runtime->buffer_size);
if (atomic_read(&runtime->mmap_count)) {
@@ -1326,10 +1416,7 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
snd_pcm_oss_simulate_fill(substream);
} else {
- if (stream == SNDRV_PCM_STREAM_PLAYBACK)
- info.blocks = (runtime->buffer_size - status.avail) / runtime->period_size;
- else
- info.blocks = status.avail / runtime->period_size;
+ info.blocks = delay / runtime->period_size;
}
if (copy_to_user(_info, &info, sizeof(info)))
return -EFAULT;
@@ -1340,7 +1427,7 @@
{
snd_pcm_substream_t *substream;
snd_pcm_runtime_t *runtime;
- snd_pcm_status_t status;
+ snd_pcm_sframes_t avail;
struct audio_buf_info info;
int err;
@@ -1357,7 +1444,6 @@
info.fragsize = runtime->oss.period_bytes;
info.fragstotal = runtime->periods;
- memset(&status, 0, sizeof(status));
if (runtime->oss.prepare) {
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
info.bytes = runtime->oss.period_bytes * runtime->periods;
@@ -1367,21 +1453,21 @@
info.fragments = 0;
}
} else {
- err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_STATUS, &status);
+ if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DELAY, &avail);
+ avail = runtime->buffer_size - avail;
+ } else {
+ err = snd_pcm_oss_capture_position_fixup(substream, &avail);
+ }
if (err < 0)
return err;
- info.bytes = snd_pcm_oss_bytes(substream, status.avail);
- info.fragments = status.avail / runtime->period_size;
+ info.bytes = snd_pcm_oss_bytes(substream, avail);
+ info.fragments = avail / runtime->period_size;
}
-#if 0
- /* very experimental stuff to get Quake2 working */
- runtime->oss.period = (info.periods - 1) << 16;
- for (tmp = info.fragsize; tmp > 1; tmp >>= 1)
- runtime->oss.period++;
- runtime->oss.subdivision = 1; /* disable SUBDIVIDE */
+#ifdef OSS_DEBUG
+ printk("pcm_oss: space: bytes = %i, fragments = %i, fragstotal = %i, fragsize = %i\n", info.bytes, info.fragments, info.fragstotal, info.fragsize);
#endif
- // printk("space: bytes = %i, periods = %i, fragstotal = %i, fragsize = %i\n", info.bytes, info.periods, info.fragstotal, info.fragsize);
if (copy_to_user(_info, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -1727,6 +1813,9 @@
#endif
if (((cmd >> 8) & 0xff) != 'P')
return -EINVAL;
+#ifdef OSS_DEBUG
+ printk("pcm_oss: ioctl = 0x%x\n", cmd);
+#endif
switch (cmd) {
case SNDCTL_DSP_RESET:
return snd_pcm_oss_reset(pcm_oss_file);
@@ -1782,8 +1871,8 @@
case SOUND_PCM_WRITE_FILTER:
case SOUND_PCM_READ_FILTER:
return -EIO;
- case SNDCTL_DSP_POST: /* to do */
- return 0;
+ case SNDCTL_DSP_POST:
+ return snd_pcm_oss_post(pcm_oss_file);
case SNDCTL_DSP_SUBDIVIDE:
if (get_user(res, (int *)arg))
return -EFAULT;
@@ -1866,7 +1955,15 @@
substream = pcm_oss_file->streams[SNDRV_PCM_STREAM_CAPTURE];
if (substream == NULL)
return -ENXIO;
+#ifndef OSS_DEBUG
return snd_pcm_oss_read1(substream, buf, count);
+#else
+ {
+ ssize_t res = snd_pcm_oss_read1(substream, buf, count);
+ printk("pcm_oss: read %li bytes (returned %li bytes)\n", (long)count, (long)res);
+ return res;
+ }
+#endif
}
static ssize_t snd_pcm_oss_write(struct file *file, const char *buf, size_t count, loff_t *offset)
@@ -1882,6 +1979,9 @@
up(&file->f_dentry->d_inode->i_sem);
result = snd_pcm_oss_write1(substream, buf, count);
down(&file->f_dentry->d_inode->i_sem);
+#ifdef OSS_DEBUG
+ printk("pcm_oss: write %li bytes (wrote %li bytes)\n", (long)count, (long)result);
+#endif
return result;
}
@@ -1927,12 +2027,20 @@
}
if (csubstream != NULL) {
snd_pcm_runtime_t *runtime = csubstream->runtime;
+ enum sndrv_pcm_state ostate;
poll_wait(file, &runtime->sleep, wait);
snd_pcm_stream_lock_irq(csubstream);
- if (runtime->status->state != SNDRV_PCM_STATE_RUNNING ||
+ if ((ostate = runtime->status->state) != SNDRV_PCM_STATE_RUNNING ||
snd_pcm_oss_capture_ready(csubstream))
mask |= POLLIN | POLLRDNORM;
snd_pcm_stream_unlock_irq(csubstream);
+ if (ostate != SNDRV_PCM_STATE_RUNNING && runtime->oss.trigger) {
+ snd_pcm_oss_file_t ofile;
+ memset(&ofile, 0, sizeof(ofile));
+ ofile.streams[SNDRV_PCM_STREAM_CAPTURE] = pcm_oss_file->streams[SNDRV_PCM_STREAM_CAPTURE];
+ runtime->oss.trigger = 0;
+ snd_pcm_oss_set_trigger(&ofile, PCM_ENABLE_INPUT);
+ }
}
return mask;
@@ -1945,6 +2053,9 @@
snd_pcm_runtime_t *runtime;
int err;
+#ifdef OSS_DEBUG
+ printk("pcm_oss: mmap begin\n");
+#endif
pcm_oss_file = snd_magic_cast(snd_pcm_oss_file_t, file->private_data, return -ENXIO);
switch ((area->vm_flags & (VM_READ | VM_WRITE))) {
case VM_READ | VM_WRITE:
@@ -1988,6 +2099,9 @@
if (err < 0)
return err;
runtime->oss.mmap_bytes = area->vm_end - area->vm_start;
+#ifdef OSS_DEBUG
+ printk("pcm_oss: mmap ok, bytes = 0x%x\n", runtime->oss.mmap_bytes);
+#endif
/* In mmap mode we never stop */
runtime->stop_threshold = runtime->boundary;
@@ -2005,14 +2119,16 @@
snd_pcm_oss_setup_t *setup = pstr->oss.setup_list;
down(&pstr->oss.setup_mutex);
while (setup) {
- snd_iprintf(buffer, "%s %u %u%s%s%s%s\n",
+ snd_iprintf(buffer, "%s %u %u%s%s%s%s%s%s\n",
setup->task_name,
setup->periods,
setup->period_size,
setup->disable ? " disable" : "",
setup->direct ? " direct" : "",
setup->block ? " block" : "",
- setup->nonblock ? " non-block" : "");
+ setup->nonblock ? " non-block" : "",
+ setup->wholefrag ? " whole-frag" : "",
+ setup->nosilence ? " no-silence" : "");
setup = setup->next;
}
up(&pstr->oss.setup_mutex);
@@ -2078,6 +2194,10 @@
template.block = 1;
} else if (!strcmp(str, "non-block")) {
template.nonblock = 1;
+ } else if (!strcmp(str, "whole-frag")) {
+ template.wholefrag = 1;
+ } else if (!strcmp(str, "no-silence")) {
+ template.nosilence = 1;
}
} while (*str);
if (setup == NULL) {
@@ -2269,3 +2389,24 @@
module_init(alsa_pcm_oss_init)
module_exit(alsa_pcm_oss_exit)
+
+#ifndef MODULE
+
+/* format is: snd-pcm-oss=dsp_map,adsp_map[,nonblock_open] */
+
+static int __init alsa_pcm_oss_setup(char *str)
+{
+ static unsigned __initdata nr_dev = 0;
+
+ if (nr_dev >= SNDRV_CARDS)
+ return 0;
+ (void)(get_option(&str,&dsp_map[nr_dev]) == 2 &&
+ get_option(&str,&adsp_map[nr_dev]) == 2);
+ (void)(get_option(&str,&nonblock_open) == 2);
+ nr_dev++;
+ return 1;
+}
+
+__setup("snd-pcm-oss=", alsa_pcm_oss_setup);
+
+#endif /* !MODULE */
diff -Nru a/sound/core/oss/pcm_plugin.c b/sound/core/oss/pcm_plugin.c
--- a/sound/core/oss/pcm_plugin.c Sun Aug 3 13:14:46 2003
+++ b/sound/core/oss/pcm_plugin.c Sun Aug 3 13:14:46 2003
@@ -56,6 +56,17 @@
return 0;
}
+/*
+ * because some cards might have rates "very close", we ignore
+ * all "resampling" requests within +-5%
+ */
+static int rate_match(unsigned int src_rate, unsigned int dst_rate)
+{
+ unsigned int low = (src_rate * 95) / 100;
+ unsigned int high = (src_rate * 105) / 100;
+ return dst_rate >= low && dst_rate <= high;
+}
+
static int snd_pcm_plugin_alloc(snd_pcm_plugin_t *plugin, snd_pcm_uframes_t frames)
{
snd_pcm_plugin_format_t *format;
@@ -80,11 +91,14 @@
plugin->buf = vmalloc(size);
plugin->buf_frames = frames;
}
- if (!plugin->buf)
+ if (!plugin->buf) {
+ plugin->buf_frames = 0;
return -ENOMEM;
+ }
c = plugin->buf_channels;
if (plugin->access == SNDRV_PCM_ACCESS_RW_INTERLEAVED) {
for (channel = 0; channel < format->channels; channel++, c++) {
+ c->frames = frames;
c->enabled = 1;
c->wanted = 0;
c->area.addr = plugin->buf;
@@ -95,6 +109,7 @@
snd_assert((size % format->channels) == 0,);
size /= format->channels;
for (channel = 0; channel < format->channels; channel++, c++) {
+ c->frames = frames;
c->enabled = 1;
c->wanted = 0;
c->area.addr = plugin->buf + (channel * size);
@@ -420,7 +435,7 @@
/* Format change (linearization) */
if ((srcformat.format != dstformat.format ||
- srcformat.rate != dstformat.rate ||
+ !rate_match(srcformat.rate, dstformat.rate) ||
srcformat.channels != dstformat.channels) &&
!snd_pcm_format_linear(srcformat.format)) {
if (snd_pcm_format_linear(dstformat.format))
@@ -468,7 +483,7 @@
ttable[v * sv + v] = FULL;
}
tmpformat.channels = dstformat.channels;
- if (srcformat.rate == dstformat.rate &&
+ if (rate_match(srcformat.rate, dstformat.rate) &&
snd_pcm_format_linear(dstformat.format))
tmpformat.format = dstformat.format;
err = snd_pcm_plugin_build_route(plug,
@@ -490,7 +505,7 @@
}
/* rate resampling */
- if (srcformat.rate != dstformat.rate) {
+ if (!rate_match(srcformat.rate, dstformat.rate)) {
tmpformat.rate = dstformat.rate;
if (srcformat.channels == dstformat.channels &&
snd_pcm_format_linear(dstformat.format))
diff -Nru a/sound/core/oss/pcm_plugin.h b/sound/core/oss/pcm_plugin.h
--- a/sound/core/oss/pcm_plugin.h Sun Aug 3 13:14:51 2003
+++ b/sound/core/oss/pcm_plugin.h Sun Aug 3 13:14:51 2003
@@ -106,6 +106,7 @@
typedef struct _snd_pcm_plugin_channel {
void *aptr; /* pointer to the allocated area */
snd_pcm_channel_area_t area;
+ snd_pcm_uframes_t frames; /* allocated frames */
unsigned int enabled:1; /* channel need to be processed */
unsigned int wanted:1; /* channel is wanted */
} snd_pcm_plugin_channel_t;
diff -Nru a/sound/core/oss/plugin_ops.h b/sound/core/oss/plugin_ops.h
--- a/sound/core/oss/plugin_ops.h Sun Aug 3 13:14:47 2003
+++ b/sound/core/oss/plugin_ops.h Sun Aug 3 13:14:47 2003
@@ -323,7 +323,7 @@
#ifdef PUT_S16_LABELS
/* dst_wid dst_endswap unsigned */
-static void *put_s16_labels[4 * 2 * 2 * 4 * 2] = {
+static void *put_s16_labels[4 * 2 * 2] = {
&&put_s16_xx12_xxx1, /* 16h -> 8h */
&&put_s16_xx12_xxx9, /* 16h ^> 8h */
&&put_s16_xx12_xxx1, /* 16h -> 8s */
diff -Nru a/sound/core/oss/rate.c b/sound/core/oss/rate.c
--- a/sound/core/oss/rate.c Sun Aug 3 13:14:48 2003
+++ b/sound/core/oss/rate.c Sun Aug 3 13:14:48 2003
@@ -85,11 +85,7 @@
#undef PUT_S16_LABELS
void *get = get_s16_labels[data->get];
void *put = put_s16_labels[data->put];
- void *get_s16_end = 0;
signed short sample = 0;
-#define GET_S16_END *get_s16_end
-#include "plugin_ops.h"
-#undef GET_S16_END
for (channel = 0; channel < plugin->src_format.channels; channel++) {
pos = data->pos;
@@ -108,24 +104,16 @@
dst_step = dst_channels[channel].area.step / 8;
src_frames1 = src_frames;
dst_frames1 = dst_frames;
- if (pos & ~R_MASK) {
- get_s16_end = &&after_get1;
- goto *get;
- after_get1:
- pos &= R_MASK;
- S1 = S2;
- S2 = sample;
- src += src_step;
- src_frames1--;
- }
while (dst_frames1-- > 0) {
if (pos & ~R_MASK) {
pos &= R_MASK;
S1 = S2;
if (src_frames1-- > 0) {
- get_s16_end = &&after_get2;
goto *get;
- after_get2:
+#define GET_S16_END after_get
+#include "plugin_ops.h"
+#undef GET_S16_END
+ after_get:
S2 = sample;
src += src_step;
}
@@ -318,6 +306,8 @@
#endif
dst_frames = rate_dst_frames(plugin, frames);
+ if (dst_frames > dst_channels[0].frames)
+ dst_frames = dst_channels[0].frames;
data = (rate_t *)plugin->extra_data;
data->func(plugin, src_channels, dst_channels, frames, dst_frames);
return dst_frames;
diff -Nru a/sound/core/oss/route.c b/sound/core/oss/route.c
--- a/sound/core/oss/route.c Sun Aug 3 13:14:52 2003
+++ b/sound/core/oss/route.c Sun Aug 3 13:14:52 2003
@@ -518,6 +518,10 @@
int sign, width, endian;
sign = !snd_pcm_format_signed(format);
width = snd_pcm_format_width(format) / 8 - 1;
+ if (width < 0 || width > 3) {
+ snd_printk(KERN_ERR "snd-pcm-oss: invalid format %d\n", format);
+ width = 0;
+ }
#ifdef SNDRV_LITTLE_ENDIAN
endian = snd_pcm_format_big_endian(format);
#else
diff -Nru a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
--- a/sound/core/pcm_lib.c Sun Aug 3 13:14:47 2003
+++ b/sound/core/pcm_lib.c Sun Aug 3 13:14:47 2003
@@ -60,7 +60,7 @@
return;
snd_assert(runtime->silence_filled <= runtime->buffer_size, return);
noise_dist = snd_pcm_playback_hw_avail(runtime) + runtime->silence_filled;
- if (noise_dist > (snd_pcm_sframes_t) runtime->silence_threshold)
+ if (noise_dist >= (snd_pcm_sframes_t) runtime->silence_threshold)
return;
frames = runtime->silence_threshold - noise_dist;
if (frames > runtime->silence_size)
@@ -84,10 +84,9 @@
if ((snd_pcm_sframes_t)runtime->silence_start < 0)
runtime->silence_start += runtime->boundary;
}
- frames = runtime->buffer_size;
+ frames = runtime->buffer_size - runtime->silence_filled;
}
- snd_assert(frames >= runtime->silence_filled, return);
- frames -= runtime->silence_filled;
+ snd_assert(frames <= runtime->buffer_size, return);
if (frames == 0)
return;
ofs = (runtime->silence_start + runtime->silence_filled) % runtime->buffer_size;
@@ -1932,7 +1931,7 @@
if (runtime->silence_size >= runtime->boundary) {
frames = 1;
} else if (runtime->silence_size > 0 &&
- runtime->silence_filled < runtime->buffer_size) {
+ runtime->silence_filled < runtime->buffer_size) {
snd_pcm_sframes_t noise_dist;
noise_dist = snd_pcm_playback_hw_avail(runtime) + runtime->silence_filled;
snd_assert(noise_dist <= (snd_pcm_sframes_t)runtime->silence_threshold, );
diff -Nru a/sound/core/pcm_memory.c b/sound/core/pcm_memory.c
--- a/sound/core/pcm_memory.c Sun Aug 3 13:14:50 2003
+++ b/sound/core/pcm_memory.c Sun Aug 3 13:14:50 2003
@@ -22,6 +22,7 @@
#include <sound/driver.h>
#include <asm/io.h>
#include <linux/time.h>
+#include <linux/init.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/info.h>
@@ -568,3 +569,18 @@
}
#endif /* CONFIG_PCI */
+
+#ifndef MODULE
+
+/* format is: snd-pcm=preallocate_dma,maximum_substreams */
+
+static int __init alsa_pcm_setup(char *str)
+{
+ (void)(get_option(&str,&preallocate_dma) == 2 &&
+ get_option(&str,&maximum_substreams) == 2);
+ return 1;
+}
+
+__setup("snd-pcm=", alsa_pcm_setup);
+
+#endif /* ifndef MODULE */
diff -Nru a/sound/core/pcm_native.c b/sound/core/pcm_native.c
--- a/sound/core/pcm_native.c Sun Aug 3 13:14:47 2003
+++ b/sound/core/pcm_native.c Sun Aug 3 13:14:47 2003
@@ -461,9 +461,15 @@
if (params->xfer_align == 0 ||
params->xfer_align % runtime->min_align != 0)
return -EINVAL;
- if ((params->silence_threshold != 0 || params->silence_size < runtime->boundary) &&
- (params->silence_threshold + params->silence_size > runtime->buffer_size))
- return -EINVAL;
+ if (params->silence_size >= runtime->boundary) {
+ if (params->silence_threshold != 0)
+ return -EINVAL;
+ } else {
+ if (params->silence_size > params->silence_threshold)
+ return -EINVAL;
+ if (params->silence_threshold > runtime->buffer_size)
+ return -EINVAL;
+ }
snd_pcm_stream_lock_irq(substream);
runtime->tstamp_mode = params->tstamp_mode;
runtime->sleep_min = params->sleep_min;
diff -Nru a/sound/core/rawmidi.c b/sound/core/rawmidi.c
--- a/sound/core/rawmidi.c Sun Aug 3 13:14:45 2003
+++ b/sound/core/rawmidi.c Sun Aug 3 13:14:45 2003
@@ -1437,7 +1437,7 @@
return snd_rawmidi_free(rmidi);
}
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
static void snd_rawmidi_dev_seq_free(snd_seq_device_t *device)
{
snd_rawmidi_t *rmidi = snd_magic_cast(snd_rawmidi_t, device->private_data, return);
@@ -1513,7 +1513,7 @@
}
}
rmidi->proc_entry = entry;
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (!rmidi->ops || !rmidi->ops->dev_register) { /* own registration mechanism */
if (snd_seq_device_new(rmidi->card, rmidi->device, SNDRV_SEQ_DEV_ID_MIDISYNTH, 0, &rmidi->seq_dev) >= 0) {
rmidi->seq_dev->private_data = rmidi;
@@ -1568,7 +1568,7 @@
rmidi->ops->dev_unregister(rmidi);
snd_unregister_device(SNDRV_DEVICE_TYPE_RAWMIDI, rmidi->card, rmidi->device);
up(®ister_mutex);
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (rmidi->seq_dev) {
snd_device_free(rmidi->card, rmidi->seq_dev);
rmidi->seq_dev = NULL;
@@ -1629,6 +1629,26 @@
module_init(alsa_rawmidi_init)
module_exit(alsa_rawmidi_exit)
+
+#ifndef MODULE
+#ifdef CONFIG_SND_OSSEMUL
+/* format is: snd-rawmidi=midi_map,amidi_map */
+
+static int __init alsa_rawmidi_setup(char *str)
+{
+ static unsigned __initdata nr_dev = 0;
+
+ if (nr_dev >= SNDRV_CARDS)
+ return 0;
+ (void)(get_option(&str,&midi_map[nr_dev]) == 2 &&
+ get_option(&str,&amidi_map[nr_dev]) == 2);
+ nr_dev++;
+ return 1;
+}
+
+__setup("snd-rawmidi=", alsa_rawmidi_setup);
+#endif /* CONFIG_SND_OSSEMUL */
+#endif /* ifndef MODULE */
EXPORT_SYMBOL(snd_rawmidi_output_params);
EXPORT_SYMBOL(snd_rawmidi_input_params);
diff -Nru a/sound/core/rtctimer.c b/sound/core/rtctimer.c
--- a/sound/core/rtctimer.c Sun Aug 3 13:14:51 2003
+++ b/sound/core/rtctimer.c Sun Aug 3 13:14:51 2003
@@ -57,7 +57,7 @@
.stop = rtctimer_stop,
};
-int rtctimer_freq = RTC_FREQ; /* frequency */
+static int rtctimer_freq = RTC_FREQ; /* frequency */
static snd_timer_t *rtctimer;
static atomic_t rtc_inc = ATOMIC_INIT(0);
static rtc_task_t rtc_task;
@@ -181,5 +181,17 @@
MODULE_PARM_DESC(rtctimer_freq, "timer frequency in Hz");
MODULE_LICENSE("GPL");
+
+#ifndef MODULE
+/* format is: snd-rtctimer=freq */
+
+static int __init rtctimer_setup(char *str)
+{
+ (void)(get_option(&str,&rtctimer_freq) == 2);
+ return 1;
+}
+
+__setup("snd-rtctimer=", rtctimer_setup);
+#endif /* ifndef MODULE */
#endif /* CONFIG_RTC || CONFIG_RTC_MODULE */
diff -Nru a/sound/core/seq/seq_clientmgr.c b/sound/core/seq/seq_clientmgr.c
--- a/sound/core/seq/seq_clientmgr.c Sun Aug 3 13:14:45 2003
+++ b/sound/core/seq/seq_clientmgr.c Sun Aug 3 13:14:45 2003
@@ -521,6 +521,32 @@
/*
+ * rewrite the time-stamp of the event record with the curren time
+ * of the given queue.
+ * return non-zero if updated.
+ */
+static int update_timestamp_of_queue(snd_seq_event_t *event, int queue, int real_time)
+{
+ queue_t *q;
+
+ q = queueptr(queue);
+ if (! q)
+ return 0;
+ event->queue = queue;
+ event->flags &= ~SNDRV_SEQ_TIME_STAMP_MASK;
+ if (real_time) {
+ event->time.time = snd_seq_timer_get_cur_time(q->timer);
+ event->flags |= SNDRV_SEQ_TIME_STAMP_REAL;
+ } else {
+ event->time.tick = snd_seq_timer_get_cur_tick(q->timer);
+ event->flags |= SNDRV_SEQ_TIME_STAMP_TICK;
+ }
+ queuefree(q);
+ return 1;
+}
+
+
+/*
* deliver an event to the specified destination.
* if filter is non-zero, client filter bitmap is tested.
*
@@ -551,6 +577,10 @@
goto __skip;
}
+ if (dest_port->timestamping)
+ update_timestamp_of_queue(event, dest_port->time_queue,
+ dest_port->time_real);
+
/* expand the quoted event */
if (event->type == SNDRV_SEQ_EVENT_KERNEL_QUOTE) {
quoted = 1;
@@ -597,27 +627,6 @@
}
-static void snd_seq_subs_update_event_header(subscribers_t *subs, snd_seq_event_t *event)
-{
- if (subs->info.flags & SNDRV_SEQ_PORT_SUBS_TIMESTAMP) {
- /* convert time according to flag with subscription */
- queue_t *q;
- q = queueptr(subs->info.queue);
- if (q) {
- event->queue = subs->info.queue;
- event->flags &= ~SNDRV_SEQ_TIME_STAMP_MASK;
- if (subs->info.flags & SNDRV_SEQ_PORT_SUBS_TIME_REAL) {
- event->time.time = snd_seq_timer_get_cur_time(q->timer);
- event->flags |= SNDRV_SEQ_TIME_STAMP_REAL;
- } else {
- event->time.tick = snd_seq_timer_get_cur_tick(q->timer);
- event->flags |= SNDRV_SEQ_TIME_STAMP_TICK;
- }
- queuefree(q);
- }
- }
-}
-
/*
* send the event to all subscribers:
*/
@@ -647,7 +656,10 @@
list_for_each(p, &grp->list_head) {
subs = list_entry(p, subscribers_t, src_list);
event->dest = subs->info.dest;
- snd_seq_subs_update_event_header(subs, event);
+ if (subs->info.flags & SNDRV_SEQ_PORT_SUBS_TIMESTAMP)
+ /* convert time according to flag with subscription */
+ update_timestamp_of_queue(event, subs->info.queue,
+ subs->info.flags & SNDRV_SEQ_PORT_SUBS_TIME_REAL);
err = snd_seq_deliver_single_event(client, event,
0, atomic, hop);
if (err < 0)
diff -Nru a/sound/core/seq/seq_midi_event.c b/sound/core/seq/seq_midi_event.c
--- a/sound/core/seq/seq_midi_event.c Sun Aug 3 13:14:44 2003
+++ b/sound/core/seq/seq_midi_event.c Sun Aug 3 13:14:44 2003
@@ -98,14 +98,15 @@
};
static int extra_decode_ctrl14(snd_midi_event_t *dev, unsigned char *buf, int len, snd_seq_event_t *ev);
+static int extra_decode_xrpn(snd_midi_event_t *dev, unsigned char *buf, int count, snd_seq_event_t *ev);
static struct extra_event_list_t {
int event;
int (*decode)(snd_midi_event_t *dev, unsigned char *buf, int len, snd_seq_event_t *ev);
} extra_event[] = {
{SNDRV_SEQ_EVENT_CONTROL14, extra_decode_ctrl14},
- /*{SNDRV_SEQ_EVENT_NONREGPARAM, extra_decode_nrpn},*/
- /*{SNDRV_SEQ_EVENT_REGPARAM, extra_decode_rpn},*/
+ {SNDRV_SEQ_EVENT_NONREGPARAM, extra_decode_xrpn},
+ {SNDRV_SEQ_EVENT_REGPARAM, extra_decode_xrpn},
};
/*
@@ -441,12 +442,12 @@
unsigned char cmd;
int idx = 0;
- if (ev->data.control.param < 32) {
+ cmd = MIDI_CMD_CONTROL|(ev->data.control.channel & 0x0f);
+ if (ev->data.control.param < 0x20) {
if (count < 4)
return -ENOMEM;
if (dev->nostat && count < 6)
return -ENOMEM;
- cmd = MIDI_CMD_CONTROL|(ev->data.control.channel & 0x0f);
if (cmd != dev->lastcmd || dev->nostat) {
if (count < 5)
return -ENOMEM;
@@ -456,13 +457,11 @@
buf[idx++] = (ev->data.control.value >> 7) & 0x7f;
if (dev->nostat)
buf[idx++] = cmd;
- buf[idx++] = ev->data.control.param + 32;
+ buf[idx++] = ev->data.control.param + 0x20;
buf[idx++] = ev->data.control.value & 0x7f;
- return idx;
} else {
if (count < 2)
return -ENOMEM;
- cmd = MIDI_CMD_CONTROL|(ev->data.control.channel & 0x0f);
if (cmd != dev->lastcmd || dev->nostat) {
if (count < 3)
return -ENOMEM;
@@ -470,8 +469,48 @@
}
buf[idx++] = ev->data.control.param & 0x7f;
buf[idx++] = ev->data.control.value & 0x7f;
- return idx;
}
+ return idx;
+}
+
+/* decode reg/nonreg param */
+static int extra_decode_xrpn(snd_midi_event_t *dev, unsigned char *buf, int count, snd_seq_event_t *ev)
+{
+ unsigned char cmd;
+ char *cbytes;
+ static char cbytes_nrpn[4] = { MIDI_CTL_NONREG_PARM_NUM_MSB,
+ MIDI_CTL_NONREG_PARM_NUM_LSB,
+ MIDI_CTL_MSB_DATA_ENTRY,
+ MIDI_CTL_LSB_DATA_ENTRY };
+ static char cbytes_rpn[4] = { MIDI_CTL_REGIST_PARM_NUM_MSB,
+ MIDI_CTL_REGIST_PARM_NUM_LSB,
+ MIDI_CTL_MSB_DATA_ENTRY,
+ MIDI_CTL_LSB_DATA_ENTRY };
+ unsigned char bytes[4];
+ int idx = 0, i;
+
+ if (count < 8)
+ return -ENOMEM;
+ if (dev->nostat && count < 12)
+ return -ENOMEM;
+ cmd = MIDI_CMD_CONTROL|(ev->data.control.channel & 0x0f);
+ bytes[0] = ev->data.control.param & 0x007f;
+ bytes[1] = (ev->data.control.param & 0x3f80) >> 7;
+ bytes[2] = ev->data.control.value & 0x007f;
+ bytes[3] = (ev->data.control.value & 0x3f80) >> 7;
+ if (cmd != dev->lastcmd && !dev->nostat) {
+ if (count < 9)
+ return -ENOMEM;
+ buf[idx++] = dev->lastcmd = cmd;
+ }
+ cbytes = ev->type == SNDRV_SEQ_EVENT_NONREGPARAM ? cbytes_nrpn : cbytes_rpn;
+ for (i = 0; i < 4; i++) {
+ if (dev->nostat)
+ buf[idx++] = dev->lastcmd = cmd;
+ buf[idx++] = cbytes[i];
+ buf[idx++] = bytes[i];
+ }
+ return idx;
}
/*
diff -Nru a/sound/core/seq/seq_ports.c b/sound/core/seq/seq_ports.c
--- a/sound/core/seq/seq_ports.c Sun Aug 3 13:14:50 2003
+++ b/sound/core/seq/seq_ports.c Sun Aug 3 13:14:50 2003
@@ -352,6 +352,11 @@
port->midi_voices = info->midi_voices;
port->synth_voices = info->synth_voices;
+ /* timestamping */
+ port->timestamping = (info->flags & SNDRV_SEQ_PORT_FLG_TIMESTAMP) ? 1 : 0;
+ port->time_real = (info->flags & SNDRV_SEQ_PORT_FLG_TIME_REAL) ? 1 : 0;
+ port->time_queue = info->time_queue;
+
return 0;
}
@@ -378,6 +383,15 @@
info->read_use = port->c_src.count;
info->write_use = port->c_dest.count;
+ /* timestamping */
+ info->flags = 0;
+ if (port->timestamping) {
+ info->flags |= SNDRV_SEQ_PORT_FLG_TIMESTAMP;
+ if (port->time_real)
+ info->flags |= SNDRV_SEQ_PORT_FLG_TIME_REAL;
+ info->time_queue = port->time_queue;
+ }
+
return 0;
}
diff -Nru a/sound/core/seq/seq_ports.h b/sound/core/seq/seq_ports.h
--- a/sound/core/seq/seq_ports.h Sun Aug 3 13:14:50 2003
+++ b/sound/core/seq/seq_ports.h Sun Aug 3 13:14:50 2003
@@ -74,6 +74,9 @@
void *private_data;
unsigned int callback_all : 1;
unsigned int closing : 1;
+ unsigned int timestamping: 1;
+ unsigned int time_real: 1;
+ int time_queue;
/* capability, inport, output, sync */
unsigned int capability; /* port capability bits */
diff -Nru a/sound/core/sound.c b/sound/core/sound.c
--- a/sound/core/sound.c Sun Aug 3 13:14:50 2003
+++ b/sound/core/sound.c Sun Aug 3 13:14:50 2003
@@ -389,6 +389,24 @@
module_init(alsa_sound_init)
module_exit(alsa_sound_exit)
+#ifndef MODULE
+
+/* format is: snd=major,cards_limit[,device_mode] */
+
+static int __init alsa_sound_setup(char *str)
+{
+ (void)(get_option(&str,&major) == 2 &&
+ get_option(&str,&cards_limit) == 2);
+#ifdef CONFIG_DEVFS_FS
+ (void)(get_option(&str,&device_mode) == 2);
+#endif
+ return 1;
+}
+
+__setup("snd=", alsa_sound_setup);
+
+#endif /* ifndef MODULE */
+
/* sound.c */
EXPORT_SYMBOL(snd_major);
EXPORT_SYMBOL(snd_ecards_limit);
diff -Nru a/sound/core/sound_oss.c b/sound/core/sound_oss.c
--- a/sound/core/sound_oss.c Sun Aug 3 13:14:52 2003
+++ b/sound/core/sound_oss.c Sun Aug 3 13:14:52 2003
@@ -23,7 +23,7 @@
#ifdef CONFIG_SND_OSSEMUL
-#if !defined(CONFIG_SOUND) && !defined(CONFIG_SOUND_MODULE)
+#if !defined(CONFIG_SOUND) && !(defined(MODULE) && defined(CONFIG_SOUND_MODULE))
#error "Enable the OSS soundcore multiplexer (CONFIG_SOUND) in the kernel."
#endif
diff -Nru a/sound/core/timer.c b/sound/core/timer.c
--- a/sound/core/timer.c Sun Aug 3 13:14:49 2003
+++ b/sound/core/timer.c Sun Aug 3 13:14:49 2003
@@ -41,7 +41,7 @@
#define DEFAULT_TIMER_LIMIT 2
#endif
-int timer_limit = DEFAULT_TIMER_LIMIT;
+static int timer_limit = DEFAULT_TIMER_LIMIT;
MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Takashi Iwai <tiwai@suse.de>");
MODULE_DESCRIPTION("ALSA timer interface");
MODULE_LICENSE("GPL");
@@ -458,12 +458,14 @@
return -EINVAL;
spin_lock_irqsave(&timer->lock, flags);
list_del_init(&timeri->ack_list);
+#if 0 /* FIXME: this causes dead lock with the sequencer timer */
/* wait until the callback is finished */
while (timeri->flags & SNDRV_TIMER_IFLG_CALLBACK) {
spin_unlock_irqrestore(&timer->lock, flags);
udelay(10);
spin_lock_irqsave(&timer->lock, flags);
}
+#endif
list_del_init(&timeri->active_list);
if ((timeri->flags & SNDRV_TIMER_IFLG_RUNNING) &&
!(timeri->flags & SNDRV_TIMER_IFLG_SLAVE) &&
@@ -1688,10 +1690,11 @@
break;
}
}
- spin_unlock_irq(&tu->qlock);
if (err < 0)
break;
+ spin_unlock_irq(&tu->qlock);
+
if (tu->tread) {
if (copy_to_user(buffer, &tu->tqueue[tu->qhead++], sizeof(snd_timer_tread_t))) {
err = -EFAULT;
@@ -1712,6 +1715,7 @@
spin_lock_irq(&tu->qlock);
tu->qused--;
}
+ spin_unlock_irq(&tu->qlock);
return result > 0 ? result : err;
}
@@ -1801,6 +1805,18 @@
module_init(alsa_timer_init)
module_exit(alsa_timer_exit)
+
+#ifndef MODULE
+/* format is: snd-timer=timer_limit */
+
+static int __init alsa_timer_setup(char *str)
+{
+ (void)(get_option(&str,&timer_limit) == 2);
+ return 1;
+}
+
+__setup("snd-timer=", alsa_timer_setup);
+#endif /* ifndef MODULE */
EXPORT_SYMBOL(snd_timer_open);
EXPORT_SYMBOL(snd_timer_close);
diff -Nru a/sound/drivers/dummy.c b/sound/drivers/dummy.c
--- a/sound/drivers/dummy.c Sun Aug 3 13:14:52 2003
+++ b/sound/drivers/dummy.c Sun Aug 3 13:14:52 2003
@@ -69,6 +69,15 @@
#define USE_PERIODS_MAX 255
#endif
+#if 0 /* simple AC97 bridge (intel8x0) with 48kHz AC97 only codec */
+#define USE_FORMATS SNDRV_PCM_FMTBIT_S16_LE
+#define USE_CHANNELS_MIN 2
+#define USE_CHANNELS_MAX 2
+#define USE_RATE SNDRV_PCM_RATE_48000
+#define USE_RATE_MIN 48000
+#define USE_RATE_MAX 48000
+#endif
+
/* defaults */
#ifndef MAX_BUFFER_SIZE
@@ -77,6 +86,11 @@
#ifndef USE_FORMATS
#define USE_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE)
#endif
+#ifndef USE_RATE
+#define USE_RATE SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000
+#define USE_RATE_MIN 5500
+#define USE_RATE_MAX 48000
+#endif
#ifndef USE_CHANNELS_MIN
#define USE_CHANNELS_MIN 1
#endif
@@ -271,9 +285,9 @@
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = USE_FORMATS,
- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
- .rate_min = 5500,
- .rate_max = 48000,
+ .rates = USE_RATE,
+ .rate_min = USE_RATE_MIN,
+ .rate_max = USE_RATE_MAX,
.channels_min = USE_CHANNELS_MIN,
.channels_max = USE_CHANNELS_MAX,
.buffer_bytes_max = MAX_BUFFER_SIZE,
@@ -289,9 +303,9 @@
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = USE_FORMATS,
- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
- .rate_min = 5500,
- .rate_max = 48000,
+ .rates = USE_RATE,
+ .rate_min = USE_RATE_MIN,
+ .rate_max = USE_RATE_MAX,
.channels_min = USE_CHANNELS_MIN,
.channels_max = USE_CHANNELS_MAX,
.buffer_bytes_max = MAX_BUFFER_SIZE,
diff -Nru a/sound/drivers/opl3/opl3_lib.c b/sound/drivers/opl3/opl3_lib.c
--- a/sound/drivers/opl3/opl3_lib.c Sun Aug 3 13:14:46 2003
+++ b/sound/drivers/opl3/opl3_lib.c Sun Aug 3 13:14:46 2003
@@ -538,7 +538,7 @@
hw->ops.release = snd_opl3_release;
opl3->seq_dev_num = seq_device;
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
sizeof(opl3_t*), &opl3->seq_dev) >= 0) {
strcpy(opl3->seq_dev->name, hw->name);
diff -Nru a/sound/drivers/opl4/opl4_lib.c b/sound/drivers/opl4/opl4_lib.c
--- a/sound/drivers/opl4/opl4_lib.c Sun Aug 3 13:14:52 2003
+++ b/sound/drivers/opl4/opl4_lib.c Sun Aug 3 13:14:52 2003
@@ -20,6 +20,7 @@
#include "opl4_local.h"
#include <sound/initval.h>
#include <linux/ioport.h>
+#include <linux/init.h>
#include <asm/io.h>
MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
@@ -137,7 +138,7 @@
return 0;
}
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
static void snd_opl4_seq_dev_free(snd_seq_device_t *seq_dev)
{
opl4_t *opl4 = snd_magic_cast(opl4_t, seq_dev->private_data, return);
@@ -243,7 +244,7 @@
snd_opl4_create_proc(opl4);
#endif
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
opl4->seq_client = -1;
if (opl4->hardware < OPL3_HW_OPL4_ML)
snd_opl4_create_seq_dev(opl4, seq_device);
diff -Nru a/sound/drivers/opl4/opl4_local.h b/sound/drivers/opl4/opl4_local.h
--- a/sound/drivers/opl4/opl4_local.h Sun Aug 3 13:14:48 2003
+++ b/sound/drivers/opl4/opl4_local.h Sun Aug 3 13:14:48 2003
@@ -163,8 +163,10 @@
int note;
int velocity;
const opl4_sound_t *sound;
+ u8 level_direct;
u8 reg_f_number;
u8 reg_misc;
+ u8 reg_lfo_vibrato;
} opl4_voice_t;
struct opl4 {
diff -Nru a/sound/drivers/opl4/opl4_synth.c b/sound/drivers/opl4/opl4_synth.c
--- a/sound/drivers/opl4/opl4_synth.c Sun Aug 3 13:14:48 2003
+++ b/sound/drivers/opl4/opl4_synth.c Sun Aug 3 13:14:48 2003
@@ -267,11 +267,6 @@
2, 2, 2, 1, 1, 0, 0, 0
};
-static void snd_opl4_write_mask(opl4_t *opl4, u8 reg, u8 mask, u8 value)
-{
- snd_opl4_write(opl4, reg, ((snd_opl4_read(opl4, reg)) & ~mask) | (value & mask));
-}
-
/*
* Initializes all voices.
*/
@@ -302,7 +297,8 @@
int i;
for (i = 0; i < OPL4_MAX_VOICES; i++)
- snd_opl4_write_mask(opl4, OPL4_REG_MISC + i, OPL4_KEY_ON_BIT, 0);
+ snd_opl4_write(opl4, OPL4_REG_MISC + i,
+ opl4->voices[i].reg_misc & ~OPL4_KEY_ON_BIT);
}
/*
@@ -378,7 +374,9 @@
att = 0;
else if (att > 0x7e)
att = 0x7e;
- snd_opl4_write(opl4, OPL4_REG_LEVEL + voice->number, att << 1);
+ snd_opl4_write(opl4, OPL4_REG_LEVEL + voice->number,
+ (att << 1) | voice->level_direct);
+ voice->level_direct = 0;
}
static void snd_opl4_update_pan(opl4_t *opl4, opl4_voice_t *voice)
@@ -405,8 +403,10 @@
depth = (7 - voice->sound->vibrato)
* (voice->chan->control[MIDI_CTL_VIBRATO_DEPTH] & 0x7f);
depth = (depth >> 7) + voice->sound->vibrato;
- snd_opl4_write_mask(opl4, OPL4_REG_LFO_VIBRATO + voice->number,
- OPL4_VIBRATO_DEPTH_MASK, depth);
+ voice->reg_lfo_vibrato &= ~OPL4_VIBRATO_DEPTH_MASK;
+ voice->reg_lfo_vibrato |= depth & OPL4_VIBRATO_DEPTH_MASK;
+ snd_opl4_write(opl4, OPL4_REG_LFO_VIBRATO + voice->number,
+ voice->reg_lfo_vibrato);
}
static void snd_opl4_update_pitch(opl4_t *opl4, opl4_voice_t *voice)
@@ -441,8 +441,6 @@
static void snd_opl4_update_tone_parameters(opl4_t *opl4, opl4_voice_t *voice)
{
- snd_opl4_write(opl4, OPL4_REG_LFO_VIBRATO + voice->number,
- voice->sound->reg_lfo_vibrato);
snd_opl4_write(opl4, OPL4_REG_ATTACK_DECAY1 + voice->number,
voice->sound->reg_attack_decay1);
snd_opl4_write(opl4, OPL4_REG_LEVEL_DECAY2 + voice->number,
@@ -521,6 +519,7 @@
voice[i]->reg_misc = OPL4_LFO_RESET_BIT;
snd_opl4_update_pan(opl4, voice[i]);
snd_opl4_update_pitch(opl4, voice[i]);
+ voice[i]->level_direct = OPL4_LEVEL_DIRECT_BIT;
snd_opl4_update_volume(opl4, voice[i]);
}
@@ -530,6 +529,7 @@
/* set remaining parameters */
for (i = 0; i < voices; i++) {
snd_opl4_update_tone_parameters(opl4, voice[i]);
+ voice[i]->reg_lfo_vibrato = voice[i]->sound->reg_lfo_vibrato;
snd_opl4_update_vibrato_depth(opl4, voice[i]);
}
diff -Nru a/sound/drivers/vx/vx_core.c b/sound/drivers/vx/vx_core.c
--- a/sound/drivers/vx/vx_core.c Sun Aug 3 13:14:52 2003
+++ b/sound/drivers/vx/vx_core.c Sun Aug 3 13:14:52 2003
@@ -44,8 +44,7 @@
*/
void snd_vx_delay(vx_core_t *chip, int xmsec)
{
- if (! (chip->chip_status & VX_STAT_IN_SUSPEND) && ! in_interrupt() &&
- xmsec >= 1000 / HZ) {
+ if (! in_interrupt() && xmsec >= 1000 / HZ) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((xmsec * HZ + 999) / 1000);
} else {
@@ -632,6 +631,9 @@
snd_iprintf(buffer, "Frequency: %d\n", chip->freq);
snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected);
snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]);
+ snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n",
+ chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size,
+ chip->ibl.granularity);
}
static void vx_proc_init(vx_core_t *chip)
diff -Nru a/sound/i2c/cs8427.c b/sound/i2c/cs8427.c
--- a/sound/i2c/cs8427.c Sun Aug 3 13:14:44 2003
+++ b/sound/i2c/cs8427.c Sun Aug 3 13:14:44 2003
@@ -75,7 +75,7 @@
return res;
}
-static int snd_cs8427_reg_write(snd_i2c_device_t *device, unsigned char reg, unsigned char val)
+int snd_cs8427_reg_write(snd_i2c_device_t *device, unsigned char reg, unsigned char val)
{
int err;
unsigned char buf[2];
@@ -89,7 +89,7 @@
return 0;
}
-static int snd_cs8427_reg_read(snd_i2c_device_t *device, unsigned char reg)
+int snd_cs8427_reg_read(snd_i2c_device_t *device, unsigned char reg)
{
int err;
unsigned char buf;
@@ -561,6 +561,8 @@
EXPORT_SYMBOL(snd_cs8427_detect);
EXPORT_SYMBOL(snd_cs8427_create);
EXPORT_SYMBOL(snd_cs8427_reset);
+EXPORT_SYMBOL(snd_cs8427_reg_write);
+EXPORT_SYMBOL(snd_cs8427_reg_read);
EXPORT_SYMBOL(snd_cs8427_iec958_build);
EXPORT_SYMBOL(snd_cs8427_iec958_active);
EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
diff -Nru a/sound/i2c/other/ak4xxx-adda.c b/sound/i2c/other/ak4xxx-adda.c
--- a/sound/i2c/other/ak4xxx-adda.c Sun Aug 3 13:14:52 2003
+++ b/sound/i2c/other/ak4xxx-adda.c Sun Aug 3 13:14:52 2003
@@ -41,7 +41,7 @@
/* save the data */
if (ak->type == SND_AK4524 || ak->type == SND_AK4528) {
- if ((reg != 0x04 && reg != 0x05) || (reg & 0x80) == 0)
+ if ((reg != 0x04 && reg != 0x05) || (val & 0x80) == 0)
snd_akm4xxx_set(ak, chip, reg, val);
else
snd_akm4xxx_set_ipga(ak, chip, reg, val);
diff -Nru a/sound/isa/ad1848/ad1848.c b/sound/isa/ad1848/ad1848.c
--- a/sound/isa/ad1848/ad1848.c Sun Aug 3 13:14:49 2003
+++ b/sound/isa/ad1848/ad1848.c Sun Aug 3 13:14:49 2003
@@ -46,6 +46,7 @@
static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* PnP setup */
static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 5,7,9,11,12,15 */
static int dma1[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3,5,6,7 */
+static int thinkpad[SNDRV_CARDS]; /* Thinkpad special case */
MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
MODULE_PARM_DESC(index, "Index value for AD1848 soundcard.");
@@ -65,6 +66,9 @@
MODULE_PARM(dma1, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
MODULE_PARM_DESC(dma1, "DMA1 # for AD1848 driver.");
MODULE_PARM_SYNTAX(dma1, SNDRV_DMA_DESC);
+MODULE_PARM(thinkpad, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
+MODULE_PARM_DESC(thinkpad, "Enable only for the onboard CS4248 of IBM Thinkpad 360/750/755 series.");
+MODULE_PARM_SYNTAX(thinkpad, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
static snd_card_t *snd_ad1848_cards[SNDRV_CARDS] = SNDRV_DEFAULT_PTR;
@@ -77,15 +81,15 @@
int err;
if (port[dev] == SNDRV_AUTO_PORT) {
- snd_printk("specify port\n");
+ snd_printk(KERN_ERR "ad1848: specify port\n");
return -EINVAL;
}
if (irq[dev] == SNDRV_AUTO_IRQ) {
- snd_printk("specify irq\n");
+ snd_printk(KERN_ERR "ad1848: specify irq\n");
return -EINVAL;
}
if (dma1[dev] == SNDRV_AUTO_DMA) {
- snd_printk("specify dma1\n");
+ snd_printk(KERN_ERR "ad1848: specify dma1\n");
return -EINVAL;
}
@@ -96,7 +100,7 @@
if ((err = snd_ad1848_create(card, port[dev],
irq[dev],
dma1[dev],
- AD1848_HW_DETECT,
+ thinkpad[dev] ? AD1848_HW_THINKPAD : AD1848_HW_DETECT,
&chip)) < 0) {
snd_card_free(card);
return err;
@@ -116,6 +120,10 @@
sprintf(card->longname, "%s at 0x%lx, irq %d, dma %d",
pcm->name, chip->port, irq[dev], dma1[dev]);
+ if (thinkpad[dev]) {
+ strcat(card->longname, " [Thinkpad]");
+ }
+
if ((err = snd_card_register(card)) < 0) {
snd_card_free(card);
return err;
@@ -168,7 +176,8 @@
get_id(&str,&id[nr_dev]) == 2 &&
get_option(&str,(int *)&port[nr_dev]) == 2 &&
get_option(&str,&irq[nr_dev]) == 2 &&
- get_option(&str,&dma1[nr_dev]) == 2);
+ get_option(&str,&dma1[nr_dev]) == 2 &&
+ get_option(&str,&thinkpad[nr_dev]) == 2);
nr_dev++;
return 1;
}
diff -Nru a/sound/isa/ad1848/ad1848_lib.c b/sound/isa/ad1848/ad1848_lib.c
--- a/sound/isa/ad1848/ad1848_lib.c Sun Aug 3 13:14:52 2003
+++ b/sound/isa/ad1848/ad1848_lib.c Sun Aug 3 13:14:52 2003
@@ -24,6 +24,7 @@
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <sound/core.h>
@@ -625,6 +626,95 @@
*/
+static void snd_ad1848_thinkpad_twiddle(ad1848_t *chip, int on) {
+
+ int tmp;
+
+ if (!chip->thinkpad_flag) return;
+
+ outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
+ tmp = inb(AD1848_THINKPAD_CTL_PORT2);
+
+ if (on)
+ /* turn it on */
+ tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
+ else
+ /* turn it off */
+ tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
+
+ outb(tmp, AD1848_THINKPAD_CTL_PORT2);
+
+}
+
+#ifdef CONFIG_PM
+static void snd_ad1848_suspend(ad1848_t *chip) {
+
+ snd_card_t *card = chip->card;
+
+ if (card->power_state == SNDRV_CTL_POWER_D3hot)
+ return;
+
+ snd_pcm_suspend_all(chip->pcm);
+ /* FIXME: save registers? */
+
+ if (chip->thinkpad_flag)
+ snd_ad1848_thinkpad_twiddle(chip, 0);
+
+ snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
+}
+
+static void snd_ad1848_resume(ad1848_t *chip) {
+
+ snd_card_t *card = chip->card;
+
+ if (card->power_state == SNDRV_CTL_POWER_D0)
+ return;
+
+ if (chip->thinkpad_flag)
+ snd_ad1848_thinkpad_twiddle(chip, 1);
+
+ /* FIXME: restore registers? */
+
+ snd_power_change_state(card, SNDRV_CTL_POWER_D0);
+}
+
+/* callback for control API */
+static int snd_ad1848_set_power_state(snd_card_t *card, unsigned int power_state)
+{
+ ad1848_t *chip = (ad1848_t *) card->power_state_private_data;
+ switch (power_state) {
+ case SNDRV_CTL_POWER_D0:
+ case SNDRV_CTL_POWER_D1:
+ case SNDRV_CTL_POWER_D2:
+ snd_ad1848_resume(chip);
+ break;
+ case SNDRV_CTL_POWER_D3hot:
+ case SNDRV_CTL_POWER_D3cold:
+ snd_ad1848_suspend(chip);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int snd_ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
+{
+ ad1848_t *chip = snd_magic_cast(ad1848_t, dev->data, return 0);
+
+ switch (rqst) {
+ case PM_SUSPEND:
+ snd_ad1848_suspend(chip);
+ break;
+ case PM_RESUME:
+ snd_ad1848_resume(chip);
+ break;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_PM */
+
static int snd_ad1848_probe(ad1848_t * chip)
{
unsigned long flags;
@@ -799,6 +889,10 @@
static int snd_ad1848_free(ad1848_t *chip)
{
+#ifdef CONFIG_PM
+ if (chip->thinkpad_pmstate)
+ pm_unregister(chip->thinkpad_pmstate);
+#endif
if (chip->res_port) {
release_resource(chip->res_port);
kfree_nocheck(chip->res_port);
@@ -869,6 +963,20 @@
return -EBUSY;
}
chip->dma = dma;
+
+ if (hardware == AD1848_HW_THINKPAD) {
+ chip->thinkpad_flag = 1;
+ chip->hardware = AD1848_HW_DETECT; /* reset */
+ snd_ad1848_thinkpad_twiddle(chip, 1);
+#ifdef CONFIG_PM
+ chip->thinkpad_pmstate = pm_register(PM_ISA_DEV, 0, snd_ad1848_pm_callback);
+ if (chip->thinkpad_pmstate) {
+ chip->thinkpad_pmstate->data = chip;
+ card->set_power_state = snd_ad1848_set_power_state; /* callback */
+ card->power_state_private_data = chip;
+ }
+#endif
+ }
if (snd_ad1848_probe(chip) < 0) {
snd_ad1848_free(chip);
diff -Nru a/sound/isa/cmi8330.c b/sound/isa/cmi8330.c
--- a/sound/isa/cmi8330.c Sun Aug 3 13:14:45 2003
+++ b/sound/isa/cmi8330.c Sun Aug 3 13:14:45 2003
@@ -293,7 +293,7 @@
const struct pnp_card_device_id *id)
{
struct pnp_dev *pdev;
- struct pnp_resource_table *cfg = kmalloc(sizeof(*cfg), GFP_ATOMIC);
+ struct pnp_resource_table * cfg = kmalloc(sizeof(struct pnp_resource_table), GFP_KERNEL);
int err;
acard->cap = pnp_request_card_device(card, id->devs[0].id, NULL);
diff -Nru a/sound/isa/cs423x/cs4231_lib.c b/sound/isa/cs423x/cs4231_lib.c
--- a/sound/isa/cs423x/cs4231_lib.c Sun Aug 3 13:14:46 2003
+++ b/sound/isa/cs423x/cs4231_lib.c Sun Aug 3 13:14:46 2003
@@ -1401,8 +1401,10 @@
switch (rqst) {
case PM_SUSPEND:
- if (chip->suspend)
+ if (chip->suspend) {
+ snd_pcm_suspend_all(chip->pcm);
(*chip->suspend)(chip);
+ }
break;
case PM_RESUME:
if (chip->resume)
diff -Nru a/sound/isa/es18xx.c b/sound/isa/es18xx.c
--- a/sound/isa/es18xx.c Sun Aug 3 13:14:47 2003
+++ b/sound/isa/es18xx.c Sun Aug 3 13:14:47 2003
@@ -1966,7 +1966,7 @@
const struct pnp_card_device_id *id)
{
struct pnp_dev *pdev;
- struct pnp_resource_table *cfg = kmalloc(sizeof(*cfg), GFP_ATOMIC);
+ struct pnp_resource_table * cfg = kmalloc(sizeof(struct pnp_resource_table), GFP_KERNEL);
int err;
if (!cfg)
diff -Nru a/sound/isa/gus/gus_main.c b/sound/isa/gus/gus_main.c
--- a/sound/isa/gus/gus_main.c Sun Aug 3 13:14:45 2003
+++ b/sound/isa/gus/gus_main.c Sun Aug 3 13:14:45 2003
@@ -106,7 +106,7 @@
{
if (gus->gf1.res_port2 == NULL)
goto __hw_end;
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (gus->seq_dev) {
snd_device_free(gus->card, gus->seq_dev);
gus->seq_dev = NULL;
@@ -434,7 +434,7 @@
}
if ((err = snd_gus_init_dma_irq(gus, 1)) < 0)
return err;
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (snd_seq_device_new(gus->card, 1, SNDRV_SEQ_DEV_ID_GUS,
sizeof(snd_gus_card_t*), &gus->seq_dev) >= 0) {
strcpy(gus->seq_dev->name, "GUS");
diff -Nru a/sound/isa/opl3sa2.c b/sound/isa/opl3sa2.c
--- a/sound/isa/opl3sa2.c Sun Aug 3 13:14:53 2003
+++ b/sound/isa/opl3sa2.c Sun Aug 3 13:14:53 2003
@@ -552,9 +552,8 @@
if (card->power_state == SNDRV_CTL_POWER_D3hot)
return;
- /* FIXME: is this order ok? */
+ snd_pcm_suspend_all(chip->cs4231->pcm); /* stop before saving regs */
chip->cs4231_suspend(chip->cs4231);
- snd_pcm_suspend_all(chip->cs4231->pcm);
/* power down */
snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D3);
diff -Nru a/sound/isa/sb/emu8000.c b/sound/isa/sb/emu8000.c
--- a/sound/isa/sb/emu8000.c Sun Aug 3 13:14:47 2003
+++ b/sound/isa/sb/emu8000.c Sun Aug 3 13:14:47 2003
@@ -659,7 +659,7 @@
{
soundfont_chorus_fx_t rec;
if (mode < SNDRV_EMU8000_CHORUS_PREDEFINED || mode >= SNDRV_EMU8000_CHORUS_NUMBERS) {
- snd_printk(KERN_WARNING "illegal chorus mode %d for uploading\n", mode);
+ snd_printk(KERN_WARNING "invalid chorus mode %d for uploading\n", mode);
return -EINVAL;
}
if (len < (long)sizeof(rec) || copy_from_user(&rec, buf, sizeof(rec)))
@@ -787,7 +787,7 @@
soundfont_reverb_fx_t rec;
if (mode < SNDRV_EMU8000_REVERB_PREDEFINED || mode >= SNDRV_EMU8000_REVERB_NUMBERS) {
- snd_printk(KERN_WARNING "illegal reverb mode %d for uploading\n", mode);
+ snd_printk(KERN_WARNING "invalid reverb mode %d for uploading\n", mode);
return -EINVAL;
}
if (len < (long)sizeof(rec) || copy_from_user(&rec, buf, sizeof(rec)))
@@ -1138,7 +1138,7 @@
snd_emu8000_free(hw);
return err;
}
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (snd_seq_device_new(card, index, SNDRV_SEQ_DEV_ID_EMU8000,
sizeof(emu8000_t*), &awe) >= 0) {
strcpy(awe->name, "EMU-8000");
diff -Nru a/sound/isa/sb/sb16.c b/sound/isa/sb/sb16.c
--- a/sound/isa/sb/sb16.c Sun Aug 3 13:14:51 2003
+++ b/sound/isa/sb/sb16.c Sun Aug 3 13:14:51 2003
@@ -66,7 +66,7 @@
#define SNDRV_DEBUG_IRQ
#endif
-#if defined(SNDRV_SBAWE) && (defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE))
+#if defined(SNDRV_SBAWE) && (defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE)))
#define SNDRV_SBAWE_EMU8000
#endif
@@ -350,6 +350,18 @@
#endif /* CONFIG_PNP */
+static void snd_sb16_free(snd_card_t *card)
+{
+ struct snd_card_sb16 *acard = (struct snd_card_sb16 *)card->private_data;
+
+ if (acard == NULL)
+ return;
+ if (acard->fm_res) {
+ release_resource(acard->fm_res);
+ kfree_nocheck(acard->fm_res);
+ }
+}
+
static int __init snd_sb16_probe(int dev,
struct pnp_card_link *pcard,
const struct pnp_card_device_id *pid)
@@ -374,6 +386,7 @@
if (card == NULL)
return -ENOMEM;
acard = (struct snd_card_sb16 *) card->private_data;
+ card->private_free = snd_sb16_free;
#ifdef CONFIG_PNP
if (isapnp[dev]) {
if ((err = snd_card_sb16_pnp(dev, acard, pcard, pid))) {
@@ -464,7 +477,8 @@
if (fm_port[dev] > 0) {
if (snd_opl3_create(card, fm_port[dev], fm_port[dev] + 2,
- OPL3_HW_OPL3, fm_port[dev] == port[dev],
+ OPL3_HW_OPL3,
+ fm_port[dev] == port[dev] || fm_port[dev] == 0x388,
&opl3) < 0) {
snd_printk(KERN_ERR PFX "no OPL device at 0x%lx-0x%lx\n",
fm_port[dev], fm_port[dev] + 2);
diff -Nru a/sound/isa/sscape.c b/sound/isa/sscape.c
--- a/sound/isa/sscape.c Sun Aug 3 13:14:45 2003
+++ b/sound/isa/sscape.c Sun Aug 3 13:14:45 2003
@@ -809,7 +809,7 @@
*/
static unsigned __devinit get_irq_config(int irq)
{
- static const int valid_irq[] __devinitdata = { 9, 5, 7, 10 };
+ static const int valid_irq[] = { 9, 5, 7, 10 };
unsigned cfg;
for (cfg = 0; cfg < ARRAY_SIZE(valid_irq); ++cfg) {
diff -Nru a/sound/oss/ac97_codec.c b/sound/oss/ac97_codec.c
--- a/sound/oss/ac97_codec.c Sun Aug 3 13:14:45 2003
+++ b/sound/oss/ac97_codec.c Sun Aug 3 13:14:45 2003
@@ -513,8 +513,9 @@
if (cmd == SOUND_MIXER_INFO) {
mixer_info info;
- strncpy(info.id, codec->name, sizeof(info.id));
- strncpy(info.name, codec->name, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, codec->name, sizeof(info.id));
+ strlcpy(info.name, codec->name, sizeof(info.name));
info.modify_counter = codec->modcnt;
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
@@ -522,8 +523,9 @@
}
if (cmd == SOUND_OLD_MIXER_INFO) {
_old_mixer_info info;
- strncpy(info.id, codec->name, sizeof(info.id));
- strncpy(info.name, codec->name, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, codec->name, sizeof(info.id));
+ strlcpy(info.name, codec->name, sizeof(info.name));
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/sound/oss/ad1889.c b/sound/oss/ad1889.c
--- a/sound/oss/ad1889.c Sun Aug 3 13:14:47 2003
+++ b/sound/oss/ad1889.c Sun Aug 3 13:14:47 2003
@@ -918,7 +918,7 @@
/************************* PCI interfaces ****************************** */
/* PCI device table */
-static struct pci_device_id ad1889_id_tbl[] __devinitdata = {
+static struct pci_device_id ad1889_id_tbl[] = {
{ PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS, PCI_ANY_ID,
PCI_ANY_ID, 0, 0, (unsigned long)DEVNAME },
{ },
diff -Nru a/sound/oss/ali5455.c b/sound/oss/ali5455.c
--- a/sound/oss/ali5455.c Sun Aug 3 13:14:51 2003
+++ b/sound/oss/ali5455.c Sun Aug 3 13:14:51 2003
@@ -216,7 +216,7 @@
"ALI 5455"
};
-static struct pci_device_id ali_pci_tbl[] __initdata = {
+static struct pci_device_id ali_pci_tbl[] = {
{PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5455,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI5455},
{0,}
diff -Nru a/sound/oss/btaudio.c b/sound/oss/btaudio.c
--- a/sound/oss/btaudio.c Sun Aug 3 13:14:46 2003
+++ b/sound/oss/btaudio.c Sun Aug 3 13:14:46 2003
@@ -1060,7 +1060,7 @@
/* -------------------------------------------------------------- */
-static struct pci_device_id btaudio_pci_tbl[] __devinitdata = {
+static struct pci_device_id btaudio_pci_tbl[] = {
{
.vendor = PCI_VENDOR_ID_BROOKTREE,
.device = 0x0878,
diff -Nru a/sound/oss/cmpci.c b/sound/oss/cmpci.c
--- a/sound/oss/cmpci.c Sun Aug 3 13:14:49 2003
+++ b/sound/oss/cmpci.c Sun Aug 3 13:14:49 2003
@@ -1272,8 +1272,9 @@
VALIDATE_STATE(s);
if (cmd == SOUND_MIXER_INFO) {
mixer_info info;
- strncpy(info.id, "cmpci", sizeof(info.id));
- strncpy(info.name, "C-Media PCI", sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, "cmpci", sizeof(info.id));
+ strlcpy(info.name, "C-Media PCI", sizeof(info.name));
info.modify_counter = s->mix.modcnt;
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
@@ -1281,8 +1282,9 @@
}
if (cmd == SOUND_OLD_MIXER_INFO) {
_old_mixer_info info;
- strncpy(info.id, "cmpci", sizeof(info.id));
- strncpy(info.name, "C-Media cmpci", sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, "cmpci", sizeof(info.id));
+ strlcpy(info.name, "C-Media cmpci", sizeof(info.name));
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/sound/oss/cs4281/cs4281m.c b/sound/oss/cs4281/cs4281m.c
--- a/sound/oss/cs4281/cs4281m.c Sun Aug 3 13:14:53 2003
+++ b/sound/oss/cs4281/cs4281m.c Sun Aug 3 13:14:53 2003
@@ -4458,7 +4458,7 @@
"cs4281: cs4281_remove()-: remove successful\n"));
}
-static struct pci_device_id cs4281_pci_tbl[] __devinitdata = {
+static struct pci_device_id cs4281_pci_tbl[] = {
{
.vendor = PCI_VENDOR_ID_CIRRUS,
.device = PCI_DEVICE_ID_CRYSTAL_CS4281,
diff -Nru a/sound/oss/cs46xx.c b/sound/oss/cs46xx.c
--- a/sound/oss/cs46xx.c Sun Aug 3 13:14:44 2003
+++ b/sound/oss/cs46xx.c Sun Aug 3 13:14:44 2003
@@ -5705,7 +5705,7 @@
CS46XX_4615, /* same as 4624 */
};
-static struct pci_device_id cs46xx_pci_tbl[] __devinitdata = {
+static struct pci_device_id cs46xx_pci_tbl[] = {
{
.vendor = PCI_VENDOR_ID_CIRRUS,
.device = PCI_DEVICE_ID_CIRRUS_4610,
diff -Nru a/sound/oss/dmasound/dmasound_core.c b/sound/oss/dmasound/dmasound_core.c
--- a/sound/oss/dmasound/dmasound_core.c Sun Aug 3 13:14:45 2003
+++ b/sound/oss/dmasound/dmasound_core.c Sun Aug 3 13:14:45 2003
@@ -351,8 +351,9 @@
case SOUND_MIXER_INFO:
{
mixer_info info;
- strncpy(info.id, dmasound.mach.name2, sizeof(info.id));
- strncpy(info.name, dmasound.mach.name2, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, dmasound.mach.name2, sizeof(info.id));
+ strlcpy(info.name, dmasound.mach.name2, sizeof(info.name));
info.modify_counter = mixer.modify_counter;
if (copy_to_user((int *)arg, &info, sizeof(info)))
return -EFAULT;
diff -Nru a/sound/oss/es1370.c b/sound/oss/es1370.c
--- a/sound/oss/es1370.c Sun Aug 3 13:14:53 2003
+++ b/sound/oss/es1370.c Sun Aug 3 13:14:53 2003
@@ -2719,7 +2719,7 @@
pci_set_drvdata(dev, NULL);
}
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{ PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1370, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ 0, }
};
diff -Nru a/sound/oss/es1371.c b/sound/oss/es1371.c
--- a/sound/oss/es1371.c Sun Aug 3 13:14:51 2003
+++ b/sound/oss/es1371.c Sun Aug 3 13:14:51 2003
@@ -3030,7 +3030,7 @@
pci_set_drvdata(dev, NULL);
}
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{ PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
diff -Nru a/sound/oss/esssolo1.c b/sound/oss/esssolo1.c
--- a/sound/oss/esssolo1.c Sun Aug 3 13:14:45 2003
+++ b/sound/oss/esssolo1.c Sun Aug 3 13:14:45 2003
@@ -2436,7 +2436,7 @@
pci_set_drvdata(dev, NULL);
}
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{ PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ 0, }
};
diff -Nru a/sound/oss/forte.c b/sound/oss/forte.c
--- a/sound/oss/forte.c Sun Aug 3 13:14:47 2003
+++ b/sound/oss/forte.c Sun Aug 3 13:14:47 2003
@@ -2092,7 +2092,7 @@
}
-static struct pci_device_id forte_pci_ids[] __devinitdata = {
+static struct pci_device_id forte_pci_ids[] = {
{ 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
{ 0, }
};
diff -Nru a/sound/oss/hal2.c b/sound/oss/hal2.c
--- a/sound/oss/hal2.c Sun Aug 3 13:14:51 2003
+++ b/sound/oss/hal2.c Sun Aug 3 13:14:51 2003
@@ -787,9 +787,9 @@
if (cmd == SOUND_MIXER_INFO) {
mixer_info info;
-
- strncpy(info.id, hal2str, sizeof(info.id));
- strncpy(info.name, hal2str, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, hal2str, sizeof(info.id));
+ strlcpy(info.name, hal2str, sizeof(info.name));
info.modify_counter = hal2->mixer.modcnt;
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
@@ -797,9 +797,9 @@
}
if (cmd == SOUND_OLD_MIXER_INFO) {
_old_mixer_info info;
-
- strncpy(info.id, hal2str, sizeof(info.id));
- strncpy(info.name, hal2str, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, hal2str, sizeof(info.id));
+ strlcpy(info.name, hal2str, sizeof(info.name));
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/sound/oss/harmony.c b/sound/oss/harmony.c
--- a/sound/oss/harmony.c Sun Aug 3 13:14:51 2003
+++ b/sound/oss/harmony.c Sun Aug 3 13:14:51 2003
@@ -1296,7 +1296,6 @@
unregister_parisc_driver(&harmony_driver);
}
-EXPORT_NO_SYMBOLS;
MODULE_AUTHOR("Alex DeVries <alex@linuxcare.com>");
MODULE_DESCRIPTION("Harmony sound driver");
diff -Nru a/sound/oss/i810_audio.c b/sound/oss/i810_audio.c
--- a/sound/oss/i810_audio.c Sun Aug 3 13:14:51 2003
+++ b/sound/oss/i810_audio.c Sun Aug 3 13:14:51 2003
@@ -316,7 +316,7 @@
/*@FIXME to be verified*/ { 3, 0x0001 }, /* AMD8111 */
};
-static struct pci_device_id i810_pci_tbl [] __initdata = {
+static struct pci_device_id i810_pci_tbl [] = {
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82801AA},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82901,
diff -Nru a/sound/oss/ite8172.c b/sound/oss/ite8172.c
--- a/sound/oss/ite8172.c Sun Aug 3 13:14:46 2003
+++ b/sound/oss/ite8172.c Sun Aug 3 13:14:46 2003
@@ -2187,7 +2187,7 @@
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{ PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_IT8172G_AUDIO, PCI_ANY_ID,
PCI_ANY_ID, 0, 0 },
{ 0, }
diff -Nru a/sound/oss/kahlua.c b/sound/oss/kahlua.c
--- a/sound/oss/kahlua.c Sun Aug 3 13:14:52 2003
+++ b/sound/oss/kahlua.c Sun Aug 3 13:14:52 2003
@@ -195,7 +195,7 @@
* 5530 only. The 5510/5520 decode is different.
*/
-static struct pci_device_id id_tbl[] __devinitdata = {
+static struct pci_device_id id_tbl[] = {
{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ }
};
diff -Nru a/sound/oss/maestro.c b/sound/oss/maestro.c
--- a/sound/oss/maestro.c Sun Aug 3 13:14:52 2003
+++ b/sound/oss/maestro.c Sun Aug 3 13:14:52 2003
@@ -2030,8 +2030,9 @@
VALIDATE_CARD(card);
if (cmd == SOUND_MIXER_INFO) {
mixer_info info;
- strncpy(info.id, card_names[card->card_type], sizeof(info.id));
- strncpy(info.name, card_names[card->card_type], sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, card_names[card->card_type], sizeof(info.id));
+ strlcpy(info.name, card_names[card->card_type], sizeof(info.name));
info.modify_counter = card->mix.modcnt;
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
@@ -2039,8 +2040,9 @@
}
if (cmd == SOUND_OLD_MIXER_INFO) {
_old_mixer_info info;
- strncpy(info.id, card_names[card->card_type], sizeof(info.id));
- strncpy(info.name, card_names[card->card_type], sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, card_names[card->card_type], sizeof(info.id));
+ strlcpy(info.name, card_names[card->card_type], sizeof(info.name));
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -3610,7 +3612,7 @@
pci_set_drvdata(pcidev,NULL);
}
-static struct pci_device_id maestro_pci_tbl[] __devinitdata = {
+static struct pci_device_id maestro_pci_tbl[] = {
{PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1968, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2},
{PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1978, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2E},
{PCI_VENDOR_ESS_OLD, PCI_DEVICE_ID_ESS_ESS0100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO},
diff -Nru a/sound/oss/maestro3.c b/sound/oss/maestro3.c
--- a/sound/oss/maestro3.c Sun Aug 3 13:14:52 2003
+++ b/sound/oss/maestro3.c Sun Aug 3 13:14:52 2003
@@ -328,7 +328,7 @@
.driver_data = TYPE, \
}
-static struct pci_device_id m3_id_table[] __initdata = {
+static struct pci_device_id m3_id_table[] = {
M3_DEVICE(0x1988, ESS_ALLEGRO),
M3_DEVICE(0x1998, ESS_MAESTRO3),
M3_DEVICE(0x199a, ESS_MAESTRO3HW),
diff -Nru a/sound/oss/msnd_pinnacle.c b/sound/oss/msnd_pinnacle.c
--- a/sound/oss/msnd_pinnacle.c Sun Aug 3 13:14:49 2003
+++ b/sound/oss/msnd_pinnacle.c Sun Aug 3 13:14:49 2003
@@ -555,8 +555,9 @@
}
#define set_mixer_info() \
- strncpy(info.id, "MSNDMIXER", sizeof(info.id)); \
- strncpy(info.name, "MultiSound Mixer", sizeof(info.name));
+ memset(&info, 0, sizeof(info)); \
+ strlcpy(info.id, "MSNDMIXER", sizeof(info.id)); \
+ strlcpy(info.name, "MultiSound Mixer", sizeof(info.name));
static int mixer_ioctl(unsigned int cmd, unsigned long arg)
{
diff -Nru a/sound/oss/nec_vrc5477.c b/sound/oss/nec_vrc5477.c
--- a/sound/oss/nec_vrc5477.c Sun Aug 3 13:14:50 2003
+++ b/sound/oss/nec_vrc5477.c Sun Aug 3 13:14:50 2003
@@ -1989,7 +1989,7 @@
}
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{ PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC5477_AC97,
PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ 0, }
diff -Nru a/sound/oss/nm256_audio.c b/sound/oss/nm256_audio.c
--- a/sound/oss/nm256_audio.c Sun Aug 3 13:14:48 2003
+++ b/sound/oss/nm256_audio.c Sun Aug 3 13:14:48 2003
@@ -1660,7 +1660,7 @@
.local_qlen = nm256_audio_local_qlen,
};
-static struct pci_device_id nm256_pci_tbl[] __devinitdata = {
+static struct pci_device_id nm256_pci_tbl[] = {
{PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO,
PCI_ANY_ID, PCI_ANY_ID, 0, 0},
{PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO,
diff -Nru a/sound/oss/rme96xx.c b/sound/oss/rme96xx.c
--- a/sound/oss/rme96xx.c Sun Aug 3 13:14:47 2003
+++ b/sound/oss/rme96xx.c Sun Aug 3 13:14:47 2003
@@ -1072,7 +1072,7 @@
#define PCI_ANY_ID 0
#endif
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{
.vendor = PCI_VENDOR_ID_RME,
.device = PCI_DEVICE_ID_RME9652,
diff -Nru a/sound/oss/sonicvibes.c b/sound/oss/sonicvibes.c
--- a/sound/oss/sonicvibes.c Sun Aug 3 13:14:48 2003
+++ b/sound/oss/sonicvibes.c Sun Aug 3 13:14:48 2003
@@ -1046,8 +1046,9 @@
VALIDATE_STATE(s);
if (cmd == SOUND_MIXER_INFO) {
mixer_info info;
- strncpy(info.id, "SonicVibes", sizeof(info.id));
- strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, "SonicVibes", sizeof(info.id));
+ strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
info.modify_counter = s->mix.modcnt;
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
@@ -1055,8 +1056,9 @@
}
if (cmd == SOUND_OLD_MIXER_INFO) {
_old_mixer_info info;
- strncpy(info.id, "SonicVibes", sizeof(info.id));
- strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, "SonicVibes", sizeof(info.id));
+ strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
if (copy_to_user((void *)arg, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -2707,7 +2709,7 @@
pci_set_drvdata(dev, NULL);
}
-static struct pci_device_id id_table[] __devinitdata = {
+static struct pci_device_id id_table[] = {
{ PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
{ 0, }
};
diff -Nru a/sound/oss/soundcard.c b/sound/oss/soundcard.c
--- a/sound/oss/soundcard.c Sun Aug 3 13:14:48 2003
+++ b/sound/oss/soundcard.c Sun Aug 3 13:14:48 2003
@@ -288,9 +288,9 @@
static int get_mixer_info(int dev, caddr_t arg)
{
mixer_info info;
-
- strncpy(info.id, mixer_devs[dev]->id, sizeof(info.id));
- strncpy(info.name, mixer_devs[dev]->name, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, mixer_devs[dev]->id, sizeof(info.id));
+ strlcpy(info.name, mixer_devs[dev]->name, sizeof(info.name));
info.modify_counter = mixer_devs[dev]->modify_counter;
if (__copy_to_user(arg, &info, sizeof(info)))
return -EFAULT;
@@ -300,9 +300,9 @@
static int get_old_mixer_info(int dev, caddr_t arg)
{
_old_mixer_info info;
-
- strncpy(info.id, mixer_devs[dev]->id, sizeof(info.id));
- strncpy(info.name, mixer_devs[dev]->name, sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, mixer_devs[dev]->id, sizeof(info.id));
+ strlcpy(info.name, mixer_devs[dev]->name, sizeof(info.name));
if (copy_to_user(arg, &info, sizeof(info)))
return -EFAULT;
return 0;
@@ -592,7 +592,7 @@
int i, j;
for (i = 0; i < sizeof (dev_list) / sizeof *dev_list; i++) {
- devfs_remove("snd/%s", dev_list[i].name);
+ devfs_remove("sound/%s", dev_list[i].name);
if (!dev_list[i].num)
continue;
for (j = 1; j < *dev_list[i].num; j++)
diff -Nru a/sound/oss/swarm_cs4297a.c b/sound/oss/swarm_cs4297a.c
--- a/sound/oss/swarm_cs4297a.c Sun Aug 3 13:14:49 2003
+++ b/sound/oss/swarm_cs4297a.c Sun Aug 3 13:14:49 2003
@@ -90,7 +90,6 @@
#include <asm/sibyte/64bit.h>
struct cs4297a_state;
-EXPORT_NO_SYMBOLS;
static void stop_dac(struct cs4297a_state *s);
static void stop_adc(struct cs4297a_state *s);
@@ -1238,8 +1237,9 @@
}
if (cmd == SOUND_MIXER_INFO) {
mixer_info info;
- strncpy(info.id, "CS4297a", sizeof(info.id));
- strncpy(info.name, "Crystal CS4297a", sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, "CS4297a", sizeof(info.id));
+ strlcpy(info.name, "Crystal CS4297a", sizeof(info.name));
info.modify_counter = s->mix.modcnt;
if (copy_to_user((void *) arg, &info, sizeof(info)))
return -EFAULT;
@@ -1247,8 +1247,9 @@
}
if (cmd == SOUND_OLD_MIXER_INFO) {
_old_mixer_info info;
- strncpy(info.id, "CS4297a", sizeof(info.id));
- strncpy(info.name, "Crystal CS4297a", sizeof(info.name));
+ memset(&info, 0, sizeof(info));
+ strlcpy(info.id, "CS4297a", sizeof(info.id));
+ strlcpy(info.name, "Crystal CS4297a", sizeof(info.name));
if (copy_to_user((void *) arg, &info, sizeof(info)))
return -EFAULT;
return 0;
diff -Nru a/sound/oss/trident.c b/sound/oss/trident.c
--- a/sound/oss/trident.c Sun Aug 3 13:14:51 2003
+++ b/sound/oss/trident.c Sun Aug 3 13:14:51 2003
@@ -265,7 +265,7 @@
"Tvia/IGST CyberPro 5050"
};
-static struct pci_device_id trident_pci_tbl [] __devinitdata = {
+static struct pci_device_id trident_pci_tbl [] = {
{PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX},
{PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX,
diff -Nru a/sound/oss/via82cxxx_audio.c b/sound/oss/via82cxxx_audio.c
--- a/sound/oss/via82cxxx_audio.c Sun Aug 3 13:14:46 2003
+++ b/sound/oss/via82cxxx_audio.c Sun Aug 3 13:14:46 2003
@@ -387,7 +387,7 @@
*/
-static struct pci_device_id via_pci_tbl[] __initdata = {
+static struct pci_device_id via_pci_tbl[] = {
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233_5,
diff -Nru a/sound/oss/ymfpci.c b/sound/oss/ymfpci.c
--- a/sound/oss/ymfpci.c Sun Aug 3 13:14:49 2003
+++ b/sound/oss/ymfpci.c Sun Aug 3 13:14:49 2003
@@ -105,7 +105,7 @@
* constants
*/
-static struct pci_device_id ymf_id_tbl[] __devinitdata = {
+static struct pci_device_id ymf_id_tbl[] = {
#define DEV(v, d, data) \
{ PCI_VENDOR_ID_##v, PCI_DEVICE_ID_##v##_##d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long)data }
DEV (YAMAHA, 724, "YMF724"),
diff -Nru a/sound/pci/ac97/Makefile b/sound/pci/ac97/Makefile
--- a/sound/pci/ac97/Makefile Sun Aug 3 13:14:49 2003
+++ b/sound/pci/ac97/Makefile Sun Aug 3 13:14:49 2003
@@ -3,7 +3,7 @@
# Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz>
#
-snd-ac97-codec-objs := ac97_codec.o ac97_patch.o
+snd-ac97-codec-objs := ac97_codec.o ac97_proc.o ac97_patch.o
snd-ak4531-codec-objs := ak4531_codec.o
# Toplevel Module Dependency
diff -Nru a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
--- a/sound/pci/ac97/ac97_codec.c Sun Aug 3 13:14:47 2003
+++ b/sound/pci/ac97/ac97_codec.c Sun Aug 3 13:14:47 2003
@@ -32,6 +32,7 @@
#include <sound/ac97_codec.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
+#include "ac97_local.h"
#include "ac97_id.h"
#include "ac97_patch.h"
@@ -51,8 +52,6 @@
*/
-static void snd_ac97_proc_init(snd_card_t * card, ac97_t * ac97, const char *prefix);
-
typedef struct {
unsigned int id;
unsigned int mask;
@@ -114,7 +113,7 @@
{ 0x414c4740, 0xfffffff0, "ALC202", NULL, NULL },
{ 0x414c4750, 0xfffffff0, "ALC250", NULL, NULL },
{ 0x414c4770, 0xfffffff0, "ALC203", NULL, NULL },
-{ 0x434d4941, 0xffffffff, "CMI9738", NULL, NULL },
+{ 0x434d4941, 0xffffffff, "CMI9738", patch_cm9738, NULL },
{ 0x434d4961, 0xffffffff, "CMI9739", patch_cm9739, NULL },
{ 0x43525900, 0xfffffff8, "CS4297", NULL, NULL },
{ 0x43525910, 0xfffffff8, "CS4297A", patch_cirrus_spdif, NULL },
@@ -134,8 +133,8 @@
{ 0x49434501, 0xffffffff, "ICE1230", NULL, NULL },
{ 0x49434511, 0xffffffff, "ICE1232", NULL, NULL }, // alias VIA VT1611A?
{ 0x49434514, 0xffffffff, "ICE1232A", NULL, NULL },
-{ 0x49434551, 0xffffffff, "VT1616", NULL, NULL },
-{ 0x49434552, 0xffffffff, "VT1616i", NULL, NULL }, // VT1616 compatible (chipset integrated)
+{ 0x49434551, 0xffffffff, "VT1616", patch_vt1616, NULL },
+{ 0x49434552, 0xffffffff, "VT1616i", patch_vt1616, NULL }, // VT1616 compatible (chipset integrated)
{ 0x49544520, 0xffffffff, "IT2226E", NULL, NULL },
{ 0x4e534300, 0xffffffff, "LM4540/43/45/46/48", NULL, NULL }, // only guess --jk
{ 0x4e534331, 0xffffffff, "LM4549", NULL, NULL },
@@ -158,7 +157,7 @@
{ 0x594d4800, 0xffffffff, "YMF743", NULL, NULL },
{ 0x594d4802, 0xffffffff, "YMF752", NULL, NULL },
{ 0x594d4803, 0xffffffff, "YMF753", patch_yamaha_ymf753, NULL },
-{ 0x83847600, 0xffffffff, "STAC9700/83/84", NULL, NULL },
+{ 0x83847600, 0xffffffff, "STAC9700/83/84", patch_sigmatel_stac9700, NULL },
{ 0x83847604, 0xffffffff, "STAC9701/3/4/5", NULL, NULL },
{ 0x83847605, 0xffffffff, "STAC9704", NULL, NULL },
{ 0x83847608, 0xffffffff, "STAC9708/11", patch_sigmatel_stac9708, NULL },
@@ -171,7 +170,7 @@
{ 0, 0, NULL, NULL, NULL }
};
-static const char *snd_ac97_stereo_enhancements[] =
+const char *snd_ac97_stereo_enhancements[] =
{
/* 0 */ "No 3D Stereo Enhancement",
/* 1 */ "Analog Devices Phat Stereo",
@@ -310,21 +309,6 @@
set_bit(reg, ac97->reg_accessed);
}
-static void snd_ac97_write_cache_test(ac97_t *ac97, unsigned short reg, unsigned short value)
-{
-#if 0
- if (!snd_ac97_valid_reg(ac97, reg))
- return;
- //spin_lock(&ac97->reg_lock);
- ac97->write(ac97, reg, value);
- ac97->regs[reg] = ac97->read(ac97, reg);
- if (value != ac97->regs[reg])
- snd_printk("AC97 reg=%02x val=%04x real=%04x\n", reg, value, ac97->regs[reg]);
- //spin_unlock(&ac97->reg_lock);
-#endif
- snd_ac97_write_cache(ac97, reg, value);
-}
-
/**
* snd_ac97_update - update the value on the given register
* @ac97: the ac97 instance
@@ -518,12 +502,7 @@
return snd_ac97_update_bits(ac97, reg, 1 << shift, val << shift);
}
-#define AC97_SINGLE(xname, reg, shift, mask, invert) \
-{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_info_single, \
- .get = snd_ac97_get_single, .put = snd_ac97_put_single, \
- .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
-
-static int snd_ac97_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+int snd_ac97_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
{
int mask = (kcontrol->private_value >> 16) & 0xff;
@@ -534,7 +513,7 @@
return 0;
}
-static int snd_ac97_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+int snd_ac97_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
{
ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
int reg = kcontrol->private_value & 0xff;
@@ -548,7 +527,7 @@
return 0;
}
-static int snd_ac97_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+int snd_ac97_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
{
ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
int reg = kcontrol->private_value & 0xff;
@@ -718,7 +697,7 @@
AC97_SINGLE("ADC/DAC Loopback", AC97_GENERAL_PURPOSE, 7, 1, 0)
};
-static const snd_kcontrol_new_t snd_ac97_controls_3d[2] = {
+const snd_kcontrol_new_t snd_ac97_controls_3d[2] = {
AC97_SINGLE("3D Control - Center", AC97_3D_CONTROL, 8, 15, 0),
AC97_SINGLE("3D Control - Depth", AC97_3D_CONTROL, 0, 15, 0)
};
@@ -743,21 +722,9 @@
AC97_DOUBLE("Sigmatel Surround Playback Volume", AC97_HEADPHONE, 8, 0, 31, 1)
};
-static const snd_kcontrol_new_t snd_ac97_sigmatel_controls[] = {
-AC97_SINGLE("Sigmatel DAC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 1, 1, 0),
-AC97_SINGLE("Sigmatel ADC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 0, 1, 0)
-};
-
static const snd_kcontrol_new_t snd_ac97_control_eapd =
AC97_SINGLE("External Amplifier Power Down", AC97_POWERDOWN, 15, 1, 0);
-static const snd_kcontrol_new_t snd_ac97_controls_vt1616[] = {
-AC97_SINGLE("DC Offset removal", 0x5a, 10, 1, 0),
-AC97_SINGLE("Alternate Level to Surround Out", 0x5a, 15, 1, 0),
-AC97_SINGLE("Downmix LFE and Center to Front", 0x5a, 12, 1, 0),
-AC97_SINGLE("Downmix Surround to Front", 0x5a, 11, 1, 0),
-};
-
static int snd_ac97_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
@@ -892,7 +859,7 @@
return 0;
}
-static const snd_kcontrol_new_t snd_ac97_controls_spdif[5] = {
+const snd_kcontrol_new_t snd_ac97_controls_spdif[5] = {
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
@@ -916,7 +883,6 @@
},
AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),AC97_EXTENDED_STATUS, 2, 1, 0),
- // AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA",AC97_EXTENDED_STATUS, 4, 3, 0)
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA",
@@ -927,15 +893,6 @@
},
};
-static const snd_kcontrol_new_t snd_ac97_cirrus_controls_spdif[2] = {
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CSR_SPDIF, 15, 1, 0),
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA", AC97_CSR_ACMODE, 0, 3, 0)
-};
-
-static const snd_kcontrol_new_t snd_ac97_conexant_controls_spdif[2] = {
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CXR_AUDIO_MISC, 3, 1, 0),
-};
-
#define AD18XX_PCM_BITS(xname, codec, shift, mask) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_ad18xx_pcm_info_bits, \
.get = snd_ac97_ad18xx_pcm_get_bits, .put = snd_ac97_ad18xx_pcm_put_bits, \
@@ -1031,325 +988,6 @@
AD18XX_PCM_BITS("LFE Playback Volume", 2, 0, 31)
};
-static int snd_ac97_ad1980_spdif_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
-{
- static char *texts[2] = { "AC-Link", "A/D Converter" };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 2;
- if (uinfo->value.enumerated.item > 1)
- uinfo->value.enumerated.item = 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int snd_ac97_ad1980_spdif_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- val = ac97->regs[AC97_AD_SERIAL_CFG];
- ucontrol->value.enumerated.item[0] = (val >> 2) & 1;
- return 0;
-}
-
-static int snd_ac97_ad1980_spdif_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- if (ucontrol->value.enumerated.item[0] > 1)
- return -EINVAL;
- val = ucontrol->value.enumerated.item[0] << 2;
- return snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x0004, val);
-}
-
-static const snd_kcontrol_new_t snd_ac97_ad1980_spdif_source = {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
- .info = snd_ac97_ad1980_spdif_source_info,
- .get = snd_ac97_ad1980_spdif_source_get,
- .put = snd_ac97_ad1980_spdif_source_put,
-};
-
-/*
- * ALC650
- */
-static const snd_kcontrol_new_t snd_ac97_controls_alc650[] = {
- AC97_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0),
- AC97_SINGLE("Surround Down Mix", AC97_ALC650_MULTICH, 1, 1, 0),
- AC97_SINGLE("Center/LFE Down Mix", AC97_ALC650_MULTICH, 2, 1, 0),
- AC97_SINGLE("Exchange Center/LFE", AC97_ALC650_MULTICH, 3, 1, 0),
- /* 4: Analog Input To Surround */
- /* 5: Analog Input To Center/LFE */
- /* 6: Independent Master Volume Right */
- /* 7: Independent Master Volume Left */
- /* 8: reserved */
- AC97_SINGLE("Line-In As Surround", AC97_ALC650_MULTICH, 9, 1, 0),
- AC97_SINGLE("Swap Surround Slot", AC97_ALC650_MULTICH, 14, 1, 0),
-#if 0 /* always set in patch_alc650 */
- AC97_SINGLE("IEC958 Input Clock Enable", AC97_ALC650_CLOCK, 0, 1, 0),
- AC97_SINGLE("IEC958 Input Pin Enable", AC97_ALC650_CLOCK, 1, 1, 0),
- AC97_SINGLE("Surround DAC Switch", AC97_ALC650_SURR_DAC_VOL, 15, 1, 1),
- AC97_DOUBLE("Surround DAC Volume", AC97_ALC650_SURR_DAC_VOL, 8, 0, 31, 1),
- AC97_SINGLE("Center/LFE DAC Switch", AC97_ALC650_LFE_DAC_VOL, 15, 1, 1),
- AC97_DOUBLE("Center/LFE DAC Volume", AC97_ALC650_LFE_DAC_VOL, 8, 0, 31, 1),
-#endif
-};
-
-static const snd_kcontrol_new_t snd_ac97_control_alc650_mic =
-AC97_SINGLE("Mic As Center/LFE", AC97_ALC650_MULTICH, 10, 1, 0);
-
-
-static int snd_ac97_alc650_mic_gpio_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- ucontrol->value.integer.value[0] = (ac97->regs[AC97_ALC650_MULTICH] >> 10) & 1;
- return 0;
-}
-
-static int snd_ac97_alc650_mic_gpio_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- int change;
- change = snd_ac97_update_bits(ac97, AC97_ALC650_MULTICH, 1 << 10,
- ucontrol->value.integer.value[0] ? (1 << 10) : 0);
- if (change) {
- /* GPIO0 write for mic */
- snd_ac97_update_bits(ac97, 0x76, 0x01,
- ucontrol->value.integer.value[0] ? 0 : 0x01);
- /* GPIO0 high for mic */
- snd_ac97_update_bits(ac97, 0x78, 0x100,
- ucontrol->value.integer.value[0] ? 0 : 0x100);
- }
- return change;
-}
-
-static const snd_kcontrol_new_t snd_ac97_control_alc650_mic_gpio = {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Mic As Center/LFE",
- .info = snd_ac97_info_single,
- .get = snd_ac97_alc650_mic_gpio_get,
- .put = snd_ac97_alc650_mic_gpio_put,
- .private_value = (1 << 16), /* for info */
-};
-
-static const snd_kcontrol_new_t snd_ac97_spdif_controls_alc650[] = {
- AC97_SINGLE("IEC958 Capture Switch", AC97_ALC650_MULTICH, 11, 1, 0),
- AC97_SINGLE("Analog to IEC958 Output", AC97_ALC650_MULTICH, 12, 1, 0),
- AC97_SINGLE("IEC958 Input Monitor", AC97_ALC650_MULTICH, 13, 1, 0),
-};
-
-/* The following snd_ac97_ymf753_... items added by David Shust (dshust@shustring.com) */
-
-/* It is possible to indicate to the Yamaha YMF753 the type of speakers being used. */
-static int snd_ac97_ymf753_info_speaker(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
-{
- static char *texts[3] = {
- "Standard", "Small", "Smaller"
- };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 3;
- if (uinfo->value.enumerated.item > 2)
- uinfo->value.enumerated.item = 2;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int snd_ac97_ymf753_get_speaker(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- val = ac97->regs[AC97_YMF753_3D_MODE_SEL];
- val = (val >> 10) & 3;
- if (val > 0) /* 0 = invalid */
- val--;
- ucontrol->value.enumerated.item[0] = val;
- return 0;
-}
-
-static int snd_ac97_ymf753_put_speaker(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- if (ucontrol->value.enumerated.item[0] > 2)
- return -EINVAL;
- val = (ucontrol->value.enumerated.item[0] + 1) << 10;
- return snd_ac97_update(ac97, AC97_YMF753_3D_MODE_SEL, val);
-}
-
-static const snd_kcontrol_new_t snd_ac97_ymf753_controls_speaker =
-{
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "3D Control - Speaker",
- .info = snd_ac97_ymf753_info_speaker,
- .get = snd_ac97_ymf753_get_speaker,
- .put = snd_ac97_ymf753_put_speaker,
-};
-
-/* It is possible to indicate to the Yamaha YMF753 the source to direct to the S/PDIF output. */
-static int snd_ac97_ymf753_spdif_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
-{
- static char *texts[2] = { "AC-Link", "A/D Converter" };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 2;
- if (uinfo->value.enumerated.item > 1)
- uinfo->value.enumerated.item = 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int snd_ac97_ymf753_spdif_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- val = ac97->regs[AC97_YMF753_DIT_CTRL2];
- ucontrol->value.enumerated.item[0] = (val >> 1) & 1;
- return 0;
-}
-
-static int snd_ac97_ymf753_spdif_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- if (ucontrol->value.enumerated.item[0] > 1)
- return -EINVAL;
- val = ucontrol->value.enumerated.item[0] << 1;
- return snd_ac97_update_bits(ac97, AC97_YMF753_DIT_CTRL2, 0x0002, val);
-}
-
-/* The AC'97 spec states that the S/PDIF signal is to be output at pin 48.
- The YMF753 will output the S/PDIF signal to pin 43, 47 (EAPD), or 48.
- By default, no output pin is selected, and the S/PDIF signal is not output.
- There is also a bit to mute S/PDIF output in a vendor-specific register. */
-static int snd_ac97_ymf753_spdif_output_pin_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
-{
- static char *texts[3] = { "Disabled", "Pin 43", "Pin 48" };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 3;
- if (uinfo->value.enumerated.item > 2)
- uinfo->value.enumerated.item = 2;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int snd_ac97_ymf753_spdif_output_pin_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- val = ac97->regs[AC97_YMF753_DIT_CTRL2];
- ucontrol->value.enumerated.item[0] = (val & 0x0008) ? 2 : (val & 0x0020) ? 1 : 0;
- return 0;
-}
-
-static int snd_ac97_ymf753_spdif_output_pin_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- if (ucontrol->value.enumerated.item[0] > 2)
- return -EINVAL;
- val = (ucontrol->value.enumerated.item[0] == 2) ? 0x0008 :
- (ucontrol->value.enumerated.item[0] == 1) ? 0x0020 : 0;
- return snd_ac97_update_bits(ac97, AC97_YMF753_DIT_CTRL2, 0x0028, val);
- /* The following can be used to direct S/PDIF output to pin 47 (EAPD).
- snd_ac97_write_cache(ac97, 0x62, snd_ac97_read(ac97, 0x62) | 0x0008); */
-}
-
-static const snd_kcontrol_new_t snd_ac97_ymf753_controls_spdif[3] = {
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
- .info = snd_ac97_ymf753_spdif_source_info,
- .get = snd_ac97_ymf753_spdif_source_get,
- .put = snd_ac97_ymf753_spdif_source_put,
- },
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Output Pin",
- .info = snd_ac97_ymf753_spdif_output_pin_info,
- .get = snd_ac97_ymf753_spdif_output_pin_get,
- .put = snd_ac97_ymf753_spdif_output_pin_put,
- },
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",NONE,NONE) "Mute", AC97_YMF753_DIT_CTRL2, 2, 1, 1)
-};
-
-
-/*
- * C-Media codecs
- */
-
-static int snd_ac97_cmedia_spdif_playback_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
-{
- static char *texts[] = { "Analog", "Digital" };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 2;
- if (uinfo->value.enumerated.item > 1)
- uinfo->value.enumerated.item = 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int snd_ac97_cmedia_spdif_playback_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- val = ac97->regs[AC97_CM9739_SPDIF_CTRL];
- ucontrol->value.enumerated.item[0] = (val >> 1) & 0x01;
- return 0;
-}
-
-static int snd_ac97_cmedia_spdif_playback_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
-{
- ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
-
- return snd_ac97_update_bits(ac97, AC97_CM9739_SPDIF_CTRL,
- 0x01 << 1,
- (ucontrol->value.enumerated.item[0] & 0x01) << 1);
-}
-
-static const snd_kcontrol_new_t snd_ac97_cm9739_controls_spdif[] = {
- /* BIT 0: SPDI_EN - always true */
- { /* BIT 1: SPDIFS */
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
- .info = snd_ac97_cmedia_spdif_playback_source_info,
- .get = snd_ac97_cmedia_spdif_playback_source_get,
- .put = snd_ac97_cmedia_spdif_playback_source_put,
- },
- /* BIT 2: IG_SPIV */
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Valid Switch", AC97_CM9739_SPDIF_CTRL, 2, 1, 0),
- /* BIT 3: SPI2F */
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Monitor", AC97_CM9739_SPDIF_CTRL, 3, 1, 0),
- /* BIT 4: SPI2SDI */
- AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_CM9739_SPDIF_CTRL, 4, 1, 0),
- /* BIT 8: SPD32 - 32bit SPDIF - not supported yet */
-};
-
-static const snd_kcontrol_new_t snd_ac97_cm9739_controls[] = {
- AC97_SINGLE("Line-In As Surround", AC97_CM9739_MULTI_CHAN, 10, 1, 0),
-};
-
-static const snd_kcontrol_new_t snd_ac97_cm9738_controls[] = {
- AC97_SINGLE("Line-In As Surround", AC97_CM9738_VENDOR_CTRL, 10, 1, 0),
- AC97_SINGLE("Duplicate Front", AC97_CM9738_VENDOR_CTRL, 13, 1, 0),
-};
-
/*
*
*/
@@ -1414,7 +1052,7 @@
if (!(val & mask)) {
/* nothing seems to be here - mute flag is not set */
/* try another test */
- snd_ac97_write_cache_test(ac97, reg, val | mask);
+ snd_ac97_write_cache(ac97, reg, val | mask);
val = snd_ac97_read(ac97, reg);
if (!(val & mask))
return 0; /* nothing here */
@@ -1422,7 +1060,7 @@
return 1; /* success, useable */
}
-static int snd_ac97_try_bit(ac97_t * ac97, int reg, int bit)
+int snd_ac97_try_bit(ac97_t * ac97, int reg, int bit)
{
unsigned short mask, val, orig, res;
@@ -1491,7 +1129,7 @@
return x;
}
-static snd_kcontrol_t *snd_ac97_cnew(const snd_kcontrol_new_t *_template, ac97_t * ac97)
+snd_kcontrol_t *snd_ac97_cnew(const snd_kcontrol_new_t *_template, ac97_t * ac97)
{
snd_kcontrol_new_t template;
memcpy(&template, _template, sizeof(template));
@@ -1500,8 +1138,9 @@
return snd_ctl_new1(&template, ac97);
}
-static int snd_ac97_mixer_build(snd_card_t * card, ac97_t * ac97)
+static int snd_ac97_mixer_build(ac97_t * ac97)
{
+ snd_card_t *card = ac97->card;
snd_kcontrol_t *kctl;
const snd_kcontrol_new_t *knew;
int err;
@@ -1751,39 +1390,9 @@
snd_ac97_write_cache(ac97, AC97_GENERAL_PURPOSE, 0x0000);
/* build 3D controls */
- switch (ac97->id) {
- case AC97_ID_STAC9708:
- if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
- return err;
- strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
- kctl->private_value = AC97_3D_CONTROL | (3 << 16);
- if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
- return err;
- strcpy(kctl->id.name, "3D Control Sigmatel - Rear Depth");
- kctl->private_value = AC97_3D_CONTROL | (2 << 8) | (3 << 16);
- snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
- break;
- case AC97_ID_STAC9700:
- case AC97_ID_STAC9721:
- case AC97_ID_STAC9744:
- case AC97_ID_STAC9756:
- if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
- return err;
- strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
- kctl->private_value = AC97_3D_CONTROL | (3 << 16);
- snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
- break;
- case AC97_ID_YMF753:
- if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
- return err;
- strcpy(kctl->id.name, "3D Control - Wide");
- kctl->private_value = AC97_3D_CONTROL | (9 << 8) | (7 << 16);
- snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_ymf753_controls_speaker, ac97))) < 0)
- return err;
- snd_ac97_write_cache(ac97, AC97_YMF753_3D_MODE_SEL, 0x0c00);
- break;
- default:
+ if (ac97->build_ops && ac97->build_ops->build_3d) {
+ ac97->build_ops->build_3d(ac97);
+ } else {
if (snd_ac97_try_volume_mix(ac97, AC97_3D_CONTROL)) {
unsigned short val;
val = 0x0707;
@@ -1801,115 +1410,31 @@
snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
}
}
-
+
/* build S/PDIF controls */
if (ac97->ext_id & AC97_EI_SPDIF) {
- if (ac97->flags & AC97_CS_SPDIF) {
- for (idx = 0; idx < 3; idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_spdif[idx], ac97))) < 0)
- return err;
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_cirrus_controls_spdif[0], ac97))) < 0)
+ if (ac97->build_ops && ac97->build_ops->build_spdif) {
+ if ((err = ac97->build_ops->build_spdif(ac97)) < 0)
return err;
- switch (ac97->id & AC97_ID_CS_MASK) {
- case AC97_ID_CS4205:
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_cirrus_controls_spdif[1], ac97))) < 0)
- return err;
- break;
- }
- /* set default PCM S/PDIF params */
- /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
- snd_ac97_write_cache(ac97, AC97_CSR_SPDIF, 0x0a20);
- } else if (ac97->flags & AC97_CX_SPDIF) {
- for (idx = 0; idx < 3; idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_spdif[idx], ac97))) < 0)
- return err;
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_conexant_controls_spdif[0], ac97))) < 0)
- return err;
- /* set default PCM S/PDIF params */
- /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
- snd_ac97_write_cache(ac97, AC97_CXR_AUDIO_MISC,
- snd_ac97_read(ac97, AC97_CXR_AUDIO_MISC) & ~(AC97_CXR_SPDIFEN|AC97_CXR_COPYRGT|AC97_CXR_SPDIF_MASK));
-
} else {
for (idx = 0; idx < 5; idx++)
if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_spdif[idx], ac97))) < 0)
return err;
- switch (ac97->id) {
- case AC97_ID_YMF753:
- for (idx = 0; idx < 3; idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_ymf753_controls_spdif[idx], ac97))) < 0)
- return err;
- break;
- case AC97_ID_AD1980:
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_ad1980_spdif_source, ac97))) < 0)
+ if (ac97->build_ops && ac97->build_ops->build_post_spdif) {
+ if ((err = ac97->build_ops->build_post_spdif(ac97)) < 0)
return err;
- break;
- case AC97_ID_CM9739:
- for (idx = 0; idx < ARRAY_SIZE(snd_ac97_cm9739_controls_spdif); idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_cm9739_controls_spdif[idx], ac97))) < 0)
- return err;
- break;
}
/* set default PCM S/PDIF params */
/* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
snd_ac97_write_cache(ac97, AC97_SPDIF, 0x2a20);
}
-
ac97->spdif_status = SNDRV_PCM_DEFAULT_CON_SPDIF;
}
/* build chip specific controls */
- switch (ac97->id) {
- case AC97_ID_STAC9700:
- case AC97_ID_STAC9708:
- case AC97_ID_STAC9721:
- case AC97_ID_STAC9744:
- case AC97_ID_STAC9756:
- snd_ac97_write_cache_test(ac97, AC97_SIGMATEL_ANALOG, snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) & ~0x0003);
- if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 1))
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_sigmatel_controls[0], ac97))) < 0)
- return err;
- if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 0))
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_sigmatel_controls[1], ac97))) < 0)
- return err;
- break;
- case AC97_ID_ALC650:
- /* detect ALC650 rev.E of later */
- for (idx = 0; idx < ARRAY_SIZE(snd_ac97_controls_alc650); idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_alc650[idx], ac97))) < 0)
- return err;
- if ((err = snd_ctl_add(card, snd_ac97_cnew(ac97->spec.dev_flags ?
- &snd_ac97_control_alc650_mic :
- &snd_ac97_control_alc650_mic_gpio, ac97))) < 0)
- return err;
- if (ac97->ext_id & AC97_EI_SPDIF) {
- for (idx = 0; idx < ARRAY_SIZE(snd_ac97_spdif_controls_alc650); idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_spdif_controls_alc650[idx], ac97))) < 0)
- return err;
- }
- break;
- case AC97_ID_VT1616:
- if (snd_ac97_try_bit(ac97, 0x5a, 9))
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_vt1616[0], ac97))) < 0)
- return err;
- for (idx = 1; idx < ARRAY_SIZE(snd_ac97_controls_vt1616); idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_vt1616[idx], ac97))) < 0)
- return err;
- break;
- case AC97_ID_CM9739:
- for (idx = 1; idx < ARRAY_SIZE(snd_ac97_cm9739_controls); idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_cm9739_controls[idx], ac97))) < 0)
- return err;
- break;
- case AC97_ID_CM9738:
- for (idx = 1; idx < ARRAY_SIZE(snd_ac97_cm9738_controls); idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_cm9738_controls[idx], ac97))) < 0)
- return err;
- break;
- default:
- /* nothing */
- break;
- }
+ if (ac97->build_ops && ac97->build_ops->build_specific)
+ if ((err = ac97->build_ops->build_specific(ac97)) < 0)
+ return err;
if (snd_ac97_try_bit(ac97, AC97_POWERDOWN, 15)) {
if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_eapd, ac97))) < 0)
@@ -1931,7 +1456,7 @@
unsigned int tmp;
tmp = ((unsigned int)rate * ac97->clock) / 48000;
- snd_ac97_write_cache_test(ac97, reg, tmp & 0xffff);
+ snd_ac97_write_cache(ac97, reg, tmp & 0xffff);
val = snd_ac97_read(ac97, reg);
return val == (tmp & 0xffff);
}
@@ -1961,7 +1486,7 @@
*r_result = result;
}
-static void snd_ac97_get_name(ac97_t *ac97, unsigned int id, char *name, int modem)
+void snd_ac97_get_name(ac97_t *ac97, unsigned int id, char *name, int modem)
{
const ac97_codec_id_t *pid;
@@ -2138,12 +1663,12 @@
/* FIXME: add powerdown control */
if (ac97_is_audio(ac97)) {
/* nothing should be in powerdown mode */
- snd_ac97_write_cache_test(ac97, AC97_POWERDOWN, 0);
- snd_ac97_write_cache_test(ac97, AC97_RESET, 0); /* reset to defaults */
+ snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0);
+ snd_ac97_write_cache(ac97, AC97_RESET, 0); /* reset to defaults */
udelay(100);
/* nothing should be in powerdown mode */
- snd_ac97_write_cache_test(ac97, AC97_POWERDOWN, 0);
- snd_ac97_write_cache_test(ac97, AC97_GENERAL_PURPOSE, 0);
+ snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0);
+ snd_ac97_write_cache(ac97, AC97_GENERAL_PURPOSE, 0);
end_time = jiffies + (HZ / 10);
do {
if ((snd_ac97_read(ac97, AC97_POWERDOWN) & 0x0f) == 0x0f)
@@ -2212,10 +1737,10 @@
snd_ac97_free(ac97);
return err;
}
- }
- if (ac97_is_audio(ac97) && snd_ac97_mixer_build(card, ac97) < 0) {
- snd_ac97_free(ac97);
- return -ENOMEM;
+ if (snd_ac97_mixer_build(ac97) < 0) {
+ snd_ac97_free(ac97);
+ return -ENOMEM;
+ }
}
snd_ac97_proc_init(card, ac97, "ac97");
if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ac97, &ops)) < 0) {
@@ -2357,21 +1882,21 @@
/* note: it's important to set the rate at first */
tmp = AC97_MEA_GPIO;
if (ac97->ext_mid & AC97_MEI_LINE1) {
- snd_ac97_write_cache_test(ac97, AC97_LINE1_RATE, 12000);
+ snd_ac97_write_cache(ac97, AC97_LINE1_RATE, 12000);
tmp |= AC97_MEA_ADC1 | AC97_MEA_DAC1;
}
if (ac97->ext_mid & AC97_MEI_LINE2) {
- snd_ac97_write_cache_test(ac97, AC97_LINE2_RATE, 12000);
+ snd_ac97_write_cache(ac97, AC97_LINE2_RATE, 12000);
tmp |= AC97_MEA_ADC2 | AC97_MEA_DAC2;
}
if (ac97->ext_mid & AC97_MEI_HANDSET) {
- snd_ac97_write_cache_test(ac97, AC97_HANDSET_RATE, 12000);
+ snd_ac97_write_cache(ac97, AC97_HANDSET_RATE, 12000);
tmp |= AC97_MEA_HADC | AC97_MEA_HDAC;
}
- snd_ac97_write_cache_test(ac97, AC97_EXTENDED_MSTATUS, 0xff00 & ~(tmp << 8));
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0xff00 & ~(tmp << 8));
udelay(100);
/* nothing should be in powerdown mode */
- snd_ac97_write_cache_test(ac97, AC97_EXTENDED_MSTATUS, 0xff00 & ~(tmp << 8));
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0xff00 & ~(tmp << 8));
end_time = jiffies + (HZ / 10);
do {
if ((snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS) & tmp) == tmp)
@@ -2419,270 +1944,6 @@
}
*rac97 = ac97;
return 0;
-}
-
-/*
- * proc interface
- */
-
-static void snd_ac97_proc_read_main(ac97_t *ac97, snd_info_buffer_t * buffer, int subidx)
-{
- char name[64];
- unsigned int id;
- unsigned short val, tmp, ext, mext;
- static const char *spdif_slots[4] = { " SPDIF=3/4", " SPDIF=7/8", " SPDIF=6/9", " SPDIF=res" };
- static const char *spdif_rates[4] = { " Rate=44.1kHz", " Rate=res", " Rate=48kHz", " Rate=32kHz" };
- static const char *spdif_rates_cs4205[4] = { " Rate=48kHz", " Rate=44.1kHz", " Rate=res", " Rate=res" };
-
- id = snd_ac97_read(ac97, AC97_VENDOR_ID1) << 16;
- id |= snd_ac97_read(ac97, AC97_VENDOR_ID2);
- snd_ac97_get_name(NULL, id, name, 0);
- snd_iprintf(buffer, "%d-%d/%d: %s\n\n", ac97->addr, ac97->num, subidx, name);
- if ((ac97->scaps & AC97_SCAP_AUDIO) == 0)
- goto __modem;
-
- // val = snd_ac97_read(ac97, AC97_RESET);
- val = ac97->caps;
- snd_iprintf(buffer, "Capabilities :%s%s%s%s%s%s\n",
- val & AC97_BC_DEDICATED_MIC ? " -dedicated MIC PCM IN channel-" : "",
- val & AC97_BC_RESERVED1 ? " -reserved1-" : "",
- val & AC97_BC_BASS_TREBLE ? " -bass & treble-" : "",
- val & AC97_BC_SIM_STEREO ? " -simulated stereo-" : "",
- val & AC97_BC_HEADPHONE ? " -headphone out-" : "",
- val & AC97_BC_LOUDNESS ? " -loudness-" : "");
- tmp = ac97->caps & AC97_BC_DAC_MASK;
- snd_iprintf(buffer, "DAC resolution : %s%s%s%s\n",
- tmp == AC97_BC_16BIT_DAC ? "16-bit" : "",
- tmp == AC97_BC_18BIT_DAC ? "18-bit" : "",
- tmp == AC97_BC_20BIT_DAC ? "20-bit" : "",
- tmp == AC97_BC_DAC_MASK ? "???" : "");
- tmp = ac97->caps & AC97_BC_ADC_MASK;
- snd_iprintf(buffer, "ADC resolution : %s%s%s%s\n",
- tmp == AC97_BC_16BIT_ADC ? "16-bit" : "",
- tmp == AC97_BC_18BIT_ADC ? "18-bit" : "",
- tmp == AC97_BC_20BIT_ADC ? "20-bit" : "",
- tmp == AC97_BC_ADC_MASK ? "???" : "");
- snd_iprintf(buffer, "3D enhancement : %s\n",
- snd_ac97_stereo_enhancements[(val >> 10) & 0x1f]);
- snd_iprintf(buffer, "\nCurrent setup\n");
- val = snd_ac97_read(ac97, AC97_MIC);
- snd_iprintf(buffer, "Mic gain : %s [%s]\n", val & 0x0040 ? "+20dB" : "+0dB", ac97->regs[AC97_MIC] & 0x0040 ? "+20dB" : "+0dB");
- val = snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
- snd_iprintf(buffer, "POP path : %s 3D\n"
- "Sim. stereo : %s\n"
- "3D enhancement : %s\n"
- "Loudness : %s\n"
- "Mono output : %s\n"
- "Mic select : %s\n"
- "ADC/DAC loopback : %s\n",
- val & 0x8000 ? "post" : "pre",
- val & 0x4000 ? "on" : "off",
- val & 0x2000 ? "on" : "off",
- val & 0x1000 ? "on" : "off",
- val & 0x0200 ? "Mic" : "MIX",
- val & 0x0100 ? "Mic2" : "Mic1",
- val & 0x0080 ? "on" : "off");
-
- ext = snd_ac97_read(ac97, AC97_EXTENDED_ID);
- if (ext == 0)
- goto __modem;
-
- snd_iprintf(buffer, "Extended ID : codec=%i rev=%i%s%s%s%s DSA=%i%s%s%s%s\n",
- (ext & AC97_EI_ADDR_MASK) >> AC97_EI_ADDR_SHIFT,
- (ext & AC97_EI_REV_MASK) >> AC97_EI_REV_SHIFT,
- ext & AC97_EI_AMAP ? " AMAP" : "",
- ext & AC97_EI_LDAC ? " LDAC" : "",
- ext & AC97_EI_SDAC ? " SDAC" : "",
- ext & AC97_EI_CDAC ? " CDAC" : "",
- (ext & AC97_EI_DACS_SLOT_MASK) >> AC97_EI_DACS_SLOT_SHIFT,
- ext & AC97_EI_VRM ? " VRM" : "",
- ext & AC97_EI_SPDIF ? " SPDIF" : "",
- ext & AC97_EI_DRA ? " DRA" : "",
- ext & AC97_EI_VRA ? " VRA" : "");
- val = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
- snd_iprintf(buffer, "Extended status :%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
- val & AC97_EA_PRL ? " PRL" : "",
- val & AC97_EA_PRK ? " PRK" : "",
- val & AC97_EA_PRJ ? " PRJ" : "",
- val & AC97_EA_PRI ? " PRI" : "",
- val & AC97_EA_SPCV ? " SPCV" : "",
- val & AC97_EA_MDAC ? " MADC" : "",
- val & AC97_EA_LDAC ? " LDAC" : "",
- val & AC97_EA_SDAC ? " SDAC" : "",
- val & AC97_EA_CDAC ? " CDAC" : "",
- ext & AC97_EI_SPDIF ? spdif_slots[(val & AC97_EA_SPSA_SLOT_MASK) >> AC97_EA_SPSA_SLOT_SHIFT] : "",
- val & AC97_EA_VRM ? " VRM" : "",
- val & AC97_EA_SPDIF ? " SPDIF" : "",
- val & AC97_EA_DRA ? " DRA" : "",
- val & AC97_EA_VRA ? " VRA" : "");
- if (ext & AC97_EI_VRA) { /* VRA */
- val = snd_ac97_read(ac97, AC97_PCM_FRONT_DAC_RATE);
- snd_iprintf(buffer, "PCM front DAC : %iHz\n", val);
- if (ext & AC97_EI_SDAC) {
- val = snd_ac97_read(ac97, AC97_PCM_SURR_DAC_RATE);
- snd_iprintf(buffer, "PCM Surr DAC : %iHz\n", val);
- }
- if (ext & AC97_EI_LDAC) {
- val = snd_ac97_read(ac97, AC97_PCM_LFE_DAC_RATE);
- snd_iprintf(buffer, "PCM LFE DAC : %iHz\n", val);
- }
- val = snd_ac97_read(ac97, AC97_PCM_LR_ADC_RATE);
- snd_iprintf(buffer, "PCM ADC : %iHz\n", val);
- }
- if (ext & AC97_EI_VRM) {
- val = snd_ac97_read(ac97, AC97_PCM_MIC_ADC_RATE);
- snd_iprintf(buffer, "PCM MIC ADC : %iHz\n", val);
- }
- if ((ext & AC97_EI_SPDIF) || (ac97->flags & AC97_CS_SPDIF)) {
- if (ac97->flags & AC97_CS_SPDIF)
- val = snd_ac97_read(ac97, AC97_CSR_SPDIF);
- else
- val = snd_ac97_read(ac97, AC97_SPDIF);
-
- snd_iprintf(buffer, "SPDIF Control :%s%s%s%s Category=0x%x Generation=%i%s%s%s\n",
- val & AC97_SC_PRO ? " PRO" : " Consumer",
- val & AC97_SC_NAUDIO ? " Non-audio" : " PCM",
- val & AC97_SC_COPY ? " Copyright" : "",
- val & AC97_SC_PRE ? " Preemph50/15" : "",
- (val & AC97_SC_CC_MASK) >> AC97_SC_CC_SHIFT,
- (val & AC97_SC_L) >> 11,
- (ac97->flags & AC97_CS_SPDIF) ?
- spdif_rates_cs4205[(val & AC97_SC_SPSR_MASK) >> AC97_SC_SPSR_SHIFT] :
- spdif_rates[(val & AC97_SC_SPSR_MASK) >> AC97_SC_SPSR_SHIFT],
- (ac97->flags & AC97_CS_SPDIF) ?
- (val & AC97_SC_DRS ? " Validity" : "") :
- (val & AC97_SC_DRS ? " DRS" : ""),
- (ac97->flags & AC97_CS_SPDIF) ?
- (val & AC97_SC_V ? " Enabled" : "") :
- (val & AC97_SC_V ? " Validity" : ""));
- }
-
- __modem:
- mext = snd_ac97_read(ac97, AC97_EXTENDED_MID);
- if (mext == 0)
- return;
-
- snd_iprintf(buffer, "Extended modem ID: codec=%i%s%s%s%s%s\n",
- (mext & AC97_MEI_ADDR_MASK) >> AC97_MEI_ADDR_SHIFT,
- mext & AC97_MEI_CID2 ? " CID2" : "",
- mext & AC97_MEI_CID1 ? " CID1" : "",
- mext & AC97_MEI_HANDSET ? " HSET" : "",
- mext & AC97_MEI_LINE2 ? " LIN2" : "",
- mext & AC97_MEI_LINE1 ? " LIN1" : "");
- val = snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS);
- snd_iprintf(buffer, "Modem status :%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
- val & AC97_MEA_GPIO ? " GPIO" : "",
- val & AC97_MEA_MREF ? " MREF" : "",
- val & AC97_MEA_ADC1 ? " ADC1" : "",
- val & AC97_MEA_DAC1 ? " DAC1" : "",
- val & AC97_MEA_ADC2 ? " ADC2" : "",
- val & AC97_MEA_DAC2 ? " DAC2" : "",
- val & AC97_MEA_HADC ? " HADC" : "",
- val & AC97_MEA_HDAC ? " HDAC" : "",
- val & AC97_MEA_PRA ? " PRA(GPIO)" : "",
- val & AC97_MEA_PRB ? " PRB(res)" : "",
- val & AC97_MEA_PRC ? " PRC(ADC1)" : "",
- val & AC97_MEA_PRD ? " PRD(DAC1)" : "",
- val & AC97_MEA_PRE ? " PRE(ADC2)" : "",
- val & AC97_MEA_PRF ? " PRF(DAC2)" : "",
- val & AC97_MEA_PRG ? " PRG(HADC)" : "",
- val & AC97_MEA_PRH ? " PRH(HDAC)" : "");
- if (mext & AC97_MEI_LINE1) {
- val = snd_ac97_read(ac97, AC97_LINE1_RATE);
- snd_iprintf(buffer, "Line1 rate : %iHz\n", val);
- }
- if (mext & AC97_MEI_LINE2) {
- val = snd_ac97_read(ac97, AC97_LINE2_RATE);
- snd_iprintf(buffer, "Line2 rate : %iHz\n", val);
- }
- if (mext & AC97_MEI_HANDSET) {
- val = snd_ac97_read(ac97, AC97_HANDSET_RATE);
- snd_iprintf(buffer, "Headset rate : %iHz\n", val);
- }
-}
-
-static void snd_ac97_proc_read(snd_info_entry_t *entry, snd_info_buffer_t * buffer)
-{
- ac97_t *ac97 = snd_magic_cast(ac97_t, entry->private_data, return);
-
- if ((ac97->id & 0xffffff40) == AC97_ID_AD1881) { // Analog Devices AD1881/85/86
- int idx;
- down(&ac97->spec.ad18xx.mutex);
- for (idx = 0; idx < 3; idx++)
- if (ac97->spec.ad18xx.id[idx]) {
- /* select single codec */
- snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, ac97->spec.ad18xx.unchained[idx] | ac97->spec.ad18xx.chained[idx]);
- snd_ac97_proc_read_main(ac97, buffer, idx);
- snd_iprintf(buffer, "\n\n");
- }
- /* select all codecs */
- snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, 0x7000);
- up(&ac97->spec.ad18xx.mutex);
-
- snd_iprintf(buffer, "\nAD18XX configuration\n");
- snd_iprintf(buffer, "Unchained : 0x%04x,0x%04x,0x%04x\n",
- ac97->spec.ad18xx.unchained[0],
- ac97->spec.ad18xx.unchained[1],
- ac97->spec.ad18xx.unchained[2]);
- snd_iprintf(buffer, "Chained : 0x%04x,0x%04x,0x%04x\n",
- ac97->spec.ad18xx.chained[0],
- ac97->spec.ad18xx.chained[1],
- ac97->spec.ad18xx.chained[2]);
- } else {
- snd_ac97_proc_read_main(ac97, buffer, 0);
- }
-}
-
-static void snd_ac97_proc_regs_read_main(ac97_t *ac97, snd_info_buffer_t * buffer, int subidx)
-{
- int reg, val;
-
- for (reg = 0; reg < 0x80; reg += 2) {
- val = snd_ac97_read(ac97, reg);
- snd_iprintf(buffer, "%i:%02x = %04x\n", subidx, reg, val);
- }
-}
-
-static void snd_ac97_proc_regs_read(snd_info_entry_t *entry,
- snd_info_buffer_t * buffer)
-{
- ac97_t *ac97 = snd_magic_cast(ac97_t, entry->private_data, return);
-
- if ((ac97->id & 0xffffff40) == AC97_ID_AD1881) { // Analog Devices AD1881/85/86
-
- int idx;
- down(&ac97->spec.ad18xx.mutex);
- for (idx = 0; idx < 3; idx++)
- if (ac97->spec.ad18xx.id[idx]) {
- /* select single codec */
- snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, ac97->spec.ad18xx.unchained[idx] | ac97->spec.ad18xx.chained[idx]);
- snd_ac97_proc_regs_read_main(ac97, buffer, idx);
- }
- /* select all codecs */
- snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, 0x7000);
- up(&ac97->spec.ad18xx.mutex);
- } else {
- snd_ac97_proc_regs_read_main(ac97, buffer, 0);
- }
-}
-
-static void snd_ac97_proc_init(snd_card_t * card, ac97_t * ac97, const char *prefix)
-{
- snd_info_entry_t *entry;
- char name[32];
-
- if (ac97->num)
- sprintf(name, "%s#%d-%d", prefix, ac97->addr, ac97->num);
- else
- sprintf(name, "%s#%d", prefix, ac97->addr);
- if (! snd_card_proc_new(card, name, &entry))
- snd_info_set_text_ops(entry, ac97, snd_ac97_proc_read);
- if (ac97->num)
- sprintf(name, "%s#%d-%dregs", prefix, ac97->addr, ac97->num);
- else
- sprintf(name, "%s#%dregs", prefix, ac97->addr);
- if (! snd_card_proc_new(card, name, &entry))
- snd_info_set_text_ops(entry, ac97, snd_ac97_proc_regs_read);
}
/*
diff -Nru a/sound/pci/ac97/ac97_local.h b/sound/pci/ac97/ac97_local.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/sound/pci/ac97/ac97_local.h Sun Aug 3 13:14:53 2003
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#define AC97_SINGLE(xname, reg, shift, mask, invert) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_info_single, \
+ .get = snd_ac97_get_single, .put = snd_ac97_put_single, \
+ .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
+
+/* ac97_codec.c */
+extern const char *snd_ac97_stereo_enhancements[];
+extern const snd_kcontrol_new_t snd_ac97_controls_3d[];
+extern const snd_kcontrol_new_t snd_ac97_controls_spdif[];
+snd_kcontrol_t *snd_ac97_cnew(const snd_kcontrol_new_t *_template, ac97_t * ac97);
+void snd_ac97_get_name(ac97_t *ac97, unsigned int id, char *name, int modem);
+int snd_ac97_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo);
+int snd_ac97_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
+int snd_ac97_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
+int snd_ac97_try_bit(ac97_t * ac97, int reg, int bit);
+
+/* ac97_proc.c */
+void snd_ac97_proc_init(snd_card_t * card, ac97_t * ac97, const char *prefix);
diff -Nru a/sound/pci/ac97/ac97_patch.c b/sound/pci/ac97/ac97_patch.c
--- a/sound/pci/ac97/ac97_patch.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/ac97/ac97_patch.c Sun Aug 3 13:14:52 2003
@@ -3,7 +3,8 @@
* Universal interface for Audio Codec '97
*
* For more details look to AC '97 component specification revision 2.2
- * by Intel Corporation (http://developer.intel.com).
+ * by Intel Corporation (http://developer.intel.com) and to datasheets
+ * for specific codecs.
*
*
* This program is free software; you can redistribute it and/or modify
@@ -28,15 +29,203 @@
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
+#include <sound/control.h>
#include <sound/ac97_codec.h>
-#include <sound/asoundef.h>
-#include <sound/initval.h>
#include "ac97_patch.h"
+#include "ac97_id.h"
+#include "ac97_local.h"
+
+#define chip_t ac97_t
/*
* Chip specific initialization
*/
+static int patch_build_controls(ac97_t * ac97, const snd_kcontrol_new_t *controls, int count)
+{
+ int idx, err;
+
+ for (idx = 0; idx < count; idx++)
+ if ((err = snd_ctl_add(ac97->card, snd_ac97_cnew(&controls[idx], ac97))) < 0)
+ return err;
+ return 0;
+}
+
+/* The following snd_ac97_ymf753_... items added by David Shust (dshust@shustring.com) */
+
+/* It is possible to indicate to the Yamaha YMF753 the type of speakers being used. */
+static int snd_ac97_ymf753_info_speaker(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[3] = {
+ "Standard", "Small", "Smaller"
+ };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 3;
+ if (uinfo->value.enumerated.item > 2)
+ uinfo->value.enumerated.item = 2;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ymf753_get_speaker(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_YMF753_3D_MODE_SEL];
+ val = (val >> 10) & 3;
+ if (val > 0) /* 0 = invalid */
+ val--;
+ ucontrol->value.enumerated.item[0] = val;
+ return 0;
+}
+
+static int snd_ac97_ymf753_put_speaker(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 2)
+ return -EINVAL;
+ val = (ucontrol->value.enumerated.item[0] + 1) << 10;
+ return snd_ac97_update(ac97, AC97_YMF753_3D_MODE_SEL, val);
+}
+
+static const snd_kcontrol_new_t snd_ac97_ymf753_controls_speaker =
+{
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "3D Control - Speaker",
+ .info = snd_ac97_ymf753_info_speaker,
+ .get = snd_ac97_ymf753_get_speaker,
+ .put = snd_ac97_ymf753_put_speaker,
+};
+
+/* It is possible to indicate to the Yamaha YMF753 the source to direct to the S/PDIF output. */
+static int snd_ac97_ymf753_spdif_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[2] = { "AC-Link", "A/D Converter" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 2;
+ if (uinfo->value.enumerated.item > 1)
+ uinfo->value.enumerated.item = 1;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_YMF753_DIT_CTRL2];
+ ucontrol->value.enumerated.item[0] = (val >> 1) & 1;
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << 1;
+ return snd_ac97_update_bits(ac97, AC97_YMF753_DIT_CTRL2, 0x0002, val);
+}
+
+/* The AC'97 spec states that the S/PDIF signal is to be output at pin 48.
+ The YMF753 will output the S/PDIF signal to pin 43, 47 (EAPD), or 48.
+ By default, no output pin is selected, and the S/PDIF signal is not output.
+ There is also a bit to mute S/PDIF output in a vendor-specific register. */
+static int snd_ac97_ymf753_spdif_output_pin_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[3] = { "Disabled", "Pin 43", "Pin 48" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 3;
+ if (uinfo->value.enumerated.item > 2)
+ uinfo->value.enumerated.item = 2;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_output_pin_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_YMF753_DIT_CTRL2];
+ ucontrol->value.enumerated.item[0] = (val & 0x0008) ? 2 : (val & 0x0020) ? 1 : 0;
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_output_pin_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 2)
+ return -EINVAL;
+ val = (ucontrol->value.enumerated.item[0] == 2) ? 0x0008 :
+ (ucontrol->value.enumerated.item[0] == 1) ? 0x0020 : 0;
+ return snd_ac97_update_bits(ac97, AC97_YMF753_DIT_CTRL2, 0x0028, val);
+ /* The following can be used to direct S/PDIF output to pin 47 (EAPD).
+ snd_ac97_write_cache(ac97, 0x62, snd_ac97_read(ac97, 0x62) | 0x0008); */
+}
+
+static const snd_kcontrol_new_t snd_ac97_ymf753_controls_spdif[3] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
+ .info = snd_ac97_ymf753_spdif_source_info,
+ .get = snd_ac97_ymf753_spdif_source_get,
+ .put = snd_ac97_ymf753_spdif_source_put,
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Output Pin",
+ .info = snd_ac97_ymf753_spdif_output_pin_info,
+ .get = snd_ac97_ymf753_spdif_output_pin_get,
+ .put = snd_ac97_ymf753_spdif_output_pin_put,
+ },
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",NONE,NONE) "Mute", AC97_YMF753_DIT_CTRL2, 2, 1, 1)
+};
+
+static int patch_yamaha_ymf753_3d(ac97_t * ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+
+ if ((err = snd_ctl_add(ac97->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control - Wide");
+ kctl->private_value = AC97_3D_CONTROL | (9 << 8) | (7 << 16);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ if ((err = snd_ctl_add(ac97->card, snd_ac97_cnew(&snd_ac97_ymf753_controls_speaker, ac97))) < 0)
+ return err;
+ snd_ac97_write_cache(ac97, AC97_YMF753_3D_MODE_SEL, 0x0c00);
+ return 0;
+}
+
+static int patch_yamaha_ymf753_post_spdif(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_ymf753_controls_spdif, ARRAY_SIZE(snd_ac97_ymf753_controls_spdif))) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_yamaha_ymf753_ops = {
+ .build_3d = patch_yamaha_ymf753_3d,
+ .build_post_spdif = patch_yamaha_ymf753_post_spdif
+};
+
int patch_yamaha_ymf753(ac97_t * ac97)
{
/* Patch for Yamaha YMF753, Copyright (c) by David Shust, dshust@shustring.com.
@@ -46,6 +235,7 @@
By default, no output pin is selected, and the S/PDIF signal is not output.
There is also a bit to mute S/PDIF output in a vendor-specific register.
*/
+ ac97->build_ops = &patch_yamaha_ymf753_ops;
ac97->caps |= AC97_BC_BASS_TREBLE;
ac97->caps |= 0x04 << 10; /* Yamaha 3D enhancement */
return 0;
@@ -57,12 +247,6 @@
* added support for WM9705,WM9708,WM9709,WM9710,WM9711,WM9712 and WM9717.
*/
-#define AC97_WM97XX_FMIXER_VOL 0x72
-#define AC97_WM9704_RMIXER_VOL 0x74
-#define AC97_WM9704_TEST 0x5a
-#define AC97_WM9704_RPCM_VOL 0x70
-#define AC97_WM9711_OUT3VOL 0x16
-
int patch_wolfson03(ac97_t * ac97)
{
/* This is known to work for the ViewSonic ViewPad 1000
@@ -117,10 +301,89 @@
return 0;
}
+static int patch_sigmatel_stac9700_3d(ac97_t * ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+
+ if ((err = snd_ctl_add(ac97->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
+ kctl->private_value = AC97_3D_CONTROL | (3 << 16);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ return 0;
+}
+
+static int patch_sigmatel_stac9708_3d(ac97_t * ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+
+ if ((err = snd_ctl_add(ac97->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
+ kctl->private_value = AC97_3D_CONTROL | (3 << 16);
+ if ((err = snd_ctl_add(ac97->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control Sigmatel - Rear Depth");
+ kctl->private_value = AC97_3D_CONTROL | (2 << 8) | (3 << 16);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_sigmatel_4speaker =
+AC97_SINGLE("Sigmatel 4-Speaker Stereo Playback Switch", AC97_SIGMATEL_DAC2INVERT, 2, 1, 0);
+
+static const snd_kcontrol_new_t snd_ac97_sigmatel_phaseinvert =
+AC97_SINGLE("Sigmatel Surround Phase Inversion Playback Switch", AC97_SIGMATEL_DAC2INVERT, 3, 1, 0);
+
+static const snd_kcontrol_new_t snd_ac97_sigmatel_controls[] = {
+AC97_SINGLE("Sigmatel DAC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 1, 1, 0),
+AC97_SINGLE("Sigmatel ADC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 0, 1, 0)
+};
+
+static int patch_sigmatel_stac97xx_specific(ac97_t * ac97)
+{
+ int err;
+
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_ANALOG, snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) & ~0x0003);
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 1))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_controls[0], 1)) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 0))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_controls[1], 1)) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_DAC2INVERT, 2))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_4speaker, 1)) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_DAC2INVERT, 3))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_phaseinvert, 1)) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = {
+ .build_3d = patch_sigmatel_stac9700_3d,
+ .build_specific = patch_sigmatel_stac97xx_specific
+};
+
+static struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = {
+ .build_3d = patch_sigmatel_stac9708_3d,
+ .build_specific = patch_sigmatel_stac97xx_specific
+};
+
+int patch_sigmatel_stac9700(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
+ return 0;
+}
+
int patch_sigmatel_stac9708(ac97_t * ac97)
{
unsigned int codec72, codec6c;
+ ac97->build_ops = &patch_sigmatel_stac9708_ops;
+
codec72 = snd_ac97_read(ac97, AC97_SIGMATEL_BIAS2) & 0x8000;
codec6c = snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG);
@@ -142,6 +405,7 @@
int patch_sigmatel_stac9721(ac97_t * ac97)
{
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
if (snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) == 0) {
// patch for SigmaTel
snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
@@ -156,6 +420,7 @@
int patch_sigmatel_stac9744(ac97_t * ac97)
{
// patch for SigmaTel
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x0000); /* is this correct? --jk */
snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
@@ -167,6 +432,7 @@
int patch_sigmatel_stac9756(ac97_t * ac97)
{
// patch for SigmaTel
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x0000); /* is this correct? --jk */
snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
@@ -175,6 +441,35 @@
return 0;
}
+static const snd_kcontrol_new_t snd_ac97_cirrus_controls_spdif[2] = {
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CSR_SPDIF, 15, 1, 0),
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA", AC97_CSR_ACMODE, 0, 3, 0)
+};
+
+static int patch_cirrus_build_spdif(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3)) < 0)
+ return err;
+ if ((err = patch_build_controls(ac97, &snd_ac97_cirrus_controls_spdif[0], 1)) < 0)
+ return err;
+ switch (ac97->id & AC97_ID_CS_MASK) {
+ case AC97_ID_CS4205:
+ if ((err = patch_build_controls(ac97, &snd_ac97_cirrus_controls_spdif[1], 1)) < 0)
+ return err;
+ break;
+ }
+ /* set default PCM S/PDIF params */
+ /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
+ snd_ac97_write_cache(ac97, AC97_CSR_SPDIF, 0x0a20);
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_cirrus_ops = {
+ .build_spdif = patch_cirrus_build_spdif
+};
+
int patch_cirrus_spdif(ac97_t * ac97)
{
/* Basically, the cs4201/cs4205/cs4297a has non-standard sp/dif registers.
@@ -188,6 +483,7 @@
- sp/dif ssource select is in 0x5e bits 0,1.
*/
+ ac97->build_ops = &patch_cirrus_ops;
ac97->flags |= AC97_CS_SPDIF;
ac97->rates[AC97_RATES_SPDIF] &= ~SNDRV_PCM_RATE_32000;
ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
@@ -203,8 +499,32 @@
return patch_cirrus_spdif(ac97);
}
+static const snd_kcontrol_new_t snd_ac97_conexant_controls_spdif[1] = {
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CXR_AUDIO_MISC, 3, 1, 0),
+};
+
+static int patch_conexant_build_spdif(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3)) < 0)
+ return err;
+ if ((err = patch_build_controls(ac97, &snd_ac97_conexant_controls_spdif[0], 1)) < 0)
+ return err;
+ /* set default PCM S/PDIF params */
+ /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
+ snd_ac97_write_cache(ac97, AC97_CXR_AUDIO_MISC,
+ snd_ac97_read(ac97, AC97_CXR_AUDIO_MISC) & ~(AC97_CXR_SPDIFEN|AC97_CXR_COPYRGT|AC97_CXR_SPDIF_MASK));
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_conexant_ops = {
+ .build_spdif = patch_conexant_build_spdif
+};
+
int patch_conexant(ac97_t * ac97)
{
+ ac97->build_ops = &patch_conexant_ops;
ac97->flags |= AC97_CX_SPDIF;
ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
return 0;
@@ -330,6 +650,26 @@
return 0;
}
+static const snd_kcontrol_new_t snd_ac97_controls_ad1885[] = {
+ AC97_SINGLE("Digital Mono Direct", AC97_AD_MISC, 11, 1, 0),
+ AC97_SINGLE("Digital Audio Mode", AC97_AD_MISC, 12, 1, 0),
+ AC97_SINGLE("Low Power Mixer", AC97_AD_MISC, 14, 1, 0),
+ AC97_SINGLE("Zero Fill DAC", AC97_AD_MISC, 15, 1, 0),
+};
+
+static int patch_ad1885_specific(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_ad1885, ARRAY_SIZE(snd_ac97_controls_ad1885))) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_ad1885_build_ops = {
+ .build_specific = &patch_ad1885_specific
+};
+
int patch_ad1885(ac97_t * ac97)
{
unsigned short jack;
@@ -341,6 +681,8 @@
/* turn off jack sense bits D8 & D9 */
jack = snd_ac97_read(ac97, AC97_AD_JACK_SPDIF);
snd_ac97_write_cache(ac97, AC97_AD_JACK_SPDIF, jack | 0x0300);
+
+ ac97->build_ops = &patch_ad1885_build_ops;
return 0;
}
@@ -353,11 +695,63 @@
return 0;
}
+static int snd_ac97_ad1980_spdif_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[2] = { "AC-Link", "A/D Converter" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 2;
+ if (uinfo->value.enumerated.item > 1)
+ uinfo->value.enumerated.item = 1;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ad1980_spdif_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_AD_SERIAL_CFG];
+ ucontrol->value.enumerated.item[0] = (val >> 2) & 1;
+ return 0;
+}
+
+static int snd_ac97_ad1980_spdif_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << 2;
+ return snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x0004, val);
+}
+
+static const snd_kcontrol_new_t snd_ac97_ad1980_spdif_source = {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
+ .info = snd_ac97_ad1980_spdif_source_info,
+ .get = snd_ac97_ad1980_spdif_source_get,
+ .put = snd_ac97_ad1980_spdif_source_put,
+};
+
+static int patch_ad1980_post_spdif(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, &snd_ac97_ad1980_spdif_source, 1);
+}
+
+static struct snd_ac97_build_ops patch_ad1980_build_ops = {
+ .build_post_spdif = &patch_ad1980_post_spdif
+};
+
int patch_ad1980(ac97_t * ac97)
{
unsigned short misc;
patch_ad1881(ac97);
+ ac97->build_ops = &patch_ad1980_build_ops;
/* Switch FRONT/SURROUND LINE-OUT/HP-OUT default connection */
/* it seems that most vendors connect line-out connector to headphone out of AC'97 */
misc = snd_ac97_read(ac97, AC97_AD_MISC);
@@ -365,6 +759,92 @@
return 0;
}
+static const snd_kcontrol_new_t snd_ac97_controls_alc650[] = {
+ AC97_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0),
+ AC97_SINGLE("Surround Down Mix", AC97_ALC650_MULTICH, 1, 1, 0),
+ AC97_SINGLE("Center/LFE Down Mix", AC97_ALC650_MULTICH, 2, 1, 0),
+ AC97_SINGLE("Exchange Center/LFE", AC97_ALC650_MULTICH, 3, 1, 0),
+ /* 4: Analog Input To Surround */
+ /* 5: Analog Input To Center/LFE */
+ /* 6: Independent Master Volume Right */
+ /* 7: Independent Master Volume Left */
+ /* 8: reserved */
+ AC97_SINGLE("Line-In As Surround", AC97_ALC650_MULTICH, 9, 1, 0),
+ AC97_SINGLE("Swap Surround Slot", AC97_ALC650_MULTICH, 14, 1, 0),
+#if 0 /* always set in patch_alc650 */
+ AC97_SINGLE("IEC958 Input Clock Enable", AC97_ALC650_CLOCK, 0, 1, 0),
+ AC97_SINGLE("IEC958 Input Pin Enable", AC97_ALC650_CLOCK, 1, 1, 0),
+ AC97_SINGLE("Surround DAC Switch", AC97_ALC650_SURR_DAC_VOL, 15, 1, 1),
+ AC97_DOUBLE("Surround DAC Volume", AC97_ALC650_SURR_DAC_VOL, 8, 0, 31, 1),
+ AC97_SINGLE("Center/LFE DAC Switch", AC97_ALC650_LFE_DAC_VOL, 15, 1, 1),
+ AC97_DOUBLE("Center/LFE DAC Volume", AC97_ALC650_LFE_DAC_VOL, 8, 0, 31, 1),
+#endif
+};
+
+static const snd_kcontrol_new_t snd_ac97_control_alc650_mic =
+AC97_SINGLE("Mic As Center/LFE", AC97_ALC650_MULTICH, 10, 1, 0);
+
+static int snd_ac97_alc650_mic_gpio_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ ucontrol->value.integer.value[0] = (ac97->regs[AC97_ALC650_MULTICH] >> 10) & 1;
+ return 0;
+}
+
+static int snd_ac97_alc650_mic_gpio_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int change;
+ change = snd_ac97_update_bits(ac97, AC97_ALC650_MULTICH, 1 << 10,
+ ucontrol->value.integer.value[0] ? (1 << 10) : 0);
+ if (change) {
+ /* GPIO0 write for mic */
+ snd_ac97_update_bits(ac97, 0x76, 0x01,
+ ucontrol->value.integer.value[0] ? 0 : 0x01);
+ /* GPIO0 high for mic */
+ snd_ac97_update_bits(ac97, 0x78, 0x100,
+ ucontrol->value.integer.value[0] ? 0 : 0x100);
+ }
+ return change;
+}
+
+static const snd_kcontrol_new_t snd_ac97_control_alc650_mic_gpio = {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Mic As Center/LFE",
+ .info = snd_ac97_info_single,
+ .get = snd_ac97_alc650_mic_gpio_get,
+ .put = snd_ac97_alc650_mic_gpio_put,
+ .private_value = (1 << 16), /* for info */
+};
+
+static const snd_kcontrol_new_t snd_ac97_spdif_controls_alc650[] = {
+ AC97_SINGLE("IEC958 Capture Switch", AC97_ALC650_MULTICH, 11, 1, 0),
+ AC97_SINGLE("Analog to IEC958 Output", AC97_ALC650_MULTICH, 12, 1, 0),
+ AC97_SINGLE("IEC958 Input Monitor", AC97_ALC650_MULTICH, 13, 1, 0),
+};
+
+static int patch_alc650_specific(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_alc650, ARRAY_SIZE(snd_ac97_controls_alc650))) < 0)
+ return err;
+ if ((err = patch_build_controls(ac97,
+ ac97->spec.dev_flags ?
+ &snd_ac97_control_alc650_mic :
+ &snd_ac97_control_alc650_mic_gpio, 1)) < 0)
+ return err;
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc650, ARRAY_SIZE(snd_ac97_spdif_controls_alc650))) < 0)
+ return err;
+ }
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_alc650_ops = {
+ .build_specific = patch_alc650_specific
+};
+
int patch_alc650(ac97_t * ac97)
{
unsigned short val;
@@ -374,6 +854,7 @@
* this is used for switching mic and center/lfe, which needs
* resetting GPIO0 level on the older revision.
*/
+ ac97->build_ops = &patch_alc650_ops;
ac97->spec.dev_flags = 0;
/* check spdif (should be only on rev.E) */
@@ -417,10 +898,101 @@
return 0;
}
+static const snd_kcontrol_new_t snd_ac97_cm9738_controls[] = {
+ AC97_SINGLE("Line-In As Surround", AC97_CM9738_VENDOR_CTRL, 10, 1, 0),
+ AC97_SINGLE("Duplicate Front", AC97_CM9738_VENDOR_CTRL, 13, 1, 0),
+};
+
+static int patch_cm9738_specific(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9738_controls, ARRAY_SIZE(snd_ac97_cm9738_controls));
+}
+
+static struct snd_ac97_build_ops patch_cm9738_ops = {
+ .build_specific = patch_cm9738_specific
+};
+
+int patch_cm9738(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_cm9738_ops;
+ return 0;
+}
+
+static int snd_ac97_cmedia_spdif_playback_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[] = { "Analog", "Digital" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 2;
+ if (uinfo->value.enumerated.item > 1)
+ uinfo->value.enumerated.item = 1;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_cmedia_spdif_playback_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_CM9739_SPDIF_CTRL];
+ ucontrol->value.enumerated.item[0] = (val >> 1) & 0x01;
+ return 0;
+}
+
+static int snd_ac97_cmedia_spdif_playback_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ return snd_ac97_update_bits(ac97, AC97_CM9739_SPDIF_CTRL,
+ 0x01 << 1,
+ (ucontrol->value.enumerated.item[0] & 0x01) << 1);
+}
+
+static const snd_kcontrol_new_t snd_ac97_cm9739_controls_spdif[] = {
+ /* BIT 0: SPDI_EN - always true */
+ { /* BIT 1: SPDIFS */
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
+ .info = snd_ac97_cmedia_spdif_playback_source_info,
+ .get = snd_ac97_cmedia_spdif_playback_source_get,
+ .put = snd_ac97_cmedia_spdif_playback_source_put,
+ },
+ /* BIT 2: IG_SPIV */
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Valid Switch", AC97_CM9739_SPDIF_CTRL, 2, 1, 0),
+ /* BIT 3: SPI2F */
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Monitor", AC97_CM9739_SPDIF_CTRL, 3, 1, 0),
+ /* BIT 4: SPI2SDI */
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_CM9739_SPDIF_CTRL, 4, 1, 0),
+ /* BIT 8: SPD32 - 32bit SPDIF - not supported yet */
+};
+
+static const snd_kcontrol_new_t snd_ac97_cm9739_controls[] = {
+ AC97_SINGLE("Line-In As Surround", AC97_CM9739_MULTI_CHAN, 10, 1, 0),
+};
+
+static int patch_cm9739_specific(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9739_controls, ARRAY_SIZE(snd_ac97_cm9739_controls));
+}
+
+static int patch_cm9739_post_spdif(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9739_controls_spdif, ARRAY_SIZE(snd_ac97_cm9739_controls_spdif));
+}
+
+static struct snd_ac97_build_ops patch_cm9739_ops = {
+ .build_specific = patch_cm9739_specific,
+ .build_post_spdif = patch_cm9739_post_spdif
+};
+
int patch_cm9739(ac97_t * ac97)
{
unsigned short val;
+ ac97->build_ops = &patch_cm9739_ops;
+
/* check spdif */
val = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
if (val & AC97_EA_SPCV) {
@@ -444,3 +1016,31 @@
return 0;
}
+static const snd_kcontrol_new_t snd_ac97_controls_vt1616[] = {
+AC97_SINGLE("DC Offset removal", 0x5a, 10, 1, 0),
+AC97_SINGLE("Alternate Level to Surround Out", 0x5a, 15, 1, 0),
+AC97_SINGLE("Downmix LFE and Center to Front", 0x5a, 12, 1, 0),
+AC97_SINGLE("Downmix Surround to Front", 0x5a, 11, 1, 0),
+};
+
+static int patch_vt1616_specific(ac97_t * ac97)
+{
+ int err;
+
+ if (snd_ac97_try_bit(ac97, 0x5a, 9))
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_vt1616[0], 1)) < 0)
+ return err;
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_vt1616[1], ARRAY_SIZE(snd_ac97_controls_vt1616) - 1)) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_vt1616_ops = {
+ .build_specific = patch_vt1616_specific
+};
+
+int patch_vt1616(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_vt1616_ops;
+ return 0;
+}
diff -Nru a/sound/pci/ac97/ac97_patch.h b/sound/pci/ac97/ac97_patch.h
--- a/sound/pci/ac97/ac97_patch.h Sun Aug 3 13:14:44 2003
+++ b/sound/pci/ac97/ac97_patch.h Sun Aug 3 13:14:44 2003
@@ -29,6 +29,7 @@
int patch_wolfson05(ac97_t * ac97);
int patch_wolfson11(ac97_t * ac97);
int patch_tritech_tr28028(ac97_t * ac97);
+int patch_sigmatel_stac9700(ac97_t * ac97);
int patch_sigmatel_stac9708(ac97_t * ac97);
int patch_sigmatel_stac9721(ac97_t * ac97);
int patch_sigmatel_stac9744(ac97_t * ac97);
@@ -42,4 +43,6 @@
int patch_ad1886(ac97_t * ac97);
int patch_ad1980(ac97_t * ac97);
int patch_alc650(ac97_t * ac97);
+int patch_cm9738(ac97_t * ac97);
int patch_cm9739(ac97_t * ac97);
+int patch_vt1616(ac97_t * ac97);
diff -Nru a/sound/pci/ac97/ac97_proc.c b/sound/pci/ac97/ac97_proc.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/sound/pci/ac97/ac97_proc.c Sun Aug 3 13:14:53 2003
@@ -0,0 +1,295 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/ac97_codec.h>
+#include <sound/asoundef.h>
+#include "ac97_local.h"
+#include "ac97_id.h"
+
+/*
+ * proc interface
+ */
+
+static void snd_ac97_proc_read_main(ac97_t *ac97, snd_info_buffer_t * buffer, int subidx)
+{
+ char name[64];
+ unsigned int id;
+ unsigned short val, tmp, ext, mext;
+ static const char *spdif_slots[4] = { " SPDIF=3/4", " SPDIF=7/8", " SPDIF=6/9", " SPDIF=res" };
+ static const char *spdif_rates[4] = { " Rate=44.1kHz", " Rate=res", " Rate=48kHz", " Rate=32kHz" };
+ static const char *spdif_rates_cs4205[4] = { " Rate=48kHz", " Rate=44.1kHz", " Rate=res", " Rate=res" };
+
+ id = snd_ac97_read(ac97, AC97_VENDOR_ID1) << 16;
+ id |= snd_ac97_read(ac97, AC97_VENDOR_ID2);
+ snd_ac97_get_name(NULL, id, name, 0);
+ snd_iprintf(buffer, "%d-%d/%d: %s\n\n", ac97->addr, ac97->num, subidx, name);
+ if ((ac97->scaps & AC97_SCAP_AUDIO) == 0)
+ goto __modem;
+
+ // val = snd_ac97_read(ac97, AC97_RESET);
+ val = ac97->caps;
+ snd_iprintf(buffer, "Capabilities :%s%s%s%s%s%s\n",
+ val & AC97_BC_DEDICATED_MIC ? " -dedicated MIC PCM IN channel-" : "",
+ val & AC97_BC_RESERVED1 ? " -reserved1-" : "",
+ val & AC97_BC_BASS_TREBLE ? " -bass & treble-" : "",
+ val & AC97_BC_SIM_STEREO ? " -simulated stereo-" : "",
+ val & AC97_BC_HEADPHONE ? " -headphone out-" : "",
+ val & AC97_BC_LOUDNESS ? " -loudness-" : "");
+ tmp = ac97->caps & AC97_BC_DAC_MASK;
+ snd_iprintf(buffer, "DAC resolution : %s%s%s%s\n",
+ tmp == AC97_BC_16BIT_DAC ? "16-bit" : "",
+ tmp == AC97_BC_18BIT_DAC ? "18-bit" : "",
+ tmp == AC97_BC_20BIT_DAC ? "20-bit" : "",
+ tmp == AC97_BC_DAC_MASK ? "???" : "");
+ tmp = ac97->caps & AC97_BC_ADC_MASK;
+ snd_iprintf(buffer, "ADC resolution : %s%s%s%s\n",
+ tmp == AC97_BC_16BIT_ADC ? "16-bit" : "",
+ tmp == AC97_BC_18BIT_ADC ? "18-bit" : "",
+ tmp == AC97_BC_20BIT_ADC ? "20-bit" : "",
+ tmp == AC97_BC_ADC_MASK ? "???" : "");
+ snd_iprintf(buffer, "3D enhancement : %s\n",
+ snd_ac97_stereo_enhancements[(val >> 10) & 0x1f]);
+ snd_iprintf(buffer, "\nCurrent setup\n");
+ val = snd_ac97_read(ac97, AC97_MIC);
+ snd_iprintf(buffer, "Mic gain : %s [%s]\n", val & 0x0040 ? "+20dB" : "+0dB", ac97->regs[AC97_MIC] & 0x0040 ? "+20dB" : "+0dB");
+ val = snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
+ snd_iprintf(buffer, "POP path : %s 3D\n"
+ "Sim. stereo : %s\n"
+ "3D enhancement : %s\n"
+ "Loudness : %s\n"
+ "Mono output : %s\n"
+ "Mic select : %s\n"
+ "ADC/DAC loopback : %s\n",
+ val & 0x8000 ? "post" : "pre",
+ val & 0x4000 ? "on" : "off",
+ val & 0x2000 ? "on" : "off",
+ val & 0x1000 ? "on" : "off",
+ val & 0x0200 ? "Mic" : "MIX",
+ val & 0x0100 ? "Mic2" : "Mic1",
+ val & 0x0080 ? "on" : "off");
+
+ ext = snd_ac97_read(ac97, AC97_EXTENDED_ID);
+ if (ext == 0)
+ goto __modem;
+
+ snd_iprintf(buffer, "Extended ID : codec=%i rev=%i%s%s%s%s DSA=%i%s%s%s%s\n",
+ (ext & AC97_EI_ADDR_MASK) >> AC97_EI_ADDR_SHIFT,
+ (ext & AC97_EI_REV_MASK) >> AC97_EI_REV_SHIFT,
+ ext & AC97_EI_AMAP ? " AMAP" : "",
+ ext & AC97_EI_LDAC ? " LDAC" : "",
+ ext & AC97_EI_SDAC ? " SDAC" : "",
+ ext & AC97_EI_CDAC ? " CDAC" : "",
+ (ext & AC97_EI_DACS_SLOT_MASK) >> AC97_EI_DACS_SLOT_SHIFT,
+ ext & AC97_EI_VRM ? " VRM" : "",
+ ext & AC97_EI_SPDIF ? " SPDIF" : "",
+ ext & AC97_EI_DRA ? " DRA" : "",
+ ext & AC97_EI_VRA ? " VRA" : "");
+ val = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
+ snd_iprintf(buffer, "Extended status :%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+ val & AC97_EA_PRL ? " PRL" : "",
+ val & AC97_EA_PRK ? " PRK" : "",
+ val & AC97_EA_PRJ ? " PRJ" : "",
+ val & AC97_EA_PRI ? " PRI" : "",
+ val & AC97_EA_SPCV ? " SPCV" : "",
+ val & AC97_EA_MDAC ? " MADC" : "",
+ val & AC97_EA_LDAC ? " LDAC" : "",
+ val & AC97_EA_SDAC ? " SDAC" : "",
+ val & AC97_EA_CDAC ? " CDAC" : "",
+ ext & AC97_EI_SPDIF ? spdif_slots[(val & AC97_EA_SPSA_SLOT_MASK) >> AC97_EA_SPSA_SLOT_SHIFT] : "",
+ val & AC97_EA_VRM ? " VRM" : "",
+ val & AC97_EA_SPDIF ? " SPDIF" : "",
+ val & AC97_EA_DRA ? " DRA" : "",
+ val & AC97_EA_VRA ? " VRA" : "");
+ if (ext & AC97_EI_VRA) { /* VRA */
+ val = snd_ac97_read(ac97, AC97_PCM_FRONT_DAC_RATE);
+ snd_iprintf(buffer, "PCM front DAC : %iHz\n", val);
+ if (ext & AC97_EI_SDAC) {
+ val = snd_ac97_read(ac97, AC97_PCM_SURR_DAC_RATE);
+ snd_iprintf(buffer, "PCM Surr DAC : %iHz\n", val);
+ }
+ if (ext & AC97_EI_LDAC) {
+ val = snd_ac97_read(ac97, AC97_PCM_LFE_DAC_RATE);
+ snd_iprintf(buffer, "PCM LFE DAC : %iHz\n", val);
+ }
+ val = snd_ac97_read(ac97, AC97_PCM_LR_ADC_RATE);
+ snd_iprintf(buffer, "PCM ADC : %iHz\n", val);
+ }
+ if (ext & AC97_EI_VRM) {
+ val = snd_ac97_read(ac97, AC97_PCM_MIC_ADC_RATE);
+ snd_iprintf(buffer, "PCM MIC ADC : %iHz\n", val);
+ }
+ if ((ext & AC97_EI_SPDIF) || (ac97->flags & AC97_CS_SPDIF)) {
+ if (ac97->flags & AC97_CS_SPDIF)
+ val = snd_ac97_read(ac97, AC97_CSR_SPDIF);
+ else
+ val = snd_ac97_read(ac97, AC97_SPDIF);
+
+ snd_iprintf(buffer, "SPDIF Control :%s%s%s%s Category=0x%x Generation=%i%s%s%s\n",
+ val & AC97_SC_PRO ? " PRO" : " Consumer",
+ val & AC97_SC_NAUDIO ? " Non-audio" : " PCM",
+ val & AC97_SC_COPY ? " Copyright" : "",
+ val & AC97_SC_PRE ? " Preemph50/15" : "",
+ (val & AC97_SC_CC_MASK) >> AC97_SC_CC_SHIFT,
+ (val & AC97_SC_L) >> 11,
+ (ac97->flags & AC97_CS_SPDIF) ?
+ spdif_rates_cs4205[(val & AC97_SC_SPSR_MASK) >> AC97_SC_SPSR_SHIFT] :
+ spdif_rates[(val & AC97_SC_SPSR_MASK) >> AC97_SC_SPSR_SHIFT],
+ (ac97->flags & AC97_CS_SPDIF) ?
+ (val & AC97_SC_DRS ? " Validity" : "") :
+ (val & AC97_SC_DRS ? " DRS" : ""),
+ (ac97->flags & AC97_CS_SPDIF) ?
+ (val & AC97_SC_V ? " Enabled" : "") :
+ (val & AC97_SC_V ? " Validity" : ""));
+ }
+
+ __modem:
+ mext = snd_ac97_read(ac97, AC97_EXTENDED_MID);
+ if (mext == 0)
+ return;
+
+ snd_iprintf(buffer, "Extended modem ID: codec=%i%s%s%s%s%s\n",
+ (mext & AC97_MEI_ADDR_MASK) >> AC97_MEI_ADDR_SHIFT,
+ mext & AC97_MEI_CID2 ? " CID2" : "",
+ mext & AC97_MEI_CID1 ? " CID1" : "",
+ mext & AC97_MEI_HANDSET ? " HSET" : "",
+ mext & AC97_MEI_LINE2 ? " LIN2" : "",
+ mext & AC97_MEI_LINE1 ? " LIN1" : "");
+ val = snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS);
+ snd_iprintf(buffer, "Modem status :%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+ val & AC97_MEA_GPIO ? " GPIO" : "",
+ val & AC97_MEA_MREF ? " MREF" : "",
+ val & AC97_MEA_ADC1 ? " ADC1" : "",
+ val & AC97_MEA_DAC1 ? " DAC1" : "",
+ val & AC97_MEA_ADC2 ? " ADC2" : "",
+ val & AC97_MEA_DAC2 ? " DAC2" : "",
+ val & AC97_MEA_HADC ? " HADC" : "",
+ val & AC97_MEA_HDAC ? " HDAC" : "",
+ val & AC97_MEA_PRA ? " PRA(GPIO)" : "",
+ val & AC97_MEA_PRB ? " PRB(res)" : "",
+ val & AC97_MEA_PRC ? " PRC(ADC1)" : "",
+ val & AC97_MEA_PRD ? " PRD(DAC1)" : "",
+ val & AC97_MEA_PRE ? " PRE(ADC2)" : "",
+ val & AC97_MEA_PRF ? " PRF(DAC2)" : "",
+ val & AC97_MEA_PRG ? " PRG(HADC)" : "",
+ val & AC97_MEA_PRH ? " PRH(HDAC)" : "");
+ if (mext & AC97_MEI_LINE1) {
+ val = snd_ac97_read(ac97, AC97_LINE1_RATE);
+ snd_iprintf(buffer, "Line1 rate : %iHz\n", val);
+ }
+ if (mext & AC97_MEI_LINE2) {
+ val = snd_ac97_read(ac97, AC97_LINE2_RATE);
+ snd_iprintf(buffer, "Line2 rate : %iHz\n", val);
+ }
+ if (mext & AC97_MEI_HANDSET) {
+ val = snd_ac97_read(ac97, AC97_HANDSET_RATE);
+ snd_iprintf(buffer, "Headset rate : %iHz\n", val);
+ }
+}
+
+static void snd_ac97_proc_read(snd_info_entry_t *entry, snd_info_buffer_t * buffer)
+{
+ ac97_t *ac97 = snd_magic_cast(ac97_t, entry->private_data, return);
+
+ if ((ac97->id & 0xffffff40) == AC97_ID_AD1881) { // Analog Devices AD1881/85/86
+ int idx;
+ down(&ac97->spec.ad18xx.mutex);
+ for (idx = 0; idx < 3; idx++)
+ if (ac97->spec.ad18xx.id[idx]) {
+ /* select single codec */
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, ac97->spec.ad18xx.unchained[idx] | ac97->spec.ad18xx.chained[idx]);
+ snd_ac97_proc_read_main(ac97, buffer, idx);
+ snd_iprintf(buffer, "\n\n");
+ }
+ /* select all codecs */
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, 0x7000);
+ up(&ac97->spec.ad18xx.mutex);
+
+ snd_iprintf(buffer, "\nAD18XX configuration\n");
+ snd_iprintf(buffer, "Unchained : 0x%04x,0x%04x,0x%04x\n",
+ ac97->spec.ad18xx.unchained[0],
+ ac97->spec.ad18xx.unchained[1],
+ ac97->spec.ad18xx.unchained[2]);
+ snd_iprintf(buffer, "Chained : 0x%04x,0x%04x,0x%04x\n",
+ ac97->spec.ad18xx.chained[0],
+ ac97->spec.ad18xx.chained[1],
+ ac97->spec.ad18xx.chained[2]);
+ } else {
+ snd_ac97_proc_read_main(ac97, buffer, 0);
+ }
+}
+
+static void snd_ac97_proc_regs_read_main(ac97_t *ac97, snd_info_buffer_t * buffer, int subidx)
+{
+ int reg, val;
+
+ for (reg = 0; reg < 0x80; reg += 2) {
+ val = snd_ac97_read(ac97, reg);
+ snd_iprintf(buffer, "%i:%02x = %04x\n", subidx, reg, val);
+ }
+}
+
+static void snd_ac97_proc_regs_read(snd_info_entry_t *entry,
+ snd_info_buffer_t * buffer)
+{
+ ac97_t *ac97 = snd_magic_cast(ac97_t, entry->private_data, return);
+
+ if ((ac97->id & 0xffffff40) == AC97_ID_AD1881) { // Analog Devices AD1881/85/86
+
+ int idx;
+ down(&ac97->spec.ad18xx.mutex);
+ for (idx = 0; idx < 3; idx++)
+ if (ac97->spec.ad18xx.id[idx]) {
+ /* select single codec */
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, ac97->spec.ad18xx.unchained[idx] | ac97->spec.ad18xx.chained[idx]);
+ snd_ac97_proc_regs_read_main(ac97, buffer, idx);
+ }
+ /* select all codecs */
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, 0x7000);
+ up(&ac97->spec.ad18xx.mutex);
+ } else {
+ snd_ac97_proc_regs_read_main(ac97, buffer, 0);
+ }
+}
+
+void snd_ac97_proc_init(snd_card_t * card, ac97_t * ac97, const char *prefix)
+{
+ snd_info_entry_t *entry;
+ char name[32];
+
+ if (ac97->num)
+ sprintf(name, "%s#%d-%d", prefix, ac97->addr, ac97->num);
+ else
+ sprintf(name, "%s#%d", prefix, ac97->addr);
+ if (! snd_card_proc_new(card, name, &entry))
+ snd_info_set_text_ops(entry, ac97, snd_ac97_proc_read);
+ if (ac97->num)
+ sprintf(name, "%s#%d-%dregs", prefix, ac97->addr, ac97->num);
+ else
+ sprintf(name, "%s#%dregs", prefix, ac97->addr);
+ if (! snd_card_proc_new(card, name, &entry))
+ snd_info_set_text_ops(entry, ac97, snd_ac97_proc_regs_read);
+}
diff -Nru a/sound/pci/ali5451/ali5451.c b/sound/pci/ali5451/ali5451.c
--- a/sound/pci/ali5451/ali5451.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/ali5451/ali5451.c Sun Aug 3 13:14:52 2003
@@ -277,7 +277,7 @@
#endif
};
-static struct pci_device_id snd_ali_ids[] __devinitdata = {
+static struct pci_device_id snd_ali_ids[] = {
{0x10b9, 0x5451, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
{0, }
};
@@ -1891,27 +1891,14 @@
}
#ifdef CONFIG_PM
-#ifndef PCI_OLD_SUSPEND
-static int snd_ali_suspend(struct pci_dev *dev, u32 state)
-#else
-static void snd_ali_suspend(struct pci_dev *dev)
-#endif
+static void ali_suspend(ali_t *chip)
{
-#ifndef PCI_OLD_SUSPEND
- ali_t *chip = snd_magic_cast(ali_t, pci_get_drvdata(dev), return -ENXIO);
-#else
- ali_t *chip = snd_magic_cast(ali_t, pci_get_drvdata(dev), return);
-#endif
ali_image_t *im;
int i, j;
im = chip->image;
if (! im)
-#ifndef PCI_OLD_SUSPEND
- return -ENXIO;
-#else
return;
-#endif
spin_lock_irq(&chip->reg_lock);
@@ -1938,32 +1925,16 @@
outl(0xffffffff, ALI_REG(chip, ALI_STOP));
spin_unlock_irq(&chip->reg_lock);
-#ifndef PCI_OLD_SUSPEND
- return 0;
-#endif
}
-#ifndef PCI_OLD_SUSPEND
-static int snd_ali_resume(struct pci_dev *dev)
-#else
-static void snd_ali_resume(struct pci_dev *dev)
-#endif
+static void ali_resume(ali_t *chip)
{
-#ifndef PCI_OLD_SUSPEND
- ali_t *chip = snd_magic_cast(ali_t, pci_get_drvdata(dev), return -ENXIO);
-#else
- ali_t *chip = snd_magic_cast(ali_t, pci_get_drvdata(dev), return);
-#endif
ali_image_t *im;
int i, j;
im = chip->image;
if (! im)
-#ifndef PCI_OLD_SUSPEND
- return -ENXIO;
-#else
return;
-#endif
pci_enable_device(chip->pci);
@@ -1989,11 +1960,22 @@
outl(im->regs[ALI_MISCINT >> 2], ALI_REG(chip, ALI_MISCINT));
spin_unlock_irq(&chip->reg_lock);
-#ifndef PCI_OLD_SUSPEND
+ return;
+}
+
+static int snd_ali_suspend(struct pci_dev *dev, u32 state)
+{
+ ali_t *chip = snd_magic_cast(ali_t, pci_get_drvdata(dev), return -ENXIO);
+ ali_suspend(chip);
return 0;
-#endif
}
-#endif
+static int snd_ali_resume(struct pci_dev *dev)
+{
+ ali_t *chip = snd_magic_cast(ali_t, pci_get_drvdata(dev), return -ENXIO);
+ ali_resume(chip);
+ return 0;
+}
+#endif /* CONFIG_PM */
static int snd_ali_free(ali_t * codec)
{
@@ -2181,7 +2163,7 @@
/* M7101: power management */
pci_dev = pci_find_device(0x10b9, 0x7101, NULL);
codec->pci_m7101 = pci_dev;
- if (! codec->pci_m7101) {
+ if (! codec->pci_m7101 && codec->revision == ALI_5451_V02) {
snd_printk(KERN_ERR "ali5451: cannot find ALi 7101 chip.\n");
snd_ali_free(codec);
return -ENODEV;
diff -Nru a/sound/pci/als4000.c b/sound/pci/als4000.c
--- a/sound/pci/als4000.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/als4000.c Sun Aug 3 13:14:52 2003
@@ -107,7 +107,7 @@
unsigned long gcr;
} snd_card_als4000_t;
-static struct pci_device_id snd_als4000_ids[] __devinitdata = {
+static struct pci_device_id snd_als4000_ids[] = {
{ 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */
{ 0, }
};
diff -Nru a/sound/pci/azt3328.c b/sound/pci/azt3328.c
--- a/sound/pci/azt3328.c Sun Aug 3 13:14:49 2003
+++ b/sound/pci/azt3328.c Sun Aug 3 13:14:49 2003
@@ -205,7 +205,7 @@
spinlock_t reg_lock;
};
-static struct pci_device_id snd_azf3328_ids[] __devinitdata = {
+static struct pci_device_id snd_azf3328_ids[] = {
{ 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */
{ 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */
{ 0, }
diff -Nru a/sound/pci/cmipci.c b/sound/pci/cmipci.c
--- a/sound/pci/cmipci.c Sun Aug 3 13:14:50 2003
+++ b/sound/pci/cmipci.c Sun Aug 3 13:14:50 2003
@@ -1186,7 +1186,7 @@
#ifndef USE_AES_IEC958
u16 *srcp = src, val;
#else
- char buf[1920]; /* bits can be divided by 20, 24, 16 */
+ char buf[480]; /* bits can be divided by 20, 24, 16 */
size_t bytes = frames_to_bytes(runtime, count);
#endif
@@ -1245,7 +1245,7 @@
snd_pcm_uframes_t offset;
snd_pcm_runtime_t *runtime = subs->runtime;
# ifdef USE_AES_IEC958
- char buf[1920]; /* bits can be divided by 20, 24, 16 */
+ char buf[480]; /* bits can be divided by 20, 24, 16 */
size_t bytes = frames_to_bytes(runtime, count);
# endif
if (! cm->channel[CM_CH_PLAY].ac3_shift)
@@ -2819,7 +2819,7 @@
}
-static struct pci_device_id snd_cmipci_ids[] __devinitdata = {
+static struct pci_device_id snd_cmipci_ids[] = {
{PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
diff -Nru a/sound/pci/cs4281.c b/sound/pci/cs4281.c
--- a/sound/pci/cs4281.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/cs4281.c Sun Aug 3 13:14:52 2003
@@ -513,7 +513,7 @@
static irqreturn_t snd_cs4281_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-static struct pci_device_id snd_cs4281_ids[] __devinitdata = {
+static struct pci_device_id snd_cs4281_ids[] = {
{ 0x1013, 0x6005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4281 */
{ 0, }
};
@@ -530,36 +530,27 @@
* common I/O routines
*/
-static void snd_cs4281_delay(unsigned int delay, int can_schedule)
+static void snd_cs4281_delay(unsigned int delay)
{
if (delay > 999) {
- if (can_schedule) {
- unsigned long end_time;
- delay = (delay * HZ) / 1000000;
- if (delay < 1)
- delay = 1;
- end_time = jiffies + delay;
- do {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- } while (time_after_eq(end_time, jiffies));
- } else {
- delay += 999;
- delay /= 1000;
- mdelay(delay > 0 ? delay : 1);
- }
+ unsigned long end_time;
+ delay = (delay * HZ) / 1000000;
+ if (delay < 1)
+ delay = 1;
+ end_time = jiffies + delay;
+ do {
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ } while (time_after_eq(end_time, jiffies));
} else {
udelay(delay);
}
}
-inline static void snd_cs4281_delay_long(int can_schedule)
+inline static void snd_cs4281_delay_long(void)
{
- if (can_schedule) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- } else
- mdelay(10);
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
}
static inline void snd_cs4281_pokeBA0(cs4281_t *chip, unsigned long offset, unsigned int val)
@@ -1267,7 +1258,7 @@
* joystick support
*/
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
typedef struct snd_cs4281_gameport {
struct gameport info;
@@ -1359,7 +1350,7 @@
#else
#define snd_cs4281_gameport(chip) /*NOP*/
-#endif /* CONFIG_GAMEPORT || CONFIG_GAMEPORT_MODULE */
+#endif /* CONFIG_GAMEPORT || (MODULE && CONFIG_GAMEPORT_MODULE) */
/*
@@ -1368,7 +1359,7 @@
static int snd_cs4281_free(cs4281_t *chip)
{
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if (chip->gameport) {
gameport_unregister_port(&chip->gameport->info);
kfree(chip->gameport);
@@ -1411,7 +1402,7 @@
return snd_cs4281_free(chip);
}
-static int snd_cs4281_chip_init(cs4281_t *chip, int can_schedule); /* defined below */
+static int snd_cs4281_chip_init(cs4281_t *chip); /* defined below */
#ifdef CONFIG_PM
static int snd_cs4281_set_power_state(snd_card_t *card, unsigned int power_state);
#endif
@@ -1471,7 +1462,7 @@
return -ENOMEM;
}
- tmp = snd_cs4281_chip_init(chip, 1);
+ tmp = snd_cs4281_chip_init(chip);
if (tmp) {
snd_cs4281_free(chip);
return tmp;
@@ -1493,7 +1484,7 @@
return 0;
}
-static int snd_cs4281_chip_init(cs4281_t *chip, int can_schedule)
+static int snd_cs4281_chip_init(cs4281_t *chip)
{
unsigned int tmp;
int timeout;
@@ -1547,7 +1538,7 @@
snd_cs4281_pokeBA0(chip, BA0_SPMC, 0);
udelay(50);
snd_cs4281_pokeBA0(chip, BA0_SPMC, BA0_SPMC_RSTN);
- snd_cs4281_delay(50000, can_schedule);
+ snd_cs4281_delay(50000);
if (chip->dual_codec)
snd_cs4281_pokeBA0(chip, BA0_SPMC, BA0_SPMC_RSTN | BA0_SPMC_ASDI2E);
@@ -1563,7 +1554,7 @@
* Start the DLL Clock logic.
*/
snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP);
- snd_cs4281_delay(50000, can_schedule);
+ snd_cs4281_delay(50000);
snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP);
/*
@@ -1577,7 +1568,7 @@
*/
if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY)
goto __ok0;
- snd_cs4281_delay_long(can_schedule);
+ snd_cs4281_delay_long();
} while (timeout-- > 0);
snd_printk(KERN_ERR "DLLRDY not seen\n");
@@ -1603,7 +1594,7 @@
*/
if (snd_cs4281_peekBA0(chip, BA0_ACSTS) & BA0_ACSTS_CRDY)
goto __ok1;
- snd_cs4281_delay_long(can_schedule);
+ snd_cs4281_delay_long();
} while (timeout-- > 0);
snd_printk(KERN_ERR "never read codec ready from AC'97 (0x%x)\n", snd_cs4281_peekBA0(chip, BA0_ACSTS));
@@ -1615,7 +1606,7 @@
do {
if (snd_cs4281_peekBA0(chip, BA0_ACSTS2) & BA0_ACSTS_CRDY)
goto __codec2_ok;
- snd_cs4281_delay_long(can_schedule);
+ snd_cs4281_delay_long();
} while (timeout-- > 0);
snd_printk(KERN_INFO "secondary codec doesn't respond. disable it...\n");
chip->dual_codec = 0;
@@ -1642,7 +1633,7 @@
*/
if ((snd_cs4281_peekBA0(chip, BA0_ACISV) & (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4))) == (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4)))
goto __ok2;
- snd_cs4281_delay_long(can_schedule);
+ snd_cs4281_delay_long();
} while (timeout-- > 0);
snd_printk(KERN_ERR "never read ISV3 and ISV4 from AC'97\n");
@@ -2109,7 +2100,7 @@
ulCLK |= CLKCR1_CKRA;
snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK);
- snd_cs4281_chip_init(chip, 0);
+ snd_cs4281_chip_init(chip);
/* restore the status registers */
for (i = 0; i < number_of(saved_regs); i++)
@@ -2128,7 +2119,6 @@
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
-#ifndef PCI_OLD_SUSPEND
static int snd_cs4281_suspend(struct pci_dev *dev, u32 state)
{
cs4281_t *chip = snd_magic_cast(cs4281_t, pci_get_drvdata(dev), return -ENXIO);
@@ -2141,18 +2131,6 @@
cs4281_resume(chip);
return 0;
}
-#else
-static void snd_cs4281_suspend(struct pci_dev *dev)
-{
- cs4281_t *chip = snd_magic_cast(cs4281_t, pci_get_drvdata(dev), return);
- cs4281_suspend(chip);
-}
-static void snd_cs4281_resume(struct pci_dev *dev)
-{
- cs4281_t *chip = snd_magic_cast(cs4281_t, pci_get_drvdata(dev), return);
- cs4281_resume(chip);
-}
-#endif
/* callback */
static int snd_cs4281_set_power_state(snd_card_t *card, unsigned int power_state)
diff -Nru a/sound/pci/cs46xx/cs46xx.c b/sound/pci/cs46xx/cs46xx.c
--- a/sound/pci/cs46xx/cs46xx.c Sun Aug 3 13:14:53 2003
+++ b/sound/pci/cs46xx/cs46xx.c Sun Aug 3 13:14:53 2003
@@ -72,7 +72,7 @@
MODULE_PARM_DESC(mmap_valid, "Support OSS mmap.");
MODULE_PARM_SYNTAX(mmap_valid, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
-static struct pci_device_id snd_cs46xx_ids[] __devinitdata = {
+static struct pci_device_id snd_cs46xx_ids[] = {
{ 0x1013, 0x6001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4280 */
{ 0x1013, 0x6003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4612 */
{ 0x1013, 0x6004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4615 */
@@ -163,7 +163,6 @@
}
#ifdef CONFIG_PM
-#ifndef PCI_OLD_SUSPEND
static int snd_card_cs46xx_suspend(struct pci_dev *pci, u32 state)
{
cs46xx_t *chip = snd_magic_cast(cs46xx_t, pci_get_drvdata(pci), return -ENXIO);
@@ -176,18 +175,6 @@
snd_cs46xx_resume(chip);
return 0;
}
-#else
-static void snd_card_cs46xx_suspend(struct pci_dev *pci)
-{
- cs46xx_t *chip = snd_magic_cast(cs46xx_t, pci_get_drvdata(pci), return);
- snd_cs46xx_suspend(chip);
-}
-static void snd_card_cs46xx_resume(struct pci_dev *pci)
-{
- cs46xx_t *chip = snd_magic_cast(cs46xx_t, pci_get_drvdata(pci), return);
- snd_cs46xx_resume(chip);
-}
-#endif
#endif
static void __devexit snd_card_cs46xx_remove(struct pci_dev *pci)
diff -Nru a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c
--- a/sound/pci/cs46xx/cs46xx_lib.c Sun Aug 3 13:14:45 2003
+++ b/sound/pci/cs46xx/cs46xx_lib.c Sun Aug 3 13:14:45 2003
@@ -2743,7 +2743,7 @@
* gameport interface
*/
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
typedef struct snd_cs46xx_gameport {
struct gameport info;
@@ -2960,7 +2960,7 @@
if (chip->active_ctrl)
chip->active_ctrl(chip, 1);
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if (chip->gameport) {
gameport_unregister_port(&chip->gameport->info);
kfree(chip->gameport);
@@ -3010,7 +3010,7 @@
/*
* initialize chip
*/
-static int snd_cs46xx_chip_init(cs46xx_t *chip, int busywait)
+static int snd_cs46xx_chip_init(cs46xx_t *chip)
{
int timeout;
@@ -3090,7 +3090,8 @@
/*
* Wait until the PLL has stabilized.
*/
- mdelay(100); /* FIXME: schedule? */
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(HZ/10); /* 100ms */
/*
* Turn on clocking of the core so that we can setup the serial ports.
@@ -3143,12 +3144,8 @@
*/
if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY)
goto ok1;
- if (busywait)
- mdelay(10);
- else {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((HZ+99)/100);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((HZ+99)/100);
}
@@ -3197,12 +3194,8 @@
*/
if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4))
goto ok2;
- if (busywait)
- mdelay(10);
- else {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((HZ+99)/100);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((HZ+99)/100);
}
#ifndef CONFIG_SND_CS46XX_NEW_DSP
@@ -3811,7 +3804,7 @@
chip->amplifier = 0;
chip->active_ctrl(chip, 1); /* force to on */
- snd_cs46xx_chip_init(chip, 1);
+ snd_cs46xx_chip_init(chip);
#if 0
snd_cs46xx_codec_write(chip, BA0_AC97_GENERAL_PURPOSE,
@@ -3992,7 +3985,7 @@
}
#endif
- err = snd_cs46xx_chip_init(chip, 0);
+ err = snd_cs46xx_chip_init(chip);
if (err < 0) {
snd_cs46xx_free(chip);
return err;
diff -Nru a/sound/pci/emu10k1/emu10k1.c b/sound/pci/emu10k1/emu10k1.c
--- a/sound/pci/emu10k1/emu10k1.c Sun Aug 3 13:14:44 2003
+++ b/sound/pci/emu10k1/emu10k1.c Sun Aug 3 13:14:44 2003
@@ -35,7 +35,7 @@
MODULE_DEVICES("{{Creative Labs,SB Live!/PCI512/E-mu APS},"
"{Creative Labs,SB Audigy}}");
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
#define ENABLE_SYNTH
#include <sound/emu10k1_synth.h>
#endif
@@ -78,7 +78,7 @@
MODULE_PARM_DESC(enable_ir, "Enable IR.");
MODULE_PARM_SYNTAX(enable_ir, SNDRV_ENABLE_DESC);
-static struct pci_device_id snd_emu10k1_ids[] __devinitdata = {
+static struct pci_device_id snd_emu10k1_ids[] = {
{ 0x1102, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* EMU10K1 */
{ 0x1102, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Dell OEM version (EMU10K1) */
{ 0x1102, 0x0004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, /* Audigy */
@@ -135,11 +135,9 @@
snd_card_free(card);
return err;
}
- if (!emu->APS) { /* APS board has not an AC97 mixer */
- if ((err = snd_emu10k1_mixer(emu)) < 0) {
- snd_card_free(card);
- return err;
- }
+ if ((err = snd_emu10k1_mixer(emu)) < 0) {
+ snd_card_free(card);
+ return err;
}
if (emu->audigy) {
if ((err = snd_emu10k1_audigy_midi(emu)) < 0) {
diff -Nru a/sound/pci/emu10k1/emu10k1_main.c b/sound/pci/emu10k1/emu10k1_main.c
--- a/sound/pci/emu10k1/emu10k1_main.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/emu10k1/emu10k1_main.c Sun Aug 3 13:14:52 2003
@@ -674,6 +674,14 @@
if (emu->serial == 0x40011102) {
emu->card_type = EMU10K1_CARD_EMUAPS;
emu->APS = 1;
+ emu->no_ac97 = 1; /* APS has no AC97 chip */
+ }
+ else if (emu->revision == 4 && emu->serial == 0x10051102) {
+ /* Audigy 2 EX has apparently no effective AC97 controls
+ * (for both input and output), so we skip the AC97 detections
+ */
+ snd_printdd(KERN_INFO "Audigy2 EX is detected. skpping ac97.\n");
+ emu->no_ac97 = 1;
}
emu->fx8010.fxbus_mask = 0x303f;
diff -Nru a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c
--- a/sound/pci/emu10k1/emufx.c Sun Aug 3 13:14:48 2003
+++ b/sound/pci/emu10k1/emufx.c Sun Aug 3 13:14:48 2003
@@ -945,12 +945,15 @@
snd_emu10k1_fx8010_ctl_t *ctl, nctl;
snd_kcontrol_new_t knew;
snd_kcontrol_t *kctl;
- snd_ctl_elem_value_t val;
+ snd_ctl_elem_value_t *val;
+ val = (snd_ctl_elem_value_t *)kmalloc(sizeof(*val), GFP_KERNEL);
+ if (!val)
+ return;
for (i = 0, _gctl = icode->gpr_add_controls;
i < icode->gpr_add_control_count; i++, _gctl++) {
if (copy_from_user(&gctl, _gctl, sizeof(gctl)))
- return;
+ break;
snd_runtime_check(gctl.id.iface == SNDRV_CTL_ELEM_IFACE_MIXER ||
gctl.id.iface == SNDRV_CTL_ELEM_IFACE_PCM, continue);
snd_runtime_check(gctl.id.name[0] != '\0', continue);
@@ -970,7 +973,7 @@
for (j = 0; j < 32; j++) {
nctl.gpr[j] = gctl.gpr[j];
nctl.value[j] = ~gctl.value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
- val.value.integer.value[j] = gctl.value[j];
+ val->value.integer.value[j] = gctl.value[j];
}
nctl.min = gctl.min;
nctl.max = gctl.max;
@@ -996,8 +999,9 @@
snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
}
- snd_emu10k1_gpr_ctl_put(ctl->kcontrol, &val);
+ snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
}
+ kfree(val);
}
static void snd_emu10k1_del_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icode)
@@ -1234,7 +1238,10 @@
static int __devinit _snd_emu10k1_audigy_init_efx(emu10k1_t *emu)
{
- int err, i, z, gpr, tmp, playback, capture, nctl;
+ int err, i, z, gpr, nctl;
+ const int playback = 10;
+ const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
+ const int tmp = 0x88;
u32 ptr;
emu10k1_fx8010_code_t *icode;
emu10k1_fx8010_control_gpr_t *controls, *ctl;
@@ -1257,19 +1264,15 @@
strcpy(icode->name, "Audigy DSP code for ALSA");
ptr = 0;
nctl = 0;
- playback = 10;
- capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
gpr = capture + 10;
- tmp = 0x88;
/* stop FX processor */
snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
- /* Wave Playback */
+ /* Wave Playback Volume */
A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
- snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr,
- emu->revision == 4 ? 50 : 100);
+ snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
gpr += 2;
/* Wave Surround Playback */
@@ -1493,6 +1496,14 @@
snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
gpr += 2;
+ /* Master volume for audigy2 */
+ if (emu->revision == 4) {
+ A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
+ A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr+1), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
+ snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
+ gpr += 2;
+ }
+
/* digital outputs */
A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
@@ -1500,7 +1511,7 @@
A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
/* analog speakers */
- if (emu->audigy && emu->revision == 4) { /* audigy2 */
+ if (emu->revision == 4) { /* audigy2 */
A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
} else {
A_PUT_STEREO_OUTPUT(A_EXTOUT_AC97_L, A_EXTOUT_AC97_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
@@ -2227,7 +2238,7 @@
static int snd_emu10k1_fx8010_ioctl(snd_hwdep_t * hw, struct file *file, unsigned int cmd, unsigned long arg)
{
emu10k1_t *emu = snd_magic_cast(emu10k1_t, hw->private_data, return -ENXIO);
- emu10k1_fx8010_info_t info;
+ emu10k1_fx8010_info_t *info;
emu10k1_fx8010_code_t *icode;
emu10k1_fx8010_pcm_t *ipcm;
unsigned int addr;
@@ -2235,10 +2246,18 @@
switch (cmd) {
case SNDRV_EMU10K1_IOCTL_INFO:
- if ((res = snd_emu10k1_fx8010_info(emu, &info)) < 0)
+ info = (emu10k1_fx8010_info_t *)kmalloc(sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+ if ((res = snd_emu10k1_fx8010_info(emu, info)) < 0) {
+ kfree(info);
return res;
- if (copy_to_user((void *)arg, &info, sizeof(info)))
+ }
+ if (copy_to_user((void *)arg, info, sizeof(*info))) {
+ kfree(info);
return -EFAULT;
+ }
+ kfree(info);
return 0;
case SNDRV_EMU10K1_IOCTL_CODE_POKE:
if (!capable(CAP_SYS_ADMIN))
@@ -2271,9 +2290,13 @@
case SNDRV_EMU10K1_IOCTL_PCM_POKE:
if (emu->audigy)
return -EINVAL;
- ipcm = (emu10k1_fx8010_pcm_t *)snd_kcalloc(sizeof(*ipcm), GFP_KERNEL);
+ ipcm = (emu10k1_fx8010_pcm_t *)kmalloc(sizeof(*ipcm), GFP_KERNEL);
if (ipcm == NULL)
return -ENOMEM;
+ if (copy_from_user(ipcm, (void *)arg, sizeof(*ipcm))) {
+ kfree(ipcm);
+ return -EFAULT;
+ }
res = snd_emu10k1_ipcm_poke(emu, ipcm);
kfree(ipcm);
return res;
@@ -2283,6 +2306,10 @@
ipcm = (emu10k1_fx8010_pcm_t *)snd_kcalloc(sizeof(*ipcm), GFP_KERNEL);
if (ipcm == NULL)
return -ENOMEM;
+ if (copy_from_user(ipcm, (void *)arg, sizeof(*ipcm))) {
+ kfree(ipcm);
+ return -EFAULT;
+ }
res = snd_emu10k1_ipcm_peek(emu, ipcm);
if (res == 0 && copy_to_user((void *)arg, ipcm, sizeof(*ipcm))) {
kfree(ipcm);
diff -Nru a/sound/pci/emu10k1/emumixer.c b/sound/pci/emu10k1/emumixer.c
--- a/sound/pci/emu10k1/emumixer.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/emu10k1/emumixer.c Sun Aug 3 13:14:52 2003
@@ -423,6 +423,36 @@
emu->ac97 = NULL;
}
+/*
+ */
+static int remove_ctl(snd_card_t *card, const char *name)
+{
+ snd_ctl_elem_id_t id;
+ memset(&id, 0, sizeof(id));
+ strcpy(id.name, name);
+ id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+ return snd_ctl_remove_id(card, &id);
+}
+
+static snd_kcontrol_t *ctl_find(snd_card_t *card, const char *name)
+{
+ snd_ctl_elem_id_t sid;
+ memset(&sid, 0, sizeof(sid));
+ strcpy(sid.name, name);
+ sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+ return snd_ctl_find_id(card, &sid);
+}
+
+static int rename_ctl(snd_card_t *card, const char *src, const char *dst)
+{
+ snd_kcontrol_t *kctl = ctl_find(card, src);
+ if (kctl) {
+ strcpy(kctl->id.name, dst);
+ return 0;
+ }
+ return -ENOENT;
+}
+
int __devinit snd_emu10k1_mixer(emu10k1_t *emu)
{
ac97_t ac97;
@@ -430,7 +460,7 @@
snd_kcontrol_t *kctl;
snd_card_t *card = emu->card;
- if (!emu->APS) {
+ if (!emu->no_ac97) {
memset(&ac97, 0, sizeof(ac97));
ac97.write = snd_emu10k1_ac97_write;
ac97.read = snd_emu10k1_ac97_read;
@@ -438,8 +468,33 @@
ac97.private_free = snd_emu10k1_mixer_free_ac97;
if ((err = snd_ac97_mixer(emu->card, &ac97, &emu->ac97)) < 0)
return err;
+ if (emu->audigy && emu->revision == 4) {
+ /* Master/PCM controls on ac97 of Audigy2 has no effect */
+ /* FIXME: keep master volume/switch to be sure.
+ * once after we check that they play really no roles,
+ * they shall be removed.
+ */
+ rename_ctl(card, "Master Playback Switch", "AC97 Master Playback Switch");
+ rename_ctl(card, "Master Playback Volume", "AC97 Master Playback Volume");
+ /* pcm controls are removed */
+ remove_ctl(card, "PCM Playback Switch");
+ remove_ctl(card, "PCM Playback Volume");
+ }
} else {
- strcpy(emu->card->mixername, "EMU APS");
+ if (emu->APS)
+ strcpy(emu->card->mixername, "EMU APS");
+ else if (emu->audigy)
+ strcpy(emu->card->mixername, "SB Audigy");
+ else
+ strcpy(emu->card->mixername, "Emu10k1");
+ }
+
+ if (emu->audigy && emu->revision == 4) {
+ /* Audigy2 and Audigy2 EX */
+ /* use the conventional names */
+ rename_ctl(card, "Wave Playback Volume", "PCM Playback Volume");
+ rename_ctl(card, "Wave Playback Volume", "PCM Capture Volume");
+ rename_ctl(card, "Wave Master Playback Volume", "Master Playback Volume");
}
if ((kctl = emu->ctl_send_routing = snd_ctl_new1(&snd_emu10k1_send_routing_control, emu)) == NULL)
@@ -455,6 +510,7 @@
if ((err = snd_ctl_add(card, kctl)))
return err;
+ /* intiailize the routing and volume table for each pcm playback stream */
for (pcm = 0; pcm < 32; pcm++) {
emu10k1_pcm_mixer_t *mix;
int v;
@@ -474,21 +530,25 @@
mix->attn[0] = mix->attn[1] = mix->attn[2] = 0xffff;
}
- if ((kctl = snd_ctl_new1(&snd_emu10k1_spdif_mask_control, emu)) == NULL)
- return -ENOMEM;
- if ((err = snd_ctl_add(card, kctl)))
- return err;
- if ((kctl = snd_ctl_new1(&snd_emu10k1_spdif_control, emu)) == NULL)
- return -ENOMEM;
- if ((err = snd_ctl_add(card, kctl)))
- return err;
+ if (! emu->APS) { /* FIXME: APS has these controls? */
+ /* sb live! and audigy */
+ if ((kctl = snd_ctl_new1(&snd_emu10k1_spdif_mask_control, emu)) == NULL)
+ return -ENOMEM;
+ if ((err = snd_ctl_add(card, kctl)))
+ return err;
+ if ((kctl = snd_ctl_new1(&snd_emu10k1_spdif_control, emu)) == NULL)
+ return -ENOMEM;
+ if ((err = snd_ctl_add(card, kctl)))
+ return err;
+ }
if (emu->audigy) {
if ((kctl = snd_ctl_new1(&snd_audigy_shared_spdif, emu)) == NULL)
return -ENOMEM;
if ((err = snd_ctl_add(card, kctl)))
return err;
- } else {
+ } else if (! emu->APS) {
+ /* sb live! */
if ((kctl = snd_ctl_new1(&snd_emu10k1_shared_spdif, emu)) == NULL)
return -ENOMEM;
if ((err = snd_ctl_add(card, kctl)))
diff -Nru a/sound/pci/emu10k1/irq.c b/sound/pci/emu10k1/irq.c
--- a/sound/pci/emu10k1/irq.c Sun Aug 3 13:14:50 2003
+++ b/sound/pci/emu10k1/irq.c Sun Aug 3 13:14:50 2003
@@ -55,15 +55,13 @@
if (status & IPR_CHANNELLOOP) {
int voice;
int voice_max = status & IPR_CHANNELNUMBERMASK;
- int voice_max_l;
u32 val;
emu10k1_voice_t *pvoice = emu->voices;
val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
- voice_max_l = voice_max;
- if (voice_max_l >= 0x20)
- voice_max_l = 0x1f;
- for (voice = 0; voice <= voice_max_l; voice++) {
+ for (voice = 0; voice <= voice_max; voice++) {
+ if (voice == 0x20)
+ val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
if (val & 1) {
if (pvoice->use && pvoice->interrupt != NULL) {
pvoice->interrupt(emu, pvoice);
@@ -75,21 +73,6 @@
val >>= 1;
pvoice++;
}
- if (voice_max > 0x1f) {
- val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
- for (; voice <= voice_max; voice++) {
- if(val & 1) {
- if (pvoice->use && pvoice->interrupt != NULL) {
- pvoice->interrupt(emu, pvoice);
- snd_emu10k1_voice_intr_ack(emu, voice);
- } else {
- snd_emu10k1_voice_intr_disable(emu, voice);
- }
- }
- val >>= 1;
- pvoice++;
- }
- }
status &= ~IPR_CHANNELLOOP;
}
status &= ~IPR_CHANNELNUMBERMASK;
@@ -150,9 +133,27 @@
status &= ~IPR_FXDSP;
}
if (status) {
- snd_printd(KERN_WARNING "emu10k1: unhandled interrupt: 0x%08x\n", status);
+ unsigned int bits;
+ snd_printk(KERN_ERR "emu10k1: unhandled interrupt: 0x%08x\n", status);
+ //make sure any interrupts we don't handle are disabled:
+ bits = INTE_FXDSPENABLE |
+ INTE_PCIERRORENABLE |
+ INTE_VOLINCRENABLE |
+ INTE_VOLDECRENABLE |
+ INTE_MUTEENABLE |
+ INTE_MICBUFENABLE |
+ INTE_ADCBUFENABLE |
+ INTE_EFXBUFENABLE |
+ INTE_GPSPDIFENABLE |
+ INTE_CDSPDIFENABLE |
+ INTE_INTERVALTIMERENB |
+ INTE_MIDITXENABLE |
+ INTE_MIDIRXENABLE;
+ if (emu->audigy)
+ bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
+ snd_emu10k1_intr_disable(emu, bits);
}
- outl(orig_status, emu->port + IPR); /* ack */
+ outl(orig_status, emu->port + IPR); /* ack all */
}
return IRQ_RETVAL(handled);
}
diff -Nru a/sound/pci/ens1370.c b/sound/pci/ens1370.c
--- a/sound/pci/ens1370.c Sun Aug 3 13:14:51 2003
+++ b/sound/pci/ens1370.c Sun Aug 3 13:14:51 2003
@@ -409,7 +409,7 @@
dma_addr_t bugbuf_addr;
#endif
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
struct gameport gameport;
struct semaphore joy_sem; // gameport configuration semaphore
#endif
@@ -417,7 +417,7 @@
static irqreturn_t snd_audiopci_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-static struct pci_device_id snd_audiopci_ids[] __devinitdata = {
+static struct pci_device_id snd_audiopci_ids[] = {
#ifdef CHIP1370
{ 0x1274, 0x5000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1370 */
#endif
@@ -1559,7 +1559,7 @@
#endif /* CHIP1371 */
/* generic control callbacks for ens1370 and for joystick */
-#if defined(CHIP1370) || defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CHIP1370) || defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
#define ENSONIQ_CONTROL(xname, mask) \
{ .iface = SNDRV_CTL_ELEM_IFACE_CARD, .name = xname, .info = snd_ensoniq_control_info, \
.get = snd_ensoniq_control_get, .put = snd_ensoniq_control_put, \
@@ -1657,7 +1657,7 @@
* General Switches...
*/
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
/* MQ: gameport driver connectivity */
#define ENSONIQ_JOY_CONTROL(xname, mask) \
{ .iface = SNDRV_CTL_ELEM_IFACE_CARD, .name = xname, .info = snd_ensoniq_control_info, \
@@ -1814,7 +1814,7 @@
static int snd_ensoniq_free(ensoniq_t *ensoniq)
{
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if (ensoniq->ctrl & ES_JYSTK_EN)
snd_ensoniq_joy_disable(ensoniq);
#endif
@@ -2012,7 +2012,7 @@
outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL));
outb(0x00, ES_REG(ensoniq, UART_RES));
outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
init_MUTEX(&ensoniq->joy_sem);
#ifdef CHIP1371
snd_ctl_add(card, snd_ctl_new1(&snd_es1371_joystick_addr, ensoniq));
diff -Nru a/sound/pci/es1938.c b/sound/pci/es1938.c
--- a/sound/pci/es1938.c Sun Aug 3 13:14:50 2003
+++ b/sound/pci/es1938.c Sun Aug 3 13:14:50 2003
@@ -244,14 +244,14 @@
spinlock_t mixer_lock;
snd_info_entry_t *proc_entry;
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
struct gameport gameport;
#endif
};
static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-static struct pci_device_id snd_es1938_ids[] __devinitdata = {
+static struct pci_device_id snd_es1938_ids[] = {
{ 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */
{ 0, }
};
@@ -1346,7 +1346,7 @@
{
/*if (chip->rmidi)
snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);*/
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if (chip->gameport.io)
gameport_unregister_port(&chip->gameport);
#endif
@@ -1663,7 +1663,7 @@
} /*else
snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);*/
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
chip->gameport.io = chip->game_port;
gameport_register_port(&chip->gameport);
#endif
diff -Nru a/sound/pci/es1968.c b/sound/pci/es1968.c
--- a/sound/pci/es1968.c Sun Aug 3 13:14:50 2003
+++ b/sound/pci/es1968.c Sun Aug 3 13:14:50 2003
@@ -602,7 +602,7 @@
static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-static struct pci_device_id snd_es1968_ids[] __devinitdata = {
+static struct pci_device_id snd_es1968_ids[] = {
/* Maestro 1 */
{ 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },
/* Maestro 2 */
@@ -654,6 +654,11 @@
return result;
}
+#define big_mdelay(msec) do {\
+ set_current_state(TASK_UNINTERRUPTIBLE);\
+ schedule_timeout(((msec) * HZ + 999) / 1000);\
+} while (0)
+
/* Wait for the codec bus to be free */
static int snd_es1968_ac97_wait(es1968_t *chip)
{
@@ -2109,7 +2114,7 @@
outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */
udelay(20);
outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */
- mdelay(20);
+ big_mdelay(20);
outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */
outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);
@@ -2125,7 +2130,7 @@
outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */
udelay(20);
outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */
- mdelay(500); /* .. ouch.. */
+ big_mdelay(500);
//outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
@@ -2151,7 +2156,7 @@
if (w > 10000) {
outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
- mdelay(500); /* oh my.. */
+ big_mdelay(500); /* oh my.. */
outb(inb(ioaddr + 0x37) & ~0x08,
ioaddr + 0x37);
udelay(1);
@@ -2340,11 +2345,6 @@
outb(3, iobase + ASSP_CONTROL_A); /* M: Reserved bits... */
outb(0, iobase + ASSP_CONTROL_C); /* M: Disable ASSP, ASSP IRQ's and FM Port */
- /* Enable IRQ's */
- w = ESM_HIRQ_DSIE | ESM_HIRQ_MPU401 | ESM_HIRQ_HW_VOLUME;
- outw(w, iobase + ESM_PORT_HOST_IRQ);
-
-
/*
* set up wavecache
*/
@@ -2414,6 +2414,14 @@
}
}
+/* Enable IRQ's */
+static void snd_es1968_start_irq(es1968_t *chip)
+{
+ unsigned short w;
+ w = ESM_HIRQ_DSIE | ESM_HIRQ_MPU401 | ESM_HIRQ_HW_VOLUME;
+ outw(w, chip->io_port + ESM_PORT_HOST_IRQ);
+}
+
#ifdef CONFIG_PM
/*
* PM support
@@ -2453,16 +2461,18 @@
wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
}
+ snd_es1968_start_irq(chip);
+
/* restore ac97 state */
snd_ac97_resume(chip->ac97);
/* start timer again */
if (atomic_read(&chip->bobclient))
snd_es1968_bob_start(chip);
+
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
-#ifndef PCI_OLD_SUSPEND
static int snd_es1968_suspend(struct pci_dev *dev, u32 state)
{
es1968_t *chip = snd_magic_cast(es1968_t, pci_get_drvdata(dev), return -ENXIO);
@@ -2475,18 +2485,6 @@
es1968_resume(chip);
return 0;
}
-#else
-static void snd_es1968_suspend(struct pci_dev *dev)
-{
- es1968_t *chip = snd_magic_cast(es1968_t, pci_get_drvdata(dev), return);
- es1968_suspend(chip);
-}
-static void snd_es1968_resume(struct pci_dev *dev)
-{
- es1968_t *chip = snd_magic_cast(es1968_t, pci_get_drvdata(dev), return);
- es1968_resume(chip);
-}
-#endif
/* callback */
static int snd_es1968_set_power_state(snd_card_t *card, unsigned int power_state)
@@ -2612,9 +2610,9 @@
/* disable power-management if not maestro2e or
* if not on the whitelist
*/
- unsigned int vend;
- pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
- if (chip->type != TYPE_MAESTRO2E || (vend & 0xffff) != 0x1028) {
+ unsigned short vend;
+ pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
+ if (chip->type != TYPE_MAESTRO2E || (vend != 0x1028 && vend != 0x1179)) {
printk(KERN_INFO "es1968: not attempting power management.\n");
do_pm = 0;
}
@@ -2768,6 +2766,8 @@
return err;
}
}
+
+ snd_es1968_start_irq(chip);
chip->clock = clock[dev];
if (! chip->clock)
diff -Nru a/sound/pci/fm801.c b/sound/pci/fm801.c
--- a/sound/pci/fm801.c Sun Aug 3 13:14:51 2003
+++ b/sound/pci/fm801.c Sun Aug 3 13:14:51 2003
@@ -163,7 +163,7 @@
snd_info_entry_t *proc_entry;
};
-static struct pci_device_id snd_fm801_ids[] __devinitdata = {
+static struct pci_device_id snd_fm801_ids[] = {
{ 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
{ 0, }
};
diff -Nru a/sound/pci/ice1712/ak4xxx.c b/sound/pci/ice1712/ak4xxx.c
--- a/sound/pci/ice1712/ak4xxx.c Sun Aug 3 13:14:44 2003
+++ b/sound/pci/ice1712/ak4xxx.c Sun Aug 3 13:14:44 2003
@@ -27,8 +27,14 @@
#include <linux/interrupt.h>
#include <linux/init.h>
#include <sound/core.h>
+#include <sound/initval.h>
#include "ice1712.h"
+MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
+MODULE_DESCRIPTION("ICEnsemble ICE17xx <-> AK4xxx AD/DA chip interface");
+MODULE_LICENSE("GPL");
+MODULE_CLASSES("{sound}");
+
static void snd_ice1712_akm4xxx_lock(akm4xxx_t *ak, int chip)
{
ice1712_t *ice = ak->private_data[0];
@@ -116,8 +122,8 @@
/*
* initialize the akm4xxx_t record with the template
*/
-int __devinit snd_ice1712_akm4xxx_init(akm4xxx_t *ak, const akm4xxx_t *temp,
- const struct snd_ak4xxx_private *_priv, ice1712_t *ice)
+int snd_ice1712_akm4xxx_init(akm4xxx_t *ak, const akm4xxx_t *temp,
+ const struct snd_ak4xxx_private *_priv, ice1712_t *ice)
{
struct snd_ak4xxx_private *priv;
@@ -139,7 +145,7 @@
return 0;
}
-void __devexit snd_ice1712_akm4xxx_free(ice1712_t *ice)
+void snd_ice1712_akm4xxx_free(ice1712_t *ice)
{
unsigned int akidx;
if (ice->akm == NULL)
@@ -155,7 +161,7 @@
/*
* build AK4xxx controls
*/
-int __devinit snd_ice1712_akm4xxx_build_controls(ice1712_t *ice)
+int snd_ice1712_akm4xxx_build_controls(ice1712_t *ice)
{
unsigned int akidx;
int err;
diff -Nru a/sound/pci/ice1712/aureon.c b/sound/pci/ice1712/aureon.c
--- a/sound/pci/ice1712/aureon.c Sun Aug 3 13:14:47 2003
+++ b/sound/pci/ice1712/aureon.c Sun Aug 3 13:14:47 2003
@@ -449,7 +449,7 @@
/*
- * Aureon board don't provide the EEPROM data except for the vendor IDs.
+ * Aureon boards don't provide the EEPROM data except for the vendor IDs.
* hence the driver needs to sets up it properly.
*/
diff -Nru a/sound/pci/ice1712/ews.c b/sound/pci/ice1712/ews.c
--- a/sound/pci/ice1712/ews.c Sun Aug 3 13:14:46 2003
+++ b/sound/pci/ice1712/ews.c Sun Aug 3 13:14:46 2003
@@ -389,6 +389,14 @@
* initialize the chip
*/
+/* 6fire specific */
+#define PCF9554_REG_INPUT 0
+#define PCF9554_REG_OUTPUT 1
+#define PCF9554_REG_POLARITY 2
+#define PCF9554_REG_CONFIG 3
+
+static int snd_ice1712_6fire_write_pca(ice1712_t *ice, unsigned char reg, unsigned char data);
+
static int __devinit snd_ice1712_ews_init(ice1712_t *ice)
{
int err;
@@ -425,6 +433,7 @@
snd_printk("PCF9554 initialization failed\n");
return err;
}
+ snd_ice1712_6fire_write_pca(ice, PCF9554_REG_CONFIG, 0x80);
break;
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
@@ -449,10 +458,12 @@
case ICE1712_SUBDEVICE_EWX2496:
if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
return err;
+ snd_cs8427_reg_write(ice->cs8427, CS8427_REG_RECVERRMASK, CS8427_UNLOCK | CS8427_CONF | CS8427_BIP | CS8427_PAR);
break;
case ICE1712_SUBDEVICE_DMX6FIRE:
if ((err = snd_ice1712_init_cs8427(ice, ICE1712_6FIRE_CS8427_ADDR)) < 0)
return err;
+ snd_cs8427_reg_write(ice->cs8427, CS8427_REG_RECVERRMASK, CS8427_UNLOCK | CS8427_CONF | CS8427_BIP | CS8427_PAR);
break;
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
@@ -749,11 +760,6 @@
/*
* DMX 6Fire specific controls
*/
-
-#define PCF9554_REG_INPUT 0
-#define PCF9554_REG_OUTPUT 1
-#define PCF9554_REG_POLARITY 2
-#define PCF9554_REG_CONFIG 3
static int snd_ice1712_6fire_read_pca(ice1712_t *ice, unsigned char reg)
{
diff -Nru a/sound/pci/ice1712/ice1712.c b/sound/pci/ice1712/ice1712.c
--- a/sound/pci/ice1712/ice1712.c Sun Aug 3 13:14:47 2003
+++ b/sound/pci/ice1712/ice1712.c Sun Aug 3 13:14:47 2003
@@ -103,7 +103,7 @@
#define PCI_DEVICE_ID_ICE_1712 0x1712
#endif
-static struct pci_device_id snd_ice1712_ids[] __devinitdata = {
+static struct pci_device_id snd_ice1712_ids[] = {
{ PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
{ 0, }
};
diff -Nru a/sound/pci/ice1712/ice1712.h b/sound/pci/ice1712/ice1712.h
--- a/sound/pci/ice1712/ice1712.h Sun Aug 3 13:14:44 2003
+++ b/sound/pci/ice1712/ice1712.h Sun Aug 3 13:14:44 2003
@@ -86,8 +86,8 @@
* Indirect registers
*/
-#define ICE1712_IREG_PBK_COUNT_HI 0x00
-#define ICE1712_IREG_PBK_COUNT_LO 0x01
+#define ICE1712_IREG_PBK_COUNT_LO 0x00
+#define ICE1712_IREG_PBK_COUNT_HI 0x01
#define ICE1712_IREG_PBK_CTRL 0x02
#define ICE1712_IREG_PBK_LEFT 0x03 /* left volume */
#define ICE1712_IREG_PBK_RIGHT 0x04 /* right volume */
@@ -95,8 +95,8 @@
#define ICE1712_IREG_PBK_RATE_LO 0x06
#define ICE1712_IREG_PBK_RATE_MID 0x07
#define ICE1712_IREG_PBK_RATE_HI 0x08
-#define ICE1712_IREG_CAP_COUNT_HI 0x10
-#define ICE1712_IREG_CAP_COUNT_LO 0x11
+#define ICE1712_IREG_CAP_COUNT_LO 0x10
+#define ICE1712_IREG_CAP_COUNT_HI 0x11
#define ICE1712_IREG_CAP_CTRL 0x12
#define ICE1712_IREG_GPIO_DATA 0x20
#define ICE1712_IREG_GPIO_WRITE_MASK 0x21
diff -Nru a/sound/pci/ice1712/ice1724.c b/sound/pci/ice1712/ice1724.c
--- a/sound/pci/ice1712/ice1724.c Sun Aug 3 13:14:48 2003
+++ b/sound/pci/ice1712/ice1724.c Sun Aug 3 13:14:48 2003
@@ -77,7 +77,7 @@
#define PCI_DEVICE_ID_VT1724 0x1724
#endif
-static struct pci_device_id snd_vt1724_ids[] __devinitdata = {
+static struct pci_device_id snd_vt1724_ids[] = {
{ PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ 0, }
};
@@ -1583,8 +1583,8 @@
struct snd_ice1712_card_info **tbl, *c;
if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) == 0) {
- snd_printk("ICE1724 has not detected EEPROM\n");
- return -EIO;
+ snd_printk(KERN_WARNING "ICE1724 has not detected EEPROM\n");
+ // return -EIO;
}
ice->eeprom.subvendor = (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
(snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
diff -Nru a/sound/pci/intel8x0.c b/sound/pci/intel8x0.c
--- a/sound/pci/intel8x0.c Sun Aug 3 13:14:49 2003
+++ b/sound/pci/intel8x0.c Sun Aug 3 13:14:49 2003
@@ -254,8 +254,13 @@
DEFINE_REGSET(AL_PO, 0x50); /* Ali PCM out */
DEFINE_REGSET(AL_MC, 0x60); /* Ali Mic in */
DEFINE_REGSET(AL_CDC_SPO, 0x70); /* Ali Codec SPDIF out */
+DEFINE_REGSET(AL_CENTER, 0x80); /* Ali center out */
+DEFINE_REGSET(AL_LFE, 0x90); /* Ali center out */
DEFINE_REGSET(AL_CLR_SPI, 0xa0); /* Ali Controller SPDIF in */
DEFINE_REGSET(AL_CLR_SPO, 0xb0); /* Ali Controller SPDIF out */
+DEFINE_REGSET(AL_I2S, 0xc0); /* Ali I2S in */
+DEFINE_REGSET(AL_PI2, 0xd0); /* Ali PCM2 in */
+DEFINE_REGSET(AL_MC2, 0xe0); /* Ali Mic2 in */
enum {
ICH_REG_ALI_SCR = 0x00, /* System Control Register */
@@ -275,32 +280,61 @@
ICH_REG_ALI_RTSR = 0x34, /* Receive Tag Slot Register */
ICH_REG_ALI_CSPSR = 0x38, /* Command/Status Port Status Register */
ICH_REG_ALI_CAS = 0x3c, /* Codec Write Semaphore Register */
+ ICH_REG_ALI_HWVOL = 0xf0, /* hardware volume control/status */
+ ICH_REG_ALI_I2SCR = 0xf4, /* I2S control/status */
ICH_REG_ALI_SPDIFCSR = 0xf8, /* spdif channel status register */
- ICH_REG_ALI_SPDIFICS = 0xfc /* spdif interface control/status */
+ ICH_REG_ALI_SPDIFICS = 0xfc, /* spdif interface control/status */
};
#define ALI_CAS_SEM_BUSY 0x80000000
-#define ALI_CSPSR_CODEC_READY 0x08
+#define ALI_CPR_ADDR_SECONDARY 0x100
#define ALI_CPR_ADDR_READ 0x80
+#define ALI_CSPSR_CODEC_READY 0x08
#define ALI_CSPSR_READ_OK 0x02
#define ALI_CSPSR_WRITE_OK 0x01
/* interrupts for the whole chip by interrupt status register finish */
+#define ALI_INT_MICIN2 (1<<26)
+#define ALI_INT_PCMIN2 (1<<25)
+#define ALI_INT_I2SIN (1<<24)
#define ALI_INT_SPDIFOUT (1<<23) /* controller spdif out INTERRUPT */
#define ALI_INT_SPDIFIN (1<<22)
+#define ALI_INT_LFEOUT (1<<21)
+#define ALI_INT_CENTEROUT (1<<20)
#define ALI_INT_CODECSPDIFOUT (1<<19)
#define ALI_INT_MICIN (1<<18)
#define ALI_INT_PCMOUT (1<<17)
#define ALI_INT_PCMIN (1<<16)
-#define ALI_INT_CPRAIS (1<<7)
-#define ALI_INT_SPRAIS (1<<5)
+#define ALI_INT_CPRAIS (1<<7) /* command port available */
+#define ALI_INT_SPRAIS (1<<5) /* status port available */
#define ALI_INT_GPIO (1<<1)
#define ALI_INT_MASK (ALI_INT_SPDIFOUT|ALI_INT_CODECSPDIFOUT|ALI_INT_MICIN|ALI_INT_PCMOUT|ALI_INT_PCMIN)
-#define ALI_PCM_CH4 0x100
-#define ALI_PCM_CH6 0x200
-#define ALI_PCM_MASK (ALI_PCM_CH4 | ALI_PCM_CH6)
+#define ICH_ALI_SC_RESET (1<<31) /* master reset */
+#define ICH_ALI_SC_AC97_DBL (1<<30)
+#define ICH_ALI_SC_CODEC_SPDF (3<<20) /* 1=7/8, 2=6/9, 3=10/11 */
+#define ICH_ALI_SC_IN_BITS (3<<18)
+#define ICH_ALI_SC_OUT_BITS (3<<16)
+#define ICH_ALI_SC_6CH_CFG (3<<14)
+#define ICH_ALI_SC_PCM_4 (1<<8)
+#define ICH_ALI_SC_PCM_6 (2<<8)
+#define ICH_ALI_SC_PCM_246_MASK (3<<8)
+
+#define ICH_ALI_SS_SEC_ID (3<<5)
+#define ICH_ALI_SS_PRI_ID (3<<3)
+
+#define ICH_ALI_IF_AC97SP (1<<21)
+#define ICH_ALI_IF_MC (1<<20)
+#define ICH_ALI_IF_PI (1<<19)
+#define ICH_ALI_IF_MC2 (1<<18)
+#define ICH_ALI_IF_PI2 (1<<17)
+#define ICH_ALI_IF_LINE_SRC (1<<15) /* 0/1 = slot 3/6 */
+#define ICH_ALI_IF_MIC_SRC (1<<14) /* 0/1 = slot 3/6 */
+#define ICH_ALI_IF_SPDF_SRC (3<<12) /* 00 = PCM, 01 = AC97-in, 10 = spdif-in, 11 = i2s */
+#define ICH_ALI_IF_AC97_OUT (3<<8) /* 00 = PCM, 10 = spdif-in, 11 = i2s */
+#define ICH_ALI_IF_PO_SPDF (1<<3)
+#define ICH_ALI_IF_PO (1<<1)
/*
*
@@ -336,11 +370,6 @@
ac97_t *ac97;
unsigned short ac97_rate_regs[3];
int ac97_rates_idx;
-#ifdef CONFIG_PM
- unsigned char civ_saved;
- unsigned char piv_saved;
- unsigned short picb_saved;
-#endif
} ichdev_t;
typedef struct _snd_intel8x0 intel8x0_t;
@@ -395,7 +424,7 @@
#endif
};
-static struct pci_device_id snd_intel8x0_ids[] __devinitdata = {
+static struct pci_device_id snd_intel8x0_ids[] = {
{ 0x8086, 0x2415, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* 82801AA */
{ 0x8086, 0x2425, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* 82901AB */
{ 0x8086, 0x2445, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* 82801BA */
@@ -603,31 +632,29 @@
int time = 100;
while (time-- && (igetdword(chip, ICHREG(ALI_CAS)) & ALI_CAS_SEM_BUSY))
udelay(1);
+ if (! time)
+ snd_printk(KERN_WARNING "ali_codec_semaphore timeout\n");
return snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_CODEC_READY);
}
static unsigned short snd_intel8x0_ali_codec_read(ac97_t *ac97, unsigned short reg)
{
intel8x0_t *chip = snd_magic_cast(intel8x0_t, ac97->private_data, return ~0);
- unsigned short data, reg2;
+ unsigned short data = 0xffff;
spin_lock(&chip->ac97_lock);
if (snd_intel8x0_ali_codec_semaphore(chip))
goto __err;
- iputword(chip, ICHREG(ALI_CPR_ADDR), reg | ALI_CPR_ADDR_READ);
+ reg |= ALI_CPR_ADDR_READ;
+ if (ac97->num)
+ reg |= ALI_CPR_ADDR_SECONDARY;
+ iputword(chip, ICHREG(ALI_CPR_ADDR), reg);
if (snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_READ_OK))
goto __err;
data = igetword(chip, ICHREG(ALI_SPR));
- reg2 = igetword(chip, ICHREG(ALI_SPR_ADDR));
- if (reg != reg2) {
- snd_printd(KERN_WARNING "intel8x0: AC97 read not completed? 0x%x != 0x%x\n", reg, reg2);
- // goto __err;
- }
- spin_unlock(&chip->ac97_lock);
- return data;
__err:
spin_unlock(&chip->ac97_lock);
- return 0xffff;
+ return data;
}
static void snd_intel8x0_ali_codec_write(ac97_t *ac97, unsigned short reg, unsigned short val)
@@ -640,7 +667,9 @@
return;
}
iputword(chip, ICHREG(ALI_CPR), val);
- iputbyte(chip, ICHREG(ALI_CPR_ADDR), reg);
+ if (ac97->num)
+ reg |= ALI_CPR_ADDR_SECONDARY;
+ iputword(chip, ICHREG(ALI_CPR_ADDR), reg);
snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_WRITE_OK);
spin_unlock(&chip->ac97_lock);
}
@@ -680,6 +709,7 @@
ichdev->frags = ichdev->size / ichdev->fragsize;
}
iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);
+ iputbyte(chip, port + ICH_REG_OFF_CIV, 0);
ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
ichdev->position = 0;
#if 0
@@ -728,6 +758,8 @@
spin_lock(&chip->reg_lock);
status = igetdword(chip, chip->int_sta_reg);
if ((status & chip->int_sta_mask) == 0) {
+ if (status)
+ iputdword(chip, chip->int_sta_reg, status);
spin_unlock(&chip->reg_lock);
return IRQ_NONE;
}
@@ -776,8 +808,9 @@
}
iputbyte(chip, port + ICH_REG_OFF_CR, val);
if (cmd == SNDRV_PCM_TRIGGER_STOP) {
- /* reset whole DMA things */
+ /* wait until DMA stopped */
while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;
+ /* reset whole DMA things */
iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS);
}
return 0;
@@ -788,31 +821,40 @@
intel8x0_t *chip = snd_pcm_substream_chip(substream);
ichdev_t *ichdev = get_ichdev(substream);
unsigned long port = ichdev->reg_offset;
+ static int fiforeg[] = { ICHREG(ALI_FIFOCR1), ICHREG(ALI_FIFOCR2), ICHREG(ALI_FIFOCR3) };
+ unsigned int val, fifo;
+ val = igetdword(chip, ICHREG(ALI_DMACR));
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ /* clear FIFO for synchronization of channels */
+ fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]);
+ fifo &= ~(0xff << (ichdev->ali_slot % 4));
+ fifo |= 0x83 << (ichdev->ali_slot % 4);
+ iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo);
+ }
iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE);
- iputbyte(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);
+ val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */
+ iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot)); /* start DMA */
break;
case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
- iputbyte(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 8));
+ iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16))); /* pause */
iputbyte(chip, port + ICH_REG_OFF_CR, 0);
- /* reset whole DMA things */
- while (!(igetbyte(chip, port + ICH_REG_OFF_CR)))
+ while (igetbyte(chip, port + ICH_REG_OFF_CR))
;
+ if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
+ break;
+ /* reset whole DMA things */
iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS);
/* clear interrupts */
iputbyte(chip, port + ICH_REG_OFF_SR, igetbyte(chip, port + ICH_REG_OFF_SR) | 0x1e);
iputdword(chip, ICHREG(ALI_INTERRUPTSR),
- igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & (1 << (ichdev->ali_slot + 8)));
- break;
- case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- iputbyte(chip, port + ICH_REG_OFF_CR, 0);
- break;
- case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- iputbyte(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);
+ igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask);
break;
default:
return -EINVAL;
@@ -833,21 +875,36 @@
static void snd_intel8x0_setup_multi_channels(intel8x0_t *chip, int channels)
{
- unsigned int cnt = igetdword(chip, ICHREG(GLOB_CNT));
- if (chip->device_type == DEVICE_SIS) {
+ unsigned int cnt;
+ switch (chip->device_type) {
+ case DEVICE_ALI:
+ cnt = igetdword(chip, ICHREG(ALI_SCR));
+ cnt &= ~ICH_ALI_SC_PCM_246_MASK;
+ if (chip->multi4 && channels == 4)
+ cnt |= ICH_ALI_SC_PCM_4;
+ else if (chip->multi6 && channels == 6)
+ cnt |= ICH_ALI_SC_PCM_6;
+ iputdword(chip, ICHREG(ALI_SCR), cnt);
+ break;
+ case DEVICE_SIS:
+ cnt = igetdword(chip, ICHREG(GLOB_CNT));
cnt &= ~ICH_SIS_PCM_246_MASK;
if (chip->multi4 && channels == 4)
cnt |= ICH_SIS_PCM_4;
else if (chip->multi6 && channels == 6)
cnt |= ICH_SIS_PCM_6;
- } else {
+ iputdword(chip, ICHREG(GLOB_CNT), cnt);
+ break;
+ default:
+ cnt = igetdword(chip, ICHREG(GLOB_CNT));
cnt &= ~ICH_PCM_246_MASK;
if (chip->multi4 && channels == 4)
cnt |= ICH_PCM_4;
else if (chip->multi6 && channels == 6)
cnt |= ICH_PCM_6;
+ iputdword(chip, ICHREG(GLOB_CNT), cnt);
+ break;
}
- iputdword(chip, ICHREG(GLOB_CNT), cnt);
}
static int snd_intel8x0_pcm_prepare(snd_pcm_substream_t * substream)
@@ -860,7 +917,7 @@
ichdev->physbuf = runtime->dma_addr;
ichdev->size = snd_pcm_lib_buffer_bytes(substream);
ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
- if (ichdev->ichd == ICHD_PCMOUT && chip->device_type != DEVICE_ALI) {
+ if (ichdev->ichd == ICHD_PCMOUT) {
spin_lock(&chip->reg_lock);
snd_intel8x0_setup_multi_channels(chip, runtime->channels);
spin_unlock(&chip->reg_lock);
@@ -869,6 +926,9 @@
for (i = 0; i < 3; i++)
if (ichdev->ac97_rate_regs[i])
snd_ac97_set_rate(ichdev->ac97, ichdev->ac97_rate_regs[i], runtime->rate);
+ /* FIXME: hack to enable spdif support */
+ if (ichdev->ichd == ICHD_PCMOUT && chip->device_type == DEVICE_SIS)
+ snd_ac97_set_rate(ichdev->ac97, AC97_SPDIF, runtime->rate);
}
snd_intel8x0_setup_periods(chip, ichdev);
return 0;
@@ -878,11 +938,16 @@
{
intel8x0_t *chip = snd_pcm_substream_chip(substream);
ichdev_t *ichdev = get_ichdev(substream);
- size_t ptr;
+ size_t ptr1, ptr;
- ptr = ichdev->fragsize1;
- ptr -= igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift;
+ ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift;
+ if (ptr1 != 0)
+ ptr = ichdev->fragsize1 - ptr1;
+ else
+ ptr = 0;
ptr += ichdev->position;
+ if (ptr >= ichdev->size)
+ return 0;
return bytes_to_frames(substream->runtime, ptr);
}
@@ -895,7 +960,7 @@
SNDRV_PCM_INFO_RESUME),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
- .rate_min = 8000,
+ .rate_min = 48000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
@@ -935,14 +1000,23 @@
{
intel8x0_t *chip = snd_pcm_substream_chip(substream);
snd_pcm_runtime_t *runtime = substream->runtime;
+ static unsigned int i, rates[] = {
+ /* ATTENTION: these values depend on the definition in pcm.h! */
+ 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000
+ };
int err;
ichdev->substream = substream;
runtime->hw = snd_intel8x0_stream;
- if (ichdev->ac97 && ichdev->ac97_rates_idx >= 0)
+ if (ichdev->ac97 && ichdev->ac97_rates_idx >= 0) {
runtime->hw.rates = ichdev->ac97->rates[ichdev->ac97_rates_idx];
- if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
- runtime->hw.rate_min = 48000;
+ for (i = 0; i < ARRAY_SIZE(rates); i++) {
+ if (runtime->hw.rates & (1 << i)) {
+ runtime->hw.rate_min = rates[i];
+ break;
+ }
+ }
+ }
if (chip->device_type == DEVICE_SIS) {
runtime->hw.buffer_bytes_max = 64*1024;
runtime->hw.period_bytes_max = 64*1024;
@@ -1058,6 +1132,14 @@
static int snd_intel8x0_ali_ac97spdifout_open(snd_pcm_substream_t * substream)
{
intel8x0_t *chip = snd_pcm_substream_chip(substream);
+ unsigned long flags;
+ unsigned int val;
+
+ spin_lock_irqsave(&chip->reg_lock, flags);
+ val = igetdword(chip, ICHREG(ALI_INTERFACECR));
+ val |= ICH_ALI_IF_AC97SP;
+ /* also needs to set ALI_SC_CODEC_SPDF correctly */
+ spin_unlock_irqrestore(&chip->reg_lock, flags);
return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_AC97SPDIFOUT]);
}
@@ -1065,8 +1147,15 @@
static int snd_intel8x0_ali_ac97spdifout_close(snd_pcm_substream_t * substream)
{
intel8x0_t *chip = snd_pcm_substream_chip(substream);
+ unsigned long flags;
+ unsigned int val;
chip->ichd[ALID_AC97SPDIFOUT].substream = NULL;
+ spin_lock_irqsave(&chip->reg_lock, flags);
+ val = igetdword(chip, ICHREG(ALI_INTERFACECR));
+ val &= ~ICH_ALI_IF_AC97SP;
+ spin_unlock_irqrestore(&chip->reg_lock, flags);
+
return 0;
}
@@ -1085,6 +1174,7 @@
return 0;
}
+#if 0 // NYI
static int snd_intel8x0_ali_spdifout_open(snd_pcm_substream_t * substream)
{
intel8x0_t *chip = snd_pcm_substream_chip(substream);
@@ -1099,6 +1189,7 @@
chip->ichd[ALID_SPDIFOUT].substream = NULL;
return 0;
}
+#endif
static snd_pcm_ops_t snd_intel8x0_playback_ops = {
.open = snd_intel8x0_playback_open,
@@ -1221,6 +1312,7 @@
.pointer = snd_intel8x0_pcm_pointer,
};
+#if 0 // NYI
static snd_pcm_ops_t snd_intel8x0_ali_spdifout_ops = {
.open = snd_intel8x0_ali_spdifout_open,
.close = snd_intel8x0_ali_spdifout_close,
@@ -1231,6 +1323,7 @@
.trigger = snd_intel8x0_pcm_trigger,
.pointer = snd_intel8x0_pcm_pointer,
};
+#endif // NYI
struct ich_pcm_table {
char *suffix;
@@ -1352,18 +1445,20 @@
},
{
.suffix = "IEC958",
- .playback_ops = &snd_intel8x0_ali_spdifout_ops,
+ .playback_ops = &snd_intel8x0_ali_ac97spdifout_ops,
.capture_ops = &snd_intel8x0_ali_spdifin_ops,
.prealloc_size = 64 * 1024,
.prealloc_max_size = 128 * 1024,
+ .ac97_idx = ALID_AC97SPDIFOUT,
},
+#if 0 // NYI
{
- .suffix = "AC97 IEC958",
- .playback_ops = &snd_intel8x0_ali_ac97spdifout_ops,
+ .suffix = "HW IEC958",
+ .playback_ops = &snd_intel8x0_ali_spdifout_ops,
.prealloc_size = 64 * 1024,
.prealloc_max_size = 128 * 1024,
- .ac97_idx = ALID_AC97SPDIFOUT,
},
+#endif
};
static int __devinit snd_intel8x0_pcm(intel8x0_t *chip)
@@ -1442,20 +1537,30 @@
};
static struct _ac97_rate_regs ali_ac97_rate_regs[] __devinitdata = {
+#if 0 /* FIXME: my test board doens't work well with VRA... */
{ ALID_PCMOUT, { AC97_PCM_FRONT_DAC_RATE, AC97_PCM_SURR_DAC_RATE, AC97_PCM_LFE_DAC_RATE }, AC97_RATES_FRONT_DAC },
{ ALID_PCMIN, { AC97_PCM_LR_ADC_RATE, 0, 0 }, AC97_RATES_ADC },
{ ALID_MIC, { AC97_PCM_MIC_ADC_RATE, 0, 0 }, AC97_RATES_MIC_ADC },
{ ALID_AC97SPDIFOUT, { AC97_SPDIF, 0, 0 }, AC97_RATES_SPDIF },
{ ALID_SPDIFOUT, { 0, 0, 0 }, -1 },
{ ALID_SPDIFIN, { 0, 0, 0 }, -1 },
+#else
+ { ALID_PCMOUT, { AC97_PCM_FRONT_DAC_RATE }, -1 },
+ { ALID_PCMIN, { AC97_PCM_LR_ADC_RATE }, -1 },
+ { ALID_MIC, { AC97_PCM_MIC_ADC_RATE }, -1 },
+ { ALID_AC97SPDIFOUT, { AC97_SPDIF }, -1 },
+ { ALID_SPDIFOUT, { }, -1 },
+ { ALID_SPDIFIN, { }, -1 },
+#endif
};
static struct ac97_quirk ac97_quirks[] __devinitdata = {
{ 0x1028, 0x0126, "Dell Optiplex GX260", AC97_TUNE_HP_ONLY },
{ 0x1734, 0x0088, "Fujitsu-Siemens D1522", AC97_TUNE_HP_ONLY },
{ 0x10f1, 0x2665, "Fujitsu-Siemens Celcius", AC97_TUNE_HP_ONLY },
+ { 0x110a, 0x0056, "Fujitsu-Siemens Scenic", AC97_TUNE_HP_ONLY },
{ 0x8086, 0x4d44, "Intel D850EMV2", AC97_TUNE_HP_ONLY },
- { 0x4144, 0x5360, "AMD64 Motherboard", AC97_TUNE_HP_ONLY },
+ /* { 0x4144, 0x5360, "AMD64 Motherboard", AC97_TUNE_HP_ONLY }, */ /* FIXME: this seems invalid */
{ 0x1043, 0x80b0, "ASUS P4PE Mobo", AC97_TUNE_SWAP_SURROUND },
{ } /* terminator */
};
@@ -1465,19 +1570,24 @@
ac97_t ac97, *x97;
ichdev_t *ichdev;
int err;
- unsigned int i, num, channels = 2, codecs, _codecs;
+ unsigned int i, num, codecs, _codecs;
unsigned int glob_sta = 0;
struct _ac97_rate_regs *tbl;
+ int spdif_idx = -1; /* disabled */
switch (chip->device_type) {
case DEVICE_NFORCE:
tbl = nforce_ac97_rate_regs;
+ spdif_idx = NVD_SPBAR;
break;
case DEVICE_ALI:
tbl = ali_ac97_rate_regs;
+ spdif_idx = ALID_AC97SPDIFOUT;
break;
default:
tbl = intel_ac97_rate_regs;
+ if (chip->device_type == DEVICE_INTEL_ICH4)
+ spdif_idx = ICHD_SPBAR;
break;
};
for (i = 0; i < chip->bdbars_count; i++) {
@@ -1501,10 +1611,6 @@
glob_sta = igetdword(chip, ICHREG(GLOB_STA));
ac97.write = snd_intel8x0_codec_write;
ac97.read = snd_intel8x0_codec_read;
- if (glob_sta & ICH_PCM_6)
- channels = 6;
- else if (glob_sta & ICH_PCM_4)
- channels = 4;
if (chip->device_type == DEVICE_INTEL_ICH4) {
codecs = 0;
if (glob_sta & ICH_PCR)
@@ -1527,7 +1633,6 @@
} else {
ac97.write = snd_intel8x0_ali_codec_write;
ac97.read = snd_intel8x0_ali_codec_read;
- channels = 6;
codecs = 1;
/* detect the secondary codec */
for (i = 0; i < 100; i++) {
@@ -1551,19 +1656,8 @@
if (x97->ext_id & AC97_EI_VRM)
chip->ichd[ICHD_MIC].ac97 = x97;
/* spdif */
- if (x97->ext_id & AC97_EI_SPDIF) {
- switch (chip->device_type) {
- case DEVICE_INTEL_ICH4:
- chip->ichd[ICHD_SPBAR].ac97 = x97;
- break;
- case DEVICE_NFORCE:
- chip->ichd[NVD_SPBAR].ac97 = x97;
- break;
- case DEVICE_ALI:
- chip->ichd[ALID_AC97SPDIFOUT].ac97 = x97;
- break;
- }
- }
+ if ((x97->ext_id & AC97_EI_SPDIF) && spdif_idx >= 0)
+ chip->ichd[spdif_idx].ac97 = x97;
/* make sure, that we have DACs at right slot for rev2.2 */
if (ac97_is_rev22(x97))
snd_ac97_update_bits(x97, AC97_EXTENDED_ID, AC97_EI_DACS_SLOT_MASK, 0);
@@ -1594,23 +1688,18 @@
chip->ichd[ICHD_PCM2IN].ac97 == x97)
chip->ichd[ICHD_MIC2].ac97 = x97;
}
- if (x97->ext_id & AC97_EI_SPDIF) {
- if (chip->ichd[ICHD_SPBAR].ac97 == NULL)
- chip->ichd[ICHD_SPBAR].ac97 = x97;
- }
break;
default:
if (x97->ext_id & AC97_EI_VRM) {
if (chip->ichd[ICHD_MIC].ac97 == NULL)
chip->ichd[ICHD_MIC].ac97 = x97;
}
- if ((x97->ext_id & AC97_EI_SPDIF) &&
- chip->device_type == DEVICE_NFORCE) {
- if (chip->ichd[NVD_SPBAR].ac97 == NULL)
- chip->ichd[NVD_SPBAR].ac97 = x97;
- }
break;
}
+ if ((x97->ext_id & AC97_EI_SPDIF) && spdif_idx >= 0) {
+ if (chip->ichd[spdif_idx].ac97 == NULL)
+ chip->ichd[spdif_idx].ac97 = x97;
+ }
}
__skip_secondary:
@@ -1640,22 +1729,24 @@
if (x97->scaps & AC97_SCAP_CENTER_LFE_DAC)
chip->multi6 = 1;
}
- if (codecs > 1) {
+ if (chip->device_type == DEVICE_ALI && chip->ac97[1]) {
+ /* set secondary codec id */
+ iputdword(chip, ICHREG(ALI_SSR),
+ (igetdword(chip, ICHREG(ALI_SSR)) & ~ICH_ALI_SS_SEC_ID) |
+ (chip->ac97[1]->addr << 5));
+ }
+ if (codecs > 1 && !chip->multi6) {
/* assign right slots for rev2.2 codecs */
i = 1;
- if (chip->multi4)
- goto __6ch;
- for ( ; i < codecs; i++) {
+ for ( ; i < codecs && !chip->multi4; i++) {
x97 = chip->ac97[i];
if (!ac97_is_audio(x97))
continue;
if (ac97_is_rev22(x97)) {
snd_ac97_update_bits(x97, AC97_EXTENDED_ID, AC97_EI_DACS_SLOT_MASK, 1);
chip->multi4 = 1;
- break;
}
}
- __6ch:
for ( ; i < codecs && chip->multi4; i++) {
x97 = chip->ac97[i];
if (!ac97_is_audio(x97))
@@ -1668,27 +1759,20 @@
}
/* ok, some older codecs might support only AMAP */
if (!chip->multi4) {
+ int cnums = 0;
for (i = 1; i < codecs; i++) {
x97 = chip->ac97[i];
if (!ac97_is_audio(x97))
continue;
if (ac97_can_amap(x97)) {
- if (x97->addr == 1) {
- chip->multi4 = 1;
- break;
- }
- }
- }
- for ( ; i < codecs && chip->multi4; i++) {
- if (!ac97_is_audio(x97))
- continue;
- if (ac97_can_amap(x97)) {
- if (x97->addr == 2) {
- chip->multi6 = 1;
- break;
- }
+ if (x97->addr > 0)
+ cnums++;
}
}
+ if (cnums >= 2)
+ chip->multi6 = 1;
+ if (cnums >= 1)
+ chip->multi4 = 1;
}
}
chip->in_ac97_init = 0;
@@ -1702,25 +1786,20 @@
static void do_ali_reset(intel8x0_t *chip)
{
- iputdword(chip, ICHREG(ALI_SCR), 0x8000000);
+ iputdword(chip, ICHREG(ALI_SCR), ICH_ALI_SC_RESET);
iputdword(chip, ICHREG(ALI_FIFOCR1), 0x83838383);
iputdword(chip, ICHREG(ALI_FIFOCR2), 0x83838383);
- iputdword(chip, ICHREG(ALI_INTERFACECR), 0x04080002); /* no spdif? */
+ iputdword(chip, ICHREG(ALI_FIFOCR3), 0x83838383);
+ iputdword(chip, ICHREG(ALI_INTERFACECR),
+ ICH_ALI_IF_MC|ICH_ALI_IF_PI|ICH_ALI_IF_PO);
iputdword(chip, ICHREG(ALI_INTERRUPTCR), 0x00000000);
iputdword(chip, ICHREG(ALI_INTERRUPTSR), 0x00000000);
}
-static void do_delay(intel8x0_t *chip)
-{
-#ifdef CONFIG_PM
- if (chip->in_suspend) {
- mdelay((1000 + HZ - 1) / HZ);
- return;
- }
-#endif
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-}
+#define do_delay(chip) do {\
+ set_current_state(TASK_UNINTERRUPTIBLE);\
+ schedule_timeout(1);\
+} while (0)
static int snd_intel8x0_ich_chip_init(intel8x0_t *chip)
{
@@ -1847,14 +1926,14 @@
unsigned int i;
int err;
- if (chip->device_type != DEVICE_ALI)
- err = snd_intel8x0_ich_chip_init(chip);
- else
- err = snd_intel8x0_ali_chip_init(chip);
- if (err < 0)
- return err;
-
- iagetword(chip, 0); /* clear semaphore flag */
+ if (chip->device_type != DEVICE_ALI) {
+ if ((err = snd_intel8x0_ich_chip_init(chip)) < 0)
+ return err;
+ iagetword(chip, 0); /* clear semaphore flag */
+ } else {
+ if ((err = snd_intel8x0_ali_chip_init(chip)) < 0)
+ return err;
+ }
/* disable interrupts */
for (i = 0; i < chip->bdbars_count; i++)
@@ -1939,6 +2018,7 @@
return;
pci_enable_device(chip->pci);
+ pci_set_master(chip->pci);
snd_intel8x0_chip_init(chip);
for (i = 0; i < 3; i++)
if (chip->ac97[i])
@@ -1948,7 +2028,6 @@
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
-#ifndef PCI_OLD_SUSPEND
static int snd_intel8x0_suspend(struct pci_dev *dev, u32 state)
{
intel8x0_t *chip = snd_magic_cast(intel8x0_t, pci_get_drvdata(dev), return -ENXIO);
@@ -1961,18 +2040,6 @@
intel8x0_resume(chip);
return 0;
}
-#else
-static void snd_intel8x0_suspend(struct pci_dev *dev)
-{
- intel8x0_t *chip = snd_magic_cast(intel8x0_t, pci_get_drvdata(dev), return);
- intel8x0_suspend(chip);
-}
-static void snd_intel8x0_resume(struct pci_dev *dev)
-{
- intel8x0_t *chip = snd_magic_cast(intel8x0_t, pci_get_drvdata(dev), return);
- intel8x0_resume(chip);
-}
-#endif
/* callback */
static int snd_intel8x0_set_power_state(snd_card_t *card, unsigned int power_state)
@@ -2033,7 +2100,7 @@
iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE | ICH_STARTBM);
else {
iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE);
- iputbyte(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);
+ iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);
}
do_gettimeofday(&start_time);
spin_unlock_irqrestore(&chip->reg_lock, flags);
@@ -2051,12 +2118,16 @@
pos += ichdev->position;
do_gettimeofday(&stop_time);
/* stop */
- if (chip->device_type == DEVICE_ALI)
- iputbyte(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 8));
- iputbyte(chip, port + ICH_REG_OFF_CR, 0);
- /* reset whole DMA things */
- while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH))
- ;
+ if (chip->device_type == DEVICE_ALI) {
+ iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 8));
+ iputbyte(chip, port + ICH_REG_OFF_CR, 0);
+ while (igetbyte(chip, port + ICH_REG_OFF_CR))
+ ;
+ } else {
+ iputbyte(chip, port + ICH_REG_OFF_CR, 0);
+ while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH))
+ ;
+ }
iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS);
spin_unlock_irqrestore(&chip->reg_lock, flags);
@@ -2281,7 +2352,8 @@
ichdev->roff_sr = ICH_REG_OFF_SR;
ichdev->roff_picb = ICH_REG_OFF_PICB;
}
- ichdev->ali_slot = i + 1; /* is this right for last three devices? --jk */
+ if (device_type == DEVICE_ALI)
+ ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;
}
/* SIS7012 handles the pcm data in bytes, others are in words */
chip->pcm_pos_shift = (device_type == DEVICE_SIS) ? 0 : 1;
@@ -2479,7 +2551,7 @@
return 0;
}
-static struct pci_device_id snd_intel8x0_joystick_ids[] __devinitdata = {
+static struct pci_device_id snd_intel8x0_joystick_ids[] = {
{ 0x8086, 0x2410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 82801AA */
{ 0x8086, 0x2420, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 82901AB */
{ 0x8086, 0x2440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH2 */
diff -Nru a/sound/pci/korg1212/korg1212.c b/sound/pci/korg1212/korg1212.c
--- a/sound/pci/korg1212/korg1212.c Sun Aug 3 13:14:44 2003
+++ b/sound/pci/korg1212/korg1212.c Sun Aug 3 13:14:44 2003
@@ -423,7 +423,7 @@
MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
MODULE_AUTHOR("Haroldo Gamal <gamal@alternex.com.br>");
-static struct pci_device_id snd_korg1212_ids[] __devinitdata = {
+static struct pci_device_id snd_korg1212_ids[] = {
{
.vendor = 0x10b5,
.device = 0x906d,
diff -Nru a/sound/pci/maestro3.c b/sound/pci/maestro3.c
--- a/sound/pci/maestro3.c Sun Aug 3 13:14:49 2003
+++ b/sound/pci/maestro3.c Sun Aug 3 13:14:49 2003
@@ -43,6 +43,7 @@
#include <sound/info.h>
#include <sound/control.h>
#include <sound/pcm.h>
+#include <sound/mpu401.h>
#include <sound/ac97_codec.h>
#define SNDRV_GET_ID
#include <sound/initval.h>
@@ -851,6 +852,9 @@
int external_amp;
int amp_gpio;
+ /* midi */
+ snd_rawmidi_t *rmidi;
+
/* pcm streams */
int num_substreams;
m3_dma_t *substreams;
@@ -894,7 +898,7 @@
#define PCI_DEVICE_ID_ESS_MAESTRO3_2 0x199b
#endif
-static struct pci_device_id snd_m3_ids[] __devinitdata = {
+static struct pci_device_id snd_m3_ids[] = {
{PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_ALLEGRO_1, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0},
{PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_ALLEGRO, PCI_ANY_ID, PCI_ANY_ID,
@@ -971,6 +975,11 @@
* lowlevel functions
*/
+#define big_mdelay(msec) do {\
+ set_current_state(TASK_UNINTERRUPTIBLE);\
+ schedule_timeout(((msec) * HZ) / 1000);\
+} while (0)
+
inline static void snd_m3_outw(m3_t *chip, u16 value, unsigned long reg)
{
outw(value, chip->iobase + reg);
@@ -1012,7 +1021,7 @@
static void snd_m3_assp_halt(m3_t *chip)
{
chip->reset_state = snd_m3_inb(chip, DSP_PORT_CONTROL_REG_B) & ~REGB_STOP_CLOCK;
- mdelay(10);
+ big_mdelay(10);
snd_m3_outb(chip, chip->reset_state & ~REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B);
}
@@ -1526,9 +1535,14 @@
snd_m3_pcm_pointer(snd_pcm_substream_t * subs)
{
m3_t *chip = snd_pcm_substream_chip(subs);
+ unsigned int ptr;
m3_dma_t *s = (m3_dma_t*)subs->runtime->private_data;
snd_assert(s != NULL, return 0);
- return bytes_to_frames(subs->runtime, snd_m3_get_pointer(chip, s, subs));
+
+ spin_lock(&chip->reg_lock);
+ ptr = snd_m3_get_pointer(chip, s, subs);
+ spin_unlock(&chip->reg_lock);
+ return bytes_to_frames(subs->runtime, ptr);
}
@@ -1562,17 +1576,11 @@
u8 status;
int i;
- status = inb(chip->iobase + 0x1A);
+ status = inb(chip->iobase + HOST_INT_STATUS);
if (status == 0xff)
return IRQ_NONE;
- /* presumably acking the ints? */
- outw(status, chip->iobase + 0x1A);
-
- /*if (in_suspend)
- return IRQ_NONE;*/
-
/*
* ack an assp int if its running
* and has an int pending
@@ -1595,9 +1603,13 @@
}
}
- /* XXX is this needed? */
- if (status & 0x40)
- outb(0x40, chip->iobase+0x1A);
+#if 0 /* TODO: not supported yet */
+ if ((status & MPU401_INT_PENDING) && chip->rmidi)
+ snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
+#endif
+
+ /* ack ints */
+ snd_m3_outw(chip, HOST_INT_STATUS, status);
return IRQ_HANDLED;
}
@@ -1898,7 +1910,7 @@
return (ret == 0) || (ret == 0xffff);
}
-static void snd_m3_ac97_reset(m3_t *chip, int busywait)
+static void snd_m3_ac97_reset(m3_t *chip)
{
u16 dir;
int delay1 = 0, delay2 = 0, i;
@@ -1933,12 +1945,8 @@
outw(0, io + GPIO_DATA);
outw(dir | GPO_PRIMARY_AC97, io + GPIO_DIRECTION);
- if (busywait) {
- mdelay(delay1);
- } else {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((delay1 * HZ) / 1000);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((delay1 * HZ) / 1000);
outw(GPO_PRIMARY_AC97, io + GPIO_DATA);
udelay(5);
@@ -1946,12 +1954,9 @@
outw(IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE, io + RING_BUS_CTRL_A);
outw(~0, io + GPIO_MASK);
- if (busywait) {
- mdelay(delay2);
- } else {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((delay2 * HZ) / 1000);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((delay2 * HZ) / 1000);
+
if (! snd_m3_try_read_vendor(chip))
break;
@@ -1968,9 +1973,9 @@
*/
tmp = inw(io + RING_BUS_CTRL_A);
outw(RAC_SDFS_ENABLE|LAC_SDFS_ENABLE, io + RING_BUS_CTRL_A);
- mdelay(20);
+ big_mdelay(20);
outw(tmp, io + RING_BUS_CTRL_A);
- mdelay(50);
+ big_mdelay(50);
#endif
}
@@ -2298,8 +2303,15 @@
{
struct pci_dev *pcidev = chip->pci;
u32 n;
+ u16 w;
u8 t; /* makes as much sense as 'n', no? */
+ pci_read_config_word(pcidev, PCI_LEGACY_AUDIO_CTRL, &w);
+ w &= ~(SOUND_BLASTER_ENABLE|FM_SYNTHESIS_ENABLE|
+ MPU401_IO_ENABLE|MPU401_IRQ_ENABLE|ALIAS_10BIT_IO|
+ DISABLE_LEGACY);
+ pci_write_config_word(pcidev, PCI_LEGACY_AUDIO_CTRL, w);
+
pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n);
n &= REDUCED_DEBOUNCE;
n |= PM_CTRL_ENABLE | CLK_DIV_BY_49 | USE_PCI_TIMING;
@@ -2337,7 +2349,7 @@
{
unsigned long io = chip->iobase;
- outw(ASSP_INT_ENABLE, io + HOST_INT_CTRL);
+ outw(ASSP_INT_ENABLE | MPU401_INT_ENABLE, io + HOST_INT_CTRL);
outb(inb(io + ASSP_CONTROL_C) | ASSP_HOST_INT_ENABLE,
io + ASSP_CONTROL_C);
}
@@ -2363,6 +2375,10 @@
spin_unlock_irqrestore(&chip->reg_lock, flags);
kfree(chip->substreams);
}
+ if (chip->iobase_res) {
+ snd_m3_outw(chip, HOST_INT_CTRL, 0); /* disable ints */
+ }
+
#ifdef CONFIG_PM
if (chip->suspend_mem)
vfree(chip->suspend_mem);
@@ -2400,7 +2416,7 @@
snd_pcm_suspend_all(chip->pcm);
- mdelay(10); /* give the assp a chance to idle.. */
+ big_mdelay(10); /* give the assp a chance to idle.. */
snd_m3_assp_halt(chip);
@@ -2435,7 +2451,7 @@
snd_m3_chip_init(chip);
snd_m3_assp_halt(chip);
- snd_m3_ac97_reset(chip, 1);
+ snd_m3_ac97_reset(chip);
/* restore dsp image */
index = 0;
@@ -2460,7 +2476,6 @@
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
-#ifndef PCI_OLD_SUSPEND
static int snd_m3_suspend(struct pci_dev *pci, u32 state)
{
m3_t *chip = snd_magic_cast(m3_t, pci_get_drvdata(pci), return -ENXIO);
@@ -2473,18 +2488,6 @@
m3_resume(chip);
return 0;
}
-#else
-static void snd_m3_suspend(struct pci_dev *pci)
-{
- m3_t *chip = snd_magic_cast(m3_t, pci_get_drvdata(pci), return);
- m3_suspend(chip);
-}
-static void snd_m3_resume(struct pci_dev *pci)
-{
- m3_t *chip = snd_magic_cast(m3_t, pci_get_drvdata(pci), return);
- m3_resume(chip);
-}
-#endif
/* callback */
static int snd_m3_set_power_state(snd_card_t *card, unsigned int power_state)
@@ -2606,7 +2609,7 @@
snd_m3_chip_init(chip);
snd_m3_assp_halt(chip);
- snd_m3_ac97_reset(chip, 0);
+ snd_m3_ac97_reset(chip);
snd_m3_assp_init(chip);
snd_m3_amp_enable(chip, 1);
@@ -2716,6 +2719,15 @@
snd_card_free(card);
return err;
}
+
+#if 0 /* TODO: not supported yet */
+ /* TODO enable midi irq and i/o */
+ err = snd_mpu401_uart_new(chip->card, 0, MPU401_HW_MPU401,
+ chip->iobase + MPU401_DATA_PORT, 1,
+ chip->irq, 0, &chip->rmidi);
+ if (err < 0)
+ printk(KERN_WARNING "maestro3: no midi support.\n");
+#endif
pci_set_drvdata(pci, chip);
dev++;
diff -Nru a/sound/pci/nm256/nm256.c b/sound/pci/nm256/nm256.c
--- a/sound/pci/nm256/nm256.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/nm256/nm256.c Sun Aug 3 13:14:52 2003
@@ -276,7 +276,7 @@
#endif
-static struct pci_device_id snd_nm256_ids[] __devinitdata = {
+static struct pci_device_id snd_nm256_ids[] = {
{PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0,},
@@ -1307,7 +1307,6 @@
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
-#ifndef PCI_OLD_SUSPEND
static int snd_nm256_suspend(struct pci_dev *dev, u32 state)
{
nm256_t *chip = snd_magic_cast(nm256_t, pci_get_drvdata(dev), return -ENXIO);
@@ -1320,18 +1319,6 @@
nm256_resume(chip);
return 0;
}
-#else
-static void snd_nm256_suspend(struct pci_dev *dev)
-{
- nm256_t *chip = snd_magic_cast(nm256_t, pci_get_drvdata(dev), return);
- nm256_suspend(chip);
-}
-static void snd_nm256_resume(struct pci_dev *dev)
-{
- nm256_t *chip = snd_magic_cast(nm256_t, pci_get_drvdata(dev), return);
- nm256_resume(chip);
-}
-#endif
/* callback */
static int snd_nm256_set_power_state(snd_card_t *card, unsigned int power_state)
diff -Nru a/sound/pci/rme32.c b/sound/pci/rme32.c
--- a/sound/pci/rme32.c Sun Aug 3 13:14:53 2003
+++ b/sound/pci/rme32.c Sun Aug 3 13:14:53 2003
@@ -223,7 +223,7 @@
snd_kcontrol_t *spdif_ctl;
} rme32_t;
-static struct pci_device_id snd_rme32_ids[] __devinitdata = {
+static struct pci_device_id snd_rme32_ids[] = {
{PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
{PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_8,
diff -Nru a/sound/pci/rme96.c b/sound/pci/rme96.c
--- a/sound/pci/rme96.c Sun Aug 3 13:14:47 2003
+++ b/sound/pci/rme96.c Sun Aug 3 13:14:47 2003
@@ -260,7 +260,7 @@
snd_kcontrol_t *spdif_ctl;
} rme96_t;
-static struct pci_device_id snd_rme96_ids[] __devinitdata = {
+static struct pci_device_id snd_rme96_ids[] = {
{ PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_DIGI96,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
{ PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_DIGI96_8,
@@ -806,10 +806,12 @@
{
switch (mode) {
case RME96_CLOCKMODE_SLAVE:
+ /* AutoSync */
rme96->wcreg &= ~RME96_WCR_MASTER;
rme96->areg &= ~RME96_AR_WSEL;
break;
case RME96_CLOCKMODE_MASTER:
+ /* Internal */
rme96->wcreg |= RME96_WCR_MASTER;
rme96->areg &= ~RME96_AR_WSEL;
break;
@@ -1318,7 +1320,7 @@
snd_pcm_set_sync(substream);
runtime->hw = snd_rme96_capture_adat_info;
- if (snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG) {
+ if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
/* makes no sense to use analog input. Note that analog
expension cards AEB4/8-I are RME96_INPUT_INTERNAL */
return -EIO;
@@ -1862,15 +1864,15 @@
snd_iprintf(buffer, " sample format: 16 bit\n");
}
if (rme96->areg & RME96_AR_WSEL) {
- snd_iprintf(buffer, " clock mode: word clock\n");
+ snd_iprintf(buffer, " sample clock source: word clock\n");
} else if (rme96->wcreg & RME96_WCR_MASTER) {
- snd_iprintf(buffer, " clock mode: master\n");
+ snd_iprintf(buffer, " sample clock source: internal\n");
} else if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
- snd_iprintf(buffer, " clock mode: slave (master anyway due to analog input setting)\n");
+ snd_iprintf(buffer, " sample clock source: autosync (internal anyway due to analog input setting)\n");
} else if (snd_rme96_capture_getrate(rme96, &n) < 0) {
- snd_iprintf(buffer, " clock mode: slave (master anyway due to no valid signal)\n");
+ snd_iprintf(buffer, " sample clock source: autosync (internal anyway due to no valid signal)\n");
} else {
- snd_iprintf(buffer, " clock mode: slave\n");
+ snd_iprintf(buffer, " sample clock source: autosync\n");
}
if (rme96->wcreg & RME96_WCR_PRO) {
snd_iprintf(buffer, " format: AES/EBU (professional)\n");
@@ -2095,7 +2097,7 @@
static int
snd_rme96_info_clockmode_control(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
{
- static char *texts[3] = { "Slave", "Master", "Wordclock" };
+ static char *texts[3] = { "AutoSync", "Internal", "Word" };
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
@@ -2418,7 +2420,7 @@
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
- .name = "Clock Mode",
+ .name = "Sample Clock Source",
.info = snd_rme96_info_clockmode_control,
.get = snd_rme96_get_clockmode_control,
.put = snd_rme96_put_clockmode_control
diff -Nru a/sound/pci/rme9652/Makefile b/sound/pci/rme9652/Makefile
--- a/sound/pci/rme9652/Makefile Sun Aug 3 13:14:49 2003
+++ b/sound/pci/rme9652/Makefile Sun Aug 3 13:14:49 2003
@@ -3,10 +3,9 @@
# Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz>
#
-snd-hammerfall-mem-objs := hammerfall_mem.o
snd-rme9652-objs := rme9652.o
snd-hdsp-objs := hdsp.o
# Toplevel Module Dependency
-obj-$(CONFIG_SND_RME9652) += snd-rme9652.o snd-hammerfall-mem.o
-obj-$(CONFIG_SND_HDSP) += snd-hdsp.o snd-hammerfall-mem.o
+obj-$(CONFIG_SND_RME9652) += snd-rme9652.o
+obj-$(CONFIG_SND_HDSP) += snd-hdsp.o
diff -Nru a/sound/pci/rme9652/hammerfall_mem.c b/sound/pci/rme9652/hammerfall_mem.c
--- a/sound/pci/rme9652/hammerfall_mem.c Sun Aug 3 13:14:45 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,251 +0,0 @@
-/*
- ALSA memory allocation module for the RME Digi9652
-
- Copyright(c) 1999 IEM - Winfried Ritsch
- Copyright (C) 1999 Paul Barton-Davis
-
- This module is only needed if you compiled the hammerfall driver with
- the PREALLOCATE_MEMORY option. It allocates the memory need to
- run the board and holds it until the module is unloaded. Because
- we need 2 contiguous 1.6MB regions for the board, it can be
- a problem getting them once the system memory has become fairly
- fragmented.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
- $Id: hammerfall_mem.c,v 1.9 2003/05/31 11:33:57 perex Exp $
-
-
- Tue Oct 17 2000 Jaroslav Kysela <perex@suse.cz>
- * space is allocated only for physical devices
- * added support for 2.4 kernels (pci_alloc_consistent)
-
-*/
-
-#include <linux/version.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <sound/initval.h>
-
-#define HAMMERFALL_CARDS 8
-#define HAMMERFALL_CHANNEL_BUFFER_SAMPLES (16*1024)
-#define HAMMERFALL_CHANNEL_BUFFER_BYTES (4*HAMMERFALL_CHANNEL_BUFFER_SAMPLES)
-
-/* export */
-
-static int enable[8] = {1,1,1,1,1,1,1,1};
-MODULE_PARM(enable, "1-" __MODULE_STRING(HAMMERFALL_CARDS) "i");
-MODULE_PARM_DESC(enable, "Enable cards to allocate buffers for.");
-
-MODULE_AUTHOR("Winfried Ritsch, Paul Barton-Davis <pbd@op.net>");
-MODULE_DESCRIPTION("Memory allocator for RME Hammerfall");
-MODULE_CLASSES("{sound}");
-MODULE_LICENSE("GPL");
-
-/* Since we don't know at this point if we're allocating memory for a
- Hammerfall or a Hammerfall/Light, assume the worst and allocate
- space for the maximum number of channels.
-
- The extra channel is allocated because we need a 64kB-aligned
- buffer in the actual interface driver code (see rme9652.c or hdsp.c
- for details)
-*/
-
-#define TOTAL_SIZE (26+1)*(HAMMERFALL_CHANNEL_BUFFER_BYTES)
-#define NBUFS 2*HAMMERFALL_CARDS
-
-#define HAMMERFALL_BUF_ALLOCATED 0x1
-#define HAMMERFALL_BUF_USED 0x2
-
-typedef struct hammerfall_buf_stru hammerfall_buf_t;
-
-struct hammerfall_buf_stru {
- struct pci_dev *pci;
- void *buf;
- dma_addr_t addr;
- char flags;
-};
-
-static hammerfall_buf_t hammerfall_buffers[NBUFS];
-
-/* These are here so that we have absolutely no dependencies
- on any other modules. Dependencies can (1) cause us to
- lose in the rush for 2x1.6MB chunks of contiguous memory
- and (2) make driver debugging difficult because unloading
- and reloading the snd module causes us to have to do the
- same for this one. Since we can rarely if ever allocate
- memory after starting things running, that would be very
- undesirable.
-*/
-
-static void *hammerfall_malloc_pages(struct pci_dev *pci,
- unsigned long size,
- dma_addr_t *dmaaddr)
-{
- void *res;
-
- res = (void *) pci_alloc_consistent(pci, size, dmaaddr);
- if (res != NULL) {
- struct page *page = virt_to_page(res);
- struct page *last_page = page + (size + PAGE_SIZE - 1) / PAGE_SIZE;
- while (page < last_page)
- set_bit(PG_reserved, &(page++)->flags);
- }
- return res;
-}
-
-static void hammerfall_free_pages(struct pci_dev *pci, unsigned long size,
- void *ptr, dma_addr_t dmaaddr)
-{
- struct page *page, *last_page;
-
- if (ptr == NULL)
- return;
- page = virt_to_page(ptr);
- last_page = virt_to_page(ptr) + (size + PAGE_SIZE - 1) / PAGE_SIZE;
- while (page < last_page)
- clear_bit(PG_reserved, &(page++)->flags);
- pci_free_consistent(pci, size, ptr, dmaaddr);
-}
-
-void *snd_hammerfall_get_buffer (struct pci_dev *pcidev, dma_addr_t *dmaaddr)
-{
- int i;
- hammerfall_buf_t *rbuf;
-
- for (i = 0; i < NBUFS; i++) {
- rbuf = &hammerfall_buffers[i];
- if (rbuf->flags == HAMMERFALL_BUF_ALLOCATED) {
- rbuf->flags |= HAMMERFALL_BUF_USED;
- rbuf->pci = pcidev;
- *dmaaddr = rbuf->addr;
- return rbuf->buf;
- }
- }
-
- return NULL;
-}
-
-void snd_hammerfall_free_buffer (struct pci_dev *pcidev, void *addr)
-{
- int i;
- hammerfall_buf_t *rbuf;
-
- for (i = 0; i < NBUFS; i++) {
- rbuf = &hammerfall_buffers[i];
- if (rbuf->buf == addr && rbuf->pci == pcidev) {
- rbuf->flags &= ~HAMMERFALL_BUF_USED;
- return;
- }
- }
-
- printk ("Hammerfall memory allocator: unknown buffer address or PCI device ID");
-}
-
-static void hammerfall_free_buffers (void)
-
-{
- int i;
- hammerfall_buf_t *rbuf;
-
- for (i = 0; i < NBUFS; i++) {
-
- /* We rely on general module code to prevent
- us from being unloaded with buffers in use.
-
- However, not quite. Do not release memory
- if it is still marked as in use. This might
- be unnecessary.
- */
-
- rbuf = &hammerfall_buffers[i];
-
- if (rbuf->flags == HAMMERFALL_BUF_ALLOCATED) {
- hammerfall_free_pages (rbuf->pci, TOTAL_SIZE, rbuf->buf, rbuf->addr);
- rbuf->buf = NULL;
- rbuf->flags = 0;
- }
- }
-}
-
-static int __init alsa_hammerfall_mem_init(void)
-{
- int i;
- struct pci_dev *pci = NULL;
- hammerfall_buf_t *rbuf;
-
- /* make sure our buffer records are clean */
-
- for (i = 0; i < NBUFS; i++) {
- rbuf = &hammerfall_buffers[i];
- rbuf->pci = NULL;
- rbuf->buf = NULL;
- rbuf->flags = 0;
- }
-
- /* ensure sane values for the number of buffers */
-
- /* Remember: 2 buffers per card, one for capture, one for
- playback.
- */
-
- i = 0; /* card number */
- rbuf = hammerfall_buffers;
- while ((pci = pci_find_device(PCI_VENDOR_ID_XILINX, PCI_ANY_ID, pci)) != NULL) {
- int k;
-
- /* check for Hammerfall and Hammerfall DSP cards */
-
- if (pci->device != 0x3fc4 && pci->device != 0x3fc5)
- continue;
-
- if (!enable[i])
- continue;
-
- for (k = 0; k < 2; ++k) {
- rbuf->buf = hammerfall_malloc_pages(pci, TOTAL_SIZE, &rbuf->addr);
- if (rbuf->buf == NULL) {
- hammerfall_free_buffers();
- printk(KERN_ERR "Hammerfall memory allocator: no memory available for card %d buffer %d\n", i, k + 1);
- return -ENOMEM;
- }
- rbuf->flags = HAMMERFALL_BUF_ALLOCATED;
- rbuf++;
- }
- i++;
- }
-
- if (i == 0)
- printk(KERN_ERR "Hammerfall memory allocator: "
- "no Hammerfall cards found...\n");
- else
- printk(KERN_ERR "Hammerfall memory allocator: "
- "buffers allocated for %d cards\n", i);
-
- return 0;
-}
-
-static void __exit alsa_hammerfall_mem_exit(void)
-{
- hammerfall_free_buffers();
-}
-
-module_init(alsa_hammerfall_mem_init)
-module_exit(alsa_hammerfall_mem_exit)
-
-EXPORT_SYMBOL(snd_hammerfall_get_buffer);
-EXPORT_SYMBOL(snd_hammerfall_free_buffer);
diff -Nru a/sound/pci/rme9652/hdsp.c b/sound/pci/rme9652/hdsp.c
--- a/sound/pci/rme9652/hdsp.c Sun Aug 3 13:14:47 2003
+++ b/sound/pci/rme9652/hdsp.c Sun Aug 3 13:14:47 2003
@@ -22,6 +22,7 @@
*/
#include <sound/driver.h>
+#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
@@ -75,6 +76,8 @@
#define DIGIFACE_DS_CHANNELS 14
#define MULTIFACE_SS_CHANNELS 18
#define MULTIFACE_DS_CHANNELS 14
+#define H9652_SS_CHANNELS 26
+#define H9652_DS_CHANNELS 14
/* Write registers. These are defined as byte-offsets from the iobase value.
*/
@@ -84,7 +87,7 @@
#define HDSP_controlRegister 64
#define HDSP_interruptConfirmation 96
#define HDSP_outputEnable 128
-#define HDSP_jtagReg 256
+#define HDSP_control2Reg 256
#define HDSP_midiDataOut0 352
#define HDSP_midiDataOut1 356
#define HDSP_fifoData 368
@@ -120,7 +123,7 @@
#define HDSP_IO_EXTENT 5192
-/* jtag register bits */
+/* control2 register bits */
#define HDSP_TMS 0x01
#define HDSP_TCK 0x02
@@ -133,6 +136,7 @@
#define HDSP_VERSION_BIT 0x100
#define HDSP_BIGENDIAN_MODE 0x200
#define HDSP_RD_MULTIPLE 0x400
+#define HDSP_9652_ENABLE_MIXER 0x800
#define HDSP_S_PROGRAM (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
#define HDSP_S_LOAD (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
@@ -358,15 +362,16 @@
hdsp_midi_t midi[2];
struct tasklet_struct midi_tasklet;
int precise_ptr;
- u32 control_register; /* cached value */
+ u32 control_register; /* cached value */
+ u32 control2_register; /* cached value */
u32 creg_spdif;
u32 creg_spdif_stream;
- char *card_name; /* digiface/multiface */
+ char *card_name; /* digiface/multiface */
HDSP_IO_Type io_type; /* ditto, but for code use */
unsigned short firmware_rev;
unsigned short state; /* stores state bits */
u32 firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
- size_t period_bytes; /* guess what this is */
+ size_t period_bytes; /* guess what this is */
unsigned char ds_channels;
unsigned char ss_channels; /* different for multiface/digiface */
void *capture_buffer_unaligned; /* original buffer addresses */
@@ -433,11 +438,42 @@
#define HDSP_PREALLOCATE_MEMORY /* via module snd-hdsp_mem */
#ifdef HDSP_PREALLOCATE_MEMORY
-extern void *snd_hammerfall_get_buffer(struct pci_dev *, dma_addr_t *dmaaddr);
-extern void snd_hammerfall_free_buffer(struct pci_dev *, void *ptr);
+static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
+{
+ struct snd_dma_device pdev;
+ struct snd_dma_buffer dmbuf;
+
+ snd_dma_device_pci(&pdev, pci, capture);
+ dmbuf.bytes = 0;
+ if (! snd_dma_get_reserved(&pdev, &dmbuf)) {
+ if (snd_dma_alloc_pages(&pdev, size, &dmbuf) < 0)
+ return NULL;
+ snd_dma_set_reserved(&pdev, &dmbuf);
+ }
+ *addrp = dmbuf.addr;
+ return dmbuf.area;
+}
+
+static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
+{
+ struct snd_dma_device dev;
+ snd_dma_device_pci(&dev, pci, capture);
+ snd_dma_free_reserved(&dev);
+}
+
+#else
+static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
+{
+ return snd_malloc_pci_pages(pci, size, addrp);
+}
+
+static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
+{
+ snd_free_pci_pages(pci, size, ptr, addr);
+}
#endif
-static struct pci_device_id snd_hdsp_ids[] __devinitdata = {
+static struct pci_device_id snd_hdsp_ids[] = {
{
.vendor = PCI_VENDOR_ID_XILINX,
.device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
@@ -452,7 +488,7 @@
/* prototypes */
static int __devinit snd_hdsp_create_alsa_devices(snd_card_t *card, hdsp_t *hdsp);
static int __devinit snd_hdsp_create_pcm(snd_card_t *card, hdsp_t *hdsp);
-static inline int snd_hdsp_initialize_input_enable (hdsp_t *hdsp);
+static inline int snd_hdsp_enable_io (hdsp_t *hdsp);
static inline void snd_hdsp_initialize_midi_flush (hdsp_t *hdsp);
static inline void snd_hdsp_initialize_channels (hdsp_t *hdsp);
static inline int hdsp_fifo_wait(hdsp_t *hdsp, int count, int timeout);
@@ -460,18 +496,6 @@
static int hdsp_autosync_ref(hdsp_t *hdsp);
static int snd_hdsp_set_defaults(hdsp_t *hdsp);
-static inline int hdsp_is_9652 (hdsp_t *hdsp)
-{
- switch (hdsp->firmware_rev) {
- case 0x64:
- case 0x65:
- case 0x68:
- return 1;
- default:
- return 0;
- }
-}
-
static inline int hdsp_playback_to_output_key (hdsp_t *hdsp, int in, int out)
{
switch (hdsp->firmware_rev) {
@@ -504,12 +528,15 @@
static inline int hdsp_check_for_iobox (hdsp_t *hdsp)
{
+
+ if (hdsp->io_type == H9652) return 0;
if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
hdsp->state &= ~HDSP_FirmwareLoaded;
return -EIO;
}
return 0;
+
}
static int snd_hdsp_load_firmware_from_cache(hdsp_t *hdsp) {
@@ -521,7 +548,7 @@
snd_printk ("loading firmware\n");
- hdsp_write (hdsp, HDSP_jtagReg, HDSP_S_PROGRAM);
+ hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
hdsp_write (hdsp, HDSP_fifoData, 0);
if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
@@ -529,7 +556,7 @@
return -EIO;
}
- hdsp_write (hdsp, HDSP_jtagReg, HDSP_S_LOAD);
+ hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
for (i = 0; i < 24413; ++i) {
hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
@@ -544,7 +571,12 @@
return -EIO;
}
- hdsp_write (hdsp, HDSP_jtagReg, 0);
+#ifdef SNDRV_BIG_ENDIAN
+ hdsp->control2_register = HDSP_BIGENDIAN_MODE;
+#else
+ hdsp->control2_register = 0;
+#endif
+ hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
snd_printk ("finished firmware loading\n");
if ((1000 / HZ) < 3000) {
@@ -574,25 +606,25 @@
return -EIO;
}
- if ((err = snd_hdsp_initialize_input_enable(hdsp)) < 0) {
+ if ((err = snd_hdsp_enable_io(hdsp)) < 0) {
return err;
}
if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
- hdsp_write (hdsp, HDSP_jtagReg, HDSP_PROGRAM);
+ hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
hdsp_write (hdsp, HDSP_fifoData, 0);
if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0) {
return -EIO;
}
- hdsp_write (hdsp, HDSP_jtagReg, HDSP_S_LOAD);
+ hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write (hdsp, HDSP_fifoData, 0);
if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
hdsp->io_type = Multiface;
- hdsp_write (hdsp, HDSP_jtagReg, HDSP_VERSION_BIT);
- hdsp_write (hdsp, HDSP_jtagReg, HDSP_S_LOAD);
+ hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
+ hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
} else {
hdsp->io_type = Digiface;
@@ -611,6 +643,7 @@
static inline int hdsp_check_for_firmware (hdsp_t *hdsp)
{
+ if (hdsp->io_type == H9652) return 0;
if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
snd_printk("firmware not present.\n");
hdsp->state &= ~HDSP_FirmwareLoaded;
@@ -657,36 +690,41 @@
{
unsigned int ad;
- if (hdsp_is_9652 (hdsp)) {
+ if (addr >= HDSP_MATRIX_MIXER_SIZE)
+ return -1;
+
+ if (hdsp->io_type == H9652) {
- if ((ad = addr/2) < 676) {
+ /* from martin björnsen:
+
+ "You can only write dwords to the
+ mixer memory which contain two
+ mixer values in the low and high
+ word. So if you want to change
+ value 0 you have to read value 1
+ from the cache and write both to
+ the first dword in the mixer
+ memory."
+ */
- /* from martin björnsen:
+ hdsp->mixer_matrix[addr] = data;
- "You can only write dwords to the
- mixer memory which contain two
- mixer values in the low and high
- word. So if you want to change
- value 0 you have to read value 1
- from the cache and write both to
- the first dword in the mixer
- memory."
- */
-
- hdsp->mixer_matrix[addr] = data;
- hdsp_write (hdsp, 1024 + ad,
- (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
- hdsp->mixer_matrix[addr&0x7fe]);
- return 0;
- } else {
- return -1;
- }
+ /* `addr' addresses a 16-bit wide address, but
+ the address space accessed via hdsp_write
+ uses byte offsets. put another way, addr
+ varies from 0 to 1351, but to access the
+ corresponding memory location, we need
+ to access 0 to 2703 ...
+ */
+
+ hdsp_write (hdsp, 4096 + (addr*2),
+ (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
+ hdsp->mixer_matrix[addr&0x7fe]);
+ return 0;
} else {
- if (addr >= HDSP_MATRIX_MIXER_SIZE)
- return -1;
-
+
ad = (addr << 16) + data;
if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT)) {
@@ -829,6 +867,11 @@
int current_rate;
int rate_bits;
+ /* ASSUMPTION: hdsp->lock is either help, or
+ there is no need for it (e.g. during module
+ initialization).
+ */
+
if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
if (called_internally) {
/* request from ctl or card initialization */
@@ -860,8 +903,6 @@
exists for externally-driven rate changes. All we can do
is to flag rate changes in the read/write routines. */
- spin_lock_irq(&hdsp->lock);
-
switch (rate) {
case 32000:
if (current_rate > 48000) {
@@ -900,7 +941,6 @@
rate_bits = HDSP_Frequency96KHz;
break;
default:
- spin_unlock_irq(&hdsp->lock);
return -EINVAL;
}
@@ -908,7 +948,6 @@
snd_printk ("cannot change between single- and double-speed mode (capture PID = %d, playback PID = %d)\n",
hdsp->capture_pid,
hdsp->playback_pid);
- spin_unlock_irq(&hdsp->lock);
return -EBUSY;
}
@@ -924,6 +963,7 @@
hdsp->channel_map = channel_map_mf_ss;
break;
case Digiface:
+ case H9652:
hdsp->channel_map = channel_map_df_ss;
break;
default:
@@ -938,7 +978,6 @@
hdsp_update_simple_mixer_controls (hdsp);
}
- spin_unlock_irq(&hdsp->lock);
return 0;
}
@@ -1131,21 +1170,19 @@
hdsp_t *hdsp;
hdsp_midi_t *hmidi;
unsigned long flags;
+ u32 ie;
hmidi = (hdsp_midi_t *) substream->rmidi->private_data;
hdsp = hmidi->hdsp;
+ ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
spin_lock_irqsave (&hdsp->lock, flags);
if (up) {
- snd_hdsp_flush_midi_input (hdsp, hmidi->id);
- if (hmidi->id)
- hdsp->control_register |= HDSP_Midi1InterruptEnable;
- else
- hdsp->control_register |= HDSP_Midi0InterruptEnable;
+ if (!(hdsp->control_register & ie)) {
+ snd_hdsp_flush_midi_input (hdsp, hmidi->id);
+ hdsp->control_register |= ie;
+ }
} else {
- if (hmidi->id)
- hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
- else
- hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
+ hdsp->control_register &= ~ie;
}
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
@@ -2004,7 +2041,19 @@
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
- uinfo->value.enumerated.items = (hdsp->io_type == Digiface) ? 6 : 4;
+
+ switch (hdsp->io_type) {
+ case Digiface:
+ case H9652:
+ uinfo->value.enumerated.items = 6;
+ break;
+ case Multiface:
+ uinfo->value.enumerated.items = 4;
+ default:
+ uinfo->value.enumerated.items = 0;
+ break;
+ }
+
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
@@ -2028,7 +2077,19 @@
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
- max = (hdsp->io_type == Digiface) ? 6 : 4;
+
+ switch (hdsp->io_type) {
+ case Digiface:
+ case H9652:
+ max = 6;
+ break;
+ case Multiface:
+ max = 4;
+ break;
+ default:
+ return -EIO;
+ }
+
val = ucontrol->value.enumerated.item[0] % max;
spin_lock_irqsave(&hdsp->lock, flags);
change = (int)val != hdsp_pref_sync_ref(hdsp);
@@ -2496,7 +2557,22 @@
hdsp_t *hdsp = _snd_kcontrol_chip(kcontrol);
offset = ucontrol->id.index - 1;
- snd_assert(offset >= 0 || offset < ((hdsp->io_type == Digiface) ? 3 : 1), return -EINVAL);
+ snd_assert(offset >= 0);
+
+ switch (hdsp->io_type) {
+ case Digiface:
+ case H9652:
+ if (offset >= 3)
+ return -EINVAL;
+ break;
+ case Multiface:
+ if (offset >= 1)
+ return -EINVAL;
+ break;
+ default:
+ return -EIO;
+ }
+
ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
return 0;
}
@@ -2593,8 +2669,9 @@
snd_kcontrol_t *kctl;
for (idx = 0; idx < HDSP_CONTROLS; idx++) {
- if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
+ if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0) {
return err;
+ }
if (idx == 1) /* IEC958 (S/PDIF) Stream */
hdsp->spdif_ctl = kctl;
}
@@ -2602,10 +2679,18 @@
snd_hdsp_playback_mixer.name = "Chn";
snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
- if (hdsp->io_type == Digiface) {
+ switch (hdsp->io_type) {
+ case Digiface:
limit = DIGIFACE_SS_CHANNELS;
- } else {
+ break;
+ case H9652:
+ limit = H9652_SS_CHANNELS;
+ break;
+ case Multiface:
limit = MULTIFACE_SS_CHANNELS;
+ break;
+ default:
+ return -EIO;
}
/* The index values are one greater than the channel ID so that alsamixer
@@ -2627,7 +2712,7 @@
if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp)))) {
return err;
}
- if (hdsp->io_type == Digiface) {
+ if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
for (idx = 1; idx < 3; ++idx) {
snd_hdsp_adat_sync_check.index = idx+1;
if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp)))) {
@@ -2681,6 +2766,7 @@
snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
hdsp->irq, hdsp->port, hdsp->iobase);
snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
+ snd_iprintf(buffer, "Control2 register: 0x%x\n", hdsp->control2_register);
snd_iprintf(buffer, "Status register: 0x%x\n", status);
snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
@@ -2854,6 +2940,7 @@
switch (hdsp->io_type) {
case Digiface:
+ case H9652:
x = status & HDSP_Sync1;
if (status & HDSP_Lock1) {
snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
@@ -2913,25 +3000,15 @@
static void snd_hdsp_free_buffers(hdsp_t *hdsp)
{
if (hdsp->capture_buffer_unaligned) {
-#ifndef HDSP_PREALLOCATE_MEMORY
- snd_free_pci_pages(hdsp->pci,
- HDSP_DMA_AREA_BYTES,
- hdsp->capture_buffer_unaligned,
- hdsp->capture_buffer_addr);
-#else
- snd_hammerfall_free_buffer(hdsp->pci, hdsp->capture_buffer_unaligned);
-#endif
+ snd_hammerfall_free_buffer(hdsp->pci, HDSP_DMA_AREA_BYTES,
+ hdsp->capture_buffer_unaligned,
+ hdsp->capture_buffer_addr, 1);
}
if (hdsp->playback_buffer_unaligned) {
-#ifndef HDSP_PREALLOCATE_MEMORY
- snd_free_pci_pages(hdsp->pci,
- HDSP_DMA_AREA_BYTES,
- hdsp->playback_buffer_unaligned,
- hdsp->playback_buffer_addr);
-#else
- snd_hammerfall_free_buffer(hdsp->pci, hdsp->playback_buffer_unaligned);
-#endif
+ snd_hammerfall_free_buffer(hdsp->pci, HDSP_DMA_AREA_BYTES,
+ hdsp->playback_buffer_unaligned,
+ hdsp->playback_buffer_addr, 0);
}
}
@@ -2941,28 +3018,15 @@
dma_addr_t pb_addr, cb_addr;
unsigned long pb_bus, cb_bus;
-#ifndef HDSP_PREALLOCATE_MEMORY
- cb = snd_malloc_pci_pages(hdsp->pci, HDSP_DMA_AREA_BYTES, &cb_addr);
- pb = snd_malloc_pci_pages(hdsp->pci, HDSP_DMA_AREA_BYTES, &pb_addr);
-#else
- cb = snd_hammerfall_get_buffer(hdsp->pci, &cb_addr);
- pb = snd_hammerfall_get_buffer(hdsp->pci, &pb_addr);
-#endif
+ cb = snd_hammerfall_get_buffer(hdsp->pci, HDSP_DMA_AREA_BYTES, &cb_addr, 1);
+ pb = snd_hammerfall_get_buffer(hdsp->pci, HDSP_DMA_AREA_BYTES, &pb_addr, 0);
if (cb == 0 || pb == 0) {
if (cb) {
-#ifdef HDSP_PREALLOCATE_MEMORY
- snd_hammerfall_free_buffer(hdsp->pci, cb);
-#else
- snd_free_pci_pages(hdsp->pci, HDSP_DMA_AREA_BYTES, cb, cb_addr);
-#endif
+ snd_hammerfall_free_buffer(hdsp->pci, HDSP_DMA_AREA_BYTES, cb, cb_addr, 1);
}
if (pb) {
-#ifdef HDSP_PREALLOCATE_MEMORY
- snd_hammerfall_free_buffer(hdsp->pci, pb);
-#else
- snd_free_pci_pages(hdsp->pci, HDSP_DMA_AREA_BYTES, pb, pb_addr);
-#endif
+ snd_hammerfall_free_buffer(hdsp->pci, HDSP_DMA_AREA_BYTES, pb, pb_addr, 0);
}
printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
@@ -3025,13 +3089,13 @@
hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
}
- for (i = 0; i < (hdsp_is_9652(hdsp) ? 1352 : HDSP_MATRIX_MIXER_SIZE); i++) {
+ for (i = 0; i < (hdsp->io_type == H9652 ? 1352 : HDSP_MATRIX_MIXER_SIZE); i++) {
if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN)) {
return -EIO;
}
}
- if (!hdsp_is_9652(hdsp) && line_outs_monitor[hdsp->dev]) {
+ if ((hdsp->io_type != H9652) && line_outs_monitor[hdsp->dev]) {
snd_printk ("sending all inputs and playback streams to line outs.\n");
@@ -3291,9 +3355,13 @@
/* how to make sure that the rate matches an externally-set one ?
*/
+ spin_lock_irq(&hdsp->lock);
if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
+ spin_unlock_irq(&hdsp->lock);
_snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
return err;
+ } else {
+ spin_unlock_irq(&hdsp->lock);
}
if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
@@ -3731,6 +3799,10 @@
switch (cmd) {
case SNDRV_HDSP_IOCTL_GET_PEAK_RMS:
+ if (hdsp->io_type == H9652) {
+ snd_printk("hardware metering isn't supported yet for hdsp9652 cards\n");
+ return -EINVAL;
+ }
if (!(hdsp->state & HDSP_FirmwareLoaded)) {
snd_printk("firmware needs to be uploaded to the card.\n");
return -EINVAL;
@@ -3783,7 +3855,7 @@
return -EFAULT;
break;
case SNDRV_HDSP_IOCTL_GET_VERSION:
- if (hdsp_is_9652(hdsp)) return -EINVAL;
+ if (hdsp->io_type == H9652) return -EINVAL;
if (hdsp->io_type == Undefined) {
if ((err = hdsp_get_iobox_version(hdsp)) < 0) {
return err;
@@ -3796,7 +3868,7 @@
}
break;
case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE:
- if (hdsp_is_9652(hdsp)) return -EINVAL;
+ if (hdsp->io_type == H9652) return -EINVAL;
/* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
if (hdsp->io_type == Undefined) return -EINVAL;
@@ -3904,7 +3976,19 @@
return 0;
}
-static inline int snd_hdsp_initialize_input_enable (hdsp_t *hdsp)
+static inline void snd_hdsp_9652_enable_mixer (hdsp_t *hdsp)
+{
+ hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
+ hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
+}
+
+static inline void snd_hdsp_9652_disable_mixer (hdsp_t *hdsp)
+{
+ hdsp->control2_register &= ~HDSP_9652_ENABLE_MIXER;
+ hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
+}
+
+static inline int snd_hdsp_enable_io (hdsp_t *hdsp)
{
int i;
@@ -3922,14 +4006,27 @@
static inline void snd_hdsp_initialize_channels(hdsp_t *hdsp)
{
- if (hdsp->io_type == Digiface) {
+ switch (hdsp->io_type) {
+ case Digiface:
hdsp->card_name = "RME Hammerfall DSP + Digiface";
hdsp->ss_channels = DIGIFACE_SS_CHANNELS;
hdsp->ds_channels = DIGIFACE_DS_CHANNELS;
- } else {
+ break;
+
+ case H9652:
+ hdsp->card_name = "RME Hammerfall HDSP 9652";
+ hdsp->ss_channels = H9652_SS_CHANNELS;
+ hdsp->ds_channels = H9652_DS_CHANNELS;
+ break;
+
+ case Multiface:
hdsp->card_name = "RME Hammerfall DSP + Multiface";
hdsp->ss_channels = MULTIFACE_SS_CHANNELS;
hdsp->ds_channels = MULTIFACE_DS_CHANNELS;
+
+ default:
+ /* should never get here */
+ break;
}
}
@@ -3937,10 +4034,6 @@
{
snd_hdsp_flush_midi_input (hdsp, 0);
snd_hdsp_flush_midi_input (hdsp, 1);
-
-#ifdef SNDRV_BIG_ENDIAN
- hdsp_write(hdsp, HDSP_jtagReg, HDSP_BIGENDIAN_MODE);
-#endif
}
static int __devinit snd_hdsp_create_alsa_devices(snd_card_t *card, hdsp_t *hdsp)
@@ -4001,6 +4094,7 @@
struct pci_dev *pci = hdsp->pci;
int err;
int i;
+ int is_9652 = 0;
hdsp->irq = -1;
hdsp->state = 0;
@@ -4027,23 +4121,27 @@
pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
strcpy(card->driver, "H-DSP");
strcpy(card->mixername, "Xilinx FPGA");
-
+
switch (hdsp->firmware_rev & 0xff) {
case 0xa:
case 0xb:
hdsp->card_name = "RME Hammerfall DSP";
break;
+
case 0x64:
case 0x65:
case 0x68:
hdsp->card_name = "RME HDSP 9652";
+ is_9652 = 1;
break;
+
default:
return -ENODEV;
}
- if ((err = pci_enable_device(pci)) < 0)
+ if ((err = pci_enable_device(pci)) < 0) {
return err;
+ }
pci_set_master(hdsp->pci);
@@ -4071,70 +4169,53 @@
return err;
}
- if (hdsp_is_9652(hdsp)) {
-
- if ((err = snd_hdsp_initialize_input_enable(hdsp)) != 0) {
+ if (!is_9652 && hdsp_check_for_iobox (hdsp)) {
+ /* no iobox connected, we defer initialization */
+ snd_printk("card initialization pending : waiting for firmware\n");
+ if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) {
return err;
}
-
- hdsp->io_type = Digiface;
-
- hdsp->ss_channels = DIGIFACE_SS_CHANNELS;
- hdsp->ds_channels = DIGIFACE_DS_CHANNELS;
+ return 0;
+ }
- snd_hdsp_initialize_midi_flush(hdsp);
+ if ((err = snd_hdsp_enable_io(hdsp)) != 0) {
+ return err;
+ }
+ if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
+ snd_printk("card initialization pending : waiting for firmware\n");
if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) {
return err;
}
-
- } else {
+ return 0;
+ }
- if (hdsp_check_for_iobox (hdsp)) {
- /* no iobox connected, we defer initialization */
- snd_printk("card initialization pending : waiting for firmware\n");
- if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) {
- return err;
- }
- return 0;
- }
+ snd_printk("Firmware already loaded, initializing card.\n");
+
+ if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1) {
+ hdsp->io_type = Multiface;
+ } else {
+ hdsp->io_type = Digiface;
+ }
- if ((err = snd_hdsp_initialize_input_enable(hdsp)) != 0) {
- return err;
- }
-
- if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
- snd_printk("card initialization pending : waiting for firmware\n");
- if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) {
- return err;
- }
- return 0;
- }
-
- snd_printk("Firmware already loaded, initializing card.\n");
+ if (is_9652) {
+ hdsp->io_type = H9652;
+ snd_hdsp_9652_enable_mixer (hdsp);
+ }
- if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1) {
- hdsp->io_type = Multiface;
- } else {
- hdsp->io_type = Digiface;
- }
-
- if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) {
- return err;
- }
-
- snd_hdsp_initialize_channels(hdsp);
-
- snd_hdsp_initialize_midi_flush(hdsp);
-
+ if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) {
+ return err;
}
+ snd_hdsp_initialize_channels(hdsp);
+ snd_hdsp_initialize_midi_flush(hdsp);
+
hdsp->state |= HDSP_FirmwareLoaded;
-
+
if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0) {
return err;
}
-
+
return 0;
}
@@ -4201,7 +4282,7 @@
strcpy(card->shortname, "Hammerfall DSP");
sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
hdsp->port, hdsp->irq);
-
+
if ((err = snd_card_register(card)) < 0) {
snd_card_free(card);
return err;
diff -Nru a/sound/pci/rme9652/rme9652.c b/sound/pci/rme9652/rme9652.c
--- a/sound/pci/rme9652/rme9652.c Sun Aug 3 13:14:48 2003
+++ b/sound/pci/rme9652/rme9652.c Sun Aug 3 13:14:48 2003
@@ -309,11 +309,42 @@
#define RME9652_PREALLOCATE_MEMORY /* via module snd-hammerfall-mem */
#ifdef RME9652_PREALLOCATE_MEMORY
-extern void *snd_hammerfall_get_buffer(struct pci_dev *, dma_addr_t *dmaaddr);
-extern void snd_hammerfall_free_buffer(struct pci_dev *, void *ptr);
+static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
+{
+ struct snd_dma_device pdev;
+ struct snd_dma_buffer dmbuf;
+
+ snd_dma_device_pci(&pdev, pci, capture);
+ dmbuf.bytes = 0;
+ if (! snd_dma_get_reserved(&pdev, &dmbuf)) {
+ if (snd_dma_alloc_pages(&pdev, size, &dmbuf) < 0)
+ return NULL;
+ snd_dma_set_reserved(&pdev, &dmbuf);
+ }
+ *addrp = dmbuf.addr;
+ return dmbuf.area;
+}
+
+static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
+{
+ struct snd_dma_device dev;
+ snd_dma_device_pci(&dev, pci, capture);
+ snd_dma_free_reserved(&dev);
+}
+
+#else
+static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
+{
+ return snd_malloc_pci_pages(pci, size, addrp);
+}
+
+static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
+{
+ snd_free_pci_pages(pci, size, ptr, addr);
+}
#endif
-static struct pci_device_id snd_rme9652_ids[] __devinitdata = {
+static struct pci_device_id snd_rme9652_ids[] = {
{
.vendor = 0x10ee,
.device = 0x3fc4,
@@ -1810,25 +1841,15 @@
static void snd_rme9652_free_buffers(rme9652_t *rme9652)
{
if (rme9652->capture_buffer_unaligned) {
-#ifndef RME9652_PREALLOCATE_MEMORY
- snd_free_pci_pages(rme9652->pci,
- RME9652_DMA_AREA_BYTES,
- rme9652->capture_buffer_unaligned,
- rme9652->capture_buffer_addr);
-#else
- snd_hammerfall_free_buffer(rme9652->pci, rme9652->capture_buffer_unaligned);
-#endif
+ snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
+ rme9652->capture_buffer_unaligned,
+ rme9652->capture_buffer_addr, 1);
}
if (rme9652->playback_buffer_unaligned) {
-#ifndef RME9652_PREALLOCATE_MEMORY
- snd_free_pci_pages(rme9652->pci,
- RME9652_DMA_AREA_BYTES,
- rme9652->playback_buffer_unaligned,
- rme9652->playback_buffer_addr);
-#else
- snd_hammerfall_free_buffer(rme9652->pci, rme9652->playback_buffer_unaligned);
-#endif
+ snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
+ rme9652->playback_buffer_unaligned,
+ rme9652->playback_buffer_addr, 0);
}
}
@@ -1855,28 +1876,15 @@
dma_addr_t pb_addr, cb_addr;
unsigned long pb_bus, cb_bus;
-#ifndef RME9652_PREALLOCATE_MEMORY
- cb = snd_malloc_pci_pages(rme9652->pci, RME9652_DMA_AREA_BYTES, &cb_addr);
- pb = snd_malloc_pci_pages(rme9652->pci, RME9652_DMA_AREA_BYTES, &pb_addr);
-#else
- cb = snd_hammerfall_get_buffer(rme9652->pci, &cb_addr);
- pb = snd_hammerfall_get_buffer(rme9652->pci, &pb_addr);
-#endif
+ cb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &cb_addr, 1);
+ pb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &pb_addr, 0);
if (cb == 0 || pb == 0) {
if (cb) {
-#ifdef RME9652_PREALLOCATE_MEMORY
- snd_hammerfall_free_buffer(rme9652->pci, cb);
-#else
- snd_free_pci_pages(rme9652->pci, RME9652_DMA_AREA_BYTES, cb, cb_addr);
-#endif
+ snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, cb, cb_addr, 1);
}
if (pb) {
-#ifdef RME9652_PREALLOCATE_MEMORY
- snd_hammerfall_free_buffer(rme9652->pci, pb);
-#else
- snd_free_pci_pages(rme9652->pci, RME9652_DMA_AREA_BYTES, pb, pb_addr);
-#endif
+ snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, pb, pb_addr, 0);
}
printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
diff -Nru a/sound/pci/sonicvibes.c b/sound/pci/sonicvibes.c
--- a/sound/pci/sonicvibes.c Sun Aug 3 13:14:50 2003
+++ b/sound/pci/sonicvibes.c Sun Aug 3 13:14:50 2003
@@ -254,12 +254,12 @@
snd_kcontrol_t *master_mute;
snd_kcontrol_t *master_volume;
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
struct gameport gameport;
#endif
};
-static struct pci_device_id snd_sonic_ids[] __devinitdata = {
+static struct pci_device_id snd_sonic_ids[] = {
{ 0x5333, 0xca00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
{ 0, }
};
@@ -1189,7 +1189,7 @@
static int snd_sonicvibes_free(sonicvibes_t *sonic)
{
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if (sonic->gameport.io)
gameport_unregister_port(&sonic->gameport);
#endif
@@ -1493,7 +1493,7 @@
snd_card_free(card);
return err;
}
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
sonic->gameport.io = sonic->game_port;
gameport_register_port(&sonic->gameport);
#endif
diff -Nru a/sound/pci/trident/trident.c b/sound/pci/trident/trident.c
--- a/sound/pci/trident/trident.c Sun Aug 3 13:14:44 2003
+++ b/sound/pci/trident/trident.c Sun Aug 3 13:14:44 2003
@@ -69,7 +69,7 @@
MODULE_PARM_DESC(wavetable_size, "Maximum memory size in kB for wavetable synth.");
MODULE_PARM_SYNTAX(wavetable_size, SNDRV_ENABLED ",default:8192,skill:advanced");
-static struct pci_device_id snd_trident_ids[] __devinitdata = {
+static struct pci_device_id snd_trident_ids[] = {
{ 0x1023, 0x2000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Trident 4DWave DX PCI Audio */
{ 0x1023, 0x2001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Trident 4DWave NX PCI Audio */
{ 0x1039, 0x7018, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* SiS SI7018 PCI Audio */
@@ -132,7 +132,7 @@
return err;
}
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if ((err = snd_trident_attach_synthesizer(trident)) < 0) {
snd_card_free(card);
return err;
@@ -182,7 +182,6 @@
}
#ifdef CONFIG_PM
-#ifndef PCI_OLD_SUSPEND
static int snd_card_trident_suspend(struct pci_dev *pci, u32 state)
{
trident_t *chip = snd_magic_cast(trident_t, pci_get_drvdata(pci), return -ENXIO);
@@ -195,18 +194,6 @@
snd_trident_resume(chip);
return 0;
}
-#else
-static void snd_card_trident_suspend(struct pci_dev *pci)
-{
- trident_t *chip = snd_magic_cast(trident_t, pci_get_drvdata(pci), return);
- snd_trident_suspend(chip);
-}
-static void snd_card_trident_resume(struct pci_dev *pci)
-{
- trident_t *chip = snd_magic_cast(trident_t, pci_get_drvdata(pci), return);
- snd_trident_resume(chip);
-}
-#endif
#endif
static struct pci_driver driver = {
diff -Nru a/sound/pci/trident/trident_main.c b/sound/pci/trident/trident_main.c
--- a/sound/pci/trident/trident_main.c Sun Aug 3 13:14:50 2003
+++ b/sound/pci/trident/trident_main.c Sun Aug 3 13:14:50 2003
@@ -3077,7 +3077,8 @@
/*
* gameport interface
*/
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
typedef struct snd_trident_gameport {
struct gameport info;
@@ -3173,12 +3174,6 @@
*/
inline static void do_delay(trident_t *chip)
{
-#ifdef CONFIG_PM
- if (chip->in_suspend) {
- mdelay((1000 + HZ - 1) / HZ);
- return;
- }
-#endif
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(1);
}
@@ -3273,7 +3268,7 @@
snd_iprintf(buffer, "Memory Free : %d\n", snd_util_mem_avail(trident->tlb.memhdr));
}
}
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
snd_iprintf(buffer,"\nWavetable Synth\n");
snd_iprintf(buffer, "Memory Maximum : %d\n", trident->synth.max_size);
snd_iprintf(buffer, "Memory Used : %d\n", trident->synth.current_size);
@@ -3636,7 +3631,7 @@
int snd_trident_free(trident_t *trident)
{
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if (trident->gameport) {
gameport_unregister_port(&trident->gameport->info);
kfree(trident->gameport);
@@ -3796,7 +3791,7 @@
---------------------------------------------------------------------------*/
int snd_trident_attach_synthesizer(trident_t *trident)
{
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (snd_seq_device_new(trident->card, 1, SNDRV_SEQ_DEV_ID_TRIDENT,
sizeof(trident_t*), &trident->seq_dev) >= 0) {
strcpy(trident->seq_dev->name, "4DWave");
@@ -3808,7 +3803,7 @@
int snd_trident_detach_synthesizer(trident_t *trident)
{
-#if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
+#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
if (trident->seq_dev) {
snd_device_free(trident->card, trident->seq_dev);
trident->seq_dev = NULL;
diff -Nru a/sound/pci/via82xx.c b/sound/pci/via82xx.c
--- a/sound/pci/via82xx.c Sun Aug 3 13:14:51 2003
+++ b/sound/pci/via82xx.c Sun Aug 3 13:14:51 2003
@@ -452,7 +452,7 @@
snd_info_entry_t *proc_entry;
};
-static struct pci_device_id snd_via82xx_ids[] __devinitdata = {
+static struct pci_device_id snd_via82xx_ids[] = {
{ 0x1106, 0x3058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA686, }, /* 686A */
{ 0x1106, 0x3059, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA8233, }, /* VT8233 */
{ 0, }
@@ -886,7 +886,7 @@
snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
}
- if (chip->chip_type == TYPE_VIA8233A)
+ if (chip->revision == VIA_REV_8233A)
rbits = 0;
else
rbits = (0xfffff / 48000) * runtime->rate + ((0xfffff % 48000) * runtime->rate) / 48000;
@@ -928,7 +928,7 @@
fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
fmt |= runtime->channels << 4;
outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
- if (chip->chip_type == TYPE_VIA8233A)
+ if (chip->revision == VIA_REV_8233A)
slots = 0;
else {
/* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
@@ -1108,7 +1108,7 @@
if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
return err;
substream->runtime->hw.channels_max = 6;
- if (chip->chip_type == TYPE_VIA8233A)
+ if (chip->revision == VIA_REV_8233A)
snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
return 0;
}
diff -Nru a/sound/pci/vx222/vx222.c b/sound/pci/vx222/vx222.c
--- a/sound/pci/vx222/vx222.c Sun Aug 3 13:14:48 2003
+++ b/sound/pci/vx222/vx222.c Sun Aug 3 13:14:48 2003
@@ -68,7 +68,7 @@
VX_PCI_VX222_NEW
};
-static struct pci_device_id snd_vx222_ids[] __devinitdata = {
+static struct pci_device_id snd_vx222_ids[] = {
{ 0x10b5, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VX_PCI_VX222_OLD, }, /* PLX */
{ 0x10b5, 0x9030, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VX_PCI_VX222_NEW, }, /* PLX */
{ 0, }
diff -Nru a/sound/pci/ymfpci/ymfpci.c b/sound/pci/ymfpci/ymfpci.c
--- a/sound/pci/ymfpci/ymfpci.c Sun Aug 3 13:14:47 2003
+++ b/sound/pci/ymfpci/ymfpci.c Sun Aug 3 13:14:47 2003
@@ -67,7 +67,7 @@
MODULE_PARM_DESC(rear_switch, "Enable shared rear/line-in switch");
MODULE_PARM_SYNTAX(rear_switch, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
-static struct pci_device_id snd_ymfpci_ids[] __devinitdata = {
+static struct pci_device_id snd_ymfpci_ids[] = {
{ 0x1073, 0x0004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* YMF724 */
{ 0x1073, 0x000d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* YMF724F */
{ 0x1073, 0x000a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* YMF740 */
@@ -229,9 +229,11 @@
return err;
}
}
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
if ((err = snd_ymfpci_joystick(chip)) < 0) {
printk(KERN_WARNING "ymfpci: cannot initialize joystick, skipping...\n");
}
+#endif
strcpy(card->driver, str);
sprintf(card->shortname, "Yamaha DS-XG PCI (%s)", str);
sprintf(card->longname, "%s at 0x%lx, irq %i",
@@ -249,7 +251,6 @@
}
#ifdef CONFIG_PM
-#ifndef PCI_OLD_SUSPEND
static int snd_card_ymfpci_suspend(struct pci_dev *pci, u32 state)
{
ymfpci_t *chip = snd_magic_cast(ymfpci_t, pci_get_drvdata(pci), return -ENXIO);
@@ -262,18 +263,6 @@
snd_ymfpci_resume(chip);
return 0;
}
-#else
-static void snd_card_ymfpci_suspend(struct pci_dev *pci)
-{
- ymfpci_t *chip = snd_magic_cast(ymfpci_t, pci_get_drvdata(pci), return);
- snd_ymfpci_suspend(chip);
-}
-static void snd_card_ymfpci_resume(struct pci_dev *pci)
-{
- ymfpci_t *chip = snd_magic_cast(ymfpci_t, pci_get_drvdata(pci), return);
- snd_ymfpci_resume(chip);
-}
-#endif
#endif
static void __devexit snd_card_ymfpci_remove(struct pci_dev *pci)
diff -Nru a/sound/pci/ymfpci/ymfpci_main.c b/sound/pci/ymfpci/ymfpci_main.c
--- a/sound/pci/ymfpci/ymfpci_main.c Sun Aug 3 13:14:52 2003
+++ b/sound/pci/ymfpci/ymfpci_main.c Sun Aug 3 13:14:52 2003
@@ -84,7 +84,7 @@
writel(val, chip->reg_area_virt + offset);
}
-static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary, int sched)
+static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary)
{
signed long end_time;
u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
@@ -93,10 +93,8 @@
do {
if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
return 0;
- if (sched) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
} while (end_time - (signed long)jiffies >= 0);
snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
return -EBUSY;
@@ -107,7 +105,7 @@
ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return);
u32 cmd;
- snd_ymfpci_codec_ready(chip, 0, 0);
+ snd_ymfpci_codec_ready(chip, 0);
cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
}
@@ -116,10 +114,10 @@
{
ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return -ENXIO);
- if (snd_ymfpci_codec_ready(chip, 0, 0))
+ if (snd_ymfpci_codec_ready(chip, 0))
return ~0;
snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
- if (snd_ymfpci_codec_ready(chip, 0, 0))
+ if (snd_ymfpci_codec_ready(chip, 0))
return ~0;
if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
int i;
@@ -1708,24 +1706,65 @@
* joystick support
*/
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
static int ymfpci_joystick_ports[4] = {
0x201, 0x202, 0x204, 0x205
};
+static int snd_ymfpci_get_joystick_port(ymfpci_t *chip, int index)
+{
+ if (index < 4)
+ return ymfpci_joystick_ports[index];
+ else
+ return pci_resource_start(chip->pci, 2);
+}
+
static void setup_joystick_base(ymfpci_t *chip)
{
- if (chip->pci->device >= 0x0010) /* YMF 744/754 */
+ if (chip->device_id >= 0x0010) /* YMF 744/754 */
pci_write_config_word(chip->pci, PCIR_DSXG_JOYBASE,
- ymfpci_joystick_ports[chip->joystick_port]);
+ snd_ymfpci_get_joystick_port(chip, chip->joystick_port));
else {
u16 legacy_ctrl2;
pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY, &legacy_ctrl2);
- legacy_ctrl2 &= ~(3 << 6);
+ legacy_ctrl2 &= ~YMFPCI_LEGACY2_JSIO;
legacy_ctrl2 |= chip->joystick_port << 6;
pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, legacy_ctrl2);
}
}
+static int snd_ymfpci_enable_joystick(ymfpci_t *chip)
+{
+ u16 val;
+
+ chip->gameport.io = snd_ymfpci_get_joystick_port(chip, chip->joystick_port);
+ chip->joystick_res = request_region(chip->gameport.io, 1, "YMFPCI gameport");
+ if (!chip->joystick_res) {
+ snd_printk(KERN_WARNING "gameport port %#x in use\n", chip->gameport.io);
+ return 0;
+ }
+ setup_joystick_base(chip);
+ pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, &val);
+ val |= YMFPCI_LEGACY_JPEN;
+ pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, val);
+ gameport_register_port(&chip->gameport);
+ return 1;
+}
+
+static int snd_ymfpci_disable_joystick(ymfpci_t *chip)
+{
+ u16 val;
+
+ gameport_unregister_port(&chip->gameport);
+ pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, &val);
+ val &= ~YMFPCI_LEGACY_JPEN;
+ pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, val);
+ release_resource(chip->joystick_res);
+ kfree_nocheck(chip->joystick_res);
+ chip->joystick_res = NULL;
+ return 1;
+}
+
static int snd_ymfpci_joystick_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
@@ -1741,36 +1780,41 @@
u16 val;
pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, &val);
- ucontrol->value.integer.value[0] = (val & 0x04) ? 1 : 0;
+ ucontrol->value.integer.value[0] = (val & YMFPCI_LEGACY_JPEN) ? 1 : 0;
return 0;
}
static int snd_ymfpci_joystick_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
{
ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
- u16 val, oval;
+ int enabled, change;
- pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, &oval);
- val = oval & ~0x04;
- if (ucontrol->value.integer.value[0])
- val |= 0x04;
- if (val != oval) {
- setup_joystick_base(chip);
- pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, val);
- return 1;
+ down(&chip->joystick_mutex);
+ enabled = chip->joystick_res != NULL;
+ change = enabled != !! ucontrol->value.integer.value[0];
+ if (change) {
+ if (!enabled)
+ change = snd_ymfpci_enable_joystick(chip);
+ else
+ change = snd_ymfpci_disable_joystick(chip);
}
- return 0;
+ up(&chip->joystick_mutex);
+ return change;
}
static int snd_ymfpci_joystick_addr_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
{
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 4;
- if (uinfo->value.enumerated.item >= 4)
- uinfo->value.enumerated.item = 3;
- sprintf(uinfo->value.enumerated.name, "port 0x%x", ymfpci_joystick_ports[uinfo->value.enumerated.item]);
- return 0;
+ ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
+ int ports = chip->device_id >= 0x0010 ? 5 : 4;
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = ports;
+ if (uinfo->value.enumerated.item >= ports)
+ uinfo->value.enumerated.item = ports - 1;
+ sprintf(uinfo->value.enumerated.name, "port 0x%x",
+ snd_ymfpci_get_joystick_port(chip, uinfo->value.enumerated.item));
+ return 0;
}
static int snd_ymfpci_joystick_addr_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
@@ -1783,13 +1827,20 @@
static int snd_ymfpci_joystick_addr_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
{
ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
- if (ucontrol->value.enumerated.item[0] != chip->joystick_port) {
- snd_assert(ucontrol->value.enumerated.item[0] >= 0 && ucontrol->value.enumerated.item[0] < 4, return -EINVAL);
+ int change, enabled;
+
+ down(&chip->joystick_mutex);
+ change = ucontrol->value.enumerated.item[0] != chip->joystick_port;
+ if (change) {
+ enabled = chip->joystick_res != NULL;
+ if (enabled)
+ snd_ymfpci_disable_joystick(chip);
chip->joystick_port = ucontrol->value.enumerated.item[0];
- setup_joystick_base(chip);
- return 1;
+ if (enabled)
+ snd_ymfpci_enable_joystick(chip);
}
- return 0;
+ up(&chip->joystick_mutex);
+ return change;
}
static snd_kcontrol_new_t snd_ymfpci_control_joystick __devinitdata = {
@@ -1819,6 +1870,7 @@
return err;
return 0;
}
+#endif /* CONFIG_GAMEPORT */
/*
@@ -2067,6 +2119,10 @@
release_resource(chip->fm_res);
kfree_nocheck(chip->fm_res);
}
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
+ if (chip->joystick_res)
+ snd_ymfpci_disable_joystick(chip);
+#endif
if (chip->reg_area_virt)
iounmap((void *)chip->reg_area_virt);
if (chip->work_ptr)
@@ -2151,7 +2207,7 @@
pci_enable_device(chip->pci);
pci_set_master(chip->pci);
snd_ymfpci_aclink_reset(chip->pci);
- snd_ymfpci_codec_ready(chip, 0, 0);
+ snd_ymfpci_codec_ready(chip, 0);
snd_ymfpci_download_image(chip);
udelay(100);
@@ -2216,6 +2272,9 @@
spin_lock_init(&chip->voice_lock);
init_waitqueue_head(&chip->interrupt_sleep);
atomic_set(&chip->interrupt_sleep_count, 0);
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
+ init_MUTEX(&chip->joystick_mutex);
+#endif
chip->card = card;
chip->pci = pci;
chip->irq = -1;
@@ -2238,7 +2297,7 @@
chip->irq = pci->irq;
snd_ymfpci_aclink_reset(pci);
- if (snd_ymfpci_codec_ready(chip, 0, 1) < 0) {
+ if (snd_ymfpci_codec_ready(chip, 0) < 0) {
snd_ymfpci_free(chip);
return -EIO;
}
diff -Nru a/sound/pcmcia/vx/vxpocket.c b/sound/pcmcia/vx/vxpocket.c
--- a/sound/pcmcia/vx/vxpocket.c Sun Aug 3 13:14:46 2003
+++ b/sound/pcmcia/vx/vxpocket.c Sun Aug 3 13:14:46 2003
@@ -31,6 +31,7 @@
*/
#include <sound/driver.h>
+#include <linux/init.h>
#include <sound/core.h>
#include <pcmcia/version.h>
#include "vxpocket.h"
diff -Nru a/sound/ppc/awacs.c b/sound/ppc/awacs.c
--- a/sound/ppc/awacs.c Sun Aug 3 13:14:48 2003
+++ b/sound/ppc/awacs.c Sun Aug 3 13:14:48 2003
@@ -92,18 +92,9 @@
snd_pmac_awacs_write(chip, val | (reg << 12));
}
-static void do_mdelay(int msec, int can_schedule)
-{
- if (can_schedule) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((msec * HZ + 999) / 1000);
- } else
- mdelay(msec);
-}
-
#ifdef CONFIG_PMAC_PBOOK
/* Recalibrate chip */
-static void screamer_recalibrate(pmac_t *chip, int can_schedule)
+static void screamer_recalibrate(pmac_t *chip)
{
if (chip->model != PMAC_SCREAMER)
return;
@@ -114,7 +105,7 @@
snd_pmac_awacs_write_noreg(chip, 1, chip->awacs_reg[1]);
if (chip->manufacturer == 0x1)
/* delay for broken crystal part */
- do_mdelay(750, can_schedule);
+ big_mdelay(750);
snd_pmac_awacs_write_noreg(chip, 1,
chip->awacs_reg[1] | MASK_RECALIBRATE | MASK_CMUTE | MASK_AMUTE);
snd_pmac_awacs_write_noreg(chip, 1, chip->awacs_reg[1]);
@@ -122,7 +113,7 @@
}
#else
-#define screamer_recalibrate(chip, can_schedule) /* NOP */
+#define screamer_recalibrate(chip) /* NOP */
#endif
@@ -631,7 +622,7 @@
/*
* restore all registers
*/
-static void awacs_restore_all_regs(pmac_t *chip, int can_schedule)
+static void awacs_restore_all_regs(pmac_t *chip)
{
snd_pmac_awacs_write_noreg(chip, 0, chip->awacs_reg[0]);
snd_pmac_awacs_write_noreg(chip, 1, chip->awacs_reg[1]);
@@ -655,19 +646,19 @@
{
if (machine_is_compatible("PowerBook3,1")
|| machine_is_compatible("PowerBook3,2")) {
- do_mdelay(100, 0);
+ big_mdelay(100);
snd_pmac_awacs_write_reg(chip, 1,
chip->awacs_reg[1] & ~MASK_PAROUT);
- do_mdelay(300, 0);
+ big_mdelay(300);
}
- awacs_restore_all_regs(chip, 0);
+ awacs_restore_all_regs(chip);
if (chip->model == PMAC_SCREAMER) {
/* reset power bits in reg 6 */
mdelay(5);
snd_pmac_awacs_write_noreg(chip, 6, chip->awacs_reg[6]);
}
- screamer_recalibrate(chip, 0);
+ screamer_recalibrate(chip);
#ifdef PMAC_AMP_AVAIL
if (chip->mixer_data) {
awacs_amp_t *amp = chip->mixer_data;
@@ -775,9 +766,9 @@
chip->awacs_reg[7] = 0;
}
- awacs_restore_all_regs(chip, 1);
+ awacs_restore_all_regs(chip);
chip->manufacturer = (in_le32(&chip->awacs->codec_stat) >> 8) & 0xf;
- screamer_recalibrate(chip, 1);
+ screamer_recalibrate(chip);
chip->revision = (in_le32(&chip->awacs->codec_stat) >> 12) & 0xf;
#ifdef PMAC_AMP_AVAIL
diff -Nru a/sound/ppc/burgundy.c b/sound/ppc/burgundy.c
--- a/sound/ppc/burgundy.c Sun Aug 3 13:14:47 2003
+++ b/sound/ppc/burgundy.c Sun Aug 3 13:14:47 2003
@@ -23,6 +23,7 @@
#include <asm/io.h>
#include <linux/init.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#include <sound/core.h>
#include "pmac.h"
#include "burgundy.h"
@@ -34,17 +35,27 @@
inline static void
snd_pmac_burgundy_busy_wait(pmac_t *chip)
{
- while (in_le32(&chip->awacs->codec_ctrl) & MASK_NEWECMD)
- ;
+ int timeout = 50;
+ while ((in_le32(&chip->awacs->codec_ctrl) & MASK_NEWECMD) && timeout--)
+ udelay(1);
+ if (! timeout)
+ printk(KERN_DEBUG "burgundy_busy_wait: timeout\n");
}
inline static void
snd_pmac_burgundy_extend_wait(pmac_t *chip)
{
- while (!(in_le32(&chip->awacs->codec_stat) & MASK_EXTEND))
- ;
- while (in_le32(&chip->awacs->codec_stat) & MASK_EXTEND)
- ;
+ int timeout;
+ timeout = 50;
+ while (!(in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--)
+ udelay(1);
+ if (! timeout)
+ printk(KERN_DEBUG "burgundy_extend_wait: timeout #1\n");
+ timeout = 50;
+ while ((in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--)
+ udelay(1);
+ if (! timeout)
+ printk(KERN_DEBUG "burgundy_extend_wait: timeout #2\n");
}
static void
@@ -66,7 +77,6 @@
unsigned val = 0;
unsigned long flags;
- /* should have timeouts here */
spin_lock_irqsave(&chip->reg_lock, flags);
out_le32(&chip->awacs->codec_ctrl, addr + 0x100000);
@@ -107,7 +117,6 @@
unsigned val = 0;
unsigned long flags;
- /* should have timeouts here */
spin_lock_irqsave(&chip->reg_lock, flags);
out_le32(&chip->awacs->codec_ctrl, addr + 0x100000);
diff -Nru a/sound/ppc/pmac.c b/sound/ppc/pmac.c
--- a/sound/ppc/pmac.c Sun Aug 3 13:14:53 2003
+++ b/sound/ppc/pmac.c Sun Aug 3 13:14:53 2003
@@ -736,7 +736,7 @@
pmu_suspend();
feature_clear(chip->node, FEATURE_Sound_power);
feature_clear(chip->node, FEATURE_Sound_CLK_enable);
- mdelay(1000); /* XXX */
+ big_mdelay(1000); /* XXX */
pmu_resume();
}
if (chip->is_pbook_3400) {
diff -Nru a/sound/ppc/pmac.h b/sound/ppc/pmac.h
--- a/sound/ppc/pmac.h Sun Aug 3 13:14:50 2003
+++ b/sound/ppc/pmac.h Sun Aug 3 13:14:50 2003
@@ -201,6 +201,11 @@
int snd_pmac_add_automute(pmac_t *chip);
+#define big_mdelay(msec) do {\
+ set_current_state(TASK_UNINTERRUPTIBLE);\
+ schedule_timeout(((msec) * HZ + 999) / 1000);\
+} while (0)
+
#ifndef PMAC_SUPPORT_PCM_BEEP
#define snd_pmac_attach_beep(chip) 0
#define snd_pmac_beep_stop(chip) /**/
diff -Nru a/sound/ppc/tumbler.c b/sound/ppc/tumbler.c
--- a/sound/ppc/tumbler.c Sun Aug 3 13:14:44 2003
+++ b/sound/ppc/tumbler.c Sun Aug 3 13:14:44 2003
@@ -27,7 +27,6 @@
#include <linux/kmod.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
-#include <linux/workqueue.h>
#include <sound/core.h>
#include <asm/io.h>
#include <asm/irq.h>
@@ -93,9 +92,6 @@
unsigned int mix_vol[VOL_IDX_LAST_MIX][2]; /* stereo volumes for tas3004 */
int drc_range;
int drc_enable;
-#ifdef CONFIG_PMAC_PBOOK
- struct work_struct resume_workq;
-#endif
} pmac_tumbler_t;
@@ -870,23 +866,21 @@
pmac_tumbler_t *mix = chip->mixer_data;
write_audio_gpio(&mix->audio_reset, 0);
- mdelay(200);
+ big_mdelay(200);
write_audio_gpio(&mix->audio_reset, 1);
- mdelay(100);
+ big_mdelay(100);
write_audio_gpio(&mix->audio_reset, 0);
- mdelay(100);
+ big_mdelay(100);
}
#ifdef CONFIG_PMAC_PBOOK
/* resume mixer */
-/* we call the i2c transfer in a workqueue because it may need either schedule()
- * or completion from timer interrupts.
- */
-static void tumbler_resume_work(void *arg)
+static void tumbler_resume(pmac_t *chip)
{
- pmac_t *chip = (pmac_t *)arg;
pmac_tumbler_t *mix = chip->mixer_data;
+ snd_assert(mix, return);
+
tumbler_reset_audio(chip);
if (mix->i2c.client) {
if (tumbler_init_client(&mix->i2c) < 0)
@@ -909,16 +903,6 @@
tumbler_set_master_volume(mix);
if (chip->update_automute)
chip->update_automute(chip, 0);
-}
-
-static void tumbler_resume(pmac_t *chip)
-{
- pmac_tumbler_t *mix = chip->mixer_data;
- snd_assert(mix, return);
- INIT_WORK(&mix->resume_workq, tumbler_resume_work, chip);
- if (schedule_work(&mix->resume_workq))
- return;
- printk(KERN_ERR "ALSA tumbler: cannot schedule resume-workqueue.\n");
}
#endif
diff -Nru a/sound/synth/emux/soundfont.c b/sound/synth/emux/soundfont.c
--- a/sound/synth/emux/soundfont.c Sun Aug 3 13:14:50 2003
+++ b/sound/synth/emux/soundfont.c Sun Aug 3 13:14:50 2003
@@ -66,15 +66,11 @@
static int
lock_preset(snd_sf_list_t *sflist, int nonblock)
{
- unsigned long flags;
- spin_lock_irqsave(&sflist->lock, flags);
- if (sflist->sf_locked && nonblock) {
- spin_unlock_irqrestore(&sflist->lock, flags);
- return -EBUSY;
- }
- spin_unlock_irqrestore(&sflist->lock, flags);
- down(&sflist->presets_mutex);
- sflist->sf_locked = 1;
+ if (nonblock) {
+ if (down_trylock(&sflist->presets_mutex))
+ return -EBUSY;
+ } else
+ down(&sflist->presets_mutex);
return 0;
}
@@ -86,7 +82,6 @@
unlock_preset(snd_sf_list_t *sflist)
{
up(&sflist->presets_mutex);
- sflist->sf_locked = 0;
}
@@ -1356,7 +1351,6 @@
init_MUTEX(&sflist->presets_mutex);
spin_lock_init(&sflist->lock);
- sflist->sf_locked = 0;
sflist->memhdr = hdr;
if (callback)
@@ -1403,7 +1397,7 @@
/*
* Remove unlocked samples.
- * The soundcard should be silet before calling this function.
+ * The soundcard should be silent before calling this function.
*/
int
snd_soundfont_remove_unlocked(snd_sf_list_t *sflist)
diff -Nru a/sound/usb/usbaudio.c b/sound/usb/usbaudio.c
--- a/sound/usb/usbaudio.c Sun Aug 3 13:14:50 2003
+++ b/sound/usb/usbaudio.c Sun Aug 3 13:14:50 2003
@@ -153,6 +153,9 @@
int direction; /* playback or capture */
int interface; /* current interface */
int endpoint; /* assigned endpoint */
+ struct audioformat *cur_audiofmt; /* current audioformat pointer (for hw_params callback) */
+ unsigned int cur_rate; /* current rate (for hw_params callback) */
+ unsigned int period_bytes; /* current period bytes (for hw_params callback) */
unsigned int format; /* USB data format */
unsigned int datapipe; /* the data i/o pipe */
unsigned int syncpipe; /* 1 - async out or adaptive in */
@@ -385,6 +388,7 @@
urb->iso_frame_desc[i].length = 3;
urb->iso_frame_desc[i].offset = offs;
}
+ urb->interval = 1;
return 0;
}
@@ -509,6 +513,7 @@
spin_unlock_irqrestore(&subs->lock, flags);
urb->transfer_buffer_length = offs * stride;
ctx->transfer = offs;
+ urb->interval = 1;
return 0;
}
@@ -808,14 +813,15 @@
/*
* initialize a substream for plaback/capture
*/
-static int init_substream_urbs(snd_usb_substream_t *subs, snd_pcm_runtime_t *runtime)
+static int init_substream_urbs(snd_usb_substream_t *subs, unsigned int period_bytes,
+ unsigned int rate, unsigned int frame_bits)
{
unsigned int maxsize, n, i;
int is_playback = subs->direction == SNDRV_PCM_STREAM_PLAYBACK;
unsigned int npacks[MAX_URBS], total_packs;
/* calculate the frequency in 10.14 format */
- subs->freqn = subs->freqm = get_usb_rate(runtime->rate);
+ subs->freqn = subs->freqm = get_usb_rate(rate);
subs->freqmax = subs->freqn + (subs->freqn >> 2); /* max. allowed frequency */
subs->phase = 0;
@@ -828,7 +834,7 @@
subs->unlink_mask = 0;
/* calculate the max. size of packet */
- maxsize = ((subs->freqmax + 0x3fff) * (runtime->frame_bits >> 3)) >> 14;
+ maxsize = ((subs->freqmax + 0x3fff) * (frame_bits >> 3)) >> 14;
if (subs->maxpacksize && maxsize > subs->maxpacksize) {
//snd_printd(KERN_DEBUG "maxsize %d is greater than defined size %d\n",
// maxsize, subs->maxpacksize);
@@ -839,7 +845,6 @@
subs->curpacksize = subs->maxpacksize;
else
subs->curpacksize = maxsize;
- subs->curframesize = bytes_to_frames(runtime, subs->curpacksize);
/* allocate a temporary buffer for playback */
if (is_playback) {
@@ -851,7 +856,7 @@
}
/* decide how many packets to be used */
- total_packs = (frames_to_bytes(runtime, runtime->period_size) + maxsize - 1) / maxsize;
+ total_packs = (period_bytes + maxsize - 1) / maxsize;
if (total_packs < 2 * MIN_PACKS_URB)
total_packs = 2 * MIN_PACKS_URB;
subs->nurbs = (total_packs + nrpacks - 1) / nrpacks;
@@ -945,7 +950,8 @@
/*
* find a matching audio format
*/
-static struct audioformat *find_format(snd_usb_substream_t *subs, snd_pcm_runtime_t *runtime)
+static struct audioformat *find_format(snd_usb_substream_t *subs, unsigned int format,
+ unsigned int rate, unsigned int channels)
{
struct list_head *p;
struct audioformat *found = NULL;
@@ -953,23 +959,21 @@
list_for_each(p, &subs->fmt_list) {
struct audioformat *fp;
fp = list_entry(p, struct audioformat, list);
- if (fp->format != runtime->format ||
- fp->channels != runtime->channels)
+ if (fp->format != format || fp->channels != channels)
continue;
- if (runtime->rate < fp->rate_min || runtime->rate > fp->rate_max)
+ if (rate < fp->rate_min || rate > fp->rate_max)
continue;
- if (fp->rates & SNDRV_PCM_RATE_CONTINUOUS) {
- if (! found || fp->maxpacksize > found->maxpacksize)
- found = fp;
- } else {
+ if (! (fp->rates & SNDRV_PCM_RATE_CONTINUOUS)) {
unsigned int i;
for (i = 0; i < fp->nr_rates; i++)
- if (fp->rate_table[i] == runtime->rate) {
- if (! found || fp->maxpacksize > found->maxpacksize)
- found = fp;
+ if (fp->rate_table[i] == rate)
break;
- }
+ if (i >= fp->nr_rates)
+ continue;
}
+ /* find the format with the largest max. packet size */
+ if (! found || fp->maxpacksize > found->maxpacksize)
+ found = fp;
}
return found;
}
@@ -1042,30 +1046,25 @@
/*
* find a matching format and set up the interface
*/
-static int set_format(snd_usb_substream_t *subs, snd_pcm_runtime_t *runtime)
+static int set_format(snd_usb_substream_t *subs, struct audioformat *fmt)
{
struct usb_device *dev = subs->dev;
struct usb_host_config *config = dev->actconfig;
struct usb_host_interface *alts;
struct usb_interface_descriptor *altsd;
struct usb_interface *iface;
- struct audioformat *fmt;
unsigned int ep, attr;
int is_playback = subs->direction == SNDRV_PCM_STREAM_PLAYBACK;
int err;
- fmt = find_format(subs, runtime);
- if (! fmt) {
- snd_printd(KERN_DEBUG "cannot set format: format = %s, rate = %d, channels = %d\n",
- snd_pcm_format_name(runtime->format), runtime->rate, runtime->channels);
- return -EINVAL;
- }
-
- iface = &config->interface[fmt->iface];
+ iface = config->interface[fmt->iface];
alts = &iface->altsetting[fmt->altset_idx];
altsd = get_iface_desc(alts);
snd_assert(altsd->bAlternateSetting == fmt->altsetting, return -EINVAL);
+ if (fmt == subs->cur_audiofmt)
+ return 0;
+
/* close the old interface */
if (subs->interface >= 0 && subs->interface != fmt->iface) {
usb_set_interface(subs->dev, subs->interface, 0);
@@ -1093,7 +1092,6 @@
subs->datapipe = usb_rcvisocpipe(dev, ep);
subs->syncpipe = subs->syncinterval = 0;
subs->maxpacksize = get_endpoint(alts, 0)->wMaxPacketSize;
- subs->maxframesize = bytes_to_frames(runtime, subs->maxpacksize);
subs->fill_max = 0;
/* we need a sync pipe in async OUT or adaptive IN mode */
@@ -1123,18 +1121,18 @@
subs->syncinterval = get_endpoint(alts, 1)->bRefresh;
}
- if ((err = init_usb_pitch(dev, subs->interface, alts, fmt)) < 0 ||
- (err = init_usb_sample_rate(dev, subs->interface, alts, fmt,
- runtime->rate)) < 0)
- return err;
-
/* always fill max packet size */
if (fmt->attributes & EP_CS_ATTR_FILL_MAX)
subs->fill_max = 1;
+ if ((err = init_usb_pitch(dev, subs->interface, alts, fmt)) < 0)
+ return err;
+
+ subs->cur_audiofmt = fmt;
+
#if 0
printk("setting done: format = %d, rate = %d, channels = %d\n",
- runtime->format, runtime->rate, runtime->channels);
+ fmt->format, fmt->rate, fmt->channels);
printk(" datapipe = 0x%0x, syncpipe = 0x%0x\n",
subs->datapipe, subs->syncpipe);
#endif
@@ -1143,7 +1141,9 @@
}
/*
- * allocate a buffer.
+ * hw_params callback
+ *
+ * allocate a buffer and set the given audio format.
*
* so far we use a physically linear buffer although packetize transfer
* doesn't need a continuous area.
@@ -1153,33 +1153,91 @@
static int snd_usb_hw_params(snd_pcm_substream_t *substream,
snd_pcm_hw_params_t *hw_params)
{
- return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+ snd_usb_substream_t *subs = (snd_usb_substream_t *)substream->runtime->private_data;
+ struct audioformat *fmt;
+ unsigned int channels, rate, format;
+ int ret, changed;
+
+ ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+ if (ret < 0)
+ return ret;
+
+ format = params_format(hw_params);
+ rate = params_rate(hw_params);
+ channels = params_channels(hw_params);
+ fmt = find_format(subs, format, rate, channels);
+ if (! fmt) {
+ snd_printd(KERN_DEBUG "cannot set format: format = %s, rate = %d, channels = %d\n",
+ snd_pcm_format_name(format), rate, channels);
+ return -EINVAL;
+ }
+
+ changed = subs->cur_audiofmt != fmt ||
+ subs->period_bytes != params_period_bytes(hw_params) ||
+ subs->cur_rate != rate;
+ if ((ret = set_format(subs, fmt)) < 0)
+ return ret;
+
+ if (subs->cur_rate != rate) {
+ struct usb_host_config *config = subs->dev->actconfig;
+ struct usb_host_interface *alts;
+ struct usb_interface *iface;
+ iface = config->interface[fmt->iface];
+ alts = &iface->altsetting[fmt->altset_idx];
+ ret = init_usb_sample_rate(subs->dev, subs->interface, alts, fmt, rate);
+ if (ret < 0)
+ return ret;
+ subs->cur_rate = rate;
+ }
+
+ if (changed) {
+ /* format changed */
+ release_substream_urbs(subs, 0);
+ /* influenced: period_bytes, channels, rate, format, */
+ ret = init_substream_urbs(subs, params_period_bytes(hw_params),
+ params_rate(hw_params),
+ snd_pcm_format_physical_width(params_format(hw_params)) * params_channels(hw_params));
+ }
+
+ return ret;
}
/*
- * free the buffer
+ * hw_free callback
+ *
+ * reset the audio format and release the buffer
*/
static int snd_usb_hw_free(snd_pcm_substream_t *substream)
{
+ snd_usb_substream_t *subs = (snd_usb_substream_t *)substream->runtime->private_data;
+
+ subs->cur_audiofmt = NULL;
+ subs->cur_rate = 0;
+ subs->period_bytes = 0;
+ release_substream_urbs(subs, 0);
return snd_pcm_lib_free_pages(substream);
}
/*
* prepare callback
*
- * set format and initialize urbs
+ * only a few subtle things...
*/
static int snd_usb_pcm_prepare(snd_pcm_substream_t *substream)
{
snd_pcm_runtime_t *runtime = substream->runtime;
snd_usb_substream_t *subs = (snd_usb_substream_t *)runtime->private_data;
- int err;
- release_substream_urbs(subs, 0);
- if ((err = set_format(subs, runtime)) < 0)
- return err;
+ if (! subs->cur_audiofmt) {
+ snd_printk(KERN_ERR "usbaudio: no format is specified!\n");
+ return -ENXIO;
+ }
+
+ /* some unit conversions in runtime */
+ subs->maxframesize = bytes_to_frames(runtime, subs->maxpacksize);
+ subs->curframesize = bytes_to_frames(runtime, subs->curpacksize);
- return init_substream_urbs(subs, runtime);
+ return 0;
}
static snd_pcm_hardware_t snd_usb_playback =
@@ -1536,9 +1594,10 @@
snd_usb_stream_t *as = snd_pcm_substream_chip(substream);
snd_usb_substream_t *subs = &as->substream[direction];
- release_substream_urbs(subs, 0);
- if (subs->interface >= 0)
+ if (subs->interface >= 0) {
usb_set_interface(subs->dev, subs->interface, 0);
+ subs->interface = -1;
+ }
subs->pcm_substream = NULL;
return 0;
}
@@ -2156,15 +2215,17 @@
config = dev->actconfig;
/* parse the interface's altsettings */
- iface = &config->interface[iface_no];
+ iface = config->interface[iface_no];
for (i = 0; i < iface->num_altsetting; i++) {
alts = &iface->altsetting[i];
altsd = get_iface_desc(alts);
/* skip invalid one */
if ((altsd->bInterfaceClass != USB_CLASS_AUDIO &&
altsd->bInterfaceClass != USB_CLASS_VENDOR_SPEC) ||
- altsd->bInterfaceSubClass != USB_SUBCLASS_AUDIO_STREAMING ||
- altsd->bNumEndpoints < 1)
+ (altsd->bInterfaceSubClass != USB_SUBCLASS_AUDIO_STREAMING &&
+ altsd->bInterfaceSubClass != USB_SUBCLASS_VENDOR_SPEC) ||
+ altsd->bNumEndpoints < 1 ||
+ get_endpoint(alts, 0)->wMaxPacketSize == 0)
continue;
/* must be isochronous */
if ((get_endpoint(alts, 0)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) !=
@@ -2236,6 +2297,14 @@
*/
fp->attributes &= ~EP_CS_ATTR_SAMPLE_RATE;
}
+
+ /* workaround for M-Audio Audiophile USB */
+ if (dev->descriptor.idVendor == 0x0763 &&
+ dev->descriptor.idProduct == 0x2003) {
+ /* doesn't set the sample rate attribute, but supports it */
+ fp->attributes |= EP_CS_ATTR_SAMPLE_RATE;
+ }
+
/*
* plantronics headset and Griffin iMic have set adaptive-in
* although it's really not...
@@ -2278,6 +2347,32 @@
/*
+ * disconnect streams
+ * called from snd_usb_audio_disconnect()
+ */
+static void snd_usb_stream_disconnect(struct list_head *head, struct usb_driver *driver)
+{
+ int idx;
+ snd_usb_stream_t *as;
+ snd_usb_substream_t *subs;
+ struct list_head *p;
+
+ as = list_entry(head, snd_usb_stream_t, list);
+ for (idx = 0; idx < 2; idx++) {
+ subs = &as->substream[idx];
+ if (!subs->num_formats)
+ return;
+ release_substream_urbs(subs, 1);
+ subs->interface = -1;
+ /* release interfaces */
+ list_for_each(p, &subs->fmt_list) {
+ struct audioformat *fp = list_entry(p, struct audioformat, list);
+ usb_driver_release_interface(driver, usb_ifnum_to_if(subs->dev, fp->iface));
+ }
+ }
+}
+
+/*
* parse audio control descriptor and create pcm/midi streams
*/
static int snd_usb_create_streams(snd_usb_audio_t *chip, int ctrlif)
@@ -2291,7 +2386,7 @@
/* find audiocontrol interface */
config = dev->actconfig;
- host_iface = &config->interface[ctrlif].altsetting[0];
+ host_iface = &config->interface[ctrlif]->altsetting[0];
if (!(p1 = snd_usb_find_csint_desc(host_iface->extra, host_iface->extralen, NULL, HEADER))) {
snd_printk(KERN_ERR "cannot find HEADER\n");
return -EINVAL;
@@ -2313,7 +2408,7 @@
dev->devnum, ctrlif, j);
continue;
}
- iface = &config->interface[j];
+ iface = config->interface[j];
if (usb_interface_claimed(iface)) {
snd_printdd(KERN_INFO "%d:%d:%d: skipping, already claimed\n", dev->devnum, ctrlif, j);
continue;
@@ -2381,7 +2476,8 @@
* create a stream for an interface with proper descriptors
*/
static int create_standard_interface_quirk(snd_usb_audio_t *chip,
- struct usb_interface *iface)
+ struct usb_interface *iface,
+ const snd_usb_audio_quirk_t *quirk)
{
struct usb_host_interface *alts;
struct usb_interface_descriptor *altsd;
@@ -2389,19 +2485,18 @@
alts = &iface->altsetting[0];
altsd = get_iface_desc(alts);
- switch (altsd->bInterfaceSubClass) {
- case USB_SUBCLASS_AUDIO_STREAMING:
+ switch (quirk->type) {
+ case QUIRK_AUDIO_STANDARD_INTERFACE:
err = parse_audio_endpoints(chip, altsd->bInterfaceNumber);
if (!err)
usb_set_interface(chip->dev, altsd->bInterfaceNumber, 0); /* reset the current interface */
break;
- case USB_SUBCLASS_MIDI_STREAMING:
+ case QUIRK_MIDI_STANDARD_INTERFACE:
err = snd_usb_create_midi_interface(chip, iface, NULL);
break;
default:
- snd_printk(KERN_ERR "if %d: non-supported subclass %d\n",
- altsd->bInterfaceNumber, altsd->bInterfaceSubClass);
- return -ENODEV;
+ snd_printd(KERN_ERR "invalid quirk type %d\n", quirk->type);
+ return -ENXIO;
}
if (err < 0) {
snd_printk(KERN_ERR "cannot setup if %d: error %d\n",
@@ -2429,7 +2524,7 @@
for (quirk = quirk->data; quirk->ifnum >= 0; ++quirk) {
if (quirk->ifnum >= get_cfg_desc(config)->bNumInterfaces)
continue;
- iface = &config->interface[quirk->ifnum];
+ iface = config->interface[quirk->ifnum];
if (quirk->ifnum != probed_ifnum &&
usb_interface_claimed(iface))
continue;
@@ -2495,8 +2590,9 @@
return create_composite_quirk(chip, iface, quirk);
case QUIRK_AUDIO_FIXED_ENDPOINT:
return create_fixed_stream_quirk(chip, iface, quirk);
- case QUIRK_STANDARD_INTERFACE:
- return create_standard_interface_quirk(chip, iface);
+ case QUIRK_AUDIO_STANDARD_INTERFACE:
+ case QUIRK_MIDI_STANDARD_INTERFACE:
+ return create_standard_interface_quirk(chip, iface, quirk);
default:
snd_printd(KERN_ERR "invalid quirk type %d\n", quirk->type);
return -ENXIO;
@@ -2635,11 +2731,6 @@
if (quirk && quirk->ifnum != QUIRK_ANY_INTERFACE && ifnum != quirk->ifnum)
goto __err_val;
- if (usb_set_configuration(dev, get_cfg_desc(config)->bConfigurationValue) < 0) {
- snd_printk(KERN_ERR "cannot set configuration (value 0x%x)\n", get_cfg_desc(config)->bConfigurationValue);
- goto __err_val;
- }
-
/* SB Extigy needs special boot-up sequence */
/* if more models come, this will go to the quirk list. */
if (dev->descriptor.idVendor == 0x041e && dev->descriptor.idProduct == 0x3000) {
@@ -2669,6 +2760,11 @@
/* it's a fresh one.
* now look for an empty slot and create a new card instance
*/
+ /* first, set the current configuration for this device */
+ if (usb_set_configuration(dev, get_cfg_desc(config)->bConfigurationValue) < 0) {
+ snd_printk(KERN_ERR "cannot set configuration (value 0x%x)\n", get_cfg_desc(config)->bConfigurationValue);
+ goto __error;
+ }
for (i = 0; i < SNDRV_CARDS; i++)
if (enable[i] && ! usb_chip[i] &&
(vid[i] == -1 || vid[i] == dev->descriptor.idVendor) &&
@@ -2746,21 +2842,11 @@
snd_card_disconnect(card);
/* release the pcm resources */
list_for_each(p, &chip->pcm_list) {
- snd_usb_stream_t *as;
- int idx;
- as = list_entry(p, snd_usb_stream_t, list);
- for (idx = 0; idx < 2; idx++) {
- snd_usb_substream_t *subs;
- subs = &as->substream[idx];
- if (!subs->num_formats)
- continue;
- release_substream_urbs(subs, 1);
- subs->interface = -1;
- }
+ snd_usb_stream_disconnect(p, &usb_audio_driver);
}
/* release the midi resources */
list_for_each(p, &chip->midi_list) {
- snd_usbmidi_disconnect(p);
+ snd_usbmidi_disconnect(p, &usb_audio_driver);
}
up(®ister_mutex);
snd_card_free_in_thread(card);
diff -Nru a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h
--- a/sound/usb/usbaudio.h Sun Aug 3 13:14:49 2003
+++ b/sound/usb/usbaudio.h Sun Aug 3 13:14:49 2003
@@ -28,6 +28,7 @@
#define USB_SUBCLASS_AUDIO_CONTROL 0x01
#define USB_SUBCLASS_AUDIO_STREAMING 0x02
#define USB_SUBCLASS_MIDI_STREAMING 0x03
+#define USB_SUBCLASS_VENDOR_SPEC 0xff
#define USB_DT_CS_DEVICE 0x21
#define USB_DT_CS_CONFIG 0x22
@@ -154,7 +155,8 @@
#define QUIRK_MIDI_MIDIMAN 2
#define QUIRK_COMPOSITE 3
#define QUIRK_AUDIO_FIXED_ENDPOINT 4
-#define QUIRK_STANDARD_INTERFACE 5
+#define QUIRK_AUDIO_STANDARD_INTERFACE 5
+#define QUIRK_MIDI_STANDARD_INTERFACE 6
typedef struct snd_usb_audio_quirk snd_usb_audio_quirk_t;
typedef struct snd_usb_midi_endpoint_info snd_usb_midi_endpoint_info_t;
@@ -184,7 +186,7 @@
/* for QUIRK_AUDIO_FIXED_ENDPOINT, data points to an audioformat structure */
-/* for QUIRK_STANDARD_INTERFACE, data is NULL */
+/* for QUIRK_AUDIO/MIDI_STANDARD_INTERFACE, data is NULL */
/*
*/
@@ -201,7 +203,7 @@
int snd_usb_create_mixer(snd_usb_audio_t *chip, int ctrlif);
int snd_usb_create_midi_interface(snd_usb_audio_t *chip, struct usb_interface *iface, const snd_usb_audio_quirk_t *quirk);
-void snd_usbmidi_disconnect(struct list_head *p);
+void snd_usbmidi_disconnect(struct list_head *p, struct usb_driver *driver);
/*
* retrieve usb_interface descriptor from the host interface
diff -Nru a/sound/usb/usbmidi.c b/sound/usb/usbmidi.c
--- a/sound/usb/usbmidi.c Sun Aug 3 13:14:52 2003
+++ b/sound/usb/usbmidi.c Sun Aug 3 13:14:52 2003
@@ -693,12 +693,13 @@
/*
* Unlinks all URBs (must be done before the usb_device is deleted).
*/
-void snd_usbmidi_disconnect(struct list_head* p)
+void snd_usbmidi_disconnect(struct list_head* p, struct usb_driver *driver)
{
snd_usb_midi_t* umidi;
int i;
umidi = list_entry(p, snd_usb_midi_t, list);
+ usb_driver_release_interface(driver, umidi->iface);
for (i = 0; i < MIDI_MAX_ENDPOINTS; ++i) {
snd_usb_midi_endpoint_t* ep = &umidi->endpoints[i];
if (ep->out && ep->out->urb)
diff -Nru a/sound/usb/usbmixer.c b/sound/usb/usbmixer.c
--- a/sound/usb/usbmixer.c Sun Aug 3 13:14:47 2003
+++ b/sound/usb/usbmixer.c Sun Aug 3 13:14:47 2003
@@ -96,7 +96,7 @@
USB_FEATURE_AGC,
USB_FEATURE_DELAY,
USB_FEATURE_BASSBOOST,
- FSB_FEATURE_LOUDNESS
+ USB_FEATURE_LOUDNESS
};
enum {
@@ -1490,7 +1490,7 @@
int err;
const struct usbmix_ctl_map *map;
struct usb_device_descriptor *dev = &chip->dev->descriptor;
- struct usb_host_interface *hostif = &chip->dev->actconfig->interface[ctrlif].altsetting[0];
+ struct usb_host_interface *hostif = &chip->dev->actconfig->interface[ctrlif]->altsetting[0];
strcpy(chip->card->mixername, "USB Mixer");
diff -Nru a/sound/usb/usbmixer_maps.c b/sound/usb/usbmixer_maps.c
--- a/sound/usb/usbmixer_maps.c Sun Aug 3 13:14:52 2003
+++ b/sound/usb/usbmixer_maps.c Sun Aug 3 13:14:52 2003
@@ -89,6 +89,28 @@
{ 0 } /* terminator */
};
+/* Section "justlink_map" below added by James Courtier-Dutton <James@superbug.demon.co.uk>
+ * sourced from Maplin Electronics (http://www.maplin.co.uk), part number A56AK
+ * Part has 2 connectors that act as a single output. (TOSLINK Optical for digital out, and 3.5mm Jack for Analogue out.)
+ * The USB Mixer publishes a Microphone and extra Volume controls for it, but none exist on the device,
+ * so this map removes all unwanted sliders from alsamixer
+ */
+
+static struct usbmix_name_map justlink_map[] = {
+ /* 1: IT pcm playback */
+ /* 2: Not present */
+ { 3, NULL}, /* IT mic (No mic input on device) */
+ /* 4: Not present */
+ /* 5: OT speacker */
+ /* 6: OT pcm capture */
+ { 7, "Master Playback" }, /* Mute/volume for speaker */
+ { 8, NULL }, /* Capture Switch (No capture inputs on device) */
+ { 9, NULL }, /* Capture Mute/volume (No capture inputs on device */
+ /* 0xa: Not present */
+ /* 0xb: MU (w/o controls) */
+ { 0xc, NULL }, /* Mic feedback Mute/volume (No capture inputs on device) */
+ { 0 } /* terminator */
+};
/*
* Control map entries
@@ -96,6 +118,7 @@
static struct usbmix_ctl_map usbmix_ctl_maps[] = {
{ 0x41e, 0x3000, extigy_map },
+ { 0xc45, 0x1158, justlink_map },
{ 0 } /* terminator */
};
diff -Nru a/sound/usb/usbquirks.h b/sound/usb/usbquirks.h
--- a/sound/usb/usbquirks.h Sun Aug 3 13:14:47 2003
+++ b/sound/usb/usbquirks.h Sun Aug 3 13:14:47 2003
@@ -453,6 +453,36 @@
}
}
},
+{ /*
+ * This quirk is for the "Advanced Driver" mode of the Edirol UA-5.
+ * If the advanced mode switch at the back of the unit is off, the
+ * UA-5 has ID 0x0582/0x0011 and is standard compliant (no quirks),
+ * but offers only 16-bit PCM.
+ * In advanced mode, the UA-5 will output S24_3LE samples (two
+ * channels) at the rate indicated on the front switch, including
+ * the 96kHz sample rate.
+ */
+ USB_DEVICE(0x0582, 0x0010),
+ .driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
+ .vendor_name = "EDIROL",
+ .product_name = "UA-5",
+ .ifnum = QUIRK_ANY_INTERFACE,
+ .type = QUIRK_COMPOSITE,
+ .data = & (const snd_usb_audio_quirk_t[]) {
+ {
+ .ifnum = 1,
+ .type = QUIRK_AUDIO_STANDARD_INTERFACE
+ },
+ {
+ .ifnum = 2,
+ .type = QUIRK_AUDIO_STANDARD_INTERFACE
+ },
+ {
+ .ifnum = -1
+ }
+ }
+ }
+},
{
USB_DEVICE(0x0582, 0x0012),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
@@ -520,15 +550,15 @@
.data = & (const snd_usb_audio_quirk_t[]) {
{
.ifnum = 1,
- .type = QUIRK_STANDARD_INTERFACE
+ .type = QUIRK_AUDIO_STANDARD_INTERFACE
},
{
.ifnum = 2,
- .type = QUIRK_STANDARD_INTERFACE
+ .type = QUIRK_AUDIO_STANDARD_INTERFACE
},
{
.ifnum = 3,
- .type = QUIRK_STANDARD_INTERFACE
+ .type = QUIRK_MIDI_STANDARD_INTERFACE
},
{
.ifnum = -1
diff -Nru a/usr/gen_init_cpio.c b/usr/gen_init_cpio.c
--- a/usr/gen_init_cpio.c Sun Aug 3 13:14:49 2003
+++ b/usr/gen_init_cpio.c Sun Aug 3 13:14:49 2003
@@ -53,7 +53,7 @@
static void cpio_trailer(void)
{
char s[256];
- const char *name = "TRAILER!!!";
+ const char name[] = "TRAILER!!!";
sprintf(s, "%s%08X%08X%08lX%08lX%08X%08lX"
"%08X%08X%08X%08X%08X%08ZX%08X",