From: Christoph Lameter <christoph@lameter.com>
Add cacheline alignment to some critical SMP management maps. These are in
particular important for NUMA systems to avoid false sharing.
Signed-off-by: Christoph Lameter <christoph@lameter.com>
Signed-off-by: Shai Fultheim <Shai@Scalex86.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
25-akpm/arch/i386/kernel/smpboot.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff -puN arch/i386/kernel/smpboot.c~x86-cacheline-alignment-for-cpu-maps arch/i386/kernel/smpboot.c
--- 25/arch/i386/kernel/smpboot.c~x86-cacheline-alignment-for-cpu-maps 2005-03-15 23:23:13.000000000 -0800
+++ 25-akpm/arch/i386/kernel/smpboot.c 2005-03-15 23:23:13.000000000 -0800
@@ -66,7 +66,7 @@ int cpu_core_id[NR_CPUS]; /* Core ID of
EXPORT_SYMBOL(cpu_core_id);
/* bitmap of online cpus */
-cpumask_t cpu_online_map;
+cpumask_t cpu_online_map __cacheline_aligned;
cpumask_t cpu_callin_map;
cpumask_t cpu_callout_map;
@@ -474,10 +474,10 @@ extern struct {
#ifdef CONFIG_NUMA
/* which logical CPUs are on which nodes */
-cpumask_t node_2_cpu_mask[MAX_NUMNODES] =
+cpumask_t node_2_cpu_mask[MAX_NUMNODES] __cacheline_aligned =
{ [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
/* which node each logical CPU is on */
-int cpu_2_node[NR_CPUS] = { [0 ... NR_CPUS-1] = 0 };
+int cpu_2_node[NR_CPUS] __cacheline_aligned = { [0 ... NR_CPUS-1] = 0 };
EXPORT_SYMBOL(cpu_2_node);
/* set up a mapping between cpu and node. */
@@ -505,7 +505,8 @@ static inline void unmap_cpu_to_node(int
#endif /* CONFIG_NUMA */
-u8 cpu_2_logical_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = BAD_APICID };
+u8 cpu_2_logical_apicid[NR_CPUS] __cacheline_aligned =
+ { [0 ... NR_CPUS-1] = BAD_APICID };
static void map_cpu_to_logical_apicid(void)
{
_