master.kernel.org:/home/torvalds/BK/linux-2.6
torvalds@evo.osdl.org|ChangeSet|20050318233934|16463 torvalds
# This is a BitKeeper generated diff -Nru style patch.
#
# ChangeSet
# 2005/03/18 15:17:04-08:00 tony.luck@intel.com
# [IA64] Another fix for pgd_addr_end (last one was wrong).
#
# I confused the hole in the middle of a region when an implementation of
# the Itanium architecture doesn't implement all the virtual address bits
# with the actual layout in Linux. Linux doesn't put a hole in the middle
# of the region, it stacks all the address space that the page tables can
# reference at the start of the region.
#
# Thanks to Dave Miller (again) and Peter Chubb.
#
# Signed-off-by: Tony Luck <tony.luck@intel.com>
#
# include/asm-ia64/pgtable.h
# 2005/03/18 15:12:20-08:00 tony.luck@intel.com +15 -5
# Another fix for pgd_addr_end (last one was wrnog).
#
# ChangeSet
# 2005/03/18 13:46:48-08:00 schwidefsky@de.ibm.com
# [PATCH] s390: oprofile support
#
# Remove experimental tag from the s390 oprofile support.
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/s390/oprofile/Kconfig
# 2005/03/18 12:55:19-08:00 schwidefsky@de.ibm.com +2 -3
# s390: oprofile support
#
# ChangeSet
# 2005/03/18 13:46:29-08:00 ptiedem@de.ibm.com
# [PATCH] s390: ctc buffer size
#
# ctc network driver changes:
# - Allow to change the ctc buffer size while ctc is offline.
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# drivers/s390/net/ctcmain.c
# 2005/03/18 12:55:19-08:00 ptiedem@de.ibm.com +11 -7
# s390: ctc buffer size
#
# ChangeSet
# 2005/03/18 13:46:10-08:00 schwidefsky@de.ibm.com
# [PATCH] s390: missing timer ticks
#
# s390 core changes:
# - Fix missing timer ticks.
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# drivers/s390/cio/cio.c
# 2005/03/18 12:55:19-08:00 schwidefsky@de.ibm.com +5 -1
# s390: missing timer ticks
#
# arch/s390/kernel/time.c
# 2005/03/18 12:55:19-08:00 schwidefsky@de.ibm.com +10 -1
# s390: missing timer ticks
#
# arch/s390/kernel/s390_ext.c
# 2005/03/18 12:55:19-08:00 schwidefsky@de.ibm.com +4 -0
# s390: missing timer ticks
#
# ChangeSet
# 2005/03/18 13:45:52-08:00 holzheu@de.ibm.com
# [PATCH] s390: s390dbf permissions
#
# Use more specific permissions for the procfiles if s390dbf. Read only views
# should have read permission, write only views should have write permission.
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/s390/kernel/debug.c
# 2005/03/18 12:55:19-08:00 holzheu@de.ibm.com +5 -5
# s390: s390dbf permissions
#
# ChangeSet
# 2005/03/18 13:45:31-08:00 cohuck@de.ibm.com
# [PATCH] s390: device unregistering
#
# Common i/o layer changes:
# - Don't unregister devices from ccw_device_{on,off}line_notoper directly,
# but put the unregister on the ccw_device_work workqueue (as it is done
# for all other unregisters).
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# drivers/s390/cio/device_fsm.c
# 2005/03/18 12:55:18-08:00 cohuck@de.ibm.com +10 -6
# s390: device unregistering
#
# ChangeSet
# 2005/03/18 13:45:12-08:00 schwidefsky@de.ibm.com
# [PATCH] s390: add run_posix_cpu_timers to account_user_vtime
#
# The posix-timers patch introduces a call to run_posix_cpu_timers in
# update_process_times. The same call is required in the s390 private
# account_user_vtime function as well.
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/s390/kernel/vtime.c
# 2005/03/18 12:55:18-08:00 schwidefsky@de.ibm.com +2 -0
# s390: add run_posix_cpu_timers to account_user_vtime
#
# ChangeSet
# 2005/03/18 13:44:55-08:00 schwidefsky@de.ibm.com
# [PATCH] s390: define atomic_sub_return
#
# Add missing atomic_sub_return for skb_release_data.
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-s390/atomic.h
# 2005/03/18 12:55:18-08:00 schwidefsky@de.ibm.com +4 -0
# s390: define atomic_sub_return
#
# ChangeSet
# 2005/03/18 13:44:36-08:00 schwidefsky@de.ibm.com
# [PATCH] s390: system calls
#
# s390 system call fixes:
# - Add missing waitid and remap_file_pages system calls to s390.
# - Keep consistent naming scheme xxx_wrapper in compat_wrapper.S.
# - Remove #undef of __NR_getdents64 for 64 bit. The system call is
# present for 64 bit (linux_getdents and linux_getdents64 differ).
#
# Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-s390/unistd.h
# 2005/03/18 12:55:18-08:00 schwidefsky@de.ibm.com +3 -3
# s390: system calls
#
# arch/s390/kernel/syscalls.S
# 2005/03/18 12:55:18-08:00 schwidefsky@de.ibm.com +4 -3
# s390: system calls
#
# arch/s390/kernel/compat_wrapper.S
# 2005/03/18 12:55:18-08:00 schwidefsky@de.ibm.com +22 -4
# s390: system calls
#
# ChangeSet
# 2005/03/18 13:44:18-08:00 juhl-lkml@dif.dk
# [PATCH] mips: convert a remaining verify_area to access_ok
#
# Signed-off-by: Jesper Juhl <juhl-lkml@dif.dk>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-mips/uaccess.h
# 2005/03/18 12:55:18-08:00 juhl-lkml@dif.dk +4 -2
# mips: convert a remaining verify_area to access_ok
#
# ChangeSet
# 2005/03/18 13:44:00-08:00 paulus@samba.org
# [PATCH] ppc64: allow xmon=on,off,early
#
# allow 'xmon' or 'xmon=early' to enter xmon very early during boot. allow
# 'xmon=on' to just enable it, or 'xmon=off' to disable it.
#
# Signed-off-by: Olaf Hering <olh@suse.de>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/setup.c
# 2005/03/18 12:55:18-08:00 paulus@samba.org +6 -0
# ppc64: allow xmon=on,off,early
#
# ChangeSet
# 2005/03/18 13:43:42-08:00 paulus@samba.org
# [PATCH] ppc64: fix error cases in nvram partition scan
#
# The NVRAM on pSeries machines and powermacs is structured as a series of
# partitions, each of which has a header containing its length (including the
# header) and a header checksum. When the checksum was wrong or the length
# was zero, we would previously keep trying to scan through the partitions,
# possibly looping forever if the length was zero. This patch changes the
# behaviour to terminate the scan when a corrupted partition is found.
#
# Signed-off-by: Utz Bacher <utz.bacher@de.ibm.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/nvram.c
# 2005/03/18 12:55:17-08:00 paulus@samba.org +22 -12
# ppc64: fix error cases in nvram partition scan
#
# ChangeSet
# 2005/03/18 13:43:21-08:00 paulus@samba.org
# [PATCH] ppc64: remove unnecessary ISA ioports
#
# During boot, pSeries_request_regions() should only request I/O ports for
# legacy ISA in the case that ISA exists on the system. Add a check for
# this. This patch was suggested by Anton.
#
# Signed-off-by: John Rose <johnrose@austin.ibm.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/pSeries_pci.c
# 2005/03/18 12:55:17-08:00 paulus@samba.org +3 -0
# ppc64: remove unnecessary ISA ioports
#
# ChangeSet
# 2005/03/18 13:43:04-08:00 paulus@samba.org
# [PATCH] ppc64: make cpu hotplug play well with maxcpus and smt-enabled
#
# This patch allows you to boot a pSeries system with maxcpus=x or
# smt-enabled=off (or both) and bring up the offline cpus later from userspace,
# assuming the kernel was built with CONFIG_HOTPLUG_CPU=y.
#
# - Record cpus which were started from OF in a cpu map and use that instead
# of system_state to decide how to start a cpu in smp_startup_cpu.
#
# - Change the smp bootup logic slightly so that the path for bringing up
# secondary threads is exactly the same as hotplugging a cpu later from
# userspace.
#
# - Add a new function to smp_ops - cpu_bootable. This is implemented only by
# pSeries to filter out secondary threads during boot with smt-enabled=off.
# Another way this could be done is to change the kick_cpu member to return
# int and we can check for this case in smp_pSeries_kick_cpu.
#
# - Remove the games we play with cpu_present_map and the
# hard_smp_processor_id to handle smt-enabled=off, since they're now
# unnecessary.
#
# - Remove find_physical_cpu_to_start; assigning threads to logical slots
# should be done at bootup and at DLPAR time, not during a cpu online
# operation.
#
# One caveat: you need up-to-date firmware on Power5 for the maxcpus option to
# work on systems with more than one processor. Otherwise interrupts get
# misrouted, typically resulting in hangs or "unable to find root filesystem"
# problems.
#
# Tested on Power5 with and without CONFIG_HOTPLUG_CPU and with various
# combinations of the maxcpus= and smt-enabled= parameters.
#
# Signed-off-by: Nathan Lynch <ntl@pobox.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-ppc64/machdep.h
# 2005/03/18 12:55:17-08:00 paulus@samba.org +1 -0
# ppc64: make cpu hotplug play well with maxcpus and smt-enabled
#
# arch/ppc64/kernel/smp.c
# 2005/03/18 12:55:17-08:00 paulus@samba.org +2 -11
# ppc64: make cpu hotplug play well with maxcpus and smt-enabled
#
# arch/ppc64/kernel/setup.c
# 2005/03/18 12:55:50-08:00 paulus@samba.org +3 -9
# ppc64: make cpu hotplug play well with maxcpus and smt-enabled
#
# arch/ppc64/kernel/pSeries_smp.c
# 2005/03/18 12:55:17-08:00 paulus@samba.org +72 -111
# ppc64: make cpu hotplug play well with maxcpus and smt-enabled
#
# ChangeSet
# 2005/03/18 13:42:41-08:00 paulus@samba.org
# [PATCH] ppc64: use pSeries reconfig notifier for cpu DLPAR
#
# Use the pSeries_reconfig notifier API to handle processor addition and removal
# on pSeries LPAR. This is the "right" way to do it, as opposed to setting
# cpu_present_map = cpu_possible_map at boot (this is fixed in a following
# patch).
#
# Signed-off-by: Nathan Lynch <ntl@pobox.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/pSeries_smp.c
# 2005/03/18 12:55:50-08:00 paulus@samba.org +126 -0
# ppc64: use pSeries reconfig notifier for cpu DLPAR
#
# ChangeSet
# 2005/03/18 13:42:16-08:00 olh@suse.de
# [PATCH] ppc64: missing newline/carrige return in zImage
#
# Some eyecandy for zImage and zImage.initrd.
#
# Most OF implementations do not print a newline after their last line of
# output, so the "zImage starting..." appears right after the last number or
# netboot output.
#
# A zImage.initrd misses a carrige return to avoid a staircase effect.
#
# Tested on JS20.
#
# Signed-off-by: Olaf Hering <olh@suse.de>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/boot/main.c
# 2005/03/18 12:55:16-08:00 olh@suse.de +2 -2
# ppc64: missing newline/carrige return in zImage
#
# ChangeSet
# 2005/03/18 13:41:56-08:00 benh@kernel.crashing.org
# [PATCH] ppc64: thermal control for Xserve
#
# This patch adds support for Xserve G5 to the thermal control driver. It
# also adds a few updates to the desktop G5 code based from changes Apple did
# to their own drivers.
#
# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# drivers/macintosh/therm_pm72.h
# 2005/03/18 12:55:15-08:00 benh@kernel.crashing.org +54 -22
# ppc64: thermal control for Xserve
#
# drivers/macintosh/therm_pm72.c
# 2005/03/18 12:55:15-08:00 benh@kernel.crashing.org +427 -61
# ppc64: thermal control for Xserve
#
# ChangeSet
# 2005/03/18 13:41:39-08:00 kravetz@us.ibm.com
# [PATCH] ppc64: NUMA memory fixup (another try)
#
# Below is a new version of the patch that allows holes within nodes on ppc64
# NUMA. I would appreciate it if someone familiar with OF device tree
# parsing could take a look at this part of the code. So far, I've gotten
# this wrong twice. Patch was tested in various configurations on a G5 and
# OpenPower 720.
#
# Signed-off-by: Mike Kravetz <kravetz@us.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/mm/numa.c
# 2005/03/18 12:55:15-08:00 kravetz@us.ibm.com +104 -67
# ppc64: NUMA memory fixup (another try)
#
# ChangeSet
# 2005/03/18 13:41:20-08:00 sfr@canb.auug.org.au
# [PATCH] ppc64 iSeries: cleanup iSeries_setup
#
# This patch does some trivial cleanups on iSeries_setup.[ch]:
# - eliminiate warning about iommu_init_early_iSeries not being
# declared
# - remove trailing whitespace
# - change some functions to static
# - remove defunct function declarations
#
# Built and booted on iSeries.
#
# Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/iSeries_setup.h
# 2005/03/18 12:55:15-08:00 sfr@canb.auug.org.au +0 -11
# ppc64 iSeries: cleanup iSeries_setup
#
# arch/ppc64/kernel/iSeries_setup.c
# 2005/03/18 12:55:15-08:00 sfr@canb.auug.org.au +40 -42
# ppc64 iSeries: cleanup iSeries_setup
#
# ChangeSet
# 2005/03/18 13:41:02-08:00 sfr@canb.auug.org.au
# [PATCH] ppc64 iSeries: cleanup viopath
#
# I figured I might as well do some simple cleanups. This patch does:
#
# - single bit int bitfields are a bit suspect and Anndrew pointed out
# recently that they are probably slower to access than ints
#
# - get rid of some more studly caps
#
# - define the semaphore and the atomic in struct alloc_parms rather than
# pointers to them since we just allocate them on the stack anyway.
#
# - one small white space cleanup
#
# - use the HvLpIndexInvalid constant instead of ita value
#
# Built and booted on iSeries (which is the only place it is used).
#
# Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/viopath.c
# 2005/03/18 12:55:15-08:00 sfr@canb.auug.org.au +22 -25
# ppc64 iSeries: cleanup viopath
#
# ChangeSet
# 2005/03/18 13:40:44-08:00 paulus@samba.org
# [PATCH] ppc64: delete unused file iSeries_fixup.h
#
# This patch is from Domen Puncer <domen@coderock.org>.
#
# Remove nowhere referenced file. (egrep "filename\." didn't find anything)
#
# Signed-off-by: Domen Puncer <domen@coderock.org>
# Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# BitKeeper/deleted/.del-iSeries_fixup.h~69300e6725c4479
# 2005/03/18 13:40:32-08:00 paulus@samba.org +0 -0
# Delete: include/asm-ppc64/iSeries/iSeries_fixup.h
#
# ChangeSet
# 2005/03/18 13:40:25-08:00 paulus@samba.org
# [PATCH] ppc64: delete unused file no_initrd.c
#
# This patch is from Domen Puncer <domen@coderock.org>.
#
# Remove nowhere referenced file. (egrep "filename\." didn't find anything)
#
# Signed-off-by: Domen Puncer <domen@coderock.org>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# BitKeeper/deleted/.del-no_initrd.c~c32da4b842103bb3
# 2005/03/18 13:40:14-08:00 paulus@samba.org +0 -0
# Delete: arch/ppc64/boot/no_initrd.c
#
# ChangeSet
# 2005/03/18 13:40:06-08:00 paulus@samba.org
# [PATCH] ppc64: make RTAS code usable on non-pSeries machines
#
# This patch is from Arnd Bergmann <arndb@de.ibm.com>.
#
# RTAS is not actually pSeries specific, but some PPC64 code that relies on RTAS
# is currently protected by CONFIG_PPC_PSERIES.
#
# This introduces a generic configuration option PPC_RTAS that can be used by
# other subarchitectures as well. The existing option with the same name is
# renamed to the more specific RTAS_PROC.
#
# Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/oprofile/op_model_power4.c
# 2005/03/18 12:55:14-08:00 paulus@samba.org +1 -1
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/kernel/setup.c
# 2005/03/18 12:55:50-08:00 paulus@samba.org +2 -2
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/kernel/rtc.c
# 2005/03/18 12:55:14-08:00 paulus@samba.org +1 -1
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/kernel/prom.c
# 2005/03/18 12:55:51-08:00 paulus@samba.org +2 -2
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/kernel/misc.S
# 2005/03/18 12:55:14-08:00 paulus@samba.org +1 -1
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/kernel/entry.S
# 2005/03/18 12:55:14-08:00 paulus@samba.org +2 -2
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/kernel/Makefile
# 2005/03/18 12:55:51-08:00 paulus@samba.org +1 -1
# ppc64: make RTAS code usable on non-pSeries machines
#
# arch/ppc64/Kconfig
# 2005/03/18 12:55:14-08:00 paulus@samba.org +8 -3
# ppc64: make RTAS code usable on non-pSeries machines
#
# ChangeSet
# 2005/03/18 13:39:47-08:00 paulus@samba.org
# [PATCH] ppc64: kill might_sleep() warnings in __copy_*_user_inatomic
#
# This patch is from Arnd Bergmann and Olof Johansson.
#
# This implements the __copy_{to,from}_user_inatomic() functions on ppc64. The
# only difference between the inatomic and regular version is that inatomic does
# not call might_sleep() to detect possible faults while holding locks/elevated
# preempt counts.
#
# Signed-off-by: Arnd Bergmann <arnd@arndb.de>
# Acked-by: Olof Johansson <olof@austin.ibm.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-ppc64/uaccess.h
# 2005/03/18 12:55:14-08:00 paulus@samba.org +19 -8
# ppc64: kill might_sleep() warnings in __copy_*_user_inatomic
#
# ChangeSet
# 2005/03/18 13:39:27-08:00 paulus@samba.org
# [PATCH] ppc64: fix kprobes calling smp_processor_id when preemptible
#
# When booting with kprobes and preemption both enabled and
# CONFIG_DEBUG_PREEMPT=y, I get lots of warnings about smp_processor_id being
# called in preemptible code, from kprobe_exceptions_notify. On ppc64,
# interrupts and preemption are not disabled in the handlers for most
# synchronous exceptions such as breakpoints and page faults (interrupts are
# disabled in the very early exception entry code but are reenabled before
# calling the C handler).
#
# This patch adds a preempt_disable/enable pair to kprobe_exceptions_notify,
# and moves the preempt_disable() in kprobe_handler() to be done only in the
# case where we are about to single-step an instruction. This eliminates the
# bug warnings.
#
# From: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
#
# The patch is fine, but it seems to break jprobes - we have an unbalanced
# preempt_enable/disable path while handling jprobes. Patch below is
# against 2.6.11-mm4 and fixes the issue.
#
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/kprobes.c
# 2005/03/18 12:51:48-08:00 paulus@samba.org +17 -9
# ppc64: fix kprobes calling smp_processor_id when preemptible
#
# ChangeSet
# 2005/03/18 13:39:10-08:00 waite@skycomputers.com
# [PATCH] ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# The Sky Computers HDPU compute blade is an embedded compute platform for
# the Sky Computers SMARTpac 600/1200 series. The blade consists of
# ppc7445/ppc7447A UP or SMP, Marvell Discovery II, 100 BaseT ethernet, a
# single PCI/PCI-X slot, and a PCI-X on-board Infiniband device.
#
# This patch contains drivers for enhanced features of the HDPU compute
# blade. Namely, 2 drivers for registers used by the Health monitoring
# co-processor. The cpustate register is a write only register used to
# convey critical states to the health monitor and the nexus registers
# provides a read-only interface from the health monitoring system to provide
# location based information.
#
# Signed-off-by: Brian Waite <waite@skycomputers.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/linux/hdpu_features.h
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +26 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# drivers/misc/hdpuftrs/hdpu_nexus.c
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +111 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# drivers/misc/hdpuftrs/Makefile
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +1 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# include/linux/hdpu_features.h
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/include/linux/hdpu_features.h
#
# drivers/misc/hdpuftrs/hdpu_nexus.c
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/drivers/misc/hdpuftrs/hdpu_nexus.c
#
# drivers/misc/hdpuftrs/Makefile
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/drivers/misc/hdpuftrs/Makefile
#
# drivers/misc/Makefile
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +1 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# arch/ppc/platforms/hdpu.c
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +78 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# arch/ppc/Kconfig
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +6 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# drivers/misc/hdpuftrs/hdpu_cpustate.c
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +234 -0
# ppc32: add support for Sky Computers HDPU Compute blade enhanced features
#
# drivers/misc/hdpuftrs/hdpu_cpustate.c
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/drivers/misc/hdpuftrs/hdpu_cpustate.c
#
# ChangeSet
# 2005/03/18 13:38:51-08:00 ntl@pobox.com
# [PATCH] ppc64: rtasd shouldn't hold cpucontrol while sleeping
#
# The rtasd thread should not hold the cpucontrol semaphore while sleeping
# between event scans in its first pass; it needlessly delays boot by one
# second per cpu when CONFIG_HOTPLUG_CPU=y.
#
# Signed-off-by: Nathan Lynch <ntl@pobox.com>
# Signed-off-by: Paul Mackerras <paulus@samba.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc64/kernel/rtasd.c
# 2005/03/18 12:51:33-08:00 ntl@pobox.com +30 -31
# ppc64: rtasd shouldn't hold cpucontrol while sleeping
#
# ChangeSet
# 2005/03/18 13:38:22-08:00 waite@skycomputers.com
# [PATCH] ppc32: add support for Sky Computers HDPU Compute blade
#
# The Sky Computers HDPU compute blade is an embedded compute platform for
# the Sky Computers SMARTpac 600/1200 series. A blade consists of
# ppc7445/ppc7447A, Marvell Discovery II, 100 BaseT ethernet, a single
# PCI/PCI-X slot, and a PCI-X on-board Infiniband device.
#
# This patch contains the base platform support required for booting Linux.
#
# Signed-off-by: Brian Waite <waite@skycomputers.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/hdpu.h
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +82 -0
# ppc32: add support for Sky Computers HDPU Compute blade
#
# arch/ppc/platforms/hdpu.c
# 2005/03/18 12:55:53-08:00 waite@skycomputers.com +994 -0
# ppc32: add support for Sky Computers HDPU Compute blade
#
# arch/ppc/syslib/Makefile
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +1 -0
# ppc32: add support for Sky Computers HDPU Compute blade
#
# arch/ppc/platforms/hdpu.h
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/platforms/hdpu.h
#
# arch/ppc/platforms/hdpu.c
# 2005/03/18 12:55:53-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/platforms/hdpu.c
#
# arch/ppc/platforms/Makefile
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +1 -0
# ppc32: add support for Sky Computers HDPU Compute blade
#
# arch/ppc/configs/hdpu_defconfig
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +890 -0
# ppc32: add support for Sky Computers HDPU Compute blade
#
# arch/ppc/Kconfig
# 2005/03/18 12:55:53-08:00 waite@skycomputers.com +6 -1
# ppc32: add support for Sky Computers HDPU Compute blade
#
# arch/ppc/configs/hdpu_defconfig
# 2005/03/18 12:51:33-08:00 waite@skycomputers.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/configs/hdpu_defconfig
#
# ChangeSet
# 2005/03/18 13:37:48-08:00 tnt@246tNt.com
# [PATCH] ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# These clean-ups are mainly missing __iomem qualifier, unnecessary (and
# 'wrong') casting, missing static.
#
# Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
# Acked-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# drivers/serial/mpc52xx_uart.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +6 -6
# ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# arch/ppc/syslib/mpc52xx_setup.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +13 -13
# ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# arch/ppc/syslib/mpc52xx_pic.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +9 -14
# ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# arch/ppc/platforms/mpc5200.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +1 -1
# ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# arch/ppc/platforms/lite5200.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +3 -4
# ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# arch/ppc/boot/simple/mpc52xx_tty.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +7 -6
# ppc32: sparse clean ups for the Freescale MPC52xx related code
#
# ChangeSet
# 2005/03/18 13:37:25-08:00 benh@kernel.crashing.org
# [PATCH] ppc32: Add pegasos ethernet support
#
# This patch declares the necessary platform device on the pegasos platform
# so that the mv643xx eth driver can be used on it.
#
# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
# Signed-off-by: Sven Luther <sven.luther@wanadoo.fr>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/chrp_pegasos_eth.c
# 2005/03/18 12:51:33-08:00 benh@kernel.crashing.org +101 -0
# ppc32: Add pegasos ethernet support
#
# arch/ppc/platforms/Makefile
# 2005/03/18 12:55:53-08:00 benh@kernel.crashing.org +2 -1
# ppc32: Add pegasos ethernet support
#
# arch/ppc/platforms/chrp_pegasos_eth.c
# 2005/03/18 12:51:33-08:00 benh@kernel.crashing.org +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/platforms/chrp_pegasos_eth.c
#
# ChangeSet
# 2005/03/18 13:37:05-08:00 tnt@246tNt.com
# [PATCH] ppc32: Add PCI bus support for Freescale MPC52xx
#
# Note that this support has "known" problem but theses are believed to be
# due to hardware issues.
#
# Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
# Acked-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/syslib/mpc52xx_pci.h
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +139 -0
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# include/linux/pci_ids.h
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +1 -0
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# include/asm-ppc/mpc52xx.h
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +2 -0
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# arch/ppc/syslib/mpc52xx_pci.h
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/syslib/mpc52xx_pci.h
#
# arch/ppc/syslib/mpc52xx_pci.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +235 -0
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# arch/ppc/syslib/Makefile
# 2005/03/18 12:55:53-08:00 tnt@246tNt.com +3 -0
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# arch/ppc/platforms/lite5200.c
# 2005/03/18 12:55:53-08:00 tnt@246tNt.com +34 -3
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# arch/ppc/Kconfig
# 2005/03/18 12:55:53-08:00 tnt@246tNt.com +1 -1
# ppc32: Add PCI bus support for Freescale MPC52xx
#
# arch/ppc/syslib/mpc52xx_pci.c
# 2005/03/18 12:51:32-08:00 tnt@246tNt.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/syslib/mpc52xx_pci.c
#
# ChangeSet
# 2005/03/18 13:36:44-08:00 galak@freescale.com
# [PATCH] ppc32: Fix FEC ethernet intialization on MPC8540 ADS board
#
# The PHY interrupt for the DM9121 PHY connected to the FEC ethernet port
# does not work on the MPC8540 ADS board. If we tell the driver that the PHY
# does not have an interrupt the FEC works properly on the MPC8540 ADS board.
#
# Signed-off-by: Roy Zang
# Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/85xx/mpc8540_ads.c
# 2005/03/18 12:51:32-08:00 galak@freescale.com +1 -1
# ppc32: Fix FEC ethernet intialization on MPC8540 ADS board
#
# ChangeSet
# 2005/03/18 13:36:24-08:00 mgreer@mvista.com
# [PATCH] ppc32: Clean up mv64x60 bootwrapper support
#
# This patch removes the call to mv64x60_init() in
# arch/ppc/boot/simple/head.S and now uses the 'load_kernel()' hook to call
# to have mv64x60-specific code called. This means that the mv64x60 code
# will be called after the bootwrapper has relocated itself. The platforms
# affected by this change are updated by this patch as well.
#
# Signed-off-by: Mark A. Greer <mgreer@mvista.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/boot/simple/misc-mv64x60.c
# 2005/03/18 13:36:06-08:00 mgreer@mvista.com +61 -0
#
# arch/ppc/boot/simple/misc-ev64260.c
# 2005/03/18 13:36:06-08:00 mgreer@mvista.com +57 -0
#
# arch/ppc/boot/simple/mv64x60_tty.c
# 2005/03/18 12:51:32-08:00 mgreer@mvista.com +54 -78
# ppc32: Clean up mv64x60 bootwrapper support
#
# arch/ppc/boot/simple/misc-radstone_ppc7d.c
# 2005/03/18 12:51:32-08:00 mgreer@mvista.com +13 -6
# ppc32: Clean up mv64x60 bootwrapper support
#
# arch/ppc/boot/simple/misc-mv64x60.c
# 2005/03/18 13:36:06-08:00 mgreer@mvista.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/boot/simple/misc-mv64x60.c
#
# arch/ppc/boot/simple/misc-katana.c
# 2005/03/18 12:51:32-08:00 mgreer@mvista.com +24 -2
# ppc32: Clean up mv64x60 bootwrapper support
#
# arch/ppc/boot/simple/misc-ev64260.c
# 2005/03/18 13:36:06-08:00 mgreer@mvista.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/boot/simple/misc-ev64260.c
#
# arch/ppc/boot/simple/misc-cpci690.c
# 2005/03/18 12:51:32-08:00 mgreer@mvista.com +13 -1
# ppc32: Clean up mv64x60 bootwrapper support
#
# arch/ppc/boot/simple/head.S
# 2005/03/18 12:51:32-08:00 mgreer@mvista.com +0 -5
# ppc32: Clean up mv64x60 bootwrapper support
#
# arch/ppc/boot/simple/Makefile
# 2005/03/18 12:51:32-08:00 mgreer@mvista.com +3 -3
# ppc32: Clean up mv64x60 bootwrapper support
#
# arch/ppc/boot/simple/misc-chestnut.c
# 2005/03/18 13:36:03-08:00 mgreer@mvista.com +35 -0
#
# arch/ppc/boot/simple/misc-chestnut.c
# 2005/03/18 13:36:03-08:00 mgreer@mvista.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/ppc/boot/simple/misc-chestnut.c
#
# BitKeeper/deleted/.del-mv64x60_stub.c~c6f5add23488ba20
# 2005/03/18 13:36:03-08:00 mgreer@mvista.com +0 -0
# Delete: arch/ppc/boot/simple/mv64x60_stub.c
#
# BitKeeper/deleted/.del-misc-mv64x60.S~780744cb78a3308e
# 2005/03/18 13:36:02-08:00 mgreer@mvista.com +0 -0
# Delete: arch/ppc/boot/simple/misc-mv64x60.S
#
# BitKeeper/deleted/.del-misc-ev64260.S~4edfd91bed21e45f
# 2005/03/18 13:36:02-08:00 mgreer@mvista.com +0 -0
# Delete: arch/ppc/boot/simple/misc-ev64260.S
#
# BitKeeper/deleted/.del-misc-chestnut.S~ffe8d6e861c3e926
# 2005/03/18 13:36:01-08:00 mgreer@mvista.com +0 -0
# Delete: arch/ppc/boot/simple/misc-chestnut.S
#
# ChangeSet
# 2005/03/18 13:35:33-08:00 mgreer@mvista.com
# [PATCH] ppc32: update Radstone ppc7d platform
#
# - Recent mv643xx #define name changes broke the PPC7D platform compile.
# Fixed by this patch.
#
# - Change default platform config to add mv643xx_eth and mv64xxx-i2c
# config options.
#
# - Add i2c platform data and update to cope with recent platform device
# name change.
#
# Signed-off-by: James Chapman <jchapman@katalix.com>
# Signed-off-by: Mark A. Greer <mgreer@mvista.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/radstone_ppc7d.c
# 2005/03/18 12:51:31-08:00 mgreer@mvista.com +58 -14
# ppc32: update Radstone ppc7d platform
#
# arch/ppc/configs/radstone_ppc7d_defconfig
# 2005/03/18 12:51:31-08:00 mgreer@mvista.com +115 -29
# ppc32: update Radstone ppc7d platform
#
# ChangeSet
# 2005/03/18 13:35:15-08:00 mgreer@mvista.com
# [PATCH] ppc32: Patch for changed dev->bus_id format
#
# - Recent changes to drivers/base/platform.c:platform_device_register()
# changed the format of dev->bus_id (there is now a '.' between the name &
# instance (e.g., the old mpsc0 is now mpsc.0)). This field is used by
# some platform's platform_notify() routine to identify the dev entry.
# This patch updates the bus_id value compared to include the dot.
#
# - Fix an bad macro name change by a previous patch.
#
# - Some coding style fixups, etc.
#
# Signed-off-by: Mark A. Greer <mgreer@mvista.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/katana.c
# 2005/03/18 12:51:31-08:00 mgreer@mvista.com +5 -5
# ppc32: Patch for changed dev->bus_id format
#
# arch/ppc/platforms/ev64260.c
# 2005/03/18 12:51:31-08:00 mgreer@mvista.com +3 -3
# ppc32: Patch for changed dev->bus_id format
#
# arch/ppc/platforms/cpci690.h
# 2005/03/18 12:51:31-08:00 mgreer@mvista.com +5 -0
# ppc32: Patch for changed dev->bus_id format
#
# arch/ppc/platforms/cpci690.c
# 2005/03/18 12:51:31-08:00 mgreer@mvista.com +9 -30
# ppc32: Patch for changed dev->bus_id format
#
# ChangeSet
# 2005/03/18 13:34:57-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Update 8260_io/fcc_enet.c to function again
#
# There's too many things in here that've sat too long (I'd been hoping to
# just delete the driver, but that hasn't happened yet, so). A cobbled
# together list of changes is:
#
# - Update MDIO support for workqueues.
# - Make use of <linux/mii.h>
# - Add RPX6 support.
# - Comment out set_multicast_list (broken).
# - Rework tx_ring stuff so we have tx_free, not tx_Full/n_pkts.
# - Other PHY updates/fixes.
# - Leo Li: Rework FCC clock configuration, make it easier.
# - 2.4 : VLAN header room, other misc bits.
# - Kill MII_REG_NNN in favor of defines from <linux/mii.h>
# - DM9161 PHY support (2.4, Myself & alebas@televes.com)
# - PQ2ADS and PQ2FADS support bits (Myself & alebas@televes.com
#
# From: Leo Li <leoli@freescale.com>
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Alexandre Bastos <alebas@televes.com>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-ppc/cpm2.h
# 2005/03/18 12:51:31-08:00 trini@kernel.crashing.org +1 -0
# ppc32: Update 8260_io/fcc_enet.c to function again
#
# arch/ppc/8260_io/fcc_enet.c
# 2005/03/18 12:51:31-08:00 trini@kernel.crashing.org +670 -299
# ppc32: Update 8260_io/fcc_enet.c to function again
#
# arch/ppc/8260_io/Kconfig
# 2005/03/18 12:51:31-08:00 trini@kernel.crashing.org +9 -2
# ppc32: Update 8260_io/fcc_enet.c to function again
#
# ChangeSet
# 2005/03/18 13:34:37-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Fix a typo on 8260
#
# This fixes a lingering typo in arch/ppc/boot/simple/m8260_tty.c
#
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/boot/simple/m8260_tty.c
# 2005/03/18 12:51:31-08:00 trini@kernel.crashing.org +1 -1
# ppc32: Fix a typo on 8260
#
# ChangeSet
# 2005/03/18 13:34:08-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Serial fix for PAL4
#
# Add PAL4's bit to <asm-ppc/serial.h>
#
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-ppc/serial.h
# 2005/03/18 12:51:31-08:00 trini@kernel.crashing.org +2 -0
# ppc32: Serial fix for PAL4
#
# ChangeSet
# 2005/03/18 13:33:38-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Better comment arch/ppc/syslib/cpc700.h
#
# This adds better comments to arch/ppc/syslib/cpc700.h
#
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/syslib/cpc700.h
# 2005/03/18 12:51:31-08:00 trini@kernel.crashing.org +16 -10
# ppc32: Better comment arch/ppc/syslib/cpc700.h
#
# ChangeSet
# 2005/03/18 13:33:17-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Lindent include/asm-ppc/dma.h
#
# This originally came from Paul, back in July of 2003. Run Lindent over
# include/asm-ppc/dma.h
#
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-ppc/dma.h
# 2005/03/18 12:51:30-08:00 trini@kernel.crashing.org +55 -59
# ppc32: Lindent include/asm-ppc/dma.h
#
# ChangeSet
# 2005/03/18 13:32:53-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Delete arch/ppc/syslib/ppc4xx_serial.c
#
# arch/ppc/syslib/ppc4xx_serial.c is unused cruft, delete.
#
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# BitKeeper/deleted/.del-ppc4xx_serial.c~8104ba34d96cf741
# 2005/03/18 13:32:42-08:00 trini@kernel.crashing.org +0 -0
# Delete: arch/ppc/syslib/ppc4xx_serial.c
#
# ChangeSet
# 2005/03/18 13:32:35-08:00 trini@kernel.crashing.org
# [PATCH] ppc32: Fix a warning in planb video driver
#
# [ aside: This has been sitting in the linuxppc-2.5 bk tree for I don't
# know how long. And the driver is still horribly broken. ]
#
# The following patch moves overlay_is_active to before its first use. It
# was originally written when gcc wouldn't complain, but now does, about not
# having the definition before usage.
#
# Signed-off-by: Tom Rini <trini@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# drivers/media/video/planb.c
# 2005/03/18 12:51:30-08:00 trini@kernel.crashing.org +10 -10
# ppc32: Fix a warning in planb video driver
#
# ChangeSet
# 2005/03/18 13:32:14-08:00 benh@kernel.crashing.org
# [PATCH] ppc32: Add virtual DMA support to legacy floppy driver
#
# This patch adds support for pseudo-dma transfers on ppc32 for the legacy
# floppy driver. It is useful on some machines like pegasos where the legacy
# DMA doesn't seem to work properly (possibly to the lack of a "legacy" DMA zone
# on ppc32).
#
# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
# Signed-off-by: Pavel Fedin <sonic_amiga@rambler.ru>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-ppc/floppy.h
# 2005/03/18 12:51:30-08:00 benh@kernel.crashing.org +137 -16
# ppc32: Add virtual DMA support to legacy floppy driver
#
# ChangeSet
# 2005/03/18 13:31:55-08:00 benh@kernel.crashing.org
# [PATCH] ppc32: Update PowerMac models table
#
# This patch updates the table of PowerMac models, adding the Mac mini, a few
# missing ones in older slots too, and sorts it in a more logical way.
#
# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/pmac_feature.c
# 2005/03/18 12:51:30-08:00 benh@kernel.crashing.org +114 -75
# ppc32: Update PowerMac models table
#
# ChangeSet
# 2005/03/18 13:31:36-08:00 benh@kernel.crashing.org
# [PATCH] ppc32: Fix overflow in cpuinfo freq. display
#
# The CPU frequency in /proc/cpuinfo would overflow because of a signed/unsigned
# bug. This fixes it.
#
# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/kernel/setup.c
# 2005/03/18 12:51:30-08:00 benh@kernel.crashing.org +3 -2
# ppc32: Fix overflow in cpuinfo freq. display
#
# ChangeSet
# 2005/03/18 13:31:16-08:00 benh@kernel.crashing.org
# [PATCH] ppc32: Fix PowerMac cpufreq for newer machines
#
# This patch fixes the cpufreq support for newer machines, including latest
# Apple laptops using the 7447A CPU. With this patch, it should now
# propertly detect that the CPU is booting low speed on some models, and let
# you switch it to full speed (previously, /proc/cpuinfo would display the
# frequency of the full speed CPU but it was really running low speed).
#
# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
# Signed-off-by: Andrew Morton <akpm@osdl.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/ppc/platforms/pmac_cpufreq.c
# 2005/03/18 12:51:29-08:00 benh@kernel.crashing.org +15 -14
# ppc32: Fix PowerMac cpufreq for newer machines
#
# ChangeSet
# 2005/03/18 10:45:06-08:00 herbert@gondor.apana.org.au
# [NET]: Make dst_allfrag use dst instead of dst->path
#
# > BTW, shouldn't dst_allfrag be called dst_path_allfrag?
#
# Rather than doing that, let's make the path usage explicit in
# the one place that it's needed (the same place where we use
# dst_mtu(dst->path)).
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv6/ip6_output.c
# 2005/03/18 10:44:52-08:00 herbert@gondor.apana.org.au +1 -1
# [NET]: Make dst_allfrag use dst instead of dst->path
#
# > BTW, shouldn't dst_allfrag be called dst_path_allfrag?
#
# Rather than doing that, let's make the path usage explicit in
# the one place that it's needed (the same place where we use
# dst_mtu(dst->path)).
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/net/dst.h
# 2005/03/18 10:44:52-08:00 herbert@gondor.apana.org.au +1 -1
# [NET]: Make dst_allfrag use dst instead of dst->path
#
# > BTW, shouldn't dst_allfrag be called dst_path_allfrag?
#
# Rather than doing that, let's make the path usage explicit in
# the one place that it's needed (the same place where we use
# dst_mtu(dst->path)).
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:43:40-08:00 herbert@gondor.apana.org.au
# [NET]: Kill dst_pmtu/dst_path_metric
#
# This would have been the patch that removed dst->path. But
# ip_append_data got in the way :)
#
# However, using dst->path is only needed rarely and should always
# require a bit of deliberation. So let's get rid of dst_pmtu
# and dst_path_metric and use dst_mtu and dst_metric directly.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv6/ip6_output.c
# 2005/03/18 10:43:26-08:00 herbert@gondor.apana.org.au +1 -1
# [NET]: Kill dst_pmtu/dst_path_metric
#
# This would have been the patch that removed dst->path. But
# ip_append_data got in the way :)
#
# However, using dst->path is only needed rarely and should always
# require a bit of deliberation. So let's get rid of dst_pmtu
# and dst_path_metric and use dst_mtu and dst_metric directly.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/ip_output.c
# 2005/03/18 10:43:26-08:00 herbert@gondor.apana.org.au +1 -1
# [NET]: Kill dst_pmtu/dst_path_metric
#
# This would have been the patch that removed dst->path. But
# ip_append_data got in the way :)
#
# However, using dst->path is only needed rarely and should always
# require a bit of deliberation. So let's get rid of dst_pmtu
# and dst_path_metric and use dst_mtu and dst_metric directly.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/net/dst.h
# 2005/03/18 10:43:26-08:00 herbert@gondor.apana.org.au +1 -16
# [NET]: Kill dst_pmtu/dst_path_metric
#
# This would have been the patch that removed dst->path. But
# ip_append_data got in the way :)
#
# However, using dst->path is only needed rarely and should always
# require a bit of deliberation. So let's get rid of dst_pmtu
# and dst_path_metric and use dst_mtu and dst_metric directly.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:42:32-08:00 herbert@gondor.apana.org.au
# [NET]: Kill unnecessary uses of dst_path_metric
#
# This gets rid of the last unnecessary use of dst_path_metric. In
# decnet dst->path is always equal to dst.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/decnet/af_decnet.c
# 2005/03/18 10:42:16-08:00 herbert@gondor.apana.org.au +2 -2
# [NET]: Kill unnecessary uses of dst_path_metric
#
# This gets rid of the last unnecessary use of dst_path_metric. In
# decnet dst->path is always equal to dst.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:41:41-08:00 herbert@gondor.apana.org.au
# [IPSEC]: Get ttl from child instead of path
#
# Now that dst_pmtu is almost gone let's do the same to dst_path_metric.
# I've only found one legitimate use of it and that's the one that was
# recently added in dst_allfrag.
#
# This patch makes xfrm4_encap/xfrm6_encap use dst->child instead of
# dst->path so that we choose the correct route to get the hoplimit
# from when nested tunnels are present.
#
# For simple tunnels dst->child == dst->path so there is no change.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv6/xfrm6_output.c
# 2005/03/18 10:41:26-08:00 herbert@gondor.apana.org.au +1 -1
# [IPSEC]: Get ttl from child instead of path
#
# Now that dst_pmtu is almost gone let's do the same to dst_path_metric.
# I've only found one legitimate use of it and that's the one that was
# recently added in dst_allfrag.
#
# This patch makes xfrm4_encap/xfrm6_encap use dst->child instead of
# dst->path so that we choose the correct route to get the hoplimit
# from when nested tunnels are present.
#
# For simple tunnels dst->child == dst->path so there is no change.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/xfrm4_output.c
# 2005/03/18 10:41:26-08:00 herbert@gondor.apana.org.au +1 -1
# [IPSEC]: Get ttl from child instead of path
#
# Now that dst_pmtu is almost gone let's do the same to dst_path_metric.
# I've only found one legitimate use of it and that's the one that was
# recently added in dst_allfrag.
#
# This patch makes xfrm4_encap/xfrm6_encap use dst->child instead of
# dst->path so that we choose the correct route to get the hoplimit
# from when nested tunnels are present.
#
# For simple tunnels dst->child == dst->path so there is no change.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:39:12-08:00 herbert@gondor.apana.org.au
# [IPV4]: Kill remaining unnecessary uses of dst_pmtu
#
# Once again here is a couple of trivial dst_pmtu/dst_mtu replacements.
# In both locations, we can only have simple dst entries which means
# that dst == dst->path.
#
# BTW, this is the rule that we should apply in future for uses of
# dst_mtu/dst_pmtu (or other metrics on dst). If the only dst's that
# can appear are simple dst's (dst == dst->path), then we should use
# dst_mtu or dst_metric. If dst != dst->path, then whoever is writing
# the code will need to think about which of dst or dst->path is the
# right one.
#
# In most instances dst will be the one. However, as we have seen in
# ip_append_data, dst->path may be needed rarely. In particular, if
# we're doing fragmentation immediately after IPsec, then you may need
# it.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/netfilter/ip_conntrack_standalone.c
# 2005/03/18 10:38:59-08:00 herbert@gondor.apana.org.au +1 -1
# [IPV4]: Kill remaining unnecessary uses of dst_pmtu
#
# Once again here is a couple of trivial dst_pmtu/dst_mtu replacements.
# In both locations, we can only have simple dst entries which means
# that dst == dst->path.
#
# BTW, this is the rule that we should apply in future for uses of
# dst_mtu/dst_pmtu (or other metrics on dst). If the only dst's that
# can appear are simple dst's (dst == dst->path), then we should use
# dst_mtu or dst_metric. If dst != dst->path, then whoever is writing
# the code will need to think about which of dst or dst->path is the
# right one.
#
# In most instances dst will be the one. However, as we have seen in
# ip_append_data, dst->path may be needed rarely. In particular, if
# we're doing fragmentation immediately after IPsec, then you may need
# it.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/ipvs/ip_vs_xmit.c
# 2005/03/18 10:38:59-08:00 herbert@gondor.apana.org.au +5 -5
# [IPV4]: Kill remaining unnecessary uses of dst_pmtu
#
# Once again here is a couple of trivial dst_pmtu/dst_mtu replacements.
# In both locations, we can only have simple dst entries which means
# that dst == dst->path.
#
# BTW, this is the rule that we should apply in future for uses of
# dst_mtu/dst_pmtu (or other metrics on dst). If the only dst's that
# can appear are simple dst's (dst == dst->path), then we should use
# dst_mtu or dst_metric. If dst != dst->path, then whoever is writing
# the code will need to think about which of dst or dst->path is the
# right one.
#
# In most instances dst will be the one. However, as we have seen in
# ip_append_data, dst->path may be needed rarely. In particular, if
# we're doing fragmentation immediately after IPsec, then you may need
# it.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:37:41-08:00 herbert@gondor.apana.org.au
# [NETFILTER]: Use correct IPSEC MTU in TCPMSS
#
# This patch makes ipt_TCPMSS use the correct MTU value for clamping.
# This is a bit tricky actually since TCPMSS can be used in FORWARD,
# LOCAL_OUT as well as POST_ROUTING.
#
# In the first two cases we haven't performed IPsec yet so dst_mtu
# obviously does the right thing. As it is, POST_ROUTING is performed
# after xfrm_output so MSS clamping is useless there.
#
# With Patrick's IPsec netfilter stuff, there will be a POST_ROUTING
# processing before IPsec processing, in which case dst_mtu also returns
# exactly what we want.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/netfilter/ipt_TCPMSS.c
# 2005/03/18 10:37:27-08:00 herbert@gondor.apana.org.au +3 -3
# [NETFILTER]: Use correct IPSEC MTU in TCPMSS
#
# This patch makes ipt_TCPMSS use the correct MTU value for clamping.
# This is a bit tricky actually since TCPMSS can be used in FORWARD,
# LOCAL_OUT as well as POST_ROUTING.
#
# In the first two cases we haven't performed IPsec yet so dst_mtu
# obviously does the right thing. As it is, POST_ROUTING is performed
# after xfrm_output so MSS clamping is useless there.
#
# With Patrick's IPsec netfilter stuff, there will be a POST_ROUTING
# processing before IPsec processing, in which case dst_mtu also returns
# exactly what we want.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:36:23-08:00 herbert@gondor.apana.org.au
# [IPV4]: Fix MTU check in ipmr_queue_xmit
#
# Somehow I missed four files with dst_pmtu usages in them. I'm going
# to split them along the sames lines I did before: bug fixes and then
# the trivial changes.
#
# Here is a patch that replaces dst_pmtu with dst_pmtu in ipmr.c
# since this is straight IPIP tunneling equivalent to what we have
# in ipip.c.
#
# As it is we may send ICMP packets when IPsec is present which is
# exactly what the comment says that we shouldn't do.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/ipmr.c
# 2005/03/18 10:36:11-08:00 herbert@gondor.apana.org.au +1 -1
# [IPV4]: Fix MTU check in ipmr_queue_xmit
#
# Somehow I missed four files with dst_pmtu usages in them. I'm going
# to split them along the sames lines I did before: bug fixes and then
# the trivial changes.
#
# Here is a patch that replaces dst_pmtu with dst_pmtu in ipmr.c
# since this is straight IPIP tunneling equivalent to what we have
# in ipip.c.
#
# As it is we may send ICMP packets when IPsec is present which is
# exactly what the comment says that we shouldn't do.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:34:53-08:00 shenkel@gmail.com
# [TUN]: Align only ethernet packets to NET_IP_ALIGN.
#
# Signed-off-by: Sven Henkel <shenkel@gmail.com>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# drivers/net/tun.c
# 2005/03/18 10:34:38-08:00 shenkel@gmail.com +7 -3
# [TUN]: Align only ethernet packets to NET_IP_ALIGN.
#
# Signed-off-by: Sven Henkel <shenkel@gmail.com>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 10:30:20-08:00 shenkel@gmail.com
# [NETPOLL]: Align UDP packets to NET_IP_ALIGN.
#
# This avoids unnecessary alignment traps on some
# platforms.
#
# Signed-off-by: Sven Henkel <shenkel@gmail.com>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/core/netpoll.c
# 2005/03/18 10:30:04-08:00 shenkel@gmail.com +1 -1
# [NETPOLL]: Align UDP packets to NET_IP_ALIGN.
#
# This avoids unnecessary alignment traps on some
# platforms.
#
# Signed-off-by: Sven Henkel <shenkel@gmail.com>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/18 08:01:17-08:00 tali@admingilde.org
# [PATCH] docbook: fix escaping of kernel-doc
#
# This fixes a bug I introduced with the last patches of the DocBook
# generation.
#
# Signed-off-by: Martin Waitz <tali@admingilde.org>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# scripts/kernel-doc
# 2005/03/18 02:51:17-08:00 tali@admingilde.org +5 -5
# docbook: fix escaping of kernel-doc
#
# ChangeSet
# 2005/03/18 08:01:00-08:00 aia21@cam.ac.uk
# [PATCH] uml: Fix compilation due to mismerge.
#
# The recent slew of UML updates that appeared in BK seems to have gone
# wrong somewhere. The file "arch/um/kernel/syscall_user.c" contains
# identical content twice over, thus breaking compilation.
#
# Below is a patch to fix this. Please apply.
#
# Signed-off-by: Anton Altaparmakov <aia21@cantab.net>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/um/kernel/syscall_user.c
# 2005/03/18 03:37:43-08:00 aia21@cam.ac.uk +0 -48
# uml: Fix compilation due to mismerge.
#
# ChangeSet
# 2005/03/18 07:52:44-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: remove vendor/board specific startup code
#
# Remove all board specific startup code files. Code has been merged
# into a much smaller set of common code for each CPU class type,
# so that is 3 types now.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# BitKeeper/deleted/.del-crt0_rom.S~d205d5b741021fe9
# 2005/03/18 07:52:34-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S
#
# BitKeeper/deleted/.del-crt0_ram.S~f6713b1bc05601a1
# 2005/03/18 07:52:34-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~d34cdd1e21edee23
# 2005/03/18 07:52:34-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~40ae24348bbd7fb
# 2005/03/18 07:52:34-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5206e/eLITE/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_rom.S~b82150e6a6d2797f
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
#
# BitKeeper/deleted/.del-crt0_ram.S~4e94a534e3d15f48
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~2cf8f7ebac1567a0
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/de2/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_himem.S~ebbc88a6394f9fdc
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S
#
# BitKeeper/deleted/.del-crt0_himem.S~30b71a46cd003e4d
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S
#
# BitKeeper/deleted/.del-crt0_fixed.S~cbb143aab415963c
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S
#
# BitKeeper/deleted/.del-crt0_fixed.S~4d29b192f1c2fd52
# 2005/03/18 07:52:33-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S
#
# BitKeeper/deleted/.del-crt0_rom.S~b8b77df97a1f9b5
# 2005/03/18 07:52:32-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68328/pilot/crt0_rom.S
#
# BitKeeper/deleted/.del-crt0_rom.S~1126a728d0284fe3
# 2005/03/18 07:52:32-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S
#
# BitKeeper/deleted/.del-crt0_ram.S~ffb6beec95d31ab8
# 2005/03/18 07:52:32-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68360/uCquicc/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~f11dd49d2b6d0f6a
# 2005/03/18 07:52:32-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~c71f6f8027e92792
# 2005/03/18 07:52:32-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~8ed728011670803
# 2005/03/18 07:52:32-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5307/NETtel/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~f221fd3a294d32aa
# 2005/03/18 07:52:31-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/528x/senTec/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~e40c4c64b428fcaf
# 2005/03/18 07:52:31-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5307/MP3/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~e2f919923f242cac
# 2005/03/18 07:52:31-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/528x/M5282EVB/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~d2e9a99a82f8dc65
# 2005/03/18 07:52:31-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~450fbe04da91d331
# 2005/03/18 07:52:31-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~158add31f04a42c6
# 2005/03/18 07:52:31-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5307/MOTOROLA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~be3aad01149175a5
# 2005/03/18 07:52:30-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/527x/M5271EVB/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~792820ab59d5a88c
# 2005/03/18 07:52:30-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5272/NETtel/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~72f51f34759d54ff
# 2005/03/18 07:52:30-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/527x/M5275EVB/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~36cddf89bf29efa4
# 2005/03/18 07:52:30-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5272/SCALES/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~1ee046bfd0b6da12
# 2005/03/18 07:52:30-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5272/senTec/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~d9746ca72c7794a3
# 2005/03/18 07:52:29-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~d3a50f66f7c69dc8
# 2005/03/18 07:52:29-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~2c2e4e1ef0fcb2f1
# 2005/03/18 07:52:29-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5206e/MOTOROLA/crt0_ram.S
#
# BitKeeper/deleted/.del-crt0_ram.S~1db926d789af312c
# 2005/03/18 07:52:29-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/5272/CANCam/crt0_ram.S
#
# ChangeSet
# 2005/03/18 07:52:22-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: move PILOT platform startup code
#
# Create more common 68328 startup code for the PILOT platform.
# It requires some unique setup from boot, that no other platform
# requires. This is part of the re-organization of the start up
# code to make more if it common.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/m68knommu/platform/68328/head-pilot.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +224 -0
# m68k-nommu: move PILOT platform startup code
#
# arch/m68knommu/platform/68328/head-pilot.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/m68knommu/platform/68328/head-pilot.S
#
# ChangeSet
# 2005/03/18 07:52:05-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: create common 68328 RAM based startup code
#
# Create common 68328 startup code for the ram based platforms.
# This is part of the re-organization of the start up code to
# make more if it common.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/m68knommu/platform/68328/head-ram.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +171 -0
# m68k-nommu: create common 68328 RAM based startup code
#
# arch/m68knommu/platform/68328/head-ram.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/m68knommu/platform/68328/head-ram.S
#
# ChangeSet
# 2005/03/18 07:51:48-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: remove nowhere referenced file semp3.h
#
# Remove nowhere referenced file. (egrep "filename\." didn't find anything)
#
# Signed-off-by: Domen Puncer <domen@coderock.org>
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# BitKeeper/deleted/.del-semp3.h~54fb3963e4a5b961
# 2005/03/18 07:51:38-08:00 gerg@snapgear.com +0 -0
# Delete: include/asm-m68knommu/semp3.h
#
# ChangeSet
# 2005/03/18 07:51:32-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: create common 68328 ROM based startup code
#
# Create common 68328 startup code for the ROM based platforms.
# This is part of the re-organization of the start up code to
# make more if it common.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/m68knommu/platform/68328/head-rom.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +109 -0
# m68k-nommu: create common 68328 ROM based startup code
#
# arch/m68knommu/platform/68328/head-rom.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +0 -0
# BitKeeper file /home/torvalds/v2.6/linux/arch/m68knommu/platform/68328/head-rom.S
#
# ChangeSet
# 2005/03/18 07:51:14-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: fix broken GET_MEM_SIZE macro in ColdFire head code
#
# Fix GET_MEM_SIZE macro, name was wrong. It is only used on the 5272
# platform, so got overlooked in original changes.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/m68knommu/platform/5307/head.S
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +2 -2
# m68k-nommu: fix broken GET_MEM_SIZE macro in ColdFire head code
#
# ChangeSet
# 2005/03/18 07:50:57-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: change build process to use common head code
#
# Update m68knommu Makefiles to build just the common start up head
# code now. Remove all referneces to the older vendor/board specific
# start codes.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# arch/m68knommu/platform/68VZ328/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +11 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/68EZ328/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +3 -4
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/68360/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +4 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/68328/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +14 -8
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/5407/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/5307/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +1 -3
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/528x/Makefile
# 2005/03/13 19:57:47-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/527x/Makefile
# 2005/03/13 19:57:46-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/5272/Makefile
# 2005/03/13 19:57:46-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/5249/Makefile
# 2005/03/13 19:57:46-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/5206e/Makefile
# 2005/03/13 19:57:46-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/platform/5206/Makefile
# 2005/03/13 19:57:46-08:00 gerg@snapgear.com +0 -1
# m68k-nommu: change build process to use common head code
#
# arch/m68knommu/Makefile
# 2005/03/13 19:57:39-08:00 gerg@snapgear.com +5 -3
# m68k-nommu: change build process to use common head code
#
# BitKeeper/deleted/.del-Makefile~d9739365beaf4b84
# 2005/03/18 07:50:47-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/ucdimm/Makefile
#
# BitKeeper/deleted/.del-Makefile~b99fc5d52fab7c32
# 2005/03/18 07:50:47-08:00 gerg@snapgear.com +0 -0
# Delete: arch/m68knommu/platform/68VZ328/de2/Makefile
#
# ChangeSet
# 2005/03/18 07:50:40-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: use vma list in nommu mmap support
#
# Modify the mm_context struct to keep a list of vma's instead of
# the uClinux specific mm_block struct's that used to be used.
# This reflects the changes made to mm/nommu.c in 2.6.11.
#
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# include/asm-m68knommu/mmu.h
# 2005/03/13 20:00:03-08:00 gerg@snapgear.com +1 -12
# m68k-nommu: use vma list in nommu mmap support
#
# ChangeSet
# 2005/03/18 07:50:25-08:00 gerg@snapgear.com
# [PATCH] m68k-nommu: remove nowhere referenced file io_hw_swap.h
#
# Remove nowhere referenced file. (egrep "filename\." didn't find anything)
#
# Signed-off-by: Domen Puncer <domen@coderock.org>
# Signed-off-by: Greg Ungerer <gerg@snapgear.com>
# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
#
# BitKeeper/deleted/.del-io_hw_swap.h~8338456a17243204
# 2005/03/18 07:50:15-08:00 gerg@snapgear.com +0 -0
# Delete: include/asm-m68knommu/io_hw_swap.h
#
# ChangeSet
# 2005/03/18 15:10:40+01:00 marcel@holtmann.org
# [Bluetooth] Kill bt_sock_alloc() and its usage
#
# Kill bt_sock_alloc() function and make the derived socks have
# a struct bt_sock as its first member, so that the _pi() functions
# can just cast the struct sock pointer to its respective types,
# taking advantage of the fact that sk_alloc() now use kmalloc()
# when no slab is passed.
#
# This is another step, close to the final one, to kill sk_protinfo
# and make further planned changes possible.
#
# Signed-off-by: Arnaldo Carvalho de Melo <acme@conectiva.com.br>
# Signed-off-by: David S. Miller <davem@davemloft.net>
# Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
#
# net/bluetooth/hidp/sock.c
# 2005/03/18 15:07:31+01:00 marcel@holtmann.org +6 -2
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/cmtp/sock.c
# 2005/03/18 15:07:29+01:00 marcel@holtmann.org +6 -2
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/bnep/sock.c
# 2005/03/18 15:07:28+01:00 marcel@holtmann.org +8 -3
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/rfcomm/sock.c
# 2005/03/18 15:07:27+01:00 marcel@holtmann.org +8 -2
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/sco.c
# 2005/03/18 15:07:26+01:00 marcel@holtmann.org +8 -1
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/l2cap.c
# 2005/03/18 15:07:25+01:00 marcel@holtmann.org +6 -1
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/hci_sock.c
# 2005/03/18 15:07:23+01:00 marcel@holtmann.org +7 -1
# Kill bt_sock_alloc() and its usage
#
# net/bluetooth/af_bluetooth.c
# 2005/03/18 15:07:22+01:00 marcel@holtmann.org +0 -43
# Kill bt_sock_alloc() and its usage
#
# include/net/bluetooth/rfcomm.h
# 2005/03/18 15:07:21+01:00 marcel@holtmann.org +2 -1
# Kill bt_sock_alloc() and its usage
#
# include/net/bluetooth/sco.h
# 2005/03/18 15:07:20+01:00 marcel@holtmann.org +2 -1
# Kill bt_sock_alloc() and its usage
#
# include/net/bluetooth/l2cap.h
# 2005/03/18 15:07:18+01:00 marcel@holtmann.org +2 -1
# Kill bt_sock_alloc() and its usage
#
# include/net/bluetooth/hci_core.h
# 2005/03/18 15:07:17+01:00 marcel@holtmann.org +3 -1
# Kill bt_sock_alloc() and its usage
#
# include/net/bluetooth/bluetooth.h
# 2005/03/18 15:06:56+01:00 marcel@holtmann.org +0 -1
# Kill bt_sock_alloc() and its usage
#
# ChangeSet
# 2005/03/18 13:25:42+01:00 marcel@holtmann.org
# [Bluetooth] Fix session reference counting for RFCOMM
#
# When an incoming connection terminates, the signal DLC is never
# closed and thus the underlaying L2CAP connection stays open. This
# problem doesn't show up often, because most times the other side
# takes care of terminating the signal DLC.
#
# Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
#
# net/bluetooth/rfcomm/core.c
# 2005/03/18 13:24:00+01:00 marcel@holtmann.org +4 -0
# Fix session reference counting for RFCOMM
#
# ChangeSet
# 2005/03/18 13:21:52+01:00 marcel@holtmann.org
# [Bluetooth] Support HCI Extensions in BCSP driver
#
# To support the vendor specific HCI commands and events the BCSP
# drivers needs to convert these to BCSP packets for the correct
# channel.
#
# Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
#
# drivers/bluetooth/hci_bcsp.c
# 2005/03/18 13:20:08+01:00 marcel@holtmann.org +52 -18
# Support HCI Extensions in BCSP driver
#
# ChangeSet
# 2005/03/18 12:06:33+01:00 bzolnier@trik.(none)
# [ide] ide-tape: fix character device ->open() vs ->cleanup() race
#
# Similar to the same race but for the block device.
#
# * store pointer to struct ide_tape_obj in idetape_chrdevs[]
# * rename idetape_chrdevs[] to idetape_devs[] and kill idetape_chrdev_t
# * add ide_tape_chrdev_get() for getting reference to the tape
# * store tape pointer in file->private_data and fix all users of it
# * fix idetape_chrdev_{open,release}() to get/put reference to the tape
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/ide/ide-tape.c
# 2005/03/18 11:33:10+01:00 bzolnier@trik.(none) +51 -30
# [ide] ide-tape: fix character device ->open() vs ->cleanup() race
#
# ChangeSet
# 2005/03/18 12:05:37+01:00 bzolnier@trik.(none)
# [ide] ide-scsi: add basic refcounting
#
# * pointers to a SCSI host and a drive are added to idescsi_scsi_t
# * pointer to the SCSI host is stored in disk->private_data
# * ide_scsi_{get,put}() is used to {get,put} reference to the SCSI host
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/scsi/ide-scsi.c
# 2005/03/18 12:05:25+01:00 bzolnier@trik.(none) +56 -11
# [ide] ide-scsi: add basic refcounting
#
# ChangeSet
# 2005/03/18 12:01:47+01:00 bzolnier@trik.(none)
# [ide] ide-tape: add basic refcounting
#
# Similar changes as for ide-cd.c.
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/ide/ide-tape.c
# 2005/03/18 11:32:44+01:00 bzolnier@trik.(none) +80 -14
# [ide] ide-tape: add basic refcounting
#
# ChangeSet
# 2005/03/18 11:59:51+01:00 bzolnier@trik.(none)
# [ide] ide-floppy: add basic refcounting
#
# Similar changes as for ide-cd.c.
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/ide/ide-floppy.c
# 2005/03/18 11:32:32+01:00 bzolnier@trik.(none) +90 -25
# [ide] ide-floppy: add basic refcounting
#
# ChangeSet
# 2005/03/18 11:57:25+01:00 bzolnier@trik.(none)
# [ide] ide-disk: add basic refcounting
#
# Similar changes as for ide-cd.c (except that struct ide_disk_obj is added).
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/ide/ide-disk.c
# 2005/03/18 11:32:20+01:00 bzolnier@trik.(none) +88 -9
# [ide] ide-disk: add basic refcounting
#
# ChangeSet
# 2005/03/18 11:54:40+01:00 bzolnier@trik.(none)
# [ide] ide-cd: add basic refcounting
#
# * based on reference counting in drivers/scsi/{sd,sr}.c
# * fixes race between ->open() and ->cleanup() (ide_unregister_subdriver()
# tests for drive->usage != 0 but there is no protection against new users)
# * struct kref and pointer to a drive are added to struct ide_cdrom_info
# * pointer to drive's struct ide_cdrom_info is stored in disk->private_data
# * ide_cd_{get,put}() is used to {get,put} reference to struct ide_cdrom_info
# * ide_cd_release() is a release method for struct ide_cdrom_info
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/ide/ide-cd.h
# 2005/03/18 11:29:00+01:00 bzolnier@trik.(none) +2 -0
# [ide] ide-cd: add basic refcounting
#
# drivers/ide/ide-cd.c
# 2005/03/18 11:29:00+01:00 bzolnier@trik.(none) +80 -19
# [ide] ide-cd: add basic refcounting
#
# ChangeSet
# 2005/03/18 11:51:25+01:00 bzolnier@trik.(none)
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# As a result disk->private_data can be used by device drivers now.
#
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# include/linux/ide.h
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +1 -1
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# drivers/scsi/ide-scsi.c
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +2 -1
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# drivers/ide/ide.c
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +1 -2
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# drivers/ide/ide-tape.c
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +1 -1
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# drivers/ide/ide-floppy.c
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +1 -1
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# drivers/ide/ide-disk.c
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +2 -1
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# drivers/ide/ide-cd.c
# 2005/03/18 11:28:48+01:00 bzolnier@trik.(none) +1 -1
# [ide] make ide_generic_ioctl() take ide_drive_t * as an argument
#
# ChangeSet
# 2005/03/18 11:45:52+01:00 htejun@gmail.com
# [ide] hdio.txt update
#
# This patch updates Documentation/ioctl/hdio.txt to include more
# detailed descriptions about HDIO_DRIVE_{CMD|TASK|TASKFILE} ioctls.
#
# Signed-off-by: Tejun Heo <htejun@gmail.com>
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# Documentation/ioctl/hdio.txt
# 2005/03/11 07:27:33+01:00 htejun@gmail.com +142 -37
# [ide] hdio.txt update
#
# ChangeSet
# 2005/03/18 11:42:11+01:00 tklauser@nuerscht.ch
# [ide] drivers/ide/cs5520.c: use the DMA_{64,32}BIT_MASK constants
#
# Description: Use the DMA_{64,32}BIT_MASK constants from dma-mapping.h
# when calling pci_set_dma_mask() or pci_set_consistent_dma_mask()
# See http://marc.theaimsgroup.com/?t=108001993000001&r=1&w=2 for details
#
# Signed-off-by: Tobias Klauser <tklauser@nuerscht.ch>
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# drivers/ide/pci/cs5520.c
# 2005/03/18 11:41:57+01:00 tklauser@nuerscht.ch +2 -1
# [ide] drivers/ide/cs5520.c: use the DMA_{64,32}BIT_MASK constants
#
# ChangeSet
# 2005/03/18 11:36:11+01:00 Jason.d.gaston@intel.com
# [ide] pci_ids.h correction for Intel ICH7R
#
# This patch removes an incorrect ICH7R DID in pci_ids.h.
#
# Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com>
# Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
#
# include/linux/pci_ids.h
# 2005/03/07 21:32:16+01:00 Jason.d.gaston@intel.com +0 -1
# [ide] pci_ids.h correction for Intel ICH7R
#
# ChangeSet
# 2005/03/17 20:00:13-08:00 davem@sunset.davemloft.net
# [IPV4]: Make multipath algs into true drivers.
#
# This also makes them configurable on a per-route
# basis via rtnetlink route attributes.
#
# Based upon suggestions from Thomas Graf and Alexey
# Kuznetsov.
#
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/route.c
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +76 -93
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/multipath_wrandom.c
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +45 -64
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/multipath_rr.c
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +23 -11
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/multipath_random.c
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +28 -16
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/multipath_drr.c
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +42 -61
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/fib_semantics.c
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +18 -1
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/Makefile
# 2005/03/17 19:58:49-08:00 davem@sunset.davemloft.net +1 -0
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/Kconfig
# 2005/03/17 19:58:48-08:00 davem@sunset.davemloft.net +10 -16
# [IPV4]: Make multipath algs into true drivers.
#
# include/net/route.h
# 2005/03/17 19:58:48-08:00 davem@sunset.davemloft.net +0 -73
# [IPV4]: Make multipath algs into true drivers.
#
# include/net/ip_mp_alg.h
# 2005/03/17 19:58:48-08:00 davem@sunset.davemloft.net +75 -4
# [IPV4]: Make multipath algs into true drivers.
#
# include/net/ip_fib.h
# 2005/03/17 19:58:48-08:00 davem@sunset.davemloft.net +7 -3
# [IPV4]: Make multipath algs into true drivers.
#
# include/linux/rtnetlink.h
# 2005/03/17 19:58:48-08:00 davem@sunset.davemloft.net +1 -0
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/multipath.c
# 2005/03/17 19:58:44-08:00 davem@sunset.davemloft.net +54 -0
# [IPV4]: Make multipath algs into true drivers.
#
# net/ipv4/multipath.c
# 2005/03/17 19:58:44-08:00 davem@sunset.davemloft.net +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/net/ipv4/multipath.c
#
# include/linux/ip_mp_alg.h
# 2005/03/17 19:58:42-08:00 davem@sunset.davemloft.net +22 -0
# [IPV4]: Make multipath algs into true drivers.
#
# include/linux/ip_mp_alg.h
# 2005/03/17 19:58:42-08:00 davem@sunset.davemloft.net +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/include/linux/ip_mp_alg.h
#
# ChangeSet
# 2005/03/17 15:58:54-08:00 elueck@de.ibm.com
# [IPV4]: Multipath cache algorithm support.
#
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/route.c
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +248 -4
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/fib_semantics.c
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +7 -1
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/fib_lookup.h
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +2 -1
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/fib_hash.c
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +1 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/Makefile
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +4 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/Kconfig
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +48 -0
# [IPV4]: Multipath cache algorithm support.
#
# include/net/route.h
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +79 -1
# [IPV4]: Multipath cache algorithm support.
#
# include/net/ip_fib.h
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +12 -0
# [IPV4]: Multipath cache algorithm support.
#
# include/net/flow.h
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +1 -0
# [IPV4]: Multipath cache algorithm support.
#
# include/net/dst.h
# 2005/03/17 15:58:27-08:00 elueck@de.ibm.com +1 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/multipath_wrandom.c
# 2005/03/17 15:58:22-08:00 elueck@de.ibm.com +363 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/multipath_rr.c
# 2005/03/17 15:58:22-08:00 elueck@de.ibm.com +103 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/multipath_random.c
# 2005/03/17 15:58:22-08:00 elueck@de.ibm.com +116 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/multipath_wrandom.c
# 2005/03/17 15:58:22-08:00 elueck@de.ibm.com +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/net/ipv4/multipath_wrandom.c
#
# net/ipv4/multipath_rr.c
# 2005/03/17 15:58:22-08:00 elueck@de.ibm.com +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/net/ipv4/multipath_rr.c
#
# net/ipv4/multipath_random.c
# 2005/03/17 15:58:22-08:00 elueck@de.ibm.com +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/net/ipv4/multipath_random.c
#
# net/ipv4/multipath_drr.c
# 2005/03/17 15:58:21-08:00 elueck@de.ibm.com +284 -0
# [IPV4]: Multipath cache algorithm support.
#
# net/ipv4/multipath_drr.c
# 2005/03/17 15:58:21-08:00 elueck@de.ibm.com +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/net/ipv4/multipath_drr.c
#
# include/net/ip_mp_alg.h
# 2005/03/17 15:58:20-08:00 elueck@de.ibm.com +26 -0
# [IPV4]: Multipath cache algorithm support.
#
# include/net/ip_mp_alg.h
# 2005/03/17 15:58:20-08:00 elueck@de.ibm.com +0 -0
# BitKeeper file /home/davem/src/BK/net-2.6/include/net/ip_mp_alg.h
#
# ChangeSet
# 2005/03/17 14:02:44-08:00 davem@sunset.davemloft.net
# [M68KNOMMU]: Use asm-generic/unaligned.h for COLDFIRE.
#
# Based upon comments from Geert Uytterhoeven.
#
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/asm-m68knommu/unaligned.h
# 2005/03/17 14:02:09-08:00 davem@sunset.davemloft.net +1 -9
# [M68KNOMMU]: Use asm-generic/unaligned.h for COLDFIRE.
#
# ChangeSet
# 2005/03/17 13:54:31-08:00 davem@sunset.davemloft.net
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# Several architectures do their asm/unaligned.h support support by
# simply casting the pointer to a packed strcuture, then deref'ing that
# pointer. This forces gcc to assume the object is not aligned
# properly.
#
# This technique originated in Richard Henderson's
# asm-alpha/unaligned.h, IA64 uses the same technique as well.
#
# This works well on RISC systems for two reasons:
#
# 1) On systems like Alpha, MIPS, et al. which have special
# "load unaligned" instructions, GCC knows to emit them
# for code like this.
#
# 2) Even on systems without explicit unaligned load/store instruction
# support, the code emitted (basically, byte loads with shifts and
# ors) is about the same as what you get when emitting a memmove()
# call and you don't need the local stack slot.
#
# I was going to thus move asm-sparc64/unaligned.h over to such a
# scheme, but then I noticed that nobody actually includes the current
# memmove() based asm-generic/unaligned.h code. So why not put the
# portable packed structure implementation into asm-generic/unaligned.h
# and then make asm-{alpha,ia64,sparc64}/unaligned.h simply include that?
#
# I only had to make minor modifications to the alpha header when placing
# it into the generic area. In particular I had to convert some explicit
# "unsigned long", "unsigned int" et al. into the arch-agnostic "u64" "u32"
# etc. so that even 32-bit platforms could use this.
#
# Come to think of it I'll make sparc32 use this as well.
#
# I looked at all the other platform unaligned.h headers:
#
# I386/X86_64: can do unaligned loads directly
# ARM: is trying to be incredibly clever, and open codes the shifts and
# ors. I think it would be better if it used something similar to
# the packed structure technique.
# CRIS: like x86, can do unaligned stuff directly.
# FRV: needs help doing unaligned stuff, it probably also could use the
# packed structure stuff.
# H8300: needs help, could use this new asm-generic/unaligned.h header
# M32R: likewise
# M68K: can do unaligned access directly.
# MIPS: appears to be a copy of the original alpha/ia64 unaligned.h
# header, so I converted it to use the new asm-generic/unaligned.h
# too
# PARISC: is just a copy of asm-sparc/unaligned.h, so I converted it
# over to use asm-generic/unaligned.h too
# PPC/PPC64: can do unaligned access directly in big-endian mode which
# is what the Linux kernel runs in
# S390: can do it directly as well
# SH/SH64: just has the memmove() code ala asm-sparc/unaligned.h, I
# converted it to use asm-generic/unaligned.h
# V850: has some clever code just like ARM, so I didn't touch it.
#
# So this is the patch I came up with.
#
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/asm-sparc64/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -14
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-sparc/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -14
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-sh64/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -12
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-sh/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -13
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-parisc/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -16
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-mips/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -131
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-ia64/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -116
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-generic/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +108 -7
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# include/asm-alpha/unaligned.h
# 2005/03/17 13:54:10-08:00 davem@sunset.davemloft.net +1 -109
# [ARCH]: Consolidate portable unaligned.h implementations.
#
# ChangeSet
# 2005/03/17 10:31:09-08:00 yoshfuji@linux-ipv6.org
# [NET]: Save space for sk_alloc_slab() failure message.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv6/af_inet6.c
# 2005/03/17 10:30:53-08:00 yoshfuji@linux-ipv6.org +6 -9
# [NET]: Save space for sk_alloc_slab() failure message.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/af_inet.c
# 2005/03/17 10:30:53-08:00 yoshfuji@linux-ipv6.org +5 -9
# [NET]: Save space for sk_alloc_slab() failure message.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/core/sock.c
# 2005/03/17 10:30:53-08:00 yoshfuji@linux-ipv6.org +7 -1
# [NET]: Save space for sk_alloc_slab() failure message.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/net/sock.h
# 2005/03/17 10:30:53-08:00 yoshfuji@linux-ipv6.org +0 -5
# [NET]: Save space for sk_alloc_slab() failure message.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/17 10:05:53-08:00 herbert@gondor.apana.org.au
# [IPV4]: Send TCP reset through dst_output in ipt_REJECT
#
# I noticed that the TCP reset code in ipt_REJECT didn't call dst_output
# either so it also bypasses IPsec processing. Here is a patch to fix
# that and use the correct MTU value.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/netfilter/ipt_REJECT.c
# 2005/03/17 10:05:37-08:00 herbert@gondor.apana.org.au +2 -2
# [IPV4]: Send TCP reset through dst_output in ipt_REJECT
#
# I noticed that the TCP reset code in ipt_REJECT didn't call dst_output
# either so it also bypasses IPsec processing. Here is a patch to fix
# that and use the correct MTU value.
#
# Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/16 20:57:52-08:00 yoshfuji@linux-ipv6.org
# [IPV6]: Remove redundant NULL checks before kfree
#
# I don't mind calling kfree twice itself (because that function is not
# so performance critical), but fl_free(NULL) is out because
# if fl is NULL, kfree(fl->opt) is out.
#
# So, what do you think of checking fl inside fl_free like this?
#
# Based on patch from Jesper Juhl <juhl-lkml@dif.dk>.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv6/ip6_flowlabel.c
# 2005/03/16 20:57:38-08:00 yoshfuji@linux-ipv6.org +4 -7
# [IPV6]: Remove redundant NULL checks before kfree
#
# I don't mind calling kfree twice itself (because that function is not
# so performance critical), but fl_free(NULL) is out because
# if fl is NULL, kfree(fl->opt) is out.
#
# So, what do you think of checking fl inside fl_free like this?
#
# Based on patch from Jesper Juhl <juhl-lkml@dif.dk>.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/16 20:56:17-08:00 aaw@rincewind.tv
# [AF_KEY]: Fix error handling in pfkey_xfrm_state2msg()
#
# The pfkey_xfrm_state2msg() was missing a return in an EINVAL statement.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/key/af_key.c
# 2005/03/16 20:56:04-08:00 aaw@rincewind.tv +1 -1
# [AF_KEY]: Fix error handling in pfkey_xfrm_state2msg()
#
# The pfkey_xfrm_state2msg() was missing a return in an EINVAL statement.
#
# Signed-off-by: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/16 20:54:22-08:00 dada1@cosmosbay.com
# [IPV4]: Save space in struct inetpeer on 64-bit platforms.
#
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/net/inetpeer.h
# 2005/03/16 20:54:07-08:00 dada1@cosmosbay.com +1 -1
# [IPV4]: Save space in struct inetpeer on 64-bit platforms.
#
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# ChangeSet
# 2005/03/16 20:44:03-08:00 bunk@stusta.de
# [IPV4]: Mark a struct static in inetpeer.c
#
# Signed-off-by: Adrian Bunk <bunk@stusta.de>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# net/ipv4/inetpeer.c
# 2005/03/16 20:43:50-08:00 bunk@stusta.de +2 -2
# [IPV4]: Mark a struct static in inetpeer.c
#
# Signed-off-by: Adrian Bunk <bunk@stusta.de>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
# include/net/inetpeer.h
# 2005/03/16 20:43:50-08:00 bunk@stusta.de +0 -1
# [IPV4]: Mark a struct static in inetpeer.c
#
# Signed-off-by: Adrian Bunk <bunk@stusta.de>
# Signed-off-by: David S. Miller <davem@davemloft.net>
#
diff -Nru a/Documentation/ioctl/hdio.txt b/Documentation/ioctl/hdio.txt
--- a/Documentation/ioctl/hdio.txt 2005-03-20 16:30:37 -08:00
+++ b/Documentation/ioctl/hdio.txt 2005-03-20 16:30:37 -08:00
@@ -573,26 +573,43 @@
EFAULT req_cmd == TASKFILE_IN_OUT (not implemented as of 2.6.8)
EPERM req_cmd == TASKFILE_MULTI_OUT and drive
multi-count not yet set.
-
+ EIO Drive failed the command.
notes:
- [1] Currently (2.6.8), both the input and output buffers are
- copied from the user and written back to the user, even when
- not used. This may be a bug.
-
- [2] The out_flags and in_flags are returned to the user after
- the ioctl completes. Currently (2.6.8) these are the same
- as the input values, unchanged. In the future, they may have
- more significance.
-
- Extreme caution should be used with using this ioctl. A
- mistake can easily corrupt data or hang the system.
-
- The argument to the ioctl is a pointer to a region of memory
- containing a ide_task_request_t structure, followed by an
- optional buffer of data to be transmitted to the drive,
- followed by an optional buffer to receive data from the drive.
+ [1] READ THE FOLLOWING NOTES *CAREFULLY*. THIS IOCTL IS
+ FULL OF GOTCHAS. Extreme caution should be used with using
+ this ioctl. A mistake can easily corrupt data or hang the
+ system.
+
+ [2] Both the input and output buffers are copied from the
+ user and written back to the user, even when not used.
+
+ [3] If one or more bits are set in out_flags and in_flags is
+ zero, the following values are used for in_flags.all and
+ written back into in_flags on completion.
+
+ * IDE_TASKFILE_STD_IN_FLAGS | (IDE_HOB_STD_IN_FLAGS << 8)
+ if LBA48 addressing is enabled for the drive
+ * IDE_TASKFILE_STD_IN_FLAGS
+ if CHS/LBA28
+
+ The association between in_flags.all and each enable
+ bitfield flips depending on endianess; fortunately, TASKFILE
+ only uses inflags.b.data bit and ignores all other bits.
+ The end result is that, on any endian machines, it has no
+ effect other than modifying in_flags on completion.
+
+ [4] The default value of SELECT is (0xa0|DEV_bit|LBA_bit)
+ except for four drives per port chipsets. For four drives
+ per port chipsets, it's (0xa0|DEV_bit|LBA_bit) for the first
+ pair and (0x80|DEV_bit|LBA_bit) for the second pair.
+
+ [5] The argument to the ioctl is a pointer to a region of
+ memory containing a ide_task_request_t structure, followed
+ by an optional buffer of data to be transmitted to the
+ drive, followed by an optional buffer to receive data from
+ the drive.
Command is passed to the disk drive via the ide_task_request_t
structure, which contains these fields:
@@ -611,11 +628,66 @@
out_size output (user->drive) buffer size, bytes
in_size input (drive->user) buffer size, bytes
- This ioctl does not necessarily respect all flags in the
- out_flags and in_flags values -- some taskfile registers
- may be written or read even if not requested in the flags.
- Unused fields of io_ports[] and hob_ports[] should be set
- to zero.
+ When out_flags is zero, the following registers are loaded.
+
+ HOB_FEATURE If the drive supports LBA48
+ HOB_NSECTOR If the drive supports LBA48
+ HOB_SECTOR If the drive supports LBA48
+ HOB_LCYL If the drive supports LBA48
+ HOB_HCYL If the drive supports LBA48
+ FEATURE
+ NSECTOR
+ SECTOR
+ LCYL
+ HCYL
+ SELECT First, masked with 0xE0 if LBA48, 0xEF
+ otherwise; then, or'ed with the default
+ value of SELECT.
+
+ If any bit in out_flags is set, the following registers are loaded.
+
+ HOB_DATA If out_flags.b.data is set. HOB_DATA will
+ travel on DD8-DD15 on little endian machines
+ and on DD0-DD7 on big endian machines.
+ DATA If out_flags.b.data is set. DATA will
+ travel on DD0-DD7 on little endian machines
+ and on DD8-DD15 on big endian machines.
+ HOB_NSECTOR If out_flags.b.nsector_hob is set
+ HOB_SECTOR If out_flags.b.sector_hob is set
+ HOB_LCYL If out_flags.b.lcyl_hob is set
+ HOB_HCYL If out_flags.b.hcyl_hob is set
+ FEATURE If out_flags.b.feature is set
+ NSECTOR If out_flags.b.nsector is set
+ SECTOR If out_flags.b.sector is set
+ LCYL If out_flags.b.lcyl is set
+ HCYL If out_flags.b.hcyl is set
+ SELECT Or'ed with the default value of SELECT and
+ loaded regardless of out_flags.b.select.
+
+ Taskfile registers are read back from the drive into
+ {io|hob}_ports[] after the command completes iff one of the
+ following conditions is met; otherwise, the original values
+ will be written back, unchanged.
+
+ 1. The drive fails the command (EIO).
+ 2. One or more than one bits are set in out_flags.
+ 3. The requested data_phase is TASKFILE_NO_DATA.
+
+ HOB_DATA If in_flags.b.data is set. It will contain
+ DD8-DD15 on little endian machines and
+ DD0-DD7 on big endian machines.
+ DATA If in_flags.b.data is set. It will contain
+ DD0-DD7 on little endian machines and
+ DD8-DD15 on big endian machines.
+ HOB_FEATURE If the drive supports LBA48
+ HOB_NSECTOR If the drive supports LBA48
+ HOB_SECTOR If the drive supports LBA48
+ HOB_LCYL If the drive supports LBA48
+ HOB_HCYL If the drive supports LBA48
+ NSECTOR
+ SECTOR
+ LCYL
+ HCYL
The data_phase field describes the data transfer to be
performed. Value is one of:
@@ -626,27 +698,30 @@
TASKFILE_MULTI_OUT
TASKFILE_IN_OUT
TASKFILE_IN_DMA
- TASKFILE_IN_DMAQ
+ TASKFILE_IN_DMAQ == IN_DMA (queueing not supported)
TASKFILE_OUT_DMA
- TASKFILE_OUT_DMAQ
- TASKFILE_P_IN
- TASKFILE_P_IN_DMA
- TASKFILE_P_IN_DMAQ
- TASKFILE_P_OUT
- TASKFILE_P_OUT_DMA
- TASKFILE_P_OUT_DMAQ
+ TASKFILE_OUT_DMAQ == OUT_DMA (queueing not supported)
+ TASKFILE_P_IN unimplemented
+ TASKFILE_P_IN_DMA unimplemented
+ TASKFILE_P_IN_DMAQ unimplemented
+ TASKFILE_P_OUT unimplemented
+ TASKFILE_P_OUT_DMA unimplemented
+ TASKFILE_P_OUT_DMAQ unimplemented
The req_cmd field classifies the command type. It may be
one of:
IDE_DRIVE_TASK_NO_DATA
- IDE_DRIVE_TASK_SET_XFER
+ IDE_DRIVE_TASK_SET_XFER unimplemented
IDE_DRIVE_TASK_IN
- IDE_DRIVE_TASK_OUT
+ IDE_DRIVE_TASK_OUT unimplemented
IDE_DRIVE_TASK_RAW_WRITE
-
-
+ [6] Do not access {in|out}_flags->all except for resetting
+ all the bits. Always access individual bit fields. ->all
+ value will flip depending on endianess. For the same
+ reason, do not use IDE_{TASKFILE|HOB}_STD_{OUT|IN}_FLAGS
+ constants defined in hdreg.h.
@@ -663,7 +738,13 @@
inputs:
- Taskfile register values:
+ Commands other than WIN_SMART
+ args[0] COMMAND
+ args[1] NSECTOR
+ args[2] FEATURE
+ args[3] NSECTOR
+
+ WIN_SMART
args[0] COMMAND
args[1] SECTOR
args[2] FEATURE
@@ -682,11 +763,28 @@
error returns:
EACCES Access denied: requires CAP_SYS_RAWIO
ENOMEM Unable to allocate memory for task
+ EIO Drive reports error
notes:
- Taskfile registers IDE_LCYL, IDE_HCYL, and IDE_SELECT are
- set to zero before executing the command.
+ [1] For commands other than WIN_SMART, args[1] should equal
+ args[3]. SECTOR, LCYL and HCYL are undefined. For
+ WIN_SMART, 0x4f and 0xc2 are loaded into LCYL and HCYL
+ respectively. In both cases SELECT will contain the default
+ value for the drive. Please refer to HDIO_DRIVE_TASKFILE
+ notes for the default value of SELECT.
+
+ [2] If NSECTOR value is greater than zero and the drive sets
+ DRQ when interrupting for the command, NSECTOR * 512 bytes
+ are read from the device into the area following NSECTOR.
+ In the above example, the area would be
+ args[4..4+XFER_SIZE]. 16bit PIO is used regardless of
+ HDIO_SET_32BIT setting.
+
+ [3] If COMMAND == WIN_SETFEATURES && FEATURE == SETFEATURES_XFER
+ && NSECTOR >= XFER_SW_DMA_0 && the drive supports any DMA
+ mode, IDE driver will try to tune the transfer mode of the
+ drive accordingly.
@@ -726,7 +824,14 @@
error returns:
EACCES Access denied: requires CAP_SYS_RAWIO
ENOMEM Unable to allocate memory for task
+ ENOMSG Device is not a disk drive.
+ EIO Drive failed the command.
+
+ notes:
+ [1] DEV bit (0x10) of SELECT register is ignored and the
+ appropriate value for the drive is used. All other bits
+ are used unaltered.
diff -Nru a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
--- a/arch/m68knommu/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/Makefile 2005-03-20 16:30:37 -08:00
@@ -43,7 +43,6 @@
model-$(CONFIG_RAMKERNEL) := ram
model-$(CONFIG_ROMKERNEL) := rom
-model-$(CONFIG_HIMEMKERNEL) := himem
MODEL := $(model-y)
#
@@ -58,12 +57,15 @@
cpuclass-$(CONFIG_M527x) := 5307
cpuclass-$(CONFIG_M5272) := 5307
cpuclass-$(CONFIG_M528x) := 5307
+cpuclass-$(CONFIG_M5307) := 5307
cpuclass-$(CONFIG_M5407) := 5307
+cpuclass-$(CONFIG_M68328) := 68328
cpuclass-$(CONFIG_M68EZ328) := 68328
cpuclass-$(CONFIG_M68VZ328) := 68328
+cpuclass-$(CONFIG_M68360) := 68360
CPUCLASS := $(cpuclass-y)
-ifneq ($(CPUCLASS),)
+ifneq ($(CPUCLASS),$(PLATFORM))
CLASSDIR := arch/m68knommu/platform/$(cpuclass-y)/
endif
@@ -93,7 +95,7 @@
CFLAGS += -D__linux__
CFLAGS += -DUTS_SYSNAME=\"uClinux\"
-head-y := arch/m68knommu/platform/$(platform-y)/$(board-y)/crt0_$(model-y).o
+head-y := arch/m68knommu/platform/$(cpuclass-y)/head.o
CLEAN_FILES := include/asm-$(ARCH)/asm-offsets.h \
arch/$(ARCH)/kernel/asm-offsets.s
diff -Nru a/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S b/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S
--- a/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,213 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5206 ColdFire Arnewsh board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * Arnewsh m5206 ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-/*
- * The following define the limits within which to search for
- * available RAM.
- */
-#define MEM_MIN 0x00100000 /* Search from 1Mb */
-#define MEM_MAX 0x02000000 /* Max DRAM 32Mb! */
-#define MEM_LUMP 0x00010000 /* 64 Kb chunks */
-
-#define MEM_TMPSTACK 0x00010000 /* At 64k - for exceptions */
-
-/*
- * Chip Select setup.
- */
-#define CS0_ADDR 0x0000f000 /* CS0 connected to Flash ROM */
-#define CS0_MASK 0xf0000000 /* is 1Mbyte */
-#define CS0_CTRL 0x00000000 /* read-only */
-#define CS1_ADDR 0x00000000 /* CS1 not connected */
-#define CS1_MASK 0x00000000
-#define CS1_CTRL 0x00000000
-#define CS2_ADDR 0x00003000 /* CS2 connected to SRAM */
-#define CS2_MASK 0x0000f000 /* is 1Mbyte */
-#define CS2_CTRL 0x00001903 /* read-write */
-#define CS3_ADDR 0x00004000 /* CS3 connected to LED, par port */
-#define CS3_MASK 0x0000f000 /* is 1Mbyte */
-#define CS3_CTRL 0x00000083 /* read-write */
-#define CS4_ADDR 0x00000000 /* CS4 not connected */
-#define CS4_MASK 0x00000000
-#define CS4_CTRL 0x00000123
-#define CS5_ADDR 0x00000000 /* CS5 not connected */
-#define CS5_MASK 0x00000000
-#define CS5_CTRL 0x00000000
-#define CS6_ADDR 0x00000000 /* CS6 not connected */
-#define CS6_MASK 0x00000000
-#define CS6_CTRL 0x00000000
-#define CS7_ADDR 0x00000000 /* CS7 not connected */
-#define CS7_MASK 0x00000000
-#define CS7_CTRL 0x00000000
-#define DMC_CTRL 0x00000000 /* default memory control */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- *
- * On the Arnewsh 5206 board we can probe for the amount
- * of DRAM present...
- */
- move.l #MEM_MIN, %a0 /* Start at bottom */
- move.l #MEM_MAX, %a1 /* Set stop point */
- lea.l MEM_TMPSTACK, %sp /* Set up tmp stack ptr */
-
- move.l #VBR_BASE+8, %a2 /* Address of bus trap */
- lea.l _ram_buserr, %a3 /* Get RAM trap address */
- move.l %a3, (%a2) /* Set trap to local ptr */
-
-_find_ram:
- move.l (%a0), %d0 /* Attempt read */
- add.l #MEM_LUMP, %a0 /* Try next bank */
- cmp.l %a1, %a0 /* Check more? */
- bne _find_ram
-
- /*
- * BUS error trap handler - used for RAM probing.
- */
-_ram_buserr:
- bra _found_ram
-
-_found_ram: /* Vectored here on bus err */
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current task pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5206/Makefile b/arch/m68knommu/platform/5206/Makefile
--- a/arch/m68knommu/platform/5206/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5206/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/5206e/MOTOROLA/crt0_ram.S b/arch/m68knommu/platform/5206e/MOTOROLA/crt0_ram.S
--- a/arch/m68knommu/platform/5206e/MOTOROLA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,178 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5206e ColdFire based CADRE3 boards.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * Cadre-III M5206e ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * SDRAM size for the Cadre III board (m5206e).
- */
-#if defined(CONFIG_RAMAUTO)
- movea.l #0x00000000,%a0
- move.l MCF_MBAR+MCFSIM_DCMR0,%d0
- and.l #0x00fe0000, %d0
- beq noaddr1
- add.l #0x00020000,%d0
- move.l %d0,%a0
-noaddr1:
- move.l MCF_MBAR+MCFSIM_DCMR1,%d0
- and.l #0x00fe0000, %d0
- beq noaddr2
- add.l #0x00020000,%d0
- add.l %d0,%a0
-noaddr2:
-
-#else
-
-#if defined(CONFIG_RAM32MB)
-#define MEM_SIZE 0x02000000 /* Memory size 32Mb */
-#elif defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
- move.l #MEM_SIZE, %a0
-#endif
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current task pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5206e/Makefile b/arch/m68knommu/platform/5206e/Makefile
--- a/arch/m68knommu/platform/5206e/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5206e/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S b/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S
--- a/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,346 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5206e ColdFire based eLITE boards.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * Copyright (C) 1999 Rob Scott (rscott@mtrob.fdns.net)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * M5206eLITE ColdFire eval board, chip select and memory setup.
- */
-
-#ifdef CONFIG_SMALL
-#define MEM_BASE 0x30000000 /* Base memory for M5206eLITE */
-#define MEM_RESERVED 0x00020000 /* Don't use memory reserved by dBUG */
-#define MEM_SIZE 0x00100000 /* 1 MB of SRAM on M5206eLITE */
-#else
-#define MEM_BASE 0x00000000 /* Base memory for M5206eLITE */
-#define MEM_RESERVED 0x00010000 /* Skip first MEM_LUMP for colilo */
-#define MEM_SIZE 0x02000000 /* Max DRAM 32Mb */
-#endif
-#define MEM_MIN MEM_BASE+MEM_RESERVED
-/* Define end of probeable memory space */
-#define MEM_MAX MEM_BASE+MEM_SIZE
-#define MEM_BUILTIN 0x20000000 /* Put built in SRAM at dBUG loc */
-#define MEM_TMPSTACK MEM_BUILTIN+0x800 /* Use built in SRAM for tmp stack */
-#define MEM_LUMP 0x00010000 /* 64 Kb chunks */
-#define VBR_BASE MEM_BUILTIN /* Use built in SRAM for vectors */
-
-#define CS0_ADDR 0x0000ffe0 /* CS0 connected to Flash ROM */
-#define CS0_MASK 0x000f0000 /* is 1Mbyte */
-#define CS0_CTRL 0x00001da3 /* read-write (for flash) */
-#define CS1_ADDR 0x00000000 /* CS1 not connected */
-#define CS1_MASK 0x00000000
-#define CS1_CTRL 0x00000000
-#define CS2_ADDR 0x00003000 /* CS2 connected to SRAM */
-#define CS2_MASK 0x000f0000 /* is 1Mbyte */
-#define CS2_CTRL 0x00001903 /* read-write */
-#define CS3_ADDR 0x00004000 /* CS3 connected to LED, par port */
-#define CS3_MASK 0x000f0000 /* is 1Mbyte */
-#define CS3_CTRL 0x00000183 /* read-write */
-#define CS4_ADDR 0x00000000 /* CS4 not connected */
-#define CS4_MASK 0x00000000
-#define CS4_CTRL 0x00000000
-#define CS5_ADDR 0x00000000 /* CS5 not connected */
-#define CS5_MASK 0x00000000
-#define CS5_CTRL 0x00000000
-#define CS6_ADDR 0x00000000 /* CS6 not connected */
-#define CS6_MASK 0x00000000
-#define CS6_CTRL 0x00000000
-#define CS7_ADDR 0x00000000 /* CS7 not connected */
-#define CS7_MASK 0x00000000
-#define CS7_CTRL 0x00000000
-#define DMC_CTRL 0x00000000 /* default memory control */
-
-#define DCRR 0x00000034 /* Refresh period */
-/* DCTR definition:
- <15>: DAEM, 1 = Drive Multiplexed Address During External Master DRAM xfer
- <14>: EDO, 1 = EDO, 0 = Normal
- <12>: RCD, 1 = 2 clk RAS-to-CAS, 0 = 1.0 clk RAS-to-CAS
- <10:09>: RSH, 10 = 3.5 clk RAS low, 01 = 2.5 clk, 00 = 1.5 clk
- <06:05>: RP, 10 = 3.5 clk RAS Precharge, 01 = 2.5 clk, 00 = 1.5 clk
- <03>: CAS, 1 = 2.5 clk CAS assertion, 0 = 1.5 clk
- <01>: CP, 1 = 1.5 CAS clk precharge, 0 = .5 clk
- <00>: CSR, 1 = 2.0 clk CAS before RAS setup, 0 = 1.0 clk
-*/
-#define DCTR 0x0000144B /* Slow DRAM */
-#define DCAR0 0x00000000 /* DRAM0 address, 0 base addr */
-#define DCMR0 0x003e0000 /* DRAM0 mask, 4Mb DRAM */
-#define DCCR0 0x00000007 /* DRAM0 control, R/W, burst pg mde */
-#define DCAR1 0x00000000 /* DRAM1 address, 0 base addr */
-#define DCMR1 0x00000000 /* DRAM1 mask, no DRAM */
-#define DCCR1 0x00000000 /* DRAM1 control, off */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- move.l #MCF_MBAR+1, %a0 /* Set I/O base addr */
- movec %a0, %MBAR /* Note: bit 0 is Validate */
- move.l #MEM_BUILTIN+1,%a0 /* Set SRAM base addr */
- movec %a0, %RAMBAR0 /* Note: bit 0 is Validate */
-
- move.l #MCF_MBAR, %a0 /* Get I/O base addr */
-
- /* ----------------------- CS1 ----------------------- */
- move.w #CS1_ADDR, %d0 /* CS1 address */
- move.w %d0, MCFSIM_CSAR1(%a0) /* CS1 address */
- move.l #CS1_MASK, %d0 /* CS1 mask */
- move.l %d0, MCFSIM_CSMR1(%a0) /* CS1 mask */
- move.w #CS1_CTRL, %d0 /* CS1 control */
- move.w %d0, MCFSIM_CSCR1(%a0) /* CS1 control */
-
- /* ----------------------- CS2 ----------------------- */
- move.w #CS2_ADDR, %d0 /* CS2 address */
- move.w %d0, MCFSIM_CSAR2(%a0) /* CS2 address */
- move.l #CS2_MASK, %d0 /* CS2 mask */
- move.l %d0, MCFSIM_CSMR2(%a0) /* CS2 mask */
- move.w #CS2_CTRL, %d0 /* CS2 control */
- move.w %d0, MCFSIM_CSCR2(%a0) /* CS2 control */
-
- /* ----------------------- CS3 ----------------------- */
- move.w #CS3_ADDR, %d0 /* CS3 address */
- move.w %d0, MCFSIM_CSAR3(%a0) /* CS3 address */
- move.l #CS3_MASK, %d0 /* CS3 mask */
- move.l %d0, MCFSIM_CSMR3(%a0) /* CS3 mask */
- move.w #CS3_CTRL, %d0 /* CS3 control */
- move.w %d0, MCFSIM_CSCR3(%a0) /* CS3 control */
-
- /* ----------------------- CS4 ----------------------- */
- move.w #CS4_ADDR, %d0 /* CS4 address */
- move.w %d0, MCFSIM_CSAR4(%a0) /* CS4 address */
- move.l #CS4_MASK, %d0 /* CS4 mask */
- move.l %d0, MCFSIM_CSMR4(%a0) /* CS4 mask */
- move.w #CS4_CTRL, %d0 /* CS4 control */
- move.w %d0, MCFSIM_CSCR4(%a0) /* CS4 control */
-
- /* ----------------------- CS5 ----------------------- */
- move.w #CS5_ADDR, %d0 /* CS5 address */
- move.w %d0, MCFSIM_CSAR5(%a0) /* CS5 address */
- move.l #CS5_MASK, %d0 /* CS5 mask */
- move.l %d0, MCFSIM_CSMR5(%a0) /* CS5 mask */
- move.w #CS5_CTRL, %d0 /* CS5 control */
- move.w %d0, MCFSIM_CSCR5(%a0) /* CS5 control */
-
- /* ----------------------- CS6 ----------------------- */
- move.w #CS6_ADDR, %d0 /* CS6 address */
- move.w %d0, MCFSIM_CSAR6(%a0) /* CS6 address */
- move.l #CS6_MASK, %d0 /* CS6 mask */
- move.l %d0, MCFSIM_CSMR6(%a0) /* CS6 mask */
- move.w #CS6_CTRL, %d0 /* CS6 control */
- move.w %d0, MCFSIM_CSCR6(%a0) /* CS6 control */
-
- /* ----------------------- CS7 ----------------------- */
- move.w #CS7_ADDR, %d0 /* CS7 address */
- move.w %d0, MCFSIM_CSAR7(%a0) /* CS7 address */
- move.l #CS7_MASK, %d0 /* CS7 mask */
- move.l %d0, MCFSIM_CSMR7(%a0) /* CS7 mask */
- move.w #CS7_CTRL, %d0 /* CS7 control */
- move.w %d0, MCFSIM_CSCR7(%a0) /* CS7 control */
-
- /* --------------------- Default --------------------- */
- move.w #DMC_CTRL, %d0 /* Default control */
- move.w %d0, MCFSIM_DMCR(%a0) /* Default control */
-
- /* ----------------------- DRAM ------------------------ */
- move.w #DCRR, %d0 /* Refresh period */
- move.w %d0, MCFSIM_DCRR(%a0) /* Refresh period */
- move.w #DCTR, %d0 /* Timing address */
- move.w %d0, MCFSIM_DCTR(%a0) /* Timing address */
- move.w #DCAR0, %d0 /* DRAM0 base address */
- move.w %d0, MCFSIM_DCAR0(%a0) /* DRAM0 base address */
- move.l #DCMR0, %d0 /* DRAM0 mask */
- move.l %d0, MCFSIM_DCMR0(%a0) /* DRAM0 mask */
- move.b #DCCR0, %d0 /* DRAM0 control */
- move.b %d0, MCFSIM_DCCR0(%a0) /* DRAM0 control */
- move.w #DCAR1, %d0 /* DRAM1 base address */
- move.w %d0, MCFSIM_DCAR1(%a0) /* DRAM1 base address */
- move.l #DCMR1, %d0 /* DRAM1 mask */
- move.l %d0, MCFSIM_DCMR1(%a0) /* DRAM1 mask */
- move.b #DCCR1, %d0 /* DRAM1 control */
- move.b %d0, MCFSIM_DCCR1(%a0) /* DRAM1 control */
-
- /*
- * ChipSelect 0 - ROM cs
- *
- * ChipSelect 0 is the global chip select coming out of system reset.
- * CS0 is asserted for every access until CSMR0 is written. Therefore,
- * the entire ChipSelect must be properly set prior to asserting
- * CSCR0_V.
- */
- move.w #CS0_ADDR, %d0 /* CS0 address */
- move.w %d0, MCFSIM_CSAR0(%a0) /* CS0 address */
- move.l #CS0_MASK, %d0 /* CS0 mask */
- move.l %d0, MCFSIM_CSMR0(%a0) /* CS0 mask */
- move.w #CS0_CTRL, %d0 /* CS0 control */
- move.w %d0, MCFSIM_CSCR0(%a0) /* CS0 control */
-
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack
- * Done differently for different eval boards and cpus.
- */
-
-#if defined(CONFIG_SMALL)
- /*
- * Set to SRAM size when configuring a minimal system
- */
- move.l #MEM_MAX, %a0
-
-#else
- /*
- * On the Arnewsh 5206 board and the Motorola m5206eLITE board
- * we can probe for the amount of DRAM present...
- */
- move.l #MEM_MIN, %a0 /* Start at bottom */
- move.l #MEM_MAX, %a1 /* Set stop point */
- lea.l MEM_TMPSTACK, %sp /* Set up tmp stack ptr */
-
- move.l #VBR_BASE+8, %a2 /* Address of bus trap */
- lea.l _ram_buserr, %a3 /* Get RAM trap address */
- move.l %a3, (%a2) /* Set trap to local ptr */
-
-_find_ram:
- move.l (%a0), %d0 /* Attempt read */
- add.l #MEM_LUMP, %a0 /* Try next bank */
- cmp.l %a1, %a0 /* Check more? */
- bne _find_ram
-
- /*
- * BUS error trap handler - used for RAM probing.
- */
-_ram_buserr:
- bra _found_ram
-
-_found_ram: /* Vectored here on bus err */
-#endif
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current task pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S b/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S
--- a/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,230 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for Motorola M5249C3 eval board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * Motorola M5249C3 ColdFire eval board, chip select and memory setup.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define MEM_SIZE 0x00800000 /* Memory size 8MB */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Set MBAR1 and MBAR2, just incase they are not set.
- */
- move.l #0x10000001, %a0
- movec %a0, %MBAR /* Map MBAR region */
- subq.l #1, %a0 /* Get MBAR address in a0 */
-
- move.l #0x80000001, %a1
- movec %a1, #3086 /* Map MBAR2 region */
- subq.l #1, %a1 /* Get MBAR2 address in a1 */
-
- /*
- * Move secondary interrupts to base at 128.
- */
- move.b #0x80, %d0
- move.b %d0, 0x16b(%a1) /* Interrupt base register */
-
-#if 1
- /*
- * Work around broken CSMR0/DRAM vector problem.
- */
- move.l #0x001F0021, %d0 /* Disable C/I bit */
- move.l %d0, 0x84(%a0) /* Set CSMR0 */
-#endif
-
- /*
- * Disable the PLL firstly. (Who knows what state it is
- * in here!).
- */
- move.l 0x180(%a1), %d0 /* Get current PLL value */
- and.l #0xfffffffe, %d0 /* PLL bypass first */
- move.l %d0, 0x180(%a1) /* Set PLL register */
- nop
-
-#ifdef CONFIG_CLOCK_140MHz
- /*
- * Set initial clock frequency. This assumes M5249C3 board
- * is fitted with 11.2896MHz crystal. It will program the
- * PLL for 140MHz. Lets go fast :-)
- */
- move.l #0x125a40f0, %d0 /* Set for 140MHz */
- move.l %d0, 0x180(%a1) /* Set PLL register */
- or.l #0x1, %d0
- move.l %d0, 0x180(%a1) /* Set PLL register */
-#endif
-
- /*
- * Setup CS1 for ethernet controller.
- * (Setup as per M5249C3 doco).
- */
- move.l #0xe0000000, %d0 /* CS1 mapped at 0xe0000000 */
- move.l %d0, 0x8c(%a0)
- move.l #0x001f0021, %d0 /* CS1 size of 1Mb */
- move.l %d0, 0x90(%a0)
- move.w #0x0080, %d0 /* CS1 = 16bit port, AA */
- move.w %d0, 0x96(%a0)
-
- /*
- * Setup CS2 for IDE interface.
- */
- move.l #0x50000000, %d0 /* CS2 mapped at 0x50000000 */
- move.l %d0, 0x98(%a0)
- move.l #0x001f0001, %d0 /* CS2 size of 1MB */
- move.l %d0, 0x9c(%a0)
- move.w #0x0080, %d0 /* CS2 = 16bit, TA */
- move.w %d0, 0xa2(%a0)
-
- move.l #0x00107000, %d0 /* IDEconfig1 */
- move.l %d0, 0x18c(%a1)
- move.l #0x000c0400, %d0 /* IDEconfig2 */
- move.l %d0, 0x190(%a1)
-
- move.l #0x00080000, %d0 /* GPIO19, IDE reset bit */
- or.l %d0, 0xc(%a1) /* Function GPIO19 */
- or.l %d0, 0x8(%a1) /* Enable GPIO19 as output */
- or.l %d0, 0x4(%a1) /* De-assert IDE reset */
-
-
- /*
- * Setup VBR as per eval board (really dBUG does this).
- * These settings must match it.
- */
- move.l #VBR_BASE, %a0 /* Note VBR can't be read */
- movec %a0, %VBR
- move.l %a0, _ramvec /* Set up vector addr */
- move.l %a0, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set the memory size, and then set a temporary stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate whole cache */
- movec %d0, %CACR
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0xa0000200, %d0 /* Enable cache... */
- movec %d0, %CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5249/Makefile b/arch/m68knommu/platform/5249/Makefile
--- a/arch/m68knommu/platform/5249/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5249/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/5272/CANCam/crt0_ram.S b/arch/m68knommu/platform/5272/CANCam/crt0_ram.S
--- a/arch/m68knommu/platform/5272/CANCam/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,154 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for Feith CANCan board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * (C) Copyright 2000, Lineo (www.lineo.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Feith ColdFire CANCam, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-#define MEM_SIZE 0x04000000 /* Memory size 64Mb */
-
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S b/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S
--- a/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,165 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5272 ColdFire based MOTOROLA boards.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * (C) Copyright 2000, Lineo (www.lineo.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Motorola M5272C3 ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
-#if defined(CONFIG_RAMAUTO)
- move.l MCF_MBAR+0x7c,%d0 /* get SDRAM address mask */
- andi.l #0xfffff000,%d0 /* mask out chip select options */
- neg.l %d0 /* negate bits */
-#else
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %d0
-#endif
-
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5272/Makefile b/arch/m68knommu/platform/5272/Makefile
--- a/arch/m68knommu/platform/5272/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5272/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/5272/NETtel/crt0_ram.S b/arch/m68knommu/platform/5272/NETtel/crt0_ram.S
--- a/arch/m68knommu/platform/5272/NETtel/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,196 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5307 ColdFire based NETtel.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-#include "asm/nettel.h"
-
-/*****************************************************************************/
-
-/*
- * Lineo NETtel board memory setup.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-/*
- * The NETtel platform has some funky LEDs!
- */
-.global ppdata
-ppdata:
-.short 0x0000
-
-.global ledbank
-ledbank:
-.byte 0xff
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
-#ifdef CONFIG_ROMFS_FROM_ROM
- /*
- * check for an in RAM romfs
- */
- lea.l _sbss, %a0 /* Get start of bss */
- mov.l (%a0), %d0
- cmp.l #0x2d726f6d, %d0 /* check for "-rom" */
- bne use_xip_romfs
- add.l #4, %a0
- mov.l (%a0), %d0
- cmp.l #0x3166732d, %d0 /* check for "1fs-" */
- bne use_xip_romfs
-#endif
-
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#ifdef CONFIG_ROMFS_FROM_ROM
- bra done_romfs
- use_xip_romfs:
- lea.l _ebss, %a1 /* Set up destination */
- mov.l #0, (%a1) /* make sure we don't use an old RAM version */
- move.l %a1, _ramstart /* Set start of ram */
- done_romfs:
-#endif
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5272/SCALES/crt0_ram.S b/arch/m68knommu/platform/5272/SCALES/crt0_ram.S
--- a/arch/m68knommu/platform/5272/SCALES/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,154 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for Feith SCALES board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * (C) Copyright 2000, Lineo (www.lineo.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Feith ColdFire SCALES, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-#define MEM_SIZE 0x02000000 /* Memory size 32Mb */
-
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5272/senTec/crt0_ram.S b/arch/m68knommu/platform/5272/senTec/crt0_ram.S
--- a/arch/m68knommu/platform/5272/senTec/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,159 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5272 ColdFire based boards.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * (C) Copyright 2000, Lineo (www.lineo.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * senTec COBRA5272 board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/527x/M5271EVB/crt0_ram.S b/arch/m68knommu/platform/527x/M5271EVB/crt0_ram.S
--- a/arch/m68knommu/platform/527x/M5271EVB/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,166 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF527x ColdFire based Freescale boards.
- *
- * (C) Copyright 2003-2004, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Freescale M5271EVB ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM4MB)
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01400000, %d0
- movec %d0, %CACR /* Invalidate cache */
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0x80400100, %d0 /* Configure cache */
- movec %d0, %CACR /* Enable cache */
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/527x/M5275EVB/crt0_ram.S b/arch/m68knommu/platform/527x/M5275EVB/crt0_ram.S
--- a/arch/m68knommu/platform/527x/M5275EVB/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,166 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF527x ColdFire based Freescale boards.
- *
- * (C) Copyright 2003-2004, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Freescale M5275EVB ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM4MB)
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01400000, %d0
- movec %d0, %CACR /* Invalidate cache */
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0x80400100, %d0 /* Configure cache */
- movec %d0, %CACR /* Enable cache */
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/527x/Makefile b/arch/m68knommu/platform/527x/Makefile
--- a/arch/m68knommu/platform/527x/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/527x/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/528x/M5282EVB/crt0_ram.S b/arch/m68knommu/platform/528x/M5282EVB/crt0_ram.S
--- a/arch/m68knommu/platform/528x/M5282EVB/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,171 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for M5282EVB ColdFire based MOTOROLA boards.
- *
- * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Motorola M5282EVB ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- *
- * Cache is totally broken in first 5282 silicon.
- * No point enabling it for now.
- */
-#if 0
- move.l #0x01000000, %d0
- movec %d0, %CACR /* Invalidate cache */
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0x00000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-#endif
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/528x/Makefile b/arch/m68knommu/platform/528x/Makefile
--- a/arch/m68knommu/platform/528x/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/528x/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/528x/senTec/crt0_ram.S b/arch/m68knommu/platform/528x/senTec/crt0_ram.S
--- a/arch/m68knommu/platform/528x/senTec/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,180 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for senTec COBRA5282 ColdFire based boards.
- *
- * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * senTec COBRA5282 board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-#define IPSBAR 0x40000000
-#define GPACR0 0x30
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- *
- * Cache is totally broken in first 5282 silicon.
- * No point enabling it for now.
- */
-#if 0
- move.l #0x01000000, %d0
- movec %d0, %CACR /* Invalidate cache */
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0x00000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-#endif
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * User mode port access
- */
- move.l #0x0000000c, %d0
- move.b %d0, (IPSBAR+GPACR0)
-
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S b/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S
--- a/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,167 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5307 ColdFire Arnewsh board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-#include "asm/nettel.h"
-
-/*****************************************************************************/
-
-/*
- * SnapGear/NETtel board memory setup.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /* make region ROM cachable (turn off for flash programming?) */
- /* 0xff000000 - 0xffffffff */
-#ifdef DEBUGGER_COMPATIBLE_CACHE
- movl #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WTHRU+ACR_WPROTECT,%d0
-#else
- movl #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WBACK+ACR_WPROTECT,%d0
-#endif
- movc %d0,%ACR0
-
- /* make region RAM cachable *
- /* 0x00000000 - 0x00ffffffff */
-#ifdef DEBUGGER_COMPATIBLE_CACHE
- movl #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WTHRU,%d0
-#else
- movl #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WBACK,%d0
-#endif
- movc %d0,%ACR1
-
- /* make the default cache mode precise */
- movl #CACR_EC+CACR_ESB+CACR_DCM_OFF_PRE,%d0 /* enable cache */
- movc %d0,%CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S b/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S
--- a/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,183 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for Feith CLEOPATRA board.
- *
- * (C) Copyright 2001, Roman Wagner.
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * Feith CLEOPATRA board, chip select and memory setup.
-*/
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#else
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
-/*
- * The current version of the 5307 processor
- * SWT does not work. Probing invalid addresses
- * will hang the system.
- *
- * For now, set the memory size to 8 meg
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /* now fire off the cache, remember to invalidate it first */
- movl #0,%d0
- movc %d0,%CACR
- nop
- movc %d0,%CACR /* cache is off */
-
- movl #CACR_CINVA,%d0 /* invalidate whole cache */
- movc %d0,%CACR
- nop
- movc %d0,%CACR
- nop
-
- /* make region ROM cachable (turn off for flash programming?) */
- /* 0xff000000 - 0xffffffff */
- movl #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WBACK+ACR_WPROTECT,%d0
- movc %d0,%ACR0
-
- /* make region RAM cachable *
- /* 0x00000000 - 0x00ffffffff */
- movl #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WBACK,%d0
- movc %d0,%ACR1
-
- /* make the default cache mode precise */
- movl #CACR_EC+CACR_ESB+CACR_DCM_OFF_PRE,%d0 /* enable cache */
- movc %d0,%CACR
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5307/MOTOROLA/crt0_ram.S b/arch/m68knommu/platform/5307/MOTOROLA/crt0_ram.S
--- a/arch/m68knommu/platform/5307/MOTOROLA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,167 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5307C3 Cadre-III ColdFire board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-#include "asm/nettel.h"
-
-/*****************************************************************************/
-
-/*
- * SnapGear/NETtel board memory setup.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /* make region ROM cachable (turn off for flash programming?) */
- /* 0xff000000 - 0xffffffff */
-#ifdef DEBUGGER_COMPATIBLE_CACHE
- movl #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WTHRU+ACR_WPROTECT,%d0
-#else
- movl #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WBACK+ACR_WPROTECT,%d0
-#endif
- movc %d0,%ACR0
-
- /* make region RAM cachable *
- /* 0x00000000 - 0x00ffffffff */
-#ifdef DEBUGGER_COMPATIBLE_CACHE
- movl #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WTHRU,%d0
-#else
- movl #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_WBACK,%d0
-#endif
- movc %d0,%ACR1
-
- /* make the default cache mode precise */
- movl #CACR_EC+CACR_ESB+CACR_DCM_OFF_PRE,%d0 /* enable cache */
- movc %d0,%CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5307/MP3/crt0_ram.S b/arch/m68knommu/platform/5307/MP3/crt0_ram.S
--- a/arch/m68knommu/platform/5307/MP3/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,181 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5307 ColdFire based MP3.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * Copyright (C) 2000-2001 Lineo Inc. (www.lineo.com)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-#include "asm/nettel.h"
-
-/*****************************************************************************/
-
-/*
- * SnapGear/NETtel board memory setup.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#else
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Disable watchdog timer.
- */
- move.l #MCF_MBAR, %a0 /* Get MBAR address */
- clr.l %d0 /* Disable SWT */
- move.b %d0, MCFSIM_SYPCR(%a0)
- move.b #0x55, %d0 /* Clear SWT as well */
- move.b %d0, MCFSIM_SWSR(%a0)
- move.b #0xaa, %d0
- move.b %d0, MCFSIM_SWSR(%a0)
- move.l #0xffffffff, %d0 /* Mask out all interrupts */
- move.l %d0, MCFSIM_IMR(%a0)
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* invalidate whole cache */
- movec %d0,%CACR
- nop
-
- /* MUST be write-through for DMA to work... */
- /* This also makes this debugger safe */
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- /* Enable cache */
- move.l #0xa0000200, %d0
- movec %d0,%CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile
--- a/arch/m68knommu/platform/5307/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5307/Makefile 2005-03-20 16:30:37 -08:00
@@ -26,6 +26,4 @@
obj-$(CONFIG_M528x) += pit.o
obj-$(CONFIG_M5407) += timers.o
-ifeq ($(CONFIG_M5307),y)
-extra-y := $(BOARD)/crt0_$(MODEL).o
-endif
+extra-y := head.o
diff -Nru a/arch/m68knommu/platform/5307/NETtel/crt0_ram.S b/arch/m68knommu/platform/5307/NETtel/crt0_ram.S
--- a/arch/m68knommu/platform/5307/NETtel/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,204 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5307 ColdFire based NETtel.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-#include "asm/nettel.h"
-
-/*****************************************************************************/
-
-/*
- * SnapGear/NETtel board memory setup.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-/*
- * The NETtel platform has some funky LEDs!
- */
-.global ppdata
-ppdata:
-.short 0x0000
-
-.global ledbank
-ledbank:
-.byte 0xff
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Set LEDs to known startup state.
- */
- move.l #NETtel_LEDADDR, %a5 /* Addr of LED bank */
- move.b #0xff, (%a5) /* Turn them all off */
-
-
- /*
- * Disable watchdog timer.
- */
- move.l #MCF_MBAR, %a0 /* Get MBAR address */
- clr.l %d0 /* Disable SWT */
- move.b %d0, MCFSIM_SYPCR(%a0)
- move.b #0x55, %d0 /* Clear SWT as well */
- move.b %d0, MCFSIM_SWSR(%a0)
- move.b #0xaa, %d0
- move.b %d0, MCFSIM_SWSR(%a0)
- move.l #0xffffffff, %d0 /* Mask out all interrupts */
- move.l %d0, MCFSIM_IMR(%a0)
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01000000, %d0 /* invalidate whole cache */
- movec %d0,%CACR
- nop
-#ifdef DEBUGGER_COMPATIBLE_CACHE
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
-#else
- move.l #0x0000c020, %d0 /* Set SDRAM cached only (copyback) */
-#endif
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- /* Enable cache */
- move.l #0xa0000200, %d0
- movec %d0,%CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5307/head.S b/arch/m68knommu/platform/5307/head.S
--- a/arch/m68knommu/platform/5307/head.S 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5307/head.S 2005-03-20 16:30:37 -08:00
@@ -11,7 +11,7 @@
#include <linux/config.h>
#include <linux/sys.h>
#include <linux/linkage.h>
-#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
#include <asm/coldfire.h>
#include <asm/mcfcache.h>
#include <asm/mcfsim.h>
@@ -87,7 +87,7 @@
.endm
#elif defined(CONFIG_M5272)
-.macro GET_MEMORY_SIZE
+.macro GET_MEM_SIZE
movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
andil #0xfffff000,%d0 /* mask out chip select options */
negl %d0 /* negate bits */
diff -Nru a/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S b/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S
--- a/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,180 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for Feith Cleopatra 2 board.
- *
- * (C) Copyright 2001, Roman Wagner.
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * Feith CLEOPATRA board, chip select and memory setup.
-*/
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
-/*
- * The current version of the 5307 processor
- * SWT does not work. Probing invalid addresses
- * will hang the system.
- *
- * For now, set the memory size to 8 meg
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01040100, %d0 /* Invalidate whole cache */
- movec %d0,%CACR
- nop
-
- /* make region ROM cachable (turn off for flash programming?) */
- /* 0xff000000 - 0xffffffff */
- move.l #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_CP+ACR_WPROTECT,%d0
- movec %d0,%ACR0
-
- /* make region RAM cachable */
- /* 0x00000000 - 0x00ffffffff */
- move.l #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_CP,%d0
- movec %d0,%ACR1
-
- move.l #(0xff<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_CP+ACR_WPROTECT,%d0
- movec %d0,%ACR2
-
- move.l #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_CP,%d0
- movec %d0,%ACR3
-
- /* Enable cache */
- move.l #0xa4098400, %d0 /* Write buffer, dflt precise */
- movec %d0,%CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current task pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S b/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S
--- a/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,160 +0,0 @@
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for Motorola 5407 eval board.
- *
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
- * (C) Copyright 2000, Lineo (www.lineo.com).
- *
- * 1999/02/24 Modified for the 5307 processor David W. Miller
- */
-
-/*****************************************************************************/
-
-#include "linux/autoconf.h"
-#include "asm/coldfire.h"
-#include "asm/mcfsim.h"
-
-/*****************************************************************************/
-
-/*
- * Board setup info.
- */
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#define MEM_SIZE 0x02000000 /* Memory size 32 */
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR as per eval board (really dBUG does this).
- * These settings must match it.
- */
- move.l #VBR_BASE, %a0 /* Note VBR can't be read */
- movec %a0, %VBR
- move.l %a0, _ramvec /* Set up vector addr */
- move.l %a0, _rambase /* Set up base RAM addr */
-
-
- /*
- * Determine size of RAM, then set up initial stack.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
-
- /*
- * Enable CPU internal cache.
- */
- move.l #0x01040100, %d0 /* Invalidate whole cache */
- movec %d0,%CACR
- nop
- move.l #0x000fc000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
- move.l #0x000fc000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR2
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR3
-
- /* Enable cache */
- move.l #0xb6088400, %d0 /* Enable caches */
- movec %d0,%CACR
- nop
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current task pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
diff -Nru a/arch/m68knommu/platform/5407/Makefile b/arch/m68knommu/platform/5407/Makefile
--- a/arch/m68knommu/platform/5407/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/5407/Makefile 2005-03-20 16:30:37 -08:00
@@ -18,4 +18,3 @@
obj-y := config.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
diff -Nru a/arch/m68knommu/platform/68328/Makefile b/arch/m68knommu/platform/68328/Makefile
--- a/arch/m68knommu/platform/68328/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/68328/Makefile 2005-03-20 16:30:37 -08:00
@@ -2,14 +2,20 @@
# Makefile for arch/m68knommu/platform/68328.
#
-obj-$(CONFIG_M68328) += entry.o ints.o config.o
-obj-$(CONFIG_M68EZ328) += entry.o ints.o
-obj-$(CONFIG_M68VZ328) += entry.o ints.o
+head-y = head-$(MODEL).o
+head-$(CONFIG_PILOT) = head-pilot.o
+head-$(CONFIG_DRAGEN2) = head-de2.o
-ifeq ($(CONFIG_M68328),y)
-extra-y := $(BOARD)/bootlogo.rh $(BOARD)/crt0_$(MODEL).o
-endif
+obj-y += entry.o ints.o timers.o
+obj-$(CONFIG_M68328) += config.o
-$(obj)/$(BOARD)/bootlogo.rh: $(src)/bootlogo.h
- perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/$(BOARD)/bootlogo.rh
+extra-y := head.o
+extra-$(CONFIG_M68328) += bootlogo.rh head.o
+$(obj)/bootlogo.rh: $(src)/bootlogo.h
+ perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh
+
+$(obj)/head.o: $(obj)/$(head-y)
+ ln -sf $(head-y) $(obj)/head.o
+
+clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y)
diff -Nru a/arch/m68knommu/platform/68328/head-pilot.S b/arch/m68knommu/platform/68328/head-pilot.S
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/m68knommu/platform/68328/head-pilot.S 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,224 @@
+/*
+ * linux/arch/m68knommu/platform/68328/head-rom.S
+ * - A startup file for the MC68328
+ *
+ * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
+ * Kenneth Albanowski <kjahds@kjahds.com>,
+ * The Silver Hammer Group, Ltd.
+ *
+ * (c) 1995, Dionne & Associates
+ * (c) 1995, DKG Display Tech.
+ */
+
+#define ASSEMBLY
+
+#define IMMED #
+#define DBG_PUTC(x) moveb IMMED x, 0xfffff907
+
+#include <linux/config.h>
+
+.global _stext
+.global _start
+
+.global _rambase
+.global __ramvec
+.global _ramvec
+.global _ramstart
+.global _ramend
+
+.global penguin_bits
+
+#ifdef CONFIG_PILOT
+
+#define IMR 0xFFFFF304
+
+ .data
+ .align 16
+
+penguin_bits:
+#include "bootlogo.rh"
+
+#endif
+
+/*****************************************************************************/
+
+.data
+
+/*
+ * Set up the usable of RAM stuff. Size of RAM is determined then
+ * an initial stack set up at the end.
+ */
+.align 4
+_ramvec:
+.long 0
+_rambase:
+.long 0
+_ramstart:
+.long 0
+_ramend:
+.long 0
+
+.text
+
+_start:
+_stext:
+
+
+#ifdef CONFIG_M68328
+
+#ifdef CONFIG_PILOT
+ .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */
+ .byte 'b', 'o', 'o', 't'
+ .word 10000
+
+ nop
+#endif
+
+ moveq #0, %d0
+ movew %d0, 0xfffff618 /* Watchdog off */
+ movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
+
+ movew #0x0800, 0xfffff906 /* Ignore CTS */
+ movew #0x010b, 0xfffff902 /* BAUD to 9600 */
+
+ movew #0x2410, 0xfffff200 /* PLLCR */
+ movew #0x123, 0xfffff202 /* PLLFSR */
+
+#ifdef CONFIG_PILOT
+ moveb #0, 0xfffffA27 /* LCKCON */
+ movel #_start, 0xfffffA00 /* LSSA */
+ moveb #0xa, 0xfffffA05 /* LVPW */
+ movew #0x9f, 0xFFFFFa08 /* LXMAX */
+ movew #0x9f, 0xFFFFFa0a /* LYMAX */
+ moveb #9, 0xfffffa29 /* LBAR */
+ moveb #0, 0xfffffa25 /* LPXCD */
+ moveb #0x04, 0xFFFFFa20 /* LPICF */
+ moveb #0x58, 0xfffffA27 /* LCKCON */
+ moveb #0x85, 0xfffff429 /* PFDATA */
+ moveb #0xd8, 0xfffffA27 /* LCKCON */
+ moveb #0xc5, 0xfffff429 /* PFDATA */
+ moveb #0xd5, 0xfffff429 /* PFDATA */
+
+ moveal #0x00100000, %a3
+ moveal #0x100ffc00, %a4
+#endif /* CONFIG_PILOT */
+
+#endif /* CONFIG_M68328 */
+
+ movew #0x2700, %sr
+ lea %a4@(-4), %sp
+
+ DBG_PUTC('\r')
+ DBG_PUTC('\n')
+ DBG_PUTC('A')
+
+ moveq #0,%d0
+ movew #16384, %d0 /* PLL settle wait loop */
+L0:
+ subw #1, %d0
+ bne L0
+
+ DBG_PUTC('B')
+
+ /* Copy command line from beginning of RAM (+16) to end of bss */
+ movel #__ramvec, %d7
+ addl #16, %d7
+ moveal %d7, %a0
+ moveal #_ebss, %a1
+ lea %a1@(512), %a2
+
+ DBG_PUTC('C')
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+L2:
+ movel %a0@+, %d0
+ movel %d0, %a1@+
+ cmpal %a1, %a2
+ bhi L2
+
+ /* Copy data+init segment from ROM to RAM */
+ moveal #_etext, %a0
+ moveal #_sdata, %a1
+ moveal #__init_end, %a2
+
+ DBG_PUTC('D')
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+ movel %a0@+, %d0
+ movel %d0, %a1@+
+ cmpal %a1, %a2
+ bhi LD1
+
+ DBG_PUTC('E')
+
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
+
+ /* Copy 0 to %a0 until %a0 == %a1 */
+L1:
+ movel #0, %a0@+
+ cmpal %a0, %a1
+ bhi L1
+
+ DBG_PUTC('F')
+
+ /* Copy command line from end of bss to command line */
+ moveal #_ebss, %a0
+ moveal #command_line, %a1
+ lea %a1@(512), %a2
+
+ DBG_PUTC('G')
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+L3:
+ movel %a0@+, %d0
+ movel %d0, %a1@+
+ cmpal %a1, %a2
+ bhi L3
+
+ movel #_sdata, %d0
+ movel %d0, _rambase
+ movel #_ebss, %d0
+ movel %d0, _ramstart
+
+ movel %a4, %d0
+ subl #4096, %d0 /* Reserve 4K of stack */
+ moveq #79, %d7
+ movel %d0, _ramend
+
+ movel %a3, %d0
+ movel %d0, rom_length
+
+ pea 0
+ pea env
+ pea %sp@(4)
+ pea 0
+
+ DBG_PUTC('H')
+
+#ifdef CONFIG_PILOT
+ movel #penguin_bits, 0xFFFFFA00
+ moveb #10, 0xFFFFFA05
+ movew #160, 0xFFFFFA08
+ movew #160, 0xFFFFFA0A
+#endif /* CONFIG_PILOT */
+
+ DBG_PUTC('I')
+
+ lea init_thread_union, %a0
+ lea 0x2000(%a0), %sp
+
+ DBG_PUTC('J')
+ DBG_PUTC('\r')
+ DBG_PUTC('\n')
+
+ jsr start_kernel
+_exit:
+
+ jmp _exit
+
+
+ .data
+env:
+ .long 0
diff -Nru a/arch/m68knommu/platform/68328/head-ram.S b/arch/m68knommu/platform/68328/head-ram.S
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/m68knommu/platform/68328/head-ram.S 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,171 @@
+#include <linux/config.h>
+
+ .global __main
+ .global __ram_start
+ .global __ram_end
+ .global __rom_start
+ .global __rom_end
+
+ .global _rambase
+ .global _ramstart
+
+ .global splash_bits
+ .global _start
+ .global _stext
+
+#define DEBUG
+#define ROM_OFFSET 0x10C00000
+#define STACK_GAURD 0x10
+
+ .text
+
+_start:
+_stext:
+ movew #0x2700, %sr /* Exceptions off! */
+
+#if 0
+ /* Init chip registers. uCsimm specific */
+ moveb #0x00, 0xfffffb0b /* Watchdog off */
+ moveb #0x10, 0xfffff000 /* SCR */
+
+ movew #0x2400, 0xfffff200 /* PLLCR */
+ movew #0x0123, 0xfffff202 /* PLLFSR */
+
+ moveb #0x00, 0xfffff40b /* enable chip select */
+ moveb #0x00, 0xfffff423 /* enable /DWE */
+ moveb #0x08, 0xfffffd0d /* disable hardmap */
+ moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
+
+ movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
+ movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
+
+ movew #0x8f00, 0xfffffc00 /* DRAM configuration */
+ movew #0x9667, 0xfffffc02 /* DRAM control */
+ movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
+ movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
+
+ moveb #0x40, 0xfffff300 /* IVR */
+ movel #0x007FFFFF, %d0 /* IMR */
+ movel %d0, 0xfffff304
+
+ moveb 0xfffff42b, %d0
+ andb #0xe0, %d0
+ moveb %d0, 0xfffff42b
+
+ moveb #0x08, 0xfffff907 /* Ignore CTS */
+ movew #0x010b, 0xfffff902 /* BAUD to 9600 */
+ movew #0xe100, 0xfffff900 /* enable */
+#endif
+
+ movew #16384, %d0 /* PLL settle wait loop */
+L0:
+ subw #1, %d0
+ bne L0
+#ifdef DEBUG
+ moveq #70, %d7 /* 'F' */
+ moveb %d7,0xfffff907 /* No absolute addresses */
+pclp1:
+ movew 0xfffff906, %d7
+ andw #0x2000, %d7
+ beq pclp1
+#endif /* DEBUG */
+
+#ifdef CONFIG_RELOCATE
+ /* Copy me to RAM */
+ moveal #__rom_start, %a0
+ moveal #__ram_start, %a1
+ moveal #_edata, %a2
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+ movel %a0@+, %d0
+ movel %d0, %a1@+
+ cmpal %a1, %a2
+ bhi LD1
+
+#ifdef DEBUG
+ moveq #74, %d7 /* 'J' */
+ moveb %d7,0xfffff907 /* No absolute addresses */
+pclp2:
+ movew 0xfffff906, %d7
+ andw #0x2000, %d7
+ beq pclp2
+#endif /* DEBUG */
+ /* jump into the RAM copy */
+ jmp ram_jump
+ram_jump:
+
+#endif /* CONFIG_RELOCATE */
+
+#ifdef DEBUG
+ moveq #82, %d7 /* 'R' */
+ moveb %d7,0xfffff907 /* No absolute addresses */
+pclp3:
+ movew 0xfffff906, %d7
+ andw #0x2000, %d7
+ beq pclp3
+#endif /* DEBUG */
+ moveal #0x007ffff0, %ssp
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
+
+ /* Copy 0 to %a0 until %a0 >= %a1 */
+L1:
+ movel #0, %a0@+
+ cmpal %a0, %a1
+ bhi L1
+
+#ifdef DEBUG
+ moveq #67, %d7 /* 'C' */
+ jsr putc
+#endif /* DEBUG */
+
+ pea 0
+ pea env
+ pea %sp@(4)
+ pea 0
+
+#ifdef DEBUG
+ moveq #70, %d7 /* 'F' */
+ jsr putc
+#endif /* DEBUG */
+
+lp:
+ jsr start_kernel
+ jmp lp
+_exit:
+
+ jmp _exit
+
+__main:
+ /* nothing */
+ rts
+
+#ifdef DEBUG
+putc:
+ moveb %d7,0xfffff907
+pclp:
+ movew 0xfffff906, %d7
+ andw #0x2000, %d7
+ beq pclp
+ rts
+#endif /* DEBUG */
+
+ .data
+
+/*
+ * Set up the usable of RAM stuff. Size of RAM is determined then
+ * an initial stack set up at the end.
+ */
+.align 4
+_ramvec:
+.long 0
+_rambase:
+.long 0
+_ramstart:
+.long 0
+_ramend:
+.long 0
+
+env:
+ .long 0
diff -Nru a/arch/m68knommu/platform/68328/head-rom.S b/arch/m68knommu/platform/68328/head-rom.S
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/m68knommu/platform/68328/head-rom.S 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,109 @@
+#include <linux/config.h>
+
+ .global _start
+ .global _stext
+
+ .global _rambase
+ .global _ramvec
+ .global _ramstart
+ .global _ramend
+
+#ifdef CONFIG_INIT_LCD
+ .global splash_bits
+#endif
+
+ .data
+
+/*
+ * Set up the usable of RAM stuff. Size of RAM is determined then
+ * an initial stack set up at the end.
+ */
+.align 4
+_ramvec:
+.long 0
+_rambase:
+.long 0
+_ramstart:
+.long 0
+_ramend:
+.long 0
+
+#ifdef CONFIG_INIT_LCD
+splash_bits:
+#include "bootlogo.rh"
+#endif
+
+ .text
+_start:
+_stext: movew #0x2700,%sr
+#ifdef CONFIG_INIT_LCD
+ movel #splash_bits, 0xfffffA00 /* LSSA */
+ moveb #0x28, 0xfffffA05 /* LVPW */
+ movew #0x280, 0xFFFFFa08 /* LXMAX */
+ movew #0x1df, 0xFFFFFa0a /* LYMAX */
+ moveb #0, 0xfffffa29 /* LBAR */
+ moveb #0, 0xfffffa25 /* LPXCD */
+ moveb #0x08, 0xFFFFFa20 /* LPICF */
+ moveb #0x01, 0xFFFFFA21 /* -ve pol */
+ moveb #0x81, 0xfffffA27 /* LCKCON */
+ movew #0xff00, 0xfffff412 /* LCD pins */
+#endif
+ moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
+ movew #32767, %d0 /* PLL settle wait loop */
+1: subq #1, %d0
+ bne 1b
+
+ /* Copy data segment from ROM to RAM */
+ moveal #_etext, %a0
+ moveal #_sdata, %a1
+ moveal #_edata, %a2
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+1: movel %a0@+, %a1@+
+ cmpal %a1, %a2
+ bhi 1b
+
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
+ /* Copy 0 to %a0 until %a0 == %a1 */
+
+1:
+ clrl %a0@+
+ cmpal %a0, %a1
+ bhi 1b
+
+ movel #_sdata, %d0
+ movel %d0, _rambase
+ movel #_ebss, %d0
+ movel %d0, _ramstart
+ movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0
+ movel %d0, _ramend
+ movel #__ramvec, %d0
+ movel %d0, _ramvec
+
+/*
+ * load the current task pointer and stack
+ */
+ lea init_thread_union, %a0
+ lea 0x2000(%a0), %sp
+
+1: jsr start_kernel
+ bra 1b
+_exit:
+
+ jmp _exit
+
+
+putc:
+ moveb %d7,0xfffff907
+1:
+ movew 0xfffff906, %d7
+ andw #0x2000, %d7
+ beq 1b
+ rts
+
+ .data
+env:
+ .long 0
+ .text
+
diff -Nru a/arch/m68knommu/platform/68328/pilot/crt0_rom.S b/arch/m68knommu/platform/68328/pilot/crt0_rom.S
--- a/arch/m68knommu/platform/68328/pilot/crt0_rom.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,224 +0,0 @@
-/*
- * linux/arch/m68knommu/platform/68328/pilot/crt0_rom.S
- * - A startup file for the MC68332
- *
- * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
- * Kenneth Albanowski <kjahds@kjahds.com>,
- * The Silver Hammer Group, Ltd.
- *
- * (c) 1995, Dionne & Associates
- * (c) 1995, DKG Display Tech.
- */
-
-#define ASSEMBLY
-
-#define IMMED #
-#define DBG_PUTC(x) moveb IMMED x, 0xfffff907
-
-#include <linux/config.h>
-
-.global _stext
-.global _start
-
-.global _rambase
-.global __ramvec
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-.global penguin_bits
-
-#ifdef CONFIG_PILOT
-
-#define IMR 0xFFFFF304
-
- .data
- .align 16
-
-penguin_bits:
-#include "bootlogo.rh"
-
-#endif
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-.align 4
-_ramvec:
-.long 0
-_rambase:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-.text
-
-_start:
-_stext:
-
-
-#ifdef CONFIG_M68328
-
-#ifdef CONFIG_PILOT
- .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */
- .byte 'b', 'o', 'o', 't'
- .word 10000
-
- nop
-#endif
-
- moveq #0, %d0
- movew %d0, 0xfffff618 /* Watchdog off */
- movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
-
- movew #0x0800, 0xfffff906 /* Ignore CTS */
- movew #0x010b, 0xfffff902 /* BAUD to 9600 */
-
- movew #0x2410, 0xfffff200 /* PLLCR */
- movew #0x123, 0xfffff202 /* PLLFSR */
-
-#ifdef CONFIG_PILOT
- moveb #0, 0xfffffA27 /* LCKCON */
- movel #_start, 0xfffffA00 /* LSSA */
- moveb #0xa, 0xfffffA05 /* LVPW */
- movew #0x9f, 0xFFFFFa08 /* LXMAX */
- movew #0x9f, 0xFFFFFa0a /* LYMAX */
- moveb #9, 0xfffffa29 /* LBAR */
- moveb #0, 0xfffffa25 /* LPXCD */
- moveb #0x04, 0xFFFFFa20 /* LPICF */
- moveb #0x58, 0xfffffA27 /* LCKCON */
- moveb #0x85, 0xfffff429 /* PFDATA */
- moveb #0xd8, 0xfffffA27 /* LCKCON */
- moveb #0xc5, 0xfffff429 /* PFDATA */
- moveb #0xd5, 0xfffff429 /* PFDATA */
-
- moveal #0x00100000, %a3
- moveal #0x100ffc00, %a4
-#endif /* CONFIG_PILOT */
-
-#endif /* CONFIG_M68328 */
-
- movew #0x2700, %sr
- lea %a4@(-4), %sp
-
- DBG_PUTC('\r')
- DBG_PUTC('\n')
- DBG_PUTC('A')
-
- moveq #0,%d0
- movew #16384, %d0 /* PLL settle wait loop */
-L0:
- subw #1, %d0
- bne L0
-
- DBG_PUTC('B')
-
- /* Copy command line from beginning of RAM (+16) to end of bss */
- movel #__ramvec, %d7
- addl #16, %d7
- moveal %d7, %a0
- moveal #_ebss, %a1
- lea %a1@(512), %a2
-
- DBG_PUTC('C')
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-L2:
- movel %a0@+, %d0
- movel %d0, %a1@+
- cmpal %a1, %a2
- bhi L2
-
- /* Copy data+init segment from ROM to RAM */
- moveal #_etext, %a0
- moveal #_sdata, %a1
- moveal #__init_end, %a2
-
- DBG_PUTC('D')
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-LD1:
- movel %a0@+, %d0
- movel %d0, %a1@+
- cmpal %a1, %a2
- bhi LD1
-
- DBG_PUTC('E')
-
- moveal #_sbss, %a0
- moveal #_ebss, %a1
-
- /* Copy 0 to %a0 until %a0 == %a1 */
-L1:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi L1
-
- DBG_PUTC('F')
-
- /* Copy command line from end of bss to command line */
- moveal #_ebss, %a0
- moveal #command_line, %a1
- lea %a1@(512), %a2
-
- DBG_PUTC('G')
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-L3:
- movel %a0@+, %d0
- movel %d0, %a1@+
- cmpal %a1, %a2
- bhi L3
-
- movel #_sdata, %d0
- movel %d0, _rambase
- movel #_ebss, %d0
- movel %d0, _ramstart
-
- movel %a4, %d0
- subl #4096, %d0 /* Reserve 4K of stack */
- moveq #79, %d7
- movel %d0, _ramend
-
- movel %a3, %d0
- movel %d0, rom_length
-
- pea 0
- pea env
- pea %sp@(4)
- pea 0
-
- DBG_PUTC('H')
-
-#ifdef CONFIG_PILOT
- movel #penguin_bits, 0xFFFFFA00
- moveb #10, 0xFFFFFA05
- movew #160, 0xFFFFFA08
- movew #160, 0xFFFFFA0A
-#endif /* CONFIG_PILOT */
-
- DBG_PUTC('I')
-
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- DBG_PUTC('J')
- DBG_PUTC('\r')
- DBG_PUTC('\n')
-
- jsr start_kernel
-_exit:
-
- jmp _exit
-
-
- .data
-env:
- .long 0
diff -Nru a/arch/m68knommu/platform/68360/Makefile b/arch/m68knommu/platform/68360/Makefile
--- a/arch/m68knommu/platform/68360/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/68360/Makefile 2005-03-20 16:30:37 -08:00
@@ -4,4 +4,7 @@
obj-y := config.o commproc.o entry.o ints.o
-extra-y := $(BOARD)/crt0_$(MODEL).o
+extra-y := head.o
+
+$(obj)/head.o: $(obj)/head-$(MODEL).o
+ ln -sf head-$(MODEL).o $(obj)/head.o
diff -Nru a/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S b/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S
--- a/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,408 +0,0 @@
-/* arch/m68knommu/platform/68360/uCquicc/crt0_rom.S
- *
- * Startup code for Motorola 68360
- *
- * Copyright 2001 (C) SED Systems, a Division of Calian Ltd.
- * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
- * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
- * uClinux Kernel
- * Copyright (C) Michael Leslie <mleslie@lineo.com>
- * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
- * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
- *
- */
-#define ASSEMBLY
-#include <linux/config.h>
-
-.global _stext
-.global _start
-
-.global _rambase
-.global __ramvec
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-.global _quicc_base
-.global _periph_base
-
-#define REGB 0x1000
-#define PEPAR (_dprbase + REGB + 0x0016)
-#define GMR (_dprbase + REGB + 0x0040)
-#define OR0 (_dprbase + REGB + 0x0054)
-#define BR0 (_dprbase + REGB + 0x0050)
-#define OR1 (_dprbase + REGB + 0x0064)
-#define BR1 (_dprbase + REGB + 0x0060)
-#define OR4 (_dprbase + REGB + 0x0094)
-#define BR4 (_dprbase + REGB + 0x0090)
-#define OR6 (_dprbase + REGB + 0x00b4)
-#define BR6 (_dprbase + REGB + 0x00b0)
-#define OR7 (_dprbase + REGB + 0x00c4)
-#define BR7 (_dprbase + REGB + 0x00c0)
-
-#define MCR (_dprbase + REGB + 0x0000)
-#define AVR (_dprbase + REGB + 0x0008)
-
-#define SYPCR (_dprbase + REGB + 0x0022)
-
-#define PLLCR (_dprbase + REGB + 0x0010)
-#define CLKOCR (_dprbase + REGB + 0x000C)
-#define CDVCR (_dprbase + REGB + 0x0014)
-
-#define BKAR (_dprbase + REGB + 0x0030)
-#define BKCR (_dprbase + REGB + 0x0034)
-#define SWIV (_dprbase + REGB + 0x0023)
-#define PICR (_dprbase + REGB + 0x0026)
-#define PITR (_dprbase + REGB + 0x002A)
-
-/* Define for all memory configuration */
-#define MCU_SIM_GMR 0x00000000
-#define SIM_OR_MASK 0x0fffffff
-
-/* Defines for chip select zero - the flash */
-#define SIM_OR0_MASK 0x20000002
-#define SIM_BR0_MASK 0x00000001
-
-
-/* Defines for chip select one - the RAM */
-#define SIM_OR1_MASK 0x10000000
-#define SIM_BR1_MASK 0x00000001
-
-#define MCU_SIM_MBAR_ADRS 0x0003ff00
-#define MCU_SIM_MBAR_BA_MASK 0xfffff000
-#define MCU_SIM_MBAR_AS_MASK 0x00000001
-
-#define MCU_SIM_PEPAR 0x00B4
-
-#define MCU_DISABLE_INTRPTS 0x2700
-#define MCU_SIM_AVR 0x00
-
-#define MCU_SIM_MCR 0x00005cff
-
-#define MCU_SIM_CLKOCR 0x00
-#define MCU_SIM_PLLCR 0x8000
-#define MCU_SIM_CDVCR 0x0000
-
-#define MCU_SIM_SYPCR 0x0000
-#define MCU_SIM_SWIV 0x00
-#define MCU_SIM_PICR 0x0000
-#define MCU_SIM_PITR 0x0000
-
-
-#include <asm/m68360_regs.h>
-
-
-/*
- * By the time this RAM specific code begins to execute, DPRAM
- * and DRAM should already be mapped and accessible.
- */
-
- .text
-_start:
-_stext:
- nop
- ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
- /* We should not need to setup the boot stack the reset should do it. */
- movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/
-
-set_mbar_register:
- moveq.l #0x07, %d1 /* Setup MBAR */
- movec %d1, %dfc
-
- lea.l MCU_SIM_MBAR_ADRS, %a0
- move.l #_dprbase, %d0
- andi.l #MCU_SIM_MBAR_BA_MASK, %d0
- ori.l #MCU_SIM_MBAR_AS_MASK, %d0
- moves.l %d0, %a0@
-
- moveq.l #0x05, %d1
- movec.l %d1, %dfc
-
- /* Now we can begin to access registers in DPRAM */
-
-set_sim_mcr:
- /* Set Module Configuration Register */
- move.l #MCU_SIM_MCR, MCR
-
- /* to do: Determine cause of reset */
-
- /*
- * configure system clock MC68360 p. 6-40
- * (value +1)*osc/128 = system clock
- */
-set_sim_clock:
- move.w #MCU_SIM_PLLCR, PLLCR
- move.b #MCU_SIM_CLKOCR, CLKOCR
- move.w #MCU_SIM_CDVCR, CDVCR
-
- /* Wait for the PLL to settle */
- move.w #16384, %d0
-pll_settle_wait:
- subi.w #1, %d0
- bne pll_settle_wait
-
- /* Setup the system protection register, and watchdog timer register */
- move.b #MCU_SIM_SWIV, SWIV
- move.w #MCU_SIM_PICR, PICR
- move.w #MCU_SIM_PITR, PITR
- move.w #MCU_SIM_SYPCR, SYPCR
-
- /* Clear DPRAM - system + parameter */
- movea.l #_dprbase, %a0
- movea.l #_dprbase+0x2000, %a1
-
- /* Copy 0 to %a0 until %a0 == %a1 */
-clear_dpram:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi clear_dpram
-
-configure_memory_controller:
- /* Set up Global Memory Register (GMR) */
- move.l #MCU_SIM_GMR, %d0
- move.l %d0, GMR
-
-configure_chip_select_0:
- move.l #__ramend, %d0
- subi.l #__ramstart, %d0
- subq.l #0x01, %d0
- eori.l #SIM_OR_MASK, %d0
- ori.l #SIM_OR0_MASK, %d0
- move.l %d0, OR0
-
- move.l #__ramstart, %d0
- ori.l #SIM_BR0_MASK, %d0
- move.l %d0, BR0
-
-configure_chip_select_1:
- move.l #__rom_end, %d0
- subi.l #__rom_start, %d0
- subq.l #0x01, %d0
- eori.l #SIM_OR_MASK, %d0
- ori.l #SIM_OR1_MASK, %d0
- move.l %d0, OR1
-
- move.l #__rom_start, %d0
- ori.l #SIM_BR1_MASK, %d0
- move.l %d0, BR1
-
- move.w #MCU_SIM_PEPAR, PEPAR
-
- /* point to vector table: */
- move.l #_romvec, %a0
- move.l #_ramvec, %a1
-copy_vectors:
- move.l %a0@, %d0
- move.l %d0, %a1@
- move.l %a0@, %a1@
- addq.l #0x04, %a0
- addq.l #0x04, %a1
- cmp.l #_start, %a0
- blt copy_vectors
-
- move.l #_ramvec, %a1
- movec %a1, %vbr
-
-
- /* Copy data segment from ROM to RAM */
- moveal #_stext, %a0
- moveal #_sdata, %a1
- moveal #_edata, %a2
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-LD1:
- move.l %a0@, %d0
- addq.l #0x04, %a0
- move.l %d0, %a1@
- addq.l #0x04, %a1
- cmp.l #_edata, %a1
- blt LD1
-
- moveal #_sbss, %a0
- moveal #_ebss, %a1
-
- /* Copy 0 to %a0 until %a0 == %a1 */
-L1:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi L1
-
-load_quicc:
- move.l #_dprbase, _quicc_base
-
-store_ram_size:
- /* Set ram size information */
- move.l #_sdata, _rambase
- move.l #_ebss, _ramstart
- move.l #__ramend, %d0
- sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
- move.l %d0, _ramend /* Different from __ramend.*/
-
-store_flash_size:
- /* Set rom size information */
- move.l #__rom_end, %d0
- sub.l #__rom_start, %d0
- move.l %d0, rom_length
-
- pea 0
- pea env
- pea %sp@(4)
- pea 0
-
- lea init_thread_union, %a2
- lea 0x2000(%a2), %sp
-
-lp:
- jsr start_kernel
-
-_exit:
- jmp _exit
-
-
- .data
- .align 4
-env:
- .long 0
-_quicc_base:
- .long 0
-_periph_base:
- .long 0
-_ramvec:
- .long 0
-_rambase:
- .long 0
-_ramstart:
- .long 0
-_ramend:
- .long 0
-_dprbase:
- .long 0xffffe000
-
- .text
-
- /*
- * These are the exception vectors at boot up, they are copied into RAM
- * and then overwritten as needed.
- */
-
-.section ".data.initvect","awx"
- .long __ramend /* Reset: Initial Stack Pointer - 0. */
- .long _start /* Reset: Initial Program Counter - 1. */
- .long buserr /* Bus Error - 2. */
- .long trap /* Address Error - 3. */
- .long trap /* Illegal Instruction - 4. */
- .long trap /* Divide by zero - 5. */
- .long trap /* CHK, CHK2 Instructions - 6. */
- .long trap /* TRAPcc, TRAPV Instructions - 7. */
- .long trap /* Privilege Violation - 8. */
- .long trap /* Trace - 9. */
- .long trap /* Line 1010 Emulator - 10. */
- .long trap /* Line 1111 Emualtor - 11. */
- .long trap /* Harware Breakpoint - 12. */
- .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
- .long trap /* Format Error - 14. */
- .long trap /* Uninitialized Interrupt - 15. */
- .long trap /* (Unassigned, Reserver) - 16. */
- .long trap /* (Unassigned, Reserver) - 17. */
- .long trap /* (Unassigned, Reserver) - 18. */
- .long trap /* (Unassigned, Reserver) - 19. */
- .long trap /* (Unassigned, Reserver) - 20. */
- .long trap /* (Unassigned, Reserver) - 21. */
- .long trap /* (Unassigned, Reserver) - 22. */
- .long trap /* (Unassigned, Reserver) - 23. */
- .long trap /* Spurious Interrupt - 24. */
- .long trap /* Level 1 Interrupt Autovector - 25. */
- .long trap /* Level 2 Interrupt Autovector - 26. */
- .long trap /* Level 3 Interrupt Autovector - 27. */
- .long trap /* Level 4 Interrupt Autovector - 28. */
- .long trap /* Level 5 Interrupt Autovector - 29. */
- .long trap /* Level 6 Interrupt Autovector - 30. */
- .long trap /* Level 7 Interrupt Autovector - 31. */
- .long system_call /* Trap Instruction Vectors 0 - 32. */
- .long trap /* Trap Instruction Vectors 1 - 33. */
- .long trap /* Trap Instruction Vectors 2 - 34. */
- .long trap /* Trap Instruction Vectors 3 - 35. */
- .long trap /* Trap Instruction Vectors 4 - 36. */
- .long trap /* Trap Instruction Vectors 5 - 37. */
- .long trap /* Trap Instruction Vectors 6 - 38. */
- .long trap /* Trap Instruction Vectors 7 - 39. */
- .long trap /* Trap Instruction Vectors 8 - 40. */
- .long trap /* Trap Instruction Vectors 9 - 41. */
- .long trap /* Trap Instruction Vectors 10 - 42. */
- .long trap /* Trap Instruction Vectors 11 - 43. */
- .long trap /* Trap Instruction Vectors 12 - 44. */
- .long trap /* Trap Instruction Vectors 13 - 45. */
- .long trap /* Trap Instruction Vectors 14 - 46. */
- .long trap /* Trap Instruction Vectors 15 - 47. */
- .long 0 /* (Reserved for Coprocessor) - 48. */
- .long 0 /* (Reserved for Coprocessor) - 49. */
- .long 0 /* (Reserved for Coprocessor) - 50. */
- .long 0 /* (Reserved for Coprocessor) - 51. */
- .long 0 /* (Reserved for Coprocessor) - 52. */
- .long 0 /* (Reserved for Coprocessor) - 53. */
- .long 0 /* (Reserved for Coprocessor) - 54. */
- .long 0 /* (Reserved for Coprocessor) - 55. */
- .long 0 /* (Reserved for Coprocessor) - 56. */
- .long 0 /* (Reserved for Coprocessor) - 57. */
- .long 0 /* (Reserved for Coprocessor) - 58. */
- .long 0 /* (Unassigned, Reserved) - 59. */
- .long 0 /* (Unassigned, Reserved) - 60. */
- .long 0 /* (Unassigned, Reserved) - 61. */
- .long 0 /* (Unassigned, Reserved) - 62. */
- .long 0 /* (Unassigned, Reserved) - 63. */
- /* The assignment of these vectors to the CPM is */
- /* dependent on the configuration of the CPM vba */
- /* fields. */
- .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
- .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
- .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
- .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
- .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
- .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
- .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
- .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
- .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
- .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
- .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
- .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
- .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
- .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
- .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
- .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
- .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
- .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
- .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
- .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
- .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
- .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
- .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
- .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
- .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
- .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
- .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
- .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
- .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
- .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
- .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
- .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
- /* I don't think anything uses the vectors after here. */
- .long 0 /* (User-Defined Vectors 34) - 96. */
- .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
- .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
-.text
-ignore: rte
diff -Nru a/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S b/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S
--- a/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,420 +0,0 @@
-/* arch/m68knommu/platform/68360/uCquicc/crt0_rom.S
- *
- * Startup code for Motorola 68360
- *
- * Copyright (C) SED Systems, a Division of Calian Ltd.
- * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
- * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
- * uClinux Kernel
- * Copyright (C) Michael Leslie <mleslie@lineo.com>
- * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
- * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
- *
- */
-#include <linux/config.h>
-
-.global _stext
-.global _sbss
-.global _start
-
-.global _rambase
-.global __ramvec
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-.global _quicc_base
-.global _periph_base
-
-#define REGB 0x1000
-#define PEPAR (_dprbase + REGB + 0x0016)
-#define GMR (_dprbase + REGB + 0x0040)
-#define OR0 (_dprbase + REGB + 0x0054)
-#define BR0 (_dprbase + REGB + 0x0050)
-
-#define OR1 (_dprbase + REGB + 0x0064)
-#define BR1 (_dprbase + REGB + 0x0060)
-
-#define OR2 (_dprbase + REGB + 0x0074)
-#define BR2 (_dprbase + REGB + 0x0070)
-
-#define OR3 (_dprbase + REGB + 0x0084)
-#define BR3 (_dprbase + REGB + 0x0080)
-
-#define OR4 (_dprbase + REGB + 0x0094)
-#define BR4 (_dprbase + REGB + 0x0090)
-
-#define OR5 (_dprbase + REGB + 0x00A4)
-#define BR5 (_dprbase + REGB + 0x00A0)
-
-#define OR6 (_dprbase + REGB + 0x00b4)
-#define BR6 (_dprbase + REGB + 0x00b0)
-
-#define OR7 (_dprbase + REGB + 0x00c4)
-#define BR7 (_dprbase + REGB + 0x00c0)
-
-#define MCR (_dprbase + REGB + 0x0000)
-#define AVR (_dprbase + REGB + 0x0008)
-
-#define SYPCR (_dprbase + REGB + 0x0022)
-
-#define PLLCR (_dprbase + REGB + 0x0010)
-#define CLKOCR (_dprbase + REGB + 0x000C)
-#define CDVCR (_dprbase + REGB + 0x0014)
-
-#define BKAR (_dprbase + REGB + 0x0030)
-#define BKCR (_dprbase + REGB + 0x0034)
-#define SWIV (_dprbase + REGB + 0x0023)
-#define PICR (_dprbase + REGB + 0x0026)
-#define PITR (_dprbase + REGB + 0x002A)
-
-/* Define for all memory configuration */
-#define MCU_SIM_GMR 0x00000000
-#define SIM_OR_MASK 0x0fffffff
-
-/* Defines for chip select zero - the flash */
-#define SIM_OR0_MASK 0x20000000
-#define SIM_BR0_MASK 0x00000001
-
-/* Defines for chip select one - the RAM */
-#define SIM_OR1_MASK 0x10000000
-#define SIM_BR1_MASK 0x00000001
-
-#define MCU_SIM_MBAR_ADRS 0x0003ff00
-#define MCU_SIM_MBAR_BA_MASK 0xfffff000
-#define MCU_SIM_MBAR_AS_MASK 0x00000001
-
-#define MCU_SIM_PEPAR 0x00B4
-
-#define MCU_DISABLE_INTRPTS 0x2700
-#define MCU_SIM_AVR 0x00
-
-#define MCU_SIM_MCR 0x00005cff
-
-#define MCU_SIM_CLKOCR 0x00
-#define MCU_SIM_PLLCR 0x8000
-#define MCU_SIM_CDVCR 0x0000
-
-#define MCU_SIM_SYPCR 0x0000
-#define MCU_SIM_SWIV 0x00
-#define MCU_SIM_PICR 0x0000
-#define MCU_SIM_PITR 0x0000
-
-
-#include <asm/m68360_regs.h>
-
-
-/*
- * By the time this RAM specific code begins to execute, DPRAM
- * and DRAM should already be mapped and accessible.
- */
-
- .text
-_start:
-_stext:
- nop
- ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
- /* We should not need to setup the boot stack the reset should do it. */
- movea.l #__ramend, %sp /* set up stack at the end of DRAM:*/
-
-
-set_mbar_register:
- moveq.l #0x07, %d1 /* Setup MBAR */
- movec %d1, %dfc
-
- lea.l MCU_SIM_MBAR_ADRS, %a0
- move.l #_dprbase, %d0
- andi.l #MCU_SIM_MBAR_BA_MASK, %d0
- ori.l #MCU_SIM_MBAR_AS_MASK, %d0
- moves.l %d0, %a0@
-
- moveq.l #0x05, %d1
- movec.l %d1, %dfc
-
- /* Now we can begin to access registers in DPRAM */
-
-set_sim_mcr:
- /* Set Module Configuration Register */
- move.l #MCU_SIM_MCR, MCR
-
- /* to do: Determine cause of reset */
-
- /*
- * configure system clock MC68360 p. 6-40
- * (value +1)*osc/128 = system clock
- * or
- * (value + 1)*osc = system clock
- * You do not need to divide the oscillator by 128 unless you want to.
- */
-set_sim_clock:
- move.w #MCU_SIM_PLLCR, PLLCR
- move.b #MCU_SIM_CLKOCR, CLKOCR
- move.w #MCU_SIM_CDVCR, CDVCR
-
- /* Wait for the PLL to settle */
- move.w #16384, %d0
-pll_settle_wait:
- subi.w #1, %d0
- bne pll_settle_wait
-
- /* Setup the system protection register, and watchdog timer register */
- move.b #MCU_SIM_SWIV, SWIV
- move.w #MCU_SIM_PICR, PICR
- move.w #MCU_SIM_PITR, PITR
- move.w #MCU_SIM_SYPCR, SYPCR
-
- /* Clear DPRAM - system + parameter */
- movea.l #_dprbase, %a0
- movea.l #_dprbase+0x2000, %a1
-
- /* Copy 0 to %a0 until %a0 == %a1 */
-clear_dpram:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi clear_dpram
-
-configure_memory_controller:
- /* Set up Global Memory Register (GMR) */
- move.l #MCU_SIM_GMR, %d0
- move.l %d0, GMR
-
-configure_chip_select_0:
- move.l #0x00400000, %d0
- subq.l #0x01, %d0
- eori.l #SIM_OR_MASK, %d0
- ori.l #SIM_OR0_MASK, %d0
- move.l %d0, OR0
-
- move.l #__rom_start, %d0
- ori.l #SIM_BR0_MASK, %d0
- move.l %d0, BR0
-
- move.l #0x0, BR1
- move.l #0x0, BR2
- move.l #0x0, BR3
- move.l #0x0, BR4
- move.l #0x0, BR5
- move.l #0x0, BR6
- move.l #0x0, BR7
-
- move.w #MCU_SIM_PEPAR, PEPAR
-
- /* point to vector table: */
- move.l #_romvec, %a0
- move.l #_ramvec, %a1
-copy_vectors:
- move.l %a0@, %d0
- move.l %d0, %a1@
- move.l %a0@, %a1@
- addq.l #0x04, %a0
- addq.l #0x04, %a1
- cmp.l #_start, %a0
- blt copy_vectors
-
- move.l #_ramvec, %a1
- movec %a1, %vbr
-
-
- /* Copy data segment from ROM to RAM */
- moveal #_etext, %a0
- moveal #_sdata, %a1
- moveal #_edata, %a2
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-LD1:
- move.l %a0@, %d0
- addq.l #0x04, %a0
- move.l %d0, %a1@
- addq.l #0x04, %a1
- cmp.l #_edata, %a1
- blt LD1
-
- moveal #_sbss, %a0
- moveal #_ebss, %a1
-
- /* Copy 0 to %a0 until %a0 == %a1 */
-L1:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi L1
-
-load_quicc:
- move.l #_dprbase, _quicc_base
-
-store_ram_size:
- /* Set ram size information */
- move.l #_sdata, _rambase
- move.l #_ebss, _ramstart
- move.l #__ramend, %d0
- sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
- move.l %d0, _ramend /* Different from __ramend.*/
-
-store_flash_size:
- /* Set rom size information */
- move.l #__rom_end, %d0
- sub.l #__rom_start, %d0
- move.l %d0, rom_length
-
- pea 0
- pea env
- pea %sp@(4)
- pea 0
-
- lea init_thread_union, %a2
- lea 0x2000(%a2), %sp
-
-lp:
- jsr start_kernel
-
-_exit:
- jmp _exit
-
-
- .data
- .align 4
-env:
- .long 0
-_quicc_base:
- .long 0
-_periph_base:
- .long 0
-_ramvec:
- .long 0
-_rambase:
- .long 0
-_ramstart:
- .long 0
-_ramend:
- .long 0
-_dprbase:
- .long 0xffffe000
-
-
- .text
-
- /*
- * These are the exception vectors at boot up, they are copied into RAM
- * and then overwritten as needed.
- */
-
-.section ".data.initvect","awx"
- .long __ramend /* Reset: Initial Stack Pointer - 0. */
- .long _start /* Reset: Initial Program Counter - 1. */
- .long buserr /* Bus Error - 2. */
- .long trap /* Address Error - 3. */
- .long trap /* Illegal Instruction - 4. */
- .long trap /* Divide by zero - 5. */
- .long trap /* CHK, CHK2 Instructions - 6. */
- .long trap /* TRAPcc, TRAPV Instructions - 7. */
- .long trap /* Privilege Violation - 8. */
- .long trap /* Trace - 9. */
- .long trap /* Line 1010 Emulator - 10. */
- .long trap /* Line 1111 Emualtor - 11. */
- .long trap /* Harware Breakpoint - 12. */
- .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
- .long trap /* Format Error - 14. */
- .long trap /* Uninitialized Interrupt - 15. */
- .long trap /* (Unassigned, Reserver) - 16. */
- .long trap /* (Unassigned, Reserver) - 17. */
- .long trap /* (Unassigned, Reserver) - 18. */
- .long trap /* (Unassigned, Reserver) - 19. */
- .long trap /* (Unassigned, Reserver) - 20. */
- .long trap /* (Unassigned, Reserver) - 21. */
- .long trap /* (Unassigned, Reserver) - 22. */
- .long trap /* (Unassigned, Reserver) - 23. */
- .long trap /* Spurious Interrupt - 24. */
- .long trap /* Level 1 Interrupt Autovector - 25. */
- .long trap /* Level 2 Interrupt Autovector - 26. */
- .long trap /* Level 3 Interrupt Autovector - 27. */
- .long trap /* Level 4 Interrupt Autovector - 28. */
- .long trap /* Level 5 Interrupt Autovector - 29. */
- .long trap /* Level 6 Interrupt Autovector - 30. */
- .long trap /* Level 7 Interrupt Autovector - 31. */
- .long system_call /* Trap Instruction Vectors 0 - 32. */
- .long trap /* Trap Instruction Vectors 1 - 33. */
- .long trap /* Trap Instruction Vectors 2 - 34. */
- .long trap /* Trap Instruction Vectors 3 - 35. */
- .long trap /* Trap Instruction Vectors 4 - 36. */
- .long trap /* Trap Instruction Vectors 5 - 37. */
- .long trap /* Trap Instruction Vectors 6 - 38. */
- .long trap /* Trap Instruction Vectors 7 - 39. */
- .long trap /* Trap Instruction Vectors 8 - 40. */
- .long trap /* Trap Instruction Vectors 9 - 41. */
- .long trap /* Trap Instruction Vectors 10 - 42. */
- .long trap /* Trap Instruction Vectors 11 - 43. */
- .long trap /* Trap Instruction Vectors 12 - 44. */
- .long trap /* Trap Instruction Vectors 13 - 45. */
- .long trap /* Trap Instruction Vectors 14 - 46. */
- .long trap /* Trap Instruction Vectors 15 - 47. */
- .long 0 /* (Reserved for Coprocessor) - 48. */
- .long 0 /* (Reserved for Coprocessor) - 49. */
- .long 0 /* (Reserved for Coprocessor) - 50. */
- .long 0 /* (Reserved for Coprocessor) - 51. */
- .long 0 /* (Reserved for Coprocessor) - 52. */
- .long 0 /* (Reserved for Coprocessor) - 53. */
- .long 0 /* (Reserved for Coprocessor) - 54. */
- .long 0 /* (Reserved for Coprocessor) - 55. */
- .long 0 /* (Reserved for Coprocessor) - 56. */
- .long 0 /* (Reserved for Coprocessor) - 57. */
- .long 0 /* (Reserved for Coprocessor) - 58. */
- .long 0 /* (Unassigned, Reserved) - 59. */
- .long 0 /* (Unassigned, Reserved) - 60. */
- .long 0 /* (Unassigned, Reserved) - 61. */
- .long 0 /* (Unassigned, Reserved) - 62. */
- .long 0 /* (Unassigned, Reserved) - 63. */
- /* The assignment of these vectors to the CPM is */
- /* dependent on the configuration of the CPM vba */
- /* fields. */
- .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
- .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
- .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
- .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
- .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
- .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
- .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
- .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
- .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
- .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
- .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
- .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
- .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
- .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
- .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
- .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
- .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
- .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
- .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
- .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
- .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
- .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
- .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
- .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
- .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
- .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
- .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
- .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
- .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
- .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
- .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
- .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
- /* I don't think anything uses the vectors after here. */
- .long 0 /* (User-Defined Vectors 34) - 96. */
- .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
- .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
- .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
-.text
-ignore: rte
diff -Nru a/arch/m68knommu/platform/68EZ328/Makefile b/arch/m68knommu/platform/68EZ328/Makefile
--- a/arch/m68knommu/platform/68EZ328/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/68EZ328/Makefile 2005-03-20 16:30:37 -08:00
@@ -4,9 +4,8 @@
obj-y := config.o
-extra-y := $(BOARD)/bootlogo.rh $(BOARD)/crt0_$(MODEL).o
+extra-y := bootlogo.rh
-$(obj)/$(BOARD)/bootlogo.rh: $(src)/bootlogo.h
+$(obj)/bootlogo.rh: $(src)/bootlogo.h
perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
- > $(obj)/$(BOARD)/bootlogo.rh
-
+ > $(obj)/bootlogo.rh
diff -Nru a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S b/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S
--- a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,109 +0,0 @@
-#include <linux/config.h>
-
- .global _start
- .global _stext
-
- .global _rambase
- .global _ramvec
- .global _ramstart
- .global _ramend
-
-#ifdef CONFIG_INIT_LCD
- .global splash_bits
-#endif
-
- .data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-.align 4
-_ramvec:
-.long 0
-_rambase:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-#ifdef CONFIG_INIT_LCD
-splash_bits:
-#include "bootlogo.rh"
-#endif
-
- .text
-_start:
-_stext: movew #0x2700,%sr
-#ifdef CONFIG_INIT_LCD
- movel #splash_bits, 0xfffffA00 /* LSSA */
- moveb #0x28, 0xfffffA05 /* LVPW */
- movew #0x280, 0xFFFFFa08 /* LXMAX */
- movew #0x1df, 0xFFFFFa0a /* LYMAX */
- moveb #0, 0xfffffa29 /* LBAR */
- moveb #0, 0xfffffa25 /* LPXCD */
- moveb #0x08, 0xFFFFFa20 /* LPICF */
- moveb #0x01, 0xFFFFFA21 /* -ve pol */
- moveb #0x81, 0xfffffA27 /* LCKCON */
- movew #0xff00, 0xfffff412 /* LCD pins */
-#endif
- moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
- movew #32767, %d0 /* PLL settle wait loop */
-1: subq #1, %d0
- bne 1b
-
- /* Copy data segment from ROM to RAM */
- moveal #_etext, %a0
- moveal #_sdata, %a1
- moveal #_edata, %a2
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-1: movel %a0@+, %a1@+
- cmpal %a1, %a2
- bhi 1b
-
- moveal #_sbss, %a0
- moveal #_ebss, %a1
- /* Copy 0 to %a0 until %a0 == %a1 */
-
-1:
- clrl %a0@+
- cmpal %a0, %a1
- bhi 1b
-
- movel #_sdata, %d0
- movel %d0, _rambase
- movel #_ebss, %d0
- movel %d0, _ramstart
- movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0
- movel %d0, _ramend
- movel #__ramvec, %d0
- movel %d0, _ramvec
-
-/*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
-1: jsr start_kernel
- bra 1b
-_exit:
-
- jmp _exit
-
-
-putc:
- moveb %d7,0xfffff907
-1:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq 1b
- rts
-
- .data
-env:
- .long 0
- .text
-
diff -Nru a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S b/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S
--- a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1 +0,0 @@
-#include "crt0_fixed.S"
diff -Nru a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S b/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S
--- a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,167 +0,0 @@
- .global __main
- .global __ram_start
- .global __ram_end
- .global __rom_start
- .global __rom_end
-
- .global _rambase
- .global _ramstart
-
- .global splash_bits
- .global _start
- .global _stext
-
-#define DEBUG
-#define ROM_OFFSET 0x10C00000
-#define STACK_GAURD 0x10
-
- .text
-
-_start:
-_stext:
- movew #0x2700, %sr /* Exceptions off! */
-
- /* Init chip registers. uCsimm specific */
- moveb #0x00, 0xfffffb0b /* Watchdog off */
- moveb #0x10, 0xfffff000 /* SCR */
-
- movew #0x2400, 0xfffff200 /* PLLCR */
- movew #0x0123, 0xfffff202 /* PLLFSR */
-
- moveb #0x00, 0xfffff40b /* enable chip select */
- moveb #0x00, 0xfffff423 /* enable /DWE */
- moveb #0x08, 0xfffffd0d /* disable hardmap */
- moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
-
- movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
- movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
-
- movew #0x8f00, 0xfffffc00 /* DRAM configuration */
- movew #0x9667, 0xfffffc02 /* DRAM control */
- movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
- movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
-
- moveb #0x40, 0xfffff300 /* IVR */
- movel #0x007FFFFF, %d0 /* IMR */
- movel %d0, 0xfffff304
-
- moveb 0xfffff42b, %d0
- andb #0xe0, %d0
- moveb %d0, 0xfffff42b
-
- moveb #0x08, 0xfffff907 /* Ignore CTS */
- movew #0x010b, 0xfffff902 /* BAUD to 9600 */
- movew #0xe100, 0xfffff900 /* enable */
-
- movew #16384, %d0 /* PLL settle wait loop */
-L0:
- subw #1, %d0
- bne L0
-#ifdef DEBUG
- moveq #70, %d7 /* 'F' */
- moveb %d7,0xfffff907 /* No absolute addresses */
-pclp1:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp1
-#endif /* DEBUG */
-
-#ifdef CONFIG_RELOCATE
- /* Copy me to RAM */
- moveal #__rom_start, %a0
- moveal #__ram_start, %a1
- moveal #_edata, %a2
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-LD1:
- movel %a0@+, %d0
- movel %d0, %a1@+
- cmpal %a1, %a2
- bhi LD1
-
-#ifdef DEBUG
- moveq #74, %d7 /* 'J' */
- moveb %d7,0xfffff907 /* No absolute addresses */
-pclp2:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp2
-#endif /* DEBUG */
- /* jump into the RAM copy */
- jmp ram_jump
-ram_jump:
-
-#endif /* CONFIG_RELOCATE */
-
-#ifdef DEBUG
- moveq #82, %d7 /* 'R' */
- moveb %d7,0xfffff907 /* No absolute addresses */
-pclp3:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp3
-#endif /* DEBUG */
- moveal #0x007ffff0, %ssp
- moveal #_sbss, %a0
- moveal #_ebss, %a1
-
- /* Copy 0 to %a0 until %a0 >= %a1 */
-L1:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi L1
-
-#ifdef DEBUG
- moveq #67, %d7 /* 'C' */
- jsr putc
-#endif /* DEBUG */
-
- pea 0
- pea env
- pea %sp@(4)
- pea 0
-
-#ifdef DEBUG
- moveq #70, %d7 /* 'F' */
- jsr putc
-#endif /* DEBUG */
-
-lp:
- jsr start_kernel
- jmp lp
-_exit:
-
- jmp _exit
-
-__main:
- /* nothing */
- rts
-
-#ifdef DEBUG
-putc:
- moveb %d7,0xfffff907
-pclp:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp
- rts
-#endif /* DEBUG */
-
- .data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-.align 4
-_ramvec:
-.long 0
-_rambase:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-env:
- .long 0
diff -Nru a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S b/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
--- a/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1 +0,0 @@
-#include "crt0_fixed.S"
diff -Nru a/arch/m68knommu/platform/68VZ328/Makefile b/arch/m68knommu/platform/68VZ328/Makefile
--- a/arch/m68knommu/platform/68VZ328/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/m68knommu/platform/68VZ328/Makefile 2005-03-20 16:30:37 -08:00
@@ -2,5 +2,15 @@
# Makefile for arch/m68knommu/platform/68VZ328.
#
-obj-y := $(BOARD)/
+obj-y := config.o
+logo-$(UCDIMM) := bootlogo.rh
+logo-$(DRAGEN2) := screen.h
+extra-y := $(logo-y)
+$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
+ perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
+
+$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
+ perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
+
+clean-files := $(obj)/screen.h $(obj)/bootlogo.rh
diff -Nru a/arch/m68knommu/platform/68VZ328/de2/Makefile b/arch/m68knommu/platform/68VZ328/de2/Makefile
--- a/arch/m68knommu/platform/68VZ328/de2/Makefile 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,12 +0,0 @@
-#
-# Makefile for arch/m68knommu/platform/68VZ328/de2.
-#
-
-obj-y := config.o
-
-EXTRA_TARGETS := bootlogo.rh crt0_$(MODEL).o
-
-$(obj)/bootlogo.rh: $(src)/../../68EZ328/bootlogo.h
- perl $(src)/../../68328/bootlogo.pl < $(src)/../../68EZ328/bootlogo.h \
- > $(obj)/bootlogo.rh
-
diff -Nru a/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S b/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S
--- a/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,135 +0,0 @@
-#include <linux/config.h>
-
-#if defined(CONFIG_RAM32MB)
-#define MEM_END 0x02000000 /* Memory size 32Mb */
-#elif defined(CONFIG_RAM16MB)
-#define MEM_END 0x01000000 /* Memory size 16Mb */
-#else
-#define MEM_END 0x00800000 /* Memory size 8Mb */
-#endif
-
-#undef CRT_DEBUG
-
-.macro PUTC CHAR
-#ifdef CRT_DEBUG
- moveq #\CHAR, %d7
- jsr putc
-#endif
-.endm
-
- .global _start
- .global _rambase
- .global _ramvec
- .global _ramstart
- .global _ramend
-
- .data
-
-/*
- * Set up the usable of RAM stuff
- */
-_rambase:
- .long 0
-_ramvec:
- .long 0
-_ramstart:
- .long 0
-_ramend:
- .long 0
-
- .text
-
-_start:
-
-/*
- * Setup initial stack
- */
- /* disable all interrupts */
- movew #0x2700, %sr
- movel #-1, 0xfffff304
- movel #MEM_END-4, %sp
-
- PUTC '\r'
- PUTC '\n'
- PUTC 'A'
- PUTC 'B'
-
-/*
- * Determine end of RAM
- */
-
- movel #MEM_END, %a0
- movel %a0, _ramend
-
- PUTC 'C'
-
-/*
- * Move ROM filesystem above bss :-)
- */
-
- moveal #_sbss, %a0 /* romfs at the start of bss */
- moveal #_ebss, %a1 /* Set up destination */
- movel %a0, %a2 /* Copy of bss start */
-
- movel 8(%a0), %d1 /* Get size of ROMFS */
- addql #8, %d1 /* Allow for rounding */
- andl #0xfffffffc, %d1 /* Whole words */
-
- addl %d1, %a0 /* Copy from end */
- addl %d1, %a1 /* Copy from end */
- movel %a1, _ramstart /* Set start of ram */
-
-1:
- movel -(%a0), %d0 /* Copy dword */
- movel %d0, -(%a1)
- cmpl %a0, %a2 /* Check if at end */
- bne 1b
-
- PUTC 'D'
-
-/*
- * Initialize BSS segment to 0
- */
-
- lea _sbss, %a0
- lea _ebss, %a1
-
- /* Copy 0 to %a0 until %a0 == %a1 */
-2: cmpal %a0, %a1
- beq 1f
- clrl (%a0)+
- bra 2b
-1:
-
- PUTC 'E'
-
-/*
- * Load the current task pointer and stack
- */
-
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- PUTC 'F'
- PUTC '\r'
- PUTC '\n'
-
-/*
- * Go
- */
-
- jmp start_kernel
-
-/*
- * Local functions
- */
-
-#ifdef CRT_DEBUG
-putc:
- moveb %d7, 0xfffff907
-1:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq 1b
- rts
-#endif
diff -Nru a/arch/m68knommu/platform/68VZ328/ucdimm/Makefile b/arch/m68knommu/platform/68VZ328/ucdimm/Makefile
--- a/arch/m68knommu/platform/68VZ328/ucdimm/Makefile 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,12 +0,0 @@
-#
-# Makefile for arch/m68knommu/platform/68VZ328/ucdimm.
-#
-
-obj-y := config.o
-
-EXTRA_TARGETS := bootlogo.rh crt0_$(MODEL).o
-
-$(obj)/bootlogo.rh: $(src)/../../68EZ328/bootlogo.h
- perl $(src)/../../68328/bootlogo.pl < $(src)/../../68EZ328/bootlogo.h \
- > $(obj)/bootlogo.rh
-
diff -Nru a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S b/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S
--- a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,109 +0,0 @@
-#include <linux/config.h>
-
- .global _start
- .global _stext
-
- .global _rambase
- .global _ramvec
- .global _ramstart
- .global _ramend
-
-#ifdef CONFIG_INIT_LCD
- .global splash_bits
-#endif
-
- .data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-.align 4
-_ramvec:
-.long 0
-_rambase:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-#ifdef CONFIG_INIT_LCD
-splash_bits:
-#include "bootlogo.rh"
-#endif
-
- .text
-_start:
-_stext: movew #0x2700,%sr
-#ifdef CONFIG_INIT_LCD
- movel #splash_bits, 0xfffffA00 /* LSSA */
- moveb #0x28, 0xfffffA05 /* LVPW */
- movew #0x280, 0xFFFFFa08 /* LXMAX */
- movew #0x1df, 0xFFFFFa0a /* LYMAX */
- moveb #0, 0xfffffa29 /* LBAR */
- moveb #0, 0xfffffa25 /* LPXCD */
- moveb #0x08, 0xFFFFFa20 /* LPICF */
- moveb #0x01, 0xFFFFFA21 /* -ve pol */
- moveb #0x81, 0xfffffA27 /* LCKCON */
- movew #0xff00, 0xfffff412 /* LCD pins */
-#endif
- moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
- movew #32767, %d0 /* PLL settle wait loop */
-1: subq #1, %d0
- bne 1b
-
- /* Copy data segment from ROM to RAM */
- moveal #_etext, %a0
- moveal #_sdata, %a1
- moveal #_edata, %a2
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-1: movel %a0@+, %a1@+
- cmpal %a1, %a2
- bhi 1b
-
- moveal #_sbss, %a0
- moveal #_ebss, %a1
- /* Copy 0 to %a0 until %a0 == %a1 */
-
-1:
- clrl %a0@+
- cmpal %a0, %a1
- bhi 1b
-
- movel #_sdata, %d0
- movel %d0, _rambase
- movel #_ebss, %d0
- movel %d0, _ramstart
- movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0
- movel %d0, _ramend
- movel #__ramvec, %d0
- movel %d0, _ramvec
-
-/*
- * load the current task pointer and stack
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
-1: jsr start_kernel
- bra 1b
-_exit:
-
- jmp _exit
-
-
-putc:
- moveb %d7,0xfffff907
-1:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq 1b
- rts
-
- .data
-env:
- .long 0
- .text
-
diff -Nru a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S b/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S
--- a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1 +0,0 @@
-#include "crt0_fixed.S"
diff -Nru a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S b/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S
--- a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,171 +0,0 @@
-#include <linux/config.h>
-
- .global __main
- .global __ram_start
- .global __ram_end
- .global __rom_start
- .global __rom_end
-
- .global _rambase
- .global _ramstart
-
- .global splash_bits
- .global _start
- .global _stext
-
-#define DEBUG
-#define ROM_OFFSET 0x10C00000
-#define STACK_GAURD 0x10
-
- .text
-
-_start:
-_stext:
- movew #0x2700, %sr /* Exceptions off! */
-
-#if 0
- /* Init chip registers. uCsimm specific */
- moveb #0x00, 0xfffffb0b /* Watchdog off */
- moveb #0x10, 0xfffff000 /* SCR */
-
- movew #0x2400, 0xfffff200 /* PLLCR */
- movew #0x0123, 0xfffff202 /* PLLFSR */
-
- moveb #0x00, 0xfffff40b /* enable chip select */
- moveb #0x00, 0xfffff423 /* enable /DWE */
- moveb #0x08, 0xfffffd0d /* disable hardmap */
- moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
-
- movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
- movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
-
- movew #0x8f00, 0xfffffc00 /* DRAM configuration */
- movew #0x9667, 0xfffffc02 /* DRAM control */
- movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
- movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
-
- moveb #0x40, 0xfffff300 /* IVR */
- movel #0x007FFFFF, %d0 /* IMR */
- movel %d0, 0xfffff304
-
- moveb 0xfffff42b, %d0
- andb #0xe0, %d0
- moveb %d0, 0xfffff42b
-
- moveb #0x08, 0xfffff907 /* Ignore CTS */
- movew #0x010b, 0xfffff902 /* BAUD to 9600 */
- movew #0xe100, 0xfffff900 /* enable */
-#endif
-
- movew #16384, %d0 /* PLL settle wait loop */
-L0:
- subw #1, %d0
- bne L0
-#ifdef DEBUG
- moveq #70, %d7 /* 'F' */
- moveb %d7,0xfffff907 /* No absolute addresses */
-pclp1:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp1
-#endif /* DEBUG */
-
-#ifdef CONFIG_RELOCATE
- /* Copy me to RAM */
- moveal #__rom_start, %a0
- moveal #__ram_start, %a1
- moveal #_edata, %a2
-
- /* Copy %a0 to %a1 until %a1 == %a2 */
-LD1:
- movel %a0@+, %d0
- movel %d0, %a1@+
- cmpal %a1, %a2
- bhi LD1
-
-#ifdef DEBUG
- moveq #74, %d7 /* 'J' */
- moveb %d7,0xfffff907 /* No absolute addresses */
-pclp2:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp2
-#endif /* DEBUG */
- /* jump into the RAM copy */
- jmp ram_jump
-ram_jump:
-
-#endif /* CONFIG_RELOCATE */
-
-#ifdef DEBUG
- moveq #82, %d7 /* 'R' */
- moveb %d7,0xfffff907 /* No absolute addresses */
-pclp3:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp3
-#endif /* DEBUG */
- moveal #0x007ffff0, %ssp
- moveal #_sbss, %a0
- moveal #_ebss, %a1
-
- /* Copy 0 to %a0 until %a0 >= %a1 */
-L1:
- movel #0, %a0@+
- cmpal %a0, %a1
- bhi L1
-
-#ifdef DEBUG
- moveq #67, %d7 /* 'C' */
- jsr putc
-#endif /* DEBUG */
-
- pea 0
- pea env
- pea %sp@(4)
- pea 0
-
-#ifdef DEBUG
- moveq #70, %d7 /* 'F' */
- jsr putc
-#endif /* DEBUG */
-
-lp:
- jsr start_kernel
- jmp lp
-_exit:
-
- jmp _exit
-
-__main:
- /* nothing */
- rts
-
-#ifdef DEBUG
-putc:
- moveb %d7,0xfffff907
-pclp:
- movew 0xfffff906, %d7
- andw #0x2000, %d7
- beq pclp
- rts
-#endif /* DEBUG */
-
- .data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-.align 4
-_ramvec:
-.long 0
-_rambase:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-env:
- .long 0
diff -Nru a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S b/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S
--- a/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1 +0,0 @@
-#include "crt0_fixed.S"
diff -Nru a/arch/ppc/8260_io/Kconfig b/arch/ppc/8260_io/Kconfig
--- a/arch/ppc/8260_io/Kconfig 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/8260_io/Kconfig 2005-03-20 16:30:37 -08:00
@@ -42,7 +42,7 @@
choice
prompt "Type of PHY"
depends on 8260 && USE_MDIO
- default FCC_LXT971
+ default FCC_GENERIC_PHY
config FCC_LXT970
bool "LXT970"
@@ -53,6 +53,13 @@
config FCC_QS6612
bool "QS6612"
+config FCC_DM9131
+ bool "DM9131"
+
+config FCC_DM9161
+ bool "DM9161"
+
+config FCC_GENERIC_PHY
+ bool "Generic"
endchoice
endmenu
-
diff -Nru a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c
--- a/arch/ppc/8260_io/fcc_enet.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/8260_io/fcc_enet.c 2005-03-20 16:30:37 -08:00
@@ -16,6 +16,9 @@
* small packets. Since this is a cache coherent processor and CPM,
* I could also preallocate SKB's and use them directly on the interface.
*
+ * 2004-12 Leo Li (leoli@freescale.com)
+ * - Rework the FCC clock configuration part, make it easier to configure.
+ *
*/
#include <linux/config.h>
@@ -34,6 +37,8 @@
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
+#include <linux/mii.h>
+#include <linux/workqueue.h>
#include <linux/bitops.h>
#include <asm/immap_cpm2.h>
@@ -41,6 +46,26 @@
#include <asm/mpc8260.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
+#include <asm/signal.h>
+
+/* We can't use the PHY interrupt if we aren't using MDIO. */
+#if !defined(CONFIG_USE_MDIO)
+#undef PHY_INTERRUPT
+#endif
+
+/* If we have a PHY interrupt, we will advertise both full-duplex and half-
+ * duplex capabilities. If we don't have a PHY interrupt, then we will only
+ * advertise half-duplex capabilities.
+ */
+#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | ADVERTISE_10HALF | \
+ ADVERTISE_CSMA)
+#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
+ MII_ADVERTISE_HALF)
+#ifdef PHY_INTERRUPT
+#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_ALL
+#else
+#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_HALF
+#endif
#include <asm/cpm2.h>
/* The transmitter timeout
@@ -65,18 +90,6 @@
const phy_cmd_t *shutdown;
} phy_info_t;
-/* Register definitions for the PHY. */
-
-#define MII_REG_CR 0 /* Control Register */
-#define MII_REG_SR 1 /* Status Register */
-#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */
-#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */
-#define MII_REG_ANAR 4 /* A-N Advertisement Register */
-#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */
-#define MII_REG_ANER 6 /* A-N Expansion Register */
-#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */
-#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */
-
/* values for phy_status */
#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
@@ -111,13 +124,15 @@
#define TX_RING_MOD_MASK 15 /* for this to work */
/* The FCC stores dest/src/type, data, and checksum for receive packets.
+ * size includes support for VLAN
*/
-#define PKT_MAXBUF_SIZE 1518
+#define PKT_MAXBUF_SIZE 1522
#define PKT_MINBUF_SIZE 64
/* Maximum input DMA size. Must be a should(?) be a multiple of 4.
-*/
-#define PKT_MAXDMA_SIZE 1520
+ * size includes support for VLAN
+ */
+#define PKT_MAXDMA_SIZE 1524
/* Maximum input buffer size. Must be a multiple of 32.
*/
@@ -129,8 +144,9 @@
static irqreturn_t fcc_enet_interrupt(int irq, void *dev_id, struct pt_regs *);
static int fcc_enet_close(struct net_device *dev);
static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
+/* static void set_multicast_list(struct net_device *dev); */
static void fcc_restart(struct net_device *dev, int duplex);
+static void fcc_stop(struct net_device *dev);
static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
/* These will be configurable for the FCC choice.
@@ -141,6 +157,65 @@
* help show what pins are used for each device.
*/
+/* Since the CLK setting changes greatly from board to board, I changed
+ * it to a easy way. You just need to specify which CLK number to use.
+ * Note that only limited choices can be make on each port.
+ */
+
+/* FCC1 Clock Source Configuration. There are board specific.
+ Can only choose from CLK9-12 */
+#ifdef CONFIG_SBC82xx
+#define F1_RXCLK 9
+#define F1_TXCLK 10
+#elif defined(CONFIG_ADS8272)
+#define F1_RXCLK 11
+#define F1_TXCLK 10
+#else
+#define F1_RXCLK 12
+#define F1_TXCLK 11
+#endif
+
+/* FCC2 Clock Source Configuration. There are board specific.
+ Can only choose from CLK13-16 */
+#ifdef CONFIG_ADS8272
+#define F2_RXCLK 15
+#define F2_TXCLK 16
+#else
+#define F2_RXCLK 13
+#define F2_TXCLK 14
+#endif
+
+/* FCC3 Clock Source Configuration. There are board specific.
+ Can only choose from CLK13-16 */
+#define F3_RXCLK 15
+#define F3_TXCLK 16
+
+/* Automatically generates register configurations */
+#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
+
+#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
+#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
+#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
+#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
+#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
+#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
+
+#define PC_F1RXCLK PC_CLK(F1_RXCLK)
+#define PC_F1TXCLK PC_CLK(F1_TXCLK)
+#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
+#define CMX1_CLK_MASK ((uint)0xff000000)
+
+#define PC_F2RXCLK PC_CLK(F2_RXCLK)
+#define PC_F2TXCLK PC_CLK(F2_TXCLK)
+#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
+#define CMX2_CLK_MASK ((uint)0x00ff0000)
+
+#define PC_F3RXCLK PC_CLK(F3_RXCLK)
+#define PC_F3TXCLK PC_CLK(F3_TXCLK)
+#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
+#define CMX3_CLK_MASK ((uint)0x0000ff00)
+
+
/* I/O Pin assignment for FCC1. I don't yet know the best way to do this,
* but there is little variation among the choices.
*/
@@ -152,30 +227,12 @@
#define PA1_RXER ((uint)0x00000020)
#define PA1_TXDAT ((uint)0x00003c00)
#define PA1_RXDAT ((uint)0x0003c000)
-#define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT)
-#define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
+#define PA1_PSORA_BOUT (PA1_RXDAT | PA1_TXDAT)
+#define PA1_PSORA_BIN (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
PA1_RXDV | PA1_RXER)
-#define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
-#define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER)
+#define PA1_DIRA_BOUT (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
+#define PA1_DIRA_BIN (PA1_TXDAT | PA1_TXEN | PA1_TXER)
-#ifdef CONFIG_SBC82xx
-/* rx is clk9, tx is clk10 */
-#define PC_F1RXCLK ((uint)0x00000100)
-#define PC_F1TXCLK ((uint)0x00000200)
-#define CMX1_CLK_ROUTE ((uint)0x25000000)
-#define CMX1_CLK_MASK ((uint)0xff000000)
-#elif defined(CONFIG_ADS8272)
-#define PC_F1RXCLK ((uint)0x00000400)
-#define PC_F1TXCLK ((uint)0x00000200)
-#define CMX1_CLK_ROUTE ((uint)0x36000000)
-#define CMX1_CLK_MASK ((uint)0xff000000)
-#else /* other boards */
-/* CLK12 is receive, CLK11 is transmit. These are board specific. */
-#define PC_F1RXCLK ((uint)0x00000800)
-#define PC_F1TXCLK ((uint)0x00000400)
-#define CMX1_CLK_ROUTE ((uint)0x3e000000)
-#define CMX1_CLK_MASK ((uint)0xff000000)
-#endif
/* I/O Pin assignment for FCC2. I don't yet know the best way to do this,
* but there is little variation among the choices.
@@ -188,25 +245,12 @@
#define PB2_CRS ((uint)0x00000020)
#define PB2_TXDAT ((uint)0x000003c0)
#define PB2_RXDAT ((uint)0x00003c00)
-#define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
+#define PB2_PSORB_BOUT (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
PB2_RXER | PB2_RXDV | PB2_TXER)
-#define PB2_PSORB1 (PB2_TXEN)
-#define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
-#define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER)
+#define PB2_PSORB_BIN (PB2_TXEN)
+#define PB2_DIRB_BOUT (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
+#define PB2_DIRB_BIN (PB2_TXDAT | PB2_TXEN | PB2_TXER)
-/* CLK13 is receive, CLK14 is transmit. These are board dependent.
-*/
-#ifdef CONFIG_ADS8272
-#define PC_F2RXCLK ((uint)0x00004000)
-#define PC_F2TXCLK ((uint)0x00008000)
-#define CMX2_CLK_ROUTE ((uint)0x00370000)
-#define CMX2_CLK_MASK ((uint)0x00ff0000)
-#else
-#define PC_F2RXCLK ((uint)0x00001000)
-#define PC_F2TXCLK ((uint)0x00002000)
-#define CMX2_CLK_ROUTE ((uint)0x00250000)
-#define CMX2_CLK_MASK ((uint)0x00ff0000)
-#endif
/* I/O Pin assignment for FCC3. I don't yet know the best way to do this,
* but there is little variation among the choices.
@@ -217,35 +261,61 @@
#define PB3_TXEN ((uint)0x00020000)
#define PB3_COL ((uint)0x00040000)
#define PB3_CRS ((uint)0x00080000)
+#ifndef CONFIG_RPX8260
#define PB3_TXDAT ((uint)0x0f000000)
+#define PC3_TXDAT ((uint)0x00000000)
+#else
+#define PB3_TXDAT ((uint)0x0f000000)
+#define PC3_TXDAT 0
+#endif
#define PB3_RXDAT ((uint)0x00f00000)
-#define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
+#define PB3_PSORB_BOUT (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
-#define PB3_PSORB1 (0)
-#define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
-#define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER)
+#define PB3_PSORB_BIN (0)
+#define PB3_DIRB_BOUT (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
+#define PB3_DIRB_BIN (PB3_TXDAT | PB3_TXEN | PB3_TXER)
+
+#define PC3_PSORC_BOUT (PC3_TXDAT)
+#define PC3_PSORC_BIN (0)
+#define PC3_DIRC_BOUT (0)
+#define PC3_DIRC_BIN (PC3_TXDAT)
-/* CLK15 is receive, CLK16 is transmit. These are board dependent.
-*/
-#define PC_F3RXCLK ((uint)0x00004000)
-#define PC_F3TXCLK ((uint)0x00008000)
-#define CMX3_CLK_ROUTE ((uint)0x00003700)
-#define CMX3_CLK_MASK ((uint)0x0000ff00)
/* MII status/control serial interface.
*/
-#ifdef CONFIG_TQM8260
+#if defined(CONFIG_RPX8260)
+/* The EP8260 doesn't use Port C for MDIO */
+#define PC_MDIO ((uint)0x00000000)
+#define PC_MDCK ((uint)0x00000000)
+#elif defined(CONFIG_TQM8260)
/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */
#define PC_MDIO ((uint)0x00000002)
#define PC_MDCK ((uint)0x00000001)
#elif defined(CONFIG_ADS8272)
#define PC_MDIO ((uint)0x00002000)
#define PC_MDCK ((uint)0x00001000)
+#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260) || defined(CONFIG_PQ2FADS)
+#define PC_MDIO ((uint)0x00400000)
+#define PC_MDCK ((uint)0x00200000)
#else
#define PC_MDIO ((uint)0x00000004)
#define PC_MDCK ((uint)0x00000020)
#endif
+#if defined(CONFIG_USE_MDIO) && (!defined(PC_MDIO) || !defined(PC_MDCK))
+#error "Must define PC_MDIO and PC_MDCK if using MDIO"
+#endif
+
+/* PHY addresses */
+/* default to dynamic config of phy addresses */
+#define FCC1_PHY_ADDR 0
+#ifdef CONFIG_PQ2FADS
+#define FCC2_PHY_ADDR 0
+#else
+#define FCC2_PHY_ADDR 2
+#endif
+#define FCC3_PHY_ADDR 3
+
/* A table of information for supporting FCCs. This does two things.
* First, we know how many FCCs we have and they are always externally
* numbered from zero. Second, it holds control register and I/O
@@ -253,6 +323,7 @@
*/
typedef struct fcc_info {
uint fc_fccnum;
+ uint fc_phyaddr;
uint fc_cpmblock;
uint fc_cpmpage;
uint fc_proff;
@@ -266,33 +337,19 @@
static fcc_info_t fcc_ports[] = {
#ifdef CONFIG_FCC1_ENET
- { 0, CPM_CR_FCC1_SBLOCK, CPM_CR_FCC1_PAGE, PROFF_FCC1, SIU_INT_FCC1,
+ { 0, FCC1_PHY_ADDR, CPM_CR_FCC1_SBLOCK, CPM_CR_FCC1_PAGE, PROFF_FCC1, SIU_INT_FCC1,
(PC_F1RXCLK | PC_F1TXCLK), CMX1_CLK_ROUTE, CMX1_CLK_MASK,
-# if defined(CONFIG_TQM8260) || defined(CONFIG_ADS8272)
PC_MDIO, PC_MDCK },
-# else
- 0x00000004, 0x00000100 },
-# endif
#endif
#ifdef CONFIG_FCC2_ENET
- { 1, CPM_CR_FCC2_SBLOCK, CPM_CR_FCC2_PAGE, PROFF_FCC2, SIU_INT_FCC2,
+ { 1, FCC2_PHY_ADDR, CPM_CR_FCC2_SBLOCK, CPM_CR_FCC2_PAGE, PROFF_FCC2, SIU_INT_FCC2,
(PC_F2RXCLK | PC_F2TXCLK), CMX2_CLK_ROUTE, CMX2_CLK_MASK,
-# if defined(CONFIG_TQM8260) || defined(CONFIG_ADS8272)
PC_MDIO, PC_MDCK },
-# elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260)
- 0x00400000, 0x00200000 },
-# else
- 0x00000002, 0x00000080 },
-# endif
#endif
#ifdef CONFIG_FCC3_ENET
- { 2, CPM_CR_FCC3_SBLOCK, CPM_CR_FCC3_PAGE, PROFF_FCC3, SIU_INT_FCC3,
+ { 2, FCC3_PHY_ADDR, CPM_CR_FCC3_SBLOCK, CPM_CR_FCC3_PAGE, PROFF_FCC3, SIU_INT_FCC3,
(PC_F3RXCLK | PC_F3TXCLK), CMX3_CLK_ROUTE, CMX3_CLK_MASK,
-# if defined(CONFIG_TQM8260) || defined(CONFIG_ADS8272)
PC_MDIO, PC_MDCK },
-# else
- 0x00000001, 0x00000040 },
-# endif
#endif
};
@@ -310,8 +367,6 @@
ushort skb_cur;
ushort skb_dirty;
- atomic_t n_pkts; /* Number of packets in tx ring */
-
/* CPM dual port RAM relative addresses.
*/
cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
@@ -321,7 +376,7 @@
volatile fcc_t *fccp;
volatile fcc_enet_t *ep;
struct net_device_stats stats;
- uint tx_full;
+ uint tx_free;
spinlock_t lock;
#ifdef CONFIG_USE_MDIO
@@ -329,7 +384,8 @@
uint phy_id_done;
uint phy_status;
phy_info_t *phy;
- struct tq_struct phy_task;
+ struct work_struct phy_relink;
+ struct work_struct phy_display_config;
uint sequence_done;
@@ -354,14 +410,13 @@
#ifdef CONFIG_USE_MDIO
static int mii_queue(struct net_device *dev, int request, void (*func)(uint, struct net_device *));
static uint mii_send_receive(fcc_info_t *fip, uint cmd);
-
-static void fcc_stop(struct net_device *dev);
+static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c);
/* Make MII read/write commands for the FCC.
*/
-#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
-#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
- (VAL & 0xffff))
+#define mk_mii_read(REG) (0x60020000 | (((REG) & 0x1f) << 18))
+#define mk_mii_write(REG, VAL) (0x50020000 | (((REG) & 0x1f) << 18) | \
+ ((VAL) & 0xffff))
#define mk_mii_end 0
#endif /* CONFIG_USE_MDIO */
@@ -371,20 +426,14 @@
{
struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
volatile cbd_t *bdp;
- int idx;
-
- if (!cep->link) {
- /* Link is down or autonegotiation is in progress. */
- return 1;
- }
/* Fill in a Tx ring entry */
bdp = cep->cur_tx;
#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
+ if (!cep->tx_free || (bdp->cbd_sc & BD_ENET_TX_READY)) {
/* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since cep->tx_full should be set.
+ * This should not happen, since the tx queue should be stopped.
*/
printk("%s: tx queue full!.\n", dev->name);
return 1;
@@ -407,21 +456,10 @@
spin_lock_irq(&cep->lock);
/* Save skb pointer. */
- idx = cep->skb_cur & TX_RING_MOD_MASK;
- if (cep->tx_skbuff[idx]) {
- /* This should never happen (any more).
- Leave the sanity check in for now... */
- printk(KERN_ERR "EEP. cep->tx_skbuff[%d] is %p not NULL in %s\n",
- idx, cep->tx_skbuff[idx], __func__);
- printk(KERN_ERR "Expect to lose %d bytes of sock space",
- cep->tx_skbuff[idx]->truesize);
- }
- cep->tx_skbuff[idx] = skb;
+ cep->tx_skbuff[cep->skb_cur] = skb;
cep->stats.tx_bytes += skb->len;
- cep->skb_cur++;
-
- atomic_inc(&cep->n_pkts);
+ cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
/* Send it on its way. Tell CPM its ready, interrupt when done,
* its the last BD of the frame, and to put the CRC on the end.
@@ -440,14 +478,8 @@
else
bdp++;
-
- /* If the tx_ring is full, stop the queue */
- if (atomic_read(&cep->n_pkts) >= (TX_RING_SIZE-1)) {
- if (!netif_queue_stopped(dev)) {
- netif_stop_queue(dev);
- cep->tx_full = 1;
- }
- }
+ if (!--cep->tx_free)
+ netif_stop_queue(dev);
cep->cur_tx = (cbd_t *)bdp;
@@ -468,8 +500,8 @@
{
int i;
cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
- cep->cur_tx, cep->tx_full ? " (full)" : "",
+ printk(" Ring data dump: cur_tx %p tx_free %d cur_rx %p.\n",
+ cep->cur_tx, cep->tx_free,
cep->cur_rx);
bdp = cep->tx_bd_base;
printk(" Tx @base %p :\n", bdp);
@@ -487,7 +519,7 @@
bdp->cbd_bufaddr);
}
#endif
- if (!cep->tx_full)
+ if (cep->tx_free)
netif_wake_queue(dev);
}
@@ -500,16 +532,22 @@
volatile cbd_t *bdp;
ushort int_events;
int must_restart;
- int idx;
cep = (struct fcc_enet_private *)dev->priv;
/* Get the interrupt events that caused us to be here.
*/
int_events = cep->fccp->fcc_fcce;
- cep->fccp->fcc_fcce = int_events;
+ cep->fccp->fcc_fcce = (int_events & cep->fccp->fcc_fccm);
must_restart = 0;
+#ifdef PHY_INTERRUPT
+ /* We have to be careful here to make sure that we aren't
+ * interrupted by a PHY interrupt.
+ */
+ disable_irq_nosync(PHY_INTERRUPT);
+#endif
+
/* Handle receive event in its own function.
*/
if (int_events & FCC_ENET_RXF)
@@ -530,7 +568,7 @@
spin_lock(&cep->lock);
bdp = cep->dirty_tx;
while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
+ if (cep->tx_free == TX_RING_SIZE)
break;
if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
@@ -563,12 +601,9 @@
cep->stats.collisions++;
/* Free the sk buffer associated with this last transmit. */
- idx = cep->skb_dirty & TX_RING_MOD_MASK;
- dev_kfree_skb_irq(cep->tx_skbuff[idx]);
- cep->tx_skbuff[idx] = NULL;
- cep->skb_dirty++;
-
- atomic_dec(&cep->n_pkts);
+ dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
+ cep->tx_skbuff[cep->skb_dirty] = NULL;
+ cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
/* Update pointer to next buffer descriptor to be transmitted. */
if (bdp->cbd_sc & BD_ENET_TX_WRAP)
@@ -588,8 +623,7 @@
/* Since we have freed up a buffer, the ring is no longer
* full.
*/
- if (cep->tx_full) {
- cep->tx_full = 0;
+ if (!cep->tx_free++) {
if (netif_queue_stopped(dev)) {
netif_wake_queue(dev);
}
@@ -626,8 +660,13 @@
* put them.
*/
if (int_events & FCC_ENET_BSY) {
+ cep->fccp->fcc_fcce = FCC_ENET_BSY;
cep->stats.rx_dropped++;
}
+
+#ifdef PHY_INTERRUPT
+ enable_irq(PHY_INTERRUPT);
+#endif
return IRQ_HANDLED;
}
@@ -726,8 +765,16 @@
static int
fcc_enet_close(struct net_device *dev)
{
- /* Don't know what to do yet. */
+#ifdef CONFIG_USE_MDIO
+ struct fcc_enet_private *fep = dev->priv;
+#endif
+
netif_stop_queue(dev);
+ fcc_stop(dev);
+#ifdef CONFIG_USE_MDIO
+ if (fep->phy)
+ mii_do_cmd(dev, fep->phy->shutdown);
+#endif
return 0;
}
@@ -784,15 +831,14 @@
s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
- if (mii_reg & 0x0004)
+ if (mii_reg & BMSR_LSTATUS)
s |= PHY_STAT_LINK;
- if (mii_reg & 0x0010)
+ if (mii_reg & BMSR_RFAULT)
s |= PHY_STAT_FAULT;
- if (mii_reg & 0x0020)
+ if (mii_reg & BMSR_ANEGCOMPLETE)
s |= PHY_STAT_ANC;
fep->phy_status = s;
- fep->link = (s & PHY_STAT_LINK) ? 1 : 0;
}
static void mii_parse_cr(uint mii_reg, struct net_device *dev)
@@ -802,9 +848,9 @@
s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP);
- if (mii_reg & 0x1000)
+ if (mii_reg & BMCR_ANENABLE)
s |= PHY_CONF_ANE;
- if (mii_reg & 0x4000)
+ if (mii_reg & BMCR_LOOPBACK)
s |= PHY_CONF_LOOP;
fep->phy_status = s;
@@ -817,17 +863,59 @@
s &= ~(PHY_CONF_SPMASK);
- if (mii_reg & 0x0020)
+ if (mii_reg & ADVERTISE_10HALF)
s |= PHY_CONF_10HDX;
- if (mii_reg & 0x0040)
+ if (mii_reg & ADVERTISE_10FULL)
s |= PHY_CONF_10FDX;
- if (mii_reg & 0x0080)
+ if (mii_reg & ADVERTISE_100HALF)
s |= PHY_CONF_100HDX;
- if (mii_reg & 0x00100)
+ if (mii_reg & ADVERTISE_100FULL)
s |= PHY_CONF_100FDX;
fep->phy_status = s;
}
+
+/* ------------------------------------------------------------------------- */
+/* Generic PHY support. Should work for all PHYs, but does not support link
+ * change interrupts.
+ */
+#ifdef CONFIG_FCC_GENERIC_PHY
+
+static phy_info_t phy_info_generic = {
+ 0x00000000, /* 0-->match any PHY */
+ "GENERIC",
+
+ (const phy_cmd_t []) { /* config */
+ /* advertise only half-duplex capabilities */
+ { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_HALF),
+ mii_parse_anar },
+
+ /* enable auto-negotiation */
+ { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr },
+ { mk_mii_end, }
+ },
+ (const phy_cmd_t []) { /* startup */
+ /* restart auto-negotiation */
+ { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART),
+ NULL },
+ { mk_mii_end, }
+ },
+ (const phy_cmd_t []) { /* ack_int */
+ /* We don't actually use the ack_int table with a generic
+ * PHY, but putting a reference to mii_parse_sr here keeps
+ * us from getting a compiler warning about unused static
+ * functions in the case where we only compile in generic
+ * PHY support.
+ */
+ { mk_mii_read(MII_BMSR), mii_parse_sr },
+ { mk_mii_end, }
+ },
+ (const phy_cmd_t []) { /* shutdown */
+ { mk_mii_end, }
+ },
+};
+#endif /* ifdef CONFIG_FCC_GENERIC_PHY */
+
/* ------------------------------------------------------------------------- */
/* The Level one LXT970 is used by many boards */
@@ -867,26 +955,26 @@
(const phy_cmd_t []) { /* config */
#if 0
-// { mk_mii_write(MII_REG_ANAR, 0x0021), NULL },
+// { mk_mii_write(MII_ADVERTISE, 0x0021), NULL },
/* Set default operation of 100-TX....for some reason
* some of these bits are set on power up, which is wrong.
*/
{ mk_mii_write(MII_LXT970_CONFIG, 0), NULL },
#endif
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
+ { mk_mii_read(MII_BMCR), mii_parse_cr },
+ { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* startup - enable interrupts */
{ mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
+ { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* ack_int */
/* read SR and ISR to acknowledge */
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
+ { mk_mii_read(MII_BMSR), mii_parse_sr },
{ mk_mii_read(MII_LXT970_ISR), NULL },
/* find out the current status */
@@ -951,30 +1039,29 @@
"LXT971",
(const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
+ /* configure link capabilities to advertise */
+ { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_DEFAULT),
+ mii_parse_anar },
+
+ /* enable auto-negotiation */
+ { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr },
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* startup - enable interrupts */
{ mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
-
- /* Somehow does the 971 tell me that the link is down
- * the first read after power-up.
- * read here to get a valid value in ack_int */
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
+ /* restart auto-negotiation */
+ { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART),
+ NULL },
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* ack_int */
/* find out the current status */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
+ { mk_mii_read(MII_BMSR), NULL },
+ { mk_mii_read(MII_BMSR), mii_parse_sr },
{ mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
/* we only need to read ISR to acknowledge */
-
{ mk_mii_read(MII_LXT971_ISR), NULL },
{ mk_mii_end, }
},
@@ -984,8 +1071,7 @@
},
};
-#endif /* CONFIG_FEC_LXT970 */
-
+#endif /* CONFIG_FCC_LXT971 */
/* ------------------------------------------------------------------------- */
/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
@@ -1023,7 +1109,7 @@
"QS6612",
(const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x061), NULL }, /* 10 Mbps */
+// { mk_mii_write(MII_ADVERTISE, 0x061), NULL }, /* 10 Mbps */
/* The PHY powers up isolated on the RPX,
* so send a command to allow operation.
@@ -1033,13 +1119,13 @@
/* parse cr and anar to get some info */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
+ { mk_mii_read(MII_BMCR), mii_parse_cr },
+ { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* startup - enable interrupts */
{ mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
+ { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* ack_int */
@@ -1047,8 +1133,8 @@
/* we need to read ISR, SR and ANER to acknowledge */
{ mk_mii_read(MII_QS6612_ISR), NULL },
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_REG_ANER), NULL },
+ { mk_mii_read(MII_BMSR), mii_parse_sr },
+ { mk_mii_read(MII_EXPANSION), NULL },
/* read pcr to get info */
@@ -1102,13 +1188,13 @@
(const phy_cmd_t []) { /* config */
/* parse cr and anar to get some info */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
+ { mk_mii_read(MII_BMCR), mii_parse_cr },
+ { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* startup - enable interrupts */
{ mk_mii_write(MII_DM9131_INTR, 0x0002), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
+ { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
{ mk_mii_end, }
},
(const phy_cmd_t []) { /* ack_int */
@@ -1116,8 +1202,8 @@
/* we need to read INTR, SR and ANER to acknowledge */
{ mk_mii_read(MII_DM9131_INTR), NULL },
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_REG_ANER), NULL },
+ { mk_mii_read(MII_BMSR), mii_parse_sr },
+ { mk_mii_read(MII_EXPANSION), NULL },
/* read acsr to get info */
@@ -1132,7 +1218,147 @@
#endif /* CONFIG_FEC_DM9131 */
+#ifdef CONFIG_FCC_DM9161
+/* ------------------------------------------------------------------------- */
+/* DM9161 Control register values */
+#define MIIM_DM9161_CR_STOP 0x0400
+#define MIIM_DM9161_CR_RSTAN 0x1200
+
+#define MIIM_DM9161_SCR 0x10
+#define MIIM_DM9161_SCR_INIT 0x0610
+
+/* DM9161 Specified Configuration and Status Register */
+#define MIIM_DM9161_SCSR 0x11
+#define MIIM_DM9161_SCSR_100F 0x8000
+#define MIIM_DM9161_SCSR_100H 0x4000
+#define MIIM_DM9161_SCSR_10F 0x2000
+#define MIIM_DM9161_SCSR_10H 0x1000
+/* DM9161 10BT register */
+#define MIIM_DM9161_10BTCSR 0x12
+#define MIIM_DM9161_10BTCSR_INIT 0x7800
+/* DM9161 Interrupt Register */
+#define MIIM_DM9161_INTR 0x15
+#define MIIM_DM9161_INTR_PEND 0x8000
+#define MIIM_DM9161_INTR_DPLX_MASK 0x0800
+#define MIIM_DM9161_INTR_SPD_MASK 0x0400
+#define MIIM_DM9161_INTR_LINK_MASK 0x0200
+#define MIIM_DM9161_INTR_MASK 0x0100
+#define MIIM_DM9161_INTR_DPLX_CHANGE 0x0010
+#define MIIM_DM9161_INTR_SPD_CHANGE 0x0008
+#define MIIM_DM9161_INTR_LINK_CHANGE 0x0004
+#define MIIM_DM9161_INTR_INIT 0x0000
+#define MIIM_DM9161_INTR_STOP \
+(MIIM_DM9161_INTR_DPLX_MASK | MIIM_DM9161_INTR_SPD_MASK \
+ | MIIM_DM9161_INTR_LINK_MASK | MIIM_DM9161_INTR_MASK)
+
+static void mii_parse_dm9161_sr(uint mii_reg, struct net_device * dev)
+{
+ volatile struct fcc_enet_private *fep = dev->priv;
+ uint regstat, timeout=0xffff;
+ while(!(mii_reg & 0x0020) && timeout--)
+ {
+ regstat=mk_mii_read(MII_BMSR);
+ regstat |= fep->phy_addr <<23;
+ mii_reg = mii_send_receive(fep->fip,regstat);
+ }
+
+ mii_parse_sr(mii_reg, dev);
+}
+
+static void mii_parse_dm9161_scsr(uint mii_reg, struct net_device * dev)
+{
+ volatile struct fcc_enet_private *fep = dev->priv;
+ uint s = fep->phy_status;
+
+ s &= ~(PHY_STAT_SPMASK);
+ switch((mii_reg >>12) & 0xf) {
+ case 1:
+ {
+ s |= PHY_STAT_10HDX;
+ printk("10BaseT Half Duplex\n");
+ break;
+ }
+ case 2:
+ {
+ s |= PHY_STAT_10FDX;
+ printk("10BaseT Full Duplex\n");
+ break;
+ }
+ case 4:
+ {
+ s |= PHY_STAT_100HDX;
+ printk("100BaseT Half Duplex\n");
+ break;
+ }
+ case 8:
+ {
+ s |= PHY_STAT_100FDX;
+ printk("100BaseT Full Duplex\n");
+ break;
+ }
+ }
+
+ fep->phy_status = s;
+
+}
+
+static void mii_dm9161_wait(uint mii_reg, struct net_device *dev)
+{
+ int timeout = HZ;
+
+ /* Davicom takes a bit to come up after a reset,
+ * so wait here for a bit */
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(timeout);
+}
+
+static phy_info_t phy_info_dm9161 = {
+ 0x00181b88,
+ "Davicom DM9161E",
+ (const phy_cmd_t[]) { /* config */
+ { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_STOP), NULL},
+ /* Do not bypass the scrambler/descrambler */
+ { mk_mii_write(MIIM_DM9161_SCR, MIIM_DM9161_SCR_INIT), NULL},
+ /* Configure 10BTCSR register */
+ { mk_mii_write(MIIM_DM9161_10BTCSR, MIIM_DM9161_10BTCSR_INIT),NULL},
+ /* Configure some basic stuff */
+ { mk_mii_write(MII_BMCR, 0x1000), NULL},
+ { mk_mii_read(MII_BMCR), mii_parse_cr },
+ { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
+ { mk_mii_end,}
+ },
+ (const phy_cmd_t[]) { /* startup */
+ /* Restart Auto Negotiation */
+ { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_RSTAN), NULL},
+ /* Status is read once to clear old link state */
+ { mk_mii_read(MII_BMSR), mii_dm9161_wait},
+ /* Auto-negotiate */
+ { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr},
+ /* Read the status */
+ { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr},
+ /* Clear any pending interrupts */
+ { mk_mii_read(MIIM_DM9161_INTR), NULL},
+ /* Enable Interrupts */
+ { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_INIT), NULL},
+ { mk_mii_end,}
+ },
+ (const phy_cmd_t[]) { /* ack_int */
+ { mk_mii_read(MIIM_DM9161_INTR), NULL},
+#if 0
+ { mk_mii_read(MII_BMSR), NULL},
+ { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr},
+ { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr},
+#endif
+ { mk_mii_end,}
+ },
+ (const phy_cmd_t[]) { /* shutdown */
+ { mk_mii_read(MIIM_DM9161_INTR),NULL},
+ { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_STOP), NULL},
+ { mk_mii_end,}
+ },
+};
+#endif /* CONFIG_FCC_DM9161 */
static phy_info_t *phy_info[] = {
@@ -1152,11 +1378,24 @@
&phy_info_dm9131,
#endif /* CONFIG_FEC_DM9131 */
+#ifdef CONFIG_FCC_DM9161
+ &phy_info_dm9161,
+#endif /* CONFIG_FCC_DM9161 */
+
+#ifdef CONFIG_FCC_GENERIC_PHY
+ /* Generic PHY support. This must be the last PHY in the table.
+ * It will be used to support any PHY that doesn't match a previous
+ * entry in the table.
+ */
+ &phy_info_generic,
+#endif /* CONFIG_FCC_GENERIC_PHY */
+
NULL
};
-static void mii_display_status(struct net_device *dev)
+static void mii_display_status(void *data)
{
+ struct net_device *dev = data;
volatile struct fcc_enet_private *fep = dev->priv;
uint s = fep->phy_status;
@@ -1191,8 +1430,9 @@
printk(".\n");
}
-static void mii_display_config(struct net_device *dev)
+static void mii_display_config(void *data)
{
+ struct net_device *dev = data;
volatile struct fcc_enet_private *fep = dev->priv;
uint s = fep->phy_status;
@@ -1225,20 +1465,23 @@
static void mii_relink(struct net_device *dev)
{
struct fcc_enet_private *fep = dev->priv;
- int duplex;
+ int duplex = 0;
- fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
- mii_display_status(dev);
fep->old_link = fep->link;
+ fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
+
+#ifdef MDIO_DEBUG
+ printk(" mii_relink: link=%d\n", fep->link);
+#endif
if (fep->link) {
- duplex = 0;
if (fep->phy_status
& (PHY_STAT_100FDX | PHY_STAT_10FDX))
duplex = 1;
fcc_restart(dev, duplex);
- } else {
- fcc_stop(dev);
+#ifdef MDIO_DEBUG
+ printk(" mii_relink: duplex=%d\n", duplex);
+#endif
}
}
@@ -1246,25 +1489,21 @@
{
struct fcc_enet_private *fep = dev->priv;
- fep->phy_task.routine = (void *)mii_relink;
- fep->phy_task.data = dev;
- schedule_task(&fep->phy_task);
+ mii_relink(dev);
+
+ schedule_work(&fep->phy_relink);
}
static void mii_queue_config(uint mii_reg, struct net_device *dev)
{
struct fcc_enet_private *fep = dev->priv;
- fep->phy_task.routine = (void *)mii_display_config;
- fep->phy_task.data = dev;
- schedule_task(&fep->phy_task);
+ schedule_work(&fep->phy_display_config);
}
-
-
-phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink },
+phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_BMCR), mii_queue_relink },
{ mk_mii_end, } };
-phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config },
+phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_BMCR), mii_queue_config },
{ mk_mii_end, } };
@@ -1277,10 +1516,11 @@
int i;
fep = dev->priv;
+ printk("mii_reg: %08x\n", mii_reg);
fep->phy_id |= (mii_reg & 0xffff);
for(i = 0; phy_info[i]; i++)
- if(phy_info[i]->id == (fep->phy_id >> 4))
+ if((phy_info[i]->id == (fep->phy_id >> 4)) || !phy_info[i]->id)
break;
if(!phy_info[i])
@@ -1288,6 +1528,7 @@
dev->name, fep->phy_id);
fep->phy = phy_info[i];
+ fep->phy_id_done = 1;
printk("%s: Phy @ 0x%x, type %s (0x%08x)\n",
dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
@@ -1304,36 +1545,49 @@
fep = dev->priv;
- if ((phytype = (mii_reg & 0xfff)) != 0xfff) {
+ if ((phytype = (mii_reg & 0xffff)) != 0xffff) {
/* Got first part of ID, now get remainder. */
fep->phy_id = phytype << 16;
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), mii_discover_phy3);
+ mii_queue(dev, mk_mii_read(MII_PHYSID2), mii_discover_phy3);
} else {
fep->phy_addr++;
if (fep->phy_addr < 32) {
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR1),
+ mii_queue(dev, mk_mii_read(MII_PHYSID1),
mii_discover_phy);
} else {
printk("fec: No PHY device found.\n");
}
}
}
+#endif /* CONFIG_USE_MDIO */
+#ifdef PHY_INTERRUPT
/* This interrupt occurs when the PHY detects a link change. */
static irqreturn_t
mii_link_interrupt(int irq, void * dev_id, struct pt_regs * regs)
{
struct net_device *dev = dev_id;
struct fcc_enet_private *fep = dev->priv;
+ fcc_info_t *fip = fep->fip;
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
+ if (fep->phy) {
+ /* We don't want to be interrupted by an FCC
+ * interrupt here.
+ */
+ disable_irq_nosync(fip->fc_interrupt);
+
+ mii_do_cmd(dev, fep->phy->ack_int);
+ /* restart and display status */
+ mii_do_cmd(dev, phy_cmd_relink);
+
+ enable_irq(fip->fc_interrupt);
+ }
return IRQ_HANDLED;
}
+#endif /* ifdef PHY_INTERRUPT */
-#endif /* CONFIG_USE_MDIO */
-
+#if 0 /* This should be fixed someday */
/* Set or clear the multicast filter for this adaptor.
* Skeleton taken from sunlance driver.
* The CPM Ethernet implementation allows Multicast as well as individual
@@ -1383,8 +1637,8 @@
dmi = dev->mc_list;
- for (i=0; i<dev->mc_count; i++) {
-
+ for (i=0; i<dev->mc_count; i++, dmi = dmi->next) {
+
/* Only support group multicast for now.
*/
if (!(dmi->dmi_addr[0] & 1))
@@ -1411,6 +1665,7 @@
}
}
}
+#endif /* if 0 */
/* Set the individual MAC address.
@@ -1482,7 +1737,7 @@
dev->watchdog_timeo = TX_TIMEOUT;
dev->stop = fcc_enet_close;
dev->get_stats = fcc_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
+ /* dev->set_multicast_list = set_multicast_list; */
dev->set_mac_address = fcc_enet_set_mac_address;
init_fcc_startup(fip, dev);
@@ -1502,8 +1757,11 @@
/* Queue up command to detect the PHY and initialize the
* remainder of the interface.
*/
- cep->phy_addr = 0;
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
+ cep->phy_id_done = 0;
+ cep->phy_addr = fip->fc_phyaddr;
+ mii_queue(dev, mk_mii_read(MII_PHYSID1), mii_discover_phy);
+ INIT_WORK(&cep->phy_relink, mii_display_status, dev);
+ INIT_WORK(&cep->phy_display_config, mii_display_config, dev);
#endif /* CONFIG_USE_MDIO */
fip++;
@@ -1549,29 +1807,36 @@
if (fip->fc_proff == PROFF_FCC1) {
/* Configure port A and C pins for FCC1 Ethernet.
*/
- io->iop_pdira &= ~PA1_DIRA0;
- io->iop_pdira |= PA1_DIRA1;
- io->iop_psora &= ~PA1_PSORA0;
- io->iop_psora |= PA1_PSORA1;
- io->iop_ppara |= (PA1_DIRA0 | PA1_DIRA1);
+ io->iop_pdira &= ~PA1_DIRA_BOUT;
+ io->iop_pdira |= PA1_DIRA_BIN;
+ io->iop_psora &= ~PA1_PSORA_BOUT;
+ io->iop_psora |= PA1_PSORA_BIN;
+ io->iop_ppara |= (PA1_DIRA_BOUT | PA1_DIRA_BIN);
}
if (fip->fc_proff == PROFF_FCC2) {
/* Configure port B and C pins for FCC Ethernet.
*/
- io->iop_pdirb &= ~PB2_DIRB0;
- io->iop_pdirb |= PB2_DIRB1;
- io->iop_psorb &= ~PB2_PSORB0;
- io->iop_psorb |= PB2_PSORB1;
- io->iop_pparb |= (PB2_DIRB0 | PB2_DIRB1);
+ io->iop_pdirb &= ~PB2_DIRB_BOUT;
+ io->iop_pdirb |= PB2_DIRB_BIN;
+ io->iop_psorb &= ~PB2_PSORB_BOUT;
+ io->iop_psorb |= PB2_PSORB_BIN;
+ io->iop_pparb |= (PB2_DIRB_BOUT | PB2_DIRB_BIN);
}
if (fip->fc_proff == PROFF_FCC3) {
/* Configure port B and C pins for FCC Ethernet.
*/
- io->iop_pdirb &= ~PB3_DIRB0;
- io->iop_pdirb |= PB3_DIRB1;
- io->iop_psorb &= ~PB3_PSORB0;
- io->iop_psorb |= PB3_PSORB1;
- io->iop_pparb |= (PB3_DIRB0 | PB3_DIRB1);
+ io->iop_pdirb &= ~PB3_DIRB_BOUT;
+ io->iop_pdirb |= PB3_DIRB_BIN;
+ io->iop_psorb &= ~PB3_PSORB_BOUT;
+ io->iop_psorb |= PB3_PSORB_BIN;
+ io->iop_pparb |= (PB3_DIRB_BOUT | PB3_DIRB_BIN);
+
+ io->iop_pdirc &= ~PC3_DIRC_BOUT;
+ io->iop_pdirc |= PC3_DIRC_BIN;
+ io->iop_psorc &= ~PC3_PSORC_BOUT;
+ io->iop_psorc |= PC3_PSORC_BIN;
+ io->iop_pparc |= (PC3_DIRC_BOUT | PC3_DIRC_BIN);
+
}
/* Port C has clocks......
@@ -1699,6 +1964,11 @@
*/
eap = (unsigned char *)&(ep->fen_paddrh);
for (i=5; i>=0; i--) {
+
+/*
+ * The EP8260 only uses FCC3, so we can safely give it the real
+ * MAC address.
+ */
#ifdef CONFIG_SBC82xx
if (i == 5) {
/* bd->bi_enetaddr holds the SCC0 address; the FCC
@@ -1708,15 +1978,17 @@
*eap++ = dev->dev_addr[i];
}
#else
+#ifndef CONFIG_RPX8260
if (i == 3) {
dev->dev_addr[i] = bd->bi_enetaddr[i];
dev->dev_addr[i] |= (1 << (7 - fip->fc_fccnum));
*eap++ = dev->dev_addr[i];
- }
+ } else
#endif
- else {
+ {
*eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
}
+#endif
}
ep->fen_taddrh = 0;
@@ -1798,7 +2070,6 @@
while (cp->cp_cpcr & CPM_CR_FLG);
cep->skb_cur = cep->skb_dirty = 0;
- atomic_set(&cep->n_pkts, 0);
}
/* Let 'er rip.
@@ -1812,25 +2083,56 @@
cep = (struct fcc_enet_private *)(dev->priv);
fccp = cep->fccp;
+#ifdef CONFIG_RPX8260
+#ifdef PHY_INTERRUPT
+ /* Route PHY interrupt to IRQ. The following code only works for
+ * IRQ1 - IRQ7. It does not work for Port C interrupts.
+ */
+ *((volatile u_char *) (RPX_CSR_ADDR + 13)) &= ~BCSR13_FETH_IRQMASK;
+ *((volatile u_char *) (RPX_CSR_ADDR + 13)) |=
+ ((PHY_INTERRUPT - SIU_INT_IRQ1 + 1) << 4);
+#endif
+ /* Initialize MDIO pins. */
+ *((volatile u_char *) (RPX_CSR_ADDR + 4)) &= ~BCSR4_MII_MDC;
+ *((volatile u_char *) (RPX_CSR_ADDR + 4)) |=
+ BCSR4_MII_READ | BCSR4_MII_MDIO;
+ /* Enable external LXT971 PHY. */
+ *((volatile u_char *) (RPX_CSR_ADDR + 4)) |= BCSR4_EN_PHY;
+ udelay(1000);
+ *((volatile u_char *) (RPX_CSR_ADDR+ 4)) |= BCSR4_EN_MII;
+ udelay(1000);
+#endif /* ifdef CONFIG_RPX8260 */
+
fccp->fcc_fcce = 0xffff; /* Clear any pending events */
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
+ /* Leave FCC interrupts masked for now. Will be unmasked by
+ * fcc_restart().
*/
- fccp->fcc_fccm = (FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
+ fccp->fcc_fccm = 0;
/* Install our interrupt handler.
*/
- if (request_irq(fip->fc_interrupt, fcc_enet_interrupt, 0,
- "fenet", dev) < 0)
+ if (request_irq(fip->fc_interrupt, fcc_enet_interrupt, 0, "fenet",
+ dev) < 0)
printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
-#ifdef CONFIG_USE_MDIO
+#ifdef PHY_INTERRUPT
+#ifdef CONFIG_ADS8272
+ if (request_irq(PHY_INTERRUPT, mii_link_interrupt, SA_SHIRQ,
+ "mii", dev) < 0)
+ printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
+#else
+ /* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is
+ * on Port C.
+ */
+ ((volatile cpm2_map_t *) CPM_MAP_ADDR)->im_intctl.ic_siexr |=
+ (1 << (14 - (PHY_INTERRUPT - SIU_INT_IRQ1)));
+
if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
"mii", dev) < 0)
- printk("Can't get MII IRQ %d\n", fip->fc_interrupt);
-#endif /* CONFIG_USE_MDIO */
+ printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
+#endif
+#endif /* PHY_INTERRUPT */
/* Set GFMR to enable Ethernet operating mode.
*/
@@ -1847,10 +2149,14 @@
fccp->fcc_fpsmr = FCC_PSMR_ENCRC;
#ifdef CONFIG_PQ2ADS
- /* Enable the PHY.
- */
- *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_FETHIEN;
- *(volatile uint *)(BCSR_ADDR + 4) |= BCSR1_FETH_RST;
+ /* Enable the PHY. */
+ *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_FETHIEN;
+ *(volatile uint *)(BCSR_ADDR + 4) |= BCSR1_FETH_RST;
+#endif
+#if defined(CONFIG_PQ2ADS) || defined(CONFIG_PQ2FADS)
+ /* Enable the 2nd PHY. */
+ *(volatile uint *)(BCSR_ADDR + 12) &= ~BCSR3_FETHIEN2;
+ *(volatile uint *)(BCSR_ADDR + 12) |= BCSR3_FETH2_RST;
#endif
#if defined(CONFIG_USE_MDIO) || defined(CONFIG_TQM8260)
@@ -1872,54 +2178,74 @@
* I wonder what "they" were thinking (maybe weren't) when they leave
* the I2C in the CPM but I have to toggle these bits......
*/
-
-#define FCC_PDATC_MDIO(bit) \
- if (bit) \
- io->iop_pdatc |= fip->fc_mdio; \
- else \
- io->iop_pdatc &= ~fip->fc_mdio;
-
-#define FCC_PDATC_MDC(bit) \
- if (bit) \
- io->iop_pdatc |= fip->fc_mdck; \
- else \
- io->iop_pdatc &= ~fip->fc_mdck;
+#ifdef CONFIG_RPX8260
+ /* The EP8260 has the MDIO pins in a BCSR instead of on Port C
+ * like most other boards.
+ */
+#define MDIO_ADDR ((volatile u_char *)(RPX_CSR_ADDR + 4))
+#define MAKE_MDIO_OUTPUT *MDIO_ADDR &= ~BCSR4_MII_READ
+#define MAKE_MDIO_INPUT *MDIO_ADDR |= BCSR4_MII_READ | BCSR4_MII_MDIO
+#define OUT_MDIO(bit) \
+ if (bit) \
+ *MDIO_ADDR |= BCSR4_MII_MDIO; \
+ else \
+ *MDIO_ADDR &= ~BCSR4_MII_MDIO;
+#define IN_MDIO (*MDIO_ADDR & BCSR4_MII_MDIO)
+#define OUT_MDC(bit) \
+ if (bit) \
+ *MDIO_ADDR |= BCSR4_MII_MDC; \
+ else \
+ *MDIO_ADDR &= ~BCSR4_MII_MDC;
+#else /* ifdef CONFIG_RPX8260 */
+ /* This is for the usual case where the MDIO pins are on Port C.
+ */
+#define MDIO_ADDR (((volatile cpm2_map_t *)CPM_MAP_ADDR)->im_ioport)
+#define MAKE_MDIO_OUTPUT MDIO_ADDR.iop_pdirc |= fip->fc_mdio
+#define MAKE_MDIO_INPUT MDIO_ADDR.iop_pdirc &= ~fip->fc_mdio
+#define OUT_MDIO(bit) \
+ if (bit) \
+ MDIO_ADDR.iop_pdatc |= fip->fc_mdio; \
+ else \
+ MDIO_ADDR.iop_pdatc &= ~fip->fc_mdio;
+#define IN_MDIO ((MDIO_ADDR.iop_pdatc) & fip->fc_mdio)
+#define OUT_MDC(bit) \
+ if (bit) \
+ MDIO_ADDR.iop_pdatc |= fip->fc_mdck; \
+ else \
+ MDIO_ADDR.iop_pdatc &= ~fip->fc_mdck;
+#endif /* ifdef CONFIG_RPX8260 */
static uint
mii_send_receive(fcc_info_t *fip, uint cmd)
{
uint retval;
int read_op, i, off;
- volatile cpm2_map_t *immap;
- volatile iop_cpm2_t *io;
-
- immap = (cpm2_map_t *)CPM_MAP_ADDR;
- io = &immap->im_ioport;
-
- io->iop_pdirc |= (fip->fc_mdio | fip->fc_mdck);
+ const int us = 1;
read_op = ((cmd & 0xf0000000) == 0x60000000);
/* Write preamble
*/
+ OUT_MDIO(1);
+ MAKE_MDIO_OUTPUT;
+ OUT_MDIO(1);
for (i = 0; i < 32; i++)
{
- FCC_PDATC_MDC(0);
- FCC_PDATC_MDIO(1);
- udelay(1);
- FCC_PDATC_MDC(1);
- udelay(1);
+ udelay(us);
+ OUT_MDC(1);
+ udelay(us);
+ OUT_MDC(0);
}
/* Write data
*/
for (i = 0, off = 31; i < (read_op ? 14 : 32); i++, --off)
{
- FCC_PDATC_MDC(0);
- FCC_PDATC_MDIO((cmd >> off) & 0x00000001);
- udelay(1);
- FCC_PDATC_MDC(1);
- udelay(1);
+ OUT_MDIO((cmd >> off) & 0x00000001);
+ udelay(us);
+ OUT_MDC(1);
+ udelay(us);
+ OUT_MDC(0);
}
retval = cmd;
@@ -1928,68 +2254,111 @@
{
retval >>= 16;
- FCC_PDATC_MDC(0);
- io->iop_pdirc &= ~fip->fc_mdio;
- udelay(1);
- FCC_PDATC_MDC(1);
- udelay(1);
- FCC_PDATC_MDC(0);
- udelay(1);
+ MAKE_MDIO_INPUT;
+ udelay(us);
+ OUT_MDC(1);
+ udelay(us);
+ OUT_MDC(0);
- for (i = 0, off = 15; i < 16; i++, off--)
+ for (i = 0; i < 16; i++)
{
- FCC_PDATC_MDC(1);
+ udelay(us);
+ OUT_MDC(1);
+ udelay(us);
retval <<= 1;
- if (io->iop_pdatc & fip->fc_mdio)
+ if (IN_MDIO)
retval++;
- udelay(1);
- FCC_PDATC_MDC(0);
- udelay(1);
+ OUT_MDC(0);
}
}
- io->iop_pdirc |= (fip->fc_mdio | fip->fc_mdck);
-
- for (i = 0; i < 32; i++)
- {
- FCC_PDATC_MDC(0);
- FCC_PDATC_MDIO(1);
- udelay(1);
- FCC_PDATC_MDC(1);
- udelay(1);
- }
+ MAKE_MDIO_INPUT;
+ udelay(us);
+ OUT_MDC(1);
+ udelay(us);
+ OUT_MDC(0);
return retval;
}
+#endif /* CONFIG_USE_MDIO */
static void
fcc_stop(struct net_device *dev)
{
- volatile fcc_t *fccp;
- struct fcc_enet_private *fcp;
+ struct fcc_enet_private *fep= (struct fcc_enet_private *)(dev->priv);
+ volatile fcc_t *fccp = fep->fccp;
+ fcc_info_t *fip = fep->fip;
+ volatile fcc_enet_t *ep = fep->ep;
+ volatile cpm_cpm2_t *cp = cpmp;
+ volatile cbd_t *bdp;
+ int i;
+
+ if ((fccp->fcc_gfmr & (FCC_GFMR_ENR | FCC_GFMR_ENT)) == 0)
+ return; /* already down */
- fcp = (struct fcc_enet_private *)(dev->priv);
- fccp = fcp->fccp;
+ fccp->fcc_fccm = 0;
+
+ /* issue the graceful stop tx command */
+ while (cp->cp_cpcr & CPM_CR_FLG);
+ cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock,
+ 0x0c, CPM_CR_GRA_STOP_TX) | CPM_CR_FLG;
+ while (cp->cp_cpcr & CPM_CR_FLG);
/* Disable transmit/receive */
fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT);
+
+ /* issue the restart tx command */
+ fccp->fcc_fcce = FCC_ENET_GRA;
+ while (cp->cp_cpcr & CPM_CR_FLG);
+ cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock,
+ 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG;
+ while (cp->cp_cpcr & CPM_CR_FLG);
+
+ /* free tx buffers */
+ fep->skb_cur = fep->skb_dirty = 0;
+ for (i=0; i<=TX_RING_MOD_MASK; i++) {
+ if (fep->tx_skbuff[i] != NULL) {
+ dev_kfree_skb(fep->tx_skbuff[i]);
+ fep->tx_skbuff[i] = NULL;
+ }
+ }
+ fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
+ fep->tx_free = TX_RING_SIZE;
+ ep->fen_genfcc.fcc_tbptr = ep->fen_genfcc.fcc_tbase;
+
+ /* Initialize the tx buffer descriptors. */
+ bdp = fep->tx_bd_base;
+ for (i=0; i<TX_RING_SIZE; i++) {
+ bdp->cbd_sc = 0;
+ bdp->cbd_datlen = 0;
+ bdp->cbd_bufaddr = 0;
+ bdp++;
+ }
+ /* Set the last buffer to wrap. */
+ bdp--;
+ bdp->cbd_sc |= BD_SC_WRAP;
}
-#endif /* CONFIG_USE_MDIO */
static void
fcc_restart(struct net_device *dev, int duplex)
{
- volatile fcc_t *fccp;
- struct fcc_enet_private *fcp;
+ struct fcc_enet_private *fep = (struct fcc_enet_private *)(dev->priv);
+ volatile fcc_t *fccp = fep->fccp;
- fcp = (struct fcc_enet_private *)(dev->priv);
- fccp = fcp->fccp;
+ /* stop any transmissions in progress */
+ fcc_stop(dev);
if (duplex)
fccp->fcc_fpsmr |= FCC_PSMR_FDE | FCC_PSMR_LPB;
else
fccp->fcc_fpsmr &= ~(FCC_PSMR_FDE | FCC_PSMR_LPB);
+ /* Enable interrupts for transmit error, complete frame
+ * received, and any transmit buffer we have also set the
+ * interrupt flag.
+ */
+ fccp->fcc_fccm = (FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
+
/* Enable transmit/receive */
fccp->fcc_gfmr |= FCC_GFMR_ENR | FCC_GFMR_ENT;
}
@@ -2004,6 +2373,7 @@
fep->link = 0;
if (fep->phy) {
+ fcc_restart(dev, 0); /* always start in half-duplex */
mii_do_cmd(dev, fep->phy->ack_int);
mii_do_cmd(dev, fep->phy->config);
mii_do_cmd(dev, phy_cmd_config); /* display configuration */
@@ -2017,6 +2387,7 @@
return -ENODEV; /* No PHY we understand */
#else
fep->link = 1;
+ fcc_restart(dev, 0); /* always start in half-duplex */
netif_start_queue(dev);
return 0; /* Always succeed */
#endif /* CONFIG_USE_MDIO */
diff -Nru a/arch/ppc/Kconfig b/arch/ppc/Kconfig
--- a/arch/ppc/Kconfig 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/Kconfig 2005-03-20 16:30:37 -08:00
@@ -538,6 +538,17 @@
config SPRUCE
bool "IBM-Spruce"
+config HDPU
+ bool "Sky-HDPU"
+ help
+ Select HDPU if configuring a Sky Computers Compute Blade.
+
+config HDPU_FEATURES
+ depends HDPU
+ tristate "HDPU-Features"
+ help
+ Select to enable HDPU enhanced features.
+
config EV64260
bool "Marvell-EV64260BP"
help
@@ -748,7 +759,7 @@
config MV64360
bool
- depends on KATANA || RADSTONE_PPC7D
+ depends on KATANA || RADSTONE_PPC7D || HDPU
default y
config MV64360
@@ -1099,7 +1110,7 @@
bool
config PCI
- bool "PCI support" if 40x || CPM2 || 83xx || 85xx
+ bool "PCI support" if 40x || CPM2 || 83xx || 85xx || PPC_MPC52xx
default y if !40x && !CPM2 && !8xx && !APUS && !83xx && !85xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
default PCI_QSPAN if !4xx && !CPM2 && 8xx
diff -Nru a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile
--- a/arch/ppc/boot/simple/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/Makefile 2005-03-20 16:30:37 -08:00
@@ -49,7 +49,7 @@
#----------------------------------------------------------------------------
zimage-$(CONFIG_CPCI690) := zImage-STRIPELF
zimageinitrd-$(CONFIG_CPCI690) := zImage.initrd-STRIPELF
- extra.o-$(CONFIG_CPCI690) := misc-cpci690.o mv64x60_stub.o
+ extra.o-$(CONFIG_CPCI690) := misc-cpci690.o
end-$(CONFIG_CPCI690) := cpci690
cacheflag-$(CONFIG_CPCI690) := -include $(clear_L2_L3)
@@ -94,11 +94,11 @@
end-$(CONFIG_K2) := k2
cacheflag-$(CONFIG_K2) := -include $(clear_L2_L3)
- extra.o-$(CONFIG_KATANA) := misc-katana.o mv64x60_stub.o
+ extra.o-$(CONFIG_KATANA) := misc-katana.o
end-$(CONFIG_KATANA) := katana
cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3)
- extra.o-$(CONFIG_RADSTONE_PPC7D) := misc-radstone_ppc7d.o mv64x60_stub.o
+ extra.o-$(CONFIG_RADSTONE_PPC7D) := misc-radstone_ppc7d.o
end-$(CONFIG_RADSTONE_PPC7D) := radstone_ppc7d
cacheflag-$(CONFIG_RADSTONE_PPC7D) := -include $(clear_L2_L3)
diff -Nru a/arch/ppc/boot/simple/head.S b/arch/ppc/boot/simple/head.S
--- a/arch/ppc/boot/simple/head.S 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/head.S 2005-03-20 16:30:37 -08:00
@@ -135,11 +135,6 @@
*/
#endif
-#ifdef CONFIG_MV64X60
- /* mv64x60 specific hook to do things like moving register base, etc. */
- bl mv64x60_init
-#endif
-
/* Get the load address.
*/
subi r3, r3, 4 /* Get the actual IP, not NIP */
diff -Nru a/arch/ppc/boot/simple/m8260_tty.c b/arch/ppc/boot/simple/m8260_tty.c
--- a/arch/ppc/boot/simple/m8260_tty.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/m8260_tty.c 2005-03-20 16:30:37 -08:00
@@ -159,7 +159,7 @@
sccp->scc_sccm = 0;
sccp->scc_scce = 0xffff;
sccp->scc_dsr = 0x7e7e;
- sccp->scc_pmsr = 0x3000;
+ sccp->scc_psmr = 0x3000;
/* Wire BRG1 to SCC1. The console driver will take care of
* others.
diff -Nru a/arch/ppc/boot/simple/misc-chestnut.S b/arch/ppc/boot/simple/misc-chestnut.S
--- a/arch/ppc/boot/simple/misc-chestnut.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,41 +0,0 @@
-/*
- * arch/ppc/boot/simple/misc-chestnut.S
- *
- * Setup for the IBM Chestnut (ibm-750fxgx_eval)
- *
- * Author: <source@mvista.com>
- *
- * <2004> (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-
-#include <asm/ppc_asm.h>
-#include <asm/mv64x60_defs.h>
-#include <platforms/chestnut.h>
-
- .globl mv64x60_board_init
-mv64x60_board_init:
- /*
- * move UART to 0xffc00000
- */
-
- li r23,16
-
- addis r25,0,CONFIG_MV64X60_BASE@h
- ori r25,r25,MV64x60_CPU2DEV_2_BASE
- addis r26,0,CHESTNUT_UART_BASE@h
- srw r26,r26,r23
- stwbrx r26,0,(r25)
- sync
-
- addis r25,0,CONFIG_MV64X60_BASE@h
- ori r25,r25,MV64x60_CPU2DEV_2_SIZE
- addis r26,0,0x00100000@h
- srw r26,r26,r23
- stwbrx r26,0,(r25)
- sync
-
- blr
diff -Nru a/arch/ppc/boot/simple/misc-chestnut.c b/arch/ppc/boot/simple/misc-chestnut.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/boot/simple/misc-chestnut.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,35 @@
+/*
+ * arch/ppc/boot/simple/misc-chestnut.c
+ *
+ * Setup for the IBM Chestnut (ibm-750fxgx_eval)
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/mv64x60_defs.h>
+#include <platforms/chestnut.h>
+
+/* Not in the kernel so won't include kernel.h to get its 'max' definition */
+#define max(a,b) (((a) > (b)) ? (a) : (b))
+
+void
+mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
+{
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+ /*
+ * Change device bus 2 window so that bootoader can do I/O thru
+ * 8250/16550 UART that's mapped in that window.
+ */
+ out_le32(new_base + MV64x60_CPU2DEV_2_BASE, CHESTNUT_UART_BASE >> 16);
+ out_le32(new_base + MV64x60_CPU2DEV_2_SIZE, CHESTNUT_UART_SIZE >> 16);
+ __asm__ __volatile__("sync");
+#endif
+}
diff -Nru a/arch/ppc/boot/simple/misc-cpci690.c b/arch/ppc/boot/simple/misc-cpci690.c
--- a/arch/ppc/boot/simple/misc-cpci690.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/misc-cpci690.c 2005-03-20 16:30:37 -08:00
@@ -12,4 +12,16 @@
*/
#include <linux/types.h>
-long mv64x60_mpsc_clk_freq = 133000000;
+#include <platforms/cpci690.h>
+
+extern u32 mv64x60_console_baud;
+extern u32 mv64x60_mpsc_clk_src;
+extern u32 mv64x60_mpsc_clk_freq;
+
+void
+mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
+{
+ mv64x60_console_baud = CPCI690_MPSC_BAUD;
+ mv64x60_mpsc_clk_src = CPCI690_MPSC_CLK_SRC;
+ mv64x60_mpsc_clk_freq = CPCI690_BUS_FREQ;
+}
diff -Nru a/arch/ppc/boot/simple/misc-ev64260.S b/arch/ppc/boot/simple/misc-ev64260.S
--- a/arch/ppc/boot/simple/misc-ev64260.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,68 +0,0 @@
-/*
- * arch/ppc/boot/simple/misc-ev64260.S
- *
- * Host bridge init code for the Marvell/Galileo EV-64260-BP evaluation board
- * with a GT64260 onboard.
- *
- * Author: Mark Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-#include <asm/cache.h>
-#include <asm/mv64x60_defs.h>
-#include <platforms/ev64260.h>
-
- .globl mv64x60_board_init
-mv64x60_board_init:
- /* DINK doesn't enable 745x timebase, so enable here (Adrian Cox) */
- mfspr r25,SPRN_PVR
- srwi r25,r25,16
- cmplwi r25,(PVR_7450 >> 16)
- bne 1f
- mfspr r25,SPRN_HID0
- oris r25,r25,(HID0_TBEN >> 16)
- mtspr SPRN_HID0,r25
-1:
-#if (CONFIG_MV64X60_NEW_BASE != CONFIG_MV64X60_BASE)
- li r23,20
-
- /*
- * Change the CS2 window for the UART so that the bootloader
- * can do I/O thru the UARTs.
- */
- addis r25,0,CONFIG_MV64X60_NEW_BASE@h
- ori r25,r25,MV64x60_CPU2DEV_2_BASE
- addis r26,0,EV64260_UART_BASE@h
- srw r26,r26,r23
- stwbrx r26,0,(r25)
- sync
-
- addis r25,0,CONFIG_MV64X60_NEW_BASE@h
- ori r25,r25,MV64x60_CPU2DEV_2_SIZE
- addis r26,0,EV64260_UART_END@h
- srw r26,r26,r23
- stwbrx r26,0,(r25)
- sync
-#endif
- blr
-
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
-.data
- .globl mv64x60_console_baud
-mv64x60_console_baud:
-.long EV64260_DEFAULT_BAUD
-
- .globl mv64x60_mpsc_clk_src
-mv64x60_mpsc_clk_src:
-.long EV64260_MPSC_CLK_SRC
-
- .globl mv64x60_mpsc_clk_freq
-mv64x60_mpsc_clk_freq:
-.long EV64260_MPSC_CLK_FREQ
-#endif
diff -Nru a/arch/ppc/boot/simple/misc-ev64260.c b/arch/ppc/boot/simple/misc-ev64260.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/boot/simple/misc-ev64260.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,57 @@
+/*
+ * arch/ppc/boot/simple/misc-ev64260.c
+ *
+ * Host bridge init code for the Marvell/Galileo EV-64260-BP evaluation board
+ * with a GT64260 onboard.
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2001 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <asm/reg.h>
+#include <asm/io.h>
+#include <asm/mv64x60_defs.h>
+#include <platforms/ev64260.h>
+
+#ifdef CONFIG_SERIAL_MPSC_CONSOLE
+extern u32 mv64x60_console_baud;
+extern u32 mv64x60_mpsc_clk_src;
+extern u32 mv64x60_mpsc_clk_freq;
+#endif
+
+void
+mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
+{
+ u32 p, v;
+
+ /* DINK doesn't enable 745x timebase, so enable here (Adrian Cox) */
+ p = mfspr(SPRN_PVR);
+ p >>= 16;
+
+ /* Reasonable SWAG at a 745x PVR value */
+ if (((p & 0xfff0) == 0x8000) && (p != 0x800c)) {
+ v = mfspr(SPRN_HID0);
+ v |= HID0_TBEN;
+ mtspr(SPRN_HID0, v);
+ }
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+ /*
+ * Change device bus 2 window so that bootoader can do I/O thru
+ * 8250/16550 UART that's mapped in that window.
+ */
+ out_le32(new_base + MV64x60_CPU2DEV_2_BASE, EV64260_UART_BASE >> 20);
+ out_le32(new_base + MV64x60_CPU2DEV_2_SIZE, EV64260_UART_END >> 20);
+ __asm__ __volatile__("sync");
+#elif defined(CONFIG_SERIAL_MPSC_CONSOLE)
+ mv64x60_console_baud = EV64260_DEFAULT_BAUD;
+ mv64x60_mpsc_clk_src = EV64260_MPSC_CLK_SRC;
+ mv64x60_mpsc_clk_freq = EV64260_MPSC_CLK_FREQ;
+#endif
+}
diff -Nru a/arch/ppc/boot/simple/misc-katana.c b/arch/ppc/boot/simple/misc-katana.c
--- a/arch/ppc/boot/simple/misc-katana.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/misc-katana.c 2005-03-20 16:30:37 -08:00
@@ -1,7 +1,7 @@
/*
* arch/ppc/boot/simple/misc-katana.c
*
- * Add birec data for Artesyn KATANA board.
+ * Set up MPSC values to bootwrapper can prompt user.
*
* Author: Mark A. Greer <source@mvista.com>
*
@@ -11,5 +11,27 @@
* or implied.
*/
+#include <linux/config.h>
#include <linux/types.h>
-long mv64x60_mpsc_clk_freq = 133333333;
+#include <asm/io.h>
+#include <asm/mv64x60_defs.h>
+#include <platforms/katana.h>
+
+extern u32 mv64x60_console_baud;
+extern u32 mv64x60_mpsc_clk_src;
+extern u32 mv64x60_mpsc_clk_freq;
+
+/* Not in the kernel so won't include kernel.h to get its 'min' definition */
+#ifndef min
+#define min(a,b) (((a) < (b)) ? (a) : (b))
+#endif
+
+void
+mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
+{
+ mv64x60_console_baud = KATANA_DEFAULT_BAUD;
+ mv64x60_mpsc_clk_src = KATANA_MPSC_CLK_SRC;
+ mv64x60_mpsc_clk_freq =
+ min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE),
+ MV64x60_TCLK_FREQ_MAX);
+}
diff -Nru a/arch/ppc/boot/simple/misc-mv64x60.S b/arch/ppc/boot/simple/misc-mv64x60.S
--- a/arch/ppc/boot/simple/misc-mv64x60.S 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,61 +0,0 @@
-/*
- * arch/ppc/boot/simple/misc-mv64x60.S
- *
- * Code to change the base address of the host bridges and call board specific
- * init routine.
- *
- * Author: Mark Greer <mgreer@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#include <linux/config.h>
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-#include <asm/cache.h>
-#include <asm/mv64x60_defs.h>
-
- .globl mv64x60_init
-mv64x60_init:
- mflr r27
-
-#if (CONFIG_MV64X60_NEW_BASE != CONFIG_MV64X60_BASE)
- bl move_base
-#endif
- bl mv64x60_board_init
-
- mtlr r27
- blr
-
-#if (CONFIG_MV64X60_NEW_BASE != CONFIG_MV64X60_BASE)
-move_base:
- li r20,0
-#ifdef CONFIG_GT64260
- li r23,20
-#else /* Must be mv64[34]60 which uses top 16 bits */
- li r23,16
-#endif
-
- /* Relocate bridge's regs */
- addis r25,0,CONFIG_MV64X60_BASE@h
- ori r25,r25,MV64x60_INTERNAL_SPACE_DECODE
- lwbrx r26,0,(r25)
- lis r24,0xffff
- and r26,r26,r24
- addis r24,0,CONFIG_MV64X60_NEW_BASE@h
- srw r24,r24,r23
- or r26,r26,r24
- stwbrx r26,0,(r25)
- sync
-
- /* Wait for write to take effect */
- addis r25,0,CONFIG_MV64X60_NEW_BASE@h
- ori r25,r25,MV64x60_INTERNAL_SPACE_DECODE
-1: lwbrx r24,0,(r25)
- cmpw r24,r26
- bne 1b
-
- blr
-#endif
diff -Nru a/arch/ppc/boot/simple/misc-mv64x60.c b/arch/ppc/boot/simple/misc-mv64x60.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/boot/simple/misc-mv64x60.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,61 @@
+/*
+ * arch/ppc/boot/simple/misc-mv64x60.c
+ *
+ * Relocate bridge's register base and call board specific routine.
+ *
+ * Author: Mark A. Greer <source@mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/mv64x60_defs.h>
+
+extern struct bi_record *decompress_kernel(unsigned long load_addr,
+ int num_words, unsigned long cksum);
+
+void
+mv64x60_move_base(void __iomem *old_base, void __iomem *new_base)
+{
+ u32 bits, mask, b;
+
+ if (old_base != new_base) {
+#ifdef CONFIG_GT64260
+ bits = 12;
+ mask = 0x07000000;
+#else /* Must be mv64[34]60 */
+ bits = 16;
+ mask = 0x03000000;
+#endif
+ b = in_le32(old_base + MV64x60_INTERNAL_SPACE_DECODE);
+ b &= mask;
+ b |= ((u32)new_base >> (32 - bits));
+ out_le32(old_base + MV64x60_INTERNAL_SPACE_DECODE, b);
+
+ __asm__ __volatile__("sync");
+
+ /* Wait for change to happen (in accordance with the manual) */
+ while (in_le32(new_base + MV64x60_INTERNAL_SPACE_DECODE) != b);
+ }
+}
+
+void __attribute__ ((weak))
+mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
+{
+}
+
+void *
+load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
+ void *ign1, void *ign2)
+{
+ mv64x60_move_base((void __iomem *)CONFIG_MV64X60_BASE,
+ (void __iomem *)CONFIG_MV64X60_NEW_BASE);
+ mv64x60_board_init((void __iomem *)CONFIG_MV64X60_BASE,
+ (void __iomem *)CONFIG_MV64X60_NEW_BASE);
+ return decompress_kernel(load_addr, num_words, cksum);
+}
diff -Nru a/arch/ppc/boot/simple/misc-radstone_ppc7d.c b/arch/ppc/boot/simple/misc-radstone_ppc7d.c
--- a/arch/ppc/boot/simple/misc-radstone_ppc7d.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/misc-radstone_ppc7d.c 2005-03-20 16:30:37 -08:00
@@ -7,13 +7,20 @@
*/
#include <linux/types.h>
-#include <asm/reg.h>
-
-#include "../../platforms/radstone_ppc7d.h"
+#include <platforms/radstone_ppc7d.h>
#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
-long mv64x60_mpsc_clk_freq = PPC7D_MPSC_CLK_FREQ;;
-long mv64x60_mpsc_clk_src = PPC7D_MPSC_CLK_SRC;
-long mv64x60_mpsc_console_baud = PPC7D_DEFAULT_BAUD;
+extern u32 mv64x60_console_baud;
+extern u32 mv64x60_mpsc_clk_src;
+extern u32 mv64x60_mpsc_clk_freq;
#endif
+void
+mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
+{
+#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
+ mv64x60_console_baud = PPC7D_DEFAULT_BAUD;
+ mv64x60_mpsc_clk_src = PPC7D_MPSC_CLK_SRC;
+ mv64x60_mpsc_clk_freq = PPC7D_MPSC_CLK_FREQ;
+#endif
+}
diff -Nru a/arch/ppc/boot/simple/mpc52xx_tty.c b/arch/ppc/boot/simple/mpc52xx_tty.c
--- a/arch/ppc/boot/simple/mpc52xx_tty.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/mpc52xx_tty.c 2005-03-20 16:30:37 -08:00
@@ -33,18 +33,19 @@
#error "MPC52xx_PF_CONSOLE_PORT not defined"
#endif
-static struct mpc52xx_psc *psc = (struct mpc52xx_psc *)MPC52xx_CONSOLE;
+static struct mpc52xx_psc __iomem *psc =
+ (struct mpc52xx_psc __iomem *) MPC52xx_CONSOLE;
/* The decrementer counts at the system bus clock frequency
* divided by four. The most accurate time base is connected to the
* rtc. We read the decrementer change during one rtc tick (one second)
* and multiply by 4 to get the system bus clock frequency.
*/
-int
+static int
mpc52xx_ipbfreq(void)
{
- struct mpc52xx_rtc *rtc = (struct mpc52xx_rtc*)MPC52xx_RTC;
- struct mpc52xx_cdm *cdm = (struct mpc52xx_cdm*)MPC52xx_CDM;
+ struct mpc52xx_rtc __iomem *rtc = (struct mpc52xx_rtc __iomem *)MPC52xx_RTC;
+ struct mpc52xx_cdm __iomem *cdm = (struct mpc52xx_cdm __iomem *)MPC52xx_CDM;
int current_time, previous_time;
int tbl_start, tbl_end;
int xlbfreq, ipbfreq;
@@ -67,7 +68,7 @@
unsigned long
serial_init(int ignored, void *ignored2)
{
- struct mpc52xx_gpio *gpio = (struct mpc52xx_gpio *)MPC52xx_GPIO;
+ struct mpc52xx_gpio __iomem *gpio = (struct mpc52xx_gpio __iomem *)MPC52xx_GPIO;
int divisor;
int mode1;
int mode2;
@@ -117,7 +118,7 @@
void
serial_putc(void *ignored, const char c)
{
- serial_init(0, 0);
+ serial_init(0, NULL);
while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP)) ;
out_8(&psc->mpc52xx_psc_buffer_8, c);
diff -Nru a/arch/ppc/boot/simple/mv64x60_stub.c b/arch/ppc/boot/simple/mv64x60_stub.c
--- a/arch/ppc/boot/simple/mv64x60_stub.c 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,24 +0,0 @@
-/*
- * arch/ppc/boot/simple/mv64x60_stub.c
- *
- * Stub for board_init() routine called from mv64x60_init().
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#include <linux/config.h>
-
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
-long __attribute__ ((weak)) mv64x60_console_baud = 9600;
-long __attribute__ ((weak)) mv64x60_mpsc_clk_src = 8; /* TCLK */
-long __attribute__ ((weak)) mv64x60_mpsc_clk_freq = 100000000;
-#endif
-
-void __attribute__ ((weak))
-mv64x60_board_init(void)
-{
-}
diff -Nru a/arch/ppc/boot/simple/mv64x60_tty.c b/arch/ppc/boot/simple/mv64x60_tty.c
--- a/arch/ppc/boot/simple/mv64x60_tty.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/boot/simple/mv64x60_tty.c 2005-03-20 16:30:37 -08:00
@@ -18,36 +18,18 @@
#include <linux/types.h>
#include <linux/serial_reg.h>
#include <asm/serial.h>
+#include <asm/io.h>
#include <asm/mv64x60_defs.h>
#include <mpsc_defs.h>
+u32 mv64x60_console_baud = 9600;
+u32 mv64x60_mpsc_clk_src = 8; /* TCLK */
+u32 mv64x60_mpsc_clk_freq = 100000000;
+
extern void udelay(long);
static void stop_dma(int chan);
-static u32 mv64x60_base = CONFIG_MV64X60_NEW_BASE;
-
-inline unsigned
-mv64x60_in_le32(volatile unsigned *addr)
-{
- unsigned ret;
-
- __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
- "r" (addr), "m" (*addr));
- return ret;
-}
-
-inline void
-mv64x60_out_le32(volatile unsigned *addr, int val)
-{
- __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
- "r" (val), "r" (addr));
-}
-
-#define MV64x60_REG_READ(offs) \
- (mv64x60_in_le32((volatile uint *)(mv64x60_base + (offs))))
-#define MV64x60_REG_WRITE(offs, d) \
- (mv64x60_out_le32((volatile uint *)(mv64x60_base + (offs)), (int)(d)))
-
+static void __iomem *mv64x60_base = (void __iomem *)CONFIG_MV64X60_NEW_BASE;
struct sdma_regs {
u32 sdc;
@@ -142,9 +124,6 @@
{
u32 mpsc_routing_base, sdma_base, brg_bcr, cdv;
int i;
- extern long mv64x60_console_baud;
- extern long mv64x60_mpsc_clk_src;
- extern long mv64x60_mpsc_clk_freq;
chan = (chan == 1); /* default to chan 0 if anything but 1 */
@@ -157,8 +136,7 @@
sdma_base = MV64x60_SDMA_0_OFFSET;
brg_bcr = MV64x60_BRG_0_OFFSET + BRG_BCR;
SDMA_REGS_INIT(&sdma_regs[0], MV64x60_SDMA_0_OFFSET);
- }
- else {
+ } else {
sdma_base = MV64x60_SDMA_1_OFFSET;
brg_bcr = MV64x60_BRG_1_OFFSET + BRG_BCR;
SDMA_REGS_INIT(&sdma_regs[0], MV64x60_SDMA_1_OFFSET);
@@ -186,10 +164,10 @@
td[chan][TX_NUM_DESC - 1].next_desc_ptr = (u32)&td[chan][0];
/* Set MPSC Routing */
- MV64x60_REG_WRITE(mpsc_routing_base + MPSC_MRR, 0x3ffffe38);
+ out_le32(mv64x60_base + mpsc_routing_base + MPSC_MRR, 0x3ffffe38);
#ifdef CONFIG_GT64260
- MV64x60_REG_WRITE(GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
+ out_le32(mv64x60_base + GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
#else /* Must be MV64360 or MV64460 */
{
u32 enables, prot_bits, v;
@@ -197,68 +175,70 @@
/* Set up comm unit to memory mapping windows */
/* Note: Assumes MV64x60_CPU2MEM_WINDOWS == 4 */
- enables = MV64x60_REG_READ(MV64360_CPU_BAR_ENABLE) & 0xf;
+ enables = in_le32(mv64x60_base + MV64360_CPU_BAR_ENABLE) & 0xf;
prot_bits = 0;
for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) {
if (!(enables & (1 << i))) {
- v = MV64x60_REG_READ(cpu2mem_tab[i][0]);
+ v = in_le32(mv64x60_base + cpu2mem_tab[i][0]);
v = ((v & 0xffff) << 16) | (dram_selects[i] << 8);
- MV64x60_REG_WRITE(com2mem_tab[i][0], v);
+ out_le32(mv64x60_base + com2mem_tab[i][0], v);
- v = MV64x60_REG_READ(cpu2mem_tab[i][1]);
+ v = in_le32(mv64x60_base + cpu2mem_tab[i][1]);
v = (v & 0xffff) << 16;
- MV64x60_REG_WRITE(com2mem_tab[i][1], v);
+ out_le32(mv64x60_base + com2mem_tab[i][1], v);
prot_bits |= (0x3 << (i << 1)); /* r/w access */
}
}
- MV64x60_REG_WRITE(MV64360_MPSC_0_REMAP, 0);
- MV64x60_REG_WRITE(MV64360_MPSC_1_REMAP, 0);
- MV64x60_REG_WRITE(MV64360_MPSC2MEM_ACC_PROT_0, prot_bits);
- MV64x60_REG_WRITE(MV64360_MPSC2MEM_ACC_PROT_1, prot_bits);
- MV64x60_REG_WRITE(MV64360_MPSC2MEM_BAR_ENABLE, enables);
+ out_le32(mv64x60_base + MV64360_MPSC_0_REMAP, 0);
+ out_le32(mv64x60_base + MV64360_MPSC_1_REMAP, 0);
+ out_le32(mv64x60_base + MV64360_MPSC2MEM_ACC_PROT_0, prot_bits);
+ out_le32(mv64x60_base + MV64360_MPSC2MEM_ACC_PROT_1, prot_bits);
+ out_le32(mv64x60_base + MV64360_MPSC2MEM_BAR_ENABLE, enables);
}
#endif
/* MPSC 0/1 Rx & Tx get clocks BRG0/1 */
- MV64x60_REG_WRITE(mpsc_routing_base + MPSC_RCRR, 0x00000100);
- MV64x60_REG_WRITE(mpsc_routing_base + MPSC_TCRR, 0x00000100);
+ out_le32(mv64x60_base + mpsc_routing_base + MPSC_RCRR, 0x00000100);
+ out_le32(mv64x60_base + mpsc_routing_base + MPSC_TCRR, 0x00000100);
/* clear pending interrupts */
- MV64x60_REG_WRITE(MV64x60_SDMA_INTR_OFFSET + SDMA_INTR_MASK, 0);
+ out_le32(mv64x60_base + MV64x60_SDMA_INTR_OFFSET + SDMA_INTR_MASK, 0);
- MV64x60_REG_WRITE(SDMA_SCRDP + sdma_base, &rd[chan][0]);
- MV64x60_REG_WRITE(SDMA_SCTDP + sdma_base, &td[chan][TX_NUM_DESC - 1]);
- MV64x60_REG_WRITE(SDMA_SFTDP + sdma_base, &td[chan][TX_NUM_DESC - 1]);
+ out_le32(mv64x60_base + SDMA_SCRDP + sdma_base, (int)&rd[chan][0]);
+ out_le32(mv64x60_base + SDMA_SCTDP + sdma_base,
+ (int)&td[chan][TX_NUM_DESC - 1]);
+ out_le32(mv64x60_base + SDMA_SFTDP + sdma_base,
+ (int)&td[chan][TX_NUM_DESC - 1]);
- MV64x60_REG_WRITE(SDMA_SDC + sdma_base,
+ out_le32(mv64x60_base + SDMA_SDC + sdma_base,
SDMA_SDC_RFT | SDMA_SDC_SFM | SDMA_SDC_BLMR | SDMA_SDC_BLMT |
(3 << 12));
cdv = ((mv64x60_mpsc_clk_freq/(32*mv64x60_console_baud))-1);
- MV64x60_REG_WRITE(brg_bcr,
+ out_le32(mv64x60_base + brg_bcr,
((mv64x60_mpsc_clk_src << 18) | (1 << 16) | cdv));
/* Put MPSC into UART mode, no null modem, 16x clock mode */
- MV64x60_REG_WRITE(MPSC_MMCRL + mpsc_base[chan], 0x000004c4);
- MV64x60_REG_WRITE(MPSC_MMCRH + mpsc_base[chan], 0x04400400);
+ out_le32(mv64x60_base + MPSC_MMCRL + mpsc_base[chan], 0x000004c4);
+ out_le32(mv64x60_base + MPSC_MMCRH + mpsc_base[chan], 0x04400400);
- MV64x60_REG_WRITE(MPSC_CHR_1 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_9 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_10 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_3 + mpsc_base[chan], 4);
- MV64x60_REG_WRITE(MPSC_CHR_4 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_5 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_6 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_7 + mpsc_base[chan], 0);
- MV64x60_REG_WRITE(MPSC_CHR_8 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_1 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_9 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_10 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_3 + mpsc_base[chan], 4);
+ out_le32(mv64x60_base + MPSC_CHR_4 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_5 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_6 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_7 + mpsc_base[chan], 0);
+ out_le32(mv64x60_base + MPSC_CHR_8 + mpsc_base[chan], 0);
/* 8 data bits, 1 stop bit */
- MV64x60_REG_WRITE(MPSC_MPCR + mpsc_base[chan], (3 << 12));
- MV64x60_REG_WRITE(SDMA_SDCM + sdma_base, SDMA_SDCM_ERD);
- MV64x60_REG_WRITE(MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_EH);
+ out_le32(mv64x60_base + MPSC_MPCR + mpsc_base[chan], (3 << 12));
+ out_le32(mv64x60_base + SDMA_SDCM + sdma_base, SDMA_SDCM_ERD);
+ out_le32(mv64x60_base + MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_EH);
udelay(100);
@@ -271,20 +251,19 @@
int i;
/* Abort MPSC Rx (aborting Tx messes things up) */
- MV64x60_REG_WRITE(MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_RA);
+ out_le32(mv64x60_base + MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_RA);
/* Abort SDMA Rx, Tx */
- MV64x60_REG_WRITE(sdma_regs[chan].sdcm, SDMA_SDCM_AR | SDMA_SDCM_STD);
+ out_le32(mv64x60_base + sdma_regs[chan].sdcm,
+ SDMA_SDCM_AR | SDMA_SDCM_STD);
for (i=0; i<MAX_RESET_WAIT; i++) {
- if ((MV64x60_REG_READ(sdma_regs[chan].sdcm) &
+ if ((in_le32(mv64x60_base + sdma_regs[chan].sdcm) &
(SDMA_SDCM_AR | SDMA_SDCM_AT)) == 0)
break;
udelay(100);
}
-
- return;
}
static int
@@ -293,7 +272,7 @@
int i;
for (i=0; i<MAX_TX_WAIT; i++) {
- if ((MV64x60_REG_READ(sdma_regs[chan].sdcm) &
+ if ((in_le32(mv64x60_base + sdma_regs[chan].sdcm) &
SDMA_SDCM_TXD) == 0)
break;
@@ -321,12 +300,11 @@
tdp->cmd_stat = SDMA_DESC_CMDSTAT_L | SDMA_DESC_CMDSTAT_F |
SDMA_DESC_CMDSTAT_O;
- MV64x60_REG_WRITE(sdma_regs[com_port].sctdp, tdp);
- MV64x60_REG_WRITE(sdma_regs[com_port].sftdp, tdp);
- MV64x60_REG_WRITE(sdma_regs[com_port].sdcm,
- MV64x60_REG_READ(sdma_regs[com_port].sdcm) | SDMA_SDCM_TXD);
-
- return;
+ out_le32(mv64x60_base + sdma_regs[com_port].sctdp, (int)tdp);
+ out_le32(mv64x60_base + sdma_regs[com_port].sftdp, (int)tdp);
+ out_le32(mv64x60_base + sdma_regs[com_port].sdcm,
+ in_le32(mv64x60_base + sdma_regs[com_port].sdcm) |
+ SDMA_SDCM_TXD);
}
unsigned char
@@ -366,8 +344,7 @@
if (++cur_rd[com_port] >= RX_NUM_DESC)
cur_rd[com_port] = 0;
rdp = (struct mv64x60_rx_desc *)rdp->next_desc_ptr;
- }
- else {
+ } else {
rc = 1;
break;
}
@@ -380,5 +357,4 @@
serial_close(unsigned long com_port)
{
stop_dma(com_port);
- return;
}
diff -Nru a/arch/ppc/configs/hdpu_defconfig b/arch/ppc/configs/hdpu_defconfig
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/configs/hdpu_defconfig 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,890 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.11
+# Wed Mar 16 12:43:19 2005
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_LOCK_KERNEL=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+# CONFIG_CPUSETS is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_STOP_MACHINE=y
+
+#
+# Processor
+#
+CONFIG_6xx=y
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+# CONFIG_E500 is not set
+CONFIG_ALTIVEC=y
+# CONFIG_TAU is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_PM is not set
+CONFIG_PPC_STD_MMU=y
+# CONFIG_NOT_COHERENT_CACHE is not set
+
+#
+# Platform options
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_APUS is not set
+# CONFIG_KATANA is not set
+# CONFIG_WILLOW is not set
+# CONFIG_CPCI690 is not set
+# CONFIG_PCORE is not set
+# CONFIG_POWERPMC250 is not set
+# CONFIG_CHESTNUT is not set
+# CONFIG_SPRUCE is not set
+CONFIG_HDPU=y
+# CONFIG_EV64260 is not set
+# CONFIG_LOPEC is not set
+# CONFIG_MCPN765 is not set
+# CONFIG_MVME5100 is not set
+# CONFIG_PPLUS is not set
+# CONFIG_PRPMC750 is not set
+# CONFIG_PRPMC800 is not set
+# CONFIG_SANDPOINT is not set
+# CONFIG_RADSTONE_PPC7D is not set
+# CONFIG_ADIR is not set
+# CONFIG_K2 is not set
+# CONFIG_PAL4 is not set
+# CONFIG_GEMINI is not set
+# CONFIG_EST8260 is not set
+# CONFIG_SBC82xx is not set
+# CONFIG_SBS8260 is not set
+# CONFIG_RPX8260 is not set
+# CONFIG_TQM8260 is not set
+# CONFIG_ADS8272 is not set
+# CONFIG_PQ2FADS is not set
+# CONFIG_LITE5200 is not set
+# CONFIG_MPC834x_SYS is not set
+CONFIG_MV64360=y
+CONFIG_MV64X60=y
+
+#
+# Set bridge options
+#
+CONFIG_MV64X60_BASE=0xf1000000
+CONFIG_MV64X60_NEW_BASE=0xf1000000
+# CONFIG_SMP is not set
+# CONFIG_IRQ_ALL_CPUS is not set
+# CONFIG_NR_CPUS is not set
+CONFIG_PREEMPT=y
+CONFIG_HIGHMEM=y
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="root=/dev/nfs ip=auto"
+
+#
+# Bus options
+#
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+CONFIG_ADVANCED_OPTIONS=y
+# CONFIG_HIGHMEM_START_BOOL is not set
+CONFIG_HIGHMEM_START=0xfe000000
+# CONFIG_LOWMEM_SIZE_BOOL is not set
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START_BOOL=y
+CONFIG_KERNEL_START=0x80000000
+# CONFIG_TASK_SIZE_BOOL is not set
+CONFIG_TASK_SIZE=0x80000000
+# CONFIG_BOOT_LOAD_BOOL is not set
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0xfc000000
+CONFIG_MTD_PHYSMAP_LEN=0x04000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=4
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+CONFIG_SCSI_AIC7XXX=y
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
+CONFIG_AIC7XXX_DEBUG_MASK=0
+# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=y
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_IP_TCPDIAG is not set
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+CONFIG_MV643XX_ETH=y
+CONFIG_MV643XX_ETH_0=y
+# CONFIG_MV643XX_ETH_1 is not set
+# CONFIG_MV643XX_ETH_2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_MPSC=y
+CONFIG_SERIAL_MPSC_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_NAND is not set
+# CONFIG_JFFS2_FS_NOR_ECC is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_DIRECTIO=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V4=y
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=15
+# CONFIG_SERIAL_TEXT_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
diff -Nru a/arch/ppc/configs/radstone_ppc7d_defconfig b/arch/ppc/configs/radstone_ppc7d_defconfig
--- a/arch/ppc/configs/radstone_ppc7d_defconfig 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/configs/radstone_ppc7d_defconfig 2005-03-20 16:30:37 -08:00
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc4
-# Thu Feb 24 21:26:04 2005
+# Linux kernel version: 2.6.11
+# Tue Mar 15 14:31:19 2005
#
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
@@ -29,13 +29,13 @@
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -45,6 +45,7 @@
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
#
# Loadable module support
@@ -71,6 +72,7 @@
# CONFIG_TAU is not set
# CONFIG_CPU_FREQ is not set
CONFIG_PPC_GEN550=y
+# CONFIG_PM is not set
CONFIG_PPC_STD_MMU=y
# CONFIG_NOT_COHERENT_CACHE is not set
@@ -107,6 +109,7 @@
# CONFIG_ADS8272 is not set
# CONFIG_PQ2FADS is not set
# CONFIG_LITE5200 is not set
+# CONFIG_MPC834x_SYS is not set
CONFIG_MV64360=y
CONFIG_MV64X60=y
@@ -138,10 +141,6 @@
# CONFIG_PCCARD is not set
#
-# PC-card bridges
-#
-
-#
# Advanced setup
#
CONFIG_ADVANCED_OPTIONS=y
@@ -171,8 +170,8 @@
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_PARTITIONS is not set
# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_PARTITIONS is not set
#
# User Modules And Translation Layers
@@ -490,7 +489,6 @@
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
CONFIG_E100=y
-# CONFIG_E100_NAPI is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
@@ -516,6 +514,10 @@
CONFIG_SK98LIN=y
# CONFIG_VIA_VELOCITY is not set
CONFIG_TIGON3=y
+CONFIG_MV643XX_ETH=y
+CONFIG_MV643XX_ETH_0=y
+CONFIG_MV643XX_ETH_1=y
+# CONFIG_MV643XX_ETH_2 is not set
#
# Ethernet (10000 Mbit)
@@ -573,19 +575,6 @@
# CONFIG_INPUT_EVBUG is not set
#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-
-#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
@@ -600,6 +589,18 @@
# CONFIG_INPUT_MISC is not set
#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
@@ -641,7 +642,6 @@
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
-CONFIG_MV64X60_WDT=y
#
# PCI-based Watchdog Cards
@@ -663,9 +663,97 @@
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_ISA is not set
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+CONFIG_I2C_MV64XXX=y
+
+#
+# Hardware Sensors Chip support
+#
+CONFIG_I2C_SENSOR=y
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+CONFIG_SENSORS_LM90=y
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+
+#
+# Other I2C Chip support
+#
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
#
# Dallas's 1-wire bus
@@ -705,13 +793,9 @@
#
# USB support
#
-# CONFIG_USB is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
+# CONFIG_USB is not set
#
# USB Gadget Support
@@ -851,7 +935,9 @@
#
# Kernel hacking
#
+# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
# CONFIG_SERIAL_TEXT_DEBUG is not set
#
diff -Nru a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
--- a/arch/ppc/kernel/setup.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/kernel/setup.c 2005-03-20 16:30:37 -08:00
@@ -338,14 +338,15 @@
of_show_percpuinfo(struct seq_file *m, int i)
{
struct device_node *cpu_node;
- int *fp, s;
+ u32 *fp;
+ int s;
cpu_node = find_type_devices("cpu");
if (!cpu_node)
return 0;
for (s = 0; s < i && cpu_node->next; s++)
cpu_node = cpu_node->next;
- fp = (int *) get_property(cpu_node, "clock-frequency", NULL);
+ fp = (u32 *)get_property(cpu_node, "clock-frequency", NULL);
if (fp)
seq_printf(m, "clock\t\t: %dMHz\n", *fp / 1000000);
return 0;
diff -Nru a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c 2005-03-20 16:30:37 -08:00
@@ -109,7 +109,7 @@
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
- pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+ pdata->board_flags = 0;
pdata->interruptPHY = MPC85xx_IRQ_EXT5;
pdata->phyid = 3;
/* fixup phy address */
diff -Nru a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
--- a/arch/ppc/platforms/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/Makefile 2005-03-20 16:30:37 -08:00
@@ -12,7 +12,8 @@
obj-$(CONFIG_PPC_PMAC) += pmac_pic.o pmac_setup.o pmac_time.o \
pmac_feature.o pmac_pci.o pmac_sleep.o \
pmac_low_i2c.o pmac_cache.o
-obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o
+obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o \
+ chrp_pegasos_eth.o
obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
ifeq ($(CONFIG_PPC_PMAC),y)
obj-$(CONFIG_NVRAM) += pmac_nvram.o
@@ -30,6 +31,7 @@
obj-$(CONFIG_K2) += k2.o
obj-$(CONFIG_LOPEC) += lopec.o
obj-$(CONFIG_KATANA) += katana.o
+obj-$(CONFIG_HDPU) += hdpu.o
obj-$(CONFIG_MCPN765) += mcpn765.o
obj-$(CONFIG_MENF1) += menf1_setup.o menf1_pci.o
obj-$(CONFIG_MVME5100) += mvme5100.o
diff -Nru a/arch/ppc/platforms/chrp_pegasos_eth.c b/arch/ppc/platforms/chrp_pegasos_eth.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/platforms/chrp_pegasos_eth.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,101 @@
+/*
+ * arch/ppc/platforms/chrp_pegasos_eth.c
+ *
+ * Copyright (C) 2005 Sven Luther <sl@bplan-gmbh.de>
+ * Thanks to :
+ * Dale Farnsworth <dale@farnsworth.org>
+ * Mark A. Greer <mgreer@mvista.com>
+ * Nicolas DET <nd@bplan-gmbh.de>
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ * And anyone else who helped me on this.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/mv643xx.h>
+#include <linux/pci.h>
+
+/* Pegasos 2 specific Marvell MV 64361 gigabit ethernet port setup */
+static struct resource mv643xx_eth_shared_resources[] = {
+ [0] = {
+ .name = "ethernet shared base",
+ .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
+ .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
+ MV643XX_ETH_SHARED_REGS_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device mv643xx_eth_shared_device = {
+ .name = MV643XX_ETH_SHARED_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
+ .resource = mv643xx_eth_shared_resources,
+};
+
+static struct resource mv643xx_eth0_resources[] = {
+ [0] = {
+ .name = "eth0 irq",
+ .start = 9,
+ .end = 9,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mv643xx_eth_platform_data eth0_pd;
+
+static struct platform_device eth0_device = {
+ .name = MV643XX_ETH_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(mv643xx_eth0_resources),
+ .resource = mv643xx_eth0_resources,
+ .dev = {
+ .platform_data = ð0_pd,
+ },
+};
+
+static struct resource mv643xx_eth1_resources[] = {
+ [0] = {
+ .name = "eth1 irq",
+ .start = 9,
+ .end = 9,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mv643xx_eth_platform_data eth1_pd;
+
+static struct platform_device eth1_device = {
+ .name = MV643XX_ETH_NAME,
+ .id = 1,
+ .num_resources = ARRAY_SIZE(mv643xx_eth1_resources),
+ .resource = mv643xx_eth1_resources,
+ .dev = {
+ .platform_data = ð1_pd,
+ },
+};
+
+static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
+ &mv643xx_eth_shared_device,
+ ð0_device,
+ ð1_device,
+};
+
+
+int
+mv643xx_eth_add_pds(void)
+{
+ int ret = 0;
+ static struct pci_device_id pci_marvell_mv64360[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64360) },
+ { }
+ };
+
+ if (pci_dev_present(pci_marvell_mv64360)) {
+ ret = platform_add_devices(mv643xx_eth_pd_devs, ARRAY_SIZE(mv643xx_eth_pd_devs));
+ }
+ return ret;
+}
+device_initcall(mv643xx_eth_add_pds);
diff -Nru a/arch/ppc/platforms/cpci690.c b/arch/ppc/platforms/cpci690.c
--- a/arch/ppc/platforms/cpci690.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/cpci690.c 2005-03-20 16:30:37 -08:00
@@ -60,8 +60,7 @@
const long min_idsel = 20, max_idsel = 20, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
- }
- else {
+ } else {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
@@ -79,18 +78,12 @@
}
static int
-cpci690_get_bus_speed(void)
-{
- return 133333333;
-}
-
-static int
cpci690_get_cpu_speed(void)
{
unsigned long hid1;
hid1 = mfspr(SPRN_HID1) >> 28;
- return cpci690_get_bus_speed() * cpu_7xx[hid1]/2;
+ return CPCI690_BUS_FREQ * cpu_7xx[hid1]/2;
}
#define KB (1024UL)
@@ -226,8 +219,6 @@
bh.hose_b->last_busno = 0xff;
bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b,
bh.hose_b->first_busno);
-
- return;
}
static void __init
@@ -285,8 +276,6 @@
/* Route MPP interrupt inputs to GPP */
mv64x60_write(&bh, MV64x60_MPP_CNTL_2, 0x00000000);
mv64x60_write(&bh, MV64x60_MPP_CNTL_3, 0x00000000);
-
- return;
}
static void __init
@@ -326,8 +315,6 @@
if (ppc_md.progress)
ppc_md.progress("cpci690_setup_arch: exit", 0);
-
- return;
}
/* Platform device data fixup routines. */
@@ -340,11 +327,9 @@
pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
pdata->max_idle = 40;
- pdata->default_baud = 9600;
- pdata->brg_clk_src = 8;
- pdata->brg_clk_freq = 133000000;
-
- return;
+ pdata->default_baud = CPCI690_MPSC_BAUD;
+ pdata->brg_clk_src = CPCI690_MPSC_CLK_SRC;
+ pdata->brg_clk_freq = CPCI690_BUS_FREQ;
}
static int __init
@@ -354,8 +339,8 @@
char *bus_id;
void ((*rtn)(struct platform_device *pdev));
} dev_map[] = {
- { MPSC_CTLR_NAME "0", cpci690_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME "1", cpci690_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".0", cpci690_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".1", cpci690_fixup_mpsc_pdata },
};
struct platform_device *pdev;
int i;
@@ -412,7 +397,7 @@
seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n");
seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n");
seq_printf(m, "cpu MHz\t\t: %d\n", cpci690_get_cpu_speed()/1000/1000);
- seq_printf(m, "bus MHz\t\t: %d\n", cpci690_get_bus_speed()/1000/1000);
+ seq_printf(m, "bus MHz\t\t: %d\n", CPCI690_BUS_FREQ/1000/1000);
return 0;
}
@@ -422,15 +407,13 @@
{
ulong freq;
- freq = cpci690_get_bus_speed()/4;
+ freq = CPCI690_BUS_FREQ / 4;
printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
freq/1000000, freq%1000000);
tb_ticks_per_jiffy = freq / HZ;
tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- return;
}
static __inline__ void
@@ -444,8 +427,6 @@
mtspr(SPRN_DBAT1U, addr | size | 0x2); /* Vs == 1; Vp == 0 */
mtspr(SPRN_DBAT1L, addr | 0x2a); /* WIMG bits == 0101; PP == r/w access */
mb();
-
- return;
}
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
@@ -507,6 +488,4 @@
#if defined(CONFIG_SERIAL_MPSC)
platform_notify = cpci690_platform_notify;
#endif
-
- return;
}
diff -Nru a/arch/ppc/platforms/cpci690.h b/arch/ppc/platforms/cpci690.h
--- a/arch/ppc/platforms/cpci690.h 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/cpci690.h 2005-03-20 16:30:37 -08:00
@@ -70,4 +70,9 @@
#define CPCI690_IPMI_SIZE max(GT64260_WINDOW_SIZE_MIN, \
CPCI690_IPMI_SIZE_ACTUAL)
+#define CPCI690_MPSC_BAUD 9600
+#define CPCI690_MPSC_CLK_SRC 8 /* TCLK */
+
+#define CPCI690_BUS_FREQ 133333333
+
#endif /* __PPC_PLATFORMS_CPCI690_H */
diff -Nru a/arch/ppc/platforms/ev64260.c b/arch/ppc/platforms/ev64260.c
--- a/arch/ppc/platforms/ev64260.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/ev64260.c 2005-03-20 16:30:37 -08:00
@@ -80,7 +80,7 @@
{
unsigned long pvr, hid1, pll_ext;
- pvr = SPRN_VER(mfspr(SPRN_PVR));
+ pvr = PVR_VER(mfspr(SPRN_PVR));
if (pvr != PVR_VER(PVR_7450)) {
hid1 = mfspr(SPRN_HID1) >> 28;
@@ -422,8 +422,8 @@
char *bus_id;
void ((*rtn)(struct platform_device *pdev));
} dev_map[] = {
- { MPSC_CTLR_NAME "0", ev64260_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME "1", ev64260_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".0", ev64260_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".1", ev64260_fixup_mpsc_pdata },
};
struct platform_device *pdev;
int i;
diff -Nru a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/platforms/hdpu.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,1072 @@
+
+/*
+ * arch/ppc/platforms/hdpu_setup.c
+ *
+ * Board setup routines for the Sky Computers HDPU Compute Blade.
+ *
+ * Written by Brian Waite <waite@skycomputers.com>
+ *
+ * Based on code done by - Mark A. Greer <mgreer@mvista.com>
+ * Rabeeh Khoury - rabeeh@galileo.co.il
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/ide.h>
+#include <linux/seq_file.h>
+
+#include <linux/initrd.h>
+#include <linux/root_dev.h>
+#include <linux/smp.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/todc.h>
+#include <asm/mv64x60.h>
+#include <asm/ppcboot.h>
+#include <platforms/hdpu.h>
+#include <linux/mv643xx.h>
+#include <linux/hdpu_features.h>
+#include <linux/device.h>
+#include <linux/mtd/physmap.h>
+
+#define BOARD_VENDOR "Sky Computers"
+#define BOARD_MACHINE "HDPU-CB-A"
+
+bd_t ppcboot_bd;
+int ppcboot_bd_valid = 0;
+
+static mv64x60_handle_t bh;
+
+extern char cmd_line[];
+
+unsigned long hdpu_find_end_of_memory(void);
+void hdpu_mpsc_progress(char *s, unsigned short hex);
+void hdpu_heartbeat(void);
+
+static void parse_bootinfo(unsigned long r3,
+ unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7);
+static void hdpu_set_l1pe(void);
+static void hdpu_cpustate_set(unsigned char new_state);
+static void hdpu_cpustate_set(unsigned char new_state);
+#ifdef CONFIG_SMP
+static spinlock_t timebase_lock = SPIN_LOCK_UNLOCKED;
+static unsigned int timebase_upper = 0, timebase_lower = 0;
+extern int smp_tb_synchronized;
+
+void __devinit hdpu_tben_give(void);
+void __devinit hdpu_tben_take(void);
+#endif
+
+static int __init
+hdpu_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+ struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
+
+ if (hose->index == 0) {
+ static char pci_irq_table[][4] = {
+ {HDPU_PCI_0_IRQ, 0, 0, 0},
+ {HDPU_PCI_0_IRQ, 0, 0, 0},
+ };
+
+ const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+ } else {
+ static char pci_irq_table[][4] = {
+ {HDPU_PCI_1_IRQ, 0, 0, 0},
+ };
+
+ const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+ }
+}
+
+static void __init hdpu_intr_setup(void)
+{
+ mv64x60_write(&bh, MV64x60_GPP_IO_CNTL,
+ (1 | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
+ (1 << 6) | (1 << 7) | (1 << 12) | (1 << 16) |
+ (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21) |
+ (1 << 22) | (1 << 23) | (1 << 24) | (1 << 25) |
+ (1 << 26) | (1 << 27) | (1 << 28) | (1 << 29)));
+
+ /* XXXX Erranum FEr PCI-#8 */
+ mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1 << 5) | (1 << 9));
+ mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1 << 5) | (1 << 9));
+
+ /*
+ * Dismiss and then enable interrupt on GPP interrupt cause
+ * for CPU #0
+ */
+ mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~((1 << 8) | (1 << 13)));
+ mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, (1 << 8) | (1 << 13));
+
+ /*
+ * Dismiss and then enable interrupt on CPU #0 high cause reg
+ * BIT25 summarizes GPP interrupts 8-15
+ */
+ mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1 << 25));
+}
+
+static void __init hdpu_setup_peripherals(void)
+{
+ unsigned int val;
+
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
+ HDPU_EMB_FLASH_BASE, HDPU_EMB_FLASH_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
+
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN,
+ HDPU_TBEN_BASE, HDPU_TBEN_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
+
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
+ HDPU_NEXUS_ID_BASE, HDPU_NEXUS_ID_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
+
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
+ HDPU_INTERNAL_SRAM_BASE,
+ HDPU_INTERNAL_SRAM_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
+
+ bh.ci->disable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN);
+ mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN, 0, 0, 0);
+
+ mv64x60_clr_bits(&bh, MV64x60_PCI0_PCI_DECODE_CNTL, (1 << 3));
+ mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3));
+ mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
+ ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24)));
+
+ /* Enable pipelining */
+ mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1 << 13));
+ /* Enable Snoop Pipelineing */
+ mv64x60_set_bits(&bh, MV64360_D_UNIT_CONTROL_HIGH, (1 << 24));
+
+ /*
+ * Change DRAM read buffer assignment.
+ * Assign read buffer 0 dedicated only for CPU,
+ * and the rest read buffer 1.
+ */
+ val = mv64x60_read(&bh, MV64360_SDRAM_CONFIG);
+ val = val & 0x03ffffff;
+ val = val | 0xf8000000;
+ mv64x60_write(&bh, MV64360_SDRAM_CONFIG, val);
+
+ /*
+ * Configure internal SRAM -
+ * Cache coherent write back, if CONFIG_MV64360_SRAM_CACHE_COHERENT set
+ * Parity enabled.
+ * Parity error propagation
+ * Arbitration not parked for CPU only
+ * Other bits are reserved.
+ */
+#ifdef CONFIG_MV64360_SRAM_CACHE_COHERENT
+ mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2);
+#else
+ mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b0);
+#endif
+
+ hdpu_intr_setup();
+}
+
+static void __init hdpu_setup_bridge(void)
+{
+ struct mv64x60_setup_info si;
+ int i;
+
+ memset(&si, 0, sizeof(si));
+
+ si.phys_reg_base = HDPU_BRIDGE_REG_BASE;
+ si.pci_0.enable_bus = 1;
+ si.pci_0.pci_io.cpu_base = HDPU_PCI0_IO_START_PROC_ADDR;
+ si.pci_0.pci_io.pci_base_hi = 0;
+ si.pci_0.pci_io.pci_base_lo = HDPU_PCI0_IO_START_PCI_ADDR;
+ si.pci_0.pci_io.size = HDPU_PCI0_IO_SIZE;
+ si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
+ si.pci_0.pci_mem[0].cpu_base = HDPU_PCI0_MEM_START_PROC_ADDR;
+ si.pci_0.pci_mem[0].pci_base_hi = HDPU_PCI0_MEM_START_PCI_HI_ADDR;
+ si.pci_0.pci_mem[0].pci_base_lo = HDPU_PCI0_MEM_START_PCI_LO_ADDR;
+ si.pci_0.pci_mem[0].size = HDPU_PCI0_MEM_SIZE;
+ si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
+ si.pci_0.pci_cmd_bits = 0;
+ si.pci_0.latency_timer = 0x80;
+
+ si.pci_1.enable_bus = 1;
+ si.pci_1.pci_io.cpu_base = HDPU_PCI1_IO_START_PROC_ADDR;
+ si.pci_1.pci_io.pci_base_hi = 0;
+ si.pci_1.pci_io.pci_base_lo = HDPU_PCI1_IO_START_PCI_ADDR;
+ si.pci_1.pci_io.size = HDPU_PCI1_IO_SIZE;
+ si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
+ si.pci_1.pci_mem[0].cpu_base = HDPU_PCI1_MEM_START_PROC_ADDR;
+ si.pci_1.pci_mem[0].pci_base_hi = HDPU_PCI1_MEM_START_PCI_HI_ADDR;
+ si.pci_1.pci_mem[0].pci_base_lo = HDPU_PCI1_MEM_START_PCI_LO_ADDR;
+ si.pci_1.pci_mem[0].size = HDPU_PCI1_MEM_SIZE;
+ si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
+ si.pci_1.pci_cmd_bits = 0;
+ si.pci_1.latency_timer = 0x80;
+
+ for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) {
+#if defined(CONFIG_NOT_COHERENT_CACHE)
+ si.cpu_prot_options[i] = 0;
+ si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
+ si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
+ si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
+
+ si.pci_1.acc_cntl_options[i] =
+ MV64360_PCI_ACC_CNTL_SNOOP_NONE |
+ MV64360_PCI_ACC_CNTL_SWAP_NONE |
+ MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
+ MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+
+ si.pci_0.acc_cntl_options[i] =
+ MV64360_PCI_ACC_CNTL_SNOOP_NONE |
+ MV64360_PCI_ACC_CNTL_SWAP_NONE |
+ MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
+ MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+
+#else
+ si.cpu_prot_options[i] = 0;
+ si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB; /* errata */
+ si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB; /* errata */
+ si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB; /* errata */
+
+ si.pci_0.acc_cntl_options[i] =
+ MV64360_PCI_ACC_CNTL_SNOOP_WB |
+ MV64360_PCI_ACC_CNTL_SWAP_NONE |
+ MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
+ MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+
+ si.pci_1.acc_cntl_options[i] =
+ MV64360_PCI_ACC_CNTL_SNOOP_WB |
+ MV64360_PCI_ACC_CNTL_SWAP_NONE |
+ MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
+ MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+#endif
+ }
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_PCI);
+
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_PCI);
+
+ /* Lookup PCI host bridges */
+ mv64x60_init(&bh, &si);
+ pci_dram_offset = 0; /* System mem at same addr on PCI & cpu bus */
+ ppc_md.pci_swizzle = common_swizzle;
+ ppc_md.pci_map_irq = hdpu_map_irq;
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_REG);
+
+ ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_REG);
+ /*
+ * Enabling of PCI internal-vs-external arbitration
+ * is a platform- and errata-dependent decision.
+ */
+ return;
+}
+
+#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
+static void __init hdpu_early_serial_map(void)
+{
+#ifdef CONFIG_KGDB
+ static char first_time = 1;
+
+#if defined(CONFIG_KGDB_TTYS0)
+#define KGDB_PORT 0
+#elif defined(CONFIG_KGDB_TTYS1)
+#define KGDB_PORT 1
+#else
+#error "Invalid kgdb_tty port"
+#endif
+
+ if (first_time) {
+ gt_early_mpsc_init(KGDB_PORT,
+ B9600 | CS8 | CREAD | HUPCL | CLOCAL);
+ first_time = 0;
+ }
+
+ return;
+#endif
+}
+#endif
+
+static void hdpu_init2(void)
+{
+ return;
+}
+
+#if defined(CONFIG_MV643XX_ETH)
+static void __init hdpu_fixup_eth_pdata(struct platform_device *pd)
+{
+
+ struct mv643xx_eth_platform_data *eth_pd;
+ eth_pd = pd->dev.platform_data;
+
+ eth_pd->port_serial_control =
+ mv64x60_read(&bh, MV643XX_ETH_PORT_SERIAL_CONTROL_REG(pd->id) & ~1);
+
+ eth_pd->force_phy_addr = 1;
+ eth_pd->phy_addr = pd->id;
+ eth_pd->tx_queue_size = 400;
+ eth_pd->rx_queue_size = 800;
+}
+#endif
+
+static void __init hdpu_fixup_mpsc_pdata(struct platform_device *pd)
+{
+
+ struct mpsc_pdata *pdata;
+
+ pdata = (struct mpsc_pdata *)pd->dev.platform_data;
+
+ pdata->max_idle = 40;
+ if (ppcboot_bd_valid)
+ pdata->default_baud = ppcboot_bd.bi_baudrate;
+ else
+ pdata->default_baud = HDPU_DEFAULT_BAUD;
+#if defined(CONFIG_HDPU_FEATURES)
+static void __init hdpu_fixup_cpustate_pdata(struct platform_device *pd)
+{
+ struct platform_device *pds[1];
+ pds[0] = pd;
+ mv64x60_pd_fixup(&bh, pds, 1);
+}
+#endif
+
+ pdata->brg_clk_src = HDPU_MPSC_CLK_SRC;
+ pdata->brg_clk_freq = HDPU_MPSC_CLK_FREQ;
+}
+
+static int __init hdpu_platform_notify(struct device *dev)
+{
+ static struct {
+ char *bus_id;
+ void ((*rtn) (struct platform_device * pdev));
+ } dev_map[] = {
+ {
+ MPSC_CTLR_NAME ".0", hdpu_fixup_mpsc_pdata},
+#if defined(CONFIG_HDPU_FEATURES)
+ {
+ HDPU_CPUSTATE_NAME ".0", hdpu_fixup_cpustate_pdata},
+#endif
+#if defined(CONFIG_MV643XX_ETH)
+ {
+ MV643XX_ETH_NAME ".0", hdpu_fixup_eth_pdata},
+#endif
+ };
+ struct platform_device *pdev;
+ int i;
+
+ if (dev && dev->bus_id)
+ for (i = 0; i < ARRAY_SIZE(dev_map); i++)
+ if (!strncmp(dev->bus_id, dev_map[i].bus_id,
+ BUS_ID_SIZE)) {
+
+ pdev = container_of(dev,
+ struct platform_device,
+ dev);
+ dev_map[i].rtn(pdev);
+ }
+
+ return 0;
+}
+
+static void __init hdpu_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("hdpu_setup_arch: enter", 0);
+#ifdef CONFIG_BLK_DEV_INITRD
+ if (initrd_start)
+ ROOT_DEV = Root_RAM0;
+ else
+#endif
+#ifdef CONFIG_ROOT_NFS
+ ROOT_DEV = Root_NFS;
+#else
+ ROOT_DEV = Root_SDA2;
+#endif
+
+ ppc_md.heartbeat = hdpu_heartbeat;
+
+ ppc_md.heartbeat_reset = HZ;
+ ppc_md.heartbeat_count = 1;
+
+ if (ppc_md.progress)
+ ppc_md.progress("hdpu_setup_arch: Enabling L2 cache", 0);
+
+ /* Enable L1 Parity Bits */
+ hdpu_set_l1pe();
+
+ /* Enable L2 and L3 caches (if 745x) */
+ _set_L2CR(0x80080000);
+
+ if (ppc_md.progress)
+ ppc_md.progress("hdpu_setup_arch: enter", 0);
+
+ hdpu_setup_bridge();
+
+ hdpu_setup_peripherals();
+
+#ifdef CONFIG_SERIAL_MPSC_CONSOLE
+ hdpu_early_serial_map();
+#endif
+
+ printk("SKY HDPU Compute Blade \n");
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_OK);
+
+ if (ppc_md.progress)
+ ppc_md.progress("hdpu_setup_arch: exit", 0);
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_OK);
+ return;
+}
+static void __init hdpu_init_irq(void)
+{
+ mv64360_init_irq();
+}
+
+static void __init hdpu_set_l1pe()
+{
+ unsigned long ictrl;
+ asm volatile ("mfspr %0, 1011":"=r" (ictrl):);
+ ictrl |= ICTRL_EICE | ICTRL_EDC | ICTRL_EICP;
+ asm volatile ("mtspr 1011, %0"::"r" (ictrl));
+}
+
+/*
+ * Set BAT 1 to map 0xf1000000 to end of physical memory space.
+ */
+static __inline__ void hdpu_set_bat(void)
+{
+ mb();
+ mtspr(SPRN_DBAT1U, 0xf10001fe);
+ mtspr(SPRN_DBAT1L, 0xf100002a);
+ mb();
+
+ return;
+}
+
+unsigned long __init hdpu_find_end_of_memory(void)
+{
+ return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
+ MV64x60_TYPE_MV64360);
+}
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_RESET);
+
+
+static void hdpu_reset_board(void)
+{
+ volatile int infinite = 1;
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_RESET);
+
+ local_irq_disable();
+
+ /* Clear all the LEDs */
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, ((1 << 4) |
+ (1 << 5) | (1 << 6)));
+
+ /* disable and invalidate the L2 cache */
+ _set_L2CR(0);
+ _set_L2CR(0x200000);
+
+ /* flush and disable L1 I/D cache */
+ __asm__ __volatile__
+ ("\n"
+ "mfspr 3,1008\n"
+ "ori 5,5,0xcc00\n"
+ "ori 4,3,0xc00\n"
+ "andc 5,3,5\n"
+ "sync\n"
+ "mtspr 1008,4\n"
+ "isync\n" "sync\n" "mtspr 1008,5\n" "isync\n" "sync\n");
+
+ /* Hit the reset bit */
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (1 << 3));
+
+ while (infinite)
+ infinite = infinite;
+
+ return;
+}
+
+static void hdpu_restart(char *cmd)
+{
+ volatile ulong i = 10000000;
+
+ hdpu_reset_board();
+
+ while (i-- > 0) ;
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_HALT);
+
+ panic("restart failed\n");
+}
+
+static void hdpu_halt(void)
+{
+ local_irq_disable();
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_HALT);
+
+ /* Clear all the LEDs */
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, ((1 << 4) | (1 << 5) |
+ (1 << 6)));
+ while (1) ;
+ /* NOTREACHED */
+}
+
+static void hdpu_power_off(void)
+{
+ hdpu_halt();
+ /* NOTREACHED */
+}
+
+static int hdpu_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid;
+
+ pvid = mfspr(SPRN_PVR);
+ seq_printf(m, "vendor\t\t: Sky Computers\n");
+ seq_printf(m, "machine\t\t: HDPU Compute Blade\n");
+ seq_printf(m, "PVID\t\t: 0x%x, vendor: %s\n",
+ pvid, (pvid & (1 << 15) ? "IBM" : "Motorola"));
+
+ return 0;
+}
+
+static void __init hdpu_calibrate_decr(void)
+{
+ ulong freq;
+
+ if (ppcboot_bd_valid)
+ freq = ppcboot_bd.bi_busfreq / 4;
+ else
+ freq = 133000000;
+
+ printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
+ freq / 1000000, freq % 1000000);
+
+ tb_ticks_per_jiffy = freq / HZ;
+ tb_to_us = mulhwu_scale_factor(freq, 1000000);
+
+ return;
+}
+
+static void parse_bootinfo(unsigned long r3,
+ unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ bd_t *bd = NULL;
+ char *cmdline_start = NULL;
+ int cmdline_len = 0;
+
+ if (r3) {
+ if ((r3 & 0xf0000000) == 0)
+ r3 += KERNELBASE;
+ if ((r3 & 0xf0000000) == KERNELBASE) {
+ bd = (void *)r3;
+
+ memcpy(&ppcboot_bd, bd, sizeof(ppcboot_bd));
+ ppcboot_bd_valid = 1;
+ }
+ }
+#ifdef CONFIG_BLK_DEV_INITRD
+ if (r4 && r5 && r5 > r4) {
+ if ((r4 & 0xf0000000) == 0)
+ r4 += KERNELBASE;
+ if ((r5 & 0xf0000000) == 0)
+ r5 += KERNELBASE;
+ if ((r4 & 0xf0000000) == KERNELBASE) {
+ initrd_start = r4;
+ initrd_end = r5;
+ initrd_below_start_ok = 1;
+ }
+ }
+#endif /* CONFIG_BLK_DEV_INITRD */
+
+ if (r6 && r7 && r7 > r6) {
+ if ((r6 & 0xf0000000) == 0)
+ r6 += KERNELBASE;
+ if ((r7 & 0xf0000000) == 0)
+ r7 += KERNELBASE;
+ if ((r6 & 0xf0000000) == KERNELBASE) {
+ cmdline_start = (void *)r6;
+ cmdline_len = (r7 - r6);
+ strncpy(cmd_line, cmdline_start, cmdline_len);
+ }
+ }
+}
+
+#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
+static int hdpu_ide_check_region(ide_ioreg_t from, unsigned int extent)
+{
+ return check_region(from, extent);
+}
+
+static void
+hdpu_ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
+{
+ request_region(from, extent, name);
+ return;
+}
+
+static void hdpu_ide_release_region(ide_ioreg_t from, unsigned int extent)
+{
+ release_region(from, extent);
+ return;
+}
+
+static void __init
+hdpu_ide_pci_init_hwif_ports(hw_regs_t * hw, ide_ioreg_t data_port,
+ ide_ioreg_t ctrl_port, int *irq)
+{
+ struct pci_dev *dev;
+
+ pci_for_each_dev(dev) {
+ if (((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) ||
+ ((dev->class >> 8) == PCI_CLASS_STORAGE_RAID)) {
+ hw->irq = dev->irq;
+
+ if (irq != NULL) {
+ *irq = dev->irq;
+ }
+ }
+ }
+
+ return;
+}
+#endif
+
+void hdpu_heartbeat(void)
+{
+ if (mv64x60_read(&bh, MV64x60_GPP_VALUE) & (1 << 5))
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (1 << 5));
+ else
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_SET, (1 << 5));
+
+ ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
+
+}
+
+static void __init hdpu_map_io(void)
+{
+ io_block_mapping(0xf1000000, 0xf1000000, 0x20000, _PAGE_IO);
+}
+
+#ifdef CONFIG_SMP
+char hdpu_smp0[] = "SMP Cpu #0";
+char hdpu_smp1[] = "SMP Cpu #1";
+
+static irqreturn_t hdpu_smp_cpu0_int_handler(int irq, void *dev_id,
+ struct pt_regs *regs)
+{
+ volatile unsigned int doorbell;
+
+ doorbell = mv64x60_read(&bh, MV64360_CPU0_DOORBELL);
+
+ /* Ack the doorbell interrupts */
+ mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, doorbell);
+
+ if (doorbell & 1) {
+ smp_message_recv(0, regs);
+ }
+ if (doorbell & 2) {
+ smp_message_recv(1, regs);
+ }
+ if (doorbell & 4) {
+ smp_message_recv(2, regs);
+ }
+ if (doorbell & 8) {
+ smp_message_recv(3, regs);
+ }
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t hdpu_smp_cpu1_int_handler(int irq, void *dev_id,
+ struct pt_regs *regs)
+{
+ volatile unsigned int doorbell;
+
+ doorbell = mv64x60_read(&bh, MV64360_CPU1_DOORBELL);
+
+ /* Ack the doorbell interrupts */
+ mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, doorbell);
+
+ if (doorbell & 1) {
+ smp_message_recv(0, regs);
+ }
+ if (doorbell & 2) {
+ smp_message_recv(1, regs);
+ }
+ if (doorbell & 4) {
+ smp_message_recv(2, regs);
+ }
+ if (doorbell & 8) {
+ smp_message_recv(3, regs);
+ }
+ return IRQ_HANDLED;
+}
+
+static void smp_hdpu_CPU_two(void)
+{
+ __asm__ __volatile__
+ ("\n"
+ "lis 3,0x0000\n"
+ "ori 3,3,0x00c0\n"
+ "mtspr 26, 3\n" "li 4,0\n" "mtspr 27,4\n" "rfi");
+
+}
+
+static int smp_hdpu_probe(void)
+{
+ int *cpu_count_reg;
+ int num_cpus = 0;
+
+ cpu_count_reg = ioremap(HDPU_NEXUS_ID_BASE, HDPU_NEXUS_ID_SIZE);
+ if (cpu_count_reg) {
+ num_cpus = (*cpu_count_reg >> 20) & 0x3;
+ iounmap(cpu_count_reg);
+ }
+
+ /* Validate the bits in the CPLD. If we could not map the reg, return 2.
+ * If the register reported 0 or 3, return 2.
+ * Older CPLD revisions set these bits to all ones (val = 3).
+ */
+ if ((num_cpus < 1) || (num_cpus > 2)) {
+ printk
+ ("Unable to determine the number of processors %d . deafulting to 2.\n",
+ num_cpus);
+ num_cpus = 2;
+ }
+ return num_cpus;
+}
+
+static void
+smp_hdpu_message_pass(int target, int msg, unsigned long data, int wait)
+{
+ if (msg > 0x3) {
+ printk("SMP %d: smp_message_pass: unknown msg %d\n",
+ smp_processor_id(), msg);
+ return;
+ }
+ switch (target) {
+ case MSG_ALL:
+ mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg);
+ mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg);
+ break;
+ case MSG_ALL_BUT_SELF:
+ if (smp_processor_id())
+ mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg);
+ else
+ mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg);
+ break;
+ default:
+ if (target == 0)
+ mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg);
+ else
+ mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg);
+ break;
+ }
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_CPU1_KICK);
+
+}
+
+static void smp_hdpu_kick_cpu(int nr)
+{
+ volatile unsigned int *bootaddr;
+
+ if (ppc_md.progress)
+ ppc_md.progress("smp_hdpu_kick_cpu", 0);
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_CPU1_KICK);
+
+ /* Disable BootCS. Must also reduce the windows size to zero. */
+ bh.ci->disable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, 0, 0, 0);
+
+ bootaddr = ioremap(HDPU_INTERNAL_SRAM_BASE, HDPU_INTERNAL_SRAM_SIZE);
+ if (!bootaddr) {
+ if (ppc_md.progress)
+ ppc_md.progress("smp_hdpu_kick_cpu: ioremap failed", 0);
+ return;
+ }
+
+ memcpy((void *)(bootaddr + 0x40), (void *)&smp_hdpu_CPU_two, 0x20);
+
+ /* map SRAM to 0xfff00000 */
+ bh.ci->disable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
+
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
+ 0xfff00000, HDPU_INTERNAL_SRAM_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
+
+ /* Enable CPU1 arbitration */
+ mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1 << 9));
+
+ /*
+ * Wait 100mSecond until other CPU has reached __secondary_start.
+ * When it reaches, it is permittable to rever the SRAM mapping etc...
+ */
+ mdelay(100);
+ *(unsigned long *)KERNELBASE = nr;
+ asm volatile ("dcbf 0,%0"::"r" (KERNELBASE):"memory");
+
+ iounmap(bootaddr);
+
+ /* Set up window for internal sram (256KByte insize) */
+ bh.ci->disable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
+ HDPU_INTERNAL_SRAM_BASE,
+ HDPU_INTERNAL_SRAM_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
+ /*
+ * Set up windows for embedded FLASH (using boot CS window).
+ */
+
+ bh.ci->disable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
+ mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
+ HDPU_EMB_FLASH_BASE, HDPU_EMB_FLASH_SIZE, 0);
+ bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
+}
+
+static void smp_hdpu_setup_cpu(int cpu_nr)
+{
+ if (cpu_nr == 0) {
+ if (ppc_md.progress)
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR |
+ CPUSTATE_KERNEL_CPU1_OK);
+
+ ppc_md.progress("smp_hdpu_setup_cpu 0", 0);
+ mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff);
+ mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff);
+ request_irq(60, hdpu_smp_cpu0_int_handler,
+ SA_INTERRUPT, hdpu_smp0, 0);
+ }
+
+ if (cpu_nr == 1) {
+ if (ppc_md.progress)
+ ppc_md.progress("smp_hdpu_setup_cpu 1", 0);
+
+ hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR |
+ CPUSTATE_KERNEL_CPU1_OK);
+
+ /* Enable L1 Parity Bits */
+ hdpu_set_l1pe();
+
+ /* Enable L2 cache */
+ _set_L2CR(0);
+ _set_L2CR(0x80080000);
+
+ mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0);
+ mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff);
+ request_irq(28, hdpu_smp_cpu1_int_handler,
+ SA_INTERRUPT, hdpu_smp1, 0);
+ }
+
+}
+
+void __devinit hdpu_tben_give()
+{
+ volatile unsigned long *val = 0;
+
+ /* By writing 0 to the TBEN_BASE, the timebases is frozen */
+ val = ioremap(HDPU_TBEN_BASE, 4);
+ *val = 0;
+ mb();
+
+ spin_lock(&timebase_lock);
+ timebase_upper = get_tbu();
+ timebase_lower = get_tbl();
+ spin_unlock(&timebase_lock);
+
+ while (timebase_upper || timebase_lower)
+ barrier();
+
+ /* By writing 1 to the TBEN_BASE, the timebases is thawed */
+ *val = 1;
+ mb();
+
+ iounmap(val);
+
+}
+
+void __devinit hdpu_tben_take()
+{
+ while (!(timebase_upper || timebase_lower))
+ barrier();
+
+ spin_lock(&timebase_lock);
+ set_tb(timebase_upper, timebase_lower);
+ timebase_upper = 0;
+ timebase_lower = 0;
+ spin_unlock(&timebase_lock);
+}
+
+static struct smp_ops_t hdpu_smp_ops = {
+ .message_pass = smp_hdpu_message_pass,
+ .probe = smp_hdpu_probe,
+ .kick_cpu = smp_hdpu_kick_cpu,
+ .setup_cpu = smp_hdpu_setup_cpu,
+ .give_timebase = hdpu_tben_give,
+ .take_timebase = hdpu_tben_take,
+};
+#endif /* CONFIG_SMP */
+
+void __init
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ parse_bootinfo(r3, r4, r5, r6, r7);
+
+ isa_mem_base = 0;
+
+ ppc_md.setup_arch = hdpu_setup_arch;
+ ppc_md.init = hdpu_init2;
+ ppc_md.show_cpuinfo = hdpu_show_cpuinfo;
+ ppc_md.init_IRQ = hdpu_init_irq;
+ ppc_md.get_irq = mv64360_get_irq;
+ ppc_md.restart = hdpu_restart;
+ ppc_md.power_off = hdpu_power_off;
+ ppc_md.halt = hdpu_halt;
+ ppc_md.find_end_of_memory = hdpu_find_end_of_memory;
+ ppc_md.calibrate_decr = hdpu_calibrate_decr;
+ ppc_md.setup_io_mappings = hdpu_map_io;
+
+ bh.p_base = CONFIG_MV64X60_NEW_BASE;
+ bh.v_base = (unsigned long *)bh.p_base;
+
+ hdpu_set_bat();
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG)
+ ppc_md.progress = hdpu_mpsc_progress; /* embedded UART */
+ mv64x60_progress_init(bh.p_base);
+#endif /* CONFIG_SERIAL_TEXT_DEBUG */
+
+#ifdef CONFIG_SMP
+ ppc_md.smp_ops = &hdpu_smp_ops;
+#endif /* CONFIG_SMP */
+
+#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
+ platform_notify = hdpu_platform_notify;
+#endif
+ return;
+static void hdpu_cpustate_set(unsigned char new_state)
+{
+ unsigned int state = (new_state << 21);
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (0xff << 21));
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, state);
+}
+
+}
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
+/* SMP safe version of the serial text debug routine. Uses Semaphore 0 */
+void hdpu_mpsc_progress(char *s, unsigned short hex)
+{
+ while (mv64x60_read(&bh, MV64360_WHO_AM_I) !=
+ mv64x60_read(&bh, MV64360_SEMAPHORE_0)) {
+ }
+ mv64x60_mpsc_progress(s, hex);
+ mv64x60_write(&bh, MV64360_SEMAPHORE_0, 0xff);
+}
+#endif
+
+static void hdpu_cpustate_set(unsigned char new_state)
+{
+ unsigned int state = (new_state << 21);
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (0xff << 21));
+ mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, state);
+}
+
+#ifdef CONFIG_MTD_PHYSMAP
+static struct mtd_partition hdpu_partitions[] = {
+ {
+ .name = "Root FS",
+ .size = 0x03400000,
+ .offset = 0,
+ .mask_flags = 0,
+ },{
+ .name = "User FS",
+ .size = 0x00800000,
+ .offset = 0x03400000,
+ .mask_flags = 0,
+ },{
+ .name = "Kernel Image",
+ .size = 0x002C0000,
+ .offset = 0x03C00000,
+ .mask_flags = 0,
+ },{
+ .name = "bootEnv",
+#ifdef CONFIG_HDPU_FEATURES
+
+static struct resource hdpu_cpustate_resources[] = {
+ [0] = {
+ .name = "addr base",
+ .start = MV64x60_GPP_VALUE_SET,
+ .end = MV64x60_GPP_VALUE_CLR + 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct resource hdpu_nexus_resources[] = {
+ [0] = {
+ .name = "nexus register",
+ .start = HDPU_NEXUS_ID_BASE,
+ .end = HDPU_NEXUS_ID_BASE + HDPU_NEXUS_ID_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device hdpu_cpustate_device = {
+ .name = HDPU_CPUSTATE_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(hdpu_cpustate_resources),
+ .resource = hdpu_cpustate_resources,
+};
+
+static struct platform_device hdpu_nexus_device = {
+ .name = HDPU_NEXUS_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(hdpu_nexus_resources),
+ .resource = hdpu_nexus_resources,
+};
+
+static int __init hdpu_add_pds(void)
+{
+ platform_device_register(&hdpu_cpustate_device);
+ platform_device_register(&hdpu_nexus_device);
+ return 0;
+}
+
+arch_initcall(hdpu_add_pds);
+#endif
+ .size = 0x00040000,
+ .offset = 0x03EC0000,
+ .mask_flags = 0,
+ },{
+ .name = "bootROM",
+ .size = 0x00100000,
+ .offset = 0x03F00000,
+ .mask_flags = 0,
+ }
+};
+
+static int __init hdpu_setup_mtd(void)
+{
+
+ physmap_set_partitions(hdpu_partitions, 5);
+ return 0;
+}
+
+arch_initcall(hdpu_setup_mtd);
+#endif
+
diff -Nru a/arch/ppc/platforms/hdpu.h b/arch/ppc/platforms/hdpu.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/platforms/hdpu.h 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,82 @@
+/*
+ * arch/ppc/platforms/hdpu.h
+ *
+ * Definitions for Sky Computers HDPU board.
+ *
+ * Brian Waite <waite@skycomputers.com>
+ *
+ * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
+ * Based on code done by Mark A. Greer <mgreer@mvista.com>
+ * Based on code done by Tim Montgomery <timm@artesyncp.com>
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/*
+ * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to
+ * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
+ * We'll only use one PCI MEM window on each PCI bus.
+ *
+ * This is the CPU physical memory map (windows must be at least 64K and start
+ * on a boundary that is a multiple of the window size):
+ *
+ * 0x80000000-0x8fffffff - PCI 0 MEM
+ * 0xa0000000-0xafffffff - PCI 1 MEM
+ * 0xc0000000-0xc0ffffff - PCI 0 I/O
+ * 0xc1000000-0xc1ffffff - PCI 1 I/O
+
+ * 0xf1000000-0xf100ffff - MV64360 Registers
+ * 0xf1010000-0xfb9fffff - HOLE
+ * 0xfbfa0000-0xfbfaffff - TBEN
+ * 0xfbf00000-0xfbfbffff - NEXUS
+ * 0xfbfc0000-0xfbffffff - Internal SRAM
+ * 0xfc000000-0xffffffff - Boot window
+ */
+
+#ifndef __PPC_PLATFORMS_HDPU_H
+#define __PPC_PLATFORMS_HDPU_H
+
+/* CPU Physical Memory Map setup. */
+#define HDPU_BRIDGE_REG_BASE 0xf1000000
+
+#define HDPU_TBEN_BASE 0xfbfa0000
+#define HDPU_TBEN_SIZE 0x00010000
+#define HDPU_NEXUS_ID_BASE 0xfbfb0000
+#define HDPU_NEXUS_ID_SIZE 0x00010000
+#define HDPU_INTERNAL_SRAM_BASE 0xfbfc0000
+#define HDPU_INTERNAL_SRAM_SIZE 0x00040000
+#define HDPU_EMB_FLASH_BASE 0xfc000000
+#define HDPU_EMB_FLASH_SIZE 0x04000000
+
+/* PCI Mappings */
+
+#define HDPU_PCI0_MEM_START_PROC_ADDR 0x80000000
+#define HDPU_PCI0_MEM_START_PCI_HI_ADDR 0x00000000
+#define HDPU_PCI0_MEM_START_PCI_LO_ADDR HDPU_PCI0_MEM_START_PROC_ADDR
+#define HDPU_PCI0_MEM_SIZE 0x10000000
+
+#define HDPU_PCI1_MEM_START_PROC_ADDR 0xc0000000
+#define HDPU_PCI1_MEM_START_PCI_HI_ADDR 0x00000000
+#define HDPU_PCI1_MEM_START_PCI_LO_ADDR HDPU_PCI1_MEM_START_PROC_ADDR
+#define HDPU_PCI1_MEM_SIZE 0x20000000
+
+#define HDPU_PCI0_IO_START_PROC_ADDR 0xc0000000
+#define HDPU_PCI0_IO_START_PCI_ADDR 0x00000000
+#define HDPU_PCI0_IO_SIZE 0x01000000
+
+#define HDPU_PCI1_IO_START_PROC_ADDR 0xc1000000
+#define HDPU_PCI1_IO_START_PCI_ADDR 0x01000000
+#define HDPU_PCI1_IO_SIZE 0x01000000
+
+#define HDPU_DEFAULT_BAUD 115200
+#define HDPU_MPSC_CLK_SRC 8 /* TCLK */
+#define HDPU_MPSC_CLK_FREQ 133000000 /* 133 Mhz */
+
+#define HDPU_PCI_0_IRQ (8+64)
+#define HDPU_PCI_1_IRQ (13+64)
+
+#endif /* __PPC_PLATFORMS_HDPU_H */
diff -Nru a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
--- a/arch/ppc/platforms/katana.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/katana.c 2005-03-20 16:30:37 -08:00
@@ -521,13 +521,13 @@
void ((*rtn)(struct platform_device *pdev));
} dev_map[] = {
#if defined(CONFIG_SERIAL_MPSC)
- { MPSC_CTLR_NAME "0", katana_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME "1", katana_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".0", katana_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".1", katana_fixup_mpsc_pdata },
#endif
#if defined(CONFIG_MV643XX_ETH)
- { MV643XX_ETH_NAME "0", katana_fixup_eth_pdata },
- { MV643XX_ETH_NAME "1", katana_fixup_eth_pdata },
- { MV643XX_ETH_NAME "2", katana_fixup_eth_pdata },
+ { MV643XX_ETH_NAME ".0", katana_fixup_eth_pdata },
+ { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata },
+ { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata },
#endif
};
struct platform_device *pdev;
diff -Nru a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
--- a/arch/ppc/platforms/lite5200.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/lite5200.c 2005-03-20 16:30:37 -08:00
@@ -35,6 +35,8 @@
#include <asm/ocp.h>
#include <asm/mpc52xx.h>
+#include <syslib/mpc52xx_pci.h>
+
extern int powersave_nap;
@@ -53,7 +55,7 @@
* driver ( eg drivers/serial/mpc52xx_uart.c for the PSC in uart mode )
*/
-struct ocp_def board_ocp[] = {
+static struct ocp_def board_ocp[] = {
{
.vendor = OCP_VENDOR_FREESCALE,
.function = OCP_FUNC_PSC_UART,
@@ -79,22 +81,40 @@
return 0;
}
+#ifdef CONFIG_PCI
+static int
+lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+ return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
+}
+#endif
+
static void __init
lite5200_setup_cpu(void)
{
- struct mpc52xx_intr *intr;
+ struct mpc52xx_intr __iomem *intr;
+ struct mpc52xx_xlb __iomem *xlb;
u32 intr_ctrl;
/* Map zones */
- intr = (struct mpc52xx_intr *)
- ioremap(MPC52xx_INTR,sizeof(struct mpc52xx_intr));
+ xlb = ioremap(MPC52xx_XLB,sizeof(struct mpc52xx_xlb));
+ intr = ioremap(MPC52xx_INTR,sizeof(struct mpc52xx_intr));
- if (!intr) {
- printk("lite5200.c: Error while mapping INTR during lite5200_setup_cpu\n");
+ if (!xlb || !intr) {
+ printk("lite5200.c: Error while mapping XLB/INTR during "
+ "lite5200_setup_cpu\n");
goto unmap_regs;
}
+ /* Configure the XLB Arbiter */
+ out_be32(&xlb->master_pri_enable, 0xff);
+ out_be32(&xlb->master_priority, 0x11111111);
+
+ /* Enable ram snooping for 1GB window */
+ out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
+ out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
+
/* IRQ[0-3] setup : IRQ0 - Level Active Low */
/* IRQ[1-3] - Level Active High */
intr_ctrl = in_be32(&intr->ctrl);
@@ -104,6 +124,7 @@
/* Unmap reg zone */
unmap_regs:
+ if (xlb) iounmap(xlb);
if (intr) iounmap(intr);
}
@@ -115,6 +136,11 @@
/* CPU & Port mux setup */
lite5200_setup_cpu();
+
+#ifdef CONFIG_PCI
+ /* PCI Bridge setup */
+ mpc52xx_find_bridges();
+#endif
}
void __init
@@ -153,7 +179,7 @@
/* BAT setup */
mpc52xx_set_bat();
- /* No ISA bus AFAIK */
+ /* No ISA bus by default */
isa_io_base = 0;
isa_mem_base = 0;
@@ -166,6 +192,10 @@
ppc_md.show_percpuinfo = NULL;
ppc_md.init_IRQ = mpc52xx_init_irq;
ppc_md.get_irq = mpc52xx_get_irq;
+
+#ifdef CONFIG_PCI
+ ppc_md.pci_map_irq = lite5200_map_irq;
+#endif
ppc_md.find_end_of_memory = mpc52xx_find_end_of_memory;
ppc_md.setup_io_mappings = mpc52xx_map_io;
diff -Nru a/arch/ppc/platforms/mpc5200.c b/arch/ppc/platforms/mpc5200.c
--- a/arch/ppc/platforms/mpc5200.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/mpc5200.c 2005-03-20 16:30:37 -08:00
@@ -17,7 +17,7 @@
#include <asm/mpc52xx.h>
-struct ocp_fs_i2c_data mpc5200_i2c_def = {
+static struct ocp_fs_i2c_data mpc5200_i2c_def = {
.flags = FS_I2C_CLOCK_5200,
};
diff -Nru a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
--- a/arch/ppc/platforms/pmac_cpufreq.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/pmac_cpufreq.c 2005-03-20 16:30:37 -08:00
@@ -464,20 +464,22 @@
u32 *reg;
struct cpufreq_driver *driver = &pmac_cpufreq_driver;
- /* OF only reports the high frequency */
- hi_freq = cur_freq;
- low_freq = cur_freq/2;
- driver->get = dfs_get_cpu_speed;
- cur_freq = driver->get(0);
-
+ /* Look for voltage GPIO */
volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
+ reg = (u32 *)get_property(volt_gpio_np, "reg", NULL);
+ voltage_gpio = *reg;
if (!volt_gpio_np){
printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
return 1;
}
- reg = (u32 *)get_property(volt_gpio_np, "reg", NULL);
- voltage_gpio = *reg;
+ /* OF only reports the high frequency */
+ hi_freq = cur_freq;
+ low_freq = cur_freq/2;
+
+ /* Read actual frequency from CPU */
+ driver->get = dfs_get_cpu_speed;
+ cur_freq = driver->get(0);
set_speed_proc = dfs_set_cpu_speed;
return 0;
@@ -492,7 +494,7 @@
* - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
* - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
* - Recent MacRISC3 laptops
- * - iBook G4s and PowerBook G4s with 7447A CPUs
+ * - All new machines with 7447A CPUs
*/
static int __init pmac_cpufreq_setup(void)
{
@@ -513,11 +515,10 @@
goto out;
cur_freq = (*value) / 1000;
- /* Check for 7447A based iBook G4 or PowerBook */
- if (machine_is_compatible("PowerBook6,5") ||
- machine_is_compatible("PowerBook6,4") ||
- machine_is_compatible("PowerBook5,5") ||
- machine_is_compatible("PowerBook5,4")) {
+ /* Check for 7447A based MacRISC3 */
+ if (machine_is_compatible("MacRISC3") &&
+ get_property(cpunode, "dynamic-power-step", NULL) &&
+ PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
pmac_cpufreq_init_7447A(cpunode);
/* Check for other MacRISC3 machines */
} else if (machine_is_compatible("PowerBook3,4") ||
diff -Nru a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c
--- a/arch/ppc/platforms/pmac_feature.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/pmac_feature.c 2005-03-20 16:30:37 -08:00
@@ -2022,10 +2022,11 @@
#endif /* CONFIG_POWER4 */
static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
- /* Warning: ordering is important as some models may claim
- * beeing compatible with several types
- */
#ifndef CONFIG_POWER4
+ /*
+ * Desktops
+ */
+
{ "AAPL,8500", "PowerMac 8500/8600",
PMAC_TYPE_PSURGE, NULL,
0
@@ -2058,14 +2059,6 @@
PMAC_TYPE_GAZELLE, NULL,
0
},
- { "AAPL,3400/2400", "PowerBook 3400",
- PMAC_TYPE_HOOPER, ohare_features,
- PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
- },
- { "AAPL,3500", "PowerBook 3500",
- PMAC_TYPE_KANGA, ohare_features,
- PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
- },
{ "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
0
@@ -2074,42 +2067,6 @@
PMAC_TYPE_SILK, heathrow_desktop_features,
0
},
- { "AAPL,PowerBook1998", "PowerBook Wallstreet",
- PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
- PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
- },
- { "PowerBook1,1", "PowerBook 101 (Lombard)",
- PMAC_TYPE_101_PBOOK, paddington_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE
- },
- { "iMac,1", "iMac (first generation)",
- PMAC_TYPE_ORIG_IMAC, paddington_features,
- 0
- },
- { "PowerMac4,1", "iMac \"Flower Power\"",
- PMAC_TYPE_PANGEA_IMAC, pangea_features,
- PMAC_MB_MAY_SLEEP
- },
- { "PowerBook4,3", "iBook 2 rev. 2",
- PMAC_TYPE_IBOOK2, pangea_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
- },
- { "PowerBook4,2", "iBook 2",
- PMAC_TYPE_IBOOK2, pangea_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
- },
- { "PowerBook4,1", "iBook 2",
- PMAC_TYPE_IBOOK2, pangea_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
- },
- { "PowerMac4,4", "eMac",
- PMAC_TYPE_EMAC, core99_features,
- PMAC_MB_MAY_SLEEP
- },
- { "PowerMac4,2", "Flat panel iMac",
- PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
- PMAC_MB_CAN_SLEEP
- },
{ "PowerMac1,1", "Blue&White G3",
PMAC_TYPE_YOSEMITE, paddington_features,
0
@@ -2118,9 +2075,13 @@
PMAC_TYPE_YIKES, paddington_features,
0
},
- { "PowerBook2,1", "iBook (first generation)",
- PMAC_TYPE_ORIG_IBOOK, core99_features,
- PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
+ { "PowerMac2,1", "iMac FireWire",
+ PMAC_TYPE_FW_IMAC, core99_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+ },
+ { "PowerMac2,2", "iMac FireWire",
+ PMAC_TYPE_FW_IMAC, core99_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
},
{ "PowerMac3,1", "PowerMac G4 AGP Graphics",
PMAC_TYPE_SAWTOOTH, core99_features,
@@ -2134,30 +2095,96 @@
PMAC_TYPE_SAWTOOTH, core99_features,
PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
},
- { "PowerMac2,1", "iMac FireWire",
- PMAC_TYPE_FW_IMAC, core99_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+ { "PowerMac3,4", "PowerMac G4 Silver",
+ PMAC_TYPE_QUICKSILVER, core99_features,
+ PMAC_MB_MAY_SLEEP
},
- { "PowerMac2,2", "iMac FireWire",
- PMAC_TYPE_FW_IMAC, core99_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+ { "PowerMac3,5", "PowerMac G4 Silver",
+ PMAC_TYPE_QUICKSILVER, core99_features,
+ PMAC_MB_MAY_SLEEP
},
- { "PowerBook2,2", "iBook FireWire",
- PMAC_TYPE_FW_IBOOK, core99_features,
- PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
- PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
+ { "PowerMac3,6", "PowerMac G4 Windtunnel",
+ PMAC_TYPE_WINDTUNNEL, core99_features,
+ PMAC_MB_MAY_SLEEP,
+ },
+ { "PowerMac4,1", "iMac \"Flower Power\"",
+ PMAC_TYPE_PANGEA_IMAC, pangea_features,
+ PMAC_MB_MAY_SLEEP
+ },
+ { "PowerMac4,2", "Flat panel iMac",
+ PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
+ PMAC_MB_CAN_SLEEP
+ },
+ { "PowerMac4,4", "eMac",
+ PMAC_TYPE_EMAC, core99_features,
+ PMAC_MB_MAY_SLEEP
},
{ "PowerMac5,1", "PowerMac G4 Cube",
PMAC_TYPE_CUBE, core99_features,
PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
},
- { "PowerMac3,4", "PowerMac G4 Silver",
- PMAC_TYPE_QUICKSILVER, core99_features,
- PMAC_MB_MAY_SLEEP
+ { "PowerMac6,1", "Flat panel iMac",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP,
},
- { "PowerMac3,5", "PowerMac G4 Silver",
- PMAC_TYPE_QUICKSILVER, core99_features,
- PMAC_MB_MAY_SLEEP
+ { "PowerMac6,3", "Flat panel iMac",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP,
+ },
+ { "PowerMac6,4", "eMac",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP,
+ },
+ { "PowerMac10,1", "Mac mini",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
+ },
+ { "iMac,1", "iMac (first generation)",
+ PMAC_TYPE_ORIG_IMAC, paddington_features,
+ 0
+ },
+
+ /*
+ * Xserve's
+ */
+
+ { "RackMac1,1", "XServe",
+ PMAC_TYPE_RACKMAC, rackmac_features,
+ 0,
+ },
+ { "RackMac1,2", "XServe rev. 2",
+ PMAC_TYPE_RACKMAC, rackmac_features,
+ 0,
+ },
+
+ /*
+ * Laptops
+ */
+
+ { "AAPL,3400/2400", "PowerBook 3400",
+ PMAC_TYPE_HOOPER, ohare_features,
+ PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+ },
+ { "AAPL,3500", "PowerBook 3500",
+ PMAC_TYPE_KANGA, ohare_features,
+ PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+ },
+ { "AAPL,PowerBook1998", "PowerBook Wallstreet",
+ PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
+ PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+ },
+ { "PowerBook1,1", "PowerBook 101 (Lombard)",
+ PMAC_TYPE_101_PBOOK, paddington_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE
+ },
+ { "PowerBook2,1", "iBook (first generation)",
+ PMAC_TYPE_ORIG_IBOOK, core99_features,
+ PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
+ },
+ { "PowerBook2,2", "iBook FireWire",
+ PMAC_TYPE_FW_IBOOK, core99_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
+ PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
},
{ "PowerBook3,1", "PowerBook Pismo",
PMAC_TYPE_PISMO, core99_features,
@@ -2180,17 +2207,17 @@
PMAC_TYPE_TITANIUM4, core99_features,
PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
},
- { "RackMac1,1", "XServe",
- PMAC_TYPE_RACKMAC, rackmac_features,
- 0,
+ { "PowerBook4,1", "iBook 2",
+ PMAC_TYPE_IBOOK2, pangea_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
},
- { "RackMac1,2", "XServe rev. 2",
- PMAC_TYPE_RACKMAC, rackmac_features,
- 0,
+ { "PowerBook4,2", "iBook 2",
+ PMAC_TYPE_IBOOK2, pangea_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
},
- { "PowerMac3,6", "PowerMac G4 Windtunnel",
- PMAC_TYPE_WINDTUNNEL, core99_features,
- PMAC_MB_MAY_SLEEP,
+ { "PowerBook4,3", "iBook 2 rev. 2",
+ PMAC_TYPE_IBOOK2, pangea_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
},
{ "PowerBook5,1", "PowerBook G4 17\"",
PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
@@ -2212,6 +2239,14 @@
PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
},
+ { "PowerBook5,6", "PowerBook G4 15\"",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+ },
+ { "PowerBook5,7", "PowerBook G4 17\"",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+ },
{ "PowerBook6,1", "PowerBook G4 12\"",
PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
@@ -2229,6 +2264,10 @@
PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
},
{ "PowerBook6,5", "iBook G4",
+ PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
+ PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+ },
+ { "PowerBook6,8", "PowerBook G4 12\"",
PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
},
diff -Nru a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
--- a/arch/ppc/platforms/radstone_ppc7d.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/platforms/radstone_ppc7d.c 2005-03-20 16:30:37 -08:00
@@ -669,6 +669,42 @@
}
#endif
+#if defined(CONFIG_I2C_MV64XXX)
+static void __init
+ppc7d_fixup_i2c_pdata(struct platform_device *pdev)
+{
+ struct mv64xxx_i2c_pdata *pdata;
+ int i;
+
+ pdata = pdev->dev.platform_data;
+ if (pdata == NULL) {
+ pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
+ if (pdata == NULL)
+ return;
+
+ memset(pdata, 0, sizeof(*pdata));
+ pdev->dev.platform_data = pdata;
+ }
+
+ /* divisors M=8, N=3 for 100kHz I2C from 133MHz system clock */
+ pdata->freq_m = 8;
+ pdata->freq_n = 3;
+ pdata->timeout = 500;
+ pdata->retries = 3;
+
+ /* Adjust IRQ by mv64360_irq_base */
+ for (i = 0; i < pdev->num_resources; i++) {
+ struct resource *r = &pdev->resource[i];
+
+ if (r->flags & IORESOURCE_IRQ) {
+ r->start += mv64360_irq_base;
+ r->end += mv64360_irq_base;
+ pr_debug("%s, uses IRQ %d\n", pdev->name, (int) r->start);
+ }
+ }
+}
+#endif
+
static int __init ppc7d_platform_notify(struct device *dev)
{
static struct {
@@ -676,13 +712,16 @@
void ((*rtn) (struct platform_device * pdev));
} dev_map[] = {
#if defined(CONFIG_SERIAL_MPSC)
- { MPSC_CTLR_NAME "0", ppc7d_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME "1", ppc7d_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".0", ppc7d_fixup_mpsc_pdata },
+ { MPSC_CTLR_NAME ".1", ppc7d_fixup_mpsc_pdata },
#endif
#if defined(CONFIG_MV643XX_ETH)
- { MV643XX_ETH_NAME "0", ppc7d_fixup_eth_pdata },
- { MV643XX_ETH_NAME "1", ppc7d_fixup_eth_pdata },
- { MV643XX_ETH_NAME "2", ppc7d_fixup_eth_pdata },
+ { MV643XX_ETH_NAME ".0", ppc7d_fixup_eth_pdata },
+ { MV643XX_ETH_NAME ".1", ppc7d_fixup_eth_pdata },
+ { MV643XX_ETH_NAME ".2", ppc7d_fixup_eth_pdata },
+#endif
+#if defined(CONFIG_I2C_MV64XXX)
+ { MV64XXX_I2C_CTLR_NAME ".0", ppc7d_fixup_i2c_pdata },
#endif
};
struct platform_device *pdev;
@@ -1162,7 +1201,7 @@
/* Disable ethernet. It might have been setup by the bootrom */
for (port = 0; port < 3; port++)
- mv64x60_write(&bh, MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(port),
+ mv64x60_write(&bh, MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port),
0x0000ff00);
/* Clear queue pointers to ensure they are all initialized,
@@ -1172,25 +1211,25 @@
*/
for (port = 0; port < 3; port++) {
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port),
0x00000000);
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port),
0x00000000);
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port),
0x00000000);
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port),
0x00000000);
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port),
0x00000000);
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port),
0x00000000);
mv64x60_write(&bh,
- MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port),
+ MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port),
0x00000000);
}
@@ -1363,7 +1402,8 @@
ppc_md.pcibios_fixup_bus = ppc7d_pci_fixup_bus;
-#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
+#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) || \
+ defined(CONFIG_I2C_MV64XXX)
platform_notify = ppc7d_platform_notify;
#endif
@@ -1405,4 +1445,8 @@
rev_num = (val8 & PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK) >> 5;
if (rev_num <= 1)
ppc7d_has_alma = 1;
+
+#ifdef DEBUG
+ console_printk[0] = 8;
+#endif
}
diff -Nru a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
--- a/arch/ppc/syslib/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/syslib/Makefile 2005-03-20 16:30:37 -08:00
@@ -53,6 +53,7 @@
obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \
pci_auto.o
obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o
+obj-$(CONFIG_HDPU) += pci_auto.o
obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_KATANA) += pci_auto.o
obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \
@@ -106,3 +107,6 @@
endif
obj-$(CONFIG_MPC8555_CDS) += todc_time.o
obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o
+ifeq ($(CONFIG_PPC_MPC52xx),y)
+obj-$(CONFIG_PCI) += mpc52xx_pci.o
+endif
diff -Nru a/arch/ppc/syslib/cpc700.h b/arch/ppc/syslib/cpc700.h
--- a/arch/ppc/syslib/cpc700.h 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/syslib/cpc700.h 2005-03-20 16:30:37 -08:00
@@ -17,13 +17,14 @@
* memory controller, PIC, UARTs, IIC, and Timers.
*/
-#ifndef _ASMPPC_CPC700_H
-#define _ASMPPC_CPC700_H
+#ifndef __PPC_SYSLIB_CPC700_H__
+#define __PPC_SYSLIB_CPC700_H__
#include <linux/stddef.h>
#include <linux/types.h>
#include <linux/init.h>
+/* XXX no barriers? not even any volatiles? -- paulus */
#define CPC700_OUT_32(a,d) (*(u_int *)a = d)
#define CPC700_IN_32(a) (*(u_int *)a)
@@ -33,21 +34,26 @@
#define CPC700_PCI_CONFIG_ADDR 0xfec00000
#define CPC700_PCI_CONFIG_DATA 0xfec00004
-#define CPC700_PMM0_LOCAL 0xff400000
-#define CPC700_PMM0_MASK_ATTR 0xff400004
-#define CPC700_PMM0_PCI_LOW 0xff400008
-#define CPC700_PMM0_PCI_HIGH 0xff40000c
+/* CPU -> PCI memory window 0 */
+#define CPC700_PMM0_LOCAL 0xff400000 /* CPU physical addr */
+#define CPC700_PMM0_MASK_ATTR 0xff400004 /* size and attrs */
+#define CPC700_PMM0_PCI_LOW 0xff400008 /* PCI addr, low word */
+#define CPC700_PMM0_PCI_HIGH 0xff40000c /* PCI addr, high wd */
+/* CPU -> PCI memory window 1 */
#define CPC700_PMM1_LOCAL 0xff400010
#define CPC700_PMM1_MASK_ATTR 0xff400014
#define CPC700_PMM1_PCI_LOW 0xff400018
#define CPC700_PMM1_PCI_HIGH 0xff40001c
+/* CPU -> PCI memory window 2 */
#define CPC700_PMM2_LOCAL 0xff400020
#define CPC700_PMM2_MASK_ATTR 0xff400024
#define CPC700_PMM2_PCI_LOW 0xff400028
#define CPC700_PMM2_PCI_HIGH 0xff40002c
-#define CPC700_PTM1_MEMSIZE 0xff400030
-#define CPC700_PTM1_LOCAL 0xff400034
-#define CPC700_PTM2_MEMSIZE 0xff400038
+/* PCI memory -> CPU window 1 */
+#define CPC700_PTM1_MEMSIZE 0xff400030 /* window size */
+#define CPC700_PTM1_LOCAL 0xff400034 /* CPU phys addr */
+/* PCI memory -> CPU window 2 */
+#define CPC700_PTM2_MEMSIZE 0xff400038 /* size and enable */
#define CPC700_PTM2_LOCAL 0xff40003c
/*
@@ -89,4 +95,4 @@
extern void __init cpc700_init_IRQ(void);
extern int cpc700_get_irq(struct pt_regs *);
-#endif /* _ASMPPC_CPC700_H */
+#endif /* __PPC_SYSLIB_CPC700_H__ */
diff -Nru a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc52xx_pci.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,235 @@
+/*
+ * arch/ppc/syslib/mpc52xx_pci.c
+ *
+ * PCI code for the Freescale MPC52xx embedded CPU.
+ *
+ *
+ * Maintainer : Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/config.h>
+
+#include <asm/pci.h>
+
+#include <asm/mpc52xx.h>
+#include "mpc52xx_pci.h"
+
+#include <asm/delay.h>
+
+
+static int
+mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int offset, int len, u32 *val)
+{
+ struct pci_controller *hose = bus->sysdata;
+ u32 value;
+
+ if (ppc_md.pci_exclude_device)
+ if (ppc_md.pci_exclude_device(bus->number, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ out_be32(hose->cfg_addr,
+ (1 << 31) |
+ ((bus->number - hose->bus_offset) << 16) |
+ (devfn << 8) |
+ (offset & 0xfc));
+
+ value = in_le32(hose->cfg_data);
+
+ if (len != 4) {
+ value >>= ((offset & 0x3) << 3);
+ value &= 0xffffffff >> (32 - (len << 3));
+ }
+
+ *val = value;
+
+ out_be32(hose->cfg_addr, 0);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int offset, int len, u32 val)
+{
+ struct pci_controller *hose = bus->sysdata;
+ u32 value, mask;
+
+ if (ppc_md.pci_exclude_device)
+ if (ppc_md.pci_exclude_device(bus->number, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ out_be32(hose->cfg_addr,
+ (1 << 31) |
+ ((bus->number - hose->bus_offset) << 16) |
+ (devfn << 8) |
+ (offset & 0xfc));
+
+ if (len != 4) {
+ value = in_le32(hose->cfg_data);
+
+ offset = (offset & 0x3) << 3;
+ mask = (0xffffffff >> (32 - (len << 3)));
+ mask <<= offset;
+
+ value &= ~mask;
+ val = value | ((val << offset) & mask);
+ }
+
+ out_le32(hose->cfg_data, val);
+
+ out_be32(hose->cfg_addr, 0);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops mpc52xx_pci_ops = {
+ .read = mpc52xx_pci_read_config,
+ .write = mpc52xx_pci_write_config
+};
+
+
+static void __init
+mpc52xx_pci_setup(struct mpc52xx_pci __iomem *pci_regs)
+{
+
+ /* Setup control regs */
+ /* Nothing to do afaik */
+
+ /* Setup windows */
+ out_be32(&pci_regs->iw0btar, MPC52xx_PCI_IWBTAR_TRANSLATION(
+ MPC52xx_PCI_MEM_START + MPC52xx_PCI_MEM_OFFSET,
+ MPC52xx_PCI_MEM_START,
+ MPC52xx_PCI_MEM_SIZE ));
+
+ out_be32(&pci_regs->iw1btar, MPC52xx_PCI_IWBTAR_TRANSLATION(
+ MPC52xx_PCI_MMIO_START + MPC52xx_PCI_MEM_OFFSET,
+ MPC52xx_PCI_MMIO_START,
+ MPC52xx_PCI_MMIO_SIZE ));
+
+ out_be32(&pci_regs->iw2btar, MPC52xx_PCI_IWBTAR_TRANSLATION(
+ MPC52xx_PCI_IO_BASE,
+ MPC52xx_PCI_IO_START,
+ MPC52xx_PCI_IO_SIZE ));
+
+ out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(
+ ( MPC52xx_PCI_IWCR_ENABLE | /* iw0btar */
+ MPC52xx_PCI_IWCR_READ_MULTI |
+ MPC52xx_PCI_IWCR_MEM ),
+ ( MPC52xx_PCI_IWCR_ENABLE | /* iw1btar */
+ MPC52xx_PCI_IWCR_READ |
+ MPC52xx_PCI_IWCR_MEM ),
+ ( MPC52xx_PCI_IWCR_ENABLE | /* iw2btar */
+ MPC52xx_PCI_IWCR_IO )
+ ));
+
+
+ out_be32(&pci_regs->tbatr0,
+ MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_IO );
+ out_be32(&pci_regs->tbatr1,
+ MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM );
+
+ out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD);
+
+ /* Reset the exteral bus ( internal PCI controller is NOT resetted ) */
+ /* Not necessary and can be a bad thing if for example the bootloader
+ is displaying a splash screen or ... Just left here for
+ documentation purpose if anyone need it */
+#if 0
+ u32 tmp;
+ tmp = in_be32(&pci_regs->gscr);
+ out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR);
+ udelay(50);
+ out_be32(&pci_regs->gscr, tmp);
+#endif
+}
+
+static void __init
+mpc52xx_pci_fixup_resources(struct pci_dev *dev)
+{
+ int i;
+
+ /* We don't rely on boot loader for PCI and resets all
+ devices */
+ for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+ struct resource *res = &dev->resource[i];
+ if (res->end > res->start) { /* Only valid resources */
+ res->end -= res->start;
+ res->start = 0;
+ res->flags |= IORESOURCE_UNSET;
+ }
+ }
+
+ /* The PCI Host bridge of MPC52xx has a prefetch memory resource
+ fixed to 1Gb. Doesn't fit in the resource system so we remove it */
+ if ( (dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
+ (dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200) ) {
+ struct resource *res = &dev->resource[1];
+ res->start = res->end = res->flags = 0;
+ }
+}
+
+void __init
+mpc52xx_find_bridges(void)
+{
+ struct mpc52xx_pci __iomem *pci_regs;
+ struct pci_controller *hose;
+
+ pci_assign_all_busses = 1;
+
+ pci_regs = ioremap(MPC52xx_PCI, sizeof(struct mpc52xx_pci));
+ if (!pci_regs)
+ return;
+
+ hose = pcibios_alloc_controller();
+ if (!hose) {
+ iounmap(pci_regs);
+ return;
+ }
+
+ ppc_md.pci_swizzle = common_swizzle;
+ ppc_md.pcibios_fixup_resources = mpc52xx_pci_fixup_resources;
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+ hose->bus_offset = 0;
+ hose->ops = &mpc52xx_pci_ops;
+
+ mpc52xx_pci_setup(pci_regs);
+
+ hose->pci_mem_offset = MPC52xx_PCI_MEM_OFFSET;
+
+ isa_io_base =
+ (unsigned long) ioremap(MPC52xx_PCI_IO_BASE,
+ MPC52xx_PCI_IO_SIZE);
+ hose->io_base_virt = (void *) isa_io_base;
+
+ hose->cfg_addr = &pci_regs->car;
+ hose->cfg_data = (void __iomem *) isa_io_base;
+
+ /* Setup resources */
+ pci_init_resource(&hose->mem_resources[0],
+ MPC52xx_PCI_MEM_START,
+ MPC52xx_PCI_MEM_STOP,
+ IORESOURCE_MEM|IORESOURCE_PREFETCH,
+ "PCI prefetchable memory");
+
+ pci_init_resource(&hose->mem_resources[1],
+ MPC52xx_PCI_MMIO_START,
+ MPC52xx_PCI_MMIO_STOP,
+ IORESOURCE_MEM,
+ "PCI memory");
+
+ pci_init_resource(&hose->io_resource,
+ MPC52xx_PCI_IO_START,
+ MPC52xx_PCI_IO_STOP,
+ IORESOURCE_IO,
+ "PCI I/O");
+
+}
diff -Nru a/arch/ppc/syslib/mpc52xx_pci.h b/arch/ppc/syslib/mpc52xx_pci.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc52xx_pci.h 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,139 @@
+/*
+ * arch/ppc/syslib/mpc52xx_pci.h
+ *
+ * PCI Include file the Freescale MPC52xx embedded cpu chips
+ *
+ *
+ * Maintainer : Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Inspired from code written by Dale Farnsworth <dfarnsworth@mvista.com>
+ * for the 2.4 kernel.
+ *
+ * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright (C) 2003 MontaVista, Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __SYSLIB_MPC52xx_PCI_H__
+#define __SYSLIB_MPC52xx_PCI_H__
+
+/* ======================================================================== */
+/* PCI windows config */
+/* ======================================================================== */
+
+/*
+ * Master windows : MPC52xx -> PCI
+ *
+ * 0x80000000 -> 0x9FFFFFFF PCI Mem prefetchable IW0BTAR
+ * 0xA0000000 -> 0xAFFFFFFF PCI Mem IW1BTAR
+ * 0xB0000000 -> 0xB0FFFFFF PCI IO IW2BTAR
+ *
+ * Slave windows : PCI -> MPC52xx
+ *
+ * 0xF0000000 -> 0xF003FFFF MPC52xx MBAR TBATR0
+ * 0x00000000 -> 0x3FFFFFFF MPC52xx local memory TBATR1
+ */
+
+#define MPC52xx_PCI_MEM_OFFSET 0x00000000 /* Offset for MEM MMIO */
+
+#define MPC52xx_PCI_MEM_START 0x80000000
+#define MPC52xx_PCI_MEM_SIZE 0x20000000
+#define MPC52xx_PCI_MEM_STOP (MPC52xx_PCI_MEM_START+MPC52xx_PCI_MEM_SIZE-1)
+
+#define MPC52xx_PCI_MMIO_START 0xa0000000
+#define MPC52xx_PCI_MMIO_SIZE 0x10000000
+#define MPC52xx_PCI_MMIO_STOP (MPC52xx_PCI_MMIO_START+MPC52xx_PCI_MMIO_SIZE-1)
+
+#define MPC52xx_PCI_IO_BASE 0xb0000000
+
+#define MPC52xx_PCI_IO_START 0x00000000
+#define MPC52xx_PCI_IO_SIZE 0x01000000
+#define MPC52xx_PCI_IO_STOP (MPC52xx_PCI_IO_START+MPC52xx_PCI_IO_SIZE-1)
+
+
+#define MPC52xx_PCI_TARGET_IO MPC52xx_MBAR
+#define MPC52xx_PCI_TARGET_MEM 0x00000000
+
+
+/* ======================================================================== */
+/* Structures mapping & Defines for PCI Unit */
+/* ======================================================================== */
+
+#define MPC52xx_PCI_GSCR_BM 0x40000000
+#define MPC52xx_PCI_GSCR_PE 0x20000000
+#define MPC52xx_PCI_GSCR_SE 0x10000000
+#define MPC52xx_PCI_GSCR_XLB2PCI_MASK 0x07000000
+#define MPC52xx_PCI_GSCR_XLB2PCI_SHIFT 24
+#define MPC52xx_PCI_GSCR_IPG2PCI_MASK 0x00070000
+#define MPC52xx_PCI_GSCR_IPG2PCI_SHIFT 16
+#define MPC52xx_PCI_GSCR_BME 0x00004000
+#define MPC52xx_PCI_GSCR_PEE 0x00002000
+#define MPC52xx_PCI_GSCR_SEE 0x00001000
+#define MPC52xx_PCI_GSCR_PR 0x00000001
+
+
+#define MPC52xx_PCI_IWBTAR_TRANSLATION(proc_ad,pci_ad,size) \
+ ( ( (proc_ad) & 0xff000000 ) | \
+ ( (((size) - 1) >> 8) & 0x00ff0000 ) | \
+ ( ((pci_ad) >> 16) & 0x0000ff00 ) )
+
+#define MPC52xx_PCI_IWCR_PACK(win0,win1,win2) (((win0) << 24) | \
+ ((win1) << 16) | \
+ ((win2) << 8))
+
+#define MPC52xx_PCI_IWCR_DISABLE 0x0
+#define MPC52xx_PCI_IWCR_ENABLE 0x1
+#define MPC52xx_PCI_IWCR_READ 0x0
+#define MPC52xx_PCI_IWCR_READ_LINE 0x2
+#define MPC52xx_PCI_IWCR_READ_MULTI 0x4
+#define MPC52xx_PCI_IWCR_MEM 0x0
+#define MPC52xx_PCI_IWCR_IO 0x8
+
+#define MPC52xx_PCI_TCR_P 0x01000000
+#define MPC52xx_PCI_TCR_LD 0x00010000
+
+#define MPC52xx_PCI_TBATR_DISABLE 0x0
+#define MPC52xx_PCI_TBATR_ENABLE 0x1
+
+
+#ifndef __ASSEMBLY__
+
+struct mpc52xx_pci {
+ u32 idr; /* PCI + 0x00 */
+ u32 scr; /* PCI + 0x04 */
+ u32 ccrir; /* PCI + 0x08 */
+ u32 cr1; /* PCI + 0x0C */
+ u32 bar0; /* PCI + 0x10 */
+ u32 bar1; /* PCI + 0x14 */
+ u8 reserved1[16]; /* PCI + 0x18 */
+ u32 ccpr; /* PCI + 0x28 */
+ u32 sid; /* PCI + 0x2C */
+ u32 erbar; /* PCI + 0x30 */
+ u32 cpr; /* PCI + 0x34 */
+ u8 reserved2[4]; /* PCI + 0x38 */
+ u32 cr2; /* PCI + 0x3C */
+ u8 reserved3[32]; /* PCI + 0x40 */
+ u32 gscr; /* PCI + 0x60 */
+ u32 tbatr0; /* PCI + 0x64 */
+ u32 tbatr1; /* PCI + 0x68 */
+ u32 tcr; /* PCI + 0x6C */
+ u32 iw0btar; /* PCI + 0x70 */
+ u32 iw1btar; /* PCI + 0x74 */
+ u32 iw2btar; /* PCI + 0x78 */
+ u8 reserved4[4]; /* PCI + 0x7C */
+ u32 iwcr; /* PCI + 0x80 */
+ u32 icr; /* PCI + 0x84 */
+ u32 isr; /* PCI + 0x88 */
+ u32 arb; /* PCI + 0x8C */
+ u8 reserved5[104]; /* PCI + 0x90 */
+ u32 car; /* PCI + 0xF8 */
+ u8 reserved6[4]; /* PCI + 0xFC */
+};
+
+#endif /* __ASSEMBLY__ */
+
+
+#endif /* __SYSLIB_MPC52xx_PCI_H__ */
diff -Nru a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c
--- a/arch/ppc/syslib/mpc52xx_pic.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/syslib/mpc52xx_pic.c 2005-03-20 16:30:37 -08:00
@@ -33,8 +33,8 @@
#include <asm/mpc52xx.h>
-static struct mpc52xx_intr *intr;
-static struct mpc52xx_sdma *sdma;
+static struct mpc52xx_intr __iomem *intr;
+static struct mpc52xx_sdma __iomem *sdma;
static void
mpc52xx_ic_disable(unsigned int irq)
@@ -166,14 +166,11 @@
}
static struct hw_interrupt_type mpc52xx_ic = {
- "MPC52xx",
- NULL, /* startup(irq) */
- NULL, /* shutdown(irq) */
- mpc52xx_ic_enable, /* enable(irq) */
- mpc52xx_ic_disable, /* disable(irq) */
- mpc52xx_ic_disable_and_ack, /* disable_and_ack(irq) */
- mpc52xx_ic_end, /* end(irq) */
- 0 /* set_affinity(irq, cpumask) SMP. */
+ .typename = " MPC52xx ",
+ .enable = mpc52xx_ic_enable,
+ .disable = mpc52xx_ic_disable,
+ .ack = mpc52xx_ic_disable_and_ack,
+ .end = mpc52xx_ic_end,
};
void __init
@@ -183,10 +180,8 @@
u32 intr_ctrl;
/* Remap the necessary zones */
- intr = (struct mpc52xx_intr *)
- ioremap(MPC52xx_INTR, sizeof(struct mpc52xx_intr));
- sdma = (struct mpc52xx_sdma *)
- ioremap(MPC52xx_SDMA, sizeof(struct mpc52xx_sdma));
+ intr = ioremap(MPC52xx_INTR, sizeof(struct mpc52xx_intr));
+ sdma = ioremap(MPC52xx_SDMA, sizeof(struct mpc52xx_sdma));
if ((intr==NULL) || (sdma==NULL))
panic("Can't ioremap PIC/SDMA register for init_irq !");
diff -Nru a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
--- a/arch/ppc/syslib/mpc52xx_setup.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc/syslib/mpc52xx_setup.c 2005-03-20 16:30:37 -08:00
@@ -39,7 +39,8 @@
void
mpc52xx_restart(char *cmd)
{
- struct mpc52xx_gpt* gpt0 = (struct mpc52xx_gpt*) MPC52xx_GPTx(0);
+ struct mpc52xx_gpt __iomem *gpt0 =
+ (struct mpc52xx_gpt __iomem *) MPC52xx_GPTx(0);
local_irq_disable();
@@ -102,7 +103,7 @@
#endif
static void
-mpc52xx_psc_putc(struct mpc52xx_psc * psc, unsigned char c)
+mpc52xx_psc_putc(struct mpc52xx_psc __iomem *psc, unsigned char c)
{
while (!(in_be16(&psc->mpc52xx_psc_status) &
MPC52xx_PSC_SR_TXRDY));
@@ -112,8 +113,9 @@
void
mpc52xx_progress(char *s, unsigned short hex)
{
- struct mpc52xx_psc *psc = (struct mpc52xx_psc *)MPC52xx_CONSOLE;
char c;
+ struct mpc52xx_psc __iomem *psc =
+ (struct mpc52xx_psc __iomem *)MPC52xx_CONSOLE;
while ((c = *s++) != 0) {
if (c == '\n')
@@ -138,11 +140,11 @@
* else get size from sdram config registers
*/
if (ramsize == 0) {
- struct mpc52xx_mmap_ctl *mmap_ctl;
+ struct mpc52xx_mmap_ctl __iomem *mmap_ctl;
u32 sdram_config_0, sdram_config_1;
/* Temp BAT2 mapping active when this is called ! */
- mmap_ctl = (struct mpc52xx_mmap_ctl*) MPC52xx_MMAP_CTL;
+ mmap_ctl = (struct mpc52xx_mmap_ctl __iomem *) MPC52xx_MMAP_CTL;
sdram_config_0 = in_be32(&mmap_ctl->sdram0);
sdram_config_1 = in_be32(&mmap_ctl->sdram1);
@@ -169,13 +171,11 @@
/* if bootloader didn't pass bus frequencies, calculate them */
if (xlbfreq == 0) {
/* Get RTC & Clock manager modules */
- struct mpc52xx_rtc *rtc;
- struct mpc52xx_cdm *cdm;
+ struct mpc52xx_rtc __iomem *rtc;
+ struct mpc52xx_cdm __iomem *cdm;
- rtc = (struct mpc52xx_rtc*)
- ioremap(MPC52xx_RTC, sizeof(struct mpc52xx_rtc));
- cdm = (struct mpc52xx_cdm*)
- ioremap(MPC52xx_CDM, sizeof(struct mpc52xx_cdm));
+ rtc = ioremap(MPC52xx_RTC, sizeof(struct mpc52xx_rtc));
+ cdm = ioremap(MPC52xx_CDM, sizeof(struct mpc52xx_cdm));
if ((rtc==NULL) || (cdm==NULL))
panic("Can't ioremap RTC/CDM while computing bus freq");
@@ -212,8 +212,8 @@
__res.bi_pcifreq = pcifreq;
/* Release mapping */
- iounmap((void*)rtc);
- iounmap((void*)cdm);
+ iounmap(rtc);
+ iounmap(cdm);
}
divisor = 4;
diff -Nru a/arch/ppc/syslib/ppc4xx_serial.c b/arch/ppc/syslib/ppc4xx_serial.c
--- a/arch/ppc/syslib/ppc4xx_serial.c 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,171 +0,0 @@
-/*
- * arch/ppc/syslib/ppc405_serial.c
- *
- * Author: MontaVista Software, Inc.
- * frank_rowand@mvista.com or source@mvista.com
- * debbie_chu@mvista.com
- *
- * This is a fairly standard 165xx type device that will eventually
- * be merged with other similar processor/boards. -- Dan
- *
- * 2000 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Console I/O support for Early kernel bringup.
- */
-
-#include <linux/config.h>
-
-#if defined(CONFIG_IBM405GP) || defined(CONFIG_IBM405CR)
-
-#ifdef CONFIG_KGDB
-#include <asm/kgdb.h>
-#include <linux/init.h>
-#endif
-
-#ifdef CONFIG_DEBUG_BRINGUP
-
-#include <linux/console.h>
-
-extern void ftr_reset_preferred_console(void);
-
-
-static int ppc405_sercons_setup(struct console *co, char *options)
-{
-#ifdef CONFIG_UART0_DEBUG_CONSOLE
- volatile unsigned char *uart_dll = (char *)0xef600300;
- volatile unsigned char *uart_fcr = (char *)0xef600302;
- volatile unsigned char *uart_lcr = (char *)0xef600303;
-#endif
-
-#ifdef CONFIG_UART1_DEBUG_CONSOLE
- volatile unsigned char *uart_dll = (char *)0xef600400;
- volatile unsigned char *uart_fcr = (char *)0xef600402;
- volatile unsigned char *uart_lcr = (char *)0xef600403;
-#endif
-
- *uart_lcr = *uart_lcr | 0x80; /* DLAB on */
-
-/* ftr revisit - there is no config option for this
-** also see include/asm-ppc/ppc405_serial.h
-**
-** #define CONFIG_IBM405GP_INTERNAL_CLOCK
-*/
-
-
-#ifdef CONFIG_IBM405GP_INTERNAL_CLOCK
- /* ftr revisit
- ** why is bit 19 of chcr0 (0x1000) being set?
- */
- /* 0x2a results in data corruption, kgdb works with 0x28 */
- *uart_dll = 0x28; /* 9600 baud */
- _put_CHCR0((_get_CHCR0() & 0xffffe000) | 0x103e);
-#else
- *uart_dll = 0x48; /* 9600 baud */
-#endif
- *uart_lcr = *uart_lcr & 0x7f; /* DLAB off */
-
- return 0;
-}
-
-
-/*
- * This is a bringup hack, writing directly to uart0 or uart1
- */
-
-static void
-ppc405_sercons_write(struct console *co, const char *ptr,
- unsigned nb)
-{
- int i;
-
-#ifdef CONFIG_UART0_DEBUG_CONSOLE
- volatile unsigned char *uart_xmit = (char *)0xef600300;
- volatile unsigned char *uart_lsr = (char *)0xef600305;
-#endif
-
-#ifdef CONFIG_UART1_DEBUG_CONSOLE
- volatile unsigned char *uart_xmit = (char *)0xef600400;
- volatile unsigned char *uart_lsr = (char *)0xef600405;
-#endif
-
- for (i = 0; i < nb; ++i) {
-
- /* wait for transmit reg (possibly fifo) to empty */
- while ((*uart_lsr & 0x40) == 0)
- ;
-
- *uart_xmit = (ptr[i] & 0xff);
-
- if (ptr[i] == '\n') {
-
- /* add a carriage return */
-
- /* wait for transmit reg (possibly fifo) to empty */
- while ((*uart_lsr & 0x40) == 0)
- ;
-
- *uart_xmit = '\r';
- }
- }
-
- return;
-}
-
-
-static int
-ppc405_sercons_read(struct console *co, char *ptr, unsigned nb)
-{
-#ifdef CONFIG_UART0_DEBUG_CONSOLE
- volatile unsigned char *uart_rcv = (char *)0xef600300;
- volatile unsigned char *uart_lsr = (char *)0xef600305;
-#endif
-
-#ifdef CONFIG_UART1_DEBUG_CONSOLE
- volatile unsigned char *uart_rcv = (char *)0xef600400;
- volatile unsigned char *uart_lsr = (char *)0xef600405;
-#endif
-
-
- /* ftr revisit: not tested */
-
- if (nb == 0)
- return(0);
-
- if (!ptr)
- return(-1);
-
- /* wait for receive reg (possibly fifo) to contain data */
- while ((*uart_lsr & 0x01) == 0)
- ;
-
- *ptr = *uart_rcv;
-
- return(1);
-}
-
-static struct console ppc405_sercons = {
- .name = "dbg_cons",
- .write = ppc405_console_write,
- .setup = ppc405_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-void
-register_debug_console(void)
-{
- register_console(&ppc405_sercons);
-}
-
-void
-unregister_debug_console(void)
-{
- unregister_console(&ppc405_sercons);
-}
-
-#endif /* CONFIG_DEBUG_BRINGUP */
-
-#endif /* #if defined(CONFIG_IBM405GP) || defined(CONFIG_IBM405CR) */
diff -Nru a/arch/ppc64/Kconfig b/arch/ppc64/Kconfig
--- a/arch/ppc64/Kconfig 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/Kconfig 2005-03-20 16:30:37 -08:00
@@ -255,16 +255,21 @@
config PPC_RTAS
- bool "Proc interface to RTAS"
+ bool
depends on PPC_PSERIES
+ default y
+
+config RTAS_PROC
+ bool "Proc interface to RTAS"
+ depends on PPC_RTAS
config RTAS_FLASH
tristate "Firmware flash interface"
- depends on PPC_RTAS
+ depends on RTAS_PROC
config SCANLOG
tristate "Scanlog dump interface"
- depends on PPC_RTAS
+ depends on RTAS_PROC && PPC_PSERIES
config LPARCFG
tristate "LPAR Configuration Data"
diff -Nru a/arch/ppc64/boot/main.c b/arch/ppc64/boot/main.c
--- a/arch/ppc64/boot/main.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/boot/main.c 2005-03-20 16:30:37 -08:00
@@ -112,7 +112,7 @@
if (getprop(chosen_handle, "stdin", &stdin, sizeof(stdin)) != 4)
exit();
- printf("zImage starting: loaded at 0x%x\n\r", (unsigned)_start);
+ printf("\n\rzImage starting: loaded at 0x%x\n\r", (unsigned)_start);
/*
* Now we try to claim some memory for the kernel itself
@@ -151,7 +151,7 @@
printf("initial ramdisk moving 0x%lx <- 0x%lx (%lx bytes)\n\r",
initrd.addr, (unsigned long)_initrd_start, initrd.size);
memmove((void *)initrd.addr, (void *)_initrd_start, initrd.size);
- printf("initrd head: 0x%lx\n", *((u32 *)initrd.addr));
+ printf("initrd head: 0x%lx\n\r", *((u32 *)initrd.addr));
}
/* Eventually gunzip the kernel */
diff -Nru a/arch/ppc64/boot/no_initrd.c b/arch/ppc64/boot/no_initrd.c
--- a/arch/ppc64/boot/no_initrd.c 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,2 +0,0 @@
-char initrd_data[1];
-int initrd_len = 0;
diff -Nru a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
--- a/arch/ppc64/kernel/Makefile 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/Makefile 2005-03-20 16:30:37 -08:00
@@ -39,7 +39,7 @@
obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o
-obj-$(CONFIG_PPC_RTAS) += rtas-proc.o
+obj-$(CONFIG_RTAS_PROC) += rtas-proc.o
obj-$(CONFIG_SCANLOG) += scanlog.o
obj-$(CONFIG_VIOPATH) += viopath.o
obj-$(CONFIG_LPARCFG) += lparcfg.o
diff -Nru a/arch/ppc64/kernel/entry.S b/arch/ppc64/kernel/entry.S
--- a/arch/ppc64/kernel/entry.S 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/entry.S 2005-03-20 16:30:37 -08:00
@@ -616,7 +616,7 @@
bl .unrecoverable_exception
b unrecov_restore
-#ifdef CONFIG_PPC_PSERIES
+#ifdef CONFIG_PPC_RTAS
/*
* On CHRP, the Run-Time Abstraction Services (RTAS) have to be
* called with the MMU off.
@@ -753,7 +753,7 @@
mtlr r0
blr /* return to caller */
-#endif /* CONFIG_PPC_PSERIES */
+#endif /* CONFIG_PPC_RTAS */
#ifdef CONFIG_PPC_MULTIPLATFORM
diff -Nru a/arch/ppc64/kernel/iSeries_setup.c b/arch/ppc64/kernel/iSeries_setup.c
--- a/arch/ppc64/kernel/iSeries_setup.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/iSeries_setup.c 2005-03-20 16:30:37 -08:00
@@ -15,7 +15,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-
+
#undef DEBUG
#include <linux/config.h>
@@ -39,6 +39,7 @@
#include <asm/mmu_context.h>
#include <asm/cputable.h>
#include <asm/sections.h>
+#include <asm/iommu.h>
#include <asm/time.h>
#include "iSeries_setup.h"
@@ -57,6 +58,7 @@
#include <asm/iSeries/iSeries_proc.h>
#include <asm/iSeries/mf.h>
#include <asm/iSeries/HvLpEvent.h>
+#include <asm/iSeries/iSeries_irq.h>
extern void hvlog(char *fmt, ...);
@@ -72,7 +74,6 @@
static void build_iSeries_Memory_Map(void);
static void setup_iSeries_cache_sizes(void);
static void iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr);
-extern void iSeries_setup_arch(void);
extern void iSeries_pci_final_fixup(void);
/* Global Variables */
@@ -108,8 +109,8 @@
* and return the number of physical blocks and fill in the array of
* block data.
*/
-unsigned long iSeries_process_Condor_mainstore_vpd(struct MemoryBlock *mb_array,
- unsigned long max_entries)
+static unsigned long iSeries_process_Condor_mainstore_vpd(
+ struct MemoryBlock *mb_array, unsigned long max_entries)
{
unsigned long holeFirstChunk, holeSizeChunks;
unsigned long numMemoryBlocks = 1;
@@ -154,7 +155,7 @@
#define MaxSegmentAdrRangeBlocks 128
#define MaxAreaRangeBlocks 4
-unsigned long iSeries_process_Regatta_mainstore_vpd(
+static unsigned long iSeries_process_Regatta_mainstore_vpd(
struct MemoryBlock *mb_array, unsigned long max_entries)
{
struct IoHriMainStoreSegment5 *msVpdP =
@@ -246,7 +247,7 @@
printk(" Bitmap range: %016lx - %016lx\n"
" Absolute range: %016lx - %016lx\n",
mb_array[i].logicalStart,
- mb_array[i].logicalEnd,
+ mb_array[i].logicalEnd,
mb_array[i].absStart, mb_array[i].absEnd);
mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
0x000fffffffffffff);
@@ -261,7 +262,7 @@
return numSegmentBlocks;
}
-unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
+static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
unsigned long max_entries)
{
unsigned long i;
@@ -302,7 +303,7 @@
*p = 0;
}
-/*static*/ void __init iSeries_init_early(void)
+static void __init iSeries_init_early(void)
{
DBG(" -> iSeries_init_early()\n");
@@ -355,7 +356,7 @@
#ifdef CONFIG_SMP
smp_init_iSeries();
#endif
- if (itLpNaca.xPirEnvironMode == 0)
+ if (itLpNaca.xPirEnvironMode == 0)
piranha_simulator = 1;
/* Associate Lp Event Queue 0 with processor 0 */
@@ -385,21 +386,21 @@
/*
* The iSeries may have very large memories ( > 128 GB ) and a partition
* may get memory in "chunks" that may be anywhere in the 2**52 real
- * address space. The chunks are 256K in size. To map this to the
- * memory model Linux expects, the AS/400 specific code builds a
+ * address space. The chunks are 256K in size. To map this to the
+ * memory model Linux expects, the AS/400 specific code builds a
* translation table to translate what Linux thinks are "physical"
- * addresses to the actual real addresses. This allows us to make
+ * addresses to the actual real addresses. This allows us to make
* it appear to Linux that we have contiguous memory starting at
* physical address zero while in fact this could be far from the truth.
- * To avoid confusion, I'll let the words physical and/or real address
- * apply to the Linux addresses while I'll use "absolute address" to
+ * To avoid confusion, I'll let the words physical and/or real address
+ * apply to the Linux addresses while I'll use "absolute address" to
* refer to the actual hardware real address.
*
- * build_iSeries_Memory_Map gets information from the Hypervisor and
+ * build_iSeries_Memory_Map gets information from the Hypervisor and
* looks at the Main Store VPD to determine the absolute addresses
* of the memory that has been assigned to our partition and builds
* a table used to translate Linux's physical addresses to these
- * absolute addresses. Absolute addresses are needed when
+ * absolute addresses. Absolute addresses are needed when
* communicating with the hypervisor (e.g. to build HPT entries)
*/
@@ -428,13 +429,13 @@
* otherwise, it might not be returned by PLIC as the first
* chunks
*/
-
+
loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
loadAreaSize = itLpNaca.xLoadAreaChunks;
/*
- * Only add the pages already mapped here.
- * Otherwise we might add the hpt pages
+ * Only add the pages already mapped here.
+ * Otherwise we might add the hpt pages
* The rest of the pages of the load area
* aren't in the HPT yet and can still
* be assigned an arbitrary physical address
@@ -446,7 +447,7 @@
/*
* TODO Do we need to do something if the HPT is in the 64MB load area?
- * This would be required if the itLpNaca.xLoadAreaChunks includes
+ * This would be required if the itLpNaca.xLoadAreaChunks includes
* the HPT size
*/
@@ -454,11 +455,11 @@
" absolute addr = %016lx\n",
chunk_to_addr(loadAreaFirstChunk));
printk("Load area size %dK\n", loadAreaSize * 256);
-
+
for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
msChunks.abs[nextPhysChunk] =
loadAreaFirstChunk + nextPhysChunk;
-
+
/*
* Get absolute address of our HPT and remember it so
* we won't map it to any physical address
@@ -475,7 +476,7 @@
num_ptegs = hptSizePages *
(PAGE_SIZE / (sizeof(HPTE) * HPTES_PER_GROUP));
htab_hash_mask = num_ptegs - 1;
-
+
/*
* The actual hashed page table is in the hypervisor,
* we have no direct access
@@ -533,9 +534,9 @@
}
/*
- * main store size (in chunks) is
+ * main store size (in chunks) is
* totalChunks - hptSizeChunks
- * which should be equal to
+ * which should be equal to
* nextPhysChunk
*/
systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
@@ -654,7 +655,7 @@
/*
* Document me.
*/
-void __init iSeries_setup_arch(void)
+static void __init iSeries_setup_arch(void)
{
void *eventStack;
unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
@@ -673,14 +674,14 @@
*/
eventStack = alloc_bootmem_pages(LpEventStackSize);
memset(eventStack, 0, LpEventStackSize);
-
+
/* Invoke the hypervisor to initialize the event stack */
HvCallEvent_setLpEventStack(0, eventStack, LpEventStackSize);
/* Initialize fields in our Lp Event Queue */
xItLpQueue.xSlicEventStackPtr = (char *)eventStack;
xItLpQueue.xSlicCurEventPtr = (char *)eventStack;
- xItLpQueue.xSlicLastValidEventPtr = (char *)eventStack +
+ xItLpQueue.xSlicLastValidEventPtr = (char *)eventStack +
(LpEventStackSize - LpEventMaxSize);
xItLpQueue.xIndex = 0;
@@ -698,7 +699,7 @@
tbFreqMhzHundreths = (tbFreqHz / 10000) - (tbFreqMhz * 100);
ppc_tb_freq = tbFreqHz;
- printk("Max logical processors = %d\n",
+ printk("Max logical processors = %d\n",
itVpdAreas.xSlicMaxLogicalProcs);
printk("Max physical processors = %d\n",
itVpdAreas.xSlicMaxPhysicalProcs);
@@ -710,7 +711,7 @@
printk("Processor version = %x\n", systemcfg->processor);
}
-void iSeries_get_cpuinfo(struct seq_file *m)
+static void iSeries_get_cpuinfo(struct seq_file *m)
{
seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
}
@@ -719,7 +720,7 @@
* Document me.
* and Implement me.
*/
-int iSeries_get_irq(struct pt_regs *regs)
+static int iSeries_get_irq(struct pt_regs *regs)
{
/* -2 means ignore this interrupt */
return -2;
@@ -728,7 +729,7 @@
/*
* Document me.
*/
-void iSeries_restart(char *cmd)
+static void iSeries_restart(char *cmd)
{
mf_reboot();
}
@@ -736,7 +737,7 @@
/*
* Document me.
*/
-void iSeries_power_off(void)
+static void iSeries_power_off(void)
{
mf_power_off();
}
@@ -744,14 +745,11 @@
/*
* Document me.
*/
-void iSeries_halt(void)
+static void iSeries_halt(void)
{
mf_power_off();
}
-/* JDH Hack */
-unsigned long jdh_time = 0;
-
extern void setup_default_decr(void);
/*
@@ -762,17 +760,17 @@
* and sets up the kernel timer decrementer based on that value.
*
*/
-void __init iSeries_calibrate_decr(void)
+static void __init iSeries_calibrate_decr(void)
{
unsigned long cyclesPerUsec;
struct div_result divres;
-
+
/* Compute decrementer (and TB) frequency in cycles/sec */
cyclesPerUsec = ppc_tb_freq / 1000000;
/*
* Set the amount to refresh the decrementer by. This
- * is the number of decrementer ticks it takes for
+ * is the number of decrementer ticks it takes for
* 1/HZ seconds.
*/
tb_ticks_per_jiffy = ppc_tb_freq / HZ;
@@ -797,7 +795,7 @@
setup_default_decr();
}
-void __init iSeries_progress(char * st, unsigned short code)
+static void __init iSeries_progress(char * st, unsigned short code)
{
printk("Progress: [%04x] - %s\n", (unsigned)code, st);
if (!piranha_simulator && mf_initialized) {
@@ -829,7 +827,7 @@
}
}
-int __init iSeries_src_init(void)
+static int __init iSeries_src_init(void)
{
/* clear the progress line */
ppc_md.progress(" ", 0xffff);
diff -Nru a/arch/ppc64/kernel/iSeries_setup.h b/arch/ppc64/kernel/iSeries_setup.h
--- a/arch/ppc64/kernel/iSeries_setup.h 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/iSeries_setup.h 2005-03-20 16:30:37 -08:00
@@ -19,19 +19,8 @@
#ifndef __ISERIES_SETUP_H__
#define __ISERIES_SETUP_H__
-extern void iSeries_setup_arch(void);
-extern void iSeries_setup_residual(struct seq_file *m, int cpu_id);
-extern void iSeries_get_cpuinfo(struct seq_file *m);
-extern void iSeries_init_IRQ(void);
-extern int iSeries_get_irq(struct pt_regs *regs);
-extern void iSeries_restart(char *cmd);
-extern void iSeries_power_off(void);
-extern void iSeries_halt(void);
-extern void iSeries_time_init(void);
extern void iSeries_get_boot_time(struct rtc_time *tm);
extern int iSeries_set_rtc_time(struct rtc_time *tm);
extern void iSeries_get_rtc_time(struct rtc_time *tm);
-extern void iSeries_calibrate_decr(void);
-extern void iSeries_progress( char *, unsigned short );
#endif /* __ISERIES_SETUP_H__ */
diff -Nru a/arch/ppc64/kernel/kprobes.c b/arch/ppc64/kernel/kprobes.c
--- a/arch/ppc64/kernel/kprobes.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/kprobes.c 2005-03-20 16:30:37 -08:00
@@ -80,9 +80,6 @@
int ret = 0;
unsigned int *addr = (unsigned int *)regs->nip;
- /* We're in an interrupt, but this is clear and BUG()-safe. */
- preempt_disable();
-
/* Check we're not actually recursing */
if (kprobe_running()) {
/* We *are* holding lock here, so this is safe.
@@ -139,10 +136,14 @@
ss_probe:
prepare_singlestep(p, regs);
kprobe_status = KPROBE_HIT_SS;
+ /*
+ * This preempt_disable() matches the preempt_enable_no_resched()
+ * in post_kprobe_handler().
+ */
+ preempt_disable();
return 1;
no_kprobe:
- preempt_enable_no_resched();
return ret;
}
@@ -215,27 +216,35 @@
void *data)
{
struct die_args *args = (struct die_args *)data;
+ int ret = NOTIFY_DONE;
+
+ /*
+ * Interrupts are not disabled here. We need to disable
+ * preemption, because kprobe_running() uses smp_processor_id().
+ */
+ preempt_disable();
switch (val) {
case DIE_IABR_MATCH:
case DIE_DABR_MATCH:
case DIE_BPT:
if (kprobe_handler(args->regs))
- return NOTIFY_STOP;
+ ret = NOTIFY_STOP;
break;
case DIE_SSTEP:
if (post_kprobe_handler(args->regs))
- return NOTIFY_STOP;
+ ret = NOTIFY_STOP;
break;
case DIE_GPF:
case DIE_PAGE_FAULT:
if (kprobe_running() &&
kprobe_fault_handler(args->regs, args->trapnr))
- return NOTIFY_STOP;
+ ret = NOTIFY_STOP;
break;
default:
break;
}
- return NOTIFY_DONE;
+ preempt_enable();
+ return ret;
}
int setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
@@ -253,7 +262,6 @@
void jprobe_return(void)
{
- preempt_enable_no_resched();
asm volatile("trap" ::: "memory");
}
diff -Nru a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S
--- a/arch/ppc64/kernel/misc.S 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/misc.S 2005-03-20 16:30:37 -08:00
@@ -680,7 +680,7 @@
ld r30,-16(r1)
blr
-#ifndef CONFIG_PPC_PSERIES /* hack hack hack */
+#ifdef CONFIG_PPC_RTAS /* hack hack hack */
#define ppc_rtas sys_ni_syscall
#endif
diff -Nru a/arch/ppc64/kernel/nvram.c b/arch/ppc64/kernel/nvram.c
--- a/arch/ppc64/kernel/nvram.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/nvram.c 2005-03-20 16:30:37 -08:00
@@ -507,8 +507,8 @@
struct nvram_partition * tmp_part;
unsigned char c_sum;
char * header;
- long size;
int total_size;
+ int err;
if (ppc_md.nvram_size == NULL)
return -ENODEV;
@@ -522,29 +522,37 @@
while (cur_index < total_size) {
- size = ppc_md.nvram_read(header, NVRAM_HEADER_LEN, &cur_index);
- if (size != NVRAM_HEADER_LEN) {
+ err = ppc_md.nvram_read(header, NVRAM_HEADER_LEN, &cur_index);
+ if (err != NVRAM_HEADER_LEN) {
printk(KERN_ERR "nvram_scan_partitions: Error parsing "
"nvram partitions\n");
- kfree(header);
- return size;
+ goto out;
}
cur_index -= NVRAM_HEADER_LEN; /* nvram_read will advance us */
memcpy(&phead, header, NVRAM_HEADER_LEN);
+ err = 0;
c_sum = nvram_checksum(&phead);
- if (c_sum != phead.checksum)
- printk(KERN_WARNING "WARNING: nvram partition checksum "
- "was %02x, should be %02x!\n", phead.checksum, c_sum);
-
+ if (c_sum != phead.checksum) {
+ printk(KERN_WARNING "WARNING: nvram partition checksum"
+ " was %02x, should be %02x!\n",
+ phead.checksum, c_sum);
+ printk(KERN_WARNING "Terminating nvram partition scan\n");
+ goto out;
+ }
+ if (!phead.length) {
+ printk(KERN_WARNING "WARNING: nvram corruption "
+ "detected: 0-length partition\n");
+ goto out;
+ }
tmp_part = (struct nvram_partition *)
kmalloc(sizeof(struct nvram_partition), GFP_KERNEL);
+ err = -ENOMEM;
if (!tmp_part) {
printk(KERN_ERR "nvram_scan_partitions: kmalloc failed\n");
- kfree(header);
- return -ENOMEM;
+ goto out;
}
memcpy(&tmp_part->header, &phead, NVRAM_HEADER_LEN);
@@ -553,9 +561,11 @@
cur_index += phead.length * NVRAM_BLOCK_LEN;
}
+ err = 0;
+ out:
kfree(header);
- return 0;
+ return err;
}
static int __init nvram_init(void)
diff -Nru a/arch/ppc64/kernel/pSeries_pci.c b/arch/ppc64/kernel/pSeries_pci.c
--- a/arch/ppc64/kernel/pSeries_pci.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/pSeries_pci.c 2005-03-20 16:30:37 -08:00
@@ -540,6 +540,9 @@
static void __init pSeries_request_regions(void)
{
+ if (!isa_io_base)
+ return;
+
request_region(0x20,0x20,"pic1");
request_region(0xa0,0x20,"pic2");
request_region(0x00,0x20,"dma1");
diff -Nru a/arch/ppc64/kernel/pSeries_smp.c b/arch/ppc64/kernel/pSeries_smp.c
--- a/arch/ppc64/kernel/pSeries_smp.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/pSeries_smp.c 2005-03-20 16:30:37 -08:00
@@ -44,6 +44,7 @@
#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/plpar_wrappers.h>
+#include <asm/pSeries_reconfig.h>
#include "mpic.h"
@@ -53,8 +54,16 @@
#define DBG(fmt...)
#endif
+/*
+ * The primary thread of each non-boot processor is recorded here before
+ * smp init.
+ */
+static cpumask_t of_spin_map;
+
extern void pSeries_secondary_smp_init(unsigned long);
+#ifdef CONFIG_HOTPLUG_CPU
+
/* Get state of physical CPU.
* Return codes:
* 0 - The processor is in the RTAS stopped state
@@ -81,9 +90,6 @@
return cpu_status;
}
-
-#ifdef CONFIG_HOTPLUG_CPU
-
int pSeries_cpu_disable(void)
{
systemcfg->processorCount--;
@@ -122,60 +128,134 @@
paca[cpu].cpu_start = 0;
}
-/* Search all cpu device nodes for an offline logical cpu. If a
- * device node has a "ibm,my-drc-index" property (meaning this is an
- * LPAR), paranoid-check whether we own the cpu. For each "thread"
- * of a cpu, if it is offline and has the same hw index as before,
- * grab that in preference.
+/*
+ * Update cpu_present_map and paca(s) for a new cpu node. The wrinkle
+ * here is that a cpu device node may represent up to two logical cpus
+ * in the SMT case. We must honor the assumption in other code that
+ * the logical ids for sibling SMT threads x and y are adjacent, such
+ * that x^1 == y and y^1 == x.
*/
-static unsigned int find_physical_cpu_to_start(unsigned int old_hwindex)
+static int pSeries_add_processor(struct device_node *np)
{
- struct device_node *np = NULL;
- unsigned int best = -1U;
+ unsigned int cpu;
+ cpumask_t candidate_map, tmp = CPU_MASK_NONE;
+ int err = -ENOSPC, len, nthreads, i;
+ u32 *intserv;
- while ((np = of_find_node_by_type(np, "cpu"))) {
- int nr_threads, len;
- u32 *index = (u32 *)get_property(np, "ibm,my-drc-index", NULL);
- u32 *tid = (u32 *)
- get_property(np, "ibm,ppc-interrupt-server#s", &len);
+ intserv = (u32 *)get_property(np, "ibm,ppc-interrupt-server#s", &len);
+ if (!intserv)
+ return 0;
- if (!tid)
- tid = (u32 *)get_property(np, "reg", &len);
+ nthreads = len / sizeof(u32);
+ for (i = 0; i < nthreads; i++)
+ cpu_set(i, tmp);
+
+ lock_cpu_hotplug();
+
+ BUG_ON(!cpus_subset(cpu_present_map, cpu_possible_map));
+
+ /* Get a bitmap of unoccupied slots. */
+ cpus_xor(candidate_map, cpu_possible_map, cpu_present_map);
+ if (cpus_empty(candidate_map)) {
+ /* If we get here, it most likely means that NR_CPUS is
+ * less than the partition's max processors setting.
+ */
+ printk(KERN_ERR "Cannot add cpu %s; this system configuration"
+ " supports %d logical cpus.\n", np->full_name,
+ cpus_weight(cpu_possible_map));
+ goto out_unlock;
+ }
- if (!tid)
- continue;
+ while (!cpus_empty(tmp))
+ if (cpus_subset(tmp, candidate_map))
+ /* Found a range where we can insert the new cpu(s) */
+ break;
+ else
+ cpus_shift_left(tmp, tmp, nthreads);
- /* If there is a drc-index, make sure that we own
- * the cpu.
- */
- if (index) {
- int state;
- int rc = rtas_get_sensor(9003, *index, &state);
- if (rc < 0 || state != 1)
+ if (cpus_empty(tmp)) {
+ printk(KERN_ERR "Unable to find space in cpu_present_map for"
+ " processor %s with %d thread(s)\n", np->name,
+ nthreads);
+ goto out_unlock;
+ }
+
+ for_each_cpu_mask(cpu, tmp) {
+ BUG_ON(cpu_isset(cpu, cpu_present_map));
+ cpu_set(cpu, cpu_present_map);
+ set_hard_smp_processor_id(cpu, *intserv++);
+ }
+ err = 0;
+out_unlock:
+ unlock_cpu_hotplug();
+ return err;
+}
+
+/*
+ * Update the present map for a cpu node which is going away, and set
+ * the hard id in the paca(s) to -1 to be consistent with boot time
+ * convention for non-present cpus.
+ */
+static void pSeries_remove_processor(struct device_node *np)
+{
+ unsigned int cpu;
+ int len, nthreads, i;
+ u32 *intserv;
+
+ intserv = (u32 *)get_property(np, "ibm,ppc-interrupt-server#s", &len);
+ if (!intserv)
+ return;
+
+ nthreads = len / sizeof(u32);
+
+ lock_cpu_hotplug();
+ for (i = 0; i < nthreads; i++) {
+ for_each_present_cpu(cpu) {
+ if (get_hard_smp_processor_id(cpu) != intserv[i])
continue;
+ BUG_ON(cpu_online(cpu));
+ cpu_clear(cpu, cpu_present_map);
+ set_hard_smp_processor_id(cpu, -1);
+ break;
}
+ if (cpu == NR_CPUS)
+ printk(KERN_WARNING "Could not find cpu to remove "
+ "with physical id 0x%x\n", intserv[i]);
+ }
+ unlock_cpu_hotplug();
+}
- nr_threads = len / sizeof(u32);
+static int pSeries_smp_notifier(struct notifier_block *nb, unsigned long action, void *node)
+{
+ int err = NOTIFY_OK;
- while (nr_threads--) {
- if (0 == query_cpu_stopped(tid[nr_threads])) {
- best = tid[nr_threads];
- if (best == old_hwindex)
- goto out;
- }
- }
+ switch (action) {
+ case PSERIES_RECONFIG_ADD:
+ if (pSeries_add_processor(node))
+ err = NOTIFY_BAD;
+ break;
+ case PSERIES_RECONFIG_REMOVE:
+ pSeries_remove_processor(node);
+ break;
+ default:
+ err = NOTIFY_DONE;
+ break;
}
-out:
- of_node_put(np);
- return best;
+ return err;
}
+static struct notifier_block pSeries_smp_nb = {
+ .notifier_call = pSeries_smp_notifier,
+};
+
+#endif /* CONFIG_HOTPLUG_CPU */
+
/**
* smp_startup_cpu() - start the given cpu
*
- * At boot time, there is nothing to do. At run-time, call RTAS with
- * the appropriate start location, if the cpu is in the RTAS stopped
- * state.
+ * At boot time, there is nothing to do for primary threads which were
+ * started from Open Firmware. For anything else, call RTAS with the
+ * appropriate start location.
*
* Returns:
* 0 - failure
@@ -188,23 +268,15 @@
pSeries_secondary_smp_init));
unsigned int pcpu;
- /* At boot time the cpus are already spinning in hold
- * loops, so nothing to do. */
- if (system_state < SYSTEM_RUNNING)
+ if (cpu_isset(lcpu, of_spin_map))
+ /* Already started by OF and sitting in spin loop */
return 1;
- pcpu = find_physical_cpu_to_start(get_hard_smp_processor_id(lcpu));
- if (pcpu == -1U) {
- printk(KERN_INFO "No more cpus available, failing\n");
- return 0;
- }
+ pcpu = get_hard_smp_processor_id(lcpu);
/* Fixup atomic count: it exited inside IRQ handler. */
paca[lcpu].__current->thread_info->preempt_count = 0;
- /* At boot this is done in prom.c. */
- paca[lcpu].hw_cpu_id = pcpu;
-
status = rtas_call(rtas_token("start-cpu"), 3, 1, NULL,
pcpu, start_here, lcpu);
if (status != 0) {
@@ -213,12 +285,6 @@
}
return 1;
}
-#else /* ... CONFIG_HOTPLUG_CPU */
-static inline int __devinit smp_startup_cpu(unsigned int lcpu)
-{
- return 1;
-}
-#endif /* CONFIG_HOTPLUG_CPU */
static inline void smp_xics_do_message(int cpu, int msg)
{
@@ -258,6 +324,8 @@
if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
vpa_init(cpu);
+ cpu_clear(cpu, of_spin_map);
+
/*
* Put the calling processor into the GIQ. This is really only
* necessary from a secondary thread as the OF start-cpu interface
@@ -307,6 +375,20 @@
paca[nr].cpu_start = 1;
}
+static int smp_pSeries_cpu_bootable(unsigned int nr)
+{
+ /* Special case - we inhibit secondary thread startup
+ * during boot if the user requests it. Odd-numbered
+ * cpus are assumed to be secondary threads.
+ */
+ if (system_state < SYSTEM_RUNNING &&
+ cur_cpu_spec->cpu_features & CPU_FTR_SMT &&
+ !smt_enabled_at_boot && nr % 2 != 0)
+ return 0;
+
+ return 1;
+}
+
static struct smp_ops_t pSeries_mpic_smp_ops = {
.message_pass = smp_mpic_message_pass,
.probe = smp_mpic_probe,
@@ -319,12 +401,13 @@
.probe = smp_xics_probe,
.kick_cpu = smp_pSeries_kick_cpu,
.setup_cpu = smp_xics_setup_cpu,
+ .cpu_bootable = smp_pSeries_cpu_bootable,
};
/* This is called very early */
void __init smp_init_pSeries(void)
{
- int ret, i;
+ int i;
DBG(" -> smp_init_pSeries()\n");
@@ -336,22 +419,26 @@
#ifdef CONFIG_HOTPLUG_CPU
smp_ops->cpu_disable = pSeries_cpu_disable;
smp_ops->cpu_die = pSeries_cpu_die;
+
+ /* Processors can be added/removed only on LPAR */
+ if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
+ pSeries_reconfig_notifier_register(&pSeries_smp_nb);
#endif
- /* Start secondary threads on SMT systems; primary threads
- * are already in the running state.
- */
- for_each_present_cpu(i) {
- if (query_cpu_stopped(get_hard_smp_processor_id(i)) == 0) {
- printk("%16.16x : starting thread\n", i);
- DBG("%16.16x : starting thread\n", i);
- rtas_call(rtas_token("start-cpu"), 3, 1, &ret,
- get_hard_smp_processor_id(i),
- __pa((u32)*((unsigned long *)
- pSeries_secondary_smp_init)),
- i);
+ /* Mark threads which are still spinning in hold loops. */
+ if (cur_cpu_spec->cpu_features & CPU_FTR_SMT)
+ for_each_present_cpu(i) {
+ if (i % 2 == 0)
+ /*
+ * Even-numbered logical cpus correspond to
+ * primary threads.
+ */
+ cpu_set(i, of_spin_map);
}
- }
+ else
+ of_spin_map = cpu_present_map;
+
+ cpu_clear(boot_cpuid, of_spin_map);
/* Non-lpar has additional take/give timebase */
if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
diff -Nru a/arch/ppc64/kernel/prom.c b/arch/ppc64/kernel/prom.c
--- a/arch/ppc64/kernel/prom.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/prom.c 2005-03-20 16:30:37 -08:00
@@ -894,7 +894,7 @@
if (get_flat_dt_prop(node, "linux,iommu-force-on", NULL) != NULL)
iommu_force_on = 1;
-#ifdef CONFIG_PPC_PSERIES
+#ifdef CONFIG_PPC_RTAS
/* To help early debugging via the front panel, we retreive a minimal
* set of RTAS infos now if available
*/
@@ -910,7 +910,7 @@
rtas.size = *prop;
}
}
-#endif /* CONFIG_PPC_PSERIES */
+#endif /* CONFIG_PPC_RTAS */
/* break now */
return 1;
diff -Nru a/arch/ppc64/kernel/rtasd.c b/arch/ppc64/kernel/rtasd.c
--- a/arch/ppc64/kernel/rtasd.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/rtasd.c 2005-03-20 16:30:37 -08:00
@@ -399,10 +399,33 @@
} while(error == 0);
}
+static void do_event_scan_all_cpus(long delay)
+{
+ int cpu;
+
+ lock_cpu_hotplug();
+ cpu = first_cpu(cpu_online_map);
+ for (;;) {
+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
+ do_event_scan(rtas_token("event-scan"));
+ set_cpus_allowed(current, CPU_MASK_ALL);
+
+ /* Drop hotplug lock, and sleep for the specified delay */
+ unlock_cpu_hotplug();
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(delay);
+ lock_cpu_hotplug();
+
+ cpu = next_cpu(cpu, cpu_online_map);
+ if (cpu == NR_CPUS)
+ break;
+ }
+ unlock_cpu_hotplug();
+}
+
static int rtasd(void *unused)
{
unsigned int err_type;
- int cpu = 0;
int event_scan = rtas_token("event-scan");
int rc;
@@ -436,17 +459,7 @@
}
/* First pass. */
- lock_cpu_hotplug();
- for_each_online_cpu(cpu) {
- DEBUG("scheduling on %d\n", cpu);
- set_cpus_allowed(current, cpumask_of_cpu(cpu));
- DEBUG("watchdog scheduled on cpu %d\n", smp_processor_id());
-
- do_event_scan(event_scan);
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(HZ);
- }
- unlock_cpu_hotplug();
+ do_event_scan_all_cpus(HZ);
if (surveillance_timeout != -1) {
DEBUG("enabling surveillance\n");
@@ -454,25 +467,11 @@
DEBUG("surveillance enabled\n");
}
- lock_cpu_hotplug();
- cpu = first_cpu(cpu_online_map);
- for (;;) {
- set_cpus_allowed(current, cpumask_of_cpu(cpu));
- do_event_scan(event_scan);
- set_cpus_allowed(current, CPU_MASK_ALL);
-
- /* Drop hotplug lock, and sleep for a bit (at least
- * one second since some machines have problems if we
- * call event-scan too quickly). */
- unlock_cpu_hotplug();
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout((HZ*60/rtas_event_scan_rate) / 2);
- lock_cpu_hotplug();
-
- cpu = next_cpu(cpu, cpu_online_map);
- if (cpu == NR_CPUS)
- cpu = first_cpu(cpu_online_map);
- }
+ /* Delay should be at least one second since some
+ * machines have problems if we call event-scan too
+ * quickly. */
+ for (;;)
+ do_event_scan_all_cpus((HZ*60/rtas_event_scan_rate) / 2);
error:
/* Should delete proc entries */
diff -Nru a/arch/ppc64/kernel/rtc.c b/arch/ppc64/kernel/rtc.c
--- a/arch/ppc64/kernel/rtc.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/rtc.c 2005-03-20 16:30:37 -08:00
@@ -337,7 +337,7 @@
}
#endif
-#ifdef CONFIG_PPC_PSERIES
+#ifdef CONFIG_PPC_RTAS
#define MAX_RTC_WAIT 5000 /* 5 sec */
#define RTAS_CLOCK_BUSY (-2)
void pSeries_get_boot_time(struct rtc_time *rtc_tm)
diff -Nru a/arch/ppc64/kernel/setup.c b/arch/ppc64/kernel/setup.c
--- a/arch/ppc64/kernel/setup.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/setup.c 2005-03-20 16:30:37 -08:00
@@ -269,15 +269,9 @@
nthreads = len / sizeof(u32);
for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
- /*
- * Only spin up secondary threads if SMT is enabled.
- * We must leave space in the logical map for the
- * threads.
- */
- if (j == 0 || smt_enabled_at_boot) {
- cpu_set(cpu, cpu_present_map);
- set_hard_smp_processor_id(cpu, intserv[j]);
- }
+ cpu_set(cpu, cpu_present_map);
+ set_hard_smp_processor_id(cpu, intserv[j]);
+
if (intserv[j] == boot_cpuid_phys)
swap_cpuid = cpu;
cpu_set(cpu, cpu_possible_map);
@@ -605,12 +599,12 @@
*/
initialize_cache_info();
-#ifdef CONFIG_PPC_PSERIES
+#ifdef CONFIG_PPC_RTAS
/*
* Initialize RTAS if available
*/
rtas_initialize();
-#endif /* CONFIG_PPC_PSERIES */
+#endif /* CONFIG_PPC_RTAS */
/*
* Check if we have an initrd provided via the device-tree
@@ -1367,6 +1361,12 @@
static int __init early_xmon(char *p)
{
/* ensure xmon is enabled */
+ if (p) {
+ if (strncmp(p, "on", 2) == 0)
+ xmon_init();
+ if (strncmp(p, "early", 5) != 0)
+ return 0;
+ }
xmon_init();
debugger(NULL);
diff -Nru a/arch/ppc64/kernel/smp.c b/arch/ppc64/kernel/smp.c
--- a/arch/ppc64/kernel/smp.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/smp.c 2005-03-20 16:30:37 -08:00
@@ -488,9 +488,8 @@
if (!cpu_enable(cpu))
return 0;
- /* At boot, don't bother with non-present cpus -JSCHOPP */
- if (system_state < SYSTEM_RUNNING && !cpu_present(cpu))
- return -ENOENT;
+ if (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))
+ return -EINVAL;
paca[cpu].default_decr = tb_ticks_per_jiffy / decr_overclock;
@@ -604,14 +603,6 @@
smp_ops->setup_cpu(boot_cpuid);
set_cpus_allowed(current, old_mask);
-
- /*
- * We know at boot the maximum number of cpus we can add to
- * a partition and set cpu_possible_map accordingly. cpu_present_map
- * needs to match for the hotplug code to allow us to hot add
- * any offline cpus.
- */
- cpu_present_map = cpu_possible_map;
}
#ifdef CONFIG_HOTPLUG_CPU
diff -Nru a/arch/ppc64/kernel/viopath.c b/arch/ppc64/kernel/viopath.c
--- a/arch/ppc64/kernel/viopath.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/kernel/viopath.c 2005-03-20 16:30:37 -08:00
@@ -42,6 +42,7 @@
#include <asm/system.h>
#include <asm/uaccess.h>
+#include <asm/iSeries/HvTypes.h>
#include <asm/iSeries/LparData.h>
#include <asm/iSeries/HvLpEvent.h>
#include <asm/iSeries/HvLpConfig.h>
@@ -56,8 +57,8 @@
* But this allows for other support in the future.
*/
static struct viopathStatus {
- int isOpen:1; /* Did we open the path? */
- int isActive:1; /* Do we have a mon msg outstanding */
+ int isOpen; /* Did we open the path? */
+ int isActive; /* Do we have a mon msg outstanding */
int users[VIO_MAX_SUBTYPES];
HvLpInstanceId mSourceInst;
HvLpInstanceId mTargetInst;
@@ -81,10 +82,10 @@
* blocks on the semaphore and the handler posts the semaphore. However,
* if system_state is not SYSTEM_RUNNING, then wait_atomic is used ...
*/
-struct doneAllocParms_t {
- struct semaphore *sem;
+struct alloc_parms {
+ struct semaphore sem;
int number;
- atomic_t *wait_atomic;
+ atomic_t wait_atomic;
int used_wait_atomic;
};
@@ -97,9 +98,9 @@
/* Our hosting logical partition. We get this at startup
* time, and different modules access this variable directly.
*/
-HvLpIndex viopath_hostLp = 0xff; /* HvLpIndexInvalid */
+HvLpIndex viopath_hostLp = HvLpIndexInvalid;
EXPORT_SYMBOL(viopath_hostLp);
-HvLpIndex viopath_ourLp = 0xff;
+HvLpIndex viopath_ourLp = HvLpIndexInvalid;
EXPORT_SYMBOL(viopath_ourLp);
/* For each kind of incoming event we set a pointer to a
@@ -200,7 +201,7 @@
/*
* We cache the source and target instance ids for each
- * partition.
+ * partition.
*/
HvLpInstanceId viopath_sourceinst(HvLpIndex lp)
{
@@ -450,36 +451,33 @@
static void viopath_donealloc(void *parm, int number)
{
- struct doneAllocParms_t *parmsp = (struct doneAllocParms_t *)parm;
+ struct alloc_parms *parmsp = parm;
parmsp->number = number;
if (parmsp->used_wait_atomic)
- atomic_set(parmsp->wait_atomic, 0);
+ atomic_set(&parmsp->wait_atomic, 0);
else
- up(parmsp->sem);
+ up(&parmsp->sem);
}
static int allocateEvents(HvLpIndex remoteLp, int numEvents)
{
- struct doneAllocParms_t parms;
- DECLARE_MUTEX_LOCKED(Semaphore);
- atomic_t wait_atomic;
+ struct alloc_parms parms;
if (system_state != SYSTEM_RUNNING) {
parms.used_wait_atomic = 1;
- atomic_set(&wait_atomic, 1);
- parms.wait_atomic = &wait_atomic;
+ atomic_set(&parms.wait_atomic, 1);
} else {
parms.used_wait_atomic = 0;
- parms.sem = &Semaphore;
+ init_MUTEX_LOCKED(&parms.sem);
}
mf_allocate_lp_events(remoteLp, HvLpEvent_Type_VirtualIo, 250, /* It would be nice to put a real number here! */
numEvents, &viopath_donealloc, &parms);
if (system_state != SYSTEM_RUNNING) {
- while (atomic_read(&wait_atomic))
+ while (atomic_read(&parms.wait_atomic))
mb();
} else
- down(&Semaphore);
+ down(&parms.sem);
return parms.number;
}
@@ -558,8 +556,7 @@
unsigned long flags;
int i;
int numOpen;
- struct doneAllocParms_t doneAllocParms;
- DECLARE_MUTEX_LOCKED(Semaphore);
+ struct alloc_parms parms;
if ((remoteLp >= HvMaxArchitectedLps) || (remoteLp == HvLpIndexInvalid))
return -EINVAL;
@@ -580,11 +577,11 @@
spin_unlock_irqrestore(&statuslock, flags);
- doneAllocParms.used_wait_atomic = 0;
- doneAllocParms.sem = &Semaphore;
+ parms.used_wait_atomic = 0;
+ init_MUTEX_LOCKED(&parms.sem);
mf_deallocate_lp_events(remoteLp, HvLpEvent_Type_VirtualIo,
- numReq, &viopath_donealloc, &doneAllocParms);
- down(&Semaphore);
+ numReq, &viopath_donealloc, &parms);
+ down(&parms.sem);
spin_lock_irqsave(&statuslock, flags);
for (i = 0, numOpen = 0; i < VIO_MAX_SUBTYPES; i++)
diff -Nru a/arch/ppc64/mm/numa.c b/arch/ppc64/mm/numa.c
--- a/arch/ppc64/mm/numa.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/mm/numa.c 2005-03-20 16:30:37 -08:00
@@ -40,7 +40,6 @@
struct pglist_data *node_data[MAX_NUMNODES];
bootmem_data_t __initdata plat_node_bdata[MAX_NUMNODES];
-static unsigned long node0_io_hole_size;
static int min_common_depth;
/*
@@ -49,7 +48,8 @@
*/
static struct {
unsigned long node_start_pfn;
- unsigned long node_spanned_pages;
+ unsigned long node_end_pfn;
+ unsigned long node_present_pages;
} init_node_data[MAX_NUMNODES] __initdata;
EXPORT_SYMBOL(node_data);
@@ -186,14 +186,36 @@
return depth;
}
-static unsigned long read_cell_ul(struct device_node *device, unsigned int **buf)
+static int __init get_mem_addr_cells(void)
+{
+ struct device_node *memory = NULL;
+ int rc;
+
+ memory = of_find_node_by_type(memory, "memory");
+ if (!memory)
+ return 0; /* it won't matter */
+
+ rc = prom_n_addr_cells(memory);
+ return rc;
+}
+
+static int __init get_mem_size_cells(void)
+{
+ struct device_node *memory = NULL;
+ int rc;
+
+ memory = of_find_node_by_type(memory, "memory");
+ if (!memory)
+ return 0; /* it won't matter */
+ rc = prom_n_size_cells(memory);
+ return rc;
+}
+
+static unsigned long read_n_cells(int n, unsigned int **buf)
{
- int i;
unsigned long result = 0;
- i = prom_n_size_cells(device);
- /* bug on i>2 ?? */
- while (i--) {
+ while (n--) {
result = (result << 32) | **buf;
(*buf)++;
}
@@ -267,6 +289,7 @@
{
struct device_node *cpu = NULL;
struct device_node *memory = NULL;
+ int addr_cells, size_cells;
int max_domain = 0;
long entries = lmb_end_of_DRAM() >> MEMORY_INCREMENT_SHIFT;
unsigned long i;
@@ -313,6 +336,8 @@
}
}
+ addr_cells = get_mem_addr_cells();
+ size_cells = get_mem_size_cells();
memory = NULL;
while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
unsigned long start;
@@ -329,8 +354,8 @@
ranges = memory->n_addrs;
new_range:
/* these are order-sensitive, and modify the buffer pointer */
- start = read_cell_ul(memory, &memcell_buf);
- size = read_cell_ul(memory, &memcell_buf);
+ start = read_n_cells(addr_cells, &memcell_buf);
+ size = read_n_cells(size_cells, &memcell_buf);
start = _ALIGN_DOWN(start, MEMORY_INCREMENT);
size = _ALIGN_UP(size, MEMORY_INCREMENT);
@@ -348,33 +373,31 @@
if (max_domain < numa_domain)
max_domain = numa_domain;
- /*
- * For backwards compatibility, OF splits the first node
- * into two regions (the first being 0-4GB). Check for
- * this simple case and complain if there is a gap in
- * memory
+ /*
+ * Initialize new node struct, or add to an existing one.
*/
- if (init_node_data[numa_domain].node_spanned_pages) {
- unsigned long shouldstart =
- init_node_data[numa_domain].node_start_pfn +
- init_node_data[numa_domain].node_spanned_pages;
- if (shouldstart != (start / PAGE_SIZE)) {
- /* Revert to non-numa for now */
- printk(KERN_ERR
- "WARNING: Unexpected node layout: "
- "region start %lx length %lx\n",
- start, size);
- printk(KERN_ERR "NUMA is disabled\n");
- goto err;
- }
- init_node_data[numa_domain].node_spanned_pages +=
+ if (init_node_data[numa_domain].node_end_pfn) {
+ if ((start / PAGE_SIZE) <
+ init_node_data[numa_domain].node_start_pfn)
+ init_node_data[numa_domain].node_start_pfn =
+ start / PAGE_SIZE;
+ if (((start / PAGE_SIZE) + (size / PAGE_SIZE)) >
+ init_node_data[numa_domain].node_end_pfn)
+ init_node_data[numa_domain].node_end_pfn =
+ (start / PAGE_SIZE) +
+ (size / PAGE_SIZE);
+
+ init_node_data[numa_domain].node_present_pages +=
size / PAGE_SIZE;
} else {
node_set_online(numa_domain);
init_node_data[numa_domain].node_start_pfn =
start / PAGE_SIZE;
- init_node_data[numa_domain].node_spanned_pages =
+ init_node_data[numa_domain].node_end_pfn =
+ init_node_data[numa_domain].node_start_pfn +
+ size / PAGE_SIZE;
+ init_node_data[numa_domain].node_present_pages =
size / PAGE_SIZE;
}
@@ -391,14 +414,6 @@
node_set_online(i);
return 0;
-err:
- /* Something has gone wrong; revert any setup we've done */
- for_each_node(i) {
- node_set_offline(i);
- init_node_data[i].node_start_pfn = 0;
- init_node_data[i].node_spanned_pages = 0;
- }
- return -1;
}
static void __init setup_nonnuma(void)
@@ -426,12 +441,11 @@
node_set_online(0);
init_node_data[0].node_start_pfn = 0;
- init_node_data[0].node_spanned_pages = lmb_end_of_DRAM() / PAGE_SIZE;
+ init_node_data[0].node_end_pfn = lmb_end_of_DRAM() / PAGE_SIZE;
+ init_node_data[0].node_present_pages = total_ram / PAGE_SIZE;
for (i = 0 ; i < top_of_ram; i += MEMORY_INCREMENT)
numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 0;
-
- node0_io_hole_size = top_of_ram - total_ram;
}
static void __init dump_numa_topology(void)
@@ -512,6 +526,8 @@
void __init do_init_bootmem(void)
{
int nid;
+ int addr_cells, size_cells;
+ struct device_node *memory = NULL;
static struct notifier_block ppc64_numa_nb = {
.notifier_call = cpu_numa_callback,
.priority = 1 /* Must run before sched domains notifier. */
@@ -535,7 +551,7 @@
unsigned long bootmap_pages;
start_paddr = init_node_data[nid].node_start_pfn * PAGE_SIZE;
- end_paddr = start_paddr + (init_node_data[nid].node_spanned_pages * PAGE_SIZE);
+ end_paddr = init_node_data[nid].node_end_pfn * PAGE_SIZE;
/* Allocate the node structure node local if possible */
NODE_DATA(nid) = (struct pglist_data *)careful_allocation(nid,
@@ -551,9 +567,9 @@
NODE_DATA(nid)->node_start_pfn =
init_node_data[nid].node_start_pfn;
NODE_DATA(nid)->node_spanned_pages =
- init_node_data[nid].node_spanned_pages;
+ end_paddr - start_paddr;
- if (init_node_data[nid].node_spanned_pages == 0)
+ if (NODE_DATA(nid)->node_spanned_pages == 0)
continue;
dbg("start_paddr = %lx\n", start_paddr);
@@ -572,33 +588,55 @@
start_paddr >> PAGE_SHIFT,
end_paddr >> PAGE_SHIFT);
- for (i = 0; i < lmb.memory.cnt; i++) {
- unsigned long physbase, size;
-
- physbase = lmb.memory.region[i].physbase;
- size = lmb.memory.region[i].size;
-
- if (physbase < end_paddr &&
- (physbase+size) > start_paddr) {
- /* overlaps */
- if (physbase < start_paddr) {
- size -= start_paddr - physbase;
- physbase = start_paddr;
- }
-
- if (size > end_paddr - physbase)
- size = end_paddr - physbase;
+ /*
+ * We need to do another scan of all memory sections to
+ * associate memory with the correct node.
+ */
+ addr_cells = get_mem_addr_cells();
+ size_cells = get_mem_size_cells();
+ memory = NULL;
+ while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
+ unsigned long mem_start, mem_size;
+ int numa_domain, ranges;
+ unsigned int *memcell_buf;
+ unsigned int len;
+
+ memcell_buf = (unsigned int *)get_property(memory, "reg", &len);
+ if (!memcell_buf || len <= 0)
+ continue;
- dbg("free_bootmem %lx %lx\n", physbase, size);
- free_bootmem_node(NODE_DATA(nid), physbase,
- size);
+ ranges = memory->n_addrs; /* ranges in cell */
+new_range:
+ mem_start = read_n_cells(addr_cells, &memcell_buf);
+ mem_size = read_n_cells(size_cells, &memcell_buf);
+ numa_domain = of_node_numa_domain(memory);
+
+ if (numa_domain != nid)
+ continue;
+
+ if (mem_start < end_paddr &&
+ (mem_start+mem_size) > start_paddr) {
+ /* should be no overlaps ! */
+ dbg("free_bootmem %lx %lx\n", mem_start, mem_size);
+ free_bootmem_node(NODE_DATA(nid), mem_start,
+ mem_size);
}
+
+ if (--ranges) /* process all ranges in cell */
+ goto new_range;
}
+ /*
+ * Mark reserved regions on this node
+ */
for (i = 0; i < lmb.reserved.cnt; i++) {
unsigned long physbase = lmb.reserved.region[i].physbase;
unsigned long size = lmb.reserved.region[i].size;
+ if (pa_to_nid(physbase) != nid &&
+ pa_to_nid(physbase+size-1) != nid)
+ continue;
+
if (physbase < end_paddr &&
(physbase+size) > start_paddr) {
/* overlaps */
@@ -632,13 +670,12 @@
unsigned long start_pfn;
unsigned long end_pfn;
- start_pfn = plat_node_bdata[nid].node_boot_start >> PAGE_SHIFT;
- end_pfn = plat_node_bdata[nid].node_low_pfn;
+ start_pfn = init_node_data[nid].node_start_pfn;
+ end_pfn = init_node_data[nid].node_end_pfn;
zones_size[ZONE_DMA] = end_pfn - start_pfn;
- zholes_size[ZONE_DMA] = 0;
- if (nid == 0)
- zholes_size[ZONE_DMA] = node0_io_hole_size >> PAGE_SHIFT;
+ zholes_size[ZONE_DMA] = zones_size[ZONE_DMA] -
+ init_node_data[nid].node_present_pages;
dbg("free_area_init node %d %lx %lx (hole: %lx)\n", nid,
zones_size[ZONE_DMA], start_pfn, zholes_size[ZONE_DMA]);
diff -Nru a/arch/ppc64/oprofile/op_model_power4.c b/arch/ppc64/oprofile/op_model_power4.c
--- a/arch/ppc64/oprofile/op_model_power4.c 2005-03-20 16:30:37 -08:00
+++ b/arch/ppc64/oprofile/op_model_power4.c 2005-03-20 16:30:37 -08:00
@@ -224,7 +224,7 @@
if (mmcra & MMCRA_SIPR)
return pc;
-#ifdef CONFIG_PPC_PSERIES
+#ifdef CONFIG_PPC_RTAS
/* Were we in RTAS? */
if (pc >= rtas.base && pc < (rtas.base + rtas.size))
/* function descriptor madness */
diff -Nru a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
--- a/arch/s390/kernel/compat_wrapper.S 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/kernel/compat_wrapper.S 2005-03-20 16:30:37 -08:00
@@ -1407,8 +1407,8 @@
llgtr %r4,%r4 # struct compat_mq_attr *
jg compat_sys_mq_getsetattr
- .globl compat_sys_add_key
-compat_sys_add_key:
+ .globl compat_sys_add_key_wrapper
+compat_sys_add_key_wrapper:
llgtr %r2,%r2 # const char *
llgtr %r3,%r3 # const char *
llgtr %r4,%r4 # const void *
@@ -1416,10 +1416,28 @@
llgfr %r6,%r6 # (key_serial_t) u32
jg sys_add_key
- .globl compat_sys_request_key
-compat_sys_request_key:
+ .globl compat_sys_request_key_wrapper
+compat_sys_request_key_wrapper:
llgtr %r2,%r2 # const char *
llgtr %r3,%r3 # const char *
llgtr %r4,%r4 # const void *
llgfr %r5,%r5 # (key_serial_t) u32
jg sys_request_key
+
+ .globl sys32_remap_file_pages_wrapper
+sys32_remap_file_pages_wrapper:
+ llgfr %r2,%r2 # unsigned long
+ llgfr %r3,%r3 # unsigned long
+ llgfr %r4,%r4 # unsigned long
+ llgfr %r5,%r5 # unsigned long
+ llgfr %r6,%r6 # unsigned long
+ jg sys_remap_file_pages
+
+ .globl compat_sys_waitid_wrapper
+compat_sys_waitid_wrapper:
+ lgfr %r2,%r2 # int
+ lgfr %r3,%r3 # pid_t
+ llgtr %r4,%r4 # siginfo_emu31_t *
+ lgfr %r5,%r5 # int
+ llgtr %r6,%r6 # struct rusage_emu31 *
+ jg compat_sys_waitid
diff -Nru a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
--- a/arch/s390/kernel/debug.c 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/kernel/debug.c 2005-03-20 16:30:37 -08:00
@@ -931,11 +931,15 @@
int rc = 0;
int i;
unsigned long flags;
- mode_t mode = S_IFREG | S_IRUSR | S_IWUSR;
+ mode_t mode = S_IFREG;
struct proc_dir_entry *pde;
if (!id)
goto out;
+ if (view->prolog_proc || view->format_proc || view->header_proc)
+ mode |= S_IRUSR;
+ if (view->input_proc)
+ mode |= S_IWUSR;
pde = create_proc_entry(view->name, mode, id->proc_root_entry);
if (!pde){
printk(KERN_WARNING "debug: create_proc_entry() failed! Cannot register view %s/%s\n", id->name,view->name);
@@ -958,10 +962,6 @@
}
else {
id->views[i] = view;
- if (view->prolog_proc || view->format_proc || view->header_proc)
- mode |= S_IRUSR;
- if (view->input_proc)
- mode |= S_IWUSR;
pde->proc_fops = &debug_file_ops;
id->proc_entries[i] = pde;
}
diff -Nru a/arch/s390/kernel/s390_ext.c b/arch/s390/kernel/s390_ext.c
--- a/arch/s390/kernel/s390_ext.c 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/kernel/s390_ext.c 2005-03-20 16:30:37 -08:00
@@ -114,6 +114,10 @@
irq_enter();
asm volatile ("mc 0,0");
if (S390_lowcore.int_clock >= S390_lowcore.jiffy_timer)
+ /**
+ * Make sure that the i/o interrupt did not "overtake"
+ * the last HZ timer interrupt.
+ */
account_ticks(regs);
kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
index = code & 0xff;
diff -Nru a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
--- a/arch/s390/kernel/syscalls.S 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/kernel/syscalls.S 2005-03-20 16:30:37 -08:00
@@ -275,7 +275,7 @@
SYSCALL(s390_fadvise64_64,sys_ni_syscall,sys32_fadvise64_64_wrapper)
SYSCALL(sys_statfs64,sys_statfs64,compat_sys_statfs64_wrapper)
SYSCALL(sys_fstatfs64,sys_fstatfs64,compat_sys_fstatfs64_wrapper)
-NI_SYSCALL /* 267 new sys_remap_file_pages */
+SYSCALL(sys_remap_file_pages,sys_remap_file_pages,sys32_remap_file_pages_wrapper)
NI_SYSCALL /* 268 sys_mbind */
NI_SYSCALL /* 269 sys_get_mempolicy */
NI_SYSCALL /* 270 sys_set_mempolicy */
@@ -286,6 +286,7 @@
SYSCALL(sys_mq_notify,sys_mq_notify,compat_sys_mq_notify_wrapper) /* 275 */
SYSCALL(sys_mq_getsetattr,sys_mq_getsetattr,compat_sys_mq_getsetattr_wrapper)
NI_SYSCALL /* reserved for kexec */
-SYSCALL(sys_add_key,sys_add_key,compat_sys_add_key)
-SYSCALL(sys_request_key,sys_request_key,compat_sys_request_key)
+SYSCALL(sys_add_key,sys_add_key,compat_sys_add_key_wrapper)
+SYSCALL(sys_request_key,sys_request_key,compat_sys_request_key_wrapper)
SYSCALL(sys_keyctl,sys_keyctl,compat_sys_keyctl) /* 280 */
+SYSCALL(sys_waitid,sys_waitid,compat_sys_waitid_wrapper)
diff -Nru a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
--- a/arch/s390/kernel/time.c 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/kernel/time.c 2005-03-20 16:30:37 -08:00
@@ -168,8 +168,17 @@
__u32 ticks, xticks;
/* Calculate how many ticks have passed. */
- if (S390_lowcore.int_clock < S390_lowcore.jiffy_timer)
+ if (S390_lowcore.int_clock < S390_lowcore.jiffy_timer) {
+ /*
+ * We have to program the clock comparator even if
+ * no tick has passed. That happens if e.g. an i/o
+ * interrupt wakes up an idle processor that has
+ * switched off its hz timer.
+ */
+ tmp = S390_lowcore.jiffy_timer + CPU_DEVIATION;
+ asm volatile ("SCKC %0" : : "m" (tmp));
return;
+ }
tmp = S390_lowcore.int_clock - S390_lowcore.jiffy_timer;
if (tmp >= 2*CLK_TICKS_PER_JIFFY) { /* more than two ticks ? */
ticks = __div(tmp, CLK_TICKS_PER_JIFFY) + 1;
diff -Nru a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
--- a/arch/s390/kernel/vtime.c 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/kernel/vtime.c 2005-03-20 16:30:37 -08:00
@@ -19,6 +19,7 @@
#include <linux/notifier.h>
#include <linux/kernel_stat.h>
#include <linux/rcupdate.h>
+#include <linux/posix-timers.h>
#include <asm/s390_ext.h>
#include <asm/timer.h>
@@ -69,6 +70,7 @@
if (rcu_pending(smp_processor_id()))
rcu_check_callbacks(smp_processor_id(), rcu_user_flag);
scheduler_tick();
+ run_posix_cpu_timers(tsk);
}
/*
diff -Nru a/arch/s390/oprofile/Kconfig b/arch/s390/oprofile/Kconfig
--- a/arch/s390/oprofile/Kconfig 2005-03-20 16:30:37 -08:00
+++ b/arch/s390/oprofile/Kconfig 2005-03-20 16:30:37 -08:00
@@ -1,16 +1,15 @@
menu "Profiling support"
- depends on EXPERIMENTAL
config PROFILING
- bool "Profiling support (EXPERIMENTAL)"
+ bool "Profiling support"
help
Say Y here to enable profiling support mechanisms used by
profilers such as readprofile or OProfile.
config OPROFILE
- tristate "OProfile system profiling (EXPERIMENTAL)"
+ tristate "OProfile system profiling"
depends on PROFILING
help
OProfile is a profiling system capable of profiling the
diff -Nru a/arch/um/kernel/syscall_user.c b/arch/um/kernel/syscall_user.c
--- a/arch/um/kernel/syscall_user.c 2005-03-20 16:30:37 -08:00
+++ b/arch/um/kernel/syscall_user.c 2005-03-20 16:30:37 -08:00
@@ -46,51 +46,3 @@
* c-file-style: "linux"
* End:
*/
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <stdlib.h>
-#include <sys/time.h>
-#include "kern_util.h"
-#include "syscall_user.h"
-
-struct {
- int syscall;
- int pid;
- long result;
- struct timeval start;
- struct timeval end;
-} syscall_record[1024];
-
-int record_syscall_start(int syscall)
-{
- int max, index;
-
- max = sizeof(syscall_record)/sizeof(syscall_record[0]);
- index = next_syscall_index(max);
-
- syscall_record[index].syscall = syscall;
- syscall_record[index].pid = current_pid();
- syscall_record[index].result = 0xdeadbeef;
- gettimeofday(&syscall_record[index].start, NULL);
- return(index);
-}
-
-void record_syscall_end(int index, long result)
-{
- syscall_record[index].result = result;
- gettimeofday(&syscall_record[index].end, NULL);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff -Nru a/drivers/bluetooth/hci_bcsp.c b/drivers/bluetooth/hci_bcsp.c
--- a/drivers/bluetooth/hci_bcsp.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/bluetooth/hci_bcsp.c 2005-03-20 16:30:37 -08:00
@@ -28,7 +28,7 @@
* $Id: hci_bcsp.c,v 1.2 2002/09/26 05:05:14 maxk Exp $
*/
-#define VERSION "0.1"
+#define VERSION "0.2"
#include <linux/config.h>
#include <linux/module.h>
@@ -62,6 +62,8 @@
#define BT_DMP( A... )
#endif
+static int hciextn = 1;
+
/* ---- BCSP CRC calculation ---- */
/* Table for calculating CRC for polynomial 0x1021, LSB processed first,
@@ -158,12 +160,13 @@
case HCI_SCODATA_PKT:
skb_queue_tail(&bcsp->unrel, skb);
break;
-
+
default:
BT_ERR("Unknown packet type");
kfree_skb(skb);
break;
}
+
return 0;
}
@@ -171,7 +174,7 @@
int len, int pkt_type)
{
struct sk_buff *nskb;
- u8 hdr[4], chan;
+ u8 hdr[4], chan;
int rel, i;
#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
@@ -204,6 +207,19 @@
return NULL;
}
+ if (hciextn && chan == 5) {
+ struct hci_command_hdr *hdr = (struct hci_command_hdr *) data;
+
+ if (hci_opcode_ogf(__le16_to_cpu(hdr->opcode)) == OGF_VENDOR_CMD) {
+ u8 desc = *(data + HCI_COMMAND_HDR_SIZE);
+ if ((desc & 0xf0) == 0xc0) {
+ data += HCI_COMMAND_HDR_SIZE + 1;
+ len -= HCI_COMMAND_HDR_SIZE + 1;
+ chan = desc & 0x0f;
+ }
+ }
+ }
+
/* Max len of packet: (original len +4(bcsp hdr) +2(crc))*2
(because bytes 0xc0 and 0xdb are escaped, worst case is
when the packet is all made of 0xc0 and 0xdb :) )
@@ -226,19 +242,18 @@
BT_DBG("Sending packet with seqno %u", bcsp->msgq_txseq);
bcsp->msgq_txseq = ++(bcsp->msgq_txseq) & 0x07;
}
-#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
+#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
hdr[0] |= 0x40;
#endif
- hdr[1] = (len << 4) & 0xFF;
- hdr[1] |= chan;
- hdr[2] = len >> 4;
- hdr[3] = ~(hdr[0] + hdr[1] + hdr[2]);
+ hdr[1] = ((len << 4) & 0xff) | chan;
+ hdr[2] = len >> 4;
+ hdr[3] = ~(hdr[0] + hdr[1] + hdr[2]);
/* Put BCSP header */
for (i = 0; i < 4; i++) {
bcsp_slip_one_byte(nskb, hdr[i]);
-#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
+#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
bcsp_crc_update(&bcsp_txmsg_crc, hdr[i]);
#endif
}
@@ -246,7 +261,7 @@
/* Put payload */
for (i = 0; i < len; i++) {
bcsp_slip_one_byte(nskb, data[i]);
-#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
+#ifdef CONFIG_BT_HCIUART_BCSP_TXCRC
bcsp_crc_update(&bcsp_txmsg_crc, data[i]);
#endif
}
@@ -487,14 +502,30 @@
pass_up = 0;
if (!pass_up) {
- if ((bcsp->rx_skb->data[1] & 0x0f) != 0 &&
- (bcsp->rx_skb->data[1] & 0x0f) != 1) {
- BT_ERR ("Packet for unknown channel (%u %s)",
- bcsp->rx_skb->data[1] & 0x0f,
- bcsp->rx_skb->data[0] & 0x80 ?
- "reliable" : "unreliable");
- }
- kfree_skb(bcsp->rx_skb);
+ struct hci_event_hdr hdr;
+ u8 desc = (bcsp->rx_skb->data[1] & 0x0f);
+
+ if (desc != 0 && desc != 1) {
+ if (hciextn) {
+ desc |= 0xc0;
+ skb_pull(bcsp->rx_skb, 4);
+ memcpy(skb_push(bcsp->rx_skb, 1), &desc, 1);
+
+ hdr.evt = 0xff;
+ hdr.plen = bcsp->rx_skb->len;
+ memcpy(skb_push(bcsp->rx_skb, HCI_EVENT_HDR_SIZE), &hdr, HCI_EVENT_HDR_SIZE);
+ bcsp->rx_skb->pkt_type = HCI_EVENT_PKT;
+
+ hci_recv_frame(bcsp->rx_skb);
+ } else {
+ BT_ERR ("Packet for unknown channel (%u %s)",
+ bcsp->rx_skb->data[1] & 0x0f,
+ bcsp->rx_skb->data[0] & 0x80 ?
+ "reliable" : "unreliable");
+ kfree_skb(bcsp->rx_skb);
+ }
+ } else
+ kfree_skb(bcsp->rx_skb);
} else {
/* Pull out BCSP hdr */
skb_pull(bcsp->rx_skb, 4);
@@ -713,3 +744,6 @@
{
return hci_uart_unregister_proto(&bcsp);
}
+
+module_param(hciextn, bool, 0644);
+MODULE_PARM_DESC(hciextn, "Convert HCI Extensions into BCSP packets");
diff -Nru a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
--- a/drivers/ide/ide-cd.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/ide-cd.c 2005-03-20 16:30:37 -08:00
@@ -324,6 +324,33 @@
#include "ide-cd.h"
+static DECLARE_MUTEX(idecd_ref_sem);
+
+#define to_ide_cd(obj) container_of(obj, struct cdrom_info, kref)
+
+#define ide_cd_g(disk) ((disk)->private_data)
+
+static struct cdrom_info *ide_cd_get(struct gendisk *disk)
+{
+ struct cdrom_info *cd = NULL;
+
+ down(&idecd_ref_sem);
+ cd = ide_cd_g(disk);
+ if (cd)
+ kref_get(&cd->kref);
+ up(&idecd_ref_sem);
+ return cd;
+}
+
+static void ide_cd_release(struct kref *);
+
+static void ide_cd_put(struct cdrom_info *cd)
+{
+ down(&idecd_ref_sem);
+ kref_put(&cd->kref, ide_cd_release);
+ up(&idecd_ref_sem);
+}
+
/****************************************************************************
* Generic packet command support and error handling routines.
*/
@@ -3225,14 +3252,27 @@
int ide_cdrom_cleanup(ide_drive_t *drive)
{
struct cdrom_info *info = drive->driver_data;
- struct cdrom_device_info *devinfo = &info->devinfo;
- struct gendisk *g = drive->disk;
if (ide_unregister_subdriver(drive)) {
printk(KERN_ERR "%s: %s: failed to ide_unregister_subdriver\n",
__FUNCTION__, drive->name);
return 1;
}
+
+ del_gendisk(drive->disk);
+
+ ide_cd_put(info);
+
+ return 0;
+}
+
+static void ide_cd_release(struct kref *kref)
+{
+ struct cdrom_info *info = to_ide_cd(kref);
+ struct cdrom_device_info *devinfo = &info->devinfo;
+ ide_drive_t *drive = info->drive;
+ struct gendisk *g = drive->disk;
+
if (info->buffer != NULL)
kfree(info->buffer);
if (info->toc != NULL)
@@ -3240,13 +3280,13 @@
if (info->changer_info != NULL)
kfree(info->changer_info);
if (devinfo->handle == drive && unregister_cdrom(devinfo))
- printk(KERN_ERR "%s: ide_cdrom_cleanup failed to unregister device from the cdrom driver.\n", drive->name);
- kfree(info);
+ printk(KERN_ERR "%s: %s failed to unregister device from the cdrom "
+ "driver.\n", __FUNCTION__, drive->name);
drive->driver_data = NULL;
blk_queue_prep_rq(drive->queue, NULL);
- del_gendisk(g);
+ g->private_data = NULL;
g->fops = ide_fops;
- return 0;
+ kfree(info);
}
static int ide_cdrom_attach (ide_drive_t *drive);
@@ -3289,9 +3329,16 @@
static int idecd_open(struct inode * inode, struct file * file)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
- struct cdrom_info *info = drive->driver_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct cdrom_info *info;
+ ide_drive_t *drive;
int rc = -ENOMEM;
+
+ if (!(info = ide_cd_get(disk)))
+ return -ENXIO;
+
+ drive = info->drive;
+
drive->usage++;
if (!info->buffer)
@@ -3299,16 +3346,24 @@
GFP_KERNEL|__GFP_REPEAT);
if (!info->buffer || (rc = cdrom_open(&info->devinfo, inode, file)))
drive->usage--;
+
+ if (rc < 0)
+ ide_cd_put(info);
+
return rc;
}
static int idecd_release(struct inode * inode, struct file * file)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
- struct cdrom_info *info = drive->driver_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct cdrom_info *info = ide_cd_g(disk);
+ ide_drive_t *drive = info->drive;
cdrom_release (&info->devinfo, file);
drive->usage--;
+
+ ide_cd_put(info);
+
return 0;
}
@@ -3316,27 +3371,27 @@
unsigned int cmd, unsigned long arg)
{
struct block_device *bdev = inode->i_bdev;
- ide_drive_t *drive = bdev->bd_disk->private_data;
- int err = generic_ide_ioctl(file, bdev, cmd, arg);
- if (err == -EINVAL) {
- struct cdrom_info *info = drive->driver_data;
+ struct cdrom_info *info = ide_cd_g(bdev->bd_disk);
+ int err;
+
+ err = generic_ide_ioctl(info->drive, file, bdev, cmd, arg);
+ if (err == -EINVAL)
err = cdrom_ioctl(file, &info->devinfo, inode, cmd, arg);
- }
+
return err;
}
static int idecd_media_changed(struct gendisk *disk)
{
- ide_drive_t *drive = disk->private_data;
- struct cdrom_info *info = drive->driver_data;
+ struct cdrom_info *info = ide_cd_g(disk);
return cdrom_media_changed(&info->devinfo);
}
static int idecd_revalidate_disk(struct gendisk *disk)
{
- ide_drive_t *drive = disk->private_data;
+ struct cdrom_info *info = ide_cd_g(disk);
struct request_sense sense;
- cdrom_read_toc(drive, &sense);
+ cdrom_read_toc(info->drive, &sense);
return 0;
}
@@ -3390,7 +3445,12 @@
goto failed;
}
memset(info, 0, sizeof (struct cdrom_info));
+
+ kref_init(&info->kref);
+
+ info->drive = drive;
drive->driver_data = info;
+
DRIVER(drive)->busy++;
g->minors = 1;
snprintf(g->devfs_name, sizeof(g->devfs_name),
@@ -3417,6 +3477,7 @@
cdrom_read_toc(drive, &sense);
g->fops = &idecd_ops;
+ g->private_data = info;
g->flags |= GENHD_FL_REMOVABLE;
add_disk(g);
return 0;
diff -Nru a/drivers/ide/ide-cd.h b/drivers/ide/ide-cd.h
--- a/drivers/ide/ide-cd.h 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/ide-cd.h 2005-03-20 16:30:37 -08:00
@@ -460,6 +460,8 @@
/* Extra per-device info for cdrom drives. */
struct cdrom_info {
+ ide_drive_t *drive;
+ struct kref kref;
/* Buffer for table of contents. NULL if we haven't allocated
a TOC buffer for this device yet. */
diff -Nru a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c
--- a/drivers/ide/ide-disk.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/ide-disk.c 2005-03-20 16:30:37 -08:00
@@ -71,6 +71,38 @@
#include <asm/io.h>
#include <asm/div64.h>
+struct ide_disk_obj {
+ ide_drive_t *drive;
+ struct kref kref;
+};
+
+static DECLARE_MUTEX(idedisk_ref_sem);
+
+#define to_ide_disk(obj) container_of(obj, struct ide_disk_obj, kref)
+
+#define ide_disk_g(disk) ((disk)->private_data)
+
+static struct ide_disk_obj *ide_disk_get(struct gendisk *disk)
+{
+ struct ide_disk_obj *idkp = NULL;
+
+ down(&idedisk_ref_sem);
+ idkp = ide_disk_g(disk);
+ if (idkp)
+ kref_get(&idkp->kref);
+ up(&idedisk_ref_sem);
+ return idkp;
+}
+
+static void ide_disk_release(struct kref *);
+
+static void ide_disk_put(struct ide_disk_obj *idkp)
+{
+ down(&idedisk_ref_sem);
+ kref_put(&idkp->kref, ide_disk_release);
+ up(&idedisk_ref_sem);
+}
+
/*
* lba_capacity_is_ok() performs a sanity check on the claimed "lba_capacity"
* value for this drive (from its reported identification information).
@@ -991,14 +1023,30 @@
static int idedisk_cleanup (ide_drive_t *drive)
{
+ struct ide_disk_obj *idkp = drive->driver_data;
struct gendisk *g = drive->disk;
+
ide_cacheflush_p(drive);
if (ide_unregister_subdriver(drive))
return 1;
del_gendisk(g);
+
+ ide_disk_put(idkp);
+
+ return 0;
+}
+
+static void ide_disk_release(struct kref *kref)
+{
+ struct ide_disk_obj *idkp = to_ide_disk(kref);
+ ide_drive_t *drive = idkp->drive;
+ struct gendisk *g = drive->disk;
+
+ drive->driver_data = NULL;
drive->devfs_name[0] = '\0';
+ g->private_data = NULL;
g->fops = ide_fops;
- return 0;
+ kfree(idkp);
}
static int idedisk_attach(ide_drive_t *drive);
@@ -1056,7 +1104,15 @@
static int idedisk_open(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_disk_obj *idkp;
+ ide_drive_t *drive;
+
+ if (!(idkp = ide_disk_get(disk)))
+ return -ENXIO;
+
+ drive = idkp->drive;
+
drive->usage++;
if (drive->removable && drive->usage == 1) {
ide_task_t args;
@@ -1078,7 +1134,10 @@
static int idedisk_release(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_disk_obj *idkp = ide_disk_g(disk);
+ ide_drive_t *drive = idkp->drive;
+
if (drive->usage == 1)
ide_cacheflush_p(drive);
if (drive->removable && drive->usage == 1) {
@@ -1091,6 +1150,9 @@
drive->doorlocking = 0;
}
drive->usage--;
+
+ ide_disk_put(idkp);
+
return 0;
}
@@ -1098,12 +1160,14 @@
unsigned int cmd, unsigned long arg)
{
struct block_device *bdev = inode->i_bdev;
- return generic_ide_ioctl(file, bdev, cmd, arg);
+ struct ide_disk_obj *idkp = ide_disk_g(bdev->bd_disk);
+ return generic_ide_ioctl(idkp->drive, file, bdev, cmd, arg);
}
static int idedisk_media_changed(struct gendisk *disk)
{
- ide_drive_t *drive = disk->private_data;
+ struct ide_disk_obj *idkp = ide_disk_g(disk);
+ ide_drive_t *drive = idkp->drive;
/* do not scan partitions twice if this is a removable device */
if (drive->attach) {
@@ -1116,8 +1180,8 @@
static int idedisk_revalidate_disk(struct gendisk *disk)
{
- ide_drive_t *drive = disk->private_data;
- set_capacity(disk, idedisk_capacity(drive));
+ struct ide_disk_obj *idkp = ide_disk_g(disk);
+ set_capacity(disk, idedisk_capacity(idkp->drive));
return 0;
}
@@ -1134,6 +1198,7 @@
static int idedisk_attach(ide_drive_t *drive)
{
+ struct ide_disk_obj *idkp;
struct gendisk *g = drive->disk;
/* strstr("foo", "") is non-NULL */
@@ -1144,10 +1209,22 @@
if (drive->media != ide_disk)
goto failed;
+ idkp = kmalloc(sizeof(*idkp), GFP_KERNEL);
+ if (!idkp)
+ goto failed;
+
if (ide_register_subdriver(drive, &idedisk_driver)) {
printk (KERN_ERR "ide-disk: %s: Failed to register the driver with ide.c\n", drive->name);
- goto failed;
+ goto out_free_idkp;
}
+
+ memset(idkp, 0, sizeof(*idkp));
+
+ kref_init(&idkp->kref);
+
+ idkp->drive = drive;
+ drive->driver_data = idkp;
+
DRIVER(drive)->busy++;
idedisk_setup(drive);
if ((!drive->head || drive->head > 16) && !drive->select.b.lba) {
@@ -1163,8 +1240,11 @@
g->flags = drive->removable ? GENHD_FL_REMOVABLE : 0;
set_capacity(g, idedisk_capacity(drive));
g->fops = &idedisk_ops;
+ g->private_data = idkp;
add_disk(g);
return 0;
+out_free_idkp:
+ kfree(idkp);
failed:
return 1;
}
diff -Nru a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c
--- a/drivers/ide/ide-floppy.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/ide-floppy.c 2005-03-20 16:30:37 -08:00
@@ -274,8 +274,9 @@
* driver due to an interrupt or a timer event is stored in a variable
* of type idefloppy_floppy_t, defined below.
*/
-typedef struct {
- ide_drive_t *drive;
+typedef struct ide_floppy_obj {
+ ide_drive_t *drive;
+ struct kref kref;
/* Current packet command */
idefloppy_pc_t *pc;
@@ -514,6 +515,33 @@
u8 reserved[4];
} idefloppy_mode_parameter_header_t;
+static DECLARE_MUTEX(idefloppy_ref_sem);
+
+#define to_ide_floppy(obj) container_of(obj, struct ide_floppy_obj, kref)
+
+#define ide_floppy_g(disk) ((disk)->private_data)
+
+static struct ide_floppy_obj *ide_floppy_get(struct gendisk *disk)
+{
+ struct ide_floppy_obj *floppy = NULL;
+
+ down(&idefloppy_ref_sem);
+ floppy = ide_floppy_g(disk);
+ if (floppy)
+ kref_get(&floppy->kref);
+ up(&idefloppy_ref_sem);
+ return floppy;
+}
+
+static void ide_floppy_release(struct kref *);
+
+static void ide_floppy_put(struct ide_floppy_obj *floppy)
+{
+ down(&idefloppy_ref_sem);
+ kref_put(&floppy->kref, ide_floppy_release);
+ up(&idefloppy_ref_sem);
+}
+
/*
* Too bad. The drive wants to send us data which we are not ready to accept.
* Just throw it away.
@@ -1792,9 +1820,6 @@
struct idefloppy_id_gcw gcw;
*((u16 *) &gcw) = drive->id->config;
- drive->driver_data = floppy;
- memset(floppy, 0, sizeof(idefloppy_floppy_t));
- floppy->drive = drive;
floppy->pc = floppy->pc_stack;
if (gcw.drq_type == 1)
set_bit(IDEFLOPPY_DRQ_INTERRUPT, &floppy->flags);
@@ -1838,13 +1863,26 @@
if (ide_unregister_subdriver(drive))
return 1;
- drive->driver_data = NULL;
- kfree(floppy);
+
del_gendisk(g);
- g->fops = ide_fops;
+
+ ide_floppy_put(floppy);
+
return 0;
}
+static void ide_floppy_release(struct kref *kref)
+{
+ struct ide_floppy_obj *floppy = to_ide_floppy(kref);
+ ide_drive_t *drive = floppy->drive;
+ struct gendisk *g = drive->disk;
+
+ drive->driver_data = NULL;
+ g->private_data = NULL;
+ g->fops = ide_fops;
+ kfree(floppy);
+}
+
#ifdef CONFIG_PROC_FS
static int proc_idefloppy_read_capacity
@@ -1893,14 +1931,21 @@
static int idefloppy_open(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
- idefloppy_floppy_t *floppy = drive->driver_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_floppy_obj *floppy;
+ ide_drive_t *drive;
idefloppy_pc_t pc;
+ int ret = 0;
- drive->usage++;
-
debug_log(KERN_INFO "Reached idefloppy_open\n");
+ if (!(floppy = ide_floppy_get(disk)))
+ return -ENXIO;
+
+ drive = floppy->drive;
+
+ drive->usage++;
+
if (drive->usage == 1) {
clear_bit(IDEFLOPPY_FORMAT_IN_PROGRESS, &floppy->flags);
/* Just in case */
@@ -1920,13 +1965,15 @@
*/
) {
drive->usage--;
- return -EIO;
+ ret = -EIO;
+ goto out_put_floppy;
}
if (floppy->wp && (filp->f_mode & 2)) {
drive->usage--;
- return -EROFS;
- }
+ ret = -EROFS;
+ goto out_put_floppy;
+ }
set_bit(IDEFLOPPY_MEDIA_CHANGED, &floppy->flags);
/* IOMEGA Clik! drives do not support lock/unlock commands */
if (!test_bit(IDEFLOPPY_CLIK_DRIVE, &floppy->flags)) {
@@ -1936,21 +1983,26 @@
check_disk_change(inode->i_bdev);
} else if (test_bit(IDEFLOPPY_FORMAT_IN_PROGRESS, &floppy->flags)) {
drive->usage--;
- return -EBUSY;
+ ret = -EBUSY;
+ goto out_put_floppy;
}
return 0;
+
+out_put_floppy:
+ ide_floppy_put(floppy);
+ return ret;
}
static int idefloppy_release(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_floppy_obj *floppy = ide_floppy_g(disk);
+ ide_drive_t *drive = floppy->drive;
idefloppy_pc_t pc;
debug_log(KERN_INFO "Reached idefloppy_release\n");
if (drive->usage == 1) {
- idefloppy_floppy_t *floppy = drive->driver_data;
-
/* IOMEGA Clik! drives do not support lock/unlock commands */
if (!test_bit(IDEFLOPPY_CLIK_DRIVE, &floppy->flags)) {
idefloppy_create_prevent_cmd(&pc, 0);
@@ -1960,6 +2012,9 @@
clear_bit(IDEFLOPPY_FORMAT_IN_PROGRESS, &floppy->flags);
}
drive->usage--;
+
+ ide_floppy_put(floppy);
+
return 0;
}
@@ -1967,10 +2022,10 @@
unsigned int cmd, unsigned long arg)
{
struct block_device *bdev = inode->i_bdev;
- ide_drive_t *drive = bdev->bd_disk->private_data;
- idefloppy_floppy_t *floppy = drive->driver_data;
+ struct ide_floppy_obj *floppy = ide_floppy_g(bdev->bd_disk);
+ ide_drive_t *drive = floppy->drive;
void __user *argp = (void __user *)arg;
- int err = generic_ide_ioctl(file, bdev, cmd, arg);
+ int err = generic_ide_ioctl(drive, file, bdev, cmd, arg);
int prevent = (arg) ? 1 : 0;
idefloppy_pc_t pc;
if (err != -EINVAL)
@@ -2031,8 +2086,8 @@
static int idefloppy_media_changed(struct gendisk *disk)
{
- ide_drive_t *drive = disk->private_data;
- idefloppy_floppy_t *floppy = drive->driver_data;
+ struct ide_floppy_obj *floppy = ide_floppy_g(disk);
+ ide_drive_t *drive = floppy->drive;
/* do not scan partitions twice if this is a removable device */
if (drive->attach) {
@@ -2044,8 +2099,8 @@
static int idefloppy_revalidate_disk(struct gendisk *disk)
{
- ide_drive_t *drive = disk->private_data;
- set_capacity(disk, idefloppy_capacity(drive));
+ struct ide_floppy_obj *floppy = ide_floppy_g(disk);
+ set_capacity(disk, idefloppy_capacity(floppy->drive));
return 0;
}
@@ -2085,6 +2140,15 @@
kfree (floppy);
goto failed;
}
+
+ memset(floppy, 0, sizeof(*floppy));
+
+ kref_init(&floppy->kref);
+
+ floppy->drive = drive;
+
+ drive->driver_data = floppy;
+
DRIVER(drive)->busy++;
idefloppy_setup (drive, floppy);
DRIVER(drive)->busy--;
@@ -2093,6 +2157,7 @@
strcpy(g->devfs_name, drive->devfs_name);
g->flags = drive->removable ? GENHD_FL_REMOVABLE : 0;
g->fops = &idefloppy_ops;
+ g->private_data = floppy;
drive->attach = 1;
add_disk(g);
return 0;
diff -Nru a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c
--- a/drivers/ide/ide-tape.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/ide-tape.c 2005-03-20 16:30:37 -08:00
@@ -781,8 +781,10 @@
* driver due to an interrupt or a timer event is stored in a variable
* of type idetape_tape_t, defined below.
*/
-typedef struct {
- ide_drive_t *drive;
+typedef struct ide_tape_obj {
+ ide_drive_t *drive;
+ struct kref kref;
+
/*
* Since a typical character device operation requires more
* than one packet command, we provide here enough memory
@@ -1007,6 +1009,33 @@
int debug_level;
} idetape_tape_t;
+static DECLARE_MUTEX(idetape_ref_sem);
+
+#define to_ide_tape(obj) container_of(obj, struct ide_tape_obj, kref)
+
+#define ide_tape_g(disk) ((disk)->private_data)
+
+static struct ide_tape_obj *ide_tape_get(struct gendisk *disk)
+{
+ struct ide_tape_obj *tape = NULL;
+
+ down(&idetape_ref_sem);
+ tape = ide_tape_g(disk);
+ if (tape)
+ kref_get(&tape->kref);
+ up(&idetape_ref_sem);
+ return tape;
+}
+
+static void ide_tape_release(struct kref *);
+
+static void ide_tape_put(struct ide_tape_obj *tape)
+{
+ down(&idetape_ref_sem);
+ kref_put(&tape->kref, ide_tape_release);
+ up(&idetape_ref_sem);
+}
+
/*
* Tape door status
*/
@@ -1093,15 +1122,6 @@
#define IDETAPE_ERROR_EOD 103
/*
- * idetape_chrdev_t provides the link between out character device
- * interface and our block device interface and the corresponding
- * ide_drive_t structure.
- */
-typedef struct {
- ide_drive_t *drive;
-} idetape_chrdev_t;
-
-/*
* The following is used to format the general configuration word of
* the ATAPI IDENTIFY DEVICE command.
*/
@@ -1257,7 +1277,21 @@
* The variables below are used for the character device interface.
* Additional state variables are defined in our ide_drive_t structure.
*/
-static idetape_chrdev_t idetape_chrdevs[MAX_HWIFS * MAX_DRIVES];
+static struct ide_tape_obj * idetape_devs[MAX_HWIFS * MAX_DRIVES];
+
+#define ide_tape_f(file) ((file)->private_data)
+
+static struct ide_tape_obj *ide_tape_chrdev_get(unsigned int i)
+{
+ struct ide_tape_obj *tape = NULL;
+
+ down(&idetape_ref_sem);
+ tape = idetape_devs[i];
+ if (tape)
+ kref_get(&tape->kref);
+ up(&idetape_ref_sem);
+ return tape;
+}
/*
* Function declarations
@@ -3669,8 +3703,8 @@
static ssize_t idetape_chrdev_read (struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
- ide_drive_t *drive = file->private_data;
- idetape_tape_t *tape = drive->driver_data;
+ struct ide_tape_obj *tape = ide_tape_f(file);
+ ide_drive_t *drive = tape->drive;
ssize_t bytes_read,temp, actually_read = 0, rc;
#if IDETAPE_DEBUG_LOG
@@ -3728,8 +3762,8 @@
static ssize_t idetape_chrdev_write (struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
- ide_drive_t *drive = file->private_data;
- idetape_tape_t *tape = drive->driver_data;
+ struct ide_tape_obj *tape = ide_tape_f(file);
+ ide_drive_t *drive = tape->drive;
ssize_t retval, actually_written = 0;
/* The drive is write protected. */
@@ -4031,8 +4065,8 @@
*/
static int idetape_chrdev_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
- ide_drive_t *drive = file->private_data;
- idetape_tape_t *tape = drive->driver_data;
+ struct ide_tape_obj *tape = ide_tape_f(file);
+ ide_drive_t *drive = tape->drive;
struct mtop mtop;
struct mtget mtget;
struct mtpos mtpos;
@@ -4109,17 +4143,24 @@
if (i >= MAX_HWIFS * MAX_DRIVES)
return -ENXIO;
- drive = idetape_chrdevs[i].drive;
- tape = drive->driver_data;
- filp->private_data = drive;
- if (test_and_set_bit(IDETAPE_BUSY, &tape->flags))
- return -EBUSY;
+ if (!(tape = ide_tape_chrdev_get(i)))
+ return -ENXIO;
+
+ drive = tape->drive;
+
+ filp->private_data = tape;
+
+ if (test_and_set_bit(IDETAPE_BUSY, &tape->flags)) {
+ retval = -EBUSY;
+ goto out_put_tape;
+ }
+
retval = idetape_wait_ready(drive, 60 * HZ);
if (retval) {
clear_bit(IDETAPE_BUSY, &tape->flags);
printk(KERN_ERR "ide-tape: %s: drive not ready\n", tape->name);
- return retval;
+ goto out_put_tape;
}
idetape_read_position(drive);
@@ -4143,7 +4184,8 @@
if ((filp->f_flags & O_ACCMODE) == O_WRONLY ||
(filp->f_flags & O_ACCMODE) == O_RDWR) {
clear_bit(IDETAPE_BUSY, &tape->flags);
- return -EROFS;
+ retval = -EROFS;
+ goto out_put_tape;
}
}
@@ -4161,6 +4203,10 @@
idetape_restart_speed_control(drive);
tape->restart_speed_control_req = 0;
return 0;
+
+out_put_tape:
+ ide_tape_put(tape);
+ return retval;
}
static void idetape_write_release (ide_drive_t *drive, unsigned int minor)
@@ -4184,8 +4230,8 @@
*/
static int idetape_chrdev_release (struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = filp->private_data;
- idetape_tape_t *tape;
+ struct ide_tape_obj *tape = ide_tape_f(filp);
+ ide_drive_t *drive = tape->drive;
idetape_pc_t pc;
unsigned int minor = iminor(inode);
@@ -4219,6 +4265,7 @@
}
}
clear_bit(IDETAPE_BUSY, &tape->flags);
+ ide_tape_put(tape);
unlock_kernel();
return 0;
}
@@ -4529,9 +4576,7 @@
int stage_size;
struct sysinfo si;
- memset(tape, 0, sizeof (idetape_tape_t));
spin_lock_init(&tape->spinlock);
- drive->driver_data = tape;
drive->dsc_overlap = 1;
#ifdef CONFIG_BLK_DEV_IDEPCI
if (HWIF(drive)->pci_dev != NULL) {
@@ -4549,7 +4594,6 @@
/* Seagate Travan drives do not support DSC overlap. */
if (strstr(drive->id->model, "Seagate STT3401"))
drive->dsc_overlap = 0;
- tape->drive = drive;
tape->minor = minor;
tape->name[0] = 'h';
tape->name[1] = 't';
@@ -4630,7 +4674,6 @@
static int idetape_cleanup (ide_drive_t *drive)
{
idetape_tape_t *tape = drive->driver_data;
- int minor = tape->minor;
unsigned long flags;
spin_lock_irqsave(&ide_lock, flags);
@@ -4639,17 +4682,30 @@
spin_unlock_irqrestore(&ide_lock, flags);
return 1;
}
- idetape_chrdevs[minor].drive = NULL;
+
spin_unlock_irqrestore(&ide_lock, flags);
DRIVER(drive)->busy = 0;
(void) ide_unregister_subdriver(drive);
+
+ ide_tape_put(tape);
+
+ return 0;
+}
+
+static void ide_tape_release(struct kref *kref)
+{
+ struct ide_tape_obj *tape = to_ide_tape(kref);
+ ide_drive_t *drive = tape->drive;
+ struct gendisk *g = drive->disk;
+
drive->driver_data = NULL;
devfs_remove("%s/mt", drive->devfs_name);
devfs_remove("%s/mtn", drive->devfs_name);
- devfs_unregister_tape(drive->disk->number);
- kfree (tape);
- drive->disk->fops = ide_fops;
- return 0;
+ devfs_unregister_tape(g->number);
+ idetape_devs[tape->minor] = NULL;
+ g->private_data = NULL;
+ g->fops = ide_fops;
+ kfree(tape);
}
#ifdef CONFIG_PROC_FS
@@ -4714,15 +4770,30 @@
static int idetape_open(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_tape_obj *tape;
+ ide_drive_t *drive;
+
+ if (!(tape = ide_tape_get(disk)))
+ return -ENXIO;
+
+ drive = tape->drive;
+
drive->usage++;
+
return 0;
}
static int idetape_release(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_tape_obj *tape = ide_tape_g(disk);
+ ide_drive_t *drive = tape->drive;
+
drive->usage--;
+
+ ide_tape_put(tape);
+
return 0;
}
@@ -4730,8 +4801,9 @@
unsigned int cmd, unsigned long arg)
{
struct block_device *bdev = inode->i_bdev;
- ide_drive_t *drive = bdev->bd_disk->private_data;
- int err = generic_ide_ioctl(file, bdev, cmd, arg);
+ struct ide_tape_obj *tape = ide_tape_g(bdev->bd_disk);
+ ide_drive_t *drive = tape->drive;
+ int err = generic_ide_ioctl(drive, file, bdev, cmd, arg);
if (err == -EINVAL)
err = idetape_blkdev_ioctl(drive, cmd, arg);
return err;
@@ -4747,6 +4819,7 @@
static int idetape_attach (ide_drive_t *drive)
{
idetape_tape_t *tape;
+ struct gendisk *g = drive->disk;
int minor;
if (!strstr("ide-tape", drive->driver_req))
@@ -4777,10 +4850,22 @@
kfree(tape);
goto failed;
}
- for (minor = 0; idetape_chrdevs[minor].drive != NULL; minor++)
+
+ memset(tape, 0, sizeof(*tape));
+
+ kref_init(&tape->kref);
+
+ tape->drive = drive;
+
+ drive->driver_data = tape;
+
+ down(&idetape_ref_sem);
+ for (minor = 0; idetape_devs[minor]; minor++)
;
+ idetape_devs[minor] = tape;
+ up(&idetape_ref_sem);
+
idetape_setup(drive, tape, minor);
- idetape_chrdevs[minor].drive = drive;
devfs_mk_cdev(MKDEV(HWIF(drive)->major, minor),
S_IFCHR | S_IRUGO | S_IWUGO,
@@ -4789,8 +4874,10 @@
S_IFCHR | S_IRUGO | S_IWUGO,
"%s/mtn", drive->devfs_name);
- drive->disk->number = devfs_register_tape(drive->devfs_name);
- drive->disk->fops = &idetape_block_ops;
+ g->number = devfs_register_tape(drive->devfs_name);
+ g->fops = &idetape_block_ops;
+ g->private_data = tape;
+
return 0;
failed:
return 1;
diff -Nru a/drivers/ide/ide.c b/drivers/ide/ide.c
--- a/drivers/ide/ide.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/ide.c 2005-03-20 16:30:37 -08:00
@@ -1414,10 +1414,9 @@
return ide_do_drive_cmd(drive, &rq, ide_head_wait);
}
-int generic_ide_ioctl(struct file *file, struct block_device *bdev,
+int generic_ide_ioctl(ide_drive_t *drive, struct file *file, struct block_device *bdev,
unsigned int cmd, unsigned long arg)
{
- ide_drive_t *drive = bdev->bd_disk->private_data;
ide_settings_t *setting;
int err = 0;
void __user *p = (void __user *)arg;
diff -Nru a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
--- a/drivers/ide/pci/cs5520.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/ide/pci/cs5520.c 2005-03-20 16:30:37 -08:00
@@ -47,6 +47,7 @@
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/ide.h>
+#include <linux/dma-mapping.h>
#include <asm/io.h>
#include <asm/irq.h>
@@ -227,7 +228,7 @@
return 1;
}
pci_set_master(dev);
- if (pci_set_dma_mask(dev, 0xFFFFFFFF)) {
+ if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
printk(KERN_WARNING "cs5520: No suitable DMA available.\n");
return -ENODEV;
}
diff -Nru a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
--- a/drivers/macintosh/therm_pm72.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/macintosh/therm_pm72.c 2005-03-20 16:30:37 -08:00
@@ -47,8 +47,11 @@
* decisions, like slewing down CPUs
* - Deal with fan and i2c failures in a better way
* - Maybe do a generic PID based on params used for
- * U3 and Drives ?
- * - Add RackMac3,1 support (XServe g5)
+ * U3 and Drives ? Definitely need to factor code a bit
+ * bettter... also make sensor detection more robust using
+ * the device-tree to probe for them
+ * - Figure out how to get the slots consumption and set the
+ * slots fan accordingly
*
* History:
*
@@ -85,6 +88,13 @@
* - Add new CPU cooling algorithm for machines with liquid cooling
* - Workaround for some PowerMac7,3 with empty "fan" node in the devtree
* - Fix a signed/unsigned compare issue in some PID loops
+ *
+ * Mar. 10, 2005 : 1.2
+ * - Add basic support for Xserve G5
+ * - Retreive pumps min/max from EEPROM image in device-tree (broken)
+ * - Use min/max macros here or there
+ * - Latest darwin updated U3H min fan speed to 20% PWM
+ *
*/
#include <linux/config.h>
@@ -113,7 +123,7 @@
#include "therm_pm72.h"
-#define VERSION "1.1"
+#define VERSION "1.2b2"
#undef DEBUG
@@ -131,21 +141,26 @@
static struct of_device * of_dev;
static struct i2c_adapter * u3_0;
static struct i2c_adapter * u3_1;
+static struct i2c_adapter * k2;
static struct i2c_client * fcu;
static struct cpu_pid_state cpu_state[2];
static struct basckside_pid_params backside_params;
static struct backside_pid_state backside_state;
static struct drives_pid_state drives_state;
+static struct dimm_pid_state dimms_state;
static int state;
static int cpu_count;
static int cpu_pid_type;
static pid_t ctrl_task;
static struct completion ctrl_complete;
static int critical_state;
+static int rackmac;
+static s32 dimm_output_clamp;
+
static DECLARE_MUTEX(driver_lock);
/*
- * We have 2 types of CPU PID control. One is "split" old style control
+ * We have 3 types of CPU PID control. One is "split" old style control
* for intake & exhaust fans, the other is "combined" control for both
* CPUs that also deals with the pumps when present. To be "compatible"
* with OS X at this point, we only use "COMBINED" on the machines that
@@ -155,6 +170,7 @@
*/
#define CPU_PID_TYPE_SPLIT 0
#define CPU_PID_TYPE_COMBINED 1
+#define CPU_PID_TYPE_RACKMAC 2
/*
* This table describes all fans in the FCU. The "id" and "type" values
@@ -177,7 +193,7 @@
struct fcu_fan_table fcu_fans[] = {
[BACKSIDE_FAN_PWM_INDEX] = {
- .loc = "BACKSIDE",
+ .loc = "BACKSIDE,SYS CTRLR FAN",
.type = FCU_FAN_PWM,
.id = BACKSIDE_FAN_PWM_DEFAULT_ID,
},
@@ -187,7 +203,7 @@
.id = DRIVES_FAN_RPM_DEFAULT_ID,
},
[SLOTS_FAN_PWM_INDEX] = {
- .loc = "SLOT",
+ .loc = "SLOT,PCI FAN",
.type = FCU_FAN_PWM,
.id = SLOTS_FAN_PWM_DEFAULT_ID,
},
@@ -224,6 +240,37 @@
.type = FCU_FAN_RPM,
.id = FCU_FAN_ABSENT_ID,
},
+ /* Xserve fans */
+ [CPU_A1_FAN_RPM_INDEX] = {
+ .loc = "CPU A 1",
+ .type = FCU_FAN_RPM,
+ .id = FCU_FAN_ABSENT_ID,
+ },
+ [CPU_A2_FAN_RPM_INDEX] = {
+ .loc = "CPU A 2",
+ .type = FCU_FAN_RPM,
+ .id = FCU_FAN_ABSENT_ID,
+ },
+ [CPU_A3_FAN_RPM_INDEX] = {
+ .loc = "CPU A 3",
+ .type = FCU_FAN_RPM,
+ .id = FCU_FAN_ABSENT_ID,
+ },
+ [CPU_B1_FAN_RPM_INDEX] = {
+ .loc = "CPU B 1",
+ .type = FCU_FAN_RPM,
+ .id = FCU_FAN_ABSENT_ID,
+ },
+ [CPU_B2_FAN_RPM_INDEX] = {
+ .loc = "CPU B 2",
+ .type = FCU_FAN_RPM,
+ .id = FCU_FAN_ABSENT_ID,
+ },
+ [CPU_B3_FAN_RPM_INDEX] = {
+ .loc = "CPU B 3",
+ .type = FCU_FAN_RPM,
+ .id = FCU_FAN_ABSENT_ID,
+ },
};
/*
@@ -251,7 +298,9 @@
struct i2c_client *clt;
struct i2c_adapter *adap;
- if (id & 0x100)
+ if (id & 0x200)
+ adap = k2;
+ else if (id & 0x100)
adap = u3_1;
else
adap = u3_0;
@@ -361,6 +410,31 @@
}
}
+static int read_lm87_reg(struct i2c_client * chip, int reg)
+{
+ int rc, tries = 0;
+ u8 buf;
+
+ for (;;) {
+ /* Set address */
+ buf = (u8)reg;
+ rc = i2c_master_send(chip, &buf, 1);
+ if (rc <= 0)
+ goto error;
+ rc = i2c_master_recv(chip, &buf, 1);
+ if (rc <= 0)
+ goto error;
+ return (int)buf;
+ error:
+ DBG("Error reading LM87, retrying...\n");
+ if (++tries > 10) {
+ printk(KERN_ERR "therm_pm72: Error reading LM87 !\n");
+ return -1;
+ }
+ msleep(10);
+ }
+}
+
static int fan_read_reg(int reg, unsigned char *buf, int nb)
{
int tries, nr, nw;
@@ -570,6 +644,38 @@
return 0;
}
+static void fetch_cpu_pumps_minmax(void)
+{
+ struct cpu_pid_state *state0 = &cpu_state[0];
+ struct cpu_pid_state *state1 = &cpu_state[1];
+ u16 pump_min = 0, pump_max = 0xffff;
+ u16 tmp[4];
+
+ /* Try to fetch pumps min/max infos from eeprom */
+
+ memcpy(&tmp, &state0->mpu.processor_part_num, 8);
+ if (tmp[0] != 0xffff && tmp[1] != 0xffff) {
+ pump_min = max(pump_min, tmp[0]);
+ pump_max = min(pump_max, tmp[1]);
+ }
+ if (tmp[2] != 0xffff && tmp[3] != 0xffff) {
+ pump_min = max(pump_min, tmp[2]);
+ pump_max = min(pump_max, tmp[3]);
+ }
+
+ /* Double check the values, this _IS_ needed as the EEPROM on
+ * some dual 2.5Ghz G5s seem, at least, to have both min & max
+ * same to the same value ... (grrrr)
+ */
+ if (pump_min == pump_max || pump_min == 0 || pump_max == 0xffff) {
+ pump_min = CPU_PUMP_OUTPUT_MIN;
+ pump_max = CPU_PUMP_OUTPUT_MAX;
+ }
+
+ state0->pump_min = state1->pump_min = pump_min;
+ state0->pump_max = state1->pump_max = pump_max;
+}
+
/*
* Now, unfortunately, sysfs doesn't give us a nice void * we could
* pass around to the attribute functions, so we don't really have
@@ -611,6 +717,8 @@
BUILD_SHOW_FUNC_FIX(drives_temperature, drives_state.last_temp)
BUILD_SHOW_FUNC_INT(drives_fan_rpm, drives_state.rpm)
+BUILD_SHOW_FUNC_FIX(dimms_temperature, dimms_state.last_temp)
+
static DEVICE_ATTR(cpu0_temperature,S_IRUGO,show_cpu0_temperature,NULL);
static DEVICE_ATTR(cpu0_voltage,S_IRUGO,show_cpu0_voltage,NULL);
static DEVICE_ATTR(cpu0_current,S_IRUGO,show_cpu0_current,NULL);
@@ -629,6 +737,8 @@
static DEVICE_ATTR(drives_temperature,S_IRUGO,show_drives_temperature,NULL);
static DEVICE_ATTR(drives_fan_rpm,S_IRUGO,show_drives_fan_rpm,NULL);
+static DEVICE_ATTR(dimms_temperature,S_IRUGO,show_dimms_temperature,NULL);
+
/*
* CPUs fans control loop
*/
@@ -636,17 +746,21 @@
static int do_read_one_cpu_values(struct cpu_pid_state *state, s32 *temp, s32 *power)
{
s32 ltemp, volts, amps;
- int rc = 0;
+ int index, rc = 0;
/* Default (in case of error) */
*temp = state->cur_temp;
*power = state->cur_power;
- /* Read current fan status */
- if (state->index == 0)
- rc = get_rpm_fan(CPUA_EXHAUST_FAN_RPM_INDEX, !RPM_PID_USE_ACTUAL_SPEED);
+ if (cpu_pid_type == CPU_PID_TYPE_RACKMAC)
+ index = (state->index == 0) ?
+ CPU_A1_FAN_RPM_INDEX : CPU_B1_FAN_RPM_INDEX;
else
- rc = get_rpm_fan(CPUB_EXHAUST_FAN_RPM_INDEX, !RPM_PID_USE_ACTUAL_SPEED);
+ index = (state->index == 0) ?
+ CPUA_EXHAUST_FAN_RPM_INDEX : CPUB_EXHAUST_FAN_RPM_INDEX;
+
+ /* Read current fan status */
+ rc = get_rpm_fan(index, !RPM_PID_USE_ACTUAL_SPEED);
if (rc < 0) {
/* XXX What do we do now ? Nothing for now, keep old value, but
* return error upstream
@@ -777,11 +891,6 @@
DBG(" sum: %d\n", (int)sum);
state->rpm += (s32)sum;
-
- if (state->rpm < (int)state->mpu.rminn_exhaust_fan)
- state->rpm = state->mpu.rminn_exhaust_fan;
- if (state->rpm > (int)state->mpu.rmaxn_exhaust_fan)
- state->rpm = state->mpu.rmaxn_exhaust_fan;
}
static void do_monitor_cpu_combined(void)
@@ -823,28 +932,28 @@
if (state0->overtemp > 0) {
state0->rpm = state0->mpu.rmaxn_exhaust_fan;
state0->intake_rpm = intake = state0->mpu.rmaxn_intake_fan;
- pump = CPU_PUMP_OUTPUT_MAX;
+ pump = state0->pump_min;
goto do_set_fans;
}
/* Do the PID */
do_cpu_pid(state0, temp_combi, power_combi);
+ /* Range check */
+ state0->rpm = max(state0->rpm, (int)state0->mpu.rminn_exhaust_fan);
+ state0->rpm = min(state0->rpm, (int)state0->mpu.rmaxn_exhaust_fan);
+
/* Calculate intake fan speed */
intake = (state0->rpm * CPU_INTAKE_SCALE) >> 16;
- if (intake < (int)state0->mpu.rminn_intake_fan)
- intake = state0->mpu.rminn_intake_fan;
- if (intake > (int)state0->mpu.rmaxn_intake_fan)
- intake = state0->mpu.rmaxn_intake_fan;
+ intake = max(intake, (int)state0->mpu.rminn_intake_fan);
+ intake = min(intake, (int)state0->mpu.rmaxn_intake_fan);
state0->intake_rpm = intake;
/* Calculate pump speed */
- pump = (state0->rpm * CPU_PUMP_OUTPUT_MAX) /
+ pump = (state0->rpm * state0->pump_max) /
state0->mpu.rmaxn_exhaust_fan;
- if (pump > CPU_PUMP_OUTPUT_MAX)
- pump = CPU_PUMP_OUTPUT_MAX;
- if (pump < CPU_PUMP_OUTPUT_MIN)
- pump = CPU_PUMP_OUTPUT_MIN;
+ pump = min(pump, state0->pump_max);
+ pump = max(pump, state0->pump_min);
do_set_fans:
/* We copy values from state 0 to state 1 for /sysfs */
@@ -904,11 +1013,14 @@
/* Do the PID */
do_cpu_pid(state, temp, power);
+ /* Range check */
+ state->rpm = max(state->rpm, (int)state->mpu.rminn_exhaust_fan);
+ state->rpm = min(state->rpm, (int)state->mpu.rmaxn_exhaust_fan);
+
+ /* Calculate intake fan */
intake = (state->rpm * CPU_INTAKE_SCALE) >> 16;
- if (intake < (int)state->mpu.rminn_intake_fan)
- intake = state->mpu.rminn_intake_fan;
- if (intake > (int)state->mpu.rmaxn_intake_fan)
- intake = state->mpu.rmaxn_intake_fan;
+ intake = max(intake, (int)state->mpu.rminn_intake_fan);
+ intake = min(intake, (int)state->mpu.rmaxn_intake_fan);
state->intake_rpm = intake;
do_set_fans:
@@ -929,6 +1041,67 @@
}
}
+static void do_monitor_cpu_rack(struct cpu_pid_state *state)
+{
+ s32 temp, power, fan_min;
+ int rc;
+
+ /* Read current fan status */
+ rc = do_read_one_cpu_values(state, &temp, &power);
+ if (rc < 0) {
+ /* XXX What do we do now ? */
+ }
+
+ /* Check tmax, increment overtemp if we are there. At tmax+8, we go
+ * full blown immediately and try to trigger a shutdown
+ */
+ if (temp >= ((state->mpu.tmax + 8) << 16)) {
+ printk(KERN_WARNING "Warning ! CPU %d temperature way above maximum"
+ " (%d) !\n",
+ state->index, temp >> 16);
+ state->overtemp = CPU_MAX_OVERTEMP;
+ } else if (temp > (state->mpu.tmax << 16))
+ state->overtemp++;
+ else
+ state->overtemp = 0;
+ if (state->overtemp >= CPU_MAX_OVERTEMP)
+ critical_state = 1;
+ if (state->overtemp > 0) {
+ state->rpm = state->intake_rpm = state->mpu.rmaxn_intake_fan;
+ goto do_set_fans;
+ }
+
+ /* Do the PID */
+ do_cpu_pid(state, temp, power);
+
+ /* Check clamp from dimms */
+ fan_min = dimm_output_clamp;
+ fan_min = max(fan_min, (int)state->mpu.rminn_intake_fan);
+
+ state->rpm = max(state->rpm, (int)fan_min);
+ state->rpm = min(state->rpm, (int)state->mpu.rmaxn_intake_fan);
+ state->intake_rpm = state->rpm;
+
+ do_set_fans:
+ DBG("** CPU %d RPM: %d overtemp: %d\n",
+ state->index, (int)state->rpm, state->overtemp);
+
+ /* We should check for errors, shouldn't we ? But then, what
+ * do we do once the error occurs ? For FCU notified fan
+ * failures (-EFAULT) we probably want to notify userland
+ * some way...
+ */
+ if (state->index == 0) {
+ set_rpm_fan(CPU_A1_FAN_RPM_INDEX, state->rpm);
+ set_rpm_fan(CPU_A2_FAN_RPM_INDEX, state->rpm);
+ set_rpm_fan(CPU_A3_FAN_RPM_INDEX, state->rpm);
+ } else {
+ set_rpm_fan(CPU_B1_FAN_RPM_INDEX, state->rpm);
+ set_rpm_fan(CPU_B2_FAN_RPM_INDEX, state->rpm);
+ set_rpm_fan(CPU_B3_FAN_RPM_INDEX, state->rpm);
+ }
+}
+
/*
* Initialize the state structure for one CPU control loop
*/
@@ -936,7 +1109,7 @@
{
state->index = index;
state->first = 1;
- state->rpm = 1000;
+ state->rpm = (cpu_pid_type == CPU_PID_TYPE_RACKMAC) ? 4000 : 1000;
state->overtemp = 0;
state->adc_config = 0x00;
@@ -1012,13 +1185,13 @@
*/
static void do_monitor_backside(struct backside_pid_state *state)
{
- s32 temp, integral, derivative;
+ s32 temp, integral, derivative, fan_min;
s64 integ_p, deriv_p, prop_p, sum;
int i, rc;
if (--state->ticks != 0)
return;
- state->ticks = BACKSIDE_PID_INTERVAL;
+ state->ticks = backside_params.interval;
DBG("backside:\n");
@@ -1059,7 +1232,7 @@
integral = 0;
for (i = 0; i < BACKSIDE_PID_HISTORY_SIZE; i++)
integral += state->error_history[i];
- integral *= BACKSIDE_PID_INTERVAL;
+ integral *= backside_params.interval;
DBG(" integral: %08x\n", integral);
integ_p = ((s64)backside_params.G_r) * (s64)integral;
DBG(" integ_p: %d\n", (int)(integ_p >> 36));
@@ -1069,7 +1242,7 @@
derivative = state->error_history[state->cur_sample] -
state->error_history[(state->cur_sample + BACKSIDE_PID_HISTORY_SIZE - 1)
% BACKSIDE_PID_HISTORY_SIZE];
- derivative /= BACKSIDE_PID_INTERVAL;
+ derivative /= backside_params.interval;
deriv_p = ((s64)backside_params.G_d) * (s64)derivative;
DBG(" deriv_p: %d\n", (int)(deriv_p >> 36));
sum += deriv_p;
@@ -1083,11 +1256,17 @@
sum >>= 36;
DBG(" sum: %d\n", (int)sum);
- state->pwm += (s32)sum;
- if (state->pwm < backside_params.output_min)
- state->pwm = backside_params.output_min;
- if (state->pwm > backside_params.output_max)
- state->pwm = backside_params.output_max;
+ if (backside_params.additive)
+ state->pwm += (s32)sum;
+ else
+ state->pwm = sum;
+
+ /* Check for clamp */
+ fan_min = (dimm_output_clamp * 100) / 14000;
+ fan_min = max(fan_min, backside_params.output_min);
+
+ state->pwm = max(state->pwm, fan_min);
+ state->pwm = min(state->pwm, backside_params.output_max);
DBG("** BACKSIDE PWM: %d\n", (int)state->pwm);
set_pwm_fan(BACKSIDE_FAN_PWM_INDEX, state->pwm);
@@ -1114,17 +1293,33 @@
of_node_put(u3);
}
- backside_params.G_p = BACKSIDE_PID_G_p;
- backside_params.G_r = BACKSIDE_PID_G_r;
- backside_params.output_max = BACKSIDE_PID_OUTPUT_MAX;
- if (u3h) {
+ if (rackmac) {
+ backside_params.G_d = BACKSIDE_PID_RACK_G_d;
+ backside_params.input_target = BACKSIDE_PID_RACK_INPUT_TARGET;
+ backside_params.output_min = BACKSIDE_PID_U3H_OUTPUT_MIN;
+ backside_params.interval = BACKSIDE_PID_RACK_INTERVAL;
+ backside_params.G_p = BACKSIDE_PID_RACK_G_p;
+ backside_params.G_r = BACKSIDE_PID_G_r;
+ backside_params.output_max = BACKSIDE_PID_OUTPUT_MAX;
+ backside_params.additive = 0;
+ } else if (u3h) {
backside_params.G_d = BACKSIDE_PID_U3H_G_d;
backside_params.input_target = BACKSIDE_PID_U3H_INPUT_TARGET;
backside_params.output_min = BACKSIDE_PID_U3H_OUTPUT_MIN;
+ backside_params.interval = BACKSIDE_PID_INTERVAL;
+ backside_params.G_p = BACKSIDE_PID_G_p;
+ backside_params.G_r = BACKSIDE_PID_G_r;
+ backside_params.output_max = BACKSIDE_PID_OUTPUT_MAX;
+ backside_params.additive = 1;
} else {
backside_params.G_d = BACKSIDE_PID_U3_G_d;
backside_params.input_target = BACKSIDE_PID_U3_INPUT_TARGET;
backside_params.output_min = BACKSIDE_PID_U3_OUTPUT_MIN;
+ backside_params.interval = BACKSIDE_PID_INTERVAL;
+ backside_params.G_p = BACKSIDE_PID_G_p;
+ backside_params.G_r = BACKSIDE_PID_G_r;
+ backside_params.output_max = BACKSIDE_PID_OUTPUT_MAX;
+ backside_params.additive = 1;
}
state->ticks = 1;
@@ -1233,10 +1428,9 @@
DBG(" sum: %d\n", (int)sum);
state->rpm += (s32)sum;
- if (state->rpm < DRIVES_PID_OUTPUT_MIN)
- state->rpm = DRIVES_PID_OUTPUT_MIN;
- if (state->rpm > DRIVES_PID_OUTPUT_MAX)
- state->rpm = DRIVES_PID_OUTPUT_MAX;
+
+ state->rpm = max(state->rpm, DRIVES_PID_OUTPUT_MIN);
+ state->rpm = min(state->rpm, DRIVES_PID_OUTPUT_MAX);
DBG("** DRIVES RPM: %d\n", (int)state->rpm);
set_rpm_fan(DRIVES_FAN_RPM_INDEX, state->rpm);
@@ -1276,6 +1470,126 @@
state->monitor = NULL;
}
+/*
+ * DIMMs temp control loop
+ */
+static void do_monitor_dimms(struct dimm_pid_state *state)
+{
+ s32 temp, integral, derivative, fan_min;
+ s64 integ_p, deriv_p, prop_p, sum;
+ int i;
+
+ if (--state->ticks != 0)
+ return;
+ state->ticks = DIMM_PID_INTERVAL;
+
+ DBG("DIMM:\n");
+
+ DBG(" current value: %d\n", state->output);
+
+ temp = read_lm87_reg(state->monitor, LM87_INT_TEMP);
+ if (temp < 0)
+ return;
+ temp <<= 16;
+ state->last_temp = temp;
+ DBG(" temp: %d.%03d, target: %d.%03d\n", FIX32TOPRINT(temp),
+ FIX32TOPRINT(DIMM_PID_INPUT_TARGET));
+
+ /* Store temperature and error in history array */
+ state->cur_sample = (state->cur_sample + 1) % DIMM_PID_HISTORY_SIZE;
+ state->sample_history[state->cur_sample] = temp;
+ state->error_history[state->cur_sample] = temp - DIMM_PID_INPUT_TARGET;
+
+ /* If first loop, fill the history table */
+ if (state->first) {
+ for (i = 0; i < (DIMM_PID_HISTORY_SIZE - 1); i++) {
+ state->cur_sample = (state->cur_sample + 1) %
+ DIMM_PID_HISTORY_SIZE;
+ state->sample_history[state->cur_sample] = temp;
+ state->error_history[state->cur_sample] =
+ temp - DIMM_PID_INPUT_TARGET;
+ }
+ state->first = 0;
+ }
+
+ /* Calculate the integral term */
+ sum = 0;
+ integral = 0;
+ for (i = 0; i < DIMM_PID_HISTORY_SIZE; i++)
+ integral += state->error_history[i];
+ integral *= DIMM_PID_INTERVAL;
+ DBG(" integral: %08x\n", integral);
+ integ_p = ((s64)DIMM_PID_G_r) * (s64)integral;
+ DBG(" integ_p: %d\n", (int)(integ_p >> 36));
+ sum += integ_p;
+
+ /* Calculate the derivative term */
+ derivative = state->error_history[state->cur_sample] -
+ state->error_history[(state->cur_sample + DIMM_PID_HISTORY_SIZE - 1)
+ % DIMM_PID_HISTORY_SIZE];
+ derivative /= DIMM_PID_INTERVAL;
+ deriv_p = ((s64)DIMM_PID_G_d) * (s64)derivative;
+ DBG(" deriv_p: %d\n", (int)(deriv_p >> 36));
+ sum += deriv_p;
+
+ /* Calculate the proportional term */
+ prop_p = ((s64)DIMM_PID_G_p) * (s64)(state->error_history[state->cur_sample]);
+ DBG(" prop_p: %d\n", (int)(prop_p >> 36));
+ sum += prop_p;
+
+ /* Scale sum */
+ sum >>= 36;
+
+ DBG(" sum: %d\n", (int)sum);
+ state->output = (s32)sum;
+ state->output = max(state->output, DIMM_PID_OUTPUT_MIN);
+ state->output = min(state->output, DIMM_PID_OUTPUT_MAX);
+ dimm_output_clamp = state->output;
+
+ DBG("** DIMM clamp value: %d\n", (int)state->output);
+
+ /* Backside PID is only every 5 seconds, force backside fan clamping now */
+ fan_min = (dimm_output_clamp * 100) / 14000;
+ fan_min = max(fan_min, backside_params.output_min);
+ if (backside_state.pwm < fan_min) {
+ backside_state.pwm = fan_min;
+ DBG(" -> applying clamp to backside fan now: %d !\n", fan_min);
+ set_pwm_fan(BACKSIDE_FAN_PWM_INDEX, fan_min);
+ }
+}
+
+/*
+ * Initialize the state structure for the DIMM temp control loop
+ */
+static int init_dimms_state(struct dimm_pid_state *state)
+{
+ state->ticks = 1;
+ state->first = 1;
+ state->output = 4000;
+
+ state->monitor = attach_i2c_chip(XSERVE_DIMMS_LM87, "dimms_temp");
+ if (state->monitor == NULL)
+ return -ENODEV;
+
+ device_create_file(&of_dev->dev, &dev_attr_dimms_temperature);
+
+ return 0;
+}
+
+/*
+ * Dispose of the state data for the drives control loop
+ */
+static void dispose_dimms_state(struct dimm_pid_state *state)
+{
+ if (state->monitor == NULL)
+ return;
+
+ device_remove_file(&of_dev->dev, &dev_attr_dimms_temperature);
+
+ detach_i2c_chip(state->monitor);
+ state->monitor = NULL;
+}
+
static int call_critical_overtemp(void)
{
char *argv[] = { critical_overtemp_path, NULL };
@@ -1321,15 +1635,29 @@
start = jiffies;
down(&driver_lock);
+
+ /* First, we always calculate the new DIMMs state on an Xserve */
+ if (rackmac)
+ do_monitor_dimms(&dimms_state);
+
+ /* Then, the CPUs */
if (cpu_pid_type == CPU_PID_TYPE_COMBINED)
do_monitor_cpu_combined();
- else {
+ else if (cpu_pid_type == CPU_PID_TYPE_RACKMAC) {
+ do_monitor_cpu_rack(&cpu_state[0]);
+ if (cpu_state[1].monitor != NULL)
+ do_monitor_cpu_rack(&cpu_state[1]);
+ // better deal with UP
+ } else {
do_monitor_cpu_split(&cpu_state[0]);
if (cpu_state[1].monitor != NULL)
do_monitor_cpu_split(&cpu_state[1]);
+ // better deal with UP
}
+ /* Then, the rest */
do_monitor_backside(&backside_state);
- do_monitor_drives(&drives_state);
+ if (!rackmac)
+ do_monitor_drives(&drives_state);
up(&driver_lock);
if (critical_state == 1) {
@@ -1369,9 +1697,9 @@
{
dispose_cpu_state(&cpu_state[0]);
dispose_cpu_state(&cpu_state[1]);
-
dispose_backside_state(&backside_state);
dispose_drives_state(&drives_state);
+ dispose_dimms_state(&dimms_state);
}
/*
@@ -1395,7 +1723,9 @@
* the pumps, though that may not be the best way, that is good enough
* for now
*/
- if (machine_is_compatible("PowerMac7,3")
+ if (rackmac)
+ cpu_pid_type = CPU_PID_TYPE_RACKMAC;
+ else if (machine_is_compatible("PowerMac7,3")
&& (cpu_count > 1)
&& fcu_fans[CPUA_PUMP_RPM_INDEX].id != FCU_FAN_ABSENT_ID
&& fcu_fans[CPUB_PUMP_RPM_INDEX].id != FCU_FAN_ABSENT_ID) {
@@ -1409,11 +1739,16 @@
*/
if (init_cpu_state(&cpu_state[0], 0))
goto fail;
+ if (cpu_pid_type == CPU_PID_TYPE_COMBINED)
+ fetch_cpu_pumps_minmax();
+
if (cpu_count > 1 && init_cpu_state(&cpu_state[1], 1))
goto fail;
if (init_backside_state(&backside_state))
goto fail;
- if (init_drives_state(&drives_state))
+ if (rackmac && init_dimms_state(&dimms_state))
+ goto fail;
+ if (!rackmac && init_drives_state(&drives_state))
goto fail;
DBG("all control loops up !\n");
@@ -1492,17 +1827,24 @@
/* Check if we are looking for one of these */
if (u3_0 == NULL && !strcmp(adapter->name, "u3 0")) {
u3_0 = adapter;
- DBG("found U3-0, creating control loops\n");
- if (create_control_loops())
- u3_0 = NULL;
+ DBG("found U3-0\n");
+ if (k2 || !rackmac)
+ if (create_control_loops())
+ u3_0 = NULL;
} else if (u3_1 == NULL && !strcmp(adapter->name, "u3 1")) {
u3_1 = adapter;
DBG("found U3-1, attaching FCU\n");
if (attach_fcu())
u3_1 = NULL;
+ } else if (k2 == NULL && !strcmp(adapter->name, "mac-io 0")) {
+ k2 = adapter;
+ DBG("Found K2\n");
+ if (u3_0 && rackmac)
+ if (create_control_loops())
+ k2 = NULL;
}
/* We got all we need, start control loops */
- if (u3_0 != NULL && u3_1 != NULL) {
+ if (u3_0 != NULL && u3_1 != NULL && (k2 || !rackmac)) {
DBG("everything up, starting control loops\n");
state = state_attached;
start_control_loops();
@@ -1548,6 +1890,27 @@
return 0;
}
+static int fan_check_loc_match(const char *loc, int fan)
+{
+ char tmp[64];
+ char *c, *e;
+
+ strlcpy(tmp, fcu_fans[fan].loc, 64);
+
+ c = tmp;
+ for (;;) {
+ e = strchr(c, ',');
+ if (e)
+ *e = 0;
+ if (strcmp(loc, c) == 0)
+ return 1;
+ if (e == NULL)
+ break;
+ c = e + 1;
+ }
+ return 0;
+}
+
static void fcu_lookup_fans(struct device_node *fcu_node)
{
struct device_node *np = NULL;
@@ -1589,7 +1952,7 @@
for (i = 0; i < FCU_FAN_COUNT; i++) {
int fan_id;
- if (strcmp(loc, fcu_fans[i].loc))
+ if (!fan_check_loc_match(loc, i))
continue;
DBG(" location match, index: %d\n", i);
fcu_fans[i].id = FCU_FAN_ABSENT_ID;
@@ -1671,8 +2034,11 @@
{
struct device_node *np;
+ rackmac = machine_is_compatible("RackMac3,1");
+
if (!machine_is_compatible("PowerMac7,2") &&
- !machine_is_compatible("PowerMac7,3"))
+ !machine_is_compatible("PowerMac7,3") &&
+ !rackmac)
return -ENODEV;
printk(KERN_INFO "PowerMac G5 Thermal control driver %s\n", VERSION);
@@ -1709,6 +2075,6 @@
module_exit(therm_pm72_exit);
MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
-MODULE_DESCRIPTION("Driver for Apple's PowerMac7,2 G5 thermal control");
+MODULE_DESCRIPTION("Driver for Apple's PowerMac G5 thermal control");
MODULE_LICENSE("GPL");
diff -Nru a/drivers/macintosh/therm_pm72.h b/drivers/macintosh/therm_pm72.h
--- a/drivers/macintosh/therm_pm72.h 2005-03-20 16:30:37 -08:00
+++ b/drivers/macintosh/therm_pm72.h 2005-03-20 16:30:37 -08:00
@@ -52,7 +52,7 @@
u16 rmaxn_intake_fan; /* 0x4e - Intake fan max RPM */
u16 rminn_exhaust_fan; /* 0x50 - Exhaust fan min RPM */
u16 rmaxn_exhaust_fan; /* 0x52 - Exhaust fan max RPM */
- u8 processor_part_num[8]; /* 0x54 - Processor part number */
+ u8 processor_part_num[8]; /* 0x54 - Processor part number XX pumps min/max */
u32 processor_lot_num; /* 0x5c - Processor lot number */
u8 orig_card_sernum[0x10]; /* 0x60 - Card original serial number */
u8 curr_card_sernum[0x10]; /* 0x70 - Card current serial number */
@@ -94,19 +94,25 @@
* of the driver, though I would accept any clean patch
* doing a better use of the device-tree without turning the
* while i2c registration mecanism into a racy mess
+ *
+ * Note: Xserve changed this. We have some bits on the K2 bus,
+ * which I arbitrarily set to 0x200. Ultimately, we really want
+ * too lookup these in the device-tree though
*/
#define FAN_CTRLER_ID 0x15e
#define SUPPLY_MONITOR_ID 0x58
#define SUPPLY_MONITORB_ID 0x5a
#define DRIVES_DALLAS_ID 0x94
#define BACKSIDE_MAX_ID 0x98
+#define XSERVE_DIMMS_LM87 0x25a
/*
- * Some MAX6690 & DS1775 register definitions
+ * Some MAX6690, DS1775, LM87 register definitions
*/
#define MAX6690_INT_TEMP 0
#define MAX6690_EXT_TEMP 1
#define DS1775_TEMP 0
+#define LM87_INT_TEMP 0x27
/*
* Scaling factors for the AD7417 ADC converters (except
@@ -126,14 +132,18 @@
#define BACKSIDE_FAN_PWM_INDEX 0
#define BACKSIDE_PID_U3_G_d 0x02800000
#define BACKSIDE_PID_U3H_G_d 0x01400000
+#define BACKSIDE_PID_RACK_G_d 0x00500000
#define BACKSIDE_PID_G_p 0x00500000
+#define BACKSIDE_PID_RACK_G_p 0x0004cccc
#define BACKSIDE_PID_G_r 0x00000000
#define BACKSIDE_PID_U3_INPUT_TARGET 0x00410000
#define BACKSIDE_PID_U3H_INPUT_TARGET 0x004b0000
+#define BACKSIDE_PID_RACK_INPUT_TARGET 0x00460000
#define BACKSIDE_PID_INTERVAL 5
+#define BACKSIDE_PID_RACK_INTERVAL 1
#define BACKSIDE_PID_OUTPUT_MAX 100
#define BACKSIDE_PID_U3_OUTPUT_MIN 20
-#define BACKSIDE_PID_U3H_OUTPUT_MIN 30
+#define BACKSIDE_PID_U3H_OUTPUT_MIN 20
#define BACKSIDE_PID_HISTORY_SIZE 2
struct basckside_pid_params
@@ -144,6 +154,8 @@
s32 input_target;
s32 output_min;
s32 output_max;
+ s32 interval;
+ int additive;
};
struct backside_pid_state
@@ -188,25 +200,34 @@
#define SLOTS_FAN_PWM_INDEX 2
#define SLOTS_FAN_DEFAULT_PWM 50 /* Do better here ! */
+
/*
- * IDs in Darwin for the sensors & fans
- *
- * CPU A AD7417_TEMP 10 (CPU A ambient temperature)
- * CPU A AD7417_AD1 11 (CPU A diode temperature)
- * CPU A AD7417_AD2 12 (CPU A 12V current)
- * CPU A AD7417_AD3 13 (CPU A voltage)
- * CPU A AD7417_AD4 14 (CPU A current)
- *
- * CPU A FAKE POWER 48 (I_V_inputs: 13, 14)
- *
- * CPU B AD7417_TEMP 15 (CPU B ambient temperature)
- * CPU B AD7417_AD1 16 (CPU B diode temperature)
- * CPU B AD7417_AD2 17 (CPU B 12V current)
- * CPU B AD7417_AD3 18 (CPU B voltage)
- * CPU B AD7417_AD4 19 (CPU B current)
- *
- * CPU B FAKE POWER 49 (I_V_inputs: 18, 19)
+ * PID factors for the Xserve DIMM control loop
*/
+#define DIMM_PID_G_d 0
+#define DIMM_PID_G_p 0
+#define DIMM_PID_G_r 0x6553600
+#define DIMM_PID_INPUT_TARGET 3276800
+#define DIMM_PID_INTERVAL 1
+#define DIMM_PID_OUTPUT_MAX 14000
+#define DIMM_PID_OUTPUT_MIN 4000
+#define DIMM_PID_HISTORY_SIZE 20
+
+struct dimm_pid_state
+{
+ int ticks;
+ struct i2c_client * monitor;
+ s32 sample_history[DIMM_PID_HISTORY_SIZE];
+ s32 error_history[DIMM_PID_HISTORY_SIZE];
+ int cur_sample;
+ s32 last_temp;
+ int first;
+ int output;
+};
+
+
+
+/* Desktops */
#define CPUA_INTAKE_FAN_RPM_DEFAULT_ID 3
#define CPUA_EXHAUST_FAN_RPM_DEFAULT_ID 4
@@ -226,8 +247,17 @@
#define CPUA_PUMP_RPM_INDEX 7
#define CPUB_PUMP_RPM_INDEX 8
-#define CPU_PUMP_OUTPUT_MAX 3700
-#define CPU_PUMP_OUTPUT_MIN 1000
+#define CPU_PUMP_OUTPUT_MAX 3200
+#define CPU_PUMP_OUTPUT_MIN 1250
+
+/* Xserve */
+#define CPU_A1_FAN_RPM_INDEX 9
+#define CPU_A2_FAN_RPM_INDEX 10
+#define CPU_A3_FAN_RPM_INDEX 11
+#define CPU_B1_FAN_RPM_INDEX 12
+#define CPU_B2_FAN_RPM_INDEX 13
+#define CPU_B3_FAN_RPM_INDEX 14
+
struct cpu_pid_state
{
@@ -249,6 +279,8 @@
s32 last_power;
int first;
u8 adc_config;
+ s32 pump_min;
+ s32 pump_max;
};
/*
diff -Nru a/drivers/media/video/planb.c b/drivers/media/video/planb.c
--- a/drivers/media/video/planb.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/media/video/planb.c 2005-03-20 16:30:37 -08:00
@@ -422,6 +422,16 @@
/* overlay support functions */
/*****************************/
+static inline int overlay_is_active(struct planb *pb)
+{
+ unsigned int size = pb->tab_size * sizeof(struct dbdma_cmd);
+ unsigned int caddr = (unsigned)in_le32(&pb->planb_base->ch1.cmdptr);
+
+ return (in_le32(&pb->overlay_last1->cmd_dep) == pb->ch1_cmd_phys)
+ && (caddr < (pb->ch1_cmd_phys + size))
+ && (caddr >= (unsigned)pb->ch1_cmd_phys);
+}
+
static void overlay_start(struct planb *pb)
{
@@ -852,16 +862,6 @@
};
#define PLANB_PALETTE_MAX 15
-
-static inline int overlay_is_active(struct planb *pb)
-{
- unsigned int size = pb->tab_size * sizeof(struct dbdma_cmd);
- unsigned int caddr = (unsigned)in_le32(&pb->planb_base->ch1.cmdptr);
-
- return (in_le32(&pb->overlay_last1->cmd_dep) == pb->ch1_cmd_phys)
- && (caddr < (pb->ch1_cmd_phys + size))
- && (caddr >= (unsigned)pb->ch1_cmd_phys);
-}
static int vgrab(struct planb *pb, struct video_mmap *mp)
{
diff -Nru a/drivers/misc/Makefile b/drivers/misc/Makefile
--- a/drivers/misc/Makefile 2005-03-20 16:30:37 -08:00
+++ b/drivers/misc/Makefile 2005-03-20 16:30:37 -08:00
@@ -4,3 +4,4 @@
obj- := misc.o # Dummy rule to force built-in.o to be made
obj-$(CONFIG_IBM_ASM) += ibmasm/
+obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/
diff -Nru a/drivers/misc/hdpuftrs/Makefile b/drivers/misc/hdpuftrs/Makefile
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/drivers/misc/hdpuftrs/Makefile 2005-03-20 16:30:37 -08:00
@@ -0,0 +1 @@
+obj-$(CONFIG_HDPU_FEATURES) := hdpu_cpustate.o hdpu_nexus.o
diff -Nru a/drivers/misc/hdpuftrs/hdpu_cpustate.c b/drivers/misc/hdpuftrs/hdpu_cpustate.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/drivers/misc/hdpuftrs/hdpu_cpustate.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,234 @@
+/*
+ * Sky CPU State Driver
+ *
+ * Copyright (C) 2002 Brian Waite
+ *
+ * This driver allows use of the CPU state bits
+ * It exports the /dev/sky_cpustate and also
+ * /proc/sky_cpustate pseudo-file for status information.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+#include <linux/miscdevice.h>
+#include <linux/pci.h>
+#include <linux/proc_fs.h>
+#include <linux/device.h>
+#include <asm/uaccess.h>
+#include <linux/hdpu_features.h>
+
+#define SKY_CPUSTATE_VERSION "1.1"
+
+static int hdpu_cpustate_probe(struct device *ddev);
+static int hdpu_cpustate_remove(struct device *ddev);
+
+struct cpustate_t cpustate;
+
+static int cpustate_get_ref(int excl)
+{
+
+ int retval = -EBUSY;
+
+ spin_lock(&cpustate.lock);
+
+ if (cpustate.excl)
+ goto out_busy;
+
+ if (excl) {
+ if (cpustate.open_count)
+ goto out_busy;
+ cpustate.excl = 1;
+ }
+
+ cpustate.open_count++;
+ retval = 0;
+
+ out_busy:
+ spin_unlock(&cpustate.lock);
+ return retval;
+}
+
+static int cpustate_free_ref(void)
+{
+
+ spin_lock(&cpustate.lock);
+
+ cpustate.excl = 0;
+ cpustate.open_count--;
+
+ spin_unlock(&cpustate.lock);
+ return 0;
+}
+
+unsigned char cpustate_get_state(void)
+{
+
+ return cpustate.cached_val;
+}
+
+void cpustate_set_state(unsigned char new_state)
+{
+ unsigned int state = (new_state << 21);
+
+#ifdef DEBUG_CPUSTATE
+ printk("CPUSTATE -> 0x%x\n", new_state);
+#endif
+ spin_lock(&cpustate.lock);
+ cpustate.cached_val = new_state;
+ writel((0xff << 21), cpustate.clr_addr);
+ writel(state, cpustate.set_addr);
+ spin_unlock(&cpustate.lock);
+}
+
+/*
+ * Now all the various file operations that we export.
+ */
+
+static ssize_t cpustate_read(struct file *file, char *buf,
+ size_t count, loff_t * ppos)
+{
+ unsigned char data;
+
+ if (count < 0)
+ return -EFAULT;
+ if (count == 0)
+ return 0;
+
+ data = cpustate_get_state();
+ if (copy_to_user(buf, &data, sizeof(unsigned char)))
+ return -EFAULT;
+ return sizeof(unsigned char);
+}
+
+static ssize_t cpustate_write(struct file *file, const char *buf,
+ size_t count, loff_t * ppos)
+{
+ unsigned char data;
+
+ if (count < 0)
+ return -EFAULT;
+
+ if (count == 0)
+ return 0;
+
+ if (copy_from_user((unsigned char *)&data, buf, sizeof(unsigned char)))
+ return -EFAULT;
+
+ cpustate_set_state(data);
+ return sizeof(unsigned char);
+}
+
+static int cpustate_open(struct inode *inode, struct file *file)
+{
+ return cpustate_get_ref((file->f_flags & O_EXCL));
+}
+
+static int cpustate_release(struct inode *inode, struct file *file)
+{
+ return cpustate_free_ref();
+}
+
+/*
+ * Info exported via "/proc/sky_cpustate".
+ */
+static int cpustate_read_proc(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ char *p = page;
+ int len = 0;
+
+ p += sprintf(p, "CPU State: %04x\n", cpustate_get_state());
+ len = p - page;
+
+ if (len <= off + count)
+ *eof = 1;
+ *start = page + off;
+ len -= off;
+ if (len > count)
+ len = count;
+ if (len < 0)
+ len = 0;
+ return len;
+}
+
+static struct device_driver hdpu_cpustate_driver = {
+ .name = HDPU_CPUSTATE_NAME,
+ .bus = &platform_bus_type,
+ .probe = hdpu_cpustate_probe,
+ .remove = hdpu_cpustate_remove,
+};
+
+/*
+ * The various file operations we support.
+ */
+static struct file_operations cpustate_fops = {
+ owner:THIS_MODULE,
+ open:cpustate_open,
+ release:cpustate_release,
+ read:cpustate_read,
+ write:cpustate_write,
+ fasync:NULL,
+ poll:NULL,
+ ioctl:NULL,
+ llseek:no_llseek,
+
+};
+
+static struct miscdevice cpustate_dev = {
+ MISC_DYNAMIC_MINOR,
+ "sky_cpustate",
+ &cpustate_fops
+};
+
+static int hdpu_cpustate_probe(struct device *ddev)
+{
+ struct platform_device *pdev = to_platform_device(ddev);
+ struct resource *res;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ cpustate.set_addr = (unsigned long *)res->start;
+ cpustate.clr_addr = (unsigned long *)res->end - 1;
+
+ misc_register(&cpustate_dev);
+ create_proc_read_entry("sky_cpustate", 0, 0, cpustate_read_proc, NULL);
+
+ printk(KERN_INFO "Sky CPU State Driver v" SKY_CPUSTATE_VERSION "\n");
+ return 0;
+}
+static int hdpu_cpustate_remove(struct device *ddev)
+{
+
+ cpustate.set_addr = 0;
+ cpustate.clr_addr = 0;
+
+ remove_proc_entry("sky_cpustate", NULL);
+ misc_deregister(&cpustate_dev);
+ return 0;
+
+}
+
+static int __init cpustate_init(void)
+{
+ int rc;
+ rc = driver_register(&hdpu_cpustate_driver);
+ return rc;
+}
+
+static void __exit cpustate_exit(void)
+{
+ driver_unregister(&hdpu_cpustate_driver);
+}
+
+module_init(cpustate_init);
+module_exit(cpustate_exit);
+
+MODULE_AUTHOR("Brian Waite");
+MODULE_LICENSE("GPL");
diff -Nru a/drivers/misc/hdpuftrs/hdpu_nexus.c b/drivers/misc/hdpuftrs/hdpu_nexus.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/drivers/misc/hdpuftrs/hdpu_nexus.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,111 @@
+/*
+ * Sky Nexus Register Driver
+ *
+ * Copyright (C) 2002 Brian Waite
+ *
+ * This driver allows reading the Nexus register
+ * It exports the /proc/sky_chassis_id and also
+ * /proc/sky_slot_id pseudo-file for status information.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/proc_fs.h>
+#include <linux/hdpu_features.h>
+#include <linux/pci.h>
+
+#include <linux/device.h>
+
+static int hdpu_nexus_probe(struct device *ddev);
+static int hdpu_nexus_remove(struct device *ddev);
+
+static struct proc_dir_entry *hdpu_slot_id;
+static struct proc_dir_entry *hdpu_chassis_id;
+static int slot_id = -1;
+static int chassis_id = -1;
+
+static struct device_driver hdpu_nexus_driver = {
+ .name = HDPU_NEXUS_NAME,
+ .bus = &platform_bus_type,
+ .probe = hdpu_nexus_probe,
+ .remove = hdpu_nexus_remove,
+};
+
+int hdpu_slot_id_read(char *buffer, char **buffer_location, off_t offset,
+ int buffer_length, int *zero, void *ptr)
+{
+
+ if (offset > 0)
+ return 0;
+ return sprintf(buffer, "%d\n", slot_id);
+}
+
+int hdpu_chassis_id_read(char *buffer, char **buffer_location, off_t offset,
+ int buffer_length, int *zero, void *ptr)
+{
+
+ if (offset > 0)
+ return 0;
+ return sprintf(buffer, "%d\n", chassis_id);
+}
+
+static int hdpu_nexus_probe(struct device *ddev)
+{
+ struct platform_device *pdev = to_platform_device(ddev);
+ struct resource *res;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ int *nexus_id_addr;
+ nexus_id_addr =
+ ioremap(res->start, (unsigned long)(res->end - res->start));
+ if (nexus_id_addr) {
+ slot_id = (*nexus_id_addr >> 8) & 0x1f;
+ chassis_id = *nexus_id_addr & 0xff;
+ iounmap(nexus_id_addr);
+ } else
+ printk("Could not map slot id\n");
+ hdpu_slot_id = create_proc_entry("sky_slot_id", 0666, &proc_root);
+ hdpu_slot_id->read_proc = hdpu_slot_id_read;
+ hdpu_slot_id->nlink = 1;
+
+ hdpu_chassis_id = create_proc_entry("sky_chassis_id", 0666, &proc_root);
+ hdpu_chassis_id->read_proc = hdpu_chassis_id_read;
+ hdpu_chassis_id->nlink = 1;
+ return 0;
+}
+
+static int hdpu_nexus_remove(struct device *ddev)
+{
+ slot_id = -1;
+ chassis_id = -1;
+ remove_proc_entry("sky_slot_id", &proc_root);
+ remove_proc_entry("sky_chassis_id", &proc_root);
+ hdpu_slot_id = 0;
+ hdpu_chassis_id = 0;
+ return 0;
+}
+
+static int __init nexus_init(void)
+{
+ int rc;
+ rc = driver_register(&hdpu_nexus_driver);
+ return rc;
+}
+
+static void __exit nexus_exit(void)
+{
+ driver_unregister(&hdpu_nexus_driver);
+}
+
+module_init(nexus_init);
+module_exit(nexus_exit);
+
+MODULE_AUTHOR("Brian Waite");
+MODULE_LICENSE("GPL");
diff -Nru a/drivers/net/tun.c b/drivers/net/tun.c
--- a/drivers/net/tun.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/net/tun.c 2005-03-20 16:30:37 -08:00
@@ -226,7 +226,7 @@
{
struct tun_pi pi = { 0, __constant_htons(ETH_P_IP) };
struct sk_buff *skb;
- size_t len = count;
+ size_t len = count, align = 0;
if (!(tun->flags & TUN_NO_PI)) {
if ((len -= sizeof(pi)) > count)
@@ -235,13 +235,17 @@
if(memcpy_fromiovec((void *)&pi, iv, sizeof(pi)))
return -EFAULT;
}
+
+ if ((tun->flags & TUN_TYPE_MASK) == TUN_TAP_DEV)
+ align = NET_IP_ALIGN;
- if (!(skb = alloc_skb(len + 2, GFP_KERNEL))) {
+ if (!(skb = alloc_skb(len + align, GFP_KERNEL))) {
tun->stats.rx_dropped++;
return -ENOMEM;
}
- skb_reserve(skb, 2);
+ if (align)
+ skb_reserve(skb, align);
if (memcpy_fromiovec(skb_put(skb, len), iv, len))
return -EFAULT;
diff -Nru a/drivers/s390/cio/cio.c b/drivers/s390/cio/cio.c
--- a/drivers/s390/cio/cio.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/s390/cio/cio.c 2005-03-20 16:30:37 -08:00
@@ -1,7 +1,7 @@
/*
* drivers/s390/cio/cio.c
* S/390 common I/O routines -- low level i/o calls
- * $Revision: 1.130 $
+ * $Revision: 1.131 $
*
* Copyright (C) 1999-2002 IBM Deutschland Entwicklung GmbH,
* IBM Corporation
@@ -608,6 +608,10 @@
irq_enter ();
asm volatile ("mc 0,0");
if (S390_lowcore.int_clock >= S390_lowcore.jiffy_timer)
+ /**
+ * Make sure that the i/o interrupt did not "overtake"
+ * the last HZ timer interrupt.
+ */
account_ticks(regs);
/*
* Get interrupt information from lowcore
diff -Nru a/drivers/s390/cio/device_fsm.c b/drivers/s390/cio/device_fsm.c
--- a/drivers/s390/cio/device_fsm.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/s390/cio/device_fsm.c 2005-03-20 16:30:37 -08:00
@@ -649,9 +649,11 @@
cdev->private->state = DEV_STATE_NOT_OPER;
sch = to_subchannel(cdev->dev.parent);
- device_unregister(&sch->dev);
- sch->schib.pmcw.intparm = 0;
- cio_modify(sch);
+ if (get_device(&cdev->dev)) {
+ PREPARE_WORK(&cdev->private->kick_work,
+ ccw_device_call_sch_unregister, (void *)cdev);
+ queue_work(ccw_device_work, &cdev->private->kick_work);
+ }
wake_up(&cdev->private->wait_q);
}
@@ -678,9 +680,11 @@
// FIXME: not-oper indication to device driver ?
ccw_device_call_handler(cdev);
}
- device_unregister(&sch->dev);
- sch->schib.pmcw.intparm = 0;
- cio_modify(sch);
+ if (get_device(&cdev->dev)) {
+ PREPARE_WORK(&cdev->private->kick_work,
+ ccw_device_call_sch_unregister, (void *)cdev);
+ queue_work(ccw_device_work, &cdev->private->kick_work);
+ }
wake_up(&cdev->private->wait_q);
}
diff -Nru a/drivers/s390/net/ctcmain.c b/drivers/s390/net/ctcmain.c
--- a/drivers/s390/net/ctcmain.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/s390/net/ctcmain.c 2005-03-20 16:30:37 -08:00
@@ -1,5 +1,5 @@
/*
- * $Id: ctcmain.c,v 1.69 2005/02/27 19:46:44 ptiedem Exp $
+ * $Id: ctcmain.c,v 1.72 2005/03/17 10:51:52 ptiedem Exp $
*
* CTC / ESCON network driver
*
@@ -37,7 +37,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
- * RELEASE-TAG: CTC/ESCON network driver $Revision: 1.69 $
+ * RELEASE-TAG: CTC/ESCON network driver $Revision: 1.72 $
*
*/
@@ -281,6 +281,8 @@
*/
fsm_timer restart_timer;
+ int buffer_size;
+
struct channel *channel[2];
};
@@ -321,7 +323,7 @@
print_banner(void)
{
static int printed = 0;
- char vbuf[] = "$Revision: 1.68 $";
+ char vbuf[] = "$Revision: 1.72 $";
char *version = vbuf;
if (printed)
@@ -2704,7 +2706,7 @@
if (!priv)
return -ENODEV;
return sprintf(buf, "%d\n",
- priv->channel[READ]->max_bufsize);
+ priv->buffer_size);
}
static ssize_t
@@ -2731,6 +2733,7 @@
if (bs1 < (576 + LL_HEADER_LENGTH + 2))
return -EINVAL;
+ priv->buffer_size = bs1;
priv->channel[READ]->max_bufsize =
priv->channel[WRITE]->max_bufsize = bs1;
if (!(ndev->flags & IFF_RUNNING))
@@ -2926,7 +2929,8 @@
}
fsm_newstate(privptr->fsm, DEV_STATE_STOPPED);
fsm_settimer(privptr->fsm, &privptr->restart_timer);
- dev->mtu = CTC_BUFSIZE_DEFAULT - LL_HEADER_LENGTH - 2;
+ if (dev->mtu == 0)
+ dev->mtu = CTC_BUFSIZE_DEFAULT - LL_HEADER_LENGTH - 2;
dev->hard_start_xmit = ctc_tx;
dev->open = ctc_open;
dev->stop = ctc_close;
@@ -3051,7 +3055,7 @@
put_device(&cgdev->dev);
return rc;
}
-
+ priv->buffer_size = CTC_BUFSIZE_DEFAULT;
cgdev->cdev[0]->handler = ctc_irq_handler;
cgdev->cdev[1]->handler = ctc_irq_handler;
cgdev->dev.driver_data = priv;
@@ -3132,7 +3136,7 @@
}
privptr->channel[direction]->netdev = dev;
privptr->channel[direction]->protocol = privptr->protocol;
- privptr->channel[direction]->max_bufsize = CTC_BUFSIZE_DEFAULT;
+ privptr->channel[direction]->max_bufsize = privptr->buffer_size;
}
/* sysfs magic */
SET_NETDEV_DEV(dev, &cgdev->dev);
diff -Nru a/drivers/scsi/ide-scsi.c b/drivers/scsi/ide-scsi.c
--- a/drivers/scsi/ide-scsi.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/scsi/ide-scsi.c 2005-03-20 16:30:37 -08:00
@@ -96,14 +96,39 @@
*/
#define IDESCSI_LOG_CMD 0 /* Log SCSI commands */
-typedef struct {
- ide_drive_t *drive;
+typedef struct ide_scsi_obj {
+ ide_drive_t *drive;
+ struct Scsi_Host *host;
+
idescsi_pc_t *pc; /* Current packet command */
unsigned long flags; /* Status/Action flags */
unsigned long transform; /* SCSI cmd translation layer */
unsigned long log; /* log flags */
} idescsi_scsi_t;
+static DECLARE_MUTEX(idescsi_ref_sem);
+
+#define ide_scsi_g(disk) ((disk)->private_data)
+
+static struct ide_scsi_obj *ide_scsi_get(struct gendisk *disk)
+{
+ struct ide_scsi_obj *scsi = NULL;
+
+ down(&idescsi_ref_sem);
+ scsi = ide_scsi_g(disk);
+ if (scsi)
+ scsi_host_get(scsi->host);
+ up(&idescsi_ref_sem);
+ return scsi;
+}
+
+static void ide_scsi_put(struct ide_scsi_obj *scsi)
+{
+ down(&idescsi_ref_sem);
+ scsi_host_put(scsi->host);
+ up(&idescsi_ref_sem);
+}
+
static inline idescsi_scsi_t *scsihost_to_idescsi(struct Scsi_Host *host)
{
return (idescsi_scsi_t*) (&host[1]);
@@ -693,16 +718,18 @@
static int idescsi_cleanup (ide_drive_t *drive)
{
struct Scsi_Host *scsihost = drive->driver_data;
+ struct gendisk *g = drive->disk;
if (ide_unregister_subdriver(drive))
return 1;
-
- /* FIXME?: Are these two statements necessary? */
+
drive->driver_data = NULL;
- drive->disk->fops = ide_fops;
+ g->private_data = NULL;
+ g->fops = ide_fops;
scsi_remove_host(scsihost);
- scsi_host_put(scsihost);
+ ide_scsi_put(scsihost_to_idescsi(scsihost));
+
return 0;
}
@@ -739,15 +766,30 @@
static int idescsi_ide_open(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_scsi_obj *scsi;
+ ide_drive_t *drive;
+
+ if (!(scsi = ide_scsi_get(disk)))
+ return -ENXIO;
+
+ drive = scsi->drive;
+
drive->usage++;
+
return 0;
}
static int idescsi_ide_release(struct inode *inode, struct file *filp)
{
- ide_drive_t *drive = inode->i_bdev->bd_disk->private_data;
+ struct gendisk *disk = inode->i_bdev->bd_disk;
+ struct ide_scsi_obj *scsi = ide_scsi_g(disk);
+ ide_drive_t *drive = scsi->drive;
+
drive->usage--;
+
+ ide_scsi_put(scsi);
+
return 0;
}
@@ -755,7 +797,8 @@
unsigned int cmd, unsigned long arg)
{
struct block_device *bdev = inode->i_bdev;
- return generic_ide_ioctl(file, bdev, cmd, arg);
+ struct ide_scsi_obj *scsi = ide_scsi_g(bdev->bd_disk);
+ return generic_ide_ioctl(scsi->drive, file, bdev, cmd, arg);
}
static struct block_device_operations idescsi_ops = {
@@ -1042,6 +1085,7 @@
{
idescsi_scsi_t *idescsi;
struct Scsi_Host *host;
+ struct gendisk *g = drive->disk;
static int warned;
int err;
@@ -1070,10 +1114,12 @@
drive->driver_data = host;
idescsi = scsihost_to_idescsi(host);
idescsi->drive = drive;
+ idescsi->host = host;
err = ide_register_subdriver(drive, &idescsi_driver);
if (!err) {
idescsi_setup (drive, idescsi);
- drive->disk->fops = &idescsi_ops;
+ g->fops = &idescsi_ops;
+ g->private_data = idescsi;
err = scsi_add_host(host, &drive->gendev);
if (!err) {
scsi_scan_host(host);
diff -Nru a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
--- a/drivers/serial/mpc52xx_uart.c 2005-03-20 16:30:37 -08:00
+++ b/drivers/serial/mpc52xx_uart.c 2005-03-20 16:30:37 -08:00
@@ -86,7 +86,7 @@
* the console_init
*/
-#define PSC(port) ((struct mpc52xx_psc *)((port)->membase))
+#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
/* Forward declaration of the interruption handling routine */
@@ -190,7 +190,7 @@
static int
mpc52xx_uart_startup(struct uart_port *port)
{
- struct mpc52xx_psc *psc = PSC(port);
+ struct mpc52xx_psc __iomem *psc = PSC(port);
/* Reset/activate the port, clear and enable interrupts */
out_8(&psc->command,MPC52xx_PSC_RST_RX);
@@ -217,7 +217,7 @@
static void
mpc52xx_uart_shutdown(struct uart_port *port)
{
- struct mpc52xx_psc *psc = PSC(port);
+ struct mpc52xx_psc __iomem *psc = PSC(port);
/* Shut down the port, interrupt and all */
out_8(&psc->command,MPC52xx_PSC_RST_RX);
@@ -231,7 +231,7 @@
mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
struct termios *old)
{
- struct mpc52xx_psc *psc = PSC(port);
+ struct mpc52xx_psc __iomem *psc = PSC(port);
unsigned long flags;
unsigned char mr1, mr2;
unsigned short ctr;
@@ -562,7 +562,7 @@
mpc52xx_console_get_options(struct uart_port *port,
int *baud, int *parity, int *bits, int *flow)
{
- struct mpc52xx_psc *psc = PSC(port);
+ struct mpc52xx_psc __iomem *psc = PSC(port);
unsigned char mr1;
/* Read the mode registers */
@@ -592,7 +592,7 @@
mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
{
struct uart_port *port = &mpc52xx_uart_ports[co->index];
- struct mpc52xx_psc *psc = PSC(port);
+ struct mpc52xx_psc __iomem *psc = PSC(port);
unsigned int i, j;
/* Disable interrupts */
diff -Nru a/include/asm-alpha/unaligned.h b/include/asm-alpha/unaligned.h
--- a/include/asm-alpha/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-alpha/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -1,114 +1,6 @@
#ifndef __ALPHA_UNALIGNED_H
#define __ALPHA_UNALIGNED_H
-/*
- * The main single-value unaligned transfer routines.
- */
-#define get_unaligned(ptr) \
- ((__typeof__(*(ptr)))__get_unaligned((ptr), sizeof(*(ptr))))
-#define put_unaligned(x,ptr) \
- __put_unaligned((unsigned long)(x), (ptr), sizeof(*(ptr)))
-
-/*
- * This is a silly but good way to make sure that
- * the get/put functions are indeed always optimized,
- * and that we use the correct sizes.
- */
-extern void bad_unaligned_access_length(void) __attribute__((noreturn));
-
-/*
- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
- * packed structures to talk about such things with.
- */
-
-struct __una_u64 { __u64 x __attribute__((packed)); };
-struct __una_u32 { __u32 x __attribute__((packed)); };
-struct __una_u16 { __u16 x __attribute__((packed)); };
-
-/*
- * Elemental unaligned loads
- */
-
-extern inline unsigned long __uldq(const unsigned long * r11)
-{
- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
- return ptr->x;
-}
-
-extern inline unsigned long __uldl(const unsigned int * r11)
-{
- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
- return ptr->x;
-}
-
-extern inline unsigned long __uldw(const unsigned short * r11)
-{
- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
- return ptr->x;
-}
-
-/*
- * Elemental unaligned stores
- */
-
-extern inline void __ustq(unsigned long r5, unsigned long * r11)
-{
- struct __una_u64 *ptr = (struct __una_u64 *) r11;
- ptr->x = r5;
-}
-
-extern inline void __ustl(unsigned long r5, unsigned int * r11)
-{
- struct __una_u32 *ptr = (struct __una_u32 *) r11;
- ptr->x = r5;
-}
-
-extern inline void __ustw(unsigned long r5, unsigned short * r11)
-{
- struct __una_u16 *ptr = (struct __una_u16 *) r11;
- ptr->x = r5;
-}
-
-extern inline unsigned long __get_unaligned(const void *ptr, size_t size)
-{
- unsigned long val;
- switch (size) {
- case 1:
- val = *(const unsigned char *)ptr;
- break;
- case 2:
- val = __uldw((const unsigned short *)ptr);
- break;
- case 4:
- val = __uldl((const unsigned int *)ptr);
- break;
- case 8:
- val = __uldq((const unsigned long *)ptr);
- break;
- default:
- bad_unaligned_access_length();
- }
- return val;
-}
-
-extern inline void __put_unaligned(unsigned long val, void *ptr, size_t size)
-{
- switch (size) {
- case 1:
- *(unsigned char *)ptr = (val);
- break;
- case 2:
- __ustw(val, (unsigned short *)ptr);
- break;
- case 4:
- __ustl(val, (unsigned int *)ptr);
- break;
- case 8:
- __ustq(val, (unsigned long *)ptr);
- break;
- default:
- bad_unaligned_access_length();
- }
-}
+#include <asm-generic/unaligned.h>
#endif
diff -Nru a/include/asm-generic/unaligned.h b/include/asm-generic/unaligned.h
--- a/include/asm-generic/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-generic/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -4,17 +4,118 @@
/*
* For the benefit of those who are trying to port Linux to another
* architecture, here are some C-language equivalents.
+ *
+ * This is based almost entirely upon Richard Henderson's
+ * asm-alpha/unaligned.h implementation. Some comments were
+ * taken from David Mosberger's asm-ia64/unaligned.h header.
*/
-#include <asm/string.h>
-
+#include <linux/types.h>
+/*
+ * The main single-value unaligned transfer routines.
+ */
#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memcpy(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
+ ((__typeof__(*(ptr)))__get_unaligned((ptr), sizeof(*(ptr))))
+#define put_unaligned(x,ptr) \
+ __put_unaligned((unsigned long)(x), (ptr), sizeof(*(ptr)))
+
+/*
+ * This function doesn't actually exist. The idea is that when
+ * someone uses the macros below with an unsupported size (datatype),
+ * the linker will alert us to the problem via an unresolved reference
+ * error.
+ */
+extern void bad_unaligned_access_length(void) __attribute__((noreturn));
+
+struct __una_u64 { __u64 x __attribute__((packed)); };
+struct __una_u32 { __u32 x __attribute__((packed)); };
+struct __una_u16 { __u16 x __attribute__((packed)); };
+
+/*
+ * Elemental unaligned loads
+ */
+
+static inline unsigned long __uldq(const __u64 *addr)
+{
+ const struct __una_u64 *ptr = (const struct __una_u64 *) addr;
+ return ptr->x;
+}
+
+static inline unsigned long __uldl(const __u32 *addr)
+{
+ const struct __una_u32 *ptr = (const struct __una_u32 *) addr;
+ return ptr->x;
+}
+
+static inline unsigned long __uldw(const __u16 *addr)
+{
+ const struct __una_u16 *ptr = (const struct __una_u16 *) addr;
+ return ptr->x;
+}
+
+/*
+ * Elemental unaligned stores
+ */
+
+static inline void __ustq(__u64 val, __u64 *addr)
+{
+ struct __una_u64 *ptr = (struct __una_u64 *) addr;
+ ptr->x = val;
+}
+
+static inline void __ustl(__u32 val, __u32 *addr)
+{
+ struct __una_u32 *ptr = (struct __una_u32 *) addr;
+ ptr->x = val;
+}
+
+static inline void __ustw(__u16 val, __u16 *addr)
+{
+ struct __una_u16 *ptr = (struct __una_u16 *) addr;
+ ptr->x = val;
+}
+
+static inline unsigned long __get_unaligned(const void *ptr, size_t size)
+{
+ unsigned long val;
+ switch (size) {
+ case 1:
+ val = *(const __u8 *)ptr;
+ break;
+ case 2:
+ val = __uldw((const __u16 *)ptr);
+ break;
+ case 4:
+ val = __uldl((const __u32 *)ptr);
+ break;
+ case 8:
+ val = __uldq((const __u64 *)ptr);
+ break;
+ default:
+ bad_unaligned_access_length();
+ };
+ return val;
+}
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memcpy((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
+static inline void __put_unaligned(unsigned long val, void *ptr, size_t size)
+{
+ switch (size) {
+ case 1:
+ *(__u8 *)ptr = val;
+ break;
+ case 2:
+ __ustw(val, (__u16 *)ptr);
+ break;
+ case 4:
+ __ustl(val, (__u32 *)ptr);
+ break;
+ case 8:
+ __ustq(val, (__u64 *)ptr);
+ break;
+ default:
+ bad_unaligned_access_length();
+ };
+}
#endif /* _ASM_GENERIC_UNALIGNED_H */
diff -Nru a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
--- a/include/asm-ia64/pgtable.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ia64/pgtable.h 2005-03-20 16:30:37 -08:00
@@ -553,17 +553,27 @@
/*
* Override for pgd_addr_end() to deal with the virtual address space holes
- * in each region. Virtual address bits are used like this:
+ * in each region. In regions 0..4 virtual address bits are used like this:
* +--------+------+--------+-----+-----+--------+
* | pgdhi3 | rsvd | pgdlow | pmd | pte | offset |
* +--------+------+--------+-----+-----+--------+
- * The high bit of 'pgdlow' must be sign extended across the 'rsvd' bits.
+ * 'pgdlow' overflows to pgdhi3 (a.k.a. region bits) leaving rsvd==0
*/
-#define IA64_PGD_SIGNEXTEND (PGDIR_SIZE << (PAGE_SHIFT-7))
+#define IA64_PGD_OVERFLOW (PGDIR_SIZE << (PAGE_SHIFT-6))
+
#define pgd_addr_end(addr, end) \
({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
- if (__boundary & IA64_PGD_SIGNEXTEND) \
- __boundary |= (RGN_SIZE - 1) & ~(IA64_PGD_SIGNEXTEND-1);\
+ if (REGION_NUMBER(__boundary) < 5 && \
+ __boundary & IA64_PGD_OVERFLOW) \
+ __boundary += (RGN_SIZE - 1) & ~(IA64_PGD_OVERFLOW - 1);\
+ (__boundary - 1 < (end) - 1)? __boundary: (end); \
+})
+
+#define pmd_addr_end(addr, end) \
+({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
+ if (REGION_NUMBER(__boundary) < 5 && \
+ __boundary & IA64_PGD_OVERFLOW) \
+ __boundary += (RGN_SIZE - 1) & ~(IA64_PGD_OVERFLOW - 1);\
(__boundary - 1 < (end) - 1)? __boundary: (end); \
})
diff -Nru a/include/asm-ia64/unaligned.h b/include/asm-ia64/unaligned.h
--- a/include/asm-ia64/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ia64/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -1,121 +1,6 @@
#ifndef _ASM_IA64_UNALIGNED_H
#define _ASM_IA64_UNALIGNED_H
-#include <linux/types.h>
-
-/*
- * The main single-value unaligned transfer routines.
- *
- * Based on <asm-alpha/unaligned.h>.
- *
- * Copyright (C) 1998, 1999, 2003 Hewlett-Packard Co
- * David Mosberger-Tang <davidm@hpl.hp.com>
- */
-#define get_unaligned(ptr) \
- ((__typeof__(*(ptr)))ia64_get_unaligned((ptr), sizeof(*(ptr))))
-
-#define put_unaligned(x,ptr) \
- ia64_put_unaligned((unsigned long)(x), (ptr), sizeof(*(ptr)))
-
-struct __una_u64 { __u64 x __attribute__((packed)); };
-struct __una_u32 { __u32 x __attribute__((packed)); };
-struct __una_u16 { __u16 x __attribute__((packed)); };
-
-static inline unsigned long
-__uld8 (const unsigned long * addr)
-{
- const struct __una_u64 *ptr = (const struct __una_u64 *) addr;
- return ptr->x;
-}
-
-static inline unsigned long
-__uld4 (const unsigned int * addr)
-{
- const struct __una_u32 *ptr = (const struct __una_u32 *) addr;
- return ptr->x;
-}
-
-static inline unsigned long
-__uld2 (const unsigned short * addr)
-{
- const struct __una_u16 *ptr = (const struct __una_u16 *) addr;
- return ptr->x;
-}
-
-static inline void
-__ust8 (unsigned long val, unsigned long * addr)
-{
- struct __una_u64 *ptr = (struct __una_u64 *) addr;
- ptr->x = val;
-}
-
-static inline void
-__ust4 (unsigned long val, unsigned int * addr)
-{
- struct __una_u32 *ptr = (struct __una_u32 *) addr;
- ptr->x = val;
-}
-
-static inline void
-__ust2 (unsigned long val, unsigned short * addr)
-{
- struct __una_u16 *ptr = (struct __una_u16 *) addr;
- ptr->x = val;
-}
-
-
-/*
- * This function doesn't actually exist. The idea is that when someone uses the macros
- * below with an unsupported size (datatype), the linker will alert us to the problem via
- * an unresolved reference error.
- */
-extern unsigned long ia64_bad_unaligned_access_length (void);
-
-#define ia64_get_unaligned(_ptr,size) \
-({ \
- const void *__ia64_ptr = (_ptr); \
- unsigned long __ia64_val; \
- \
- switch (size) { \
- case 1: \
- __ia64_val = *(const unsigned char *) __ia64_ptr; \
- break; \
- case 2: \
- __ia64_val = __uld2((const unsigned short *)__ia64_ptr); \
- break; \
- case 4: \
- __ia64_val = __uld4((const unsigned int *)__ia64_ptr); \
- break; \
- case 8: \
- __ia64_val = __uld8((const unsigned long *)__ia64_ptr); \
- break; \
- default: \
- __ia64_val = ia64_bad_unaligned_access_length(); \
- } \
- __ia64_val; \
-})
-
-#define ia64_put_unaligned(_val,_ptr,size) \
-do { \
- const void *__ia64_ptr = (_ptr); \
- unsigned long __ia64_val = (_val); \
- \
- switch (size) { \
- case 1: \
- *(unsigned char *)__ia64_ptr = (__ia64_val); \
- break; \
- case 2: \
- __ust2(__ia64_val, (unsigned short *)__ia64_ptr); \
- break; \
- case 4: \
- __ust4(__ia64_val, (unsigned int *)__ia64_ptr); \
- break; \
- case 8: \
- __ust8(__ia64_val, (unsigned long *)__ia64_ptr); \
- break; \
- default: \
- ia64_bad_unaligned_access_length(); \
- } \
-} while (0)
+#include <asm-generic/unaligned.h>
#endif /* _ASM_IA64_UNALIGNED_H */
diff -Nru a/include/asm-m68knommu/io_hw_swap.h b/include/asm-m68knommu/io_hw_swap.h
--- a/include/asm-m68knommu/io_hw_swap.h 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,113 +0,0 @@
-#ifndef _M68K_IO_HW_SWAP_H
-#define _M68K_IO_HW_SWAP_H
-
-/*
- * swap functions are sometimes needed to interface little-endian hardware
- */
-static inline unsigned short _swapw(volatile unsigned short v)
-{
- return ((v << 8) | (v >> 8));
-}
-
-static inline unsigned int _swapl(volatile unsigned long v)
-{
- return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
-}
-
-/*
- * readX/writeX() are used to access memory mapped devices. On some
- * architectures the memory mapped IO stuff needs to be accessed
- * differently. On the m68k architecture, we just read/write the
- * memory location directly.
- */
-/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
- * two accesses to memory, which may be undesireable for some devices.
- */
-#define readb(addr) \
- ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
-#define readw(addr) \
- ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
-#define readl(addr) \
- ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
-
-#define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b))
-#define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b))
-#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b))
-
-/* There is no difference between I/O and memory on 68k, these are the same */
-#define inb(addr) \
- ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
-#define inw(addr) \
- ({ unsigned short __v = (*(volatile unsigned short *) (addr)); \
- _swapw(__v); })
-#define inl(addr) \
- ({ unsigned int __v = (*(volatile unsigned int *) (addr)); _swapl(__v); })
-
-#define outb(b,addr) ((*(volatile unsigned char *) (addr)) = (b))
-#define outw(b,addr) ((*(volatile unsigned short *) (addr)) = (_swapw(b)))
-#define outl(b,addr) ((*(volatile unsigned int *) (addr)) = (_swapl(b)))
-
-/* FIXME: these need to be optimized. Watch out for byte swapping, they
- * are used mostly for Intel devices... */
-#define outsw(addr,buf,len) \
- ({ unsigned short * __p = (unsigned short *)(buf); \
- unsigned short * __e = (unsigned short *)(__p) + (len); \
- while (__p < __e) { \
- *(volatile unsigned short *)(addr) = *__p++;\
- } \
- })
-
-#define insw(addr,buf,len) \
- ({ unsigned short * __p = (unsigned short *)(buf); \
- unsigned short * __e = (unsigned short *)(__p) + (len); \
- while (__p < __e) { \
- *(__p++) = *(volatile unsigned short *)(addr); \
- } \
- })
-
-
-static inline unsigned char get_user_byte_io(const char * addr)
-{
- register unsigned char _v;
-
- __asm__ __volatile__ ("moveb %1,%0":"=dm" (_v):"m" (*addr));
- return _v;
-}
-#define inb_p(addr) get_user_byte_io((char *)(addr))
-
-static inline void put_user_byte_io(char val,char *addr)
-{
- __asm__ __volatile__ ("moveb %0,%1"
- : /* no outputs */
- :"idm" (val),"m" (*addr)
- : "memory");
-}
-#define outb_p(x,addr) put_user_byte_io((x),(char *)(addr))
-
-/*
- * Change virtual addresses to physical addresses and vv.
- * These are trivial on the 1:1 Linux/i386 mapping (but if we ever
- * make the kernel segment mapped at 0, we need to do translation
- * on the i386 as well)
- */
-extern unsigned long mm_vtop(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr);
-
-extern inline unsigned long virt_to_phys(volatile void * address)
-{
- return (unsigned long) mm_vtop((unsigned long)address);
-}
-
-extern inline void * phys_to_virt(unsigned long address)
-{
- return (void *) mm_ptov(address);
-}
-
-/*
- * IO bus memory addresses are also 1:1 with the physical address
- */
-#define virt_to_bus virt_to_phys
-#define bus_to_virt phys_to_virt
-
-
-#endif /* _M68K_IO_HW_SWAP_H */
diff -Nru a/include/asm-m68knommu/mmu.h b/include/asm-m68knommu/mmu.h
--- a/include/asm-m68knommu/mmu.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-m68knommu/mmu.h 2005-03-20 16:30:37 -08:00
@@ -3,19 +3,8 @@
/* Copyright (C) 2002, David McCullough <davidm@snapgear.com> */
-struct mm_rblock_struct {
- int size;
- int refcount;
- void *kblock;
-};
-
-struct mm_tblock_struct {
- struct mm_rblock_struct *rblock;
- struct mm_tblock_struct *next;
-};
-
typedef struct {
- struct mm_tblock_struct tblock;
+ struct vm_list_struct *vmlist;
unsigned long end_brk;
} mm_context_t;
diff -Nru a/include/asm-m68knommu/semp3.h b/include/asm-m68knommu/semp3.h
--- a/include/asm-m68knommu/semp3.h 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,60 +0,0 @@
-/****************************************************************************/
-
-/*
- * semp.h -- SecureEdge MP3 hardware platform support.
- *
- * (C) Copyright 2001-2002, Greg Ungerer (gerg@snapgear.com).
- */
-
-/****************************************************************************/
-#ifndef semp3_h
-#define semp3_h
-/****************************************************************************/
-
-#include <linux/config.h>
-
-/****************************************************************************/
-#ifdef CONFIG_SECUREEDGEMP3
-/****************************************************************************/
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*
- * The ColdFire UARTs do not have any support for DTR/DCD lines.
- * We have wired them onto some of the parallel IO lines.
- */
-#define MCFPP_DCD1 0x0004
-#define MCFPP_DCD0 0x0000 /* No DCD line on port 0 */
-#define MCFPP_DTR1 0x0080
-#define MCFPP_DTR0 0x0000 /* No DTR line on port 0 */
-
-
-#ifndef __ASSEMBLY__
-
-extern volatile unsigned short ppdata;
-
-/*
- * These functions defined to give quasi generic access to the
- * PPIO bits used for DTR/DCD.
- */
-static __inline__ unsigned int mcf_getppdata(void)
-{
- volatile unsigned short *pp;
- pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
- return((unsigned int) *pp);
-}
-
-static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
-{
- volatile unsigned short *pp;
- pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
- ppdata = (ppdata & ~mask) | bits;
- *pp = ppdata;
-}
-#endif
-
-/****************************************************************************/
-#endif /* CONFIG_SECUREEDGEMP3 */
-/****************************************************************************/
-#endif /* semp3_h */
diff -Nru a/include/asm-m68knommu/unaligned.h b/include/asm-m68knommu/unaligned.h
--- a/include/asm-m68knommu/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-m68knommu/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -5,15 +5,7 @@
#ifdef CONFIG_COLDFIRE
-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-
-#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memmove((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
+#include <asm-generic/unaligned.h>
#else
/*
diff -Nru a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
--- a/include/asm-mips/uaccess.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-mips/uaccess.h 2005-03-20 16:30:37 -08:00
@@ -258,7 +258,8 @@
\
might_sleep(); \
__gu_addr = (long) (ptr); \
- __gu_err = verify_area(VERIFY_READ, (void *) __gu_addr, size); \
+ __gu_err = access_ok(VERIFY_READ, (void *) __gu_addr, size) \
+ ? 0 : -EFAULT; \
\
if (likely(!__gu_err)) { \
switch (size) { \
@@ -353,7 +354,8 @@
might_sleep(); \
__pu_val = (x); \
__pu_addr = (long) (ptr); \
- __pu_err = verify_area(VERIFY_WRITE, (void *) __pu_addr, size); \
+ __pu_err = access_ok(VERIFY_WRITE, (void *) __pu_addr, size) \
+ ? 0 : -EFAULT; \
\
if (likely(!__pu_err)) { \
switch (size) { \
diff -Nru a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h
--- a/include/asm-mips/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-mips/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -9,136 +9,6 @@
#ifndef _ASM_UNALIGNED_H
#define _ASM_UNALIGNED_H
-#include <linux/types.h>
-
-/*
- * get_unaligned - get value from possibly mis-aligned location
- * @ptr: pointer to value
- *
- * This macro should be used for accessing values larger in size than
- * single bytes at locations that are expected to be improperly aligned,
- * e.g. retrieving a u16 value from a location not u16-aligned.
- *
- * Note that unaligned accesses can be very expensive on some architectures.
- */
-#define get_unaligned(ptr) \
- ((__typeof__(*(ptr)))__get_unaligned((ptr), sizeof(*(ptr))))
-
-/*
- * put_unaligned - put value to a possibly mis-aligned location
- * @val: value to place
- * @ptr: pointer to location
- *
- * This macro should be used for placing values larger in size than
- * single bytes at locations that are expected to be improperly aligned,
- * e.g. writing a u16 value to a location not u16-aligned.
- *
- * Note that unaligned accesses can be very expensive on some architectures.
- */
-#define put_unaligned(x,ptr) \
- __put_unaligned((__u64)(x), (ptr), sizeof(*(ptr)))
-
-/*
- * This is a silly but good way to make sure that
- * the get/put functions are indeed always optimized,
- * and that we use the correct sizes.
- */
-extern void bad_unaligned_access_length(void);
-
-/*
- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
- * packed structures to talk about such things with.
- */
-
-struct __una_u64 { __u64 x __attribute__((packed)); };
-struct __una_u32 { __u32 x __attribute__((packed)); };
-struct __una_u16 { __u16 x __attribute__((packed)); };
-
-/*
- * Elemental unaligned loads
- */
-
-static inline __u64 __uldq(const __u64 * r11)
-{
- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
- return ptr->x;
-}
-
-static inline __u32 __uldl(const __u32 * r11)
-{
- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
- return ptr->x;
-}
-
-static inline __u16 __uldw(const __u16 * r11)
-{
- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
- return ptr->x;
-}
-
-/*
- * Elemental unaligned stores
- */
-
-static inline void __ustq(__u64 r5, __u64 * r11)
-{
- struct __una_u64 *ptr = (struct __una_u64 *) r11;
- ptr->x = r5;
-}
-
-static inline void __ustl(__u32 r5, __u32 * r11)
-{
- struct __una_u32 *ptr = (struct __una_u32 *) r11;
- ptr->x = r5;
-}
-
-static inline void __ustw(__u16 r5, __u16 * r11)
-{
- struct __una_u16 *ptr = (struct __una_u16 *) r11;
- ptr->x = r5;
-}
-
-static inline __u64 __get_unaligned(const void *ptr, size_t size)
-{
- __u64 val;
-
- switch (size) {
- case 1:
- val = *(const __u8 *)ptr;
- break;
- case 2:
- val = __uldw((const __u16 *)ptr);
- break;
- case 4:
- val = __uldl((const __u32 *)ptr);
- break;
- case 8:
- val = __uldq((const __u64 *)ptr);
- break;
- default:
- bad_unaligned_access_length();
- }
- return val;
-}
-
-static inline void __put_unaligned(__u64 val, void *ptr, size_t size)
-{
- switch (size) {
- case 1:
- *(__u8 *)ptr = (val);
- break;
- case 2:
- __ustw(val, (__u16 *)ptr);
- break;
- case 4:
- __ustl(val, (__u32 *)ptr);
- break;
- case 8:
- __ustq(val, (__u64 *)ptr);
- break;
- default:
- bad_unaligned_access_length();
- }
-}
+#include <asm-generic/unaligned.h>
#endif /* _ASM_UNALIGNED_H */
diff -Nru a/include/asm-parisc/unaligned.h b/include/asm-parisc/unaligned.h
--- a/include/asm-parisc/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-parisc/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -1,22 +1,7 @@
#ifndef _ASM_PARISC_UNALIGNED_H_
#define _ASM_PARISC_UNALIGNED_H_
-/* parisc can't handle unaligned accesses. */
-/* copied from asm-sparc/unaligned.h */
-
-#include <linux/string.h>
-
-
-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-
-#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memmove((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
-
+#include <asm-parisc/unaligned.h>
#ifdef __KERNEL__
struct pt_regs;
diff -Nru a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
--- a/include/asm-ppc/cpm2.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc/cpm2.h 2005-03-20 16:30:37 -08:00
@@ -69,6 +69,7 @@
#define CPM_CR_INIT_TX ((ushort)0x0002)
#define CPM_CR_HUNT_MODE ((ushort)0x0003)
#define CPM_CR_STOP_TX ((ushort)0x0004)
+#define CPM_CR_GRA_STOP_TX ((ushort)0x0005)
#define CPM_CR_RESTART_TX ((ushort)0x0006)
#define CPM_CR_SET_GADDR ((ushort)0x0008)
#define CPM_CR_START_IDMA ((ushort)0x0009)
diff -Nru a/include/asm-ppc/dma.h b/include/asm-ppc/dma.h
--- a/include/asm-ppc/dma.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc/dma.h 2005-03-20 16:30:37 -08:00
@@ -25,7 +25,6 @@
* with a grain of salt.
*/
-
#ifndef _ASM_DMA_H
#define _ASM_DMA_H
@@ -192,9 +191,9 @@
/* enable/disable a specific DMA channel */
static __inline__ void enable_dma(unsigned int dmanr)
{
- unsigned char ucDmaCmd=0x00;
+ unsigned char ucDmaCmd = 0x00;
- if (dmanr != 4) {
+ if (dmanr != 4) {
dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */
dma_outb(ucDmaCmd, DMA2_CMD_REG); /* Enable group */
}
@@ -244,60 +243,58 @@
*/
static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
{
- switch(dmanr) {
- case 0:
- dma_outb(pagenr, DMA_LO_PAGE_0);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_0);
- break;
- case 1:
- dma_outb(pagenr, DMA_LO_PAGE_1);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_1);
- break;
- case 2:
- dma_outb(pagenr, DMA_LO_PAGE_2);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_2);
- break;
- case 3:
- dma_outb(pagenr, DMA_LO_PAGE_3);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_3);
- break;
- case 5:
- if (SND_DMA1 == 5 || SND_DMA2 == 5)
- dma_outb(pagenr, DMA_LO_PAGE_5);
- else
- dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_5);
- break;
- case 6:
- if (SND_DMA1 == 6 || SND_DMA2 == 6)
- dma_outb(pagenr, DMA_LO_PAGE_6);
- else
- dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_6);
- break;
- case 7:
- if (SND_DMA1 == 7 || SND_DMA2 == 7)
- dma_outb(pagenr, DMA_LO_PAGE_7);
- else
- dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);
- dma_outb(pagenr >> 8, DMA_HI_PAGE_7);
- break;
+ switch (dmanr) {
+ case 0:
+ dma_outb(pagenr, DMA_LO_PAGE_0);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_0);
+ break;
+ case 1:
+ dma_outb(pagenr, DMA_LO_PAGE_1);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_1);
+ break;
+ case 2:
+ dma_outb(pagenr, DMA_LO_PAGE_2);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_2);
+ break;
+ case 3:
+ dma_outb(pagenr, DMA_LO_PAGE_3);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_3);
+ break;
+ case 5:
+ if (SND_DMA1 == 5 || SND_DMA2 == 5)
+ dma_outb(pagenr, DMA_LO_PAGE_5);
+ else
+ dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_5);
+ break;
+ case 6:
+ if (SND_DMA1 == 6 || SND_DMA2 == 6)
+ dma_outb(pagenr, DMA_LO_PAGE_6);
+ else
+ dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_6);
+ break;
+ case 7:
+ if (SND_DMA1 == 7 || SND_DMA2 == 7)
+ dma_outb(pagenr, DMA_LO_PAGE_7);
+ else
+ dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);
+ dma_outb(pagenr >> 8, DMA_HI_PAGE_7);
+ break;
}
}
-
/* Set transfer address & page bits for specific DMA channel.
* Assumes dma flipflop is clear.
*/
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
{
if (dmanr <= 3) {
- dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE );
+ dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
} else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
- dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE );
- dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) +
- IO_DMA2_BASE);
+ dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
+ dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((dmanr & 3), DMA2_EXT_REG);
} else {
dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
@@ -306,7 +303,6 @@
set_dma_page(dmanr, phys >> 16);
}
-
/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
* a specific DMA channel.
* You must ensure the parameters are valid.
@@ -321,16 +317,16 @@
if (dmanr <= 3) {
dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 +
- IO_DMA1_BASE);
+ IO_DMA1_BASE);
} else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
- dma_outb( count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
- dma_outb( (count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 +
- IO_DMA2_BASE);
+ dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
+ dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 +
+ IO_DMA2_BASE);
} else {
dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 +
- IO_DMA2_BASE);
+ IO_DMA2_BASE);
dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 +
- IO_DMA2_BASE);
+ IO_DMA2_BASE);
}
}
@@ -345,8 +341,8 @@
static __inline__ int get_dma_residue(unsigned int dmanr)
{
unsigned int io_port = (dmanr <= 3) ?
- ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
- : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
+ ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
+ : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
/* using short to get 16-bit wrap around */
unsigned short count;
@@ -355,14 +351,14 @@
count += dma_inb(io_port) << 8;
return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
- ? count : (count<<1);
+ ? count : (count << 1);
}
/* These are in kernel/dma.c: */
/* reserve a DMA channel */
-extern int request_dma(unsigned int dmanr, const char * device_id);
+extern int request_dma(unsigned int dmanr, const char *device_id);
/* release it again */
extern void free_dma(unsigned int dmanr);
@@ -371,5 +367,5 @@
#else
#define isa_dma_bridge_buggy (0)
#endif
-#endif /* _ASM_DMA_H */
-#endif /* __KERNEL__ */
+#endif /* _ASM_DMA_H */
+#endif /* __KERNEL__ */
diff -Nru a/include/asm-ppc/floppy.h b/include/asm-ppc/floppy.h
--- a/include/asm-ppc/floppy.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc/floppy.h 2005-03-20 16:30:37 -08:00
@@ -11,28 +11,149 @@
#ifndef __ASM_PPC_FLOPPY_H
#define __ASM_PPC_FLOPPY_H
-#define fd_inb(port) inb_p(port)
-#define fd_outb(value,port) outb_p(value,port)
+#define fd_inb(port) inb_p(port)
+#define fd_outb(value,port) outb_p(value,port)
-#define fd_enable_dma() enable_dma(FLOPPY_DMA)
-#define fd_disable_dma() disable_dma(FLOPPY_DMA)
-#define fd_request_dma() request_dma(FLOPPY_DMA,"floppy")
-#define fd_free_dma() free_dma(FLOPPY_DMA)
-#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA)
-#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA,mode)
-#define fd_set_dma_addr(addr) set_dma_addr(FLOPPY_DMA,(unsigned int)virt_to_bus(addr))
-#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA,count)
+#define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA)
+#define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA)
+#define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA)
+#define fd_dma_setup(addr, size, mode, io) fd_ops->_dma_setup(addr, size, mode, io)
#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
-#define fd_cacheflush(addr,size) /* nothing */
-#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT|SA_SAMPLE_RANDOM, \
- "floppy", NULL)
#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
-__inline__ void virtual_dma_init(void)
+static int fd_request_dma(void);
+
+struct fd_dma_ops {
+ void (*_disable_dma)(unsigned int dmanr);
+ void (*_free_dma)(unsigned int dmanr);
+ int (*_get_dma_residue)(unsigned int dummy);
+ int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
+};
+
+static int virtual_dma_count;
+static int virtual_dma_residue;
+static char *virtual_dma_addr;
+static int virtual_dma_mode;
+static int doing_vdma;
+static struct fd_dma_ops *fd_ops;
+
+static irqreturn_t floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
+{
+ unsigned char st;
+ int lcount;
+ char *lptr;
+
+ if (!doing_vdma)
+ return floppy_interrupt(irq, dev_id, regs);
+
+
+ st = 1;
+ for (lcount=virtual_dma_count, lptr=virtual_dma_addr;
+ lcount; lcount--, lptr++) {
+ st=inb(virtual_dma_port+4) & 0xa0 ;
+ if (st != 0xa0)
+ break;
+ if (virtual_dma_mode)
+ outb_p(*lptr, virtual_dma_port+5);
+ else
+ *lptr = inb_p(virtual_dma_port+5);
+ }
+ virtual_dma_count = lcount;
+ virtual_dma_addr = lptr;
+ st = inb(virtual_dma_port+4);
+
+ if (st == 0x20)
+ return IRQ_HANDLED;
+ if (!(st & 0x20)) {
+ virtual_dma_residue += virtual_dma_count;
+ virtual_dma_count=0;
+ doing_vdma = 0;
+ floppy_interrupt(irq, dev_id, regs);
+ return IRQ_HANDLED;
+ }
+ return IRQ_HANDLED;
+}
+
+static void vdma_disable_dma(unsigned int dummy)
+{
+ doing_vdma = 0;
+ virtual_dma_residue += virtual_dma_count;
+ virtual_dma_count=0;
+}
+
+static void vdma_nop(unsigned int dummy)
+{
+}
+
+
+static int vdma_get_dma_residue(unsigned int dummy)
+{
+ return virtual_dma_count + virtual_dma_residue;
+}
+
+
+static int fd_request_irq(void)
+{
+ if (can_use_virtual_dma)
+ return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT,
+ "floppy", NULL);
+ else
+ return request_irq(FLOPPY_IRQ, floppy_interrupt,
+ SA_INTERRUPT|SA_SAMPLE_RANDOM,
+ "floppy", NULL);
+
+}
+
+static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
+{
+ doing_vdma = 1;
+ virtual_dma_port = io;
+ virtual_dma_mode = (mode == DMA_MODE_WRITE);
+ virtual_dma_addr = addr;
+ virtual_dma_count = size;
+ virtual_dma_residue = 0;
+ return 0;
+}
+
+static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
+{
+ /* actual, physical DMA */
+ doing_vdma = 0;
+ clear_dma_ff(FLOPPY_DMA);
+ set_dma_mode(FLOPPY_DMA,mode);
+ set_dma_addr(FLOPPY_DMA,(unsigned int)virt_to_bus(addr));
+ set_dma_count(FLOPPY_DMA,size);
+ enable_dma(FLOPPY_DMA);
+ return 0;
+}
+
+static struct fd_dma_ops real_dma_ops =
+{
+ ._disable_dma = disable_dma,
+ ._free_dma = free_dma,
+ ._get_dma_residue = get_dma_residue,
+ ._dma_setup = hard_dma_setup
+};
+
+static struct fd_dma_ops virt_dma_ops =
+{
+ ._disable_dma = vdma_disable_dma,
+ ._free_dma = vdma_nop,
+ ._get_dma_residue = vdma_get_dma_residue,
+ ._dma_setup = vdma_dma_setup
+};
+
+static int fd_request_dma()
{
- /* Nothing to do on PowerPC */
+ if (can_use_virtual_dma & 1) {
+ fd_ops = &virt_dma_ops;
+ return 0;
+ }
+ else {
+ fd_ops = &real_dma_ops;
+ return request_dma(FLOPPY_DMA, "floppy");
+ }
}
static int FDC1 = 0x3f0;
diff -Nru a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
--- a/include/asm-ppc/mpc52xx.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc/mpc52xx.h 2005-03-20 16:30:37 -08:00
@@ -393,6 +393,8 @@
extern void mpc52xx_calibrate_decr(void);
extern void mpc52xx_add_board_devices(struct ocp_def board_ocp[]);
+extern void mpc52xx_find_bridges(void);
+
#endif /* __ASSEMBLY__ */
diff -Nru a/include/asm-ppc/serial.h b/include/asm-ppc/serial.h
--- a/include/asm-ppc/serial.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc/serial.h 2005-03-20 16:30:37 -08:00
@@ -22,6 +22,8 @@
#include <platforms/mcpn765.h>
#elif defined(CONFIG_MVME5100)
#include <platforms/mvme5100.h>
+#elif defined(CONFIG_PAL4)
+#include <platforms/pal4_serial.h>
#elif defined(CONFIG_PRPMC750)
#include <platforms/prpmc750.h>
#elif defined(CONFIG_PRPMC800)
diff -Nru a/include/asm-ppc64/iSeries/iSeries_fixup.h b/include/asm-ppc64/iSeries/iSeries_fixup.h
--- a/include/asm-ppc64/iSeries/iSeries_fixup.h 2005-03-20 16:30:37 -08:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,25 +0,0 @@
-
-#ifndef __ISERIES_FIXUP_H__
-#define __ISERIES_FIXUP_H__
-#include <linux/pci.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void iSeries_fixup (void);
-void iSeries_fixup_bus (struct pci_bus*);
-unsigned int iSeries_scan_slot (struct pci_dev*, u16, u8, u8);
-
-
-/* Need to store information related to the PHB bucc and make it accessible to the hose */
-struct iSeries_hose_arch_data {
- u32 hvBusNumber;
-};
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __ISERIES_FIXUP_H__ */
diff -Nru a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
--- a/include/asm-ppc64/machdep.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc64/machdep.h 2005-03-20 16:30:37 -08:00
@@ -33,6 +33,7 @@
int (*cpu_enable)(unsigned int nr);
int (*cpu_disable)(void);
void (*cpu_die)(unsigned int nr);
+ int (*cpu_bootable)(unsigned int nr);
};
#endif
diff -Nru a/include/asm-ppc64/uaccess.h b/include/asm-ppc64/uaccess.h
--- a/include/asm-ppc64/uaccess.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-ppc64/uaccess.h 2005-03-20 16:30:37 -08:00
@@ -120,6 +120,7 @@
#define __put_user_nocheck(x,ptr,size) \
({ \
long __pu_err; \
+ might_sleep(); \
__chk_user_ptr(ptr); \
__put_user_size((x),(ptr),(size),__pu_err,-EFAULT); \
__pu_err; \
@@ -129,6 +130,7 @@
({ \
long __pu_err = -EFAULT; \
void __user *__pu_addr = (ptr); \
+ might_sleep(); \
if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
__put_user_size((x),__pu_addr,(size),__pu_err,-EFAULT); \
__pu_err; \
@@ -136,7 +138,6 @@
#define __put_user_size(x,ptr,size,retval,errret) \
do { \
- might_sleep(); \
retval = 0; \
switch (size) { \
case 1: __put_user_asm(x,ptr,retval,"stb",errret); break; \
@@ -171,6 +172,7 @@
#define __get_user_nocheck(x,ptr,size) \
({ \
long __gu_err, __gu_val; \
+ might_sleep(); \
__get_user_size(__gu_val,(ptr),(size),__gu_err,-EFAULT);\
(x) = (__typeof__(*(ptr)))__gu_val; \
__gu_err; \
@@ -180,6 +182,7 @@
({ \
long __gu_err = -EFAULT, __gu_val = 0; \
const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
+ might_sleep(); \
if (access_ok(VERIFY_READ,__gu_addr,size)) \
__get_user_size(__gu_val,__gu_addr,(size),__gu_err,-EFAULT);\
(x) = (__typeof__(*(ptr)))__gu_val; \
@@ -190,7 +193,6 @@
#define __get_user_size(x,ptr,size,retval,errret) \
do { \
- might_sleep(); \
retval = 0; \
__chk_user_ptr(ptr); \
switch (size) { \
@@ -224,9 +226,8 @@
unsigned long size);
static inline unsigned long
-__copy_from_user(void *to, const void __user *from, unsigned long n)
+__copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)
{
- might_sleep();
if (__builtin_constant_p(n)) {
unsigned long ret;
@@ -249,9 +250,15 @@
}
static inline unsigned long
-__copy_to_user(void __user *to, const void *from, unsigned long n)
+__copy_from_user(void *to, const void __user *from, unsigned long n)
{
might_sleep();
+ return __copy_from_user_inatomic(to, from, n);
+}
+
+static inline unsigned long
+__copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)
+{
if (__builtin_constant_p(n)) {
unsigned long ret;
@@ -273,6 +280,13 @@
return __copy_tofrom_user(to, (__force const void __user *) from, n);
}
+static inline unsigned long
+__copy_to_user(void __user *to, const void *from, unsigned long n)
+{
+ might_sleep();
+ return __copy_to_user_inatomic(to, from, n);
+}
+
#define __copy_in_user(to, from, size) \
__copy_tofrom_user((to), (from), (size))
@@ -284,9 +298,6 @@
unsigned long n);
extern unsigned long __clear_user(void __user *addr, unsigned long size);
-
-#define __copy_to_user_inatomic __copy_to_user
-#define __copy_from_user_inatomic __copy_from_user
static inline unsigned long
clear_user(void __user *addr, unsigned long size)
diff -Nru a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h
--- a/include/asm-s390/atomic.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-s390/atomic.h 2005-03-20 16:30:37 -08:00
@@ -61,6 +61,10 @@
{
__CS_LOOP(v, i, "sr");
}
+static __inline__ int atomic_sub_return(int i, atomic_t * v)
+{
+ return __CS_LOOP(v, i, "sr");
+}
static __inline__ void atomic_inc(volatile atomic_t * v)
{
__CS_LOOP(v, 1, "ar");
diff -Nru a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h
--- a/include/asm-s390/unistd.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-s390/unistd.h 2005-03-20 16:30:37 -08:00
@@ -259,7 +259,7 @@
#define __NR_fadvise64_64 264
#define __NR_statfs64 265
#define __NR_fstatfs64 266
-/* Number 267 is reserved for new sys_remap_file_pages */
+#define __NR_remap_file_pages 267
/* Number 268 is reserved for new sys_mbind */
/* Number 269 is reserved for new sys_get_mempolicy */
/* Number 270 is reserved for new sys_set_mempolicy */
@@ -273,8 +273,9 @@
#define __NR_add_key 278
#define __NR_request_key 279
#define __NR_keyctl 280
+#define __NR_waitid 281
-#define NR_syscalls 281
+#define NR_syscalls 282
/*
* There are some system calls that are not present on 64 bit, some
@@ -333,7 +334,6 @@
#undef __NR_setgid32
#undef __NR_setfsuid32
#undef __NR_setfsgid32
-#undef __NR_getdents64
#undef __NR_fcntl64
#undef __NR_sendfile64
#undef __NR_fadvise64_64
diff -Nru a/include/asm-sh/unaligned.h b/include/asm-sh/unaligned.h
--- a/include/asm-sh/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-sh/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -2,18 +2,6 @@
#define __ASM_SH_UNALIGNED_H
/* SH can't handle unaligned accesses. */
-
-#include <linux/string.h>
-
-
-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-
-#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memmove((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
+#include <asm-generic/unaligned.h>
#endif /* __ASM_SH_UNALIGNED_H */
diff -Nru a/include/asm-sh64/unaligned.h b/include/asm-sh64/unaligned.h
--- a/include/asm-sh64/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-sh64/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -12,17 +12,6 @@
*
*/
-#include <linux/string.h>
-
-
-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-
-#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memmove((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
+#include <asm-generic/unaligned.h>
#endif /* __ASM_SH64_UNALIGNED_H */
diff -Nru a/include/asm-sparc/unaligned.h b/include/asm-sparc/unaligned.h
--- a/include/asm-sparc/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-sparc/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -1,19 +1,6 @@
#ifndef _ASM_SPARC_UNALIGNED_H_
#define _ASM_SPARC_UNALIGNED_H_
-/* Sparc can't handle unaligned accesses. */
-
-#include <linux/string.h>
-
-
-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-
-#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memmove((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
+#include <asm-generic/unaligned.h>
#endif /* _ASM_SPARC_UNALIGNED_H */
diff -Nru a/include/asm-sparc64/unaligned.h b/include/asm-sparc64/unaligned.h
--- a/include/asm-sparc64/unaligned.h 2005-03-20 16:30:37 -08:00
+++ b/include/asm-sparc64/unaligned.h 2005-03-20 16:30:37 -08:00
@@ -1,19 +1,6 @@
#ifndef _ASM_SPARC64_UNALIGNED_H_
#define _ASM_SPARC64_UNALIGNED_H_
-/* Sparc can't handle unaligned accesses. */
-
-#include <linux/string.h>
-
-
-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-
-#define get_unaligned(ptr) \
- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-
-#define put_unaligned(val, ptr) \
- ({ __typeof__(*(ptr)) __tmp = (val); \
- memmove((ptr), &__tmp, sizeof(*(ptr))); \
- (void)0; })
+#include <asm-generic/unaligned.h>
#endif /* _ASM_SPARC64_UNALIGNED_H */
diff -Nru a/include/linux/hdpu_features.h b/include/linux/hdpu_features.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/include/linux/hdpu_features.h 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,26 @@
+#include <linux/spinlock.h>
+
+struct cpustate_t {
+ spinlock_t lock;
+ int excl;
+ int open_count;
+ unsigned char cached_val;
+ int inited;
+ unsigned long *set_addr;
+ unsigned long *clr_addr;
+};
+
+
+#define HDPU_CPUSTATE_NAME "hdpu cpustate"
+#define HDPU_NEXUS_NAME "hdpu nexus"
+
+#define CPUSTATE_KERNEL_MAJOR 0x10
+
+#define CPUSTATE_KERNEL_INIT_DRV 0 /* CPU State Driver Initialized */
+#define CPUSTATE_KERNEL_INIT_PCI 1 /* 64360 PCI Busses Init */
+#define CPUSTATE_KERNEL_INIT_REG 2 /* 64360 Bridge Init */
+#define CPUSTATE_KERNEL_CPU1_KICK 3 /* Boot cpu 1 */
+#define CPUSTATE_KERNEL_CPU1_OK 4 /* Cpu 1 has checked in */
+#define CPUSTATE_KERNEL_OK 5 /* Terminal state */
+#define CPUSTATE_KERNEL_RESET 14 /* Board reset via SW*/
+#define CPUSTATE_KERNEL_HALT 15 /* Board halted via SW*/
diff -Nru a/include/linux/ide.h b/include/linux/ide.h
--- a/include/linux/ide.h 2005-03-20 16:30:37 -08:00
+++ b/include/linux/ide.h 2005-03-20 16:30:37 -08:00
@@ -1109,7 +1109,7 @@
#define DRIVER(drive) ((drive)->driver)
-extern int generic_ide_ioctl(struct file *, struct block_device *, unsigned, unsigned long);
+int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
/*
* ide_hwifs[] is the master data structure used to keep track
diff -Nru a/include/linux/ip_mp_alg.h b/include/linux/ip_mp_alg.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/include/linux/ip_mp_alg.h 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,22 @@
+/* ip_mp_alg.h: IPV4 multipath algorithm support, user-visible values.
+ *
+ * Copyright (C) 2004, 2005 Einar Lueck <elueck@de.ibm.com>
+ * Copyright (C) 2005 David S. Miller <davem@davemloft.net>
+ */
+
+#ifndef _LINUX_IP_MP_ALG_H
+#define _LINUX_IP_MP_ALG_H
+
+enum ip_mp_alg {
+ IP_MP_ALG_NONE,
+ IP_MP_ALG_RR,
+ IP_MP_ALG_DRR,
+ IP_MP_ALG_RANDOM,
+ IP_MP_ALG_WRANDOM,
+ __IP_MP_ALG_MAX
+};
+
+#define IP_MP_ALG_MAX (__IP_MP_ALG_MAX - 1)
+
+#endif /* _LINUX_IP_MP_ALG_H */
+
diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h
--- a/include/linux/pci_ids.h 2005-03-20 16:30:37 -08:00
+++ b/include/linux/pci_ids.h 2005-03-20 16:30:37 -08:00
@@ -809,6 +809,7 @@
#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806
#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b
+#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803
#define PCI_VENDOR_ID_PROMISE 0x105a
#define PCI_DEVICE_ID_PROMISE_20265 0x0d30
@@ -2384,7 +2385,6 @@
#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b1
#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0
#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1
-#define PCI_DEVICE_ID_INTEL_ICH7_4 0x27c2
#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4
#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5
#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8
diff -Nru a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
--- a/include/linux/rtnetlink.h 2005-03-20 16:30:37 -08:00
+++ b/include/linux/rtnetlink.h 2005-03-20 16:30:37 -08:00
@@ -250,6 +250,7 @@
RTA_FLOW,
RTA_CACHEINFO,
RTA_SESSION,
+ RTA_MP_ALGO,
__RTA_MAX
};
diff -Nru a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
--- a/include/net/bluetooth/bluetooth.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/bluetooth/bluetooth.h 2005-03-20 16:30:37 -08:00
@@ -125,7 +125,6 @@
int bt_sock_register(int proto, struct net_proto_family *ops);
int bt_sock_unregister(int proto);
-struct sock *bt_sock_alloc(struct socket *sock, int proto, int pi_size, int prio);
void bt_sock_link(struct bt_sock_list *l, struct sock *s);
void bt_sock_unlink(struct bt_sock_list *l, struct sock *s);
int bt_sock_recvmsg(struct kiocb *iocb, struct socket *sock, struct msghdr *msg, size_t len, int flags);
diff -Nru a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
--- a/include/net/bluetooth/hci_core.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/bluetooth/hci_core.h 2005-03-20 16:30:37 -08:00
@@ -595,8 +595,10 @@
void hci_send_to_sock(struct hci_dev *hdev, struct sk_buff *skb);
/* HCI info for socket */
-#define hci_pi(sk) ((struct hci_pinfo *)sk->sk_protinfo)
+#define hci_pi(sk) ((struct hci_pinfo *) sk)
+
struct hci_pinfo {
+ struct bt_sock bt;
struct hci_dev *hdev;
struct hci_filter filter;
__u32 cmsg_mask;
diff -Nru a/include/net/bluetooth/l2cap.h b/include/net/bluetooth/l2cap.h
--- a/include/net/bluetooth/l2cap.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/bluetooth/l2cap.h 2005-03-20 16:30:37 -08:00
@@ -201,9 +201,10 @@
};
/* ----- L2CAP channel and socket info ----- */
-#define l2cap_pi(sk) ((struct l2cap_pinfo *)sk->sk_protinfo)
+#define l2cap_pi(sk) ((struct l2cap_pinfo *) sk)
struct l2cap_pinfo {
+ struct bt_sock bt;
__u16 psm;
__u16 dcid;
__u16 scid;
diff -Nru a/include/net/bluetooth/rfcomm.h b/include/net/bluetooth/rfcomm.h
--- a/include/net/bluetooth/rfcomm.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/bluetooth/rfcomm.h 2005-03-20 16:30:37 -08:00
@@ -293,9 +293,10 @@
#define RFCOMM_LM_RELIABLE 0x0010
#define RFCOMM_LM_SECURE 0x0020
-#define rfcomm_pi(sk) ((struct rfcomm_pinfo *)sk->sk_protinfo)
+#define rfcomm_pi(sk) ((struct rfcomm_pinfo *) sk)
struct rfcomm_pinfo {
+ struct bt_sock bt;
struct rfcomm_dlc *dlc;
u8 channel;
u32 link_mode;
diff -Nru a/include/net/bluetooth/sco.h b/include/net/bluetooth/sco.h
--- a/include/net/bluetooth/sco.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/bluetooth/sco.h 2005-03-20 16:30:37 -08:00
@@ -68,9 +68,10 @@
#define sco_conn_unlock(c) spin_unlock(&c->lock);
/* ----- SCO socket info ----- */
-#define sco_pi(sk) ((struct sco_pinfo *)sk->sk_protinfo)
+#define sco_pi(sk) ((struct sco_pinfo *) sk)
struct sco_pinfo {
+ struct bt_sock bt;
__u32 flags;
struct sco_conn *conn;
};
diff -Nru a/include/net/dst.h b/include/net/dst.h
--- a/include/net/dst.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/dst.h 2005-03-20 16:30:37 -08:00
@@ -48,6 +48,7 @@
#define DST_NOXFRM 2
#define DST_NOPOLICY 4
#define DST_NOHASH 8
+#define DST_BALANCED 0x10
unsigned long lastuse;
unsigned long expires;
@@ -109,21 +110,6 @@
return dst->metrics[metric-1];
}
-static inline u32
-dst_path_metric(const struct dst_entry *dst, int metric)
-{
- return dst->path->metrics[metric-1];
-}
-
-static inline u32
-dst_pmtu(const struct dst_entry *dst)
-{
- u32 mtu = dst_path_metric(dst, RTAX_MTU);
- /* Yes, _exactly_. This is paranoia. */
- barrier();
- return mtu;
-}
-
static inline u32 dst_mtu(const struct dst_entry *dst)
{
u32 mtu = dst_metric(dst, RTAX_MTU);
@@ -137,7 +123,7 @@
static inline u32
dst_allfrag(const struct dst_entry *dst)
{
- int ret = dst_path_metric(dst, RTAX_FEATURES) & RTAX_FEATURE_ALLFRAG;
+ int ret = dst_metric(dst, RTAX_FEATURES) & RTAX_FEATURE_ALLFRAG;
/* Yes, _exactly_. This is paranoia. */
barrier();
return ret;
diff -Nru a/include/net/flow.h b/include/net/flow.h
--- a/include/net/flow.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/flow.h 2005-03-20 16:30:37 -08:00
@@ -51,6 +51,7 @@
__u8 proto;
__u8 flags;
+#define FLOWI_FLAG_MULTIPATHOLDROUTE 0x01
union {
struct {
__u16 sport;
diff -Nru a/include/net/inetpeer.h b/include/net/inetpeer.h
--- a/include/net/inetpeer.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/inetpeer.h 2005-03-20 16:30:37 -08:00
@@ -19,9 +19,9 @@
{
struct inet_peer *avl_left, *avl_right;
struct inet_peer *unused_next, **unused_prevp;
- atomic_t refcnt;
unsigned long dtime; /* the time of last use of not
* referenced entries */
+ atomic_t refcnt;
__u32 v4daddr; /* peer's address */
__u16 avl_height;
__u16 ip_id_count; /* IP ID for the next packet */
@@ -35,7 +35,6 @@
struct inet_peer *inet_getpeer(__u32 daddr, int create);
extern spinlock_t inet_peer_unused_lock;
-extern struct inet_peer *inet_peer_unused_head;
extern struct inet_peer **inet_peer_unused_tailp;
/* can be called from BH context or outside */
static inline void inet_putpeer(struct inet_peer *p)
diff -Nru a/include/net/ip_fib.h b/include/net/ip_fib.h
--- a/include/net/ip_fib.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/ip_fib.h 2005-03-20 16:30:37 -08:00
@@ -37,6 +37,7 @@
u32 *rta_flow;
struct rta_cacheinfo *rta_ci;
struct rta_session *rta_sess;
+ u32 *rta_mp_alg;
};
struct fib_info;
@@ -81,6 +82,9 @@
#ifdef CONFIG_IP_ROUTE_MULTIPATH
int fib_power;
#endif
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ u32 fib_mp_alg;
+#endif
struct fib_nh fib_nh[0];
#define fib_dev fib_nh[0].nh_dev
};
@@ -95,6 +99,10 @@
unsigned char nh_sel;
unsigned char type;
unsigned char scope;
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ __u32 network;
+ __u32 netmask;
+#endif
struct fib_info *fi;
#ifdef CONFIG_IP_MULTIPLE_TABLES
struct fib_rule *r;
@@ -118,6 +126,14 @@
#define FIB_RES_GW(res) (FIB_RES_NH(res).nh_gw)
#define FIB_RES_DEV(res) (FIB_RES_NH(res).nh_dev)
#define FIB_RES_OIF(res) (FIB_RES_NH(res).nh_oif)
+
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+#define FIB_RES_NETWORK(res) ((res).network)
+#define FIB_RES_NETMASK(res) ((res).netmask)
+#else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
+#define FIB_RES_NETWORK(res) (0)
+#define FIB_RES_NETMASK(res) (0)
+#endif /* CONFIG_IP_ROUTE_MULTIPATH_WRANDOM */
struct fib_table {
unsigned char tb_id;
diff -Nru a/include/net/ip_mp_alg.h b/include/net/ip_mp_alg.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/include/net/ip_mp_alg.h 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,97 @@
+/* ip_mp_alg.h: IPV4 multipath algorithm support.
+ *
+ * Copyright (C) 2004, 2005 Einar Lueck <elueck@de.ibm.com>
+ * Copyright (C) 2005 David S. Miller <davem@davemloft.net>
+ */
+
+#ifndef _NET_IP_MP_ALG_H
+#define _NET_IP_MP_ALG_H
+
+#include <linux/config.h>
+#include <linux/ip_mp_alg.h>
+#include <net/flow.h>
+#include <net/route.h>
+
+struct fib_nh;
+
+struct ip_mp_alg_ops {
+ void (*mp_alg_select_route)(const struct flowi *flp,
+ struct rtable *rth, struct rtable **rp);
+ void (*mp_alg_flush)(void);
+ void (*mp_alg_set_nhinfo)(__u32 network, __u32 netmask,
+ unsigned char prefixlen,
+ const struct fib_nh *nh);
+ void (*mp_alg_remove)(struct rtable *rth);
+};
+
+extern int multipath_alg_register(struct ip_mp_alg_ops *, enum ip_mp_alg);
+extern void multipath_alg_unregister(struct ip_mp_alg_ops *, enum ip_mp_alg);
+
+extern struct ip_mp_alg_ops *ip_mp_alg_table[];
+
+static inline int multipath_select_route(const struct flowi *flp,
+ struct rtable *rth,
+ struct rtable **rp)
+{
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ struct ip_mp_alg_ops *ops = ip_mp_alg_table[rth->rt_multipath_alg];
+
+ if (ops && (rth->u.dst.flags & DST_BALANCED)) {
+ ops->mp_alg_select_route(flp, rth, rp);
+ return 1;
+ }
+#endif
+ return 0;
+}
+
+static inline void multipath_flush(void)
+{
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ int i;
+
+ for (i = IP_MP_ALG_NONE; i <= IP_MP_ALG_MAX; i++) {
+ struct ip_mp_alg_ops *ops = ip_mp_alg_table[i];
+
+ if (ops)
+ ops->mp_alg_flush();
+ }
+#endif
+}
+
+static inline void multipath_set_nhinfo(struct rtable *rth,
+ __u32 network, __u32 netmask,
+ unsigned char prefixlen,
+ const struct fib_nh *nh)
+{
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ struct ip_mp_alg_ops *ops = ip_mp_alg_table[rth->rt_multipath_alg];
+
+ if (ops)
+ ops->mp_alg_set_nhinfo(network, netmask, prefixlen, nh);
+#endif
+}
+
+static inline void multipath_remove(struct rtable *rth)
+{
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ struct ip_mp_alg_ops *ops = ip_mp_alg_table[rth->rt_multipath_alg];
+
+ if (ops && (rth->u.dst.flags & DST_BALANCED))
+ ops->mp_alg_remove(rth);
+#endif
+}
+
+static inline int multipath_comparekeys(const struct flowi *flp1,
+ const struct flowi *flp2)
+{
+ return flp1->fl4_dst == flp2->fl4_dst &&
+ flp1->fl4_src == flp2->fl4_src &&
+ flp1->oif == flp2->oif &&
+#ifdef CONFIG_IP_ROUTE_FWMARK
+ flp1->fl4_fwmark == flp2->fl4_fwmark &&
+#endif
+ !((flp1->fl4_tos ^ flp2->fl4_tos) &
+ (IPTOS_RT_MASK | RTO_ONLINK));
+}
+
+#endif /* _NET_IP_MP_ALG_H */
diff -Nru a/include/net/route.h b/include/net/route.h
--- a/include/net/route.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/route.h 2005-03-20 16:30:37 -08:00
@@ -46,6 +46,7 @@
#define RT_CONN_FLAGS(sk) (RT_TOS(inet_sk(sk)->tos) | sock_flag(sk, SOCK_LOCALROUTE))
+struct fib_nh;
struct inet_peer;
struct rtable
{
@@ -58,7 +59,8 @@
struct in_device *idev;
unsigned rt_flags;
- unsigned rt_type;
+ __u16 rt_type;
+ __u16 rt_multipath_alg;
__u32 rt_dst; /* Path destination */
__u32 rt_src; /* Path source */
@@ -179,6 +181,9 @@
memcpy(&fl, &(*rp)->fl, sizeof(fl));
fl.fl_ip_sport = sport;
fl.fl_ip_dport = dport;
+#if defined(CONFIG_IP_ROUTE_MULTIPATH_CACHED)
+ fl.flags |= FLOWI_FLAG_MULTIPATHOLDROUTE;
+#endif
ip_rt_put(*rp);
*rp = NULL;
return ip_route_output_flow(rp, &fl, sk, 0);
diff -Nru a/include/net/sock.h b/include/net/sock.h
--- a/include/net/sock.h 2005-03-20 16:30:37 -08:00
+++ b/include/net/sock.h 2005-03-20 16:30:37 -08:00
@@ -561,11 +561,6 @@
extern int sk_alloc_slab(struct proto *prot, char *name);
extern void sk_free_slab(struct proto *prot);
-static inline void sk_alloc_slab_error(struct proto *proto)
-{
- printk(KERN_CRIT "%s: Can't create sock SLAB cache!\n", proto->name);
-}
-
static __inline__ void sk_set_owner(struct sock *sk, struct module *owner)
{
/*
diff -Nru a/net/bluetooth/af_bluetooth.c b/net/bluetooth/af_bluetooth.c
--- a/net/bluetooth/af_bluetooth.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/af_bluetooth.c 2005-03-20 16:30:37 -08:00
@@ -60,8 +60,6 @@
#define BT_MAX_PROTO 8
static struct net_proto_family *bt_proto[BT_MAX_PROTO];
-static kmem_cache_t *bt_sock_cache;
-
int bt_sock_register(int proto, struct net_proto_family *ops)
{
if (proto >= BT_MAX_PROTO)
@@ -108,36 +106,6 @@
return err;
}
-struct sock *bt_sock_alloc(struct socket *sock, int proto, int pi_size, int prio)
-{
- struct sock *sk;
- void *pi;
-
- sk = sk_alloc(PF_BLUETOOTH, prio, sizeof(struct bt_sock), bt_sock_cache);
- if (!sk)
- return NULL;
-
- if (pi_size) {
- pi = kmalloc(pi_size, prio);
- if (!pi) {
- sk_free(sk);
- return NULL;
- }
- memset(pi, 0, pi_size);
- sk->sk_protinfo = pi;
- }
-
- sock_init_data(sock, sk);
- INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
-
- sock_reset_flag(sk, SOCK_ZAPPED);
- sk->sk_protocol = proto;
- sk->sk_state = BT_OPEN;
-
- return sk;
-}
-EXPORT_SYMBOL(bt_sock_alloc);
-
void bt_sock_link(struct bt_sock_list *l, struct sock *sk)
{
write_lock_bh(&l->lock);
@@ -355,16 +323,6 @@
if (proc_bt)
proc_bt->owner = THIS_MODULE;
- /* Init socket cache */
- bt_sock_cache = kmem_cache_create("bt_sock",
- sizeof(struct bt_sock), 0,
- SLAB_HWCACHE_ALIGN, NULL, NULL);
-
- if (!bt_sock_cache) {
- BT_ERR("Socket cache creation failed");
- return -ENOMEM;
- }
-
sock_register(&bt_sock_family_ops);
BT_INFO("HCI device and connection manager initialized");
@@ -383,7 +341,6 @@
bt_sysfs_cleanup();
sock_unregister(PF_BLUETOOTH);
- kmem_cache_destroy(bt_sock_cache);
remove_proc_entry("bluetooth", NULL);
}
diff -Nru a/net/bluetooth/bnep/sock.c b/net/bluetooth/bnep/sock.c
--- a/net/bluetooth/bnep/sock.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/bnep/sock.c 2005-03-20 16:30:37 -08:00
@@ -176,17 +176,22 @@
if (sock->type != SOCK_RAW)
return -ESOCKTNOSUPPORT;
- if (!(sk = bt_sock_alloc(sock, PF_BLUETOOTH, 0, GFP_KERNEL)))
+ if (!(sk = sk_alloc(PF_BLUETOOTH, GFP_KERNEL, sizeof(struct bt_sock), NULL)))
return -ENOMEM;
+ sock_init_data(sock, sk);
+
sk_set_owner(sk, THIS_MODULE);
sock->ops = &bnep_sock_ops;
- sock->state = SS_UNCONNECTED;
+ sock->state = SS_UNCONNECTED;
+
+ sock_reset_flag(sk, SOCK_ZAPPED);
- sk->sk_destruct = NULL;
sk->sk_protocol = protocol;
+ sk->sk_state = BT_OPEN;
+
return 0;
}
diff -Nru a/net/bluetooth/cmtp/sock.c b/net/bluetooth/cmtp/sock.c
--- a/net/bluetooth/cmtp/sock.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/cmtp/sock.c 2005-03-20 16:30:37 -08:00
@@ -167,17 +167,21 @@
if (sock->type != SOCK_RAW)
return -ESOCKTNOSUPPORT;
- if (!(sk = bt_sock_alloc(sock, PF_BLUETOOTH, 0, GFP_KERNEL)))
+ if (!(sk = sk_alloc(PF_BLUETOOTH, GFP_KERNEL, sizeof(struct bt_sock), NULL)))
return -ENOMEM;
+ sock_init_data(sock, sk);
+
sk_set_owner(sk, THIS_MODULE);
sock->ops = &cmtp_sock_ops;
sock->state = SS_UNCONNECTED;
- sk->sk_destruct = NULL;
+ sock_reset_flag(sk, SOCK_ZAPPED);
+
sk->sk_protocol = protocol;
+ sk->sk_state = BT_OPEN;
return 0;
}
diff -Nru a/net/bluetooth/hci_sock.c b/net/bluetooth/hci_sock.c
--- a/net/bluetooth/hci_sock.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/hci_sock.c 2005-03-20 16:30:37 -08:00
@@ -601,9 +601,15 @@
sock->ops = &hci_sock_ops;
- sk = bt_sock_alloc(sock, protocol, sizeof(struct hci_pinfo), GFP_KERNEL);
+ sk = sk_alloc(PF_BLUETOOTH, GFP_KERNEL, sizeof(struct hci_pinfo), NULL);
if (!sk)
return -ENOMEM;
+
+ sock_init_data(sock, sk);
+
+ sock_reset_flag(sk, SOCK_ZAPPED);
+
+ sk->sk_protocol = protocol;
sk_set_owner(sk, THIS_MODULE);
diff -Nru a/net/bluetooth/hidp/sock.c b/net/bluetooth/hidp/sock.c
--- a/net/bluetooth/hidp/sock.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/hidp/sock.c 2005-03-20 16:30:37 -08:00
@@ -173,17 +173,21 @@
if (sock->type != SOCK_RAW)
return -ESOCKTNOSUPPORT;
- if (!(sk = bt_sock_alloc(sock, PF_BLUETOOTH, 0, GFP_KERNEL)))
+ if (!(sk = sk_alloc(PF_BLUETOOTH, GFP_KERNEL, sizeof(struct bt_sock), NULL)))
return -ENOMEM;
+ sock_init_data(sock, sk);
+
sk_set_owner(sk, THIS_MODULE);
sock->ops = &hidp_sock_ops;
sock->state = SS_UNCONNECTED;
- sk->sk_destruct = NULL;
+ sock_reset_flag(sk, SOCK_ZAPPED);
+
sk->sk_protocol = protocol;
+ sk->sk_state = BT_OPEN;
return 0;
}
diff -Nru a/net/bluetooth/l2cap.c b/net/bluetooth/l2cap.c
--- a/net/bluetooth/l2cap.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/l2cap.c 2005-03-20 16:30:37 -08:00
@@ -374,14 +374,19 @@
{
struct sock *sk;
- sk = bt_sock_alloc(sock, proto, sizeof(struct l2cap_pinfo), prio);
+ sk = sk_alloc(PF_BLUETOOTH, prio, sizeof(struct l2cap_pinfo), NULL);
if (!sk)
return NULL;
+ sock_init_data(sock, sk);
+ INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
+
sk_set_owner(sk, THIS_MODULE);
sk->sk_destruct = l2cap_sock_destruct;
sk->sk_sndtimeo = L2CAP_CONN_TIMEOUT;
+
+ sock_reset_flag(sk, SOCK_ZAPPED);
sk->sk_protocol = proto;
sk->sk_state = BT_OPEN;
diff -Nru a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c
--- a/net/bluetooth/rfcomm/core.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/rfcomm/core.c 2005-03-20 16:30:37 -08:00
@@ -389,6 +389,8 @@
rfcomm_dlc_unlock(d);
skb_queue_purge(&d->tx_queue);
+ rfcomm_session_put(s);
+
rfcomm_dlc_unlink(d);
}
@@ -597,6 +599,8 @@
*err = -ENOMEM;
goto failed;
}
+
+ rfcomm_session_hold(s);
s->initiator = 1;
diff -Nru a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
--- a/net/bluetooth/rfcomm/sock.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/rfcomm/sock.c 2005-03-20 16:30:37 -08:00
@@ -287,10 +287,13 @@
struct rfcomm_dlc *d;
struct sock *sk;
- sk = bt_sock_alloc(sock, BTPROTO_RFCOMM, sizeof(struct rfcomm_pinfo), prio);
+ sk = sk_alloc(PF_BLUETOOTH, prio, sizeof(struct rfcomm_pinfo), NULL);
if (!sk)
return NULL;
+ sock_init_data(sock, sk);
+ INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
+
sk_set_owner(sk, THIS_MODULE);
d = rfcomm_dlc_alloc(prio);
@@ -298,6 +301,7 @@
sk_free(sk);
return NULL;
}
+
d->data_ready = rfcomm_sk_data_ready;
d->state_change = rfcomm_sk_state_change;
@@ -310,8 +314,10 @@
sk->sk_sndbuf = RFCOMM_MAX_CREDITS * RFCOMM_DEFAULT_MTU * 10;
sk->sk_rcvbuf = RFCOMM_MAX_CREDITS * RFCOMM_DEFAULT_MTU * 10;
+ sock_reset_flag(sk, SOCK_ZAPPED);
+
sk->sk_protocol = proto;
- sk->sk_state = BT_OPEN;
+ sk->sk_state = BT_OPEN;
bt_sock_link(&rfcomm_sk_list, sk);
diff -Nru a/net/bluetooth/sco.c b/net/bluetooth/sco.c
--- a/net/bluetooth/sco.c 2005-03-20 16:30:37 -08:00
+++ b/net/bluetooth/sco.c 2005-03-20 16:30:37 -08:00
@@ -420,14 +420,21 @@
{
struct sock *sk;
- sk = bt_sock_alloc(sock, proto, sizeof(struct sco_pinfo), prio);
+ sk = sk_alloc(PF_BLUETOOTH, prio, sizeof(struct sco_pinfo), NULL);
if (!sk)
return NULL;
+ sock_init_data(sock, sk);
+ INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
+
sk_set_owner(sk, THIS_MODULE);
sk->sk_destruct = sco_sock_destruct;
sk->sk_sndtimeo = SCO_CONN_TIMEOUT;
+
+ sock_reset_flag(sk, SOCK_ZAPPED);
+
+ sk->sk_protocol = proto;
sk->sk_state = BT_OPEN;
sco_sock_init_timer(sk);
diff -Nru a/net/core/netpoll.c b/net/core/netpoll.c
--- a/net/core/netpoll.c 2005-03-20 16:30:37 -08:00
+++ b/net/core/netpoll.c 2005-03-20 16:30:37 -08:00
@@ -233,7 +233,7 @@
udp_len = len + sizeof(*udph);
ip_len = eth_len = udp_len + sizeof(*iph);
- total_len = eth_len + ETH_HLEN;
+ total_len = eth_len + ETH_HLEN + NET_IP_ALIGN;
skb = find_skb(np, total_len, total_len - len);
if (!skb)
diff -Nru a/net/core/sock.c b/net/core/sock.c
--- a/net/core/sock.c 2005-03-20 16:30:37 -08:00
+++ b/net/core/sock.c 2005-03-20 16:30:37 -08:00
@@ -1374,7 +1374,13 @@
prot->slab_obj_size, 0,
SLAB_HWCACHE_ALIGN, NULL, NULL);
- return prot->slab != NULL ? 0 : -ENOBUFS;
+ if (prot->slab == NULL) {
+ printk(KERN_CRIT "%s: Can't create sock SLAB cache!\n",
+ prot->name);
+ return -ENOBUFS;
+ }
+
+ return 0;
}
EXPORT_SYMBOL(sk_alloc_slab);
diff -Nru a/net/decnet/af_decnet.c b/net/decnet/af_decnet.c
--- a/net/decnet/af_decnet.c 2005-03-20 16:30:37 -08:00
+++ b/net/decnet/af_decnet.c 2005-03-20 16:30:37 -08:00
@@ -811,7 +811,7 @@
return -EINVAL;
scp->state = DN_CC;
- scp->segsize_loc = dst_path_metric(__sk_dst_get(sk), RTAX_ADVMSS);
+ scp->segsize_loc = dst_metric(__sk_dst_get(sk), RTAX_ADVMSS);
dn_send_conn_conf(sk, allocation);
prepare_to_wait(sk->sk_sleep, &wait, TASK_INTERRUPTIBLE);
@@ -940,7 +940,7 @@
sk->sk_route_caps = sk->sk_dst_cache->dev->features;
sock->state = SS_CONNECTING;
scp->state = DN_CI;
- scp->segsize_loc = dst_path_metric(sk->sk_dst_cache, RTAX_ADVMSS);
+ scp->segsize_loc = dst_metric(sk->sk_dst_cache, RTAX_ADVMSS);
dn_nsp_send_conninit(sk, NSP_CI);
err = -EINPROGRESS;
diff -Nru a/net/ipv4/Kconfig b/net/ipv4/Kconfig
--- a/net/ipv4/Kconfig 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/Kconfig 2005-03-20 16:30:37 -08:00
@@ -90,6 +90,48 @@
equal "cost" and chooses one of them in a non-deterministic fashion
if a matching packet arrives.
+config IP_ROUTE_MULTIPATH_CACHED
+ bool "IP: equal cost multipath with caching support (EXPERIMENTAL)"
+ depends on: IP_ROUTE_MULTIPATH
+ help
+ Normally, equal cost multipath routing is not supported by the
+ routing cache. If you say Y here, alternative routes are cached
+ and on cache lookup a route is chosen in a configurable fashion.
+
+ If unsure, say N.
+
+config IP_ROUTE_MULTIPATH_RR
+ tristate "MULTIPATH: round robin algorithm"
+ depends on IP_ROUTE_MULTIPATH_CACHED
+ help
+ Mulitpath routes are chosen according to Round Robin
+
+config IP_ROUTE_MULTIPATH_RANDOM
+ tristate "MULTIPATH: random algorithm"
+ depends on IP_ROUTE_MULTIPATH_CACHED
+ help
+ Multipath routes are chosen in a random fashion. Actually,
+ there is no weight for a route. The advantage of this policy
+ is that it is implemented stateless and therefore introduces only
+ a very small delay.
+
+config IP_ROUTE_MULTIPATH_WRANDOM
+ tristate "MULTIPATH: weighted random algorithm"
+ depends on IP_ROUTE_MULTIPATH_CACHED
+ help
+ Multipath routes are chosen in a weighted random fashion.
+ The per route weights are the weights visible via ip route 2. As the
+ corresponding state management introduces some overhead routing delay
+ is increased.
+
+config IP_ROUTE_MULTIPATH_DRR
+ tristate "MULTIPATH: interface round robin algorithm"
+ depends on IP_ROUTE_MULTIPATH_CACHED
+ help
+ Connections are distributed in a round robin fashion over the
+ available interfaces. This policy makes sense if the connections
+ should be primarily distributed on interfaces and not on routes.
+
config IP_ROUTE_VERBOSE
bool "IP: verbose route monitoring"
depends on IP_ADVANCED_ROUTER
diff -Nru a/net/ipv4/Makefile b/net/ipv4/Makefile
--- a/net/ipv4/Makefile 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/Makefile 2005-03-20 16:30:37 -08:00
@@ -20,9 +20,14 @@
obj-$(CONFIG_INET_IPCOMP) += ipcomp.o
obj-$(CONFIG_INET_TUNNEL) += xfrm4_tunnel.o
obj-$(CONFIG_IP_PNP) += ipconfig.o
+obj-$(CONFIG_IP_ROUTE_MULTIPATH_RR) += multipath_rr.o
+obj-$(CONFIG_IP_ROUTE_MULTIPATH_RANDOM) += multipath_random.o
+obj-$(CONFIG_IP_ROUTE_MULTIPATH_WRANDOM) += multipath_wrandom.o
+obj-$(CONFIG_IP_ROUTE_MULTIPATH_DRR) += multipath_drr.o
obj-$(CONFIG_NETFILTER) += netfilter/
obj-$(CONFIG_IP_VS) += ipvs/
obj-$(CONFIG_IP_TCPDIAG) += tcp_diag.o
+obj-$(CONFIG_IP_ROUTE_MULTIPATH_CACHED) += multipath.o
obj-$(CONFIG_XFRM) += xfrm4_policy.o xfrm4_state.o xfrm4_input.o \
xfrm4_output.o
diff -Nru a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c
--- a/net/ipv4/af_inet.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/af_inet.c 2005-03-20 16:30:37 -08:00
@@ -1027,20 +1027,16 @@
}
rc = sk_alloc_slab(&tcp_prot, "tcp_sock");
- if (rc) {
- sk_alloc_slab_error(&tcp_prot);
+ if (rc)
goto out;
- }
+
rc = sk_alloc_slab(&udp_prot, "udp_sock");
- if (rc) {
- sk_alloc_slab_error(&udp_prot);
+ if (rc)
goto out_tcp_free_slab;
- }
+
rc = sk_alloc_slab(&raw_prot, "raw_sock");
- if (rc) {
- sk_alloc_slab_error(&raw_prot);
+ if (rc)
goto out_udp_free_slab;
- }
/*
* Tell SOCKET that we are alive...
diff -Nru a/net/ipv4/fib_hash.c b/net/ipv4/fib_hash.c
--- a/net/ipv4/fib_hash.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/fib_hash.c 2005-03-20 16:30:37 -08:00
@@ -264,6 +264,7 @@
err = fib_semantic_match(&f->fn_alias,
flp, res,
+ f->fn_key, fz->fz_mask,
fz->fz_order);
if (err <= 0)
goto out;
diff -Nru a/net/ipv4/fib_lookup.h b/net/ipv4/fib_lookup.h
--- a/net/ipv4/fib_lookup.h 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/fib_lookup.h 2005-03-20 16:30:37 -08:00
@@ -19,7 +19,8 @@
/* Exported by fib_semantics.c */
extern int fib_semantic_match(struct list_head *head,
const struct flowi *flp,
- struct fib_result *res, int prefixlen);
+ struct fib_result *res, __u32 zone, __u32 mask,
+ int prefixlen);
extern void fib_release_info(struct fib_info *);
extern struct fib_info *fib_create_info(const struct rtmsg *r,
struct kern_rta *rta,
diff -Nru a/net/ipv4/fib_semantics.c b/net/ipv4/fib_semantics.c
--- a/net/ipv4/fib_semantics.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/fib_semantics.c 2005-03-20 16:30:37 -08:00
@@ -42,6 +42,7 @@
#include <net/tcp.h>
#include <net/sock.h>
#include <net/ip_fib.h>
+#include <net/ip_mp_alg.h>
#include "fib_lookup.h"
@@ -649,6 +650,9 @@
#else
const int nhs = 1;
#endif
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ u32 mp_alg = IP_MP_ALG_NONE;
+#endif
/* Fast check to catch the most weird cases */
if (fib_props[r->rtm_type].scope > r->rtm_scope)
@@ -661,6 +665,15 @@
goto err_inval;
}
#endif
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ if (rta->rta_mp_alg) {
+ mp_alg = *rta->rta_mp_alg;
+
+ if (mp_alg < IP_MP_ALG_NONE ||
+ mp_alg > IP_MP_ALG_MAX)
+ goto err_inval;
+ }
+#endif
err = -ENOBUFS;
if (fib_info_cnt >= fib_hash_size) {
@@ -752,6 +765,10 @@
#endif
}
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ fi->fib_mp_alg = mp_alg;
+#endif
+
if (fib_props[r->rtm_type].error) {
if (rta->rta_gw || rta->rta_oif || rta->rta_mp)
goto err_inval;
@@ -831,7 +848,8 @@
}
int fib_semantic_match(struct list_head *head, const struct flowi *flp,
- struct fib_result *res, int prefixlen)
+ struct fib_result *res, __u32 zone, __u32 mask,
+ int prefixlen)
{
struct fib_alias *fa;
int nh_sel = 0;
@@ -895,6 +913,11 @@
res->type = fa->fa_type;
res->scope = fa->fa_scope;
res->fi = fa->fa_info;
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ res->netmask = mask;
+ res->network = zone &
+ (0xFFFFFFFF >> (32 - prefixlen));
+#endif
atomic_inc(&res->fi->fib_clntref);
return 0;
}
diff -Nru a/net/ipv4/inetpeer.c b/net/ipv4/inetpeer.c
--- a/net/ipv4/inetpeer.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/inetpeer.c 2005-03-20 16:30:37 -08:00
@@ -92,9 +92,9 @@
int inet_peer_minttl = 120 * HZ; /* TTL under high load: 120 sec */
int inet_peer_maxttl = 10 * 60 * HZ; /* usual time to live: 10 min */
+static struct inet_peer *inet_peer_unused_head;
/* Exported for inet_putpeer inline function. */
-struct inet_peer *inet_peer_unused_head,
- **inet_peer_unused_tailp = &inet_peer_unused_head;
+struct inet_peer **inet_peer_unused_tailp = &inet_peer_unused_head;
DEFINE_SPINLOCK(inet_peer_unused_lock);
#define PEER_MAX_CLEANUP_WORK 30
diff -Nru a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
--- a/net/ipv4/ip_output.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/ip_output.c 2005-03-20 16:30:37 -08:00
@@ -746,7 +746,7 @@
inet->cork.addr = ipc->addr;
}
dst_hold(&rt->u.dst);
- inet->cork.fragsize = mtu = dst_pmtu(&rt->u.dst);
+ inet->cork.fragsize = mtu = dst_mtu(rt->u.dst.path);
inet->cork.rt = rt;
inet->cork.length = 0;
sk->sk_sndmsg_page = NULL;
diff -Nru a/net/ipv4/ipmr.c b/net/ipv4/ipmr.c
--- a/net/ipv4/ipmr.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/ipmr.c 2005-03-20 16:30:37 -08:00
@@ -1171,7 +1171,7 @@
dev = rt->u.dst.dev;
- if (skb->len+encap > dst_pmtu(&rt->u.dst) && (ntohs(iph->frag_off) & IP_DF)) {
+ if (skb->len+encap > dst_mtu(&rt->u.dst) && (ntohs(iph->frag_off) & IP_DF)) {
/* Do not fragment multicasts. Alas, IPv4 does not
allow to send ICMP, so that packets will disappear
to blackhole.
diff -Nru a/net/ipv4/ipvs/ip_vs_xmit.c b/net/ipv4/ipvs/ip_vs_xmit.c
--- a/net/ipv4/ipvs/ip_vs_xmit.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/ipvs/ip_vs_xmit.c 2005-03-20 16:30:37 -08:00
@@ -178,7 +178,7 @@
}
/* MTU checking */
- mtu = dst_pmtu(&rt->u.dst);
+ mtu = dst_mtu(&rt->u.dst);
if ((skb->len > mtu) && (iph->frag_off&__constant_htons(IP_DF))) {
ip_rt_put(rt);
icmp_send(skb, ICMP_DEST_UNREACH,ICMP_FRAG_NEEDED, htonl(mtu));
@@ -245,7 +245,7 @@
goto tx_error_icmp;
/* MTU checking */
- mtu = dst_pmtu(&rt->u.dst);
+ mtu = dst_mtu(&rt->u.dst);
if ((skb->len > mtu) && (iph->frag_off&__constant_htons(IP_DF))) {
ip_rt_put(rt);
icmp_send(skb, ICMP_DEST_UNREACH,ICMP_FRAG_NEEDED, htonl(mtu));
@@ -342,7 +342,7 @@
tdev = rt->u.dst.dev;
- mtu = dst_pmtu(&rt->u.dst) - sizeof(struct iphdr);
+ mtu = dst_mtu(&rt->u.dst) - sizeof(struct iphdr);
if (mtu < 68) {
ip_rt_put(rt);
IP_VS_DBG_RL("ip_vs_tunnel_xmit(): mtu less than 68\n");
@@ -445,7 +445,7 @@
goto tx_error_icmp;
/* MTU checking */
- mtu = dst_pmtu(&rt->u.dst);
+ mtu = dst_mtu(&rt->u.dst);
if ((iph->frag_off&__constant_htons(IP_DF)) && skb->len > mtu) {
icmp_send(skb, ICMP_DEST_UNREACH,ICMP_FRAG_NEEDED, htonl(mtu));
ip_rt_put(rt);
@@ -520,7 +520,7 @@
goto tx_error_icmp;
/* MTU checking */
- mtu = dst_pmtu(&rt->u.dst);
+ mtu = dst_mtu(&rt->u.dst);
if ((skb->len > mtu) && (skb->nh.iph->frag_off&__constant_htons(IP_DF))) {
ip_rt_put(rt);
icmp_send(skb, ICMP_DEST_UNREACH, ICMP_FRAG_NEEDED, htonl(mtu));
diff -Nru a/net/ipv4/multipath.c b/net/ipv4/multipath.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/net/ipv4/multipath.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,54 @@
+/* multipath.c: IPV4 multipath algorithm support.
+ *
+ * Copyright (C) 2004, 2005 Einar Lueck <elueck@de.ibm.com>
+ * Copyright (C) 2005 David S. Miller <davem@davemloft.net>
+ */
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/netdevice.h>
+#include <linux/spinlock.h>
+
+#include <net/ip_mp_alg.h>
+
+static DEFINE_SPINLOCK(alg_table_lock);
+struct ip_mp_alg_ops *ip_mp_alg_table[IP_MP_ALG_MAX];
+
+int multipath_alg_register(struct ip_mp_alg_ops *ops, enum ip_mp_alg n)
+{
+ struct ip_mp_alg_ops **slot;
+ int err;
+
+ if (n < IP_MP_ALG_NONE || n > IP_MP_ALG_MAX)
+ return -EINVAL;
+
+ spin_lock(&alg_table_lock);
+ slot = &ip_mp_alg_table[n];
+ if (*slot != NULL) {
+ err = -EBUSY;
+ } else {
+ *slot = ops;
+ err = 0;
+ }
+ spin_unlock(&alg_table_lock);
+
+ return err;
+}
+EXPORT_SYMBOL(multipath_alg_register);
+
+void multipath_alg_unregister(struct ip_mp_alg_ops *ops, enum ip_mp_alg n)
+{
+ struct ip_mp_alg_ops **slot;
+
+ if (n < IP_MP_ALG_NONE || n > IP_MP_ALG_MAX)
+ return;
+
+ spin_lock(&alg_table_lock);
+ slot = &ip_mp_alg_table[n];
+ if (*slot == ops)
+ *slot = NULL;
+ spin_unlock(&alg_table_lock);
+
+ synchronize_net();
+}
+EXPORT_SYMBOL(multipath_alg_unregister);
diff -Nru a/net/ipv4/multipath_drr.c b/net/ipv4/multipath_drr.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/net/ipv4/multipath_drr.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,265 @@
+/*
+ * Device round robin policy for multipath.
+ *
+ *
+ * Version: $Id: multipath_drr.c,v 1.1.2.1 2004/09/16 07:42:34 elueck Exp $
+ *
+ * Authors: Einar Lueck <elueck@de.ibm.com><lkml@einar-lueck.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/timer.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/fcntl.h>
+#include <linux/stat.h>
+#include <linux/socket.h>
+#include <linux/in.h>
+#include <linux/inet.h>
+#include <linux/netdevice.h>
+#include <linux/inetdevice.h>
+#include <linux/igmp.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/mroute.h>
+#include <linux/init.h>
+#include <net/ip.h>
+#include <net/protocol.h>
+#include <linux/skbuff.h>
+#include <net/sock.h>
+#include <net/icmp.h>
+#include <net/udp.h>
+#include <net/raw.h>
+#include <linux/notifier.h>
+#include <linux/if_arp.h>
+#include <linux/netfilter_ipv4.h>
+#include <net/ipip.h>
+#include <net/checksum.h>
+#include <net/ip_mp_alg.h>
+
+struct multipath_device {
+ int ifi; /* interface index of device */
+ atomic_t usecount;
+ int allocated;
+};
+
+#define MULTIPATH_MAX_DEVICECANDIDATES 10
+
+static struct multipath_device state[MULTIPATH_MAX_DEVICECANDIDATES];
+static DEFINE_SPINLOCK(state_lock);
+static struct rtable *last_selection = NULL;
+
+static int inline __multipath_findslot(void)
+{
+ int i;
+
+ for (i = 0; i < MULTIPATH_MAX_DEVICECANDIDATES; i++) {
+ if (state[i].allocated == 0)
+ return i;
+ }
+ return -1;
+}
+
+static int inline __multipath_finddev(int ifindex)
+{
+ int i;
+
+ for (i = 0; i < MULTIPATH_MAX_DEVICECANDIDATES; i++) {
+ if (state[i].allocated != 0 &&
+ state[i].ifi == ifindex)
+ return i;
+ }
+ return -1;
+}
+
+static int drr_dev_event(struct notifier_block *this,
+ unsigned long event, void *ptr)
+{
+ struct net_device *dev = ptr;
+ int devidx;
+
+ switch (event) {
+ case NETDEV_UNREGISTER:
+ case NETDEV_DOWN:
+ spin_lock_bh(&state_lock);
+
+ devidx = __multipath_finddev(dev->ifindex);
+ if (devidx != -1) {
+ state[devidx].allocated = 0;
+ state[devidx].ifi = 0;
+ atomic_set(&state[devidx].usecount, 0);
+ }
+
+ spin_unlock_bh(&state_lock);
+ break;
+ };
+
+ return NOTIFY_DONE;
+}
+
+struct notifier_block drr_dev_notifier = {
+ .notifier_call = drr_dev_event,
+};
+
+static void drr_remove(struct rtable *rt)
+{
+ if (last_selection == rt)
+ last_selection = NULL;
+}
+
+static void drr_safe_inc(atomic_t *usecount)
+{
+ int n;
+
+ atomic_inc(usecount);
+
+ n = atomic_read(usecount);
+ if (n <= 0) {
+ int i;
+
+ spin_lock_bh(&state_lock);
+
+ for (i = 0; i < MULTIPATH_MAX_DEVICECANDIDATES; i++)
+ atomic_set(&state[i].usecount, 0);
+
+ spin_unlock_bh(&state_lock);
+ }
+}
+
+static void drr_select_route(const struct flowi *flp,
+ struct rtable *first, struct rtable **rp)
+{
+ struct rtable *nh, *result, *cur_min;
+ int min_usecount = -1;
+ int devidx = -1;
+ int cur_min_devidx = -1;
+
+ /* if necessary and possible utilize the old alternative */
+ if ((flp->flags & FLOWI_FLAG_MULTIPATHOLDROUTE) != 0 &&
+ last_selection != NULL) {
+ result = last_selection;
+ *rp = result;
+ return;
+ }
+
+ /* 1. make sure all alt. nexthops have the same GC related data */
+ /* 2. determine the new candidate to be returned */
+ result = NULL;
+ cur_min = NULL;
+ for (nh = rcu_dereference(first); nh;
+ nh = rcu_dereference(nh->u.rt_next)) {
+ if ((nh->u.dst.flags & DST_BALANCED) != 0 &&
+ multipath_comparekeys(&nh->fl, flp)) {
+ int nh_ifidx = nh->u.dst.dev->ifindex;
+
+ nh->u.dst.lastuse = jiffies;
+ nh->u.dst.__use++;
+ if (result != NULL)
+ continue;
+
+ /* search for the output interface */
+
+ /* this is not SMP safe, only add/remove are
+ * SMP safe as wrong usecount updates have no big
+ * impact
+ */
+ devidx = __multipath_finddev(nh_ifidx);
+ if (devidx == -1) {
+ /* add the interface to the array
+ * SMP safe
+ */
+ spin_lock_bh(&state_lock);
+
+ /* due to SMP: search again */
+ devidx = __multipath_finddev(nh_ifidx);
+ if (devidx == -1) {
+ /* add entry for device */
+ devidx = __multipath_findslot();
+ if (devidx == -1) {
+ /* unlikely but possible */
+ continue;
+ }
+
+ state[devidx].allocated = 1;
+ state[devidx].ifi = nh_ifidx;
+ atomic_set(&state[devidx].usecount, 0);
+ min_usecount = 0;
+ }
+
+ spin_unlock_bh(&state_lock);
+ }
+
+ if (min_usecount == 0) {
+ /* if the device has not been used it is
+ * the primary target
+ */
+ drr_safe_inc(&state[devidx].usecount);
+ result = nh;
+ } else {
+ int count =
+ atomic_read(&state[devidx].usecount);
+
+ if (min_usecount == -1 ||
+ count < min_usecount) {
+ cur_min = nh;
+ cur_min_devidx = devidx;
+ min_usecount = count;
+ }
+ }
+ }
+ }
+
+ if (!result) {
+ if (cur_min) {
+ drr_safe_inc(&state[cur_min_devidx].usecount);
+ result = cur_min;
+ } else {
+ result = first;
+ }
+ }
+
+ *rp = result;
+ last_selection = result;
+}
+
+static struct ip_mp_alg_ops drr_ops = {
+ .mp_alg_select_route = drr_select_route,
+ .mp_alg_remove = drr_remove,
+};
+
+static int __init drr_init(void)
+{
+ int err = register_netdevice_notifier(&drr_dev_notifier);
+
+ if (err)
+ return err;
+
+ err = multipath_alg_register(&drr_ops, IP_MP_ALG_RR);
+ if (err)
+ goto fail;
+
+ return 0;
+
+fail:
+ unregister_netdevice_notifier(&drr_dev_notifier);
+ return err;
+}
+
+static void __exit drr_exit(void)
+{
+ unregister_netdevice_notifier(&drr_dev_notifier);
+ multipath_alg_unregister(&drr_ops, IP_MP_ALG_DRR);
+}
+
+module_init(drr_init);
+module_exit(drr_exit);
diff -Nru a/net/ipv4/multipath_random.c b/net/ipv4/multipath_random.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/net/ipv4/multipath_random.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,128 @@
+/*
+ * Random policy for multipath.
+ *
+ *
+ * Version: $Id: multipath_random.c,v 1.1.2.3 2004/09/21 08:42:11 elueck Exp $
+ *
+ * Authors: Einar Lueck <elueck@de.ibm.com><lkml@einar-lueck.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/timer.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/fcntl.h>
+#include <linux/stat.h>
+#include <linux/socket.h>
+#include <linux/in.h>
+#include <linux/inet.h>
+#include <linux/netdevice.h>
+#include <linux/inetdevice.h>
+#include <linux/igmp.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/mroute.h>
+#include <linux/init.h>
+#include <net/ip.h>
+#include <net/protocol.h>
+#include <linux/skbuff.h>
+#include <net/sock.h>
+#include <net/icmp.h>
+#include <net/udp.h>
+#include <net/raw.h>
+#include <linux/notifier.h>
+#include <linux/if_arp.h>
+#include <linux/netfilter_ipv4.h>
+#include <net/ipip.h>
+#include <net/checksum.h>
+#include <net/ip_mp_alg.h>
+
+#define MULTIPATH_MAX_CANDIDATES 40
+
+/* interface to random number generation */
+static unsigned int RANDOM_SEED = 93186752;
+
+static inline unsigned int random(unsigned int ubound)
+{
+ static unsigned int a = 1588635695,
+ q = 2,
+ r = 1117695901;
+
+ RANDOM_SEED = a*(RANDOM_SEED % q) - r*(RANDOM_SEED / q);
+
+ return RANDOM_SEED % ubound;
+}
+
+
+static void random_select_route(const struct flowi *flp,
+ struct rtable *first,
+ struct rtable **rp)
+{
+ struct rtable *rt;
+ struct rtable *decision;
+ unsigned char candidate_count = 0;
+
+ /* count all candidate */
+ for (rt = rcu_dereference(first); rt;
+ rt = rcu_dereference(rt->u.rt_next)) {
+ if ((rt->u.dst.flags & DST_BALANCED) != 0 &&
+ multipath_comparekeys(&rt->fl, flp))
+ ++candidate_count;
+ }
+
+ /* choose a random candidate */
+ decision = first;
+ if (candidate_count > 1) {
+ unsigned char i = 0;
+ unsigned char candidate_no = (unsigned char)
+ random(candidate_count);
+
+ /* find chosen candidate and adjust GC data for all candidates
+ * to ensure they stay in cache
+ */
+ for (rt = first; rt; rt = rt->u.rt_next) {
+ if ((rt->u.dst.flags & DST_BALANCED) != 0 &&
+ multipath_comparekeys(&rt->fl, flp)) {
+ rt->u.dst.lastuse = jiffies;
+
+ if (i == candidate_no)
+ decision = rt;
+
+ if (i >= candidate_count)
+ break;
+
+ i++;
+ }
+ }
+ }
+
+ decision->u.dst.__use++;
+ *rp = decision;
+}
+
+static struct ip_mp_alg_ops random_ops = {
+ .mp_alg_select_route = random_select_route,
+};
+
+static int __init random_init(void)
+{
+ return multipath_alg_register(&random_ops, IP_MP_ALG_RANDOM);
+}
+
+static void __exit random_exit(void)
+{
+ multipath_alg_unregister(&random_ops, IP_MP_ALG_RANDOM);
+}
+
+module_init(random_init);
+module_exit(random_exit);
diff -Nru a/net/ipv4/multipath_rr.c b/net/ipv4/multipath_rr.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/net/ipv4/multipath_rr.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,115 @@
+/*
+ * Round robin policy for multipath.
+ *
+ *
+ * Version: $Id: multipath_rr.c,v 1.1.2.2 2004/09/16 07:42:34 elueck Exp $
+ *
+ * Authors: Einar Lueck <elueck@de.ibm.com><lkml@einar-lueck.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/timer.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/fcntl.h>
+#include <linux/stat.h>
+#include <linux/socket.h>
+#include <linux/in.h>
+#include <linux/inet.h>
+#include <linux/netdevice.h>
+#include <linux/inetdevice.h>
+#include <linux/igmp.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/mroute.h>
+#include <linux/init.h>
+#include <net/ip.h>
+#include <net/protocol.h>
+#include <linux/skbuff.h>
+#include <net/sock.h>
+#include <net/icmp.h>
+#include <net/udp.h>
+#include <net/raw.h>
+#include <linux/notifier.h>
+#include <linux/if_arp.h>
+#include <linux/netfilter_ipv4.h>
+#include <net/ipip.h>
+#include <net/checksum.h>
+#include <net/ip_mp_alg.h>
+
+#define MULTIPATH_MAX_CANDIDATES 40
+
+static struct rtable* last_used = NULL;
+
+static void rr_remove(struct rtable *rt)
+{
+ if (last_used == rt)
+ last_used = NULL;
+}
+
+static void rr_select_route(const struct flowi *flp,
+ struct rtable *first, struct rtable **rp)
+{
+ struct rtable *nh, *result, *min_use_cand = NULL;
+ int min_use = -1;
+
+ /* if necessary and possible utilize the old alternative */
+ if ((flp->flags & FLOWI_FLAG_MULTIPATHOLDROUTE) != 0 &&
+ last_used != NULL) {
+ result = last_used;
+ goto out;
+ }
+
+ /* 1. make sure all alt. nexthops have the same GC related data
+ * 2. determine the new candidate to be returned
+ */
+ result = NULL;
+ for (nh = rcu_dereference(first); nh;
+ nh = rcu_dereference(nh->u.rt_next)) {
+ if ((nh->u.dst.flags & DST_BALANCED) != 0 &&
+ multipath_comparekeys(&nh->fl, flp)) {
+ nh->u.dst.lastuse = jiffies;
+
+ if (min_use == -1 || nh->u.dst.__use < min_use) {
+ min_use = nh->u.dst.__use;
+ min_use_cand = nh;
+ }
+ }
+ }
+ result = min_use_cand;
+ if (!result)
+ result = first;
+
+out:
+ last_used = result;
+ result->u.dst.__use++;
+ *rp = result;
+}
+
+static struct ip_mp_alg_ops rr_ops = {
+ .mp_alg_select_route = rr_select_route,
+ .mp_alg_remove = rr_remove,
+};
+
+static int __init rr_init(void)
+{
+ return multipath_alg_register(&rr_ops, IP_MP_ALG_RR);
+}
+
+static void __exit rr_exit(void)
+{
+ multipath_alg_unregister(&rr_ops, IP_MP_ALG_RR);
+}
+
+module_init(rr_init);
+module_exit(rr_exit);
diff -Nru a/net/ipv4/multipath_wrandom.c b/net/ipv4/multipath_wrandom.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/net/ipv4/multipath_wrandom.c 2005-03-20 16:30:37 -08:00
@@ -0,0 +1,344 @@
+/*
+ * Weighted random policy for multipath.
+ *
+ *
+ * Version: $Id: multipath_wrandom.c,v 1.1.2.3 2004/09/22 07:51:40 elueck Exp $
+ *
+ * Authors: Einar Lueck <elueck@de.ibm.com><lkml@einar-lueck.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/timer.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/fcntl.h>
+#include <linux/stat.h>
+#include <linux/socket.h>
+#include <linux/in.h>
+#include <linux/inet.h>
+#include <linux/netdevice.h>
+#include <linux/inetdevice.h>
+#include <linux/igmp.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/mroute.h>
+#include <linux/init.h>
+#include <net/ip.h>
+#include <net/protocol.h>
+#include <linux/skbuff.h>
+#include <net/sock.h>
+#include <net/icmp.h>
+#include <net/udp.h>
+#include <net/raw.h>
+#include <linux/notifier.h>
+#include <linux/if_arp.h>
+#include <linux/netfilter_ipv4.h>
+#include <net/ipip.h>
+#include <net/checksum.h>
+#include <net/ip_fib.h>
+#include <net/ip_mp_alg.h>
+
+#define MULTIPATH_STATE_SIZE 15
+
+struct multipath_candidate {
+ struct multipath_candidate *next;
+ int power;
+ struct rtable *rt;
+};
+
+struct multipath_dest {
+ struct list_head list;
+
+ const struct fib_nh *nh_info;
+ __u32 netmask;
+ __u32 network;
+ unsigned char prefixlen;
+
+ struct rcu_head rcu;
+};
+
+struct multipath_bucket {
+ struct list_head head;
+ spinlock_t lock;
+};
+
+struct multipath_route {
+ struct list_head list;
+
+ int oif;
+ __u32 gw;
+ struct list_head dests;
+
+ struct rcu_head rcu;
+};
+
+/* state: primarily weight per route information */
+static struct multipath_bucket state[MULTIPATH_STATE_SIZE];
+
+/* interface to random number generation */
+static unsigned int RANDOM_SEED = 93186752;
+
+static inline unsigned int random(unsigned int ubound)
+{
+ static unsigned int a = 1588635695,
+ q = 2,
+ r = 1117695901;
+ RANDOM_SEED = a*(RANDOM_SEED % q) - r*(RANDOM_SEED / q);
+ return RANDOM_SEED % ubound;
+}
+
+static unsigned char __multipath_lookup_weight(const struct flowi *fl,
+ const struct rtable *rt)
+{
+ const int state_idx = rt->idev->dev->ifindex % MULTIPATH_STATE_SIZE;
+ struct multipath_route *r;
+ struct multipath_route *target_route = NULL;
+ struct multipath_dest *d;
+ int weight = 1;
+
+ /* lookup the weight information for a certain route */
+ rcu_read_lock();
+
+ /* find state entry for gateway or add one if necessary */
+ list_for_each_entry_rcu(r, &state[state_idx].head, list) {
+ if (r->gw == rt->rt_gateway &&
+ r->oif == rt->idev->dev->ifindex) {
+ target_route = r;
+ break;
+ }
+ }
+
+ if (!target_route) {
+ /* this should not happen... but we are prepared */
+ printk( KERN_CRIT"%s: missing state for gateway: %u and " \
+ "device %d\n", __FUNCTION__, rt->rt_gateway,
+ rt->idev->dev->ifindex);
+ goto out;
+ }
+
+ /* find state entry for destination */
+ list_for_each_entry_rcu(d, &target_route->dests, list) {
+ __u32 targetnetwork = fl->fl4_dst &
+ (0xFFFFFFFF >> (32 - d->prefixlen));
+
+ if ((targetnetwork & d->netmask) == d->network) {
+ weight = d->nh_info->nh_weight;
+ goto out;
+ }
+ }
+
+out:
+ rcu_read_unlock();
+ return weight;
+}
+
+static void wrandom_init_state(void)
+{
+ int i;
+
+ for (i = 0; i < MULTIPATH_STATE_SIZE; ++i) {
+ INIT_LIST_HEAD(&state[i].head);
+ spin_lock_init(&state[i].lock);
+ }
+}
+
+static void wrandom_select_route(const struct flowi *flp,
+ struct rtable *first,
+ struct rtable **rp)
+{
+ struct rtable *rt;
+ struct rtable *decision;
+ struct multipath_candidate *first_mpc = NULL;
+ struct multipath_candidate *mpc, *last_mpc = NULL;
+ int power = 0;
+ int last_power;
+ int selector;
+ const size_t size_mpc = sizeof(struct multipath_candidate);
+
+ /* collect all candidates and identify their weights */
+ for (rt = rcu_dereference(first); rt;
+ rt = rcu_dereference(rt->u.rt_next)) {
+ if ((rt->u.dst.flags & DST_BALANCED) != 0 &&
+ multipath_comparekeys(&rt->fl, flp)) {
+ struct multipath_candidate* mpc =
+ (struct multipath_candidate*)
+ kmalloc(size_mpc, GFP_KERNEL);
+
+ if (!mpc)
+ return;
+
+ power += __multipath_lookup_weight(flp, rt) * 10000;
+
+ mpc->power = power;
+ mpc->rt = rt;
+ mpc->next = NULL;
+
+ if (!first_mpc)
+ first_mpc = mpc;
+ else
+ last_mpc->next = mpc;
+
+ last_mpc = mpc;
+ }
+ }
+
+ /* choose a weighted random candidate */
+ decision = first;
+ selector = random(power);
+ last_power = 0;
+
+ /* select candidate, adjust GC data and cleanup local state */
+ decision = first;
+ last_mpc = NULL;
+ for (mpc = first_mpc; mpc; mpc = mpc->next) {
+ mpc->rt->u.dst.lastuse = jiffies;
+ if (last_power <= selector && selector < mpc->power)
+ decision = mpc->rt;
+
+ last_power = mpc->power;
+ if (last_mpc)
+ kfree(last_mpc);
+
+ last_mpc = mpc;
+ }
+
+ if (last_mpc) {
+ /* concurrent __multipath_flush may lead to !last_mpc */
+ kfree(last_mpc);
+ }
+
+ decision->u.dst.__use++;
+ *rp = decision;
+}
+
+static void wrandom_set_nhinfo(__u32 network,
+ __u32 netmask,
+ unsigned char prefixlen,
+ const struct fib_nh *nh)
+{
+ const int state_idx = nh->nh_oif % MULTIPATH_STATE_SIZE;
+ struct multipath_route *r, *target_route = NULL;
+ struct multipath_dest *d, *target_dest = NULL;
+
+ /* store the weight information for a certain route */
+ spin_lock(&state[state_idx].lock);
+
+ /* find state entry for gateway or add one if necessary */
+ list_for_each_entry_rcu(r, &state[state_idx].head, list) {
+ if (r->gw == nh->nh_gw && r->oif == nh->nh_oif) {
+ target_route = r;
+ break;
+ }
+ }
+
+ if (!target_route) {
+ const size_t size_rt = sizeof(struct multipath_route);
+ target_route = (struct multipath_route *)
+ kmalloc(size_rt, GFP_KERNEL);
+
+ target_route->gw = nh->nh_gw;
+ target_route->oif = nh->nh_oif;
+ memset(&target_route->rcu, sizeof(struct rcu_head), 0);
+ INIT_LIST_HEAD(&target_route->dests);
+
+ list_add_rcu(&target_route->list, &state[state_idx].head);
+ }
+
+ /* find state entry for destination or add one if necessary */
+ list_for_each_entry_rcu(d, &target_route->dests, list) {
+ if (d->nh_info == nh) {
+ target_dest = d;
+ break;
+ }
+ }
+
+ if (!target_dest) {
+ const size_t size_dst = sizeof(struct multipath_dest);
+ target_dest = (struct multipath_dest*)
+ kmalloc(size_dst, GFP_KERNEL);
+
+ target_dest->nh_info = nh;
+ target_dest->network = network;
+ target_dest->netmask = netmask;
+ target_dest->prefixlen = prefixlen;
+ memset(&target_dest->rcu, sizeof(struct rcu_head), 0);
+
+ list_add_rcu(&target_dest->list, &target_route->dests);
+ }
+ /* else: we already stored this info for another destination =>
+ * we are finished
+ */
+
+ spin_unlock(&state[state_idx].lock);
+}
+
+static void __multipath_free(struct rcu_head *head)
+{
+ struct multipath_route *rt = container_of(head, struct multipath_route,
+ rcu);
+ kfree(rt);
+}
+
+static void __multipath_free_dst(struct rcu_head *head)
+{
+ struct multipath_dest *dst = container_of(head,
+ struct multipath_dest,
+ rcu);
+ kfree(dst);
+}
+
+static void wrandom_flush(void)
+{
+ int i;
+
+ /* defere delete to all entries */
+ for (i = 0; i < MULTIPATH_STATE_SIZE; ++i) {
+ struct multipath_route *r;
+
+ spin_lock(&state[i].lock);
+ list_for_each_entry_rcu(r, &state[i].head, list) {
+ struct multipath_dest *d;
+ list_for_each_entry_rcu(d, &r->dests, list) {
+ list_del_rcu(&d->list);
+ call_rcu(&d->rcu,
+ __multipath_free_dst);
+ }
+ list_del_rcu(&r->list);
+ call_rcu(&r->rcu,
+ __multipath_free);
+ }
+
+ spin_unlock(&state[i].lock);
+ }
+}
+
+static struct ip_mp_alg_ops wrandom_ops = {
+ .mp_alg_select_route = wrandom_select_route,
+ .mp_alg_flush = wrandom_flush,
+ .mp_alg_set_nhinfo = wrandom_set_nhinfo,
+};
+
+static int __init wrandom_init(void)
+{
+ wrandom_init_state();
+
+ return multipath_alg_register(&wrandom_ops, IP_MP_ALG_WRANDOM);
+}
+
+static void __exit wrandom_exit(void)
+{
+ multipath_alg_unregister(&wrandom_ops, IP_MP_ALG_WRANDOM);
+}
+
+module_init(wrandom_init);
+module_exit(wrandom_exit);
diff -Nru a/net/ipv4/netfilter/ip_conntrack_standalone.c b/net/ipv4/netfilter/ip_conntrack_standalone.c
--- a/net/ipv4/netfilter/ip_conntrack_standalone.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/netfilter/ip_conntrack_standalone.c 2005-03-20 16:30:37 -08:00
@@ -457,7 +457,7 @@
/* Local packets are never produced too large for their
interface. We degfragment them at LOCAL_OUT, however,
so we have to refragment them here. */
- if ((*pskb)->len > dst_pmtu(&rt->u.dst) &&
+ if ((*pskb)->len > dst_mtu(&rt->u.dst) &&
!skb_shinfo(*pskb)->tso_size) {
/* No hook can be after us, so this should be OK. */
ip_fragment(*pskb, okfn);
diff -Nru a/net/ipv4/netfilter/ipt_REJECT.c b/net/ipv4/netfilter/ipt_REJECT.c
--- a/net/ipv4/netfilter/ipt_REJECT.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/netfilter/ipt_REJECT.c 2005-03-20 16:30:37 -08:00
@@ -207,13 +207,13 @@
nskb->nh.iph->ihl);
/* "Never happens" */
- if (nskb->len > dst_pmtu(nskb->dst))
+ if (nskb->len > dst_mtu(nskb->dst))
goto free_nskb;
nf_ct_attach(nskb, oldskb);
NF_HOOK(PF_INET, NF_IP_LOCAL_OUT, nskb, NULL, nskb->dst->dev,
- ip_finish_output);
+ dst_output);
return;
free_nskb:
diff -Nru a/net/ipv4/netfilter/ipt_TCPMSS.c b/net/ipv4/netfilter/ipt_TCPMSS.c
--- a/net/ipv4/netfilter/ipt_TCPMSS.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/netfilter/ipt_TCPMSS.c 2005-03-20 16:30:37 -08:00
@@ -87,14 +87,14 @@
return NF_DROP; /* or IPT_CONTINUE ?? */
}
- if(dst_pmtu((*pskb)->dst) <= (sizeof(struct iphdr) + sizeof(struct tcphdr))) {
+ if(dst_mtu((*pskb)->dst) <= (sizeof(struct iphdr) + sizeof(struct tcphdr))) {
if (net_ratelimit())
printk(KERN_ERR
- "ipt_tcpmss_target: unknown or invalid path-MTU (%d)\n", dst_pmtu((*pskb)->dst));
+ "ipt_tcpmss_target: unknown or invalid path-MTU (%d)\n", dst_mtu((*pskb)->dst));
return NF_DROP; /* or IPT_CONTINUE ?? */
}
- newmss = dst_pmtu((*pskb)->dst) - sizeof(struct iphdr) - sizeof(struct tcphdr);
+ newmss = dst_mtu((*pskb)->dst) - sizeof(struct iphdr) - sizeof(struct tcphdr);
} else
newmss = tcpmssinfo->mss;
diff -Nru a/net/ipv4/route.c b/net/ipv4/route.c
--- a/net/ipv4/route.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/route.c 2005-03-20 16:30:37 -08:00
@@ -100,6 +100,7 @@
#include <net/tcp.h>
#include <net/icmp.h>
#include <net/xfrm.h>
+#include <net/ip_mp_alg.h>
#ifdef CONFIG_SYSCTL
#include <linux/sysctl.h>
#endif
@@ -451,11 +452,13 @@
static __inline__ void rt_free(struct rtable *rt)
{
+ multipath_remove(rt);
call_rcu_bh(&rt->u.dst.rcu_head, dst_rcu_free);
}
static __inline__ void rt_drop(struct rtable *rt)
{
+ multipath_remove(rt);
ip_rt_put(rt);
call_rcu_bh(&rt->u.dst.rcu_head, dst_rcu_free);
}
@@ -517,6 +520,52 @@
return score;
}
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+static struct rtable **rt_remove_balanced_route(struct rtable **chain_head,
+ struct rtable *expentry,
+ int *removed_count)
+{
+ int passedexpired = 0;
+ struct rtable **nextstep = NULL;
+ struct rtable **rthp = chain_head;
+ struct rtable *rth;
+
+ if (removed_count)
+ *removed_count = 0;
+
+ while ((rth = *rthp) != NULL) {
+ if (rth == expentry)
+ passedexpired = 1;
+
+ if (((*rthp)->u.dst.flags & DST_BALANCED) != 0 &&
+ compare_keys(&(*rthp)->fl, &expentry->fl)) {
+ if (*rthp == expentry) {
+ *rthp = rth->u.rt_next;
+ continue;
+ } else {
+ *rthp = rth->u.rt_next;
+ rt_free(rth);
+ if (removed_count)
+ ++(*removed_count);
+ }
+ } else {
+ if (!((*rthp)->u.dst.flags & DST_BALANCED) &&
+ passedexpired && !nextstep)
+ nextstep = &rth->u.rt_next;
+
+ rthp = &rth->u.rt_next;
+ }
+ }
+
+ rt_free(expentry);
+ if (removed_count)
+ ++(*removed_count);
+
+ return nextstep;
+}
+#endif /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
+
+
/* This runs via a timer and thus is always in BH context. */
static void rt_check_expire(unsigned long dummy)
{
@@ -548,8 +597,22 @@
}
/* Cleanup aged off entries. */
- *rthp = rth->u.rt_next;
- rt_free(rth);
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ /* remove all related balanced entries if necessary */
+ if (rth->u.dst.flags & DST_BALANCED) {
+ rthp = rt_remove_balanced_route(
+ &rt_hash_table[i].chain,
+ rth, NULL);
+ if (!rthp)
+ break;
+ } else {
+ *rthp = rth->u.rt_next;
+ rt_free(rth);
+ }
+#else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
+ *rthp = rth->u.rt_next;
+ rt_free(rth);
+#endif /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
}
spin_unlock(&rt_hash_table[i].lock);
@@ -597,6 +660,9 @@
if (delay < 0)
delay = ip_rt_min_delay;
+ /* flush existing multipath state*/
+ multipath_flush();
+
spin_lock_bh(&rt_flush_lock);
if (del_timer(&rt_flush_timer) && delay > 0 && rt_deadline) {
@@ -715,9 +781,30 @@
rthp = &rth->u.rt_next;
continue;
}
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ /* remove all related balanced entries
+ * if necessary
+ */
+ if (rth->u.dst.flags & DST_BALANCED) {
+ int r;
+
+ rthp = rt_remove_balanced_route(
+ &rt_hash_table[i].chain,
+ rth,
+ &r);
+ goal -= r;
+ if (!rthp)
+ break;
+ } else {
+ *rthp = rth->u.rt_next;
+ rt_free(rth);
+ goal--;
+ }
+#else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
*rthp = rth->u.rt_next;
rt_free(rth);
goal--;
+#endif /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
}
spin_unlock_bh(&rt_hash_table[k].lock);
if (goal <= 0)
@@ -798,7 +885,12 @@
spin_lock_bh(&rt_hash_table[hash].lock);
while ((rth = *rthp) != NULL) {
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ if (!(rth->u.dst.flags & DST_BALANCED) &&
+ compare_keys(&rth->fl, &rt->fl)) {
+#else
if (compare_keys(&rth->fl, &rt->fl)) {
+#endif
/* Put it first */
*rthp = rth->u.rt_next;
/*
@@ -1629,6 +1721,10 @@
}
rth->u.dst.flags= DST_HOST;
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ if (res->fi->fib_nhs > 1)
+ rth->u.dst.flags |= DST_BALANCED;
+#endif
if (in_dev->cnf.no_policy)
rth->u.dst.flags |= DST_NOPOLICY;
if (in_dev->cnf.no_xfrm)
@@ -1676,7 +1772,7 @@
unsigned hash;
#ifdef CONFIG_IP_ROUTE_MULTIPATH
- if (res->fi->fib_nhs > 1 && fl->oif == 0)
+ if (res->fi && res->fi->fib_nhs > 1 && fl->oif == 0)
fib_select_multipath(fl, res);
#endif
@@ -1697,7 +1793,57 @@
struct in_device *in_dev,
u32 daddr, u32 saddr, u32 tos)
{
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ struct rtable* rth;
+ unsigned char hop, hopcount, lasthop;
+ int err = -EINVAL;
+ unsigned int hash;
+
+ if (res->fi)
+ hopcount = res->fi->fib_nhs;
+ else
+ hopcount = 1;
+
+ lasthop = hopcount - 1;
+
+ /* distinguish between multipath and singlepath */
+ if (hopcount < 2)
+ return ip_mkroute_input_def(skb, res, fl, in_dev, daddr,
+ saddr, tos);
+
+ /* add all alternatives to the routing cache */
+ for (hop = 0; hop < hopcount; hop++) {
+ res->nh_sel = hop;
+
+ /* create a routing cache entry */
+ err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos,
+ &rth);
+ if (err)
+ return err;
+
+ /* put it into the cache */
+ hash = rt_hash_code(daddr, saddr ^ (fl->iif << 5), tos);
+ err = rt_intern_hash(hash, rth, (struct rtable**)&skb->dst);
+ if (err)
+ return err;
+
+ /* forward hop information to multipath impl. */
+ multipath_set_nhinfo(rth,
+ FIB_RES_NETWORK(*res),
+ FIB_RES_NETMASK(*res),
+ res->prefixlen,
+ &FIB_RES_NH(*res));
+
+ /* only for the last hop the reference count is handled
+ * outside
+ */
+ if (hop == lasthop)
+ atomic_set(&(skb->dst->__refcnt), 1);
+ }
+ return err;
+#else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
return ip_mkroute_input_def(skb, res, fl, in_dev, daddr, saddr, tos);
+#endif /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
}
@@ -2018,6 +2164,13 @@
}
rth->u.dst.flags= DST_HOST;
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ if (res->fi) {
+ rth->rt_multipath_alg = res->fi->fib_mp_alg;
+ if (res->fi->fib_nhs > 1)
+ rth->u.dst.flags |= DST_BALANCED;
+ }
+#endif
if (in_dev->cnf.no_xfrm)
rth->u.dst.flags |= DST_NOXFRM;
if (in_dev->cnf.no_policy)
@@ -2109,7 +2262,58 @@
struct net_device *dev_out,
unsigned flags)
{
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ u32 tos = RT_FL_TOS(oldflp);
+ unsigned char hop;
+ unsigned hash;
+ int err = -EINVAL;
+ struct rtable *rth;
+
+ if (res->fi && res->fi->fib_nhs > 1) {
+ unsigned char hopcount = res->fi->fib_nhs;
+
+ for (hop = 0; hop < hopcount; hop++) {
+ struct net_device *dev2nexthop;
+
+ res->nh_sel = hop;
+
+ /* hold a work reference to the output device */
+ dev2nexthop = FIB_RES_DEV(*res);
+ dev_hold(dev2nexthop);
+
+ err = __mkroute_output(&rth, res, fl, oldflp,
+ dev2nexthop, flags);
+
+ if (err != 0)
+ goto cleanup;
+
+ hash = rt_hash_code(oldflp->fl4_dst,
+ oldflp->fl4_src ^
+ (oldflp->oif << 5), tos);
+ err = rt_intern_hash(hash, rth, rp);
+
+ /* forward hop information to multipath impl. */
+ multipath_set_nhinfo(rth,
+ FIB_RES_NETWORK(*res),
+ FIB_RES_NETMASK(*res),
+ res->prefixlen,
+ &FIB_RES_NH(*res));
+ cleanup:
+ /* release work reference to output device */
+ dev_put(dev2nexthop);
+
+ if (err != 0)
+ return err;
+ }
+ atomic_set(&(*rp)->u.dst.__refcnt, 1);
+ return err;
+ } else {
+ return ip_mkroute_output_def(rp, res, fl, oldflp, dev_out,
+ flags);
+ }
+#else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
return ip_mkroute_output_def(rp, res, fl, oldflp, dev_out, flags);
+#endif
}
/*
@@ -2138,6 +2342,7 @@
int free_res = 0;
int err;
+
res.fi = NULL;
#ifdef CONFIG_IP_MULTIPLE_TABLES
res.r = NULL;
@@ -2187,6 +2392,8 @@
dev_put(dev_out);
dev_out = NULL;
}
+
+
if (oldflp->oif) {
dev_out = dev_get_by_index(oldflp->oif);
err = -ENODEV;
@@ -2293,9 +2500,11 @@
dev_hold(dev_out);
fl.oif = dev_out->ifindex;
+
make_route:
err = ip_mkroute_output(rp, &res, &fl, oldflp, dev_out, flags);
+
if (free_res)
fib_res_put(&res);
if (dev_out)
@@ -2322,6 +2531,17 @@
#endif
!((rth->fl.fl4_tos ^ flp->fl4_tos) &
(IPTOS_RT_MASK | RTO_ONLINK))) {
+
+ /* check for multipath routes and choose one if
+ * necessary
+ */
+ if (multipath_select_route(flp, rth, rp)) {
+ dst_hold(&(*rp)->u.dst);
+ RT_CACHE_STAT_INC(out_hit);
+ rcu_read_unlock_bh();
+ return 0;
+ }
+
rth->u.dst.lastuse = jiffies;
dst_hold(&rth->u.dst);
rth->u.dst.__use++;
@@ -2395,6 +2615,13 @@
#ifdef CONFIG_NET_CLS_ROUTE
if (rt->u.dst.tclassid)
RTA_PUT(skb, RTA_FLOW, 4, &rt->u.dst.tclassid);
+#endif
+#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ if (rt->rt_multipath_alg != IP_MP_ALG_NONE) {
+ __u32 alg = rt->rt_multipath_alg;
+
+ RTA_PUT(skb, RTA_MP_ALGO, 4, &alg);
+ }
#endif
if (rt->fl.iif)
RTA_PUT(skb, RTA_PREFSRC, 4, &rt->rt_spec_dst);
diff -Nru a/net/ipv4/xfrm4_output.c b/net/ipv4/xfrm4_output.c
--- a/net/ipv4/xfrm4_output.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv4/xfrm4_output.c 2005-03-20 16:30:37 -08:00
@@ -58,7 +58,7 @@
if (!top_iph->frag_off)
__ip_select_ident(top_iph, dst, 0);
- top_iph->ttl = dst_path_metric(dst, RTAX_HOPLIMIT);
+ top_iph->ttl = dst_metric(dst->child, RTAX_HOPLIMIT);
top_iph->saddr = x->props.saddr.a4;
top_iph->daddr = x->id.daddr.a4;
diff -Nru a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c
--- a/net/ipv6/af_inet6.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv6/af_inet6.c 2005-03-20 16:30:37 -08:00
@@ -711,20 +711,17 @@
}
err = sk_alloc_slab(&tcpv6_prot, "tcpv6_sock");
- if (err) {
- sk_alloc_slab_error(&tcpv6_prot);
+ if (err)
goto out;
- }
+
err = sk_alloc_slab(&udpv6_prot, "udpv6_sock");
- if (err) {
- sk_alloc_slab_error(&udpv6_prot);
+ if (err)
goto out_tcp_free_slab;
- }
+
err = sk_alloc_slab(&rawv6_prot, "rawv6_sock");
- if (err) {
- sk_alloc_slab_error(&rawv6_prot);
+ if (err)
goto out_udp_free_slab;
- }
+
/* Register the socket-side information for inet6_create. */
for(r = &inetsw6[0]; r < &inetsw6[SOCK_MAX]; ++r)
diff -Nru a/net/ipv6/ip6_flowlabel.c b/net/ipv6/ip6_flowlabel.c
--- a/net/ipv6/ip6_flowlabel.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv6/ip6_flowlabel.c 2005-03-20 16:30:37 -08:00
@@ -87,7 +87,7 @@
static void fl_free(struct ip6_flowlabel *fl)
{
- if (fl->opt)
+ if (fl)
kfree(fl->opt);
kfree(fl);
}
@@ -351,8 +351,7 @@
return fl;
done:
- if (fl)
- fl_free(fl);
+ fl_free(fl);
*err_p = err;
return NULL;
}
@@ -551,10 +550,8 @@
}
done:
- if (fl)
- fl_free(fl);
- if (sfl1)
- kfree(sfl1);
+ fl_free(fl);
+ kfree(sfl1);
return err;
}
diff -Nru a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
--- a/net/ipv6/ip6_output.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv6/ip6_output.c 2005-03-20 16:30:37 -08:00
@@ -850,8 +850,8 @@
np->cork.rt = rt;
inet->cork.fl = *fl;
np->cork.hop_limit = hlimit;
- inet->cork.fragsize = mtu = dst_pmtu(&rt->u.dst);
- if (dst_allfrag(&rt->u.dst))
+ inet->cork.fragsize = mtu = dst_mtu(rt->u.dst.path);
+ if (dst_allfrag(rt->u.dst.path))
inet->cork.flags |= IPCORK_ALLFRAG;
inet->cork.length = 0;
sk->sk_sndmsg_page = NULL;
diff -Nru a/net/ipv6/xfrm6_output.c b/net/ipv6/xfrm6_output.c
--- a/net/ipv6/xfrm6_output.c 2005-03-20 16:30:37 -08:00
+++ b/net/ipv6/xfrm6_output.c 2005-03-20 16:30:37 -08:00
@@ -69,7 +69,7 @@
dsfield &= ~INET_ECN_MASK;
ipv6_change_dsfield(top_iph, 0, dsfield);
top_iph->nexthdr = IPPROTO_IPV6;
- top_iph->hop_limit = dst_path_metric(dst, RTAX_HOPLIMIT);
+ top_iph->hop_limit = dst_metric(dst->child, RTAX_HOPLIMIT);
ipv6_addr_copy(&top_iph->saddr, (struct in6_addr *)&x->props.saddr);
ipv6_addr_copy(&top_iph->daddr, (struct in6_addr *)&x->id.daddr);
}
diff -Nru a/net/key/af_key.c b/net/key/af_key.c
--- a/net/key/af_key.c 2005-03-20 16:30:37 -08:00
+++ b/net/key/af_key.c 2005-03-20 16:30:37 -08:00
@@ -593,7 +593,7 @@
/* address family check */
sockaddr_size = pfkey_sockaddr_size(x->props.family);
if (!sockaddr_size)
- ERR_PTR(-EINVAL);
+ return ERR_PTR(-EINVAL);
/* base, SA, (lifetime (HSC),) address(SD), (address(P),)
key(AE), (identity(SD),) (sensitivity)> */
diff -Nru a/scripts/kernel-doc b/scripts/kernel-doc
--- a/scripts/kernel-doc 2005-03-20 16:30:37 -08:00
+++ b/scripts/kernel-doc 2005-03-20 16:30:37 -08:00
@@ -1626,11 +1626,11 @@
# replace <, >, and &
sub xml_escape($) {
- shift;
- s/\&/\\\\\\amp;/g;
- s/\</\\\\\\lt;/g;
- s/\>/\\\\\\gt;/g;
- return $_;
+ my $text = shift;
+ $text =~ s/\&/\\\\\\amp;/g;
+ $text =~ s/\</\\\\\\lt;/g;
+ $text =~ s/\>/\\\\\\gt;/g;
+ return $text;
}
sub process_file($) {