From: Adrian Bunk <bunk@stusta.de>
"extern inline" doesn't make much sense.
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
include/asm-i386/div64.h | 2 +-
include/asm-i386/processor.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff -puN include/asm-i386/div64.h~include-asm-i386-extern-inline-static-inline include/asm-i386/div64.h
--- devel/include/asm-i386/div64.h~include-asm-i386-extern-inline-static-inline 2005-08-06 15:35:21.000000000 -0700
+++ devel-akpm/include/asm-i386/div64.h 2005-08-06 15:35:21.000000000 -0700
@@ -35,7 +35,7 @@
*/
#define div_long_long_rem(a,b,c) div_ll_X_l_rem(a,b,c)
-extern inline long
+static inline long
div_ll_X_l_rem(long long divs, long div, long *rem)
{
long dum2;
diff -puN include/asm-i386/processor.h~include-asm-i386-extern-inline-static-inline include/asm-i386/processor.h
--- devel/include/asm-i386/processor.h~include-asm-i386-extern-inline-static-inline 2005-08-06 15:35:21.000000000 -0700
+++ devel-akpm/include/asm-i386/processor.h 2005-08-06 15:35:21.000000000 -0700
@@ -575,7 +575,7 @@ static inline void rep_nop(void)
However we don't do prefetches for pre XP Athlons currently
That should be fixed. */
#define ARCH_HAS_PREFETCH
-extern inline void prefetch(const void *x)
+static inline void prefetch(const void *x)
{
alternative_input(ASM_NOP4,
"prefetchnta (%1)",
@@ -589,7 +589,7 @@ extern inline void prefetch(const void *
/* 3dnow! prefetch to get an exclusive cache line. Useful for
spinlocks to avoid one state transition in the cache coherency protocol. */
-extern inline void prefetchw(const void *x)
+static inline void prefetchw(const void *x)
{
alternative_input(ASM_NOP4,
"prefetchw (%1)",
_