From: Anton Blanchard <anton@samba.org>
- Use 970/970FX instead of GPUL
- Add POWER5 and 970FX to systemcfg.h
- Create new cpu feature CPU_FTR_MMCRA_SIHV and use it
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
25-akpm/arch/ppc64/kernel/cputable.c | 6 ++++--
25-akpm/arch/ppc64/oprofile/common.c | 4 ++--
25-akpm/arch/ppc64/oprofile/op_model_power4.c | 2 +-
25-akpm/include/asm-ppc64/cputable.h | 1 +
25-akpm/include/asm-ppc64/processor.h | 4 ++--
25-akpm/include/asm-ppc64/systemcfg.h | 2 ++
6 files changed, 12 insertions(+), 7 deletions(-)
diff -puN arch/ppc64/kernel/cputable.c~ppc64-fix-oprofile-on-970 arch/ppc64/kernel/cputable.c
--- 25/arch/ppc64/kernel/cputable.c~ppc64-fix-oprofile-on-970 2004-06-26 22:10:57.118285096 -0700
+++ 25-akpm/arch/ppc64/kernel/cputable.c 2004-06-26 22:10:57.135282512 -0700
@@ -141,7 +141,8 @@ struct cpu_spec cpu_specs[] = {
0xffff0000, 0x003a0000, "POWER5 (gr)",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
- CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE,
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
+ CPU_FTR_MMCRA_SIHV,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power4,
@@ -151,7 +152,8 @@ struct cpu_spec cpu_specs[] = {
0xffff0000, 0x003b0000, "POWER5 (gs)",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
- CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE,
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
+ CPU_FTR_MMCRA_SIHV,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power4,
diff -puN arch/ppc64/oprofile/common.c~ppc64-fix-oprofile-on-970 arch/ppc64/oprofile/common.c
--- 25/arch/ppc64/oprofile/common.c~ppc64-fix-oprofile-on-970 2004-06-26 22:10:57.121284640 -0700
+++ 25-akpm/arch/ppc64/oprofile/common.c 2004-06-26 22:10:57.136282360 -0700
@@ -154,8 +154,8 @@ int __init oprofile_arch_init(struct opr
oprof_ppc64_ops.cpu_type = "ppc64/power4";
break;
- case PV_GPUL:
- case PV_GPULp:
+ case PV_970:
+ case PV_970FX:
model = &op_model_power4;
model->num_counters = 8;
oprof_ppc64_ops.cpu_type = "ppc64/970";
diff -puN arch/ppc64/oprofile/op_model_power4.c~ppc64-fix-oprofile-on-970 arch/ppc64/oprofile/op_model_power4.c
--- 25/arch/ppc64/oprofile/op_model_power4.c~ppc64-fix-oprofile-on-970 2004-06-26 22:10:57.123284336 -0700
+++ 25-akpm/arch/ppc64/oprofile/op_model_power4.c 2004-06-26 22:10:57.137282208 -0700
@@ -42,7 +42,7 @@ static void power4_reg_setup(struct op_c
*
* It has been verified to work on POWER5 so we enable it there.
*/
- if (!(__is_processor(PV_POWER4) || __is_processor(PV_POWER4p)))
+ if (cur_cpu_spec->cpu_features & CPU_FTR_MMCRA_SIHV)
mmcra_has_sihv = 1;
for (i = 0; i < num_counters; ++i)
diff -puN include/asm-ppc64/cputable.h~ppc64-fix-oprofile-on-970 include/asm-ppc64/cputable.h
--- 25/include/asm-ppc64/cputable.h~ppc64-fix-oprofile-on-970 2004-06-26 22:10:57.125284032 -0700
+++ 25-akpm/include/asm-ppc64/cputable.h 2004-06-26 22:10:57.134282664 -0700
@@ -131,6 +131,7 @@ extern firmware_feature_t firmware_featu
#define CPU_FTR_SMT 0x0000010000000000
#define CPU_FTR_COHERENT_ICACHE 0x0000020000000000
#define CPU_FTR_LOCKLESS_TLBIE 0x0000040000000000
+#define CPU_FTR_MMCRA_SIHV 0x0000080000000000
/* Platform firmware features */
#define FW_FTR_ 0x0000000000000001
diff -puN include/asm-ppc64/processor.h~ppc64-fix-oprofile-on-970 include/asm-ppc64/processor.h
--- 25/include/asm-ppc64/processor.h~ppc64-fix-oprofile-on-970 2004-06-26 22:10:57.127283728 -0700
+++ 25-akpm/include/asm-ppc64/processor.h 2004-06-26 22:10:57.133282816 -0700
@@ -382,10 +382,10 @@
#define PV_ICESTAR 0x0036
#define PV_SSTAR 0x0037
#define PV_POWER4p 0x0038
-#define PV_GPUL 0x0039
+#define PV_970 0x0039
#define PV_POWER5 0x003A
#define PV_POWER5p 0x003B
-#define PV_GPULp 0x003C
+#define PV_970FX 0x003C
#define PV_630 0x0040
#define PV_630p 0x0041
diff -puN include/asm-ppc64/systemcfg.h~ppc64-fix-oprofile-on-970 include/asm-ppc64/systemcfg.h
--- 25/include/asm-ppc64/systemcfg.h~ppc64-fix-oprofile-on-970 2004-06-26 22:10:57.128283576 -0700
+++ 25-akpm/include/asm-ppc64/systemcfg.h 2004-06-26 22:10:57.133282816 -0700
@@ -73,6 +73,8 @@ extern struct systemcfg *systemcfg;
#define PV_SSTAR 0x0037
#define PV_POWER4p 0x0038
#define PV_GPUL 0x0039
+#define PV_POWER5 0x003a
+#define PV_970FX 0x003c
#define PV_630 0x0040
#define PV_630p 0x0041
_