diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 2ecc712..e026391 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -24,6 +24,8 @@ Optional properties:
- ti,no-reset-on-init: When present, the module should not be reset at init
- ti,no-idle-on-init: When present, the module should not be idled at init
- ti,no-idle: When present, the module is never allowed to idle.
+- ti,deassert-hard-reset: list of hwmod and hardware reset line name pairs
+ (ascii strings) to be deasserted upon device instantiation.
Example:
diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt
index 8fbf0aa..72db8dd 100644
--- a/Documentation/pwm.txt
+++ b/Documentation/pwm.txt
@@ -85,9 +85,11 @@ will find:
The PWM channels are numbered using a per-chip index from 0 to npwm-1.
-When a PWM channel is exported a pwmX directory will be created in the
+When a PWM channel is exported a pwm-N:X directory will be created in the
pwmchipN directory it is associated with, where X is the number of the
-channel that was exported. The following properties will then be available:
+channel that was exported. It will also be exposed at /sys/class/pwm/ and
+can be identified by the pwm_channel device type.
+The following properties will then be available:
period
The total period of the PWM signal (read/write).
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index a3af4dc..5e9c1d6 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -29,6 +29,10 @@ export ZRELADDR INITRD_PHYS PARAMS_PHYS
targets := Image zImage xipImage bootpImage uImage
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
ifeq ($(CONFIG_XIP_KERNEL),y)
cmd_deflate_xip_data = $(CONFIG_SHELL) -c \
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 37a3de7..e58e47e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1,4 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
dtb-$(CONFIG_ARCH_ALPINE) += \
alpine-db.dtb
dtb-$(CONFIG_MACH_ARTPEC6) += \
@@ -190,6 +195,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
+ exynos5422-artik10-eval.dtb \
exynos5422-odroidhc1.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
@@ -438,6 +444,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-b650v3.dtb \
imx6q-b850v3.dtb \
imx6q-cm-fx6.dtb \
+ imx6q-ccimx6sbc.dtb \
imx6q-cubox-i.dtb \
imx6q-cubox-i-emmc-som-v15.dtb \
imx6q-cubox-i-som-v15.dtb \
@@ -533,6 +540,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-udoo-neo-full.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \
+ imx6ul-14x14-evk-ism43362-b81-evb.dtb \
imx6ul-geam.dtb \
imx6ul-isiot-emmc.dtb \
imx6ul-isiot-nand.dtb \
@@ -679,6 +687,18 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-base0033.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
+ am335x-bonegreen-wireless-uboot-univ.dtb \
+ am335x-boneblack-uboot-univ.dtb \
+ am335x-bone-uboot-univ.dtb \
+ am335x-boneblack-audio.dtb \
+ am335x-boneblack-bbb-exp-r.dtb \
+ am335x-boneblack-bbb-exp-c.dtb \
+ am335x-boneblack-bbbmini.dtb \
+ am335x-boneblack-wl1835mod.dtb \
+ am335x-olimex-som.dtb \
+ am335x-abbbi.dtb \
+ am335x-sancloud-bbe.dtb \
+ am335x-boneblack-uboot.dtb \
am335x-boneblack-wireless.dtb \
am335x-boneblue.dtb \
am335x-bonegreen.dtb \
@@ -706,6 +726,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-panda.dtb \
omap4-panda-a4.dtb \
omap4-panda-es.dtb \
+ omap4-panda-es-b3.dtb \
omap4-sdp.dtb \
omap4-sdp-es23plus.dtb \
omap4-var-dvk-om44.dtb \
diff --git b/arch/arm/boot/dts/am335x-abbbi.dts b/arch/arm/boot/dts/am335x-abbbi.dts
new file mode 100644
index 0000000..43efead
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-abbbi.dts
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright 2015 Konsulko Group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+
+
+/ {
+ model = "Arrow BeagleBone Black Industrial";
+ compatible = "arrow,am335x-abbbi", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&am33xx_pinmux {
+ adi_hdmi_bbbi_pins: adi_hdmi_bbbi_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+ AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
+ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
+ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
+ AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
+ AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
+ AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
+ AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
+ AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
+ AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
+ AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
+ AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
+ AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
+ AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
+ AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
+ AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
+ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
+ AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
+ AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
+ AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
+ AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
+ >;
+ };
+ adi_hdmi_bbbi_off_pins: adi_hdmi_bbbi_off_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+ >;
+ };
+
+ mcasp0_pins: mcasp0_pins {
+ pinctrl-single,pins = <
+ 0x1ac (PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */
+ 0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
+ 0x194 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
+ 0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
+ 0x06c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
+ >;
+ };
+
+ mcasp0_pins_sleep: mcasp0_pins_sleep {
+ pinctrl-single,pins = <
+ 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.mcasp0_ahclkx */
+ 0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.mcasp0_axr2 */
+ 0x194 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_fsx.mcasp0_fsx */
+ 0x190 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_aclkx.mcasp0_aclkx */
+ 0x06c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
+ >;
+ };
+};
+
+&lcdc {
+ status = "okay";
+ port {
+ lcdc_0: endpoint@0 {
+ remote-endpoint = <&hdmi_0>;
+ };
+ };
+};
+
+&i2c0 {
+ adv7511w {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ pinctrl-names = "default", "off";
+ pinctrl-0 = <&adi_hdmi_bbbi_pins>;
+ pinctrl-1 = <&adi_hdmi_bbbi_off_pins>;
+
+ port {
+ hdmi_0: endpoint@0 {
+ remote-endpoint = <&lcdc_0>;
+ };
+ };
+ };
+};
+
+&mcasp0 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&mcasp0_pins>;
+ pinctrl-1 = <&mcasp0_pins_sleep>;
+ status = "okay";
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 1 0
+ >;
+ tx-num-evt = <1>;
+ rx-num-evt = <1>;
+};
+
+/ {
+ clk_mcasp0_fixed: clk_mcasp0_fixed {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
+ clk_mcasp0: clk_mcasp0 {
+ #clock-cells = <0>;
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_mcasp0_fixed>;
+ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
+ };
+
+ hdmi_audio: hdmi_audio@0 {
+ compatible = "linux,hdmi-audio";
+ status = "okay";
+ };
+
+ sound {
+ compatible = "ti,beaglebone-black-audio";
+ ti,model = "TI BeagleBone Black";
+ ti,audio-codec = <&hdmi_audio>;
+ ti,mcasp-controller = <&mcasp0>;
+ ti,audio-routing =
+ "HDMI Out", "TX";
+ clocks = <&clk_mcasp0>;
+ clock-names = "mclk";
+ };
+};
+
+&rtc {
+ system-power-controller;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
new file mode 100644
index 0000000..73d5f54
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
@@ -0,0 +1,367 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_reg>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds_s0>;
+
+ compatible = "gpio-leds";
+
+ led2 {
+ label = "beaglebone:green:usr0";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led3 {
+ label = "beaglebone:green:usr1";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led4 {
+ label = "beaglebone:green:usr2";
+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu0";
+ default-state = "off";
+ };
+
+ led5 {
+ label = "beaglebone:green:usr3";
+ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+ };
+
+ vmmcsd_fixed: fixedregulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmcsd_fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&am33xx_pinmux {
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
+ AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
+ AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
+ AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
+ >;
+ };
+
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ >;
+ };
+
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
+ AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+ AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+ >;
+ };
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x108 (PIN_INPUT | MUX_MODE0) /* mii1_col.mii1_col */
+ 0x10c (PIN_INPUT | MUX_MODE0) /* mii1_crs.mii1_crs */
+ AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
+ AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
+ AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
+ AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
+ AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
+ AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
+ AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
+ AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
+ AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
+ AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
+ AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
+ AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
+ AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
+ AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spio0_cs1.gpio0_6 */
+ AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
+ AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
+ AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
+ AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
+ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
+ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
+ >;
+ };
+
+ emmc_pins: pinmux_emmc_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+ AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+ AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+ AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+ AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+ AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+ AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+ AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+ AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+ AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+ >;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_ctrl_mod {
+ status = "okay";
+};
+
+&usb0_phy {
+ status = "okay";
+};
+
+&usb1_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "peripheral";
+ interrupts-extended = <&intc 18 &tps 0>;
+ interrupt-names = "mc", "vbus";
+};
+
+&usb1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&cppi41dma {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps@24 {
+ reg = <0x24>;
+ };
+
+ baseboard_eeprom: baseboard_eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ baseboard_data: baseboard_data@0 {
+ reg = <0 0x100>;
+ };
+ };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+ /*
+ * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
+ * mode") at poweroff. Most BeagleBone versions do not support RTC-only
+ * mode and risk hardware damage if this mode is entered.
+ *
+ * For details, see linux-omap mailing list May 2015 thread
+ * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
+ * In particular, messages:
+ * http://www.spinics.net/lists/linux-omap/msg118585.html
+ * http://www.spinics.net/lists/linux-omap/msg118615.html
+ *
+ * You can override this later with
+ * &tps { /delete-property/ ti,pmic-shutdown-controller; }
+ * if you want to use RTC-only mode and made sure you are not affected
+ * by the hardware problems. (Tip: double-check by performing a current
+ * measurement after shutdown: it should be less than 1 mA.)
+ */
+
+ interrupts = <7>; /* NMI */
+ interrupt-parent = <&intc>;
+
+ ti,pmic-shutdown-controller;
+
+ charger {
+ status = "okay";
+ };
+
+ pwrbutton {
+ status = "okay";
+ };
+
+ regulators {
+ dcdc1_reg: regulator@0 {
+ regulator-name = "vdds_dpr";
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator@1 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1351500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator@2 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@3 {
+ regulator-name = "vio,vrtc,vdds";
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ regulator-name = "vdd_3v3aux";
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@5 {
+ regulator-name = "vdd_1v8";
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@6 {
+ regulator-name = "vdd_3v3a";
+ regulator-always-on;
+ };
+ };
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "mii";
+};
+
+&mac {
+ slaves = <1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+};
+
+&mmc1 {
+ status = "okay";
+ bus-width = <0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+};
+
+&aes {
+ status = "okay";
+};
+
+&sham {
+ status = "okay";
+};
+
+&rtc {
+ clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
+ clock-names = "ext-clk", "int-clk";
+ system-power-controller;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
new file mode 100644
index 0000000..aa69240
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
@@ -0,0 +1,2919 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+
+ /* P8_07 (ZCZ ball R7) gpio2_2 */
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
+
+ /* P8_08 (ZCZ ball T7) gpio2_3 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
+
+ /* P8_09 (ZCZ ball T6) gpio2_5 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
+
+ /* P8_10 (ZCZ ball U6) gpio2_4 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
+
+ /* P8_11 (ZCZ ball R12) gpio1_13 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+
+ /* P8_12 (ZCZ ball T12) gpio1_12 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+
+ /* P8_13 (ZCZ ball T10) gpio0_23 */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+
+ /* P8_14 (ZCZ ball T11) gpio0_26 */
+ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
+
+ /* P8_15 (ZCZ ball U13) gpio1_15 */
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+
+ /* P8_16 (ZCZ ball V13) gpio1_14 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+
+ /* P8_17 (ZCZ ball U12) gpio0_27 */
+ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_pwm_pin: pinmux_P8_17_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
+
+ /* P8_18 (ZCZ ball V12) gpio2_1 */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+
+ /* P8_19 (ZCZ ball U10) gpio0_22 */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+
+ /* P8_26 (ZCZ ball V6) gpio1_29 */
+ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) gpio0_30 */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+
+ /* P9_12 (ZCZ ball U18) gpio1_28 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+
+ /* P9_13 (ZCZ ball U17) gpio0_31 */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+
+ /* P9_14 (ZCZ ball U14) gpio1_18 */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+
+ /* P9_15 (ZCZ ball R13) gpio1_16 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
+
+ /* P9_16 (ZCZ ball T14) gpio1_19 */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
+
+ /* P9_17 (ZCZ ball A16) gpio0_5 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+ /* P9_18 (ZCZ ball B16) gpio0_4 */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+ /* P9_19 (ZCZ ball D17) i2c2_scl */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
+ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P9_20 (ZCZ ball D18) i2c2_sda */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
+ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+
+ /* P9_21 (ZCZ ball B17) gpio0_3 */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P9_22 (ZCZ ball A17) gpio0_2 */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+ /* P9_23 (ZCZ ball V14) gpio1_17 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
+
+ /* P9_24 (ZCZ ball D15) gpio0_15 */
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+
+ /* P9_26 (ZCZ ball D16) gpio0_14 */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+
+ /* P9_27 (ZCZ ball C13) gpio3_19 */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+
+ /* P9_30 (ZCZ ball D12) gpio3_16 */
+ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_pwm_pin: pinmux_P9_30_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
+ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
+ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
+ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) gpio0_20 */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) gpio3_20 */
+ P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+
+ /* P9_42 (ZCZ ball C18) gpio0_7 */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) gpio3_18 */
+ P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&eqep0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+/**********************************************************************/
+/* Pin Multiplex Helpers */
+/* */
+/* These provide userspace runtime pin configuration for the */
+/* BeagleBone cape expansion headers */
+/**********************************************************************/
+
+&ocp {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_03_default_pin>;
+ pinctrl-1 = <&P8_03_gpio_pin>;
+ pinctrl-2 = <&P8_03_gpio_pu_pin>;
+ pinctrl-3 = <&P8_03_gpio_pd_pin>;
+ pinctrl-4 = <&P8_03_gpio_input_pin>;
+ };
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_04_default_pin>;
+ pinctrl-1 = <&P8_04_gpio_pin>;
+ pinctrl-2 = <&P8_04_gpio_pu_pin>;
+ pinctrl-3 = <&P8_04_gpio_pd_pin>;
+ pinctrl-4 = <&P8_04_gpio_input_pin>;
+ };
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_05_default_pin>;
+ pinctrl-1 = <&P8_05_gpio_pin>;
+ pinctrl-2 = <&P8_05_gpio_pu_pin>;
+ pinctrl-3 = <&P8_05_gpio_pd_pin>;
+ pinctrl-4 = <&P8_05_gpio_input_pin>;
+ };
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_06_default_pin>;
+ pinctrl-1 = <&P8_06_gpio_pin>;
+ pinctrl-2 = <&P8_06_gpio_pu_pin>;
+ pinctrl-3 = <&P8_06_gpio_pd_pin>;
+ pinctrl-4 = <&P8_06_gpio_input_pin>;
+ };
+
+ /* P8_07 (ZCZ ball R7) */
+ P8_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_07_default_pin>;
+ pinctrl-1 = <&P8_07_gpio_pin>;
+ pinctrl-2 = <&P8_07_gpio_pu_pin>;
+ pinctrl-3 = <&P8_07_gpio_pd_pin>;
+ pinctrl-4 = <&P8_07_gpio_input_pin>;
+ pinctrl-5 = <&P8_07_timer_pin>;
+ };
+
+ /* P8_08 (ZCZ ball T7) */
+ P8_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_08_default_pin>;
+ pinctrl-1 = <&P8_08_gpio_pin>;
+ pinctrl-2 = <&P8_08_gpio_pu_pin>;
+ pinctrl-3 = <&P8_08_gpio_pd_pin>;
+ pinctrl-4 = <&P8_08_gpio_input_pin>;
+ pinctrl-5 = <&P8_08_timer_pin>;
+ };
+
+ /* P8_09 (ZCZ ball T6) */
+ P8_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_09_default_pin>;
+ pinctrl-1 = <&P8_09_gpio_pin>;
+ pinctrl-2 = <&P8_09_gpio_pu_pin>;
+ pinctrl-3 = <&P8_09_gpio_pd_pin>;
+ pinctrl-4 = <&P8_09_gpio_input_pin>;
+ pinctrl-5 = <&P8_09_timer_pin>;
+ };
+
+ /* P8_10 (ZCZ ball U6) */
+ P8_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_10_default_pin>;
+ pinctrl-1 = <&P8_10_gpio_pin>;
+ pinctrl-2 = <&P8_10_gpio_pu_pin>;
+ pinctrl-3 = <&P8_10_gpio_pd_pin>;
+ pinctrl-4 = <&P8_10_gpio_input_pin>;
+ pinctrl-5 = <&P8_10_timer_pin>;
+ };
+
+ /* P8_11 (ZCZ ball R12) */
+ P8_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_11_default_pin>;
+ pinctrl-1 = <&P8_11_gpio_pin>;
+ pinctrl-2 = <&P8_11_gpio_pu_pin>;
+ pinctrl-3 = <&P8_11_gpio_pd_pin>;
+ pinctrl-4 = <&P8_11_gpio_input_pin>;
+ pinctrl-5 = <&P8_11_qep_pin>;
+ pinctrl-6 = <&P8_11_pruout_pin>;
+ };
+
+ /* P8_12 (ZCZ ball T12) */
+ P8_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_12_default_pin>;
+ pinctrl-1 = <&P8_12_gpio_pin>;
+ pinctrl-2 = <&P8_12_gpio_pu_pin>;
+ pinctrl-3 = <&P8_12_gpio_pd_pin>;
+ pinctrl-4 = <&P8_12_gpio_input_pin>;
+ pinctrl-5 = <&P8_12_qep_pin>;
+ pinctrl-6 = <&P8_12_pruout_pin>;
+ };
+
+ /* P8_13 (ZCZ ball T10) */
+ P8_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_13_default_pin>;
+ pinctrl-1 = <&P8_13_gpio_pin>;
+ pinctrl-2 = <&P8_13_gpio_pu_pin>;
+ pinctrl-3 = <&P8_13_gpio_pd_pin>;
+ pinctrl-4 = <&P8_13_gpio_input_pin>;
+ pinctrl-5 = <&P8_13_pwm_pin>;
+ };
+
+ /* P8_14 (ZCZ ball T11) */
+ P8_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_14_default_pin>;
+ pinctrl-1 = <&P8_14_gpio_pin>;
+ pinctrl-2 = <&P8_14_gpio_pu_pin>;
+ pinctrl-3 = <&P8_14_gpio_pd_pin>;
+ pinctrl-4 = <&P8_14_gpio_input_pin>;
+ pinctrl-5 = <&P8_14_pwm_pin>;
+ };
+
+ /* P8_15 (ZCZ ball U13) */
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
+ pinctrl-0 = <&P8_15_default_pin>;
+ pinctrl-1 = <&P8_15_gpio_pin>;
+ pinctrl-2 = <&P8_15_gpio_pu_pin>;
+ pinctrl-3 = <&P8_15_gpio_pd_pin>;
+ pinctrl-4 = <&P8_15_gpio_input_pin>;
+ pinctrl-5 = <&P8_15_qep_pin>;
+ pinctrl-6 = <&P8_15_pru_ecap_pin>;
+ pinctrl-7 = <&P8_15_pruin_pin>;
+ };
+
+ /* P8_16 (ZCZ ball V13) */
+ P8_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
+ pinctrl-0 = <&P8_16_default_pin>;
+ pinctrl-1 = <&P8_16_gpio_pin>;
+ pinctrl-2 = <&P8_16_gpio_pu_pin>;
+ pinctrl-3 = <&P8_16_gpio_pd_pin>;
+ pinctrl-4 = <&P8_16_gpio_input_pin>;
+ pinctrl-5 = <&P8_16_qep_pin>;
+ pinctrl-6 = <&P8_16_pruin_pin>;
+ };
+
+ /* P8_17 (ZCZ ball U12) */
+ P8_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_17_default_pin>;
+ pinctrl-1 = <&P8_17_gpio_pin>;
+ pinctrl-2 = <&P8_17_gpio_pu_pin>;
+ pinctrl-3 = <&P8_17_gpio_pd_pin>;
+ pinctrl-4 = <&P8_17_gpio_input_pin>;
+ pinctrl-5 = <&P8_17_pwm_pin>;
+ };
+
+ /* P8_18 (ZCZ ball V12) */
+ P8_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_18_default_pin>;
+ pinctrl-1 = <&P8_18_gpio_pin>;
+ pinctrl-2 = <&P8_18_gpio_pu_pin>;
+ pinctrl-3 = <&P8_18_gpio_pd_pin>;
+ pinctrl-4 = <&P8_18_gpio_input_pin>;
+ };
+
+ /* P8_19 (ZCZ ball U10) */
+ P8_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_19_default_pin>;
+ pinctrl-1 = <&P8_19_gpio_pin>;
+ pinctrl-2 = <&P8_19_gpio_pu_pin>;
+ pinctrl-3 = <&P8_19_gpio_pd_pin>;
+ pinctrl-4 = <&P8_19_gpio_input_pin>;
+ pinctrl-5 = <&P8_19_pwm_pin>;
+ };
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_20_default_pin>;
+ pinctrl-1 = <&P8_20_gpio_pin>;
+ pinctrl-2 = <&P8_20_gpio_pu_pin>;
+ pinctrl-3 = <&P8_20_gpio_pd_pin>;
+ pinctrl-4 = <&P8_20_gpio_input_pin>;
+ pinctrl-5 = <&P8_20_pruout_pin>;
+ pinctrl-6 = <&P8_20_pruin_pin>;
+ };
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_21_default_pin>;
+ pinctrl-1 = <&P8_21_gpio_pin>;
+ pinctrl-2 = <&P8_21_gpio_pu_pin>;
+ pinctrl-3 = <&P8_21_gpio_pd_pin>;
+ pinctrl-4 = <&P8_21_gpio_input_pin>;
+ pinctrl-5 = <&P8_21_pruout_pin>;
+ pinctrl-6 = <&P8_21_pruin_pin>;
+ };
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_22_default_pin>;
+ pinctrl-1 = <&P8_22_gpio_pin>;
+ pinctrl-2 = <&P8_22_gpio_pu_pin>;
+ pinctrl-3 = <&P8_22_gpio_pd_pin>;
+ pinctrl-4 = <&P8_22_gpio_input_pin>;
+ };
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_23_default_pin>;
+ pinctrl-1 = <&P8_23_gpio_pin>;
+ pinctrl-2 = <&P8_23_gpio_pu_pin>;
+ pinctrl-3 = <&P8_23_gpio_pd_pin>;
+ pinctrl-4 = <&P8_23_gpio_input_pin>;
+ };
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_24_default_pin>;
+ pinctrl-1 = <&P8_24_gpio_pin>;
+ pinctrl-2 = <&P8_24_gpio_pu_pin>;
+ pinctrl-3 = <&P8_24_gpio_pd_pin>;
+ pinctrl-4 = <&P8_24_gpio_input_pin>;
+ };
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_25_default_pin>;
+ pinctrl-1 = <&P8_25_gpio_pin>;
+ pinctrl-2 = <&P8_25_gpio_pu_pin>;
+ pinctrl-3 = <&P8_25_gpio_pd_pin>;
+ pinctrl-4 = <&P8_25_gpio_input_pin>;
+ };
+
+ /* P8_26 (ZCZ ball V6) */
+ P8_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_26_default_pin>;
+ pinctrl-1 = <&P8_26_gpio_pin>;
+ pinctrl-2 = <&P8_26_gpio_pu_pin>;
+ pinctrl-3 = <&P8_26_gpio_pd_pin>;
+ pinctrl-4 = <&P8_26_gpio_input_pin>;
+ };
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_27_default_pin>;
+ pinctrl-1 = <&P8_27_gpio_pin>;
+ pinctrl-2 = <&P8_27_gpio_pu_pin>;
+ pinctrl-3 = <&P8_27_gpio_pd_pin>;
+ pinctrl-4 = <&P8_27_gpio_input_pin>;
+ pinctrl-5 = <&P8_27_pruout_pin>;
+ pinctrl-6 = <&P8_27_pruin_pin>;
+ };
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_28_default_pin>;
+ pinctrl-1 = <&P8_28_gpio_pin>;
+ pinctrl-2 = <&P8_28_gpio_pu_pin>;
+ pinctrl-3 = <&P8_28_gpio_pd_pin>;
+ pinctrl-4 = <&P8_28_gpio_input_pin>;
+ pinctrl-5 = <&P8_28_pruout_pin>;
+ pinctrl-6 = <&P8_28_pruin_pin>;
+ };
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_29_default_pin>;
+ pinctrl-1 = <&P8_29_gpio_pin>;
+ pinctrl-2 = <&P8_29_gpio_pu_pin>;
+ pinctrl-3 = <&P8_29_gpio_pd_pin>;
+ pinctrl-4 = <&P8_29_gpio_input_pin>;
+ pinctrl-5 = <&P8_29_pruout_pin>;
+ pinctrl-6 = <&P8_29_pruin_pin>;
+ };
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_30_default_pin>;
+ pinctrl-1 = <&P8_30_gpio_pin>;
+ pinctrl-2 = <&P8_30_gpio_pu_pin>;
+ pinctrl-3 = <&P8_30_gpio_pd_pin>;
+ pinctrl-4 = <&P8_30_gpio_input_pin>;
+ pinctrl-5 = <&P8_30_pruout_pin>;
+ pinctrl-6 = <&P8_30_pruin_pin>;
+ };
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "qep";
+ pinctrl-0 = <&P8_31_default_pin>;
+ pinctrl-1 = <&P8_31_gpio_pin>;
+ pinctrl-2 = <&P8_31_gpio_pu_pin>;
+ pinctrl-3 = <&P8_31_gpio_pd_pin>;
+ pinctrl-4 = <&P8_31_gpio_input_pin>;
+ pinctrl-5 = <&P8_31_uart_pin>;
+ pinctrl-6 = <&P8_31_qep_pin>;
+ };
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_32_default_pin>;
+ pinctrl-1 = <&P8_32_gpio_pin>;
+ pinctrl-2 = <&P8_32_gpio_pu_pin>;
+ pinctrl-3 = <&P8_32_gpio_pd_pin>;
+ pinctrl-4 = <&P8_32_gpio_input_pin>;
+ pinctrl-5 = <&P8_32_qep_pin>;
+ };
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_33_default_pin>;
+ pinctrl-1 = <&P8_33_gpio_pin>;
+ pinctrl-2 = <&P8_33_gpio_pu_pin>;
+ pinctrl-3 = <&P8_33_gpio_pd_pin>;
+ pinctrl-4 = <&P8_33_gpio_input_pin>;
+ pinctrl-5 = <&P8_33_qep_pin>;
+ };
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_34_default_pin>;
+ pinctrl-1 = <&P8_34_gpio_pin>;
+ pinctrl-2 = <&P8_34_gpio_pu_pin>;
+ pinctrl-3 = <&P8_34_gpio_pd_pin>;
+ pinctrl-4 = <&P8_34_gpio_input_pin>;
+ pinctrl-5 = <&P8_34_pwm_pin>;
+ };
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_35_default_pin>;
+ pinctrl-1 = <&P8_35_gpio_pin>;
+ pinctrl-2 = <&P8_35_gpio_pu_pin>;
+ pinctrl-3 = <&P8_35_gpio_pd_pin>;
+ pinctrl-4 = <&P8_35_gpio_input_pin>;
+ pinctrl-5 = <&P8_35_qep_pin>;
+ };
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_36_default_pin>;
+ pinctrl-1 = <&P8_36_gpio_pin>;
+ pinctrl-2 = <&P8_36_gpio_pu_pin>;
+ pinctrl-3 = <&P8_36_gpio_pd_pin>;
+ pinctrl-4 = <&P8_36_gpio_input_pin>;
+ pinctrl-5 = <&P8_36_pwm_pin>;
+ };
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_37_default_pin>;
+ pinctrl-1 = <&P8_37_gpio_pin>;
+ pinctrl-2 = <&P8_37_gpio_pu_pin>;
+ pinctrl-3 = <&P8_37_gpio_pd_pin>;
+ pinctrl-4 = <&P8_37_gpio_input_pin>;
+ pinctrl-5 = <&P8_37_uart_pin>;
+ pinctrl-6 = <&P8_37_pwm_pin>;
+ };
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_38_default_pin>;
+ pinctrl-1 = <&P8_38_gpio_pin>;
+ pinctrl-2 = <&P8_38_gpio_pu_pin>;
+ pinctrl-3 = <&P8_38_gpio_pd_pin>;
+ pinctrl-4 = <&P8_38_gpio_input_pin>;
+ pinctrl-5 = <&P8_38_uart_pin>;
+ pinctrl-6 = <&P8_38_pwm_pin>;
+ };
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_39_default_pin>;
+ pinctrl-1 = <&P8_39_gpio_pin>;
+ pinctrl-2 = <&P8_39_gpio_pu_pin>;
+ pinctrl-3 = <&P8_39_gpio_pd_pin>;
+ pinctrl-4 = <&P8_39_gpio_input_pin>;
+ pinctrl-5 = <&P8_39_qep_pin>;
+ pinctrl-6 = <&P8_39_pruout_pin>;
+ pinctrl-7 = <&P8_39_pruin_pin>;
+ };
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_40_default_pin>;
+ pinctrl-1 = <&P8_40_gpio_pin>;
+ pinctrl-2 = <&P8_40_gpio_pu_pin>;
+ pinctrl-3 = <&P8_40_gpio_pd_pin>;
+ pinctrl-4 = <&P8_40_gpio_input_pin>;
+ pinctrl-5 = <&P8_40_qep_pin>;
+ pinctrl-6 = <&P8_40_pruout_pin>;
+ pinctrl-7 = <&P8_40_pruin_pin>;
+ };
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_41_default_pin>;
+ pinctrl-1 = <&P8_41_gpio_pin>;
+ pinctrl-2 = <&P8_41_gpio_pu_pin>;
+ pinctrl-3 = <&P8_41_gpio_pd_pin>;
+ pinctrl-4 = <&P8_41_gpio_input_pin>;
+ pinctrl-5 = <&P8_41_qep_pin>;
+ pinctrl-6 = <&P8_41_pruout_pin>;
+ pinctrl-7 = <&P8_41_pruin_pin>;
+ };
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_42_default_pin>;
+ pinctrl-1 = <&P8_42_gpio_pin>;
+ pinctrl-2 = <&P8_42_gpio_pu_pin>;
+ pinctrl-3 = <&P8_42_gpio_pd_pin>;
+ pinctrl-4 = <&P8_42_gpio_input_pin>;
+ pinctrl-5 = <&P8_42_qep_pin>;
+ pinctrl-6 = <&P8_42_pruout_pin>;
+ pinctrl-7 = <&P8_42_pruin_pin>;
+ };
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_43_default_pin>;
+ pinctrl-1 = <&P8_43_gpio_pin>;
+ pinctrl-2 = <&P8_43_gpio_pu_pin>;
+ pinctrl-3 = <&P8_43_gpio_pd_pin>;
+ pinctrl-4 = <&P8_43_gpio_input_pin>;
+ pinctrl-5 = <&P8_43_pwm_pin>;
+ pinctrl-6 = <&P8_43_pruout_pin>;
+ pinctrl-7 = <&P8_43_pruin_pin>;
+ };
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_44_default_pin>;
+ pinctrl-1 = <&P8_44_gpio_pin>;
+ pinctrl-2 = <&P8_44_gpio_pu_pin>;
+ pinctrl-3 = <&P8_44_gpio_pd_pin>;
+ pinctrl-4 = <&P8_44_gpio_input_pin>;
+ pinctrl-5 = <&P8_44_pwm_pin>;
+ pinctrl-6 = <&P8_44_pruout_pin>;
+ pinctrl-7 = <&P8_44_pruin_pin>;
+ };
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_45_default_pin>;
+ pinctrl-1 = <&P8_45_gpio_pin>;
+ pinctrl-2 = <&P8_45_gpio_pu_pin>;
+ pinctrl-3 = <&P8_45_gpio_pd_pin>;
+ pinctrl-4 = <&P8_45_gpio_input_pin>;
+ pinctrl-5 = <&P8_45_pwm_pin>;
+ pinctrl-6 = <&P8_45_pruout_pin>;
+ pinctrl-7 = <&P8_45_pruin_pin>;
+ };
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_46_default_pin>;
+ pinctrl-1 = <&P8_46_gpio_pin>;
+ pinctrl-2 = <&P8_46_gpio_pu_pin>;
+ pinctrl-3 = <&P8_46_gpio_pd_pin>;
+ pinctrl-4 = <&P8_46_gpio_input_pin>;
+ pinctrl-5 = <&P8_46_pwm_pin>;
+ pinctrl-6 = <&P8_46_pruout_pin>;
+ pinctrl-7 = <&P8_46_pruin_pin>;
+ };
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) */
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_11_default_pin>;
+ pinctrl-1 = <&P9_11_gpio_pin>;
+ pinctrl-2 = <&P9_11_gpio_pu_pin>;
+ pinctrl-3 = <&P9_11_gpio_pd_pin>;
+ pinctrl-4 = <&P9_11_gpio_input_pin>;
+ pinctrl-5 = <&P9_11_uart_pin>;
+ };
+
+ /* P9_12 (ZCZ ball U18) */
+ P9_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_12_default_pin>;
+ pinctrl-1 = <&P9_12_gpio_pin>;
+ pinctrl-2 = <&P9_12_gpio_pu_pin>;
+ pinctrl-3 = <&P9_12_gpio_pd_pin>;
+ pinctrl-4 = <&P9_12_gpio_input_pin>;
+ };
+
+ /* P9_13 (ZCZ ball U17) */
+ P9_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_13_default_pin>;
+ pinctrl-1 = <&P9_13_gpio_pin>;
+ pinctrl-2 = <&P9_13_gpio_pu_pin>;
+ pinctrl-3 = <&P9_13_gpio_pd_pin>;
+ pinctrl-4 = <&P9_13_gpio_input_pin>;
+ pinctrl-5 = <&P9_13_uart_pin>;
+ };
+
+ /* P9_14 (ZCZ ball U14) */
+ P9_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_14_default_pin>;
+ pinctrl-1 = <&P9_14_gpio_pin>;
+ pinctrl-2 = <&P9_14_gpio_pu_pin>;
+ pinctrl-3 = <&P9_14_gpio_pd_pin>;
+ pinctrl-4 = <&P9_14_gpio_input_pin>;
+ pinctrl-5 = <&P9_14_pwm_pin>;
+ };
+
+ /* P9_15 (ZCZ ball R13) */
+ P9_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_15_default_pin>;
+ pinctrl-1 = <&P9_15_gpio_pin>;
+ pinctrl-2 = <&P9_15_gpio_pu_pin>;
+ pinctrl-3 = <&P9_15_gpio_pd_pin>;
+ pinctrl-4 = <&P9_15_gpio_input_pin>;
+ pinctrl-5 = <&P9_15_pwm_pin>;
+ };
+
+ /* P9_16 (ZCZ ball T14) */
+ P9_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_16_default_pin>;
+ pinctrl-1 = <&P9_16_gpio_pin>;
+ pinctrl-2 = <&P9_16_gpio_pu_pin>;
+ pinctrl-3 = <&P9_16_gpio_pd_pin>;
+ pinctrl-4 = <&P9_16_gpio_input_pin>;
+ pinctrl-5 = <&P9_16_pwm_pin>;
+ };
+
+ /* P9_17 (ZCZ ball A16) */
+ P9_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_17_default_pin>;
+ pinctrl-1 = <&P9_17_gpio_pin>;
+ pinctrl-2 = <&P9_17_gpio_pu_pin>;
+ pinctrl-3 = <&P9_17_gpio_pd_pin>;
+ pinctrl-4 = <&P9_17_gpio_input_pin>;
+ pinctrl-5 = <&P9_17_spi_cs_pin>;
+ pinctrl-6 = <&P9_17_i2c_pin>;
+ pinctrl-7 = <&P9_17_pwm_pin>;
+ pinctrl-8 = <&P9_17_pru_uart_pin>;
+ };
+
+ /* P9_18 (ZCZ ball B16) */
+ P9_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_18_default_pin>;
+ pinctrl-1 = <&P9_18_gpio_pin>;
+ pinctrl-2 = <&P9_18_gpio_pu_pin>;
+ pinctrl-3 = <&P9_18_gpio_pd_pin>;
+ pinctrl-4 = <&P9_18_gpio_input_pin>;
+ pinctrl-5 = <&P9_18_spi_pin>;
+ pinctrl-6 = <&P9_18_i2c_pin>;
+ pinctrl-7 = <&P9_18_pwm_pin>;
+ pinctrl-8 = <&P9_18_pru_uart_pin>;
+ };
+
+ /* P9_19 (ZCZ ball D17) i2c */
+ P9_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_19_default_pin>;
+ pinctrl-1 = <&P9_19_gpio_pin>;
+ pinctrl-2 = <&P9_19_gpio_pu_pin>;
+ pinctrl-3 = <&P9_19_gpio_pd_pin>;
+ pinctrl-4 = <&P9_19_gpio_input_pin>;
+ pinctrl-5 = <&P9_19_spi_cs_pin>;
+ pinctrl-6 = <&P9_19_can_pin>;
+ pinctrl-7 = <&P9_19_i2c_pin>;
+ pinctrl-8 = <&P9_19_pru_uart_pin>;
+ pinctrl-9 = <&P9_19_timer_pin>;
+ };
+
+ /* P9_20 (ZCZ ball D18) i2c */
+ P9_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_20_default_pin>;
+ pinctrl-1 = <&P9_20_gpio_pin>;
+ pinctrl-2 = <&P9_20_gpio_pu_pin>;
+ pinctrl-3 = <&P9_20_gpio_pd_pin>;
+ pinctrl-4 = <&P9_20_gpio_input_pin>;
+ pinctrl-5 = <&P9_20_spi_cs_pin>;
+ pinctrl-6 = <&P9_20_can_pin>;
+ pinctrl-7 = <&P9_20_i2c_pin>;
+ pinctrl-8 = <&P9_20_pru_uart_pin>;
+ pinctrl-9 = <&P9_20_timer_pin>;
+ };
+
+ /* P9_21 (ZCZ ball B17) */
+ P9_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_21_default_pin>;
+ pinctrl-1 = <&P9_21_gpio_pin>;
+ pinctrl-2 = <&P9_21_gpio_pu_pin>;
+ pinctrl-3 = <&P9_21_gpio_pd_pin>;
+ pinctrl-4 = <&P9_21_gpio_input_pin>;
+ pinctrl-5 = <&P9_21_spi_pin>;
+ pinctrl-6 = <&P9_21_uart_pin>;
+ pinctrl-7 = <&P9_21_i2c_pin>;
+ pinctrl-8 = <&P9_21_pwm_pin>;
+ pinctrl-9 = <&P9_21_pru_uart_pin>;
+ };
+
+ /* P9_22 (ZCZ ball A17) */
+ P9_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_22_default_pin>;
+ pinctrl-1 = <&P9_22_gpio_pin>;
+ pinctrl-2 = <&P9_22_gpio_pu_pin>;
+ pinctrl-3 = <&P9_22_gpio_pd_pin>;
+ pinctrl-4 = <&P9_22_gpio_input_pin>;
+ pinctrl-5 = <&P9_22_spi_sclk_pin>;
+ pinctrl-6 = <&P9_22_uart_pin>;
+ pinctrl-7 = <&P9_22_i2c_pin>;
+ pinctrl-8 = <&P9_22_pwm_pin>;
+ pinctrl-9 = <&P9_22_pru_uart_pin>;
+ };
+
+ /* P9_23 (ZCZ ball V14) */
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_gpio_input_pin>;
+ pinctrl-5 = <&P9_23_pwm_pin>;
+ };
+
+ /* P9_24 (ZCZ ball D15) */
+ P9_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_24_default_pin>;
+ pinctrl-1 = <&P9_24_gpio_pin>;
+ pinctrl-2 = <&P9_24_gpio_pu_pin>;
+ pinctrl-3 = <&P9_24_gpio_pd_pin>;
+ pinctrl-4 = <&P9_24_gpio_input_pin>;
+ pinctrl-5 = <&P9_24_uart_pin>;
+ pinctrl-6 = <&P9_24_can_pin>;
+ pinctrl-7 = <&P9_24_i2c_pin>;
+ pinctrl-8 = <&P9_24_pru_uart_pin>;
+ pinctrl-9 = <&P9_24_pruin_pin>;
+ };
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_25_default_pin>;
+ pinctrl-1 = <&P9_25_gpio_pin>;
+ pinctrl-2 = <&P9_25_gpio_pu_pin>;
+ pinctrl-3 = <&P9_25_gpio_pd_pin>;
+ pinctrl-4 = <&P9_25_gpio_input_pin>;
+ pinctrl-5 = <&P9_25_qep_pin>;
+ pinctrl-6 = <&P9_25_pruout_pin>;
+ pinctrl-7 = <&P9_25_pruin_pin>;
+ };
+
+ /* P9_26 (ZCZ ball D16) */
+ P9_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_26_default_pin>;
+ pinctrl-1 = <&P9_26_gpio_pin>;
+ pinctrl-2 = <&P9_26_gpio_pu_pin>;
+ pinctrl-3 = <&P9_26_gpio_pd_pin>;
+ pinctrl-4 = <&P9_26_gpio_input_pin>;
+ pinctrl-5 = <&P9_26_uart_pin>;
+ pinctrl-6 = <&P9_26_can_pin>;
+ pinctrl-7 = <&P9_26_i2c_pin>;
+ pinctrl-8 = <&P9_26_pru_uart_pin>;
+ pinctrl-9 = <&P9_26_pruin_pin>;
+ };
+
+ /* P9_27 (ZCZ ball C13) */
+ P9_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_27_default_pin>;
+ pinctrl-1 = <&P9_27_gpio_pin>;
+ pinctrl-2 = <&P9_27_gpio_pu_pin>;
+ pinctrl-3 = <&P9_27_gpio_pd_pin>;
+ pinctrl-4 = <&P9_27_gpio_input_pin>;
+ pinctrl-5 = <&P9_27_qep_pin>;
+ pinctrl-6 = <&P9_27_pruout_pin>;
+ pinctrl-7 = <&P9_27_pruin_pin>;
+ };
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pwm2", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_gpio_input_pin>;
+ pinctrl-5 = <&P9_28_spi_cs_pin>;
+ pinctrl-6 = <&P9_28_pwm_pin>;
+ pinctrl-7 = <&P9_28_pwm2_pin>;
+ pinctrl-8 = <&P9_28_pruout_pin>;
+ pinctrl-9 = <&P9_28_pruin_pin>;
+ };
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_29_default_pin>;
+ pinctrl-1 = <&P9_29_gpio_pin>;
+ pinctrl-2 = <&P9_29_gpio_pu_pin>;
+ pinctrl-3 = <&P9_29_gpio_pd_pin>;
+ pinctrl-4 = <&P9_29_gpio_input_pin>;
+ pinctrl-5 = <&P9_29_spi_pin>;
+ pinctrl-6 = <&P9_29_pwm_pin>;
+ pinctrl-7 = <&P9_29_pruout_pin>;
+ pinctrl-8 = <&P9_29_pruin_pin>;
+ };
+
+ /* P9_30 (ZCZ ball D12) */
+ P9_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_30_default_pin>;
+ pinctrl-1 = <&P9_30_gpio_pin>;
+ pinctrl-2 = <&P9_30_gpio_pu_pin>;
+ pinctrl-3 = <&P9_30_gpio_pd_pin>;
+ pinctrl-4 = <&P9_30_gpio_input_pin>;
+ pinctrl-5 = <&P9_30_spi_pin>;
+ pinctrl-6 = <&P9_30_pwm_pin>;
+ pinctrl-7 = <&P9_30_pruout_pin>;
+ pinctrl-8 = <&P9_30_pruin_pin>;
+ };
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_31_default_pin>;
+ pinctrl-1 = <&P9_31_gpio_pin>;
+ pinctrl-2 = <&P9_31_gpio_pu_pin>;
+ pinctrl-3 = <&P9_31_gpio_pd_pin>;
+ pinctrl-4 = <&P9_31_gpio_input_pin>;
+ pinctrl-5 = <&P9_31_spi_sclk_pin>;
+ pinctrl-6 = <&P9_31_pwm_pin>;
+ pinctrl-7 = <&P9_31_pruout_pin>;
+ pinctrl-8 = <&P9_31_pruin_pin>;
+ };
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) */
+ P9_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer", "pruin";
+ pinctrl-0 = <&P9_41_default_pin>;
+ pinctrl-1 = <&P9_41_gpio_pin>;
+ pinctrl-2 = <&P9_41_gpio_pu_pin>;
+ pinctrl-3 = <&P9_41_gpio_pd_pin>;
+ pinctrl-4 = <&P9_41_gpio_input_pin>;
+ pinctrl-5 = <&P9_41_timer_pin>;
+ pinctrl-6 = <&P9_41_pruin_pin>;
+ };
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) */
+ P9_91_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_91_default_pin>;
+ pinctrl-1 = <&P9_91_gpio_pin>;
+ pinctrl-2 = <&P9_91_gpio_pu_pin>;
+ pinctrl-3 = <&P9_91_gpio_pd_pin>;
+ pinctrl-4 = <&P9_91_gpio_input_pin>;
+ pinctrl-5 = <&P9_91_qep_pin>;
+ pinctrl-6 = <&P9_91_pruout_pin>;
+ pinctrl-7 = <&P9_91_pruin_pin>;
+ };
+
+ /* P9_42 (ZCZ ball C18) */
+ P9_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
+ pinctrl-0 = <&P9_42_default_pin>;
+ pinctrl-1 = <&P9_42_gpio_pin>;
+ pinctrl-2 = <&P9_42_gpio_pu_pin>;
+ pinctrl-3 = <&P9_42_gpio_pd_pin>;
+ pinctrl-4 = <&P9_42_gpio_input_pin>;
+ pinctrl-5 = <&P9_42_spi_cs_pin>;
+ pinctrl-6 = <&P9_42_spi_sclk_pin>;
+ pinctrl-7 = <&P9_42_uart_pin>;
+ pinctrl-8 = <&P9_42_pwm_pin>;
+ pinctrl-9 = <&P9_42_pru_ecap_pin>;
+ };
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) */
+ P9_92_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_92_default_pin>;
+ pinctrl-1 = <&P9_92_gpio_pin>;
+ pinctrl-2 = <&P9_92_gpio_pu_pin>;
+ pinctrl-3 = <&P9_92_gpio_pd_pin>;
+ pinctrl-4 = <&P9_92_gpio_input_pin>;
+ pinctrl-5 = <&P9_92_qep_pin>;
+ pinctrl-6 = <&P9_92_pruout_pin>;
+ pinctrl-7 = <&P9_92_pruin_pin>;
+ };
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P8_03 {
+ gpio-name = "P8_03";
+ gpio = <&gpio1 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_04 {
+ gpio-name = "P8_04";
+ gpio = <&gpio1 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_05 {
+ gpio-name = "P8_05";
+ gpio = <&gpio1 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_06 {
+ gpio-name = "P8_06";
+ gpio = <&gpio1 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_07 {
+ gpio-name = "P8_07";
+ gpio = <&gpio2 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_08 {
+ gpio-name = "P8_08";
+ gpio = <&gpio2 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_09 {
+ gpio-name = "P8_09";
+ gpio = <&gpio2 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_10 {
+ gpio-name = "P8_10";
+ gpio = <&gpio2 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_11 {
+ gpio-name = "P8_11";
+ gpio = <&gpio1 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_12 {
+ gpio-name = "P8_12";
+ gpio = <&gpio1 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_13 {
+ gpio-name = "P8_13";
+ gpio = <&gpio0 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_14 {
+ gpio-name = "P8_14";
+ gpio = <&gpio0 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_15 {
+ gpio-name = "P8_15";
+ gpio = <&gpio1 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_16 {
+ gpio-name = "P8_16";
+ gpio = <&gpio1 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_17 {
+ gpio-name = "P8_17";
+ gpio = <&gpio0 27 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_18 {
+ gpio-name = "P8_18";
+ gpio = <&gpio2 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_19 {
+ gpio-name = "P8_19";
+ gpio = <&gpio0 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_20 {
+ gpio-name = "P8_20";
+ gpio = <&gpio1 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_21 {
+ gpio-name = "P8_21";
+ gpio = <&gpio1 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_22 {
+ gpio-name = "P8_22";
+ gpio = <&gpio1 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_23 {
+ gpio-name = "P8_23";
+ gpio = <&gpio1 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_24 {
+ gpio-name = "P8_24";
+ gpio = <&gpio1 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_25 {
+ gpio-name = "P8_25";
+ gpio = <&gpio1 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_26 {
+ gpio-name = "P8_26";
+ gpio = <&gpio1 29 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_27 {
+ gpio-name = "P8_27";
+ gpio = <&gpio2 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_28 {
+ gpio-name = "P8_28";
+ gpio = <&gpio2 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_29 {
+ gpio-name = "P8_29";
+ gpio = <&gpio2 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_30 {
+ gpio-name = "P8_30";
+ gpio = <&gpio2 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_31 {
+ gpio-name = "P8_31";
+ gpio = <&gpio0 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_32 {
+ gpio-name = "P8_32";
+ gpio = <&gpio0 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_33 {
+ gpio-name = "P8_33";
+ gpio = <&gpio0 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_34 {
+ gpio-name = "P8_34";
+ gpio = <&gpio2 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_35 {
+ gpio-name = "P8_35";
+ gpio = <&gpio0 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_36 {
+ gpio-name = "P8_36";
+ gpio = <&gpio2 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_37 {
+ gpio-name = "P8_37";
+ gpio = <&gpio2 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_38 {
+ gpio-name = "P8_38";
+ gpio = <&gpio2 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_39 {
+ gpio-name = "P8_39";
+ gpio = <&gpio2 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_40 {
+ gpio-name = "P8_40";
+ gpio = <&gpio2 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_41 {
+ gpio-name = "P8_41";
+ gpio = <&gpio2 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_42 {
+ gpio-name = "P8_42";
+ gpio = <&gpio2 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_43 {
+ gpio-name = "P8_43";
+ gpio = <&gpio2 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_44 {
+ gpio-name = "P8_44";
+ gpio = <&gpio2 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_45 {
+ gpio-name = "P8_45";
+ gpio = <&gpio2 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_46 {
+ gpio-name = "P8_46";
+ gpio = <&gpio2 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_11 {
+ gpio-name = "P9_11";
+ gpio = <&gpio0 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_12 {
+ gpio-name = "P9_12";
+ gpio = <&gpio1 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_13 {
+ gpio-name = "P9_13";
+ gpio = <&gpio0 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_14 {
+ gpio-name = "P9_14";
+ gpio = <&gpio1 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_15 {
+ gpio-name = "P9_15";
+ gpio = <&gpio1 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_16 {
+ gpio-name = "P9_16";
+ gpio = <&gpio1 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_17 {
+ gpio-name = "P9_17";
+ gpio = <&gpio0 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_18 {
+ gpio-name = "P9_18";
+ gpio = <&gpio0 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_19 {
+ gpio-name = "P9_19";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_20 {
+ gpio-name = "P9_20";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_21 {
+ gpio-name = "P9_21";
+ gpio = <&gpio0 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_22 {
+ gpio-name = "P9_22";
+ gpio = <&gpio0 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_23 {
+ gpio-name = "P9_23";
+ gpio = <&gpio1 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_24 {
+ gpio-name = "P9_24";
+ gpio = <&gpio0 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_25 {
+ gpio-name = "P9_25";
+ gpio = <&gpio3 21 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_26 {
+ gpio-name = "P9_26";
+ gpio = <&gpio0 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_27 {
+ gpio-name = "P9_27";
+ gpio = <&gpio3 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_28 {
+ gpio-name = "P9_28";
+ gpio = <&gpio3 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_29 {
+ gpio-name = "P9_29";
+ gpio = <&gpio3 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_30 {
+ gpio-name = "P9_30";
+ gpio = <&gpio3 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_31 {
+ gpio-name = "P9_31";
+ gpio = <&gpio3 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_41 {
+ gpio-name = "P9_41";
+ gpio = <&gpio0 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_91 {
+ gpio-name = "P9_91";
+ gpio = <&gpio3 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_42 {
+ gpio-name = "P9_42";
+ gpio = <&gpio0 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_92 {
+ gpio-name = "P9_92";
+ gpio = <&gpio3 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
+};
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 73b514d..c0ca520 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -29,14 +29,14 @@
compatible = "gpio-leds";
led2 {
- label = "beaglebone:green:heartbeat";
+ label = "beaglebone:green:usr0";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led3 {
- label = "beaglebone:green:mmc0";
+ label = "beaglebone:green:usr1";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
@@ -66,9 +66,6 @@
};
&am33xx_pinmux {
- pinctrl-names = "default";
- pinctrl-0 = <&clkout2_pin>;
-
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
@@ -85,12 +82,12 @@
>;
};
- i2c2_pins: pinmux_i2c2_pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
- AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
- >;
- };
+// i2c2_pins: pinmux_i2c2_pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
+// AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
+// >;
+// };
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
@@ -99,15 +96,11 @@
>;
};
- clkout2_pin: pinmux_clkout2_pin {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
- >;
- };
-
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
+ 0x108 (PIN_INPUT | MUX_MODE0) /* mii1_col.mii1_col */
+ 0x10c (PIN_INPUT | MUX_MODE0) /* mii1_crs.mii1_crs */
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
@@ -127,6 +120,8 @@
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
+ 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
@@ -185,6 +180,50 @@
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
+
+ /* P9_19 (ZCZ ball D17) i2c2_scl */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
+ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P9_20 (ZCZ ball D18) i2c2_sda */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
+ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
};
&uart0 {
@@ -251,7 +290,8 @@
&i2c2 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
+ //pinctrl-0 = <&i2c2_pins>;
+ pinctrl-0 = <>;
status = "okay";
clock-frequency = <100000>;
@@ -417,4 +457,64 @@
&rtc {
clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
+ system-power-controller;
+};
+
+&ocp {
+ /* P9_19 (ZCZ ball D17) i2c */
+ P9_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_19_default_pin>;
+ pinctrl-1 = <&P9_19_gpio_pin>;
+ pinctrl-2 = <&P9_19_gpio_pu_pin>;
+ pinctrl-3 = <&P9_19_gpio_pd_pin>;
+ pinctrl-4 = <&P9_19_gpio_input_pin>;
+ pinctrl-5 = <&P9_19_spi_cs_pin>;
+ pinctrl-6 = <&P9_19_can_pin>;
+ pinctrl-7 = <&P9_19_i2c_pin>;
+ pinctrl-8 = <&P9_19_pru_uart_pin>;
+ pinctrl-9 = <&P9_19_timer_pin>;
+ };
+
+ /* P9_20 (ZCZ ball D18) i2c */
+ P9_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_20_default_pin>;
+ pinctrl-1 = <&P9_20_gpio_pin>;
+ pinctrl-2 = <&P9_20_gpio_pu_pin>;
+ pinctrl-3 = <&P9_20_gpio_pd_pin>;
+ pinctrl-4 = <&P9_20_gpio_input_pin>;
+ pinctrl-5 = <&P9_20_spi_cs_pin>;
+ pinctrl-6 = <&P9_20_can_pin>;
+ pinctrl-7 = <&P9_20_i2c_pin>;
+ pinctrl-8 = <&P9_20_pru_uart_pin>;
+ pinctrl-9 = <&P9_20_timer_pin>;
+ };
+
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P9_19 {
+ gpio-name = "P9_19";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_20 {
+ gpio-name = "P9_20";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
};
diff --git b/arch/arm/boot/dts/am335x-bone-emmc-in-reset.dtsi b/arch/arm/boot/dts/am335x-bone-emmc-in-reset.dtsi
new file mode 100644
index 0000000..7d8f673
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-emmc-in-reset.dtsi
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* standard */
+
+&gpio1 {
+ emmc_rst {
+ gpio-hog;
+ gpios = <20 0>;
+ output-high;
+ line-name = "EMMC ResetN";
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bone-jtag.dtsi b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
new file mode 100644
index 0000000..603ef0a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
@@ -0,0 +1,20 @@
+/*
+ * Device Tree Source for bone jtag
+ *
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&clkout2_pin>;
+
+ clkout2_pin: pinmux_clkout2_pin {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+ >;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-can0.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-can0.dtsi
new file mode 100644
index 0000000..0961216
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-can0.dtsi
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-can0.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_19_pinmux {
+ * mode = "can";
+ * };
+ * P9_20_pinmux {
+ * mode = "can";
+ * };
+ *};
+ *
+ *&dcan0 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ dcan0_pins: pinmux_dcan0_pins {
+ pinctrl-single,pins = <
+ /* P9_20: uart1_ctsn.d_can0_tx */
+ BONE_P9_20 (PIN_OUTPUT_PULLUP | MUX_MODE2)
+ /* P9_19: uart1_rtsn.d_can0_rx */
+ BONE_P9_19 (PIN_INPUT_PULLUP | MUX_MODE2)
+ >;
+ };
+};
+
+&dcan0 {
+ pinctrl-0 = <&dcan0_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-can1.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-can1.dtsi
new file mode 100644
index 0000000..9e26413
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-can1.dtsi
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-can1.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_24_pinmux {
+ * mode = "can";
+ * };
+ * P9_26_pinmux {
+ * mode = "can";
+ * };
+ *};
+ *
+ *&dcan1 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ dcan1_pins: pinmux_dcan1_pins {
+ pinctrl-single,pins = <
+ /* P9_26: uart1_rxd.d_can1_tx */
+ BONE_P9_26 (PIN_OUTPUT_PULLUP | MUX_MODE2)
+ /* P9_24: uart1_txd.d_can1_rx */
+ BONE_P9_24 (PIN_INPUT_PULLUP | MUX_MODE2)
+ >;
+ };
+};
+
+&dcan1 {
+ pinctrl-0 = <&dcan1_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-emmc.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-emmc.dtsi
new file mode 100644
index 0000000..22cf462
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-emmc.dtsi
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Testing */
+/* lsblk */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-emmc.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P8_21_pinmux {
+ * state = "disabled";
+ * };
+ * P8_20_pinmux {
+ * state = "disabled";
+ * };
+ * P8_25_pinmux {
+ * state = "disabled";
+ * };
+ * P8_24_pinmux {
+ * state = "disabled";
+ * };
+ * P8_05_pinmux {
+ * state = "disabled";
+ * };
+ * P8_06_pinmux {
+ * state = "disabled";
+ * };
+ * P8_23_pinmux {
+ * state = "disabled";
+ * };
+ * P8_22_pinmux {
+ * state = "disabled";
+ * };
+ * P8_03_pinmux {
+ * state = "disabled";
+ * };
+ * P8_04_pinmux {
+ * state = "disabled";
+ * };
+ *};
+ *
+ *&mmc2 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ emmc_pins: pinmux_emmc_pins {
+ pinctrl-single,pins = <
+ /* P8_21: gpmc_csn1.mmc1_clk */
+ BONE_P8_21 (PIN_INPUT_PULLUP | MUX_MODE2)
+ /* P8_20: gpmc_csn2.mmc1_cmd */
+ BONE_P8_20 (PIN_INPUT_PULLUP | MUX_MODE2)
+ /* P8_25: gpmc_ad0.mmc1_dat0 */
+ BONE_P8_25 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_24: gpmc_ad1.mmc1_dat1 */
+ BONE_P8_24 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_05: gpmc_ad2.mmc1_dat2 */
+ BONE_P8_05 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_06: gpmc_ad3.mmc1_dat3 */
+ BONE_P8_06 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_23: gpmc_ad4.mmc1_dat4 */
+ BONE_P8_23 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_22: gpmc_ad5.mmc1_dat5 */
+ BONE_P8_22 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_03: gpmc_ad6.mmc1_dat6 */
+ BONE_P8_03 (PIN_INPUT_PULLUP | MUX_MODE1)
+ /* P8_04: gpmc_ad7.mmc1_dat7 */
+ BONE_P8_04 (PIN_INPUT_PULLUP | MUX_MODE1)
+ >;
+ };
+};
+
+&mmc2 {
+ pinctrl-0 = <&emmc_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-i2c2.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-i2c2.dtsi
new file mode 100644
index 0000000..abf3b57
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-i2c2.dtsi
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-i2c2.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_19_pinmux {
+ * mode = "i2c";
+ * };
+ * P9_20_pinmux {
+ * mode = "i2c";
+ * };
+ *};
+ *
+ *&dcan0 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ /* P9_20: uart1_ctsn.i2c2_sda */
+ BONE_P9_20 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3)
+ /* P9_19: uart1_rtsn.i2c2_scl */
+ BONE_P9_19 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3)
+ >;
+ };
+};
+
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-nxp-hdmi.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-nxp-hdmi.dtsi
new file mode 100644
index 0000000..5205fa0
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-nxp-hdmi.dtsi
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "am335x-peripheral-nxp-hdmi.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P8_27_pinmux {
+ * state = "disabled";
+ * };
+ * P8_28_pinmux {
+ * state = "disabled";
+ * };
+ * P8_29_pinmux {
+ * state = "disabled";
+ * };
+ * P8_30_pinmux {
+ * state = "disabled";
+ * };
+ * P8_31_pinmux {
+ * state = "disabled";
+ * };
+ * P8_32_pinmux {
+ * state = "disabled";
+ * };
+ * P8_33_pinmux {
+ * state = "disabled";
+ * };
+ * P8_34_pinmux {
+ * state = "disabled";
+ * };
+ * P8_35_pinmux {
+ * state = "disabled";
+ * };
+ * P8_36_pinmux {
+ * state = "disabled";
+ * };
+ * P8_37_pinmux {
+ * state = "disabled";
+ * };
+ * P8_38_pinmux {
+ * state = "disabled";
+ * };
+ * P8_39_pinmux {
+ * state = "disabled";
+ * };
+ * P8_40_pinmux {
+ * state = "disabled";
+ * };
+ * P8_41_pinmux {
+ * state = "disabled";
+ * };
+ * P8_42_pinmux {
+ * state = "disabled";
+ * };
+ * P8_43_pinmux {
+ * state = "disabled";
+ * };
+ * P8_44_pinmux {
+ * state = "disabled";
+ * };
+ * P8_45_pinmux {
+ * state = "disabled";
+ * };
+ * P8_46_pinmux {
+ * state = "disabled";
+ * };
+ *};
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+ AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
+ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
+ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
+ AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
+ AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
+ AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
+ AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
+ AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
+ AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
+ AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
+ AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
+ AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
+ AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
+ AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
+ AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
+ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
+ AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
+ AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
+ AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
+ AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
+ >;
+ };
+
+ nxp_hdmi_off_pins: nxp_hdmi_off_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+ >;
+ };
+};
+
+&i2c0 {
+ tda19988 {
+ pinctrl-names = "default", "off";
+ pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+ pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-panel-1024x600-24bit.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-panel-1024x600-24bit.dtsi
new file mode 100644
index 0000000..65e5fbb
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-panel-1024x600-24bit.dtsi
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-panel-1024x600-24bit.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P8_27_pinmux {
+ * state = "disabled";
+ * };
+ * P8_28_pinmux {
+ * state = "disabled";
+ * };
+ * P8_29_pinmux {
+ * state = "disabled";
+ * };
+ * P8_30_pinmux {
+ * state = "disabled";
+ * };
+ * P8_31_pinmux {
+ * state = "disabled";
+ * };
+ * P8_32_pinmux {
+ * state = "disabled";
+ * };
+ * P8_33_pinmux {
+ * state = "disabled";
+ * };
+ * P8_34_pinmux {
+ * state = "disabled";
+ * };
+ * P8_35_pinmux {
+ * state = "disabled";
+ * };
+ * P8_36_pinmux {
+ * state = "disabled";
+ * };
+ * P8_37_pinmux {
+ * state = "disabled";
+ * };
+ * P8_38_pinmux {
+ * state = "disabled";
+ * };
+ * P8_39_pinmux {
+ * state = "disabled";
+ * };
+ * P8_40_pinmux {
+ * state = "disabled";
+ * };
+ * P8_41_pinmux {
+ * state = "disabled";
+ * };
+ * P8_42_pinmux {
+ * state = "disabled";
+ * };
+ * P8_43_pinmux {
+ * state = "disabled";
+ * };
+ * P8_44_pinmux {
+ * state = "disabled";
+ * };
+ * P8_45_pinmux {
+ * state = "disabled";
+ * };
+ * P8_46_pinmux {
+ * state = "disabled";
+ * };
+ *};
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ lcd_24bit_pins: pinmux_lcd_24bit_pins {
+ pinctrl-single,pins = <
+
+ /* P8_45: lcd_data0.lcd_data0 */
+ BONE_P8_45 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_46: lcd_data1.lcd_data1 */
+ BONE_P8_46 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_43: lcd_data2.lcd_data2 */
+ BONE_P8_43 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_44: lcd_data3.lcd_data3 */
+ BONE_P8_44 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_41: lcd_data4.lcd_data4 */
+ BONE_P8_41 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_42: lcd_data5.lcd_data5 */
+ BONE_P8_42 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_39: lcd_data6.lcd_data6 */
+ BONE_P8_39 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_40: lcd_data7.lcd_data7 */
+ BONE_P8_40 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_37: lcd_data8.lcd_data8 */
+ BONE_P8_37 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_38: lcd_data9.lcd_data9 */
+ BONE_P8_38 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_36: lcd_data10.lcd_data10 */
+ BONE_P8_36 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_34: lcd_data11.lcd_data11 */
+ BONE_P8_34 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_35: lcd_data12.lcd_data12 */
+ BONE_P8_35 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_33: lcd_data13.lcd_data13 */
+ BONE_P8_33 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_31: lcd_data14.lcd_data14 */
+ BONE_P8_31 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_32: lcd_data15.lcd_data15 */
+ BONE_P8_32 (PIN_OUTPUT | MUX_MODE0)
+
+ /* gpmc_ad15.lcd_data16 */
+ BONE_P8_15 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad14.lcd_data17 */
+ BONE_P8_16 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad13.lcd_data18 */
+ BONE_P8_11 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad12.lcd_data19 */
+ BONE_P8_12 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad11.lcd_data20 */
+ BONE_P8_17 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad10.lcd_data21 */
+ BONE_P8_14 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad9.lcd_data22 */
+ BONE_P8_13 (PIN_OUTPUT | MUX_MODE1)
+ /* gpmc_ad8.lcd_data23 */
+ BONE_P8_19 (PIN_OUTPUT | MUX_MODE1)
+
+ /* P8_27: lcd_vsync.lcd_vsync */
+ BONE_P8_27 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_29: lcd_hsync.lcd_hsync */
+ BONE_P8_29 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_28: lcd_pclk.lcd_pclk*/
+ BONE_P8_28 (PIN_OUTPUT | MUX_MODE0)
+ /* P8_30: lcd_ac_bias_en.lcd_ac_bias_en */
+ BONE_P8_30 (PIN_OUTPUT | MUX_MODE0)
+ >;
+ };
+};
+
+/ {
+ panel {
+ pinctrl-0 = <&lcd_24bit_pins>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-spi0.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-spi0.dtsi
new file mode 100644
index 0000000..354e66a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-spi0.dtsi
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-spi0.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_17_pinmux {
+ * status = "disabled";
+ * };
+ * P9_18_pinmux {
+ * status = "disabled";
+ * };
+ * P9_21_pinmux {
+ * status = "disabled";
+ * };
+ * P9_22_pinmux {
+ * status = "disabled";
+ * };
+ *};
+ *
+ *&spi0 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ spi0_pins: pinmux_spi0_pins {
+ pinctrl-single,pins = <
+ 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
+ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
+ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
+ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
+ >;
+ };
+};
+
+&spi0 {
+ pinctrl-0 = <&spi0_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-spi1.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-spi1.dtsi
new file mode 100644
index 0000000..bff7f8d
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-spi1.dtsi
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-spi1.dtsi"
+
+/* standard */
+
+&am33xx_pinmux {
+ spi1_pins: pinmux_spi1_pins {
+ pinctrl-single,pins = <
+ 0x190 0x33 /* mcasp0_aclkx.spi1_sclk, INPUT_PULLUP | MODE3 */
+ 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
+ 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
+ 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
+ // 0x164 0x12 /* eCAP0_in_PWM0_out.spi1_cs1 OUTPUT_PULLUP | MODE2 */ >;
+ };
+};
+
+&spi1 {
+ pinctrl-0 = <&spi1_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-spi1a.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-spi1a.dtsi
new file mode 100644
index 0000000..62874c8
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-spi1a.dtsi
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-spi1.dtsi"
+
+/* standard */
+
+&am33xx_pinmux {
+ spi1a_pins: pinmux_spi1a_pins {
+ pinctrl-single,pins = <
+ 0x164 0x34 /* eCAP0_in_PWM0_out.spi1_sclk, INPUT_PULLUP | MODE4 */
+ /* NOTE: P9.42 is connected to two pads */
+ // 0x1A0 0x27 /* set the other pad to gpio input */
+ 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
+ 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
+ 0x178 0x14 /* uart1_ctsn.spi1_cs0, OUTPUT_PULLUP | MODE4 */ >;
+ };
+};
+
+&spi1 {
+ pinctrl-0 = <&spi1a_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS1.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS1.dtsi
new file mode 100644
index 0000000..ae5b813
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS1.dtsi
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Testing */
+/* sudo /sbin/getty -L ttyS1 115200 vt102 */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-ttyS1.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_24_pinmux {
+ * mode = "uart";
+ * };
+ * P9_26_pinmux {
+ * mode = "uart";
+ * };
+ *};
+ *
+ *&uart1 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ /* P9_24: uart1_txd.uart1_txd */
+ BONE_P9_24 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+ /* P9_26: uart1_rxd.uart1_rxd */
+ BONE_P9_26 (PIN_INPUT_PULLUP | MUX_MODE0)
+ >;
+ };
+};
+
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS2.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS2.dtsi
new file mode 100644
index 0000000..5fa593a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS2.dtsi
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Testing */
+/* sudo /sbin/getty -L ttyS2 115200 vt102 */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-ttyS2.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_21_pinmux {
+ * mode = "uart";
+ * };
+ * P9_22_pinmux {
+ * mode = "uart";
+ * };
+ *};
+ *
+ *&uart2 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ uart2_pins: pinmux_uart2_pins {
+ pinctrl-single,pins = <
+ /* P9_21: spi0_d0.uart2_txd */
+ BONE_P9_21 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)
+ /* P9_22: spi0_sclk.uart2_rxd */
+ BONE_P9_22 (PIN_INPUT_PULLUP | MUX_MODE1)
+ >;
+ };
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS4.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS4.dtsi
new file mode 100644
index 0000000..1d22a95
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS4.dtsi
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Testing */
+/* sudo /sbin/getty -L ttyS4 115200 vt102 */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-ttyS4.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P9_11_pinmux {
+ * mode = "uart";
+ * };
+ * P9_13_pinmux {
+ * mode = "uart";
+ * };
+ *};
+ *
+ *&uart4 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ /* P9_11: gpmc_wait0.uart4_rxd_mux2 */
+ BONE_P9_11 (PIN_INPUT_PULLUP | MUX_MODE6)
+ /* P9_13: gpmc_wpn.uart4_txd_mux2 */
+ BONE_P9_13 (PIN_OUTPUT_PULLDOWN | MUX_MODE6)
+ >;
+ };
+};
+
+&uart4 {
+ pinctrl-0 = <&uart4_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS5.dtsi b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS5.dtsi
new file mode 100644
index 0000000..01d0aec
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-pinmux-ttyS5.dtsi
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Testing */
+/* sudo /sbin/getty -L ttyS5 115200 vt102 */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include "am335x-peripheral-ttyS5.dtsi"
+
+/* cape universal */
+
+/*
+ *&ocp {
+ * P8_37_pinmux {
+ * mode = "uart";
+ * };
+ * P8_38_pinmux {
+ * mode = "uart";
+ * };
+ *};
+ *
+ *&uart5 {
+ * pinctrl-0 = <>;
+ *};
+ *
+ */
+
+/* standard */
+
+&am33xx_pinmux {
+ uart5_pins: pinmux_uart5_pins {
+ pinctrl-single,pins = <
+ /* P8_38: lcd_data9.uart5_rxd */
+ BONE_P8_38 (PIN_INPUT_PULLUP | MUX_MODE4)
+ /* P8_37: lcd_data8.uart5_txd */
+ BONE_P8_37 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)
+ >;
+ };
+};
+
+&uart5 {
+ pinctrl-0 = <&uart5_pins>;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
new file mode 100644
index 0000000..24cc695
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bone-common-univ.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone";
+ compatible = "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&ldo3_reg>;
+};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 6b84937..3688fff 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -9,6 +9,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone";
diff --git b/arch/arm/boot/dts/am335x-boneblack-audio.dts b/arch/arm/boot/dts/am335x-boneblack-audio.dts
new file mode 100644
index 0000000..a938c2c
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-audio.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+
+ clk_mcasp0_fixed: clk_mcasp0_fixed {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
+ clk_mcasp0: clk_mcasp0 {
+ #clock-cells = <0>;
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_mcasp0_fixed>;
+ enable-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; /* BeagleBone Black Clk enable on GPIO1_27 */
+ };
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro@1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts
new file mode 100644
index 0000000..8d795c0
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common-no-capemgr.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro@1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+#include "am335x-cape-bbb-exp-c.dtsi"
diff --git b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts
new file mode 100644
index 0000000..5df881e
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common-no-capemgr.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro@1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+#include "am335x-cape-bbb-exp-r.dtsi"
diff --git b/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts b/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts
new file mode 100644
index 0000000..68c5a6b
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Modified by Mirko Denecke <mirkix@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+#include <dt-bindings/pinctrl/am33xx.h>
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro@1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&am33xx_pinmux {
+ dcan1_pins: pinmux_dcan1_pins {
+ pinctrl-single,pins = <
+ /* P9_26: uart1_rxd.d_can1_tx */
+ BONE_P9_26 (PIN_OUTPUT_PULLUP | MUX_MODE2)
+ /* P9_24: uart1_txd.d_can1_rx */
+ BONE_P9_24 (PIN_INPUT_PULLUP | MUX_MODE2)
+ >;
+ };
+
+ pru_pins: pinmux_pru_pins {
+ pinctrl-single,pins = <
+ 0x03c 0x35 /* ecap0_in_pwm0_out.pr1_ecap0_ecap_capin, MODE5 | INPUT_PULLUP | PRU, PPM-sum, SBUS, DSM */
+
+ 0x0e8 0x25 /* lcd_pclk.pr1_pru1_pru_r30_10, MODE5 | OUTPUT | PRU, CH_1 */
+ 0x0e0 0x25 /* lcd_vsync.pr1_pru1_pru_r30_8, MODE5 | OUTPUT | PRU, CH_2 */
+ 0x0ec 0x25 /* lcd_ac_bias_en.pr1_pru1_pru_r30_11, MODE5 | OUTPUT | PRU, CH_3 */
+ 0x0e4 0x25 /* lcd_hsync.pr1_pru1_pru_r30_9, MODE5 | OUTPUT | PRU, CH_4 */
+ 0x0bc 0x25 /* lcd_data7.pr1_pru1_pru_r30_7, MODE5 | OUTPUT | PRU, CH_5 */
+ 0x0b8 0x25 /* lcd_data6.pr1_pru1_pru_r30_6, MODE5 | OUTPUT | PRU, CH_6 */
+ 0x0b4 0x25 /* lcd_data5.pr1_pru1_pru_r30_5, MODE5 | OUTPUT | PRU, CH_7 */
+ 0x0b0 0x25 /* lcd_data4.pr1_pru1_pru_r30_4, MODE5 | OUTPUT | PRU, CH_8 */
+ 0x0ac 0x25 /* lcd_data3.pr1_pru1_pru_r30_3, MODE5 | OUTPUT | PRU, CH_9 */
+ 0x0a8 0x25 /* lcd_data2.pr1_pru1_pru_r30_2, MODE5 | OUTPUT | PRU, CH_10 */
+ 0x0a4 0x25 /* lcd_data1.pr1_pru1_pru_r30_1, MODE5 | OUTPUT | PRU, CH_11 */
+ 0x0a0 0x25 /* lcd_data0.pr1_pru1_pru_r30_0, MODE5 | OUTPUT | PRU, CH_12 */
+
+ BONE_P8_12 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* HC-SR04 TRIG */
+ BONE_P8_16 (PIN_INPUT_PULLDOWN | MUX_MODE6) /* HC-SR04 ECHO */
+
+ BONE_P9_25 (PIN_INPUT_PULLDOWN | MUX_MODE6) /* MPU9250 INT */
+ >;
+ };
+
+ spi0_pins: pinmux_spi0_pins {
+ pinctrl-single,pins = <
+ /* P9_22: spi0_sclk.spi0_sclk */
+ BONE_P9_22 (PIN_INPUT_PULLUP | MUX_MODE0)
+ /* P9_21: spi0_d0.spi0_d0 */
+ BONE_P9_21 (PIN_INPUT_PULLUP | MUX_MODE0)
+ /* P9_18: spi0_d1.spi0_d1 */
+ BONE_P9_18 (PIN_OUTPUT_PULLUP | MUX_MODE0)
+ /* P9_17: spi0_cs0.spi0_cs0 */
+ BONE_P9_17 (PIN_OUTPUT_PULLUP | MUX_MODE0)
+ >;
+ };
+
+ spi1_pins: pinmux_spi1_pins {
+ pinctrl-single,pins = <
+ /* P9_31: mcasp0_aclkx.spi1_sclk */
+ BONE_P9_31 (PIN_INPUT_PULLUP | MUX_MODE3)
+
+ /* P9_29: mcasp0_fsx.spi1_d0 */
+ BONE_P9_29 (PIN_INPUT_PULLUP | MUX_MODE3)
+
+ /* P9_30: mcasp0_axr0.spi1_d1 */
+ BONE_P9_30 (PIN_OUTPUT_PULLUP | MUX_MODE3)
+
+ /* P9_28: mcasp0_ahclkr.spi1_cs0 */
+ BONE_P9_28 (PIN_OUTPUT_PULLUP | MUX_MODE3)
+
+ /* P9_19: uart1_rtsn.spi1_cs1 */
+/* BONE_P9_19 (PIN_OUTPUT_PULLUP | MUX_MODE4)*/
+
+ /* P9_42: ecap0_in_pwm0_out.spi1_cs1 */
+ BONE_P9_42A (PIN_OUTPUT_PULLUP | MUX_MODE2)
+ >;
+ };
+
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ /* P9_11: gpmc_wait0.uart4_rxd_mux2 */
+ BONE_P9_11 (PIN_INPUT_PULLUP | MUX_MODE6)
+ /* P9_13: gpmc_wpn.uart4_txd_mux2 */
+ BONE_P9_13 (PIN_OUTPUT_PULLDOWN | MUX_MODE6)
+ >;
+ };
+
+ uart5_pins: pinmux_uart5_pins {
+ pinctrl-single,pins = <
+ /* P8_38: lcd_data9.uart5_rxd */
+ BONE_P8_38 (PIN_INPUT_PULLUP | MUX_MODE4)
+ /* P8_37: lcd_data8.uart5_txd */
+ BONE_P8_37 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)
+ >;
+ };
+};
+
+&dcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&dcan1_pins>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "okay";
+
+ spi0_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <24000000>;
+ reg = <0>;
+ compatible = "spidev";
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "okay";
+
+ spi1_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ compatible = "spidev";
+ };
+
+ spi1_1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ compatible = "spidev";
+ };
+};
+
+&tscadc {
+ adc {
+ ti,adc-channels = <0 1>;
+ };
+};
+
+&pruss {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pru_pins>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins>;
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
new file mode 100644
index 0000000..7b4bf96
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bone-common-univ.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
diff --git b/arch/arm/boot/dts/am335x-boneblack-uboot.dts b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
new file mode 100644
index 0000000..738fa39
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
index 83f49f6..4664f20 100644
--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
@@ -11,6 +11,7 @@
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Black Wireless";
diff --git b/arch/arm/boot/dts/am335x-boneblack-wl1835mod-cape.dtsi b/arch/arm/boot/dts/am335x-boneblack-wl1835mod-cape.dtsi
new file mode 100644
index 0000000..94caa22
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-wl1835mod-cape.dtsi
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ wlan_en_reg: fixedregulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ /* WL_EN */
+ gpio = <&gpio0 26 0>;
+ enable-active-high;
+ };
+
+ kim {
+ compatible = "kim";
+ nshutdown_gpio = <44>; /* Bank1, pin12 */
+ dev_name = "/dev/ttyO4";
+ flow_cntrl = <1>;
+ baud_rate = <3000000>;
+ };
+
+ btwilink {
+ compatible = "btwilink";
+ };
+};
+
+&am33xx_pinmux {
+ bt_pins: pinmux_bt_pins {
+ pinctrl-single,pins = <
+ 0x30 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ad12.gpio1_12 */
+ >;
+ };
+
+ mmc2_pins: pinmux_mmc2_pins {
+ pinctrl-single,pins = <
+ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+ >;
+ };
+
+ mmc2_pins_sleep: pinmux_mmc2_pins_sleep {
+ pinctrl-single,pins = <
+ 0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.mmc1_clk */
+ 0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.mmc1_cmd */
+ 0x00 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.mmc1_dat0 */
+ 0x04 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.mmc1_dat1 */
+ 0x08 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.mmc1_dat2 */
+ 0x0c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.mmc1_dat3 */
+ >;
+ };
+
+ /* wl18xx card enable/irq GPIOs. */
+ wlan_pins: pinmux_wlan_pins {
+ pinctrl-single,pins = <
+ 0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN*/
+ 0x2C (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ*/
+ 0x7C (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpio1_29 BF_EN*/
+ >;
+ };
+
+ /* wl18xx card enable/irq GPIOs. */
+ wlan_pins_sleep: pinmux_wlan_pins_sleep {
+ pinctrl-single,pins = <
+ 0x28 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN*/
+ 0x2C (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ*/
+ 0x7C (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpio1_29 BF_EN*/
+ >;
+ };
+
+ uart4_pins_default: pinmux_uart4_pins_default {
+ pinctrl-single,pins = <
+ 0xD0 (PIN_INPUT | MUX_MODE6) /* lcd_data12.uart4_cts */
+ 0xD4 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data13.uart4_rts */
+ 0x70 (PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
+ 0x74 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
+ >;
+ };
+
+ uart4_pins_sleep: pinmux_uart4_pins_sleep {
+ pinctrl-single,pins = <
+ 0xD0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_data12.uart4_cts */
+ 0xD4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_data13.uart4_rts */
+ 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.uart4_rxd */
+ 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wpn.uart4_txd */
+ >;
+ };
+};
+
+&mmc2 {
+ status = "okay";
+ vmmc-supply = <&wlan_en_reg>;
+ bus-width = <4>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&mmc2_pins &wlan_pins>;
+ pinctrl-1 = <&mmc2_pins_sleep &wlan_pins_sleep>;
+ ti,non-removable;
+ ti,needs-special-hs-handling;
+ cap-power-off-card;
+ keep-power-in-suspend;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ wlcore: wlcore@0 {
+ compatible = "ti,wl1835";
+ reg = <2>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&uart4 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&uart4_pins_default>;
+ pinctrl-1 = <&uart4_pins_sleep>;
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts b/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts
new file mode 100644
index 0000000..be7cab3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common-no-capemgr.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro@1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+/* EMMC in reset */
+&gpio1 {
+ emmc_rst {
+ gpio-hog;
+ gpios = <20 0>;
+ output-high;
+ line-name = "EMMC ResetN";
+ };
+};
+
+#include "am335x-boneblack-wl1835mod-cape.dtsi"
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index d154d31..e620232 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -10,6 +10,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Black";
diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
index 7bcd726..49b965a 100644
--- a/arch/arm/boot/dts/am335x-boneblue.dts
+++ b/arch/arm/boot/dts/am335x-boneblue.dts
@@ -125,9 +125,179 @@
gpio = <&gpio3 9 0>;
enable-active-high;
};
+
+ bt_en {
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pins>;
+ compatible = "gpio-leds";
+
+ wl18xx_bt_en {
+ label = "wl18xx_bt_en";
+ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
};
&am33xx_pinmux {
+ /***************************************************************************
+ * Static Pinmux
+ ***************************************************************************/
+ mux_helper_pins: pins {
+ pinctrl-single,pins = <
+
+ /* GPIO Inputs */
+ 0x09c 0x37 /*P8.9 Pause BUTTON, input pullup*/
+ 0x098 0x37 /*P8.10 MODE BUTTON input pullup*/
+ 0x1AC 0x37 /*P9.25 MPU-9150 INTERRUPT IN*/
+
+ /* Motor Control GPIO Out*/
+ 0x088 ( PIN_OUTPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] - MDIR_1A different from cape! */
+ 0x074 ( PIN_OUTPUT | MUX_MODE7 ) /* (U17) gpmc_wpn.gpio0[31] - P9.13, MDIR_1B */
+ 0x040 ( PIN_OUTPUT | MUX_MODE7 ) /* (R13) gpmc_a0.gpio1[16] - P9.15, MDIR_2A */
+ 0x0D8 ( PIN_OUTPUT | MUX_MODE7 ) /* (V4) lcd_data14.gpio0[10] - P8.31, MDIR_2B different from cape! */
+ 0x0AC ( PIN_OUTPUT | MUX_MODE7 ) /* (R4) lcd_data3.gpio2[9] - P8.44, MDIR_3A */
+ 0x0A8 ( PIN_OUTPUT | MUX_MODE7 ) /* (R3) lcd_data2.gpio2[8] - P8.43, MDIR_3B */
+ 0x0A0 ( PIN_OUTPUT | MUX_MODE7 ) /* (R1) lcd_data0.gpio2[6] - P8.45, MDIR_4A */
+ 0x0A4 ( PIN_OUTPUT | MUX_MODE7 ) /* (R2) lcd_data1.gpio2[7] - P8.46, MDIR_4B */
+ 0x1B4 ( PIN_OUTPUT | MUX_MODE7 ) /* (D14) xdma_event_intr1.gpio0[20] - P9.41, MOT_STBY */
+
+ /* PRU encoder input */
+ 0x038 0x36 /* P8_16,PRU0_r31_16,MODE6 */
+
+ /* PRU Servo output */
+ 0x0e0 0x05 /*pru1_pru_r30_8, MODE5*/
+ 0x0e8 0x05 /*pru1_pru_r30_10, MODE5 */
+ 0x0e4 0x05 /*pr1_pru1_pru_r30_9, MODE5 */
+ 0x0ec 0x05 /*pru1_pru_r30_11, MODE5 */
+ 0x0b8 0x05 /*pru1_pru_r30_6, MODE5 */
+ 0x0bc 0x05 /*pru1_pru_r30_7, MODE5 */
+ 0x0b0 0x05 /*pru1_pru_r30_4, MODE5 */
+ 0x0b4 0x05 /*pru1_pru_r30_5, MODE5 */
+ 0x0C8 0x0F /*P8.36, SERVO_PWR GPIO OUT*/
+
+ /* WILINK 8 */
+ 0x08c 0x0F /*P8.18 V12 A2DP FSYNC */
+ 0x078 0x0F /*P9.12 A2DP_CLOCK*/
+ >;
+
+ /* D13 BLUE_GP0_PIN_5 gpio 3_20 */
+ D13_default_pin: pinmux_D13_default_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ D13_gpio_pin: pinmux_D13_gpio_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ D13_gpio_pu_pin: pinmux_D13_gpio_pu_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ D13_gpio_pd_pin: pinmux_D13_gpio_pd_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ /* H17 BLUE_GP1_PIN_4 gpio 3_1 */
+ H17_default_pin: pinmux_H17_default_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ H17_gpio_pin: pinmux_H17_gpio_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ H17_gpio_pu_pin: pinmux_H17_gpio_pu_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ H17_gpio_pd_pin: pinmux_H17_gpio_pd_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ /* J15 BLUE_GP1_PIN_3 gpio 3_2 */
+ J15_default_pin: pinmux_J15_default_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ J15_gpio_pin: pinmux_J15_gpio_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ J15_gpio_pu_pin: pinmux_J15_gpio_pu_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ J15_gpio_pd_pin: pinmux_J15_gpio_pd_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ /* P8_15 (ZCZ ball U13) */
+ P8_15_default_pin: pinmux_P8_15_default_pin {
+ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin {
+ pinctrl-single,pins = <0x03c 0x2F>; }; /* Mode 7, RxActive */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin {
+ pinctrl-single,pins = <0x03c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin {
+ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin {
+ pinctrl-single,pins = <0x03c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
+ P8_15_qep_pin: pinmux_P8_15_qep_pin {
+ pinctrl-single,pins = <0x03c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
+ P8_15_pruin_pu_pin: pinmux_P8_15_pruin_pu_pin {
+ pinctrl-single,pins = <0x03c 0x36>; }; /* Mode 6, Pull-Up, RxActive */
+ P8_15_pruecapin_pu_pin: pinmux_P8_15_pruecapin_pu_pin {
+ pinctrl-single,pins = <0x03c 0x35>; }; /* Mode 5, Pull-Up, RxActive */
+
+ /* P9_11 (ZCZ ball T17) */
+ P9_11_default_pin: pinmux_P9_11_default_pin {
+ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin {
+ pinctrl-single,pins = <0x070 0x2F>; }; /* Mode 7, RxActive */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin {
+ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin {
+ pinctrl-single,pins = <0x070 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin {
+ pinctrl-single,pins = <0x070 0x36>; }; /* Mode 6, Pull-Up, RxActive */
+
+ /* P9_23 (ZCZ ball V14) */
+ P9_23_default_pin: pinmux_P9_23_default_pin {
+ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin {
+ pinctrl-single,pins = <0x044 0x2F>; }; /* Mode 7, RxActive */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin {
+ pinctrl-single,pins = <0x044 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin {
+ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin {
+ pinctrl-single,pins = <0x044 0x26>; }; /* Mode 6, Pull-Down, RxActive */
+
+ /* P9_28 (ZCZ ball C12) Audio */
+ P9_28_default_pin: pinmux_P9_28_default_pin {
+ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin {
+ pinctrl-single,pins = <0x19c 0x2F>; }; /* Mode 7, RxActive */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin {
+ pinctrl-single,pins = <0x19c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin {
+ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin {
+ pinctrl-single,pins = <0x19c 0x21>; }; /* Mode 1, Pull-Down, RxActive */
+ P9_28_spi_pin: pinmux_P9_28_spi_pin {
+ pinctrl-single,pins = <0x19c 0x23>; }; /* Mode 3, Pull-Down, RxActive */
+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin {
+ pinctrl-single,pins = <0x19c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin {
+ pinctrl-single,pins = <0x19c 0x25>; }; /* Mode 5, Pull-Down, RxActive */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin {
+ pinctrl-single,pins = <0x19c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
+ P9_28_audio_pin: pinmux_P9_28_audio_pin {
+ pinctrl-single,pins = <0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)>; }; /* mcasp0_ahclkr.mcasp0_axr2 */
+
+ /* U16 BLUE_GP0_PIN_3 gpio 1_25 */
+ U16_default_pin: pinmux_U16_default_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ U16_gpio_pin: pinmux_U16_gpio_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ U16_gpio_pu_pin: pinmux_U16_gpio_pu_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ U16_gpio_pd_pin: pinmux_U16_gpio_pd_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ };
+
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
@@ -141,7 +311,6 @@
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
-
>;
};
@@ -184,11 +353,11 @@
};
/* DSM2 */
- uart4_pins: pinmux_uart4_pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
- >;
- };
+ //uart4_pins: pinmux_uart4_pins {
+ // pinctrl-single,pins = <
+ // AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+ // >;
+ //};
/* UT5 */
uart5_pins: pinmux_uart5_pins {
@@ -261,6 +430,51 @@
AM33XX_IOPAD(0x940, PIN_OUTPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
>;
};
+
+ ehrpwm1_pins: pinmux_ehrpwm1_pins {
+ pinctrl-single,pins = <
+ 0x020 0x24 /* P8_19_pwm_pin */
+ 0x024 0x24 /* P8_13_pwm_pin */
+ >;
+ };
+
+ ehrpwm2_pins: pinmux_ehrpwm2_pins {
+ pinctrl-single,pins = <
+ 0x048 0x26 /* P9_14_pwm_pin */
+ 0x04c 0x26 /* P9_16_pwm_pin */
+ >;
+ };
+
+ eqep0_pins: pinmux_eqep0_pins {
+ pinctrl-single,pins = <
+ 0x1a0 0x21 /* P9_92_qep_pin */
+ 0x1a4 0x21 /* P9_27_qep_pin */
+ >;
+ };
+
+ eqep1_pins: pinmux_eqep1_pins {
+ pinctrl-single,pins = <
+ 0x0d4 0x22 /* P8_33_qep_pin */
+ 0x0d0 0x22 /* P8_35_qep_pin */
+ >;
+ };
+
+ eqep2_pins: pinmux_eqep2_pins {
+ pinctrl-single,pins = <
+ 0x030 0x24 /* P8_12_qep_pin */
+ 0x034 0x24 /* P8_11_qep_pin */
+ >;
+ };
+
+ spi1_pins: pinmux_spi1_pins {
+ pinctrl-single,pins = <
+ 0x190 0x23 /* spi1_sclk */
+ 0x194 0x23 /* spi1_d0 */
+ 0x198 0x23 /* spi1_d1 */
+ 0x144 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs0 */
+ 0x164 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs1 */
+ >;
+ };
};
&uart0 {
@@ -284,12 +498,12 @@
status = "okay";
};
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_pins>;
-
- status = "okay";
-};
+//&uart4 {
+// pinctrl-names = "default";
+// pinctrl-0 = <&uart4_pins>;
+//
+// status = "okay";
+//};
&uart5 {
pinctrl-names = "default";
@@ -387,6 +601,8 @@
interrupts = <7>; /* NMI */
interrupt-parent = <&intc>;
+ ti,pmic-shutdown-controller;
+
charger {
interrupts = <0>, <1>;
interrupt-names = "USB", "AC";
@@ -487,22 +703,23 @@
};
};
-&tscadc {
- status = "okay";
- adc {
- ti,adc-channels = <0 1 2 3 4 5 6 7>;
- };
-};
+//&tscadc {
+// status = "okay";
+// adc {
+// ti,adc-channels = <0 1 2 3 4 5 6 7>;
+// };
+//};
&uart3 {
pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins &bt_pins>;
+ //pinctrl-0 = <&uart3_pins &bt_pins>;
+ pinctrl-0 = <&uart3_pins>;
status = "okay";
- bluetooth {
- compatible = "ti,wl1835-st";
- enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- };
+// bluetooth {
+// compatible = "ti,wl1835-st";
+// enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+// };
};
&aes {
@@ -515,8 +732,10 @@
&rtc {
system-power-controller;
- clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
- clock-names = "ext-clk", "int-clk";
+};
+
+&wkup_m3_ipc {
+ ti,scale-data-fw = "am335x-bone-scale-data.bin";
};
&dcan1 {
@@ -533,3 +752,215 @@
line-name = "LS_BUF_EN";
};
};
+
+&ocp {
+ /* activate the static pinmux helper list of pin modes above */
+ test_helper: helper {
+ compatible = "bone-pinmux-helper";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mux_helper_pins>;
+
+ status = "okay";
+ };
+
+ /* Encoder 4 (U13) */
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "pruin_pu", "gpio", "gpio_pu", "gpio_pd", "pruin", "qep", "pruecapin_pu";
+ pinctrl-0 = <&P8_15_pruin_pu_pin>;
+ pinctrl-1 = <&P8_15_pruin_pu_pin>;
+ pinctrl-2 = <&P8_15_gpio_pin>;
+ pinctrl-3 = <&P8_15_gpio_pu_pin>;
+ pinctrl-4 = <&P8_15_gpio_pd_pin>;
+ pinctrl-5 = <&P8_15_pruin_pin>;
+ pinctrl-6 = <&P8_15_qep_pin>;
+ pinctrl-7 = <&P8_15_pruecapin_pu_pin>;
+ };
+
+ /* UART4 RX DSM */
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "uart", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&P9_11_uart_pin>;
+ pinctrl-1 = <&P9_11_uart_pin>;
+ pinctrl-2 = <&P9_11_gpio_pin>;
+ pinctrl-3 = <&P9_11_gpio_pu_pin>;
+ pinctrl-4 = <&P9_11_gpio_pd_pin>;
+ };
+
+ /* U16 BLUE_GP0_PIN_3 gpio 1_25*/
+ U16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&U16_default_pin>;
+ pinctrl-1 = <&U16_gpio_pin>;
+ pinctrl-2 = <&U16_gpio_pu_pin>;
+ pinctrl-3 = <&U16_gpio_pd_pin>;
+ };
+
+
+ /* BLUE_GP0_PIN_3 gpio1_17*/
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_pwm_pin>;
+ };
+
+ /* BLUE_GP0_PIN_5 gpio3_20 */
+ D13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&D13_default_pin>;
+ pinctrl-1 = <&D13_gpio_pin>;
+ pinctrl-2 = <&D13_gpio_pu_pin>;
+ pinctrl-3 = <&D13_gpio_pd_pin>;
+ };
+
+ /* BLUE_GP0_PIN_6 gpio3_17 */
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_pwm_pin>;
+ pinctrl-5 = <&P9_28_spi_pin>;
+ pinctrl-6 = <&P9_28_pwm2_pin>;
+ pinctrl-7 = <&P9_28_pruout_pin>;
+ pinctrl-8 = <&P9_28_pruin_pin>;
+ };
+
+ /* BLUE_GP1_PIN_3 gpio3_2 */
+ J15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&J15_default_pin>;
+ pinctrl-1 = <&J15_gpio_pin>;
+ pinctrl-2 = <&J15_gpio_pu_pin>;
+ pinctrl-3 = <&J15_gpio_pd_pin>;
+ };
+
+ /* BLUE_GP1_PIN_4 gpio3_1 */
+ H17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&H17_default_pin>;
+ pinctrl-1 = <&H17_gpio_pin>;
+ pinctrl-2 = <&H17_gpio_pu_pin>;
+ pinctrl-3 = <&H17_gpio_pd_pin>;
+ };
+};
+
+/*******************************************************************************
+* PWMSS
+*******************************************************************************/
+&epwmss0 {
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+};
+
+&ehrpwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm1_pins>;
+ status = "okay";
+};
+
+&ehrpwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm2_pins>;
+ status = "okay";
+};
+
+/*******************************************************************************
+* EQEP
+*******************************************************************************/
+&eqep0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep0_pins>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+ status = "okay";
+};
+
+&eqep1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep1_pins>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+ status = "okay";
+};
+
+&eqep2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep2_pins>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+ status = "okay";
+};
+
+/*******************************************************************************
+ SPI
+*******************************************************************************/
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
new file mode 100644
index 0000000..61c0361
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
@@ -0,0 +1,2793 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+
+ /* P8_07 (ZCZ ball R7) gpio2_2 */
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
+
+ /* P8_08 (ZCZ ball T7) gpio2_3 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
+
+ /* P8_09 (ZCZ ball T6) gpio2_5 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
+
+ /* P8_10 (ZCZ ball U6) gpio2_4 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
+
+ /* P8_11 (ZCZ ball R12) gpio1_13 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+
+ /* P8_12 (ZCZ ball T12) gpio1_12 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+
+ /* P8_13 (ZCZ ball T10) gpio0_23 */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+
+ /* P8_14 (ZCZ ball T11) wl1835: wl_en */
+
+ /* P8_15 (ZCZ ball U13) gpio1_15 */
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+
+ /* P8_16 (ZCZ ball V13) gpio1_14 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+
+ /* P8_17 (ZCZ ball U12) wl1835: wl_irq */
+
+ /* P8_18 (ZCZ ball V12) gpio2_1 */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+
+ /* P8_19 (ZCZ ball U10) gpio0_22 */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+
+ /* P8_26 (ZCZ ball V6) gpio-hog wl1835 */
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) gpio0_30 */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+
+ /* P9_12 (ZCZ ball U18) gpio1_28 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+
+ /* P9_13 (ZCZ ball U17) gpio0_31 */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+
+ /* P9_14 (ZCZ ball U14) gpio1_18 */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+
+ /* P9_15 (ZCZ ball R13) gpio1_16 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
+
+ /* P9_16 (ZCZ ball T14) gpio1_19 */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
+
+ /* P9_17 (ZCZ ball A16) gpio0_5 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+ /* P9_18 (ZCZ ball B16) gpio0_4 */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+ /* P9_19 (ZCZ ball D17) i2c2_scl */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
+ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P9_20 (ZCZ ball D18) i2c2_sda */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
+ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+
+ /* P9_21 (ZCZ ball B17) gpio0_3 */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P9_22 (ZCZ ball A17) gpio0_2 */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+ /* P9_23 (ZCZ ball V14) gpio1_17 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
+
+ /* P9_24 (ZCZ ball D15) gpio0_15 */
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+
+ /* P9_26 (ZCZ ball D16) gpio0_14 */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+
+ /* P9_27 (ZCZ ball C13) gpio3_19 */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+
+ /* P9_30 (ZCZ ball D12) gpio-hog wl1835 */
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) gpio0_20 */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) gpio3_20 */
+ P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+
+ /* P9_42 (ZCZ ball C18) gpio0_7 */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) gpio3_18 */
+ P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&eqep0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+/**********************************************************************/
+/* Pin Multiplex Helpers */
+/* */
+/* These provide userspace runtime pin configuration for the */
+/* BeagleBone cape expansion headers */
+/**********************************************************************/
+
+&ocp {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_03_default_pin>;
+ pinctrl-1 = <&P8_03_gpio_pin>;
+ pinctrl-2 = <&P8_03_gpio_pu_pin>;
+ pinctrl-3 = <&P8_03_gpio_pd_pin>;
+ pinctrl-4 = <&P8_03_gpio_input_pin>;
+ };
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_04_default_pin>;
+ pinctrl-1 = <&P8_04_gpio_pin>;
+ pinctrl-2 = <&P8_04_gpio_pu_pin>;
+ pinctrl-3 = <&P8_04_gpio_pd_pin>;
+ pinctrl-4 = <&P8_04_gpio_input_pin>;
+ };
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_05_default_pin>;
+ pinctrl-1 = <&P8_05_gpio_pin>;
+ pinctrl-2 = <&P8_05_gpio_pu_pin>;
+ pinctrl-3 = <&P8_05_gpio_pd_pin>;
+ pinctrl-4 = <&P8_05_gpio_input_pin>;
+ };
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_06_default_pin>;
+ pinctrl-1 = <&P8_06_gpio_pin>;
+ pinctrl-2 = <&P8_06_gpio_pu_pin>;
+ pinctrl-3 = <&P8_06_gpio_pd_pin>;
+ pinctrl-4 = <&P8_06_gpio_input_pin>;
+ };
+
+ /* P8_07 (ZCZ ball R7) */
+ P8_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_07_default_pin>;
+ pinctrl-1 = <&P8_07_gpio_pin>;
+ pinctrl-2 = <&P8_07_gpio_pu_pin>;
+ pinctrl-3 = <&P8_07_gpio_pd_pin>;
+ pinctrl-4 = <&P8_07_gpio_input_pin>;
+ pinctrl-5 = <&P8_07_timer_pin>;
+ };
+
+ /* P8_08 (ZCZ ball T7) */
+ P8_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_08_default_pin>;
+ pinctrl-1 = <&P8_08_gpio_pin>;
+ pinctrl-2 = <&P8_08_gpio_pu_pin>;
+ pinctrl-3 = <&P8_08_gpio_pd_pin>;
+ pinctrl-4 = <&P8_08_gpio_input_pin>;
+ pinctrl-5 = <&P8_08_timer_pin>;
+ };
+
+ /* P8_09 (ZCZ ball T6) */
+ P8_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_09_default_pin>;
+ pinctrl-1 = <&P8_09_gpio_pin>;
+ pinctrl-2 = <&P8_09_gpio_pu_pin>;
+ pinctrl-3 = <&P8_09_gpio_pd_pin>;
+ pinctrl-4 = <&P8_09_gpio_input_pin>;
+ pinctrl-5 = <&P8_09_timer_pin>;
+ };
+
+ /* P8_10 (ZCZ ball U6) */
+ P8_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_10_default_pin>;
+ pinctrl-1 = <&P8_10_gpio_pin>;
+ pinctrl-2 = <&P8_10_gpio_pu_pin>;
+ pinctrl-3 = <&P8_10_gpio_pd_pin>;
+ pinctrl-4 = <&P8_10_gpio_input_pin>;
+ pinctrl-5 = <&P8_10_timer_pin>;
+ };
+
+ /* P8_11 (ZCZ ball R12) */
+ P8_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_11_default_pin>;
+ pinctrl-1 = <&P8_11_gpio_pin>;
+ pinctrl-2 = <&P8_11_gpio_pu_pin>;
+ pinctrl-3 = <&P8_11_gpio_pd_pin>;
+ pinctrl-4 = <&P8_11_gpio_input_pin>;
+ pinctrl-5 = <&P8_11_qep_pin>;
+ pinctrl-6 = <&P8_11_pruout_pin>;
+ };
+
+ /* P8_12 (ZCZ ball T12) */
+ P8_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_12_default_pin>;
+ pinctrl-1 = <&P8_12_gpio_pin>;
+ pinctrl-2 = <&P8_12_gpio_pu_pin>;
+ pinctrl-3 = <&P8_12_gpio_pd_pin>;
+ pinctrl-4 = <&P8_12_gpio_input_pin>;
+ pinctrl-5 = <&P8_12_qep_pin>;
+ pinctrl-6 = <&P8_12_pruout_pin>;
+ };
+
+ /* P8_13 (ZCZ ball T10) */
+ P8_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_13_default_pin>;
+ pinctrl-1 = <&P8_13_gpio_pin>;
+ pinctrl-2 = <&P8_13_gpio_pu_pin>;
+ pinctrl-3 = <&P8_13_gpio_pd_pin>;
+ pinctrl-4 = <&P8_13_gpio_input_pin>;
+ pinctrl-5 = <&P8_13_pwm_pin>;
+ };
+
+ /* P8_14 (ZCZ ball T11) wl1835: wl_en */
+
+ /* P8_15 (ZCZ ball U13) */
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
+ pinctrl-0 = <&P8_15_default_pin>;
+ pinctrl-1 = <&P8_15_gpio_pin>;
+ pinctrl-2 = <&P8_15_gpio_pu_pin>;
+ pinctrl-3 = <&P8_15_gpio_pd_pin>;
+ pinctrl-4 = <&P8_15_gpio_input_pin>;
+ pinctrl-5 = <&P8_15_qep_pin>;
+ pinctrl-6 = <&P8_15_pru_ecap_pin>;
+ pinctrl-7 = <&P8_15_pruin_pin>;
+ };
+
+ /* P8_16 (ZCZ ball V13) */
+ P8_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
+ pinctrl-0 = <&P8_16_default_pin>;
+ pinctrl-1 = <&P8_16_gpio_pin>;
+ pinctrl-2 = <&P8_16_gpio_pu_pin>;
+ pinctrl-3 = <&P8_16_gpio_pd_pin>;
+ pinctrl-4 = <&P8_16_gpio_input_pin>;
+ pinctrl-5 = <&P8_16_qep_pin>;
+ pinctrl-6 = <&P8_16_pruin_pin>;
+ };
+
+ /* P8_17 (ZCZ ball U12) wl1835: wl_irq */
+
+ /* P8_18 (ZCZ ball V12) */
+ P8_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_18_default_pin>;
+ pinctrl-1 = <&P8_18_gpio_pin>;
+ pinctrl-2 = <&P8_18_gpio_pu_pin>;
+ pinctrl-3 = <&P8_18_gpio_pd_pin>;
+ pinctrl-4 = <&P8_18_gpio_input_pin>;
+ };
+
+ /* P8_19 (ZCZ ball U10) */
+ P8_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_19_default_pin>;
+ pinctrl-1 = <&P8_19_gpio_pin>;
+ pinctrl-2 = <&P8_19_gpio_pu_pin>;
+ pinctrl-3 = <&P8_19_gpio_pd_pin>;
+ pinctrl-4 = <&P8_19_gpio_input_pin>;
+ pinctrl-5 = <&P8_19_pwm_pin>;
+ };
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_20_default_pin>;
+ pinctrl-1 = <&P8_20_gpio_pin>;
+ pinctrl-2 = <&P8_20_gpio_pu_pin>;
+ pinctrl-3 = <&P8_20_gpio_pd_pin>;
+ pinctrl-4 = <&P8_20_gpio_input_pin>;
+ pinctrl-5 = <&P8_20_pruout_pin>;
+ pinctrl-6 = <&P8_20_pruin_pin>;
+ };
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_21_default_pin>;
+ pinctrl-1 = <&P8_21_gpio_pin>;
+ pinctrl-2 = <&P8_21_gpio_pu_pin>;
+ pinctrl-3 = <&P8_21_gpio_pd_pin>;
+ pinctrl-4 = <&P8_21_gpio_input_pin>;
+ pinctrl-5 = <&P8_21_pruout_pin>;
+ pinctrl-6 = <&P8_21_pruin_pin>;
+ };
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_22_default_pin>;
+ pinctrl-1 = <&P8_22_gpio_pin>;
+ pinctrl-2 = <&P8_22_gpio_pu_pin>;
+ pinctrl-3 = <&P8_22_gpio_pd_pin>;
+ pinctrl-4 = <&P8_22_gpio_input_pin>;
+ };
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_23_default_pin>;
+ pinctrl-1 = <&P8_23_gpio_pin>;
+ pinctrl-2 = <&P8_23_gpio_pu_pin>;
+ pinctrl-3 = <&P8_23_gpio_pd_pin>;
+ pinctrl-4 = <&P8_23_gpio_input_pin>;
+ };
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_24_default_pin>;
+ pinctrl-1 = <&P8_24_gpio_pin>;
+ pinctrl-2 = <&P8_24_gpio_pu_pin>;
+ pinctrl-3 = <&P8_24_gpio_pd_pin>;
+ pinctrl-4 = <&P8_24_gpio_input_pin>;
+ };
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_25_default_pin>;
+ pinctrl-1 = <&P8_25_gpio_pin>;
+ pinctrl-2 = <&P8_25_gpio_pu_pin>;
+ pinctrl-3 = <&P8_25_gpio_pd_pin>;
+ pinctrl-4 = <&P8_25_gpio_input_pin>;
+ };
+
+ /* P8_26 (ZCZ ball V6) gpio-hog wl1835 */
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_27_default_pin>;
+ pinctrl-1 = <&P8_27_gpio_pin>;
+ pinctrl-2 = <&P8_27_gpio_pu_pin>;
+ pinctrl-3 = <&P8_27_gpio_pd_pin>;
+ pinctrl-4 = <&P8_27_gpio_input_pin>;
+ pinctrl-5 = <&P8_27_pruout_pin>;
+ pinctrl-6 = <&P8_27_pruin_pin>;
+ };
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_28_default_pin>;
+ pinctrl-1 = <&P8_28_gpio_pin>;
+ pinctrl-2 = <&P8_28_gpio_pu_pin>;
+ pinctrl-3 = <&P8_28_gpio_pd_pin>;
+ pinctrl-4 = <&P8_28_gpio_input_pin>;
+ pinctrl-5 = <&P8_28_pruout_pin>;
+ pinctrl-6 = <&P8_28_pruin_pin>;
+ };
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_29_default_pin>;
+ pinctrl-1 = <&P8_29_gpio_pin>;
+ pinctrl-2 = <&P8_29_gpio_pu_pin>;
+ pinctrl-3 = <&P8_29_gpio_pd_pin>;
+ pinctrl-4 = <&P8_29_gpio_input_pin>;
+ pinctrl-5 = <&P8_29_pruout_pin>;
+ pinctrl-6 = <&P8_29_pruin_pin>;
+ };
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_30_default_pin>;
+ pinctrl-1 = <&P8_30_gpio_pin>;
+ pinctrl-2 = <&P8_30_gpio_pu_pin>;
+ pinctrl-3 = <&P8_30_gpio_pd_pin>;
+ pinctrl-4 = <&P8_30_gpio_input_pin>;
+ pinctrl-5 = <&P8_30_pruout_pin>;
+ pinctrl-6 = <&P8_30_pruin_pin>;
+ };
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "qep";
+ pinctrl-0 = <&P8_31_default_pin>;
+ pinctrl-1 = <&P8_31_gpio_pin>;
+ pinctrl-2 = <&P8_31_gpio_pu_pin>;
+ pinctrl-3 = <&P8_31_gpio_pd_pin>;
+ pinctrl-4 = <&P8_31_gpio_input_pin>;
+ pinctrl-5 = <&P8_31_uart_pin>;
+ pinctrl-6 = <&P8_31_qep_pin>;
+ };
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_32_default_pin>;
+ pinctrl-1 = <&P8_32_gpio_pin>;
+ pinctrl-2 = <&P8_32_gpio_pu_pin>;
+ pinctrl-3 = <&P8_32_gpio_pd_pin>;
+ pinctrl-4 = <&P8_32_gpio_input_pin>;
+ pinctrl-5 = <&P8_32_qep_pin>;
+ };
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_33_default_pin>;
+ pinctrl-1 = <&P8_33_gpio_pin>;
+ pinctrl-2 = <&P8_33_gpio_pu_pin>;
+ pinctrl-3 = <&P8_33_gpio_pd_pin>;
+ pinctrl-4 = <&P8_33_gpio_input_pin>;
+ pinctrl-5 = <&P8_33_qep_pin>;
+ };
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_34_default_pin>;
+ pinctrl-1 = <&P8_34_gpio_pin>;
+ pinctrl-2 = <&P8_34_gpio_pu_pin>;
+ pinctrl-3 = <&P8_34_gpio_pd_pin>;
+ pinctrl-4 = <&P8_34_gpio_input_pin>;
+ pinctrl-5 = <&P8_34_pwm_pin>;
+ };
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_35_default_pin>;
+ pinctrl-1 = <&P8_35_gpio_pin>;
+ pinctrl-2 = <&P8_35_gpio_pu_pin>;
+ pinctrl-3 = <&P8_35_gpio_pd_pin>;
+ pinctrl-4 = <&P8_35_gpio_input_pin>;
+ pinctrl-5 = <&P8_35_qep_pin>;
+ };
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_36_default_pin>;
+ pinctrl-1 = <&P8_36_gpio_pin>;
+ pinctrl-2 = <&P8_36_gpio_pu_pin>;
+ pinctrl-3 = <&P8_36_gpio_pd_pin>;
+ pinctrl-4 = <&P8_36_gpio_input_pin>;
+ pinctrl-5 = <&P8_36_pwm_pin>;
+ };
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_37_default_pin>;
+ pinctrl-1 = <&P8_37_gpio_pin>;
+ pinctrl-2 = <&P8_37_gpio_pu_pin>;
+ pinctrl-3 = <&P8_37_gpio_pd_pin>;
+ pinctrl-4 = <&P8_37_gpio_input_pin>;
+ pinctrl-5 = <&P8_37_uart_pin>;
+ pinctrl-6 = <&P8_37_pwm_pin>;
+ };
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_38_default_pin>;
+ pinctrl-1 = <&P8_38_gpio_pin>;
+ pinctrl-2 = <&P8_38_gpio_pu_pin>;
+ pinctrl-3 = <&P8_38_gpio_pd_pin>;
+ pinctrl-4 = <&P8_38_gpio_input_pin>;
+ pinctrl-5 = <&P8_38_uart_pin>;
+ pinctrl-6 = <&P8_38_pwm_pin>;
+ };
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_39_default_pin>;
+ pinctrl-1 = <&P8_39_gpio_pin>;
+ pinctrl-2 = <&P8_39_gpio_pu_pin>;
+ pinctrl-3 = <&P8_39_gpio_pd_pin>;
+ pinctrl-4 = <&P8_39_gpio_input_pin>;
+ pinctrl-5 = <&P8_39_qep_pin>;
+ pinctrl-6 = <&P8_39_pruout_pin>;
+ pinctrl-7 = <&P8_39_pruin_pin>;
+ };
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_40_default_pin>;
+ pinctrl-1 = <&P8_40_gpio_pin>;
+ pinctrl-2 = <&P8_40_gpio_pu_pin>;
+ pinctrl-3 = <&P8_40_gpio_pd_pin>;
+ pinctrl-4 = <&P8_40_gpio_input_pin>;
+ pinctrl-5 = <&P8_40_qep_pin>;
+ pinctrl-6 = <&P8_40_pruout_pin>;
+ pinctrl-7 = <&P8_40_pruin_pin>;
+ };
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_41_default_pin>;
+ pinctrl-1 = <&P8_41_gpio_pin>;
+ pinctrl-2 = <&P8_41_gpio_pu_pin>;
+ pinctrl-3 = <&P8_41_gpio_pd_pin>;
+ pinctrl-4 = <&P8_41_gpio_input_pin>;
+ pinctrl-5 = <&P8_41_qep_pin>;
+ pinctrl-6 = <&P8_41_pruout_pin>;
+ pinctrl-7 = <&P8_41_pruin_pin>;
+ };
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_42_default_pin>;
+ pinctrl-1 = <&P8_42_gpio_pin>;
+ pinctrl-2 = <&P8_42_gpio_pu_pin>;
+ pinctrl-3 = <&P8_42_gpio_pd_pin>;
+ pinctrl-4 = <&P8_42_gpio_input_pin>;
+ pinctrl-5 = <&P8_42_qep_pin>;
+ pinctrl-6 = <&P8_42_pruout_pin>;
+ pinctrl-7 = <&P8_42_pruin_pin>;
+ };
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_43_default_pin>;
+ pinctrl-1 = <&P8_43_gpio_pin>;
+ pinctrl-2 = <&P8_43_gpio_pu_pin>;
+ pinctrl-3 = <&P8_43_gpio_pd_pin>;
+ pinctrl-4 = <&P8_43_gpio_input_pin>;
+ pinctrl-5 = <&P8_43_pwm_pin>;
+ pinctrl-6 = <&P8_43_pruout_pin>;
+ pinctrl-7 = <&P8_43_pruin_pin>;
+ };
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_44_default_pin>;
+ pinctrl-1 = <&P8_44_gpio_pin>;
+ pinctrl-2 = <&P8_44_gpio_pu_pin>;
+ pinctrl-3 = <&P8_44_gpio_pd_pin>;
+ pinctrl-4 = <&P8_44_gpio_input_pin>;
+ pinctrl-5 = <&P8_44_pwm_pin>;
+ pinctrl-6 = <&P8_44_pruout_pin>;
+ pinctrl-7 = <&P8_44_pruin_pin>;
+ };
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_45_default_pin>;
+ pinctrl-1 = <&P8_45_gpio_pin>;
+ pinctrl-2 = <&P8_45_gpio_pu_pin>;
+ pinctrl-3 = <&P8_45_gpio_pd_pin>;
+ pinctrl-4 = <&P8_45_gpio_input_pin>;
+ pinctrl-5 = <&P8_45_pwm_pin>;
+ pinctrl-6 = <&P8_45_pruout_pin>;
+ pinctrl-7 = <&P8_45_pruin_pin>;
+ };
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_46_default_pin>;
+ pinctrl-1 = <&P8_46_gpio_pin>;
+ pinctrl-2 = <&P8_46_gpio_pu_pin>;
+ pinctrl-3 = <&P8_46_gpio_pd_pin>;
+ pinctrl-4 = <&P8_46_gpio_input_pin>;
+ pinctrl-5 = <&P8_46_pwm_pin>;
+ pinctrl-6 = <&P8_46_pruout_pin>;
+ pinctrl-7 = <&P8_46_pruin_pin>;
+ };
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) */
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_11_default_pin>;
+ pinctrl-1 = <&P9_11_gpio_pin>;
+ pinctrl-2 = <&P9_11_gpio_pu_pin>;
+ pinctrl-3 = <&P9_11_gpio_pd_pin>;
+ pinctrl-4 = <&P9_11_gpio_input_pin>;
+ pinctrl-5 = <&P9_11_uart_pin>;
+ };
+
+ /* P9_12 (ZCZ ball U18) */
+ P9_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_12_default_pin>;
+ pinctrl-1 = <&P9_12_gpio_pin>;
+ pinctrl-2 = <&P9_12_gpio_pu_pin>;
+ pinctrl-3 = <&P9_12_gpio_pd_pin>;
+ pinctrl-4 = <&P9_12_gpio_input_pin>;
+ };
+
+ /* P9_13 (ZCZ ball U17) */
+ P9_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_13_default_pin>;
+ pinctrl-1 = <&P9_13_gpio_pin>;
+ pinctrl-2 = <&P9_13_gpio_pu_pin>;
+ pinctrl-3 = <&P9_13_gpio_pd_pin>;
+ pinctrl-4 = <&P9_13_gpio_input_pin>;
+ pinctrl-5 = <&P9_13_uart_pin>;
+ };
+
+ /* P9_14 (ZCZ ball U14) */
+ P9_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_14_default_pin>;
+ pinctrl-1 = <&P9_14_gpio_pin>;
+ pinctrl-2 = <&P9_14_gpio_pu_pin>;
+ pinctrl-3 = <&P9_14_gpio_pd_pin>;
+ pinctrl-4 = <&P9_14_gpio_input_pin>;
+ pinctrl-5 = <&P9_14_pwm_pin>;
+ };
+
+ /* P9_15 (ZCZ ball R13) */
+ P9_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_15_default_pin>;
+ pinctrl-1 = <&P9_15_gpio_pin>;
+ pinctrl-2 = <&P9_15_gpio_pu_pin>;
+ pinctrl-3 = <&P9_15_gpio_pd_pin>;
+ pinctrl-4 = <&P9_15_gpio_input_pin>;
+ pinctrl-5 = <&P9_15_pwm_pin>;
+ };
+
+ /* P9_16 (ZCZ ball T14) */
+ P9_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_16_default_pin>;
+ pinctrl-1 = <&P9_16_gpio_pin>;
+ pinctrl-2 = <&P9_16_gpio_pu_pin>;
+ pinctrl-3 = <&P9_16_gpio_pd_pin>;
+ pinctrl-4 = <&P9_16_gpio_input_pin>;
+ pinctrl-5 = <&P9_16_pwm_pin>;
+ };
+
+ /* P9_17 (ZCZ ball A16) */
+ P9_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_17_default_pin>;
+ pinctrl-1 = <&P9_17_gpio_pin>;
+ pinctrl-2 = <&P9_17_gpio_pu_pin>;
+ pinctrl-3 = <&P9_17_gpio_pd_pin>;
+ pinctrl-4 = <&P9_17_gpio_input_pin>;
+ pinctrl-5 = <&P9_17_spi_cs_pin>;
+ pinctrl-6 = <&P9_17_i2c_pin>;
+ pinctrl-7 = <&P9_17_pwm_pin>;
+ pinctrl-8 = <&P9_17_pru_uart_pin>;
+ };
+
+ /* P9_18 (ZCZ ball B16) */
+ P9_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_18_default_pin>;
+ pinctrl-1 = <&P9_18_gpio_pin>;
+ pinctrl-2 = <&P9_18_gpio_pu_pin>;
+ pinctrl-3 = <&P9_18_gpio_pd_pin>;
+ pinctrl-4 = <&P9_18_gpio_input_pin>;
+ pinctrl-5 = <&P9_18_spi_pin>;
+ pinctrl-6 = <&P9_18_i2c_pin>;
+ pinctrl-7 = <&P9_18_pwm_pin>;
+ pinctrl-8 = <&P9_18_pru_uart_pin>;
+ };
+
+ /* P9_19 (ZCZ ball D17) i2c */
+ P9_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_19_default_pin>;
+ pinctrl-1 = <&P9_19_gpio_pin>;
+ pinctrl-2 = <&P9_19_gpio_pu_pin>;
+ pinctrl-3 = <&P9_19_gpio_pd_pin>;
+ pinctrl-4 = <&P9_19_gpio_input_pin>;
+ pinctrl-5 = <&P9_19_spi_cs_pin>;
+ pinctrl-6 = <&P9_19_can_pin>;
+ pinctrl-7 = <&P9_19_i2c_pin>;
+ pinctrl-8 = <&P9_19_pru_uart_pin>;
+ pinctrl-9 = <&P9_19_timer_pin>;
+ };
+
+ /* P9_20 (ZCZ ball D18) i2c */
+ P9_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_20_default_pin>;
+ pinctrl-1 = <&P9_20_gpio_pin>;
+ pinctrl-2 = <&P9_20_gpio_pu_pin>;
+ pinctrl-3 = <&P9_20_gpio_pd_pin>;
+ pinctrl-4 = <&P9_20_gpio_input_pin>;
+ pinctrl-5 = <&P9_20_spi_cs_pin>;
+ pinctrl-6 = <&P9_20_can_pin>;
+ pinctrl-7 = <&P9_20_i2c_pin>;
+ pinctrl-8 = <&P9_20_pru_uart_pin>;
+ pinctrl-9 = <&P9_20_timer_pin>;
+ };
+
+ /* P9_21 (ZCZ ball B17) */
+ P9_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_21_default_pin>;
+ pinctrl-1 = <&P9_21_gpio_pin>;
+ pinctrl-2 = <&P9_21_gpio_pu_pin>;
+ pinctrl-3 = <&P9_21_gpio_pd_pin>;
+ pinctrl-4 = <&P9_21_gpio_input_pin>;
+ pinctrl-5 = <&P9_21_spi_pin>;
+ pinctrl-6 = <&P9_21_uart_pin>;
+ pinctrl-7 = <&P9_21_i2c_pin>;
+ pinctrl-8 = <&P9_21_pwm_pin>;
+ pinctrl-9 = <&P9_21_pru_uart_pin>;
+ };
+
+ /* P9_22 (ZCZ ball A17) */
+ P9_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_22_default_pin>;
+ pinctrl-1 = <&P9_22_gpio_pin>;
+ pinctrl-2 = <&P9_22_gpio_pu_pin>;
+ pinctrl-3 = <&P9_22_gpio_pd_pin>;
+ pinctrl-4 = <&P9_22_gpio_input_pin>;
+ pinctrl-5 = <&P9_22_spi_sclk_pin>;
+ pinctrl-6 = <&P9_22_uart_pin>;
+ pinctrl-7 = <&P9_22_i2c_pin>;
+ pinctrl-8 = <&P9_22_pwm_pin>;
+ pinctrl-9 = <&P9_22_pru_uart_pin>;
+ };
+
+ /* P9_23 (ZCZ ball V14) */
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_gpio_input_pin>;
+ pinctrl-5 = <&P9_23_pwm_pin>;
+ };
+
+ /* P9_24 (ZCZ ball D15) */
+ P9_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_24_default_pin>;
+ pinctrl-1 = <&P9_24_gpio_pin>;
+ pinctrl-2 = <&P9_24_gpio_pu_pin>;
+ pinctrl-3 = <&P9_24_gpio_pd_pin>;
+ pinctrl-4 = <&P9_24_gpio_input_pin>;
+ pinctrl-5 = <&P9_24_uart_pin>;
+ pinctrl-6 = <&P9_24_can_pin>;
+ pinctrl-7 = <&P9_24_i2c_pin>;
+ pinctrl-8 = <&P9_24_pru_uart_pin>;
+ pinctrl-9 = <&P9_24_pruin_pin>;
+ };
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_25_default_pin>;
+ pinctrl-1 = <&P9_25_gpio_pin>;
+ pinctrl-2 = <&P9_25_gpio_pu_pin>;
+ pinctrl-3 = <&P9_25_gpio_pd_pin>;
+ pinctrl-4 = <&P9_25_gpio_input_pin>;
+ pinctrl-5 = <&P9_25_qep_pin>;
+ pinctrl-6 = <&P9_25_pruout_pin>;
+ pinctrl-7 = <&P9_25_pruin_pin>;
+ };
+
+ /* P9_26 (ZCZ ball D16) */
+ P9_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_26_default_pin>;
+ pinctrl-1 = <&P9_26_gpio_pin>;
+ pinctrl-2 = <&P9_26_gpio_pu_pin>;
+ pinctrl-3 = <&P9_26_gpio_pd_pin>;
+ pinctrl-4 = <&P9_26_gpio_input_pin>;
+ pinctrl-5 = <&P9_26_uart_pin>;
+ pinctrl-6 = <&P9_26_can_pin>;
+ pinctrl-7 = <&P9_26_i2c_pin>;
+ pinctrl-8 = <&P9_26_pru_uart_pin>;
+ pinctrl-9 = <&P9_26_pruin_pin>;
+ };
+
+ /* P9_27 (ZCZ ball C13) */
+ P9_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_27_default_pin>;
+ pinctrl-1 = <&P9_27_gpio_pin>;
+ pinctrl-2 = <&P9_27_gpio_pu_pin>;
+ pinctrl-3 = <&P9_27_gpio_pd_pin>;
+ pinctrl-4 = <&P9_27_gpio_input_pin>;
+ pinctrl-5 = <&P9_27_qep_pin>;
+ pinctrl-6 = <&P9_27_pruout_pin>;
+ pinctrl-7 = <&P9_27_pruin_pin>;
+ };
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pwm2", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_gpio_input_pin>;
+ pinctrl-5 = <&P9_28_spi_cs_pin>;
+ pinctrl-6 = <&P9_28_pwm_pin>;
+ pinctrl-7 = <&P9_28_pwm2_pin>;
+ pinctrl-8 = <&P9_28_pruout_pin>;
+ pinctrl-9 = <&P9_28_pruin_pin>;
+ };
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_29_default_pin>;
+ pinctrl-1 = <&P9_29_gpio_pin>;
+ pinctrl-2 = <&P9_29_gpio_pu_pin>;
+ pinctrl-3 = <&P9_29_gpio_pd_pin>;
+ pinctrl-4 = <&P9_29_gpio_input_pin>;
+ pinctrl-5 = <&P9_29_spi_pin>;
+ pinctrl-6 = <&P9_29_pwm_pin>;
+ pinctrl-7 = <&P9_29_pruout_pin>;
+ pinctrl-8 = <&P9_29_pruin_pin>;
+ };
+
+ /* P9_30 (ZCZ ball D12) gpio-hog wl1835 */
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_31_default_pin>;
+ pinctrl-1 = <&P9_31_gpio_pin>;
+ pinctrl-2 = <&P9_31_gpio_pu_pin>;
+ pinctrl-3 = <&P9_31_gpio_pd_pin>;
+ pinctrl-4 = <&P9_31_gpio_input_pin>;
+ pinctrl-5 = <&P9_31_spi_sclk_pin>;
+ pinctrl-6 = <&P9_31_pwm_pin>;
+ pinctrl-7 = <&P9_31_pruout_pin>;
+ pinctrl-8 = <&P9_31_pruin_pin>;
+ };
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) */
+ P9_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer", "pruin";
+ pinctrl-0 = <&P9_41_default_pin>;
+ pinctrl-1 = <&P9_41_gpio_pin>;
+ pinctrl-2 = <&P9_41_gpio_pu_pin>;
+ pinctrl-3 = <&P9_41_gpio_pd_pin>;
+ pinctrl-4 = <&P9_41_gpio_input_pin>;
+ pinctrl-5 = <&P9_41_timer_pin>;
+ pinctrl-6 = <&P9_41_pruin_pin>;
+ };
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) */
+ P9_91_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_91_default_pin>;
+ pinctrl-1 = <&P9_91_gpio_pin>;
+ pinctrl-2 = <&P9_91_gpio_pu_pin>;
+ pinctrl-3 = <&P9_91_gpio_pd_pin>;
+ pinctrl-4 = <&P9_91_gpio_input_pin>;
+ pinctrl-5 = <&P9_91_qep_pin>;
+ pinctrl-6 = <&P9_91_pruout_pin>;
+ pinctrl-7 = <&P9_91_pruin_pin>;
+ };
+
+ /* P9_42 (ZCZ ball C18) */
+ P9_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
+ pinctrl-0 = <&P9_42_default_pin>;
+ pinctrl-1 = <&P9_42_gpio_pin>;
+ pinctrl-2 = <&P9_42_gpio_pu_pin>;
+ pinctrl-3 = <&P9_42_gpio_pd_pin>;
+ pinctrl-4 = <&P9_42_gpio_input_pin>;
+ pinctrl-5 = <&P9_42_spi_cs_pin>;
+ pinctrl-6 = <&P9_42_spi_sclk_pin>;
+ pinctrl-7 = <&P9_42_uart_pin>;
+ pinctrl-8 = <&P9_42_pwm_pin>;
+ pinctrl-9 = <&P9_42_pru_ecap_pin>;
+ };
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) */
+ P9_92_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_92_default_pin>;
+ pinctrl-1 = <&P9_92_gpio_pin>;
+ pinctrl-2 = <&P9_92_gpio_pu_pin>;
+ pinctrl-3 = <&P9_92_gpio_pd_pin>;
+ pinctrl-4 = <&P9_92_gpio_input_pin>;
+ pinctrl-5 = <&P9_92_qep_pin>;
+ pinctrl-6 = <&P9_92_pruout_pin>;
+ pinctrl-7 = <&P9_92_pruin_pin>;
+ };
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P8_03 {
+ gpio-name = "P8_03";
+ gpio = <&gpio1 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_04 {
+ gpio-name = "P8_04";
+ gpio = <&gpio1 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_05 {
+ gpio-name = "P8_05";
+ gpio = <&gpio1 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_06 {
+ gpio-name = "P8_06";
+ gpio = <&gpio1 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_07 {
+ gpio-name = "P8_07";
+ gpio = <&gpio2 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_08 {
+ gpio-name = "P8_08";
+ gpio = <&gpio2 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_09 {
+ gpio-name = "P8_09";
+ gpio = <&gpio2 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_10 {
+ gpio-name = "P8_10";
+ gpio = <&gpio2 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_11 {
+ gpio-name = "P8_11";
+ gpio = <&gpio1 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_12 {
+ gpio-name = "P8_12";
+ gpio = <&gpio1 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_13 {
+ gpio-name = "P8_13";
+ gpio = <&gpio0 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_15 {
+ gpio-name = "P8_15";
+ gpio = <&gpio1 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_16 {
+ gpio-name = "P8_16";
+ gpio = <&gpio1 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_18 {
+ gpio-name = "P8_18";
+ gpio = <&gpio2 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_19 {
+ gpio-name = "P8_19";
+ gpio = <&gpio0 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_20 {
+ gpio-name = "P8_20";
+ gpio = <&gpio1 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_21 {
+ gpio-name = "P8_21";
+ gpio = <&gpio1 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_22 {
+ gpio-name = "P8_22";
+ gpio = <&gpio1 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_23 {
+ gpio-name = "P8_23";
+ gpio = <&gpio1 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_24 {
+ gpio-name = "P8_24";
+ gpio = <&gpio1 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_25 {
+ gpio-name = "P8_25";
+ gpio = <&gpio1 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_27 {
+ gpio-name = "P8_27";
+ gpio = <&gpio2 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_28 {
+ gpio-name = "P8_28";
+ gpio = <&gpio2 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_29 {
+ gpio-name = "P8_29";
+ gpio = <&gpio2 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_30 {
+ gpio-name = "P8_30";
+ gpio = <&gpio2 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_31 {
+ gpio-name = "P8_31";
+ gpio = <&gpio0 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_32 {
+ gpio-name = "P8_32";
+ gpio = <&gpio0 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_33 {
+ gpio-name = "P8_33";
+ gpio = <&gpio0 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_34 {
+ gpio-name = "P8_34";
+ gpio = <&gpio2 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_35 {
+ gpio-name = "P8_35";
+ gpio = <&gpio0 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_36 {
+ gpio-name = "P8_36";
+ gpio = <&gpio2 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_37 {
+ gpio-name = "P8_37";
+ gpio = <&gpio2 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_38 {
+ gpio-name = "P8_38";
+ gpio = <&gpio2 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_39 {
+ gpio-name = "P8_39";
+ gpio = <&gpio2 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_40 {
+ gpio-name = "P8_40";
+ gpio = <&gpio2 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_41 {
+ gpio-name = "P8_41";
+ gpio = <&gpio2 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_42 {
+ gpio-name = "P8_42";
+ gpio = <&gpio2 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_43 {
+ gpio-name = "P8_43";
+ gpio = <&gpio2 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_44 {
+ gpio-name = "P8_44";
+ gpio = <&gpio2 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_45 {
+ gpio-name = "P8_45";
+ gpio = <&gpio2 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_46 {
+ gpio-name = "P8_46";
+ gpio = <&gpio2 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_11 {
+ gpio-name = "P9_11";
+ gpio = <&gpio0 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_12 {
+ gpio-name = "P9_12";
+ gpio = <&gpio1 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_13 {
+ gpio-name = "P9_13";
+ gpio = <&gpio0 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_14 {
+ gpio-name = "P9_14";
+ gpio = <&gpio1 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_15 {
+ gpio-name = "P9_15";
+ gpio = <&gpio1 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_16 {
+ gpio-name = "P9_16";
+ gpio = <&gpio1 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_17 {
+ gpio-name = "P9_17";
+ gpio = <&gpio0 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_18 {
+ gpio-name = "P9_18";
+ gpio = <&gpio0 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_19 {
+ gpio-name = "P9_19";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_20 {
+ gpio-name = "P9_20";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_21 {
+ gpio-name = "P9_21";
+ gpio = <&gpio0 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_22 {
+ gpio-name = "P9_22";
+ gpio = <&gpio0 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_23 {
+ gpio-name = "P9_23";
+ gpio = <&gpio1 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_24 {
+ gpio-name = "P9_24";
+ gpio = <&gpio0 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_25 {
+ gpio-name = "P9_25";
+ gpio = <&gpio3 21 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_26 {
+ gpio-name = "P9_26";
+ gpio = <&gpio0 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_27 {
+ gpio-name = "P9_27";
+ gpio = <&gpio3 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_28 {
+ gpio-name = "P9_28";
+ gpio = <&gpio3 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_29 {
+ gpio-name = "P9_29";
+ gpio = <&gpio3 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_31 {
+ gpio-name = "P9_31";
+ gpio = <&gpio3 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_41 {
+ gpio-name = "P9_41";
+ gpio = <&gpio0 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_91 {
+ gpio-name = "P9_91";
+ gpio = <&gpio3 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_42 {
+ gpio-name = "P9_42";
+ gpio = <&gpio0 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_92 {
+ gpio-name = "P9_92";
+ gpio = <&gpio3 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
new file mode 100644
index 0000000..5d87c70
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bonegreen-wireless-common-univ.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Green Wireless";
+ compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&gpio1 {
+ ls_buf_en {
+ gpio-hog;
+ gpios = <29 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LS_BUF_EN";
+ };
+};
+
+/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/
+/* in case it isn't, wilink8 ends up in one of the test modes that */
+/* intruces various issues (elp wkaeup timeouts etc.) */
+/* On the BBGW this pin is routed through the level shifter (U21) that */
+/* introduces a pullup on the line and wilink8 ends up in a bad state. */
+/* use a gpio hog to force this pin low. An alternative may be adding */
+/* an external pulldown on U21 pin 4. */
+
+&gpio3 {
+ bt_aud_in {
+ gpio-hog;
+ gpios = <16 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "MCASP0_AHCLKR";
+ };
+};
diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
index 57731f0..de299ad 100644
--- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
@@ -11,6 +11,7 @@
#include "am335x-bone-common.dtsi"
#include "am335x-bonegreen-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Green Wireless";
diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
index a8b4d96..575a5a9 100644
--- a/arch/arm/boot/dts/am335x-bonegreen.dts
+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
@@ -10,6 +10,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-bonegreen-common.dtsi"
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Green";
diff --git b/arch/arm/boot/dts/am335x-cape-bbb-exp-c.dtsi b/arch/arm/boot/dts/am335x-cape-bbb-exp-c.dtsi
new file mode 100644
index 0000000..d2704c6
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-cape-bbb-exp-c.dtsi
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+
+#include "am335x-peripheral-can0.dtsi"
+#include "am335x-bone-pinmux-can0.dtsi"
+
+#include "am335x-peripheral-ttyS1.dtsi"
+#include "am335x-bone-pinmux-ttyS1.dtsi"
+
+#include "am335x-peripheral-ttyS2.dtsi"
+#include "am335x-bone-pinmux-ttyS2.dtsi"
+
+#include "am335x-peripheral-ttyS4.dtsi"
+#include "am335x-bone-pinmux-ttyS4.dtsi"
+
+&am33xx_pinmux {
+ user_leds_s1: user_leds_s1 {
+ pinctrl-single,pins = <
+ 0x98 0x7 /* gpmc_wen.gpio2_4, OUTPUT | MODE7 */
+ 0x9c 0x7 /* gpmc_ben0_cle.gpio2_5, OUTPUT | MODE7 */
+ >;
+ };
+
+ bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins {
+ pinctrl-single,pins = <
+ BONE_P9_14 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
+ >;
+ };
+
+ keymap3_pins: pinmux_keymap3_pins {
+ pinctrl-single,pins = <
+ 0x040 0x2f /* KEY_UP gpmc_a0.gpio1_16, INPUT | PULLDIS | MODE7 */
+ 0x04c 0x2f /* KEY_DOWN gpmc_a3.gpio1_19, INPUT | PULLDIS | MODE7 */
+ 0x078 0x2f /* KEY_RIGHT gpmc_ben1.gpio1_28, INPUT | PULLDIS | MODE7 */
+ 0x164 0x2f /* KEY_LEFT ecap0_in_pwm0_out.gpio0_7, INPUT | PULLDIS | MODE7 */
+ 0x1a4 0x2f /* KEY_ENTER mcasp0_fxr.gpio3_19, INPUT | PULLDIS | MODE7 */
+ >;
+ };
+
+ edt_ft5306_ts_pins: pinmux_edt_ft5306_ts_pins {
+ pinctrl-single,pins = <
+ /* CAP_TSC gpmc_a1.gpio1_17, INPUT | MODE7 */
+ BONE_P9_23 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ /* spi0_d1.i2c1_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */
+ BONE_P9_18 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)
+ /* spi0_cs0.i2c1_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */
+ BONE_P9_17 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)
+ >;
+ };
+
+ mcasp0_pins: pinmux_mcasp0_pins {
+ pinctrl-single,pins = <
+ 0x190 0x20 /* mcasp0_aclkx.mcasp0_aclkx, INPUT | MODE0 */
+ 0x194 0x20 /* mcasp0_fsx.mcasp0_fsx, INPUT | MODE0 */
+ 0x198 0x20 /* mcasp0_axr0.mcasp0_axr0, INPUT | MODE0 */
+ 0x19c 0x22 /* mcasp0_ahclkr.mcasp0_axr2, INPUT | MODE2 */
+ >;
+ };
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+
+&ehrpwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&bb_lcd_pwm_backlight_pins>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ clock-frequency = <400000>;
+
+ edt-ft5306@38 {
+ status = "okay";
+ compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
+ pinctrl-names = "default";
+ pinctrl-0 = <&edt_ft5306_ts_pins>;
+
+ reg = <0x38>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <17 0>;
+
+ touchscreen-size-x = <600>;
+ touchscreen-size-y = <1024>;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ touchscreen-swapped-x-y;
+ };
+
+ tlv320aic3x: tlv320aic3x@1b {
+ compatible = "ti,tlv320aic3x";
+ reg = <0x1b>;
+ status = "okay";
+ };
+};
+
+&mcasp0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp0_pins>;
+
+ status = "okay";
+
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ num-serializer = <16>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 1 0 2 0
+ 0 0 0 0
+ 0 0 0 0
+ 0 0 0 0
+ >;
+ tx-num-evt = <1>;
+ rx-num-evt = <1>;
+};
+
+/ {
+ backlight {
+ status = "okay";
+ compatible = "pwm-backlight";
+ pwms = <&ehrpwm1 0 50000 0>;
+ brightness-levels = <0 51 53 56 62 75 101 152 255>;
+ default-brightness-level = <8>;
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&keymap3_pins>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ button@1 {
+ debounce_interval = <50>;
+ linux,code = <105>;
+ label = "left";
+ gpios = <&gpio0 7 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@2 {
+ debounce_interval = <50>;
+ linux,code = <106>;
+ label = "right";
+ gpios = <&gpio1 28 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@3 {
+ debounce_interval = <50>;
+ linux,code = <103>;
+ label = "up";
+ gpios = <&gpio1 16 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@4 {
+ debounce_interval = <50>;
+ linux,code = <108>;
+ label = "down";
+ gpios = <&gpio1 19 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@5 {
+ debounce_interval = <50>;
+ linux,code = <28>;
+ label = "enter";
+ gpios = <&gpio3 19 0x1>;
+ gpio-key,wakeup;
+ };
+ };
+
+ gpio-leds-cape-lcd {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+
+ pinctrl-0 = <&user_leds_s1>;
+
+ lcd-led0 {
+ label = "lcd:green:usr0";
+ gpios = <&gpio2 4 0>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ lcd-led1 {
+ label = "lcd:green:usr1";
+ gpios = <&gpio2 5 0>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+ };
+
+ sound {
+ compatible = "ti,da830-evm-audio";
+ ti,model = "DA830 EVM";
+ ti,audio-codec = <&tlv320aic3x>;
+ ti,mcasp-controller = <&mcasp0>;
+ ti,codec-clock-rate = <12000000>;
+ ti,audio-routing =
+ "Headphone Jack", "HPLOUT",
+ "Headphone Jack", "HPROUT",
+ "MIC3L", "Mic Jack",
+ "MIC3R", "Mic Jack";
+ };
+};
+
+#include "am335x-peripheral-panel-1024x600-24bit.dtsi"
+#include "am335x-bone-pinmux-panel-1024x600-24bit.dtsi"
diff --git b/arch/arm/boot/dts/am335x-cape-bbb-exp-r.dtsi b/arch/arm/boot/dts/am335x-cape-bbb-exp-r.dtsi
new file mode 100644
index 0000000..539409c
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-cape-bbb-exp-r.dtsi
@@ -0,0 +1,217 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+
+#include "am335x-peripheral-can0.dtsi"
+#include "am335x-bone-pinmux-can0.dtsi"
+
+#include "am335x-peripheral-ttyS1.dtsi"
+#include "am335x-bone-pinmux-ttyS1.dtsi"
+
+#include "am335x-peripheral-ttyS2.dtsi"
+#include "am335x-bone-pinmux-ttyS2.dtsi"
+
+#include "am335x-peripheral-ttyS4.dtsi"
+#include "am335x-bone-pinmux-ttyS4.dtsi"
+
+&am33xx_pinmux {
+ user_leds_s1: user_leds_s1 {
+ pinctrl-single,pins = <
+ 0x98 0x7 /* gpmc_wen.gpio2_4, OUTPUT | MODE7 */
+ 0x9c 0x7 /* gpmc_ben0_cle.gpio2_5, OUTPUT | MODE7 */
+ >;
+ };
+
+ bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins {
+ pinctrl-single,pins = <
+ BONE_P9_14 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
+ >;
+ };
+
+ keymap3_pins: pinmux_keymap3_pins {
+ pinctrl-single,pins = <
+ 0x040 0x2f /* KEY_UP gpmc_a0.gpio1_16, INPUT | PULLDIS | MODE7 */
+ 0x04c 0x2f /* KEY_DOWN gpmc_a3.gpio1_19, INPUT | PULLDIS | MODE7 */
+ 0x078 0x2f /* KEY_RIGHT gpmc_ben1.gpio1_28, INPUT | PULLDIS | MODE7 */
+ 0x164 0x2f /* KEY_LEFT ecap0_in_pwm0_out.gpio0_7, INPUT | PULLDIS | MODE7 */
+ 0x1a4 0x2f /* KEY_ENTER mcasp0_fxr.gpio3_19, INPUT | PULLDIS | MODE7 */
+ >;
+ };
+
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ /* spi0_d1.i2c1_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */
+ BONE_P9_18 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)
+ /* spi0_cs0.i2c1_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */
+ BONE_P9_17 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)
+ >;
+ };
+
+ mcasp0_pins: pinmux_mcasp0_pins {
+ pinctrl-single,pins = <
+ 0x190 0x20 /* mcasp0_aclkx.mcasp0_aclkx, INPUT | MODE0 */
+ 0x194 0x20 /* mcasp0_fsx.mcasp0_fsx, INPUT | MODE0 */
+ 0x198 0x20 /* mcasp0_axr0.mcasp0_axr0, INPUT | MODE0 */
+ 0x19c 0x22 /* mcasp0_ahclkr.mcasp0_axr2, INPUT | MODE2 */
+ >;
+ };
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+
+&ehrpwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&bb_lcd_pwm_backlight_pins>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ clock-frequency = <400000>;
+
+ tlv320aic3x: tlv320aic3x@1b {
+ compatible = "ti,tlv320aic3x";
+ reg = <0x1b>;
+ status = "okay";
+ };
+};
+
+&mcasp0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp0_pins>;
+
+ status = "okay";
+
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ num-serializer = <16>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 1 0 2 0
+ 0 0 0 0
+ 0 0 0 0
+ 0 0 0 0
+ >;
+ tx-num-evt = <1>;
+ rx-num-evt = <1>;
+};
+
+&tscadc {
+ status = "okay";
+ tsc {
+ ti,wires = <4>;
+ ti,x-plate-resistance = <200>;
+ ti,coordinate-readouts = <5>;
+ ti,wire-config = <0x00 0x11 0x22 0x33>;
+ };
+
+ adc {
+ ti,adc-channels = <4 5 6 7>;
+ };
+};
+
+/ {
+ backlight {
+ status = "okay";
+ compatible = "pwm-backlight";
+ pwms = <&ehrpwm1 0 50000 0>;
+ brightness-levels = <0 51 53 56 62 75 101 152 255>;
+ default-brightness-level = <8>;
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&keymap3_pins>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ button@1 {
+ debounce_interval = <50>;
+ linux,code = <105>;
+ label = "left";
+ gpios = <&gpio0 7 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@2 {
+ debounce_interval = <50>;
+ linux,code = <106>;
+ label = "right";
+ gpios = <&gpio1 28 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@3 {
+ debounce_interval = <50>;
+ linux,code = <103>;
+ label = "up";
+ gpios = <&gpio1 16 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@4 {
+ debounce_interval = <50>;
+ linux,code = <108>;
+ label = "down";
+ gpios = <&gpio1 19 0x1>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ button@5 {
+ debounce_interval = <50>;
+ linux,code = <28>;
+ label = "enter";
+ gpios = <&gpio3 19 0x1>;
+ gpio-key,wakeup;
+ };
+ };
+
+ gpio-leds-cape-lcd {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+
+ pinctrl-0 = <&user_leds_s1>;
+
+ lcd-led0 {
+ label = "lcd:green:usr0";
+ gpios = <&gpio2 4 0>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ lcd-led1 {
+ label = "lcd:green:usr1";
+ gpios = <&gpio2 5 0>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+ };
+
+ sound {
+ compatible = "ti,da830-evm-audio";
+ ti,model = "DA830 EVM";
+ ti,audio-codec = <&tlv320aic3x>;
+ ti,mcasp-controller = <&mcasp0>;
+ ti,codec-clock-rate = <12000000>;
+ ti,audio-routing =
+ "Headphone Jack", "HPLOUT",
+ "Headphone Jack", "HPROUT",
+ "MIC3L", "Mic Jack",
+ "MIC3R", "Mic Jack";
+ };
+};
+
+#include "am335x-peripheral-panel-1024x600-24bit.dtsi"
+#include "am335x-bone-pinmux-panel-1024x600-24bit.dtsi"
diff --git b/arch/arm/boot/dts/am335x-cape-rtc-ds1307.dtsi b/arch/arm/boot/dts/am335x-cape-rtc-ds1307.dtsi
new file mode 100644
index 0000000..bce6ac5
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-cape-rtc-ds1307.dtsi
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbw-bbb-base.h>
+
+&am33xx_pinmux {
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ BONE_P9_20 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_ctsn.i2c2_sda */
+ BONE_P9_19 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_rtsn.i2c2_scl */
+ >;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+
+ status = "okay";
+ clock-frequency = <100000>;
+
+ rtc@68 {
+ compatible = "maxim,ds1307";
+ reg = <0x68>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-olimex-som.dts b/arch/arm/boot/dts/am335x-olimex-som.dts
new file mode 100644
index 0000000..2b00ad2
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-olimex-som.dts
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-som-common.dtsi"
+
+/ {
+ model = "Olimex AM335x SOM";
+ compatible = "olimex,am335x-olimex-som", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&am33xx_pinmux {
+ lcd_pins_default: lcd_pins_default {
+ pinctrl-single,pins = <
+ 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
+ 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
+ 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
+ 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
+ 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
+ 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
+ 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
+ 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
+ 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
+ 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
+ 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
+ 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
+ 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
+ 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
+ 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
+ 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
+ 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
+ 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
+ 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
+ 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
+ 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
+ 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
+ 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
+ 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
+ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
+ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
+ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
+ 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
+ >;
+ };
+
+ lcd_pins_sleep: lcd_pins_sleep {
+ pinctrl-single,pins = <
+ 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data16 */
+ 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data17 */
+ 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data18 */
+ 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data19 */
+ 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data20 */
+ 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data21 */
+ 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data22 */
+ 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data23 */
+ 0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
+ 0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
+ 0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
+ 0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
+ 0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
+ 0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
+ 0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
+ 0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
+ 0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
+ 0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
+ 0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
+ 0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
+ 0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
+ 0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
+ 0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
+ 0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
+ /* lcd_vsync.lcd_vsync,OUTPUT | MODE0 */
+ 0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
+ 0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
+ /* lcd_ac_bias_en.lcd_ac_bias_en */
+ 0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+};
+
+&lcdc {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&lcd_pins_default>;
+ pinctrl-1 = <&lcd_pins_sleep>;
+ status = "okay";
+ /* display-timings {
+ 480x272 {
+ hactive = <480>;
+ vactive = <272>;
+ hback-porch = <43>;
+ hfront-porch = <8>;
+ hsync-len = <4>;
+ vback-porch = <12>;
+ vfront-porch = <4>;
+ vsync-len = <10>;
+ clock-frequency = <9000000>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ };*/
+
+ display-timings {
+ native-mode = <&vga1024x768>;
+ lcd4: 480x272 {
+ clock-frequency = <9000000>;
+ hactive = <480>;
+ vactive = <272>;
+ hfront-porch = <3>;
+ hback-porch = <40>;
+ vback-porch = <8>;
+ vfront-porch = <7>;
+ hsync-len = <2>;
+ vsync-len = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ lcd7: 800x480 {
+ clock-frequency = <33300000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <210>;
+ hback-porch = <40>;
+ vback-porch = <23>;
+ vfront-porch = <20>;
+ hsync-len = <6>;
+ vsync-len = <2>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ lcd10: 1024x600 {
+ clock-frequency = <51200000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hfront-porch = <160>;
+ hback-porch = <140>;
+ vback-porch = <20>;
+ vfront-porch = <12>;
+ hsync-len = <20>;
+ vsync-len = <3>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+
+ vga800x600: 800x600 {
+ clock-frequency = <40000000>;
+ hactive = <800>;
+ vactive = <600>;
+ hfront-porch = <40>;
+ hback-porch = <88>;
+ vfront-porch = <1>;
+ vback-porch = <23>;
+ hsync-len = <128>;
+ vsync-len = <4>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ vga1024x768: 1024x768 {
+ clock-frequency = <65000000>;
+ hactive = <1024>;
+ hfront-porch = <24>;
+ hback-porch = <160>;
+ hsync-len = <136>;
+ vactive = <768>;
+ vfront-porch = <3>;
+ vback-porch = <29>;
+ vsync-len = <6>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-can0.dtsi b/arch/arm/boot/dts/am335x-peripheral-can0.dtsi
new file mode 100644
index 0000000..4335e39
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-can0.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&dcan0 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-can1.dtsi b/arch/arm/boot/dts/am335x-peripheral-can1.dtsi
new file mode 100644
index 0000000..02b5bd1
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-can1.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&dcan1 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-emmc.dtsi b/arch/arm/boot/dts/am335x-peripheral-emmc.dtsi
new file mode 100644
index 0000000..603f34e
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-emmc.dtsi
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-i2c2.dtsi b/arch/arm/boot/dts/am335x-peripheral-i2c2.dtsi
new file mode 100644
index 0000000..ed9a0b5
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-i2c2.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&i2c2 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-nxp-hdmi.dtsi b/arch/arm/boot/dts/am335x-peripheral-nxp-hdmi.dtsi
new file mode 100644
index 0000000..1dfd26a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-nxp-hdmi.dtsi
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&lcdc {
+ status = "okay";
+ port {
+ lcdc_0: endpoint@0 {
+ remote-endpoint = <&hdmi_0>;
+ };
+ };
+};
+
+&i2c0 {
+ tda19988 {
+ compatible = "nxp,tda998x";
+ reg = <0x70>;
+
+ port {
+ hdmi_0: endpoint@0 {
+ remote-endpoint = <&lcdc_0>;
+ };
+ };
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-panel-1024x600-24bit.dtsi b/arch/arm/boot/dts/am335x-peripheral-panel-1024x600-24bit.dtsi
new file mode 100644
index 0000000..f7c8f8a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-panel-1024x600-24bit.dtsi
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&lcdc {
+ status = "okay";
+ blue-and-red-wiring = "crossed";
+};
+
+/ {
+ panel {
+ status = "okay";
+ compatible = "ti,tilcdc,panel";
+ pinctrl-names = "default";
+
+ panel-info {
+ ac-bias = <255>;
+ ac-bias-intrpt = <0>;
+ dma-burst-sz = <16>;
+ bpp = <32>;
+ fdd = <0x80>;
+ sync-edge = <0>;
+ sync-ctrl = <0>;
+ raster-order = <1>;
+ fifo-th = <0>;
+ };
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: 1024x600 {
+ clock-frequency = <36000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hfront-porch = <1>;
+ hback-porch = <45>;
+ hsync-len = <30>;
+ vback-porch = <22>;
+ vfront-porch = <12>;
+ vsync-len = <2>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-spi0.dtsi b/arch/arm/boot/dts/am335x-peripheral-spi0.dtsi
new file mode 100644
index 0000000..969e352
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-spi0.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&spi0 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-spi1.dtsi b/arch/arm/boot/dts/am335x-peripheral-spi1.dtsi
new file mode 100644
index 0000000..ac5fe97
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-spi1.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&spi1 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-spi1a.dtsi b/arch/arm/boot/dts/am335x-peripheral-spi1a.dtsi
new file mode 100644
index 0000000..ac5fe97
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-spi1a.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&spi1 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-ttyS1.dtsi b/arch/arm/boot/dts/am335x-peripheral-ttyS1.dtsi
new file mode 100644
index 0000000..f59fa4c
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-ttyS1.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&uart1 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-ttyS2.dtsi b/arch/arm/boot/dts/am335x-peripheral-ttyS2.dtsi
new file mode 100644
index 0000000..a25d6cf
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-ttyS2.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&uart2 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-ttyS4.dtsi b/arch/arm/boot/dts/am335x-peripheral-ttyS4.dtsi
new file mode 100644
index 0000000..adc89f0
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-ttyS4.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&uart4 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/am335x-peripheral-ttyS5.dtsi b/arch/arm/boot/dts/am335x-peripheral-ttyS5.dtsi
new file mode 100644
index 0000000..8b42fb0
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-peripheral-ttyS5.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&uart5 {
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
index 62fe5ca..0097faf 100644
--- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
+++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
@@ -60,24 +60,24 @@
};
&am33xx_pinmux {
- i2c2_pins: pinmux-i2c2-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
- AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
- >;
- };
+// i2c2_pins: pinmux-i2c2-pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
+// AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
+// >;
+// };
- ehrpwm0_pins: pinmux-ehrpwm0-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
- >;
- };
+// ehrpwm0_pins: pinmux-ehrpwm0-pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
+// >;
+// };
- ehrpwm1_pins: pinmux-ehrpwm1-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
- >;
- };
+// ehrpwm1_pins: pinmux-ehrpwm1-pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
+// >;
+// };
mmc0_pins: pinmux-mmc0-pins {
pinctrl-single,pins = <
@@ -88,27 +88,26 @@
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
- AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
>;
};
- spi0_pins: pinmux-spi0-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
- AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
- AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
- AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
- >;
- };
+// spi0_pins: pinmux-spi0-pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
+// AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
+// AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
+// AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
+// >;
+// };
- spi1_pins: pinmux-spi1-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
- AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
- AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
- AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
- >;
- };
+// spi1_pins: pinmux-spi1-pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
+// AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
+// AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
+// AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
+// >;
+// };
usr_leds_pins: pinmux-usr-leds-pins {
pinctrl-single,pins = <
@@ -126,12 +125,839 @@
>;
};
- uart4_pins: pinmux-uart4-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
- AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
- >;
- };
+// uart4_pins: pinmux-uart4-pins {
+// pinctrl-single,pins = <
+// AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+// AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
+// >;
+// };
+
+ /************************/
+ /* P1 Header */
+ /************************/
+
+ /* P1_01 VIN-AC */
+
+ /* P1_02 (ZCZ ball R5) gpio2_23 */
+ P1_02_default_pin: pinmux_P1_02_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_pin: pinmux_P1_02_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_pu_pin: pinmux_P1_02_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_pd_pin: pinmux_P1_02_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_input_pin: pinmux_P1_02_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_pruout_pin: pinmux_P1_02_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P1_02_pruin_pin: pinmux_P1_02_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
+
+ /* P1_04 (ZCZ ball R6) gpio2_25 */
+ P1_04_default_pin: pinmux_P1_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_pin: pinmux_P1_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_pu_pin: pinmux_P1_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_pd_pin: pinmux_P1_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_input_pin: pinmux_P1_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_pruout_pin: pinmux_P1_04_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P1_04_pruin_pin: pinmux_P1_04_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
+
+ /* P1_06 (ZCZ ball A16) spi0_cs0 */
+ P1_06_default_pin: pinmux_P1_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P1_06_gpio_pin: pinmux_P1_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_gpio_pu_pin: pinmux_P1_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_gpio_pd_pin: pinmux_P1_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_gpio_input_pin: pinmux_P1_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_spi_cs_pin: pinmux_P1_06_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P1_06_i2c_pin: pinmux_P1_06_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P1_06_pwm_pin: pinmux_P1_06_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P1_06_pru_uart_pin: pinmux_P1_06_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+ /* P1_07 VIN-USB */
+
+ /* P1_08 (ZCZ ball A17) spi0_sclk */
+ P1_08_default_pin: pinmux_P1_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P1_08_gpio_pin: pinmux_P1_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_gpio_pu_pin: pinmux_P1_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_gpio_pd_pin: pinmux_P1_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_gpio_input_pin: pinmux_P1_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_spi_sclk_pin: pinmux_P1_08_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P1_08_uart_pin: pinmux_P1_08_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P1_08_i2c_pin: pinmux_P1_08_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P1_08_pwm_pin: pinmux_P1_08_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P1_08_pru_uart_pin: pinmux_P1_08_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+ /* P1_09 (ZCZ ball R18) USB1-DN */
+
+ /* P1_10 (ZCZ ball B17) spi0_d0 */
+ P1_10_default_pin: pinmux_P1_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P1_10_gpio_pin: pinmux_P1_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_gpio_pu_pin: pinmux_P1_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_gpio_pd_pin: pinmux_P1_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_gpio_input_pin: pinmux_P1_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_spi_pin: pinmux_P1_10_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P1_10_uart_pin: pinmux_P1_10_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P1_10_i2c_pin: pinmux_P1_10_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P1_10_pwm_pin: pinmux_P1_10_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P1_10_pru_uart_pin: pinmux_P1_10_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P1_11 (ZCZ ball R17) USB1-DP */
+
+ /* P1_12 (ZCZ ball B16) spi0_d1 */
+ P1_12_default_pin: pinmux_P1_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P1_12_gpio_pin: pinmux_P1_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_gpio_pu_pin: pinmux_P1_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_gpio_pd_pin: pinmux_P1_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_gpio_input_pin: pinmux_P1_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_spi_pin: pinmux_P1_12_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P1_12_i2c_pin: pinmux_P1_12_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P1_12_pwm_pin: pinmux_P1_12_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P1_12_pru_uart_pin: pinmux_P1_12_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+ /* P1_13 (ZCZ ball P17) USB1-ID */
+
+ /* P1_14 VOUT-3.3V */
+
+ /* P1_15 GND */
+
+ /* P1_16 GND */
+
+ /* P1_17 (ZCZ ball A9) VREFN */
+
+ /* P1_18 (ZCZ ball B9) VREFP */
+
+ /* P1_19 (ZCZ ball B6) AIN0 */
+
+ /* P1_20 (ZCZ ball D14) gpio0_20 */
+ P1_20_default_pin: pinmux_P1_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_pin: pinmux_P1_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_pu_pin: pinmux_P1_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_pd_pin: pinmux_P1_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_input_pin: pinmux_P1_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_pruin_pin: pinmux_P1_20_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+
+ /* P1_21 (ZCZ ball C7) AIN1 */
+
+ /* P1_22 GND */
+
+ /* P1_23 (ZCZ ball B7) AIN2 */
+
+ /* P1_24 VOUT-5V */
+
+ /* P1_25 (ZCZ ball A7) AIN3 */
+
+ /* P1_26 (ZCZ ball D18) i2c2_sda */
+ P1_26_default_pin: pinmux_P1_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P1_26_gpio_pin: pinmux_P1_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_gpio_pu_pin: pinmux_P1_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_gpio_pd_pin: pinmux_P1_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_gpio_input_pin: pinmux_P1_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_can_pin: pinmux_P1_26_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P1_26_i2c_pin: pinmux_P1_26_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P1_26_spi_cs_pin: pinmux_P1_26_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P1_26_pru_uart_pin: pinmux_P1_26_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+
+ /* P1_27 (ZCZ ball C8) AIN4 */
+
+ /* P1_28 (ZCZ ball D17) i2c2_scl */
+ P1_28_default_pin: pinmux_P1_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P1_28_gpio_pin: pinmux_P1_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_gpio_pu_pin: pinmux_P1_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_gpio_pd_pin: pinmux_P1_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_gpio_input_pin: pinmux_P1_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_can_pin: pinmux_P1_28_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P1_28_i2c_pin: pinmux_P1_28_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P1_28_spi_cs_pin: pinmux_P1_28_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P1_28_pru_uart_pin: pinmux_P1_28_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P1_29 (ZCZ ball A14) pru0_in7 */
+ P1_29_default_pin: pinmux_P1_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+ P1_29_gpio_pin: pinmux_P1_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_gpio_pu_pin: pinmux_P1_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_gpio_pd_pin: pinmux_P1_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_gpio_input_pin: pinmux_P1_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_qep_pin: pinmux_P1_29_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P1_29_pruout_pin: pinmux_P1_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P1_29_pruin_pin: pinmux_P1_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+
+ /* P1_30 (ZCZ ball E16) uart0_txd */
+ P1_30_default_pin: pinmux_P1_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
+ P1_30_gpio_pin: pinmux_P1_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_gpio_pu_pin: pinmux_P1_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_gpio_pd_pin: pinmux_P1_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_gpio_input_pin: pinmux_P1_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_uart_pin: pinmux_P1_30_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
+ P1_30_spi_cs_pin: pinmux_P1_30_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_txd.spi1_cs1 */
+ P1_30_can_pin: pinmux_P1_30_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_txd.dcan0_rx */
+ P1_30_i2c_pin: pinmux_P1_30_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_txd.i2c2_scl */
+ P1_30_pruout_pin: pinmux_P1_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_txd.pru1_out15 */
+ P1_30_pruin_pin: pinmux_P1_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE6) >; }; /* uart0_txd.pru1_in15 */
+
+ /* P1_31 (ZCZ ball B12) pru0_in4 */
+ P1_31_default_pin: pinmux_P1_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+ P1_31_gpio_pin: pinmux_P1_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_gpio_pu_pin: pinmux_P1_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_gpio_pd_pin: pinmux_P1_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_gpio_input_pin: pinmux_P1_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_qep_pin: pinmux_P1_31_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P1_31_pruout_pin: pinmux_P1_31_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P1_31_pruin_pin: pinmux_P1_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+
+ /* P1_32 (ZCZ ball E15) uart0_rxd */
+ P1_32_default_pin: pinmux_P1_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
+ P1_32_gpio_pin: pinmux_P1_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_gpio_pu_pin: pinmux_P1_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_gpio_pd_pin: pinmux_P1_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_gpio_input_pin: pinmux_P1_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_uart_pin: pinmux_P1_32_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
+ P1_32_spi_cs_pin: pinmux_P1_32_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rxd.spi1_cs0 */
+ P1_32_can_pin: pinmux_P1_32_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rxd.dcan0_tx */
+ P1_32_i2c_pin: pinmux_P1_32_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rxd.i2c2_sda */
+ P1_32_pruout_pin: pinmux_P1_32_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_rxd.pru1_out14 */
+ P1_32_pruin_pin: pinmux_P1_32_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE6) >; }; /* uart0_rxd.pru1_in14 */
+
+ /* P1_33 (ZCZ ball B13) pru0_in1 */
+ P1_33_default_pin: pinmux_P1_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+ P1_33_gpio_pin: pinmux_P1_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_gpio_pu_pin: pinmux_P1_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_gpio_pd_pin: pinmux_P1_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_gpio_input_pin: pinmux_P1_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_pwm_pin: pinmux_P1_33_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P1_33_spi_pin: pinmux_P1_33_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P1_33_pruout_pin: pinmux_P1_33_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P1_33_pruin_pin: pinmux_P1_33_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+
+ /* P1_34 (ZCZ ball T11) gpio0_26 */
+ P1_34_default_pin: pinmux_P1_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_pin: pinmux_P1_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_pu_pin: pinmux_P1_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_pd_pin: pinmux_P1_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_input_pin: pinmux_P1_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_pwm_pin: pinmux_P1_34_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
+
+ /* P1_35 (ZCZ ball V5) pru1_in10 */
+ P1_35_default_pin: pinmux_P1_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+ P1_35_gpio_pin: pinmux_P1_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_gpio_pu_pin: pinmux_P1_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_gpio_pd_pin: pinmux_P1_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_gpio_input_pin: pinmux_P1_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_pruout_pin: pinmux_P1_35_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P1_35_pruin_pin: pinmux_P1_35_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+
+ /* P1_36 (ZCZ ball A13) ehrpwm0a */
+ P1_36_default_pin: pinmux_P1_36_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P1_36_gpio_pin: pinmux_P1_36_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_gpio_pu_pin: pinmux_P1_36_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_gpio_pd_pin: pinmux_P1_36_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_gpio_input_pin: pinmux_P1_36_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_pwm_pin: pinmux_P1_36_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P1_36_spi_sclk_pin: pinmux_P1_36_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P1_36_pruout_pin: pinmux_P1_36_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P1_36_pruin_pin: pinmux_P1_36_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+
+
+ /************************/
+ /* P2 Header */
+ /************************/
+
+ /* P2_01 (ZCZ ball U14) ehrpwm1a */
+ P2_01_default_pin: pinmux_P2_01_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+ P2_01_gpio_pin: pinmux_P2_01_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_gpio_pu_pin: pinmux_P2_01_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_gpio_pd_pin: pinmux_P2_01_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_gpio_input_pin: pinmux_P2_01_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_pwm_pin: pinmux_P2_01_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+
+ /* P2_02 (ZCZ ball V17) gpio1_27 */
+ P2_02_default_pin: pinmux_P2_02_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_pin: pinmux_P2_02_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_pu_pin: pinmux_P2_02_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_pd_pin: pinmux_P2_02_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_input_pin: pinmux_P2_02_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+
+ /* P2_03 (ZCZ ball T10) gpio0_23 */
+ P2_03_default_pin: pinmux_P2_03_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_pin: pinmux_P2_03_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_pu_pin: pinmux_P2_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_pd_pin: pinmux_P2_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_input_pin: pinmux_P2_03_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_pwm_pin: pinmux_P2_03_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+
+ /* P2_04 (ZCZ ball T16) gpio1_26 */
+ P2_04_default_pin: pinmux_P2_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_pin: pinmux_P2_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_pu_pin: pinmux_P2_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_pd_pin: pinmux_P2_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_input_pin: pinmux_P2_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+
+ /* P2_05 (ZCZ ball T17) uart4_rxd */
+ P2_05_default_pin: pinmux_P2_05_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+ P2_05_gpio_pin: pinmux_P2_05_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_gpio_pu_pin: pinmux_P2_05_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_gpio_pd_pin: pinmux_P2_05_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_gpio_input_pin: pinmux_P2_05_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_uart_pin: pinmux_P2_05_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+
+ /* P2_06 (ZCZ ball U16) gpio1_25 */
+ P2_06_default_pin: pinmux_P2_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_pin: pinmux_P2_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_pu_pin: pinmux_P2_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_pd_pin: pinmux_P2_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_input_pin: pinmux_P2_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+
+ /* P2_07 (ZCZ ball U17) uart4_txd */
+ P2_07_default_pin: pinmux_P2_07_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+ P2_07_gpio_pin: pinmux_P2_07_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_gpio_pu_pin: pinmux_P2_07_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_gpio_pd_pin: pinmux_P2_07_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_gpio_input_pin: pinmux_P2_07_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_uart_pin: pinmux_P2_07_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+
+ /* P2_08 (ZCZ ball U18) gpio1_28 */
+ P2_08_default_pin: pinmux_P2_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_pin: pinmux_P2_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_pu_pin: pinmux_P2_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_pd_pin: pinmux_P2_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_input_pin: pinmux_P2_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+
+ /* P2_09 (ZCZ ball D15) i2c1_scl */
+ P2_09_default_pin: pinmux_P2_09_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P2_09_gpio_pin: pinmux_P2_09_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_gpio_pu_pin: pinmux_P2_09_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_gpio_pd_pin: pinmux_P2_09_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_gpio_input_pin: pinmux_P2_09_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_uart_pin: pinmux_P2_09_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P2_09_can_pin: pinmux_P2_09_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P2_09_i2c_pin: pinmux_P2_09_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P2_09_pru_uart_pin: pinmux_P2_09_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P2_09_pruin_pin: pinmux_P2_09_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+
+ /* P2_10 (ZCZ ball R14) gpio1_20 */
+ P2_10_default_pin: pinmux_P2_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_pin: pinmux_P2_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_pu_pin: pinmux_P2_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_pd_pin: pinmux_P2_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_input_pin: pinmux_P2_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_qep_pin: pinmux_P2_10_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a4.eqep1a_in */
+
+ /* P2_11 (ZCZ ball D16) i2c1_sda */
+ P2_11_default_pin: pinmux_P2_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P2_11_gpio_pin: pinmux_P2_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_gpio_pu_pin: pinmux_P2_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_gpio_pd_pin: pinmux_P2_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_gpio_input_pin: pinmux_P2_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_uart_pin: pinmux_P2_11_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P2_11_can_pin: pinmux_P2_11_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P2_11_i2c_pin: pinmux_P2_11_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P2_11_pru_uart_pin: pinmux_P2_11_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P2_11_pruin_pin: pinmux_P2_11_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+
+ /* P2_12 POWER_BUTTON */
+
+ /* P2_13 VOUT-5V */
+
+ /* P2_14 BAT-VIN */
+
+ /* P2_15 GND */
+
+ /* P2_16 BAT-TEMP */
+
+ /* P2_17 (ZCZ ball V12) gpio2_1 */
+ P2_17_default_pin: pinmux_P2_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_pin: pinmux_P2_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_pu_pin: pinmux_P2_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_pd_pin: pinmux_P2_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_input_pin: pinmux_P2_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+
+ /* P2_18 (ZCZ ball U13) gpio1_15 */
+ P2_18_default_pin: pinmux_P2_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_pin: pinmux_P2_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_pu_pin: pinmux_P2_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_pd_pin: pinmux_P2_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_input_pin: pinmux_P2_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_qep_pin: pinmux_P2_18_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P2_18_pru_ecap_pin: pinmux_P2_18_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P2_18_pruin_pin: pinmux_P2_18_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+
+ /* P2_19 (ZCZ ball U12) gpio0_27 */
+ P2_19_default_pin: pinmux_P2_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_pin: pinmux_P2_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_pu_pin: pinmux_P2_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_pd_pin: pinmux_P2_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_input_pin: pinmux_P2_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_pwm_pin: pinmux_P2_19_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
+
+ /* P2_20 (ZCZ ball T13) gpio2_0 */
+ P2_20_default_pin: pinmux_P2_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_pin: pinmux_P2_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_pu_pin: pinmux_P2_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_pd_pin: pinmux_P2_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_input_pin: pinmux_P2_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+
+ /* P2_21 GND */
+
+ /* P2_22 (ZCZ ball V13) gpio1_14 */
+ P2_22_default_pin: pinmux_P2_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_pin: pinmux_P2_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_pu_pin: pinmux_P2_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_pd_pin: pinmux_P2_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_input_pin: pinmux_P2_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_qep_pin: pinmux_P2_22_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P2_22_pruin_pin: pinmux_P2_22_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+
+ /* P2_23 VOUT-3.3V */
+
+ /* P2_24 (ZCZ ball T12) gpio1_12 */
+ P2_24_default_pin: pinmux_P2_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_pin: pinmux_P2_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_pu_pin: pinmux_P2_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_pd_pin: pinmux_P2_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_input_pin: pinmux_P2_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_qep_pin: pinmux_P2_24_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P2_24_pruout_pin: pinmux_P2_24_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+
+ /* P2_25 (ZCZ ball E17) spi1_d1 */
+ P2_25_default_pin: pinmux_P2_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
+ P2_25_gpio_pin: pinmux_P2_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_gpio_pu_pin: pinmux_P2_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_gpio_pd_pin: pinmux_P2_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_gpio_input_pin: pinmux_P2_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_uart_pin: pinmux_P2_25_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rtsn.uart4_txd */
+ P2_25_can_pin: pinmux_P2_25_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rtsn.dcan1_rx */
+ P2_25_i2c_pin: pinmux_P2_25_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rtsn.i2c1_scl */
+ P2_25_spi_pin: pinmux_P2_25_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
+ P2_25_spi_cs_pin: pinmux_P2_25_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart0_rtsn.spi1_cs0 */
+
+ /* P2_26 RESET# */
+
+ /* P2_27 (ZCZ ball E18) spi1_d0 */
+ P2_27_default_pin: pinmux_P2_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
+ P2_27_gpio_pin: pinmux_P2_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_gpio_pu_pin: pinmux_P2_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_gpio_pd_pin: pinmux_P2_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_gpio_input_pin: pinmux_P2_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_INPUT | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_uart_pin: pinmux_P2_27_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_ctsn.uart4_rxd */
+ P2_27_can_pin: pinmux_P2_27_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_ctsn.dcan1_tx */
+ P2_27_i2c_pin: pinmux_P2_27_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_ctsn.i2c1_sda */
+ P2_27_spi_pin: pinmux_P2_27_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
+
+ /* P2_28 (ZCZ ball D13) pru0_in6 */
+ P2_28_default_pin: pinmux_P2_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+ P2_28_gpio_pin: pinmux_P2_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_gpio_pu_pin: pinmux_P2_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_gpio_pd_pin: pinmux_P2_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_gpio_input_pin: pinmux_P2_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_qep_pin: pinmux_P2_28_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P2_28_pruout_pin: pinmux_P2_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P2_28_pruin_pin: pinmux_P2_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+
+ /* P2_29 (ZCZ ball C18) spi1_sclk */
+ P2_29_default_pin: pinmux_P2_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+ P2_29_gpio_pin: pinmux_P2_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_gpio_pu_pin: pinmux_P2_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_gpio_pd_pin: pinmux_P2_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_gpio_input_pin: pinmux_P2_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_pwm_pin: pinmux_P2_29_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P2_29_uart_pin: pinmux_P2_29_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P2_29_spi_cs_pin: pinmux_P2_29_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P2_29_pru_ecap_pin: pinmux_P2_29_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P2_29_spi_sclk_pin: pinmux_P2_29_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+
+ /* P2_30 (ZCZ ball C12) pru0_in3 */
+ P2_30_default_pin: pinmux_P2_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+ P2_30_gpio_pin: pinmux_P2_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_gpio_pu_pin: pinmux_P2_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_gpio_pd_pin: pinmux_P2_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_gpio_input_pin: pinmux_P2_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_pwm_pin: pinmux_P2_30_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P2_30_spi_cs_pin: pinmux_P2_30_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P2_30_pruout_pin: pinmux_P2_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P2_30_pruin_pin: pinmux_P2_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+
+ /* P2_31 (ZCZ ball A15) spi1_cs1 */
+ P2_31_default_pin: pinmux_P2_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
+ P2_31_gpio_pin: pinmux_P2_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_gpio_pu_pin: pinmux_P2_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_gpio_pd_pin: pinmux_P2_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_gpio_input_pin: pinmux_P2_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_spi_cs_pin: pinmux_P2_31_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
+ P2_31_pruin_pin: pinmux_P2_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr0.pru1_in16 */
+
+ /* P2_32 (ZCZ ball D12) pru0_in2 */
+ P2_32_default_pin: pinmux_P2_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+ P2_32_gpio_pin: pinmux_P2_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_gpio_pu_pin: pinmux_P2_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_gpio_pd_pin: pinmux_P2_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_gpio_input_pin: pinmux_P2_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_pwm_pin: pinmux_P2_32_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
+ P2_32_spi_pin: pinmux_P2_32_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
+ P2_32_pruout_pin: pinmux_P2_32_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
+ P2_32_pruin_pin: pinmux_P2_32_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+
+ /* P2_33 (ZCZ ball R12) gpio1_13 */
+ P2_33_default_pin: pinmux_P2_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_pin: pinmux_P2_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_pu_pin: pinmux_P2_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_pd_pin: pinmux_P2_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_input_pin: pinmux_P2_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_qep_pin: pinmux_P2_33_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P2_33_pruout_pin: pinmux_P2_33_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+
+ /* P2_34 (ZCZ ball C13) pru0_in5 */
+ P2_34_default_pin: pinmux_P2_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+ P2_34_gpio_pin: pinmux_P2_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_gpio_pu_pin: pinmux_P2_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_gpio_pd_pin: pinmux_P2_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_gpio_input_pin: pinmux_P2_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_qep_pin: pinmux_P2_34_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P2_34_pruout_pin: pinmux_P2_34_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P2_34_pruin_pin: pinmux_P2_34_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+
+ /* P2_35 (ZCZ ball U5) gpio2_22 */
+ P2_35_default_pin: pinmux_P2_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_pin: pinmux_P2_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_pu_pin: pinmux_P2_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_pd_pin: pinmux_P2_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_input_pin: pinmux_P2_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_pruout_pin: pinmux_P2_35_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P2_35_pruin_pin: pinmux_P2_35_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ /* P2_36 (ZCZ ball C9) AIN7 */
};
&epwmss0 {
@@ -141,7 +967,8 @@
&ehrpwm0 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&ehrpwm0_pins>;
+ //pinctrl-0 = <&ehrpwm0_pins>;
+ pinctrl-0 = <>;
};
&epwmss1 {
@@ -151,7 +978,18 @@
&ehrpwm1 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&ehrpwm1_pins>;
+ //pinctrl-0 = <&ehrpwm1_pins>;
+ pinctrl-0 = <>;
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
};
&i2c0 {
@@ -161,9 +999,18 @@
};
};
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+};
+
&i2c2 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
+// pinctrl-0 = <&i2c2_pins>;
+ pinctrl-0 = <>;
status = "okay";
clock-frequency = <400000>;
@@ -194,14 +1041,30 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
+ //pinctrl-0 = <&uart0_pins>;
+ pinctrl-0 = <>;
+
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
- pinctrl-0 = <&uart4_pins>;
+ //pinctrl-0 = <&uart4_pins>;
+ pinctrl-0 = <>;
status = "okay";
};
@@ -235,3 +1098,1088 @@
&cppi41dma {
status = "okay";
};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ status = "disabled";
+ };
+};
+
+&spi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ };
+};
+
+&dcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ocp {
+ /************************/
+ /* P1 Header */
+ /************************/
+
+ /* P1_01 VIN-AC */
+
+ /* P1_02 (ZCZ ball R5) gpio_input */
+ P1_02_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P1_02_default_pin>;
+ pinctrl-1 = <&P1_02_gpio_pin>;
+ pinctrl-2 = <&P1_02_gpio_pu_pin>;
+ pinctrl-3 = <&P1_02_gpio_pd_pin>;
+ pinctrl-4 = <&P1_02_gpio_input_pin>;
+ pinctrl-5 = <&P1_02_pruout_pin>;
+ pinctrl-6 = <&P1_02_pruin_pin>;
+ };
+
+ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
+
+ /* P1_04 (ZCZ ball R6) */
+ P1_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P1_04_default_pin>;
+ pinctrl-1 = <&P1_04_gpio_pin>;
+ pinctrl-2 = <&P1_04_gpio_pu_pin>;
+ pinctrl-3 = <&P1_04_gpio_pd_pin>;
+ pinctrl-4 = <&P1_04_gpio_input_pin>;
+ pinctrl-5 = <&P1_04_pruout_pin>;
+ pinctrl-6 = <&P1_04_pruin_pin>;
+ };
+
+ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
+
+ /* P1_06 (ZCZ ball A16) spi_cs */
+ P1_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_06_default_pin>;
+ pinctrl-1 = <&P1_06_gpio_pin>;
+ pinctrl-2 = <&P1_06_gpio_pu_pin>;
+ pinctrl-3 = <&P1_06_gpio_pd_pin>;
+ pinctrl-4 = <&P1_06_gpio_input_pin>;
+ pinctrl-5 = <&P1_06_spi_cs_pin>;
+ pinctrl-6 = <&P1_06_i2c_pin>;
+ pinctrl-7 = <&P1_06_pwm_pin>;
+ pinctrl-8 = <&P1_06_pru_uart_pin>;
+ };
+
+ /* P1_07 VIN-USB */
+
+ /* P1_08 (ZCZ ball A17) spi_sclk */
+ P1_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_08_default_pin>;
+ pinctrl-1 = <&P1_08_gpio_pin>;
+ pinctrl-2 = <&P1_08_gpio_pu_pin>;
+ pinctrl-3 = <&P1_08_gpio_pd_pin>;
+ pinctrl-4 = <&P1_08_gpio_input_pin>;
+ pinctrl-5 = <&P1_08_spi_sclk_pin>;
+ pinctrl-6 = <&P1_08_uart_pin>;
+ pinctrl-7 = <&P1_08_i2c_pin>;
+ pinctrl-8 = <&P1_08_pwm_pin>;
+ pinctrl-9 = <&P1_08_pru_uart_pin>;
+ };
+
+ /* P1_09 (ZCZ ball R18) USB1-DN */
+
+ /* P1_10 (ZCZ ball B17) spi */
+ P1_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_10_default_pin>;
+ pinctrl-1 = <&P1_10_gpio_pin>;
+ pinctrl-2 = <&P1_10_gpio_pu_pin>;
+ pinctrl-3 = <&P1_10_gpio_pd_pin>;
+ pinctrl-4 = <&P1_10_gpio_input_pin>;
+ pinctrl-5 = <&P1_10_spi_pin>;
+ pinctrl-6 = <&P1_10_uart_pin>;
+ pinctrl-7 = <&P1_10_i2c_pin>;
+ pinctrl-8 = <&P1_10_pwm_pin>;
+ pinctrl-9 = <&P1_10_pru_uart_pin>;
+ };
+
+ /* P1_11 (ZCZ ball R17) USB1-DP */
+
+ /* P1_12 (ZCZ ball B16) spi */
+ P1_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_12_default_pin>;
+ pinctrl-1 = <&P1_12_gpio_pin>;
+ pinctrl-2 = <&P1_12_gpio_pu_pin>;
+ pinctrl-3 = <&P1_12_gpio_pd_pin>;
+ pinctrl-4 = <&P1_12_gpio_input_pin>;
+ pinctrl-5 = <&P1_12_spi_pin>;
+ pinctrl-6 = <&P1_12_i2c_pin>;
+ pinctrl-7 = <&P1_12_pwm_pin>;
+ pinctrl-8 = <&P1_12_pru_uart_pin>;
+ };
+
+ /* P1_13 (ZCZ ball P17) USB1-ID */
+
+ /* P1_14 VOUT-3.3V */
+
+ /* P1_15 GND */
+
+ /* P1_16 GND */
+
+ /* P1_17 (ZCZ ball A9) VREFN */
+
+ /* P1_18 (ZCZ ball B9) VREFP */
+
+ /* P1_19 (ZCZ ball B6) AIN0 */
+
+ /* P1_20 (ZCZ ball D14) */
+ P1_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
+ pinctrl-0 = <&P1_20_default_pin>;
+ pinctrl-1 = <&P1_20_gpio_pin>;
+ pinctrl-2 = <&P1_20_gpio_pu_pin>;
+ pinctrl-3 = <&P1_20_gpio_pd_pin>;
+ pinctrl-4 = <&P1_20_gpio_input_pin>;
+ pinctrl-5 = <&P1_20_pruin_pin>;
+ };
+
+ /* P1_21 (ZCZ ball C7) AIN1 */
+
+ /* P1_22 GND */
+
+ /* P1_23 (ZCZ ball B7) AIN2 */
+
+ /* P1_24 VOUT-5V */
+
+ /* P1_25 (ZCZ ball A7) AIN3 */
+
+ /* P1_26 (ZCZ ball D18) i2c */
+ P1_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
+ pinctrl-0 = <&P1_26_default_pin>;
+ pinctrl-1 = <&P1_26_gpio_pin>;
+ pinctrl-2 = <&P1_26_gpio_pu_pin>;
+ pinctrl-3 = <&P1_26_gpio_pd_pin>;
+ pinctrl-4 = <&P1_26_gpio_input_pin>;
+ pinctrl-5 = <&P1_26_spi_cs_pin>;
+ pinctrl-6 = <&P1_26_can_pin>;
+ pinctrl-7 = <&P1_26_i2c_pin>;
+ pinctrl-8 = <&P1_26_pru_uart_pin>;
+ };
+
+ /* P1_27 (ZCZ ball C8) AIN4 */
+
+ /* P1_28 (ZCZ ball D17) i2c */
+ P1_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
+ pinctrl-0 = <&P1_28_default_pin>;
+ pinctrl-1 = <&P1_28_gpio_pin>;
+ pinctrl-2 = <&P1_28_gpio_pu_pin>;
+ pinctrl-3 = <&P1_28_gpio_pd_pin>;
+ pinctrl-4 = <&P1_28_gpio_input_pin>;
+ pinctrl-5 = <&P1_28_spi_cs_pin>;
+ pinctrl-6 = <&P1_28_can_pin>;
+ pinctrl-7 = <&P1_28_i2c_pin>;
+ pinctrl-8 = <&P1_28_pru_uart_pin>;
+ };
+
+ /* P1_29 (ZCZ ball A14) pruin */
+ P1_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P1_29_default_pin>;
+ pinctrl-1 = <&P1_29_gpio_pin>;
+ pinctrl-2 = <&P1_29_gpio_pu_pin>;
+ pinctrl-3 = <&P1_29_gpio_pd_pin>;
+ pinctrl-4 = <&P1_29_gpio_input_pin>;
+ pinctrl-5 = <&P1_29_qep_pin>;
+ pinctrl-6 = <&P1_29_pruout_pin>;
+ pinctrl-7 = <&P1_29_pruin_pin>;
+ };
+
+ /* P1_30 (ZCZ ball E16) uart */
+ P1_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
+ pinctrl-0 = <&P1_30_default_pin>;
+ pinctrl-1 = <&P1_30_gpio_pin>;
+ pinctrl-2 = <&P1_30_gpio_pu_pin>;
+ pinctrl-3 = <&P1_30_gpio_pd_pin>;
+ pinctrl-4 = <&P1_30_gpio_input_pin>;
+ pinctrl-5 = <&P1_30_spi_cs_pin>;
+ pinctrl-6 = <&P1_30_uart_pin>;
+ pinctrl-7 = <&P1_30_can_pin>;
+ pinctrl-8 = <&P1_30_i2c_pin>;
+ pinctrl-9 = <&P1_30_pruout_pin>;
+ pinctrl-10 = <&P1_30_pruin_pin>;
+ };
+
+ /* P1_31 (ZCZ ball B12) pruin */
+ P1_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P1_31_default_pin>;
+ pinctrl-1 = <&P1_31_gpio_pin>;
+ pinctrl-2 = <&P1_31_gpio_pu_pin>;
+ pinctrl-3 = <&P1_31_gpio_pd_pin>;
+ pinctrl-4 = <&P1_31_gpio_input_pin>;
+ pinctrl-5 = <&P1_31_qep_pin>;
+ pinctrl-6 = <&P1_31_pruout_pin>;
+ pinctrl-7 = <&P1_31_pruin_pin>;
+ };
+
+ /* P1_32 (ZCZ ball E15) uart */
+ P1_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
+ pinctrl-0 = <&P1_32_default_pin>;
+ pinctrl-1 = <&P1_32_gpio_pin>;
+ pinctrl-2 = <&P1_32_gpio_pu_pin>;
+ pinctrl-3 = <&P1_32_gpio_pd_pin>;
+ pinctrl-4 = <&P1_32_gpio_input_pin>;
+ pinctrl-5 = <&P1_32_spi_cs_pin>;
+ pinctrl-6 = <&P1_32_uart_pin>;
+ pinctrl-7 = <&P1_32_can_pin>;
+ pinctrl-8 = <&P1_32_i2c_pin>;
+ pinctrl-9 = <&P1_32_pruout_pin>;
+ pinctrl-10 = <&P1_32_pruin_pin>;
+ };
+
+ /* P1_33 (ZCZ ball B13) pruin */
+ P1_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P1_33_default_pin>;
+ pinctrl-1 = <&P1_33_gpio_pin>;
+ pinctrl-2 = <&P1_33_gpio_pu_pin>;
+ pinctrl-3 = <&P1_33_gpio_pd_pin>;
+ pinctrl-4 = <&P1_33_gpio_input_pin>;
+ pinctrl-5 = <&P1_33_spi_pin>;
+ pinctrl-6 = <&P1_33_pwm_pin>;
+ pinctrl-7 = <&P1_33_pruout_pin>;
+ pinctrl-8 = <&P1_33_pruin_pin>;
+ };
+
+ /* P1_34 (ZCZ ball T11) */
+ P1_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P1_34_default_pin>;
+ pinctrl-1 = <&P1_34_gpio_pin>;
+ pinctrl-2 = <&P1_34_gpio_pu_pin>;
+ pinctrl-3 = <&P1_34_gpio_pd_pin>;
+ pinctrl-4 = <&P1_34_gpio_input_pin>;
+ pinctrl-5 = <&P1_34_pwm_pin>;
+ };
+
+ /* P1_35 (ZCZ ball V5) pruin */
+ P1_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P1_35_default_pin>;
+ pinctrl-1 = <&P1_35_gpio_pin>;
+ pinctrl-2 = <&P1_35_gpio_pu_pin>;
+ pinctrl-3 = <&P1_35_gpio_pd_pin>;
+ pinctrl-4 = <&P1_35_gpio_input_pin>;
+ pinctrl-5 = <&P1_35_pruout_pin>;
+ pinctrl-6 = <&P1_35_pruin_pin>;
+ };
+
+ /* P1_36 (ZCZ ball A13) pwm */
+ P1_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P1_36_default_pin>;
+ pinctrl-1 = <&P1_36_gpio_pin>;
+ pinctrl-2 = <&P1_36_gpio_pu_pin>;
+ pinctrl-3 = <&P1_36_gpio_pd_pin>;
+ pinctrl-4 = <&P1_36_gpio_input_pin>;
+ pinctrl-5 = <&P1_36_spi_sclk_pin>;
+ pinctrl-6 = <&P1_36_pwm_pin>;
+ pinctrl-7 = <&P1_36_pruout_pin>;
+ pinctrl-8 = <&P1_36_pruin_pin>;
+ };
+
+
+ /************************/
+ /* P2 Header */
+ /************************/
+
+ /* P2_01 (ZCZ ball U14) pwm */
+ P2_01_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P2_01_default_pin>;
+ pinctrl-1 = <&P2_01_gpio_pin>;
+ pinctrl-2 = <&P2_01_gpio_pu_pin>;
+ pinctrl-3 = <&P2_01_gpio_pd_pin>;
+ pinctrl-4 = <&P2_01_gpio_input_pin>;
+ pinctrl-5 = <&P2_01_pwm_pin>;
+ };
+
+ /* P2_02 (ZCZ ball V17) */
+ P2_02_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_02_default_pin>;
+ pinctrl-1 = <&P2_02_gpio_pin>;
+ pinctrl-2 = <&P2_02_gpio_pu_pin>;
+ pinctrl-3 = <&P2_02_gpio_pd_pin>;
+ pinctrl-4 = <&P2_02_gpio_input_pin>;
+ };
+
+ /* P2_03 (ZCZ ball T10) */
+ P2_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P2_03_default_pin>;
+ pinctrl-1 = <&P2_03_gpio_pin>;
+ pinctrl-2 = <&P2_03_gpio_pu_pin>;
+ pinctrl-3 = <&P2_03_gpio_pd_pin>;
+ pinctrl-4 = <&P2_03_gpio_input_pin>;
+ pinctrl-5 = <&P2_03_pwm_pin>;
+ };
+
+ /* P2_04 (ZCZ ball T16) */
+ P2_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_04_default_pin>;
+ pinctrl-1 = <&P2_04_gpio_pin>;
+ pinctrl-2 = <&P2_04_gpio_pu_pin>;
+ pinctrl-3 = <&P2_04_gpio_pd_pin>;
+ pinctrl-4 = <&P2_04_gpio_input_pin>;
+ };
+
+ /* P2_05 (ZCZ ball T17) uart */
+ P2_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P2_05_default_pin>;
+ pinctrl-1 = <&P2_05_gpio_pin>;
+ pinctrl-2 = <&P2_05_gpio_pu_pin>;
+ pinctrl-3 = <&P2_05_gpio_pd_pin>;
+ pinctrl-4 = <&P2_05_gpio_input_pin>;
+ pinctrl-5 = <&P2_05_uart_pin>;
+ };
+
+ /* P2_06 (ZCZ ball U16) */
+ P2_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_06_default_pin>;
+ pinctrl-1 = <&P2_06_gpio_pin>;
+ pinctrl-2 = <&P2_06_gpio_pu_pin>;
+ pinctrl-3 = <&P2_06_gpio_pd_pin>;
+ pinctrl-4 = <&P2_06_gpio_input_pin>;
+ };
+
+ /* P2_07 (ZCZ ball U17) uart */
+ P2_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P2_07_default_pin>;
+ pinctrl-1 = <&P2_07_gpio_pin>;
+ pinctrl-2 = <&P2_07_gpio_pu_pin>;
+ pinctrl-3 = <&P2_07_gpio_pd_pin>;
+ pinctrl-4 = <&P2_07_gpio_input_pin>;
+ pinctrl-5 = <&P2_07_uart_pin>;
+ };
+
+ /* P2_08 (ZCZ ball U18) */
+ P2_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_08_default_pin>;
+ pinctrl-1 = <&P2_08_gpio_pin>;
+ pinctrl-2 = <&P2_08_gpio_pu_pin>;
+ pinctrl-3 = <&P2_08_gpio_pd_pin>;
+ pinctrl-4 = <&P2_08_gpio_input_pin>;
+ };
+
+ /* P2_09 (ZCZ ball D15) i2c */
+ P2_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P2_09_default_pin>;
+ pinctrl-1 = <&P2_09_gpio_pin>;
+ pinctrl-2 = <&P2_09_gpio_pu_pin>;
+ pinctrl-3 = <&P2_09_gpio_pd_pin>;
+ pinctrl-4 = <&P2_09_gpio_input_pin>;
+ pinctrl-5 = <&P2_09_uart_pin>;
+ pinctrl-6 = <&P2_09_can_pin>;
+ pinctrl-7 = <&P2_09_i2c_pin>;
+ pinctrl-8 = <&P2_09_pru_uart_pin>;
+ pinctrl-9 = <&P2_09_pruin_pin>;
+ };
+
+ /* P2_10 (ZCZ ball R14) */
+ P2_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P2_10_default_pin>;
+ pinctrl-1 = <&P2_10_gpio_pin>;
+ pinctrl-2 = <&P2_10_gpio_pu_pin>;
+ pinctrl-3 = <&P2_10_gpio_pd_pin>;
+ pinctrl-4 = <&P2_10_gpio_input_pin>;
+ pinctrl-5 = <&P2_10_qep_pin>;
+ };
+
+ /* P2_11 (ZCZ ball D16) i2c */
+ P2_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P2_11_default_pin>;
+ pinctrl-1 = <&P2_11_gpio_pin>;
+ pinctrl-2 = <&P2_11_gpio_pu_pin>;
+ pinctrl-3 = <&P2_11_gpio_pd_pin>;
+ pinctrl-4 = <&P2_11_gpio_input_pin>;
+ pinctrl-5 = <&P2_11_uart_pin>;
+ pinctrl-6 = <&P2_11_can_pin>;
+ pinctrl-7 = <&P2_11_i2c_pin>;
+ pinctrl-8 = <&P2_11_pru_uart_pin>;
+ pinctrl-9 = <&P2_11_pruin_pin>;
+ };
+
+ /* P2_12 POWER_BUTTON */
+
+ /* P2_13 VOUT-5V */
+
+ /* P2_14 BAT-VIN */
+
+ /* P2_15 GND */
+
+ /* P2_16 BAT-TEMP */
+
+ /* P2_17 (ZCZ ball V12) */
+ P2_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_17_default_pin>;
+ pinctrl-1 = <&P2_17_gpio_pin>;
+ pinctrl-2 = <&P2_17_gpio_pu_pin>;
+ pinctrl-3 = <&P2_17_gpio_pd_pin>;
+ pinctrl-4 = <&P2_17_gpio_input_pin>;
+ };
+
+ /* P2_18 (ZCZ ball U13) */
+ P2_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
+ pinctrl-0 = <&P2_18_default_pin>;
+ pinctrl-1 = <&P2_18_gpio_pin>;
+ pinctrl-2 = <&P2_18_gpio_pu_pin>;
+ pinctrl-3 = <&P2_18_gpio_pd_pin>;
+ pinctrl-4 = <&P2_18_gpio_input_pin>;
+ pinctrl-5 = <&P2_18_qep_pin>;
+ pinctrl-6 = <&P2_18_pru_ecap_pin>;
+ pinctrl-7 = <&P2_18_pruin_pin>;
+ };
+
+ /* P2_19 (ZCZ ball U12) */
+ P2_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P2_19_default_pin>;
+ pinctrl-1 = <&P2_19_gpio_pin>;
+ pinctrl-2 = <&P2_19_gpio_pu_pin>;
+ pinctrl-3 = <&P2_19_gpio_pd_pin>;
+ pinctrl-4 = <&P2_19_gpio_input_pin>;
+ pinctrl-5 = <&P2_19_pwm_pin>;
+ };
+
+ /* P2_20 (ZCZ ball T13) */
+ P2_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_20_default_pin>;
+ pinctrl-1 = <&P2_20_gpio_pin>;
+ pinctrl-2 = <&P2_20_gpio_pu_pin>;
+ pinctrl-3 = <&P2_20_gpio_pd_pin>;
+ pinctrl-4 = <&P2_20_gpio_input_pin>;
+ };
+
+ /* P2_21 GND */
+
+ /* P2_22 (ZCZ ball V13) */
+ P2_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
+ pinctrl-0 = <&P2_22_default_pin>;
+ pinctrl-1 = <&P2_22_gpio_pin>;
+ pinctrl-2 = <&P2_22_gpio_pu_pin>;
+ pinctrl-3 = <&P2_22_gpio_pd_pin>;
+ pinctrl-4 = <&P2_22_gpio_input_pin>;
+ pinctrl-5 = <&P2_22_qep_pin>;
+ pinctrl-6 = <&P2_22_pruin_pin>;
+ };
+
+ /* P2_23 VOUT-3.3V */
+
+ /* P2_24 (ZCZ ball T12) */
+ P2_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P2_24_default_pin>;
+ pinctrl-1 = <&P2_24_gpio_pin>;
+ pinctrl-2 = <&P2_24_gpio_pu_pin>;
+ pinctrl-3 = <&P2_24_gpio_pd_pin>;
+ pinctrl-4 = <&P2_24_gpio_input_pin>;
+ pinctrl-5 = <&P2_24_qep_pin>;
+ pinctrl-6 = <&P2_24_pruout_pin>;
+ };
+
+ /* P2_25 (ZCZ ball E17) spi */
+ P2_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "spi_cs", "uart", "can", "i2c";
+ pinctrl-0 = <&P2_25_default_pin>;
+ pinctrl-1 = <&P2_25_gpio_pin>;
+ pinctrl-2 = <&P2_25_gpio_pu_pin>;
+ pinctrl-3 = <&P2_25_gpio_pd_pin>;
+ pinctrl-4 = <&P2_25_gpio_input_pin>;
+ pinctrl-5 = <&P2_25_spi_pin>;
+ pinctrl-6 = <&P2_25_spi_cs_pin>;
+ pinctrl-7 = <&P2_25_uart_pin>;
+ pinctrl-8 = <&P2_25_can_pin>;
+ pinctrl-9 = <&P2_25_i2c_pin>;
+ };
+
+ /* P2_26 RESET# */
+
+ /* P2_27 (ZCZ ball E18) spi */
+ P2_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "can", "i2c";
+ pinctrl-0 = <&P2_27_default_pin>;
+ pinctrl-1 = <&P2_27_gpio_pin>;
+ pinctrl-2 = <&P2_27_gpio_pu_pin>;
+ pinctrl-3 = <&P2_27_gpio_pd_pin>;
+ pinctrl-4 = <&P2_27_gpio_input_pin>;
+ pinctrl-5 = <&P2_27_spi_pin>;
+ pinctrl-6 = <&P2_27_uart_pin>;
+ pinctrl-7 = <&P2_27_can_pin>;
+ pinctrl-8 = <&P2_27_i2c_pin>;
+ };
+
+ /* P2_28 (ZCZ ball D13) pruin */
+ P2_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P2_28_default_pin>;
+ pinctrl-1 = <&P2_28_gpio_pin>;
+ pinctrl-2 = <&P2_28_gpio_pu_pin>;
+ pinctrl-3 = <&P2_28_gpio_pd_pin>;
+ pinctrl-4 = <&P2_28_gpio_input_pin>;
+ pinctrl-5 = <&P2_28_qep_pin>;
+ pinctrl-6 = <&P2_28_pruout_pin>;
+ pinctrl-7 = <&P2_28_pruin_pin>;
+ };
+
+ /* P2_29 (ZCZ ball C18) spi_sclk */
+ P2_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
+ pinctrl-0 = <&P2_29_default_pin>;
+ pinctrl-1 = <&P2_29_gpio_pin>;
+ pinctrl-2 = <&P2_29_gpio_pu_pin>;
+ pinctrl-3 = <&P2_29_gpio_pd_pin>;
+ pinctrl-4 = <&P2_29_gpio_input_pin>;
+ pinctrl-5 = <&P2_29_spi_cs_pin>;
+ pinctrl-6 = <&P2_29_spi_sclk_pin>;
+ pinctrl-7 = <&P2_29_uart_pin>;
+ pinctrl-8 = <&P2_29_pwm_pin>;
+ pinctrl-9 = <&P2_29_pru_ecap_pin>;
+ };
+
+ /* P2_30 (ZCZ ball C12) pruin */
+ P2_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P2_30_default_pin>;
+ pinctrl-1 = <&P2_30_gpio_pin>;
+ pinctrl-2 = <&P2_30_gpio_pu_pin>;
+ pinctrl-3 = <&P2_30_gpio_pd_pin>;
+ pinctrl-4 = <&P2_30_gpio_input_pin>;
+ pinctrl-5 = <&P2_30_spi_cs_pin>;
+ pinctrl-6 = <&P2_30_pwm_pin>;
+ pinctrl-7 = <&P2_30_pruout_pin>;
+ pinctrl-8 = <&P2_30_pruin_pin>;
+ };
+
+ /* P2_31 (ZCZ ball A15) spi_cs */
+ P2_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pruin";
+ pinctrl-0 = <&P2_31_default_pin>;
+ pinctrl-1 = <&P2_31_gpio_pin>;
+ pinctrl-2 = <&P2_31_gpio_pu_pin>;
+ pinctrl-3 = <&P2_31_gpio_pd_pin>;
+ pinctrl-4 = <&P2_31_gpio_input_pin>;
+ pinctrl-5 = <&P2_31_spi_cs_pin>;
+ pinctrl-6 = <&P2_31_pruin_pin>;
+ };
+
+ /* P2_32 (ZCZ ball D12) pruin */
+ P2_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P2_32_default_pin>;
+ pinctrl-1 = <&P2_32_gpio_pin>;
+ pinctrl-2 = <&P2_32_gpio_pu_pin>;
+ pinctrl-3 = <&P2_32_gpio_pd_pin>;
+ pinctrl-4 = <&P2_32_gpio_input_pin>;
+ pinctrl-5 = <&P2_32_spi_pin>;
+ pinctrl-6 = <&P2_32_pwm_pin>;
+ pinctrl-7 = <&P2_32_pruout_pin>;
+ pinctrl-8 = <&P2_32_pruin_pin>;
+ };
+
+ /* P2_33 (ZCZ ball R12) */
+ P2_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P2_33_default_pin>;
+ pinctrl-1 = <&P2_33_gpio_pin>;
+ pinctrl-2 = <&P2_33_gpio_pu_pin>;
+ pinctrl-3 = <&P2_33_gpio_pd_pin>;
+ pinctrl-4 = <&P2_33_gpio_input_pin>;
+ pinctrl-5 = <&P2_33_qep_pin>;
+ pinctrl-6 = <&P2_33_pruout_pin>;
+ };
+
+ /* P2_34 (ZCZ ball C13) pruin */
+ P2_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P2_34_default_pin>;
+ pinctrl-1 = <&P2_34_gpio_pin>;
+ pinctrl-2 = <&P2_34_gpio_pu_pin>;
+ pinctrl-3 = <&P2_34_gpio_pd_pin>;
+ pinctrl-4 = <&P2_34_gpio_input_pin>;
+ pinctrl-5 = <&P2_34_qep_pin>;
+ pinctrl-6 = <&P2_34_pruout_pin>;
+ pinctrl-7 = <&P2_34_pruin_pin>;
+ };
+
+ /* P2_35 (ZCZ ball U5) gpio_input */
+ P2_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P2_35_default_pin>;
+ pinctrl-1 = <&P2_35_gpio_pin>;
+ pinctrl-2 = <&P2_35_gpio_pu_pin>;
+ pinctrl-3 = <&P2_35_gpio_pd_pin>;
+ pinctrl-4 = <&P2_35_gpio_input_pin>;
+ pinctrl-5 = <&P2_35_pruout_pin>;
+ pinctrl-6 = <&P2_35_pruin_pin>;
+ };
+
+ /* P2_36 (ZCZ ball C9) AIN7 */
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P1_02 {
+ gpio-name = "P1_02";
+ gpio = <&gpio2 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_04 {
+ gpio-name = "P1_04";
+ gpio = <&gpio2 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_06 {
+ gpio-name = "P1_06";
+ gpio = <&gpio0 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_08 {
+ gpio-name = "P1_08";
+ gpio = <&gpio0 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_10 {
+ gpio-name = "P1_10";
+ gpio = <&gpio0 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_12 {
+ gpio-name = "P1_12";
+ gpio = <&gpio0 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_20 {
+ gpio-name = "P1_20";
+ gpio = <&gpio0 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_26 {
+ gpio-name = "P1_26";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_28 {
+ gpio-name = "P1_28";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_29 {
+ gpio-name = "P1_29";
+ gpio = <&gpio3 21 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_30 {
+ gpio-name = "P1_30";
+ gpio = <&gpio1 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_31 {
+ gpio-name = "P1_31";
+ gpio = <&gpio3 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_32 {
+ gpio-name = "P1_32";
+ gpio = <&gpio1 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_33 {
+ gpio-name = "P1_33";
+ gpio = <&gpio3 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_34 {
+ gpio-name = "P1_34";
+ gpio = <&gpio0 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_35 {
+ gpio-name = "P1_35";
+ gpio = <&gpio2 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_36 {
+ gpio-name = "P1_36";
+ gpio = <&gpio3 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_01 {
+ gpio-name = "P2_01";
+ gpio = <&gpio1 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_02 {
+ gpio-name = "P2_02";
+ gpio = <&gpio1 27 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_03 {
+ gpio-name = "P2_03";
+ gpio = <&gpio0 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_04 {
+ gpio-name = "P2_04";
+ gpio = <&gpio1 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_05 {
+ gpio-name = "P2_05";
+ gpio = <&gpio0 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_06 {
+ gpio-name = "P2_06";
+ gpio = <&gpio1 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_07 {
+ gpio-name = "P2_07";
+ gpio = <&gpio0 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_08 {
+ gpio-name = "P2_08";
+ gpio = <&gpio1 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_09 {
+ gpio-name = "P2_09";
+ gpio = <&gpio0 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_10 {
+ gpio-name = "P2_10";
+ gpio = <&gpio1 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_11 {
+ gpio-name = "P2_11";
+ gpio = <&gpio0 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_17 {
+ gpio-name = "P2_17";
+ gpio = <&gpio2 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_18 {
+ gpio-name = "P2_18";
+ gpio = <&gpio1 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_19 {
+ gpio-name = "P2_19";
+ gpio = <&gpio0 27 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_20 {
+ gpio-name = "P2_20";
+ gpio = <&gpio2 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_22 {
+ gpio-name = "P2_22";
+ gpio = <&gpio1 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_24 {
+ gpio-name = "P2_24";
+ gpio = <&gpio1 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_25 {
+ gpio-name = "P2_25";
+ gpio = <&gpio1 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_27 {
+ gpio-name = "P2_27";
+ gpio = <&gpio1 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_28 {
+ gpio-name = "P2_28";
+ gpio = <&gpio3 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_29 {
+ gpio-name = "P2_29";
+ gpio = <&gpio0 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_30 {
+ gpio-name = "P2_30";
+ gpio = <&gpio3 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_31 {
+ gpio-name = "P2_31";
+ gpio = <&gpio0 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_32 {
+ gpio-name = "P2_32";
+ gpio = <&gpio3 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_33 {
+ gpio-name = "P2_33";
+ gpio = <&gpio1 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_34 {
+ gpio-name = "P2_34";
+ gpio = <&gpio3 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_35 {
+ gpio-name = "P2_35";
+ gpio = <&gpio2 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-sancloud-bbe.dts b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
new file mode 100644
index 0000000..0bd1489
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-boneblack-common.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+/* #include "am335x-bone-jtag.dtsi" */
+
+/ {
+ model = "SanCloud BeagleBone Enhanced";
+ compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&mmc2 {
+ ti,vcc-aux-disable-is-sleep;
+};
+
+&am33xx_pinmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_hub_ctrl>;
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
+ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
+ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
+ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
+ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
+ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
+ 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
+ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
+ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
+ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ usb_hub_ctrl: usb_hub_ctrl {
+ pinctrl-single,pins = <
+ 0x144 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */
+ >;
+ };
+
+ mpu6050_pins: pinmux_mpu6050_pins {
+ pinctrl-single,pins = <
+ 0x168 (PIN_INPUT | MUX_MODE7) /* spi0_sclk.gpio0_2 */
+ >;
+ };
+
+ lps3331ap_pins: pinmux_lps3331ap_pins {
+ pinctrl-single,pins = <
+ 0x6C (PIN_INPUT | MUX_MODE7) /* conf_gpmc_a11.gpio1_27 */
+ >;
+ };
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "rgmii-txid";
+};
+
+&i2c0 {
+ lps331ap: lps331ap@5C {
+ compatible = "st,lps331ap";
+ st,drdy-int-pin = <1>;
+ reg = <0x5C>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <27 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ mpu6050: mpu6050@68 {
+ compatible = "invensense,mpu6050";
+ reg = <0x68>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+ //orientation = <0xff 0 0 0 1 0 0 0 0xff>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-som-common.dtsi b/arch/arm/boot/dts/am335x-som-common.dtsi
new file mode 100644
index 0000000..fb4399b
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-som-common.dtsi
@@ -0,0 +1,465 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_fixed>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>; /* 512 MB */
+ };
+
+ ocp {
+ uart0: serial@44e09000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+ };
+ uart1: serial@48022000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+
+ };
+ uart4: serial@481a8000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+ status = "okay";
+ };
+
+ epwmss0: epwmss@48300000 {
+ status = "okay";
+
+ ecap0: ecap@48300100 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&ecap0_pins_default>;
+ pinctrl-1 = <&ecap0_pins_sleep>;
+ };
+ };
+
+ musb: usb@47400000 {
+ status = "okay";
+
+ control@44e10000 {
+ status = "okay";
+ };
+
+ usb-phy@47401300 {
+ status = "okay";
+ };
+
+ usb-phy@47401b00 {
+ status = "okay";
+ };
+
+ usb@47401000 {
+ status = "okay";
+ dr_mode = "otg";
+ };
+
+ usb@47401800 {
+ status = "okay";
+ dr_mode = "host";
+ };
+
+ dma-controller@07402000 {
+ status = "okay";
+ };
+ };
+
+ i2c0: i2c@44e0b000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+ clock-frequency = <100000>;
+
+ tps: tps@24 {
+ reg = <0x24>;
+ };
+ };
+ };
+
+ vmmcsd_fixed: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmcsd_fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ dcdc2_fixed: fixedregulator@1 {
+ /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
+ compatible = "regulator-fixed";
+ regulator-name = "dcdc2_fixed";
+
+ regulator-min-microvolt = <1378000>;
+ regulator-max-microvolt = <1378000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds_s0>;
+
+ compatible = "gpio-leds";
+
+ led@1 {
+ label = "led1:green:heartbeat";
+ gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led@2 {
+ label = "led2:red:heartbeat";
+ gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led@3 {
+ label = "led3:yello:heartbeat";
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led@4 {
+ label = "bkl";
+ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&ecap0 0 500000 1>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7 8 9
+ 10 11 12 13 14 15 16 17 18 19
+ 20 21 22 23 24 25 26 27 28 29
+ 30 31 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47 48 49
+ 50 51 52 53 54 55 56 57 58 59
+ 60 61 62 63 64 65 66 67 68 69
+ 70 71 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87 88 89
+ 90 91 92 93 94 95 96 97 98 99
+ 100
+ >;
+ default-brightness-level = <50>;
+ };
+};
+
+&am33xx_pinmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&clkout2_pin>;
+
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ 0x1b0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* xdma_event_intr0.gpio0_19 */
+ 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_20 */
+ 0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr1.gpio3_21 */
+ 0x1a4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_fsr.gpio3[19], INPUT_PULLDOWN | MODE7 */
+ >;
+ };
+
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+ >;
+ };
+
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ 0x168 (PIN_INPUT_PULLUP | MUX_MODE1)
+ 0x16c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)
+ >;
+ };
+
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0)
+ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+ >;
+ };
+
+
+
+ clkout2_pin: pinmux_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* xdma_event_intr1.clkout2 */
+ >;
+ };
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
+ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
+ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
+ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
+ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
+ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
+ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
+ 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
+ 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
+ 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
+ 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
+ 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
+ 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
+
+ 0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a0.gmii2_txen, OUTPUT_PULLDOWN | MODE1 */
+ 0x044 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a1.gmii2_rxdv, INPUT_PULLDOWN | MODE1 */
+ 0x048 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a2.gmii2_txd3, OUTPUT_PULLDOWN | MODE1 */
+ 0x04c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a3.gmii2_txd2, OUTPUT_PULLDOWN | MODE1 */
+ 0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a4.gmii2_txd1, OUTPUT_PULLDOWN | MODE1 */
+ 0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a5.gmii2_txd0, OUTPUT_PULLDOWN | MODE1 */
+ 0x058 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a6.gmii2_txclk, INPUT_PULLDOWN | MODE1 */
+ 0x05c (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a7.gmii2_rxclk, INPUT_PULLDOWN | MODE1 */
+ 0x060 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a8.gmii2_rxd3, INPUT_PULLDOWN | MODE1 */
+ 0x064 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a9.gmii2_rxd2, INPUT_PULLDOWN | MODE1 */
+ 0x068 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a10.gmii2_rxd1, INPUT_PULLDOWN | MODE1 */
+ 0x06c (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a11.gmii2_rxd0, INPUT_PULLDOWN | MODE1 */
+ 0x070 (PIN_INPUT_PULLUP | MUX_MODE1 ) /* gpmc_wait0.gmii2_crs, INPUT_PULLUP | MODE1 */
+ 0x074 (PIN_INPUT_PULLUP | MUX_MODE1 ) /* gpmc_wpn.gmii2_rxer, INPUT_PULLUP | MODE1 */
+ 0x078 (PIN_INPUT_PULLUP | MUX_MODE1 ) /* gpmc_ben1.gmii2_col, INPUT_PULLUP | MODE1 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+
+ 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x074 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x078 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ mmc1_pins_default: pinmux_mmc1_pins {
+ pinctrl-single,pins = <
+ 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
+ 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
+ 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
+ 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
+ 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
+ 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
+ 0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18 */
+ 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+ >;
+ };
+
+ mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
+ pinctrl-single,pins = <
+ 0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ emmc_pins: pinmux_emmc_pins {
+ pinctrl-single,pins = <
+ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+ 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+ 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+ 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+ >;
+ };
+
+ ecap0_pins_default: backlight_pins {
+ pinctrl-single,pins = <
+ 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+ >;
+ };
+
+ ecap0_pins_sleep: ecap0_pins_sleep {
+ pinctrl-single,pins = <
+ 0x164 (PULL_DISABLE | MUX_MODE7) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
+ >;
+ };
+ dcan0_default: dcan0_default_pins {
+ pinctrl-single,pins = <
+ 0x178 0x0a /* uart1_ctsn.dcan0_tx_mux2, OUTPUT | MODE2 */
+ 0x17c 0x2a /* uart1_rtsn.dcan0_rx_mux2, INPUT | MODE2 */
+ >;
+ };
+ };
+
+&tps {
+ compatible = "ti,tps65217";
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dcdc1_reg: regulator@0 {
+ reg = <0>;
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator@1 {
+ reg = <1>;
+ /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1378000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator@2 {
+ reg = <2>;
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@3 {
+ reg = <3>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ reg = <4>;
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@5 {
+ reg = <5>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@6 {
+ reg = <6>;
+ regulator-always-on;
+ };
+ };
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "mii";
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <1>;
+ phy-mode = "mii";
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ slaves = <2>;
+ dual_emac = <1>;
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+};
+
+&mmc1 {
+ status = "okay";
+ bus-width = <0x4>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&mmc1_pins_default>;
+ pinctrl-1 = <&mmc1_pins_sleep>;
+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+};
+
+&dcan0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&dcan0_default>;
+ status = "okay";
+};
+
+&tscadc {
+ status = "okay";
+ tsc {
+ ti,wires = <4>;
+ ti,x-plate-resistance = <200>;
+ ti,coordinate-readouts = <5>;
+ ti,wire-config = <0x00 0x11 0x22 0x33>;
+ };
+
+ adc {
+ ti,adc-channels = <0 1 2 3>;
+ };
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index abf5b86..5043535 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -37,8 +37,8 @@
phy1 = &usb1_phy;
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
- spi0 = &spi0;
- spi1 = &spi1;
+ spi1 = &spi0;
+ spi2 = &spi1;
};
cpus {
@@ -159,7 +159,7 @@
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
- ocp {
+ ocp: ocp {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -306,6 +306,39 @@
#interrupt-cells = <2>;
reg = <0x44e07000 0x1000>;
interrupts = <96>;
+ gpio-line-names =
+ "MDIO_DATA", // 0
+ "MDIO_CLK", // 1
+ "SPI0_SCLK", // 2
+ "SPI0_D0", // 3
+ "SPI0_D1", // 4
+ "SPI0_CS0", // 5
+ "SPI0_CS1", // 6
+ "ECAP0_IN_PWM0_OUT", // 7
+ "LCD_DATA12", // 8
+ "LCD_DATA13", // 9
+ "LCD_DATA14", // 10
+ "LCD_DATA15", // 11
+ "UART1_CTSN", // 12
+ "UART1_RTSN", // 13
+ "UART1_RXD", // 14
+ "UART1_TXD", // 15
+ "GMII1_TXD3", // 16
+ "GMII1_TXD2", // 17
+ "USB0_DRVVBUS", // 18
+ "XDMA_EVENT_INTR0", // 19
+ "XDMA_EVENT_INTR1", // 20
+ "GMII1_TXD1", // 21
+ "GPMC_AD8", // 22
+ "GPMC_AD9", // 23
+ "NC", // 24
+ "NC", // 25
+ "GPMC_AD10", // 26
+ "GPMC_AD11", // 27
+ "GMII1_TXD0", // 28
+ "RMII1_REFCLK", // 29
+ "GPMC_WAIT0", // 30
+ "GPMC_WPN"; // 31
};
gpio1: gpio@4804c000 {
@@ -317,6 +350,39 @@
#interrupt-cells = <2>;
reg = <0x4804c000 0x1000>;
interrupts = <98>;
+ gpio-line-names =
+ "GPMC_AD0", // 0
+ "GPMC_AD1", // 1
+ "GPMC_AD2", // 2
+ "GPMC_AD3", // 3
+ "GPMC_AD4", // 4
+ "GPMC_AD5", // 5
+ "GPMC_AD6", // 6
+ "GPMC_AD7", // 7
+ "UART0_CTSN", // 8
+ "UART0_RTSN", // 9
+ "UART0_RXD", // 10
+ "UART0_TXD", // 11
+ "GPMC_AD12", // 12
+ "GPMC_AD13", // 13
+ "GPMC_AD14", // 14
+ "GPMC_AD15", // 15
+ "GPMC_A0", // 16
+ "GPMC_A1", // 17
+ "GPMC_A2", // 18
+ "GPMC_A3", // 19
+ "GPMC_A4", // 20
+ "GPMC_A5", // 21
+ "GPMC_A6", // 22
+ "GPMC_A7", // 23
+ "GPMC_A8", // 24
+ "GPMC_A9", // 25
+ "GPMC_A10", // 26
+ "GPMC_A11", // 27
+ "GPMC_BE1N", // 28
+ "GPMC_CSN0", // 29
+ "GPMC_CSN1", // 30
+ "GPMC_CSN2"; // 31
};
gpio2: gpio@481ac000 {
@@ -328,6 +394,39 @@
#interrupt-cells = <2>;
reg = <0x481ac000 0x1000>;
interrupts = <32>;
+ gpio-line-names =
+ "GPMC_CSN3", // 0
+ "GPMC_CLK", // 1
+ "GPMC_ADVN_ALE", // 2
+ "GPMC_OEN_REN", // 3
+ "GPMC_WEN", // 4
+ "GPMC_BE0N_CLE", // 5
+ "LCD_DATA0", // 6
+ "LCD_DATA1", // 7
+ "LCD_DATA2", // 8
+ "LCD_DATA3", // 9
+ "LCD_DATA4", // 10
+ "LCD_DATA5", // 11
+ "LCD_DATA6", // 12
+ "LCD_DATA7", // 13
+ "LCD_DATA8", // 14
+ "LCD_DATA9", // 15
+ "LCD_DATA10", // 16
+ "LCD_DATA11", // 17
+ "GMII1_RXD3", // 18
+ "GMII1_RXD2", // 19
+ "GMII1_RXD1", // 20
+ "GMII1_RXD0", // 21
+ "LCD_VSYNC", // 22
+ "LCD_HSYNC", // 23
+ "LCD_PCLK", // 24
+ "LCD_AC_BIAS_EN", // 25
+ "MMC0_DAT3", // 26
+ "MMC0_DAT2", // 27
+ "MMC0_DAT1", // 28
+ "MMC0_DAT0", // 29
+ "MMC0_CLK", // 30
+ "MMC0_CMD"; // 31
};
gpio3: gpio@481ae000 {
@@ -339,6 +438,39 @@
#interrupt-cells = <2>;
reg = <0x481ae000 0x1000>;
interrupts = <62>;
+ gpio-line-names =
+ "GMII1_COL", // 0
+ "GMII1_CRS", // 1
+ "GMII1_RXER", // 2
+ "GMII1_TXEN", // 3
+ "GMII1_RXDV", // 4
+ "I2C0_SDA", // 5
+ "I2C0_SCL", // 6
+ "EMU0", // 7
+ "EMU1", // 8
+ "GMII1_TXCLK", // 9
+ "GMII1_RXCLK", // 10
+ "NC", // 11
+ "NC", // 12
+ "USB1_DRVVBUS", // 13
+ "MCASP0_ACLKX", // 14
+ "MCASP0_FSX", // 15
+ "MCASP0_AXR0", // 16
+ "MCASP0_AHCLKR", // 17
+ "MCASP0_ACLKR", // 18
+ "MCASP0_FSR", // 19
+ "MCASP0_AXR1", // 20
+ "MCASP0_AHCLKX", // 21
+ "NC", // 22
+ "NC", // 23
+ "NC", // 24
+ "NC", // 25
+ "NC", // 26
+ "NC", // 27
+ "NC", // 28
+ "NC", // 29
+ "NC", // 30
+ "NC"; // 31
};
uart0: serial@44e09000 {
@@ -575,6 +707,17 @@
ti,timer-pwm;
};
+ pruss: pruss@4a300000 {
+ compatible = "ti,pruss-v2";
+ ti,hwmods = "pruss";
+ ti,deassert-hard-reset = "pruss", "pruss";
+ reg = <0x4a300000 0x080000>;
+ ti,pintc-offset = <0x20000>;
+ interrupt-parent = <&intc>;
+ status = "disabled";
+ interrupts = <20 21 22 23 24 25 26 27>;
+ };
+
rtc: rtc@44e3e000 {
compatible = "ti,am3352-rtc", "ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
@@ -770,6 +913,16 @@
status = "disabled";
};
+ eqep0: eqep@0x48300180 {
+ compatible = "ti,am33xx-eqep";
+ reg = <0x48300180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "fck";
+ interrupt-parent = <&intc>;
+ interrupts = <79>;
+ status = "disabled";
+ };
+
ehrpwm0: pwm@48300200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
@@ -804,6 +957,16 @@
status = "disabled";
};
+ eqep1: eqep@0x48302180 {
+ compatible = "ti,am33xx-eqep";
+ reg = <0x48302180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "fck";
+ interrupt-parent = <&intc>;
+ interrupts = <88>;
+ status = "disabled";
+ };
+
ehrpwm1: pwm@48302200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
@@ -838,6 +1001,16 @@
status = "disabled";
};
+ eqep2: eqep@0x48304180 {
+ compatible = "ti,am33xx-eqep";
+ reg = <0x48304180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "fck";
+ interrupt-parent = <&intc>;
+ interrupts = <89>;
+ status = "disabled";
+ };
+
ehrpwm2: pwm@48304200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
index ad95311..cefaa26 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -167,6 +167,10 @@
};
};
+&bb2d {
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
clock-frequency = <400000>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index e03495a..45c468a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1028,6 +1028,16 @@
ti,hwmods = "dmm";
};
+ bb2d: bb2d@59000000 {
+ compatible = "ti,dra7-bb2d","vivante,gc";
+ reg = <0x59000000 0x0700>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "bb2d";
+ clocks = <&dpll_core_h24x2_ck>;
+ clock-names = "fclk";
+ status = "disabled";
+ };
+
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>;
diff --git b/arch/arm/boot/dts/exynos5422-artik10-eval.dts b/arch/arm/boot/dts/exynos5422-artik10-eval.dts
new file mode 100644
index 0000000..1001255
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-artik10-eval.dts
@@ -0,0 +1,278 @@
+/*
+ * SAMSUNG ARTIK10 board device tree source
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+
+#include <dt-bindings/clock/samsung,s2mps11.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/samsung-i2s.h>
+#include "exynos5800.dtsi"
+#include "exynos5422-cpus.dtsi"
+#include "exynos-mfc-reserved-memory.dtsi"
+
+/ {
+ model = "Samsung ARTIK10 board based on EXYNOS5422";
+ compatible = "samsung,artik10", "samsung,exynos5422", "samsung,exynos5";
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x7EA00000>;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ firmware@02073000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x02073000 0x1000>;
+ };
+
+ fixed-rate-clocks {
+ oscclk {
+ compatible = "samsung,exynos5420-oscclk";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ rtc {
+ status = "okay";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&buck6_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&pinctrl_0 {
+ s2mps11_irq: s2mps11-irq {
+ samsung,pins = "gpx3-2";
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <3>;
+ };
+};
+
+&hsi2c_4 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ s2mps11_pmic@66 {
+ compatible = "samsung,s2mps11-pmic";
+ interrupt-parent = <&gpx3>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ reg = <0x66>;
+
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&s2mps11_irq>;
+
+ s2mps11_osc: clocks {
+ #clock-cells = <1>;
+ clock-output-names = "s2mps11_ap",
+ "s2mps11_cp", "s2mps11_bt";
+ };
+
+ regulators {
+ ldo4_reg: LDO4 {
+ regulator-name = "vdd_adc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "vdd_ldo6";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "vdd_ldo7";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "vqmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "vdd_ldo17";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo18_reg: LDO18 {
+ regulator-name = "vdd_ldo18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo19_reg: LDO19 {
+ regulator-name = "vmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "vdd_ldo20";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo23_reg: LDO23 {
+ regulator-name = "vdd_mifs";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "vdd_ldo24";
+ regulator-min-microvolt = <2400000>;
+ regulator-max-microvolt = <2400000>;
+ };
+
+ ldo25_reg: LDO25 {
+ regulator-name = "vdd_ldo25";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo27_reg: LDO27 {
+ regulator-name = "vdd_g3ds";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ ldo28_reg: LDO28 {
+ regulator-name = "vdd_ldo28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo32_reg: LDO32 {
+ regulator-name = "vdd_lcd_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "vdd_ldo38";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ buck1_reg: BUCK1 {
+ regulator-name = "vdd_mif";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "vdd_eagle";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "vdd_int";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "vdd_g3d";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "vdd_kfc";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "vdd_cam_isp_1.0v";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&mmc_0 {
+ status = "okay";
+ broken-cd;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-hs400-timing = <0 2>;
+ samsung,read-strobe-delay = <90>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8
+ &sd0_rclk>;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ keep-power-in-suspend;
+ non-removable;
+};
+
+&mmc_2 {
+ status = "okay";
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <2 3>;
+ samsung,dw-mshc-ddr-timing = <1 2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ vmmc-supply = <&ldo28_reg>;
+};
+
+&nocp_mem0_0 {
+ status = "okay";
+};
+
+&nocp_mem0_1 {
+ status = "okay";
+};
+
+&nocp_mem1_0 {
+ status = "okay";
+};
+
+&nocp_mem1_1 {
+ status = "okay";
+};
diff --git b/arch/arm/boot/dts/imx6q-ccimx6sbc.dts b/arch/arm/boot/dts/imx6q-ccimx6sbc.dts
new file mode 100644
index 0000000..29b6b8e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-ccimx6sbc.dts
@@ -0,0 +1,302 @@
+/*
+ * Copyright (C) 2015 Robert Nelson (robertcnelson@gmail.com)
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "imx6q.dtsi"
+
+/ {
+ model = "Digi ConnectCore-i.MX6 SBC Board";
+ compatible = "digi,connectcore/q", "fsl,imx6q";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ memory {
+ reg = <0x10000000 0x40000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_usbh1_reset: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1>;
+ regulator-name = "usbh1_reset";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb_otg_vbus: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rgmii";
+ phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ pmic@58 {
+ compatible = "dlg,da9063";
+ reg = <0x58>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <17 0x8>; /* active-low GPIO0_17 */
+
+ regulators {
+ vdd_3v3_reg: bperi {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo3_reg: ldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: ldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo6_reg: ldo6 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo7_reg: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo8_reg: ldo8 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-ccimx6sbc {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* da9063*/
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ /* Phy reset */
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbh1: usbh1grp {
+ fsl,pins = <
+ /* need to force low for hub reset */
+ MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x10b0
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
+ /* power enable, high active */
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x10b0
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+ >;
+ };
+ };
+};
+
+&sata {
+ status = "okay";
+};
+
+&ssi1 {
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usbh1_reset>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ bus-width = <4>;
+ broken-cd; /* cd & wp, is not wired up on this board */
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
index 855dc6f..8476b89 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
@@ -11,6 +11,24 @@
#include "imx6qdl-wandboard.dtsi"
+/ {
+ rfkill {
+ compatible = "wand,imx6qdl-wandboard-rfkill";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ bluetooth-on = <&gpio3 13 0>;
+ bluetooth-wake = <&gpio3 14 0>;
+ bluetooth-host-wake = <&gpio3 15 0>;
+
+ wifi-ref-on = <&gpio2 29 0>;
+ wifi-rst-n = <&gpio5 2 0>;
+ wifi-reg-on = <&gpio1 26 0>;
+ wifi-host-wake = <&gpio1 29 0>;
+ wifi-wake = <&gpio1 30 0>;
+ };
+};
+
&iomuxc {
pinctrl-0 = <&pinctrl_hog>;
@@ -36,6 +54,5 @@
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
- non-removable;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
index 49a0a55..a909ac6 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
@@ -11,6 +11,24 @@
#include "imx6qdl-wandboard.dtsi"
+/ {
+ rfkill {
+ compatible = "wand,imx6qdl-wandboard-rfkill";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ bluetooth-on = <&gpio5 21 0>;
+ bluetooth-wake = <&gpio5 30 0>;
+ bluetooth-host-wake = <&gpio5 20 0>;
+
+ wifi-ref-on = <&gpio5 31 0>; /* Wifi Power Enable */
+ wifi-rst-n = <&gpio6 0 0>; /* WIFI_ON reset */
+ wifi-reg-on = <&gpio1 26 0>; /* WL_REG_ON */
+ wifi-host-wake = <&gpio1 29 0>; /* WL_HOST_WAKE */
+ wifi-wake = <&gpio1 30 0>; /* WL_WAKE */
+ };
+};
+
&iomuxc {
pinctrl-0 = <&pinctrl_hog>;
diff --git b/arch/arm/boot/dts/imx6ul-14x14-evk-ism43362-b81-evb.dts b/arch/arm/boot/dts/imx6ul-14x14-evk-ism43362-b81-evb.dts
new file mode 100644
index 0000000..891068d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk-ism43362-b81-evb.dts
@@ -0,0 +1,516 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6ul.dtsi"
+
+/ {
+ model = "Freescale i.MX6 UltraLite 14x14 EVK Board";
+ compatible = "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ backlight_display: backlight-display {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 5000000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ status = "okay";
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_sd1_vmmc: sd1_regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "VSD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ wlreg_on: fixedregulator@100 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "wlreg_on";
+ gpio = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <100>;
+ enable-active-high;
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "mx6ul-wm8960";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink_master>;
+ simple-audio-card,frame-master = <&dailink_master>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Line", "Line In",
+ "Line", "Line Out",
+ "Speaker", "Speaker",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing =
+ "Headphone Jack", "HP_L",
+ "Headphone Jack", "HP_R",
+ "Speaker", "SPK_LP",
+ "Speaker", "SPK_LN",
+ "Speaker", "SPK_RP",
+ "Speaker", "SPK_RN",
+ "LINPUT1", "Mic Jack",
+ "LINPUT3", "Mic Jack",
+ "RINPUT1", "Mic Jack",
+ "RINPUT2", "Mic Jack";
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ };
+
+ dailink_master: simple-audio-card,codec {
+ sound-dai = <&codec>;
+ clocks = <&clks IMX6UL_CLK_SAI2>;
+ };
+ };
+
+ panel {
+ compatible = "innolux,at043tn24";
+ backlight = <&backlight_display>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&display_out>;
+ };
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+ assigned-clock-rates = <786432000>;
+};
+
+&i2c2 {
+ clock_frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ codec: wm8960@1a {
+ #sound-dai-cells = <0>;
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ wlf,shared-lrclk;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ status = "okay";
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@2 {
+ reg = <2>;
+ micrel,led-mode = <1>;
+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
+ clock-names = "rmii-ref";
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ micrel,led-mode = <1>;
+ clocks = <&clks IMX6UL_CLK_ENET2_REF>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ status = "okay";
+
+ port {
+ display_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&qspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi>;
+ status = "okay";
+
+ flash0: n25q256a@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,n25q256a";
+ spi-max-frequency = <29000000>;
+ reg = <0>;
+ };
+};
+
+&sai2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai2>;
+ assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
+ <&clks IMX6UL_CLK_SAI2>;
+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+ assigned-clock-rates = <0>, <12288000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
+&snvs_poweroff {
+ status = "okay";
+};
+
+&tsc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tsc>;
+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ measure-delay-time = <0xffff>;
+ pre-charge-time = <0xfff>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usbphy1 {
+ fsl,tx-d-cal = <106>;
+};
+
+&usbphy2 {
+ fsl,tx-d-cal = <106>;
+};
+
+®_sd1_vmmc {
+ regulator-always-on;
+};
+
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ wakeup-source;
+ vmmc-supply = <®_sd1_vmmc>;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ wakeup-source;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+
+ pinctrl_csi1: csi1grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
+ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
+ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
+ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
+ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
+ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
+ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
+ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
+ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
+ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
+ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
+ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
+ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x17059
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp{
+ fsl,pins = <
+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp{
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
+ MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
+ MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
+ MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
+ MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
+ MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
+ MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
+ /* used for lcd reset */
+ MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
+ >;
+ };
+
+ pinctrl_qspi: qspigrp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1
+ MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
+ MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1
+ MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1
+ MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1
+ MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
+ >;
+ };
+
+ pinctrl_sai2: sai2grp {
+ fsl,pins = <
+ MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
+ MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
+ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
+ MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
+ MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
+ >;
+ };
+
+ pinctrl_sim2: sim2grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD 0xb808
+ MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK 0x31
+ MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B 0xb808
+ MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN 0xb808
+ MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD 0xb809
+ MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x3008
+ >;
+ };
+
+ pinctrl_tsc: tscgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
+ MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
+ MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */
+ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x3029
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x3029
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x3029
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
+ >;
+ };
+};
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index d80587d..c913e1c 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -155,6 +155,7 @@
};
etb@5401b000 {
+ status = "disabled";
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x5401b000 0x1000>;
@@ -169,6 +170,7 @@
};
etm@54010000 {
+ status = "disabled";
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x54010000 0x1000>;
@@ -214,6 +216,25 @@
>;
};
+ spi3_pins: pinmux_spi3_pins {
+ pinctrl-single,pins = <
+ 0x128 (PIN_INPUT | MUX_MODE1) /* sdmmc2_clk.mcspi3_clk gpio_130 */
+ 0x12a (PIN_OUTPUT | MUX_MODE1) /* sdmmc2_cmd.mcspi3_simo gpio_131 */
+ 0x12c (PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat0.mcspi3_somi gpio_132 */
+ 0x130 (PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat2.mcspi3_cs1 gpio_134 */
+ 0x132 (PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat3.mcspi3_cs0 gpio_135 */
+ >;
+ };
+
+ spi4_pins: pinmux_spi4_pins {
+ pinctrl-single,pins = <
+ 0x15c (PIN_INPUT | MUX_MODE1) /* mcbsp1_clkr.mcspi4_clk gpio_156 */
+ 0x160 (PIN_OUTPUT | MUX_MODE1) /* mcbsp1_dx.mcspi4_simo gpio_158 */
+ 0x162 (PIN_INPUT_PULLUP | MUX_MODE1) /* mcbsp1_dr.mcspi4_somi gpio_159 */
+ 0x166 (PIN_OUTPUT | MUX_MODE1) /* mcbsp1_fsx.mcspi4_cs0 gpio_161 */
+ >;
+ };
+
hsusb2_pins: pinmux_hsusb2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
@@ -291,7 +312,7 @@
};
twl_power: power {
- compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
+ compatible = "ti,twl4030-power-reset";
ti,use_poweroff;
};
};
@@ -322,6 +343,36 @@
status = "disabled";
};
+&mcspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins>;
+ status = "okay";
+
+ spidev0: spi@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <48000000>;
+ };
+
+ spidev1: spi@1 {
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <48000000>;
+ };
+};
+
+&mcspi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins>;
+ status = "okay";
+
+ spidev2: spi@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <48000000>;
+ };
+};
+
&twl_gpio {
ti,use-leds;
/* pullups: BIT(1) */
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3ca8991..64d6b74 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -142,6 +142,7 @@
};
etb@540000000 {
+ status = "disabled";
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x5401b000 0x1000>;
@@ -156,6 +157,7 @@
};
etm@54010000 {
+ status = "disabled";
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x54010000 0x1000>;
@@ -272,9 +274,18 @@
codec {
};
};
+
+ twl_power: power {
+ compatible = "ti,twl4030-power-reset";
+ ti,use_poweroff;
+ };
};
};
+&i2c2 {
+ clock-frequency = <400000>;
+};
+
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
index f1a6476..63b895b 100644
--- a/arch/arm/boot/dts/omap4-panda-a4.dts
+++ b/arch/arm/boot/dts/omap4-panda-a4.dts
@@ -10,6 +10,18 @@
#include "omap443x.dtsi"
#include "omap4-panda-common.dtsi"
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
&dss_hdmi_pins {
pinctrl-single,pins = <
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 5501d1b..b747c53 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -469,16 +469,6 @@
};
};
-&emif1 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-};
-
-&emif2 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-};
-
&mcbsp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
diff --git b/arch/arm/boot/dts/omap4-panda-es-b3.dts b/arch/arm/boot/dts/omap4-panda-es-b3.dts
new file mode 100644
index 0000000..2f1dabc
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-panda-es-b3.dts
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "omap4460.dtsi"
+#include "omap4-panda-common.dtsi"
+
+/ {
+ model = "TI OMAP4 PandaBoard-ES";
+ compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
+};
+
+/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
+&sound {
+ ti,model = "PandaBoardES";
+
+ /* Audio routing */
+ ti,audio-routing =
+ "Headset Stereophone", "HSOL",
+ "Headset Stereophone", "HSOR",
+ "Ext Spk", "HFL",
+ "Ext Spk", "HFR",
+ "Line Out", "AUXL",
+ "Line Out", "AUXR",
+ "AFML", "Line In",
+ "AFMR", "Line In";
+};
+
+/* PandaboardES has external pullups on SCL & SDA */
+&dss_hdmi_pins {
+ pinctrl-single,pins = <
+ 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
+ 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
+ 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
+ >;
+};
+
+&omap4_pmx_core {
+ led_gpio_pins: gpio_led_pmx {
+ pinctrl-single,pins = <
+ 0xb6 (PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
+ >;
+ };
+};
+
+&led_wkgpio_pins {
+ pinctrl-single,pins = <
+ 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
+ >;
+};
+
+&leds {
+ pinctrl-0 = <
+ &led_gpio_pins
+ &led_wkgpio_pins
+ >;
+
+ heartbeat {
+ gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
+ };
+ mmc {
+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&gpio1 {
+ ti,no-reset-on-init;
+};
diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts
index 940fe4f..a5ee1fa 100644
--- a/arch/arm/boot/dts/omap4-panda-es.dts
+++ b/arch/arm/boot/dts/omap4-panda-es.dts
@@ -15,6 +15,18 @@
compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
};
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
&sound {
ti,model = "PandaBoardES";
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index a0e28b2..3ee41ef 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -14,3 +14,15 @@
model = "TI OMAP4 PandaBoard";
compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
};
+
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 280d92d..05a5f6c 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -502,11 +502,13 @@
&emif1 {
cs1-used;
device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
};
&emif2 {
cs1-used;
device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
};
&keypad {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index e554b6e..64f519a 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -977,6 +977,7 @@
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
+ status = "disabled";
};
emif2: emif@4d000000 {
@@ -989,6 +990,7 @@
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
+ status = "disabled";
};
ocp2scp@4a0ad000 {
diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index 6ffe572..bb7bd88 100644
--- a/arch/arm/mach-imx/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
@@ -68,3 +68,9 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
config IMX_HAVE_PLATFORM_SPI_IMX
bool
+
+config WAND_RFKILL
+ tristate "Wandboard RF Kill support"
+ depends on SOC_IMX6Q
+ default m
+ select RFKILL
diff --git a/arch/arm/mach-imx/devices/Makefile b/arch/arm/mach-imx/devices/Makefile
index e44758a..c179a55 100644
--- a/arch/arm/mach-imx/devices/Makefile
+++ b/arch/arm/mach-imx/devices/Makefile
@@ -26,3 +26,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
+obj-$(CONFIG_WAND_RFKILL) += wand-rfkill.o
diff --git b/arch/arm/mach-imx/devices/wand-rfkill.c b/arch/arm/mach-imx/devices/wand-rfkill.c
new file mode 100644
index 0000000..da7ef9f
--- /dev/null
+++ b/arch/arm/mach-imx/devices/wand-rfkill.c
@@ -0,0 +1,290 @@
+/*
+ * arch/arm/mach-imx/devices/wand-rfkill.c
+ *
+ * Copyright (C) 2013 Vladimir Ermakov <vooon341@gmail.com>
+ *
+ * based on net/rfkill/rfkill-gpio.c
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/rfkill.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+
+
+struct wand_rfkill_data {
+ struct rfkill *rfkill_dev;
+ int shutdown_gpio;
+ const char *shutdown_name;
+};
+
+static int wand_rfkill_set_block(void *data, bool blocked)
+{
+ struct wand_rfkill_data *rfkill = data;
+
+ pr_debug("wandboard-rfkill: set block %d\n", blocked);
+
+ if (blocked) {
+ if (gpio_is_valid(rfkill->shutdown_gpio))
+ gpio_direction_output(rfkill->shutdown_gpio, 0);
+ } else {
+ if (gpio_is_valid(rfkill->shutdown_gpio))
+ gpio_direction_output(rfkill->shutdown_gpio, 1);
+ }
+
+ return 0;
+}
+
+static const struct rfkill_ops wand_rfkill_ops = {
+ .set_block = wand_rfkill_set_block,
+};
+
+static int wand_rfkill_wifi_probe(struct device *dev,
+ struct device_node *np,
+ struct wand_rfkill_data *rfkill)
+{
+ int ret;
+ int wl_ref_on, wl_rst_n, wl_reg_on, wl_wake, wl_host_wake;
+
+ wl_ref_on = of_get_named_gpio(np, "wifi-ref-on", 0);
+ wl_rst_n = of_get_named_gpio(np, "wifi-rst-n", 0);
+ wl_reg_on = of_get_named_gpio(np, "wifi-reg-on", 0);
+ wl_wake = of_get_named_gpio(np, "wifi-wake", 0);
+ wl_host_wake = of_get_named_gpio(np, "wifi-host-wake", 0);
+
+ if (!gpio_is_valid(wl_rst_n) || !gpio_is_valid(wl_ref_on) ||
+ !gpio_is_valid(wl_reg_on) || !gpio_is_valid(wl_wake) ||
+ !gpio_is_valid(wl_host_wake)) {
+
+ dev_err(dev, "incorrect wifi gpios (%d %d %d %d %d)\n",
+ wl_rst_n, wl_ref_on, wl_reg_on, wl_wake, wl_host_wake);
+ return -EINVAL;
+ }
+
+ dev_info(dev, "initialize wifi chip\n");
+
+ gpio_request(wl_rst_n, "wl_rst_n");
+ gpio_direction_output(wl_rst_n, 0);
+ msleep(11);
+ gpio_set_value(wl_rst_n, 1);
+
+ gpio_request(wl_ref_on, "wl_ref_on");
+ gpio_direction_output(wl_ref_on, 1);
+
+ gpio_request(wl_reg_on, "wl_reg_on");
+ gpio_direction_output(wl_reg_on, 1);
+
+ gpio_request(wl_wake, "wl_wake");
+ gpio_direction_output(wl_wake, 1);
+
+ gpio_request(wl_host_wake, "wl_host_wake");
+ gpio_direction_input(wl_host_wake);
+
+ rfkill->shutdown_name = "wifi_shutdown";
+ rfkill->shutdown_gpio = wl_wake;
+
+ rfkill->rfkill_dev = rfkill_alloc("wifi-rfkill", dev, RFKILL_TYPE_WLAN,
+ &wand_rfkill_ops, rfkill);
+ if (!rfkill->rfkill_dev) {
+ ret = -ENOMEM;
+ goto wifi_fail_free_gpio;
+ }
+
+ ret = rfkill_register(rfkill->rfkill_dev);
+ if (ret < 0)
+ goto wifi_fail_unregister;
+
+ dev_info(dev, "wifi-rfkill registered.\n");
+
+ return 0;
+
+wifi_fail_unregister:
+ rfkill_destroy(rfkill->rfkill_dev);
+wifi_fail_free_gpio:
+ if (gpio_is_valid(wl_rst_n)) gpio_free(wl_rst_n);
+ if (gpio_is_valid(wl_ref_on)) gpio_free(wl_ref_on);
+ if (gpio_is_valid(wl_reg_on)) gpio_free(wl_reg_on);
+ if (gpio_is_valid(wl_wake)) gpio_free(wl_wake);
+ if (gpio_is_valid(wl_host_wake)) gpio_free(wl_host_wake);
+
+ return ret;
+}
+
+static int wand_rfkill_bt_probe(struct device *dev,
+ struct device_node *np,
+ struct wand_rfkill_data *rfkill)
+{
+ int ret;
+ int bt_on, bt_wake, bt_host_wake;
+
+ bt_on = of_get_named_gpio(np, "bluetooth-on", 0);
+ bt_wake = of_get_named_gpio(np, "bluetooth-wake", 0);
+ bt_host_wake = of_get_named_gpio(np, "bluetooth-host-wake", 0);
+
+ if (!gpio_is_valid(bt_on) || !gpio_is_valid(bt_wake) ||
+ !gpio_is_valid(bt_host_wake)) {
+
+ dev_err(dev, "incorrect bt gpios (%d %d %d)\n",
+ bt_on, bt_wake, bt_host_wake);
+ return -EINVAL;
+ }
+
+ dev_info(dev, "initialize bluetooth chip\n");
+
+ gpio_request(bt_on, "bt_on");
+ gpio_direction_output(bt_on, 0);
+ msleep(11);
+ gpio_set_value(bt_on, 1);
+
+ gpio_request(bt_wake, "bt_wake");
+ gpio_direction_output(bt_wake, 1);
+
+ gpio_request(bt_host_wake, "bt_host_wake");
+ gpio_direction_input(bt_host_wake);
+
+ rfkill->shutdown_name = "bluetooth_shutdown";
+ rfkill->shutdown_gpio = bt_wake;
+
+ rfkill->rfkill_dev = rfkill_alloc("bluetooth-rfkill", dev, RFKILL_TYPE_BLUETOOTH,
+ &wand_rfkill_ops, rfkill);
+ if (!rfkill->rfkill_dev) {
+ ret = -ENOMEM;
+ goto bt_fail_free_gpio;
+ }
+
+ ret = rfkill_register(rfkill->rfkill_dev);
+ if (ret < 0)
+ goto bt_fail_unregister;
+
+ dev_info(dev, "bluetooth-rfkill registered.\n");
+
+ return 0;
+
+bt_fail_unregister:
+ rfkill_destroy(rfkill->rfkill_dev);
+bt_fail_free_gpio:
+ if (gpio_is_valid(bt_on)) gpio_free(bt_on);
+ if (gpio_is_valid(bt_wake)) gpio_free(bt_wake);
+ if (gpio_is_valid(bt_host_wake)) gpio_free(bt_host_wake);
+
+ return ret;
+}
+
+static int wand_rfkill_probe(struct platform_device *pdev)
+{
+ struct wand_rfkill_data *rfkill;
+ struct pinctrl *pinctrl;
+ int ret;
+
+ dev_info(&pdev->dev, "Wandboard rfkill initialization\n");
+
+ if (!pdev->dev.of_node) {
+ dev_err(&pdev->dev, "no device tree node\n");
+ return -ENODEV;
+ }
+
+ rfkill = kzalloc(sizeof(*rfkill) * 2, GFP_KERNEL);
+ if (!rfkill)
+ return -ENOMEM;
+
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl)) {
+ int ret = PTR_ERR(pinctrl);
+ dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret);
+ return ret;
+ }
+
+ /* setup WiFi */
+ ret = wand_rfkill_wifi_probe(&pdev->dev, pdev->dev.of_node, &rfkill[0]);
+ if (ret < 0)
+ goto fail_free_rfkill;
+
+ /* setup bluetooth */
+ ret = wand_rfkill_bt_probe(&pdev->dev, pdev->dev.of_node, &rfkill[1]);
+ if (ret < 0)
+ goto fail_unregister_wifi;
+
+ platform_set_drvdata(pdev, rfkill);
+
+ return 0;
+
+fail_unregister_wifi:
+ if (rfkill[1].rfkill_dev) {
+ rfkill_unregister(rfkill[1].rfkill_dev);
+ rfkill_destroy(rfkill[1].rfkill_dev);
+ }
+
+ /* TODO free gpio */
+
+fail_free_rfkill:
+ kfree(rfkill);
+
+ return ret;
+}
+
+static int wand_rfkill_remove(struct platform_device *pdev)
+{
+ struct wand_rfkill_data *rfkill = platform_get_drvdata(pdev);
+
+ dev_info(&pdev->dev, "Module unloading\n");
+
+ if (!rfkill)
+ return 0;
+
+ /* WiFi */
+ if (gpio_is_valid(rfkill[0].shutdown_gpio))
+ gpio_free(rfkill[0].shutdown_gpio);
+
+ rfkill_unregister(rfkill[0].rfkill_dev);
+ rfkill_destroy(rfkill[0].rfkill_dev);
+
+ /* Bt */
+ if (gpio_is_valid(rfkill[1].shutdown_gpio))
+ gpio_free(rfkill[1].shutdown_gpio);
+
+ rfkill_unregister(rfkill[1].rfkill_dev);
+ rfkill_destroy(rfkill[1].rfkill_dev);
+
+ kfree(rfkill);
+
+ return 0;
+}
+
+static struct of_device_id wand_rfkill_match[] = {
+ { .compatible = "wand,imx6q-wandboard-rfkill", },
+ { .compatible = "wand,imx6dl-wandboard-rfkill", },
+ { .compatible = "wand,imx6qdl-wandboard-rfkill", },
+ {}
+};
+
+static struct platform_driver wand_rfkill_driver = {
+ .driver = {
+ .name = "wandboard-rfkill",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(wand_rfkill_match),
+ },
+ .probe = wand_rfkill_probe,
+ .remove = wand_rfkill_remove
+};
+
+module_platform_driver(wand_rfkill_driver);
+
+MODULE_AUTHOR("Vladimir Ermakov <vooon341@gmail.com>");
+MODULE_DESCRIPTION("Wandboard rfkill driver");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 41c7b90..aaa0d1e 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -141,8 +141,8 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
struct omap_hwmod *oh;
struct device_node *node = pdev->dev.of_node;
struct resource res;
- const char *oh_name;
- int oh_cnt, i, ret = 0;
+ const char *oh_name, *rst_name;
+ int oh_cnt, dstr_cnt, i, ret = 0;
bool device_active = false, skip_pm_domain = false;
oh_cnt = of_property_count_strings(node, "ti,hwmods");
@@ -197,6 +197,26 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
if (r->name == NULL)
r->name = dev_name(&pdev->dev);
}
+ dstr_cnt =
+ of_property_count_strings(node, "ti,deassert-hard-reset");
+ if (dstr_cnt > 0) {
+ for (i = 0; i < dstr_cnt; i += 2) {
+ of_property_read_string_index(
+ node, "ti,deassert-hard-reset", i,
+ &oh_name);
+ of_property_read_string_index(
+ node, "ti,deassert-hard-reset", i+1,
+ &rst_name);
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ dev_warn(&pdev->dev,
+ "Cannot parse deassert property for '%s'\n",
+ oh_name);
+ break;
+ }
+ omap_hwmod_deassert_hardreset(oh, rst_name);
+ }
+ }
if (!skip_pm_domain) {
dev_pm_domain_set(&pdev->dev, &omap_device_pm_domain);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 71c0ab4..6180a51 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -73,6 +73,20 @@ config GPIO_SYSFS
Kernel drivers may also request that a particular GPIO be
exported to userspace; this can be useful when debugging.
+config GPIO_OF_HELPER
+ bool "GPIO OF helper device (EXPERIMENTAL)"
+ depends on OF_GPIO
+ help
+ Say Y here to add an GPIO OF helper driver
+
+ Allows you specify a GPIO helper based on OF
+ which allows simple export of GPIO functionality
+ in user-space.
+
+ Features include, value set/get, direction control,
+ interrupt/value change poll support, event counting
+ and others.
+
config GPIO_GENERIC
depends on HAS_IOMEM # Only for IOMEM drivers
tristate
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1324c8f..2c93266 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib-devprop.o
obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
+obj-$(CONFIG_GPIO_OF_HELPER) += gpio-of-helper.o
# Device drivers. Generally keep list sorted alphabetically
obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
diff --git b/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
new file mode 100644
index 0000000..83f362f
--- /dev/null
+++ b/drivers/gpio/gpio-of-helper.c
@@ -0,0 +1,435 @@
+/*
+ * GPIO OF based helper
+ *
+ * A simple DT based driver to provide access to GPIO functionality
+ * to user-space via sysfs.
+ *
+ * Copyright (C) 2013 Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/timer.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/atomic.h>
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/math64.h>
+#include <linux/atomic.h>
+#include <linux/idr.h>
+
+/* fwd decl. */
+struct gpio_of_helper_info;
+
+enum gpio_type {
+ GPIO_TYPE_INPUT = 0,
+ GPIO_TYPE_OUTPUT = 1,
+};
+
+struct gpio_of_entry {
+ int id;
+ struct gpio_of_helper_info *info;
+ struct device_node *node;
+ enum gpio_type type;
+ int gpio;
+ int irq;
+ const char *name;
+ atomic64_t counter;
+ unsigned int count_flags;
+#define COUNT_RISING_EDGE (1 << 0)
+#define COUNT_FALLING_EDGE (1 << 1)
+};
+
+struct gpio_of_helper_info {
+ struct platform_device *pdev;
+ struct idr idr;
+};
+
+static const struct of_device_id gpio_of_helper_of_match[] = {
+ {
+ .compatible = "gpio-of-helper",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, gpio_of_helper_of_match);
+
+static ssize_t gpio_of_helper_show_status(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_of_helper_info *info = platform_get_drvdata(pdev);
+ struct gpio_of_entry *entry;
+ char *p, *e;
+ int id, n;
+
+ p = buf;
+ e = p + PAGE_SIZE;
+ n = 0;
+ idr_for_each_entry(&info->idr, entry, id) {
+ switch (entry->type) {
+ case GPIO_TYPE_INPUT:
+ n = snprintf(p, e - p, "%2d %-24s %3d %-3s %llu\n",
+ entry->id, entry->name, entry->gpio, "IN",
+ (unsigned long long)
+ atomic64_read(&entry->counter));
+ break;
+ case GPIO_TYPE_OUTPUT:
+ n = snprintf(p, e - p, "%2d %-24s %3d %-3s\n",
+ entry->id, entry->name, entry->gpio, "OUT");
+ break;
+ }
+ p += n;
+ }
+
+ return p - buf;
+}
+
+static DEVICE_ATTR(status, S_IRUGO,
+ gpio_of_helper_show_status, NULL);
+
+static irqreturn_t gpio_of_helper_handler(int irq, void *ptr)
+{
+ struct gpio_of_entry *entry = ptr;
+
+ /* caution - low speed interfaces only! */
+ atomic64_inc(&entry->counter);
+
+ return IRQ_HANDLED;
+}
+
+static struct gpio_of_entry *
+gpio_of_entry_create(struct gpio_of_helper_info *info,
+ struct device_node *node)
+{
+ struct platform_device *pdev = info->pdev;
+ struct device *dev = &pdev->dev;
+ struct gpio_of_entry *entry;
+ int err, gpio, irq;
+ unsigned int req_flags, count_flags, irq_flags;
+ enum gpio_type type;
+ enum of_gpio_flags gpio_flags;
+ const char *name;
+
+ /* get the type of the node first */
+ if (of_property_read_bool(node, "input"))
+ type = GPIO_TYPE_INPUT;
+ else if (of_property_read_bool(node, "output")
+ || of_property_read_bool(node, "init-low")
+ || of_property_read_bool(node, "init-high"))
+ type = GPIO_TYPE_OUTPUT;
+ else {
+ dev_err(dev, "Not valid gpio node type\n");
+ err = -EINVAL;
+ goto err_bad_node;
+ }
+
+ /* get the name */
+ if (of_property_read_string(node, "line-name", &name))
+ if (of_property_read_string(node, "gpio-name", &name))
+ name = node->name;
+
+ err = of_get_named_gpio_flags(node, "gpio", 0, &gpio_flags);
+ if (IS_ERR_VALUE(err)) {
+ dev_err(dev, "Failed to get gpio property of '%s'\n", name);
+ goto err_bad_node;
+ }
+ gpio = err;
+
+ req_flags = 0;
+ count_flags = 0;
+
+ /* set the request flags */
+ switch (type) {
+ case GPIO_TYPE_INPUT:
+ req_flags = GPIOF_DIR_IN | GPIOF_EXPORT;
+ if (of_property_read_bool(node, "count-falling-edge"))
+ count_flags |= COUNT_FALLING_EDGE;
+ if (of_property_read_bool(node, "count-rising-edge"))
+ count_flags |= COUNT_RISING_EDGE;
+ break;
+ case GPIO_TYPE_OUTPUT:
+ req_flags = GPIOF_DIR_OUT | GPIOF_EXPORT;
+ if (of_property_read_bool(node, "init-high"))
+ req_flags |= GPIOF_OUT_INIT_HIGH;
+ else if (of_property_read_bool(node, "init-low"))
+ req_flags |= GPIOF_OUT_INIT_LOW;
+ break;
+ }
+ if (of_property_read_bool(node, "dir-changeable"))
+ req_flags |= GPIOF_EXPORT_CHANGEABLE;
+ if (gpio_flags & OF_GPIO_ACTIVE_LOW)
+ req_flags |= GPIOF_ACTIVE_LOW;
+ if (gpio_flags & OF_GPIO_SINGLE_ENDED) {
+ if (gpio_flags & OF_GPIO_ACTIVE_LOW)
+ req_flags |= GPIOF_OPEN_DRAIN;
+ else
+ req_flags |= GPIOF_OPEN_SOURCE;
+ }
+
+ /* request the gpio */
+ err = devm_gpio_request_one(dev, gpio, req_flags, name);
+ if (err != 0) {
+ dev_err(dev, "Failed to request gpio '%s'\n", name);
+ goto err_bad_node;
+ }
+
+ irq = -1;
+ irq_flags = 0;
+
+ /* counter mode requested - need an interrupt */
+ if (count_flags != 0) {
+ irq = gpio_to_irq(gpio);
+ if (IS_ERR_VALUE(irq)) {
+ dev_err(dev, "Failed to request gpio '%s'\n", name);
+ goto err_bad_node;
+ }
+
+ if (count_flags & COUNT_RISING_EDGE)
+ irq_flags |= IRQF_TRIGGER_RISING;
+ if (count_flags & COUNT_FALLING_EDGE)
+ irq_flags |= IRQF_TRIGGER_FALLING;
+ }
+
+// if (!idr_pre_get(&info->idr, GFP_KERNEL)) {
+// dev_err(dev, "Failed on idr_pre_get of '%s'\n", name);
+// err = -ENOMEM;
+// goto err_no_mem;
+// }
+
+ idr_preload(GFP_KERNEL);
+
+ entry = devm_kzalloc(dev, sizeof(*entry), GFP_KERNEL);
+ if (entry == NULL) {
+ dev_err(dev, "Failed to allocate gpio entry of '%s'\n", name);
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+
+ entry->id = -1;
+ entry->info = info;
+ entry->node = of_node_get(node); /* get node reference */
+ entry->type = type;
+ entry->gpio = gpio;
+ entry->irq = irq;
+ entry->name = name;
+
+ /* interrupt enable is last thing done */
+ if (irq >= 0) {
+ atomic64_set(&entry->counter, 0);
+ entry->count_flags = count_flags;
+ err = devm_request_irq(dev, irq, gpio_of_helper_handler,
+ irq_flags, name, entry);
+ if (err != 0) {
+ dev_err(dev, "Failed to request irq of '%s'\n", name);
+ goto err_no_irq;
+ }
+ }
+
+ /* all done; insert */
+// err = idr_get_new(&info->idr, entry, &entry->id);
+// if (IS_ERR_VALUE(err)) {
+// dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
+// goto err_fail_idr;
+// }
+
+ err = idr_alloc(&info->idr, entry, 0, 0, GFP_NOWAIT);
+ if (err >= 0)
+ entry->id = err;
+
+ idr_preload_end();
+
+ if (err < 0) {
+ dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
+ goto err_fail_idr;
+ }
+
+ dev_dbg(dev, "Allocated GPIO id=%d name='%s'\n", entry->id, name);
+
+ return entry;
+
+err_fail_idr:
+ /* nothing to do */
+err_no_irq:
+ /* release node ref */
+ of_node_put(node);
+ /* nothing else needs to be done, devres handles it */
+err_no_mem:
+err_bad_node:
+ return ERR_PTR(err);
+}
+
+static int gpio_of_entry_destroy(struct gpio_of_entry *entry)
+{
+ struct gpio_of_helper_info *info = entry->info;
+ struct platform_device *pdev = info->pdev;
+ struct device *dev = &pdev->dev;
+
+ dev_dbg(dev, "Destroying GPIO id=%d\n", entry->id);
+
+ /* remove from the IDR */
+ idr_remove(&info->idr, entry->id);
+
+ /* remove node ref */
+ of_node_put(entry->node);
+
+ /* free gpio */
+ devm_gpio_free(dev, entry->gpio);
+
+ /* gree irq */
+ if (entry->irq >= 0)
+ devm_free_irq(dev, entry->irq, entry);
+
+ /* and free */
+ devm_kfree(dev, entry);
+
+ return 0;
+}
+
+static int gpio_of_helper_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct gpio_of_helper_info *info;
+ struct gpio_of_entry *entry;
+ struct device_node *pnode = pdev->dev.of_node;
+ struct device_node *cnode;
+ struct pinctrl *pinctrl;
+ int err;
+
+ /* we only support OF */
+ if (pnode == NULL) {
+ dev_err(&pdev->dev, "No platform of_node!\n");
+ return -ENODEV;
+ }
+
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl)) {
+ /* special handling for probe defer */
+ if (PTR_ERR(pinctrl) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
+ dev_warn(&pdev->dev,
+ "pins are not configured from the driver\n");
+ }
+
+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+ if (info == NULL) {
+ dev_err(&pdev->dev, "Failed to allocate info\n");
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+ platform_set_drvdata(pdev, info);
+ info->pdev = pdev;
+
+ idr_init(&info->idr);
+
+ err = device_create_file(dev, &dev_attr_status);
+ if (err != 0) {
+ dev_err(dev, "Failed to create status sysfs attribute\n");
+ goto err_no_sysfs;
+ }
+
+ for_each_child_of_node(pnode, cnode) {
+
+ entry = gpio_of_entry_create(info, cnode);
+ if (IS_ERR_OR_NULL(entry)) {
+ dev_err(dev, "Failed to create gpio entry\n");
+ err = PTR_ERR(entry);
+ goto err_fail_entry;
+ }
+ }
+
+ dev_info(&pdev->dev, "ready\n");
+
+ return 0;
+err_fail_entry:
+ device_remove_file(&pdev->dev, &dev_attr_status);
+err_no_sysfs:
+err_no_mem:
+ return err;
+}
+
+static int gpio_of_helper_remove(struct platform_device *pdev)
+{
+ struct gpio_of_helper_info *info = platform_get_drvdata(pdev);
+ struct gpio_of_entry *entry;
+ int id;
+
+ dev_info(&pdev->dev, "removing\n");
+
+ device_remove_file(&pdev->dev, &dev_attr_status);
+
+ id = 0;
+ idr_for_each_entry(&info->idr, entry, id) {
+ /* destroy each and every one */
+ gpio_of_entry_destroy(entry);
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+//#ifdef CONFIG_PM_RUNTIME
+static int gpio_of_helper_runtime_suspend(struct device *dev)
+{
+ /* place holder */
+ return 0;
+}
+
+static int gpio_of_helper_runtime_resume(struct device *dev)
+{
+ /* place holder */
+ return 0;
+}
+//#endif /* CONFIG_PM_RUNTIME */
+
+static struct dev_pm_ops gpio_of_helper_pm_ops = {
+ SET_RUNTIME_PM_OPS(gpio_of_helper_runtime_suspend,
+ gpio_of_helper_runtime_resume, NULL)
+};
+#define GPIO_OF_HELPER_PM_OPS (&gpio_of_helper_pm_ops)
+#else
+#define GPIO_OF_HELPER_PM_OPS NULL
+#endif /* CONFIG_PM */
+
+struct platform_driver gpio_of_helper_driver = {
+ .probe = gpio_of_helper_probe,
+ .remove = gpio_of_helper_remove,
+ .driver = {
+ .name = "gpio-of-helper",
+ .owner = THIS_MODULE,
+ .pm = GPIO_OF_HELPER_PM_OPS,
+ .of_match_table = gpio_of_helper_of_match,
+ },
+};
+
+module_platform_driver(gpio_of_helper_driver);
+
+MODULE_AUTHOR("Pantelis Antoniou <panto@antoniou-consulting.com>");
+MODULE_DESCRIPTION("GPIO OF Helper driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-of-helper");
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index 3dbaf48..7015730 100644
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
@@ -37,10 +37,10 @@ static DEFINE_MUTEX(sysfs_lock);
/*
* /sys/class/gpio/gpioN... only for GPIOs that are exported
* /direction
- * * MAY BE OMITTED if kernel won't allow direction changes
* * is read/write as "in" or "out"
* * may also be written as "high" or "low", initializing
* output value as specified ("out" implies "low")
+ * * read-only if kernel won't allow direction changes
* /value
* * always readable, subject to hardware behavior
* * may be writable, as zero/nonzero
@@ -53,6 +53,8 @@ static DEFINE_MUTEX(sysfs_lock);
* * is read/write as zero/nonzero
* * also affects existing and subsequent "falling" and "rising"
* /edge configuration
+ * /label
+ * * descriptor label
*/
static ssize_t direction_show(struct device *dev,
@@ -83,7 +85,9 @@ static ssize_t direction_store(struct device *dev,
mutex_lock(&data->mutex);
- if (sysfs_streq(buf, "high"))
+ if (!data->direction_can_change)
+ status = -EPERM;
+ else if (sysfs_streq(buf, "high"))
status = gpiod_direction_output_raw(desc, 1);
else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
status = gpiod_direction_output_raw(desc, 0);
@@ -362,6 +366,23 @@ static ssize_t active_low_store(struct device *dev,
}
static DEVICE_ATTR_RW(active_low);
+static ssize_t label_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct gpiod_data *data = dev_get_drvdata(dev);
+ struct gpio_desc *desc = data->desc;
+ ssize_t status;
+
+ mutex_lock(&data->mutex);
+
+ status = sprintf(buf, "%s\n", desc->label);
+
+ mutex_unlock(&data->mutex);
+
+ return status;
+}
+static DEVICE_ATTR_RO(label);
+
static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
int n)
{
@@ -373,12 +394,15 @@ static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
if (attr == &dev_attr_direction.attr) {
if (!show_direction)
- mode = 0;
+ mode &= 0444;
} else if (attr == &dev_attr_edge.attr) {
if (gpiod_to_irq(desc) < 0)
mode = 0;
if (!show_direction && test_bit(FLAG_IS_OUT, &desc->flags))
mode = 0;
+ } else if (attr == &dev_attr_value.attr) {
+ if (!show_direction && !test_bit(FLAG_IS_OUT, &desc->flags))
+ mode &= 0444;
}
return mode;
@@ -389,6 +413,7 @@ static struct attribute *gpio_attrs[] = {
&dev_attr_edge.attr,
&dev_attr_value.attr,
&dev_attr_active_low.attr,
+ &dev_attr_label.attr,
NULL,
};
@@ -402,6 +427,10 @@ static const struct attribute_group *gpio_groups[] = {
NULL
};
+/* bwlegh, a second device in the same file... get out of my namespace! */
+#define dev_attr_label dev_attr_chip_label
+#define label_show chip_label_show
+
/*
* /sys/class/gpio/gpiochipN/
* /base ... matching gpio_chip.base (N)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index e11a3bb..5be9f57 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2269,9 +2269,9 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
desc_set_label(desc, label ? : "?");
status = 0;
- } else {
- status = -EBUSY;
- goto done;
+// } else {
+// status = -EBUSY;
+// goto done;
}
if (chip->request) {
diff --git a/drivers/gpu/drm/etnaviv/Kconfig b/drivers/gpu/drm/etnaviv/Kconfig
index 041a77e..9219a6c 100644
--- a/drivers/gpu/drm/etnaviv/Kconfig
+++ b/drivers/gpu/drm/etnaviv/Kconfig
@@ -2,7 +2,7 @@
config DRM_ETNAVIV
tristate "ETNAVIV (DRM support for Vivante GPU IP cores)"
depends on DRM
- depends on ARCH_MXC || ARCH_DOVE || (ARM && COMPILE_TEST)
+ depends on ARCH_MXC || ARCH_DOVE || ARCH_OMAP2PLUS || (ARM && COMPILE_TEST)
depends on MMU
select SHMEM
select SYNC_FILE
diff --git a/drivers/gpu/drm/i2c/Kconfig b/drivers/gpu/drm/i2c/Kconfig
index 65d3acb..3eda0a7 100644
--- a/drivers/gpu/drm/i2c/Kconfig
+++ b/drivers/gpu/drm/i2c/Kconfig
@@ -1,6 +1,12 @@
menu "I2C encoder or helper chips"
depends on DRM && DRM_KMS_HELPER && I2C
+config DRM_I2C_ADIHDMI
+ tristate "ADI HDMI encoder"
+ default m if DRM_TILCDC
+ help
+ Support for ADI HDMI encoder.
+
config DRM_I2C_CH7006
tristate "Chrontel ch7006 TV encoder"
default m if DRM_NOUVEAU
diff --git a/drivers/gpu/drm/i2c/Makefile b/drivers/gpu/drm/i2c/Makefile
index a962f6f..cadceaf 100644
--- a/drivers/gpu/drm/i2c/Makefile
+++ b/drivers/gpu/drm/i2c/Makefile
@@ -8,3 +8,6 @@ obj-$(CONFIG_DRM_I2C_SIL164) += sil164.o
tda998x-y := tda998x_drv.o
obj-$(CONFIG_DRM_I2C_NXP_TDA998X) += tda998x.o
obj-$(CONFIG_DRM_I2C_NXP_TDA9950) += tda9950.o
+
+adihdmi-y := adihdmi_drv.o
+obj-$(CONFIG_DRM_I2C_ADIHDMI) += adihdmi.o
diff --git b/drivers/gpu/drm/i2c/adihdmi.h b/drivers/gpu/drm/i2c/adihdmi.h
new file mode 100644
index 0000000..58d9a2b
--- /dev/null
+++ b/drivers/gpu/drm/i2c/adihdmi.h
@@ -0,0 +1,289 @@
+/*
+ * Analog Devices ADIHDMI HDMI transmitter driver
+ *
+ * Copyright 2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2.
+ */
+
+#ifndef __DRM_I2C_ADIHDMI_H__
+#define __DRM_I2C_ADIHDMI_H__
+
+#include <linux/hdmi.h>
+
+#define ADIHDMI_REG_CHIP_REVISION 0x00
+#define ADIHDMI_REG_N0 0x01
+#define ADIHDMI_REG_N1 0x02
+#define ADIHDMI_REG_N2 0x03
+#define ADIHDMI_REG_SPDIF_FREQ 0x04
+#define ADIHDMI_REG_CTS_AUTOMATIC1 0x05
+#define ADIHDMI_REG_CTS_AUTOMATIC2 0x06
+#define ADIHDMI_REG_CTS_MANUAL0 0x07
+#define ADIHDMI_REG_CTS_MANUAL1 0x08
+#define ADIHDMI_REG_CTS_MANUAL2 0x09
+#define ADIHDMI_REG_AUDIO_SOURCE 0x0a
+#define ADIHDMI_REG_AUDIO_CONFIG 0x0b
+#define ADIHDMI_REG_I2S_CONFIG 0x0c
+#define ADIHDMI_REG_I2S_WIDTH 0x0d
+#define ADIHDMI_REG_AUDIO_SUB_SRC0 0x0e
+#define ADIHDMI_REG_AUDIO_SUB_SRC1 0x0f
+#define ADIHDMI_REG_AUDIO_SUB_SRC2 0x10
+#define ADIHDMI_REG_AUDIO_SUB_SRC3 0x11
+#define ADIHDMI_REG_AUDIO_CFG1 0x12
+#define ADIHDMI_REG_AUDIO_CFG2 0x13
+#define ADIHDMI_REG_AUDIO_CFG3 0x14
+#define ADIHDMI_REG_I2C_FREQ_ID_CFG 0x15
+#define ADIHDMI_REG_VIDEO_INPUT_CFG1 0x16
+#define ADIHDMI_REG_CSC_UPPER(x) (0x18 + (x) * 2)
+#define ADIHDMI_REG_CSC_LOWER(x) (0x19 + (x) * 2)
+#define ADIHDMI_REG_SYNC_DECODER(x) (0x30 + (x))
+#define ADIHDMI_REG_DE_GENERATOR (0x35 + (x))
+#define ADIHDMI_REG_PIXEL_REPETITION 0x3b
+#define ADIHDMI_REG_VIC_MANUAL 0x3c
+#define ADIHDMI_REG_VIC_SEND 0x3d
+#define ADIHDMI_REG_VIC_DETECTED 0x3e
+#define ADIHDMI_REG_AUX_VIC_DETECTED 0x3f
+#define ADIHDMI_REG_PACKET_ENABLE0 0x40
+#define ADIHDMI_REG_POWER 0x41
+#define ADIHDMI_REG_STATUS 0x42
+#define ADIHDMI_REG_EDID_I2C_ADDR 0x43
+#define ADIHDMI_REG_PACKET_ENABLE1 0x44
+#define ADIHDMI_REG_PACKET_I2C_ADDR 0x45
+#define ADIHDMI_REG_DSD_ENABLE 0x46
+#define ADIHDMI_REG_VIDEO_INPUT_CFG2 0x48
+#define ADIHDMI_REG_INFOFRAME_UPDATE 0x4a
+#define ADIHDMI_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
+#define ADIHDMI_REG_AVI_INFOFRAME_VERSION 0x52
+#define ADIHDMI_REG_AVI_INFOFRAME_LENGTH 0x53
+#define ADIHDMI_REG_AVI_INFOFRAME_CHECKSUM 0x54
+#define ADIHDMI_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
+#define ADIHDMI_REG_AUDIO_INFOFRAME_VERSION 0x70
+#define ADIHDMI_REG_AUDIO_INFOFRAME_LENGTH 0x71
+#define ADIHDMI_REG_AUDIO_INFOFRAME_CHECKSUM 0x72
+#define ADIHDMI_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
+#define ADIHDMI_REG_INT_ENABLE(x) (0x94 + (x))
+#define ADIHDMI_REG_INT(x) (0x96 + (x))
+#define ADIHDMI_REG_INPUT_CLK_DIV 0x9d
+#define ADIHDMI_REG_PLL_STATUS 0x9e
+#define ADIHDMI_REG_HDMI_POWER 0xa1
+#define ADIHDMI_REG_HDCP_HDMI_CFG 0xaf
+#define ADIHDMI_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
+#define ADIHDMI_REG_HDCP_STATUS 0xb8
+#define ADIHDMI_REG_BCAPS 0xbe
+#define ADIHDMI_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
+#define ADIHDMI_REG_EDID_SEGMENT 0xc4
+#define ADIHDMI_REG_DDC_STATUS 0xc8
+#define ADIHDMI_REG_EDID_READ_CTRL 0xc9
+#define ADIHDMI_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
+#define ADIHDMI_REG_TIMING_GEN_SEQ 0xd0
+#define ADIHDMI_REG_POWER2 0xd6
+#define ADIHDMI_REG_HSYNC_PLACEMENT_MSB 0xfa
+
+#define ADIHDMI_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
+#define ADIHDMI_REG_TMDS_CLOCK_INV 0xde
+#define ADIHDMI_REG_ARC_CTRL 0xdf
+#define ADIHDMI_REG_CEC_I2C_ADDR 0xe1
+#define ADIHDMI_REG_CEC_CTRL 0xe2
+#define ADIHDMI_REG_CHIP_ID_HIGH 0xf5
+#define ADIHDMI_REG_CHIP_ID_LOW 0xf6
+
+#define ADIHDMI_CSC_ENABLE BIT(7)
+#define ADIHDMI_CSC_UPDATE_MODE BIT(5)
+
+#define ADIHDMI_INT0_HDP BIT(7)
+#define ADIHDMI_INT0_VSYNC BIT(5)
+#define ADIHDMI_INT0_AUDIO_FIFO_FULL BIT(4)
+#define ADIHDMI_INT0_EDID_READY BIT(2)
+#define ADIHDMI_INT0_HDCP_AUTHENTICATED BIT(1)
+
+#define ADIHDMI_INT1_DDC_ERROR BIT(7)
+#define ADIHDMI_INT1_BKSV BIT(6)
+#define ADIHDMI_INT1_CEC_TX_READY BIT(5)
+#define ADIHDMI_INT1_CEC_TX_ARBIT_LOST BIT(4)
+#define ADIHDMI_INT1_CEC_TX_RETRY_TIMEOUT BIT(3)
+#define ADIHDMI_INT1_CEC_RX_READY3 BIT(2)
+#define ADIHDMI_INT1_CEC_RX_READY2 BIT(1)
+#define ADIHDMI_INT1_CEC_RX_READY1 BIT(0)
+
+#define ADIHDMI_ARC_CTRL_POWER_DOWN BIT(0)
+
+#define ADIHDMI_CEC_CTRL_POWER_DOWN BIT(0)
+
+#define ADIHDMI_POWER_POWER_DOWN BIT(6)
+
+#define ADIHDMI_HDMI_CFG_MODE_MASK 0x2
+#define ADIHDMI_HDMI_CFG_MODE_DVI 0x0
+#define ADIHDMI_HDMI_CFG_MODE_HDMI 0x2
+
+#define ADIHDMI_AUDIO_SELECT_I2C 0x0
+#define ADIHDMI_AUDIO_SELECT_SPDIF 0x1
+#define ADIHDMI_AUDIO_SELECT_DSD 0x2
+#define ADIHDMI_AUDIO_SELECT_HBR 0x3
+#define ADIHDMI_AUDIO_SELECT_DST 0x4
+
+#define ADIHDMI_I2S_SAMPLE_LEN_16 0x2
+#define ADIHDMI_I2S_SAMPLE_LEN_20 0x3
+#define ADIHDMI_I2S_SAMPLE_LEN_18 0x4
+#define ADIHDMI_I2S_SAMPLE_LEN_22 0x5
+#define ADIHDMI_I2S_SAMPLE_LEN_19 0x8
+#define ADIHDMI_I2S_SAMPLE_LEN_23 0x9
+#define ADIHDMI_I2S_SAMPLE_LEN_24 0xb
+#define ADIHDMI_I2S_SAMPLE_LEN_17 0xc
+#define ADIHDMI_I2S_SAMPLE_LEN_21 0xd
+
+#define ADIHDMI_SAMPLE_FREQ_44100 0x0
+#define ADIHDMI_SAMPLE_FREQ_48000 0x2
+#define ADIHDMI_SAMPLE_FREQ_32000 0x3
+#define ADIHDMI_SAMPLE_FREQ_88200 0x8
+#define ADIHDMI_SAMPLE_FREQ_96000 0xa
+#define ADIHDMI_SAMPLE_FREQ_176400 0xc
+#define ADIHDMI_SAMPLE_FREQ_192000 0xe
+
+#define ADIHDMI_STATUS_POWER_DOWN_POLARITY BIT(7)
+#define ADIHDMI_STATUS_HPD BIT(6)
+#define ADIHDMI_STATUS_MONITOR_SENSE BIT(5)
+#define ADIHDMI_STATUS_I2S_32BIT_MODE BIT(3)
+
+#define ADIHDMI_PACKET_ENABLE_N_CTS BIT(8+6)
+#define ADIHDMI_PACKET_ENABLE_AUDIO_SAMPLE BIT(8+5)
+#define ADIHDMI_PACKET_ENABLE_AVI_INFOFRAME BIT(8+4)
+#define ADIHDMI_PACKET_ENABLE_AUDIO_INFOFRAME BIT(8+3)
+#define ADIHDMI_PACKET_ENABLE_GC BIT(7)
+#define ADIHDMI_PACKET_ENABLE_SPD BIT(6)
+#define ADIHDMI_PACKET_ENABLE_MPEG BIT(5)
+#define ADIHDMI_PACKET_ENABLE_ACP BIT(4)
+#define ADIHDMI_PACKET_ENABLE_ISRC BIT(3)
+#define ADIHDMI_PACKET_ENABLE_GM BIT(2)
+#define ADIHDMI_PACKET_ENABLE_SPARE2 BIT(1)
+#define ADIHDMI_PACKET_ENABLE_SPARE1 BIT(0)
+
+#define ADIHDMI_REG_POWER2_HDP_SRC_MASK 0xc0
+#define ADIHDMI_REG_POWER2_HDP_SRC_BOTH 0x00
+#define ADIHDMI_REG_POWER2_HDP_SRC_HDP 0x40
+#define ADIHDMI_REG_POWER2_HDP_SRC_CEC 0x80
+#define ADIHDMI_REG_POWER2_HDP_SRC_NONE 0xc0
+#define ADIHDMI_REG_POWER2_TDMS_ENABLE BIT(4)
+#define ADIHDMI_REG_POWER2_GATE_INPUT_CLK BIT(0)
+
+#define ADIHDMI_LOW_REFRESH_RATE_NONE 0x0
+#define ADIHDMI_LOW_REFRESH_RATE_24HZ 0x1
+#define ADIHDMI_LOW_REFRESH_RATE_25HZ 0x2
+#define ADIHDMI_LOW_REFRESH_RATE_30HZ 0x3
+
+#define ADIHDMI_AUDIO_CFG3_LEN_MASK 0x0f
+#define ADIHDMI_I2C_FREQ_ID_CFG_RATE_MASK 0xf0
+
+#define ADIHDMI_AUDIO_SOURCE_I2S 0
+#define ADIHDMI_AUDIO_SOURCE_SPDIF 1
+
+#define ADIHDMI_I2S_FORMAT_I2S 0
+#define ADIHDMI_I2S_FORMAT_RIGHT_J 1
+#define ADIHDMI_I2S_FORMAT_LEFT_J 2
+
+#define ADIHDMI_PACKET(p, x) ((p) * 0x20 + (x))
+#define ADIHDMI_PACKET_SDP(x) ADIHDMI_PACKET(0, x)
+#define ADIHDMI_PACKET_MPEG(x) ADIHDMI_PACKET(1, x)
+#define ADIHDMI_PACKET_ACP(x) ADIHDMI_PACKET(2, x)
+#define ADIHDMI_PACKET_ISRC1(x) ADIHDMI_PACKET(3, x)
+#define ADIHDMI_PACKET_ISRC2(x) ADIHDMI_PACKET(4, x)
+#define ADIHDMI_PACKET_GM(x) ADIHDMI_PACKET(5, x)
+#define ADIHDMI_PACKET_SPARE(x) ADIHDMI_PACKET(6, x)
+
+enum adihdmi_input_clock {
+ ADIHDMI_INPUT_CLOCK_1X,
+ ADIHDMI_INPUT_CLOCK_2X,
+ ADIHDMI_INPUT_CLOCK_DDR,
+};
+
+enum adihdmi_input_justification {
+ ADIHDMI_INPUT_JUSTIFICATION_EVENLY = 0,
+ ADIHDMI_INPUT_JUSTIFICATION_RIGHT = 1,
+ ADIHDMI_INPUT_JUSTIFICATION_LEFT = 2,
+};
+
+enum adihdmi_input_sync_pulse {
+ ADIHDMI_INPUT_SYNC_PULSE_DE = 0,
+ ADIHDMI_INPUT_SYNC_PULSE_HSYNC = 1,
+ ADIHDMI_INPUT_SYNC_PULSE_VSYNC = 2,
+ ADIHDMI_INPUT_SYNC_PULSE_NONE = 3,
+};
+
+/**
+ * enum adihdmi_sync_polarity - Polarity for the input sync signals
+ * @ADIHDMI_SYNC_POLARITY_PASSTHROUGH: Sync polarity matches that of
+ * the currently configured mode.
+ * @ADIHDMI_SYNC_POLARITY_LOW: Sync polarity is low
+ * @ADIHDMI_SYNC_POLARITY_HIGH: Sync polarity is high
+ *
+ * If the polarity is set to either LOW or HIGH the driver will configure the
+ * ADIHDMI to internally invert the sync signal if required to match the sync
+ * polarity setting for the currently selected output mode.
+ *
+ * If the polarity is set to PASSTHROUGH, the ADIHDMI will route the signal
+ * unchanged. This is used when the upstream graphics core already generates
+ * the sync signals with the correct polarity.
+ */
+enum adihdmi_sync_polarity {
+ ADIHDMI_SYNC_POLARITY_PASSTHROUGH,
+ ADIHDMI_SYNC_POLARITY_LOW,
+ ADIHDMI_SYNC_POLARITY_HIGH,
+};
+
+/**
+ * struct adihdmi_link_config - Describes adihdmi hardware configuration
+ * @input_color_depth: Number of bits per color component (8, 10 or 12)
+ * @input_colorspace: The input colorspace (RGB, YUV444, YUV422)
+ * @input_clock: The input video clock style (1x, 2x, DDR)
+ * @input_style: The input component arrangement variant
+ * @input_justification: Video input format bit justification
+ * @clock_delay: Clock delay for the input clock (in ps)
+ * @embedded_sync: Video input uses BT.656-style embedded sync
+ * @sync_pulse: Select the sync pulse
+ * @vsync_polarity: vsync input signal configuration
+ * @hsync_polarity: hsync input signal configuration
+ */
+struct adihdmi_link_config {
+ unsigned int input_color_depth;
+ enum hdmi_colorspace input_colorspace;
+ enum adihdmi_input_clock input_clock;
+ unsigned int input_style;
+ enum adihdmi_input_justification input_justification;
+
+ int clock_delay;
+
+ bool embedded_sync;
+ enum adihdmi_input_sync_pulse sync_pulse;
+ enum adihdmi_sync_polarity vsync_polarity;
+ enum adihdmi_sync_polarity hsync_polarity;
+};
+
+/**
+ * enum adihdmi_csc_scaling - Scaling factor for the ADIHDMI CSC
+ * @ADIHDMI_CSC_SCALING_1: CSC results are not scaled
+ * @ADIHDMI_CSC_SCALING_2: CSC results are scaled by a factor of two
+ * @ADIHDMI_CSC_SCALING_4: CSC results are scalled by a factor of four
+ */
+enum adihdmi_csc_scaling {
+ ADIHDMI_CSC_SCALING_1 = 0,
+ ADIHDMI_CSC_SCALING_2 = 1,
+ ADIHDMI_CSC_SCALING_4 = 2,
+};
+
+/**
+ * struct adihdmi_video_config - Describes adihdmi hardware configuration
+ * @csc_enable: Whether to enable color space conversion
+ * @csc_scaling_factor: Color space conversion scaling factor
+ * @csc_coefficents: Color space conversion coefficents
+ * @hdmi_mode: Whether to use HDMI or DVI output mode
+ * @avi_infoframe: HDMI infoframe
+ */
+struct adihdmi_video_config {
+ bool csc_enable;
+ enum adihdmi_csc_scaling csc_scaling_factor;
+ const uint16_t *csc_coefficents;
+
+ bool hdmi_mode;
+ struct hdmi_avi_infoframe avi_infoframe;
+};
+
+#endif /* __DRM_I2C_ADIHDMI_H__ */
diff --git b/drivers/gpu/drm/i2c/adihdmi_drv.c b/drivers/gpu/drm/i2c/adihdmi_drv.c
new file mode 100644
index 0000000..6ab4682
--- /dev/null
+++ b/drivers/gpu/drm/i2c/adihdmi_drv.c
@@ -0,0 +1,1268 @@
+/*
+ * Analog Devices ADIHDMI HDMI transmitter driver
+ *
+ * Copyright 2012 Analog Devices Inc.
+ * Copyright 2015 Konsulko Group
+ *
+ * Licensed under the GPL-2.
+ */
+
+#include <linux/component.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_edid.h>
+#include <drm/drm_encoder_slave.h>
+#include <drm/drm_of.h>
+
+#include "adihdmi.h"
+
+#define ADIHDMI_INFOFRAME_PACKETS (0x7900)
+
+struct adihdmi {
+ struct i2c_client *i2c_main;
+ struct i2c_client *i2c_edid;
+
+ struct regmap *regmap;
+ struct regmap *packet_memory_regmap;
+ enum drm_connector_status status;
+ bool powered;
+
+ unsigned int f_tmds;
+
+ unsigned int current_edid_segment;
+ uint8_t edid_buf[256];
+ bool edid_read;
+
+ wait_queue_head_t wq;
+ struct drm_encoder *encoder;
+
+ bool embedded_sync;
+ enum adihdmi_sync_polarity vsync_polarity;
+ enum adihdmi_sync_polarity hsync_polarity;
+ bool rgb;
+
+ struct edid *edid;
+
+ struct gpio_desc *gpio_pd;
+};
+
+struct adihdmi2 {
+ struct adihdmi base;
+ struct drm_encoder encoder;
+ struct drm_connector connector;
+};
+
+/* ADI recommended values for proper operation. */
+static const struct reg_sequence adihdmi_fixed_registers[] = {
+ { 0x98, 0x03 },
+ { 0x9a, 0xe0 },
+ { 0x9c, 0x30 },
+ { 0x9d, 0x61 },
+ { 0xa2, 0xa4 },
+ { 0xa3, 0xa4 },
+ { 0xe0, 0xd0 },
+ { 0xf9, 0x00 },
+ { 0x55, 0x02 },
+};
+
+/* -----------------------------------------------------------------------------
+ * Register access
+ */
+
+static const uint8_t adihdmi_register_defaults[] = {
+ 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */
+ 0x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,
+ 0x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */
+ 0x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,
+ 0x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */
+ 0x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
+ 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,
+ 0x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */
+ 0x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */
+ 0x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */
+ 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */
+ 0x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,
+ 0x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,
+ 0x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */
+ 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static bool adihdmi_register_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case ADIHDMI_REG_CHIP_REVISION:
+ case ADIHDMI_REG_SPDIF_FREQ:
+ case ADIHDMI_REG_CTS_AUTOMATIC1:
+ case ADIHDMI_REG_CTS_AUTOMATIC2:
+ case ADIHDMI_REG_VIC_DETECTED:
+ case ADIHDMI_REG_VIC_SEND:
+ case ADIHDMI_REG_AUX_VIC_DETECTED:
+ case ADIHDMI_REG_STATUS:
+ case ADIHDMI_REG_GC(1):
+ case ADIHDMI_REG_INT(0):
+ case ADIHDMI_REG_INT(1):
+ case ADIHDMI_REG_PLL_STATUS:
+ case ADIHDMI_REG_AN(0):
+ case ADIHDMI_REG_AN(1):
+ case ADIHDMI_REG_AN(2):
+ case ADIHDMI_REG_AN(3):
+ case ADIHDMI_REG_AN(4):
+ case ADIHDMI_REG_AN(5):
+ case ADIHDMI_REG_AN(6):
+ case ADIHDMI_REG_AN(7):
+ case ADIHDMI_REG_HDCP_STATUS:
+ case ADIHDMI_REG_BCAPS:
+ case ADIHDMI_REG_BKSV(0):
+ case ADIHDMI_REG_BKSV(1):
+ case ADIHDMI_REG_BKSV(2):
+ case ADIHDMI_REG_BKSV(3):
+ case ADIHDMI_REG_BKSV(4):
+ case ADIHDMI_REG_DDC_STATUS:
+ case ADIHDMI_REG_BSTATUS(0):
+ case ADIHDMI_REG_BSTATUS(1):
+ case ADIHDMI_REG_CHIP_ID_HIGH:
+ case ADIHDMI_REG_CHIP_ID_LOW:
+ return true;
+ }
+
+ return false;
+}
+
+static const struct regmap_config adihdmi_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+
+ .max_register = 0xff,
+ .cache_type = REGCACHE_RBTREE,
+ .reg_defaults_raw = adihdmi_register_defaults,
+ .num_reg_defaults_raw = ARRAY_SIZE(adihdmi_register_defaults),
+
+ .volatile_reg = adihdmi_register_volatile,
+};
+
+/* -----------------------------------------------------------------------------
+ * Hardware configuration
+ */
+
+ static void adihdmi_audio_setup(struct adihdmi * adihdmi)
+{
+ /* Select I2S. */
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_AUDIO_SOURCE, 0x01);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_I2S_CONFIG, 0x84);
+
+ /* Setup clocks for 48KHz. */
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_N0, 0x00);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_N1, 0x18);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_N2, 0x00);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_I2C_FREQ_ID_CFG, 0xF0, 0x20);
+
+ /* Set audio word length to 24 bits. */
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_AUDIO_CFG3, 0x0F, 0x0B);
+
+ /* Update audio infoframe. */
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_INFOFRAME_UPDATE, 0x20, 0x20);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_AUDIO_INFOFRAME(0), 0x07, 0x01);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_AUDIO_INFOFRAME(3), 0x1F, 0x00);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_INFOFRAME_UPDATE, 0x20, 0x00);
+}
+
+static void adihdmi_set_colormap(struct adihdmi *adihdmi, bool enable,
+ const uint16_t *coeff,
+ unsigned int scaling_factor)
+{
+ unsigned int i;
+
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_CSC_UPPER(1),
+ ADIHDMI_CSC_UPDATE_MODE, ADIHDMI_CSC_UPDATE_MODE);
+
+ if (enable) {
+ for (i = 0; i < 12; ++i) {
+ regmap_update_bits(adihdmi->regmap,
+ ADIHDMI_REG_CSC_UPPER(i),
+ 0x1f, coeff[i] >> 8);
+ regmap_write(adihdmi->regmap,
+ ADIHDMI_REG_CSC_LOWER(i),
+ coeff[i] & 0xff);
+ }
+ }
+
+ if (enable)
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_CSC_UPPER(0),
+ 0xe0, 0x80 | (scaling_factor << 5));
+ else
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_CSC_UPPER(0),
+ 0x80, 0x00);
+
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_CSC_UPPER(1),
+ ADIHDMI_CSC_UPDATE_MODE, 0);
+}
+
+static int adihdmi_packet_enable(struct adihdmi *adihdmi, unsigned int packet)
+{
+ if (packet & 0xff)
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_PACKET_ENABLE0,
+ packet, 0xff);
+
+ if (packet & 0xff00) {
+ packet >>= 8;
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_PACKET_ENABLE1,
+ packet, 0xff);
+ }
+
+ return 0;
+}
+
+static int adihdmi_packet_disable(struct adihdmi *adihdmi, unsigned int packet)
+{
+ if (packet & 0xff)
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_PACKET_ENABLE0,
+ packet, 0x00);
+
+ if (packet & 0xff00) {
+ packet >>= 8;
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_PACKET_ENABLE1,
+ packet, 0x00);
+ }
+
+ return 0;
+}
+
+/* Coefficients for adihdmi color space conversion */
+static const uint16_t adihdmi_csc_ycbcr_to_rgb[] = {
+ 0x0734, 0x04ad, 0x0000, 0x1c1b,
+ 0x1ddc, 0x04ad, 0x1f24, 0x0135,
+ 0x0000, 0x04ad, 0x087c, 0x1b77,
+};
+
+static void adihdmi_set_config_csc(struct adihdmi *adihdmi,
+ struct drm_connector *connector,
+ bool rgb)
+{
+ struct adihdmi_video_config config;
+ bool output_format_422, output_format_ycbcr;
+ unsigned int mode;
+ uint8_t infoframe[17];
+
+ if (adihdmi->edid)
+ config.hdmi_mode = drm_detect_hdmi_monitor(adihdmi->edid);
+ else
+ config.hdmi_mode = false;
+
+ hdmi_avi_infoframe_init(&config.avi_infoframe);
+
+ config.avi_infoframe.scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
+
+ if (rgb) {
+ config.csc_enable = false;
+ config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
+ } else {
+ config.csc_scaling_factor = ADIHDMI_CSC_SCALING_4;
+ config.csc_coefficents = adihdmi_csc_ycbcr_to_rgb;
+
+ if ((connector->display_info.color_formats &
+ DRM_COLOR_FORMAT_YCRCB422) &&
+ config.hdmi_mode) {
+ config.csc_enable = false;
+ config.avi_infoframe.colorspace =
+ HDMI_COLORSPACE_YUV422;
+ } else {
+ config.csc_enable = true;
+ config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
+ }
+ }
+
+ if (config.hdmi_mode) {
+ mode = ADIHDMI_HDMI_CFG_MODE_HDMI;
+
+ switch (config.avi_infoframe.colorspace) {
+ case HDMI_COLORSPACE_YUV444:
+ output_format_422 = false;
+ output_format_ycbcr = true;
+ break;
+ case HDMI_COLORSPACE_YUV422:
+ output_format_422 = true;
+ output_format_ycbcr = true;
+ break;
+ default:
+ output_format_422 = false;
+ output_format_ycbcr = false;
+ break;
+ }
+ } else {
+ mode = ADIHDMI_HDMI_CFG_MODE_DVI;
+ output_format_422 = false;
+ output_format_ycbcr = false;
+ }
+
+ adihdmi_packet_disable(adihdmi, ADIHDMI_INFOFRAME_PACKETS);
+
+ adihdmi_set_colormap(adihdmi, config.csc_enable,
+ config.csc_coefficents,
+ config.csc_scaling_factor);
+
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_VIDEO_INPUT_CFG1, 0x81,
+ (output_format_422 << 7) | output_format_ycbcr);
+
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_HDCP_HDMI_CFG,
+ ADIHDMI_HDMI_CFG_MODE_MASK, mode);
+
+ hdmi_avi_infoframe_pack(&config.avi_infoframe, infoframe,
+ sizeof(infoframe));
+
+ /* The AVI infoframe id is not configurable */
+ regmap_bulk_write(adihdmi->regmap, ADIHDMI_REG_AVI_INFOFRAME_VERSION,
+ infoframe + 1, sizeof(infoframe) - 1);
+
+ adihdmi_packet_enable(adihdmi, ADIHDMI_INFOFRAME_PACKETS);
+}
+
+static void adihdmi_set_link_config(struct adihdmi *adihdmi,
+ const struct adihdmi_link_config *config)
+{
+ /*
+ * The input style values documented in the datasheet don't match the
+ * hardware register field values :-(
+ */
+ static const unsigned int input_styles[4] = { 0, 2, 1, 3 };
+
+ unsigned int clock_delay;
+ unsigned int color_depth;
+ unsigned int input_id;
+
+ clock_delay = (config->clock_delay + 1200) / 400;
+ color_depth = config->input_color_depth == 8 ? 3
+ : (config->input_color_depth == 10 ? 1 : 2);
+
+ /* TODO Support input ID 6 */
+ if (config->input_colorspace != HDMI_COLORSPACE_YUV422)
+ input_id = config->input_clock == ADIHDMI_INPUT_CLOCK_DDR
+ ? 5 : 0;
+ else if (config->input_clock == ADIHDMI_INPUT_CLOCK_DDR)
+ input_id = config->embedded_sync ? 8 : 7;
+ else if (config->input_clock == ADIHDMI_INPUT_CLOCK_2X)
+ input_id = config->embedded_sync ? 4 : 3;
+ else
+ input_id = config->embedded_sync ? 2 : 1;
+
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_I2C_FREQ_ID_CFG, 0xf,
+ input_id);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_VIDEO_INPUT_CFG1, 0x7e,
+ (color_depth << 4) |
+ (input_styles[config->input_style] << 2));
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_VIDEO_INPUT_CFG2,
+ config->input_justification << 3);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_TIMING_GEN_SEQ,
+ config->sync_pulse << 2);
+
+ regmap_write(adihdmi->regmap, 0xba, clock_delay << 5);
+
+ adihdmi->embedded_sync = config->embedded_sync;
+ adihdmi->hsync_polarity = config->hsync_polarity;
+ adihdmi->vsync_polarity = config->vsync_polarity;
+ adihdmi->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
+}
+
+static void adihdmi_power_on(struct adihdmi *adihdmi)
+{
+ adihdmi->current_edid_segment = -1;
+
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(0),
+ ADIHDMI_INT0_EDID_READY);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(1),
+ ADIHDMI_INT1_DDC_ERROR);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_POWER,
+ ADIHDMI_POWER_POWER_DOWN, 0);
+
+ /*
+ * Per spec it is allowed to pulse the HDP signal to indicate that the
+ * EDID information has changed. Some monitors do this when they wakeup
+ * from standby or are enabled. When the HDP goes low the adihdmi is
+ * reset and the outputs are disabled which might cause the monitor to
+ * go to standby again. To avoid this we ignore the HDP pin for the
+ * first few seconds after enabling the output.
+ */
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_POWER2,
+ ADIHDMI_REG_POWER2_HDP_SRC_MASK,
+ ADIHDMI_REG_POWER2_HDP_SRC_NONE);
+
+ /*
+ * Most of the registers are reset during power down or when HPD is low.
+ */
+ regcache_sync(adihdmi->regmap);
+
+ adihdmi->powered = true;
+}
+
+static void adihdmi_power_off(struct adihdmi *adihdmi)
+{
+ /* TODO: setup additional power down modes */
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_POWER,
+ ADIHDMI_POWER_POWER_DOWN,
+ ADIHDMI_POWER_POWER_DOWN);
+ regcache_mark_dirty(adihdmi->regmap);
+
+ adihdmi->powered = false;
+}
+
+/* -----------------------------------------------------------------------------
+ * Interrupt and hotplug detection
+ */
+
+static bool adihdmi_hpd(struct adihdmi *adihdmi)
+{
+ unsigned int irq0;
+ int ret;
+
+ ret = regmap_read(adihdmi->regmap, ADIHDMI_REG_INT(0), &irq0);
+ if (ret < 0)
+ return false;
+
+ if (irq0 & ADIHDMI_INT0_HDP) {
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(0),
+ ADIHDMI_INT0_HDP);
+ return true;
+ }
+
+ return false;
+}
+
+static int adihdmi_irq_process(struct adihdmi *adihdmi)
+{
+ unsigned int irq0, irq1;
+ int ret;
+
+ ret = regmap_read(adihdmi->regmap, ADIHDMI_REG_INT(0), &irq0);
+ if (ret < 0)
+ return ret;
+
+ ret = regmap_read(adihdmi->regmap, ADIHDMI_REG_INT(1), &irq1);
+ if (ret < 0)
+ return ret;
+
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(0), irq0);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(1), irq1);
+
+ if (irq0 & ADIHDMI_INT0_HDP)
+ drm_helper_hpd_irq_event(adihdmi->encoder->dev);
+
+ if (irq0 & ADIHDMI_INT0_EDID_READY || irq1 & ADIHDMI_INT1_DDC_ERROR) {
+ adihdmi->edid_read = true;
+
+ if (adihdmi->i2c_main->irq)
+ wake_up_all(&adihdmi->wq);
+ }
+
+ return 0;
+}
+
+static irqreturn_t adihdmi_irq_handler(int irq, void *devid)
+{
+ struct adihdmi *adihdmi = devid;
+ int ret;
+
+ ret = adihdmi_irq_process(adihdmi);
+ return ret < 0 ? IRQ_NONE : IRQ_HANDLED;
+}
+
+/* -----------------------------------------------------------------------------
+ * EDID retrieval
+ */
+
+static int adihdmi_wait_for_edid(struct adihdmi *adihdmi, int timeout)
+{
+ int ret;
+
+ if (adihdmi->i2c_main->irq) {
+ ret = wait_event_interruptible_timeout(adihdmi->wq,
+ adihdmi->edid_read, msecs_to_jiffies(timeout));
+ } else {
+ for (; timeout > 0; timeout -= 25) {
+ ret = adihdmi_irq_process(adihdmi);
+ if (ret < 0)
+ break;
+
+ if (adihdmi->edid_read)
+ break;
+
+ msleep(25);
+ }
+ }
+
+ return adihdmi->edid_read ? 0 : -EIO;
+}
+
+static int adihdmi_get_edid_block(void *data, u8 *buf, unsigned int block,
+ size_t len)
+{
+ struct adihdmi *adihdmi = data;
+ struct i2c_msg xfer[2];
+ uint8_t offset;
+ unsigned int i;
+ int ret;
+
+ if (len > 128)
+ return -EINVAL;
+
+ if (adihdmi->current_edid_segment != block / 2) {
+ unsigned int status;
+
+ ret = regmap_read(adihdmi->regmap, ADIHDMI_REG_DDC_STATUS,
+ &status);
+ if (ret < 0)
+ return ret;
+
+ if (status != 2) {
+ adihdmi->edid_read = false;
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_EDID_SEGMENT,
+ block);
+ ret = adihdmi_wait_for_edid(adihdmi, 200);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* Break this apart, hopefully more I2C controllers will
+ * support 64 byte transfers than 256 byte transfers
+ */
+
+ xfer[0].addr = adihdmi->i2c_edid->addr;
+ xfer[0].flags = 0;
+ xfer[0].len = 1;
+ xfer[0].buf = &offset;
+ xfer[1].addr = adihdmi->i2c_edid->addr;
+ xfer[1].flags = I2C_M_RD;
+ xfer[1].len = 64;
+ xfer[1].buf = adihdmi->edid_buf;
+
+ offset = 0;
+
+ for (i = 0; i < 4; ++i) {
+ ret = i2c_transfer(adihdmi->i2c_edid->adapter, xfer,
+ ARRAY_SIZE(xfer));
+ if (ret < 0)
+ return ret;
+ else if (ret != 2)
+ return -EIO;
+
+ xfer[1].buf += 64;
+ offset += 64;
+ }
+
+ adihdmi->current_edid_segment = block / 2;
+ }
+
+ if (block % 2 == 0)
+ memcpy(buf, adihdmi->edid_buf, len);
+ else
+ memcpy(buf, adihdmi->edid_buf + 128, len);
+
+ return 0;
+}
+
+static int adihdmi_mode_valid(struct drm_display_mode *mode)
+{
+ if (mode->clock > 165000)
+ return MODE_CLOCK_HIGH;
+
+ return MODE_OK;
+}
+
+/* -----------------------------------------------------------------------------
+ * DT and private structure operations
+ */
+
+#define conn_to_adihdmi2(x) \
+ container_of(x, struct adihdmi2, connector);
+
+#define enc_to_adihdmi2(x) \
+ container_of(x, struct adihdmi2, encoder);
+
+#define enc_to_adihdmi(x) \
+ (&(container_of(x, struct adihdmi2, encoder)->base))
+
+static int adihdmi_parse_dt(struct device_node *np,
+ struct adihdmi_link_config *config)
+{
+ memset(config, 0, sizeof(*config));
+
+ config->input_color_depth = 8;
+
+ config->input_colorspace = HDMI_COLORSPACE_RGB;
+ //config->input_colorspace = HDMI_COLORSPACE_YUV422;
+ //config->input_colorspace = HDMI_COLORSPACE_YUV444;
+
+ config->input_clock = ADIHDMI_INPUT_CLOCK_1X;
+ //config->input_clock = ADIHDMI_INPUT_CLOCK_2X;
+ //config->input_clock = ADIHDMI_INPUT_CLOCK_DDR;
+
+ if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||
+ config->input_clock != ADIHDMI_INPUT_CLOCK_1X) {
+
+ config->input_style = 1;
+ //config->input_justification = ADIHDMI_INPUT_JUSTIFICATION_LEFT;
+ config->input_justification = ADIHDMI_INPUT_JUSTIFICATION_EVENLY;
+ //config->input_justification = ADIHDMI_INPUT_JUSTIFICATION_RIGHT;
+
+ } else {
+ config->input_style = 1;
+ config->input_justification = ADIHDMI_INPUT_JUSTIFICATION_LEFT;
+ }
+
+ config->clock_delay = 0;
+ config->embedded_sync = 0;
+
+ /* Hardcode the sync pulse configurations for now. */
+ config->sync_pulse = ADIHDMI_INPUT_SYNC_PULSE_NONE;
+ config->vsync_polarity = ADIHDMI_SYNC_POLARITY_PASSTHROUGH;
+ config->hsync_polarity = ADIHDMI_SYNC_POLARITY_PASSTHROUGH;
+
+ return 0;
+}
+
+static const int edid_i2c_addr = 0x7e;
+static const int packet_i2c_addr = 0x70;
+static const int cec_i2c_addr = 0x78;
+
+static int adihdmi_create(struct i2c_client *i2c, struct adihdmi *adihdmi)
+{
+ struct adihdmi_link_config link_config;
+ struct device *dev = &i2c->dev;
+ unsigned int val;
+ int ret;
+
+ adihdmi->powered = false;
+ adihdmi->status = connector_status_disconnected;
+
+ ret = adihdmi_parse_dt(NULL, &link_config);
+ if (ret)
+ {
+ pr_err("%s - %d - Bad parse\n", __FUNCTION__, __LINE__);
+ return -EINVAL;
+ }
+
+ /*
+ * The power down GPIO is optional. If present, toggle it from active to
+ * inactive to wake up the encoder.
+ */
+ adihdmi->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
+ if (IS_ERR(adihdmi->gpio_pd))
+ {
+ pr_err("%s - %d - Bad PD GPIO\n", __FUNCTION__, __LINE__);
+ return PTR_ERR(adihdmi->gpio_pd);
+ }
+
+ if (adihdmi->gpio_pd) {
+ mdelay(5);
+ gpiod_set_value_cansleep(adihdmi->gpio_pd, 0);
+ }
+
+ adihdmi->regmap = devm_regmap_init_i2c(i2c, &adihdmi_regmap_config);
+ if (IS_ERR(adihdmi->regmap))
+ {
+ pr_err("%s - %d - Bad reg map init\n", __FUNCTION__, __LINE__);
+ return PTR_ERR(adihdmi->regmap);
+ }
+
+ ret = regmap_read(adihdmi->regmap, ADIHDMI_REG_CHIP_REVISION, &val);
+ if (ret)
+ {
+ pr_err("%s - %d - Bad reg map read\n", __FUNCTION__, __LINE__);
+ return ret;
+ }
+ dev_dbg(dev, "Rev. %d\n", val);
+
+ ret = regmap_register_patch(adihdmi->regmap, adihdmi_fixed_registers,
+ ARRAY_SIZE(adihdmi_fixed_registers));
+ if (ret)
+ {
+ pr_err("%s - %d - Bad reg map patch\n", __FUNCTION__, __LINE__);
+ return ret;
+ }
+
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_EDID_I2C_ADDR, edid_i2c_addr);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_PACKET_I2C_ADDR,
+ packet_i2c_addr);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_CEC_I2C_ADDR, cec_i2c_addr);
+ adihdmi_packet_disable(adihdmi, 0xffff);
+
+ adihdmi->i2c_main = i2c;
+ adihdmi->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
+ if (!adihdmi->i2c_edid)
+ {
+ pr_err("%s - %d - No mem for EDID\n", __FUNCTION__, __LINE__);
+ return -ENOMEM;
+ }
+
+ if (i2c->irq) {
+ init_waitqueue_head(&adihdmi->wq);
+
+ ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
+ adihdmi_irq_handler,
+ IRQF_ONESHOT, dev_name(dev),
+ adihdmi);
+ if (ret)
+ {
+ pr_err("%s - %d - Bad IRQ thread request\n", __FUNCTION__, __LINE__);
+ goto err_i2c_unregister_device;
+ }
+ }
+
+ /* CEC is unused for now */
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_CEC_CTRL,
+ ADIHDMI_CEC_CTRL_POWER_DOWN);
+
+ adihdmi_power_off(adihdmi);
+
+ adihdmi_set_link_config(adihdmi, &link_config);
+
+ adihdmi_audio_setup(adihdmi);
+
+ return 0;
+
+err_i2c_unregister_device:
+ i2c_unregister_device(adihdmi->i2c_edid);
+
+ return ret;
+}
+
+static void adihdmi_destroy(struct adihdmi *priv)
+{
+ i2c_unregister_device(priv->i2c_edid);
+}
+
+/* -----------------------------------------------------------------------------
+ * Encoder operations
+ */
+
+static int adihdmi_encoder_get_modes(struct adihdmi *adihdmi,
+ struct drm_connector *connector)
+{
+ struct edid *edid;
+ unsigned int count;
+
+ /* Reading the EDID only works if the device is powered */
+ if (!adihdmi->powered) {
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(0),
+ ADIHDMI_INT0_EDID_READY);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_INT(1),
+ ADIHDMI_INT1_DDC_ERROR);
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_POWER,
+ ADIHDMI_POWER_POWER_DOWN, 0);
+ adihdmi->current_edid_segment = -1;
+ }
+
+ edid = drm_do_get_edid(connector, adihdmi_get_edid_block, adihdmi);
+
+ if (!adihdmi->powered)
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_POWER,
+ ADIHDMI_POWER_POWER_DOWN,
+ ADIHDMI_POWER_POWER_DOWN);
+
+ kfree(adihdmi->edid);
+ adihdmi->edid = edid;
+ if (!edid)
+ {
+ pr_err("%s - %d - No EDID\n", __FUNCTION__, __LINE__);
+ return 0;
+ }
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ count = drm_add_edid_modes(connector, edid);
+
+ adihdmi_set_config_csc(adihdmi, connector, adihdmi->rgb);
+
+ return count;
+}
+
+static void adihdmi_encoder_dpms(struct drm_encoder *encoder, int mode)
+{
+ struct adihdmi2 *priv2 = enc_to_adihdmi2(encoder);
+
+ if (mode == DRM_MODE_DPMS_ON)
+ adihdmi_power_on(&priv2->base);
+ else
+ adihdmi_power_off(&priv2->base);
+}
+
+ static enum drm_connector_status
+adihdmi_encoder_detect(struct adihdmi *adihdmi,
+ struct drm_connector *connector)
+{
+ enum drm_connector_status status;
+ unsigned int val;
+ bool hpd;
+ int ret;
+
+ ret = regmap_read(adihdmi->regmap, ADIHDMI_REG_STATUS, &val);
+ if (ret < 0)
+ {
+ pr_err("%s - %d - Disconnected\n", __FUNCTION__, __LINE__);
+ return connector_status_disconnected;
+ }
+
+ if (val & ADIHDMI_STATUS_HPD)
+ status = connector_status_connected;
+ else
+ status = connector_status_disconnected;
+
+ hpd = adihdmi_hpd(adihdmi);
+
+ /* The chip resets itself when the cable is disconnected, so in case
+ * there is a pending HPD interrupt and the cable is connected there was
+ * at least one transition from disconnected to connected and the chip
+ * has to be reinitialized. */
+ if (status == connector_status_connected && hpd && adihdmi->powered) {
+ regcache_mark_dirty(adihdmi->regmap);
+ adihdmi_power_on(adihdmi);
+ adihdmi_encoder_get_modes(adihdmi, connector);
+ if (adihdmi->status == connector_status_connected)
+ status = connector_status_disconnected;
+ } else {
+ /* Renable HDP sensing */
+ regmap_update_bits(adihdmi->regmap, ADIHDMI_REG_POWER2,
+ ADIHDMI_REG_POWER2_HDP_SRC_MASK,
+ ADIHDMI_REG_POWER2_HDP_SRC_BOTH);
+ }
+
+ adihdmi->status = status;
+ return status;
+}
+
+static bool adihdmi_encoder_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
+{
+ return true;
+}
+
+static int adihdmi_encoder_mode_valid(struct drm_encoder *encoder, struct drm_display_mode *mode)
+{
+ return adihdmi_mode_valid(mode);
+}
+
+static void adihdmi_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adj_mode)
+{
+ unsigned int low_refresh_rate;
+ unsigned int hsync_polarity = 0;
+ unsigned int vsync_polarity = 0;
+ struct adihdmi *adihdmi = enc_to_adihdmi(encoder);
+
+ if (adihdmi->embedded_sync) {
+ unsigned int hsync_offset, hsync_len;
+ unsigned int vsync_offset, vsync_len;
+
+ hsync_offset = adj_mode->crtc_hsync_start -
+ adj_mode->crtc_hdisplay;
+ vsync_offset = adj_mode->crtc_vsync_start -
+ adj_mode->crtc_vdisplay;
+ hsync_len = adj_mode->crtc_hsync_end -
+ adj_mode->crtc_hsync_start;
+ vsync_len = adj_mode->crtc_vsync_end -
+ adj_mode->crtc_vsync_start;
+
+ /* The hardware vsync generator has a off-by-one bug */
+ vsync_offset += 1;
+
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_HSYNC_PLACEMENT_MSB,
+ ((hsync_offset >> 10) & 0x7) << 5);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_SYNC_DECODER(0),
+ (hsync_offset >> 2) & 0xff);
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_SYNC_DECODER(1),
+ ((hsync_offset & 0x3) << 6) |
+ ((hsync_len >> 4) & 0x3f));
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_SYNC_DECODER(2),
+ ((hsync_len & 0xf) << 4) |
+ ((vsync_offset >> 6) & 0xf));
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_SYNC_DECODER(3),
+ ((vsync_offset & 0x3f) << 2) |
+ ((vsync_len >> 8) & 0x3));
+ regmap_write(adihdmi->regmap, ADIHDMI_REG_SYNC_DECODER(4),
+ vsync_len & 0xff);
+
+ hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);
+ vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);
+ } else {
+ enum adihdmi_sync_polarity mode_hsync_polarity;
+ enum adihdmi_sync_polarity mode_vsync_polarity;
+
+ /**
+ * If the input signal is always low or always high we want to
+ * invert or let it passthrough depending on the polarity of the
+ * current mode.
+ **/
+ if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)
+ mode_hsync_polarity = ADIHDMI_SYNC_POLARITY_LOW;
+ else
+ mode_hsync_polarity = ADIHDMI_SYNC_POLARITY_HIGH;
+
+ if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)
+ mode_vsync_polarity = ADIHDMI_SYNC_POLARITY_LOW;
+ else
+ mode_vsync_polarity = ADIHDMI_SYNC_POLARITY_HIGH;
+
+ if (adihdmi->hsync_polarity != mode_hsync_polarity &&
+ adihdmi->hsync_polarity !=
+ ADIHDMI_SYNC_POLARITY_PASSTHROUGH)
+ hsync_polarity = 1;
+
+ if (adihdmi->vsync_polarity != mode_vsync_polarity &&
+ adihdmi->vsync_polarity !=
+ ADIHDMI_SYNC_POLARITY_PASSTHROUGH)
+ vsync_polarity = 1;
+ }
+
+ if (mode->vrefresh <= 24000)
+ low_refresh_rate = ADIHDMI_LOW_REFRESH_RATE_24HZ;
+ else if (mode->vrefresh <= 25000)
+ low_refresh_rate = ADIHDMI_LOW_REFRESH_RATE_25HZ;
+ else if (mode->vrefresh <= 30000)
+ low_refresh_rate = ADIHDMI_LOW_REFRESH_RATE_30HZ;
+ else
+ low_refresh_rate = ADIHDMI_LOW_REFRESH_RATE_NONE;
+
+ regmap_update_bits(adihdmi->regmap, 0xfb,
+ 0x6, low_refresh_rate << 1);
+ regmap_update_bits(adihdmi->regmap, 0x17,
+ 0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
+
+ /*
+ * TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is
+ * supposed to give better results.
+ */
+
+ adihdmi->f_tmds = mode->clock;
+}
+
+static void adihdmi_encoder_prepare(struct drm_encoder *encoder)
+{
+ adihdmi_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
+}
+
+static void adihdmi_encoder_commit(struct drm_encoder *encoder)
+{
+ adihdmi_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
+}
+
+static struct drm_encoder_helper_funcs adihdmi_encoder_helper_funcs = {
+ .dpms = adihdmi_encoder_dpms,
+ .mode_fixup = adihdmi_encoder_mode_fixup,
+ .prepare = adihdmi_encoder_prepare,
+ .commit = adihdmi_encoder_commit,
+ .mode_set = adihdmi_encoder_mode_set,
+};
+
+static void adihdmi_encoder_destroy(struct drm_encoder *encoder)
+{
+ struct adihdmi2 *priv = enc_to_adihdmi2(encoder);
+
+ adihdmi_destroy(&priv->base);
+ drm_encoder_cleanup(encoder);
+}
+
+static const struct drm_encoder_funcs adihdmi_encoder_funcs = {
+ .destroy = adihdmi_encoder_destroy,
+};
+
+/* -----------------------------------------------------------------------------
+ * Slave operations
+ */
+
+static int adihdmi_encoder_slave_create_resources(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+ pr_debug("%s - %d\n", __FUNCTION__, __LINE__);
+ return 0;
+}
+
+static void adihdmi_encoder_slave_destroy(struct drm_encoder *encoder)
+{
+ pr_debug("%s - %d\n", __FUNCTION__, __LINE__);
+}
+
+ static enum drm_connector_status
+adihdmi_encoder_slave_detect(struct drm_encoder *encoder,
+ struct drm_connector *connector)
+{
+ return adihdmi_encoder_detect(enc_to_adihdmi(encoder),
+ connector);
+}
+
+static int adihdmi_encoder_slave_get_modes(struct drm_encoder *encoder,
+ struct drm_connector *connector)
+{
+ return adihdmi_encoder_get_modes(enc_to_adihdmi(encoder),
+ connector);
+}
+
+
+static void adihdmi_encoder_slave_set_config(struct drm_encoder *encoder, void *params)
+{
+ pr_debug("%s - %d\n", __FUNCTION__, __LINE__);
+}
+
+static int adihdmi_encoder_set_property(struct drm_encoder *encoder, struct drm_connector *connector, struct drm_property *property, uint64_t val)
+{
+ pr_debug("%s - %d\n", __FUNCTION__, __LINE__);
+ return 0;
+}
+
+static struct drm_encoder_slave_funcs adihdmi_encoder_slave_funcs = {
+ .create_resources = adihdmi_encoder_slave_create_resources,
+ .destroy = adihdmi_encoder_slave_destroy,
+ .detect = adihdmi_encoder_slave_detect,
+ .dpms = adihdmi_encoder_dpms,
+ .get_modes = adihdmi_encoder_slave_get_modes,
+ .mode_fixup = adihdmi_encoder_mode_fixup,
+ .mode_set = adihdmi_encoder_mode_set,
+ .mode_valid = adihdmi_encoder_mode_valid,
+ .set_config = adihdmi_encoder_slave_set_config,
+ .set_property = adihdmi_encoder_set_property,
+};
+
+/* -----------------------------------------------------------------------------
+ * Connector operations
+ */
+
+static int adihdmi_connector_get_modes(struct drm_connector *connector)
+{
+ struct adihdmi2 *priv = conn_to_adihdmi2(connector);
+
+ return adihdmi_encoder_get_modes(&priv->base, connector);
+}
+
+static int adihdmi_connector_mode_valid(struct drm_connector *connector,
+ struct drm_display_mode *mode)
+{
+ return adihdmi_mode_valid(mode);
+}
+
+ static struct drm_encoder *
+adihdmi_connector_best_encoder(struct drm_connector *connector)
+{
+ struct adihdmi2 *priv = conn_to_adihdmi2(connector);
+
+ return &priv->encoder;
+}
+
+static struct drm_connector_helper_funcs adihdmi_connector_helper_funcs = {
+ .get_modes = adihdmi_connector_get_modes,
+ .mode_valid = adihdmi_connector_mode_valid,
+ .best_encoder = adihdmi_connector_best_encoder,
+};
+
+ static enum drm_connector_status
+adihdmi_connector_detect(struct drm_connector *connector, bool force)
+{
+ struct adihdmi2 *priv = conn_to_adihdmi2(connector);
+
+ return adihdmi_encoder_detect(&priv->base, connector);
+}
+
+static void adihdmi_connector_destroy(struct drm_connector *connector)
+{
+ drm_connector_unregister(connector);
+ drm_connector_cleanup(connector);
+}
+
+static struct drm_connector_funcs adihdmi_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .detect = adihdmi_connector_detect,
+ .destroy = adihdmi_connector_destroy,
+};
+
+/* -----------------------------------------------------------------------------
+ * Component operations
+ */
+
+static int adihdmi_bind(struct device *dev, struct device *master, void *data)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct drm_device *drm = data;
+ struct adihdmi2 *priv;
+ uint32_t crtcs = 0;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ {
+ pr_err("%s - %d - No memory for ADIHDMI\n", __FUNCTION__, __LINE__);
+ return -ENOMEM;
+ }
+
+ dev_set_drvdata(dev, priv);
+
+ if (dev->of_node)
+ crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
+
+ /* If no CRTCs were found, fall back to our old behaviour */
+ if (crtcs == 0) {
+ dev_warn(dev, "Falling back to first CRTC\n");
+ crtcs = 1 << 0;
+ }
+
+ priv->base.encoder = &priv->encoder;
+ priv->connector.interlace_allowed = 1;
+ priv->encoder.possible_crtcs = crtcs;
+
+ ret = adihdmi_create(client, &priv->base);
+ if (ret)
+ return ret;
+
+ drm_encoder_helper_add(&priv->encoder, &adihdmi_encoder_helper_funcs);
+ ret = drm_encoder_init(drm, &priv->encoder, &adihdmi_encoder_funcs,
+ DRM_MODE_ENCODER_TMDS, NULL);
+ if (ret)
+ goto err_encoder;
+
+ drm_connector_helper_add(&priv->connector,
+ &adihdmi_connector_helper_funcs);
+ ret = drm_connector_init(drm, &priv->connector,
+ &adihdmi_connector_funcs,
+ DRM_MODE_CONNECTOR_HDMIA);
+ if (ret)
+ goto err_connector;
+
+ ret = drm_connector_register(&priv->connector);
+ if (ret)
+ goto err_sysfs;
+
+ priv->connector.encoder = &priv->encoder;
+ drm_mode_connector_attach_encoder(&priv->connector, &priv->encoder);
+
+ return 0;
+
+err_sysfs:
+ drm_connector_cleanup(&priv->connector);
+err_connector:
+ drm_encoder_cleanup(&priv->encoder);
+err_encoder:
+ adihdmi_destroy(&priv->base);
+ return ret;
+
+
+}
+
+static void adihdmi_unbind(struct device *dev, struct device *master, void *data)
+{
+ struct adihdmi2 *priv = dev_get_drvdata(dev);
+
+ drm_connector_cleanup(&priv->connector);
+ drm_encoder_cleanup(&priv->encoder);
+ adihdmi_destroy(&priv->base);
+}
+
+static const struct component_ops adihdmi_ops =
+{
+ .bind = adihdmi_bind,
+ .unbind = adihdmi_unbind,
+};
+
+/* -----------------------------------------------------------------------------
+ * Init operations
+ */
+
+static int adihdmi_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+{
+ return component_add(&i2c->dev, &adihdmi_ops);
+}
+
+static int adihdmi_remove(struct i2c_client *i2c)
+{
+ component_del(&i2c->dev, &adihdmi_ops);
+
+ return 0;
+}
+
+static int adihdmi_encoder_init(struct i2c_client *i2c, struct drm_device *dev,
+ struct drm_encoder_slave *encoder_slave)
+{
+
+ struct adihdmi *adihdmi;
+ int ret;
+
+ adihdmi = kzalloc(sizeof(*adihdmi), GFP_KERNEL);
+ if (!adihdmi)
+ return -ENOMEM;
+
+ adihdmi->encoder = &encoder_slave->base;
+
+ ret = adihdmi_create(i2c, adihdmi);
+ if (ret) {
+ kfree(adihdmi);
+ return ret;
+ }
+
+ encoder_slave->slave_priv = adihdmi;
+ encoder_slave->slave_funcs = &adihdmi_encoder_slave_funcs;
+
+ return 0;
+}
+
+static const struct i2c_device_id adihdmi_i2c_ids[] = {
+ { "adv7511", 0 },
+ { "adv7511w", 0 },
+ { "adv7513", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adihdmi_i2c_ids);
+
+static const struct of_device_id adihdmi_of_ids[] = {
+ { .compatible = "adi,adv7511", },
+ { .compatible = "adi,adv7511w", },
+ { .compatible = "adi,adv7513", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, adihdmi_of_ids);
+
+static struct drm_i2c_encoder_driver adihdmi_driver = {
+ .i2c_driver = {
+ .driver = {
+ .name = "adihdmi",
+ .of_match_table = adihdmi_of_ids,
+ },
+ .id_table = adihdmi_i2c_ids,
+ .probe = adihdmi_probe,
+ .remove = adihdmi_remove,
+ },
+
+ .encoder_init = adihdmi_encoder_init,
+};
+
+static int __init adihdmi_init(void)
+{
+ return drm_i2c_encoder_register(THIS_MODULE, &adihdmi_driver);
+}
+module_init(adihdmi_init);
+
+static void __exit adihdmi_exit(void)
+{
+ drm_i2c_encoder_unregister(&adihdmi_driver);
+}
+module_exit(adihdmi_exit);
+
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
+MODULE_DESCRIPTION("ADIHDMI HDMI transmitter driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/misc/tps65218-pwrbutton.c b/drivers/input/misc/tps65218-pwrbutton.c
index a4455bb..b6d4321 100644
--- a/drivers/input/misc/tps65218-pwrbutton.c
+++ b/drivers/input/misc/tps65218-pwrbutton.c
@@ -36,7 +36,7 @@ struct tps6521x_data {
static const struct tps6521x_data tps65217_data = {
.reg_status = TPS65217_REG_STATUS,
.pb_mask = TPS65217_STATUS_PB,
- .name = "tps65217_pwrbutton",
+ .name = "tps65217_pwr_but",
};
static const struct tps6521x_data tps65218_data = {
diff --git a/drivers/input/touchscreen/ar1021_i2c.c b/drivers/input/touchscreen/ar1021_i2c.c
index b35b640..a1d4019 100644
--- a/drivers/input/touchscreen/ar1021_i2c.c
+++ b/drivers/input/touchscreen/ar1021_i2c.c
@@ -18,6 +18,11 @@
#define AR1021_MAX_X 4095
#define AR1021_MAX_Y 4095
+#define AR1021_MAX_PRESSURE 255
+
+#define AR1021_CMD 0x55
+
+#define AR1021_CMD_ENABLE_TOUCH 0x12
#define AR1021_CMD 0x55
@@ -27,8 +32,29 @@ struct ar1021_i2c {
struct i2c_client *client;
struct input_dev *input;
u8 data[AR1021_TOCUH_PKG_SIZE];
+ bool invert_x;
+ bool invert_y;
+ bool swap_xy;
};
+static bool ar1021_get_prop_u32(struct device *dev,
+ const char *property,
+ unsigned int default_value,
+ unsigned int *value)
+{
+ u32 val;
+ int error;
+
+ error = device_property_read_u32(dev, property, &val);
+ if (error) {
+ *value = default_value;
+ return false;
+ }
+
+ *value = val;
+ return true;
+}
+
static irqreturn_t ar1021_i2c_irq(int irq, void *dev_id)
{
struct ar1021_i2c *ar1021 = dev_id;
@@ -50,9 +76,22 @@ static irqreturn_t ar1021_i2c_irq(int irq, void *dev_id)
x = ((data[2] & 0x1f) << 7) | (data[1] & 0x7f);
y = ((data[4] & 0x1f) << 7) | (data[3] & 0x7f);
- input_report_abs(input, ABS_X, x);
- input_report_abs(input, ABS_Y, y);
+ if (ar1021->invert_x)
+ x = AR1021_MAX_X - x;
+
+ if (ar1021->invert_y)
+ y = AR1021_MAX_Y - y;
+
+ if (ar1021->swap_xy) {
+ input_report_abs(input, ABS_X, y);
+ input_report_abs(input, ABS_Y, x);
+ } else {
+ input_report_abs(input, ABS_X, x);
+ input_report_abs(input, ABS_Y, y);
+ }
+
input_report_key(input, BTN_TOUCH, button);
+ input_report_abs(input, ABS_PRESSURE, AR1021_MAX_PRESSURE);
input_sync(input);
out:
@@ -94,6 +133,8 @@ static int ar1021_i2c_probe(struct i2c_client *client,
struct ar1021_i2c *ar1021;
struct input_dev *input;
int error;
+ unsigned int offset_x, offset_y;
+ bool data_present;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "i2c_check_functionality error\n");
@@ -117,10 +158,44 @@ static int ar1021_i2c_probe(struct i2c_client *client,
input->open = ar1021_i2c_open;
input->close = ar1021_i2c_close;
+ ar1021->invert_x = device_property_read_bool(&client->dev, "touchscreen-inverted-x");
+ ar1021->invert_y = device_property_read_bool(&client->dev, "touchscreen-inverted-y");
+ ar1021->swap_xy = device_property_read_bool(&client->dev, "touchscreen-swapped-x-y");
+
+ data_present = ar1021_get_prop_u32(&client->dev,
+ "touchscreen-offset-x",
+ 0,
+ &offset_x);
+
+ if (data_present)
+ dev_info(&client->dev, "touchscreen-offset-x: %d\n", offset_x);
+
+ data_present = ar1021_get_prop_u32(&client->dev,
+ "touchscreen-offset-y",
+ 0,
+ &offset_y);
+
+ if (data_present)
+ dev_info(&client->dev, "touchscreen-offset-y: %d\n", offset_y);
+
__set_bit(INPUT_PROP_DIRECT, input->propbit);
- input_set_capability(input, EV_KEY, BTN_TOUCH);
- input_set_abs_params(input, ABS_X, 0, AR1021_MAX_X, 0, 0);
- input_set_abs_params(input, ABS_Y, 0, AR1021_MAX_Y, 0, 0);
+ //input_set_capability(input, EV_KEY, BTN_TOUCH);
+
+ input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+ input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+
+ if(ar1021->swap_xy)
+ {
+ input_set_abs_params(input, ABS_X, 0, AR1021_MAX_Y, 0, 0);
+ input_set_abs_params(input, ABS_Y, 0, AR1021_MAX_X, 0, 0);
+ }
+ else
+ {
+ input_set_abs_params(input, ABS_X, offset_x, AR1021_MAX_X-offset_x, 0, 0);
+ input_set_abs_params(input, ABS_Y, offset_y, AR1021_MAX_Y-offset_y, 0, 0);
+ }
+
+ input_set_abs_params(input, ABS_PRESSURE, 0, AR1021_MAX_PRESSURE, 0, 0);
input_set_drvdata(input, ar1021);
diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c b/drivers/input/touchscreen/ti_am335x_tsc.c
index b86c1e5..8379e86 100644
--- a/drivers/input/touchscreen/ti_am335x_tsc.c
+++ b/drivers/input/touchscreen/ti_am335x_tsc.c
@@ -33,6 +33,7 @@
#define ADCFSM_STEPID 0x10
#define SEQ_SETTLE 275
#define MAX_12BIT ((1 << 12) - 1)
+#define PRESSURE_MAX 1000
#define TSC_IRQENB_MASK (IRQENB_FIFO0THRES | IRQENB_EOS | IRQENB_HW_PEN)
@@ -232,6 +233,7 @@ static void titsc_read_coordinates(struct titsc *ts_dev,
for (i = 0; i < creads; i++) {
xvals[i] = titsc_readl(ts_dev, REG_FIFO0);
xvals[i] &= 0xfff;
+ pr_debug("i %d xval %d yval %d z1 %d z2 %d\n", i, xvals[i], yvals[i], *z1, *z2);
}
/*
@@ -310,13 +312,13 @@ static irqreturn_t titsc_irq(int irq, void *dev)
* Resistance(touch) = x plate resistance *
* x postion/4096 * ((z2 / z1) - 1)
*/
- z = z1 - z2;
+ z = z2 - z1;
z *= x;
z *= ts_dev->x_plate_resistance;
- z /= z2;
+ z /= z1;
z = (z + 2047) >> 12;
-
- if (z <= MAX_12BIT) {
+ pr_debug("x %d y %d z1 %d z2 %d z %d\n", x, y, z1, z2, z);
+ if (z <= PRESSURE_MAX) {
input_report_abs(input_dev, ABS_X, x);
input_report_abs(input_dev, ABS_Y, y);
input_report_abs(input_dev, ABS_PRESSURE, z);
@@ -451,6 +453,7 @@ static int titsc_probe(struct platform_device *pdev)
input_dev->name = "ti-tsc";
input_dev->dev.parent = &pdev->dev;
+ __set_bit(INPUT_PROP_DIRECT, input_dev->propbit);
input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 3726eac..8303a7e 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -513,6 +513,17 @@ config MISC_RTSX
tristate
default MISC_RTSX_PCI || MISC_RTSX_USB
+config TIEQEP
+ tristate "EQEP Hardware quadrature encoder controller"
+ depends on SOC_AM33XX
+ select PWM_TIPWMSS
+ help
+ Driver support for the EQEP quadrature encoder controller AM33XX
+ TI SOC
+
+ To compile this driver as a module, choose M here: the module
+ will be called tieqep.
+
source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
@@ -523,6 +534,7 @@ source "drivers/misc/mei/Kconfig"
source "drivers/misc/vmw_vmci/Kconfig"
source "drivers/misc/mic/Kconfig"
source "drivers/misc/genwqe/Kconfig"
+source "drivers/misc/cape/Kconfig"
source "drivers/misc/echo/Kconfig"
source "drivers/misc/cxl/Kconfig"
source "drivers/misc/ocxl/Kconfig"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index af22bbc..b836428 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -43,6 +43,7 @@ obj-y += ti-st/
obj-y += lis3lv02d/
obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
obj-$(CONFIG_ALTERA_STAPL) +=altera-stapl/
+obj-$(CONFIG_TIEQEP) += tieqep.o
obj-$(CONFIG_INTEL_MEI) += mei/
obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/
obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
@@ -50,6 +51,7 @@ obj-$(CONFIG_SRAM) += sram.o
obj-$(CONFIG_SRAM_EXEC) += sram-exec.o
obj-y += mic/
obj-$(CONFIG_GENWQE) += genwqe/
+obj-y += cape/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
diff --git b/drivers/misc/cape/Kconfig b/drivers/misc/cape/Kconfig
new file mode 100644
index 0000000..a2ef85e
--- /dev/null
+++ b/drivers/misc/cape/Kconfig
@@ -0,0 +1,5 @@
+#
+# Capes
+#
+
+source "drivers/misc/cape/beaglebone/Kconfig"
diff --git b/drivers/misc/cape/Makefile b/drivers/misc/cape/Makefile
new file mode 100644
index 0000000..7c4eb96
--- /dev/null
+++ b/drivers/misc/cape/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for cape like devices
+#
+
+obj-y += beaglebone/
diff --git b/drivers/misc/cape/beaglebone/Kconfig b/drivers/misc/cape/beaglebone/Kconfig
new file mode 100644
index 0000000..eeb6782
--- /dev/null
+++ b/drivers/misc/cape/beaglebone/Kconfig
@@ -0,0 +1,10 @@
+#
+# Beaglebone capes
+#
+
+config BEAGLEBONE_PINMUX_HELPER
+ tristate "Beaglebone Pinmux Helper"
+ depends on ARCH_OMAP2PLUS && OF
+ default n
+ help
+ Say Y here to include support for the pinmux helper
diff --git b/drivers/misc/cape/beaglebone/Makefile b/drivers/misc/cape/beaglebone/Makefile
new file mode 100644
index 0000000..7f4617a
--- /dev/null
+++ b/drivers/misc/cape/beaglebone/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for beaglebone capes
+#
+
+obj-$(CONFIG_BEAGLEBONE_PINMUX_HELPER) += bone-pinmux-helper.o
diff --git b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
new file mode 100644
index 0000000..d81363a
--- /dev/null
+++ b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
@@ -0,0 +1,242 @@
+/*
+ * Pinmux helper driver
+ *
+ * Copyright (C) 2013 Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/consumer.h>
+
+static const struct of_device_id bone_pinmux_helper_of_match[] = {
+ {
+ .compatible = "bone-pinmux-helper",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, bone_pinmux_helper_of_match);
+
+struct pinmux_helper_data {
+ struct pinctrl *pinctrl;
+ char *selected_state_name;
+};
+
+static ssize_t pinmux_helper_show_state(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ const char *name;
+
+ name = data->selected_state_name;
+ if (name == NULL || strlen(name) == 0)
+ name = "none";
+ return sprintf(buf, "%s\n", name);
+}
+
+static ssize_t pinmux_helper_store_state(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ struct pinctrl_state *state;
+ char *state_name;
+ char *s;
+ int err;
+
+ /* duplicate (as a null terminated string) */
+ state_name = kmalloc(count + 1, GFP_KERNEL);
+ if (state_name == NULL)
+ return -ENOMEM;
+ memcpy(state_name, buf, count);
+ state_name[count] = '\0';
+
+ /* and chop off newline */
+ s = strchr(state_name, '\n');
+ if (s != NULL)
+ *s = '\0';
+
+ /* try to select default state at first (if it exists) */
+ state = pinctrl_lookup_state(data->pinctrl, state_name);
+ if (!IS_ERR(state)) {
+ err = pinctrl_select_state(data->pinctrl, state);
+ if (err != 0)
+ dev_err(dev, "Failed to select state %s\n",
+ state_name);
+ } else {
+ dev_err(dev, "Failed to find state %s\n", state_name);
+ err = PTR_RET(state);
+ }
+
+ if (err == 0) {
+ kfree(data->selected_state_name);
+ data->selected_state_name = state_name;
+ }
+
+ return err ? err : count;
+}
+
+static DEVICE_ATTR(state, S_IWUSR | S_IRUGO,
+ pinmux_helper_show_state, pinmux_helper_store_state);
+
+static struct attribute *pinmux_helper_attributes[] = {
+ &dev_attr_state.attr,
+ NULL
+};
+
+static const struct attribute_group pinmux_helper_attr_group = {
+ .attrs = pinmux_helper_attributes,
+};
+
+static int bone_pinmux_helper_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct pinmux_helper_data *data;
+ struct pinctrl_state *state;
+ char *state_name;
+ const char *mode_name;
+ int mode_len;
+ int err;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ if (data == NULL) {
+ dev_err(dev, "Failed to allocate data\n");
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+
+ state_name = kmalloc(strlen(PINCTRL_STATE_DEFAULT) + 1,
+ GFP_KERNEL);
+ if (state_name == NULL) {
+ dev_err(dev, "Failed to allocate state name\n");
+ err = -ENOMEM;
+ goto err_no_state_mem;
+ }
+ data->selected_state_name = state_name;
+ strcpy(data->selected_state_name, PINCTRL_STATE_DEFAULT);
+
+ platform_set_drvdata(pdev, data);
+
+ data->pinctrl = devm_pinctrl_get(dev);
+ if (IS_ERR(data->pinctrl)) {
+ dev_err(dev, "Failed to get pinctrl\n");
+ err = PTR_RET(data->pinctrl);
+ goto err_no_pinctrl;
+ }
+
+ /* See if an initial mode is specified in the device tree */
+ mode_name = of_get_property(dev->of_node, "mode", &mode_len);
+
+ err = -1;
+ if (mode_name != NULL ) {
+ state_name = kmalloc(mode_len + 1, GFP_KERNEL);
+ if (state_name == NULL) {
+ dev_err(dev, "Failed to allocate state name\n");
+ err = -ENOMEM;
+ goto err_no_mode_mem;
+ }
+ strncpy(state_name, mode_name, mode_len);
+
+ /* try to select requested mode */
+ state = pinctrl_lookup_state(data->pinctrl, state_name);
+ if (!IS_ERR(state)) {
+ err = pinctrl_select_state(data->pinctrl, state);
+ if (err != 0) {
+ dev_warn(dev, "Unable to select requested mode %s\n", state_name);
+ kfree(state_name);
+ } else {
+ kfree(data->selected_state_name);
+ data->selected_state_name = state_name;
+ dev_notice(dev, "Set initial pinmux mode to %s\n", state_name);
+ }
+ }
+ }
+
+ /* try to select default state if mode_name failed */
+ if ( err != 0) {
+ state = pinctrl_lookup_state(data->pinctrl,
+ data->selected_state_name);
+ if (!IS_ERR(state)) {
+ err = pinctrl_select_state(data->pinctrl, state);
+ if (err != 0) {
+ dev_err(dev, "Failed to select default state\n");
+ goto err_no_state;
+ }
+ } else {
+ data->selected_state_name = '\0';
+ }
+ }
+
+ /* Register sysfs hooks */
+ err = sysfs_create_group(&dev->kobj, &pinmux_helper_attr_group);
+ if (err) {
+ dev_err(dev, "Failed to create sysfs group\n");
+ goto err_no_sysfs;
+ }
+
+ return 0;
+
+err_no_sysfs:
+err_no_state:
+err_no_mode_mem:
+ devm_pinctrl_put(data->pinctrl);
+err_no_pinctrl:
+ devm_kfree(dev, data->selected_state_name);
+err_no_state_mem:
+ devm_kfree(dev, data);
+err_no_mem:
+ return err;
+}
+
+static int bone_pinmux_helper_remove(struct platform_device *pdev)
+{
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ struct device *dev = &pdev->dev;
+
+ sysfs_remove_group(&dev->kobj, &pinmux_helper_attr_group);
+ kfree(data->selected_state_name);
+ devm_pinctrl_put(data->pinctrl);
+ devm_kfree(dev, data);
+
+ return 0;
+}
+
+struct platform_driver bone_pinmux_helper_driver = {
+ .probe = bone_pinmux_helper_probe,
+ .remove = bone_pinmux_helper_remove,
+ .driver = {
+ .name = "bone-pinmux-helper",
+ .owner = THIS_MODULE,
+ .of_match_table = bone_pinmux_helper_of_match,
+ },
+};
+
+module_platform_driver(bone_pinmux_helper_driver);
+
+MODULE_AUTHOR("Pantelis Antoniou");
+MODULE_DESCRIPTION("Beaglebone pinmux helper driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:bone-pinmux-helper");
diff --git b/drivers/misc/tieqep.c b/drivers/misc/tieqep.c
new file mode 100644
index 0000000..bb69ad4
--- /dev/null
+++ b/drivers/misc/tieqep.c
@@ -0,0 +1,754 @@
+/*
+ * TI eQEP driver for AM33xx devices
+ *
+ * Copyright (C) 2013 Nathaniel R. Lewis - http://teknoman117.wordpress.com/
+ * Copyright (C) 2015 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * sysfs entries
+ * - position = absolute - current position; relative - last latched value
+ * - mode => 0 - absolute; 1 - relative
+ * - period => sampling period for the hardware
+ * - enable => 0 - eQEP disabled, 1 - eQEP enabled
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/input.h>
+
+/* eQEP register offsets from its base IO address */
+#define QPOSCNT 0x0000
+#define QPOSINIT 0x0004
+#define QPOSMAX 0x0008
+#define QPOSCMP 0x000C
+#define QPOSILAT 0x0010
+#define QPOSSLAT 0x0014
+#define QPOSLAT 0x0018
+#define QUTMR 0x001C
+#define QUPRD 0x0020
+#define QWDTMR 0x0024
+#define QWDPRD 0x0026
+#define QDECCTL 0x0028
+#define QEPCTL 0x002A
+#define QCAPCTL 0x002C
+#define QPOSCTL 0x002E
+#define QEINT 0x0030
+#define QFLG 0x0032
+#define QCLR 0x0034
+#define QFRC 0x0036
+#define QEPSTS 0x0038
+#define QCTMR 0x003A
+#define QCPRD 0x003C
+#define QCTMRLAT 0x003E
+#define QCPRDLAT 0x0040
+#define QREVID 0x005C
+
+#if 0 /* if you wanted another way to modify IP registers... */
+typedef volatile u32 REG32;
+typedef volatile u16 REG16;
+struct EQEP_REGS {
+ REG32 q_poscnt; /* 0x00 position counter */
+ REG32 q_posinit; /* 0x04 position counter initialization */
+ REG32 q_posmax; /* 0x08 maximum position count */
+ REG32 q_poscmp; /* 0x0C position compare */
+ REG32 q_posilat; /* 0x10 index position latch */
+ REG32 q_posslat; /* 0x14 strobe position latch */
+ REG32 q_poslat; /* 0x18 position counter latch */
+ REG32 q_utmr; /* 0x1C unit timer */
+ REG32 q_uprd; /* 0x20 unit period */
+ REG16 q_wdtmr; /* 0x24 watchdog timer */
+ REG16 q_wdprd; /* 0x26 watchdog period */
+ REG16 q_decctl; /* 0x28 decoder control */
+ REG16 q_epctl; /* 0x2A control register */
+ REG16 q_capctl; /* 0x2C capture control */
+ REG16 q_posctl; /* 0x2E position compare control */
+ REG16 q_eint; /* 0x30 interrupt enable */
+ REG16 q_flg; /* 0x32 interrupt flag */
+ REG16 q_clr; /* 0x34 interrupt clear */
+ REG16 q_frc; /* 0x36 interrupt force */
+ REG16 q_epsts; /* 0x38 status */
+ REG16 q_ctmr; /* 0x3A capture timer */
+ REG16 q_cprd; /* 0x3C capture period */
+ REG16 q_ctmrlat; /* 0x3E capture timer latch */
+ REG16 q_prdlat; /* 0x40 capture period latch */
+ char q_fill1[0x5c-0x40];
+ REG32 q_revid; /* 0x5C revision id */
+};
+#endif
+
+
+/* Bits for the QDECTL register */
+#define QSRC1 (1 << 15)
+#define QSRC0 (1 << 14)
+#define SOEN (1 << 13)
+#define SPSEL (1 << 12)
+#define XCR (1 << 11)
+#define SWAP (1 << 10)
+#define IGATE (1 << 9)
+#define QAP (1 << 8)
+#define QBP (1 << 7)
+#define QIP (1 << 6)
+#define QSP (1 << 5)
+
+/* Bits for the QEPCTL register */
+#define FREESOFT1 (1 << 15)
+#define FREESOFT0 (1 << 14)
+#define PCRM1 (1 << 13)
+#define PCRM0 (1 << 12)
+#define SEI1 (1 << 11)
+#define SEI0 (1 << 10)
+#define IEI1 (1 << 9)
+#define IEI0 (1 << 8)
+#define SWI (1 << 7)
+#define SEL (1 << 6)
+#define IEL1 (1 << 5)
+#define IEL0 (1 << 4)
+#define PHEN (1 << 3)
+#define QCLM (1 << 2)
+#define UTE (1 << 1)
+#define WDE (1 << 0)
+
+/* Bits for the QCAPCTL register */
+#define CEN (1 << 15)
+#define CCPS2 (1 << 6)
+#define CCPS0 (1 << 5)
+#define CCPS1 (1 << 4)
+#define UPPS3 (1 << 3)
+#define UPPS2 (1 << 2)
+#define UPPS1 (1 << 1)
+#define UPPS0 (1 << 0)
+
+/* Bits for the QPOSCTL register */
+#define PCSHDW (1 << 15)
+#define PCLOAD (1 << 14)
+#define PCPOL (1 << 13)
+#define PCE (1 << 12)
+#define PCSPW11 (1 << 11)
+#define PCSPW10 (1 << 10)
+#define PCSPW9 (1 << 9)
+#define PCSPW8 (1 << 8)
+#define PCSPW7 (1 << 7)
+#define PCSPW6 (1 << 6)
+#define PCSPW5 (1 << 5)
+#define PCSPW4 (1 << 4)
+#define PCSPW3 (1 << 3)
+#define PCSPW2 (1 << 2)
+#define PCSPW1 (1 << 1)
+#define PCSPW0 (1 << 0)
+
+/* Bits for the interrupt registers */
+#define EQEP_INTERRUPT_MASK 0x0FFF
+#define UTOF (1 << 11)
+
+/* Bits to control the clock in the PWMSS subsystem */
+#define PWMSS_EQEPCLK_EN BIT(4)
+#define PWMSS_EQEPCLK_STOP_REQ BIT(5)
+#define PWMSS_EQEPCLK_EN_ACK BIT(4)
+
+/*
+ * Modes for the eQEP unit
+ * Absolute - the position entry represents the current position of the encoder.
+ * Poll this value and it will be notified every period nanoseconds
+ * Relative - the position entry represents the last latched position of the encoder
+ * This value is latched every period nanoseconds and the internal counter
+ * is subsequenty reset
+ */
+#define TIEQEP_MODE_ABSOLUTE 0
+#define TIEQEP_MODE_RELATIVE 1
+
+/* Structure defining the characteristics of the eQEP unit */
+struct eqep_chip
+{
+ /* Platform device for this eQEP unit */
+ struct platform_device *pdev;
+
+ /* Pointer to the base of the memory of the eQEP unit */
+ void __iomem *mmio_base;
+
+ /* SYSCLKOUT to the eQEP unit */
+ u32 clk_rate;
+
+ /* IRQ for the eQEP unit */
+ u16 irq;
+
+ /* Mode of the eQEP unit */
+ u8 op_mode;
+
+ /* work stuct for the notify userspace work */
+ struct work_struct notify_work;
+
+ /* Backup for driver suspension */
+ u16 prior_qepctl;
+ u16 prior_qeint;
+};
+
+/* Notify userspace work */
+static void notify_handler(struct work_struct *work)
+{
+ /* Get a reference to the eQEP driver */
+ struct eqep_chip *eqep = container_of(work, struct eqep_chip, notify_work);
+
+ /* Notify the userspace */
+ sysfs_notify(&eqep->pdev->dev.kobj, NULL, "position");
+}
+
+/* eQEP Interrupt handler */
+static irqreturn_t eqep_irq_handler(int irq, void *dev_id)
+{
+ /* Get the instance information */
+ struct platform_device *pdev = dev_id;
+ struct eqep_chip *eqep = platform_get_drvdata(pdev);
+
+ /* Get the interrupt flags */
+ u16 iflags = readw(eqep->mmio_base + QFLG) & EQEP_INTERRUPT_MASK;
+
+ /* Check the interrupt source(s) */
+ if (iflags & UTOF) {
+ /* Handle the unit timer overflow interrupt by notifying any potential pollers */
+ schedule_work(&eqep->notify_work);
+ }
+
+ /* Clear interrupt flags (write back triggered flags to the clear register) */
+ writew(iflags, eqep->mmio_base + QCLR);
+
+ /* Return that the IRQ was handled successfully */
+ return IRQ_HANDLED;
+}
+
+/* Function to read whether the eQEP unit is enabled or disabled */
+static ssize_t eqep_get_enabled(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ /* Get the instance structure */
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+ u16 enabled = 0;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+
+ /* Read the qep control register and mask all but the enabled bit */
+ enabled = readw(eqep->mmio_base + QEPCTL) & PHEN;
+
+ /* Return the target in string format */
+ return sprintf(buf, "%u\n", (enabled) ? 1 : 0);
+}
+
+/* Function to set if the eQEP is enabled */
+static ssize_t eqep_set_enabled(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ /* Get the instance structure */
+ int rc;
+ u16 val;
+ u8 enabled;
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ /* Convert the input string to an 8 bit uint */
+ if ((rc = kstrtou8(buf, 0, &enabled)))
+ return rc;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /* Get the existing state of QEPCTL */
+ val = readw(eqep->mmio_base + QEPCTL);
+
+ /* If we passed a number that is not 0, enable the eQEP */
+ if (enabled)
+ /* Enable the eQEP (Set PHEN in QEPCTL) */
+ val |= PHEN;
+ else
+ /* Disable the eQEP (Clear PHEN in QEPCTL) */
+ val &= ~PHEN;
+
+ /* Write flags back to control register */
+ writew(val, eqep->mmio_base + QEPCTL);
+
+ /* Return buffer length consumed (all) */
+ return count;
+}
+
+/* Function to read the current position of the eQEP */
+static ssize_t eqep_get_position(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ s32 position = 0;
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+
+ if (eqep->op_mode == TIEQEP_MODE_ABSOLUTE) {
+ position = readl(eqep->mmio_base + QPOSCNT);
+ } else if (eqep->op_mode == TIEQEP_MODE_RELATIVE) {
+ /* in relative mode, use the last latched value of the eQEP hardware */
+ position = readl(eqep->mmio_base + QPOSLAT);
+ dev_dbg(dev, "get_position:0x%08x\n", position);
+ }
+
+ return sprintf(buf, "%d\n", position);
+}
+
+/* Function to set the position of the eQEP hardware */
+static ssize_t eqep_set_position(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ int rc;
+ s32 position;
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ if ((rc = kstrtos32(buf, 0, &position)))
+ return rc;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /*
+ * If we are in absolute mode, set the position of the encoder,
+ * discard relative mode because thats pointless
+ */
+ if (eqep->op_mode == TIEQEP_MODE_ABSOLUTE) {
+ /* If absolute mode, set the current value of the eQEP hardware */
+ writel(position, eqep->mmio_base + QPOSCNT);
+ }
+
+ /* Return buffer length consumed (all) */
+ return count;
+}
+
+/* Function to read the period of the unit time event timer */
+static ssize_t eqep_get_timer_period(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+ u64 period;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /* Convert from counts per interrupt back into period_ns */
+ period = readl(eqep->mmio_base + QUPRD);
+ period = period * NSEC_PER_SEC;
+ do_div(period, eqep->clk_rate);
+
+ /* Otherwise write out the data */
+ return sprintf(buf, "%llu\n", period);
+}
+
+/* Function to set the unit timer period. 0 = off, greater than zero sets the period */
+static ssize_t eqep_set_timer_period(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ int rc;
+ u16 tmp;
+ u64 period;
+
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ if ((rc = kstrtou64(buf, 0, &period)))
+ return rc;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /* Disable the unit timer before modifying its period register */
+ tmp = readw(eqep->mmio_base + QEPCTL);
+ tmp &= ~(UTE | QCLM);
+ writew(tmp, eqep->mmio_base + QEPCTL);
+
+ /* Zero the unit timer counter register */
+ writel(0, eqep->mmio_base + QUTMR);
+
+ /* If the timer is enabled (a non-zero period has been passed) */
+ if (period) {
+ /* update the period */
+ period = period * eqep->clk_rate;
+ do_div(period, NSEC_PER_SEC);
+
+ dev_dbg(dev, "eqep_set_timer_period:%llu\n", period);
+
+ writel(period, eqep->mmio_base + QUPRD);
+
+ /* Enable unit timer, and latch QPOSLAT to QPOSCNT on timer expiration */
+ tmp |= UTE | QCLM;
+ writew(tmp, eqep->mmio_base + QEPCTL);
+ }
+
+ return count;
+}
+
+/* Function to read the mode of the eQEP hardware */
+static ssize_t eqep_get_mode(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%u\n", eqep->op_mode);
+}
+
+/* Function to set the mode of the eQEP hardware */
+static ssize_t eqep_set_mode(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ int rc;
+ u16 val;
+ u8 tmp_mode;
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ if ((rc = kstrtou8(buf, 0, &tmp_mode)))
+ return rc;
+
+ dev_dbg(dev, "eqep_set_mode:%d\n", tmp_mode);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ val = readw(eqep->mmio_base + QEPCTL);
+
+ if (tmp_mode == TIEQEP_MODE_ABSOLUTE) {
+ /*
+ * In absolute mode, don't reset the hardware based on time,
+ * so disable the unit timer position reset (Set PCRM[1:0] = 0)
+ */
+ val &= ~(PCRM1 | PCRM0);
+
+ eqep->op_mode = TIEQEP_MODE_ABSOLUTE;
+ } else if (tmp_mode == TIEQEP_MODE_RELATIVE) {
+ /*
+ * In relative mode, latch the value of the eQEP hardware on the
+ * overflow of the unit timer. So enable the unit timer position reset
+ * (Set PCRM[1:0] = 3)
+ */
+ val |= PCRM1 | PCRM0;
+
+ eqep->op_mode = TIEQEP_MODE_RELATIVE;
+ }
+
+ writew(val, eqep->mmio_base + QEPCTL);
+
+ return count;
+}
+
+/* Bind read/write functions to sysfs entries */
+static DEVICE_ATTR(enabled, 0644, eqep_get_enabled, eqep_set_enabled);
+static DEVICE_ATTR(position, 0644, eqep_get_position, eqep_set_position);
+static DEVICE_ATTR(period, 0644, eqep_get_timer_period, eqep_set_timer_period);
+static DEVICE_ATTR(mode, 0644, eqep_get_mode, eqep_set_mode);
+
+/* Array holding all of the sysfs entries */
+static const struct attribute *eqep_attrs[] = {
+ &dev_attr_enabled.attr,
+ &dev_attr_position.attr,
+ &dev_attr_period.attr,
+ &dev_attr_mode.attr,
+ NULL,
+};
+
+/* Driver function group */
+static const struct attribute_group eqep_device_attr_group = {
+ .attrs = (struct attribute **) eqep_attrs,
+};
+
+/* Driver compatibility list */
+static struct of_device_id eqep_of_match[] =
+{
+ { .compatible = "ti,am33xx-eqep" },
+ { }
+};
+
+/* Register our compatibilities for device trees */
+MODULE_DEVICE_TABLE(of, eqep_of_match);
+
+/* Create an instance of the eQEP driver */
+static int eqep_probe(struct platform_device *pdev)
+{
+ struct resource *r;
+ struct clk *clk;
+ struct eqep_chip *eqep;
+ struct pinctrl *pinctrl;
+
+ u64 period;
+ u16 status;
+ u32 value;
+
+ dev_info(&pdev->dev, "ver. 1.0\n");
+
+ /* Select pins provided through the device tree */
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl))
+ {
+ dev_warn(&pdev->dev, "unable to select pin group\n");
+ }
+
+ /* Allocate a eqep_driver object */
+ eqep = devm_kzalloc(&pdev->dev, sizeof(struct eqep_chip), GFP_KERNEL);
+ if (!eqep) {
+ dev_err(&pdev->dev, "failed to allocate memory\n");
+ return -ENOMEM;
+ }
+
+ /* Get a handle to the system clock object */
+ clk = devm_clk_get(pdev->dev.parent, "fck");
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "failed to get clock\n");
+ return PTR_ERR(clk);
+ }
+
+ /* Get the frequency of the system clock */
+ eqep->clk_rate = clk_get_rate(clk);
+ if (!eqep->clk_rate) {
+ dev_err(&pdev->dev, "failed to get clock rate\n");
+ return -EINVAL;
+ }
+
+ /* Get a resource containing the IRQ for this eQEP controller */
+ r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (unlikely(!r)) {
+ dev_err(&pdev->dev, "Invalid IRQ resource\n");
+ return -ENODEV;
+ }
+
+ /* Store the irq */
+ eqep->irq = r->start;
+
+ /* Get a resource containing the requested (from DT) memory address and range of eQEP controller */
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r) {
+ dev_err(&pdev->dev, "no memory resource defined\n");
+ return -ENODEV;
+ }
+
+ /* Remap the eQEP controller memory into our own memory space */
+ eqep->mmio_base = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(eqep->mmio_base))
+ return PTR_ERR(eqep->mmio_base);
+
+ /* Store the platform device in our eQEP data structure for later usage */
+ eqep->pdev = pdev;
+
+ /* Subscribe to the eQEP interrupt */
+ if (request_irq(eqep->irq, eqep_irq_handler, IRQF_IRQPOLL, "eqep_interrupt", pdev))
+ {
+ dev_err(&pdev->dev, "unable to request irq for eQEP\n");
+ return -ENODEV;
+ }
+
+ /* Register controls to sysfs */
+ if (sysfs_create_group(&pdev->dev.kobj, &eqep_device_attr_group))
+ {
+ dev_err(&pdev->dev, "sysfs creation failed\n");
+ return -EINVAL;
+ }
+
+ /* set QDECCTL */
+ status = 0; /* default to Quadrature count mode, QSRC1 & QSRC0 = 0 */
+
+ /* set QSRC1 & QSRC0 bits, one of 4 count_modes. */
+ if (!of_property_read_u32(pdev->dev.of_node, "count_mode", &value) && value <= 3) {
+ status |= value << 14;
+
+ /*
+ * in count up or count down mode, count on rising edge only
+ * not on both edges.
+ */
+ if (value >= 2)
+ status |= XCR;
+ }
+ dev_info(&pdev->dev, "count_mode:%d\n", value);
+
+ /* Should we invert the qa input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qa", &value))
+ status = value ? status | QAP : status & ~QAP;
+ dev_info(&pdev->dev, "invert_qa:%d\n", value);
+
+ /* Should we invert the qb input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qb", &value))
+ status = value ? status | QBP : status & ~QBP;
+ dev_info(&pdev->dev, "invert_qb:%d\n", value);
+
+ /* Should we invert the index input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qi", &value))
+ status = value ? status | QIP : status & ~QIP;
+ dev_info(&pdev->dev, "invert_qi:%d\n", value);
+
+ /* Should we invert the strobe input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qs", &value))
+ status = value ? status | QSP : status & ~QSP;
+ dev_info(&pdev->dev, "invert_qs:%d\n", value);
+
+ /* Should we swap the cha and chb inputs */
+ if (!of_property_read_u32(pdev->dev.of_node, "swap_inputs", &value))
+ status = value ? status | SWAP : status & ~SWAP;
+ dev_info(&pdev->dev, "swap_inputs:%d\n", value);
+
+ dev_info(&pdev->dev, "QDECCTL:0x%04x\n", status);
+
+ /* Write the decoder control settings back to the control register */
+ writew(status, eqep->mmio_base + QDECCTL);
+
+ writel( 0, eqep->mmio_base + QPOSINIT);
+ writel(~0, eqep->mmio_base + QPOSMAX);
+ writel( 0, eqep->mmio_base + QPOSCNT);
+
+ dev_info(&pdev->dev, "QPOSINIT:0x%08x\n", readl(eqep->mmio_base + QPOSINIT));
+ dev_info(&pdev->dev, "QPOSMAX:0x%08x\n", readl(eqep->mmio_base + QPOSMAX));
+ dev_info(&pdev->dev, "QPOSCNT:0x%08x\n", readl(eqep->mmio_base + QPOSCNT));
+
+ status = UTOF; /* Enable Unit Time Period interrupt. */
+ if (!of_property_read_u32(pdev->dev.of_node, "omit_interrupt", &value) && value) {
+ status = 0; /* no interrupt */
+ }
+ writew(status, eqep->mmio_base + QEINT);
+ dev_info(&pdev->dev, "omit_interrupt:%d\n", value);
+ dev_info(&pdev->dev, "QEINT:0x%04x\n", status);
+
+ /* Calculate the timer ticks per second */
+ period = 1000000000;
+ period = period * eqep->clk_rate;
+ do_div(period, NSEC_PER_SEC);
+
+ /* Set this period into the unit timer period register */
+ writel(period, eqep->mmio_base + QUPRD);
+ dev_info(&pdev->dev, "QUPRD:0x%08x\n", (u32) period);
+
+ /*
+ * Enable the eQEP with basic position counting turned on
+ * PHEN - Quadrature position counter enable bit
+ * UTE - unit timer enable
+ * QCLM - latch QPOSLAT to QPOSCNT upon unit timer overflow
+ * IEL0 - Latch QPOSILAT on index signal. Rising or falling, IEL[1:0] = 0 is reserved
+ * SWI - Software initialization of position count register, i.e. set QPOSCNT <= QPOSINIT,
+ * but this bit was not being reset by hardware as advertised in TRM,
+ * (so omit & clear QPOSCNT manually elsewhere?)
+ */
+ status = PHEN | UTE | QCLM | IEL0 | SWI;
+ writew(status, eqep->mmio_base + QEPCTL);
+ dev_info(&pdev->dev, "QEPCTL:0x%04x write\n", status);
+ dev_info(&pdev->dev, "QEPCTL:0x%04x read\n", readw(eqep->mmio_base + QEPCTL));
+
+ /* We default to absolute mode */
+ eqep->op_mode = TIEQEP_MODE_ABSOLUTE;
+
+ /* Enable the power management runtime */
+ pm_runtime_enable(&pdev->dev);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(&pdev->dev);
+
+ /* Initialize the notify work struture */
+ INIT_WORK(&eqep->notify_work, notify_handler);
+
+ /* Decrement the device usage count (twice) and run pm_runtime_idle() if zero */
+ pm_runtime_put_sync(&pdev->dev);
+
+ /* Set the platform driver data to the data object we've been creating for the eQEP unit */
+ platform_set_drvdata(pdev, eqep);
+
+ /* Success! */
+ dev_info(&pdev->dev, "irq:%d, clk_rate:%u\n", eqep->irq, eqep->clk_rate);
+ return 0;
+}
+
+/* Remove an instance of the eQEP driver */
+static int eqep_remove(struct platform_device *pdev)
+{
+ /* Get the eQEP driver data from the platform device structure */
+ struct eqep_chip *eqep = platform_get_drvdata(pdev);
+
+ /* Cancel work */
+ cancel_work_sync(&eqep->notify_work);
+
+ /* Unmap from sysfs */
+ sysfs_remove_group(&pdev->dev.kobj, &eqep_device_attr_group);
+
+ /* Release important assets */
+ free_irq(eqep->irq, pdev);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(&pdev->dev);
+
+ /* Decrement the device usage count (twice) and run pm_runtime_idle() if zero */
+ pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_put_sync(&pdev->dev);
+
+ /* Disable the runtime power management of this device */
+ pm_runtime_disable(&pdev->dev);
+
+ /* Return success */
+ return 0;
+}
+
+/* Power management suspend device */
+static int eqep_suspend(struct device *dev)
+{
+ /* Get the eqep driver information */
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+ u16 tmp;
+
+ /* Shut down interrupts */
+ eqep->prior_qeint = readw(eqep->mmio_base + QEINT);
+ tmp = eqep->prior_qeint & ~UTOF;
+ writew(tmp, eqep->mmio_base + QEINT);
+
+ /* Get the existing state of QEPCTL */
+ eqep->prior_qepctl = readw(eqep->mmio_base + QEPCTL);
+
+ /* Disable eQEP controller */
+ writew(eqep->prior_qepctl & ~PHEN, eqep->mmio_base + QEPCTL);
+
+ /* Decrement the device usage count and run pm_runtime_idle() if zero */
+ pm_runtime_put_sync(dev);
+
+ /* Return success */
+ return 0;
+}
+
+/* Power management wake device back up */
+static int eqep_resume(struct device *dev)
+{
+ /* Get the eqep driver information */
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ /* Restore interrupt enabled register */
+ writew(eqep->prior_qeint, eqep->mmio_base + QEINT);
+
+ /* Restore prior qep control register */
+ writew(eqep->prior_qepctl, eqep->mmio_base + QEPCTL);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+
+ /* Success */
+ return 0;
+}
+
+/* create pm functions object */
+static SIMPLE_DEV_PM_OPS(eqep_pm_ops, eqep_suspend, eqep_resume);
+
+/* Platform driver information */
+static struct platform_driver eqep_driver = {
+ .driver = {
+ .name = "eqep",
+ .owner = THIS_MODULE,
+ .pm = &eqep_pm_ops,
+ .of_match_table = eqep_of_match,
+ },
+ .probe = eqep_probe,
+ .remove = eqep_remove,
+};
+
+/* Register this platform driver */
+module_platform_driver(eqep_driver);
+
+/* Module information */
+MODULE_DESCRIPTION("TI eQEP driver");
+MODULE_AUTHOR("Nathaniel R. Lewis");
+MODULE_LICENSE("GPL");
diff --git a/drivers/misc/tsl2550.c b/drivers/misc/tsl2550.c
index adf4607..3fce3b6 100644
--- a/drivers/misc/tsl2550.c
+++ b/drivers/misc/tsl2550.c
@@ -177,7 +177,7 @@ static int tsl2550_calculate_lux(u8 ch0, u8 ch1)
} else
lux = 0;
else
- return -EAGAIN;
+ return 0;
/* LUX range check */
return lux > TSL2550_MAX_LUX ? TSL2550_MAX_LUX : lux;
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index a98aeda..a981c5e 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -107,6 +107,10 @@ struct davinci_mdio_data {
u32 clk_div;
};
+#if IS_ENABLED(CONFIG_OF)
+static void davinci_mdio_update_dt_from_phymask(u32 phy_mask);
+#endif
+
static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
{
u32 mdio_in, div, mdio_out_khz, access_time;
@@ -174,6 +178,12 @@ static int davinci_mdio_reset(struct mii_bus *bus)
/* restrict mdio bus to live phys only */
dev_info(data->dev, "detected phy mask %x\n", ~phy_mask);
phy_mask = ~phy_mask;
+
+ #if IS_ENABLED(CONFIG_OF)
+ if (of_machine_is_compatible("ti,am335x-bone"))
+ davinci_mdio_update_dt_from_phymask(phy_mask);
+ #endif
+
} else {
/* desperately scan all phys */
dev_warn(data->dev, "no live phy, scanning all\n");
@@ -487,6 +497,93 @@ static int davinci_mdio_runtime_resume(struct device *dev)
davinci_mdio_enable(data);
return 0;
}
+static void davinci_mdio_update_dt_from_phymask(u32 phy_mask)
+{
+ int i, len, skip;
+ u32 addr;
+ __be32 *old_phy_p, *phy_id_p;
+ struct property *phy_id_property = NULL;
+ struct device_node *node_p, *slave_p;
+
+ addr = 0;
+
+ for (i = 0; i < PHY_MAX_ADDR; i++) {
+ if ((phy_mask & (1 << i)) == 0) {
+ addr = (u32) i;
+ break;
+ }
+ }
+
+ for_each_compatible_node(node_p, NULL, "ti,cpsw") {
+ for_each_node_by_name(slave_p, "slave") {
+
+#if IS_ENABLED(CONFIG_OF_OVERLAY)
+ skip = 1;
+ // Hack, the overlay fixup "slave" doesn't have phy-mode...
+ old_phy_p = (__be32 *) of_get_property(slave_p, "phy-mode", &len);
+
+ if (len != (sizeof(__be32 *) * 1))
+ {
+ skip = 0;
+ }
+
+ if (skip) {
+#endif
+
+ old_phy_p = (__be32 *) of_get_property(slave_p, "phy_id", &len);
+
+ if (len != (sizeof(__be32 *) * 2))
+ goto err_out;
+
+ if (old_phy_p) {
+
+ phy_id_property = kzalloc(sizeof(*phy_id_property), GFP_KERNEL);
+
+ if (! phy_id_property)
+ goto err_out;
+
+ phy_id_property->length = len;
+ phy_id_property->name = kstrdup("phy_id", GFP_KERNEL);
+ phy_id_property->value = kzalloc(len, GFP_KERNEL);
+
+ if (! phy_id_property->name)
+ goto err_out;
+
+ if (! phy_id_property->value)
+ goto err_out;
+
+ memcpy(phy_id_property->value, old_phy_p, len);
+
+ phy_id_p = (__be32 *) phy_id_property->value + 1;
+
+ *phy_id_p = cpu_to_be32(addr);
+
+ of_update_property(slave_p, phy_id_property);
+ pr_info("davinci_mdio: dt: updated phy_id[%d] from phy_mask[%x]\n", addr, phy_mask);
+
+ ++addr;
+ }
+#if IS_ENABLED(CONFIG_OF_OVERLAY)
+ }
+#endif
+ }
+ }
+
+ return;
+
+err_out:
+
+ if (phy_id_property) {
+ if (phy_id_property->name)
+ kfree(phy_id_property->name);
+
+ if (phy_id_property->value)
+ kfree(phy_id_property->value);
+
+ if (phy_id_property)
+ kfree(phy_id_property);
+ }
+}
#endif
#ifdef CONFIG_PM_SLEEP
diff --git a/drivers/net/ethernet/wiznet/w5100-spi.c b/drivers/net/ethernet/wiznet/w5100-spi.c
index 93a2d3c..e981d2a 100644
--- a/drivers/net/ethernet/wiznet/w5100-spi.c
+++ b/drivers/net/ethernet/wiznet/w5100-spi.c
@@ -442,6 +442,21 @@ static int w5100_spi_remove(struct spi_device *spi)
return w5100_remove(&spi->dev);
}
+#ifdef CONFIG_OF
+static const struct of_device_id w5100_spi_of_match[] = {
+ { .compatible = "wiznet,w5500" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, w5100_spi_of_match);
+#endif
+
+#ifdef CONFIG_OF
+static const struct spi_device_id w5100_spi_ids[] = {
+ { "w5500", W5500 },
+ {}
+};
+MODULE_DEVICE_TABLE(spi, w5100_spi_ids);
+#else
static const struct spi_device_id w5100_spi_ids[] = {
{ "w5100", W5100 },
{ "w5200", W5200 },
@@ -449,11 +464,13 @@ static const struct spi_device_id w5100_spi_ids[] = {
{}
};
MODULE_DEVICE_TABLE(spi, w5100_spi_ids);
+#endif
static struct spi_driver w5100_spi_driver = {
.driver = {
.name = "w5100",
.pm = &w5100_pm_ops,
+ .of_match_table = of_match_ptr(w5100_spi_of_match),
},
.probe = w5100_spi_probe,
.remove = w5100_spi_remove,
diff --git a/drivers/opp/of.c b/drivers/opp/of.c
index 7af0dde..e526951 100644
--- a/drivers/opp/of.c
+++ b/drivers/opp/of.c
@@ -374,7 +374,7 @@ static int _opp_add_static_v2(struct opp_table *opp_table, struct device *dev,
free_opp:
_opp_free(new_opp);
- return ret;
+ return 0;
}
/* Initializes OPP tables based on new bindings */
diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c
index 7c71cdb..f3f7b5a 100644
--- a/drivers/pwm/sysfs.c
+++ b/drivers/pwm/sysfs.c
@@ -23,6 +23,8 @@
#include <linux/kdev_t.h>
#include <linux/pwm.h>
+static struct class pwm_class;
+
struct pwm_export {
struct device child;
struct pwm_device *pwm;
@@ -239,6 +241,10 @@ static struct attribute *pwm_attrs[] = {
};
ATTRIBUTE_GROUPS(pwm);
+static const struct device_type pwm_channel_type = {
+ .name = "pwm_channel",
+};
+
static void pwm_export_release(struct device *child)
{
struct pwm_export *export = child_to_pwm_export(child);
@@ -248,6 +254,7 @@ static void pwm_export_release(struct device *child)
static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
{
+ struct pwm_chip *chip = dev_get_drvdata(parent);
struct pwm_export *export;
int ret;
@@ -263,12 +270,13 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
export->pwm = pwm;
mutex_init(&export->lock);
- export->child.class = parent->class;
export->child.release = pwm_export_release;
export->child.parent = parent;
+ export->child.type = &pwm_channel_type;
export->child.devt = MKDEV(0, 0);
+ export->child.class = &pwm_class;
export->child.groups = pwm_groups;
- dev_set_name(&export->child, "pwm%u", pwm->hwpwm);
+ dev_set_name(&export->child, "pwm-%d:%u", chip->base, pwm->hwpwm);
ret = device_register(&export->child);
if (ret) {
@@ -374,7 +382,6 @@ ATTRIBUTE_GROUPS(pwm_chip);
static struct class pwm_class = {
.name = "pwm",
.owner = THIS_MODULE,
- .dev_groups = pwm_chip_groups,
};
static int pwmchip_sysfs_match(struct device *parent, const void *data)
@@ -390,7 +397,8 @@ void pwmchip_sysfs_export(struct pwm_chip *chip)
* If device_create() fails the pwm_chip is still usable by
* the kernel its just not exported.
*/
- parent = device_create(&pwm_class, chip->dev, MKDEV(0, 0), chip,
+ parent = device_create_with_groups(&pwm_class, chip->dev, MKDEV(0, 0),
+ chip, pwm_chip_groups,
"pwmchip%d", chip->base);
if (IS_ERR(parent)) {
dev_warn(chip->dev,
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index cda1071..bad88bf 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -724,11 +724,11 @@ static int spidev_probe(struct spi_device *spi)
* compatible string, it is a Linux implementation thing
* rather than a description of the hardware.
*/
- if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
- dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
- WARN_ON(spi->dev.of_node &&
- !of_match_device(spidev_dt_ids, &spi->dev));
- }
+// if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
+// dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
+// WARN_ON(spi->dev.of_node &&
+// !of_match_device(spidev_dt_ids, &spi->dev));
+// }
spidev_probe_acpi(spi);
diff --git a/drivers/staging/fbtft/fb_ssd1306.c b/drivers/staging/fbtft/fb_ssd1306.c
index 9276be4..94e824c 100644
--- a/drivers/staging/fbtft/fb_ssd1306.c
+++ b/drivers/staging/fbtft/fb_ssd1306.c
@@ -55,6 +55,8 @@ static int init_display(struct fbtft_par *par)
write_reg(par, 0x3F);
else if (par->info->var.yres == 48)
write_reg(par, 0x2F);
+ else if (par->info->var.yres == 39)
+ write_reg(par, 0x27); /* https://libstock.mikroe.com/projects/download/1111/2577/1411057038_oled_b_click___e_mikroc_arm.zip */
else
write_reg(par, 0x1F);
@@ -72,16 +74,24 @@ static int init_display(struct fbtft_par *par)
/* Set Memory Addressing Mode */
write_reg(par, 0x20);
- /* Vertical addressing mode */
+ /* Vertical Addressing mode */
write_reg(par, 0x01);
/* Set Segment Re-map */
- /* column address 127 is mapped to SEG0 */
- write_reg(par, 0xA0 | 0x1);
+ if (par->info->var.yres == 39)
+ /* no segment re-map */
+ write_reg(par, 0xA0 | 0x0);
+ else
+ /* column address 127 is mapped to SEG0 */
+ write_reg(par, 0xA0 | 0x1);
/* Set COM Output Scan Direction */
- /* remapped mode. Scan from COM[N-1] to COM0 */
- write_reg(par, 0xC8);
+ if (par->info->var.yres == 39)
+ /* no columnt re-map mode. Scan from COM0 to COM[N-1] */
+ write_reg(par, 0xC0 | 0x0);
+ else
+ /* remapped mode. Scan from COM[N-1] to COM0 */
+ write_reg(par, 0xC0 | 0x8);
/* Set COM Pins Hardware Configuration */
write_reg(par, 0xDA);
@@ -91,18 +101,27 @@ static int init_display(struct fbtft_par *par)
else if (par->info->var.yres == 48)
/* A[4]=1b, Alternative COM pin configuration */
write_reg(par, 0x12);
+ else if (par->info->var.yres == 39)
+ /* A[4]=1b, Alternative COM pin configuration */
+ write_reg(par, 0x12);
else
/* A[4]=0b, Sequential COM pin configuration */
write_reg(par, 0x02);
/* Set Pre-charge Period */
write_reg(par, 0xD9);
- write_reg(par, 0xF1);
+ if (par->info->var.yres == 39)
+ write_reg(par, 0x25);
+ else
+ write_reg(par, 0xF1);
/* Set VCOMH Deselect Level */
write_reg(par, 0xDB);
- /* according to the datasheet, this value is out of bounds */
- write_reg(par, 0x40);
+ if (par->info->var.yres == 39)
+ write_reg(par, 0x20);
+ else
+ /* according to the datasheet, this value is out of bounds */
+ write_reg(par, 0x40);
/* Entire Display ON */
/* Resume to RAM content display. Output follows RAM content */
@@ -133,17 +152,35 @@ static void set_addr_win_64x48(struct fbtft_par *par)
write_reg(par, 0x5);
}
+static void set_addr_win_96x39(struct fbtft_par *par)
+{
+ /* Set Page Address */
+ write_reg(par, 0xB0);
+
+ /* Set Column Address */
+ write_reg(par, 0x21);
+ write_reg(par, 0x00);
+ write_reg(par, 0x5F);
+
+ /* Set Page Address Range */
+ write_reg(par, 0x22);
+ write_reg(par, 0x0);
+ write_reg(par, 0x4);
+}
+
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
- /* Set Lower Column Start Address for Page Addressing Mode */
+ /* Set Lower Column Start Address for Vertical Addressing Mode */
write_reg(par, 0x00 | 0x0);
- /* Set Higher Column Start Address for Page Addressing Mode */
+ /* Set Higher Column Start Address for Vertical Addressing Mode */
write_reg(par, 0x10 | 0x0);
/* Set Display Start Line */
write_reg(par, 0x40 | 0x0);
if (par->info->var.xres == 64 && par->info->var.yres == 48)
set_addr_win_64x48(par);
+ else if (par->info->var.xres == 96 && par->info->var.yres == 39)
+ set_addr_win_96x39(par);
}
static int blank(struct fbtft_par *par, bool on)
@@ -187,11 +224,19 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
*buf |= (vmem16[(y * 8 + i) * xres + x] ? 1 : 0) << i;
buf++;
}
+ if (yres % 8) {
+ *buf = 0x00;
+ for (i = 0; i < (yres - (y * 8)); i++)
+ *buf |= (vmem16[(y * 8 + i) * xres + x] ? 1 : 0) << i;
+ buf++;
+ y++;
+ }
}
/* Write data */
gpio_set_value(par->gpio.dc, 1);
- ret = par->fbtftops.write(par, par->txbuf.buf, xres * yres / 8);
+ ret = par->fbtftops.write(par, par->txbuf.buf, xres * (yres / 8 + (yres % 8 != 0)));
+ //ret = par->fbtftops.write(par, par->txbuf.buf, xres * 128 / 8);
if (ret < 0)
dev_err(par->info->device, "write failed and returned: %d\n",
ret);
diff --git a/drivers/staging/fbtft/fbtft_device.c b/drivers/staging/fbtft/fbtft_device.c
index ec84776..4bbd64c 100644
--- a/drivers/staging/fbtft/fbtft_device.c
+++ b/drivers/staging/fbtft/fbtft_device.c
@@ -382,6 +382,25 @@ static struct fbtft_device_display displays[] = {
},
}
}
+ }, {
+ .name = "mikroe_oledb",
+ .spi = &(struct spi_board_info) {
+ .modalias = "fb_ssd1306",
+ .max_speed_hz = 16000000,
+ .mode = SPI_MODE_0,
+ .platform_data = &(struct fbtft_platform_data) {
+ .display = {
+ .width = 96,
+ .height = 39,
+ .buswidth = 8,
+ },
+ .gpios = (const struct fbtft_gpio []) {
+ { "reset", 45 },
+ { "dc", 110 },
+ {},
+ },
+ }
+ }
}, {
.name = "admatec_c-berry28",
.spi = &(struct spi_board_info) {
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index 1b337fe..4989729 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -1493,10 +1493,10 @@ static int __init omap8250_console_fixup(void)
}
add_preferred_console("ttyS", idx, options);
- pr_err("WARNING: Your 'console=ttyO%d' has been replaced by 'ttyS%d'\n",
+ pr_info("WARNING: Your 'console=ttyO%d' has been replaced by 'ttyS%d'\n",
idx, idx);
- pr_err("This ensures that you still see kernel messages. Please\n");
- pr_err("update your kernel commandline.\n");
+ pr_info("This ensures that you still see kernel messages. Please\n");
+ pr_info("update your kernel commandline.\n");
return 0;
}
console_initcall(omap8250_console_fixup);
diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
index 7e8dc78..e0c68ac 100644
--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
@@ -129,7 +129,7 @@ config UIO_PRUSS
select GENERIC_ALLOCATOR
depends on HAS_IOMEM && HAS_DMA
help
- PRUSS driver for OMAPL138/DA850/AM18XX devices
+ PRUSS driver for OMAPL138/DA850/AM18XX and AM33XX devices
PRUSS driver requires user space components, examples and user space
driver is available from below SVN repo - you may use anonymous login
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c
index 91aea88..0fc2bac 100644
--- a/drivers/uio/uio_pruss.c
+++ b/drivers/uio/uio_pruss.c
@@ -19,6 +19,7 @@
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
+#include <linux/of_gpio.h>
#include <linux/uio_driver.h>
#include <linux/platform_data/uio_pruss.h>
#include <linux/io.h>
@@ -27,13 +28,23 @@
#include <linux/sizes.h>
#include <linux/slab.h>
#include <linux/genalloc.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/err.h>
+#include <linux/pm_runtime.h>
#define DRV_NAME "pruss_uio"
#define DRV_VERSION "1.0"
+/* XXX the sram pool support right now is supported for prussv1, even though
+ * it seems to me it should be easy to support this for prussv2 as well.
+ */
+#ifdef CONFIG_ARCH_DAVINCI_DA850
static int sram_pool_sz = SZ_16K;
module_param(sram_pool_sz, int, 0);
MODULE_PARM_DESC(sram_pool_sz, "sram pool size to allocate ");
+#endif
static int extram_pool_sz = SZ_256K;
module_param(extram_pool_sz, int, 0);
@@ -63,14 +74,16 @@ MODULE_PARM_DESC(extram_pool_sz, "external ram pool size to allocate");
struct uio_pruss_dev {
struct uio_info *info;
struct clk *pruss_clk;
- dma_addr_t sram_paddr;
dma_addr_t ddr_paddr;
void __iomem *prussio_vaddr;
- unsigned long sram_vaddr;
void *ddr_vaddr;
unsigned int hostirq_start;
unsigned int pintc_base;
+#ifdef CONFIG_ARCH_DAVINCI_DA850
+ dma_addr_t sram_paddr;
+ unsigned long sram_vaddr;
struct gen_pool *sram_pool;
+#endif
};
static irqreturn_t pruss_handler(int irq, struct uio_info *info)
@@ -106,14 +119,18 @@ static void pruss_cleanup(struct device *dev, struct uio_pruss_dev *gdev)
dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
gdev->ddr_paddr);
}
+#ifdef CONFIG_ARCH_DAVINCI_DA850
if (gdev->sram_vaddr)
gen_pool_free(gdev->sram_pool,
gdev->sram_vaddr,
sram_pool_sz);
+#endif
kfree(gdev->info);
clk_disable(gdev->pruss_clk);
clk_put(gdev->pruss_clk);
kfree(gdev);
+ pm_runtime_put(dev);
+ pm_runtime_disable(dev);
}
static int pruss_probe(struct platform_device *pdev)
@@ -121,9 +138,15 @@ static int pruss_probe(struct platform_device *pdev)
struct uio_info *p;
struct uio_pruss_dev *gdev;
struct resource *regs_prussio;
+ struct resource res;
struct device *dev = &pdev->dev;
int ret = -ENODEV, cnt = 0, len;
struct uio_pruss_pdata *pdata = dev_get_platdata(dev);
+ struct pinctrl *pinctrl;
+
+ int count;
+ struct device_node *child;
+ const char *pin_name;
gdev = kzalloc(sizeof(struct uio_pruss_dev), GFP_KERNEL);
if (!gdev)
@@ -135,14 +158,24 @@ static int pruss_probe(struct platform_device *pdev)
return -ENOMEM;
}
+ pm_runtime_enable(dev);
+ ret = pm_runtime_get_sync(dev);
+ if (ret < 0) {
+ dev_err(dev, "pm_runtime_get_sync() failed\n");
+ pm_runtime_disable(dev);
+ kfree(gdev->info);
+ kfree(gdev);
+ return ret;
+ }
+
+#ifdef CONFIG_ARCH_DAVINCI_DA850
/* Power on PRU in case its not done as part of boot-loader */
gdev->pruss_clk = clk_get(dev, "pruss");
if (IS_ERR(gdev->pruss_clk)) {
dev_err(dev, "Failed to get clock\n");
ret = PTR_ERR(gdev->pruss_clk);
- kfree(gdev->info);
- kfree(gdev);
- return ret;
+ gdev->pruss_clk = NULL;
+ goto out_free;
} else {
ret = clk_enable(gdev->pruss_clk);
if (ret) {
@@ -153,11 +186,21 @@ static int pruss_probe(struct platform_device *pdev)
return ret;
}
}
+#endif
- regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!regs_prussio) {
- dev_err(dev, "No PRUSS I/O resource specified\n");
- goto out_free;
+ if (dev->of_node) {
+ ret = of_address_to_resource(dev->of_node, 0, &res);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "failed to parse DT reg\n");
+ goto out_free;
+ }
+ regs_prussio = &res;
+ } else {
+ regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!regs_prussio) {
+ dev_err(dev, "No PRUSS I/O resource specified\n");
+ goto out_free;
+ }
}
if (!regs_prussio->start) {
@@ -165,7 +208,64 @@ static int pruss_probe(struct platform_device *pdev)
goto out_free;
}
- if (pdata->sram_pool) {
+
+ /* XXX this stuff below is complete garbage:
+ * 1. It's quite common for pruss to have no pinctrl.
+ * 2. If the pins are to be used as fast PRU I/O then requesting
+ * the same pins as regular gpios is a conflict (which would be
+ * detected by the kernel if the dts bothered to declare the
+ * gpio-to-pinctrl mapping).
+ * 3. If you really do just want to request a bunch of regular
+ * gpios, then use gpio-of-helper. That's what it's for.
+ *
+ * - Matthijs van Duin
+ */
+#if 0
+ pinctrl = devm_pinctrl_get_select_default(dev);
+ if (IS_ERR(pinctrl))
+ dev_warn(dev,
+ "pins are not configured from the driver\n");
+ else{
+ count = of_get_child_count(dev->of_node);
+ if (!count){
+ dev_info(dev, "No children\n");
+ return -ENODEV;
+ }
+ // Run through all children. They have lables for easy reference.
+ for_each_child_of_node(dev->of_node, child){
+ enum of_gpio_flags flags;
+ unsigned gpio;
+
+ count = of_gpio_count(child);
+
+ ret = of_property_count_strings(child, "pin-names");
+ if (ret < 0) {
+ dev_err(dev, "Failed to get pin-names\n");
+ continue;
+ }
+ if(count != ret){
+ dev_err(dev, "The number of gpios (%d) does not match"\
+ " the number of pin names (%d)\n", count, ret);
+ continue;
+ }
+
+ for(cnt=0; cnt<count; cnt++){
+ ret = of_property_read_string_index(child,
+ "pin-names", cnt, &pin_name);
+ if (ret != 0)
+ dev_err(dev, "Error on pin-name #%d\n", cnt);
+ gpio = of_get_gpio_flags(child, cnt, &flags);
+ ret = devm_gpio_request_one(dev, gpio, flags, pin_name);
+ if (ret < 0) {
+ dev_err(dev, "Failed to request GPIO %d (%s) flags: '%d', error %d\n",
+ gpio, pin_name, flags, ret);
+ }
+ }
+ }
+ }
+#endif
+#ifdef CONFIG_ARCH_DAVINCI_DA850
+ if (pdata && pdata->sram_pool) {
gdev->sram_pool = pdata->sram_pool;
gdev->sram_vaddr =
(unsigned long)gen_pool_dma_alloc(gdev->sram_pool,
@@ -175,6 +275,7 @@ static int pruss_probe(struct platform_device *pdev)
goto out_free;
}
}
+#endif
gdev->ddr_vaddr = dma_alloc_coherent(dev, extram_pool_sz,
&(gdev->ddr_paddr), GFP_KERNEL | GFP_DMA);
@@ -186,26 +287,45 @@ static int pruss_probe(struct platform_device *pdev)
len = resource_size(regs_prussio);
gdev->prussio_vaddr = ioremap(regs_prussio->start, len);
if (!gdev->prussio_vaddr) {
- dev_err(dev, "Can't remap PRUSS I/O address range\n");
+ dev_err(dev, "Can't remap PRUSS I/O address range\n");
goto out_free;
}
- gdev->pintc_base = pdata->pintc_base;
+ if (dev->of_node) {
+ ret = of_property_read_u32(dev->of_node,
+ "ti,pintc-offset",
+ &gdev->pintc_base);
+ if (ret < 0) {
+ dev_err(dev, "Can't parse ti,pintc-offset property\n");
+ goto out_free;
+ }
+ } else
+ gdev->pintc_base = pdata->pintc_base;
gdev->hostirq_start = platform_get_irq(pdev, 0);
for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) {
+ p->mem[0].name = "pruss";
p->mem[0].addr = regs_prussio->start;
p->mem[0].size = resource_size(regs_prussio);
p->mem[0].memtype = UIO_MEM_PHYS;
+ /* note: some userspace code uses hardcoded indices... */
+#ifdef CONFIG_ARCH_DAVINCI_DA850
+ p->mem[1].name = "sram";
p->mem[1].addr = gdev->sram_paddr;
p->mem[1].size = sram_pool_sz;
p->mem[1].memtype = UIO_MEM_PHYS;
+ p->mem[2].name = "ddr";
p->mem[2].addr = gdev->ddr_paddr;
p->mem[2].size = extram_pool_sz;
p->mem[2].memtype = UIO_MEM_PHYS;
-
+#else
+ p->mem[1].name = "ddr";
+ p->mem[1].addr = gdev->ddr_paddr;
+ p->mem[1].size = extram_pool_sz;
+ p->mem[1].memtype = UIO_MEM_PHYS;
+#endif
p->name = kasprintf(GFP_KERNEL, "pruss_evt%d", cnt);
p->version = DRV_VERSION;
@@ -235,11 +355,20 @@ static int pruss_remove(struct platform_device *dev)
return 0;
}
+static const struct of_device_id pruss_dt_ids[] = {
+ { .compatible = "ti,pruss-v1", .data = NULL, },
+ { .compatible = "ti,pruss-v2", .data = NULL, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, pruss_dt_ids);
+
+
static struct platform_driver pruss_driver = {
.probe = pruss_probe,
.remove = pruss_remove,
.driver = {
.name = DRV_NAME,
+ .of_match_table = pruss_dt_ids,
},
};
diff --git b/include/dt-bindings/board/am335x-bbw-bbb-base.h b/include/dt-bindings/board/am335x-bbw-bbb-base.h
new file mode 100644
index 0000000..35f6d57
--- /dev/null
+++ b/include/dt-bindings/board/am335x-bbw-bbb-base.h
@@ -0,0 +1,103 @@
+/*
+ * This header provides constants for bbw/bbb pinctrl bindings.
+ *
+ * Copyright (C) 2014 Robert Nelson <robertcnelson@gmail.com>
+ *
+ * Numbers Based on: https://github.com/derekmolloy/boneDeviceTree/tree/master/docs
+ */
+
+#ifndef _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
+#define _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
+
+#define BONE_P8_03 0x018
+#define BONE_P8_04 0x01C
+
+#define BONE_P8_05 0x008
+#define BONE_P8_06 0x00C
+#define BONE_P8_07 0x090
+#define BONE_P8_08 0x094
+
+#define BONE_P8_09 0x09C
+#define BONE_P8_10 0x098
+#define BONE_P8_11 0x034
+#define BONE_P8_12 0x030
+
+#define BONE_P8_13 0x024
+#define BONE_P8_14 0x028
+#define BONE_P8_15 0x03C
+#define BONE_P8_16 0x038
+
+#define BONE_P8_17 0x02C
+#define BONE_P8_18 0x08C
+#define BONE_P8_19 0x020
+#define BONE_P8_20 0x084
+
+#define BONE_P8_21 0x080
+#define BONE_P8_22 0x014
+#define BONE_P8_23 0x010
+#define BONE_P8_24 0x004
+
+#define BONE_P8_25 0x000
+#define BONE_P8_26 0x07C
+#define BONE_P8_27 0x0E0
+#define BONE_P8_28 0x0E8
+
+#define BONE_P8_29 0x0E4
+#define BONE_P8_30 0x0EC
+#define BONE_P8_31 0x0D8
+#define BONE_P8_32 0x0DC
+
+#define BONE_P8_33 0x0D4
+#define BONE_P8_34 0x0CC
+#define BONE_P8_35 0x0D0
+#define BONE_P8_36 0x0C8
+
+#define BONE_P8_37 0x0C0
+#define BONE_P8_38 0x0C4
+#define BONE_P8_39 0x0B8
+#define BONE_P8_40 0x0BC
+
+#define BONE_P8_41 0x0B0
+#define BONE_P8_42 0x0B4
+#define BONE_P8_43 0x0A8
+#define BONE_P8_44 0x0AC
+
+#define BONE_P8_45 0x0A0
+#define BONE_P8_46 0x0A4
+
+#define BONE_P9_11 0x070
+#define BONE_P9_12 0x078
+
+#define BONE_P9_13 0x074
+#define BONE_P9_14 0x048
+#define BONE_P9_15 0x040
+#define BONE_P9_16 0x04C
+
+#define BONE_P9_17 0x15C
+#define BONE_P9_18 0x158
+#define BONE_P9_19 0x17C
+#define BONE_P9_20 0x178
+
+#define BONE_P9_21 0x154
+#define BONE_P9_22 0x150
+#define BONE_P9_23 0x044
+#define BONE_P9_24 0x184
+
+#define BONE_P9_25 0x1AC
+#define BONE_P9_26 0x180
+#define BONE_P9_27 0x1A4
+#define BONE_P9_28 0x19C
+
+#define BONE_P9_29 0x194
+#define BONE_P9_30 0x198
+#define BONE_P9_31 0x190
+
+/* Shared P21 of P11 */
+#define BONE_P9_41A 0x1B4
+#define BONE_P9_41B 0x1A8
+
+/* Shared P22 of P11 */
+#define BONE_P9_42A 0x164
+#define BONE_P9_42B 0x1A0
+
+#endif
diff --git a/samples/seccomp/Makefile b/samples/seccomp/Makefile
index ba942e3..8e4e941 100644
--- a/samples/seccomp/Makefile
+++ b/samples/seccomp/Makefile
@@ -18,6 +18,7 @@ bpf-direct-objs := bpf-direct.o
# Try to match the kernel target.
ifndef CONFIG_64BIT
+ifndef CONFIG_ARM
# s390 has -m31 flag to build 31 bit binaries
ifndef CONFIG_S390
@@ -36,3 +37,4 @@ HOSTLOADLIBES_dropper += $(MFLAG)
endif
always := $(hostprogs-m)
endif
+endif